2053 files changed, 70618 insertions, 34962 deletions

diff --git a/arch/Kconfig b/arch/Kconfig
index 471e72dbaf8b..2e13aa261929 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -6,6 +6,8 @@ config OPROFILE
         tristate "OProfile system profiling (EXPERIMENTAL)"
         depends on PROFILING
         depends on HAVE_OPROFILE
+        select TRACING
+        select RING_BUFFER
         help
           OProfile is a profiling system capable of profiling the
           whole system, include the kernel, kernel modules, libraries,
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index ca88e54dec93..62b363584b2b 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -1,6 +1,7 @@
 #ifndef _ALPHA_ATOMIC_H
 #define _ALPHA_ATOMIC_H
 
+#include <linux/types.h>
 #include <asm/barrier.h>
 #include <asm/system.h>
 
@@ -13,14 +14,6 @@
  */
 
 
-/*
- * Counter is volatile to make sure gcc doesn't try to be clever
- * and move things around on us. We need to use _exactly_ the address
- * the user gave us, not some alias that contains the same information.
- */
-typedef struct { volatile int counter; } atomic_t;
-typedef struct { volatile long counter; } atomic64_t;
-
 #define ATOMIC_INIT(i)          ( (atomic_t) { (i) } )
 #define ATOMIC64_INIT(i)        ( (atomic64_t) { (i) } )
 
diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h
index e971ab000f95..eda9b909aa05 100644
--- a/arch/alpha/include/asm/io.h
+++ b/arch/alpha/include/asm/io.h
@@ -96,9 +96,6 @@ static inline dma_addr_t __deprecated isa_page_to_bus(struct page *page)
         return page_to_phys(page);
 }
 
-/* This depends on working iommu.  */
-#define BIO_VMERGE_BOUNDARY     (alpha_mv.mv_pci_tbi ? PAGE_SIZE : 0)
-
 /* Maximum PIO space address supported?  */
 #define IO_SPACE_LIMIT 0xffff
 
diff --git a/arch/alpha/include/asm/smp.h b/arch/alpha/include/asm/smp.h
index 544c69af8168..547e90951cec 100644
--- a/arch/alpha/include/asm/smp.h
+++ b/arch/alpha/include/asm/smp.h
@@ -45,7 +45,6 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
 #define raw_smp_processor_id()  (current_thread_info()->cpu)
 
 extern int smp_num_cpus;
-#define cpu_possible_map        cpu_present_map
 
 extern void arch_send_call_function_single_ipi(int cpu);
 extern void arch_send_call_function_ipi(cpumask_t mask);
diff --git a/arch/alpha/include/asm/topology.h b/arch/alpha/include/asm/topology.h
index 149532e162c4..b4f284c72ff3 100644
--- a/arch/alpha/include/asm/topology.h
+++ b/arch/alpha/include/asm/topology.h
@@ -39,7 +39,24 @@ static inline cpumask_t node_to_cpumask(int node)
         return node_cpu_mask;
 }
 
+extern struct cpumask node_to_cpumask_map[];
+/* FIXME: This is dumb, recalculating every time.  But simple. */
+static const struct cpumask *cpumask_of_node(int node)
+{
+        int cpu;
+
+        cpumask_clear(&node_to_cpumask_map[node]);
+
+        for_each_online_cpu(cpu) {
+                if (cpu_to_node(cpu) == node)
+                        cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
+        }
+
+        return &node_to_cpumask_map[node];
+}
+
 #define pcibus_to_cpumask(bus)  (cpu_online_map)
+#define cpumask_of_pcibus(bus)  (cpu_online_mask)
 
 #endif /* !CONFIG_NUMA */
 # include <asm-generic/topology.h>
diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile
index ac706c1d7ada..b4697759a123 100644
--- a/arch/alpha/kernel/Makefile
+++ b/arch/alpha/kernel/Makefile
@@ -8,7 +8,7 @@ EXTRA_CFLAGS	:= -Werror -Wno-sign-compare
 
 obj-y    := entry.o traps.o process.o init_task.o osf_sys.o irq.o \
             irq_alpha.o signal.o setup.o ptrace.o time.o \
-            alpha_ksyms.o systbls.o err_common.o io.o
+            alpha_ksyms.o systbls.o err_common.o io.o binfmt_loader.o
 
 obj-$(CONFIG_VGA_HOSE)  += console.o
 obj-$(CONFIG_SMP)       += smp.o
diff --git a/arch/alpha/kernel/asm-offsets.c b/arch/alpha/kernel/asm-offsets.c
index 4b18cd94d59d..6ff8886e7e22 100644
--- a/arch/alpha/kernel/asm-offsets.c
+++ b/arch/alpha/kernel/asm-offsets.c
@@ -19,15 +19,18 @@ void foo(void)
         BLANK();
 
         DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));
-        DEFINE(TASK_UID, offsetof(struct task_struct, uid));
-        DEFINE(TASK_EUID, offsetof(struct task_struct, euid));
-        DEFINE(TASK_GID, offsetof(struct task_struct, gid));
-        DEFINE(TASK_EGID, offsetof(struct task_struct, egid));
+        DEFINE(TASK_CRED, offsetof(struct task_struct, cred));
         DEFINE(TASK_REAL_PARENT, offsetof(struct task_struct, real_parent));
         DEFINE(TASK_GROUP_LEADER, offsetof(struct task_struct, group_leader));
         DEFINE(TASK_TGID, offsetof(struct task_struct, tgid));
         BLANK();
 
+        DEFINE(CRED_UID,  offsetof(struct cred, uid));
+        DEFINE(CRED_EUID, offsetof(struct cred, euid));
+        DEFINE(CRED_GID,  offsetof(struct cred, gid));
+        DEFINE(CRED_EGID, offsetof(struct cred, egid));
+        BLANK();
+
         DEFINE(SIZEOF_PT_REGS, sizeof(struct pt_regs));
         DEFINE(PT_PTRACED, PT_PTRACED);
         DEFINE(CLONE_VM, CLONE_VM);
diff --git a/arch/alpha/kernel/binfmt_loader.c b/arch/alpha/kernel/binfmt_loader.c
new file mode 100644
index 000000000000..4a0af906b00a
--- /dev/null
+++ b/arch/alpha/kernel/binfmt_loader.c
@@ -0,0 +1,51 @@
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/mm_types.h>
+#include <linux/binfmts.h>
+#include <linux/a.out.h>
+
+static int load_binary(struct linux_binprm *bprm, struct pt_regs *regs)
+{
+        struct exec *eh = (struct exec *)bprm->buf;
+        unsigned long loader;
+        struct file *file;
+        int retval;
+
+        if (eh->fh.f_magic != 0x183 || (eh->fh.f_flags & 0x3000) != 0x3000)
+                return -ENOEXEC;
+
+        if (bprm->loader)
+                return -ENOEXEC;
+
+        allow_write_access(bprm->file);
+        fput(bprm->file);
+        bprm->file = NULL;
+
+        loader = bprm->vma->vm_end - sizeof(void *);
+
+        file = open_exec("/sbin/loader");
+        retval = PTR_ERR(file);
+        if (IS_ERR(file))
+                return retval;
+
+        /* Remember if the application is TASO.  */
+        bprm->taso = eh->ah.entry < 0x100000000UL;
+
+        bprm->file = file;
+        bprm->loader = loader;
+        retval = prepare_binprm(bprm);
+        if (retval < 0)
+                return retval;
+        return search_binary_handler(bprm,regs);
+}
+
+static struct linux_binfmt loader_format = {
+        .load_binary    = load_binary,
+};
+
+static int __init init_loader_binfmt(void)
+{
+        return register_binfmt(&loader_format);
+}
+arch_initcall(init_loader_binfmt);
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index 5fc61e281ac7..f77345bc66a9 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -850,8 +850,9 @@ osf_getpriority:
 sys_getxuid:
         .prologue 0
         ldq     $2, TI_TASK($8)
-        ldl     $0, TASK_UID($2)
-        ldl     $1, TASK_EUID($2)
+        ldq     $3, TASK_CRED($2)
+        ldl     $0, CRED_UID($3)
+        ldl     $1, CRED_EUID($3)
         stq     $1, 80($sp)
         ret
 .end sys_getxuid
@@ -862,8 +863,9 @@ sys_getxuid:
 sys_getxgid:
         .prologue 0
         ldq     $2, TI_TASK($8)
-        ldl     $0, TASK_GID($2)
-        ldl     $1, TASK_EGID($2)
+        ldq     $3, TASK_CRED($2)
+        ldl     $0, CRED_GID($3)
+        ldl     $1, CRED_EGID($3)
         stq     $1, 80($sp)
         ret
 .end sys_getxgid
diff --git a/arch/alpha/kernel/init_task.c b/arch/alpha/kernel/init_task.c
index 1f762189fa64..c2938e574a40 100644
--- a/arch/alpha/kernel/init_task.c
+++ b/arch/alpha/kernel/init_task.c
@@ -8,7 +8,6 @@
 #include <asm/uaccess.h>
 
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index c626a821cdcb..703731accda6 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -50,12 +50,13 @@ int irq_select_affinity(unsigned int irq)
         if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq])
                 return 1;
 
-        while (!cpu_possible(cpu) || !cpu_isset(cpu, irq_default_affinity))
+        while (!cpu_possible(cpu) ||
+               !cpumask_test_cpu(cpu, irq_default_affinity))
                 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
         last_cpu = cpu;
 
         irq_desc[irq].affinity = cpumask_of_cpu(cpu);
-        irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu));
+        irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));
         return 0;
 }
 #endif /* CONFIG_SMP */
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 351407e07e71..f238370c907d 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -94,6 +94,7 @@ common_shutdown_1(void *generic_ptr)
                 flags |= 0x00040000UL; /* "remain halted" */
                 *pflags = flags;
                 cpu_clear(cpuid, cpu_present_map);
+                cpu_clear(cpuid, cpu_possible_map);
                 halt();
         }
 #endif
@@ -120,6 +121,7 @@ common_shutdown_1(void *generic_ptr)
 #ifdef CONFIG_SMP
         /* Wait for the secondaries to halt. */
         cpu_clear(boot_cpuid, cpu_present_map);
+        cpu_clear(boot_cpuid, cpu_possible_map);
         while (cpus_weight(cpu_present_map))
                 barrier();
 #endif
diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c
index a449e999027c..02bee6983ce2 100644
--- a/arch/alpha/kernel/setup.c
+++ b/arch/alpha/kernel/setup.c
@@ -79,6 +79,11 @@ int alpha_l3_cacheshape;
 unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON;
 #endif
 
+#ifdef CONFIG_NUMA
+struct cpumask node_to_cpumask_map[MAX_NUMNODES] __read_mostly;
+EXPORT_SYMBOL(node_to_cpumask_map);
+#endif
+
 /* Which processor we booted from.  */
 int boot_cpuid;
 
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index cf7da10097bb..d953e510f68d 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -70,11 +70,6 @@ enum ipi_message_type {
 /* Set to a secondary's cpuid when it comes online.  */
 static int smp_secondary_alive __devinitdata = 0;
 
-/* Which cpus ids came online.  */
-cpumask_t cpu_online_map;
-
-EXPORT_SYMBOL(cpu_online_map);
-
 int smp_num_probed;             /* Internal processor count */
 int smp_num_cpus = 1;           /* Number that came online.  */
 EXPORT_SYMBOL(smp_num_cpus);
@@ -440,6 +435,7 @@ setup_smp(void)
                                 ((char *)cpubase + i*hwrpb->processor_size);
                         if ((cpu->flags & 0x1cc) == 0x1cc) {
                                 smp_num_probed++;
+                                cpu_set(i, cpu_possible_map);
                                 cpu_set(i, cpu_present_map);
                                 cpu->pal_revision = boot_cpu_palrev;
                         }
@@ -473,6 +469,7 @@ smp_prepare_cpus(unsigned int max_cpus)
 
         /* Nothing to do on a UP box, or when told not to.  */
         if (smp_num_probed == 1 || max_cpus == 0) {
+                cpu_possible_map = cpumask_of_cpu(boot_cpuid);
                 cpu_present_map = cpumask_of_cpu(boot_cpuid);
                 printk(KERN_INFO "SMP mode deactivated.\n");
                 return;
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index c71b0fd7a61f..ab44c164d9d4 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -177,19 +177,19 @@ cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
 }
 
 static void
-dp264_set_affinity(unsigned int irq, cpumask_t affinity)
+dp264_set_affinity(unsigned int irq, const struct cpumask *affinity)
 { 
         spin_lock(&dp264_irq_lock);
-        cpu_set_irq_affinity(irq, affinity);
+        cpu_set_irq_affinity(irq, *affinity);
         tsunami_update_irq_hw(cached_irq_mask);
         spin_unlock(&dp264_irq_lock);
 }
 
 static void
-clipper_set_affinity(unsigned int irq, cpumask_t affinity)
+clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
 { 
         spin_lock(&dp264_irq_lock);
-        cpu_set_irq_affinity(irq - 16, affinity);
+        cpu_set_irq_affinity(irq - 16, *affinity);
         tsunami_update_irq_hw(cached_irq_mask);
         spin_unlock(&dp264_irq_lock);
 }
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index 52c91ccc1648..27f840a4ad3d 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -158,10 +158,10 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
 }
 
 static void
-titan_set_irq_affinity(unsigned int irq, cpumask_t affinity)
+titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
 { 
         spin_lock(&titan_irq_lock);
-        titan_cpu_set_irq_affinity(irq - 16, affinity);
+        titan_cpu_set_irq_affinity(irq - 16, *affinity);
         titan_update_irq_hw(titan_cached_irq_mask);
         spin_unlock(&titan_irq_lock);
 }
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9722f8bb506c..dbfdf87f993f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -156,7 +156,6 @@ config ARCH_MTD_XIP
         bool
 
 config GENERIC_HARDIRQS_NO__DO_IRQ
-        bool
         def_bool y
 
 if OPROFILE
@@ -201,6 +200,7 @@ choice
 
 config ARCH_AAEC2000
         bool "Agilent AAEC-2000 based"
+        select CPU_ARM920T
         select ARM_AMBA
         select HAVE_CLK
         help
@@ -210,6 +210,7 @@ config ARCH_INTEGRATOR
         bool "ARM Ltd. Integrator family"
         select ARM_AMBA
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ICST525
         help
           Support for ARM's Integrator platform.
@@ -218,6 +219,7 @@ config ARCH_REALVIEW
         bool "ARM Ltd. RealView family"
         select ARM_AMBA
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ICST307
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -229,6 +231,7 @@ config ARCH_VERSATILE
         select ARM_AMBA
         select ARM_VIC
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ICST307
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -243,22 +246,15 @@ config ARCH_AT91
           This enables support for systems based on the Atmel AT91RM9200,
           AT91SAM9 and AT91CAP9 processors.
 
-config ARCH_CLPS7500
-        bool "Cirrus CL-PS7500FE"
-        select TIMER_ACORN
-        select ISA
-        select NO_IOPORT
-        select ARCH_SPARSEMEM_ENABLE
-        help
-          Support for the Cirrus Logic PS7500FE system-on-a-chip.
-
 config ARCH_CLPS711X
         bool "Cirrus Logic CLPS711x/EP721x-based"
+        select CPU_ARM720T
         help
           Support for Cirrus Logic 711x/721x based boards.
 
 config ARCH_EBSA110
         bool "EBSA-110"
+        select CPU_SA110
         select ISA
         select NO_IOPORT
         help
@@ -269,16 +265,19 @@ config ARCH_EBSA110
 
 config ARCH_EP93XX
         bool "EP93xx-based"
+        select CPU_ARM920T
         select ARM_AMBA
         select ARM_VIC
         select GENERIC_GPIO
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ARCH_REQUIRE_GPIOLIB
         help
           This enables support for the Cirrus EP93xx series of CPUs.
 
 config ARCH_FOOTBRIDGE
         bool "FootBridge"
+        select CPU_SA110
         select FOOTBRIDGE
         help
           Support for systems based on the DC21285 companion chip
@@ -286,18 +285,23 @@ config ARCH_FOOTBRIDGE
 
 config ARCH_NETX
         bool "Hilscher NetX based"
+        select CPU_ARM926T
         select ARM_VIC
+        select GENERIC_CLOCKEVENTS
+        select GENERIC_TIME
         help
           This enables support for systems based on the Hilscher NetX Soc
 
 config ARCH_H720X
         bool "Hynix HMS720x-based"
+        select CPU_ARM720T
         select ISA_DMA_API
         help
           This enables support for systems based on the Hynix HMS720x
 
 config ARCH_IMX
         bool "IMX"
+        select CPU_ARM920T
         select GENERIC_GPIO
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -307,6 +311,7 @@ config ARCH_IMX
 config ARCH_IOP13XX
         bool "IOP13xx-based"
         depends on MMU
+        select CPU_XSC3
         select PLAT_IOP
         select PCI
         select ARCH_SUPPORTS_MSI
@@ -317,6 +322,7 @@ config ARCH_IOP13XX
 config ARCH_IOP32X
         bool "IOP32x-based"
         depends on MMU
+        select CPU_XSCALE
         select PLAT_IOP
         select PCI
         select GENERIC_GPIO
@@ -328,6 +334,7 @@ config ARCH_IOP32X
 config ARCH_IOP33X
         bool "IOP33x-based"
         depends on MMU
+        select CPU_XSCALE
         select PLAT_IOP
         select PCI
         select GENERIC_GPIO
@@ -338,6 +345,7 @@ config ARCH_IOP33X
 config ARCH_IXP23XX
         bool "IXP23XX-based"
         depends on MMU
+        select CPU_XSC3
         select PCI
         help
           Support for Intel's IXP23xx (XScale) family of processors.
@@ -345,6 +353,7 @@ config ARCH_IXP23XX
 config ARCH_IXP2000
         bool "IXP2400/2800-based"
         depends on MMU
+        select CPU_XSCALE
         select PCI
         help
           Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -352,6 +361,7 @@ config ARCH_IXP2000
 config ARCH_IXP4XX
         bool "IXP4xx-based"
         depends on MMU
+        select CPU_XSCALE
         select GENERIC_GPIO
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -361,6 +371,7 @@ config ARCH_IXP4XX
 
 config ARCH_L7200
         bool "LinkUp-L7200"
+        select CPU_ARM720T
         select FIQ
         help
           Say Y here if you intend to run this kernel on a LinkUp Systems
@@ -374,7 +385,9 @@ config ARCH_L7200
 
 config ARCH_KIRKWOOD
         bool "Marvell Kirkwood"
+        select CPU_FEROCEON
         select PCI
+        select GENERIC_GPIO
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select PLAT_ORION
@@ -384,13 +397,16 @@ config ARCH_KIRKWOOD
 
 config ARCH_KS8695
         bool "Micrel/Kendin KS8695"
+        select CPU_ARM922T
         select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         help
           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
           System-on-Chip devices.
 
 config ARCH_NS9XXX
         bool "NetSilicon NS9xxx"
+        select CPU_ARM926T
         select GENERIC_GPIO
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -403,6 +419,7 @@ config ARCH_NS9XXX
 
 config ARCH_LOKI
         bool "Marvell Loki (88RC8480)"
+        select CPU_FEROCEON
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select PLAT_ORION
@@ -411,7 +428,9 @@ config ARCH_LOKI
 
 config ARCH_MV78XX0
         bool "Marvell MV78xx0"
+        select CPU_FEROCEON
         select PCI
+        select GENERIC_GPIO
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select PLAT_ORION
@@ -432,6 +451,7 @@ config ARCH_MXC
 config ARCH_ORION5X
         bool "Marvell Orion"
         depends on MMU
+        select CPU_FEROCEON
         select PCI
         select GENERIC_GPIO
         select GENERIC_TIME
@@ -444,6 +464,7 @@ config ARCH_ORION5X
 
 config ARCH_PNX4008
         bool "Philips Nexperia PNX4008 Mobile"
+        select CPU_ARM926T
         select HAVE_CLK
         help
           This enables support for Philips PNX4008 mobile platform.
@@ -454,6 +475,7 @@ config ARCH_PXA
         select ARCH_MTD_XIP
         select GENERIC_GPIO
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -477,6 +499,7 @@ config ARCH_RPC
 
 config ARCH_SA1100
         bool "SA1100-based"
+        select CPU_SA1100
         select ISA
         select ARCH_SPARSEMEM_ENABLE
         select ARCH_MTD_XIP
@@ -498,8 +521,16 @@ config ARCH_S3C2410
           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
           the Samsung SMDK2410 development board (and derivatives).
 
+config ARCH_S3C64XX
+        bool "Samsung S3C64XX"
+        select GENERIC_GPIO
+        select HAVE_CLK
+        help
+          Samsung S3C64XX series based systems
+
 config ARCH_SHARK
         bool "Shark"
+        select CPU_SA110
         select ISA
         select ISA_DMA
         select ZONE_DMA
@@ -510,6 +541,7 @@ config ARCH_SHARK
 
 config ARCH_LH7A40X
         bool "Sharp LH7A40X"
+        select CPU_ARM922T
         select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
         select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
         help
@@ -520,6 +552,7 @@ config ARCH_LH7A40X
 
 config ARCH_DAVINCI
         bool "TI DaVinci"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select GENERIC_GPIO
@@ -541,6 +574,7 @@ config ARCH_OMAP
 
 config ARCH_MSM
         bool "Qualcomm MSM"
+        select CPU_V6
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         help
@@ -549,6 +583,13 @@ config ARCH_MSM
           interface to the ARM9 modem processor which runs the baseband stack
           and controls some vital subsystems (clock and power control, etc).
 
+config ARCH_W90X900
+        bool "Nuvoton W90X900 CPU"
+        select CPU_ARM926T
+        help
+                Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
+                can login www.mcuos.com or www.nuvoton.com to know more.
+
 endchoice
 
 source "arch/arm/mach-clps711x/Kconfig"
@@ -590,6 +631,7 @@ source "arch/arm/mach-orion5x/Kconfig"
 source "arch/arm/mach-kirkwood/Kconfig"
 
 source "arch/arm/plat-s3c24xx/Kconfig"
+source "arch/arm/plat-s3c64xx/Kconfig"
 source "arch/arm/plat-s3c/Kconfig"
 
 if ARCH_S3C2410
@@ -601,6 +643,11 @@ source "arch/arm/mach-s3c2442/Kconfig"
 source "arch/arm/mach-s3c2443/Kconfig"
 endif
 
+if ARCH_S3C64XX
+source "arch/arm/mach-s3c6400/Kconfig"
+source "arch/arm/mach-s3c6410/Kconfig"
+endif
+
 source "arch/arm/mach-lh7a40x/Kconfig"
 
 source "arch/arm/mach-imx/Kconfig"
@@ -627,6 +674,8 @@ source "arch/arm/mach-ks8695/Kconfig"
 
 source "arch/arm/mach-msm/Kconfig"
 
+source "arch/arm/mach-w90x900/Kconfig"
+
 # Definitions to make life easier
 config ARCH_ACORN
         bool
@@ -781,7 +830,7 @@ config HOTPLUG_CPU
 
 config LOCAL_TIMERS
         bool "Use local timer interrupts"
-        depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
+        depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
         default y
         help
           Enable support for local timers on SMP platforms, rather then the
@@ -1276,6 +1325,8 @@ source "drivers/regulator/Kconfig"
 
 source "drivers/uio/Kconfig"
 
+source "drivers/staging/Kconfig"
+
 endmenu
 
 source "fs/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bd6e28115ebb..24e0f0187697 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -76,6 +76,7 @@ tune-$(CONFIG_CPU_SA110)	:=-mtune=strongarm110
 tune-$(CONFIG_CPU_SA1100)       :=-mtune=strongarm1100
 tune-$(CONFIG_CPU_XSCALE)       :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
 tune-$(CONFIG_CPU_XSC3)         :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
+tune-$(CONFIG_CPU_FEROCEON)     :=$(call cc-option,-mtune=marvell-f,-mtune=xscale)
 tune-$(CONFIG_CPU_V6)           :=$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
 
 ifeq ($(CONFIG_AEABI),y)
@@ -96,7 +97,6 @@ textofs-y	:= 0x00008000
 
  machine-$(CONFIG_ARCH_RPC)        := rpc
  machine-$(CONFIG_ARCH_EBSA110)    := ebsa110
- machine-$(CONFIG_ARCH_CLPS7500)   := clps7500
  machine-$(CONFIG_FOOTBRIDGE)      := footbridge
  machine-$(CONFIG_ARCH_SHARK)      := shark
  machine-$(CONFIG_ARCH_SA1100)     := sa1100
@@ -121,7 +121,10 @@ endif
  machine-$(CONFIG_ARCH_OMAP3)      := omap2
     plat-$(CONFIG_ARCH_OMAP)       := omap
  machine-$(CONFIG_ARCH_S3C2410)    := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
+ machine-$(CONFIG_ARCH_S3C24A0)    := s3c24a0
     plat-$(CONFIG_PLAT_S3C24XX)    := s3c24xx s3c
+ machine-$(CONFIG_ARCH_S3C64XX)    := s3c6400 s3c6410
+    plat-$(CONFIG_PLAT_S3C64XX)    := s3c64xx s3c
  machine-$(CONFIG_ARCH_LH7A40X)    := lh7a40x
  machine-$(CONFIG_ARCH_VERSATILE)  := versatile
  machine-$(CONFIG_ARCH_IMX)        := imx
@@ -139,11 +142,13 @@ endif
     plat-$(CONFIG_ARCH_MXC)        := mxc
  machine-$(CONFIG_ARCH_MX2)        := mx2
  machine-$(CONFIG_ARCH_MX3)        := mx3
+ machine-$(CONFIG_ARCH_MX1)        := mx1
  machine-$(CONFIG_ARCH_ORION5X)    := orion5x
     plat-$(CONFIG_PLAT_ORION)      := orion
  machine-$(CONFIG_ARCH_MSM)        := msm
  machine-$(CONFIG_ARCH_LOKI)       := loki
  machine-$(CONFIG_ARCH_MV78XX0)    := mv78xx0
+ machine-$(CONFIG_ARCH_W90X900)    := w90x900
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index c47f2a3f8f8f..fbe5eef1f6c9 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
 OBJS            += head-l7200.o
 endif
 
-ifeq ($(CONFIG_ARCH_CLPS7500),y)
-HEAD            = head-clps7500.o
-endif
-
 ifeq ($(CONFIG_ARCH_P720T),y)
 # Borrow this code from SA1100
 OBJS            += head-sa1100.o
diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S
deleted file mode 100644
index 4f3c78ac30a0..000000000000
--- a/arch/arm/boot/compressed/head-clps7500.S
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-clps7500.S
- *
- * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
- */
-
-
-                /* There are three different ways the kernel can be
-                   booted on a 7500 system: from Angel (loaded in RAM), from
-                   16-bit ROM or from 32-bit Flash.  Luckily, a single kernel
-                   image does for them all. */
-                /* This branch is taken if the CPU memory width matches the
-                   actual device in use.  The default at power on is 16 bits
-                   so we must be prepared for a mismatch. */
-                .section ".start", "ax"
-2:
-                b       1f
-                .word   0xffff
-                .word   0xb632          @ mov r11, #0x03200000
-                .word   0xe3a0
-                .word   0x0000          @ mov r0, #0
-                .word   0xe3a0
-                .word   0x0080          @ strb r0, [r11, #0x80]
-                .word   0xe5cb
-                .word   0xf000          @ mov pc, #0
-                .word   0xe3a0
-1:
-                adr     r1, 2b
-                teq     r1, #0
-                bne     .Langel
-                /* This is a direct-from-ROM boot.  Copy the kernel into 
-                   RAM and run it there. */
-                mov     r0, #0x30
-                mcr     p15, 0, r0, c1, c0, 0
-                mov     r0, #0x13
-                msr     cpsr_cxsf, r0
-                mov     r12, #0x03000000        @ point to LEDs
-                orr     r12, r12, #0x00020000
-                orr     r12, r12, #0xba00
-                mov     r0, #0x5500
-                str     r0, [r12]
-                mov     r0, #0x10000000
-                orr     r0, r0, #0x8000
-                mov     r4, r0
-                ldr     r2, =_end
-2:
-                ldr     r3, [r1], #4
-                str     r3, [r0], #4
-                teq     r0, r2
-                bne     2b
-                mov     r0, #0xff00
-                str     r0, [r12]
-1:      
-                mov     r12, #0x03000000        @ point to LEDs
-                orr     r12, r12, #0x00020000
-                orr     r12, r12, #0xba00
-                mov     r0, #0xfe00
-                str     r0, [r12]
-
-                adr     lr, 1f
-                mov     r0, #0
-                mov     r1, #14         /* MACH_TYPE_CLPS7500 */
-                mov     pc, lr
-.Langel:
-#ifdef CONFIG_ANGELBOOT
-                /* Call Angel to switch into SVC mode. */
-                mov     r0, #0x17
-                swi     0x123456
-#endif
-                /* Ensure all interrupts are off and MMU disabled */
-                mrs     r0, cpsr
-                orr     r0, r0, #0xc0
-                msr     cpsr_cxsf, r0
-
-                adr     lr, 1b
-                orr     lr, lr, #0x10000000
-                mov     r0, #0x30               @ MMU off
-                mcr     p15, 0, r0, c1, c0, 0
-                mov     r0, r0
-                mov     pc, lr
-
-                .ltorg
-
-1:
-/* And the rest */
-#include "head.S"
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 84a1e0496a3c..77d614232d81 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -624,6 +624,12 @@ proc_types:
                 b       __armv4_mmu_cache_off
                 b       __armv4_mmu_cache_flush
 
+                .word   0x56056930
+                .word   0xff0ffff0              @ PXA935
+                b       __armv4_mmu_cache_on
+                b       __armv4_mmu_cache_off
+                b       __armv4_mmu_cache_flush
+
                 .word   0x56050000              @ Feroceon
                 .word   0xff0f0000
                 b       __armv4_mmu_cache_on
@@ -717,6 +723,9 @@ __armv7_mmu_cache_off:
                 bl      __armv7_mmu_cache_flush
                 mov     r0, #0
                 mcr     p15, 0, r0, c8, c7, 0   @ invalidate whole TLB
+                mcr     p15, 0, r0, c7, c5, 6   @ invalidate BTC
+                mcr     p15, 0, r0, c7, c10, 4  @ DSB
+                mcr     p15, 0, r0, c7, c5, 4   @ ISB
                 mov     pc, r12
 
 __arm6_mmu_cache_off:
@@ -778,12 +787,13 @@ __armv6_mmu_cache_flush:
 __armv7_mmu_cache_flush:
                 mrc     p15, 0, r10, c0, c1, 5  @ read ID_MMFR1
                 tst     r10, #0xf << 16         @ hierarchical cache (ARMv7)
-                beq     hierarchical
                 mov     r10, #0
+                beq     hierarchical
                 mcr     p15, 0, r10, c7, c14, 0 @ clean+invalidate D
                 b       iflush
 hierarchical:
-                stmfd   sp!, {r0-r5, r7, r9-r11}
+                mcr     p15, 0, r10, c7, c10, 5 @ DMB
+                stmfd   sp!, {r0-r5, r7, r9, r11}
                 mrc     p15, 1, r0, c0, c0, 1   @ read clidr
                 ands    r3, r0, #0x7000000      @ extract loc from clidr
                 mov     r3, r3, lsr #23         @ left align loc bit field
@@ -820,12 +830,14 @@ skip:
                 cmp     r3, r10
                 bgt     loop1
 finished:
+                ldmfd   sp!, {r0-r5, r7, r9, r11}
                 mov     r10, #0                 @ swith back to cache level 0
                 mcr     p15, 2, r10, c0, c0, 0  @ select current cache level in cssr
-                ldmfd   sp!, {r0-r5, r7, r9-r11}
 iflush:
+                mcr     p15, 0, r10, c7, c10, 4 @ DSB
                 mcr     p15, 0, r10, c7, c5, 0  @ invalidate I+BTB
-                mcr     p15, 0, r10, c7, c10, 4 @ drain WB
+                mcr     p15, 0, r10, c7, c10, 4 @ DSB
+                mcr     p15, 0, r10, c7, c5, 4  @ ISB
                 mov     pc, lr
 
 __armv5tej_mmu_cache_flush:
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 65ce8fff29db..3fc08413fff0 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -86,6 +86,8 @@ static void putstr(const char *ptr)
 
 #define __ptr_t void *
 
+#define memzero(s,n) __memzero(s,n)
+
 /*
  * Optimised C version of memzero for the ARM.
  */
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 86b5e6982660..a2cd9beaf37d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -33,3 +33,6 @@ config SHARPSL_PM
 
 config SHARP_SCOOP
         bool
+
+config COMMON_CLKDEV
+        bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 325e4b6a6afb..7cb7961d81cb 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o
 obj-$(CONFIG_ARCH_IXP2000)      += uengine.o
 obj-$(CONFIG_ARCH_IXP23XX)      += uengine.o
 obj-$(CONFIG_PCI_HOST_ITE8152)  += it8152.o
+obj-$(CONFIG_COMMON_CLKDEV)     += clkdev.o
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c
new file mode 100644
index 000000000000..17a17b49a45b
--- /dev/null
+++ b/arch/arm/common/clkdev.c
@@ -0,0 +1,128 @@
+/*
+ *  arch/arm/common/clkdev.c
+ *
+ *  Copyright (C) 2008 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Helper for the clk API to assist looking up a struct clk.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/mutex.h>
+
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+
+static struct clk *clk_find(const char *dev_id, const char *con_id)
+{
+        struct clk_lookup *p;
+        struct clk *clk = NULL;
+        int match, best = 0;
+
+        list_for_each_entry(p, &clocks, node) {
+                if ((p->dev_id && !dev_id) || (p->con_id && !con_id))
+                        continue;
+                match = 0;
+                if (p->dev_id)
+                        match += 2 * (strcmp(p->dev_id, dev_id) == 0);
+                if (p->con_id)
+                        match += 1 * (strcmp(p->con_id, con_id) == 0);
+                if (match == 0)
+                        continue;
+
+                if (match > best) {
+                        clk = p->clk;
+                        best = match;
+                }
+        }
+        return clk;
+}
+
+struct clk *clk_get(struct device *dev, const char *con_id)
+{
+        const char *dev_id = dev ? dev_name(dev) : NULL;
+        struct clk *clk;
+
+        mutex_lock(&clocks_mutex);
+        clk = clk_find(dev_id, con_id);
+        if (clk && !__clk_get(clk))
+                clk = NULL;
+        mutex_unlock(&clocks_mutex);
+
+        return clk ? clk : ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+        __clk_put(clk);
+}
+EXPORT_SYMBOL(clk_put);
+
+void clkdev_add(struct clk_lookup *cl)
+{
+        mutex_lock(&clocks_mutex);
+        list_add_tail(&cl->node, &clocks);
+        mutex_unlock(&clocks_mutex);
+}
+EXPORT_SYMBOL(clkdev_add);
+
+#define MAX_DEV_ID      20
+#define MAX_CON_ID      16
+
+struct clk_lookup_alloc {
+        struct clk_lookup cl;
+        char    dev_id[MAX_DEV_ID];
+        char    con_id[MAX_CON_ID];
+};
+
+struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
+        const char *dev_fmt, ...)
+{
+        struct clk_lookup_alloc *cla;
+
+        cla = kzalloc(sizeof(*cla), GFP_KERNEL);
+        if (!cla)
+                return NULL;
+
+        cla->cl.clk = clk;
+        if (con_id) {
+                strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
+                cla->cl.con_id = cla->con_id;
+        }
+
+        if (dev_fmt) {
+                va_list ap;
+
+                va_start(ap, dev_fmt);
+                vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
+                cla->cl.dev_id = cla->dev_id;
+                va_end(ap);
+        }
+
+        return &cla->cl;
+}
+EXPORT_SYMBOL(clkdev_alloc);
+
+/*
+ * clkdev_drop - remove a clock dynamically allocated
+ */
+void clkdev_drop(struct clk_lookup *cl)
+{
+        mutex_lock(&clocks_mutex);
+        list_del(&cl->node);
+        mutex_unlock(&clocks_mutex);
+        kfree(cl);
+}
+EXPORT_SYMBOL(clkdev_drop);
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 7fc9860a97d7..c6884ba1d5ed 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -109,11 +109,11 @@ static void gic_unmask_irq(unsigned int irq)
 }
 
 #ifdef CONFIG_SMP
-static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
+static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
 {
         void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
         unsigned int shift = (irq % 4) * 8;
-        unsigned int cpu = first_cpu(mask_val);
+        unsigned int cpu = cpumask_first(mask_val);
         u32 val;
 
         spin_lock(&irq_controller_lock);
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 7c6b4b99a2df..2293f0ce061e 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -1108,6 +1108,7 @@ void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf)
         locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS);
         spin_unlock_irqrestore(&lchip->lock, flags);
 }
+EXPORT_SYMBOL(locomo_frontlight_set);
 
 /*
  *      LoCoMo "Register Access Bus."
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index f1e4b8f60cab..ecf0bfbab107 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -69,12 +69,12 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
         /*
          * Make sure we clear all existing interrupts
          */
-        writel(0, base + VIC_VECT_ADDR);
+        writel(0, base + VIC_PL190_VECT_ADDR);
         for (i = 0; i < 19; i++) {
                 unsigned int value;
 
-                value = readl(base + VIC_VECT_ADDR);
-                writel(value, base + VIC_VECT_ADDR);
+                value = readl(base + VIC_PL190_VECT_ADDR);
+                writel(value, base + VIC_PL190_VECT_ADDR);
         }
 
         for (i = 0; i < 16; i++) {
@@ -82,7 +82,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
                 writel(VIC_VECT_CNTL_ENABLE | i, reg);
         }
 
-        writel(32, base + VIC_DEF_VECT_ADDR);
+        writel(32, base + VIC_PL190_DEF_VECT_ADDR);
 
         for (i = 0; i < 32; i++) {
                 unsigned int irq = irq_start + i;
diff --git a/arch/arm/configs/eseries_pxa_defconfig b/arch/arm/configs/eseries_pxa_defconfig
index 2307587a38a9..b6c5cbbf4c85 100644
--- a/arch/arm/configs/eseries_pxa_defconfig
+++ b/arch/arm/configs/eseries_pxa_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.26
-# Sat Jul 26 22:28:46 2008
+# Linux kernel version: 2.6.28-rc8
+# Wed Dec 24 23:35:45 2008
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ARCH_SUPPORTS_AOUT=y
-CONFIG_ZONE_DMA=y
 CONFIG_ARCH_MTD_XIP=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
@@ -48,8 +46,7 @@ CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
@@ -58,13 +55,12 @@ CONFIG_SYSCTL=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_KALLSYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-CONFIG_COMPAT_BRK=y
+# CONFIG_COMPAT_BRK is not set
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_ANON_INODES=y
@@ -73,6 +69,7 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
@@ -80,15 +77,10 @@ CONFIG_SLAB=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
-# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
-# CONFIG_HAVE_IOREMAP_PROT is not set
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
-# CONFIG_HAVE_ARCH_TRACEHOOK is not set
-# CONFIG_HAVE_DMA_ATTRS is not set
-# CONFIG_USE_GENERIC_SMP_HELPERS is not set
 CONFIG_HAVE_CLK=y
-CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
@@ -112,14 +104,15 @@ CONFIG_BLOCK=y
 #
 CONFIG_IOSCHED_NOOP=y
 CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
 CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_DEADLINE is not set
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
 CONFIG_CLASSIC_RCU=y
+CONFIG_FREEZER=y
 
 #
 # System Type
@@ -129,7 +122,6 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
@@ -160,7 +152,8 @@ CONFIG_ARCH_PXA=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM7X00A is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
 
 #
 # Intel PXA2xx/PXA3xx Implementations
@@ -169,8 +162,10 @@ CONFIG_ARCH_PXA=y
 # CONFIG_ARCH_LUBBOCK is not set
 # CONFIG_MACH_LOGICPD_PXA270 is not set
 # CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_MP900C is not set
 # CONFIG_ARCH_PXA_IDP is not set
 # CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_VIPER is not set
 CONFIG_ARCH_PXA_ESERIES=y
 CONFIG_MACH_E330=y
 CONFIG_MACH_E350=y
@@ -178,7 +173,8 @@ CONFIG_MACH_E740=y
 CONFIG_MACH_E750=y
 CONFIG_MACH_E400=y
 CONFIG_MACH_E800=y
-# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_H5000 is not set
 # CONFIG_MACH_EM_X270 is not set
 # CONFIG_MACH_COLIBRI is not set
 # CONFIG_MACH_ZYLONITE is not set
@@ -186,12 +182,15 @@ CONFIG_MACH_E800=y
 # CONFIG_MACH_TAVOREVB is not set
 # CONFIG_MACH_SAAR is not set
 # CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_CM_X300 is not set
 # CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
 # CONFIG_MACH_PCM027 is not set
 # CONFIG_ARCH_PXA_PALM is not set
 # CONFIG_PXA_EZX is not set
 CONFIG_PXA25x=y
 # CONFIG_PXA_PWM is not set
+CONFIG_PXA_HAVE_BOARD_IRQS=y
 
 #
 # Boot options
@@ -222,6 +221,7 @@ CONFIG_CPU_CP15_MMU=y
 # CONFIG_OUTER_CACHE is not set
 CONFIG_IWMMXT=y
 CONFIG_XSCALE_PMU=y
+CONFIG_COMMON_CLKDEV=y
 
 #
 # Bus support
@@ -237,6 +237,7 @@ CONFIG_PCMCIA_IOCTL=y
 #
 # PC-card bridges
 #
+CONFIG_PCMCIA_PXA2XX=m
 
 #
 # Kernel Features
@@ -245,25 +246,30 @@ CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=100
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4096
 # CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BOUNCE=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
 CONFIG_ALIGNMENT_TRAP=y
 
 #
@@ -277,9 +283,10 @@ CONFIG_KEXEC=y
 CONFIG_ATAGS_PROC=y
 
 #
-# CPU Frequency scaling
+# CPU Power Management
 #
 # CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -296,6 +303,8 @@ CONFIG_FPE_NWFPE=y
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_MISC=y
 
@@ -309,10 +318,6 @@ CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
-
-#
-# Networking
-#
 CONFIG_NET=y
 
 #
@@ -339,7 +344,7 @@ CONFIG_IP_FIB_HASH=y
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_XFRM_TUNNEL is not set
-CONFIG_INET_TUNNEL=y
+# CONFIG_INET_TUNNEL is not set
 CONFIG_INET_XFRM_MODE_TRANSPORT=y
 CONFIG_INET_XFRM_MODE_TUNNEL=y
 CONFIG_INET_XFRM_MODE_BEET=y
@@ -350,25 +355,7 @@ CONFIG_INET_TCP_DIAG=y
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
-CONFIG_IPV6=y
-# CONFIG_IPV6_PRIVACY is not set
-# CONFIG_IPV6_ROUTER_PREF is not set
-# CONFIG_IPV6_OPTIMISTIC_DAD is not set
-# CONFIG_INET6_AH is not set
-# CONFIG_INET6_ESP is not set
-# CONFIG_INET6_IPCOMP is not set
-# CONFIG_IPV6_MIP6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-CONFIG_INET6_XFRM_MODE_TRANSPORT=y
-CONFIG_INET6_XFRM_MODE_TUNNEL=y
-CONFIG_INET6_XFRM_MODE_BEET=y
-# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
-CONFIG_IPV6_SIT=y
-CONFIG_IPV6_NDISC_NODETYPE=y
-# CONFIG_IPV6_TUNNEL is not set
-# CONFIG_IPV6_MULTIPLE_TABLES is not set
-# CONFIG_IPV6_MROUTE is not set
+# CONFIG_IPV6 is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
@@ -376,6 +363,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -421,25 +409,18 @@ CONFIG_IRDA_FAST_RR=y
 #
 # Dongle support
 #
-# CONFIG_KINGSUN_DONGLE is not set
-# CONFIG_KSDAZZLE_DONGLE is not set
-# CONFIG_KS959_DONGLE is not set
 
 #
 # FIR device drivers
 #
-# CONFIG_USB_IRDA is not set
-# CONFIG_SIGMATEL_FIR is not set
 CONFIG_PXA_FICP=y
-# CONFIG_MCS_FIR is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
 CONFIG_CFG80211=m
 CONFIG_NL80211=y
+CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
 CONFIG_MAC80211=m
@@ -448,7 +429,9 @@ CONFIG_MAC80211=m
 # Rate control algorithm selection
 #
 CONFIG_MAC80211_RC_PID=y
+# CONFIG_MAC80211_RC_MINSTREL is not set
 CONFIG_MAC80211_RC_DEFAULT_PID=y
+# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
 CONFIG_MAC80211_RC_DEFAULT="pid"
 # CONFIG_MAC80211_MESH is not set
 # CONFIG_MAC80211_LEDS is not set
@@ -539,11 +522,12 @@ CONFIG_MTD_NAND=m
 # CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
 CONFIG_MTD_NAND_IDS=m
 # CONFIG_MTD_NAND_DISKONCHIP is not set
 # CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_TMIO=m
 # CONFIG_MTD_NAND_PLATFORM is not set
-# CONFIG_MTD_ALAUDA is not set
 # CONFIG_MTD_ONENAND is not set
 
 #
@@ -556,13 +540,13 @@ CONFIG_BLK_DEV=y
 CONFIG_BLK_DEV_LOOP=m
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_UB is not set
 # CONFIG_BLK_DEV_RAM is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
 CONFIG_MISC_DEVICES=y
 # CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -632,37 +616,25 @@ CONFIG_NETDEVICES=y
 CONFIG_WLAN_80211=y
 # CONFIG_PCMCIA_RAYCS is not set
 # CONFIG_LIBERTAS is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
 CONFIG_HERMES=m
 CONFIG_PCMCIA_HERMES=m
 # CONFIG_PCMCIA_SPECTRUM is not set
 # CONFIG_ATMEL is not set
 # CONFIG_AIRO_CS is not set
 # CONFIG_PCMCIA_WL3501 is not set
-# CONFIG_USB_ZD1201 is not set
-# CONFIG_USB_NET_RNDIS_WLAN is not set
-# CONFIG_RTL8187 is not set
 # CONFIG_MAC80211_HWSIM is not set
 # CONFIG_P54_COMMON is not set
 # CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_HOSTAP is not set
 # CONFIG_B43 is not set
 # CONFIG_B43LEGACY is not set
-# CONFIG_ZD1211RW is not set
 # CONFIG_RT2X00 is not set
-
-#
-# USB Network Adapters
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
 CONFIG_NET_PCMCIA=y
 # CONFIG_PCMCIA_3C589 is not set
 # CONFIG_PCMCIA_3C574 is not set
 # CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
+# CONFIG_PCMCIA_PCNET is not set
 # CONFIG_PCMCIA_NMCLAN is not set
 # CONFIG_PCMCIA_SMC91C92 is not set
 # CONFIG_PCMCIA_XIRC2PS is not set
@@ -714,13 +686,11 @@ CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_TOUCHSCREEN_PENMOUNT is not set
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_UCB1400 is not set
 CONFIG_TOUCHSCREEN_WM97XX=m
 CONFIG_TOUCHSCREEN_WM9705=y
 CONFIG_TOUCHSCREEN_WM9712=y
 CONFIG_TOUCHSCREEN_WM9713=y
 # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
-# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
 # CONFIG_INPUT_MISC is not set
 
@@ -749,11 +719,13 @@ CONFIG_DEVKMEM=y
 #
 # Non-8250 serial port support
 #
-# CONFIG_SERIAL_PXA is not set
+CONFIG_SERIAL_PXA=y
+# CONFIG_SERIAL_PXA_CONSOLE is not set
+CONFIG_SERIAL_CORE=y
 CONFIG_UNIX98_PTYS=y
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
-CONFIG_HW_RANDOM=m
+# CONFIG_HW_RANDOM is not set
 # CONFIG_NVRAM is not set
 # CONFIG_R3964 is not set
 
@@ -773,6 +745,10 @@ CONFIG_GPIOLIB=y
 # CONFIG_GPIO_SYSFS is not set
 
 #
+# Memory mapped GPIO expanders:
+#
+
+#
 # I2C GPIO expanders:
 #
 
@@ -786,12 +762,14 @@ CONFIG_GPIOLIB=y
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -799,8 +777,13 @@ CONFIG_SSB_POSSIBLE=y
 #
 CONFIG_MFD_CORE=y
 # CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+CONFIG_MFD_TMIO=y
+CONFIG_MFD_T7L66XB=y
+CONFIG_MFD_TC6387XB=y
 CONFIG_MFD_TC6393XB=y
 
 #
@@ -827,6 +810,7 @@ CONFIG_MFD_TC6393XB=y
 CONFIG_FB=y
 # CONFIG_FIRMWARE_EDID is not set
 # CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
@@ -851,8 +835,10 @@ CONFIG_FB_PXA=y
 # CONFIG_FB_PXA_PARAMETERS is not set
 # CONFIG_FB_MBX is not set
 CONFIG_FB_W100=y
-# CONFIG_FB_AM200EPD is not set
+# CONFIG_FB_TMIO is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 # CONFIG_LCD_ILI9320 is not set
@@ -886,6 +872,7 @@ CONFIG_FONT_MINI_4x6=y
 # CONFIG_FONT_10x18 is not set
 # CONFIG_LOGO is not set
 CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=m
 CONFIG_SND_TIMER=m
 CONFIG_SND_PCM=m
@@ -899,14 +886,18 @@ CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 CONFIG_SND_VERBOSE_PRINTK=y
 # CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=m
 CONFIG_SND_DRIVERS=y
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
 # CONFIG_SND_SERIAL_U16550 is not set
 # CONFIG_SND_MPU401 is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
 CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_LIB=m
+CONFIG_SND_PXA2XX_LIB_AC97=y
 # CONFIG_SND_PXA2XX_AC97 is not set
-# CONFIG_SND_USB is not set
 # CONFIG_SND_PCMCIA is not set
 CONFIG_SND_SOC=m
 CONFIG_SND_SOC_AC97_BUS=y
@@ -920,133 +911,19 @@ CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
 # CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
+# CONFIG_HID_PID is not set
 
 #
-# USB Input Devices
+# Special HID drivers
 #
-CONFIG_USB_HID=m
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
-# CONFIG_USB_HIDDEV is not set
-
-#
-# USB HID Boot Protocol drivers
-#
-# CONFIG_USB_KBD is not set
-# CONFIG_USB_MOUSE is not set
-CONFIG_USB_SUPPORT=y
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
-
-#
-# Miscellaneous USB options
-#
-# CONFIG_USB_DEVICEFS is not set
-CONFIG_USB_DEVICE_CLASS=y
-# CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_SUSPEND is not set
-# CONFIG_USB_OTG is not set
-# CONFIG_USB_OTG_WHITELIST is not set
-# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_C67X00_HCD is not set
-# CONFIG_USB_ISP116X_HCD is not set
-# CONFIG_USB_ISP1760_HCD is not set
-# CONFIG_USB_SL811_HCD is not set
-# CONFIG_USB_R8A66597_HCD is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_WDM is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# may also be needed; see USB_STORAGE Help for more information
-#
-# CONFIG_USB_STORAGE is not set
-# CONFIG_USB_LIBUSUAL is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_MICROTEK is not set
-CONFIG_USB_MON=y
-
-#
-# USB port drivers
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYPRESS_CY7C63 is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
-# CONFIG_USB_IDMOUSE is not set
-# CONFIG_USB_FTDI_ELAN is not set
-# CONFIG_USB_APPLEDISPLAY is not set
-# CONFIG_USB_LD is not set
-# CONFIG_USB_TRANCEVIBRATOR is not set
-# CONFIG_USB_IOWARRIOR is not set
-# CONFIG_USB_ISIGHTFW is not set
-CONFIG_USB_GADGET=y
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-CONFIG_USB_GADGET_SELECTED=y
-# CONFIG_USB_GADGET_AMD5536UDC is not set
-# CONFIG_USB_GADGET_ATMEL_USBA is not set
-# CONFIG_USB_GADGET_FSL_USB2 is not set
-# CONFIG_USB_GADGET_NET2280 is not set
-CONFIG_USB_GADGET_PXA25X=y
-CONFIG_USB_PXA25X=y
-CONFIG_USB_PXA25X_SMALL=y
-# CONFIG_USB_GADGET_M66592 is not set
-# CONFIG_USB_GADGET_PXA27X is not set
-# CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_OMAP is not set
-# CONFIG_USB_GADGET_S3C2410 is not set
-# CONFIG_USB_GADGET_AT91 is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_GADGET_DUALSPEED is not set
-# CONFIG_USB_ZERO is not set
-CONFIG_USB_ETH=m
-# CONFIG_USB_ETH_RNDIS is not set
-# CONFIG_USB_GADGETFS is not set
-# CONFIG_USB_FILE_STORAGE is not set
-# CONFIG_USB_G_SERIAL is not set
-# CONFIG_USB_MIDI_GADGET is not set
-# CONFIG_USB_G_PRINTER is not set
-# CONFIG_USB_CDC_COMPOSITE is not set
+CONFIG_HID_COMPAT=y
+# CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
 CONFIG_MMC_UNSAFE_RESUME=y
 
 #
-# MMC/SD Card Drivers
+# MMC/SD/SDIO Card Drivers
 #
 CONFIG_MMC_BLOCK=y
 CONFIG_MMC_BLOCK_BOUNCE=y
@@ -1054,14 +931,18 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # CONFIG_MMC_TEST is not set
 
 #
-# MMC/SD Host Controller Drivers
+# MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_PXA is not set
 # CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_TMIO=y
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
 CONFIG_RTC_LIB=y
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
+# CONFIG_REGULATOR is not set
 # CONFIG_UIO is not set
 
 #
@@ -1070,11 +951,17 @@ CONFIG_RTC_LIB=y
 CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=m
+CONFIG_FS_MBCACHE=m
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
 CONFIG_DNOTIFY=y
@@ -1106,6 +993,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 #
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
@@ -1142,6 +1030,7 @@ CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -1228,13 +1117,15 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
-CONFIG_HAVE_FTRACE=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-# CONFIG_FTRACE is not set
-# CONFIG_IRQSOFF_TRACER is not set
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_USER is not set
@@ -1244,15 +1135,23 @@ CONFIG_HAVE_ARCH_KGDB=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD2=m
 CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_RNG2=m
 CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=m
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
 # CONFIG_CRYPTO_CRYPTD is not set
@@ -1324,14 +1223,17 @@ CONFIG_CRYPTO_ARC4=m
 #
 # CONFIG_CRYPTO_DEFLATE is not set
 # CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_GENERIC_FIND_FIRST_BIT is not set
-# CONFIG_GENERIC_FIND_NEXT_BIT is not set
 CONFIG_CRC_CCITT=y
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
diff --git a/arch/arm/configs/h5000_defconfig b/arch/arm/configs/h5000_defconfig
new file mode 100644
index 000000000000..649baa370495
--- /dev/null
+++ b/arch/arm/configs/h5000_defconfig
@@ -0,0 +1,996 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc6
+# Tue Sep 16 16:13:48 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_UID16 is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+CONFIG_MACH_H5000=y
+# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA25x=y
+# CONFIG_PXA_PWM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+# CONFIG_IWMMXT is not set
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="keepinitrd"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PXA2XX is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_NETDEVICES is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=32
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+CONFIG_USB_GADGET_PXA25X=y
+CONFIG_USB_PXA25X=y
+CONFIG_USB_PXA25X_SMALL=y
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_ETH_RNDIS is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=y
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_LZO is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index e3357ba10f1f..ab8b1e0d0dac 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -1,11 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.26-rc5
-# Sun Jun 22 15:51:25 2008
+# Linux kernel version: 2.6.28-rc7
+# Thu Dec  4 15:27:39 2008
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_MMU=y
@@ -22,8 +22,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ARCH_SUPPORTS_AOUT=y
-CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
@@ -49,14 +48,17 @@ CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
-# CONFIG_NAMESPACES is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
 # CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
+# CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -73,9 +75,12 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
+CONFIG_PCI_QUIRKS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 # CONFIG_MARKERS is not set
@@ -85,8 +90,7 @@ CONFIG_KPROBES=y
 CONFIG_KRETPROBES=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
-# CONFIG_HAVE_DMA_ATTRS is not set
-CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
@@ -97,12 +101,13 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-# CONFIG_KMOD is not set
+CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
 # IO Schedulers
@@ -117,6 +122,7 @@ CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
 CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
 
 #
 # System Type
@@ -128,7 +134,6 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
@@ -158,7 +163,7 @@ CONFIG_ARCH_KIRKWOOD=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM7X00A is not set
+# CONFIG_ARCH_MSM is not set
 
 #
 # Marvell Kirkwood Implementations
@@ -199,6 +204,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_DCACHE_DISABLE is not set
 CONFIG_OUTER_CACHE=y
 CONFIG_CACHE_FEROCEON_L2=y
+# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
 
 #
 # Bus support
@@ -217,25 +223,30 @@ CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
 CONFIG_PREEMPT=y
 CONFIG_HZ=100
 CONFIG_AEABI=y
 # CONFIG_OABI_COMPAT is not set
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4096
 # CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BOUNCE=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
 CONFIG_ALIGNMENT_TRAP=y
 
 #
@@ -248,6 +259,11 @@ CONFIG_CMDLINE=""
 # CONFIG_KEXEC is not set
 
 #
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
 # Floating point emulation
 #
 
@@ -260,6 +276,8 @@ CONFIG_CMDLINE=""
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
 
@@ -268,10 +286,6 @@ CONFIG_BINFMT_ELF=y
 #
 # CONFIG_PM is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
-
-#
-# Networking
-#
 CONFIG_NET=y
 
 #
@@ -322,6 +336,15 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_TAG_DSA is not set
+CONFIG_NET_DSA_TAG_EDSA=y
+# CONFIG_NET_DSA_TAG_TRAILER is not set
+CONFIG_NET_DSA_MV88E6XXX=y
+# CONFIG_NET_DSA_MV88E6060 is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+# CONFIG_NET_DSA_MV88E6131 is not set
+CONFIG_NET_DSA_MV88E6123_61_65=y
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -343,12 +366,12 @@ CONFIG_NET_PKTGEN=m
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
 # CONFIG_MAC80211 is not set
 # CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
@@ -365,6 +388,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
 # CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
@@ -453,7 +478,7 @@ CONFIG_M25PXX_USE_FAST_READ=y
 # CONFIG_MTD_DOC2001 is not set
 # CONFIG_MTD_DOC2001PLUS is not set
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
 CONFIG_MTD_NAND_IDS=y
@@ -561,6 +586,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
 CONFIG_SATA_PMP=y
@@ -619,7 +645,6 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_SIS is not set
 # CONFIG_PATA_VIA is not set
 # CONFIG_PATA_WINBOND is not set
-# CONFIG_PATA_PLATFORM is not set
 # CONFIG_PATA_SCH is not set
 # CONFIG_MD is not set
 # CONFIG_FUSION is not set
@@ -627,11 +652,14 @@ CONFIG_SATA_MV=y
 #
 # IEEE 1394 (FireWire) support
 #
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
 # CONFIG_I2O is not set
 CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -639,7 +667,23 @@ CONFIG_NETDEVICES=y
 # CONFIG_TUN is not set
 # CONFIG_VETH is not set
 # CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=y
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 # CONFIG_AX88796 is not set
@@ -650,12 +694,16 @@ CONFIG_MII=y
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_SMC911X is not set
 # CONFIG_NET_TULIP is not set
 # CONFIG_HP100 is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
@@ -676,14 +724,12 @@ CONFIG_NET_PCI=y
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
 CONFIG_NETDEV_1000=y
 # CONFIG_ACENIC is not set
 # CONFIG_DL2K is not set
-CONFIG_E1000=y
-CONFIG_E1000_NAPI=y
-# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
+# CONFIG_E1000 is not set
 # CONFIG_E1000E is not set
-# CONFIG_E1000E_ENABLED is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
 # CONFIG_NS83820 is not set
@@ -699,6 +745,8 @@ CONFIG_E1000_NAPI=y
 CONFIG_MV643XX_ETH=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_JME is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 
@@ -765,7 +813,11 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 #
 # Character devices
 #
-# CONFIG_VT is not set
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
 # CONFIG_DEVKMEM is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 # CONFIG_NOZOMI is not set
@@ -775,7 +827,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 #
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_PCI=y
 CONFIG_SERIAL_8250_NR_UARTS=4
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
 # CONFIG_SERIAL_8250_EXTENDED is not set
@@ -800,44 +852,64 @@ CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
 CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
 
 #
 # I2C Hardware Bus support
 #
+
+#
+# PC SMBus host controller drivers
+#
 # CONFIG_I2C_ALI1535 is not set
 # CONFIG_I2C_ALI1563 is not set
 # CONFIG_I2C_ALI15X3 is not set
 # CONFIG_I2C_AMD756 is not set
 # CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_ISCH is not set
 # CONFIG_I2C_PIIX4 is not set
 # CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_I2C_SIMTEC is not set
 # CONFIG_I2C_SIS5595 is not set
 # CONFIG_I2C_SIS630 is not set
 # CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_TAOS_EVM is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_TINY_USB is not set
 # CONFIG_I2C_VIA is not set
 # CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_MV64XXX=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
 # CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
 # CONFIG_I2C_PCA_PLATFORM is not set
-CONFIG_I2C_MV64XXX=y
+# CONFIG_I2C_STUB is not set
 
 #
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
 # CONFIG_SENSORS_EEPROM is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
@@ -864,20 +936,26 @@ CONFIG_SPI_ORION=y
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
-# CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
 
 #
 # Multimedia devices
@@ -910,8 +988,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_DISPLAY_SUPPORT is not set
 
 #
-# Sound
+# Console display driver support
 #
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
@@ -922,9 +1002,36 @@ CONFIG_HID=y
 # USB Input Devices
 #
 CONFIG_USB_HID=y
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
+# CONFIG_HID_PID is not set
 # CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_BRIGHT=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DELL=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -940,8 +1047,9 @@ CONFIG_USB_DEVICEFS=y
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_OTG is not set
-# CONFIG_USB_OTG_WHITELIST is not set
-# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
 
 #
 # USB Host Controller Drivers
@@ -956,20 +1064,23 @@ CONFIG_USB_EHCI_TT_NEWSCHED=y
 # CONFIG_USB_UHCI_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
 
 #
 # USB Device Class drivers
 #
 # CONFIG_USB_ACM is not set
-CONFIG_USB_PRINTER=y
+CONFIG_USB_PRINTER=m
 # CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
 #
 
 #
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
@@ -992,7 +1103,6 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 #
 # CONFIG_USB_MDC800 is not set
 # CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_MON is not set
 
 #
 # USB port drivers
@@ -1005,7 +1115,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 # CONFIG_USB_EMI62 is not set
 # CONFIG_USB_EMI26 is not set
 # CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_SEVSEG is not set
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
@@ -1023,8 +1133,12 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+# CONFIG_UWB is not set
 # CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
 CONFIG_NEW_LEDS=y
 # CONFIG_LEDS_CLASS is not set
 
@@ -1038,6 +1152,8 @@ CONFIG_NEW_LEDS=y
 # CONFIG_LEDS_TRIGGERS is not set
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
 # CONFIG_RTC_DEBUG is not set
 
 #
@@ -1056,7 +1172,6 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_DS1374 is not set
 # CONFIG_RTC_DRV_DS1672 is not set
 # CONFIG_RTC_DRV_MAX6900 is not set
-CONFIG_RTC_DRV_MV=y
 # CONFIG_RTC_DRV_RS5C372 is not set
 # CONFIG_RTC_DRV_ISL1208 is not set
 # CONFIG_RTC_DRV_X1205 is not set
@@ -1064,29 +1179,39 @@ CONFIG_RTC_DRV_MV=y
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
 # CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
 
 #
 # SPI RTC drivers
 #
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
 # CONFIG_RTC_DRV_MAX6902 is not set
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
 
 #
 # Platform RTC drivers
 #
 # CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
 # CONFIG_RTC_DRV_DS1511 is not set
 # CONFIG_RTC_DRV_DS1553 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
 # on-CPU RTC drivers
 #
+CONFIG_RTC_DRV_MV=y
 CONFIG_DMADEVICES=y
 
 #
@@ -1099,6 +1224,8 @@ CONFIG_DMA_ENGINE=y
 # DMA Clients
 #
 # CONFIG_NET_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_REGULATOR is not set
 # CONFIG_UIO is not set
 
 #
@@ -1109,11 +1236,12 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
 CONFIG_XFS_FS=y
 # CONFIG_XFS_QUOTA is not set
 # CONFIG_XFS_POSIX_ACL is not set
@@ -1131,7 +1259,7 @@ CONFIG_INOTIFY_USER=y
 #
 # CD-ROM/DVD Filesystems
 #
-CONFIG_ISO9660_FS=y
+CONFIG_ISO9660_FS=m
 CONFIG_JOLIET=y
 # CONFIG_ZISOFS is not set
 CONFIG_UDF_FS=m
@@ -1140,9 +1268,9 @@ CONFIG_UDF_NLS=y
 #
 # DOS/FAT/NT Filesystems
 #
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
 CONFIG_FAT_DEFAULT_CODEPAGE=437
 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
@@ -1152,6 +1280,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 #
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
@@ -1182,6 +1311,7 @@ CONFIG_JFFS2_RTIME=y
 CONFIG_CRAMFS=y
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -1192,13 +1322,13 @@ CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -1210,24 +1340,8 @@ CONFIG_SUNRPC=y
 #
 # Partition Types
 #
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
+# CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_KARMA_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-# CONFIG_SYSV68_PARTITION is not set
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=y
@@ -1284,11 +1398,14 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
 # CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
-# CONFIG_DEBUG_SLAB is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
 # CONFIG_DEBUG_PREEMPT is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
@@ -1300,21 +1417,40 @@ CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_KPROBES_SANITY_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
@@ -1326,6 +1462,7 @@ CONFIG_DEBUG_LL=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 CONFIG_ASYNC_CORE=y
 CONFIG_CRYPTO=y
@@ -1333,8 +1470,12 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_AEAD=m
 CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_RNG=m
 CONFIG_CRYPTO_MANAGER=m
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
@@ -1373,6 +1514,10 @@ CONFIG_CRYPTO_PCBC=m
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
 # CONFIG_CRYPTO_SHA1 is not set
 # CONFIG_CRYPTO_SHA256 is not set
 # CONFIG_CRYPTO_SHA512 is not set
@@ -1403,6 +1548,11 @@ CONFIG_CRYPTO_PCBC=m
 #
 # CONFIG_CRYPTO_DEFLATE is not set
 # CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
 
@@ -1410,10 +1560,9 @@ CONFIG_CRYPTO_HW=y
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_GENERIC_FIND_FIRST_BIT is not set
-# CONFIG_GENERIC_FIND_NEXT_BIT is not set
 CONFIG_CRC_CCITT=y
 CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
 CONFIG_CRC_ITU_T=m
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
diff --git a/arch/arm/configs/ks8695_defconfig b/arch/arm/configs/ks8695_defconfig
index 6077f2cb88e4..d25c41bab06c 100644
--- a/arch/arm/configs/ks8695_defconfig
+++ b/arch/arm/configs/ks8695_defconfig
@@ -1,39 +1,67 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.17-rc4
-# Thu May 25 15:42:51 2006
+# Linux kernel version: 2.6.27-simtec-micrel1
+# Fri Dec  5 10:30:27 2008
 #
 CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_TIME is not set
+# CONFIG_GENERIC_CLOCKEVENTS is not set
 CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
-# Code maturity level options
+# General setup
 #
 CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
+# CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
 # CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
-CONFIG_UID16=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
 # CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -41,30 +69,50 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+# CONFIG_HAVE_CLK is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-CONFIG_OBSOLETE_INTERMODULE=y
-
-#
-# Loadable module support
-#
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_KMOD=y
-
-#
-# Block layer
-#
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
 # IO Schedulers
@@ -78,60 +126,77 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
 
 #
 # System Type
 #
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP3XX is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
 # CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+CONFIG_ARCH_KS8695=y
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_VERSATILE is not set
-# CONFIG_ARCH_REALVIEW is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_AAEC2000 is not set
-# CONFIG_ARCH_AT91 is not set
-CONFIG_ARCH_KS8695=y
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
 
 #
 # Kendin/Micrel KS8695 Implementations
 #
 CONFIG_MACH_KS8695=y
-# CONFIG_MACH_DSM320 is not set
-# CONFIG_MACH_CM4002 is not set
-# CONFIG_MACH_CM4008 is not set
-# CONFIG_MACH_CM40xx is not set
-# CONFIG_MACH_LITE300 is not set
-# CONFIG_MACH_SE4200 is not set
-# CONFIG_MACH_MANGA_KS8695 is not set
+CONFIG_MACH_DSM320=y
 
 #
 # Processor Type
 #
 CONFIG_CPU_32=y
 CONFIG_CPU_ARM922T=y
-CONFIG_CPU_32v4=y
+CONFIG_CPU_32v4T=y
 CONFIG_CPU_ABRT_EV4T=y
+CONFIG_CPU_PABRT_NOIFAR=y
 CONFIG_CPU_CACHE_V4WT=y
 CONFIG_CPU_CACHE_VIVT=y
 CONFIG_CPU_COPY_V4WB=y
 CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
 
 #
 # Processor Features
@@ -140,16 +205,16 @@ CONFIG_CPU_TLB_V4WBI=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_OUTER_CACHE is not set
 
 #
 # Bus support
 #
 CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
 CONFIG_PCI_DEBUG=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
 CONFIG_PCCARD=y
 # CONFIG_PCMCIA_DEBUG is not set
 CONFIG_PCMCIA=y
@@ -173,9 +238,12 @@ CONFIG_PCCARD_NONSTATIC=y
 #
 # Kernel Features
 #
+# CONFIG_TICK_ONESHOT is not set
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=100
-# CONFIG_AEABI is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
 # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
@@ -184,7 +252,14 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_LEDS is not set
 CONFIG_ALIGNMENT_TRAP=y
 
 #
@@ -194,6 +269,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw"
 # CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
 
 #
 # Floating point emulation
@@ -202,8 +278,7 @@ CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev
 #
 # At least one emulation must be selected
 #
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_NWFPE is not set
 # CONFIG_FPE_FASTFPE is not set
 
 #
@@ -212,34 +287,33 @@ CONFIG_FPE_NWFPE=y
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
 
 #
 # Power management options
 #
 # CONFIG_PM is not set
-# CONFIG_APM is not set
-
-#
-# Networking
-#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
 #
 # Networking options
 #
-# CONFIG_NETDEBUG is not set
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
@@ -250,28 +324,21 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
 # CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
 # CONFIG_IP_SCTP is not set
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -282,13 +349,8 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_ATALK is not set
 # CONFIG_X25 is not set
 # CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
 # CONFIG_NET_SCHED is not set
 
 #
@@ -296,9 +358,21 @@ CONFIG_TCP_CONG_BIC=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_MAC80211 is not set
 # CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 
 #
 # Device Drivers
@@ -307,36 +381,40 @@ CONFIG_TCP_CONG_BIC=y
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
 
 #
 # User Modules And Translation Layers
 #
 CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
 # CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 
 #
 # RAM/ROM/Flash chip drivers
@@ -355,22 +433,25 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
 CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
 
 #
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=4
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 # CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
 # CONFIG_MTD_PLATRAM is not set
 
 #
@@ -388,29 +469,15 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
 # CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
 # CONFIG_MTD_NAND is not set
-
-#
-# OneNAND Flash Device Drivers
-#
 # CONFIG_MTD_ONENAND is not set
 
 #
-# Parallel port support
+# UBI - Unsorted block images
 #
+# CONFIG_MTD_UBI is not set
 # CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
+CONFIG_BLK_DEV=y
 # CONFIG_BLK_CPQ_DA is not set
 # CONFIG_BLK_CPQ_CISS_DA is not set
 # CONFIG_BLK_DEV_DAC960 is not set
@@ -422,13 +489,17 @@ CONFIG_MTD_CFI_UTIL=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
+# CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
 #
@@ -436,127 +507,85 @@ CONFIG_BLK_DEV_INITRD=y
 #
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
 # CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
 # CONFIG_FUSION is not set
 
 #
 # IEEE 1394 (FireWire) support
 #
-# CONFIG_IEEE1394 is not set
 
 #
-# I2O device support
+# Enable only one of the two stacks, unless you know what you are doing
 #
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
 # CONFIG_I2O is not set
-
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
+# CONFIG_VETH is not set
 # CONFIG_ARCNET is not set
-
-#
-# PHY device support
-#
 # CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
 CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_ARM_KS8695_ETHER=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
 # CONFIG_HAPPYMEAL is not set
 # CONFIG_SUNGEM is not set
 # CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
-
-#
-# Tulip family network device support
-#
 # CONFIG_NET_TULIP is not set
 # CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
 # CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 
 #
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+# CONFIG_PCMCIA_RAYCS is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_HERMES is not set
+# CONFIG_ATMEL is not set
+# CONFIG_AIRO_CS is not set
+# CONFIG_PCMCIA_WL3501 is not set
+CONFIG_PRISM54=m
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_HOSTAP is not set
 # CONFIG_NET_PCMCIA is not set
-
-#
-# Wan interfaces
-#
 # CONFIG_WAN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
 # CONFIG_ISDN is not set
 
 #
 # Input device support
 #
 CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
 
 #
 # Userland interfaces
@@ -566,7 +595,6 @@ CONFIG_INPUT_MOUSEDEV=y
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
 # CONFIG_INPUT_EVDEV is not set
 # CONFIG_INPUT_EVBUG is not set
 
@@ -576,6 +604,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
 # CONFIG_INPUT_MISC is not set
 
@@ -589,9 +618,13 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Character devices
 #
 CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
 # CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
 
 #
 # Serial drivers
@@ -609,132 +642,113 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
 # CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
+CONFIG_HW_RANDOM=m
 # CONFIG_NVRAM is not set
-# CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
 
 #
-# Ftape, the floppy tape device driver
-#
-# CONFIG_DRM is not set
-
-#
 # PCMCIA character devices
 #
 # CONFIG_SYNCLINK_CS is not set
 # CONFIG_CARDMAN_4000 is not set
 # CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
 # CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
 # CONFIG_TCG_TPM is not set
-# CONFIG_TELCLOCK is not set
-
-#
-# I2C support
-#
+CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
-
-#
-# SPI support
-#
 # CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
 # CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
+# CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Misc devices
-#
+# CONFIG_WATCHDOG is not set
 
 #
-# LED devices
+# Sonics Silicon Backplane
 #
-# CONFIG_NEW_LEDS is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
 
 #
-# LED drivers
+# Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
 
 #
-# LED Triggers
+# Multimedia devices
 #
 
 #
-# Multimedia devices
+# Multimedia core support
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
 
 #
-# Digital Video Broadcasting Devices
+# Multimedia drivers
 #
-# CONFIG_DVB is not set
+# CONFIG_DAB is not set
 
 #
 # Graphics support
 #
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 # CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
-# Console display driver support
+# Display device support
 #
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
+# CONFIG_DISPLAY_SUPPORT is not set
 
 #
-# Sound
+# Console display driver support
 #
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
-
-#
-# USB support
-#
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
 CONFIG_USB_ARCH_HAS_EHCI=y
 # CONFIG_USB is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# Enable Host or Gadget support to see Inventra options
 #
 
 #
-# USB Gadget Support
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
 #
 # CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
 # CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
 
 #
-# Real Time Clock
+# Voltage and Current regulators
 #
-CONFIG_RTC_LIB=y
-# CONFIG_RTC_CLASS is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
 
 #
 # File systems
@@ -743,16 +757,16 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 # CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
@@ -774,10 +788,11 @@ CONFIG_DNOTIFY=y
 # Pseudo filesystems
 #
 CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
 # CONFIG_CONFIGFS_FS is not set
 
 #
@@ -790,67 +805,113 @@ CONFIG_RAMFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+CONFIG_JFFS2_RUBIN=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
 CONFIG_CRAMFS=y
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-# CONFIG_NFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
 # CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
 
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
 # CONFIG_NLS is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
+# CONFIG_DLM is not set
 
 #
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_FS is not set
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
 CONFIG_FRAME_POINTER=y
-# CONFIG_UNWIND_INFO is not set
-CONFIG_FORCED_INLINING=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
 
@@ -859,21 +920,103 @@ CONFIG_DEBUG_LL=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
 
 #
-# Cryptographic options
+# Ciphers
 #
-# CONFIG_CRYPTO is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
 
 #
-# Hardware crypto devices
+# Compression
 #
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
 
 #
 # Library routines
 #
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/mx31moboard_defconfig b/arch/arm/configs/mx31moboard_defconfig
new file mode 100644
index 000000000000..e90f86d6deef
--- /dev/null
+++ b/arch/arm/configs/mx31moboard_defconfig
@@ -0,0 +1,790 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc5
+# Fri Oct 24 11:41:22 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+# CONFIG_HAVE_CLK is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+CONFIG_ARCH_MXC=y
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Freescale MXC Implementations
+#
+# CONFIG_ARCH_MX2 is not set
+CONFIG_ARCH_MX3=y
+
+#
+# MX3 Options
+#
+# CONFIG_MACH_MX31ADS is not set
+# CONFIG_MACH_PCM037 is not set
+# CONFIG_MACH_MX31LITE is not set
+CONFIG_MACH_MX31MOBOARD=y
+# CONFIG_MXC_IRQ_PRIOR is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+CONFIG_MTD_REDBOOT_PARTS_READONLY=y
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x0
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/mx31pdk_defconfig b/arch/arm/configs/mx31pdk_defconfig
new file mode 100644
index 000000000000..95ffc0db95a0
--- /dev/null
+++ b/arch/arm/configs/mx31pdk_defconfig
@@ -0,0 +1,773 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.28-rc2
+# Sun Oct 26 15:55:29 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+CONFIG_ARCH_MXC=y
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Freescale MXC Implementations
+#
+# CONFIG_ARCH_MX2 is not set
+CONFIG_ARCH_MX3=y
+
+#
+# MX3 Options
+#
+# CONFIG_MACH_MX31ADS is not set
+# CONFIG_MACH_PCM037 is not set
+# CONFIG_MACH_MX31LITE is not set
+CONFIG_MACH_MX31_3DS=y
+# CONFIG_MXC_IRQ_PRIOR is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_UNEVICTABLE_LRU is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_SMC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_MFD_WM8400 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_PCBC is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/neocore926_defconfig b/arch/arm/configs/neocore926_defconfig
new file mode 100644
index 000000000000..325f1e105f69
--- /dev/null
+++ b/arch/arm/configs/neocore926_defconfig
@@ -0,0 +1,1302 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc1
+# Tue Jul 29 10:46:54 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+CONFIG_ARCH_AT91=y
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Atmel AT91 System-on-Chip
+#
+# CONFIG_ARCH_AT91RM9200 is not set
+# CONFIG_ARCH_AT91SAM9260 is not set
+# CONFIG_ARCH_AT91SAM9261 is not set
+CONFIG_ARCH_AT91SAM9263=y
+# CONFIG_ARCH_AT91SAM9RL is not set
+# CONFIG_ARCH_AT91SAM9G20 is not set
+# CONFIG_ARCH_AT91CAP9 is not set
+# CONFIG_ARCH_AT91X40 is not set
+CONFIG_AT91_PMC_UNIT=y
+
+#
+# AT91SAM9263 Board Type
+#
+# CONFIG_MACH_AT91SAM9263EK is not set
+# CONFIG_MACH_USB_A9263 is not set
+CONFIG_MACH_NEOCORE926=y
+
+#
+# AT91 Board Options
+#
+CONFIG_MTD_AT91_DATAFLASH_CARD=y
+
+#
+# AT91 Feature Selections
+#
+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
+CONFIG_AT91_TIMER_HZ=100
+CONFIG_AT91_EARLY_DBGU=y
+# CONFIG_AT91_EARLY_USART0 is not set
+# CONFIG_AT91_EARLY_USART1 is not set
+# CONFIG_AT91_EARLY_USART2 is not set
+# CONFIG_AT91_EARLY_USART3 is not set
+# CONFIG_AT91_EARLY_USART4 is not set
+# CONFIG_AT91_EARLY_USART5 is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+CONFIG_NFTL=y
+CONFIG_NFTL_RW=y
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_BLOCK2MTD=y
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+CONFIG_MTD_NAND_ECC_SMC=y
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_NAND_ATMEL_ECC_HW=y
+# CONFIG_MTD_NAND_ATMEL_ECC_SOFT is not set
+# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+CONFIG_MTD_NAND_PLATFORM=y
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+CONFIG_ATMEL_PWM=y
+CONFIG_ATMEL_TCLIB=y
+CONFIG_ATMEL_TCB_CLKSRC=y
+CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ATMEL_SSC is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+# CONFIG_BLK_DEV_SD is not set
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_PDC is not set
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+# CONFIG_BACKLIGHT_ATMEL_PWM is not set
+# CONFIG_BACKLIGHT_CORGI is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=y
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_AT91=y
+# CONFIG_MMC_SPI is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_LATENCYTOP is not set
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/netx_defconfig b/arch/arm/configs/netx_defconfig
index 0884f2370c3a..61d0fc5b2417 100644
--- a/arch/arm/configs/netx_defconfig
+++ b/arch/arm/configs/netx_defconfig
@@ -728,9 +728,9 @@ CONFIG_RTC_CLASS=m
 #
 # RTC interfaces
 #
-CONFIG_RTC_INTF_SYSFS=m
-CONFIG_RTC_INTF_PROC=m
-CONFIG_RTC_INTF_DEV=m
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
 
 #
 # RTC drivers
diff --git a/arch/arm/configs/omap3_pandora_defconfig b/arch/arm/configs/omap3_pandora_defconfig
new file mode 100644
index 000000000000..09543f4de5bc
--- /dev/null
+++ b/arch/arm/configs/omap3_pandora_defconfig
@@ -0,0 +1,1409 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.28-rc7
+# Fri Dec  5 11:54:09 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+CONFIG_ARCH_OMAP=y
+# CONFIG_ARCH_MSM is not set
+
+#
+# TI OMAP Implementations
+#
+CONFIG_ARCH_OMAP_OTG=y
+# CONFIG_ARCH_OMAP1 is not set
+# CONFIG_ARCH_OMAP2 is not set
+CONFIG_ARCH_OMAP3=y
+
+#
+# OMAP Feature Selections
+#
+# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
+# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
+# CONFIG_OMAP_RESET_CLOCKS is not set
+# CONFIG_OMAP_MUX is not set
+CONFIG_OMAP_MCBSP=y
+# CONFIG_OMAP_MPU_TIMER is not set
+CONFIG_OMAP_32K_TIMER=y
+CONFIG_OMAP_32K_TIMER_HZ=128
+CONFIG_OMAP_DM_TIMER=y
+# CONFIG_OMAP_LL_DEBUG_UART1 is not set
+# CONFIG_OMAP_LL_DEBUG_UART2 is not set
+CONFIG_OMAP_LL_DEBUG_UART3=y
+CONFIG_ARCH_OMAP34XX=y
+CONFIG_ARCH_OMAP3430=y
+
+#
+# OMAP Board Type
+#
+# CONFIG_MACH_OMAP3_BEAGLE is not set
+# CONFIG_MACH_OMAP_LDP is not set
+# CONFIG_MACH_OVERO is not set
+CONFIG_MACH_OMAP3_PANDORA=y
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_IFAR=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=128
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=" debug "
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_MISC=y
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_NET_ETHERNET is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=32
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_OMAP=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_ISP1301_OMAP is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+CONFIG_SPI_OMAP24XX=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+CONFIG_GPIO_TWL4030=y
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+CONFIG_TWL4030_CORE=y
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_COMPAT is not set
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_BRIGHT is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DELL is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_SOC=y
+
+#
+# OMAP 343x high speed USB support
+#
+CONFIG_USB_MUSB_HOST=y
+# CONFIG_USB_MUSB_PERIPHERAL is not set
+# CONFIG_USB_MUSB_OTG is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+CONFIG_USB_MUSB_HDRC_HCD=y
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_INVENTRA_DMA=y
+# CONFIG_USB_TI_CPPI_DMA is not set
+# CONFIG_USB_MUSB_DEBUG is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+CONFIG_USB_GADGET_OMAP=y
+CONFIG_USB_OMAP=y
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=y
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_OMAP is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+CONFIG_RTC_DRV_TWL4030=y
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+CONFIG_PRINT_QUOTA_WARNING=y
+# CONFIG_QFMT_V1 is not set
+CONFIG_QFMT_V2=y
+CONFIG_QUOTACTL=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig
index 948a212fb1cc..b77d054169ee 100644
--- a/arch/arm/configs/omap_ldp_defconfig
+++ b/arch/arm/configs/omap_ldp_defconfig
@@ -316,7 +316,82 @@ CONFIG_BINFMT_MISC=y
 #
 # CONFIG_PM is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
-# CONFIG_NET is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+CONFIG_XFRM_MIGRATE=y
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 
 #
 # Device Drivers
@@ -332,6 +407,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_DEBUG_DRIVER is not set
 # CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
 # CONFIG_MTD is not set
 # CONFIG_PARPORT is not set
 CONFIG_BLK_DEV=y
@@ -390,6 +467,54 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DH is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+CONFIG_SMC911X=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
 
 #
 # Input device support
@@ -816,6 +941,27 @@ CONFIG_TMPFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
 
 #
 # Partition Types
diff --git a/arch/arm/configs/picotux200_defconfig b/arch/arm/configs/picotux200_defconfig
index 14826f0dabde..59e4463c2da2 100644
--- a/arch/arm/configs/picotux200_defconfig
+++ b/arch/arm/configs/picotux200_defconfig
@@ -1069,9 +1069,9 @@ CONFIG_RTC_CLASS=m
 #
 # RTC interfaces
 #
-CONFIG_RTC_INTF_SYSFS=m
-CONFIG_RTC_INTF_PROC=m
-CONFIG_RTC_INTF_DEV=m
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
 
 #
diff --git a/arch/arm/configs/realview-smp_defconfig b/arch/arm/configs/realview-smp_defconfig
index 0c09b23167ec..cd29824d791c 100644
--- a/arch/arm/configs/realview-smp_defconfig
+++ b/arch/arm/configs/realview-smp_defconfig
@@ -1,84 +1,111 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.19-rc3
-# Wed Oct 25 14:12:00 2006
+# Linux kernel version: 2.6.28-rc2
+# Mon Nov 10 14:41:47 2008
 #
 CONFIG_ARM=y
-# CONFIG_GENERIC_TIME is not set
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
-# Code maturity level options
+# General setup
 #
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
 # CONFIG_AUDIT is not set
 # CONFIG_IKCONFIG is not set
-# CONFIG_CPUSETS is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
-CONFIG_INITRAMFS_SOURCE=""
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
-# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
-CONFIG_SLAB=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-# CONFIG_KMOD is not set
+CONFIG_KMOD=y
 CONFIG_STOP_MACHINE=y
-
-#
-# Block layer
-#
 CONFIG_BLOCK=y
+# CONFIG_LBD is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
 # IO Schedulers
@@ -92,6 +119,8 @@ CONFIG_DEFAULT_DEADLINE=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
 
 #
 # System Type
@@ -103,19 +132,26 @@ CONFIG_ARCH_REALVIEW=y
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
@@ -123,13 +159,29 @@ CONFIG_ARCH_REALVIEW=y
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
 
 #
 # RealView platform type
 #
 CONFIG_MACH_REALVIEW_EB=y
-CONFIG_REALVIEW_MPCORE=y
+# CONFIG_REALVIEW_EB_A9MP is not set
+CONFIG_REALVIEW_EB_ARM11MP=y
+# CONFIG_REALVIEW_EB_ARM11MP_REVB is not set
+CONFIG_MACH_REALVIEW_PB11MP=y
+# CONFIG_MACH_REALVIEW_PB1176 is not set
+# CONFIG_MACH_REALVIEW_PBA8 is not set
+CONFIG_REALVIEW_HIGH_PHYS_OFFSET=y
 
 #
 # Processor Type
@@ -138,12 +190,15 @@ CONFIG_CPU_32=y
 # CONFIG_CPU_ARM926T is not set
 CONFIG_CPU_V6=y
 CONFIG_CPU_32v6K=y
+# CONFIG_CPU_V7 is not set
 CONFIG_CPU_32v6=y
 CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
 CONFIG_CPU_CACHE_V6=y
 CONFIG_CPU_CACHE_VIPT=y
 CONFIG_CPU_COPY_V6=y
 CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
 CONFIG_CPU_CP15=y
 CONFIG_CPU_CP15_MMU=y
 
@@ -153,9 +208,10 @@ CONFIG_CPU_CP15_MMU=y
 CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_HAS_TLS_REG=y
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_L2X0=y
 CONFIG_ARM_GIC=y
 CONFIG_ICST307=y
 
@@ -163,32 +219,44 @@ CONFIG_ICST307=y
 # Bus support
 #
 CONFIG_ARM_AMBA=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
 # CONFIG_PCCARD is not set
 
 #
 # Kernel Features
 #
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_SMP=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
 CONFIG_NR_CPUS=4
 CONFIG_HOTPLUG_CPU=y
 CONFIG_LOCAL_TIMERS=y
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=100
-# CONFIG_AEABI is not set
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
 CONFIG_ALIGNMENT_TRAP=y
 
 #
@@ -198,6 +266,12 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
 # CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -206,8 +280,7 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=tt
 #
 # At least one emulation must be selected
 #
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_NWFPE is not set
 # CONFIG_FPE_FASTFPE is not set
 CONFIG_VFP=y
 
@@ -215,28 +288,29 @@ CONFIG_VFP=y
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
 
 #
 # Power management options
 #
 # CONFIG_PM is not set
-# CONFIG_APM is not set
-
-#
-# Networking
-#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
 #
 # Networking options
 #
-# CONFIG_NETDEBUG is not set
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -255,36 +329,25 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
 # CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
 # CONFIG_IP_SCTP is not set
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -294,10 +357,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
 # CONFIG_NET_SCHED is not set
 
 #
@@ -305,9 +364,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 
 #
 # Device Drivers
@@ -316,38 +380,37 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
 # CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
 
 #
 # User Modules And Translation Layers
 #
 CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
 # CONFIG_RFD_FTL is not set
 # CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 
 #
 # RAM/ROM/Flash chip drivers
@@ -373,7 +436,6 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
 
 #
 # Mapping drivers for chip access
@@ -397,115 +459,73 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
 # CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
 # CONFIG_MTD_NAND is not set
-
-#
-# OneNAND Flash Device Drivers
-#
 # CONFIG_MTD_ONENAND is not set
 
 #
-# Parallel port support
+# UBI - Unsorted block images
 #
+# CONFIG_MTD_UBI is not set
 # CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
+CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
 
 #
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
 # CONFIG_SCSI_NETLINK is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
+# CONFIG_ATA is not set
 # CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-
-#
-# PHY device support
-#
+# CONFIG_VETH is not set
 # CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+# CONFIG_AX88796 is not set
 CONFIG_SMC91X=y
 # CONFIG_DM9000 is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
+CONFIG_SMC911X=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
 # CONFIG_ISDN is not set
 
 #
@@ -513,6 +533,7 @@ CONFIG_SMC91X=y
 #
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
 
 #
 # Userland interfaces
@@ -522,7 +543,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
 # CONFIG_INPUT_EVDEV is not set
 # CONFIG_INPUT_EVBUG is not set
 
@@ -538,9 +558,16 @@ CONFIG_KEYBOARD_ATKBD=y
 # CONFIG_KEYBOARD_STOWAWAY is not set
 CONFIG_INPUT_MOUSE=y
 CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_VSXXXAA is not set
 # CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
 # CONFIG_INPUT_MISC is not set
 
@@ -558,9 +585,11 @@ CONFIG_SERIO_LIBPS2=y
 # Character devices
 #
 CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
 # CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
 # CONFIG_SERIAL_NONSTANDARD is not set
 
 #
@@ -579,97 +608,91 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=16
-
-#
-# IPMI
-#
 # CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_NVRAM is not set
-# CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
 # CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
 # CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
 # CONFIG_I2C is not set
-
-#
-# SPI support
-#
 # CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
 # CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
+# CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Misc devices
-#
-# CONFIG_SGI_IOC4 is not set
-# CONFIG_TIFM_CORE is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
 
 #
-# LED devices
+# Sonics Silicon Backplane
 #
-# CONFIG_NEW_LEDS is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
 
 #
-# LED drivers
+# Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_WM8400 is not set
 
 #
-# LED Triggers
+# Multimedia devices
 #
 
 #
-# Multimedia devices
+# Multimedia core support
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
 
 #
-# Digital Video Broadcasting Devices
+# Multimedia drivers
 #
-# CONFIG_DVB is not set
+# CONFIG_DAB is not set
 
 #
 # Graphics support
 #
-# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
 # CONFIG_FB_MACMODES is not set
 # CONFIG_FB_BACKLIGHT is not set
 # CONFIG_FB_MODE_HELPERS is not set
 # CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
 CONFIG_FB_ARMCLCD=y
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
 
 #
 # Console display driver support
@@ -677,28 +700,17 @@ CONFIG_FB_ARMCLCD=y
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
 # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
 # CONFIG_FONTS is not set
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_LOGO_LINUX_CLUT224=y
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
 CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
+CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
@@ -712,100 +724,65 @@ CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-CONFIG_SND_AC97_CODEC=m
-CONFIG_SND_AC97_BUS=m
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-
-#
-# ALSA ARM devices
-#
-CONFIG_SND_ARMAACI=m
-
-#
-# Open Sound System
-#
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=y
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_ARMAACI=y
+# CONFIG_SND_SOC is not set
 # CONFIG_SOUND_PRIME is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-# CONFIG_USB is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
+CONFIG_AC97_BUS=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_ARMMMCI=y
-# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
 
 #
-# Real Time Clock
+# MMC/SD/SDIO Card Drivers
 #
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-# CONFIG_RTC_DEBUG is not set
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
 
 #
-# RTC interfaces
+# MMC/SD/SDIO Host Controller Drivers
 #
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_MMC_ARMMMCI=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
 
 #
-# RTC drivers
+# Voltage and Current regulators
 #
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-CONFIG_RTC_DRV_PL031=y
-# CONFIG_RTC_DRV_TEST is not set
-# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
 
 #
 # File systems
 #
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT2_FS is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
-# CONFIG_INOTIFY_USER is not set
+CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
@@ -831,11 +808,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 #
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
 # CONFIG_CONFIGFS_FS is not set
 
 #
@@ -848,29 +825,28 @@ CONFIG_RAMFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
 # CONFIG_JFFS2_FS is not set
 CONFIG_CRAMFS=y
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -878,17 +854,12 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
 
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=y
@@ -929,64 +900,177 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
 # CONFIG_NLS_UTF8 is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
+# CONFIG_DLM is not set
 
 #
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
 # CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_RWSEMS=y
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_FS is not set
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
 CONFIG_FRAME_POINTER=y
-# CONFIG_UNWIND_INFO is not set
-CONFIG_FORCED_INLINING=y
-# CONFIG_HEADERS_CHECK is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
 
 #
 # Security options
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
 
 #
-# Cryptographic options
+# Random Number Generation
 #
-# CONFIG_CRYPTO is not set
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
 
 #
 # Library routines
 #
+CONFIG_BITREVERSE=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/realview_defconfig b/arch/arm/configs/realview_defconfig
index 907e54344dad..7e253f58ed18 100644
--- a/arch/arm/configs/realview_defconfig
+++ b/arch/arm/configs/realview_defconfig
@@ -1,105 +1,204 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.14-rc2
-# Thu Sep 29 14:50:10 2005
+# Linux kernel version: 2.6.28-rc2
+# Mon Nov 10 14:39:48 2008
 #
 CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_MMU=y
-CONFIG_UID16=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
-# Code maturity level options
+# General setup
 #
-# CONFIG_EXPERIMENTAL is not set
-CONFIG_CLEAN_COMPILE=y
+CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
+# CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
-CONFIG_HOTPLUG=y
-CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
-CONFIG_INITRAMFS_SOURCE=""
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
 # CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
-CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-# CONFIG_KMOD is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
 
 #
 # System Type
 #
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+CONFIG_ARCH_REALVIEW=y
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP3XX is not set
-# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
 # CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_VERSATILE is not set
-CONFIG_ARCH_REALVIEW=y
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_MSM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
 
 #
 # RealView platform type
 #
 CONFIG_MACH_REALVIEW_EB=y
+# CONFIG_REALVIEW_EB_A9MP is not set
+CONFIG_REALVIEW_EB_ARM11MP=y
+# CONFIG_REALVIEW_EB_ARM11MP_REVB is not set
+CONFIG_MACH_REALVIEW_PB11MP=y
+CONFIG_MACH_REALVIEW_PB1176=y
+# CONFIG_MACH_REALVIEW_PBA8 is not set
 
 #
 # Processor Type
 #
 CONFIG_CPU_32=y
-CONFIG_CPU_ARM926T=y
-# CONFIG_CPU_V6 is not set
-CONFIG_CPU_32v5=y
-CONFIG_CPU_ABRT_EV5TJ=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_COPY_V4WB=y
-CONFIG_CPU_TLB_V4WBI=y
+# CONFIG_CPU_ARM926T is not set
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+# CONFIG_CPU_V7 is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
 
 #
 # Processor Features
@@ -107,8 +206,9 @@ CONFIG_CPU_TLB_V4WBI=y
 CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
-# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_L2X0=y
 CONFIG_ARM_GIC=y
 CONFIG_ICST307=y
 
@@ -116,20 +216,41 @@ CONFIG_ICST307=y
 # Bus support
 #
 CONFIG_ARM_AMBA=y
-CONFIG_ISA_DMA_API=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
 # CONFIG_PCCARD is not set
 
 #
 # Kernel Features
 #
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_SMP is not set
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
 CONFIG_ALIGNMENT_TRAP=y
 
 #
@@ -139,6 +260,12 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
 # CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -147,26 +274,24 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=tt
 #
 # At least one emulation must be selected
 #
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-# CONFIG_VFP is not set
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
 
 #
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
 
 #
 # Power management options
 #
 # CONFIG_PM is not set
-
-#
-# Networking
-#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
 #
@@ -175,6 +300,11 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -186,34 +316,56 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
 # CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
 # CONFIG_IPX is not set
 # CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
 # CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
 
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 
 #
 # Device Drivers
@@ -222,30 +374,37 @@ CONFIG_TCP_CONG_BIC=y
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
 
 #
 # User Modules And Translation Layers
 #
 CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 
 #
 # RAM/ROM/Flash chip drivers
@@ -266,7 +425,6 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I8 is not set
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_AMDSTD_RETRY=0
 # CONFIG_MTD_CFI_STAA is not set
 CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
@@ -279,7 +437,6 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 # CONFIG_MTD_PHYSMAP is not set
 CONFIG_MTD_ARM_INTEGRATOR=y
-# CONFIG_MTD_EDB7312 is not set
 # CONFIG_MTD_PLATRAM is not set
 
 #
@@ -288,7 +445,7 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
+# CONFIG_MTD_BLOCK2MTD is not set
 
 #
 # Disk-On-Chip Device Drivers
@@ -296,121 +453,81 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
 # CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
 # CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
 
 #
-# Parallel port support
+# UBI - Unsorted block images
 #
+# CONFIG_MTD_UBI is not set
 # CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
+CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_RAM_COUNT=16
 # CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-# CONFIG_IOSCHED_AS is not set
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_IOSCHED_CFQ is not set
 # CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
 
 #
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
 # CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-
-#
-# PHY device support
-#
+# CONFIG_VETH is not set
 # CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+# CONFIG_AX88796 is not set
 CONFIG_SMC91X=y
 # CONFIG_DM9000 is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
+CONFIG_SMC911X=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
 # CONFIG_ISDN is not set
 
 #
 # Input device support
 #
 CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
 
 #
 # Userland interfaces
@@ -420,7 +537,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
 # CONFIG_INPUT_EVDEV is not set
 # CONFIG_INPUT_EVBUG is not set
 
@@ -433,11 +549,19 @@ CONFIG_KEYBOARD_ATKBD=y
 # CONFIG_KEYBOARD_LKKBD is not set
 # CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
 CONFIG_INPUT_MOUSE=y
 CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_VSXXXAA is not set
 # CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
 # CONFIG_INPUT_MISC is not set
 
@@ -455,8 +579,11 @@ CONFIG_SERIO_LIBPS2=y
 # Character devices
 #
 CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
 # CONFIG_SERIAL_NONSTANDARD is not set
 
 #
@@ -475,73 +602,91 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=16
-
-#
-# IPMI
-#
 # CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
 # CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
 # CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-
-#
-# I2C support
-#
+# CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
 
 #
-# Hardware Monitoring support
+# Sonics Silicon Backplane
 #
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
 
 #
-# Misc devices
+# Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_WM8400 is not set
 
 #
-# Multimedia Capabilities Port drivers
+# Multimedia devices
 #
 
 #
-# Multimedia devices
+# Multimedia core support
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
 
 #
-# Digital Video Broadcasting Devices
+# Multimedia drivers
 #
-# CONFIG_DVB is not set
+# CONFIG_DAB is not set
 
 #
 # Graphics support
 #
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
-CONFIG_FB_SOFT_CURSOR=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
 # CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
 # CONFIG_FB_MODE_HELPERS is not set
 # CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
 CONFIG_FB_ARMCLCD=y
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
 
 #
 # Console display driver support
@@ -549,27 +694,17 @@ CONFIG_FB_ARMCLCD=y
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
 # CONFIG_FONTS is not set
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_LOGO_LINUX_CLUT224=y
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
 CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
+CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
@@ -577,59 +712,71 @@ CONFIG_SND_PCM=y
 CONFIG_SND_OSSEMUL=y
 CONFIG_SND_MIXER_OSS=y
 CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-
-#
-# ALSA ARM devices
-#
-# CONFIG_SND_ARMAACI is not set
-
-#
-# Open Sound System
-#
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=y
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_ARMAACI=y
+# CONFIG_SND_SOC is not set
 # CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
 
 #
-# USB support
+# MMC/SD/SDIO Card Drivers
 #
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB is not set
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
 
 #
-# USB Gadget Support
+# MMC/SD/SDIO Host Controller Drivers
 #
-# CONFIG_USB_GADGET is not set
+CONFIG_MMC_ARMMMCI=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
 
 #
-# MMC/SD Card support
+# Voltage and Current regulators
 #
-# CONFIG_MMC is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
 
 #
 # File systems
 #
 # CONFIG_EXT2_FS is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
+# CONFIG_EXT4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
@@ -654,51 +801,59 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # Pseudo filesystems
 #
 CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_RELAYFS_FS is not set
+# CONFIG_CONFIGFS_FS is not set
 
 #
 # Miscellaneous filesystems
 #
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
 # CONFIG_HFSPLUS_FS is not set
-# CONFIG_JFFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
 CONFIG_CRAMFS=y
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFSD is not set
+# CONFIG_NFS_V4 is not set
 CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
 
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=y
@@ -739,26 +894,71 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
 # CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
 
 #
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
-CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_DEBUG_LL is not set
 
 #
@@ -766,21 +966,106 @@ CONFIG_DEBUG_ERRORS=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
 
 #
-# Cryptographic options
+# Compression
 #
-# CONFIG_CRYPTO is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
 
 #
-# Hardware crypto devices
+# Random Number Generation
 #
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
 
 #
 # Library routines
 #
+CONFIG_BITREVERSE=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig
new file mode 100644
index 000000000000..cf3c1b5d7048
--- /dev/null
+++ b/arch/arm/configs/s3c6400_defconfig
@@ -0,0 +1,845 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.28-rc3
+# Mon Nov  3 10:10:30 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_TIME is not set
+# CONFIG_GENERIC_CLOCKEVENTS is not set
+CONFIG_MMU=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+CONFIG_LSF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+CONFIG_ARCH_S3C64XX=y
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+CONFIG_PLAT_S3C64XX=y
+CONFIG_CPU_S3C6400_INIT=y
+CONFIG_CPU_S3C6400_CLOCK=y
+CONFIG_S3C64XX_SETUP_I2C0=y
+CONFIG_S3C64XX_SETUP_I2C1=y
+CONFIG_PLAT_S3C=y
+
+#
+# Boot options
+#
+CONFIG_S3C_BOOT_ERROR_RESET=y
+
+#
+# Power management
+#
+CONFIG_S3C_LOWLEVEL_UART_PORT=0
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_DEV_HSMMC=y
+CONFIG_S3C_DEV_HSMMC1=y
+CONFIG_S3C_DEV_I2C1=y
+CONFIG_CPU_S3C6410=y
+CONFIG_S3C6410_SETUP_SDHCI=y
+CONFIG_MACH_SMDK6410=y
+CONFIG_SMDK6410_SD_CH0=y
+# CONFIG_SMDK6410_SD_CH1 is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_ARM_VIC=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/bin/bash initrd=0x51000000,4M"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS=4
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S3C6400=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_S3C2410=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+CONFIG_AT24=y
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+# CONFIG_HID_PID is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_COMPAT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+
+#
+# Enable Host or Gadget support to see Inventra options
+#
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+# CONFIG_USB_GADGET is not set
+CONFIG_MMC=y
+CONFIG_MMC_DEBUG=y
+CONFIG_MMC_UNSAFE_RESUME=y
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=y
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S3C=y
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+CONFIG_DEBUG_S3C_PORT=y
+CONFIG_DEBUG_S3C_UART=0
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/w90p910_defconfig b/arch/arm/configs/w90p910_defconfig
new file mode 100644
index 000000000000..56bda7c6d670
--- /dev/null
+++ b/arch/arm/configs/w90p910_defconfig
@@ -0,0 +1,626 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc8-git8
+# Sat Nov 15 10:05:00 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_GENERIC_GPIO is not set
+# CONFIG_GENERIC_TIME is not set
+# CONFIG_GENERIC_CLOCKEVENTS is not set
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_RELAY=y
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+CONFIG_USER_NS=y
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+# CONFIG_HAVE_CLK is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_LSF=y
+CONFIG_BLK_DEV_BSG=y
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+CONFIG_ARCH_W90X900=y
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+CONFIG_CPU_W90P910=y
+
+#
+# W90P910 Machines
+#
+CONFIG_MACH_W90P910EVB=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_TICK_ONESHOT is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 initrd=0xa00000,4000000 mem=64M"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_W90X900=y
+# CONFIG_SERIAL_W90X900_PORT1 is not set
+# CONFIG_SERIAL_W90X900_PORT2 is not set
+# CONFIG_SERIAL_W90X900_PORT3 is not set
+# CONFIG_SERIAL_W90X900_PORT4 is not set
+CONFIG_SERIAL_W90X900_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 325f881ccb50..ee99723b3a6c 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -12,10 +12,9 @@
 #define __ASM_ARM_ATOMIC_H
 
 #include <linux/compiler.h>
+#include <linux/types.h>
 #include <asm/system.h>
 
-typedef struct { volatile int counter; } atomic_t;
-
 #define ATOMIC_INIT(i)  { (i) }
 
 #ifdef __KERNEL__
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index de6c59f814a1..6cbd8fdc9f1f 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -10,11 +10,11 @@
 #ifndef _ASMARM_CACHEFLUSH_H
 #define _ASMARM_CACHEFLUSH_H
 
-#include <linux/sched.h>
 #include <linux/mm.h>
 
 #include <asm/glue.h>
 #include <asm/shmparam.h>
+#include <asm/cachetype.h>
 
 #define CACHE_COLOUR(vaddr)     ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
 
@@ -296,16 +296,6 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
 #endif
 
 /*
- * flush_cache_vmap() is used when creating mappings (eg, via vmap,
- * vmalloc, ioremap etc) in kernel space for pages.  Since the
- * direct-mappings of these pages may contain cached data, we need
- * to do a full cache flush to ensure that writebacks don't corrupt
- * data placed into these pages via the new mappings.
- */
-#define flush_cache_vmap(start, end)            flush_cache_all()
-#define flush_cache_vunmap(start, end)          flush_cache_all()
-
-/*
  * Copy user data from/to a page which is mapped into a different
  * processes address space.  Really, we want to allow our "user
  * space" model to handle this.
@@ -444,4 +434,29 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
         dmac_inv_range(start, start + size);
 }
 
+/*
+ * flush_cache_vmap() is used when creating mappings (eg, via vmap,
+ * vmalloc, ioremap etc) in kernel space for pages.  On non-VIPT
+ * caches, since the direct-mappings of these pages may contain cached
+ * data, we need to do a full cache flush to ensure that writebacks
+ * don't corrupt data placed into these pages via the new mappings.
+ */
+static inline void flush_cache_vmap(unsigned long start, unsigned long end)
+{
+        if (!cache_is_vipt_nonaliasing())
+                flush_cache_all();
+        else
+                /*
+                 * set_pte_at() called from vmap_pte_range() does not
+                 * have a DSB after cleaning the cache line.
+                 */
+                dsb();
+}
+
+static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
+{
+        if (!cache_is_vipt_nonaliasing())
+                flush_cache_all();
+}
+
 #endif
diff --git a/arch/arm/include/asm/clkdev.h b/arch/arm/include/asm/clkdev.h
new file mode 100644
index 000000000000..b6ec7c627b39
--- /dev/null
+++ b/arch/arm/include/asm/clkdev.h
@@ -0,0 +1,30 @@
+/*
+ *  arch/arm/include/asm/clkdev.h
+ *
+ *  Copyright (C) 2008 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Helper for the clk API to assist looking up a struct clk.
+ */
+#ifndef __ASM_CLKDEV_H
+#define __ASM_CLKDEV_H
+
+struct clk;
+
+struct clk_lookup {
+        struct list_head        node;
+        const char              *dev_id;
+        const char              *con_id;
+        struct clk              *clk;
+};
+
+struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
+        const char *dev_fmt, ...);
+
+void clkdev_add(struct clk_lookup *cl);
+void clkdev_drop(struct clk_lookup *cl);
+
+#endif
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 4ed149cbb32a..22cb14ec3438 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -69,7 +69,9 @@ extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
  */
 static inline int dma_supported(struct device *dev, u64 mask)
 {
-        return dev->dma_mask && *dev->dma_mask != 0;
+        if (mask < ISA_DMA_THRESHOLD)
+                return 0;
+        return 1;
 }
 
 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index 75154b193117..df5638f3643a 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -1,12 +1,7 @@
 #ifndef __ASM_ARM_DMA_H
 #define __ASM_ARM_DMA_H
 
-typedef unsigned int dmach_t;
-
-#include <linux/spinlock.h>
-#include <asm/system.h>
-#include <asm/scatterlist.h>
-#include <mach/dma.h>
+#include <asm/memory.h>
 
 /*
  * This is the maximum virtual address which can be DMA'd from.
@@ -15,6 +10,19 @@ typedef unsigned int dmach_t;
 #define MAX_DMA_ADDRESS 0xffffffff
 #endif
 
+#ifdef CONFIG_ISA_DMA_API
+/*
+ * This is used to support drivers written for the x86 ISA DMA API.
+ * It should not be re-used except for that purpose.
+ */
+#include <linux/spinlock.h>
+#include <asm/system.h>
+#include <asm/scatterlist.h>
+
+typedef unsigned int dmach_t;
+
+#include <mach/isa-dma.h>
+
 /*
  * DMA modes
  */
@@ -140,4 +148,6 @@ extern int isa_dma_bridge_buggy;
 #define isa_dma_bridge_buggy    (0)
 #endif
 
-#endif /* _ARM_DMA_H */
+#endif /* CONFIG_ISA_DMA_API */
+
+#endif /* __ASM_ARM_DMA_H */
diff --git a/arch/arm/include/asm/hardware/iomd.h b/arch/arm/include/asm/hardware/iomd.h
index 9c5afbd71a69..f9ee69e4f53e 100644
--- a/arch/arm/include/asm/hardware/iomd.h
+++ b/arch/arm/include/asm/hardware/iomd.h
@@ -32,19 +32,11 @@
 #define IOMD_KARTRX     (0x004)
 #define IOMD_KCTRL      (0x008)
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_IOLINES    (0x00C)
-#endif
-
 #define IOMD_IRQSTATA   (0x010)
 #define IOMD_IRQREQA    (0x014)
 #define IOMD_IRQCLRA    (0x014)
 #define IOMD_IRQMASKA   (0x018)
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_SUSMODE    (0x01C)
-#endif
-
 #define IOMD_IRQSTATB   (0x020)
 #define IOMD_IRQREQB    (0x024)
 #define IOMD_IRQMASKB   (0x028)
@@ -53,10 +45,6 @@
 #define IOMD_FIQREQ     (0x034)
 #define IOMD_FIQMASK    (0x038)
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_CLKCTL     (0x03C)
-#endif
-
 #define IOMD_T0CNTL     (0x040)
 #define IOMD_T0LTCHL    (0x040)
 #define IOMD_T0CNTH     (0x044)
@@ -71,18 +59,6 @@
 #define IOMD_T1GO       (0x058)
 #define IOMD_T1LATCH    (0x05c)
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_IRQSTATC   (0x060)
-#define IOMD_IRQREQC    (0x064)
-#define IOMD_IRQMASKC   (0x068)
-
-#define IOMD_VIDMUX     (0x06c)
-
-#define IOMD_IRQSTATD   (0x070)
-#define IOMD_IRQREQD    (0x074)
-#define IOMD_IRQMASKD   (0x078)
-#endif
-
 #define IOMD_ROMCR0     (0x080)
 #define IOMD_ROMCR1     (0x084)
 #ifdef CONFIG_ARCH_RPC
@@ -100,11 +76,6 @@
 #define IOMD_MOUSEY     (0x0A4)
 #endif
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_MSEDAT     (0x0A8)
-#define IOMD_MSECTL     (0x0Ac)
-#endif
-
 #ifdef CONFIG_ARCH_RPC
 #define IOMD_DMATCR     (0x0C0)
 #endif
@@ -113,18 +84,6 @@
 #ifdef CONFIG_ARCH_RPC
 #define IOMD_DMAEXT     (0x0CC)
 #endif
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_ASTCR      (0x0CC)
-#define IOMD_DRAMCR     (0x0D0)
-#define IOMD_SELFREF    (0x0D4)
-#define IOMD_ATODICR    (0x0E0)
-#define IOMD_ATODSR     (0x0E4)
-#define IOMD_ATODCC     (0x0E8)
-#define IOMD_ATODCNT1   (0x0EC)
-#define IOMD_ATODCNT2   (0x0F0)
-#define IOMD_ATODCNT3   (0x0F4)
-#define IOMD_ATODCNT4   (0x0F8)
-#endif
 
 #ifdef CONFIG_ARCH_RPC
 #define DMA_EXT_IO0     1
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 263f2c362a30..f87328d4a180 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -29,15 +29,17 @@
 #define VIC_INT_SOFT                    0x18
 #define VIC_INT_SOFT_CLEAR              0x1c
 #define VIC_PROTECT                     0x20
-#define VIC_VECT_ADDR                   0x30
-#define VIC_DEF_VECT_ADDR               0x34
+#define VIC_PL190_VECT_ADDR             0x30    /* PL190 only */
+#define VIC_PL190_DEF_VECT_ADDR         0x34    /* PL190 only */
 
-#define VIC_VECT_ADDR0                  0x100   /* 0 to 15 */
-#define VIC_VECT_CNTL0                  0x200   /* 0 to 15 */
+#define VIC_VECT_ADDR0                  0x100   /* 0 to 15 (0..31 PL192) */
+#define VIC_VECT_CNTL0                  0x200   /* 0 to 15 (0..31 PL192) */
 #define VIC_ITCR                        0x300   /* VIC test control register */
 
 #define VIC_VECT_CNTL_ENABLE            (1 << 5)
 
+#define VIC_PL192_VECT_ADDR             0xF00
+
 #ifndef __ASSEMBLY__
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
 #endif
diff --git a/arch/arm/include/asm/hwcap.h b/arch/arm/include/asm/hwcap.h
index 81f4c899a555..bda489f9f017 100644
--- a/arch/arm/include/asm/hwcap.h
+++ b/arch/arm/include/asm/hwcap.h
@@ -16,6 +16,7 @@
 #define HWCAP_IWMMXT    512
 #define HWCAP_CRUNCH    1024
 #define HWCAP_THUMBEE   2048
+#define HWCAP_NEON      4096
 
 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
 /*
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index a8094451be57..d2a59cfc30ce 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -80,6 +80,14 @@ extern void __iounmap(volatile void __iomem *addr);
 extern void __readwrite_bug(const char *fn);
 
 /*
+ * A typesafe __io() helper
+ */
+static inline void __iomem *__typesafe_io(unsigned long addr)
+{
+        return (void __iomem *)addr;
+}
+
+/*
  * Now, pick up the machine-defined IO definitions
  */
 #include <mach/io.h>
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index a0009aa5d157..328f14a8b790 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -7,10 +7,6 @@
 #define irq_canonicalize(i)     (i)
 #endif
 
-#ifndef NR_IRQS
-#define NR_IRQS 128
-#endif
-
 /*
  * Use this value to indicate lack of interrupt
  * capability
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 77764301844b..0202a7c20e62 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -112,10 +112,8 @@
  * private definitions which should NOT be used outside memory.h
  * files.  Use virt_to_phys/phys_to_virt/__pa/__va instead.
  */
-#ifndef __virt_to_phys
 #define __virt_to_phys(x)       ((x) - PAGE_OFFSET + PHYS_OFFSET)
 #define __phys_to_virt(x)       ((x) - PHYS_OFFSET + PAGE_OFFSET)
-#endif
 
 /*
  * Convert a physical address to a Page Frame Number and back
@@ -180,6 +178,11 @@ static inline void *phys_to_virt(unsigned long x)
  * memory.  Use of these is *deprecated* (and that doesn't mean
  * use the __ prefixed forms instead.)  See dma-mapping.h.
  */
+#ifndef __virt_to_bus
+#define __virt_to_bus   __virt_to_phys
+#define __bus_to_virt   __phys_to_virt
+#endif
+
 static inline __deprecated unsigned long virt_to_bus(void *x)
 {
         return __virt_to_bus((unsigned long)x);
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index 0559f37c2a27..263fed05ea33 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -14,6 +14,7 @@
 #define __ASM_ARM_MMU_CONTEXT_H
 
 #include <linux/compiler.h>
+#include <linux/sched.h>
 #include <asm/cacheflush.h>
 #include <asm/cachetype.h>
 #include <asm/proc-fns.h>
diff --git a/arch/arm/include/asm/mtd-xip.h b/arch/arm/include/asm/mtd-xip.h
index d8fbe2d9b8b9..d79d66d2cf71 100644
--- a/arch/arm/include/asm/mtd-xip.h
+++ b/arch/arm/include/asm/mtd-xip.h
@@ -15,7 +15,6 @@
 #ifndef __ARM_MTD_XIP_H__
 #define __ARM_MTD_XIP_H__
 
-#include <mach/hardware.h>
 #include <mach/mtd-xip.h>
 
 /* fill instruction prefetch */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index bed1c0a00368..f341c9dbd662 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -108,32 +108,38 @@
 #error Unknown user operations model
 #endif
 
+struct page;
+
 struct cpu_user_fns {
-        void (*cpu_clear_user_page)(void *p, unsigned long user);
-        void (*cpu_copy_user_page)(void *to, const void *from,
-                                   unsigned long user);
+        void (*cpu_clear_user_highpage)(struct page *page, unsigned long vaddr);
+        void (*cpu_copy_user_highpage)(struct page *to, struct page *from,
+                        unsigned long vaddr);
 };
 
 #ifdef MULTI_USER
 extern struct cpu_user_fns cpu_user;
 
-#define __cpu_clear_user_page   cpu_user.cpu_clear_user_page
-#define __cpu_copy_user_page    cpu_user.cpu_copy_user_page
+#define __cpu_clear_user_highpage       cpu_user.cpu_clear_user_highpage
+#define __cpu_copy_user_highpage        cpu_user.cpu_copy_user_highpage
 
 #else
 
-#define __cpu_clear_user_page   __glue(_USER,_clear_user_page)
-#define __cpu_copy_user_page    __glue(_USER,_copy_user_page)
+#define __cpu_clear_user_highpage       __glue(_USER,_clear_user_highpage)
+#define __cpu_copy_user_highpage        __glue(_USER,_copy_user_highpage)
 
-extern void __cpu_clear_user_page(void *p, unsigned long user);
-extern void __cpu_copy_user_page(void *to, const void *from,
-                                 unsigned long user);
+extern void __cpu_clear_user_highpage(struct page *page, unsigned long vaddr);
+extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
+                        unsigned long vaddr);
 #endif
 
-#define clear_user_page(addr,vaddr,pg)   __cpu_clear_user_page(addr, vaddr)
-#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr)
+#define clear_user_highpage(page,vaddr)         \
+         __cpu_clear_user_highpage(page, vaddr)
+
+#define __HAVE_ARCH_COPY_USER_HIGHPAGE
+#define copy_user_highpage(to,from,vaddr,vma)   \
+        __cpu_copy_user_highpage(to, from, vaddr)
 
-#define clear_page(page)        memzero((void *)(page), PAGE_SIZE)
+#define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, const void *from);
 
 #undef STRICT_MM_TYPECHECKS
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 6ff33790f47b..1845892260e7 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -64,7 +64,7 @@ struct thread_struct {
 ({                                                                      \
         unsigned long *stack = (unsigned long *)sp;                     \
         set_fs(USER_DS);                                                \
-        memzero(regs->uregs, sizeof(regs->uregs));                      \
+        memset(regs->uregs, 0, sizeof(regs->uregs));                    \
         if (current->personality & ADDR_LIMIT_32BIT)                    \
                 regs->ARM_cpsr = USR_MODE;                              \
         else                                                            \
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index a65413ba121d..f2cd18a0932b 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -209,9 +209,11 @@ struct meminfo {
         struct membank bank[NR_BANKS];
 };
 
+extern struct meminfo meminfo;
+
 #define for_each_nodebank(iter,mi,no)                   \
-        for (iter = 0; iter < mi->nr_banks; iter++)     \
-                if (mi->bank[iter].node == no)
+        for (iter = 0; iter < (mi)->nr_banks; iter++)   \
+                if ((mi)->bank[iter].node == no)
 
 #define bank_pfn_start(bank)    __phys_to_pfn((bank)->start)
 #define bank_pfn_end(bank)      __phys_to_pfn((bank)->start + (bank)->size)
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 727b5c042e52..fad70da5911d 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -114,7 +114,7 @@ extern void local_timer_interrupt(void);
 /*
  * Stop a local timer interrupt.
  */
-extern void local_timer_stop(unsigned int cpu);
+extern void local_timer_stop(void);
 
 /*
  * Platform provides this to acknowledge a local timer IRQ
@@ -123,7 +123,7 @@ extern int local_timer_ack(void);
 
 #else
 
-static inline void local_timer_stop(unsigned int cpu)
+static inline void local_timer_stop(void)
 {
 }
 
@@ -132,7 +132,7 @@ static inline void local_timer_stop(unsigned int cpu)
 /*
  * Setup a local timer interrupt for a CPU.
  */
-extern void local_timer_setup(unsigned int cpu);
+extern void local_timer_setup(void);
 
 /*
  * show local interrupt info
diff --git a/arch/arm/include/asm/string.h b/arch/arm/include/asm/string.h
index e50c4a39b699..cf4f3aad0fc1 100644
--- a/arch/arm/include/asm/string.h
+++ b/arch/arm/include/asm/string.h
@@ -21,7 +21,6 @@ extern void * memmove(void *, const void *, __kernel_size_t);
 #define __HAVE_ARCH_MEMCHR
 extern void * memchr(const void *, int, __kernel_size_t);
 
-#define __HAVE_ARCH_MEMZERO
 #define __HAVE_ARCH_MEMSET
 extern void * memset(void *, int, __kernel_size_t);
 
@@ -39,12 +38,4 @@ extern void __memzero(void *ptr, __kernel_size_t n);
                 (__p);                                                  \
         })
 
-#define memzero(p,n)                                                    \
-        ({                                                              \
-                void *__p = (p); size_t __n = n;                        \
-                if ((__n) != 0)                                         \
-                        __memzero((__p),(__n));                         \
-                (__p);                                                  \
-         })
-
 #endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 568020b34e3e..811be55f338e 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -3,8 +3,6 @@
 
 #ifdef __KERNEL__
 
-#include <asm/memory.h>
-
 #define CPU_ARCH_UNKNOWN        0
 #define CPU_ARCH_ARMv3          1
 #define CPU_ARCH_ARMv4          2
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index e98ec60b3400..7897464e0c24 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -11,7 +11,8 @@
 /*
  * User space memory access functions
  */
-#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/thread_info.h>
 #include <asm/errno.h>
 #include <asm/memory.h>
 #include <asm/domain.h>
@@ -400,7 +401,7 @@ static inline unsigned long __must_check copy_from_user(void *to, const void __u
         if (access_ok(VERIFY_READ, from, n))
                 n = __copy_from_user(to, from, n);
         else /* security hole - plug it */
-                memzero(to, n);
+                memset(to, 0, n);
         return n;
 }
 
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 23af3c972c9a..531e1860e546 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -8,6 +8,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/module.h>
+#include <linux/sched.h>
 #include <linux/string.h>
 #include <linux/cryptohash.h>
 #include <linux/delay.h>
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 60c079d85355..eed2f795e1b3 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -817,7 +817,7 @@ static struct expansion_card *__init ecard_alloc_card(int type, int slot)
         ec->dma = NO_DMA;
         ec->ops = &ecard_default_ops;
 
-        snprintf(ec->dev.bus_id, sizeof(ec->dev.bus_id), "ecard%d", slot);
+        dev_set_name(&ec->dev, "ecard%d", slot);
         ec->dev.parent = NULL;
         ec->dev.bus = &ecard_bus_type;
         ec->dev.dma_mask = &ec->dma_mask;
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index 6c90479e8974..c63842766229 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -95,7 +95,7 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
         return ret;
 }
 
-/* run from kstop_machine */
+/* run from ftrace_init with irqs disabled */
 int __init ftrace_dyn_arch_init(void *data)
 {
         ftrace_mcount_set(data);
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index bde52df1c668..991952c644d1 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -18,7 +18,7 @@
 __switch_data:
         .long   __mmap_switched
         .long   __data_loc                      @ r4
-        .long   __data_start                    @ r5
+        .long   _data                           @ r5
         .long   __bss_start                     @ r6
         .long   _end                            @ r7
         .long   processor_id                    @ r4
diff --git a/arch/arm/kernel/init_task.c b/arch/arm/kernel/init_task.c
index 0bbf80625395..e859af349467 100644
--- a/arch/arm/kernel/init_task.c
+++ b/arch/arm/kernel/init_task.c
@@ -12,7 +12,6 @@
 
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 2f3eb795fa6e..7141cee1fab7 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -174,7 +174,7 @@ static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
         pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu);
 
         spin_lock_irq(&desc->lock);
-        desc->chip->set_affinity(irq, cpumask_of_cpu(cpu));
+        desc->chip->set_affinity(irq, cpumask_of(cpu));
         spin_unlock_irq(&desc->lock);
 }
 
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index 3f9abe0e9aff..f692efddd449 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -92,9 +92,7 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
 void __kprobes arch_remove_kprobe(struct kprobe *p)
 {
         if (p->ainsn.insn) {
-                mutex_lock(&kprobe_mutex);
                 free_insn_slot(p->ainsn.insn, 0);
-                mutex_unlock(&kprobe_mutex);
                 p->ainsn.insn = NULL;
         }
 }
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index b8d965dcd6fd..dab48f27263f 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -21,6 +21,7 @@
 #include <linux/string.h>
 
 #include <asm/pgtable.h>
+#include <asm/sections.h>
 
 #ifdef CONFIG_XIP_KERNEL
 /*
@@ -29,9 +30,8 @@
  * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
  * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
  */
-extern void _etext;
 #undef MODULES_VADDR
-#define MODULES_VADDR   (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
+#define MODULES_VADDR   (((unsigned long)_etext + ~PGDIR_MASK) & PGDIR_MASK)
 #endif
 
 #ifdef CONFIG_MMU
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 1f1eecca7f55..7049815d66d5 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -29,6 +29,7 @@
 #include <asm/cputype.h>
 #include <asm/elf.h>
 #include <asm/procinfo.h>
+#include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/cacheflush.h>
@@ -59,9 +60,8 @@ static int __init fpe_setup(char *line)
 __setup("fpe=", fpe_setup);
 #endif
 
-extern void paging_init(struct meminfo *, struct machine_desc *desc);
+extern void paging_init(struct machine_desc *desc);
 extern void reboot_setup(char *str);
-extern void _text, _etext, __data_start, _edata, _end;
 
 unsigned int processor_id;
 EXPORT_SYMBOL(processor_id);
@@ -112,7 +112,6 @@ static struct stack stacks[NR_CPUS];
 char elf_platform[ELF_PLATFORM_SIZE];
 EXPORT_SYMBOL(elf_platform);
 
-static struct meminfo meminfo __initdata = { 0, };
 static const char *cpu_name;
 static const char *machine_name;
 static char __initdata command_line[COMMAND_LINE_SIZE];
@@ -367,21 +366,34 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
         return list;
 }
 
-static void __init arm_add_memory(unsigned long start, unsigned long size)
+static int __init arm_add_memory(unsigned long start, unsigned long size)
 {
-        struct membank *bank;
+        struct membank *bank = &meminfo.bank[meminfo.nr_banks];
+
+        if (meminfo.nr_banks >= NR_BANKS) {
+                printk(KERN_CRIT "NR_BANKS too low, "
+                        "ignoring memory at %#lx\n", start);
+                return -EINVAL;
+        }
 
         /*
          * Ensure that start/size are aligned to a page boundary.
          * Size is appropriately rounded down, start is rounded up.
          */
         size -= start & ~PAGE_MASK;
-
-        bank = &meminfo.bank[meminfo.nr_banks++];
-
         bank->start = PAGE_ALIGN(start);
         bank->size  = size & PAGE_MASK;
         bank->node  = PHYS_TO_NID(start);
+
+        /*
+         * Check whether this memory region has non-zero size or
+         * invalid node number.
+         */
+        if (bank->size == 0 || bank->node >= MAX_NUMNODES)
+                return -EINVAL;
+
+        meminfo.nr_banks++;
+        return 0;
 }
 
 /*
@@ -472,10 +484,10 @@ request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
         struct resource *res;
         int i;
 
-        kernel_code.start   = virt_to_phys(&_text);
-        kernel_code.end     = virt_to_phys(&_etext - 1);
-        kernel_data.start   = virt_to_phys(&__data_start);
-        kernel_data.end     = virt_to_phys(&_end - 1);
+        kernel_code.start   = virt_to_phys(_text);
+        kernel_code.end     = virt_to_phys(_etext - 1);
+        kernel_data.start   = virt_to_phys(_data);
+        kernel_data.end     = virt_to_phys(_end - 1);
 
         for (i = 0; i < mi->nr_banks; i++) {
                 if (mi->bank[i].size == 0)
@@ -539,14 +551,7 @@ __tagtable(ATAG_CORE, parse_tag_core);
 
 static int __init parse_tag_mem32(const struct tag *tag)
 {
-        if (meminfo.nr_banks >= NR_BANKS) {
-                printk(KERN_WARNING
-                       "Ignoring memory bank 0x%08x size %dKB\n",
-                        tag->u.mem.start, tag->u.mem.size / 1024);
-                return -EINVAL;
-        }
-        arm_add_memory(tag->u.mem.start, tag->u.mem.size);
-        return 0;
+        return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
 }
 
 __tagtable(ATAG_MEM, parse_tag_mem32);
@@ -710,15 +715,15 @@ void __init setup_arch(char **cmdline_p)
                 parse_tags(tags);
         }
 
-        init_mm.start_code = (unsigned long) &_text;
-        init_mm.end_code   = (unsigned long) &_etext;
-        init_mm.end_data   = (unsigned long) &_edata;
-        init_mm.brk        = (unsigned long) &_end;
+        init_mm.start_code = (unsigned long) _text;
+        init_mm.end_code   = (unsigned long) _etext;
+        init_mm.end_data   = (unsigned long) _edata;
+        init_mm.brk        = (unsigned long) _end;
 
         memcpy(boot_command_line, from, COMMAND_LINE_SIZE);
         boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
         parse_cmdline(cmdline_p, from);
-        paging_init(&meminfo, mdesc);
+        paging_init(mdesc);
         request_standard_resources(&meminfo, mdesc);
 
 #ifdef CONFIG_SMP
@@ -772,6 +777,8 @@ static const char *hwcap_str[] = {
         "java",
         "iwmmxt",
         "crunch",
+        "thumbee",
+        "neon",
         NULL
 };
 
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index e42a749a56dd..55fa7ff96a3e 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -34,16 +34,6 @@
 #include <asm/ptrace.h>
 
 /*
- * bitmask of present and online CPUs.
- * The present bitmask indicates that the CPU is physically present.
- * The online bitmask indicates that the CPU is up and running.
- */
-cpumask_t cpu_possible_map;
-EXPORT_SYMBOL(cpu_possible_map);
-cpumask_t cpu_online_map;
-EXPORT_SYMBOL(cpu_online_map);
-
-/*
  * as from 2.5, kernels no longer have an init_tasks structure
  * so we need some other way of telling a new secondary core
  * where to place its SVC stack
@@ -181,7 +171,7 @@ int __cpuexit __cpu_disable(void)
         /*
          * Stop the local timer for this CPU.
          */
-        local_timer_stop(cpu);
+        local_timer_stop();
 
         /*
          * Flush user cache and TLB mappings, and then remove this CPU
@@ -284,7 +274,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         /*
          * Setup local timer for this CPU.
          */
-        local_timer_setup(cpu);
+        local_timer_setup();
 
         calibrate_delay();
 
diff --git a/arch/arm/kernel/thumbee.c b/arch/arm/kernel/thumbee.c
index df3f6b7ebcea..9cb7aaca159f 100644
--- a/arch/arm/kernel/thumbee.c
+++ b/arch/arm/kernel/thumbee.c
@@ -25,7 +25,7 @@
 /*
  * Access to the ThumbEE Handler Base register
  */
-static inline unsigned long teehbr_read()
+static inline unsigned long teehbr_read(void)
 {
         unsigned long v;
         asm("mrc        p14, 6, %0, c1, c0, 0\n" : "=r" (v));
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 4898bdcfe7dd..00216071eaf7 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -119,7 +119,7 @@ SECTIONS
 #endif
 
         .data : AT(__data_loc) {
-                __data_start = .;       /* address in memory */
+                _data = .;              /* address in memory */
 
                 /*
                  * first, the init task union, aligned
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 30351cd4560d..866f84a586ff 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -38,7 +38,6 @@ else
 endif
 
 lib-$(CONFIG_ARCH_RPC)          += ecard.o io-acorn.o floppydma.o
-lib-$(CONFIG_ARCH_CLPS7500)     += io-acorn.o
 lib-$(CONFIG_ARCH_L7200)        += io-acorn.o
 lib-$(CONFIG_ARCH_SHARK)        += io-shark.o
 
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 761eefa76243..650d5923ab83 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -25,7 +25,7 @@
         add     r2, r2, r3              @ 1 (r2 = r2 - (4 - r3))
 /*
  * The pointer is now aligned and the length is adjusted.  Try doing the
- * memzero again.
+ * memset again.
  */
 
 ENTRY(memset)
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
index a8e462f58bc9..20ec83896c37 100644
--- a/arch/arm/mach-aaec2000/Makefile
+++ b/arch/arm/mach-aaec2000/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support (must be linked before board specific support)
-obj-y += core.o clock.o
+obj-y += core.o
 
 # Specific board support
 obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/clock.c b/arch/arm/mach-aaec2000/clock.c
deleted file mode 100644
index e10ee158d720..000000000000
--- a/arch/arm/mach-aaec2000/clock.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- *  linux/arch/arm/mach-aaec2000/clock.c
- *
- *  Copyright (C) 2005 Nicolas Bellido Y Ortega
- *
- *  Based on linux/arch/arm/mach-integrator/clock.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/string.h>
-#include <linux/clk.h>
-#include <linux/mutex.h>
-
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
-
-int clk_enable(struct clk *clk)
-{
-        return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-        return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-        return rate;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-        return 0;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-aaec2000/clock.h b/arch/arm/mach-aaec2000/clock.h
deleted file mode 100644
index d4bb74ff613f..000000000000
--- a/arch/arm/mach-aaec2000/clock.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- *  linux/arch/arm/mach-aaec2000/clock.h
- *
- *  Copyright (C) 2005 Nicolas Bellido Y Ortega
- *
- *  Based on linux/arch/arm/mach-integrator/clock.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-struct module;
-
-struct clk {
-        struct list_head        node;
-        unsigned long           rate;
-        struct module           *owner;
-        const char              *name;
-        void                    *data;
-};
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index dfb26bc23d1a..b5c5fc6ba3a9 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -19,6 +19,7 @@
 #include <linux/interrupt.h>
 #include <linux/timex.h>
 #include <linux/signal.h>
+#include <linux/clk.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -30,7 +31,6 @@
 #include <asm/mach/map.h>
 
 #include "core.h"
-#include "clock.h"
 
 /*
  * Common I/O mapping:
@@ -212,7 +212,7 @@ static struct clcd_board clcd_plat_data = {
 
 static struct amba_device clcd_device = {
         .dev            = {
-                .bus_id                 = "mb:16",
+                .init_name              = "mb:16",
                 .coherent_dma_mask      = ~0,
                 .platform_data          = &clcd_plat_data,
         },
@@ -229,9 +229,28 @@ static struct amba_device *amba_devs[] __initdata = {
         &clcd_device,
 };
 
-static struct clk aaec2000_clcd_clk = {
-        .name = "CLCDCLK",
-};
+void clk_disable(struct clk *clk)
+{
+}
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        return 0;
+}
+
+int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        return dev && strcmp(dev_name(dev), "mb:16") == 0 ? NULL : ERR_PTR(-ENOENT);
+}
+
+void clk_put(struct clk *clk)
+{
+}
 
 void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
 {
@@ -265,8 +284,6 @@ static int __init aaec2000_init(void)
 {
         int i;
 
-        clk_register(&aaec2000_clcd_clk);
-
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
                 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-aaec2000/include/mach/dma.h b/arch/arm/mach-aaec2000/include/mach/dma.h
deleted file mode 100644
index 2da846c72fe7..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- *  arch/arm/mach-aaec2000/include/mach/dma.h
- *
- *  Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- */
diff --git a/arch/arm/mach-aaec2000/include/mach/io.h b/arch/arm/mach-aaec2000/include/mach/io.h
index c87c24de1110..ab4fe5d20eaf 100644
--- a/arch/arm/mach-aaec2000/include/mach/io.h
+++ b/arch/arm/mach-aaec2000/include/mach/io.h
@@ -6,15 +6,13 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-aaec2000/include/mach/memory.h b/arch/arm/mach-aaec2000/include/mach/memory.h
index 56ae900a482e..c00822543d9f 100644
--- a/arch/arm/mach-aaec2000/include/mach/memory.h
+++ b/arch/arm/mach-aaec2000/include/mach/memory.h
@@ -14,9 +14,6 @@
 
 #define PHYS_OFFSET     UL(0xf0000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 /*
  * The nodes are the followings:
  *
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5aafb2e2ca7a..323b47f2b52f 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -7,36 +7,43 @@ choice
 
 config ARCH_AT91RM9200
         bool "AT91RM9200"
+        select CPU_ARM920T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9260
         bool "AT91SAM9260 or AT91SAM9XE"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9261
         bool "AT91SAM9261"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9263
         bool "AT91SAM9263"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9G20
         bool "AT91SAM9G20"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91CAP9
         bool "AT91CAP9"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
@@ -235,6 +242,12 @@ config MACH_USB_A9263
           Select this if you are using a Calao Systems USB-A9263.
           <http://www.calao-systems.com>
 
+config MACH_NEOCORE926
+        bool "Adeneo NEOCORE926"
+        depends on ARCH_AT91SAM9263
+        help
+          Select this if you are using the Adeneo Neocore 926 board.
+
 endif
 
 # ----------------------------------------------------------
@@ -302,7 +315,7 @@ comment "AT91 Board Options"
 
 config MTD_AT91_DATAFLASH_CARD
         bool "Enable DataFlash Card support"
-        depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK)
+        depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK || MACH_NEOCORE926)
         help
           Enable support for the DataFlash card.
 
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index cca612d97ca2..c69ff237fd14 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -11,12 +11,12 @@ obj-$(CONFIG_AT91_PMC_UNIT)	+= clock.o
 
 # CPU-specific support
 obj-$(CONFIG_ARCH_AT91RM9200)   += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
-obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o
+obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o  sam9_smc.o
+obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
 
 # AT91RM9200 board-specific support
@@ -47,6 +47,7 @@ obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
 # AT91SAM9263 board-specific support
 obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
 obj-$(CONFIG_MACH_USB_A9263)    += board-usb-a9263.o
+obj-$(CONFIG_MACH_NEOCORE926)   += board-neocore926.o
 
 # AT91SAM9RL board-specific support
 obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 0fc0adaebd58..0a38c69fdbc4 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -17,6 +17,8 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+
+#include <mach/cpu.h>
 #include <mach/at91cap9.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
@@ -317,6 +319,12 @@ void __init at91cap9_initialize(unsigned long main_clock)
 
         /* Register GPIO subsystem */
         at91_gpio_init(at91cap9_gpio, 4);
+
+        /* Remember the silicon revision */
+        if (cpu_is_at91cap9_revB())
+                system_rev = 0xB;
+        else if (cpu_is_at91cap9_revC())
+                system_rev = 0xC;
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 5ebd4273d353..9eca2209cde6 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -13,6 +13,7 @@
  */
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/irq.h>
 
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
@@ -21,6 +22,7 @@
 #include <video/atmel_lcdc.h>
 
 #include <mach/board.h>
+#include <mach/cpu.h>
 #include <mach/gpio.h>
 #include <mach/at91cap9.h>
 #include <mach/at91cap9_matrix.h>
@@ -69,6 +71,9 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
         if (!data)
                 return;
 
+        if (cpu_is_at91cap9_revB())
+                set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
+
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
                 if (data->vbus_pin[i])
@@ -151,8 +156,13 @@ static struct platform_device at91_usba_udc_device = {
 
 void __init at91_add_device_usba(struct usba_platform_data *data)
 {
-        at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
-                                          AT91_MATRIX_UDPHS_BYPASS_LOCK);
+        if (cpu_is_at91cap9_revB()) {
+                set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
+                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
+                                                  AT91_MATRIX_UDPHS_BYPASS_LOCK);
+        }
+        else
+                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
 
         /*
          * Invalid pins are 0 on AT91, but the usba driver is shared
@@ -406,28 +416,13 @@ static struct platform_device at91cap9_nand_device = {
 
 void __init at91_add_device_nand(struct atmel_nand_data *data)
 {
-        unsigned long csa, mode;
+        unsigned long csa;
 
         if (!data)
                 return;
 
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
-
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1)
-                        | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1));
-
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6)
-                        | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6));
-
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8));
-
-        if (data->bus_width_16)
-                mode = AT91_SMC_DBW_16;
-        else
-                mode = AT91_SMC_DBW_8;
-        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
         if (data->enable_pin)
@@ -865,6 +860,9 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
         if (!data)
                 return;
 
+        if (cpu_is_at91cap9_revB())
+                set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
+
         at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
         at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index a72e798a2a40..1ff1bda0a894 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -141,6 +141,15 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
         /* Use "raw" primitives so we behave correctly on RT kernels. */
         raw_local_irq_save(flags);
 
+        /*
+         * According to Thomas Gleixner irqs are already disabled here.  Simply
+         * removing raw_local_irq_save above (and the matching
+         * raw_local_irq_restore) was not accepted.  See
+         * http://thread.gmane.org/gmane.linux.ports.arm.kernel/41174
+         * So for now (2008-11-20) just warn once if irqs were not disabled ...
+         */
+        WARN_ON_ONCE(!raw_irqs_disabled_flags(flags));
+
         /* The alarm IRQ uses absolute time (now+delta), not the relative
          * time (delta) in our calling convention.  Like all clockevents
          * using such "match" hardware, we have a race to defend against.
@@ -169,7 +178,6 @@ static struct clock_event_device clkevt = {
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .shift          = 32,
         .rating         = 150,
-        .cpumask        = CPU_MASK_CPU0,
         .set_next_event = clkevt32k_next_event,
         .set_mode       = clkevt32k_mode,
 };
@@ -197,7 +205,7 @@ void __init at91rm9200_timer_init(void)
         clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
         clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
         clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
-        clkevt.cpumask = cpumask_of_cpu(0);
+        clkevt.cpumask = cpumask_of(0);
         clockevents_register_device(&clkevt);
 
         /* register clocksource */
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7774d17dde74..fdde1ea21b07 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -313,7 +313,7 @@ static struct platform_device at91sam9260_nand_device = {
 
 void __init at91_add_device_nand(struct atmel_nand_data *data)
 {
-        unsigned long csa, mode;
+        unsigned long csa;
 
         if (!data)
                 return;
@@ -321,42 +321,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
-        if (cpu_is_at91sam9260()) {
-                /* Timing for sam9260 */
-                /* set the bus interface characteristics */
-                at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
-                                | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-
-                at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
-                                | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-
-                at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-
-                if (data->bus_width_16)
-                        mode = AT91_SMC_DBW_16;
-                else
-                        mode = AT91_SMC_DBW_8;
-                at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
-        }
-
-        if (cpu_is_at91sam9g20()) {
-                /* Timing for sam9g20 */
-                /* set the bus interface characteristics */
-                at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0)
-                                | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
-
-                at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(4)
-                                | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(4));
-
-                at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
-
-                if (data->bus_width_16)
-                        mode = AT91_SMC_DBW_16;
-                else
-                        mode = AT91_SMC_DBW_8;
-                at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(3));
-        }
-
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 6b89172310c7..17289756f80f 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -223,7 +223,7 @@ static struct platform_device atmel_nand_device = {
 
 void __init at91_add_device_nand(struct atmel_nand_data *data)
 {
-        unsigned long csa, mode;
+        unsigned long csa;
 
         if (!data)
                 return;
@@ -231,21 +231,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
-                        | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
-                        | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-
-        if (data->bus_width_16)
-                mode = AT91_SMC_DBW_16;
-        else
-                mode = AT91_SMC_DBW_8;
-        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
-
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 8b884083f76d..b753cb879d8e 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -382,7 +382,7 @@ static struct platform_device at91sam9263_nand_device = {
 
 void __init at91_add_device_nand(struct atmel_nand_data *data)
 {
-        unsigned long csa, mode;
+        unsigned long csa;
 
         if (!data)
                 return;
@@ -390,21 +390,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
         at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
-                        | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
-                        | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-
-        if (data->bus_width_16)
-                mode = AT91_SMC_DBW_16;
-        else
-                mode = AT91_SMC_DBW_8;
-        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
-
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 122fd77ed580..b63e1d5f1bad 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -91,7 +91,6 @@ static struct clock_event_device pit_clkevt = {
         .features       = CLOCK_EVT_FEAT_PERIODIC,
         .shift          = 32,
         .rating         = 100,
-        .cpumask        = CPU_MASK_CPU0,
         .set_mode       = pit_clkevt_mode,
 };
 
@@ -173,6 +172,7 @@ static void __init at91sam926x_pit_init(void)
 
         /* Set up and register clockevents */
         pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
+        pit_clkevt.cpumask = cpumask_of(0);
         clockevents_register_device(&pit_clkevt);
 }
 
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 87deb1e1b529..145324f4ec56 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -232,17 +232,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
-                        | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
-                        | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-
-        at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
-
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index cdddca54b938..d3ba29c5d8c8 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -39,7 +39,9 @@
 
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -151,6 +153,32 @@ static struct atmel_nand_data __initdata cam60_nand_data = {
         .partition_info = nand_partitions,
 };
 
+static struct sam9_smc_config __initdata cam60_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init cam60_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &cam60_nand_smc_config);
+
+        at91_add_device_nand(&cam60_nand_data);
+}
+
 
 static void __init cam60_board_init(void)
 {
@@ -165,7 +193,7 @@ static void __init cam60_board_init(void)
         at91_set_gpio_output(AT91_PIN_PB18, 1);
         at91_add_device_usbh(&cam60_usbh_data);
         /* NAND */
-        at91_add_device_nand(&cam60_nand_data);
+        cam60_add_device_nand();
 }
 
 MACHINE_START(CAM60, "KwikByte CAM60")
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 201b89392dcc..83a1a0fef47b 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -36,17 +36,16 @@
 #include <mach/hardware.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
-#include <asm/irq.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/irq.h>
 
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91cap9_matrix.h>
 #include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -195,6 +194,43 @@ static struct atmel_nand_data __initdata cap9adk_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
+        .ncs_read_setup         = 1,
+        .nrd_setup              = 2,
+        .ncs_write_setup        = 1,
+        .nwe_setup              = 2,
+
+        .ncs_read_pulse         = 6,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 6,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 8,
+        .write_cycle            = 8,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 1,
+};
+
+static void __init cap9adk_add_device_nand(void)
+{
+        unsigned long csa;
+
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
+
+        /* setup bus-width (8 or 16) */
+        if (cap9adk_nand_data.bus_width_16)
+                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &cap9adk_nand_smc_config);
+
+        at91_add_device_nand(&cap9adk_nand_data);
+}
+
 
 /*
  * NOR flash
@@ -234,6 +270,24 @@ static struct platform_device cap9adk_nor_flash = {
         .num_resources  = ARRAY_SIZE(nor_flash_resources),
 };
 
+static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
+        .ncs_read_setup         = 2,
+        .nrd_setup              = 4,
+        .ncs_write_setup        = 2,
+        .nwe_setup              = 4,
+
+        .ncs_read_pulse         = 10,
+        .nrd_pulse              = 8,
+        .ncs_write_pulse        = 10,
+        .nwe_pulse              = 8,
+
+        .read_cycle             = 16,
+        .write_cycle            = 16,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
+        .tdf_cycles             = 1,
+};
+
 static __init void cap9adk_add_device_nor(void)
 {
         unsigned long csa;
@@ -241,18 +295,8 @@ static __init void cap9adk_add_device_nor(void)
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
 
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2)
-                        | AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2));
-
-        at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10)
-                        | AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10));
-
-        at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
-
-        at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE
-                        | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
-                        | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
+        /* configure chip-select 0 (NOR) */
+        sam9_smc_configure(0, &cap9adk_nor_smc_config);
 
         platform_device_register(&cap9adk_nor_flash);
 }
@@ -330,10 +374,8 @@ static void __init cap9adk_board_init(void)
         /* Serial */
         at91_add_device_serial();
         /* USB Host */
-        set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
         at91_add_device_usbh(&cap9adk_usbh_data);
         /* USB HS */
-        set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
         at91_add_device_usba(&cap9adk_usba_udc_data);
         /* SPI */
         at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
@@ -344,13 +386,12 @@ static void __init cap9adk_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&cap9adk_macb_data);
         /* NAND */
-        at91_add_device_nand(&cap9adk_nand_data);
+        cap9adk_add_device_nand();
         /* NOR Flash */
         cap9adk_add_device_nor();
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* LCD Controller */
-        set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
         at91_add_device_lcdc(&cap9adk_lcdc_data);
         /* AC97 */
         at91_add_device_ac97(&cap9adk_ac97_data);
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
new file mode 100644
index 000000000000..9ba7ba2cc3b1
--- /dev/null
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -0,0 +1,397 @@
+/*
+ * linux/arch/arm/mach-at91/board-neocore926.c
+ *
+ *  Copyright (C) 2005 SAN People
+ *  Copyright (C) 2007 Atmel Corporation
+ *  Copyright (C) 2008 ADENEO.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/fb.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+
+#include <video/atmel_lcdc.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+
+static void __init neocore926_map_io(void)
+{
+        /* Initialize processor: 20 MHz crystal */
+        at91sam9263_initialize(20000000);
+
+        /* DGBU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
+}
+
+static void __init neocore926_init_irq(void)
+{
+        at91sam9263_init_interrupts(NULL);
+}
+
+
+/*
+ * USB Host port
+ */
+static struct at91_usbh_data __initdata neocore926_usbh_data = {
+        .ports          = 2,
+        .vbus_pin       = { AT91_PIN_PA24, AT91_PIN_PA21 },
+};
+
+/*
+ * USB Device port
+ */
+static struct at91_udc_data __initdata neocore926_udc_data = {
+        .vbus_pin       = AT91_PIN_PA25,
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
+};
+
+
+/*
+ * ADS7846 Touchscreen
+ */
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+static int ads7843_pendown_state(void)
+{
+        return !at91_get_gpio_value(AT91_PIN_PA15);     /* Touchscreen PENIRQ */
+}
+
+static struct ads7846_platform_data ads_info = {
+        .model                  = 7843,
+        .x_min                  = 150,
+        .x_max                  = 3830,
+        .y_min                  = 190,
+        .y_max                  = 3830,
+        .vref_delay_usecs       = 100,
+        .x_plate_ohms           = 450,
+        .y_plate_ohms           = 250,
+        .pressure_max           = 15000,
+        .debounce_max           = 1,
+        .debounce_rep           = 0,
+        .debounce_tol           = (~0),
+        .get_pendown_state      = ads7843_pendown_state,
+};
+
+static void __init neocore926_add_device_ts(void)
+{
+        at91_set_B_periph(AT91_PIN_PA15, 1);    /* External IRQ1, with pullup */
+        at91_set_gpio_input(AT91_PIN_PC13, 1);  /* Touchscreen BUSY signal */
+}
+#else
+static void __init neocore926_add_device_ts(void) {}
+#endif
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info neocore926_spi_devices[] = {
+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
+        {       /* DataFlash card */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 0,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#endif
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+        {
+                .modalias       = "ads7846",
+                .chip_select    = 1,
+                .max_speed_hz   = 125000 * 16,
+                .bus_num        = 0,
+                .platform_data  = &ads_info,
+                .irq            = AT91SAM9263_ID_IRQ1,
+        },
+#endif
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct at91_mmc_data __initdata neocore926_mmc_data = {
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PE18,
+        .wp_pin         = AT91_PIN_PE19,
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata neocore926_macb_data = {
+        .phy_irq_pin    = AT91_PIN_PE31,
+        .is_rmii        = 1,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata neocore926_nand_partition[] = {
+        {
+                .name   = "Linux Kernel",       /* "Partition 1", */
+                .offset = 0,
+                .size   = SZ_8M,
+        },
+        {
+                .name   = "Filesystem",         /* "Partition 2", */
+                .offset = MTDPART_OFS_NXTBLK,
+                .size   = SZ_32M,
+        },
+        {
+                .name   = "Free",               /* "Partition 3", */
+                .offset = MTDPART_OFS_NXTBLK,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(neocore926_nand_partition);
+        return neocore926_nand_partition;
+}
+
+static struct atmel_nand_data __initdata neocore926_nand_data = {
+        .ale                    = 21,
+        .cle                    = 22,
+        .rdy_pin                = AT91_PIN_PB19,
+        .rdy_pin_active_low     = 1,
+        .enable_pin             = AT91_PIN_PD15,
+        .partition_info         = nand_partitions,
+};
+
+static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 4,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 4,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 6,
+        .write_cycle            = 6,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init neocore926_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &neocore926_nand_smc_config);
+
+        at91_add_device_nand(&neocore926_nand_data);
+}
+
+
+/*
+ * LCD Controller
+ */
+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+static struct fb_videomode at91_tft_vga_modes[] = {
+        {
+                .name           = "TX09D50VM1CCA @ 60",
+                .refresh        = 60,
+                .xres           = 240,          .yres           = 320,
+                .pixclock       = KHZ2PICOS(5000),
+
+                .left_margin    = 1,            .right_margin   = 33,
+                .upper_margin   = 1,            .lower_margin   = 0,
+                .hsync_len      = 5,            .vsync_len      = 1,
+
+                .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+};
+
+static struct fb_monspecs at91fb_default_monspecs = {
+        .manufacturer   = "HIT",
+        .monitor        = "TX09D70VM1CCA",
+
+        .modedb         = at91_tft_vga_modes,
+        .modedb_len     = ARRAY_SIZE(at91_tft_vga_modes),
+        .hfmin          = 15000,
+        .hfmax          = 64000,
+        .vfmin          = 50,
+        .vfmax          = 150,
+};
+
+#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
+                                        | ATMEL_LCDC_DISTYPE_TFT \
+                                        | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
+
+static void at91_lcdc_power_control(int on)
+{
+        at91_set_gpio_value(AT91_PIN_PA30, on);
+}
+
+/* Driver datas */
+static struct atmel_lcdfb_info __initdata neocore926_lcdc_data = {
+        .lcdcon_is_backlight            = true,
+        .default_bpp                    = 16,
+        .default_dmacon                 = ATMEL_LCDC_DMAEN,
+        .default_lcdcon2                = AT91SAM9263_DEFAULT_LCDCON2,
+        .default_monspecs               = &at91fb_default_monspecs,
+        .atmel_lcdfb_power_control      = at91_lcdc_power_control,
+        .guard_time                     = 1,
+        .lcd_wiring_mode                = ATMEL_LCDC_WIRING_RGB555,
+};
+
+#else
+static struct atmel_lcdfb_info __initdata neocore926_lcdc_data;
+#endif
+
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button neocore926_buttons[] = {
+        {       /* BP1, "leftclic" */
+                .code           = BTN_LEFT,
+                .gpio           = AT91_PIN_PC5,
+                .active_low     = 1,
+                .desc           = "left_click",
+                .wakeup         = 1,
+        },
+        {       /* BP2, "rightclic" */
+                .code           = BTN_RIGHT,
+                .gpio           = AT91_PIN_PC4,
+                .active_low     = 1,
+                .desc           = "right_click",
+                .wakeup         = 1,
+        },
+};
+
+static struct gpio_keys_platform_data neocore926_button_data = {
+        .buttons        = neocore926_buttons,
+        .nbuttons       = ARRAY_SIZE(neocore926_buttons),
+};
+
+static struct platform_device neocore926_button_device = {
+        .name           = "gpio-keys",
+        .id             = -1,
+        .num_resources  = 0,
+        .dev            = {
+                .platform_data  = &neocore926_button_data,
+        }
+};
+
+static void __init neocore926_add_device_buttons(void)
+{
+        at91_set_GPIO_periph(AT91_PIN_PC5, 0);  /* left button */
+        at91_set_deglitch(AT91_PIN_PC5, 1);
+        at91_set_GPIO_periph(AT91_PIN_PC4, 0);  /* right button */
+        at91_set_deglitch(AT91_PIN_PC4, 1);
+
+        platform_device_register(&neocore926_button_device);
+}
+#else
+static void __init neocore926_add_device_buttons(void) {}
+#endif
+
+
+/*
+ * AC97
+ */
+static struct atmel_ac97_data neocore926_ac97_data = {
+        .reset_pin      = AT91_PIN_PA13,
+};
+
+
+static void __init neocore926_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+
+        /* USB Host */
+        at91_add_device_usbh(&neocore926_usbh_data);
+
+        /* USB Device */
+        at91_add_device_udc(&neocore926_udc_data);
+
+        /* SPI */
+        at91_set_gpio_output(AT91_PIN_PE20, 1);         /* select spi0 clock */
+        at91_add_device_spi(neocore926_spi_devices, ARRAY_SIZE(neocore926_spi_devices));
+
+        /* Touchscreen */
+        neocore926_add_device_ts();
+
+        /* MMC */
+        at91_add_device_mmc(1, &neocore926_mmc_data);
+
+        /* Ethernet */
+        at91_add_device_eth(&neocore926_macb_data);
+
+        /* NAND */
+        neocore926_add_device_nand();
+
+        /* I2C */
+        at91_add_device_i2c(NULL, 0);
+
+        /* LCD Controller */
+        at91_add_device_lcdc(&neocore926_lcdc_data);
+
+        /* Push Buttons */
+        neocore926_add_device_buttons();
+
+        /* AC97 */
+        at91_add_device_ac97(&neocore926_ac97_data);
+}
+
+MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
+        /* Maintainer: ADENEO */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91sam926x_timer,
+        .map_io         = neocore926_map_io,
+        .init_irq       = neocore926_init_irq,
+        .init_machine   = neocore926_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index cfb4571a2e27..4cff9a7e61d2 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -41,8 +41,10 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -147,13 +149,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 /*
  * MCI (SD/MMC)
  */
@@ -227,7 +250,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* Ethernet */
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 99bb4cc23a09..b48346977534 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -38,7 +38,9 @@
 
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -148,13 +150,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * MCI (SD/MMC)
@@ -178,7 +201,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index b49eb6e4918a..93a0f8b100eb 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -42,7 +42,10 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -195,6 +198,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * MCI (SD/MMC)
@@ -303,7 +338,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 4977409d4fc6..d5266da55311 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -47,7 +47,9 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -76,7 +78,7 @@ static void __init ek_init_irq(void)
  * DM9000 ethernet device
  */
 #if defined(CONFIG_DM9000)
-static struct resource at91sam9261_dm9000_resource[] = {
+static struct resource dm9000_resource[] = {
         [0] = {
                 .start  = AT91_CHIPSELECT_2,
                 .end    = AT91_CHIPSELECT_2 + 3,
@@ -98,27 +100,42 @@ static struct dm9000_plat_data dm9000_platdata = {
         .flags          = DM9000_PLATF_16BITONLY,
 };
 
-static struct platform_device at91sam9261_dm9000_device = {
+static struct platform_device dm9000_device = {
         .name           = "dm9000",
         .id             = 0,
-        .num_resources  = ARRAY_SIZE(at91sam9261_dm9000_resource),
-        .resource       = at91sam9261_dm9000_resource,
+        .num_resources  = ARRAY_SIZE(dm9000_resource),
+        .resource       = dm9000_resource,
         .dev            = {
                 .platform_data  = &dm9000_platdata,
         }
 };
 
+/*
+ * SMC timings for the DM9000.
+ * Note: These timings were calculated for MASTER_CLOCK = 100000000 according to the DM9000 timings.
+ */
+static struct sam9_smc_config __initdata dm9000_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 2,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 2,
+
+        .ncs_read_pulse         = 8,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 8,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 16,
+        .write_cycle            = 16,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
+        .tdf_cycles             = 1,
+};
+
 static void __init ek_add_device_dm9000(void)
 {
-        /*
-         * Configure Chip-Select 2 on SMC for the DM9000.
-         * Note: These timings were calculated for MASTER_CLOCK = 100000000
-         *  according to the DM9000 timings.
-         */
-        at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
-        at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
-        at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
-        at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
+        /* Configure chip-select 2 (DM9000) */
+        sam9_smc_configure(2, &dm9000_smc_config);
 
         /* Configure Reset signal as output */
         at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -126,7 +143,7 @@ static void __init ek_add_device_dm9000(void)
         /* Configure Interrupt pin as input, no pull-up */
         at91_set_gpio_input(AT91_PIN_PC11, 0);
 
-        platform_device_register(&at91sam9261_dm9000_device);
+        platform_device_register(&dm9000_device);
 }
 #else
 static void __init ek_add_device_dm9000(void) {}
@@ -197,6 +214,39 @@ static struct atmel_nand_data __initdata ek_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
+
 /*
  * ADS7846 Touchscreen
  */
@@ -525,7 +575,7 @@ static void __init ek_board_init(void)
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* DM9000 ethernet */
         ek_add_device_dm9000();
 
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 8354015c6a23..57d52528f224 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -46,7 +46,9 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -203,6 +205,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * I2C devices
@@ -385,7 +419,7 @@ static void __init ek_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
         /* LCD Controller */
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index b588ead14d68..81439fe6fb3d 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -37,7 +37,9 @@
 
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -156,6 +158,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 2,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 2,
+
+        .ncs_read_pulse         = 4,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 4,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 7,
+        .write_cycle            = 7,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 3,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * MCI (SD/MMC)
@@ -195,7 +229,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 270851864308..9b937ee4815a 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -29,8 +29,9 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
-#include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -103,9 +104,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PD17,
         .enable_pin     = AT91_PIN_PB6,
         .partition_info = nand_partitions,
-        .bus_width_16   = 0,
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * SPI devices
@@ -188,7 +214,7 @@ static void __init ek_board_init(void)
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* MMC */
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 7c350357333a..d13304c0bc45 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -41,8 +41,10 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -121,13 +123,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 /*
  * GPIO Buttons
  */
@@ -189,7 +212,7 @@ static void __init ek_board_init(void)
         /* USB Device */
         at91_add_device_udc(&ek_udc_data);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* Ethernet */
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index 391b566c4571..d96405b7d578 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -40,8 +40,10 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -134,13 +136,35 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PA22,
         .enable_pin     = AT91_PIN_PD15,
         .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
+
 /*
  * GPIO Buttons
  */
@@ -206,7 +230,7 @@ static void __init ek_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* Push Buttons */
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 2e3f2894b704..9561e33b8a9a 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -23,6 +23,7 @@
 #define         AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
 #define         AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */
 #define         AT91RM9200_PMC_MCKUDP   (1 <<  2)               /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
+#define         AT91CAP9_PMC_DDR        (1 <<  2)               /* DDR Clock [AT91CAP9 revC only] */
 #define         AT91RM9200_PMC_UHP      (1 <<  4)               /* USB Host Port Clock [AT91RM9200 only] */
 #define         AT91SAM926x_PMC_UHP     (1 <<  6)               /* USB Host Port Clock [AT91SAM926x only] */
 #define         AT91CAP9_PMC_UHP        (1 <<  6)               /* USB Host Port Clock [AT91CAP9 only] */
@@ -102,10 +103,16 @@
 #define         AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define         AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
 #define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [AT91CAP9 only] */
+#define         AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Clock Oscillator [AT91CAP9 revC only] */
 #define         AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define         AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
 #define         AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
 #define AT91_PMC_IMR            (AT91_PMC + 0x6c)       /* Interrupt Mask Register */
 
+#define AT91_PMC_PROT           (AT91_PMC + 0xe4)       /* Protect Register [AT91CAP9 revC only] */
+#define         AT91_PMC_PROTKEY        0x504d4301      /* Activation Code */
+
+#define AT91_PMC_VER            (AT91_PMC + 0xfc)       /* PMC Module Version [AT91CAP9 only] */
+
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 4a4b64135a92..d8c1ededaa75 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -101,7 +101,9 @@
 #define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
 #define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
 #define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
-#define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
+#define AT91_GPBR       (cpu_is_at91cap9_revB() ?       \
+                        (0xfffffd50 - AT91_BASE_SYS) :  \
+                        (0xfffffd60 - AT91_BASE_SYS))
 
 #define AT91_USART0     AT91CAP9_BASE_US0
 #define AT91_USART1     AT91CAP9_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index dbfd9f73f80b..c554c3e4d553 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -49,6 +49,17 @@ static inline unsigned long at91_arch_identify(void)
         return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
 }
 
+#ifdef CONFIG_ARCH_AT91CAP9
+#include <mach/at91_pmc.h>
+
+#define ARCH_REVISION_CAP9_B    0x399
+#define ARCH_REVISION_CAP9_C    0x601
+
+static inline unsigned long at91cap9_rev_identify(void)
+{
+        return (at91_sys_read(AT91_PMC_VER));
+}
+#endif
 
 #ifdef CONFIG_ARCH_AT91RM9200
 #define cpu_is_at91rm9200()     (at91_cpu_identify() == ARCH_ID_AT91RM9200)
@@ -90,8 +101,12 @@ static inline unsigned long at91_arch_identify(void)
 
 #ifdef CONFIG_ARCH_AT91CAP9
 #define cpu_is_at91cap9()       (at91_cpu_identify() == ARCH_ID_AT91CAP9)
+#define cpu_is_at91cap9_revB()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
+#define cpu_is_at91cap9_revC()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
 #else
 #define cpu_is_at91cap9()       (0)
+#define cpu_is_at91cap9_revB()  (0)
+#define cpu_is_at91cap9_revC()  (0)
 #endif
 
 /*
diff --git a/arch/arm/mach-at91/include/mach/dma.h b/arch/arm/mach-at91/include/mach/dma.h
deleted file mode 100644
index e4f90c177616..000000000000
--- a/arch/arm/mach-at91/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/dma.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 1611bd03f528..0b0cccc46e68 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -23,8 +23,8 @@
 
 #define IO_SPACE_LIMIT          0xFFFFFFFF
 
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 
 #ifndef __ASSEMBLY__
diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h
index 9dd1b8c79b08..14f4ef4b6a9e 100644
--- a/arch/arm/mach-at91/include/mach/memory.h
+++ b/arch/arm/mach-at91/include/mach/memory.h
@@ -25,15 +25,4 @@
 
 #define PHYS_OFFSET     (AT91_SDRAM_BASE)
 
-
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
new file mode 100644
index 000000000000..5eab6aa621d0
--- /dev/null
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -0,0 +1,47 @@
+/*
+ * linux/arch/arm/mach-at91/sam9_smc.c
+ *
+ * Copyright (C) 2008 Andrew Victor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+
+#include <mach/at91sam9_smc.h>
+
+#include "sam9_smc.h"
+
+void __init sam9_smc_configure(int cs, struct sam9_smc_config* config)
+{
+        /* Setup register */
+        at91_sys_write(AT91_SMC_SETUP(cs),
+                  AT91_SMC_NWESETUP_(config->nwe_setup)
+                | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
+                | AT91_SMC_NRDSETUP_(config->nrd_setup)
+                | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup)
+        );
+
+        /* Pulse register */
+        at91_sys_write(AT91_SMC_PULSE(cs),
+                  AT91_SMC_NWEPULSE_(config->nwe_pulse)
+                | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
+                | AT91_SMC_NRDPULSE_(config->nrd_pulse)
+                | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse)
+        );
+
+        /* Cycle register */
+        at91_sys_write(AT91_SMC_CYCLE(cs),
+                  AT91_SMC_NWECYCLE_(config->write_cycle)
+                | AT91_SMC_NRDCYCLE_(config->read_cycle)
+        );
+
+        /* Mode register */
+        at91_sys_write(AT91_SMC_MODE(cs),
+                  config->mode
+                | AT91_SMC_TDF_(config->tdf_cycles)
+        );
+}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
new file mode 100644
index 000000000000..bf72cfb3455b
--- /dev/null
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -0,0 +1,33 @@
+/*
+ * linux/arch/arm/mach-at91/sam9_smc.
+ *
+ * Copyright (C) 2008 Andrew Victor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+struct sam9_smc_config {
+        /* Setup register */
+        u8 ncs_read_setup;
+        u8 nrd_setup;
+        u8 ncs_write_setup;
+        u8 nwe_setup;
+
+        /* Pulse register */
+        u8 ncs_read_pulse;
+        u8 nrd_pulse;
+        u8 ncs_write_pulse;
+        u8 nwe_pulse;
+
+        /* Cycle register */
+        u16 read_cycle;
+        u16 write_cycle;
+
+        /* Mode register */
+        u32 mode;
+        u8 tdf_cycles:4;
+};
+
+extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config);
diff --git a/arch/arm/mach-clps711x/include/mach/dma.h b/arch/arm/mach-clps711x/include/mach/dma.h
deleted file mode 100644
index 0d620e869536..000000000000
--- a/arch/arm/mach-clps711x/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/dma.h
- *
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-clps711x/include/mach/io.h b/arch/arm/mach-clps711x/include/mach/io.h
index 4c8440087679..2e0b3ced8f07 100644
--- a/arch/arm/mach-clps711x/include/mach/io.h
+++ b/arch/arm/mach-clps711x/include/mach/io.h
@@ -20,12 +20,10 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 /*
  * We don't support ins[lb]/outs[lb].  Make them fault.
diff --git a/arch/arm/mach-clps711x/include/mach/memory.h b/arch/arm/mach-clps711x/include/mach/memory.h
index 98ec30c97bbe..e522b20bcbc2 100644
--- a/arch/arm/mach-clps711x/include/mach/memory.h
+++ b/arch/arm/mach-clps711x/include/mach/memory.h
@@ -26,25 +26,7 @@
  */
 #define PHYS_OFFSET     UL(0xc0000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-
-#if defined(CONFIG_ARCH_CDB89712)
-
-#define __virt_to_bus(x)        (x)
-#define __bus_to_virt(x)        (x)
-
-#elif defined (CONFIG_ARCH_AUTCPU12)
-
-#define __virt_to_bus(x)        (x)
-#define __bus_to_virt(x)        (x)
-
-#else
+#if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12)
 
 #define __virt_to_bus(x)        ((x) - PAGE_OFFSET)
 #define __bus_to_virt(x)        ((x) + PAGE_OFFSET)
diff --git a/arch/arm/mach-clps7500/Makefile b/arch/arm/mach-clps7500/Makefile
deleted file mode 100644
index 4bd8ebd70e7b..000000000000
--- a/arch/arm/mach-clps7500/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-
-obj-y                   := core.o
-obj-m                   :=
-obj-n                   :=
-obj-                    :=
-
diff --git a/arch/arm/mach-clps7500/Makefile.boot b/arch/arm/mach-clps7500/Makefile.boot
deleted file mode 100644
index fe16506c1540..000000000000
--- a/arch/arm/mach-clps7500/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
-   zreladdr-y   := 0x10008000
-
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
deleted file mode 100644
index 7e247c04d41c..000000000000
--- a/arch/arm/mach-clps7500/core.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- *  linux/arch/arm/mach-clps7500/core.c
- *
- *  Copyright (C) 1998 Russell King
- *  Copyright (C) 1999 Nexus Electronics Ltd
- *
- * Extra MM routines for CL7500 architecture
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/list.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/serial_8250.h>
-#include <linux/io.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-
-#include <mach/hardware.h>
-#include <asm/hardware/iomd.h>
-#include <asm/irq.h>
-#include <asm/mach-types.h>
-
-unsigned int vram_size;
-
-static void cl7500_ack_irq_a(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << irq;
-        val = iomd_readb(IOMD_IRQMASKA);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKA);
-        iomd_writeb(mask, IOMD_IRQCLRA);
-}
-
-static void cl7500_mask_irq_a(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << irq;
-        val = iomd_readb(IOMD_IRQMASKA);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKA);
-}
-
-static void cl7500_unmask_irq_a(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << irq;
-        val = iomd_readb(IOMD_IRQMASKA);
-        iomd_writeb(val | mask, IOMD_IRQMASKA);
-}
-
-static struct irq_chip clps7500_a_chip = {
-        .ack    = cl7500_ack_irq_a,
-        .mask   = cl7500_mask_irq_a,
-        .unmask = cl7500_unmask_irq_a,
-};
-
-static void cl7500_mask_irq_b(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKB);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKB);
-}
-
-static void cl7500_unmask_irq_b(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKB);
-        iomd_writeb(val | mask, IOMD_IRQMASKB);
-}
-
-static struct irq_chip clps7500_b_chip = {
-        .ack    = cl7500_mask_irq_b,
-        .mask   = cl7500_mask_irq_b,
-        .unmask = cl7500_unmask_irq_b,
-};
-
-static void cl7500_mask_irq_c(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKC);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKC);
-}
-
-static void cl7500_unmask_irq_c(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKC);
-        iomd_writeb(val | mask, IOMD_IRQMASKC);
-}
-
-static struct irq_chip clps7500_c_chip = {
-        .ack    = cl7500_mask_irq_c,
-        .mask   = cl7500_mask_irq_c,
-        .unmask = cl7500_unmask_irq_c,
-};
-
-static void cl7500_mask_irq_d(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKD);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKD);
-}
-
-static void cl7500_unmask_irq_d(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKD);
-        iomd_writeb(val | mask, IOMD_IRQMASKD);
-}
-
-static struct irq_chip clps7500_d_chip = {
-        .ack    = cl7500_mask_irq_d,
-        .mask   = cl7500_mask_irq_d,
-        .unmask = cl7500_unmask_irq_d,
-};
-
-static void cl7500_mask_irq_dma(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_DMAMASK);
-        iomd_writeb(val & ~mask, IOMD_DMAMASK);
-}
-
-static void cl7500_unmask_irq_dma(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_DMAMASK);
-        iomd_writeb(val | mask, IOMD_DMAMASK);
-}
-
-static struct irq_chip clps7500_dma_chip = {
-        .ack    = cl7500_mask_irq_dma,
-        .mask   = cl7500_mask_irq_dma,
-        .unmask = cl7500_unmask_irq_dma,
-};
-
-static void cl7500_mask_irq_fiq(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_FIQMASK);
-        iomd_writeb(val & ~mask, IOMD_FIQMASK);
-}
-
-static void cl7500_unmask_irq_fiq(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_FIQMASK);
-        iomd_writeb(val | mask, IOMD_FIQMASK);
-}
-
-static struct irq_chip clps7500_fiq_chip = {
-        .ack    = cl7500_mask_irq_fiq,
-        .mask   = cl7500_mask_irq_fiq,
-        .unmask = cl7500_unmask_irq_fiq,
-};
-
-static void cl7500_no_action(unsigned int irq)
-{
-}
-
-static struct irq_chip clps7500_no_chip = {
-        .ack    = cl7500_no_action,
-        .mask   = cl7500_no_action,
-        .unmask = cl7500_no_action,
-};
-
-static struct irqaction irq_isa = {
-        .handler = no_action,
-        .mask = CPU_MASK_NONE,
-        .name = "isa",
-};
-
-static void __init clps7500_init_irq(void)
-{
-        unsigned int irq, flags;
-
-        iomd_writeb(0, IOMD_IRQMASKA);
-        iomd_writeb(0, IOMD_IRQMASKB);
-        iomd_writeb(0, IOMD_FIQMASK);
-        iomd_writeb(0, IOMD_DMAMASK);
-
-        for (irq = 0; irq < NR_IRQS; irq++) {
-                flags = IRQF_VALID;
-
-                if (irq <= 6 || (irq >= 9 && irq <= 15) ||
-                    (irq >= 48 && irq <= 55))
-                        flags |= IRQF_PROBE;
-
-                switch (irq) {
-                case 0 ... 7:
-                        set_irq_chip(irq, &clps7500_a_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 8 ... 15:
-                        set_irq_chip(irq, &clps7500_b_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 16 ... 22:
-                        set_irq_chip(irq, &clps7500_dma_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 24 ... 31:
-                        set_irq_chip(irq, &clps7500_c_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 40 ... 47:
-                        set_irq_chip(irq, &clps7500_d_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 48 ... 55:
-                        set_irq_chip(irq, &clps7500_no_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 64 ... 72:
-                        set_irq_chip(irq, &clps7500_fiq_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-                }
-        }
-
-        setup_irq(IRQ_ISA, &irq_isa);
-}
-
-static struct map_desc cl7500_io_desc[] __initdata = {
-        {       /* IO space     */
-                .virtual        = (unsigned long)IO_BASE,
-                .pfn            = __phys_to_pfn(IO_START),
-                .length         = IO_SIZE,
-                .type           = MT_DEVICE
-        }, {    /* ISA space    */
-                .virtual        = ISA_BASE,
-                .pfn            = __phys_to_pfn(ISA_START),
-                .length         = ISA_SIZE,
-                .type           = MT_DEVICE
-        }, {    /* Flash        */
-                .virtual        = CLPS7500_FLASH_BASE,
-                .pfn            = __phys_to_pfn(CLPS7500_FLASH_START),
-                .length         = CLPS7500_FLASH_SIZE,
-                .type           = MT_DEVICE
-        }, {    /* LED          */
-                .virtual        = LED_BASE,
-                .pfn            = __phys_to_pfn(LED_START),
-                .length         = LED_SIZE,
-                .type           = MT_DEVICE
-        }
-};
-
-static void __init clps7500_map_io(void)
-{
-        iotable_init(cl7500_io_desc, ARRAY_SIZE(cl7500_io_desc));
-}
-
-extern void ioctime_init(void);
-extern unsigned long ioc_timer_gettimeoffset(void);
-
-static irqreturn_t
-clps7500_timer_interrupt(int irq, void *dev_id)
-{
-        timer_tick();
-
-        /* Why not using do_leds interface?? */
-        {
-                /* Twinkle the lights. */
-                static int count, state = 0xff00;
-                if (count-- == 0) {
-                        state ^= 0x100;
-                        count = 25;
-                        *((volatile unsigned int *)LED_ADDRESS) = state;
-                }
-        }
-
-        return IRQ_HANDLED;
-}
-
-static struct irqaction clps7500_timer_irq = {
-        .name           = "CLPS7500 Timer Tick",
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = clps7500_timer_interrupt,
-};
-
-/*
- * Set up timer interrupt.
- */
-static void __init clps7500_timer_init(void)
-{
-        ioctime_init();
-        setup_irq(IRQ_TIMER, &clps7500_timer_irq);
-}
-
-static struct sys_timer clps7500_timer = {
-        .init           = clps7500_timer_init,
-        .offset         = ioc_timer_gettimeoffset,
-};
-
-static struct plat_serial8250_port serial_platform_data[] = {
-        {
-                .mapbase        = 0x03010fe0,
-                .irq            = 10,
-                .uartclk        = 1843200,
-                .regshift       = 2,
-                .iotype         = UPIO_MEM,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
-        },
-        {
-                .mapbase        = 0x03010be0,
-                .irq            = 0,
-                .uartclk        = 1843200,
-                .regshift       = 2,
-                .iotype         = UPIO_MEM,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
-        },
-        {
-                .iobase         = ISASLOT_IO + 0x2e8,
-                .irq            = 41,
-                .uartclk        = 1843200,
-                .regshift       = 0,
-                .iotype         = UPIO_PORT,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-        },
-        {
-                .iobase         = ISASLOT_IO + 0x3e8,
-                .irq            = 40,
-                .uartclk        = 1843200,
-                .regshift       = 0,
-                .iotype         = UPIO_PORT,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-        },
-        { },
-};
-
-static struct platform_device serial_device = {
-        .name                   = "serial8250",
-        .id                     = PLAT8250_DEV_PLATFORM,
-        .dev                    = {
-                .platform_data  = serial_platform_data,
-        },
-};
-
-static void __init clps7500_init(void)
-{
-        platform_device_register(&serial_device);
-}
-
-MACHINE_START(CLPS7500, "CL-PS7500")
-        /* Maintainer: Philip Blundell */
-        .phys_io        = 0x03000000,
-        .io_pg_offst    = ((0xe0000000) >> 18) & 0xfffc,
-        .map_io         = clps7500_map_io,
-        .init_irq       = clps7500_init_irq,
-        .init_machine   = clps7500_init,
-        .timer          = &clps7500_timer,
-MACHINE_END
-
diff --git a/arch/arm/mach-clps7500/include/mach/acornfb.h b/arch/arm/mach-clps7500/include/mach/acornfb.h
deleted file mode 100644
index aea6330c9745..000000000000
--- a/arch/arm/mach-clps7500/include/mach/acornfb.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119)
-
-static inline void
-acornfb_vidc20_find_rates(struct vidc_timing *vidc,
-                          struct fb_var_screeninfo *var)
-{
-        u_int bandwidth;
-  
-        vidc->control |= VIDC20_CTRL_PIX_CK;
-
-        /* Calculate bandwidth */
-        bandwidth = var->pixclock * 8 / var->bits_per_pixel;
-
-        /* Encode bandwidth as VIDC20 setting */
-        if (bandwidth > 16667*2)
-                vidc->control |= VIDC20_CTRL_FIFO_16;
-        else if (bandwidth > 13333*2)
-                vidc->control |= VIDC20_CTRL_FIFO_20;
-        else if (bandwidth > 11111*2)
-                vidc->control |= VIDC20_CTRL_FIFO_24;
-        else
-                vidc->control |= VIDC20_CTRL_FIFO_28;
-
-        vidc->pll_ctl  = 0x2020;
-}
-
-#ifdef CONFIG_CHRONTEL_7003
-#define acornfb_default_control()       VIDC20_CTRL_PIX_HCLK
-#else
-#define acornfb_default_control()       VIDC20_CTRL_PIX_VCLK
-#endif
-
-#define acornfb_default_econtrol()      VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK
diff --git a/arch/arm/mach-clps7500/include/mach/debug-macro.S b/arch/arm/mach-clps7500/include/mach/debug-macro.S
deleted file mode 100644
index af4104e7e84a..000000000000
--- a/arch/arm/mach-clps7500/include/mach/debug-macro.S
+++ /dev/null
@@ -1,21 +0,0 @@
-/* arch/arm/mach-clps7500/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
-
-                .macro  addruart,rx
-                mov     \rx, #0xe0000000
-                orr     \rx, \rx, #0x00010000
-                orr     \rx, \rx, #0x00000be0
-                .endm
-
-#define UART_SHIFT      2
-#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-clps7500/include/mach/dma.h b/arch/arm/mach-clps7500/include/mach/dma.h
deleted file mode 100644
index 63fcde505498..000000000000
--- a/arch/arm/mach-clps7500/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/dma.h
- *
- * Copyright (C) 1999 Nexus Electronics Ltd.
- */
-
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
-
-/*
- * This is the maximum DMA address that can be DMAd to.
- * There should not be more than (0xd0000000 - 0xc0000000)
- * bytes of RAM.
- */
-#define MAX_DMA_ADDRESS         0xd0000000
-
-#define DMA_S0                  0
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-clps7500/include/mach/entry-macro.S b/arch/arm/mach-clps7500/include/mach/entry-macro.S
deleted file mode 100644
index 4e7e54144093..000000000000
--- a/arch/arm/mach-clps7500/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-iomd.S>
-
-        .equ    ioc_base_high, IOC_BASE & 0xff000000
-        .equ    ioc_base_low, IOC_BASE & 0x00ff0000
-
-        .macro  get_irqnr_preamble, base, tmp
-        mov     \base, #ioc_base_high           @ point at IOC
-        .if     ioc_base_low
-        orr     \base, \base, #ioc_base_low
-        .endif
-        .endm
-
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-
diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h
deleted file mode 100644
index a6ad1d44badf..000000000000
--- a/arch/arm/mach-clps7500/include/mach/hardware.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/hardware.h
- *
- * Copyright (C) 1996-1999 Russell King.
- * Copyright (C) 1999 Nexus Electronics Ltd.
- *
- * This file contains the hardware definitions of the 
- * CL7500 evaluation board.
- */
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <mach/memory.h>
-#include <asm/hardware/iomd.h>
-
-#ifdef __ASSEMBLY__
-#define IOMEM(x) x
-#else
-#define IOMEM(x) ((void __iomem *)(x))
-#endif
-
-/*
- * What hardware must be present
- */
-#define HAS_IOMD
-#define HAS_VIDC20
-
-/* Hardware addresses of major areas.
- *  *_START is the physical address
- *  *_SIZE  is the size of the region
- *  *_BASE  is the virtual address
- */
-
-#define IO_START                0x03000000      /* I/O */
-#define IO_SIZE                 0x01000000
-#define IO_BASE                 IOMEM(0xe0000000)
-
-#define ISA_START               0x0c000000      /* ISA */
-#define ISA_SIZE                0x00010000
-#define ISA_BASE                0xe1000000
-
-#define CLPS7500_FLASH_START    0x01000000      /* XXX */
-#define CLPS7500_FLASH_SIZE     0x01000000
-#define CLPS7500_FLASH_BASE     0xe2000000
-
-#define LED_START               0x0302B000
-#define LED_SIZE                0x00001000
-#define LED_BASE                0xe3000000
-#define LED_ADDRESS             (LED_BASE + 0xa00)
-
-/* Let's define SCREEN_START for CL7500, even though it's a lie. */
-#define SCREEN_START            0x02000000      /* VRAM */
-#define SCREEN_END              0xdfc00000
-#define SCREEN_BASE             0xdf800000
-
-#define VIDC_BASE               (void __iomem *)0xe0400000
-#define IOMD_BASE               IOMEM(0xe0200000)
-#define IOC_BASE                IOMEM(0xe0200000)
-#define FLOPPYDMA_BASE          IOMEM(0xe002a000)
-#define PCIO_BASE               IOMEM(0xe0010000)
-
-#define vidc_writel(val)        __raw_writel(val, VIDC_BASE)
-
-/* in/out bias for the ISA slot region */
-#define ISASLOT_IO              0x80400000
-
-#endif
diff --git a/arch/arm/mach-clps7500/include/mach/io.h b/arch/arm/mach-clps7500/include/mach/io.h
deleted file mode 100644
index 2ff2860889ed..000000000000
--- a/arch/arm/mach-clps7500/include/mach/io.h
+++ /dev/null
@@ -1,255 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/io.h
- *  from arch/arm/mach-rpc/include/mach/io.h
- *
- * Copyright (C) 1997 Russell King
- *
- * Modifications:
- *  06-Dec-1997 RMK     Created.
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#include <mach/hardware.h>
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * GCC is totally crap at loading/storing data.  We try to persuade it
- * to do the right thing by using these whereever possible instead of
- * the above.
- */
-#define __arch_base_getb(b,o)                   \
- ({                                             \
-        unsigned int v, r = (b);                \
-        __asm__ __volatile__(                   \
-                "ldrb   %0, [%1, %2]"           \
-                : "=r" (v)                      \
-                : "r" (r), "Ir" (o));           \
-        v;                                      \
- })
-
-#define __arch_base_getl(b,o)                   \
- ({                                             \
-        unsigned int v, r = (b);                \
-        __asm__ __volatile__(                   \
-                "ldr    %0, [%1, %2]"           \
-                : "=r" (v)                      \
-                : "r" (r), "Ir" (o));           \
-        v;                                      \
- })
-
-#define __arch_base_putb(v,b,o)                 \
- ({                                             \
-        unsigned int r = (b);                   \
-        __asm__ __volatile__(                   \
-                "strb   %0, [%1, %2]"           \
-                :                               \
-                : "r" (v), "r" (r), "Ir" (o));  \
- })
-
-#define __arch_base_putl(v,b,o)                 \
- ({                                             \
-        unsigned int r = (b);                   \
-        __asm__ __volatile__(                   \
-                "str    %0, [%1, %2]"           \
-                :                               \
-                : "r" (v), "r" (r), "Ir" (o));  \
- })
-
-/*
- * We use two different types of addressing - PC style addresses, and ARM
- * addresses.  PC style accesses the PC hardware with the normal PC IO
- * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
- * and are translated to the start of IO.  Note that all addresses are
- * shifted left!
- */
-#define __PORT_PCIO(x)  (!((x) & 0x80000000))
-
-/*
- * Dynamic IO functions - let the compiler
- * optimize the expressions
- */
-static inline void __outb (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "strb   %1, [%0, %2, lsl #2]    @ outb"
-        : "=&r" (temp)
-        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-static inline void __outw (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "str    %1, [%0, %2, lsl #2]    @ outw"
-        : "=&r" (temp)
-        : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-static inline void __outl (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "str    %1, [%0, %2, lsl #2]    @ outl"
-        : "=&r" (temp)
-        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-#define DECLARE_DYN_IN(sz,fnsuffix,instr)                                       \
-static inline unsigned sz __in##fnsuffix (unsigned int port)            \
-{                                                                               \
-        unsigned long temp, value;                                              \
-        __asm__ __volatile__(                                                   \
-        "tst    %2, #0x80000000\n\t"                                            \
-        "mov    %0, %4\n\t"                                                     \
-        "addeq  %0, %0, %3\n\t"                                                 \
-        "ldr" instr "   %1, [%0, %2, lsl #2]    @ in" #fnsuffix                 \
-        : "=&r" (temp), "=r" (value)                                            \
-        : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)                \
-        : "cc");                                                                \
-        return (unsigned sz)value;                                              \
-}
-
-static inline unsigned int __ioaddr (unsigned int port)                 \
-{                                                                               \
-        if (__PORT_PCIO(port))                                                  \
-                return (unsigned int)(PCIO_BASE + (port << 2));                 \
-        else                                                                    \
-                return (unsigned int)(IO_BASE + (port << 2));                   \
-}
-
-#define DECLARE_IO(sz,fnsuffix,instr)   \
-        DECLARE_DYN_IN(sz,fnsuffix,instr)
-
-DECLARE_IO(char,b,"b")
-DECLARE_IO(short,w,"")
-DECLARE_IO(int,l,"")
-
-#undef DECLARE_IO
-#undef DECLARE_DYN_IN
-
-/*
- * Constant address IO functions
- *
- * These have to be macros for the 'J' constraint to work -
- * +/-4096 immediate operand.
- */
-#define __outbc(value,port)                                                     \
-({                                                                              \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "strb   %0, [%1, %2]    @ outbc"                                \
-                : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2));          \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "strb   %0, [%1, %2]    @ outbc"                                \
-                : : "r" (value), "r" (IO_BASE), "r" ((port) << 2));             \
-})
-
-#define __inbc(port)                                                            \
-({                                                                              \
-        unsigned char result;                                                   \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldrb   %0, [%1, %2]    @ inbc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldrb   %0, [%1, %2]    @ inbc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result;                                                                 \
-})
-
-#define __outwc(value,port)                                                     \
-({                                                                              \
-        unsigned long v = value;                                                \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outwc"                                \
-                : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2));        \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outwc"                                \
-                : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2));           \
-})
-
-#define __inwc(port)                                                            \
-({                                                                              \
-        unsigned short result;                                                  \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inwc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inwc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result & 0xffff;                                                        \
-})
-
-#define __outlc(value,port)                                                     \
-({                                                                              \
-        unsigned long v = value;                                                \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outlc"                                \
-                : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2));              \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outlc"                                \
-                : : "r" (v), "r" (IO_BASE), "r" ((port) << 2));                 \
-})
-
-#define __inlc(port)                                                            \
-({                                                                              \
-        unsigned long result;                                                   \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inlc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inlc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result;                                                                 \
-})
-
-#define __ioaddrc(port)                                                         \
-        (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
-
-#define inb(p)          (__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
-#define inw(p)          (__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
-#define inl(p)          (__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
-#define outb(v,p)       (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
-#define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
-#define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
-#define __ioaddr(p)     (__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
-/* the following macro is deprecated */
-#define ioaddr(port)                    __ioaddr((port))
-
-#define insb(p,d,l)     __raw_readsb(__ioaddr(p),d,l)
-#define insw(p,d,l)     __raw_readsw(__ioaddr(p),d,l)
-
-#define outsb(p,d,l)    __raw_writesb(__ioaddr(p),d,l)
-#define outsw(p,d,l)    __raw_writesw(__ioaddr(p),d,l)
-
-/*
- * 1:1 mapping for ioremapped regions.
- */
-#define __mem_pci(x)    (x)
-
-#endif
diff --git a/arch/arm/mach-clps7500/include/mach/irq.h b/arch/arm/mach-clps7500/include/mach/irq.h
deleted file mode 100644
index d02fcf28ee05..000000000000
--- a/arch/arm/mach-clps7500/include/mach/irq.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/irq.h
- *
- * Copyright (C) 1996 Russell King
- * Copyright (C) 1999, 2001 Nexus Electronics Ltd.
- *
- * Changelog:
- *   10-10-1996 RMK     Brought up to date with arch-sa110eval
- *   22-08-1998 RMK     Restructured IRQ routines
- *   11-08-1999 PJB     Created ARM7500 version, derived from RiscPC code
- */
-
-#include <linux/io.h>
-#include <asm/hardware/iomd.h>
-
-static inline int fixup_irq(unsigned int irq)
-{
-        if (irq == IRQ_ISA) {
-                int isabits = *((volatile unsigned int *)0xe002b700);
-                if (isabits == 0) {
-                        printk("Spurious ISA IRQ!\n");
-                        return irq;
-                }
-                irq = IRQ_ISA_BASE;
-                while (!(isabits & 1)) {
-                        irq++;
-                        isabits >>= 1;
-                }
-        }
-
-        return irq;
-}
diff --git a/arch/arm/mach-clps7500/include/mach/irqs.h b/arch/arm/mach-clps7500/include/mach/irqs.h
deleted file mode 100644
index bee66b487f59..000000000000
--- a/arch/arm/mach-clps7500/include/mach/irqs.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/irqs.h
- *
- * Copyright (C) 1999 Nexus Electronics Ltd
- */
-
-#define IRQ_INT2                0
-#define IRQ_INT1                2
-#define IRQ_VSYNCPULSE          3
-#define IRQ_POWERON             4
-#define IRQ_TIMER0              5
-#define IRQ_TIMER1              6
-#define IRQ_FORCE               7
-#define IRQ_INT8                8
-#define IRQ_ISA                 9
-#define IRQ_INT6                10
-#define IRQ_INT5                11
-#define IRQ_INT4                12
-#define IRQ_INT3                13
-#define IRQ_KEYBOARDTX          14
-#define IRQ_KEYBOARDRX          15
-
-#define IRQ_DMA0                16
-#define IRQ_DMA1                17
-#define IRQ_DMA2                18
-#define IRQ_DMA3                19
-#define IRQ_DMAS0               20
-#define IRQ_DMAS1               21
-
-#define IRQ_IOP0                24
-#define IRQ_IOP1                25
-#define IRQ_IOP2                26
-#define IRQ_IOP3                27
-#define IRQ_IOP4                28
-#define IRQ_IOP5                29
-#define IRQ_IOP6                30
-#define IRQ_IOP7                31
-
-#define IRQ_MOUSERX             40
-#define IRQ_MOUSETX             41
-#define IRQ_ADC                 42
-#define IRQ_EVENT1              43
-#define IRQ_EVENT2              44
-
-#define IRQ_ISA_BASE            48
-#define IRQ_ISA_3               48
-#define IRQ_ISA_4               49
-#define IRQ_ISA_5               50
-#define IRQ_ISA_7               51
-#define IRQ_ISA_9               52
-#define IRQ_ISA_10              53
-#define IRQ_ISA_11              54
-#define IRQ_ISA_14              55      
-
-#define FIQ_INT9                0
-#define FIQ_INT5                1
-#define FIQ_INT6                4
-#define FIQ_INT8                6
-#define FIQ_FORCE               7
-
-/*
- * This is the offset of the FIQ "IRQ" numbers
- */
-#define FIQ_START               64
-
-#define IRQ_TIMER               IRQ_TIMER0
diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h
deleted file mode 100644
index 87b32db470c8..000000000000
--- a/arch/arm/mach-clps7500/include/mach/memory.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/memory.h
- *
- * Copyright (c) 1996,1997,1998 Russell King.
- *
- * Changelog:
- *  20-Oct-1996 RMK     Created
- *  31-Dec-1997 RMK     Fixed definitions to reduce warnings
- *  11-Jan-1998 RMK     Uninlined to reduce hits on cache
- *  08-Feb-1998 RMK     Added __virt_to_bus and __bus_to_virt
- *  21-Mar-1999 RMK     Renamed to memory.h
- *              RMK     Added TASK_SIZE and PAGE_OFFSET
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/*
- * Physical DRAM offset.
- */
-#define PHYS_OFFSET     UL(0x10000000)
-
-/*
- * These are exactly the same on the RiscPC as the
- * physical memory view.
- */
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
-/*
- * Cache flushing area - ROM
- */
-#define FLUSH_BASE_PHYS         0x00000000
-#define FLUSH_BASE              0xdf000000
-
-/*
- * Sparsemem support.  Each section is a maximum of 64MB.  The sections
- * are offset by 128MB and can cover 128MB, so that gives us a maximum
- * of 29 physmem bits.
- */
-#define MAX_PHYSMEM_BITS        29
-#define SECTION_SIZE_BITS       26
-
-#endif
diff --git a/arch/arm/mach-clps7500/include/mach/system.h b/arch/arm/mach-clps7500/include/mach/system.h
deleted file mode 100644
index 6d325fbe8b08..000000000000
--- a/arch/arm/mach-clps7500/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/system.h
- *
- * Copyright (c) 1999 Nexus Electronics Ltd.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <linux/io.h>
-#include <asm/hardware/iomd.h>
-
-static inline void arch_idle(void)
-{
-        iomd_writeb(0, IOMD_SUSMODE);
-}
-
-#define arch_reset(mode)                        \
-        do {                                    \
-                iomd_writeb(0, IOMD_ROMCR0);    \
-                cpu_reset(0);                   \
-        } while (0)
-
-#endif
diff --git a/arch/arm/mach-clps7500/include/mach/timex.h b/arch/arm/mach-clps7500/include/mach/timex.h
deleted file mode 100644
index dfaa9b425757..000000000000
--- a/arch/arm/mach-clps7500/include/mach/timex.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/timex.h
- *
- * CL7500 architecture timex specifications
- *
- * Copyright (C) 1999 Nexus Electronics Ltd
- */
-
-/*
- * On the ARM7500, the clock ticks at 2MHz.
- */
-#define CLOCK_TICK_RATE         2000000
-
diff --git a/arch/arm/mach-clps7500/include/mach/uncompress.h b/arch/arm/mach-clps7500/include/mach/uncompress.h
deleted file mode 100644
index d7d0af4b49fc..000000000000
--- a/arch/arm/mach-clps7500/include/mach/uncompress.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/uncompress.h
- *
- * Copyright (C) 1999, 2000 Nexus Electronics Ltd.
- */
-#define BASE 0x03010000
-#define SERBASE (BASE + (0x2f8 << 2))
-
-static inline void putc(char c)
-{
-        while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20))
-                barrier();
-
-        *((volatile unsigned int *)(SERBASE)) = c;
-}
-
-static inline void flush(void)
-{
-}
-
-static __inline__ void arch_decomp_setup(void)
-{
-        int baud = 3686400 / (9600 * 32);
-
-        *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80;
-        *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff;
-        *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8;
-        *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */
-        *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_wdog()
diff --git a/arch/arm/mach-clps7500/include/mach/vmalloc.h b/arch/arm/mach-clps7500/include/mach/vmalloc.h
deleted file mode 100644
index 8fc5406d1b6d..000000000000
--- a/arch/arm/mach-clps7500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/vmalloc.h
- */
-#define VMALLOC_END       (PAGE_OFFSET + 0x1c000000)
diff --git a/arch/arm/mach-davinci/include/mach/dma.h b/arch/arm/mach-davinci/include/mach/dma.h
deleted file mode 100644
index 8e2f2d0ba667..000000000000
--- a/arch/arm/mach-davinci/include/mach/dma.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * DaVinci DMA definitions
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS                 0xffffffff
-
-#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index b78ee9140496..a48795fd2417 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -29,8 +29,7 @@
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
-#define PCIO_BASE               0
-#define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
+#define __io(a)                 __typesafe_io(a)
 #define __mem_pci(a)            (a)
 #define __mem_isa(a)            (a)
 
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index dd1625c23cf4..86c25c7f3ce3 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -52,13 +52,8 @@ __arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
         if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + (128<<20) - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + (128<<20))
 
 #endif
 
-/*
- * Bus address is physical address
- */
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 #endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h
index b98bd9e92fd6..ad51625b6609 100644
--- a/arch/arm/mach-davinci/include/mach/vmalloc.h
+++ b/arch/arm/mach-davinci/include/mach/vmalloc.h
@@ -8,7 +8,6 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include <asm/memory.h>
 #include <mach/io.h>
 
 /* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 3b9a296b5c4b..f8bcd29d17a6 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -322,7 +322,7 @@ static void __init davinci_timer_init(void)
         clockevent_davinci.min_delta_ns =
                 clockevent_delta2ns(1, &clockevent_davinci);
 
-        clockevent_davinci.cpumask = cpumask_of_cpu(0);
+        clockevent_davinci.cpumask = cpumask_of(0);
         clockevents_register_device(&clockevent_davinci);
 }
 
diff --git a/arch/arm/mach-ebsa110/include/mach/dma.h b/arch/arm/mach-ebsa110/include/mach/dma.h
deleted file mode 100644
index 780a04c8bbe9..000000000000
--- a/arch/arm/mach-ebsa110/include/mach/dma.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- *  arch/arm/mach-ebsa110/include/mach/dma.h
- *
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  EBSA110 DMA definitions
- */
diff --git a/arch/arm/mach-ebsa110/include/mach/memory.h b/arch/arm/mach-ebsa110/include/mach/memory.h
index eea4b75b657b..0ca66d080c69 100644
--- a/arch/arm/mach-ebsa110/include/mach/memory.h
+++ b/arch/arm/mach-ebsa110/include/mach/memory.h
@@ -22,13 +22,6 @@
 #define PHYS_OFFSET     UL(0x00000000)
 
 /*
- * We keep this 1:1 so that we don't interfere
- * with the PCMCIA memory regions
- */
-#define __virt_to_bus(x)        (x)
-#define __bus_to_virt(x)        (x)
-
-/*
  * Cache flushing area - SRAM
  */
 #define FLUSH_BASE_PHYS         0x40000000
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 5a1b8c05c958..56bddcef6905 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -33,6 +33,12 @@ config MACH_EDB9307
           Say 'Y' here if you want your kernel to support the Cirrus
           Logic EDB9307 Evaluation Board.
 
+config MACH_EDB9307A
+        bool "Support Cirrus Logic EDB9307A"
+        help
+          Say 'Y' here if you want your kernel to support the Cirrus
+          Logic EDB9307A Evaluation Board.
+
 config MACH_EDB9312
         bool "Support Cirrus Logic EDB9312"
         help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index c1252ca9648e..944e42d51646 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_MACH_ADSSPHERE)	+= adssphere.o
 obj-$(CONFIG_MACH_EDB9302)      += edb9302.o
 obj-$(CONFIG_MACH_EDB9302A)     += edb9302a.o
 obj-$(CONFIG_MACH_EDB9307)      += edb9307.o
+obj-$(CONFIG_MACH_EDB9307A)     += edb9307a.o
 obj-$(CONFIG_MACH_EDB9312)      += edb9312.o
 obj-$(CONFIG_MACH_EDB9315)      += edb9315.o
 obj-$(CONFIG_MACH_EDB9315A)     += edb9315a.o
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 561db73ec1ae..3fbd9b0fbe24 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data adssphere_flash_data = {
 };
 
 static struct resource adssphere_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x61ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -59,7 +60,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 8c9f2491dccc..96049283a10a 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -16,11 +16,12 @@
 #include <linux/module.h>
 #include <linux/string.h>
 #include <linux/io.h>
+
+#include <asm/clkdev.h>
 #include <asm/div64.h>
 #include <mach/hardware.h>
 
 struct clk {
-        char            *name;
         unsigned long   rate;
         int             users;
         u32             enable_reg;
@@ -28,53 +29,33 @@ struct clk {
 };
 
 static struct clk clk_uart = {
-        .name           = "UARTCLK",
         .rate           = 14745600,
 };
-static struct clk clk_pll1 = {
-        .name           = "pll1",
-};
-static struct clk clk_f = {
-        .name           = "fclk",
-};
-static struct clk clk_h = {
-        .name           = "hclk",
-};
-static struct clk clk_p = {
-        .name           = "pclk",
-};
-static struct clk clk_pll2 = {
-        .name           = "pll2",
-};
+static struct clk clk_pll1;
+static struct clk clk_f;
+static struct clk clk_h;
+static struct clk clk_p;
+static struct clk clk_pll2;
 static struct clk clk_usb_host = {
-        .name           = "usb_host",
         .enable_reg     = EP93XX_SYSCON_CLOCK_CONTROL,
         .enable_mask    = EP93XX_SYSCON_CLOCK_USH_EN,
 };
 
-
-static struct clk *clocks[] = {
-        &clk_uart,
-        &clk_pll1,
-        &clk_f,
-        &clk_h,
-        &clk_p,
-        &clk_pll2,
-        &clk_usb_host,
+#define INIT_CK(dev,con,ck)                                     \
+        { .dev_id = dev, .con_id = con, .clk = ck }
+
+static struct clk_lookup clocks[] = {
+        INIT_CK("apb:uart1", NULL, &clk_uart),
+        INIT_CK("apb:uart2", NULL, &clk_uart),
+        INIT_CK("apb:uart3", NULL, &clk_uart),
+        INIT_CK(NULL, "pll1", &clk_pll1),
+        INIT_CK(NULL, "fclk", &clk_f),
+        INIT_CK(NULL, "hclk", &clk_h),
+        INIT_CK(NULL, "pclk", &clk_p),
+        INIT_CK(NULL, "pll2", &clk_pll2),
+        INIT_CK(NULL, "usb_host", &clk_usb_host),
 };
 
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(clocks); i++) {
-                if (!strcmp(clocks[i]->name, id))
-                        return clocks[i];
-        }
-
-        return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
 
 int clk_enable(struct clk *clk)
 {
@@ -106,12 +87,6 @@ unsigned long clk_get_rate(struct clk *clk)
 }
 EXPORT_SYMBOL(clk_get_rate);
 
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
-
 
 static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
 static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
@@ -138,6 +113,7 @@ static unsigned long calc_pll_rate(u32 config_word)
 static int __init ep93xx_clock_init(void)
 {
         u32 value;
+        int i;
 
         value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
         if (!(value & 0x00800000)) {                    /* PLL1 bypassed?  */
@@ -165,6 +141,8 @@ static int __init ep93xx_clock_init(void)
                 clk_f.rate / 1000000, clk_h.rate / 1000000,
                 clk_p.rate / 1000000);
 
+        for (i = 0; i < ARRAY_SIZE(clocks); i++)
+                clkdev_add(&clocks[i]);
         return 0;
 }
 arch_initcall(ep93xx_clock_init);
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 48345fb34613..6d9152de6074 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -34,6 +34,8 @@
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -153,12 +155,14 @@ static unsigned char gpio_int_unmasked[3];
 static unsigned char gpio_int_enabled[3];
 static unsigned char gpio_int_type1[3];
 static unsigned char gpio_int_type2[3];
+static unsigned char gpio_int_debouce[3];
 
 /* Port ordering is: A B F */
 static const u8 int_type1_register_offset[3]    = { 0x90, 0xac, 0x4c };
 static const u8 int_type2_register_offset[3]    = { 0x94, 0xb0, 0x50 };
 static const u8 eoi_register_offset[3]          = { 0x98, 0xb4, 0x54 };
 static const u8 int_en_register_offset[3]       = { 0x9c, 0xb8, 0x58 };
+static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 };
 
 void ep93xx_gpio_update_int_params(unsigned port)
 {
@@ -181,6 +185,22 @@ void ep93xx_gpio_int_mask(unsigned line)
         gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
 }
 
+void ep93xx_gpio_int_debounce(unsigned int irq, int enable)
+{
+        int line = irq_to_gpio(irq);
+        int port = line >> 3;
+        int port_mask = 1 << (line & 7);
+
+        if (enable)
+                gpio_int_debouce[port] |= port_mask;
+        else
+                gpio_int_debouce[port] &= ~port_mask;
+
+        __raw_writeb(gpio_int_debouce[port],
+                EP93XX_GPIO_REG(int_debounce_register_offset[port]));
+}
+EXPORT_SYMBOL(ep93xx_gpio_int_debounce);
+
 /*************************************************************************
  * EP93xx IRQ handling
  *************************************************************************/
@@ -389,7 +409,7 @@ static struct amba_pl010_data ep93xx_uart_data = {
 
 static struct amba_device uart1_device = {
         .dev            = {
-                .bus_id         = "apb:uart1",
+                .init_name      = "apb:uart1",
                 .platform_data  = &ep93xx_uart_data,
         },
         .res            = {
@@ -403,7 +423,7 @@ static struct amba_device uart1_device = {
 
 static struct amba_device uart2_device = {
         .dev            = {
-                .bus_id         = "apb:uart2",
+                .init_name      = "apb:uart2",
                 .platform_data  = &ep93xx_uart_data,
         },
         .res            = {
@@ -417,7 +437,7 @@ static struct amba_device uart2_device = {
 
 static struct amba_device uart3_device = {
         .dev            = {
-                .bus_id         = "apb:uart3",
+                .init_name      = "apb:uart3",
                 .platform_data  = &ep93xx_uart_data,
         },
         .res            = {
@@ -497,6 +517,26 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
         platform_device_register(&ep93xx_eth_device);
 }
 
+static struct i2c_gpio_platform_data ep93xx_i2c_data = {
+        .sda_pin                = EP93XX_GPIO_LINE_EEDAT,
+        .sda_is_open_drain      = 0,
+        .scl_pin                = EP93XX_GPIO_LINE_EECLK,
+        .scl_is_open_drain      = 0,
+        .udelay                 = 2,
+};
+
+static struct platform_device ep93xx_i2c_device = {
+        .name                   = "i2c-gpio",
+        .id                     = 0,
+        .dev.platform_data      = &ep93xx_i2c_data,
+};
+
+void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
+{
+        i2c_register_board_info(0, devices, num);
+        platform_device_register(&ep93xx_i2c_device);
+}
+
 extern void ep93xx_gpio_init(void);
 
 void __init ep93xx_init_devices(void)
diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c
index e4add5bdccfd..8bf8d7c78f1a 100644
--- a/arch/arm/mach-ep93xx/edb9302.c
+++ b/arch/arm/mach-ep93xx/edb9302.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9302_flash_data = {
 };
 
 static struct resource edb9302_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x60ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -59,7 +60,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
         /* Maintainer: George Kashperko <george@chas.com.ua> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9302a.c b/arch/arm/mach-ep93xx/edb9302a.c
index 02c4405afed7..a352c57c7b46 100644
--- a/arch/arm/mach-ep93xx/edb9302a.c
+++ b/arch/arm/mach-ep93xx/edb9302a.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9302a_flash_data = {
 };
 
 static struct resource edb9302a_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x60ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -44,7 +45,7 @@ static struct platform_device edb9302a_flash = {
 };
 
 static struct ep93xx_eth_data edb9302a_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9302a_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0xc0000100,
+        .boot_params    = EP93XX_SDCE0_PHYS_BASE + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9307.c b/arch/arm/mach-ep93xx/edb9307.c
index 040edbd2ea05..5ab22f63a4eb 100644
--- a/arch/arm/mach-ep93xx/edb9307.c
+++ b/arch/arm/mach-ep93xx/edb9307.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9307_flash_data = {
 };
 
 static struct resource edb9307_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x61ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -44,7 +45,7 @@ static struct platform_device edb9307_flash = {
 };
 
 static struct ep93xx_eth_data edb9307_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9307_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
         /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9307a.c b/arch/arm/mach-ep93xx/edb9307a.c
new file mode 100644
index 000000000000..5b5c22b681be
--- /dev/null
+++ b/arch/arm/mach-ep93xx/edb9307a.c
@@ -0,0 +1,68 @@
+/*
+ * arch/arm/mach-ep93xx/edb9307a.c
+ * Cirrus Logic EDB9307A support.
+ *
+ * Copyright (C) 2008 H Hartley Sweeten <hsweeten@visionengravers.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct physmap_flash_data edb9307a_flash_data = {
+        .width          = 2,
+};
+
+static struct resource edb9307a_flash_resource = {
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device edb9307a_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &edb9307a_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &edb9307a_flash_resource,
+};
+
+static struct ep93xx_eth_data edb9307a_eth_data = {
+        .phy_id         = 1,
+};
+
+static void __init edb9307a_init_machine(void)
+{
+        ep93xx_init_devices();
+        platform_device_register(&edb9307a_flash);
+
+        ep93xx_register_eth(&edb9307a_eth_data, 1);
+}
+
+MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
+        /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = EP93XX_SDCE0_PHYS_BASE + 0x100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = edb9307a_init_machine,
+MACHINE_END
diff --git a/arch/arm/mach-ep93xx/edb9312.c b/arch/arm/mach-ep93xx/edb9312.c
index 6853e302bc3a..d7179f66d804 100644
--- a/arch/arm/mach-ep93xx/edb9312.c
+++ b/arch/arm/mach-ep93xx/edb9312.c
@@ -20,6 +20,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -29,8 +30,8 @@ static struct physmap_flash_data edb9312_flash_data = {
 };
 
 static struct resource edb9312_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x61ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -45,7 +46,7 @@ static struct platform_device edb9312_flash = {
 };
 
 static struct ep93xx_eth_data edb9312_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9312_init_machine(void)
@@ -60,7 +61,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
         /* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c
index 9469b350d253..025af6eaca10 100644
--- a/arch/arm/mach-ep93xx/edb9315.c
+++ b/arch/arm/mach-ep93xx/edb9315.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9315_flash_data = {
 };
 
 static struct resource edb9315_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x61ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -44,7 +45,7 @@ static struct platform_device edb9315_flash = {
 };
 
 static struct ep93xx_eth_data edb9315_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9315_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9315a.c b/arch/arm/mach-ep93xx/edb9315a.c
index 584457ce7c80..4c9cc8a39f5c 100644
--- a/arch/arm/mach-ep93xx/edb9315a.c
+++ b/arch/arm/mach-ep93xx/edb9315a.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9315a_flash_data = {
 };
 
 static struct resource edb9315a_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x60ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -44,7 +45,7 @@ static struct platform_device edb9315a_flash = {
 };
 
 static struct ep93xx_eth_data edb9315a_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9315a_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0xc0000100,
+        .boot_params    = EP93XX_SDCE0_PHYS_BASE + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 035b24e31b64..3bad500b71b6 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data gesbc9312_flash_data = {
 };
 
 static struct resource gesbc9312_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x607fffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_8M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -59,7 +60,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/include/mach/clkdev.h b/arch/arm/mach-ep93xx/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
deleted file mode 100644
index d0fa9656e92f..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/dma.h
- */
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h
index f7020414c5df..0a1498ae899a 100644
--- a/arch/arm/mach-ep93xx/include/mach/gpio.h
+++ b/arch/arm/mach-ep93xx/include/mach/gpio.h
@@ -99,6 +99,8 @@
 /* maximum value for irq capable line identifiers */
 #define EP93XX_GPIO_LINE_MAX_IRQ        EP93XX_GPIO_LINE_F(7)
 
+extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable);
+
 /* new generic GPIO API - see Documentation/gpio.txt */
 
 #include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
index 1ab9a90ad339..fd5f081cc8b7 100644
--- a/arch/arm/mach-ep93xx/include/mach/io.h
+++ b/arch/arm/mach-ep93xx/include/mach/io.h
@@ -4,5 +4,5 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 
-#define __io(p)                 ((void __iomem *)(p))
-#define __mem_pci(p)            (p)
+#define __io(p)         __typesafe_io(p)
+#define __mem_pci(p)    (p)
diff --git a/arch/arm/mach-ep93xx/include/mach/memory.h b/arch/arm/mach-ep93xx/include/mach/memory.h
index f1b633590752..5c80c3c8158d 100644
--- a/arch/arm/mach-ep93xx/include/mach/memory.h
+++ b/arch/arm/mach-ep93xx/include/mach/memory.h
@@ -7,8 +7,4 @@
 
 #define PHYS_OFFSET             UL(0x00000000)
 
-#define __bus_to_virt(x)        __phys_to_virt(x)
-#define __virt_to_bus(x)        __virt_to_phys(x)
-
-
 #endif
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index db2489d3bda7..88f7e88f152f 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -14,6 +14,7 @@ void ep93xx_map_io(void);
 void ep93xx_init_irq(void);
 void ep93xx_init_time(unsigned long);
 void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
+void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
 void ep93xx_init_devices(void);
 extern struct sys_timer ep93xx_timer;
 
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index c2197236b632..15d6815d78c4 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -17,6 +17,7 @@
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <linux/mtd/physmap.h>
 
 #include <mach/hardware.h>
@@ -25,7 +26,7 @@
 #include <asm/mach-types.h>
 
 static struct ep93xx_eth_data micro9_eth_data = {
-       .phy_id                 = 0x1f,
+        .phy_id         = 0x1f,
 };
 
 static void __init micro9_init(void)
@@ -38,46 +39,46 @@ static void __init micro9_init(void)
  */
 #ifdef CONFIG_MACH_MICRO9H
 static struct physmap_flash_data micro9h_flash_data = {
-       .width          = 4,
+        .width          = 4,
 };
 
 static struct resource micro9h_flash_resource = {
-       .start          = 0x10000000,
-       .end            = 0x13ffffff,
-       .flags          = IORESOURCE_MEM,
+        .start          = EP93XX_CS1_PHYS_BASE,
+        .end            = EP93XX_CS1_PHYS_BASE + SZ_64M - 1,
+        .flags          = IORESOURCE_MEM,
 };
 
 static struct platform_device micro9h_flash = {
-       .name           = "physmap-flash",
-       .id             = 0,
-       .dev            = {
-               .platform_data  = &micro9h_flash_data,
-       },
-       .num_resources  = 1,
-       .resource       = &micro9h_flash_resource,
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &micro9h_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &micro9h_flash_resource,
 };
 
 static void __init micro9h_init(void)
 {
-       platform_device_register(&micro9h_flash);
+        platform_device_register(&micro9h_flash);
 }
 
 static void __init micro9h_init_machine(void)
 {
-       ep93xx_init_devices();
-       micro9_init();
-       micro9h_init();
+        ep93xx_init_devices();
+        micro9_init();
+        micro9h_init();
 }
 
 MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H")
-       /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
-       .phys_io        = EP93XX_APB_PHYS_BASE,
-       .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-       .boot_params    = 0x00000100,
-       .map_io         = ep93xx_map_io,
-       .init_irq       = ep93xx_init_irq,
-       .timer          = &ep93xx_timer,
-       .init_machine   = micro9h_init_machine,
+        /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = micro9h_init_machine,
 MACHINE_END
 #endif
 
@@ -87,19 +88,19 @@ MACHINE_END
 #ifdef CONFIG_MACH_MICRO9M
 static void __init micro9m_init_machine(void)
 {
-       ep93xx_init_devices();
-       micro9_init();
+        ep93xx_init_devices();
+        micro9_init();
 }
 
 MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M")
-       /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
-       .phys_io        = EP93XX_APB_PHYS_BASE,
-       .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-       .boot_params    = 0x00000100,
-       .map_io         = ep93xx_map_io,
-       .init_irq       = ep93xx_init_irq,
-       .timer          = &ep93xx_timer,
-       .init_machine   = micro9m_init_machine,
+        /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = micro9m_init_machine,
 MACHINE_END
 #endif
 
@@ -109,19 +110,19 @@ MACHINE_END
 #ifdef CONFIG_MACH_MICRO9L
 static void __init micro9l_init_machine(void)
 {
-       ep93xx_init_devices();
-       micro9_init();
+        ep93xx_init_devices();
+        micro9_init();
 }
 
 MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L")
-       /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
-       .phys_io        = EP93XX_APB_PHYS_BASE,
-       .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-       .boot_params    = 0x00000100,
-       .map_io         = ep93xx_map_io,
-       .init_irq       = ep93xx_init_irq,
-       .timer          = &ep93xx_timer,
-       .init_machine   = micro9l_init_machine,
+        /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = micro9l_init_machine,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index b4aa4c054276..7ee024d34829 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -20,6 +20,7 @@
 #include <linux/platform_device.h>
 #include <linux/m48t86.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -117,7 +118,7 @@ static struct physmap_flash_data ts72xx_flash_data = {
 
 static struct resource ts72xx_flash_resource = {
         .start          = TS72XX_NOR_PHYS_BASE,
-        .end            = TS72XX_NOR_PHYS_BASE + 0x00ffffff,
+        .end            = TS72XX_NOR_PHYS_BASE + SZ_16M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -144,21 +145,21 @@ static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
 }
 
 static struct m48t86_ops ts72xx_rtc_ops = {
-        .readbyte               = ts72xx_rtc_readbyte,
-        .writebyte              = ts72xx_rtc_writebyte,
+        .readbyte       = ts72xx_rtc_readbyte,
+        .writebyte      = ts72xx_rtc_writebyte,
 };
 
 static struct platform_device ts72xx_rtc_device = {
-        .name                   = "rtc-m48t86",
-        .id                     = -1,
-        .dev                    = {
-                .platform_data          = &ts72xx_rtc_ops,
+        .name           = "rtc-m48t86",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &ts72xx_rtc_ops,
         },
-        .num_resources          = 0,
+        .num_resources  = 0,
 };
 
 static struct ep93xx_eth_data ts72xx_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init ts72xx_init_machine(void)
@@ -175,7 +176,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ts72xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 6a5b437ab86f..1b996b26d2e0 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -10,6 +10,7 @@
 #include <linux/init.h>
 #include <linux/screen_info.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware/dec21285.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 818014e09f4a..36ff06d4df15 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -14,6 +14,7 @@
 #include <linux/list.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
  
 #include <asm/pgtable.h>
 #include <asm/page.h>
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index b2a21189dd81..da35bc5c5ccc 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -7,6 +7,7 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/spinlock.h>
 
 #include <asm/irq.h>
 
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index d4c1e526f59c..133086019e3e 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -17,6 +17,7 @@
 #include <linux/ioport.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/irq.h>
 #include <asm/system.h>
diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c
index b653e9cfa3f7..4f3506346969 100644
--- a/arch/arm/mach-footbridge/dma.c
+++ b/arch/arm/mach-footbridge/dma.c
@@ -12,6 +12,7 @@
  */
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/dma.h>
 #include <asm/scatterlist.h>
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b1d3bf20a41e..30040fd588cc 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -4,6 +4,7 @@
  * EBSA285 machine fixup
  */
 #include <linux/init.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware/dec21285.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index ffaea90486f9..51dd902043ad 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -12,8 +12,6 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
 
-#include <mach/memory.h>
-
 /*   Virtual      Physical      Size
  * 0xff800000   0x40000000      1MB     X-Bus
  * 0xff000000   0x7c000000      1MB     PCI I/O space
@@ -28,9 +26,6 @@
 #define XBUS_SIZE               0x00100000
 #define XBUS_BASE               0xff800000
 
-#define PCIO_SIZE               0x00100000
-#define PCIO_BASE               0xff000000
-
 #define ARMCSR_SIZE             0x00100000
 #define ARMCSR_BASE             0xfe000000
 
@@ -91,10 +86,11 @@
 #define CPLD_FLASH_WR_ENABLE    1
 
 #ifndef __ASSEMBLY__
-extern void gpio_modify_op(int mask, int set);
-extern void gpio_modify_io(int mask, int in);
-extern int  gpio_read(void);
-extern void cpld_modify(int mask, int set);
+extern spinlock_t nw_gpio_lock;
+extern void nw_gpio_modify_op(unsigned int mask, unsigned int set);
+extern void nw_gpio_modify_io(unsigned int mask, unsigned int in);
+extern unsigned int nw_gpio_read(void);
+extern void nw_cpld_modify(unsigned int mask, unsigned int set);
 #endif
 
 #define pcibios_assign_all_busses()     1
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index a7b066239996..101a4fe90bde 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -14,7 +14,8 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
+#define PCIO_SIZE               0x00100000
+#define PCIO_BASE               0xff000000
 
 #define IO_SPACE_LIMIT 0xffff
 
diff --git a/arch/arm/mach-footbridge/include/mach/dma.h b/arch/arm/mach-footbridge/include/mach/isa-dma.h
index 62afd213effb..5bd4a0d338a8 100644
--- a/arch/arm/mach-footbridge/include/mach/dma.h
+++ b/arch/arm/mach-footbridge/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-footbridge/include/mach/dma.h
+ *  arch/arm/mach-footbridge/include/mach/isa-dma.h
  *
  *  Architecture DMA routines
  *
diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h
index 6ae2f1a07ab9..cb16e59d87b6 100644
--- a/arch/arm/mach-footbridge/include/mach/memory.h
+++ b/arch/arm/mach-footbridge/include/mach/memory.h
@@ -30,9 +30,18 @@
 extern unsigned long __virt_to_bus(unsigned long);
 extern unsigned long __bus_to_virt(unsigned long);
 #endif
+#define __virt_to_bus   __virt_to_bus
+#define __bus_to_virt   __bus_to_virt
 
 #elif defined(CONFIG_FOOTBRIDGE_HOST)
 
+/*
+ * The footbridge is programmed to expose the system RAM at the corresponding
+ * address.  So, if PAGE_OFFSET is 0xc0000000, RAM appears at 0xe0000000.
+ * If 0x80000000, then its exposed at 0xa0000000 on the bus. etc.
+ * The only requirement is that the RAM isn't placed at bus address 0 which
+ * would clash with VGA cards.
+ */
 #define __virt_to_bus(x)        ((x) - 0xe0000000)
 #define __bus_to_virt(x)        ((x) + 0xe0000000)
 
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index 54fec9ae28b9..9ee80a211d3c 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -19,6 +19,7 @@
 #include <linux/list.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/mach/irq.h>
 
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 00b0ddcac283..ac7ffa6fc413 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -11,6 +11,7 @@
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware/dec21285.h>
 #include <asm/leds.h>
@@ -67,13 +68,14 @@ static inline void wb977_ww(int reg, int val)
 /*
  * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
  */
-DEFINE_SPINLOCK(gpio_lock);
+DEFINE_SPINLOCK(nw_gpio_lock);
+EXPORT_SYMBOL(nw_gpio_lock);
 
 static unsigned int current_gpio_op;
 static unsigned int current_gpio_io;
 static unsigned int current_cpld;
 
-void gpio_modify_op(int mask, int set)
+void nw_gpio_modify_op(unsigned int mask, unsigned int set)
 {
         unsigned int new_gpio, changed;
 
@@ -86,6 +88,7 @@ void gpio_modify_op(int mask, int set)
         if (changed & 0xff00)
                 outb(new_gpio >> 8, GP2_IO_BASE);
 }
+EXPORT_SYMBOL(nw_gpio_modify_op);
 
 static inline void __gpio_modify_io(int mask, int in)
 {
@@ -118,7 +121,7 @@ static inline void __gpio_modify_io(int mask, int in)
         }
 }
 
-void gpio_modify_io(int mask, int in)
+void nw_gpio_modify_io(unsigned int mask, unsigned int in)
 {
         /* Open up the SuperIO chip */
         wb977_open();
@@ -128,11 +131,13 @@ void gpio_modify_io(int mask, int in)
         /* Close up the EFER gate */
         wb977_close();
 }
+EXPORT_SYMBOL(nw_gpio_modify_io);
 
-int gpio_read(void)
+unsigned int nw_gpio_read(void)
 {
         return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
 }
+EXPORT_SYMBOL(nw_gpio_read);
 
 /*
  * Initialise the Winbond W83977F global registers
@@ -322,9 +327,9 @@ static inline void wb977_init_gpio(void)
         /*
          * Set Group1/Group2 outputs
          */
-        spin_lock_irqsave(&gpio_lock, flags);
-        gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
-        spin_unlock_irqrestore(&gpio_lock, flags);
+        spin_lock_irqsave(&nw_gpio_lock, flags);
+        nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
+        spin_unlock_irqrestore(&nw_gpio_lock, flags);
 }
 
 /*
@@ -359,34 +364,35 @@ static void __init wb977_init(void)
         wb977_close();
 }
 
-void cpld_modify(int mask, int set)
+void nw_cpld_modify(unsigned int mask, unsigned int set)
 {
         int msk;
 
         current_cpld = (current_cpld & ~mask) | set;
 
-        gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
-        gpio_modify_op(GPIO_IOLOAD, 0);
+        nw_gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
+        nw_gpio_modify_op(GPIO_IOLOAD, 0);
 
         for (msk = 8; msk; msk >>= 1) {
                 int bit = current_cpld & msk;
 
-                gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
-                gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
+                nw_gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
+                nw_gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
         }
 
-        gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
-        gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
-        gpio_modify_op(GPIO_IOLOAD, 0);
+        nw_gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
+        nw_gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
+        nw_gpio_modify_op(GPIO_IOLOAD, 0);
 }
+EXPORT_SYMBOL(nw_cpld_modify);
 
 static void __init cpld_init(void)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&gpio_lock, flags);
-        cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
-        spin_unlock_irqrestore(&gpio_lock, flags);
+        spin_lock_irqsave(&nw_gpio_lock, flags);
+        nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
+        spin_unlock_irqrestore(&nw_gpio_lock, flags);
 }
 
 static unsigned char rwa_unlock[] __initdata =
@@ -596,12 +602,6 @@ static void __init rwa010_init(void)
         rwa010_soundblaster_reset();
 }
 
-EXPORT_SYMBOL(gpio_lock);
-EXPORT_SYMBOL(gpio_modify_op);
-EXPORT_SYMBOL(gpio_modify_io);
-EXPORT_SYMBOL(cpld_modify);
-EXPORT_SYMBOL(gpio_read);
-
 /*
  * Initialise any other hardware after we've got the PCI bus
  * initialised.  We may need the PCI bus to talk to this other
@@ -616,9 +616,9 @@ static int __init nw_hw_init(void)
                 cpld_init();
                 rwa010_init();
 
-                spin_lock_irqsave(&gpio_lock, flags);
-                gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
-                spin_unlock_irqrestore(&gpio_lock, flags);
+                spin_lock_irqsave(&nw_gpio_lock, flags);
+                nw_gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
+                spin_unlock_irqrestore(&nw_gpio_lock, flags);
         }
         return 0;
 }
diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c
index d91a4f4a32dc..00269fe0be8a 100644
--- a/arch/arm/mach-footbridge/netwinder-leds.c
+++ b/arch/arm/mach-footbridge/netwinder-leds.c
@@ -32,7 +32,6 @@ static char led_state;
 static char hw_led_state;
 
 static DEFINE_SPINLOCK(leds_lock);
-extern spinlock_t gpio_lock;
 
 static void netwinder_leds_event(led_event_t evt)
 {
@@ -121,9 +120,9 @@ static void netwinder_leds_event(led_event_t evt)
         spin_unlock_irqrestore(&leds_lock, flags);
 
         if  (led_state & LED_STATE_ENABLED) {
-                spin_lock_irqsave(&gpio_lock, flags);
-                gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state);
-                spin_unlock_irqrestore(&gpio_lock, flags);
+                spin_lock_irqsave(&nw_gpio_lock, flags);
+                nw_gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state);
+                spin_unlock_irqrestore(&nw_gpio_lock, flags);
         }
 }
 
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c
index c4f843fc099d..e2c9f0690b16 100644
--- a/arch/arm/mach-footbridge/personal.c
+++ b/arch/arm/mach-footbridge/personal.c
@@ -4,6 +4,7 @@
  * Personal server (Skiff) machine fixup
  */
 #include <linux/init.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware/dec21285.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-h720x/include/mach/io.h b/arch/arm/mach-h720x/include/mach/io.h
index 1dab74ce88c6..2c8659c21a93 100644
--- a/arch/arm/mach-h720x/include/mach/io.h
+++ b/arch/arm/mach-h720x/include/mach/io.h
@@ -14,11 +14,9 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)         ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-h720x/include/mach/dma.h b/arch/arm/mach-h720x/include/mach/isa-dma.h
index 0a9d86ee84fe..3eafb3f163c0 100644
--- a/arch/arm/mach-h720x/include/mach/dma.h
+++ b/arch/arm/mach-h720x/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-h720x/include/mach/dma.h
+ * arch/arm/mach-h720x/include/mach/isa-dma.h
  *
  * Architecture DMA routes
  *
@@ -8,13 +8,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-/*
- * This is the maximum DMA address that can be DMAd to.
- * There should not be more than (0xd0000000 - 0xc0000000)
- * bytes of RAM.
- */
-#define MAX_DMA_ADDRESS         0xd0000000
-
 #if defined (CONFIG_CPU_H7201)
 #define MAX_DMA_CHANNELS        3
 #elif defined (CONFIG_CPU_H7202)
diff --git a/arch/arm/mach-h720x/include/mach/memory.h b/arch/arm/mach-h720x/include/mach/memory.h
index cb26f49cc4e1..ef4c1e26f18e 100644
--- a/arch/arm/mach-h720x/include/mach/memory.h
+++ b/arch/arm/mach-h720x/include/mach/memory.h
@@ -7,23 +7,13 @@
 #ifndef __ASM_ARCH_MEMORY_H
 #define __ASM_ARCH_MEMORY_H
 
-/*
- * Page offset:
- *    ( 0xc0000000UL )
- */
 #define PHYS_OFFSET     UL(0x40000000)
-
 /*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- *
- * There is something to do here later !, Mar 2000, Jungjun Kim
+ * This is the maximum DMA address that can be DMAd to.
+ * There should not be more than (0xd0000000 - 0xc0000000)
+ * bytes of RAM.
  */
-
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
+#define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_256M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_256M)
 
 #endif
diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c
index c10810c936b3..1536583eece0 100644
--- a/arch/arm/mach-imx/dma.c
+++ b/arch/arm/mach-imx/dma.c
@@ -28,10 +28,11 @@
 #include <linux/interrupt.h>
 #include <linux/errno.h>
 
+#include <asm/scatterlist.h>
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 #include <mach/imx-dma.h>
 
 struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
@@ -138,7 +139,7 @@ imx_dma_setup_sg_base(imx_dmach_t dma_ch,
 int
 imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
                      unsigned int dma_length, unsigned int dev_addr,
-                     dmamode_t dmamode)
+                     unsigned int dmamode)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
 
@@ -223,7 +224,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
 int
 imx_dma_setup_sg(imx_dmach_t dma_ch,
                  struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length,
-                 unsigned int dev_addr, dmamode_t dmamode)
+                 unsigned int dev_addr, unsigned int dmamode)
 {
         int res;
         struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
diff --git a/arch/arm/mach-imx/include/mach/imx-dma.h b/arch/arm/mach-imx/include/mach/imx-dma.h
index 44d89c35539a..bbe54df7f0de 100644
--- a/arch/arm/mach-imx/include/mach/imx-dma.h
+++ b/arch/arm/mach-imx/include/mach/imx-dma.h
@@ -18,7 +18,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 #ifndef __ASM_ARCH_IMX_DMA_H
 #define __ASM_ARCH_IMX_DMA_H
@@ -48,7 +48,7 @@ struct imx_dma_channel {
         void (*irq_handler) (int, void *);
         void (*err_handler) (int, void *, int errcode);
         void *data;
-        dmamode_t  dma_mode;
+        unsigned int  dma_mode;
         struct scatterlist *sg;
         unsigned int sgbc;
         unsigned int sgcount;
@@ -66,14 +66,18 @@ extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
 /* The type to distinguish channel numbers parameter from ordinal int type */
 typedef int imx_dmach_t;
 
+#define DMA_MODE_READ           0
+#define DMA_MODE_WRITE          1
+#define DMA_MODE_MASK           1
+
 int
 imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
-                unsigned int dma_length, unsigned int dev_addr, dmamode_t dmamode);
+                unsigned int dma_length, unsigned int dev_addr, unsigned int dmamode);
 
 int
 imx_dma_setup_sg(imx_dmach_t dma_ch,
                  struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length,
-                 unsigned int dev_addr, dmamode_t dmamode);
+                 unsigned int dev_addr, unsigned int dmamode);
 
 int
 imx_dma_setup_handlers(imx_dmach_t dma_ch,
diff --git a/arch/arm/mach-imx/include/mach/imxfb.h b/arch/arm/mach-imx/include/mach/imxfb.h
index 3ed9ec8b9f00..870d0d939616 100644
--- a/arch/arm/mach-imx/include/mach/imxfb.h
+++ b/arch/arm/mach-imx/include/mach/imxfb.h
@@ -1,7 +1,52 @@
 /*
  * This structure describes the machine which we are running on.
  */
-struct imxfb_mach_info {
+
+#define PCR_TFT         (1 << 31)
+#define PCR_COLOR       (1 << 30)
+#define PCR_PBSIZ_1     (0 << 28)
+#define PCR_PBSIZ_2     (1 << 28)
+#define PCR_PBSIZ_4     (2 << 28)
+#define PCR_PBSIZ_8     (3 << 28)
+#define PCR_BPIX_1      (0 << 25)
+#define PCR_BPIX_2      (1 << 25)
+#define PCR_BPIX_4      (2 << 25)
+#define PCR_BPIX_8      (3 << 25)
+#define PCR_BPIX_12     (4 << 25)
+#define PCR_BPIX_16     (4 << 25)
+#define PCR_PIXPOL      (1 << 24)
+#define PCR_FLMPOL      (1 << 23)
+#define PCR_LPPOL       (1 << 22)
+#define PCR_CLKPOL      (1 << 21)
+#define PCR_OEPOL       (1 << 20)
+#define PCR_SCLKIDLE    (1 << 19)
+#define PCR_END_SEL     (1 << 18)
+#define PCR_END_BYTE_SWAP (1 << 17)
+#define PCR_REV_VS      (1 << 16)
+#define PCR_ACD_SEL     (1 << 15)
+#define PCR_ACD(x)      (((x) & 0x7f) << 8)
+#define PCR_SCLK_SEL    (1 << 7)
+#define PCR_SHARP       (1 << 6)
+#define PCR_PCD(x)      ((x) & 0x3f)
+
+#define PWMR_CLS(x)     (((x) & 0x1ff) << 16)
+#define PWMR_LDMSK      (1 << 15)
+#define PWMR_SCR1       (1 << 10)
+#define PWMR_SCR0       (1 << 9)
+#define PWMR_CC_EN      (1 << 8)
+#define PWMR_PW(x)      ((x) & 0xff)
+
+#define LSCR1_PS_RISE_DELAY(x)    (((x) & 0x7f) << 26)
+#define LSCR1_CLS_RISE_DELAY(x)   (((x) & 0x3f) << 16)
+#define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8)
+#define LSCR1_GRAY2(x)            (((x) & 0xf) << 4)
+#define LSCR1_GRAY1(x)            (((x) & 0xf))
+
+#define DMACR_BURST     (1 << 31)
+#define DMACR_HM(x)     (((x) & 0xf) << 16)
+#define DMACR_TM(x)     ((x) & 0xf)
+
+struct imx_fb_platform_data {
         u_long          pixclock;
 
         u_short         xres;
@@ -34,4 +79,5 @@ struct imxfb_mach_info {
         void (*lcd_power)(int);
         void (*backlight_power)(int);
 };
-void set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info);
+
+void set_imx_fb_info(struct imx_fb_platform_data *);
diff --git a/arch/arm/mach-imx/include/mach/io.h b/arch/arm/mach-imx/include/mach/io.h
index c50c5fa6fb81..9e197ae4590f 100644
--- a/arch/arm/mach-imx/include/mach/io.h
+++ b/arch/arm/mach-imx/include/mach/io.h
@@ -20,11 +20,9 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)         ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-imx/include/mach/memory.h b/arch/arm/mach-imx/include/mach/memory.h
index 5c453063c0ed..a93df7cba694 100644
--- a/arch/arm/mach-imx/include/mach/memory.h
+++ b/arch/arm/mach-imx/include/mach/memory.h
@@ -23,14 +23,4 @@
 
 #define PHYS_OFFSET     UL(0x08000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        (x - PAGE_OFFSET + PHYS_OFFSET)
-#define __bus_to_virt(x)        (x - PHYS_OFFSET + PAGE_OFFSET)
-
 #endif
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index a11765f5f23b..aff0ebcfa847 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -184,7 +184,7 @@ static int __init imx_clockevent_init(unsigned long rate)
         clockevent_imx.min_delta_ns =
                 clockevent_delta2ns(0xf, &clockevent_imx);
 
-        clockevent_imx.cpumask = cpumask_of_cpu(0);
+        clockevent_imx.cpumask = cpumask_of(0);
 
         clockevents_register_device(&clockevent_imx);
 
diff --git a/arch/arm/mach-integrator/clock.c b/arch/arm/mach-integrator/clock.c
index 8d761fdd2ecd..989ecf5f5c46 100644
--- a/arch/arm/mach-integrator/clock.c
+++ b/arch/arm/mach-integrator/clock.c
@@ -10,42 +10,12 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
-#include <linux/list.h>
 #include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/string.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
 
-#include <asm/hardware/icst525.h>
-
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
 
 int clk_enable(struct clk *clk)
 {
@@ -67,7 +37,6 @@ EXPORT_SYMBOL(clk_get_rate);
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
         struct icst525_vco vco;
-
         vco = icst525_khz_to_vco(clk->params, rate / 1000);
         return icst525_khz(clk->params, vco) * 1000;
 }
@@ -76,56 +45,15 @@ EXPORT_SYMBOL(clk_round_rate);
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
         int ret = -EIO;
+
         if (clk->setvco) {
                 struct icst525_vco vco;
 
                 vco = icst525_khz_to_vco(clk->params, rate / 1000);
                 clk->rate = icst525_khz(clk->params, vco) * 1000;
-
-                printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
-                        clk->name, vco.s, vco.r, vco.v);
-
                 clk->setvco(clk, vco);
                 ret = 0;
         }
-        return 0;
+        return ret;
 }
 EXPORT_SYMBOL(clk_set_rate);
-
-/*
- * These are fixed clocks.
- */
-static struct clk kmi_clk = {
-        .name   = "KMIREFCLK",
-        .rate   = 24000000,
-};
-
-static struct clk uart_clk = {
-        .name   = "UARTCLK",
-        .rate   = 14745600,
-};
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        clk_register(&kmi_clk);
-        clk_register(&uart_clk);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-integrator/clock.h b/arch/arm/mach-integrator/clock.h
index 09e6328ceba9..e69de29bb2d1 100644
--- a/arch/arm/mach-integrator/clock.h
+++ b/arch/arm/mach-integrator/clock.h
@@ -1,25 +0,0 @@
-/*
- *  linux/arch/arm/mach-integrator/clock.h
- *
- *  Copyright (C) 2004 ARM Limited.
- *  Written by Deep Blue Solutions Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-struct module;
-struct icst525_params;
-
-struct clk {
-        struct list_head        node;
-        unsigned long           rate;
-        struct module           *owner;
-        const char              *name;
-        const struct icst525_params *params;
-        void                    *data;
-        void                    (*setvco)(struct clk *, struct icst525_vco vco);
-};
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 595b7392ee4e..6f8872913073 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -21,6 +21,8 @@
 #include <linux/amba/serial.h>
 #include <linux/io.h>
 
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/hardware/arm_timer.h>
@@ -35,7 +37,7 @@ static struct amba_pl010_data integrator_uart_data;
 
 static struct amba_device rtc_device = {
         .dev            = {
-                .bus_id = "mb:15",
+                .init_name = "mb:15",
         },
         .res            = {
                 .start  = INTEGRATOR_RTC_BASE,
@@ -48,7 +50,7 @@ static struct amba_device rtc_device = {
 
 static struct amba_device uart0_device = {
         .dev            = {
-                .bus_id = "mb:16",
+                .init_name = "mb:16",
                 .platform_data = &integrator_uart_data,
         },
         .res            = {
@@ -62,7 +64,7 @@ static struct amba_device uart0_device = {
 
 static struct amba_device uart1_device = {
         .dev            = {
-                .bus_id = "mb:17",
+                .init_name = "mb:17",
                 .platform_data = &integrator_uart_data,
         },
         .res            = {
@@ -76,7 +78,7 @@ static struct amba_device uart1_device = {
 
 static struct amba_device kmi0_device = {
         .dev            = {
-                .bus_id = "mb:18",
+                .init_name = "mb:18",
         },
         .res            = {
                 .start  = KMI0_BASE,
@@ -89,7 +91,7 @@ static struct amba_device kmi0_device = {
 
 static struct amba_device kmi1_device = {
         .dev            = {
-                .bus_id = "mb:19",
+                .init_name = "mb:19",
         },
         .res            = {
                 .start  = KMI1_BASE,
@@ -108,10 +110,43 @@ static struct amba_device *amba_devs[] __initdata = {
         &kmi1_device,
 };
 
+/*
+ * These are fixed clocks.
+ */
+static struct clk clk24mhz = {
+        .rate   = 24000000,
+};
+
+static struct clk uartclk = {
+        .rate   = 14745600,
+};
+
+static struct clk_lookup lookups[] __initdata = {
+        {       /* UART0 */
+                .dev_id         = "mb:16",
+                .clk            = &uartclk,
+        }, {    /* UART1 */
+                .dev_id         = "mb:17",
+                .clk            = &uartclk,
+        }, {    /* KMI0 */
+                .dev_id         = "mb:18",
+                .clk            = &clk24mhz,
+        }, {    /* KMI1 */
+                .dev_id         = "mb:19",
+                .clk            = &clk24mhz,
+        }, {    /* MMCI - IntegratorCP */
+                .dev_id         = "mb:1c",
+                .clk            = &uartclk,
+        }
+};
+
 static int __init integrator_init(void)
 {
         int i;
 
+        for (i = 0; i < ARRAY_SIZE(lookups); i++)
+                clkdev_add(&lookups[i]);
+
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
                 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 172299a78302..0058c937719e 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -22,13 +22,13 @@
 #include <linux/amba/clcd.h>
 #include <linux/io.h>
 
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
 #include <asm/hardware/icst525.h>
 #include <mach/lm.h>
 #include <mach/impd1.h>
 #include <asm/sizes.h>
 
-#include "clock.h"
-
 static int module_id;
 
 module_param_named(lmid, module_id, int, 0444);
@@ -37,6 +37,7 @@ MODULE_PARM_DESC(lmid, "logic module stack position");
 struct impd1_module {
         void __iomem    *base;
         struct clk      vcos[2];
+        struct clk_lookup *clks[3];
 };
 
 static const struct icst525_params impd1_vco_params = {
@@ -339,9 +340,8 @@ static struct impd1_device impd1_devs[] = {
         }
 };
 
-static const char *impd1_vconames[2] = {
-        "CLCDCLK",
-        "AUXVCO2",
+static struct clk fixed_14745600 = {
+        .rate = 14745600,
 };
 
 static int impd1_probe(struct lm_device *dev)
@@ -374,14 +374,20 @@ static int impd1_probe(struct lm_device *dev)
 
         for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) {
                 impd1->vcos[i].owner = THIS_MODULE,
-                impd1->vcos[i].name = impd1_vconames[i],
                 impd1->vcos[i].params = &impd1_vco_params,
                 impd1->vcos[i].data = impd1,
                 impd1->vcos[i].setvco = impd1_setvco;
-
-                clk_register(&impd1->vcos[i]);
         }
 
+        impd1->clks[0] = clkdev_alloc(&impd1->vcos[0], NULL, "lm%x:01000",
+                                        dev->id);
+        impd1->clks[1] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00100",
+                                        dev->id);
+        impd1->clks[2] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00200",
+                                        dev->id);
+        for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
+                clkdev_add(impd1->clks[i]);
+
         for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) {
                 struct impd1_device *idev = impd1_devs + i;
                 struct amba_device *d;
@@ -434,8 +440,8 @@ static void impd1_remove(struct lm_device *dev)
 
         device_for_each_child(&dev->dev, NULL, impd1_remove_one);
 
-        for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++)
-                clk_unregister(&impd1->vcos[i]);
+        for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
+                clkdev_drop(impd1->clks[i]);
 
         lm_set_drvdata(dev, NULL);
 
diff --git a/arch/arm/mach-integrator/include/mach/clkdev.h b/arch/arm/mach-integrator/include/mach/clkdev.h
new file mode 100644
index 000000000000..9293e410832a
--- /dev/null
+++ b/arch/arm/mach-integrator/include/mach/clkdev.h
@@ -0,0 +1,25 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#include <linux/module.h>
+#include <asm/hardware/icst525.h>
+
+struct clk {
+        unsigned long           rate;
+        struct module           *owner;
+        const struct icst525_params *params;
+        void                    *data;
+        void                    (*setvco)(struct clk *, struct icst525_vco vco);
+};
+
+static inline int __clk_get(struct clk *clk)
+{
+        return try_module_get(clk->owner);
+}
+
+static inline void __clk_put(struct clk *clk)
+{
+        module_put(clk->owner);
+}
+
+#endif
diff --git a/arch/arm/mach-integrator/include/mach/memory.h b/arch/arm/mach-integrator/include/mach/memory.h
index be7e63c21d25..2b2e7a110724 100644
--- a/arch/arm/mach-integrator/include/mach/memory.h
+++ b/arch/arm/mach-integrator/include/mach/memory.h
@@ -24,16 +24,9 @@
  * Physical DRAM offset.
  */
 #define PHYS_OFFSET     UL(0x00000000)
-#define BUS_OFFSET      UL(0x80000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        (x - PAGE_OFFSET + BUS_OFFSET)
-#define __bus_to_virt(x)        (x - BUS_OFFSET + PAGE_OFFSET)
+#define BUS_OFFSET      UL(0x80000000)
+#define __virt_to_bus(x)        ((x) - PAGE_OFFSET + BUS_OFFSET)
+#define __bus_to_virt(x)        ((x) - BUS_OFFSET + PAGE_OFFSET)
 
 #endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 88026ccd5ac9..4ac04055c2ea 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -21,6 +21,8 @@
 #include <linux/amba/clcd.h>
 #include <linux/io.h>
 
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/setup.h>
@@ -38,7 +40,6 @@
 #include <asm/mach/time.h>
 
 #include "common.h"
-#include "clock.h"
 
 #define INTCP_PA_MMC_BASE               0x1c000000
 #define INTCP_PA_AACI_BASE              0x1d000000
@@ -289,15 +290,16 @@ static void cp_auxvco_set(struct clk *clk, struct icst525_vco vco)
         writel(0, CM_LOCK);
 }
 
-static struct clk cp_clcd_clk = {
-        .name   = "CLCDCLK",
+static struct clk cp_auxclk = {
         .params = &cp_auxvco_params,
         .setvco = cp_auxvco_set,
 };
 
-static struct clk cp_mmci_clk = {
-        .name   = "MCLK",
-        .rate   = 14745600,
+static struct clk_lookup cp_lookups[] = {
+        {       /* CLCD */
+                .dev_id         = "mb:c0",
+                .clk            = &cp_auxclk,
+        },
 };
 
 /*
@@ -405,7 +407,7 @@ static struct mmc_platform_data mmc_data = {
 
 static struct amba_device mmc_device = {
         .dev            = {
-                .bus_id = "mb:1c",
+                .init_name = "mb:1c",
                 .platform_data = &mmc_data,
         },
         .res            = {
@@ -419,7 +421,7 @@ static struct amba_device mmc_device = {
 
 static struct amba_device aaci_device = {
         .dev            = {
-                .bus_id = "mb:1d",
+                .init_name = "mb:1d",
         },
         .res            = {
                 .start  = INTCP_PA_AACI_BASE,
@@ -530,7 +532,7 @@ static struct clcd_board clcd_data = {
 
 static struct amba_device clcd_device = {
         .dev            = {
-                .bus_id = "mb:c0",
+                .init_name = "mb:c0",
                 .coherent_dma_mask = ~0,
                 .platform_data = &clcd_data,
         },
@@ -554,8 +556,8 @@ static void __init intcp_init(void)
 {
         int i;
 
-        clk_register(&cp_clcd_clk);
-        clk_register(&cp_mmci_clk);
+        for (i = 0; i < ARRAY_SIZE(cp_lookups); i++)
+                clkdev_add(&cp_lookups[i]);
 
         platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
 
diff --git a/arch/arm/mach-iop13xx/include/mach/dma.h b/arch/arm/mach-iop13xx/include/mach/dma.h
deleted file mode 100644
index d79846fbb394..000000000000
--- a/arch/arm/mach-iop13xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
-#ifndef _IOP13XX_DMA_H
-#define _IOP13XX_DMA_H
-#endif
diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h
index b82602d529bf..e012bf13c955 100644
--- a/arch/arm/mach-iop13xx/include/mach/memory.h
+++ b/arch/arm/mach-iop13xx/include/mach/memory.h
@@ -16,18 +16,6 @@
 #define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE)
 #define IOP13XX_PMMR_P_END   (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE)
 
-/*
- * Virtual view <-> PCI DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-
-/* RAM has 1:1 mapping on the PCIe/x Busses */
-#define __virt_to_bus(x)        (__virt_to_phys(x))
-#define __bus_to_virt(x)        (__phys_to_virt(x))
-
 static inline dma_addr_t __virt_to_lbus(unsigned long x)
 {
         return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE;
@@ -55,7 +43,7 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
                 if (is_lbus_device(dev) && __is_lbus_dma(__dma))        \
                         __virt = __lbus_to_virt(__dma);                 \
                 else                                                    \
-                        __virt = __bus_to_virt(__dma);                  \
+                        __virt = __phys_to_virt(__dma);                 \
                 (void *)__virt;                                         \
         })
 
@@ -66,7 +54,7 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
                 if (is_lbus_device(dev) && __is_lbus_virt(__virt))      \
                         __dma = __virt_to_lbus(__virt);                 \
                 else                                                    \
-                        __dma = __virt_to_bus(__virt);                  \
+                        __dma = __virt_to_phys(__virt);                 \
                 __dma;                                                  \
         })
 
diff --git a/arch/arm/mach-iop13xx/include/mach/timex.h b/arch/arm/mach-iop13xx/include/mach/timex.h
index 5b1f1c8a8270..45fb2745bb54 100644
--- a/arch/arm/mach-iop13xx/include/mach/timex.h
+++ b/arch/arm/mach-iop13xx/include/mach/timex.h
@@ -1,3 +1 @@
-#include <mach/hardware.h>
-
 #define CLOCK_TICK_RATE (100 * HZ)
diff --git a/arch/arm/mach-iop32x/include/mach/dma.h b/arch/arm/mach-iop32x/include/mach/dma.h
deleted file mode 100644
index f8bd817f205d..000000000000
--- a/arch/arm/mach-iop32x/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/dma.h
- *
- * Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index ce54705ba3d4..339e5854728b 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -11,7 +11,7 @@
 #ifndef __IO_H
 #define __IO_H
 
-#include <mach/hardware.h>
+#include <asm/hardware/iop3xx.h>
 
 extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
         unsigned int mtype);
diff --git a/arch/arm/mach-iop32x/include/mach/memory.h b/arch/arm/mach-iop32x/include/mach/memory.h
index 42cd4bf3148c..c30f6450ad50 100644
--- a/arch/arm/mach-iop32x/include/mach/memory.h
+++ b/arch/arm/mach-iop32x/include/mach/memory.h
@@ -5,22 +5,9 @@
 #ifndef __MEMORY_H
 #define __MEMORY_H
 
-#include <mach/hardware.h>
-
 /*
  * Physical DRAM offset.
  */
 #define PHYS_OFFSET     UL(0xa0000000)
 
-/*
- * Virtual view <-> PCI DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        (__virt_to_phys(x))
-#define __bus_to_virt(x)        (__phys_to_virt(x))
-
-
 #endif
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
index 20f923e54f46..32d9e5b0a28d 100644
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -7,8 +7,9 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
 #include <asm/mach-types.h>
+#include <asm/hardware/iop3xx.h>
+#include <mach/n2100.h>
 
 static inline void arch_idle(void)
 {
diff --git a/arch/arm/mach-iop32x/include/mach/timex.h b/arch/arm/mach-iop32x/include/mach/timex.h
index a541afced3cb..7262ab81419d 100644
--- a/arch/arm/mach-iop32x/include/mach/timex.h
+++ b/arch/arm/mach-iop32x/include/mach/timex.h
@@ -3,7 +3,4 @@
  *
  * IOP32x architecture timex specifications
  */
-
-#include <mach/hardware.h>
-
 #define CLOCK_TICK_RATE         (100 * HZ)
diff --git a/arch/arm/mach-iop33x/include/mach/dma.h b/arch/arm/mach-iop33x/include/mach/dma.h
deleted file mode 100644
index d8b42232931d..000000000000
--- a/arch/arm/mach-iop33x/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/dma.h
- *
- * Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index 158874631217..e99a7ed6d050 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -11,7 +11,7 @@
 #ifndef __IO_H
 #define __IO_H
 
-#include <mach/hardware.h>
+#include <asm/hardware/iop3xx.h>
 
 extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
         unsigned int mtype);
diff --git a/arch/arm/mach-iop33x/include/mach/memory.h b/arch/arm/mach-iop33x/include/mach/memory.h
index 2cef0bbb354f..a30a96aa6d2d 100644
--- a/arch/arm/mach-iop33x/include/mach/memory.h
+++ b/arch/arm/mach-iop33x/include/mach/memory.h
@@ -5,22 +5,9 @@
 #ifndef __MEMORY_H
 #define __MEMORY_H
 
-#include <mach/hardware.h>
-
 /*
  * Physical DRAM offset.
  */
 #define PHYS_OFFSET     UL(0x00000000)
 
-/*
- * Virtual view <-> PCI DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        (__virt_to_phys(x))
-#define __bus_to_virt(x)        (__phys_to_virt(x))
-
-
 #endif
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
index 7bf3bfb49446..0cb3ad862acd 100644
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ b/arch/arm/mach-iop33x/include/mach/system.h
@@ -7,6 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include <asm/hardware/iop3xx.h>
 
 static inline void arch_idle(void)
 {
diff --git a/arch/arm/mach-iop33x/include/mach/timex.h b/arch/arm/mach-iop33x/include/mach/timex.h
index c75760844d49..54c589091d6e 100644
--- a/arch/arm/mach-iop33x/include/mach/timex.h
+++ b/arch/arm/mach-iop33x/include/mach/timex.h
@@ -3,7 +3,4 @@
  *
  * IOP3xx architecture timex specifications
  */
-
-#include <mach/hardware.h>
-
 #define CLOCK_TICK_RATE         (100 * HZ)
diff --git a/arch/arm/mach-ixp2000/include/mach/dma.h b/arch/arm/mach-ixp2000/include/mach/dma.h
deleted file mode 100644
index 26063d60f622..000000000000
--- a/arch/arm/mach-ixp2000/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-ixp2000/include/mach/dma.h
- *
- * Copyright (C) 2002 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
diff --git a/arch/arm/mach-ixp2000/include/mach/memory.h b/arch/arm/mach-ixp2000/include/mach/memory.h
index 241529a7c52d..aee7eb8a71b2 100644
--- a/arch/arm/mach-ixp2000/include/mach/memory.h
+++ b/arch/arm/mach-ixp2000/include/mach/memory.h
@@ -15,13 +15,6 @@
 
 #define PHYS_OFFSET     UL(0x00000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
 #include <mach/ixp2000-regs.h>
 
 #define __virt_to_bus(v) \
diff --git a/arch/arm/mach-ixp23xx/include/mach/dma.h b/arch/arm/mach-ixp23xx/include/mach/dma.h
deleted file mode 100644
index 8886544b93f7..000000000000
--- a/arch/arm/mach-ixp23xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-ixp23xx/include/mach/dma.h
- */
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index 305ea1808c71..fd9ef8e519f7 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -20,8 +20,6 @@
 #define __io(p)         ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
 #define __mem_pci(a)    (a)
 
-#include <linux/kernel.h>       /* For BUG */
-
 static inline void __iomem *
 ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype)
 {
diff --git a/arch/arm/mach-ixp23xx/include/mach/memory.h b/arch/arm/mach-ixp23xx/include/mach/memory.h
index 9d40115f7ebe..fdd138706c70 100644
--- a/arch/arm/mach-ixp23xx/include/mach/memory.h
+++ b/arch/arm/mach-ixp23xx/include/mach/memory.h
@@ -19,16 +19,6 @@
  */
 #define PHYS_OFFSET             (0x00000000)
 
-
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#ifndef __ASSEMBLY__
-
 #define __virt_to_bus(v)                                                \
         ({ unsigned int ret;                                            \
         ret = ((__virt_to_phys(v) - 0x00000000) +                       \
@@ -43,6 +33,3 @@
 #define arch_is_coherent()      1
 
 #endif
-
-
-#endif
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 7766f469456b..f4656d2ac8a8 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -487,7 +487,7 @@ static int __init ixp4xx_clockevent_init(void)
                 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
         clockevent_ixp4xx.min_delta_ns =
                 clockevent_delta2ns(0xf, &clockevent_ixp4xx);
-        clockevent_ixp4xx.cpumask = cpumask_of_cpu(0);
+        clockevent_ixp4xx.cpumask = cpumask_of(0);
 
         clockevents_register_device(&clockevent_ixp4xx);
         return 0;
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index e7c6386782ed..5add22fc9899 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -177,7 +177,6 @@ static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
 
 static void __init fsg_init(void)
 {
-        DECLARE_MAC_BUF(mac_buf);
         uint8_t __iomem *f;
 
         ixp4xx_sys_init();
@@ -256,10 +255,10 @@ static void __init fsg_init(void)
 #endif
                 iounmap(f);
         }
-        printk(KERN_INFO "FSG: Using MAC address %s for port 0\n",
-               print_mac(mac_buf, fsg_plat_eth[0].hwaddr));
-        printk(KERN_INFO "FSG: Using MAC address %s for port 1\n",
-               print_mac(mac_buf, fsg_plat_eth[1].hwaddr));
+        printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
+               fsg_plat_eth[0].hwaddr);
+        printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
+               fsg_plat_eth[1].hwaddr);
 
 }
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/dma.h b/arch/arm/mach-ixp4xx/include/mach/dma.h
deleted file mode 100644
index 00c5070c0201..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-ixp4xx/include/mach/dma.h
- *
- * Copyright (C) 2001-2004 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#include <linux/device.h>
-#include <asm/page.h>
-#include <asm/sizes.h>
-#include <mach/hardware.h>
-
-#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_64M)
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 319948e31bec..ce63048d45eb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -49,8 +49,6 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
 
 #else
 
-#include <linux/mm.h>
-
 /*
  * In the case of using indirect PCI, we simply return the actual PCI
  * address and our read/write implementation use that to drive the 
@@ -241,7 +239,7 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
 
 #ifndef CONFIG_PCI
 
-#define __io(v)         v
+#define __io(v)         __typesafe_io(v)
 
 #else
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/memory.h b/arch/arm/mach-ixp4xx/include/mach/memory.h
index c4d2830ac987..98f5e5e20980 100644
--- a/arch/arm/mach-ixp4xx/include/mach/memory.h
+++ b/arch/arm/mach-ixp4xx/include/mach/memory.h
@@ -22,19 +22,8 @@ void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes);
         ixp4xx_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD (SZ_64M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_64M)
 
 #endif
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- *
- * These are dummies for now.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 1e52b95cede5..0cbe6ceb67c5 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -12,6 +12,8 @@
 #include <linux/io.h>
 #include <linux/kernel.h>
 
+#define DEBUG_QMGR      0
+
 #define HALF_QUEUES     32
 #define QUEUES          64      /* only 32 lower queues currently supported */
 #define MAX_QUEUE_LENGTH 4      /* in dwords */
@@ -61,22 +63,51 @@ void qmgr_enable_irq(unsigned int queue);
 void qmgr_disable_irq(unsigned int queue);
 
 /* request_ and release_queue() must be called from non-IRQ context */
+
+#if DEBUG_QMGR
+extern char qmgr_queue_descs[QUEUES][32];
+
 int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
                        unsigned int nearly_empty_watermark,
-                       unsigned int nearly_full_watermark);
+                       unsigned int nearly_full_watermark,
+                       const char *desc_format, const char* name);
+#else
+int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
+                         unsigned int nearly_empty_watermark,
+                         unsigned int nearly_full_watermark);
+#define qmgr_request_queue(queue, len, nearly_empty_watermark,          \
+                           nearly_full_watermark, desc_format, name)    \
+        __qmgr_request_queue(queue, len, nearly_empty_watermark,        \
+                             nearly_full_watermark)
+#endif
+
 void qmgr_release_queue(unsigned int queue);
 
 
 static inline void qmgr_put_entry(unsigned int queue, u32 val)
 {
         extern struct qmgr_regs __iomem *qmgr_regs;
+#if DEBUG_QMGR
+        BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
+
+        printk(KERN_DEBUG "Queue %s(%i) put %X\n",
+               qmgr_queue_descs[queue], queue, val);
+#endif
         __raw_writel(val, &qmgr_regs->acc[queue][0]);
 }
 
 static inline u32 qmgr_get_entry(unsigned int queue)
 {
+        u32 val;
         extern struct qmgr_regs __iomem *qmgr_regs;
-        return __raw_readl(&qmgr_regs->acc[queue][0]);
+        val = __raw_readl(&qmgr_regs->acc[queue][0]);
+#if DEBUG_QMGR
+        BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
+
+        printk(KERN_DEBUG "Queue %s(%i) get %X\n",
+               qmgr_queue_descs[queue], queue, val);
+#endif
+        return val;
 }
 
 static inline int qmgr_get_stat1(unsigned int queue)
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index c6cb069a5a83..bfddc73d0a20 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -14,8 +14,6 @@
 #include <linux/module.h>
 #include <mach/qmgr.h>
 
-#define DEBUG           0
-
 struct qmgr_regs __iomem *qmgr_regs;
 static struct resource *mem_res;
 static spinlock_t qmgr_lock;
@@ -23,6 +21,10 @@ static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
 static void (*irq_handlers[HALF_QUEUES])(void *pdev);
 static void *irq_pdevs[HALF_QUEUES];
 
+#if DEBUG_QMGR
+char qmgr_queue_descs[QUEUES][32];
+#endif
+
 void qmgr_set_irq(unsigned int queue, int src,
                   void (*handler)(void *pdev), void *pdev)
 {
@@ -70,6 +72,7 @@ void qmgr_disable_irq(unsigned int queue)
         spin_lock_irqsave(&qmgr_lock, flags);
         __raw_writel(__raw_readl(&qmgr_regs->irqen[0]) & ~(1 << queue),
                      &qmgr_regs->irqen[0]);
+        __raw_writel(1 << queue, &qmgr_regs->irqstat[0]); /* clear */
         spin_unlock_irqrestore(&qmgr_lock, flags);
 }
 
@@ -81,9 +84,16 @@ static inline void shift_mask(u32 *mask)
         mask[0] <<= 1;
 }
 
+#if DEBUG_QMGR
 int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
                        unsigned int nearly_empty_watermark,
-                       unsigned int nearly_full_watermark)
+                       unsigned int nearly_full_watermark,
+                       const char *desc_format, const char* name)
+#else
+int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
+                         unsigned int nearly_empty_watermark,
+                         unsigned int nearly_full_watermark)
+#endif
 {
         u32 cfg, addr = 0, mask[4]; /* in 16-dwords */
         int err;
@@ -151,12 +161,13 @@ int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
         used_sram_bitmap[2] |= mask[2];
         used_sram_bitmap[3] |= mask[3];
         __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]);
-        spin_unlock_irq(&qmgr_lock);
-
-#if DEBUG
-        printk(KERN_DEBUG "qmgr: requested queue %i, addr = 0x%02X\n",
-               queue, addr);
+#if DEBUG_QMGR
+        snprintf(qmgr_queue_descs[queue], sizeof(qmgr_queue_descs[0]),
+                 desc_format, name);
+        printk(KERN_DEBUG "qmgr: requested queue %s(%i) addr = 0x%02X\n",
+               qmgr_queue_descs[queue], queue, addr);
 #endif
+        spin_unlock_irq(&qmgr_lock);
         return 0;
 
 err:
@@ -189,6 +200,11 @@ void qmgr_release_queue(unsigned int queue)
         while (addr--)
                 shift_mask(mask);
 
+#if DEBUG_QMGR
+        printk(KERN_DEBUG "qmgr: releasing queue %s(%i)\n",
+               qmgr_queue_descs[queue], queue);
+        qmgr_queue_descs[queue][0] = '\x0';
+#endif
         __raw_writel(0, &qmgr_regs->sram[queue]);
 
         used_sram_bitmap[0] &= ~mask[0];
@@ -199,9 +215,10 @@ void qmgr_release_queue(unsigned int queue)
         spin_unlock_irq(&qmgr_lock);
 
         module_put(THIS_MODULE);
-#if DEBUG
-        printk(KERN_DEBUG "qmgr: released queue %i\n", queue);
-#endif
+
+        while ((addr = qmgr_get_entry(queue)))
+                printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
+                       queue, addr);
 }
 
 static int qmgr_init(void)
@@ -272,5 +289,10 @@ EXPORT_SYMBOL(qmgr_regs);
 EXPORT_SYMBOL(qmgr_set_irq);
 EXPORT_SYMBOL(qmgr_enable_irq);
 EXPORT_SYMBOL(qmgr_disable_irq);
+#if DEBUG_QMGR
+EXPORT_SYMBOL(qmgr_queue_descs);
 EXPORT_SYMBOL(qmgr_request_queue);
+#else
+EXPORT_SYMBOL(__qmgr_request_queue);
+#endif
 EXPORT_SYMBOL(qmgr_release_queue);
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 0acd95ecf27e..921c947b5b6b 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -231,7 +231,6 @@ static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
 
 static void __init nas100d_init(void)
 {
-        DECLARE_MAC_BUF(mac_buf);
         uint8_t __iomem *f;
         int i;
 
@@ -294,8 +293,8 @@ static void __init nas100d_init(void)
 #endif
                 iounmap(f);
         }
-        printk(KERN_INFO "NAS100D: Using MAC address %s for port 0\n",
-               print_mac(mac_buf, nas100d_plat_eth[0].hwaddr));
+        printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
+               nas100d_plat_eth[0].hwaddr);
 
 }
 
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index bc9d920ae54f..ff6a08d02cc4 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -220,7 +220,6 @@ static struct sys_timer nslu2_timer = {
 
 static void __init nslu2_init(void)
 {
-        DECLARE_MAC_BUF(mac_buf);
         uint8_t __iomem *f;
         int i;
 
@@ -275,8 +274,8 @@ static void __init nslu2_init(void)
 #endif
                 iounmap(f);
         }
-        printk(KERN_INFO "NSLU2: Using MAC address %s for port 0\n",
-               print_mac(mac_buf, nslu2_plat_eth[0].hwaddr));
+        printk(KERN_INFO "NSLU2: Using MAC address %pM for port 0\n",
+               nslu2_plat_eth[0].hwaddr);
 
 }
 
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 0bb1fbd84ccb..7b8ef97fb501 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -57,6 +57,7 @@ void __init kirkwood_map_io(void)
  ****************************************************************************/
 static struct orion_ehci_data kirkwood_ehci_data = {
         .dram           = &kirkwood_mbus_dram_info,
+        .phy_version    = EHCI_PHY_NA,
 };
 
 static u64 ehci_dmamask = 0xffffffffUL;
@@ -153,6 +154,64 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 
 
 /*****************************************************************************
+ * GE01
+ ****************************************************************************/
+struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
+        .dram           = &kirkwood_mbus_dram_info,
+        .shared_smi     = &kirkwood_ge00_shared,
+};
+
+static struct resource kirkwood_ge01_shared_resources[] = {
+        {
+                .name   = "ge01 base",
+                .start  = GE01_PHYS_BASE + 0x2000,
+                .end    = GE01_PHYS_BASE + 0x3fff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .name   = "ge01 err irq",
+                .start  = IRQ_KIRKWOOD_GE01_ERR,
+                .end    = IRQ_KIRKWOOD_GE01_ERR,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device kirkwood_ge01_shared = {
+        .name           = MV643XX_ETH_SHARED_NAME,
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &kirkwood_ge01_shared_data,
+        },
+        .num_resources  = ARRAY_SIZE(kirkwood_ge01_shared_resources),
+        .resource       = kirkwood_ge01_shared_resources,
+};
+
+static struct resource kirkwood_ge01_resources[] = {
+        {
+                .name   = "ge01 irq",
+                .start  = IRQ_KIRKWOOD_GE01_SUM,
+                .end    = IRQ_KIRKWOOD_GE01_SUM,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device kirkwood_ge01 = {
+        .name           = MV643XX_ETH_NAME,
+        .id             = 1,
+        .num_resources  = 1,
+        .resource       = kirkwood_ge01_resources,
+};
+
+void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
+{
+        eth_data->shared = &kirkwood_ge01_shared;
+        kirkwood_ge01.dev.platform_data = eth_data;
+
+        platform_device_register(&kirkwood_ge01_shared);
+        platform_device_register(&kirkwood_ge01);
+}
+
+
+/*****************************************************************************
  * Ethernet switch
  ****************************************************************************/
 static struct resource kirkwood_switch_resources[] = {
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 5774632a67e3..fe367c18e722 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -30,6 +30,7 @@ void kirkwood_pcie_id(u32 *dev, u32 *rev);
 
 void kirkwood_ehci_init(void);
 void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
+void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data);
 void kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq);
 void kirkwood_pcie_init(void);
 void kirkwood_rtc_init(void);
diff --git a/arch/arm/mach-kirkwood/include/mach/dma.h b/arch/arm/mach-kirkwood/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-kirkwood/include/mach/gpio.h b/arch/arm/mach-kirkwood/include/mach/gpio.h
new file mode 100644
index 000000000000..81b335eb62ec
--- /dev/null
+++ b/arch/arm/mach-kirkwood/include/mach/gpio.h
@@ -0,0 +1,38 @@
+/*
+ * arch/asm-arm/mach-kirkwood/include/mach/gpio.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+#include <mach/irqs.h>
+#include <plat/gpio.h>
+#include <asm-generic/gpio.h>           /* cansleep wrappers */
+
+#define GPIO_MAX                50
+#define GPIO_OFF(pin)           (((pin) >> 5) ? 0x0140 : 0x0100)
+#define GPIO_OUT(pin)           (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x00)
+#define GPIO_IO_CONF(pin)       (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x04)
+#define GPIO_BLINK_EN(pin)      (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x08)
+#define GPIO_IN_POL(pin)        (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x0c)
+#define GPIO_DATA_IN(pin)       (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x10)
+#define GPIO_EDGE_CAUSE(pin)    (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x14)
+#define GPIO_EDGE_MASK(pin)     (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x18)
+#define GPIO_LEVEL_MASK(pin)    (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x1c)
+
+static inline int gpio_to_irq(int pin)
+{
+        return pin + IRQ_KIRKWOOD_GPIO_START;
+}
+
+static inline int irq_to_gpio(int irq)
+{
+        return irq - IRQ_KIRKWOOD_GPIO_START;
+}
+
+
+#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/irqs.h b/arch/arm/mach-kirkwood/include/mach/irqs.h
index ffab89f21c11..f00a0a45a67e 100644
--- a/arch/arm/mach-kirkwood/include/mach/irqs.h
+++ b/arch/arm/mach-kirkwood/include/mach/irqs.h
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_IRQS_H
 #define __ASM_ARCH_IRQS_H
 
-#include "kirkwood.h"   /* need GPIO_MAX */
-
 /*
  * Low Interrupt Controller
  */
@@ -51,12 +49,13 @@
 #define IRQ_KIRKWOOD_GPIO_HIGH_8_15     40
 #define IRQ_KIRKWOOD_GPIO_HIGH_16_23    41
 #define IRQ_KIRKWOOD_GE00_ERR   46
+#define IRQ_KIRKWOOD_GE01_ERR   47
 
 /*
  * KIRKWOOD General Purpose Pins
  */
 #define IRQ_KIRKWOOD_GPIO_START 64
-#define NR_GPIO_IRQS            GPIO_MAX
+#define NR_GPIO_IRQS            50
 
 #define NR_IRQS                 (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS)
 
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index eae42406fd86..ada480c0e197 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -117,7 +117,4 @@
 #define SATA_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
 
 
-#define GPIO_MAX                50
-
-
 #endif
diff --git a/arch/arm/mach-kirkwood/include/mach/memory.h b/arch/arm/mach-kirkwood/include/mach/memory.h
index b5fb34bdccd5..45431e131465 100644
--- a/arch/arm/mach-kirkwood/include/mach/memory.h
+++ b/arch/arm/mach-kirkwood/include/mach/memory.h
@@ -7,8 +7,4 @@
 
 #define PHYS_OFFSET             UL(0x00000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-
 #endif
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 5790643ffe07..efb86b700276 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -13,10 +13,45 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <plat/irq.h>
+#include <asm/gpio.h>
 #include "common.h"
 
+static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+        BUG_ON(irq < IRQ_KIRKWOOD_GPIO_LOW_0_7);
+        BUG_ON(irq > IRQ_KIRKWOOD_GPIO_HIGH_16_23);
+
+        orion_gpio_irq_handler((irq - IRQ_KIRKWOOD_GPIO_LOW_0_7) << 3);
+}
+
 void __init kirkwood_init_irq(void)
 {
+        int i;
+
         orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
         orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
+
+        /*
+         * Mask and clear GPIO IRQ interrupts.
+         */
+        writel(0, GPIO_LEVEL_MASK(0));
+        writel(0, GPIO_EDGE_MASK(0));
+        writel(0, GPIO_EDGE_CAUSE(0));
+        writel(0, GPIO_LEVEL_MASK(32));
+        writel(0, GPIO_EDGE_MASK(32));
+        writel(0, GPIO_EDGE_CAUSE(32));
+
+        for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) {
+                set_irq_chip(i, &orion_gpio_irq_level_chip);
+                set_irq_handler(i, handle_level_irq);
+                irq_desc[i].status |= IRQ_LEVEL;
+                set_irq_flags(i, IRQF_VALID);
+        }
+        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler);
 }
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 175054abd630..9a0e905d10cd 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -80,24 +80,38 @@ static struct dsa_platform_data rd88f6281_switch_data = {
         .port_names[1]  = "lan2",
         .port_names[2]  = "lan3",
         .port_names[3]  = "lan4",
-        .port_names[4]  = "wan",
         .port_names[5]  = "cpu",
 };
 
+static struct mv643xx_eth_platform_data rd88f6281_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(11),
+};
+
 static struct mv_sata_platform_data rd88f6281_sata_data = {
         .n_ports        = 2,
 };
 
 static void __init rd88f6281_init(void)
 {
+        u32 dev, rev;
+
         /*
          * Basic setup. Needs to be called early.
          */
         kirkwood_init();
 
         kirkwood_ehci_init();
+
         kirkwood_ge00_init(&rd88f6281_ge00_data);
+        kirkwood_pcie_id(&dev, &rev);
+        if (rev == MV88F6281_REV_A0) {
+                rd88f6281_switch_data.sw_addr = 10;
+                kirkwood_ge01_init(&rd88f6281_ge01_data);
+        } else {
+                rd88f6281_switch_data.port_names[4] = "wan";
+        }
         kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ);
+
         kirkwood_rtc_init();
         kirkwood_sata_init(&rd88f6281_sata_data);
         kirkwood_uart0_init();
diff --git a/arch/arm/mach-ks8695/Kconfig b/arch/arm/mach-ks8695/Kconfig
index ce1cf8de2b4d..2754daabda55 100644
--- a/arch/arm/mach-ks8695/Kconfig
+++ b/arch/arm/mach-ks8695/Kconfig
@@ -8,6 +8,12 @@ config MACH_KS8695
           Say 'Y' here if you want your kernel to run on the original
           Kendin-Micrel KS8695 development board.
 
+config MACH_DSM320
+        bool "DSM-320 Wireless Media Player"
+        help
+          Say 'Y' here if you want your kernel to run on the D-Link
+          DSM-320 Wireless Media Player.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile
index ade42b73afbb..f735d2cc0294 100644
--- a/arch/arm/mach-ks8695/Makefile
+++ b/arch/arm/mach-ks8695/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_LEDS)		+= leds.o
 
 # Board-specific support
 obj-$(CONFIG_MACH_KS8695)       += board-micrel.o
+obj-$(CONFIG_MACH_DSM320)       += board-dsm320.o
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c
new file mode 100644
index 000000000000..521ff0789f39
--- /dev/null
+++ b/arch/arm/mach-ks8695/board-dsm320.c
@@ -0,0 +1,131 @@
+/*
+ * arch/arm/mach-ks8695/board-dsm320.c
+ *
+ * DSM-320 D-Link Wireless Media Player, board support.
+ *
+ * Copyright 2008 Simtec Electronics
+ *                Daniel Silverstone <dsilvers@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/mach-types.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/devices.h>
+#include <mach/gpio.h>
+
+#include "generic.h"
+
+#ifdef CONFIG_PCI
+static int dsm320_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+        switch (slot) {
+        case 0:
+                /* PCI-AHB bridge? */
+                return KS8695_IRQ_EXTERN0;
+        case 18:
+                /* Mini PCI slot */
+                return KS8695_IRQ_EXTERN2;
+        case 20:
+                /* RealMAGIC chip */
+                return KS8695_IRQ_EXTERN0;
+        }
+        BUG();
+}
+
+static struct ks8695_pci_cfg __initdata dsm320_pci = {
+        .mode           = KS8695_MODE_MINIPCI,
+        .map_irq        = dsm320_pci_map_irq,
+};
+
+static void __init dsm320_register_pci(void)
+{
+        /* Initialise the GPIO lines for interrupt mode */
+        /* RealMAGIC */
+        ks8695_gpio_interrupt(KS8695_GPIO_0, IRQ_TYPE_LEVEL_LOW);
+        /* MiniPCI Slot */
+        ks8695_gpio_interrupt(KS8695_GPIO_2, IRQ_TYPE_LEVEL_LOW);
+
+        ks8695_init_pci(&dsm320_pci);
+}
+
+#else
+static inline void __init dsm320_register_pci(void) { }
+#endif
+
+static struct physmap_flash_data dsm320_nor_pdata = {
+        .width          = 4,
+        .nr_parts       = 0,
+};
+
+static struct resource dsm320_nor_resource[] = {
+        [0] = {
+                .start = SZ_32M, /* We expect the bootloader to map
+                                  * the flash here.
+                                  */
+                .end   = SZ_32M + SZ_4M - 1,
+                .flags = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device dsm320_device_nor = {
+        .name           = "physmap-flash",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dsm320_nor_resource),
+        .resource       = dsm320_nor_resource,
+        .dev            = {
+                .platform_data = &dsm320_nor_pdata,
+        },
+};
+
+void __init dsm320_register_nor(void)
+{
+        int ret;
+
+        ret = platform_device_register(&dsm320_device_nor);
+        if (ret < 0)
+                printk(KERN_ERR "failed to register physmap-flash device\n");
+}
+
+static void __init dsm320_init(void)
+{
+        /* GPIO registration */
+        ks8695_register_gpios();
+
+        /* PCI registration */
+        dsm320_register_pci();
+
+        /* Network device */
+        ks8695_add_device_lan();        /* eth0 = LAN */
+
+        /* NOR devices */
+        dsm320_register_nor();
+}
+
+MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player")
+        /* Maintainer: Simtec Electronics. */
+        .phys_io        = KS8695_IO_PA,
+        .io_pg_offst    = (KS8695_IO_VA >> 18) & 0xfffc,
+        .boot_params    = KS8695_SDRAM_PA + 0x100,
+        .map_io         = ks8695_map_io,
+        .init_irq       = ks8695_init_irq,
+        .init_machine   = dsm320_init,
+        .timer          = &ks8695_timer,
+MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index 0468e93b7d3b..8ceaf5ac6e2c 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -18,6 +18,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/gpio.h>
 #include <mach/devices.h>
 
 #include "generic.h"
@@ -39,6 +40,8 @@ static void __init micrel_init(void)
 {
         printk(KERN_INFO "Micrel KS8695 Development Board initializing\n");
 
+        ks8695_register_gpios();
+
 #ifdef CONFIG_PCI
         ks8695_init_pci(&micrel_pci);
 #endif
diff --git a/arch/arm/mach-ks8695/devices.c b/arch/arm/mach-ks8695/devices.c
index 4bd251482c8f..36ab0fd3d9b6 100644
--- a/arch/arm/mach-ks8695/devices.c
+++ b/arch/arm/mach-ks8695/devices.c
@@ -25,19 +25,20 @@
 #include <mach/regs-wan.h>
 #include <mach/regs-lan.h>
 #include <mach/regs-hpna.h>
+#include <mach/regs-switch.h>
+#include <mach/regs-misc.h>
 
 
 /* --------------------------------------------------------------------
  *  Ethernet
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_ARM_KS8695_ETHER) || defined(CONFIG_ARM_KS8695_ETHER_MODULE)
 static u64 eth_dmamask = 0xffffffffUL;
 
 static struct resource ks8695_wan_resources[] = {
         [0] = {
-                .start  = KS8695_WAN_VA,
-                .end    = KS8695_WAN_VA + 0x00ff,
+                .start  = KS8695_WAN_PA,
+                .end    = KS8695_WAN_PA + 0x00ff,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -58,6 +59,12 @@ static struct resource ks8695_wan_resources[] = {
                 .end    = KS8695_IRQ_WAN_LINK,
                 .flags  = IORESOURCE_IRQ,
         },
+        [4] = {
+                .name   = "WAN PHY",
+                .start  = KS8695_MISC_PA,
+                .end    = KS8695_MISC_PA + 0x1f,
+                .flags  = IORESOURCE_MEM,
+        },
 };
 
 static struct platform_device ks8695_wan_device = {
@@ -74,8 +81,8 @@ static struct platform_device ks8695_wan_device = {
 
 static struct resource ks8695_lan_resources[] = {
         [0] = {
-                .start  = KS8695_LAN_VA,
-                .end    = KS8695_LAN_VA + 0x00ff,
+                .start  = KS8695_LAN_PA,
+                .end    = KS8695_LAN_PA + 0x00ff,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -90,6 +97,12 @@ static struct resource ks8695_lan_resources[] = {
                 .end    = KS8695_IRQ_LAN_TX_STATUS,
                 .flags  = IORESOURCE_IRQ,
         },
+        [3] = {
+                .name   = "LAN SWITCH",
+                .start  = KS8695_SWITCH_PA,
+                .end    = KS8695_SWITCH_PA + 0x4f,
+                .flags  = IORESOURCE_MEM,
+        },
 };
 
 static struct platform_device ks8695_lan_device = {
@@ -106,8 +119,8 @@ static struct platform_device ks8695_lan_device = {
 
 static struct resource ks8695_hpna_resources[] = {
         [0] = {
-                .start  = KS8695_HPNA_VA,
-                .end    = KS8695_HPNA_VA + 0x00ff,
+                .start  = KS8695_HPNA_PA,
+                .end    = KS8695_HPNA_PA + 0x00ff,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -149,18 +162,12 @@ void __init ks8696_add_device_hpna(void)
 {
         platform_device_register(&ks8695_hpna_device);
 }
-#else
-void __init ks8695_add_device_wan(void) {}
-void __init ks8695_add_device_lan(void) {}
-void __init ks8696_add_device_hpna(void) {}
-#endif
 
 
 /* --------------------------------------------------------------------
  *  Watchdog
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_KS8695_WATCHDOG) || defined(CONFIG_KS8695_WATCHDOG_MODULE)
 static struct platform_device ks8695_wdt_device = {
         .name           = "ks8695_wdt",
         .id             = -1,
@@ -171,9 +178,6 @@ static void __init ks8695_add_device_watchdog(void)
 {
         platform_device_register(&ks8695_wdt_device);
 }
-#else
-static void __init ks8695_add_device_watchdog(void) {}
-#endif
 
 
 /* --------------------------------------------------------------------
@@ -190,7 +194,7 @@ void __init ks8695_init_leds(u8 cpu_led, u8 timer_led)
         gpio_direction_output(cpu_led, 1);
         gpio_direction_output(timer_led, 1);
 
-        ks8695_leds_cpu   = cpu_led;
+        ks8695_leds_cpu   = cpu_led;
         ks8695_leds_timer = timer_led;
 }
 #else
diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c
index 9aecf0c4b8b1..55fbf7111a5b 100644
--- a/arch/arm/mach-ks8695/gpio.c
+++ b/arch/arm/mach-ks8695/gpio.c
@@ -2,6 +2,8 @@
  * arch/arm/mach-ks8695/gpio.c
  *
  * Copyright (C) 2006 Andrew Victor
+ * Updated to GPIOLIB, Copyright 2008 Simtec Electronics
+ *                     Daniel Silverstone <dsilvers@simtec.co.uk>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -35,7 +37,7 @@
  * Configure a GPIO line for either GPIO function, or its internal
  * function (Interrupt, Timer, etc).
  */
-static void __init_or_module ks8695_gpio_mode(unsigned int pin, short gpio)
+static void ks8695_gpio_mode(unsigned int pin, short gpio)
 {
         unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN };
         unsigned long x, flags;
@@ -61,7 +63,7 @@ static unsigned short gpio_irq[] = { KS8695_IRQ_EXTERN0, KS8695_IRQ_EXTERN1, KS8
 /*
  * Configure GPIO pin as external interrupt source.
  */
-int __init_or_module ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
+int ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
 {
         unsigned long x, flags;
 
@@ -94,7 +96,7 @@ EXPORT_SYMBOL(ks8695_gpio_interrupt);
 /*
  * Configure the GPIO line as an input.
  */
-int __init_or_module gpio_direction_input(unsigned int pin)
+static int ks8695_gpio_direction_input(struct gpio_chip *gc, unsigned int pin)
 {
         unsigned long x, flags;
 
@@ -115,13 +117,13 @@ int __init_or_module gpio_direction_input(unsigned int pin)
 
         return 0;
 }
-EXPORT_SYMBOL(gpio_direction_input);
 
 
 /*
  * Configure the GPIO line as an output, with default state.
  */
-int __init_or_module gpio_direction_output(unsigned int pin, unsigned int state)
+static int ks8695_gpio_direction_output(struct gpio_chip *gc,
+                                        unsigned int pin, int state)
 {
         unsigned long x, flags;
 
@@ -150,13 +152,13 @@ int __init_or_module gpio_direction_output(unsigned int pin, unsigned int state)
 
         return 0;
 }
-EXPORT_SYMBOL(gpio_direction_output);
 
 
 /*
  * Set the state of an output GPIO line.
  */
-void gpio_set_value(unsigned int pin, unsigned int state)
+static void ks8695_gpio_set_value(struct gpio_chip *gc,
+                                  unsigned int pin, int state)
 {
         unsigned long x, flags;
 
@@ -175,13 +177,12 @@ void gpio_set_value(unsigned int pin, unsigned int state)
 
         local_irq_restore(flags);
 }
-EXPORT_SYMBOL(gpio_set_value);
 
 
 /*
  * Read the state of a GPIO line.
  */
-int gpio_get_value(unsigned int pin)
+static int ks8695_gpio_get_value(struct gpio_chip *gc, unsigned int pin)
 {
         unsigned long x;
 
@@ -191,21 +192,18 @@ int gpio_get_value(unsigned int pin)
         x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
         return (x & IOPD(pin)) != 0;
 }
-EXPORT_SYMBOL(gpio_get_value);
 
 
 /*
  * Map GPIO line to IRQ number.
  */
-int gpio_to_irq(unsigned int pin)
+static int ks8695_gpio_to_irq(struct gpio_chip *gc, unsigned int pin)
 {
         if (pin > KS8695_GPIO_3)        /* only GPIO 0..3 can generate IRQ */
                 return -EINVAL;
 
         return gpio_irq[pin];
 }
-EXPORT_SYMBOL(gpio_to_irq);
-
 
 /*
  * Map IRQ number to GPIO line.
@@ -219,6 +217,26 @@ int irq_to_gpio(unsigned int irq)
 }
 EXPORT_SYMBOL(irq_to_gpio);
 
+/* GPIOLIB interface */
+
+static struct gpio_chip ks8695_gpio_chip = {
+        .label                  = "KS8695",
+        .direction_input        = ks8695_gpio_direction_input,
+        .direction_output       = ks8695_gpio_direction_output,
+        .get                    = ks8695_gpio_get_value,
+        .set                    = ks8695_gpio_set_value,
+        .to_irq                 = ks8695_gpio_to_irq,
+        .base                   = 0,
+        .ngpio                  = 16,
+        .can_sleep              = 0,
+};
+
+/* Register the GPIOs */
+void ks8695_register_gpios(void)
+{
+        if (gpiochip_add(&ks8695_gpio_chip))
+                printk(KERN_ERR "Unable to register core GPIOs\n");
+}
 
 /* .... Debug interface ..................................................... */
 
diff --git a/arch/arm/mach-ks8695/include/mach/dma.h b/arch/arm/mach-ks8695/include/mach/dma.h
deleted file mode 100644
index 561206280089..000000000000
--- a/arch/arm/mach-ks8695/include/mach/dma.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-ks8695/include/mach/dma.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-ks8695/include/mach/gpio.h b/arch/arm/mach-ks8695/include/mach/gpio.h
index d4af5c335f16..86312d476bc6 100644
--- a/arch/arm/mach-ks8695/include/mach/gpio.h
+++ b/arch/arm/mach-ks8695/include/mach/gpio.h
@@ -30,53 +30,28 @@
 #define KS8695_GPIO_14          14
 #define KS8695_GPIO_15          15
 
-
 /*
  * Configure GPIO pin as external interrupt source.
  */
-int __init_or_module ks8695_gpio_interrupt(unsigned int pin, unsigned int type);
-
-/*
- * Configure the GPIO line as an input.
- */
-int __init_or_module gpio_direction_input(unsigned int pin);
-
-/*
- * Configure the GPIO line as an output, with default state.
- */
-int __init_or_module gpio_direction_output(unsigned int pin, unsigned int state);
-
-/*
- * Set the state of an output GPIO line.
- */
-void gpio_set_value(unsigned int pin, unsigned int state);
-
-/*
- * Read the state of a GPIO line.
- */
-int gpio_get_value(unsigned int pin);
-
-/*
- * Map GPIO line to IRQ number.
- */
-int gpio_to_irq(unsigned int pin);
+extern int ks8695_gpio_interrupt(unsigned int pin, unsigned int type);
 
 /*
  * Map IRQ number to GPIO line.
  */
-int irq_to_gpio(unsigned int irq);
-
+extern int irq_to_gpio(unsigned int irq);
 
 #include <asm-generic/gpio.h>
 
-static inline int gpio_request(unsigned int pin, const char *label)
-{
-        return 0;
-}
+/* If it turns out that we need to optimise GPIO access for the
+ * Micrel's GPIOs, then these can be changed to check their argument
+ * directly as static inlines. However for now it's probably not
+ * worthwhile.
+ */
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+#define gpio_to_irq __gpio_to_irq
 
-static inline void gpio_free(unsigned int pin)
-{
-        might_sleep();
-}
+/* Register the GPIOs */
+extern void ks8695_register_gpios(void);
 
 #endif
diff --git a/arch/arm/mach-ks8695/include/mach/io.h b/arch/arm/mach-ks8695/include/mach/io.h
index f364f24ffe1e..a7a63ac3ba4e 100644
--- a/arch/arm/mach-ks8695/include/mach/io.h
+++ b/arch/arm/mach-ks8695/include/mach/io.h
@@ -13,7 +13,7 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-ks8695/include/mach/memory.h b/arch/arm/mach-ks8695/include/mach/memory.h
index 8fbc4c76c38b..6d5887cf5742 100644
--- a/arch/arm/mach-ks8695/include/mach/memory.h
+++ b/arch/arm/mach-ks8695/include/mach/memory.h
@@ -37,11 +37,6 @@ extern struct bus_type platform_bus_type;
                                         (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); })
 #define __arch_page_to_dma(dev, x)      __arch_virt_to_dma(dev, page_address(x))
 
-#else
-
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 #endif
 
 #endif
diff --git a/arch/arm/mach-l7200/include/mach/dma.h b/arch/arm/mach-l7200/include/mach/dma.h
deleted file mode 100644
index c7e48bd4590c..000000000000
--- a/arch/arm/mach-l7200/include/mach/dma.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/dma.h
- *
- * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *  08-29-2000  SJH     Created
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
-
-/*
- * This is the maximum DMA address that can be DMAd to.
- * There should not be more than (0xd0000000 - 0xc0000000)
- * bytes of RAM.
- */
-#define MAX_DMA_ADDRESS         0xd0000000
-
-#define DMA_S0                  0
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-l7200/include/mach/io.h b/arch/arm/mach-l7200/include/mach/io.h
index d432ba9e5dff..a770a89fb708 100644
--- a/arch/arm/mach-l7200/include/mach/io.h
+++ b/arch/arm/mach-l7200/include/mach/io.h
@@ -10,18 +10,12 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * There are not real ISA nor PCI buses, so we fake it.
  */
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-#define __io(a) __io(a)
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-l7200/include/mach/memory.h b/arch/arm/mach-l7200/include/mach/memory.h
index f338cf3ffd93..9fb40ed2f03b 100644
--- a/arch/arm/mach-l7200/include/mach/memory.h
+++ b/arch/arm/mach-l7200/include/mach/memory.h
@@ -17,9 +17,6 @@
  */
 #define PHYS_OFFSET     UL(0xf0000000)
 
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 /*
  * Cache flushing area - ROM
  */
diff --git a/arch/arm/mach-lh7a40x/clcd.c b/arch/arm/mach-lh7a40x/clcd.c
index a2a543258fc3..c472b9e8b37c 100644
--- a/arch/arm/mach-lh7a40x/clcd.c
+++ b/arch/arm/mach-lh7a40x/clcd.c
@@ -207,7 +207,7 @@ static struct clcd_board clcd_platform_data = {
 static struct amba_device name##_device = {                     \
         .dev = {                                                \
                 .coherent_dma_mask = ~0,                        \
-                .bus_id = busid,                                \
+                .init_name = busid,                             \
                 .platform_data = plat,                          \
                 },                                              \
         .res = {                                                \
diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c
index 4fb23ac6b5ac..6182f5410b4d 100644
--- a/arch/arm/mach-lh7a40x/clocks.c
+++ b/arch/arm/mach-lh7a40x/clocks.c
@@ -14,21 +14,14 @@
 #include <linux/err.h>
 
 struct module;
-struct icst525_params;
 
 struct clk {
         struct list_head node;
         unsigned long rate;
         struct module *owner;
         const char *name;
-//      void *data;
-//      const struct icst525_params *params;
-//      void (*setvco)(struct clk *, struct icst525_vco vco);
 };
 
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
-
 /* ----- */
 
 #define MAINDIV1(c)     (((c) >>  7) & 0x0f)
@@ -79,31 +72,15 @@ unsigned int pclkfreq_get (void)
 
 /* ----- */
 
-static LIST_HEAD(clocks);
-static DECLARE_MUTEX(clocks_sem);
-
 struct clk *clk_get (struct device *dev, const char *id)
 {
-        struct clk *p;
-        struct clk *clk = ERR_PTR(-ENOENT);
-
-        down (&clocks_sem);
-        list_for_each_entry (p, &clocks, node) {
-                if (strcmp (id, p->name) == 0
-                    && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        up (&clocks_sem);
-
-        return clk;
+        return dev && strcmp(dev_name(dev), "cldc-lh7a40x") == 0
+                 ? NULL : ERR_PTR(-ENOENT);
 }
 EXPORT_SYMBOL(clk_get);
 
 void clk_put (struct clk *clk)
 {
-        module_put(clk->owner);
 }
 EXPORT_SYMBOL(clk_put);
 
@@ -118,20 +95,9 @@ void clk_disable (struct clk *clk)
 }
 EXPORT_SYMBOL(clk_disable);
 
-int clk_use (struct clk *clk)
-{
-        return 0;
-}
-EXPORT_SYMBOL(clk_use);
-
-void clk_unuse (struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_unuse);
-
 unsigned long clk_get_rate (struct clk *clk)
 {
-        return clk->rate;
+        return 0;
 }
 EXPORT_SYMBOL(clk_get_rate);
 
@@ -143,56 +109,6 @@ EXPORT_SYMBOL(clk_round_rate);
 
 int clk_set_rate (struct clk *clk, unsigned long rate)
 {
-        int ret = -EIO;
-        return ret;
+        return -EIO;
 }
 EXPORT_SYMBOL(clk_set_rate);
-
-#if 0
-/*
- * These are fixed clocks.
- */
-static struct clk kmi_clk = {
-        .name   = "KMIREFCLK",
-        .rate   = 24000000,
-};
-
-static struct clk uart_clk = {
-        .name   = "UARTCLK",
-        .rate   = 24000000,
-};
-
-static struct clk mmci_clk = {
-        .name   = "MCLK",
-        .rate   = 33000000,
-};
-#endif
-
-static struct clk clcd_clk = {
-        .name   = "CLCDCLK",
-        .rate   = 0,
-};
-
-int clk_register (struct clk *clk)
-{
-        down (&clocks_sem);
-        list_add (&clk->node, &clocks);
-        up (&clocks_sem);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister (struct clk *clk)
-{
-        down (&clocks_sem);
-        list_del (&clk->node);
-        up (&clocks_sem);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init (void)
-{
-        clk_register(&clcd_clk);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-lh7a40x/include/mach/io.h b/arch/arm/mach-lh7a40x/include/mach/io.h
index 031d26f9163c..6ece45911cbc 100644
--- a/arch/arm/mach-lh7a40x/include/mach/io.h
+++ b/arch/arm/mach-lh7a40x/include/mach/io.h
@@ -11,12 +11,10 @@
 #ifndef __ASM_ARCH_IO_H
 #define __ASM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /* No ISA or PCI bus on this machine. */
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-lh7a40x/include/mach/memory.h b/arch/arm/mach-lh7a40x/include/mach/memory.h
index 1da14ff66c93..189d20e543e7 100644
--- a/arch/arm/mach-lh7a40x/include/mach/memory.h
+++ b/arch/arm/mach-lh7a40x/include/mach/memory.h
@@ -19,16 +19,6 @@
  */
 #define PHYS_OFFSET     UL(0xc0000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
 #ifdef CONFIG_DISCONTIGMEM
 
 /*
diff --git a/arch/arm/mach-loki/include/mach/dma.h b/arch/arm/mach-loki/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-loki/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-loki/include/mach/memory.h b/arch/arm/mach-loki/include/mach/memory.h
index a39533ab489d..2ed7e6e732c2 100644
--- a/arch/arm/mach-loki/include/mach/memory.h
+++ b/arch/arm/mach-loki/include/mach/memory.h
@@ -7,8 +7,4 @@
 
 #define PHYS_OFFSET             UL(0x00000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-
 #endif
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
index c6a2feb268b0..aab964591db4 100644
--- a/arch/arm/mach-msm/include/mach/io.h
+++ b/arch/arm/mach-msm/include/mach/io.h
@@ -23,11 +23,7 @@
 
 void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
 
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-#define __io(a)         __io(a)
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
index 63fd47f2e62e..f4698baec976 100644
--- a/arch/arm/mach-msm/include/mach/memory.h
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -19,9 +19,5 @@
 /* physical offset of RAM */
 #define PHYS_OFFSET             UL(0x10000000)
 
-/* bus address and physical addresses are identical */
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 #endif
 
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 345a14cb73c3..444d9c0f5ca6 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -182,7 +182,7 @@ static void __init msm_timer_init(void)
                         clockevent_delta2ns(0xf0000000 >> clock->shift, ce);
                 /* 4 gets rounded down to 3 */
                 ce->min_delta_ns = clockevent_delta2ns(4, ce);
-                ce->cpumask = cpumask_of_cpu(0);
+                ce->cpumask = cpumask_of(0);
 
                 cs->mult = clocksource_hz2mult(clock->freq, cs->shift);
                 res = clocksource_register(cs);
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 238a2f8c2d52..b0e4e0d8f506 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -167,6 +167,7 @@ void __init mv78xx0_map_io(void)
  ****************************************************************************/
 static struct orion_ehci_data mv78xx0_ehci_data = {
         .dram           = &mv78xx0_mbus_dram_info,
+        .phy_version    = EHCI_PHY_NA,
 };
 
 static u64 ehci_dmamask = 0xffffffffUL;
diff --git a/arch/arm/mach-mv78xx0/include/mach/dma.h b/arch/arm/mach-mv78xx0/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-mv78xx0/include/mach/gpio.h b/arch/arm/mach-mv78xx0/include/mach/gpio.h
new file mode 100644
index 000000000000..d9d1535ea100
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/include/mach/gpio.h
@@ -0,0 +1,40 @@
+/*
+ * arch/asm-arm/mach-mv78xx0/include/mach/gpio.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+#include <mach/irqs.h>
+#include <plat/gpio.h>
+#include <asm-generic/gpio.h>           /* cansleep wrappers */
+
+extern int mv78xx0_core_index(void);
+
+#define GPIO_MAX                32
+#define GPIO_OUT(pin)           (DEV_BUS_VIRT_BASE + 0x0100)
+#define GPIO_IO_CONF(pin)       (DEV_BUS_VIRT_BASE + 0x0104)
+#define GPIO_BLINK_EN(pin)      (DEV_BUS_VIRT_BASE + 0x0108)
+#define GPIO_IN_POL(pin)        (DEV_BUS_VIRT_BASE + 0x010c)
+#define GPIO_DATA_IN(pin)       (DEV_BUS_VIRT_BASE + 0x0110)
+#define GPIO_EDGE_CAUSE(pin)    (DEV_BUS_VIRT_BASE + 0x0114)
+#define GPIO_MASK_OFF           (mv78xx0_core_index() ? 0x18 : 0)
+#define GPIO_EDGE_MASK(pin)     (DEV_BUS_VIRT_BASE + 0x0118 + GPIO_MASK_OFF)
+#define GPIO_LEVEL_MASK(pin)    (DEV_BUS_VIRT_BASE + 0x011c + GPIO_MASK_OFF)
+
+static inline int gpio_to_irq(int pin)
+{
+        return pin + IRQ_MV78XX0_GPIO_START;
+}
+
+static inline int irq_to_gpio(int irq)
+{
+        return irq - IRQ_MV78XX0_GPIO_START;
+}
+
+
+#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h
index bebc330281ec..fa1d422196c2 100644
--- a/arch/arm/mach-mv78xx0/include/mach/irqs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_IRQS_H
 #define __ASM_ARCH_IRQS_H
 
-#include "mv78xx0.h"    /* need GPIO_MAX */
-
 /*
  * MV78xx0 Low Interrupt Controller
  */
@@ -88,7 +86,7 @@
  * MV78XX0 General Purpose Pins
  */
 #define IRQ_MV78XX0_GPIO_START  96
-#define NR_GPIO_IRQS            GPIO_MAX
+#define NR_GPIO_IRQS            32
 
 #define NR_IRQS                 (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS)
 
diff --git a/arch/arm/mach-mv78xx0/include/mach/memory.h b/arch/arm/mach-mv78xx0/include/mach/memory.h
index 9e47a140ff7a..e663042d307f 100644
--- a/arch/arm/mach-mv78xx0/include/mach/memory.h
+++ b/arch/arm/mach-mv78xx0/include/mach/memory.h
@@ -7,8 +7,4 @@
 
 #define PHYS_OFFSET             UL(0x00000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-
 #endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index ee9c5593ee92..e930ea5330a2 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -122,7 +122,4 @@
 #define SATA_PHYS_BASE          (MV78XX0_REGS_PHYS_BASE | 0xa0000)
 
 
-#define GPIO_MAX                32
-
-
 #endif
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 503e5d195ae5..e273418797b4 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -11,13 +11,42 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/pci.h>
+#include <linux/irq.h>
+#include <asm/gpio.h>
 #include <mach/mv78xx0.h>
 #include <plat/irq.h>
 #include "common.h"
 
+static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+        BUG_ON(irq < IRQ_MV78XX0_GPIO_0_7 || irq > IRQ_MV78XX0_GPIO_24_31);
+
+        orion_gpio_irq_handler((irq - IRQ_MV78XX0_GPIO_0_7) << 3);
+}
+
 void __init mv78xx0_init_irq(void)
 {
+        int i;
+
         orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
         orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
         orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
+
+        /*
+         * Mask and clear GPIO IRQ interrupts.
+         */
+        writel(0, GPIO_LEVEL_MASK(0));
+        writel(0, GPIO_EDGE_MASK(0));
+        writel(0, GPIO_EDGE_CAUSE(0));
+
+        for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) {
+                set_irq_chip(i, &orion_gpio_irq_level_chip);
+                set_irq_handler(i, handle_level_irq);
+                irq_desc[i].status |= IRQ_LEVEL;
+                set_irq_flags(i, IRQF_VALID);
+        }
+        set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler);
 }
diff --git a/arch/arm/mach-mx1/Kconfig b/arch/arm/mach-mx1/Kconfig
new file mode 100644
index 000000000000..2b59fc74784f
--- /dev/null
+++ b/arch/arm/mach-mx1/Kconfig
@@ -0,0 +1,14 @@
+if ARCH_MX1
+
+comment "MX1 Platforms"
+
+config MACH_MXLADS
+        bool
+
+config ARCH_MX1ADS
+        bool "MX1ADS platform"
+        select MACH_MXLADS
+        help
+          Say Y here if you are using Motorola MX1ADS/MXLADS boards
+
+endif
diff --git a/arch/arm/mach-mx1/Makefile b/arch/arm/mach-mx1/Makefile
new file mode 100644
index 000000000000..b969719011fa
--- /dev/null
+++ b/arch/arm/mach-mx1/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Object file lists.
+
+obj-y                   += generic.o clock.o devices.o
+
+# Specific board support
+obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o
diff --git a/arch/arm/mach-mx1/Makefile.boot b/arch/arm/mach-mx1/Makefile.boot
new file mode 100644
index 000000000000..8ed1492288a2
--- /dev/null
+++ b/arch/arm/mach-mx1/Makefile.boot
@@ -0,0 +1,4 @@
+   zreladdr-y   := 0x08008000
+params_phys-y   := 0x08000100
+initrd_phys-y   := 0x08800000
+
diff --git a/arch/arm/mach-mx1/clock.c b/arch/arm/mach-mx1/clock.c
new file mode 100644
index 000000000000..4bcd1ece55f5
--- /dev/null
+++ b/arch/arm/mach-mx1/clock.c
@@ -0,0 +1,656 @@
+/*
+ *  Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/math64.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <mach/clock.h>
+#include <mach/hardware.h>
+#include "crm_regs.h"
+
+static int _clk_enable(struct clk *clk)
+{
+        unsigned int reg;
+
+        reg = __raw_readl(clk->enable_reg);
+        reg |= 1 << clk->enable_shift;
+        __raw_writel(reg, clk->enable_reg);
+
+        return 0;
+}
+
+static void _clk_disable(struct clk *clk)
+{
+        unsigned int reg;
+
+        reg = __raw_readl(clk->enable_reg);
+        reg &= ~(1 << clk->enable_shift);
+        __raw_writel(reg, clk->enable_reg);
+}
+
+static int _clk_can_use_parent(const struct clk *clk_arr[], unsigned int size,
+                               struct clk *parent)
+{
+        int i;
+
+        for (i = 0; i < size; i++)
+                if (parent == clk_arr[i])
+                        return i;
+
+        return -EINVAL;
+}
+
+static unsigned long
+_clk_simple_round_rate(struct clk *clk, unsigned long rate, unsigned int limit)
+{
+        int div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+        if (parent_rate % rate)
+                div++;
+
+        if (div > limit)
+                div = limit;
+
+        return parent_rate / div;
+}
+
+static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate)
+{
+        return clk->parent->round_rate(clk->parent, rate);
+}
+
+static int _clk_parent_set_rate(struct clk *clk, unsigned long rate)
+{
+        return clk->parent->set_rate(clk->parent, rate);
+}
+
+/*
+ *  get the system pll clock in Hz
+ *
+ *                  mfi + mfn / (mfd +1)
+ *  f = 2 * f_ref * --------------------
+ *                        pd + 1
+ */
+static unsigned long mx1_decode_pll(unsigned int pll, u32 f_ref)
+{
+        unsigned long long ll;
+        unsigned long quot;
+
+        u32 mfi = (pll >> 10) & 0xf;
+        u32 mfn = pll & 0x3ff;
+        u32 mfd = (pll >> 16) & 0x3ff;
+        u32 pd =  (pll >> 26) & 0xf;
+
+        mfi = mfi <= 5 ? 5 : mfi;
+
+        ll = 2 * (unsigned long long)f_ref *
+                ((mfi << 16) + (mfn << 16) / (mfd + 1));
+        quot = (pd + 1) * (1 << 16);
+        ll += quot / 2;
+        do_div(ll, quot);
+        return (unsigned long)ll;
+}
+
+static unsigned long clk16m_get_rate(struct clk *clk)
+{
+        return 16000000;
+}
+
+static struct clk clk16m = {
+        .name = "CLK16M",
+        .get_rate = clk16m_get_rate,
+        .enable = _clk_enable,
+        .enable_reg = CCM_CSCR,
+        .enable_shift = CCM_CSCR_OSC_EN_SHIFT,
+        .disable = _clk_disable,
+};
+
+/* in Hz */
+static unsigned long clk32_rate;
+
+static unsigned long clk32_get_rate(struct clk *clk)
+{
+        return clk32_rate;
+}
+
+static struct clk clk32 = {
+        .name = "CLK32",
+        .get_rate = clk32_get_rate,
+};
+
+static unsigned long clk32_premult_get_rate(struct clk *clk)
+{
+        return clk_get_rate(clk->parent) * 512;
+}
+
+static struct clk clk32_premult = {
+        .name = "CLK32_premultiplier",
+        .parent = &clk32,
+        .get_rate = clk32_premult_get_rate,
+};
+
+static const struct clk *prem_clk_clocks[] = {
+        &clk32_premult,
+        &clk16m,
+};
+
+static int prem_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+        int i;
+        unsigned int reg = __raw_readl(CCM_CSCR);
+
+        i = _clk_can_use_parent(prem_clk_clocks, ARRAY_SIZE(prem_clk_clocks),
+                                parent);
+
+        switch (i) {
+        case 0:
+                reg &= ~CCM_CSCR_SYSTEM_SEL;
+                break;
+        case 1:
+                reg |= CCM_CSCR_SYSTEM_SEL;
+                break;
+        default:
+                return i;
+        }
+
+        __raw_writel(reg, CCM_CSCR);
+
+        return 0;
+}
+
+static struct clk prem_clk = {
+        .name = "prem_clk",
+        .set_parent = prem_clk_set_parent,
+};
+
+static unsigned long system_clk_get_rate(struct clk *clk)
+{
+        return mx1_decode_pll(__raw_readl(CCM_SPCTL0),
+                              clk_get_rate(clk->parent));
+}
+
+static struct clk system_clk = {
+        .name = "system_clk",
+        .parent = &prem_clk,
+        .get_rate = system_clk_get_rate,
+};
+
+static unsigned long mcu_clk_get_rate(struct clk *clk)
+{
+        return mx1_decode_pll(__raw_readl(CCM_MPCTL0),
+                              clk_get_rate(clk->parent));
+}
+
+static struct clk mcu_clk = {
+        .name = "mcu_clk",
+        .parent = &clk32_premult,
+        .get_rate = mcu_clk_get_rate,
+};
+
+static unsigned long fclk_get_rate(struct clk *clk)
+{
+        unsigned long fclk = clk_get_rate(clk->parent);
+
+        if (__raw_readl(CCM_CSCR) & CCM_CSCR_PRESC)
+                fclk /= 2;
+
+        return fclk;
+}
+
+static struct clk fclk = {
+        .name = "fclk",
+        .parent = &mcu_clk,
+        .get_rate = fclk_get_rate,
+};
+
+/*
+ *  get hclk ( SDRAM, CSI, Memory Stick, I2C, DMA )
+ */
+static unsigned long hclk_get_rate(struct clk *clk)
+{
+        return clk_get_rate(clk->parent) / (((__raw_readl(CCM_CSCR) &
+                        CCM_CSCR_BCLK_MASK) >> CCM_CSCR_BCLK_OFFSET) + 1);
+}
+
+static unsigned long hclk_round_rate(struct clk *clk, unsigned long rate)
+{
+        return _clk_simple_round_rate(clk, rate, 16);
+}
+
+static int hclk_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int div;
+        unsigned int reg;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+
+        if (div > 16 || div < 1 || ((parent_rate / div) != rate))
+                return -EINVAL;
+
+        div--;
+
+        reg = __raw_readl(CCM_CSCR);
+        reg &= ~CCM_CSCR_BCLK_MASK;
+        reg |= div << CCM_CSCR_BCLK_OFFSET;
+        __raw_writel(reg, CCM_CSCR);
+
+        return 0;
+}
+
+static struct clk hclk = {
+        .name = "hclk",
+        .parent = &system_clk,
+        .get_rate = hclk_get_rate,
+        .round_rate = hclk_round_rate,
+        .set_rate = hclk_set_rate,
+};
+
+static unsigned long clk48m_get_rate(struct clk *clk)
+{
+        return clk_get_rate(clk->parent) / (((__raw_readl(CCM_CSCR) &
+                        CCM_CSCR_USB_MASK) >> CCM_CSCR_USB_OFFSET) + 1);
+}
+
+static unsigned long clk48m_round_rate(struct clk *clk, unsigned long rate)
+{
+        return _clk_simple_round_rate(clk, rate, 8);
+}
+
+static int clk48m_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int div;
+        unsigned int reg;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+
+        if (div > 8 || div < 1 || ((parent_rate / div) != rate))
+                return -EINVAL;
+
+        div--;
+
+        reg = __raw_readl(CCM_CSCR);
+        reg &= ~CCM_CSCR_USB_MASK;
+        reg |= div << CCM_CSCR_USB_OFFSET;
+        __raw_writel(reg, CCM_CSCR);
+
+        return 0;
+}
+
+static struct clk clk48m = {
+        .name = "CLK48M",
+        .parent = &system_clk,
+        .get_rate = clk48m_get_rate,
+        .round_rate = clk48m_round_rate,
+        .set_rate = clk48m_set_rate,
+};
+
+/*
+ *  get peripheral clock 1 ( UART[12], Timer[12], PWM )
+ */
+static unsigned long perclk1_get_rate(struct clk *clk)
+{
+        return clk_get_rate(clk->parent) / (((__raw_readl(CCM_PCDR) &
+                        CCM_PCDR_PCLK1_MASK) >> CCM_PCDR_PCLK1_OFFSET) + 1);
+}
+
+static unsigned long perclk1_round_rate(struct clk *clk, unsigned long rate)
+{
+        return _clk_simple_round_rate(clk, rate, 16);
+}
+
+static int perclk1_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int div;
+        unsigned int reg;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+
+        if (div > 16 || div < 1 || ((parent_rate / div) != rate))
+                return -EINVAL;
+
+        div--;
+
+        reg = __raw_readl(CCM_PCDR);
+        reg &= ~CCM_PCDR_PCLK1_MASK;
+        reg |= div << CCM_PCDR_PCLK1_OFFSET;
+        __raw_writel(reg, CCM_PCDR);
+
+        return 0;
+}
+
+/*
+ *  get peripheral clock 2 ( LCD, SD, SPI[12] )
+ */
+static unsigned long perclk2_get_rate(struct clk *clk)
+{
+        return clk_get_rate(clk->parent) / (((__raw_readl(CCM_PCDR) &
+                        CCM_PCDR_PCLK2_MASK) >> CCM_PCDR_PCLK2_OFFSET) + 1);
+}
+
+static unsigned long perclk2_round_rate(struct clk *clk, unsigned long rate)
+{
+        return _clk_simple_round_rate(clk, rate, 16);
+}
+
+static int perclk2_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int div;
+        unsigned int reg;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+
+        if (div > 16 || div < 1 || ((parent_rate / div) != rate))
+                return -EINVAL;
+
+        div--;
+
+        reg = __raw_readl(CCM_PCDR);
+        reg &= ~CCM_PCDR_PCLK2_MASK;
+        reg |= div << CCM_PCDR_PCLK2_OFFSET;
+        __raw_writel(reg, CCM_PCDR);
+
+        return 0;
+}
+
+/*
+ *  get peripheral clock 3 ( SSI )
+ */
+static unsigned long perclk3_get_rate(struct clk *clk)
+{
+        return clk_get_rate(clk->parent) / (((__raw_readl(CCM_PCDR) &
+                        CCM_PCDR_PCLK3_MASK) >> CCM_PCDR_PCLK3_OFFSET) + 1);
+}
+
+static unsigned long perclk3_round_rate(struct clk *clk, unsigned long rate)
+{
+        return _clk_simple_round_rate(clk, rate, 128);
+}
+
+static int perclk3_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int div;
+        unsigned int reg;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+
+        if (div > 128 || div < 1 || ((parent_rate / div) != rate))
+                return -EINVAL;
+
+        div--;
+
+        reg = __raw_readl(CCM_PCDR);
+        reg &= ~CCM_PCDR_PCLK3_MASK;
+        reg |= div << CCM_PCDR_PCLK3_OFFSET;
+        __raw_writel(reg, CCM_PCDR);
+
+        return 0;
+}
+
+static struct clk perclk[] = {
+        {
+                .name = "perclk",
+                .id = 0,
+                .parent = &system_clk,
+                .get_rate = perclk1_get_rate,
+                .round_rate = perclk1_round_rate,
+                .set_rate = perclk1_set_rate,
+        }, {
+                .name = "perclk",
+                .id = 1,
+                .parent = &system_clk,
+                .get_rate = perclk2_get_rate,
+                .round_rate = perclk2_round_rate,
+                .set_rate = perclk2_set_rate,
+        }, {
+                .name = "perclk",
+                .id = 2,
+                .parent = &system_clk,
+                .get_rate = perclk3_get_rate,
+                .round_rate = perclk3_round_rate,
+                .set_rate = perclk3_set_rate,
+        }
+};
+
+static const struct clk *clko_clocks[] = {
+        &perclk[0],
+        &hclk,
+        &clk48m,
+        &clk16m,
+        &prem_clk,
+        &fclk,
+};
+
+static int clko_set_parent(struct clk *clk, struct clk *parent)
+{
+        int i;
+        unsigned int reg;
+
+        i = _clk_can_use_parent(clko_clocks, ARRAY_SIZE(clko_clocks), parent);
+        if (i < 0)
+                return i;
+
+        reg = __raw_readl(CCM_CSCR) & ~CCM_CSCR_CLKO_MASK;
+        reg |= i << CCM_CSCR_CLKO_OFFSET;
+        __raw_writel(reg, CCM_CSCR);
+
+        if (clko_clocks[i]->set_rate && clko_clocks[i]->round_rate) {
+                clk->set_rate = _clk_parent_set_rate;
+                clk->round_rate = _clk_parent_round_rate;
+        } else {
+                clk->set_rate = NULL;
+                clk->round_rate = NULL;
+        }
+
+        return 0;
+}
+
+static struct clk clko_clk = {
+        .name = "clko_clk",
+        .set_parent = clko_set_parent,
+};
+
+static struct clk dma_clk = {
+        .name = "dma_clk",
+        .parent = &hclk,
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+        .enable = _clk_enable,
+        .enable_reg = SCM_GCCR,
+        .enable_shift = SCM_GCCR_DMA_CLK_EN_OFFSET,
+        .disable = _clk_disable,
+};
+
+static struct clk csi_clk = {
+        .name = "csi_clk",
+        .parent = &hclk,
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+        .enable = _clk_enable,
+        .enable_reg = SCM_GCCR,
+        .enable_shift = SCM_GCCR_CSI_CLK_EN_OFFSET,
+        .disable = _clk_disable,
+};
+
+static struct clk mma_clk = {
+        .name = "mma_clk",
+        .parent = &hclk,
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+        .enable = _clk_enable,
+        .enable_reg = SCM_GCCR,
+        .enable_shift = SCM_GCCR_MMA_CLK_EN_OFFSET,
+        .disable = _clk_disable,
+};
+
+static struct clk usbd_clk = {
+        .name = "usbd_clk",
+        .parent = &clk48m,
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+        .enable = _clk_enable,
+        .enable_reg = SCM_GCCR,
+        .enable_shift = SCM_GCCR_USBD_CLK_EN_OFFSET,
+        .disable = _clk_disable,
+};
+
+static struct clk gpt_clk = {
+        .name = "gpt_clk",
+        .parent = &perclk[0],
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+};
+
+static struct clk uart_clk = {
+        .name = "uart_clk",
+        .parent = &perclk[0],
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+};
+
+static struct clk i2c_clk = {
+        .name = "i2c_clk",
+        .parent = &hclk,
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+};
+
+static struct clk spi_clk = {
+        .name = "spi_clk",
+        .parent = &perclk[1],
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+};
+
+static struct clk sdhc_clk = {
+        .name = "sdhc_clk",
+        .parent = &perclk[1],
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+};
+
+static struct clk lcdc_clk = {
+        .name = "lcdc_clk",
+        .parent = &perclk[1],
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+};
+
+static struct clk mshc_clk = {
+        .name = "mshc_clk",
+        .parent = &hclk,
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+};
+
+static struct clk ssi_clk = {
+        .name = "ssi_clk",
+        .parent = &perclk[2],
+        .round_rate = _clk_parent_round_rate,
+        .set_rate = _clk_parent_set_rate,
+};
+
+static struct clk rtc_clk = {
+        .name = "rtc_clk",
+        .parent = &clk32,
+};
+
+static struct clk *mxc_clks[] = {
+        &clk16m,
+        &clk32,
+        &clk32_premult,
+        &prem_clk,
+        &system_clk,
+        &mcu_clk,
+        &fclk,
+        &hclk,
+        &clk48m,
+        &perclk[0],
+        &perclk[1],
+        &perclk[2],
+        &clko_clk,
+        &dma_clk,
+        &csi_clk,
+        &mma_clk,
+        &usbd_clk,
+        &gpt_clk,
+        &uart_clk,
+        &i2c_clk,
+        &spi_clk,
+        &sdhc_clk,
+        &lcdc_clk,
+        &mshc_clk,
+        &ssi_clk,
+        &rtc_clk,
+};
+
+int __init mxc_clocks_init(unsigned long fref)
+{
+        struct clk **clkp;
+        unsigned int reg;
+
+        /* disable clocks we are able to */
+        __raw_writel(0, SCM_GCCR);
+
+        clk32_rate = fref;
+        reg = __raw_readl(CCM_CSCR);
+
+        /* detect clock reference for system PLL */
+        if (reg & CCM_CSCR_SYSTEM_SEL) {
+                prem_clk.parent = &clk16m;
+        } else {
+                /* ensure that oscillator is disabled */
+                reg &= ~(1 << CCM_CSCR_OSC_EN_SHIFT);
+                __raw_writel(reg, CCM_CSCR);
+                prem_clk.parent = &clk32_premult;
+        }
+
+        /* detect reference for CLKO */
+        reg = (reg & CCM_CSCR_CLKO_MASK) >> CCM_CSCR_CLKO_OFFSET;
+        clko_clk.parent = (struct clk *)clko_clocks[reg];
+
+        for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++)
+                clk_register(*clkp);
+
+        clk_enable(&hclk);
+        clk_enable(&fclk);
+
+        return 0;
+}
diff --git a/arch/arm/mach-mx1/crm_regs.h b/arch/arm/mach-mx1/crm_regs.h
new file mode 100644
index 000000000000..22e866ff0c09
--- /dev/null
+++ b/arch/arm/mach-mx1/crm_regs.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ *
+ * This file may be distributed under the terms of the GNU General
+ * Public License, version 2.
+ */
+
+#ifndef __ARCH_ARM_MACH_MX1_CRM_REGS_H__
+#define __ARCH_ARM_MACH_MX1_CRM_REGS_H__
+
+#define CCM_BASE        IO_ADDRESS(CCM_BASE_ADDR)
+#define SCM_BASE        IO_ADDRESS(SCM_BASE_ADDR)
+
+/* CCM register addresses */
+#define CCM_CSCR        (CCM_BASE + 0x0)
+#define CCM_MPCTL0      (CCM_BASE + 0x4)
+#define CCM_MPCTL1      (CCM_BASE + 0x8)
+#define CCM_SPCTL0      (CCM_BASE + 0xC)
+#define CCM_SPCTL1      (CCM_BASE + 0x10)
+#define CCM_PCDR        (CCM_BASE + 0x20)
+
+#define CCM_CSCR_CLKO_OFFSET    29
+#define CCM_CSCR_CLKO_MASK      (0x7 << 29)
+#define CCM_CSCR_USB_OFFSET     26
+#define CCM_CSCR_USB_MASK       (0x7 << 26)
+#define CCM_CSCR_SPLL_RESTART   (1 << 22)
+#define CCM_CSCR_MPLL_RESTART   (1 << 21)
+#define CCM_CSCR_OSC_EN_SHIFT   17
+#define CCM_CSCR_SYSTEM_SEL     (1 << 16)
+#define CCM_CSCR_BCLK_OFFSET    10
+#define CCM_CSCR_BCLK_MASK      (0xF << 10)
+#define CCM_CSCR_PRESC          (1 << 15)
+#define CCM_CSCR_SPEN           (1 << 1)
+#define CCM_CSCR_MPEN           (1 << 0)
+
+#define CCM_PCDR_PCLK3_OFFSET   16
+#define CCM_PCDR_PCLK3_MASK     (0x7F << 16)
+#define CCM_PCDR_PCLK2_OFFSET   4
+#define CCM_PCDR_PCLK2_MASK     (0xF << 4)
+#define CCM_PCDR_PCLK1_OFFSET   0
+#define CCM_PCDR_PCLK1_MASK     0xF
+
+/* SCM register addresses */
+#define SCM_SIDR        (SCM_BASE + 0x0)
+#define SCM_FMCR        (SCM_BASE + 0x4)
+#define SCM_GPCR        (SCM_BASE + 0x8)
+#define SCM_GCCR        (SCM_BASE + 0xC)
+
+#define SCM_GCCR_DMA_CLK_EN_OFFSET      3
+#define SCM_GCCR_CSI_CLK_EN_OFFSET      2
+#define SCM_GCCR_MMA_CLK_EN_OFFSET      1
+#define SCM_GCCR_USBD_CLK_EN_OFFSET     0
+
+#endif /* __ARCH_ARM_MACH_MX2_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx1/devices.c b/arch/arm/mach-mx1/devices.c
new file mode 100644
index 000000000000..686d8d2dbb24
--- /dev/null
+++ b/arch/arm/mach-mx1/devices.c
@@ -0,0 +1,260 @@
+/*
+ * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
+ * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA  02110-1301, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <mach/hardware.h>
+
+static struct resource imx_csi_resources[] = {
+        [0] = {
+                .start  = 0x00224000,
+                .end    = 0x00224010,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = CSI_INT,
+                .end    = CSI_INT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 imx_csi_dmamask = 0xffffffffUL;
+
+struct platform_device imx_csi_device = {
+        .name           = "imx-csi",
+        .id             = 0, /* This is used to put cameras on this interface */
+        .dev            = {
+                .dma_mask = &imx_csi_dmamask,
+                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = imx_csi_resources,
+        .num_resources  = ARRAY_SIZE(imx_csi_resources),
+};
+
+static struct resource imx_i2c_resources[] = {
+        [0] = {
+                .start  = 0x00217000,
+                .end    = 0x00217010,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = I2C_INT,
+                .end    = I2C_INT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device imx_i2c_device = {
+        .name           = "imx-i2c",
+        .id             = 0,
+        .resource       = imx_i2c_resources,
+        .num_resources  = ARRAY_SIZE(imx_i2c_resources),
+};
+
+static struct resource imx_uart1_resources[] = {
+        [0] = {
+                .start  = UART1_BASE_ADDR,
+                .end    = UART1_BASE_ADDR + 0xD0,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = UART1_MINT_RX,
+                .end    = UART1_MINT_RX,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = UART1_MINT_TX,
+                .end    = UART1_MINT_TX,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = UART1_MINT_RTS,
+                .end    = UART1_MINT_RTS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device imx_uart1_device = {
+        .name           = "imx-uart",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(imx_uart1_resources),
+        .resource       = imx_uart1_resources,
+};
+
+static struct resource imx_uart2_resources[] = {
+        [0] = {
+                .start  = UART2_BASE_ADDR,
+                .end    = UART2_BASE_ADDR + 0xD0,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = UART2_MINT_RX,
+                .end    = UART2_MINT_RX,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = UART2_MINT_TX,
+                .end    = UART2_MINT_TX,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = UART2_MINT_RTS,
+                .end    = UART2_MINT_RTS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device imx_uart2_device = {
+        .name           = "imx-uart",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(imx_uart2_resources),
+        .resource       = imx_uart2_resources,
+};
+
+static struct resource imx_rtc_resources[] = {
+        [0] = {
+                .start  = 0x00204000,
+                .end    = 0x00204024,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = RTC_INT,
+                .end    = RTC_INT,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = RTC_SAMINT,
+                .end    = RTC_SAMINT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device imx_rtc_device = {
+        .name           = "rtc-imx",
+        .id             = 0,
+        .resource       = imx_rtc_resources,
+        .num_resources  = ARRAY_SIZE(imx_rtc_resources),
+};
+
+static struct resource imx_wdt_resources[] = {
+        [0] = {
+                .start  = 0x00201000,
+                .end    = 0x00201008,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = WDT_INT,
+                .end    = WDT_INT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device imx_wdt_device = {
+        .name           = "imx-wdt",
+        .id             = 0,
+        .resource       = imx_wdt_resources,
+        .num_resources  = ARRAY_SIZE(imx_wdt_resources),
+};
+
+static struct resource imx_usb_resources[] = {
+        [0] = {
+                .start  = 0x00212000,
+                .end    = 0x00212148,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = USBD_INT0,
+                .end    = USBD_INT0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = USBD_INT1,
+                .end    = USBD_INT1,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = USBD_INT2,
+                .end    = USBD_INT2,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [4] = {
+                .start  = USBD_INT3,
+                .end    = USBD_INT3,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [5] = {
+                .start  = USBD_INT4,
+                .end    = USBD_INT4,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [6] = {
+                .start  = USBD_INT5,
+                .end    = USBD_INT5,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [7] = {
+                .start  = USBD_INT6,
+                .end    = USBD_INT6,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device imx_usb_device = {
+        .name           = "imx_udc",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(imx_usb_resources),
+        .resource       = imx_usb_resources,
+};
+
+/* GPIO port description */
+static struct mxc_gpio_port imx_gpio_ports[] = {
+        [0] = {
+                .chip.label = "gpio-0",
+                .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR),
+                .irq = GPIO_INT_PORTA,
+                .virtual_irq_start = MXC_GPIO_IRQ_START
+        },
+        [1] = {
+                .chip.label = "gpio-1",
+                .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
+                .irq = GPIO_INT_PORTB,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 32
+        },
+        [2] = {
+                .chip.label = "gpio-2",
+                .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
+                .irq = GPIO_INT_PORTC,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 64
+        },
+        [3] = {
+                .chip.label = "gpio-3",
+                .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
+                .irq = GPIO_INT_PORTD,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 96
+        }
+};
+
+int __init mxc_register_gpios(void)
+{
+        return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
+}
diff --git a/arch/arm/mach-mx1/devices.h b/arch/arm/mach-mx1/devices.h
new file mode 100644
index 000000000000..0da5d7cce3a2
--- /dev/null
+++ b/arch/arm/mach-mx1/devices.h
@@ -0,0 +1,7 @@
+extern struct platform_device imx_csi_device;
+extern struct platform_device imx_i2c_device;
+extern struct platform_device imx_uart1_device;
+extern struct platform_device imx_uart2_device;
+extern struct platform_device imx_rtc_device;
+extern struct platform_device imx_wdt_device;
+extern struct platform_device imx_usb_device;
diff --git a/arch/arm/mach-integrator/include/mach/dma.h b/arch/arm/mach-mx1/generic.c
index fbebe85a2db7..0dec6f300ffc 100644
--- a/arch/arm/mach-integrator/include/mach/dma.h
+++ b/arch/arm/mach-mx1/generic.c
@@ -1,7 +1,9 @@
 /*
- *  arch/arm/mach-integrator/include/mach/dma.h
+ *  author: Sascha Hauer
+ *  Created: april 20th, 2004
+ *  Copyright: Synertronixx GmbH
  *
- *  Copyright (C) 1997,1998 Russell King
+ *  Common code for i.MX machines
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -16,4 +18,26 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
  */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+
+static struct map_desc imx_io_desc[] __initdata = {
+        {
+                .virtual        = IMX_IO_BASE,
+                .pfn            = __phys_to_pfn(IMX_IO_PHYS),
+                .length         = IMX_IO_SIZE,
+                .type           = MT_DEVICE
+        }
+};
+
+void __init mxc_map_io(void)
+{
+        iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
+}
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mx1ads.c
new file mode 100644
index 000000000000..2e4b185fe4a9
--- /dev/null
+++ b/arch/arm/mach-mx1/mx1ads.c
@@ -0,0 +1,148 @@
+/*
+ * arch/arm/mach-imx/mx1ads.c
+ *
+ * Initially based on:
+ *      linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c
+ *      Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de>
+ *
+ * 2004 (c) MontaVista Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux-mx1-mx2.h>
+#include "devices.h"
+
+/*
+ * UARTs platform data
+ */
+static int mxc_uart1_pins[] = {
+        PC9_PF_UART1_CTS,
+        PC10_PF_UART1_RTS,
+        PC11_PF_UART1_TXD,
+        PC12_PF_UART1_RXD,
+};
+
+static int uart1_mxc_init(struct platform_device *pdev)
+{
+        return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
+                        ARRAY_SIZE(mxc_uart1_pins), "UART1");
+}
+
+static int uart1_mxc_exit(struct platform_device *pdev)
+{
+        mxc_gpio_release_multiple_pins(mxc_uart1_pins,
+                        ARRAY_SIZE(mxc_uart1_pins));
+        return 0;
+}
+
+static int mxc_uart2_pins[] = {
+        PB28_PF_UART2_CTS,
+        PB29_PF_UART2_RTS,
+        PB30_PF_UART2_TXD,
+        PB31_PF_UART2_RXD,
+};
+
+static int uart2_mxc_init(struct platform_device *pdev)
+{
+        return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
+                        ARRAY_SIZE(mxc_uart2_pins), "UART2");
+}
+
+static int uart2_mxc_exit(struct platform_device *pdev)
+{
+        mxc_gpio_release_multiple_pins(mxc_uart2_pins,
+                        ARRAY_SIZE(mxc_uart2_pins));
+        return 0;
+}
+
+static struct imxuart_platform_data uart_pdata[] = {
+        {
+                .init = uart1_mxc_init,
+                .exit = uart1_mxc_exit,
+                .flags = IMXUART_HAVE_RTSCTS,
+        }, {
+                .init = uart2_mxc_init,
+                .exit = uart2_mxc_exit,
+                .flags = IMXUART_HAVE_RTSCTS,
+        },
+};
+
+/*
+ * Physmap flash
+ */
+
+static struct physmap_flash_data mx1ads_flash_data = {
+        .width          = 4,            /* bankwidth in bytes */
+};
+
+static struct resource flash_resource = {
+        .start  = IMX_CS0_PHYS,
+        .end    = IMX_CS0_PHYS + SZ_32M - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct platform_device flash_device = {
+        .name   = "physmap-flash",
+        .id     = 0,
+        .resource = &flash_resource,
+        .num_resources = 1,
+};
+
+/*
+ * Board init
+ */
+static void __init mx1ads_init(void)
+{
+        /* UART */
+        mxc_register_device(&imx_uart1_device, &uart_pdata[0]);
+        mxc_register_device(&imx_uart2_device, &uart_pdata[1]);
+
+        /* Physmap flash */
+        mxc_register_device(&flash_device, &mx1ads_flash_data);
+}
+
+static void __init mx1ads_timer_init(void)
+{
+        mxc_clocks_init(32000);
+        mxc_timer_init("gpt_clk");
+}
+
+struct sys_timer mx1ads_timer = {
+        .init   = mx1ads_timer_init,
+};
+
+MACHINE_START(MX1ADS, "Freescale MX1ADS")
+        /* Maintainer: Sascha Hauer, Pengutronix */
+        .phys_io        = IMX_IO_PHYS,
+        .io_pg_offst    = (IMX_IO_BASE >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x100,
+        .map_io         = mxc_map_io,
+        .init_irq       = mxc_init_irq,
+        .timer          = &mx1ads_timer,
+        .init_machine   = mx1ads_init,
+MACHINE_END
+
+MACHINE_START(MXLADS, "Freescale MXLADS")
+        .phys_io        = IMX_IO_PHYS,
+        .io_pg_offst    = (IMX_IO_BASE >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x100,
+        .map_io         = mxc_map_io,
+        .init_irq       = mxc_init_irq,
+        .timer          = &mx1ads_timer,
+        .init_machine   = mx1ads_init,
+MACHINE_END
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c
index bd0559d5933e..af121f5ab710 100644
--- a/arch/arm/mach-mx2/devices.c
+++ b/arch/arm/mach-mx2/devices.c
@@ -190,38 +190,72 @@ struct platform_device mxc_wdt = {
         .resource = mxc_wdt_resources,
 };
 
+static struct resource mxc_w1_master_resources[] = {
+        {
+                .start = OWIRE_BASE_ADDR,
+                .end   = OWIRE_BASE_ADDR + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
+        },
+};
+
+struct platform_device mxc_w1_master_device = {
+        .name = "mxc_w1",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
+        .resource = mxc_w1_master_resources,
+};
+
+static struct resource mxc_nand_resources[] = {
+        {
+                .start  = NFC_BASE_ADDR,
+                .end    = NFC_BASE_ADDR + 0xfff,
+                .flags  = IORESOURCE_MEM
+        }, {
+                .start  = MXC_INT_NANDFC,
+                .end    = MXC_INT_NANDFC,
+                .flags  = IORESOURCE_IRQ
+        },
+};
+
+struct platform_device mxc_nand_device = {
+        .name = "mxc_nand",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(mxc_nand_resources),
+        .resource = mxc_nand_resources,
+};
+
 /* GPIO port description */
 static struct mxc_gpio_port imx_gpio_ports[] = {
         [0] = {
                 .chip.label = "gpio-0",
                 .irq = MXC_INT_GPIO,
                 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0),
-                .virtual_irq_start = MXC_MAX_INT_LINES,
+                .virtual_irq_start = MXC_GPIO_IRQ_START,
         },
         [1] = {
                 .chip.label = "gpio-1",
                 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1),
-                .virtual_irq_start = MXC_MAX_INT_LINES + 32,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
         },
         [2] = {
                 .chip.label = "gpio-2",
                 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2),
-                .virtual_irq_start = MXC_MAX_INT_LINES + 64,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
         },
         [3] = {
                 .chip.label = "gpio-3",
                 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3),
-                .virtual_irq_start = MXC_MAX_INT_LINES + 96,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
         },
         [4] = {
                 .chip.label = "gpio-4",
                 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4),
-                .virtual_irq_start = MXC_MAX_INT_LINES + 128,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 128,
         },
         [5] = {
                 .chip.label = "gpio-5",
                 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5),
-                .virtual_irq_start = MXC_MAX_INT_LINES + 160,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 160,
         }
 };
 
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h
index c77a4b8f73b4..1e8cb577a642 100644
--- a/arch/arm/mach-mx2/devices.h
+++ b/arch/arm/mach-mx2/devices.h
@@ -12,4 +12,5 @@ extern struct platform_device mxc_uart_device2;
 extern struct platform_device mxc_uart_device3;
 extern struct platform_device mxc_uart_device4;
 extern struct platform_device mxc_uart_device5;
-
+extern struct platform_device mxc_w1_master_device;
+extern struct platform_device mxc_nand_device;
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c
index 56e22d3ca075..2b5c67f54571 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mx27ads.c
@@ -68,15 +68,14 @@ static int mxc_uart0_pins[] = {
 static int uart_mxc_port0_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
-                        ARRAY_SIZE(mxc_uart0_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART0");
+                        ARRAY_SIZE(mxc_uart0_pins), "UART0");
 }
 
 static int uart_mxc_port0_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
-                        ARRAY_SIZE(mxc_uart0_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART0");
+        mxc_gpio_release_multiple_pins(mxc_uart0_pins,
+                        ARRAY_SIZE(mxc_uart0_pins));
+        return 0;
 }
 
 static int mxc_uart1_pins[] = {
@@ -89,15 +88,14 @@ static int mxc_uart1_pins[] = {
 static int uart_mxc_port1_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART1");
+                        ARRAY_SIZE(mxc_uart1_pins), "UART1");
 }
 
 static int uart_mxc_port1_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART1");
+        mxc_gpio_release_multiple_pins(mxc_uart1_pins,
+                        ARRAY_SIZE(mxc_uart1_pins));
+        return 0;
 }
 
 static int mxc_uart2_pins[] = {
@@ -110,15 +108,14 @@ static int mxc_uart2_pins[] = {
 static int uart_mxc_port2_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
-                        ARRAY_SIZE(mxc_uart2_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART2");
+                        ARRAY_SIZE(mxc_uart2_pins), "UART2");
 }
 
 static int uart_mxc_port2_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
-                        ARRAY_SIZE(mxc_uart2_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART2");
+        mxc_gpio_release_multiple_pins(mxc_uart2_pins,
+                        ARRAY_SIZE(mxc_uart2_pins));
+        return 0;
 }
 
 static int mxc_uart3_pins[] = {
@@ -131,15 +128,13 @@ static int mxc_uart3_pins[] = {
 static int uart_mxc_port3_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
-                        ARRAY_SIZE(mxc_uart3_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART3");
+                        ARRAY_SIZE(mxc_uart3_pins), "UART3");
 }
 
 static int uart_mxc_port3_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
-                        ARRAY_SIZE(mxc_uart3_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART3");
+        mxc_gpio_release_multiple_pins(mxc_uart3_pins,
+                        ARRAY_SIZE(mxc_uart3_pins));
 }
 
 static int mxc_uart4_pins[] = {
@@ -152,15 +147,14 @@ static int mxc_uart4_pins[] = {
 static int uart_mxc_port4_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
-                        ARRAY_SIZE(mxc_uart4_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART4");
+                        ARRAY_SIZE(mxc_uart4_pins), "UART4");
 }
 
 static int uart_mxc_port4_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
-                        ARRAY_SIZE(mxc_uart4_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART4");
+        mxc_gpio_release_multiple_pins(mxc_uart4_pins,
+                        ARRAY_SIZE(mxc_uart4_pins));
+        return 0;
 }
 
 static int mxc_uart5_pins[] = {
@@ -173,15 +167,14 @@ static int mxc_uart5_pins[] = {
 static int uart_mxc_port5_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
-                        ARRAY_SIZE(mxc_uart5_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART5");
+                        ARRAY_SIZE(mxc_uart5_pins), "UART5");
 }
 
 static int uart_mxc_port5_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
-                        ARRAY_SIZE(mxc_uart5_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART5");
+        mxc_gpio_release_multiple_pins(mxc_uart5_pins,
+                        ARRAY_SIZE(mxc_uart5_pins));
+        return 0;
 }
 
 static struct platform_device *platform_devices[] __initdata = {
@@ -212,15 +205,13 @@ static int mxc_fec_pins[] = {
 static void gpio_fec_active(void)
 {
         mxc_gpio_setup_multiple_pins(mxc_fec_pins,
-                        ARRAY_SIZE(mxc_fec_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "FEC");
+                        ARRAY_SIZE(mxc_fec_pins), "FEC");
 }
 
 static void gpio_fec_inactive(void)
 {
-        mxc_gpio_setup_multiple_pins(mxc_fec_pins,
-                        ARRAY_SIZE(mxc_fec_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "FEC");
+        mxc_gpio_release_multiple_pins(mxc_fec_pins,
+                        ARRAY_SIZE(mxc_fec_pins));
 }
 
 static struct imxuart_platform_data uart_pdata[] = {
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c
index 7f55746e2591..dfd4156da7d5 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/pcm038.c
@@ -19,6 +19,7 @@
 
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
+#include <linux/mtd/plat-ram.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/common.h>
@@ -27,10 +28,36 @@
 #include <asm/mach/time.h>
 #include <mach/imx-uart.h>
 #include <mach/board-pcm038.h>
+#include <mach/mxc_nand.h>
 
 #include "devices.h"
 
 /*
+ * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
+ * 16 bit width
+ */
+
+static struct platdata_mtd_ram pcm038_sram_data = {
+        .bankwidth = 2,
+};
+
+static struct resource pcm038_sram_resource = {
+        .start = CS1_BASE_ADDR,
+        .end   = CS1_BASE_ADDR + 512 * 1024 - 1,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device pcm038_sram_mtd_device = {
+        .name = "mtd-ram",
+        .id = 0,
+        .dev = {
+                .platform_data = &pcm038_sram_data,
+        },
+        .num_resources = 1,
+        .resource = &pcm038_sram_resource,
+};
+
+/*
  * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
  * 16 bit width
  */
@@ -64,15 +91,14 @@ static int mxc_uart0_pins[] = {
 static int uart_mxc_port0_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
-                        ARRAY_SIZE(mxc_uart0_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART0");
+                        ARRAY_SIZE(mxc_uart0_pins), "UART0");
 }
 
 static int uart_mxc_port0_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
-                        ARRAY_SIZE(mxc_uart0_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART0");
+        mxc_gpio_release_multiple_pins(mxc_uart0_pins,
+                        ARRAY_SIZE(mxc_uart0_pins));
+        return 0;
 }
 
 static int mxc_uart1_pins[] = {
@@ -85,15 +111,14 @@ static int mxc_uart1_pins[] = {
 static int uart_mxc_port1_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART1");
+                        ARRAY_SIZE(mxc_uart1_pins), "UART1");
 }
 
 static int uart_mxc_port1_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART1");
+        mxc_gpio_release_multiple_pins(mxc_uart1_pins,
+                        ARRAY_SIZE(mxc_uart1_pins));
+        return 0;
 }
 
 static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS,
@@ -104,15 +129,14 @@ static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS,
 static int uart_mxc_port2_init(struct platform_device *pdev)
 {
         return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
-                        ARRAY_SIZE(mxc_uart2_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "UART2");
+                        ARRAY_SIZE(mxc_uart2_pins), "UART2");
 }
 
 static int uart_mxc_port2_exit(struct platform_device *pdev)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
-                        ARRAY_SIZE(mxc_uart2_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "UART2");
+        mxc_gpio_release_multiple_pins(mxc_uart2_pins,
+                        ARRAY_SIZE(mxc_uart2_pins));
+        return 0;
 }
 
 static struct imxuart_platform_data uart_pdata[] = {
@@ -155,29 +179,47 @@ static int mxc_fec_pins[] = {
 static void gpio_fec_active(void)
 {
         mxc_gpio_setup_multiple_pins(mxc_fec_pins,
-                        ARRAY_SIZE(mxc_fec_pins),
-                        MXC_GPIO_ALLOC_MODE_NORMAL, "FEC");
+                        ARRAY_SIZE(mxc_fec_pins), "FEC");
 }
 
 static void gpio_fec_inactive(void)
 {
-        mxc_gpio_setup_multiple_pins(mxc_fec_pins,
-                        ARRAY_SIZE(mxc_fec_pins),
-                        MXC_GPIO_ALLOC_MODE_RELEASE, "FEC");
+        mxc_gpio_release_multiple_pins(mxc_fec_pins,
+                        ARRAY_SIZE(mxc_fec_pins));
 }
 
+static struct mxc_nand_platform_data pcm038_nand_board_info = {
+        .width = 1,
+        .hw_ecc = 1,
+};
+
 static struct platform_device *platform_devices[] __initdata = {
         &pcm038_nor_mtd_device,
+        &mxc_w1_master_device,
+        &pcm038_sram_mtd_device,
 };
 
+/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
+ * setup other stuffs to access the sram. */
+static void __init pcm038_init_sram(void)
+{
+        __raw_writel(0x0000d843, CSCR_U(1));
+        __raw_writel(0x22252521, CSCR_L(1));
+        __raw_writel(0x22220a00, CSCR_A(1));
+}
+
 static void __init pcm038_init(void)
 {
         gpio_fec_active();
+        pcm038_init_sram();
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
         mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
         mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
 
+        mxc_gpio_mode(PE16_AF_RTCK); /* OWIRE */
+        mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info);
+
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 
 #ifdef CONFIG_MACH_PCM970_BASEBOARD
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index db9431dee1b4..e79659e8176e 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -21,5 +21,19 @@ config MACH_MX31LITE
           Include support for MX31 LITEKIT platform. This includes specific
           configurations for the board and its peripherals.
 
+config MACH_MX31_3DS
+        bool "Support MX31PDK (3DS)"
+        default n
+        help
+          Include support for MX31PDK (3DS) platform. This includes specific
+          configurations for the board and its peripherals.
+
+config MACH_MX31MOBOARD
+        bool "Support mx31moboard platforms (EPFL Mobots group)"
+        default n
+        help
+          Include support for mx31moboard platform. This includes specific
+          configurations for the board and its peripherals.
+
 endmenu
 
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 8b21abb71fb0..5a151540fe83 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -8,3 +8,5 @@ obj-y			:= mm.o clock.o devices.o iomux.o
 obj-$(CONFIG_MACH_MX31ADS)      += mx31ads.o
 obj-$(CONFIG_MACH_MX31LITE)     += mx31lite.o
 obj-$(CONFIG_MACH_PCM037)       += pcm037.o
+obj-$(CONFIG_MACH_MX31_3DS)     += mx31pdk.o
+obj-$(CONFIG_MACH_MX31MOBOARD)  += mx31moboard.o
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 9f14a871ee7c..b1746aae1f89 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -24,6 +24,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <mach/clock.h>
+#include <mach/hardware.h>
 #include <asm/div64.h>
 
 #include "crm_regs.h"
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index a6bdcc07f3c9..1d46cb4adf96 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -125,19 +125,19 @@ static struct mxc_gpio_port imx_gpio_ports[] = {
                 .chip.label = "gpio-0",
                 .base = IO_ADDRESS(GPIO1_BASE_ADDR),
                 .irq = MXC_INT_GPIO1,
-                .virtual_irq_start = MXC_GPIO_INT_BASE
+                .virtual_irq_start = MXC_GPIO_IRQ_START,
         },
         [1] = {
                 .chip.label = "gpio-1",
                 .base = IO_ADDRESS(GPIO2_BASE_ADDR),
                 .irq = MXC_INT_GPIO2,
-                .virtual_irq_start = MXC_GPIO_INT_BASE + GPIO_NUM_PIN
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
         },
         [2] = {
                 .chip.label = "gpio-2",
                 .base = IO_ADDRESS(GPIO3_BASE_ADDR),
                 .irq = MXC_INT_GPIO3,
-                .virtual_irq_start = MXC_GPIO_INT_BASE + GPIO_NUM_PIN * 2
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
         }
 };
 
@@ -145,3 +145,37 @@ int __init mxc_register_gpios(void)
 {
         return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 }
+
+static struct resource mxc_w1_master_resources[] = {
+        {
+                .start = OWIRE_BASE_ADDR,
+                .end   = OWIRE_BASE_ADDR + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
+        },
+};
+
+struct platform_device mxc_w1_master_device = {
+        .name = "mxc_w1",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
+        .resource = mxc_w1_master_resources,
+};
+
+static struct resource mxc_nand_resources[] = {
+        {
+                .start  = NFC_BASE_ADDR,
+                .end    = NFC_BASE_ADDR + 0xfff,
+                .flags  = IORESOURCE_MEM
+        }, {
+                .start  = MXC_INT_NANDFC,
+                .end    = MXC_INT_NANDFC,
+                .flags  = IORESOURCE_IRQ
+        },
+};
+
+struct platform_device mxc_nand_device = {
+        .name = "mxc_nand",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(mxc_nand_resources),
+        .resource = mxc_nand_resources,
+};
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index 4dc03f9e6001..9949ef4e0694 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -4,3 +4,5 @@ extern struct platform_device mxc_uart_device1;
 extern struct platform_device mxc_uart_device2;
 extern struct platform_device mxc_uart_device3;
 extern struct platform_device mxc_uart_device4;
+extern struct platform_device mxc_w1_master_device;
+extern struct platform_device mxc_nand_device;
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux.c
index 6e664be8cc13..7a5088b519a8 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux.c
@@ -74,17 +74,18 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
         u32 field, l;
         void __iomem *reg;
 
-        reg = IOMUXSW_PAD_CTL + (pin + 2) / 3;
+        pin &= IOMUX_PADNUM_MASK;
+        reg = IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4;
         field = (pin + 2) % 3;
 
-        pr_debug("%s: reg offset = 0x%x field = %d\n",
+        pr_debug("%s: reg offset = 0x%x, field = %d\n",
                         __func__, (pin + 2) / 3, field);
 
         spin_lock(&gpio_mux_lock);
 
         l = __raw_readl(reg);
-        l &= ~(0x1ff << (field * 9));
-        l |= config << (field * 9);
+        l &= ~(0x1ff << (field * 10));
+        l |= config << (field * 10);
         __raw_writel(l, reg);
 
         spin_unlock(&gpio_mux_lock);
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c
new file mode 100644
index 000000000000..c29098af7394
--- /dev/null
+++ b/arch/arm/mach-mx3/mx31moboard.c
@@ -0,0 +1,141 @@
+/*
+ *  Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/partitions.h>
+#include <linux/memory.h>
+
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
+#include <mach/common.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux-mx3.h>
+
+#include "devices.h"
+
+static struct physmap_flash_data mx31moboard_flash_data = {
+        .width          = 2,
+};
+
+static struct resource mx31moboard_flash_resource = {
+        .start  = 0xa0000000,
+        .end    = 0xa1ffffff,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct platform_device mx31moboard_flash = {
+        .name   = "physmap-flash",
+        .id     = 0,
+        .dev    = {
+                .platform_data  = &mx31moboard_flash_data,
+        },
+        .resource = &mx31moboard_flash_resource,
+        .num_resources = 1,
+};
+
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static struct platform_device *devices[] __initdata = {
+        &mx31moboard_flash,
+};
+
+/*
+ * Board specific initialization.
+ */
+static void __init mxc_board_init(void)
+{
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+
+        mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
+        mxc_iomux_mode(MX31_PIN_RTS1__RTS1);
+        mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
+        mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
+
+        mxc_register_device(&mxc_uart_device0, &uart_pdata);
+
+        mxc_iomux_mode(MX31_PIN_CTS2__CTS2);
+        mxc_iomux_mode(MX31_PIN_RTS2__RTS2);
+        mxc_iomux_mode(MX31_PIN_TXD2__TXD2);
+        mxc_iomux_mode(MX31_PIN_RXD2__RXD2);
+
+        mxc_register_device(&mxc_uart_device1, &uart_pdata);
+
+        mxc_iomux_mode(MX31_PIN_PC_RST__CTS5);
+        mxc_iomux_mode(MX31_PIN_PC_VS2__RTS5);
+        mxc_iomux_mode(MX31_PIN_PC_BVD2__TXD5);
+        mxc_iomux_mode(MX31_PIN_PC_BVD1__RXD5);
+
+        mxc_register_device(&mxc_uart_device4, &uart_pdata);
+}
+
+/*
+ * This structure defines static mappings for the mx31moboard.
+ */
+static struct map_desc mx31moboard_io_desc[] __initdata = {
+        {
+                .virtual        = AIPS1_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(AIPS1_BASE_ADDR),
+                .length         = AIPS1_SIZE,
+                .type           = MT_DEVICE_NONSHARED
+        }, {
+                .virtual        = AIPS2_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(AIPS2_BASE_ADDR),
+                .length         = AIPS2_SIZE,
+                .type           = MT_DEVICE_NONSHARED
+        },
+};
+
+/*
+ * Set up static virtual mappings.
+ */
+void __init mx31moboard_map_io(void)
+{
+        mxc_map_io();
+        iotable_init(mx31moboard_io_desc, ARRAY_SIZE(mx31moboard_io_desc));
+}
+
+static void __init mx31moboard_timer_init(void)
+{
+        mxc_clocks_init(26000000);
+        mxc_timer_init("ipg_clk.0");
+}
+
+struct sys_timer mx31moboard_timer = {
+        .init   = mx31moboard_timer_init,
+};
+
+MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
+        /* Maintainer: Valentin Longchamp, EPFL Mobots group */
+        .phys_io        = AIPS1_BASE_ADDR,
+        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x100,
+        .map_io         = mx31moboard_map_io,
+        .init_irq       = mxc_init_irq,
+        .init_machine   = mxc_board_init,
+        .timer          = &mx31moboard_timer,
+MACHINE_END
+
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c
new file mode 100644
index 000000000000..d464d068a4a6
--- /dev/null
+++ b/arch/arm/mach-mx3/mx31pdk.c
@@ -0,0 +1,115 @@
+/*
+ *  Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/irq.h>
+
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <asm/memory.h>
+#include <asm/mach/map.h>
+#include <mach/common.h>
+#include <mach/board-mx31pdk.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux-mx3.h>
+#include "devices.h"
+
+/*!
+ * @file mx31pdk.c
+ *
+ * @brief This file contains the board-specific initialization routines.
+ *
+ * @ingroup System
+ */
+
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static inline void mxc_init_imx_uart(void)
+{
+        mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
+        mxc_iomux_mode(MX31_PIN_RTS1__RTS1);
+        mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
+        mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
+
+        mxc_register_device(&mxc_uart_device0, &uart_pdata);
+}
+
+/*!
+ * This structure defines static mappings for the i.MX31PDK board.
+ */
+static struct map_desc mx31pdk_io_desc[] __initdata = {
+        {
+                .virtual        = AIPS1_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(AIPS1_BASE_ADDR),
+                .length         = AIPS1_SIZE,
+                .type           = MT_DEVICE_NONSHARED
+        }, {
+                .virtual        = AIPS2_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(AIPS2_BASE_ADDR),
+                .length         = AIPS2_SIZE,
+                .type           = MT_DEVICE_NONSHARED
+        },
+};
+
+/*!
+ * Set up static virtual mappings.
+ */
+static void __init mx31pdk_map_io(void)
+{
+        mxc_map_io();
+        iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc));
+}
+
+/*!
+ * Board specific initialization.
+ */
+static void __init mxc_board_init(void)
+{
+        mxc_init_imx_uart();
+}
+
+static void __init mx31pdk_timer_init(void)
+{
+        mxc_clocks_init(26000000);
+        mxc_timer_init("ipg_clk.0");
+}
+
+static struct sys_timer mx31pdk_timer = {
+        .init   = mx31pdk_timer_init,
+};
+
+/*
+ * The following uses standard kernel macros defined in arch.h in order to
+ * initialize __mach_desc_MX31PDK data structure.
+ */
+MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
+        /* Maintainer: Freescale Semiconductor, Inc. */
+        .phys_io        = AIPS1_BASE_ADDR,
+        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x100,
+        .map_io         = mx31pdk_map_io,
+        .init_irq       = mxc_init_irq,
+        .init_machine   = mxc_board_init,
+        .timer          = &mx31pdk_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 843f68c8ead1..8cea82587222 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -21,7 +21,11 @@
 
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
+#include <linux/mtd/plat-ram.h>
 #include <linux/memory.h>
+#include <linux/gpio.h>
+#include <linux/smc911x.h>
+#include <linux/interrupt.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -32,6 +36,7 @@
 #include <mach/imx-uart.h>
 #include <mach/iomux-mx3.h>
 #include <mach/board-pcm037.h>
+#include <mach/mxc_nand.h>
 
 #include "devices.h"
 
@@ -59,8 +64,63 @@ static struct imxuart_platform_data uart_pdata = {
         .flags = IMXUART_HAVE_RTSCTS,
 };
 
+static struct resource smc911x_resources[] = {
+        [0] = {
+                .start          = CS1_BASE_ADDR + 0x300,
+                .end            = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
+                .end            = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct smc911x_platdata smc911x_info = {
+        .flags          = SMC911X_USE_32BIT,
+        .irq_flags      = IRQF_SHARED | IRQF_TRIGGER_LOW,
+};
+
+static struct platform_device pcm037_eth = {
+        .name           = "smc911x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(smc911x_resources),
+        .resource       = smc911x_resources,
+        .dev            = {
+                .platform_data = &smc911x_info,
+        },
+};
+
+static struct platdata_mtd_ram pcm038_sram_data = {
+        .bankwidth = 2,
+};
+
+static struct resource pcm038_sram_resource = {
+        .start = CS4_BASE_ADDR,
+        .end   = CS4_BASE_ADDR + 512 * 1024 - 1,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device pcm037_sram_device = {
+        .name = "mtd-ram",
+        .id = 0,
+        .dev = {
+                .platform_data = &pcm038_sram_data,
+        },
+        .num_resources = 1,
+        .resource = &pcm038_sram_resource,
+};
+
+static struct mxc_nand_platform_data pcm037_nand_board_info = {
+        .width = 1,
+        .hw_ecc = 1,
+};
+
 static struct platform_device *devices[] __initdata = {
         &pcm037_flash,
+        &pcm037_eth,
+        &pcm037_sram_device,
 };
 
 /*
@@ -81,6 +141,16 @@ static void __init mxc_board_init(void)
         mxc_iomux_mode(MX31_PIN_CSPI3_MISO__TXD3);
 
         mxc_register_device(&mxc_uart_device2, &uart_pdata);
+
+        mxc_iomux_mode(MX31_PIN_BATT_LINE__OWIRE);
+        mxc_register_device(&mxc_w1_master_device, NULL);
+
+        /* SMSC9215 IRQ pin */
+        mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO));
+        if (!gpio_request(MX31_PIN_GPIO3_1, "pcm037-eth"))
+                gpio_direction_input(MX31_PIN_GPIO3_1);
+
+        mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
 }
 
 /*
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
index 24c79650f9f3..ea8fa8898fe8 100644
--- a/arch/arm/mach-netx/fb.c
+++ b/arch/arm/mach-netx/fb.c
@@ -22,14 +22,11 @@
 #include <linux/dma-mapping.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
+#include <linux/err.h>
 
 #include <mach/netx-regs.h>
 #include <mach/hardware.h>
 
-struct clk {};
-
-static struct clk fb_clk;
-
 static struct clcd_panel *netx_panel;
 
 void netx_clcd_enable(struct clcd_fb *fb)
@@ -85,7 +82,7 @@ int clk_enable(struct clk *clk)
 
 struct clk *clk_get(struct device *dev, const char *id)
 {
-        return &fb_clk;
+        return dev && strcmp(dev_name(dev), "fb") == 0 ? NULL : ERR_PTR(-ENOENT);
 }
 
 void clk_put(struct clk *clk)
@@ -94,7 +91,7 @@ void clk_put(struct clk *clk)
 
 static struct amba_device fb_device = {
         .dev            = {
-                .bus_id = "fb",
+                .init_name = "fb",
                 .coherent_dma_mask = ~0,
         },
         .res            = {
diff --git a/arch/arm/mach-netx/include/mach/dma.h b/arch/arm/mach-netx/include/mach/dma.h
deleted file mode 100644
index 690b3ebc43ac..000000000000
--- a/arch/arm/mach-netx/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  arch/arm/mach-netx/include/mach/dma.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#define MAX_DMA_CHANNELS 0
-#define MAX_DMA_ADDRESS ~0
diff --git a/arch/arm/mach-netx/include/mach/io.h b/arch/arm/mach-netx/include/mach/io.h
index 468b92a82585..c3921cb3b6a6 100644
--- a/arch/arm/mach-netx/include/mach/io.h
+++ b/arch/arm/mach-netx/include/mach/io.h
@@ -22,7 +22,7 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)         ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)            (a)
 
 #endif
diff --git a/arch/arm/mach-netx/include/mach/memory.h b/arch/arm/mach-netx/include/mach/memory.h
index 53745a1378de..9a363f297f90 100644
--- a/arch/arm/mach-netx/include/mach/memory.h
+++ b/arch/arm/mach-netx/include/mach/memory.h
@@ -22,15 +22,5 @@
 
 #define PHYS_OFFSET UL(0x80000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
 #endif
 
diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h
index 5104a00d40f4..08c60ff227be 100644
--- a/arch/arm/mach-netx/include/mach/netx-regs.h
+++ b/arch/arm/mach-netx/include/mach/netx-regs.h
@@ -328,6 +328,28 @@
 #define NETX_PFIFO_FILL_LEVEL(pfifo)  NETX_PFIFO_REG(0x180 + ((pfifo)<<2))
 #define NETX_PFIFO_XPEC_ISR(xpec)     NETX_PFIFO_REG(0x400 + ((xpec) << 2))
 
+
+/*******************************
+ * Memory Controller           *
+ *******************************/
+
+/* Registers */
+#define NETX_MEMCR_REG(ofs)               __io(NETX_VA_MEMCR + (ofs))
+#define NETX_MEMCR_SRAM_CTRL(cs)      NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */
+#define NETX_MEMCR_SDRAM_CFG_CTRL     NETX_MEMCR_REG(0x40)
+#define NETX_MEMCR_SDRAM_TIMING_CTRL  NETX_MEMCR_REG(0x44)
+#define NETX_MEMCR_SDRAM_MODE         NETX_MEMCR_REG(0x48)
+#define NETX_MEMCR_SDRAM_EXT_MODE     NETX_MEMCR_REG(0x4c)
+#define NETX_MEMCR_PRIO_TIMESLOT_CTRL NETX_MEMCR_REG(0x80)
+#define NETX_MEMCR_PRIO_ACCESS_CTRL   NETX_MEMCR_REG(0x84)
+
+/* Bits */
+#define NETX_MEMCR_SRAM_CTRL_WIDTHEXTMEM(x)       (((x) & 0x3)  << 24)
+#define NETX_MEMCR_SRAM_CTRL_WSPOSTPAUSEEXTMEM(x) (((x) & 0x3)  << 16)
+#define NETX_MEMCR_SRAM_CTRL_WSPREPASEEXTMEM(x)   (((x) & 0x3)  << 8)
+#define NETX_MEMCR_SRAM_CTRL_WSEXTMEM(x)          (((x) & 0x1f) << 0)
+
+
 /*******************************
  * Dual Port Memory            *
  *******************************/
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index 7c540c1f01fa..d51d627ce7cf 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -21,43 +21,100 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/clocksource.h>
+#include <linux/clockchips.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
 #include <asm/mach/time.h>
 #include <mach/netx-regs.h>
 
+#define TIMER_CLOCKEVENT 0
+#define TIMER_CLOCKSOURCE 1
+
+static void netx_set_mode(enum clock_event_mode mode,
+                struct clock_event_device *clk)
+{
+        u32 tmode;
+
+        /* disable timer */
+        writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
+
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+                writel(LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
+                tmode = NETX_GPIO_COUNTER_CTRL_RST_EN |
+                        NETX_GPIO_COUNTER_CTRL_IRQ_EN |
+                        NETX_GPIO_COUNTER_CTRL_RUN;
+                break;
+
+        case CLOCK_EVT_MODE_ONESHOT:
+                writel(0, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
+                tmode = NETX_GPIO_COUNTER_CTRL_IRQ_EN |
+                        NETX_GPIO_COUNTER_CTRL_RUN;
+                break;
+
+        default:
+                WARN(1, "%s: unhandled mode %d\n", __func__, mode);
+                /* fall through */
+
+        case CLOCK_EVT_MODE_SHUTDOWN:
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_RESUME:
+                tmode = 0;
+                break;
+        }
+
+        writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
+}
+
+static int netx_set_next_event(unsigned long evt,
+                struct clock_event_device *clk)
+{
+        writel(0 - evt, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKEVENT));
+        return 0;
+}
+
+static struct clock_event_device netx_clockevent = {
+        .name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
+        .shift = 32,
+        .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .set_next_event = netx_set_next_event,
+        .set_mode = netx_set_mode,
+};
+
 /*
  * IRQ handler for the timer
  */
 static irqreturn_t
 netx_timer_interrupt(int irq, void *dev_id)
 {
-        timer_tick();
+        struct clock_event_device *evt = &netx_clockevent;
 
         /* acknowledge interrupt */
         writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
 
+        evt->event_handler(evt);
+
         return IRQ_HANDLED;
 }
 
 static struct irqaction netx_timer_irq = {
-        .name           = "NetX Timer Tick",
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = netx_timer_interrupt,
+        .name           = "NetX Timer Tick",
+        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+        .handler        = netx_timer_interrupt,
 };
 
 cycle_t netx_get_cycles(void)
 {
-        return readl(NETX_GPIO_COUNTER_CURRENT(1));
+        return readl(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE));
 }
 
 static struct clocksource clocksource_netx = {
-        .name           = "netx_timer",
+        .name           = "netx_timer",
         .rating         = 200,
         .read           = netx_get_cycles,
         .mask           = CLOCKSOURCE_MASK(32),
-        .shift          = 20,
+        .shift          = 20,
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
@@ -77,24 +134,37 @@ static void __init netx_timer_init(void)
         /* acknowledge interrupt */
         writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
 
-        /* Enable the interrupt in the specific timer register and start timer */
+        /* Enable the interrupt in the specific timer
+         * register and start timer
+         */
         writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE);
         writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN,
-                NETX_GPIO_COUNTER_CTRL(0));
+                        NETX_GPIO_COUNTER_CTRL(0));
 
         setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq);
 
         /* Setup timer one for clocksource */
-        writel(0, NETX_GPIO_COUNTER_CTRL(1));
-        writel(0, NETX_GPIO_COUNTER_CURRENT(1));
-        writel(0xFFFFFFFF, NETX_GPIO_COUNTER_MAX(1));
+        writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
+        writel(0, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE));
+        writel(0xffffffff, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKSOURCE));
 
-        writel(NETX_GPIO_COUNTER_CTRL_RUN,
-                NETX_GPIO_COUNTER_CTRL(1));
+        writel(NETX_GPIO_COUNTER_CTRL_RUN,
+                        NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
 
         clocksource_netx.mult =
                 clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_netx.shift);
         clocksource_register(&clocksource_netx);
+
+        netx_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
+                        netx_clockevent.shift);
+        netx_clockevent.max_delta_ns =
+                clockevent_delta2ns(0xfffffffe, &netx_clockevent);
+        /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
+         * Adding some safety ... */
+        netx_clockevent.min_delta_ns =
+                clockevent_delta2ns(0xa00, &netx_clockevent);
+        netx_clockevent.cpumask = cpumask_of_cpu(0);
+        clockevents_register_device(&netx_clockevent);
 }
 
 struct sys_timer netx_timer = {
diff --git a/arch/arm/mach-netx/xc.c b/arch/arm/mach-netx/xc.c
index 32eabf5dfa4f..8fc6205dc3a5 100644
--- a/arch/arm/mach-netx/xc.c
+++ b/arch/arm/mach-netx/xc.c
@@ -92,10 +92,10 @@ static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size)
         return -1;
 }
 
-static int xc_patch(struct xc *x, void *patch, int count)
+static int xc_patch(struct xc *x, const void *patch, int count)
 {
         unsigned int val, adr;
-        unsigned int *data = patch;
+        const unsigned int *data = patch;
 
         int i;
         for (i = 0; i < count; i++) {
@@ -117,7 +117,7 @@ int xc_request_firmware(struct xc *x)
         struct fw_header *head;
         unsigned int size;
         int i;
-        void *src;
+        const void *src;
         unsigned long dst;
 
         sprintf(name, "xc%d.bin", x->no);
diff --git a/arch/arm/mach-ns9xxx/include/mach/dma.h b/arch/arm/mach-ns9xxx/include/mach/dma.h
deleted file mode 100644
index 3f50d8c9e5c7..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/dma.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/dma.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#endif /* ifndef __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/hardware.h b/arch/arm/mach-ns9xxx/include/mach/hardware.h
index 6dbb2030f563..76631128e11c 100644
--- a/arch/arm/mach-ns9xxx/include/mach/hardware.h
+++ b/arch/arm/mach-ns9xxx/include/mach/hardware.h
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
 
-#include <asm/memory.h>
-
 /*
  * NetSilicon NS9xxx internal mapping:
  *
diff --git a/arch/arm/mach-ns9xxx/include/mach/io.h b/arch/arm/mach-ns9xxx/include/mach/io.h
index 027bf649645a..f08451d2e1bc 100644
--- a/arch/arm/mach-ns9xxx/include/mach/io.h
+++ b/arch/arm/mach-ns9xxx/include/mach/io.h
@@ -13,7 +13,7 @@
 
 #define IO_SPACE_LIMIT  0xffffffff /* XXX */
 
-#define __io(a)         ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 #define __mem_isa(a)    (IO_BASE + (a))
 
diff --git a/arch/arm/mach-ns9xxx/include/mach/memory.h b/arch/arm/mach-ns9xxx/include/mach/memory.h
index 649ee6235b94..6107193adbfe 100644
--- a/arch/arm/mach-ns9xxx/include/mach/memory.h
+++ b/arch/arm/mach-ns9xxx/include/mach/memory.h
@@ -21,7 +21,4 @@
 
 #define PHYS_OFFSET     UL(0x00000000)
 
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-ns9xxx/time-ns9360.c b/arch/arm/mach-ns9xxx/time-ns9360.c
index a63424d083d9..41df69721769 100644
--- a/arch/arm/mach-ns9xxx/time-ns9360.c
+++ b/arch/arm/mach-ns9xxx/time-ns9360.c
@@ -173,7 +173,7 @@ static void __init ns9360_timer_init(void)
         ns9360_clockevent_device.min_delta_ns =
                 clockevent_delta2ns(1, &ns9360_clockevent_device);
 
-        ns9360_clockevent_device.cpumask = cpumask_of_cpu(0);
+        ns9360_clockevent_device.cpumask = cpumask_of(0);
         clockevents_register_device(&ns9360_clockevent_device);
 
         setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 79f0b1f8497b..10a301e32434 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -4,16 +4,19 @@ comment "OMAP Core Type"
 config ARCH_OMAP730
         depends on ARCH_OMAP1
         bool "OMAP730 Based System"
+        select CPU_ARM926T
         select ARCH_OMAP_OTG
 
 config ARCH_OMAP15XX
         depends on ARCH_OMAP1
         default y
         bool "OMAP15xx Based System"
+        select CPU_ARM925T
 
 config ARCH_OMAP16XX
         depends on ARCH_OMAP1
         bool "OMAP16xx Based System"
+        select CPU_ARM926T
         select ARCH_OMAP_OTG
 
 comment "OMAP Board Type"
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index db789461fca4..30308294e7c1 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -205,7 +205,7 @@ static struct platform_device *devices[] __initdata = {
 
 static int nand_dev_ready(struct omap_nand_platform_data *data)
 {
-        return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN);
+        return gpio_get_value(P2_NAND_RB_GPIO_PIN);
 }
 
 static struct omap_uart_config fsample_uart_config __initdata = {
@@ -223,8 +223,9 @@ static struct omap_board_config_kernel fsample_config[] = {
 
 static void __init omap_fsample_init(void)
 {
-        if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN)))
-                nand_data.dev_ready = nand_dev_ready;
+        if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
+                BUG();
+        nand_data.dev_ready = nand_dev_ready;
 
         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index ab9ee5820c48..409fa56d0a87 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -12,90 +12,68 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/platform_device.h>
+
+#include <linux/i2c/tps65010.h>
+
 #include <mach/mmc.h>
 #include <mach/gpio.h>
 
-#ifdef CONFIG_MMC_OMAP
-static int slot_cover_open;
-static struct device *mmc_device;
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 
-static int h2_mmc_set_power(struct device *dev, int slot, int power_on,
+static int mmc_set_power(struct device *dev, int slot, int power_on,
                                 int vdd)
 {
-#ifdef CONFIG_MMC_DEBUG
-        dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
-                power_on ? "on" : "off", vdd);
-#endif
-        if (slot != 0) {
-                dev_err(dev, "No such slot %d\n", slot + 1);
-                return -ENODEV;
-        }
+        if (power_on)
+                gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 1);
+        else
+                gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 0);
 
         return 0;
 }
 
-static int h2_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
+static int mmc_late_init(struct device *dev)
 {
-#ifdef CONFIG_MMC_DEBUG
-        dev_dbg(dev, "Set slot %d bus_mode %s\n", slot + 1,
-                bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
-#endif
-        if (slot != 0) {
-                dev_err(dev, "No such slot %d\n", slot + 1);
-                return -ENODEV;
-        }
+        int ret;
 
-        return 0;
-}
+        ret = gpio_request(H2_TPS_GPIO_MMC_PWR_EN, "MMC power");
+        if (ret < 0)
+                return ret;
 
-static int h2_mmc_get_cover_state(struct device *dev, int slot)
-{
-        BUG_ON(slot != 0);
-
-        return slot_cover_open;
-}
-
-void h2_mmc_slot_cover_handler(void *arg, int state)
-{
-        if (mmc_device == NULL)
-                return;
-
-        slot_cover_open = state;
-        omap_mmc_notify_cover_event(mmc_device, 0, state);
-}
-
-static int h2_mmc_late_init(struct device *dev)
-{
-        int ret = 0;
-
-        mmc_device = dev;
+        gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 0);
 
         return ret;
 }
 
-static void h2_mmc_cleanup(struct device *dev)
+static void mmc_shutdown(struct device *dev)
 {
+        gpio_free(H2_TPS_GPIO_MMC_PWR_EN);
 }
 
-static struct omap_mmc_platform_data h2_mmc_data = {
+/*
+ * H2 could use the following functions tested:
+ * - mmc_get_cover_state that uses OMAP_MPUIO(1)
+ * - mmc_get_wp that uses OMAP_MPUIO(3)
+ */
+static struct omap_mmc_platform_data mmc1_data = {
         .nr_slots                       = 1,
-        .switch_slot                    = NULL,
-        .init                           = h2_mmc_late_init,
-        .cleanup                        = h2_mmc_cleanup,
+        .init                           = mmc_late_init,
+        .shutdown                       = mmc_shutdown,
+        .dma_mask                       = 0xffffffff,
         .slots[0]       = {
-                .set_power              = h2_mmc_set_power,
-                .set_bus_mode           = h2_mmc_set_bus_mode,
-                .get_ro                 = NULL,
-                .get_cover_state        = h2_mmc_get_cover_state,
+                .set_power              = mmc_set_power,
                 .ocr_mask               = MMC_VDD_28_29 | MMC_VDD_30_31 |
                                           MMC_VDD_32_33 | MMC_VDD_33_34,
                 .name                   = "mmcblk",
         },
 };
 
+static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC];
+
 void __init h2_mmc_init(void)
 {
-        omap_set_mmc_info(1, &h2_mmc_data);
+        mmc_data[0] = &mmc1_data;
+        omap1_init_mmc(mmc_data, OMAP16XX_NR_MMC);
 }
 
 #else
@@ -104,7 +82,4 @@ void __init h2_mmc_init(void)
 {
 }
 
-void h2_mmc_slot_cover_handler(void *arg, int state)
-{
-}
 #endif
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 3b65914b9141..b240c5f861da 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -250,11 +250,8 @@ static struct platform_device h2_kp_device = {
 #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
 static int h2_transceiver_mode(struct device *dev, int state)
 {
-        if (state & IR_SIRMODE)
-                omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 0);
-        else    /* MIR/FIR */
-                omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 1);
-
+        /* SIR when low, else MIR/FIR when HIGH */
+        gpio_set_value(H2_IRDA_FIRSEL_GPIO_PIN, !(state & IR_SIRMODE));
         return 0;
 }
 #endif
@@ -342,16 +339,31 @@ static struct platform_device *h2_devices[] __initdata = {
 
 static void __init h2_init_smc91x(void)
 {
-        if ((omap_request_gpio(0)) < 0) {
+        if (gpio_request(0, "SMC91x irq") < 0) {
                 printk("Error requesting gpio 0 for smc91x irq\n");
                 return;
         }
 }
 
+static int tps_setup(struct i2c_client *client, void *context)
+{
+        tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
+                                TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
+
+        return 0;
+}
+
+static struct tps65010_board tps_board = {
+        .base           = H2_TPS_GPIO_BASE,
+        .outmask        = 0x0f,
+        .setup          = tps_setup,
+};
+
 static struct i2c_board_info __initdata h2_i2c_board_info[] = {
         {
                 I2C_BOARD_INFO("tps65010", 0x48),
                 .irq            = OMAP_GPIO_IRQ(58),
+                .platform_data  = &tps_board,
         }, {
                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
                 .irq            = OMAP_GPIO_IRQ(2),
@@ -381,15 +393,6 @@ static struct omap_usb_config h2_usb_config __initdata = {
         .pins[1]        = 3,
 };
 
-static struct omap_mmc_config h2_mmc_config __initdata = {
-        .mmc[0] = {
-                .enabled        = 1,
-                .wire4          = 1,
-        },
-};
-
-extern struct omap_mmc_platform_data h2_mmc_data;
-
 static struct omap_uart_config h2_uart_config __initdata = {
         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
@@ -400,7 +403,6 @@ static struct omap_lcd_config h2_lcd_config __initdata = {
 
 static struct omap_board_config_kernel h2_config[] __initdata = {
         { OMAP_TAG_USB,         &h2_usb_config },
-        { OMAP_TAG_MMC,         &h2_mmc_config },
         { OMAP_TAG_UART,        &h2_uart_config },
         { OMAP_TAG_LCD,         &h2_lcd_config },
 };
@@ -409,7 +411,7 @@ static struct omap_board_config_kernel h2_config[] __initdata = {
 
 static int h2_nand_dev_ready(struct omap_nand_platform_data *data)
 {
-        return omap_get_gpio_datain(H2_NAND_RB_GPIO_PIN);
+        return gpio_get_value(H2_NAND_RB_GPIO_PIN);
 }
 
 static void __init h2_init(void)
@@ -428,8 +430,9 @@ static void __init h2_init(void)
 
         h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
         h2_nand_resource.end += SZ_4K - 1;
-        if (!(omap_request_gpio(H2_NAND_RB_GPIO_PIN)))
-                h2_nand_data.dev_ready = h2_nand_dev_ready;
+        if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
+                BUG();
+        gpio_direction_input(H2_NAND_RB_GPIO_PIN);
 
         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
@@ -441,10 +444,10 @@ static void __init h2_init(void)
         /* Irda */
 #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
         omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
-        if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) {
-                omap_set_gpio_direction(H2_IRDA_FIRSEL_GPIO_PIN, 0);
-                h2_irda_data.transceiver_mode = h2_transceiver_mode;
-        }
+        if (gpio_request(H2_IRDA_FIRSEL_GPIO_PIN, "IRDA mode") < 0)
+                BUG();
+        gpio_direction_output(H2_IRDA_FIRSEL_GPIO_PIN, 0);
+        h2_irda_data.transceiver_mode = h2_transceiver_mode;
 #endif
 
         platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index 36085819098c..fdfe793d56f2 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -12,94 +12,55 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/platform_device.h>
+
+#include <linux/i2c/tps65010.h>
+
 #include <mach/mmc.h>
 #include <mach/gpio.h>
 
-#ifdef CONFIG_MMC_OMAP
-static int slot_cover_open;
-static struct device *mmc_device;
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 
-static int h3_mmc_set_power(struct device *dev, int slot, int power_on,
+static int mmc_set_power(struct device *dev, int slot, int power_on,
                                 int vdd)
 {
-#ifdef CONFIG_MMC_DEBUG
-        dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
-                power_on ? "on" : "off", vdd);
-#endif
-        if (slot != 0) {
-                dev_err(dev, "No such slot %d\n", slot + 1);
-                return -ENODEV;
-        }
+        if (power_on)
+                gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 1);
+        else
+                gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 0);
 
         return 0;
 }
 
-static int h3_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
-{
-        int ret = 0;
-
-#ifdef CONFIG_MMC_DEBUG
-        dev_dbg(dev, "Set slot %d bus_mode %s\n", slot + 1,
-                bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
-#endif
-        if (slot != 0) {
-                dev_err(dev, "No such slot %d\n", slot + 1);
-                return -ENODEV;
-        }
-
-        /* Treated on upper level */
-
-        return bus_mode;
-}
-
-static int h3_mmc_get_cover_state(struct device *dev, int slot)
-{
-        BUG_ON(slot != 0);
-
-        return slot_cover_open;
-}
-
-void h3_mmc_slot_cover_handler(void *arg, int state)
-{
-        if (mmc_device == NULL)
-                return;
-
-        slot_cover_open = state;
-        omap_mmc_notify_cover_event(mmc_device, 0, state);
-}
-
-static int h3_mmc_late_init(struct device *dev)
-{
-        int ret = 0;
-
-        mmc_device = dev;
-
-        return ret;
-}
-
-static void h3_mmc_cleanup(struct device *dev)
-{
-}
-
-static struct omap_mmc_platform_data h3_mmc_data = {
+/*
+ * H3 could use the following functions tested:
+ * - mmc_get_cover_state that uses OMAP_MPUIO(1)
+ * - mmc_get_wp that maybe uses OMAP_MPUIO(3)
+ */
+static struct omap_mmc_platform_data mmc1_data = {
         .nr_slots                       = 1,
-        .switch_slot                    = NULL,
-        .init                           = h3_mmc_late_init,
-        .cleanup                        = h3_mmc_cleanup,
+        .dma_mask                       = 0xffffffff,
         .slots[0]       = {
-                .set_power              = h3_mmc_set_power,
-                .set_bus_mode           = h3_mmc_set_bus_mode,
-                .get_ro                 = NULL,
-                .get_cover_state        = h3_mmc_get_cover_state,
+                .set_power              = mmc_set_power,
                 .ocr_mask               = MMC_VDD_28_29 | MMC_VDD_30_31 |
                                           MMC_VDD_32_33 | MMC_VDD_33_34,
                 .name                   = "mmcblk",
         },
 };
 
+static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC];
+
 void __init h3_mmc_init(void)
 {
-        omap_set_mmc_info(1, &h3_mmc_data);
+        int ret;
+
+        ret = gpio_request(H3_TPS_GPIO_MMC_PWR_EN, "MMC power");
+        if (ret < 0)
+                return;
+        gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 0);
+
+        mmc_data[0] = &mmc1_data;
+        omap1_init_mmc(mmc_data, OMAP16XX_NR_MMC);
 }
 
 #else
@@ -108,7 +69,4 @@ void __init h3_mmc_init(void)
 {
 }
 
-void h3_mmc_slot_cover_handler(void *arg, int state)
-{
-}
 #endif
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index adfcd7b51393..5157eea9be35 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -447,15 +447,6 @@ static struct omap_usb_config h3_usb_config __initdata = {
         .pins[1]        = 3,
 };
 
-static struct omap_mmc_config h3_mmc_config __initdata = {
-        .mmc[0] = {
-                .enabled        = 1,
-                .wire4          = 1,
-       },
-};
-
-extern struct omap_mmc_platform_data h3_mmc_data;
-
 static struct omap_uart_config h3_uart_config __initdata = {
         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
@@ -466,7 +457,6 @@ static struct omap_lcd_config h3_lcd_config __initdata = {
 
 static struct omap_board_config_kernel h3_config[] __initdata = {
         { OMAP_TAG_USB,         &h3_usb_config },
-        { OMAP_TAG_MMC,         &h3_mmc_config },
         { OMAP_TAG_UART,        &h3_uart_config },
         { OMAP_TAG_LCD,         &h3_lcd_config },
 };
@@ -498,7 +488,7 @@ static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
 
 static int nand_dev_ready(struct omap_nand_platform_data *data)
 {
-        return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
+        return gpio_get_value(H3_NAND_RB_GPIO_PIN);
 }
 
 static void __init h3_init(void)
@@ -516,8 +506,9 @@ static void __init h3_init(void)
 
         nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
         nand_resource.end += SZ_4K - 1;
-        if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
-                nand_data.dev_ready = nand_dev_ready;
+        if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
+                BUG();
+        nand_data.dev_ready = nand_dev_ready;
 
         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
@@ -537,7 +528,7 @@ static void __init h3_init(void)
 static void __init h3_init_smc91x(void)
 {
         omap_cfg_reg(W15_1710_GPIO40);
-        if (omap_request_gpio(40) < 0) {
+        if (gpio_request(40, "SMC91x irq") < 0) {
                 printk("Error requesting gpio 40 for smc91x irq\n");
                 return;
         }
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index cbc11be5cd2a..af2fb9070083 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -39,6 +39,7 @@
 #include <mach/common.h>
 #include <mach/mcbsp.h>
 #include <mach/omap-alsa.h>
+#include <mach/mmc.h>
 
 static int innovator_keymap[] = {
         KEY(0, 0, KEY_F1),
@@ -301,7 +302,7 @@ static void __init innovator_init_smc91x(void)
                            OMAP1510_FPGA_RST);
                 udelay(750);
         } else {
-                if ((omap_request_gpio(0)) < 0) {
+                if (gpio_request(0, "SMC91x irq") < 0) {
                         printk("Error requesting gpio 0 for smc91x irq\n");
                         return;
                 }
@@ -360,16 +361,49 @@ static struct omap_lcd_config innovator1610_lcd_config __initdata = {
 };
 #endif
 
-static struct omap_mmc_config innovator_mmc_config __initdata = {
-        .mmc [0] = {
-                .enabled        = 1,
-                .wire4          = 1,
-                .wp_pin         = OMAP_MPUIO(3),
-                .power_pin      = -1,   /* FPGA F3 UIO42 */
-                .switch_pin     = -1,   /* FPGA F4 UIO43 */
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+
+static int mmc_set_power(struct device *dev, int slot, int power_on,
+                                int vdd)
+{
+        if (power_on)
+                fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
+                                OMAP1510_FPGA_POWER);
+        else
+                fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3),
+                                OMAP1510_FPGA_POWER);
+
+        return 0;
+}
+
+/*
+ * Innovator could use the following functions tested:
+ * - mmc_get_wp that uses OMAP_MPUIO(3)
+ * - mmc_get_cover_state that uses FPGA F4 UIO43
+ */
+static struct omap_mmc_platform_data mmc1_data = {
+        .nr_slots                       = 1,
+        .slots[0]       = {
+                .set_power              = mmc_set_power,
+                .wires                  = 4,
+                .name                   = "mmcblk",
         },
 };
 
+static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC];
+
+void __init innovator_mmc_init(void)
+{
+        mmc_data[0] = &mmc1_data;
+        omap1_init_mmc(mmc_data, OMAP15XX_NR_MMC);
+}
+
+#else
+static inline void innovator_mmc_init(void)
+{
+}
+#endif
+
 static struct omap_uart_config innovator_uart_config __initdata = {
         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
@@ -377,7 +411,6 @@ static struct omap_uart_config innovator_uart_config __initdata = {
 static struct omap_board_config_kernel innovator_config[] = {
         { OMAP_TAG_USB,         NULL },
         { OMAP_TAG_LCD,         NULL },
-        { OMAP_TAG_MMC,         &innovator_mmc_config },
         { OMAP_TAG_UART,        &innovator_uart_config },
 };
 
@@ -412,6 +445,7 @@ static void __init innovator_init(void)
         omap_board_config_size = ARRAY_SIZE(innovator_config);
         omap_serial_init();
         omap_register_i2c_bus(1, 100, NULL, 0);
+        innovator_mmc_init();
 }
 
 static void __init innovator_map_io(void)
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 38d9783ac6d6..4970c402a594 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -35,6 +35,7 @@
 #include <mach/aic23.h>
 #include <mach/omapfb.h>
 #include <mach/lcd_mipid.h>
+#include <mach/mmc.h>
 
 #define ADS7846_PENDOWN_GPIO    15
 
@@ -102,7 +103,7 @@ static void mipid_shutdown(struct mipid_platform_data *pdata)
 {
         if (pdata->nreset_gpio != -1) {
                 printk(KERN_INFO "shutdown LCD\n");
-                omap_set_gpio_dataout(pdata->nreset_gpio, 0);
+                gpio_set_value(pdata->nreset_gpio, 0);
                 msleep(120);
         }
 }
@@ -124,13 +125,13 @@ static void mipid_dev_init(void)
 
 static void ads7846_dev_init(void)
 {
-        if (omap_request_gpio(ADS7846_PENDOWN_GPIO) < 0)
+        if (gpio_request(ADS7846_PENDOWN_GPIO, "ADS7846 pendown") < 0)
                 printk(KERN_ERR "can't get ads7846 pen down GPIO\n");
 }
 
 static int ads7846_get_pendown_state(void)
 {
-        return !omap_get_gpio_datain(ADS7846_PENDOWN_GPIO);
+        return !gpio_get_value(ADS7846_PENDOWN_GPIO);
 }
 
 static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata = {
@@ -173,26 +174,68 @@ static struct omap_usb_config nokia770_usb_config __initdata = {
         .pins[0]        = 6,
 };
 
-static struct omap_mmc_config nokia770_mmc_config __initdata = {
-        .mmc[0] = {
-                .enabled        = 0,
-                .wire4          = 0,
-                .wp_pin         = -1,
-                .power_pin      = -1,
-                .switch_pin     = -1,
-        },
-        .mmc[1] = {
-                .enabled        = 0,
-                .wire4          = 0,
-                .wp_pin         = -1,
-                .power_pin      = -1,
-                .switch_pin     = -1,
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+
+#define NOKIA770_GPIO_MMC_POWER         41
+#define NOKIA770_GPIO_MMC_SWITCH        23
+
+static int nokia770_mmc_set_power(struct device *dev, int slot, int power_on,
+                                int vdd)
+{
+        if (power_on)
+                gpio_set_value(NOKIA770_GPIO_MMC_POWER, 1);
+        else
+                gpio_set_value(NOKIA770_GPIO_MMC_POWER, 0);
+
+        return 0;
+}
+
+static int nokia770_mmc_get_cover_state(struct device *dev, int slot)
+{
+        return gpio_get_value(NOKIA770_GPIO_MMC_SWITCH);
+}
+
+static struct omap_mmc_platform_data nokia770_mmc2_data = {
+        .nr_slots                       = 1,
+        .dma_mask                       = 0xffffffff,
+        .slots[0]       = {
+                .set_power              = nokia770_mmc_set_power,
+                .get_cover_state        = nokia770_mmc_get_cover_state,
+                .name                   = "mmcblk",
         },
 };
 
+static struct omap_mmc_platform_data *nokia770_mmc_data[OMAP16XX_NR_MMC];
+
+static void __init nokia770_mmc_init(void)
+{
+        int ret;
+
+        ret = gpio_request(NOKIA770_GPIO_MMC_POWER, "MMC power");
+        if (ret < 0)
+                return;
+        gpio_direction_output(NOKIA770_GPIO_MMC_POWER, 0);
+
+        ret = gpio_request(NOKIA770_GPIO_MMC_SWITCH, "MMC cover");
+        if (ret < 0) {
+                gpio_free(NOKIA770_GPIO_MMC_POWER);
+                return;
+        }
+        gpio_direction_input(NOKIA770_GPIO_MMC_SWITCH);
+
+        /* Only the second MMC controller is used */
+        nokia770_mmc_data[1] = &nokia770_mmc2_data;
+        omap1_init_mmc(nokia770_mmc_data, OMAP16XX_NR_MMC);
+}
+
+#else
+static inline void nokia770_mmc_init(void)
+{
+}
+#endif
+
 static struct omap_board_config_kernel nokia770_config[] __initdata = {
         { OMAP_TAG_USB,         NULL },
-        { OMAP_TAG_MMC,         &nokia770_mmc_config },
 };
 
 #if     defined(CONFIG_OMAP_DSP)
@@ -228,9 +271,9 @@ static void nokia770_audio_pwr_up(void)
         /* Turn on codec */
         aic23_power_up();
 
-        if (omap_get_gpio_datain(HEADPHONE_GPIO))
+        if (gpio_get_value(HEADPHONE_GPIO))
                 /* HP not connected, turn on amplifier */
-                omap_set_gpio_dataout(AMPLIFIER_CTRL_GPIO, 1);
+                gpio_set_value(AMPLIFIER_CTRL_GPIO, 1);
         else
                 /* HP connected, do not turn on amplifier */
                 printk("HP connected\n");
@@ -250,7 +293,7 @@ static DECLARE_DELAYED_WORK(codec_power_down_work, codec_delayed_power_down);
 static void nokia770_audio_pwr_down(void)
 {
         /* Turn off amplifier */
-        omap_set_gpio_dataout(AMPLIFIER_CTRL_GPIO, 0);
+        gpio_set_value(AMPLIFIER_CTRL_GPIO, 0);
 
         /* Turn off codec: schedule delayed work */
         schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */
@@ -335,6 +378,7 @@ static void __init omap_nokia770_init(void)
         omap_dsp_init();
         ads7846_dev_init();
         mipid_dev_init();
+        nokia770_mmc_init();
 }
 
 static void __init omap_nokia770_map_io(void)
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 3e766e49f7cc..ff9e67baa5c9 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -188,7 +188,8 @@ static struct gpio_led tps_leds[] = {
         /* NOTE:  D9 and D2 have hardware blink support.
          * Also, D9 requires non-battery power.
          */
-        { .gpio = OSK_TPS_GPIO_LED_D9, .name = "d9", },
+        { .gpio = OSK_TPS_GPIO_LED_D9, .name = "d9",
+                        .default_trigger = "ide-disk", },
         { .gpio = OSK_TPS_GPIO_LED_D2, .name = "d2", },
         { .gpio = OSK_TPS_GPIO_LED_D3, .name = "d3", .active_low = 1,
                         .default_trigger = "heartbeat", },
@@ -260,7 +261,6 @@ static struct i2c_board_info __initdata osk_i2c_board_info[] = {
         },
         /* TODO when driver support is ready:
          *  - aic23 audio chip at 0x1a
-         *  - on Mistral, 24c04 eeprom at 0x50
          *  - optionally on Mistral, ov9640 camera sensor at 0x30
          */
 };
@@ -288,7 +288,7 @@ static void __init osk_init_cf(void)
                 return;
         }
         /* the CF I/O IRQ is really active-low */
-        set_irq_type(OMAP_GPIO_IRQ(62), IRQ_TYPE_EDGE_FALLING);
+        set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
 }
 
 static void __init osk_init_irq(void)
@@ -337,11 +337,28 @@ static struct omap_board_config_kernel osk_config[] __initdata = {
 #ifdef  CONFIG_OMAP_OSK_MISTRAL
 
 #include <linux/input.h>
+#include <linux/i2c/at24.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
 
 #include <mach/keypad.h>
 
+static struct at24_platform_data at24c04 = {
+        .byte_len       = SZ_4K / 8,
+        .page_size      = 16,
+};
+
+static struct i2c_board_info __initdata mistral_i2c_board_info[] = {
+        {
+                /* NOTE:  powered from LCD supply */
+                I2C_BOARD_INFO("24c04", 0x50),
+                .platform_data  = &at24c04,
+        },
+        /* TODO when driver support is ready:
+         *  - optionally ov9640 camera sensor at 0x30
+         */
+};
+
 static const int osk_keymap[] = {
         /* KEY(col, row, code) */
         KEY(0, 0, KEY_F1),              /* SW4 */
@@ -483,23 +500,30 @@ static void __init osk_mistral_init(void)
         omap_cfg_reg(P20_1610_GPIO4);   /* PENIRQ */
         gpio_request(4, "ts_int");
         gpio_direction_input(4);
-        set_irq_type(OMAP_GPIO_IRQ(4), IRQ_TYPE_EDGE_FALLING);
+        set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
 
         spi_register_board_info(mistral_boardinfo,
                         ARRAY_SIZE(mistral_boardinfo));
 
-        /* the sideways button (SW1) is for use as a "wakeup" button */
+        /* the sideways button (SW1) is for use as a "wakeup" button
+         *
+         * NOTE:  The Mistral board has the wakeup button (SW1) wired
+         * to the LCD 3.3V rail, which is powered down during suspend.
+         * To allow this button to wake up the omap, work around this
+         * HW bug by rewiring SW1 to use the main 3.3V rail.
+         */
         omap_cfg_reg(N15_1610_MPUIO2);
         if (gpio_request(OMAP_MPUIO(2), "wakeup") == 0) {
                 int ret = 0;
+                int irq = gpio_to_irq(OMAP_MPUIO(2));
 
                 gpio_direction_input(OMAP_MPUIO(2));
-                set_irq_type(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), IRQ_TYPE_EDGE_RISING);
+                set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
 #ifdef  CONFIG_PM
                 /* share the IRQ in case someone wants to use the
                  * button for more than wakeup from system sleep.
                  */
-                ret = request_irq(OMAP_GPIO_IRQ(OMAP_MPUIO(2)),
+                ret = request_irq(irq,
                                 &osk_mistral_wake_interrupt,
                                 IRQF_SHARED, "mistral_wakeup",
                                 &osk_mistral_wake_interrupt);
@@ -508,7 +532,7 @@ static void __init osk_mistral_init(void)
                         printk(KERN_ERR "OSK+Mistral: no wakeup irq, %d?\n",
                                 ret);
                 } else
-                        enable_irq_wake(OMAP_GPIO_IRQ(OMAP_MPUIO(2)));
+                        enable_irq_wake(irq);
 #endif
         } else
                 printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n");
@@ -520,6 +544,9 @@ static void __init osk_mistral_init(void)
         if (gpio_request(2, "lcd_pwr") == 0)
                 gpio_direction_output(2, 1);
 
+        i2c_register_board_info(1, mistral_i2c_board_info,
+                        ARRAY_SIZE(mistral_i2c_board_info));
+
         platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices));
 }
 #else
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index b58043644a6f..75e32d35afd9 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -255,7 +255,7 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery)
 {
         int charging, batt, hi, lo, mid;
 
-        charging = !omap_get_gpio_datain(PALMTE_DC_GPIO);
+        charging = !gpio_get_value(PALMTE_DC_GPIO);
         batt = battery[0];
         if (charging)
                 batt -= 60;
@@ -316,7 +316,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery)
 
 static struct omap_board_config_kernel palmte_config[] __initdata = {
         { OMAP_TAG_USB,         &palmte_usb_config },
-        { OMAP_TAG_MMC,         &palmte_mmc_config },
         { OMAP_TAG_LCD,         &palmte_lcd_config },
         { OMAP_TAG_UART,        &palmte_uart_config },
 };
@@ -335,11 +334,11 @@ static void palmte_headphones_detect(void *data, int state)
 {
         if (state) {
                 /* Headphones connected, disable speaker */
-                omap_set_gpio_dataout(PALMTE_SPEAKER_GPIO, 0);
+                gpio_set_value(PALMTE_SPEAKER_GPIO, 0);
                 printk(KERN_INFO "PM: speaker off\n");
         } else {
                 /* Headphones unplugged, re-enable speaker */
-                omap_set_gpio_dataout(PALMTE_SPEAKER_GPIO, 1);
+                gpio_set_value(PALMTE_SPEAKER_GPIO, 1);
                 printk(KERN_INFO "PM: speaker on\n");
         }
 }
@@ -347,18 +346,18 @@ static void palmte_headphones_detect(void *data, int state)
 static void __init palmte_misc_gpio_setup(void)
 {
         /* Set TSC2102 PINTDAV pin as input (used by TSC2102 driver) */
-        if (omap_request_gpio(PALMTE_PINTDAV_GPIO)) {
+        if (gpio_request(PALMTE_PINTDAV_GPIO, "TSC2102 PINTDAV") < 0) {
                 printk(KERN_ERR "Could not reserve PINTDAV GPIO!\n");
                 return;
         }
-        omap_set_gpio_direction(PALMTE_PINTDAV_GPIO, 1);
+        gpio_direction_input(PALMTE_PINTDAV_GPIO);
 
         /* Set USB-or-DC-IN pin as input (unused) */
-        if (omap_request_gpio(PALMTE_USB_OR_DC_GPIO)) {
+        if (gpio_request(PALMTE_USB_OR_DC_GPIO, "USB/DC-IN") < 0) {
                 printk(KERN_ERR "Could not reserve cable signal GPIO!\n");
                 return;
         }
-        omap_set_gpio_direction(PALMTE_USB_OR_DC_GPIO, 1);
+        gpio_direction_input(PALMTE_USB_OR_DC_GPIO);
 }
 
 static void __init omap_palmte_init(void)
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 40f9860a09df..5c001afe8062 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -268,7 +268,7 @@ static struct platform_device *palmtt_devices[] __initdata = {
 
 static int palmtt_get_pendown_state(void)
 {
-        return !omap_get_gpio_datain(6);
+        return !gpio_get_value(6);
 }
 
 static const struct ads7846_platform_data palmtt_ts_info = {
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index e719294250b1..cc05257eb1cd 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -239,7 +239,7 @@ static struct platform_device *devices[] __initdata = {
 static int
 palmz71_get_pendown_state(void)
 {
-        return !omap_get_gpio_datain(PALMZ71_PENIRQ_GPIO);
+        return !gpio_get_value(PALMZ71_PENIRQ_GPIO);
 }
 
 static const struct ads7846_platform_data palmz71_ts_info = {
@@ -267,16 +267,6 @@ static struct omap_usb_config palmz71_usb_config __initdata = {
         .pins[0]        = 2,
 };
 
-static struct omap_mmc_config palmz71_mmc_config __initdata = {
-        .mmc[0] = {
-                .enabled        = 1,
-                .wire4          = 0,
-                .wp_pin         = PALMZ71_MMC_WP_GPIO,
-                .power_pin      = -1,
-                .switch_pin     = PALMZ71_MMC_IN_GPIO,
-        },
-};
-
 static struct omap_lcd_config palmz71_lcd_config __initdata = {
         .ctrl_name = "internal",
 };
@@ -287,7 +277,6 @@ static struct omap_uart_config palmz71_uart_config __initdata = {
 
 static struct omap_board_config_kernel palmz71_config[] __initdata = {
         {OMAP_TAG_USB,  &palmz71_usb_config},
-        {OMAP_TAG_MMC,  &palmz71_mmc_config},
         {OMAP_TAG_LCD,  &palmz71_lcd_config},
         {OMAP_TAG_UART, &palmz71_uart_config},
 };
@@ -295,13 +284,13 @@ static struct omap_board_config_kernel palmz71_config[] __initdata = {
 static irqreturn_t
 palmz71_powercable(int irq, void *dev_id)
 {
-        if (omap_get_gpio_datain(PALMZ71_USBDETECT_GPIO)) {
+        if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) {
                 printk(KERN_INFO "PM: Power cable connected\n");
-                set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO),
+                set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
                                 IRQ_TYPE_EDGE_FALLING);
         } else {
                 printk(KERN_INFO "PM: Power cable disconnected\n");
-                set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO),
+                set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
                                 IRQ_TYPE_EDGE_RISING);
         }
         return IRQ_HANDLED;
@@ -323,29 +312,28 @@ palmz71_gpio_setup(int early)
 {
         if (early) {
                 /* Only set GPIO1 so we have a working serial */
-                omap_set_gpio_dataout(1, 1);
-                omap_set_gpio_direction(1, 0);
+                gpio_direction_output(1, 1);
         } else {
                 /* Set MMC/SD host WP pin as input */
-                if (omap_request_gpio(PALMZ71_MMC_WP_GPIO)) {
+                if (gpio_request(PALMZ71_MMC_WP_GPIO, "MMC WP") < 0) {
                         printk(KERN_ERR "Could not reserve WP GPIO!\n");
                         return;
                 }
-                omap_set_gpio_direction(PALMZ71_MMC_WP_GPIO, 1);
+                gpio_direction_input(PALMZ71_MMC_WP_GPIO);
 
                 /* Monitor the Power-cable-connected signal */
-                if (omap_request_gpio(PALMZ71_USBDETECT_GPIO)) {
+                if (gpio_request(PALMZ71_USBDETECT_GPIO, "USB detect") < 0) {
                         printk(KERN_ERR
                                 "Could not reserve cable signal GPIO!\n");
                         return;
                 }
-                omap_set_gpio_direction(PALMZ71_USBDETECT_GPIO, 1);
-                if (request_irq(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO),
+                gpio_direction_input(PALMZ71_USBDETECT_GPIO);
+                if (request_irq(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
                                 palmz71_powercable, IRQF_SAMPLE_RANDOM,
                                 "palmz71-cable", 0))
                         printk(KERN_ERR
                                         "IRQ request for power cable failed!\n");
-                palmz71_powercable(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), 0);
+                palmz71_powercable(gpio_to_irq(PALMZ71_USBDETECT_GPIO), 0);
         }
 }
 
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index b715917bfdaf..3b9f907aa899 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -205,7 +205,7 @@ static struct platform_device *devices[] __initdata = {
 
 static int nand_dev_ready(struct omap_nand_platform_data *data)
 {
-        return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN);
+        return gpio_get_value(P2_NAND_RB_GPIO_PIN);
 }
 
 static struct omap_uart_config perseus2_uart_config __initdata = {
@@ -223,8 +223,9 @@ static struct omap_board_config_kernel perseus2_config[] __initdata = {
 
 static void __init omap_perseus2_init(void)
 {
-        if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN)))
-                nand_data.dev_ready = nand_dev_ready;
+        if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
+                BUG();
+        nand_data.dev_ready = nand_dev_ready;
 
         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c
index 0be4ebaa2842..66a4d7d5255d 100644
--- a/arch/arm/mach-omap1/board-sx1-mmc.c
+++ b/arch/arm/mach-omap1/board-sx1-mmc.c
@@ -12,30 +12,20 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/platform_device.h>
+
 #include <mach/hardware.h>
 #include <mach/mmc.h>
 #include <mach/gpio.h>
 
-#ifdef CONFIG_MMC_OMAP
-static int slot_cover_open;
-static struct device *mmc_device;
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 
-static int sx1_mmc_set_power(struct device *dev, int slot, int power_on,
+static int mmc_set_power(struct device *dev, int slot, int power_on,
                                 int vdd)
 {
         int err;
         u8 dat = 0;
 
-#ifdef CONFIG_MMC_DEBUG
-        dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
-                power_on ? "on" : "off", vdd);
-#endif
-
-        if (slot != 0) {
-                dev_err(dev, "No such slot %d\n", slot + 1);
-                return -ENODEV;
-        }
-
         err = sx1_i2c_read_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, &dat);
         if (err < 0)
                 return err;
@@ -48,68 +38,23 @@ static int sx1_mmc_set_power(struct device *dev, int slot, int power_on,
         return sx1_i2c_write_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, dat);
 }
 
-static int sx1_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
-{
-#ifdef CONFIG_MMC_DEBUG
-        dev_dbg(dev, "Set slot %d bus_mode %s\n", slot + 1,
-                bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
-#endif
-        if (slot != 0) {
-                dev_err(dev, "No such slot %d\n", slot + 1);
-                return -ENODEV;
-        }
-
-        return 0;
-}
-
-static int sx1_mmc_get_cover_state(struct device *dev, int slot)
-{
-        BUG_ON(slot != 0);
-
-        return slot_cover_open;
-}
-
-void sx1_mmc_slot_cover_handler(void *arg, int state)
-{
-        if (mmc_device == NULL)
-                return;
-
-        slot_cover_open = state;
-        omap_mmc_notify_cover_event(mmc_device, 0, state);
-}
-
-static int sx1_mmc_late_init(struct device *dev)
-{
-        int ret = 0;
-
-        mmc_device = dev;
-
-        return ret;
-}
-
-static void sx1_mmc_cleanup(struct device *dev)
-{
-}
-
-static struct omap_mmc_platform_data sx1_mmc_data = {
+/* Cover switch is at OMAP_MPUIO(3) */
+static struct omap_mmc_platform_data mmc1_data = {
         .nr_slots                       = 1,
-        .switch_slot                    = NULL,
-        .init                           = sx1_mmc_late_init,
-        .cleanup                        = sx1_mmc_cleanup,
         .slots[0]       = {
-                .set_power              = sx1_mmc_set_power,
-                .set_bus_mode           = sx1_mmc_set_bus_mode,
-                .get_ro                 = NULL,
-                .get_cover_state        = sx1_mmc_get_cover_state,
+                .set_power              = mmc_set_power,
                 .ocr_mask               = MMC_VDD_28_29 | MMC_VDD_30_31 |
                                           MMC_VDD_32_33 | MMC_VDD_33_34,
                 .name                   = "mmcblk",
         },
 };
 
+static struct omap_mmc_platform_data *mmc_data[OMAP15XX_NR_MMC];
+
 void __init sx1_mmc_init(void)
 {
-        omap_set_mmc_info(1, &sx1_mmc_data);
+        mmc_data[0] = &mmc1_data;
+        omap1_init_mmc(mmc_data, OMAP15XX_NR_MMC);
 }
 
 #else
@@ -118,7 +63,4 @@ void __init sx1_mmc_init(void)
 {
 }
 
-void sx1_mmc_slot_cover_handler(void *arg, int state)
-{
-}
 #endif
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 130bcc6fd082..8171fe0ca082 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -378,15 +378,6 @@ static struct omap_usb_config sx1_usb_config __initdata = {
         .pins[2]        = 0,
 };
 
-/*----------- MMC -------------------------*/
-
-static struct omap_mmc_config sx1_mmc_config __initdata = {
-        .mmc [0] = {
-                .enabled        = 1,
-                .wire4          = 0,
-        },
-};
-
 /*----------- LCD -------------------------*/
 
 static struct platform_device sx1_lcd_device = {
@@ -414,7 +405,6 @@ static struct omap_uart_config sx1_uart_config __initdata = {
 
 static struct omap_board_config_kernel sx1_config[] __initdata = {
         { OMAP_TAG_USB, &sx1_usb_config },
-        { OMAP_TAG_MMC, &sx1_mmc_config },
         { OMAP_TAG_LCD, &sx1_lcd_config },
         { OMAP_TAG_UART,        &sx1_uart_config },
 };
@@ -436,14 +426,9 @@ static void __init omap_sx1_init(void)
         omap_request_gpio(1);   /* A_IRDA_OFF */
         omap_request_gpio(11);  /* A_SWITCH */
         omap_request_gpio(15);  /* A_USB_ON */
-        omap_set_gpio_direction(1, 0);/* gpio1 -> output */
-        omap_set_gpio_direction(11, 0);/* gpio11 -> output */
-        omap_set_gpio_direction(15, 0);/* gpio15 -> output */
-        /* set GPIO data */
-        omap_set_gpio_dataout(1, 1);/*A_IRDA_OFF = 1 */
-        omap_set_gpio_dataout(11, 0);/*A_SWITCH = 0 */
-        omap_set_gpio_dataout(15, 0);/*A_USB_ON = 0 */
-
+        gpio_direction_output(1, 1);    /*A_IRDA_OFF = 1 */
+        gpio_direction_output(11, 0);   /*A_SWITCH = 0 */
+        gpio_direction_output(15, 0);   /*A_USB_ON = 0 */
 }
 /*----------------------------------------*/
 static void __init omap_sx1_init_irq(void)
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 45a01311669a..c224f3c64235 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -15,6 +15,7 @@
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/notifier.h>
@@ -140,21 +141,12 @@ static struct omap_usb_config voiceblue_usb_config __initdata = {
         .pins[2]        = 6,
 };
 
-static struct omap_mmc_config voiceblue_mmc_config __initdata = {
-        .mmc[0] = {
-                .enabled        = 1,
-                .power_pin      = 2,
-                .switch_pin     = -1,
-        },
-};
-
 static struct omap_uart_config voiceblue_uart_config __initdata = {
         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
 
 static struct omap_board_config_kernel voiceblue_config[] = {
         { OMAP_TAG_USB,  &voiceblue_usb_config },
-        { OMAP_TAG_MMC,  &voiceblue_mmc_config },
         { OMAP_TAG_UART, &voiceblue_uart_config },
 };
 
@@ -168,29 +160,27 @@ static void __init voiceblue_init_irq(void)
 static void __init voiceblue_init(void)
 {
         /* Watchdog */
-        omap_request_gpio(0);
+        gpio_request(0, "Watchdog");
         /* smc91x reset */
-        omap_request_gpio(7);
-        omap_set_gpio_direction(7, 0);
-        omap_set_gpio_dataout(7, 1);
+        gpio_request(7, "SMC91x reset");
+        gpio_direction_output(7, 1);
         udelay(2);      /* wait at least 100ns */
-        omap_set_gpio_dataout(7, 0);
+        gpio_set_value(7, 0);
         mdelay(50);     /* 50ms until PHY ready */
         /* smc91x interrupt pin */
-        omap_request_gpio(8);
+        gpio_request(8, "SMC91x irq");
         /* 16C554 reset*/
-        omap_request_gpio(6);
-        omap_set_gpio_direction(6, 0);
-        omap_set_gpio_dataout(6, 0);
+        gpio_request(6, "16C554 reset");
+        gpio_direction_output(6, 0);
         /* 16C554 interrupt pins */
-        omap_request_gpio(12);
-        omap_request_gpio(13);
-        omap_request_gpio(14);
-        omap_request_gpio(15);
-        set_irq_type(OMAP_GPIO_IRQ(12), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(OMAP_GPIO_IRQ(14), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(OMAP_GPIO_IRQ(15), IRQ_TYPE_EDGE_RISING);
+        gpio_request(12, "16C554 irq");
+        gpio_request(13, "16C554 irq");
+        gpio_request(14, "16C554 irq");
+        gpio_request(15, "16C554 irq");
+        set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
+        set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
+        set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
+        set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
 
         platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
         omap_board_config = voiceblue_config;
@@ -244,19 +234,18 @@ static int wdt_gpio_state;
 
 void voiceblue_wdt_enable(void)
 {
-        omap_set_gpio_direction(0, 0);
-        omap_set_gpio_dataout(0, 0);
-        omap_set_gpio_dataout(0, 1);
-        omap_set_gpio_dataout(0, 0);
+        gpio_direction_output(0, 0);
+        gpio_set_value(0, 1);
+        gpio_set_value(0, 0);
         wdt_gpio_state = 0;
 }
 
 void voiceblue_wdt_disable(void)
 {
-        omap_set_gpio_dataout(0, 0);
-        omap_set_gpio_dataout(0, 1);
-        omap_set_gpio_dataout(0, 0);
-        omap_set_gpio_direction(0, 1);
+        gpio_set_value(0, 0);
+        gpio_set_value(0, 1);
+        gpio_set_value(0, 0);
+        gpio_direction_input(0);
 }
 
 void voiceblue_wdt_ping(void)
@@ -265,7 +254,7 @@ void voiceblue_wdt_ping(void)
                 return;
 
         wdt_gpio_state = !wdt_gpio_state;
-        omap_set_gpio_dataout(0, wdt_gpio_state);
+        gpio_set_value(0, wdt_gpio_state);
 }
 
 void voiceblue_reset(void)
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 5635b511ab6f..c1dcdf18d8dd 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -705,7 +705,6 @@ static struct clk bclk_16xx = {
 
 static struct clk mmc1_ck = {
         .name           = "mmc_ck",
-        .id             = 1,
         /* Functional clock is direct from ULPD, interface clock is ARMPER */
         .parent         = &armper_ck.clk,
         .rate           = 48000000,
@@ -720,7 +719,7 @@ static struct clk mmc1_ck = {
 
 static struct clk mmc2_ck = {
         .name           = "mmc_ck",
-        .id             = 2,
+        .id             = 1,
         /* Functional clock is direct from ULPD, interface clock is ARMPER */
         .parent         = &armper_ck.clk,
         .rate           = 48000000,
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index e382b438c64e..77382d8b6b2f 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -22,6 +22,7 @@
 #include <mach/board.h>
 #include <mach/mux.h>
 #include <mach/gpio.h>
+#include <mach/mmc.h>
 
 /*-------------------------------------------------------------------------*/
 
@@ -99,6 +100,95 @@ static inline void omap_init_mbox(void)
 static inline void omap_init_mbox(void) { }
 #endif
 
+/*-------------------------------------------------------------------------*/
+
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+
+static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
+                        int controller_nr)
+{
+        if (controller_nr == 0) {
+                omap_cfg_reg(MMC_CMD);
+                omap_cfg_reg(MMC_CLK);
+                omap_cfg_reg(MMC_DAT0);
+                if (cpu_is_omap1710()) {
+                        omap_cfg_reg(M15_1710_MMC_CLKI);
+                        omap_cfg_reg(P19_1710_MMC_CMDDIR);
+                        omap_cfg_reg(P20_1710_MMC_DATDIR0);
+                }
+                if (mmc_controller->slots[0].wires == 4) {
+                        omap_cfg_reg(MMC_DAT1);
+                        /* NOTE: DAT2 can be on W10 (here) or M15 */
+                        if (!mmc_controller->slots[0].nomux)
+                                omap_cfg_reg(MMC_DAT2);
+                        omap_cfg_reg(MMC_DAT3);
+                }
+        }
+
+        /* Block 2 is on newer chips, and has many pinout options */
+        if (cpu_is_omap16xx() && controller_nr == 1) {
+                if (!mmc_controller->slots[1].nomux) {
+                        omap_cfg_reg(Y8_1610_MMC2_CMD);
+                        omap_cfg_reg(Y10_1610_MMC2_CLK);
+                        omap_cfg_reg(R18_1610_MMC2_CLKIN);
+                        omap_cfg_reg(W8_1610_MMC2_DAT0);
+                        if (mmc_controller->slots[1].wires == 4) {
+                                omap_cfg_reg(V8_1610_MMC2_DAT1);
+                                omap_cfg_reg(W15_1610_MMC2_DAT2);
+                                omap_cfg_reg(R10_1610_MMC2_DAT3);
+                        }
+
+                        /* These are needed for the level shifter */
+                        omap_cfg_reg(V9_1610_MMC2_CMDDIR);
+                        omap_cfg_reg(V5_1610_MMC2_DATDIR0);
+                        omap_cfg_reg(W19_1610_MMC2_DATDIR1);
+                }
+
+                /* Feedback clock must be set on OMAP-1710 MMC2 */
+                if (cpu_is_omap1710())
+                        omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
+                                        MOD_CONF_CTRL_1);
+        }
+}
+
+void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                        int nr_controllers)
+{
+        int i;
+
+        for (i = 0; i < nr_controllers; i++) {
+                unsigned long base, size;
+                unsigned int irq = 0;
+
+                if (!mmc_data[i])
+                        continue;
+
+                omap1_mmc_mux(mmc_data[i], i);
+
+                switch (i) {
+                case 0:
+                        base = OMAP1_MMC1_BASE;
+                        irq = INT_MMC;
+                        break;
+                case 1:
+                        if (!cpu_is_omap16xx())
+                                return;
+                        base = OMAP1_MMC2_BASE;
+                        irq = INT_1610_MMC2;
+                        break;
+                default:
+                        continue;
+                }
+                size = OMAP1_MMC_SIZE;
+
+                omap_mmc_add(i, base, size, irq, mmc_data[i]);
+        };
+}
+
+#endif
+
+/*-------------------------------------------------------------------------*/
+
 #if defined(CONFIG_OMAP_STI)
 
 #define OMAP1_STI_BASE          0xfffea000
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 04995381aa5c..4f2b8a7adb19 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -177,9 +177,9 @@ void omap1510_fpga_init_irq(void)
          * NOTE: For general GPIO/MPUIO access and interrupts, please see
          * gpio.[ch]
          */
-        omap_request_gpio(13);
-        omap_set_gpio_direction(13, 1);
-        set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING);
+        gpio_request(13, "FPGA irq");
+        gpio_direction_input(13);
+        set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
         set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
 }
 
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index 13083d7e692d..89bb8756f450 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <mach/cpu.h>
 
 #define OMAP_DIE_ID_0           0xfffe1800
 #define OMAP_DIE_ID_1           0xfffe1804
@@ -30,6 +31,8 @@ struct omap_id {
         u32     type;           /* Cpu id bits [31:08], cpu class bits [07:00] */
 };
 
+static unsigned int omap_revision;
+
 /* Register values to detect the OMAP version */
 static struct omap_id omap_ids[] __initdata = {
         { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
@@ -53,6 +56,12 @@ static struct omap_id omap_ids[] __initdata = {
         { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
 };
 
+unsigned int omap_rev(void)
+{
+        return omap_revision;
+}
+EXPORT_SYMBOL(omap_rev);
+
 /*
  * Get OMAP type from PROD_ID.
  * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
@@ -121,17 +130,18 @@ void __init omap_check_revision(void)
         omap_id = omap_readl(OMAP32_ID_0);
 
 #ifdef DEBUG
-        printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
-        printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
+        printk(KERN_DEBUG "OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
+        printk(KERN_DEBUG "OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
                 omap_readl(OMAP_DIE_ID_1),
                (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
-        printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
-        printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
+        printk(KERN_DEBUG "OMAP_PRODUCTION_ID_0: 0x%08x\n",
+                omap_readl(OMAP_PRODUCTION_ID_0));
+        printk(KERN_DEBUG "OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
                 omap_readl(OMAP_PRODUCTION_ID_1),
                 omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
-        printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
-        printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
-        printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
+        printk(KERN_DEBUG "OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
+        printk(KERN_DEBUG "OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
+        printk(KERN_DEBUG "JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
 #endif
 
         system_serial_high = omap_readl(OMAP_DIE_ID_0);
@@ -140,7 +150,7 @@ void __init omap_check_revision(void)
         /* First check only the major version in a safe way */
         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
                 if (jtag_id == (omap_ids[i].jtag_id)) {
-                        system_rev = omap_ids[i].type;
+                        omap_revision = omap_ids[i].type;
                         break;
                 }
         }
@@ -148,7 +158,7 @@ void __init omap_check_revision(void)
         /* Check if we can find the die revision */
         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
                 if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
-                        system_rev = omap_ids[i].type;
+                        omap_revision = omap_ids[i].type;
                         break;
                 }
         }
@@ -158,38 +168,35 @@ void __init omap_check_revision(void)
                 if (jtag_id == omap_ids[i].jtag_id
                     && die_rev == omap_ids[i].die_rev
                     && omap_id == omap_ids[i].omap_id) {
-                        system_rev = omap_ids[i].type;
+                        omap_revision = omap_ids[i].type;
                         break;
                 }
         }
 
         /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
-        cpu_type = system_rev >> 24;
+        cpu_type = omap_revision >> 24;
 
         switch (cpu_type) {
         case 0x07:
-                system_rev |= 0x07;
+                omap_revision |= 0x07;
                 break;
         case 0x03:
         case 0x15:
-                system_rev |= 0x15;
+                omap_revision |= 0x15;
                 break;
         case 0x16:
         case 0x17:
-                system_rev |= 0x16;
-                break;
-        case 0x24:
-                system_rev |= 0x24;
+                omap_revision |= 0x16;
                 break;
         default:
-                printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
+                printk(KERN_INFO "Unknown OMAP cpu type: 0x%02x\n", cpu_type);
         }
 
-        printk("OMAP%04x", system_rev >> 16);
-        if ((system_rev >> 8) & 0xff)
-                printk("%x", (system_rev >> 8) & 0xff);
-        printk(" revision %i handled as %02xxx id: %08x%08x\n",
-               die_rev, system_rev & 0xff, system_serial_low,
+        printk(KERN_INFO "OMAP%04x", omap_revision >> 16);
+        if ((omap_revision >> 8) & 0xff)
+                printk(KERN_INFO "%x", (omap_revision >> 8) & 0xff);
+        printk(KERN_INFO " revision %i handled as %02xxx id: %08x%08x\n",
+               die_rev, omap_revision & 0xff, system_serial_low,
                system_serial_high);
 }
 
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index 71fe2cc7f7cf..17c9d0e04216 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -65,8 +65,8 @@ void h2p2_dbg_leds_event(led_event_t evt)
                 /* all leds off during suspend or shutdown */
 
                 if (! machine_is_omap_perseus2()) {
-                        omap_set_gpio_dataout(GPIO_TIMER, 0);
-                        omap_set_gpio_dataout(GPIO_IDLE, 0);
+                        gpio_set_value(GPIO_TIMER, 0);
+                        gpio_set_value(GPIO_IDLE, 0);
                 }
 
                 __raw_writew(~0, &fpga->leds);
@@ -94,7 +94,7 @@ void h2p2_dbg_leds_event(led_event_t evt)
                 if (machine_is_omap_perseus2())
                         hw_led_state ^= H2P2_DBG_FPGA_P2_LED_TIMER;
                 else {
-                        omap_set_gpio_dataout(GPIO_TIMER, led_state & LED_TIMER_ON);
+                        gpio_set_value(GPIO_TIMER, led_state & LED_TIMER_ON);
                         goto done;
                 }
 
@@ -106,7 +106,7 @@ void h2p2_dbg_leds_event(led_event_t evt)
                 if (machine_is_omap_perseus2())
                         hw_led_state |= H2P2_DBG_FPGA_P2_LED_IDLE;
                 else {
-                        omap_set_gpio_dataout(GPIO_IDLE, 1);
+                        gpio_set_value(GPIO_IDLE, 1);
                         goto done;
                 }
 
@@ -116,7 +116,7 @@ void h2p2_dbg_leds_event(led_event_t evt)
                 if (machine_is_omap_perseus2())
                         hw_led_state &= ~H2P2_DBG_FPGA_P2_LED_IDLE;
                 else {
-                        omap_set_gpio_dataout(GPIO_IDLE, 0);
+                        gpio_set_value(GPIO_IDLE, 0);
                         goto done;
                 }
 
diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c
index 98e789622dfd..499d7ad8697d 100644
--- a/arch/arm/mach-omap1/leds-osk.c
+++ b/arch/arm/mach-omap1/leds-osk.c
@@ -44,8 +44,8 @@ static void mistral_setled(void)
                 green = 1;
         /* else both sides are disabled */
 
-        omap_set_gpio_dataout(GPIO_LED_GREEN, green);
-        omap_set_gpio_dataout(GPIO_LED_RED, red);
+        gpio_set_value(GPIO_LED_GREEN, green);
+        gpio_set_value(GPIO_LED_RED, red);
 }
 
 #endif
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index 6cdad93c4a00..8cbf2562dcaa 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -47,14 +47,14 @@ omap_leds_init(void)
                  * that's a different kind of LED (just one color at a time).
                  */
                 omap_cfg_reg(P18_1610_GPIO3);
-                if (omap_request_gpio(3) == 0)
-                        omap_set_gpio_direction(3, 0);
+                if (gpio_request(3, "LED red") == 0)
+                        gpio_direction_output(3, 1);
                 else
                         printk(KERN_WARNING "LED: can't get GPIO3/red?\n");
 
                 omap_cfg_reg(MPUIO4);
-                if (omap_request_gpio(OMAP_MPUIO(4)) == 0)
-                        omap_set_gpio_direction(OMAP_MPUIO(4), 0);
+                if (gpio_request(OMAP_MPUIO(4), "LED green") == 0)
+                        gpio_direction_output(OMAP_MPUIO(4), 1);
                 else
                         printk(KERN_WARNING "LED: can't get MPUIO4/green?\n");
         }
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 770d256c790b..9774c1f5311e 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -226,7 +226,8 @@ void omap_pm_suspend(void)
 {
         unsigned long arg0 = 0, arg1 = 0;
 
-        printk("PM: OMAP%x is trying to enter deep sleep...\n", system_rev);
+        printk(KERN_INFO "PM: OMAP%x is trying to enter deep sleep...\n",
+                omap_rev());
 
         omap_serial_wake_trigger(1);
 
@@ -421,7 +422,8 @@ void omap_pm_suspend(void)
 
         omap_serial_wake_trigger(0);
 
-        printk("PM: OMAP%x is re-starting from deep sleep...\n", system_rev);
+        printk(KERN_INFO "PM: OMAP%x is re-starting from deep sleep...\n",
+                omap_rev());
 }
 
 #if defined(DEBUG) && defined(CONFIG_PROC_FS)
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 528691d5cb51..0002084e0655 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -244,22 +244,22 @@ static void __init omap_serial_set_port_wakeup(int gpio_nr)
 {
         int ret;
 
-        ret = omap_request_gpio(gpio_nr);
+        ret = gpio_request(gpio_nr, "UART wake");
         if (ret < 0) {
                 printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
                        gpio_nr);
                 return;
         }
-        omap_set_gpio_direction(gpio_nr, 1);
-        ret = request_irq(OMAP_GPIO_IRQ(gpio_nr), &omap_serial_wake_interrupt,
+        gpio_direction_input(gpio_nr);
+        ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
                           IRQF_TRIGGER_RISING, "serial wakeup", NULL);
         if (ret) {
-                omap_free_gpio(gpio_nr);
+                gpio_free(gpio_nr);
                 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
                        gpio_nr);
                 return;
         }
-        enable_irq_wake(OMAP_GPIO_IRQ(gpio_nr));
+        enable_irq_wake(gpio_to_irq(gpio_nr));
 }
 
 static int __init omap_serial_wakeup_init(void)
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 2cf7e32bd293..495a32c287b4 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -173,7 +173,7 @@ static __init void omap_init_mpu_timer(unsigned long rate)
         clockevent_mpu_timer1.min_delta_ns =
                 clockevent_delta2ns(1, &clockevent_mpu_timer1);
 
-        clockevent_mpu_timer1.cpumask = cpumask_of_cpu(0);
+        clockevent_mpu_timer1.cpumask = cpumask_of(0);
         clockevents_register_device(&clockevent_mpu_timer1);
 }
 
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 705367ece174..fd3f7396e162 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -187,7 +187,7 @@ static __init void omap_init_32k_timer(void)
         clockevent_32k_timer.min_delta_ns =
                 clockevent_delta2ns(1, &clockevent_32k_timer);
 
-        clockevent_32k_timer.cpumask = cpumask_of_cpu(0);
+        clockevent_32k_timer.cpumask = cpumask_of(0);
         clockevents_register_device(&clockevent_32k_timer);
 }
 
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 4832fcc7d04a..3754b79092ab 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -55,3 +55,7 @@ config MACH_OMAP_LDP
 config MACH_OVERO
         bool "Gumstix Overo board"
         depends on ARCH_OMAP3 && ARCH_OMAP34XX
+
+config MACH_OMAP3_PANDORA
+        bool "OMAP3 Pandora"
+        depends on ARCH_OMAP3 && ARCH_OMAP34XX
\ No newline at end of file
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c69392372c99..bbd12bc10fdc 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -27,9 +27,15 @@ obj-$(CONFIG_ARCH_OMAP3)		+= clock34xx.o
 # Specific board support
 obj-$(CONFIG_MACH_OMAP_GENERIC)         += board-generic.o
 obj-$(CONFIG_MACH_OMAP_H4)              += board-h4.o
-obj-$(CONFIG_MACH_OMAP_2430SDP)         += board-2430sdp.o
+obj-$(CONFIG_MACH_OMAP_2430SDP)         += board-2430sdp.o \
+                                           mmc-twl4030.o
 obj-$(CONFIG_MACH_OMAP_APOLLON)         += board-apollon.o
-obj-$(CONFIG_MACH_OMAP3_BEAGLE)         += board-omap3beagle.o
-obj-$(CONFIG_MACH_OMAP_LDP)             += board-ldp.o
-obj-$(CONFIG_MACH_OVERO)                += board-overo.o
+obj-$(CONFIG_MACH_OMAP3_BEAGLE)         += board-omap3beagle.o \
+                                           mmc-twl4030.o
+obj-$(CONFIG_MACH_OMAP_LDP)             += board-ldp.o \
+                                           mmc-twl4030.o
+obj-$(CONFIG_MACH_OVERO)                += board-overo.o \
+                                           mmc-twl4030.o
+obj-$(CONFIG_MACH_OMAP3_PANDORA)        += board-omap3pandora.o \
+                                           mmc-twl4030.o
 
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 24688efaa445..83fa37211d77 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/delay.h>
+#include <linux/i2c/twl4030.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/io.h>
@@ -35,6 +36,7 @@
 #include <mach/common.h>
 #include <mach/gpmc.h>
 
+#include "mmc-twl4030.h"
 
 #define SDP2430_FLASH_CS        0
 #define SDP2430_SMC91X_CS       5
@@ -168,13 +170,13 @@ static inline void __init sdp2430_init_smc91x(void)
         sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
         udelay(100);
 
-        if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) {
+        if (gpio_request(OMAP24XX_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
                 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
                         OMAP24XX_ETHR_GPIO_IRQ);
                 gpmc_cs_free(eth_cs);
                 goto out;
         }
-        omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1);
+        gpio_direction_input(OMAP24XX_ETHR_GPIO_IRQ);
 
 out:
         clk_disable(gpmc_fck);
@@ -197,12 +199,58 @@ static struct omap_board_config_kernel sdp2430_config[] = {
         {OMAP_TAG_UART, &sdp2430_uart_config},
 };
 
+
+static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
+        .gpio_base      = OMAP_MAX_GPIO_LINES,
+        .irq_base       = TWL4030_GPIO_IRQ_BASE,
+        .irq_end        = TWL4030_GPIO_IRQ_END,
+};
+
+static struct twl4030_platform_data sdp2430_twldata = {
+        .irq_base       = TWL4030_IRQ_BASE,
+        .irq_end        = TWL4030_IRQ_END,
+
+        /* platform_data for children goes here */
+        .gpio           = &sdp2430_gpio_data,
+};
+
+static struct i2c_board_info __initdata sdp2430_i2c_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("twl4030", 0x48),
+                .flags = I2C_CLIENT_WAKE,
+                .irq = INT_24XX_SYS_NIRQ,
+                .platform_data = &sdp2430_twldata,
+        },
+};
+
+static int __init omap2430_i2c_init(void)
+{
+        omap_register_i2c_bus(1, 400, NULL, 0);
+        omap_register_i2c_bus(2, 2600, sdp2430_i2c_boardinfo,
+                        ARRAY_SIZE(sdp2430_i2c_boardinfo));
+        return 0;
+}
+
+static struct twl4030_hsmmc_info mmc[] __initdata = {
+        {
+                .mmc            = 1,
+                .wires          = 4,
+                .gpio_cd        = -EINVAL,
+                .gpio_wp        = -EINVAL,
+                .ext_clock      = 1,
+        },
+        {}      /* Terminator */
+};
+
 static void __init omap_2430sdp_init(void)
 {
+        omap2430_i2c_init();
+
         platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
         omap_board_config = sdp2430_config;
         omap_board_config_size = ARRAY_SIZE(sdp2430_config);
         omap_serial_init();
+        twl4030_mmc_init(mmc);
 }
 
 static void __init omap_2430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 989ad152d7f8..bf1e5d32c2a3 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -236,13 +236,13 @@ static inline void __init apollon_init_smc91x(void)
         udelay(100);
 
         omap_cfg_reg(W4__24XX_GPIO74);
-        if (omap_request_gpio(APOLLON_ETHR_GPIO_IRQ) < 0) {
+        if (gpio_request(APOLLON_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
                 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
                         APOLLON_ETHR_GPIO_IRQ);
                 gpmc_cs_free(APOLLON_ETH_CS);
                 goto out;
         }
-        omap_set_gpio_direction(APOLLON_ETHR_GPIO_IRQ, 1);
+        gpio_direction_input(APOLLON_ETHR_GPIO_IRQ);
 
 out:
         clk_disable(gpmc_fck);
@@ -261,16 +261,6 @@ static struct omap_uart_config apollon_uart_config __initdata = {
         .enabled_uarts = (1 << 0) | (0 << 1) | (0 << 2),
 };
 
-static struct omap_mmc_config apollon_mmc_config __initdata = {
-        .mmc [0] = {
-                .enabled        = 1,
-                .wire4          = 1,
-                .wp_pin         = -1,
-                .power_pin      = -1,
-                .switch_pin     = -1,
-        },
-};
-
 static struct omap_usb_config apollon_usb_config __initdata = {
         .register_dev   = 1,
         .hmc_mode       = 0x14, /* 0:dev 1:host1 2:disable */
@@ -284,7 +274,6 @@ static struct omap_lcd_config apollon_lcd_config __initdata = {
 
 static struct omap_board_config_kernel apollon_config[] = {
         { OMAP_TAG_UART,        &apollon_uart_config },
-        { OMAP_TAG_MMC,         &apollon_mmc_config },
         { OMAP_TAG_USB,         &apollon_usb_config },
         { OMAP_TAG_LCD,         &apollon_lcd_config },
 };
@@ -327,15 +316,15 @@ static void __init apollon_sw_init(void)
         /* Enter SW - Y11 */
         omap_cfg_reg(Y11_242X_GPIO16);
         omap_request_gpio(SW_ENTER_GPIO16);
-        omap_set_gpio_direction(SW_ENTER_GPIO16, 1);
+        gpio_direction_input(SW_ENTER_GPIO16);
         /* Up SW - AA12 */
         omap_cfg_reg(AA12_242X_GPIO17);
         omap_request_gpio(SW_UP_GPIO17);
-        omap_set_gpio_direction(SW_UP_GPIO17, 1);
+        gpio_direction_input(SW_UP_GPIO17);
         /* Down SW - AA8 */
         omap_cfg_reg(AA8_242X_GPIO58);
         omap_request_gpio(SW_DOWN_GPIO58);
-        omap_set_gpio_direction(SW_DOWN_GPIO58, 1);
+        gpio_direction_input(SW_DOWN_GPIO58);
 
         set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING);
         if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
@@ -359,9 +348,8 @@ static void __init apollon_usb_init(void)
         /* USB device */
         /* DEVICE_SUSPEND */
         omap_cfg_reg(P21_242X_GPIO12);
-        omap_request_gpio(12);
-        omap_set_gpio_direction(12, 0);         /* OUT */
-        omap_set_gpio_dataout(12, 0);
+        gpio_request(12, "USB suspend");
+        gpio_direction_output(12, 0);
 }
 
 static void __init omap_apollon_init(void)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 9ba097868e72..3b34c20d1df4 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -41,19 +41,8 @@ static struct omap_uart_config generic_uart_config __initdata = {
         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
 
-static struct omap_mmc_config generic_mmc_config __initdata = {
-        .mmc [0] = {
-                .enabled        = 0,
-                .wire4          = 0,
-                .wp_pin         = -1,
-                .power_pin      = -1,
-                .switch_pin     = -1,
-        },
-};
-
 static struct omap_board_config_kernel generic_config[] = {
         { OMAP_TAG_UART,        &generic_uart_config },
-        { OMAP_TAG_MMC,         &generic_mmc_config },
 };
 
 static void __init omap_generic_init(void)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 2fef2c845083..5e9b14675b1e 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -19,6 +19,7 @@
 #include <linux/delay.h>
 #include <linux/workqueue.h>
 #include <linux/i2c.h>
+#include <linux/i2c/at24.h>
 #include <linux/input.h>
 #include <linux/err.h>
 #include <linux/clk.h>
@@ -372,31 +373,33 @@ static struct omap_uart_config h4_uart_config __initdata = {
         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
 
-static struct omap_mmc_config h4_mmc_config __initdata = {
-        .mmc [0] = {
-                .enabled        = 1,
-                .wire4          = 1,
-                .wp_pin         = -1,
-                .power_pin      = -1,
-                .switch_pin     = -1,
-        },
-};
-
 static struct omap_lcd_config h4_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel h4_config[] = {
         { OMAP_TAG_UART,        &h4_uart_config },
-        { OMAP_TAG_MMC,         &h4_mmc_config },
         { OMAP_TAG_LCD,         &h4_lcd_config },
 };
 
+static struct at24_platform_data m24c01 = {
+        .byte_len       = SZ_1K / 8,
+        .page_size      = 16,
+};
+
 static struct i2c_board_info __initdata h4_i2c_board_info[] = {
         {
                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
                 .irq            = OMAP_GPIO_IRQ(125),
         },
+        {       /* EEPROM on mainboard */
+                I2C_BOARD_INFO("24c01", 0x52),
+                .platform_data  = &m24c01,
+        },
+        {       /* EEPROM on cpu card */
+                I2C_BOARD_INFO("24c01", 0x57),
+                .platform_data  = &m24c01,
+        },
 };
 
 static void __init omap_h4_init(void)
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 1ea59986aa7a..aa6972781e4a 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -21,6 +21,7 @@
 #include <linux/clk.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
+#include <linux/i2c/twl4030.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -38,11 +39,69 @@
 #include <asm/delay.h>
 #include <mach/control.h>
 
+#include "mmc-twl4030.h"
+
+#define SDP3430_SMC91X_CS       3
+
+static struct resource ldp_smc911x_resources[] = {
+        [0] = {
+                .start  = OMAP34XX_ETHR_START,
+                .end    = OMAP34XX_ETHR_START + SZ_4K,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 0,
+                .end    = 0,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+        },
+};
+
+static struct platform_device ldp_smc911x_device = {
+        .name           = "smc911x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(ldp_smc911x_resources),
+        .resource       = ldp_smc911x_resources,
+};
+
+static struct platform_device *ldp_devices[] __initdata = {
+        &ldp_smc911x_device,
+};
+
+static inline void __init ldp_init_smc911x(void)
+{
+        int eth_cs;
+        unsigned long cs_mem_base;
+        int eth_gpio = 0;
+
+        eth_cs = LDP_SMC911X_CS;
+
+        if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
+                printk(KERN_ERR "Failed to request GPMC mem for smc911x\n");
+                return;
+        }
+
+        ldp_smc911x_resources[0].start = cs_mem_base + 0x0;
+        ldp_smc911x_resources[0].end   = cs_mem_base + 0xf;
+        udelay(100);
+
+        eth_gpio = LDP_SMC911X_GPIO;
+
+        ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio);
+
+        if (omap_request_gpio(eth_gpio) < 0) {
+                printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n",
+                                eth_gpio);
+                return;
+        }
+        gpio_direction_input(eth_gpio);
+}
+
 static void __init omap_ldp_init_irq(void)
 {
         omap2_init_common_hw();
         omap_init_irq();
         omap_gpio_init();
+        ldp_init_smc911x();
 }
 
 static struct omap_uart_config ldp_uart_config __initdata = {
@@ -53,20 +112,56 @@ static struct omap_board_config_kernel ldp_config[] __initdata = {
         { OMAP_TAG_UART,        &ldp_uart_config },
 };
 
+static struct twl4030_gpio_platform_data ldp_gpio_data = {
+        .gpio_base      = OMAP_MAX_GPIO_LINES,
+        .irq_base       = TWL4030_GPIO_IRQ_BASE,
+        .irq_end        = TWL4030_GPIO_IRQ_END,
+};
+
+static struct twl4030_platform_data ldp_twldata = {
+        .irq_base       = TWL4030_IRQ_BASE,
+        .irq_end        = TWL4030_IRQ_END,
+
+        /* platform_data for children goes here */
+        .gpio           = &ldp_gpio_data,
+};
+
+static struct i2c_board_info __initdata ldp_i2c_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("twl4030", 0x48),
+                .flags = I2C_CLIENT_WAKE,
+                .irq = INT_34XX_SYS_NIRQ,
+                .platform_data = &ldp_twldata,
+        },
+};
+
 static int __init omap_i2c_init(void)
 {
-        omap_register_i2c_bus(1, 2600, NULL, 0);
+        omap_register_i2c_bus(1, 2600, ldp_i2c_boardinfo,
+                        ARRAY_SIZE(ldp_i2c_boardinfo));
         omap_register_i2c_bus(2, 400, NULL, 0);
         omap_register_i2c_bus(3, 400, NULL, 0);
         return 0;
 }
 
+static struct twl4030_hsmmc_info mmc[] __initdata = {
+        {
+                .mmc            = 1,
+                .wires          = 4,
+                .gpio_cd        = -EINVAL,
+                .gpio_wp        = -EINVAL,
+        },
+        {}      /* Terminator */
+};
+
 static void __init omap_ldp_init(void)
 {
         omap_i2c_init();
+        platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
         omap_board_config = ldp_config;
         omap_board_config_size = ARRAY_SIZE(ldp_config);
         omap_serial_init();
+        twl4030_mmc_init(mmc);
 }
 
 static void __init omap_ldp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index baa79674e9d5..9e5ada01b5fa 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -38,7 +38,9 @@
 #include <mach/common.h>
 #include <mach/gpmc.h>
 #include <mach/nand.h>
+#include <mach/mux.h>
 
+#include "mmc-twl4030.h"
 
 #define GPMC_CS0_BASE  0x60
 #define GPMC_CS_SIZE   0x30
@@ -103,6 +105,78 @@ static struct omap_uart_config omap3_beagle_uart_config __initdata = {
         .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
 
+static struct twl4030_hsmmc_info mmc[] = {
+        {
+                .mmc            = 1,
+                .wires          = 8,
+                .gpio_wp        = 29,
+        },
+        {}      /* Terminator */
+};
+
+static struct gpio_led gpio_leds[];
+
+static int beagle_twl_gpio_setup(struct device *dev,
+                unsigned gpio, unsigned ngpio)
+{
+        /* gpio + 0 is "mmc0_cd" (input/IRQ) */
+
+        /* REVISIT: need ehci-omap hooks for external VBUS
+         * power switch and overcurrent detect
+         */
+
+        gpio_request(gpio + 1, "EHCI_nOC");
+        gpio_direction_input(gpio + 1);
+
+        /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
+        gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
+        gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
+
+        /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
+        gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
+
+        return 0;
+}
+
+static struct twl4030_gpio_platform_data beagle_gpio_data = {
+        .gpio_base      = OMAP_MAX_GPIO_LINES,
+        .irq_base       = TWL4030_GPIO_IRQ_BASE,
+        .irq_end        = TWL4030_GPIO_IRQ_END,
+        .use_leds       = true,
+        .pullups        = BIT(1),
+        .pulldowns      = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
+                                | BIT(15) | BIT(16) | BIT(17),
+        .setup          = beagle_twl_gpio_setup,
+};
+
+static struct twl4030_platform_data beagle_twldata = {
+        .irq_base       = TWL4030_IRQ_BASE,
+        .irq_end        = TWL4030_IRQ_END,
+
+        /* platform_data for children goes here */
+        .gpio           = &beagle_gpio_data,
+};
+
+static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("twl4030", 0x48),
+                .flags = I2C_CLIENT_WAKE,
+                .irq = INT_34XX_SYS_NIRQ,
+                .platform_data = &beagle_twldata,
+        },
+};
+
+static int __init omap3_beagle_i2c_init(void)
+{
+        omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo,
+                        ARRAY_SIZE(beagle_i2c_boardinfo));
+#ifdef CONFIG_I2C2_OMAP_BEAGLE
+        omap_register_i2c_bus(2, 400, NULL, 0);
+#endif
+        omap_register_i2c_bus(3, 400, NULL, 0);
+        return 0;
+}
+
 static void __init omap3_beagle_init_irq(void)
 {
         omap2_init_common_hw();
@@ -130,6 +204,11 @@ static struct gpio_led gpio_leds[] = {
                 .default_trigger        = "mmc0",
                 .gpio                   = 149,
         },
+        {
+                .name                   = "beagleboard::pmu_stat",
+                .gpio                   = -EINVAL,      /* gets replaced */
+                .active_low             = true,
+        },
 };
 
 static struct gpio_led_platform_data gpio_led_info = {
@@ -218,11 +297,22 @@ static void __init omap3beagle_flash_init(void)
 
 static void __init omap3_beagle_init(void)
 {
+        omap3_beagle_i2c_init();
         platform_add_devices(omap3_beagle_devices,
                         ARRAY_SIZE(omap3_beagle_devices));
         omap_board_config = omap3_beagle_config;
         omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
         omap_serial_init();
+
+        omap_cfg_reg(AH8_34XX_GPIO29);
+        mmc[0].gpio_cd = gpio + 0;
+        twl4030_mmc_init(mmc);
+
+        omap_cfg_reg(J25_34XX_GPIO170);
+        gpio_request(170, "DVI_nPD");
+        /* REVISIT leave DVI powered down until it's needed ... */
+        gpio_direction_output(170, true);
+
         omap3beagle_flash_init();
 }
 
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
new file mode 100644
index 000000000000..b3196107afdb
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -0,0 +1,212 @@
+/*
+ * board-omap3pandora.c (Pandora Handheld Console)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/i2c/twl4030.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/board.h>
+#include <mach/common.h>
+#include <mach/gpio.h>
+#include <mach/hardware.h>
+#include <mach/mcspi.h>
+
+#include "mmc-twl4030.h"
+
+#define OMAP3_PANDORA_TS_GPIO           94
+
+static struct twl4030_hsmmc_info omap3pandora_mmc[] = {
+        {
+                .mmc            = 1,
+                .wires          = 4,
+                .gpio_cd        = -EINVAL,
+                .gpio_wp        = 126,
+                .ext_clock      = 0,
+        },
+        {
+                .mmc            = 2,
+                .wires          = 4,
+                .gpio_cd        = -EINVAL,
+                .gpio_wp        = 127,
+                .ext_clock      = 1,
+        },
+        {}      /* Terminator */
+};
+
+static struct omap_uart_config omap3pandora_uart_config __initdata = {
+        .enabled_uarts  = (1 << 2), /* UART3 */
+};
+
+static int omap3pandora_twl_gpio_setup(struct device *dev,
+                unsigned gpio, unsigned ngpio)
+{
+        /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */
+        omap3pandora_mmc[0].gpio_cd = gpio + 0;
+        omap3pandora_mmc[1].gpio_cd = gpio + 1;
+        twl4030_mmc_init(omap3pandora_mmc);
+
+        return 0;
+}
+
+static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
+        .gpio_base      = OMAP_MAX_GPIO_LINES,
+        .irq_base       = TWL4030_GPIO_IRQ_BASE,
+        .irq_end        = TWL4030_GPIO_IRQ_END,
+        .setup          = omap3pandora_twl_gpio_setup,
+};
+
+static struct twl4030_usb_data omap3pandora_usb_data = {
+        .usb_mode       = T2_USB_MODE_ULPI,
+};
+
+static struct twl4030_platform_data omap3pandora_twldata = {
+        .irq_base       = TWL4030_IRQ_BASE,
+        .irq_end        = TWL4030_IRQ_END,
+        .gpio           = &omap3pandora_gpio_data,
+        .usb            = &omap3pandora_usb_data,
+};
+
+static struct i2c_board_info __initdata omap3pandora_i2c_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("tps65950", 0x48),
+                .flags = I2C_CLIENT_WAKE,
+                .irq = INT_34XX_SYS_NIRQ,
+                .platform_data = &omap3pandora_twldata,
+        },
+};
+
+static int __init omap3pandora_i2c_init(void)
+{
+        omap_register_i2c_bus(1, 2600, omap3pandora_i2c_boardinfo,
+                        ARRAY_SIZE(omap3pandora_i2c_boardinfo));
+        /* i2c2 pins are not connected */
+        omap_register_i2c_bus(3, 400, NULL, 0);
+        return 0;
+}
+
+static void __init omap3pandora_init_irq(void)
+{
+        omap2_init_common_hw();
+        omap_init_irq();
+        omap_gpio_init();
+}
+
+static void __init omap3pandora_ads7846_init(void)
+{
+        int gpio = OMAP3_PANDORA_TS_GPIO;
+        int ret;
+
+        ret = gpio_request(gpio, "ads7846_pen_down");
+        if (ret < 0) {
+                printk(KERN_ERR "Failed to request GPIO %d for "
+                                "ads7846 pen down IRQ\n", gpio);
+                return;
+        }
+
+        gpio_direction_input(gpio);
+}
+
+static int ads7846_get_pendown_state(void)
+{
+        return !gpio_get_value(OMAP3_PANDORA_TS_GPIO);
+}
+
+static struct ads7846_platform_data ads7846_config = {
+        .x_max                  = 0x0fff,
+        .y_max                  = 0x0fff,
+        .x_plate_ohms           = 180,
+        .pressure_max           = 255,
+        .debounce_max           = 10,
+        .debounce_tol           = 3,
+        .debounce_rep           = 1,
+        .get_pendown_state      = ads7846_get_pendown_state,
+        .keep_vref_on           = 1,
+};
+
+static struct omap2_mcspi_device_config ads7846_mcspi_config = {
+        .turbo_mode     = 0,
+        .single_channel = 1,    /* 0: slave, 1: master */
+};
+
+static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
+        {
+                .modalias               = "ads7846",
+                .bus_num                = 1,
+                .chip_select            = 0,
+                .max_speed_hz           = 1500000,
+                .controller_data        = &ads7846_mcspi_config,
+                .irq                    = OMAP_GPIO_IRQ(OMAP3_PANDORA_TS_GPIO),
+                .platform_data          = &ads7846_config,
+        }
+};
+
+static struct platform_device omap3pandora_lcd_device = {
+        .name           = "pandora_lcd",
+        .id             = -1,
+};
+
+static struct omap_lcd_config omap3pandora_lcd_config __initdata = {
+        .ctrl_name      = "internal",
+};
+
+static struct omap_board_config_kernel omap3pandora_config[] __initdata = {
+        { OMAP_TAG_UART,        &omap3pandora_uart_config },
+        { OMAP_TAG_LCD,         &omap3pandora_lcd_config },
+};
+
+static struct platform_device *omap3pandora_devices[] __initdata = {
+        &omap3pandora_lcd_device,
+};
+
+static void __init omap3pandora_init(void)
+{
+        omap3pandora_i2c_init();
+        platform_add_devices(omap3pandora_devices,
+                        ARRAY_SIZE(omap3pandora_devices));
+        omap_board_config = omap3pandora_config;
+        omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
+        omap_serial_init();
+        spi_register_board_info(omap3pandora_spi_board_info,
+                        ARRAY_SIZE(omap3pandora_spi_board_info));
+        omap3pandora_ads7846_init();
+}
+
+static void __init omap3pandora_map_io(void)
+{
+        omap2_set_globals_343x();
+        omap2_map_common_io();
+}
+
+MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = omap3pandora_map_io,
+        .init_irq       = omap3pandora_init_irq,
+        .init_machine   = omap3pandora_init,
+        .timer          = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index e09aa59a399c..82b3dc557c96 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -26,6 +26,7 @@
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/i2c/twl4030.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -44,6 +45,8 @@
 #include <mach/hardware.h>
 #include <mach/nand.h>
 
+#include "mmc-twl4030.h"
+
 #define NAND_BLOCK_SIZE SZ_128K
 #define GPMC_CS0_BASE  0x60
 #define GPMC_CS_SIZE   0x30
@@ -139,8 +142,31 @@ static struct omap_uart_config overo_uart_config __initdata = {
         .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
 
+static struct twl4030_gpio_platform_data overo_gpio_data = {
+        .gpio_base      = OMAP_MAX_GPIO_LINES,
+        .irq_base       = TWL4030_GPIO_IRQ_BASE,
+        .irq_end        = TWL4030_GPIO_IRQ_END,
+};
+
+static struct twl4030_platform_data overo_twldata = {
+        .irq_base       = TWL4030_IRQ_BASE,
+        .irq_end        = TWL4030_IRQ_END,
+        .gpio           = &overo_gpio_data,
+};
+
+static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("twl4030", 0x48),
+                .flags = I2C_CLIENT_WAKE,
+                .irq = INT_34XX_SYS_NIRQ,
+                .platform_data = &overo_twldata,
+        },
+};
+
 static int __init overo_i2c_init(void)
 {
+        omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo,
+                        ARRAY_SIZE(overo_i2c_boardinfo));
         /* i2c2 pins are used for gpio */
         omap_register_i2c_bus(3, 400, NULL, 0);
         return 0;
@@ -171,6 +197,22 @@ static struct platform_device *overo_devices[] __initdata = {
         &overo_lcd_device,
 };
 
+static struct twl4030_hsmmc_info mmc[] __initdata = {
+        {
+                .mmc            = 1,
+                .wires          = 4,
+                .gpio_cd        = -EINVAL,
+                .gpio_wp        = -EINVAL,
+        },
+        {
+                .mmc            = 2,
+                .wires          = 4,
+                .gpio_cd        = -EINVAL,
+                .gpio_wp        = -EINVAL,
+        },
+        {}      /* Terminator */
+};
+
 static void __init overo_init(void)
 {
         overo_i2c_init();
@@ -178,6 +220,7 @@ static void __init overo_init(void)
         omap_board_config = overo_config;
         omap_board_config_size = ARRAY_SIZE(overo_config);
         omap_serial_init();
+        twl4030_mmc_init(mmc);
         overo_flash_init();
 
         if ((gpio_request(OVERO_GPIO_W2W_NRESET,
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 242a19d86ccd..ad6d98d177c5 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -2321,7 +2321,7 @@ static struct clk i2c2_fck = {
 };
 
 static struct clk i2chs2_fck = {
-        .name           = "i2chs_fck",
+        .name           = "i2c_fck",
         .id             = 2,
         .parent         = &func_96m_ck,
         .flags          = CLOCK_IN_OMAP243X,
@@ -2354,7 +2354,7 @@ static struct clk i2c1_fck = {
 };
 
 static struct clk i2chs1_fck = {
-        .name           = "i2chs_fck",
+        .name           = "i2c_fck",
         .id             = 1,
         .parent         = &func_96m_ck,
         .flags          = CLOCK_IN_OMAP243X,
@@ -2522,7 +2522,6 @@ static struct clk usbhs_ick = {
 
 static struct clk mmchs1_ick = {
         .name           = "mmchs_ick",
-        .id             = 1,
         .parent         = &l4_ck,
         .flags          = CLOCK_IN_OMAP243X,
         .clkdm_name     = "core_l4_clkdm",
@@ -2533,7 +2532,6 @@ static struct clk mmchs1_ick = {
 
 static struct clk mmchs1_fck = {
         .name           = "mmchs_fck",
-        .id             = 1,
         .parent         = &func_96m_ck,
         .flags          = CLOCK_IN_OMAP243X,
         .clkdm_name     = "core_l3_clkdm",
@@ -2544,7 +2542,7 @@ static struct clk mmchs1_fck = {
 
 static struct clk mmchs2_ick = {
         .name           = "mmchs_ick",
-        .id             = 2,
+        .id             = 1,
         .parent         = &l4_ck,
         .flags          = CLOCK_IN_OMAP243X,
         .clkdm_name     = "core_l4_clkdm",
@@ -2555,7 +2553,7 @@ static struct clk mmchs2_ick = {
 
 static struct clk mmchs2_fck = {
         .name           = "mmchs_fck",
-        .id             = 2,
+        .id             = 1,
         .parent         = &func_96m_ck,
         .flags          = CLOCK_IN_OMAP243X,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
@@ -2595,7 +2593,6 @@ static struct clk mdm_intc_ick = {
 
 static struct clk mmchsdb1_fck = {
         .name           = "mmchsdb_fck",
-        .id             = 1,
         .parent         = &func_32k_ck,
         .flags          = CLOCK_IN_OMAP243X,
         .clkdm_name     = "core_l4_clkdm",
@@ -2606,7 +2603,7 @@ static struct clk mmchsdb1_fck = {
 
 static struct clk mmchsdb2_fck = {
         .name           = "mmchsdb_fck",
-        .id             = 2,
+        .id             = 1,
         .parent         = &func_32k_ck,
         .flags          = CLOCK_IN_OMAP243X,
         .clkdm_name     = "core_l4_clkdm",
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 084e11082f80..31bb7010bd48 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -475,7 +475,7 @@ int __init omap2_clk_init(void)
                  * Update this if there are further clock changes between ES2
                  * and production parts
                  */
-                if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) {
+                if (omap_rev() == OMAP3430_REV_ES1_0) {
                         /* No 3430ES1-only rates exist, so no RATE_IN_3430ES1 */
                         cpu_clkflg |= CLOCK_IN_OMAP3430ES1;
                 } else {
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index c38a8a09692f..a826094d89b5 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1374,7 +1374,7 @@ static struct clk core_96m_fck = {
 
 static struct clk mmchs3_fck = {
         .name           = "mmchs_fck",
-        .id             = 3,
+        .id             = 2,
         .parent         = &core_96m_fck,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
         .enable_bit     = OMAP3430ES2_EN_MMC3_SHIFT,
@@ -1385,7 +1385,7 @@ static struct clk mmchs3_fck = {
 
 static struct clk mmchs2_fck = {
         .name           = "mmchs_fck",
-        .id             = 2,
+        .id             = 1,
         .parent         = &core_96m_fck,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
         .enable_bit     = OMAP3430_EN_MMC2_SHIFT,
@@ -1406,7 +1406,6 @@ static struct clk mspro_fck = {
 
 static struct clk mmchs1_fck = {
         .name           = "mmchs_fck",
-        .id             = 1,
         .parent         = &core_96m_fck,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
         .enable_bit     = OMAP3430_EN_MMC1_SHIFT,
@@ -1722,7 +1721,7 @@ static struct clk usbtll_ick = {
 
 static struct clk mmchs3_ick = {
         .name           = "mmchs_ick",
-        .id             = 3,
+        .id             = 2,
         .parent         = &core_l4_ick,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
         .enable_bit     = OMAP3430ES2_EN_MMC3_SHIFT,
@@ -1774,7 +1773,7 @@ static struct clk des2_ick = {
 
 static struct clk mmchs2_ick = {
         .name           = "mmchs_ick",
-        .id             = 2,
+        .id             = 1,
         .parent         = &core_l4_ick,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
         .enable_bit     = OMAP3430_EN_MMC2_SHIFT,
@@ -1785,7 +1784,6 @@ static struct clk mmchs2_ick = {
 
 static struct clk mmchs1_ick = {
         .name           = "mmchs_ick",
-        .id             = 1,
         .parent         = &core_l4_ick,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
         .enable_bit     = OMAP3430_EN_MMC1_SHIFT,
@@ -2280,8 +2278,8 @@ static struct clk wkup_32k_fck = {
         .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio1_fck = {
-        .name           = "gpio1_fck",
+static struct clk gpio1_dbck = {
+        .name           = "gpio1_dbck",
         .parent         = &wkup_32k_fck,
         .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO1_SHIFT,
@@ -2527,8 +2525,8 @@ static struct clk per_32k_alwon_fck = {
         .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio6_fck = {
-        .name           = "gpio6_fck",
+static struct clk gpio6_dbck = {
+        .name           = "gpio6_dbck",
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO6_SHIFT,
@@ -2537,8 +2535,8 @@ static struct clk gpio6_fck = {
         .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio5_fck = {
-        .name           = "gpio5_fck",
+static struct clk gpio5_dbck = {
+        .name           = "gpio5_dbck",
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO5_SHIFT,
@@ -2547,8 +2545,8 @@ static struct clk gpio5_fck = {
         .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio4_fck = {
-        .name           = "gpio4_fck",
+static struct clk gpio4_dbck = {
+        .name           = "gpio4_dbck",
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO4_SHIFT,
@@ -2557,8 +2555,8 @@ static struct clk gpio4_fck = {
         .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio3_fck = {
-        .name           = "gpio3_fck",
+static struct clk gpio3_dbck = {
+        .name           = "gpio3_dbck",
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO3_SHIFT,
@@ -2567,8 +2565,8 @@ static struct clk gpio3_fck = {
         .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio2_fck = {
-        .name           = "gpio2_fck",
+static struct clk gpio2_dbck = {
+        .name           = "gpio2_dbck",
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO2_SHIFT,
@@ -3170,7 +3168,7 @@ static struct clk *onchip_34xx_clks[] __initdata = {
         &usim_fck,
         &gpt1_fck,
         &wkup_32k_fck,
-        &gpio1_fck,
+        &gpio1_dbck,
         &wdt2_fck,
         &wkup_l4_ick,
         &usim_ick,
@@ -3192,11 +3190,11 @@ static struct clk *onchip_34xx_clks[] __initdata = {
         &gpt8_fck,
         &gpt9_fck,
         &per_32k_alwon_fck,
-        &gpio6_fck,
-        &gpio5_fck,
-        &gpio4_fck,
-        &gpio3_fck,
-        &gpio2_fck,
+        &gpio6_dbck,
+        &gpio5_dbck,
+        &gpio4_dbck,
+        &gpio3_dbck,
+        &gpio2_dbck,
         &wdt3_fck,
         &per_l4_ick,
         &gpio6_ick,
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 90af2ac469aa..9d7216ff6c9f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -14,16 +14,19 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/clk.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 
+#include <mach/control.h>
 #include <mach/tc.h>
 #include <mach/board.h>
 #include <mach/mux.h>
 #include <mach/gpio.h>
 #include <mach/eac.h>
+#include <mach/mmc.h>
 
 #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
 #define OMAP2_MBOX_BASE         IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
@@ -295,6 +298,171 @@ static void omap_init_sha1_md5(void)
 static inline void omap_init_sha1_md5(void) { }
 #endif
 
+/*-------------------------------------------------------------------------*/
+
+#ifdef CONFIG_ARCH_OMAP3
+
+#define MMCHS_SYSCONFIG                 0x0010
+#define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
+#define MMCHS_SYSSTATUS                 0x0014
+#define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
+
+static struct platform_device dummy_pdev = {
+        .dev = {
+                .bus = &platform_bus_type,
+        },
+};
+
+/**
+ * omap_hsmmc_reset() - Full reset of each HS-MMC controller
+ *
+ * Ensure that each MMC controller is fully reset.  Controllers
+ * left in an unknown state (by bootloader) may prevent retention
+ * or OFF-mode.  This is especially important in cases where the
+ * MMC driver is not enabled, _or_ built as a module.
+ *
+ * In order for reset to work, interface, functional and debounce
+ * clocks must be enabled.  The debounce clock comes from func_32k_clk
+ * and is not under SW control, so we only enable i- and f-clocks.
+ **/
+static void __init omap_hsmmc_reset(void)
+{
+        u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC :
+                OMAP24XX_NR_MMC;
+
+        for (i = 0; i < nr_controllers; i++) {
+                u32 v, base = 0;
+                struct clk *iclk, *fclk;
+                struct device *dev = &dummy_pdev.dev;
+
+                switch (i) {
+                case 0:
+                        base = OMAP2_MMC1_BASE;
+                        break;
+                case 1:
+                        base = OMAP2_MMC2_BASE;
+                        break;
+                case 2:
+                        base = OMAP3_MMC3_BASE;
+                        break;
+                }
+
+                dummy_pdev.id = i;
+                iclk = clk_get(dev, "mmchs_ick");
+                if (iclk && clk_enable(iclk))
+                        iclk = NULL;
+
+                fclk = clk_get(dev, "mmchs_fck");
+                if (fclk && clk_enable(fclk))
+                        fclk = NULL;
+
+                if (!iclk || !fclk) {
+                        printk(KERN_WARNING
+                               "%s: Unable to enable clocks for MMC%d, "
+                               "cannot reset.\n",  __func__, i);
+                        break;
+                }
+
+                omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
+                v = omap_readl(base + MMCHS_SYSSTATUS);
+                while (!(omap_readl(base + MMCHS_SYSSTATUS) &
+                         MMCHS_SYSSTATUS_RESETDONE))
+                        cpu_relax();
+
+                if (fclk) {
+                        clk_disable(fclk);
+                        clk_put(fclk);
+                }
+                if (iclk) {
+                        clk_disable(iclk);
+                        clk_put(iclk);
+                }
+        }
+}
+#else
+static inline void omap_hsmmc_reset(void) {}
+#endif
+
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
+        defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
+
+static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
+                        int controller_nr)
+{
+        if (cpu_is_omap2420() && controller_nr == 0) {
+                omap_cfg_reg(H18_24XX_MMC_CMD);
+                omap_cfg_reg(H15_24XX_MMC_CLKI);
+                omap_cfg_reg(G19_24XX_MMC_CLKO);
+                omap_cfg_reg(F20_24XX_MMC_DAT0);
+                omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
+                omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
+                if (mmc_controller->slots[0].wires == 4) {
+                        omap_cfg_reg(H14_24XX_MMC_DAT1);
+                        omap_cfg_reg(E19_24XX_MMC_DAT2);
+                        omap_cfg_reg(D19_24XX_MMC_DAT3);
+                        omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
+                        omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
+                        omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
+                }
+
+                /*
+                 * Use internal loop-back in MMC/SDIO Module Input Clock
+                 * selection
+                 */
+                if (mmc_controller->slots[0].internal_clock) {
+                        u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+                        v |= (1 << 24);
+                        omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
+                }
+        }
+}
+
+void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                        int nr_controllers)
+{
+        int i;
+
+        for (i = 0; i < nr_controllers; i++) {
+                unsigned long base, size;
+                unsigned int irq = 0;
+
+                if (!mmc_data[i])
+                        continue;
+
+                omap2_mmc_mux(mmc_data[i], i);
+
+                switch (i) {
+                case 0:
+                        base = OMAP2_MMC1_BASE;
+                        irq = INT_24XX_MMC_IRQ;
+                        break;
+                case 1:
+                        base = OMAP2_MMC2_BASE;
+                        irq = INT_24XX_MMC2_IRQ;
+                        break;
+                case 2:
+                        if (!cpu_is_omap34xx())
+                                return;
+                        base = OMAP3_MMC3_BASE;
+                        irq = INT_34XX_MMC3_IRQ;
+                        break;
+                default:
+                        continue;
+                }
+
+                if (cpu_is_omap2420())
+                        size = OMAP2420_MMC_SIZE;
+                else
+                        size = HSMMC_SIZE;
+
+                omap_mmc_add(i, base, size, irq, mmc_data[i]);
+        };
+}
+
+#endif
+
+/*-------------------------------------------------------------------------*/
+
 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 #define OMAP_HDQ_BASE   0x480B2000
@@ -334,6 +502,7 @@ static int __init omap2_init_devices(void)
         /* please keep these calls, and their implementations above,
          * in alphabetical order so they're easier to sort through.
          */
+        omap_hsmmc_reset();
         omap_init_mbox();
         omap_init_mcspi();
         omap_hdq_init();
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index bf45ff39a7b5..b0f8e7d62798 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -22,40 +22,15 @@
 #include <mach/control.h>
 #include <mach/cpu.h>
 
-static u32 class;
-static void __iomem *tap_base;
-static u16 tap_prod_id;
-
-#define OMAP_TAP_IDCODE         0x0204
-#define OMAP_TAP_DIE_ID_0       0x0218
-#define OMAP_TAP_DIE_ID_1       0x021C
-#define OMAP_TAP_DIE_ID_2       0x0220
-#define OMAP_TAP_DIE_ID_3       0x0224
-
-/* system_rev fields for OMAP2 processors:
- *   CPU id bits     [31:16],
- *   CPU device type [15:12], (unprg,normal,POP)
- *   CPU revision    [11:08]
- *   CPU class bits  [07:00]
- */
-
-struct omap_id {
-        u16     hawkeye;        /* Silicon type (Hawkeye id) */
-        u8      dev;            /* Device type from production_id reg */
-        u32     type;           /* combined type id copied to system_rev */
-};
+static struct omap_chip_id omap_chip;
+static unsigned int omap_revision;
 
-/* Register values to detect the OMAP version */
-static struct omap_id omap_ids[] __initdata = {
-        { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200000 },
-        { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201000 },
-        { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202000 },
-        { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220000 },
-        { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230000 },
-        { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 },
-};
 
-static struct omap_chip_id omap_chip;
+unsigned int omap_rev(void)
+{
+        return omap_revision;
+}
+EXPORT_SYMBOL(omap_rev);
 
 /**
  * omap_chip_is - test whether currently running OMAP matches a chip type
@@ -70,135 +45,41 @@ int omap_chip_is(struct omap_chip_id oci)
 }
 EXPORT_SYMBOL(omap_chip_is);
 
-static u32 __init read_tap_reg(int reg)
-{
-        unsigned int regval = 0;
-        u32 cpuid;
-
-        /* Reading the IDCODE register on 3430 ES1 results in a
-         * data abort as the register is not exposed on the OCP
-         * Hence reading the Cortex Rev
-         */
-        cpuid = read_cpuid(CPUID_ID);
-
-        /* If the processor type is Cortex-A8 and the revision is 0x0
-         * it means its Cortex r0p0 which is 3430 ES1
-         */
-        if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) {
-
-                if (reg == tap_prod_id) {
-                        regval = 0x000F00F0;
-                        goto out;
-                }
-
-                switch (reg) {
-                case OMAP_TAP_IDCODE  : regval = 0x0B7AE02F; break;
-                /* Making DevType as 0xF in ES1 to differ from ES2 */
-                case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break;
-                case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break;
-                case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break;
-                case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break;
-                }
-        } else
-                regval = __raw_readl(tap_base + reg);
-
-out:
-        return regval;
-
-}
+/*----------------------------------------------------------------------------*/
 
-/*
- * _set_system_rev - set the system_rev global based on current OMAP chip type
- *
- * Set the system_rev global.  This is primarily used by the cpu_is_omapxxxx()
- * macros.
- */
-static void __init _set_system_rev(u32 type, u8 rev)
-{
-        u32 i, ctrl_status;
-
-        /*
-         * system_rev encoding is as follows
-         * system_rev & 0xff000000 -> Omap Class (24xx/34xx)
-         * system_rev & 0xfff00000 -> Omap Sub Class (242x/343x)
-         * system_rev & 0xffff0000 -> Omap type (2420/2422/2423/2430/3430)
-         * system_rev & 0x0000f000 -> Silicon revision (ES1, ES2 )
-         * system_rev & 0x00000700 -> Device Type ( EMU/HS/GP/BAD )
-         * system_rev & 0x000000c0 -> IDCODE revision[6:7]
-         * system_rev & 0x0000003f -> sys_boot[0:5]
-         */
-        /* Embedding the ES revision info in type field */
-        system_rev = type;
-        /* Also add IDCODE revision info only two lower bits */
-        system_rev |= ((rev & 0x3) << 6);
-
-        /* Add in the device type and sys_boot fields (see above) */
-        if (cpu_is_omap24xx()) {
-                i = OMAP24XX_CONTROL_STATUS;
-        } else if (cpu_is_omap343x()) {
-                i = OMAP343X_CONTROL_STATUS;
-        } else {
-                printk(KERN_ERR "id: unknown CPU type\n");
-                BUG();
-        }
-        ctrl_status = omap_ctrl_readl(i);
-        system_rev |= (ctrl_status & (OMAP2_SYSBOOT_5_MASK |
-                                      OMAP2_SYSBOOT_4_MASK |
-                                      OMAP2_SYSBOOT_3_MASK |
-                                      OMAP2_SYSBOOT_2_MASK |
-                                      OMAP2_SYSBOOT_1_MASK |
-                                      OMAP2_SYSBOOT_0_MASK));
-        system_rev |= (ctrl_status & OMAP2_DEVICETYPE_MASK);
-}
-
-
-/*
- * _set_omap_chip - set the omap_chip global based on OMAP chip type
- *
- * Build the omap_chip bits.  This variable is used by powerdomain and
- * clockdomain code to indicate whether structures are applicable for
- * the current OMAP chip type by ANDing it against a 'platform' bitfield
- * in the structure.
- */
-static void __init _set_omap_chip(void)
-{
-        if (cpu_is_omap343x()) {
-
-                omap_chip.oc = CHIP_IS_OMAP3430;
-                if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0))
-                        omap_chip.oc |= CHIP_IS_OMAP3430ES1;
-                else if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0))
-                        omap_chip.oc |= CHIP_IS_OMAP3430ES2;
-
-        } else if (cpu_is_omap243x()) {
-
-                /* Currently only supports 2430ES2.1 and 2430-all */
-                omap_chip.oc |= CHIP_IS_OMAP2430;
-
-        } else if (cpu_is_omap242x()) {
-
-                /* Currently only supports 2420ES2.1.1 and 2420-all */
-                omap_chip.oc |= CHIP_IS_OMAP2420;
+#define OMAP_TAP_IDCODE         0x0204
+#define OMAP_TAP_DIE_ID_0       0x0218
+#define OMAP_TAP_DIE_ID_1       0x021C
+#define OMAP_TAP_DIE_ID_2       0x0220
+#define OMAP_TAP_DIE_ID_3       0x0224
 
-        } else {
+#define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
 
-                /* Current CPU not supported by this code. */
-                printk(KERN_WARNING "OMAP chip type code does not yet support "
-                       "this CPU type.\n");
-                WARN_ON(1);
+struct omap_id {
+        u16     hawkeye;        /* Silicon type (Hawkeye id) */
+        u8      dev;            /* Device type from production_id reg */
+        u32     type;           /* Combined type id copied to omap_revision */
+};
 
-        }
+/* Register values to detect the OMAP version */
+static struct omap_id omap_ids[] __initdata = {
+        { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
+        { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
+        { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
+        { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
+        { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
+        { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
+};
 
-}
+static void __iomem *tap_base;
+static u16 tap_prod_id;
 
-void __init omap2_check_revision(void)
+void __init omap24xx_check_revision(void)
 {
         int i, j;
-        u32 idcode;
-        u32 prod_id;
+        u32 idcode, prod_id;
         u16 hawkeye;
-        u8  dev_type;
-        u8  rev;
+        u8  dev_type, rev;
 
         idcode = read_tap_reg(OMAP_TAP_IDCODE);
         prod_id = read_tap_reg(tap_prod_id);
@@ -220,18 +101,6 @@ void __init omap2_check_revision(void)
         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
                  prod_id, dev_type);
 
-        /*
-         * Detection for 34xx ES2.0 and above can be done with just
-         * hawkeye and rev. See TRM 1.5.2 Device Identification.
-         * Note that rev cannot be used directly as ES1.0 uses value 0.
-         */
-        if (hawkeye == 0xb7ae) {
-                system_rev = 0x34300000 | ((1 + rev) << 12);
-                pr_info("OMAP%04x ES2.%i\n", system_rev >> 16, rev);
-                _set_omap_chip();
-                return;
-        }
-
         /* Check hawkeye ids */
         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
                 if (hawkeye == omap_ids[i].hawkeye)
@@ -255,23 +124,115 @@ void __init omap2_check_revision(void)
                 j = i;
         }
 
-        _set_system_rev(omap_ids[j].type, rev);
+        pr_info("OMAP%04x", omap_rev() >> 16);
+        if ((omap_rev() >> 8) & 0x0f)
+                pr_info("ES%x", (omap_rev() >> 12) & 0xf);
+        pr_info("\n");
+}
 
-        _set_omap_chip();
+void __init omap34xx_check_revision(void)
+{
+        u32 cpuid, idcode;
+        u16 hawkeye;
+        u8 rev;
+        char *rev_name = "ES1.0";
 
-        pr_info("OMAP%04x", system_rev >> 16);
-        if ((system_rev >> 8) & 0x0f)
-                pr_info("ES%x", (system_rev >> 12) & 0xf);
-        pr_info("\n");
+        /*
+         * We cannot access revision registers on ES1.0.
+         * If the processor type is Cortex-A8 and the revision is 0x0
+         * it means its Cortex r0p0 which is 3430 ES1.0.
+         */
+        cpuid = read_cpuid(CPUID_ID);
+        if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
+                omap_revision = OMAP3430_REV_ES1_0;
+                goto out;
+        }
 
+        /*
+         * Detection for 34xx ES2.0 and above can be done with just
+         * hawkeye and rev. See TRM 1.5.2 Device Identification.
+         * Note that rev does not map directly to our defined processor
+         * revision numbers as ES1.0 uses value 0.
+         */
+        idcode = read_tap_reg(OMAP_TAP_IDCODE);
+        hawkeye = (idcode >> 12) & 0xffff;
+        rev = (idcode >> 28) & 0xff;
+
+        if (hawkeye == 0xb7ae) {
+                switch (rev) {
+                case 0:
+                        omap_revision = OMAP3430_REV_ES2_0;
+                        rev_name = "ES2.0";
+                        break;
+                case 2:
+                        omap_revision = OMAP3430_REV_ES2_1;
+                        rev_name = "ES2.1";
+                        break;
+                case 3:
+                        omap_revision = OMAP3430_REV_ES3_0;
+                        rev_name = "ES3.0";
+                        break;
+                default:
+                        /* Use the latest known revision as default */
+                        omap_revision = OMAP3430_REV_ES3_0;
+                        rev_name = "Unknown revision\n";
+                }
+        }
+
+out:
+        pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
 }
 
+/*
+ * Try to detect the exact revision of the omap we're running on
+ */
+void __init omap2_check_revision(void)
+{
+        /*
+         * At this point we have an idea about the processor revision set
+         * earlier with omap2_set_globals_tap().
+         */
+        if (cpu_is_omap24xx())
+                omap24xx_check_revision();
+        else if (cpu_is_omap34xx())
+                omap34xx_check_revision();
+        else
+                pr_err("OMAP revision unknown, please fix!\n");
+
+        /*
+         * OK, now we know the exact revision. Initialize omap_chip bits
+         * for powerdowmain and clockdomain code.
+         */
+        if (cpu_is_omap243x()) {
+                /* Currently only supports 2430ES2.1 and 2430-all */
+                omap_chip.oc |= CHIP_IS_OMAP2430;
+        } else if (cpu_is_omap242x()) {
+                /* Currently only supports 2420ES2.1.1 and 2420-all */
+                omap_chip.oc |= CHIP_IS_OMAP2420;
+        } else if (cpu_is_omap343x()) {
+                omap_chip.oc = CHIP_IS_OMAP3430;
+                if (omap_rev() == OMAP3430_REV_ES1_0)
+                        omap_chip.oc |= CHIP_IS_OMAP3430ES1;
+                else if (omap_rev() > OMAP3430_REV_ES1_0)
+                        omap_chip.oc |= CHIP_IS_OMAP3430ES2;
+        } else {
+                pr_err("Uninitialized omap_chip, please fix!\n");
+        }
+}
+
+/*
+ * Set up things for map_io and processor detection later on. Gets called
+ * pretty much first thing from board init. For multi-omap, this gets
+ * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
+ * detect the exact revision later on in omap2_detect_revision() once map_io
+ * is done.
+ */
 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
 {
-        class = omap2_globals->class;
+        omap_revision = omap2_globals->class;
         tap_base = omap2_globals->tap;
 
-        if (class == 0x3430)
+        if (cpu_is_omap34xx())
                 tap_prod_id = 0x0210;
         else
                 tap_prod_id = 0x0208;
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index c40fc378a251..636e2821af7d 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -23,6 +23,7 @@
 #define INTC_REVISION           0x0000
 #define INTC_SYSCONFIG          0x0010
 #define INTC_SYSSTATUS          0x0014
+#define INTC_SIR                0x0040
 #define INTC_CONTROL            0x0048
 #define INTC_MIR_CLEAR0         0x0088
 #define INTC_MIR_SET0           0x008c
@@ -60,6 +61,30 @@ static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg)
         return __raw_readl(bank->base_reg + reg);
 }
 
+static int previous_irq;
+
+/*
+ * On 34xx we can get occasional spurious interrupts if the ack from
+ * an interrupt handler does not get posted before we unmask. Warn about
+ * the interrupt handlers that need to flush posted writes.
+ */
+static int omap_check_spurious(unsigned int irq)
+{
+        u32 sir, spurious;
+
+        sir = intc_bank_read_reg(&irq_banks[0], INTC_SIR);
+        spurious = sir >> 6;
+
+        if (spurious > 1) {
+                printk(KERN_WARNING "Spurious irq %i: 0x%08x, please flush "
+                                        "posted write for irq %i\n",
+                                        irq, sir, previous_irq);
+                return spurious;
+        }
+
+        return 0;
+}
+
 /* XXX: FIQ and additional INTC support (only MPU at the moment) */
 static void omap_ack_irq(unsigned int irq)
 {
@@ -70,6 +95,20 @@ static void omap_mask_irq(unsigned int irq)
 {
         int offset = irq & (~(IRQ_BITS_PER_REG - 1));
 
+        if (cpu_is_omap34xx()) {
+                int spurious = 0;
+
+                /*
+                 * INT_34XX_GPT12_IRQ is also the spurious irq. Maybe because
+                 * it is the highest irq number?
+                 */
+                if (irq == INT_34XX_GPT12_IRQ)
+                        spurious = omap_check_spurious(irq);
+
+                if (!spurious)
+                        previous_irq = irq;
+        }
+
         irq &= (IRQ_BITS_PER_REG - 1);
 
         intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c
new file mode 100644
index 000000000000..437f52073f6e
--- /dev/null
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
@@ -0,0 +1,408 @@
+/*
+ * linux/arch/arm/mach-omap2/mmc-twl4030.c
+ *
+ * Copyright (C) 2007-2008 Texas Instruments
+ * Copyright (C) 2008 Nokia Corporation
+ * Author: Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/i2c/twl4030.h>
+
+#include <mach/hardware.h>
+#include <mach/control.h>
+#include <mach/mmc.h>
+#include <mach/board.h>
+
+#include "mmc-twl4030.h"
+
+#if defined(CONFIG_TWL4030_CORE) && \
+        (defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE))
+
+#define LDO_CLR                 0x00
+#define VSEL_S2_CLR             0x40
+
+#define VMMC1_DEV_GRP           0x27
+#define VMMC1_CLR               0x00
+#define VMMC1_315V              0x03
+#define VMMC1_300V              0x02
+#define VMMC1_285V              0x01
+#define VMMC1_185V              0x00
+#define VMMC1_DEDICATED         0x2A
+
+#define VMMC2_DEV_GRP           0x2B
+#define VMMC2_CLR               0x40
+#define VMMC2_315V              0x0c
+#define VMMC2_300V              0x0b
+#define VMMC2_285V              0x0a
+#define VMMC2_260V              0x08
+#define VMMC2_185V              0x06
+#define VMMC2_DEDICATED         0x2E
+
+#define VMMC_DEV_GRP_P1         0x20
+
+static u16 control_pbias_offset;
+static u16 control_devconf1_offset;
+
+#define HSMMC_NAME_LEN  9
+
+static struct twl_mmc_controller {
+        struct omap_mmc_platform_data   *mmc;
+        u8              twl_vmmc_dev_grp;
+        u8              twl_mmc_dedicated;
+        char            name[HSMMC_NAME_LEN];
+} hsmmc[] = {
+        {
+                .twl_vmmc_dev_grp               = VMMC1_DEV_GRP,
+                .twl_mmc_dedicated              = VMMC1_DEDICATED,
+        },
+        {
+                .twl_vmmc_dev_grp               = VMMC2_DEV_GRP,
+                .twl_mmc_dedicated              = VMMC2_DEDICATED,
+        },
+};
+
+static int twl_mmc_card_detect(int irq)
+{
+        unsigned i;
+
+        for (i = 0; i < ARRAY_SIZE(hsmmc); i++) {
+                struct omap_mmc_platform_data *mmc;
+
+                mmc = hsmmc[i].mmc;
+                if (!mmc)
+                        continue;
+                if (irq != mmc->slots[0].card_detect_irq)
+                        continue;
+
+                /* NOTE: assumes card detect signal is active-low */
+                return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
+        }
+        return -ENOSYS;
+}
+
+static int twl_mmc_get_ro(struct device *dev, int slot)
+{
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+
+        /* NOTE: assumes write protect signal is active-high */
+        return gpio_get_value_cansleep(mmc->slots[0].gpio_wp);
+}
+
+/*
+ * MMC Slot Initialization.
+ */
+static int twl_mmc_late_init(struct device *dev)
+{
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+        int ret = 0;
+        int i;
+
+        ret = gpio_request(mmc->slots[0].switch_pin, "mmc_cd");
+        if (ret)
+                goto done;
+        ret = gpio_direction_input(mmc->slots[0].switch_pin);
+        if (ret)
+                goto err;
+
+        for (i = 0; i < ARRAY_SIZE(hsmmc); i++) {
+                if (hsmmc[i].name == mmc->slots[0].name) {
+                        hsmmc[i].mmc = mmc;
+                        break;
+                }
+        }
+
+        return 0;
+
+err:
+        gpio_free(mmc->slots[0].switch_pin);
+done:
+        mmc->slots[0].card_detect_irq = 0;
+        mmc->slots[0].card_detect = NULL;
+
+        dev_err(dev, "err %d configuring card detect\n", ret);
+        return ret;
+}
+
+static void twl_mmc_cleanup(struct device *dev)
+{
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+
+        gpio_free(mmc->slots[0].switch_pin);
+}
+
+#ifdef CONFIG_PM
+
+static int twl_mmc_suspend(struct device *dev, int slot)
+{
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+
+        disable_irq(mmc->slots[0].card_detect_irq);
+        return 0;
+}
+
+static int twl_mmc_resume(struct device *dev, int slot)
+{
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+
+        enable_irq(mmc->slots[0].card_detect_irq);
+        return 0;
+}
+
+#else
+#define twl_mmc_suspend NULL
+#define twl_mmc_resume  NULL
+#endif
+
+/*
+ * Sets the MMC voltage in twl4030
+ */
+static int twl_mmc_set_voltage(struct twl_mmc_controller *c, int vdd)
+{
+        int ret;
+        u8 vmmc, dev_grp_val;
+
+        switch (1 << vdd) {
+        case MMC_VDD_35_36:
+        case MMC_VDD_34_35:
+        case MMC_VDD_33_34:
+        case MMC_VDD_32_33:
+        case MMC_VDD_31_32:
+        case MMC_VDD_30_31:
+                if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
+                        vmmc = VMMC1_315V;
+                else
+                        vmmc = VMMC2_315V;
+                break;
+        case MMC_VDD_29_30:
+                if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
+                        vmmc = VMMC1_315V;
+                else
+                        vmmc = VMMC2_300V;
+                break;
+        case MMC_VDD_27_28:
+        case MMC_VDD_26_27:
+                if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
+                        vmmc = VMMC1_285V;
+                else
+                        vmmc = VMMC2_285V;
+                break;
+        case MMC_VDD_25_26:
+        case MMC_VDD_24_25:
+        case MMC_VDD_23_24:
+        case MMC_VDD_22_23:
+        case MMC_VDD_21_22:
+        case MMC_VDD_20_21:
+                if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
+                        vmmc = VMMC1_285V;
+                else
+                        vmmc = VMMC2_260V;
+                break;
+        case MMC_VDD_165_195:
+                if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
+                        vmmc = VMMC1_185V;
+                else
+                        vmmc = VMMC2_185V;
+                break;
+        default:
+                vmmc = 0;
+                break;
+        }
+
+        if (vmmc)
+                dev_grp_val = VMMC_DEV_GRP_P1;  /* Power up */
+        else
+                dev_grp_val = LDO_CLR;          /* Power down */
+
+        ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+                                        dev_grp_val, c->twl_vmmc_dev_grp);
+        if (ret)
+                return ret;
+
+        ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+                                        vmmc, c->twl_mmc_dedicated);
+
+        return ret;
+}
+
+static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
+                                int vdd)
+{
+        u32 reg;
+        int ret = 0;
+        struct twl_mmc_controller *c = &hsmmc[0];
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+
+        if (power_on) {
+                if (cpu_is_omap2430()) {
+                        reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
+                        if ((1 << vdd) >= MMC_VDD_30_31)
+                                reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
+                        else
+                                reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
+                        omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
+                }
+
+                if (mmc->slots[0].internal_clock) {
+                        reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+                        reg |= OMAP2_MMCSDIO1ADPCLKISEL;
+                        omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
+                }
+
+                reg = omap_ctrl_readl(control_pbias_offset);
+                reg |= OMAP2_PBIASSPEEDCTRL0;
+                reg &= ~OMAP2_PBIASLITEPWRDNZ0;
+                omap_ctrl_writel(reg, control_pbias_offset);
+
+                ret = twl_mmc_set_voltage(c, vdd);
+
+                /* 100ms delay required for PBIAS configuration */
+                msleep(100);
+                reg = omap_ctrl_readl(control_pbias_offset);
+                reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
+                if ((1 << vdd) <= MMC_VDD_165_195)
+                        reg &= ~OMAP2_PBIASLITEVMODE0;
+                else
+                        reg |= OMAP2_PBIASLITEVMODE0;
+                omap_ctrl_writel(reg, control_pbias_offset);
+        } else {
+                reg = omap_ctrl_readl(control_pbias_offset);
+                reg &= ~OMAP2_PBIASLITEPWRDNZ0;
+                omap_ctrl_writel(reg, control_pbias_offset);
+
+                ret = twl_mmc_set_voltage(c, 0);
+
+                /* 100ms delay required for PBIAS configuration */
+                msleep(100);
+                reg = omap_ctrl_readl(control_pbias_offset);
+                reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
+                        OMAP2_PBIASLITEVMODE0);
+                omap_ctrl_writel(reg, control_pbias_offset);
+        }
+
+        return ret;
+}
+
+static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vdd)
+{
+        int ret;
+        struct twl_mmc_controller *c = &hsmmc[1];
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+
+        if (power_on) {
+                if (mmc->slots[0].internal_clock) {
+                        u32 reg;
+
+                        reg = omap_ctrl_readl(control_devconf1_offset);
+                        reg |= OMAP2_MMCSDIO2ADPCLKISEL;
+                        omap_ctrl_writel(reg, control_devconf1_offset);
+                }
+                ret = twl_mmc_set_voltage(c, vdd);
+        } else {
+                ret = twl_mmc_set_voltage(c, 0);
+        }
+
+        return ret;
+}
+
+static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
+
+void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
+{
+        struct twl4030_hsmmc_info *c;
+        int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
+
+        if (cpu_is_omap2430()) {
+                control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
+                control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
+                nr_hsmmc = 2;
+        } else {
+                control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
+                control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
+        }
+
+        for (c = controllers; c->mmc; c++) {
+                struct twl_mmc_controller *twl = hsmmc + c->mmc - 1;
+                struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
+
+                if (!c->mmc || c->mmc > nr_hsmmc) {
+                        pr_debug("MMC%d: no such controller\n", c->mmc);
+                        continue;
+                }
+                if (mmc) {
+                        pr_debug("MMC%d: already configured\n", c->mmc);
+                        continue;
+                }
+
+                mmc = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
+                if (!mmc) {
+                        pr_err("Cannot allocate memory for mmc device!\n");
+                        return;
+                }
+
+                sprintf(twl->name, "mmc%islot%i", c->mmc, 1);
+                mmc->slots[0].name = twl->name;
+                mmc->nr_slots = 1;
+                mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
+                                        MMC_VDD_26_27 | MMC_VDD_27_28 |
+                                        MMC_VDD_29_30 |
+                                        MMC_VDD_30_31 | MMC_VDD_31_32;
+                mmc->slots[0].wires = c->wires;
+                mmc->slots[0].internal_clock = !c->ext_clock;
+                mmc->dma_mask = 0xffffffff;
+
+                /* note: twl4030 card detect GPIOs normally switch VMMCx ... */
+                if (gpio_is_valid(c->gpio_cd)) {
+                        mmc->init = twl_mmc_late_init;
+                        mmc->cleanup = twl_mmc_cleanup;
+                        mmc->suspend = twl_mmc_suspend;
+                        mmc->resume = twl_mmc_resume;
+
+                        mmc->slots[0].switch_pin = c->gpio_cd;
+                        mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd);
+                        mmc->slots[0].card_detect = twl_mmc_card_detect;
+                } else
+                        mmc->slots[0].switch_pin = -EINVAL;
+
+                /* write protect normally uses an OMAP gpio */
+                if (gpio_is_valid(c->gpio_wp)) {
+                        gpio_request(c->gpio_wp, "mmc_wp");
+                        gpio_direction_input(c->gpio_wp);
+
+                        mmc->slots[0].gpio_wp = c->gpio_wp;
+                        mmc->slots[0].get_ro = twl_mmc_get_ro;
+                } else
+                        mmc->slots[0].gpio_wp = -EINVAL;
+
+                /* NOTE:  we assume OMAP's MMC1 and MMC2 use
+                 * the TWL4030's VMMC1 and VMMC2, respectively;
+                 * and that OMAP's MMC3 isn't used.
+                 */
+
+                switch (c->mmc) {
+                case 1:
+                        mmc->slots[0].set_power = twl_mmc1_set_power;
+                        break;
+                case 2:
+                        mmc->slots[0].set_power = twl_mmc2_set_power;
+                        break;
+                default:
+                        pr_err("MMC%d configuration not supported!\n", c->mmc);
+                        continue;
+                }
+                hsmmc_data[c->mmc - 1] = mmc;
+        }
+
+        omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
+}
+
+#endif
diff --git a/arch/arm/mach-omap2/mmc-twl4030.h b/arch/arm/mach-omap2/mmc-twl4030.h
new file mode 100644
index 000000000000..e1c8076400ca
--- /dev/null
+++ b/arch/arm/mach-omap2/mmc-twl4030.h
@@ -0,0 +1,29 @@
+/*
+ * MMC definitions for OMAP2
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+struct twl4030_hsmmc_info {
+        u8      mmc;            /* controller 1/2/3 */
+        u8      wires;          /* 1/4/8 wires */
+        int     gpio_cd;        /* or -EINVAL */
+        int     gpio_wp;        /* or -EINVAL */
+        int     ext_clock:1;    /* use external pin for input clock */
+};
+
+#if     defined(CONFIG_TWL4030_CORE) && \
+        (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
+         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE))
+
+void twl4030_mmc_init(struct twl4030_hsmmc_info *);
+
+#else
+
+static inline void twl4030_mmc_init(struct twl4030_hsmmc_info *info)
+{
+}
+
+#endif
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index b1393673d95d..dacb41f130c0 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -203,6 +203,15 @@ MUX_CFG_24XX("AE9_2430_USB0HS_NXT",	0x13D,	0,	0,	0,	1)
 MUX_CFG_24XX("AC7_2430_USB0HS_DATA7",   0x13E,  0,      0,      0,      1)
 
 /* 2430 McBSP */
+MUX_CFG_24XX("AD6_2430_MCBSP_CLKS",     0x011E, 0,      0,      0,      1)
+
+MUX_CFG_24XX("AB2_2430_MCBSP1_CLKR",    0x011A, 0,      0,      0,      1)
+MUX_CFG_24XX("AD5_2430_MCBSP1_FSR",     0x011B, 0,      0,      0,      1)
+MUX_CFG_24XX("AA1_2430_MCBSP1_DX",      0x011C, 0,      0,      0,      1)
+MUX_CFG_24XX("AF3_2430_MCBSP1_DR",      0x011D, 0,      0,      0,      1)
+MUX_CFG_24XX("AB3_2430_MCBSP1_FSX",     0x011F, 0,      0,      0,      1)
+MUX_CFG_24XX("Y9_2430_MCBSP1_CLKX",     0x0120, 0,      0,      0,      1)
+
 MUX_CFG_24XX("AC10_2430_MCBSP2_FSX",    0x012E, 1,      0,      0,      1)
 MUX_CFG_24XX("AD16_2430_MCBSP2_CLX",    0x012F, 1,      0,      0,      1)
 MUX_CFG_24XX("AE13_2430_MCBSP2_DX",     0x0130, 1,      0,      0,      1)
@@ -211,6 +220,31 @@ MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E,	0,	0,	0,	1)
 MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0,      0,      0,      1)
 MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0,      0,      0,      1)
 MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0,      0,      0,      1)
+
+MUX_CFG_24XX("AC9_2430_MCBSP3_CLKX",    0x0103, 0,      0,      0,      1)
+MUX_CFG_24XX("AE4_2430_MCBSP3_FSX",     0x0104, 0,      0,      0,      1)
+MUX_CFG_24XX("AE2_2430_MCBSP3_DR",      0x0105, 0,      0,      0,      1)
+MUX_CFG_24XX("AF4_2430_MCBSP3_DX",      0x0106, 0,      0,      0,      1)
+
+MUX_CFG_24XX("N3_2430_MCBSP4_CLKX",     0x010B, 1,      0,      0,      1)
+MUX_CFG_24XX("AD23_2430_MCBSP4_DR",     0x010C, 1,      0,      0,      1)
+MUX_CFG_24XX("AB25_2430_MCBSP4_DX",     0x010D, 1,      0,      0,      1)
+MUX_CFG_24XX("AC25_2430_MCBSP4_FSX",    0x010E, 1,      0,      0,      1)
+
+MUX_CFG_24XX("AE16_2430_MCBSP5_CLKX",   0x00ED, 1,      0,      0,      1)
+MUX_CFG_24XX("AF12_2430_MCBSP5_FSX",    0x00ED, 1,      0,      0,      1)
+MUX_CFG_24XX("K7_2430_MCBSP5_DX",       0x00EF, 1,      0,      0,      1)
+MUX_CFG_24XX("M1_2430_MCBSP5_DR",       0x00F0, 1,      0,      0,      1)
+
+/* 2430 MCSPI1 */
+MUX_CFG_24XX("Y18_2430_MCSPI1_CLK",     0x010F, 0,      0,      0,      1)
+MUX_CFG_24XX("AD15_2430_MCSPI1_SIMO",   0x0110, 0,      0,      0,      1)
+MUX_CFG_24XX("AE17_2430_MCSPI1_SOMI",   0x0111, 0,      0,      0,      1)
+MUX_CFG_24XX("U1_2430_MCSPI1_CS0",      0x0112, 0,      0,      0,      1)
+
+/* Touchscreen GPIO */
+MUX_CFG_24XX("AF19_2430_GPIO_85",       0x0113, 3,      0,      0,      1)
+
 };
 
 #define OMAP24XX_PINS_SZ        ARRAY_SIZE(omap24xx_pins)
@@ -417,6 +451,14 @@ MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188,
 MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
 
+
+/* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix.
+ * No internal pullup/pulldown without "_UP" or "_DOWN" suffix.
+ */
+MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
+                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
+                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
 };
 
 #define OMAP34XX_PINS_SZ        ARRAY_SIZE(omap34xx_pins)
@@ -452,7 +494,7 @@ static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 r
 #endif
 
 #ifdef CONFIG_ARCH_OMAP24XX
-int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
+static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
 {
         static DEFINE_SPINLOCK(mux_spin_lock);
         unsigned long flags;
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 589393bedade..ae6036300f60 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -120,7 +120,7 @@ static void __init omap2_gp_clockevent_init(void)
         clockevent_gpt.min_delta_ns =
                 clockevent_delta2ns(1, &clockevent_gpt);
 
-        clockevent_gpt.cpumask = cpumask_of_cpu(0);
+        clockevent_gpt.cpumask = cpumask_of(0);
         clockevents_register_device(&clockevent_gpt);
 }
 
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 10ef464d6be7..15e509013def 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -12,11 +12,11 @@
 #include <linux/errno.h>
 #include <linux/delay.h>
 #include <linux/platform_device.h>
+#include <linux/gpio.h>
 
 #include <linux/usb/musb.h>
 
 #include <mach/gpmc.h>
-#include <mach/gpio.h>
 #include <mach/mux.h>
 
 
@@ -292,12 +292,12 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
                         );
 
         /* IRQ */
-        status = omap_request_gpio(irq);
+        status = gpio_request(irq, "TUSB6010 irq");
         if (status < 0) {
                 printk(error, 3, status);
                 return status;
         }
-        omap_set_gpio_direction(irq, 1);
+        gpio_direction_input(irq);
         tusb_resources[2].start = irq + IH_GPIO_BASE;
 
         /* set up memory timings ... can speed them up later */
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 3d4a1bc12355..edc38e2c856f 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -1,4 +1,4 @@
-obj-y                           += common.o addr-map.o pci.o gpio.o irq.o mpp.o
+obj-y                           += common.o addr-map.o pci.o irq.o mpp.o
 obj-$(CONFIG_MACH_DB88F5281)    += db88f5281-setup.o
 obj-$(CONFIG_MACH_RD88F5182)    += rd88f5182-setup.o
 obj-$(CONFIG_MACH_KUROBOX_PRO)  += kurobox_pro-setup.o
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 437065c25c9c..0a623379789f 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -72,6 +72,7 @@ void __init orion5x_map_io(void)
  ****************************************************************************/
 static struct orion_ehci_data orion5x_ehci_data = {
         .dram           = &orion5x_mbus_dram_info,
+        .phy_version    = EHCI_PHY_ORION,
 };
 
 static u64 ehci_dmamask = 0xffffffffUL;
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index a000c7c6ee96..798b9a5e3da9 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -51,13 +51,6 @@ int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
 struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
 int orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
 
-/*
- * Valid GPIO pins according to MPP setup, used by machine-setup.
- * (/mach-orion/gpio.c).
- */
-void orion5x_gpio_set_valid(unsigned pin, int valid);
-void gpio_display(void);        /* debug */
-
 struct machine_desc;
 struct meminfo;
 struct tag;
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 3e66098340a5..0722d6510df1 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -21,6 +21,7 @@
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/i2c.h>
+#include <linux/ata_platform.h>
 #include <asm/mach-types.h>
 #include <asm/gpio.h>
 #include <asm/mach/arch.h>
@@ -64,9 +65,21 @@ static struct hw_pci dns323_pci __initdata = {
         .map_irq        = dns323_pci_map_irq,
 };
 
+static int __init dns323_dev_id(void)
+{
+        u32 dev, rev;
+
+        orion5x_pcie_id(&dev, &rev);
+
+        return dev;
+}
+
 static int __init dns323_pci_init(void)
 {
-        if (machine_is_dns323())
+        /* The 5182 doesn't really use it's PCI bus, and initialising PCI
+         * gets in the way of initialising the SATA controller.
+         */
+        if (machine_is_dns323() && dns323_dev_id() != MV88F5182_DEV_ID)
                 pci_common_init(&dns323_pci);
 
         return 0;
@@ -75,14 +88,6 @@ static int __init dns323_pci_init(void)
 subsys_initcall(dns323_pci_init);
 
 /****************************************************************************
- * Ethernet
- */
-
-static struct mv643xx_eth_platform_data dns323_eth_data = {
-        .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-/****************************************************************************
  * 8MiB NOR flash (Spansion S29GL064M90TFIR4)
  *
  * Layout as used by D-Link:
@@ -143,6 +148,90 @@ static struct platform_device dns323_nor_flash = {
 };
 
 /****************************************************************************
+ * Ethernet
+ */
+
+static struct mv643xx_eth_platform_data dns323_eth_data = {
+        .phy_addr = MV643XX_ETH_PHY_ADDR(8),
+};
+
+/* dns323_parse_hex_*() taken from tsx09-common.c; should a common copy of these
+ * functions be kept somewhere?
+ */
+static int __init dns323_parse_hex_nibble(char n)
+{
+        if (n >= '0' && n <= '9')
+                return n - '0';
+
+        if (n >= 'A' && n <= 'F')
+                return n - 'A' + 10;
+
+        if (n >= 'a' && n <= 'f')
+                return n - 'a' + 10;
+
+        return -1;
+}
+
+static int __init dns323_parse_hex_byte(const char *b)
+{
+        int hi;
+        int lo;
+
+        hi = dns323_parse_hex_nibble(b[0]);
+        lo = dns323_parse_hex_nibble(b[1]);
+
+        if (hi < 0 || lo < 0)
+                return -1;
+
+        return (hi << 4) | lo;
+}
+
+static int __init dns323_read_mac_addr(void)
+{
+        u_int8_t addr[6];
+        int i;
+        char *mac_page;
+
+        /* MAC address is stored as a regular ol' string in /dev/mtdblock4
+         * (0x007d0000-0x00800000) starting at offset 196480 (0x2ff80).
+         */
+        mac_page = ioremap(DNS323_NOR_BOOT_BASE + 0x7d0000 + 196480, 1024);
+        if (!mac_page)
+                return -ENOMEM;
+
+        /* Sanity check the string we're looking at */
+        for (i = 0; i < 5; i++) {
+                if (*(mac_page + (i * 3) + 2) != ':') {
+                        goto error_fail;
+                }
+        }
+
+        for (i = 0; i < 6; i++) {
+                int byte;
+
+                byte = dns323_parse_hex_byte(mac_page + (i * 3));
+                if (byte < 0) {
+                        goto error_fail;
+                }
+
+                addr[i] = byte;
+        }
+
+        iounmap(mac_page);
+        printk("DNS323: Found ethernet MAC address: ");
+        for (i = 0; i < 6; i++)
+                printk("%.2x%s", addr[i], (i < 5) ? ":" : ".\n");
+
+        memcpy(dns323_eth_data.mac_addr, addr, 6);
+
+        return 0;
+
+error_fail:
+        iounmap(mac_page);
+        return -EINVAL;
+}
+
+/****************************************************************************
  * GPIO LEDs (simple - doesn't use hardware blinking support)
  */
 
@@ -207,10 +296,17 @@ static struct platform_device dns323_button_device = {
         },
 };
 
+/*****************************************************************************
+ * SATA
+ */
+static struct mv_sata_platform_data dns323_sata_data = {
+       .n_ports        = 2,
+};
+
 /****************************************************************************
  * General Setup
  */
-static struct orion5x_mpp_mode dns323_mpp_modes[] __initdata = {
+static struct orion5x_mpp_mode dns323_mv88f5181_mpp_modes[] __initdata = {
         {  0, MPP_PCIE_RST_OUTn },
         {  1, MPP_GPIO },               /* right amber LED (sata ch0) */
         {  2, MPP_GPIO },               /* left amber LED (sata ch1) */
@@ -234,6 +330,30 @@ static struct orion5x_mpp_mode dns323_mpp_modes[] __initdata = {
         { -1 },
 };
 
+static struct orion5x_mpp_mode dns323_mv88f5182_mpp_modes[] __initdata = {
+        {  0, MPP_UNUSED },
+        {  1, MPP_GPIO },               /* right amber LED (sata ch0) */
+        {  2, MPP_GPIO },               /* left amber LED (sata ch1) */
+        {  3, MPP_UNUSED },
+        {  4, MPP_GPIO },               /* power button LED */
+        {  5, MPP_GPIO },               /* power button LED */
+        {  6, MPP_GPIO },               /* GMT G751-2f overtemp */
+        {  7, MPP_GPIO },               /* M41T80 nIRQ/OUT/SQW */
+        {  8, MPP_GPIO },               /* triggers power off */
+        {  9, MPP_GPIO },               /* power button switch */
+        { 10, MPP_GPIO },               /* reset button switch */
+        { 11, MPP_UNUSED },
+        { 12, MPP_SATA_LED },
+        { 13, MPP_SATA_LED },
+        { 14, MPP_SATA_LED },
+        { 15, MPP_SATA_LED },
+        { 16, MPP_UNUSED },
+        { 17, MPP_UNUSED },
+        { 18, MPP_UNUSED },
+        { 19, MPP_UNUSED },
+        { -1 },
+};
+
 /*
  * On the DNS-323 the following devices are attached via I2C:
  *
@@ -264,16 +384,15 @@ static void __init dns323_init(void)
         /* Setup basic Orion functions. Need to be called early. */
         orion5x_init();
 
-        orion5x_mpp_conf(dns323_mpp_modes);
-        writel(0, MPP_DEV_CTRL);                /* DEV_D[31:16] */
-
-        /*
-         * Configure peripherals.
+        /* Just to be tricky, the 5182 has a completely different
+         * set of MPP modes to the 5181.
          */
-        orion5x_ehci0_init();
-        orion5x_eth_init(&dns323_eth_data);
-        orion5x_i2c_init();
-        orion5x_uart0_init();
+        if (dns323_dev_id() == MV88F5182_DEV_ID)
+                orion5x_mpp_conf(dns323_mv88f5182_mpp_modes);
+        else {
+                orion5x_mpp_conf(dns323_mv88f5181_mpp_modes);
+                writel(0, MPP_DEV_CTRL);                /* DEV_D[31:16] */
+        }
 
         /* setup flash mapping
          * CS3 holds a 8 MB Spansion S29GL064M90TFIR4
@@ -288,6 +407,23 @@ static void __init dns323_init(void)
         i2c_register_board_info(0, dns323_i2c_devices,
                                 ARRAY_SIZE(dns323_i2c_devices));
 
+        /*
+         * Configure peripherals.
+         */
+        if (dns323_read_mac_addr() < 0)
+                printk("DNS323: Failed to read MAC address\n");
+
+        orion5x_ehci0_init();
+        orion5x_eth_init(&dns323_eth_data);
+        orion5x_i2c_init();
+        orion5x_uart0_init();
+
+        /* The 5182 has it's SATA controller on-chip, and needs it's own little
+         * init routine.
+         */
+        if (dns323_dev_id() == MV88F5182_DEV_ID)
+                orion5x_sata_init(&dns323_sata_data);
+
         /* register dns323 specific power-off method */
         if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 ||
             gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0)
diff --git a/arch/arm/mach-orion5x/gpio.c b/arch/arm/mach-orion5x/gpio.c
deleted file mode 100644
index f99d08811e5a..000000000000
--- a/arch/arm/mach-orion5x/gpio.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * arch/arm/mach-orion5x/gpio.c
- *
- * GPIO functions for Marvell Orion System On Chip
- *
- * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-#include <linux/bitops.h>
-#include <linux/io.h>
-#include <asm/gpio.h>
-#include <mach/orion5x.h>
-#include "common.h"
-
-static DEFINE_SPINLOCK(gpio_lock);
-static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)];
-static const char *gpio_label[GPIO_MAX];  /* non null for allocated GPIOs */
-
-void __init orion5x_gpio_set_valid(unsigned pin, int valid)
-{
-        if (valid)
-                __set_bit(pin, gpio_valid);
-        else
-                __clear_bit(pin, gpio_valid);
-}
-
-/*
- * GENERIC_GPIO primitives
- */
-int gpio_direction_input(unsigned pin)
-{
-        unsigned long flags;
-
-        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
-                pr_debug("%s: invalid GPIO %d\n", __func__, pin);
-                return -EINVAL;
-        }
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        /*
-         * Some callers might have not used the gpio_request(),
-         * so flag this pin as requested now.
-         */
-        if (!gpio_label[pin])
-                gpio_label[pin] = "?";
-
-        orion5x_setbits(GPIO_IO_CONF, 1 << pin);
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-        return 0;
-}
-EXPORT_SYMBOL(gpio_direction_input);
-
-int gpio_direction_output(unsigned pin, int value)
-{
-        unsigned long flags;
-        int mask;
-
-        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
-                pr_debug("%s: invalid GPIO %d\n", __func__, pin);
-                return -EINVAL;
-        }
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        /*
-         * Some callers might have not used the gpio_request(),
-         * so flag this pin as requested now.
-         */
-        if (!gpio_label[pin])
-                gpio_label[pin] = "?";
-
-        mask = 1 << pin;
-        orion5x_clrbits(GPIO_BLINK_EN, mask);
-        if (value)
-                orion5x_setbits(GPIO_OUT, mask);
-        else
-                orion5x_clrbits(GPIO_OUT, mask);
-        orion5x_clrbits(GPIO_IO_CONF, mask);
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-        return 0;
-}
-EXPORT_SYMBOL(gpio_direction_output);
-
-int gpio_get_value(unsigned pin)
-{
-        int val, mask = 1 << pin;
-
-        if (readl(GPIO_IO_CONF) & mask)
-                val = readl(GPIO_DATA_IN) ^ readl(GPIO_IN_POL);
-        else
-                val = readl(GPIO_OUT);
-
-        return val & mask;
-}
-EXPORT_SYMBOL(gpio_get_value);
-
-void gpio_set_value(unsigned pin, int value)
-{
-        unsigned long flags;
-        int mask = 1 << pin;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        orion5x_clrbits(GPIO_BLINK_EN, mask);
-        if (value)
-                orion5x_setbits(GPIO_OUT, mask);
-        else
-                orion5x_clrbits(GPIO_OUT, mask);
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-EXPORT_SYMBOL(gpio_set_value);
-
-void orion5x_gpio_set_blink(unsigned pin, int blink)
-{
-        unsigned long flags;
-        int mask = 1 << pin;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        orion5x_clrbits(GPIO_OUT, mask);
-        if (blink)
-                orion5x_setbits(GPIO_BLINK_EN, mask);
-        else
-                orion5x_clrbits(GPIO_BLINK_EN, mask);
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-EXPORT_SYMBOL(orion5x_gpio_set_blink);
-
-int gpio_request(unsigned pin, const char *label)
-{
-        int ret = 0;
-        unsigned long flags;
-
-        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
-                pr_debug("%s: invalid GPIO %d\n", __func__, pin);
-                return -EINVAL;
-        }
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        if (gpio_label[pin]) {
-                pr_debug("%s: GPIO %d already used as %s\n",
-                         __func__, pin, gpio_label[pin]);
-                ret = -EBUSY;
-        } else
-                gpio_label[pin] = label ? label : "?";
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-        return ret;
-}
-EXPORT_SYMBOL(gpio_request);
-
-void gpio_free(unsigned pin)
-{
-        might_sleep();
-
-        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
-                pr_debug("%s: invalid GPIO %d\n", __func__, pin);
-                return;
-        }
-
-        if (!gpio_label[pin])
-                pr_warning("%s: GPIO %d already freed\n", __func__, pin);
-        else
-                gpio_label[pin] = NULL;
-}
-EXPORT_SYMBOL(gpio_free);
-
-/* Debug helper */
-void gpio_display(void)
-{
-        int i;
-
-        for (i = 0; i < GPIO_MAX; i++) {
-                printk(KERN_DEBUG "Pin-%d: ", i);
-
-                if (!test_bit(i, gpio_valid)) {
-                        printk("non-GPIO\n");
-                } else if (!gpio_label[i]) {
-                        printk("GPIO, free\n");
-                } else {
-                        printk("GPIO, used by %s, ", gpio_label[i]);
-                        if (readl(GPIO_IO_CONF) & (1 << i)) {
-                                printk("input, active %s, level %s, edge %s\n",
-                                ((readl(GPIO_IN_POL) >> i) & 1) ? "low" : "high",
-                                ((readl(GPIO_LEVEL_MASK) >> i) & 1) ? "enabled" : "masked",
-                                ((readl(GPIO_EDGE_MASK) >> i) & 1) ? "enabled" : "masked");
-                        } else {
-                                printk("output, val=%d\n", (readl(GPIO_OUT) >> i) & 1);
-                        }
-                }
-        }
-
-        printk(KERN_DEBUG "MPP_0_7_CTRL (0x%08x) = 0x%08x\n",
-                                MPP_0_7_CTRL, readl(MPP_0_7_CTRL));
-        printk(KERN_DEBUG "MPP_8_15_CTRL (0x%08x) = 0x%08x\n",
-                                MPP_8_15_CTRL, readl(MPP_8_15_CTRL));
-        printk(KERN_DEBUG "MPP_16_19_CTRL (0x%08x) = 0x%08x\n",
-                                MPP_16_19_CTRL, readl(MPP_16_19_CTRL));
-        printk(KERN_DEBUG "MPP_DEV_CTRL (0x%08x) = 0x%08x\n",
-                                MPP_DEV_CTRL, readl(MPP_DEV_CTRL));
-        printk(KERN_DEBUG "GPIO_OUT (0x%08x) = 0x%08x\n",
-                                GPIO_OUT, readl(GPIO_OUT));
-        printk(KERN_DEBUG "GPIO_IO_CONF (0x%08x) = 0x%08x\n",
-                                GPIO_IO_CONF, readl(GPIO_IO_CONF));
-        printk(KERN_DEBUG "GPIO_BLINK_EN (0x%08x) = 0x%08x\n",
-                                GPIO_BLINK_EN, readl(GPIO_BLINK_EN));
-        printk(KERN_DEBUG "GPIO_IN_POL (0x%08x) = 0x%08x\n",
-                                GPIO_IN_POL, readl(GPIO_IN_POL));
-        printk(KERN_DEBUG "GPIO_DATA_IN (0x%08x) = 0x%08x\n",
-                                GPIO_DATA_IN, readl(GPIO_DATA_IN));
-        printk(KERN_DEBUG "GPIO_LEVEL_MASK (0x%08x) = 0x%08x\n",
-                                GPIO_LEVEL_MASK, readl(GPIO_LEVEL_MASK));
-        printk(KERN_DEBUG "GPIO_EDGE_CAUSE (0x%08x) = 0x%08x\n",
-                                GPIO_EDGE_CAUSE, readl(GPIO_EDGE_CAUSE));
-        printk(KERN_DEBUG "GPIO_EDGE_MASK (0x%08x) = 0x%08x\n",
-                                GPIO_EDGE_MASK, readl(GPIO_EDGE_MASK));
-}
diff --git a/arch/arm/mach-orion5x/include/mach/dma.h b/arch/arm/mach-orion5x/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-orion5x/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-orion5x/include/mach/gpio.h b/arch/arm/mach-orion5x/include/mach/gpio.h
index 65dc136a86f7..d8182e87ac16 100644
--- a/arch/arm/mach-orion5x/include/mach/gpio.h
+++ b/arch/arm/mach-orion5x/include/mach/gpio.h
@@ -2,18 +2,26 @@
  * arch/arm/mach-orion5x/include/mach/gpio.h
  *
  * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * License version 2.  This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
 
-extern int gpio_request(unsigned pin, const char *label);
-extern void gpio_free(unsigned pin);
-extern int gpio_direction_input(unsigned pin);
-extern int gpio_direction_output(unsigned pin, int value);
-extern int gpio_get_value(unsigned pin);
-extern void gpio_set_value(unsigned pin, int value);
-extern void orion5x_gpio_set_blink(unsigned pin, int blink);
-extern void gpio_display(void);         /* debug */
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+#include <mach/irqs.h>
+#include <plat/gpio.h>
+#include <asm-generic/gpio.h>           /* cansleep wrappers */
+
+#define GPIO_MAX                32
+#define GPIO_OUT(pin)           ORION5X_DEV_BUS_REG(0x100)
+#define GPIO_IO_CONF(pin)       ORION5X_DEV_BUS_REG(0x104)
+#define GPIO_BLINK_EN(pin)      ORION5X_DEV_BUS_REG(0x108)
+#define GPIO_IN_POL(pin)        ORION5X_DEV_BUS_REG(0x10c)
+#define GPIO_DATA_IN(pin)       ORION5X_DEV_BUS_REG(0x110)
+#define GPIO_EDGE_CAUSE(pin)    ORION5X_DEV_BUS_REG(0x114)
+#define GPIO_EDGE_MASK(pin)     ORION5X_DEV_BUS_REG(0x118)
+#define GPIO_LEVEL_MASK(pin)    ORION5X_DEV_BUS_REG(0x11c)
 
 static inline int gpio_to_irq(int pin)
 {
@@ -25,4 +33,5 @@ static inline int irq_to_gpio(int irq)
         return irq - IRQ_ORION5X_GPIO_START;
 }
 
-#include <asm-generic/gpio.h>           /* cansleep wrappers */
+
+#endif
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
index f24b2513f7f3..c47b033bd999 100644
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -38,14 +38,9 @@ __arch_iounmap(void __iomem *addr)
                 __iounmap(addr);
 }
 
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-
 #define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m)
 #define __arch_iounmap(a)       __arch_iounmap(a)
-#define __io(a)                 __io(a)
+#define __io(a)                 __typesafe_io(a)
 #define __mem_pci(a)            (a)
 
 
diff --git a/arch/arm/mach-orion5x/include/mach/irqs.h b/arch/arm/mach-orion5x/include/mach/irqs.h
index d5b0fbf6b965..a6fa9d8f12d8 100644
--- a/arch/arm/mach-orion5x/include/mach/irqs.h
+++ b/arch/arm/mach-orion5x/include/mach/irqs.h
@@ -13,8 +13,6 @@
 #ifndef __ASM_ARCH_IRQS_H
 #define __ASM_ARCH_IRQS_H
 
-#include "orion5x.h"    /* need GPIO_MAX */
-
 /*
  * Orion Main Interrupt Controller
  */
@@ -54,7 +52,7 @@
  * Orion General Purpose Pins
  */
 #define IRQ_ORION5X_GPIO_START  32
-#define NR_GPIO_IRQS            GPIO_MAX
+#define NR_GPIO_IRQS            32
 
 #define NR_IRQS                 (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
 
diff --git a/arch/arm/mach-orion5x/include/mach/memory.h b/arch/arm/mach-orion5x/include/mach/memory.h
index 54dd76b013f2..52a2955d0f87 100644
--- a/arch/arm/mach-orion5x/include/mach/memory.h
+++ b/arch/arm/mach-orion5x/include/mach/memory.h
@@ -9,8 +9,4 @@
 
 #define PHYS_OFFSET     UL(0x00000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-
 #endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 9f5ce1ce5840..67bda31406dd 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -134,14 +134,6 @@
 #define MPP_16_19_CTRL          ORION5X_DEV_BUS_REG(0x050)
 #define MPP_DEV_CTRL            ORION5X_DEV_BUS_REG(0x008)
 #define MPP_RESET_SAMPLE        ORION5X_DEV_BUS_REG(0x010)
-#define GPIO_OUT                ORION5X_DEV_BUS_REG(0x100)
-#define GPIO_IO_CONF            ORION5X_DEV_BUS_REG(0x104)
-#define GPIO_BLINK_EN           ORION5X_DEV_BUS_REG(0x108)
-#define GPIO_IN_POL             ORION5X_DEV_BUS_REG(0x10c)
-#define GPIO_DATA_IN            ORION5X_DEV_BUS_REG(0x110)
-#define GPIO_EDGE_CAUSE         ORION5X_DEV_BUS_REG(0x114)
-#define GPIO_EDGE_MASK          ORION5X_DEV_BUS_REG(0x118)
-#define GPIO_LEVEL_MASK         ORION5X_DEV_BUS_REG(0x11c)
 #define DEV_BANK_0_PARAM        ORION5X_DEV_BUS_REG(0x45c)
 #define DEV_BANK_1_PARAM        ORION5X_DEV_BUS_REG(0x460)
 #define DEV_BANK_2_PARAM        ORION5X_DEV_BUS_REG(0x464)
@@ -149,7 +141,6 @@
 #define DEV_BUS_CTRL            ORION5X_DEV_BUS_REG(0x4c0)
 #define DEV_BUS_INT_CAUSE       ORION5X_DEV_BUS_REG(0x4d0)
 #define DEV_BUS_INT_MASK        ORION5X_DEV_BUS_REG(0x4d4)
-#define GPIO_MAX                32
 
 /***************************************************************************
  * Orion CPU Bridge Registers
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index 632a36f5cf14..0caae43301e5 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -19,193 +19,38 @@
 #include <plat/irq.h>
 #include "common.h"
 
-/*****************************************************************************
- * Orion GPIO IRQ
- *
- * GPIO_IN_POL register controlls whether GPIO_DATA_IN will hold the same
- * value of the line or the opposite value.
- *
- * Level IRQ handlers: DATA_IN is used directly as cause register.
- *                     Interrupt are masked by LEVEL_MASK registers.
- * Edge IRQ handlers:  Change in DATA_IN are latched in EDGE_CAUSE.
- *                     Interrupt are masked by EDGE_MASK registers.
- * Both-edge handlers: Similar to regular Edge handlers, but also swaps
- *                     the polarity to catch the next line transaction.
- *                     This is a race condition that might not perfectly
- *                     work on some use cases.
- *
- * Every eight GPIO lines are grouped (OR'ed) before going up to main
- * cause register.
- *
- *                    EDGE  cause    mask
- *        data-in   /--------| |-----| |----\
- *     -----| |-----                         ---- to main cause reg
- *           X      \----------------| |----/
- *        polarity    LEVEL          mask
- *
- ****************************************************************************/
-static void orion5x_gpio_irq_ack(u32 irq)
-{
-        int pin = irq_to_gpio(irq);
-        if (irq_desc[irq].status & IRQ_LEVEL)
-                /*
-                 * Mask bit for level interrupt
-                 */
-                orion5x_clrbits(GPIO_LEVEL_MASK, 1 << pin);
-        else
-                /*
-                 * Clear casue bit for egde interrupt
-                 */
-                orion5x_clrbits(GPIO_EDGE_CAUSE, 1 << pin);
-}
-
-static void orion5x_gpio_irq_mask(u32 irq)
-{
-        int pin = irq_to_gpio(irq);
-        if (irq_desc[irq].status & IRQ_LEVEL)
-                orion5x_clrbits(GPIO_LEVEL_MASK, 1 << pin);
-        else
-                orion5x_clrbits(GPIO_EDGE_MASK, 1 << pin);
-}
-
-static void orion5x_gpio_irq_unmask(u32 irq)
+static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
-        int pin = irq_to_gpio(irq);
-        if (irq_desc[irq].status & IRQ_LEVEL)
-                orion5x_setbits(GPIO_LEVEL_MASK, 1 << pin);
-        else
-                orion5x_setbits(GPIO_EDGE_MASK, 1 << pin);
-}
-
-static int orion5x_gpio_set_irq_type(u32 irq, u32 type)
-{
-        int pin = irq_to_gpio(irq);
-        struct irq_desc *desc;
-
-        if ((readl(GPIO_IO_CONF) & (1 << pin)) == 0) {
-                printk(KERN_ERR "orion5x_gpio_set_irq_type failed "
-                                "(irq %d, pin %d).\n", irq, pin);
-                return -EINVAL;
-        }
-
-        desc = irq_desc + irq;
-
-        switch (type) {
-        case IRQ_TYPE_LEVEL_HIGH:
-                desc->handle_irq = handle_level_irq;
-                desc->status |= IRQ_LEVEL;
-                orion5x_clrbits(GPIO_IN_POL, (1 << pin));
-                break;
-        case IRQ_TYPE_LEVEL_LOW:
-                desc->handle_irq = handle_level_irq;
-                desc->status |= IRQ_LEVEL;
-                orion5x_setbits(GPIO_IN_POL, (1 << pin));
-                break;
-        case IRQ_TYPE_EDGE_RISING:
-                desc->handle_irq = handle_edge_irq;
-                desc->status &= ~IRQ_LEVEL;
-                orion5x_clrbits(GPIO_IN_POL, (1 << pin));
-                break;
-        case IRQ_TYPE_EDGE_FALLING:
-                desc->handle_irq = handle_edge_irq;
-                desc->status &= ~IRQ_LEVEL;
-                orion5x_setbits(GPIO_IN_POL, (1 << pin));
-                break;
-        case IRQ_TYPE_EDGE_BOTH:
-                desc->handle_irq = handle_edge_irq;
-                desc->status &= ~IRQ_LEVEL;
-                /*
-                 * set initial polarity based on current input level
-                 */
-                if ((readl(GPIO_IN_POL) ^ readl(GPIO_DATA_IN))
-                    & (1 << pin))
-                        orion5x_setbits(GPIO_IN_POL, (1 << pin)); /* falling */
-                else
-                        orion5x_clrbits(GPIO_IN_POL, (1 << pin)); /* rising */
-
-                break;
-        default:
-                printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type);
-                return -EINVAL;
-        }
-
-        desc->status &= ~IRQ_TYPE_SENSE_MASK;
-        desc->status |= type & IRQ_TYPE_SENSE_MASK;
-
-        return 0;
-}
-
-static struct irq_chip orion5x_gpio_irq_chip = {
-        .name           = "Orion-IRQ-GPIO",
-        .ack            = orion5x_gpio_irq_ack,
-        .mask           = orion5x_gpio_irq_mask,
-        .unmask         = orion5x_gpio_irq_unmask,
-        .set_type       = orion5x_gpio_set_irq_type,
-};
-
-static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
-        u32 cause, offs, pin;
-
         BUG_ON(irq < IRQ_ORION5X_GPIO_0_7 || irq > IRQ_ORION5X_GPIO_24_31);
-        offs = (irq - IRQ_ORION5X_GPIO_0_7) * 8;
-        cause = (readl(GPIO_DATA_IN) & readl(GPIO_LEVEL_MASK)) |
-                (readl(GPIO_EDGE_CAUSE) & readl(GPIO_EDGE_MASK));
 
-        for (pin = offs; pin < offs + 8; pin++) {
-                if (cause & (1 << pin)) {
-                        irq = gpio_to_irq(pin);
-                        desc = irq_desc + irq;
-                        if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
-                                /* Swap polarity (race with GPIO line) */
-                                u32 polarity = readl(GPIO_IN_POL);
-                                polarity ^= 1 << pin;
-                                writel(polarity, GPIO_IN_POL);
-                        }
-                        generic_handle_irq(irq);
-                }
-        }
+        orion_gpio_irq_handler((irq - IRQ_ORION5X_GPIO_0_7) << 3);
 }
 
-static void __init orion5x_init_gpio_irq(void)
+void __init orion5x_init_irq(void)
 {
         int i;
-        struct irq_desc *desc;
+
+        orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
 
         /*
          * Mask and clear GPIO IRQ interrupts
          */
-        writel(0x0, GPIO_LEVEL_MASK);
-        writel(0x0, GPIO_EDGE_MASK);
-        writel(0x0, GPIO_EDGE_CAUSE);
+        writel(0x0, GPIO_LEVEL_MASK(0));
+        writel(0x0, GPIO_EDGE_MASK(0));
+        writel(0x0, GPIO_EDGE_CAUSE(0));
 
         /*
          * Register chained level handlers for GPIO IRQs by default.
          * User can use set_type() if he wants to use edge types handlers.
          */
         for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) {
-                set_irq_chip(i, &orion5x_gpio_irq_chip);
+                set_irq_chip(i, &orion_gpio_irq_level_chip);
                 set_irq_handler(i, handle_level_irq);
-                desc = irq_desc + i;
-                desc->status |= IRQ_LEVEL;
+                irq_desc[i].status |= IRQ_LEVEL;
                 set_irq_flags(i, IRQF_VALID);
         }
-        set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, orion5x_gpio_irq_handler);
-        set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, orion5x_gpio_irq_handler);
-        set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, orion5x_gpio_irq_handler);
-        set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, orion5x_gpio_irq_handler);
-}
-
-/*****************************************************************************
- * Orion Main IRQ
- ****************************************************************************/
-static void __init orion5x_init_main_irq(void)
-{
-        orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
-}
-
-void __init orion5x_init_irq(void)
-{
-        orion5x_init_main_irq();
-        orion5x_init_gpio_irq();
+        set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
 }
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index 640ea2a3fc6c..e23a3f91d6c6 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/mbus.h>
 #include <linux/io.h>
+#include <asm/gpio.h>
 #include <mach/hardware.h>
 #include "common.h"
 #include "mpp.h"
@@ -152,7 +153,10 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
                 *reg &= ~(0xf << shift);
                 *reg |= (num_type & 0xf) << shift;
 
-                orion5x_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO));
+                if (mode->type == MPP_UNUSED && (mode->mpp < 16 || is_5182()))
+                        orion_gpio_set_unused(mode->mpp);
+
+                orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO));
 
                 mode++;
         }
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index ac2f70eddb9e..425f7188505e 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -25,9 +25,8 @@
 
 #include <asm/system.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 #include <asm/dma-mapping.h>
-#include <asm/mach/dma.h>
 #include <mach/clock.h>
 
 static struct dma_channel {
diff --git a/arch/arm/mach-pnx4008/include/mach/dma.h b/arch/arm/mach-pnx4008/include/mach/dma.h
index 5442d04fc575..f094bf8bfb18 100644
--- a/arch/arm/mach-pnx4008/include/mach/dma.h
+++ b/arch/arm/mach-pnx4008/include/mach/dma.h
@@ -16,8 +16,6 @@
 
 #include "platform.h"
 
-#define MAX_DMA_ADDRESS         0xffffffff
-
 #define MAX_DMA_CHANNELS        8
 
 #define DMAC_BASE               IO_ADDRESS(PNX4008_DMA_CONFIG_BASE)
diff --git a/arch/arm/mach-pnx4008/include/mach/io.h b/arch/arm/mach-pnx4008/include/mach/io.h
index c6206f25839d..cbf0904540ea 100644
--- a/arch/arm/mach-pnx4008/include/mach/io.h
+++ b/arch/arm/mach-pnx4008/include/mach/io.h
@@ -15,7 +15,7 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-pnx4008/include/mach/memory.h b/arch/arm/mach-pnx4008/include/mach/memory.h
index 5789a2d16f5a..0e8770081058 100644
--- a/arch/arm/mach-pnx4008/include/mach/memory.h
+++ b/arch/arm/mach-pnx4008/include/mach/memory.h
@@ -16,9 +16,6 @@
 /*
  * Physical DRAM offset.
  */
-#define PHYS_OFFSET     (0x80000000)
-
-#define __virt_to_bus(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
-#define __bus_to_virt(x) ((x) + PAGE_OFFSET - PHYS_OFFSET)
+#define PHYS_OFFSET     UL(0x80000000)
 
 #endif
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index a062235e83a8..8eea7306f29b 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -19,20 +19,34 @@ config CPU_PXA320
 config CPU_PXA930
         bool "PXA930 (codename Tavor-P)"
 
+config CPU_PXA935
+        bool "PXA935 (codename Tavor-P65)"
+
 endmenu
 
 endif
 
 config ARCH_GUMSTIX
-        bool "Gumstix XScale boards"
+        bool "Gumstix XScale 255 boards"
+        select PXA25x
         help
-          Say Y here if you intend to run this kernel on a
-          Gumstix Full Function Minature Computer.
+          Say Y here if you intend to run this kernel on
+          Basix, Connex, ws-200ax, ws-400ax systems
 
-config MACH_GUMSTIX_F
-        bool "Basix, Connex, ws-200ax, ws-400ax systems"
+choice
+        prompt "Gumstix Carrier/Expansion Board"
         depends on ARCH_GUMSTIX
-        select PXA25x
+
+config GUMSTIX_AM200EPD
+        bool "Enable AM200EPD board support"
+
+endchoice
+
+config MACH_INTELMOTE2
+        bool "Intel Mote 2 Platform"
+        select PXA27x
+        select IWMMXT
+        select PXA_HAVE_BOARD_IRQS
 
 config ARCH_LUBBOCK
         bool "Intel DBPXA250 Development Platform"
@@ -199,6 +213,10 @@ config MACH_E800
 config TRIZEPS_PXA
         bool "PXA based Keith und Koep Trizeps DIMM-Modules"
 
+config MACH_H5000
+        bool "HP iPAQ h5000"
+        select PXA25x
+
 config MACH_TRIZEPS4
         bool "Keith und Koep Trizeps4 DIMM-Module"
         depends on TRIZEPS_PXA
@@ -283,7 +301,6 @@ config MACH_MIOA701
         bool "Mitac Mio A701 Support"
         select PXA27x
         select IWMMXT
-        select LEDS_GPIO
         select HAVE_PWM
         select GPIO_SYSFS
         help
@@ -342,10 +359,6 @@ config PCM990_DISPLAY_NONE
 
 endchoice
 
-config MACH_AM200EPD
-        depends on MACH_GUMSTIX_F
-        bool "Enable AM200EPD board support"
-
 config PXA_EZX
         bool "Motorola EZX Platform"
         select PXA27x
@@ -386,16 +399,25 @@ endmenu
 
 config PXA25x
         bool
+        select CPU_XSCALE
         help
           Select code specific to PXA21x/25x/26x variants
 
 config PXA27x
         bool
+        select CPU_XSCALE
         help
           Select code specific to PXA27x variants
 
+config CPU_PXA26x
+        bool
+        select PXA25x
+        help
+          Select code specific to PXA26x (codename Dalhart)
+
 config PXA3xx
         bool
+        select CPU_XSC3
         help
           Select code specific to PXA3xx variants
 
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index d64c68b232e3..7b28bb561d63 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -27,7 +27,7 @@ obj-$(CONFIG_CPU_PXA930)	+= pxa930.o
 
 # Specific board support
 obj-$(CONFIG_ARCH_GUMSTIX)      += gumstix.o
-obj-$(CONFIG_MACH_AM200EPD)     += am200epd.o
+obj-$(CONFIG_GUMSTIX_AM200EPD)  += am200epd.o
 obj-$(CONFIG_ARCH_LUBBOCK)      += lubbock.o
 obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
 obj-$(CONFIG_MACH_MAINSTONE)    += mainstone.o
@@ -35,6 +35,7 @@ obj-$(CONFIG_MACH_MP900C)	+= mp900.o
 obj-$(CONFIG_ARCH_PXA_IDP)      += idp.o
 obj-$(CONFIG_MACH_TRIZEPS4)     += trizeps4.o
 obj-$(CONFIG_MACH_COLIBRI)      += colibri.o
+obj-$(CONFIG_MACH_H5000)        += h5000.o
 obj-$(CONFIG_PXA_SHARP_C7xx)    += corgi.o sharpsl_pm.o corgi_pm.o
 obj-$(CONFIG_PXA_SHARP_Cxx00)   += spitz.o sharpsl_pm.o spitz_pm.o
 obj-$(CONFIG_CORGI_SSP_DEPRECATED)      += corgi_ssp.o corgi_lcd.o
@@ -69,6 +70,8 @@ obj-$(CONFIG_MACH_ARMCORE)      += cm-x2xx.o cm-x255.o cm-x270.o
 obj-$(CONFIG_MACH_CM_X300)      += cm-x300.o
 obj-$(CONFIG_PXA_EZX)           += ezx.o
 
+obj-$(CONFIG_MACH_INTELMOTE2)   += imote2.o
+
 # Support for blinky lights
 led-y := leds.o
 led-$(CONFIG_ARCH_LUBBOCK)      += leds-lubbock.o
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index b965085a37b9..77ee80e5e47b 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -30,8 +30,12 @@
 #include <linux/irq.h>
 #include <linux/gpio.h>
 
+#include <mach/gumstix.h>
+#include <mach/mfp-pxa25x.h>
 #include <mach/pxafb.h>
 
+#include "generic.h"
+
 #include <video/metronomefb.h>
 
 static unsigned int panel_type = 6;
@@ -331,7 +335,16 @@ static struct metronome_board am200_board = {
         .cleanup                = am200_cleanup,
 };
 
-static int __init am200_init(void)
+static unsigned long am200_pin_config[] __initdata = {
+        GPIO51_GPIO,
+        GPIO49_GPIO,
+        GPIO48_GPIO,
+        GPIO32_GPIO,
+        GPIO17_GPIO,
+        GPIO16_GPIO,
+};
+
+int __init am200_init(void)
 {
         int ret;
 
@@ -339,6 +352,8 @@ static int __init am200_init(void)
          * creation events */
         fb_register_client(&am200_fb_notif);
 
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(am200_pin_config));
+
         /* request our platform independent driver */
         request_module("metronomefb");
 
@@ -367,8 +382,6 @@ static int __init am200_init(void)
 module_param(panel_type, uint, 0);
 MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97");
 
-module_init(am200_init);
-
 MODULE_DESCRIPTION("board driver for am200 metronome epd kit");
 MODULE_AUTHOR("Jaya Kumar");
 MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index ca8e20538157..40b774084514 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -12,53 +12,16 @@
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 
+#include <asm/clkdev.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
 #include <mach/hardware.h>
 
 #include "devices.h"
 #include "generic.h"
 #include "clock.h"
 
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
 static DEFINE_SPINLOCK(clocks_lock);
 
-static struct clk *clk_lookup(struct device *dev, const char *id)
-{
-        struct clk *p;
-
-        list_for_each_entry(p, &clocks, node)
-                if (strcmp(id, p->name) == 0 && p->dev == dev)
-                        return p;
-
-        return NULL;
-}
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        p = clk_lookup(dev, id);
-        if (!p)
-                p = clk_lookup(NULL, id);
-        if (p)
-                clk = p;
-        mutex_unlock(&clocks_mutex);
-
-        if (!IS_ERR(clk) && clk->ops == NULL)
-                clk = clk->other;
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
 int clk_enable(struct clk *clk)
 {
         unsigned long flags;
@@ -116,37 +79,27 @@ const struct clkops clk_cken_ops = {
         .disable        = clk_cken_disable,
 };
 
-void clks_register(struct clk *clks, size_t num)
+void clks_register(struct clk_lookup *clks, size_t num)
 {
         int i;
 
-        mutex_lock(&clocks_mutex);
         for (i = 0; i < num; i++)
-                list_add(&clks[i].node, &clocks);
-        mutex_unlock(&clocks_mutex);
+                clkdev_add(&clks[i]);
 }
 
 int clk_add_alias(char *alias, struct device *alias_dev, char *id,
         struct device *dev)
 {
-        struct clk *r = clk_lookup(dev, id);
-        struct clk *new;
+        struct clk *r = clk_get(dev, id);
+        struct clk_lookup *l;
 
         if (!r)
                 return -ENODEV;
 
-        new = kzalloc(sizeof(struct clk), GFP_KERNEL);
-
-        if (!new)
-                return -ENOMEM;
-
-        new->name = alias;
-        new->dev = alias_dev;
-        new->other = r;
-
-        mutex_lock(&clocks_mutex);
-        list_add(&new->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-
+        l = clkdev_alloc(r, alias, alias_dev ? dev_name(alias_dev) : NULL);
+        clk_put(r);
+        if (!l)
+                return -ENODEV;
+        clkdev_add(l);
         return 0;
 }
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 73be795fe3bf..4e9c613c6767 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,6 +1,4 @@
-#include <linux/list.h>
-
-struct clk;
+#include <asm/clkdev.h>
 
 struct clkops {
         void                    (*enable)(struct clk *);
@@ -9,9 +7,6 @@ struct clkops {
 };
 
 struct clk {
-        struct list_head        node;
-        const char              *name;
-        struct device           *dev;
         const struct clkops     *ops;
         unsigned long           rate;
         unsigned int            cken;
@@ -20,41 +15,31 @@ struct clk {
         struct clk              *other;
 };
 
-#define INIT_CKEN(_name, _cken, _rate, _delay, _dev)    \
+#define INIT_CLKREG(_clk,_devname,_conname)             \
         {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
+                .clk            = _clk,                 \
+                .dev_id         = _devname,             \
+                .con_id         = _conname,             \
+        }
+
+#define DEFINE_CKEN(_name, _cken, _rate, _delay)        \
+struct clk clk_##_name = {                              \
                 .ops    = &clk_cken_ops,                \
                 .rate   = _rate,                        \
                 .cken   = CKEN_##_cken,                 \
                 .delay  = _delay,                       \
         }
 
-#define INIT_CK(_name, _cken, _ops, _dev)               \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
+#define DEFINE_CK(_name, _cken, _ops)                   \
+struct clk clk_##_name = {                              \
                 .ops    = _ops,                         \
                 .cken   = CKEN_##_cken,                 \
         }
 
-/*
- * This is a placeholder to alias one clock device+name pair
- * to another struct clk.
- */
-#define INIT_CKOTHER(_name, _other, _dev)               \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
-                .other  = _other,                       \
-        }
-
-#define INIT_CLK(_name, _ops, _rate, _delay, _dev)      \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
-                .ops    = _ops,                         \
-                .rate   = _rate,                        \
+#define DEFINE_CLK(_name, _ops, _rate, _delay)          \
+struct clk clk_##_name = {                              \
+                .ops    = _ops,                         \
+                .rate   = _rate,                        \
                 .delay  = _delay,                       \
         }
 
@@ -64,20 +49,16 @@ void clk_cken_enable(struct clk *clk);
 void clk_cken_disable(struct clk *clk);
 
 #ifdef CONFIG_PXA3xx
-#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev)  \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
+#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay)   \
+struct clk clk_##_name = {                              \
                 .ops    = &clk_pxa3xx_cken_ops,         \
                 .rate   = _rate,                        \
                 .cken   = CKEN_##_cken,                 \
                 .delay  = _delay,                       \
         }
 
-#define PXA3xx_CK(_name, _cken, _ops, _dev)             \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
+#define DEFINE_PXA3_CK(_name, _cken, _ops)              \
+struct clk clk_##_name = {                              \
                 .ops    = _ops,                         \
                 .cken   = CKEN_##_cken,                 \
         }
@@ -87,7 +68,7 @@ extern void clk_pxa3xx_cken_enable(struct clk *);
 extern void clk_pxa3xx_cken_disable(struct clk *);
 #endif
 
-void clks_register(struct clk *clks, size_t num);
+void clks_register(struct clk_lookup *clks, size_t num);
 int clk_add_alias(char *alias, struct device *alias_dev, char *id,
         struct device *dev);
 
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index 0b3ce3b6d896..d99fd9e4d888 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -210,10 +210,8 @@ static struct pxafb_mode_info generic_stn_320x240_mode = {
 static struct pxafb_mach_info generic_stn_320x240 = {
         .modes          = &generic_stn_320x240_mode,
         .num_modes      = 1,
-        .lccr0          = 0,
-        .lccr3          = (LCCR3_PixClkDiv(0x03) |
-                           LCCR3_Acb(0xff) |
-                           LCCR3_PCP),
+        .lcd_conn       = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\
+                          LCD_AC_BIAS_FREQ(0xff),
         .cmap_inverse   = 0,
         .cmap_static    = 0,
 };
@@ -236,10 +234,8 @@ static struct pxafb_mode_info generic_tft_640x480_mode = {
 static struct pxafb_mach_info generic_tft_640x480 = {
         .modes          = &generic_tft_640x480_mode,
         .num_modes      = 1,
-        .lccr0          = (LCCR0_PAS),
-        .lccr3          = (LCCR3_PixClkDiv(0x01) |
-                           LCCR3_Acb(0xff) |
-                           LCCR3_PCP),
+        .lcd_conn       = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\
+                          LCD_AC_BIAS_FREQ(0xff),
         .cmap_inverse   = 0,
         .cmap_static    = 0,
 };
@@ -263,9 +259,7 @@ static struct pxafb_mode_info generic_crt_640x480_mode = {
 static struct pxafb_mach_info generic_crt_640x480 = {
         .modes          = &generic_crt_640x480_mode,
         .num_modes      = 1,
-        .lccr0          = (LCCR0_PAS),
-        .lccr3          = (LCCR3_PixClkDiv(0x01) |
-                           LCCR3_Acb(0xff)),
+        .lcd_conn       = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
         .cmap_inverse   = 0,
         .cmap_static    = 0,
 };
@@ -289,9 +283,7 @@ static struct pxafb_mode_info generic_crt_800x600_mode = {
 static struct pxafb_mach_info generic_crt_800x600 = {
         .modes          = &generic_crt_800x600_mode,
         .num_modes      = 1,
-        .lccr0          = (LCCR0_PAS),
-        .lccr3          = (LCCR3_PixClkDiv(0x02) |
-                           LCCR3_Acb(0xff)),
+        .lcd_conn       = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
         .cmap_inverse   = 0,
         .cmap_static    = 0,
 };
@@ -314,10 +306,7 @@ static struct pxafb_mode_info generic_tft_320x240_mode = {
 static struct pxafb_mach_info generic_tft_320x240 = {
         .modes          = &generic_tft_320x240_mode,
         .num_modes      = 1,
-        .lccr0          = (LCCR0_PAS),
-        .lccr3          = (LCCR3_PixClkDiv(0x06) |
-                           LCCR3_Acb(0xff) |
-                           LCCR3_PCP),
+        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff),
         .cmap_inverse   = 0,
         .cmap_static    = 0,
 };
@@ -341,9 +330,7 @@ static struct pxafb_mode_info generic_stn_640x480_mode = {
 static struct pxafb_mach_info generic_stn_640x480 = {
         .modes          = &generic_stn_640x480_mode,
         .num_modes      = 1,
-        .lccr0          = 0,
-        .lccr3          = (LCCR3_PixClkDiv(0x02) |
-                           LCCR3_Acb(0xff)),
+        .lcd_conn       = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff),
         .cmap_inverse   = 0,
         .cmap_static    = 0,
 };
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index deb46cd144bf..ff0c577cd1ac 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -31,7 +31,6 @@
 #include <mach/mfp-pxa300.h>
 
 #include <mach/hardware.h>
-#include <mach/gpio.h>
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
 #include <mach/ohci.h>
@@ -137,6 +136,10 @@ static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
         GPIO82_GPIO | MFP_PULL_HIGH,    /* MMC CD */
         GPIO85_GPIO,                    /* MMC WP */
         GPIO99_GPIO,                    /* Ethernet IRQ */
+
+        /* Standard I2C */
+        GPIO21_I2C_SCL,
+        GPIO22_I2C_SDA,
 };
 
 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 65558d6aa220..c5e28a46b292 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -19,6 +19,7 @@
 #include <linux/fs.h>
 #include <linux/interrupt.h>
 #include <linux/mmc/host.h>
+#include <linux/mtd/physmap.h>
 #include <linux/pm.h>
 #include <linux/gpio.h>
 #include <linux/backlight.h>
@@ -541,11 +542,42 @@ err_free_1:
 static inline void corgi_init_spi(void) {}
 #endif
 
+static struct mtd_partition sharpsl_rom_parts[] = {
+        {
+                .name   ="Boot PROM Filesystem",
+                .offset = 0x00120000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data sharpsl_rom_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
+        .parts          = sharpsl_rom_parts,
+};
+
+static struct resource sharpsl_rom_resources[] = {
+        {
+                .start  = 0x00000000,
+                .end    = 0x007fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device sharpsl_rom_device = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .resource = sharpsl_rom_resources,
+        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
+        .dev.platform_data = &sharpsl_rom_data,
+};
+
 static struct platform_device *devices[] __initdata = {
         &corgiscoop_device,
         &corgifb_device,
         &corgikbd_device,
         &corgiled_device,
+        &sharpsl_rom_device,
 };
 
 static void corgi_poweroff(void)
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 1f272ea83f36..771dd4eac935 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -64,7 +64,7 @@ typedef struct {
 
 /* Define the refresh period in mSec for the SDRAM and the number of rows */
 #define SDRAM_TREF      64      /* standard 64ms SDRAM */
-#define SDRAM_ROWS      4096    /* 64MB=8192 32MB=4096 */
+static unsigned int sdram_rows;
 
 #define CCLKCFG_TURBO           0x1
 #define CCLKCFG_FCS             0x2
@@ -73,6 +73,9 @@ typedef struct {
 #define MDREFR_DB2_MASK         (MDREFR_K2DB2 | MDREFR_K1DB2)
 #define MDREFR_DRI_MASK         0xFFF
 
+#define MDCNFG_DRAC2(mdcnfg) (((mdcnfg) >> 21) & 0x3)
+#define MDCNFG_DRAC0(mdcnfg) (((mdcnfg) >> 5) & 0x3)
+
 /*
  * PXA255 definitions
  */
@@ -109,6 +112,10 @@ static struct cpufreq_frequency_table
 static struct cpufreq_frequency_table
         pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
 
+static unsigned int pxa255_turbo_table;
+module_param(pxa255_turbo_table, uint, 0);
+MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table, !0 = turbo table)");
+
 /*
  * PXA270 definitions
  *
@@ -158,22 +165,16 @@ static struct cpufreq_frequency_table
 
 extern unsigned get_clk_frequency_khz(int info);
 
-static void find_freq_tables(struct cpufreq_policy *policy,
-                             struct cpufreq_frequency_table **freq_table,
+static void find_freq_tables(struct cpufreq_frequency_table **freq_table,
                              pxa_freqs_t **pxa_freqs)
 {
         if (cpu_is_pxa25x()) {
-                if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
+                if (!pxa255_turbo_table) {
                         *pxa_freqs = pxa255_run_freqs;
                         *freq_table = pxa255_run_freq_table;
-                } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
+                } else {
                         *pxa_freqs = pxa255_turbo_freqs;
                         *freq_table = pxa255_turbo_freq_table;
-                } else {
-                        printk("CPU PXA: Unknown policy found. "
-                               "Using CPUFREQ_POLICY_PERFORMANCE\n");
-                        *pxa_freqs = pxa255_run_freqs;
-                        *freq_table = pxa255_run_freq_table;
                 }
         }
         if (cpu_is_pxa27x()) {
@@ -194,14 +195,28 @@ static void pxa27x_guess_max_freq(void)
         }
 }
 
+static void init_sdram_rows(void)
+{
+        uint32_t mdcnfg = MDCNFG;
+        unsigned int drac2 = 0, drac0 = 0;
+
+        if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3))
+                drac2 = MDCNFG_DRAC2(mdcnfg);
+
+        if (mdcnfg & (MDCNFG_DE0 | MDCNFG_DE1))
+                drac0 = MDCNFG_DRAC0(mdcnfg);
+
+        sdram_rows = 1 << (11 + max(drac0, drac2));
+}
+
 static u32 mdrefr_dri(unsigned int freq)
 {
         u32 dri = 0;
 
         if (cpu_is_pxa25x())
-                dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS * 32));
+                dri = ((freq * SDRAM_TREF) / (sdram_rows * 32));
         if (cpu_is_pxa27x())
-                dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS - 31)) / 32;
+                dri = ((freq * SDRAM_TREF) / (sdram_rows - 31)) / 32;
         return dri;
 }
 
@@ -212,7 +227,7 @@ static int pxa_verify_policy(struct cpufreq_policy *policy)
         pxa_freqs_t *pxa_freqs;
         int ret;
 
-        find_freq_tables(policy, &pxa_freqs_table, &pxa_freqs);
+        find_freq_tables(&pxa_freqs_table, &pxa_freqs);
         ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
 
         if (freq_debug)
@@ -240,7 +255,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
         unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
 
         /* Get the current policy */
-        find_freq_tables(policy, &pxa_freqs_table, &pxa_freq_settings);
+        find_freq_tables(&pxa_freqs_table, &pxa_freq_settings);
 
         /* Lookup the next frequency */
         if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
@@ -329,11 +344,15 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
 {
         int i;
         unsigned int freq;
+        struct cpufreq_frequency_table *pxa255_freq_table;
+        pxa_freqs_t *pxa255_freqs;
 
         /* try to guess pxa27x cpu */
         if (cpu_is_pxa27x())
                 pxa27x_guess_max_freq();
 
+        init_sdram_rows();
+
         /* set default policy and cpuinfo */
         policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
         policy->cur = get_clk_frequency_khz(0);    /* current freq */
@@ -354,6 +373,8 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
         }
         pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
 
+        pxa255_turbo_table = !!pxa255_turbo_table;
+
         /* Generate the pxa27x cpufreq_frequency_table struct */
         for (i = 0; i < NUM_PXA27x_FREQS; i++) {
                 freq = pxa27x_freqs[i].khz;
@@ -368,8 +389,12 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
          * Set the policy's minimum and maximum frequencies from the tables
          * just constructed.  This sets cpuinfo.mxx_freq, min and max.
          */
-        if (cpu_is_pxa25x())
-                cpufreq_frequency_table_cpuinfo(policy, pxa255_run_freq_table);
+        if (cpu_is_pxa25x()) {
+                find_freq_tables(&pxa255_freq_table, &pxa255_freqs);
+                pr_info("PXA255 cpufreq using %s frequency table\n",
+                        pxa255_turbo_table ? "turbo" : "run");
+                cpufreq_frequency_table_cpuinfo(policy, pxa255_freq_table);
+        }
         else if (cpu_is_pxa27x())
                 cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table);
 
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 35736fc08634..e16f8e3d58d3 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -4,13 +4,12 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 
-#include <mach/gpio.h>
+#include <mach/pxa-regs.h>
 #include <mach/udc.h>
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
 #include <mach/irda.h>
 #include <mach/i2c.h>
-#include <mach/mfp-pxa27x.h>
 #include <mach/ohci.h>
 #include <mach/pxa27x_keypad.h>
 #include <mach/pxa2xx_spi.h>
@@ -156,8 +155,8 @@ void __init set_pxa_fb_parent(struct device *parent_dev)
 
 static struct resource pxa_resource_ffuart[] = {
         {
-                .start  = __PREG(FFUART),
-                .end    = __PREG(FFUART) + 35,
+                .start  = 0x40100000,
+                .end    = 0x40100023,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IRQ_FFUART,
@@ -175,8 +174,8 @@ struct platform_device pxa_device_ffuart= {
 
 static struct resource pxa_resource_btuart[] = {
         {
-                .start  = __PREG(BTUART),
-                .end    = __PREG(BTUART) + 35,
+                .start  = 0x40200000,
+                .end    = 0x40200023,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IRQ_BTUART,
@@ -194,8 +193,8 @@ struct platform_device pxa_device_btuart = {
 
 static struct resource pxa_resource_stuart[] = {
         {
-                .start  = __PREG(STUART),
-                .end    = __PREG(STUART) + 35,
+                .start  = 0x40700000,
+                .end    = 0x40700023,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IRQ_STUART,
@@ -213,8 +212,8 @@ struct platform_device pxa_device_stuart = {
 
 static struct resource pxa_resource_hwuart[] = {
         {
-                .start  = __PREG(HWUART),
-                .end    = __PREG(HWUART) + 47,
+                .start  = 0x41600000,
+                .end    = 0x4160002F,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IRQ_HWUART,
@@ -249,18 +248,53 @@ struct platform_device pxa_device_i2c = {
         .num_resources  = ARRAY_SIZE(pxai2c_resources),
 };
 
-static unsigned long pxa27x_i2c_mfp_cfg[] = {
-        GPIO117_I2C_SCL,
-        GPIO118_I2C_SDA,
-};
-
 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
 {
-        if (cpu_is_pxa27x())
-                pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
         pxa_register_device(&pxa_device_i2c, info);
 }
 
+#ifdef CONFIG_PXA27x
+static struct resource pxa27x_resources_i2c_power[] = {
+        {
+                .start  = 0x40f00180,
+                .end    = 0x40f001a3,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_PWRI2C,
+                .end    = IRQ_PWRI2C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa27x_device_i2c_power = {
+        .name           = "pxa2xx-i2c",
+        .id             = 1,
+        .resource       = pxa27x_resources_i2c_power,
+        .num_resources  = ARRAY_SIZE(pxa27x_resources_i2c_power),
+};
+#endif
+
+#ifdef CONFIG_PXA3xx
+static struct resource pxa3xx_resources_i2c_power[] = {
+        {
+                .start  = 0x40f500c0,
+                .end    = 0x40f500d3,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_PWRI2C,
+                .end    = IRQ_PWRI2C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa3xx_device_i2c_power = {
+        .name           = "pxa2xx-i2c",
+        .id             = 1,
+        .resource       = pxa3xx_resources_i2c_power,
+        .num_resources  = ARRAY_SIZE(pxa3xx_resources_i2c_power),
+};
+#endif
+
 static struct resource pxai2s_resources[] = {
         {
                 .start  = 0x40400000,
@@ -296,11 +330,36 @@ void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
         pxa_register_device(&pxa_device_ficp, info);
 }
 
-struct platform_device pxa_device_rtc = {
+static struct resource pxa_rtc_resources[] = {
+        [0] = {
+                .start  = 0x40900000,
+                .end    = 0x40900000 + 0x3b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_RTC1Hz,
+                .end    = IRQ_RTC1Hz,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_RTCAlrm,
+                .end    = IRQ_RTCAlrm,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device sa1100_device_rtc = {
         .name           = "sa1100-rtc",
         .id             = -1,
 };
 
+struct platform_device pxa_device_rtc = {
+        .name           = "pxa-rtc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(pxa_rtc_resources),
+        .resource       = pxa_rtc_resources,
+};
+
 static struct resource pxa_ac97_resources[] = {
         [0] = {
                 .start  = 0x40500000,
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index bb04af4b0aa3..ecc24a4dca6d 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -11,6 +11,7 @@ extern struct platform_device pxa_device_hwuart;
 extern struct platform_device pxa_device_i2c;
 extern struct platform_device pxa_device_i2s;
 extern struct platform_device pxa_device_ficp;
+extern struct platform_device sa1100_device_rtc;
 extern struct platform_device pxa_device_rtc;
 extern struct platform_device pxa_device_ac97;
 
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c
index c0be17e0ab82..b1514fb20d3a 100644
--- a/arch/arm/mach-pxa/dma.c
+++ b/arch/arm/mach-pxa/dma.c
@@ -21,7 +21,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 #include <mach/pxa-regs.h>
 
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c
index d488eded2058..1bd7f740427c 100644
--- a/arch/arm/mach-pxa/e330.c
+++ b/arch/arm/mach-pxa/e330.c
@@ -1,5 +1,5 @@
 /*
- * Hardware definitions for the Toshiba eseries PDAs
+ * Hardware definitions for the Toshiba e330 PDAs
  *
  * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
  *
@@ -12,6 +12,9 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/tc6387xb.h>
 
 #include <asm/setup.h>
 #include <asm/mach/arch.h>
@@ -19,13 +22,44 @@
 
 #include <mach/mfp-pxa25x.h>
 #include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/eseries-gpio.h>
 #include <mach/udc.h>
 
 #include "generic.h"
 #include "eseries.h"
+#include "clock.h"
+
+/* -------------------- e330 tc6387xb parameters -------------------- */
+
+static struct tc6387xb_platform_data e330_tc6387xb_info = {
+        .enable   = &eseries_tmio_enable,
+        .disable  = &eseries_tmio_disable,
+        .suspend  = &eseries_tmio_suspend,
+        .resume   = &eseries_tmio_resume,
+};
+
+static struct platform_device e330_tc6387xb_device = {
+        .name           = "tc6387xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e330_tc6387xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* --------------------------------------------------------------- */
+
+static struct platform_device *devices[] __initdata = {
+        &e330_tc6387xb_device,
+};
 
 static void __init e330_init(void)
 {
+        eseries_register_clks();
+        eseries_get_tmio_gpios();
+        platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_udc_info(&e7xx_udc_mach_info);
 }
 
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c
index 8ecbc5479828..251129391d7d 100644
--- a/arch/arm/mach-pxa/e350.c
+++ b/arch/arm/mach-pxa/e350.c
@@ -1,5 +1,5 @@
 /*
- * Hardware definitions for the Toshiba eseries PDAs
+ * Hardware definitions for the Toshiba e350 PDAs
  *
  * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
  *
@@ -12,20 +12,54 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/t7l66xb.h>
 
 #include <asm/setup.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
 #include <mach/mfp-pxa25x.h>
+#include <mach/pxa-regs.h>
 #include <mach/hardware.h>
+#include <mach/eseries-gpio.h>
 #include <mach/udc.h>
 
 #include "generic.h"
 #include "eseries.h"
+#include "clock.h"
+
+/* -------------------- e350 t7l66xb parameters -------------------- */
+
+static struct t7l66xb_platform_data e350_t7l66xb_info = {
+        .irq_base               = IRQ_BOARD_START,
+        .enable                 = &eseries_tmio_enable,
+        .suspend                = &eseries_tmio_suspend,
+        .resume                 = &eseries_tmio_resume,
+};
+
+static struct platform_device e350_t7l66xb_device = {
+        .name           = "t7l66xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e350_t7l66xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* ---------------------------------------------------------- */
+
+static struct platform_device *devices[] __initdata = {
+        &e350_t7l66xb_device,
+};
 
 static void __init e350_init(void)
 {
+        eseries_register_clks();
+        eseries_get_tmio_gpios();
+        platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_udc_info(&e7xx_udc_mach_info);
 }
 
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c
index 544bbaa20621..bed0336aca3d 100644
--- a/arch/arm/mach-pxa/e400.c
+++ b/arch/arm/mach-pxa/e400.c
@@ -12,20 +12,26 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/t7l66xb.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
 
 #include <asm/setup.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
-#include <mach/pxa-regs.h>
 #include <mach/mfp-pxa25x.h>
+#include <mach/pxa-regs.h>
 #include <mach/hardware.h>
-
+#include <mach/eseries-gpio.h>
 #include <mach/pxafb.h>
 #include <mach/udc.h>
 
 #include "generic.h"
 #include "eseries.h"
+#include "clock.h"
 
 /* ------------------------ E400 LCD definitions ------------------------ */
 
@@ -46,7 +52,7 @@ static struct pxafb_mode_info e400_pxafb_mode_info = {
 static struct pxafb_mach_info e400_pxafb_mach_info = {
         .modes          = &e400_pxafb_mode_info,
         .num_modes      = 1,
-        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP,
         .lccr3          = 0,
         .pxafb_backlight_power  = NULL,
 };
@@ -65,7 +71,10 @@ static unsigned long e400_pin_config[] __initdata = {
         GPIO42_BTUART_RXD,
         GPIO43_BTUART_TXD,
         GPIO44_BTUART_CTS,
-        GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
+
+        /* TMIO controller */
+        GPIO19_GPIO, /* t7l66xb #PCLR */
+        GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
 
         /* wakeup */
         GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
@@ -73,10 +82,60 @@ static unsigned long e400_pin_config[] __initdata = {
 
 /* ---------------------------------------------------------------------- */
 
+static struct mtd_partition partition_a = {
+        .name = "Internal NAND flash",
+        .offset =  0,
+        .size =  MTDPART_SIZ_FULL,
+};
+
+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
+
+static struct nand_bbt_descr e400_t7l66xb_nand_bbt = {
+        .options = 0,
+        .offs = 4,
+        .len = 2,
+        .pattern = scan_ff_pattern
+};
+
+static struct tmio_nand_data e400_t7l66xb_nand_config = {
+        .num_partitions = 1,
+        .partition = &partition_a,
+        .badblock_pattern = &e400_t7l66xb_nand_bbt,
+};
+
+static struct t7l66xb_platform_data e400_t7l66xb_info = {
+        .irq_base               = IRQ_BOARD_START,
+        .enable                 = &eseries_tmio_enable,
+        .suspend                = &eseries_tmio_suspend,
+        .resume                 = &eseries_tmio_resume,
+
+        .nand_data              = &e400_t7l66xb_nand_config,
+};
+
+static struct platform_device e400_t7l66xb_device = {
+        .name           = "t7l66xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e400_t7l66xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* ---------------------------------------------------------- */
+
+static struct platform_device *devices[] __initdata = {
+        &e400_t7l66xb_device,
+};
+
 static void __init e400_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
+        /* Fixme - e400 may have a switched clock */
+        eseries_register_clks();
+        eseries_get_tmio_gpios();
         set_pxa_fb_info(&e400_pxafb_mach_info);
+        platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_udc_info(&e7xx_udc_mach_info);
 }
 
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index c57a15b37f0d..b00d670b2ea6 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -15,6 +15,8 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/fb.h>
+#include <linux/clk.h>
+#include <linux/mfd/t7l66xb.h>
 
 #include <video/w100fb.h>
 
@@ -23,12 +25,16 @@
 #include <asm/mach-types.h>
 
 #include <mach/mfp-pxa25x.h>
+#include <mach/pxa-regs.h>
 #include <mach/hardware.h>
+#include <mach/eseries-gpio.h>
 #include <mach/udc.h>
+#include <mach/irda.h>
 
 #include "generic.h"
 #include "eseries.h"
-
+#include "clock.h"
+#include "devices.h"
 
 /* ------------------------ e740 video support --------------------------- */
 
@@ -116,7 +122,17 @@ static unsigned long e740_pin_config[] __initdata = {
         GPIO42_BTUART_RXD,
         GPIO43_BTUART_TXD,
         GPIO44_BTUART_CTS,
-        GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
+
+        /* TMIO controller */
+        GPIO19_GPIO, /* t7l66xb #PCLR */
+        GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
+
+        /* UDC */
+        GPIO13_GPIO,
+        GPIO3_GPIO,
+
+        /* IrDA */
+        GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
         /* PC Card */
         GPIO8_GPIO,   /* CD0 */
@@ -142,17 +158,43 @@ static unsigned long e740_pin_config[] __initdata = {
         GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
 };
 
+/* -------------------- e740 t7l66xb parameters -------------------- */
+
+static struct t7l66xb_platform_data e740_t7l66xb_info = {
+        .irq_base               = IRQ_BOARD_START,
+        .enable                 = &eseries_tmio_enable,
+        .suspend                = &eseries_tmio_suspend,
+        .resume                 = &eseries_tmio_resume,
+};
+
+static struct platform_device e740_t7l66xb_device = {
+        .name           = "t7l66xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e740_t7l66xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
 /* ----------------------------------------------------------------------- */
 
 static struct platform_device *devices[] __initdata = {
         &e740_fb_device,
+        &e740_t7l66xb_device,
 };
 
 static void __init e740_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
+        eseries_register_clks();
+        clk_add_alias("CLK_CK48M", &e740_t7l66xb_device.dev,
+                        "UDCCLK", &pxa25x_device_udc.dev),
+        eseries_get_tmio_gpios();
         platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_udc_info(&e7xx_udc_mach_info);
+        e7xx_irda_init();
+        pxa_set_ficp_info(&e7xx_ficp_platform_data);
 }
 
 MACHINE_START(E740, "Toshiba e740")
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index 640e738b85df..84d7c1aac58d 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -15,6 +15,7 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/fb.h>
+#include <linux/mfd/tc6393xb.h>
 
 #include <video/w100fb.h>
 
@@ -23,11 +24,15 @@
 #include <asm/mach-types.h>
 
 #include <mach/mfp-pxa25x.h>
+#include <mach/pxa-regs.h>
 #include <mach/hardware.h>
+#include <mach/eseries-gpio.h>
 #include <mach/udc.h>
+#include <mach/irda.h>
 
 #include "generic.h"
 #include "eseries.h"
+#include "clock.h"
 
 /* ---------------------- E750 LCD definitions -------------------- */
 
@@ -100,16 +105,45 @@ static struct platform_device e750_fb_device = {
         .resource       = e750_fb_resources,
 };
 
-/* ----------------------------------------------------------------------- */
+/* ----------------- e750 tc6393xb parameters ------------------ */
+
+static struct tc6393xb_platform_data e750_tc6393xb_info = {
+        .irq_base       = IRQ_BOARD_START,
+        .scr_pll2cr     = 0x0cc1,
+        .scr_gper       = 0,
+        .gpio_base      = -1,
+        .suspend        = &eseries_tmio_suspend,
+        .resume         = &eseries_tmio_resume,
+        .enable         = &eseries_tmio_enable,
+        .disable        = &eseries_tmio_disable,
+};
+
+static struct platform_device e750_tc6393xb_device = {
+        .name           = "tc6393xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e750_tc6393xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* ------------------------------------------------------------- */
 
 static struct platform_device *devices[] __initdata = {
         &e750_fb_device,
+        &e750_tc6393xb_device,
 };
 
 static void __init e750_init(void)
 {
+        clk_add_alias("CLK_CK3P6MI", &e750_tc6393xb_device.dev,
+                        "GPIO11_CLK", NULL),
+        eseries_get_tmio_gpios();
         platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_udc_info(&e7xx_udc_mach_info);
+        e7xx_irda_init();
+        pxa_set_ficp_info(&e7xx_ficp_platform_data);
 }
 
 MACHINE_START(E750, "Toshiba e750")
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c
index a293e09bfe25..9a86a426f924 100644
--- a/arch/arm/mach-pxa/e800.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -15,6 +15,7 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/fb.h>
+#include <linux/mfd/tc6393xb.h>
 
 #include <video/w100fb.h>
 
@@ -23,12 +24,14 @@
 #include <asm/mach-types.h>
 
 #include <mach/mfp-pxa25x.h>
+#include <mach/pxa-regs.h>
 #include <mach/hardware.h>
 #include <mach/eseries-gpio.h>
 #include <mach/udc.h>
 
 #include "generic.h"
 #include "eseries.h"
+#include "clock.h"
 
 /* ------------------------ e800 LCD definitions ------------------------- */
 
@@ -160,14 +163,41 @@ static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
         .gpio_pullup_inverted = 1
 };
 
+/* ----------------- e800 tc6393xb parameters ------------------ */
+
+static struct tc6393xb_platform_data e800_tc6393xb_info = {
+        .irq_base       = IRQ_BOARD_START,
+        .scr_pll2cr     = 0x0cc1,
+        .scr_gper       = 0,
+        .gpio_base      = -1,
+        .suspend        = &eseries_tmio_suspend,
+        .resume         = &eseries_tmio_resume,
+        .enable         = &eseries_tmio_enable,
+        .disable        = &eseries_tmio_disable,
+};
+
+static struct platform_device e800_tc6393xb_device = {
+        .name           = "tc6393xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e800_tc6393xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
 /* ----------------------------------------------------------------------- */
 
 static struct platform_device *devices[] __initdata = {
         &e800_fb_device,
+        &e800_tc6393xb_device,
 };
 
 static void __init e800_init(void)
 {
+        clk_add_alias("CLK_CK3P6MI", &e800_tc6393xb_device.dev,
+                        "GPIO11_CLK", NULL),
+        eseries_get_tmio_gpios();
         platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_udc_info(&e800_udc_mach_info);
 }
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index d28849b50a14..dfce7d5b659e 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -12,6 +12,9 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
 
 #include <asm/setup.h>
 #include <asm/mach/arch.h>
@@ -21,8 +24,10 @@
 #include <mach/hardware.h>
 #include <mach/eseries-gpio.h>
 #include <mach/udc.h>
+#include <mach/irda.h>
 
 #include "generic.h"
+#include "clock.h"
 
 /* Only e800 has 128MB RAM */
 void __init eseries_fixup(struct machine_desc *desc,
@@ -43,3 +48,122 @@ struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
         .gpio_pullup_inverted = 1
 };
 
+static void e7xx_irda_transceiver_mode(struct device *dev, int mode)
+{
+        if (mode & IR_OFF) {
+                gpio_set_value(GPIO_E7XX_IR_OFF, 1);
+                pxa2xx_transceiver_mode(dev, mode);
+        } else {
+                pxa2xx_transceiver_mode(dev, mode);
+                gpio_set_value(GPIO_E7XX_IR_OFF, 0);
+        }
+}
+
+int e7xx_irda_init(void)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_E7XX_IR_OFF, "IrDA power");
+        if (ret)
+                goto out;
+
+        ret = gpio_direction_output(GPIO_E7XX_IR_OFF, 0);
+        if (ret)
+                goto out;
+
+        e7xx_irda_transceiver_mode(NULL, IR_SIRMODE | IR_OFF);
+out:
+        return ret;
+}
+
+static void e7xx_irda_shutdown(struct device *dev)
+{
+        e7xx_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF);
+        gpio_free(GPIO_E7XX_IR_OFF);
+}
+
+struct pxaficp_platform_data e7xx_ficp_platform_data = {
+        .transceiver_cap  = IR_SIRMODE | IR_OFF,
+        .transceiver_mode = e7xx_irda_transceiver_mode,
+        .shutdown = e7xx_irda_shutdown,
+};
+
+int eseries_tmio_enable(struct platform_device *dev)
+{
+        /* Reset - bring SUSPEND high before PCLR */
+        gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
+        gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
+        msleep(1);
+        gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
+        msleep(1);
+        gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 1);
+        msleep(1);
+        return 0;
+}
+
+int eseries_tmio_disable(struct platform_device *dev)
+{
+        gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
+        gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
+        return 0;
+}
+
+int eseries_tmio_suspend(struct platform_device *dev)
+{
+        gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
+        return 0;
+}
+
+int eseries_tmio_resume(struct platform_device *dev)
+{
+        gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
+        msleep(1);
+        return 0;
+}
+
+void eseries_get_tmio_gpios(void)
+{
+        gpio_request(GPIO_ESERIES_TMIO_SUSPEND, NULL);
+        gpio_request(GPIO_ESERIES_TMIO_PCLR, NULL);
+        gpio_direction_output(GPIO_ESERIES_TMIO_SUSPEND, 0);
+        gpio_direction_output(GPIO_ESERIES_TMIO_PCLR, 0);
+}
+
+/* TMIO controller uses the same resources on all e-series machines. */
+struct resource eseries_tmio_resources[] = {
+        [0] = {
+                .start  = PXA_CS4_PHYS,
+                .end    = PXA_CS4_PHYS + 0x1fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
+                .end    = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+/* Some e-series hardware cannot control the 32K clock */
+static void clk_32k_dummy(struct clk *clk)
+{
+}
+
+static const struct clkops clk_32k_dummy_ops = {
+        .enable         = clk_32k_dummy,
+        .disable        = clk_32k_dummy,
+};
+
+static struct clk tmio_dummy_clk = {
+        .ops    = &clk_32k_dummy_ops,
+        .rate   = 32768,
+};
+
+static struct clk_lookup eseries_clkregs[] = {
+        INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"),
+};
+
+void eseries_register_clks(void)
+{
+        clks_register(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
+}
+
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h
index a83f88d4b6ad..5930f5e2a123 100644
--- a/arch/arm/mach-pxa/eseries.h
+++ b/arch/arm/mach-pxa/eseries.h
@@ -2,3 +2,15 @@ void __init eseries_fixup(struct machine_desc *desc,
         struct tag *tags, char **cmdline, struct meminfo *mi);
 
 extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info;
+extern struct pxaficp_platform_data e7xx_ficp_platform_data;
+extern int e7xx_irda_init(void);
+
+extern int eseries_tmio_enable(struct platform_device *dev);
+extern int eseries_tmio_disable(struct platform_device *dev);
+extern int eseries_tmio_suspend(struct platform_device *dev);
+extern int eseries_tmio_resume(struct platform_device *dev);
+extern void eseries_get_tmio_gpios(void);
+extern struct resource eseries_tmio_resources[];
+extern struct platform_device e300_tc6387xb_device;
+extern void eseries_register_clks(void);
+
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index cc3d850cc0b6..df5f822f3b6c 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -16,11 +16,14 @@
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 #include <linux/pwm_backlight.h>
+#include <linux/input.h>
 
 #include <asm/setup.h>
 #include <mach/pxafb.h>
 #include <mach/ohci.h>
 #include <mach/i2c.h>
+#include <mach/hardware.h>
+#include <mach/pxa27x_keypad.h>
 
 #include <mach/mfp-pxa27x.h>
 #include <mach/pxa-regs.h>
@@ -101,120 +104,732 @@ static unsigned long ezx_pin_config[] __initdata = {
         GPIO44_BTUART_CTS,
         GPIO45_BTUART_RTS,
 
-        /* STUART */
-        GPIO46_STUART_RXD,
-        GPIO47_STUART_TXD,
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
 
-        /* For A780 support (connected with Neptune GSM chip) */
-        GPIO30_USB_P3_2,        /* ICL_TXENB */
-        GPIO31_USB_P3_6,        /* ICL_VPOUT */
-        GPIO90_USB_P3_5,        /* ICL_VPIN */
-        GPIO91_USB_P3_1,        /* ICL_XRXD */
-        GPIO56_USB_P3_4,        /* ICL_VMOUT */
-        GPIO113_USB_P3_3,       /* /ICL_VMIN */
+        /* PCAP SSP */
+        GPIO29_SSP1_SCLK,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+        GPIO24_GPIO,                            /* pcap chip select */
+        GPIO1_GPIO,                             /* pcap interrupt */
+        GPIO4_GPIO,                             /* WDI_AP */
+        GPIO55_GPIO,                            /* SYS_RESTART */
+
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+        GPIO11_GPIO,                            /* mmc detect */
+
+        /* usb to external transceiver */
+        GPIO34_USB_P2_2,
+        GPIO35_USB_P2_1,
+        GPIO36_USB_P2_4,
+        GPIO39_USB_P2_6,
+        GPIO40_USB_P2_5,
+        GPIO53_USB_P2_3,
+
+        /* usb to Neptune GSM chip */
+        GPIO30_USB_P3_2,
+        GPIO31_USB_P3_6,
+        GPIO90_USB_P3_5,
+        GPIO91_USB_P3_1,
+        GPIO56_USB_P3_4,
+        GPIO113_USB_P3_3,
+};
+
+#if defined(CONFIG_MACH_EZX_A780) || defined(CONFIG_MACH_EZX_E680)
+static unsigned long gen1_pin_config[] __initdata = {
+        /* flip / lockswitch */
+        GPIO12_GPIO,
+
+        /* bluetooth (bcm2035) */
+        GPIO14_GPIO | WAKEUP_ON_LEVEL_HIGH,     /* HOSTWAKE */
+        GPIO48_GPIO,                            /* RESET */
+        GPIO28_GPIO,                            /* WAKEUP */
+
+        /* Neptune handshake */
+        GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH,      /* BP_RDY */
+        GPIO57_GPIO,                            /* AP_RDY */
+        GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH,     /* WDI */
+        GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH,      /* WDI2 */
+        GPIO82_GPIO,                            /* RESET */
+        GPIO99_GPIO,                            /* TC_MM_EN */
+
+        /* sound */
+        GPIO52_SSP3_SCLK,
+        GPIO83_SSP3_SFRM,
+        GPIO81_SSP3_TXD,
+        GPIO89_SSP3_RXD,
+
+        /* ssp2 pins to in */
+        GPIO22_GPIO,                            /* SSP2_SCLK */
+        GPIO37_GPIO,                            /* SSP2_SFRM */
+        GPIO38_GPIO,                            /* SSP2_TXD */
+        GPIO88_GPIO,                            /* SSP2_RXD */
+
+        /* camera */
+        GPIO23_CIF_MCLK,
+        GPIO54_CIF_PCLK,
+        GPIO85_CIF_LV,
+        GPIO84_CIF_FV,
+        GPIO27_CIF_DD_0,
+        GPIO114_CIF_DD_1,
+        GPIO51_CIF_DD_2,
+        GPIO115_CIF_DD_3,
+        GPIO95_CIF_DD_4,
+        GPIO94_CIF_DD_5,
+        GPIO17_CIF_DD_6,
+        GPIO108_CIF_DD_7,
+        GPIO50_GPIO,                            /* CAM_EN */
+        GPIO19_GPIO,                            /* CAM_RST */
+
+        /* EMU */
+        GPIO120_GPIO,                           /* EMU_MUX1 */
+        GPIO119_GPIO,                           /* EMU_MUX2 */
+        GPIO86_GPIO,                            /* SNP_INT_CTL */
+        GPIO87_GPIO,                            /* SNP_INT_IN */
+};
+#endif
+
+#if defined(CONFIG_MACH_EZX_A1200) || defined(CONFIG_MACH_EZX_A910) || \
+        defined(CONFIG_MACH_EZX_E2) || defined(CONFIG_MACH_EZX_E6)
+static unsigned long gen2_pin_config[] __initdata = {
+        /* flip / lockswitch */
+        GPIO15_GPIO,
+
+        /* EOC */
+        GPIO10_GPIO,
+
+        /* bluetooth (bcm2045) */
+        GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH,     /* HOSTWAKE */
+        GPIO37_GPIO,                            /* RESET */
+        GPIO57_GPIO,                            /* WAKEUP */
+
+        /* Neptune handshake */
+        GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH,      /* BP_RDY */
+        GPIO96_GPIO,                            /* AP_RDY */
+        GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH,      /* WDI */
+        GPIO116_GPIO,                           /* RESET */
+        GPIO41_GPIO,                            /* BP_FLASH */
+
+        /* sound */
+        GPIO52_SSP3_SCLK,
+        GPIO83_SSP3_SFRM,
+        GPIO81_SSP3_TXD,
+        GPIO82_SSP3_RXD,
+
+        /* ssp2 pins to in */
+        GPIO22_GPIO,                            /* SSP2_SCLK */
+        GPIO14_GPIO,                            /* SSP2_SFRM */
+        GPIO38_GPIO,                            /* SSP2_TXD */
+        GPIO88_GPIO,                            /* SSP2_RXD */
+
+        /* camera */
+        GPIO23_CIF_MCLK,
+        GPIO54_CIF_PCLK,
+        GPIO85_CIF_LV,
+        GPIO84_CIF_FV,
+        GPIO27_CIF_DD_0,
+        GPIO114_CIF_DD_1,
+        GPIO51_CIF_DD_2,
+        GPIO115_CIF_DD_3,
+        GPIO95_CIF_DD_4,
+        GPIO48_CIF_DD_5,
+        GPIO93_CIF_DD_6,
+        GPIO12_CIF_DD_7,
+        GPIO50_GPIO,                            /* CAM_EN */
+        GPIO28_GPIO,                            /* CAM_RST */
+        GPIO17_GPIO,                            /* CAM_FLASH */
+};
+#endif
+
+#ifdef CONFIG_MACH_EZX_A780
+static unsigned long a780_pin_config[] __initdata = {
+        /* keypad */
+        GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+        GPIO106_KP_MKOUT_3,
+        GPIO107_KP_MKOUT_4,
+
+        /* attenuate sound */
+        GPIO96_GPIO,
+};
+#endif
+
+#ifdef CONFIG_MACH_EZX_E680
+static unsigned long e680_pin_config[] __initdata = {
+        /* keypad */
+        GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO96_KP_DKIN_3 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO97_KP_DKIN_4 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO98_KP_DKIN_5 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+        GPIO106_KP_MKOUT_3,
+
+        /* MIDI */
+        GPIO79_GPIO,                            /* VA_SEL_BUL */
+        GPIO80_GPIO,                            /* FLT_SEL_BUL */
+        GPIO78_GPIO,                            /* MIDI_RESET */
+        GPIO33_GPIO,                            /* MIDI_CS */
+        GPIO15_GPIO,                            /* MIDI_IRQ */
+        GPIO49_GPIO,                            /* MIDI_NPWE */
+        GPIO18_GPIO,                            /* MIDI_RDY */
+
+        /* leds */
+        GPIO46_GPIO,
+        GPIO47_GPIO,
+};
+#endif
+
+#ifdef CONFIG_MACH_EZX_A1200
+static unsigned long a1200_pin_config[] __initdata = {
+        /* keypad */
+        GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+        GPIO106_KP_MKOUT_3,
+        GPIO107_KP_MKOUT_4,
+        GPIO108_KP_MKOUT_5,
+};
+#endif
+
+#ifdef CONFIG_MACH_EZX_A910
+static unsigned long a910_pin_config[] __initdata = {
+        /* keypad */
+        GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+        GPIO106_KP_MKOUT_3,
+        GPIO107_KP_MKOUT_4,
+        GPIO108_KP_MKOUT_5,
+
+        /* WLAN */
+        GPIO89_GPIO,                            /* RESET */
+        GPIO33_GPIO,                            /* WAKEUP */
+        GPIO94_GPIO | WAKEUP_ON_LEVEL_HIGH,     /* HOSTWAKE */
+
+        /* MMC CS */
+        GPIO20_GPIO,
+};
+#endif
+
+#ifdef CONFIG_MACH_EZX_E2
+static unsigned long e2_pin_config[] __initdata = {
+        /* keypad */
+        GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+        GPIO106_KP_MKOUT_3,
+        GPIO107_KP_MKOUT_4,
+        GPIO108_KP_MKOUT_5,
 };
+#endif
+
+#ifdef CONFIG_MACH_EZX_E6
+static unsigned long e6_pin_config[] __initdata = {
+        /* keypad */
+        GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+        GPIO106_KP_MKOUT_3,
+        GPIO107_KP_MKOUT_4,
+        GPIO108_KP_MKOUT_5,
+};
+#endif
+
+/* KEYPAD */
+#ifdef CONFIG_MACH_EZX_A780
+static unsigned int a780_key_map[] = {
+        KEY(0, 0, KEY_SEND),
+        KEY(0, 1, KEY_BACK),
+        KEY(0, 2, KEY_END),
+        KEY(0, 3, KEY_PAGEUP),
+        KEY(0, 4, KEY_UP),
+
+        KEY(1, 0, KEY_NUMERIC_1),
+        KEY(1, 1, KEY_NUMERIC_2),
+        KEY(1, 2, KEY_NUMERIC_3),
+        KEY(1, 3, KEY_SELECT),
+        KEY(1, 4, KEY_KPENTER),
+
+        KEY(2, 0, KEY_NUMERIC_4),
+        KEY(2, 1, KEY_NUMERIC_5),
+        KEY(2, 2, KEY_NUMERIC_6),
+        KEY(2, 3, KEY_RECORD),
+        KEY(2, 4, KEY_LEFT),
+
+        KEY(3, 0, KEY_NUMERIC_7),
+        KEY(3, 1, KEY_NUMERIC_8),
+        KEY(3, 2, KEY_NUMERIC_9),
+        KEY(3, 3, KEY_HOME),
+        KEY(3, 4, KEY_RIGHT),
+
+        KEY(4, 0, KEY_NUMERIC_STAR),
+        KEY(4, 1, KEY_NUMERIC_0),
+        KEY(4, 2, KEY_NUMERIC_POUND),
+        KEY(4, 3, KEY_PAGEDOWN),
+        KEY(4, 4, KEY_DOWN),
+};
+
+static struct pxa27x_keypad_platform_data a780_keypad_platform_data = {
+        .matrix_key_rows = 5,
+        .matrix_key_cols = 5,
+        .matrix_key_map = a780_key_map,
+        .matrix_key_map_size = ARRAY_SIZE(a780_key_map),
+
+        .direct_key_map = { KEY_CAMERA },
+        .direct_key_num = 1,
+
+        .debounce_interval = 30,
+};
+#endif /* CONFIG_MACH_EZX_A780 */
+
+#ifdef CONFIG_MACH_EZX_E680
+static unsigned int e680_key_map[] = {
+        KEY(0, 0, KEY_UP),
+        KEY(0, 1, KEY_RIGHT),
+        KEY(0, 2, KEY_RESERVED),
+        KEY(0, 3, KEY_SEND),
+
+        KEY(1, 0, KEY_DOWN),
+        KEY(1, 1, KEY_LEFT),
+        KEY(1, 2, KEY_PAGEUP),
+        KEY(1, 3, KEY_PAGEDOWN),
+
+        KEY(2, 0, KEY_RESERVED),
+        KEY(2, 1, KEY_RESERVED),
+        KEY(2, 2, KEY_RESERVED),
+        KEY(2, 3, KEY_KPENTER),
+};
+
+static struct pxa27x_keypad_platform_data e680_keypad_platform_data = {
+        .matrix_key_rows = 3,
+        .matrix_key_cols = 4,
+        .matrix_key_map = e680_key_map,
+        .matrix_key_map_size = ARRAY_SIZE(e680_key_map),
+
+        .direct_key_map = {
+                KEY_CAMERA,
+                KEY_RESERVED,
+                KEY_RESERVED,
+                KEY_F1,
+                KEY_CANCEL,
+                KEY_F2,
+        },
+        .direct_key_num = 6,
+
+        .debounce_interval = 30,
+};
+#endif /* CONFIG_MACH_EZX_E680 */
+
+#ifdef CONFIG_MACH_EZX_A1200
+static unsigned int a1200_key_map[] = {
+        KEY(0, 0, KEY_RESERVED),
+        KEY(0, 1, KEY_RIGHT),
+        KEY(0, 2, KEY_PAGEDOWN),
+        KEY(0, 3, KEY_RESERVED),
+        KEY(0, 4, KEY_RESERVED),
+        KEY(0, 5, KEY_RESERVED),
+
+        KEY(1, 0, KEY_RESERVED),
+        KEY(1, 1, KEY_DOWN),
+        KEY(1, 2, KEY_CAMERA),
+        KEY(1, 3, KEY_RESERVED),
+        KEY(1, 4, KEY_RESERVED),
+        KEY(1, 5, KEY_RESERVED),
+
+        KEY(2, 0, KEY_RESERVED),
+        KEY(2, 1, KEY_KPENTER),
+        KEY(2, 2, KEY_RECORD),
+        KEY(2, 3, KEY_RESERVED),
+        KEY(2, 4, KEY_RESERVED),
+        KEY(2, 5, KEY_SELECT),
+
+        KEY(3, 0, KEY_RESERVED),
+        KEY(3, 1, KEY_UP),
+        KEY(3, 2, KEY_SEND),
+        KEY(3, 3, KEY_RESERVED),
+        KEY(3, 4, KEY_RESERVED),
+        KEY(3, 5, KEY_RESERVED),
+
+        KEY(4, 0, KEY_RESERVED),
+        KEY(4, 1, KEY_LEFT),
+        KEY(4, 2, KEY_PAGEUP),
+        KEY(4, 3, KEY_RESERVED),
+        KEY(4, 4, KEY_RESERVED),
+        KEY(4, 5, KEY_RESERVED),
+};
+
+static struct pxa27x_keypad_platform_data a1200_keypad_platform_data = {
+        .matrix_key_rows = 5,
+        .matrix_key_cols = 6,
+        .matrix_key_map = a1200_key_map,
+        .matrix_key_map_size = ARRAY_SIZE(a1200_key_map),
+
+        .debounce_interval = 30,
+};
+#endif /* CONFIG_MACH_EZX_A1200 */
+
+#ifdef CONFIG_MACH_EZX_E6
+static unsigned int e6_key_map[] = {
+        KEY(0, 0, KEY_RESERVED),
+        KEY(0, 1, KEY_RIGHT),
+        KEY(0, 2, KEY_PAGEDOWN),
+        KEY(0, 3, KEY_RESERVED),
+        KEY(0, 4, KEY_RESERVED),
+        KEY(0, 5, KEY_NEXTSONG),
+
+        KEY(1, 0, KEY_RESERVED),
+        KEY(1, 1, KEY_DOWN),
+        KEY(1, 2, KEY_PROG1),
+        KEY(1, 3, KEY_RESERVED),
+        KEY(1, 4, KEY_RESERVED),
+        KEY(1, 5, KEY_RESERVED),
+
+        KEY(2, 0, KEY_RESERVED),
+        KEY(2, 1, KEY_ENTER),
+        KEY(2, 2, KEY_CAMERA),
+        KEY(2, 3, KEY_RESERVED),
+        KEY(2, 4, KEY_RESERVED),
+        KEY(2, 5, KEY_WWW),
+
+        KEY(3, 0, KEY_RESERVED),
+        KEY(3, 1, KEY_UP),
+        KEY(3, 2, KEY_SEND),
+        KEY(3, 3, KEY_RESERVED),
+        KEY(3, 4, KEY_RESERVED),
+        KEY(3, 5, KEY_PLAYPAUSE),
+
+        KEY(4, 0, KEY_RESERVED),
+        KEY(4, 1, KEY_LEFT),
+        KEY(4, 2, KEY_PAGEUP),
+        KEY(4, 3, KEY_RESERVED),
+        KEY(4, 4, KEY_RESERVED),
+        KEY(4, 5, KEY_PREVIOUSSONG),
+};
+
+static struct pxa27x_keypad_platform_data e6_keypad_platform_data = {
+        .matrix_key_rows = 5,
+        .matrix_key_cols = 6,
+        .matrix_key_map = e6_key_map,
+        .matrix_key_map_size = ARRAY_SIZE(e6_key_map),
 
-static void __init ezx_init(void)
+        .debounce_interval = 30,
+};
+#endif /* CONFIG_MACH_EZX_E6 */
+
+#ifdef CONFIG_MACH_EZX_A910
+static unsigned int a910_key_map[] = {
+        KEY(0, 0, KEY_NUMERIC_6),
+        KEY(0, 1, KEY_RIGHT),
+        KEY(0, 2, KEY_PAGEDOWN),
+        KEY(0, 3, KEY_KPENTER),
+        KEY(0, 4, KEY_NUMERIC_5),
+        KEY(0, 5, KEY_CAMERA),
+
+        KEY(1, 0, KEY_NUMERIC_8),
+        KEY(1, 1, KEY_DOWN),
+        KEY(1, 2, KEY_RESERVED),
+        KEY(1, 3, KEY_F1), /* Left SoftKey */
+        KEY(1, 4, KEY_NUMERIC_STAR),
+        KEY(1, 5, KEY_RESERVED),
+
+        KEY(2, 0, KEY_NUMERIC_7),
+        KEY(2, 1, KEY_NUMERIC_9),
+        KEY(2, 2, KEY_RECORD),
+        KEY(2, 3, KEY_F2), /* Right SoftKey */
+        KEY(2, 4, KEY_BACK),
+        KEY(2, 5, KEY_SELECT),
+
+        KEY(3, 0, KEY_NUMERIC_2),
+        KEY(3, 1, KEY_UP),
+        KEY(3, 2, KEY_SEND),
+        KEY(3, 3, KEY_NUMERIC_0),
+        KEY(3, 4, KEY_NUMERIC_1),
+        KEY(3, 5, KEY_RECORD),
+
+        KEY(4, 0, KEY_NUMERIC_4),
+        KEY(4, 1, KEY_LEFT),
+        KEY(4, 2, KEY_PAGEUP),
+        KEY(4, 3, KEY_NUMERIC_POUND),
+        KEY(4, 4, KEY_NUMERIC_3),
+        KEY(4, 5, KEY_RESERVED),
+};
+
+static struct pxa27x_keypad_platform_data a910_keypad_platform_data = {
+        .matrix_key_rows = 5,
+        .matrix_key_cols = 6,
+        .matrix_key_map = a910_key_map,
+        .matrix_key_map_size = ARRAY_SIZE(a910_key_map),
+
+        .debounce_interval = 30,
+};
+#endif /* CONFIG_MACH_EZX_A910 */
+
+#ifdef CONFIG_MACH_EZX_E2
+static unsigned int e2_key_map[] = {
+        KEY(0, 0, KEY_NUMERIC_6),
+        KEY(0, 1, KEY_RIGHT),
+        KEY(0, 2, KEY_NUMERIC_9),
+        KEY(0, 3, KEY_NEXTSONG),
+        KEY(0, 4, KEY_NUMERIC_5),
+        KEY(0, 5, KEY_F1), /* Left SoftKey */
+
+        KEY(1, 0, KEY_NUMERIC_8),
+        KEY(1, 1, KEY_DOWN),
+        KEY(1, 2, KEY_RESERVED),
+        KEY(1, 3, KEY_PAGEUP),
+        KEY(1, 4, KEY_NUMERIC_STAR),
+        KEY(1, 5, KEY_F2), /* Right SoftKey */
+
+        KEY(2, 0, KEY_NUMERIC_7),
+        KEY(2, 1, KEY_KPENTER),
+        KEY(2, 2, KEY_RECORD),
+        KEY(2, 3, KEY_PAGEDOWN),
+        KEY(2, 4, KEY_BACK),
+        KEY(2, 5, KEY_NUMERIC_0),
+
+        KEY(3, 0, KEY_NUMERIC_2),
+        KEY(3, 1, KEY_UP),
+        KEY(3, 2, KEY_SEND),
+        KEY(3, 3, KEY_PLAYPAUSE),
+        KEY(3, 4, KEY_NUMERIC_1),
+        KEY(3, 5, KEY_SOUND), /* Music SoftKey */
+
+        KEY(4, 0, KEY_NUMERIC_4),
+        KEY(4, 1, KEY_LEFT),
+        KEY(4, 2, KEY_NUMERIC_POUND),
+        KEY(4, 3, KEY_PREVIOUSSONG),
+        KEY(4, 4, KEY_NUMERIC_3),
+        KEY(4, 5, KEY_RESERVED),
+};
+
+static struct pxa27x_keypad_platform_data e2_keypad_platform_data = {
+        .matrix_key_rows = 5,
+        .matrix_key_cols = 6,
+        .matrix_key_map = e2_key_map,
+        .matrix_key_map_size = ARRAY_SIZE(e2_key_map),
+
+        .debounce_interval = 30,
+};
+#endif /* CONFIG_MACH_EZX_E2 */
+
+#ifdef CONFIG_MACH_EZX_A780
+static void __init a780_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(a780_pin_config));
+
         pxa_set_i2c_info(NULL);
-        if (machine_is_ezx_a780() || machine_is_ezx_e680())
-                set_pxa_fb_info(&ezx_fb_info_1);
-        else
-                set_pxa_fb_info(&ezx_fb_info_2);
 
-        platform_add_devices(devices, ARRAY_SIZE(devices));
-}
+        set_pxa_fb_info(&ezx_fb_info_1);
 
-static void __init ezx_fixup(struct machine_desc *desc, struct tag *tags,
-                char **cmdline, struct meminfo *mi)
-{
-        /* We have two ram chips. First one with 32MB at 0xA0000000 and a second
-         * 16MB one at 0xAC000000
-         */
-        mi->nr_banks = 2;
-        mi->bank[0].start = 0xa0000000;
-        mi->bank[0].node = 0;
-        mi->bank[0].size = (32*1024*1024);
-        mi->bank[1].start = 0xac000000;
-        mi->bank[1].node = 1;
-        mi->bank[1].size = (16*1024*1024);
+        pxa_set_keypad_info(&a780_keypad_platform_data);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
-#ifdef CONFIG_MACH_EZX_A780
 MACHINE_START(EZX_A780, "Motorola EZX A780")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup                  = ezx_fixup,
         .boot_params    = 0xa0000100,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
         .timer          = &pxa_timer,
-        .init_machine   = &ezx_init,
+        .init_machine   = a780_init,
 MACHINE_END
 #endif
 
 #ifdef CONFIG_MACH_EZX_E680
+static struct i2c_board_info __initdata e680_i2c_board_info[] = {
+        { I2C_BOARD_INFO("tea5767", 0x81) },
+};
+
+static void __init e680_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e680_pin_config));
+
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info));
+
+        set_pxa_fb_info(&ezx_fb_info_1);
+
+        pxa_set_keypad_info(&e680_keypad_platform_data);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
 MACHINE_START(EZX_E680, "Motorola EZX E680")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup                  = ezx_fixup,
         .boot_params    = 0xa0000100,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
         .timer          = &pxa_timer,
-        .init_machine   = &ezx_init,
+        .init_machine   = e680_init,
 MACHINE_END
 #endif
 
 #ifdef CONFIG_MACH_EZX_A1200
+static struct i2c_board_info __initdata a1200_i2c_board_info[] = {
+        { I2C_BOARD_INFO("tea5767", 0x81) },
+};
+
+static void __init a1200_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(a1200_pin_config));
+
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info));
+
+        set_pxa_fb_info(&ezx_fb_info_2);
+
+        pxa_set_keypad_info(&a1200_keypad_platform_data);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
 MACHINE_START(EZX_A1200, "Motorola EZX A1200")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup                  = ezx_fixup,
         .boot_params    = 0xa0000100,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
         .timer          = &pxa_timer,
-        .init_machine   = &ezx_init,
+        .init_machine   = a1200_init,
 MACHINE_END
 #endif
 
 #ifdef CONFIG_MACH_EZX_A910
+static void __init a910_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(a910_pin_config));
+
+        pxa_set_i2c_info(NULL);
+
+        set_pxa_fb_info(&ezx_fb_info_2);
+
+        pxa_set_keypad_info(&a910_keypad_platform_data);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
 MACHINE_START(EZX_A910, "Motorola EZX A910")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup                  = ezx_fixup,
         .boot_params    = 0xa0000100,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
         .timer          = &pxa_timer,
-        .init_machine   = &ezx_init,
+        .init_machine   = a910_init,
 MACHINE_END
 #endif
 
 #ifdef CONFIG_MACH_EZX_E6
+static struct i2c_board_info __initdata e6_i2c_board_info[] = {
+        { I2C_BOARD_INFO("tea5767", 0x81) },
+};
+
+static void __init e6_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e6_pin_config));
+
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info));
+
+        set_pxa_fb_info(&ezx_fb_info_2);
+
+        pxa_set_keypad_info(&e6_keypad_platform_data);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
 MACHINE_START(EZX_E6, "Motorola EZX E6")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup                  = ezx_fixup,
         .boot_params    = 0xa0000100,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
         .timer          = &pxa_timer,
-        .init_machine   = &ezx_init,
+        .init_machine   = e6_init,
 MACHINE_END
 #endif
 
 #ifdef CONFIG_MACH_EZX_E2
+static struct i2c_board_info __initdata e2_i2c_board_info[] = {
+        { I2C_BOARD_INFO("tea5767", 0x81) },
+};
+
+static void __init e2_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e2_pin_config));
+
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info));
+
+        set_pxa_fb_info(&ezx_fb_info_2);
+
+        pxa_set_keypad_info(&e2_keypad_platform_data);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
 MACHINE_START(EZX_E2, "Motorola EZX E2")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup                  = ezx_fixup,
         .boot_params    = 0xa0000100,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
         .timer          = &pxa_timer,
-        .init_machine   = &ezx_init,
+        .init_machine   = e2_init,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 85ed0b33331f..0ccc91c92c44 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -24,6 +24,7 @@
 #include <asm/system.h>
 #include <asm/pgtable.h>
 #include <asm/mach/map.h>
+#include <asm/mach-types.h>
 
 #include <mach/pxa-regs.h>
 #include <mach/reset.h>
@@ -39,6 +40,21 @@ void clear_reset_status(unsigned int mask)
                 pxa3xx_clear_reset_status(mask);
 }
 
+unsigned long get_clock_tick_rate(void)
+{
+        unsigned long clock_tick_rate;
+
+        if (cpu_is_pxa25x())
+                clock_tick_rate = 3686400;
+        else if (machine_is_mainstone())
+                clock_tick_rate = 3249600;
+        else
+                clock_tick_rate = 3250000;
+
+        return clock_tick_rate;
+}
+EXPORT_SYMBOL(get_clock_tick_rate);
+
 /*
  * Get the clock frequency as reflected by CCCR and the turbo flag.
  * We assume these values have been applied via a fcs.
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index 14930cf8be7b..5fec1e479cb3 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -25,6 +25,18 @@
 
 #include "generic.h"
 
+#define GPIO0_BASE      ((void __iomem *)io_p2v(0x40E00000))
+#define GPIO1_BASE      ((void __iomem *)io_p2v(0x40E00004))
+#define GPIO2_BASE      ((void __iomem *)io_p2v(0x40E00008))
+#define GPIO3_BASE      ((void __iomem *)io_p2v(0x40E00100))
+
+#define GPLR_OFFSET     0x00
+#define GPDR_OFFSET     0x0C
+#define GPSR_OFFSET     0x18
+#define GPCR_OFFSET     0x24
+#define GRER_OFFSET     0x30
+#define GFER_OFFSET     0x3C
+#define GEDR_OFFSET     0x48
 
 struct pxa_gpio_chip {
         struct gpio_chip chip;
@@ -33,6 +45,18 @@ struct pxa_gpio_chip {
 
 int pxa_last_gpio;
 
+#ifdef CONFIG_CPU_PXA26x
+/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
+ * as well as their Alternate Function value being '1' for GPIO in GAFRx.
+ */
+static int __gpio_is_inverted(unsigned gpio)
+{
+        return cpu_is_pxa25x() && gpio > 85;
+}
+#else
+#define __gpio_is_inverted(gpio)        (0)
+#endif
+
 /*
  * Configure pins for GPIO or other functions
  */
@@ -75,7 +99,10 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
         gpdr = pxa->regbase + GPDR_OFFSET;
         local_irq_save(flags);
         value = __raw_readl(gpdr);
-        value &= ~mask;
+        if (__gpio_is_inverted(chip->base + offset))
+                value |= mask;
+        else
+                value &= ~mask;
         __raw_writel(value, gpdr);
         local_irq_restore(flags);
 
@@ -97,7 +124,10 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
         gpdr = pxa->regbase + GPDR_OFFSET;
         local_irq_save(flags);
         tmp = __raw_readl(gpdr);
-        tmp |= mask;
+        if (__gpio_is_inverted(chip->base + offset))
+                tmp &= ~mask;
+        else
+                tmp |= mask;
         __raw_writel(tmp, gpdr);
         local_irq_restore(flags);
 
@@ -173,10 +203,17 @@ static unsigned long GPIO_IRQ_mask[4];
  */
 static int __gpio_is_occupied(unsigned gpio)
 {
-        if (cpu_is_pxa25x() || cpu_is_pxa27x())
-                return GAFR(gpio) & (0x3 << (((gpio) & 0xf) * 2));
-        else
-                return 0;
+        if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
+                int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
+                int dir = GPDR(gpio) & GPIO_bit(gpio);
+
+                if (__gpio_is_inverted(gpio))
+                        return af != 1 || dir == 0;
+                else
+                        return af != 0 || dir != 0;
+        }
+
+        return 0;
 }
 
 static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
@@ -190,9 +227,8 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
                 /* Don't mess with enabled GPIOs using preconfigured edges or
                  * GPIOs set to alternate function or to output during probe
                  */
-                if ((GPIO_IRQ_rising_edge[idx] |
-                     GPIO_IRQ_falling_edge[idx] |
-                     GPDR(gpio)) & GPIO_bit(gpio))
+                if ((GPIO_IRQ_rising_edge[idx] & GPIO_bit(gpio)) ||
+                    (GPIO_IRQ_falling_edge[idx] & GPIO_bit(gpio)))
                         return 0;
 
                 if (__gpio_is_occupied(gpio))
@@ -201,7 +237,10 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
                 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
         }
 
-        GPDR(gpio) &= ~GPIO_bit(gpio);
+        if (__gpio_is_inverted(gpio))
+                GPDR(gpio) |= GPIO_bit(gpio);
+        else
+                GPDR(gpio) &= ~GPIO_bit(gpio);
 
         if (type & IRQ_TYPE_EDGE_RISING)
                 __set_bit(gpio, GPIO_IRQ_rising_edge);
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index d8962a0fb98d..e296ce11658c 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -184,15 +184,22 @@ static unsigned long gumstix_pin_config[] __initdata = {
         GPIO6_MMC_CLK,
         GPIO53_MMC_CLK,
         GPIO8_MMC_CS0,
-        /* these are used by AM200EPD */
-        GPIO51_GPIO,
-        GPIO49_GPIO,
-        GPIO48_GPIO,
-        GPIO32_GPIO,
-        GPIO17_GPIO,
-        GPIO16_GPIO,
 };
 
+int __attribute__((weak)) am200_init(void)
+{
+        return 0;
+}
+
+static void __init carrier_board_init(void)
+{
+        /*
+         * put carrier/expansion board init here if
+         * they cannot be detected programatically
+         */
+        am200_init();
+}
+
 static void __init gumstix_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config));
@@ -201,6 +208,7 @@ static void __init gumstix_init(void)
         gumstix_udc_init();
         gumstix_mmc_init();
         (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+        carrier_board_init();
 }
 
 MACHINE_START(GUMSTIX, "Gumstix")
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
new file mode 100644
index 000000000000..da6e4422c0f3
--- /dev/null
+++ b/arch/arm/mach-pxa/h5000.c
@@ -0,0 +1,200 @@
+/*
+ * Hardware definitions for HP iPAQ h5xxx Handheld Computers
+ *
+ * Copyright 2000-2003  Hewlett-Packard Company.
+ * Copyright 2002       Jamey Hicks <jamey.hicks@hp.com>
+ * Copyright 2004-2005  Phil Blundell <pb@handhelds.org>
+ * Copyright 2007-2008  Anton Vorontsov <cbouatmailru@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
+ * FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ * Author: Jamey Hicks.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/h5000.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/udc.h>
+#include "generic.h"
+
+/*
+ * Flash
+ */
+
+static struct mtd_partition h5000_flash0_partitions[] = {
+        {
+                .name = "bootldr",
+                .size = 0x00040000,
+                .offset = 0,
+                .mask_flags = MTD_WRITEABLE,
+        },
+        {
+                .name = "root",
+                .size = MTDPART_SIZ_FULL,
+                .offset = MTDPART_OFS_APPEND,
+        },
+};
+
+static struct mtd_partition h5000_flash1_partitions[] = {
+        {
+                .name = "second root",
+                .size = SZ_16M - 0x00040000,
+                .offset = 0,
+        },
+        {
+                .name = "asset",
+                .size = MTDPART_SIZ_FULL,
+                .offset = MTDPART_OFS_APPEND,
+                .mask_flags = MTD_WRITEABLE,
+        },
+};
+
+static struct physmap_flash_data h5000_flash0_data = {
+        .width = 4,
+        .parts = h5000_flash0_partitions,
+        .nr_parts = ARRAY_SIZE(h5000_flash0_partitions),
+};
+
+static struct physmap_flash_data h5000_flash1_data = {
+        .width = 4,
+        .parts = h5000_flash1_partitions,
+        .nr_parts = ARRAY_SIZE(h5000_flash1_partitions),
+};
+
+static struct resource h5000_flash0_resources = {
+        .start = PXA_CS0_PHYS,
+        .end = PXA_CS0_PHYS + SZ_32M - 1,
+        .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
+};
+
+static struct resource h5000_flash1_resources = {
+        .start = PXA_CS0_PHYS + SZ_32M,
+        .end = PXA_CS0_PHYS + SZ_32M + SZ_16M - 1,
+        .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
+};
+
+static struct platform_device h5000_flash[] = {
+        {
+                .name = "physmap-flash",
+                .id = 0,
+                .resource = &h5000_flash0_resources,
+                .num_resources = 1,
+                .dev = {
+                        .platform_data = &h5000_flash0_data,
+                },
+        },
+        {
+                .name = "physmap-flash",
+                .id = 1,
+                .resource = &h5000_flash1_resources,
+                .num_resources = 1,
+                .dev = {
+                        .platform_data = &h5000_flash1_data,
+                },
+        },
+};
+
+/*
+ * USB Device Controller
+ */
+
+static struct pxa2xx_udc_mach_info h5000_udc_mach_info __initdata = {
+        .gpio_pullup = H5000_GPIO_USB_PULLUP,
+};
+
+/*
+ * GPIO setup
+ */
+
+static unsigned long h5000_pin_config[] __initdata = {
+        /* Crystal and Clock Signals */
+        GPIO12_32KHz,
+
+        /* SDRAM and Static Memory I/O Signals */
+        GPIO15_nCS_1,
+        GPIO78_nCS_2,
+        GPIO79_nCS_3,
+        GPIO80_nCS_4,
+
+        /* FFUART */
+        GPIO34_FFUART_RXD,
+        GPIO35_FFUART_CTS,
+        GPIO36_FFUART_DCD,
+        GPIO37_FFUART_DSR,
+        GPIO38_FFUART_RI,
+        GPIO39_FFUART_TXD,
+        GPIO40_FFUART_DTR,
+        GPIO41_FFUART_RTS,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* SSP1 */
+        GPIO23_SSP1_SCLK,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+};
+
+/*
+ * Localbus setup:
+ * CS0: Flash;
+ * CS1: MediaQ chip, select 16-bit bus and vlio;
+ * CS5: SAMCOP.
+ */
+
+static void fix_msc(void)
+{
+        MSC0 = 0x129c24f2;
+        MSC1 = 0x7ff424fa;
+        MSC2 = 0x7ff47ff4;
+
+        MDREFR |= 0x02080000;
+}
+
+/*
+ * Platform devices
+ */
+
+static struct platform_device *devices[] __initdata = {
+        &h5000_flash[0],
+        &h5000_flash[1],
+};
+
+static void __init h5000_init(void)
+{
+        fix_msc();
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(h5000_pin_config));
+        pxa_set_udc_info(&h5000_udc_mach_info);
+        platform_add_devices(ARRAY_AND_SIZE(devices));
+}
+
+MACHINE_START(H5400, "HP iPAQ H5000")
+        .phys_io = 0x40000000,
+        .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params = 0xa0000100,
+        .map_io = pxa_map_io,
+        .init_irq = pxa25x_init_irq,
+        .timer = &pxa_timer,
+        .init_machine = h5000_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
new file mode 100644
index 000000000000..364c5e271330
--- /dev/null
+++ b/arch/arm/mach-pxa/imote2.c
@@ -0,0 +1,575 @@
+/*
+ * linux/arch/arm/mach-pxa/imote2.c
+ *
+ * Author:      Ed C. Epp
+ * Created:     Nov 05, 2002
+ * Copyright:   Intel Corp.
+ *
+ * Modified 2008:  Jonathan Cameron
+ *
+ * The Imote2 is a wireless sensor node platform sold
+ * by Crossbow (www.xbow.com).
+ */
+
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/machine.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+#include <linux/spi/spi.h>
+#include <linux/i2c.h>
+#include <linux/mfd/da903x.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+
+#include <mach/i2c.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa27x.h>
+#include <mach/regs-ssp.h>
+#include <mach/udc.h>
+#include <mach/mmc.h>
+#include <mach/pxa2xx_spi.h>
+#include <mach/pxa27x-udc.h>
+
+#include "devices.h"
+#include "generic.h"
+
+static unsigned long imote2_pin_config[] __initdata = {
+
+        /* Device Identification for wakeup*/
+        GPIO102_GPIO,
+
+        /* Button */
+        GPIO91_GPIO,
+
+        /* DA9030 */
+        GPIO1_GPIO,
+
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO112_MMC_CMD,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+
+        /* 802.15.4 radio - driver out of mainline */
+        GPIO22_GPIO,                    /* CC_RSTN */
+        GPIO114_GPIO,                   /* CC_FIFO */
+        GPIO116_GPIO,                   /* CC_CCA */
+        GPIO0_GPIO,                     /* CC_FIFOP */
+        GPIO16_GPIO,                    /* CCSFD */
+        GPIO39_GPIO,                    /* CSn */
+        GPIO115_GPIO,                   /* Power enable */
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
+        /* SSP 3 - 802.15.4 radio */
+        GPIO39_GPIO,                    /* Chip Select */
+        GPIO34_SSP3_SCLK,
+        GPIO35_SSP3_TXD,
+        GPIO41_SSP3_RXD,
+
+        /* SSP 2 - to daughter boards */
+        GPIO37_GPIO,                    /* Chip Select */
+        GPIO36_SSP2_SCLK,
+        GPIO38_SSP2_TXD,
+        GPIO11_SSP2_RXD,
+
+        /* SSP 1 - to daughter boards */
+        GPIO24_GPIO,                    /* Chip Select */
+        GPIO23_SSP1_SCLK,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+
+        /* BTUART Basic Connector*/
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* STUART Serial console via debug board*/
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* Basic sensor board */
+        GPIO96_GPIO,    /* accelerometer interrupt */
+        GPIO99_GPIO,    /* ADC interrupt */
+
+        /* Connector pins specified as gpios */
+        GPIO94_GPIO, /* large basic connector pin 14 */
+        GPIO10_GPIO, /* large basic connector pin 23 */
+
+        /* LEDS */
+        GPIO103_GPIO, /* red led */
+        GPIO104_GPIO, /* green led */
+        GPIO105_GPIO, /* blue led */
+};
+
+static struct gpio_led imote2_led_pins[] = {
+        {
+                .name       =  "imote2:red",
+                .gpio       = 103,
+                .active_low = 1,
+        }, {
+                .name       = "imote2:green",
+                .gpio       = 104,
+                .active_low = 1,
+        }, {
+                .name       = "imote2:blue",
+                .gpio       = 105,
+                .active_low = 1,
+        },
+};
+
+static struct gpio_led_platform_data imote2_led_data = {
+        .num_leds = ARRAY_SIZE(imote2_led_pins),
+        .leds     = imote2_led_pins,
+};
+
+static struct platform_device imote2_leds = {
+        .name = "leds-gpio",
+        .id   = -1,
+        .dev = {
+                .platform_data = &imote2_led_data,
+        },
+};
+
+/* Reverse engineered partly from Platformx drivers */
+enum imote2_ldos{
+        vcc_vref,
+        vcc_cc2420,
+        vcc_mica,
+        vcc_bt,
+        /* The two voltages available to sensor boards */
+        vcc_sensor_1_8,
+        vcc_sensor_3,
+
+        vcc_sram_ext, /* directly connected to the pxa271 */
+        vcc_pxa_pll,
+        vcc_pxa_usim, /* Reference voltage for certain gpios */
+        vcc_pxa_mem,
+        vcc_pxa_flash,
+        vcc_pxa_core, /*Dc-Dc buck not yet supported */
+        vcc_lcd,
+        vcc_bb,
+        vcc_bbio,
+        vcc_io, /* cc2420 802.15.4 radio and pxa vcc_io ?*/
+};
+
+/* The values of the various regulator constraints are obviously dependent
+ * on exactly what is wired to each ldo.  Unfortunately this information is
+ * not generally available.  More information has been requested from Xbow
+ * but as of yet they haven't been forthcoming.
+ *
+ * Some of these are clearly Stargate 2 related (no way of plugging
+ * in an lcd on the IM2 for example!).
+ */
+static struct regulator_init_data imote2_ldo_init_data[] = {
+        [vcc_bbio] = {
+                .constraints = { /* board default 1.8V */
+                        .name = "vcc_bbio",
+                        .min_uV = 1800000,
+                        .max_uV = 1800000,
+                },
+        },
+        [vcc_bb] = {
+                .constraints = { /* board default 2.8V */
+                        .name = "vcc_bb",
+                        .min_uV = 2700000,
+                        .max_uV = 3000000,
+                },
+        },
+        [vcc_pxa_flash] = {
+                .constraints = {/* default is 1.8V */
+                        .name = "vcc_pxa_flash",
+                        .min_uV = 1800000,
+                        .max_uV = 1800000,
+                },
+        },
+        [vcc_cc2420] = { /* also vcc_io */
+                .constraints = {
+                        /* board default is 2.8V */
+                        .name = "vcc_cc2420",
+                        .min_uV = 2700000,
+                        .max_uV = 3300000,
+                },
+        },
+        [vcc_vref] = { /* Reference for what? */
+                .constraints = { /* default 1.8V */
+                        .name = "vcc_vref",
+                        .min_uV = 1800000,
+                        .max_uV = 1800000,
+                },
+        },
+        [vcc_sram_ext] = {
+                .constraints = { /* default 2.8V */
+                        .name = "vcc_sram_ext",
+                        .min_uV = 2800000,
+                        .max_uV = 2800000,
+                },
+        },
+        [vcc_mica] = {
+                .constraints = { /* default 2.8V */
+                        .name = "vcc_mica",
+                        .min_uV = 2800000,
+                        .max_uV = 2800000,
+                },
+        },
+        [vcc_bt] = {
+                .constraints = { /* default 2.8V */
+                        .name = "vcc_bt",
+                        .min_uV = 2800000,
+                        .max_uV = 2800000,
+                },
+        },
+        [vcc_lcd] = {
+                .constraints = { /* default 2.8V */
+                        .name = "vcc_lcd",
+                        .min_uV = 2700000,
+                        .max_uV = 3300000,
+                },
+        },
+        [vcc_io] = { /* Same or higher than everything
+                          * bar vccbat and vccusb */
+                .constraints = { /* default 2.8V */
+                        .name = "vcc_io",
+                        .min_uV = 2692000,
+                        .max_uV = 3300000,
+                },
+        },
+        [vcc_sensor_1_8] = {
+                .constraints = { /* default 1.8V */
+                        .name = "vcc_sensor_1_8",
+                        .min_uV = 1800000,
+                        .max_uV = 1800000,
+                },
+        },
+        [vcc_sensor_3] = { /* curiously default 2.8V */
+                .constraints = {
+                        .name = "vcc_sensor_3",
+                        .min_uV = 2800000,
+                        .max_uV = 3000000,
+                },
+        },
+        [vcc_pxa_pll] = { /* 1.17V - 1.43V, default 1.3V*/
+                .constraints = {
+                        .name = "vcc_pxa_pll",
+                        .min_uV = 1170000,
+                        .max_uV = 1430000,
+                },
+        },
+        [vcc_pxa_usim] = {
+                .constraints = { /* default 1.8V */
+                        .name = "vcc_pxa_usim",
+                        .min_uV = 1710000,
+                        .max_uV = 2160000,
+                },
+        },
+        [vcc_pxa_mem] = {
+                .constraints = { /* default 1.8V */
+                        .name = "vcc_pxa_mem",
+                        .min_uV = 1800000,
+                        .max_uV = 1800000,
+                },
+        },
+};
+
+static struct da903x_subdev_info imote2_da9030_subdevs[] = {
+        {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO2,
+                .platform_data = &imote2_ldo_init_data[vcc_bbio],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO3,
+                .platform_data = &imote2_ldo_init_data[vcc_bb],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO4,
+                .platform_data = &imote2_ldo_init_data[vcc_pxa_flash],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO5,
+                .platform_data = &imote2_ldo_init_data[vcc_cc2420],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO6,
+                .platform_data = &imote2_ldo_init_data[vcc_vref],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO7,
+                .platform_data = &imote2_ldo_init_data[vcc_sram_ext],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO8,
+                .platform_data = &imote2_ldo_init_data[vcc_mica],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO9,
+                .platform_data = &imote2_ldo_init_data[vcc_bt],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO10,
+                .platform_data = &imote2_ldo_init_data[vcc_sensor_1_8],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO11,
+                .platform_data = &imote2_ldo_init_data[vcc_sensor_3],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO12,
+                .platform_data = &imote2_ldo_init_data[vcc_lcd],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO15,
+                .platform_data = &imote2_ldo_init_data[vcc_pxa_pll],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO17,
+                .platform_data = &imote2_ldo_init_data[vcc_pxa_usim],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO18,
+                .platform_data = &imote2_ldo_init_data[vcc_io],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO19,
+                .platform_data = &imote2_ldo_init_data[vcc_pxa_mem],
+        },
+};
+
+static struct da903x_platform_data imote2_da9030_pdata = {
+        .num_subdevs = ARRAY_SIZE(imote2_da9030_subdevs),
+        .subdevs = imote2_da9030_subdevs,
+};
+
+/* As the the imote2 doesn't currently have a conventional SD slot
+ * there is no option to hotplug cards, making all this rather simple
+ */
+static int imote2_mci_get_ro(struct device *dev)
+{
+        return 0;
+}
+
+/* Rather simple case as hotplugging not possible */
+static struct pxamci_platform_data imote2_mci_platform_data = {
+        .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* default anyway */
+        .get_ro = imote2_mci_get_ro,
+};
+
+static struct mtd_partition imote2flash_partitions[] = {
+        {
+                .name = "Bootloader",
+                .size = 0x00040000,
+                .offset = 0,
+                .mask_flags = MTD_WRITEABLE,
+        }, {
+                .name = "Kernel",
+                .size = 0x00200000,
+                .offset = 0x00040000,
+                .mask_flags = 0,
+        }, {
+                .name = "Filesystem",
+                .size = 0x01DC0000,
+                .offset = 0x00240000,
+                .mask_flags = 0,
+        },
+};
+
+static struct resource flash_resources = {
+        .start = PXA_CS0_PHYS,
+        .end = PXA_CS0_PHYS + SZ_32M - 1,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct flash_platform_data imote2_flash_data = {
+        .map_name = "cfi_probe",
+        .parts = imote2flash_partitions,
+        .nr_parts = ARRAY_SIZE(imote2flash_partitions),
+        .name = "PXA27xOnChipROM",
+        .width = 2,
+};
+
+static struct platform_device imote2_flash_device = {
+        .name = "pxa2xx-flash",
+        .id = 0,
+        .dev = {
+                .platform_data = &imote2_flash_data,
+        },
+        .resource = &flash_resources,
+        .num_resources = 1,
+};
+
+/* Some of the drivers here are out of kernel at the moment (parts of IIO)
+ * and it may be a while before they are in the mainline.
+ */
+static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
+        { /* UCAM sensor board */
+                .type = "max1238",
+                .addr = 0x35,
+        }, { /* ITS400 Sensor board only */
+                .type = "max1363",
+                .addr = 0x34,
+                /* Through a nand gate - Also beware, on V2 sensor board the
+                 * pull up resistors are missing.
+                 */
+                .irq = IRQ_GPIO(99),
+        }, { /* ITS400 Sensor board only */
+                .type = "tsl2561",
+                .addr = 0x49,
+                /* Through a nand gate - Also beware, on V2 sensor board the
+                 * pull up resistors are missing.
+                 */
+                .irq = IRQ_GPIO(99),
+        }, { /* ITS400 Sensor board only */
+                .type = "tmp175",
+                .addr = 0x4A,
+                .irq = IRQ_GPIO(96),
+        },
+};
+
+static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
+        {
+                .type = "da9030",
+                .addr = 0x49,
+                .platform_data = &imote2_da9030_pdata,
+                .irq = gpio_to_irq(1),
+        },
+};
+
+static struct pxa2xx_spi_master pxa_ssp_master_0_info = {
+        .num_chipselect = 1,
+};
+
+static struct pxa2xx_spi_master pxa_ssp_master_1_info = {
+        .num_chipselect = 1,
+};
+
+static struct pxa2xx_spi_master pxa_ssp_master_2_info = {
+        .num_chipselect = 1,
+};
+
+/* Patch posted by Eric Miao <eric.miao@marvell.com> will remove
+ * the need for these functions.
+ */
+static void spi1control(u32 command)
+{
+        gpio_set_value(24, command & PXA2XX_CS_ASSERT ? 0 : 1);
+};
+
+static void spi3control(u32 command)
+{
+        gpio_set_value(39, command & PXA2XX_CS_ASSERT ? 0 : 1);
+};
+
+static struct pxa2xx_spi_chip staccel_chip_info = {
+        .tx_threshold = 8,
+        .rx_threshold = 8,
+        .dma_burst_size = 8,
+        .timeout = 235,
+        .cs_control = spi1control,
+};
+
+static struct pxa2xx_spi_chip cc2420_info = {
+        .tx_threshold = 8,
+        .rx_threshold = 8,
+        .dma_burst_size = 8,
+        .timeout = 235,
+        .cs_control = spi3control,
+};
+
+static struct spi_board_info spi_board_info[] __initdata = {
+        { /* Driver in IIO */
+                .modalias = "lis3l02dq",
+                .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */
+                .bus_num = 1,
+                .chip_select = 0,
+                .controller_data = &staccel_chip_info,
+                .irq = IRQ_GPIO(96),
+        }, { /* Driver out of kernel as it needs considerable rewriting */
+                .modalias = "cc2420",
+                .max_speed_hz = 6500000,
+                .bus_num = 3,
+                .chip_select = 0,
+                .controller_data = &cc2420_info,
+        },
+};
+
+static void im2_udc_command(int cmd)
+{
+        switch (cmd) {
+        case PXA2XX_UDC_CMD_CONNECT:
+                UP2OCR |=  UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE;
+                break;
+        case PXA2XX_UDC_CMD_DISCONNECT:
+                UP2OCR &= ~(UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE);
+                break;
+        }
+}
+
+static struct pxa2xx_udc_mach_info imote2_udc_info __initdata = {
+        .udc_command            = im2_udc_command,
+};
+
+static struct platform_device *imote2_devices[] = {
+        &imote2_flash_device,
+        &imote2_leds,
+};
+
+static struct i2c_pxa_platform_data i2c_pwr_pdata = {
+        .fast_mode = 1,
+};
+
+static struct i2c_pxa_platform_data i2c_pdata = {
+        .fast_mode = 1,
+};
+
+static void __init imote2_init(void)
+{
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config));
+        /* SPI chip select directions - all other directions should
+         * be handled by drivers.*/
+        gpio_direction_output(37, 0);
+        gpio_direction_output(24, 0);
+        gpio_direction_output(39, 0);
+
+        platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices));
+
+        pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
+        pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info);
+        pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info);
+
+        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
+
+        i2c_register_board_info(0, imote2_i2c_board_info,
+                                ARRAY_SIZE(imote2_i2c_board_info));
+        i2c_register_board_info(1, imote2_pwr_i2c_board_info,
+                                ARRAY_SIZE(imote2_pwr_i2c_board_info));
+
+        pxa27x_set_i2c_power_info(&i2c_pwr_pdata);
+        pxa_set_i2c_info(&i2c_pdata);
+
+        pxa_set_mci_info(&imote2_mci_platform_data);
+        pxa_set_udc_info(&imote2_udc_info);
+}
+
+MACHINE_START(INTELMOTE2, "IMOTE 2")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = imote2_init,
+        .boot_params    = 0xA0000100,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/clkdev.h b/arch/arm/mach-pxa/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h
index 955bfe606067..7804637a6df3 100644
--- a/arch/arm/mach-pxa/include/mach/dma.h
+++ b/arch/arm/mach-pxa/include/mach/dma.h
@@ -30,10 +30,6 @@ typedef enum {
         DMA_PRIO_LOW = 2
 } pxa_dma_prio;
 
-#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
-#define HAVE_ARCH_PCI_SET_DMA_MASK      1
-#endif
-
 /*
  * DMA registration
  */
diff --git a/arch/arm/mach-pxa/include/mach/eseries-gpio.h b/arch/arm/mach-pxa/include/mach/eseries-gpio.h
index 4c90b1310270..efbd2aa9ecec 100644
--- a/arch/arm/mach-pxa/include/mach/eseries-gpio.h
+++ b/arch/arm/mach-pxa/include/mach/eseries-gpio.h
@@ -43,8 +43,10 @@
 #define GPIO_E800_PCMCIA_PWR1    73
 
 /* e7xx IrDA power control */
-#define GPIO_E7XX_IR_ON          38
+#define GPIO_E7XX_IR_OFF         38
 
 /* ASIC related GPIOs */
 #define GPIO_ESERIES_TMIO_IRQ        5
+#define GPIO_ESERIES_TMIO_PCLR      19
+#define GPIO_ESERIES_TMIO_SUSPEND   45
 #define GPIO_E800_ANGELX_IRQ      8
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
index 42ee1956750e..099f54a41de4 100644
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -94,3 +94,7 @@ has detected a cable insertion; driven low otherwise. */
 #define GPIO26_PRDY_nBSY_MD             (GPIO26_PRDY_nBSY | GPIO_IN)
 #define GPIO27_PRDY_nBSY_MD             (GPIO27_PRDY_nBSY | GPIO_IN)
 #define GPIO36_nCD_MD                   (GPIO36_nCD | GPIO_IN)
+
+/* for expansion boards that can't be programatically detected */
+extern int am200_init(void);
+
diff --git a/arch/arm/mach-pxa/include/mach/h5000.h b/arch/arm/mach-pxa/include/mach/h5000.h
new file mode 100644
index 000000000000..2a5ae3802787
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/h5000.h
@@ -0,0 +1,113 @@
+/*
+ * Hardware definitions for HP iPAQ h5xxx Handheld Computers
+ *
+ * Copyright(20)02 Hewlett-Packard Company.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
+ * FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ * Author: Jamey Hicks
+ */
+
+#ifndef __ASM_ARCH_H5000_H
+#define __ASM_ARCH_H5000_H
+
+#include <mach/mfp-pxa25x.h>
+
+/*
+ * CPU GPIOs
+ */
+
+#define H5000_GPIO_POWER_BUTTON   (0)
+#define H5000_GPIO_RESET_BUTTON_N (1)
+#define H5000_GPIO_OPT_INT        (2)
+#define H5000_GPIO_BACKUP_POWER   (3)
+#define H5000_GPIO_ACTION_BUTTON  (4)
+#define H5000_GPIO_COM_DCD_SOMETHING  (5) /* what is this really ? */
+/* 6 not connected */
+#define H5000_GPIO_RESET_BUTTON_AGAIN_N (7) /* connected to gpio 1 as well */
+/* 8 not connected */
+#define H5000_GPIO_RSO_N          (9)       /* reset output from max1702 which regulates 3.3 and 2.5 */
+#define H5000_GPIO_ASIC_INT_N   (10)       /* from companion asic */
+#define H5000_GPIO_BT_ENV_0     (11)       /* to LMX9814, set to 1 according to regdump */
+/*(12) not connected */
+#define H5000_GPIO_BT_ENV_1     (13)       /* to LMX9814, set to 1 according to regdump */
+#define H5000_GPIO_BT_WU        (14)       /* from LMX9814, Defined as HOST_WAKEUP in the LMX9820 data sheet */
+/*(15) is CS1# */
+/*(16) not connected */
+/*(17) not connected */
+/*(18) is pcmcia ready */
+/*(19) is dreq1 */
+/*(20) is dreq0 */
+#define H5000_GPIO_OE_RD_NWR    (21)       /* output enable on rd/nwr signal to companion asic */
+/*(22) is not connected */
+#define H5000_GPIO_OPT_SPI_CLK  (23)       /* to extension pack */
+#define H5000_GPIO_OPT_SPI_CS_N (24)       /* to extension pack */
+#define H5000_GPIO_OPT_SPI_DOUT (25)       /* to extension pack */
+#define H5000_GPIO_OPT_SPI_DIN  (26)       /* to extension pack */
+/*(27) not connected */
+#define H5000_GPIO_I2S_BITCLK   (28)       /* connected to AC97 codec */
+#define H5000_GPIO_I2S_DATAOUT  (29)       /* connected to AC97 codec */
+#define H5000_GPIO_I2S_DATAIN   (30)       /* connected to AC97 codec */
+#define H5000_GPIO_I2S_LRCLK    (31)       /* connected to AC97 codec */
+#define H5000_GPIO_I2S_SYSCLK   (32)       /* connected to AC97 codec */
+/*(33) is CS5# */
+#define H5000_GPIO_COM_RXD      (34)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_CTS      (35)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_DCD      (36)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_DSR      (37)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_RI       (38)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_TXD      (39)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_DTR      (40)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_RTS      (41)       /* connected to cradle/cable connector */
+
+#define H5000_GPIO_BT_RXD       (42)       /* connected to BT (LMX9814) */
+#define H5000_GPIO_BT_TXD       (43)       /* connected to BT (LMX9814) */
+#define H5000_GPIO_BT_CTS       (44)       /* connected to BT (LMX9814) */
+#define H5000_GPIO_BT_RTS       (45)       /* connected to BT (LMX9814) */
+
+#define H5000_GPIO_IRDA_RXD     (46)
+#define H5000_GPIO_IRDA_TXD     (47)
+
+#define H5000_GPIO_POE_N        (48)       /* used for pcmcia */
+#define H5000_GPIO_PWE_N        (49)       /* used for pcmcia */
+#define H5000_GPIO_PIOR_N       (50)       /* used for pcmcia */
+#define H5000_GPIO_PIOW_N       (51)       /* used for pcmcia */
+#define H5000_GPIO_PCE1_N       (52)       /* used for pcmcia */
+#define H5000_GPIO_PCE2_N       (53)       /* used for pcmcia */
+#define H5000_GPIO_PSKTSEL      (54)       /* used for pcmcia */
+#define H5000_GPIO_PREG_N       (55)       /* used for pcmcia */
+#define H5000_GPIO_PWAIT_N      (56)       /* used for pcmcia */
+#define H5000_GPIO_IOIS16_N     (57)       /* used for pcmcia */
+
+#define H5000_GPIO_IRDA_SD      (58)       /* to hsdl3002 sd */
+/*(59) not connected */
+#define H5000_GPIO_POWER_SD_N   (60)       /* controls power to SD */
+#define H5000_GPIO_POWER_RS232_N        (61)       /* inverted FORCEON to rs232 transceiver */
+#define H5000_GPIO_POWER_ACCEL_N        (62)       /* controls power to accel */
+/*(63) is not connected */
+#define H5000_GPIO_OPT_NVRAM    (64)       /* controls power to expansion pack */
+#define H5000_GPIO_CHG_EN       (65)       /* to sc801 en */
+#define H5000_GPIO_USB_PULLUP   (66)       /* USB d+ pullup via 1.5K resistor */
+#define H5000_GPIO_BT_2V8_N     (67)       /* 2.8V used by bluetooth */
+#define H5000_GPIO_EXT_CHG_RATE (68)       /* enables external charging rate */
+/*(69) is not connected */
+#define H5000_GPIO_CIR_RESET    (70)       /* consumer IR reset */
+#define H5000_GPIO_POWER_LIGHT_SENSOR_N (71)
+#define H5000_GPIO_BT_M_RESET   (72)
+#define H5000_GPIO_STD_CHG_RATE (73)
+#define H5000_GPIO_SD_WP_N      (74)
+#define H5000_GPIO_MOTOR_ON_N   (75)       /* external pullup on this */
+#define H5000_GPIO_HEADPHONE_DETECT     (76)
+#define H5000_GPIO_USB_CHG_RATE (77)       /* select rate for charging via usb */
+/*(78) is CS2# */
+/*(79) is CS3# */
+/*(80) is CS4# */
+
+#endif /* __ASM_ARCH_H5000_H */
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index a582a6d9b92b..16ab79547dae 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -102,6 +102,9 @@
  *  PXA930      B0      0x69056835      0x5E643013
  *  PXA930      B1      0x69056837      0x7E643013
  *  PXA930      B2      0x69056838      0x8E643013
+ *
+ *  PXA935      A0      0x56056931      0x1E653013
+ *  PXA935      B0      0x56056936      0x6E653013
  */
 #ifdef CONFIG_PXA25x
 #define __cpu_is_pxa210(id)                             \
@@ -178,12 +181,22 @@
 #define __cpu_is_pxa930(id)                             \
         ({                                              \
                 unsigned int _id = (id) >> 4 & 0xfff;   \
-                _id == 0x683;           \
+                _id == 0x683;                           \
          })
 #else
 #define __cpu_is_pxa930(id)     (0)
 #endif
 
+#ifdef CONFIG_CPU_PXA935
+#define __cpu_is_pxa935(id)                             \
+        ({                                              \
+                unsigned int _id = (id) >> 4 & 0xfff;   \
+                _id == 0x693;                           \
+         })
+#else
+#define __cpu_is_pxa935(id)     (0)
+#endif
+
 #define cpu_is_pxa210()                                 \
         ({                                              \
                 __cpu_is_pxa210(read_cpuid_id());       \
@@ -204,8 +217,6 @@
                 __cpu_is_pxa25x(read_cpuid_id());       \
         })
 
-extern int cpu_is_pxa26x(void);
-
 #define cpu_is_pxa27x()                                 \
         ({                                              \
                 __cpu_is_pxa27x(read_cpuid_id());       \
@@ -232,6 +243,12 @@ extern int cpu_is_pxa26x(void);
                 __cpu_is_pxa930(id);                    \
          })
 
+#define cpu_is_pxa935()                                 \
+        ({                                              \
+                unsigned int id = read_cpuid(CPUID_ID); \
+                __cpu_is_pxa935(id);                    \
+         })
+
 /*
  * CPUID Core Generation Bit
  * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
@@ -249,6 +266,12 @@ extern int cpu_is_pxa26x(void);
                 _id == 0x3;                             \
          })
 
+#define __cpu_is_pxa9xx(id)                             \
+        ({                                              \
+                unsigned int _id = (id) >> 4 & 0xfff;   \
+                _id == 0x683 || _id == 0x693;           \
+         })
+
 #define cpu_is_pxa2xx()                                 \
         ({                                              \
                 __cpu_is_pxa2xx(read_cpuid_id());       \
@@ -259,32 +282,25 @@ extern int cpu_is_pxa26x(void);
                 __cpu_is_pxa3xx(read_cpuid_id());       \
          })
 
-/*
- * Handy routine to set GPIO alternate functions
- */
-extern int pxa_gpio_mode( int gpio_mode );
-
-/*
- * Return GPIO level, nonzero means high, zero is low
- */
-extern int pxa_gpio_get_value(unsigned gpio);
-
-/*
- * Set output GPIO level
- */
-extern void pxa_gpio_set_value(unsigned gpio, int value);
-
+#define cpu_is_pxa9xx()                                 \
+        ({                                              \
+                __cpu_is_pxa9xx(read_cpuid_id());       \
+         })
 /*
  * return current memory and LCD clock frequency in units of 10kHz
  */
 extern unsigned int get_memclk_frequency_10khz(void);
 
+/* return the clock tick rate of the OS timer */
+extern unsigned long get_clock_tick_rate(void);
 #endif
 
 #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
 #define PCIBIOS_MIN_IO          0
 #define PCIBIOS_MIN_MEM         0
 #define pcibios_assign_all_busses()     1
+#define HAVE_ARCH_PCI_SET_DMA_MASK      1
 #endif
 
+
 #endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
index 600fd4f76603..262691fb97d8 100644
--- a/arch/arm/mach-pxa/include/mach/io.h
+++ b/arch/arm/mach-pxa/include/mach/io.h
@@ -6,15 +6,13 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index 5c4e320c1437..6c9b21c51322 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,8 +1,13 @@
-#ifndef __ASM_ARCH_ZYLONITE_H
-#define __ASM_ARCH_ZYLONITE_H
+#ifndef __ASM_ARCH_LITTLETON_H
+#define __ASM_ARCH_LITTLETON_H
+
+#include <mach/gpio.h>
 
 #define LITTLETON_ETH_PHYS      0x30000000
 
 #define LITTLETON_GPIO_LCD_CS   (17)
 
-#endif /* __ASM_ARCH_ZYLONITE_H */
+#define EXT0_GPIO_BASE  (NR_BUILTIN_GPIO)
+#define EXT0_GPIO(x)    (EXT0_GPIO_BASE + (x))
+
+#endif /* __ASM_ARCH_LITTLETON_H */
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
index 59aef89808d6..f626730ee42e 100644
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -18,16 +18,6 @@
 #define PHYS_OFFSET     UL(0xa0000000)
 
 /*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
-/*
  * The nodes are matched with the physical SDRAM banks as follows:
  *
  *      node 0:  0xa0000000-0xa3ffffff  -->  0xc0000000-0xc3ffffff
@@ -47,6 +37,7 @@ void cmx2xx_pci_adjust_zones(int node, unsigned long *size,
         cmx2xx_pci_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_64M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_64M)
 #endif
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 617cab2cc8d0..a72869b73ee3 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -158,4 +158,35 @@
 #define GPIO76_LCD_PCLK         MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
 #define GPIO77_LCD_BIAS         MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
 
+#ifdef CONFIG_CPU_PXA26x
+/* GPIO */
+#define GPIO85_GPIO             MFP_CFG_IN(GPIO85, AF0)
+#define GPIO86_GPIO             MFP_CFG_IN(GPIO86, AF1)
+#define GPIO87_GPIO             MFP_CFG_IN(GPIO87, AF1)
+#define GPIO88_GPIO             MFP_CFG_IN(GPIO88, AF1)
+#define GPIO89_GPIO             MFP_CFG_IN(GPIO89, AF1)
+
+/* SDRAM */
+#define GPIO86_nSDCS2           MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH)
+#define GPIO87_nSDCS3           MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH)
+#define GPIO88_RDnWR            MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH)
+#define GPIO89_nACRESET         MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
+
+/* USB */
+#define GPIO9_USB_RCV           MFP_CFG_IN(GPIO9, AF1)
+#define GPIO32_USB_VP           MFP_CFG_IN(GPIO32, AF2)
+#define GPIO34_USB_VM           MFP_CFG_IN(GPIO34, AF2)
+#define GPIO39_USB_VPO          MFP_CFG_OUT(GPIO39, AF3, DRIVE_LOW)
+#define GPIO56_USB_VMO          MFP_CFG_OUT(GPIO56, AF1, DRIVE_LOW)
+#define GPIO57_USB_nOE          MFP_CFG_OUT(GPIO57, AF1, DRIVE_HIGH)
+
+/* ASSP */
+#define GPIO28_ASSP_BITCLK_IN   MFP_CFG_IN(GPIO28, AF3)
+#define GPIO28_ASSP_BITCLK_OUT  MFP_CFG_OUT(GPIO28, AF3, DRIVE_LOW)
+#define GPIO29_ASSP_RXD         MFP_CFG_IN(GPIO29, AF3)
+#define GPIO30_ASSP_TXD         MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
+#define GPIO31_ASSP_SFRM_IN     MFP_CFG_IN(GPIO31, AF1)
+#define GPIO31_ASSP_SFRM_OUT    MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
+#endif
+
 #endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
index 122bdbd53182..da4f85a4f990 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -11,6 +11,12 @@
 #include <mach/mfp.h>
 #include <mach/mfp-pxa2xx.h>
 
+/* Note: GPIO3/GPIO4 will be driven by Power I2C when PCFR/PI2C_EN
+ * bit is set, regardless of the GPIO configuration
+ */
+#define GPIO3_GPIO              MFP_CFG_IN(GPIO3, AF0)
+#define GPIO4_GPIO              MFP_CFG_IN(GPIO4, AF0)
+
 /* GPIO */
 #define GPIO85_GPIO             MFP_CFG_IN(GPIO85, AF0)
 #define GPIO86_GPIO             MFP_CFG_IN(GPIO86, AF0)
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa930.h b/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
index fabd9b4df827..fa73f56a1372 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
@@ -421,6 +421,7 @@
 #define GPIO20_PWM0             MFP_CFG_LPM(GPIO20, AF2, PULL_LOW)
 #define GPIO21_PWM2             MFP_CFG_LPM(GPIO21, AF3, PULL_LOW)
 #define GPIO22_PWM3             MFP_CFG_LPM(GPIO22, AF3, PULL_LOW)
+#define GPIO32_PWM0             MFP_CFG_LPM(GPIO32, AF4, PULL_LOW)
 
 /* CIR */
 #define GPIO46_CIR_OUT          MFP_CFG(GPIO46, AF1)
diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h
index 8483cb511831..02868447b0b1 100644
--- a/arch/arm/mach-pxa/include/mach/mioa701.h
+++ b/arch/arm/mach-pxa/include/mach/mioa701.h
@@ -10,12 +10,14 @@
          (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
 
 /* Global GPIOs */
-#define GPIO9_CHARGE_nEN                        9
+#define GPIO9_CHARGE_EN                         9
 #define GPIO18_POWEROFF                         18
 #define GPIO87_LCD_POWER                        87
+#define GPIO96_AC_DETECT                        96
+#define GPIO80_MAYBE_CHARGE_VDROP               80      /* Drop of 88mV */
 
 /* USB */
-#define GPIO13_USB_DETECT                       13
+#define GPIO13_nUSB_DETECT                      13
 #define GPIO22_USB_ENABLE                       22
 
 /* SDIO bits */
@@ -24,7 +26,10 @@
 #define GPIO91_SDIO_EN                          91
 
 /* Bluetooth */
+#define GPIO14_BT_nACTIVITY                     14
 #define GPIO83_BT_ON                            83
+#define GPIO77_BT_UNKNOWN1                      77
+#define GPIO86_BT_MAYBE_nRESET                  86
 
 /* GPS */
 #define GPIO23_GPS_UNKNOWN1                     23
diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h
index 4d452fcb1508..cfca8155be72 100644
--- a/arch/arm/mach-pxa/include/mach/mtd-xip.h
+++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h
@@ -15,6 +15,7 @@
 #ifndef __ARCH_PXA_MTD_XIP_H__
 #define __ARCH_PXA_MTD_XIP_H__
 
+#include <mach/hardware.h>
 #include <mach/pxa-regs.h>
 
 #define xip_irqpending()        (ICIP & ICMR)
diff --git a/arch/arm/mach-pxa/include/mach/palmasoc.h b/arch/arm/mach-pxa/include/mach/palmasoc.h
new file mode 100644
index 000000000000..6c4b1f7de20a
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palmasoc.h
@@ -0,0 +1,13 @@
+#ifndef _INCLUDE_PALMASOC_H_
+#define _INCLUDE_PALMASOC_H_
+struct palm27x_asoc_info {
+        int     jack_gpio;
+};
+
+#ifdef CONFIG_SND_PXA2XX_SOC_PALM27X
+void __init palm27x_asoc_set_pdata(struct palm27x_asoc_info *data);
+#else
+static inline void palm27x_asoc_set_pdata(struct palm27x_asoc_info *data) {}
+#endif
+
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h
index 15295d960000..31d615aa7723 100644
--- a/arch/arm/mach-pxa/include/mach/pxa-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa-regs.h
@@ -13,6 +13,7 @@
 #ifndef __PXA_REGS_H
 #define __PXA_REGS_H
 
+#include <mach/hardware.h>
 
 /*
  * PXA Chip selects
@@ -123,298 +124,6 @@
 #define DCMD_WIDTH4     (3 << 14)       /* 4 byte width (Word) */
 #define DCMD_LENGTH     0x01fff         /* length mask (max = 8K - 1) */
 
-
-/*
- * UARTs
- */
-
-/* Full Function UART (FFUART) */
-#define FFUART          FFRBR
-#define FFRBR           __REG(0x40100000)  /* Receive Buffer Register (read only) */
-#define FFTHR           __REG(0x40100000)  /* Transmit Holding Register (write only) */
-#define FFIER           __REG(0x40100004)  /* Interrupt Enable Register (read/write) */
-#define FFIIR           __REG(0x40100008)  /* Interrupt ID Register (read only) */
-#define FFFCR           __REG(0x40100008)  /* FIFO Control Register (write only) */
-#define FFLCR           __REG(0x4010000C)  /* Line Control Register (read/write) */
-#define FFMCR           __REG(0x40100010)  /* Modem Control Register (read/write) */
-#define FFLSR           __REG(0x40100014)  /* Line Status Register (read only) */
-#define FFMSR           __REG(0x40100018)  /* Modem Status Register (read only) */
-#define FFSPR           __REG(0x4010001C)  /* Scratch Pad Register (read/write) */
-#define FFISR           __REG(0x40100020)  /* Infrared Selection Register (read/write) */
-#define FFDLL           __REG(0x40100000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
-#define FFDLH           __REG(0x40100004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
-
-/* Bluetooth UART (BTUART) */
-#define BTUART          BTRBR
-#define BTRBR           __REG(0x40200000)  /* Receive Buffer Register (read only) */
-#define BTTHR           __REG(0x40200000)  /* Transmit Holding Register (write only) */
-#define BTIER           __REG(0x40200004)  /* Interrupt Enable Register (read/write) */
-#define BTIIR           __REG(0x40200008)  /* Interrupt ID Register (read only) */
-#define BTFCR           __REG(0x40200008)  /* FIFO Control Register (write only) */
-#define BTLCR           __REG(0x4020000C)  /* Line Control Register (read/write) */
-#define BTMCR           __REG(0x40200010)  /* Modem Control Register (read/write) */
-#define BTLSR           __REG(0x40200014)  /* Line Status Register (read only) */
-#define BTMSR           __REG(0x40200018)  /* Modem Status Register (read only) */
-#define BTSPR           __REG(0x4020001C)  /* Scratch Pad Register (read/write) */
-#define BTISR           __REG(0x40200020)  /* Infrared Selection Register (read/write) */
-#define BTDLL           __REG(0x40200000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
-#define BTDLH           __REG(0x40200004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
-
-/* Standard UART (STUART) */
-#define STUART          STRBR
-#define STRBR           __REG(0x40700000)  /* Receive Buffer Register (read only) */
-#define STTHR           __REG(0x40700000)  /* Transmit Holding Register (write only) */
-#define STIER           __REG(0x40700004)  /* Interrupt Enable Register (read/write) */
-#define STIIR           __REG(0x40700008)  /* Interrupt ID Register (read only) */
-#define STFCR           __REG(0x40700008)  /* FIFO Control Register (write only) */
-#define STLCR           __REG(0x4070000C)  /* Line Control Register (read/write) */
-#define STMCR           __REG(0x40700010)  /* Modem Control Register (read/write) */
-#define STLSR           __REG(0x40700014)  /* Line Status Register (read only) */
-#define STMSR           __REG(0x40700018)  /* Reserved */
-#define STSPR           __REG(0x4070001C)  /* Scratch Pad Register (read/write) */
-#define STISR           __REG(0x40700020)  /* Infrared Selection Register (read/write) */
-#define STDLL           __REG(0x40700000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
-#define STDLH           __REG(0x40700004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
-
-/* Hardware UART (HWUART) */
-#define HWUART          HWRBR
-#define HWRBR           __REG(0x41600000)  /* Receive Buffer Register (read only) */
-#define HWTHR           __REG(0x41600000)  /* Transmit Holding Register (write only) */
-#define HWIER           __REG(0x41600004)  /* Interrupt Enable Register (read/write) */
-#define HWIIR           __REG(0x41600008)  /* Interrupt ID Register (read only) */
-#define HWFCR           __REG(0x41600008)  /* FIFO Control Register (write only) */
-#define HWLCR           __REG(0x4160000C)  /* Line Control Register (read/write) */
-#define HWMCR           __REG(0x41600010)  /* Modem Control Register (read/write) */
-#define HWLSR           __REG(0x41600014)  /* Line Status Register (read only) */
-#define HWMSR           __REG(0x41600018)  /* Modem Status Register (read only) */
-#define HWSPR           __REG(0x4160001C)  /* Scratch Pad Register (read/write) */
-#define HWISR           __REG(0x41600020)  /* Infrared Selection Register (read/write) */
-#define HWFOR           __REG(0x41600024)  /* Receive FIFO Occupancy Register (read only) */
-#define HWABR           __REG(0x41600028)  /* Auto-Baud Control Register (read/write) */
-#define HWACR           __REG(0x4160002C)  /* Auto-Baud Count Register (read only) */
-#define HWDLL           __REG(0x41600000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
-#define HWDLH           __REG(0x41600004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
-
-#define IER_DMAE        (1 << 7)        /* DMA Requests Enable */
-#define IER_UUE         (1 << 6)        /* UART Unit Enable */
-#define IER_NRZE        (1 << 5)        /* NRZ coding Enable */
-#define IER_RTIOE       (1 << 4)        /* Receiver Time Out Interrupt Enable */
-#define IER_MIE         (1 << 3)        /* Modem Interrupt Enable */
-#define IER_RLSE        (1 << 2)        /* Receiver Line Status Interrupt Enable */
-#define IER_TIE         (1 << 1)        /* Transmit Data request Interrupt Enable */
-#define IER_RAVIE       (1 << 0)        /* Receiver Data Available Interrupt Enable */
-
-#define IIR_FIFOES1     (1 << 7)        /* FIFO Mode Enable Status */
-#define IIR_FIFOES0     (1 << 6)        /* FIFO Mode Enable Status */
-#define IIR_TOD         (1 << 3)        /* Time Out Detected */
-#define IIR_IID2        (1 << 2)        /* Interrupt Source Encoded */
-#define IIR_IID1        (1 << 1)        /* Interrupt Source Encoded */
-#define IIR_IP          (1 << 0)        /* Interrupt Pending (active low) */
-
-#define FCR_ITL2        (1 << 7)        /* Interrupt Trigger Level */
-#define FCR_ITL1        (1 << 6)        /* Interrupt Trigger Level */
-#define FCR_RESETTF     (1 << 2)        /* Reset Transmitter FIFO */
-#define FCR_RESETRF     (1 << 1)        /* Reset Receiver FIFO */
-#define FCR_TRFIFOE     (1 << 0)        /* Transmit and Receive FIFO Enable */
-#define FCR_ITL_1       (0)
-#define FCR_ITL_8       (FCR_ITL1)
-#define FCR_ITL_16      (FCR_ITL2)
-#define FCR_ITL_32      (FCR_ITL2|FCR_ITL1)
-
-#define LCR_DLAB        (1 << 7)        /* Divisor Latch Access Bit */
-#define LCR_SB          (1 << 6)        /* Set Break */
-#define LCR_STKYP       (1 << 5)        /* Sticky Parity */
-#define LCR_EPS         (1 << 4)        /* Even Parity Select */
-#define LCR_PEN         (1 << 3)        /* Parity Enable */
-#define LCR_STB         (1 << 2)        /* Stop Bit */
-#define LCR_WLS1        (1 << 1)        /* Word Length Select */
-#define LCR_WLS0        (1 << 0)        /* Word Length Select */
-
-#define LSR_FIFOE       (1 << 7)        /* FIFO Error Status */
-#define LSR_TEMT        (1 << 6)        /* Transmitter Empty */
-#define LSR_TDRQ        (1 << 5)        /* Transmit Data Request */
-#define LSR_BI          (1 << 4)        /* Break Interrupt */
-#define LSR_FE          (1 << 3)        /* Framing Error */
-#define LSR_PE          (1 << 2)        /* Parity Error */
-#define LSR_OE          (1 << 1)        /* Overrun Error */
-#define LSR_DR          (1 << 0)        /* Data Ready */
-
-#define MCR_LOOP        (1 << 4)
-#define MCR_OUT2        (1 << 3)        /* force MSR_DCD in loopback mode */
-#define MCR_OUT1        (1 << 2)        /* force MSR_RI in loopback mode */
-#define MCR_RTS         (1 << 1)        /* Request to Send */
-#define MCR_DTR         (1 << 0)        /* Data Terminal Ready */
-
-#define MSR_DCD         (1 << 7)        /* Data Carrier Detect */
-#define MSR_RI          (1 << 6)        /* Ring Indicator */
-#define MSR_DSR         (1 << 5)        /* Data Set Ready */
-#define MSR_CTS         (1 << 4)        /* Clear To Send */
-#define MSR_DDCD        (1 << 3)        /* Delta Data Carrier Detect */
-#define MSR_TERI        (1 << 2)        /* Trailing Edge Ring Indicator */
-#define MSR_DDSR        (1 << 1)        /* Delta Data Set Ready */
-#define MSR_DCTS        (1 << 0)        /* Delta Clear To Send */
-
-/*
- * IrSR (Infrared Selection Register)
- */
-#define STISR_RXPL      (1 << 4)        /* Receive Data Polarity */
-#define STISR_TXPL      (1 << 3)        /* Transmit Data Polarity */
-#define STISR_XMODE     (1 << 2)        /* Transmit Pulse Width Select */
-#define STISR_RCVEIR    (1 << 1)        /* Receiver SIR Enable */
-#define STISR_XMITIR    (1 << 0)        /* Transmitter SIR Enable */
-
-
-/*
- * I2C registers - moved into drivers/i2c/busses/i2c-pxa.c
- */
-
-/*
- * Serial Audio Controller - moved into sound/soc/pxa/pxa2xx-i2s.c
- */
-
-/*
- * AC97 Controller registers
- */
-
-#define POCR            __REG(0x40500000)  /* PCM Out Control Register */
-#define POCR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
-#define POCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define PICR            __REG(0x40500004)  /* PCM In Control Register */
-#define PICR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
-#define PICR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define MCCR            __REG(0x40500008)  /* Mic In Control Register */
-#define MCCR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
-#define MCCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define GCR             __REG(0x4050000C)  /* Global Control Register */
-#ifdef CONFIG_PXA3xx
-#define GCR_CLKBPB      (1 << 31)       /* Internal clock enable */
-#endif
-#define GCR_nDMAEN      (1 << 24)       /* non DMA Enable */
-#define GCR_CDONE_IE    (1 << 19)       /* Command Done Interrupt Enable */
-#define GCR_SDONE_IE    (1 << 18)       /* Status Done Interrupt Enable */
-#define GCR_SECRDY_IEN  (1 << 9)        /* Secondary Ready Interrupt Enable */
-#define GCR_PRIRDY_IEN  (1 << 8)        /* Primary Ready Interrupt Enable */
-#define GCR_SECRES_IEN  (1 << 5)        /* Secondary Resume Interrupt Enable */
-#define GCR_PRIRES_IEN  (1 << 4)        /* Primary Resume Interrupt Enable */
-#define GCR_ACLINK_OFF  (1 << 3)        /* AC-link Shut Off */
-#define GCR_WARM_RST    (1 << 2)        /* AC97 Warm Reset */
-#define GCR_COLD_RST    (1 << 1)        /* AC'97 Cold Reset (0 = active) */
-#define GCR_GIE         (1 << 0)        /* Codec GPI Interrupt Enable */
-
-#define POSR            __REG(0x40500010)  /* PCM Out Status Register */
-#define POSR_FIFOE      (1 << 4)        /* FIFO error */
-#define POSR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define PISR            __REG(0x40500014)  /* PCM In Status Register */
-#define PISR_FIFOE      (1 << 4)        /* FIFO error */
-#define PISR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
-#define PISR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define MCSR            __REG(0x40500018)  /* Mic In Status Register */
-#define MCSR_FIFOE      (1 << 4)        /* FIFO error */
-#define MCSR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
-#define MCSR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define GSR             __REG(0x4050001C)  /* Global Status Register */
-#define GSR_CDONE       (1 << 19)       /* Command Done */
-#define GSR_SDONE       (1 << 18)       /* Status Done */
-#define GSR_RDCS        (1 << 15)       /* Read Completion Status */
-#define GSR_BIT3SLT12   (1 << 14)       /* Bit 3 of slot 12 */
-#define GSR_BIT2SLT12   (1 << 13)       /* Bit 2 of slot 12 */
-#define GSR_BIT1SLT12   (1 << 12)       /* Bit 1 of slot 12 */
-#define GSR_SECRES      (1 << 11)       /* Secondary Resume Interrupt */
-#define GSR_PRIRES      (1 << 10)       /* Primary Resume Interrupt */
-#define GSR_SCR         (1 << 9)        /* Secondary Codec Ready */
-#define GSR_PCR         (1 << 8)        /*  Primary Codec Ready */
-#define GSR_MCINT       (1 << 7)        /* Mic In Interrupt */
-#define GSR_POINT       (1 << 6)        /* PCM Out Interrupt */
-#define GSR_PIINT       (1 << 5)        /* PCM In Interrupt */
-#define GSR_ACOFFD      (1 << 3)        /* AC-link Shut Off Done */
-#define GSR_MOINT       (1 << 2)        /* Modem Out Interrupt */
-#define GSR_MIINT       (1 << 1)        /* Modem In Interrupt */
-#define GSR_GSCI        (1 << 0)        /* Codec GPI Status Change Interrupt */
-
-#define CAR             __REG(0x40500020)  /* CODEC Access Register */
-#define CAR_CAIP        (1 << 0)        /* Codec Access In Progress */
-
-#define PCDR            __REG(0x40500040)  /* PCM FIFO Data Register */
-#define MCDR            __REG(0x40500060)  /* Mic-in FIFO Data Register */
-
-#define MOCR            __REG(0x40500100)  /* Modem Out Control Register */
-#define MOCR_FEIE       (1 << 3)        /* FIFO Error */
-#define MOCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define MICR            __REG(0x40500108)  /* Modem In Control Register */
-#define MICR_FEIE       (1 << 3)        /* FIFO Error */
-#define MICR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define MOSR            __REG(0x40500110)  /* Modem Out Status Register */
-#define MOSR_FIFOE      (1 << 4)        /* FIFO error */
-#define MOSR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define MISR            __REG(0x40500118)  /* Modem In Status Register */
-#define MISR_FIFOE      (1 << 4)        /* FIFO error */
-#define MISR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
-#define MISR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define MODR            __REG(0x40500140)  /* Modem FIFO Data Register */
-
-#define PAC_REG_BASE    __REG(0x40500200)  /* Primary Audio Codec */
-#define SAC_REG_BASE    __REG(0x40500300)  /* Secondary Audio Codec */
-#define PMC_REG_BASE    __REG(0x40500400)  /* Primary Modem Codec */
-#define SMC_REG_BASE    __REG(0x40500500)  /* Secondary Modem Codec */
-
-
-/*
- * Fast Infrared Communication Port
- */
-
-#define FICP            __REG(0x40800000)  /* Start of FICP area */
-#define ICCR0           __REG(0x40800000)  /* ICP Control Register 0 */
-#define ICCR1           __REG(0x40800004)  /* ICP Control Register 1 */
-#define ICCR2           __REG(0x40800008)  /* ICP Control Register 2 */
-#define ICDR            __REG(0x4080000c)  /* ICP Data Register */
-#define ICSR0           __REG(0x40800014)  /* ICP Status Register 0 */
-#define ICSR1           __REG(0x40800018)  /* ICP Status Register 1 */
-
-#define ICCR0_AME       (1 << 7)        /* Address match enable */
-#define ICCR0_TIE       (1 << 6)        /* Transmit FIFO interrupt enable */
-#define ICCR0_RIE       (1 << 5)        /* Recieve FIFO interrupt enable */
-#define ICCR0_RXE       (1 << 4)        /* Receive enable */
-#define ICCR0_TXE       (1 << 3)        /* Transmit enable */
-#define ICCR0_TUS       (1 << 2)        /* Transmit FIFO underrun select */
-#define ICCR0_LBM       (1 << 1)        /* Loopback mode */
-#define ICCR0_ITR       (1 << 0)        /* IrDA transmission */
-
-#define ICCR2_RXP       (1 << 3)        /* Receive Pin Polarity select */
-#define ICCR2_TXP       (1 << 2)        /* Transmit Pin Polarity select */
-#define ICCR2_TRIG      (3 << 0)        /* Receive FIFO Trigger threshold */
-#define ICCR2_TRIG_8    (0 << 0)        /*      >= 8 bytes */
-#define ICCR2_TRIG_16   (1 << 0)        /*      >= 16 bytes */
-#define ICCR2_TRIG_32   (2 << 0)        /*      >= 32 bytes */
-
-#ifdef CONFIG_PXA27x
-#define ICSR0_EOC       (1 << 6)        /* DMA End of Descriptor Chain */
-#endif
-#define ICSR0_FRE       (1 << 5)        /* Framing error */
-#define ICSR0_RFS       (1 << 4)        /* Receive FIFO service request */
-#define ICSR0_TFS       (1 << 3)        /* Transnit FIFO service request */
-#define ICSR0_RAB       (1 << 2)        /* Receiver abort */
-#define ICSR0_TUR       (1 << 1)        /* Trunsmit FIFO underun */
-#define ICSR0_EIF       (1 << 0)        /* End/Error in FIFO */
-
-#define ICSR1_ROR       (1 << 6)        /* Receiver FIFO underrun  */
-#define ICSR1_CRE       (1 << 5)        /* CRC error */
-#define ICSR1_EOF       (1 << 4)        /* End of frame */
-#define ICSR1_TNF       (1 << 3)        /* Transmit FIFO not full */
-#define ICSR1_RNE       (1 << 2)        /* Receive FIFO not empty */
-#define ICSR1_TBY       (1 << 1)        /* Tramsmiter busy flag */
-#define ICSR1_RSY       (1 << 0)        /* Recevier synchronized flag */
-
-
 /*
  * Real Time Clock
  */
@@ -463,19 +172,6 @@
 
 
 /*
- * Pulse Width Modulator
- */
-
-#define PWM_CTRL0       __REG(0x40B00000)  /* PWM 0 Control Register */
-#define PWM_PWDUTY0     __REG(0x40B00004)  /* PWM 0 Duty Cycle Register */
-#define PWM_PERVAL0     __REG(0x40B00008)  /* PWM 0 Period Control Register */
-
-#define PWM_CTRL1       __REG(0x40C00000)  /* PWM 1Control Register */
-#define PWM_PWDUTY1     __REG(0x40C00004)  /* PWM 1 Duty Cycle Register */
-#define PWM_PERVAL1     __REG(0x40C00008)  /* PWM 1 Period Control Register */
-
-
-/*
  * Interrupt Controller
  */
 
@@ -496,19 +192,6 @@
  * General Purpose I/O
  */
 
-#define GPIO0_BASE      ((void __iomem *)io_p2v(0x40E00000))
-#define GPIO1_BASE      ((void __iomem *)io_p2v(0x40E00004))
-#define GPIO2_BASE      ((void __iomem *)io_p2v(0x40E00008))
-#define GPIO3_BASE      ((void __iomem *)io_p2v(0x40E00100))
-
-#define GPLR_OFFSET     0x00
-#define GPDR_OFFSET     0x0C
-#define GPSR_OFFSET     0x18
-#define GPCR_OFFSET     0x24
-#define GRER_OFFSET     0x30
-#define GFER_OFFSET     0x3C
-#define GEDR_OFFSET     0x48
-
 #define GPLR0           __REG(0x40E00000)  /* GPIO Pin-Level Register GPIO<31:0> */
 #define GPLR1           __REG(0x40E00004)  /* GPIO Pin-Level Register GPIO<63:32> */
 #define GPLR2           __REG(0x40E00008)  /* GPIO Pin-Level Register GPIO<80:64> */
@@ -558,10 +241,6 @@
 
 #define GPIO_bit(x)     (1 << ((x) & 0x1f))
 
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
-
-/* Interrupt Controller */
-
 #define _GPLR(x)        __REG2(0x40E00000, ((x) & 0x60) >> 3)
 #define _GPDR(x)        __REG2(0x40E0000C, ((x) & 0x60) >> 3)
 #define _GPSR(x)        __REG2(0x40E00018, ((x) & 0x60) >> 3)
@@ -580,189 +259,5 @@
 #define GEDR(x)         (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3))
 #define GAFR(x)         (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \
                          ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U)))
-#else
-
-#define GPLR(x)         __REG2(0x40E00000, ((x) & 0x60) >> 3)
-#define GPDR(x)         __REG2(0x40E0000C, ((x) & 0x60) >> 3)
-#define GPSR(x)         __REG2(0x40E00018, ((x) & 0x60) >> 3)
-#define GPCR(x)         __REG2(0x40E00024, ((x) & 0x60) >> 3)
-#define GRER(x)         __REG2(0x40E00030, ((x) & 0x60) >> 3)
-#define GFER(x)         __REG2(0x40E0003C, ((x) & 0x60) >> 3)
-#define GEDR(x)         __REG2(0x40E00048, ((x) & 0x60) >> 3)
-#define GAFR(x)         __REG2(0x40E00054, ((x) & 0x70) >> 2)
-
-#endif
-
-/*
- * Power Manager - see pxa2xx-regs.h
- */
-
-/*
- * SSP Serial Port Registers - see arch/arm/mach-pxa/include/mach/regs-ssp.h
- */
-
-/*
- * MultiMediaCard (MMC) controller - see drivers/mmc/host/pxamci.h
- */
-
-/*
- * Core Clock - see arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
- */
-
-#ifdef CONFIG_PXA27x
-
-/* Camera Interface */
-#define CICR0           __REG(0x50000000)
-#define CICR1           __REG(0x50000004)
-#define CICR2           __REG(0x50000008)
-#define CICR3           __REG(0x5000000C)
-#define CICR4           __REG(0x50000010)
-#define CISR            __REG(0x50000014)
-#define CIFR            __REG(0x50000018)
-#define CITOR           __REG(0x5000001C)
-#define CIBR0           __REG(0x50000028)
-#define CIBR1           __REG(0x50000030)
-#define CIBR2           __REG(0x50000038)
-
-#define CICR0_DMAEN     (1 << 31)       /* DMA request enable */
-#define CICR0_PAR_EN    (1 << 30)       /* Parity enable */
-#define CICR0_SL_CAP_EN (1 << 29)       /* Capture enable for slave mode */
-#define CICR0_ENB       (1 << 28)       /* Camera interface enable */
-#define CICR0_DIS       (1 << 27)       /* Camera interface disable */
-#define CICR0_SIM       (0x7 << 24)     /* Sensor interface mode mask */
-#define CICR0_TOM       (1 << 9)        /* Time-out mask */
-#define CICR0_RDAVM     (1 << 8)        /* Receive-data-available mask */
-#define CICR0_FEM       (1 << 7)        /* FIFO-empty mask */
-#define CICR0_EOLM      (1 << 6)        /* End-of-line mask */
-#define CICR0_PERRM     (1 << 5)        /* Parity-error mask */
-#define CICR0_QDM       (1 << 4)        /* Quick-disable mask */
-#define CICR0_CDM       (1 << 3)        /* Disable-done mask */
-#define CICR0_SOFM      (1 << 2)        /* Start-of-frame mask */
-#define CICR0_EOFM      (1 << 1)        /* End-of-frame mask */
-#define CICR0_FOM       (1 << 0)        /* FIFO-overrun mask */
-
-#define CICR1_TBIT      (1 << 31)       /* Transparency bit */
-#define CICR1_RGBT_CONV (0x3 << 29)     /* RGBT conversion mask */
-#define CICR1_PPL       (0x7ff << 15)   /* Pixels per line mask */
-#define CICR1_RGB_CONV  (0x7 << 12)     /* RGB conversion mask */
-#define CICR1_RGB_F     (1 << 11)       /* RGB format */
-#define CICR1_YCBCR_F   (1 << 10)       /* YCbCr format */
-#define CICR1_RGB_BPP   (0x7 << 7)      /* RGB bis per pixel mask */
-#define CICR1_RAW_BPP   (0x3 << 5)      /* Raw bis per pixel mask */
-#define CICR1_COLOR_SP  (0x3 << 3)      /* Color space mask */
-#define CICR1_DW        (0x7 << 0)      /* Data width mask */
-
-#define CICR2_BLW       (0xff << 24)    /* Beginning-of-line pixel clock
-                                           wait count mask */
-#define CICR2_ELW       (0xff << 16)    /* End-of-line pixel clock
-                                           wait count mask */
-#define CICR2_HSW       (0x3f << 10)    /* Horizontal sync pulse width mask */
-#define CICR2_BFPW      (0x3f << 3)     /* Beginning-of-frame pixel clock
-                                           wait count mask */
-#define CICR2_FSW       (0x7 << 0)      /* Frame stabilization
-                                           wait count mask */
-
-#define CICR3_BFW       (0xff << 24)    /* Beginning-of-frame line clock
-                                           wait count mask */
-#define CICR3_EFW       (0xff << 16)    /* End-of-frame line clock
-                                           wait count mask */
-#define CICR3_VSW       (0x3f << 10)    /* Vertical sync pulse width mask */
-#define CICR3_BFPW      (0x3f << 3)     /* Beginning-of-frame pixel clock
-                                           wait count mask */
-#define CICR3_LPF       (0x7ff << 0)    /* Lines per frame mask */
-
-#define CICR4_MCLK_DLY  (0x3 << 24)     /* MCLK Data Capture Delay mask */
-#define CICR4_PCLK_EN   (1 << 23)       /* Pixel clock enable */
-#define CICR4_PCP       (1 << 22)       /* Pixel clock polarity */
-#define CICR4_HSP       (1 << 21)       /* Horizontal sync polarity */
-#define CICR4_VSP       (1 << 20)       /* Vertical sync polarity */
-#define CICR4_MCLK_EN   (1 << 19)       /* MCLK enable */
-#define CICR4_FR_RATE   (0x7 << 8)      /* Frame rate mask */
-#define CICR4_DIV       (0xff << 0)     /* Clock divisor mask */
-
-#define CISR_FTO        (1 << 15)       /* FIFO time-out */
-#define CISR_RDAV_2     (1 << 14)       /* Channel 2 receive data available */
-#define CISR_RDAV_1     (1 << 13)       /* Channel 1 receive data available */
-#define CISR_RDAV_0     (1 << 12)       /* Channel 0 receive data available */
-#define CISR_FEMPTY_2   (1 << 11)       /* Channel 2 FIFO empty */
-#define CISR_FEMPTY_1   (1 << 10)       /* Channel 1 FIFO empty */
-#define CISR_FEMPTY_0   (1 << 9)        /* Channel 0 FIFO empty */
-#define CISR_EOL        (1 << 8)        /* End of line */
-#define CISR_PAR_ERR    (1 << 7)        /* Parity error */
-#define CISR_CQD        (1 << 6)        /* Camera interface quick disable */
-#define CISR_CDD        (1 << 5)        /* Camera interface disable done */
-#define CISR_SOF        (1 << 4)        /* Start of frame */
-#define CISR_EOF        (1 << 3)        /* End of frame */
-#define CISR_IFO_2      (1 << 2)        /* FIFO overrun for Channel 2 */
-#define CISR_IFO_1      (1 << 1)        /* FIFO overrun for Channel 1 */
-#define CISR_IFO_0      (1 << 0)        /* FIFO overrun for Channel 0 */
-
-#define CIFR_FLVL2      (0x7f << 23)    /* FIFO 2 level mask */
-#define CIFR_FLVL1      (0x7f << 16)    /* FIFO 1 level mask */
-#define CIFR_FLVL0      (0xff << 8)     /* FIFO 0 level mask */
-#define CIFR_THL_0      (0x3 << 4)      /* Threshold Level for Channel 0 FIFO */
-#define CIFR_RESET_F    (1 << 3)        /* Reset input FIFOs */
-#define CIFR_FEN2       (1 << 2)        /* FIFO enable for channel 2 */
-#define CIFR_FEN1       (1 << 1)        /* FIFO enable for channel 1 */
-#define CIFR_FEN0       (1 << 0)        /* FIFO enable for channel 0 */
-
-#define SRAM_SIZE               0x40000 /* 4x64K  */
-
-#define SRAM_MEM_PHYS           0x5C000000
-
-#define IMPMCR          __REG(0x58000000) /* IM Power Management Control Reg */
-#define IMPMSR          __REG(0x58000008) /* IM Power Management Status Reg */
-
-#define IMPMCR_PC3              (0x3 << 22) /* Bank 3 Power Control */
-#define IMPMCR_PC3_RUN_MODE     (0x0 << 22) /*   Run mode */
-#define IMPMCR_PC3_STANDBY_MODE (0x1 << 22) /*   Standby mode */
-#define IMPMCR_PC3_AUTO_MODE    (0x3 << 22) /*   Automatically controlled */
-
-#define IMPMCR_PC2              (0x3 << 20) /* Bank 2 Power Control */
-#define IMPMCR_PC2_RUN_MODE     (0x0 << 20) /*   Run mode */
-#define IMPMCR_PC2_STANDBY_MODE (0x1 << 20) /*   Standby mode */
-#define IMPMCR_PC2_AUTO_MODE    (0x3 << 20) /*   Automatically controlled */
-
-#define IMPMCR_PC1              (0x3 << 18) /* Bank 1 Power Control */
-#define IMPMCR_PC1_RUN_MODE     (0x0 << 18) /*   Run mode */
-#define IMPMCR_PC1_STANDBY_MODE (0x1 << 18) /*   Standby mode */
-#define IMPMCR_PC1_AUTO_MODE    (0x3 << 18) /*   Automatically controlled */
-
-#define IMPMCR_PC0              (0x3 << 16) /* Bank 0 Power Control */
-#define IMPMCR_PC0_RUN_MODE     (0x0 << 16) /*   Run mode */
-#define IMPMCR_PC0_STANDBY_MODE (0x1 << 16) /*   Standby mode */
-#define IMPMCR_PC0_AUTO_MODE    (0x3 << 16) /*   Automatically controlled */
-
-#define IMPMCR_AW3              (1 << 11) /* Bank 3 Automatic Wake-up enable */
-#define IMPMCR_AW2              (1 << 10) /* Bank 2 Automatic Wake-up enable */
-#define IMPMCR_AW1              (1 << 9)  /* Bank 1 Automatic Wake-up enable */
-#define IMPMCR_AW0              (1 << 8)  /* Bank 0 Automatic Wake-up enable */
-
-#define IMPMCR_DST              (0xFF << 0) /* Delay Standby Time, ms */
-
-#define IMPMSR_PS3              (0x3 << 6) /* Bank 3 Power Status: */
-#define IMPMSR_PS3_RUN_MODE     (0x0 << 6) /*    Run mode */
-#define IMPMSR_PS3_STANDBY_MODE (0x1 << 6) /*    Standby mode */
-
-#define IMPMSR_PS2              (0x3 << 4) /* Bank 2 Power Status: */
-#define IMPMSR_PS2_RUN_MODE     (0x0 << 4) /*    Run mode */
-#define IMPMSR_PS2_STANDBY_MODE (0x1 << 4) /*    Standby mode */
-
-#define IMPMSR_PS1              (0x3 << 2) /* Bank 1 Power Status: */
-#define IMPMSR_PS1_RUN_MODE     (0x0 << 2) /*    Run mode */
-#define IMPMSR_PS1_STANDBY_MODE (0x1 << 2) /*    Standby mode */
-
-#define IMPMSR_PS0              (0x3 << 0) /* Bank 0 Power Status: */
-#define IMPMSR_PS0_RUN_MODE     (0x0 << 0) /*    Run mode */
-#define IMPMSR_PS0_STANDBY_MODE (0x1 << 0) /*    Standby mode */
-
-#endif
-
-/* PWRMODE register M field values */
-
-#define PWRMODE_IDLE            0x1
-#define PWRMODE_STANDBY         0x2
-#define PWRMODE_SLEEP           0x3
-#define PWRMODE_DEEPSLEEP       0x7
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
index 6ef1dd09970b..d83393e25273 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
@@ -365,4 +365,9 @@
 #define GPIO117_I2CSCL_MD       (117 | GPIO_ALT_FN_1_IN)
 #define GPIO118_I2CSDA_MD       (118 | GPIO_ALT_FN_1_IN)
 
+/*
+ * Handy routine to set GPIO alternate functions
+ */
+extern int pxa_gpio_mode( int gpio_mode );
+
 #endif /* __ASM_ARCH_PXA2XX_GPIO_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
index 806ecfea44bf..77102d695cc7 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
@@ -49,6 +49,11 @@
 #define MECR_NOS        (1 << 0)        /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
 #define MECR_CIT        (1 << 1)        /* Card Is There: 0 -> no card, 1 -> card inserted */
 
+#define MDCNFG_DE0      (1 << 0)        /* SDRAM Bank 0 Enable */
+#define MDCNFG_DE1      (1 << 1)        /* SDRAM Bank 1 Enable */
+#define MDCNFG_DE2      (1 << 16)       /* SDRAM Bank 2 Enable */
+#define MDCNFG_DE3      (1 << 17)       /* SDRAM Bank 3 Enable */
+
 #define MDREFR_K0DB4    (1 << 29)       /* SDCLK0 Divide by 4 Control/Status */
 #define MDREFR_K2FREE   (1 << 25)       /* SDRAM Free-Running Control */
 #define MDREFR_K1FREE   (1 << 24)       /* SDRAM Free-Running Control */
@@ -243,4 +248,11 @@
 #define OSCC_OON        (1 << 1)        /* 32.768kHz OON (write-once only bit) */
 #define OSCC_OOK        (1 << 0)        /* 32.768kHz OOK (read-only bit) */
 
+/* PWRMODE register M field values */
+
+#define PWRMODE_IDLE            0x1
+#define PWRMODE_STANDBY         0x2
+#define PWRMODE_SLEEP           0x3
+#define PWRMODE_DEEPSLEEP       0x7
+
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index cbda4d35c421..6932720ba04e 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -48,6 +48,7 @@
 #define LCD_MONO_DSTN_8BPP      ((8  << 4) | LCD_TYPE_MONO_DSTN)
 #define LCD_COLOR_STN_8BPP      ((8  << 4) | LCD_TYPE_COLOR_STN)
 #define LCD_COLOR_DSTN_16BPP    ((16 << 4) | LCD_TYPE_COLOR_DSTN)
+#define LCD_COLOR_TFT_8BPP      ((8  << 4) | LCD_TYPE_COLOR_TFT)
 #define LCD_COLOR_TFT_16BPP     ((16 << 4) | LCD_TYPE_COLOR_TFT)
 #define LCD_COLOR_TFT_18BPP     ((18 << 4) | LCD_TYPE_COLOR_TFT)
 #define LCD_SMART_PANEL_8BPP    ((8  << 4) | LCD_TYPE_SMART_PANEL)
@@ -94,6 +95,10 @@ struct pxafb_mode_info {
          *    in pxa27x and pxa3xx, initialize them to the same value or
          *    the larger one will be used
          * 3. same to {rd,wr}_pulse_width
+         *
+         * 4. LCD_PCLK_EDGE_{RISE,FALL} controls the L_PCLK_WR polarity
+         * 5. sync & FB_SYNC_HOR_HIGH_ACT controls the L_LCLK_A0
+         * 6. sync & FB_SYNC_VERT_HIGH_ACT controls the L_LCLK_RD
          */
         unsigned        a0csrd_set_hld; /* A0 and CS Setup/Hold Time before/after L_FCLK_RD */
         unsigned        a0cswr_set_hld; /* A0 and CS Setup/Hold Time before/after L_PCLK_WR */
@@ -108,6 +113,7 @@ struct pxafb_mach_info {
         unsigned int num_modes;
 
         unsigned int    lcd_conn;
+        unsigned long   video_mem_size;
 
         u_int           fixed_modes:1,
                         cmap_inverse:1,
diff --git a/arch/arm/mach-pxa/include/mach/regs-ac97.h b/arch/arm/mach-pxa/include/mach/regs-ac97.h
new file mode 100644
index 000000000000..e41b9d202b8c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/regs-ac97.h
@@ -0,0 +1,99 @@
+#ifndef __ASM_ARCH_REGS_AC97_H
+#define __ASM_ARCH_REGS_AC97_H
+
+/*
+ * AC97 Controller registers
+ */
+
+#define POCR            __REG(0x40500000)  /* PCM Out Control Register */
+#define POCR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
+#define POCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define PICR            __REG(0x40500004)  /* PCM In Control Register */
+#define PICR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
+#define PICR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define MCCR            __REG(0x40500008)  /* Mic In Control Register */
+#define MCCR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
+#define MCCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define GCR             __REG(0x4050000C)  /* Global Control Register */
+#ifdef CONFIG_PXA3xx
+#define GCR_CLKBPB      (1 << 31)       /* Internal clock enable */
+#endif
+#define GCR_nDMAEN      (1 << 24)       /* non DMA Enable */
+#define GCR_CDONE_IE    (1 << 19)       /* Command Done Interrupt Enable */
+#define GCR_SDONE_IE    (1 << 18)       /* Status Done Interrupt Enable */
+#define GCR_SECRDY_IEN  (1 << 9)        /* Secondary Ready Interrupt Enable */
+#define GCR_PRIRDY_IEN  (1 << 8)        /* Primary Ready Interrupt Enable */
+#define GCR_SECRES_IEN  (1 << 5)        /* Secondary Resume Interrupt Enable */
+#define GCR_PRIRES_IEN  (1 << 4)        /* Primary Resume Interrupt Enable */
+#define GCR_ACLINK_OFF  (1 << 3)        /* AC-link Shut Off */
+#define GCR_WARM_RST    (1 << 2)        /* AC97 Warm Reset */
+#define GCR_COLD_RST    (1 << 1)        /* AC'97 Cold Reset (0 = active) */
+#define GCR_GIE         (1 << 0)        /* Codec GPI Interrupt Enable */
+
+#define POSR            __REG(0x40500010)  /* PCM Out Status Register */
+#define POSR_FIFOE      (1 << 4)        /* FIFO error */
+#define POSR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define PISR            __REG(0x40500014)  /* PCM In Status Register */
+#define PISR_FIFOE      (1 << 4)        /* FIFO error */
+#define PISR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define PISR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define MCSR            __REG(0x40500018)  /* Mic In Status Register */
+#define MCSR_FIFOE      (1 << 4)        /* FIFO error */
+#define MCSR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define MCSR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define GSR             __REG(0x4050001C)  /* Global Status Register */
+#define GSR_CDONE       (1 << 19)       /* Command Done */
+#define GSR_SDONE       (1 << 18)       /* Status Done */
+#define GSR_RDCS        (1 << 15)       /* Read Completion Status */
+#define GSR_BIT3SLT12   (1 << 14)       /* Bit 3 of slot 12 */
+#define GSR_BIT2SLT12   (1 << 13)       /* Bit 2 of slot 12 */
+#define GSR_BIT1SLT12   (1 << 12)       /* Bit 1 of slot 12 */
+#define GSR_SECRES      (1 << 11)       /* Secondary Resume Interrupt */
+#define GSR_PRIRES      (1 << 10)       /* Primary Resume Interrupt */
+#define GSR_SCR         (1 << 9)        /* Secondary Codec Ready */
+#define GSR_PCR         (1 << 8)        /*  Primary Codec Ready */
+#define GSR_MCINT       (1 << 7)        /* Mic In Interrupt */
+#define GSR_POINT       (1 << 6)        /* PCM Out Interrupt */
+#define GSR_PIINT       (1 << 5)        /* PCM In Interrupt */
+#define GSR_ACOFFD      (1 << 3)        /* AC-link Shut Off Done */
+#define GSR_MOINT       (1 << 2)        /* Modem Out Interrupt */
+#define GSR_MIINT       (1 << 1)        /* Modem In Interrupt */
+#define GSR_GSCI        (1 << 0)        /* Codec GPI Status Change Interrupt */
+
+#define CAR             __REG(0x40500020)  /* CODEC Access Register */
+#define CAR_CAIP        (1 << 0)        /* Codec Access In Progress */
+
+#define PCDR            __REG(0x40500040)  /* PCM FIFO Data Register */
+#define MCDR            __REG(0x40500060)  /* Mic-in FIFO Data Register */
+
+#define MOCR            __REG(0x40500100)  /* Modem Out Control Register */
+#define MOCR_FEIE       (1 << 3)        /* FIFO Error */
+#define MOCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define MICR            __REG(0x40500108)  /* Modem In Control Register */
+#define MICR_FEIE       (1 << 3)        /* FIFO Error */
+#define MICR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define MOSR            __REG(0x40500110)  /* Modem Out Status Register */
+#define MOSR_FIFOE      (1 << 4)        /* FIFO error */
+#define MOSR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define MISR            __REG(0x40500118)  /* Modem In Status Register */
+#define MISR_FIFOE      (1 << 4)        /* FIFO error */
+#define MISR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define MISR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define MODR            __REG(0x40500140)  /* Modem FIFO Data Register */
+
+#define PAC_REG_BASE    __REG(0x40500200)  /* Primary Audio Codec */
+#define SAC_REG_BASE    __REG(0x40500300)  /* Secondary Audio Codec */
+#define PMC_REG_BASE    __REG(0x40500400)  /* Primary Modem Codec */
+#define SMC_REG_BASE    __REG(0x40500500)  /* Secondary Modem Codec */
+
+#endif /* __ASM_ARCH_REGS_AC97_H */
diff --git a/arch/arm/mach-pxa/include/mach/regs-lcd.h b/arch/arm/mach-pxa/include/mach/regs-lcd.h
index c689c4ea769c..f82dcea792d9 100644
--- a/arch/arm/mach-pxa/include/mach/regs-lcd.h
+++ b/arch/arm/mach-pxa/include/mach/regs-lcd.h
@@ -12,27 +12,29 @@
 #define LCCR3           (0x00C) /* LCD Controller Control Register 3 */
 #define LCCR4           (0x010) /* LCD Controller Control Register 4 */
 #define LCCR5           (0x014) /* LCD Controller Control Register 5 */
-#define DFBR0           (0x020) /* DMA Channel 0 Frame Branch Register */
-#define DFBR1           (0x024) /* DMA Channel 1 Frame Branch Register */
-#define LCSR            (0x038) /* LCD Controller Status Register */
+#define LCSR            (0x038) /* LCD Controller Status Register 0 */
+#define LCSR1           (0x034) /* LCD Controller Status Register 1 */
 #define LIIDR           (0x03C) /* LCD Controller Interrupt ID Register */
 #define TMEDRGBR        (0x040) /* TMED RGB Seed Register */
 #define TMEDCR          (0x044) /* TMED Control Register */
 
+#define FBR0            (0x020) /* DMA Channel 0 Frame Branch Register */
+#define FBR1            (0x024) /* DMA Channel 1 Frame Branch Register */
+#define FBR2            (0x028) /* DMA Channel 2 Frame Branch Register */
+#define FBR3            (0x02C) /* DMA Channel 2 Frame Branch Register */
+#define FBR4            (0x030) /* DMA Channel 2 Frame Branch Register */
+#define FBR5            (0x110) /* DMA Channel 2 Frame Branch Register */
+#define FBR6            (0x114) /* DMA Channel 2 Frame Branch Register */
+
+#define OVL1C1          (0x050) /* Overlay 1 Control Register 1 */
+#define OVL1C2          (0x060) /* Overlay 1 Control Register 2 */
+#define OVL2C1          (0x070) /* Overlay 2 Control Register 1 */
+#define OVL2C2          (0x080) /* Overlay 2 Control Register 2 */
+
 #define CMDCR           (0x100) /* Command Control Register */
 #define PRSR            (0x104) /* Panel Read Status Register */
 
-#define LCCR3_1BPP      (0 << 24)
-#define LCCR3_2BPP      (1 << 24)
-#define LCCR3_4BPP      (2 << 24)
-#define LCCR3_8BPP      (3 << 24)
-#define LCCR3_16BPP     (4 << 24)
-#define LCCR3_18BPP     (5 << 24)
-#define LCCR3_18BPP_P   (6 << 24)
-#define LCCR3_19BPP     (7 << 24)
-#define LCCR3_19BPP_P   (1 << 29)
-#define LCCR3_24BPP     ((1 << 29) | (1 << 24))
-#define LCCR3_25BPP     ((1 << 29) | (2 << 24))
+#define LCCR3_BPP(x)    ((((x) & 0x7) << 24) | (((x) & 0x8) ? (1 << 29) : 0))
 
 #define LCCR3_PDFOR_0   (0 << 30)
 #define LCCR3_PDFOR_1   (1 << 30)
@@ -42,19 +44,16 @@
 #define LCCR4_PAL_FOR_0 (0 << 15)
 #define LCCR4_PAL_FOR_1 (1 << 15)
 #define LCCR4_PAL_FOR_2 (2 << 15)
+#define LCCR4_PAL_FOR_3 (3 << 15)
 #define LCCR4_PAL_FOR_MASK      (3 << 15)
 
 #define FDADR0          (0x200) /* DMA Channel 0 Frame Descriptor Address Register */
-#define FSADR0          (0x204) /* DMA Channel 0 Frame Source Address Register */
-#define FIDR0           (0x208) /* DMA Channel 0 Frame ID Register */
-#define LDCMD0          (0x20C) /* DMA Channel 0 Command Register */
 #define FDADR1          (0x210) /* DMA Channel 1 Frame Descriptor Address Register */
-#define FSADR1          (0x214) /* DMA Channel 1 Frame Source Address Register */
-#define FIDR1           (0x218) /* DMA Channel 1 Frame ID Register */
-#define LDCMD1          (0x21C) /* DMA Channel 1 Command Register */
+#define FDADR2          (0x220) /* DMA Channel 2 Frame Descriptor Address Register */
+#define FDADR3          (0x230) /* DMA Channel 3 Frame Descriptor Address Register */
+#define FDADR4          (0x240) /* DMA Channel 4 Frame Descriptor Address Register */
+#define FDADR5          (0x250) /* DMA Channel 5 Frame Descriptor Address Register */
 #define FDADR6          (0x260) /* DMA Channel 6 Frame Descriptor Address Register */
-#define FSADR6          (0x264) /* DMA Channel 6 Frame Source Address Register */
-#define FIDR6           (0x268) /* DMA Channel 6 Frame ID Register */
 
 #define LCCR0_ENB       (1 << 0)        /* LCD Controller enable */
 #define LCCR0_CMS       (1 << 1)        /* Color/Monochrome Display Select */
@@ -126,9 +125,6 @@
 #define LCCR3_PCD       Fld (8, 0)      /* Pixel Clock Divisor */
 #define LCCR3_PixClkDiv(Div)    (((Div) << FShft (LCCR3_PCD)))
 
-#define LCCR3_BPP       Fld (3, 24)     /* Bit Per Pixel */
-#define LCCR3_Bpp(Bpp)  (((Bpp) << FShft (LCCR3_BPP)))
-
 #define LCCR3_ACB       Fld (8, 8)      /* AC Bias */
 #define LCCR3_Acb(Acb)  (((Acb) << FShft (LCCR3_ACB)))
 
@@ -157,8 +153,22 @@
 #define LCSR_RD_ST      (1 << 11)       /* read status */
 #define LCSR_CMD_INT    (1 << 12)       /* command interrupt */
 
+#define LCSR1_IU(x)     (1 << ((x) + 23)) /* Input FIFO underrun */
+#define LCSR1_BS(x)     (1 << ((x) + 15)) /* Branch Status */
+#define LCSR1_EOF(x)    (1 << ((x) + 7))  /* End of Frame Status */
+#define LCSR1_SOF(x)    (1 << ((x) - 1))  /* Start of Frame Status */
+
 #define LDCMD_PAL       (1 << 26)       /* instructs DMA to load palette buffer */
 
+/* overlay control registers */
+#define OVLxC1_PPL(x)   ((((x) - 1) & 0x3ff) << 0)      /* Pixels Per Line */
+#define OVLxC1_LPO(x)   ((((x) - 1) & 0x3ff) << 10)     /* Number of Lines */
+#define OVLxC1_BPP(x)   (((x) & 0xf) << 20)     /* Bits Per Pixel */
+#define OVLxC1_OEN      (1 << 31)               /* Enable bit for Overlay */
+#define OVLxC2_XPOS(x)  (((x) & 0x3ff) << 0)    /* Horizontal Position */
+#define OVLxC2_YPOS(x)  (((x) & 0x3ff) << 10)   /* Vertical Position */
+#define OVL2C2_PFOR(x)  (((x) & 0x7) << 20)     /* Pixel Format */
+
 /* smartpanel related */
 #define PRSR_DATA(x)    ((x) & 0xff)    /* Panel Data */
 #define PRSR_A0         (1 << 8)        /* Read Data Source */
@@ -177,4 +187,11 @@
 
 #define SMART_CMD(x)    (SMART_CMD_WRITE_COMMAND | ((x) & 0xff))
 #define SMART_DAT(x)    (SMART_CMD_WRITE_DATA | ((x) & 0xff))
+
+/* SMART_DELAY() is introduced for software controlled delay primitive which
+ * can be inserted between command sequences, unused command 0x6 is used here
+ * and delay ranges from 0ms ~ 255ms
+ */
+#define SMART_CMD_DELAY         (0x6 << 9)
+#define SMART_DELAY(ms)         (SMART_CMD_DELAY | ((ms) & 0xff))
 #endif /* __ASM_ARCH_REGS_LCD_H */
diff --git a/arch/arm/mach-pxa/include/mach/regs-uart.h b/arch/arm/mach-pxa/include/mach/regs-uart.h
new file mode 100644
index 000000000000..55aeb7fb72f6
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/regs-uart.h
@@ -0,0 +1,143 @@
+#ifndef __ASM_ARCH_REGS_UART_H
+#define __ASM_ARCH_REGS_UART_H
+
+/*
+ * UARTs
+ */
+
+/* Full Function UART (FFUART) */
+#define FFUART          FFRBR
+#define FFRBR           __REG(0x40100000)  /* Receive Buffer Register (read only) */
+#define FFTHR           __REG(0x40100000)  /* Transmit Holding Register (write only) */
+#define FFIER           __REG(0x40100004)  /* Interrupt Enable Register (read/write) */
+#define FFIIR           __REG(0x40100008)  /* Interrupt ID Register (read only) */
+#define FFFCR           __REG(0x40100008)  /* FIFO Control Register (write only) */
+#define FFLCR           __REG(0x4010000C)  /* Line Control Register (read/write) */
+#define FFMCR           __REG(0x40100010)  /* Modem Control Register (read/write) */
+#define FFLSR           __REG(0x40100014)  /* Line Status Register (read only) */
+#define FFMSR           __REG(0x40100018)  /* Modem Status Register (read only) */
+#define FFSPR           __REG(0x4010001C)  /* Scratch Pad Register (read/write) */
+#define FFISR           __REG(0x40100020)  /* Infrared Selection Register (read/write) */
+#define FFDLL           __REG(0x40100000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define FFDLH           __REG(0x40100004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
+/* Bluetooth UART (BTUART) */
+#define BTUART          BTRBR
+#define BTRBR           __REG(0x40200000)  /* Receive Buffer Register (read only) */
+#define BTTHR           __REG(0x40200000)  /* Transmit Holding Register (write only) */
+#define BTIER           __REG(0x40200004)  /* Interrupt Enable Register (read/write) */
+#define BTIIR           __REG(0x40200008)  /* Interrupt ID Register (read only) */
+#define BTFCR           __REG(0x40200008)  /* FIFO Control Register (write only) */
+#define BTLCR           __REG(0x4020000C)  /* Line Control Register (read/write) */
+#define BTMCR           __REG(0x40200010)  /* Modem Control Register (read/write) */
+#define BTLSR           __REG(0x40200014)  /* Line Status Register (read only) */
+#define BTMSR           __REG(0x40200018)  /* Modem Status Register (read only) */
+#define BTSPR           __REG(0x4020001C)  /* Scratch Pad Register (read/write) */
+#define BTISR           __REG(0x40200020)  /* Infrared Selection Register (read/write) */
+#define BTDLL           __REG(0x40200000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define BTDLH           __REG(0x40200004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
+/* Standard UART (STUART) */
+#define STUART          STRBR
+#define STRBR           __REG(0x40700000)  /* Receive Buffer Register (read only) */
+#define STTHR           __REG(0x40700000)  /* Transmit Holding Register (write only) */
+#define STIER           __REG(0x40700004)  /* Interrupt Enable Register (read/write) */
+#define STIIR           __REG(0x40700008)  /* Interrupt ID Register (read only) */
+#define STFCR           __REG(0x40700008)  /* FIFO Control Register (write only) */
+#define STLCR           __REG(0x4070000C)  /* Line Control Register (read/write) */
+#define STMCR           __REG(0x40700010)  /* Modem Control Register (read/write) */
+#define STLSR           __REG(0x40700014)  /* Line Status Register (read only) */
+#define STMSR           __REG(0x40700018)  /* Reserved */
+#define STSPR           __REG(0x4070001C)  /* Scratch Pad Register (read/write) */
+#define STISR           __REG(0x40700020)  /* Infrared Selection Register (read/write) */
+#define STDLL           __REG(0x40700000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define STDLH           __REG(0x40700004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
+/* Hardware UART (HWUART) */
+#define HWUART          HWRBR
+#define HWRBR           __REG(0x41600000)  /* Receive Buffer Register (read only) */
+#define HWTHR           __REG(0x41600000)  /* Transmit Holding Register (write only) */
+#define HWIER           __REG(0x41600004)  /* Interrupt Enable Register (read/write) */
+#define HWIIR           __REG(0x41600008)  /* Interrupt ID Register (read only) */
+#define HWFCR           __REG(0x41600008)  /* FIFO Control Register (write only) */
+#define HWLCR           __REG(0x4160000C)  /* Line Control Register (read/write) */
+#define HWMCR           __REG(0x41600010)  /* Modem Control Register (read/write) */
+#define HWLSR           __REG(0x41600014)  /* Line Status Register (read only) */
+#define HWMSR           __REG(0x41600018)  /* Modem Status Register (read only) */
+#define HWSPR           __REG(0x4160001C)  /* Scratch Pad Register (read/write) */
+#define HWISR           __REG(0x41600020)  /* Infrared Selection Register (read/write) */
+#define HWFOR           __REG(0x41600024)  /* Receive FIFO Occupancy Register (read only) */
+#define HWABR           __REG(0x41600028)  /* Auto-Baud Control Register (read/write) */
+#define HWACR           __REG(0x4160002C)  /* Auto-Baud Count Register (read only) */
+#define HWDLL           __REG(0x41600000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define HWDLH           __REG(0x41600004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
+#define IER_DMAE        (1 << 7)        /* DMA Requests Enable */
+#define IER_UUE         (1 << 6)        /* UART Unit Enable */
+#define IER_NRZE        (1 << 5)        /* NRZ coding Enable */
+#define IER_RTIOE       (1 << 4)        /* Receiver Time Out Interrupt Enable */
+#define IER_MIE         (1 << 3)        /* Modem Interrupt Enable */
+#define IER_RLSE        (1 << 2)        /* Receiver Line Status Interrupt Enable */
+#define IER_TIE         (1 << 1)        /* Transmit Data request Interrupt Enable */
+#define IER_RAVIE       (1 << 0)        /* Receiver Data Available Interrupt Enable */
+
+#define IIR_FIFOES1     (1 << 7)        /* FIFO Mode Enable Status */
+#define IIR_FIFOES0     (1 << 6)        /* FIFO Mode Enable Status */
+#define IIR_TOD         (1 << 3)        /* Time Out Detected */
+#define IIR_IID2        (1 << 2)        /* Interrupt Source Encoded */
+#define IIR_IID1        (1 << 1)        /* Interrupt Source Encoded */
+#define IIR_IP          (1 << 0)        /* Interrupt Pending (active low) */
+
+#define FCR_ITL2        (1 << 7)        /* Interrupt Trigger Level */
+#define FCR_ITL1        (1 << 6)        /* Interrupt Trigger Level */
+#define FCR_RESETTF     (1 << 2)        /* Reset Transmitter FIFO */
+#define FCR_RESETRF     (1 << 1)        /* Reset Receiver FIFO */
+#define FCR_TRFIFOE     (1 << 0)        /* Transmit and Receive FIFO Enable */
+#define FCR_ITL_1       (0)
+#define FCR_ITL_8       (FCR_ITL1)
+#define FCR_ITL_16      (FCR_ITL2)
+#define FCR_ITL_32      (FCR_ITL2|FCR_ITL1)
+
+#define LCR_DLAB        (1 << 7)        /* Divisor Latch Access Bit */
+#define LCR_SB          (1 << 6)        /* Set Break */
+#define LCR_STKYP       (1 << 5)        /* Sticky Parity */
+#define LCR_EPS         (1 << 4)        /* Even Parity Select */
+#define LCR_PEN         (1 << 3)        /* Parity Enable */
+#define LCR_STB         (1 << 2)        /* Stop Bit */
+#define LCR_WLS1        (1 << 1)        /* Word Length Select */
+#define LCR_WLS0        (1 << 0)        /* Word Length Select */
+
+#define LSR_FIFOE       (1 << 7)        /* FIFO Error Status */
+#define LSR_TEMT        (1 << 6)        /* Transmitter Empty */
+#define LSR_TDRQ        (1 << 5)        /* Transmit Data Request */
+#define LSR_BI          (1 << 4)        /* Break Interrupt */
+#define LSR_FE          (1 << 3)        /* Framing Error */
+#define LSR_PE          (1 << 2)        /* Parity Error */
+#define LSR_OE          (1 << 1)        /* Overrun Error */
+#define LSR_DR          (1 << 0)        /* Data Ready */
+
+#define MCR_LOOP        (1 << 4)
+#define MCR_OUT2        (1 << 3)        /* force MSR_DCD in loopback mode */
+#define MCR_OUT1        (1 << 2)        /* force MSR_RI in loopback mode */
+#define MCR_RTS         (1 << 1)        /* Request to Send */
+#define MCR_DTR         (1 << 0)        /* Data Terminal Ready */
+
+#define MSR_DCD         (1 << 7)        /* Data Carrier Detect */
+#define MSR_RI          (1 << 6)        /* Ring Indicator */
+#define MSR_DSR         (1 << 5)        /* Data Set Ready */
+#define MSR_CTS         (1 << 4)        /* Clear To Send */
+#define MSR_DDCD        (1 << 3)        /* Delta Data Carrier Detect */
+#define MSR_TERI        (1 << 2)        /* Trailing Edge Ring Indicator */
+#define MSR_DDSR        (1 << 1)        /* Delta Data Set Ready */
+#define MSR_DCTS        (1 << 0)        /* Delta Clear To Send */
+
+/*
+ * IrSR (Infrared Selection Register)
+ */
+#define STISR_RXPL      (1 << 4)        /* Receive Data Polarity */
+#define STISR_TXPL      (1 << 3)        /* Transmit Data Polarity */
+#define STISR_XMODE     (1 << 2)        /* Transmit Pulse Width Select */
+#define STISR_RCVEIR    (1 << 1)        /* Receiver SIR Enable */
+#define STISR_XMITIR    (1 << 0)        /* Transmitter SIR Enable */
+
+#endif /* __ASM_ARCH_REGS_UART_H */
diff --git a/arch/arm/mach-pxa/include/mach/timex.h b/arch/arm/mach-pxa/include/mach/timex.h
index b05fc6683c47..af6760a50e1a 100644
--- a/arch/arm/mach-pxa/include/mach/timex.h
+++ b/arch/arm/mach-pxa/include/mach/timex.h
@@ -10,6 +10,14 @@
  * published by the Free Software Foundation.
  */
 
+/* Various drivers are still using the constant of CLOCK_TICK_RATE, for
+ * those drivers to at least work, the definition is provided here.
+ *
+ * NOTE: this is no longer accurate when multiple processors and boards
+ * are selected, newer drivers should not depend on this any more.  Use
+ * either the clocksource/clockevent or get this at run-time by calling
+ * get_clock_tick_rate() (as defined in generic.c).
+ */
 
 #if defined(CONFIG_PXA25x)
 /* PXA250/210 timer base */
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 21e3e890af98..f4b029c03957 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -10,7 +10,7 @@
  */
 
 #include <linux/serial_reg.h>
-#include <mach/pxa-regs.h>
+#include <mach/regs-uart.h>
 #include <asm/mach-types.h>
 
 #define __REG(x)       ((volatile unsigned long *)x)
@@ -35,7 +35,7 @@ static inline void flush(void)
 
 static inline void arch_decomp_setup(void)
 {
-        if (machine_is_littleton())
+        if (machine_is_littleton() || machine_is_intelmote2())
                 UART = STUART;
 }
 
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index b4d00aba0e31..31da7f3c06f6 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -20,8 +20,13 @@
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/smc91x.h>
+#include <linux/i2c.h>
+#include <linux/leds.h>
+#include <linux/mfd/da903x.h>
+#include <linux/i2c/max732x.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -36,10 +41,10 @@
 
 #include <mach/pxa-regs.h>
 #include <mach/mfp-pxa300.h>
-#include <mach/gpio.h>
 #include <mach/pxafb.h>
 #include <mach/ssp.h>
 #include <mach/pxa2xx_spi.h>
+#include <mach/i2c.h>
 #include <mach/pxa27x_keypad.h>
 #include <mach/pxa3xx_nand.h>
 #include <mach/littleton.h>
@@ -314,6 +319,73 @@ static void __init littleton_init_nand(void)
 static inline void littleton_init_nand(void) {}
 #endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
 
+#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
+static struct led_info littleton_da9034_leds[] = {
+        [0] = {
+                .name   = "littleton:keypad1",
+                .flags  = DA9034_LED_RAMP,
+        },
+        [1] = {
+                .name   = "littleton:keypad2",
+                .flags  = DA9034_LED_RAMP,
+        },
+        [2] = {
+                .name   = "littleton:vibra",
+                .flags  = 0,
+        },
+};
+
+static struct da903x_subdev_info littleton_da9034_subdevs[] = {
+        {
+                .name           = "da903x-led",
+                .id             = DA9034_ID_LED_1,
+                .platform_data  = &littleton_da9034_leds[0],
+        }, {
+                .name           = "da903x-led",
+                .id             = DA9034_ID_LED_2,
+                .platform_data  = &littleton_da9034_leds[1],
+        }, {
+                .name           = "da903x-led",
+                .id             = DA9034_ID_VIBRA,
+                .platform_data  = &littleton_da9034_leds[2],
+        }, {
+                .name           = "da903x-backlight",
+                .id             = DA9034_ID_WLED,
+        },
+};
+
+static struct da903x_platform_data littleton_da9034_info = {
+        .num_subdevs    = ARRAY_SIZE(littleton_da9034_subdevs),
+        .subdevs        = littleton_da9034_subdevs,
+};
+
+static struct max732x_platform_data littleton_max7320_info = {
+        .gpio_base      = EXT0_GPIO_BASE,
+};
+
+static struct i2c_board_info littleton_i2c_info[] = {
+        [0] = {
+                .type           = "da9034",
+                .addr           = 0x34,
+                .platform_data  = &littleton_da9034_info,
+                .irq            = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)),
+        },
+        [1] = {
+                .type           = "max7320",
+                .addr           = 0x50,
+                .platform_data  = &littleton_max7320_info,
+        },
+};
+
+static void __init littleton_init_i2c(void)
+{
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(littleton_i2c_info));
+}
+#else
+static inline void littleton_init_i2c(void) {}
+#endif /* CONFIG_I2C_PXA || CONFIG_I2C_PXA_MODULE */
+
 static void __init littleton_init(void)
 {
         /* initialize MFP configurations */
@@ -326,6 +398,7 @@ static void __init littleton_init(void)
         platform_device_register(&smc91x_device);
 
         littleton_init_spi();
+        littleton_init_i2c();
         littleton_init_lcd();
         littleton_init_keypad();
         littleton_init_nand();
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 519138bc5f85..21b821e1a60d 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -123,6 +123,10 @@ static unsigned long magician_pin_config[] __initdata = {
         GPIO107_GPIO,   /* DS1WM_IRQ */
         GPIO108_GPIO,   /* GSM_READY */
         GPIO115_GPIO,   /* nPEN_IRQ */
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
 };
 
 /*
@@ -332,8 +336,7 @@ static struct pxafb_mach_info toppoly_info = {
         .modes           = toppoly_modes,
         .num_modes       = 1,
         .fixed_modes     = 1,
-        .lccr0           = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
-        .lccr3           = LCCR3_PixRsEdg,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP,
         .pxafb_lcd_power = toppoly_lcd_power,
 };
 
@@ -341,8 +344,8 @@ static struct pxafb_mach_info samsung_info = {
         .modes           = samsung_modes,
         .num_modes       = 1,
         .fixed_modes     = 1,
-        .lccr0           = LCCR0_LDDALT | LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
-        .lccr3           = LCCR3_PixFlEdg,
+        .lcd_conn        = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |\
+                           LCD_ALTERNATE_MAPPING,
         .pxafb_lcd_power = samsung_lcd_power,
 };
 
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index f2c7ad8f2b6b..5f224968043c 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -128,6 +128,10 @@ static unsigned long mainstone_pin_config[] = {
         GPIO108_KP_MKOUT_5,
         GPIO96_KP_MKOUT_6,
 
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
         /* GPIO */
         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
 };
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 2061c00c8ead..33626de8cbf6 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -38,12 +38,13 @@ struct gpio_desc {
         unsigned        valid           : 1;
         unsigned        can_wakeup      : 1;
         unsigned        keypad_gpio     : 1;
+        unsigned        dir_inverted    : 1;
         unsigned int    mask; /* bit mask in PWER or PKWR */
+        unsigned int    mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
         unsigned long   config;
 };
 
 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
-static int gpio_nr;
 
 static unsigned long gpdr_lpm[4];
 
@@ -54,7 +55,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
         int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
         int shft = (gpio & 0xf) << 1;
         int fn = MFP_AF(c);
-        int dir = c & MFP_DIR_OUT;
+        int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
 
         if (fn > 3)
                 return -EINVAL;
@@ -68,7 +69,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
         else
                 GAFR_U(bank) = gafr;
 
-        if (dir == MFP_DIR_OUT)
+        if (is_out ^ gpio_desc[gpio].dir_inverted)
                 GPDR(gpio) |= mask;
         else
                 GPDR(gpio) &= ~mask;
@@ -77,11 +78,11 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
         switch (c & MFP_LPM_STATE_MASK) {
         case MFP_LPM_DRIVE_HIGH:
                 PGSR(bank) |= mask;
-                dir = MFP_DIR_OUT;
+                is_out = 1;
                 break;
         case MFP_LPM_DRIVE_LOW:
                 PGSR(bank) &= ~mask;
-                dir = MFP_DIR_OUT;
+                is_out = 1;
                 break;
         case MFP_LPM_DEFAULT:
                 break;
@@ -92,7 +93,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
                 break;
         }
 
-        if (dir == MFP_DIR_OUT)
+        if (is_out ^ gpio_desc[gpio].dir_inverted)
                 gpdr_lpm[bank] |= mask;
         else
                 gpdr_lpm[bank] &= ~mask;
@@ -106,7 +107,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
                 return -EINVAL;
         }
 
-        if ((c & MFP_LPM_CAN_WAKEUP) && (dir == MFP_DIR_OUT)) {
+        if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
                 pr_warning("%s: output GPIO%d unable to wakeup\n",
                                 __func__, gpio);
                 return -EINVAL;
@@ -169,7 +170,7 @@ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
 int gpio_set_wake(unsigned int gpio, unsigned int on)
 {
         struct gpio_desc *d;
-        unsigned long c;
+        unsigned long c, mux_taken;
 
         if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
                 return -EINVAL;
@@ -183,9 +184,13 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
         if (d->keypad_gpio)
                 return -EINVAL;
 
+        mux_taken = (PWER & d->mux_mask) & (~d->mask);
+        if (on && mux_taken)
+                return -EBUSY;
+
         if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
                 if (on) {
-                        PWER |= d->mask;
+                        PWER = (PWER & ~d->mux_mask) | d->mask;
 
                         if (c & MFP_LPM_EDGE_RISE)
                                 PRER |= d->mask;
@@ -210,7 +215,7 @@ static void __init pxa25x_mfp_init(void)
 {
         int i;
 
-        for (i = 0; i <= 84; i++)
+        for (i = 0; i <= pxa_last_gpio; i++)
                 gpio_desc[i].valid = 1;
 
         for (i = 0; i <= 15; i++) {
@@ -218,7 +223,11 @@ static void __init pxa25x_mfp_init(void)
                 gpio_desc[i].mask = GPIO_bit(i);
         }
 
-        gpio_nr = 85;
+        /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
+         * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
+         */
+        for (i = 86; i <= pxa_last_gpio; i++)
+                gpio_desc[i].dir_inverted = 1;
 }
 #else
 static inline void pxa25x_mfp_init(void) {}
@@ -251,11 +260,27 @@ int keypad_set_wake(unsigned int on)
         return 0;
 }
 
+#define PWER_WEMUX2_GPIO38      (1 << 16)
+#define PWER_WEMUX2_GPIO53      (2 << 16)
+#define PWER_WEMUX2_GPIO40      (3 << 16)
+#define PWER_WEMUX2_GPIO36      (4 << 16)
+#define PWER_WEMUX2_MASK        (7 << 16)
+#define PWER_WEMUX3_GPIO31      (1 << 19)
+#define PWER_WEMUX3_GPIO113     (2 << 19)
+#define PWER_WEMUX3_MASK        (3 << 19)
+
+#define INIT_GPIO_DESC_MUXED(mux, gpio)                         \
+do {                                                            \
+        gpio_desc[(gpio)].can_wakeup = 1;                       \
+        gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio;  \
+        gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK;     \
+} while (0)
+
 static void __init pxa27x_mfp_init(void)
 {
         int i, gpio;
 
-        for (i = 0; i <= 120; i++) {
+        for (i = 0; i <= pxa_last_gpio; i++) {
                 /* skip GPIO2, 5, 6, 7, 8, they are not
                  * valid pins allow configuration
                  */
@@ -286,7 +311,12 @@ static void __init pxa27x_mfp_init(void)
         gpio_desc[35].can_wakeup = 1;
         gpio_desc[35].mask = PWER_WE35;
 
-        gpio_nr = 121;
+        INIT_GPIO_DESC_MUXED(WEMUX3, 31);
+        INIT_GPIO_DESC_MUXED(WEMUX3, 113);
+        INIT_GPIO_DESC_MUXED(WEMUX2, 38);
+        INIT_GPIO_DESC_MUXED(WEMUX2, 53);
+        INIT_GPIO_DESC_MUXED(WEMUX2, 40);
+        INIT_GPIO_DESC_MUXED(WEMUX2, 36);
 }
 #else
 static inline void pxa27x_mfp_init(void) {}
@@ -300,7 +330,7 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
 {
         int i;
 
-        for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
+        for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
 
                 saved_gafr[0][i] = GAFR_L(i);
                 saved_gafr[1][i] = GAFR_U(i);
@@ -315,7 +345,7 @@ static int pxa2xx_mfp_resume(struct sys_device *d)
 {
         int i;
 
-        for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
+        for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
                 GAFR_L(i) = saved_gafr[0][i];
                 GAFR_U(i) = saved_gafr[1][i];
                 GPDR(i * 32) = saved_gpdr[i];
@@ -348,7 +378,7 @@ static int __init pxa2xx_mfp_init(void)
                 pxa27x_mfp_init();
 
         /* initialize gafr_run[], pgsr_lpm[] from existing values */
-        for (i = 0; i <= gpio_to_bank(gpio_nr); i++)
+        for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
                 gpdr_lpm[i] = GPDR(i * 32);
 
         return sysdev_class_register(&pxa2xx_mfp_sysclass);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 782903fe9c6c..2b427e015b6f 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -34,7 +34,7 @@
 #include <linux/irq.h>
 #include <linux/pda_power.h>
 #include <linux/power_supply.h>
-#include <linux/wm97xx.h>
+#include <linux/wm97xx_batt.h>
 #include <linux/mtd/physmap.h>
 
 #include <asm/mach-types.h>
@@ -46,6 +46,9 @@
 #include <mach/mmc.h>
 #include <mach/udc.h>
 #include <mach/pxa27x-udc.h>
+#include <mach/i2c.h>
+#include <mach/camera.h>
+#include <media/soc_camera.h>
 
 #include <mach/mioa701.h>
 
@@ -54,10 +57,11 @@
 
 static unsigned long mioa701_pin_config[] = {
         /* Mio global */
-        MIO_CFG_OUT(GPIO9_CHARGE_nEN, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO9_CHARGE_EN, AF0, DRIVE_LOW),
         MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW),
         MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH),
         MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH),
+        MIO_CFG_IN(GPIO80_MAYBE_CHARGE_VDROP, AF0),
 
         /* Backlight PWM 0 */
         GPIO16_PWM0_OUT,
@@ -74,7 +78,7 @@ static unsigned long mioa701_pin_config[] = {
         MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW),
 
         /* USB */
-        MIO_CFG_IN(GPIO13_USB_DETECT, AF0),
+        MIO_CFG_IN(GPIO13_nUSB_DETECT, AF0),
         MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
 
         /* LCD */
@@ -98,12 +102,29 @@ static unsigned long mioa701_pin_config[] = {
         GPIO75_LCD_LCLK,
         GPIO76_LCD_PCLK,
 
+        /* QCI */
+        GPIO12_CIF_DD_7,
+        GPIO17_CIF_DD_6,
+        GPIO50_CIF_DD_3,
+        GPIO51_CIF_DD_2,
+        GPIO52_CIF_DD_4,
+        GPIO53_CIF_MCLK,
+        GPIO54_CIF_PCLK,
+        GPIO55_CIF_DD_1,
+        GPIO81_CIF_DD_0,
+        GPIO82_CIF_DD_5,
+        GPIO84_CIF_FV,
+        GPIO85_CIF_LV,
+
         /* Bluetooth */
+        MIO_CFG_IN(GPIO14_BT_nACTIVITY, AF0),
         GPIO44_BTUART_CTS,
         GPIO42_BTUART_RXD,
         GPIO45_BTUART_RTS,
         GPIO43_BTUART_TXD,
         MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO77_BT_UNKNOWN1, AF0, DRIVE_HIGH),
+        MIO_CFG_OUT(GPIO86_BT_MAYBE_nRESET, AF0, DRIVE_HIGH),
 
         /* GPS */
         MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW),
@@ -151,16 +172,16 @@ static unsigned long mioa701_pin_config[] = {
         GPIO104_KP_MKOUT_1,
         GPIO105_KP_MKOUT_2,
 
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
         /* Unknown */
-        MFP_CFG_IN(GPIO14, AF0),
         MFP_CFG_IN(GPIO20, AF0),
         MFP_CFG_IN(GPIO21, AF0),
         MFP_CFG_IN(GPIO33, AF0),
         MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH),
         MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH),
-        MFP_CFG_OUT(GPIO77, AF0, DRIVE_HIGH),
-        MFP_CFG_IN(GPIO80, AF0),
-        MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH),
         MFP_CFG_IN(GPIO96, AF0),
         MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH),
 };
@@ -407,7 +428,7 @@ static void udc_power_command(int cmd)
 
 static int is_usb_connected(void)
 {
-        return !!gpio_get_value(GPIO13_USB_DETECT);
+        return !gpio_get_value(GPIO13_nUSB_DETECT);
 }
 
 static struct pxa2xx_udc_mach_info mioa701_udc_info = {
@@ -659,13 +680,19 @@ static char *supplicants[] = {
         "mioa701_battery"
 };
 
+static int is_ac_connected(void)
+{
+        return gpio_get_value(GPIO96_AC_DETECT);
+}
+
 static void mioa701_set_charge(int flags)
 {
-        gpio_set_value(GPIO9_CHARGE_nEN, !flags);
+        gpio_set_value(GPIO9_CHARGE_EN, (flags == PDA_POWER_CHARGE_USB));
 }
 
 static struct pda_power_pdata power_pdata = {
-        .is_ac_online   = is_usb_connected,
+        .is_ac_online   = is_ac_connected,
+        .is_usb_online  = is_usb_connected,
         .set_charge = mioa701_set_charge,
         .supplied_to = supplicants,
         .num_supplicants = ARRAY_SIZE(supplicants),
@@ -674,8 +701,15 @@ static struct pda_power_pdata power_pdata = {
 static struct resource power_resources[] = {
         [0] = {
                 .name   = "ac",
-                .start  = gpio_to_irq(GPIO13_USB_DETECT),
-                .end    = gpio_to_irq(GPIO13_USB_DETECT),
+                .start  = gpio_to_irq(GPIO96_AC_DETECT),
+                .end    = gpio_to_irq(GPIO96_AC_DETECT),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
+                IORESOURCE_IRQ_LOWEDGE,
+        },
+        [1] = {
+                .name   = "usb",
+                .start  = gpio_to_irq(GPIO13_nUSB_DETECT),
+                .end    = gpio_to_irq(GPIO13_nUSB_DETECT),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
                 IORESOURCE_IRQ_LOWEDGE,
         },
@@ -691,120 +725,43 @@ static struct platform_device power_dev = {
         },
 };
 
-#if defined(CONFIG_PDA_POWER) && defined(CONFIG_TOUCHSCREEN_WM97XX)
-static struct wm97xx *battery_wm;
-
-static enum power_supply_property battery_props[] = {
-        POWER_SUPPLY_PROP_STATUS,
-        POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
-        POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
-        POWER_SUPPLY_PROP_VOLTAGE_NOW,
-        POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,   /* Necessary for apm */
+static struct wm97xx_batt_info mioa701_battery_data = {
+        .batt_aux       = WM97XX_AUX_ID1,
+        .temp_aux       = -1,
+        .charge_gpio    = -1,
+        .min_voltage    = 0xc00,
+        .max_voltage    = 0xfc0,
+        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LION,
+        .batt_div       = 1,
+        .batt_mult      = 1,
+        .batt_name      = "mioa701_battery",
 };
 
-static int get_battery_voltage(void)
-{
-        int adc = -1;
-
-        if (battery_wm)
-                adc = wm97xx_read_aux_adc(battery_wm, WM97XX_AUX_ID1);
-        return adc;
-}
-
-static int get_battery_status(struct power_supply *b)
-{
-        int status;
-
-        if (is_usb_connected())
-                status = POWER_SUPPLY_STATUS_CHARGING;
-        else
-                status = POWER_SUPPLY_STATUS_DISCHARGING;
-
-        return status;
-}
-
-static int get_property(struct power_supply *b,
-                        enum power_supply_property psp,
-                        union power_supply_propval *val)
-{
-        int rc = 0;
-
-        switch (psp) {
-        case POWER_SUPPLY_PROP_STATUS:
-                val->intval = get_battery_status(b);
-                break;
-        case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
-                val->intval = 0xfd0;
-                break;
-        case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
-                val->intval = 0xc00;
-                break;
-        case POWER_SUPPLY_PROP_VOLTAGE_NOW:
-                val->intval = get_battery_voltage();
-                break;
-        case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
-                val->intval = 100;
-                break;
-        default:
-                val->intval = -1;
-                rc = -1;
-        }
-
-        return rc;
+/*
+ * Camera interface
+ */
+struct pxacamera_platform_data mioa701_pxacamera_platform_data = {
+        .flags  = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
+                PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
+        .mclk_10khz = 5000,
 };
 
-static struct power_supply battery_ps = {
-        .name = "mioa701_battery",
-        .type = POWER_SUPPLY_TYPE_BATTERY,
-        .get_property = get_property,
-        .properties = battery_props,
-        .num_properties = ARRAY_SIZE(battery_props),
+static struct soc_camera_link iclink = {
+        .bus_id = 0, /* Must match id in pxa27x_device_camera in device.c */
 };
 
-static int battery_probe(struct platform_device *pdev)
-{
-        struct wm97xx *wm = platform_get_drvdata(pdev);
-        int rc;
-
-        battery_wm = wm;
-
-        rc = power_supply_register(NULL, &battery_ps);
-        if (rc)
-                dev_err(&pdev->dev,
-                "Could not register mioa701 battery -> %d\n", rc);
-        return rc;
-}
-
-static int battery_remove(struct platform_device *pdev)
-{
-        battery_wm = NULL;
-        return 0;
-}
-
-static struct platform_driver mioa701_battery_driver = {
-        .driver = {
-                .name = "wm97xx-battery",
+/* Board I2C devices. */
+static struct i2c_board_info __initdata mioa701_i2c_devices[] = {
+        {
+                /* Must initialize before the camera(s) */
+                I2C_BOARD_INFO("mt9m111", 0x5d),
+                .platform_data = &iclink,
         },
-        .probe = battery_probe,
-        .remove = battery_remove
 };
 
-static int __init mioa701_battery_init(void)
-{
-        int rc;
-
-        rc = platform_driver_register(&mioa701_battery_driver);
-        if (rc)
-                printk(KERN_ERR "Could not register mioa701 battery driver\n");
-        return rc;
-}
-
-#else
-static int __init mioa701_battery_init(void)
-{
-        return 0;
-}
-#endif
+struct i2c_pxa_platform_data i2c_pdata = {
+        .fast_mode = 1,
+};
 
 /*
  * Mio global
@@ -851,17 +808,17 @@ static void mioa701_machine_exit(void);
 static void mioa701_poweroff(void)
 {
         mioa701_machine_exit();
-        gpio_set_value(GPIO18_POWEROFF, 1);
+        arm_machine_restart('s');
 }
 
 static void mioa701_restart(char c)
 {
         mioa701_machine_exit();
-        arm_machine_restart(c);
+        arm_machine_restart('s');
 }
 
 struct gpio_ress global_gpios[] = {
-        MIO_GPIO_OUT(GPIO9_CHARGE_nEN, 1, "Charger enable"),
+        MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"),
         MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
         MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
 };
@@ -879,12 +836,16 @@ static void __init mioa701_machine_init(void)
         set_pxa_fb_info(&mioa701_pxafb_info);
         pxa_set_mci_info(&mioa701_mci_info);
         pxa_set_keypad_info(&mioa701_keypad_info);
+        wm97xx_bat_set_pdata(&mioa701_battery_data);
         udc_init();
         pm_power_off = mioa701_poweroff;
         arm_pm_restart = mioa701_restart;
         platform_add_devices(devices, ARRAY_SIZE(devices));
         gsm_init();
-        mioa701_battery_init();
+
+        pxa_set_i2c_info(&i2c_pdata);
+        pxa_set_camera_info(&mioa701_pxacamera_platform_data);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices));
 }
 
 static void mioa701_machine_exit(void)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index b36cec5c9eed..34841c72815f 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -55,6 +55,10 @@ static unsigned long pcm990_pin_config[] __initdata = {
         GPIO89_USBH1_PEN,
         /* PWM0 */
         GPIO16_PWM0_OUT,
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
 };
 
 /*
@@ -100,8 +104,7 @@ static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
 static struct pxafb_mach_info pcm990_fbinfo __initdata = {
         .modes                  = &fb_info_sharp_lq084v1dg21,
         .num_modes              = 1,
-        .lccr0                  = LCCR0_PAS,
-        .lccr3                  = LCCR3_PCP,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
         .pxafb_lcd_power        = pcm990_lcd_power,
 };
 #elif defined(CONFIG_PCM990_DISPLAY_NEC)
@@ -123,8 +126,7 @@ struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
 static struct pxafb_mach_info pcm990_fbinfo __initdata = {
         .modes                  = &fb_info_nec_nl6448bc20_18d,
         .num_modes              = 1,
-        .lccr0                  = LCCR0_Act,
-        .lccr3                  = LCCR3_PixFlEdg,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
         .pxafb_lcd_power        = pcm990_lcd_power,
 };
 #endif
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 2e3bd8b1523b..ae88855bf974 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -20,6 +20,7 @@
 #include <linux/fb.h>
 #include <linux/pm.h>
 #include <linux/delay.h>
+#include <linux/mtd/physmap.h>
 #include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -413,9 +414,40 @@ static struct pxafb_mach_info poodle_fb_info = {
         .lcd_conn       = LCD_COLOR_TFT_16BPP,
 };
 
+static struct mtd_partition sharpsl_rom_parts[] = {
+        {
+                .name   ="Boot PROM Filesystem",
+                .offset = 0x00120000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data sharpsl_rom_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
+        .parts          = sharpsl_rom_parts,
+};
+
+static struct resource sharpsl_rom_resources[] = {
+        {
+                .start  = 0x00000000,
+                .end    = 0x007fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device sharpsl_rom_device = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .resource = sharpsl_rom_resources,
+        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
+        .dev.platform_data = &sharpsl_rom_data,
+};
+
 static struct platform_device *devices[] __initdata = {
         &poodle_locomo_device,
         &poodle_scoop_device,
+        &sharpsl_rom_device,
 };
 
 static void poodle_poweroff(void)
diff --git a/arch/arm/mach-pxa/pwm.c b/arch/arm/mach-pxa/pwm.c
index 74e2ead8cee8..3ca7ffc6904b 100644
--- a/arch/arm/mach-pxa/pwm.c
+++ b/arch/arm/mach-pxa/pwm.c
@@ -173,7 +173,7 @@ static struct pwm_device *pwm_probe(struct platform_device *pdev,
                 return ERR_PTR(-ENOMEM);
         }
 
-        pwm->clk = clk_get(&pdev->dev, "PWMCLK");
+        pwm->clk = clk_get(&pdev->dev, NULL);
         if (IS_ERR(pwm->clk)) {
                 ret = PTR_ERR(pwm->clk);
                 goto err_free;
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 25d17a1dab78..6c57522e2469 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -36,12 +36,6 @@
 #include "devices.h"
 #include "clock.h"
 
-int cpu_is_pxa26x(void)
-{
-        return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0);
-}
-EXPORT_SYMBOL_GPL(cpu_is_pxa26x);
-
 /*
  * Various clock factors driven by the CCCR register.
  */
@@ -167,36 +161,51 @@ static const struct clkops clk_pxa25x_gpio11_ops = {
  * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
  * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
  */
-static struct clk pxa25x_hwuart_clk =
-        INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
-;
+static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
+
+static struct clk_lookup pxa25x_hwuart_clkreg =
+        INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
 
 /*
  * PXA 2xx clock declarations.
  */
-static struct clk pxa25x_clks[] = {
-        INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
-        INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
-        INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
-        INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
-        INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev),
-        INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL),
-        INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL),
-        INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
-        INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
-
-        INIT_CKEN("SSPCLK",  SSP, 3686400, 0, &pxa25x_device_ssp.dev),
-        INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev),
-        INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev),
-        INIT_CKEN("PWMCLK", PWM0, 3686400, 0, &pxa25x_device_pwm0.dev),
-        INIT_CKEN("PWMCLK", PWM1, 3686400, 0, &pxa25x_device_pwm1.dev),
-
-        INIT_CKEN("AC97CLK",     AC97,     24576000, 0, NULL),
-
-        /*
-        INIT_CKEN("I2SCLK",  I2S,  14745600, 0, NULL),
-        */
-        INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
+static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
+static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
+static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
+static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
+static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
+static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
+static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
+static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0);
+static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
+static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
+static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
+static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
+static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
+static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
+static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
+static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
+static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
+
+static struct clk_lookup pxa25x_clkregs[] = {
+        INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
+        INIT_CLKREG(&clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),
+        INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),
+        INIT_CLKREG(&clk_pxa25x_usb, "pxa25x-udc", NULL),
+        INIT_CLKREG(&clk_pxa25x_mmc, "pxa2xx-mci.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_i2c, "pxa2xx-i2c.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_ssp, "pxa25x-ssp.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_nssp, "pxa25x-nssp.1", NULL),
+        INIT_CLKREG(&clk_pxa25x_assp, "pxa25x-nssp.2", NULL),
+        INIT_CLKREG(&clk_pxa25x_pwm0, "pxa25x-pwm.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_pwm1, "pxa25x-pwm.1", NULL),
+        INIT_CLKREG(&clk_pxa25x_i2s, "pxa2xx-i2s", NULL),
+        INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-ir", "UARTCLK"),
+        INIT_CLKREG(&clk_pxa25x_ficp, "pxa2xx-ir", "FICPCLK"),
+        INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
+        INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
+        INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
 };
 
 #ifdef CONFIG_PM
@@ -304,13 +313,21 @@ void __init pxa25x_init_irq(void)
         pxa_init_gpio(85, pxa25x_set_wake);
 }
 
+#ifdef CONFIG_CPU_PXA26x
+void __init pxa26x_init_irq(void)
+{
+        pxa_init_irq(32, pxa25x_set_wake);
+        pxa_init_gpio(90, pxa25x_set_wake);
+}
+#endif
+
 static struct platform_device *pxa25x_devices[] __initdata = {
         &pxa25x_device_udc,
         &pxa_device_ffuart,
         &pxa_device_btuart,
         &pxa_device_stuart,
         &pxa_device_i2s,
-        &pxa_device_rtc,
+        &sa1100_device_rtc,
         &pxa25x_device_ssp,
         &pxa25x_device_nssp,
         &pxa25x_device_assp,
@@ -336,7 +353,7 @@ static int __init pxa25x_init(void)
 
                 reset_status = RCSR;
 
-                clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
+                clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));
 
                 if ((ret = pxa_init_dma(16)))
                         return ret;
@@ -356,8 +373,8 @@ static int __init pxa25x_init(void)
         }
 
         /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
-        if (cpu_is_pxa255() || cpu_is_pxa26x()) {
-                clks_register(&pxa25x_hwuart_clk, 1);
+        if (cpu_is_pxa255()) {
+                clks_register(&pxa25x_hwuart_clkreg, 1);
                 ret = platform_device_register(&pxa_device_hwuart);
         }
 
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 3e4ab2279c99..411bec54fdc4 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -144,40 +144,59 @@ static const struct clkops clk_pxa27x_lcd_ops = {
         .getrate        = clk_pxa27x_lcd_getrate,
 };
 
-static struct clk pxa27x_clks[] = {
-        INIT_CK("LCDCLK", LCD,    &clk_pxa27x_lcd_ops, &pxa_device_fb.dev),
-        INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL),
-
-        INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
-        INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
-        INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
-
-        INIT_CKEN("I2SCLK",  I2S,  14682000, 0, &pxa_device_i2s.dev),
-        INIT_CKEN("I2CCLK",  I2C,  32842000, 0, &pxa_device_i2c.dev),
-        INIT_CKEN("UDCCLK",  USB,  48000000, 5, &pxa27x_device_udc.dev),
-        INIT_CKEN("MMCCLK",  MMC,  19500000, 0, &pxa_device_mci.dev),
-        INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
-
-        INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev),
-        INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
-        INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
-
-        INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
-        INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
-        INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
-        INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
-        INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
-
-        INIT_CKEN("AC97CLK",     AC97,     24576000, 0, NULL),
-        INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL),
-
-        /*
-        INIT_CKEN("MSLCLK",  MSL,  48000000, 0, NULL),
-        INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
-        INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
-        INIT_CKEN("IMCLK",   IM,   0, 0, NULL),
-        INIT_CKEN("MEMCLK",  MEMC, 0, 0, NULL),
-        */
+static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
+static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
+static DEFINE_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
+static DEFINE_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
+static DEFINE_CKEN(pxa27x_stuart, STUART, 14857000, 1);
+static DEFINE_CKEN(pxa27x_i2s, I2S, 14682000, 0);
+static DEFINE_CKEN(pxa27x_i2c, I2C, 32842000, 0);
+static DEFINE_CKEN(pxa27x_usb, USB, 48000000, 5);
+static DEFINE_CKEN(pxa27x_mmc, MMC, 19500000, 0);
+static DEFINE_CKEN(pxa27x_ficp, FICP, 48000000, 0);
+static DEFINE_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
+static DEFINE_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
+static DEFINE_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
+static DEFINE_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
+static DEFINE_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
+static DEFINE_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
+static DEFINE_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
+static DEFINE_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
+static DEFINE_CKEN(pxa27x_ac97, AC97, 24576000, 0);
+static DEFINE_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
+static DEFINE_CKEN(pxa27x_msl, MSL, 48000000, 0);
+static DEFINE_CKEN(pxa27x_usim, USIM, 48000000, 0);
+static DEFINE_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
+static DEFINE_CKEN(pxa27x_im, IM, 0, 0);
+static DEFINE_CKEN(pxa27x_memc, MEMC, 0, 0);
+
+static struct clk_lookup pxa27x_clkregs[] = {
+        INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
+        INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),
+        INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),
+        INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL),
+        INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL),
+        INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"),
+        INIT_CLKREG(&clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"),
+        INIT_CLKREG(&clk_pxa27x_usbhost, "pxa27x-ohci", NULL),
+        INIT_CLKREG(&clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL),
+        INIT_CLKREG(&clk_pxa27x_keypad, "pxa27x-keypad", NULL),
+        INIT_CLKREG(&clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL),
+        INIT_CLKREG(&clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL),
+        INIT_CLKREG(&clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL),
+        INIT_CLKREG(&clk_pxa27x_ac97, NULL, "AC97CLK"),
+        INIT_CLKREG(&clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"),
+        INIT_CLKREG(&clk_pxa27x_msl, NULL, "MSLCLK"),
+        INIT_CLKREG(&clk_pxa27x_usim, NULL, "USIMCLK"),
+        INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
+        INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
+        INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
 };
 
 #ifdef CONFIG_PM
@@ -313,38 +332,18 @@ static int pxa27x_set_wake(unsigned int irq, unsigned int on)
 void __init pxa27x_init_irq(void)
 {
         pxa_init_irq(34, pxa27x_set_wake);
-        pxa_init_gpio(128, pxa27x_set_wake);
+        pxa_init_gpio(121, pxa27x_set_wake);
 }
 
 /*
  * device registration specific to PXA27x.
  */
-
-static struct resource i2c_power_resources[] = {
-        {
-                .start  = 0x40f00180,
-                .end    = 0x40f001a3,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = IRQ_PWRI2C,
-                .end    = IRQ_PWRI2C,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device pxa27x_device_i2c_power = {
-        .name           = "pxa2xx-i2c",
-        .id             = 1,
-        .resource       = i2c_power_resources,
-        .num_resources  = ARRAY_SIZE(i2c_power_resources),
-};
-
 void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 {
         local_irq_disable();
         PCFR |= PCFR_PI2CEN;
         local_irq_enable();
-        pxa27x_device_i2c_power.dev.platform_data = info;
+        pxa_register_device(&pxa27x_device_i2c_power, info);
 }
 
 static struct platform_device *devices[] __initdata = {
@@ -353,8 +352,8 @@ static struct platform_device *devices[] __initdata = {
         &pxa_device_btuart,
         &pxa_device_stuart,
         &pxa_device_i2s,
+        &sa1100_device_rtc,
         &pxa_device_rtc,
-        &pxa27x_device_i2c_power,
         &pxa27x_device_ssp1,
         &pxa27x_device_ssp2,
         &pxa27x_device_ssp3,
@@ -380,7 +379,7 @@ static int __init pxa27x_init(void)
 
                 reset_status = RCSR;
 
-                clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
+                clks_register(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));
 
                 if ((ret = pxa_init_dma(32)))
                         return ret;
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 9adc7fc4618a..f735e58e6669 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -85,14 +85,16 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
         MFP_ADDR_END,
 };
 
-static struct clk common_clks[] = {
-        PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev),
+static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
+
+static struct clk_lookup common_clkregs[] = {
+        INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"),
 };
 
-static struct clk pxa310_clks[] = {
-#ifdef CONFIG_CPU_PXA310
-        PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
-#endif
+static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
+
+static struct clk_lookup pxa310_clkregs[] = {
+        INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"),
 };
 
 static int __init pxa300_init(void)
@@ -100,12 +102,12 @@ static int __init pxa300_init(void)
         if (cpu_is_pxa300() || cpu_is_pxa310()) {
                 pxa3xx_init_mfp();
                 pxa3xx_mfp_init_addr(pxa300_mfp_addr_map);
-                clks_register(ARRAY_AND_SIZE(common_clks));
+                clks_register(ARRAY_AND_SIZE(common_clkregs));
         }
 
         if (cpu_is_pxa310()) {
                 pxa3xx_mfp_init_addr(pxa310_mfp_addr_map);
-                clks_register(ARRAY_AND_SIZE(pxa310_clks));
+                clks_register(ARRAY_AND_SIZE(pxa310_clkregs));
         }
 
         return 0;
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 016eb18f01a3..effe408c186f 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -80,8 +80,10 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
         MFP_ADDR_END,
 };
 
-static struct clk pxa320_clks[] = {
-        PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev),
+static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
+
+static struct clk_lookup pxa320_clkregs[] = {
+        INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"),
 };
 
 static int __init pxa320_init(void)
@@ -89,7 +91,7 @@ static int __init pxa320_init(void)
         if (cpu_is_pxa320()) {
                 pxa3xx_init_mfp();
                 pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
-                clks_register(ARRAY_AND_SIZE(pxa320_clks));
+                clks_register(ARRAY_AND_SIZE(pxa320_clkregs));
         }
 
         return 0;
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b3cd5d0b0f35..490893824e78 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -29,6 +29,7 @@
 #include <mach/pm.h>
 #include <mach/dma.h>
 #include <mach/ssp.h>
+#include <mach/i2c.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -216,43 +217,58 @@ static const struct clkops clk_dummy_ops = {
         .disable        = clk_dummy_disable,
 };
 
-static struct clk pxa3xx_clks[] = {
-        {
-                .name           = "CLK_POUT",
-                .ops            = &clk_pout_ops,
-                .rate           = 13000000,
-                .delay          = 70,
-        },
-
-        /* Power I2C clock is always on */
-        {
-                .name           = "I2CCLK",
-                .ops            = &clk_dummy_ops,
-                .dev            = &pxa3xx_device_i2c_power.dev,
-        },
-
-        PXA3xx_CK("LCDCLK",  LCD,    &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
-        PXA3xx_CK("CAMCLK",  CAMERA, &clk_pxa3xx_hsio_ops, NULL),
-        PXA3xx_CK("AC97CLK", AC97,   &clk_pxa3xx_ac97_ops, NULL),
-
-        PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
-        PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
-        PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
-
-        PXA3xx_CKEN("I2CCLK", I2C,  32842000, 0, &pxa_device_i2c.dev),
-        PXA3xx_CKEN("UDCCLK", UDC,  48000000, 5, &pxa27x_device_udc.dev),
-        PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
-        PXA3xx_CKEN("KBDCLK", KEYPAD,  32768, 0, &pxa27x_device_keypad.dev),
+static struct clk clk_pxa3xx_pout = {
+        .ops            = &clk_pout_ops,
+        .rate           = 13000000,
+        .delay          = 70,
+};
 
-        PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
-        PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
-        PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
-        PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
-        PXA3xx_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
-        PXA3xx_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
+static struct clk clk_dummy = {
+        .ops            = &clk_dummy_ops,
+};
 
-        PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
-        PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
+static DEFINE_PXA3_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
+static DEFINE_PXA3_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
+static DEFINE_PXA3_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
+static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5);
+static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_ssp3, SSP3, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_ssp4, SSP4, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
+
+static struct clk_lookup pxa3xx_clkregs[] = {
+        INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
+        /* Power I2C clock is always on */
+        INIT_CLKREG(&clk_dummy, "pxa2xx-i2c.1", NULL),
+        INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
+        INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
+        INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
+        INIT_CLKREG(&clk_pxa3xx_ffuart, "pxa2xx-uart.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_btuart, "pxa2xx-uart.1", NULL),
+        INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-uart.2", NULL),
+        INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-ir", "UARTCLK"),
+        INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL),
+        INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL),
+        INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL),
+        INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL),
+        INIT_CLKREG(&clk_pxa3xx_ssp3, "pxa27x-ssp.2", NULL),
+        INIT_CLKREG(&clk_pxa3xx_ssp4, "pxa27x-ssp.3", NULL),
+        INIT_CLKREG(&clk_pxa3xx_pwm0, "pxa27x-pwm.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),
+        INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
 };
 
 #ifdef CONFIG_PM
@@ -529,28 +545,9 @@ void __init pxa3xx_init_irq(void)
  * device registration specific to PXA3xx.
  */
 
-static struct resource i2c_power_resources[] = {
-        {
-                .start  = 0x40f500c0,
-                .end    = 0x40f500d3,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = IRQ_PWRI2C,
-                .end    = IRQ_PWRI2C,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device pxa3xx_device_i2c_power = {
-        .name           = "pxa2xx-i2c",
-        .id             = 1,
-        .resource       = i2c_power_resources,
-        .num_resources  = ARRAY_SIZE(i2c_power_resources),
-};
-
 void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 {
-        pxa3xx_device_i2c_power.dev.platform_data = info;
+        pxa_register_device(&pxa3xx_device_i2c_power, info);
 }
 
 static struct platform_device *devices[] __initdata = {
@@ -559,6 +556,7 @@ static struct platform_device *devices[] __initdata = {
         &pxa_device_btuart,
         &pxa_device_stuart,
         &pxa_device_i2s,
+        &sa1100_device_rtc,
         &pxa_device_rtc,
         &pxa27x_device_ssp1,
         &pxa27x_device_ssp2,
@@ -566,7 +564,6 @@ static struct platform_device *devices[] __initdata = {
         &pxa3xx_device_ssp4,
         &pxa27x_device_pwm0,
         &pxa27x_device_pwm1,
-        &pxa3xx_device_i2c_power,
 };
 
 static struct sys_device pxa3xx_sysdev[] = {
@@ -595,7 +592,7 @@ static int __init pxa3xx_init(void)
                  */
                 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
 
-                clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks));
+                clks_register(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs));
 
                 if ((ret = pxa_init_dma(32)))
                         return ret;
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index e7ea91ce7f02..5d02a7325586 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -17,19 +17,44 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/i2c.h>
 #include <linux/smc91x.h>
+#include <linux/mfd/da903x.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/hardware.h>
 #include <mach/pxa3xx-regs.h>
 #include <mach/mfp-pxa930.h>
+#include <mach/i2c.h>
+#include <mach/regs-lcd.h>
+#include <mach/pxafb.h>
 
 #include "devices.h"
 #include "generic.h"
 
+#define GPIO_LCD_RESET  (16)
+
 /* SAAR MFP configurations */
 static mfp_cfg_t saar_mfp_cfg[] __initdata = {
+        /* LCD */
+        GPIO23_LCD_DD0,
+        GPIO24_LCD_DD1,
+        GPIO25_LCD_DD2,
+        GPIO26_LCD_DD3,
+        GPIO27_LCD_DD4,
+        GPIO28_LCD_DD5,
+        GPIO29_LCD_DD6,
+        GPIO44_LCD_DD7,
+        GPIO21_LCD_CS,
+        GPIO22_LCD_VSYNC,
+        GPIO17_LCD_FCLK_RD,
+        GPIO18_LCD_LCLK_A0,
+        GPIO19_LCD_PCLK_WR,
+        GPIO16_GPIO, /* LCD reset */
+
         /* Ethernet */
         DF_nCS1_nCS3,
         GPIO97_GPIO,
@@ -64,12 +89,408 @@ static struct platform_device smc91x_device = {
         },
 };
 
+#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE)
+static uint16_t lcd_power_on[] = {
+        /* single frame */
+        SMART_CMD_NOOP,
+        SMART_CMD(0x00),
+        SMART_DELAY(0),
+
+        SMART_CMD_NOOP,
+        SMART_CMD(0x00),
+        SMART_DELAY(0),
+
+        SMART_CMD_NOOP,
+        SMART_CMD(0x00),
+        SMART_DELAY(0),
+
+        SMART_CMD_NOOP,
+        SMART_CMD(0x00),
+        SMART_DELAY(10),
+
+        /* calibration control */
+        SMART_CMD(0x00),
+        SMART_CMD(0xA4),
+        SMART_DAT(0x80),
+        SMART_DAT(0x01),
+        SMART_DELAY(150),
+
+        /*Power-On Init sequence*/
+        SMART_CMD(0x00),        /* output ctrl */
+        SMART_CMD(0x01),
+        SMART_DAT(0x01),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),        /* wave ctrl */
+        SMART_CMD(0x02),
+        SMART_DAT(0x07),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x03),        /* entry mode */
+        SMART_DAT(0xD0),
+        SMART_DAT(0x30),
+        SMART_CMD(0x00),
+        SMART_CMD(0x08),        /* display ctrl 2 */
+        SMART_DAT(0x08),
+        SMART_DAT(0x08),
+        SMART_CMD(0x00),
+        SMART_CMD(0x09),        /* display ctrl 3 */
+        SMART_DAT(0x04),
+        SMART_DAT(0x2F),
+        SMART_CMD(0x00),
+        SMART_CMD(0x0A),        /* display ctrl 4 */
+        SMART_DAT(0x00),
+        SMART_DAT(0x08),
+        SMART_CMD(0x00),
+        SMART_CMD(0x0D),        /* Frame Marker position */
+        SMART_DAT(0x00),
+        SMART_DAT(0x08),
+        SMART_CMD(0x00),
+        SMART_CMD(0x60),        /* Driver output control */
+        SMART_DAT(0x27),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x61),        /* Base image display control */
+        SMART_DAT(0x00),
+        SMART_DAT(0x01),
+        SMART_CMD(0x00),
+        SMART_CMD(0x30),        /* Y settings 30h-3Dh */
+        SMART_DAT(0x07),
+        SMART_DAT(0x07),
+        SMART_CMD(0x00),
+        SMART_CMD(0x31),
+        SMART_DAT(0x00),
+        SMART_DAT(0x07),
+        SMART_CMD(0x00),
+        SMART_CMD(0x32),        /* Timing(3), ASW HOLD=0.5CLK */
+        SMART_DAT(0x04),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x33),        /* Timing(4), CKV ST=0CLK, CKV ED=1CLK */
+        SMART_DAT(0x03),
+        SMART_DAT(0x03),
+        SMART_CMD(0x00),
+        SMART_CMD(0x34),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x35),
+        SMART_DAT(0x02),
+        SMART_DAT(0x05),
+        SMART_CMD(0x00),
+        SMART_CMD(0x36),
+        SMART_DAT(0x1F),
+        SMART_DAT(0x1F),
+        SMART_CMD(0x00),
+        SMART_CMD(0x37),
+        SMART_DAT(0x07),
+        SMART_DAT(0x07),
+        SMART_CMD(0x00),
+        SMART_CMD(0x38),
+        SMART_DAT(0x00),
+        SMART_DAT(0x07),
+        SMART_CMD(0x00),
+        SMART_CMD(0x39),
+        SMART_DAT(0x04),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x3A),
+        SMART_DAT(0x03),
+        SMART_DAT(0x03),
+        SMART_CMD(0x00),
+        SMART_CMD(0x3B),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x3C),
+        SMART_DAT(0x02),
+        SMART_DAT(0x05),
+        SMART_CMD(0x00),
+        SMART_CMD(0x3D),
+        SMART_DAT(0x1F),
+        SMART_DAT(0x1F),
+        SMART_CMD(0x00),        /* Display control 1 */
+        SMART_CMD(0x07),
+        SMART_DAT(0x00),
+        SMART_DAT(0x01),
+        SMART_CMD(0x00),        /* Power control 5 */
+        SMART_CMD(0x17),
+        SMART_DAT(0x00),
+        SMART_DAT(0x01),
+        SMART_CMD(0x00),        /* Power control 1 */
+        SMART_CMD(0x10),
+        SMART_DAT(0x10),
+        SMART_DAT(0xB0),
+        SMART_CMD(0x00),        /* Power control 2 */
+        SMART_CMD(0x11),
+        SMART_DAT(0x01),
+        SMART_DAT(0x30),
+        SMART_CMD(0x00),        /* Power control 3 */
+        SMART_CMD(0x12),
+        SMART_DAT(0x01),
+        SMART_DAT(0x9E),
+        SMART_CMD(0x00),        /* Power control 4 */
+        SMART_CMD(0x13),
+        SMART_DAT(0x17),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),        /* Power control 3 */
+        SMART_CMD(0x12),
+        SMART_DAT(0x01),
+        SMART_DAT(0xBE),
+        SMART_DELAY(100),
+
+        /* display mode : 240*320 */
+        SMART_CMD(0x00),        /* RAM address set(H) 0*/
+        SMART_CMD(0x20),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),        /* RAM address set(V)   4*/
+        SMART_CMD(0x21),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),        /* Start of Window RAM address set(H) 8*/
+        SMART_CMD(0x50),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),        /* End of Window RAM address set(H) 12*/
+        SMART_CMD(0x51),
+        SMART_DAT(0x00),
+        SMART_DAT(0xEF),
+        SMART_CMD(0x00),        /* Start of Window RAM address set(V) 16*/
+        SMART_CMD(0x52),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),        /* End of Window RAM address set(V) 20*/
+        SMART_CMD(0x53),
+        SMART_DAT(0x01),
+        SMART_DAT(0x3F),
+        SMART_CMD(0x00),        /* Panel interface control 1 */
+        SMART_CMD(0x90),
+        SMART_DAT(0x00),
+        SMART_DAT(0x1A),
+        SMART_CMD(0x00),        /* Panel interface control 2 */
+        SMART_CMD(0x92),
+        SMART_DAT(0x04),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),        /* Panel interface control 3 */
+        SMART_CMD(0x93),
+        SMART_DAT(0x00),
+        SMART_DAT(0x05),
+        SMART_DELAY(20),
+};
+
+static uint16_t lcd_panel_on[] = {
+        SMART_CMD(0x00),
+        SMART_CMD(0x07),
+        SMART_DAT(0x00),
+        SMART_DAT(0x21),
+        SMART_DELAY(1),
+
+        SMART_CMD(0x00),
+        SMART_CMD(0x07),
+        SMART_DAT(0x00),
+        SMART_DAT(0x61),
+        SMART_DELAY(100),
+
+        SMART_CMD(0x00),
+        SMART_CMD(0x07),
+        SMART_DAT(0x01),
+        SMART_DAT(0x73),
+        SMART_DELAY(1),
+};
+
+static uint16_t lcd_panel_off[] = {
+        SMART_CMD(0x00),
+        SMART_CMD(0x07),
+        SMART_DAT(0x00),
+        SMART_DAT(0x72),
+        SMART_DELAY(40),
+
+        SMART_CMD(0x00),
+        SMART_CMD(0x07),
+        SMART_DAT(0x00),
+        SMART_DAT(0x01),
+        SMART_DELAY(1),
+
+        SMART_CMD(0x00),
+        SMART_CMD(0x07),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_DELAY(1),
+};
+
+static uint16_t lcd_power_off[] = {
+        SMART_CMD(0x00),
+        SMART_CMD(0x10),
+        SMART_DAT(0x00),
+        SMART_DAT(0x80),
+
+        SMART_CMD(0x00),
+        SMART_CMD(0x11),
+        SMART_DAT(0x01),
+        SMART_DAT(0x60),
+
+        SMART_CMD(0x00),
+        SMART_CMD(0x12),
+        SMART_DAT(0x01),
+        SMART_DAT(0xAE),
+        SMART_DELAY(40),
+
+        SMART_CMD(0x00),
+        SMART_CMD(0x10),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+};
+
+static uint16_t update_framedata[] = {
+        /* set display ram: 240*320 */
+        SMART_CMD(0x00), /* RAM address set(H) 0*/
+        SMART_CMD(0x20),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00), /* RAM address set(V) 4*/
+        SMART_CMD(0x21),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00), /* Start of Window RAM address set(H) 8 */
+        SMART_CMD(0x50),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00), /* End of Window RAM address set(H) 12 */
+        SMART_CMD(0x51),
+        SMART_DAT(0x00),
+        SMART_DAT(0xEF),
+        SMART_CMD(0x00), /* Start of Window RAM address set(V) 16 */
+        SMART_CMD(0x52),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00), /* End of Window RAM address set(V) 20 */
+        SMART_CMD(0x53),
+        SMART_DAT(0x01),
+        SMART_DAT(0x3F),
+
+        /* wait for vsync cmd before transferring frame data */
+        SMART_CMD_WAIT_FOR_VSYNC,
+
+        /* write ram */
+        SMART_CMD(0x00),
+        SMART_CMD(0x22),
+
+        /* write frame data */
+        SMART_CMD_WRITE_FRAME,
+};
+
+static void ltm022a97a_lcd_power(int on, struct fb_var_screeninfo *var)
+{
+        static int pin_requested = 0;
+        struct fb_info *info = container_of(var, struct fb_info, var);
+        int err;
+
+        if (!pin_requested) {
+                err = gpio_request(GPIO_LCD_RESET, "lcd reset");
+                if (err) {
+                        pr_err("failed to request gpio for LCD reset\n");
+                        return;
+                }
+
+                gpio_direction_output(GPIO_LCD_RESET, 0);
+                pin_requested = 1;
+        }
+
+        if (on) {
+                gpio_set_value(GPIO_LCD_RESET, 0); msleep(100);
+                gpio_set_value(GPIO_LCD_RESET, 1); msleep(10);
+
+                pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_on));
+                pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_on));
+        } else {
+                pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_off));
+                pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_off));
+        }
+
+        err = pxafb_smart_flush(info);
+        if (err)
+                pr_err("%s: timed out\n", __func__);
+}
+
+static void ltm022a97a_update(struct fb_info *info)
+{
+        pxafb_smart_queue(info, ARRAY_AND_SIZE(update_framedata));
+        pxafb_smart_flush(info);
+}
+
+static struct pxafb_mode_info toshiba_ltm022a97a_modes[] = {
+        [0] = {
+                .xres                   = 240,
+                .yres                   = 320,
+                .bpp                    = 16,
+                .a0csrd_set_hld         = 30,
+                .a0cswr_set_hld         = 30,
+                .wr_pulse_width         = 30,
+                .rd_pulse_width         = 30,
+                .op_hold_time           = 30,
+                .cmd_inh_time           = 60,
+
+                /* L_LCLK_A0 and L_LCLK_RD active low */
+                .sync                   = FB_SYNC_HOR_HIGH_ACT |
+                                          FB_SYNC_VERT_HIGH_ACT,
+        },
+};
+
+static struct pxafb_mach_info saar_lcd_info = {
+        .modes                  = toshiba_ltm022a97a_modes,
+        .num_modes              = 1,
+        .lcd_conn               = LCD_SMART_PANEL_8BPP | LCD_PCLK_EDGE_FALL,
+        .pxafb_lcd_power        = ltm022a97a_lcd_power,
+        .smart_update           = ltm022a97a_update,
+};
+
+static void __init saar_init_lcd(void)
+{
+        set_pxa_fb_info(&saar_lcd_info);
+}
+#else
+static inline void saar_init_lcd(void) {}
+#endif
+
+#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
+static struct da903x_subdev_info saar_da9034_subdevs[] = {
+        [0] = {
+                .name           = "da903x-backlight",
+                .id             = DA9034_ID_WLED,
+        },
+};
+
+static struct da903x_platform_data saar_da9034_info = {
+        .num_subdevs    = ARRAY_SIZE(saar_da9034_subdevs),
+        .subdevs        = saar_da9034_subdevs,
+};
+
+static struct i2c_board_info saar_i2c_info[] = {
+        [0] = {
+                .type           = "da9034",
+                .addr           = 0x34,
+                .platform_data  = &saar_da9034_info,
+                .irq            = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+        },
+};
+
+static void __init saar_init_i2c(void)
+{
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(saar_i2c_info));
+}
+#else
+static inline void saar_init_i2c(void) {}
+#endif
 static void __init saar_init(void)
 {
         /* initialize MFP configurations */
         pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg));
 
         platform_device_register(&smc91x_device);
+
+        saar_init_i2c();
+        saar_init_lcd();
 }
 
 MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
index ad346addc028..d6f6904132a6 100644
--- a/arch/arm/mach-pxa/smemc.c
+++ b/arch/arm/mach-pxa/smemc.c
@@ -8,6 +8,8 @@
 #include <linux/io.h>
 #include <linux/sysdev.h>
 
+#include <mach/hardware.h>
+
 #define SMEMC_PHYS_BASE (0x4A000000)
 #define SMEMC_PHYS_SIZE (0x90)
 
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 3be76ee2bdbf..7299d87a1cb3 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -22,6 +22,7 @@
 #include <linux/gpio.h>
 #include <linux/leds.h>
 #include <linux/mmc/host.h>
+#include <linux/mtd/physmap.h>
 #include <linux/pm.h>
 #include <linux/backlight.h>
 #include <linux/io.h>
@@ -122,6 +123,10 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO105_GPIO,   /* SPITZ_GPIO_CF_IRQ */
         GPIO106_GPIO,   /* SPITZ_GPIO_CF2_IRQ */
 
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
         GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
 };
 
@@ -609,10 +614,41 @@ static struct pxafb_mach_info spitz_pxafb_info = {
 };
 
 
+static struct mtd_partition sharpsl_rom_parts[] = {
+        {
+                .name   ="Boot PROM Filesystem",
+                .offset = 0x00140000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data sharpsl_rom_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
+        .parts          = sharpsl_rom_parts,
+};
+
+static struct resource sharpsl_rom_resources[] = {
+        {
+                .start  = 0x00000000,
+                .end    = 0x007fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device sharpsl_rom_device = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .resource = sharpsl_rom_resources,
+        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
+        .dev.platform_data = &sharpsl_rom_data,
+};
+
 static struct platform_device *devices[] __initdata = {
         &spitzscoop_device,
         &spitzkbd_device,
         &spitzled_device,
+        &sharpsl_rom_device,
 };
 
 static void spitz_poweroff(void)
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 2c31ec725688..6f42004db3ed 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -356,7 +356,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type)
         }
         ssp->pdev = pdev;
 
-        ssp->clk = clk_get(&pdev->dev, "SSPCLK");
+        ssp->clk = clk_get(&pdev->dev, NULL);
         if (IS_ERR(ssp->clk)) {
                 ret = PTR_ERR(ssp->clk);
                 goto err_free;
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 589d32b4fc46..58ef08a5224b 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -18,12 +18,15 @@
 #include <linux/clk.h>
 #include <linux/gpio.h>
 #include <linux/smc91x.h>
+#include <linux/pwm_backlight.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/hardware.h>
 #include <mach/pxa3xx-regs.h>
 #include <mach/mfp-pxa930.h>
+#include <mach/pxafb.h>
+#include <mach/pxa27x_keypad.h>
 
 #include "devices.h"
 #include "generic.h"
@@ -33,6 +36,45 @@ static mfp_cfg_t tavorevb_mfp_cfg[] __initdata = {
         /* Ethernet */
         DF_nCS1_nCS3,
         GPIO47_GPIO,
+
+        /* LCD */
+        GPIO23_LCD_DD0,
+        GPIO24_LCD_DD1,
+        GPIO25_LCD_DD2,
+        GPIO26_LCD_DD3,
+        GPIO27_LCD_DD4,
+        GPIO28_LCD_DD5,
+        GPIO29_LCD_DD6,
+        GPIO44_LCD_DD7,
+        GPIO21_LCD_CS,
+        GPIO22_LCD_CS2,
+
+        GPIO17_LCD_FCLK_RD,
+        GPIO18_LCD_LCLK_A0,
+        GPIO19_LCD_PCLK_WR,
+
+        /* LCD Backlight */
+        GPIO43_PWM3,    /* primary backlight */
+        GPIO32_PWM0,    /* secondary backlight */
+
+        /* Keypad */
+        GPIO0_KP_MKIN_0,
+        GPIO2_KP_MKIN_1,
+        GPIO4_KP_MKIN_2,
+        GPIO6_KP_MKIN_3,
+        GPIO8_KP_MKIN_4,
+        GPIO10_KP_MKIN_5,
+        GPIO12_KP_MKIN_6,
+        GPIO1_KP_MKOUT_0,
+        GPIO3_KP_MKOUT_1,
+        GPIO5_KP_MKOUT_2,
+        GPIO7_KP_MKOUT_3,
+        GPIO9_KP_MKOUT_4,
+        GPIO11_KP_MKOUT_5,
+        GPIO13_KP_MKOUT_6,
+
+        GPIO14_KP_DKIN_2,
+        GPIO15_KP_DKIN_3,
 };
 
 #define TAVOREVB_ETH_PHYS       (0x14000000)
@@ -64,12 +106,382 @@ static struct platform_device smc91x_device = {
         },
 };
 
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
+static unsigned int tavorevb_matrix_key_map[] = {
+        /* KEY(row, col, key_code) */
+        KEY(0, 4, KEY_A), KEY(0, 5, KEY_B), KEY(0, 6, KEY_C),
+        KEY(1, 4, KEY_E), KEY(1, 5, KEY_F), KEY(1, 6, KEY_G),
+        KEY(2, 4, KEY_I), KEY(2, 5, KEY_J), KEY(2, 6, KEY_K),
+        KEY(3, 4, KEY_M), KEY(3, 5, KEY_N), KEY(3, 6, KEY_O),
+        KEY(4, 5, KEY_R), KEY(4, 6, KEY_S),
+        KEY(5, 4, KEY_U), KEY(5, 4, KEY_V), KEY(5, 6, KEY_W),
+
+        KEY(6, 4, KEY_Y), KEY(6, 5, KEY_Z),
+
+        KEY(0, 3, KEY_0), KEY(2, 0, KEY_1), KEY(2, 1, KEY_2), KEY(2, 2, KEY_3),
+        KEY(2, 3, KEY_4), KEY(1, 0, KEY_5), KEY(1, 1, KEY_6), KEY(1, 2, KEY_7),
+        KEY(1, 3, KEY_8), KEY(0, 2, KEY_9),
+
+        KEY(6, 6, KEY_SPACE),
+        KEY(0, 0, KEY_KPASTERISK),      /* * */
+        KEY(0, 1, KEY_KPDOT),           /* # */
+
+        KEY(4, 1, KEY_UP),
+        KEY(4, 3, KEY_DOWN),
+        KEY(4, 0, KEY_LEFT),
+        KEY(4, 2, KEY_RIGHT),
+        KEY(6, 0, KEY_HOME),
+        KEY(3, 2, KEY_END),
+        KEY(6, 1, KEY_DELETE),
+        KEY(5, 2, KEY_BACK),
+        KEY(6, 3, KEY_CAPSLOCK),        /* KEY_LEFTSHIFT), */
+
+        KEY(4, 4, KEY_ENTER),           /* scroll push */
+        KEY(6, 2, KEY_ENTER),           /* keypad action */
+
+        KEY(3, 1, KEY_SEND),
+        KEY(5, 3, KEY_RECORD),
+        KEY(5, 0, KEY_VOLUMEUP),
+        KEY(5, 1, KEY_VOLUMEDOWN),
+
+        KEY(3, 0, KEY_F22),     /* soft1 */
+        KEY(3, 3, KEY_F23),     /* soft2 */
+};
+
+static struct pxa27x_keypad_platform_data tavorevb_keypad_info = {
+        .matrix_key_rows        = 7,
+        .matrix_key_cols        = 7,
+        .matrix_key_map         = tavorevb_matrix_key_map,
+        .matrix_key_map_size    = ARRAY_SIZE(tavorevb_matrix_key_map),
+        .debounce_interval      = 30,
+};
+
+static void __init tavorevb_init_keypad(void)
+{
+        pxa_set_keypad_info(&tavorevb_keypad_info);
+}
+#else
+static inline void tavorevb_init_keypad(void) {}
+#endif /* CONFIG_KEYBOARD_PXA27x || CONFIG_KEYBOARD_PXA27x_MODULE */
+
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+static struct platform_pwm_backlight_data tavorevb_backlight_data[] = {
+        [0] = {
+                /* primary backlight */
+                .pwm_id         = 2,
+                .max_brightness = 100,
+                .dft_brightness = 100,
+                .pwm_period_ns  = 100000,
+        },
+        [1] = {
+                /* secondary backlight */
+                .pwm_id         = 0,
+                .max_brightness = 100,
+                .dft_brightness = 100,
+                .pwm_period_ns  = 100000,
+        },
+};
+
+static struct platform_device tavorevb_backlight_devices[] = {
+        [0] = {
+                .name           = "pwm-backlight",
+                .id             = 0,
+                .dev            = {
+                        .platform_data = &tavorevb_backlight_data[0],
+                },
+        },
+        [1] = {
+                .name           = "pwm-backlight",
+                .id             = 1,
+                .dev            = {
+                        .platform_data = &tavorevb_backlight_data[1],
+                },
+        },
+};
+
+static uint16_t panel_init[] = {
+        /* DSTB OUT */
+        SMART_CMD(0x00),
+        SMART_CMD_NOOP,
+        SMART_DELAY(1),
+
+        SMART_CMD(0x00),
+        SMART_CMD_NOOP,
+        SMART_DELAY(1),
+
+        SMART_CMD(0x00),
+        SMART_CMD_NOOP,
+        SMART_DELAY(1),
+
+        /* STB OUT */
+        SMART_CMD(0x00),
+        SMART_CMD(0x1D),
+        SMART_DAT(0x00),
+        SMART_DAT(0x05),
+        SMART_DELAY(1),
+
+        /* P-ON Init sequence */
+        SMART_CMD(0x00), /* OSC ON */
+        SMART_CMD(0x00),
+        SMART_DAT(0x00),
+        SMART_DAT(0x01),
+        SMART_CMD(0x00),
+        SMART_CMD(0x01), /* SOURCE DRIVER SHIFT DIRECTION and display RAM setting */
+        SMART_DAT(0x01),
+        SMART_DAT(0x27),
+        SMART_CMD(0x00),
+        SMART_CMD(0x02), /* LINE INV */
+        SMART_DAT(0x02),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x03), /* IF mode(1) */
+        SMART_DAT(0x01), /* 8bit smart mode(8-8),high speed write mode */
+        SMART_DAT(0x30),
+        SMART_CMD(0x07),
+        SMART_CMD(0x00), /* RAM Write Mode */
+        SMART_DAT(0x00),
+        SMART_DAT(0x03),
+        SMART_CMD(0x00),
+
+        /* DISPLAY Setting,  262K, fixed(NO scroll), no split screen */
+        SMART_CMD(0x07),
+        SMART_DAT(0x40), /* 16/18/19 BPP */
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x08), /* BP, FP Seting, BP=2H, FP=3H */
+        SMART_DAT(0x03),
+        SMART_DAT(0x02),
+        SMART_CMD(0x00),
+        SMART_CMD(0x0C), /* IF mode(2), using internal clock & MPU */
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x0D), /* Frame setting, 1Min. Frequence, 16CLK */
+        SMART_DAT(0x00),
+        SMART_DAT(0x10),
+        SMART_CMD(0x00),
+        SMART_CMD(0x12), /* Timing(1),ASW W=4CLK, ASW ST=1CLK */
+        SMART_DAT(0x03),
+        SMART_DAT(0x02),
+        SMART_CMD(0x00),
+        SMART_CMD(0x13), /* Timing(2),OEV ST=0.5CLK, OEV ED=1CLK */
+        SMART_DAT(0x01),
+        SMART_DAT(0x02),
+        SMART_CMD(0x00),
+        SMART_CMD(0x14), /* Timing(3), ASW HOLD=0.5CLK */
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x15), /* Timing(4), CKV ST=0CLK, CKV ED=1CLK */
+        SMART_DAT(0x20),
+        SMART_DAT(0x00),
+        SMART_CMD(0x00),
+        SMART_CMD(0x1C),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x03),
+        SMART_CMD(0x00),
+        SMART_DAT(0x04),
+        SMART_DAT(0x03),
+        SMART_CMD(0x03),
+        SMART_CMD(0x01),
+        SMART_DAT(0x03),
+        SMART_DAT(0x04),
+        SMART_CMD(0x03),
+        SMART_CMD(0x02),
+        SMART_DAT(0x04),
+        SMART_DAT(0x03),
+        SMART_CMD(0x03),
+        SMART_CMD(0x03),
+        SMART_DAT(0x03),
+        SMART_DAT(0x03),
+        SMART_CMD(0x03),
+        SMART_CMD(0x04),
+        SMART_DAT(0x01),
+        SMART_DAT(0x01),
+        SMART_CMD(0x03),
+        SMART_CMD(0x05),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x04),
+        SMART_CMD(0x02),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x04),
+        SMART_CMD(0x03),
+        SMART_DAT(0x01),
+        SMART_DAT(0x3F),
+        SMART_DELAY(0),
+
+        /* DISP RAM setting: 240*320 */
+        SMART_CMD(0x04), /* HADDR, START 0 */
+        SMART_CMD(0x06),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00), /* x1,3 */
+        SMART_CMD(0x04), /* HADDR,  END   4 */
+        SMART_CMD(0x07),
+        SMART_DAT(0x00),
+        SMART_DAT(0xEF), /* x2, 7 */
+        SMART_CMD(0x04), /* VADDR, START 8 */
+        SMART_CMD(0x08),
+        SMART_DAT(0x00), /* y1, 10 */
+        SMART_DAT(0x00), /* y1, 11 */
+        SMART_CMD(0x04), /* VADDR, END 12 */
+        SMART_CMD(0x09),
+        SMART_DAT(0x01), /* y2, 14 */
+        SMART_DAT(0x3F), /* y2, 15 */
+        SMART_CMD(0x02), /* RAM ADDR SETTING 16 */
+        SMART_CMD(0x00),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00), /* x1, 19 */
+        SMART_CMD(0x02), /* RAM ADDR SETTING 20 */
+        SMART_CMD(0x01),
+        SMART_DAT(0x00), /* y1, 22 */
+        SMART_DAT(0x00), /* y1, 23 */
+};
+
+static uint16_t panel_on[] = {
+        /* Power-IC ON */
+        SMART_CMD(0x01),
+        SMART_CMD(0x02),
+        SMART_DAT(0x07),
+        SMART_DAT(0x7D),
+        SMART_CMD(0x01),
+        SMART_CMD(0x03),
+        SMART_DAT(0x00),
+        SMART_DAT(0x05),
+        SMART_CMD(0x01),
+        SMART_CMD(0x04),
+        SMART_DAT(0x00),
+        SMART_DAT(0x00),
+        SMART_CMD(0x01),
+        SMART_CMD(0x05),
+        SMART_DAT(0x00),
+        SMART_DAT(0x15),
+        SMART_CMD(0x01),
+        SMART_CMD(0x00),
+        SMART_DAT(0xC0),
+        SMART_DAT(0x10),
+        SMART_DELAY(30),
+
+        /* DISP ON */
+        SMART_CMD(0x01),
+        SMART_CMD(0x01),
+        SMART_DAT(0x00),
+        SMART_DAT(0x01),
+        SMART_CMD(0x01),
+        SMART_CMD(0x00),
+        SMART_DAT(0xFF),
+        SMART_DAT(0xFE),
+        SMART_DELAY(150),
+};
+
+static uint16_t panel_off[] = {
+        SMART_CMD(0x00),
+        SMART_CMD(0x1E),
+        SMART_DAT(0x00),
+        SMART_DAT(0x0A),
+        SMART_CMD(0x01),
+        SMART_CMD(0x00),
+        SMART_DAT(0xFF),
+        SMART_DAT(0xEE),
+        SMART_CMD(0x01),
+        SMART_CMD(0x00),
+        SMART_DAT(0xF8),
+        SMART_DAT(0x12),
+        SMART_CMD(0x01),
+        SMART_CMD(0x00),
+        SMART_DAT(0xE8),
+        SMART_DAT(0x11),
+        SMART_CMD(0x01),
+        SMART_CMD(0x00),
+        SMART_DAT(0xC0),
+        SMART_DAT(0x11),
+        SMART_CMD(0x01),
+        SMART_CMD(0x00),
+        SMART_DAT(0x40),
+        SMART_DAT(0x11),
+        SMART_CMD(0x01),
+        SMART_CMD(0x00),
+        SMART_DAT(0x00),
+        SMART_DAT(0x10),
+};
+
+static uint16_t update_framedata[] = {
+        /* write ram */
+        SMART_CMD(0x02),
+        SMART_CMD(0x02),
+
+        /* write frame data */
+        SMART_CMD_WRITE_FRAME,
+};
+
+static void ltm020d550_lcd_power(int on, struct fb_var_screeninfo *var)
+{
+        struct fb_info *info = container_of(var, struct fb_info, var);
+
+        if (on) {
+                pxafb_smart_queue(info, ARRAY_AND_SIZE(panel_init));
+                pxafb_smart_queue(info, ARRAY_AND_SIZE(panel_on));
+        } else {
+                pxafb_smart_queue(info, ARRAY_AND_SIZE(panel_off));
+        }
+
+        if (pxafb_smart_flush(info))
+                pr_err("%s: timed out\n", __func__);
+}
+
+static void ltm020d550_update(struct fb_info *info)
+{
+        pxafb_smart_queue(info, ARRAY_AND_SIZE(update_framedata));
+        pxafb_smart_flush(info);
+}
+
+static struct pxafb_mode_info toshiba_ltm020d550_modes[] = {
+        [0] = {
+                .xres                   = 240,
+                .yres                   = 320,
+                .bpp                    = 16,
+                .a0csrd_set_hld         = 30,
+                .a0cswr_set_hld         = 30,
+                .wr_pulse_width         = 30,
+                .rd_pulse_width         = 170,
+                .op_hold_time           = 30,
+                .cmd_inh_time           = 60,
+
+                /* L_LCLK_A0 and L_LCLK_RD active low */
+                .sync                   = FB_SYNC_HOR_HIGH_ACT |
+                                          FB_SYNC_VERT_HIGH_ACT,
+        },
+};
+
+static struct pxafb_mach_info tavorevb_lcd_info = {
+        .modes                  = toshiba_ltm020d550_modes,
+        .num_modes              = 1,
+        .lcd_conn               = LCD_SMART_PANEL_8BPP | LCD_PCLK_EDGE_FALL,
+        .pxafb_lcd_power        = ltm020d550_lcd_power,
+        .smart_update           = ltm020d550_update,
+};
+
+static void __init tavorevb_init_lcd(void)
+{
+        platform_device_register(&tavorevb_backlight_devices[0]);
+        platform_device_register(&tavorevb_backlight_devices[1]);
+        set_pxa_fb_info(&tavorevb_lcd_info);
+}
+#else
+static inline void tavorevb_init_lcd(void) {}
+#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
+
 static void __init tavorevb_init(void)
 {
         /* initialize MFP configurations */
         pxa3xx_mfp_config(ARRAY_AND_SIZE(tavorevb_mfp_cfg));
 
         platform_device_register(&smc91x_device);
+
+        tavorevb_init_lcd();
+        tavorevb_init_keypad();
 }
 
 MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index f8a9a62959e5..95656a72268d 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -22,8 +22,8 @@
 #include <asm/div64.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+#include <mach/hardware.h>
 #include <mach/pxa-regs.h>
-#include <asm/mach-types.h>
 
 /*
  * This is PXA's sched_clock implementation. This has a resolution
@@ -122,7 +122,6 @@ static struct clock_event_device ckevt_pxa_osmr0 = {
         .features       = CLOCK_EVT_FEAT_ONESHOT,
         .shift          = 32,
         .rating         = 200,
-        .cpumask        = CPU_MASK_CPU0,
         .set_next_event = pxa_osmr0_set_next_event,
         .set_mode       = pxa_osmr0_set_mode,
 };
@@ -150,18 +149,11 @@ static struct irqaction pxa_ost0_irq = {
 
 static void __init pxa_timer_init(void)
 {
-        unsigned long clock_tick_rate;
+        unsigned long clock_tick_rate = get_clock_tick_rate();
 
         OIER = 0;
         OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
 
-        if (cpu_is_pxa25x())
-                clock_tick_rate = 3686400;
-        else if (machine_is_mainstone())
-                clock_tick_rate = 3249600;
-        else
-                clock_tick_rate = 3250000;
-
         set_oscr2ns_scale(clock_tick_rate);
 
         ckevt_pxa_osmr0.mult =
@@ -170,6 +162,7 @@ static void __init pxa_timer_init(void)
                 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
         ckevt_pxa_osmr0.min_delta_ns =
                 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
+        ckevt_pxa_osmr0.cpumask = cpumask_of(0);
 
         cksrc_pxa_oscr0.mult =
                 clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 224897a67d15..3332e5d0356c 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -25,6 +25,7 @@
 #include <linux/mfd/tmio.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/pm.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
@@ -733,6 +734,45 @@ static void tosa_tc6393xb_teardown(struct platform_device *dev)
         gpio_free(TOSA_GPIO_CARD_VCC_ON);
 }
 
+#ifdef CONFIG_MFD_TC6393XB
+static struct fb_videomode tosa_tc6393xb_lcd_mode[] = {
+        {
+                .xres = 480,
+                .yres = 640,
+                .pixclock = 0x002cdf00,/* PLL divisor */
+                .left_margin = 0x004c,
+                .right_margin = 0x005b,
+                .upper_margin = 0x0001,
+                .lower_margin = 0x000d,
+                .hsync_len = 0x0002,
+                .vsync_len = 0x0001,
+                .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                .vmode = FB_VMODE_NONINTERLACED,
+        },{
+                .xres = 240,
+                .yres = 320,
+                .pixclock = 0x00e7f203,/* PLL divisor */
+                .left_margin = 0x0024,
+                .right_margin = 0x002f,
+                .upper_margin = 0x0001,
+                .lower_margin = 0x000d,
+                .hsync_len = 0x0002,
+                .vsync_len = 0x0001,
+                .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                .vmode = FB_VMODE_NONINTERLACED,
+        }
+};
+
+static struct tmio_fb_data tosa_tc6393xb_fb_config = {
+        .lcd_set_power  = tc6393xb_lcd_set_power,
+        .lcd_mode       = tc6393xb_lcd_mode,
+        .num_modes      = ARRAY_SIZE(tosa_tc6393xb_lcd_mode),
+        .modes          = &tosa_tc6393xb_lcd_mode[0],
+        .height         = 82,
+        .width          = 60,
+};
+#endif
+
 static struct tc6393xb_platform_data tosa_tc6393xb_data = {
         .scr_pll2cr     = 0x0cc1,
         .scr_gper       = 0x3300,
@@ -748,6 +788,9 @@ static struct tc6393xb_platform_data tosa_tc6393xb_data = {
         .resume         = tosa_tc6393xb_resume,
 
         .nand_data      = &tosa_tc6393xb_nand_config,
+#ifdef CONFIG_MFD_TC6393XB
+        .fb_data        = &tosa_tc6393xb_fb_config,
+#endif
 
         .resume_restore = 1,
 };
@@ -789,6 +832,36 @@ static struct spi_board_info spi_board_info[] __initdata = {
         },
 };
 
+static struct mtd_partition sharpsl_rom_parts[] = {
+        {
+                .name   ="Boot PROM Filesystem",
+                .offset = 0x00160000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data sharpsl_rom_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
+        .parts          = sharpsl_rom_parts,
+};
+
+static struct resource sharpsl_rom_resources[] = {
+        {
+                .start  = 0x00000000,
+                .end    = 0x007fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device sharpsl_rom_device = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .resource = sharpsl_rom_resources,
+        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
+        .dev.platform_data = &sharpsl_rom_data,
+};
+
 static struct platform_device *devices[] __initdata = {
         &tosascoop_device,
         &tosascoop_jc_device,
@@ -798,6 +871,7 @@ static struct platform_device *devices[] __initdata = {
         &tosa_gpio_keys_device,
         &tosaled_device,
         &tosa_bt_device,
+        &sharpsl_rom_device,
 };
 
 static void tosa_poweroff(void)
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 813804433466..218d2001f1df 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -18,6 +18,7 @@
 #include <linux/interrupt.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/gpio.h>
 #include <linux/pwm_backlight.h>
 #include <linux/smc91x.h>
 
@@ -25,7 +26,6 @@
 #include <asm/mach/arch.h>
 #include <mach/hardware.h>
 #include <mach/audio.h>
-#include <mach/gpio.h>
 #include <mach/pxafb.h>
 #include <mach/zylonite.h>
 #include <mach/mmc.h>
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c
index 0f244744daae..28e4e623780b 100644
--- a/arch/arm/mach-pxa/zylonite_pxa320.c
+++ b/arch/arm/mach-pxa/zylonite_pxa320.c
@@ -16,8 +16,8 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/gpio.h>
 
-#include <mach/gpio.h>
 #include <mach/mfp-pxa320.h>
 #include <mach/zylonite.h>
 
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 5ccde7cf39e8..ad911854eb4c 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -7,9 +7,17 @@ config MACH_REALVIEW_EB
         help
           Include support for the ARM(R) RealView Emulation Baseboard platform.
 
+config REALVIEW_EB_A9MP
+        bool "Support Multicore Cortex-A9"
+        depends on MACH_REALVIEW_EB
+        select CPU_V7
+        help
+          Enable support for the Cortex-A9MPCore tile on the Realview platform.
+
 config REALVIEW_EB_ARM11MP
         bool "Support ARM11MPCore tile"
         depends on MACH_REALVIEW_EB
+        select CPU_V6
         help
           Enable support for the ARM11MPCore tile on the Realview platform.
 
@@ -25,6 +33,7 @@ config REALVIEW_EB_ARM11MP_REVB
 
 config MACH_REALVIEW_PB11MP
         bool "Support RealView/PB11MPCore platform"
+        select CPU_V6
         select ARM_GIC
         help
           Include support for the ARM(R) RealView MPCore Platform Baseboard.
@@ -33,8 +42,29 @@ config MACH_REALVIEW_PB11MP
 
 config MACH_REALVIEW_PB1176
         bool "Support RealView/PB1176 platform"
+        select CPU_V6
         select ARM_GIC
         help
           Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
 
+config MACH_REALVIEW_PBA8
+        bool "Support RealView/PB-A8 platform"
+        select CPU_V7
+        select ARM_GIC
+        help
+          Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
+          PB-A8 is a platform with an on-board Cortex-A8 and has support for
+          PCI-E and Compact Flash.
+
+config REALVIEW_HIGH_PHYS_OFFSET
+        bool "High physical base address for the RealView platform"
+        depends on !MACH_REALVIEW_PB1176
+        default y
+        help
+          RealView boards other than PB1176 have the RAM available at
+          0x70000000, 256MB of which being mirrored at 0x00000000. If
+          the board supports 512MB of RAM, this option allows the
+          memory to be accessed contiguously at the high physical
+          offset.
+
 endmenu
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index d2ae077431dd..7bea8ffc4b59 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -6,5 +6,6 @@ obj-y					:= core.o clock.o
 obj-$(CONFIG_MACH_REALVIEW_EB)          += realview_eb.o
 obj-$(CONFIG_MACH_REALVIEW_PB11MP)      += realview_pb11mp.o
 obj-$(CONFIG_MACH_REALVIEW_PB1176)      += realview_pb1176.o
+obj-$(CONFIG_MACH_REALVIEW_PBA8)        += realview_pba8.o
 obj-$(CONFIG_SMP)                       += platsmp.o headsmp.o localtimer.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
diff --git a/arch/arm/mach-realview/Makefile.boot b/arch/arm/mach-realview/Makefile.boot
index c7e75acfe6c9..d97e003d3df4 100644
--- a/arch/arm/mach-realview/Makefile.boot
+++ b/arch/arm/mach-realview/Makefile.boot
@@ -1,4 +1,9 @@
+ifeq ($(CONFIG_REALVIEW_HIGH_PHYS_OFFSET),y)
+   zreladdr-y   := 0x70008000
+params_phys-y   := 0x70000100
+initrd_phys-y   := 0x70800000
+else
    zreladdr-y   := 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
-
+endif
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
index 3347c4236a60..a7043115de72 100644
--- a/arch/arm/mach-realview/clock.c
+++ b/arch/arm/mach-realview/clock.c
@@ -10,9 +10,11 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/device.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
+#include <linux/string.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
 
@@ -20,32 +22,6 @@
 
 #include "clock.h"
 
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
-
 int clk_enable(struct clk *clk)
 {
         return 0;
@@ -65,7 +41,9 @@ EXPORT_SYMBOL(clk_get_rate);
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-        return rate;
+        struct icst307_vco vco;
+        vco = icst307_khz_to_vco(clk->params, rate / 1000);
+        return icst307_khz(clk->params, vco) * 1000;
 }
 EXPORT_SYMBOL(clk_round_rate);
 
@@ -78,57 +56,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 
                 vco = icst307_khz_to_vco(clk->params, rate / 1000);
                 clk->rate = icst307_khz(clk->params, vco) * 1000;
-
-                printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
-                        clk->name, vco.s, vco.r, vco.v);
-
                 clk->setvco(clk, vco);
                 ret = 0;
         }
         return ret;
 }
 EXPORT_SYMBOL(clk_set_rate);
-
-/*
- * These are fixed clocks.
- */
-static struct clk kmi_clk = {
-        .name   = "KMIREFCLK",
-        .rate   = 24000000,
-};
-
-static struct clk uart_clk = {
-        .name   = "UARTCLK",
-        .rate   = 24000000,
-};
-
-static struct clk mmci_clk = {
-        .name   = "MCLK",
-        .rate   = 24000000,
-};
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        clk_register(&kmi_clk);
-        clk_register(&uart_clk);
-        clk_register(&mmci_clk);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-realview/clock.h b/arch/arm/mach-realview/clock.h
index dadba695e181..ebbb0f06b600 100644
--- a/arch/arm/mach-realview/clock.h
+++ b/arch/arm/mach-realview/clock.h
@@ -12,14 +12,8 @@ struct module;
 struct icst307_params;
 
 struct clk {
-        struct list_head        node;
         unsigned long           rate;
-        struct module           *owner;
-        const char              *name;
         const struct icst307_params *params;
         void                    *data;
         void                    (*setvco)(struct clk *, struct icst307_vco vco);
 };
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 2f04d54711e7..bd2aa4f16141 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -28,11 +28,14 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/smc911x.h>
 
+#include <asm/clkdev.h>
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/leds.h>
+#include <asm/mach-types.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/icst307.h>
 
@@ -49,7 +52,7 @@
 
 #define REALVIEW_REFCOUNTER     (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
 
-/* used by entry-macro.S */
+/* used by entry-macro.S and platsmp.c */
 void __iomem *gic_cpu_base_addr;
 
 /*
@@ -124,6 +127,29 @@ int realview_flash_register(struct resource *res, u32 num)
         return platform_device_register(&realview_flash_device);
 }
 
+static struct smc911x_platdata realview_smc911x_platdata = {
+        .flags          = SMC911X_USE_32BIT,
+        .irq_flags      = IRQF_SHARED,
+        .irq_polarity   = 1,
+};
+
+static struct platform_device realview_eth_device = {
+        .name           = "smc911x",
+        .id             = 0,
+        .num_resources  = 2,
+};
+
+int realview_eth_register(const char *name, struct resource *res)
+{
+        if (name)
+                realview_eth_device.name = name;
+        realview_eth_device.resource = res;
+        if (strcmp(realview_eth_device.name, "smc911x") == 0)
+                realview_eth_device.dev.platform_data = &realview_smc911x_platdata;
+
+        return platform_device_register(&realview_eth_device);
+}
+
 static struct resource realview_i2c_resource = {
         .start          = REALVIEW_I2C_BASE,
         .end            = REALVIEW_I2C_BASE + SZ_4K - 1,
@@ -177,9 +203,14 @@ static const struct icst307_params realview_oscvco_params = {
 static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
 {
         void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
-        void __iomem *sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
+        void __iomem *sys_osc;
         u32 val;
 
+        if (machine_is_realview_pb1176())
+                sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
+        else
+                sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
+
         val = readl(sys_osc) & ~0x7ffff;
         val |= vco.v | (vco.r << 9) | (vco.s << 16);
 
@@ -188,13 +219,60 @@ static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
         writel(0, sys_lock);
 }
 
-struct clk realview_clcd_clk = {
-        .name   = "CLCDCLK",
+static struct clk oscvco_clk = {
         .params = &realview_oscvco_params,
         .setvco = realview_oscvco_set,
 };
 
 /*
+ * These are fixed clocks.
+ */
+static struct clk ref24_clk = {
+        .rate   = 24000000,
+};
+
+static struct clk_lookup lookups[] = {
+        {       /* UART0 */
+                .dev_id         = "dev:f1",
+                .clk            = &ref24_clk,
+        }, {    /* UART1 */
+                .dev_id         = "dev:f2",
+                .clk            = &ref24_clk,
+        }, {    /* UART2 */
+                .dev_id         = "dev:f3",
+                .clk            = &ref24_clk,
+        }, {    /* UART3 */
+                .dev_id         = "fpga:09",
+                .clk            = &ref24_clk,
+        }, {    /* KMI0 */
+                .dev_id         = "fpga:06",
+                .clk            = &ref24_clk,
+        }, {    /* KMI1 */
+                .dev_id         = "fpga:07",
+                .clk            = &ref24_clk,
+        }, {    /* MMC0 */
+                .dev_id         = "fpga:05",
+                .clk            = &ref24_clk,
+        }, {    /* EB:CLCD */
+                .dev_id         = "dev:20",
+                .clk            = &oscvco_clk,
+        }, {    /* PB:CLCD */
+                .dev_id         = "issp:20",
+                .clk            = &oscvco_clk,
+        }
+};
+
+static int __init clk_init(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(lookups); i++)
+                clkdev_add(&lookups[i]);
+        return 0;
+}
+arch_initcall(clk_init);
+
+/*
  * CLCD support.
  */
 #define SYS_CLCD_NLCDIOON       (1 << 2)
@@ -226,7 +304,30 @@ static struct clcd_panel vga = {
         .width          = -1,
         .height         = -1,
         .tim2           = TIM2_BCD | TIM2_IPC,
-        .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
+        .bpp            = 16,
+};
+
+static struct clcd_panel xvga = {
+        .mode           = {
+                .name           = "XVGA",
+                .refresh        = 60,
+                .xres           = 1024,
+                .yres           = 768,
+                .pixclock       = 15748,
+                .left_margin    = 152,
+                .right_margin   = 48,
+                .upper_margin   = 23,
+                .lower_margin   = 3,
+                .hsync_len      = 104,
+                .vsync_len      = 4,
+                .sync           = 0,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_BCD | TIM2_IPC,
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
         .bpp            = 16,
 };
 
@@ -249,7 +350,7 @@ static struct clcd_panel sanyo_3_8_in = {
         .width          = -1,
         .height         = -1,
         .tim2           = TIM2_BCD,
-        .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
         .bpp            = 16,
 };
 
@@ -272,7 +373,7 @@ static struct clcd_panel sanyo_2_5_in = {
         .width          = -1,
         .height         = -1,
         .tim2           = TIM2_IVS | TIM2_IHS | TIM2_IPC,
-        .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
         .bpp            = 16,
 };
 
@@ -295,7 +396,7 @@ static struct clcd_panel epson_2_2_in = {
         .width          = -1,
         .height         = -1,
         .tim2           = TIM2_BCD | TIM2_IPC,
-        .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
         .bpp            = 16,
 };
 
@@ -308,9 +409,15 @@ static struct clcd_panel epson_2_2_in = {
 static struct clcd_panel *realview_clcd_panel(void)
 {
         void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
-        struct clcd_panel *panel = &vga;
+        struct clcd_panel *vga_panel;
+        struct clcd_panel *panel;
         u32 val;
 
+        if (machine_is_realview_eb())
+                vga_panel = &vga;
+        else
+                vga_panel = &xvga;
+
         val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
         if (val == SYS_CLCD_ID_SANYO_3_8)
                 panel = &sanyo_3_8_in;
@@ -319,11 +426,11 @@ static struct clcd_panel *realview_clcd_panel(void)
         else if (val == SYS_CLCD_ID_EPSON_2_2)
                 panel = &epson_2_2_in;
         else if (val == SYS_CLCD_ID_VGA)
-                panel = &vga;
+                panel = vga_panel;
         else {
                 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
                         val);
-                panel = &vga;
+                panel = vga_panel;
         }
 
         return panel;
@@ -358,12 +465,18 @@ static void realview_clcd_enable(struct clcd_fb *fb)
         writel(val, sys_clcd);
 }
 
-static unsigned long framesize = SZ_1M;
-
 static int realview_clcd_setup(struct clcd_fb *fb)
 {
+        unsigned long framesize;
         dma_addr_t dma;
 
+        if (machine_is_realview_eb())
+                /* VGA, 16bpp */
+                framesize = 640 * 480 * 2;
+        else
+                /* XVGA, 16bpp */
+                framesize = 1024 * 768 * 2;
+
         fb->panel               = realview_clcd_panel();
 
         fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
@@ -511,7 +624,7 @@ static struct clock_event_device timer0_clockevent =	 {
         .set_mode       = timer_set_mode,
         .set_next_event = timer_set_next_event,
         .rating         = 300,
-        .cpumask        = CPU_MASK_ALL,
+        .cpumask        = cpu_all_mask,
 };
 
 static void __init realview_clockevents_init(unsigned int timer_irq)
@@ -588,7 +701,7 @@ void __init realview_timer_init(unsigned int timer_irq)
          * The dummy clock device has to be registered before the main device
          * so that the latter will broadcast the clock events
          */
-        local_timer_setup(smp_processor_id());
+        local_timer_setup();
 #endif
 
         /* 
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 3cea92c70d8f..44269b162d49 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -31,7 +31,7 @@
 static struct amba_device name##_device = {                     \
         .dev            = {                                     \
                 .coherent_dma_mask = ~0,                        \
-                .bus_id = busid,                                \
+                .init_name = busid,                             \
                 .platform_data = plat,                          \
         },                                                      \
         .res            = {                                     \
@@ -48,12 +48,10 @@ extern struct platform_device realview_flash_device;
 extern struct platform_device realview_i2c_device;
 extern struct mmc_platform_data realview_mmc0_plat_data;
 extern struct mmc_platform_data realview_mmc1_plat_data;
-extern struct clk realview_clcd_clk;
 extern struct clcd_board clcd_plat_data;
 extern void __iomem *gic_cpu_base_addr;
 #ifdef CONFIG_LOCAL_TIMERS
-extern void __iomem *twd_base_addr;
-extern unsigned int twd_size;
+extern void __iomem *twd_base;
 #endif
 extern void __iomem *timer0_va_base;
 extern void __iomem *timer1_va_base;
@@ -63,5 +61,6 @@ extern void __iomem *timer3_va_base;
 extern void realview_leds_event(led_event_t ledevt);
 extern void realview_timer_init(unsigned int timer_irq);
 extern int realview_flash_register(struct resource *res, u32 num);
+extern int realview_eth_register(const char *name, struct resource *res);
 
 #endif
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index 09748cbcd10e..be048e3e8799 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -13,6 +13,8 @@
 #include <linux/smp.h>
 #include <linux/completion.h>
 
+#include <asm/cacheflush.h>
+
 extern volatile int pen_release;
 
 static DECLARE_COMPLETION(cpu_killed);
@@ -21,7 +23,8 @@ static inline void cpu_enter_lowpower(void)
 {
         unsigned int v;
 
-        asm volatile(   "mcr    p15, 0, %1, c7, c14, 0\n"
+        flush_cache_all();
+        asm volatile(
         "       mcr     p15, 0, %1, c7, c5, 0\n"
         "       mcr     p15, 0, %1, c7, c10, 4\n"
         /*
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 8d699fd324d0..268d7701fa9b 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -49,16 +49,14 @@
 #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
 #define REALVIEW_EB11MP_SCU_BASE        0x10100000      /* SCU registers */
 #define REALVIEW_EB11MP_GIC_CPU_BASE    0x10100100      /* Generic interrupt controller CPU interface */
-#define REALVIEW_EB11MP_TWD_BASE        0x10100700
-#define REALVIEW_EB11MP_TWD_SIZE        0x00000100
+#define REALVIEW_EB11MP_TWD_BASE        0x10100600
 #define REALVIEW_EB11MP_GIC_DIST_BASE   0x10101000      /* Generic interrupt controller distributor */
 #define REALVIEW_EB11MP_L220_BASE       0x10102000      /* L220 registers */
 #define REALVIEW_EB11MP_SYS_PLD_CTRL1   0xD8            /* Register offset for MPCore sysctl */
 #else
 #define REALVIEW_EB11MP_SCU_BASE        0x1F000000      /* SCU registers */
 #define REALVIEW_EB11MP_GIC_CPU_BASE    0x1F000100      /* Generic interrupt controller CPU interface */
-#define REALVIEW_EB11MP_TWD_BASE        0x1F000700
-#define REALVIEW_EB11MP_TWD_SIZE        0x00000100
+#define REALVIEW_EB11MP_TWD_BASE        0x1F000600
 #define REALVIEW_EB11MP_GIC_DIST_BASE   0x1F001000      /* Generic interrupt controller distributor */
 #define REALVIEW_EB11MP_L220_BASE       0x1F002000      /* L220 registers */
 #define REALVIEW_EB11MP_SYS_PLD_CTRL1   0x74            /* Register offset for MPCore sysctl */
@@ -163,7 +161,7 @@
 #define NR_IRQS                 NR_IRQS_EB
 #endif
 
-#if defined(CONFIG_REALVIEW_EB_ARM11MP) \
+#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
         && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
 #undef MAX_GIC_NR
 #define MAX_GIC_NR              NR_GIC_EB11MP
@@ -177,6 +175,7 @@
 #define REALVIEW_EB_PROC_ARM9           0x02000000
 #define REALVIEW_EB_PROC_ARM11          0x04000000
 #define REALVIEW_EB_PROC_ARM11MP        0x06000000
+#define REALVIEW_EB_PROC_A9MP           0x0C000000
 
 #define check_eb_proc(proc_type)                                                \
         ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK)     \
@@ -188,4 +187,13 @@
 #define core_tile_eb11mp()      0
 #endif
 
+#ifdef CONFIG_REALVIEW_EB_A9MP
+#define core_tile_a9mp()        check_eb_proc(REALVIEW_EB_PROC_A9MP)
+#else
+#define core_tile_a9mp()        0
+#endif
+
+#define machine_is_realview_eb_mp() \
+        (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
+
 #endif  /* __ASM_ARCH_BOARD_EB_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index ecd80e58631e..53ea0e7a1267 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -77,8 +77,7 @@
  */
 #define REALVIEW_TC11MP_SCU_BASE                0x1F000000      /* IRQ, Test chip */
 #define REALVIEW_TC11MP_GIC_CPU_BASE            0x1F000100      /* Test chip interrupt controller CPU interface */
-#define REALVIEW_TC11MP_TWD_BASE                0x1F000700
-#define REALVIEW_TC11MP_TWD_SIZE                0x00000100
+#define REALVIEW_TC11MP_TWD_BASE                0x1F000600
 #define REALVIEW_TC11MP_GIC_DIST_BASE           0x1F001000      /* Test chip interrupt controller distributor */
 #define REALVIEW_TC11MP_L220_BASE               0x1F002000      /* L220 registers */
 
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h
new file mode 100644
index 000000000000..c8bed8f58bab
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/board-pba8.h
@@ -0,0 +1,152 @@
+/*
+ * include/asm-arm/arch-realview/board-pba8.h
+ *
+ * Copyright (C) 2008 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#ifndef __ASM_ARCH_BOARD_PBA8_H
+#define __ASM_ARCH_BOARD_PBA8_H
+
+#include <mach/platform.h>
+
+/*
+ * Peripheral addresses
+ */
+#define REALVIEW_PBA8_UART0_BASE                0x10009000      /* UART 0 */
+#define REALVIEW_PBA8_UART1_BASE                0x1000A000      /* UART 1 */
+#define REALVIEW_PBA8_UART2_BASE                0x1000B000      /* UART 2 */
+#define REALVIEW_PBA8_UART3_BASE                0x1000C000      /* UART 3 */
+#define REALVIEW_PBA8_SSP_BASE                  0x1000D000      /* Synchronous Serial Port */
+#define REALVIEW_PBA8_WATCHDOG0_BASE            0x1000F000      /* Watchdog 0 */
+#define REALVIEW_PBA8_WATCHDOG_BASE             0x10010000      /* watchdog interface */
+#define REALVIEW_PBA8_TIMER0_1_BASE             0x10011000      /* Timer 0 and 1 */
+#define REALVIEW_PBA8_TIMER2_3_BASE             0x10012000      /* Timer 2 and 3 */
+#define REALVIEW_PBA8_GPIO0_BASE                0x10013000      /* GPIO port 0 */
+#define REALVIEW_PBA8_RTC_BASE                  0x10017000      /* Real Time Clock */
+#define REALVIEW_PBA8_TIMER4_5_BASE             0x10018000      /* Timer 4/5 */
+#define REALVIEW_PBA8_TIMER6_7_BASE             0x10019000      /* Timer 6/7 */
+#define REALVIEW_PBA8_SCTL_BASE                 0x1001A000      /* System Controller */
+#define REALVIEW_PBA8_CLCD_BASE                 0x10020000      /* CLCD */
+#define REALVIEW_PBA8_ONB_SRAM_BASE             0x10060000      /* On-board SRAM */
+#define REALVIEW_PBA8_DMC_BASE                  0x100E0000      /* DMC configuration */
+#define REALVIEW_PBA8_SMC_BASE                  0x100E1000      /* SMC configuration */
+#define REALVIEW_PBA8_CAN_BASE                  0x100E2000      /* CAN bus */
+#define REALVIEW_PBA8_CF_BASE                   0x18000000      /* Compact flash */
+#define REALVIEW_PBA8_CF_MEM_BASE               0x18003000      /* SMC for Compact flash */
+#define REALVIEW_PBA8_GIC_CPU_BASE              0x1E000000      /* Generic interrupt controller CPU interface */
+#define REALVIEW_PBA8_FLASH0_BASE               0x40000000
+#define REALVIEW_PBA8_FLASH0_SIZE               SZ_64M
+#define REALVIEW_PBA8_FLASH1_BASE               0x44000000
+#define REALVIEW_PBA8_FLASH1_SIZE               SZ_64M
+#define REALVIEW_PBA8_ETH_BASE                  0x4E000000      /* Ethernet */
+#define REALVIEW_PBA8_USB_BASE                  0x4F000000      /* USB */
+#define REALVIEW_PBA8_GIC_DIST_BASE             0x1E001000      /* Generic interrupt controller distributor */
+#define REALVIEW_PBA8_LT_BASE                   0xC0000000      /* Logic Tile expansion */
+#define REALVIEW_PBA8_SDRAM6_BASE               0x70000000      /* SDRAM bank 6 256MB */
+#define REALVIEW_PBA8_SDRAM7_BASE               0x80000000      /* SDRAM bank 7 256MB */
+
+#define REALVIEW_PBA8_SYS_PLD_CTRL1             0x74
+
+/*
+ * PBA8 PCI regions
+ */
+#define REALVIEW_PBA8_PCI_BASE                  0x90040000      /* PCI-X Unit base */
+#define REALVIEW_PBA8_PCI_IO_BASE               0x90050000      /* IO Region on AHB */
+#define REALVIEW_PBA8_PCI_MEM_BASE              0xA0000000      /* MEM Region on AHB */
+
+#define REALVIEW_PBA8_PCI_BASE_SIZE             0x10000         /* 16 Kb */
+#define REALVIEW_PBA8_PCI_IO_SIZE               0x1000          /* 4 Kb */
+#define REALVIEW_PBA8_PCI_MEM_SIZE              0x20000000      /* 512 MB */
+
+/*
+ * Irqs
+ */
+#define IRQ_PBA8_GIC_START                      32
+
+/* L220
+#define IRQ_PBA8_L220_EVENT     (IRQ_PBA8_GIC_START + 29)
+#define IRQ_PBA8_L220_SLAVE     (IRQ_PBA8_GIC_START + 30)
+#define IRQ_PBA8_L220_DECODE    (IRQ_PBA8_GIC_START + 31)
+*/
+
+/*
+ * PB-A8 on-board gic irq sources
+ */
+#define IRQ_PBA8_WATCHDOG       (IRQ_PBA8_GIC_START + 0)        /* Watchdog timer */
+#define IRQ_PBA8_SOFT           (IRQ_PBA8_GIC_START + 1)        /* Software interrupt */
+#define IRQ_PBA8_COMMRx         (IRQ_PBA8_GIC_START + 2)        /* Debug Comm Rx interrupt */
+#define IRQ_PBA8_COMMTx         (IRQ_PBA8_GIC_START + 3)        /* Debug Comm Tx interrupt */
+#define IRQ_PBA8_TIMER0_1       (IRQ_PBA8_GIC_START + 4)        /* Timer 0/1 (default timer) */
+#define IRQ_PBA8_TIMER2_3       (IRQ_PBA8_GIC_START + 5)        /* Timer 2/3 */
+#define IRQ_PBA8_GPIO0          (IRQ_PBA8_GIC_START + 6)        /* GPIO 0 */
+#define IRQ_PBA8_GPIO1          (IRQ_PBA8_GIC_START + 7)        /* GPIO 1 */
+#define IRQ_PBA8_GPIO2          (IRQ_PBA8_GIC_START + 8)        /* GPIO 2 */
+                                                                /* 9 reserved */
+#define IRQ_PBA8_RTC            (IRQ_PBA8_GIC_START + 10)       /* Real Time Clock */
+#define IRQ_PBA8_SSP            (IRQ_PBA8_GIC_START + 11)       /* Synchronous Serial Port */
+#define IRQ_PBA8_UART0          (IRQ_PBA8_GIC_START + 12)       /* UART 0 on development chip */
+#define IRQ_PBA8_UART1          (IRQ_PBA8_GIC_START + 13)       /* UART 1 on development chip */
+#define IRQ_PBA8_UART2          (IRQ_PBA8_GIC_START + 14)       /* UART 2 on development chip */
+#define IRQ_PBA8_UART3          (IRQ_PBA8_GIC_START + 15)       /* UART 3 on development chip */
+#define IRQ_PBA8_SCI            (IRQ_PBA8_GIC_START + 16)       /* Smart Card Interface */
+#define IRQ_PBA8_MMCI0A         (IRQ_PBA8_GIC_START + 17)       /* Multimedia Card 0A */
+#define IRQ_PBA8_MMCI0B         (IRQ_PBA8_GIC_START + 18)       /* Multimedia Card 0B */
+#define IRQ_PBA8_AACI           (IRQ_PBA8_GIC_START + 19)       /* Audio Codec */
+#define IRQ_PBA8_KMI0           (IRQ_PBA8_GIC_START + 20)       /* Keyboard/Mouse port 0 */
+#define IRQ_PBA8_KMI1           (IRQ_PBA8_GIC_START + 21)       /* Keyboard/Mouse port 1 */
+#define IRQ_PBA8_CHARLCD        (IRQ_PBA8_GIC_START + 22)       /* Character LCD */
+#define IRQ_PBA8_CLCD           (IRQ_PBA8_GIC_START + 23)       /* CLCD controller */
+#define IRQ_PBA8_DMAC           (IRQ_PBA8_GIC_START + 24)       /* DMA controller */
+#define IRQ_PBA8_PWRFAIL        (IRQ_PBA8_GIC_START + 25)       /* Power failure */
+#define IRQ_PBA8_PISMO          (IRQ_PBA8_GIC_START + 26)       /* PISMO interface */
+#define IRQ_PBA8_DoC            (IRQ_PBA8_GIC_START + 27)       /* Disk on Chip memory controller */
+#define IRQ_PBA8_ETH            (IRQ_PBA8_GIC_START + 28)       /* Ethernet controller */
+#define IRQ_PBA8_USB            (IRQ_PBA8_GIC_START + 29)       /* USB controller */
+#define IRQ_PBA8_TSPEN          (IRQ_PBA8_GIC_START + 30)       /* Touchscreen pen */
+#define IRQ_PBA8_TSKPAD         (IRQ_PBA8_GIC_START + 31)       /* Touchscreen keypad */
+
+/* ... */
+#define IRQ_PBA8_PCI0           (IRQ_PBA8_GIC_START + 50)
+#define IRQ_PBA8_PCI1           (IRQ_PBA8_GIC_START + 51)
+#define IRQ_PBA8_PCI2           (IRQ_PBA8_GIC_START + 52)
+#define IRQ_PBA8_PCI3           (IRQ_PBA8_GIC_START + 53)
+
+#define IRQ_PBA8_SMC            -1
+#define IRQ_PBA8_SCTL           -1
+
+#define NR_GIC_PBA8             1
+
+/*
+ * Only define NR_IRQS if less than NR_IRQS_PBA8
+ */
+#define NR_IRQS_PBA8            (IRQ_PBA8_GIC_START + 64)
+
+#if defined(CONFIG_MACH_REALVIEW_PBA8)
+
+#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
+#undef NR_IRQS
+#define NR_IRQS                 NR_IRQS_PBA8
+#endif
+
+#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
+#undef MAX_GIC_NR
+#define MAX_GIC_NR              NR_GIC_PBA8
+#endif
+
+#endif  /* CONFIG_MACH_REALVIEW_PBA8 */
+
+#endif  /* __ASM_ARCH_BOARD_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/clkdev.h b/arch/arm/mach-realview/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S
index 7196bcadff0c..92dbcb9e1792 100644
--- a/arch/arm/mach-realview/include/mach/debug-macro.S
+++ b/arch/arm/mach-realview/include/mach/debug-macro.S
@@ -8,15 +8,36 @@
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
- *
-*/
+ */
+
+#if defined(CONFIG_MACH_REALVIEW_EB) || \
+    defined(CONFIG_MACH_REALVIEW_PB11MP) || \
+    defined(CONFIG_MACH_REALVIEW_PBA8)
+#ifndef DEBUG_LL_UART_OFFSET
+#define DEBUG_LL_UART_OFFSET    0x00009000
+#elif DEBUG_LL_UART_OFFSET != 0x00009000
+#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
+#endif
+#endif
+
+#ifdef CONFIG_MACH_REALVIEW_PB1176
+#ifndef DEBUG_LL_UART_OFFSET
+#define DEBUG_LL_UART_OFFSET    0x0010c000
+#elif DEBUG_LL_UART_OFFSET != 0x0010c000
+#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
+#endif
+#endif
+
+#ifndef DEBUG_LL_UART_OFFSET
+#error "Unknown RealView platform"
+#endif
 
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1                 @ MMU enabled?
                 moveq   \rx,      #0x10000000
-                movne   \rx,      #0xf0000000   @ virtual base
-                orr     \rx, \rx, #0x00009000
+                movne   \rx,      #0xfb000000   @ virtual base
+                orr     \rx, \rx, #DEBUG_LL_UART_OFFSET
                 .endm
 
 #include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-realview/include/mach/dma.h b/arch/arm/mach-realview/include/mach/dma.h
deleted file mode 100644
index f1a5a1a10952..000000000000
--- a/arch/arm/mach-realview/include/mach/dma.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/dma.h
- *
- *  Copyright (C) 2003 ARM Limited.
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h
index 79a93b3dfca9..b42c14f89acb 100644
--- a/arch/arm/mach-realview/include/mach/hardware.h
+++ b/arch/arm/mach-realview/include/mach/hardware.h
@@ -25,7 +25,14 @@
 #include <asm/sizes.h>
 
 /* macro to get at IO space when running virtually */
-#define IO_ADDRESS(x)           (((x) & 0x0fffffff) + 0xf0000000)
+/*
+ * Statically mapped addresses:
+ *
+ * 10xx xxxx -> fbxx xxxx
+ * 1exx xxxx -> fdxx xxxx
+ * 1fxx xxxx -> fexx xxxx
+ */
+#define IO_ADDRESS(x)           (((x) & 0x03ffffff) + 0xfb000000)
 #define __io_address(n)         __io(IO_ADDRESS(n))
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/io.h b/arch/arm/mach-realview/include/mach/io.h
index aa069424d310..f05bcdf605d8 100644
--- a/arch/arm/mach-realview/include/mach/io.h
+++ b/arch/arm/mach-realview/include/mach/io.h
@@ -22,12 +22,7 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-
-#define __io(a)                 __io(a)
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h
index 02a918529db3..fe5cb987aa21 100644
--- a/arch/arm/mach-realview/include/mach/irqs.h
+++ b/arch/arm/mach-realview/include/mach/irqs.h
@@ -25,6 +25,7 @@
 #include <mach/board-eb.h>
 #include <mach/board-pb11mp.h>
 #include <mach/board-pb1176.h>
+#include <mach/board-pba8.h>
 
 #define IRQ_LOCALTIMER          29
 #define IRQ_LOCALWDOG           30
diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h
index 0e673483a141..293c30025e7e 100644
--- a/arch/arm/mach-realview/include/mach/memory.h
+++ b/arch/arm/mach-realview/include/mach/memory.h
@@ -23,16 +23,10 @@
 /*
  * Physical DRAM offset.
  */
+#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
+#define PHYS_OFFSET             UL(0x70000000)
+#else
 #define PHYS_OFFSET             UL(0x00000000)
-
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        ((x) - PAGE_OFFSET)
-#define __bus_to_virt(x)        ((x) + PAGE_OFFSET)
+#endif
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/uncompress.h b/arch/arm/mach-realview/include/mach/uncompress.h
index 79f50f218e77..415d634d52ab 100644
--- a/arch/arm/mach-realview/include/mach/uncompress.h
+++ b/arch/arm/mach-realview/include/mach/uncompress.h
@@ -23,6 +23,7 @@
 #include <mach/board-eb.h>
 #include <mach/board-pb11mp.h>
 #include <mach/board-pb1176.h>
+#include <mach/board-pba8.h>
 
 #define AMBA_UART_DR(base)      (*(volatile unsigned char *)((base) + 0x00))
 #define AMBA_UART_LCRH(base)    (*(volatile unsigned char *)((base) + 0x2c))
@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
                 return REALVIEW_PB11MP_UART0_BASE;
         else if (machine_is_realview_pb1176())
                 return REALVIEW_PB1176_UART0_BASE;
+        else if (machine_is_realview_pba8())
+                return REALVIEW_PBA8_UART0_BASE;
         else
                 return 0;
 }
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
index 48cbcc873db2..fe0de1b507ac 100644
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ b/arch/arm/mach-realview/include/mach/vmalloc.h
@@ -18,4 +18,4 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#define VMALLOC_END             (PAGE_OFFSET + 0x18000000)
+#define VMALLOC_END             0xf8000000
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index 44d178cd5733..67d6d9cc68b2 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -38,18 +38,14 @@ void local_timer_interrupt(void)
 
 #ifdef CONFIG_LOCAL_TIMERS
 
-#define TWD_BASE(cpu)   (twd_base_addr + (cpu) * twd_size)
-
 /* set up by the platform code */
-void __iomem *twd_base_addr;
-unsigned int twd_size;
+void __iomem *twd_base;
 
 static unsigned long mpcore_timer_rate;
 
 static void local_timer_set_mode(enum clock_event_mode mode,
                                  struct clock_event_device *clk)
 {
-        void __iomem *base = TWD_BASE(smp_processor_id());
         unsigned long ctrl;
 
         switch(mode) {
@@ -68,17 +64,16 @@ static void local_timer_set_mode(enum clock_event_mode mode,
                 ctrl = 0;
         }
 
-        __raw_writel(ctrl, base + TWD_TIMER_CONTROL);
+        __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
 }
 
 static int local_timer_set_next_event(unsigned long evt,
                                       struct clock_event_device *unused)
 {
-        void __iomem *base = TWD_BASE(smp_processor_id());
-        unsigned long ctrl = __raw_readl(base + TWD_TIMER_CONTROL);
+        unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
 
-        __raw_writel(evt, base + TWD_TIMER_COUNTER);
-        __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, base + TWD_TIMER_CONTROL);
+        __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
+        __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, twd_base + TWD_TIMER_CONTROL);
 
         return 0;
 }
@@ -91,19 +86,16 @@ static int local_timer_set_next_event(unsigned long evt,
  */
 int local_timer_ack(void)
 {
-        void __iomem *base = TWD_BASE(smp_processor_id());
-
-        if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
-                __raw_writel(1, base + TWD_TIMER_INTSTAT);
+        if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
+                __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
                 return 1;
         }
 
         return 0;
 }
 
-static void __cpuinit twd_calibrate_rate(unsigned int cpu)
+static void __cpuinit twd_calibrate_rate(void)
 {
-        void __iomem *base = TWD_BASE(cpu);
         unsigned long load, count;
         u64 waitjiffies;
 
@@ -124,15 +116,15 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
                 waitjiffies += 5;
 
                                  /* enable, no interrupt or reload */
-                __raw_writel(0x1, base + TWD_TIMER_CONTROL);
+                __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
 
                                  /* maximum value */
-                __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER);
+                __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
 
                 while (get_jiffies_64() < waitjiffies)
                         udelay(10);
 
-                count = __raw_readl(base + TWD_TIMER_COUNTER);
+                count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
 
                 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
 
@@ -142,18 +134,19 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
 
         load = mpcore_timer_rate / HZ;
 
-        __raw_writel(load, base + TWD_TIMER_LOAD);
+        __raw_writel(load, twd_base + TWD_TIMER_LOAD);
 }
 
 /*
  * Setup the local clock events for a CPU.
  */
-void __cpuinit local_timer_setup(unsigned int cpu)
+void __cpuinit local_timer_setup(void)
 {
+        unsigned int cpu = smp_processor_id();
         struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
         unsigned long flags;
 
-        twd_calibrate_rate(cpu);
+        twd_calibrate_rate();
 
         clk->name               = "local_timer";
         clk->features           = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
@@ -161,7 +154,7 @@ void __cpuinit local_timer_setup(unsigned int cpu)
         clk->set_mode           = local_timer_set_mode;
         clk->set_next_event     = local_timer_set_next_event;
         clk->irq                = IRQ_LOCALTIMER;
-        clk->cpumask            = cpumask_of_cpu(cpu);
+        clk->cpumask            = cpumask_of(cpu);
         clk->shift              = 20;
         clk->mult               = div_sc(mpcore_timer_rate, NSEC_PER_SEC, clk->shift);
         clk->max_delta_ns       = clockevent_delta2ns(0xffffffff, clk);
@@ -178,9 +171,9 @@ void __cpuinit local_timer_setup(unsigned int cpu)
 /*
  * take a local timer down
  */
-void __cpuexit local_timer_stop(unsigned int cpu)
+void __cpuexit local_timer_stop(void)
 {
-        __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL);
+        __raw_writel(0, twd_base + TWD_TIMER_CONTROL);
 }
 
 #else   /* CONFIG_LOCAL_TIMERS */
@@ -190,8 +183,9 @@ static void dummy_timer_set_mode(enum clock_event_mode mode,
 {
 }
 
-void __cpuinit local_timer_setup(unsigned int cpu)
+void __cpuinit local_timer_setup(void)
 {
+        unsigned int cpu = smp_processor_id();
         struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
 
         clk->name               = "dummy_timer";
@@ -199,7 +193,7 @@ void __cpuinit local_timer_setup(unsigned int cpu)
         clk->rating             = 200;
         clk->set_mode           = dummy_timer_set_mode;
         clk->broadcast          = smp_timer_broadcast;
-        clk->cpumask            = cpumask_of_cpu(cpu);
+        clk->cpumask            = cpumask_of(cpu);
 
         clockevents_register_device(clk);
 }
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index e102aeb0f76e..8fce85f33033 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -23,6 +23,8 @@
 #include <mach/board-pb11mp.h>
 #include <mach/scu.h>
 
+#include "core.h"
+
 extern void realview_secondary_startup(void);
 
 /*
@@ -31,15 +33,20 @@ extern void realview_secondary_startup(void);
  */
 volatile int __cpuinitdata pen_release = -1;
 
+static void __iomem *scu_base_addr(void)
+{
+        if (machine_is_realview_eb_mp())
+                return __io_address(REALVIEW_EB11MP_SCU_BASE);
+        else if (machine_is_realview_pb11mp())
+                return __io_address(REALVIEW_TC11MP_SCU_BASE);
+        else
+                return (void __iomem *)0;
+}
+
 static unsigned int __init get_core_count(void)
 {
         unsigned int ncores;
-        void __iomem *scu_base = 0;
-
-        if (machine_is_realview_eb() && core_tile_eb11mp())
-                scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
-        else if (machine_is_realview_pb11mp())
-                scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
+        void __iomem *scu_base = scu_base_addr();
 
         if (scu_base) {
                 ncores = __raw_readl(scu_base + SCU_CONFIG);
@@ -56,14 +63,7 @@ static unsigned int __init get_core_count(void)
 static void scu_enable(void)
 {
         u32 scu_ctrl;
-        void __iomem *scu_base;
-
-        if (machine_is_realview_eb() && core_tile_eb11mp())
-                scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
-        else if (machine_is_realview_pb11mp())
-                scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
-        else
-                BUG();
+        void __iomem *scu_base = scu_base_addr();
 
         scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
         scu_ctrl |= 1;
@@ -88,10 +88,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
          * core (e.g. timer irq), then they will not have been enabled
          * for us: do so
          */
-        if (machine_is_realview_eb() && core_tile_eb11mp())
-                gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
-        else if (machine_is_realview_pb11mp())
-                gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
+        gic_cpu_init(0, gic_cpu_base_addr);
 
         /*
          * let the primary processor know we're out of the
@@ -232,9 +229,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
          * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
          * realview_timer_init
          */
-        if ((machine_is_realview_eb() && core_tile_eb11mp()) ||
-            machine_is_realview_pb11mp())
-                local_timer_setup(cpu);
+        local_timer_setup();
 #endif
 
         /*
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index eb829eb1ebe2..bed39ed97613 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -108,7 +108,7 @@ static struct map_desc realview_eb11mp_io_desc[] __initdata = {
 static void __init realview_eb_map_io(void)
 {
         iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
-        if (core_tile_eb11mp())
+        if (core_tile_eb11mp() || core_tile_a9mp())
                 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
 }
 
@@ -242,12 +242,6 @@ static struct resource realview_eb_eth_resources[] = {
         },
 };
 
-static struct platform_device realview_eb_eth_device = {
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(realview_eb_eth_resources),
-        .resource       = realview_eb_eth_resources,
-};
-
 /*
  * Detect and register the correct Ethernet device. RealView/EB rev D
  * platforms use the newer SMSC LAN9118 Ethernet chip
@@ -255,26 +249,24 @@ static struct platform_device realview_eb_eth_device = {
 static int eth_device_register(void)
 {
         void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
+        const char *name = NULL;
         u32 idrev;
 
         if (!eth_addr)
                 return -ENOMEM;
 
         idrev = readl(eth_addr + 0x50);
-        if ((idrev & 0xFFFF0000) == 0x01180000)
-                /* SMSC LAN9118 chip present */
-                realview_eb_eth_device.name = "smc911x";
-        else
-                /* SMSC 91C111 chip present */
-                realview_eb_eth_device.name = "smc91x";
+        if ((idrev & 0xFFFF0000) != 0x01180000)
+                /* SMSC LAN9118 not present, use LAN91C111 instead */
+                name = "smc91x";
 
         iounmap(eth_addr);
-        return platform_device_register(&realview_eb_eth_device);
+        return realview_eth_register(name, realview_eb_eth_resources);
 }
 
 static void __init gic_init_irq(void)
 {
-        if (core_tile_eb11mp()) {
+        if (core_tile_eb11mp() || core_tile_a9mp()) {
                 unsigned int pldctrl;
 
                 /* new irq mode */
@@ -342,10 +334,9 @@ static void __init realview_eb_timer_init(void)
         timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
         timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
 
-        if (core_tile_eb11mp()) {
+        if (core_tile_eb11mp() || core_tile_a9mp()) {
 #ifdef CONFIG_LOCAL_TIMERS
-                twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
-                twd_size = REALVIEW_EB11MP_TWD_SIZE;
+                twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
 #endif
                 timer_irq = IRQ_EB11MP_TIMER0_1;
         } else
@@ -362,7 +353,7 @@ static void __init realview_eb_init(void)
 {
         int i;
 
-        if (core_tile_eb11mp()) {
+        if (core_tile_eb11mp() || core_tile_a9mp()) {
                 realview_eb11mp_fixup();
 
 #ifdef CONFIG_CACHE_L2X0
@@ -372,8 +363,6 @@ static void __init realview_eb_init(void)
 #endif
         }
 
-        clk_register(&realview_clcd_clk);
-
         realview_flash_register(&realview_eb_flash_resource, 1);
         platform_device_register(&realview_i2c_device);
         eth_device_register();
@@ -392,7 +381,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .phys_io        = REALVIEW_EB_UART0_BASE,
         .io_pg_offst    = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = PHYS_OFFSET + 0x00000100,
         .map_io         = realview_eb_map_io,
         .init_irq       = gic_init_irq,
         .timer          = &realview_eb_timer,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index cccdb3eb90fe..8f0683c22140 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -222,13 +222,6 @@ static struct resource realview_pb1176_smsc911x_resources[] = {
         },
 };
 
-static struct platform_device realview_pb1176_smsc911x_device = {
-        .name           = "smc911x",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(realview_pb1176_smsc911x_resources),
-        .resource       = realview_pb1176_smsc911x_resources,
-};
-
 static void __init gic_init_irq(void)
 {
         /* ARM1176 DevChip GIC, primary */
@@ -265,10 +258,8 @@ static void __init realview_pb1176_init(void)
         l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
 #endif
 
-        clk_register(&realview_clcd_clk);
-
         realview_flash_register(&realview_pb1176_flash_resource, 1);
-        platform_device_register(&realview_pb1176_smsc911x_device);
+        realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
 
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
@@ -284,7 +275,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .phys_io        = REALVIEW_PB1176_UART0_BASE,
         .io_pg_offst    = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = PHYS_OFFSET + 0x00000100,
         .map_io         = realview_pb1176_map_io,
         .init_irq       = gic_init_irq,
         .timer          = &realview_pb1176_timer,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 8b863148ec18..3ebdb2dadd6f 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -230,13 +230,6 @@ static struct resource realview_pb11mp_smsc911x_resources[] = {
         },
 };
 
-static struct platform_device realview_pb11mp_smsc911x_device = {
-        .name           = "smc911x",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(realview_pb11mp_smsc911x_resources),
-        .resource       = realview_pb11mp_smsc911x_resources,
-};
-
 struct resource realview_pb11mp_cf_resources[] = {
         [0] = {
                 .start          = REALVIEW_PB11MP_CF_BASE,
@@ -292,8 +285,7 @@ static void __init realview_pb11mp_timer_init(void)
         timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
 
 #ifdef CONFIG_LOCAL_TIMERS
-        twd_base_addr = __io_address(REALVIEW_TC11MP_TWD_BASE);
-        twd_size = REALVIEW_TC11MP_TWD_SIZE;
+        twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
 #endif
         realview_timer_init(IRQ_TC11MP_TIMER0_1);
 }
@@ -312,11 +304,9 @@ static void __init realview_pb11mp_init(void)
         l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
 #endif
 
-        clk_register(&realview_clcd_clk);
-
         realview_flash_register(realview_pb11mp_flash_resource,
                                 ARRAY_SIZE(realview_pb11mp_flash_resource));
-        platform_device_register(&realview_pb11mp_smsc911x_device);
+        realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
         platform_device_register(&realview_i2c_device);
         platform_device_register(&realview_pb11mp_cf_device);
 
@@ -334,7 +324,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .phys_io        = REALVIEW_PB11MP_UART0_BASE,
         .io_pg_offst    = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = PHYS_OFFSET + 0x00000100,
         .map_io         = realview_pb11mp_map_io,
         .init_irq       = gic_init_irq,
         .timer          = &realview_pb11mp_timer,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
new file mode 100644
index 000000000000..34c94435d2d8
--- /dev/null
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -0,0 +1,300 @@
+/*
+ *  linux/arch/arm/mach-realview/realview_pba8.c
+ *
+ *  Copyright (C) 2008 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/amba/bus.h>
+#include <linux/io.h>
+
+#include <asm/irq.h>
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware/icst307.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/mmc.h>
+#include <asm/mach/time.h>
+
+#include <mach/hardware.h>
+#include <mach/board-pba8.h>
+#include <mach/irqs.h>
+
+#include "core.h"
+#include "clock.h"
+
+static struct map_desc realview_pba8_io_desc[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+#ifdef CONFIG_PCI
+        {
+                .virtual        = PCIX_UNIT_BASE,
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
+                .length         = REALVIEW_PBA8_PCI_BASE_SIZE,
+                .type           = MT_DEVICE
+        },
+#endif
+#ifdef CONFIG_DEBUG_LL
+        {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+#endif
+};
+
+static void __init realview_pba8_map_io(void)
+{
+        iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
+}
+
+/*
+ * RealView PBA8Core AMBA devices
+ */
+
+#define GPIO2_IRQ               { IRQ_PBA8_GPIO2, NO_IRQ }
+#define GPIO2_DMA               { 0, 0 }
+#define GPIO3_IRQ               { IRQ_PBA8_GPIO3, NO_IRQ }
+#define GPIO3_DMA               { 0, 0 }
+#define AACI_IRQ                { IRQ_PBA8_AACI, NO_IRQ }
+#define AACI_DMA                { 0x80, 0x81 }
+#define MMCI0_IRQ               { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
+#define MMCI0_DMA               { 0x84, 0 }
+#define KMI0_IRQ                { IRQ_PBA8_KMI0, NO_IRQ }
+#define KMI0_DMA                { 0, 0 }
+#define KMI1_IRQ                { IRQ_PBA8_KMI1, NO_IRQ }
+#define KMI1_DMA                { 0, 0 }
+#define PBA8_SMC_IRQ            { NO_IRQ, NO_IRQ }
+#define PBA8_SMC_DMA            { 0, 0 }
+#define MPMC_IRQ                { NO_IRQ, NO_IRQ }
+#define MPMC_DMA                { 0, 0 }
+#define PBA8_CLCD_IRQ           { IRQ_PBA8_CLCD, NO_IRQ }
+#define PBA8_CLCD_DMA           { 0, 0 }
+#define DMAC_IRQ                { IRQ_PBA8_DMAC, NO_IRQ }
+#define DMAC_DMA                { 0, 0 }
+#define SCTL_IRQ                { NO_IRQ, NO_IRQ }
+#define SCTL_DMA                { 0, 0 }
+#define PBA8_WATCHDOG_IRQ       { IRQ_PBA8_WATCHDOG, NO_IRQ }
+#define PBA8_WATCHDOG_DMA       { 0, 0 }
+#define PBA8_GPIO0_IRQ          { IRQ_PBA8_GPIO0, NO_IRQ }
+#define PBA8_GPIO0_DMA          { 0, 0 }
+#define GPIO1_IRQ               { IRQ_PBA8_GPIO1, NO_IRQ }
+#define GPIO1_DMA               { 0, 0 }
+#define PBA8_RTC_IRQ            { IRQ_PBA8_RTC, NO_IRQ }
+#define PBA8_RTC_DMA            { 0, 0 }
+#define SCI_IRQ                 { IRQ_PBA8_SCI, NO_IRQ }
+#define SCI_DMA                 { 7, 6 }
+#define PBA8_UART0_IRQ          { IRQ_PBA8_UART0, NO_IRQ }
+#define PBA8_UART0_DMA          { 15, 14 }
+#define PBA8_UART1_IRQ          { IRQ_PBA8_UART1, NO_IRQ }
+#define PBA8_UART1_DMA          { 13, 12 }
+#define PBA8_UART2_IRQ          { IRQ_PBA8_UART2, NO_IRQ }
+#define PBA8_UART2_DMA          { 11, 10 }
+#define PBA8_UART3_IRQ          { IRQ_PBA8_UART3, NO_IRQ }
+#define PBA8_UART3_DMA          { 0x86, 0x87 }
+#define PBA8_SSP_IRQ            { IRQ_PBA8_SSP, NO_IRQ }
+#define PBA8_SSP_DMA            { 9, 8 }
+
+/* FPGA Primecells */
+AMBA_DEVICE(aaci,       "fpga:04",      AACI,           NULL);
+AMBA_DEVICE(mmc0,       "fpga:05",      MMCI0,          &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,       "fpga:06",      KMI0,           NULL);
+AMBA_DEVICE(kmi1,       "fpga:07",      KMI1,           NULL);
+AMBA_DEVICE(uart3,      "fpga:09",      PBA8_UART3,     NULL);
+
+/* DevChip Primecells */
+AMBA_DEVICE(smc,        "dev:00",       PBA8_SMC,       NULL);
+AMBA_DEVICE(sctl,       "dev:e0",       SCTL,           NULL);
+AMBA_DEVICE(wdog,       "dev:e1",       PBA8_WATCHDOG, NULL);
+AMBA_DEVICE(gpio0,      "dev:e4",       PBA8_GPIO0,     NULL);
+AMBA_DEVICE(gpio1,      "dev:e5",       GPIO1,          NULL);
+AMBA_DEVICE(gpio2,      "dev:e6",       GPIO2,          NULL);
+AMBA_DEVICE(rtc,        "dev:e8",       PBA8_RTC,       NULL);
+AMBA_DEVICE(sci0,       "dev:f0",       SCI,            NULL);
+AMBA_DEVICE(uart0,      "dev:f1",       PBA8_UART0,     NULL);
+AMBA_DEVICE(uart1,      "dev:f2",       PBA8_UART1,     NULL);
+AMBA_DEVICE(uart2,      "dev:f3",       PBA8_UART2,     NULL);
+AMBA_DEVICE(ssp0,       "dev:f4",       PBA8_SSP,       NULL);
+
+/* Primecells on the NEC ISSP chip */
+AMBA_DEVICE(clcd,       "issp:20",      PBA8_CLCD,      &clcd_plat_data);
+AMBA_DEVICE(dmac,       "issp:30",      DMAC,           NULL);
+
+static struct amba_device *amba_devs[] __initdata = {
+        &dmac_device,
+        &uart0_device,
+        &uart1_device,
+        &uart2_device,
+        &uart3_device,
+        &smc_device,
+        &clcd_device,
+        &sctl_device,
+        &wdog_device,
+        &gpio0_device,
+        &gpio1_device,
+        &gpio2_device,
+        &rtc_device,
+        &sci0_device,
+        &ssp0_device,
+        &aaci_device,
+        &mmc0_device,
+        &kmi0_device,
+        &kmi1_device,
+};
+
+/*
+ * RealView PB-A8 platform devices
+ */
+static struct resource realview_pba8_flash_resource[] = {
+        [0] = {
+                .start          = REALVIEW_PBA8_FLASH0_BASE,
+                .end            = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start          = REALVIEW_PBA8_FLASH1_BASE,
+                .end            = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct resource realview_pba8_smsc911x_resources[] = {
+        [0] = {
+                .start          = REALVIEW_PBA8_ETH_BASE,
+                .end            = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start          = IRQ_PBA8_ETH,
+                .end            = IRQ_PBA8_ETH,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+struct resource realview_pba8_cf_resources[] = {
+        [0] = {
+                .start          = REALVIEW_PBA8_CF_BASE,
+                .end            = REALVIEW_PBA8_CF_BASE + SZ_4K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start          = REALVIEW_PBA8_CF_MEM_BASE,
+                .end            = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start          = -1,           /* FIXME: Find correct irq */
+                .end            = -1,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device realview_pba8_cf_device = {
+        .name           = "compactflash",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(realview_pba8_cf_resources),
+        .resource       = realview_pba8_cf_resources,
+};
+
+static void __init gic_init_irq(void)
+{
+        /* ARM PB-A8 on-board GIC */
+        gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
+        gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
+        gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
+}
+
+static void __init realview_pba8_timer_init(void)
+{
+        timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
+        timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
+        timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
+        timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
+
+        realview_timer_init(IRQ_PBA8_TIMER0_1);
+}
+
+static struct sys_timer realview_pba8_timer = {
+        .init           = realview_pba8_timer_init,
+};
+
+static void __init realview_pba8_init(void)
+{
+        int i;
+
+        realview_flash_register(realview_pba8_flash_resource,
+                                ARRAY_SIZE(realview_pba8_flash_resource));
+        realview_eth_register(NULL, realview_pba8_smsc911x_resources);
+        platform_device_register(&realview_i2c_device);
+        platform_device_register(&realview_pba8_cf_device);
+
+        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+                struct amba_device *d = amba_devs[i];
+                amba_device_register(d, &iomem_resource);
+        }
+
+#ifdef CONFIG_LEDS
+        leds_event = realview_leds_event;
+#endif
+}
+
+MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
+        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
+        .phys_io        = REALVIEW_PBA8_UART0_BASE,
+        .io_pg_offst    = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x00000100,
+        .map_io         = realview_pba8_map_io,
+        .init_irq       = gic_init_irq,
+        .timer          = &realview_pba8_timer,
+        .init_machine   = realview_pba8_init,
+MACHINE_END
diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h
index 9f0553b7ec28..20da7f486e51 100644
--- a/arch/arm/mach-rpc/include/mach/io.h
+++ b/arch/arm/mach-rpc/include/mach/io.h
@@ -18,49 +18,6 @@
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
- * GCC is totally crap at loading/storing data.  We try to persuade it
- * to do the right thing by using these whereever possible instead of
- * the above.
- */
-#define __arch_base_getb(b,o)                   \
- ({                                             \
-        unsigned int __v, __r = (b);            \
-        __asm__ __volatile__(                   \
-                "ldrb   %0, [%1, %2]"           \
-                : "=r" (__v)                    \
-                : "r" (__r), "Ir" (o));         \
-        __v;                                    \
- })
-
-#define __arch_base_getl(b,o)                   \
- ({                                             \
-        unsigned int __v, __r = (b);            \
-        __asm__ __volatile__(                   \
-                "ldr    %0, [%1, %2]"           \
-                : "=r" (__v)                    \
-                : "r" (__r), "Ir" (o));         \
-        __v;                                    \
- })
-
-#define __arch_base_putb(v,b,o)                 \
- ({                                             \
-        unsigned int __r = (b);                 \
-        __asm__ __volatile__(                   \
-                "strb   %0, [%1, %2]"           \
-                :                               \
-                : "r" (v), "r" (__r), "Ir" (o));\
- })
-
-#define __arch_base_putl(v,b,o)                 \
- ({                                             \
-        unsigned int __r = (b);                 \
-        __asm__ __volatile__(                   \
-                "str    %0, [%1, %2]"           \
-                :                               \
-                : "r" (v), "r" (__r), "Ir" (o));\
- })
-
-/*
  * We use two different types of addressing - PC style addresses, and ARM
  * addresses.  PC style accesses the PC hardware with the normal PC IO
  * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
@@ -232,15 +189,13 @@ DECLARE_IO(int,l,"")
         result;                                                                 \
 })
 
-#define __ioaddrc(port)         __ioaddr(port)
-
 #define inb(p)          (__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
 #define inw(p)          (__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
 #define inl(p)          (__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
 #define outb(v,p)       (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
 #define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
 #define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
-#define __ioaddr(p)     (__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
+
 /* the following macro is deprecated */
 #define ioaddr(port)    ((unsigned long)__ioaddr((port)))
 
diff --git a/arch/arm/mach-rpc/include/mach/irqs.h b/arch/arm/mach-rpc/include/mach/irqs.h
index 4ce6ca97f669..3d2037496e38 100644
--- a/arch/arm/mach-rpc/include/mach/irqs.h
+++ b/arch/arm/mach-rpc/include/mach/irqs.h
@@ -44,3 +44,4 @@
 
 #define IRQ_TIMER               IRQ_TIMER0
 
+#define NR_IRQS                 128
diff --git a/arch/arm/mach-rpc/include/mach/dma.h b/arch/arm/mach-rpc/include/mach/isa-dma.h
index 360b56f8f29f..bad720548587 100644
--- a/arch/arm/mach-rpc/include/mach/dma.h
+++ b/arch/arm/mach-rpc/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-rpc/include/mach/dma.h
+ *  arch/arm/mach-rpc/include/mach/isa-dma.h
  *
  *  Copyright (C) 1997 Russell King
  *
@@ -10,12 +10,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-/*
- * This is the maximum DMA address that can be DMAd to.
- * There should not be more than (0xd0000000 - 0xc0000000)
- * bytes of RAM.
- */
-#define MAX_DMA_ADDRESS         0xd0000000
 #define MAX_DMA_CHANNELS        8
 
 #define DMA_0                   0
diff --git a/arch/arm/mach-rpc/include/mach/memory.h b/arch/arm/mach-rpc/include/mach/memory.h
index 9bf7e43e2863..78191bf25192 100644
--- a/arch/arm/mach-rpc/include/mach/memory.h
+++ b/arch/arm/mach-rpc/include/mach/memory.h
@@ -24,13 +24,6 @@
 #define PHYS_OFFSET     UL(0x10000000)
 
 /*
- * These are exactly the same on the RiscPC as the
- * physical memory view.
- */
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
-/*
  * Cache flushing area - ROM
  */
 #define FLUSH_BASE_PHYS         0x00000000
diff --git a/arch/arm/mach-s3c2400/include/mach/memory.h b/arch/arm/mach-s3c2400/include/mach/memory.h
index 8f4878e4f591..cf5901ffd385 100644
--- a/arch/arm/mach-s3c2400/include/mach/memory.h
+++ b/arch/arm/mach-s3c2400/include/mach/memory.h
@@ -17,7 +17,4 @@
 
 #define PHYS_OFFSET     UL(0x0C000000)
 
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 99fdc736698c..63a30d1dd425 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -7,6 +7,7 @@
 config CPU_S3C2410
         bool
         depends on ARCH_S3C2410
+        select CPU_ARM920T
         select S3C2410_CLOCK
         select S3C2410_GPIO
         select CPU_LLSERIAL_S3C2410
@@ -32,11 +33,6 @@ config S3C2410_GPIO
         help
           GPIO code for S3C2410 and similar processors
 
-config S3C2410_CLOCK
-        bool
-        help
-          Clock code for the S3C2410, and similar processors
-
 config SIMTEC_NOR
         bool
         help
@@ -84,6 +80,7 @@ config ARCH_BAST
         select PM_SIMTEC if PM
         select SIMTEC_NOR
         select MACH_BAST_IDE
+        select S3C24XX_DCLK
         select ISA
         help
           Say Y here if you are using the Simtec Electronics EB2410ITX
@@ -121,6 +118,7 @@ config MACH_TCT_HAMMER
 config MACH_VR1000
         bool "Thorcom VR1000"
         select PM_SIMTEC if PM
+        select S3C24XX_DCLK
         select SIMTEC_NOR
         select MACH_BAST_IDE
         select CPU_S3C2410
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 00f31f8c4e78..fca02f82711c 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_CPU_S3C2410_DMA)	+= dma.o
 obj-$(CONFIG_CPU_S3C2410_DMA)   += dma.o
 obj-$(CONFIG_S3C2410_PM)        += pm.o sleep.o
 obj-$(CONFIG_S3C2410_GPIO)      += gpio.o
-obj-$(CONFIG_S3C2410_CLOCK)     += clock.o
 
 # Machine support
 
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 7d914a470b6c..552b4c778fdc 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -17,7 +17,6 @@
 #include <linux/sysdev.h>
 #include <linux/serial_core.h>
 
-#include <asm/dma.h>
 #include <mach/dma.h>
 
 #include <plat/cpu.h>
@@ -25,12 +24,12 @@
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c/regs-ac97.h>
+#include <plat/regs-ac97.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
         [DMACH_XD0] = {
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index 891b53cd69b8..13358ce2128c 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -16,11 +16,6 @@
 #include <linux/sysdev.h>
 #include <mach/hardware.h>
 
-/*
- * This is the maximum DMA address(physical address) that can be DMAd to.
- *
- */
-#define MAX_DMA_ADDRESS         0x40000000
 #define MAX_DMA_TRANSFER_SIZE   0x100000 /* Data Unit is half word  */
 
 /* We use `virtual` dma channels to hide the fact we have only a limited
@@ -254,7 +249,7 @@ typedef unsigned long dma_device_t;
  * request a dma channel exclusivley
 */
 
-extern int s3c2410_dma_request(dmach_t channel,
+extern int s3c2410_dma_request(unsigned int channel,
                                struct s3c2410_dma_client *, void *dev);
 
 
@@ -263,14 +258,14 @@ extern int s3c2410_dma_request(dmach_t channel,
  * change the state of the dma channel
 */
 
-extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op);
+extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);
 
 /* s3c2410_dma_setflags
  *
  * set the channel's flags to a given state
 */
 
-extern int s3c2410_dma_setflags(dmach_t channel,
+extern int s3c2410_dma_setflags(unsigned int channel,
                                 unsigned int flags);
 
 /* s3c2410_dma_free
@@ -278,7 +273,7 @@ extern int s3c2410_dma_setflags(dmach_t channel,
  * free the dma channel (will also abort any outstanding operations)
 */
 
-extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *);
+extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);
 
 /* s3c2410_dma_enqueue
  *
@@ -287,7 +282,7 @@ extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *);
  * drained before the buffer is given to the DMA system.
 */
 
-extern int s3c2410_dma_enqueue(dmach_t channel, void *id,
+extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
                                dma_addr_t data, int size);
 
 /* s3c2410_dma_config
@@ -295,7 +290,7 @@ extern int s3c2410_dma_enqueue(dmach_t channel, void *id,
  * configure the dma channel
 */
 
-extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon);
+extern int s3c2410_dma_config(unsigned int channel, int xferunit, int dcon);
 
 /* s3c2410_dma_devconfig
  *
@@ -310,11 +305,11 @@ extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
  * get the position that the dma transfer is currently at
 */
 
-extern int s3c2410_dma_getposition(dmach_t channel,
+extern int s3c2410_dma_getposition(unsigned int channel,
                                    dma_addr_t *src, dma_addr_t *dest);
 
-extern int s3c2410_dma_set_opfn(dmach_t, s3c2410_dma_opfn_t rtn);
-extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn);
+extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
+extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);
 
 /* DMA Register definitions */
 
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-core.h b/arch/arm/mach-s3c2410/include/mach/gpio-core.h
new file mode 100644
index 000000000000..6c9fbb99ef14
--- /dev/null
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-core.h
@@ -0,0 +1,34 @@
+/* arch/arm/mach-s3c24100/include/mach/gpio-core.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C2410 - GPIO core support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_CORE_H
+#define __ASM_ARCH_GPIO_CORE_H __FILE__
+
+#include <plat/gpio-core.h>
+#include <mach/regs-gpio.h>
+
+extern struct s3c_gpio_chip s3c24xx_gpios[];
+
+static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin)
+{
+        struct s3c_gpio_chip *chip;
+
+        if (pin > S3C2410_GPG10)
+                return NULL;
+
+        chip = &s3c24xx_gpios[pin/32];
+        return (S3C2410_GPIO_OFFSET(pin) > chip->chip.ngpio) ? chip : NULL;
+}
+
+#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio.h b/arch/arm/mach-s3c2410/include/mach/gpio.h
index 3b52b86498a6..e0349af8a483 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio.h
@@ -15,4 +15,10 @@
 #define gpio_set_value  __gpio_set_value
 #define gpio_cansleep   __gpio_cansleep
 
+/* some boards require extra gpio capacity to support external
+ * devices that need GPIO.
+ */
+
+#define ARCH_NR_GPIOS   (256 + CONFIG_S3C24XX_GPIO_EXTRA)
+
 #include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h
index 950c71bf1489..9565903d490b 100644
--- a/arch/arm/mach-s3c2410/include/mach/irqs.h
+++ b/arch/arm/mach-s3c2410/include/mach/irqs.h
@@ -134,6 +134,8 @@
 #define IRQ_S3C2443_HSMMC       S3C2410_IRQ(20)         /* IRQ_SDI */
 #define IRQ_S3C2443_NAND        S3C2410_IRQ(24)         /* reserved */
 
+#define IRQ_HSMMC0              IRQ_S3C2443_HSMMC
+
 #define IRQ_S3C2443_LCD1        S3C2410_IRQSUB(14)
 #define IRQ_S3C2443_LCD2        S3C2410_IRQSUB(15)
 #define IRQ_S3C2443_LCD3        S3C2410_IRQSUB(16)
@@ -160,6 +162,12 @@
 #define NR_IRQS (IRQ_S3C2440_AC97+1)
 #endif
 
+/* compatibility define. */
+#define IRQ_UART3               IRQ_S3C2443_UART3
+#define IRQ_S3CUART_RX3         IRQ_S3C2443_RX3
+#define IRQ_S3CUART_TX3         IRQ_S3C2443_TX3
+#define IRQ_S3CUART_ERR3        IRQ_S3C2443_ERR3
+
 /* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */
 #define FIQ_START               IRQ_EINT0
 
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 23c470c2e5b1..255fdfeaf957 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -13,34 +13,20 @@
 #ifndef __ASM_ARCH_MAP_H
 #define __ASM_ARCH_MAP_H
 
+#include <plat/map-base.h>
 #include <plat/map.h>
 
 #define S3C2410_ADDR(x)         S3C_ADDR(x)
 
-/* interrupt controller is the first thing we put in, to make
- * the assembly code for the irq detection easier
- */
-#define S3C24XX_VA_IRQ     S3C_VA_IRQ
-#define S3C2410_PA_IRQ     (0x4A000000)
-#define S3C24XX_SZ_IRQ     SZ_1M
-
-/* memory controller registers */
-#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
-#define S3C2410_PA_MEMCTRL (0x48000000)
-#define S3C24XX_SZ_MEMCTRL SZ_1M
-
 /* USB host controller */
 #define S3C2410_PA_USBHOST (0x49000000)
-#define S3C24XX_SZ_USBHOST SZ_1M
 
 /* DMA controller */
 #define S3C2410_PA_DMA     (0x4B000000)
 #define S3C24XX_SZ_DMA     SZ_1M
 
 /* Clock and Power management */
-#define S3C24XX_VA_CLKPWR  S3C_VA_SYS
 #define S3C2410_PA_CLKPWR  (0x4C000000)
-#define S3C24XX_SZ_CLKPWR  SZ_1M
 
 /* LCD controller */
 #define S3C2410_PA_LCD     (0x4D000000)
@@ -48,48 +34,12 @@
 
 /* NAND flash controller */
 #define S3C2410_PA_NAND    (0x4E000000)
-#define S3C24XX_SZ_NAND    SZ_1M
-
-/* UARTs */
-#define S3C24XX_VA_UART    S3C_VA_UART
-#define S3C2410_PA_UART    (0x50000000)
-#define S3C24XX_SZ_UART    SZ_1M
-
-/* Timers */
-#define S3C24XX_VA_TIMER   S3C_VA_TIMER
-#define S3C2410_PA_TIMER   (0x51000000)
-#define S3C24XX_SZ_TIMER   SZ_1M
-
-/* USB Device port */
-#define S3C2410_PA_USBDEV  (0x52000000)
-#define S3C24XX_SZ_USBDEV  SZ_1M
-
-/* Watchdog */
-#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
-#define S3C2410_PA_WATCHDOG (0x53000000)
-#define S3C24XX_SZ_WATCHDOG SZ_1M
 
 /* IIC hardware controller */
 #define S3C2410_PA_IIC     (0x54000000)
-#define S3C24XX_SZ_IIC     SZ_1M
 
 /* IIS controller */
 #define S3C2410_PA_IIS     (0x55000000)
-#define S3C24XX_SZ_IIS     SZ_1M
-
-/* GPIO ports */
-
-/* the calculation for the VA of this must ensure that
- * it is the same distance apart from the UART in the
- * phsyical address space, as the initial mapping for the IO
- * is done as a 1:1 maping. This puts it (currently) at
- * 0xFA800000, which is not in the way of any current mapping
- * by the base system.
-*/
-
-#define S3C2410_PA_GPIO    (0x56000000)
-#define S3C24XX_VA_GPIO    ((S3C2410_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
-#define S3C24XX_SZ_GPIO    SZ_1M
 
 /* RTC */
 #define S3C2410_PA_RTC     (0x57000000)
@@ -97,15 +47,12 @@
 
 /* ADC */
 #define S3C2410_PA_ADC     (0x58000000)
-#define S3C24XX_SZ_ADC     SZ_1M
 
 /* SPI */
 #define S3C2410_PA_SPI     (0x59000000)
-#define S3C24XX_SZ_SPI     SZ_1M
 
 /* SDI */
 #define S3C2410_PA_SDI     (0x5A000000)
-#define S3C24XX_SZ_SDI     SZ_1M
 
 /* CAMIF */
 #define S3C2440_PA_CAMIF   (0x4F000000)
@@ -120,13 +67,6 @@
 #define S3C2443_PA_HSMMC   (0x4A800000)
 #define S3C2443_SZ_HSMMC   (256)
 
-/* ISA style IO, for each machine to sort out mappings for, if it
- * implements it. We reserve two 16M regions for ISA.
- */
-
-#define S3C24XX_VA_ISA_WORD  S3C2410_ADDR(0x02000000)
-#define S3C24XX_VA_ISA_BYTE  S3C2410_ADDR(0x03000000)
-
 /* physical addresses of all the chip-select areas */
 
 #define S3C2410_CS0 (0x00000000)
@@ -152,27 +92,16 @@
 #define S3C24XX_PA_TIMER    S3C2410_PA_TIMER
 #define S3C24XX_PA_USBDEV   S3C2410_PA_USBDEV
 #define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
-#define S3C24XX_PA_IIC      S3C2410_PA_IIC
 #define S3C24XX_PA_IIS      S3C2410_PA_IIS
 #define S3C24XX_PA_GPIO     S3C2410_PA_GPIO
 #define S3C24XX_PA_RTC      S3C2410_PA_RTC
 #define S3C24XX_PA_ADC      S3C2410_PA_ADC
 #define S3C24XX_PA_SPI      S3C2410_PA_SPI
+#define S3C24XX_PA_SDI      S3C2410_PA_SDI
+#define S3C24XX_PA_NAND     S3C2410_PA_NAND
 
-/* deal with the registers that move under the 2412/2413 */
-
-#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
-#ifndef __ASSEMBLY__
-extern void __iomem *s3c24xx_va_gpio2;
-#endif
-#ifdef CONFIG_CPU_S3C2412_ONLY
-#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
-#else
-#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
-#endif
-#else
-#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
-#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
-#endif
+#define S3C_PA_IIC          S3C2410_PA_IIC
+#define S3C_PA_UART         S3C24XX_PA_UART
+#define S3C_PA_HSMMC0       S3C2443_PA_HSMMC
 
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/memory.h b/arch/arm/mach-s3c2410/include/mach/memory.h
index 93782628a786..6f1e5871ae4b 100644
--- a/arch/arm/mach-s3c2410/include/mach/memory.h
+++ b/arch/arm/mach-s3c2410/include/mach/memory.h
@@ -13,7 +13,4 @@
 
 #define PHYS_OFFSET     UL(0x30000000)
 
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-clock.h
index b3f90aa78076..2a5d90e957fb 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-clock.h
@@ -42,13 +42,6 @@
 #define S3C2410_CLKCON_IIS           (1<<17)
 #define S3C2410_CLKCON_SPI           (1<<18)
 
-#define S3C2410_PLLCON_MDIVSHIFT     12
-#define S3C2410_PLLCON_PDIVSHIFT     4
-#define S3C2410_PLLCON_SDIVSHIFT     0
-#define S3C2410_PLLCON_MDIVMASK      ((1<<(1+(19-12)))-1)
-#define S3C2410_PLLCON_PDIVMASK      ((1<<5)-1)
-#define S3C2410_PLLCON_SDIVMASK      3
-
 /* DCLKCON register addresses in gpio.h */
 
 #define S3C2410_DCLKCON_DCLK0EN      (1<<0)
@@ -76,32 +69,6 @@
 #define S3C2410_CLKSLOW_SLOWVAL(x)      (x)
 #define S3C2410_CLKSLOW_GET_SLOWVAL(x)  ((x) & 7)
 
-#ifndef __ASSEMBLY__
-
-#include <asm/div64.h>
-
-static inline unsigned int
-s3c2410_get_pll(unsigned int pllval, unsigned int baseclk)
-{
-        unsigned int mdiv, pdiv, sdiv;
-        uint64_t fvco;
-
-        mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT;
-        pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT;
-        sdiv = pllval >> S3C2410_PLLCON_SDIVSHIFT;
-
-        mdiv &= S3C2410_PLLCON_MDIVMASK;
-        pdiv &= S3C2410_PLLCON_PDIVMASK;
-        sdiv &= S3C2410_PLLCON_SDIVMASK;
-
-        fvco = (uint64_t)baseclk * (mdiv + 8);
-        do_div(fvco, (pdiv + 2) << sdiv);
-
-        return (unsigned int)fvco;
-}
-
-#endif /* __ASSEMBLY__ */
-
 #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
 
 /* extra registers */
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index 528080ceac44..321077613067 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -1053,13 +1053,6 @@
 #define S3C24XX_EXTINT1    S3C24XX_GPIOREG2(0x8C)
 #define S3C24XX_EXTINT2    S3C24XX_GPIOREG2(0x90)
 
-/* values for S3C2410_EXTINT0/1/2 */
-#define S3C2410_EXTINT_LOWLEV    (0x00)
-#define S3C2410_EXTINT_HILEV     (0x01)
-#define S3C2410_EXTINT_FALLEDGE  (0x02)
-#define S3C2410_EXTINT_RISEEDGE  (0x04)
-#define S3C2410_EXTINT_BOTHEDGE  (0x06)
-
 /* interrupt filtering conrrol for EINT16..EINT23 */
 #define S3C2410_EINFLT0    S3C2410_GPIOREG(0x94)
 #define S3C2410_EINFLT1    S3C2410_GPIOREG(0x98)
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h b/arch/arm/mach-s3c2410/include/mach/spi.h
index 46d46f5b99f2..1d300fb112b1 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi.h
@@ -14,7 +14,7 @@
 #define __ASM_ARCH_SPI_H __FILE__
 
 struct s3c2410_spi_info {
-        unsigned long            pin_cs;        /* simple gpio cs */
+        int                      pin_cs;        /* simple gpio cs */
         unsigned int             num_cs;        /* total chipselects */
         int                      bus_num;       /* bus number to use. */
 
@@ -22,5 +22,12 @@ struct s3c2410_spi_info {
         void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
 };
 
+/* Standard setup / suspend routines for SPI GPIO pins. */
+
+extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
+                                                 int enable);
+
+extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
+                                              int enable);
 
 #endif /* __ASM_ARCH_SPI_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
index 43535a0e7186..7613d0a384ba 100644
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ b/arch/arm/mach-s3c2410/include/mach/system-reset.h
@@ -13,7 +13,7 @@
 #include <mach/hardware.h>
 #include <linux/io.h>
 
-#include <asm/plat-s3c/regs-watchdog.h>
+#include <plat/regs-watchdog.h>
 #include <mach/regs-clock.h>
 
 #include <linux/clk.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/tick.h b/arch/arm/mach-s3c2410/include/mach/tick.h
new file mode 100644
index 000000000000..544da41979db
--- /dev/null
+++ b/arch/arm/mach-s3c2410/include/mach/tick.h
@@ -0,0 +1,15 @@
+/* linux/arch/arm/mach-s3c2410/include/mach/tick.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C2410 - timer tick support
+ */
+
+#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0))
+
+static inline int s3c24xx_ostimer_pending(void)
+{
+        return __raw_readl(S3C2410_SRCPND) & SRCPND_TIMER4;
+}
diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c2410/include/mach/uncompress.h
index ab39491beee2..c9432103750d 100644
--- a/arch/arm/mach-s3c2410/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c2410/include/mach/uncompress.h
@@ -1,3 +1,4 @@
+
 /* arch/arm/mach-s3c2410/include/mach/uncompress.h
  *
  * Copyright (c) 2003, 2007 Simtec Electronics
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index d061fea01900..6d6995afeb43 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -52,6 +52,7 @@
 #include <mach/regs-lcd.h>
 #include <mach/regs-gpio.h>
 
+#include <plat/iic.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 
@@ -150,7 +151,7 @@ static struct platform_device *amlm5900_devices[] __initdata = {
 #endif
         &s3c_device_adc,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_usb,
         &s3c_device_rtc,
         &s3c_device_usbgadget,
@@ -233,6 +234,7 @@ static void __init amlm5900_init(void)
 #ifdef CONFIG_FB_S3C2410
         s3c24xx_fb_set_platdata(&amlm5900_fb_info);
 #endif
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices));
 }
 
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 8db9c700e3c2..01bd76725b92 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -44,8 +44,8 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 
-#include <asm/plat-s3c/nand.h>
-#include <asm/plat-s3c/iic.h>
+#include <plat/nand.h>
+#include <plat/iic.h>
 #include <mach/fb.h>
 
 #include <linux/mtd/mtd.h>
@@ -406,7 +406,7 @@ static struct platform_device bast_sio = {
  * standard 100KHz i2c bus frequency
 */
 
-static struct s3c2410_platform_i2c bast_i2c_info = {
+static struct s3c2410_platform_i2c __initdata bast_i2c_info = {
         .flags          = 0,
         .slave_addr     = 0x10,
         .bus_freq       = 100*1000,
@@ -553,7 +553,7 @@ static struct platform_device *bast_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_rtc,
         &s3c_device_nand,
         &bast_device_dm9k,
@@ -588,7 +588,8 @@ static void __init bast_map_io(void)
         s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));
 
         s3c_device_nand.dev.platform_data = &bast_nand_info;
-        s3c_device_i2c.dev.platform_data = &bast_i2c_info;
+
+        s3c_i2c0_set_platdata(&bast_i2c_info);
 
         s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
         s3c24xx_init_clocks(0);
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 98716d0108e9..821a1668c3ac 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -38,11 +38,13 @@
 #include <mach/h1940.h>
 #include <mach/h1940-latch.h>
 #include <mach/fb.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
+#include <plat/iic.h>
 
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/pll.h>
 #include <plat/pm.h>
 
 static struct map_desc h1940_iodesc[] __initdata = {
@@ -183,7 +185,7 @@ static struct platform_device *h1940_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_usbgadget,
         &s3c_device_leds,
@@ -215,6 +217,7 @@ static void __init h1940_init(void)
 
         s3c24xx_fb_set_platdata(&h1940_fb_info);
         s3c24xx_udc_set_platdata(&h1940_udc_cfg);
+        s3c_i2c0_set_platdata(NULL);
 
         /* Turn off suspend on both USB ports, and switch the
          * selectable USB port to USB device mode. */
@@ -223,10 +226,9 @@ static void __init h1940_init(void)
                               S3C2410_MISCCR_USBSUSPND0 |
                               S3C2410_MISCCR_USBSUSPND1, 0x0);
 
-        tmp = (
-                 0x78 << S3C2410_PLLCON_MDIVSHIFT)
-              | (0x02 << S3C2410_PLLCON_PDIVSHIFT)
-              | (0x03 << S3C2410_PLLCON_SDIVSHIFT);
+        tmp =   (0x78 << S3C24XX_PLLCON_MDIVSHIFT)
+              | (0x02 << S3C24XX_PLLCON_PDIVSHIFT)
+              | (0x03 << S3C24XX_PLLCON_SDIVSHIFT);
         writel(tmp, S3C2410_UPLLCON);
 
         platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices));
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 82505517846c..05a5e877b49b 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -17,7 +17,6 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 
-#include <linux/delay.h>
 #include <linux/gpio_keys.h>
 #include <linux/init.h>
 #include <linux/input.h>
@@ -40,14 +39,14 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/map.h>
 
-#include <asm/plat-s3c/iic.h>
+#include <plat/iic.h>
 #include <plat/regs-serial.h>
 
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/s3c2410.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
 
 static struct map_desc n30_iodesc[] __initdata = {
         /* nothing here yet */
@@ -320,7 +319,7 @@ static struct s3c2410fb_mach_info n30_fb_info __initdata = {
 static struct platform_device *n30_devices[] __initdata = {
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_usb,
         &s3c_device_usbgadget,
@@ -332,7 +331,7 @@ static struct platform_device *n30_devices[] __initdata = {
 static struct platform_device *n35_devices[] __initdata = {
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_usbgadget,
         &n35_button_device,
@@ -501,7 +500,7 @@ static void __init n30_init_irq(void)
 static void __init n30_init(void)
 {
         s3c24xx_fb_set_platdata(&n30_fb_info);
-        s3c_device_i2c.dev.platform_data = &n30_i2ccfg;
+        s3c_device_i2c0.dev.platform_data = &n30_i2ccfg;
         s3c24xx_udc_set_platdata(&n30_udc_cfg);
 
         /* Turn off suspend on both USB ports, and switch the
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index d8255cf87e44..f6c7261a4a12 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -35,6 +35,7 @@
 #include <plat/s3c2410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
+#include <plat/iic.h>
 #include <plat/cpu.h>
 
 static struct map_desc otom11_iodesc[] __initdata = {
@@ -94,7 +95,7 @@ static struct platform_device *otom11_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_rtc,
         &otom_device_nor,
@@ -109,6 +110,7 @@ static void __init otom11_map_io(void)
 
 static void __init otom11_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(otom11_devices, ARRAY_SIZE(otom11_devices));
 }
 
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 661807e14e8a..9678a53ceeb1 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -50,10 +50,11 @@
 #include <mach/leds-gpio.h>
 #include <plat/regs-serial.h>
 #include <mach/fb.h>
-#include <asm/plat-s3c/nand.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/nand.h>
+#include <plat/udc.h>
 #include <mach/spi.h>
 #include <mach/spi-gpio.h>
+#include <plat/iic.h>
 
 #include <plat/common-smdk.h>
 #include <plat/devs.h>
@@ -247,7 +248,7 @@ static struct platform_device *qt2410_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_sdi,
         &s3c_device_usbgadget,
@@ -349,6 +350,7 @@ static void __init qt2410_machine_init(void)
         s3c2410_gpio_setpin(S3C2410_GPB0, 1);
 
         s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
+        s3c_i2c0_set_platdata(NULL);
 
         s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
 
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index 152527bb2872..c49126ccb1d5 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -47,6 +47,7 @@
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
+#include <plat/iic.h>
 
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -89,7 +90,7 @@ static struct platform_device *smdk2410_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
 };
 
@@ -102,6 +103,7 @@ static void __init smdk2410_map_io(void)
 
 static void __init smdk2410_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(smdk2410_devices, ARRAY_SIZE(smdk2410_devices));
         smdk_machine_init();
 }
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index 309dcf4c870a..8fdb0430bd48 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -45,6 +45,7 @@
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
+#include <plat/iic.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 
@@ -127,7 +128,7 @@ static struct s3c2410_uartcfg tct_hammer_uartcfgs[] = {
 static struct platform_device *tct_hammer_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_usb,
         &s3c_device_rtc,
         &s3c_device_usbgadget,
@@ -146,6 +147,7 @@ static void __init tct_hammer_map_io(void)
 
 static void __init tct_hammer_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(tct_hammer_devices, ARRAY_SIZE(tct_hammer_devices));
 }
 
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 941353af16dc..61a1ea9c5c5c 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -47,6 +47,7 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/iic.h>
 
 #include "usb-simtec.h"
 #include "nor-simtec.h"
@@ -334,7 +335,7 @@ static struct platform_device *vr1000_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_adc,
         &serial_device,
         &vr1000_dm9k0,
@@ -384,6 +385,7 @@ static void __init vr1000_map_io(void)
 
 static void __init vr1000_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
 
         i2c_register_board_info(0, vr1000_i2c_devs,
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index ac79b536c4c3..feb141b1f915 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -16,6 +16,7 @@
 #include <linux/list.h>
 #include <linux/timer.h>
 #include <linux/init.h>
+#include <linux/clk.h>
 #include <linux/sysdev.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
@@ -28,6 +29,8 @@
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
+#include <plat/cpu-freq.h>
+
 #include <mach/regs-clock.h>
 #include <plat/regs-serial.h>
 
@@ -35,6 +38,7 @@
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
+#include <plat/pll.h>
 
 /* Initial IO mappings */
 
@@ -59,25 +63,28 @@ void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  * machine specific initialisation.
 */
 
-void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size)
+void __init s3c2410_map_io(void)
 {
-        /* register our io-tables */
-
         iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
-        iotable_init(mach_desc, mach_size);
 }
 
-void __init s3c2410_init_clocks(int xtal)
+void __init_or_cpufreq s3c2410_setup_clocks(void)
 {
+        struct clk *xtal_clk;
         unsigned long tmp;
+        unsigned long xtal;
         unsigned long fclk;
         unsigned long hclk;
         unsigned long pclk;
 
+        xtal_clk = clk_get(NULL, "xtal");
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
         /* now we've got our machine bits initialised, work out what
          * clocks we've got */
 
-        fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
+        fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
 
         tmp = __raw_readl(S3C2410_CLKDIVN);
 
@@ -95,7 +102,13 @@ void __init s3c2410_init_clocks(int xtal)
          * console to use them
          */
 
-        s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
+        s3c24xx_setup_clocks(fclk, hclk, pclk);
+}
+
+void __init s3c2410_init_clocks(int xtal)
+{
+        s3c24xx_register_baseclocks(xtal);
+        s3c2410_setup_clocks();
         s3c2410_baseclk_add();
 }
 
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c59a9d2ee9a6..ca99564ae4b5 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -7,6 +7,7 @@
 config CPU_S3C2412
         bool
         depends on ARCH_S3C2410
+        select CPU_ARM926T
         select CPU_LLSERIAL_S3C2440
         select S3C2412_PM if PM
         select S3C2412_DMA if S3C2410_DMA
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 96d9eb15424f..a037df5e1c2d 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -93,12 +93,6 @@ static int s3c2412_upll_enable(struct clk *clk, int enable)
 
 /* clock selections */
 
-/* CPU EXTCLK input */
-static struct clk clk_ext = {
-        .name           = "extclk",
-        .id             = -1,
-};
-
 static struct clk clk_erefclk = {
         .name           = "erefclk",
         .id             = -1,
@@ -773,5 +767,6 @@ int __init s3c2412_baseclk_add(void)
                 s3c2412_clkcon_enable(clkp, 0);
         }
 
+        s3c_pwmclk_init();
         return 0;
 }
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index ba0591e71f32..919856c9433f 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -18,7 +18,6 @@
 #include <linux/serial_core.h>
 #include <linux/io.h>
 
-#include <asm/dma.h>
 #include <mach/dma.h>
 
 #include <plat/dma.h>
@@ -26,13 +25,13 @@
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c/regs-ac97.h>
+#include <plat/regs-ac97.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
 
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index b08f18c8c47a..ecddbbb34832 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -17,7 +17,6 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/sysdev.h>
-#include <linux/delay.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
@@ -31,8 +30,8 @@
 #include <asm/mach/irq.h>
 
 #include <plat/regs-serial.h>
-#include <asm/plat-s3c/nand.h>
-#include <asm/plat-s3c/iic.h>
+#include <plat/nand.h>
+#include <plat/iic.h>
 
 #include <mach/regs-power.h>
 #include <mach/regs-gpio.h>
@@ -52,7 +51,8 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
+#include <plat/iic.h>
 
 static struct map_desc jive_iodesc[] __initdata = {
 };
@@ -398,11 +398,12 @@ static struct s3c2410_spigpio_info jive_lcd_spi = {
         .bus_num        = 1,
         .pin_clk        = S3C2410_GPG8,
         .pin_mosi       = S3C2410_GPB8,
+        .num_chipselect = 1,
         .chip_select    = jive_lcd_spi_chipselect,
 };
 
 static struct platform_device jive_device_lcdspi = {
-        .name           = "s3c24xx-spi-gpio",
+        .name           = "spi_s3c24xx_gpio",
         .id             = 1,
         .num_resources  = 0,
         .dev.platform_data = &jive_lcd_spi,
@@ -419,11 +420,12 @@ static struct s3c2410_spigpio_info jive_wm8750_spi = {
         .bus_num        = 2,
         .pin_clk        = S3C2410_GPB4,
         .pin_mosi       = S3C2410_GPB9,
+        .num_chipselect = 1,
         .chip_select    = jive_wm8750_chipselect,
 };
 
 static struct platform_device jive_device_wm8750 = {
-        .name           = "s3c24xx-spi-gpio",
+        .name           = "spi_s3c24xx_gpio",
         .id             = 2,
         .num_resources  = 0,
         .dev.platform_data = &jive_wm8750_spi,
@@ -450,14 +452,14 @@ static struct spi_board_info __initdata jive_spi_devs[] = {
 
 /* I2C bus and device configuration. */
 
-static struct s3c2410_platform_i2c jive_i2c_cfg = {
+static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = {
         .max_freq       = 80 * 1000,
         .bus_freq       = 50 * 1000,
         .flags          = S3C_IICFLG_FILTER,
         .sda_delay      = 2,
 };
 
-static struct i2c_board_info jive_i2c_devs[] = {
+static struct i2c_board_info jive_i2c_devs[] __initdata = {
         [0] = {
                 I2C_BOARD_INFO("lis302dl", 0x1c),
                 .irq    = IRQ_EINT14,
@@ -470,7 +472,7 @@ static struct platform_device *jive_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_rtc,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_lcd,
         &jive_device_lcdspi,
         &jive_device_wm8750,
@@ -663,7 +665,7 @@ static void __init jive_machine_init(void)
 
         spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs));
 
-        s3c_device_i2c.dev.platform_data = &jive_i2c_cfg;
+        s3c_i2c0_set_platdata(&jive_i2c_cfg);
         i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs));
 
         pm_power_off = jive_power_off;
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index c719b5a740a9..eba66aa6bd20 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -37,7 +37,8 @@
 #include <mach/regs-lcd.h>
 
 #include <mach/idle.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
+#include <plat/iic.h>
 #include <mach/fb.h>
 
 #include <plat/s3c2410.h>
@@ -105,7 +106,7 @@ static struct platform_device *smdk2413_devices[] __initdata = {
         &s3c_device_usb,
         //&s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_usbgadget,
 };
@@ -142,6 +143,7 @@ static void __init smdk2413_machine_init(void)
 
 
         s3c24xx_udc_set_platdata(&smdk2413_udc_cfg);
+        s3c_i2c0_set_platdata(NULL);
 
         platform_add_devices(smdk2413_devices, ARRAY_SIZE(smdk2413_devices));
         smdk_machine_init();
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 4cfa19ad9be0..11e8ad49fc7b 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -39,7 +39,8 @@
 #include <mach/idle.h>
 #include <mach/fb.h>
 
-#include <asm/plat-s3c/nand.h>
+#include <plat/iic.h>
+#include <plat/nand.h>
 
 #include <plat/s3c2410.h>
 #include <plat/s3c2412.h>
@@ -122,7 +123,7 @@ static struct s3c2410_platform_nand vstms_nand_info = {
 static struct platform_device *vstms_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_rtc,
         &s3c_device_nand,
@@ -151,6 +152,7 @@ static void __init vstms_map_io(void)
 
 static void __init vstms_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
 }
 
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 313759c3da69..5b5aba69ec3f 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -16,6 +16,7 @@
 #include <linux/list.h>
 #include <linux/timer.h>
 #include <linux/init.h>
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/sysdev.h>
 #include <linux/serial_core.h>
@@ -33,13 +34,15 @@
 #include <mach/reset.h>
 #include <mach/idle.h>
 
+#include <plat/cpu-freq.h>
+
 #include <mach/regs-clock.h>
 #include <plat/regs-serial.h>
 #include <mach/regs-power.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-gpioj.h>
 #include <mach/regs-dsc.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 #include <mach/regs-s3c2412.h>
 
 #include <plat/s3c2412.h>
@@ -47,6 +50,7 @@
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/pm.h>
+#include <plat/pll.h>
 
 #ifndef CONFIG_CPU_S3C2412_ONLY
 void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
@@ -136,7 +140,7 @@ static void s3c2412_hard_reset(void)
  * machine specific initialisation.
 */
 
-void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
+void __init s3c2412_map_io(void)
 {
         /* move base of IO */
 
@@ -153,20 +157,25 @@ void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
         /* register our io-tables */
 
         iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
-        iotable_init(mach_desc, mach_size);
 }
 
-void __init s3c2412_init_clocks(int xtal)
+void __init_or_cpufreq s3c2412_setup_clocks(void)
 {
+        struct clk *xtal_clk;
         unsigned long tmp;
+        unsigned long xtal;
         unsigned long fclk;
         unsigned long hclk;
         unsigned long pclk;
 
+        xtal_clk = clk_get(NULL, "xtal");
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
         /* now we've got our machine bits initialised, work out what
          * clocks we've got */
 
-        fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
+        fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal * 2);
 
         clk_mpll.rate = fclk;
 
@@ -183,11 +192,17 @@ void __init s3c2412_init_clocks(int xtal)
         printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
                print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
 
+        s3c24xx_setup_clocks(fclk, hclk, pclk);
+}
+
+void __init s3c2412_init_clocks(int xtal)
+{
         /* initialise the clocks here, to allow other things like the
          * console to use them
          */
 
-        s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
+        s3c24xx_register_baseclocks(xtal);
+        s3c2412_setup_clocks();
         s3c2412_baseclk_add();
 }
 
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 25de042ab996..cde5ae9a4340 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -7,6 +7,7 @@
 config CPU_S3C2440
         bool
         depends on ARCH_S3C2410
+        select CPU_ARM920T
         select S3C2410_CLOCK
         select S3C2410_PM if PM
         select S3C2410_GPIO
@@ -28,8 +29,10 @@ menu "S3C2440 Machines"
 config MACH_ANUBIS
         bool "Simtec Electronics ANUBIS"
         select CPU_S3C2440
+        select S3C24XX_DCLK
         select PM_SIMTEC if PM
         select HAVE_PATA_PLATFORM
+        select S3C24XX_GPIO_EXTRA64
         help
           Say Y here if you are using the Simtec Electronics ANUBIS
           development system
@@ -37,7 +40,9 @@ config MACH_ANUBIS
 config MACH_OSIRIS
         bool "Simtec IM2440D20 (OSIRIS) module"
         select CPU_S3C2440
+        select S3C24XX_DCLK
         select PM_SIMTEC if PM
+        select S3C24XX_GPIO_EXTRA128
         help
           Say Y here if you are using the Simtec IM2440D20 module, also
           known as the Osiris.
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 32303f6a8321..5b5ee0b8f4e0 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -17,7 +17,6 @@
 #include <linux/sysdev.h>
 #include <linux/serial_core.h>
 
-#include <asm/dma.h>
 #include <mach/dma.h>
 
 #include <plat/dma.h>
@@ -25,12 +24,12 @@
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c/regs-ac97.h>
+#include <plat/regs-ac97.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
         [DMACH_XD0] = {
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index e2beca470484..b05d56e230a1 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -39,7 +39,8 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
+#include <plat/iic.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -366,6 +367,8 @@ static struct sm501_initdata anubis_sm501_initdata = {
                 .mask   = 0,
         },
 
+        .devices        = SM501_USE_GPIO,
+
         /* set the SDRAM and bus clocks */
         .mclk           = 72 * MHZ,
         .m1xclk         = 144 * MHZ,
@@ -373,10 +376,12 @@ static struct sm501_initdata anubis_sm501_initdata = {
 
 static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = {
         [0] = {
+                .bus_num        = 1,
                 .pin_scl        = 44,
                 .pin_sda        = 45,
         },
         [1] = {
+                .bus_num        = 2,
                 .pin_scl        = 40,
                 .pin_sda        = 41,
         },
@@ -384,6 +389,7 @@ static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = {
 
 static struct sm501_platdata anubis_sm501_platdata = {
         .init           = &anubis_sm501_initdata,
+        .gpio_base      = -1,
         .gpio_i2c       = anubis_sm501_gpio_i2c,
         .gpio_i2c_nr    = ARRAY_SIZE(anubis_sm501_gpio_i2c),
 };
@@ -404,7 +410,7 @@ static struct platform_device *anubis_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_wdt,
         &s3c_device_adc,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_rtc,
         &s3c_device_nand,
         &anubis_device_ide0,
@@ -468,6 +474,7 @@ static void __init anubis_map_io(void)
 
 static void __init anubis_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices));
 
         i2c_register_board_info(0, anubis_i2c_devs,
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index 66876c6f2f1c..0a6d0a5d961b 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -28,6 +28,7 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/fb.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 
@@ -35,7 +36,8 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
+#include <plat/iic.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -45,6 +47,7 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <asm/plat-s3c24xx/mci.h>
 
 static struct map_desc at2440evb_iodesc[] __initdata = {
         /* Nothing here */
@@ -162,19 +165,60 @@ static struct platform_device at2440evb_device_eth = {
         },
 };
 
+static struct s3c24xx_mci_pdata at2440evb_mci_pdata = {
+        .gpio_detect    = S3C2410_GPG10,
+};
+
+/* 7" LCD panel */
+
+static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
+
+        .lcdcon5        = S3C2410_LCDCON5_FRM565 |
+                          S3C2410_LCDCON5_INVVLINE |
+                          S3C2410_LCDCON5_INVVFRAME |
+                          S3C2410_LCDCON5_PWREN |
+                          S3C2410_LCDCON5_HWSWP,
+
+        .type           = S3C2410_LCDCON1_TFT,
+
+        .width          = 800,
+        .height         = 480,
+
+        .pixclock       = 33333, /* HCLK 60 MHz, divisor 2 */
+        .xres           = 800,
+        .yres           = 480,
+        .bpp            = 16,
+        .left_margin    = 88,
+        .right_margin   = 40,
+        .hsync_len      = 128,
+        .upper_margin   = 32,
+        .lower_margin   = 11,
+        .vsync_len      = 2,
+};
+
+static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
+        .displays       = &at2440evb_lcd_cfg,
+        .num_displays   = 1,
+        .default_display = 0,
+};
+
 static struct platform_device *at2440evb_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_wdt,
         &s3c_device_adc,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_rtc,
         &s3c_device_nand,
+        &s3c_device_sdi,
+        &s3c_device_lcd,
         &at2440evb_device_eth,
 };
 
 static void __init at2440evb_map_io(void)
 {
         s3c_device_nand.dev.platform_data = &at2440evb_nand_info;
+        s3c_device_sdi.name = "s3c2440-sdi";
+        s3c_device_sdi.dev.platform_data = &at2440evb_mci_pdata;
 
         s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
         s3c24xx_init_clocks(16934400);
@@ -183,6 +227,9 @@ static void __init at2440evb_map_io(void)
 
 static void __init at2440evb_init(void)
 {
+        s3c24xx_fb_set_platdata(&at2440evb_fb_info);
+        s3c_i2c0_set_platdata(NULL);
+
         platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
 }
 
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index a546307fd53d..7aeaa972d7f5 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -37,6 +37,7 @@
 //#include <asm/debug-ll.h>
 #include <mach/regs-gpio.h>
 #include <plat/regs-serial.h>
+#include <plat/iic.h>
 
 #include <plat/s3c2410.h>
 #include <plat/s3c2440.h>
@@ -107,7 +108,7 @@ static struct platform_device *nexcoder_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_rtc,
         &s3c_device_camif,
@@ -142,6 +143,7 @@ static void __init nexcoder_map_io(void)
 
 static void __init nexcoder_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(nexcoder_devices, ARRAY_SIZE(nexcoder_devices));
 };
 
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 2361d606abc5..41a00f57e5da 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -37,7 +37,8 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
+#include <plat/iic.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -335,7 +336,7 @@ static struct i2c_board_info osiris_i2c_devs[] __initdata = {
 /* Standard Osiris devices */
 
 static struct platform_device *osiris_devices[] __initdata = {
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_wdt,
         &s3c_device_nand,
         &osiris_pcmcia,
@@ -398,6 +399,8 @@ static void __init osiris_init(void)
         sysdev_class_register(&osiris_pm_sysclass);
         sysdev_register(&osiris_pm_sysdev);
 
+        s3c_i2c0_set_platdata(NULL);
+
         i2c_register_board_info(0, osiris_i2c_devs,
                                 ARRAY_SIZE(osiris_i2c_devs));
 
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 4d14c7cff892..12d378f84ad2 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -42,7 +42,7 @@
 #include <mach/regs-lcd.h>
 
 #include <mach/h1940.h>
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
 #include <mach/fb.h>
 
 #include <plat/clock.h>
@@ -179,7 +179,7 @@ static struct platform_device *rx3715_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
         &s3c_device_nand,
 };
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index fefeaaa4155f..db6eafbd4d90 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -37,6 +37,7 @@
 
 #include <mach/idle.h>
 #include <mach/fb.h>
+#include <plat/iic.h>
 
 #include <plat/s3c2410.h>
 #include <plat/s3c2440.h>
@@ -152,7 +153,7 @@ static struct platform_device *smdk2440_devices[] __initdata = {
         &s3c_device_usb,
         &s3c_device_lcd,
         &s3c_device_wdt,
-        &s3c_device_i2c,
+        &s3c_device_i2c0,
         &s3c_device_iis,
 };
 
@@ -166,6 +167,7 @@ static void __init smdk2440_map_io(void)
 static void __init smdk2440_machine_init(void)
 {
         s3c24xx_fb_set_platdata(&smdk2440_fb_info);
+        s3c_i2c0_set_platdata(NULL);
 
         platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices));
         smdk_machine_init();
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index 26d131a77074..b289d198020e 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -7,6 +7,7 @@
 config CPU_S3C2442
         bool
         depends on ARCH_S3C2410
+        select CPU_ARM920T
         select S3C2410_CLOCK
         select S3C2410_GPIO
         select S3C2410_PM if PM
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 14252f573754..212141baebec 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -24,6 +24,7 @@ config MACH_SMDK2443
         bool "SMDK2443"
         select CPU_S3C2443
         select MACH_SMDK
+        select S3C_DEV_HSMMC
         help
           Say Y here if you are using an SMDK2443
 
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index f854e7385e3c..2785d69c95b0 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -29,7 +29,6 @@
 #include <linux/sysdev.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
-#include <linux/delay.h>
 #include <linux/serial_core.h>
 #include <linux/io.h>
 
@@ -39,6 +38,8 @@
 
 #include <mach/regs-s3c2443-clock.h>
 
+#include <plat/cpu-freq.h>
+
 #include <plat/s3c2443.h>
 #include <plat/clock.h>
 #include <plat/cpu.h>
@@ -145,12 +146,6 @@ static unsigned long s3c2443_roundrate_clksrc256(struct clk *clk,
 
 /* clock selections */
 
-/* CPU EXTCLK input */
-static struct clk clk_ext = {
-        .name           = "ext",
-        .id             = -1,
-};
-
 static struct clk clk_mpllref = {
         .name           = "mpllref",
         .parent         = &clk_xtal,
@@ -165,14 +160,6 @@ static struct clk clk_mpll = {
 };
 #endif
 
-static struct clk clk_epllref;
-
-static struct clk clk_epll = {
-        .name           = "epll",
-        .parent         = &clk_epllref,
-        .id             = -1,
-};
-
 static struct clk clk_i2s_ext = {
         .name           = "i2s-ext",
         .id             = -1,
@@ -1011,22 +998,20 @@ static struct clk *clks[] __initdata = {
         &clk_prediv,
 };
 
-void __init s3c2443_init_clocks(int xtal)
+void __init_or_cpufreq s3c2443_setup_clocks(void)
 {
-        unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
         unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON);
         unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
+        struct clk *xtal_clk;
+        unsigned long xtal;
         unsigned long pll;
         unsigned long fclk;
         unsigned long hclk;
         unsigned long pclk;
-        struct clk *clkp;
-        int ret;
-        int ptr;
 
-        /* s3c2443 parents h and p clocks from prediv */
-        clk_h.parent = &clk_prediv;
-        clk_p.parent = &clk_prediv;
+        xtal_clk = clk_get(NULL, "xtal");
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
 
         pll = s3c2443_get_mpll(mpllcon, xtal);
         clk_msysclk.rate = pll;
@@ -1036,13 +1021,29 @@ void __init s3c2443_init_clocks(int xtal)
         hclk /= s3c2443_get_hdiv(clkdiv0);
         pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1);
 
-        s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
+        s3c24xx_setup_clocks(fclk, hclk, pclk);
 
         printk("S3C2443: mpll %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n",
                (mpllcon & S3C2443_PLLCON_OFF) ? "off":"on",
                print_mhz(pll), print_mhz(fclk),
                print_mhz(hclk), print_mhz(pclk));
 
+        s3c24xx_setup_clocks(fclk, hclk, pclk);
+}
+
+void __init s3c2443_init_clocks(int xtal)
+{
+        struct clk *clkp;
+        unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
+        int ret;
+        int ptr;
+
+        /* s3c2443 parents h and p clocks from prediv */
+        clk_h.parent = &clk_prediv;
+        clk_p.parent = &clk_prediv;
+
+        s3c24xx_register_baseclocks(xtal);
+        s3c2443_setup_clocks();
         s3c2443_clk_initparents();
 
         for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
@@ -1056,7 +1057,7 @@ void __init s3c2443_init_clocks(int xtal)
         }
 
         clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
-
+        clk_epll.parent = &clk_epllref;
         clk_usb_bus.parent = &clk_usb_bus_host;
 
         /* ensure usb bus clock is within correct rate of 48MHz */
@@ -1105,4 +1106,6 @@ void __init s3c2443_init_clocks(int xtal)
 
                 (clkp->enable)(clkp, 0);
         }
+
+        s3c_pwmclk_init();
 }
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index f73ccb25ff94..2a58a4d5aa5a 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -18,7 +18,6 @@
 #include <linux/serial_core.h>
 #include <linux/io.h>
 
-#include <asm/dma.h>
 #include <mach/dma.h>
 
 #include <plat/dma.h>
@@ -26,12 +25,12 @@
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c/regs-ac97.h>
+#include <plat/regs-ac97.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 #define MAP(x) { \
                 [0]     = (x) | DMA_CH_VALID,   \
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index a7fe65f3dcc1..039a46243105 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -37,6 +37,7 @@
 
 #include <mach/idle.h>
 #include <mach/fb.h>
+#include <plat/iic.h>
 
 #include <plat/s3c2410.h>
 #include <plat/s3c2440.h>
@@ -103,8 +104,8 @@ static struct s3c2410_uartcfg smdk2443_uartcfgs[] __initdata = {
 
 static struct platform_device *smdk2443_devices[] __initdata = {
         &s3c_device_wdt,
-        &s3c_device_i2c,
-        &s3c_device_hsmmc,
+        &s3c_device_i2c0,
+        &s3c_device_hsmmc0,
 };
 
 static void __init smdk2443_map_io(void)
@@ -116,6 +117,7 @@ static void __init smdk2443_map_io(void)
 
 static void __init smdk2443_machine_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
         platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices));
         smdk_machine_init();
 }
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index bbeddf9ddcb1..ce2ec3298930 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -81,10 +81,9 @@ void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  * machine specific initialisation.
  */
 
-void __init s3c2443_map_io(struct map_desc *mach_desc, int mach_size)
+void __init s3c2443_map_io(void)
 {
         iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc));
-        iotable_init(mach_desc, mach_size);
 }
 
 /* need to register class before we actually register the device, and
diff --git a/arch/arm/mach-s3c24a0/include/mach/debug-macro.S b/arch/arm/mach-s3c24a0/include/mach/debug-macro.S
new file mode 100644
index 000000000000..f0ef0ab475f6
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/debug-macro.S
@@ -0,0 +1,28 @@
+/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+#include <plat/regs-serial.h>
+
+        .macro addruart, rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C24XX_PA_UART
+                ldrne   \rx, = S3C24XX_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+/* include the reset of the code which will do the work, we're only
+ * compiling for a single cpu processor type so the default of s3c2440
+ * will be fine with us.
+ */
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s3c24a0/include/mach/irqs.h b/arch/arm/mach-s3c24a0/include/mach/irqs.h
new file mode 100644
index 000000000000..ae8c0e359783
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/irqs.h
@@ -0,0 +1,115 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/irqs.h
+ *
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *   Ben Dooks <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+
+#ifndef __ASM_ARCH_24A0_IRQS_H
+#define __ASM_ARCH_24A0_IRQS_H __FILE__
+
+#define IRQ_EINT0t2     S3C2410_IRQ(0)  /* 16 */
+/* for generic entry-macro.S */
+#define IRQ_EINT0       IRQ_EINT0t2
+
+#define IRQ_EINT3t6     S3C2410_IRQ(1)
+#define IRQ_EINT7t10    S3C2410_IRQ(2)
+#define IRQ_EINT11t14   S3C2410_IRQ(3)
+#define IRQ_EINT15t18   S3C2410_IRQ(4)  /* 20 */
+#define IRQ_TICK        S3C2410_IRQ(5)
+#define IRQ_DCTQ        S3C2410_IRQ(6)
+#define IRQ_MC          S3C2410_IRQ(7)
+#define IRQ_ME          S3C2410_IRQ(8)  /* 24 */
+#define IRQ_KEYPAD      S3C2410_IRQ(9)
+#define IRQ_TIMER0      S3C2410_IRQ(10)
+#define IRQ_TIMER1      S3C2410_IRQ(11)
+#define IRQ_TIMER2      S3C2410_IRQ(12)
+#define IRQ_TIMER3_4    S3C2410_IRQ(13)
+#define IRQ_OS_TIMER    IRQ_TIMER3_4
+#define IRQ_LCD         S3C2410_IRQ(14)
+#define IRQ_CAM_C       S3C2410_IRQ(15)
+#define IRQ_WDT_BATFLT  S3C2410_IRQ(16) /* 32 */
+#define IRQ_UART0       S3C2410_IRQ(17)
+#define IRQ_CAM_P       S3C2410_IRQ(18)
+#define IRQ_MODEM       S3C2410_IRQ(19)
+#define IRQ_DMA         S3C2410_IRQ(20)
+#define IRQ_SDI         S3C2410_IRQ(21)
+#define IRQ_SPI0        S3C2410_IRQ(22)
+#define IRQ_UART1       S3C2410_IRQ(23)
+#define IRQ_AC97_NFLASH S3C2410_IRQ(24) /* 40 */
+#define IRQ_USBD        S3C2410_IRQ(25)
+#define IRQ_USBH        S3C2410_IRQ(26)
+#define IRQ_IIC         S3C2410_IRQ(27)
+#define IRQ_IRDA_MSTICK S3C2410_IRQ(28) /* 44 */
+#define IRQ_VLX_SPI1    S3C2410_IRQ(29)
+#define IRQ_RTC         S3C2410_IRQ(30) /* 46 */
+#define IRQ_ADC_PEN     S3C2410_IRQ(31)
+
+/* interrupts generated from the external interrupts sources */
+#define IRQ_EINT00      S3C2410_IRQ(32) /* 48 */
+#define IRQ_EINT1       S3C2410_IRQ(33)
+#define IRQ_EINT2       S3C2410_IRQ(34)
+#define IRQ_EINT3       S3C2410_IRQ(35)
+#define IRQ_EINT4       S3C2410_IRQ(36)
+#define IRQ_EINT5       S3C2410_IRQ(37)
+#define IRQ_EINT6       S3C2410_IRQ(38)
+#define IRQ_EINT7       S3C2410_IRQ(39)
+#define IRQ_EINT8       S3C2410_IRQ(40)
+#define IRQ_EINT9       S3C2410_IRQ(41)
+#define IRQ_EINT10      S3C2410_IRQ(42)
+#define IRQ_EINT11      S3C2410_IRQ(43)
+#define IRQ_EINT12      S3C2410_IRQ(44)
+#define IRQ_EINT13      S3C2410_IRQ(45)
+#define IRQ_EINT14      S3C2410_IRQ(46)
+#define IRQ_EINT15      S3C2410_IRQ(47)
+#define IRQ_EINT16      S3C2410_IRQ(48)
+#define IRQ_EINT17      S3C2410_IRQ(49)
+#define IRQ_EINT18      S3C2410_IRQ(50)
+
+/* SUB IRQS */
+#define IRQ_S3CUART_RX0         S3C2410_IRQ(51) /* 67 */
+#define IRQ_S3CUART_TX0         S3C2410_IRQ(52)
+#define IRQ_S3CUART_ERR0        S3C2410_IRQ(53)
+
+#define IRQ_S3CUART_RX1         S3C2410_IRQ(54)
+#define IRQ_S3CUART_TX1         S3C2410_IRQ(55)
+#define IRQ_S3CUART_ERR1        S3C2410_IRQ(56)
+
+#define IRQ_S3CUART_RX2         (0x0)
+#define IRQ_S3CUART_TX2         (0x0)
+#define IRQ_S3CUART_ERR2        (0x0)
+
+
+#define IRQ_IRDA        S3C2410_IRQ(57)
+#define IRQ_MSTICK      S3C2410_IRQ(58)
+#define IRQ_RESERVED0   S3C2410_IRQ(59)
+#define IRQ_RESERVED1   S3C2410_IRQ(60)
+#define IRQ_RESERVED2   S3C2410_IRQ(61)
+#define IRQ_TIMER3      S3C2410_IRQ(62)
+#define IRQ_TIMER4      S3C2410_IRQ(63)
+#define IRQ_WDT         S3C2410_IRQ(64)
+#define IRQ_BATFLT      S3C2410_IRQ(65)
+#define IRQ_POST        S3C2410_IRQ(66)
+#define IRQ_DISP_FIFO   S3C2410_IRQ(67)
+#define IRQ_PENUP       S3C2410_IRQ(68)
+#define IRQ_PENDN       S3C2410_IRQ(69)
+#define IRQ_ADC         S3C2410_IRQ(70)
+#define IRQ_DISP_FRAME  S3C2410_IRQ(71)
+#define IRQ_NFLASH      S3C2410_IRQ(72)
+#define IRQ_AC97        S3C2410_IRQ(73)
+#define IRQ_SPI1        S3C2410_IRQ(74)
+#define IRQ_VLX         S3C2410_IRQ(75)
+#define IRQ_DMA0        S3C2410_IRQ(76)
+#define IRQ_DMA1        S3C2410_IRQ(77)
+#define IRQ_DMA2        S3C2410_IRQ(78)
+#define IRQ_DMA3        S3C2410_IRQ(79)
+
+#define IRQ_TC          (0x0)
+
+#define NR_IRQS         (IRQ_DMA3+1)
+
+#endif /* __ASM_ARCH_24A0_IRQS_H */
diff --git a/arch/arm/mach-s3c24a0/include/mach/map.h b/arch/arm/mach-s3c24a0/include/mach/map.h
new file mode 100644
index 000000000000..a01132717e34
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/map.h
@@ -0,0 +1,85 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/map.h
+ *
+ * Copyright 2003,2007  Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24A0 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_24A0_MAP_H
+#define __ASM_ARCH_24A0_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map.h>
+
+#define S3C24A0_PA_IO_BASE      (0x40000000)
+#define S3C24A0_PA_CLKPWR       (0x40000000)
+#define S3C24A0_PA_IRQ          (0x40200000)
+#define S3C24A0_PA_DMA          (0x40400000)
+#define S3C24A0_PA_MEMCTRL      (0x40C00000)
+#define S3C24A0_PA_NAND         (0x40C00000)
+#define S3C24A0_PA_SROM         (0x40C20000)
+#define S3C24A0_PA_SDRAM        (0x40C40000)
+#define S3C24A0_PA_BUSM         (0x40CE0000)
+#define S3C24A0_PA_USBHOST      (0x41000000)
+#define S3C24A0_PA_MODEMIF      (0x41180000)
+#define S3C24A0_PA_IRDA         (0x41800000)
+#define S3C24A0_PA_TIMER        (0x44000000)
+#define S3C24A0_PA_WATCHDOG     (0x44100000)
+#define S3C24A0_PA_RTC          (0x44200000)
+#define S3C24A0_PA_UART         (0x44400000)
+#define S3C24A0_PA_UART0        (S3C24A0_PA_UART)
+#define S3C24A0_PA_UART1        (S3C24A0_PA_UART + 0x4000)
+#define S3C24A0_PA_SPI          (0x44500000)
+#define S3C24A0_PA_IIC          (0x44600000)
+#define S3C24A0_PA_IIS          (0x44700000)
+#define S3C24A0_PA_GPIO         (0x44800000)
+#define S3C24A0_PA_KEYIF        (0x44900000)
+#define S3C24A0_PA_USBDEV       (0x44A00000)
+#define S3C24A0_PA_AC97         (0x45000000)
+#define S3C24A0_PA_ADC          (0x45800000)
+#define S3C24A0_PA_SDI          (0x46000000)
+#define S3C24A0_PA_MS           (0x46100000)
+#define S3C24A0_PA_LCD          (0x4A000000)
+#define S3C24A0_PA_VPOST        (0x4A100000)
+
+/* physical addresses of all the chip-select areas */
+
+#define S3C24A0_CS0     (0x00000000)
+#define S3C24A0_CS1     (0x04000000)
+#define S3C24A0_CS2     (0x08000000)
+#define S3C24A0_CS3     (0x0C000000)
+#define S3C24A0_CS4     (0x10000000)
+#define S3C24A0_CS5     (0x40000000)
+
+#define S3C24A0_SDRAM_PA        (S3C24A0_CS4)
+
+/* Use a single interface for common resources between S3C24XX cpus */
+
+#define S3C24XX_PA_IRQ          S3C24A0_PA_IRQ
+#define S3C24XX_PA_MEMCTRL      S3C24A0_PA_MEMCTRL
+#define S3C24XX_PA_USBHOST      S3C24A0_PA_USBHOST
+#define S3C24XX_PA_DMA          S3C24A0_PA_DMA
+#define S3C24XX_PA_CLKPWR       S3C24A0_PA_CLKPWR
+#define S3C24XX_PA_LCD          S3C24A0_PA_LCD
+#define S3C24XX_PA_UART         S3C24A0_PA_UART
+#define S3C24XX_PA_TIMER        S3C24A0_PA_TIMER
+#define S3C24XX_PA_USBDEV       S3C24A0_PA_USBDEV
+#define S3C24XX_PA_WATCHDOG     S3C24A0_PA_WATCHDOG
+#define S3C24XX_PA_IIS          S3C24A0_PA_IIS
+#define S3C24XX_PA_GPIO         S3C24A0_PA_GPIO
+#define S3C24XX_PA_RTC          S3C24A0_PA_RTC
+#define S3C24XX_PA_ADC          S3C24A0_PA_ADC
+#define S3C24XX_PA_SPI          S3C24A0_PA_SPI
+#define S3C24XX_PA_SDI          S3C24A0_PA_SDI
+#define S3C24XX_PA_NAND         S3C24A0_PA_NAND
+
+#define S3C_PA_UART             S3C24A0_PA_UART
+#define S3C_PA_IIC              S3C24A0_PA_IIC
+
+#endif /* __ASM_ARCH_24A0_MAP_H */
diff --git a/arch/arm/mach-s3c24a0/include/mach/memory.h b/arch/arm/mach-s3c24a0/include/mach/memory.h
new file mode 100644
index 000000000000..585211ca0187
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/memory.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/memory.h
+ *  from linux/include/asm-arm/arch-rpc/memory.h
+ *
+ *  Copyright (C) 1996,1997,1998 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_24A0_MEMORY_H
+#define __ASM_ARCH_24A0_MEMORY_H __FILE__
+
+#define PHYS_OFFSET UL(0x10000000)
+
+#define __virt_to_bus(x) __virt_to_phys(x)
+#define __bus_to_virt(x) __phys_to_virt(x)
+
+#endif
diff --git a/arch/arm/mach-s3c24a0/include/mach/regs-clock.h b/arch/arm/mach-s3c24a0/include/mach/regs-clock.h
new file mode 100644
index 000000000000..af2abd756c30
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/regs-clock.h
@@ -0,0 +1,88 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2003,2004,2005,2006 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C24A0 clock register definitions
+*/
+
+#ifndef __ASM_ARCH_24A0_REGS_CLOCK_H
+#define __ASM_ARCH_24A0_REGS_CLOCK_H __FILE__
+
+#define S3C24A0_MPLLCON         S3C2410_CLKREG(0x10)
+#define S3C24A0_UPLLCON         S3C2410_CLKREG(0x14)
+#define S3C24A0_CLKCON          S3C2410_CLKREG(0x20)
+#define S3C24A0_CLKSRC          S3C2410_CLKREG(0x24)
+#define S3C24A0_CLKDIVN         S3C2410_CLKREG(0x28)
+
+/* CLKCON register bits */
+
+#define S3C24A0_CLKCON_VLX      (1<<29)
+#define S3C24A0_CLKCON_VPOST    (1<<28)
+#define S3C24A0_CLKCON_WDT      (1<<27) /* reserved */
+#define S3C24A0_CLKCON_MPEGDCTQ (1<<26)
+#define S3C24A0_CLKCON_VPOSTIF  (1<<25)
+#define S3C24A0_CLKCON_MPEG4IF  (1<<24)
+#define S3C24A0_CLKCON_CAM_UPLL (1<<23)
+#define S3C24A0_CLKCON_LCDC     (1<<22)
+#define S3C24A0_CLKCON_CAM_HCLK (1<<21)
+#define S3C24A0_CLKCON_MPEG4    (1<<20)
+#define S3C24A0_CLKCON_KEYPAD   (1<<19)
+#define S3C24A0_CLKCON_ADC      (1<<18)
+#define S3C24A0_CLKCON_SDI      (1<<17)
+#define S3C24A0_CLKCON_MS       (1<<16) /* memory stick */
+#define S3C24A0_CLKCON_USBD     (1<<15)
+#define S3C24A0_CLKCON_GPIO     (1<<14)
+#define S3C24A0_CLKCON_IIS      (1<<13)
+#define S3C24A0_CLKCON_IIC      (1<<12)
+#define S3C24A0_CLKCON_SPI      (1<<11)
+#define S3C24A0_CLKCON_UART1    (1<<10)
+#define S3C24A0_CLKCON_UART0    (1<<9)
+#define S3C24A0_CLKCON_PWMT     (1<<8)
+#define S3C24A0_CLKCON_USBH     (1<<7)
+#define S3C24A0_CLKCON_AC97     (1<<6)
+#define S3C24A0_CLKCON_IrDA     (1<<4)
+#define S3C24A0_CLKCON_IDLE     (1<<2)
+#define S3C24A0_CLKCON_MON      (1<<1)
+#define S3C24A0_CLKCON_STOP     (1<<0)
+
+/* CLKSRC register bits */
+
+#define S3C24A0_CLKSRC_OSC      (1<<8)  /* CLKSRC */
+#define S3C24A0_CLKSRC_UPLL     (1<<7)
+#define S3C24A0_CLKSRC_MPLL     (1<<5)
+#define S3C24A0_CLKSRC_EXT      (1<<4)
+
+/* Use a single interface with the common code, for s3c24xx */
+
+#define S3C2410_MPLLCON         S3C24A0_MPLLCON
+#define S3C2410_UPLLCON         S3C24A0_UPLLCON
+#define S3C2410_CLKCON          S3C24A0_CLKCON
+#define S3C2410_CLKSLOW         S3C24A0_CLKSRC
+#define S3C2410_CLKDIVN         S3C24A0_CLKDIVN
+
+#define S3C2410_CLKCON_IDLE     S3C24A0_CLKCON_IDLE
+#define S3C2410_CLKCON_POWER    S3C24A0_CLKCON_STOP
+#define S3C2410_CLKCON_LCDC     S3C24A0_CLKCON_LCDC
+#define S3C2410_CLKCON_USBH     S3C24A0_CLKCON_USBH
+#define S3C2410_CLKCON_USBD     S3C24A0_CLKCON_USBD
+#define S3C2410_CLKCON_PWMT     S3C24A0_CLKCON_PWMT
+#define S3C2410_CLKCON_SDI      S3C24A0_CLKCON_SDI
+#define S3C2410_CLKCON_UART0    S3C24A0_CLKCON_UART0
+#define S3C2410_CLKCON_UART1    S3C24A0_CLKCON_UART1
+#define S3C2410_CLKCON_GPIO     S3C24A0_CLKCON_GPIO
+#define S3C2410_CLKCON_ADC      S3C24A0_CLKCON_ADC
+#define S3C2410_CLKCON_IIC      S3C24A0_CLKCON_IIC
+#define S3C2410_CLKCON_IIS      S3C24A0_CLKCON_IIS
+#define S3C2410_CLKCON_SPI      S3C24A0_CLKCON_SPI
+
+#define S3C2410_CLKSLOW_UCLK_OFF        S3C24A0_CLKSRC_UPLL
+#define S3C2410_CLKSLOW_MPLL_OFF        S3C24A0_CLKSRC_MPLL
+#define S3C2410_CLKSLOW_SLOW            (0xFF)
+#define S3C2410_CLKSLOW_GET_SLOWVAL(x)  (0x1)
+
+#endif /* __ASM_ARCH_24A0_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s3c24a0/include/mach/regs-irq.h b/arch/arm/mach-s3c24a0/include/mach/regs-irq.h
new file mode 100644
index 000000000000..6086f6f189eb
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/regs-irq.h
@@ -0,0 +1,25 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+
+#ifndef ___ASM_ARCH_24A0_REGS_IRQ_H
+#define ___ASM_ARCH_24A0_REGS_IRQ_H __FILE__
+
+
+#define S3C2410_EINTMASK        S3C2410_EINTREG(0x034)
+#define S3C2410_EINTPEND        S3C2410_EINTREG(0X038)
+
+#define S3C24XX_EINTMASK        S3C24XX_EINTREG(0x034)
+#define S3C24XX_EINTPEND        S3C24XX_EINTREG(0X038)
+
+#endif /* __ASM_ARCH_24A0_REGS_IRQ_H */
+
+
+
diff --git a/arch/arm/mach-s3c24a0/include/mach/system.h b/arch/arm/mach-s3c24a0/include/mach/system.h
new file mode 100644
index 000000000000..bd1bd1957656
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/system.h
@@ -0,0 +1,25 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/system.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24A0 - System function defines and includes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <mach/hardware.h>
+#include <asm/io.h>
+
+#include <mach/map.h>
+
+static void arch_idle(void)
+{
+        /* currently no specific idle support. */
+}
+
+void (*s3c24xx_reset_hook)(void);
+
+#include <asm/plat-s3c24xx/system-reset.h>
diff --git a/arch/arm/mach-s3c24a0/include/mach/tick.h b/arch/arm/mach-s3c24a0/include/mach/tick.h
new file mode 100644
index 000000000000..9dea8ba6fb72
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/tick.h
@@ -0,0 +1,15 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/tick.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C24A0 - timer tick support
+ */
+
+#define SUBSRC_TIMER4   (1 << (IRQ_TIMER4 - IRQ_S3CUART_RX0))
+
+static inline int s3c24xx_ostimer_pending(void)
+{
+        return __raw_readl(S3C2410_SUBSRCPND) & SUBSRC_TIMER4;
+}
diff --git a/arch/arm/mach-s3c24a0/include/mach/timex.h b/arch/arm/mach-s3c24a0/include/mach/timex.h
new file mode 100644
index 000000000000..98573424a016
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/timex.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/timex.h
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s3c24a0/include/mach/vmalloc.h b/arch/arm/mach-s3c24a0/include/mach/vmalloc.h
new file mode 100644
index 000000000000..4d4fe4849589
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
+/* linux/include/asm-arm/arch-s3c24ao/vmalloc.h
+ *
+ * Copyright 2008 Simtec Electronics <linux@simtec.co.uk>
+
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C24A0 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
new file mode 100644
index 000000000000..6da82b5c09ba
--- /dev/null
+++ b/arch/arm/mach-s3c6400/Kconfig
@@ -0,0 +1,8 @@
+# arch/arm/mach-s3c6400/Kconfig
+#
+# Copyright 2008 Openmoko, Inc.
+#       Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
+#
+# Licensed under GPLv2
+
+# Currently nothing here, this will be added later
diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile
new file mode 100644
index 000000000000..8f397db25b87
--- /dev/null
+++ b/arch/arm/mach-s3c6400/Makefile
@@ -0,0 +1,15 @@
+# arch/arm/mach-s3c6400/Makefile
+#
+# Copyright 2008 Openmoko, Inc.
+# Copyright 2008 Simtec Electronics
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S3C6400 system
+
+obj-n                           += blank.o
diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c6400/Makefile.boot
new file mode 100644
index 000000000000..ba41fdc0a586
--- /dev/null
+++ b/arch/arm/mach-s3c6400/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x50008000
+params_phys-y   := 0x50000100
diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c6400/include/mach/debug-macro.S
new file mode 100644
index 000000000000..b18ac5266dfc
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/debug-macro.S
@@ -0,0 +1,39 @@
+/* arch/arm/mach-s3c6400/include/mach/debug-macro.S
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+#include <plat/regs-serial.h>
+
+        /* note, for the boot process to work we have to keep the UART
+         * virtual address aligned to an 1MiB boundary for the L1
+         * mapping the head code makes. We keep the UART virtual address
+         * aligned and add in the offset when we load the value here.
+         */
+
+        .macro addruart, rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C_PA_UART
+                ldrne   \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+/* include the reset of the code which will do the work, we're only
+ * compiling for a single cpu processor type so the default of s3c2440
+ * will be fine with us.
+ */
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h
new file mode 100644
index 000000000000..9771ac2cb07e
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/dma.h
@@ -0,0 +1,16 @@
+/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C6400 - DMA support
+ */
+
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c6400/include/mach/entry-macro.S
new file mode 100644
index 000000000000..fbd90d2cf355
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/entry-macro.S
@@ -0,0 +1,44 @@
+/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Low-level IRQ helper macros for the Samsung S3C64XX series
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+*/
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+#include <plat/irqs.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =S3C_VA_VIC0
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+        @ check the vic0
+        mov     \irqnr, # S3C_IRQ_OFFSET + 31
+        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
+        teq     \irqstat, #0
+
+        @ otherwise try vic1
+        addeq   \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        clzne   \irqstat, \irqstat
+        subne   \irqnr, \irqnr, \irqstat
+        .endm
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio-core.h b/arch/arm/mach-s3c6400/include/mach/gpio-core.h
new file mode 100644
index 000000000000..d89aae68b0a5
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/gpio-core.h
@@ -0,0 +1,21 @@
+/* arch/arm/mach-s3c6400/include/mach/gpio-core.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - GPIO core support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_CORE_H
+#define __ASM_ARCH_GPIO_CORE_H __FILE__
+
+/* currently we just include the platform support */
+#include <plat/gpio-core.h>
+
+#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c6400/include/mach/gpio.h
new file mode 100644
index 000000000000..e8e35e8fe731
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/gpio.h
@@ -0,0 +1,96 @@
+/* arch/arm/mach-s3c6400/include/mach/gpio.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C6400 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+/* GPIO bank sizes */
+#define S3C64XX_GPIO_A_NR       (8)
+#define S3C64XX_GPIO_B_NR       (7)
+#define S3C64XX_GPIO_C_NR       (8)
+#define S3C64XX_GPIO_D_NR       (5)
+#define S3C64XX_GPIO_E_NR       (5)
+#define S3C64XX_GPIO_F_NR       (16)
+#define S3C64XX_GPIO_G_NR       (7)
+#define S3C64XX_GPIO_H_NR       (10)
+#define S3C64XX_GPIO_I_NR       (16)
+#define S3C64XX_GPIO_J_NR       (12)
+#define S3C64XX_GPIO_K_NR       (16)
+#define S3C64XX_GPIO_L_NR       (15)
+#define S3C64XX_GPIO_M_NR       (6)
+#define S3C64XX_GPIO_N_NR       (16)
+#define S3C64XX_GPIO_O_NR       (16)
+#define S3C64XX_GPIO_P_NR       (15)
+#define S3C64XX_GPIO_Q_NR       (9)
+
+/* GPIO bank numbes */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+
+#define S3C64XX_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s3c_gpio_number {
+        S3C64XX_GPIO_A_START = 0,
+        S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A),
+        S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B),
+        S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C),
+        S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D),
+        S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E),
+        S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F),
+        S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G),
+        S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H),
+        S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I),
+        S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J),
+        S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K),
+        S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L),
+        S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M),
+        S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N),
+        S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O),
+        S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P),
+};
+
+/* S3C64XX GPIO number definitions. */
+
+#define S3C64XX_GPA(_nr)        (S3C64XX_GPIO_A_START + (_nr))
+#define S3C64XX_GPB(_nr)        (S3C64XX_GPIO_B_START + (_nr))
+#define S3C64XX_GPC(_nr)        (S3C64XX_GPIO_C_START + (_nr))
+#define S3C64XX_GPD(_nr)        (S3C64XX_GPIO_D_START + (_nr))
+#define S3C64XX_GPE(_nr)        (S3C64XX_GPIO_E_START + (_nr))
+#define S3C64XX_GPF(_nr)        (S3C64XX_GPIO_F_START + (_nr))
+#define S3C64XX_GPG(_nr)        (S3C64XX_GPIO_G_START + (_nr))
+#define S3C64XX_GPH(_nr)        (S3C64XX_GPIO_H_START + (_nr))
+#define S3C64XX_GPI(_nr)        (S3C64XX_GPIO_I_START + (_nr))
+#define S3C64XX_GPJ(_nr)        (S3C64XX_GPIO_J_START + (_nr))
+#define S3C64XX_GPK(_nr)        (S3C64XX_GPIO_K_START + (_nr))
+#define S3C64XX_GPL(_nr)        (S3C64XX_GPIO_L_START + (_nr))
+#define S3C64XX_GPM(_nr)        (S3C64XX_GPIO_M_START + (_nr))
+#define S3C64XX_GPN(_nr)        (S3C64XX_GPIO_N_START + (_nr))
+#define S3C64XX_GPO(_nr)        (S3C64XX_GPIO_O_START + (_nr))
+#define S3C64XX_GPP(_nr)        (S3C64XX_GPIO_P_START + (_nr))
+#define S3C64XX_GPQ(_nr)        (S3C64XX_GPIO_Q_START + (_nr))
+
+/* the end of the S3C64XX specific gpios */
+#define S3C64XX_GPIO_END        (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
+#define S3C_GPIO_END            S3C64XX_GPIO_END
+
+/* define the number of gpios we need to the one after the GPQ() range */
+#define ARCH_NR_GPIOS   (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
+
+#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c6400/include/mach/hardware.h
new file mode 100644
index 000000000000..862d033e57a4
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/hardware.h
@@ -0,0 +1,16 @@
+/* linux/arch/arm/mach-s3c6400/include/mach/hardware.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C6400 - Hardware support
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h
new file mode 100644
index 000000000000..b38c47cffc28
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/irqs.h
@@ -0,0 +1,20 @@
+/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C6400 - IRQ definitions
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H __FILE__
+
+#ifndef __ASM_ARM_IRQ_H
+#error "Do not include this directly, instead #include <asm/irq.h>"
+#endif
+
+#include <plat/irqs.h>
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h
new file mode 100644
index 000000000000..cff27d813fc6
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/map.h
@@ -0,0 +1,68 @@
+/* linux/arch/arm/mach-s3c6400/include/mach/map.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C64XX - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+
+/* HSMMC units */
+#define S3C64XX_PA_HSMMC(x)     (0x7C200000 + ((x) * 0x100000))
+#define S3C64XX_PA_HSMMC0       S3C64XX_PA_HSMMC(0)
+#define S3C64XX_PA_HSMMC1       S3C64XX_PA_HSMMC(1)
+#define S3C64XX_PA_HSMMC2       S3C64XX_PA_HSMMC(2)
+
+#define S3C_PA_UART             (0x7F005000)
+#define S3C_PA_UART0            (S3C_PA_UART + 0x00)
+#define S3C_PA_UART1            (S3C_PA_UART + 0x400)
+#define S3C_PA_UART2            (S3C_PA_UART + 0x800)
+#define S3C_PA_UART3            (S3C_PA_UART + 0xC00)
+#define S3C_UART_OFFSET         (0x400)
+
+/* See notes on UART VA mapping in debug-macro.S */
+#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
+
+#define S3C_VA_UART0            S3C_VA_UARTx(0)
+#define S3C_VA_UART1            S3C_VA_UARTx(1)
+#define S3C_VA_UART2            S3C_VA_UARTx(2)
+#define S3C_VA_UART3            S3C_VA_UARTx(3)
+
+#define S3C64XX_PA_FB           (0x77100000)
+#define S3C64XX_PA_SYSCON       (0x7E00F000)
+#define S3C64XX_PA_TIMER        (0x7F006000)
+#define S3C64XX_PA_IIC0         (0x7F004000)
+#define S3C64XX_PA_IIC1         (0x7F00F000)
+
+#define S3C64XX_PA_GPIO         (0x7F008000)
+#define S3C64XX_VA_GPIO         S3C_ADDR(0x00500000)
+#define S3C64XX_SZ_GPIO         SZ_4K
+
+#define S3C64XX_PA_SDRAM        (0x50000000)
+#define S3C64XX_PA_VIC0         (0x71200000)
+#define S3C64XX_PA_VIC1         (0x71300000)
+
+/* place VICs close together */
+#define S3C_VA_VIC0             (S3C_VA_IRQ + 0x00)
+#define S3C_VA_VIC1             (S3C_VA_IRQ + 0x10000)
+
+/* compatibiltiy defines. */
+#define S3C_PA_TIMER            S3C64XX_PA_TIMER
+#define S3C_PA_HSMMC0           S3C64XX_PA_HSMMC0
+#define S3C_PA_HSMMC1           S3C64XX_PA_HSMMC1
+#define S3C_PA_HSMMC2           S3C64XX_PA_HSMMC2
+#define S3C_PA_IIC              S3C64XX_PA_IIC0
+#define S3C_PA_IIC1             S3C64XX_PA_IIC1
+#define S3C_PA_FB               S3C64XX_PA_FB
+
+#endif /* __ASM_ARCH_6400_MAP_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c6400/include/mach/memory.h
new file mode 100644
index 000000000000..a3ac84a65480
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/memory.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s3c6400/include/mach/memory.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET     UL(0x50000000)
+
+#endif
diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..b25bedee0d52
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
@@ -0,0 +1,56 @@
+/* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64xx - pwm clock and timer support
+ */
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @tcfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << tcfg1;
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 1;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div);
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c6400/include/mach/regs-fb.h
new file mode 100644
index 000000000000..47019795ce06
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/regs-fb.h
@@ -0,0 +1,259 @@
+/* arch/arm/mach-s3c6400/include/mach/regs-fb.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C64XX - new-style framebuffer register definitions
+ *
+ * This is the register set for the new style framebuffer interface
+ * found from the S3C2443 onwards and specifically the S3C64XX series
+ * S3C6400 and S3C6410.
+ *
+ * The file contains the cpu specific items which change between whichever
+ * architecture is selected. See <plat/regs-fb.h> for the core definitions
+ * that are the same.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* include the core definitions here, in case we really do need to
+ * override them at a later date.
+*/
+
+#include <plat/regs-fb.h>
+
+#define S3C_FB_MAX_WIN (5)  /* number of hardware windows available. */
+#define VIDCON1_FSTATUS_EVEN    (1 << 15)
+
+/* Video timing controls */
+#define VIDTCON0                                (0x10)
+#define VIDTCON1                                (0x14)
+#define VIDTCON2                                (0x18)
+
+/* Window position controls */
+
+#define WINCON(_win)                            (0x20 + ((_win) * 4))
+
+/* OSD1 and OSD4 do not have register D */
+
+#define VIDOSD_A(_win)                          (0x40 + ((_win) * 16))
+#define VIDOSD_B(_win)                          (0x44 + ((_win) * 16))
+#define VIDOSD_C(_win)                          (0x48 + ((_win) * 16))
+#define VIDOSD_D(_win)                          (0x4C + ((_win) * 16))
+
+/* Video buffer addresses */
+
+#define VIDW_BUF_START(_buff)                   (0xA0 + ((_buff) * 8))
+#define VIDW_BUF_START1(_buff)                  (0xA4 + ((_buff) * 8))
+#define VIDW_BUF_END(_buff)                     (0xD0 + ((_buff) * 8))
+#define VIDW_BUF_END1(_buff)                    (0xD4 + ((_buff) * 8))
+#define VIDW_BUF_SIZE(_buff)                    (0x100 + ((_buff) * 4))
+
+#define VIDINTCON0                              (0x130)
+
+#define WxKEYCONy(_win, _con)                   ((0x140 + ((_win) * 8)) + ((_con) * 4))
+
+/* WINCONx */
+
+#define WINCONx_CSCWIDTH_MASK                   (0x3 << 26)
+#define WINCONx_CSCWIDTH_SHIFT                  (26)
+#define WINCONx_CSCWIDTH_WIDE                   (0x0 << 26)
+#define WINCONx_CSCWIDTH_NARROW                 (0x3 << 26)
+
+#define WINCONx_ENLOCAL                         (1 << 22)
+#define WINCONx_BUFSTATUS                       (1 << 21)
+#define WINCONx_BUFSEL                          (1 << 20)
+#define WINCONx_BUFAUTOEN                       (1 << 19)
+#define WINCONx_YCbCr                           (1 << 13)
+
+#define WINCON1_LOCALSEL_CAMIF                  (1 << 23)
+
+#define WINCON2_LOCALSEL_CAMIF                  (1 << 23)
+#define WINCON2_BLD_PIX                         (1 << 6)
+
+#define WINCON2_ALPHA_SEL                       (1 << 1)
+#define WINCON2_BPPMODE_MASK                    (0xf << 2)
+#define WINCON2_BPPMODE_SHIFT                   (2)
+#define WINCON2_BPPMODE_1BPP                    (0x0 << 2)
+#define WINCON2_BPPMODE_2BPP                    (0x1 << 2)
+#define WINCON2_BPPMODE_4BPP                    (0x2 << 2)
+#define WINCON2_BPPMODE_8BPP_1232               (0x4 << 2)
+#define WINCON2_BPPMODE_16BPP_565               (0x5 << 2)
+#define WINCON2_BPPMODE_16BPP_A1555             (0x6 << 2)
+#define WINCON2_BPPMODE_16BPP_I1555             (0x7 << 2)
+#define WINCON2_BPPMODE_18BPP_666               (0x8 << 2)
+#define WINCON2_BPPMODE_18BPP_A1665             (0x9 << 2)
+#define WINCON2_BPPMODE_19BPP_A1666             (0xa << 2)
+#define WINCON2_BPPMODE_24BPP_888               (0xb << 2)
+#define WINCON2_BPPMODE_24BPP_A1887             (0xc << 2)
+#define WINCON2_BPPMODE_25BPP_A1888             (0xd << 2)
+#define WINCON2_BPPMODE_28BPP_A4888             (0xd << 2)
+
+#define WINCON3_BLD_PIX                         (1 << 6)
+
+#define WINCON3_ALPHA_SEL                       (1 << 1)
+#define WINCON3_BPPMODE_MASK                    (0xf << 2)
+#define WINCON3_BPPMODE_SHIFT                   (2)
+#define WINCON3_BPPMODE_1BPP                    (0x0 << 2)
+#define WINCON3_BPPMODE_2BPP                    (0x1 << 2)
+#define WINCON3_BPPMODE_4BPP                    (0x2 << 2)
+#define WINCON3_BPPMODE_16BPP_565               (0x5 << 2)
+#define WINCON3_BPPMODE_16BPP_A1555             (0x6 << 2)
+#define WINCON3_BPPMODE_16BPP_I1555             (0x7 << 2)
+#define WINCON3_BPPMODE_18BPP_666               (0x8 << 2)
+#define WINCON3_BPPMODE_18BPP_A1665             (0x9 << 2)
+#define WINCON3_BPPMODE_19BPP_A1666             (0xa << 2)
+#define WINCON3_BPPMODE_24BPP_888               (0xb << 2)
+#define WINCON3_BPPMODE_24BPP_A1887             (0xc << 2)
+#define WINCON3_BPPMODE_25BPP_A1888             (0xd << 2)
+#define WINCON3_BPPMODE_28BPP_A4888             (0xd << 2)
+
+#define VIDINTCON0_FIFIOSEL_WINDOW2             (0x10 << 5)
+#define VIDINTCON0_FIFIOSEL_WINDOW3             (0x20 << 5)
+#define VIDINTCON0_FIFIOSEL_WINDOW4             (0x40 << 5)
+
+#define DITHMODE                                (0x170)
+#define WINxMAP(_win)                           (0x180 + ((_win) * 4))
+
+
+#define DITHMODE_R_POS_MASK                     (0x3 << 5)
+#define DITHMODE_R_POS_SHIFT                    (5)
+#define DITHMODE_R_POS_8BIT                     (0x0 << 5)
+#define DITHMODE_R_POS_6BIT                     (0x1 << 5)
+#define DITHMODE_R_POS_5BIT                     (0x2 << 5)
+
+#define DITHMODE_G_POS_MASK                     (0x3 << 3)
+#define DITHMODE_G_POS_SHIFT                    (3)
+#define DITHMODE_G_POS_8BIT                     (0x0 << 3)
+#define DITHMODE_G_POS_6BIT                     (0x1 << 3)
+#define DITHMODE_G_POS_5BIT                     (0x2 << 3)
+
+#define DITHMODE_B_POS_MASK                     (0x3 << 1)
+#define DITHMODE_B_POS_SHIFT                    (1)
+#define DITHMODE_B_POS_8BIT                     (0x0 << 1)
+#define DITHMODE_B_POS_6BIT                     (0x1 << 1)
+#define DITHMODE_B_POS_5BIT                     (0x2 << 1)
+
+#define DITHMODE_DITH_EN                        (1 << 0)
+
+#define WPALCON                                 (0x1A0)
+
+#define WPALCON_W4PAL_16BPP_A555                (1 << 8)
+#define WPALCON_W3PAL_16BPP_A555                (1 << 7)
+#define WPALCON_W2PAL_16BPP_A555                (1 << 6)
+
+/* Palette registers */
+
+#define WIN2_PAL(_entry)                        (0x300 + ((_entry) * 2))
+#define WIN3_PAL(_entry)                        (0x320 + ((_entry) * 2))
+#define WIN4_PAL(_entry)                        (0x340 + ((_entry) * 2))
+#define WIN0_PAL(_entry)                        (0x400 + ((_entry) * 4))
+#define WIN1_PAL(_entry)                        (0x800 + ((_entry) * 4))
+
+/* system specific implementation code for palette sizes, and other
+ * information that changes depending on which architecture is being
+ * compiled.
+*/
+
+/* return true if window _win has OSD register D */
+#define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0)
+
+static inline unsigned int s3c_fb_win_pal_size(unsigned int win)
+{
+        if (win < 2)
+                return 256;
+        if (win < 4)
+                return 16;
+        if (win == 4)
+                return 4;
+
+        BUG();  /* shouldn't get here */
+}
+
+static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp)
+{
+        /* all windows can do 1/2 bpp */
+
+        if ((bpp == 25 || bpp == 19) && win == 0)
+                return 0;       /* win 0 does not have 19 or 25bpp modes */
+
+        if (bpp == 4 && win == 4)
+                return 0;
+
+        if (bpp == 8 && (win >= 3))
+                return 0;       /* win 3/4 cannot do 8bpp in any mode */
+
+        return 1;
+}
+
+static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg)
+{
+        switch (window) {
+        case 0: return WIN0_PAL(reg);
+        case 1: return WIN1_PAL(reg);
+        case 2: return WIN2_PAL(reg);
+        case 3: return WIN3_PAL(reg);
+        case 4: return WIN4_PAL(reg);
+        }
+
+        BUG();
+}
+
+static inline int s3c_fb_pal_is16(unsigned int window)
+{
+        return window > 1;
+}
+
+struct s3c_fb_palette {
+        struct fb_bitfield      r;
+        struct fb_bitfield      g;
+        struct fb_bitfield      b;
+        struct fb_bitfield      a;
+};
+
+static inline void s3c_fb_init_palette(unsigned int window,
+                                       struct s3c_fb_palette *palette)
+{
+        if (window < 2) {
+                /* Windows 0/1 are 8/8/8 or A/8/8/8 */
+                palette->r.offset = 16;
+                palette->r.length = 8;
+                palette->g.offset = 8;
+                palette->g.length = 8;
+                palette->b.offset = 0;
+                palette->b.length = 8;
+        } else {
+                /* currently we assume RGB 5/6/5 */
+                palette->r.offset = 11;
+                palette->r.length = 5;
+                palette->g.offset = 5;
+                palette->g.length = 6;
+                palette->b.offset = 0;
+                palette->b.length = 5;
+        }
+}
+
+/* Notes on per-window bpp settings
+ *
+ * Value        Win0     Win1     Win2     Win3     Win 4
+ * 0000         1(P)     1(P)     1(P)     1(P)     1(P)
+ * 0001         2(P)     2(P)     2(P)     2(P)     2(P)
+ * 0010         4(P)     4(P)     4(P)     4(P)     -none-
+ * 0011         8(P)     8(P)     -none-   -none-   -none-
+ * 0100         -none-   8(A232)  8(A232)  -none-   -none-
+ * 0101         16(565)  16(565)  16(565)  16(565)   16(565)
+ * 0110         -none-   16(A555) 16(A555) 16(A555)  16(A555)
+ * 0111         16(I555) 16(I565) 16(I555) 16(I555)  16(I555)
+ * 1000         18(666)  18(666)  18(666)  18(666)   18(666)
+ * 1001         -none-   18(A665) 18(A665) 18(A665)  16(A665)
+ * 1010         -none-   19(A666) 19(A666) 19(A666)  19(A666)
+ * 1011         24(888)  24(888)  24(888)  24(888)   24(888)
+ * 1100         -none-   24(A887) 24(A887) 24(A887)  24(A887)
+ * 1101         -none-   25(A888) 25(A888) 25(A888)  25(A888)
+ * 1110         -none-   -none-   -none-   -none-    -none-
+ * 1111         -none-   -none-   -none-   -none-    -none-
+*/
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c6400/include/mach/regs-irq.h
new file mode 100644
index 000000000000..bcce68a0bb75
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/regs-irq.h
@@ -0,0 +1,20 @@
+/* linux/arch/arm/mach-s3c6400/include/mach/regs-irq.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C64XX - IRQ register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_IRQ_H
+#define __ASM_ARCH_REGS_IRQ_H __FILE__
+
+#include <asm/hardware/vic.h>
+
+#endif /* __ASM_ARCH_6400_REGS_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c6400/include/mach/system.h
new file mode 100644
index 000000000000..652bbc403f0b
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/system.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s3c6400/include/mach/system.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C6400 - system implementation
+ */
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H __FILE__
+
+static void arch_idle(void)
+{
+        /* nothing here yet */
+}
+
+static void arch_reset(char mode)
+{
+        /* nothing here yet */
+}
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c6400/include/mach/tick.h
new file mode 100644
index 000000000000..d9c0dc7014ec
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/tick.h
@@ -0,0 +1,29 @@
+/* linux/arch/arm/mach-s3c6400/include/mach/tick.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C64XX - Timer tick support definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TICK_H
+#define __ASM_ARCH_TICK_H __FILE__
+
+/* note, the timer interrutps turn up in 2 places, the vic and then
+ * the timer block. We take the VIC as the base at the moment.
+ */
+static inline u32 s3c24xx_ostimer_pending(void)
+{
+        u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
+        return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0));
+}
+
+#define TICK_MAX        (0xffffffff)
+
+#endif /* __ASM_ARCH_6400_TICK_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c6400/include/mach/uncompress.h
new file mode 100644
index 000000000000..c6a82a20bf2a
--- /dev/null
+++ b/arch/arm/mach-s3c6400/include/mach/uncompress.h
@@ -0,0 +1,28 @@
+/* arch/arm/mach-s3c6400/include/mach/uncompress.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C6400 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+#include <plat/uncompress.h>
+
+static void arch_detect_cpu(void)
+{
+        /* we do not need to do any cpu detection here at the moment. */
+        fifo_mask = S3C2440_UFSTAT_TXMASK;
+        fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT;
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c6410/Kconfig
new file mode 100644
index 000000000000..1d5010070027
--- /dev/null
+++ b/arch/arm/mach-s3c6410/Kconfig
@@ -0,0 +1,62 @@
+# arch/arm/mach-s3c6410/Kconfig
+#
+# Copyright 2008 Openmoko, Inc.
+# Copyright 2008 Simtec Electronics
+#
+# Licensed under GPLv2
+
+# Configuration options for the S3C6410 CPU
+
+config CPU_S3C6410
+        bool
+        select CPU_S3C6400_INIT
+        select CPU_S3C6400_CLOCK
+        help
+          Enable S3C6410 CPU support
+
+config S3C6410_SETUP_SDHCI
+        bool
+        help
+          Internal helper functions for S3C6410 based SDHCI systems
+
+config MACH_SMDK6410
+        bool "SMDK6410"
+        select CPU_S3C6410
+        select S3C_DEV_HSMMC
+        select S3C_DEV_HSMMC1
+        select S3C_DEV_I2C1
+        select S3C_DEV_FB
+        select S3C6410_SETUP_SDHCI
+        select S3C64XX_SETUP_I2C1
+        select S3C64XX_SETUP_FB_24BPP
+        help
+          Machine support for the Samsung SMDK6410
+
+# At least some of the SMDK6410s were shipped with the card detect
+# for the MMC/SD slots connected to the same input. This means that
+# either the boards need to be altered to have channel0 to an alternate
+# configuration or that only one slot can be used.
+
+choice
+        prompt "SMDK6410 MMC/SD slot setup"
+        depends on MACH_SMDK6410
+
+config SMDK6410_SD_CH0
+        bool "Use channel 0 only"
+        depends on MACH_SMDK6410
+        help
+          Select CON7 (channel 0) as the MMC/SD slot, as
+          at least some SMDK6410 boards come with the
+          resistors fitted so that the card detects for
+          channels 0 and 1 are the same.
+       
+config SMDK6410_SD_CH1
+        bool "Use channel 1 only"
+        depends on MACH_SMDK6410
+        help
+          Select CON6 (channel 1) as the MMC/SD slot, as
+          at least some SMDK6410 boards come with the
+          resistors fitted so that the card detects for
+          channels 0 and 1 are the same.
+
+endchoice
diff --git a/arch/arm/mach-s3c6410/Makefile b/arch/arm/mach-s3c6410/Makefile
new file mode 100644
index 000000000000..2cd4f189036b
--- /dev/null
+++ b/arch/arm/mach-s3c6410/Makefile
@@ -0,0 +1,23 @@
+# arch/arm/plat-s3c6410/Makefile
+#
+# Copyright 2008 Openmoko, Inc.
+# Copyright 2008 Simtec Electronics
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S3C6410 system
+
+obj-$(CONFIG_CPU_S3C6410)       += cpu.o
+
+# Helper and device support
+
+obj-$(CONFIG_S3C6410_SETUP_SDHCI)       += setup-sdhci.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDK6410)     += mach-smdk6410.o
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c6410/cpu.c
new file mode 100644
index 000000000000..6a73ca6b7a3a
--- /dev/null
+++ b/arch/arm/mach-s3c6410/cpu.c
@@ -0,0 +1,101 @@
+/* linux/arch/arm/mach-s3c6410/cpu.c
+ *
+ * Copyright 2008 Simtec Electronics
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/hardware.h>
+#include <asm/irq.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/regs-serial.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/sdhci.h>
+#include <plat/iic-core.h>
+#include <plat/s3c6400.h>
+#include <plat/s3c6410.h>
+
+/* Initial IO mappings */
+
+static struct map_desc s3c6410_iodesc[] __initdata = {
+};
+
+/* s3c6410_map_io
+ *
+ * register the standard cpu IO areas
+*/
+
+void __init s3c6410_map_io(void)
+{
+        iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc));
+
+        /* initialise device information early */
+        s3c6410_default_sdhci0();
+        s3c6410_default_sdhci1();
+
+        /* the i2c devices are directly compatible with s3c2440 */
+        s3c_i2c0_setname("s3c2440-i2c");
+        s3c_i2c1_setname("s3c2440-i2c");
+}
+
+void __init s3c6410_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
+        s3c24xx_register_baseclocks(xtal);
+        s3c64xx_register_clocks();
+        s3c6400_register_clocks();
+        s3c6400_setup_clocks();
+}
+
+void __init s3c6410_init_irq(void)
+{
+        /* VIC0 is missing IRQ7, VIC1 is fully populated. */
+        s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
+}
+
+struct sysdev_class s3c6410_sysclass = {
+        .name   = "s3c6410-core",
+};
+
+static struct sys_device s3c6410_sysdev = {
+        .cls    = &s3c6410_sysclass,
+};
+
+static int __init s3c6410_core_init(void)
+{
+        return sysdev_class_register(&s3c6410_sysclass);
+}
+
+core_initcall(s3c6410_core_init);
+
+int __init s3c6410_init(void)
+{
+        printk("S3C6410: Initialising architecture\n");
+
+        return sysdev_register(&s3c6410_sysdev);
+}
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c
new file mode 100644
index 000000000000..3c4d47145c83
--- /dev/null
+++ b/arch/arm/mach-s3c6410/mach-smdk6410.c
@@ -0,0 +1,185 @@
+/* linux/arch/arm/mach-s3c6410/mach-smdk6410.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+
+#include <video/platform_lcd.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/regs-fb.h>
+#include <mach/map.h>
+
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+#include <plat/regs-serial.h>
+#include <plat/iic.h>
+#include <plat/fb.h>
+
+#include <plat/s3c6410.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
+#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
+#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
+
+static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport      = 0,
+                .flags       = 0,
+                .ucon        = 0x3c5,
+                .ulcon       = 0x03,
+                .ufcon       = 0x51,
+        },
+        [1] = {
+                .hwport      = 1,
+                .flags       = 0,
+                .ucon        = 0x3c5,
+                .ulcon       = 0x03,
+                .ufcon       = 0x51,
+        },
+};
+
+/* framebuffer and LCD setup. */
+
+/* GPF15 = LCD backlight control
+ * GPF13 => Panel power
+ * GPN5 = LCD nRESET signal
+ * PWM_TOUT1 => backlight brightness
+ */
+
+static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
+                                   unsigned int power)
+{
+        if (power) {
+                gpio_direction_output(S3C64XX_GPF(13), 1);
+                gpio_direction_output(S3C64XX_GPF(15), 1);
+
+                /* fire nRESET on power up */
+                gpio_direction_output(S3C64XX_GPN(5), 0);
+                msleep(10);
+                gpio_direction_output(S3C64XX_GPN(5), 1);
+                msleep(1);
+        } else {
+                gpio_direction_output(S3C64XX_GPF(15), 0);
+                gpio_direction_output(S3C64XX_GPF(13), 0);
+        }
+}
+
+static struct plat_lcd_data smdk6410_lcd_power_data = {
+        .set_power      = smdk6410_lcd_power_set,
+};
+
+static struct platform_device smdk6410_lcd_powerdev = {
+        .name                   = "platform-lcd",
+        .dev.parent             = &s3c_device_fb.dev,
+        .dev.platform_data      = &smdk6410_lcd_power_data,
+};
+
+static struct s3c_fb_pd_win smdk6410_fb_win0 = {
+        /* this is to ensure we use win0 */
+        .win_mode       = {
+                .pixclock       = 41094,
+                .left_margin    = 8,
+                .right_margin   = 13,
+                .upper_margin   = 7,
+                .lower_margin   = 5,
+                .hsync_len      = 3,
+                .vsync_len      = 1,
+                .xres           = 800,
+                .yres           = 480,
+        },
+        .max_bpp        = 32,
+        .default_bpp    = 16,
+};
+
+/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
+static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
+        .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
+        .win[0]         = &smdk6410_fb_win0,
+        .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+        .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+};
+
+struct map_desc smdk6410_iodesc[] = {};
+
+static struct platform_device *smdk6410_devices[] __initdata = {
+#ifdef CONFIG_SMDK6410_SD_CH0
+        &s3c_device_hsmmc0,
+#endif
+#ifdef CONFIG_SMDK6410_SD_CH1
+        &s3c_device_hsmmc1,
+#endif
+        &s3c_device_i2c0,
+        &s3c_device_i2c1,
+        &s3c_device_fb,
+        &smdk6410_lcd_powerdev,
+};
+
+static struct i2c_board_info i2c_devs0[] __initdata = {
+        { I2C_BOARD_INFO("24c08", 0x50), },
+        { I2C_BOARD_INFO("WM8580", 0X1b), },
+};
+
+static struct i2c_board_info i2c_devs1[] __initdata = {
+        { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
+};
+
+static void __init smdk6410_map_io(void)
+{
+        s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
+        s3c24xx_init_clocks(12000000);
+        s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
+}
+
+static void __init smdk6410_machine_init(void)
+{
+        s3c_i2c0_set_platdata(NULL);
+        s3c_i2c1_set_platdata(NULL);
+        s3c_fb_set_platdata(&smdk6410_lcd_pdata);
+
+        i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
+        i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
+
+        platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
+}
+
+MACHINE_START(SMDK6410, "SMDK6410")
+        /* Maintainer: Ben Dooks <ben@fluff.org> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S3C64XX_PA_SDRAM + 0x100,
+
+        .init_irq       = s3c6410_init_irq,
+        .map_io         = smdk6410_map_io,
+        .init_machine   = smdk6410_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c
new file mode 100644
index 000000000000..0b5788bd5985
--- /dev/null
+++ b/arch/arm/mach-s3c6410/setup-sdhci.c
@@ -0,0 +1,102 @@
+/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
+ *
+ * Copyright 2008 Simtec Electronics
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <linux/mmc/card.h>
+#include <linux/mmc/host.h>
+
+#include <mach/gpio.h>
+#include <plat/gpio-cfg.h>
+#include <plat/regs-sdhci.h>
+#include <plat/sdhci.h>
+
+/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
+
+char *s3c6410_hsmmc_clksrcs[4] = {
+        [0] = "hsmmc",
+        [1] = "hsmmc",
+        [2] = "mmc_bus",
+        /* [3] = "48m", - note not succesfully used yet */
+};
+
+void s3c6410_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
+{
+        unsigned int gpio;
+        unsigned int end;
+
+        end = S3C64XX_GPG(2 + width);
+
+        /* Set all the necessary GPG pins to special-function 0 */
+        for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2));
+}
+
+void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
+                                    void __iomem *r,
+                                    struct mmc_ios *ios,
+                                    struct mmc_card *card)
+{
+        u32 ctrl2, ctrl3;
+
+        /* don't need to alter anything acording to card-type */
+
+        writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
+
+        ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
+        ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
+        ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
+                  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
+                  S3C_SDHCI_CTRL2_ENFBCLKRX |
+                  S3C_SDHCI_CTRL2_DFCNT_NONE |
+                  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
+
+        if (ios->clock < 25 * 1000000)
+                ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
+                         S3C_SDHCI_CTRL3_FCSEL2 |
+                         S3C_SDHCI_CTRL3_FCSEL1 |
+                         S3C_SDHCI_CTRL3_FCSEL0);
+        else
+                ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
+
+        printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
+        writel(ctrl2, r + S3C_SDHCI_CONTROL2);
+        writel(ctrl3, r + S3C_SDHCI_CONTROL3);
+}
+
+void s3c6410_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
+{
+        unsigned int gpio;
+        unsigned int end;
+
+        end = S3C64XX_GPH(2 + width);
+
+        /* Set all the necessary GPG pins to special-function 0 */
+        for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3));
+}
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index 43c30f84abf2..dab3c6347a8f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -3,6 +3,7 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/device.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
@@ -14,36 +15,39 @@
 #include <mach/hardware.h>
 
 /*
- * Very simple clock implementation - we only have one clock to
- * deal with at the moment, so we only match using the "name".
+ * Very simple clock implementation - we only have one clock to deal with.
  */
 struct clk {
-        struct list_head        node;
-        unsigned long           rate;
-        const char              *name;
         unsigned int            enabled;
-        void                    (*enable)(void);
-        void                    (*disable)(void);
 };
 
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
+static void clk_gpio27_enable(void)
+{
+        /*
+         * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
+         * (SA-1110 Developer's Manual, section 9.1.2.1)
+         */
+        GAFR |= GPIO_32_768kHz;
+        GPDR |= GPIO_32_768kHz;
+        TUCR = TUCR_3_6864MHz;
+}
+
+static void clk_gpio27_disable(void)
+{
+        TUCR = 0;
+        GPDR &= ~GPIO_32_768kHz;
+        GAFR &= ~GPIO_32_768kHz;
+}
+
+static struct clk clk_gpio27;
+
 static DEFINE_SPINLOCK(clocks_lock);
 
 struct clk *clk_get(struct device *dev, const char *id)
 {
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
+        const char *devname = dev_name(dev);
 
-        return clk;
+        return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
 }
 EXPORT_SYMBOL(clk_get);
 
@@ -58,7 +62,7 @@ int clk_enable(struct clk *clk)
 
         spin_lock_irqsave(&clocks_lock, flags);
         if (clk->enabled++ == 0)
-                clk->enable();
+                clk_gpio27_enable();
         spin_unlock_irqrestore(&clocks_lock, flags);
         return 0;
 }
@@ -72,63 +76,13 @@ void clk_disable(struct clk *clk)
 
         spin_lock_irqsave(&clocks_lock, flags);
         if (--clk->enabled == 0)
-                clk->disable();
+                clk_gpio27_disable();
         spin_unlock_irqrestore(&clocks_lock, flags);
 }
 EXPORT_SYMBOL(clk_disable);
 
 unsigned long clk_get_rate(struct clk *clk)
 {
-        return clk->rate;
+        return 3686400;
 }
 EXPORT_SYMBOL(clk_get_rate);
-
-
-static void clk_gpio27_enable(void)
-{
-        /*
-         * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
-         * (SA-1110 Developer's Manual, section 9.1.2.1)
-         */
-        GAFR |= GPIO_32_768kHz;
-        GPDR |= GPIO_32_768kHz;
-        TUCR = TUCR_3_6864MHz;
-}
-
-static void clk_gpio27_disable(void)
-{
-        TUCR = 0;
-        GPDR &= ~GPIO_32_768kHz;
-        GAFR &= ~GPIO_32_768kHz;
-}
-
-static struct clk clk_gpio27 = {
-        .name           = "SA1111_CLK",
-        .rate           = 3686400,
-        .enable         = clk_gpio27_enable,
-        .disable        = clk_gpio27_disable,
-};
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        clk_register(&clk_gpio27);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index fe289997cfaf..2052eb88c961 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -68,23 +68,22 @@ struct platform_device colliescoop_device = {
 };
 
 static struct scoop_pcmcia_dev collie_pcmcia_scoop[] = {
-{
-       .dev        = &colliescoop_device.dev,
-       .irq        = COLLIE_IRQ_GPIO_CF_IRQ,
-       .cd_irq     = COLLIE_IRQ_GPIO_CF_CD,
-       .cd_irq_str = "PCMCIA0 CD",
-},
+        {
+        .dev            = &colliescoop_device.dev,
+        .irq            = COLLIE_IRQ_GPIO_CF_IRQ,
+        .cd_irq         = COLLIE_IRQ_GPIO_CF_CD,
+        .cd_irq_str     = "PCMCIA0 CD",
+        },
 };
 
 static struct scoop_pcmcia_config collie_pcmcia_config = {
-        .devs         = &collie_pcmcia_scoop[0],
-        .num_devs     = 1,
+        .devs           = &collie_pcmcia_scoop[0],
+        .num_devs       = 1,
 };
 
-
 static struct mcp_plat_data collie_mcp_data = {
-        .mccr0          = MCCR0_ADM | MCCR0_ExtClk,
-        .sclk_rate      = 9216000,
+        .mccr0          = MCCR0_ADM | MCCR0_ExtClk,
+        .sclk_rate      = 9216000,
 };
 
 #ifdef CONFIG_SHARP_LOCOMO
@@ -95,14 +94,14 @@ struct platform_device collie_locomo_device;
 
 static void collie_uart_set_mctrl(struct uart_port *port, u_int mctrl)
 {
-        if (mctrl & TIOCM_RTS)
+        if (mctrl & TIOCM_RTS)
                 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0);
-        else
+        else
                 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 1);
 
-        if (mctrl & TIOCM_DTR)
+        if (mctrl & TIOCM_DTR)
                 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0);
-        else
+        else
                 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 1);
 }
 
diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c
index b1161fc80602..b39307f26b52 100644
--- a/arch/arm/mach-sa1100/collie_pm.c
+++ b/arch/arm/mach-sa1100/collie_pm.c
@@ -26,7 +26,7 @@
 #include <asm/irq.h>
 #include <mach/hardware.h>
 #include <asm/hardware/scoop.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 #include <mach/collie.h>
 #include <asm/mach/sharpsl_param.h>
 #include <asm/hardware/sharpsl_pm.h>
@@ -263,24 +263,24 @@ static int __init collie_pm_ucb_add(struct ucb1x00_dev *pdev)
 }
 
 static struct ucb1x00_driver collie_pm_ucb_driver = {
-        .add            = collie_pm_ucb_add,
+        .add    = collie_pm_ucb_add,
 };
 
 static struct platform_device *collie_pm_device;
 
 static int __init collie_pm_init(void)
 {
-        int ret;
+        int ret;
 
-        collie_pm_device = platform_device_alloc("sharpsl-pm", -1);
-        if (!collie_pm_device)
-                return -ENOMEM;
+        collie_pm_device = platform_device_alloc("sharpsl-pm", -1);
+        if (!collie_pm_device)
+                return -ENOMEM;
 
-        collie_pm_device->dev.platform_data = &collie_pm_machinfo;
-        ret = platform_device_add(collie_pm_device);
+        collie_pm_device->dev.platform_data = &collie_pm_machinfo;
+        ret = platform_device_add(collie_pm_device);
 
-        if (ret)
-                platform_device_put(collie_pm_device);
+        if (ret)
+                platform_device_put(collie_pm_device);
 
         if (!ret)
                 ret = ucb1x00_register_driver(&collie_pm_ucb_driver);
@@ -291,7 +291,7 @@ static int __init collie_pm_init(void)
 static void __exit collie_pm_exit(void)
 {
         ucb1x00_unregister_driver(&collie_pm_ucb_driver);
-        platform_device_unregister(collie_pm_device);
+        platform_device_unregister(collie_pm_device);
 }
 
 module_init(collie_pm_init);
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index 244d5956312c..ef817876a5d6 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -3,17 +3,17 @@
  *
  * Copyright (C) 2000 2001, The Delft University of Technology
  *
- * Authors: 
+ * Authors:
  * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
  * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
  *   - major rewrite for linux-2.3.99
- *   - rewritten for the more generic power management scheme in 
+ *   - rewritten for the more generic power management scheme in
  *     linux-2.4.5-rmk1
  *
  * This software has been developed while working on the LART
  * computing board (http://www.lartmaker.nl/), which is
  * sponsored by the Mobile Multi-media Communications
- * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications 
+ * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications
  * (http://www.ubicom.tudelft.nl/) projects.
  *
  * The authors can be reached at:
@@ -36,7 +36,7 @@
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
@@ -44,7 +44,7 @@
  *
  * Theory of operations
  * ====================
- * 
+ *
  * Clock scaling can be used to lower the power consumption of the CPU
  * core. This will give you a somewhat longer running time.
  *
@@ -58,11 +58,11 @@
  *   MDCNFG    0xA0000000    DRAM config
  *   MDCAS0    0xA0000004    Access waveform
  *   MDCAS1    0xA0000008    Access waveform
- *   MDCAS2    0xA000000C    Access waveform 
+ *   MDCAS2    0xA000000C    Access waveform
  *
  * Care must be taken to change the DRAM parameters the correct way,
  * because otherwise the DRAM becomes unusable and the kernel will
- * crash. 
+ * crash.
  *
  * The simple solution to avoid a kernel crash is to put the actual
  * clock change in ROM and jump to that code from the kernel. The main
@@ -75,7 +75,7 @@
  * as long as all re-configuration steps yield a valid DRAM
  * configuration. The advantages are clear: it will run on all SA-1100
  * platforms, and the code is very simple.
- * 
+ *
  * If you really want to understand what is going on in
  * sa1100_update_dram_timings(), you'll have to read sections 8.2,
  * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
@@ -97,7 +97,7 @@
 typedef struct {
         int speed;
         u32 mdcnfg;
-        u32 mdcas0; 
+        u32 mdcas0;
         u32 mdcas1;
         u32 mdcas2;
 } sa1100_dram_regs_t;
@@ -147,7 +147,7 @@ static void sa1100_update_dram_timings(int current_speed, int new_speed)
         /* No risk, no fun: run with interrupts on! */
         if (new_speed > current_speed) {
                 /* We're going FASTER, so first relax the memory
-                 * timings before changing the core frequency 
+                 * timings before changing the core frequency
                  */
                 
                 /* Half the memory access clock */
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c
index 3e4fb214eada..63b32b68b296 100644
--- a/arch/arm/mach-sa1100/cpu-sa1110.c
+++ b/arch/arm/mach-sa1100/cpu-sa1110.c
@@ -81,14 +81,14 @@ static struct sdram_params sdram_tbl[] __initdata = {
                 .twr            = 9,
                 .refresh        = 64000,
                 .cas_latency    = 3,
-        }, {    /* Samsung K4S281632B-1H */
-                .name           = "K4S281632B-1H",
-                .rows           = 12,
-                .tck            = 10,
-                .trp            = 20,
-                .twr            = 10,
-                .refresh        = 64000,
-                .cas_latency    = 3,
+        }, {    /* Samsung K4S281632B-1H */
+                .name           = "K4S281632B-1H",
+                .rows           = 12,
+                .tck            = 10,
+                .trp            = 20,
+                .twr            = 10,
+                .refresh        = 64000,
+                .cas_latency    = 3,
         }, {    /* Samsung KM416S4030CT */
                 .name           = "KM416S4030CT",
                 .rows           = 13,
@@ -220,7 +220,7 @@ sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram)
 }
 
 /*
- * Ok, set the CPU frequency.  
+ * Ok, set the CPU frequency.
  */
 static int sa1110_target(struct cpufreq_policy *policy,
                          unsigned int target_freq,
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index f990a3e85846..95f9c5a6d6d5 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -19,7 +19,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 
 #undef DEBUG
@@ -113,10 +113,10 @@ int sa1100_request_dma (dma_device_t device, const char *device_id,
                 }
         }
         if (!err) {
-               if (dma)
-                       dma->device = device;
-               else
-                       err = -ENOSR;
+                if (dma)
+                        dma->device = device;
+                else
+                        err = -ENOSR;
         }
         spin_unlock(&dma_list_lock);
         if (err)
diff --git a/arch/arm/mach-sa1100/include/mach/h3600.h b/arch/arm/mach-sa1100/include/mach/h3600.h
index 3ca0ecf095e6..9cc47fddb335 100644
--- a/arch/arm/mach-sa1100/include/mach/h3600.h
+++ b/arch/arm/mach-sa1100/include/mach/h3600.h
@@ -32,14 +32,14 @@ typedef int __bitwise pm_request_t;
 #define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800())
 
 /* Physical memory regions corresponding to chip selects */
-#define H3600_EGPIO_PHYS     (SA1100_CS5_PHYS + 0x01000000)
-#define H3600_BANK_2_PHYS    SA1100_CS2_PHYS
-#define H3600_BANK_4_PHYS    SA1100_CS4_PHYS
+#define H3600_EGPIO_PHYS        (SA1100_CS5_PHYS + 0x01000000)
+#define H3600_BANK_2_PHYS       SA1100_CS2_PHYS
+#define H3600_BANK_4_PHYS       SA1100_CS4_PHYS
 
 /* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */
-#define H3600_EGPIO_VIRT     0xf0000000
-#define H3600_BANK_2_VIRT    0xf1000000
-#define H3600_BANK_4_VIRT    0xf3800000
+#define H3600_EGPIO_VIRT        0xf0000000
+#define H3600_BANK_2_VIRT       0xf1000000
+#define H3600_BANK_4_VIRT       0xf3800000
 
 /*
    Machine-independent GPIO definitions
diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h
index b70846c096aa..60711822b125 100644
--- a/arch/arm/mach-sa1100/include/mach/hardware.h
+++ b/arch/arm/mach-sa1100/include/mach/hardware.h
@@ -59,6 +59,10 @@
 # define __REG(x)       (*((volatile unsigned long *)io_p2v(x)))
 # define __PREG(x)      (io_v2p((unsigned long)&(x)))
 
+static inline unsigned long get_clock_tick_rate(void)
+{
+        return 3686400;
+}
 #else
 
 # define __REG(x)       io_p2v(x)
diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h
index 0c070a6149bc..d8b43f3dcd2d 100644
--- a/arch/arm/mach-sa1100/include/mach/io.h
+++ b/arch/arm/mach-sa1100/include/mach/io.h
@@ -16,11 +16,7 @@
  * We don't actually have real ISA nor PCI buses, but there is so many 
  * drivers out there that might just work if we fake them...
  */
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-#define __io(a)                 __io(a)
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h
index 1c127b68581d..e9f8eed900f5 100644
--- a/arch/arm/mach-sa1100/include/mach/memory.h
+++ b/arch/arm/mach-sa1100/include/mach/memory.h
@@ -23,23 +23,12 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
         sa1111_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_1M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_1M)
 
 #endif
 #endif
 
 /*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- *
- * On the SA1100, bus addresses are equivalent to physical addresses.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
-/*
  * Because of the wide memory address space between physical RAM banks on the
  * SA1100, it's much convenient to use Linux's SparseMEM support to implement
  * our memory map representation.  Assuming all memory nodes have equal access
diff --git a/arch/arm/mach-sa1100/include/mach/mtd-xip.h b/arch/arm/mach-sa1100/include/mach/mtd-xip.h
index eaa09e86ad16..b3d684098fbf 100644
--- a/arch/arm/mach-sa1100/include/mach/mtd-xip.h
+++ b/arch/arm/mach-sa1100/include/mach/mtd-xip.h
@@ -15,6 +15,8 @@
 #ifndef __ARCH_SA1100_MTD_XIP_H__
 #define __ARCH_SA1100_MTD_XIP_H__
 
+#include <mach/hardware.h>
+
 #define xip_irqpending()        (ICIP & ICMR)
 
 /* we sample OSCR and convert desired delta to usec (1/4 ~= 1000000/3686400) */
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index e45d3a1890bc..e1458bc1868e 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -122,12 +122,12 @@ static void __init pleb_map_io(void)
         sa1100_map_io();
 
         sa1100_register_uart(0, 3);
-        sa1100_register_uart(1, 1);
+        sa1100_register_uart(1, 1);
 
-        GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
-        GPDR |= GPIO_UART_TXD;
-        GPDR &= ~GPIO_UART_RXD;
-        PPAR |= PPAR_UPR;
+        GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
+        GPDR |= GPIO_UART_TXD;
+        GPDR &= ~GPIO_UART_RXD;
+        PPAR |= PPAR_UPR;
 
         /*
          * Fix expansion memory timing for network card
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 9ccdd09cf69f..ddd917d1083d 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -33,7 +33,7 @@ static struct mtd_partition shannon_partitions[] = {
                 .offset         = MTDPART_OFS_APPEND,
                 .size           = 0xe0000
         },
-        { 
+        {
                 .name           = "initrd",
                 .offset         = MTDPART_OFS_APPEND,   
                 .size           = MTDPART_SIZ_FULL
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S
index 171441f96710..80f31bad707c 100644
--- a/arch/arm/mach-sa1100/sleep.S
+++ b/arch/arm/mach-sa1100/sleep.S
@@ -100,36 +100,36 @@ ENTRY(sa1100_cpu_suspend)
         ldr     r1, =MSC1
         ldr     r2, =MSC2
 
-        ldr     r3, [r0]
-        bic     r3, r3, #FMsk(MSC_RT)
-        bic     r3, r3, #FMsk(MSC_RT)<<16
+        ldr     r3, [r0]
+        bic     r3, r3, #FMsk(MSC_RT)
+        bic     r3, r3, #FMsk(MSC_RT)<<16
 
-        ldr     r4, [r1]
-        bic     r4, r4, #FMsk(MSC_RT)
-        bic     r4, r4, #FMsk(MSC_RT)<<16
+        ldr     r4, [r1]
+        bic     r4, r4, #FMsk(MSC_RT)
+        bic     r4, r4, #FMsk(MSC_RT)<<16
 
-        ldr     r5, [r2]
-        bic     r5, r5, #FMsk(MSC_RT)
-        bic     r5, r5, #FMsk(MSC_RT)<<16
+        ldr     r5, [r2]
+        bic     r5, r5, #FMsk(MSC_RT)
+        bic     r5, r5, #FMsk(MSC_RT)<<16
 
-        ldr     r6, =MDREFR
+        ldr     r6, =MDREFR
 
-        ldr     r7, [r6]
-        bic     r7, r7, #0x0000FF00
-        bic     r7, r7, #0x000000F0
-        orr     r8, r7, #MDREFR_SLFRSH
+        ldr     r7, [r6]
+bic     r7, r7, #0x0000FF00
+bic     r7, r7, #0x000000F0
+orr     r8, r7, #MDREFR_SLFRSH
 
-        ldr     r9, =MDCNFG
-        ldr     r10, [r9]
-        bic     r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
-        bic     r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
+        ldr     r9, =MDCNFG
+        ldr     r10, [r9]
+        bic     r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
+        bic     r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
 
-        bic     r11, r8, #MDREFR_SLFRSH
-        bic     r11, r11, #MDREFR_E1PIN
+        bic     r11, r8, #MDREFR_SLFRSH
+        bic     r11, r11, #MDREFR_E1PIN
 
-        ldr     r12, =PMCR
+        ldr     r12, =PMCR
 
-        mov     r13, #PMCR_SF
+        mov     r13, #PMCR_SF
 
         b       sa1110_sdram_controller_fix
 
@@ -188,10 +188,10 @@ ENTRY(sa1100_cpu_resume)
         mcr     p15, 0, r1, c8, c7, 0           @ flush I+D TLBs
         mcr     p15, 0, r1, c7, c7, 0           @ flush I&D cache
         mcr     p15, 0, r1, c9, c0, 0           @ invalidate RB
-        mcr     p15, 0, r1, c9, c0, 5           @ allow user space to use RB
+        mcr     p15, 0, r1, c9, c0, 5           @ allow user space to use RB
 
-        mcr     p15, 0, r4, c3, c0, 0           @ domain ID
-        mcr     p15, 0, r5, c2, c0, 0           @ translation table base addr
+        mcr     p15, 0, r4, c3, c0, 0           @ domain ID
+        mcr     p15, 0, r5, c2, c0, 0           @ translation table base addr
         mcr     p15, 0, r6, c13, c0, 0          @ PID
         b       resume_turn_on_mmu              @ cache align execution
 
@@ -209,7 +209,7 @@ sleep_save_sp:
 
         .text
 resume_after_mmu:
-        mcr     p15, 0, r1, c15, c1, 2          @ enable clock switching
+        mcr     p15, 0, r1, c15, c1, 2          @ enable clock switching
         ldmfd   sp!, {r4 - r12, pc}             @ return to caller
 
 
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 24c0a4bae850..711c0295c66f 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -2,8 +2,8 @@
  * linux/arch/arm/mach-sa1100/time.c
  *
  * Copyright (C) 1998 Deborah Wallach.
- * Twiddles  (C) 1999   Hugo Fiennes <hugo@empeg.com>
- * 
+ * Twiddles  (C) 1999 Hugo Fiennes <hugo@empeg.com>
+ *
  * 2000/03/29 (C) Nicolas Pitre <nico@cam.org>
  *      Rewritten: big cleanup, much simpler, better HZ accuracy.
  *
@@ -73,7 +73,6 @@ static struct clock_event_device ckevt_sa1100_osmr0 = {
         .features       = CLOCK_EVT_FEAT_ONESHOT,
         .shift          = 32,
         .rating         = 200,
-        .cpumask        = CPU_MASK_CPU0,
         .set_next_event = sa1100_osmr0_set_next_event,
         .set_mode       = sa1100_osmr0_set_mode,
 };
@@ -110,6 +109,7 @@ static void __init sa1100_timer_init(void)
                 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
         ckevt_sa1100_osmr0.min_delta_ns =
                 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
+        ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
 
         cksrc_sa1100_oscr.mult =
                 clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index a9400d984451..a23fd3d0163a 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -16,6 +16,8 @@
 #include <asm/leds.h>
 #include <asm/param.h>
 
+#include <mach/hardware.h>
+
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-shark/include/mach/hardware.h b/arch/arm/mach-shark/include/mach/hardware.h
index cb0ee2943c1a..01bf76099ce5 100644
--- a/arch/arm/mach-shark/include/mach/hardware.h
+++ b/arch/arm/mach-shark/include/mach/hardware.h
@@ -28,8 +28,6 @@
 #define ROMCARD_SIZE            0x08000000
 #define ROMCARD_START           0x10000000
 
-#define PCIO_BASE               0xe0000000
-
 
 /* defines for the Framebuffer */
 #define FB_START                0x06000000
diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h
index 92475922c068..c5cee829fc87 100644
--- a/arch/arm/mach-shark/include/mach/io.h
+++ b/arch/arm/mach-shark/include/mach/io.h
@@ -11,46 +11,10 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
+#define PCIO_BASE       0xe0000000
+#define IO_SPACE_LIMIT  0xffffffff
 
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We use two different types of addressing - PC style addresses, and ARM
- * addresses.  PC style accesses the PC hardware with the normal PC IO
- * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
- * and are translated to the start of IO.
- */
-#define __PORT_PCIO(x)  (!((x) & 0x80000000))
-
-#define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
-
-
-static inline unsigned int __ioaddr (unsigned int port)                 \
-{                                                                               \
-        if (__PORT_PCIO(port))                                                  \
-                return (unsigned int)(PCIO_BASE + (port));                      \
-        else                                                                    \
-                return (unsigned int)(IO_BASE + (port));                        \
-}
-
-#define __mem_pci(addr) (addr)
-
-/*
- * Translated address IO functions
- *
- * IO address has already been translated to a virtual address
- */
-#define outb_t(v,p)                                                             \
-        (*(volatile unsigned char *)(p) = (v))
-
-#define inb_t(p)                                                                \
-        (*(volatile unsigned char *)(p))
-
-#define outl_t(v,p)                                                             \
-        (*(volatile unsigned long *)(p) = (v))
-
-#define inl_t(p)                                                                \
-        (*(volatile unsigned long *)(p))
+#define __io(a)         ((void __iomem *)(PCIO_BASE + (a)))
+#define __mem_pci(addr) (addr)
 
 #endif
diff --git a/arch/arm/mach-shark/include/mach/dma.h b/arch/arm/mach-shark/include/mach/isa-dma.h
index c0a29bd2a74f..864298ff3927 100644
--- a/arch/arm/mach-shark/include/mach/dma.h
+++ b/arch/arm/mach-shark/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-shark/include/mach/dma.h
+ * arch/arm/mach-shark/include/mach/isa-dma.h
  *
  * by Alexander Schulz
  */
@@ -10,7 +10,6 @@
  * The rest is not DMAable. See dev /  .properties
  * in OpenFirmware.
  */
-#define MAX_DMA_ADDRESS         0xC0400000
 #define MAX_DMA_CHANNELS        8
 #define DMA_ISA_CASCADE         4
 
diff --git a/arch/arm/mach-shark/include/mach/memory.h b/arch/arm/mach-shark/include/mach/memory.h
index b7874ad9f9f6..c5ab038925d6 100644
--- a/arch/arm/mach-shark/include/mach/memory.h
+++ b/arch/arm/mach-shark/include/mach/memory.h
@@ -33,12 +33,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig
         __arch_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_4M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_4M)
 
 #endif
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 /*
  * Cache flushing area
  */
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index 95096afd5271..c781f30c8368 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -3,12 +3,14 @@ menu "Versatile platform type"
 
 config ARCH_VERSATILE_PB
         bool "Support Versatile/PB platform"
+        select CPU_ARM926T
         default y
         help
           Include support for the ARM(R) Versatile/PB platform.
 
 config MACH_VERSATILE_AB
         bool "Support Versatile/AB platform"
+        select CPU_ARM926T
         help
           Include support for the ARM(R) Versatile/AP platform.
 
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
index 58937f1fb38c..c50a44ea7ee6 100644
--- a/arch/arm/mach-versatile/clock.c
+++ b/arch/arm/mach-versatile/clock.c
@@ -10,6 +10,7 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/device.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
@@ -17,36 +18,11 @@
 #include <linux/clk.h>
 #include <linux/mutex.h>
 
+#include <asm/clkdev.h>
 #include <asm/hardware/icst307.h>
 
 #include "clock.h"
 
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
-
 int clk_enable(struct clk *clk)
 {
         return 0;
@@ -66,7 +42,9 @@ EXPORT_SYMBOL(clk_get_rate);
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-        return rate;
+        struct icst307_vco vco;
+        vco = icst307_khz_to_vco(clk->params, rate / 1000);
+        return icst307_khz(clk->params, vco) * 1000;
 }
 EXPORT_SYMBOL(clk_round_rate);
 
@@ -79,57 +57,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 
                 vco = icst307_khz_to_vco(clk->params, rate / 1000);
                 clk->rate = icst307_khz(clk->params, vco) * 1000;
-
-                printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
-                        clk->name, vco.s, vco.r, vco.v);
-
                 clk->setvco(clk, vco);
                 ret = 0;
         }
         return ret;
 }
 EXPORT_SYMBOL(clk_set_rate);
-
-/*
- * These are fixed clocks.
- */
-static struct clk kmi_clk = {
-        .name   = "KMIREFCLK",
-        .rate   = 24000000,
-};
-
-static struct clk uart_clk = {
-        .name   = "UARTCLK",
-        .rate   = 24000000,
-};
-
-static struct clk mmci_clk = {
-        .name   = "MCLK",
-        .rate   = 24000000,
-};
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        clk_register(&kmi_clk);
-        clk_register(&uart_clk);
-        clk_register(&mmci_clk);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-versatile/clock.h b/arch/arm/mach-versatile/clock.h
index 8b0b61dd17e4..03468fdc3e58 100644
--- a/arch/arm/mach-versatile/clock.h
+++ b/arch/arm/mach-versatile/clock.h
@@ -12,14 +12,9 @@ struct module;
 struct icst307_params;
 
 struct clk {
-        struct list_head        node;
         unsigned long           rate;
-        struct module           *owner;
-        const char              *name;
         const struct icst307_params *params;
+        u32                     oscoff;
         void                    *data;
         void                    (*setvco)(struct clk *, struct icst307_vco vco);
 };
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 565e0ba0d67e..1c43494f5c42 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -31,6 +31,7 @@
 #include <linux/cnt32_to_63.h>
 #include <linux/io.h>
 
+#include <asm/clkdev.h>
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -373,22 +374,60 @@ static const struct icst307_params versatile_oscvco_params = {
 
 static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco)
 {
-        void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET;
-        void __iomem *sys_osc = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET;
+        void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
+        void __iomem *sys_lock = sys + VERSATILE_SYS_LOCK_OFFSET;
         u32 val;
 
-        val = readl(sys_osc) & ~0x7ffff;
+        val = readl(sys + clk->oscoff) & ~0x7ffff;
         val |= vco.v | (vco.r << 9) | (vco.s << 16);
 
         writel(0xa05f, sys_lock);
-        writel(val, sys_osc);
+        writel(val, sys + clk->oscoff);
         writel(0, sys_lock);
 }
 
-static struct clk versatile_clcd_clk = {
-        .name   = "CLCDCLK",
+static struct clk osc4_clk = {
         .params = &versatile_oscvco_params,
-        .setvco = versatile_oscvco_set,
+        .oscoff = VERSATILE_SYS_OSCCLCD_OFFSET,
+        .setvco = versatile_oscvco_set,
+};
+
+/*
+ * These are fixed clocks.
+ */
+static struct clk ref24_clk = {
+        .rate   = 24000000,
+};
+
+static struct clk_lookup lookups[] __initdata = {
+        {       /* UART0 */
+                .dev_id         = "dev:f1",
+                .clk            = &ref24_clk,
+        }, {    /* UART1 */
+                .dev_id         = "dev:f2",
+                .clk            = &ref24_clk,
+        }, {    /* UART2 */
+                .dev_id         = "dev:f3",
+                .clk            = &ref24_clk,
+        }, {    /* UART3 */
+                .dev_id         = "fpga:09",
+                .clk            = &ref24_clk,
+        }, {    /* KMI0 */
+                .dev_id         = "fpga:06",
+                .clk            = &ref24_clk,
+        }, {    /* KMI1 */
+                .dev_id         = "fpga:07",
+                .clk            = &ref24_clk,
+        }, {    /* MMC0 */
+                .dev_id         = "fpga:05",
+                .clk            = &ref24_clk,
+        }, {    /* MMC1 */
+                .dev_id         = "fpga:0b",
+                .clk            = &ref24_clk,
+        }, {    /* CLCD */
+                .dev_id         = "dev:20",
+                .clk            = &osc4_clk,
+        }
 };
 
 /*
@@ -786,7 +825,8 @@ void __init versatile_init(void)
 {
         int i;
 
-        clk_register(&versatile_clcd_clk);
+        for (i = 0; i < ARRAY_SIZE(lookups); i++)
+                clkdev_add(&lookups[i]);
 
         platform_device_register(&versatile_flash_device);
         platform_device_register(&versatile_i2c_device);
@@ -965,7 +1005,7 @@ static void __init versatile_timer_init(void)
         timer0_clockevent.min_delta_ns =
                 clockevent_delta2ns(0xf, &timer0_clockevent);
 
-        timer0_clockevent.cpumask = cpumask_of_cpu(0);
+        timer0_clockevent.cpumask = cpumask_of(0);
         clockevents_register_device(&timer0_clockevent);
 }
 
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index afcaa858eb1f..9d39886a8351 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -34,7 +34,7 @@ extern unsigned int mmc_status(struct device *dev);
 static struct amba_device name##_device = {                     \
         .dev            = {                                     \
                 .coherent_dma_mask = ~0,                        \
-                .bus_id = busid,                                \
+                .init_name = busid,                             \
                 .platform_data = plat,                          \
         },                                                      \
         .res            = {                                     \
diff --git a/arch/arm/mach-versatile/include/mach/clkdev.h b/arch/arm/mach-versatile/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-versatile/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-versatile/include/mach/dma.h b/arch/arm/mach-versatile/include/mach/dma.h
deleted file mode 100644
index 0aabf12c8834..000000000000
--- a/arch/arm/mach-versatile/include/mach/dma.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/dma.h
- *
- *  Copyright (C) 2003 ARM Limited.
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
index c0b9dd1d0257..f067c14c7182 100644
--- a/arch/arm/mach-versatile/include/mach/io.h
+++ b/arch/arm/mach-versatile/include/mach/io.h
@@ -22,11 +22,7 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-#define __io(a) __io(a)
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-versatile/include/mach/irqs.h b/arch/arm/mach-versatile/include/mach/irqs.h
index 216a1312e62e..9bfdb30e1f3f 100644
--- a/arch/arm/mach-versatile/include/mach/irqs.h
+++ b/arch/arm/mach-versatile/include/mach/irqs.h
@@ -60,39 +60,6 @@
 #define IRQ_VICSOURCE31         (IRQ_VIC_START + INT_VICSOURCE31)
 #define IRQ_VIC_END             (IRQ_VIC_START + 31)
 
-#define IRQMASK_WDOGINT         INTMASK_WDOGINT
-#define IRQMASK_SOFTINT         INTMASK_SOFTINT
-#define IRQMASK_COMMRx          INTMASK_COMMRx
-#define IRQMASK_COMMTx          INTMASK_COMMTx
-#define IRQMASK_TIMERINT0_1     INTMASK_TIMERINT0_1
-#define IRQMASK_TIMERINT2_3     INTMASK_TIMERINT2_3
-#define IRQMASK_GPIOINT0        INTMASK_GPIOINT0
-#define IRQMASK_GPIOINT1        INTMASK_GPIOINT1
-#define IRQMASK_GPIOINT2        INTMASK_GPIOINT2
-#define IRQMASK_GPIOINT3        INTMASK_GPIOINT3
-#define IRQMASK_RTCINT          INTMASK_RTCINT
-#define IRQMASK_SSPINT          INTMASK_SSPINT
-#define IRQMASK_UARTINT0        INTMASK_UARTINT0
-#define IRQMASK_UARTINT1        INTMASK_UARTINT1
-#define IRQMASK_UARTINT2        INTMASK_UARTINT2
-#define IRQMASK_SCIINT          INTMASK_SCIINT
-#define IRQMASK_CLCDINT         INTMASK_CLCDINT
-#define IRQMASK_DMAINT          INTMASK_DMAINT
-#define IRQMASK_PWRFAILINT      INTMASK_PWRFAILINT
-#define IRQMASK_MBXINT          INTMASK_MBXINT
-#define IRQMASK_GNDINT          INTMASK_GNDINT
-#define IRQMASK_VICSOURCE21     INTMASK_VICSOURCE21
-#define IRQMASK_VICSOURCE22     INTMASK_VICSOURCE22
-#define IRQMASK_VICSOURCE23     INTMASK_VICSOURCE23
-#define IRQMASK_VICSOURCE24     INTMASK_VICSOURCE24
-#define IRQMASK_VICSOURCE25     INTMASK_VICSOURCE25
-#define IRQMASK_VICSOURCE26     INTMASK_VICSOURCE26
-#define IRQMASK_VICSOURCE27     INTMASK_VICSOURCE27
-#define IRQMASK_VICSOURCE28     INTMASK_VICSOURCE28
-#define IRQMASK_VICSOURCE29     INTMASK_VICSOURCE29
-#define IRQMASK_VICSOURCE30     INTMASK_VICSOURCE30
-#define IRQMASK_VICSOURCE31     INTMASK_VICSOURCE31
-
 /* 
  *  FIQ interrupts definitions are the same as the INT definitions.
  */
@@ -130,39 +97,6 @@
 #define FIQ_VICSOURCE31         INT_VICSOURCE31
 
 
-#define FIQMASK_WDOGINT         INTMASK_WDOGINT
-#define FIQMASK_SOFTINT         INTMASK_SOFTINT
-#define FIQMASK_COMMRx          INTMASK_COMMRx
-#define FIQMASK_COMMTx          INTMASK_COMMTx
-#define FIQMASK_TIMERINT0_1     INTMASK_TIMERINT0_1
-#define FIQMASK_TIMERINT2_3     INTMASK_TIMERINT2_3
-#define FIQMASK_GPIOINT0        INTMASK_GPIOINT0
-#define FIQMASK_GPIOINT1        INTMASK_GPIOINT1
-#define FIQMASK_GPIOINT2        INTMASK_GPIOINT2
-#define FIQMASK_GPIOINT3        INTMASK_GPIOINT3
-#define FIQMASK_RTCINT          INTMASK_RTCINT
-#define FIQMASK_SSPINT          INTMASK_SSPINT
-#define FIQMASK_UARTINT0        INTMASK_UARTINT0
-#define FIQMASK_UARTINT1        INTMASK_UARTINT1
-#define FIQMASK_UARTINT2        INTMASK_UARTINT2
-#define FIQMASK_SCIINT          INTMASK_SCIINT
-#define FIQMASK_CLCDINT         INTMASK_CLCDINT
-#define FIQMASK_DMAINT          INTMASK_DMAINT
-#define FIQMASK_PWRFAILINT      INTMASK_PWRFAILINT
-#define FIQMASK_MBXINT          INTMASK_MBXINT
-#define FIQMASK_GNDINT          INTMASK_GNDINT
-#define FIQMASK_VICSOURCE21     INTMASK_VICSOURCE21
-#define FIQMASK_VICSOURCE22     INTMASK_VICSOURCE22
-#define FIQMASK_VICSOURCE23     INTMASK_VICSOURCE23
-#define FIQMASK_VICSOURCE24     INTMASK_VICSOURCE24
-#define FIQMASK_VICSOURCE25     INTMASK_VICSOURCE25
-#define FIQMASK_VICSOURCE26     INTMASK_VICSOURCE26
-#define FIQMASK_VICSOURCE27     INTMASK_VICSOURCE27
-#define FIQMASK_VICSOURCE28     INTMASK_VICSOURCE28
-#define FIQMASK_VICSOURCE29     INTMASK_VICSOURCE29
-#define FIQMASK_VICSOURCE30     INTMASK_VICSOURCE30
-#define FIQMASK_VICSOURCE31     INTMASK_VICSOURCE31
-
 /*
  * Secondary interrupt controller
  */
@@ -188,24 +122,4 @@
 #define IRQ_SIC_PCI3            (IRQ_SIC_START + SIC_INT_PCI3)
 #define IRQ_SIC_END             63
 
-#define SIC_IRQMASK_MMCI0B      SIC_INTMASK_MMCI0B
-#define SIC_IRQMASK_MMCI1B      SIC_INTMASK_MMCI1B
-#define SIC_IRQMASK_KMI0        SIC_INTMASK_KMI0
-#define SIC_IRQMASK_KMI1        SIC_INTMASK_KMI1
-#define SIC_IRQMASK_SCI3        SIC_INTMASK_SCI3
-#define SIC_IRQMASK_UART3       SIC_INTMASK_UART3
-#define SIC_IRQMASK_CLCD        SIC_INTMASK_CLCD
-#define SIC_IRQMASK_TOUCH       SIC_INTMASK_TOUCH
-#define SIC_IRQMASK_KEYPAD      SIC_INTMASK_KEYPAD
-#define SIC_IRQMASK_DoC         SIC_INTMASK_DoC
-#define SIC_IRQMASK_MMCI0A      SIC_INTMASK_MMCI0A
-#define SIC_IRQMASK_MMCI1A      SIC_INTMASK_MMCI1A
-#define SIC_IRQMASK_AACI        SIC_INTMASK_AACI
-#define SIC_IRQMASK_ETH         SIC_INTMASK_ETH
-#define SIC_IRQMASK_USB         SIC_INTMASK_USB
-#define SIC_IRQMASK_PCI0        SIC_INTMASK_PCI0
-#define SIC_IRQMASK_PCI1        SIC_INTMASK_PCI1
-#define SIC_IRQMASK_PCI2        SIC_INTMASK_PCI2
-#define SIC_IRQMASK_PCI3        SIC_INTMASK_PCI3
-
 #define NR_IRQS                 64
diff --git a/arch/arm/mach-versatile/include/mach/memory.h b/arch/arm/mach-versatile/include/mach/memory.h
index b6315c0602ac..79aeab86b903 100644
--- a/arch/arm/mach-versatile/include/mach/memory.h
+++ b/arch/arm/mach-versatile/include/mach/memory.h
@@ -25,14 +25,4 @@
  */
 #define PHYS_OFFSET     UL(0x00000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        ((x) - PAGE_OFFSET)
-#define __bus_to_virt(x)        ((x) + PAGE_OFFSET)
-
 #endif
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
index f91ba930ca8a..83207395191a 100644
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ b/arch/arm/mach-versatile/include/mach/platform.h
@@ -347,44 +347,6 @@
 #define INT_VICSOURCE30                 30      /* PCI 3 */
 #define INT_VICSOURCE31                 31      /* SIC source */
 
-/* 
- *  Interrupt bit positions
- * 
- */
-#define INTMASK_WDOGINT                 (1 << INT_WDOGINT)
-#define INTMASK_SOFTINT                 (1 << INT_SOFTINT)
-#define INTMASK_COMMRx                  (1 << INT_COMMRx)
-#define INTMASK_COMMTx                  (1 << INT_COMMTx)
-#define INTMASK_TIMERINT0_1             (1 << INT_TIMERINT0_1)
-#define INTMASK_TIMERINT2_3             (1 << INT_TIMERINT2_3)
-#define INTMASK_GPIOINT0                (1 << INT_GPIOINT0)
-#define INTMASK_GPIOINT1                (1 << INT_GPIOINT1)
-#define INTMASK_GPIOINT2                (1 << INT_GPIOINT2)
-#define INTMASK_GPIOINT3                (1 << INT_GPIOINT3)
-#define INTMASK_RTCINT                  (1 << INT_RTCINT)
-#define INTMASK_SSPINT                  (1 << INT_SSPINT)
-#define INTMASK_UARTINT0                (1 << INT_UARTINT0)
-#define INTMASK_UARTINT1                (1 << INT_UARTINT1)
-#define INTMASK_UARTINT2                (1 << INT_UARTINT2)
-#define INTMASK_SCIINT                  (1 << INT_SCIINT)
-#define INTMASK_CLCDINT                 (1 << INT_CLCDINT)
-#define INTMASK_DMAINT                  (1 << INT_DMAINT)
-#define INTMASK_PWRFAILINT              (1 << INT_PWRFAILINT)
-#define INTMASK_MBXINT                  (1 << INT_MBXINT)
-#define INTMASK_GNDINT                  (1 << INT_GNDINT)
-#define INTMASK_VICSOURCE21             (1 << INT_VICSOURCE21)
-#define INTMASK_VICSOURCE22             (1 << INT_VICSOURCE22)
-#define INTMASK_VICSOURCE23             (1 << INT_VICSOURCE23)
-#define INTMASK_VICSOURCE24             (1 << INT_VICSOURCE24)
-#define INTMASK_VICSOURCE25             (1 << INT_VICSOURCE25)
-#define INTMASK_VICSOURCE26             (1 << INT_VICSOURCE26)
-#define INTMASK_VICSOURCE27             (1 << INT_VICSOURCE27)
-#define INTMASK_VICSOURCE28             (1 << INT_VICSOURCE28)
-#define INTMASK_VICSOURCE29             (1 << INT_VICSOURCE29)
-#define INTMASK_VICSOURCE30             (1 << INT_VICSOURCE30)
-#define INTMASK_VICSOURCE31             (1 << INT_VICSOURCE31)
-
-
 #define VERSATILE_SC_VALID_INT               0x003FFFFF
 
 #define MAXIRQNUM                       31
@@ -417,26 +379,6 @@
 #define SIC_INT_PCI3                    30
 
 
-#define SIC_INTMASK_MMCI0B              (1 << SIC_INT_MMCI0B)
-#define SIC_INTMASK_MMCI1B              (1 << SIC_INT_MMCI1B)
-#define SIC_INTMASK_KMI0                (1 << SIC_INT_KMI0)
-#define SIC_INTMASK_KMI1                (1 << SIC_INT_KMI1)
-#define SIC_INTMASK_SCI3                (1 << SIC_INT_SCI3)
-#define SIC_INTMASK_UART3               (1 << SIC_INT_UART3)
-#define SIC_INTMASK_CLCD                (1 << SIC_INT_CLCD)
-#define SIC_INTMASK_TOUCH               (1 << SIC_INT_TOUCH)
-#define SIC_INTMASK_KEYPAD              (1 << SIC_INT_KEYPAD)
-#define SIC_INTMASK_DoC                 (1 << SIC_INT_DoC)
-#define SIC_INTMASK_MMCI0A              (1 << SIC_INT_MMCI0A)
-#define SIC_INTMASK_MMCI1A              (1 << SIC_INT_MMCI1A)
-#define SIC_INTMASK_AACI                (1 << SIC_INT_AACI)
-#define SIC_INTMASK_ETH                 (1 << SIC_INT_ETH)
-#define SIC_INTMASK_USB                 (1 << SIC_INT_USB)
-#define SIC_INTMASK_PCI0                (1 << SIC_INT_PCI0)
-#define SIC_INTMASK_PCI1                (1 << SIC_INT_PCI1)
-#define SIC_INTMASK_PCI2                (1 << SIC_INT_PCI2)
-#define SIC_INTMASK_PCI3                (1 << SIC_INT_PCI3)
-
 /* 
  *  Clean base - dummy
  * 
diff --git a/arch/arm/mach-w90x900/Kconfig b/arch/arm/mach-w90x900/Kconfig
new file mode 100644
index 000000000000..8e4178fe5ec2
--- /dev/null
+++ b/arch/arm/mach-w90x900/Kconfig
@@ -0,0 +1,19 @@
+if ARCH_W90X900
+
+config CPU_W90P910
+        bool
+        help
+          Support for W90P910 of Nuvoton W90X900 CPUs.
+
+menu "W90P910 Machines"
+
+config MACH_W90P910EVB
+        bool "Nuvoton W90P910 Evaluation Board"
+        default y
+        select CPU_W90P910
+        help
+           Say Y here if you are using the Nuvoton W90P910EVB
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-w90x900/Makefile b/arch/arm/mach-w90x900/Makefile
new file mode 100644
index 000000000000..0c0c1d63f1c7
--- /dev/null
+++ b/arch/arm/mach-w90x900/Makefile
@@ -0,0 +1,15 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Object file lists.
+
+obj-y                           := irq.o time.o
+
+# W90X900 CPU support files
+
+obj-$(CONFIG_CPU_W90P910)       += w90p910.o
+
+# machine support
+
+obj-$(CONFIG_MACH_W90P910EVB)   += mach-w90p910evb.o
diff --git a/arch/arm/mach-w90x900/Makefile.boot b/arch/arm/mach-w90x900/Makefile.boot
new file mode 100644
index 000000000000..a057b546b6e5
--- /dev/null
+++ b/arch/arm/mach-w90x900/Makefile.boot
@@ -0,0 +1,3 @@
+zreladdr-y      := 0x00008000
+params_phys-y   := 0x00000100
+
diff --git a/arch/arm/mach-w90x900/cpu.h b/arch/arm/mach-w90x900/cpu.h
new file mode 100644
index 000000000000..40ff40845df0
--- /dev/null
+++ b/arch/arm/mach-w90x900/cpu.h
@@ -0,0 +1,77 @@
+/*
+ * arch/arm/mach-w90x900/cpu.h
+ *
+ * Based on linux/include/asm-arm/plat-s3c24xx/cpu.h by Ben Dooks
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Header file for W90X900 CPU support
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#define IODESC_ENT(y)                                  \
+{                                                      \
+       .virtual = (unsigned long)W90X900_VA_##y,       \
+       .pfn     = __phys_to_pfn(W90X900_PA_##y),       \
+       .length  = W90X900_SZ_##y,                      \
+       .type    = MT_DEVICE,                           \
+}
+
+/*Cpu identifier register*/
+
+#define W90X900PDID     W90X900_VA_GCR
+#define W90P910_CPUID   0x02900910
+#define W90P920_CPUID   0x02900920
+#define W90P950_CPUID   0x02900950
+#define W90N960_CPUID   0x02900960
+
+struct w90x900_uartcfg;
+struct map_desc;
+struct sys_timer;
+
+/* core initialisation functions */
+
+extern void w90x900_init_irq(void);
+extern void w90p910_init_io(struct map_desc *mach_desc, int size);
+extern void w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no);
+extern void w90p910_init_clocks(int xtal);
+extern void w90p910_map_io(struct map_desc *mach_desc, int size);
+extern struct sys_timer w90x900_timer;
+
+#define W90X900_RES(name)                               \
+struct resource w90x900_##name##_resource[] = {         \
+        [0] = {                                         \
+                .start = name##_PA,                     \
+                .end   = name##_PA + 0x0ff,             \
+                .flags = IORESOURCE_MEM,                \
+        },                                              \
+        [1] = {                                         \
+                .start = IRQ_##name,                    \
+                .end   = IRQ_##name,                    \
+                .flags = IORESOURCE_IRQ,                \
+        }                                               \
+}
+
+#define W90X900_DEVICE(devname, regname, devid, platdevname)            \
+struct platform_device w90x900_##devname = {                            \
+        .name           = platdevname,                                  \
+        .id             = devid,                                        \
+        .num_resources  = ARRAY_SIZE(w90x900_##regname##_resource),     \
+        .resource       = w90x900_##regname##_resource,                 \
+}
+
+#define W90X900_UARTCFG(port, flag, uc, ulc, ufc)       \
+{                                                       \
+                .hwport = port,                         \
+                .flags  = flag,                         \
+                .ucon   = uc,                           \
+                .ulcon  = ulc,                          \
+                .ufcon  = ufc,                          \
+}
diff --git a/arch/arm/mach-w90x900/include/mach/entry-macro.S b/arch/arm/mach-w90x900/include/mach/entry-macro.S
new file mode 100644
index 000000000000..d39aca5be9ee
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/entry-macro.S
@@ -0,0 +1,34 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros for W90P910-based platforms
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#include <mach/hardware.h>
+#include <mach/regs-irq.h>
+
+        .macro  get_irqnr_preamble, base, tmp
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+                mov     \base, #AIC_BA
+
+                ldr     \irqnr, [ \base, #AIC_IPER]
+                ldr     \irqnr, [ \base, #AIC_ISNR]
+                cmp     \irqnr, #0
+
+        .endm
+
+        /* currently don't need an disable_fiq macro */
+
+        .macro  disable_fiq
+        .endm
diff --git a/arch/arm/mach-w90x900/include/mach/hardware.h b/arch/arm/mach-w90x900/include/mach/hardware.h
new file mode 100644
index 000000000000..fe3c6265a466
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/hardware.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/hardware.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/hardware.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <asm/sizes.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-w90x900/include/mach/io.h b/arch/arm/mach-w90x900/include/mach/io.h
new file mode 100644
index 000000000000..d96ab99df05b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/io.h
@@ -0,0 +1,30 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/io.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/io.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT  0xffffffff
+
+/*
+ * 1:1 mapping for ioremapped regions.
+ */
+
+#define __mem_pci(a)    (a)
+#define __io(a)         __typesafe_io(a)
+
+#endif
diff --git a/arch/arm/mach-w90x900/include/mach/irqs.h b/arch/arm/mach-w90x900/include/mach/irqs.h
new file mode 100644
index 000000000000..1c583f9cbcde
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/irqs.h
@@ -0,0 +1,45 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/irqs.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/irqs.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+/*
+ * we keep the first set of CPU IRQs out of the range of
+ * the ISA space, so that the PC104 has them to itself
+ * and we don't end up having to do horrible things to the
+ * standard ISA drivers....
+ *
+ */
+
+#define W90X900_IRQ(x)  (x)
+
+/* Main cpu interrupts */
+
+#define IRQ_WDT         W90X900_IRQ(1)
+#define IRQ_UART0       W90X900_IRQ(7)
+#define IRQ_UART1       W90X900_IRQ(8)
+#define IRQ_UART2       W90X900_IRQ(9)
+#define IRQ_UART3       W90X900_IRQ(10)
+#define IRQ_UART4       W90X900_IRQ(11)
+#define IRQ_TIMER0      W90X900_IRQ(12)
+#define IRQ_TIMER1      W90X900_IRQ(13)
+#define IRQ_T_INT_GROUP W90X900_IRQ(14)
+#define IRQ_ADC         W90X900_IRQ(31)
+#define NR_IRQS         (IRQ_ADC+1)
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-w90x900/include/mach/map.h b/arch/arm/mach-w90x900/include/mach/map.h
new file mode 100644
index 000000000000..79320ebe614b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/map.h
@@ -0,0 +1,76 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/map.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/map.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H
+
+#ifndef __ASSEMBLY__
+#define W90X900_ADDR(x)         ((void __iomem *)(0xF0000000 + (x)))
+#else
+#define W90X900_ADDR(x)         (0xF0000000 + (x))
+#endif
+
+#define AHB_IO_BASE             0xB0000000
+#define APB_IO_BASE             0xB8000000
+#define CLOCKPW_BASE            (APB_IO_BASE+0x200)
+#define AIC_IO_BASE             (APB_IO_BASE+0x2000)
+#define TIMER_IO_BASE           (APB_IO_BASE+0x1000)
+
+/*
+ * interrupt controller is the first thing we put in, to make
+ * the assembly code for the irq detection easier
+ */
+
+#define W90X900_VA_IRQ          W90X900_ADDR(0x00000000)
+#define W90X900_PA_IRQ          (0xB8002000)
+#define W90X900_SZ_IRQ          SZ_4K
+
+#define W90X900_VA_GCR          W90X900_ADDR(0x08002000)
+#define W90X900_PA_GCR          (0xB0000000)
+#define W90X900_SZ_GCR          SZ_4K
+
+/* Clock and Power management */
+
+#define W90X900_VA_CLKPWR       (W90X900_VA_GCR+0x200)
+#define W90X900_PA_CLKPWR       (0xB0000200)
+#define W90X900_SZ_CLKPWR       SZ_4K
+
+/* EBI management */
+
+#define W90X900_VA_EBI          W90X900_ADDR(0x00001000)
+#define W90X900_PA_EBI          (0xB0001000)
+#define W90X900_SZ_EBI          SZ_4K
+
+/* UARTs */
+
+#define W90X900_VA_UART         W90X900_ADDR(0x08000000)
+#define W90X900_PA_UART         (0xB8000000)
+#define W90X900_SZ_UART         SZ_4K
+
+/* Timers */
+
+#define W90X900_VA_TIMER        W90X900_ADDR(0x08001000)
+#define W90X900_PA_TIMER        (0xB8001000)
+#define W90X900_SZ_TIMER        SZ_4K
+
+/* GPIO ports */
+
+#define W90X900_VA_GPIO         W90X900_ADDR(0x08003000)
+#define W90X900_PA_GPIO         (0xB8003000)
+#define W90X900_SZ_GPIO         SZ_4K
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-w90x900/include/mach/memory.h b/arch/arm/mach-w90x900/include/mach/memory.h
new file mode 100644
index 000000000000..971b80702c27
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/memory.h
@@ -0,0 +1,23 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/memory.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/memory.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET     UL(0x00000000)
+
+#endif
diff --git a/arch/arm/mach-w90x900/include/mach/regs-irq.h b/arch/arm/mach-w90x900/include/mach/regs-irq.h
new file mode 100644
index 000000000000..8a3185fbc9cf
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-irq.h
@@ -0,0 +1,51 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/regs-irq.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef ___ASM_ARCH_REGS_IRQ_H
+#define ___ASM_ARCH_REGS_IRQ_H
+
+/* Advance Interrupt Controller (AIC) Registers */
+
+#define AIC_BA                  W90X900_VA_IRQ
+
+#define REG_AIC_IRQSC           (AIC_BA+0x80)
+#define REG_AIC_GEN             (AIC_BA+0x84)
+#define REG_AIC_GASR            (AIC_BA+0x88)
+#define REG_AIC_GSCR            (AIC_BA+0x8C)
+#define REG_AIC_IRSR            (AIC_BA+0x100)
+#define REG_AIC_IASR            (AIC_BA+0x104)
+#define REG_AIC_ISR             (AIC_BA+0x108)
+#define REG_AIC_IPER            (AIC_BA+0x10C)
+#define REG_AIC_ISNR            (AIC_BA+0x110)
+#define REG_AIC_IMR             (AIC_BA+0x114)
+#define REG_AIC_OISR            (AIC_BA+0x118)
+#define REG_AIC_MECR            (AIC_BA+0x120)
+#define REG_AIC_MDCR            (AIC_BA+0x124)
+#define REG_AIC_SSCR            (AIC_BA+0x128)
+#define REG_AIC_SCCR            (AIC_BA+0x12C)
+#define REG_AIC_EOSCR           (AIC_BA+0x130)
+#define AIC_IPER                (0x10C)
+#define AIC_ISNR                (0x110)
+
+/*16-18 bits of REG_AIC_GEN define irq(2-4) group*/
+
+#define TIMER2_IRQ              (1 << 16)
+#define TIMER3_IRQ              (1 << 17)
+#define TIMER4_IRQ              (1 << 18)
+#define TIME_GROUP_IRQ          (TIMER2_IRQ|TIMER3_IRQ|TIMER4_IRQ)
+
+#endif /* ___ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-w90x900/include/mach/regs-serial.h b/arch/arm/mach-w90x900/include/mach/regs-serial.h
new file mode 100644
index 000000000000..f08fa0d75e11
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-serial.h
@@ -0,0 +1,59 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-serial.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/regs-serial.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARM_REGS_SERIAL_H
+#define __ASM_ARM_REGS_SERIAL_H
+
+#define UART0_BA        W90X900_VA_UART
+#define UART1_BA        (W90X900_VA_UART+0x100)
+#define UART2_BA        (W90X900_VA_UART+0x200)
+#define UART3_BA        (W90X900_VA_UART+0x300)
+#define UART4_BA        (W90X900_VA_UART+0x400)
+
+#define UART0_PA        W90X900_PA_UART
+#define UART1_PA        (W90X900_PA_UART+0x100)
+#define UART2_PA        (W90X900_PA_UART+0x200)
+#define UART3_PA        (W90X900_PA_UART+0x300)
+#define UART4_PA        (W90X900_PA_UART+0x400)
+
+#ifndef __ASSEMBLY__
+
+struct w90x900_uart_clksrc {
+        const char      *name;
+        unsigned int    divisor;
+        unsigned int    min_baud;
+        unsigned int    max_baud;
+};
+
+struct w90x900_uartcfg {
+        unsigned char   hwport;
+        unsigned char   unused;
+        unsigned short  flags;
+        unsigned long   uart_flags;
+
+        unsigned long   ucon;
+        unsigned long   ulcon;
+        unsigned long   ufcon;
+
+        struct w90x900_uart_clksrc *clocks;
+        unsigned int    clocks_size;
+};
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ARM_REGS_SERIAL_H */
+
diff --git a/arch/arm/mach-w90x900/include/mach/regs-timer.h b/arch/arm/mach-w90x900/include/mach/regs-timer.h
new file mode 100644
index 000000000000..8f390620c0e4
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-timer.h
@@ -0,0 +1,42 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-timer.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/regs-timer.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_REGS_TIMER_H
+#define __ASM_ARCH_REGS_TIMER_H
+
+/* Timer Registers */
+
+#define TMR_BA                  W90X900_VA_TIMER
+#define REG_TCSR0               (TMR_BA+0x00)
+#define REG_TCSR1               (TMR_BA+0x04)
+#define REG_TICR0               (TMR_BA+0x08)
+#define REG_TICR1               (TMR_BA+0x0C)
+#define REG_TDR0                (TMR_BA+0x10)
+#define REG_TDR1                (TMR_BA+0x14)
+#define REG_TISR                (TMR_BA+0x18)
+#define REG_WTCR                (TMR_BA+0x1C)
+#define REG_TCSR2               (TMR_BA+0x20)
+#define REG_TCSR3               (TMR_BA+0x24)
+#define REG_TICR2               (TMR_BA+0x28)
+#define REG_TICR3               (TMR_BA+0x2C)
+#define REG_TDR2                (TMR_BA+0x30)
+#define REG_TDR3                (TMR_BA+0x34)
+#define REG_TCSR4               (TMR_BA+0x40)
+#define REG_TICR4               (TMR_BA+0x48)
+#define REG_TDR4                (TMR_BA+0x50)
+
+#endif /*  __ASM_ARCH_REGS_TIMER_H */
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
new file mode 100644
index 000000000000..93753f922618
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -0,0 +1,28 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/system.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/system.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <asm/proc-fns.h>
+
+static void arch_idle(void)
+{
+}
+
+static void arch_reset(char mode)
+{
+        cpu_reset(0);
+}
+
diff --git a/arch/arm/mach-w90x900/include/mach/timex.h b/arch/arm/mach-w90x900/include/mach/timex.h
new file mode 100644
index 000000000000..164dce0b64db
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/timex.h
@@ -0,0 +1,25 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/timex.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/timex.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE Now, I don't use it. */
+
+#define CLOCK_TICK_RATE 15000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-w90x900/include/mach/uncompress.h b/arch/arm/mach-w90x900/include/mach/uncompress.h
new file mode 100644
index 000000000000..050d9fe5ae1b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/uncompress.h
@@ -0,0 +1,40 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/uncompress.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/uncompress.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+/* Defines for UART registers */
+
+#include <mach/regs-serial.h>
+#include <mach/map.h>
+
+#define arch_decomp_wdog()
+
+static void putc(int ch)
+{
+}
+
+static inline void flush(void)
+{
+}
+
+static void arch_decomp_setup(void)
+{
+}
+
+#endif/* __ASM_W90X900_UNCOMPRESS_H */
diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h
new file mode 100644
index 000000000000..2f9dfb928533
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/vmalloc.h
@@ -0,0 +1,23 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/vmalloc.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
new file mode 100644
index 000000000000..0b4fc194729c
--- /dev/null
+++ b/arch/arm/mach-w90x900/irq.c
@@ -0,0 +1,76 @@
+/*
+ * linux/arch/arm/mach-w90x900/irq.c
+ *
+ * based on linux/arch/arm/plat-s3c24xx/irq.c by Ben Dooks
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/ptrace.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/regs-irq.h>
+
+static void w90x900_irq_mask(unsigned int irq)
+{
+        __raw_writel(1 << irq, REG_AIC_MDCR);
+}
+
+/*
+ * By the w90p910 spec,any irq,only write 1
+ * to REG_AIC_EOSCR for ACK
+ */
+
+static void w90x900_irq_ack(unsigned int irq)
+{
+        __raw_writel(0x01, REG_AIC_EOSCR);
+}
+
+static void w90x900_irq_unmask(unsigned int irq)
+{
+        unsigned long mask;
+
+        if (irq == IRQ_T_INT_GROUP) {
+                mask = __raw_readl(REG_AIC_GEN);
+                __raw_writel(TIME_GROUP_IRQ | mask, REG_AIC_GEN);
+                __raw_writel(1 << IRQ_T_INT_GROUP, REG_AIC_MECR);
+        }
+        __raw_writel(1 << irq, REG_AIC_MECR);
+}
+
+static struct irq_chip w90x900_irq_chip = {
+        .ack       = w90x900_irq_ack,
+        .mask      = w90x900_irq_mask,
+        .unmask    = w90x900_irq_unmask,
+};
+
+void __init w90x900_init_irq(void)
+{
+        int irqno;
+
+        __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
+
+        for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) {
+                set_irq_chip(irqno, &w90x900_irq_chip);
+                set_irq_handler(irqno, handle_level_irq);
+                set_irq_flags(irqno, IRQF_VALID);
+        }
+}
diff --git a/arch/arm/mach-w90x900/mach-w90p910evb.c b/arch/arm/mach-w90x900/mach-w90p910evb.c
new file mode 100644
index 000000000000..9307a2475438
--- /dev/null
+++ b/arch/arm/mach-w90x900/mach-w90p910evb.c
@@ -0,0 +1,72 @@
+/*
+ * linux/arch/arm/mach-w90x900/mach-w90p910evb.c
+ *
+ * Based on mach-s3c2410/mach-smdk2410.c by Jonas Dietsche
+ *
+ * Copyright (C) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/mach-types.h>
+
+#include <mach/regs-serial.h>
+
+#include "cpu.h"
+
+static struct map_desc w90p910_iodesc[] __initdata = {
+};
+
+static struct w90x900_uartcfg w90p910_uartcfgs[] = {
+        W90X900_UARTCFG(0, 0, 0, 0, 0),
+        W90X900_UARTCFG(1, 0, 0, 0, 0),
+        W90X900_UARTCFG(2, 0, 0, 0, 0),
+        W90X900_UARTCFG(3, 0, 0, 0, 0),
+        W90X900_UARTCFG(4, 0, 0, 0, 0),
+};
+
+/*Here should be your evb resourse,such as LCD*/
+
+static struct platform_device *w90p910evb_dev[] __initdata = {
+};
+
+static void __init w90p910evb_map_io(void)
+{
+        w90p910_map_io(w90p910_iodesc, ARRAY_SIZE(w90p910_iodesc));
+        w90p910_init_clocks(0);
+        w90p910_init_uarts(w90p910_uartcfgs, ARRAY_SIZE(w90p910_uartcfgs));
+}
+
+static void __init w90p910evb_init(void)
+{
+        platform_add_devices(w90p910evb_dev, ARRAY_SIZE(w90p910evb_dev));
+}
+
+MACHINE_START(W90P910EVB, "W90P910EVB")
+        /* Maintainer: Wan ZongShun */
+        .phys_io        = W90X900_PA_UART,
+        .io_pg_offst    = (((u32)W90X900_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = 0,
+        .map_io         = w90p910evb_map_io,
+        .init_irq       = w90x900_init_irq,
+        .init_machine   = w90p910evb_init,
+        .timer          = &w90x900_timer,
+MACHINE_END
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
new file mode 100644
index 000000000000..3a69e381f316
--- /dev/null
+++ b/arch/arm/mach-w90x900/time.c
@@ -0,0 +1,80 @@
+/*
+ * linux/arch/arm/mach-w90x900/time.c
+ *
+ * Based on linux/arch/arm/plat-s3c24xx/time.c by Ben Dooks
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/leds.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/time.h>
+
+#include <mach/system.h>
+#include <mach/map.h>
+#include <mach/regs-timer.h>
+
+static unsigned long w90x900_gettimeoffset(void)
+{
+        return 0;
+}
+
+/*IRQ handler for the timer*/
+
+static irqreturn_t
+w90x900_timer_interrupt(int irq, void *dev_id)
+{
+        timer_tick();
+        __raw_writel(0x01, REG_TISR); /* clear TIF0 */
+        return IRQ_HANDLED;
+}
+
+static struct irqaction w90x900_timer_irq = {
+        .name           = "w90x900 Timer Tick",
+        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+        .handler        = w90x900_timer_interrupt,
+};
+
+/*Set up timer reg.*/
+
+static void w90x900_timer_setup(void)
+{
+        __raw_writel(0, REG_TCSR0);
+        __raw_writel(0, REG_TCSR1);
+        __raw_writel(0, REG_TCSR2);
+        __raw_writel(0, REG_TCSR3);
+        __raw_writel(0, REG_TCSR4);
+        __raw_writel(0x1F, REG_TISR);
+        __raw_writel(15000000/(100 * 100), REG_TICR0);
+        __raw_writel(0x68000063, REG_TCSR0);
+}
+
+static void __init w90x900_timer_init(void)
+{
+        w90x900_timer_setup();
+        setup_irq(IRQ_TIMER0, &w90x900_timer_irq);
+}
+
+struct sys_timer w90x900_timer = {
+        .init           = w90x900_timer_init,
+        .offset         = w90x900_gettimeoffset,
+        .resume         = w90x900_timer_setup
+};
diff --git a/arch/arm/mach-w90x900/w90p910.c b/arch/arm/mach-w90x900/w90p910.c
new file mode 100644
index 000000000000..aa783bc94310
--- /dev/null
+++ b/arch/arm/mach-w90x900/w90p910.c
@@ -0,0 +1,134 @@
+/*
+ * linux/arch/arm/mach-w90x900/w90p910.c
+ *
+ * Based on linux/arch/arm/plat-s3c24xx/s3c244x.c by Ben Dooks
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * W90P910 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/regs-serial.h>
+
+#include "cpu.h"
+
+/*W90P910 has five uarts*/
+
+#define MAX_UART_COUNT 5
+static int uart_count;
+static struct platform_device *uart_devs[MAX_UART_COUNT-1];
+
+/* Initial IO mappings */
+
+static struct map_desc w90p910_iodesc[] __initdata = {
+        IODESC_ENT(IRQ),
+        IODESC_ENT(GCR),
+        IODESC_ENT(UART),
+        IODESC_ENT(TIMER),
+        IODESC_ENT(EBI),
+        /*IODESC_ENT(LCD),*/
+};
+
+/*Init the dev resource*/
+
+static W90X900_RES(UART0);
+static W90X900_RES(UART1);
+static W90X900_RES(UART2);
+static W90X900_RES(UART3);
+static W90X900_RES(UART4);
+static W90X900_DEVICE(uart0, UART0, 0, "w90x900-uart");
+static W90X900_DEVICE(uart1, UART1, 1, "w90x900-uart");
+static W90X900_DEVICE(uart2, UART2, 2, "w90x900-uart");
+static W90X900_DEVICE(uart3, UART3, 3, "w90x900-uart");
+static W90X900_DEVICE(uart4, UART4, 4, "w90x900-uart");
+
+static struct platform_device *uart_devices[] __initdata = {
+        &w90x900_uart0,
+        &w90x900_uart1,
+        &w90x900_uart2,
+        &w90x900_uart3,
+        &w90x900_uart4
+};
+
+/*Init W90P910 uart device*/
+
+void __init w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no)
+{
+        struct platform_device *platdev;
+        int uart, uartdev;
+
+        /*By min() to judge count of uart be used indeed*/
+
+        uartdev = ARRAY_SIZE(uart_devices);
+        no = min(uartdev, no);
+
+        for (uart = 0; uart < no; uart++, cfg++) {
+                if (cfg->hwport != uart)
+                        printk(KERN_ERR "w90x900_uartcfg[%d] error\n", uart);
+                platdev = uart_devices[cfg->hwport];
+                uart_devs[uart] = platdev;
+                platdev->dev.platform_data = cfg;
+        }
+        uart_count = uart;
+}
+
+/*Init W90P910 evb io*/
+
+void __init w90p910_map_io(struct map_desc *mach_desc, int mach_size)
+{
+        unsigned long idcode = 0x0;
+
+        iotable_init(w90p910_iodesc, ARRAY_SIZE(w90p910_iodesc));
+
+        idcode = __raw_readl(W90X900PDID);
+        if (idcode != W90P910_CPUID)
+                printk(KERN_ERR "CPU type 0x%08lx is not W90P910\n", idcode);
+}
+
+/*Init W90P910 clock*/
+
+void __init w90p910_init_clocks(int xtal)
+{
+}
+
+static int __init w90p910_init_cpu(void)
+{
+        return 0;
+}
+
+static int __init w90x900_arch_init(void)
+{
+        int ret;
+
+        ret = w90p910_init_cpu();
+        if (ret != 0)
+                return ret;
+
+        return platform_add_devices(uart_devs, uart_count);
+
+}
+arch_initcall(w90x900_arch_init);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ab5f7a21350b..d490f3773c01 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -10,8 +10,7 @@ config CPU_32
 
 # ARM610
 config CPU_ARM610
-        bool "Support ARM610 processor"
-        depends on ARCH_RPC
+        bool "Support ARM610 processor" if ARCH_RPC
         select CPU_32v3
         select CPU_CACHE_V3
         select CPU_CACHE_VIVT
@@ -43,8 +42,7 @@ config CPU_ARM7TDMI
 
 # ARM710
 config CPU_ARM710
-        bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC
-        default y if ARCH_CLPS7500
+        bool "Support ARM710 processor" if ARCH_RPC
         select CPU_32v3
         select CPU_CACHE_V3
         select CPU_CACHE_VIVT
@@ -63,8 +61,7 @@ config CPU_ARM710
 
 # ARM720T
 config CPU_ARM720T
-        bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR
-        default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X
+        bool "Support ARM720T processor" if ARCH_INTEGRATOR
         select CPU_32v4T
         select CPU_ABRT_LV4T
         select CPU_PABRT_NOIFAR
@@ -114,9 +111,7 @@ config CPU_ARM9TDMI
 
 # ARM920T
 config CPU_ARM920T
-        bool "Support ARM920T processor"
-        depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
-        default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200
+        bool "Support ARM920T processor" if ARCH_INTEGRATOR
         select CPU_32v4T
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -138,8 +133,6 @@ config CPU_ARM920T
 # ARM922T
 config CPU_ARM922T
         bool "Support ARM922T processor" if ARCH_INTEGRATOR
-        depends on ARCH_LH7A40X || ARCH_INTEGRATOR || ARCH_KS8695
-        default y if ARCH_LH7A40X || ARCH_KS8695
         select CPU_32v4T
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -159,8 +152,6 @@ config CPU_ARM922T
 # ARM925T
 config CPU_ARM925T
         bool "Support ARM925T processor" if ARCH_OMAP1
-        depends on ARCH_OMAP15XX
-        default y if ARCH_OMAP15XX
         select CPU_32v4T
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -179,22 +170,7 @@ config CPU_ARM925T
 
 # ARM926T
 config CPU_ARM926T
-        bool "Support ARM926T processor"
-        depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || \
-                MACH_VERSATILE_AB || ARCH_OMAP730 || \
-                ARCH_OMAP16XX || MACH_REALVIEW_EB || \
-                ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
-                ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
-                ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
-                ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
-                ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
-        default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || \
-                ARCH_OMAP730 || ARCH_OMAP16XX || \
-                ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
-                ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
-                ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
-                ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
-                ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
+        bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
         select CPU_32v5
         select CPU_ABRT_EV5TJ
         select CPU_PABRT_NOIFAR
@@ -247,8 +223,7 @@ config CPU_ARM946E
 
 # ARM1020 - needs validating
 config CPU_ARM1020
-        bool "Support ARM1020T (rev 0) processor"
-        depends on ARCH_INTEGRATOR
+        bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
         select CPU_32v5
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -266,8 +241,7 @@ config CPU_ARM1020
 
 # ARM1020E - needs validating
 config CPU_ARM1020E
-        bool "Support ARM1020E processor"
-        depends on ARCH_INTEGRATOR
+        bool "Support ARM1020E processor" if ARCH_INTEGRATOR
         select CPU_32v5
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -280,8 +254,7 @@ config CPU_ARM1020E
 
 # ARM1022E
 config CPU_ARM1022
-        bool "Support ARM1022E processor"
-        depends on ARCH_INTEGRATOR
+        bool "Support ARM1022E processor" if ARCH_INTEGRATOR
         select CPU_32v5
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -299,8 +272,7 @@ config CPU_ARM1022
 
 # ARM1026EJ-S
 config CPU_ARM1026
-        bool "Support ARM1026EJ-S processor"
-        depends on ARCH_INTEGRATOR
+        bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
         select CPU_32v5
         select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
         select CPU_PABRT_NOIFAR
@@ -317,8 +289,7 @@ config CPU_ARM1026
 
 # SA110
 config CPU_SA110
-        bool "Support StrongARM(R) SA-110 processor" if !ARCH_EBSA110 && !FOOTBRIDGE && !ARCH_TBOX && !ARCH_SHARK && !ARCH_NEXUSPCI && ARCH_RPC
-        default y if ARCH_EBSA110 || FOOTBRIDGE || ARCH_TBOX || ARCH_SHARK || ARCH_NEXUSPCI
+        bool "Support StrongARM(R) SA-110 processor" if ARCH_RPC
         select CPU_32v3 if ARCH_RPC
         select CPU_32v4 if !ARCH_RPC
         select CPU_ABRT_EV4
@@ -340,8 +311,6 @@ config CPU_SA110
 # SA1100
 config CPU_SA1100
         bool
-        depends on ARCH_SA1100
-        default y
         select CPU_32v4
         select CPU_ABRT_EV4
         select CPU_PABRT_NOIFAR
@@ -353,8 +322,6 @@ config CPU_SA1100
 # XScale
 config CPU_XSCALE
         bool
-        depends on ARCH_IOP32X || ARCH_IOP33X || PXA25x || PXA27x || ARCH_IXP4XX || ARCH_IXP2000
-        default y
         select CPU_32v5
         select CPU_ABRT_EV5T
         select CPU_PABRT_NOIFAR
@@ -365,8 +332,6 @@ config CPU_XSCALE
 # XScale Core Version 3
 config CPU_XSC3
         bool
-        depends on ARCH_IXP23XX || ARCH_IOP13XX || PXA3xx
-        default y
         select CPU_32v5
         select CPU_ABRT_EV5T
         select CPU_PABRT_NOIFAR
@@ -378,8 +343,6 @@ config CPU_XSC3
 # Feroceon
 config CPU_FEROCEON
         bool
-        depends on ARCH_ORION5X || ARCH_LOKI || ARCH_KIRKWOOD || ARCH_MV78XX0
-        default y
         select CPU_32v5
         select CPU_ABRT_EV5T
         select CPU_PABRT_NOIFAR
@@ -399,10 +362,7 @@ config CPU_FEROCEON_OLD_ID
 
 # ARMv6
 config CPU_V6
-        bool "Support ARM V6 processor"
-        depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
-        default y if ARCH_MX3
-        default y if ARCH_MSM
+        bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
         select CPU_32v6
         select CPU_ABRT_EV6
         select CPU_PABRT_NOIFAR
@@ -427,8 +387,7 @@ config CPU_32v6K
 
 # ARMv7
 config CPU_V7
-        bool "Support ARM V7 processor"
-        depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP3
+        bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
         select CPU_32v6K
         select CPU_32v7
         select CPU_ABRT_EV7
@@ -745,7 +704,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
 
 config CACHE_L2X0
         bool "Enable the L2x0 outer cache controller"
-        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
+        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || REALVIEW_EB_A9MP
         default y
         select OUTER_CACHE
         help
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 2d5884ce0435..3a398befed41 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -17,6 +17,7 @@
 #include <linux/string.h>
 #include <linux/proc_fs.h>
 #include <linux/init.h>
+#include <linux/sched.h>
 #include <linux/uaccess.h>
 
 #include <asm/unaligned.h>
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
index 3b3639eb7ca5..8a4abebc478a 100644
--- a/arch/arm/mm/cache-v3.S
+++ b/arch/arm/mm/cache-v3.S
@@ -9,7 +9,6 @@
  */
 #include <linux/linkage.h>
 #include <linux/init.h>
-#include <mach/hardware.h>
 #include <asm/page.h>
 #include "proc-macros.S"
 
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 5786adf10040..3668611cb400 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -9,7 +9,6 @@
  */
 #include <linux/linkage.h>
 #include <linux/init.h>
-#include <mach/hardware.h>
 #include <asm/page.h>
 #include "proc-macros.S"
 
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S
index 51a9b0b273b6..c54fa2cc40e6 100644
--- a/arch/arm/mm/cache-v4wt.S
+++ b/arch/arm/mm/cache-v4wt.S
@@ -13,7 +13,6 @@
  */
 #include <linux/linkage.h>
 #include <linux/init.h>
-#include <mach/hardware.h>
 #include <asm/page.h>
 #include "proc-macros.S"
 
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index d19c2bec2b1f..be93ff02a98d 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -26,6 +26,7 @@
  *      - mm    - mm_struct describing address space
  */
 ENTRY(v7_flush_dcache_all)
+        dmb                                     @ ensure ordering with previous memory accesses
         mrc     p15, 1, r0, c0, c0, 1           @ read clidr
         ands    r3, r0, #0x7000000              @ extract loc from clidr
         mov     r3, r3, lsr #23                 @ left align loc bit field
@@ -64,6 +65,7 @@ skip:
 finished:
         mov     r10, #0                         @ swith back to cache level 0
         mcr     p15, 2, r10, c0, c0, 0          @ select current cache level in cssr
+        dsb
         isb
         mov     pc, lr
 ENDPROC(v7_flush_dcache_all)
diff --git a/arch/arm/mm/copypage-feroceon.S b/arch/arm/mm/copypage-feroceon.S
deleted file mode 100644
index 7eb0d320d240..000000000000
--- a/arch/arm/mm/copypage-feroceon.S
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage-feroceon.S
- *
- *  Copyright (C) 2008 Marvell Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This handles copy_user_page and clear_user_page on Feroceon
- * more optimally than the generic implementations.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/asm-offsets.h>
-
-        .text
-        .align  5
-
-ENTRY(feroceon_copy_user_page)
-        stmfd   sp!, {r4-r9, lr}
-        mov     ip, #PAGE_SZ
-1:      mov     lr, r1
-        ldmia   r1!, {r2 - r9}
-        pld     [lr, #32]
-        pld     [lr, #64]
-        pld     [lr, #96]
-        pld     [lr, #128]
-        pld     [lr, #160]
-        pld     [lr, #192]
-        pld     [lr, #224]
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        subs    ip, ip, #(32 * 8)
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        bne     1b
-        mcr     p15, 0, ip, c7, c10, 4          @ drain WB
-        ldmfd   sp!, {r4-r9, pc}
-
-        .align  5
-
-ENTRY(feroceon_clear_user_page)
-        stmfd   sp!, {r4-r7, lr}
-        mov     r1, #PAGE_SZ/32
-        mov     r2, #0
-        mov     r3, #0
-        mov     r4, #0
-        mov     r5, #0
-        mov     r6, #0
-        mov     r7, #0
-        mov     ip, #0
-        mov     lr, #0
-1:      stmia   r0, {r2-r7, ip, lr}
-        subs    r1, r1, #1
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        bne     1b
-        mcr     p15, 0, r1, c7, c10, 4          @ drain WB
-        ldmfd   sp!, {r4-r7, pc}
-
-        __INITDATA
-
-        .type   feroceon_user_fns, #object
-ENTRY(feroceon_user_fns)
-        .long   feroceon_clear_user_page
-        .long   feroceon_copy_user_page
-        .size   feroceon_user_fns, . - feroceon_user_fns
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
new file mode 100644
index 000000000000..c3ba6a94da0c
--- /dev/null
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -0,0 +1,111 @@
+/*
+ *  linux/arch/arm/mm/copypage-feroceon.S
+ *
+ *  Copyright (C) 2008 Marvell Semiconductors
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This handles copy_user_highpage and clear_user_page on Feroceon
+ * more optimally than the generic implementations.
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+static void __attribute__((naked))
+feroceon_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\
+        stmfd   sp!, {r4-r9, lr}                \n\
+        mov     ip, %0                          \n\
+1:      mov     lr, r1                          \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        pld     [lr, #32]                       \n\
+        pld     [lr, #64]                       \n\
+        pld     [lr, #96]                       \n\
+        pld     [lr, #128]                      \n\
+        pld     [lr, #160]                      \n\
+        pld     [lr, #192]                      \n\
+        pld     [lr, #224]                      \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        subs    ip, ip, #(32 * 8)               \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        bne     1b                              \n\
+        mcr     p15, 0, ip, c7, c10, 4          @ drain WB\n\
+        ldmfd   sp!, {r4-r9, pc}"
+        :
+        : "I" (PAGE_SIZE));
+}
+
+void feroceon_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        feroceon_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile ("\
+        mov     r1, %2                          \n\
+        mov     r2, #0                          \n\
+        mov     r3, #0                          \n\
+        mov     r4, #0                          \n\
+        mov     r5, #0                          \n\
+        mov     r6, #0                          \n\
+        mov     r7, #0                          \n\
+        mov     ip, #0                          \n\
+        mov     lr, #0                          \n\
+1:      stmia   %0, {r2-r7, ip, lr}             \n\
+        subs    r1, r1, #1                      \n\
+        mcr     p15, 0, %0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     %0, %0, #32                     \n\
+        bne     1b                              \n\
+        mcr     p15, 0, r1, c7, c10, 4          @ drain WB"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 32)
+        : "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns feroceon_user_fns __initdata = {
+        .cpu_clear_user_highpage = feroceon_clear_user_highpage,
+        .cpu_copy_user_highpage = feroceon_copy_user_highpage,
+};
+
diff --git a/arch/arm/mm/copypage-v3.S b/arch/arm/mm/copypage-v3.S
deleted file mode 100644
index 2ee394b11bcb..000000000000
--- a/arch/arm/mm/copypage-v3.S
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage.S
- *
- *  Copyright (C) 1995-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  ASM optimised string functions
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/assembler.h>
-#include <asm/asm-offsets.h>
-
-                .text
-                .align  5
-/*
- * ARMv3 optimised copy_user_page
- *
- * FIXME: do we need to handle cache stuff...
- */
-ENTRY(v3_copy_user_page)
-        stmfd   sp!, {r4, lr}                   @       2
-        mov     r2, #PAGE_SZ/64                 @       1
-        ldmia   r1!, {r3, r4, ip, lr}           @       4+1
-1:      stmia   r0!, {r3, r4, ip, lr}           @       4
-        ldmia   r1!, {r3, r4, ip, lr}           @       4+1
-        stmia   r0!, {r3, r4, ip, lr}           @       4
-        ldmia   r1!, {r3, r4, ip, lr}           @       4+1
-        stmia   r0!, {r3, r4, ip, lr}           @       4
-        ldmia   r1!, {r3, r4, ip, lr}           @       4
-        subs    r2, r2, #1                      @       1
-        stmia   r0!, {r3, r4, ip, lr}           @       4
-        ldmneia r1!, {r3, r4, ip, lr}           @       4
-        bne     1b                              @       1
-        ldmfd   sp!, {r4, pc}                   @       3
-
-        .align  5
-/*
- * ARMv3 optimised clear_user_page
- *
- * FIXME: do we need to handle cache stuff...
- */
-ENTRY(v3_clear_user_page)
-        str     lr, [sp, #-4]!
-        mov     r1, #PAGE_SZ/64                 @ 1
-        mov     r2, #0                          @ 1
-        mov     r3, #0                          @ 1
-        mov     ip, #0                          @ 1
-        mov     lr, #0                          @ 1
-1:      stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        subs    r1, r1, #1                      @ 1
-        bne     1b                              @ 1
-        ldr     pc, [sp], #4
-
-        __INITDATA
-
-        .type   v3_user_fns, #object
-ENTRY(v3_user_fns)
-        .long   v3_clear_user_page
-        .long   v3_copy_user_page
-        .size   v3_user_fns, . - v3_user_fns
diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c
new file mode 100644
index 000000000000..70ed96c8af8e
--- /dev/null
+++ b/arch/arm/mm/copypage-v3.c
@@ -0,0 +1,81 @@
+/*
+ *  linux/arch/arm/mm/copypage-v3.c
+ *
+ *  Copyright (C) 1995-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+/*
+ * ARMv3 optimised copy_user_highpage
+ *
+ * FIXME: do we need to handle cache stuff...
+ */
+static void __attribute__((naked))
+v3_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\n\
+        stmfd   sp!, {r4, lr}                   @       2\n\
+        mov     r2, %2                          @       1\n\
+        ldmia   %0!, {r3, r4, ip, lr}           @       4+1\n\
+1:      stmia   %1!, {r3, r4, ip, lr}           @       4\n\
+        ldmia   %0!, {r3, r4, ip, lr}           @       4+1\n\
+        stmia   %1!, {r3, r4, ip, lr}           @       4\n\
+        ldmia   %0!, {r3, r4, ip, lr}           @       4+1\n\
+        stmia   %1!, {r3, r4, ip, lr}           @       4\n\
+        ldmia   %0!, {r3, r4, ip, lr}           @       4\n\
+        subs    r2, r2, #1                      @       1\n\
+        stmia   %1!, {r3, r4, ip, lr}           @       4\n\
+        ldmneia %0!, {r3, r4, ip, lr}           @       4\n\
+        bne     1b                              @       1\n\
+        ldmfd   sp!, {r4, pc}                   @       3"
+        :
+        : "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64));
+}
+
+void v3_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        v3_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+/*
+ * ARMv3 optimised clear_user_page
+ *
+ * FIXME: do we need to handle cache stuff...
+ */
+void v3_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile("\n\
+        mov     r1, %2                          @ 1\n\
+        mov     r2, #0                          @ 1\n\
+        mov     r3, #0                          @ 1\n\
+        mov     ip, #0                          @ 1\n\
+        mov     lr, #0                          @ 1\n\
+1:      stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        subs    r1, r1, #1                      @ 1\n\
+        bne     1b                              @ 1"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 64)
+        : "r1", "r2", "r3", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns v3_user_fns __initdata = {
+        .cpu_clear_user_highpage = v3_clear_user_highpage,
+        .cpu_copy_user_highpage = v3_copy_user_highpage,
+};
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index 8d33e2549344..bdb5fd983b15 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -15,8 +15,8 @@
  */
 #include <linux/init.h>
 #include <linux/mm.h>
+#include <linux/highmem.h>
 
-#include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
 #include <asm/cacheflush.h>
@@ -33,7 +33,7 @@
 static DEFINE_SPINLOCK(minicache_lock);
 
 /*
- * ARMv4 mini-dcache optimised copy_user_page
+ * ARMv4 mini-dcache optimised copy_user_highpage
  *
  * We flush the destination cache lines just before we write the data into the
  * corresponding address.  Since the Dcache is read-allocate, this removes the
@@ -42,7 +42,7 @@ static DEFINE_SPINLOCK(minicache_lock);
  *
  * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
  * instruction.  If your processor does not supply this, you have to write your
- * own copy_user_page that does the right thing.
+ * own copy_user_highpage that does the right thing.
  */
 static void __attribute__((naked))
 mc_copy_user_page(void *from, void *to)
@@ -68,50 +68,53 @@ mc_copy_user_page(void *from, void *to)
         : "r" (from), "r" (to), "I" (PAGE_SIZE / 64));
 }
 
-void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
+void v4_mc_copy_user_highpage(struct page *from, struct page *to,
+        unsigned long vaddr)
 {
-        struct page *page = virt_to_page(kfrom);
+        void *kto = kmap_atomic(to, KM_USER1);
 
-        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
-                __flush_dcache_page(page_mapping(page), page);
+        if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
+                __flush_dcache_page(page_mapping(from), from);
 
         spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
+        set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
         flush_tlb_kernel_page(0xffff8000);
 
         mc_copy_user_page((void *)0xffff8000, kto);
 
         spin_unlock(&minicache_lock);
+
+        kunmap_atomic(kto, KM_USER1);
 }
 
 /*
  * ARMv4 optimised clear_user_page
  */
-void __attribute__((naked))
-v4_mc_clear_user_page(void *kaddr, unsigned long vaddr)
+void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
 {
-        asm volatile(
-        "str    lr, [sp, #-4]!\n\
-        mov     r1, %0                          @ 1\n\
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile("\
+        mov     r1, %2                          @ 1\n\
         mov     r2, #0                          @ 1\n\
         mov     r3, #0                          @ 1\n\
         mov     ip, #0                          @ 1\n\
         mov     lr, #0                          @ 1\n\
-1:      mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
-        stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-        stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-        mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
-        stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-        stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
+1:      mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
         subs    r1, r1, #1                      @ 1\n\
-        bne     1b                              @ 1\n\
-        ldr     pc, [sp], #4"
-        :
-        : "I" (PAGE_SIZE / 64));
+        bne     1b                              @ 1"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 64)
+        : "r1", "r2", "r3", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
 }
 
 struct cpu_user_fns v4_mc_user_fns __initdata = {
-        .cpu_clear_user_page    = v4_mc_clear_user_page, 
-        .cpu_copy_user_page     = v4_mc_copy_user_page,
+        .cpu_clear_user_highpage = v4_mc_clear_user_highpage,
+        .cpu_copy_user_highpage = v4_mc_copy_user_highpage,
 };
diff --git a/arch/arm/mm/copypage-v4wb.S b/arch/arm/mm/copypage-v4wb.S
deleted file mode 100644
index 83117354b1cd..000000000000
--- a/arch/arm/mm/copypage-v4wb.S
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage.S
- *
- *  Copyright (C) 1995-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  ASM optimised string functions
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/asm-offsets.h>
-
-        .text
-        .align  5
-/*
- * ARMv4 optimised copy_user_page
- *
- * We flush the destination cache lines just before we write the data into the
- * corresponding address.  Since the Dcache is read-allocate, this removes the
- * Dcache aliasing issue.  The writes will be forwarded to the write buffer,
- * and merged as appropriate.
- *
- * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
- * instruction.  If your processor does not supply this, you have to write your
- * own copy_user_page that does the right thing.
- */
-ENTRY(v4wb_copy_user_page)
-        stmfd   sp!, {r4, lr}                   @ 2
-        mov     r2, #PAGE_SZ/64                 @ 1
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-1:      mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4+1
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-        mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-        subs    r2, r2, #1                      @ 1
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmneia r1!, {r3, r4, ip, lr}           @ 4
-        bne     1b                              @ 1
-        mcr     p15, 0, r1, c7, c10, 4          @ 1   drain WB
-        ldmfd    sp!, {r4, pc}                  @ 3
-
-        .align  5
-/*
- * ARMv4 optimised clear_user_page
- *
- * Same story as above.
- */
-ENTRY(v4wb_clear_user_page)
-        str     lr, [sp, #-4]!
-        mov     r1, #PAGE_SZ/64                 @ 1
-        mov     r2, #0                          @ 1
-        mov     r3, #0                          @ 1
-        mov     ip, #0                          @ 1
-        mov     lr, #0                          @ 1
-1:      mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        subs    r1, r1, #1                      @ 1
-        bne     1b                              @ 1
-        mcr     p15, 0, r1, c7, c10, 4          @ 1   drain WB
-        ldr     pc, [sp], #4
-
-        __INITDATA
-
-        .type   v4wb_user_fns, #object
-ENTRY(v4wb_user_fns)
-        .long   v4wb_clear_user_page
-        .long   v4wb_copy_user_page
-        .size   v4wb_user_fns, . - v4wb_user_fns
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
new file mode 100644
index 000000000000..3ec93dab7656
--- /dev/null
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -0,0 +1,94 @@
+/*
+ *  linux/arch/arm/mm/copypage-v4wb.c
+ *
+ *  Copyright (C) 1995-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+/*
+ * ARMv4 optimised copy_user_highpage
+ *
+ * We flush the destination cache lines just before we write the data into the
+ * corresponding address.  Since the Dcache is read-allocate, this removes the
+ * Dcache aliasing issue.  The writes will be forwarded to the write buffer,
+ * and merged as appropriate.
+ *
+ * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
+ * instruction.  If your processor does not supply this, you have to write your
+ * own copy_user_highpage that does the right thing.
+ */
+static void __attribute__((naked))
+v4wb_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\
+        stmfd   sp!, {r4, lr}                   @ 2\n\
+        mov     r2, %0                          @ 1\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+1:      mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4+1\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+        mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+        subs    r2, r2, #1                      @ 1\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmneia r1!, {r3, r4, ip, lr}           @ 4\n\
+        bne     1b                              @ 1\n\
+        mcr     p15, 0, r1, c7, c10, 4          @ 1   drain WB\n\
+        ldmfd    sp!, {r4, pc}                  @ 3"
+        :
+        : "I" (PAGE_SIZE / 64));
+}
+
+void v4wb_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        v4wb_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+/*
+ * ARMv4 optimised clear_user_page
+ *
+ * Same story as above.
+ */
+void v4wb_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile("\
+        mov     r1, %2                          @ 1\n\
+        mov     r2, #0                          @ 1\n\
+        mov     r3, #0                          @ 1\n\
+        mov     ip, #0                          @ 1\n\
+        mov     lr, #0                          @ 1\n\
+1:      mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        subs    r1, r1, #1                      @ 1\n\
+        bne     1b                              @ 1\n\
+        mcr     p15, 0, r1, c7, c10, 4          @ 1   drain WB"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 64)
+        : "r1", "r2", "r3", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns v4wb_user_fns __initdata = {
+        .cpu_clear_user_highpage = v4wb_clear_user_highpage,
+        .cpu_copy_user_highpage = v4wb_copy_user_highpage,
+};
diff --git a/arch/arm/mm/copypage-v4wt.S b/arch/arm/mm/copypage-v4wt.S
deleted file mode 100644
index e1f2af28d549..000000000000
--- a/arch/arm/mm/copypage-v4wt.S
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage-v4.S
- *
- *  Copyright (C) 1995-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  ASM optimised string functions
- *
- *  This is for CPUs with a writethrough cache and 'flush ID cache' is
- *  the only supported cache operation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/asm-offsets.h>
-
-        .text
-        .align  5
-/*
- * ARMv4 optimised copy_user_page
- *
- * Since we have writethrough caches, we don't have to worry about
- * dirty data in the cache.  However, we do have to ensure that
- * subsequent reads are up to date.
- */
-ENTRY(v4wt_copy_user_page)
-        stmfd   sp!, {r4, lr}                   @ 2
-        mov     r2, #PAGE_SZ/64                 @ 1
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-1:      stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4+1
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-        subs    r2, r2, #1                      @ 1
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmneia r1!, {r3, r4, ip, lr}           @ 4
-        bne     1b                              @ 1
-        mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache
-        ldmfd   sp!, {r4, pc}                   @ 3
-
-        .align  5
-/*
- * ARMv4 optimised clear_user_page
- *
- * Same story as above.
- */
-ENTRY(v4wt_clear_user_page)
-        str     lr, [sp, #-4]!
-        mov     r1, #PAGE_SZ/64                 @ 1
-        mov     r2, #0                          @ 1
-        mov     r3, #0                          @ 1
-        mov     ip, #0                          @ 1
-        mov     lr, #0                          @ 1
-1:      stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        subs    r1, r1, #1                      @ 1
-        bne     1b                              @ 1
-        mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache
-        ldr     pc, [sp], #4
-
-        __INITDATA
-
-        .type   v4wt_user_fns, #object
-ENTRY(v4wt_user_fns)
-        .long   v4wt_clear_user_page
-        .long   v4wt_copy_user_page
-        .size   v4wt_user_fns, . - v4wt_user_fns
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
new file mode 100644
index 000000000000..0f1188efae45
--- /dev/null
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -0,0 +1,88 @@
+/*
+ *  linux/arch/arm/mm/copypage-v4wt.S
+ *
+ *  Copyright (C) 1995-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  This is for CPUs with a writethrough cache and 'flush ID cache' is
+ *  the only supported cache operation.
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+/*
+ * ARMv4 optimised copy_user_highpage
+ *
+ * Since we have writethrough caches, we don't have to worry about
+ * dirty data in the cache.  However, we do have to ensure that
+ * subsequent reads are up to date.
+ */
+static void __attribute__((naked))
+v4wt_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\
+        stmfd   sp!, {r4, lr}                   @ 2\n\
+        mov     r2, %0                          @ 1\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+1:      stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4+1\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+        subs    r2, r2, #1                      @ 1\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmneia r1!, {r3, r4, ip, lr}           @ 4\n\
+        bne     1b                              @ 1\n\
+        mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache\n\
+        ldmfd   sp!, {r4, pc}                   @ 3"
+        :
+        : "I" (PAGE_SIZE / 64));
+}
+
+void v4wt_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        v4wt_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+/*
+ * ARMv4 optimised clear_user_page
+ *
+ * Same story as above.
+ */
+void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile("\
+        mov     r1, %2                          @ 1\n\
+        mov     r2, #0                          @ 1\n\
+        mov     r3, #0                          @ 1\n\
+        mov     ip, #0                          @ 1\n\
+        mov     lr, #0                          @ 1\n\
+1:      stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        subs    r1, r1, #1                      @ 1\n\
+        bne     1b                              @ 1\n\
+        mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 64)
+        : "r1", "r2", "r3", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns v4wt_user_fns __initdata = {
+        .cpu_clear_user_highpage = v4wt_clear_user_highpage,
+        .cpu_copy_user_highpage = v4wt_copy_user_highpage,
+};
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 0e21c0767580..4127a7bddfe5 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -10,8 +10,8 @@
 #include <linux/init.h>
 #include <linux/spinlock.h>
 #include <linux/mm.h>
+#include <linux/highmem.h>
 
-#include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/shmparam.h>
 #include <asm/tlbflush.h>
@@ -33,41 +33,56 @@ static DEFINE_SPINLOCK(v6_lock);
  * Copy the user page.  No aliasing to deal with so we can just
  * attack the kernel's existing mapping of these pages.
  */
-static void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long vaddr)
+static void v6_copy_user_highpage_nonaliasing(struct page *to,
+        struct page *from, unsigned long vaddr)
 {
+        void *kto, *kfrom;
+
+        kfrom = kmap_atomic(from, KM_USER0);
+        kto = kmap_atomic(to, KM_USER1);
         copy_page(kto, kfrom);
+        kunmap_atomic(kto, KM_USER1);
+        kunmap_atomic(kfrom, KM_USER0);
 }
 
 /*
  * Clear the user page.  No aliasing to deal with so we can just
  * attack the kernel's existing mapping of this page.
  */
-static void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
+static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr)
 {
+        void *kaddr = kmap_atomic(page, KM_USER0);
         clear_page(kaddr);
+        kunmap_atomic(kaddr, KM_USER0);
 }
 
 /*
- * Copy the page, taking account of the cache colour.
+ * Discard data in the kernel mapping for the new page.
+ * FIXME: needs this MCRR to be supported.
  */
-static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr)
+static void discard_old_kernel_data(void *kto)
 {
-        unsigned int offset = CACHE_COLOUR(vaddr);
-        unsigned long from, to;
-        struct page *page = virt_to_page(kfrom);
-
-        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
-                __flush_dcache_page(page_mapping(page), page);
-
-        /*
-         * Discard data in the kernel mapping for the new page.
-         * FIXME: needs this MCRR to be supported.
-         */
         __asm__("mcrr   p15, 0, %1, %0, c6      @ 0xec401f06"
            :
            : "r" (kto),
              "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES)
            : "cc");
+}
+
+/*
+ * Copy the page, taking account of the cache colour.
+ */
+static void v6_copy_user_highpage_aliasing(struct page *to,
+        struct page *from, unsigned long vaddr)
+{
+        unsigned int offset = CACHE_COLOUR(vaddr);
+        unsigned long kfrom, kto;
+
+        if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
+                __flush_dcache_page(page_mapping(from), from);
+
+        /* FIXME: not highmem safe */
+        discard_old_kernel_data(page_address(to));
 
         /*
          * Now copy the page using the same cache colour as the
@@ -75,16 +90,16 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
          */
         spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, PAGE_KERNEL), 0);
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, PAGE_KERNEL), 0);
+        set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
+        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
 
-        from = from_address + (offset << PAGE_SHIFT);
-        to   = to_address + (offset << PAGE_SHIFT);
+        kfrom = from_address + (offset << PAGE_SHIFT);
+        kto   = to_address + (offset << PAGE_SHIFT);
 
-        flush_tlb_kernel_page(from);
-        flush_tlb_kernel_page(to);
+        flush_tlb_kernel_page(kfrom);
+        flush_tlb_kernel_page(kto);
 
-        copy_page((void *)to, (void *)from);
+        copy_page((void *)kto, (void *)kfrom);
 
         spin_unlock(&v6_lock);
 }
@@ -94,20 +109,13 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
  * so remap the kernel page into the same cache colour as the user
  * page.
  */
-static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
+static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
 {
         unsigned int offset = CACHE_COLOUR(vaddr);
         unsigned long to = to_address + (offset << PAGE_SHIFT);
 
-        /*
-         * Discard data in the kernel mapping for the new page
-         * FIXME: needs this MCRR to be supported.
-         */
-        __asm__("mcrr   p15, 0, %1, %0, c6      @ 0xec401f06"
-           :
-           : "r" (kaddr),
-             "r" ((unsigned long)kaddr + PAGE_SIZE - L1_CACHE_BYTES)
-           : "cc");
+        /* FIXME: not highmem safe */
+        discard_old_kernel_data(page_address(page));
 
         /*
          * Now clear the page using the same cache colour as
@@ -115,7 +123,7 @@ static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
          */
         spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL), 0);
+        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
         flush_tlb_kernel_page(to);
         clear_page((void *)to);
 
@@ -123,15 +131,15 @@ static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
 }
 
 struct cpu_user_fns v6_user_fns __initdata = {
-        .cpu_clear_user_page    = v6_clear_user_page_nonaliasing,
-        .cpu_copy_user_page     = v6_copy_user_page_nonaliasing,
+        .cpu_clear_user_highpage = v6_clear_user_highpage_nonaliasing,
+        .cpu_copy_user_highpage = v6_copy_user_highpage_nonaliasing,
 };
 
 static int __init v6_userpage_init(void)
 {
         if (cache_is_vipt_aliasing()) {
-                cpu_user.cpu_clear_user_page = v6_clear_user_page_aliasing;
-                cpu_user.cpu_copy_user_page = v6_copy_user_page_aliasing;
+                cpu_user.cpu_clear_user_highpage = v6_clear_user_highpage_aliasing;
+                cpu_user.cpu_copy_user_highpage = v6_copy_user_highpage_aliasing;
         }
 
         return 0;
diff --git a/arch/arm/mm/copypage-xsc3.S b/arch/arm/mm/copypage-xsc3.S
deleted file mode 100644
index 9a2cb4332b4c..000000000000
--- a/arch/arm/mm/copypage-xsc3.S
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage-xsc3.S
- *
- *  Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Adapted for 3rd gen XScale core, no more mini-dcache
- * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
- */
-
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/asm-offsets.h>
-
-/*
- * General note:
- *  We don't really want write-allocate cache behaviour for these functions
- *  since that will just eat through 8K of the cache.
- */
-
-        .text
-        .align  5
-/*
- * XSC3 optimised copy_user_page
- *  r0 = destination
- *  r1 = source
- *  r2 = virtual user address of ultimate destination page
- *
- * The source page may have some clean entries in the cache already, but we
- * can safely ignore them - break_cow() will flush them out of the cache
- * if we eventually end up using our copied page.
- *
- */
-ENTRY(xsc3_mc_copy_user_page)
-        stmfd   sp!, {r4, r5, lr}
-        mov     lr, #PAGE_SZ/64-1
-
-        pld     [r1, #0]
-        pld     [r1, #32]
-1:      pld     [r1, #64]
-        pld     [r1, #96]
-
-2:      ldrd    r2, [r1], #8
-        mov     ip, r0
-        ldrd    r4, [r1], #8
-        mcr     p15, 0, ip, c7, c6, 1           @ invalidate
-        strd    r2, [r0], #8
-        ldrd    r2, [r1], #8
-        strd    r4, [r0], #8
-        ldrd    r4, [r1], #8
-        strd    r2, [r0], #8
-        strd    r4, [r0], #8
-        ldrd    r2, [r1], #8
-        mov     ip, r0
-        ldrd    r4, [r1], #8
-        mcr     p15, 0, ip, c7, c6, 1           @ invalidate
-        strd    r2, [r0], #8
-        ldrd    r2, [r1], #8
-        subs    lr, lr, #1
-        strd    r4, [r0], #8
-        ldrd    r4, [r1], #8
-        strd    r2, [r0], #8
-        strd    r4, [r0], #8
-        bgt     1b
-        beq     2b
-
-        ldmfd   sp!, {r4, r5, pc}
-
-        .align  5
-/*
- * XScale optimised clear_user_page
- *  r0 = destination
- *  r1 = virtual user address of ultimate destination page
- */
-ENTRY(xsc3_mc_clear_user_page)
-        mov     r1, #PAGE_SZ/32
-        mov     r2, #0
-        mov     r3, #0
-1:      mcr     p15, 0, r0, c7, c6, 1           @ invalidate line
-        strd    r2, [r0], #8
-        strd    r2, [r0], #8
-        strd    r2, [r0], #8
-        strd    r2, [r0], #8
-        subs    r1, r1, #1
-        bne     1b
-        mov     pc, lr
-
-        __INITDATA
-
-        .type   xsc3_mc_user_fns, #object
-ENTRY(xsc3_mc_user_fns)
-        .long   xsc3_mc_clear_user_page
-        .long   xsc3_mc_copy_user_page
-        .size   xsc3_mc_user_fns, . - xsc3_mc_user_fns
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c
new file mode 100644
index 000000000000..39a994542cad
--- /dev/null
+++ b/arch/arm/mm/copypage-xsc3.c
@@ -0,0 +1,113 @@
+/*
+ *  linux/arch/arm/mm/copypage-xsc3.S
+ *
+ *  Copyright (C) 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Adapted for 3rd gen XScale core, no more mini-dcache
+ * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+/*
+ * General note:
+ *  We don't really want write-allocate cache behaviour for these functions
+ *  since that will just eat through 8K of the cache.
+ */
+
+/*
+ * XSC3 optimised copy_user_highpage
+ *  r0 = destination
+ *  r1 = source
+ *
+ * The source page may have some clean entries in the cache already, but we
+ * can safely ignore them - break_cow() will flush them out of the cache
+ * if we eventually end up using our copied page.
+ *
+ */
+static void __attribute__((naked))
+xsc3_mc_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\
+        stmfd   sp!, {r4, r5, lr}               \n\
+        mov     lr, %0                          \n\
+                                                \n\
+        pld     [r1, #0]                        \n\
+        pld     [r1, #32]                       \n\
+1:      pld     [r1, #64]                       \n\
+        pld     [r1, #96]                       \n\
+                                                \n\
+2:      ldrd    r2, [r1], #8                    \n\
+        mov     ip, r0                          \n\
+        ldrd    r4, [r1], #8                    \n\
+        mcr     p15, 0, ip, c7, c6, 1           @ invalidate\n\
+        strd    r2, [r0], #8                    \n\
+        ldrd    r2, [r1], #8                    \n\
+        strd    r4, [r0], #8                    \n\
+        ldrd    r4, [r1], #8                    \n\
+        strd    r2, [r0], #8                    \n\
+        strd    r4, [r0], #8                    \n\
+        ldrd    r2, [r1], #8                    \n\
+        mov     ip, r0                          \n\
+        ldrd    r4, [r1], #8                    \n\
+        mcr     p15, 0, ip, c7, c6, 1           @ invalidate\n\
+        strd    r2, [r0], #8                    \n\
+        ldrd    r2, [r1], #8                    \n\
+        subs    lr, lr, #1                      \n\
+        strd    r4, [r0], #8                    \n\
+        ldrd    r4, [r1], #8                    \n\
+        strd    r2, [r0], #8                    \n\
+        strd    r4, [r0], #8                    \n\
+        bgt     1b                              \n\
+        beq     2b                              \n\
+                                                \n\
+        ldmfd   sp!, {r4, r5, pc}"
+        :
+        : "I" (PAGE_SIZE / 64 - 1));
+}
+
+void xsc3_mc_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        xsc3_mc_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+/*
+ * XScale optimised clear_user_page
+ *  r0 = destination
+ *  r1 = virtual user address of ultimate destination page
+ */
+void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile ("\
+        mov     r1, %2                          \n\
+        mov     r2, #0                          \n\
+        mov     r3, #0                          \n\
+1:      mcr     p15, 0, %0, c7, c6, 1           @ invalidate line\n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        subs    r1, r1, #1                      \n\
+        bne     1b"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 32)
+        : "r1", "r2", "r3");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns xsc3_mc_user_fns __initdata = {
+        .cpu_clear_user_highpage = xsc3_mc_clear_user_highpage,
+        .cpu_copy_user_highpage = xsc3_mc_copy_user_highpage,
+};
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index bad49331bbf9..d18f2397ee2d 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -15,8 +15,8 @@
  */
 #include <linux/init.h>
 #include <linux/mm.h>
+#include <linux/highmem.h>
 
-#include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
 #include <asm/cacheflush.h>
@@ -35,7 +35,7 @@
 static DEFINE_SPINLOCK(minicache_lock);
 
 /*
- * XScale mini-dcache optimised copy_user_page
+ * XScale mini-dcache optimised copy_user_highpage
  *
  * We flush the destination cache lines just before we write the data into the
  * corresponding address.  Since the Dcache is read-allocate, this removes the
@@ -90,48 +90,53 @@ mc_copy_user_page(void *from, void *to)
         : "r" (from), "r" (to), "I" (PAGE_SIZE / 64 - 1));
 }
 
-void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
+void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
 {
-        struct page *page = virt_to_page(kfrom);
+        void *kto = kmap_atomic(to, KM_USER1);
 
-        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
-                __flush_dcache_page(page_mapping(page), page);
+        if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
+                __flush_dcache_page(page_mapping(from), from);
 
         spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
+        set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
         flush_tlb_kernel_page(COPYPAGE_MINICACHE);
 
         mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
         spin_unlock(&minicache_lock);
+
+        kunmap_atomic(kto, KM_USER1);
 }
 
 /*
  * XScale optimised clear_user_page
  */
-void __attribute__((naked))
-xscale_mc_clear_user_page(void *kaddr, unsigned long vaddr)
+void
+xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
 {
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
         asm volatile(
-        "mov    r1, %0                          \n\
+        "mov    r1, %2                          \n\
         mov     r2, #0                          \n\
         mov     r3, #0                          \n\
-1:      mov     ip, r0                          \n\
-        strd    r2, [r0], #8                    \n\
-        strd    r2, [r0], #8                    \n\
-        strd    r2, [r0], #8                    \n\
-        strd    r2, [r0], #8                    \n\
+1:      mov     ip, %0                          \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
         mcr     p15, 0, ip, c7, c10, 1          @ clean D line\n\
         subs    r1, r1, #1                      \n\
         mcr     p15, 0, ip, c7, c6, 1           @ invalidate D line\n\
-        bne     1b                              \n\
-        mov     pc, lr"
-        :
-        : "I" (PAGE_SIZE / 32));
+        bne     1b"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 32)
+        : "r1", "r2", "r3", "ip");
+        kunmap_atomic(kaddr, KM_USER0);
 }
 
 struct cpu_user_fns xscale_mc_user_fns __initdata = {
-        .cpu_clear_user_page    = xscale_mc_clear_user_page, 
-        .cpu_copy_user_page     = xscale_mc_copy_user_page,
+        .cpu_clear_user_highpage = xscale_mc_clear_user_highpage,
+        .cpu_copy_user_highpage = xscale_mc_copy_user_highpage,
 };
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 22c9530e91e2..0455557a2899 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
+#include <linux/page-flags.h>
 
 #include <asm/system.h>
 #include <asm/pgtable.h>
@@ -84,13 +85,14 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
                         break;
                 }
 
-#ifndef CONFIG_HIGHMEM
                 /* We must not map this if we have highmem enabled */
+                if (PageHighMem(pfn_to_page(pmd_val(*pmd) >> PAGE_SHIFT)))
+                        break;
+
                 pte = pte_offset_map(pmd, addr);
                 printk(", *pte=%08lx", pte_val(*pte));
                 printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE]));
                 pte_unmap(pte);
-#endif
         } while(0);
 
         printk("\n");
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 82c4b4217989..34df4d9d03a6 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -17,6 +17,7 @@
 #include <linux/initrd.h>
 
 #include <asm/mach-types.h>
+#include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/sizes.h>
 #include <asm/tlb.h>
@@ -64,10 +65,11 @@ static int __init parse_tag_initrd2(const struct tag *tag)
 __tagtable(ATAG_INITRD2, parse_tag_initrd2);
 
 /*
- * This is used to pass memory configuration data from paging_init
- * to mem_init, and by show_mem() to skip holes in the memory map.
+ * This keeps memory configuration data used by a couple memory
+ * initialization functions, as well as show_mem() for the skipping
+ * of holes in the memory map.  It is populated by arm_add_memory().
  */
-static struct meminfo meminfo = { 0, };
+struct meminfo meminfo;
 
 void show_mem(void)
 {
@@ -128,7 +130,7 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
 {
         unsigned int start_pfn, i, bootmap_pfn;
 
-        start_pfn   = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT;
+        start_pfn   = PAGE_ALIGN(__pa(_end)) >> PAGE_SHIFT;
         bootmap_pfn = 0;
 
         for_each_nodebank(i, mi, node) {
@@ -331,13 +333,12 @@ static void __init bootmem_free_node(int node, struct meminfo *mi)
         free_area_init_node(node, zone_size, start_pfn, zhole_size);
 }
 
-void __init bootmem_init(struct meminfo *mi)
+void __init bootmem_init(void)
 {
+        struct meminfo *mi = &meminfo;
         unsigned long memend_pfn = 0;
         int node, initrd_node;
 
-        memcpy(&meminfo, mi, sizeof(meminfo));
-
         /*
          * Locate which node contains the ramdisk image, if any.
          */
@@ -394,20 +395,22 @@ void __init bootmem_init(struct meminfo *mi)
         max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET;
 }
 
-static inline void free_area(unsigned long addr, unsigned long end, char *s)
+static inline int free_area(unsigned long pfn, unsigned long end, char *s)
 {
-        unsigned int size = (end - addr) >> 10;
+        unsigned int pages = 0, size = (end - pfn) << (PAGE_SHIFT - 10);
 
-        for (; addr < end; addr += PAGE_SIZE) {
-                struct page *page = virt_to_page(addr);
+        for (; pfn < end; pfn++) {
+                struct page *page = pfn_to_page(pfn);
                 ClearPageReserved(page);
                 init_page_count(page);
-                free_page(addr);
-                totalram_pages++;
+                __free_page(page);
+                pages++;
         }
 
         if (size && s)
                 printk(KERN_INFO "Freeing %s memory: %dK\n", s, size);
+
+        return pages;
 }
 
 static inline void
@@ -478,13 +481,9 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi)
  */
 void __init mem_init(void)
 {
-        unsigned int codepages, datapages, initpages;
+        unsigned int codesize, datasize, initsize;
         int i, node;
 
-        codepages = &_etext - &_text;
-        datapages = &_end - &__data_start;
-        initpages = &__init_end - &__init_begin;
-
 #ifndef CONFIG_DISCONTIGMEM
         max_mapnr   = virt_to_page(high_memory) - mem_map;
 #endif
@@ -501,7 +500,8 @@ void __init mem_init(void)
 
 #ifdef CONFIG_SA1111
         /* now that our DMA memory is actually so designated, we can free it */
-        free_area(PAGE_OFFSET, (unsigned long)swapper_pg_dir, NULL);
+        totalram_pages += free_area(PHYS_PFN_OFFSET,
+                                    __phys_to_pfn(__pa(swapper_pg_dir)), NULL);
 #endif
 
         /*
@@ -509,18 +509,21 @@ void __init mem_init(void)
          * real number of pages we have in this system
          */
         printk(KERN_INFO "Memory:");
-
         num_physpages = 0;
         for (i = 0; i < meminfo.nr_banks; i++) {
                 num_physpages += bank_pfn_size(&meminfo.bank[i]);
                 printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20);
         }
-
         printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT));
+
+        codesize = _etext - _text;
+        datasize = _end - _data;
+        initsize = __init_end - __init_begin;
+
         printk(KERN_NOTICE "Memory: %luKB available (%dK code, "
                 "%dK data, %dK init)\n",
                 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
-                codepages >> 10, datapages >> 10, initpages >> 10);
+                codesize >> 10, datasize >> 10, initsize >> 10);
 
         if (PAGE_SIZE >= 16384 && num_physpages <= 128) {
                 extern int sysctl_overcommit_memory;
@@ -535,11 +538,10 @@ void __init mem_init(void)
 
 void free_initmem(void)
 {
-        if (!machine_is_integrator() && !machine_is_cintegrator()) {
-                free_area((unsigned long)(&__init_begin),
-                          (unsigned long)(&__init_end),
-                          "init");
-        }
+        if (!machine_is_integrator() && !machine_is_cintegrator())
+                totalram_pages += free_area(__phys_to_pfn(__pa(__init_begin)),
+                                            __phys_to_pfn(__pa(__init_end)),
+                                            "init");
 }
 
 #ifdef CONFIG_BLK_DEV_INITRD
@@ -549,7 +551,9 @@ static int keep_initrd;
 void free_initrd_mem(unsigned long start, unsigned long end)
 {
         if (!keep_initrd)
-                free_area(start, end, "initrd");
+                totalram_pages += free_area(__phys_to_pfn(__pa(start)),
+                                            __phys_to_pfn(__pa(end)),
+                                            "initrd");
 }
 
 static int __init keepinitrd_setup(char *__unused)
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 5d9f53907b4e..95bbe112965e 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -32,7 +32,5 @@ struct meminfo;
 struct pglist_data;
 
 void __init create_mapping(struct map_desc *md);
-void __init bootmem_init(struct meminfo *mi);
+void __init bootmem_init(void);
 void reserve_node_zero(struct pglist_data *pgdat);
-
-extern void _text, _stext, _etext, __data_start, _end, __init_begin, __init_end;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 7f36c825718d..9b36c5cb5e9f 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -17,6 +17,7 @@
 
 #include <asm/cputype.h>
 #include <asm/mach-types.h>
+#include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/sizes.h>
 #include <asm/tlb.h>
@@ -646,61 +647,79 @@ static void __init early_vmalloc(char **arg)
                         "vmalloc area too small, limiting to %luMB\n",
                         vmalloc_reserve >> 20);
         }
+
+        if (vmalloc_reserve > VMALLOC_END - (PAGE_OFFSET + SZ_32M)) {
+                vmalloc_reserve = VMALLOC_END - (PAGE_OFFSET + SZ_32M);
+                printk(KERN_WARNING
+                        "vmalloc area is too big, limiting to %luMB\n",
+                        vmalloc_reserve >> 20);
+        }
 }
 __early_param("vmalloc=", early_vmalloc);
 
 #define VMALLOC_MIN     (void *)(VMALLOC_END - vmalloc_reserve)
 
-static int __init check_membank_valid(struct membank *mb)
+static void __init sanity_check_meminfo(void)
 {
-        /*
-         * Check whether this memory region has non-zero size or
-         * invalid node number.
-         */
-        if (mb->size == 0 || mb->node >= MAX_NUMNODES)
-                return 0;
-
-        /*
-         * Check whether this memory region would entirely overlap
-         * the vmalloc area.
-         */
-        if (phys_to_virt(mb->start) >= VMALLOC_MIN) {
-                printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
-                        "(vmalloc region overlap).\n",
-                        mb->start, mb->start + mb->size - 1);
-                return 0;
-        }
-
-        /*
-         * Check whether this memory region would partially overlap
-         * the vmalloc area.
-         */
-        if (phys_to_virt(mb->start + mb->size) < phys_to_virt(mb->start) ||
-            phys_to_virt(mb->start + mb->size) > VMALLOC_MIN) {
-                unsigned long newsize = VMALLOC_MIN - phys_to_virt(mb->start);
-
-                printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
-                        "to -%.8lx (vmalloc region overlap).\n",
-                        mb->start, mb->start + mb->size - 1,
-                        mb->start + newsize - 1);
-                mb->size = newsize;
-        }
+        int i, j;
 
-        return 1;
-}
+        for (i = 0, j = 0; i < meminfo.nr_banks; i++) {
+                struct membank *bank = &meminfo.bank[j];
+                *bank = meminfo.bank[i];
 
-static void __init sanity_check_meminfo(struct meminfo *mi)
-{
-        int i, j;
+#ifdef CONFIG_HIGHMEM
+                /*
+                 * Split those memory banks which are partially overlapping
+                 * the vmalloc area greatly simplifying things later.
+                 */
+                if (__va(bank->start) < VMALLOC_MIN &&
+                    bank->size > VMALLOC_MIN - __va(bank->start)) {
+                        if (meminfo.nr_banks >= NR_BANKS) {
+                                printk(KERN_CRIT "NR_BANKS too low, "
+                                                 "ignoring high memory\n");
+                        } else {
+                                memmove(bank + 1, bank,
+                                        (meminfo.nr_banks - i) * sizeof(*bank));
+                                meminfo.nr_banks++;
+                                i++;
+                                bank[1].size -= VMALLOC_MIN - __va(bank->start);
+                                bank[1].start = __pa(VMALLOC_MIN - 1) + 1;
+                                j++;
+                        }
+                        bank->size = VMALLOC_MIN - __va(bank->start);
+                }
+#else
+                /*
+                 * Check whether this memory bank would entirely overlap
+                 * the vmalloc area.
+                 */
+                if (__va(bank->start) >= VMALLOC_MIN) {
+                        printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
+                               "(vmalloc region overlap).\n",
+                               bank->start, bank->start + bank->size - 1);
+                        continue;
+                }
 
-        for (i = 0, j = 0; i < mi->nr_banks; i++) {
-                if (check_membank_valid(&mi->bank[i]))
-                        mi->bank[j++] = mi->bank[i];
+                /*
+                 * Check whether this memory bank would partially overlap
+                 * the vmalloc area.
+                 */
+                if (__va(bank->start + bank->size) > VMALLOC_MIN ||
+                    __va(bank->start + bank->size) < __va(bank->start)) {
+                        unsigned long newsize = VMALLOC_MIN - __va(bank->start);
+                        printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
+                               "to -%.8lx (vmalloc region overlap).\n",
+                               bank->start, bank->start + bank->size - 1,
+                               bank->start + newsize - 1);
+                        bank->size = newsize;
+                }
+#endif
+                j++;
         }
-        mi->nr_banks = j;
+        meminfo.nr_banks = j;
 }
 
-static inline void prepare_page_table(struct meminfo *mi)
+static inline void prepare_page_table(void)
 {
         unsigned long addr;
 
@@ -712,7 +731,7 @@ static inline void prepare_page_table(struct meminfo *mi)
 
 #ifdef CONFIG_XIP_KERNEL
         /* The XIP kernel is mapped in the module area -- skip over it */
-        addr = ((unsigned long)&_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
+        addr = ((unsigned long)_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
 #endif
         for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
                 pmd_clear(pmd_off_k(addr));
@@ -721,7 +740,7 @@ static inline void prepare_page_table(struct meminfo *mi)
          * Clear out all the kernel space mappings, except for the first
          * memory bank, up to the end of the vmalloc region.
          */
-        for (addr = __phys_to_virt(mi->bank[0].start + mi->bank[0].size);
+        for (addr = __phys_to_virt(bank_phys_end(&meminfo.bank[0]));
              addr < VMALLOC_END; addr += PGDIR_SIZE)
                 pmd_clear(pmd_off_k(addr));
 }
@@ -738,10 +757,10 @@ void __init reserve_node_zero(pg_data_t *pgdat)
          * Note that this can only be in node 0.
          */
 #ifdef CONFIG_XIP_KERNEL
-        reserve_bootmem_node(pgdat, __pa(&__data_start), &_end - &__data_start,
+        reserve_bootmem_node(pgdat, __pa(_data), _end - _data,
                         BOOTMEM_DEFAULT);
 #else
-        reserve_bootmem_node(pgdat, __pa(&_stext), &_end - &_stext,
+        reserve_bootmem_node(pgdat, __pa(_stext), _end - _stext,
                         BOOTMEM_DEFAULT);
 #endif
 
@@ -808,7 +827,6 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
          * Allocate the vector page early.
          */
         vectors = alloc_bootmem_low_pages(PAGE_SIZE);
-        BUG_ON(!vectors);
 
         for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
                 pmd_clear(pmd_off_k(addr));
@@ -820,7 +838,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
 #ifdef CONFIG_XIP_KERNEL
         map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK);
         map.virtual = MODULES_VADDR;
-        map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
+        map.length = ((unsigned long)_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
         map.type = MT_ROM;
         create_mapping(&map);
 #endif
@@ -880,23 +898,23 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
  * paging_init() sets up the page tables, initialises the zone memory
  * maps, and sets up the zero page, bad page and bad page tables.
  */
-void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
+void __init paging_init(struct machine_desc *mdesc)
 {
         void *zero_page;
 
         build_mem_type_table();
-        sanity_check_meminfo(mi);
-        prepare_page_table(mi);
-        bootmem_init(mi);
+        sanity_check_meminfo();
+        prepare_page_table();
+        bootmem_init();
         devicemaps_init(mdesc);
 
         top_pmd = pmd_off_k(0xffff0000);
 
         /*
-         * allocate the zero page.  Note that we count on this going ok.
+         * allocate the zero page.  Note that this always succeeds and
+         * returns a zeroed result.
          */
         zero_page = alloc_bootmem_low_pages(PAGE_SIZE);
-        memzero(zero_page, PAGE_SIZE);
         empty_zero_page = virt_to_page(zero_page);
         flush_dcache_page(empty_zero_page);
 }
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 07b62b238979..ad7bacc693b2 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -10,6 +10,7 @@
 #include <linux/io.h>
 
 #include <asm/cacheflush.h>
+#include <asm/sections.h>
 #include <asm/page.h>
 #include <asm/mach/arch.h>
 
@@ -25,10 +26,10 @@ void __init reserve_node_zero(pg_data_t *pgdat)
          * Note that this can only be in node 0.
          */
 #ifdef CONFIG_XIP_KERNEL
-        reserve_bootmem_node(pgdat, __pa(&__data_start), &_end - &__data_start,
+        reserve_bootmem_node(pgdat, __pa(_data), _end - _data,
                         BOOTMEM_DEFAULT);
 #else
-        reserve_bootmem_node(pgdat, __pa(&_stext), &_end - &_stext,
+        reserve_bootmem_node(pgdat, __pa(_stext), _end - _stext,
                         BOOTMEM_DEFAULT);
 #endif
 
@@ -41,27 +42,13 @@ void __init reserve_node_zero(pg_data_t *pgdat)
                         BOOTMEM_DEFAULT);
 }
 
-static void __init sanity_check_meminfo(struct meminfo *mi)
-{
-        int i, j;
-
-        for (i = 0, j = 0; i < mi->nr_banks; i++) {
-                struct membank *mb = &mi->bank[i];
-
-                if (mb->size != 0 && mb->node < MAX_NUMNODES)
-                        mi->bank[j++] = mi->bank[i];
-        }
-        mi->nr_banks = j;
-}
-
 /*
  * paging_init() sets up the page tables, initialises the zone memory
  * maps, and sets up the zero page, bad page and bad page tables.
  */
-void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
+void __init paging_init(struct machine_desc *mdesc)
 {
-        sanity_check_meminfo(mi);
-        bootmem_init(mi);
+        bootmem_init();
 }
 
 /*
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index e0f19ab91163..2690146161ba 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -31,7 +31,7 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
         if (!new_pgd)
                 goto no_pgd;
 
-        memzero(new_pgd, FIRST_KERNEL_PGD_NR * sizeof(pgd_t));
+        memset(new_pgd, 0, FIRST_KERNEL_PGD_NR * sizeof(pgd_t));
 
         /*
          * Copy over the kernel and IO PGD entries
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 2b5ba396e3a6..4ad3bf291ad3 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -33,8 +33,8 @@ EXPORT_SYMBOL(cpu_cache);
 
 #ifdef CONFIG_MMU
 #ifndef MULTI_USER
-EXPORT_SYMBOL(__cpu_clear_user_page);
-EXPORT_SYMBOL(__cpu_copy_user_page);
+EXPORT_SYMBOL(__cpu_clear_user_highpage);
+EXPORT_SYMBOL(__cpu_copy_user_highpage);
 #else
 EXPORT_SYMBOL(cpu_user);
 #endif
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 294943b85973..f0cc599facb7 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -71,6 +71,8 @@ ENTRY(cpu_v6_reset)
  *      IRQs are already disabled.
  */
 ENTRY(cpu_v6_do_idle)
+        mov     r1, #0
+        mcr     p15, 0, r1, c7, c10, 4          @ DWB - WFI may enter a low-power mode
         mcr     p15, 0, r1, c7, c0, 4           @ wait for interrupt
         mov     pc, lr
 
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 4d3c0a73e7fb..d1ebec42521d 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -20,9 +20,17 @@
 
 #define TTB_C           (1 << 0)
 #define TTB_S           (1 << 1)
+#define TTB_RGN_NC      (0 << 3)
+#define TTB_RGN_OC_WBWA (1 << 3)
 #define TTB_RGN_OC_WT   (2 << 3)
 #define TTB_RGN_OC_WB   (3 << 3)
 
+#ifndef CONFIG_SMP
+#define TTB_FLAGS       TTB_C|TTB_RGN_OC_WB             @ mark PTWs cacheable, outer WB
+#else
+#define TTB_FLAGS       TTB_C|TTB_S|TTB_RGN_OC_WBWA     @ mark PTWs cacheable and shared, outer WBWA
+#endif
+
 ENTRY(cpu_v7_proc_init)
         mov     pc, lr
 ENDPROC(cpu_v7_proc_init)
@@ -55,6 +63,7 @@ ENDPROC(cpu_v7_reset)
  *      IRQs are already disabled.
  */
 ENTRY(cpu_v7_do_idle)
+        dsb                                     @ WFI may enter a low-power mode
         wfi
         mov     pc, lr
 ENDPROC(cpu_v7_do_idle)
@@ -85,7 +94,7 @@ ENTRY(cpu_v7_switch_mm)
 #ifdef CONFIG_MMU
         mov     r2, #0
         ldr     r1, [r1, #MM_CONTEXT_ID]        @ get mm->context.id
-        orr     r0, r0, #TTB_RGN_OC_WB          @ mark PTWs outer cacheable, WB
+        orr     r0, r0, #TTB_FLAGS
         mcr     p15, 0, r2, c13, c0, 1          @ set reserved context ID
         isb
 1:      mcr     p15, 0, r0, c2, c0, 0           @ set TTB 0
@@ -162,6 +171,11 @@ cpu_v7_name:
  *      - cache type register is implemented
  */
 __v7_setup:
+#ifdef CONFIG_SMP
+        mrc     p15, 0, r0, c1, c0, 1           @ Enable SMP/nAMP mode
+        orr     r0, r0, #(0x1 << 6)
+        mcr     p15, 0, r0, c1, c0, 1
+#endif
         adr     r12, __v7_setup_stack           @ the local stack
         stmia   r12, {r0-r5, r7, r9, r11, lr}
         bl      v7_flush_dcache_all
@@ -174,8 +188,7 @@ __v7_setup:
 #ifdef CONFIG_MMU
         mcr     p15, 0, r10, c8, c7, 0          @ invalidate I + D TLBs
         mcr     p15, 0, r10, c2, c0, 2          @ TTB control register
-        orr     r4, r4, #TTB_RGN_OC_WB          @ mark PTWs outer cacheable, WB
-        mcr     p15, 0, r4, c2, c0, 0           @ load TTB0
+        orr     r4, r4, #TTB_FLAGS
         mcr     p15, 0, r4, c2, c0, 1           @ load TTB1
         mov     r10, #0x1f                      @ domains 0, 1 = manager
         mcr     p15, 0, r10, c3, c0, 0          @ load domain access register
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 8f6cf56c11c0..33515c214b92 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -481,3 +481,28 @@ __xsc3_proc_info:
         .long   xsc3_mc_user_fns
         .long   xsc3_cache_fns
         .size   __xsc3_proc_info, . - __xsc3_proc_info
+
+/* Note: PXA935 changed its implementor ID from Intel to Marvell */
+
+        .type   __xsc3_pxa935_proc_info,#object
+__xsc3_pxa935_proc_info:
+        .long   0x56056000
+        .long   0xffffe000
+        .long   PMD_TYPE_SECT | \
+                PMD_SECT_BUFFERABLE | \
+                PMD_SECT_CACHEABLE | \
+                PMD_SECT_AP_WRITE | \
+                PMD_SECT_AP_READ
+        .long   PMD_TYPE_SECT | \
+                PMD_SECT_AP_WRITE | \
+                PMD_SECT_AP_READ
+        b       __xsc3_setup
+        .long   cpu_arch_name
+        .long   cpu_elf_name
+        .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+        .long   cpu_xsc3_name
+        .long   xsc3_processor_functions
+        .long   v4wbi_tlb_fns
+        .long   xsc3_mc_user_fns
+        .long   xsc3_cache_fns
+        .size   __xsc3_pxa935_proc_info, . - __xsc3_pxa935_proc_info
diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c
index 4de366e8b4c5..6d6bd5899240 100644
--- a/arch/arm/oprofile/op_model_mpcore.c
+++ b/arch/arm/oprofile/op_model_mpcore.c
@@ -260,10 +260,10 @@ static void em_stop(void)
 static void em_route_irq(int irq, unsigned int cpu)
 {
         struct irq_desc *desc = irq_desc + irq;
-        cpumask_t mask = cpumask_of_cpu(cpu);
+        const struct cpumask *mask = cpumask_of(cpu);
 
         spin_lock_irq(&desc->lock);
-        desc->affinity = mask;
+        desc->affinity = *mask;
         desc->chip->set_affinity(irq, mask);
         spin_unlock_irq(&desc->lock);
 }
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b2a7e3fad117..9cc2b16fdf79 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -6,18 +6,27 @@ choice
         prompt "MXC/iMX Base Type"
         default ARCH_MX3
 
+config ARCH_MX1
+        bool "MX1-based"
+        select CPU_ARM920T
+        help
+          This enables support for systems based on the Freescale i.MX1 family
+
 config ARCH_MX2
         bool "MX2-based"
+        select CPU_ARM926T
         help
           This enables support for systems based on the Freescale i.MX2 family
 
 config ARCH_MX3
         bool "MX3-based"
+        select CPU_V6
         help
           This enables support for systems based on the Freescale i.MX3 family
 
 endchoice
 
+source "arch/arm/mach-mx1/Kconfig"
 source "arch/arm/mach-mx2/Kconfig"
 source "arch/arm/mach-mx3/Kconfig"
 
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 067556f7c91f..db74a929179d 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,4 +5,5 @@
 # Common support
 obj-y := irq.o clock.o gpio.o time.o devices.o
 
+obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o
 obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c
index b296f19fd89a..2905ec758758 100644
--- a/arch/arm/plat-mxc/dma-mx1-mx2.c
+++ b/arch/arm/plat-mxc/dma-mx1-mx2.c
@@ -34,7 +34,6 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
 #include <mach/dma-mx1-mx2.h>
 
 #define DMA_DCR     0x00                /* Control Register */
@@ -114,7 +113,7 @@ struct imx_dma_channel {
         void (*err_handler) (int, void *, int errcode);
         void (*prog_handler) (int, void *, struct scatterlist *);
         void *data;
-        dmamode_t  dma_mode;
+        unsigned int  dma_mode;
         struct scatterlist *sg;
         unsigned int resbytes;
         int dma_num;
@@ -193,7 +192,7 @@ static inline int imx_dma_sg_next(int channel, struct scatterlist *sg)
 int
 imx_dma_setup_single(int channel, dma_addr_t dma_address,
                      unsigned int dma_length, unsigned int dev_addr,
-                     dmamode_t dmamode)
+                     unsigned int dmamode)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
 
@@ -288,7 +287,7 @@ int
 imx_dma_setup_sg(int channel,
                  struct scatterlist *sg, unsigned int sgcount,
                  unsigned int dma_length, unsigned int dev_addr,
-                 dmamode_t dmamode)
+                 unsigned int dmamode)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
 
@@ -512,6 +511,7 @@ void imx_dma_disable(int channel)
 }
 EXPORT_SYMBOL(imx_dma_disable);
 
+#ifdef CONFIG_ARCH_MX2
 static void imx_dma_watchdog(unsigned long chno)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
@@ -523,6 +523,7 @@ static void imx_dma_watchdog(unsigned long chno)
         if (imxdma->err_handler)
                 imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT);
 }
+#endif
 
 static irqreturn_t dma_err_handler(int irq, void *dev_id)
 {
@@ -675,7 +676,7 @@ int imx_dma_request(int channel, const char *name)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
         unsigned long flags;
-        int ret;
+        int ret = 0;
 
         /* basic sanity checks */
         if (!name)
@@ -697,6 +698,7 @@ int imx_dma_request(int channel, const char *name)
         ret = request_irq(MXC_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA",
                         NULL);
         if (ret) {
+                local_irq_restore(flags);
                 printk(KERN_CRIT "Can't register IRQ %d for DMA channel %d\n",
                                 MXC_INT_DMACH0 + channel, channel);
                 return ret;
@@ -713,7 +715,7 @@ int imx_dma_request(int channel, const char *name)
         imxdma->sg = NULL;
 
         local_irq_restore(flags);
-        return 0;
+        return ret;
 }
 EXPORT_SYMBOL(imx_dma_request);
 
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index de5c4747453f..ccbd94adc668 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -115,8 +115,8 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
         }
 }
 
-#ifdef CONFIG_ARCH_MX3
-/* MX3 has one interrupt *per* gpio port */
+#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX1)
+/* MX1 and MX3 has one interrupt *per* gpio port */
 static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
 {
         u32 irq_stat;
@@ -237,7 +237,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
                 /* its a serious configuration bug when it fails */
                 BUG_ON( gpiochip_add(&port[i].chip) < 0 );
 
-#ifdef CONFIG_ARCH_MX3
+#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX1)
                 /* setup one handler for each entry */
                 set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler);
                 set_irq_data(port[i].irq, &port[i]);
diff --git a/arch/arm/plat-mxc/include/mach/board-mx27ads.h b/arch/arm/plat-mxc/include/mach/board-mx27ads.h
index 61e66dac90ef..8f34a05afc87 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx27ads.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx27ads.h
@@ -15,7 +15,7 @@
 #define __ASM_ARCH_MXC_BOARD_MX27ADS_H__
 
 /* external interrupt multiplexer */
-#define MXC_EXP_IO_BASE         (MXC_GPIO_BASE + MXC_MAX_GPIO_LINES)
+#define MXC_EXP_IO_BASE         (MXC_BOARD_IRQ_START)
 
 #define MXC_VIRTUAL_INTS_BASE   (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES)
 #define MXC_SDIO1_CARD_IRQ      MXC_VIRTUAL_INTS_BASE
@@ -28,11 +28,6 @@
 /*
  * MXC UART EVB board level configurations
  */
-
-#define MXC_LL_EXTUART_PADDR    (CS4_BASE_ADDR + 0x20000)
-#define MXC_LL_EXTUART_VADDR    (CS4_BASE_ADDR_VIRT + 0x20000)
-#define MXC_LL_EXTUART_16BIT_BUS
-
 #define MXC_LL_UART_PADDR       UART1_BASE_ADDR
 #define MXC_LL_UART_VADDR       AIPI_IO_ADDRESS(UART1_BASE_ADDR)
 
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
index 745b48864f93..451d510d08c3 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
@@ -90,7 +90,7 @@
 #define PBC_INTMASK_CLEAR_REG   (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
 #define EXPIO_PARENT_INT        IOMUX_TO_IRQ(MX31_PIN_GPIO1_4)
 
-#define MXC_EXP_IO_BASE         (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES)
+#define MXC_EXP_IO_BASE         (MXC_BOARD_IRQ_START)
 #define MXC_IRQ_TO_EXPIO(irq)   ((irq) - MXC_EXP_IO_BASE)
 
 #define EXPIO_INT_LOW_BAT       (MXC_EXP_IO_BASE + 0)
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31pdk.h b/arch/arm/plat-mxc/include/mach/board-mx31pdk.h
new file mode 100644
index 000000000000..2b6b316d0f51
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/board-mx31pdk.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__
+#define __ASM_ARCH_MXC_BOARD_MX31PDK_H__
+
+/* mandatory for CONFIG_LL_DEBUG */
+
+#define MXC_LL_UART_PADDR       UART1_BASE_ADDR
+#define MXC_LL_UART_VADDR       AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
+
+#endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index b9907bebba3b..602768b427e2 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -28,6 +28,9 @@
 #ifdef CONFIG_MACH_PCM038
 #include <mach/board-pcm038.h>
 #endif
+#ifdef CONFIG_MACH_MX31_3DS
+#include <mach/board-mx31pdk.h>
+#endif
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1                 @ MMU enabled?
diff --git a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
index e85fd946116c..b3876cc238ca 100644
--- a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
+++ b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
@@ -22,13 +22,15 @@
  * MA 02110-1301, USA.
  */
 
-#include <asm/dma.h>
-
 #ifndef __ASM_ARCH_MXC_DMA_H
 #define __ASM_ARCH_MXC_DMA_H
 
 #define IMX_DMA_CHANNELS  16
 
+#define DMA_MODE_READ           0
+#define DMA_MODE_WRITE          1
+#define DMA_MODE_MASK           1
+
 #define DMA_BASE IO_ADDRESS(DMA_BASE_ADDR)
 
 #define IMX_DMA_MEMSIZE_32      (0 << 4)
@@ -54,12 +56,12 @@ imx_dma_config_burstlen(int channel, unsigned int burstlen);
 int
 imx_dma_setup_single(int channel, dma_addr_t dma_address,
                 unsigned int dma_length, unsigned int dev_addr,
-                dmamode_t dmamode);
+                unsigned int dmamode);
 
 int
 imx_dma_setup_sg(int channel, struct scatterlist *sg,
                 unsigned int sgcount, unsigned int dma_length,
-                unsigned int dev_addr, dmamode_t dmamode);
+                unsigned int dev_addr, unsigned int dmamode);
 
 int
 imx_dma_setup_handlers(int channel,
diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h
deleted file mode 100644
index c822d569a05e..000000000000
--- a/arch/arm/plat-mxc/include/mach/dma.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MXC_DMA_H__
-#define __ASM_ARCH_MXC_DMA_H__
-
-#endif
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 11632028f7d1..5f01d60da845 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,6 +9,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <mach/hardware.h>
+
 #define AVIC_NIMASK     0x04
 
         @ this macro disables fast irq (not implemented)
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
index 65eedc0d196f..ea509f1090fb 100644
--- a/arch/arm/plat-mxc/include/mach/gpio.h
+++ b/arch/arm/plat-mxc/include/mach/gpio.h
@@ -27,8 +27,8 @@
 #define gpio_set_value          __gpio_set_value
 #define gpio_cansleep           __gpio_cansleep
 
-#define gpio_to_irq(gpio)       (MXC_MAX_INT_LINES + (gpio))
-#define irq_to_gpio(irq)        ((irq) - MXC_MAX_INT_LINES)
+#define gpio_to_irq(gpio)       (MXC_GPIO_IRQ_START + (gpio))
+#define irq_to_gpio(irq)        ((irq) - MXC_GPIO_IRQ_START)
 
 struct mxc_gpio_port {
         void __iomem *base;
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 3caadeeda701..a612d8bb73c8 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -32,6 +32,10 @@
 # endif
 #endif
 
+#ifdef CONFIG_ARCH_MX1
+# include <mach/mx1.h>
+#endif
+
 #include <mach/mxc.h>
 
 #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
index 5d4cb1196441..b4f2de769466 100644
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ b/arch/arm/plat-mxc/include/mach/io.h
@@ -25,8 +25,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
                 /* Access all peripherals below 0x80000000 as nonshared device
                  * but leave l2cc alone.
                  */
-                if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) ||
-                        (phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE)))
+                if ((phys_addr < 0x80000000) && ((phys_addr < 0x30000000) ||
+                        (phys_addr >= 0x30000000 + SZ_1M)))
                         mtype = MT_DEVICE_NONSHARED;
         }
 
@@ -35,8 +35,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
 #endif
 
 /* io address mapping macro */
-#define __io(a)                 ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 
-#define __mem_pci(a)            (a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
index 3d09bfd6c53d..95a383be628e 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
@@ -21,12 +21,6 @@
 
 #include <linux/io.h>
 
-#define MXC_GPIO_ALLOC_MODE_NORMAL      0
-#define MXC_GPIO_ALLOC_MODE_NO_ALLOC    1
-#define MXC_GPIO_ALLOC_MODE_TRY_ALLOC   2
-#define MXC_GPIO_ALLOC_MODE_ALLOC_ONLY  4
-#define MXC_GPIO_ALLOC_MODE_RELEASE     8
-
 /*
  *  GPIO Module and I/O Multiplexer
  *  x = 0..3 for reg_A, reg_B, reg_C, reg_D
@@ -103,7 +97,8 @@
 
 extern void mxc_gpio_mode(int gpio_mode);
 extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
-                                        int alloc_mode, const char *label);
+                                        const char *label);
+extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
 
 /*-------------------------------------------------------------------------*/
 
@@ -113,9 +108,9 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
  * missing on some (many) pins
  */
 #ifdef CONFIG_ARCH_MX1
-#define PA0_AIN_SPI2_CLK     (GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 0)
+#define PA0_AIN_SPI2_CLK     (GPIO_PORTA | GPIO_OUT | 0)
 #define PA0_AF_ETMTRACESYNC  (GPIO_PORTA | GPIO_AF | 0)
-#define PA1_AOUT_SPI2_RXD    (GPIO_GIUS | GPIO_PORTA | GPIO_IN | 1)
+#define PA1_AOUT_SPI2_RXD    (GPIO_PORTA | GPIO_IN | 1)
 #define PA1_PF_TIN           (GPIO_PORTA | GPIO_PF | 1)
 #define PA2_PF_PWM0          (GPIO_PORTA | GPIO_OUT | GPIO_PF | 2)
 #define PA3_PF_CSI_MCLK      (GPIO_PORTA | GPIO_PF | 3)
@@ -133,7 +128,7 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 #define PA15_PF_I2C_SDA      (GPIO_PORTA | GPIO_OUT | GPIO_PF | 15)
 #define PA16_PF_I2C_SCL      (GPIO_PORTA | GPIO_OUT | GPIO_PF | 16)
 #define PA17_AF_ETMTRACEPKT4 (GPIO_PORTA | GPIO_AF | 17)
-#define PA17_AIN_SPI2_SS     (GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 17)
+#define PA17_AIN_SPI2_SS     (GPIO_PORTA | GPIO_OUT | 17)
 #define PA18_AF_ETMTRACEPKT5 (GPIO_PORTA | GPIO_AF | 18)
 #define PA19_AF_ETMTRACEPKT6 (GPIO_PORTA | GPIO_AF | 19)
 #define PA20_AF_ETMTRACEPKT7 (GPIO_PORTA | GPIO_AF | 20)
@@ -201,27 +196,27 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 #define PC15_PF_SPI1_SS      (GPIO_PORTC | GPIO_PF | 15)
 #define PC16_PF_SPI1_MISO    (GPIO_PORTC | GPIO_PF | 16)
 #define PC17_PF_SPI1_MOSI    (GPIO_PORTC | GPIO_PF | 17)
-#define PC24_BIN_UART3_RI    (GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24)
-#define PC25_BIN_UART3_DSR   (GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25)
-#define PC26_AOUT_UART3_DTR  (GPIO_GIUS | GPIO_PORTC | GPIO_IN | 26)
-#define PC27_BIN_UART3_DCD   (GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27)
-#define PC28_BIN_UART3_CTS   (GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28)
-#define PC29_AOUT_UART3_RTS  (GPIO_GIUS | GPIO_PORTC | GPIO_IN | 29)
-#define PC30_BIN_UART3_TX    (GPIO_GIUS | GPIO_PORTC | GPIO_BIN | 30)
-#define PC31_AOUT_UART3_RX   (GPIO_GIUS | GPIO_PORTC | GPIO_IN | 31)
+#define PC24_BIN_UART3_RI    (GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24)
+#define PC25_BIN_UART3_DSR   (GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25)
+#define PC26_AOUT_UART3_DTR  (GPIO_PORTC | GPIO_IN | 26)
+#define PC27_BIN_UART3_DCD   (GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27)
+#define PC28_BIN_UART3_CTS   (GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28)
+#define PC29_AOUT_UART3_RTS  (GPIO_PORTC | GPIO_IN | 29)
+#define PC30_BIN_UART3_TX    (GPIO_PORTC | GPIO_BIN | 30)
+#define PC31_AOUT_UART3_RX   (GPIO_PORTC | GPIO_IN | 31)
 #define PD6_PF_LSCLK         (GPIO_PORTD | GPIO_OUT | GPIO_PF | 6)
 #define PD7_PF_REV           (GPIO_PORTD | GPIO_PF | 7)
-#define PD7_AF_UART2_DTR     (GPIO_GIUS | GPIO_PORTD | GPIO_IN | GPIO_AF | 7)
-#define PD7_AIN_SPI2_SCLK    (GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 7)
+#define PD7_AF_UART2_DTR     (GPIO_PORTD | GPIO_IN | GPIO_AF | 7)
+#define PD7_AIN_SPI2_SCLK    (GPIO_PORTD | GPIO_AIN | 7)
 #define PD8_PF_CLS           (GPIO_PORTD | GPIO_PF | 8)
 #define PD8_AF_UART2_DCD     (GPIO_PORTD | GPIO_OUT | GPIO_AF | 8)
-#define PD8_AIN_SPI2_SS      (GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 8)
+#define PD8_AIN_SPI2_SS      (GPIO_PORTD | GPIO_AIN | 8)
 #define PD9_PF_PS            (GPIO_PORTD | GPIO_PF | 9)
 #define PD9_AF_UART2_RI      (GPIO_PORTD | GPIO_OUT | GPIO_AF | 9)
-#define PD9_AOUT_SPI2_RXD    (GPIO_GIUS | GPIO_PORTD | GPIO_IN | 9)
+#define PD9_AOUT_SPI2_RXD    (GPIO_PORTD | GPIO_IN | 9)
 #define PD10_PF_SPL_SPR      (GPIO_PORTD | GPIO_OUT | GPIO_PF | 10)
 #define PD10_AF_UART2_DSR    (GPIO_PORTD | GPIO_OUT | GPIO_AF | 10)
-#define PD10_AIN_SPI2_TXD    (GPIO_GIUS | GPIO_PORTD | GPIO_OUT | 10)
+#define PD10_AIN_SPI2_TXD    (GPIO_PORTD | GPIO_OUT | 10)
 #define PD11_PF_CONTRAST     (GPIO_PORTD | GPIO_OUT | GPIO_PF | 11)
 #define PD12_PF_ACD_OE       (GPIO_PORTD | GPIO_OUT | GPIO_PF | 12)
 #define PD13_PF_LP_HSYNC     (GPIO_PORTD | GPIO_OUT | GPIO_PF | 13)
@@ -243,7 +238,7 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 #define PD29_PF_LD14         (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29)
 #define PD30_PF_LD15         (GPIO_PORTD | GPIO_OUT | GPIO_PF | 30)
 #define PD31_PF_TMR2OUT      (GPIO_PORTD | GPIO_PF | 31)
-#define PD31_BIN_SPI2_TXD    (GPIO_GIUS | GPIO_PORTD | GPIO_BIN | 31)
+#define PD31_BIN_SPI2_TXD    (GPIO_PORTD | GPIO_BIN | 31)
 #endif
 
 #ifdef CONFIG_ARCH_MX2
@@ -279,6 +274,12 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 #define PA29_PF_VSYNC           (GPIO_PORTA | GPIO_OUT | GPIO_PF | 29)
 #define PA30_PF_CONTRAST        (GPIO_PORTA | GPIO_OUT | GPIO_PF | 30)
 #define PA31_PF_OE_ACD          (GPIO_PORTA | GPIO_OUT | GPIO_PF | 31)
+#define PB4_PF_SD2_D0           (GPIO_PORTB | GPIO_PF |  4)
+#define PB5_PF_SD2_D1           (GPIO_PORTB | GPIO_PF |  5)
+#define PB6_PF_SD2_D2           (GPIO_PORTB | GPIO_PF |  6)
+#define PB7_PF_SD2_D3           (GPIO_PORTB | GPIO_PF |  7)
+#define PB8_PF_SD2_CMD          (GPIO_PORTB | GPIO_PF |  8)
+#define PB9_PF_SD2_CLK          (GPIO_PORTB | GPIO_PF |  9)
 #define PB10_PF_CSI_D0          (GPIO_PORTB | GPIO_OUT | GPIO_PF | 10)
 #define PB10_AF_UART6_TXD       (GPIO_PORTB | GPIO_OUT | GPIO_AF | 10)
 #define PB11_PF_CSI_D1          (GPIO_PORTB | GPIO_OUT | GPIO_PF | 11)
@@ -315,6 +316,13 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 #define PB31_AF_UART4_RXD       (GPIO_PORTB | GPIO_IN  | GPIO_AF | 31)
 #define PC5_PF_I2C2_SDA         (GPIO_PORTC | GPIO_IN  | GPIO_PF | 5)
 #define PC6_PF_I2C2_SCL         (GPIO_PORTC | GPIO_IN  | GPIO_PF | 6)
+#define PC7_PF_USBOTG_DATA5     (GPIO_PORTC | GPIO_OUT | GPIO_PF | 7)
+#define PC8_PF_USBOTG_DATA6     (GPIO_PORTC | GPIO_OUT | GPIO_PF | 8)
+#define PC9_PF_USBOTG_DATA0     (GPIO_PORTC | GPIO_OUT | GPIO_PF | 9)
+#define PC10_PF_USBOTG_DATA2    (GPIO_PORTC | GPIO_OUT | GPIO_PF | 10)
+#define PC11_PF_USBOTG_DATA1    (GPIO_PORTC | GPIO_OUT | GPIO_PF | 11)
+#define PC12_PF_USBOTG_DATA4    (GPIO_PORTC | GPIO_OUT | GPIO_PF | 12)
+#define PC13_PF_USBOTG_DATA3    (GPIO_PORTC | GPIO_OUT | GPIO_PF | 13)
 #define PC16_PF_SSI4_FS         (GPIO_PORTC | GPIO_IN  | GPIO_PF | 16)
 #define PC17_PF_SSI4_RXD        (GPIO_PORTC | GPIO_IN  | GPIO_PF | 17)
 #define PC18_PF_SSI4_TXD        (GPIO_PORTC | GPIO_IN  | GPIO_PF | 18)
@@ -365,6 +373,9 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 #define PD30_PF_CSPI1_MISO      (GPIO_PORTD | GPIO_IN | GPIO_PF  | 30)
 #define PD31_PF_CSPI1_MOSI      (GPIO_PORTD | GPIO_OUT | GPIO_PF  | 31)
 #define PF23_AIN_FEC_TX_EN      (GPIO_PORTF | GPIO_OUT | GPIO_AIN | 23)
+#define PE0_PF_USBOTG_NXT       (GPIO_PORTE | GPIO_OUT | GPIO_PF | 0)
+#define PE1_PF_USBOTG_STP       (GPIO_PORTE | GPIO_OUT | GPIO_PF | 1)
+#define PE2_PF_USBOTG_DIR       (GPIO_PORTE | GPIO_OUT | GPIO_PF | 2)
 #define PE3_PF_UART2_CTS        (GPIO_PORTE | GPIO_OUT | GPIO_PF | 3)
 #define PE4_PF_UART2_RTS        (GPIO_PORTE | GPIO_IN  | GPIO_PF | 4)
 #define PE6_PF_UART2_TXD        (GPIO_PORTE | GPIO_OUT | GPIO_PF | 6)
@@ -379,18 +390,27 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 #define PE15_PF_UART1_RTS       (GPIO_PORTE | GPIO_IN  | GPIO_PF | 15)
 #define PE16_AF_RTCK            (GPIO_PORTE | GPIO_OUT | GPIO_AF | 16)
 #define PE16_PF_RTCK            (GPIO_PORTE | GPIO_OUT | GPIO_PF | 16)
+#define PE18_PF_SDHC1_D0        (GPIO_PORTE | GPIO_PF | 18)
 #define PE18_AF_CSPI3_MISO      (GPIO_PORTE | GPIO_IN  | GPIO_AF | 18)
+#define PE19_PF_SDHC1_D1        (GPIO_PORTE | GPIO_PF | 19)
+#define PE20_PF_SDHC1_D2        (GPIO_PORTE | GPIO_PF | 20)
+#define PE21_PF_SDHC1_D3        (GPIO_PORTE | GPIO_PF | 21)
 #define PE21_AF_CSPI3_SS        (GPIO_PORTE | GPIO_OUT | GPIO_AF | 21)
+#define PE22_PF_SDHC1_CMD       (GPIO_PORTE | GPIO_PF | 22)
 #define PE22_AF_CSPI3_MOSI      (GPIO_PORTE | GPIO_OUT | GPIO_AF | 22)
+#define PE22_PF_SDHC1_CLK       (GPIO_PORTE | GPIO_PF | 23)
 #define PE23_AF_CSPI3_SCLK      (GPIO_PORTE | GPIO_OUT | GPIO_AF | 23)
+#define PE24_PF_USBOTG_CLK      (GPIO_PORTE | GPIO_OUT | GPIO_PF | 24)
+#define PE25_PF_USBOTG_DATA7    (GPIO_PORTE | GPIO_OUT | GPIO_PF | 25)
 #endif
 
 /* decode irq number to use with IMR(x), ISR(x) and friends */
-#define IRQ_TO_REG(irq) ((irq - MXC_MAX_INT_LINES) >> 5)
+#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
 
-#define IRQ_GPIOA(x)  (MXC_MAX_INT_LINES + x)
+#define IRQ_GPIOA(x)  (MXC_GPIO_IRQ_START + x)
 #define IRQ_GPIOB(x)  (IRQ_GPIOA(32) + x)
 #define IRQ_GPIOC(x)  (IRQ_GPIOB(32) + x)
 #define IRQ_GPIOD(x)  (IRQ_GPIOC(32) + x)
+#define IRQ_GPIOE(x)  (IRQ_GPIOD(32) + x)
 
 #endif /* _MXC_GPIO_MX1_MX2_H */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index c9f39c2fb8c6..c9198c0aea18 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -141,7 +141,7 @@ void mxc_iomux_set_gpr(enum iomux_gp_func, bool);
         ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT)
 #define IOMUX_TO_IRQ(iomux_pin) \
         (((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) + \
-        MXC_GPIO_INT_BASE)
+        MXC_GPIO_IRQ_START)
 
 /*
  * This enumeration is constructed based on the Section
@@ -491,6 +491,14 @@ enum iomux_pins {
 #define MX31_PIN_RTS1__RTS1             IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_TXD1__TXD1             IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_RXD1__RXD1             IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_CTS2__CTS2             IOMUX_MODE(MX31_PIN_CTS2, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_RTS2__RTS2             IOMUX_MODE(MX31_PIN_RTS2, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_TXD2__TXD2             IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_RXD2__RXD2             IOMUX_MODE(MX31_PIN_RXD2, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_PC_RST__CTS5           IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2)
+#define MX31_PIN_PC_VS2__RTS5           IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2)
+#define MX31_PIN_PC_BVD2__TXD5          IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2)
+#define MX31_PIN_PC_BVD1__RXD5          IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT2)
 #define MX31_PIN_CSPI1_MOSI__MOSI       IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_CSPI1_MISO__MISO       IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_CSPI1_SCLK__SCLK       IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_FUNC)
@@ -509,6 +517,15 @@ enum iomux_pins {
 #define MX31_PIN_CSPI3_MISO__MISO       IOMUX_MODE(MX31_PIN_CSPI3_MISO, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_CSPI3_SCLK__SCLK       IOMUX_MODE(MX31_PIN_CSPI3_SCLK, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_CSPI3_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI3_SPI_RDY, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_BATT_LINE__OWIRE       IOMUX_MODE(MX31_PIN_BATT_LINE, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_CS4__CS4               IOMUX_MODE(MX31_PIN_CS4, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_SD1_DATA3__SD1_DATA3   IOMUX_MODE(MX31_PIN_SD1_DATA3, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_SD1_DATA2__SD1_DATA2   IOMUX_MODE(MX31_PIN_SD1_DATA2, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_SD1_DATA1__SD1_DATA1   IOMUX_MODE(MX31_PIN_SD1_DATA1, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_SD1_DATA0__SD1_DATA0   IOMUX_MODE(MX31_PIN_SD1_DATA0, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_SD1_CLK__SD1_CLK       IOMUX_MODE(MX31_PIN_SD1_CLK, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_SD1_CMD__SD1_CMD       IOMUX_MODE(MX31_PIN_SD1_CMD, IOMUX_CONFIG_FUNC)
+
 /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
  * cspi1_ss1*/
 
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index b55bba35e18a..e06d3cb0ee11 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -11,7 +11,37 @@
 #ifndef __ASM_ARCH_MXC_IRQS_H__
 #define __ASM_ARCH_MXC_IRQS_H__
 
-#include <mach/hardware.h>
+/*
+ * So far all i.MX SoCs have 64 internal interrupts
+ */
+#define MXC_INTERNAL_IRQS       64
+
+#define MXC_GPIO_IRQ_START      MXC_INTERNAL_IRQS
+
+#if defined CONFIG_ARCH_MX1
+#define MXC_GPIO_IRQS           (32 * 4)
+#elif defined CONFIG_ARCH_MX2
+#define MXC_GPIO_IRQS           (32 * 6)
+#elif defined CONFIG_ARCH_MX3
+#define MXC_GPIO_IRQS           (32 * 3)
+#endif
+
+/*
+ * The next 16 interrupts are for board specific purposes.  Since
+ * the kernel can only run on one machine at a time, we can re-use
+ * these.  If you need more, increase MXC_BOARD_IRQS, but keep it
+ * within sensible limits.
+ */
+#define MXC_BOARD_IRQ_START     (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS)
+#define MXC_BOARD_IRQS  16
+
+#define NR_IRQS         (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS)
+
 extern void imx_irq_set_priority(unsigned char irq, unsigned char prio);
 
+/* all normal IRQs can be FIQs */
+#define FIQ_START       0
+/* switch betwean IRQ and FIQ */
+extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
+
 #endif /* __ASM_ARCH_MXC_IRQS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index d7a8d3ebed57..0b808399097f 100644
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -11,19 +11,12 @@
 #ifndef __ASM_ARCH_MXC_MEMORY_H__
 #define __ASM_ARCH_MXC_MEMORY_H__
 
-#include <mach/hardware.h>
-
-/*
- * Virtual view <-> DMA view memory address translations
- * This macro is used to translate the virtual address to an address
- * suitable to be passed to set_dma_addr()
- */
-#define __virt_to_bus(a)        __virt_to_phys(a)
-
-/*
- * Used to convert an address for DMA operations to an address that the
- * kernel can use.
- */
-#define __bus_to_virt(a)        __phys_to_virt(a)
+#if defined CONFIG_ARCH_MX1
+#define PHYS_OFFSET             UL(0x08000000)
+#elif defined CONFIG_ARCH_MX2
+#define PHYS_OFFSET             UL(0xA0000000)
+#elif defined CONFIG_ARCH_MX3
+#define PHYS_OFFSET             UL(0x80000000)
+#endif
 
 #endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mtd-xip.h b/arch/arm/plat-mxc/include/mach/mtd-xip.h
new file mode 100644
index 000000000000..1ab1bba5688d
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mtd-xip.h
@@ -0,0 +1,34 @@
+/*
+ * MTD primitives for XIP support. Architecture specific functions
+ *
+ * Do not include this file directly. It's included from linux/mtd/xip.h
+ *
+ * Copyright (C) 2008 Darius Augulis <augulis.darius@gmail.com>, Teltonika, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <mach/mxc_timer.h>
+
+#ifndef __ARCH_IMX_MTD_XIP_H__
+#define __ARCH_IMX_MTD_XIP_H__
+
+#ifdef CONFIG_ARCH_MX1
+/* AITC registers */
+#define AITC_BASE       IO_ADDRESS(AVIC_BASE_ADDR)
+#define NIPNDH          (AITC_BASE + 0x58)
+#define NIPNDL          (AITC_BASE + 0x5C)
+#define INTENABLEH      (AITC_BASE + 0x10)
+#define INTENABLEL      (AITC_BASE + 0x14)
+/* MTD macros */
+#define xip_irqpending() ((__raw_readl(INTENABLEH) &  __raw_readl(NIPNDH)) \
+                        || (__raw_readl(INTENABLEL) &  __raw_readl(NIPNDL)))
+#define xip_currtime()          (__raw_readl(TIMER_BASE + MXC_TCN))
+#define xip_elapsed_since(x)    (signed)((__raw_readl(TIMER_BASE + MXC_TCN) - (x)) / 96)
+#define xip_cpu_idle()          asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (0))
+#endif /* CONFIG_ARCH_MX1 */
+
+#endif /* __ARCH_IMX_MTD_XIP_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
new file mode 100644
index 000000000000..b92e02324d8e
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -0,0 +1,186 @@
+/*
+ * Copyright (C) 1997,1998 Russell King
+ * Copyright (C) 1999 ARM Limited
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_MXC_MX1_H__
+#define __ASM_ARCH_MXC_MX1_H__
+
+#ifndef __ASM_ARCH_MXC_HARDWARE_H__
+#error "Do not include directly."
+#endif
+
+#include <mach/vmalloc.h>
+
+/*
+ * Memory map
+ */
+#define IMX_IO_PHYS     0x00200000
+#define IMX_IO_SIZE     0x00100000
+#define IMX_IO_BASE     VMALLOC_END
+
+#define IMX_CS0_PHYS    0x10000000
+#define IMX_CS0_SIZE    0x02000000
+
+#define IMX_CS1_PHYS    0x12000000
+#define IMX_CS1_SIZE    0x01000000
+
+#define IMX_CS2_PHYS    0x13000000
+#define IMX_CS2_SIZE    0x01000000
+
+#define IMX_CS3_PHYS    0x14000000
+#define IMX_CS3_SIZE    0x01000000
+
+#define IMX_CS4_PHYS    0x15000000
+#define IMX_CS4_SIZE    0x01000000
+
+#define IMX_CS5_PHYS    0x16000000
+#define IMX_CS5_SIZE    0x01000000
+
+/*
+ *  Register BASEs, based on OFFSETs
+ */
+#define AIPI1_BASE_ADDR         (0x00000 + IMX_IO_PHYS)
+#define WDT_BASE_ADDR           (0x01000 + IMX_IO_PHYS)
+#define TIM1_BASE_ADDR          (0x02000 + IMX_IO_PHYS)
+#define TIM2_BASE_ADDR          (0x03000 + IMX_IO_PHYS)
+#define RTC_BASE_ADDR           (0x04000 + IMX_IO_PHYS)
+#define LCDC_BASE_ADDR          (0x05000 + IMX_IO_PHYS)
+#define UART1_BASE_ADDR         (0x06000 + IMX_IO_PHYS)
+#define UART2_BASE_ADDR         (0x07000 + IMX_IO_PHYS)
+#define PWM_BASE_ADDR           (0x08000 + IMX_IO_PHYS)
+#define DMA_BASE_ADDR           (0x09000 + IMX_IO_PHYS)
+#define AIPI2_BASE_ADDR         (0x10000 + IMX_IO_PHYS)
+#define SIM_BASE_ADDR           (0x11000 + IMX_IO_PHYS)
+#define USBD_BASE_ADDR          (0x12000 + IMX_IO_PHYS)
+#define SPI1_BASE_ADDR          (0x13000 + IMX_IO_PHYS)
+#define MMC_BASE_ADDR           (0x14000 + IMX_IO_PHYS)
+#define ASP_BASE_ADDR           (0x15000 + IMX_IO_PHYS)
+#define BTA_BASE_ADDR           (0x16000 + IMX_IO_PHYS)
+#define I2C_BASE_ADDR           (0x17000 + IMX_IO_PHYS)
+#define SSI_BASE_ADDR           (0x18000 + IMX_IO_PHYS)
+#define SPI2_BASE_ADDR          (0x19000 + IMX_IO_PHYS)
+#define MSHC_BASE_ADDR          (0x1A000 + IMX_IO_PHYS)
+#define CCM_BASE_ADDR           (0x1B000 + IMX_IO_PHYS)
+#define SCM_BASE_ADDR           (0x1B804 + IMX_IO_PHYS)
+#define GPIO_BASE_ADDR          (0x1C000 + IMX_IO_PHYS)
+#define EIM_BASE_ADDR           (0x20000 + IMX_IO_PHYS)
+#define SDRAMC_BASE_ADDR        (0x21000 + IMX_IO_PHYS)
+#define MMA_BASE_ADDR           (0x22000 + IMX_IO_PHYS)
+#define AVIC_BASE_ADDR          (0x23000 + IMX_IO_PHYS)
+#define CSI_BASE_ADDR           (0x24000 + IMX_IO_PHYS)
+
+/* macro to get at IO space when running virtually */
+#define IO_ADDRESS(x)   ((x) - IMX_IO_PHYS + IMX_IO_BASE)
+
+/* define macros needed for entry-macro.S */
+#define AVIC_IO_ADDRESS(x)      IO_ADDRESS(x)
+
+/* fixed interrput numbers */
+#define INT_SOFTINT             0
+#define CSI_INT                 6
+#define DSPA_MAC_INT            7
+#define DSPA_INT                8
+#define COMP_INT                9
+#define MSHC_XINT               10
+#define GPIO_INT_PORTA          11
+#define GPIO_INT_PORTB          12
+#define GPIO_INT_PORTC          13
+#define LCDC_INT                14
+#define SIM_INT                 15
+#define SIM_DATA_INT            16
+#define RTC_INT                 17
+#define RTC_SAMINT              18
+#define UART2_MINT_PFERR        19
+#define UART2_MINT_RTS          20
+#define UART2_MINT_DTR          21
+#define UART2_MINT_UARTC        22
+#define UART2_MINT_TX           23
+#define UART2_MINT_RX           24
+#define UART1_MINT_PFERR        25
+#define UART1_MINT_RTS          26
+#define UART1_MINT_DTR          27
+#define UART1_MINT_UARTC        28
+#define UART1_MINT_TX           29
+#define UART1_MINT_RX           30
+#define VOICE_DAC_INT           31
+#define VOICE_ADC_INT           32
+#define PEN_DATA_INT            33
+#define PWM_INT                 34
+#define SDHC_INT                35
+#define I2C_INT                 39
+#define CSPI_INT                41
+#define SSI_TX_INT              42
+#define SSI_TX_ERR_INT          43
+#define SSI_RX_INT              44
+#define SSI_RX_ERR_INT          45
+#define TOUCH_INT               46
+#define USBD_INT0               47
+#define USBD_INT1               48
+#define USBD_INT2               49
+#define USBD_INT3               50
+#define USBD_INT4               51
+#define USBD_INT5               52
+#define USBD_INT6               53
+#define BTSYS_INT               55
+#define BTTIM_INT               56
+#define BTWUI_INT               57
+#define TIM2_INT                58
+#define TIM1_INT                59
+#define DMA_ERR                 60
+#define DMA_INT                 61
+#define GPIO_INT_PORTD          62
+#define WDT_INT                 63
+
+/* gpio and gpio based interrupt handling */
+#define GPIO_DR                 0x1C
+#define GPIO_GDIR               0x00
+#define GPIO_PSR                0x24
+#define GPIO_ICR1               0x28
+#define GPIO_ICR2               0x2C
+#define GPIO_IMR                0x30
+#define GPIO_ISR                0x34
+#define GPIO_INT_LOW_LEV        0x3
+#define GPIO_INT_HIGH_LEV       0x2
+#define GPIO_INT_RISE_EDGE      0x0
+#define GPIO_INT_FALL_EDGE      0x1
+#define GPIO_INT_NONE           0x4
+
+/* DMA */
+#define DMA_REQ_UART3_T         2
+#define DMA_REQ_UART3_R         3
+#define DMA_REQ_SSI2_T          4
+#define DMA_REQ_SSI2_R          5
+#define DMA_REQ_CSI_STAT        6
+#define DMA_REQ_CSI_R           7
+#define DMA_REQ_MSHC            8
+#define DMA_REQ_DSPA_DCT_DOUT   9
+#define DMA_REQ_DSPA_DCT_DIN    10
+#define DMA_REQ_DSPA_MAC        11
+#define DMA_REQ_EXT             12
+#define DMA_REQ_SDHC            13
+#define DMA_REQ_SPI1_R          14
+#define DMA_REQ_SPI1_T          15
+#define DMA_REQ_SSI_T           16
+#define DMA_REQ_SSI_R           17
+#define DMA_REQ_ASP_DAC         18
+#define DMA_REQ_ASP_ADC         19
+#define DMA_REQ_USP_EP(x)       (20 + (x))
+#define DMA_REQ_SPI2_R          26
+#define DMA_REQ_SPI2_T          27
+#define DMA_REQ_UART2_T         28
+#define DMA_REQ_UART2_R         29
+#define DMA_REQ_UART1_T         30
+#define DMA_REQ_UART1_R         31
+
+/* mandatory for CONFIG_LL_DEBUG */
+#define MXC_LL_UART_PADDR       UART1_BASE_ADDR
+#define MXC_LL_UART_VADDR       IO_ADDRESS(UART1_BASE_ADDR)
+
+#endif /*  __ASM_ARCH_MXC_MX1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index a86db64744a1..0313be720552 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -72,7 +72,8 @@
 /* for mx27*/
 #define OTG_BASE_ADDR           USBOTG_BASE_ADDR
 #define SAHARA_BASE_ADDR        (AIPI_BASE_ADDR + 0x25000)
-#define EMMA_BASE_ADDR          (AIPI_BASE_ADDR + 0x26400)
+#define EMMA_PP_BASE_ADDR       (AIPI_BASE_ADDR + 0x26000)
+#define EMMA_PRP_BASE_ADDR      (AIPI_BASE_ADDR + 0x26400)
 #define CCM_BASE_ADDR           (AIPI_BASE_ADDR + 0x27000)
 #define SYSCTRL_BASE_ADDR       (AIPI_BASE_ADDR + 0x27800)
 #define IIM_BASE_ADDR           (AIPI_BASE_ADDR + 0x28000)
@@ -288,16 +289,4 @@ extern int mx27_revision(void);
 /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */
 #define ARCH_NR_GPIOS           (192 + 16)
 
-/* OS clock tick rate */
-#define CLOCK_TICK_RATE         13300000
-
-/* Start of RAM */
-#define PHYS_OFFSET             SDRAM_BASE_ADDR
-
-/* max interrupt lines count */
-#define NR_IRQS                 256
-
-/* count of internal interrupt sources */
-#define MXC_MAX_INT_LINES       64
-
 #endif /* __ASM_ARCH_MXC_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 0536f8917bc0..de026654b00e 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -15,11 +15,6 @@
 #error "Do not include directly."
 #endif
 
-/*!
- * defines the hardware clock tick rate
- */
-#define CLOCK_TICK_RATE         16625000
-
 /*
  * MX31 memory map:
  *
@@ -244,9 +239,6 @@
 #define PCMCIA_IO_ADDRESS(x) \
         (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
 
-/* Start of physical RAM - On many MX31 platforms, this is the first SDRAM bank (CSD0) */
-#define PHYS_OFFSET             CSD0_BASE_ADDR
-
 /*
  * Interrupt numbers
  */
@@ -315,23 +307,6 @@
 #define MXC_INT_EXT_WDOG        62
 #define MXC_INT_EXT_TV          63
 
-#define MXC_MAX_INT_LINES       64
-
-#define MXC_GPIO_INT_BASE       MXC_MAX_INT_LINES
-#define MXC_MAX_GPIO_LINES      (GPIO_NUM_PIN * GPIO_PORT_NUM)
-#define MXC_MAX_VIRTUAL_INTS    16
-
-#define NR_IRQS (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES + MXC_MAX_VIRTUAL_INTS)
-
-/*!
- * Number of GPIO port as defined in the IC Spec
- */
-#define GPIO_PORT_NUM           3
-/*!
- * Number of GPIO pins per port
- */
-#define GPIO_NUM_PIN            32
-
 #define PROD_SIGNATURE          0x1     /* For MX31 */
 
 /* silicon revisions specific to i.MX31 */
diff --git a/arch/arm/plat-mxc/include/mach/mxc_timer.h b/arch/arm/plat-mxc/include/mach/mxc_timer.h
index 130aebfbe168..6c19a134744b 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_timer.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_timer.h
@@ -26,7 +26,7 @@
 #include <linux/clk.h>
 #include <mach/hardware.h>
 
-#ifdef CONFIG_ARCH_IMX
+#ifdef CONFIG_ARCH_MX1
 #define TIMER_BASE              IO_ADDRESS(TIM1_BASE_ADDR)
 #define TIMER_INTERRUPT         TIM1_INT
 
@@ -65,7 +65,7 @@ static void gpt_irq_acknowledge(void)
 {
         __raw_writel(0, TIMER_BASE + MXC_TSTAT);
 }
-#endif /* CONFIG_ARCH_IMX */
+#endif /* CONFIG_ARCH_MX1 */
 
 #ifdef CONFIG_ARCH_MX2
 #define TIMER_BASE              IO_ADDRESS(GPT1_BASE_ADDR)
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index 0b0af0253e91..07b4a73c9d2f 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -20,6 +20,12 @@
 #ifndef __ASM_ARCH_MXC_TIMEX_H__
 #define __ASM_ARCH_MXC_TIMEX_H__
 
-#include <mach/hardware.h>      /* for CLOCK_TICK_RATE */
+#if defined CONFIG_ARCH_MX1
+#define CLOCK_TICK_RATE         16000000
+#elif defined CONFIG_ARCH_MX2
+#define CLOCK_TICK_RATE         13300000
+#elif defined CONFIG_ARCH_MX3
+#define CLOCK_TICK_RATE         16625000
+#endif
 
 #endif                          /* __ASM_ARCH_MXC_TIMEX_H__ */
diff --git a/arch/arm/plat-mxc/iomux-mx1-mx2.c b/arch/arm/plat-mxc/iomux-mx1-mx2.c
index d97387aa9a42..df6f18395686 100644
--- a/arch/arm/plat-mxc/iomux-mx1-mx2.c
+++ b/arch/arm/plat-mxc/iomux-mx1-mx2.c
@@ -110,12 +110,13 @@ void mxc_gpio_mode(int gpio_mode)
 EXPORT_SYMBOL(mxc_gpio_mode);
 
 int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
-                                int alloc_mode, const char *label)
+                const char *label)
 {
         const int *p = pin_list;
         int i;
         unsigned gpio;
         unsigned mode;
+        int ret = -EINVAL;
 
         for (i = 0; i < count; i++) {
                 gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
@@ -124,33 +125,33 @@ int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
                 if (gpio >= (GPIO_PORT_MAX + 1) * 32)
                         goto setup_error;
 
-                if (alloc_mode & MXC_GPIO_ALLOC_MODE_RELEASE)
-                        gpio_free(gpio);
-                else if (!(alloc_mode & MXC_GPIO_ALLOC_MODE_NO_ALLOC))
-                        if (gpio_request(gpio, label)
-                           && !(alloc_mode & MXC_GPIO_ALLOC_MODE_TRY_ALLOC))
-                                goto setup_error;
+                ret = gpio_request(gpio, label);
+                if (ret)
+                        goto setup_error;
 
-                if (!(alloc_mode & (MXC_GPIO_ALLOC_MODE_ALLOC_ONLY |
-                                    MXC_GPIO_ALLOC_MODE_RELEASE)))
-                        mxc_gpio_mode(gpio | mode);
+                mxc_gpio_mode(gpio | mode);
 
                 p++;
         }
         return 0;
 
 setup_error:
-        if (alloc_mode & (MXC_GPIO_ALLOC_MODE_NO_ALLOC |
-            MXC_GPIO_ALLOC_MODE_TRY_ALLOC))
-                return -EINVAL;
+        mxc_gpio_release_multiple_pins(pin_list, i);
+        return ret;
+}
+EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
 
-        while (p != pin_list) {
-                p--;
-                gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
+void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
+{
+        const int *p = pin_list;
+        int i;
+
+        for (i = 0; i < count; i++) {
+                unsigned gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
                 gpio_free(gpio);
+                p++;
         }
 
-        return -EINVAL;
 }
-EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
+EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
 
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index d862c9e5f8db..6e7578a3514b 100644
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -17,9 +17,12 @@
  * MA  02110-1301, USA.
  */
 
+#include <linux/module.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <mach/common.h>
+#include <asm/mach/irq.h>
+#include <mach/hardware.h>
 
 #define AVIC_BASE               IO_ADDRESS(AVIC_BASE_ADDR)
 #define AVIC_INTCNTL            (AVIC_BASE + 0x00)      /* int control reg */
@@ -65,6 +68,28 @@ void imx_irq_set_priority(unsigned char irq, unsigned char prio)
 EXPORT_SYMBOL(imx_irq_set_priority);
 #endif
 
+#ifdef CONFIG_FIQ
+int mxc_set_irq_fiq(unsigned int irq, unsigned int type)
+{
+        unsigned int irqt;
+
+        if (irq >= MXC_INTERNAL_IRQS)
+                return -EINVAL;
+
+        if (irq < MXC_INTERNAL_IRQS / 2) {
+                irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq);
+                __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL);
+        } else {
+                irq -= MXC_INTERNAL_IRQS / 2;
+                irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq);
+                __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH);
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL(mxc_set_irq_fiq);
+#endif /* CONFIG_FIQ */
+
 /* Disable interrupt number "irq" in the AVIC */
 static void mxc_mask_irq(unsigned int irq)
 {
@@ -91,7 +116,6 @@ static struct irq_chip mxc_avic_chip = {
 void __init mxc_init_irq(void)
 {
         int i;
-        u32 reg;
 
         /* put the AVIC into the reset value with
          * all interrupts disabled
@@ -106,7 +130,7 @@ void __init mxc_init_irq(void)
         /* all IRQ no FIQ */
         __raw_writel(0, AVIC_INTTYPEH);
         __raw_writel(0, AVIC_INTTYPEL);
-        for (i = 0; i < MXC_MAX_INT_LINES; i++) {
+        for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
                 set_irq_chip(i, &mxc_avic_chip);
                 set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID);
@@ -119,5 +143,10 @@ void __init mxc_init_irq(void)
         /* init architectures chained interrupt handler */
         mxc_register_gpios();
 
+#ifdef CONFIG_FIQ
+        /* Initialize FIQ */
+        init_FIQ();
+#endif
+
         printk(KERN_INFO "MXC IRQ initialized\n");
 }
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index fd28f5194f71..758a1293bcfa 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -190,7 +190,7 @@ static int __init mxc_clockevent_init(void)
         clockevent_mxc.min_delta_ns =
                         clockevent_delta2ns(0xff, &clockevent_mxc);
 
-        clockevent_mxc.cpumask = cpumask_of_cpu(0);
+        clockevent_mxc.cpumask = cpumask_of(0);
 
         clockevents_register_device(&clockevent_mxc);
 
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index a94f0c44ebc8..46d3b0b9ce69 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -14,9 +14,11 @@ config ARCH_OMAP1
 
 config ARCH_OMAP2
         bool "TI OMAP2"
+        select CPU_V6
 
 config ARCH_OMAP3
         bool "TI OMAP3"
+        select CPU_V7
 
 endchoice
 
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index e31154b15d9e..f6684832ca8f 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -69,15 +69,15 @@ int __init debug_card_init(u32 addr, unsigned gpio)
         smc91x_resources[0].start = addr + 0x300;
         smc91x_resources[0].end   = addr + 0x30f;
 
-        smc91x_resources[1].start = OMAP_GPIO_IRQ(gpio);
-        smc91x_resources[1].end   = OMAP_GPIO_IRQ(gpio);
+        smc91x_resources[1].start = gpio_to_irq(gpio);
+        smc91x_resources[1].end   = gpio_to_irq(gpio);
 
-        status = omap_request_gpio(gpio);
+        status = gpio_request(gpio, "SMC91x irq");
         if (status < 0) {
                 printk(KERN_ERR "GPIO%d unavailable for smc91x IRQ\n", gpio);
                 return status;
         }
-        omap_set_gpio_direction(gpio, 1);
+        gpio_direction_input(gpio);
 
         led_resources[0].start = addr;
         led_resources[0].end   = addr + SZ_4K - 1;
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index 2f4c0cabfd34..be4eefda4767 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -83,8 +83,8 @@ static void h2p2_dbg_leds_event(led_event_t evt)
                 /* all leds off during suspend or shutdown */
 
                 if (!(machine_is_omap_perseus2() || machine_is_omap_h4())) {
-                        omap_set_gpio_dataout(GPIO_TIMER, 0);
-                        omap_set_gpio_dataout(GPIO_IDLE, 0);
+                        gpio_set_value(GPIO_TIMER, 0);
+                        gpio_set_value(GPIO_IDLE, 0);
                 }
 
                 __raw_writew(~0, &fpga->leds);
@@ -107,7 +107,7 @@ static void h2p2_dbg_leds_event(led_event_t evt)
                 if (machine_is_omap_perseus2() || machine_is_omap_h4())
                         hw_led_state ^= H2P2_DBG_FPGA_P2_LED_TIMER;
                 else {
-                        omap_set_gpio_dataout(GPIO_TIMER,
+                        gpio_set_value(GPIO_TIMER,
                                         led_state & LED_TIMER_ON);
                         goto done;
                 }
@@ -121,7 +121,7 @@ static void h2p2_dbg_leds_event(led_event_t evt)
                 if (machine_is_omap_perseus2() || machine_is_omap_h4())
                         hw_led_state &= ~H2P2_DBG_FPGA_P2_LED_IDLE;
                 else {
-                        omap_set_gpio_dataout(GPIO_IDLE, 1);
+                        gpio_set_value(GPIO_IDLE, 1);
                         goto done;
                 }
 
@@ -131,7 +131,7 @@ static void h2p2_dbg_leds_event(led_event_t evt)
                 if (machine_is_omap_perseus2() || machine_is_omap_h4())
                         hw_led_state |= H2P2_DBG_FPGA_P2_LED_IDLE;
                 else {
-                        omap_set_gpio_dataout(GPIO_IDLE, 0);
+                        gpio_set_value(GPIO_IDLE, 0);
                         goto done;
                 }
 
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 0cb2b22388e9..ac15c23fd5da 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -192,202 +192,48 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
 
 /*-------------------------------------------------------------------------*/
 
-#if     defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
-#define OMAP_MMC1_BASE          0x4809c000
-#define OMAP_MMC1_END           (OMAP_MMC1_BASE + 0x1fc)
-#define OMAP_MMC1_INT           INT_24XX_MMC_IRQ
+#define OMAP_MMC_NR_RES         2
 
-#define OMAP_MMC2_BASE          0x480b4000
-#define OMAP_MMC2_END           (OMAP_MMC2_BASE + 0x1fc)
-#define OMAP_MMC2_INT           INT_24XX_MMC2_IRQ
-
-#else
-
-#define OMAP_MMC1_BASE          0xfffb7800
-#define OMAP_MMC1_END           (OMAP_MMC1_BASE + 0x7f)
-#define OMAP_MMC1_INT           INT_MMC
-
-#define OMAP_MMC2_BASE          0xfffb7c00      /* omap16xx only */
-#define OMAP_MMC2_END           (OMAP_MMC2_BASE + 0x7f)
-#define OMAP_MMC2_INT           INT_1610_MMC2
-
-#endif
-
-static struct omap_mmc_platform_data mmc1_data;
-
-static u64 mmc1_dmamask = 0xffffffff;
-
-static struct resource mmc1_resources[] = {
-        {
-                .start          = OMAP_MMC1_BASE,
-                .end            = OMAP_MMC1_END,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = OMAP_MMC1_INT,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device mmc_omap_device1 = {
-        .name           = "mmci-omap",
-        .id             = 1,
-        .dev = {
-                .dma_mask       = &mmc1_dmamask,
-                .platform_data  = &mmc1_data,
-        },
-        .num_resources  = ARRAY_SIZE(mmc1_resources),
-        .resource       = mmc1_resources,
-};
-
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
-        defined(CONFIG_ARCH_OMAP34XX)
-
-static struct omap_mmc_platform_data mmc2_data;
-
-static u64 mmc2_dmamask = 0xffffffff;
-
-static struct resource mmc2_resources[] = {
-        {
-                .start          = OMAP_MMC2_BASE,
-                .end            = OMAP_MMC2_END,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = OMAP_MMC2_INT,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device mmc_omap_device2 = {
-        .name           = "mmci-omap",
-        .id             = 2,
-        .dev = {
-                .dma_mask       = &mmc2_dmamask,
-                .platform_data  = &mmc2_data,
-        },
-        .num_resources  = ARRAY_SIZE(mmc2_resources),
-        .resource       = mmc2_resources,
-};
-#endif
-
-static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf)
-{
-        if (cpu_is_omap2430() || cpu_is_omap34xx())
-                return;
-
-        if (mmc_conf->mmc[0].enabled) {
-                if (cpu_is_omap24xx()) {
-                        omap_cfg_reg(H18_24XX_MMC_CMD);
-                        omap_cfg_reg(H15_24XX_MMC_CLKI);
-                        omap_cfg_reg(G19_24XX_MMC_CLKO);
-                        omap_cfg_reg(F20_24XX_MMC_DAT0);
-                        omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
-                        omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
-                } else {
-                        omap_cfg_reg(MMC_CMD);
-                        omap_cfg_reg(MMC_CLK);
-                        omap_cfg_reg(MMC_DAT0);
-                        if (cpu_is_omap1710()) {
-                                omap_cfg_reg(M15_1710_MMC_CLKI);
-                                omap_cfg_reg(P19_1710_MMC_CMDDIR);
-                                omap_cfg_reg(P20_1710_MMC_DATDIR0);
-                        }
-                }
-                if (mmc_conf->mmc[0].wire4) {
-                        if (cpu_is_omap24xx()) {
-                                omap_cfg_reg(H14_24XX_MMC_DAT1);
-                                omap_cfg_reg(E19_24XX_MMC_DAT2);
-                                omap_cfg_reg(D19_24XX_MMC_DAT3);
-                                omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
-                                omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
-                                omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
-                        } else {
-                                omap_cfg_reg(MMC_DAT1);
-                                /* NOTE:  DAT2 can be on W10 (here) or M15 */
-                                if (!mmc_conf->mmc[0].nomux)
-                                        omap_cfg_reg(MMC_DAT2);
-                                omap_cfg_reg(MMC_DAT3);
-                        }
-                }
-        }
-
-#ifdef  CONFIG_ARCH_OMAP16XX
-        /* block 2 is on newer chips, and has many pinout options */
-        if (mmc_conf->mmc[1].enabled) {
-                if (!mmc_conf->mmc[1].nomux) {
-                        omap_cfg_reg(Y8_1610_MMC2_CMD);
-                        omap_cfg_reg(Y10_1610_MMC2_CLK);
-                        omap_cfg_reg(R18_1610_MMC2_CLKIN);
-                        omap_cfg_reg(W8_1610_MMC2_DAT0);
-                        if (mmc_conf->mmc[1].wire4) {
-                                omap_cfg_reg(V8_1610_MMC2_DAT1);
-                                omap_cfg_reg(W15_1610_MMC2_DAT2);
-                                omap_cfg_reg(R10_1610_MMC2_DAT3);
-                        }
-
-                        /* These are needed for the level shifter */
-                        omap_cfg_reg(V9_1610_MMC2_CMDDIR);
-                        omap_cfg_reg(V5_1610_MMC2_DATDIR0);
-                        omap_cfg_reg(W19_1610_MMC2_DATDIR1);
-                }
-
-                /* Feedback clock must be set on OMAP-1710 MMC2 */
-                if (cpu_is_omap1710())
-                        omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
-                                     MOD_CONF_CTRL_1);
-        }
-#endif
-}
-
-static void __init omap_init_mmc(void)
+/*
+ * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
+ */
+int __init omap_mmc_add(int id, unsigned long base, unsigned long size,
+                unsigned int irq, struct omap_mmc_platform_data *data)
 {
-        const struct omap_mmc_config    *mmc_conf;
-
-        /* NOTE:  assumes MMC was never (wrongly) enabled */
-        mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
-        if (!mmc_conf)
-                return;
-
-        omap_init_mmc_conf(mmc_conf);
-
-        if (mmc_conf->mmc[0].enabled) {
-                mmc1_data.conf = mmc_conf->mmc[0];
-                (void) platform_device_register(&mmc_omap_device1);
-        }
-
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
-        defined(CONFIG_ARCH_OMAP34XX)
-        if (mmc_conf->mmc[1].enabled) {
-                mmc2_data.conf = mmc_conf->mmc[1];
-                (void) platform_device_register(&mmc_omap_device2);
-        }
-#endif
-}
+        struct platform_device *pdev;
+        struct resource res[OMAP_MMC_NR_RES];
+        int ret;
+
+        pdev = platform_device_alloc("mmci-omap", id);
+        if (!pdev)
+                return -ENOMEM;
+
+        memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
+        res[0].start = base;
+        res[0].end = base + size - 1;
+        res[0].flags = IORESOURCE_MEM;
+        res[1].start = res[1].end = irq;
+        res[1].flags = IORESOURCE_IRQ;
+
+        ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
+        if (ret == 0)
+                ret = platform_device_add_data(pdev, data, sizeof(*data));
+        if (ret)
+                goto fail;
+
+        ret = platform_device_add(pdev);
+        if (ret)
+                goto fail;
+        return 0;
 
-void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info)
-{
-        switch (host) {
-        case 1:
-                mmc1_data = *info;
-                break;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
-        defined(CONFIG_ARCH_OMAP34XX)
-        case 2:
-                mmc2_data = *info;
-                break;
-#endif
-        default:
-                BUG();
-        }
+fail:
+        platform_device_put(pdev);
+        return ret;
 }
 
-#else
-static inline void omap_init_mmc(void) {}
-void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {}
 #endif
 
 /*-------------------------------------------------------------------------*/
@@ -532,7 +378,6 @@ static int __init omap_init_devices(void)
          */
         omap_init_dsp();
         omap_init_kp();
-        omap_init_mmc();
         omap_init_uwire();
         omap_init_wdt();
         omap_init_rng();
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 50f8b4ad9a09..692d2b495af3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -29,7 +29,7 @@
 
 #include <asm/system.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 #include <mach/tc.h>
 
@@ -1848,9 +1848,22 @@ static int omap2_dma_handle_ch(int ch)
                 printk(KERN_INFO
                        "DMA synchronization event drop occurred with device "
                        "%d\n", dma_chan[ch].dev_id);
-        if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ))
+        if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ)) {
                 printk(KERN_INFO "DMA transaction error with device %d\n",
                        dma_chan[ch].dev_id);
+                if (cpu_class_is_omap2()) {
+                        /* Errata: sDMA Channel is not disabled
+                         * after a transaction error. So we explicitely
+                         * disable the channel
+                         */
+                        u32 ccr;
+
+                        ccr = dma_read(CCR(ch));
+                        ccr &= ~OMAP_DMA_CCR_EN;
+                        dma_write(ccr, CCR(ch));
+                        dma_chan[ch].flags &= ~OMAP_DMA_ACTIVE;
+                }
+        }
         if (unlikely(status & OMAP2_DMA_SECURE_ERR_IRQ))
                 printk(KERN_INFO "DMA secure error with device %d\n",
                        dma_chan[ch].dev_id);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 963c31cd1541..e4f0ce04ba92 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -539,10 +539,6 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 
-        /* REVISIT: hw feature, ttgr overtaking tldr? */
-        while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)))
-                cpu_relax();
-
         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
 }
 
@@ -553,14 +549,15 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
         u32 l;
 
         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
-        if (autoreload)
+        if (autoreload) {
                 l |= OMAP_TIMER_CTRL_AR;
-        else
+                omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
+        } else {
                 l &= ~OMAP_TIMER_CTRL_AR;
+        }
         l |= OMAP_TIMER_CTRL_ST;
 
         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 }
 
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 424049d83fbe..07b6968a7d16 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -152,6 +152,7 @@ struct gpio_bank {
         u32 level_mask;
         spinlock_t lock;
         struct gpio_chip chip;
+        struct clk *dbck;
 };
 
 #define METHOD_MPUIO            0
@@ -244,6 +245,8 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
                 return &gpio_bank[gpio >> 5];
         if (cpu_is_omap34xx())
                 return &gpio_bank[gpio >> 5];
+        BUG();
+        return NULL;
 }
 
 static inline int get_gpio_index(int gpio)
@@ -332,19 +335,6 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
         __raw_writel(l, reg);
 }
 
-void omap_set_gpio_direction(int gpio, int is_input)
-{
-        struct gpio_bank *bank;
-        unsigned long flags;
-
-        if (check_gpio(gpio) < 0)
-                return;
-        bank = get_gpio_bank(gpio);
-        spin_lock_irqsave(&bank->lock, flags);
-        _set_gpio_direction(bank, get_gpio_index(gpio), is_input);
-        spin_unlock_irqrestore(&bank->lock, flags);
-}
-
 static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
 {
         void __iomem *reg = bank->base;
@@ -406,20 +396,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
         __raw_writel(l, reg);
 }
 
-void omap_set_gpio_dataout(int gpio, int enable)
-{
-        struct gpio_bank *bank;
-        unsigned long flags;
-
-        if (check_gpio(gpio) < 0)
-                return;
-        bank = get_gpio_bank(gpio);
-        spin_lock_irqsave(&bank->lock, flags);
-        _set_gpio_dataout(bank, get_gpio_index(gpio), enable);
-        spin_unlock_irqrestore(&bank->lock, flags);
-}
-
-int omap_get_gpio_datain(int gpio)
+static int __omap_get_gpio_datain(int gpio)
 {
         struct gpio_bank *bank;
         void __iomem *reg;
@@ -473,6 +450,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
 {
         struct gpio_bank *bank;
         void __iomem *reg;
+        unsigned long flags;
         u32 val, l = 1 << get_gpio_index(gpio);
 
         if (cpu_class_is_omap1())
@@ -480,16 +458,28 @@ void omap_set_gpio_debounce(int gpio, int enable)
 
         bank = get_gpio_bank(gpio);
         reg = bank->base;
-
         reg += OMAP24XX_GPIO_DEBOUNCE_EN;
+
+        spin_lock_irqsave(&bank->lock, flags);
         val = __raw_readl(reg);
 
-        if (enable)
+        if (enable && !(val & l))
                 val |= l;
-        else
+        else if (!enable && (val & l))
                 val &= ~l;
+        else
+                goto done;
+
+        if (cpu_is_omap34xx()) {
+                if (enable)
+                        clk_enable(bank->dbck);
+                else
+                        clk_disable(bank->dbck);
+        }
 
         __raw_writel(val, reg);
+done:
+        spin_unlock_irqrestore(&bank->lock, flags);
 }
 EXPORT_SYMBOL(omap_set_gpio_debounce);
 
@@ -906,26 +896,17 @@ static int gpio_wake_enable(unsigned int irq, unsigned int enable)
         return retval;
 }
 
-int omap_request_gpio(int gpio)
+static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
 {
-        struct gpio_bank *bank;
+        struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
         unsigned long flags;
-        int status;
-
-        if (check_gpio(gpio) < 0)
-                return -EINVAL;
 
-        status = gpio_request(gpio, NULL);
-        if (status < 0)
-                return status;
-
-        bank = get_gpio_bank(gpio);
         spin_lock_irqsave(&bank->lock, flags);
 
         /* Set trigger to none. You need to enable the desired trigger with
          * request_irq() or set_irq_type().
          */
-        _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
+        _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
 
 #ifdef CONFIG_ARCH_OMAP15XX
         if (bank->method == METHOD_GPIO_1510) {
@@ -933,7 +914,7 @@ int omap_request_gpio(int gpio)
 
                 /* Claim the pin for MPU */
                 reg = bank->base + OMAP1510_GPIO_PIN_CONTROL;
-                __raw_writel(__raw_readl(reg) | (1 << get_gpio_index(gpio)), reg);
+                __raw_writel(__raw_readl(reg) | (1 << offset), reg);
         }
 #endif
         spin_unlock_irqrestore(&bank->lock, flags);
@@ -941,39 +922,28 @@ int omap_request_gpio(int gpio)
         return 0;
 }
 
-void omap_free_gpio(int gpio)
+static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
 {
-        struct gpio_bank *bank;
+        struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
         unsigned long flags;
 
-        if (check_gpio(gpio) < 0)
-                return;
-        bank = get_gpio_bank(gpio);
         spin_lock_irqsave(&bank->lock, flags);
-        if (unlikely(!gpiochip_is_requested(&bank->chip,
-                                get_gpio_index(gpio)))) {
-                spin_unlock_irqrestore(&bank->lock, flags);
-                printk(KERN_ERR "omap-gpio: GPIO %d wasn't reserved!\n", gpio);
-                dump_stack();
-                return;
-        }
 #ifdef CONFIG_ARCH_OMAP16XX
         if (bank->method == METHOD_GPIO_1610) {
                 /* Disable wake-up during idle for dynamic tick */
                 void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
-                __raw_writel(1 << get_gpio_index(gpio), reg);
+                __raw_writel(1 << offset, reg);
         }
 #endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         if (bank->method == METHOD_GPIO_24XX) {
                 /* Disable wake-up during idle for dynamic tick */
                 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
-                __raw_writel(1 << get_gpio_index(gpio), reg);
+                __raw_writel(1 << offset, reg);
         }
 #endif
-        _reset_gpio(bank, gpio);
+        _reset_gpio(bank, bank->chip.base + offset);
         spin_unlock_irqrestore(&bank->lock, flags);
-        gpio_free(gpio);
 }
 
 /*
@@ -1252,7 +1222,7 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset)
 
 static int gpio_get(struct gpio_chip *chip, unsigned offset)
 {
-        return omap_get_gpio_datain(chip->base + offset);
+        return __omap_get_gpio_datain(chip->base + offset);
 }
 
 static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
@@ -1279,6 +1249,14 @@ static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
         spin_unlock_irqrestore(&bank->lock, flags);
 }
 
+static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
+{
+        struct gpio_bank *bank;
+
+        bank = container_of(chip, struct gpio_bank, chip);
+        return bank->virtual_irq_start + offset;
+}
+
 /*---------------------------------------------------------------------*/
 
 static int initialized;
@@ -1296,7 +1274,6 @@ static struct clk * gpio5_fck;
 #endif
 
 #if defined(CONFIG_ARCH_OMAP3)
-static struct clk *gpio_fclks[OMAP34XX_NR_GPIOS];
 static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
 #endif
 
@@ -1310,9 +1287,7 @@ static int __init _omap_gpio_init(void)
         int i;
         int gpio = 0;
         struct gpio_bank *bank;
-#if defined(CONFIG_ARCH_OMAP3)
         char clk_name[11];
-#endif
 
         initialized = 1;
 
@@ -1367,12 +1342,6 @@ static int __init _omap_gpio_init(void)
                                 printk(KERN_ERR "Could not get %s\n", clk_name);
                         else
                                 clk_enable(gpio_iclks[i]);
-                        sprintf(clk_name, "gpio%d_fck", i + 1);
-                        gpio_fclks[i] = clk_get(NULL, clk_name);
-                        if (IS_ERR(gpio_fclks[i]))
-                                printk(KERN_ERR "Could not get %s\n", clk_name);
-                        else
-                                clk_enable(gpio_fclks[i]);
                 }
         }
 #endif
@@ -1479,10 +1448,13 @@ static int __init _omap_gpio_init(void)
                 /* REVISIT eventually switch from OMAP-specific gpio structs
                  * over to the generic ones
                  */
+                bank->chip.request = omap_gpio_request;
+                bank->chip.free = omap_gpio_free;
                 bank->chip.direction_input = gpio_input;
                 bank->chip.get = gpio_get;
                 bank->chip.direction_output = gpio_output;
                 bank->chip.set = gpio_set;
+                bank->chip.to_irq = gpio_2irq;
                 if (bank_is_mpuio(bank)) {
                         bank->chip.label = "mpuio";
 #ifdef CONFIG_ARCH_OMAP16XX
@@ -1511,6 +1483,13 @@ static int __init _omap_gpio_init(void)
                 }
                 set_irq_chained_handler(bank->irq, gpio_irq_handler);
                 set_irq_data(bank->irq, bank);
+
+                if (cpu_is_omap34xx()) {
+                        sprintf(clk_name, "gpio%d_dbck", i + 1);
+                        bank->dbck = clk_get(NULL, clk_name);
+                        if (IS_ERR(bank->dbck))
+                                printk(KERN_ERR "Could not get %s\n", clk_name);
+                }
         }
 
         /* Enable system clock for GPIO module.
@@ -1739,12 +1718,6 @@ static int __init omap_gpio_sysinit(void)
         return ret;
 }
 
-EXPORT_SYMBOL(omap_request_gpio);
-EXPORT_SYMBOL(omap_free_gpio);
-EXPORT_SYMBOL(omap_set_gpio_direction);
-EXPORT_SYMBOL(omap_set_gpio_dataout);
-EXPORT_SYMBOL(omap_get_gpio_datain);
-
 arch_initcall(omap_gpio_sysinit);
 
 
@@ -1801,14 +1774,14 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
                                 continue;
 
                         irq = bank->virtual_irq_start + j;
-                        value = omap_get_gpio_datain(gpio);
+                        value = gpio_get_value(gpio);
                         is_in = gpio_is_input(bank, mask);
 
                         if (bank_is_mpuio(bank))
                                 seq_printf(s, "MPUIO %2d ", j);
                         else
                                 seq_printf(s, "GPIO %3d ", gpio);
-                        seq_printf(s, "(%10s): %s %s",
+                        seq_printf(s, "(%-20.20s): %s %s",
                                         label,
                                         is_in ? "in " : "out",
                                         value ? "hi"  : "lo");
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 0e6d147ab6f8..89a6ab0b7db8 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -79,26 +79,43 @@ static struct platform_device omap_i2c_devices[] = {
 #endif
 };
 
-static void __init omap_i2c_mux_pins(int bus_id)
+#if defined(CONFIG_ARCH_OMAP24XX)
+static const int omap24xx_pins[][2] = {
+        { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA },
+        { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA },
+};
+#else
+static const int omap24xx_pins[][2] = {};
+#endif
+#if defined(CONFIG_ARCH_OMAP34XX)
+static const int omap34xx_pins[][2] = {
+        { K21_34XX_I2C1_SCL, J21_34XX_I2C1_SDA},
+        { AF15_34XX_I2C2_SCL, AE15_34XX_I2C2_SDA},
+        { AF14_34XX_I2C3_SCL, AG14_34XX_I2C3_SDA},
+};
+#else
+static const int omap34xx_pins[][2] = {};
+#endif
+
+static void __init omap_i2c_mux_pins(int bus)
 {
-        /* TODO: Muxing for OMAP3 */
-        switch (bus_id) {
-        case 1:
-                if (cpu_class_is_omap1()) {
-                        omap_cfg_reg(I2C_SCL);
-                        omap_cfg_reg(I2C_SDA);
-                } else if (cpu_is_omap24xx()) {
-                        omap_cfg_reg(M19_24XX_I2C1_SCL);
-                        omap_cfg_reg(L15_24XX_I2C1_SDA);
-                }
-                break;
-        case 2:
-                if (cpu_is_omap24xx()) {
-                        omap_cfg_reg(J15_24XX_I2C2_SCL);
-                        omap_cfg_reg(H19_24XX_I2C2_SDA);
-                }
-                break;
+        int scl, sda;
+
+        if (cpu_class_is_omap1()) {
+                scl = I2C_SCL;
+                sda = I2C_SDA;
+        } else if (cpu_is_omap24xx()) {
+                scl = omap24xx_pins[bus][0];
+                sda = omap24xx_pins[bus][1];
+        } else if (cpu_is_omap34xx()) {
+                scl = omap34xx_pins[bus][0];
+                sda = omap34xx_pins[bus][1];
+        } else {
+                return;
         }
+
+        omap_cfg_reg(sda);
+        omap_cfg_reg(scl);
 }
 
 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
@@ -142,6 +159,6 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
                 res[1].start = irq;
         }
 
-        omap_i2c_mux_pins(bus_id);
+        omap_i2c_mux_pins(bus_id - 1);
         return platform_device_register(pdev);
 }
diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h
index 731c858cf3fe..61bd5e8f09b1 100644
--- a/arch/arm/plat-omap/include/mach/board-apollon.h
+++ b/arch/arm/plat-omap/include/mach/board-apollon.h
@@ -29,12 +29,14 @@
 #ifndef __ASM_ARCH_OMAP_APOLLON_H
 #define __ASM_ARCH_OMAP_APOLLON_H
 
+#include <mach/cpu.h>
+
 extern void apollon_mmc_init(void);
 
 static inline int apollon_plus(void)
 {
         /* The apollon plus has IDCODE revision 5 */
-        return system_rev & 0xc0;
+        return omap_rev() & 0xc0;
 }
 
 /* Placeholder for APOLLON specific defines */
diff --git a/arch/arm/plat-omap/include/mach/board-h2.h b/arch/arm/plat-omap/include/mach/board-h2.h
index 2a050e9be65f..15531c8dc0e6 100644
--- a/arch/arm/plat-omap/include/mach/board-h2.h
+++ b/arch/arm/plat-omap/include/mach/board-h2.h
@@ -29,13 +29,13 @@
 #ifndef __ASM_ARCH_OMAP_H2_H
 #define __ASM_ARCH_OMAP_H2_H
 
-/* Placeholder for H2 specific defines */
-
 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
 #define OMAP1610_ETHR_START             0x04000300
 
+#define H2_TPS_GPIO_BASE                (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
+#       define H2_TPS_GPIO_MMC_PWR_EN   (H2_TPS_GPIO_BASE + 3)
+
 extern void h2_mmc_init(void);
-extern void h2_mmc_slot_cover_handler(void *arg, int state);
 
 #endif /*  __ASM_ARCH_OMAP_H2_H */
 
diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h
index 66e2746c04ca..f23399665212 100644
--- a/arch/arm/plat-omap/include/mach/board-ldp.h
+++ b/arch/arm/plat-omap/include/mach/board-ldp.h
@@ -32,5 +32,8 @@
 extern void twl4030_bci_battery_init(void);
 
 #define TWL4030_IRQNUM          INT_34XX_SYS_NIRQ
-
+#define LDP_SMC911X_CS         1
+#define LDP_SMC911X_GPIO       152
+#define DEBUG_BASE             0x08000000
+#define OMAP34XX_ETHR_START    DEBUG_BASE
 #endif /* __ASM_ARCH_OMAP_LDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index c23c12ccb353..9466772fc7c8 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -16,7 +16,6 @@
 
 /* Different peripheral ids */
 #define OMAP_TAG_CLOCK          0x4f01
-#define OMAP_TAG_MMC            0x4f02
 #define OMAP_TAG_SERIAL_CONSOLE 0x4f03
 #define OMAP_TAG_USB            0x4f04
 #define OMAP_TAG_LCD            0x4f05
@@ -35,27 +34,6 @@ struct omap_clock_config {
         u8 system_clock_type;
 };
 
-struct omap_mmc_conf {
-        unsigned enabled:1;
-        /* nomux means "standard" muxing is wrong on this board, and that
-         * board-specific code handled it before common init logic.
-         */
-        unsigned nomux:1;
-        /* switch pin can be for card detect (default) or card cover */
-        unsigned cover:1;
-        /* 4 wire signaling is optional, and is only used for SD/SDIO */
-        unsigned wire4:1;
-        /* use the internal clock */
-        unsigned internal_clock:1;
-        s16 power_pin;
-        s16 switch_pin;
-        s16 wp_pin;
-};
-
-struct omap_mmc_config {
-        struct omap_mmc_conf mmc[2];
-};
-
 struct omap_serial_console_config {
         u8 console_uart;
         u32 console_speed;
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index dc9886760577..269147f3836f 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -74,6 +74,7 @@
 #define OMAP243X_CONTROL_IVA2_BOOTADDR  (OMAP2_CONTROL_GENERAL + 0x0190)
 #define OMAP243X_CONTROL_IVA2_BOOTMOD   (OMAP2_CONTROL_GENERAL + 0x0194)
 #define OMAP243X_CONTROL_IVA2_GEMCFG    (OMAP2_CONTROL_GENERAL + 0x0198)
+#define OMAP243X_CONTROL_PBIAS_LITE     (OMAP2_CONTROL_GENERAL + 0x0230)
 
 /* 24xx-only CONTROL_GENERAL register offsets */
 #define OMAP24XX_CONTROL_DEBOBS         (OMAP2_CONTROL_GENERAL + 0x0000)
@@ -140,6 +141,7 @@
 #define OMAP343X_CONTROL_TEST_KEY_13    (OMAP2_CONTROL_GENERAL + 0x00fc)
 #define OMAP343X_CONTROL_IVA2_BOOTADDR  (OMAP2_CONTROL_GENERAL + 0x0190)
 #define OMAP343X_CONTROL_IVA2_BOOTMOD   (OMAP2_CONTROL_GENERAL + 0x0194)
+#define OMAP343X_CONTROL_PBIAS_LITE     (OMAP2_CONTROL_GENERAL + 0x02b0)
 #define OMAP343X_CONTROL_TEMP_SENSOR    (OMAP2_CONTROL_GENERAL + 0x02b4)
 
 /*
@@ -154,11 +156,14 @@
  * and the security mode (secure, non-secure, don't care)
  */
 /* CONTROL_DEVCONF0 bits */
+#define OMAP2_MMCSDIO1ADPCLKISEL        (1 << 24) /* MMC1 loop back clock */
 #define OMAP24XX_USBSTANDBYCTRL         (1 << 15)
 #define OMAP2_MCBSP2_CLKS_MASK          (1 << 6)
 #define OMAP2_MCBSP1_CLKS_MASK          (1 << 2)
 
 /* CONTROL_DEVCONF1 bits */
+#define OMAP243X_MMC1_ACTIVE_OVERWRITE  (1 << 31)
+#define OMAP2_MMCSDIO2ADPCLKISEL        (1 << 6) /* MMC2 loop back clock */
 #define OMAP2_MCBSP5_CLKS_MASK          (1 << 4) /* > 242x */
 #define OMAP2_MCBSP4_CLKS_MASK          (1 << 2) /* > 242x */
 #define OMAP2_MCBSP3_CLKS_MASK          (1 << 0) /* > 242x */
@@ -172,6 +177,18 @@
 #define OMAP2_SYSBOOT_1_MASK            (1 << 1)
 #define OMAP2_SYSBOOT_0_MASK            (1 << 0)
 
+/* CONTROL_PBIAS_LITE bits */
+#define OMAP343X_PBIASLITESUPPLY_HIGH1  (1 << 15)
+#define OMAP343X_PBIASLITEVMODEERROR1   (1 << 11)
+#define OMAP343X_PBIASSPEEDCTRL1        (1 << 10)
+#define OMAP343X_PBIASLITEPWRDNZ1       (1 << 9)
+#define OMAP343X_PBIASLITEVMODE1        (1 << 8)
+#define OMAP343X_PBIASLITESUPPLY_HIGH0  (1 << 7)
+#define OMAP343X_PBIASLITEVMODEERROR0   (1 << 3)
+#define OMAP2_PBIASSPEEDCTRL0           (1 << 2)
+#define OMAP2_PBIASLITEPWRDNZ0          (1 << 1)
+#define OMAP2_PBIASLITEVMODE0           (1 << 0)
+
 #ifndef __ASSEMBLY__
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 extern void __iomem *omap_ctrl_base_get(void);
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index e0464187209d..b2062f1175de 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -28,13 +28,18 @@
 
 struct omap_chip_id {
         u8 oc;
+        u8 type;
 };
 
 #define OMAP_CHIP_INIT(x)       { .oc = x }
 
-extern unsigned int system_rev;
-
-#define omap2_cpu_rev()         ((system_rev >> 12) & 0x0f)
+/*
+ * omap_rev bits:
+ * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
+ * CPU revision (See _REV_ defined in cpu.h)    [15:08]
+ * CPU class bits (15xx, 16xx, 24xx, 34xx...)   [07:00]
+ */
+unsigned int omap_rev(void);
 
 /*
  * Test if multicore OMAP support is needed
@@ -108,7 +113,7 @@ extern unsigned int system_rev;
  * cpu_is_omap243x():   True for OMAP2430
  * cpu_is_omap343x():   True for OMAP3430
  */
-#define GET_OMAP_CLASS  ((system_rev >> 24) & 0xff)
+#define GET_OMAP_CLASS  (omap_rev() & 0xff)
 
 #define IS_OMAP_CLASS(class, id)                        \
 static inline int is_omap ##class (void)                \
@@ -116,7 +121,7 @@ static inline int is_omap ##class (void)		\
         return (GET_OMAP_CLASS == (id)) ? 1 : 0;        \
 }
 
-#define GET_OMAP_SUBCLASS       ((system_rev >> 20) & 0x0fff)
+#define GET_OMAP_SUBCLASS       ((omap_rev() >> 20) & 0x0fff)
 
 #define IS_OMAP_SUBCLASS(subclass, id)                  \
 static inline int is_omap ##subclass (void)             \
@@ -226,7 +231,7 @@ IS_OMAP_SUBCLASS(343x, 0x343)
  * cpu_is_omap2430():   True for OMAP2430
  * cpu_is_omap3430():   True for OMAP3430
  */
-#define GET_OMAP_TYPE   ((system_rev >> 16) & 0xffff)
+#define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
 
 #define IS_OMAP_TYPE(type, id)                          \
 static inline int is_omap ##type (void)                 \
@@ -320,44 +325,20 @@ IS_OMAP_TYPE(3430, 0x3430)
 #define cpu_class_is_omap2()    (cpu_is_omap24xx() || cpu_is_omap34xx())
 
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-/*
- * Macros to detect silicon revision of OMAP2/3 processors.
- * is_sil_rev_greater_than:     true if passed cpu type & its rev is greater.
- * is_sil_rev_lesser_than:      true if passed cpu type & its rev is lesser.
- * is_sil_rev_equal_to:         true if passed cpu type & its rev is equal.
- * get_sil_rev:                 return the silicon rev value.
- */
-#define get_sil_omap_type(rev)  ((rev & 0xffff0000) >> 16)
-#define get_sil_revision(rev)   ((rev & 0x0000f000) >> 12)
 
-#define is_sil_rev_greater_than(rev) \
-                ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \
-                (get_sil_revision(system_rev) > get_sil_revision(rev)))
+/* Various silicon revisions for omap2 */
+#define OMAP242X_CLASS          0x24200024
+#define OMAP2420_REV_ES1_0      0x24200024
+#define OMAP2420_REV_ES2_0      0x24201024
 
-#define is_sil_rev_less_than(rev) \
-                ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \
-                (get_sil_revision(system_rev) < get_sil_revision(rev)))
+#define OMAP243X_CLASS          0x24300024
+#define OMAP2430_REV_ES1_0      0x24300024
 
-#define is_sil_rev_equal_to(rev) \
-                ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \
-                (get_sil_revision(system_rev) == get_sil_revision(rev)))
-
-#define get_sil_rev() \
-                get_sil_revision(system_rev)
-
-/* Various silicon macros defined here */
-#define OMAP242X_CLASS          0x24200000
-#define OMAP2420_REV_ES1_0      0x24200000
-#define OMAP2420_REV_ES2_0      0x24201000
-
-#define OMAP243X_CLASS          0x24300000
-#define OMAP2430_REV_ES1_0      0x24300000
-
-#define OMAP343X_CLASS          0x34300000
-#define OMAP3430_REV_ES1_0      0x34300000
-#define OMAP3430_REV_ES2_0      0x34301000
-#define OMAP3430_REV_ES2_1      0x34302000
-#define OMAP3430_REV_ES2_2      0x34303000
+#define OMAP343X_CLASS          0x34300034
+#define OMAP3430_REV_ES1_0      0x34300034
+#define OMAP3430_REV_ES2_0      0x34301034
+#define OMAP3430_REV_ES2_1      0x34302034
+#define OMAP3430_REV_ES3_0      0x34303034
 
 /*
  * omap_chip bits
@@ -382,23 +363,16 @@ IS_OMAP_TYPE(3430, 0x3430)
 #define CHIP_IS_OMAP24XX       (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
 
 int omap_chip_is(struct omap_chip_id oci);
-
+int omap_type(void);
 
 /*
  * Macro to detect device type i.e. EMU/HS/TST/GP/BAD
  */
-#define DEVICE_TYPE_TEST        0
-#define DEVICE_TYPE_EMU         1
-#define DEVICE_TYPE_SEC         2
-#define DEVICE_TYPE_GP          3
-#define DEVICE_TYPE_BAD         4
-
-#define get_device_type()       ((system_rev & 0x700) >> 8)
-#define is_device_type_test()   (get_device_type() == DEVICE_TYPE_TEST)
-#define is_device_type_emu()    (get_device_type() == DEVICE_TYPE_EMU)
-#define is_device_type_sec()    (get_device_type() == DEVICE_TYPE_SEC)
-#define is_device_type_gp()     (get_device_type() == DEVICE_TYPE_GP)
-#define is_device_type_bad()    (get_device_type() == DEVICE_TYPE_BAD)
+#define OMAP2_DEVICE_TYPE_TEST          0
+#define OMAP2_DEVICE_TYPE_EMU           1
+#define OMAP2_DEVICE_TYPE_SEC           2
+#define OMAP2_DEVICE_TYPE_GP            3
+#define OMAP2_DEVICE_TYPE_BAD           4
 
 void omap2_check_revision(void);
 
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 98e9008b7e9d..04e68e88f134 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -71,11 +71,6 @@
                                  IH_GPIO_BASE + (nr))
 
 extern int omap_gpio_init(void);        /* Call from board init only */
-extern int omap_request_gpio(int gpio);
-extern void omap_free_gpio(int gpio);
-extern void omap_set_gpio_direction(int gpio, int is_input);
-extern void omap_set_gpio_dataout(int gpio, int enable);
-extern int omap_get_gpio_datain(int gpio);
 extern void omap2_gpio_prepare_for_retention(void);
 extern void omap2_gpio_resume_after_retention(void);
 extern void omap_set_gpio_debounce(int gpio, int enable);
@@ -92,6 +87,16 @@ extern void omap_set_gpio_debounce_time(int gpio, int enable);
 #include <linux/errno.h>
 #include <asm-generic/gpio.h>
 
+static inline int omap_request_gpio(int gpio)
+{
+        return gpio_request(gpio, "FIXME");
+}
+
+static inline void omap_free_gpio(int gpio)
+{
+        gpio_free(gpio);
+}
+
 static inline int gpio_get_value(unsigned gpio)
 {
         return __gpio_get_value(gpio);
@@ -109,16 +114,24 @@ static inline int gpio_cansleep(unsigned gpio)
 
 static inline int gpio_to_irq(unsigned gpio)
 {
-        if (gpio < (OMAP_MAX_GPIO_LINES + 16))
-                return OMAP_GPIO_IRQ(gpio);
-        return -EINVAL;
+        return __gpio_to_irq(gpio);
 }
 
 static inline int irq_to_gpio(unsigned irq)
 {
+        int tmp;
+
+        /* omap1 SOC mpuio */
         if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
                 return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
-        return irq - IH_GPIO_BASE;
+
+        /* SOC gpio */
+        tmp = irq - IH_GPIO_BASE;
+        if (tmp < OMAP_MAX_GPIO_LINES)
+                return tmp;
+
+        /* we don't supply reverse mappings for non-SOC gpios */
+        return -EIO;
 }
 
 #endif
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index adc83b7b8205..d92bf7964481 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -42,8 +42,8 @@
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
-#define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 /*
  * ----------------------------------------------------------------------------
@@ -51,8 +51,6 @@
  * ----------------------------------------------------------------------------
  */
 
-#define PCIO_BASE       0
-
 #if defined(CONFIG_ARCH_OMAP1)
 
 #define IO_PHYS                 0xFFFB0000
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index d40cac60b959..d6b5ca6c7da2 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -43,18 +43,7 @@
 #endif
 
 /*
- * Conversion between SDRAM and fake PCI bus, used by USB
- * NOTE: Physical address must be converted to Local Bus address
- *       on OMAP-1510 only
- */
-
-/*
  * Bus address is physical address, except for OMAP-1510 Local Bus.
- */
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-/*
  * OMAP-1510 bus address is translated into a Local Bus address if the
  * OMAP bus type is lbus. We do the address translation based on the
  * device overriding the defaults used in the dma-mapping API.
@@ -70,20 +59,20 @@
 
 #define virt_to_lbus(x)         ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
 #define lbus_to_virt(x)         ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
-#define is_lbus_device(dev)     (cpu_is_omap15xx() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0))
+#define is_lbus_device(dev)     (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0))
 
 #define __arch_page_to_dma(dev, page)   ({is_lbus_device(dev) ? \
                                         (dma_addr_t)virt_to_lbus(page_address(page)) : \
-                                        (dma_addr_t)__virt_to_bus(page_address(page));})
+                                        (dma_addr_t)__virt_to_phys(page_address(page));})
 
 #define __arch_dma_to_virt(dev, addr)   ({ (void *) (is_lbus_device(dev) ? \
                                                 lbus_to_virt(addr) : \
-                                                __bus_to_virt(addr)); })
+                                                __phys_to_virt(addr)); })
 
 #define __arch_virt_to_dma(dev, addr)   ({ unsigned long __addr = (unsigned long)(addr); \
                                            (dma_addr_t) (is_lbus_device(dev) ? \
                                                 virt_to_lbus(__addr) : \
-                                                __virt_to_bus(__addr)); })
+                                                __virt_to_phys(__addr)); })
 
 #endif  /* CONFIG_ARCH_OMAP15XX */
 
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index fc15d13058fc..031250f02805 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -17,12 +17,28 @@
 
 #include <mach/board.h>
 
+#define OMAP15XX_NR_MMC         1
+#define OMAP16XX_NR_MMC         2
+#define OMAP1_MMC_SIZE          0x080
+#define OMAP1_MMC1_BASE         0xfffb7800
+#define OMAP1_MMC2_BASE         0xfffb7c00      /* omap16xx only */
+
+#define OMAP24XX_NR_MMC         2
+#define OMAP34XX_NR_MMC         3
+#define OMAP2420_MMC_SIZE       OMAP1_MMC_SIZE
+#define HSMMC_SIZE              0x200
+#define OMAP2_MMC1_BASE         0x4809c000
+#define OMAP2_MMC2_BASE         0x480b4000
+#define OMAP3_MMC3_BASE         0x480ad000
+#define HSMMC3                  (1 << 2)
+#define HSMMC2                  (1 << 1)
+#define HSMMC1                  (1 << 0)
+
 #define OMAP_MMC_MAX_SLOTS      2
 
 struct omap_mmc_platform_data {
-        struct omap_mmc_conf    conf;
 
-        /* number of slots on board */
+        /* number of slots per controller */
         unsigned nr_slots:2;
 
         /* set if your board has components or wiring that limits the
@@ -41,7 +57,31 @@ struct omap_mmc_platform_data {
         int (*suspend)(struct device *dev, int slot);
         int (*resume)(struct device *dev, int slot);
 
+        u64 dma_mask;
+
         struct omap_mmc_slot_data {
+
+                /* 4 wire signaling is optional, and is used for SD/SDIO/HSMMC;
+                 * 8 wire signaling is also optional, and is used with HSMMC
+                 */
+                u8 wires;
+
+                /*
+                 * nomux means "standard" muxing is wrong on this board, and
+                 * that board-specific code handled it before common init logic.
+                 */
+                unsigned nomux:1;
+
+                /* switch pin can be for card detect (default) or card cover */
+                unsigned cover:1;
+
+                /* use the internal clock */
+                unsigned internal_clock:1;
+                s16 power_pin;
+
+                int switch_pin;                 /* gpio (card detect) */
+                int gpio_wp;                    /* gpio (write protect) */
+
                 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
                 int (* set_power)(struct device *dev, int slot, int power_on, int vdd);
                 int (* get_ro)(struct device *dev, int slot);
@@ -49,8 +89,8 @@ struct omap_mmc_platform_data {
                 /* return MMC cover switch state, can be NULL if not supported.
                  *
                  * possible return values:
-                 *   0 - open
-                 *   1 - closed
+                 *   0 - closed
+                 *   1 - open
                  */
                 int (* get_cover_state)(struct device *dev, int slot);
 
@@ -66,9 +106,31 @@ struct omap_mmc_platform_data {
         } slots[OMAP_MMC_MAX_SLOTS];
 };
 
-extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info);
-
 /* called from board-specific card detection service routine */
 extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed);
 
+#if     defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
+        defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
+void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                                int nr_controllers);
+void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                                int nr_controllers);
+int omap_mmc_add(int id, unsigned long base, unsigned long size,
+                        unsigned int irq, struct omap_mmc_platform_data *data);
+#else
+static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                                int nr_controllers)
+{
+}
+static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                                int nr_controllers)
+{
+}
+static inline int omap_mmc_add(int id, unsigned long base, unsigned long size,
+                unsigned int irq, struct omap_mmc_platform_data *data)
+{
+        return 0;
+}
+
+#endif
 #endif
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 6bbf1789bed5..f4362b8682c7 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -632,6 +632,15 @@ enum omap24xx_index {
         AC7_2430_USB0HS_DATA7,
 
         /* 2430 McBSP */
+        AD6_2430_MCBSP_CLKS,
+
+        AB2_2430_MCBSP1_CLKR,
+        AD5_2430_MCBSP1_FSR,
+        AA1_2430_MCBSP1_DX,
+        AF3_2430_MCBSP1_DR,
+        AB3_2430_MCBSP1_FSX,
+        Y9_2430_MCBSP1_CLKX,
+
         AC10_2430_MCBSP2_FSX,
         AD16_2430_MCBSP2_CLX,
         AE13_2430_MCBSP2_DX,
@@ -641,6 +650,30 @@ enum omap24xx_index {
         AE13_2430_MCBSP2_DX_OFF,
         AD13_2430_MCBSP2_DR_OFF,
 
+        AC9_2430_MCBSP3_CLKX,
+        AE4_2430_MCBSP3_FSX,
+        AE2_2430_MCBSP3_DR,
+        AF4_2430_MCBSP3_DX,
+
+        N3_2430_MCBSP4_CLKX,
+        AD23_2430_MCBSP4_DR,
+        AB25_2430_MCBSP4_DX,
+        AC25_2430_MCBSP4_FSX,
+
+        AE16_2430_MCBSP5_CLKX,
+        AF12_2430_MCBSP5_FSX,
+        K7_2430_MCBSP5_DX,
+        M1_2430_MCBSP5_DR,
+
+        /* 2430 McSPI*/
+        Y18_2430_MCSPI1_CLK,
+        AD15_2430_MCSPI1_SIMO,
+        AE17_2430_MCSPI1_SOMI,
+        U1_2430_MCSPI1_CS0,
+
+        /* Touchscreen GPIO */
+        AF19_2430_GPIO_85,
+
 };
 
 enum omap34xx_index {
@@ -749,6 +782,14 @@ enum omap34xx_index {
         AD2_3430_USB3FS_PHY_MM3_TXDAT,
         AC1_3430_USB3FS_PHY_MM3_TXEN_N,
 
+        /* 34xx GPIO
+         *  - normally these are bidirectional, no internal pullup/pulldown
+         *  - "_UP" suffix (GPIO3_UP) if internal pullup is configured
+         *  - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown
+         *  - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx)
+         */
+        AH8_34XX_GPIO29,
+        J25_34XX_GPIO170,
 };
 
 struct omap_mux_cfg {
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index dcd9d16da2e9..be7bcaf2b832 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -24,6 +24,7 @@
 
 #include <mach/sram.h>
 #include <mach/board.h>
+#include <mach/cpu.h>
 
 #include <mach/control.h>
 
@@ -87,7 +88,7 @@ static int is_sram_locked(void)
         int type = 0;
 
         if (cpu_is_omap242x())
-                type = system_rev & OMAP2_DEVICETYPE_MASK;
+                type = omap_rev() & OMAP2_DEVICETYPE_MASK;
 
         if (type == GP_DEVICE) {
                 /* RAMFW: R/W access to all initiators for all qualifier sets */
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile
index 198f3dde2be3..56021a72e10c 100644
--- a/arch/arm/plat-orion/Makefile
+++ b/arch/arm/plat-orion/Makefile
@@ -6,3 +6,5 @@ obj-y	:= irq.o pcie.o time.o
 obj-m   :=
 obj-n   :=
 obj-    :=
+
+obj-$(CONFIG_GENERIC_GPIO) += gpio.o
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
new file mode 100644
index 000000000000..967186425ca1
--- /dev/null
+++ b/arch/arm/plat-orion/gpio.c
@@ -0,0 +1,415 @@
+/*
+ * arch/arm/plat-orion/gpio.c
+ *
+ * Marvell Orion SoC GPIO handling.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/bitops.h>
+#include <linux/io.h>
+#include <asm/gpio.h>
+
+static DEFINE_SPINLOCK(gpio_lock);
+static const char *gpio_label[GPIO_MAX];  /* non null for allocated GPIOs */
+static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)];
+
+static inline void __set_direction(unsigned pin, int input)
+{
+        u32 u;
+
+        u = readl(GPIO_IO_CONF(pin));
+        if (input)
+                u |= 1 << (pin & 31);
+        else
+                u &= ~(1 << (pin & 31));
+        writel(u, GPIO_IO_CONF(pin));
+}
+
+static void __set_level(unsigned pin, int high)
+{
+        u32 u;
+
+        u = readl(GPIO_OUT(pin));
+        if (high)
+                u |= 1 << (pin & 31);
+        else
+                u &= ~(1 << (pin & 31));
+        writel(u, GPIO_OUT(pin));
+}
+
+
+/*
+ * GENERIC_GPIO primitives.
+ */
+int gpio_direction_input(unsigned pin)
+{
+        unsigned long flags;
+
+        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
+                pr_debug("%s: invalid GPIO %d\n", __func__, pin);
+                return -EINVAL;
+        }
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        /*
+         * Some callers might not have used gpio_request(),
+         * so flag this pin as requested now.
+         */
+        if (gpio_label[pin] == NULL)
+                gpio_label[pin] = "?";
+
+        /*
+         * Configure GPIO direction.
+         */
+        __set_direction(pin, 1);
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+
+        return 0;
+}
+EXPORT_SYMBOL(gpio_direction_input);
+
+int gpio_direction_output(unsigned pin, int value)
+{
+        unsigned long flags;
+        u32 u;
+
+        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
+                pr_debug("%s: invalid GPIO %d\n", __func__, pin);
+                return -EINVAL;
+        }
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        /*
+         * Some callers might not have used gpio_request(),
+         * so flag this pin as requested now.
+         */
+        if (gpio_label[pin] == NULL)
+                gpio_label[pin] = "?";
+
+        /*
+         * Disable blinking.
+         */
+        u = readl(GPIO_BLINK_EN(pin));
+        u &= ~(1 << (pin & 31));
+        writel(u, GPIO_BLINK_EN(pin));
+
+        /*
+         * Configure GPIO output value.
+         */
+        __set_level(pin, value);
+
+        /*
+         * Configure GPIO direction.
+         */
+        __set_direction(pin, 0);
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+
+        return 0;
+}
+EXPORT_SYMBOL(gpio_direction_output);
+
+int gpio_get_value(unsigned pin)
+{
+        int val;
+
+        if (readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31)))
+                val = readl(GPIO_DATA_IN(pin)) ^ readl(GPIO_IN_POL(pin));
+        else
+                val = readl(GPIO_OUT(pin));
+
+        return (val >> (pin & 31)) & 1;
+}
+EXPORT_SYMBOL(gpio_get_value);
+
+void gpio_set_value(unsigned pin, int value)
+{
+        unsigned long flags;
+        u32 u;
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        /*
+         * Disable blinking.
+         */
+        u = readl(GPIO_BLINK_EN(pin));
+        u &= ~(1 << (pin & 31));
+        writel(u, GPIO_BLINK_EN(pin));
+
+        /*
+         * Configure GPIO output value.
+         */
+        __set_level(pin, value);
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+}
+EXPORT_SYMBOL(gpio_set_value);
+
+int gpio_request(unsigned pin, const char *label)
+{
+        unsigned long flags;
+        int ret;
+
+        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
+                pr_debug("%s: invalid GPIO %d\n", __func__, pin);
+                return -EINVAL;
+        }
+
+        spin_lock_irqsave(&gpio_lock, flags);
+        if (gpio_label[pin] == NULL) {
+                gpio_label[pin] = label ? label : "?";
+                ret = 0;
+        } else {
+                pr_debug("%s: GPIO %d already used as %s\n",
+                         __func__, pin, gpio_label[pin]);
+                ret = -EBUSY;
+        }
+        spin_unlock_irqrestore(&gpio_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(gpio_request);
+
+void gpio_free(unsigned pin)
+{
+        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
+                pr_debug("%s: invalid GPIO %d\n", __func__, pin);
+                return;
+        }
+
+        if (gpio_label[pin] == NULL)
+                pr_warning("%s: GPIO %d already freed\n", __func__, pin);
+        else
+                gpio_label[pin] = NULL;
+}
+EXPORT_SYMBOL(gpio_free);
+
+
+/*
+ * Orion-specific GPIO API extensions.
+ */
+void __init orion_gpio_set_unused(unsigned pin)
+{
+        /*
+         * Configure as output, drive low.
+         */
+        __set_level(pin, 0);
+        __set_direction(pin, 0);
+}
+
+void __init orion_gpio_set_valid(unsigned pin, int valid)
+{
+        if (valid)
+                __set_bit(pin, gpio_valid);
+        else
+                __clear_bit(pin, gpio_valid);
+}
+
+void orion_gpio_set_blink(unsigned pin, int blink)
+{
+        unsigned long flags;
+        u32 u;
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        /*
+         * Set output value to zero.
+         */
+        __set_level(pin, 0);
+
+        u = readl(GPIO_BLINK_EN(pin));
+        if (blink)
+                u |= 1 << (pin & 31);
+        else
+                u &= ~(1 << (pin & 31));
+        writel(u, GPIO_BLINK_EN(pin));
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+}
+EXPORT_SYMBOL(orion_gpio_set_blink);
+
+
+/*****************************************************************************
+ * Orion GPIO IRQ
+ *
+ * GPIO_IN_POL register controls whether GPIO_DATA_IN will hold the same
+ * value of the line or the opposite value.
+ *
+ * Level IRQ handlers: DATA_IN is used directly as cause register.
+ *                     Interrupt are masked by LEVEL_MASK registers.
+ * Edge IRQ handlers:  Change in DATA_IN are latched in EDGE_CAUSE.
+ *                     Interrupt are masked by EDGE_MASK registers.
+ * Both-edge handlers: Similar to regular Edge handlers, but also swaps
+ *                     the polarity to catch the next line transaction.
+ *                     This is a race condition that might not perfectly
+ *                     work on some use cases.
+ *
+ * Every eight GPIO lines are grouped (OR'ed) before going up to main
+ * cause register.
+ *
+ *                    EDGE  cause    mask
+ *        data-in   /--------| |-----| |----\
+ *     -----| |-----                         ---- to main cause reg
+ *           X      \----------------| |----/
+ *        polarity    LEVEL          mask
+ *
+ ****************************************************************************/
+static void gpio_irq_edge_ack(u32 irq)
+{
+        int pin = irq_to_gpio(irq);
+
+        writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin));
+}
+
+static void gpio_irq_edge_mask(u32 irq)
+{
+        int pin = irq_to_gpio(irq);
+        u32 u;
+
+        u = readl(GPIO_EDGE_MASK(pin));
+        u &= ~(1 << (pin & 31));
+        writel(u, GPIO_EDGE_MASK(pin));
+}
+
+static void gpio_irq_edge_unmask(u32 irq)
+{
+        int pin = irq_to_gpio(irq);
+        u32 u;
+
+        u = readl(GPIO_EDGE_MASK(pin));
+        u |= 1 << (pin & 31);
+        writel(u, GPIO_EDGE_MASK(pin));
+}
+
+static void gpio_irq_level_mask(u32 irq)
+{
+        int pin = irq_to_gpio(irq);
+        u32 u;
+
+        u = readl(GPIO_LEVEL_MASK(pin));
+        u &= ~(1 << (pin & 31));
+        writel(u, GPIO_LEVEL_MASK(pin));
+}
+
+static void gpio_irq_level_unmask(u32 irq)
+{
+        int pin = irq_to_gpio(irq);
+        u32 u;
+
+        u = readl(GPIO_LEVEL_MASK(pin));
+        u |= 1 << (pin & 31);
+        writel(u, GPIO_LEVEL_MASK(pin));
+}
+
+static int gpio_irq_set_type(u32 irq, u32 type)
+{
+        int pin = irq_to_gpio(irq);
+        struct irq_desc *desc;
+        u32 u;
+
+        u = readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31));
+        if (!u) {
+                printk(KERN_ERR "orion gpio_irq_set_type failed "
+                                "(irq %d, pin %d).\n", irq, pin);
+                return -EINVAL;
+        }
+
+        desc = irq_desc + irq;
+
+        /*
+         * Set edge/level type.
+         */
+        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
+                desc->chip = &orion_gpio_irq_edge_chip;
+        } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
+                desc->chip = &orion_gpio_irq_level_chip;
+        } else {
+                printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type);
+                return -EINVAL;
+        }
+
+        /*
+         * Configure interrupt polarity.
+         */
+        if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH) {
+                u = readl(GPIO_IN_POL(pin));
+                u &= ~(1 << (pin & 31));
+                writel(u, GPIO_IN_POL(pin));
+        } else if (type == IRQ_TYPE_EDGE_FALLING || type == IRQ_TYPE_LEVEL_LOW) {
+                u = readl(GPIO_IN_POL(pin));
+                u |= 1 << (pin & 31);
+                writel(u, GPIO_IN_POL(pin));
+        } else if (type == IRQ_TYPE_EDGE_BOTH) {
+                u32 v;
+
+                v = readl(GPIO_IN_POL(pin)) ^ readl(GPIO_DATA_IN(pin));
+
+                /*
+                 * set initial polarity based on current input level
+                 */
+                u = readl(GPIO_IN_POL(pin));
+                if (v & (1 << (pin & 31)))
+                        u |= 1 << (pin & 31);           /* falling */
+                else
+                        u &= ~(1 << (pin & 31));        /* rising */
+                writel(u, GPIO_IN_POL(pin));
+        }
+
+        desc->status = (desc->status & ~IRQ_TYPE_SENSE_MASK) | type;
+
+        return 0;
+}
+
+struct irq_chip orion_gpio_irq_edge_chip = {
+        .name           = "orion_gpio_irq_edge",
+        .ack            = gpio_irq_edge_ack,
+        .mask           = gpio_irq_edge_mask,
+        .unmask         = gpio_irq_edge_unmask,
+        .set_type       = gpio_irq_set_type,
+};
+
+struct irq_chip orion_gpio_irq_level_chip = {
+        .name           = "orion_gpio_irq_level",
+        .mask           = gpio_irq_level_mask,
+        .mask_ack       = gpio_irq_level_mask,
+        .unmask         = gpio_irq_level_unmask,
+        .set_type       = gpio_irq_set_type,
+};
+
+void orion_gpio_irq_handler(int pinoff)
+{
+        u32 cause;
+        int pin;
+
+        cause = readl(GPIO_DATA_IN(pinoff)) & readl(GPIO_LEVEL_MASK(pinoff));
+        cause |= readl(GPIO_EDGE_CAUSE(pinoff)) & readl(GPIO_EDGE_MASK(pinoff));
+
+        for (pin = pinoff; pin < pinoff + 8; pin++) {
+                int irq = gpio_to_irq(pin);
+                struct irq_desc *desc = irq_desc + irq;
+
+                if (!(cause & (1 << (pin & 31))))
+                        continue;
+
+                if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
+                        /* Swap polarity (race with GPIO line) */
+                        u32 polarity;
+
+                        polarity = readl(GPIO_IN_POL(pin));
+                        polarity ^= 1 << (pin & 31);
+                        writel(polarity, GPIO_IN_POL(pin));
+                }
+                desc_handle_irq(irq, desc);
+        }
+}
diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h
index 64343051095a..4ec668e77460 100644
--- a/arch/arm/plat-orion/include/plat/ehci-orion.h
+++ b/arch/arm/plat-orion/include/plat/ehci-orion.h
@@ -11,8 +11,16 @@
 
 #include <linux/mbus.h>
 
+enum orion_ehci_phy_ver {
+        EHCI_PHY_ORION,
+        EHCI_PHY_DD,
+        EHCI_PHY_KW,
+        EHCI_PHY_NA,
+};
+
 struct orion_ehci_data {
         struct mbus_dram_target_info    *dram;
+        enum orion_ehci_phy_ver phy_version;
 };
 
 
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h
new file mode 100644
index 000000000000..54deaf274b52
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/gpio.h
@@ -0,0 +1,39 @@
+/*
+ * arch/arm/plat-orion/include/plat/gpio.h
+ *
+ * Marvell Orion SoC GPIO handling.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __PLAT_GPIO_H
+#define __PLAT_GPIO_H
+
+/*
+ * GENERIC_GPIO primitives.
+ */
+int gpio_request(unsigned pin, const char *label);
+void gpio_free(unsigned pin);
+int gpio_direction_input(unsigned pin);
+int gpio_direction_output(unsigned pin, int value);
+int gpio_get_value(unsigned pin);
+void gpio_set_value(unsigned pin, int value);
+
+/*
+ * Orion-specific GPIO API extensions.
+ */
+void orion_gpio_set_unused(unsigned pin);
+void orion_gpio_set_valid(unsigned pin, int valid);
+void orion_gpio_set_blink(unsigned pin, int blink);
+
+/*
+ * GPIO interrupt handling.
+ */
+extern struct irq_chip orion_gpio_irq_edge_chip;
+extern struct irq_chip orion_gpio_irq_level_chip;
+void orion_gpio_irq_handler(int irqoff);
+
+
+#endif
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 544d6b327f3a..6fa2923e6dca 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -149,7 +149,6 @@ static struct clock_event_device orion_clkevt = {
         .features       = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
         .shift          = 32,
         .rating         = 300,
-        .cpumask        = CPU_MASK_CPU0,
         .set_next_event = orion_clkevt_next_event,
         .set_mode       = orion_clkevt_mode,
 };
@@ -199,5 +198,6 @@ void __init orion_time_init(unsigned int irq, unsigned int tclk)
         orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
         orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt);
         orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt);
+        orion_clkevt.cpumask = cpumask_of(0);
         clockevents_register_device(&orion_clkevt);
 }
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index 31656c33e05e..de9383814e5e 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -6,34 +6,32 @@
 
 config PLAT_S3C
         bool
-        depends on ARCH_S3C2410
-        default y if ARCH_S3C2410
+        depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
+        default y
         select NO_IOPORT
         help
           Base platform code for any Samsung S3C device
 
 # low-level serial option nodes
 
+if PLAT_S3C
+
 config CPU_LLSERIAL_S3C2410_ONLY
         bool
-        depends on ARCH_S3C2410
         default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
 
 config CPU_LLSERIAL_S3C2440_ONLY
         bool
-        depends on ARCH_S3C2410
         default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
 
 config CPU_LLSERIAL_S3C2410
         bool
-        depends on ARCH_S3C2410
         help
           Selected if there is an S3C2410 (or register compatible) serial
           low-level implementation needed
 
 config CPU_LLSERIAL_S3C2440
         bool
-        depends on ARCH_S3C2410
         help
           Selected if there is an S3C2440 (or register compatible) serial
           low-level implementation needed
@@ -44,7 +42,7 @@ comment "Boot options"
 
 config S3C_BOOT_WATCHDOG
         bool "S3C Initialisation watchdog"
-        depends on PLAT_S3C && S3C2410_WATCHDOG
+        depends on S3C2410_WATCHDOG
         help
           Say y to enable the watchdog during the kernel decompression
           stage. If the kernel fails to uncompress, then the watchdog
@@ -52,16 +50,22 @@ config S3C_BOOT_WATCHDOG
 
 config S3C_BOOT_ERROR_RESET
         bool "S3C Reboot on decompression error"
-        depends on PLAT_S3C
         help
           Say y here to use the watchdog to reset the system if the
           kernel decompressor detects an error during decompression.
 
+config S3C_BOOT_UART_FORCE_FIFO
+       bool "Force UART FIFO on during boot process"
+       default y
+       help
+         Say Y here to force the UART FIFOs on during the kernel
+         uncompressor
+
 comment "Power management"
 
 config S3C2410_PM_DEBUG
         bool "S3C2410 PM Suspend debug"
-        depends on PLAT_S3C && PM
+        depends on PM
         help
           Say Y here if you want verbose debugging from the PM Suspend and
           Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
@@ -69,7 +73,7 @@ config S3C2410_PM_DEBUG
 
 config S3C2410_PM_CHECK
         bool "S3C2410 PM Suspend Memory CRC"
-        depends on PLAT_S3C && PM && CRC32
+        depends on PM && CRC32
         help
           Enable the PM code's memory area checksum over sleep. This option
           will generate CRCs of all blocks of memory, and store them before
@@ -83,7 +87,7 @@ config S3C2410_PM_CHECK
 
 config S3C2410_PM_CHECK_CHUNKSIZE
         int "S3C2410 PM Suspend CRC Chunksize (KiB)"
-        depends on PLAT_S3C && PM && S3C2410_PM_CHECK
+        depends on PM && S3C2410_PM_CHECK
         default 64
         help
           Set the chunksize in Kilobytes of the CRC for checking memory
@@ -95,10 +99,77 @@ config S3C2410_PM_CHECK_CHUNKSIZE
 
 config S3C_LOWLEVEL_UART_PORT
         int "S3C UART to use for low-level messages"
-        depends on PLAT_S3C
         default 0
         help
           Choice of which UART port to use for the low-level messages,
           such as the `Uncompressing...` at start time. The value of
           this configuration should be between zero and two. The port
           must have been initialised by the boot-loader before use.
+
+# options for gpiolib support
+
+config S3C_GPIO_SPACE
+        int "Space between gpio banks"
+        default 0
+        help
+          Add a number of spare GPIO entries between each bank for debugging
+          purposes. This allows any problems where an counter overflows from
+          one bank to another to be caught, at the expense of using a little
+          more memory.
+
+config S3C_GPIO_TRACK
+        bool
+        help
+          Internal configuration option to enable the s3c specific gpio
+          chip tracking if the platform requires it.
+
+config S3C_GPIO_PULL_UPDOWN
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_PULL_DOWN
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_PULL_UP
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_CFG_S3C24XX
+        bool
+        help
+          Internal configuration to enable S3C24XX style GPIO configuration
+          functions.
+
+config S3C_GPIO_CFG_S3C64XX
+        bool
+        help
+          Internal configuration to enable S3C64XX style GPIO configuration
+          functions.
+
+# device definitions to compile in
+
+config S3C_DEV_HSMMC
+        bool
+        help
+          Compile in platform device definitions for HSMMC code
+
+config S3C_DEV_HSMMC1
+        bool
+        help
+          Compile in platform device definitions for HSMMC channel 1
+
+config S3C_DEV_I2C1
+        bool
+        help
+          Compile in platform device definitions for I2C channel 1
+
+config S3C_DEV_FB
+        bool
+        help
+          Compile in platform device definition for framebuffer
+
+endif
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index f03d7b35ba37..39195f972d5e 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -1,3 +1,27 @@
-# dummy makefile, currently just including asm/arm/plat-s3c/include/plat
+# arch/arm/plat-s3c/Makefile
+#
+# Copyright 2008 Simtec Electronics
+#
+# Licensed under GPLv2
 
-obj-n   := dummy.o
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for all Samsung SoCs
+
+obj-y                           +=  init.o
+obj-y                           += time.o
+obj-y                           += clock.o
+obj-y                           += pwm-clock.o
+obj-y                           += gpio.o
+obj-y                           += gpio-config.o
+
+# devices
+
+obj-$(CONFIG_S3C_DEV_HSMMC)     += dev-hsmmc.o
+obj-$(CONFIG_S3C_DEV_HSMMC1)    += dev-hsmmc1.o
+obj-y                           += dev-i2c0.o
+obj-$(CONFIG_S3C_DEV_I2C1)      += dev-i2c1.o
+obj-$(CONFIG_S3C_DEV_FB)        += dev-fb.o
diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-s3c/clock.c
new file mode 100644
index 000000000000..b6be76e2fe51
--- /dev/null
+++ b/arch/arm/plat-s3c/clock.c
@@ -0,0 +1,368 @@
+/* linux/arch/arm/plat-s3c24xx/clock.c
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX Core clock control support
+ *
+ * Based on, and code from linux/arch/arm/mach-versatile/clock.c
+ **
+ **  Copyright (C) 2004 ARM Limited.
+ **  Written by Deep Blue Solutions Limited.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/clk.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <asm/irq.h>
+
+#include <plat/cpu-freq.h>
+
+#include <plat/clock.h>
+#include <plat/cpu.h>
+
+/* clock information */
+
+static LIST_HEAD(clocks);
+
+/* We originally used an mutex here, but some contexts (see resume)
+ * are calling functions such as clk_set_parent() with IRQs disabled
+ * causing an BUG to be triggered.
+ */
+DEFINE_SPINLOCK(clocks_lock);
+
+/* enable and disable calls for use with the clk struct */
+
+static int clk_null_enable(struct clk *clk, int enable)
+{
+        return 0;
+}
+
+/* Clock API calls */
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        struct clk *p;
+        struct clk *clk = ERR_PTR(-ENOENT);
+        int idno;
+
+        if (dev == NULL || dev->bus != &platform_bus_type)
+                idno = -1;
+        else
+                idno = to_platform_device(dev)->id;
+
+        spin_lock(&clocks_lock);
+
+        list_for_each_entry(p, &clocks, list) {
+                if (p->id == idno &&
+                    strcmp(id, p->name) == 0 &&
+                    try_module_get(p->owner)) {
+                        clk = p;
+                        break;
+                }
+        }
+
+        /* check for the case where a device was supplied, but the
+         * clock that was being searched for is not device specific */
+
+        if (IS_ERR(clk)) {
+                list_for_each_entry(p, &clocks, list) {
+                        if (p->id == -1 && strcmp(id, p->name) == 0 &&
+                            try_module_get(p->owner)) {
+                                clk = p;
+                                break;
+                        }
+                }
+        }
+
+        spin_unlock(&clocks_lock);
+        return clk;
+}
+
+void clk_put(struct clk *clk)
+{
+        module_put(clk->owner);
+}
+
+int clk_enable(struct clk *clk)
+{
+        if (IS_ERR(clk) || clk == NULL)
+                return -EINVAL;
+
+        clk_enable(clk->parent);
+
+        spin_lock(&clocks_lock);
+
+        if ((clk->usage++) == 0)
+                (clk->enable)(clk, 1);
+
+        spin_unlock(&clocks_lock);
+        return 0;
+}
+
+void clk_disable(struct clk *clk)
+{
+        if (IS_ERR(clk) || clk == NULL)
+                return;
+
+        spin_lock(&clocks_lock);
+
+        if ((--clk->usage) == 0)
+                (clk->enable)(clk, 0);
+
+        spin_unlock(&clocks_lock);
+        clk_disable(clk->parent);
+}
+
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        if (IS_ERR(clk))
+                return 0;
+
+        if (clk->rate != 0)
+                return clk->rate;
+
+        if (clk->get_rate != NULL)
+                return (clk->get_rate)(clk);
+
+        if (clk->parent != NULL)
+                return clk_get_rate(clk->parent);
+
+        return clk->rate;
+}
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+        if (!IS_ERR(clk) && clk->round_rate)
+                return (clk->round_rate)(clk, rate);
+
+        return rate;
+}
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        int ret;
+
+        if (IS_ERR(clk))
+                return -EINVAL;
+
+        /* We do not default just do a clk->rate = rate as
+         * the clock may have been made this way by choice.
+         */
+
+        WARN_ON(clk->set_rate == NULL);
+
+        if (clk->set_rate == NULL)
+                return -EINVAL;
+
+        spin_lock(&clocks_lock);
+        ret = (clk->set_rate)(clk, rate);
+        spin_unlock(&clocks_lock);
+
+        return ret;
+}
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+        return clk->parent;
+}
+
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+        int ret = 0;
+
+        if (IS_ERR(clk))
+                return -EINVAL;
+
+        spin_lock(&clocks_lock);
+
+        if (clk->set_parent)
+                ret = (clk->set_parent)(clk, parent);
+
+        spin_unlock(&clocks_lock);
+
+        return ret;
+}
+
+EXPORT_SYMBOL(clk_get);
+EXPORT_SYMBOL(clk_put);
+EXPORT_SYMBOL(clk_enable);
+EXPORT_SYMBOL(clk_disable);
+EXPORT_SYMBOL(clk_get_rate);
+EXPORT_SYMBOL(clk_round_rate);
+EXPORT_SYMBOL(clk_set_rate);
+EXPORT_SYMBOL(clk_get_parent);
+EXPORT_SYMBOL(clk_set_parent);
+
+/* base clocks */
+
+static int clk_default_setrate(struct clk *clk, unsigned long rate)
+{
+        clk->rate = rate;
+        return 0;
+}
+
+struct clk clk_xtal = {
+        .name           = "xtal",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = NULL,
+        .ctrlbit        = 0,
+};
+
+struct clk clk_ext = {
+        .name           = "ext",
+        .id             = -1,
+};
+
+struct clk clk_epll = {
+        .name           = "epll",
+        .id             = -1,
+};
+
+struct clk clk_mpll = {
+        .name           = "mpll",
+        .id             = -1,
+        .set_rate       = clk_default_setrate,
+};
+
+struct clk clk_upll = {
+        .name           = "upll",
+        .id             = -1,
+        .parent         = NULL,
+        .ctrlbit        = 0,
+};
+
+struct clk clk_f = {
+        .name           = "fclk",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = &clk_mpll,
+        .ctrlbit        = 0,
+        .set_rate       = clk_default_setrate,
+};
+
+struct clk clk_h = {
+        .name           = "hclk",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = NULL,
+        .ctrlbit        = 0,
+        .set_rate       = clk_default_setrate,
+};
+
+struct clk clk_p = {
+        .name           = "pclk",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = NULL,
+        .ctrlbit        = 0,
+        .set_rate       = clk_default_setrate,
+};
+
+struct clk clk_usb_bus = {
+        .name           = "usb-bus",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = &clk_upll,
+};
+
+
+
+struct clk s3c24xx_uclk = {
+        .name           = "uclk",
+        .id             = -1,
+};
+
+/* initialise the clock system */
+
+int s3c24xx_register_clock(struct clk *clk)
+{
+        clk->owner = THIS_MODULE;
+
+        if (clk->enable == NULL)
+                clk->enable = clk_null_enable;
+
+        /* add to the list of available clocks */
+
+        /* Quick check to see if this clock has already been registered. */
+        BUG_ON(clk->list.prev != clk->list.next);
+
+        spin_lock(&clocks_lock);
+        list_add(&clk->list, &clocks);
+        spin_unlock(&clocks_lock);
+
+        return 0;
+}
+
+int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
+{
+        int fails = 0;
+
+        for (; nr_clks > 0; nr_clks--, clks++) {
+                if (s3c24xx_register_clock(*clks) < 0)
+                        fails++;
+        }
+
+        return fails;
+}
+
+/* initalise all the clocks */
+
+int __init s3c24xx_register_baseclocks(unsigned long xtal)
+{
+        printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n");
+
+        clk_xtal.rate = xtal;
+
+        /* register our clocks */
+
+        if (s3c24xx_register_clock(&clk_xtal) < 0)
+                printk(KERN_ERR "failed to register master xtal\n");
+
+        if (s3c24xx_register_clock(&clk_mpll) < 0)
+                printk(KERN_ERR "failed to register mpll clock\n");
+
+        if (s3c24xx_register_clock(&clk_upll) < 0)
+                printk(KERN_ERR "failed to register upll clock\n");
+
+        if (s3c24xx_register_clock(&clk_f) < 0)
+                printk(KERN_ERR "failed to register cpu fclk\n");
+
+        if (s3c24xx_register_clock(&clk_h) < 0)
+                printk(KERN_ERR "failed to register cpu hclk\n");
+
+        if (s3c24xx_register_clock(&clk_p) < 0)
+                printk(KERN_ERR "failed to register cpu pclk\n");
+
+        return 0;
+}
+
diff --git a/arch/arm/plat-s3c/dev-fb.c b/arch/arm/plat-s3c/dev-fb.c
new file mode 100644
index 000000000000..0454b8ec02e2
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-fb.c
@@ -0,0 +1,72 @@
+/* linux/arch/arm/plat-s3c/dev-fb.c
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C series device definition for framebuffer device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+
+#include <mach/map.h>
+#include <mach/regs-fb.h>
+
+#include <plat/fb.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+static struct resource s3c_fb_resource[] = {
+        [0] = {
+                .start = S3C_PA_FB,
+                .end   = S3C_PA_FB + SZ_16K - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_LCD_VSYNC,
+                .end   = IRQ_LCD_VSYNC,
+                .flags = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start = IRQ_LCD_FIFO,
+                .end   = IRQ_LCD_FIFO,
+                .flags = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start = IRQ_LCD_SYSTEM,
+                .end   = IRQ_LCD_SYSTEM,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s3c_device_fb = {
+        .name             = "s3c-fb",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(s3c_fb_resource),
+        .resource         = s3c_fb_resource,
+        .dev.dma_mask     = &s3c_device_fb.dev.coherent_dma_mask,
+        .dev.coherent_dma_mask = 0xffffffffUL,
+};
+
+void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
+{
+        struct s3c_fb_platdata *npd;
+
+        if (!pd) {
+                printk(KERN_ERR "%s: no platform data\n", __func__);
+                return;
+        }
+
+        npd = kmemdup(pd, sizeof(struct s3c_fb_platdata), GFP_KERNEL);
+        if (!npd)
+                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
+
+        s3c_device_fb.dev.platform_data = npd;
+}
diff --git a/arch/arm/plat-s3c/dev-hsmmc.c b/arch/arm/plat-s3c/dev-hsmmc.c
new file mode 100644
index 000000000000..4c05b39810e2
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-hsmmc.c
@@ -0,0 +1,68 @@
+/* linux/arch/arm/plat-s3c/dev-hsmmc.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C series device definition for hsmmc devices
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/mmc/host.h>
+
+#include <mach/map.h>
+#include <plat/sdhci.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+#define S3C_SZ_HSMMC    (0x1000)
+
+static struct resource s3c_hsmmc_resource[] = {
+        [0] = {
+                .start = S3C_PA_HSMMC0,
+                .end   = S3C_PA_HSMMC0 + S3C_SZ_HSMMC - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_HSMMC0,
+                .end   = IRQ_HSMMC0,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+
+static u64 s3c_device_hsmmc_dmamask = 0xffffffffUL;
+
+struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
+        .max_width      = 4,
+        .host_caps      = (MMC_CAP_4_BIT_DATA |
+                           MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+};
+
+struct platform_device s3c_device_hsmmc0 = {
+        .name           = "s3c-sdhci",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(s3c_hsmmc_resource),
+        .resource       = s3c_hsmmc_resource,
+        .dev            = {
+                .dma_mask               = &s3c_device_hsmmc_dmamask,
+                .coherent_dma_mask      = 0xffffffffUL,
+                .platform_data          = &s3c_hsmmc0_def_platdata,
+        },
+};
+
+void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
+{
+        struct s3c_sdhci_platdata *set = &s3c_hsmmc0_def_platdata;
+
+        set->max_width = pd->max_width;
+
+        if (pd->cfg_gpio)
+                set->cfg_gpio = pd->cfg_gpio;
+        if (pd->cfg_card)
+                set->cfg_card = pd->cfg_card;
+}
diff --git a/arch/arm/plat-s3c/dev-hsmmc1.c b/arch/arm/plat-s3c/dev-hsmmc1.c
new file mode 100644
index 000000000000..e49bc4cd0ee6
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-hsmmc1.c
@@ -0,0 +1,68 @@
+/* linux/arch/arm/plat-s3c/dev-hsmmc1.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C series device definition for hsmmc device 1
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/mmc/host.h>
+
+#include <mach/map.h>
+#include <plat/sdhci.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+#define S3C_SZ_HSMMC    (0x1000)
+
+static struct resource s3c_hsmmc1_resource[] = {
+        [0] = {
+                .start = S3C_PA_HSMMC1,
+                .end   = S3C_PA_HSMMC1 + S3C_SZ_HSMMC - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_HSMMC1,
+                .end   = IRQ_HSMMC1,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+
+static u64 s3c_device_hsmmc1_dmamask = 0xffffffffUL;
+
+struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
+        .max_width      = 4,
+        .host_caps      = (MMC_CAP_4_BIT_DATA |
+                           MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+};
+
+struct platform_device s3c_device_hsmmc1 = {
+        .name           = "s3c-sdhci",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(s3c_hsmmc1_resource),
+        .resource       = s3c_hsmmc1_resource,
+        .dev            = {
+                .dma_mask               = &s3c_device_hsmmc1_dmamask,
+                .coherent_dma_mask      = 0xffffffffUL,
+                .platform_data          = &s3c_hsmmc1_def_platdata,
+        },
+};
+
+void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
+{
+        struct s3c_sdhci_platdata *set = &s3c_hsmmc1_def_platdata;
+
+        set->max_width = pd->max_width;
+
+        if (pd->cfg_gpio)
+                set->cfg_gpio = pd->cfg_gpio;
+        if (pd->cfg_card)
+                set->cfg_card = pd->cfg_card;
+}
diff --git a/arch/arm/plat-s3c/dev-i2c0.c b/arch/arm/plat-s3c/dev-i2c0.c
new file mode 100644
index 000000000000..2c0128c77c6e
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-i2c0.c
@@ -0,0 +1,71 @@
+/* linux/arch/arm/plat-s3c/dev-i2c0.c
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C series device definition for i2c device 0
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+
+#include <mach/map.h>
+
+#include <plat/regs-iic.h>
+#include <plat/iic.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+static struct resource s3c_i2c_resource[] = {
+        [0] = {
+                .start = S3C_PA_IIC,
+                .end   = S3C_PA_IIC + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_IIC,
+                .end   = IRQ_IIC,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s3c_device_i2c0 = {
+        .name             = "s3c2410-i2c",
+#ifdef CONFIG_S3C_DEV_I2C1
+        .id               = 0,
+#else
+        .id               = -1,
+#endif
+        .num_resources    = ARRAY_SIZE(s3c_i2c_resource),
+        .resource         = s3c_i2c_resource,
+};
+
+static struct s3c2410_platform_i2c default_i2c_data0 __initdata = {
+        .flags          = 0,
+        .slave_addr     = 0x10,
+        .bus_freq       = 100*1000,
+        .max_freq       = 400*1000,
+        .sda_delay      = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
+};
+
+void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
+{
+        struct s3c2410_platform_i2c *npd;
+
+        if (!pd)
+                pd = &default_i2c_data0;
+
+        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
+        if (!npd)
+                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
+        else if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c0_cfg_gpio;
+
+        s3c_device_i2c0.dev.platform_data = npd;
+}
diff --git a/arch/arm/plat-s3c/dev-i2c1.c b/arch/arm/plat-s3c/dev-i2c1.c
new file mode 100644
index 000000000000..9658fb0aec95
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-i2c1.c
@@ -0,0 +1,68 @@
+/* linux/arch/arm/plat-s3c/dev-i2c1.c
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C series device definition for i2c device 1
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+
+#include <mach/map.h>
+
+#include <plat/regs-iic.h>
+#include <plat/iic.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+static struct resource s3c_i2c_resource[] = {
+        [0] = {
+                .start = S3C_PA_IIC1,
+                .end   = S3C_PA_IIC1 + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_IIC1,
+                .end   = IRQ_IIC1,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s3c_device_i2c1 = {
+        .name             = "s3c2410-i2c",
+        .id               = 1,
+        .num_resources    = ARRAY_SIZE(s3c_i2c_resource),
+        .resource         = s3c_i2c_resource,
+};
+
+static struct s3c2410_platform_i2c default_i2c_data1 __initdata = {
+        .flags          = 0,
+        .bus_num        = 1,
+        .slave_addr     = 0x10,
+        .bus_freq       = 100*1000,
+        .max_freq       = 400*1000,
+        .sda_delay      = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
+};
+
+void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
+{
+        struct s3c2410_platform_i2c *npd;
+
+        if (!pd)
+                pd = &default_i2c_data1;
+
+        npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);
+        if (!npd)
+                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
+        else if (!npd->cfg_gpio)
+                npd->cfg_gpio = s3c_i2c1_cfg_gpio;
+
+        s3c_device_i2c1.dev.platform_data = npd;
+}
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-s3c/gpio-config.c
new file mode 100644
index 000000000000..7642b975a998
--- /dev/null
+++ b/arch/arm/plat-s3c/gpio-config.c
@@ -0,0 +1,163 @@
+/* linux/arch/arm/plat-s3c/gpio-config.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C series GPIO configuration core
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <mach/gpio-core.h>
+#include <plat/gpio-cfg.h>
+#include <plat/gpio-cfg-helpers.h>
+
+int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
+{
+        struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
+        unsigned long flags;
+        int offset;
+        int ret;
+
+        if (!chip)
+                return -EINVAL;
+
+        offset = pin - chip->chip.base;
+
+        local_irq_save(flags);
+        ret = s3c_gpio_do_setcfg(chip, offset, config);
+        local_irq_restore(flags);
+
+        return ret;
+}
+
+int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
+{
+        struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
+        unsigned long flags;
+        int offset, ret;
+
+        if (!chip)
+                return -EINVAL;
+
+        offset = pin - chip->chip.base;
+
+        local_irq_save(flags);
+        ret = s3c_gpio_do_setpull(chip, offset, pull);
+        local_irq_restore(flags);
+
+        return ret;
+}
+
+#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
+int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip,
+                                  unsigned int off, unsigned int cfg)
+{
+        void __iomem *reg = chip->base;
+        unsigned int shift = off;
+        u32 con;
+
+        if (s3c_gpio_is_cfg_special(cfg)) {
+                cfg &= 0xf;
+
+                /* Map output to 0, and SFN2 to 1 */
+                cfg -= 1;
+                if (cfg > 1)
+                        return -EINVAL;
+
+                cfg <<= shift;
+        }
+
+        con = __raw_readl(reg);
+        con &= ~(0x1 << shift);
+        con |= cfg;
+        __raw_writel(con, reg);
+
+        return 0;
+}
+
+int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
+                            unsigned int off, unsigned int cfg)
+{
+        void __iomem *reg = chip->base;
+        unsigned int shift = off * 2;
+        u32 con;
+
+        if (s3c_gpio_is_cfg_special(cfg)) {
+                cfg &= 0xf;
+                if (cfg > 3)
+                        return -EINVAL;
+
+                cfg <<= shift;
+        }
+
+        con = __raw_readl(reg);
+        con &= ~(0x3 << shift);
+        con |= cfg;
+        __raw_writel(con, reg);
+
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
+int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
+                                 unsigned int off, unsigned int cfg)
+{
+        void __iomem *reg = chip->base;
+        unsigned int shift = (off & 7) * 4;
+        u32 con;
+
+        if (off < 8 && chip->chip.ngpio >= 8)
+                reg -= 4;
+
+        if (s3c_gpio_is_cfg_special(cfg)) {
+                cfg &= 0xf;
+                cfg <<= shift;
+        }
+
+        con = __raw_readl(reg);
+        con &= ~(0xf << shift);
+        con |= cfg;
+        __raw_writel(con, reg);
+
+        return 0;
+}
+#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
+
+#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
+int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip,
+                            unsigned int off, s3c_gpio_pull_t pull)
+{
+        void __iomem *reg = chip->base + 0x08;
+        int shift = off * 2;
+        u32 pup;
+
+        pup = __raw_readl(reg);
+        pup &= ~(3 << shift);
+        pup |= pull << shift;
+        __raw_writel(pup, reg);
+
+        return 0;
+}
+
+s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
+                                        unsigned int off)
+{
+        void __iomem *reg = chip->base + 0x08;
+        int shift = off * 2;
+        u32 pup = __raw_readl(reg);
+
+        pup >>= shift;
+        pup &= 0x3;
+        return (__force s3c_gpio_pull_t)pup;
+}
+#endif
diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-s3c/gpio.c
new file mode 100644
index 000000000000..d71dd6d9ce5c
--- /dev/null
+++ b/arch/arm/plat-s3c/gpio.c
@@ -0,0 +1,147 @@
+/* linux/arch/arm/plat-s3c/gpio.c
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C series GPIO core
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <plat/gpio-core.h>
+
+#ifdef CONFIG_S3C_GPIO_TRACK
+struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
+
+static __init void s3c_gpiolib_track(struct s3c_gpio_chip *chip)
+{
+        unsigned int gpn;
+        int i;
+
+        gpn = chip->chip.base;
+        for (i = 0; i < chip->chip.ngpio; i++, gpn++) {
+                BUG_ON(gpn > ARRAY_SIZE(s3c_gpios));
+                s3c_gpios[gpn] = chip;
+        }
+}
+#endif /* CONFIG_S3C_GPIO_TRACK */
+
+/* Default routines for controlling GPIO, based on the original S3C24XX
+ * GPIO functions which deal with the case where each gpio bank of the
+ * chip is as following:
+ *
+ * base + 0x00: Control register, 2 bits per gpio
+ *              gpio n: 2 bits starting at (2*n)
+ *              00 = input, 01 = output, others mean special-function
+ * base + 0x04: Data register, 1 bit per gpio
+ *              bit n: data bit n
+*/
+
+static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long flags;
+        unsigned long con;
+
+        local_irq_save(flags);
+
+        con = __raw_readl(base + 0x00);
+        con &= ~(3 << (offset * 2));
+
+        __raw_writel(con, base + 0x00);
+
+        local_irq_restore(flags);
+        return 0;
+}
+
+static int s3c_gpiolib_output(struct gpio_chip *chip,
+                              unsigned offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long flags;
+        unsigned long dat;
+        unsigned long con;
+
+        local_irq_save(flags);
+
+        dat = __raw_readl(base + 0x04);
+        dat &= ~(1 << offset);
+        if (value)
+                dat |= 1 << offset;
+        __raw_writel(dat, base + 0x04);
+
+        con = __raw_readl(base + 0x00);
+        con &= ~(3 << (offset * 2));
+        con |= 1 << (offset * 2);
+
+        __raw_writel(con, base + 0x00);
+        __raw_writel(dat, base + 0x04);
+
+        local_irq_restore(flags);
+        return 0;
+}
+
+static void s3c_gpiolib_set(struct gpio_chip *chip,
+                            unsigned offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long flags;
+        unsigned long dat;
+
+        local_irq_save(flags);
+
+        dat = __raw_readl(base + 0x04);
+        dat &= ~(1 << offset);
+        if (value)
+                dat |= 1 << offset;
+        __raw_writel(dat, base + 0x04);
+
+        local_irq_restore(flags);
+}
+
+static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        unsigned long val;
+
+        val = __raw_readl(ourchip->base + 0x04);
+        val >>= offset;
+        val &= 1;
+
+        return val;
+}
+
+__init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
+{
+        struct gpio_chip *gc = &chip->chip;
+        int ret;
+
+        BUG_ON(!chip->base);
+        BUG_ON(!gc->label);
+        BUG_ON(!gc->ngpio);
+
+        if (!gc->direction_input)
+                gc->direction_input = s3c_gpiolib_input;
+        if (!gc->direction_output)
+                gc->direction_output = s3c_gpiolib_output;
+        if (!gc->set)
+                gc->set = s3c_gpiolib_set;
+        if (!gc->get)
+                gc->get = s3c_gpiolib_get;
+
+        /* gpiochip_add() prints own failure message on error. */
+        ret = gpiochip_add(gc);
+        if (ret >= 0)
+                s3c_gpiolib_track(chip);
+}
diff --git a/arch/arm/plat-s3c/include/mach/io.h b/arch/arm/plat-s3c/include/mach/io.h
new file mode 100644
index 000000000000..f6a53631b665
--- /dev/null
+++ b/arch/arm/plat-s3c/include/mach/io.h
@@ -0,0 +1,18 @@
+/* arch/arm/plat-s3c/include/mach/io.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for plat-s3c based systems, such as S3C24A0
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s3c2410/include/mach/timex.h b/arch/arm/plat-s3c/include/mach/timex.h
index 2a425ed0a7e0..2a425ed0a7e0 100644
--- a/arch/arm/mach-s3c2410/include/mach/timex.h
+++ b/arch/arm/plat-s3c/include/mach/timex.h
diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/plat-s3c/include/mach/vmalloc.h
index 315b0078a34d..bfd2ca6e3074 100644
--- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h
+++ b/arch/arm/plat-s3c/include/mach/vmalloc.h
@@ -1,4 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
+/* arch/arm/plat-s3c/include/mach/vmalloc.h
  *
  * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
  *
diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-s3c/include/plat/adc.h
new file mode 100644
index 000000000000..43df2a404b0b
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/adc.h
@@ -0,0 +1,29 @@
+/* arch/arm/plat-s3c/include/plat/adc.h
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      http://armlinux.simnte.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX ADC driver information
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_ADC_H
+#define __ASM_PLAT_ADC_H __FILE__
+
+struct s3c_adc_client;
+
+extern int s3c_adc_start(struct s3c_adc_client *client,
+                         unsigned int channel, unsigned int nr_samples);
+
+extern struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev,
+                                               void (*select)(unsigned selected),
+                                               void (*conv)(unsigned d0, unsigned d1),
+                                               unsigned int is_ts);
+
+extern void s3c_adc_release(struct s3c_adc_client *client);
+
+#endif /* __ASM_PLAT_ADC_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/clock.h b/arch/arm/plat-s3c/include/plat/clock.h
index 235b753cd877..a10622eed43a 100644
--- a/arch/arm/plat-s3c24xx/include/plat/clock.h
+++ b/arch/arm/plat-s3c/include/plat/clock.h
@@ -1,5 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/clock.h
- * linux/arch/arm/mach-s3c2410/clock.h
+/* linux/arch/arm/plat-s3c/include/plat/clock.h
  *
  * Copyright (c) 2004-2005 Simtec Electronics
  *      http://www.simtec.co.uk/products/SWLINUX/
@@ -10,6 +9,8 @@
  * published by the Free Software Foundation.
 */
 
+#include <linux/spinlock.h>
+
 struct clk {
         struct list_head      list;
         struct module        *owner;
@@ -44,21 +45,44 @@ extern struct clk clk_h;
 extern struct clk clk_p;
 extern struct clk clk_mpll;
 extern struct clk clk_upll;
+extern struct clk clk_epll;
 extern struct clk clk_xtal;
+extern struct clk clk_ext;
+
+/* S3C64XX specific clocks */
+extern struct clk clk_27m;
+extern struct clk clk_48m;
 
 /* exports for arch/arm/mach-s3c2410
  *
  * Please DO NOT use these outside of arch/arm/mach-s3c2410
 */
 
-extern struct mutex clocks_mutex;
+extern spinlock_t clocks_lock;
 
 extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
 
 extern int s3c24xx_register_clock(struct clk *clk);
 extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
 
-extern int s3c24xx_setup_clocks(unsigned long xtal,
-                                unsigned long fclk,
-                                unsigned long hclk,
-                                unsigned long pclk);
+extern int s3c24xx_register_baseclocks(unsigned long xtal);
+
+extern void s3c64xx_register_clocks(void);
+
+extern void s3c24xx_setup_clocks(unsigned long fclk,
+                                 unsigned long hclk,
+                                 unsigned long pclk);
+
+extern void s3c2410_setup_clocks(void);
+extern void s3c2412_setup_clocks(void);
+extern void s3c244x_setup_clocks(void);
+extern void s3c2443_setup_clocks(void);
+
+/* S3C64XX specific functions and clocks */
+
+extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
+
+/* Init for pwm clock code */
+
+extern void s3c_pwmclk_init(void);
+
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h
new file mode 100644
index 000000000000..c86a13307e90
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h
@@ -0,0 +1,94 @@
+/* arch/arm/plat-s3c/include/plat/cpu-freq.h
+ *
+ * Copyright (c) 2006,2007 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C CPU frequency scaling support - driver and board
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/cpufreq.h>
+
+struct s3c_cpufreq_info;
+struct s3c_cpufreq_board;
+struct s3c_iotimings;
+
+struct s3c_freq {
+        unsigned long   fclk;
+        unsigned long   armclk;
+        unsigned long   hclk_tns;       /* in 10ths of ns */
+        unsigned long   hclk;
+        unsigned long   pclk;
+};
+
+/* wrapper 'struct cpufreq_freqs' so that any drivers receiving the
+ * notification can use this information that is not provided by just
+ * having the core frequency alone.
+ */
+
+struct s3c_cpufreq_freqs {
+        struct cpufreq_freqs    freqs;
+        struct s3c_freq         old;
+        struct s3c_freq         new;
+};
+
+#define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs)
+
+struct s3c_clkdivs {
+        int             p_divisor;      /* fclk / pclk */
+        int             h_divisor;      /* fclk / hclk */
+        int             arm_divisor;    /* not all cpus have this. */
+        unsigned char   dvs;            /* using dvs mode to arm. */
+};
+
+#define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s))
+
+struct s3c_pllval {
+        unsigned long           freq;
+        unsigned long           pll_reg;
+};
+
+struct s3c_cpufreq_config {
+        struct s3c_freq         freq;
+        struct s3c_pllval       pll;
+        struct s3c_clkdivs      divs;
+        struct s3c_cpufreq_info *info;  /* for core, not drivers */
+        struct s3c_cpufreq_board *board;
+};
+
+/* s3c_cpufreq_board
+ *
+ * per-board configuraton information, such as memory refresh and
+ * how to initialise IO timings.
+ */
+struct s3c_cpufreq_board {
+        unsigned int    refresh;        /* refresh period in ns */
+        unsigned int    auto_io:1;      /* automatically init io timings. */
+        unsigned int    need_io:1;      /* set if needs io timing support. */
+
+        /* any non-zero field in here is taken as an upper limit. */
+        struct s3c_freq max;    /* frequency limits */
+};
+
+/* Things depending on frequency scaling. */
+#ifdef CONFIG_CPU_FREQ_S3C
+#define __init_or_cpufreq
+#else
+#define __init_or_cpufreq __init
+#endif
+
+/* Board functions */
+
+#ifdef CONFIG_CPU_FREQ_S3C
+extern int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board);
+#else
+
+static inline int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
+{
+        return 0;
+}
+#endif  /* CONFIG_CPU_FREQ_S3C */
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h
index 23e420e8bd5b..e62ae0fcfe56 100644
--- a/arch/arm/plat-s3c24xx/include/plat/cpu.h
+++ b/arch/arm/plat-s3c/include/plat/cpu.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/cpu.h
+/* linux/arch/arm/plat-s3c/include/plat/cpu.h
  *
  * Copyright (c) 2004-2005 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -18,7 +18,7 @@
 #define MHZ (1000*1000)
 #endif
 
-#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
+#define print_mhz(m) ((m) / MHZ), (((m) / 1000) % 1000)
 
 /* forward declaration */
 struct s3c24xx_uart_resources;
@@ -26,11 +26,28 @@ struct platform_device;
 struct s3c2410_uartcfg;
 struct map_desc;
 
+/* per-cpu initialisation function table. */
+
+struct cpu_table {
+        unsigned long   idcode;
+        unsigned long   idmask;
+        void            (*map_io)(void);
+        void            (*init_uarts)(struct s3c2410_uartcfg *cfg, int no);
+        void            (*init_clocks)(int xtal);
+        int             (*init)(void);
+        const char      *name;
+};
+
+extern void s3c_init_cpu(unsigned long idcode,
+                         struct cpu_table *cpus, unsigned int cputab_size);
+
 /* core initialisation functions */
 
 extern void s3c24xx_init_irq(void);
+extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
 
 extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
+extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
 
 extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 
diff --git a/arch/arm/plat-s3c/include/plat/debug-macro.S b/arch/arm/plat-s3c/include/plat/debug-macro.S
index 4aa7e2e6c001..3634d4e3708b 100644
--- a/arch/arm/plat-s3c/include/plat/debug-macro.S
+++ b/arch/arm/plat-s3c/include/plat/debug-macro.S
@@ -20,7 +20,7 @@
         .endm
 
 #ifndef fifo_level
-#define fifo_level fifo_level_s3c2410
+#define fifo_level fifo_level_s3c2440
 #endif
 
         .macro  fifo_full_s3c2440 rd, rx
diff --git a/arch/arm/plat-s3c24xx/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h
index badaac9d64a8..6b1b5231511c 100644
--- a/arch/arm/plat-s3c24xx/include/plat/devs.h
+++ b/arch/arm/plat-s3c/include/plat/devs.h
@@ -17,21 +17,26 @@ struct s3c24xx_uart_resources {
 };
 
 extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
+extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
 
 extern struct platform_device *s3c24xx_uart_devs[];
 extern struct platform_device *s3c24xx_uart_src[];
 
 extern struct platform_device s3c_device_timer[];
 
+extern struct platform_device s3c_device_fb;
 extern struct platform_device s3c_device_usb;
 extern struct platform_device s3c_device_lcd;
 extern struct platform_device s3c_device_wdt;
-extern struct platform_device s3c_device_i2c;
+extern struct platform_device s3c_device_i2c0;
+extern struct platform_device s3c_device_i2c1;
 extern struct platform_device s3c_device_iis;
 extern struct platform_device s3c_device_rtc;
 extern struct platform_device s3c_device_adc;
 extern struct platform_device s3c_device_sdi;
-extern struct platform_device s3c_device_hsmmc;
+extern struct platform_device s3c_device_hsmmc0;
+extern struct platform_device s3c_device_hsmmc1;
+extern struct platform_device s3c_device_hsmmc2;
 
 extern struct platform_device s3c_device_spi0;
 extern struct platform_device s3c_device_spi1;
diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-s3c/include/plat/fb.h
new file mode 100644
index 000000000000..214ff561b0dd
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/fb.h
@@ -0,0 +1,73 @@
+/* linux/arch/arm/plat-s3c/include/plat/fb.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C - FB platform data definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_S3C_FB_H
+#define __PLAT_S3C_FB_H __FILE__
+
+/**
+ * struct s3c_fb_pd_win - per window setup data
+ * @win_mode: The display parameters to initialise (not for window 0)
+ * @virtual_x: The virtual X size.
+ * @virtual_y: The virtual Y size.
+ */
+struct s3c_fb_pd_win {
+        struct fb_videomode     win_mode;
+
+        unsigned short          default_bpp;
+        unsigned short          max_bpp;
+        unsigned short          virtual_x;
+        unsigned short          virtual_y;
+};
+
+/**
+ * struct s3c_fb_platdata -  S3C driver platform specific information
+ * @setup_gpio: Setup the external GPIO pins to the right state to transfer
+ *              the data from the display system to the connected display
+ *              device.
+ * @vidcon0: The base vidcon0 values to control the panel data format.
+ * @vidcon1: The base vidcon1 values to control the panel data output.
+ * @win: The setup data for each hardware window, or NULL for unused.
+ * @display_mode: The LCD output display mode.
+ *
+ * The platform data supplies the video driver with all the information
+ * it requires to work with the display(s) attached to the machine. It
+ * controls the initial mode, the number of display windows (0 is always
+ * the base framebuffer) that are initialised etc.
+ *
+ */
+struct s3c_fb_platdata {
+        void    (*setup_gpio)(void);
+
+        struct s3c_fb_pd_win    *win[S3C_FB_MAX_WIN];
+
+        u32                      vidcon0;
+        u32                      vidcon1;
+};
+
+/**
+ * s3c_fb_set_platdata() - Setup the FB device with platform data.
+ * @pd: The platform data to set. The data is copied from the passed structure
+ *      so the machine data can mark the data __initdata so that any unused
+ *      machines will end up dumping their data at runtime.
+ */
+extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd);
+
+/**
+ * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD
+ *
+ * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
+ */
+extern void s3c64xx_fb_gpio_setup_24bpp(void);
+
+#endif /* __PLAT_S3C_FB_H */
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h
new file mode 100644
index 000000000000..652e2bbdaa20
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h
@@ -0,0 +1,176 @@
+/* linux/arch/arm/plat-s3c/include/plat/gpio-cfg-helper.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C Platform - GPIO pin configuration helper definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* This is meant for core cpu support, machine or other driver files
+ * should not be including this header.
+ */
+
+#ifndef __PLAT_GPIO_CFG_HELPERS_H
+#define __PLAT_GPIO_CFG_HELPERS_H __FILE__
+
+/* As a note, all gpio configuration functions are entered exclusively, either
+ * with the relevant lock held or the system prevented from doing anything else
+ * by disabling interrupts.
+*/
+
+static inline int s3c_gpio_do_setcfg(struct s3c_gpio_chip *chip,
+                                     unsigned int off, unsigned int config)
+{
+        return (chip->config->set_config)(chip, off, config);
+}
+
+static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip,
+                                      unsigned int off, s3c_gpio_pull_t pull)
+{
+        return (chip->config->set_pull)(chip, off, pull);
+}
+
+/**
+ * s3c_gpio_setcfg_s3c24xx - S3C24XX style GPIO configuration.
+ * @chip: The gpio chip that is being configured.
+ * @off: The offset for the GPIO being configured.
+ * @cfg: The configuration value to set.
+ *
+ * This helper deal with the GPIO cases where the control register
+ * has two bits of configuration per gpio, which have the following
+ * functions:
+ *      00 = input
+ *      01 = output
+ *      1x = special function
+*/
+extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
+                                   unsigned int off, unsigned int cfg);
+
+/**
+ * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A)
+ * @chip: The gpio chip that is being configured.
+ * @off: The offset for the GPIO being configured.
+ * @cfg: The configuration value to set.
+ *
+ * This helper deal with the GPIO cases where the control register
+ * has one bit of configuration for the gpio, where setting the bit
+ * means the pin is in special function mode and unset means output.
+*/
+extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
+                                     unsigned int off, unsigned int cfg);
+
+/**
+ * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config.
+ * @chip: The gpio chip that is being configured.
+ * @off: The offset for the GPIO being configured.
+ * @cfg: The configuration value to set.
+ *
+ * This helper deal with the GPIO cases where the control register has 4 bits
+ * of control per GPIO, generally in the form of:
+ *      0000 = Input
+ *      0001 = Output
+ *      others = Special functions (dependant on bank)
+ *
+ * Note, since the code to deal with the case where there are two control
+ * registers instead of one, we do not have a seperate set of functions for
+ * each case.
+*/
+extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
+                                        unsigned int off, unsigned int cfg);
+
+
+/* Pull-{up,down} resistor controls.
+ *
+ * S3C2410,S3C2440,S3C24A0 = Pull-UP,
+ * S3C2412,S3C2413 = Pull-Down
+ * S3C6400,S3C6410 = Pull-Both [None,Down,Up,Undef]
+ * S3C2443 = Pull-Both [not same as S3C6400]
+ */
+
+/**
+ * s3c_gpio_setpull_1up() - Pull configuration for choice of up or none.
+ * @chip: The gpio chip that is being configured.
+ * @off: The offset for the GPIO being configured.
+ * @param: pull: The pull mode being requested.
+ *
+ * This is a helper function for the case where we have GPIOs with one
+ * bit configuring the presence of a pull-up resistor.
+ */
+extern int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
+                                unsigned int off, s3c_gpio_pull_t pull);
+
+/**
+ * s3c_gpio_setpull_1down() - Pull configuration for choice of down or none
+ * @chip: The gpio chip that is being configured
+ * @off: The offset for the GPIO being configured
+ * @param: pull: The pull mode being requested
+ *
+ * This is a helper function for the case where we have GPIOs with one
+ * bit configuring the presence of a pull-down resistor.
+ */
+extern int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip,
+                                  unsigned int off, s3c_gpio_pull_t pull);
+
+/**
+ * s3c_gpio_setpull_upown() - Pull configuration for choice of up, down or none
+ * @chip: The gpio chip that is being configured.
+ * @off: The offset for the GPIO being configured.
+ * @param: pull: The pull mode being requested.
+ *
+ * This is a helper function for the case where we have GPIOs with two
+ * bits configuring the presence of a pull resistor, in the following
+ * order:
+ *      00 = No pull resistor connected
+ *      01 = Pull-up resistor connected
+ *      10 = Pull-down resistor connected
+ */
+extern int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip,
+                                   unsigned int off, s3c_gpio_pull_t pull);
+
+
+/**
+ * s3c_gpio_getpull_updown() - Get configuration for choice of up, down or none
+ * @chip: The gpio chip that the GPIO pin belongs to
+ * @off: The offset to the pin to get the configuration of.
+ *
+ * This helper function reads the state of the pull-{up,down} resistor for the
+ * given GPIO in the same case as s3c_gpio_setpull_upown.
+*/
+extern s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
+                                               unsigned int off);
+
+/**
+ * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443.
+ * @chip: The gpio chip that is being configured.
+ * @off: The offset for the GPIO being configured.
+ * @param: pull: The pull mode being requested.
+ *
+ * This is a helper function for the case where we have GPIOs with two
+ * bits configuring the presence of a pull resistor, in the following
+ * order:
+ *      00 = Pull-up resistor connected
+ *      10 = Pull-down resistor connected
+ *      x1 = No pull up resistor
+ */
+extern int s3c_gpio_setpull_s3c2443(struct s3c_gpio_chip *chip,
+                                    unsigned int off, s3c_gpio_pull_t pull);
+
+/**
+ * s3c_gpio_getpull_s3c2443() - Get configuration for s3c2443 pull resistors
+ * @chip: The gpio chip that the GPIO pin belongs to.
+ * @off: The offset to the pin to get the configuration of.
+ *
+ * This helper function reads the state of the pull-{up,down} resistor for the
+ * given GPIO in the same case as s3c_gpio_setpull_upown.
+*/
+extern s3c_gpio_pull_t s3c_gpio_getpull_s3c24xx(struct s3c_gpio_chip *chip,
+                                                unsigned int off);
+
+#endif /* __PLAT_GPIO_CFG_HELPERS_H */
+
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg.h b/arch/arm/plat-s3c/include/plat/gpio-cfg.h
new file mode 100644
index 000000000000..29cd6a86cade
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/gpio-cfg.h
@@ -0,0 +1,110 @@
+/* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C Platform - GPIO pin configuration
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* This file contains the necessary definitions to get the basic gpio
+ * pin configuration done such as setting a pin to input or output or
+ * changing the pull-{up,down} configurations.
+ */
+
+/* Note, this interface is being added to the s3c64xx arch first and will
+ * be added to the s3c24xx systems later.
+ */
+
+#ifndef __PLAT_GPIO_CFG_H
+#define __PLAT_GPIO_CFG_H __FILE__
+
+typedef unsigned int __bitwise__ s3c_gpio_pull_t;
+
+/* forward declaration if gpio-core.h hasn't been included */
+struct s3c_gpio_chip;
+
+/**
+ * struct s3c_gpio_cfg GPIO configuration
+ * @cfg_eint: Configuration setting when used for external interrupt source
+ * @get_pull: Read the current pull configuration for the GPIO
+ * @set_pull: Set the current pull configuraiton for the GPIO
+ * @set_config: Set the current configuration for the GPIO
+ * @get_config: Read the current configuration for the GPIO
+ *
+ * Each chip can have more than one type of GPIO bank available and some
+ * have different capabilites even when they have the same control register
+ * layouts. Provide an point to vector control routine and provide any
+ * per-bank configuration information that other systems such as the
+ * external interrupt code will need.
+ */
+struct s3c_gpio_cfg {
+        unsigned int    cfg_eint;
+
+        s3c_gpio_pull_t (*get_pull)(struct s3c_gpio_chip *chip, unsigned offs);
+        int             (*set_pull)(struct s3c_gpio_chip *chip, unsigned offs,
+                                    s3c_gpio_pull_t pull);
+
+        unsigned (*get_config)(struct s3c_gpio_chip *chip, unsigned offs);
+        int      (*set_config)(struct s3c_gpio_chip *chip, unsigned offs,
+                               unsigned config);
+};
+
+#define S3C_GPIO_SPECIAL_MARK   (0xfffffff0)
+#define S3C_GPIO_SPECIAL(x)     (S3C_GPIO_SPECIAL_MARK | (x))
+
+/* Defines for generic pin configurations */
+#define S3C_GPIO_INPUT  (S3C_GPIO_SPECIAL(0))
+#define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
+#define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
+
+#define s3c_gpio_is_cfg_special(_cfg) \
+        (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
+
+/**
+ * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
+ * @pin pin The pin number to configure.
+ * @pin to The configuration for the pin's function.
+ *
+ * Configure which function is actually connected to the external
+ * pin, such as an gpio input, output or some form of special function
+ * connected to an internal peripheral block.
+ */
+extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
+
+/* Define values for the pull-{up,down} available for each gpio pin.
+ *
+ * These values control the state of the weak pull-{up,down} resistors
+ * available on most pins on the S3C series. Not all chips support both
+ * up or down settings, and it may be dependant on the chip that is being
+ * used to whether the particular mode is available.
+ */
+#define S3C_GPIO_PULL_NONE      ((__force s3c_gpio_pull_t)0x00)
+#define S3C_GPIO_PULL_DOWN      ((__force s3c_gpio_pull_t)0x01)
+#define S3C_GPIO_PULL_UP        ((__force s3c_gpio_pull_t)0x02)
+
+/**
+ * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
+ * @pin: The pin number to configure the pull resistor.
+ * @pull: The configuration for the pull resistor.
+ *
+ * This function sets the state of the pull-{up,down} resistor for the
+ * specified pin. It will return 0 if successfull, or a negative error
+ * code if the pin cannot support the requested pull setting.
+*/
+extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
+
+/**
+ * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
+ * @pin: The pin number to get the settings for
+ *
+ * Read the pull resistor value for the specified pin.
+*/
+extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
+
+#endif /* __PLAT_GPIO_CFG_H */
diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-s3c/include/plat/gpio-core.h
new file mode 100644
index 000000000000..2fc60a580ac8
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/gpio-core.h
@@ -0,0 +1,77 @@
+/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C Platform - GPIO core
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Define the core gpiolib support functions that the s3c platforms may
+ * need to extend or change depending on the hardware and the s3c chip
+ * selected at build or found at run time.
+ *
+ * These definitions are not intended for driver inclusion, there is
+ * nothing here that should not live outside the platform and core
+ * specific code.
+*/
+
+struct s3c_gpio_cfg;
+
+/**
+ * struct s3c_gpio_chip - wrapper for specific implementation of gpio
+ * @chip: The chip structure to be exported via gpiolib.
+ * @base: The base pointer to the gpio configuration registers.
+ * @config: special function and pull-resistor control information.
+ *
+ * This wrapper provides the necessary information for the Samsung
+ * specific gpios being registered with gpiolib.
+ */
+struct s3c_gpio_chip {
+        struct gpio_chip        chip;
+        struct s3c_gpio_cfg     *config;
+        void __iomem            *base;
+};
+
+static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc)
+{
+        return container_of(gpc, struct s3c_gpio_chip, chip);
+}
+
+/** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip.
+ * @chip: The chip to register
+ *
+ * This is a wrapper to gpiochip_add() that takes our specific gpio chip
+ * information and makes the necessary alterations for the platform and
+ * notes the information for use with the configuration systems and any
+ * other parts of the system.
+ */
+extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
+
+/* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios
+ * for use with the configuration calls, and other parts of the s3c gpiolib
+ * support code.
+ *
+ * Not all s3c support code will need this, as some configurations of cpu
+ * may only support one or two different configuration options and have an
+ * easy gpio to s3c_gpio_chip mapping function. If this is the case, then
+ * the machine support file should provide its own s3c_gpiolib_getchip()
+ * and any other necessary functions.
+ */
+
+#ifdef CONFIG_S3C_GPIO_TRACK
+extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
+
+static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip)
+{
+        return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL;
+}
+#else
+/* machine specific code should provide s3c_gpiolib_getchip */
+
+static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { }
+#endif
diff --git a/arch/arm/plat-s3c/include/plat/iic-core.h b/arch/arm/plat-s3c/include/plat/iic-core.h
new file mode 100644
index 000000000000..36397ca20962
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/iic-core.h
@@ -0,0 +1,35 @@
+/* arch/arm/mach-s3c2410/include/mach/iic-core.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C - I2C Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_IIC_CORE_H
+#define __ASM_ARCH_IIC_CORE_H __FILE__
+
+/* These functions are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void s3c_i2c0_setname(char *name)
+{
+        /* currently this device is always compiled in */
+        s3c_device_i2c0.name = name;
+}
+
+static inline void s3c_i2c1_setname(char *name)
+{
+#ifdef CONFIG_S3C_DEV_I2C1
+        s3c_device_i2c1.name = name;
+#endif
+}
+
+#endif /* __ASM_ARCH_IIC_H */
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-s3c/include/plat/iic.h
new file mode 100644
index 000000000000..dc1dfcb9bc6c
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/iic.h
@@ -0,0 +1,57 @@
+/* arch/arm/mach-s3c2410/include/mach/iic.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 - I2C Controller platfrom_device info
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_IIC_H
+#define __ASM_ARCH_IIC_H __FILE__
+
+#define S3C_IICFLG_FILTER       (1<<0)  /* enable s3c2440 filter */
+
+/* Notes:
+ *      1) All frequencies are expressed in Hz
+ *      2) A value of zero is `do not care`
+*/
+
+struct s3c2410_platform_i2c {
+        int             bus_num;        /* bus number to use */
+        unsigned int    flags;
+        unsigned int    slave_addr;     /* slave address for controller */
+        unsigned long   bus_freq;       /* standard bus frequency */
+        unsigned long   max_freq;       /* max frequency for the bus */
+        unsigned long   min_freq;       /* min frequency for the bus */
+        unsigned int    sda_delay;      /* pclks (s3c2440 only) */
+
+        void    (*cfg_gpio)(struct platform_device *dev);
+};
+
+/**
+ * s3c_i2c0_set_platdata - set platform data for i2c0 device
+ * @i2c: The platform data to set, or NULL for default data.
+ *
+ * Register the given platform data for use with the i2c0 device. This
+ * call copies the platform data, so the caller can use __initdata for
+ * their copy.
+ *
+ * This call will set cfg_gpio if is null to the default platform
+ * implementation.
+ *
+ * Any user of s3c_device_i2c0 should call this, even if it is with
+ * NULL to ensure that the device is given the default platform data
+ * as the driver will no longer carry defaults.
+ */
+extern void s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *i2c);
+extern void s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *i2c);
+
+/* defined by architecture to configure gpio */
+extern void s3c_i2c0_cfg_gpio(struct platform_device *dev);
+extern void s3c_i2c1_cfg_gpio(struct platform_device *dev);
+
+#endif /* __ASM_ARCH_IIC_H */
diff --git a/arch/arm/plat-s3c/include/plat/map.h b/arch/arm/plat-s3c/include/plat/map-base.h
index b84289d32a54..b84289d32a54 100644
--- a/arch/arm/plat-s3c/include/plat/map.h
+++ b/arch/arm/plat-s3c/include/plat/map-base.h
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h
new file mode 100644
index 000000000000..f4dcd14af059
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/nand.h
@@ -0,0 +1,50 @@
+/* arch/arm/mach-s3c2410/include/mach/nand.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 - NAND device controller platfrom_device info
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* struct s3c2410_nand_set
+ *
+ * define an set of one or more nand chips registered with an unique mtd
+ *
+ * nr_chips      = number of chips in this set
+ * nr_partitions = number of partitions pointed to be partitoons (or zero)
+ * name          = name of set (optional)
+ * nr_map        = map for low-layer logical to physical chip numbers (option)
+ * partitions    = mtd partition list
+*/
+
+struct s3c2410_nand_set {
+        unsigned int            disable_ecc : 1;
+
+        int                     nr_chips;
+        int                     nr_partitions;
+        char                    *name;
+        int                     *nr_map;
+        struct mtd_partition    *partitions;
+        struct nand_ecclayout   *ecc_layout;
+};
+
+struct s3c2410_platform_nand {
+        /* timing information for controller, all times in nanoseconds */
+
+        int     tacls;  /* time for active CLE/ALE to nWE/nOE */
+        int     twrph0; /* active time for nWE/nOE */
+        int     twrph1; /* time for release CLE/ALE from nWE/nOE inactive */
+
+        unsigned int    ignore_unset_ecc : 1;
+
+        int                     nr_sets;
+        struct s3c2410_nand_set *sets;
+
+        void                    (*select_chip)(struct s3c2410_nand_set *,
+                                               int chip);
+};
+
diff --git a/arch/arm/plat-s3c/include/plat/regs-ac97.h b/arch/arm/plat-s3c/include/plat/regs-ac97.h
new file mode 100644
index 000000000000..c3878f7acb83
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-ac97.h
@@ -0,0 +1,67 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-ac97.h
+ *
+ * Copyright (c) 2006 Simtec Electronics <linux@simtec.co.uk>
+ *              http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2440 AC97 Controller
+*/
+
+#ifndef __ASM_ARCH_REGS_AC97_H
+#define __ASM_ARCH_REGS_AC97_H __FILE__
+
+#define S3C_AC97_GLBCTRL                                (0x00)
+
+#define S3C_AC97_GLBCTRL_CODECREADYIE                   (1<<22)
+#define S3C_AC97_GLBCTRL_PCMOUTURIE                     (1<<21)
+#define S3C_AC97_GLBCTRL_PCMINORIE                      (1<<20)
+#define S3C_AC97_GLBCTRL_MICINORIE                      (1<<19)
+#define S3C_AC97_GLBCTRL_PCMOUTTIE                      (1<<18)
+#define S3C_AC97_GLBCTRL_PCMINTIE                       (1<<17)
+#define S3C_AC97_GLBCTRL_MICINTIE                       (1<<16)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_OFF                   (0<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_PIO                   (1<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_DMA                   (2<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_MASK                  (3<<12)
+#define S3C_AC97_GLBCTRL_PCMINTM_OFF                    (0<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_PIO                    (1<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_DMA                    (2<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_MASK                   (3<<10)
+#define S3C_AC97_GLBCTRL_MICINTM_OFF                    (0<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_PIO                    (1<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_DMA                    (2<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_MASK                   (3<<8)
+#define S3C_AC97_GLBCTRL_TRANSFERDATAENABLE             (1<<3)
+#define S3C_AC97_GLBCTRL_ACLINKON                       (1<<2)
+#define S3C_AC97_GLBCTRL_WARMRESET                      (1<<1)
+#define S3C_AC97_GLBCTRL_COLDRESET                      (1<<0)
+
+#define S3C_AC97_GLBSTAT                                (0x04)
+
+#define S3C_AC97_GLBSTAT_CODECREADY                     (1<<22)
+#define S3C_AC97_GLBSTAT_PCMOUTUR                       (1<<21)
+#define S3C_AC97_GLBSTAT_PCMINORI                       (1<<20)
+#define S3C_AC97_GLBSTAT_MICINORI                       (1<<19)
+#define S3C_AC97_GLBSTAT_PCMOUTTI                       (1<<18)
+#define S3C_AC97_GLBSTAT_PCMINTI                        (1<<17)
+#define S3C_AC97_GLBSTAT_MICINTI                        (1<<16)
+#define S3C_AC97_GLBSTAT_MAINSTATE_IDLE                 (0<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_INIT                 (1<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_READY                (2<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE               (3<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_LP                   (4<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_WARM                 (5<<0)
+
+#define S3C_AC97_CODEC_CMD                              (0x08)
+
+#define S3C_AC97_CODEC_CMD_READ                         (1<<23)
+
+#define S3C_AC97_STAT                                   (0x0c)
+#define S3C_AC97_PCM_ADDR                               (0x10)
+#define S3C_AC97_PCM_DATA                               (0x18)
+#define S3C_AC97_MIC_DATA                               (0x1C)
+
+#endif /* __ASM_ARCH_REGS_AC97_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb.h b/arch/arm/plat-s3c/include/plat/regs-fb.h
new file mode 100644
index 000000000000..e9ee599d430e
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-fb.h
@@ -0,0 +1,366 @@
+/* arch/arm/plat-s3c/include/plat/regs-fb.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C Platform - new-style framebuffer register definitions
+ *
+ * This is the register set for the new style framebuffer interface
+ * found from the S3C2443 onwards into the S3C2416, S3C2450 and the
+ * S3C64XX series such as the S3C6400 and S3C6410.
+ *
+ * The file does not contain the cpu specific items which are based on
+ * whichever architecture is selected, it only contains the core of the
+ * register set. See <mach/regs-fb.h> to get the specifics.
+ *
+ * Note, we changed to using regs-fb.h as it avoids any clashes with
+ * the original regs-lcd.h so out of the way of regs-lcd.h as well as
+ * indicating the newer block is much more than just an LCD interface.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Please do not include this file directly, use <mach/regs-fb.h> to
+ * ensure all the localised SoC support is included as necessary.
+*/
+
+/* VIDCON0 */
+
+#define VIDCON0                                 (0x00)
+#define VIDCON0_INTERLACE                       (1 << 29)
+#define VIDCON0_VIDOUT_MASK                     (0x3 << 26)
+#define VIDCON0_VIDOUT_SHIFT                    (26)
+#define VIDCON0_VIDOUT_RGB                      (0x0 << 26)
+#define VIDCON0_VIDOUT_TV                       (0x1 << 26)
+#define VIDCON0_VIDOUT_I80_LDI0                 (0x2 << 26)
+#define VIDCON0_VIDOUT_I80_LDI1                 (0x3 << 26)
+
+#define VIDCON0_L1_DATA_MASK                    (0x7 << 23)
+#define VIDCON0_L1_DATA_SHIFT                   (23)
+#define VIDCON0_L1_DATA_16BPP                   (0x0 << 23)
+#define VIDCON0_L1_DATA_18BPP16                 (0x1 << 23)
+#define VIDCON0_L1_DATA_18BPP9                  (0x2 << 23)
+#define VIDCON0_L1_DATA_24BPP                   (0x3 << 23)
+#define VIDCON0_L1_DATA_18BPP                   (0x4 << 23)
+#define VIDCON0_L1_DATA_16BPP8                  (0x5 << 23)
+
+#define VIDCON0_L0_DATA_MASK                    (0x7 << 20)
+#define VIDCON0_L0_DATA_SHIFT                   (20)
+#define VIDCON0_L0_DATA_16BPP                   (0x0 << 20)
+#define VIDCON0_L0_DATA_18BPP16                 (0x1 << 20)
+#define VIDCON0_L0_DATA_18BPP9                  (0x2 << 20)
+#define VIDCON0_L0_DATA_24BPP                   (0x3 << 20)
+#define VIDCON0_L0_DATA_18BPP                   (0x4 << 20)
+#define VIDCON0_L0_DATA_16BPP8                  (0x5 << 20)
+
+#define VIDCON0_PNRMODE_MASK                    (0x3 << 17)
+#define VIDCON0_PNRMODE_SHIFT                   (17)
+#define VIDCON0_PNRMODE_RGB                     (0x0 << 17)
+#define VIDCON0_PNRMODE_BGR                     (0x1 << 17)
+#define VIDCON0_PNRMODE_SERIAL_RGB              (0x2 << 17)
+#define VIDCON0_PNRMODE_SERIAL_BGR              (0x3 << 17)
+
+#define VIDCON0_CLKVALUP                        (1 << 16)
+#define VIDCON0_CLKVAL_F_MASK                   (0xff << 6)
+#define VIDCON0_CLKVAL_F_SHIFT                  (6)
+#define VIDCON0_CLKVAL_F_LIMIT                  (0xff)
+#define VIDCON0_CLKVAL_F(_x)                    ((_x) << 6)
+#define VIDCON0_VLCKFREE                        (1 << 5)
+#define VIDCON0_CLKDIR                          (1 << 4)
+
+#define VIDCON0_CLKSEL_MASK                     (0x3 << 2)
+#define VIDCON0_CLKSEL_SHIFT                    (2)
+#define VIDCON0_CLKSEL_HCLK                     (0x0 << 2)
+#define VIDCON0_CLKSEL_LCD                      (0x1 << 2)
+#define VIDCON0_CLKSEL_27M                      (0x3 << 2)
+
+#define VIDCON0_ENVID                           (1 << 1)
+#define VIDCON0_ENVID_F                         (1 << 0)
+
+#define VIDCON1                                 (0x04)
+#define VIDCON1_LINECNT_MASK                    (0x7ff << 16)
+#define VIDCON1_LINECNT_SHIFT                   (16)
+#define VIDCON1_LINECNT_GET(_v)                 (((_v) >> 16) & 0x7ff)
+#define VIDCON1_VSTATUS_MASK                    (0x3 << 13)
+#define VIDCON1_VSTATUS_SHIFT                   (13)
+#define VIDCON1_VSTATUS_VSYNC                   (0x0 << 13)
+#define VIDCON1_VSTATUS_BACKPORCH               (0x1 << 13)
+#define VIDCON1_VSTATUS_ACTIVE                  (0x2 << 13)
+#define VIDCON1_VSTATUS_FRONTPORCH              (0x0 << 13)
+
+#define VIDCON1_INV_VCLK                        (1 << 7)
+#define VIDCON1_INV_HSYNC                       (1 << 6)
+#define VIDCON1_INV_VSYNC                       (1 << 5)
+#define VIDCON1_INV_VDEN                        (1 << 4)
+
+/* VIDCON2 */
+
+#define VIDCON2                                 (0x08)
+#define VIDCON2_EN601                           (1 << 23)
+#define VIDCON2_TVFMTSEL_SW                     (1 << 14)
+
+#define VIDCON2_TVFMTSEL1_MASK                  (0x3 << 12)
+#define VIDCON2_TVFMTSEL1_SHIFT                 (12)
+#define VIDCON2_TVFMTSEL1_RGB                   (0x0 << 12)
+#define VIDCON2_TVFMTSEL1_YUV422                (0x1 << 12)
+#define VIDCON2_TVFMTSEL1_YUV444                (0x2 << 12)
+
+#define VIDCON2_ORGYCbCr                        (1 << 8)
+#define VIDCON2_YUVORDCrCb                      (1 << 7)
+
+/* VIDTCON0 */
+
+#define VIDTCON0_VBPDE_MASK                     (0xff << 24)
+#define VIDTCON0_VBPDE_SHIFT                    (24)
+#define VIDTCON0_VBPDE_LIMIT                    (0xff)
+#define VIDTCON0_VBPDE(_x)                      ((_x) << 24)
+
+#define VIDTCON0_VBPD_MASK                      (0xff << 16)
+#define VIDTCON0_VBPD_SHIFT                     (16)
+#define VIDTCON0_VBPD_LIMIT                     (0xff)
+#define VIDTCON0_VBPD(_x)                       ((_x) << 16)
+
+#define VIDTCON0_VFPD_MASK                      (0xff << 8)
+#define VIDTCON0_VFPD_SHIFT                     (8)
+#define VIDTCON0_VFPD_LIMIT                     (0xff)
+#define VIDTCON0_VFPD(_x)                       ((_x) << 8)
+
+#define VIDTCON0_VSPW_MASK                      (0xff << 0)
+#define VIDTCON0_VSPW_SHIFT                     (0)
+#define VIDTCON0_VSPW_LIMIT                     (0xff)
+#define VIDTCON0_VSPW(_x)                       ((_x) << 0)
+
+/* VIDTCON1 */
+
+#define VIDTCON1_VFPDE_MASK                     (0xff << 24)
+#define VIDTCON1_VFPDE_SHIFT                    (24)
+#define VIDTCON1_VFPDE_LIMIT                    (0xff)
+#define VIDTCON1_VFPDE(_x)                      ((_x) << 24)
+
+#define VIDTCON1_HBPD_MASK                      (0xff << 16)
+#define VIDTCON1_HBPD_SHIFT                     (16)
+#define VIDTCON1_HBPD_LIMIT                     (0xff)
+#define VIDTCON1_HBPD(_x)                       ((_x) << 16)
+
+#define VIDTCON1_HFPD_MASK                      (0xff << 8)
+#define VIDTCON1_HFPD_SHIFT                     (8)
+#define VIDTCON1_HFPD_LIMIT                     (0xff)
+#define VIDTCON1_HFPD(_x)                       ((_x) << 8)
+
+#define VIDTCON1_HSPW_MASK                      (0xff << 0)
+#define VIDTCON1_HSPW_SHIFT                     (0)
+#define VIDTCON1_HSPW_LIMIT                     (0xff)
+#define VIDTCON1_HSPW(_x)                       ((_x) << 0)
+
+#define VIDTCON2                                (0x18)
+#define VIDTCON2_LINEVAL_MASK                   (0x7ff << 11)
+#define VIDTCON2_LINEVAL_SHIFT                  (11)
+#define VIDTCON2_LINEVAL_LIMIT                  (0x7ff)
+#define VIDTCON2_LINEVAL(_x)                    ((_x) << 11)
+
+#define VIDTCON2_HOZVAL_MASK                    (0x7ff << 0)
+#define VIDTCON2_HOZVAL_SHIFT                   (0)
+#define VIDTCON2_HOZVAL_LIMIT                   (0x7ff)
+#define VIDTCON2_HOZVAL(_x)                     ((_x) << 0)
+
+/* WINCONx */
+
+
+#define WINCONx_BITSWP                          (1 << 18)
+#define WINCONx_BYTSWP                          (1 << 17)
+#define WINCONx_HAWSWP                          (1 << 16)
+#define WINCONx_BURSTLEN_MASK                   (0x3 << 9)
+#define WINCONx_BURSTLEN_SHIFT                  (9)
+#define WINCONx_BURSTLEN_16WORD                 (0x0 << 9)
+#define WINCONx_BURSTLEN_8WORD                  (0x1 << 9)
+#define WINCONx_BURSTLEN_4WORD                  (0x2 << 9)
+
+#define WINCONx_ENWIN                           (1 << 0)
+#define WINCON0_BPPMODE_MASK                    (0xf << 2)
+#define WINCON0_BPPMODE_SHIFT                   (2)
+#define WINCON0_BPPMODE_1BPP                    (0x0 << 2)
+#define WINCON0_BPPMODE_2BPP                    (0x1 << 2)
+#define WINCON0_BPPMODE_4BPP                    (0x2 << 2)
+#define WINCON0_BPPMODE_8BPP_PALETTE            (0x3 << 2)
+#define WINCON0_BPPMODE_16BPP_565               (0x5 << 2)
+#define WINCON0_BPPMODE_16BPP_1555              (0x7 << 2)
+#define WINCON0_BPPMODE_18BPP_666               (0x8 << 2)
+#define WINCON0_BPPMODE_24BPP_888               (0xb << 2)
+
+#define WINCON1_BLD_PIX                         (1 << 6)
+
+#define WINCON1_ALPHA_SEL                       (1 << 1)
+#define WINCON1_BPPMODE_MASK                    (0xf << 2)
+#define WINCON1_BPPMODE_SHIFT                   (2)
+#define WINCON1_BPPMODE_1BPP                    (0x0 << 2)
+#define WINCON1_BPPMODE_2BPP                    (0x1 << 2)
+#define WINCON1_BPPMODE_4BPP                    (0x2 << 2)
+#define WINCON1_BPPMODE_8BPP_PALETTE            (0x3 << 2)
+#define WINCON1_BPPMODE_8BPP_1232               (0x4 << 2)
+#define WINCON1_BPPMODE_16BPP_565               (0x5 << 2)
+#define WINCON1_BPPMODE_16BPP_A1555             (0x6 << 2)
+#define WINCON1_BPPMODE_16BPP_I1555             (0x7 << 2)
+#define WINCON1_BPPMODE_18BPP_666               (0x8 << 2)
+#define WINCON1_BPPMODE_18BPP_A1665             (0x9 << 2)
+#define WINCON1_BPPMODE_19BPP_A1666             (0xa << 2)
+#define WINCON1_BPPMODE_24BPP_888               (0xb << 2)
+#define WINCON1_BPPMODE_24BPP_A1887             (0xc << 2)
+#define WINCON1_BPPMODE_25BPP_A1888             (0xd << 2)
+#define WINCON1_BPPMODE_28BPP_A4888             (0xd << 2)
+
+
+#define VIDOSDxA_TOPLEFT_X_MASK                 (0x7ff << 11)
+#define VIDOSDxA_TOPLEFT_X_SHIFT                (11)
+#define VIDOSDxA_TOPLEFT_X_LIMIT                (0x7ff)
+#define VIDOSDxA_TOPLEFT_X(_x)                  ((_x) << 11)
+
+#define VIDOSDxA_TOPLEFT_Y_MASK                 (0x7ff << 0)
+#define VIDOSDxA_TOPLEFT_Y_SHIFT                (0)
+#define VIDOSDxA_TOPLEFT_Y_LIMIT                (0x7ff)
+#define VIDOSDxA_TOPLEFT_Y(_x)                  ((_x) << 0)
+
+#define VIDOSDxB_BOTRIGHT_X_MASK                (0x7ff << 11)
+#define VIDOSDxB_BOTRIGHT_X_SHIFT               (11)
+#define VIDOSDxB_BOTRIGHT_X_LIMIT               (0x7ff)
+#define VIDOSDxB_BOTRIGHT_X(_x)                 ((_x) << 11)
+
+#define VIDOSDxB_BOTRIGHT_Y_MASK                (0x7ff << 0)
+#define VIDOSDxB_BOTRIGHT_Y_SHIFT               (0)
+#define VIDOSDxB_BOTRIGHT_Y_LIMIT               (0x7ff)
+#define VIDOSDxB_BOTRIGHT_Y(_x)                 ((_x) << 0)
+
+/* For VIDOSD[1..4]C */
+#define VIDISD14C_ALPHA0_R(_x)                  ((_x) << 20)
+#define VIDISD14C_ALPHA0_G_MASK                 (0xf << 16)
+#define VIDISD14C_ALPHA0_G_SHIFT                (16)
+#define VIDISD14C_ALPHA0_G_LIMIT                (0xf)
+#define VIDISD14C_ALPHA0_G(_x)                  ((_x) << 16)
+#define VIDISD14C_ALPHA0_B_MASK                 (0xf << 12)
+#define VIDISD14C_ALPHA0_B_SHIFT                (12)
+#define VIDISD14C_ALPHA0_B_LIMIT                (0xf)
+#define VIDISD14C_ALPHA0_B(_x)                  ((_x) << 12)
+#define VIDISD14C_ALPHA1_R_MASK                 (0xf << 8)
+#define VIDISD14C_ALPHA1_R_SHIFT                (8)
+#define VIDISD14C_ALPHA1_R_LIMIT                (0xf)
+#define VIDISD14C_ALPHA1_R(_x)                  ((_x) << 8)
+#define VIDISD14C_ALPHA1_G_MASK                 (0xf << 4)
+#define VIDISD14C_ALPHA1_G_SHIFT                (4)
+#define VIDISD14C_ALPHA1_G_LIMIT                (0xf)
+#define VIDISD14C_ALPHA1_G(_x)                  ((_x) << 4)
+#define VIDISD14C_ALPHA1_B_MASK                 (0xf << 0)
+#define VIDISD14C_ALPHA1_B_SHIFT                (0)
+#define VIDISD14C_ALPHA1_B_LIMIT                (0xf)
+#define VIDISD14C_ALPHA1_B(_x)                  ((_x) << 0)
+
+/* Video buffer addresses */
+#define VIDW_BUF_START(_buff)                   (0xA0 + ((_buff) * 8))
+#define VIDW_BUF_START1(_buff)                  (0xA4 + ((_buff) * 8))
+#define VIDW_BUF_END(_buff)                     (0xD0 + ((_buff) * 8))
+#define VIDW_BUF_END1(_buff)                    (0xD4 + ((_buff) * 8))
+#define VIDW_BUF_SIZE(_buff)                    (0x100 + ((_buff) * 4))
+
+#define VIDW_BUF_SIZE_OFFSET_MASK               (0x1fff << 13)
+#define VIDW_BUF_SIZE_OFFSET_SHIFT              (13)
+#define VIDW_BUF_SIZE_OFFSET_LIMIT              (0x1fff)
+#define VIDW_BUF_SIZE_OFFSET(_x)                ((_x) << 13)
+
+#define VIDW_BUF_SIZE_PAGEWIDTH_MASK            (0x1fff << 0)
+#define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT           (0)
+#define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT           (0x1fff)
+#define VIDW_BUF_SIZE_PAGEWIDTH(_x)             ((_x) << 0)
+
+/* Interrupt controls and status */
+
+#define VIDINTCON0_FIFOINTERVAL_MASK            (0x3f << 20)
+#define VIDINTCON0_FIFOINTERVAL_SHIFT           (20)
+#define VIDINTCON0_FIFOINTERVAL_LIMIT           (0x3f)
+#define VIDINTCON0_FIFOINTERVAL(_x)             ((_x) << 20)
+
+#define VIDINTCON0_INT_SYSMAINCON               (1 << 19)
+#define VIDINTCON0_INT_SYSSUBCON                (1 << 18)
+#define VIDINTCON0_INT_I80IFDONE                (1 << 17)
+
+#define VIDINTCON0_FRAMESEL0_MASK               (0x3 << 15)
+#define VIDINTCON0_FRAMESEL0_SHIFT              (15)
+#define VIDINTCON0_FRAMESEL0_BACKPORCH          (0x0 << 15)
+#define VIDINTCON0_FRAMESEL0_VSYNC              (0x1 << 15)
+#define VIDINTCON0_FRAMESEL0_ACTIVE             (0x2 << 15)
+#define VIDINTCON0_FRAMESEL0_FRONTPORCH         (0x3 << 15)
+
+#define VIDINTCON0_FRAMESEL1                    (1 << 14)
+#define VIDINTCON0_FRAMESEL1_NONE               (0x0 << 14)
+#define VIDINTCON0_FRAMESEL1_BACKPORCH          (0x1 << 14)
+#define VIDINTCON0_FRAMESEL1_VSYNC              (0x2 << 14)
+#define VIDINTCON0_FRAMESEL1_FRONTPORCH         (0x3 << 14)
+
+#define VIDINTCON0_INT_FRAME                    (1 << 12)
+#define VIDINTCON0_FIFIOSEL_MASK                (0x7f << 5)
+#define VIDINTCON0_FIFIOSEL_SHIFT               (5)
+#define VIDINTCON0_FIFIOSEL_WINDOW0             (0x1 << 5)
+#define VIDINTCON0_FIFIOSEL_WINDOW1             (0x2 << 5)
+
+#define VIDINTCON0_FIFOLEVEL_MASK               (0x7 << 2)
+#define VIDINTCON0_FIFOLEVEL_SHIFT              (2)
+#define VIDINTCON0_FIFOLEVEL_TO25PC             (0x0 << 2)
+#define VIDINTCON0_FIFOLEVEL_TO50PC             (0x1 << 2)
+#define VIDINTCON0_FIFOLEVEL_TO75PC             (0x2 << 2)
+#define VIDINTCON0_FIFOLEVEL_EMPTY              (0x3 << 2)
+#define VIDINTCON0_FIFOLEVEL_FULL               (0x4 << 2)
+
+#define VIDINTCON0_INT_FIFO_MASK                (0x3 << 0)
+#define VIDINTCON0_INT_FIFO_SHIFT               (0)
+#define VIDINTCON0_INT_ENABLE                   (1 << 0)
+
+#define VIDINTCON1                              (0x134)
+#define VIDINTCON1_INT_I180                     (1 << 2)
+#define VIDINTCON1_INT_FRAME                    (1 << 1)
+#define VIDINTCON1_INT_FIFO                     (1 << 0)
+
+/* Window colour-key control registers */
+
+#define WxKEYCON0_KEYBL_EN                      (1 << 26)
+#define WxKEYCON0_KEYEN_F                       (1 << 25)
+#define WxKEYCON0_DIRCON                        (1 << 24)
+#define WxKEYCON0_COMPKEY_MASK                  (0xffffff << 0)
+#define WxKEYCON0_COMPKEY_SHIFT                 (0)
+#define WxKEYCON0_COMPKEY_LIMIT                 (0xffffff)
+#define WxKEYCON0_COMPKEY(_x)                   ((_x) << 0)
+#define WxKEYCON1_COLVAL_MASK                   (0xffffff << 0)
+#define WxKEYCON1_COLVAL_SHIFT                  (0)
+#define WxKEYCON1_COLVAL_LIMIT                  (0xffffff)
+#define WxKEYCON1_COLVAL(_x)                    ((_x) << 0)
+
+
+/* Window blanking (MAP) */
+
+#define WINxMAP_MAP                             (1 << 24)
+#define WINxMAP_MAP_COLOUR_MASK                 (0xffffff << 0)
+#define WINxMAP_MAP_COLOUR_SHIFT                (0)
+#define WINxMAP_MAP_COLOUR_LIMIT                (0xffffff)
+#define WINxMAP_MAP_COLOUR(_x)                  ((_x) << 0)
+
+#define WPALCON_PAL_UPDATE                      (1 << 9)
+#define WPALCON_W1PAL_MASK                      (0x7 << 3)
+#define WPALCON_W1PAL_SHIFT                     (3)
+#define WPALCON_W1PAL_25BPP_A888                (0x0 << 3)
+#define WPALCON_W1PAL_24BPP                     (0x1 << 3)
+#define WPALCON_W1PAL_19BPP_A666                (0x2 << 3)
+#define WPALCON_W1PAL_18BPP_A665                (0x3 << 3)
+#define WPALCON_W1PAL_18BPP                     (0x4 << 3)
+#define WPALCON_W1PAL_16BPP_A555                (0x5 << 3)
+#define WPALCON_W1PAL_16BPP_565                 (0x6 << 3)
+
+#define WPALCON_W0PAL_MASK                      (0x7 << 0)
+#define WPALCON_W0PAL_SHIFT                     (0)
+#define WPALCON_W0PAL_25BPP_A888                (0x0 << 0)
+#define WPALCON_W0PAL_24BPP                     (0x1 << 0)
+#define WPALCON_W0PAL_19BPP_A666                (0x2 << 0)
+#define WPALCON_W0PAL_18BPP_A665                (0x3 << 0)
+#define WPALCON_W0PAL_18BPP                     (0x4 << 0)
+#define WPALCON_W0PAL_16BPP_A555                (0x5 << 0)
+#define WPALCON_W0PAL_16BPP_565                 (0x6 << 0)
+
diff --git a/arch/arm/plat-s3c/include/plat/regs-iic.h b/arch/arm/plat-s3c/include/plat/regs-iic.h
new file mode 100644
index 000000000000..2f7c17de8ac8
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-iic.h
@@ -0,0 +1,56 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-iic.h
+ *
+ * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
+ *              http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 I2C Controller
+*/
+
+#ifndef __ASM_ARCH_REGS_IIC_H
+#define __ASM_ARCH_REGS_IIC_H __FILE__
+
+/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */
+
+#define S3C2410_IICREG(x) (x)
+
+#define S3C2410_IICCON    S3C2410_IICREG(0x00)
+#define S3C2410_IICSTAT   S3C2410_IICREG(0x04)
+#define S3C2410_IICADD    S3C2410_IICREG(0x08)
+#define S3C2410_IICDS     S3C2410_IICREG(0x0C)
+#define S3C2440_IICLC     S3C2410_IICREG(0x10)
+
+#define S3C2410_IICCON_ACKEN            (1<<7)
+#define S3C2410_IICCON_TXDIV_16         (0<<6)
+#define S3C2410_IICCON_TXDIV_512        (1<<6)
+#define S3C2410_IICCON_IRQEN            (1<<5)
+#define S3C2410_IICCON_IRQPEND          (1<<4)
+#define S3C2410_IICCON_SCALE(x)         ((x)&15)
+#define S3C2410_IICCON_SCALEMASK        (0xf)
+
+#define S3C2410_IICSTAT_MASTER_RX       (2<<6)
+#define S3C2410_IICSTAT_MASTER_TX       (3<<6)
+#define S3C2410_IICSTAT_SLAVE_RX        (0<<6)
+#define S3C2410_IICSTAT_SLAVE_TX        (1<<6)
+#define S3C2410_IICSTAT_MODEMASK        (3<<6)
+
+#define S3C2410_IICSTAT_START           (1<<5)
+#define S3C2410_IICSTAT_BUSBUSY         (1<<5)
+#define S3C2410_IICSTAT_TXRXEN          (1<<4)
+#define S3C2410_IICSTAT_ARBITR          (1<<3)
+#define S3C2410_IICSTAT_ASSLAVE         (1<<2)
+#define S3C2410_IICSTAT_ADDR0           (1<<1)
+#define S3C2410_IICSTAT_LASTBIT         (1<<0)
+
+#define S3C2410_IICLC_SDA_DELAY0        (0 << 0)
+#define S3C2410_IICLC_SDA_DELAY5        (1 << 0)
+#define S3C2410_IICLC_SDA_DELAY10       (2 << 0)
+#define S3C2410_IICLC_SDA_DELAY15       (3 << 0)
+#define S3C2410_IICLC_SDA_DELAY_MASK    (3 << 0)
+
+#define S3C2410_IICLC_FILTER_ON         (1<<2)
+
+#endif /* __ASM_ARCH_REGS_IIC_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-irqtype.h b/arch/arm/plat-s3c/include/plat/regs-irqtype.h
new file mode 100644
index 000000000000..c63cd3fc5ad3
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-irqtype.h
@@ -0,0 +1,21 @@
+/* arch/arm/plat-s3c/include/plat/regs-irqtype.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C - IRQ detection types.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* values for S3C2410_EXTINT0/1/2 and other cpus in the series, including
+ * the S3C64XX
+*/
+#define S3C2410_EXTINT_LOWLEV    (0x00)
+#define S3C2410_EXTINT_HILEV     (0x01)
+#define S3C2410_EXTINT_FALLEDGE  (0x02)
+#define S3C2410_EXTINT_RISEEDGE  (0x04)
+#define S3C2410_EXTINT_BOTHEDGE  (0x06)
diff --git a/arch/arm/plat-s3c/include/plat/regs-nand.h b/arch/arm/plat-s3c/include/plat/regs-nand.h
new file mode 100644
index 000000000000..b2caa4bca270
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-nand.h
@@ -0,0 +1,123 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-nand.h
+ *
+ * Copyright (c) 2004,2005 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 NAND register definitions
+*/
+
+#ifndef __ASM_ARM_REGS_NAND
+#define __ASM_ARM_REGS_NAND
+
+
+#define S3C2410_NFREG(x) (x)
+
+#define S3C2410_NFCONF  S3C2410_NFREG(0x00)
+#define S3C2410_NFCMD   S3C2410_NFREG(0x04)
+#define S3C2410_NFADDR  S3C2410_NFREG(0x08)
+#define S3C2410_NFDATA  S3C2410_NFREG(0x0C)
+#define S3C2410_NFSTAT  S3C2410_NFREG(0x10)
+#define S3C2410_NFECC   S3C2410_NFREG(0x14)
+
+#define S3C2440_NFCONT   S3C2410_NFREG(0x04)
+#define S3C2440_NFCMD    S3C2410_NFREG(0x08)
+#define S3C2440_NFADDR   S3C2410_NFREG(0x0C)
+#define S3C2440_NFDATA   S3C2410_NFREG(0x10)
+#define S3C2440_NFECCD0  S3C2410_NFREG(0x14)
+#define S3C2440_NFECCD1  S3C2410_NFREG(0x18)
+#define S3C2440_NFECCD   S3C2410_NFREG(0x1C)
+#define S3C2440_NFSTAT   S3C2410_NFREG(0x20)
+#define S3C2440_NFESTAT0 S3C2410_NFREG(0x24)
+#define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
+#define S3C2440_NFMECC0  S3C2410_NFREG(0x2C)
+#define S3C2440_NFMECC1  S3C2410_NFREG(0x30)
+#define S3C2440_NFSECC   S3C2410_NFREG(0x34)
+#define S3C2440_NFSBLK   S3C2410_NFREG(0x38)
+#define S3C2440_NFEBLK   S3C2410_NFREG(0x3C)
+
+#define S3C2412_NFSBLK          S3C2410_NFREG(0x20)
+#define S3C2412_NFEBLK          S3C2410_NFREG(0x24)
+#define S3C2412_NFSTAT          S3C2410_NFREG(0x28)
+#define S3C2412_NFMECC_ERR0     S3C2410_NFREG(0x2C)
+#define S3C2412_NFMECC_ERR1     S3C2410_NFREG(0x30)
+#define S3C2412_NFMECC0         S3C2410_NFREG(0x34)
+#define S3C2412_NFMECC1         S3C2410_NFREG(0x38)
+#define S3C2412_NFSECC          S3C2410_NFREG(0x3C)
+
+#define S3C2410_NFCONF_EN          (1<<15)
+#define S3C2410_NFCONF_512BYTE     (1<<14)
+#define S3C2410_NFCONF_4STEP       (1<<13)
+#define S3C2410_NFCONF_INITECC     (1<<12)
+#define S3C2410_NFCONF_nFCE        (1<<11)
+#define S3C2410_NFCONF_TACLS(x)    ((x)<<8)
+#define S3C2410_NFCONF_TWRPH0(x)   ((x)<<4)
+#define S3C2410_NFCONF_TWRPH1(x)   ((x)<<0)
+
+#define S3C2410_NFSTAT_BUSY        (1<<0)
+
+#define S3C2440_NFCONF_BUSWIDTH_8       (0<<0)
+#define S3C2440_NFCONF_BUSWIDTH_16      (1<<0)
+#define S3C2440_NFCONF_ADVFLASH         (1<<3)
+#define S3C2440_NFCONF_TACLS(x)         ((x)<<12)
+#define S3C2440_NFCONF_TWRPH0(x)        ((x)<<8)
+#define S3C2440_NFCONF_TWRPH1(x)        ((x)<<4)
+
+#define S3C2440_NFCONT_LOCKTIGHT        (1<<13)
+#define S3C2440_NFCONT_SOFTLOCK         (1<<12)
+#define S3C2440_NFCONT_ILLEGALACC_EN    (1<<10)
+#define S3C2440_NFCONT_RNBINT_EN        (1<<9)
+#define S3C2440_NFCONT_RN_FALLING       (1<<8)
+#define S3C2440_NFCONT_SPARE_ECCLOCK    (1<<6)
+#define S3C2440_NFCONT_MAIN_ECCLOCK     (1<<5)
+#define S3C2440_NFCONT_INITECC          (1<<4)
+#define S3C2440_NFCONT_nFCE             (1<<1)
+#define S3C2440_NFCONT_ENABLE           (1<<0)
+
+#define S3C2440_NFSTAT_READY            (1<<0)
+#define S3C2440_NFSTAT_nCE              (1<<1)
+#define S3C2440_NFSTAT_RnB_CHANGE       (1<<2)
+#define S3C2440_NFSTAT_ILLEGAL_ACCESS   (1<<3)
+
+#define S3C2412_NFCONF_NANDBOOT         (1<<31)
+#define S3C2412_NFCONF_ECCCLKCON        (1<<30)
+#define S3C2412_NFCONF_ECC_MLC          (1<<24)
+#define S3C2412_NFCONF_TACLS_MASK       (7<<12) /* 1 extra bit of Tacls */
+
+#define S3C2412_NFCONT_ECC4_DIRWR       (1<<18)
+#define S3C2412_NFCONT_LOCKTIGHT        (1<<17)
+#define S3C2412_NFCONT_SOFTLOCK         (1<<16)
+#define S3C2412_NFCONT_ECC4_ENCINT      (1<<13)
+#define S3C2412_NFCONT_ECC4_DECINT      (1<<12)
+#define S3C2412_NFCONT_MAIN_ECC_LOCK    (1<<7)
+#define S3C2412_NFCONT_INIT_MAIN_ECC    (1<<5)
+#define S3C2412_NFCONT_nFCE1            (1<<2)
+#define S3C2412_NFCONT_nFCE0            (1<<1)
+
+#define S3C2412_NFSTAT_ECC_ENCDONE      (1<<7)
+#define S3C2412_NFSTAT_ECC_DECDONE      (1<<6)
+#define S3C2412_NFSTAT_ILLEGAL_ACCESS   (1<<5)
+#define S3C2412_NFSTAT_RnB_CHANGE       (1<<4)
+#define S3C2412_NFSTAT_nFCE1            (1<<3)
+#define S3C2412_NFSTAT_nFCE0            (1<<2)
+#define S3C2412_NFSTAT_Res1             (1<<1)
+#define S3C2412_NFSTAT_READY            (1<<0)
+
+#define S3C2412_NFECCERR_SERRDATA(x)    (((x) >> 21) & 0xf)
+#define S3C2412_NFECCERR_SERRBIT(x)     (((x) >> 18) & 0x7)
+#define S3C2412_NFECCERR_MERRDATA(x)    (((x) >> 7) & 0x3ff)
+#define S3C2412_NFECCERR_MERRBIT(x)     (((x) >> 4) & 0x7)
+#define S3C2412_NFECCERR_SPARE_ERR(x)   (((x) >> 2) & 0x3)
+#define S3C2412_NFECCERR_MAIN_ERR(x)    (((x) >> 2) & 0x3)
+#define S3C2412_NFECCERR_NONE           (0)
+#define S3C2412_NFECCERR_1BIT           (1)
+#define S3C2412_NFECCERR_MULTIBIT       (2)
+#define S3C2412_NFECCERR_ECCAREA        (3)
+
+
+
+#endif /* __ASM_ARM_REGS_NAND */
+
diff --git a/arch/arm/plat-s3c/include/plat/regs-rtc.h b/arch/arm/plat-s3c/include/plat/regs-rtc.h
new file mode 100644
index 000000000000..d5837cf8e402
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-rtc.h
@@ -0,0 +1,61 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-rtc.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 Internal RTC register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_RTC_H
+#define __ASM_ARCH_REGS_RTC_H __FILE__
+
+#define S3C2410_RTCREG(x) (x)
+
+#define S3C2410_RTCCON        S3C2410_RTCREG(0x40)
+#define S3C2410_RTCCON_RTCEN  (1<<0)
+#define S3C2410_RTCCON_CLKSEL (1<<1)
+#define S3C2410_RTCCON_CNTSEL (1<<2)
+#define S3C2410_RTCCON_CLKRST (1<<3)
+
+#define S3C2410_TICNT         S3C2410_RTCREG(0x44)
+#define S3C2410_TICNT_ENABLE  (1<<7)
+
+#define S3C2410_RTCALM        S3C2410_RTCREG(0x50)
+#define S3C2410_RTCALM_ALMEN  (1<<6)
+#define S3C2410_RTCALM_YEAREN (1<<5)
+#define S3C2410_RTCALM_MONEN  (1<<4)
+#define S3C2410_RTCALM_DAYEN  (1<<3)
+#define S3C2410_RTCALM_HOUREN (1<<2)
+#define S3C2410_RTCALM_MINEN  (1<<1)
+#define S3C2410_RTCALM_SECEN  (1<<0)
+
+#define S3C2410_RTCALM_ALL \
+  S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
+  S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
+  S3C2410_RTCALM_SECEN
+
+
+#define S3C2410_ALMSEC        S3C2410_RTCREG(0x54)
+#define S3C2410_ALMMIN        S3C2410_RTCREG(0x58)
+#define S3C2410_ALMHOUR       S3C2410_RTCREG(0x5c)
+
+#define S3C2410_ALMDATE       S3C2410_RTCREG(0x60)
+#define S3C2410_ALMMON        S3C2410_RTCREG(0x64)
+#define S3C2410_ALMYEAR       S3C2410_RTCREG(0x68)
+
+#define S3C2410_RTCRST        S3C2410_RTCREG(0x6c)
+
+#define S3C2410_RTCSEC        S3C2410_RTCREG(0x70)
+#define S3C2410_RTCMIN        S3C2410_RTCREG(0x74)
+#define S3C2410_RTCHOUR       S3C2410_RTCREG(0x78)
+#define S3C2410_RTCDATE       S3C2410_RTCREG(0x7c)
+#define S3C2410_RTCDAY        S3C2410_RTCREG(0x80)
+#define S3C2410_RTCMON        S3C2410_RTCREG(0x84)
+#define S3C2410_RTCYEAR       S3C2410_RTCREG(0x88)
+
+
+#endif /* __ASM_ARCH_REGS_RTC_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-sdhci.h b/arch/arm/plat-s3c/include/plat/regs-sdhci.h
new file mode 100644
index 000000000000..e34049ad44cc
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-sdhci.h
@@ -0,0 +1,87 @@
+/* linux/arch/arm/plat-s3c/include/plat/regs-sdhci.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C Platform - SDHCI (HSMMC) register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_S3C_SDHCI_REGS_H
+#define __PLAT_S3C_SDHCI_REGS_H __FILE__
+
+#define S3C_SDHCI_CONTROL2                      (0x80)
+#define S3C_SDHCI_CONTROL3                      (0x84)
+#define S3C64XX_SDHCI_CONTROL4                  (0x8C)
+
+#define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR       (1 << 31)
+#define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK         (1 << 30)
+#define S3C_SDHCI_CTRL2_CDINVRXD3               (1 << 29)
+#define S3C_SDHCI_CTRL2_SLCARDOUT               (1 << 28)
+
+#define S3C_SDHCI_CTRL2_FLTCLKSEL_MASK          (0xf << 24)
+#define S3C_SDHCI_CTRL2_FLTCLKSEL_SHIFT         (24)
+#define S3C_SDHCI_CTRL2_FLTCLKSEL(_x)           ((_x) << 24)
+
+#define S3C_SDHCI_CTRL2_LVLDAT_MASK             (0xff << 16)
+#define S3C_SDHCI_CTRL2_LVLDAT_SHIFT            (16)
+#define S3C_SDHCI_CTRL2_LVLDAT(_x)              ((_x) << 16)
+
+#define S3C_SDHCI_CTRL2_ENFBCLKTX               (1 << 15)
+#define S3C_SDHCI_CTRL2_ENFBCLKRX               (1 << 14)
+#define S3C_SDHCI_CTRL2_SDCDSEL                 (1 << 13)
+#define S3C_SDHCI_CTRL2_SDSIGPC                 (1 << 12)
+#define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART        (1 << 11)
+
+#define S3C_SDHCI_CTRL2_DFCNT_MASK              (0x3 << 9)
+#define S3C_SDHCI_CTRL2_DFCNT_SHIFT             (9)
+#define S3C_SDHCI_CTRL2_DFCNT_NONE              (0x0 << 9)
+#define S3C_SDHCI_CTRL2_DFCNT_4SDCLK            (0x1 << 9)
+#define S3C_SDHCI_CTRL2_DFCNT_16SDCLK           (0x2 << 9)
+#define S3C_SDHCI_CTRL2_DFCNT_64SDCLK           (0x3 << 9)
+
+#define S3C_SDHCI_CTRL2_ENCLKOUTHOLD            (1 << 8)
+#define S3C_SDHCI_CTRL2_RWAITMODE               (1 << 7)
+#define S3C_SDHCI_CTRL2_DISBUFRD                (1 << 6)
+#define S3C_SDHCI_CTRL2_SELBASECLK_MASK         (0x3 << 4)
+#define S3C_SDHCI_CTRL2_SELBASECLK_SHIFT        (4)
+#define S3C_SDHCI_CTRL2_PWRSYNC                 (1 << 3)
+#define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON          (1 << 1)
+#define S3C_SDHCI_CTRL2_HWINITFIN               (1 << 0)
+
+#define S3C_SDHCI_CTRL3_FCSEL3                  (1 << 31)
+#define S3C_SDHCI_CTRL3_FCSEL2                  (1 << 23)
+#define S3C_SDHCI_CTRL3_FCSEL1                  (1 << 15)
+#define S3C_SDHCI_CTRL3_FCSEL0                  (1 << 7)
+
+#define S3C_SDHCI_CTRL3_FIA3_MASK               (0x7f << 24)
+#define S3C_SDHCI_CTRL3_FIA3_SHIFT              (24)
+#define S3C_SDHCI_CTRL3_FIA3(_x)                ((_x) << 24)
+
+#define S3C_SDHCI_CTRL3_FIA2_MASK               (0x7f << 16)
+#define S3C_SDHCI_CTRL3_FIA2_SHIFT              (16)
+#define S3C_SDHCI_CTRL3_FIA2(_x)                ((_x) << 16)
+
+#define S3C_SDHCI_CTRL3_FIA1_MASK               (0x7f << 8)
+#define S3C_SDHCI_CTRL3_FIA1_SHIFT              (8)
+#define S3C_SDHCI_CTRL3_FIA1(_x)                ((_x) << 8)
+
+#define S3C_SDHCI_CTRL3_FIA0_MASK               (0x7f << 0)
+#define S3C_SDHCI_CTRL3_FIA0_SHIFT              (0)
+#define S3C_SDHCI_CTRL3_FIA0(_x)                ((_x) << 0)
+
+#define S3C64XX_SDHCI_CONTROL4_DRIVE_MASK       (0x3 << 16)
+#define S3C64XX_SDHCI_CONTROL4_DRIVE_SHIFT      (16)
+#define S3C64XX_SDHCI_CONTROL4_DRIVE_2mA        (0x0 << 16)
+#define S3C64XX_SDHCI_CONTROL4_DRIVE_4mA        (0x1 << 16)
+#define S3C64XX_SDHCI_CONTROL4_DRIVE_7mA        (0x2 << 16)
+#define S3C64XX_SDHCI_CONTROL4_DRIVE_9mA        (0x3 << 16)
+
+#define S3C64XX_SDHCI_CONTROL4_BUSY             (1)
+
+#endif /* __PLAT_S3C_SDHCI_REGS_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h
index a0daa647b92c..487d7d2a7e1d 100644
--- a/arch/arm/plat-s3c/include/plat/regs-serial.h
+++ b/arch/arm/plat-s3c/include/plat/regs-serial.h
@@ -77,6 +77,12 @@
 #define S3C2440_UCON_FCLK         (3<<10)
 #define S3C2443_UCON_EPLL         (3<<10)
 
+#define S3C6400_UCON_CLKMASK    (3<<10)
+#define S3C6400_UCON_PCLK       (0<<10)
+#define S3C6400_UCON_PCLK2      (2<<10)
+#define S3C6400_UCON_UCLK0      (1<<10)
+#define S3C6400_UCON_UCLK1      (3<<10)
+
 #define S3C2440_UCON2_FCLK_EN     (1<<15)
 #define S3C2440_UCON0_DIVMASK     (15 << 12)
 #define S3C2440_UCON1_DIVMASK     (15 << 12)
@@ -149,6 +155,14 @@
 #define S3C2410_UFSTAT_RXMASK     (15<<0)
 #define S3C2410_UFSTAT_RXSHIFT    (0)
 
+/* UFSTAT S3C24A0 */
+#define S3C24A0_UFSTAT_TXFULL     (1 << 14)
+#define S3C24A0_UFSTAT_RXFULL     (1 << 6)
+#define S3C24A0_UFSTAT_TXMASK     (63 << 8)
+#define S3C24A0_UFSTAT_TXSHIFT    (8)
+#define S3C24A0_UFSTAT_RXMASK     (63)
+#define S3C24A0_UFSTAT_RXSHIFT    (0)
+
 /* UFSTAT S3C2443 same as S3C2440 */
 #define S3C2440_UFSTAT_TXFULL     (1<<14)
 #define S3C2440_UFSTAT_RXFULL     (1<<6)
@@ -224,7 +238,7 @@ struct s3c2410_uartcfg {
  * or platform_add_device() before the console_initcall()
 */
 
-extern struct platform_device *s3c24xx_uart_devs[3];
+extern struct platform_device *s3c24xx_uart_devs[4];
 
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/arm/plat-s3c/include/plat/regs-timer.h b/arch/arm/plat-s3c/include/plat/regs-timer.h
index cc0eedd53e38..d097d92f8cc7 100644
--- a/arch/arm/plat-s3c/include/plat/regs-timer.h
+++ b/arch/arm/plat-s3c/include/plat/regs-timer.h
@@ -10,7 +10,6 @@
  * S3C2410 Timer configuration
 */
 
-
 #ifndef __ASM_ARCH_REGS_TIMER_H
 #define __ASM_ARCH_REGS_TIMER_H
 
@@ -21,6 +20,8 @@
 #define S3C2410_TCFG1         S3C_TIMERREG(0x04)
 #define S3C2410_TCON          S3C_TIMERREG(0x08)
 
+#define S3C64XX_TINT_CSTAT    S3C_TIMERREG(0x44)
+
 #define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
 #define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
 #define S3C2410_TCFG_PRESCALER1_SHIFT (8)
@@ -72,6 +73,14 @@
 #define S3C2410_TCFG1_MUX_TCLK    (4<<0)
 #define S3C2410_TCFG1_MUX_MASK    (15<<0)
 
+#define S3C64XX_TCFG1_MUX_DIV1    (0<<0)
+#define S3C64XX_TCFG1_MUX_DIV2    (1<<0)
+#define S3C64XX_TCFG1_MUX_DIV4    (2<<0)
+#define S3C64XX_TCFG1_MUX_DIV8    (3<<0)
+#define S3C64XX_TCFG1_MUX_DIV16   (4<<0)
+#define S3C64XX_TCFG1_MUX_TCLK    (5<<0)  /* 3 sets of TCLK */
+#define S3C64XX_TCFG1_MUX_MASK    (15<<0)
+
 #define S3C2410_TCFG1_SHIFT(x)    ((x) * 4)
 
 /* for each timer, we have an count buffer, an compare buffer and
diff --git a/arch/arm/plat-s3c/include/plat/regs-watchdog.h b/arch/arm/plat-s3c/include/plat/regs-watchdog.h
new file mode 100644
index 000000000000..4938492470f7
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-watchdog.h
@@ -0,0 +1,41 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-watchdog.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 Watchdog timer control
+*/
+
+
+#ifndef __ASM_ARCH_REGS_WATCHDOG_H
+#define __ASM_ARCH_REGS_WATCHDOG_H
+
+#define S3C_WDOGREG(x) ((x) + S3C_VA_WATCHDOG)
+
+#define S3C2410_WTCON      S3C_WDOGREG(0x00)
+#define S3C2410_WTDAT      S3C_WDOGREG(0x04)
+#define S3C2410_WTCNT      S3C_WDOGREG(0x08)
+
+/* the watchdog can either generate a reset pulse, or an
+ * interrupt.
+ */
+
+#define S3C2410_WTCON_RSTEN   (0x01)
+#define S3C2410_WTCON_INTEN   (1<<2)
+#define S3C2410_WTCON_ENABLE  (1<<5)
+
+#define S3C2410_WTCON_DIV16   (0<<3)
+#define S3C2410_WTCON_DIV32   (1<<3)
+#define S3C2410_WTCON_DIV64   (2<<3)
+#define S3C2410_WTCON_DIV128  (3<<3)
+
+#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
+#define S3C2410_WTCON_PRESCALE_MASK (0xff00)
+
+#endif /* __ASM_ARCH_REGS_WATCHDOG_H */
+
+
diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-s3c/include/plat/sdhci.h
new file mode 100644
index 000000000000..c4ca3920ca4b
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/sdhci.h
@@ -0,0 +1,108 @@
+/* linux/arch/arm/plat-s3c/include/plat/sdhci.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C Platform - SDHCI (HSMMC) platform data definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_S3C_SDHCI_H
+#define __PLAT_S3C_SDHCI_H __FILE__
+
+struct platform_device;
+struct mmc_host;
+struct mmc_card;
+struct mmc_ios;
+
+/**
+ * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
+ * @max_width: The maximum number of data bits supported.
+ * @host_caps: Standard MMC host capabilities bit field.
+ * @cfg_gpio: Configure the GPIO for a specific card bit-width
+ * @cfg_card: Configure the interface for a specific card and speed. This
+ *            is necessary the controllers and/or GPIO blocks require the
+ *            changing of driver-strength and other controls dependant on
+ *            the card and speed of operation.
+ *
+ * Initialisation data specific to either the machine or the platform
+ * for the device driver to use or call-back when configuring gpio or
+ * card speed information.
+*/
+struct s3c_sdhci_platdata {
+        unsigned int    max_width;
+        unsigned int    host_caps;
+
+        char            **clocks;       /* set of clock sources */
+
+        void    (*cfg_gpio)(struct platform_device *dev, int width);
+        void    (*cfg_card)(struct platform_device *dev,
+                            void __iomem *regbase,
+                            struct mmc_ios *ios,
+                            struct mmc_card *card);
+};
+
+/**
+ * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device.
+ * @pd: Platform data to register to device.
+ *
+ * Register the given platform data for use withe S3C SDHCI device.
+ * The call will copy the platform data, so the board definitions can
+ * make the structure itself __initdata.
+ */
+extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
+extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
+
+/* Default platform data, exported so that per-cpu initialisation can
+ * set the correct one when there are more than one cpu type selected.
+*/
+
+extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
+extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
+
+/* Helper function availablity */
+
+#ifdef CONFIG_S3C6410_SETUP_SDHCI
+extern char *s3c6410_hsmmc_clksrcs[4];
+
+extern void s3c6410_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
+extern void s3c6410_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
+
+extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
+                                           void __iomem *r,
+                                           struct mmc_ios *ios,
+                                           struct mmc_card *card);
+
+#ifdef CONFIG_S3C_DEV_HSMMC
+static inline void s3c6410_default_sdhci0(void)
+{
+        s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
+        s3c_hsmmc0_def_platdata.cfg_gpio = s3c6410_setup_sdhci0_cfg_gpio;
+        s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
+}
+#else
+static inline void s3c6410_default_sdhci0(void) { }
+#endif /* CONFIG_S3C_DEV_HSMMC */
+
+#ifdef CONFIG_S3C_DEV_HSMMC1
+static inline void s3c6410_default_sdhci1(void)
+{
+        s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
+        s3c_hsmmc1_def_platdata.cfg_gpio = s3c6410_setup_sdhci1_cfg_gpio;
+        s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
+}
+#else
+static inline void s3c6410_default_sdhci1(void) { }
+#endif /* CONFIG_S3C_DEV_HSMMC1 */
+
+#else
+static inline void s3c6410_default_sdhci0(void) { }
+static inline void s3c6410_default_sdhci1(void) { }
+#endif /* CONFIG_S3C6410_SETUP_SDHCI */
+
+#endif /* __PLAT_S3C_SDHCI_H */
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h
index 4df006b9cc10..6061de87f225 100644
--- a/arch/arm/plat-s3c/include/plat/uncompress.h
+++ b/arch/arm/plat-s3c/include/plat/uncompress.h
@@ -28,7 +28,7 @@ static void arch_detect_cpu(void);
 /* defines for UART registers */
 
 #include <plat/regs-serial.h>
-#include <asm/plat-s3c/regs-watchdog.h>
+#include <plat/regs-watchdog.h>
 
 /* working in physical space... */
 #undef S3C2410_WDOGREG
@@ -37,7 +37,7 @@ static void arch_detect_cpu(void);
 /* how many bytes we allow into the FIFO at a time in FIFO mode */
 #define FIFO_MAX         (14)
 
-#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C_LOWLEVEL_UART_PORT)
+#define uart_base S3C_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT)
 
 static __inline__ void
 uart_wr(unsigned int reg, unsigned int val)
@@ -139,6 +139,28 @@ static void arch_decomp_error(const char *x)
 
 static void error(char *err);
 
+#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
+static inline void arch_enable_uart_fifo(void)
+{
+        u32 fifocon = uart_rd(S3C2410_UFCON);
+
+        if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
+                fifocon |= S3C2410_UFCON_RESETBOTH;
+                uart_wr(S3C2410_UFCON, fifocon);
+
+                /* wait for fifo reset to complete */
+                while (1) {
+                        fifocon = uart_rd(S3C2410_UFCON);
+                        if (!(fifocon & S3C2410_UFCON_RESETBOTH))
+                                break;
+                }
+        }
+}
+#else
+#define arch_enable_uart_fifo() do { } while(0)
+#endif
+
+
 static void
 arch_decomp_setup(void)
 {
@@ -149,6 +171,12 @@ arch_decomp_setup(void)
 
         arch_detect_cpu();
         arch_decomp_wdog_start();
+
+        /* Enable the UART FIFOs if they where not enabled and our
+         * configuration says we should turn them on.
+         */
+
+        arch_enable_uart_fifo();
 }
 
 
diff --git a/arch/arm/plat-s3c/init.c b/arch/arm/plat-s3c/init.c
new file mode 100644
index 000000000000..6790edfaca6f
--- /dev/null
+++ b/arch/arm/plat-s3c/init.c
@@ -0,0 +1,160 @@
+/* linux/arch/arm/plat-s3c/init.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C series CPU initialisation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#include <mach/hardware.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+
+#include <plat/regs-serial.h>
+
+static struct cpu_table *cpu;
+
+static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode,
+                                                struct cpu_table *tab,
+                                                unsigned int count)
+{
+        for (; count != 0; count--, tab++) {
+                if ((idcode & tab->idmask) == tab->idcode)
+                        return tab;
+        }
+
+        return NULL;
+}
+
+void __init s3c_init_cpu(unsigned long idcode,
+                         struct cpu_table *cputab, unsigned int cputab_size)
+{
+        cpu = s3c_lookup_cpu(idcode, cputab, cputab_size);
+
+        if (cpu == NULL) {
+                printk(KERN_ERR "Unknown CPU type 0x%08lx\n", idcode);
+                panic("Unknown S3C24XX CPU");
+        }
+
+        printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
+
+        if (cpu->map_io == NULL || cpu->init == NULL) {
+                printk(KERN_ERR "CPU %s support not enabled\n", cpu->name);
+                panic("Unsupported Samsung CPU");
+        }
+
+        cpu->map_io();
+}
+
+/* s3c24xx_init_clocks
+ *
+ * Initialise the clock subsystem and associated information from the
+ * given master crystal value.
+ *
+ * xtal  = 0 -> use default PLL crystal value (normally 12MHz)
+ *      != 0 -> PLL crystal value in Hz
+*/
+
+void __init s3c24xx_init_clocks(int xtal)
+{
+        if (xtal == 0)
+                xtal = 12*1000*1000;
+
+        if (cpu == NULL)
+                panic("s3c24xx_init_clocks: no cpu setup?\n");
+
+        if (cpu->init_clocks == NULL)
+                panic("s3c24xx_init_clocks: cpu has no clock init\n");
+        else
+                (cpu->init_clocks)(xtal);
+}
+
+/* uart management */
+
+static int nr_uarts __initdata = 0;
+
+static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
+
+/* s3c24xx_init_uartdevs
+ *
+ * copy the specified platform data and configuration into our central
+ * set of devices, before the data is thrown away after the init process.
+ *
+ * This also fills in the array passed to the serial driver for the
+ * early initialisation of the console.
+*/
+
+void __init s3c24xx_init_uartdevs(char *name,
+                                  struct s3c24xx_uart_resources *res,
+                                  struct s3c2410_uartcfg *cfg, int no)
+{
+        struct platform_device *platdev;
+        struct s3c2410_uartcfg *cfgptr = uart_cfgs;
+        struct s3c24xx_uart_resources *resp;
+        int uart;
+
+        memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no);
+
+        for (uart = 0; uart < no; uart++, cfg++, cfgptr++) {
+                platdev = s3c24xx_uart_src[cfgptr->hwport];
+
+                resp = res + cfgptr->hwport;
+
+                s3c24xx_uart_devs[uart] = platdev;
+
+                platdev->name = name;
+                platdev->resource = resp->resources;
+                platdev->num_resources = resp->nr_resources;
+
+                platdev->dev.platform_data = cfgptr;
+        }
+
+        nr_uarts = no;
+}
+
+void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        if (cpu == NULL)
+                return;
+
+        if (cpu->init_uarts == NULL) {
+                printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n");
+        } else
+                (cpu->init_uarts)(cfg, no);
+}
+
+static int __init s3c_arch_init(void)
+{
+        int ret;
+
+        // do the correct init for cpu
+
+        if (cpu == NULL)
+                panic("s3c_arch_init: NULL cpu\n");
+
+        ret = (cpu->init)();
+        if (ret != 0)
+                return ret;
+
+        ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts);
+        return ret;
+}
+
+arch_initcall(s3c_arch_init);
diff --git a/arch/arm/plat-s3c24xx/pwm-clock.c b/arch/arm/plat-s3c/pwm-clock.c
index 3fad68a1e6bc..a318215ab535 100644
--- a/arch/arm/plat-s3c24xx/pwm-clock.c
+++ b/arch/arm/plat-s3c/pwm-clock.c
@@ -14,20 +14,20 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/errno.h>
+#include <linux/log2.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
+#include <mach/map.h>
 #include <asm/irq.h>
 
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-
 #include <plat/clock.h>
 #include <plat/cpu.h>
 
 #include <plat/regs-timer.h>
+#include <mach/pwm-clock.h>
 
 /* Each of the timers 0 through 5 go through the following
  * clock tree, with the inputs depending on the timers.
@@ -73,11 +73,13 @@
  * tclk -------------------------/
 */
 
-static unsigned long clk_pwm_scaler_getrate(struct clk *clk)
+static struct clk clk_timer_scaler[];
+
+static unsigned long clk_pwm_scaler_get_rate(struct clk *clk)
 {
         unsigned long tcfg0 = __raw_readl(S3C2410_TCFG0);
 
-        if (clk->id == 1) {
+        if (clk == &clk_timer_scaler[1]) {
                 tcfg0 &= S3C2410_TCFG_PRESCALER1_MASK;
                 tcfg0 >>= S3C2410_TCFG_PRESCALER1_SHIFT;
         } else {
@@ -87,18 +89,61 @@ static unsigned long clk_pwm_scaler_getrate(struct clk *clk)
         return clk_get_rate(clk->parent) / (tcfg0 + 1);
 }
 
-/* TODO - add set rate calls. */
+static unsigned long clk_pwm_scaler_round_rate(struct clk *clk,
+                                               unsigned long rate)
+{
+        unsigned long parent_rate = clk_get_rate(clk->parent);
+        unsigned long divisor = parent_rate / rate;
+
+        if (divisor > 256)
+                divisor = 256;
+        else if (divisor < 2)
+                divisor = 2;
+
+        return parent_rate / divisor;
+}
+
+static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long round = clk_pwm_scaler_round_rate(clk, rate);
+        unsigned long tcfg0;
+        unsigned long divisor;
+        unsigned long flags;
+
+        divisor = clk_get_rate(clk->parent) / round;
+        divisor--;
+
+        local_irq_save(flags);
+        tcfg0 = __raw_readl(S3C2410_TCFG0);
+
+        if (clk == &clk_timer_scaler[1]) {
+                tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
+                tcfg0 |= divisor << S3C2410_TCFG_PRESCALER1_SHIFT;
+        } else {
+                tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
+                tcfg0 |= divisor;
+        }
+
+        __raw_writel(tcfg0, S3C2410_TCFG0);
+        local_irq_restore(flags);
+
+        return 0;
+}
 
 static struct clk clk_timer_scaler[] = {
         [0]     = {
                 .name           = "pwm-scaler0",
                 .id             = -1,
-                .get_rate       = clk_pwm_scaler_getrate,
+                .get_rate       = clk_pwm_scaler_get_rate,
+                .set_rate       = clk_pwm_scaler_set_rate,
+                .round_rate     = clk_pwm_scaler_round_rate,
         },
         [1]     = {
                 .name           = "pwm-scaler1",
                 .id             = -1,
-                .get_rate       = clk_pwm_scaler_getrate,
+                .get_rate       = clk_pwm_scaler_get_rate,
+                .set_rate       = clk_pwm_scaler_set_rate,
+                .round_rate     = clk_pwm_scaler_round_rate,
         },
 };
 
@@ -123,11 +168,6 @@ static inline struct pwm_tdiv_clk *to_tdiv(struct clk *clk)
         return container_of(clk, struct pwm_tdiv_clk, clk);
 }
 
-static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
-{
-        return 1 << (1 + tcfg1);
-}
-
 static unsigned long clk_pwm_tdiv_get_rate(struct clk *clk)
 {
         unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
@@ -136,7 +176,7 @@ static unsigned long clk_pwm_tdiv_get_rate(struct clk *clk)
         tcfg1 >>= S3C2410_TCFG1_SHIFT(clk->id);
         tcfg1 &= S3C2410_TCFG1_MUX_MASK;
 
-        if (tcfg1 == S3C2410_TCFG1_MUX_TCLK)
+        if (pwm_cfg_src_is_tclk(tcfg1))
                 divisor = to_tdiv(clk)->divisor;
         else
                 divisor = tcfg_to_divisor(tcfg1);
@@ -153,7 +193,9 @@ static unsigned long clk_pwm_tdiv_round_rate(struct clk *clk,
         parent_rate = clk_get_rate(clk->parent);
         divisor = parent_rate / rate;
 
-        if (divisor <= 2)
+        if (divisor <= 1 && pwm_tdiv_has_div1())
+                divisor = 1;
+        else if (divisor <= 2)
                 divisor = 2;
         else if (divisor <= 4)
                 divisor = 4;
@@ -167,25 +209,7 @@ static unsigned long clk_pwm_tdiv_round_rate(struct clk *clk,
 
 static unsigned long clk_pwm_tdiv_bits(struct pwm_tdiv_clk *divclk)
 {
-        unsigned long bits;
-
-        switch (divclk->divisor) {
-        case 2:
-                bits = S3C2410_TCFG1_MUX_DIV2;
-                break;
-        case 4:
-                bits = S3C2410_TCFG1_MUX_DIV4;
-                break;
-        case 8:
-                bits = S3C2410_TCFG1_MUX_DIV8;
-                break;
-        case 16:
-        default:
-                bits = S3C2410_TCFG1_MUX_DIV16;
-                break;
-        }
-
-        return bits;
+        return pwm_tdiv_div_bits(divclk->divisor);
 }
 
 static void clk_pwm_tdiv_update(struct pwm_tdiv_clk *divclk)
@@ -226,7 +250,7 @@ static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
         /* Update the current MUX settings if we are currently
          * selected as the clock source for this clock. */
 
-        if (tcfg1 != S3C2410_TCFG1_MUX_TCLK)
+        if (!pwm_cfg_src_is_tclk(tcfg1))
                 clk_pwm_tdiv_update(divclk);
 
         return 0;
@@ -313,7 +337,7 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
         unsigned long shift = S3C2410_TCFG1_SHIFT(id);
 
         if (parent == s3c24xx_pwmclk_tclk(id))
-                bits = S3C2410_TCFG1_MUX_TCLK << shift;
+                bits = S3C_TCFG1_MUX_TCLK << shift;
         else if (parent == s3c24xx_pwmclk_tdiv(id))
                 bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift;
         else
@@ -375,7 +399,7 @@ static __init int clk_pwm_tin_register(struct clk *pwm)
         tcfg1 >>= S3C2410_TCFG1_SHIFT(id);
         tcfg1 &= S3C2410_TCFG1_MUX_MASK;
 
-        if (tcfg1 == S3C2410_TCFG1_MUX_TCLK)
+        if (pwm_cfg_src_is_tclk(tcfg1))
                 parent = s3c24xx_pwmclk_tclk(id);
         else
                 parent = s3c24xx_pwmclk_tdiv(id);
@@ -383,7 +407,16 @@ static __init int clk_pwm_tin_register(struct clk *pwm)
         return clk_set_parent(pwm, parent);
 }
 
-static __init int s3c24xx_pwmclk_init(void)
+/**
+ * s3c_pwmclk_init() - initialise pwm clocks
+ *
+ * Initialise and register the clocks which provide the inputs for the
+ * pwm timer blocks.
+ *
+ * Note, this call is required by the time core, so must be called after
+ * the base clocks are added and before any of the initcalls are run.
+ */
+__init void s3c_pwmclk_init(void)
 {
         struct clk *clk_timers;
         unsigned int clk;
@@ -392,7 +425,7 @@ static __init int s3c24xx_pwmclk_init(void)
         clk_timers = clk_get(NULL, "timers");
         if (IS_ERR(clk_timers)) {
                 printk(KERN_ERR "%s: no parent clock\n", __func__);
-                return -EINVAL;
+                return;
         }
 
         for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++) {
@@ -400,7 +433,7 @@ static __init int s3c24xx_pwmclk_init(void)
                 ret = s3c24xx_register_clock(&clk_timer_scaler[clk]);
                 if (ret < 0) {
                         printk(KERN_ERR "error adding pwm scaler%d clock\n", clk);
-                        goto err;
+                        return;
                 }
         }
 
@@ -408,7 +441,7 @@ static __init int s3c24xx_pwmclk_init(void)
                 ret = s3c24xx_register_clock(&clk_timer_tclk[clk]);
                 if (ret < 0) {
                         printk(KERN_ERR "error adding pww tclk%d\n", clk);
-                        goto err;
+                        return;
                 }
         }
 
@@ -416,7 +449,7 @@ static __init int s3c24xx_pwmclk_init(void)
                 ret = clk_pwm_tdiv_register(clk);
                 if (ret < 0) {
                         printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
-                        goto err;
+                        return;
                 }
         }
 
@@ -424,14 +457,7 @@ static __init int s3c24xx_pwmclk_init(void)
                 ret = clk_pwm_tin_register(&clk_tin[clk]);
                 if (ret < 0) {
                         printk(KERN_ERR "error adding pwm%d tin clock\n", clk);
-                        goto err;
+                        return;
                 }
         }
-
-        return 0;
-
- err:
-        return ret;
 }
-
-arch_initcall(s3c24xx_pwmclk_init);
diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c/time.c
index c51916236ac0..3b27b29da478 100644
--- a/arch/arm/plat-s3c24xx/time.c
+++ b/arch/arm/plat-s3c/time.c
@@ -26,6 +26,7 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 
 #include <asm/system.h>
 #include <asm/leds.h>
@@ -36,6 +37,7 @@
 #include <plat/regs-timer.h>
 #include <mach/regs-irq.h>
 #include <asm/mach/time.h>
+#include <mach/tick.h>
 
 #include <plat/clock.h>
 #include <plat/cpu.h>
@@ -43,6 +45,10 @@
 static unsigned long timer_startval;
 static unsigned long timer_usec_ticks;
 
+#ifndef TICK_MAX
+#define TICK_MAX (0xffff)
+#endif
+
 #define TIMER_USEC_SHIFT 16
 
 /* we use the shifted arithmetic to work out the ratio of timer ticks
@@ -91,23 +97,19 @@ static inline unsigned long timer_ticks_to_usec(unsigned long ticks)
  * IRQs are disabled before entering here from do_gettimeofday()
  */
 
-#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0))
-
 static unsigned long s3c2410_gettimeoffset (void)
 {
         unsigned long tdone;
-        unsigned long irqpend;
         unsigned long tval;
 
         /* work out how many ticks have gone since last timer interrupt */
 
-        tval =  __raw_readl(S3C2410_TCNTO(4));
+        tval =  __raw_readl(S3C2410_TCNTO(4));
         tdone = timer_startval - tval;
 
         /* check to see if there is an interrupt pending */
 
-        irqpend = __raw_readl(S3C2410_SRCPND);
-        if (irqpend & SRCPND_TIMER4) {
+        if (s3c24xx_ostimer_pending()) {
                 /* re-read the timer, and try and fix up for the missed
                  * interrupt. Note, the interrupt may go off before the
                  * timer has re-loaded from wrapping.
@@ -144,7 +146,11 @@ static struct irqaction s3c2410_timer_irq = {
         machine_is_bast()       || \
         machine_is_vr1000()     || \
         machine_is_anubis()     || \
-        machine_is_osiris() )
+        machine_is_osiris())
+
+static struct clk *tin;
+static struct clk *tdiv;
+static struct clk *timerclk;
 
 /*
  * Set up timer interrupt, and return the current time in seconds.
@@ -159,13 +165,7 @@ static void s3c2410_timer_setup (void)
         unsigned long tcfg1;
         unsigned long tcfg0;
 
-        tcnt = 0xffff;  /* default value for tcnt */
-
-        /* read the current timer configuration bits */
-
-        tcon = __raw_readl(S3C2410_TCON);
-        tcfg1 = __raw_readl(S3C2410_TCFG1);
-        tcfg0 = __raw_readl(S3C2410_TCFG0);
+        tcnt = TICK_MAX;  /* default value for tcnt */
 
         /* configure the system for whichever machine is in use */
 
@@ -174,11 +174,13 @@ static void s3c2410_timer_setup (void)
                 timer_usec_ticks = timer_mask_usec_ticks(1, 12000000);
                 tcnt = 12000000 / HZ;
 
+                tcfg1 = __raw_readl(S3C2410_TCFG1);
                 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
                 tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
+                __raw_writel(tcfg1, S3C2410_TCFG1);
         } else {
                 unsigned long pclk;
-                struct clk *clk;
+                struct clk *tscaler;
 
                 /* for the h1940 (and others), we use the pclk from the core
                  * to generate the timer values. since values around 50 to
@@ -189,38 +191,34 @@ static void s3c2410_timer_setup (void)
                  * (8.45 ticks per usec)
                  */
 
-                /* this is used as default if no other timer can be found */
-
-                clk = clk_get(NULL, "timers");
-                if (IS_ERR(clk))
-                        panic("failed to get clock for system timer");
-
-                clk_enable(clk);
-
-                pclk = clk_get_rate(clk);
+                pclk = clk_get_rate(timerclk);
 
                 /* configure clock tick */
 
                 timer_usec_ticks = timer_mask_usec_ticks(6, pclk);
 
-                tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
-                tcfg1 |= S3C2410_TCFG1_MUX4_DIV2;
+                tscaler = clk_get_parent(tdiv);
 
-                tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
-                tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT;
+                clk_set_rate(tscaler, pclk / 3);
+                clk_set_rate(tdiv, pclk / 6);
+                clk_set_parent(tin, tdiv);
 
-                tcnt = (pclk / 6) / HZ;
+                tcnt = clk_get_rate(tin) / HZ;
         }
 
+        tcon = __raw_readl(S3C2410_TCON);
+        tcfg0 = __raw_readl(S3C2410_TCFG0);
+        tcfg1 = __raw_readl(S3C2410_TCFG1);
+
         /* timers reload after counting zero, so reduce the count by 1 */
 
         tcnt--;
 
-        printk("timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n",
+        printk(KERN_DEBUG "timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n",
                tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks);
 
         /* check to see if timer is within 16bit range... */
-        if (tcnt > 0xffff) {
+        if (tcnt > TICK_MAX) {
                 panic("setup_timer: HZ is too small, cannot configure timer!");
                 return;
         }
@@ -247,8 +245,35 @@ static void s3c2410_timer_setup (void)
         __raw_writel(tcon, S3C2410_TCON);
 }
 
-static void __init s3c2410_timer_init (void)
+static void __init s3c2410_timer_resources(void)
+{
+        struct platform_device tmpdev;
+
+        tmpdev.dev.bus = &platform_bus_type;
+        tmpdev.id = 4;
+
+        timerclk = clk_get(NULL, "timers");
+        if (IS_ERR(timerclk))
+                panic("failed to get clock for system timer");
+
+        clk_enable(timerclk);
+
+        if (!use_tclk1_12()) {
+                tin = clk_get(&tmpdev.dev, "pwm-tin");
+                if (IS_ERR(tin))
+                        panic("failed to get pwm-tin clock for system timer");
+
+                tdiv = clk_get(&tmpdev.dev, "pwm-tdiv");
+                if (IS_ERR(tdiv))
+                        panic("failed to get pwm-tdiv clock for system timer");
+        }
+
+        clk_enable(tin);
+}
+
+static void __init s3c2410_timer_init(void)
 {
+        s3c2410_timer_resources();
         s3c2410_timer_setup();
         setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
 }
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 0af3872fb763..2c8a2f5d75ff 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -6,8 +6,8 @@
 
 config PLAT_S3C24XX
         bool
-        depends on ARCH_S3C2410
-        default y if ARCH_S3C2410
+        depends on ARCH_S3C2410 || ARCH_S3C24A0
+        default y
         select NO_IOPORT
         select ARCH_REQUIRE_GPIOLIB
         help
@@ -15,6 +15,19 @@ config PLAT_S3C24XX
 
 if PLAT_S3C24XX
 
+# code that is shared between a number of the s3c24xx implementations
+
+config S3C2410_CLOCK
+        bool
+        help
+          Clock code for the S3C2410, and similar processors which
+          is currently includes the S3C2410, S3C2440, S3C2442.
+
+config S3C24XX_DCLK
+        bool
+        help
+          Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
+
 config CPU_S3C244X
         bool
         depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
@@ -28,6 +41,27 @@ config S3C24XX_PWM
           Support for exporting the PWM timer blocks via the pwm device
           system.
 
+
+# gpio configurations
+
+config S3C24XX_GPIO_EXTRA
+        int
+        default 128 if S3C24XX_GPIO_EXTRA128
+        default 64 if S3C24XX_GPIO_EXTRA64
+        default 0
+
+config S3C24XX_GPIO_EXTRA64
+        bool
+        help
+          Add an extra 64 gpio numbers to the available GPIO pool. This is
+          available for boards that need extra gpios for external devices.
+
+config S3C24XX_GPIO_EXTRA128
+        bool
+        help
+          Add an extra 128 gpio numbers to the available GPIO pool. This is
+          available for boards that need extra gpios for external devices.
+
 config PM_SIMTEC
         bool
         help
@@ -49,6 +83,29 @@ config S3C2410_DMA_DEBUG
           Enable debugging output for the DMA code. This option sends info
           to the kernel log, at priority KERN_DEBUG.
 
+config S3C24XX_ADC
+        bool "ADC common driver support"
+        help
+          Core support for the ADC block found in the S3C24XX SoC systems
+          for drivers such as the touchscreen and hwmon to use to share
+          this resource.
+
+# SPI default pin configuration code
+
+config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
+        bool
+        help
+          SPI GPIO configuration code for BUS0 when connected to
+          GPE11, GPE12 and GPE13.
+
+config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7
+        bool
+        help
+          SPI GPIO configuration code for BUS 1 when connected to
+          GPG5, GPG6 and GPG7.
+
+# common code for s3c24xx based machines, such as the SMDKs.
+
 config MACH_SMDK
         bool
         help
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index d82767b2b833..1e0767b266b8 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -17,9 +17,8 @@ obj-y				+= irq.o
 obj-y                           += devs.o
 obj-y                           += gpio.o
 obj-y                           += gpiolib.o
-obj-y                           += time.o
 obj-y                           += clock.o
-obj-y                           += pwm-clock.o
+obj-$(CONFIG_S3C24XX_DCLK)      += clock-dclk.o
 
 # Architecture dependant builds
 
@@ -30,5 +29,18 @@ obj-$(CONFIG_PM_SIMTEC)		+= pm-simtec.o
 obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_PM)                += sleep.o
 obj-$(CONFIG_HAVE_PWM)          += pwm.o
+obj-$(CONFIG_S3C2410_CLOCK)     += s3c2410-clock.o
 obj-$(CONFIG_S3C2410_DMA)       += dma.o
+obj-$(CONFIG_S3C24XX_ADC)       += adc.o
+
+# device specific setup and/or initialisation
+obj-$(CONFIG_ARCH_S3C2410)      += setup-i2c.o
+
+# SPI gpio central GPIO functions
+
+obj-$(CONFIG_S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13) += spi-bus0-gpe11_12_13.o
+obj-$(CONFIG_S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7)    += spi-bus1-gpg5_6_7.o
+
+# machine common support
+
 obj-$(CONFIG_MACH_SMDK)         += common-smdk.o
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c
new file mode 100644
index 000000000000..9a5c767e0a42
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/adc.c
@@ -0,0 +1,372 @@
+/* arch/arm/plat-s3c24xx/adc.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
+ *
+ * S3C24XX ADC device core
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/list.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+
+#include <plat/regs-adc.h>
+#include <plat/adc.h>
+
+/* This driver is designed to control the usage of the ADC block between
+ * the touchscreen and any other drivers that may need to use it, such as
+ * the hwmon driver.
+ *
+ * Priority will be given to the touchscreen driver, but as this itself is
+ * rate limited it should not starve other requests which are processed in
+ * order that they are received.
+ *
+ * Each user registers to get a client block which uniquely identifies it
+ * and stores information such as the necessary functions to callback when
+ * action is required.
+ */
+
+struct s3c_adc_client {
+        struct platform_device  *pdev;
+        struct list_head         pend;
+
+        unsigned int             nr_samples;
+        unsigned char            is_ts;
+        unsigned char            channel;
+
+        void    (*select_cb)(unsigned selected);
+        void    (*convert_cb)(unsigned val1, unsigned val2);
+};
+
+struct adc_device {
+        struct platform_device  *pdev;
+        struct platform_device  *owner;
+        struct clk              *clk;
+        struct s3c_adc_client   *cur;
+        struct s3c_adc_client   *ts_pend;
+        void __iomem            *regs;
+
+        unsigned int             prescale;
+
+        int                      irq;
+};
+
+static struct adc_device *adc_dev;
+
+static LIST_HEAD(adc_pending);
+
+#define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg)
+
+static inline void s3c_adc_convert(struct adc_device *adc)
+{
+        unsigned con = readl(adc->regs + S3C2410_ADCCON);
+
+        con |= S3C2410_ADCCON_ENABLE_START;
+        writel(con, adc->regs + S3C2410_ADCCON);
+}
+
+static inline void s3c_adc_select(struct adc_device *adc,
+                                  struct s3c_adc_client *client)
+{
+        unsigned con = readl(adc->regs + S3C2410_ADCCON);
+
+        client->select_cb(1);
+
+        con &= ~S3C2410_ADCCON_MUXMASK;
+        con &= ~S3C2410_ADCCON_STDBM;
+        con &= ~S3C2410_ADCCON_STARTMASK;
+
+        if (!client->is_ts)
+                con |= S3C2410_ADCCON_SELMUX(client->channel);
+
+        writel(con, adc->regs + S3C2410_ADCCON);
+}
+
+static void s3c_adc_dbgshow(struct adc_device *adc)
+{
+        adc_dbg(adc, "CON=%08x, TSC=%08x, DLY=%08x\n",
+                readl(adc->regs + S3C2410_ADCCON),
+                readl(adc->regs + S3C2410_ADCTSC),
+                readl(adc->regs + S3C2410_ADCDLY));
+}
+
+void s3c_adc_try(struct adc_device *adc)
+{
+        struct s3c_adc_client *next = adc->ts_pend;
+
+        if (!next && !list_empty(&adc_pending)) {
+                next = list_first_entry(&adc_pending,
+                                        struct s3c_adc_client, pend);
+                list_del(&next->pend);
+        } else
+                adc->ts_pend = NULL;
+
+        if (next) {
+                adc_dbg(adc, "new client is %p\n", next);
+                adc->cur = next;
+                s3c_adc_select(adc, next);
+                s3c_adc_convert(adc);
+                s3c_adc_dbgshow(adc);
+        }
+}
+
+int s3c_adc_start(struct s3c_adc_client *client,
+                  unsigned int channel, unsigned int nr_samples)
+{
+        struct adc_device *adc = adc_dev;
+        unsigned long flags;
+
+        if (!adc) {
+                printk(KERN_ERR "%s: failed to find adc\n", __func__);
+                return -EINVAL;
+        }
+
+        if (client->is_ts && adc->ts_pend)
+                return -EAGAIN;
+
+        local_irq_save(flags);
+
+        client->channel = channel;
+        client->nr_samples = nr_samples;
+
+        if (client->is_ts)
+                adc->ts_pend = client;
+        else
+                list_add_tail(&client->pend, &adc_pending);
+
+        if (!adc->cur)
+                s3c_adc_try(adc);
+        local_irq_restore(flags);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(s3c_adc_start);
+
+static void s3c_adc_default_select(unsigned select)
+{
+}
+
+struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev,
+                                        void (*select)(unsigned int selected),
+                                        void (*conv)(unsigned d0, unsigned d1),
+                                        unsigned int is_ts)
+{
+        struct s3c_adc_client *client;
+
+        WARN_ON(!pdev);
+        WARN_ON(!conv);
+
+        if (!select)
+                select = s3c_adc_default_select;
+
+        if (!conv || !pdev)
+                return ERR_PTR(-EINVAL);
+
+        client = kzalloc(sizeof(struct s3c_adc_client), GFP_KERNEL);
+        if (!client) {
+                dev_err(&pdev->dev, "no memory for adc client\n");
+                return ERR_PTR(-ENOMEM);
+        }
+
+        client->pdev = pdev;
+        client->is_ts = is_ts;
+        client->select_cb = select;
+        client->convert_cb = conv;
+
+        return client;
+}
+EXPORT_SYMBOL_GPL(s3c_adc_register);
+
+void s3c_adc_release(struct s3c_adc_client *client)
+{
+        /* We should really check that nothing is in progress. */
+        kfree(client);
+}
+EXPORT_SYMBOL_GPL(s3c_adc_release);
+
+static irqreturn_t s3c_adc_irq(int irq, void *pw)
+{
+        struct adc_device *adc = pw;
+        struct s3c_adc_client *client = adc->cur;
+        unsigned long flags;
+        unsigned data0, data1;
+
+        if (!client) {
+                dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__);
+                return IRQ_HANDLED;
+        }
+
+        data0 = readl(adc->regs + S3C2410_ADCDAT0);
+        data1 = readl(adc->regs + S3C2410_ADCDAT1);
+        adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1);
+
+        (client->convert_cb)(data0 & 0x3ff, data1 & 0x3ff);
+
+        if (--client->nr_samples > 0) {
+                /* fire another conversion for this */
+
+                client->select_cb(1);
+                s3c_adc_convert(adc);
+        } else {
+                local_irq_save(flags);
+                (client->select_cb)(0);
+                adc->cur = NULL;
+
+                s3c_adc_try(adc);
+                local_irq_restore(flags);
+        }
+
+        return IRQ_HANDLED;
+}
+
+static int s3c_adc_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct adc_device *adc;
+        struct resource *regs;
+        int ret;
+
+        adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
+        if (adc == NULL) {
+                dev_err(dev, "failed to allocate adc_device\n");
+                return -ENOMEM;
+        }
+
+        adc->pdev = pdev;
+        adc->prescale = S3C2410_ADCCON_PRSCVL(49);
+
+        adc->irq = platform_get_irq(pdev, 1);
+        if (adc->irq <= 0) {
+                dev_err(dev, "failed to get adc irq\n");
+                ret = -ENOENT;
+                goto err_alloc;
+        }
+
+        ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc);
+        if (ret < 0) {
+                dev_err(dev, "failed to attach adc irq\n");
+                goto err_alloc;
+        }
+
+        adc->clk = clk_get(dev, "adc");
+        if (IS_ERR(adc->clk)) {
+                dev_err(dev, "failed to get adc clock\n");
+                ret = PTR_ERR(adc->clk);
+                goto err_irq;
+        }
+
+        regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!regs) {
+                dev_err(dev, "failed to find registers\n");
+                ret = -ENXIO;
+                goto err_clk;
+        }
+
+        adc->regs = ioremap(regs->start, resource_size(regs));
+        if (!adc->regs) {
+                dev_err(dev, "failed to map registers\n");
+                ret = -ENXIO;
+                goto err_clk;
+        }
+
+        clk_enable(adc->clk);
+
+        writel(adc->prescale | S3C2410_ADCCON_PRSCEN,
+               adc->regs + S3C2410_ADCCON);
+
+        dev_info(dev, "attached adc driver\n");
+
+        platform_set_drvdata(pdev, adc);
+        adc_dev = adc;
+
+        return 0;
+
+ err_clk:
+        clk_put(adc->clk);
+
+ err_irq:
+        free_irq(adc->irq, adc);
+
+ err_alloc:
+        kfree(adc);
+        return ret;
+}
+
+static int s3c_adc_remove(struct platform_device *pdev)
+{
+        struct adc_device *adc = platform_get_drvdata(pdev);
+
+        iounmap(adc->regs);
+        free_irq(adc->irq, adc);
+        clk_disable(adc->clk);
+        clk_put(adc->clk);
+        kfree(adc);
+
+        return 0;
+}
+
+#ifdef CONFIG_PM
+static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state)
+{
+        struct adc_device *adc = platform_get_drvdata(pdev);
+        u32 con;
+
+        con = readl(adc->regs + S3C2410_ADCCON);
+        con |= S3C2410_ADCCON_STDBM;
+        writel(con, adc->regs + S3C2410_ADCCON);
+
+        clk_disable(adc->clk);
+
+        return 0;
+}
+
+static int s3c_adc_resume(struct platform_device *pdev)
+{
+        struct adc_device *adc = platform_get_drvdata(pdev);
+
+        clk_enable(adc->clk);
+
+        writel(adc->prescale | S3C2410_ADCCON_PRSCEN,
+               adc->regs + S3C2410_ADCCON);
+
+        return 0;
+}
+
+#else
+#define s3c_adc_suspend NULL
+#define s3c_adc_resume NULL
+#endif
+
+static struct platform_driver s3c_adc_driver = {
+        .driver         = {
+                .name   = "s3c24xx-adc",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = s3c_adc_probe,
+        .remove         = __devexit_p(s3c_adc_remove),
+        .suspend        = s3c_adc_suspend,
+        .resume         = s3c_adc_resume,
+};
+
+static int __init adc_init(void)
+{
+        int ret;
+
+        ret = platform_driver_register(&s3c_adc_driver);
+        if (ret)
+                printk(KERN_ERR "%s: failed to add adc driver\n", __func__);
+
+        return ret;
+}
+
+arch_initcall(adc_init);
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c
new file mode 100644
index 000000000000..5b75a797b5ab
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/clock-dclk.c
@@ -0,0 +1,194 @@
+/* linux/arch/arm/plat-s3c24xx/clock-dclk.c
+ *
+ * Copyright (c) 2004,2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C24XX - definitions for DCLK and CLKOUT registers
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <mach/regs-clock.h>
+#include <mach/regs-gpio.h>
+
+#include <plat/clock.h>
+#include <plat/cpu.h>
+
+/* clocks that could be registered by external code */
+
+static int s3c24xx_dclk_enable(struct clk *clk, int enable)
+{
+        unsigned long dclkcon = __raw_readl(S3C24XX_DCLKCON);
+
+        if (enable)
+                dclkcon |= clk->ctrlbit;
+        else
+                dclkcon &= ~clk->ctrlbit;
+
+        __raw_writel(dclkcon, S3C24XX_DCLKCON);
+
+        return 0;
+}
+
+static int s3c24xx_dclk_setparent(struct clk *clk, struct clk *parent)
+{
+        unsigned long dclkcon;
+        unsigned int uclk;
+
+        if (parent == &clk_upll)
+                uclk = 1;
+        else if (parent == &clk_p)
+                uclk = 0;
+        else
+                return -EINVAL;
+
+        clk->parent = parent;
+
+        dclkcon = __raw_readl(S3C24XX_DCLKCON);
+
+        if (clk->ctrlbit == S3C2410_DCLKCON_DCLK0EN) {
+                if (uclk)
+                        dclkcon |= S3C2410_DCLKCON_DCLK0_UCLK;
+                else
+                        dclkcon &= ~S3C2410_DCLKCON_DCLK0_UCLK;
+        } else {
+                if (uclk)
+                        dclkcon |= S3C2410_DCLKCON_DCLK1_UCLK;
+                else
+                        dclkcon &= ~S3C2410_DCLKCON_DCLK1_UCLK;
+        }
+
+        __raw_writel(dclkcon, S3C24XX_DCLKCON);
+
+        return 0;
+}
+static unsigned long s3c24xx_calc_div(struct clk *clk, unsigned long rate)
+{
+        unsigned long div;
+
+        if ((rate == 0) || !clk->parent)
+                return 0;
+
+        div = clk_get_rate(clk->parent) / rate;
+        if (div < 2)
+                div = 2;
+        else if (div > 16)
+                div = 16;
+
+        return div;
+}
+
+static unsigned long s3c24xx_round_dclk_rate(struct clk *clk,
+        unsigned long rate)
+{
+        unsigned long div = s3c24xx_calc_div(clk, rate);
+
+        if (div == 0)
+                return 0;
+
+        return clk_get_rate(clk->parent) / div;
+}
+
+static int s3c24xx_set_dclk_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long mask, data, div = s3c24xx_calc_div(clk, rate);
+
+        if (div == 0)
+                return -EINVAL;
+
+        if (clk == &s3c24xx_dclk0) {
+                mask = S3C2410_DCLKCON_DCLK0_DIV_MASK |
+                        S3C2410_DCLKCON_DCLK0_CMP_MASK;
+                data = S3C2410_DCLKCON_DCLK0_DIV(div) |
+                        S3C2410_DCLKCON_DCLK0_CMP((div + 1) / 2);
+        } else if (clk == &s3c24xx_dclk1) {
+                mask = S3C2410_DCLKCON_DCLK1_DIV_MASK |
+                        S3C2410_DCLKCON_DCLK1_CMP_MASK;
+                data = S3C2410_DCLKCON_DCLK1_DIV(div) |
+                        S3C2410_DCLKCON_DCLK1_CMP((div + 1) / 2);
+        } else
+                return -EINVAL;
+
+        clk->rate = clk_get_rate(clk->parent) / div;
+        __raw_writel(((__raw_readl(S3C24XX_DCLKCON) & ~mask) | data),
+                S3C24XX_DCLKCON);
+        return clk->rate;
+}
+static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
+{
+        unsigned long mask;
+        unsigned long source;
+
+        /* calculate the MISCCR setting for the clock */
+
+        if (parent == &clk_xtal)
+                source = S3C2410_MISCCR_CLK0_MPLL;
+        else if (parent == &clk_upll)
+                source = S3C2410_MISCCR_CLK0_UPLL;
+        else if (parent == &clk_f)
+                source = S3C2410_MISCCR_CLK0_FCLK;
+        else if (parent == &clk_h)
+                source = S3C2410_MISCCR_CLK0_HCLK;
+        else if (parent == &clk_p)
+                source = S3C2410_MISCCR_CLK0_PCLK;
+        else if (clk == &s3c24xx_clkout0 && parent == &s3c24xx_dclk0)
+                source = S3C2410_MISCCR_CLK0_DCLK0;
+        else if (clk == &s3c24xx_clkout1 && parent == &s3c24xx_dclk1)
+                source = S3C2410_MISCCR_CLK0_DCLK0;
+        else
+                return -EINVAL;
+
+        clk->parent = parent;
+
+        if (clk == &s3c24xx_clkout0)
+                mask = S3C2410_MISCCR_CLK0_MASK;
+        else {
+                source <<= 4;
+                mask = S3C2410_MISCCR_CLK1_MASK;
+        }
+
+        s3c2410_modify_misccr(mask, source);
+        return 0;
+}
+
+/* external clock definitions */
+
+struct clk s3c24xx_dclk0 = {
+        .name           = "dclk0",
+        .id             = -1,
+        .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
+        .enable         = s3c24xx_dclk_enable,
+        .set_parent     = s3c24xx_dclk_setparent,
+        .set_rate       = s3c24xx_set_dclk_rate,
+        .round_rate     = s3c24xx_round_dclk_rate,
+};
+
+struct clk s3c24xx_dclk1 = {
+        .name           = "dclk1",
+        .id             = -1,
+        .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
+        .enable         = s3c24xx_dclk_enable,
+        .set_parent     = s3c24xx_dclk_setparent,
+        .set_rate       = s3c24xx_set_dclk_rate,
+        .round_rate     = s3c24xx_round_dclk_rate,
+};
+
+struct clk s3c24xx_clkout0 = {
+        .name           = "clkout0",
+        .id             = -1,
+        .set_parent     = s3c24xx_clkout_setparent,
+};
+
+struct clk s3c24xx_clkout1 = {
+        .name           = "clkout1",
+        .id             = -1,
+        .set_parent     = s3c24xx_clkout_setparent,
+};
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index a005ddbd9ef3..8474d05274bd 100644
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -27,18 +27,8 @@
 */
 
 #include <linux/init.h>
-#include <linux/module.h>
 #include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-#include <linux/sysdev.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
 #include <linux/clk.h>
-#include <linux/mutex.h>
-#include <linux/delay.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -47,490 +37,23 @@
 #include <mach/regs-clock.h>
 #include <mach/regs-gpio.h>
 
+#include <plat/cpu-freq.h>
+
 #include <plat/clock.h>
 #include <plat/cpu.h>
-
-/* clock information */
-
-static LIST_HEAD(clocks);
-
-DEFINE_MUTEX(clocks_mutex);
-
-/* enable and disable calls for use with the clk struct */
-
-static int clk_null_enable(struct clk *clk, int enable)
-{
-        return 0;
-}
-
-/* Clock API calls */
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p;
-        struct clk *clk = ERR_PTR(-ENOENT);
-        int idno;
-
-        if (dev == NULL || dev->bus != &platform_bus_type)
-                idno = -1;
-        else
-                idno = to_platform_device(dev)->id;
-
-        mutex_lock(&clocks_mutex);
-
-        list_for_each_entry(p, &clocks, list) {
-                if (p->id == idno &&
-                    strcmp(id, p->name) == 0 &&
-                    try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-
-        /* check for the case where a device was supplied, but the
-         * clock that was being searched for is not device specific */
-
-        if (IS_ERR(clk)) {
-                list_for_each_entry(p, &clocks, list) {
-                        if (p->id == -1 && strcmp(id, p->name) == 0 &&
-                            try_module_get(p->owner)) {
-                                clk = p;
-                                break;
-                        }
-                }
-        }
-
-        mutex_unlock(&clocks_mutex);
-        return clk;
-}
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-
-int clk_enable(struct clk *clk)
-{
-        if (IS_ERR(clk) || clk == NULL)
-                return -EINVAL;
-
-        clk_enable(clk->parent);
-
-        mutex_lock(&clocks_mutex);
-
-        if ((clk->usage++) == 0)
-                (clk->enable)(clk, 1);
-
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-
-void clk_disable(struct clk *clk)
-{
-        if (IS_ERR(clk) || clk == NULL)
-                return;
-
-        mutex_lock(&clocks_mutex);
-
-        if ((--clk->usage) == 0)
-                (clk->enable)(clk, 0);
-
-        mutex_unlock(&clocks_mutex);
-        clk_disable(clk->parent);
-}
-
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-        if (IS_ERR(clk))
-                return 0;
-
-        if (clk->rate != 0)
-                return clk->rate;
-
-        if (clk->get_rate != NULL)
-                return (clk->get_rate)(clk);
-
-        if (clk->parent != NULL)
-                return clk_get_rate(clk->parent);
-
-        return clk->rate;
-}
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-        if (!IS_ERR(clk) && clk->round_rate)
-                return (clk->round_rate)(clk, rate);
-
-        return rate;
-}
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-        int ret;
-
-        if (IS_ERR(clk))
-                return -EINVAL;
-
-        /* We do not default just do a clk->rate = rate as
-         * the clock may have been made this way by choice.
-         */
-
-        WARN_ON(clk->set_rate == NULL);
-
-        if (clk->set_rate == NULL)
-                return -EINVAL;
-
-        mutex_lock(&clocks_mutex);
-        ret = (clk->set_rate)(clk, rate);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-
-struct clk *clk_get_parent(struct clk *clk)
-{
-        return clk->parent;
-}
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
-        int ret = 0;
-
-        if (IS_ERR(clk))
-                return -EINVAL;
-
-        mutex_lock(&clocks_mutex);
-
-        if (clk->set_parent)
-                ret = (clk->set_parent)(clk, parent);
-
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-
-EXPORT_SYMBOL(clk_get);
-EXPORT_SYMBOL(clk_put);
-EXPORT_SYMBOL(clk_enable);
-EXPORT_SYMBOL(clk_disable);
-EXPORT_SYMBOL(clk_get_rate);
-EXPORT_SYMBOL(clk_round_rate);
-EXPORT_SYMBOL(clk_set_rate);
-EXPORT_SYMBOL(clk_get_parent);
-EXPORT_SYMBOL(clk_set_parent);
-
-/* base clocks */
-
-static int clk_default_setrate(struct clk *clk, unsigned long rate)
-{
-        clk->rate = rate;
-        return 0;
-}
-
-struct clk clk_xtal = {
-        .name           = "xtal",
-        .id             = -1,
-        .rate           = 0,
-        .parent         = NULL,
-        .ctrlbit        = 0,
-};
-
-struct clk clk_mpll = {
-        .name           = "mpll",
-        .id             = -1,
-        .set_rate       = clk_default_setrate,
-};
-
-struct clk clk_upll = {
-        .name           = "upll",
-        .id             = -1,
-        .parent         = NULL,
-        .ctrlbit        = 0,
-};
-
-struct clk clk_f = {
-        .name           = "fclk",
-        .id             = -1,
-        .rate           = 0,
-        .parent         = &clk_mpll,
-        .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
-};
-
-struct clk clk_h = {
-        .name           = "hclk",
-        .id             = -1,
-        .rate           = 0,
-        .parent         = NULL,
-        .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
-};
-
-struct clk clk_p = {
-        .name           = "pclk",
-        .id             = -1,
-        .rate           = 0,
-        .parent         = NULL,
-        .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
-};
-
-struct clk clk_usb_bus = {
-        .name           = "usb-bus",
-        .id             = -1,
-        .rate           = 0,
-        .parent         = &clk_upll,
-};
-
-/* clocks that could be registered by external code */
-
-static int s3c24xx_dclk_enable(struct clk *clk, int enable)
-{
-        unsigned long dclkcon = __raw_readl(S3C24XX_DCLKCON);
-
-        if (enable)
-                dclkcon |= clk->ctrlbit;
-        else
-                dclkcon &= ~clk->ctrlbit;
-
-        __raw_writel(dclkcon, S3C24XX_DCLKCON);
-
-        return 0;
-}
-
-static int s3c24xx_dclk_setparent(struct clk *clk, struct clk *parent)
-{
-        unsigned long dclkcon;
-        unsigned int uclk;
-
-        if (parent == &clk_upll)
-                uclk = 1;
-        else if (parent == &clk_p)
-                uclk = 0;
-        else
-                return -EINVAL;
-
-        clk->parent = parent;
-
-        dclkcon = __raw_readl(S3C24XX_DCLKCON);
-
-        if (clk->ctrlbit == S3C2410_DCLKCON_DCLK0EN) {
-                if (uclk)
-                        dclkcon |= S3C2410_DCLKCON_DCLK0_UCLK;
-                else
-                        dclkcon &= ~S3C2410_DCLKCON_DCLK0_UCLK;
-        } else {
-                if (uclk)
-                        dclkcon |= S3C2410_DCLKCON_DCLK1_UCLK;
-                else
-                        dclkcon &= ~S3C2410_DCLKCON_DCLK1_UCLK;
-        }
-
-        __raw_writel(dclkcon, S3C24XX_DCLKCON);
-
-        return 0;
-}
-
-static unsigned long s3c24xx_calc_div(struct clk *clk, unsigned long rate)
-{
-        unsigned long div;
-
-        if ((rate == 0) || !clk->parent)
-                return 0;
-
-        div = clk_get_rate(clk->parent) / rate;
-        if (div < 2)
-                div = 2;
-        else if (div > 16)
-                div = 16;
-
-        return div;
-}
-
-static unsigned long s3c24xx_round_dclk_rate(struct clk *clk,
-        unsigned long rate)
-{
-        unsigned long div = s3c24xx_calc_div(clk, rate);
-
-        if (div == 0)
-                return 0;
-
-        return clk_get_rate(clk->parent) / div;
-}
-
-static int s3c24xx_set_dclk_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned long mask, data, div = s3c24xx_calc_div(clk, rate);
-
-        if (div == 0)
-                return -EINVAL;
-
-        if (clk == &s3c24xx_dclk0) {
-                mask = S3C2410_DCLKCON_DCLK0_DIV_MASK |
-                        S3C2410_DCLKCON_DCLK0_CMP_MASK;
-                data = S3C2410_DCLKCON_DCLK0_DIV(div) |
-                        S3C2410_DCLKCON_DCLK0_CMP((div + 1) / 2);
-        } else if (clk == &s3c24xx_dclk1) {
-                mask = S3C2410_DCLKCON_DCLK1_DIV_MASK |
-                        S3C2410_DCLKCON_DCLK1_CMP_MASK;
-                data = S3C2410_DCLKCON_DCLK1_DIV(div) |
-                        S3C2410_DCLKCON_DCLK1_CMP((div + 1) / 2);
-        } else
-                return -EINVAL;
-
-        clk->rate = clk_get_rate(clk->parent) / div;
-        __raw_writel(((__raw_readl(S3C24XX_DCLKCON) & ~mask) | data),
-                S3C24XX_DCLKCON);
-        return clk->rate;
-}
-
-static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
-{
-        unsigned long mask;
-        unsigned long source;
-
-        /* calculate the MISCCR setting for the clock */
-
-        if (parent == &clk_xtal)
-                source = S3C2410_MISCCR_CLK0_MPLL;
-        else if (parent == &clk_upll)
-                source = S3C2410_MISCCR_CLK0_UPLL;
-        else if (parent == &clk_f)
-                source = S3C2410_MISCCR_CLK0_FCLK;
-        else if (parent == &clk_h)
-                source = S3C2410_MISCCR_CLK0_HCLK;
-        else if (parent == &clk_p)
-                source = S3C2410_MISCCR_CLK0_PCLK;
-        else if (clk == &s3c24xx_clkout0 && parent == &s3c24xx_dclk0)
-                source = S3C2410_MISCCR_CLK0_DCLK0;
-        else if (clk == &s3c24xx_clkout1 && parent == &s3c24xx_dclk1)
-                source = S3C2410_MISCCR_CLK0_DCLK0;
-        else
-                return -EINVAL;
-
-        clk->parent = parent;
-
-        if (clk == &s3c24xx_clkout0)
-                mask = S3C2410_MISCCR_CLK0_MASK;
-        else {
-                source <<= 4;
-                mask = S3C2410_MISCCR_CLK1_MASK;
-        }
-
-        s3c2410_modify_misccr(mask, source);
-        return 0;
-}
-
-/* external clock definitions */
-
-struct clk s3c24xx_dclk0 = {
-        .name           = "dclk0",
-        .id             = -1,
-        .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
-        .enable         = s3c24xx_dclk_enable,
-        .set_parent     = s3c24xx_dclk_setparent,
-        .set_rate       = s3c24xx_set_dclk_rate,
-        .round_rate     = s3c24xx_round_dclk_rate,
-};
-
-struct clk s3c24xx_dclk1 = {
-        .name           = "dclk1",
-        .id             = -1,
-        .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
-        .enable         = s3c24xx_dclk_enable,
-        .set_parent     = s3c24xx_dclk_setparent,
-        .set_rate       = s3c24xx_set_dclk_rate,
-        .round_rate     = s3c24xx_round_dclk_rate,
-};
-
-struct clk s3c24xx_clkout0 = {
-        .name           = "clkout0",
-        .id             = -1,
-        .set_parent     = s3c24xx_clkout_setparent,
-};
-
-struct clk s3c24xx_clkout1 = {
-        .name           = "clkout1",
-        .id             = -1,
-        .set_parent     = s3c24xx_clkout_setparent,
-};
-
-struct clk s3c24xx_uclk = {
-        .name           = "uclk",
-        .id             = -1,
-};
-
-/* initialise the clock system */
-
-int s3c24xx_register_clock(struct clk *clk)
-{
-        clk->owner = THIS_MODULE;
-
-        if (clk->enable == NULL)
-                clk->enable = clk_null_enable;
-
-        /* add to the list of available clocks */
-
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->list, &clocks);
-        mutex_unlock(&clocks_mutex);
-
-        return 0;
-}
-
-int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
-{
-        int fails = 0;
-
-        for (; nr_clks > 0; nr_clks--, clks++) {
-                if (s3c24xx_register_clock(*clks) < 0)
-                        fails++;
-        }
-
-        return fails;
-}
+#include <plat/pll.h>
 
 /* initalise all the clocks */
 
-int __init s3c24xx_setup_clocks(unsigned long xtal,
-                                unsigned long fclk,
-                                unsigned long hclk,
-                                unsigned long pclk)
+void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
+                                           unsigned long hclk,
+                                           unsigned long pclk)
 {
-        printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n");
-
-        /* initialise the main system clocks */
-
-        clk_xtal.rate = xtal;
-        clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal);
+        clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
+                                        clk_xtal.rate);
 
         clk_mpll.rate = fclk;
         clk_h.rate = hclk;
         clk_p.rate = pclk;
         clk_f.rate = fclk;
-
-        /* assume uart clocks are correctly setup */
-
-        /* register our clocks */
-
-        if (s3c24xx_register_clock(&clk_xtal) < 0)
-                printk(KERN_ERR "failed to register master xtal\n");
-
-        if (s3c24xx_register_clock(&clk_mpll) < 0)
-                printk(KERN_ERR "failed to register mpll clock\n");
-
-        if (s3c24xx_register_clock(&clk_upll) < 0)
-                printk(KERN_ERR "failed to register upll clock\n");
-
-        if (s3c24xx_register_clock(&clk_f) < 0)
-                printk(KERN_ERR "failed to register cpu fclk\n");
-
-        if (s3c24xx_register_clock(&clk_h) < 0)
-                printk(KERN_ERR "failed to register cpu hclk\n");
-
-        if (s3c24xx_register_clock(&clk_p) < 0)
-                printk(KERN_ERR "failed to register cpu pclk\n");
-
-        return 0;
 }
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index 3098736c65d9..3d4837021ac7 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -38,7 +38,7 @@
 #include <mach/regs-gpio.h>
 #include <mach/leds-gpio.h>
 
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
 
 #include <plat/common-smdk.h>
 #include <plat/devs.h>
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 22a329513c0f..542062f8cbc1 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -30,7 +30,6 @@
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 #include <linux/io.h>
-#include <linux/delay.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -55,16 +54,6 @@
 #include <plat/s3c2442.h>
 #include <plat/s3c2443.h>
 
-struct cpu_table {
-        unsigned long   idcode;
-        unsigned long   idmask;
-        void            (*map_io)(struct map_desc *mach_desc, int size);
-        void            (*init_uarts)(struct s3c2410_uartcfg *cfg, int no);
-        void            (*init_clocks)(int xtal);
-        int             (*init)(void);
-        const char      *name;
-};
-
 /* table of supported CPUs */
 
 static const char name_s3c2400[]  = "S3C2400";
@@ -169,23 +158,7 @@ static struct map_desc s3c_iodesc[] __initdata = {
         IODESC_ENT(UART)
 };
 
-static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode)
-{
-        struct cpu_table *tab;
-        int count;
-
-        tab = cpu_ids;
-        for (count = 0; count < ARRAY_SIZE(cpu_ids); count++, tab++) {
-                if ((idcode & tab->idmask) == tab->idcode)
-                        return tab;
-        }
-
-        return NULL;
-}
-
-/* cpu information */
-
-static struct cpu_table *cpu;
+/* read cpu identificaiton code */
 
 static unsigned long s3c24xx_read_idcode_v5(void)
 {
@@ -231,6 +204,7 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
         unsigned long idcode = 0x0;
 
         /* initialise the io descriptors we need for initialisation */
+        iotable_init(mach_desc, size);
         iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
 
         if (cpu_architecture() >= CPU_ARCH_ARMv5) {
@@ -239,117 +213,7 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
                 idcode = s3c24xx_read_idcode_v4();
         }
 
-        cpu = s3c_lookup_cpu(idcode);
-
-        if (cpu == NULL) {
-                printk(KERN_ERR "Unknown CPU type 0x%08lx\n", idcode);
-                panic("Unknown S3C24XX CPU");
-        }
-
-        printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
-
-        if (cpu->map_io == NULL || cpu->init == NULL) {
-                printk(KERN_ERR "CPU %s support not enabled\n", cpu->name);
-                panic("Unsupported S3C24XX CPU");
-        }
-
         arm_pm_restart = s3c24xx_pm_restart;
 
-        (cpu->map_io)(mach_desc, size);
-}
-
-/* s3c24xx_init_clocks
- *
- * Initialise the clock subsystem and associated information from the
- * given master crystal value.
- *
- * xtal  = 0 -> use default PLL crystal value (normally 12MHz)
- *      != 0 -> PLL crystal value in Hz
-*/
-
-void __init s3c24xx_init_clocks(int xtal)
-{
-        if (xtal == 0)
-                xtal = 12*1000*1000;
-
-        if (cpu == NULL)
-                panic("s3c24xx_init_clocks: no cpu setup?\n");
-
-        if (cpu->init_clocks == NULL)
-                panic("s3c24xx_init_clocks: cpu has no clock init\n");
-        else
-                (cpu->init_clocks)(xtal);
+        s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
 }
-
-/* uart management */
-
-static int nr_uarts __initdata = 0;
-
-static struct s3c2410_uartcfg uart_cfgs[3];
-
-/* s3c24xx_init_uartdevs
- *
- * copy the specified platform data and configuration into our central
- * set of devices, before the data is thrown away after the init process.
- *
- * This also fills in the array passed to the serial driver for the
- * early initialisation of the console.
-*/
-
-void __init s3c24xx_init_uartdevs(char *name,
-                                  struct s3c24xx_uart_resources *res,
-                                  struct s3c2410_uartcfg *cfg, int no)
-{
-        struct platform_device *platdev;
-        struct s3c2410_uartcfg *cfgptr = uart_cfgs;
-        struct s3c24xx_uart_resources *resp;
-        int uart;
-
-        memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no);
-
-        for (uart = 0; uart < no; uart++, cfg++, cfgptr++) {
-                platdev = s3c24xx_uart_src[cfgptr->hwport];
-
-                resp = res + cfgptr->hwport;
-
-                s3c24xx_uart_devs[uart] = platdev;
-
-                platdev->name = name;
-                platdev->resource = resp->resources;
-                platdev->num_resources = resp->nr_resources;
-
-                platdev->dev.platform_data = cfgptr;
-        }
-
-        nr_uarts = no;
-}
-
-void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        if (cpu == NULL)
-                return;
-
-        if (cpu->init_uarts == NULL) {
-                printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n");
-        } else
-                (cpu->init_uarts)(cfg, no);
-}
-
-static int __init s3c_arch_init(void)
-{
-        int ret;
-
-        // do the correct init for cpu
-
-        if (cpu == NULL)
-                panic("s3c_arch_init: NULL cpu\n");
-
-        ret = (cpu->init)();
-        if (ret != 0)
-                return ret;
-
-        ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts);
-        return ret;
-}
-
-arch_initcall(s3c_arch_init);
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index e93f8bf6d338..16ac01d9b8ab 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -29,11 +29,11 @@
 #include <asm/irq.h>
 
 #include <plat/regs-serial.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
 
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 /* Serial port registrations */
 
@@ -76,6 +76,19 @@ static struct resource s3c2410_uart2_resource[] = {
         }
 };
 
+static struct resource s3c2410_uart3_resource[] = {
+        [0] = {
+                .start = S3C2443_PA_UART3,
+                .end   = S3C2443_PA_UART3 + 0x3fff,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_S3CUART_RX3,
+                .end   = IRQ_S3CUART_ERR3,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
 struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
         [0] = {
                 .resources      = s3c2410_uart0_resource,
@@ -89,6 +102,10 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
                 .resources      = s3c2410_uart2_resource,
                 .nr_resources   = ARRAY_SIZE(s3c2410_uart2_resource),
         },
+        [3] = {
+                .resources      = s3c2410_uart3_resource,
+                .nr_resources   = ARRAY_SIZE(s3c2410_uart3_resource),
+        },
 };
 
 /* yart devices */
@@ -105,13 +122,18 @@ static struct platform_device s3c24xx_uart_device2 = {
         .id             = 2,
 };
 
-struct platform_device *s3c24xx_uart_src[3] = {
+static struct platform_device s3c24xx_uart_device3 = {
+        .id             = 3,
+};
+
+struct platform_device *s3c24xx_uart_src[4] = {
         &s3c24xx_uart_device0,
         &s3c24xx_uart_device1,
         &s3c24xx_uart_device2,
+        &s3c24xx_uart_device3,
 };
 
-struct platform_device *s3c24xx_uart_devs[3] = {
+struct platform_device *s3c24xx_uart_devs[4] = {
 };
 
 /* USB Host Controller */
@@ -192,8 +214,8 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
 
 static struct resource s3c_nand_resource[] = {
         [0] = {
-                .start = S3C2410_PA_NAND,
-                .end   = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
+                .start = S3C24XX_PA_NAND,
+                .end   = S3C24XX_PA_NAND + S3C24XX_SZ_NAND - 1,
                 .flags = IORESOURCE_MEM,
         }
 };
@@ -271,31 +293,6 @@ struct platform_device s3c_device_wdt = {
 
 EXPORT_SYMBOL(s3c_device_wdt);
 
-/* I2C */
-
-static struct resource s3c_i2c_resource[] = {
-        [0] = {
-                .start = S3C24XX_PA_IIC,
-                .end   = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = IRQ_IIC,
-                .end   = IRQ_IIC,
-                .flags = IORESOURCE_IRQ,
-        }
-
-};
-
-struct platform_device s3c_device_i2c = {
-        .name             = "s3c2410-i2c",
-        .id               = -1,
-        .num_resources    = ARRAY_SIZE(s3c_i2c_resource),
-        .resource         = s3c_i2c_resource,
-};
-
-EXPORT_SYMBOL(s3c_device_i2c);
-
 /* IIS */
 
 static struct resource s3c_iis_resource[] = {
@@ -372,18 +369,26 @@ static struct resource s3c_adc_resource[] = {
 };
 
 struct platform_device s3c_device_adc = {
-        .name             = "s3c2410-adc",
+        .name             = "s3c24xx-adc",
         .id               = -1,
         .num_resources    = ARRAY_SIZE(s3c_adc_resource),
         .resource         = s3c_adc_resource,
 };
 
+/* HWMON */
+
+struct platform_device s3c_device_hwmon = {
+        .name           = "s3c24xx-hwmon",
+        .id             = -1,
+        .dev.parent     = &s3c_device_adc.dev,
+};
+
 /* SDI */
 
 static struct resource s3c_sdi_resource[] = {
         [0] = {
-                .start = S3C2410_PA_SDI,
-                .end   = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
+                .start = S3C24XX_PA_SDI,
+                .end   = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
@@ -403,36 +408,6 @@ struct platform_device s3c_device_sdi = {
 
 EXPORT_SYMBOL(s3c_device_sdi);
 
-/* High-speed MMC/SD */
-
-static struct resource s3c_hsmmc_resource[] = {
-        [0] = {
-                .start = S3C2443_PA_HSMMC,
-                .end   = S3C2443_PA_HSMMC + S3C2443_SZ_HSMMC - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = IRQ_S3C2443_HSMMC,
-                .end   = IRQ_S3C2443_HSMMC,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-
-static u64 s3c_device_hsmmc_dmamask = 0xffffffffUL;
-
-struct platform_device s3c_device_hsmmc = {
-        .name             = "s3c-sdhci",
-        .id               = -1,
-        .num_resources    = ARRAY_SIZE(s3c_hsmmc_resource),
-        .resource         = s3c_hsmmc_resource,
-        .dev              = {
-                .dma_mask = &s3c_device_hsmmc_dmamask,
-                .coherent_dma_mask = 0xffffffffUL
-        }
-};
-
-
-
 /* SPI (0) */
 
 static struct resource s3c_spi0_resource[] = {
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 1baf941d1930..aee2aeb46c60 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -25,15 +25,13 @@
 #include <linux/sysdev.h>
 #include <linux/slab.h>
 #include <linux/errno.h>
-#include <linux/delay.h>
 #include <linux/io.h>
 
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 
-#include <asm/mach/dma.h>
 #include <mach/map.h>
 
 #include <plat/dma.h>
@@ -804,7 +802,7 @@ EXPORT_SYMBOL(s3c2410_dma_request);
  * allowed to go through.
 */
 
-int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client)
+int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *client)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
         unsigned long flags;
@@ -995,7 +993,7 @@ static int s3c2410_dma_started(struct s3c2410_dma_chan *chan)
 }
 
 int
-s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op)
+s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
@@ -1043,7 +1041,7 @@ EXPORT_SYMBOL(s3c2410_dma_ctrl);
  * dcon:         base value of the DCONx register
 */
 
-int s3c2410_dma_config(dmach_t channel,
+int s3c2410_dma_config(unsigned int channel,
                        int xferunit,
                        int dcon)
 {
@@ -1092,7 +1090,7 @@ int s3c2410_dma_config(dmach_t channel,
 
 EXPORT_SYMBOL(s3c2410_dma_config);
 
-int s3c2410_dma_setflags(dmach_t channel, unsigned int flags)
+int s3c2410_dma_setflags(unsigned int channel, unsigned int flags)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
@@ -1113,7 +1111,7 @@ EXPORT_SYMBOL(s3c2410_dma_setflags);
  * irq?
 */
 
-int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn)
+int s3c2410_dma_set_opfn(unsigned int channel, s3c2410_dma_opfn_t rtn)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
@@ -1129,7 +1127,7 @@ int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn)
 
 EXPORT_SYMBOL(s3c2410_dma_set_opfn);
 
-int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn)
+int s3c2410_dma_set_buffdone_fn(unsigned int channel, s3c2410_dma_cbfn_t rtn)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
@@ -1219,7 +1217,7 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig);
  * returns the current transfer points for the dma source and destination
 */
 
-int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst)
+int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *dst)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 3caec6bad3eb..f95c6c9d9f1a 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -19,104 +19,12 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
+#include <plat/gpio-core.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
 #include <mach/regs-gpio.h>
 
-struct s3c24xx_gpio_chip {
-        struct gpio_chip        chip;
-        void __iomem            *base;
-};
-
-static inline struct s3c24xx_gpio_chip *to_s3c_chip(struct gpio_chip *gpc)
-{
-        return container_of(gpc, struct s3c24xx_gpio_chip, chip);
-}
-
-/* these routines are exported for use by other parts of the platform
- * and system support, but are not intended to be used directly by the
- * drivers themsevles.
- */
-
-static int s3c24xx_gpiolib_input(struct gpio_chip *chip, unsigned offset)
-{
-        struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
-        void __iomem *base = ourchip->base;
-        unsigned long flags;
-        unsigned long con;
-
-        local_irq_save(flags);
-
-        con = __raw_readl(base + 0x00);
-        con &= ~(3 << (offset * 2));
-        con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);
-
-        __raw_writel(con, base + 0x00);
-
-        local_irq_restore(flags);
-        return 0;
-}
-
-static int s3c24xx_gpiolib_output(struct gpio_chip *chip,
-                                  unsigned offset, int value)
-{
-        struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
-        void __iomem *base = ourchip->base;
-        unsigned long flags;
-        unsigned long dat;
-        unsigned long con;
-
-        local_irq_save(flags);
-
-        dat = __raw_readl(base + 0x04);
-        dat &= ~(1 << offset);
-        if (value)
-                dat |= 1 << offset;
-        __raw_writel(dat, base + 0x04);
-
-        con = __raw_readl(base + 0x00);
-        con &= ~(3 << (offset * 2));
-        con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);
-
-        __raw_writel(con, base + 0x00);
-        __raw_writel(dat, base + 0x04);
-
-        local_irq_restore(flags);
-        return 0;
-}
-
-static void s3c24xx_gpiolib_set(struct gpio_chip *chip,
-                                unsigned offset, int value)
-{
-        struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
-        void __iomem *base = ourchip->base;
-        unsigned long flags;
-        unsigned long dat;
-
-        local_irq_save(flags);
-
-        dat = __raw_readl(base + 0x04);
-        dat &= ~(1 << offset);
-        if (value)
-                dat |= 1 << offset;
-        __raw_writel(dat, base + 0x04);
-
-        local_irq_restore(flags);
-}
-
-static int s3c24xx_gpiolib_get(struct gpio_chip *chip, unsigned offset)
-{
-        struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
-        unsigned long val;
-
-        val = __raw_readl(ourchip->base + 0x04);
-        val >>= offset;
-        val &= 1;
-
-        return val;
-}
-
 static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
 {
         return -EINVAL;
@@ -125,7 +33,7 @@ static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
 static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
                                         unsigned offset, int value)
 {
-        struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
         void __iomem *base = ourchip->base;
         unsigned long flags;
         unsigned long dat;
@@ -151,7 +59,7 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
         return 0;
 }
 
-static struct s3c24xx_gpio_chip gpios[] = {
+struct s3c_gpio_chip s3c24xx_gpios[] = {
         [0] = {
                 .base   = S3C24XX_GPIO_BASE(S3C2410_GPA0),
                 .chip   = {
@@ -161,8 +69,6 @@ static struct s3c24xx_gpio_chip gpios[] = {
                         .ngpio                  = 24,
                         .direction_input        = s3c24xx_gpiolib_banka_input,
                         .direction_output       = s3c24xx_gpiolib_banka_output,
-                        .set                    = s3c24xx_gpiolib_set,
-                        .get                    = s3c24xx_gpiolib_get,
                 },
         },
         [1] = {
@@ -172,10 +78,6 @@ static struct s3c24xx_gpio_chip gpios[] = {
                         .owner                  = THIS_MODULE,
                         .label                  = "GPIOB",
                         .ngpio                  = 16,
-                        .direction_input        = s3c24xx_gpiolib_input,
-                        .direction_output       = s3c24xx_gpiolib_output,
-                        .set                    = s3c24xx_gpiolib_set,
-                        .get                    = s3c24xx_gpiolib_get,
                 },
         },
         [2] = {
@@ -185,10 +87,6 @@ static struct s3c24xx_gpio_chip gpios[] = {
                         .owner                  = THIS_MODULE,
                         .label                  = "GPIOC",
                         .ngpio                  = 16,
-                        .direction_input        = s3c24xx_gpiolib_input,
-                        .direction_output       = s3c24xx_gpiolib_output,
-                        .set                    = s3c24xx_gpiolib_set,
-                        .get                    = s3c24xx_gpiolib_get,
                 },
         },
         [3] = {
@@ -198,10 +96,6 @@ static struct s3c24xx_gpio_chip gpios[] = {
                         .owner                  = THIS_MODULE,
                         .label                  = "GPIOD",
                         .ngpio                  = 16,
-                        .direction_input        = s3c24xx_gpiolib_input,
-                        .direction_output       = s3c24xx_gpiolib_output,
-                        .set                    = s3c24xx_gpiolib_set,
-                        .get                    = s3c24xx_gpiolib_get,
                 },
         },
         [4] = {
@@ -211,10 +105,6 @@ static struct s3c24xx_gpio_chip gpios[] = {
                         .label                  = "GPIOE",
                         .owner                  = THIS_MODULE,
                         .ngpio                  = 16,
-                        .direction_input        = s3c24xx_gpiolib_input,
-                        .direction_output       = s3c24xx_gpiolib_output,
-                        .set                    = s3c24xx_gpiolib_set,
-                        .get                    = s3c24xx_gpiolib_get,
                 },
         },
         [5] = {
@@ -224,10 +114,6 @@ static struct s3c24xx_gpio_chip gpios[] = {
                         .owner                  = THIS_MODULE,
                         .label                  = "GPIOF",
                         .ngpio                  = 8,
-                        .direction_input        = s3c24xx_gpiolib_input,
-                        .direction_output       = s3c24xx_gpiolib_output,
-                        .set                    = s3c24xx_gpiolib_set,
-                        .get                    = s3c24xx_gpiolib_get,
                 },
         },
         [6] = {
@@ -237,21 +123,17 @@ static struct s3c24xx_gpio_chip gpios[] = {
                         .owner                  = THIS_MODULE,
                         .label                  = "GPIOG",
                         .ngpio                  = 10,
-                        .direction_input        = s3c24xx_gpiolib_input,
-                        .direction_output       = s3c24xx_gpiolib_output,
-                        .set                    = s3c24xx_gpiolib_set,
-                        .get                    = s3c24xx_gpiolib_get,
                 },
         },
 };
 
 static __init int s3c24xx_gpiolib_init(void)
 {
-        struct s3c24xx_gpio_chip *chip = gpios;
+        struct s3c_gpio_chip *chip = s3c24xx_gpios;
         int gpn;
 
-        for (gpn = 0; gpn < ARRAY_SIZE(gpios); gpn++, chip++)
-                gpiochip_add(&chip->chip);
+        for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++)
+                s3c_gpiolib_add(chip);
 
         return 0;
 }
diff --git a/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h b/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..a087de21bc20
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
@@ -0,0 +1,55 @@
+/* linux/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C24xx - pwm clock and timer support
+ */
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @cfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg == S3C2410_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << (1 + tcfg1);
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 0;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div) - 1;
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h
new file mode 100644
index 000000000000..fef8ea8b8e1e
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/map.h
@@ -0,0 +1,99 @@
+/* linux/include/asm-arm/plat-s3c24xx/map.h
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_S3C24XX_MAP_H
+#define __ASM_PLAT_S3C24XX_MAP_H
+
+/* interrupt controller is the first thing we put in, to make
+ * the assembly code for the irq detection easier
+ */
+#define S3C24XX_VA_IRQ     S3C_VA_IRQ
+#define S3C2410_PA_IRQ     (0x4A000000)
+#define S3C24XX_SZ_IRQ     SZ_1M
+
+/* memory controller registers */
+#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
+#define S3C2410_PA_MEMCTRL (0x48000000)
+#define S3C24XX_SZ_MEMCTRL SZ_1M
+
+/* UARTs */
+#define S3C24XX_VA_UART    S3C_VA_UART
+#define S3C2410_PA_UART    (0x50000000)
+#define S3C24XX_SZ_UART    SZ_1M
+#define S3C_UART_OFFSET    (0x4000)
+
+/* Timers */
+#define S3C24XX_VA_TIMER   S3C_VA_TIMER
+#define S3C2410_PA_TIMER   (0x51000000)
+#define S3C24XX_SZ_TIMER   SZ_1M
+
+/* Clock and Power management */
+#define S3C24XX_VA_CLKPWR  S3C_VA_SYS
+#define S3C24XX_SZ_CLKPWR  SZ_1M
+
+/* USB Device port */
+#define S3C2410_PA_USBDEV  (0x52000000)
+#define S3C24XX_SZ_USBDEV  SZ_1M
+
+/* Watchdog */
+#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
+#define S3C2410_PA_WATCHDOG (0x53000000)
+#define S3C24XX_SZ_WATCHDOG SZ_1M
+
+/* Standard size definitions for peripheral blocks. */
+
+#define S3C24XX_SZ_IIS          SZ_1M
+#define S3C24XX_SZ_ADC          SZ_1M
+#define S3C24XX_SZ_SPI          SZ_1M
+#define S3C24XX_SZ_SDI          SZ_1M
+#define S3C24XX_SZ_NAND         SZ_1M
+#define S3C24XX_SZ_USBHOST      SZ_1M
+
+/* GPIO ports */
+
+/* the calculation for the VA of this must ensure that
+ * it is the same distance apart from the UART in the
+ * phsyical address space, as the initial mapping for the IO
+ * is done as a 1:1 maping. This puts it (currently) at
+ * 0xFA800000, which is not in the way of any current mapping
+ * by the base system.
+*/
+
+#define S3C2410_PA_GPIO    (0x56000000)
+#define S3C24XX_VA_GPIO    ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
+#define S3C24XX_SZ_GPIO    SZ_1M
+
+
+/* ISA style IO, for each machine to sort out mappings for, if it
+ * implements it. We reserve two 16M regions for ISA.
+ */
+
+#define S3C24XX_VA_ISA_WORD  S3C2410_ADDR(0x02000000)
+#define S3C24XX_VA_ISA_BYTE  S3C2410_ADDR(0x03000000)
+
+/* deal with the registers that move under the 2412/2413 */
+
+#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
+#ifndef __ASSEMBLY__
+extern void __iomem *s3c24xx_va_gpio2;
+#endif
+#ifdef CONFIG_CPU_S3C2412_ONLY
+#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
+#else
+#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
+#endif
+#else
+#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
+#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
+#endif
+
+#endif /* __ASM_PLAT_S3C24XX_MAP_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/mci.h b/arch/arm/plat-s3c24xx/include/plat/mci.h
new file mode 100644
index 000000000000..2d0852ac3b27
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/mci.h
@@ -0,0 +1,15 @@
+#ifndef _ARCH_MCI_H
+#define _ARCH_MCI_H
+
+struct s3c24xx_mci_pdata {
+        unsigned int    wprotect_invert : 1;
+        unsigned int    detect_invert : 1;   /* set => detect active high. */
+
+        unsigned int    gpio_detect;
+        unsigned int    gpio_wprotect;
+        unsigned long   ocr_avail;
+        void            (*set_power)(unsigned char power_mode,
+                                     unsigned short vdd);
+};
+
+#endif /* _ARCH_NCI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/pll.h b/arch/arm/plat-s3c24xx/include/plat/pll.h
new file mode 100644
index 000000000000..7ea8bffa7a9c
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/pll.h
@@ -0,0 +1,37 @@
+/* linux/arch/arm/plat-s3c24xx/include/plat/pll.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C24xx - common pll registers and code
+ */
+
+#define S3C24XX_PLLCON_MDIVSHIFT        12
+#define S3C24XX_PLLCON_PDIVSHIFT        4
+#define S3C24XX_PLLCON_SDIVSHIFT        0
+#define S3C24XX_PLLCON_MDIVMASK         ((1<<(1+(19-12)))-1)
+#define S3C24XX_PLLCON_PDIVMASK         ((1<<5)-1)
+#define S3C24XX_PLLCON_SDIVMASK         3
+
+#include <asm/div64.h>
+
+static inline unsigned int
+s3c24xx_get_pll(unsigned int pllval, unsigned int baseclk)
+{
+        unsigned int mdiv, pdiv, sdiv;
+        uint64_t fvco;
+
+        mdiv = pllval >> S3C24XX_PLLCON_MDIVSHIFT;
+        pdiv = pllval >> S3C24XX_PLLCON_PDIVSHIFT;
+        sdiv = pllval >> S3C24XX_PLLCON_SDIVSHIFT;
+
+        mdiv &= S3C24XX_PLLCON_MDIVMASK;
+        pdiv &= S3C24XX_PLLCON_PDIVMASK;
+        sdiv &= S3C24XX_PLLCON_SDIVMASK;
+
+        fvco = (uint64_t)baseclk * (mdiv + 8);
+        do_div(fvco, (pdiv + 2) << sdiv);
+
+        return (unsigned int)fvco;
+}
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-spi.h b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
new file mode 100644
index 000000000000..2b35479ee35c
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
@@ -0,0 +1,82 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-spi.h
+ *
+ * Copyright (c) 2004 Fetron GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 SPI register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_SPI_H
+#define __ASM_ARCH_REGS_SPI_H
+
+#define S3C2410_SPI1    (0x20)
+#define S3C2412_SPI1    (0x100)
+
+#define S3C2410_SPCON   (0x00)
+
+#define S3C2412_SPCON_RXFIFO_RB2        (0<<14)
+#define S3C2412_SPCON_RXFIFO_RB4        (1<<14)
+#define S3C2412_SPCON_RXFIFO_RB12       (2<<14)
+#define S3C2412_SPCON_RXFIFO_RB14       (3<<14)
+#define S3C2412_SPCON_TXFIFO_RB2        (0<<12)
+#define S3C2412_SPCON_TXFIFO_RB4        (1<<12)
+#define S3C2412_SPCON_TXFIFO_RB12       (2<<12)
+#define S3C2412_SPCON_TXFIFO_RB14       (3<<12)
+#define S3C2412_SPCON_RXFIFO_RESET      (1<<11) /* RxFIFO reset */
+#define S3C2412_SPCON_TXFIFO_RESET      (1<<10) /* TxFIFO reset */
+#define S3C2412_SPCON_RXFIFO_EN         (1<<9)  /* RxFIFO Enable */
+#define S3C2412_SPCON_TXFIFO_EN         (1<<8)  /* TxFIFO Enable */
+
+#define S3C2412_SPCON_DIRC_RX     (1<<7)
+
+#define S3C2410_SPCON_SMOD_DMA    (2<<5)        /* DMA mode */
+#define S3C2410_SPCON_SMOD_INT    (1<<5)        /* interrupt mode */
+#define S3C2410_SPCON_SMOD_POLL   (0<<5)        /* polling mode */
+#define S3C2410_SPCON_ENSCK       (1<<4)        /* Enable SCK */
+#define S3C2410_SPCON_MSTR        (1<<3)        /* Master/Slave select
+                                                   0: slave, 1: master */
+#define S3C2410_SPCON_CPOL_HIGH   (1<<2)        /* Clock polarity select */
+#define S3C2410_SPCON_CPOL_LOW    (0<<2)        /* Clock polarity select */
+
+#define S3C2410_SPCON_CPHA_FMTB   (1<<1)        /* Clock Phase Select */
+#define S3C2410_SPCON_CPHA_FMTA   (0<<1)        /* Clock Phase Select */
+
+#define S3C2410_SPCON_TAGD        (1<<0)        /* Tx auto garbage data mode */
+
+
+#define S3C2410_SPSTA    (0x04)
+
+#define S3C2412_SPSTA_RXFIFO_AE         (1<<11)
+#define S3C2412_SPSTA_TXFIFO_AE         (1<<10)
+#define S3C2412_SPSTA_RXFIFO_ERROR      (1<<9)
+#define S3C2412_SPSTA_TXFIFO_ERROR      (1<<8)
+#define S3C2412_SPSTA_RXFIFO_FIFO       (1<<7)
+#define S3C2412_SPSTA_RXFIFO_EMPTY      (1<<6)
+#define S3C2412_SPSTA_TXFIFO_NFULL      (1<<5)
+#define S3C2412_SPSTA_TXFIFO_EMPTY      (1<<4)
+
+#define S3C2410_SPSTA_DCOL        (1<<2)        /* Data Collision Error */
+#define S3C2410_SPSTA_MULD        (1<<1)        /* Multi Master Error */
+#define S3C2410_SPSTA_READY       (1<<0)        /* Data Tx/Rx ready */
+#define S3C2412_SPSTA_READY_ORG   (1<<3)
+
+#define S3C2410_SPPIN    (0x08)
+
+#define S3C2410_SPPIN_ENMUL       (1<<2)        /* Multi Master Error detect */
+#define S3C2410_SPPIN_RESERVED    (1<<1)
+#define S3C2400_SPPIN_nCS         (1<<1)        /* SPI Card Select */
+#define S3C2410_SPPIN_KEEP        (1<<0)        /* Master Out keep */
+
+#define S3C2410_SPPRE    (0x0C)
+#define S3C2410_SPTDAT   (0x10)
+#define S3C2410_SPRDAT   (0x14)
+
+#define S3C2412_TXFIFO   (0x18)
+#define S3C2412_RXFIFO   (0x18)
+#define S3C2412_SPFIC    (0x24)
+
+
+#endif /* __ASM_ARCH_REGS_SPI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-udc.h b/arch/arm/plat-s3c24xx/include/plat/regs-udc.h
new file mode 100644
index 000000000000..f0dd4a41b37b
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-udc.h
@@ -0,0 +1,153 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-udc.h
+ *
+ * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at>
+ *
+ * This include file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+*/
+
+#ifndef __ASM_ARCH_REGS_UDC_H
+#define __ASM_ARCH_REGS_UDC_H
+
+#define S3C2410_USBDREG(x) (x)
+
+#define S3C2410_UDC_FUNC_ADDR_REG       S3C2410_USBDREG(0x0140)
+#define S3C2410_UDC_PWR_REG             S3C2410_USBDREG(0x0144)
+#define S3C2410_UDC_EP_INT_REG          S3C2410_USBDREG(0x0148)
+
+#define S3C2410_UDC_USB_INT_REG         S3C2410_USBDREG(0x0158)
+#define S3C2410_UDC_EP_INT_EN_REG       S3C2410_USBDREG(0x015c)
+
+#define S3C2410_UDC_USB_INT_EN_REG      S3C2410_USBDREG(0x016c)
+
+#define S3C2410_UDC_FRAME_NUM1_REG      S3C2410_USBDREG(0x0170)
+#define S3C2410_UDC_FRAME_NUM2_REG      S3C2410_USBDREG(0x0174)
+
+#define S3C2410_UDC_EP0_FIFO_REG        S3C2410_USBDREG(0x01c0)
+#define S3C2410_UDC_EP1_FIFO_REG        S3C2410_USBDREG(0x01c4)
+#define S3C2410_UDC_EP2_FIFO_REG        S3C2410_USBDREG(0x01c8)
+#define S3C2410_UDC_EP3_FIFO_REG        S3C2410_USBDREG(0x01cc)
+#define S3C2410_UDC_EP4_FIFO_REG        S3C2410_USBDREG(0x01d0)
+
+#define S3C2410_UDC_EP1_DMA_CON         S3C2410_USBDREG(0x0200)
+#define S3C2410_UDC_EP1_DMA_UNIT        S3C2410_USBDREG(0x0204)
+#define S3C2410_UDC_EP1_DMA_FIFO        S3C2410_USBDREG(0x0208)
+#define S3C2410_UDC_EP1_DMA_TTC_L       S3C2410_USBDREG(0x020c)
+#define S3C2410_UDC_EP1_DMA_TTC_M       S3C2410_USBDREG(0x0210)
+#define S3C2410_UDC_EP1_DMA_TTC_H       S3C2410_USBDREG(0x0214)
+
+#define S3C2410_UDC_EP2_DMA_CON         S3C2410_USBDREG(0x0218)
+#define S3C2410_UDC_EP2_DMA_UNIT        S3C2410_USBDREG(0x021c)
+#define S3C2410_UDC_EP2_DMA_FIFO        S3C2410_USBDREG(0x0220)
+#define S3C2410_UDC_EP2_DMA_TTC_L       S3C2410_USBDREG(0x0224)
+#define S3C2410_UDC_EP2_DMA_TTC_M       S3C2410_USBDREG(0x0228)
+#define S3C2410_UDC_EP2_DMA_TTC_H       S3C2410_USBDREG(0x022c)
+
+#define S3C2410_UDC_EP3_DMA_CON         S3C2410_USBDREG(0x0240)
+#define S3C2410_UDC_EP3_DMA_UNIT        S3C2410_USBDREG(0x0244)
+#define S3C2410_UDC_EP3_DMA_FIFO        S3C2410_USBDREG(0x0248)
+#define S3C2410_UDC_EP3_DMA_TTC_L       S3C2410_USBDREG(0x024c)
+#define S3C2410_UDC_EP3_DMA_TTC_M       S3C2410_USBDREG(0x0250)
+#define S3C2410_UDC_EP3_DMA_TTC_H       S3C2410_USBDREG(0x0254)
+
+#define S3C2410_UDC_EP4_DMA_CON         S3C2410_USBDREG(0x0258)
+#define S3C2410_UDC_EP4_DMA_UNIT        S3C2410_USBDREG(0x025c)
+#define S3C2410_UDC_EP4_DMA_FIFO        S3C2410_USBDREG(0x0260)
+#define S3C2410_UDC_EP4_DMA_TTC_L       S3C2410_USBDREG(0x0264)
+#define S3C2410_UDC_EP4_DMA_TTC_M       S3C2410_USBDREG(0x0268)
+#define S3C2410_UDC_EP4_DMA_TTC_H       S3C2410_USBDREG(0x026c)
+
+#define S3C2410_UDC_INDEX_REG           S3C2410_USBDREG(0x0178)
+
+/* indexed registers */
+
+#define S3C2410_UDC_MAXP_REG            S3C2410_USBDREG(0x0180)
+
+#define S3C2410_UDC_EP0_CSR_REG         S3C2410_USBDREG(0x0184)
+
+#define S3C2410_UDC_IN_CSR1_REG         S3C2410_USBDREG(0x0184)
+#define S3C2410_UDC_IN_CSR2_REG         S3C2410_USBDREG(0x0188)
+
+#define S3C2410_UDC_OUT_CSR1_REG        S3C2410_USBDREG(0x0190)
+#define S3C2410_UDC_OUT_CSR2_REG        S3C2410_USBDREG(0x0194)
+#define S3C2410_UDC_OUT_FIFO_CNT1_REG   S3C2410_USBDREG(0x0198)
+#define S3C2410_UDC_OUT_FIFO_CNT2_REG   S3C2410_USBDREG(0x019c)
+
+#define S3C2410_UDC_FUNCADDR_UPDATE     (1<<7)
+
+#define S3C2410_UDC_PWR_ISOUP           (1<<7) // R/W
+#define S3C2410_UDC_PWR_RESET           (1<<3) // R
+#define S3C2410_UDC_PWR_RESUME          (1<<2) // R/W
+#define S3C2410_UDC_PWR_SUSPEND         (1<<1) // R
+#define S3C2410_UDC_PWR_ENSUSPEND       (1<<0) // R/W
+
+#define S3C2410_UDC_PWR_DEFAULT         0x00
+
+#define S3C2410_UDC_INT_EP4             (1<<4) // R/W (clear only)
+#define S3C2410_UDC_INT_EP3             (1<<3) // R/W (clear only)
+#define S3C2410_UDC_INT_EP2             (1<<2) // R/W (clear only)
+#define S3C2410_UDC_INT_EP1             (1<<1) // R/W (clear only)
+#define S3C2410_UDC_INT_EP0             (1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_USBINT_RESET        (1<<2) // R/W (clear only)
+#define S3C2410_UDC_USBINT_RESUME       (1<<1) // R/W (clear only)
+#define S3C2410_UDC_USBINT_SUSPEND      (1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_INTE_EP4            (1<<4) // R/W
+#define S3C2410_UDC_INTE_EP3            (1<<3) // R/W
+#define S3C2410_UDC_INTE_EP2            (1<<2) // R/W
+#define S3C2410_UDC_INTE_EP1            (1<<1) // R/W
+#define S3C2410_UDC_INTE_EP0            (1<<0) // R/W
+
+#define S3C2410_UDC_USBINTE_RESET       (1<<2) // R/W
+#define S3C2410_UDC_USBINTE_SUSPEND     (1<<0) // R/W
+
+
+#define S3C2410_UDC_INDEX_EP0           (0x00)
+#define S3C2410_UDC_INDEX_EP1           (0x01) // ??
+#define S3C2410_UDC_INDEX_EP2           (0x02) // ??
+#define S3C2410_UDC_INDEX_EP3           (0x03) // ??
+#define S3C2410_UDC_INDEX_EP4           (0x04) // ??
+
+#define S3C2410_UDC_ICSR1_CLRDT         (1<<6) // R/W
+#define S3C2410_UDC_ICSR1_SENTSTL       (1<<5) // R/W (clear only)
+#define S3C2410_UDC_ICSR1_SENDSTL       (1<<4) // R/W
+#define S3C2410_UDC_ICSR1_FFLUSH        (1<<3) // W   (set only)
+#define S3C2410_UDC_ICSR1_UNDRUN        (1<<2) // R/W (clear only)
+#define S3C2410_UDC_ICSR1_PKTRDY        (1<<0) // R/W (set only)
+
+#define S3C2410_UDC_ICSR2_AUTOSET       (1<<7) // R/W
+#define S3C2410_UDC_ICSR2_ISO           (1<<6) // R/W
+#define S3C2410_UDC_ICSR2_MODEIN        (1<<5) // R/W
+#define S3C2410_UDC_ICSR2_DMAIEN        (1<<4) // R/W
+
+#define S3C2410_UDC_OCSR1_CLRDT         (1<<7) // R/W
+#define S3C2410_UDC_OCSR1_SENTSTL       (1<<6) // R/W (clear only)
+#define S3C2410_UDC_OCSR1_SENDSTL       (1<<5) // R/W
+#define S3C2410_UDC_OCSR1_FFLUSH        (1<<4) // R/W
+#define S3C2410_UDC_OCSR1_DERROR        (1<<3) // R
+#define S3C2410_UDC_OCSR1_OVRRUN        (1<<2) // R/W (clear only)
+#define S3C2410_UDC_OCSR1_PKTRDY        (1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_OCSR2_AUTOCLR       (1<<7) // R/W
+#define S3C2410_UDC_OCSR2_ISO           (1<<6) // R/W
+#define S3C2410_UDC_OCSR2_DMAIEN        (1<<5) // R/W
+
+#define S3C2410_UDC_EP0_CSR_OPKRDY      (1<<0)
+#define S3C2410_UDC_EP0_CSR_IPKRDY      (1<<1)
+#define S3C2410_UDC_EP0_CSR_SENTSTL     (1<<2)
+#define S3C2410_UDC_EP0_CSR_DE          (1<<3)
+#define S3C2410_UDC_EP0_CSR_SE          (1<<4)
+#define S3C2410_UDC_EP0_CSR_SENDSTL     (1<<5)
+#define S3C2410_UDC_EP0_CSR_SOPKTRDY    (1<<6)
+#define S3C2410_UDC_EP0_CSR_SSE (1<<7)
+
+#define S3C2410_UDC_MAXP_8              (1<<0)
+#define S3C2410_UDC_MAXP_16             (1<<1)
+#define S3C2410_UDC_MAXP_32             (1<<2)
+#define S3C2410_UDC_MAXP_64             (1<<3)
+
+
+#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2400.h b/arch/arm/plat-s3c24xx/include/plat/s3c2400.h
index 3a5a16821af8..b3feaea5c70b 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2400.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2400.h
@@ -17,7 +17,7 @@
 
 extern  int s3c2400_init(void);
 
-extern void s3c2400_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2400_map_io(void);
 
 extern void s3c2400_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
index 3cd1ec677b3f..a9ac9e29759e 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
@@ -15,7 +15,7 @@
 
 extern  int s3c2410_init(void);
 
-extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2410_map_io(void);
 
 extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2412.h b/arch/arm/plat-s3c24xx/include/plat/s3c2412.h
index 3ec97685e781..bb15d3b68be5 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2412.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2412.h
@@ -14,7 +14,7 @@
 
 extern  int s3c2412_init(void);
 
-extern void s3c2412_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2412_map_io(void);
 
 extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
index 11d83b5c84e6..815b107ed890 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
@@ -16,7 +16,7 @@ struct s3c2410_uartcfg;
 
 extern  int s3c2443_init(void);
 
-extern void s3c2443_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2443_map_io(void);
 
 extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 
diff --git a/arch/arm/plat-s3c24xx/include/plat/udc.h b/arch/arm/plat-s3c24xx/include/plat/udc.h
new file mode 100644
index 000000000000..546bb4008f49
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/udc.h
@@ -0,0 +1,36 @@
+/* arch/arm/mach-s3c2410/include/mach/udc.h
+ *
+ * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ *  Changelog:
+ *      14-Mar-2005     RTP     Created file
+ *      02-Aug-2005     RTP     File rename
+ *      07-Sep-2005     BJD     Minor cleanups, changed cmd to enum
+ *      18-Jan-2007     HMW     Add per-platform vbus_draw function
+*/
+
+#ifndef __ASM_ARM_ARCH_UDC_H
+#define __ASM_ARM_ARCH_UDC_H
+
+enum s3c2410_udc_cmd_e {
+        S3C2410_UDC_P_ENABLE    = 1,    /* Pull-up enable        */
+        S3C2410_UDC_P_DISABLE   = 2,    /* Pull-up disable       */
+        S3C2410_UDC_P_RESET     = 3,    /* UDC reset, in case of */
+};
+
+struct s3c2410_udc_mach_info {
+        void    (*udc_command)(enum s3c2410_udc_cmd_e);
+        void    (*vbus_draw)(unsigned int ma);
+        unsigned int vbus_pin;
+        unsigned char vbus_pin_inverted;
+};
+
+extern void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *);
+
+#endif /* __ASM_ARM_ARCH_UDC_H */
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index 963f7a4f26f2..0192ecdc1442 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -62,6 +62,7 @@
 
 #include <asm/mach/irq.h>
 
+#include <plat/regs-irqtype.h>
 #include <mach/regs-irq.h>
 #include <mach/regs-gpio.h>
 
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c
index 8efb57ad5019..34ef18e5b2a1 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/plat-s3c24xx/pm.c
@@ -33,7 +33,6 @@
 #include <linux/interrupt.h>
 #include <linux/crc32.h>
 #include <linux/ioport.h>
-#include <linux/delay.h>
 #include <linux/serial_core.h>
 #include <linux/io.h>
 
@@ -76,11 +75,13 @@ static struct sleep_save core_save[] = {
         SAVE_ITEM(S3C2410_BANKCON4),
         SAVE_ITEM(S3C2410_BANKCON5),
 
+#ifndef CONFIG_CPU_FREQ
         SAVE_ITEM(S3C2410_CLKDIVN),
         SAVE_ITEM(S3C2410_MPLLCON),
+        SAVE_ITEM(S3C2410_REFRESH),
+#endif
         SAVE_ITEM(S3C2410_UPLLCON),
         SAVE_ITEM(S3C2410_CLKSLOW),
-        SAVE_ITEM(S3C2410_REFRESH),
 };
 
 static struct gpio_sleep {
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/plat-s3c24xx/s3c2410-clock.c
index 4e07943c1e29..b61bdb793734 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2410-clock.c
@@ -272,5 +272,6 @@ int __init s3c2410_baseclk_add(void)
                (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
                (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
 
+        s3c_pwmclk_init();
         return 0;
 }
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c
index 7c09773ff9fc..dde41f171aff 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c
@@ -31,7 +31,6 @@
 #include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/mutex.h>
 #include <linux/clk.h>
 #include <linux/io.h>
 
@@ -102,13 +101,13 @@ static int s3c244x_clk_add(struct sys_device *sysdev)
         if (clk_get_rate(clock_upll) > (94 * MHZ)) {
                 clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
 
-                mutex_lock(&clocks_mutex);
+                spin_lock(&clocks_lock);
 
                 clkdivn = __raw_readl(S3C2410_CLKDIVN);
                 clkdivn |= S3C2440_CLKDIVN_UCLK;
                 __raw_writel(clkdivn, S3C2410_CLKDIVN);
 
-                mutex_unlock(&clocks_mutex);
+                spin_unlock(&clocks_lock);
         }
 
         return 0;
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c
index c0344fac4a94..c1de6bb0101b 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/plat-s3c24xx/s3c244x.c
@@ -29,6 +29,8 @@
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
+#include <plat/cpu-freq.h>
+
 #include <mach/regs-clock.h>
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
@@ -42,6 +44,7 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
+#include <plat/pll.h>
 
 static struct map_desc s3c244x_iodesc[] __initdata = {
         IODESC_ENT(CLKPWR),
@@ -56,32 +59,34 @@ void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
         s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
 }
 
-void __init s3c244x_map_io(struct map_desc *mach_desc, int size)
+void __init s3c244x_map_io(void)
 {
         /* register our io-tables */
 
         iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
-        iotable_init(mach_desc, size);
 
         /* rename any peripherals used differing from the s3c2410 */
 
         s3c_device_sdi.name  = "s3c2440-sdi";
-        s3c_device_i2c.name  = "s3c2440-i2c";
+        s3c_device_i2c0.name  = "s3c2440-i2c";
         s3c_device_nand.name = "s3c2440-nand";
         s3c_device_usbgadget.name = "s3c2440-usbgadget";
 }
 
-void __init s3c244x_init_clocks(int xtal)
+void __init_or_cpufreq s3c244x_setup_clocks(void)
 {
+        struct clk *xtal_clk;
         unsigned long clkdiv;
         unsigned long camdiv;
+        unsigned long xtal;
         unsigned long hclk, fclk, pclk;
         int hdiv = 1;
 
-        /* now we've got our machine bits initialised, work out what
-         * clocks we've got */
+        xtal_clk = clk_get(NULL, "xtal");
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
 
-        fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
+        fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
 
         clkdiv = __raw_readl(S3C2410_CLKDIVN);
         camdiv = __raw_readl(S3C2440_CAMDIVN);
@@ -107,18 +112,24 @@ void __init s3c244x_init_clocks(int xtal)
         }
 
         hclk = fclk / hdiv;
-        pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
+        pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
 
         /* print brief summary of clocks, etc */
 
         printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
                print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
 
+        s3c24xx_setup_clocks(fclk, hclk, pclk);
+}
+
+void __init s3c244x_init_clocks(int xtal)
+{
         /* initialise the clocks here, to allow other things like the
          * console to use them, and to add new ones after the initialisation
          */
 
-        s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
+        s3c24xx_register_baseclocks(xtal);
+        s3c244x_setup_clocks();
         s3c2410_baseclk_add();
 }
 
diff --git a/arch/arm/plat-s3c24xx/s3c244x.h b/arch/arm/plat-s3c24xx/s3c244x.h
index f8ed17676a35..6aab5eaae2b4 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.h
+++ b/arch/arm/plat-s3c24xx/s3c244x.h
@@ -12,7 +12,7 @@
 
 #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
 
-extern void s3c244x_map_io(struct map_desc *mach_desc, int size);
+extern void s3c244x_map_io(void);
 
 extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 
diff --git a/arch/arm/plat-s3c24xx/setup-i2c.c b/arch/arm/plat-s3c24xx/setup-i2c.c
new file mode 100644
index 000000000000..d62b7e7fb355
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/setup-i2c.c
@@ -0,0 +1,25 @@
+/* linux/arch/arm/plat-s3c24xx/setup-i2c.c
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX Base setup for i2c device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+
+struct platform_device;
+
+#include <plat/iic.h>
+#include <mach/hardware.h>
+#include <mach/regs-gpio.h>
+
+void s3c_i2c0_cfg_gpio(struct platform_device *dev)
+{
+        s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
+        s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
+}
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
new file mode 100644
index 000000000000..8b403cbb53d2
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
@@ -0,0 +1,37 @@
+/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX SPI - gpio configuration for bus 0 on gpe11,12,13
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+*/
+
+#include <linux/kernel.h>
+
+#include <mach/hardware.h>
+
+#include <mach/spi.h>
+#include <mach/regs-gpio.h>
+
+void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
+                                          int enable)
+{
+        if (enable) {
+                s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_SPICLK0);
+                s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_SPIMOSI0);
+                s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_SPIMISO0);
+                s3c2410_gpio_pullup(S3C2410_GPE11, 0);
+                s3c2410_gpio_pullup(S3C2410_GPE13, 0);
+        } else {
+                s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPIO_INPUT);
+                s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPIO_INPUT);
+                s3c2410_gpio_pullup(S3C2410_GPE11, 1);
+                s3c2410_gpio_pullup(S3C2410_GPE12, 1);
+                s3c2410_gpio_pullup(S3C2410_GPE13, 1);
+        }
+}
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
new file mode 100644
index 000000000000..8fccd4e549f0
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
@@ -0,0 +1,37 @@
+/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpg5_6_7.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX SPI - gpio configuration for bus 1 on gpg5,6,7
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+*/
+
+#include <linux/kernel.h>
+
+#include <mach/hardware.h>
+
+#include <mach/spi.h>
+#include <mach/regs-gpio.h>
+
+void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
+                                       int enable)
+{
+        if (enable) {
+                s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_SPICLK1);
+                s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_SPIMOSI1);
+                s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_SPIMISO1);
+                s3c2410_gpio_pullup(S3C2410_GPG5, 0);
+                s3c2410_gpio_pullup(S3C2410_GPG6, 0);
+        } else {
+                s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPIO_INPUT);
+                s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPIO_INPUT);
+                s3c2410_gpio_pullup(S3C2410_GPG5, 1);
+                s3c2410_gpio_pullup(S3C2410_GPG6, 1);
+                s3c2410_gpio_pullup(S3C2410_GPG7, 1);
+        }
+}
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
new file mode 100644
index 000000000000..54375a00a7d2
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/Kconfig
@@ -0,0 +1,62 @@
+# arch/arm/plat-s3c64xx/Kconfig
+#
+# Copyright 2008 Openmoko, Inc.
+# Copyright 2008 Simtec Electronics
+#       Ben Dooks <ben@simtec.co.uk>
+#
+# Licensed under GPLv2
+
+config PLAT_S3C64XX
+        bool
+        depends on ARCH_S3C64XX
+        default y
+        select CPU_V6
+        select PLAT_S3C
+        select ARM_VIC
+        select NO_IOPORT
+        select ARCH_REQUIRE_GPIOLIB
+        select S3C_GPIO_TRACK
+        select S3C_GPIO_PULL_UPDOWN
+        select S3C_GPIO_CFG_S3C24XX
+        select S3C_GPIO_CFG_S3C64XX
+        help
+          Base platform code for any Samsung S3C64XX device
+
+if PLAT_S3C64XX
+
+# Configuration options shared by all S3C64XX implementations
+
+config CPU_S3C6400_INIT
+        bool
+        help
+          Common initialisation code for the S3C6400 that is shared
+          by other CPUs in the series, such as the S3C6410.
+
+config CPU_S3C6400_CLOCK
+        bool
+        help
+          Common clock support code for the S3C6400 that is shared
+          by other CPUs in the series, such as the S3C6410.
+
+# platform specific device setup
+
+config S3C64XX_SETUP_I2C0
+        bool
+        default y
+        help
+          Common setup code for i2c bus 0.
+
+          Note, currently since i2c0 is always compiled, this setup helper
+          is always compiled with it.
+
+config S3C64XX_SETUP_I2C1
+        bool
+        help
+          Common setup code for i2c bus 1.
+
+config S3C64XX_SETUP_FB_24BPP
+        bool
+        help
+          Common setup code for S3C64XX with an 24bpp RGB display helper.
+
+endif
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile
new file mode 100644
index 000000000000..2e6d79bf8f33
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/Makefile
@@ -0,0 +1,31 @@
+# arch/arm/plat-s3c64xx/Makefile
+#
+# Copyright 2008 Openmoko, Inc.
+# Copyright 2008 Simtec Electronics
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           := dummy.o
+obj-                            :=
+
+# Core files
+
+obj-y                           += dev-uart.o
+obj-y                           += cpu.o
+obj-y                           += irq.o
+obj-y                           += irq-eint.o
+obj-y                           += clock.o
+obj-y                           += gpiolib.o
+
+# CPU support
+
+obj-$(CONFIG_CPU_S3C6400_INIT)  += s3c6400-init.o
+obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o
+
+# Device setup
+
+obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
+obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
+obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
new file mode 100644
index 000000000000..136c982c68e1
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/clock.c
@@ -0,0 +1,281 @@
+/* linux/arch/arm/plat-s3c64xx/clock.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX Base clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <plat/regs-sys.h>
+#include <plat/regs-clock.h>
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+
+struct clk clk_27m = {
+        .name           = "clk_27m",
+        .id             = -1,
+        .rate           = 27000000,
+};
+
+static int clk_48m_ctrl(struct clk *clk, int enable)
+{
+        unsigned long flags;
+        u32 val;
+
+        /* can't rely on clock lock, this register has other usages */
+        local_irq_save(flags);
+
+        val = __raw_readl(S3C64XX_OTHERS);
+        if (enable)
+                val |= S3C64XX_OTHERS_USBMASK;
+        else
+                val &= ~S3C64XX_OTHERS_USBMASK;
+
+        __raw_writel(val, S3C64XX_OTHERS);
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+struct clk clk_48m = {
+        .name           = "clk_48m",
+        .id             = -1,
+        .rate           = 48000000,
+        .enable         = clk_48m_ctrl,
+};
+
+static int inline s3c64xx_gate(void __iomem *reg,
+                                struct clk *clk,
+                                int enable)
+{
+        unsigned int ctrlbit = clk->ctrlbit;
+        u32 con;
+
+        con = __raw_readl(reg);
+
+        if (enable)
+                con |= ctrlbit;
+        else
+                con &= ~ctrlbit;
+
+        __raw_writel(con, reg);
+        return 0;
+}
+
+static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
+}
+
+static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
+}
+
+int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
+}
+
+static struct clk init_clocks_disable[] = {
+        {
+                .name           = "nand",
+                .id             = -1,
+                .parent         = &clk_h,
+        }, {
+                .name           = "adc",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
+        }, {
+                .name           = "i2c",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIC,
+        }, {
+                .name           = "iis",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIS0,
+        }, {
+                .name           = "iis",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIS1,
+        }, {
+                .name           = "spi",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_SPI0,
+        }, {
+                .name           = "spi",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_SPI1,
+        }, {
+                .name           = "48m",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC0_48,
+        }, {
+                .name           = "48m",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC1_48,
+        }, {
+                .name           = "48m",
+                .id             = 2,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC2_48,
+        },
+};
+
+static struct clk init_clocks[] = {
+        {
+                .name           = "lcd",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_LCD,
+        }, {
+                .name           = "gpio",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_GPIO,
+        }, {
+                .name           = "usb-host",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
+        }, {
+                .name           = "hsmmc",
+                .id             = 0,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC0,
+        }, {
+                .name           = "hsmmc",
+                .id             = 1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC1,
+        }, {
+                .name           = "hsmmc",
+                .id             = 2,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC2,
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_PWM,
+        }, {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART0,
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART1,
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART2,
+        }, {
+                .name           = "uart",
+                .id             = 3,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART3,
+        }, {
+                .name           = "rtc",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_RTC,
+        }, {
+                .name           = "watchdog",
+                .id             = -1,
+                .parent         = &clk_p,
+                .ctrlbit        = S3C_CLKCON_PCLK_WDT,
+        }, {
+                .name           = "ac97",
+                .id             = -1,
+                .parent         = &clk_p,
+                .ctrlbit        = S3C_CLKCON_PCLK_AC97,
+        }
+};
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_epll,
+        &clk_27m,
+        &clk_48m,
+};
+
+void s3c64xx_register_clocks(void)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+
+        clkp = init_clocks;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+        }
+
+        clkp = init_clocks_disable;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+
+                (clkp->enable)(clkp, 0);
+        }
+
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/plat-s3c64xx/cpu.c
new file mode 100644
index 000000000000..fbde183a4560
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/cpu.c
@@ -0,0 +1,114 @@
+/* linux/arch/arm/plat-s3c64xx/cpu.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX CPU Support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <plat/regs-serial.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+
+#include <plat/s3c6400.h>
+#include <plat/s3c6410.h>
+
+/* table of supported CPUs */
+
+static const char name_s3c6400[] = "S3C6400";
+static const char name_s3c6410[] = "S3C6410";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = 0x36400000,
+                .idmask         = 0xfffff000,
+                .map_io         = s3c6400_map_io,
+                .init_clocks    = s3c6400_init_clocks,
+                .init_uarts     = s3c6400_init_uarts,
+                .init           = s3c6400_init,
+                .name           = name_s3c6400,
+        }, {
+                .idcode         = 0x36410100,
+                .idmask         = 0xffffff00,
+                .map_io         = s3c6410_map_io,
+                .init_clocks    = s3c6410_init_clocks,
+                .init_uarts     = s3c6410_init_uarts,
+                .init           = s3c6410_init,
+                .name           = name_s3c6410,
+        },
+};
+
+/* minimal IO mapping */
+
+/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
+#define UART_OFFS (S3C_PA_UART & 0xfffff)
+
+static struct map_desc s3c_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_SYSCON),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)(S3C_VA_UART + UART_OFFS),
+                .pfn            = __phys_to_pfn(S3C_PA_UART),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_VIC0,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_VIC1,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S3C_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C64XX_VA_GPIO,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_GPIO),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+/* read cpu identification code */
+
+void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
+{
+        unsigned long idcode;
+
+        /* initialise the io descriptors we need for initialisation */
+        iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
+        iotable_init(mach_desc, size);
+
+        idcode = __raw_readl(S3C_VA_SYS + 0x118);
+        s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
diff --git a/arch/arm/plat-s3c64xx/dev-uart.c b/arch/arm/plat-s3c64xx/dev-uart.c
new file mode 100644
index 000000000000..62c11a6fc7ba
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/dev-uart.c
@@ -0,0 +1,176 @@
+/* linux/arch/arm/plat-s3c64xx/dev-uart.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Base S3C64XX UART resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <plat/devs.h>
+
+/* Serial port registrations */
+
+/* 64xx uarts are closer together */
+
+static struct resource s3c64xx_uart0_resource[] = {
+        [0] = {
+                .start  = S3C_PA_UART0,
+                .end    = S3C_PA_UART0 + 0x100,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S3CUART_RX0,
+                .end    = IRQ_S3CUART_RX0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S3CUART_TX0,
+                .end    = IRQ_S3CUART_TX0,
+                .flags  = IORESOURCE_IRQ,
+
+        },
+        [3] = {
+                .start  = IRQ_S3CUART_ERR0,
+                .end    = IRQ_S3CUART_ERR0,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+static struct resource s3c64xx_uart1_resource[] = {
+        [0] = {
+                .start = S3C_PA_UART1,
+                .end   = S3C_PA_UART1 + 0x100,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S3CUART_RX1,
+                .end    = IRQ_S3CUART_RX1,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S3CUART_TX1,
+                .end    = IRQ_S3CUART_TX1,
+                .flags  = IORESOURCE_IRQ,
+
+        },
+        [3] = {
+                .start  = IRQ_S3CUART_ERR1,
+                .end    = IRQ_S3CUART_ERR1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource s3c6xx_uart2_resource[] = {
+        [0] = {
+                .start = S3C_PA_UART2,
+                .end   = S3C_PA_UART2 + 0x100,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S3CUART_RX2,
+                .end    = IRQ_S3CUART_RX2,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S3CUART_TX2,
+                .end    = IRQ_S3CUART_TX2,
+                .flags  = IORESOURCE_IRQ,
+
+        },
+        [3] = {
+                .start  = IRQ_S3CUART_ERR2,
+                .end    = IRQ_S3CUART_ERR2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource s3c64xx_uart3_resource[] = {
+        [0] = {
+                .start = S3C_PA_UART3,
+                .end   = S3C_PA_UART3 + 0x100,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S3CUART_RX3,
+                .end    = IRQ_S3CUART_RX3,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S3CUART_TX3,
+                .end    = IRQ_S3CUART_TX3,
+                .flags  = IORESOURCE_IRQ,
+
+        },
+        [3] = {
+                .start  = IRQ_S3CUART_ERR3,
+                .end    = IRQ_S3CUART_ERR3,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+
+struct s3c24xx_uart_resources s3c64xx_uart_resources[] __initdata = {
+        [0] = {
+                .resources      = s3c64xx_uart0_resource,
+                .nr_resources   = ARRAY_SIZE(s3c64xx_uart0_resource),
+        },
+        [1] = {
+                .resources      = s3c64xx_uart1_resource,
+                .nr_resources   = ARRAY_SIZE(s3c64xx_uart1_resource),
+        },
+        [2] = {
+                .resources      = s3c6xx_uart2_resource,
+                .nr_resources   = ARRAY_SIZE(s3c6xx_uart2_resource),
+        },
+        [3] = {
+                .resources      = s3c64xx_uart3_resource,
+                .nr_resources   = ARRAY_SIZE(s3c64xx_uart3_resource),
+        },
+};
+
+/* uart devices */
+
+static struct platform_device s3c24xx_uart_device0 = {
+        .id             = 0,
+};
+
+static struct platform_device s3c24xx_uart_device1 = {
+        .id             = 1,
+};
+
+static struct platform_device s3c24xx_uart_device2 = {
+        .id             = 2,
+};
+
+static struct platform_device s3c24xx_uart_device3 = {
+        .id             = 3,
+};
+
+struct platform_device *s3c24xx_uart_src[4] = {
+        &s3c24xx_uart_device0,
+        &s3c24xx_uart_device1,
+        &s3c24xx_uart_device2,
+        &s3c24xx_uart_device3,
+};
+
+struct platform_device *s3c24xx_uart_devs[4] = {
+};
+
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c
new file mode 100644
index 000000000000..cc62941d7b5c
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/gpiolib.c
@@ -0,0 +1,420 @@
+/* arch/arm/plat-s3c64xx/gpiolib.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - GPIOlib support 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <mach/gpio.h>
+#include <mach/gpio-core.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/gpio-cfg-helpers.h>
+#include <plat/regs-gpio.h>
+
+/* GPIO bank summary:
+ *
+ * Bank GPIOs   Style   SlpCon  ExtInt Group
+ * A    8       4Bit    Yes     1
+ * B    7       4Bit    Yes     1
+ * C    8       4Bit    Yes     2
+ * D    5       4Bit    Yes     3
+ * E    5       4Bit    Yes     None
+ * F    16      2Bit    Yes     4 [1]
+ * G    7       4Bit    Yes     5
+ * H    10      4Bit[2] Yes     6
+ * I    16      2Bit    Yes     None
+ * J    12      2Bit    Yes     None
+ * K    16      4Bit[2] No      None
+ * L    15      4Bit[2] No      None
+ * M    6       4Bit    No      IRQ_EINT
+ * N    16      2Bit    No      IRQ_EINT
+ * O    16      2Bit    Yes     7
+ * P    15      2Bit    Yes     8
+ * Q    9       2Bit    Yes     9
+ *
+ * [1] BANKF pins 14,15 do not form part of the external interrupt sources
+ * [2] BANK has two control registers, GPxCON0 and GPxCON1
+ */
+
+#define OFF_GPCON       (0x00)
+#define OFF_GPDAT       (0x04)
+
+#define con_4bit_shift(__off) ((__off) * 4)
+
+#if 1
+#define gpio_dbg(x...) do { } while(0)
+#else
+#define gpio_dbg(x...) printk(KERN_DEBUG ## x)
+#endif
+
+/* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where
+ * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
+ * following example:
+ *
+ * base + 0x00: Control register, 4 bits per gpio
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x04: Data register, 1 bit per gpio
+ *              bit n: data bit n
+ *
+ * Note, since the data register is one bit per gpio and is at base + 0x4
+ * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
+ * the output.
+*/
+
+static int s3c64xx_gpiolib_4bit_input(struct gpio_chip *chip, unsigned offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long con;
+
+        con = __raw_readl(base + OFF_GPCON);
+        con &= ~(0xf << con_4bit_shift(offset));
+        __raw_writel(con, base + OFF_GPCON);
+
+        gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
+
+        return 0;
+}
+
+static int s3c64xx_gpiolib_4bit_output(struct gpio_chip *chip,
+                                       unsigned offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long con;
+        unsigned long dat;
+
+        con = __raw_readl(base + OFF_GPCON);
+        con &= ~(0xf << con_4bit_shift(offset));
+        con |= 0x1 << con_4bit_shift(offset);
+
+        dat = __raw_readl(base + OFF_GPDAT);
+        if (value)
+                dat |= 1 << offset;
+        else
+                dat &= ~(1 << offset);
+
+        __raw_writel(dat, base + OFF_GPDAT);
+        __raw_writel(con, base + OFF_GPCON);
+        __raw_writel(dat, base + OFF_GPDAT);
+
+        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
+
+        return 0;
+}
+
+/* The next set of routines are for the case where the GPIO configuration
+ * registers are 4 bits per GPIO but there is more than one register (the
+ * bank has more than 8 GPIOs.
+ *
+ * This case is the similar to the 4 bit case, but the registers are as
+ * follows:
+ *
+ * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x08: Data register, 1 bit per gpio
+ *              bit n: data bit n
+ *
+ * To allow us to use the s3c_gpiolib_get and s3c_gpiolib_set routines we
+ * store the 'base + 0x4' address so that these routines see the data
+ * register at ourchip->base + 0x04.
+*/
+
+static int s3c64xx_gpiolib_4bit2_input(struct gpio_chip *chip, unsigned offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+
+        if (offset > 7)
+                offset -= 8;
+        else
+                regcon -= 4;
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(offset));
+        __raw_writel(con, regcon);
+
+        gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con);
+
+        return 0;
+
+}
+
+static int s3c64xx_gpiolib_4bit2_output(struct gpio_chip *chip,
+                                       unsigned offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+        unsigned long dat;
+
+        if (offset > 7)
+                offset -= 8;
+        else
+                regcon -= 4;
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(offset));
+        con |= 0x1 << con_4bit_shift(offset);
+
+        dat = __raw_readl(base + OFF_GPDAT);
+        if (value)
+                dat |= 1 << offset;
+        else
+                dat &= ~(1 << offset);
+
+        __raw_writel(dat, base + OFF_GPDAT);
+        __raw_writel(con, regcon);
+        __raw_writel(dat, base + OFF_GPDAT);
+
+        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
+
+        return 0;
+}
+
+static struct s3c_gpio_cfg gpio_4bit_cfg_noint = {
+        .set_config     = s3c_gpio_setcfg_s3c64xx_4bit,
+        .set_pull       = s3c_gpio_setpull_updown,
+        .get_pull       = s3c_gpio_getpull_updown,
+};
+
+static struct s3c_gpio_cfg gpio_4bit_cfg_eint0111 = {
+        .cfg_eint       = 7,
+        .set_config     = s3c_gpio_setcfg_s3c64xx_4bit,
+        .set_pull       = s3c_gpio_setpull_updown,
+        .get_pull       = s3c_gpio_getpull_updown,
+};
+
+static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = {
+        .cfg_eint       = 3,
+        .set_config     = s3c_gpio_setcfg_s3c64xx_4bit,
+        .set_pull       = s3c_gpio_setpull_updown,
+        .get_pull       = s3c_gpio_getpull_updown,
+};
+
+static struct s3c_gpio_chip gpio_4bit[] = {
+        {
+                .base   = S3C64XX_GPA_BASE,
+                .config = &gpio_4bit_cfg_eint0111,
+                .chip   = {
+                        .base   = S3C64XX_GPA(0),
+                        .ngpio  = S3C64XX_GPIO_A_NR,
+                        .label  = "GPA",
+                },
+        }, {
+                .base   = S3C64XX_GPB_BASE,
+                .config = &gpio_4bit_cfg_eint0111,
+                .chip   = {
+                        .base   = S3C64XX_GPB(0),
+                        .ngpio  = S3C64XX_GPIO_B_NR,
+                        .label  = "GPB",
+                },
+        }, {
+                .base   = S3C64XX_GPC_BASE,
+                .config = &gpio_4bit_cfg_eint0111,
+                .chip   = {
+                        .base   = S3C64XX_GPC(0),
+                        .ngpio  = S3C64XX_GPIO_C_NR,
+                        .label  = "GPC",
+                },
+        }, {
+                .base   = S3C64XX_GPD_BASE,
+                .config = &gpio_4bit_cfg_eint0111,
+                .chip   = {
+                        .base   = S3C64XX_GPD(0),
+                        .ngpio  = S3C64XX_GPIO_D_NR,
+                        .label  = "GPD",
+                },
+        }, {
+                .base   = S3C64XX_GPE_BASE,
+                .config = &gpio_4bit_cfg_noint,
+                .chip   = {
+                        .base   = S3C64XX_GPE(0),
+                        .ngpio  = S3C64XX_GPIO_E_NR,
+                        .label  = "GPE",
+                },
+        }, {
+                .base   = S3C64XX_GPG_BASE,
+                .config = &gpio_4bit_cfg_eint0111,
+                .chip   = {
+                        .base   = S3C64XX_GPG(0),
+                        .ngpio  = S3C64XX_GPIO_G_NR,
+                        .label  = "GPG",
+                },
+        }, {
+                .base   = S3C64XX_GPM_BASE,
+                .config = &gpio_4bit_cfg_eint0011,
+                .chip   = {
+                        .base   = S3C64XX_GPM(0),
+                        .ngpio  = S3C64XX_GPIO_M_NR,
+                        .label  = "GPM",
+                },
+        },
+};
+
+static struct s3c_gpio_chip gpio_4bit2[] = {
+        {
+                .base   = S3C64XX_GPH_BASE + 0x4,
+                .config = &gpio_4bit_cfg_eint0111,
+                .chip   = {
+                        .base   = S3C64XX_GPH(0),
+                        .ngpio  = S3C64XX_GPIO_H_NR,
+                        .label  = "GPH",
+                },
+        }, {
+                .base   = S3C64XX_GPK_BASE + 0x4,
+                .config = &gpio_4bit_cfg_noint,
+                .chip   = {
+                        .base   = S3C64XX_GPK(0),
+                        .ngpio  = S3C64XX_GPIO_K_NR,
+                        .label  = "GPK",
+                },
+        }, {
+                .base   = S3C64XX_GPL_BASE + 0x4,
+                .config = &gpio_4bit_cfg_eint0011,
+                .chip   = {
+                        .base   = S3C64XX_GPL(0),
+                        .ngpio  = S3C64XX_GPIO_L_NR,
+                        .label  = "GPL",
+                },
+        },
+};
+
+static struct s3c_gpio_cfg gpio_2bit_cfg_noint = {
+        .set_config     = s3c_gpio_setcfg_s3c24xx,
+        .set_pull       = s3c_gpio_setpull_updown,
+        .get_pull       = s3c_gpio_getpull_updown,
+};
+
+static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = {
+        .cfg_eint       = 2,
+        .set_config     = s3c_gpio_setcfg_s3c24xx,
+        .set_pull       = s3c_gpio_setpull_updown,
+        .get_pull       = s3c_gpio_getpull_updown,
+};
+
+static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = {
+        .cfg_eint       = 3,
+        .set_config     = s3c_gpio_setcfg_s3c24xx,
+        .set_pull       = s3c_gpio_setpull_updown,
+        .get_pull       = s3c_gpio_getpull_updown,
+};
+
+static struct s3c_gpio_chip gpio_2bit[] = {
+        {
+                .base   = S3C64XX_GPF_BASE,
+                .config = &gpio_2bit_cfg_eint11,
+                .chip   = {
+                        .base   = S3C64XX_GPF(0),
+                        .ngpio  = S3C64XX_GPIO_F_NR,
+                        .label  = "GPF",
+                },
+        }, {
+                .base   = S3C64XX_GPI_BASE,
+                .config = &gpio_2bit_cfg_noint,
+                .chip   = {
+                        .base   = S3C64XX_GPI(0),
+                        .ngpio  = S3C64XX_GPIO_I_NR,
+                        .label  = "GPI",
+                },
+        }, {
+                .base   = S3C64XX_GPJ_BASE,
+                .config = &gpio_2bit_cfg_noint,
+                .chip   = {
+                        .base   = S3C64XX_GPJ(0),
+                        .ngpio  = S3C64XX_GPIO_J_NR,
+                        .label  = "GPJ",
+                },
+        }, {
+                .base   = S3C64XX_GPN_BASE,
+                .config = &gpio_2bit_cfg_eint10,
+                .chip   = {
+                        .base   = S3C64XX_GPN(0),
+                        .ngpio  = S3C64XX_GPIO_N_NR,
+                        .label  = "GPN",
+                },
+        }, {
+                .base   = S3C64XX_GPO_BASE,
+                .config = &gpio_2bit_cfg_eint11,
+                .chip   = {
+                        .base   = S3C64XX_GPO(0),
+                        .ngpio  = S3C64XX_GPIO_O_NR,
+                        .label  = "GPO",
+                },
+        }, {
+                .base   = S3C64XX_GPP_BASE,
+                .config = &gpio_2bit_cfg_eint11,
+                .chip   = {
+                        .base   = S3C64XX_GPP(0),
+                        .ngpio  = S3C64XX_GPIO_P_NR,
+                        .label  = "GPP",
+                },
+        }, {
+                .base   = S3C64XX_GPQ_BASE,
+                .config = &gpio_2bit_cfg_eint11,
+                .chip   = {
+                        .base   = S3C64XX_GPQ(0),
+                        .ngpio  = S3C64XX_GPIO_Q_NR,
+                        .label  = "GPQ",
+                },
+        },
+};
+
+static __init void s3c64xx_gpiolib_add_4bit(struct s3c_gpio_chip *chip)
+{
+        chip->chip.direction_input = s3c64xx_gpiolib_4bit_input;
+        chip->chip.direction_output = s3c64xx_gpiolib_4bit_output;
+}
+
+static __init void s3c64xx_gpiolib_add_4bit2(struct s3c_gpio_chip *chip)
+{
+        chip->chip.direction_input = s3c64xx_gpiolib_4bit2_input;
+        chip->chip.direction_output = s3c64xx_gpiolib_4bit2_output;
+}
+
+static __init void s3c64xx_gpiolib_add(struct s3c_gpio_chip *chips,
+                                       int nr_chips,
+                                       void (*fn)(struct s3c_gpio_chip *))
+{
+        for (; nr_chips > 0; nr_chips--, chips++) {
+                if (fn)
+                        (fn)(chips);
+                s3c_gpiolib_add(chips);
+        }
+}
+
+static __init int s3c64xx_gpiolib_init(void)
+{
+        s3c64xx_gpiolib_add(gpio_4bit, ARRAY_SIZE(gpio_4bit),
+                            s3c64xx_gpiolib_add_4bit);
+
+        s3c64xx_gpiolib_add(gpio_4bit2, ARRAY_SIZE(gpio_4bit2),
+                            s3c64xx_gpiolib_add_4bit2);
+
+        s3c64xx_gpiolib_add(gpio_2bit, ARRAY_SIZE(gpio_2bit), NULL);
+
+        return 0;
+}
+
+arch_initcall(s3c64xx_gpiolib_init);
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
new file mode 100644
index 000000000000..9aa0e427d113
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
@@ -0,0 +1,48 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank A register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPACON                  (S3C64XX_GPA_BASE + 0x00)
+#define S3C64XX_GPADAT                  (S3C64XX_GPA_BASE + 0x04)
+#define S3C64XX_GPAPUD                  (S3C64XX_GPA_BASE + 0x08)
+#define S3C64XX_GPACONSLP               (S3C64XX_GPA_BASE + 0x0c)
+#define S3C64XX_GPAPUDSLP               (S3C64XX_GPA_BASE + 0x10)
+
+#define S3C64XX_GPA_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
+#define S3C64XX_GPA_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPA_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPA0_UART_RXD0          (0x02 << 0)
+#define S3C64XX_GPA0_EINT_G1_0          (0x07 << 0)
+
+#define S3C64XX_GPA1_UART_TXD0          (0x02 << 4)
+#define S3C64XX_GPA1_EINT_G1_1          (0x07 << 4)
+
+#define S3C64XX_GPA2_UART_nCTS0         (0x02 << 8)
+#define S3C64XX_GPA2_EINT_G1_2          (0x07 << 8)
+
+#define S3C64XX_GPA3_UART_nRTS0         (0x02 << 12)
+#define S3C64XX_GPA3_EINT_G1_3          (0x07 << 12)
+
+#define S3C64XX_GPA4_UART_RXD1          (0x02 << 16)
+#define S3C64XX_GPA4_EINT_G1_4          (0x07 << 16)
+
+#define S3C64XX_GPA5_UART_TXD1          (0x02 << 20)
+#define S3C64XX_GPA5_EINT_G1_5          (0x07 << 20)
+
+#define S3C64XX_GPA6_UART_nCTS1         (0x02 << 24)
+#define S3C64XX_GPA6_EINT_G1_6          (0x07 << 24)
+
+#define S3C64XX_GPA7_UART_nRTS1         (0x02 << 28)
+#define S3C64XX_GPA7_EINT_G1_7          (0x07 << 28)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
new file mode 100644
index 000000000000..3933adb4d50a
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
@@ -0,0 +1,60 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank B register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPBCON                  (S3C64XX_GPB_BASE + 0x00)
+#define S3C64XX_GPBDAT                  (S3C64XX_GPB_BASE + 0x04)
+#define S3C64XX_GPBPUD                  (S3C64XX_GPB_BASE + 0x08)
+#define S3C64XX_GPBCONSLP               (S3C64XX_GPB_BASE + 0x0c)
+#define S3C64XX_GPBPUDSLP               (S3C64XX_GPB_BASE + 0x10)
+
+#define S3C64XX_GPB_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
+#define S3C64XX_GPB_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPB_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPB0_UART_RXD2          (0x02 << 0)
+#define S3C64XX_GPB0_EXTDMA_REQ         (0x03 << 0)
+#define S3C64XX_GPB0_IrDA_RXD           (0x04 << 0)
+#define S3C64XX_GPB0_ADDR_CF0           (0x05 << 0)
+#define S3C64XX_GPB0_EINT_G1_8          (0x07 << 0)
+
+#define S3C64XX_GPB1_UART_TXD2          (0x02 << 4)
+#define S3C64XX_GPB1_EXTDMA_ACK         (0x03 << 4)
+#define S3C64XX_GPB1_IrDA_TXD           (0x04 << 4)
+#define S3C64XX_GPB1_ADDR_CF1           (0x05 << 4)
+#define S3C64XX_GPB1_EINT_G1_9          (0x07 << 4)
+
+#define S3C64XX_GPB2_UART_RXD3          (0x02 << 8)
+#define S3C64XX_GPB2_IrDA_RXD           (0x03 << 8)
+#define S3C64XX_GPB2_EXTDMA_REQ         (0x04 << 8)
+#define S3C64XX_GPB2_ADDR_CF2           (0x05 << 8)
+#define S3C64XX_GPB2_I2C_SCL1           (0x06 << 8)
+#define S3C64XX_GPB2_EINT_G1_10         (0x07 << 8)
+
+#define S3C64XX_GPB3_UART_TXD3          (0x02 << 12)
+#define S3C64XX_GPB3_IrDA_TXD           (0x03 << 12)
+#define S3C64XX_GPB3_EXTDMA_ACK         (0x04 << 12)
+#define S3C64XX_GPB3_I2C_SDA1           (0x06 << 12)
+#define S3C64XX_GPB3_EINT_G1_11         (0x07 << 12)
+
+#define S3C64XX_GPB4_IrDA_SDBW          (0x02 << 16)
+#define S3C64XX_GPB4_CAM_FIELD          (0x03 << 16)
+#define S3C64XX_GPB4_CF_DATA_DIR        (0x04 << 16)
+#define S3C64XX_GPB4_EINT_G1_12         (0x07 << 16)
+
+#define S3C64XX_GPB5_I2C_SCL0           (0x02 << 20)
+#define S3C64XX_GPB5_EINT_G1_13         (0x07 << 20)
+
+#define S3C64XX_GPB6_I2C_SDA0           (0x02 << 24)
+#define S3C64XX_GPB6_EINT_G1_14         (0x07 << 24)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
new file mode 100644
index 000000000000..c47daf7e2723
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
@@ -0,0 +1,53 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank C register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPCCON                  (S3C64XX_GPC_BASE + 0x00)
+#define S3C64XX_GPCDAT                  (S3C64XX_GPC_BASE + 0x04)
+#define S3C64XX_GPCPUD                  (S3C64XX_GPC_BASE + 0x08)
+#define S3C64XX_GPCCONSLP               (S3C64XX_GPC_BASE + 0x0c)
+#define S3C64XX_GPCPUDSLP               (S3C64XX_GPC_BASE + 0x10)
+
+#define S3C64XX_GPC_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
+#define S3C64XX_GPC_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPC_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPC0_SPI_MISO0          (0x02 << 0)
+#define S3C64XX_GPC0_EINT_G2_0          (0x07 << 0)
+
+#define S3C64XX_GPC1_SPI_CLKO           (0x02 << 4)
+#define S3C64XX_GPC1_EINT_G2_1          (0x07 << 4)
+
+#define S3C64XX_GPC2_SPI_MOSIO          (0x02 << 8)
+#define S3C64XX_GPC2_EINT_G2_2          (0x07 << 8)
+
+#define S3C64XX_GPC3_SPI_nCSO           (0x02 << 12)
+#define S3C64XX_GPC3_EINT_G2_3          (0x07 << 12)
+
+#define S3C64XX_GPC4_SPI_MISO1          (0x02 << 16)
+#define S3C64XX_GPC4_MMC2_CMD           (0x03 << 16)
+#define S3C64XX_GPC4_I2S0_V40_DO        (0x05 << 16)
+#define S3C64XX_GPC4_EINT_G2_4          (0x07 << 16)
+
+#define S3C64XX_GPC5_SPI_CLK1           (0x02 << 20)
+#define S3C64XX_GPC5_MMC2_CLK           (0x03 << 20)
+#define S3C64XX_GPC5_I2S1_V40_DO        (0x05 << 20)
+#define S3C64XX_GPC5_EINT_G2_5          (0x07 << 20)
+
+#define S3C64XX_GPC6_SPI_MOSI1          (0x02 << 24)
+#define S3C64XX_GPC6_EINT_G2_6          (0x07 << 24)
+
+#define S3C64XX_GPC7_SPI_nCS1           (0x02 << 28)
+#define S3C64XX_GPC7_I2S2_V40_DO        (0x05 << 28)
+#define S3C64XX_GPC7_EINT_G2_7          (0x07 << 28)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
new file mode 100644
index 000000000000..6fe4a49c26f0
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
@@ -0,0 +1,49 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank D register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPDCON                  (S3C64XX_GPD_BASE + 0x00)
+#define S3C64XX_GPDDAT                  (S3C64XX_GPD_BASE + 0x04)
+#define S3C64XX_GPDPUD                  (S3C64XX_GPD_BASE + 0x08)
+#define S3C64XX_GPDCONSLP               (S3C64XX_GPD_BASE + 0x0c)
+#define S3C64XX_GPDPUDSLP               (S3C64XX_GPD_BASE + 0x10)
+
+#define S3C64XX_GPD_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
+#define S3C64XX_GPD_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPD_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPD0_PCM0_SCLK          (0x02 << 0)
+#define S3C64XX_GPD0_I2S0_CLK           (0x03 << 0)
+#define S3C64XX_GPD0_AC97_BITCLK        (0x04 << 0)
+#define S3C64XX_GPD0_EINT_G3_0          (0x07 << 0)
+
+#define S3C64XX_GPD1_PCM0_EXTCLK        (0x02 << 4)
+#define S3C64XX_GPD1_I2S0_CDCLK         (0x03 << 4)
+#define S3C64XX_GPD1_AC97_nRESET        (0x04 << 4)
+#define S3C64XX_GPD1_EINT_G3_1          (0x07 << 4)
+
+#define S3C64XX_GPD2_PCM0_FSYNC         (0x02 << 8)
+#define S3C64XX_GPD2_I2S0_LRCLK         (0x03 << 8)
+#define S3C64XX_GPD2_AC97_SYNC          (0x04 << 8)
+#define S3C64XX_GPD2_EINT_G3_2          (0x07 << 8)
+
+#define S3C64XX_GPD3_PCM0_SIN           (0x02 << 12)
+#define S3C64XX_GPD3_I2S0_DI            (0x03 << 12)
+#define S3C64XX_GPD3_AC97_SDI           (0x04 << 12)
+#define S3C64XX_GPD3_EINT_G3_3          (0x07 << 12)
+
+#define S3C64XX_GPD4_PCM0_SOUT          (0x02 << 16)
+#define S3C64XX_GPD4_I2S0_D0            (0x03 << 16)
+#define S3C64XX_GPD4_AC97_SDO           (0x04 << 16)
+#define S3C64XX_GPD4_EINT_G3_4          (0x07 << 16)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
new file mode 100644
index 000000000000..7fcf3d8e0a48
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
@@ -0,0 +1,44 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank E register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPECON                  (S3C64XX_GPE_BASE + 0x00)
+#define S3C64XX_GPEDAT                  (S3C64XX_GPE_BASE + 0x04)
+#define S3C64XX_GPEPUD                  (S3C64XX_GPE_BASE + 0x08)
+#define S3C64XX_GPECONSLP               (S3C64XX_GPE_BASE + 0x0c)
+#define S3C64XX_GPEPUDSLP               (S3C64XX_GPE_BASE + 0x10)
+
+#define S3C64XX_GPE_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
+#define S3C64XX_GPE_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPE_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPE0_PCM1_SCLK          (0x02 << 0)
+#define S3C64XX_GPE0_I2S1_CLK           (0x03 << 0)
+#define S3C64XX_GPE0_AC97_BITCLK        (0x04 << 0)
+
+#define S3C64XX_GPE1_PCM1_EXTCLK        (0x02 << 4)
+#define S3C64XX_GPE1_I2S1_CDCLK         (0x03 << 4)
+#define S3C64XX_GPE1_AC97_nRESET        (0x04 << 4)
+
+#define S3C64XX_GPE2_PCM1_FSYNC         (0x02 << 8)
+#define S3C64XX_GPE2_I2S1_LRCLK         (0x03 << 8)
+#define S3C64XX_GPE2_AC97_SYNC          (0x04 << 8)
+
+#define S3C64XX_GPE3_PCM1_SIN           (0x02 << 12)
+#define S3C64XX_GPE3_I2S1_DI            (0x03 << 12)
+#define S3C64XX_GPE3_AC97_SDI           (0x04 << 12)
+
+#define S3C64XX_GPE4_PCM1_SOUT          (0x02 << 16)
+#define S3C64XX_GPE4_I2S1_D0            (0x03 << 16)
+#define S3C64XX_GPE4_AC97_SDO           (0x04 << 16)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
new file mode 100644
index 000000000000..f3faff974a18
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
@@ -0,0 +1,71 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank F register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPFCON                  (S3C64XX_GPF_BASE + 0x00)
+#define S3C64XX_GPFDAT                  (S3C64XX_GPF_BASE + 0x04)
+#define S3C64XX_GPFPUD                  (S3C64XX_GPF_BASE + 0x08)
+#define S3C64XX_GPFCONSLP               (S3C64XX_GPF_BASE + 0x0c)
+#define S3C64XX_GPFPUDSLP               (S3C64XX_GPF_BASE + 0x10)
+
+#define S3C64XX_GPF_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPF_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPF_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPF0_CAMIF_CLK          (0x02 << 0)
+#define S3C64XX_GPF0_EINT_G4_0          (0x03 << 0)
+
+#define S3C64XX_GPF1_CAMIF_HREF         (0x02 << 2)
+#define S3C64XX_GPF1_EINT_G4_1          (0x03 << 2)
+
+#define S3C64XX_GPF2_CAMIF_PCLK         (0x02 << 4)
+#define S3C64XX_GPF2_EINT_G4_2          (0x03 << 4)
+
+#define S3C64XX_GPF3_CAMIF_nRST         (0x02 << 6)
+#define S3C64XX_GPF3_EINT_G4_3          (0x03 << 6)
+
+#define S3C64XX_GPF4_CAMIF_VSYNC        (0x02 << 8)
+#define S3C64XX_GPF4_EINT_G4_4          (0x03 << 8)
+
+#define S3C64XX_GPF5_CAMIF_YDATA0       (0x02 << 10)
+#define S3C64XX_GPF5_EINT_G4_5          (0x03 << 10)
+
+#define S3C64XX_GPF6_CAMIF_YDATA1       (0x02 << 12)
+#define S3C64XX_GPF6_EINT_G4_6          (0x03 << 12)
+
+#define S3C64XX_GPF7_CAMIF_YDATA2       (0x02 << 14)
+#define S3C64XX_GPF7_EINT_G4_7          (0x03 << 14)
+
+#define S3C64XX_GPF8_CAMIF_YDATA3       (0x02 << 16)
+#define S3C64XX_GPF8_EINT_G4_8          (0x03 << 16)
+
+#define S3C64XX_GPF9_CAMIF_YDATA4       (0x02 << 18)
+#define S3C64XX_GPF9_EINT_G4_9          (0x03 << 18)
+
+#define S3C64XX_GPF10_CAMIF_YDATA5      (0x02 << 20)
+#define S3C64XX_GPF10_EINT_G4_10        (0x03 << 20)
+
+#define S3C64XX_GPF11_CAMIF_YDATA6      (0x02 << 22)
+#define S3C64XX_GPF11_EINT_G4_11        (0x03 << 22)
+
+#define S3C64XX_GPF12_CAMIF_YDATA7      (0x02 << 24)
+#define S3C64XX_GPF12_EINT_G4_12        (0x03 << 24)
+
+#define S3C64XX_GPF13_PWM_ECLK          (0x02 << 26)
+#define S3C64XX_GPF13_EINT_G4_13        (0x03 << 26)
+
+#define S3C64XX_GPF14_PWM_TOUT0         (0x02 << 28)
+#define S3C64XX_GPF14_CLKOUT0           (0x03 << 28)
+
+#define S3C64XX_GPF15_PWM_TOUT1         (0x02 << 30)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
new file mode 100644
index 000000000000..35bbd2378e55
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
@@ -0,0 +1,42 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank G register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPGCON                  (S3C64XX_GPG_BASE + 0x00)
+#define S3C64XX_GPGDAT                  (S3C64XX_GPG_BASE + 0x04)
+#define S3C64XX_GPGPUD                  (S3C64XX_GPG_BASE + 0x08)
+#define S3C64XX_GPGCONSLP               (S3C64XX_GPG_BASE + 0x0c)
+#define S3C64XX_GPGPUDSLP               (S3C64XX_GPG_BASE + 0x10)
+
+#define S3C64XX_GPG_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
+#define S3C64XX_GPG_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPG_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPG0_MMC0_CLK           (0x02 << 0)
+#define S3C64XX_GPG0_EINT_G5_0          (0x07 << 0)
+
+#define S3C64XX_GPG1_MMC0_CMD           (0x02 << 4)
+#define S3C64XX_GPG1_EINT_G5_1          (0x07 << 4)
+
+#define S3C64XX_GPG2_MMC0_DATA0         (0x02 << 8)
+#define S3C64XX_GPG2_EINT_G5_2          (0x07 << 8)
+
+#define S3C64XX_GPG3_MMC0_DATA1         (0x02 << 12)
+#define S3C64XX_GPG3_EINT_G5_3          (0x07 << 12)
+
+#define S3C64XX_GPG4_MMC0_DATA2         (0x02 << 16)
+#define S3C64XX_GPG4_EINT_G5_4          (0x07 << 16)
+
+#define S3C64XX_GPG5_MMC0_DATA3         (0x02 << 20)
+#define S3C64XX_GPG5_EINT_G5_5          (0x07 << 20)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
new file mode 100644
index 000000000000..81549516572f
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
@@ -0,0 +1,74 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank H register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPHCON0                 (S3C64XX_GPH_BASE + 0x00)
+#define S3C64XX_GPHCON1                 (S3C64XX_GPH_BASE + 0x04)
+#define S3C64XX_GPHDAT                  (S3C64XX_GPH_BASE + 0x08)
+#define S3C64XX_GPHPUD                  (S3C64XX_GPH_BASE + 0x0c)
+#define S3C64XX_GPHCONSLP               (S3C64XX_GPH_BASE + 0x10)
+#define S3C64XX_GPHPUDSLP               (S3C64XX_GPH_BASE + 0x14)
+
+#define S3C64XX_GPH_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
+#define S3C64XX_GPH_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
+#define S3C64XX_GPH_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
+
+#define S3C64XX_GPH0_MMC1_CLK           (0x02 << 0)
+#define S3C64XX_GPH0_KP_COL0            (0x04 << 0)
+#define S3C64XX_GPH0_EINT_G6_0          (0x07 << 0)
+
+#define S3C64XX_GPH1_MMC1_CMD           (0x02 << 4)
+#define S3C64XX_GPH1_KP_COL1            (0x04 << 4)
+#define S3C64XX_GPH1_EINT_G6_1          (0x07 << 4)
+
+#define S3C64XX_GPH2_MMC1_DATA0         (0x02 << 8)
+#define S3C64XX_GPH2_KP_COL2            (0x04 << 8)
+#define S3C64XX_GPH2_EINT_G6_2          (0x07 << 8)
+
+#define S3C64XX_GPH3_MMC1_DATA1         (0x02 << 12)
+#define S3C64XX_GPH3_KP_COL3            (0x04 << 12)
+#define S3C64XX_GPH3_EINT_G6_3          (0x07 << 12)
+
+#define S3C64XX_GPH4_MMC1_DATA2         (0x02 << 16)
+#define S3C64XX_GPH4_KP_COL4            (0x04 << 16)
+#define S3C64XX_GPH4_EINT_G6_4          (0x07 << 16)
+
+#define S3C64XX_GPH5_MMC1_DATA3         (0x02 << 20)
+#define S3C64XX_GPH5_KP_COL5            (0x04 << 20)
+#define S3C64XX_GPH5_EINT_G6_5          (0x07 << 20)
+
+#define S3C64XX_GPH6_MMC1_DATA4         (0x02 << 24)
+#define S3C64XX_GPH6_MMC2_DATA0         (0x03 << 24)
+#define S3C64XX_GPH6_KP_COL6            (0x04 << 24)
+#define S3C64XX_GPH6_I2S_V40_BCLK       (0x05 << 24)
+#define S3C64XX_GPH6_ADDR_CF0           (0x06 << 24)
+#define S3C64XX_GPH6_EINT_G6_6          (0x07 << 24)
+
+#define S3C64XX_GPH7_MMC1_DATA5         (0x02 << 28)
+#define S3C64XX_GPH7_MMC2_DATA1         (0x03 << 28)
+#define S3C64XX_GPH7_KP_COL7            (0x04 << 28)
+#define S3C64XX_GPH7_I2S_V40_CDCLK      (0x05 << 28)
+#define S3C64XX_GPH7_ADDR_CF1           (0x06 << 28)
+#define S3C64XX_GPH7_EINT_G6_7          (0x07 << 28)
+
+#define S3C64XX_GPH8_MMC1_DATA6         (0x02 << 32)
+#define S3C64XX_GPH8_MMC2_DATA2         (0x03 << 32)
+#define S3C64XX_GPH8_I2S_V40_LRCLK      (0x05 << 32)
+#define S3C64XX_GPH8_ADDR_CF2           (0x06 << 32)
+#define S3C64XX_GPH8_EINT_G6_8          (0x07 << 32)
+
+#define S3C64XX_GPH9_MMC1_DATA7         (0x02 << 36)
+#define S3C64XX_GPH9_MMC2_DATA3         (0x03 << 36)
+#define S3C64XX_GPH9_I2S_V40_DI         (0x05 << 36)
+#define S3C64XX_GPH9_EINT_G6_9          (0x07 << 36)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
new file mode 100644
index 000000000000..ce9ebe335566
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
@@ -0,0 +1,40 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank I register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPICON                  (S3C64XX_GPI_BASE + 0x00)
+#define S3C64XX_GPIDAT                  (S3C64XX_GPI_BASE + 0x04)
+#define S3C64XX_GPIPUD                  (S3C64XX_GPI_BASE + 0x08)
+#define S3C64XX_GPICONSLP               (S3C64XX_GPI_BASE + 0x0c)
+#define S3C64XX_GPIPUDSLP               (S3C64XX_GPI_BASE + 0x10)
+
+#define S3C64XX_GPI_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPI_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPI_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPI0_VD0                (0x02 << 0)
+#define S3C64XX_GPI1_VD1                (0x02 << 2)
+#define S3C64XX_GPI2_VD2                (0x02 << 4)
+#define S3C64XX_GPI3_VD3                (0x02 << 6)
+#define S3C64XX_GPI4_VD4                (0x02 << 8)
+#define S3C64XX_GPI5_VD5                (0x02 << 10)
+#define S3C64XX_GPI6_VD6                (0x02 << 12)
+#define S3C64XX_GPI7_VD7                (0x02 << 14)
+#define S3C64XX_GPI8_VD8                (0x02 << 16)
+#define S3C64XX_GPI9_VD9                (0x02 << 18)
+#define S3C64XX_GPI10_VD10              (0x02 << 20)
+#define S3C64XX_GPI11_VD11              (0x02 << 22)
+#define S3C64XX_GPI12_VD12              (0x02 << 24)
+#define S3C64XX_GPI13_VD13              (0x02 << 26)
+#define S3C64XX_GPI14_VD14              (0x02 << 28)
+#define S3C64XX_GPI15_VD15              (0x02 << 30)
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
new file mode 100644
index 000000000000..21a906299d30
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
@@ -0,0 +1,36 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank J register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPJCON                  (S3C64XX_GPJ_BASE + 0x00)
+#define S3C64XX_GPJDAT                  (S3C64XX_GPJ_BASE + 0x04)
+#define S3C64XX_GPJPUD                  (S3C64XX_GPJ_BASE + 0x08)
+#define S3C64XX_GPJCONSLP               (S3C64XX_GPJ_BASE + 0x0c)
+#define S3C64XX_GPJPUDSLP               (S3C64XX_GPJ_BASE + 0x10)
+
+#define S3C64XX_GPJ_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPJ_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPJ_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPJ0_VD16               (0x02 << 0)
+#define S3C64XX_GPJ1_VD17               (0x02 << 2)
+#define S3C64XX_GPJ2_VD18               (0x02 << 4)
+#define S3C64XX_GPJ3_VD19               (0x02 << 6)
+#define S3C64XX_GPJ4_VD20               (0x02 << 8)
+#define S3C64XX_GPJ5_VD21               (0x02 << 10)
+#define S3C64XX_GPJ6_VD22               (0x02 << 12)
+#define S3C64XX_GPJ7_VD23               (0x02 << 14)
+#define S3C64XX_GPJ8_LCD_HSYNC          (0x02 << 16)
+#define S3C64XX_GPJ9_LCD_VSYNC          (0x02 << 18)
+#define S3C64XX_GPJ10_LCD_VDEN          (0x02 << 20)
+#define S3C64XX_GPJ11_LCD_VCLK          (0x02 << 22)
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
new file mode 100644
index 000000000000..569e76120881
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
@@ -0,0 +1,54 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank N register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPNCON                  (S3C64XX_GPN_BASE + 0x00)
+#define S3C64XX_GPNDAT                  (S3C64XX_GPN_BASE + 0x04)
+#define S3C64XX_GPNPUD                  (S3C64XX_GPN_BASE + 0x08)
+
+#define S3C64XX_GPN_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPN_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPN_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPN0_EINT0              (0x02 << 0)
+#define S3C64XX_GPN0_KP_ROW0            (0x03 << 0)
+
+#define S3C64XX_GPN1_EINT1              (0x02 << 2)
+#define S3C64XX_GPN1_KP_ROW1            (0x03 << 2)
+
+#define S3C64XX_GPN2_EINT2              (0x02 << 4)
+#define S3C64XX_GPN2_KP_ROW2            (0x03 << 4)
+
+#define S3C64XX_GPN3_EINT3              (0x02 << 6)
+#define S3C64XX_GPN3_KP_ROW3            (0x03 << 6)
+
+#define S3C64XX_GPN4_EINT4              (0x02 << 8)
+#define S3C64XX_GPN4_KP_ROW4            (0x03 << 8)
+
+#define S3C64XX_GPN5_EINT5              (0x02 << 10)
+#define S3C64XX_GPN5_KP_ROW5            (0x03 << 10)
+
+#define S3C64XX_GPN6_EINT6              (0x02 << 12)
+#define S3C64XX_GPN6_KP_ROW6            (0x03 << 12)
+
+#define S3C64XX_GPN7_EINT7              (0x02 << 14)
+#define S3C64XX_GPN7_KP_ROW7            (0x03 << 14)
+
+#define S3C64XX_GPN8_EINT8              (0x02 << 16)
+#define S3C64XX_GPN9_EINT9              (0x02 << 18)
+#define S3C64XX_GPN10_EINT10            (0x02 << 20)
+#define S3C64XX_GPN11_EINT11            (0x02 << 22)
+#define S3C64XX_GPN12_EINT12            (0x02 << 24)
+#define S3C64XX_GPN13_EINT13            (0x02 << 26)
+#define S3C64XX_GPN14_EINT14            (0x02 << 28)
+#define S3C64XX_GPN15_EINT15            (0x02 << 30)
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
new file mode 100644
index 000000000000..b09e12954b57
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
@@ -0,0 +1,70 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank O register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPOCON                  (S3C64XX_GPO_BASE + 0x00)
+#define S3C64XX_GPODAT                  (S3C64XX_GPO_BASE + 0x04)
+#define S3C64XX_GPOPUD                  (S3C64XX_GPO_BASE + 0x08)
+#define S3C64XX_GPOCONSLP               (S3C64XX_GPO_BASE + 0x0c)
+#define S3C64XX_GPOPUDSLP               (S3C64XX_GPO_BASE + 0x10)
+
+#define S3C64XX_GPO_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPO_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPO_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPO0_MEM0_nCS2          (0x02 << 0)
+#define S3C64XX_GPO0_EINT_G7_0          (0x03 << 0)
+
+#define S3C64XX_GPO1_MEM0_nCS3          (0x02 << 2)
+#define S3C64XX_GPO1_EINT_G7_1          (0x03 << 2)
+
+#define S3C64XX_GPO2_MEM0_nCS4          (0x02 << 4)
+#define S3C64XX_GPO2_EINT_G7_2          (0x03 << 4)
+
+#define S3C64XX_GPO3_MEM0_nCS5          (0x02 << 6)
+#define S3C64XX_GPO3_EINT_G7_3          (0x03 << 6)
+
+#define S3C64XX_GPO4_EINT_G7_4          (0x03 << 8)
+
+#define S3C64XX_GPO5_EINT_G7_5          (0x03 << 10)
+
+#define S3C64XX_GPO6_MEM0_ADDR6         (0x02 << 12)
+#define S3C64XX_GPO6_EINT_G7_6          (0x03 << 12)
+
+#define S3C64XX_GPO7_MEM0_ADDR7         (0x02 << 14)
+#define S3C64XX_GPO7_EINT_G7_7          (0x03 << 14)
+
+#define S3C64XX_GPO8_MEM0_ADDR8         (0x02 << 16)
+#define S3C64XX_GPO8_EINT_G7_8          (0x03 << 16)
+
+#define S3C64XX_GPO9_MEM0_ADDR9         (0x02 << 18)
+#define S3C64XX_GPO9_EINT_G7_9          (0x03 << 18)
+
+#define S3C64XX_GPO10_MEM0_ADDR10       (0x02 << 20)
+#define S3C64XX_GPO10_EINT_G7_10        (0x03 << 20)
+
+#define S3C64XX_GPO11_MEM0_ADDR11       (0x02 << 22)
+#define S3C64XX_GPO11_EINT_G7_11        (0x03 << 22)
+
+#define S3C64XX_GPO12_MEM0_ADDR12       (0x02 << 24)
+#define S3C64XX_GPO12_EINT_G7_12        (0x03 << 24)
+
+#define S3C64XX_GPO13_MEM0_ADDR13       (0x02 << 26)
+#define S3C64XX_GPO13_EINT_G7_13        (0x03 << 26)
+
+#define S3C64XX_GPO14_MEM0_ADDR14       (0x02 << 28)
+#define S3C64XX_GPO14_EINT_G7_14        (0x03 << 28)
+
+#define S3C64XX_GPO15_MEM0_ADDR15       (0x02 << 30)
+#define S3C64XX_GPO15_EINT_G7_15        (0x03 << 30)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
new file mode 100644
index 000000000000..92f00517926b
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
@@ -0,0 +1,69 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank P register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPPCON                  (S3C64XX_GPP_BASE + 0x00)
+#define S3C64XX_GPPDAT                  (S3C64XX_GPP_BASE + 0x04)
+#define S3C64XX_GPPPUD                  (S3C64XX_GPP_BASE + 0x08)
+#define S3C64XX_GPPCONSLP               (S3C64XX_GPP_BASE + 0x0c)
+#define S3C64XX_GPPPUDSLP               (S3C64XX_GPP_BASE + 0x10)
+
+#define S3C64XX_GPP_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPP_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPP_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPP0_MEM0_ADDRV         (0x02 << 0)
+#define S3C64XX_GPP0_EINT_G8_0          (0x03 << 0)
+
+#define S3C64XX_GPP1_MEM0_SMCLK         (0x02 << 2)
+#define S3C64XX_GPP1_EINT_G8_1          (0x03 << 2)
+
+#define S3C64XX_GPP2_MEM0_nWAIT         (0x02 << 4)
+#define S3C64XX_GPP2_EINT_G8_2          (0x03 << 4)
+
+#define S3C64XX_GPP3_MEM0_RDY0_ALE      (0x02 << 6)
+#define S3C64XX_GPP3_EINT_G8_3          (0x03 << 6)
+
+#define S3C64XX_GPP4_MEM0_RDY1_CLE      (0x02 << 8)
+#define S3C64XX_GPP4_EINT_G8_4          (0x03 << 8)
+
+#define S3C64XX_GPP5_MEM0_INTsm0_FWE    (0x02 << 10)
+#define S3C64XX_GPP5_EINT_G8_5          (0x03 << 10)
+
+#define S3C64XX_GPP6_MEM0_(null)        (0x02 << 12)
+#define S3C64XX_GPP6_EINT_G8_6          (0x03 << 12)
+
+#define S3C64XX_GPP7_MEM0_INTsm1_FRE    (0x02 << 14)
+#define S3C64XX_GPP7_EINT_G8_7          (0x03 << 14)
+
+#define S3C64XX_GPP8_MEM0_RPn_RnB       (0x02 << 16)
+#define S3C64XX_GPP8_EINT_G8_8          (0x03 << 16)
+
+#define S3C64XX_GPP9_MEM0_ATA_RESET     (0x02 << 18)
+#define S3C64XX_GPP9_EINT_G8_9          (0x03 << 18)
+
+#define S3C64XX_GPP10_MEM0_ATA_INPACK   (0x02 << 20)
+#define S3C64XX_GPP10_EINT_G8_10        (0x03 << 20)
+
+#define S3C64XX_GPP11_MEM0_ATA_REG      (0x02 << 22)
+#define S3C64XX_GPP11_EINT_G8_11        (0x03 << 22)
+
+#define S3C64XX_GPP12_MEM0_ATA_WE       (0x02 << 24)
+#define S3C64XX_GPP12_EINT_G8_12        (0x03 << 24)
+
+#define S3C64XX_GPP13_MEM0_ATA_OE       (0x02 << 26)
+#define S3C64XX_GPP13_EINT_G8_13        (0x03 << 26)
+
+#define S3C64XX_GPP14_MEM0_ATA_CD       (0x02 << 28)
+#define S3C64XX_GPP14_EINT_G8_14        (0x03 << 28)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
new file mode 100644
index 000000000000..565e60aaee47
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
@@ -0,0 +1,46 @@
+/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * GPIO Bank Q register and configuration definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C64XX_GPQCON                  (S3C64XX_GPQ_BASE + 0x00)
+#define S3C64XX_GPQDAT                  (S3C64XX_GPQ_BASE + 0x04)
+#define S3C64XX_GPQPUD                  (S3C64XX_GPQ_BASE + 0x08)
+#define S3C64XX_GPQCONSLP               (S3C64XX_GPQ_BASE + 0x0c)
+#define S3C64XX_GPQPUDSLP               (S3C64XX_GPQ_BASE + 0x10)
+
+#define S3C64XX_GPQ_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPQ_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
+#define S3C64XX_GPQ_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
+
+#define S3C64XX_GPQ0_MEM0_ADDR18_RAS    (0x02 << 0)
+#define S3C64XX_GPQ0_EINT_G9_0          (0x03 << 0)
+
+#define S3C64XX_GPQ1_MEM0_ADDR19_CAS    (0x02 << 2)
+#define S3C64XX_GPQ1_EINT_G9_1          (0x03 << 2)
+
+#define S3C64XX_GPQ2_EINT_G9_2          (0x03 << 4)
+
+#define S3C64XX_GPQ3_EINT_G9_3          (0x03 << 6)
+
+#define S3C64XX_GPQ4_EINT_G9_4          (0x03 << 8)
+
+#define S3C64XX_GPQ5_EINT_G9_5          (0x03 << 10)
+
+#define S3C64XX_GPQ6_EINT_G9_6          (0x03 << 12)
+
+#define S3C64XX_GPQ7_MEM0_ADDR17_WENDMC (0x02 << 14)
+#define S3C64XX_GPQ7_EINT_G9_7          (0x03 << 14)
+
+#define S3C64XX_GPQ8_MEM0_ADDR16_APDMC  (0x02 << 16)
+#define S3C64XX_GPQ8_EINT_G9_8          (0x03 << 16)
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
new file mode 100644
index 000000000000..02e8dd4c97d5
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -0,0 +1,201 @@
+/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Common IRQ support
+ */
+
+#ifndef __ASM_PLAT_S3C64XX_IRQS_H
+#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__
+
+/* we keep the first set of CPU IRQs out of the range of
+ * the ISA space, so that the PC104 has them to itself
+ * and we don't end up having to do horrible things to the
+ * standard ISA drivers....
+ *
+ * note, since we're using the VICs, our start must be a
+ * mulitple of 32 to allow the common code to work
+ */
+
+#define S3C_IRQ_OFFSET  (32)
+
+#define S3C_IRQ(x)      ((x) + S3C_IRQ_OFFSET)
+
+#define S3C_VIC0_BASE   S3C_IRQ(0)
+#define S3C_VIC1_BASE   S3C_IRQ(32)
+
+/* UART interrupts, each UART has 4 intterupts per channel so
+ * use the space between the ISA and S3C main interrupts. Note, these
+ * are not in the same order as the S3C24XX series! */
+
+#define IRQ_S3CUART_BASE0       (16)
+#define IRQ_S3CUART_BASE1       (20)
+#define IRQ_S3CUART_BASE2       (24)
+#define IRQ_S3CUART_BASE3       (28)
+
+#define UART_IRQ_RXD            (0)
+#define UART_IRQ_ERR            (1)
+#define UART_IRQ_TXD            (2)
+#define UART_IRQ_MODEM          (3)
+
+#define IRQ_S3CUART_RX0         (IRQ_S3CUART_BASE0 + UART_IRQ_RXD)
+#define IRQ_S3CUART_TX0         (IRQ_S3CUART_BASE0 + UART_IRQ_TXD)
+#define IRQ_S3CUART_ERR0        (IRQ_S3CUART_BASE0 + UART_IRQ_ERR)
+
+#define IRQ_S3CUART_RX1         (IRQ_S3CUART_BASE1 + UART_IRQ_RXD)
+#define IRQ_S3CUART_TX1         (IRQ_S3CUART_BASE1 + UART_IRQ_TXD)
+#define IRQ_S3CUART_ERR1        (IRQ_S3CUART_BASE1 + UART_IRQ_ERR)
+
+#define IRQ_S3CUART_RX2         (IRQ_S3CUART_BASE2 + UART_IRQ_RXD)
+#define IRQ_S3CUART_TX2         (IRQ_S3CUART_BASE2 + UART_IRQ_TXD)
+#define IRQ_S3CUART_ERR2        (IRQ_S3CUART_BASE2 + UART_IRQ_ERR)
+
+#define IRQ_S3CUART_RX3         (IRQ_S3CUART_BASE3 + UART_IRQ_RXD)
+#define IRQ_S3CUART_TX3         (IRQ_S3CUART_BASE3 + UART_IRQ_TXD)
+#define IRQ_S3CUART_ERR3        (IRQ_S3CUART_BASE3 + UART_IRQ_ERR)
+
+/* VIC based IRQs */
+
+#define S3C64XX_IRQ_VIC0(x)     (S3C_VIC0_BASE + (x))
+#define S3C64XX_IRQ_VIC1(x)     (S3C_VIC1_BASE + (x))
+
+/* VIC0 */
+
+#define IRQ_EINT0_3             S3C64XX_IRQ_VIC0(0)
+#define IRQ_EINT4_11            S3C64XX_IRQ_VIC0(1)
+#define IRQ_RTC_TIC             S3C64XX_IRQ_VIC0(2)
+#define IRQ_CAMIF_C             S3C64XX_IRQ_VIC0(3)
+#define IRQ_CAMIF_P             S3C64XX_IRQ_VIC0(4)
+#define IRQ_CAMIF_MC            S3C64XX_IRQ_VIC0(5)
+#define IRQ_S3C6410_IIC1        S3C64XX_IRQ_VIC0(5)
+#define IRQ_S3C6410_IIS         S3C64XX_IRQ_VIC0(6)
+#define IRQ_S3C6400_CAMIF_MP    S3C64XX_IRQ_VIC0(6)
+#define IRQ_CAMIF_WE_C          S3C64XX_IRQ_VIC0(7)
+#define IRQ_S3C6410_G3D         S3C64XX_IRQ_VIC0(8)
+#define IRQ_S3C6400_CAMIF_WE_P  S3C64XX_IRQ_VIC0(8)
+#define IRQ_POST0               S3C64XX_IRQ_VIC0(9)
+#define IRQ_ROTATOR             S3C64XX_IRQ_VIC0(10)
+#define IRQ_2D                  S3C64XX_IRQ_VIC0(11)
+#define IRQ_TVENC               S3C64XX_IRQ_VIC0(12)
+#define IRQ_SCALER              S3C64XX_IRQ_VIC0(13)
+#define IRQ_BATF                S3C64XX_IRQ_VIC0(14)
+#define IRQ_JPEG                S3C64XX_IRQ_VIC0(15)
+#define IRQ_MFC                 S3C64XX_IRQ_VIC0(16)
+#define IRQ_SDMA0               S3C64XX_IRQ_VIC0(17)
+#define IRQ_SDMA1               S3C64XX_IRQ_VIC0(18)
+#define IRQ_ARM_DMAERR          S3C64XX_IRQ_VIC0(19)
+#define IRQ_ARM_DMA             S3C64XX_IRQ_VIC0(20)
+#define IRQ_ARM_DMAS            S3C64XX_IRQ_VIC0(21)
+#define IRQ_KEYPAD              S3C64XX_IRQ_VIC0(22)
+#define IRQ_TIMER0_VIC          S3C64XX_IRQ_VIC0(23)
+#define IRQ_TIMER1_VIC          S3C64XX_IRQ_VIC0(24)
+#define IRQ_TIMER2_VIC          S3C64XX_IRQ_VIC0(25)
+#define IRQ_WDT                 S3C64XX_IRQ_VIC0(26)
+#define IRQ_TIMER3_VIC          S3C64XX_IRQ_VIC0(27)
+#define IRQ_TIMER4_VIC          S3C64XX_IRQ_VIC0(28)
+#define IRQ_LCD_FIFO            S3C64XX_IRQ_VIC0(29)
+#define IRQ_LCD_VSYNC           S3C64XX_IRQ_VIC0(30)
+#define IRQ_LCD_SYSTEM          S3C64XX_IRQ_VIC0(31)
+
+/* VIC1 */
+
+#define IRQ_EINT12_19           S3C64XX_IRQ_VIC1(0)
+#define IRQ_EINT20_27           S3C64XX_IRQ_VIC1(1)
+#define IRQ_PCM0                S3C64XX_IRQ_VIC1(2)
+#define IRQ_PCM1                S3C64XX_IRQ_VIC1(3)
+#define IRQ_AC97                S3C64XX_IRQ_VIC1(4)
+#define IRQ_UART0               S3C64XX_IRQ_VIC1(5)
+#define IRQ_UART1               S3C64XX_IRQ_VIC1(6)
+#define IRQ_UART2               S3C64XX_IRQ_VIC1(7)
+#define IRQ_UART3               S3C64XX_IRQ_VIC1(8)
+#define IRQ_DMA0                S3C64XX_IRQ_VIC1(9)
+#define IRQ_DMA1                S3C64XX_IRQ_VIC1(10)
+#define IRQ_ONENAND0            S3C64XX_IRQ_VIC1(11)
+#define IRQ_ONENAND1            S3C64XX_IRQ_VIC1(12)
+#define IRQ_NFC                 S3C64XX_IRQ_VIC1(13)
+#define IRQ_CFCON               S3C64XX_IRQ_VIC1(14)
+#define IRQ_UHOST               S3C64XX_IRQ_VIC1(15)
+#define IRQ_SPI0                S3C64XX_IRQ_VIC1(16)
+#define IRQ_SPI1                S3C64XX_IRQ_VIC1(17)
+#define IRQ_IIC                 S3C64XX_IRQ_VIC1(18)
+#define IRQ_HSItx               S3C64XX_IRQ_VIC1(19)
+#define IRQ_HSIrx               S3C64XX_IRQ_VIC1(20)
+#define IRQ_RESERVED            S3C64XX_IRQ_VIC1(21)
+#define IRQ_MSM                 S3C64XX_IRQ_VIC1(22)
+#define IRQ_HOSTIF              S3C64XX_IRQ_VIC1(23)
+#define IRQ_HSMMC0              S3C64XX_IRQ_VIC1(24)
+#define IRQ_HSMMC1              S3C64XX_IRQ_VIC1(25)
+#define IRQ_HSMMC2              IRQ_SPI1        /* shared with SPI1 */
+#define IRQ_OTG                 S3C64XX_IRQ_VIC1(26)
+#define IRQ_IRDA                S3C64XX_IRQ_VIC1(27)
+#define IRQ_RTC_ALARM           S3C64XX_IRQ_VIC1(28)
+#define IRQ_SEC                 S3C64XX_IRQ_VIC1(29)
+#define IRQ_PENDN               S3C64XX_IRQ_VIC1(30)
+#define IRQ_TC                  IRQ_PENDN
+#define IRQ_ADC                 S3C64XX_IRQ_VIC1(31)
+
+#define S3C64XX_TIMER_IRQ(x)    S3C_IRQ(64 + (x))
+
+#define IRQ_TIMER0              S3C64XX_TIMER_IRQ(0)
+#define IRQ_TIMER1              S3C64XX_TIMER_IRQ(1)
+#define IRQ_TIMER2              S3C64XX_TIMER_IRQ(2)
+#define IRQ_TIMER3              S3C64XX_TIMER_IRQ(3)
+#define IRQ_TIMER4              S3C64XX_TIMER_IRQ(4)
+
+/* compatibility for device defines */
+
+#define IRQ_IIC1                IRQ_S3C6410_IIC1
+
+/* Since the IRQ_EINT(x) are a linear mapping on current s3c64xx series
+ * we just defined them as an IRQ_EINT(x) macro from S3C_IRQ_EINT_BASE
+ * which we place after the pair of VICs. */
+
+#define S3C_IRQ_EINT_BASE       S3C_IRQ(64+5)
+
+#define S3C_EINT(x)             ((x) + S3C_IRQ_EINT_BASE)
+#define IRQ_EINT(x)             S3C_EINT(x)
+
+/* Next the external interrupt groups. These are similar to the IRQ_EINT(x)
+ * that they are sourced from the GPIO pins but with a different scheme for
+ * priority and source indication.
+ *
+ * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO
+ * interrupts, but for historical reasons they are kept apart from these
+ * next interrupts.
+ *
+ * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the
+ * machine specific support files.
+ */
+
+#define IRQ_EINT_GROUP1_NR      (15)
+#define IRQ_EINT_GROUP2_NR      (8)
+#define IRQ_EINT_GROUP3_NR      (5)
+#define IRQ_EINT_GROUP4_NR      (14)
+#define IRQ_EINT_GROUP5_NR      (7)
+#define IRQ_EINT_GROUP6_NR      (10)
+#define IRQ_EINT_GROUP7_NR      (16)
+#define IRQ_EINT_GROUP8_NR      (15)
+#define IRQ_EINT_GROUP9_NR      (9)
+
+#define IRQ_EINT_GROUP_BASE     S3C_EINT(28)
+#define IRQ_EINT_GROUP1_BASE    (IRQ_EINT_GROUP_BASE + 0x00)
+#define IRQ_EINT_GROUP2_BASE    (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR)
+#define IRQ_EINT_GROUP3_BASE    (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR)
+#define IRQ_EINT_GROUP4_BASE    (IRQ_EINT_GROUP3_BASE + IRQ_EINT_GROUP3_NR)
+#define IRQ_EINT_GROUP5_BASE    (IRQ_EINT_GROUP4_BASE + IRQ_EINT_GROUP4_NR)
+#define IRQ_EINT_GROUP6_BASE    (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR)
+#define IRQ_EINT_GROUP7_BASE    (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR)
+#define IRQ_EINT_GROUP8_BASE    (IRQ_EINT_GROUP7_BASE + IRQ_EINT_GROUP7_NR)
+#define IRQ_EINT_GROUP9_BASE    (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR)
+
+#define IRQ_EINT_GROUP(group, no)       (IRQ_EINT_GROUP##group##__BASE + (x))
+
+/* Set the default NR_IRQS */
+
+#define NR_IRQS (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
+
+#endif /* __ASM_PLAT_S3C64XX_IRQS_H */
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/plat-s3c64xx/include/plat/pll.h
new file mode 100644
index 000000000000..90bbd72fdc4e
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/pll.h
@@ -0,0 +1,74 @@
+/* arch/arm/plat-s3c64xx/include/plat/pll.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX PLL code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S3C6400_PLL_MDIV_MASK   ((1 << (25-16+1)) - 1)
+#define S3C6400_PLL_PDIV_MASK   ((1 << (13-8+1)) - 1)
+#define S3C6400_PLL_SDIV_MASK   ((1 << (2-0+1)) - 1)
+#define S3C6400_PLL_MDIV_SHIFT  (16)
+#define S3C6400_PLL_PDIV_SHIFT  (8)
+#define S3C6400_PLL_SDIV_SHIFT  (0)
+
+#include <asm/div64.h>
+
+static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
+                                            u32 pllcon)
+{
+        u32 mdiv, pdiv, sdiv;
+        u64 fvco = baseclk;
+
+        mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK;
+        pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK;
+        sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK;
+
+        fvco *= mdiv;
+        do_div(fvco, (pdiv << sdiv));
+
+        return (unsigned long)fvco;
+}
+
+#define S3C6400_EPLL_MDIV_MASK  ((1 << (23-16)) - 1)
+#define S3C6400_EPLL_PDIV_MASK  ((1 << (13-8)) - 1)
+#define S3C6400_EPLL_SDIV_MASK  ((1 << (2-0)) - 1)
+#define S3C6400_EPLL_MDIV_SHIFT (16)
+#define S3C6400_EPLL_PDIV_SHIFT (8)
+#define S3C6400_EPLL_SDIV_SHIFT (0)
+#define S3C6400_EPLL_KDIV_MASK  (0xffff)
+
+static inline unsigned long s3c6400_get_epll(unsigned long baseclk)
+{
+        unsigned long result;
+        u32 epll0 = __raw_readl(S3C_EPLL_CON0);
+        u32 epll1 = __raw_readl(S3C_EPLL_CON1);
+        u32 mdiv, pdiv, sdiv, kdiv;
+        u64 tmp;
+
+        mdiv = (epll0 >> S3C6400_EPLL_MDIV_SHIFT) & S3C6400_EPLL_MDIV_MASK;
+        pdiv = (epll0 >> S3C6400_EPLL_PDIV_SHIFT) & S3C6400_EPLL_PDIV_MASK;
+        sdiv = (epll0 >> S3C6400_EPLL_SDIV_SHIFT) & S3C6400_EPLL_SDIV_MASK;
+        kdiv = epll1 & S3C6400_EPLL_KDIV_MASK;
+
+        /* We need to multiple baseclk by mdiv (the integer part) and kdiv
+         * which is in 2^16ths, so shift mdiv up (does not overflow) and
+         * add kdiv before multiplying. The use of tmp is to avoid any
+         * overflows before shifting bac down into result when multipling
+         * by the mdiv and kdiv pair.
+         */
+
+        tmp = baseclk;
+        tmp *= (mdiv << 16) + kdiv;
+        do_div(tmp, (pdiv << sdiv));
+        result = tmp >> 16;
+
+        return result;
+}
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
new file mode 100644
index 000000000000..b1082c163247
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
@@ -0,0 +1,224 @@
+/* arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_REGS_CLOCK_H
+#define __PLAT_REGS_CLOCK_H __FILE__
+
+#define S3C_CLKREG(x)           (S3C_VA_SYS + (x))
+
+#define S3C_APLL_LOCK           S3C_CLKREG(0x00)
+#define S3C_MPLL_LOCK           S3C_CLKREG(0x04)
+#define S3C_EPLL_LOCK           S3C_CLKREG(0x08)
+#define S3C_APLL_CON            S3C_CLKREG(0x0C)
+#define S3C_MPLL_CON            S3C_CLKREG(0x10)
+#define S3C_EPLL_CON0           S3C_CLKREG(0x14)
+#define S3C_EPLL_CON1           S3C_CLKREG(0x18)
+#define S3C_CLK_SRC             S3C_CLKREG(0x1C)
+#define S3C_CLK_DIV0            S3C_CLKREG(0x20)
+#define S3C_CLK_DIV1            S3C_CLKREG(0x24)
+#define S3C_CLK_DIV2            S3C_CLKREG(0x28)
+#define S3C_CLK_OUT             S3C_CLKREG(0x2C)
+#define S3C_HCLK_GATE           S3C_CLKREG(0x30)
+#define S3C_PCLK_GATE           S3C_CLKREG(0x34)
+#define S3C_SCLK_GATE           S3C_CLKREG(0x38)
+
+/* CLKDIV0 */
+#define S3C6400_CLKDIV0_MFC_MASK        (0xf << 28)
+#define S3C6400_CLKDIV0_MFC_SHIFT       (28)
+#define S3C6400_CLKDIV0_JPEG_MASK       (0xf << 24)
+#define S3C6400_CLKDIV0_JPEG_SHIFT      (24)
+#define S3C6400_CLKDIV0_CAM_MASK        (0xf << 20)
+#define S3C6400_CLKDIV0_CAM_SHIFT       (20)
+#define S3C6400_CLKDIV0_SECURITY_MASK   (0x3 << 18)
+#define S3C6400_CLKDIV0_SECURITY_SHIFT  (18)
+#define S3C6400_CLKDIV0_PCLK_MASK       (0xf << 12)
+#define S3C6400_CLKDIV0_PCLK_SHIFT      (12)
+#define S3C6400_CLKDIV0_HCLK2_MASK      (0x7 << 9)
+#define S3C6400_CLKDIV0_HCLK2_SHIFT     (9)
+#define S3C6400_CLKDIV0_HCLK_MASK       (0x1 << 8)
+#define S3C6400_CLKDIV0_HCLK_SHIFT      (8)
+#define S3C6400_CLKDIV0_MPLL_MASK       (0x1 << 4)
+#define S3C6400_CLKDIV0_MPLL_SHIFT      (4)
+#define S3C6400_CLKDIV0_ARM_MASK        (0x3 << 0)
+#define S3C6410_CLKDIV0_ARM_MASK        (0x7 << 0)
+#define S3C6400_CLKDIV0_ARM_SHIFT       (0)
+
+/* CLKDIV1 */
+#define S3C6410_CLKDIV1_FIMC_MASK       (0xf << 24)
+#define S3C6410_CLKDIV1_FIMC_SHIFT      (24)
+#define S3C6400_CLKDIV1_UHOST_MASK      (0xf << 20)
+#define S3C6400_CLKDIV1_UHOST_SHIFT     (20)
+#define S3C6400_CLKDIV1_SCALER_MASK     (0xf << 16)
+#define S3C6400_CLKDIV1_SCALER_SHIFT    (16)
+#define S3C6400_CLKDIV1_LCD_MASK        (0xf << 12)
+#define S3C6400_CLKDIV1_LCD_SHIFT       (12)
+#define S3C6400_CLKDIV1_MMC2_MASK       (0xf << 8)
+#define S3C6400_CLKDIV1_MMC2_SHIFT      (8)
+#define S3C6400_CLKDIV1_MMC1_MASK       (0xf << 4)
+#define S3C6400_CLKDIV1_MMC1_SHIFT      (4)
+#define S3C6400_CLKDIV1_MMC0_MASK       (0xf << 0)
+#define S3C6400_CLKDIV1_MMC0_SHIFT      (0)
+
+/* CLKDIV2 */
+#define S3C6410_CLKDIV2_AUDIO2_MASK     (0xf << 24)
+#define S3C6410_CLKDIV2_AUDIO2_SHIFT    (24)
+#define S3C6400_CLKDIV2_IRDA_MASK       (0xf << 20)
+#define S3C6400_CLKDIV2_IRDA_SHIFT      (20)
+#define S3C6400_CLKDIV2_UART_MASK       (0xf << 16)
+#define S3C6400_CLKDIV2_UART_SHIFT      (16)
+#define S3C6400_CLKDIV2_AUDIO1_MASK     (0xf << 12)
+#define S3C6400_CLKDIV2_AUDIO1_SHIFT    (12)
+#define S3C6400_CLKDIV2_AUDIO0_MASK     (0xf << 8)
+#define S3C6400_CLKDIV2_AUDIO0_SHIFT    (8)
+#define S3C6400_CLKDIV2_SPI1_MASK       (0xf << 4)
+#define S3C6400_CLKDIV2_SPI1_SHIFT      (4)
+#define S3C6400_CLKDIV2_SPI0_MASK       (0xf << 0)
+#define S3C6400_CLKDIV2_SPI0_SHIFT      (0)
+
+/* HCLK GATE Registers */
+#define S3C_CLKCON_HCLK_BUS     (1<<30)
+#define S3C_CLKCON_HCLK_SECUR   (1<<29)
+#define S3C_CLKCON_HCLK_SDMA1   (1<<28)
+#define S3C_CLKCON_HCLK_SDMA2   (1<<27)
+#define S3C_CLKCON_HCLK_UHOST   (1<<26)
+#define S3C_CLKCON_HCLK_IROM    (1<<25)
+#define S3C_CLKCON_HCLK_DDR1    (1<<24)
+#define S3C_CLKCON_HCLK_DDR0    (1<<23)
+#define S3C_CLKCON_HCLK_MEM1    (1<<22)
+#define S3C_CLKCON_HCLK_MEM0    (1<<21)
+#define S3C_CLKCON_HCLK_USB     (1<<20)
+#define S3C_CLKCON_HCLK_HSMMC2  (1<<19)
+#define S3C_CLKCON_HCLK_HSMMC1  (1<<18)
+#define S3C_CLKCON_HCLK_HSMMC0  (1<<17)
+#define S3C_CLKCON_HCLK_MDP     (1<<16)
+#define S3C_CLKCON_HCLK_DHOST   (1<<15)
+#define S3C_CLKCON_HCLK_IHOST   (1<<14)
+#define S3C_CLKCON_HCLK_DMA1    (1<<13)
+#define S3C_CLKCON_HCLK_DMA0    (1<<12)
+#define S3C_CLKCON_HCLK_JPEG    (1<<11)
+#define S3C_CLKCON_HCLK_CAMIF   (1<<10)
+#define S3C_CLKCON_HCLK_SCALER  (1<<9)
+#define S3C_CLKCON_HCLK_2D      (1<<8)
+#define S3C_CLKCON_HCLK_TV      (1<<7)
+#define S3C_CLKCON_HCLK_POST0   (1<<5)
+#define S3C_CLKCON_HCLK_ROT     (1<<4)
+#define S3C_CLKCON_HCLK_LCD     (1<<3)
+#define S3C_CLKCON_HCLK_TZIC    (1<<2)
+#define S3C_CLKCON_HCLK_INTC    (1<<1)
+#define S3C_CLKCON_HCLK_MFC     (1<<0)
+
+/* PCLK GATE Registers */
+#define S3C6410_CLKCON_PCLK_I2C1        (1<<27)
+#define S3C6410_CLKCON_PCLK_IIS2        (1<<26)
+#define S3C_CLKCON_PCLK_SKEY            (1<<24)
+#define S3C_CLKCON_PCLK_CHIPID          (1<<23)
+#define S3C_CLKCON_PCLK_SPI1            (1<<22)
+#define S3C_CLKCON_PCLK_SPI0            (1<<21)
+#define S3C_CLKCON_PCLK_HSIRX           (1<<20)
+#define S3C_CLKCON_PCLK_HSITX           (1<<19)
+#define S3C_CLKCON_PCLK_GPIO            (1<<18)
+#define S3C_CLKCON_PCLK_IIC             (1<<17)
+#define S3C_CLKCON_PCLK_IIS1            (1<<16)
+#define S3C_CLKCON_PCLK_IIS0            (1<<15)
+#define S3C_CLKCON_PCLK_AC97            (1<<14)
+#define S3C_CLKCON_PCLK_TZPC            (1<<13)
+#define S3C_CLKCON_PCLK_TSADC           (1<<12)
+#define S3C_CLKCON_PCLK_KEYPAD          (1<<11)
+#define S3C_CLKCON_PCLK_IRDA            (1<<10)
+#define S3C_CLKCON_PCLK_PCM1            (1<<9)
+#define S3C_CLKCON_PCLK_PCM0            (1<<8)
+#define S3C_CLKCON_PCLK_PWM             (1<<7)
+#define S3C_CLKCON_PCLK_RTC             (1<<6)
+#define S3C_CLKCON_PCLK_WDT             (1<<5)
+#define S3C_CLKCON_PCLK_UART3           (1<<4)
+#define S3C_CLKCON_PCLK_UART2           (1<<3)
+#define S3C_CLKCON_PCLK_UART1           (1<<2)
+#define S3C_CLKCON_PCLK_UART0           (1<<1)
+#define S3C_CLKCON_PCLK_MFC             (1<<0)
+
+/* SCLK GATE Registers */
+#define S3C_CLKCON_SCLK_UHOST           (1<<30)
+#define S3C_CLKCON_SCLK_MMC2_48         (1<<29)
+#define S3C_CLKCON_SCLK_MMC1_48         (1<<28)
+#define S3C_CLKCON_SCLK_MMC0_48         (1<<27)
+#define S3C_CLKCON_SCLK_MMC2            (1<<26)
+#define S3C_CLKCON_SCLK_MMC1            (1<<25)
+#define S3C_CLKCON_SCLK_MMC0            (1<<24)
+#define S3C_CLKCON_SCLK_SPI1_48         (1<<23)
+#define S3C_CLKCON_SCLK_SPI0_48         (1<<22)
+#define S3C_CLKCON_SCLK_SPI1            (1<<21)
+#define S3C_CLKCON_SCLK_SPI0            (1<<20)
+#define S3C_CLKCON_SCLK_DAC27           (1<<19)
+#define S3C_CLKCON_SCLK_TV27            (1<<18)
+#define S3C_CLKCON_SCLK_SCALER27        (1<<17)
+#define S3C_CLKCON_SCLK_SCALER          (1<<16)
+#define S3C_CLKCON_SCLK_LCD27           (1<<15)
+#define S3C_CLKCON_SCLK_LCD             (1<<14)
+#define S3C6400_CLKCON_SCLK_POST1_27    (1<<13)
+#define S3C6410_CLKCON_FIMC             (1<<13)
+#define S3C_CLKCON_SCLK_POST0_27        (1<<12)
+#define S3C6400_CLKCON_SCLK_POST1       (1<<11)
+#define S3C6410_CLKCON_SCLK_AUDIO2      (1<<11)
+#define S3C_CLKCON_SCLK_POST0           (1<<10)
+#define S3C_CLKCON_SCLK_AUDIO1          (1<<9)
+#define S3C_CLKCON_SCLK_AUDIO0          (1<<8)
+#define S3C_CLKCON_SCLK_SECUR           (1<<7)
+#define S3C_CLKCON_SCLK_IRDA            (1<<6)
+#define S3C_CLKCON_SCLK_UART            (1<<5)
+#define S3C_CLKCON_SCLK_ONENAND         (1<<4)
+#define S3C_CLKCON_SCLK_MFC             (1<<3)
+#define S3C_CLKCON_SCLK_CAM             (1<<2)
+#define S3C_CLKCON_SCLK_JPEG            (1<<1)
+
+/* CLKSRC */
+
+#define S3C6400_CLKSRC_APLL_MOUT        (1 << 0)
+#define S3C6400_CLKSRC_MPLL_MOUT        (1 << 1)
+#define S3C6400_CLKSRC_EPLL_MOUT        (1 << 2)
+#define S3C6400_CLKSRC_APLL_MOUT_SHIFT  (0)
+#define S3C6400_CLKSRC_MPLL_MOUT_SHIFT  (1)
+#define S3C6400_CLKSRC_EPLL_MOUT_SHIFT  (2)
+#define S3C6400_CLKSRC_MFC              (1 << 4)
+
+#define S3C6410_CLKSRC_TV27_MASK        (0x1 << 31)
+#define S3C6410_CLKSRC_TV27_SHIFT       (31)
+#define S3C6410_CLKSRC_DAC27_MASK       (0x1 << 30)
+#define S3C6410_CLKSRC_DAC27_SHIFT      (30)
+#define S3C6400_CLKSRC_SCALER_MASK      (0x3 << 28)
+#define S3C6400_CLKSRC_SCALER_SHIFT     (28)
+#define S3C6400_CLKSRC_LCD_MASK         (0x3 << 26)
+#define S3C6400_CLKSRC_LCD_SHIFT        (26)
+#define S3C6400_CLKSRC_IRDA_MASK        (0x3 << 24)
+#define S3C6400_CLKSRC_IRDA_SHIFT       (24)
+#define S3C6400_CLKSRC_MMC2_MASK        (0x3 << 22)
+#define S3C6400_CLKSRC_MMC2_SHIFT       (22)
+#define S3C6400_CLKSRC_MMC1_MASK        (0x3 << 20)
+#define S3C6400_CLKSRC_MMC1_SHIFT       (20)
+#define S3C6400_CLKSRC_MMC0_MASK        (0x3 << 18)
+#define S3C6400_CLKSRC_MMC0_SHIFT       (18)
+#define S3C6400_CLKSRC_SPI1_MASK        (0x3 << 16)
+#define S3C6400_CLKSRC_SPI1_SHIFT       (16)
+#define S3C6400_CLKSRC_SPI0_MASK        (0x3 << 14)
+#define S3C6400_CLKSRC_SPI0_SHIFT       (14)
+#define S3C6400_CLKSRC_UART_MASK        (0x1 << 13)
+#define S3C6400_CLKSRC_UART_SHIFT       (13)
+#define S3C6400_CLKSRC_AUDIO1_MASK      (0x7 << 10)
+#define S3C6400_CLKSRC_AUDIO1_SHIFT     (10)
+#define S3C6400_CLKSRC_AUDIO0_MASK      (0x7 << 7)
+#define S3C6400_CLKSRC_AUDIO0_SHIFT     (7)
+#define S3C6400_CLKSRC_UHOST_MASK       (0x3 << 5)
+#define S3C6400_CLKSRC_UHOST_SHIFT      (5)
+
+
+#endif /* _PLAT_REGS_CLOCK_H */
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h b/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h
new file mode 100644
index 000000000000..75b873d82808
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h
@@ -0,0 +1,35 @@
+/* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - GPIO register definitions
+ */
+
+#ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_H
+#define __ASM_PLAT_S3C64XX_REGS_GPIO_H __FILE__
+
+/* Base addresses for each of the banks */
+
+#define S3C64XX_GPA_BASE        (S3C64XX_VA_GPIO + 0x0000)
+#define S3C64XX_GPB_BASE        (S3C64XX_VA_GPIO + 0x0020)
+#define S3C64XX_GPC_BASE        (S3C64XX_VA_GPIO + 0x0040)
+#define S3C64XX_GPD_BASE        (S3C64XX_VA_GPIO + 0x0060)
+#define S3C64XX_GPE_BASE        (S3C64XX_VA_GPIO + 0x0080)
+#define S3C64XX_GPF_BASE        (S3C64XX_VA_GPIO + 0x00A0)
+#define S3C64XX_GPG_BASE        (S3C64XX_VA_GPIO + 0x00C0)
+#define S3C64XX_GPH_BASE        (S3C64XX_VA_GPIO + 0x00E0)
+#define S3C64XX_GPI_BASE        (S3C64XX_VA_GPIO + 0x0100)
+#define S3C64XX_GPJ_BASE        (S3C64XX_VA_GPIO + 0x0120)
+#define S3C64XX_GPK_BASE        (S3C64XX_VA_GPIO + 0x0800)
+#define S3C64XX_GPL_BASE        (S3C64XX_VA_GPIO + 0x0810)
+#define S3C64XX_GPM_BASE        (S3C64XX_VA_GPIO + 0x0820)
+#define S3C64XX_GPN_BASE        (S3C64XX_VA_GPIO + 0x0830)
+#define S3C64XX_GPO_BASE        (S3C64XX_VA_GPIO + 0x0140)
+#define S3C64XX_GPP_BASE        (S3C64XX_VA_GPIO + 0x0160)
+#define S3C64XX_GPQ_BASE        (S3C64XX_VA_GPIO + 0x0180)
+
+#endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_H */
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h b/arch/arm/plat-s3c64xx/include/plat/regs-sys.h
new file mode 100644
index 000000000000..d8ed82917096
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/regs-sys.h
@@ -0,0 +1,24 @@
+/* arch/arm/plat-s3c64xx/include/plat/regs-sys.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX system register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_REGS_SYS_H
+#define __PLAT_REGS_SYS_H __FILE__
+
+#define S3C_SYSREG(x)           (S3C_VA_SYS + (x))
+
+#define S3C64XX_OTHERS          S3C_SYSREG(0x900)
+
+#define S3C64XX_OTHERS_USBMASK  (1 << 16)
+
+#endif /* _PLAT_REGS_SYS_H */
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h b/arch/arm/plat-s3c64xx/include/plat/s3c6400.h
new file mode 100644
index 000000000000..571eaa2e54f1
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/s3c6400.h
@@ -0,0 +1,35 @@
+/* arch/arm/plat-s3c64xx/include/plat/s3c6400.h
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Header file for s3c6400 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S3C6400 related SoCs */
+
+extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s3c6400_register_clocks(void);
+extern void s3c6400_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S3C6400
+
+extern  int s3c6400_init(void);
+extern void s3c6400_map_io(void);
+extern void s3c6400_init_clocks(int xtal);
+
+#define s3c6400_init_uarts s3c6400_common_init_uarts
+
+#else
+#define s3c6400_init_clocks NULL
+#define s3c6400_init_uarts NULL
+#define s3c6400_map_io NULL
+#define s3c6400_init NULL
+#endif
+
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/plat-s3c64xx/include/plat/s3c6410.h
new file mode 100644
index 000000000000..50dcdd6f6800
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/include/plat/s3c6410.h
@@ -0,0 +1,29 @@
+/* arch/arm/plat-s3c64xx/include/plat/s3c6410.h
+ *
+ * Copyright 2008 Openmoko,  Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Header file for s3c6410 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifdef CONFIG_CPU_S3C6410
+
+extern  int s3c6410_init(void);
+extern void s3c6410_init_irq(void);
+extern void s3c6410_map_io(void);
+extern void s3c6410_init_clocks(int xtal);
+
+#define s3c6410_init_uarts s3c6400_common_init_uarts
+
+#else
+#define s3c6410_init_clocks NULL
+#define s3c6410_init_uarts NULL
+#define s3c6410_map_io NULL
+#define s3c6410_init NULL
+#endif
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
new file mode 100644
index 000000000000..1f7cc0067f5c
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -0,0 +1,202 @@
+/* arch/arm/plat-s3c64xx/irq-eint.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Interrupt handling for IRQ_EINT(x)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <asm/hardware/vic.h>
+
+#include <plat/regs-irqtype.h>
+
+#include <mach/map.h>
+#include <plat/cpu.h>
+
+/* GPIO is 0x7F008xxx, */
+#define S3C64XX_GPIOREG(x)      (S3C64XX_VA_GPIO + (x))
+
+#define S3C64XX_EINT0CON0       S3C64XX_GPIOREG(0x900)
+#define S3C64XX_EINT0CON1       S3C64XX_GPIOREG(0x904)
+#define S3C64XX_EINT0FLTCON0    S3C64XX_GPIOREG(0x910)
+#define S3C64XX_EINT0FLTCON1    S3C64XX_GPIOREG(0x914)
+#define S3C64XX_EINT0FLTCON2    S3C64XX_GPIOREG(0x918)
+#define S3C64XX_EINT0FLTCON3    S3C64XX_GPIOREG(0x91C)
+
+#define S3C64XX_EINT0MASK       S3C64XX_GPIOREG(0x920)
+#define S3C64XX_EINT0PEND       S3C64XX_GPIOREG(0x924)
+
+
+#define eint_offset(irq)        ((irq) - IRQ_EINT(0))
+#define eint_irq_to_bit(irq)    (1 << eint_offset(irq))
+
+static inline void s3c_irq_eint_mask(unsigned int irq)
+{
+        u32 mask;
+
+        mask = __raw_readl(S3C64XX_EINT0MASK);
+        mask |= eint_irq_to_bit(irq);
+        __raw_writel(mask, S3C64XX_EINT0MASK);
+}
+
+static void s3c_irq_eint_unmask(unsigned int irq)
+{
+        u32 mask;
+
+        mask = __raw_readl(S3C64XX_EINT0MASK);
+        mask |= eint_irq_to_bit(irq);
+        __raw_writel(mask, S3C64XX_EINT0MASK);
+}
+
+static inline void s3c_irq_eint_ack(unsigned int irq)
+{
+        __raw_writel(eint_irq_to_bit(irq), S3C64XX_EINT0PEND);
+}
+
+static void s3c_irq_eint_maskack(unsigned int irq)
+{
+        /* compiler should in-line these */
+        s3c_irq_eint_mask(irq);
+        s3c_irq_eint_ack(irq);
+}
+
+static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
+{
+        int offs = eint_offset(irq);
+        int shift;
+        u32 ctrl, mask;
+        u32 newvalue = 0;
+        void __iomem *reg;
+
+        if (offs > 27)
+                return -EINVAL;
+
+        if (offs <= 15)
+                reg = S3C64XX_EINT0CON0;
+        else
+                reg = S3C64XX_EINT0CON1;
+
+        switch (type) {
+        case IRQ_TYPE_NONE:
+                printk(KERN_WARNING "No edge setting!\n");
+                break;
+
+        case IRQ_TYPE_EDGE_RISING:
+                newvalue = S3C2410_EXTINT_RISEEDGE;
+                break;
+
+        case IRQ_TYPE_EDGE_FALLING:
+                newvalue = S3C2410_EXTINT_FALLEDGE;
+                break;
+
+        case IRQ_TYPE_EDGE_BOTH:
+                newvalue = S3C2410_EXTINT_BOTHEDGE;
+                break;
+
+        case IRQ_TYPE_LEVEL_LOW:
+                newvalue = S3C2410_EXTINT_LOWLEV;
+                break;
+
+        case IRQ_TYPE_LEVEL_HIGH:
+                newvalue = S3C2410_EXTINT_HILEV;
+                break;
+
+        default:
+                printk(KERN_ERR "No such irq type %d", type);
+                return -1;
+        }
+
+        shift = (offs / 2) * 4;
+        mask = 0x7 << shift;
+
+        ctrl = __raw_readl(reg);
+        ctrl &= ~mask;
+        ctrl |= newvalue << shift;
+        __raw_writel(ctrl, reg);
+
+        return 0;
+}
+
+static struct irq_chip s3c_irq_eint = {
+        .name           = "s3c-eint",
+        .mask           = s3c_irq_eint_mask,
+        .unmask         = s3c_irq_eint_unmask,
+        .mask_ack       = s3c_irq_eint_maskack,
+        .ack            = s3c_irq_eint_ack,
+        .set_type       = s3c_irq_eint_set_type,
+};
+
+/* s3c_irq_demux_eint
+ *
+ * This function demuxes the IRQ from the group0 external interrupts,
+ * from IRQ_EINT(0) to IRQ_EINT(27). It is designed to be inlined into
+ * the specific handlers s3c_irq_demux_eintX_Y.
+ */
+static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end)
+{
+        u32 status = __raw_readl(S3C64XX_EINT0PEND);
+        u32 mask = __raw_readl(S3C64XX_EINT0MASK);
+        unsigned int irq;
+
+        status &= ~mask;
+        status >>= start;
+        status &= (1 << (end - start + 1)) - 1;
+
+        for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
+                if (status & 1)
+                        generic_handle_irq(irq);
+
+                status >>= 1;
+        }
+}
+
+static void s3c_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_eint(0, 3);
+}
+
+static void s3c_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_eint(4, 11);
+}
+
+static void s3c_irq_demux_eint12_19(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_eint(12, 19);
+}
+
+static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_eint(20, 27);
+}
+
+int __init s3c64xx_init_irq_eint(void)
+{
+        int irq;
+
+        for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
+                set_irq_chip(irq, &s3c_irq_eint);
+                set_irq_handler(irq, handle_level_irq);
+                set_irq_flags(irq, IRQF_VALID);
+        }
+
+        set_irq_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
+        set_irq_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
+        set_irq_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
+        set_irq_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
+
+        return 0;
+}
+
+arch_initcall(s3c64xx_init_irq_eint);
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
new file mode 100644
index 000000000000..a94f1d5e819d
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/irq.c
@@ -0,0 +1,257 @@
+/* arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <asm/hardware/vic.h>
+
+#include <mach/map.h>
+#include <plat/regs-timer.h>
+#include <plat/cpu.h>
+
+/* Timer interrupt handling */
+
+static void s3c_irq_demux_timer(unsigned int base_irq, unsigned int sub_irq)
+{
+        generic_handle_irq(sub_irq);
+}
+
+static void s3c_irq_demux_timer0(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_timer(irq, IRQ_TIMER0);
+}
+
+static void s3c_irq_demux_timer1(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_timer(irq, IRQ_TIMER1);
+}
+
+static void s3c_irq_demux_timer2(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_timer(irq, IRQ_TIMER2);
+}
+
+static void s3c_irq_demux_timer3(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_timer(irq, IRQ_TIMER3);
+}
+
+static void s3c_irq_demux_timer4(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_timer(irq, IRQ_TIMER4);
+}
+
+/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
+
+static void s3c_irq_timer_mask(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;  /* mask out pending interrupts */
+        reg &= ~(1 << (irq - IRQ_TIMER0));
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static void s3c_irq_timer_unmask(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;  /* mask out pending interrupts */
+        reg |= 1 << (irq - IRQ_TIMER0);
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static void s3c_irq_timer_ack(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;
+        reg |= (1 << 5) << (irq - IRQ_TIMER0);
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static struct irq_chip s3c_irq_timer = {
+        .name           = "s3c-timer",
+        .mask           = s3c_irq_timer_mask,
+        .unmask         = s3c_irq_timer_unmask,
+        .ack            = s3c_irq_timer_ack,
+};
+
+struct uart_irq {
+        void __iomem    *regs;
+        unsigned int     base_irq;
+        unsigned int     parent_irq;
+};
+
+/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
+ * are consecutive when looking up the interrupt in the demux routines.
+ */
+static struct uart_irq uart_irqs[] = {
+        [0] = {
+                .regs           = S3C_VA_UART0,
+                .base_irq       = IRQ_S3CUART_BASE0,
+                .parent_irq     = IRQ_UART0,
+        },
+        [1] = {
+                .regs           = S3C_VA_UART1,
+                .base_irq       = IRQ_S3CUART_BASE1,
+                .parent_irq     = IRQ_UART1,
+        },
+        [2] = {
+                .regs           = S3C_VA_UART2,
+                .base_irq       = IRQ_S3CUART_BASE2,
+                .parent_irq     = IRQ_UART2,
+        },
+        [3] = {
+                .regs           = S3C_VA_UART3,
+                .base_irq       = IRQ_S3CUART_BASE3,
+                .parent_irq     = IRQ_UART3,
+        },
+};
+
+static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
+{
+        struct uart_irq *uirq = get_irq_chip_data(irq);
+        return uirq->regs;
+}
+
+static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
+{
+        return irq & 3;
+}
+
+/* UART interrupt registers, not worth adding to seperate include header */
+#define S3C64XX_UINTP   0x30
+#define S3C64XX_UINTSP  0x34
+#define S3C64XX_UINTM   0x38
+
+static void s3c_irq_uart_mask(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg |= (1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+}
+
+static void s3c_irq_uart_maskack(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg |= (1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
+}
+
+static void s3c_irq_uart_unmask(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg &= ~(1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+}
+
+static void s3c_irq_uart_ack(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+
+        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
+}
+
+static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
+{
+        struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0];
+        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
+        int base = uirq->base_irq;
+
+        if (pend & (1 << 0))
+                generic_handle_irq(base);
+        if (pend & (1 << 1))
+                generic_handle_irq(base + 1);
+        if (pend & (1 << 2))
+                generic_handle_irq(base + 2);
+        if (pend & (1 << 3))
+                generic_handle_irq(base + 3);
+}
+
+static struct irq_chip s3c_irq_uart = {
+        .name           = "s3c-uart",
+        .mask           = s3c_irq_uart_mask,
+        .unmask         = s3c_irq_uart_unmask,
+        .mask_ack       = s3c_irq_uart_maskack,
+        .ack            = s3c_irq_uart_ack,
+};
+
+static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
+{
+        void *reg_base = uirq->regs;
+        unsigned int irq;
+        int offs;
+
+        /* mask all interrupts at the start. */
+        __raw_writel(0xf, reg_base + S3C64XX_UINTM);
+
+        for (offs = 0; offs < 3; offs++) {
+                irq = uirq->base_irq + offs;
+
+                set_irq_chip(irq, &s3c_irq_uart);
+                set_irq_chip_data(irq, uirq);
+                set_irq_handler(irq, handle_level_irq);
+                set_irq_flags(irq, IRQF_VALID);
+        }
+
+        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
+}
+
+void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
+{
+        int uart, irq;
+
+        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
+
+        /* initialise the pair of VICs */
+        vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid);
+        vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid);
+
+        /* add the timer sub-irqs */
+
+        set_irq_chained_handler(IRQ_TIMER0_VIC, s3c_irq_demux_timer0);
+        set_irq_chained_handler(IRQ_TIMER1_VIC, s3c_irq_demux_timer1);
+        set_irq_chained_handler(IRQ_TIMER2_VIC, s3c_irq_demux_timer2);
+        set_irq_chained_handler(IRQ_TIMER3_VIC, s3c_irq_demux_timer3);
+        set_irq_chained_handler(IRQ_TIMER4_VIC, s3c_irq_demux_timer4);
+
+        for (irq = IRQ_TIMER0; irq <= IRQ_TIMER4; irq++) {
+                set_irq_chip(irq, &s3c_irq_timer);
+                set_irq_handler(irq, handle_level_irq);
+                set_irq_flags(irq, IRQF_VALID);
+        }
+
+        for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++)
+                s3c64xx_uart_irq(&uart_irqs[uart]);
+}
+
+
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
new file mode 100644
index 000000000000..8d9a0cada668
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -0,0 +1,655 @@
+/* linux/arch/arm/plat-s3c64xx/s3c6400-clock.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C6400 based common clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <plat/cpu-freq.h>
+
+#include <plat/regs-clock.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+
+/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
+ * ext_xtal_mux for want of an actual name from the manual.
+*/
+
+struct clk clk_ext_xtal_mux = {
+        .name           = "ext_xtal",
+        .id             = -1,
+};
+
+#define clk_fin_apll clk_ext_xtal_mux
+#define clk_fin_mpll clk_ext_xtal_mux
+#define clk_fin_epll clk_ext_xtal_mux
+
+#define clk_fout_mpll   clk_mpll
+
+struct clk_sources {
+        unsigned int    nr_sources;
+        struct clk      **sources;
+};
+
+struct clksrc_clk {
+        struct clk              clk;
+        unsigned int            mask;
+        unsigned int            shift;
+
+        struct clk_sources      *sources;
+
+        unsigned int            divider_shift;
+        void __iomem            *reg_divider;
+};
+
+struct clk clk_fout_apll = {
+        .name           = "fout_apll",
+        .id             = -1,
+};
+
+static struct clk *clk_src_apll_list[] = {
+        [0] = &clk_fin_apll,
+        [1] = &clk_fout_apll,
+};
+
+static struct clk_sources clk_src_apll = {
+        .sources        = clk_src_apll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
+};
+
+struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .shift          = S3C6400_CLKSRC_APLL_MOUT_SHIFT,
+        .mask           = S3C6400_CLKSRC_APLL_MOUT,
+        .sources        = &clk_src_apll,
+};
+
+struct clk clk_fout_epll = {
+        .name           = "fout_epll",
+        .id             = -1,
+};
+
+static struct clk *clk_src_epll_list[] = {
+        [0] = &clk_fin_epll,
+        [1] = &clk_fout_epll,
+};
+
+static struct clk_sources clk_src_epll = {
+        .sources        = clk_src_epll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
+};
+
+struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .shift          = S3C6400_CLKSRC_EPLL_MOUT_SHIFT,
+        .mask           = S3C6400_CLKSRC_EPLL_MOUT,
+        .sources        = &clk_src_epll,
+};
+
+static struct clk *clk_src_mpll_list[] = {
+        [0] = &clk_fin_mpll,
+        [1] = &clk_fout_mpll,
+};
+
+static struct clk_sources clk_src_mpll = {
+        .sources        = clk_src_mpll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
+};
+
+struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .shift          = S3C6400_CLKSRC_MPLL_MOUT_SHIFT,
+        .mask           = S3C6400_CLKSRC_MPLL_MOUT,
+        .sources        = &clk_src_mpll,
+};
+
+static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+
+        printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
+
+        if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK)
+                rate /= 2;
+
+        return rate;
+}
+
+struct clk clk_dout_mpll = {
+        .name           = "dout_mpll",
+        .id             = -1,
+        .parent         = &clk_mout_mpll.clk,
+        .get_rate       = s3c64xx_clk_doutmpll_get_rate,
+};
+
+static struct clk *clkset_spi_mmc_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        &clk_fin_epll,
+        &clk_27m,
+};
+
+static struct clk_sources clkset_spi_mmc = {
+        .sources        = clkset_spi_mmc_list,
+        .nr_sources     = ARRAY_SIZE(clkset_spi_mmc_list),
+};
+
+static struct clk *clkset_irda_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        NULL,
+        &clk_27m,
+};
+
+static struct clk_sources clkset_irda = {
+        .sources        = clkset_irda_list,
+        .nr_sources     = ARRAY_SIZE(clkset_irda_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        NULL,
+        NULL
+};
+
+static struct clk_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clk *clkset_uhost_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        &clk_fin_epll,
+        &clk_48m,
+};
+
+static struct clk_sources clkset_uhost = {
+        .sources        = clkset_uhost_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uhost_list),
+};
+
+
+/* The peripheral clocks are all controlled via clocksource followed
+ * by an optional divider and gate stage. We currently roll this into
+ * one clock which hides the intermediate clock from the mux.
+ *
+ * Note, the JPEG clock can only be an even divider...
+ *
+ * The scaler and LCD clocks depend on the S3C64XX version, and also
+ * have a common parent divisor so are not included here.
+ */
+
+static inline struct clksrc_clk *to_clksrc(struct clk *clk)
+{
+        return container_of(clk, struct clksrc_clk, clk);
+}
+
+static unsigned long s3c64xx_getrate_clksrc(struct clk *clk)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        unsigned long rate = clk_get_rate(clk->parent);
+        u32 clkdiv = __raw_readl(sclk->reg_divider);
+
+        clkdiv >>= sclk->divider_shift;
+        clkdiv &= 0xf;
+        clkdiv++;
+
+        rate /= clkdiv;
+        return rate;
+}
+
+static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        void __iomem *reg = sclk->reg_divider;
+        unsigned int div;
+        u32 val;
+
+        rate = clk_round_rate(clk, rate);
+        div = clk_get_rate(clk->parent) / rate;
+
+        val = __raw_readl(reg);
+        val &= ~sclk->mask;
+        val |= (rate - 1) << sclk->shift;
+        __raw_writel(val, reg);
+
+        return 0;
+}
+
+static int s3c64xx_setparent_clksrc(struct clk *clk, struct clk *parent)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        struct clk_sources *srcs = sclk->sources;
+        u32 clksrc = __raw_readl(S3C_CLK_SRC);
+        int src_nr = -1;
+        int ptr;
+
+        for (ptr = 0; ptr < srcs->nr_sources; ptr++)
+                if (srcs->sources[ptr] == parent) {
+                        src_nr = ptr;
+                        break;
+                }
+
+        if (src_nr >= 0) {
+                clksrc &= ~sclk->mask;
+                clksrc |= src_nr << sclk->shift;
+
+                __raw_writel(clksrc, S3C_CLK_SRC);
+                return 0;
+        }
+
+        return -EINVAL;
+}
+
+static unsigned long s3c64xx_roundrate_clksrc(struct clk *clk,
+                                              unsigned long rate)
+{
+        unsigned long parent_rate = clk_get_rate(clk->parent);
+        int div;
+
+        if (rate > parent_rate)
+                rate = parent_rate;
+        else {
+                div = rate / parent_rate;
+
+                if (div == 0)
+                        div = 1;
+                if (div > 16)
+                        div = 16;
+
+                rate = parent_rate / div;
+        }
+
+        return rate;
+}
+
+static struct clksrc_clk clk_mmc0 = {
+        .clk    = {
+                .name           = "mmc_bus",
+                .id             = 0,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC0,
+                .enable         = s3c64xx_sclk_ctrl,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_MMC0_SHIFT,
+        .mask           = S3C6400_CLKSRC_MMC0_MASK,
+        .sources        = &clkset_spi_mmc,
+        .divider_shift  = S3C6400_CLKDIV1_MMC0_SHIFT,
+        .reg_divider    = S3C_CLK_DIV1,
+};
+
+static struct clksrc_clk clk_mmc1 = {
+        .clk    = {
+                .name           = "mmc_bus",
+                .id             = 1,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC1,
+                .enable         = s3c64xx_sclk_ctrl,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_MMC1_SHIFT,
+        .mask           = S3C6400_CLKSRC_MMC1_MASK,
+        .sources        = &clkset_spi_mmc,
+        .divider_shift  = S3C6400_CLKDIV1_MMC1_SHIFT,
+        .reg_divider    = S3C_CLK_DIV1,
+};
+
+static struct clksrc_clk clk_mmc2 = {
+        .clk    = {
+                .name           = "mmc_bus",
+                .id             = 2,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC2,
+                .enable         = s3c64xx_sclk_ctrl,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_MMC2_SHIFT,
+        .mask           = S3C6400_CLKSRC_MMC2_MASK,
+        .sources        = &clkset_spi_mmc,
+        .divider_shift  = S3C6400_CLKDIV1_MMC2_SHIFT,
+        .reg_divider    = S3C_CLK_DIV1,
+};
+
+static struct clksrc_clk clk_usbhost = {
+        .clk    = {
+                .name           = "usb-host-bus",
+                .id             = -1,
+                .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
+                .enable         = s3c64xx_sclk_ctrl,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_UHOST_SHIFT,
+        .mask           = S3C6400_CLKSRC_UHOST_MASK,
+        .sources        = &clkset_uhost,
+        .divider_shift  = S3C6400_CLKDIV1_UHOST_SHIFT,
+        .reg_divider    = S3C_CLK_DIV1,
+};
+
+static struct clksrc_clk clk_uart_uclk1 = {
+        .clk    = {
+                .name           = "uclk1",
+                .id             = -1,
+                .ctrlbit        = S3C_CLKCON_SCLK_UART,
+                .enable         = s3c64xx_sclk_ctrl,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_UART_SHIFT,
+        .mask           = S3C6400_CLKSRC_UART_MASK,
+        .sources        = &clkset_uart,
+        .divider_shift  = S3C6400_CLKDIV2_UART_SHIFT,
+        .reg_divider    = S3C_CLK_DIV2,
+};
+
+/* Where does UCLK0 come from? */
+
+static struct clksrc_clk clk_spi0 = {
+        .clk    = {
+                .name           = "spi-bus",
+                .id             = 0,
+                .ctrlbit        = S3C_CLKCON_SCLK_SPI0,
+                .enable         = s3c64xx_sclk_ctrl,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_SPI0_SHIFT,
+        .mask           = S3C6400_CLKSRC_SPI0_MASK,
+        .sources        = &clkset_spi_mmc,
+        .divider_shift  = S3C6400_CLKDIV2_SPI0_SHIFT,
+        .reg_divider    = S3C_CLK_DIV2,
+};
+
+static struct clksrc_clk clk_spi1 = {
+        .clk    = {
+                .name           = "spi-bus",
+                .id             = 1,
+                .ctrlbit        = S3C_CLKCON_SCLK_SPI1,
+                .enable         = s3c64xx_sclk_ctrl,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_SPI1_SHIFT,
+        .mask           = S3C6400_CLKSRC_SPI1_MASK,
+        .sources        = &clkset_spi_mmc,
+        .divider_shift  = S3C6400_CLKDIV2_SPI1_SHIFT,
+        .reg_divider    = S3C_CLK_DIV2,
+};
+
+static struct clk clk_iis_cd0 = {
+        .name           = "iis_cdclk0",
+        .id             = -1,
+};
+
+static struct clk clk_iis_cd1 = {
+        .name           = "iis_cdclk1",
+        .id             = -1,
+};
+
+static struct clk clk_pcm_cd = {
+        .name           = "pcm_cdclk",
+        .id             = -1,
+};
+
+static struct clk *clkset_audio0_list[] = {
+        [0] = &clk_mout_epll.clk,
+        [1] = &clk_dout_mpll,
+        [2] = &clk_fin_epll,
+        [3] = &clk_iis_cd0,
+        [4] = &clk_pcm_cd,
+};
+
+static struct clk_sources clkset_audio0 = {
+        .sources        = clkset_audio0_list,
+        .nr_sources     = ARRAY_SIZE(clkset_audio0_list),
+};
+
+static struct clksrc_clk clk_audio0 = {
+        .clk    = {
+                .name           = "audio-bus",
+                .id             = 0,
+                .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
+                .enable         = s3c64xx_sclk_ctrl,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_AUDIO0_SHIFT,
+        .mask           = S3C6400_CLKSRC_AUDIO0_MASK,
+        .sources        = &clkset_audio0,
+        .divider_shift  = S3C6400_CLKDIV2_AUDIO0_SHIFT,
+        .reg_divider    = S3C_CLK_DIV2,
+};
+
+static struct clk *clkset_audio1_list[] = {
+        [0] = &clk_mout_epll.clk,
+        [1] = &clk_dout_mpll,
+        [2] = &clk_fin_epll,
+        [3] = &clk_iis_cd1,
+        [4] = &clk_pcm_cd,
+};
+
+static struct clk_sources clkset_audio1 = {
+        .sources        = clkset_audio1_list,
+        .nr_sources     = ARRAY_SIZE(clkset_audio1_list),
+};
+
+static struct clksrc_clk clk_audio1 = {
+        .clk    = {
+                .name           = "audio-bus",
+                .id             = 1,
+                .ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
+                .enable         = s3c64xx_sclk_ctrl,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_AUDIO1_SHIFT,
+        .mask           = S3C6400_CLKSRC_AUDIO1_MASK,
+        .sources        = &clkset_audio1,
+        .divider_shift  = S3C6400_CLKDIV2_AUDIO1_SHIFT,
+        .reg_divider    = S3C_CLK_DIV2,
+};
+
+static struct clksrc_clk clk_irda = {
+        .clk    = {
+                .name           = "irda-bus",
+                .id             = 0,
+                .ctrlbit        = S3C_CLKCON_SCLK_IRDA,
+                .enable         = s3c64xx_sclk_ctrl,
+                .set_parent     = s3c64xx_setparent_clksrc,
+                .get_rate       = s3c64xx_getrate_clksrc,
+                .set_rate       = s3c64xx_setrate_clksrc,
+                .round_rate     = s3c64xx_roundrate_clksrc,
+        },
+        .shift          = S3C6400_CLKSRC_IRDA_SHIFT,
+        .mask           = S3C6400_CLKSRC_IRDA_MASK,
+        .sources        = &clkset_irda,
+        .divider_shift  = S3C6400_CLKDIV2_IRDA_SHIFT,
+        .reg_divider    = S3C_CLK_DIV2,
+};
+
+/* Clock initialisation code */
+
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_epll,
+        &clk_mout_mpll,
+        &clk_mmc0,
+        &clk_mmc1,
+        &clk_mmc2,
+        &clk_usbhost,
+        &clk_uart_uclk1,
+        &clk_spi0,
+        &clk_spi1,
+        &clk_audio0,
+        &clk_audio1,
+        &clk_irda,
+};
+
+static void __init_or_cpufreq s3c6400_set_clksrc(struct clksrc_clk *clk)
+{
+        struct clk_sources *srcs = clk->sources;
+        u32 clksrc = __raw_readl(S3C_CLK_SRC);
+
+        clksrc &= clk->mask;
+        clksrc >>= clk->shift;
+
+        if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
+                printk(KERN_ERR "%s: bad source %d\n",
+                       clk->clk.name, clksrc);
+                return;
+        }
+
+        clk->clk.parent = srcs->sources[clksrc];
+
+        printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
+               clk->clk.name, clk->clk.parent->name, clksrc,
+               clk_get_rate(&clk->clk));
+}
+
+#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
+
+void __init_or_cpufreq s3c6400_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long xtal;
+        unsigned long fclk;
+        unsigned long hclk;
+        unsigned long hclk2;
+        unsigned long pclk;
+        unsigned long epll;
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned int ptr;
+        u32 clkdiv0;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        clkdiv0 = __raw_readl(S3C_CLK_DIV0);
+        printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
+
+        xtal_clk = clk_get(NULL, "xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        epll = s3c6400_get_epll(xtal);
+        mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
+        apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
+
+        fclk = mpll;
+
+        printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",
+               apll, mpll, epll);
+
+        hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
+        hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
+        pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
+
+        printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n",
+               hclk2, hclk, pclk);
+
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+        clk_fout_apll.rate = apll;
+
+        clk_h.rate = hclk;
+        clk_p.rate = pclk;
+        clk_f.rate = fclk;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c6400_set_clksrc(init_parents[ptr]);
+}
+
+static struct clk *clks[] __initdata = {
+        &clk_ext_xtal_mux,
+        &clk_iis_cd0,
+        &clk_iis_cd1,
+        &clk_pcm_cd,
+        &clk_mout_epll.clk,
+        &clk_fout_epll,
+        &clk_mout_mpll.clk,
+        &clk_dout_mpll,
+        &clk_mmc0.clk,
+        &clk_mmc1.clk,
+        &clk_mmc2.clk,
+        &clk_usbhost.clk,
+        &clk_uart_uclk1.clk,
+        &clk_spi0.clk,
+        &clk_spi1.clk,
+        &clk_audio0.clk,
+        &clk_audio1.clk,
+        &clk_irda.clk,
+};
+
+void __init s3c6400_register_clocks(void)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
+                clkp = clks[ptr];
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+        }
+
+        clk_mpll.parent = &clk_mout_mpll.clk;
+        clk_epll.parent = &clk_mout_epll.clk;
+}
diff --git a/arch/arm/plat-s3c64xx/s3c6400-init.c b/arch/arm/plat-s3c64xx/s3c6400-init.c
new file mode 100644
index 000000000000..6c28f39df097
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/s3c6400-init.c
@@ -0,0 +1,29 @@
+/* linux/arch/arm/plat-s3c64xx/s3c6400-init.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C6400 - CPU initialisation (common with other S3C64XX chips)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s3c6400.h>
+#include <plat/s3c6410.h>
+
+/* uart registration process */
+
+void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
+}
diff --git a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c b/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
new file mode 100644
index 000000000000..8e28e448dd20
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
@@ -0,0 +1,37 @@
+/* linux/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Base S3C64XX setup information for 24bpp LCD framebuffer
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/fb.h>
+
+#include <mach/regs-fb.h>
+#include <mach/gpio.h>
+#include <plat/fb.h>
+#include <plat/gpio-cfg.h>
+
+extern void s3c64xx_fb_gpio_setup_24bpp(void)
+{
+        unsigned int gpio;
+
+        for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+}
diff --git a/arch/arm/plat-s3c64xx/setup-i2c0.c b/arch/arm/plat-s3c64xx/setup-i2c0.c
new file mode 100644
index 000000000000..364480763728
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/setup-i2c0.c
@@ -0,0 +1,31 @@
+/* linux/arch/arm/plat-s3c64xx/setup-i2c0.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Base S3C64XX I2C bus 0 gpio configuration
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <mach/gpio.h>
+#include <plat/iic.h>
+#include <plat/gpio-bank-b.h>
+#include <plat/gpio-cfg.h>
+
+void s3c_i2c0_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S3C64XX_GPB(5), S3C64XX_GPB5_I2C_SCL0);
+        s3c_gpio_cfgpin(S3C64XX_GPB(6), S3C64XX_GPB6_I2C_SDA0);
+        s3c_gpio_setpull(S3C64XX_GPB(5), S3C_GPIO_PULL_UP);
+        s3c_gpio_setpull(S3C64XX_GPB(6), S3C_GPIO_PULL_UP);
+}
diff --git a/arch/arm/plat-s3c64xx/setup-i2c1.c b/arch/arm/plat-s3c64xx/setup-i2c1.c
new file mode 100644
index 000000000000..bbe229bd90ca
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/setup-i2c1.c
@@ -0,0 +1,31 @@
+/* linux/arch/arm/plat-s3c64xx/setup-i2c1.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Base S3C64XX I2C bus 1 gpio configuration
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <mach/gpio.h>
+#include <plat/iic.h>
+#include <plat/gpio-bank-b.h>
+#include <plat/gpio-cfg.h>
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S3C64XX_GPB(2), S3C64XX_GPB2_I2C_SCL1);
+        s3c_gpio_cfgpin(S3C64XX_GPB(3), S3C64XX_GPB3_I2C_SDA1);
+        s3c_gpio_setpull(S3C64XX_GPB(2), S3C_GPIO_PULL_UP);
+        s3c_gpio_setpull(S3C64XX_GPB(3), S3C_GPIO_PULL_UP);
+}
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 43aa2020f85c..fd23c0e9e698 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Thu Sep 25 10:10:50 2008
+# Last update: Sun Nov 30 16:39:36 2008
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -1380,7 +1380,7 @@ holon			MACH_HOLON		HOLON			1377
 olip8                   MACH_OLIP8              OLIP8                   1378
 ghi270hg                MACH_GHI270HG           GHI270HG                1379
 davinci_dm6467_evm      MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM      1380
-davinci_dm355_evm       MACH_DAVINCI_DM350_EVM  DAVINCI_DM350_EVM       1381
+davinci_dm355_evm       MACH_DAVINCI_DM355_EVM  DAVINCI_DM355_EVM       1381
 blackriver              MACH_BLACKRIVER         BLACKRIVER              1383
 sandgate_wp             MACH_SANDGATEWP         SANDGATEWP              1384
 cdotbwsg                MACH_CDOTBWSG           CDOTBWSG                1385
@@ -1771,7 +1771,7 @@ axs_ultrax		MACH_AXS_ULTRAX		AXS_ULTRAX		1779
 at572d940deb            MACH_AT572D940DEB       AT572D940DEB            1780
 davinci_da8xx_evm       MACH_DAVINCI_DA8XX_EVM  DAVINCI_DA8XX_EVM       1781
 ep9302                  MACH_EP9302             EP9302                  1782
-at572d940hfeb           MACH_AT572D940HFEB      AT572D940HFEB           1783
+at572d940hfek           MACH_AT572D940HFEB      AT572D940HFEB           1783
 cybook3                 MACH_CYBOOK3            CYBOOK3                 1784
 wdg002                  MACH_WDG002             WDG002                  1785
 sg560adsl               MACH_SG560ADSL          SG560ADSL               1786
@@ -1899,3 +1899,98 @@ rut100			MACH_RUT100		RUT100			1908
 asusp535                MACH_ASUSP535           ASUSP535                1909
 htcraphael              MACH_HTCRAPHAEL         HTCRAPHAEL              1910
 sygdg1                  MACH_SYGDG1             SYGDG1                  1911
+sygdg2                  MACH_SYGDG2             SYGDG2                  1912
+seoul                   MACH_SEOUL              SEOUL                   1913
+salerno                 MACH_SALERNO            SALERNO                 1914
+ucn_s3c64xx             MACH_UCN_S3C64XX        UCN_S3C64XX             1915
+msm7201a                MACH_MSM7201A           MSM7201A                1916
+lpr1                    MACH_LPR1               LPR1                    1917
+armadillo500fx          MACH_ARMADILLO500FX     ARMADILLO500FX          1918
+g3evm                   MACH_G3EVM              G3EVM                   1919
+z3_dm355                MACH_Z3_DM355           Z3_DM355                1920
+w90p910evb              MACH_W90P910EVB         W90P910EVB              1921
+w90p920evb              MACH_W90P920EVB         W90P920EVB              1922
+w90p950evb              MACH_W90P950EVB         W90P950EVB              1923
+w90n960evb              MACH_W90N960EVB         W90N960EVB              1924
+camhd                   MACH_CAMHD              CAMHD                   1925
+mvc100                  MACH_MVC100             MVC100                  1926
+electrum_200            MACH_ELECTRUM_200       ELECTRUM_200            1927
+htcjade                 MACH_HTCJADE            HTCJADE                 1928
+memphis                 MACH_MEMPHIS            MEMPHIS                 1929
+imx27sbc                MACH_IMX27SBC           IMX27SBC                1930
+lextar                  MACH_LEXTAR             LEXTAR                  1931
+mv88f6281gtw_ge         MACH_MV88F6281GTW_GE    MV88F6281GTW_GE         1932
+ncp                     MACH_NCP                NCP                     1933
+z32an_series            MACH_Z32AN              Z32AN                   1934
+tmq_capd                MACH_TMQ_CAPD           TMQ_CAPD                1935
+omap3_wl                MACH_OMAP3_WL           OMAP3_WL                1936
+chumby                  MACH_CHUMBY             CHUMBY                  1937
+atsarm9                 MACH_ATSARM9            ATSARM9                 1938
+davinci_dm365_evm       MACH_DAVINCI_DM365_EVM  DAVINCI_DM365_EVM       1939
+bahamas                 MACH_BAHAMAS            BAHAMAS                 1940
+das                     MACH_DAS                DAS                     1941
+minidas                 MACH_MINIDAS            MINIDAS                 1942
+vk1000                  MACH_VK1000             VK1000                  1943
+centro                  MACH_CENTRO             CENTRO                  1944
+ctera_2bay              MACH_CTERA_2BAY         CTERA_2BAY              1945
+edgeconnect             MACH_EDGECONNECT        EDGECONNECT             1946
+nd27000                 MACH_ND27000            ND27000                 1947
+cobra                   MACH_GEMALTO_COBRA      GEMALTO_COBRA           1948
+ingelabs_comet          MACH_INGELABS_COMET     INGELABS_COMET          1949
+pollux_wiz              MACH_POLLUX_WIZ         POLLUX_WIZ              1950
+blackstone              MACH_BLACKSTONE         BLACKSTONE              1951
+topaz                   MACH_TOPAZ              TOPAZ                   1952
+aixle                   MACH_AIXLE              AIXLE                   1953
+mw998                   MACH_MW998              MW998                   1954
+nokia_rx51              MACH_NOKIA_RX51         NOKIA_RX51              1955
+vsc5605ev               MACH_VSC5605EV          VSC5605EV               1956
+nt98700dk               MACH_NT98700DK          NT98700DK               1957
+icontact                MACH_ICONTACT           ICONTACT                1958
+swarco_frcpu            MACH_SWARCO_FRCPU       SWARCO_FRCPU            1959
+swarco_scpu             MACH_SWARCO_SCPU        SWARCO_SCPU             1960
+bbox_p16                MACH_BBOX_P16           BBOX_P16                1961
+bstd                    MACH_BSTD               BSTD                    1962
+sbc2440ii               MACH_SBC2440II          SBC2440II               1963
+pcm034                  MACH_PCM034             PCM034                  1964
+neso                    MACH_NESO               NESO                    1965
+wlnx_9g20               MACH_WLNX_9G20          WLNX_9G20               1966
+omap_zoom2              MACH_OMAP_ZOOM2         OMAP_ZOOM2              1967
+totemnova               MACH_TOTEMNOVA          TOTEMNOVA               1968
+c5000                   MACH_C5000              C5000                   1969
+unipo_at91sam9263       MACH_UNIPO_AT91SAM9263  UNIPO_AT91SAM9263       1970
+ethernut5               MACH_ETHERNUT5          ETHERNUT5               1971
+arm11                   MACH_ARM11              ARM11                   1972
+cpuat9260               MACH_CPUAT9260          CPUAT9260               1973
+cpupxa255               MACH_CPUPXA255          CPUPXA255               1974
+cpuimx27                MACH_CPUIMX27           CPUIMX27                1975
+cheflux                 MACH_CHEFLUX            CHEFLUX                 1976
+eb_cpux9k2              MACH_EB_CPUX9K2         EB_CPUX9K2              1977
+opcotec                 MACH_OPCOTEC            OPCOTEC                 1978
+yt                      MACH_YT                 YT                      1979
+motoq                   MACH_MOTOQ              MOTOQ                   1980
+bsb1                    MACH_BSB1               BSB1                    1981
+acs5k                   MACH_ACS5K              ACS5K                   1982
+milan                   MACH_MILAN              MILAN                   1983
+quartzv2                MACH_QUARTZV2           QUARTZV2                1984
+rsvp                    MACH_RSVP               RSVP                    1985
+rmp200                  MACH_RMP200             RMP200                  1986
+snapper_9260            MACH_SNAPPER_9260       SNAPPER_9260            1987
+dsm320                  MACH_DSM320             DSM320                  1988
+adsgcm                  MACH_ADSGCM             ADSGCM                  1989
+ase2_400                MACH_ASE2_400           ASE2_400                1990
+pizza                   MACH_PIZZA              PIZZA                   1991
+spot_ngpl               MACH_SPOT_NGPL          SPOT_NGPL               1992
+armata                  MACH_ARMATA             ARMATA                  1993
+exeda                   MACH_EXEDA              EXEDA                   1994
+mx31sf005               MACH_MX31SF005          MX31SF005               1995
+f5d8231_4_v2            MACH_F5D8231_4_V2       F5D8231_4_V2            1996
+q2440                   MACH_Q2440              Q2440                   1997
+qq2440                  MACH_QQ2440             QQ2440                  1998
+mini2440                MACH_MINI2440           MINI2440                1999
+colibri300              MACH_COLIBRI300         COLIBRI300              2000
+jades                   MACH_JADES              JADES                   2001
+spark                   MACH_SPARK              SPARK                   2002
+benzina                 MACH_BENZINA            BENZINA                 2003
+blaze                   MACH_BLAZE              BLAZE                   2004
+linkstation_ls_hgl      MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL      2005
+htcvenus                MACH_HTCVENUS           HTCVENUS                2006
diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h
index c85860bad585..8de86e4feada 100644
--- a/arch/arm/vfp/vfp.h
+++ b/arch/arm/vfp/vfp.h
@@ -377,6 +377,6 @@ struct op {
         u32 flags;
 };
 
-#ifdef CONFIG_SMP
+#if defined(CONFIG_SMP) || defined(CONFIG_PM)
 extern void vfp_save_state(void *location, u32 fpexc);
 #endif
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index a62dcf7098ba..c92a08bd6a86 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -101,9 +101,12 @@ ENTRY(vfp_support_entry)
         VFPFSTMIA r4, r5                @ save the working registers
         VFPFMRX r5, FPSCR               @ current status
         tst     r1, #FPEXC_EX           @ is there additional state to save?
-        VFPFMRX r6, FPINST, NE          @ FPINST (only if FPEXC.EX is set)
-        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
-        VFPFMRX r8, FPINST2, NE         @ FPINST2 if needed (and present)
+        beq     1f
+        VFPFMRX r6, FPINST              @ FPINST (only if FPEXC.EX is set)
+        tst     r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
+        beq     1f
+        VFPFMRX r8, FPINST2             @ FPINST2 if needed (and present)
+1:
         stmia   r4, {r1, r5, r6, r8}    @ save FPEXC, FPSCR, FPINST, FPINST2
                                         @ and point r4 at the word at the
                                         @ start of the register dump
@@ -117,9 +120,12 @@ no_old_VFP_process:
                                         @ FPEXC is in a safe state
         ldmia   r10, {r1, r5, r6, r8}   @ load FPEXC, FPSCR, FPINST, FPINST2
         tst     r1, #FPEXC_EX           @ is there additional state to restore?
-        VFPFMXR FPINST, r6, NE          @ restore FPINST (only if FPEXC.EX is set)
-        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to write?
-        VFPFMXR FPINST2, r8, NE         @ FPINST2 if needed (and present)
+        beq     1f
+        VFPFMXR FPINST, r6              @ restore FPINST (only if FPEXC.EX is set)
+        tst     r1, #FPEXC_FP2V         @ is there an FPINST2 to write?
+        beq     1f
+        VFPFMXR FPINST2, r8             @ FPINST2 if needed (and present)
+1:
         VFPFMXR FPSCR, r5               @ restore status
 
 check_for_exception:
@@ -166,7 +172,7 @@ process_exception:
                                         @ retry the faulted instruction
 ENDPROC(vfp_support_entry)
 
-#ifdef CONFIG_SMP
+#if defined(CONFIG_SMP) || defined(CONFIG_PM)
 ENTRY(vfp_save_state)
         @ Save the current VFP state
         @ r0 - save location
@@ -175,9 +181,12 @@ ENTRY(vfp_save_state)
         VFPFSTMIA r0, r2                @ save the working registers
         VFPFMRX r2, FPSCR               @ current status
         tst     r1, #FPEXC_EX           @ is there additional state to save?
-        VFPFMRX r3, FPINST, NE          @ FPINST (only if FPEXC.EX is set)
-        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
-        VFPFMRX r12, FPINST2, NE        @ FPINST2 if needed (and present)
+        beq     1f
+        VFPFMRX r3, FPINST              @ FPINST (only if FPEXC.EX is set)
+        tst     r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
+        beq     1f
+        VFPFMRX r12, FPINST2            @ FPINST2 if needed (and present)
+1:
         stmia   r0, {r1, r2, r3, r12}   @ save FPEXC, FPSCR, FPINST, FPINST2
         mov     pc, lr
 ENDPROC(vfp_save_state)
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c0d2c9bb952b..9f476a1be2ca 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -322,6 +322,61 @@ static void vfp_enable(void *unused)
         set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
 }
 
+#ifdef CONFIG_PM
+#include <linux/sysdev.h>
+
+static int vfp_pm_suspend(struct sys_device *dev, pm_message_t state)
+{
+        struct thread_info *ti = current_thread_info();
+        u32 fpexc = fmrx(FPEXC);
+
+        /* if vfp is on, then save state for resumption */
+        if (fpexc & FPEXC_EN) {
+                printk(KERN_DEBUG "%s: saving vfp state\n", __func__);
+                vfp_save_state(&ti->vfpstate, fpexc);
+
+                /* disable, just in case */
+                fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
+        }
+
+        /* clear any information we had about last context state */
+        memset(last_VFP_context, 0, sizeof(last_VFP_context));
+
+        return 0;
+}
+
+static int vfp_pm_resume(struct sys_device *dev)
+{
+        /* ensure we have access to the vfp */
+        vfp_enable(NULL);
+
+        /* and disable it to ensure the next usage restores the state */
+        fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
+
+        return 0;
+}
+
+static struct sysdev_class vfp_pm_sysclass = {
+        .name           = "vfp",
+        .suspend        = vfp_pm_suspend,
+        .resume         = vfp_pm_resume,
+};
+
+static struct sys_device vfp_pm_sysdev = {
+        .cls    = &vfp_pm_sysclass,
+};
+
+static void vfp_pm_init(void)
+{
+        sysdev_class_register(&vfp_pm_sysclass);
+        sysdev_register(&vfp_pm_sysdev);
+}
+
+
+#else
+static inline void vfp_pm_init(void) { }
+#endif /* CONFIG_PM */
+
 #include <linux/smp.h>
 
 /*
@@ -365,12 +420,22 @@ static int __init vfp_init(void)
                 vfp_vector = vfp_support_entry;
 
                 thread_register_notifier(&vfp_notifier_block);
+                vfp_pm_init();
 
                 /*
                  * We detected VFP, and the support code is
                  * in place; report VFP support to userspace.
                  */
                 elf_hwcap |= HWCAP_VFP;
+#ifdef CONFIG_NEON
+                /*
+                 * Check for the presence of the Advanced SIMD
+                 * load/store instructions, integer and single
+                 * precision floating point operations.
+                 */
+                if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
+                        elf_hwcap |= HWCAP_NEON;
+#endif
         }
         return 0;
 }
diff --git a/arch/avr32/include/asm/atomic.h b/arch/avr32/include/asm/atomic.h
index 7ef3862a73d0..318815107748 100644
--- a/arch/avr32/include/asm/atomic.h
+++ b/arch/avr32/include/asm/atomic.h
@@ -14,9 +14,9 @@
 #ifndef __ASM_AVR32_ATOMIC_H
 #define __ASM_AVR32_ATOMIC_H
 
+#include <linux/types.h>
 #include <asm/system.h>
 
-typedef struct { volatile int counter; } atomic_t;
 #define ATOMIC_INIT(i)  { (i) }
 
 #define atomic_read(v)          ((v)->counter)
diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h
index 1a50b69b1a19..f7dd5f71edf7 100644
--- a/arch/avr32/include/asm/bitops.h
+++ b/arch/avr32/include/asm/bitops.h
@@ -263,6 +263,11 @@ static inline int fls(unsigned long word)
         return 32 - result;
 }
 
+static inline int __fls(unsigned long word)
+{
+        return fls(word) - 1;
+}
+
 unsigned long find_first_zero_bit(const unsigned long *addr,
                                   unsigned long size);
 unsigned long find_next_zero_bit(const unsigned long *addr,
diff --git a/arch/avr32/kernel/init_task.c b/arch/avr32/kernel/init_task.c
index 44058469c6ec..993d56ee3cf3 100644
--- a/arch/avr32/kernel/init_task.c
+++ b/arch/avr32/kernel/init_task.c
@@ -13,7 +13,6 @@
 
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
index 283481d74a5b..0ff46bf873b0 100644
--- a/arch/avr32/kernel/time.c
+++ b/arch/avr32/kernel/time.c
@@ -106,7 +106,6 @@ static struct clock_event_device comparator = {
         .features       = CLOCK_EVT_FEAT_ONESHOT,
         .shift          = 16,
         .rating         = 50,
-        .cpumask        = CPU_MASK_CPU0,
         .set_next_event = comparator_next_event,
         .set_mode       = comparator_mode,
 };
@@ -134,6 +133,7 @@ void __init time_init(void)
         comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
         comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
         comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
+        comparator.cpumask = cpumask_of(0);
 
         sysreg_write(COMPARE, 0);
         timer_irqaction.dev_id = &comparator;
diff --git a/arch/avr32/kernel/traps.c b/arch/avr32/kernel/traps.c
index 0d987373bc01..d547c8df157d 100644
--- a/arch/avr32/kernel/traps.c
+++ b/arch/avr32/kernel/traps.c
@@ -7,6 +7,7 @@
  */
 
 #include <linux/bug.h>
+#include <linux/hardirq.h>
 #include <linux/init.h>
 #include <linux/kallsyms.h>
 #include <linux/kdebug.h>
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index 138a00a2a2d0..442f08c5e641 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -198,7 +198,7 @@ dump_clock(struct clk *parent, struct clkinf *r)
         unsigned        i;
 
         /* skip clocks coupled to devices that aren't registered */
-        if (parent->dev && !parent->dev->bus_id[0] && !parent->users)
+        if (parent->dev && !dev_name(parent->dev) && !parent->users)
                 return;
 
         /* <nest spaces> name <pad to end> */
@@ -214,7 +214,7 @@ dump_clock(struct clk *parent, struct clkinf *r)
                 parent->users ? "on" : "off",   /* NOTE: not-paranoid!! */
                 clk_get_rate(parent));
         if (parent->dev)
-                seq_printf(r->s, ", for %s", parent->dev->bus_id);
+                seq_printf(r->s, ", for %s", dev_name(parent->dev));
         seq_printf(r->s, "\n");
 
         /* cost of this scan is small, but not linear... */
diff --git a/arch/blackfin/boot/Makefile b/arch/blackfin/boot/Makefile
index 522f3c124060..e028d13481a9 100644
--- a/arch/blackfin/boot/Makefile
+++ b/arch/blackfin/boot/Makefile
@@ -25,7 +25,7 @@ $(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
 
 $(obj)/vmImage: $(obj)/vmlinux.gz
         $(call if_changed,uimage)
-        @echo 'Kernel: $@ is ready'
+        @$(kecho) 'Kernel: $@ is ready'
 
 install:
         sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index 7cf508718605..25776c19064b 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -1,6 +1,7 @@
 #ifndef __ARCH_BLACKFIN_ATOMIC__
 #define __ARCH_BLACKFIN_ATOMIC__
 
+#include <linux/types.h>
 #include <asm/system.h> /* local_irq_XXX() */
 
 /*
@@ -13,9 +14,6 @@
  * Tony Kou (tonyko@lineo.ca)   Lineo Inc.   2001
  */
 
-typedef struct {
-        int counter;
-} atomic_t;
 #define ATOMIC_INIT(i)  { (i) }
 
 #define atomic_read(v)          ((v)->counter)
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index b39a175c79c1..c428e4106f89 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -213,6 +213,7 @@ static __inline__ int __test_bit(int nr, const void *addr)
 #endif                          /* __KERNEL__ */
 
 #include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
 #include <asm-generic/bitops/fls64.h>
 
 #endif                          /* _BLACKFIN_BITOPS_H */
diff --git a/arch/blackfin/kernel/init_task.c b/arch/blackfin/kernel/init_task.c
index 6bdba7b21109..2c228c020978 100644
--- a/arch/blackfin/kernel/init_task.c
+++ b/arch/blackfin/kernel/init_task.c
@@ -33,7 +33,6 @@
 #include <linux/mqueue.h>
 #include <linux/fs.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index e887efc86c29..0ed2badfd746 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -162,7 +162,6 @@ static struct clock_event_device clockevent_bfin = {
         .name           = "bfin_core_timer",
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .shift          = 32,
-        .cpumask        = CPU_MASK_CPU0,
         .set_next_event = bfin_timer_set_next_event,
         .set_mode       = bfin_timer_set_mode,
 };
@@ -193,6 +192,7 @@ static int __init bfin_clockevent_init(void)
         clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
         clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
         clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
+        clockevent_bfin.cpumask = cpumask_of(0);
         clockevents_register_device(&clockevent_bfin);
 
         return 0;
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index b17aeea8d620..3462245fe9fb 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -681,6 +681,8 @@ source "drivers/usb/Kconfig"
 
 source "drivers/uwb/Kconfig"
 
+source "drivers/staging/Kconfig"
+
 source "arch/cris/Kconfig.debug"
 
 source "security/Kconfig"
diff --git a/arch/cris/arch-v32/drivers/iop_fw_load.c b/arch/cris/arch-v32/drivers/iop_fw_load.c
index 3b3857ec1f15..2f8ea0f7a63c 100644
--- a/arch/cris/arch-v32/drivers/iop_fw_load.c
+++ b/arch/cris/arch-v32/drivers/iop_fw_load.c
@@ -24,12 +24,12 @@
 #error "Please contact <greg@kroah.com> for details on how to fix it properly."
 
 static struct device iop_spu_device[2] = {
-        { .bus_id =     "iop-spu0", },
-        { .bus_id =     "iop-spu1", },
+        { .init_name =     "iop-spu0", },
+        { .init_name =     "iop-spu1", },
 };
 
 static struct device iop_mpu_device = {
-        .bus_id =       "iop-mpu",
+        .init_name =       "iop-mpu",
 };
 
 static int wait_mpu_idle(void)
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c
index 173c141ac9ba..295131fee710 100644
--- a/arch/cris/arch-v32/kernel/irq.c
+++ b/arch/cris/arch-v32/kernel/irq.c
@@ -325,11 +325,11 @@ static void end_crisv32_irq(unsigned int irq)
 {
 }
 
-void set_affinity_crisv32_irq(unsigned int irq, cpumask_t dest)
+void set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
 {
         unsigned long flags;
         spin_lock_irqsave(&irq_lock, flags);
-        irq_allocations[irq - FIRST_IRQ].mask = dest;
+        irq_allocations[irq - FIRST_IRQ].mask = *dest;
         spin_unlock_irqrestore(&irq_lock, flags);
 }
 
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index 52e16c6436f9..9dac17334640 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -29,11 +29,7 @@
 spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
 
 /* CPU masks */
-cpumask_t cpu_online_map = CPU_MASK_NONE;
-EXPORT_SYMBOL(cpu_online_map);
 cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
-cpumask_t cpu_possible_map;
-EXPORT_SYMBOL(cpu_possible_map);
 EXPORT_SYMBOL(phys_cpu_present_map);
 
 /* Variables used during SMP boot */
diff --git a/arch/cris/include/asm/atomic.h b/arch/cris/include/asm/atomic.h
index f71ea686a2ea..5718dd8902a1 100644
--- a/arch/cris/include/asm/atomic.h
+++ b/arch/cris/include/asm/atomic.h
@@ -4,7 +4,7 @@
 #define __ASM_CRIS_ATOMIC__
 
 #include <linux/compiler.h>
-
+#include <linux/types.h>
 #include <asm/system.h>
 #include <arch/atomic.h>
 
@@ -13,8 +13,6 @@
  * resource counting etc..
  */
 
-typedef struct { volatile int counter; } atomic_t;
-
 #define ATOMIC_INIT(i)  { (i) }
 
 #define atomic_read(v) ((v)->counter)
diff --git a/arch/cris/include/asm/bitops.h b/arch/cris/include/asm/bitops.h
index c0e62f811e09..9e69cfb7f134 100644
--- a/arch/cris/include/asm/bitops.h
+++ b/arch/cris/include/asm/bitops.h
@@ -148,6 +148,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
 #define ffs kernel_ffs
 
 #include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
 #include <asm-generic/bitops/fls64.h>
 #include <asm-generic/bitops/hweight.h>
 #include <asm-generic/bitops/find.h>
diff --git a/arch/cris/include/asm/smp.h b/arch/cris/include/asm/smp.h
index dba33aba3e95..c615a06dd757 100644
--- a/arch/cris/include/asm/smp.h
+++ b/arch/cris/include/asm/smp.h
@@ -4,7 +4,6 @@
 #include <linux/cpumask.h>
 
 extern cpumask_t phys_cpu_present_map;
-extern cpumask_t cpu_possible_map;
 
 #define raw_smp_processor_id() (current_thread_info()->cpu)
 
diff --git a/arch/cris/kernel/process.c b/arch/cris/kernel/process.c
index 5933656db5a2..60816e876455 100644
--- a/arch/cris/kernel/process.c
+++ b/arch/cris/kernel/process.c
@@ -37,7 +37,6 @@
  * setup.
  */
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/frv/kernel/init_task.c b/arch/frv/kernel/init_task.c
index e2198815b630..29429a8b7f6a 100644
--- a/arch/frv/kernel/init_task.c
+++ b/arch/frv/kernel/init_task.c
@@ -10,7 +10,6 @@
 #include <asm/pgtable.h>
 
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index 28f06fd9b7b7..9420648352b8 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -220,6 +220,8 @@ source "drivers/uwb/Kconfig"
 
 endmenu
 
+source "drivers/staging/Kconfig"
+
 source "fs/Kconfig"
 
 source "arch/h8300/Kconfig.debug"
diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
index b4cf0ea97ede..833186c8dc3b 100644
--- a/arch/h8300/include/asm/atomic.h
+++ b/arch/h8300/include/asm/atomic.h
@@ -1,12 +1,13 @@
 #ifndef __ARCH_H8300_ATOMIC__
 #define __ARCH_H8300_ATOMIC__
 
+#include <linux/types.h>
+
 /*
  * Atomic operations that C can't guarantee us.  Useful for
  * resource counting etc..
  */
 
-typedef struct { int counter; } atomic_t;
 #define ATOMIC_INIT(i)  { (i) }
 
 #define atomic_read(v)          ((v)->counter)
diff --git a/arch/h8300/include/asm/bitops.h b/arch/h8300/include/asm/bitops.h
index cb18e3b0aa94..cb9ddf5fc54f 100644
--- a/arch/h8300/include/asm/bitops.h
+++ b/arch/h8300/include/asm/bitops.h
@@ -207,6 +207,7 @@ static __inline__ unsigned long __ffs(unsigned long word)
 #endif /* __KERNEL__ */
 
 #include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
 #include <asm-generic/bitops/fls64.h>
 
 #endif /* _H8300_BITOPS_H */
diff --git a/arch/h8300/kernel/init_task.c b/arch/h8300/kernel/init_task.c
index 93a4899e46c2..cb5dc552da97 100644
--- a/arch/h8300/kernel/init_task.c
+++ b/arch/h8300/kernel/init_task.c
@@ -12,7 +12,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 6bd91ed7cd03..3d31636cbafb 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -99,7 +99,7 @@ config GENERIC_IOMAP
         bool
         default y
 
-config SCHED_NO_NO_OMIT_FRAME_POINTER
+config SCHED_OMIT_FRAME_POINTER
         bool
         default y
 
@@ -687,3 +687,6 @@ config IRQ_PER_CPU
 
 config IOMMU_HELPER
         def_bool (IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB || IA64_GENERIC || SWIOTLB)
+
+config IOMMU_API
+        def_bool (DMAR)
diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c
index c2f58ff364e7..cc0a3182db3c 100644
--- a/arch/ia64/hp/sim/hpsim_irq.c
+++ b/arch/ia64/hp/sim/hpsim_irq.c
@@ -22,7 +22,7 @@ hpsim_irq_noop (unsigned int irq)
 }
 
 static void
-hpsim_set_affinity_noop (unsigned int a, cpumask_t b)
+hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b)
 {
 }
 
diff --git a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c
index 3d47839a0c48..e4d8fde68103 100644
--- a/arch/ia64/hp/sim/simeth.c
+++ b/arch/ia64/hp/sim/simeth.c
@@ -167,6 +167,15 @@ netdev_read(int fd, unsigned char *buf, unsigned int len)
         return ia64_ssc(fd, __pa(buf), len, 0, SSC_NETDEV_RECV);
 }
 
+static const struct net_device_ops simeth_netdev_ops = {
+        .ndo_open               = simeth_open,
+        .ndo_stop               = simeth_close,
+        .ndo_start_xmit         = simeth_tx,
+        .ndo_get_stats          = simeth_get_stats,
+        .ndo_set_multicast_list = set_multicast_list, /* not yet used */
+
+};
+
 /*
  * Function shared with module code, so cannot be in init section
  *
@@ -206,14 +215,10 @@ simeth_probe1(void)
 
         memcpy(dev->dev_addr, mac_addr, sizeof(mac_addr));
 
-        local = dev->priv;
+        local = netdev_priv(dev);
         local->simfd = fd; /* keep track of underlying file descriptor */
 
-        dev->open               = simeth_open;
-        dev->stop               = simeth_close;
-        dev->hard_start_xmit    = simeth_tx;
-        dev->get_stats          = simeth_get_stats;
-        dev->set_multicast_list = set_multicast_list; /* no yet used */
+        dev->netdev_ops = &simeth_netdev_ops;
 
         err = register_netdev(dev);
         if (err) {
@@ -325,7 +330,7 @@ simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr)
          * we get DOWN then UP.
          */
 
-        local = dev->priv;
+        local = netdev_priv(dev);
         /* now do it for real */
         r = event == NETDEV_UP ?
                 netdev_attach(local->simfd, dev->irq, ntohl(ifa->ifa_local)):
@@ -380,7 +385,7 @@ frame_print(unsigned char *from, unsigned char *frame, int len)
 static int
 simeth_tx(struct sk_buff *skb, struct net_device *dev)
 {
-        struct simeth_local *local = dev->priv;
+        struct simeth_local *local = netdev_priv(dev);
 
 #if 0
         /* ensure we have at least ETH_ZLEN bytes (min frame size) */
@@ -443,7 +448,7 @@ simeth_rx(struct net_device *dev)
         int                     len;
         int                     rcv_count = SIMETH_RECV_MAX;
 
-        local = dev->priv;
+        local = netdev_priv(dev);
         /*
          * the loop concept has been borrowed from other drivers
          * looks to me like it's a throttling thing to avoid pushing to many
@@ -507,7 +512,7 @@ simeth_interrupt(int irq, void *dev_id)
 static struct net_device_stats *
 simeth_get_stats(struct net_device *dev)
 {
-        struct simeth_local *local = dev->priv;
+        struct simeth_local *local = netdev_priv(dev);
 
         return &local->stats;
 }
diff --git a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c
index 5e92ae00bdbb..16ef61a91d95 100644
--- a/arch/ia64/ia32/sys_ia32.c
+++ b/arch/ia64/ia32/sys_ia32.c
@@ -1767,25 +1767,24 @@ groups16_from_user(struct group_info *group_info, short __user *grouplist)
 asmlinkage long
 sys32_getgroups16 (int gidsetsize, short __user *grouplist)
 {
+        const struct cred *cred = current_cred();
         int i;
 
         if (gidsetsize < 0)
                 return -EINVAL;
 
-        get_group_info(current->group_info);
-        i = current->group_info->ngroups;
+        i = cred->group_info->ngroups;
         if (gidsetsize) {
                 if (i > gidsetsize) {
                         i = -EINVAL;
                         goto out;
                 }
-                if (groups16_to_user(grouplist, current->group_info)) {
+                if (groups16_to_user(grouplist, cred->group_info)) {
                         i = -EFAULT;
                         goto out;
                 }
         }
 out:
-        put_group_info(current->group_info);
         return i;
 }
 
diff --git a/arch/ia64/include/asm/atomic.h b/arch/ia64/include/asm/atomic.h
index 50c2b83fd5a0..d37292bd9875 100644
--- a/arch/ia64/include/asm/atomic.h
+++ b/arch/ia64/include/asm/atomic.h
@@ -17,12 +17,6 @@
 #include <asm/intrinsics.h>
 #include <asm/system.h>
 
-/*
- * On IA-64, counter must always be volatile to ensure that that the
- * memory accesses are ordered.
- */
-typedef struct { volatile __s32 counter; } atomic_t;
-typedef struct { volatile __s64 counter; } atomic64_t;
 
 #define ATOMIC_INIT(i)          ((atomic_t) { (i) })
 #define ATOMIC64_INIT(i)        ((atomic64_t) { (i) })
diff --git a/arch/ia64/include/asm/irq.h b/arch/ia64/include/asm/irq.h
index 3627116fb0e2..36429a532630 100644
--- a/arch/ia64/include/asm/irq.h
+++ b/arch/ia64/include/asm/irq.h
@@ -27,7 +27,7 @@ irq_canonicalize (int irq)
 }
 
 extern void set_irq_affinity_info (unsigned int irq, int dest, int redir);
-bool is_affinity_mask_valid(cpumask_t cpumask);
+bool is_affinity_mask_valid(cpumask_var_t cpumask);
 
 #define is_affinity_mask_valid is_affinity_mask_valid
 
diff --git a/arch/ia64/include/asm/kvm.h b/arch/ia64/include/asm/kvm.h
index f38472ac2267..68aa6da807c1 100644
--- a/arch/ia64/include/asm/kvm.h
+++ b/arch/ia64/include/asm/kvm.h
@@ -166,8 +166,6 @@ struct saved_vpd {
 };
 
 struct kvm_regs {
-        char *saved_guest;
-        char *saved_stack;
         struct saved_vpd vpd;
         /*Arch-regs*/
         int mp_state;
@@ -200,6 +198,10 @@ struct kvm_regs {
         unsigned long fp_psr;       /*used for lazy float register */
         unsigned long saved_gp;
         /*for phycial  emulation */
+
+        union context saved_guest;
+
+        unsigned long reserved[64];     /* for future use */
 };
 
 struct kvm_sregs {
diff --git a/arch/ia64/include/asm/kvm_host.h b/arch/ia64/include/asm/kvm_host.h
index c60d324da540..348663661659 100644
--- a/arch/ia64/include/asm/kvm_host.h
+++ b/arch/ia64/include/asm/kvm_host.h
@@ -23,17 +23,6 @@
 #ifndef __ASM_KVM_HOST_H
 #define __ASM_KVM_HOST_H
 
-
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/kvm.h>
-#include <linux/kvm_para.h>
-#include <linux/kvm_types.h>
-
-#include <asm/pal.h>
-#include <asm/sal.h>
-
-#define KVM_MAX_VCPUS 4
 #define KVM_MEMORY_SLOTS 32
 /* memory slots that does not exposed to userspace */
 #define KVM_PRIVATE_MEM_SLOTS 4
@@ -50,70 +39,132 @@
 #define EXIT_REASON_EXTERNAL_INTERRUPT  6
 #define EXIT_REASON_IPI                 7
 #define EXIT_REASON_PTC_G               8
+#define EXIT_REASON_DEBUG               20
 
 /*Define vmm address space and vm data space.*/
-#define KVM_VMM_SIZE (16UL<<20)
+#define KVM_VMM_SIZE (__IA64_UL_CONST(16)<<20)
 #define KVM_VMM_SHIFT 24
-#define KVM_VMM_BASE 0xD000000000000000UL
-#define VMM_SIZE (8UL<<20)
+#define KVM_VMM_BASE 0xD000000000000000
+#define VMM_SIZE (__IA64_UL_CONST(8)<<20)
 
 /*
  * Define vm_buffer, used by PAL Services, base address.
- * Note: vmbuffer is in the VMM-BLOCK, the size must be < 8M
+ * Note: vm_buffer is in the VMM-BLOCK, the size must be < 8M
  */
 #define KVM_VM_BUFFER_BASE (KVM_VMM_BASE + VMM_SIZE)
-#define KVM_VM_BUFFER_SIZE (8UL<<20)
-
-/*Define Virtual machine data layout.*/
-#define KVM_VM_DATA_SHIFT  24
-#define KVM_VM_DATA_SIZE (1UL << KVM_VM_DATA_SHIFT)
-#define KVM_VM_DATA_BASE (KVM_VMM_BASE + KVM_VMM_SIZE)
-
-
-#define KVM_P2M_BASE    KVM_VM_DATA_BASE
-#define KVM_P2M_OFS     0
-#define KVM_P2M_SIZE    (8UL << 20)
-
-#define KVM_VHPT_BASE   (KVM_P2M_BASE + KVM_P2M_SIZE)
-#define KVM_VHPT_OFS    KVM_P2M_SIZE
-#define KVM_VHPT_BLOCK_SIZE   (2UL << 20)
-#define VHPT_SHIFT      18
-#define VHPT_SIZE       (1UL << VHPT_SHIFT)
-#define VHPT_NUM_ENTRIES (1<<(VHPT_SHIFT-5))
-
-#define KVM_VTLB_BASE   (KVM_VHPT_BASE+KVM_VHPT_BLOCK_SIZE)
-#define KVM_VTLB_OFS    (KVM_VHPT_OFS+KVM_VHPT_BLOCK_SIZE)
-#define KVM_VTLB_BLOCK_SIZE   (1UL<<20)
-#define VTLB_SHIFT      17
-#define VTLB_SIZE       (1UL<<VTLB_SHIFT)
-#define VTLB_NUM_ENTRIES (1<<(VTLB_SHIFT-5))
-
-#define KVM_VPD_BASE   (KVM_VTLB_BASE+KVM_VTLB_BLOCK_SIZE)
-#define KVM_VPD_OFS    (KVM_VTLB_OFS+KVM_VTLB_BLOCK_SIZE)
-#define KVM_VPD_BLOCK_SIZE   (2UL<<20)
-#define VPD_SHIFT       16
-#define VPD_SIZE        (1UL<<VPD_SHIFT)
-
-#define KVM_VCPU_BASE   (KVM_VPD_BASE+KVM_VPD_BLOCK_SIZE)
-#define KVM_VCPU_OFS    (KVM_VPD_OFS+KVM_VPD_BLOCK_SIZE)
-#define KVM_VCPU_BLOCK_SIZE   (2UL<<20)
-#define VCPU_SHIFT 18
-#define VCPU_SIZE (1UL<<VCPU_SHIFT)
-#define MAX_VCPU_NUM KVM_VCPU_BLOCK_SIZE/VCPU_SIZE
-
-#define KVM_VM_BASE     (KVM_VCPU_BASE+KVM_VCPU_BLOCK_SIZE)
-#define KVM_VM_OFS      (KVM_VCPU_OFS+KVM_VCPU_BLOCK_SIZE)
-#define KVM_VM_BLOCK_SIZE     (1UL<<19)
-
-#define KVM_MEM_DIRTY_LOG_BASE (KVM_VM_BASE+KVM_VM_BLOCK_SIZE)
-#define KVM_MEM_DIRTY_LOG_OFS  (KVM_VM_OFS+KVM_VM_BLOCK_SIZE)
-#define KVM_MEM_DIRTY_LOG_SIZE (1UL<<19)
-
-/* Get vpd, vhpt, tlb, vcpu, base*/
-#define VPD_ADDR(n) (KVM_VPD_BASE+n*VPD_SIZE)
-#define VHPT_ADDR(n) (KVM_VHPT_BASE+n*VHPT_SIZE)
-#define VTLB_ADDR(n) (KVM_VTLB_BASE+n*VTLB_SIZE)
-#define VCPU_ADDR(n) (KVM_VCPU_BASE+n*VCPU_SIZE)
+#define KVM_VM_BUFFER_SIZE (__IA64_UL_CONST(8)<<20)
+
+/*
+ * kvm guest's data area looks as follow:
+ *
+ *            +----------------------+  ------- KVM_VM_DATA_SIZE
+ *            |     vcpu[n]'s data   |   |     ___________________KVM_STK_OFFSET
+ *            |                      |   |    /                   |
+ *            |        ..........    |   |   /vcpu's struct&stack |
+ *            |        ..........    |   |  /---------------------|---- 0
+ *            |     vcpu[5]'s data   |   | /       vpd            |
+ *            |     vcpu[4]'s data   |   |/-----------------------|
+ *            |     vcpu[3]'s data   |   /         vtlb           |
+ *            |     vcpu[2]'s data   |  /|------------------------|
+ *            |     vcpu[1]'s data   |/  |         vhpt           |
+ *            |     vcpu[0]'s data   |____________________________|
+ *            +----------------------+   |
+ *            |    memory dirty log  |   |
+ *            +----------------------+   |
+ *            |    vm's data struct  |   |
+ *            +----------------------+   |
+ *            |                      |   |
+ *            |                      |   |
+ *            |                      |   |
+ *            |                      |   |
+ *            |                      |   |
+ *            |                      |   |
+ *            |                      |   |
+ *            |   vm's p2m table  |      |
+ *            |                      |   |
+ *            |                      |   |
+ *            |                      |   |  |
+ * vm's data->|                      |   |  |
+ *            +----------------------+ ------- 0
+ * To support large memory, needs to increase the size of p2m.
+ * To support more vcpus, needs to ensure it has enough space to
+ * hold vcpus' data.
+ */
+
+#define KVM_VM_DATA_SHIFT       26
+#define KVM_VM_DATA_SIZE        (__IA64_UL_CONST(1) << KVM_VM_DATA_SHIFT)
+#define KVM_VM_DATA_BASE        (KVM_VMM_BASE + KVM_VM_DATA_SIZE)
+
+#define KVM_P2M_BASE            KVM_VM_DATA_BASE
+#define KVM_P2M_SIZE            (__IA64_UL_CONST(24) << 20)
+
+#define VHPT_SHIFT              16
+#define VHPT_SIZE               (__IA64_UL_CONST(1) << VHPT_SHIFT)
+#define VHPT_NUM_ENTRIES        (__IA64_UL_CONST(1) << (VHPT_SHIFT-5))
+
+#define VTLB_SHIFT              16
+#define VTLB_SIZE               (__IA64_UL_CONST(1) << VTLB_SHIFT)
+#define VTLB_NUM_ENTRIES        (1UL << (VHPT_SHIFT-5))
+
+#define VPD_SHIFT               16
+#define VPD_SIZE                (__IA64_UL_CONST(1) << VPD_SHIFT)
+
+#define VCPU_STRUCT_SHIFT       16
+#define VCPU_STRUCT_SIZE        (__IA64_UL_CONST(1) << VCPU_STRUCT_SHIFT)
+
+#define KVM_STK_OFFSET          VCPU_STRUCT_SIZE
+
+#define KVM_VM_STRUCT_SHIFT     19
+#define KVM_VM_STRUCT_SIZE      (__IA64_UL_CONST(1) << KVM_VM_STRUCT_SHIFT)
+
+#define KVM_MEM_DIRY_LOG_SHIFT  19
+#define KVM_MEM_DIRTY_LOG_SIZE (__IA64_UL_CONST(1) << KVM_MEM_DIRY_LOG_SHIFT)
+
+#ifndef __ASSEMBLY__
+
+/*Define the max vcpus and memory for Guests.*/
+#define KVM_MAX_VCPUS   (KVM_VM_DATA_SIZE - KVM_P2M_SIZE - KVM_VM_STRUCT_SIZE -\
+                        KVM_MEM_DIRTY_LOG_SIZE) / sizeof(struct kvm_vcpu_data)
+#define KVM_MAX_MEM_SIZE (KVM_P2M_SIZE >> 3 << PAGE_SHIFT)
+
+#define VMM_LOG_LEN 256
+
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/kvm.h>
+#include <linux/kvm_para.h>
+#include <linux/kvm_types.h>
+
+#include <asm/pal.h>
+#include <asm/sal.h>
+#include <asm/page.h>
+
+struct kvm_vcpu_data {
+        char vcpu_vhpt[VHPT_SIZE];
+        char vcpu_vtlb[VTLB_SIZE];
+        char vcpu_vpd[VPD_SIZE];
+        char vcpu_struct[VCPU_STRUCT_SIZE];
+};
+
+struct kvm_vm_data {
+        char kvm_p2m[KVM_P2M_SIZE];
+        char kvm_vm_struct[KVM_VM_STRUCT_SIZE];
+        char kvm_mem_dirty_log[KVM_MEM_DIRTY_LOG_SIZE];
+        struct kvm_vcpu_data vcpu_data[KVM_MAX_VCPUS];
+};
+
+#define VCPU_BASE(n)    KVM_VM_DATA_BASE + \
+                                offsetof(struct kvm_vm_data, vcpu_data[n])
+#define VM_BASE         KVM_VM_DATA_BASE + \
+                                offsetof(struct kvm_vm_data, kvm_vm_struct)
+#define KVM_MEM_DIRTY_LOG_BASE  KVM_VM_DATA_BASE + \
+                                offsetof(struct kvm_vm_data, kvm_mem_dirty_log)
+
+#define VHPT_BASE(n) (VCPU_BASE(n) + offsetof(struct kvm_vcpu_data, vcpu_vhpt))
+#define VTLB_BASE(n) (VCPU_BASE(n) + offsetof(struct kvm_vcpu_data, vcpu_vtlb))
+#define VPD_BASE(n)  (VCPU_BASE(n) + offsetof(struct kvm_vcpu_data, vcpu_vpd))
+#define VCPU_STRUCT_BASE(n)     (VCPU_BASE(n) + \
+                                offsetof(struct kvm_vcpu_data, vcpu_struct))
 
 /*IO section definitions*/
 #define IOREQ_READ      1
@@ -389,6 +440,7 @@ struct kvm_vcpu_arch {
 
         unsigned long opcode;
         unsigned long cause;
+        char log_buf[VMM_LOG_LEN];
         union context host;
         union context guest;
 };
@@ -403,20 +455,19 @@ struct kvm_sal_data {
 };
 
 struct kvm_arch {
+        spinlock_t dirty_log_lock;
+
         unsigned long   vm_base;
         unsigned long   metaphysical_rr0;
         unsigned long   metaphysical_rr4;
         unsigned long   vmm_init_rr;
-        unsigned long   vhpt_base;
-        unsigned long   vtlb_base;
-        unsigned long   vpd_base;
-        spinlock_t dirty_log_lock;
+
         struct kvm_ioapic *vioapic;
         struct kvm_vm_stat stat;
         struct kvm_sal_data rdv_sal_data;
 
         struct list_head assigned_dev_head;
-        struct dmar_domain *intel_iommu_domain;
+        struct iommu_domain *iommu_domain;
         struct hlist_head irq_ack_notifier_list;
 
         unsigned long irq_sources_bitmap;
@@ -512,7 +563,7 @@ struct kvm_pt_regs {
 
 static inline struct kvm_pt_regs *vcpu_regs(struct kvm_vcpu *v)
 {
-        return (struct kvm_pt_regs *) ((unsigned long) v + IA64_STK_OFFSET) - 1;
+        return (struct kvm_pt_regs *) ((unsigned long) v + KVM_STK_OFFSET) - 1;
 }
 
 typedef int kvm_vmm_entry(void);
@@ -531,5 +582,6 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run);
 void kvm_sal_emul(struct kvm_vcpu *vcpu);
 
 static inline void kvm_inject_nmi(struct kvm_vcpu *vcpu) {}
+#endif /* __ASSEMBLY__*/
 
 #endif
diff --git a/arch/ia64/include/asm/smp.h b/arch/ia64/include/asm/smp.h
index 12d96e0cd513..21c402365d0e 100644
--- a/arch/ia64/include/asm/smp.h
+++ b/arch/ia64/include/asm/smp.h
@@ -57,7 +57,6 @@ extern struct smp_boot_data {
 
 extern char no_int_routing __devinitdata;
 
-extern cpumask_t cpu_online_map;
 extern cpumask_t cpu_core_map[NR_CPUS];
 DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
 extern int smp_num_siblings;
diff --git a/arch/ia64/include/asm/swiotlb.h b/arch/ia64/include/asm/swiotlb.h
index fb79423834d0..dcbaea7ce128 100644
--- a/arch/ia64/include/asm/swiotlb.h
+++ b/arch/ia64/include/asm/swiotlb.h
@@ -2,44 +2,7 @@
 #define ASM_IA64__SWIOTLB_H
 
 #include <linux/dma-mapping.h>
-
-/* SWIOTLB interface */
-
-extern dma_addr_t swiotlb_map_single(struct device *hwdev, void *ptr,
-                                     size_t size, int dir);
-extern void *swiotlb_alloc_coherent(struct device *hwdev, size_t size,
-                                    dma_addr_t *dma_handle, gfp_t flags);
-extern void swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr,
-                                 size_t size, int dir);
-extern void swiotlb_sync_single_for_cpu(struct device *hwdev,
-                                        dma_addr_t dev_addr,
-                                        size_t size, int dir);
-extern void swiotlb_sync_single_for_device(struct device *hwdev,
-                                           dma_addr_t dev_addr,
-                                           size_t size, int dir);
-extern void swiotlb_sync_single_range_for_cpu(struct device *hwdev,
-                                              dma_addr_t dev_addr,
-                                              unsigned long offset,
-                                              size_t size, int dir);
-extern void swiotlb_sync_single_range_for_device(struct device *hwdev,
-                                                 dma_addr_t dev_addr,
-                                                 unsigned long offset,
-                                                 size_t size, int dir);
-extern void swiotlb_sync_sg_for_cpu(struct device *hwdev,
-                                    struct scatterlist *sg, int nelems,
-                                    int dir);
-extern void swiotlb_sync_sg_for_device(struct device *hwdev,
-                                       struct scatterlist *sg, int nelems,
-                                       int dir);
-extern int swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg,
-                          int nents, int direction);
-extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg,
-                             int nents, int direction);
-extern int swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr);
-extern void swiotlb_free_coherent(struct device *hwdev, size_t size,
-                                  void *vaddr, dma_addr_t dma_handle);
-extern int swiotlb_dma_supported(struct device *hwdev, u64 mask);
-extern void swiotlb_init(void);
+#include <linux/swiotlb.h>
 
 extern int swiotlb_force;
 
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h
index 35bcb641c9e5..76a33a91ca69 100644
--- a/arch/ia64/include/asm/topology.h
+++ b/arch/ia64/include/asm/topology.h
@@ -34,6 +34,7 @@
  * Returns a bitmask of CPUs on Node 'node'.
  */
 #define node_to_cpumask(node) (node_to_cpu_mask[node])
+#define cpumask_of_node(node) (&node_to_cpu_mask[node])
 
 /*
  * Returns the number of the node containing Node 'nid'.
@@ -45,7 +46,7 @@
 /*
  * Returns the number of the first CPU on Node 'node'.
  */
-#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node)))
+#define node_to_first_cpu(node) (cpumask_first(cpumask_of_node(node)))
 
 /*
  * Determines the node for a given pci bus
@@ -55,7 +56,6 @@
 void build_cpu_to_node_map(void);
 
 #define SD_CPU_INIT (struct sched_domain) {             \
-        .span                   = CPU_MASK_NONE,        \
         .parent                 = NULL,                 \
         .child                  = NULL,                 \
         .groups                 = NULL,                 \
@@ -80,7 +80,6 @@ void build_cpu_to_node_map(void);
 
 /* sched_domains SD_NODE_INIT for IA64 NUMA machines */
 #define SD_NODE_INIT (struct sched_domain) {            \
-        .span                   = CPU_MASK_NONE,        \
         .parent                 = NULL,                 \
         .child                  = NULL,                 \
         .groups                 = NULL,                 \
@@ -111,6 +110,8 @@ void build_cpu_to_node_map(void);
 #define topology_core_id(cpu)                   (cpu_data(cpu)->core_id)
 #define topology_core_siblings(cpu)             (cpu_core_map[cpu])
 #define topology_thread_siblings(cpu)           (per_cpu(cpu_sibling_map, cpu))
+#define topology_core_cpumask(cpu)              (&cpu_core_map[cpu])
+#define topology_thread_cpumask(cpu)            (&per_cpu(cpu_sibling_map, cpu))
 #define smt_capable()                           (smp_num_siblings > 1)
 #endif
 
@@ -121,6 +122,10 @@ extern void arch_fix_phys_package_id(int num, u32 slot);
                                         node_to_cpumask(pcibus_to_node(bus)) \
                                 )
 
+#define cpumask_of_pcibus(bus)  (pcibus_to_node(bus) == -1 ?            \
+                                 cpu_all_mask :                         \
+                                 cpumask_from_node(pcibus_to_node(bus)))
+
 #include <asm-generic/topology.h>
 
 #endif /* _ASM_IA64_TOPOLOGY_H */
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index bd7acc71e8a9..0553648b7595 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -202,7 +202,6 @@ char *__init __acpi_map_table(unsigned long phys_addr, unsigned long size)
                             Boot-time Table Parsing
    -------------------------------------------------------------------------- */
 
-static int total_cpus __initdata;
 static int available_cpus __initdata;
 struct acpi_table_madt *acpi_madt __initdata;
 static u8 has_8259;
@@ -1001,7 +1000,7 @@ acpi_map_iosapic(acpi_handle handle, u32 depth, void *context, void **ret)
         node = pxm_to_node(pxm);
 
         if (node >= MAX_NUMNODES || !node_online(node) ||
-            cpus_empty(node_to_cpumask(node)))
+            cpumask_empty(cpumask_of_node(node)))
                 return AE_OK;
 
         /* We know a gsi to node mapping! */
diff --git a/arch/ia64/kernel/init_task.c b/arch/ia64/kernel/init_task.c
index 9d7e1c66faf4..5b0e830c6f33 100644
--- a/arch/ia64/kernel/init_task.c
+++ b/arch/ia64/kernel/init_task.c
@@ -17,7 +17,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index 5c4674ae8aea..5cfd3d91001a 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -330,25 +330,25 @@ unmask_irq (unsigned int irq)
 
 
 static void
-iosapic_set_affinity (unsigned int irq, cpumask_t mask)
+iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
 {
 #ifdef CONFIG_SMP
         u32 high32, low32;
-        int dest, rte_index;
+        int cpu, dest, rte_index;
         int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0;
         struct iosapic_rte_info *rte;
         struct iosapic *iosapic;
 
         irq &= (~IA64_IRQ_REDIRECTED);
 
-        cpus_and(mask, mask, cpu_online_map);
-        if (cpus_empty(mask))
+        cpu = cpumask_first_and(cpu_online_mask, mask);
+        if (cpu >= nr_cpu_ids)
                 return;
 
-        if (irq_prepare_move(irq, first_cpu(mask)))
+        if (irq_prepare_move(irq, cpu))
                 return;
 
-        dest = cpu_physical_id(first_cpu(mask));
+        dest = cpu_physical_id(cpu);
 
         if (!iosapic_intr_info[irq].count)
                 return;                 /* not an IOSAPIC interrupt */
@@ -695,32 +695,31 @@ get_target_cpu (unsigned int gsi, int irq)
 #ifdef CONFIG_NUMA
         {
                 int num_cpus, cpu_index, iosapic_index, numa_cpu, i = 0;
-                cpumask_t cpu_mask;
+                const struct cpumask *cpu_mask;
 
                 iosapic_index = find_iosapic(gsi);
                 if (iosapic_index < 0 ||
                     iosapic_lists[iosapic_index].node == MAX_NUMNODES)
                         goto skip_numa_setup;
 
-                cpu_mask = node_to_cpumask(iosapic_lists[iosapic_index].node);
-                cpus_and(cpu_mask, cpu_mask, domain);
-                for_each_cpu_mask(numa_cpu, cpu_mask) {
-                        if (!cpu_online(numa_cpu))
-                                cpu_clear(numa_cpu, cpu_mask);
+                cpu_mask = cpumask_of_node(iosapic_lists[iosapic_index].node);
+                num_cpus = 0;
+                for_each_cpu_and(numa_cpu, cpu_mask, &domain) {
+                        if (cpu_online(numa_cpu))
+                                num_cpus++;
                 }
 
-                num_cpus = cpus_weight(cpu_mask);
-
                 if (!num_cpus)
                         goto skip_numa_setup;
 
                 /* Use irq assignment to distribute across cpus in node */
                 cpu_index = irq % num_cpus;
 
-                for (numa_cpu = first_cpu(cpu_mask) ; i < cpu_index ; i++)
-                        numa_cpu = next_cpu(numa_cpu, cpu_mask);
+                for_each_cpu_and(numa_cpu, cpu_mask, &domain)
+                        if (cpu_online(numa_cpu) && i++ >= cpu_index)
+                                break;
 
-                if (numa_cpu != NR_CPUS)
+                if (numa_cpu < nr_cpu_ids)
                         return cpu_physical_id(numa_cpu);
         }
 skip_numa_setup:
@@ -731,7 +730,7 @@ skip_numa_setup:
          * case of NUMA.)
          */
         do {
-                if (++cpu >= NR_CPUS)
+                if (++cpu >= nr_cpu_ids)
                         cpu = 0;
         } while (!cpu_online(cpu) || !cpu_isset(cpu, domain));
 
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index 7fd18f54c056..95ff16cb05d8 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -112,11 +112,11 @@ void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
         }
 }
 
-bool is_affinity_mask_valid(cpumask_t cpumask)
+bool is_affinity_mask_valid(cpumask_var_t cpumask)
 {
         if (ia64_platform_is("sn2")) {
                 /* Only allow one CPU to be specified in the smp_affinity mask */
-                if (cpus_weight(cpumask) != 1)
+                if (cpumask_weight(cpumask) != 1)
                         return false;
         }
         return true;
@@ -133,7 +133,6 @@ unsigned int vectors_in_migration[NR_IRQS];
  */
 static void migrate_irqs(void)
 {
-        cpumask_t       mask;
         irq_desc_t *desc;
         int             irq, new_cpu;
 
@@ -152,15 +151,14 @@ static void migrate_irqs(void)
                 if (desc->status == IRQ_PER_CPU)
                         continue;
 
-                cpus_and(mask, irq_desc[irq].affinity, cpu_online_map);
-                if (any_online_cpu(mask) == NR_CPUS) {
+                if (cpumask_any_and(&irq_desc[irq].affinity, cpu_online_mask)
+                    >= nr_cpu_ids) {
                         /*
                          * Save it for phase 2 processing
                          */
                         vectors_in_migration[irq] = irq;
 
                         new_cpu = any_online_cpu(cpu_online_map);
-                        mask = cpumask_of_cpu(new_cpu);
 
                         /*
                          * Al three are essential, currently WARN_ON.. maybe panic?
@@ -168,7 +166,8 @@ static void migrate_irqs(void)
                         if (desc->chip && desc->chip->disable &&
                                 desc->chip->enable && desc->chip->set_affinity) {
                                 desc->chip->disable(irq);
-                                desc->chip->set_affinity(irq, mask);
+                                desc->chip->set_affinity(irq,
+                                                         cpumask_of(new_cpu));
                                 desc->chip->enable(irq);
                         } else {
                                 WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
diff --git a/arch/ia64/kernel/kprobes.c b/arch/ia64/kernel/kprobes.c
index f07688da947c..097b84d54e73 100644
--- a/arch/ia64/kernel/kprobes.c
+++ b/arch/ia64/kernel/kprobes.c
@@ -670,9 +670,11 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
 
 void __kprobes arch_remove_kprobe(struct kprobe *p)
 {
-        mutex_lock(&kprobe_mutex);
-        free_insn_slot(p->ainsn.insn, p->ainsn.inst_flag & INST_FLAG_BOOSTABLE);
-        mutex_unlock(&kprobe_mutex);
+        if (p->ainsn.insn) {
+                free_insn_slot(p->ainsn.insn,
+                               p->ainsn.inst_flag & INST_FLAG_BOOSTABLE);
+                p->ainsn.insn = NULL;
+        }
 }
 /*
  * We are resuming execution after a single step fault, so the pt_regs
diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c
index fab1d21a4f2c..f94aaa86933f 100644
--- a/arch/ia64/kernel/mca_drv.c
+++ b/arch/ia64/kernel/mca_drv.c
@@ -158,7 +158,7 @@ mca_handler_bh(unsigned long paddr, void *iip, unsigned long ipsr)
         ia64_mlogbuf_dump();
         printk(KERN_ERR "OS_MCA: process [cpu %d, pid: %d, uid: %d, "
                 "iip: %p, psr: 0x%lx,paddr: 0x%lx](%s) encounters MCA.\n",
-                raw_smp_processor_id(), current->pid, current->uid,
+               raw_smp_processor_id(), current->pid, current_uid(),
                 iip, ipsr, paddr, current->comm);
 
         spin_lock(&mca_bh_lock);
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 702a09c13238..890339339035 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -49,11 +49,12 @@
 static struct irq_chip  ia64_msi_chip;
 
 #ifdef CONFIG_SMP
-static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
+static void ia64_set_msi_irq_affinity(unsigned int irq,
+                                      const cpumask_t *cpu_mask)
 {
         struct msi_msg msg;
         u32 addr, data;
-        int cpu = first_cpu(cpu_mask);
+        int cpu = first_cpu(*cpu_mask);
 
         if (!cpu_online(cpu))
                 return;
@@ -166,12 +167,11 @@ void arch_teardown_msi_irq(unsigned int irq)
 
 #ifdef CONFIG_DMAR
 #ifdef CONFIG_SMP
-static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
+static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
 {
         struct irq_cfg *cfg = irq_cfg + irq;
         struct msi_msg msg;
-        int cpu = first_cpu(mask);
-
+        int cpu = cpumask_first(mask);
 
         if (!cpu_online(cpu))
                 return;
@@ -187,7 +187,7 @@ static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
         msg.address_lo |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));
 
         dmar_msi_write(irq, &msg);
-        irq_desc[irq].affinity = mask;
+        irq_desc[irq].affinity = *mask;
 }
 #endif /* CONFIG_SMP */
 
diff --git a/arch/ia64/kernel/pci-dma.c b/arch/ia64/kernel/pci-dma.c
index 2a92f637431d..d0ada067a4af 100644
--- a/arch/ia64/kernel/pci-dma.c
+++ b/arch/ia64/kernel/pci-dma.c
@@ -39,7 +39,7 @@ int iommu_detected __read_mostly;
    be probably a smaller DMA mask, but this is bug-to-bug compatible
    to i386. */
 struct device fallback_dev = {
-        .bus_id = "fallback device",
+        .init_name = "fallback device",
         .coherent_dma_mask = DMA_32BIT_MASK,
         .dma_mask = &fallback_dev.coherent_dma_mask,
 };
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 6543a5547c84..0e499757309b 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -2220,8 +2220,8 @@ pfm_alloc_file(pfm_context_t *ctx)
         DPRINT(("new inode ino=%ld @%p\n", inode->i_ino, inode));
 
         inode->i_mode = S_IFCHR|S_IRUGO;
-        inode->i_uid  = current->fsuid;
-        inode->i_gid  = current->fsgid;
+        inode->i_uid  = current_fsuid();
+        inode->i_gid  = current_fsgid();
 
         sprintf(name, "[%lu]", inode->i_ino);
         this.name = name;
@@ -2399,22 +2399,33 @@ error_kmem:
 static int
 pfm_bad_permissions(struct task_struct *task)
 {
+        const struct cred *tcred;
+        uid_t uid = current_uid();
+        gid_t gid = current_gid();
+        int ret;
+
+        rcu_read_lock();
+        tcred = __task_cred(task);
+
         /* inspired by ptrace_attach() */
         DPRINT(("cur: uid=%d gid=%d task: euid=%d suid=%d uid=%d egid=%d sgid=%d\n",
-                current->uid,
-                current->gid,
-                task->euid,
-                task->suid,
-                task->uid,
-                task->egid,
-                task->sgid));
-
-        return ((current->uid != task->euid)
-            || (current->uid != task->suid)
-            || (current->uid != task->uid)
-            || (current->gid != task->egid)
-            || (current->gid != task->sgid)
-            || (current->gid != task->gid)) && !capable(CAP_SYS_PTRACE);
+                uid,
+                gid,
+                tcred->euid,
+                tcred->suid,
+                tcred->uid,
+                tcred->egid,
+                tcred->sgid));
+
+        ret = ((uid != tcred->euid)
+               || (uid != tcred->suid)
+               || (uid != tcred->uid)
+               || (gid != tcred->egid)
+               || (gid != tcred->sgid)
+               || (gid != tcred->gid)) && !capable(CAP_SYS_PTRACE);
+
+        rcu_read_unlock();
+        return ret;
 }
 
 static int
diff --git a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c
index e12500a9c443..e1821ca4c7df 100644
--- a/arch/ia64/kernel/signal.c
+++ b/arch/ia64/kernel/signal.c
@@ -229,7 +229,7 @@ ia64_rt_sigreturn (struct sigscratch *scr)
         si.si_errno = 0;
         si.si_code = SI_KERNEL;
         si.si_pid = task_pid_vnr(current);
-        si.si_uid = current->uid;
+        si.si_uid = current_uid();
         si.si_addr = sc;
         force_sig_info(SIGSEGV, &si, current);
         return retval;
@@ -326,7 +326,7 @@ force_sigsegv_info (int sig, void __user *addr)
         si.si_errno = 0;
         si.si_code = SI_KERNEL;
         si.si_pid = task_pid_vnr(current);
-        si.si_uid = current->uid;
+        si.si_uid = current_uid();
         si.si_addr = addr;
         force_sig_info(SIGSEGV, &si, current);
         return 0;
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 1dcbb85fc4ee..11463994a7d5 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -131,12 +131,6 @@ struct task_struct *task_for_booting_cpu;
  */
 DEFINE_PER_CPU(int, cpu_state);
 
-/* Bitmasks of currently online, and possible CPUs */
-cpumask_t cpu_online_map;
-EXPORT_SYMBOL(cpu_online_map);
-cpumask_t cpu_possible_map = CPU_MASK_NONE;
-EXPORT_SYMBOL(cpu_possible_map);
-
 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
 EXPORT_SYMBOL(cpu_core_map);
 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
@@ -688,7 +682,7 @@ int migrate_platform_irqs(unsigned int cpu)
 {
         int new_cpei_cpu;
         irq_desc_t *desc = NULL;
-        cpumask_t       mask;
+        const struct cpumask *mask;
         int             retval = 0;
 
         /*
@@ -701,7 +695,7 @@ int migrate_platform_irqs(unsigned int cpu)
                          * Now re-target the CPEI to a different processor
                          */
                         new_cpei_cpu = any_online_cpu(cpu_online_map);
-                        mask = cpumask_of_cpu(new_cpei_cpu);
+                        mask = cpumask_of(new_cpei_cpu);
                         set_cpei_target_cpu(new_cpei_cpu);
                         desc = irq_desc + ia64_cpe_irq;
                         /*
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 65c10a42c88f..f0ebb342409d 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -93,13 +93,14 @@ void ia64_account_on_switch(struct task_struct *prev, struct task_struct *next)
         now = ia64_get_itc();
 
         delta_stime = cycle_to_cputime(pi->ac_stime + (now - pi->ac_stamp));
-        account_system_time(prev, 0, delta_stime);
-        account_system_time_scaled(prev, delta_stime);
+        if (idle_task(smp_processor_id()) != prev)
+                account_system_time(prev, 0, delta_stime, delta_stime);
+        else
+                account_idle_time(delta_stime);
 
         if (pi->ac_utime) {
                 delta_utime = cycle_to_cputime(pi->ac_utime);
-                account_user_time(prev, delta_utime);
-                account_user_time_scaled(prev, delta_utime);
+                account_user_time(prev, delta_utime, delta_utime);
         }
 
         pi->ac_stamp = ni->ac_stamp = now;
@@ -122,8 +123,10 @@ void account_system_vtime(struct task_struct *tsk)
         now = ia64_get_itc();
 
         delta_stime = cycle_to_cputime(ti->ac_stime + (now - ti->ac_stamp));
-        account_system_time(tsk, 0, delta_stime);
-        account_system_time_scaled(tsk, delta_stime);
+        if (irq_count() || idle_task(smp_processor_id()) != tsk)
+                account_system_time(tsk, 0, delta_stime, delta_stime);
+        else
+                account_idle_time(delta_stime);
         ti->ac_stime = 0;
 
         ti->ac_stamp = now;
@@ -143,8 +146,7 @@ void account_process_tick(struct task_struct *p, int user_tick)
 
         if (ti->ac_utime) {
                 delta_utime = cycle_to_cputime(ti->ac_utime);
-                account_user_time(p, delta_utime);
-                account_user_time_scaled(p, delta_utime);
+                account_user_time(p, delta_utime, delta_utime);
                 ti->ac_utime = 0;
         }
 }
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index c75b914f2d6b..a8d61a3e9a94 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -219,7 +219,7 @@ static ssize_t show_shared_cpu_map(struct cache_info *this_leaf, char *buf)
         cpumask_t shared_cpu_map;
 
         cpus_and(shared_cpu_map, this_leaf->shared_cpu_map, cpu_online_map);
-        len = cpumask_scnprintf(buf, NR_CPUS+1, shared_cpu_map);
+        len = cpumask_scnprintf(buf, NR_CPUS+1, &shared_cpu_map);
         len += sprintf(buf+len, "\n");
         return len;
 }
diff --git a/arch/ia64/kvm/Makefile b/arch/ia64/kvm/Makefile
index 92cef66ca268..0bb99b732908 100644
--- a/arch/ia64/kvm/Makefile
+++ b/arch/ia64/kvm/Makefile
@@ -51,8 +51,8 @@ EXTRA_AFLAGS += -Ivirt/kvm -Iarch/ia64/kvm/
 common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \
                 coalesced_mmio.o irq_comm.o)
 
-ifeq ($(CONFIG_DMAR),y)
-common-objs += $(addprefix ../../../virt/kvm/, vtd.o)
+ifeq ($(CONFIG_IOMMU_API),y)
+common-objs += $(addprefix ../../../virt/kvm/, iommu.o)
 endif
 
 kvm-objs := $(common-objs) kvm-ia64.o kvm_fw.o
@@ -60,7 +60,7 @@ obj-$(CONFIG_KVM) += kvm.o
 
 CFLAGS_vcpu.o += -mfixed-range=f2-f5,f12-f127
 kvm-intel-objs = vmm.o vmm_ivt.o trampoline.o vcpu.o optvfault.o mmio.o \
-        vtlb.o process.o
+        vtlb.o process.o kvm_lib.o
 #Add link memcpy and memset to avoid possible structure assignment error
 kvm-intel-objs += memcpy.o memset.o
 obj-$(CONFIG_KVM_INTEL) += kvm-intel.o
diff --git a/arch/ia64/kvm/asm-offsets.c b/arch/ia64/kvm/asm-offsets.c
index 4e3dc13a619c..0c3564a7a033 100644
--- a/arch/ia64/kvm/asm-offsets.c
+++ b/arch/ia64/kvm/asm-offsets.c
@@ -24,19 +24,10 @@
 
 #include <linux/autoconf.h>
 #include <linux/kvm_host.h>
+#include <linux/kbuild.h>
 
 #include "vcpu.h"
 
-#define task_struct kvm_vcpu
-
-#define DEFINE(sym, val) \
-        asm volatile("\n->" #sym " (%0) " #val : : "i" (val))
-
-#define BLANK() asm volatile("\n->" : :)
-
-#define OFFSET(_sym, _str, _mem) \
-    DEFINE(_sym, offsetof(_str, _mem));
-
 void foo(void)
 {
         DEFINE(VMM_TASK_SIZE, sizeof(struct kvm_vcpu));
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index af1464f7a6ad..4e586f6110aa 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -31,6 +31,7 @@
 #include <linux/bitops.h>
 #include <linux/hrtimer.h>
 #include <linux/uaccess.h>
+#include <linux/iommu.h>
 #include <linux/intel-iommu.h>
 
 #include <asm/pgtable.h>
@@ -180,7 +181,6 @@ int kvm_dev_ioctl_check_extension(long ext)
 
         switch (ext) {
         case KVM_CAP_IRQCHIP:
-        case KVM_CAP_USER_MEMORY:
         case KVM_CAP_MP_STATE:
 
                 r = 1;
@@ -189,7 +189,7 @@ int kvm_dev_ioctl_check_extension(long ext)
                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
                 break;
         case KVM_CAP_IOMMU:
-                r = intel_iommu_found();
+                r = iommu_found();
                 break;
         default:
                 r = 0;
@@ -439,7 +439,6 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu)
                 expires = div64_u64(itc_diff, cyc_per_usec);
                 kt = ktime_set(0, 1000 * expires);
 
-                down_read(&vcpu->kvm->slots_lock);
                 vcpu->arch.ht_active = 1;
                 hrtimer_start(p_ht, kt, HRTIMER_MODE_ABS);
 
@@ -452,7 +451,6 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu)
                         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
                                 vcpu->arch.mp_state =
                                         KVM_MP_STATE_RUNNABLE;
-                up_read(&vcpu->kvm->slots_lock);
 
                 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
                         return -EINTR;
@@ -476,6 +474,13 @@ static int handle_external_interrupt(struct kvm_vcpu *vcpu,
         return 1;
 }
 
+static int handle_vcpu_debug(struct kvm_vcpu *vcpu,
+                                struct kvm_run *kvm_run)
+{
+        printk("VMM: %s", vcpu->arch.log_buf);
+        return 1;
+}
+
 static int (*kvm_vti_exit_handlers[])(struct kvm_vcpu *vcpu,
                 struct kvm_run *kvm_run) = {
         [EXIT_REASON_VM_PANIC]              = handle_vm_error,
@@ -487,6 +492,7 @@ static int (*kvm_vti_exit_handlers[])(struct kvm_vcpu *vcpu,
         [EXIT_REASON_EXTERNAL_INTERRUPT]    = handle_external_interrupt,
         [EXIT_REASON_IPI]                   = handle_ipi,
         [EXIT_REASON_PTC_G]                 = handle_global_purge,
+        [EXIT_REASON_DEBUG]                 = handle_vcpu_debug,
 
 };
 
@@ -698,27 +704,24 @@ out:
         return r;
 }
 
-/*
- * Allocate 16M memory for every vm to hold its specific data.
- * Its memory map is defined in kvm_host.h.
- */
 static struct kvm *kvm_alloc_kvm(void)
 {
 
         struct kvm *kvm;
         uint64_t  vm_base;
 
+        BUG_ON(sizeof(struct kvm) > KVM_VM_STRUCT_SIZE);
+
         vm_base = __get_free_pages(GFP_KERNEL, get_order(KVM_VM_DATA_SIZE));
 
         if (!vm_base)
                 return ERR_PTR(-ENOMEM);
-        printk(KERN_DEBUG"kvm: VM data's base Address:0x%lx\n", vm_base);
 
-        /* Zero all pages before use! */
         memset((void *)vm_base, 0, KVM_VM_DATA_SIZE);
-
-        kvm = (struct kvm *)(vm_base + KVM_VM_OFS);
+        kvm = (struct kvm *)(vm_base +
+                        offsetof(struct kvm_vm_data, kvm_vm_struct));
         kvm->arch.vm_base = vm_base;
+        printk(KERN_DEBUG"kvm: vm's data area:0x%lx\n", vm_base);
 
         return kvm;
 }
@@ -760,21 +763,12 @@ static void kvm_build_io_pmt(struct kvm *kvm)
 
 static void kvm_init_vm(struct kvm *kvm)
 {
-        long vm_base;
-
         BUG_ON(!kvm);
 
         kvm->arch.metaphysical_rr0 = GUEST_PHYSICAL_RR0;
         kvm->arch.metaphysical_rr4 = GUEST_PHYSICAL_RR4;
         kvm->arch.vmm_init_rr = VMM_INIT_RR;
 
-        vm_base = kvm->arch.vm_base;
-        if (vm_base) {
-                kvm->arch.vhpt_base = vm_base + KVM_VHPT_OFS;
-                kvm->arch.vtlb_base = vm_base + KVM_VTLB_OFS;
-                kvm->arch.vpd_base  = vm_base + KVM_VPD_OFS;
-        }
-
         /*
          *Fill P2M entries for MMIO/IO ranges
          */
@@ -838,9 +832,8 @@ static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
 
 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
 {
-        int i;
         struct vpd *vpd = to_host(vcpu->kvm, vcpu->arch.vpd);
-        int r;
+        int i;
 
         vcpu_load(vcpu);
 
@@ -857,18 +850,7 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
 
         vpd->vpr = regs->vpd.vpr;
 
-        r = -EFAULT;
-        r = copy_from_user(&vcpu->arch.guest, regs->saved_guest,
-                                                sizeof(union context));
-        if (r)
-                goto out;
-        r = copy_from_user(vcpu + 1, regs->saved_stack +
-                        sizeof(struct kvm_vcpu),
-                        IA64_STK_OFFSET - sizeof(struct kvm_vcpu));
-        if (r)
-                goto out;
-        vcpu->arch.exit_data =
-                ((struct kvm_vcpu *)(regs->saved_stack))->arch.exit_data;
+        memcpy(&vcpu->arch.guest, &regs->saved_guest, sizeof(union context));
 
         RESTORE_REGS(mp_state);
         RESTORE_REGS(vmm_rr);
@@ -902,9 +884,8 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         set_bit(KVM_REQ_RESUME, &vcpu->requests);
 
         vcpu_put(vcpu);
-        r = 0;
-out:
-        return r;
+
+        return 0;
 }
 
 long kvm_arch_vm_ioctl(struct file *filp,
@@ -1166,10 +1147,11 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
                 /*Set entry address for first run.*/
                 regs->cr_iip = PALE_RESET_ENTRY;
 
-                /*Initilize itc offset for vcpus*/
+                /*Initialize itc offset for vcpus*/
                 itc_offset = 0UL - ia64_getreg(_IA64_REG_AR_ITC);
-                for (i = 0; i < MAX_VCPU_NUM; i++) {
-                        v = (struct kvm_vcpu *)((char *)vcpu + VCPU_SIZE * i);
+                for (i = 0; i < KVM_MAX_VCPUS; i++) {
+                        v = (struct kvm_vcpu *)((char *)vcpu +
+                                        sizeof(struct kvm_vcpu_data) * i);
                         v->arch.itc_offset = itc_offset;
                         v->arch.last_itc = 0;
                 }
@@ -1183,7 +1165,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
         vcpu->arch.apic->vcpu = vcpu;
 
         p_ctx->gr[1] = 0;
-        p_ctx->gr[12] = (unsigned long)((char *)vmm_vcpu + IA64_STK_OFFSET);
+        p_ctx->gr[12] = (unsigned long)((char *)vmm_vcpu + KVM_STK_OFFSET);
         p_ctx->gr[13] = (unsigned long)vmm_vcpu;
         p_ctx->psr = 0x1008522000UL;
         p_ctx->ar[40] = FPSR_DEFAULT; /*fpsr*/
@@ -1218,12 +1200,12 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
         vcpu->arch.hlt_timer.function = hlt_timer_fn;
 
         vcpu->arch.last_run_cpu = -1;
-        vcpu->arch.vpd = (struct vpd *)VPD_ADDR(vcpu->vcpu_id);
+        vcpu->arch.vpd = (struct vpd *)VPD_BASE(vcpu->vcpu_id);
         vcpu->arch.vsa_base = kvm_vsa_base;
         vcpu->arch.__gp = kvm_vmm_gp;
         vcpu->arch.dirty_log_lock_pa = __pa(&kvm->arch.dirty_log_lock);
-        vcpu->arch.vhpt.hash = (struct thash_data *)VHPT_ADDR(vcpu->vcpu_id);
-        vcpu->arch.vtlb.hash = (struct thash_data *)VTLB_ADDR(vcpu->vcpu_id);
+        vcpu->arch.vhpt.hash = (struct thash_data *)VHPT_BASE(vcpu->vcpu_id);
+        vcpu->arch.vtlb.hash = (struct thash_data *)VTLB_BASE(vcpu->vcpu_id);
         init_ptce_info(vcpu);
 
         r = 0;
@@ -1273,12 +1255,22 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
         int r;
         int cpu;
 
+        BUG_ON(sizeof(struct kvm_vcpu) > VCPU_STRUCT_SIZE/2);
+
+        r = -EINVAL;
+        if (id >= KVM_MAX_VCPUS) {
+                printk(KERN_ERR"kvm: Can't configure vcpus > %ld",
+                                KVM_MAX_VCPUS);
+                goto fail;
+        }
+
         r = -ENOMEM;
         if (!vm_base) {
                 printk(KERN_ERR"kvm: Create vcpu[%d] error!\n", id);
                 goto fail;
         }
-        vcpu = (struct kvm_vcpu *)(vm_base + KVM_VCPU_OFS + VCPU_SIZE * id);
+        vcpu = (struct kvm_vcpu *)(vm_base + offsetof(struct kvm_vm_data,
+                                        vcpu_data[id].vcpu_struct));
         vcpu->kvm = kvm;
 
         cpu = get_cpu();
@@ -1374,9 +1366,9 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 
 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
 {
-        int i;
-        int r;
         struct vpd *vpd = to_host(vcpu->kvm, vcpu->arch.vpd);
+        int i;
+
         vcpu_load(vcpu);
 
         for (i = 0; i < 16; i++) {
@@ -1391,14 +1383,8 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         regs->vpd.vpsr = vpd->vpsr;
         regs->vpd.vpr = vpd->vpr;
 
-        r = -EFAULT;
-        r = copy_to_user(regs->saved_guest, &vcpu->arch.guest,
-                                        sizeof(union context));
-        if (r)
-                goto out;
-        r = copy_to_user(regs->saved_stack, (void *)vcpu, IA64_STK_OFFSET);
-        if (r)
-                goto out;
+        memcpy(&regs->saved_guest, &vcpu->arch.guest, sizeof(union context));
+
         SAVE_REGS(mp_state);
         SAVE_REGS(vmm_rr);
         memcpy(regs->itrs, vcpu->arch.itrs, sizeof(struct thash_data) * NITRS);
@@ -1426,10 +1412,9 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         SAVE_REGS(metaphysical_saved_rr4);
         SAVE_REGS(fp_psr);
         SAVE_REGS(saved_gp);
+
         vcpu_put(vcpu);
-        r = 0;
-out:
-        return r;
+        return 0;
 }
 
 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
@@ -1457,6 +1442,9 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
         unsigned long base_gfn = memslot->base_gfn;
 
+        if (base_gfn + npages > (KVM_MAX_MEM_SIZE >> PAGE_SHIFT))
+                return -ENOMEM;
+
         for (i = 0; i < npages; i++) {
                 pfn = gfn_to_pfn(kvm, base_gfn + i);
                 if (!kvm_is_mmio_pfn(pfn)) {
@@ -1631,8 +1619,8 @@ static int kvm_ia64_sync_dirty_log(struct kvm *kvm,
         struct kvm_memory_slot *memslot;
         int r, i;
         long n, base;
-        unsigned long *dirty_bitmap = (unsigned long *)((void *)kvm - KVM_VM_OFS
-                                        + KVM_MEM_DIRTY_LOG_OFS);
+        unsigned long *dirty_bitmap = (unsigned long *)(kvm->arch.vm_base +
+                        offsetof(struct kvm_vm_data, kvm_mem_dirty_log));
 
         r = -EINVAL;
         if (log->slot >= KVM_MEMORY_SLOTS)
diff --git a/arch/ia64/kvm/kvm_lib.c b/arch/ia64/kvm/kvm_lib.c
new file mode 100644
index 000000000000..a85cb611ecd7
--- /dev/null
+++ b/arch/ia64/kvm/kvm_lib.c
@@ -0,0 +1,15 @@
+/*
+ * kvm_lib.c: Compile some libraries for kvm-intel module.
+ *
+ *      Just include kernel's library, and disable symbols export.
+ *      Copyright (C) 2008, Intel Corporation.
+ *      Xiantao Zhang  (xiantao.zhang@intel.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#undef CONFIG_MODULES
+#include "../../../lib/vsprintf.c"
+#include "../../../lib/ctype.c"
diff --git a/arch/ia64/kvm/kvm_minstate.h b/arch/ia64/kvm/kvm_minstate.h
index 2cc41d17cf99..b2bcaa2787aa 100644
--- a/arch/ia64/kvm/kvm_minstate.h
+++ b/arch/ia64/kvm/kvm_minstate.h
@@ -24,6 +24,8 @@
 #include <asm/asmmacro.h>
 #include <asm/types.h>
 #include <asm/kregs.h>
+#include <asm/kvm_host.h>
+
 #include "asm-offsets.h"
 
 #define KVM_MINSTATE_START_SAVE_MIN                                             \
@@ -33,7 +35,7 @@
         addl r22 = VMM_RBS_OFFSET,r1;            /* compute base of RBS */      \
         ;;                                                                      \
         lfetch.fault.excl.nt1 [r22];                                            \
-        addl r1 = IA64_STK_OFFSET-VMM_PT_REGS_SIZE,r1;  /* compute base of memory stack */  \
+        addl r1 = KVM_STK_OFFSET-VMM_PT_REGS_SIZE, r1;  \
         mov r23 = ar.bspstore;                  /* save ar.bspstore */          \
         ;;                                                                      \
         mov ar.bspstore = r22;                          /* switch to kernel RBS */\
diff --git a/arch/ia64/kvm/misc.h b/arch/ia64/kvm/misc.h
index e585c4607344..dd979e00b574 100644
--- a/arch/ia64/kvm/misc.h
+++ b/arch/ia64/kvm/misc.h
@@ -27,7 +27,8 @@
  */
 static inline uint64_t *kvm_host_get_pmt(struct kvm *kvm)
 {
-        return (uint64_t *)(kvm->arch.vm_base + KVM_P2M_OFS);
+        return (uint64_t *)(kvm->arch.vm_base +
+                                offsetof(struct kvm_vm_data, kvm_p2m));
 }
 
 static inline void kvm_set_pmt_entry(struct kvm *kvm, gfn_t gfn,
diff --git a/arch/ia64/kvm/mmio.c b/arch/ia64/kvm/mmio.c
index 7f1a858bc69f..21f63fffc379 100644
--- a/arch/ia64/kvm/mmio.c
+++ b/arch/ia64/kvm/mmio.c
@@ -66,31 +66,25 @@ void lsapic_write(struct kvm_vcpu *v, unsigned long addr,
 
         switch (addr) {
         case PIB_OFST_INTA:
-                /*panic_domain(NULL, "Undefined write on PIB INTA\n");*/
-                panic_vm(v);
+                panic_vm(v, "Undefined write on PIB INTA\n");
                 break;
         case PIB_OFST_XTP:
                 if (length == 1) {
                         vlsapic_write_xtp(v, val);
                 } else {
-                        /*panic_domain(NULL,
-                        "Undefined write on PIB XTP\n");*/
-                        panic_vm(v);
+                        panic_vm(v, "Undefined write on PIB XTP\n");
                 }
                 break;
         default:
                 if (PIB_LOW_HALF(addr)) {
-                        /*lower half */
+                        /*Lower half */
                         if (length != 8)
-                                /*panic_domain(NULL,
-                                "Can't LHF write with size %ld!\n",
-                                length);*/
-                                panic_vm(v);
+                                panic_vm(v, "Can't LHF write with size %ld!\n",
+                                                length);
                         else
                                 vlsapic_write_ipi(v, addr, val);
-                } else {   /*   upper half
-                                printk("IPI-UHF write %lx\n",addr);*/
-                        panic_vm(v);
+                } else {   /*Upper half */
+                        panic_vm(v, "IPI-UHF write %lx\n", addr);
                 }
                 break;
         }
@@ -108,22 +102,18 @@ unsigned long lsapic_read(struct kvm_vcpu *v, unsigned long addr,
                 if (length == 1) /* 1 byte load */
                         ; /* There is no i8259, there is no INTA access*/
                 else
-                        /*panic_domain(NULL,"Undefined read on PIB INTA\n"); */
-                        panic_vm(v);
+                        panic_vm(v, "Undefined read on PIB INTA\n");
 
                 break;
         case PIB_OFST_XTP:
                 if (length == 1) {
                         result = VLSAPIC_XTP(v);
-                        /* printk("read xtp %lx\n", result); */
                 } else {
-                        /*panic_domain(NULL,
-                        "Undefined read on PIB XTP\n");*/
-                        panic_vm(v);
+                        panic_vm(v, "Undefined read on PIB XTP\n");
                 }
                 break;
         default:
-                panic_vm(v);
+                panic_vm(v, "Undefined addr access for lsapic!\n");
                 break;
         }
         return result;
@@ -162,7 +152,7 @@ static void mmio_access(struct kvm_vcpu *vcpu, u64 src_pa, u64 *dest,
                         /* it's necessary to ensure zero extending */
                         *dest = p->u.ioreq.data & (~0UL >> (64-(s*8)));
         } else
-                panic_vm(vcpu);
+                panic_vm(vcpu, "Unhandled mmio access returned!\n");
 out:
         local_irq_restore(psr);
         return ;
@@ -324,7 +314,9 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma)
                 return;
         } else {
                 inst_type = -1;
-                panic_vm(vcpu);
+                panic_vm(vcpu, "Unsupported MMIO access instruction! \
+                                Bunld[0]=0x%lx, Bundle[1]=0x%lx\n",
+                                bundle.i64[0], bundle.i64[1]);
         }
 
         size = 1 << size;
@@ -335,7 +327,7 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma)
                 if (inst_type == SL_INTEGER)
                         vcpu_set_gr(vcpu, inst.M1.r1, data, 0);
                 else
-                        panic_vm(vcpu);
+                        panic_vm(vcpu, "Unsupported instruction type!\n");
 
         }
         vcpu_increment_iip(vcpu);
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index 800817307b7b..552d07724207 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -527,7 +527,8 @@ void reflect_interruption(u64 ifa, u64 isr, u64 iim,
         vector = vec2off[vec];
 
         if (!(vpsr & IA64_PSR_IC) && (vector != IA64_DATA_NESTED_TLB_VECTOR)) {
-                panic_vm(vcpu);
+                panic_vm(vcpu, "Interruption with vector :0x%lx occurs "
+                                                "with psr.ic = 0\n", vector);
                 return;
         }
 
@@ -586,7 +587,7 @@ static void set_pal_call_result(struct kvm_vcpu *vcpu)
                 vcpu_set_gr(vcpu, 10, p->u.pal_data.ret.v1, 0);
                 vcpu_set_gr(vcpu, 11, p->u.pal_data.ret.v2, 0);
         } else
-                panic_vm(vcpu);
+                panic_vm(vcpu, "Mis-set for exit reason!\n");
 }
 
 static void set_sal_call_data(struct kvm_vcpu *vcpu)
@@ -614,7 +615,7 @@ static void set_sal_call_result(struct kvm_vcpu *vcpu)
                 vcpu_set_gr(vcpu, 10, p->u.sal_data.ret.r10, 0);
                 vcpu_set_gr(vcpu, 11, p->u.sal_data.ret.r11, 0);
         } else
-                panic_vm(vcpu);
+                panic_vm(vcpu, "Mis-set for exit reason!\n");
 }
 
 void  kvm_ia64_handle_break(unsigned long ifa, struct kvm_pt_regs *regs,
@@ -680,7 +681,7 @@ static void generate_exirq(struct kvm_vcpu *vcpu)
         vpsr = VCPU(vcpu, vpsr);
         isr = vpsr & IA64_PSR_RI;
         if (!(vpsr & IA64_PSR_IC))
-                panic_vm(vcpu);
+                panic_vm(vcpu, "Trying to inject one IRQ with psr.ic=0\n");
         reflect_interruption(0, isr, 0, 12, regs); /* EXT IRQ */
 }
 
@@ -941,8 +942,20 @@ static void vcpu_do_resume(struct kvm_vcpu *vcpu)
         ia64_set_pta(vcpu->arch.vhpt.pta.val);
 }
 
+static void vmm_sanity_check(struct kvm_vcpu *vcpu)
+{
+        struct exit_ctl_data *p = &vcpu->arch.exit_data;
+
+        if (!vmm_sanity && p->exit_reason != EXIT_REASON_DEBUG) {
+                panic_vm(vcpu, "Failed to do vmm sanity check,"
+                        "it maybe caused by crashed vmm!!\n\n");
+        }
+}
+
 static void kvm_do_resume_op(struct kvm_vcpu *vcpu)
 {
+        vmm_sanity_check(vcpu); /*Guarantee vcpu runing on healthy vmm!*/
+
         if (test_and_clear_bit(KVM_REQ_RESUME, &vcpu->requests)) {
                 vcpu_do_resume(vcpu);
                 return;
@@ -968,3 +981,11 @@ void vmm_transition(struct kvm_vcpu *vcpu)
                                                 1, 0, 0, 0, 0, 0);
         kvm_do_resume_op(vcpu);
 }
+
+void vmm_panic_handler(u64 vec)
+{
+        struct kvm_vcpu *vcpu = current_vcpu;
+        vmm_sanity = 0;
+        panic_vm(vcpu, "Unexpected interruption occurs in VMM, vector:0x%lx\n",
+                        vec2off[vec]);
+}
diff --git a/arch/ia64/kvm/vcpu.c b/arch/ia64/kvm/vcpu.c
index e44027ce5667..ecd526b55323 100644
--- a/arch/ia64/kvm/vcpu.c
+++ b/arch/ia64/kvm/vcpu.c
@@ -816,8 +816,9 @@ static void vcpu_set_itc(struct kvm_vcpu *vcpu, u64 val)
         unsigned long vitv = VCPU(vcpu, itv);
 
         if (vcpu->vcpu_id == 0) {
-                for (i = 0; i < MAX_VCPU_NUM; i++) {
-                        v = (struct kvm_vcpu *)((char *)vcpu + VCPU_SIZE * i);
+                for (i = 0; i < KVM_MAX_VCPUS; i++) {
+                        v = (struct kvm_vcpu *)((char *)vcpu +
+                                        sizeof(struct kvm_vcpu_data) * i);
                         VMX(v, itc_offset) = itc_offset;
                         VMX(v, last_itc) = 0;
                 }
@@ -1650,7 +1651,8 @@ void vcpu_set_psr(struct kvm_vcpu *vcpu, unsigned long val)
          * Otherwise panic
          */
         if (val & (IA64_PSR_PK | IA64_PSR_IS | IA64_PSR_VM))
-                panic_vm(vcpu);
+                panic_vm(vcpu, "Only support guests with vpsr.pk =0 \
+                                & vpsr.is=0\n");
 
         /*
          * For those IA64_PSR bits: id/da/dd/ss/ed/ia
@@ -2103,7 +2105,7 @@ void kvm_init_all_rr(struct kvm_vcpu *vcpu)
 
         if (is_physical_mode(vcpu)) {
                 if (vcpu->arch.mode_flags & GUEST_PHY_EMUL)
-                        panic_vm(vcpu);
+                        panic_vm(vcpu, "Machine Status conflicts!\n");
 
                 ia64_set_rr((VRN0 << VRN_SHIFT), vcpu->arch.metaphysical_rr0);
                 ia64_dv_serialize_data();
@@ -2152,10 +2154,70 @@ int vmm_entry(void)
         return 0;
 }
 
-void panic_vm(struct kvm_vcpu *v)
-{
+static void kvm_show_registers(struct kvm_pt_regs *regs)
+{
+        unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
+
+        struct kvm_vcpu *vcpu = current_vcpu;
+        if (vcpu != NULL)
+                printk("vcpu 0x%p vcpu %d\n",
+                       vcpu, vcpu->vcpu_id);
+
+        printk("psr : %016lx ifs : %016lx ip  : [<%016lx>]\n",
+               regs->cr_ipsr, regs->cr_ifs, ip);
+
+        printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
+               regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
+        printk("rnat: %016lx bspstore: %016lx pr  : %016lx\n",
+               regs->ar_rnat, regs->ar_bspstore, regs->pr);
+        printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
+               regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
+        printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
+        printk("b0  : %016lx b6  : %016lx b7  : %016lx\n", regs->b0,
+                                                        regs->b6, regs->b7);
+        printk("f6  : %05lx%016lx f7  : %05lx%016lx\n",
+               regs->f6.u.bits[1], regs->f6.u.bits[0],
+               regs->f7.u.bits[1], regs->f7.u.bits[0]);
+        printk("f8  : %05lx%016lx f9  : %05lx%016lx\n",
+               regs->f8.u.bits[1], regs->f8.u.bits[0],
+               regs->f9.u.bits[1], regs->f9.u.bits[0]);
+        printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
+               regs->f10.u.bits[1], regs->f10.u.bits[0],
+               regs->f11.u.bits[1], regs->f11.u.bits[0]);
+
+        printk("r1  : %016lx r2  : %016lx r3  : %016lx\n", regs->r1,
+                                                        regs->r2, regs->r3);
+        printk("r8  : %016lx r9  : %016lx r10 : %016lx\n", regs->r8,
+                                                        regs->r9, regs->r10);
+        printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11,
+                                                        regs->r12, regs->r13);
+        printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14,
+                                                        regs->r15, regs->r16);
+        printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17,
+                                                        regs->r18, regs->r19);
+        printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20,
+                                                        regs->r21, regs->r22);
+        printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23,
+                                                        regs->r24, regs->r25);
+        printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26,
+                                                        regs->r27, regs->r28);
+        printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29,
+                                                        regs->r30, regs->r31);
+
+}
+
+void panic_vm(struct kvm_vcpu *v, const char *fmt, ...)
+{
+        va_list args;
+        char buf[256];
+
+        struct kvm_pt_regs *regs = vcpu_regs(v);
         struct exit_ctl_data *p = &v->arch.exit_data;
-
+        va_start(args, fmt);
+        vsnprintf(buf, sizeof(buf), fmt, args);
+        va_end(args);
+        printk(buf);
+        kvm_show_registers(regs);
         p->exit_reason = EXIT_REASON_VM_PANIC;
         vmm_transition(v);
         /*Never to return*/
diff --git a/arch/ia64/kvm/vcpu.h b/arch/ia64/kvm/vcpu.h
index e9b2a4e121c0..b2f12a562bdf 100644
--- a/arch/ia64/kvm/vcpu.h
+++ b/arch/ia64/kvm/vcpu.h
@@ -737,9 +737,12 @@ void kvm_init_vtlb(struct kvm_vcpu *v);
 void kvm_init_vhpt(struct kvm_vcpu *v);
 void thash_init(struct thash_cb *hcb, u64 sz);
 
-void panic_vm(struct kvm_vcpu *v);
+void panic_vm(struct kvm_vcpu *v, const char *fmt, ...);
 
 extern u64 ia64_call_vsa(u64 proc, u64 arg1, u64 arg2, u64 arg3,
                 u64 arg4, u64 arg5, u64 arg6, u64 arg7);
+
+extern long vmm_sanity;
+
 #endif
 #endif  /* __VCPU_H__ */
diff --git a/arch/ia64/kvm/vmm.c b/arch/ia64/kvm/vmm.c
index 2275bf4e681a..9eee5c04bacc 100644
--- a/arch/ia64/kvm/vmm.c
+++ b/arch/ia64/kvm/vmm.c
@@ -20,6 +20,7 @@
  */
 
 
+#include<linux/kernel.h>
 #include<linux/module.h>
 #include<asm/fpswa.h>
 
@@ -31,6 +32,8 @@ MODULE_LICENSE("GPL");
 extern char kvm_ia64_ivt;
 extern fpswa_interface_t *vmm_fpswa_interface;
 
+long vmm_sanity = 1;
+
 struct kvm_vmm_info vmm_info = {
         .module      = THIS_MODULE,
         .vmm_entry   = vmm_entry,
@@ -62,5 +65,31 @@ void vmm_spin_unlock(spinlock_t *lock)
 {
         _vmm_raw_spin_unlock(lock);
 }
+
+static void vcpu_debug_exit(struct kvm_vcpu *vcpu)
+{
+        struct exit_ctl_data *p = &vcpu->arch.exit_data;
+        long psr;
+
+        local_irq_save(psr);
+        p->exit_reason = EXIT_REASON_DEBUG;
+        vmm_transition(vcpu);
+        local_irq_restore(psr);
+}
+
+asmlinkage int printk(const char *fmt, ...)
+{
+        struct kvm_vcpu *vcpu = current_vcpu;
+        va_list args;
+        int r;
+
+        memset(vcpu->arch.log_buf, 0, VMM_LOG_LEN);
+        va_start(args, fmt);
+        r = vsnprintf(vcpu->arch.log_buf, VMM_LOG_LEN, fmt, args);
+        va_end(args);
+        vcpu_debug_exit(vcpu);
+        return r;
+}
+
 module_init(kvm_vmm_init)
 module_exit(kvm_vmm_exit)
diff --git a/arch/ia64/kvm/vmm_ivt.S b/arch/ia64/kvm/vmm_ivt.S
index c1d7251a1480..3ef1a017a318 100644
--- a/arch/ia64/kvm/vmm_ivt.S
+++ b/arch/ia64/kvm/vmm_ivt.S
@@ -1,5 +1,5 @@
 /*
- * /ia64/kvm_ivt.S
+ * arch/ia64/kvm/vmm_ivt.S
  *
  * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
  *      Stephane Eranian <eranian@hpl.hp.com>
@@ -70,32 +70,39 @@
 # define PSR_DEFAULT_BITS   0
 #endif
 
-
 #define KVM_FAULT(n)    \
-    kvm_fault_##n:;          \
-    mov r19=n;;          \
-    br.sptk.many kvm_fault_##n;         \
-    ;;                  \
-
+        kvm_fault_##n:;          \
+        mov r19=n;;          \
+        br.sptk.many kvm_vmm_panic;         \
+        ;;                  \
 
 #define KVM_REFLECT(n)    \
-    mov r31=pr;           \
-    mov r19=n;       /* prepare to save predicates */ \
-    mov r29=cr.ipsr;      \
-    ;;      \
-    tbit.z p6,p7=r29,IA64_PSR_VM_BIT;       \
-(p7)br.sptk.many kvm_dispatch_reflection;        \
-    br.sptk.many kvm_panic;      \
-
-
-GLOBAL_ENTRY(kvm_panic)
-    br.sptk.many kvm_panic
-    ;;
-END(kvm_panic)
-
-
-
-
+        mov r31=pr;           \
+        mov r19=n;       /* prepare to save predicates */ \
+        mov r29=cr.ipsr;      \
+        ;;      \
+        tbit.z p6,p7=r29,IA64_PSR_VM_BIT;       \
+(p7)    br.sptk.many kvm_dispatch_reflection;        \
+        br.sptk.many kvm_vmm_panic;      \
+
+GLOBAL_ENTRY(kvm_vmm_panic)
+        KVM_SAVE_MIN_WITH_COVER_R19
+        alloc r14=ar.pfs,0,0,1,0
+        mov out0=r15
+        adds r3=8,r2                // set up second base pointer
+        ;;
+        ssm psr.ic
+        ;;
+        srlz.i    // guarantee that interruption collection is on
+        ;;
+        //(p15) ssm psr.i               // restore psr.i
+        addl r14=@gprel(ia64_leave_hypervisor),gp
+        ;;
+        KVM_SAVE_REST
+        mov rp=r14
+        ;;
+        br.call.sptk.many b6=vmm_panic_handler;
+END(kvm_vmm_panic)
 
     .section .text.ivt,"ax"
 
@@ -105,308 +112,307 @@ kvm_ia64_ivt:
 ///////////////////////////////////////////////////////////////
 // 0x0000 Entry 0 (size 64 bundles) VHPT Translation (8,20,47)
 ENTRY(kvm_vhpt_miss)
-    KVM_FAULT(0)
+        KVM_FAULT(0)
 END(kvm_vhpt_miss)
 
-
     .org kvm_ia64_ivt+0x400
 ////////////////////////////////////////////////////////////////
 // 0x0400 Entry 1 (size 64 bundles) ITLB (21)
 ENTRY(kvm_itlb_miss)
-    mov r31 = pr
-    mov r29=cr.ipsr;
-    ;;
-    tbit.z p6,p7=r29,IA64_PSR_VM_BIT;
-    (p6) br.sptk kvm_alt_itlb_miss
-    mov r19 = 1
-    br.sptk kvm_itlb_miss_dispatch
-    KVM_FAULT(1);
+        mov r31 = pr
+        mov r29=cr.ipsr;
+        ;;
+        tbit.z p6,p7=r29,IA64_PSR_VM_BIT;
+(p6)    br.sptk kvm_alt_itlb_miss
+        mov r19 = 1
+        br.sptk kvm_itlb_miss_dispatch
+        KVM_FAULT(1);
 END(kvm_itlb_miss)
 
     .org kvm_ia64_ivt+0x0800
 //////////////////////////////////////////////////////////////////
 // 0x0800 Entry 2 (size 64 bundles) DTLB (9,48)
 ENTRY(kvm_dtlb_miss)
-    mov r31 = pr
-    mov r29=cr.ipsr;
-    ;;
-    tbit.z p6,p7=r29,IA64_PSR_VM_BIT;
-(p6)br.sptk kvm_alt_dtlb_miss
-    br.sptk kvm_dtlb_miss_dispatch
+        mov r31 = pr
+        mov r29=cr.ipsr;
+        ;;
+        tbit.z p6,p7=r29,IA64_PSR_VM_BIT;
+(p6)    br.sptk kvm_alt_dtlb_miss
+        br.sptk kvm_dtlb_miss_dispatch
 END(kvm_dtlb_miss)
 
      .org kvm_ia64_ivt+0x0c00
 ////////////////////////////////////////////////////////////////////
 // 0x0c00 Entry 3 (size 64 bundles) Alt ITLB (19)
 ENTRY(kvm_alt_itlb_miss)
-    mov r16=cr.ifa    // get address that caused the TLB miss
-    ;;
-    movl r17=PAGE_KERNEL
-    mov r24=cr.ipsr
-    movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
-    ;;
-    and r19=r19,r16     // clear ed, reserved bits, and PTE control bits
-    ;;
-    or r19=r17,r19      // insert PTE control bits into r19
-    ;;
-    movl r20=IA64_GRANULE_SHIFT<<2
-    ;;
-    mov cr.itir=r20
-    ;;
-    itc.i r19           // insert the TLB entry
-    mov pr=r31,-1
-    rfi
+        mov r16=cr.ifa    // get address that caused the TLB miss
+        ;;
+        movl r17=PAGE_KERNEL
+        mov r24=cr.ipsr
+        movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
+        ;;
+        and r19=r19,r16     // clear ed, reserved bits, and PTE control bits
+        ;;
+        or r19=r17,r19      // insert PTE control bits into r19
+        ;;
+        movl r20=IA64_GRANULE_SHIFT<<2
+        ;;
+        mov cr.itir=r20
+        ;;
+        itc.i r19               // insert the TLB entry
+        mov pr=r31,-1
+        rfi
 END(kvm_alt_itlb_miss)
 
     .org kvm_ia64_ivt+0x1000
 /////////////////////////////////////////////////////////////////////
 // 0x1000 Entry 4 (size 64 bundles) Alt DTLB (7,46)
 ENTRY(kvm_alt_dtlb_miss)
-    mov r16=cr.ifa              // get address that caused the TLB miss
-    ;;
-    movl r17=PAGE_KERNEL
-    movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
-    mov r24=cr.ipsr
-    ;;
-    and r19=r19,r16     // clear ed, reserved bits, and PTE control bits
-    ;;
-    or r19=r19,r17      // insert PTE control bits into r19
-    ;;
-    movl r20=IA64_GRANULE_SHIFT<<2
-    ;;
-    mov cr.itir=r20
-    ;;
-    itc.d r19           // insert the TLB entry
-    mov pr=r31,-1
-    rfi
+        mov r16=cr.ifa          // get address that caused the TLB miss
+        ;;
+        movl r17=PAGE_KERNEL
+        movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
+        mov r24=cr.ipsr
+        ;;
+        and r19=r19,r16     // clear ed, reserved bits, and PTE control bits
+        ;;
+        or r19=r19,r17  // insert PTE control bits into r19
+        ;;
+        movl r20=IA64_GRANULE_SHIFT<<2
+        ;;
+        mov cr.itir=r20
+        ;;
+        itc.d r19               // insert the TLB entry
+        mov pr=r31,-1
+        rfi
 END(kvm_alt_dtlb_miss)
 
     .org kvm_ia64_ivt+0x1400
 //////////////////////////////////////////////////////////////////////
 // 0x1400 Entry 5 (size 64 bundles) Data nested TLB (6,45)
 ENTRY(kvm_nested_dtlb_miss)
-    KVM_FAULT(5)
+        KVM_FAULT(5)
 END(kvm_nested_dtlb_miss)
 
     .org kvm_ia64_ivt+0x1800
 /////////////////////////////////////////////////////////////////////
 // 0x1800 Entry 6 (size 64 bundles) Instruction Key Miss (24)
 ENTRY(kvm_ikey_miss)
-    KVM_REFLECT(6)
+        KVM_REFLECT(6)
 END(kvm_ikey_miss)
 
     .org kvm_ia64_ivt+0x1c00
 /////////////////////////////////////////////////////////////////////
 // 0x1c00 Entry 7 (size 64 bundles) Data Key Miss (12,51)
 ENTRY(kvm_dkey_miss)
-    KVM_REFLECT(7)
+        KVM_REFLECT(7)
 END(kvm_dkey_miss)
 
     .org kvm_ia64_ivt+0x2000
 ////////////////////////////////////////////////////////////////////
 // 0x2000 Entry 8 (size 64 bundles) Dirty-bit (54)
 ENTRY(kvm_dirty_bit)
-    KVM_REFLECT(8)
+        KVM_REFLECT(8)
 END(kvm_dirty_bit)
 
     .org kvm_ia64_ivt+0x2400
 ////////////////////////////////////////////////////////////////////
 // 0x2400 Entry 9 (size 64 bundles) Instruction Access-bit (27)
 ENTRY(kvm_iaccess_bit)
-    KVM_REFLECT(9)
+        KVM_REFLECT(9)
 END(kvm_iaccess_bit)
 
     .org kvm_ia64_ivt+0x2800
 ///////////////////////////////////////////////////////////////////
 // 0x2800 Entry 10 (size 64 bundles) Data Access-bit (15,55)
 ENTRY(kvm_daccess_bit)
-    KVM_REFLECT(10)
+        KVM_REFLECT(10)
 END(kvm_daccess_bit)
 
     .org kvm_ia64_ivt+0x2c00
 /////////////////////////////////////////////////////////////////
 // 0x2c00 Entry 11 (size 64 bundles) Break instruction (33)
 ENTRY(kvm_break_fault)
-    mov r31=pr
-    mov r19=11
-    mov r29=cr.ipsr
-    ;;
-    KVM_SAVE_MIN_WITH_COVER_R19
-    ;;
-    alloc r14=ar.pfs,0,0,4,0 // now it's safe (must be first in insn group!)
-    mov out0=cr.ifa
-    mov out2=cr.isr     // FIXME: pity to make this slow access twice
-    mov out3=cr.iim     // FIXME: pity to make this slow access twice
-    adds r3=8,r2                // set up second base pointer
-    ;;
-    ssm psr.ic
-    ;;
-    srlz.i                  // guarantee that interruption collection is on
-    ;;
-    //(p15)ssm psr.i               // restore psr.i
-    addl r14=@gprel(ia64_leave_hypervisor),gp
-    ;;
-    KVM_SAVE_REST
-    mov rp=r14
-    ;;
-    adds out1=16,sp
-    br.call.sptk.many b6=kvm_ia64_handle_break
-    ;;
+        mov r31=pr
+        mov r19=11
+        mov r29=cr.ipsr
+        ;;
+        KVM_SAVE_MIN_WITH_COVER_R19
+        ;;
+        alloc r14=ar.pfs,0,0,4,0 //(must be first in insn group!)
+        mov out0=cr.ifa
+        mov out2=cr.isr     // FIXME: pity to make this slow access twice
+        mov out3=cr.iim     // FIXME: pity to make this slow access twice
+        adds r3=8,r2                // set up second base pointer
+        ;;
+        ssm psr.ic
+        ;;
+        srlz.i         // guarantee that interruption collection is on
+        ;;
+        //(p15)ssm psr.i               // restore psr.i
+        addl r14=@gprel(ia64_leave_hypervisor),gp
+        ;;
+        KVM_SAVE_REST
+        mov rp=r14
+        ;;
+        adds out1=16,sp
+        br.call.sptk.many b6=kvm_ia64_handle_break
+        ;;
 END(kvm_break_fault)
 
     .org kvm_ia64_ivt+0x3000
 /////////////////////////////////////////////////////////////////
 // 0x3000 Entry 12 (size 64 bundles) External Interrupt (4)
 ENTRY(kvm_interrupt)
-    mov r31=pr          // prepare to save predicates
-    mov r19=12
-    mov r29=cr.ipsr
-    ;;
-    tbit.z p6,p7=r29,IA64_PSR_VM_BIT
-    tbit.z p0,p15=r29,IA64_PSR_I_BIT
-    ;;
-(p7) br.sptk kvm_dispatch_interrupt
-    ;;
-    mov r27=ar.rsc              /* M */
-    mov r20=r1                  /* A */
-    mov r25=ar.unat             /* M */
-    mov r26=ar.pfs              /* I */
-    mov r28=cr.iip              /* M */
-    cover                       /* B (or nothing) */
-    ;;
-    mov r1=sp
-    ;;
-    invala                      /* M */
-    mov r30=cr.ifs
-    ;;
-    addl r1=-VMM_PT_REGS_SIZE,r1
-    ;;
-    adds r17=2*L1_CACHE_BYTES,r1        /* really: biggest cache-line size */
-    adds r16=PT(CR_IPSR),r1
-    ;;
-    lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES
-    st8 [r16]=r29                       /* save cr.ipsr */
-    ;;
-    lfetch.fault.excl.nt1 [r17]
-    mov r29=b0
-    ;;
-    adds r16=PT(R8),r1          /* initialize first base pointer */
-    adds r17=PT(R9),r1          /* initialize second base pointer */
-    mov r18=r0                  /* make sure r18 isn't NaT */
-    ;;
+        mov r31=pr              // prepare to save predicates
+        mov r19=12
+        mov r29=cr.ipsr
+        ;;
+        tbit.z p6,p7=r29,IA64_PSR_VM_BIT
+        tbit.z p0,p15=r29,IA64_PSR_I_BIT
+        ;;
+(p7)    br.sptk kvm_dispatch_interrupt
+        ;;
+        mov r27=ar.rsc          /* M */
+        mov r20=r1                      /* A */
+        mov r25=ar.unat         /* M */
+        mov r26=ar.pfs          /* I */
+        mov r28=cr.iip          /* M */
+        cover                   /* B (or nothing) */
+        ;;
+        mov r1=sp
+        ;;
+        invala                  /* M */
+        mov r30=cr.ifs
+        ;;
+        addl r1=-VMM_PT_REGS_SIZE,r1
+        ;;
+        adds r17=2*L1_CACHE_BYTES,r1    /* really: biggest cache-line size */
+        adds r16=PT(CR_IPSR),r1
+        ;;
+        lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES
+        st8 [r16]=r29                   /* save cr.ipsr */
+        ;;
+        lfetch.fault.excl.nt1 [r17]
+        mov r29=b0
+        ;;
+        adds r16=PT(R8),r1      /* initialize first base pointer */
+        adds r17=PT(R9),r1      /* initialize second base pointer */
+        mov r18=r0                      /* make sure r18 isn't NaT */
+        ;;
 .mem.offset 0,0; st8.spill [r16]=r8,16
 .mem.offset 8,0; st8.spill [r17]=r9,16
         ;;
 .mem.offset 0,0; st8.spill [r16]=r10,24
 .mem.offset 8,0; st8.spill [r17]=r11,24
         ;;
-    st8 [r16]=r28,16            /* save cr.iip */
-    st8 [r17]=r30,16            /* save cr.ifs */
-    mov r8=ar.fpsr              /* M */
-    mov r9=ar.csd
-    mov r10=ar.ssd
-    movl r11=FPSR_DEFAULT       /* L-unit */
-    ;;
-    st8 [r16]=r25,16            /* save ar.unat */
-    st8 [r17]=r26,16            /* save ar.pfs */
-    shl r18=r18,16              /* compute ar.rsc to be used for "loadrs" */
-    ;;
-    st8 [r16]=r27,16            /* save ar.rsc */
-    adds r17=16,r17             /* skip over ar_rnat field */
-    ;;
-    st8 [r17]=r31,16            /* save predicates */
-    adds r16=16,r16             /* skip over ar_bspstore field */
-    ;;
-    st8 [r16]=r29,16            /* save b0 */
-    st8 [r17]=r18,16            /* save ar.rsc value for "loadrs" */
-    ;;
+        st8 [r16]=r28,16                /* save cr.iip */
+        st8 [r17]=r30,16                /* save cr.ifs */
+        mov r8=ar.fpsr          /* M */
+        mov r9=ar.csd
+        mov r10=ar.ssd
+        movl r11=FPSR_DEFAULT   /* L-unit */
+        ;;
+        st8 [r16]=r25,16                /* save ar.unat */
+        st8 [r17]=r26,16                /* save ar.pfs */
+        shl r18=r18,16          /* compute ar.rsc to be used for "loadrs" */
+        ;;
+        st8 [r16]=r27,16                /* save ar.rsc */
+        adds r17=16,r17         /* skip over ar_rnat field */
+        ;;
+        st8 [r17]=r31,16                /* save predicates */
+        adds r16=16,r16         /* skip over ar_bspstore field */
+        ;;
+        st8 [r16]=r29,16                /* save b0 */
+        st8 [r17]=r18,16                /* save ar.rsc value for "loadrs" */
+        ;;
 .mem.offset 0,0; st8.spill [r16]=r20,16    /* save original r1 */
 .mem.offset 8,0; st8.spill [r17]=r12,16
-    adds r12=-16,r1
-    /* switch to kernel memory stack (with 16 bytes of scratch) */
-    ;;
+        adds r12=-16,r1
+        /* switch to kernel memory stack (with 16 bytes of scratch) */
+        ;;
 .mem.offset 0,0; st8.spill [r16]=r13,16
 .mem.offset 8,0; st8.spill [r17]=r8,16 /* save ar.fpsr */
-    ;;
+        ;;
 .mem.offset 0,0; st8.spill [r16]=r15,16
 .mem.offset 8,0; st8.spill [r17]=r14,16
-    dep r14=-1,r0,60,4
-    ;;
+        dep r14=-1,r0,60,4
+        ;;
 .mem.offset 0,0; st8.spill [r16]=r2,16
 .mem.offset 8,0; st8.spill [r17]=r3,16
-    adds r2=VMM_PT_REGS_R16_OFFSET,r1
-    adds r14 = VMM_VCPU_GP_OFFSET,r13
-    ;;
-    mov r8=ar.ccv
-    ld8 r14 = [r14]
-    ;;
-    mov r1=r14       /* establish kernel global pointer */
-    ;;                                          \
-    bsw.1
-    ;;
-    alloc r14=ar.pfs,0,0,1,0    // must be first in an insn group
-    mov out0=r13
-    ;;
-    ssm psr.ic
-    ;;
-    srlz.i
-    ;;
-    //(p15) ssm psr.i
-    adds r3=8,r2                // set up second base pointer for SAVE_REST
-    srlz.i                      // ensure everybody knows psr.ic is back on
-    ;;
+        adds r2=VMM_PT_REGS_R16_OFFSET,r1
+        adds r14 = VMM_VCPU_GP_OFFSET,r13
+        ;;
+        mov r8=ar.ccv
+        ld8 r14 = [r14]
+        ;;
+        mov r1=r14       /* establish kernel global pointer */
+        ;;                                          \
+        bsw.1
+        ;;
+        alloc r14=ar.pfs,0,0,1,0        // must be first in an insn group
+        mov out0=r13
+        ;;
+        ssm psr.ic
+        ;;
+        srlz.i
+        ;;
+        //(p15) ssm psr.i
+        adds r3=8,r2            // set up second base pointer for SAVE_REST
+        srlz.i                  // ensure everybody knows psr.ic is back on
+        ;;
 .mem.offset 0,0; st8.spill [r2]=r16,16
 .mem.offset 8,0; st8.spill [r3]=r17,16
-    ;;
+        ;;
 .mem.offset 0,0; st8.spill [r2]=r18,16
 .mem.offset 8,0; st8.spill [r3]=r19,16
-    ;;
+        ;;
 .mem.offset 0,0; st8.spill [r2]=r20,16
 .mem.offset 8,0; st8.spill [r3]=r21,16
-    mov r18=b6
-    ;;
+        mov r18=b6
+        ;;
 .mem.offset 0,0; st8.spill [r2]=r22,16
 .mem.offset 8,0; st8.spill [r3]=r23,16
-    mov r19=b7
-    ;;
+        mov r19=b7
+        ;;
 .mem.offset 0,0; st8.spill [r2]=r24,16
 .mem.offset 8,0; st8.spill [r3]=r25,16
-    ;;
+        ;;
 .mem.offset 0,0; st8.spill [r2]=r26,16
 .mem.offset 8,0; st8.spill [r3]=r27,16
-    ;;
+        ;;
 .mem.offset 0,0; st8.spill [r2]=r28,16
 .mem.offset 8,0; st8.spill [r3]=r29,16
-    ;;
+        ;;
 .mem.offset 0,0; st8.spill [r2]=r30,16
 .mem.offset 8,0; st8.spill [r3]=r31,32
-    ;;
-    mov ar.fpsr=r11       /* M-unit */
-    st8 [r2]=r8,8         /* ar.ccv */
-    adds r24=PT(B6)-PT(F7),r3
-    ;;
-    stf.spill [r2]=f6,32
-    stf.spill [r3]=f7,32
-    ;;
-    stf.spill [r2]=f8,32
-    stf.spill [r3]=f9,32
-    ;;
-    stf.spill [r2]=f10
-    stf.spill [r3]=f11
-    adds r25=PT(B7)-PT(F11),r3
-    ;;
-    st8 [r24]=r18,16       /* b6 */
-    st8 [r25]=r19,16       /* b7 */
-    ;;
-    st8 [r24]=r9           /* ar.csd */
-    st8 [r25]=r10          /* ar.ssd */
-    ;;
-    srlz.d              // make sure we see the effect of cr.ivr
-    addl r14=@gprel(ia64_leave_nested),gp
-    ;;
-    mov rp=r14
-    br.call.sptk.many b6=kvm_ia64_handle_irq
-    ;;
+        ;;
+        mov ar.fpsr=r11       /* M-unit */
+        st8 [r2]=r8,8         /* ar.ccv */
+        adds r24=PT(B6)-PT(F7),r3
+        ;;
+        stf.spill [r2]=f6,32
+        stf.spill [r3]=f7,32
+        ;;
+        stf.spill [r2]=f8,32
+        stf.spill [r3]=f9,32
+        ;;
+        stf.spill [r2]=f10
+        stf.spill [r3]=f11
+        adds r25=PT(B7)-PT(F11),r3
+        ;;
+        st8 [r24]=r18,16       /* b6 */
+        st8 [r25]=r19,16       /* b7 */
+        ;;
+        st8 [r24]=r9           /* ar.csd */
+        st8 [r25]=r10          /* ar.ssd */
+        ;;
+        srlz.d          // make sure we see the effect of cr.ivr
+        addl r14=@gprel(ia64_leave_nested),gp
+        ;;
+        mov rp=r14
+        br.call.sptk.many b6=kvm_ia64_handle_irq
+        ;;
 END(kvm_interrupt)
 
     .global kvm_dispatch_vexirq
@@ -414,387 +420,385 @@ END(kvm_interrupt)
 //////////////////////////////////////////////////////////////////////
 // 0x3400 Entry 13 (size 64 bundles) Reserved
 ENTRY(kvm_virtual_exirq)
-    mov r31=pr
-    mov r19=13
-    mov r30 =r0
-    ;;
+        mov r31=pr
+        mov r19=13
+        mov r30 =r0
+        ;;
 kvm_dispatch_vexirq:
-    cmp.eq p6,p0 = 1,r30
-    ;;
-(p6)add r29 = VMM_VCPU_SAVED_GP_OFFSET,r21
-    ;;
-(p6)ld8 r1 = [r29]
-    ;;
-    KVM_SAVE_MIN_WITH_COVER_R19
-    alloc r14=ar.pfs,0,0,1,0
-    mov out0=r13
-
-    ssm psr.ic
-    ;;
-    srlz.i                  // guarantee that interruption collection is on
-    ;;
-    //(p15) ssm psr.i               // restore psr.i
-    adds r3=8,r2                // set up second base pointer
-    ;;
-    KVM_SAVE_REST
-    addl r14=@gprel(ia64_leave_hypervisor),gp
-    ;;
-    mov rp=r14
-    br.call.sptk.many b6=kvm_vexirq
+        cmp.eq p6,p0 = 1,r30
+        ;;
+(p6)    add r29 = VMM_VCPU_SAVED_GP_OFFSET,r21
+        ;;
+(p6)    ld8 r1 = [r29]
+        ;;
+        KVM_SAVE_MIN_WITH_COVER_R19
+        alloc r14=ar.pfs,0,0,1,0
+        mov out0=r13
+
+        ssm psr.ic
+        ;;
+        srlz.i // guarantee that interruption collection is on
+        ;;
+        //(p15) ssm psr.i               // restore psr.i
+        adds r3=8,r2                // set up second base pointer
+        ;;
+        KVM_SAVE_REST
+        addl r14=@gprel(ia64_leave_hypervisor),gp
+        ;;
+        mov rp=r14
+        br.call.sptk.many b6=kvm_vexirq
 END(kvm_virtual_exirq)
 
     .org kvm_ia64_ivt+0x3800
 /////////////////////////////////////////////////////////////////////
 // 0x3800 Entry 14 (size 64 bundles) Reserved
-    KVM_FAULT(14)
-    // this code segment is from 2.6.16.13
-
+        KVM_FAULT(14)
+        // this code segment is from 2.6.16.13
 
     .org kvm_ia64_ivt+0x3c00
 ///////////////////////////////////////////////////////////////////////
 // 0x3c00 Entry 15 (size 64 bundles) Reserved
-    KVM_FAULT(15)
-
+        KVM_FAULT(15)
 
     .org kvm_ia64_ivt+0x4000
 ///////////////////////////////////////////////////////////////////////
 // 0x4000 Entry 16 (size 64 bundles) Reserved
-    KVM_FAULT(16)
+        KVM_FAULT(16)
 
     .org kvm_ia64_ivt+0x4400
 //////////////////////////////////////////////////////////////////////
 // 0x4400 Entry 17 (size 64 bundles) Reserved
-    KVM_FAULT(17)
+        KVM_FAULT(17)
 
     .org kvm_ia64_ivt+0x4800
 //////////////////////////////////////////////////////////////////////
 // 0x4800 Entry 18 (size 64 bundles) Reserved
-    KVM_FAULT(18)
+        KVM_FAULT(18)
 
     .org kvm_ia64_ivt+0x4c00
 //////////////////////////////////////////////////////////////////////
 // 0x4c00 Entry 19 (size 64 bundles) Reserved
-    KVM_FAULT(19)
+        KVM_FAULT(19)
 
     .org kvm_ia64_ivt+0x5000
 //////////////////////////////////////////////////////////////////////
 // 0x5000 Entry 20 (size 16 bundles) Page Not Present
 ENTRY(kvm_page_not_present)
-    KVM_REFLECT(20)
+        KVM_REFLECT(20)
 END(kvm_page_not_present)
 
     .org kvm_ia64_ivt+0x5100
 ///////////////////////////////////////////////////////////////////////
 // 0x5100 Entry 21 (size 16 bundles) Key Permission vector
 ENTRY(kvm_key_permission)
-    KVM_REFLECT(21)
+        KVM_REFLECT(21)
 END(kvm_key_permission)
 
     .org kvm_ia64_ivt+0x5200
 //////////////////////////////////////////////////////////////////////
 // 0x5200 Entry 22 (size 16 bundles) Instruction Access Rights (26)
 ENTRY(kvm_iaccess_rights)
-    KVM_REFLECT(22)
+        KVM_REFLECT(22)
 END(kvm_iaccess_rights)
 
     .org kvm_ia64_ivt+0x5300
 //////////////////////////////////////////////////////////////////////
 // 0x5300 Entry 23 (size 16 bundles) Data Access Rights (14,53)
 ENTRY(kvm_daccess_rights)
-    KVM_REFLECT(23)
+        KVM_REFLECT(23)
 END(kvm_daccess_rights)
 
     .org kvm_ia64_ivt+0x5400
 /////////////////////////////////////////////////////////////////////
 // 0x5400 Entry 24 (size 16 bundles) General Exception (5,32,34,36,38,39)
 ENTRY(kvm_general_exception)
-   KVM_REFLECT(24)
-   KVM_FAULT(24)
+        KVM_REFLECT(24)
+        KVM_FAULT(24)
 END(kvm_general_exception)
 
     .org kvm_ia64_ivt+0x5500
 //////////////////////////////////////////////////////////////////////
 // 0x5500 Entry 25 (size 16 bundles) Disabled FP-Register (35)
 ENTRY(kvm_disabled_fp_reg)
-    KVM_REFLECT(25)
+        KVM_REFLECT(25)
 END(kvm_disabled_fp_reg)
 
     .org kvm_ia64_ivt+0x5600
 ////////////////////////////////////////////////////////////////////
 // 0x5600 Entry 26 (size 16 bundles) Nat Consumption (11,23,37,50)
 ENTRY(kvm_nat_consumption)
-    KVM_REFLECT(26)
+        KVM_REFLECT(26)
 END(kvm_nat_consumption)
 
     .org kvm_ia64_ivt+0x5700
 /////////////////////////////////////////////////////////////////////
 // 0x5700 Entry 27 (size 16 bundles) Speculation (40)
 ENTRY(kvm_speculation_vector)
-    KVM_REFLECT(27)
+        KVM_REFLECT(27)
 END(kvm_speculation_vector)
 
     .org kvm_ia64_ivt+0x5800
 /////////////////////////////////////////////////////////////////////
 // 0x5800 Entry 28 (size 16 bundles) Reserved
-    KVM_FAULT(28)
+        KVM_FAULT(28)
 
     .org kvm_ia64_ivt+0x5900
 ///////////////////////////////////////////////////////////////////
 // 0x5900 Entry 29 (size 16 bundles) Debug (16,28,56)
 ENTRY(kvm_debug_vector)
-    KVM_FAULT(29)
+        KVM_FAULT(29)
 END(kvm_debug_vector)
 
     .org kvm_ia64_ivt+0x5a00
 ///////////////////////////////////////////////////////////////
 // 0x5a00 Entry 30 (size 16 bundles) Unaligned Reference (57)
 ENTRY(kvm_unaligned_access)
-    KVM_REFLECT(30)
+        KVM_REFLECT(30)
 END(kvm_unaligned_access)
 
     .org kvm_ia64_ivt+0x5b00
 //////////////////////////////////////////////////////////////////////
 // 0x5b00 Entry 31 (size 16 bundles) Unsupported Data Reference (57)
 ENTRY(kvm_unsupported_data_reference)
-    KVM_REFLECT(31)
+        KVM_REFLECT(31)
 END(kvm_unsupported_data_reference)
 
     .org kvm_ia64_ivt+0x5c00
 ////////////////////////////////////////////////////////////////////
 // 0x5c00 Entry 32 (size 16 bundles) Floating Point FAULT (65)
 ENTRY(kvm_floating_point_fault)
-    KVM_REFLECT(32)
+        KVM_REFLECT(32)
 END(kvm_floating_point_fault)
 
     .org kvm_ia64_ivt+0x5d00
 /////////////////////////////////////////////////////////////////////
 // 0x5d00 Entry 33 (size 16 bundles) Floating Point Trap (66)
 ENTRY(kvm_floating_point_trap)
-    KVM_REFLECT(33)
+        KVM_REFLECT(33)
 END(kvm_floating_point_trap)
 
     .org kvm_ia64_ivt+0x5e00
 //////////////////////////////////////////////////////////////////////
 // 0x5e00 Entry 34 (size 16 bundles) Lower Privilege Transfer Trap (66)
 ENTRY(kvm_lower_privilege_trap)
-    KVM_REFLECT(34)
+        KVM_REFLECT(34)
 END(kvm_lower_privilege_trap)
 
     .org kvm_ia64_ivt+0x5f00
 //////////////////////////////////////////////////////////////////////
 // 0x5f00 Entry 35 (size 16 bundles) Taken Branch Trap (68)
 ENTRY(kvm_taken_branch_trap)
-    KVM_REFLECT(35)
+        KVM_REFLECT(35)
 END(kvm_taken_branch_trap)
 
     .org kvm_ia64_ivt+0x6000
 ////////////////////////////////////////////////////////////////////
 // 0x6000 Entry 36 (size 16 bundles) Single Step Trap (69)
 ENTRY(kvm_single_step_trap)
-    KVM_REFLECT(36)
+        KVM_REFLECT(36)
 END(kvm_single_step_trap)
     .global kvm_virtualization_fault_back
     .org kvm_ia64_ivt+0x6100
 /////////////////////////////////////////////////////////////////////
 // 0x6100 Entry 37 (size 16 bundles) Virtualization Fault
 ENTRY(kvm_virtualization_fault)
-    mov r31=pr
-    adds r16 = VMM_VCPU_SAVED_GP_OFFSET,r21
-    ;;
-    st8 [r16] = r1
-    adds r17 = VMM_VCPU_GP_OFFSET, r21
-    ;;
-    ld8 r1 = [r17]
-    cmp.eq p6,p0=EVENT_MOV_FROM_AR,r24
-    cmp.eq p7,p0=EVENT_MOV_FROM_RR,r24
-    cmp.eq p8,p0=EVENT_MOV_TO_RR,r24
-    cmp.eq p9,p0=EVENT_RSM,r24
-    cmp.eq p10,p0=EVENT_SSM,r24
-    cmp.eq p11,p0=EVENT_MOV_TO_PSR,r24
-    cmp.eq p12,p0=EVENT_THASH,r24
-    (p6) br.dptk.many kvm_asm_mov_from_ar
-    (p7) br.dptk.many kvm_asm_mov_from_rr
-    (p8) br.dptk.many kvm_asm_mov_to_rr
-    (p9) br.dptk.many kvm_asm_rsm
-    (p10) br.dptk.many kvm_asm_ssm
-    (p11) br.dptk.many kvm_asm_mov_to_psr
-    (p12) br.dptk.many kvm_asm_thash
-    ;;
+        mov r31=pr
+        adds r16 = VMM_VCPU_SAVED_GP_OFFSET,r21
+        ;;
+        st8 [r16] = r1
+        adds r17 = VMM_VCPU_GP_OFFSET, r21
+        ;;
+        ld8 r1 = [r17]
+        cmp.eq p6,p0=EVENT_MOV_FROM_AR,r24
+        cmp.eq p7,p0=EVENT_MOV_FROM_RR,r24
+        cmp.eq p8,p0=EVENT_MOV_TO_RR,r24
+        cmp.eq p9,p0=EVENT_RSM,r24
+        cmp.eq p10,p0=EVENT_SSM,r24
+        cmp.eq p11,p0=EVENT_MOV_TO_PSR,r24
+        cmp.eq p12,p0=EVENT_THASH,r24
+(p6)    br.dptk.many kvm_asm_mov_from_ar
+(p7)    br.dptk.many kvm_asm_mov_from_rr
+(p8)    br.dptk.many kvm_asm_mov_to_rr
+(p9)    br.dptk.many kvm_asm_rsm
+(p10)   br.dptk.many kvm_asm_ssm
+(p11)   br.dptk.many kvm_asm_mov_to_psr
+(p12)   br.dptk.many kvm_asm_thash
+        ;;
 kvm_virtualization_fault_back:
-    adds r16 = VMM_VCPU_SAVED_GP_OFFSET,r21
-    ;;
-    ld8 r1 = [r16]
-    ;;
-    mov r19=37
-    adds r16 = VMM_VCPU_CAUSE_OFFSET,r21
-    adds r17 = VMM_VCPU_OPCODE_OFFSET,r21
-    ;;
-    st8 [r16] = r24
-    st8 [r17] = r25
-    ;;
-    cmp.ne p6,p0=EVENT_RFI, r24
-    (p6) br.sptk kvm_dispatch_virtualization_fault
-    ;;
-    adds r18=VMM_VPD_BASE_OFFSET,r21
-    ;;
-    ld8 r18=[r18]
-    ;;
-    adds r18=VMM_VPD_VIFS_OFFSET,r18
-    ;;
-    ld8 r18=[r18]
-    ;;
-    tbit.z p6,p0=r18,63
-    (p6) br.sptk kvm_dispatch_virtualization_fault
-    ;;
-    //if vifs.v=1 desert current register frame
-    alloc r18=ar.pfs,0,0,0,0
-    br.sptk kvm_dispatch_virtualization_fault
+        adds r16 = VMM_VCPU_SAVED_GP_OFFSET,r21
+        ;;
+        ld8 r1 = [r16]
+        ;;
+        mov r19=37
+        adds r16 = VMM_VCPU_CAUSE_OFFSET,r21
+        adds r17 = VMM_VCPU_OPCODE_OFFSET,r21
+        ;;
+        st8 [r16] = r24
+        st8 [r17] = r25
+        ;;
+        cmp.ne p6,p0=EVENT_RFI, r24
+(p6)    br.sptk kvm_dispatch_virtualization_fault
+        ;;
+        adds r18=VMM_VPD_BASE_OFFSET,r21
+        ;;
+        ld8 r18=[r18]
+        ;;
+        adds r18=VMM_VPD_VIFS_OFFSET,r18
+        ;;
+        ld8 r18=[r18]
+        ;;
+        tbit.z p6,p0=r18,63
+(p6)    br.sptk kvm_dispatch_virtualization_fault
+        ;;
+//if vifs.v=1 desert current register frame
+        alloc r18=ar.pfs,0,0,0,0
+        br.sptk kvm_dispatch_virtualization_fault
 END(kvm_virtualization_fault)
 
     .org kvm_ia64_ivt+0x6200
 //////////////////////////////////////////////////////////////
 // 0x6200 Entry 38 (size 16 bundles) Reserved
-    KVM_FAULT(38)
+        KVM_FAULT(38)
 
     .org kvm_ia64_ivt+0x6300
 /////////////////////////////////////////////////////////////////
 // 0x6300 Entry 39 (size 16 bundles) Reserved
-    KVM_FAULT(39)
+        KVM_FAULT(39)
 
     .org kvm_ia64_ivt+0x6400
 /////////////////////////////////////////////////////////////////
 // 0x6400 Entry 40 (size 16 bundles) Reserved
-    KVM_FAULT(40)
+        KVM_FAULT(40)
 
     .org kvm_ia64_ivt+0x6500
 //////////////////////////////////////////////////////////////////
 // 0x6500 Entry 41 (size 16 bundles) Reserved
-    KVM_FAULT(41)
+        KVM_FAULT(41)
 
     .org kvm_ia64_ivt+0x6600
 //////////////////////////////////////////////////////////////////
 // 0x6600 Entry 42 (size 16 bundles) Reserved
-    KVM_FAULT(42)
+        KVM_FAULT(42)
 
     .org kvm_ia64_ivt+0x6700
 //////////////////////////////////////////////////////////////////
 // 0x6700 Entry 43 (size 16 bundles) Reserved
-    KVM_FAULT(43)
+        KVM_FAULT(43)
 
     .org kvm_ia64_ivt+0x6800
 //////////////////////////////////////////////////////////////////
 // 0x6800 Entry 44 (size 16 bundles) Reserved
-    KVM_FAULT(44)
+        KVM_FAULT(44)
 
     .org kvm_ia64_ivt+0x6900
 ///////////////////////////////////////////////////////////////////
 // 0x6900 Entry 45 (size 16 bundles) IA-32 Exeception
 //(17,18,29,41,42,43,44,58,60,61,62,72,73,75,76,77)
 ENTRY(kvm_ia32_exception)
-    KVM_FAULT(45)
+        KVM_FAULT(45)
 END(kvm_ia32_exception)
 
     .org kvm_ia64_ivt+0x6a00
 ////////////////////////////////////////////////////////////////////
 // 0x6a00 Entry 46 (size 16 bundles) IA-32 Intercept  (30,31,59,70,71)
 ENTRY(kvm_ia32_intercept)
-    KVM_FAULT(47)
+        KVM_FAULT(47)
 END(kvm_ia32_intercept)
 
     .org kvm_ia64_ivt+0x6c00
 /////////////////////////////////////////////////////////////////////
 // 0x6c00 Entry 48 (size 16 bundles) Reserved
-    KVM_FAULT(48)
+        KVM_FAULT(48)
 
     .org kvm_ia64_ivt+0x6d00
 //////////////////////////////////////////////////////////////////////
 // 0x6d00 Entry 49 (size 16 bundles) Reserved
-    KVM_FAULT(49)
+        KVM_FAULT(49)
 
     .org kvm_ia64_ivt+0x6e00
 //////////////////////////////////////////////////////////////////////
 // 0x6e00 Entry 50 (size 16 bundles) Reserved
-    KVM_FAULT(50)
+        KVM_FAULT(50)
 
     .org kvm_ia64_ivt+0x6f00
 /////////////////////////////////////////////////////////////////////
 // 0x6f00 Entry 51 (size 16 bundles) Reserved
-    KVM_FAULT(52)
+        KVM_FAULT(52)
 
     .org kvm_ia64_ivt+0x7100
 ////////////////////////////////////////////////////////////////////
 // 0x7100 Entry 53 (size 16 bundles) Reserved
-    KVM_FAULT(53)
+        KVM_FAULT(53)
 
     .org kvm_ia64_ivt+0x7200
 /////////////////////////////////////////////////////////////////////
 // 0x7200 Entry 54 (size 16 bundles) Reserved
-    KVM_FAULT(54)
+        KVM_FAULT(54)
 
     .org kvm_ia64_ivt+0x7300
 ////////////////////////////////////////////////////////////////////
 // 0x7300 Entry 55 (size 16 bundles) Reserved
-    KVM_FAULT(55)
+        KVM_FAULT(55)
 
     .org kvm_ia64_ivt+0x7400
 ////////////////////////////////////////////////////////////////////
 // 0x7400 Entry 56 (size 16 bundles) Reserved
-    KVM_FAULT(56)
+        KVM_FAULT(56)
 
     .org kvm_ia64_ivt+0x7500
 /////////////////////////////////////////////////////////////////////
 // 0x7500 Entry 57 (size 16 bundles) Reserved
-    KVM_FAULT(57)
+        KVM_FAULT(57)
 
     .org kvm_ia64_ivt+0x7600
 /////////////////////////////////////////////////////////////////////
 // 0x7600 Entry 58 (size 16 bundles) Reserved
-    KVM_FAULT(58)
+        KVM_FAULT(58)
 
     .org kvm_ia64_ivt+0x7700
 ////////////////////////////////////////////////////////////////////
 // 0x7700 Entry 59 (size 16 bundles) Reserved
-    KVM_FAULT(59)
+        KVM_FAULT(59)
 
     .org kvm_ia64_ivt+0x7800
 ////////////////////////////////////////////////////////////////////
 // 0x7800 Entry 60 (size 16 bundles) Reserved
-    KVM_FAULT(60)
+        KVM_FAULT(60)
 
     .org kvm_ia64_ivt+0x7900
 /////////////////////////////////////////////////////////////////////
 // 0x7900 Entry 61 (size 16 bundles) Reserved
-    KVM_FAULT(61)
+        KVM_FAULT(61)
 
     .org kvm_ia64_ivt+0x7a00
 /////////////////////////////////////////////////////////////////////
 // 0x7a00 Entry 62 (size 16 bundles) Reserved
-    KVM_FAULT(62)
+        KVM_FAULT(62)
 
     .org kvm_ia64_ivt+0x7b00
 /////////////////////////////////////////////////////////////////////
 // 0x7b00 Entry 63 (size 16 bundles) Reserved
-    KVM_FAULT(63)
+        KVM_FAULT(63)
 
     .org kvm_ia64_ivt+0x7c00
 ////////////////////////////////////////////////////////////////////
 // 0x7c00 Entry 64 (size 16 bundles) Reserved
-    KVM_FAULT(64)
+        KVM_FAULT(64)
 
     .org kvm_ia64_ivt+0x7d00
 /////////////////////////////////////////////////////////////////////
 // 0x7d00 Entry 65 (size 16 bundles) Reserved
-    KVM_FAULT(65)
+        KVM_FAULT(65)
 
     .org kvm_ia64_ivt+0x7e00
 /////////////////////////////////////////////////////////////////////
 // 0x7e00 Entry 66 (size 16 bundles) Reserved
-    KVM_FAULT(66)
+        KVM_FAULT(66)
 
     .org kvm_ia64_ivt+0x7f00
 ////////////////////////////////////////////////////////////////////
 // 0x7f00 Entry 67 (size 16 bundles) Reserved
-    KVM_FAULT(67)
+        KVM_FAULT(67)
 
     .org kvm_ia64_ivt+0x8000
 // There is no particular reason for this code to be here, other than that
@@ -804,132 +808,128 @@ END(kvm_ia32_intercept)
 
 
 ENTRY(kvm_dtlb_miss_dispatch)
-    mov r19 = 2
-    KVM_SAVE_MIN_WITH_COVER_R19
-    alloc r14=ar.pfs,0,0,3,0
-    mov out0=cr.ifa
-    mov out1=r15
-    adds r3=8,r2                // set up second base pointer
-    ;;
-    ssm psr.ic
-    ;;
-    srlz.i                  // guarantee that interruption collection is on
-    ;;
-    //(p15) ssm psr.i               // restore psr.i
-    addl r14=@gprel(ia64_leave_hypervisor_prepare),gp
-    ;;
-    KVM_SAVE_REST
-    KVM_SAVE_EXTRA
-    mov rp=r14
-    ;;
-    adds out2=16,r12
-    br.call.sptk.many b6=kvm_page_fault
+        mov r19 = 2
+        KVM_SAVE_MIN_WITH_COVER_R19
+        alloc r14=ar.pfs,0,0,3,0
+        mov out0=cr.ifa
+        mov out1=r15
+        adds r3=8,r2                // set up second base pointer
+        ;;
+        ssm psr.ic
+        ;;
+        srlz.i     // guarantee that interruption collection is on
+        ;;
+        //(p15) ssm psr.i               // restore psr.i
+        addl r14=@gprel(ia64_leave_hypervisor_prepare),gp
+        ;;
+        KVM_SAVE_REST
+        KVM_SAVE_EXTRA
+        mov rp=r14
+        ;;
+        adds out2=16,r12
+        br.call.sptk.many b6=kvm_page_fault
 END(kvm_dtlb_miss_dispatch)
 
 ENTRY(kvm_itlb_miss_dispatch)
 
-    KVM_SAVE_MIN_WITH_COVER_R19
-    alloc r14=ar.pfs,0,0,3,0
-    mov out0=cr.ifa
-    mov out1=r15
-    adds r3=8,r2                // set up second base pointer
-    ;;
-    ssm psr.ic
-    ;;
-    srlz.i                  // guarantee that interruption collection is on
-    ;;
-    //(p15) ssm psr.i               // restore psr.i
-    addl r14=@gprel(ia64_leave_hypervisor),gp
-    ;;
-    KVM_SAVE_REST
-    mov rp=r14
-    ;;
-    adds out2=16,r12
-    br.call.sptk.many b6=kvm_page_fault
+        KVM_SAVE_MIN_WITH_COVER_R19
+        alloc r14=ar.pfs,0,0,3,0
+        mov out0=cr.ifa
+        mov out1=r15
+        adds r3=8,r2                // set up second base pointer
+        ;;
+        ssm psr.ic
+        ;;
+        srlz.i   // guarantee that interruption collection is on
+        ;;
+        //(p15) ssm psr.i               // restore psr.i
+        addl r14=@gprel(ia64_leave_hypervisor),gp
+        ;;
+        KVM_SAVE_REST
+        mov rp=r14
+        ;;
+        adds out2=16,r12
+        br.call.sptk.many b6=kvm_page_fault
 END(kvm_itlb_miss_dispatch)
 
 ENTRY(kvm_dispatch_reflection)
-    /*
-     * Input:
-     *  psr.ic: off
-     *  r19:    intr type (offset into ivt, see ia64_int.h)
-     *  r31:    contains saved predicates (pr)
-     */
-    KVM_SAVE_MIN_WITH_COVER_R19
-    alloc r14=ar.pfs,0,0,5,0
-    mov out0=cr.ifa
-    mov out1=cr.isr
-    mov out2=cr.iim
-    mov out3=r15
-    adds r3=8,r2                // set up second base pointer
-    ;;
-    ssm psr.ic
-    ;;
-    srlz.i                  // guarantee that interruption collection is on
-    ;;
-    //(p15) ssm psr.i               // restore psr.i
-    addl r14=@gprel(ia64_leave_hypervisor),gp
-    ;;
-    KVM_SAVE_REST
-    mov rp=r14
-    ;;
-    adds out4=16,r12
-    br.call.sptk.many b6=reflect_interruption
+/*
+ * Input:
+ *  psr.ic: off
+ *  r19:    intr type (offset into ivt, see ia64_int.h)
+ *  r31:    contains saved predicates (pr)
+ */
+        KVM_SAVE_MIN_WITH_COVER_R19
+        alloc r14=ar.pfs,0,0,5,0
+        mov out0=cr.ifa
+        mov out1=cr.isr
+        mov out2=cr.iim
+        mov out3=r15
+        adds r3=8,r2                // set up second base pointer
+        ;;
+        ssm psr.ic
+        ;;
+        srlz.i   // guarantee that interruption collection is on
+        ;;
+        //(p15) ssm psr.i               // restore psr.i
+        addl r14=@gprel(ia64_leave_hypervisor),gp
+        ;;
+        KVM_SAVE_REST
+        mov rp=r14
+        ;;
+        adds out4=16,r12
+        br.call.sptk.many b6=reflect_interruption
 END(kvm_dispatch_reflection)
 
 ENTRY(kvm_dispatch_virtualization_fault)
-    adds r16 = VMM_VCPU_CAUSE_OFFSET,r21
-    adds r17 = VMM_VCPU_OPCODE_OFFSET,r21
-    ;;
-    st8 [r16] = r24
-    st8 [r17] = r25
-    ;;
-    KVM_SAVE_MIN_WITH_COVER_R19
-    ;;
-    alloc r14=ar.pfs,0,0,2,0 // now it's safe (must be first in insn group!)
-    mov out0=r13        //vcpu
-    adds r3=8,r2                // set up second base pointer
-    ;;
-    ssm psr.ic
-    ;;
-    srlz.i                  // guarantee that interruption collection is on
-    ;;
-    //(p15) ssm psr.i               // restore psr.i
-    addl r14=@gprel(ia64_leave_hypervisor_prepare),gp
-    ;;
-    KVM_SAVE_REST
-    KVM_SAVE_EXTRA
-    mov rp=r14
-    ;;
-    adds out1=16,sp         //regs
-    br.call.sptk.many b6=kvm_emulate
+        adds r16 = VMM_VCPU_CAUSE_OFFSET,r21
+        adds r17 = VMM_VCPU_OPCODE_OFFSET,r21
+        ;;
+        st8 [r16] = r24
+        st8 [r17] = r25
+        ;;
+        KVM_SAVE_MIN_WITH_COVER_R19
+        ;;
+        alloc r14=ar.pfs,0,0,2,0 // (must be first in insn group!)
+        mov out0=r13        //vcpu
+        adds r3=8,r2                // set up second base pointer
+        ;;
+        ssm psr.ic
+        ;;
+        srlz.i    // guarantee that interruption collection is on
+        ;;
+        //(p15) ssm psr.i               // restore psr.i
+        addl r14=@gprel(ia64_leave_hypervisor_prepare),gp
+        ;;
+        KVM_SAVE_REST
+        KVM_SAVE_EXTRA
+        mov rp=r14
+        ;;
+        adds out1=16,sp         //regs
+        br.call.sptk.many b6=kvm_emulate
 END(kvm_dispatch_virtualization_fault)
 
 
 ENTRY(kvm_dispatch_interrupt)
-    KVM_SAVE_MIN_WITH_COVER_R19 // uses r31; defines r2 and r3
-    ;;
-    alloc r14=ar.pfs,0,0,1,0 // must be first in an insn group
-    //mov out0=cr.ivr           // pass cr.ivr as first arg
-    adds r3=8,r2                // set up second base pointer for SAVE_REST
-    ;;
-    ssm psr.ic
-    ;;
-    srlz.i
-    ;;
-    //(p15) ssm psr.i
-    addl r14=@gprel(ia64_leave_hypervisor),gp
-    ;;
-    KVM_SAVE_REST
-    mov rp=r14
-    ;;
-    mov out0=r13                // pass pointer to pt_regs as second arg
-    br.call.sptk.many b6=kvm_ia64_handle_irq
+        KVM_SAVE_MIN_WITH_COVER_R19     // uses r31; defines r2 and r3
+        ;;
+        alloc r14=ar.pfs,0,0,1,0 // must be first in an insn group
+        adds r3=8,r2            // set up second base pointer for SAVE_REST
+        ;;
+        ssm psr.ic
+        ;;
+        srlz.i
+        ;;
+        //(p15) ssm psr.i
+        addl r14=@gprel(ia64_leave_hypervisor),gp
+        ;;
+        KVM_SAVE_REST
+        mov rp=r14
+        ;;
+        mov out0=r13            // pass pointer to pt_regs as second arg
+        br.call.sptk.many b6=kvm_ia64_handle_irq
 END(kvm_dispatch_interrupt)
 
-
-
-
 GLOBAL_ENTRY(ia64_leave_nested)
         rsm psr.i
         ;;
@@ -1008,7 +1008,7 @@ GLOBAL_ENTRY(ia64_leave_nested)
         ;;
         ldf.fill f11=[r2]
 //      mov r18=r13
-//    mov r21=r13
+//      mov r21=r13
         adds r16=PT(CR_IPSR)+16,r12
         adds r17=PT(CR_IIP)+16,r12
         ;;
@@ -1058,138 +1058,135 @@ GLOBAL_ENTRY(ia64_leave_nested)
         rfi
 END(ia64_leave_nested)
 
-
-
 GLOBAL_ENTRY(ia64_leave_hypervisor_prepare)
-    /*
-     * work.need_resched etc. mustn't get changed
-     *by this CPU before it returns to
-    ;;
-     * user- or fsys-mode, hence we disable interrupts early on:
-     */
-    adds r2 = PT(R4)+16,r12
-    adds r3 = PT(R5)+16,r12
-    adds r8 = PT(EML_UNAT)+16,r12
-    ;;
-    ld8 r8 = [r8]
-    ;;
-    mov ar.unat=r8
-    ;;
-    ld8.fill r4=[r2],16    //load r4
-    ld8.fill r5=[r3],16    //load r5
-    ;;
-    ld8.fill r6=[r2]    //load r6
-    ld8.fill r7=[r3]    //load r7
-    ;;
+/*
+ * work.need_resched etc. mustn't get changed
+ *by this CPU before it returns to
+ * user- or fsys-mode, hence we disable interrupts early on:
+ */
+        adds r2 = PT(R4)+16,r12
+        adds r3 = PT(R5)+16,r12
+        adds r8 = PT(EML_UNAT)+16,r12
+        ;;
+        ld8 r8 = [r8]
+        ;;
+        mov ar.unat=r8
+        ;;
+        ld8.fill r4=[r2],16    //load r4
+        ld8.fill r5=[r3],16    //load r5
+        ;;
+        ld8.fill r6=[r2]    //load r6
+        ld8.fill r7=[r3]    //load r7
+        ;;
 END(ia64_leave_hypervisor_prepare)
 //fall through
 GLOBAL_ENTRY(ia64_leave_hypervisor)
-    rsm psr.i
-    ;;
-    br.call.sptk.many b0=leave_hypervisor_tail
-    ;;
-    adds r20=PT(PR)+16,r12
-    adds r8=PT(EML_UNAT)+16,r12
-    ;;
-    ld8 r8=[r8]
-    ;;
-    mov ar.unat=r8
-    ;;
-    lfetch [r20],PT(CR_IPSR)-PT(PR)
-    adds r2 = PT(B6)+16,r12
-    adds r3 = PT(B7)+16,r12
-    ;;
-    lfetch [r20]
-    ;;
-    ld8 r24=[r2],16        /* B6 */
-    ld8 r25=[r3],16        /* B7 */
-    ;;
-    ld8 r26=[r2],16        /* ar_csd */
-    ld8 r27=[r3],16        /* ar_ssd */
-    mov b6 = r24
-    ;;
-    ld8.fill r8=[r2],16
-    ld8.fill r9=[r3],16
-    mov b7 = r25
-    ;;
-    mov ar.csd = r26
-    mov ar.ssd = r27
-    ;;
-    ld8.fill r10=[r2],PT(R15)-PT(R10)
-    ld8.fill r11=[r3],PT(R14)-PT(R11)
-    ;;
-    ld8.fill r15=[r2],PT(R16)-PT(R15)
-    ld8.fill r14=[r3],PT(R17)-PT(R14)
-    ;;
-    ld8.fill r16=[r2],16
-    ld8.fill r17=[r3],16
-    ;;
-    ld8.fill r18=[r2],16
-    ld8.fill r19=[r3],16
-    ;;
-    ld8.fill r20=[r2],16
-    ld8.fill r21=[r3],16
-    ;;
-    ld8.fill r22=[r2],16
-    ld8.fill r23=[r3],16
-    ;;
-    ld8.fill r24=[r2],16
-    ld8.fill r25=[r3],16
-    ;;
-    ld8.fill r26=[r2],16
-    ld8.fill r27=[r3],16
-    ;;
-    ld8.fill r28=[r2],16
-    ld8.fill r29=[r3],16
-    ;;
-    ld8.fill r30=[r2],PT(F6)-PT(R30)
-    ld8.fill r31=[r3],PT(F7)-PT(R31)
-    ;;
-    rsm psr.i | psr.ic
-    // initiate turning off of interrupt and interruption collection
-    invala          // invalidate ALAT
-    ;;
-    srlz.i          // ensure interruption collection is off
-    ;;
-    bsw.0
-    ;;
-    adds r16 = PT(CR_IPSR)+16,r12
-    adds r17 = PT(CR_IIP)+16,r12
-    mov r21=r13         // get current
-    ;;
-    ld8 r31=[r16],16    // load cr.ipsr
-    ld8 r30=[r17],16    // load cr.iip
-    ;;
-    ld8 r29=[r16],16    // load cr.ifs
-    ld8 r28=[r17],16    // load ar.unat
-    ;;
-    ld8 r27=[r16],16    // load ar.pfs
-    ld8 r26=[r17],16    // load ar.rsc
-    ;;
-    ld8 r25=[r16],16    // load ar.rnat
-    ld8 r24=[r17],16    // load ar.bspstore
-    ;;
-    ld8 r23=[r16],16    // load predicates
-    ld8 r22=[r17],16    // load b0
-    ;;
-    ld8 r20=[r16],16    // load ar.rsc value for "loadrs"
-    ld8.fill r1=[r17],16    //load r1
-    ;;
-    ld8.fill r12=[r16],16    //load r12
-    ld8.fill r13=[r17],PT(R2)-PT(R13)    //load r13
-    ;;
-    ld8 r19=[r16],PT(R3)-PT(AR_FPSR)    //load ar_fpsr
-    ld8.fill r2=[r17],PT(AR_CCV)-PT(R2)    //load r2
-    ;;
-    ld8.fill r3=[r16]   //load r3
-    ld8 r18=[r17]       //load ar_ccv
-    ;;
-    mov ar.fpsr=r19
-    mov ar.ccv=r18
-    shr.u r18=r20,16
-    ;;
+        rsm psr.i
+        ;;
+        br.call.sptk.many b0=leave_hypervisor_tail
+        ;;
+        adds r20=PT(PR)+16,r12
+        adds r8=PT(EML_UNAT)+16,r12
+        ;;
+        ld8 r8=[r8]
+        ;;
+        mov ar.unat=r8
+        ;;
+        lfetch [r20],PT(CR_IPSR)-PT(PR)
+        adds r2 = PT(B6)+16,r12
+        adds r3 = PT(B7)+16,r12
+        ;;
+        lfetch [r20]
+        ;;
+        ld8 r24=[r2],16        /* B6 */
+        ld8 r25=[r3],16        /* B7 */
+        ;;
+        ld8 r26=[r2],16        /* ar_csd */
+        ld8 r27=[r3],16        /* ar_ssd */
+        mov b6 = r24
+        ;;
+        ld8.fill r8=[r2],16
+        ld8.fill r9=[r3],16
+        mov b7 = r25
+        ;;
+        mov ar.csd = r26
+        mov ar.ssd = r27
+        ;;
+        ld8.fill r10=[r2],PT(R15)-PT(R10)
+        ld8.fill r11=[r3],PT(R14)-PT(R11)
+        ;;
+        ld8.fill r15=[r2],PT(R16)-PT(R15)
+        ld8.fill r14=[r3],PT(R17)-PT(R14)
+        ;;
+        ld8.fill r16=[r2],16
+        ld8.fill r17=[r3],16
+        ;;
+        ld8.fill r18=[r2],16
+        ld8.fill r19=[r3],16
+        ;;
+        ld8.fill r20=[r2],16
+        ld8.fill r21=[r3],16
+        ;;
+        ld8.fill r22=[r2],16
+        ld8.fill r23=[r3],16
+        ;;
+        ld8.fill r24=[r2],16
+        ld8.fill r25=[r3],16
+        ;;
+        ld8.fill r26=[r2],16
+        ld8.fill r27=[r3],16
+        ;;
+        ld8.fill r28=[r2],16
+        ld8.fill r29=[r3],16
+        ;;
+        ld8.fill r30=[r2],PT(F6)-PT(R30)
+        ld8.fill r31=[r3],PT(F7)-PT(R31)
+        ;;
+        rsm psr.i | psr.ic
+        // initiate turning off of interrupt and interruption collection
+        invala          // invalidate ALAT
+        ;;
+        srlz.i          // ensure interruption collection is off
+        ;;
+        bsw.0
+        ;;
+        adds r16 = PT(CR_IPSR)+16,r12
+        adds r17 = PT(CR_IIP)+16,r12
+        mov r21=r13             // get current
+        ;;
+        ld8 r31=[r16],16    // load cr.ipsr
+        ld8 r30=[r17],16    // load cr.iip
+        ;;
+        ld8 r29=[r16],16    // load cr.ifs
+        ld8 r28=[r17],16    // load ar.unat
+        ;;
+        ld8 r27=[r16],16    // load ar.pfs
+        ld8 r26=[r17],16    // load ar.rsc
+        ;;
+        ld8 r25=[r16],16    // load ar.rnat
+        ld8 r24=[r17],16    // load ar.bspstore
+        ;;
+        ld8 r23=[r16],16    // load predicates
+        ld8 r22=[r17],16    // load b0
+        ;;
+        ld8 r20=[r16],16    // load ar.rsc value for "loadrs"
+        ld8.fill r1=[r17],16    //load r1
+        ;;
+        ld8.fill r12=[r16],16    //load r12
+        ld8.fill r13=[r17],PT(R2)-PT(R13)    //load r13
+        ;;
+        ld8 r19=[r16],PT(R3)-PT(AR_FPSR)    //load ar_fpsr
+        ld8.fill r2=[r17],PT(AR_CCV)-PT(R2)    //load r2
+        ;;
+        ld8.fill r3=[r16]       //load r3
+        ld8 r18=[r17]   //load ar_ccv
+        ;;
+        mov ar.fpsr=r19
+        mov ar.ccv=r18
+        shr.u r18=r20,16
+        ;;
 kvm_rbs_switch:
-    mov r19=96
+        mov r19=96
 
 kvm_dont_preserve_current_frame:
 /*
@@ -1201,76 +1198,76 @@ kvm_dont_preserve_current_frame:
 #   define pReturn      p7
 #   define Nregs        14
 
-    alloc loc0=ar.pfs,2,Nregs-2,2,0
-    shr.u loc1=r18,9            // RNaTslots <= floor(dirtySize / (64*8))
-    sub r19=r19,r18             // r19 = (physStackedSize + 8) - dirtySize
-    ;;
-    mov ar.rsc=r20              // load ar.rsc to be used for "loadrs"
-    shladd in0=loc1,3,r19
-    mov in1=0
-    ;;
-    TEXT_ALIGN(32)
+        alloc loc0=ar.pfs,2,Nregs-2,2,0
+        shr.u loc1=r18,9        // RNaTslots <= floor(dirtySize / (64*8))
+        sub r19=r19,r18         // r19 = (physStackedSize + 8) - dirtySize
+        ;;
+        mov ar.rsc=r20          // load ar.rsc to be used for "loadrs"
+        shladd in0=loc1,3,r19
+        mov in1=0
+        ;;
+        TEXT_ALIGN(32)
 kvm_rse_clear_invalid:
-    alloc loc0=ar.pfs,2,Nregs-2,2,0
-    cmp.lt pRecurse,p0=Nregs*8,in0
-    // if more than Nregs regs left to clear, (re)curse
-    add out0=-Nregs*8,in0
-    add out1=1,in1              // increment recursion count
-    mov loc1=0
-    mov loc2=0
-    ;;
-    mov loc3=0
-    mov loc4=0
-    mov loc5=0
-    mov loc6=0
-    mov loc7=0
+        alloc loc0=ar.pfs,2,Nregs-2,2,0
+        cmp.lt pRecurse,p0=Nregs*8,in0
+        // if more than Nregs regs left to clear, (re)curse
+        add out0=-Nregs*8,in0
+        add out1=1,in1          // increment recursion count
+        mov loc1=0
+        mov loc2=0
+        ;;
+        mov loc3=0
+        mov loc4=0
+        mov loc5=0
+        mov loc6=0
+        mov loc7=0
 (pRecurse) br.call.dptk.few b0=kvm_rse_clear_invalid
-    ;;
-    mov loc8=0
-    mov loc9=0
-    cmp.ne pReturn,p0=r0,in1
-    // if recursion count != 0, we need to do a br.ret
-    mov loc10=0
-    mov loc11=0
+        ;;
+        mov loc8=0
+        mov loc9=0
+        cmp.ne pReturn,p0=r0,in1
+        // if recursion count != 0, we need to do a br.ret
+        mov loc10=0
+        mov loc11=0
 (pReturn) br.ret.dptk.many b0
 
 #       undef pRecurse
 #       undef pReturn
 
 // loadrs has already been shifted
-    alloc r16=ar.pfs,0,0,0,0    // drop current register frame
-    ;;
-    loadrs
-    ;;
-    mov ar.bspstore=r24
-    ;;
-    mov ar.unat=r28
-    mov ar.rnat=r25
-    mov ar.rsc=r26
-    ;;
-    mov cr.ipsr=r31
-    mov cr.iip=r30
-    mov cr.ifs=r29
-    mov ar.pfs=r27
-    adds r18=VMM_VPD_BASE_OFFSET,r21
-    ;;
-    ld8 r18=[r18]   //vpd
-    adds r17=VMM_VCPU_ISR_OFFSET,r21
-    ;;
-    ld8 r17=[r17]
-    adds r19=VMM_VPD_VPSR_OFFSET,r18
-    ;;
-    ld8 r19=[r19]        //vpsr
-    mov r25=r18
-    adds r16= VMM_VCPU_GP_OFFSET,r21
-    ;;
-    ld8 r16= [r16] // Put gp in r24
-    movl r24=@gprel(ia64_vmm_entry)  // calculate return address
-    ;;
-    add  r24=r24,r16
-    ;;
-    br.sptk.many  kvm_vps_sync_write       // call the service
-    ;;
+        alloc r16=ar.pfs,0,0,0,0    // drop current register frame
+        ;;
+        loadrs
+        ;;
+        mov ar.bspstore=r24
+        ;;
+        mov ar.unat=r28
+        mov ar.rnat=r25
+        mov ar.rsc=r26
+        ;;
+        mov cr.ipsr=r31
+        mov cr.iip=r30
+        mov cr.ifs=r29
+        mov ar.pfs=r27
+        adds r18=VMM_VPD_BASE_OFFSET,r21
+        ;;
+        ld8 r18=[r18]   //vpd
+        adds r17=VMM_VCPU_ISR_OFFSET,r21
+        ;;
+        ld8 r17=[r17]
+        adds r19=VMM_VPD_VPSR_OFFSET,r18
+        ;;
+        ld8 r19=[r19]        //vpsr
+        mov r25=r18
+        adds r16= VMM_VCPU_GP_OFFSET,r21
+        ;;
+        ld8 r16= [r16] // Put gp in r24
+        movl r24=@gprel(ia64_vmm_entry)  // calculate return address
+        ;;
+        add  r24=r24,r16
+        ;;
+        br.sptk.many  kvm_vps_sync_write       // call the service
+        ;;
 END(ia64_leave_hypervisor)
 // fall through
 GLOBAL_ENTRY(ia64_vmm_entry)
@@ -1283,16 +1280,14 @@ GLOBAL_ENTRY(ia64_vmm_entry)
  *  r22:b0
  *  r23:predicate
  */
-    mov r24=r22
-    mov r25=r18
-    tbit.nz p1,p2 = r19,IA64_PSR_IC_BIT        // p1=vpsr.ic
-    (p1) br.cond.sptk.few kvm_vps_resume_normal
-    (p2) br.cond.sptk.many kvm_vps_resume_handler
-    ;;
+        mov r24=r22
+        mov r25=r18
+        tbit.nz p1,p2 = r19,IA64_PSR_IC_BIT        // p1=vpsr.ic
+(p1)    br.cond.sptk.few kvm_vps_resume_normal
+(p2)    br.cond.sptk.many kvm_vps_resume_handler
+        ;;
 END(ia64_vmm_entry)
 
-
-
 /*
  * extern u64 ia64_call_vsa(u64 proc, u64 arg1, u64 arg2,
  *                  u64 arg3, u64 arg4, u64 arg5,
@@ -1310,88 +1305,88 @@ psrsave =   loc2
 entry   =   loc3
 hostret =   r24
 
-    alloc   pfssave=ar.pfs,4,4,0,0
-    mov rpsave=rp
-    adds entry=VMM_VCPU_VSA_BASE_OFFSET, r13
-    ;;
-    ld8 entry=[entry]
-1:  mov hostret=ip
-    mov r25=in1         // copy arguments
-    mov r26=in2
-    mov r27=in3
-    mov psrsave=psr
-    ;;
-    tbit.nz p6,p0=psrsave,14    // IA64_PSR_I
-    tbit.nz p7,p0=psrsave,13    // IA64_PSR_IC
-    ;;
-    add hostret=2f-1b,hostret   // calculate return address
-    add entry=entry,in0
-    ;;
-    rsm psr.i | psr.ic
-    ;;
-    srlz.i
-    mov b6=entry
-    br.cond.sptk b6         // call the service
+        alloc   pfssave=ar.pfs,4,4,0,0
+        mov rpsave=rp
+        adds entry=VMM_VCPU_VSA_BASE_OFFSET, r13
+        ;;
+        ld8 entry=[entry]
+1:      mov hostret=ip
+        mov r25=in1         // copy arguments
+        mov r26=in2
+        mov r27=in3
+        mov psrsave=psr
+        ;;
+        tbit.nz p6,p0=psrsave,14    // IA64_PSR_I
+        tbit.nz p7,p0=psrsave,13    // IA64_PSR_IC
+        ;;
+        add hostret=2f-1b,hostret   // calculate return address
+        add entry=entry,in0
+        ;;
+        rsm psr.i | psr.ic
+        ;;
+        srlz.i
+        mov b6=entry
+        br.cond.sptk b6         // call the service
 2:
-    // Architectural sequence for enabling interrupts if necessary
+// Architectural sequence for enabling interrupts if necessary
 (p7)    ssm psr.ic
-    ;;
+        ;;
 (p7)    srlz.i
-    ;;
+        ;;
 //(p6)    ssm psr.i
-    ;;
-    mov rp=rpsave
-    mov ar.pfs=pfssave
-    mov r8=r31
-    ;;
-    srlz.d
-    br.ret.sptk rp
+        ;;
+        mov rp=rpsave
+        mov ar.pfs=pfssave
+        mov r8=r31
+        ;;
+        srlz.d
+        br.ret.sptk rp
 
 END(ia64_call_vsa)
 
 #define  INIT_BSPSTORE  ((4<<30)-(12<<20)-0x100)
 
 GLOBAL_ENTRY(vmm_reset_entry)
-    //set up ipsr, iip, vpd.vpsr, dcr
-    // For IPSR: it/dt/rt=1, i/ic=1, si=1, vm/bn=1
-    // For DCR: all bits 0
-    bsw.0
-    ;;
-    mov r21 =r13
-    adds r14=-VMM_PT_REGS_SIZE, r12
-    ;;
-    movl r6=0x501008826000      // IPSR dt/rt/it:1;i/ic:1, si:1, vm/bn:1
-    movl r10=0x8000000000000000
-    adds r16=PT(CR_IIP), r14
-    adds r20=PT(R1), r14
-    ;;
-    rsm psr.ic | psr.i
-    ;;
-    srlz.i
-    ;;
-    mov ar.rsc = 0
-    ;;
-    flushrs
-    ;;
-    mov ar.bspstore = 0
-    // clear BSPSTORE
-    ;;
-    mov cr.ipsr=r6
-    mov cr.ifs=r10
-    ld8 r4 = [r16] // Set init iip for first run.
-    ld8 r1 = [r20]
-    ;;
-    mov cr.iip=r4
-    adds r16=VMM_VPD_BASE_OFFSET,r13
-    ;;
-    ld8 r18=[r16]
-    ;;
-    adds r19=VMM_VPD_VPSR_OFFSET,r18
-    ;;
-    ld8 r19=[r19]
-    mov r17=r0
-    mov r22=r0
-    mov r23=r0
-    br.cond.sptk ia64_vmm_entry
-    br.ret.sptk  b0
+        //set up ipsr, iip, vpd.vpsr, dcr
+        // For IPSR: it/dt/rt=1, i/ic=1, si=1, vm/bn=1
+        // For DCR: all bits 0
+        bsw.0
+        ;;
+        mov r21 =r13
+        adds r14=-VMM_PT_REGS_SIZE, r12
+        ;;
+        movl r6=0x501008826000      // IPSR dt/rt/it:1;i/ic:1, si:1, vm/bn:1
+        movl r10=0x8000000000000000
+        adds r16=PT(CR_IIP), r14
+        adds r20=PT(R1), r14
+        ;;
+        rsm psr.ic | psr.i
+        ;;
+        srlz.i
+        ;;
+        mov ar.rsc = 0
+        ;;
+        flushrs
+        ;;
+        mov ar.bspstore = 0
+        // clear BSPSTORE
+        ;;
+        mov cr.ipsr=r6
+        mov cr.ifs=r10
+        ld8 r4 = [r16] // Set init iip for first run.
+        ld8 r1 = [r20]
+        ;;
+        mov cr.iip=r4
+        adds r16=VMM_VPD_BASE_OFFSET,r13
+        ;;
+        ld8 r18=[r16]
+        ;;
+        adds r19=VMM_VPD_VPSR_OFFSET,r18
+        ;;
+        ld8 r19=[r19]
+        mov r17=r0
+        mov r22=r0
+        mov r23=r0
+        br.cond.sptk ia64_vmm_entry
+        br.ret.sptk  b0
 END(vmm_reset_entry)
diff --git a/arch/ia64/kvm/vtlb.c b/arch/ia64/kvm/vtlb.c
index e22b93361e08..6b6307a3bd55 100644
--- a/arch/ia64/kvm/vtlb.c
+++ b/arch/ia64/kvm/vtlb.c
@@ -183,8 +183,8 @@ void mark_pages_dirty(struct kvm_vcpu *v, u64 pte, u64 ps)
         u64 i, dirty_pages = 1;
         u64 base_gfn = (pte&_PAGE_PPN_MASK) >> PAGE_SHIFT;
         spinlock_t *lock = __kvm_va(v->arch.dirty_log_lock_pa);
-        void *dirty_bitmap = (void *)v - (KVM_VCPU_OFS + v->vcpu_id * VCPU_SIZE)
-                                                + KVM_MEM_DIRTY_LOG_OFS;
+        void *dirty_bitmap = (void *)KVM_MEM_DIRTY_LOG_BASE;
+
         dirty_pages <<= ps <= PAGE_SHIFT ? 0 : ps - PAGE_SHIFT;
 
         vmm_spin_lock(lock);
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 054bcd9439aa..56e12903973c 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -692,7 +692,7 @@ int arch_add_memory(int nid, u64 start, u64 size)
         pgdat = NODE_DATA(nid);
 
         zone = pgdat->node_zones + ZONE_NORMAL;
-        ret = __add_pages(zone, start_pfn, nr_pages);
+        ret = __add_pages(nid, zone, start_pfn, nr_pages);
 
         if (ret)
                 printk("%s: Problem encountered in __add_pages() as ret=%d\n",
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 0c66dbdd1d72..66fd705e82c0 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -227,14 +227,14 @@ finish_up:
         return new_irq_info;
 }
 
-static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
+static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask)
 {
         struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
         nasid_t nasid;
         int slice;
 
-        nasid = cpuid_to_nasid(first_cpu(mask));
-        slice = cpuid_to_slice(first_cpu(mask));
+        nasid = cpuid_to_nasid(cpumask_first(mask));
+        slice = cpuid_to_slice(cpumask_first(mask));
 
         list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
                                  sn_irq_lh[irq], list)
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
index 83f190ffe350..ca553b0429ce 100644
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -151,7 +151,8 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry)
 }
 
 #ifdef CONFIG_SMP
-static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
+static void sn_set_msi_irq_affinity(unsigned int irq,
+                                    const struct cpumask *cpu_mask)
 {
         struct msi_msg msg;
         int slice;
@@ -164,7 +165,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
         struct sn_pcibus_provider *provider;
         unsigned int cpu;
 
-        cpu = first_cpu(cpu_mask);
+        cpu = cpumask_first(cpu_mask);
         sn_irq_info = sn_msi_info[irq].sn_irq_info;
         if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
                 return;
@@ -204,7 +205,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
         msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
 
         write_msi_msg(irq, &msg);
-        irq_desc[irq].affinity = cpu_mask;
+        irq_desc[irq].affinity = *cpu_mask;
 }
 #endif /* CONFIG_SMP */
 
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
index 636588e7e068..be339477f906 100644
--- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c
+++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
@@ -385,7 +385,6 @@ static int sn_topology_show(struct seq_file *s, void *d)
         int j;
         const char *slabname;
         int ordinal;
-        cpumask_t cpumask;
         char slice;
         struct cpuinfo_ia64 *c;
         struct sn_hwperf_port_info *ptdata;
@@ -473,23 +472,21 @@ static int sn_topology_show(struct seq_file *s, void *d)
                  * CPUs on this node, if any
                  */
                 if (!SN_HWPERF_IS_IONODE(obj)) {
-                        cpumask = node_to_cpumask(ordinal);
-                        for_each_online_cpu(i) {
-                                if (cpu_isset(i, cpumask)) {
-                                        slice = 'a' + cpuid_to_slice(i);
-                                        c = cpu_data(i);
-                                        seq_printf(s, "cpu %d %s%c local"
-                                                " freq %luMHz, arch ia64",
-                                                i, obj->location, slice,
-                                                c->proc_freq / 1000000);
-                                        for_each_online_cpu(j) {
-                                                seq_printf(s, j ? ":%d" : ", dist %d",
-                                                        node_distance(
+                        for_each_cpu_and(i, cpu_online_mask,
+                                         cpumask_of_node(ordinal)) {
+                                slice = 'a' + cpuid_to_slice(i);
+                                c = cpu_data(i);
+                                seq_printf(s, "cpu %d %s%c local"
+                                           " freq %luMHz, arch ia64",
+                                           i, obj->location, slice,
+                                           c->proc_freq / 1000000);
+                                for_each_online_cpu(j) {
+                                        seq_printf(s, j ? ":%d" : ", dist %d",
+                                                   node_distance(
                                                         cpu_to_node(i),
                                                         cpu_to_node(j)));
-                                        }
-                                        seq_putc(s, '\n');
                                 }
+                                seq_putc(s, '\n');
                         }
                 }
         }
diff --git a/arch/ia64/sn/kernel/tiocx.c b/arch/ia64/sn/kernel/tiocx.c
index a88eba3314d7..3f864238566d 100644
--- a/arch/ia64/sn/kernel/tiocx.c
+++ b/arch/ia64/sn/kernel/tiocx.c
@@ -206,8 +206,7 @@ cx_device_register(nasid_t nasid, int part_num, int mfg_num,
         cx_dev->dev.parent = NULL;
         cx_dev->dev.bus = &tiocx_bus_type;
         cx_dev->dev.release = tiocx_bus_release;
-        snprintf(cx_dev->dev.bus_id, BUS_ID_SIZE, "%d",
-                 cx_dev->cx_id.nasid);
+        dev_set_name(&cx_dev->dev, "%d", cx_dev->cx_id.nasid);
         device_register(&cx_dev->dev);
         get_device(&cx_dev->dev);
 
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index dbaed4a63815..cabba332cc48 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -10,6 +10,7 @@ config M32R
         default y
         select HAVE_IDE
         select HAVE_OPROFILE
+        select INIT_ALL_POSSIBLE
 
 config SBUS
         bool
@@ -273,7 +274,7 @@ config GENERIC_CALIBRATE_DELAY
         bool
         default y
 
-config SCHED_NO_NO_OMIT_FRAME_POINTER
+config SCHED_OMIT_FRAME_POINTER
         bool
         default y
 
diff --git a/arch/m32r/kernel/init_task.c b/arch/m32r/kernel/init_task.c
index 0d658dbb6766..016885c6f260 100644
--- a/arch/m32r/kernel/init_task.c
+++ b/arch/m32r/kernel/init_task.c
@@ -11,7 +11,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/m32r/kernel/smpboot.c b/arch/m32r/kernel/smpboot.c
index 39cb6da72dcb..2547d6c4a827 100644
--- a/arch/m32r/kernel/smpboot.c
+++ b/arch/m32r/kernel/smpboot.c
@@ -73,17 +73,11 @@ static unsigned int bsp_phys_id = -1;
 /* Bitmask of physically existing CPUs */
 physid_mask_t phys_cpu_present_map;
 
-/* Bitmask of currently online CPUs */
-cpumask_t cpu_online_map;
-EXPORT_SYMBOL(cpu_online_map);
-
 cpumask_t cpu_bootout_map;
 cpumask_t cpu_bootin_map;
 static cpumask_t cpu_callin_map;
 cpumask_t cpu_callout_map;
 EXPORT_SYMBOL(cpu_callout_map);
-cpumask_t cpu_possible_map = CPU_MASK_ALL;
-EXPORT_SYMBOL(cpu_possible_map);
 
 /* Per CPU bogomips and other parameters */
 struct cpuinfo_m32r cpu_data[NR_CPUS] __cacheline_aligned;
@@ -598,7 +592,7 @@ int setup_profiling_timer(unsigned int multiplier)
          * accounting. At that time they also adjust their APIC timers
          * accordingly.
          */
-        for (i = 0; i < NR_CPUS; ++i)
+        for_each_possible_cpu(i)
                 per_cpu(prof_multiplier, i) = multiplier;
 
         return 0;
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 836fb66f080d..c825bde17cb3 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -280,7 +280,6 @@ config M68060
 
 config MMU_MOTOROLA
         bool
-        depends on MMU && !MMU_SUN3
 
 config MMU_SUN3
         bool
diff --git a/arch/m68k/fpsp040/setox.S b/arch/m68k/fpsp040/setox.S
index 145af5447581..f1acf7e36d6b 100644
--- a/arch/m68k/fpsp040/setox.S
+++ b/arch/m68k/fpsp040/setox.S
@@ -36,9 +36,9 @@
 |       depending on their values, the program may run faster or slower --
 |       but no worse than 10% slower even in the extreme cases.
 |
-|       The program setoxm1 takes approximately ???/??? cycles for input
+|       The program setoxm1 takes approximately ??? / ??? cycles for input
 |       argument X, 0.25 <= |X| < 70log2. For |X| < 0.25, it takes
-|       approximately ???/??? cycles. For the less common arguments,
+|       approximately ??? / ??? cycles. For the less common arguments,
 |       depending on their values, the program may run faster or slower --
 |       but no worse than 10% slower even in the extreme cases.
 |
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index 3042c2bc8c58..632ce016014d 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -40,7 +40,6 @@
  * alignment requirements and potentially different initial
  * setup.
  */
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/m68k/mac/baboon.c b/arch/m68k/mac/baboon.c
index c7b25b0aacff..245d16d078ad 100644
--- a/arch/m68k/mac/baboon.c
+++ b/arch/m68k/mac/baboon.c
@@ -18,11 +18,14 @@
 #include <asm/macints.h>
 #include <asm/mac_baboon.h>
 
-/* #define DEBUG_BABOON */
 /* #define DEBUG_IRQS */
 
+extern void mac_enable_irq(unsigned int);
+extern void mac_disable_irq(unsigned int);
+
 int baboon_present;
 static volatile struct baboon *baboon;
+static unsigned char baboon_disabled;
 
 #if 0
 extern int macide_ack_intr(struct ata_channel *);
@@ -88,34 +91,51 @@ static irqreturn_t baboon_irq(int irq, void *dev_id)
 
 void __init baboon_register_interrupts(void)
 {
-        request_irq(IRQ_NUBUS_C, baboon_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
-                    "baboon", (void *) baboon);
+        baboon_disabled = 0;
+        request_irq(IRQ_NUBUS_C, baboon_irq, 0, "baboon", (void *)baboon);
 }
 
-void baboon_irq_enable(int irq) {
+/*
+ * The means for masking individual baboon interrupts remains a mystery, so
+ * enable the umbrella interrupt only when no baboon interrupt is disabled.
+ */
+
+void baboon_irq_enable(int irq)
+{
+        int irq_idx = IRQ_IDX(irq);
+
 #ifdef DEBUG_IRQUSE
         printk("baboon_irq_enable(%d)\n", irq);
 #endif
-        /* FIXME: figure out how to mask and unmask baboon interrupt sources */
-        enable_irq(IRQ_NUBUS_C);
+
+        baboon_disabled &= ~(1 << irq_idx);
+        if (!baboon_disabled)
+                mac_enable_irq(IRQ_NUBUS_C);
 }
 
-void baboon_irq_disable(int irq) {
+void baboon_irq_disable(int irq)
+{
+        int irq_idx = IRQ_IDX(irq);
+
 #ifdef DEBUG_IRQUSE
         printk("baboon_irq_disable(%d)\n", irq);
 #endif
-        disable_irq(IRQ_NUBUS_C);
+
+        baboon_disabled |= 1 << irq_idx;
+        if (baboon_disabled)
+                mac_disable_irq(IRQ_NUBUS_C);
 }
 
-void baboon_irq_clear(int irq) {
-        int irq_idx     = IRQ_IDX(irq);
+void baboon_irq_clear(int irq)
+{
+        int irq_idx = IRQ_IDX(irq);
 
         baboon->mb_ifr &= ~(1 << irq_idx);
 }
 
 int baboon_irq_pending(int irq)
 {
-        int irq_idx     = IRQ_IDX(irq);
+        int irq_idx = IRQ_IDX(irq);
 
         return baboon->mb_ifr & (1 << irq_idx);
 }
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index c45e18449f32..8819b97be324 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -162,10 +162,7 @@ void __init config_mac(void)
         mach_init_IRQ = mac_init_IRQ;
         mach_get_model = mac_get_model;
         mach_gettimeoffset = mac_gettimeoffset;
-#warning move to adb/via init
-#if 0
         mach_hwclk = mac_hwclk;
-#endif
         mach_set_clock_mmss = mac_set_clock_mmss;
         mach_reset = mac_reset;
         mach_halt = mac_poweroff;
diff --git a/arch/m68k/mac/debug.c b/arch/m68k/mac/debug.c
index 2165740786a5..65dd77a742a3 100644
--- a/arch/m68k/mac/debug.c
+++ b/arch/m68k/mac/debug.c
@@ -24,7 +24,6 @@
 #define BOOTINFO_COMPAT_1_0
 #include <asm/setup.h>
 #include <asm/bootinfo.h>
-#include <asm/machw.h>
 #include <asm/macints.h>
 
 extern unsigned long mac_videobase;
diff --git a/arch/m68k/mac/macints.c b/arch/m68k/mac/macints.c
index ecddac4a02b9..82e560c076ce 100644
--- a/arch/m68k/mac/macints.c
+++ b/arch/m68k/mac/macints.c
@@ -127,7 +127,6 @@
 #include <asm/irq.h>
 #include <asm/traps.h>
 #include <asm/bootinfo.h>
-#include <asm/machw.h>
 #include <asm/macintosh.h>
 #include <asm/mac_via.h>
 #include <asm/mac_psc.h>
@@ -215,8 +214,8 @@ irqreturn_t mac_debug_handler(int, void *);
 
 /* #define DEBUG_MACINTS */
 
-static void mac_enable_irq(unsigned int irq);
-static void mac_disable_irq(unsigned int irq);
+void mac_enable_irq(unsigned int irq);
+void mac_disable_irq(unsigned int irq);
 
 static struct irq_controller mac_irq_controller = {
         .name           = "mac",
@@ -275,7 +274,7 @@ void __init mac_init_IRQ(void)
  * These routines are just dispatchers to the VIA/OSS/PSC routines.
  */
 
-static void mac_enable_irq(unsigned int irq)
+void mac_enable_irq(unsigned int irq)
 {
         int irq_src = IRQ_SRC(irq);
 
@@ -308,7 +307,7 @@ static void mac_enable_irq(unsigned int irq)
         }
 }
 
-static void mac_disable_irq(unsigned int irq)
+void mac_disable_irq(unsigned int irq)
 {
         int irq_src = IRQ_SRC(irq);
 
diff --git a/arch/m68k/mac/misc.c b/arch/m68k/mac/misc.c
index 56d1f5676ade..a44c7086ab39 100644
--- a/arch/m68k/mac/misc.c
+++ b/arch/m68k/mac/misc.c
@@ -93,7 +93,7 @@ static void cuda_write_pram(int offset, __u8 data)
 #define cuda_write_pram NULL
 #endif
 
-#ifdef CONFIG_ADB_PMU68K
+#if 0 /* def CONFIG_ADB_PMU68K */
 static long pmu_read_time(void)
 {
         struct adb_request req;
@@ -148,7 +148,7 @@ static void pmu_write_pram(int offset, __u8 data)
 #define pmu_write_pram NULL
 #endif
 
-#ifdef CONFIG_ADB_MACIISI
+#if 0 /* def CONFIG_ADB_MACIISI */
 extern int maciisi_request(struct adb_request *req,
                         void (*done)(struct adb_request *), int nbytes, ...);
 
@@ -717,13 +717,18 @@ int mac_hwclk(int op, struct rtc_time *t)
                 unmktime(now, 0,
                          &t->tm_year, &t->tm_mon, &t->tm_mday,
                          &t->tm_hour, &t->tm_min, &t->tm_sec);
+#if 0
                 printk("mac_hwclk: read %04d-%02d-%-2d %02d:%02d:%02d\n",
-                        t->tm_year + 1900, t->tm_mon + 1, t->tm_mday, t->tm_hour, t->tm_min, t->tm_sec);
+                        t->tm_year + 1900, t->tm_mon + 1, t->tm_mday,
+                        t->tm_hour, t->tm_min, t->tm_sec);
+#endif
         } else { /* write */
+#if 0
                 printk("mac_hwclk: tried to write %04d-%02d-%-2d %02d:%02d:%02d\n",
-                        t->tm_year + 1900, t->tm_mon + 1, t->tm_mday, t->tm_hour, t->tm_min, t->tm_sec);
+                        t->tm_year + 1900, t->tm_mon + 1, t->tm_mday,
+                        t->tm_hour, t->tm_min, t->tm_sec);
+#endif
 
-#if 0   /* it trashes my rtc */
                 now = mktime(t->tm_year + 1900, t->tm_mon + 1, t->tm_mday,
                              t->tm_hour, t->tm_min, t->tm_sec);
 
@@ -742,7 +747,6 @@ int mac_hwclk(int op, struct rtc_time *t)
                 case MAC_ADB_IISI:
                         maciisi_write_time(now);
                 }
-#endif
         }
         return 0;
 }
diff --git a/arch/m68k/mac/oss.c b/arch/m68k/mac/oss.c
index 43d83e054b8e..8426501119ca 100644
--- a/arch/m68k/mac/oss.c
+++ b/arch/m68k/mac/oss.c
@@ -21,7 +21,6 @@
 #include <linux/init.h>
 
 #include <asm/bootinfo.h>
-#include <asm/machw.h>
 #include <asm/macintosh.h>
 #include <asm/macints.h>
 #include <asm/mac_via.h>
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index 1bdb03c73c0f..f01d418e64fe 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -32,15 +32,10 @@
 #include <asm/bootinfo.h>
 #include <asm/macintosh.h>
 #include <asm/macints.h>
-#include <asm/machw.h>
 #include <asm/mac_via.h>
 #include <asm/mac_psc.h>
 
 volatile __u8 *via1, *via2;
-#if 0
-/* See note in mac_via.h about how this is possibly not useful */
-volatile long *via_memory_bogon=(long *)&via_memory_bogon;
-#endif
 int rbv_present;
 int via_alt_mapping;
 EXPORT_SYMBOL(via_alt_mapping);
@@ -66,7 +61,7 @@ static int gIER,gIFR,gBufA,gBufB;
 #define MAC_CLOCK_LOW           (MAC_CLOCK_TICK&0xFF)
 #define MAC_CLOCK_HIGH          (MAC_CLOCK_TICK>>8)
 
-/* To disable a NuBus slot on Quadras we make the slot IRQ lines outputs, set
+/* To disable a NuBus slot on Quadras we make that slot IRQ line an output set
  * high. On RBV we just use the slot interrupt enable register. On Macs with
  * genuine VIA chips we must use nubus_disabled to keep track of disabled slot
  * interrupts. When any slot IRQ is disabled we mask the (edge triggered) CA1
@@ -180,7 +175,7 @@ void __init via_init(void)
         via1[vT1CH] = 0;
         via1[vT2CL] = 0;
         via1[vT2CH] = 0;
-        via1[vACR] &= 0x3F;
+        via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
         via1[vACR] &= ~0x03; /* disable port A & B latches */
 
         /*
@@ -203,40 +198,41 @@ void __init via_init(void)
 
         /* Everything below this point is VIA2/RBV only... */
 
-        if (oss_present) return;
+        if (oss_present)
+                return;
 
-#if 1
         /* Some machines support an alternate IRQ mapping that spreads  */
         /* Ethernet and Sound out to their own autolevel IRQs and moves */
         /* VIA1 to level 6. A/UX uses this mapping and we do too.  Note */
         /* that the IIfx emulates this alternate mapping using the OSS. */
 
-        switch(macintosh_config->ident) {
-                case MAC_MODEL_P475:
-                case MAC_MODEL_P475F:
-                case MAC_MODEL_P575:
-                case MAC_MODEL_Q605:
-                case MAC_MODEL_Q605_ACC:
-                case MAC_MODEL_C610:
-                case MAC_MODEL_Q610:
-                case MAC_MODEL_Q630:
-                case MAC_MODEL_C650:
-                case MAC_MODEL_Q650:
-                case MAC_MODEL_Q700:
-                case MAC_MODEL_Q800:
-                case MAC_MODEL_Q900:
-                case MAC_MODEL_Q950:
+        via_alt_mapping = 0;
+        if (macintosh_config->via_type == MAC_VIA_QUADRA)
+                switch (macintosh_config->ident) {
+                case MAC_MODEL_C660:
+                case MAC_MODEL_Q840:
+                        /* not applicable */
+                        break;
+                case MAC_MODEL_P588:
+                case MAC_MODEL_TV:
+                case MAC_MODEL_PB140:
+                case MAC_MODEL_PB145:
+                case MAC_MODEL_PB160:
+                case MAC_MODEL_PB165:
+                case MAC_MODEL_PB165C:
+                case MAC_MODEL_PB170:
+                case MAC_MODEL_PB180:
+                case MAC_MODEL_PB180C:
+                case MAC_MODEL_PB190:
+                case MAC_MODEL_PB520:
+                        /* not yet tested */
+                        break;
+                default:
                         via_alt_mapping = 1;
                         via1[vDirB] |= 0x40;
                         via1[vBufB] &= ~0x40;
                         break;
-                default:
-                        via_alt_mapping = 0;
-                        break;
-        }
-#else
-        via_alt_mapping = 0;
-#endif
+                }
 
         /*
          * Now initialize VIA2. For RBV we just kill all interrupts;
@@ -252,14 +248,17 @@ void __init via_init(void)
                 via2[vT1CH] = 0;
                 via2[vT2CL] = 0;
                 via2[vT2CH] = 0;
-                via2[vACR] &= 0x3F;
+                via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
                 via2[vACR] &= ~0x03; /* disable port A & B latches */
         }
 
         /*
-         * Set vPCR for SCSI interrupts (but not on RBV)
+         * Set vPCR for control line interrupts (but not on RBV)
          */
         if (!rbv_present) {
+                /* For all VIA types, CA1 (SLOTS IRQ) and CB1 (ASC IRQ)
+                 * are made negative edge triggered here.
+                 */
                 if (macintosh_config->scsi_type == MAC_SCSI_OLD) {
                         /* CB2 (IRQ) indep. input, positive edge */
                         /* CA2 (DRQ) indep. input, positive edge */
@@ -466,21 +465,6 @@ irqreturn_t via1_irq(int irq, void *dev_id)
                 ++irq_num;
                 irq_bit <<= 1;
         } while (events >= irq_bit);
-
-#if 0 /* freakin' pmu is doing weird stuff */
-        if (!oss_present) {
-                /* This (still) seems to be necessary to get IDE
-                   working.  However, if you enable VBL interrupts,
-                   you're screwed... */
-                /* FIXME: should we check the SLOTIRQ bit before
-                   pulling this stunt? */
-                /* No, it won't be set. that's why we're doing this. */
-                via_irq_disable(IRQ_MAC_NUBUS);
-                via_irq_clear(IRQ_MAC_NUBUS);
-                m68k_handle_int(IRQ_MAC_NUBUS);
-                via_irq_enable(IRQ_MAC_NUBUS);
-        }
-#endif
         return IRQ_HANDLED;
 }
 
diff --git a/arch/m68knommu/include/asm/atomic.h b/arch/m68knommu/include/asm/atomic.h
index d5632a305dae..6bb674855a3f 100644
--- a/arch/m68knommu/include/asm/atomic.h
+++ b/arch/m68knommu/include/asm/atomic.h
@@ -1,6 +1,7 @@
 #ifndef __ARCH_M68KNOMMU_ATOMIC__
 #define __ARCH_M68KNOMMU_ATOMIC__
 
+#include <linux/types.h>
 #include <asm/system.h>
 
 /*
@@ -12,7 +13,6 @@
  * We do not have SMP m68k systems, so we don't have to deal with that.
  */
 
-typedef struct { int counter; } atomic_t;
 #define ATOMIC_INIT(i)  { (i) }
 
 #define atomic_read(v)          ((v)->counter)
diff --git a/arch/m68knommu/include/asm/bitops.h b/arch/m68knommu/include/asm/bitops.h
index 6f3685eab44c..9d3cbe5fad1e 100644
--- a/arch/m68knommu/include/asm/bitops.h
+++ b/arch/m68knommu/include/asm/bitops.h
@@ -331,6 +331,7 @@ found_middle:
 #endif /* __KERNEL__ */
 
 #include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
 #include <asm-generic/bitops/fls64.h>
 
 #endif /* _M68KNOMMU_BITOPS_H */
diff --git a/arch/m68knommu/kernel/init_task.c b/arch/m68knommu/kernel/init_task.c
index 344c01aede08..fe282de1d596 100644
--- a/arch/m68knommu/kernel/init_task.c
+++ b/arch/m68knommu/kernel/init_task.c
@@ -12,7 +12,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/m68knommu/platform/coldfire/pit.c b/arch/m68knommu/platform/coldfire/pit.c
index c5b916700b22..2a12e7fa9748 100644
--- a/arch/m68knommu/platform/coldfire/pit.c
+++ b/arch/m68knommu/platform/coldfire/pit.c
@@ -156,7 +156,7 @@ void hw_timer_init(void)
 {
         u32 imr;
 
-        cf_pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
+        cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id());
         cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32);
         cf_pit_clockevent.max_delta_ns =
                 clockevent_delta2ns(0xFFFF, &cf_pit_clockevent);
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f4af967a6b30..a5255e7c79e0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -653,7 +653,7 @@ config GENERIC_CMOS_UPDATE
         bool
         default y
 
-config SCHED_NO_NO_OMIT_FRAME_POINTER
+config SCHED_OMIT_FRAME_POINTER
         bool
         default y
 
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 1232be3885b0..c996c3b4d074 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -15,13 +15,12 @@
 #define _ASM_ATOMIC_H
 
 #include <linux/irqflags.h>
+#include <linux/types.h>
 #include <asm/barrier.h>
 #include <asm/cpu-features.h>
 #include <asm/war.h>
 #include <asm/system.h>
 
-typedef struct { volatile int counter; } atomic_t;
-
 #define ATOMIC_INIT(i)    { (i) }
 
 /*
@@ -404,8 +403,6 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
 
 #ifdef CONFIG_64BIT
 
-typedef struct { volatile long counter; } atomic64_t;
-
 #define ATOMIC64_INIT(i)    { (i) }
 
 /*
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index a58f0eecc68f..abc62aa744ac 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -49,7 +49,8 @@ static inline void smtc_im_ack_irq(unsigned int irq)
 #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
 #include <linux/cpumask.h>
 
-extern void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity);
+extern void plat_set_irq_affinity(unsigned int irq,
+                                  const struct cpumask *affinity);
 extern void smtc_forward_irq(unsigned int irq);
 
 /*
diff --git a/arch/mips/include/asm/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h
index 7785bec732f2..55d481569a1f 100644
--- a/arch/mips/include/asm/mach-ip27/topology.h
+++ b/arch/mips/include/asm/mach-ip27/topology.h
@@ -25,11 +25,13 @@ extern struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
 #define cpu_to_node(cpu)        (sn_cpu_info[(cpu)].p_nodeid)
 #define parent_node(node)       (node)
 #define node_to_cpumask(node)   (hub_data(node)->h_cpus)
-#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node)))
+#define cpumask_of_node(node)   (&hub_data(node)->h_cpus)
+#define node_to_first_cpu(node) (cpumask_first(cpumask_of_node(node)))
 struct pci_bus;
 extern int pcibus_to_node(struct pci_bus *);
 
 #define pcibus_to_cpumask(bus)  (cpu_online_map)
+#define cpumask_of_pcibus(bus)  (cpu_online_mask)
 
 extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
 
@@ -37,7 +39,6 @@ extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
 
 /* sched_domains SD_NODE_INIT for SGI IP27 machines */
 #define SD_NODE_INIT (struct sched_domain) {            \
-        .span                   = CPU_MASK_NONE,        \
         .parent                 = NULL,                 \
         .child                  = NULL,                 \
         .groups                 = NULL,                 \
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index 0ff5b523ea77..86557b5d1b3f 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -38,9 +38,6 @@ extern int __cpu_logical_map[NR_CPUS];
 #define SMP_RESCHEDULE_YOURSELF 0x1     /* XXX braindead */
 #define SMP_CALL_FUNCTION       0x2
 
-extern cpumask_t phys_cpu_present_map;
-#define cpu_possible_map        phys_cpu_present_map
-
 extern void asmlinkage smp_bootstrap(void);
 
 /*
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index d7f8a782aae4..03965cb1b252 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -146,7 +146,7 @@ void __init plat_time_init(void)
 
         BUG_ON(HZ != 100);
 
-        cd->cpumask             = cpumask_of_cpu(cpu);
+        cd->cpumask             = cpumask_of(cpu);
         clockevents_register_device(cd);
         action->dev_id = cd;
         setup_irq(JAZZ_TIMER_IRQ, action);
diff --git a/arch/mips/kernel/cevt-bcm1480.c b/arch/mips/kernel/cevt-bcm1480.c
index 0a57f86945f1..b820661678b0 100644
--- a/arch/mips/kernel/cevt-bcm1480.c
+++ b/arch/mips/kernel/cevt-bcm1480.c
@@ -126,7 +126,7 @@ void __cpuinit sb1480_clockevent_init(void)
         cd->min_delta_ns        = clockevent_delta2ns(2, cd);
         cd->rating              = 200;
         cd->irq                 = irq;
-        cd->cpumask             = cpumask_of_cpu(cpu);
+        cd->cpumask             = cpumask_of(cpu);
         cd->set_next_event      = sibyte_next_event;
         cd->set_mode            = sibyte_set_mode;
         clockevents_register_device(cd);
@@ -148,6 +148,6 @@ void __cpuinit sb1480_clockevent_init(void)
         action->name    = name;
         action->dev_id  = cd;
 
-        irq_set_affinity(irq, cpumask_of_cpu(cpu));
+        irq_set_affinity(irq, cpumask_of(cpu));
         setup_irq(irq, action);
 }
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c
index df4acb68bfb5..1ada45ea0700 100644
--- a/arch/mips/kernel/cevt-ds1287.c
+++ b/arch/mips/kernel/cevt-ds1287.c
@@ -88,7 +88,6 @@ static void ds1287_event_handler(struct clock_event_device *dev)
 static struct clock_event_device ds1287_clockevent = {
         .name           = "ds1287",
         .features       = CLOCK_EVT_FEAT_PERIODIC,
-        .cpumask        = CPU_MASK_CPU0,
         .set_next_event = ds1287_set_next_event,
         .set_mode       = ds1287_set_mode,
         .event_handler  = ds1287_event_handler,
@@ -122,6 +121,7 @@ int __init ds1287_clockevent_init(int irq)
         clockevent_set_clock(cd, 32768);
         cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
         cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
+        cd->cpumask = cpumask_of(0);
 
         clockevents_register_device(&ds1287_clockevent);
 
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index 6e2f58520afb..e9b787feedcb 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -96,7 +96,6 @@ static void gt641xx_timer0_event_handler(struct clock_event_device *dev)
 static struct clock_event_device gt641xx_timer0_clockevent = {
         .name           = "gt641xx-timer0",
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .cpumask        = CPU_MASK_CPU0,
         .irq            = GT641XX_TIMER0_IRQ,
         .set_next_event = gt641xx_timer0_set_next_event,
         .set_mode       = gt641xx_timer0_set_mode,
@@ -132,6 +131,7 @@ static int __init gt641xx_timer0_clockevent_init(void)
         clockevent_set_clock(cd, gt641xx_base_clock);
         cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
         cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
+        cd->cpumask = cpumask_of(0);
 
         clockevents_register_device(&gt641xx_timer0_clockevent);
 
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 4a4c59f2737a..e1ec83b68031 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -195,7 +195,7 @@ int __cpuinit mips_clockevent_init(void)
 
         cd->rating              = 300;
         cd->irq                 = irq;
-        cd->cpumask             = cpumask_of_cpu(cpu);
+        cd->cpumask             = cpumask_of(cpu);
         cd->set_next_event      = mips_next_event;
         cd->set_mode            = mips_set_clock_mode;
         cd->event_handler       = mips_event_handler;
diff --git a/arch/mips/kernel/cevt-sb1250.c b/arch/mips/kernel/cevt-sb1250.c
index 63ac3ad462bc..a2eebaafda52 100644
--- a/arch/mips/kernel/cevt-sb1250.c
+++ b/arch/mips/kernel/cevt-sb1250.c
@@ -125,7 +125,7 @@ void __cpuinit sb1250_clockevent_init(void)
         cd->min_delta_ns        = clockevent_delta2ns(2, cd);
         cd->rating              = 200;
         cd->irq                 = irq;
-        cd->cpumask             = cpumask_of_cpu(cpu);
+        cd->cpumask             = cpumask_of(cpu);
         cd->set_next_event      = sibyte_next_event;
         cd->set_mode            = sibyte_set_mode;
         clockevents_register_device(cd);
@@ -147,6 +147,6 @@ void __cpuinit sb1250_clockevent_init(void)
         action->name    = name;
         action->dev_id  = cd;
 
-        irq_set_affinity(irq, cpumask_of_cpu(cpu));
+        irq_set_affinity(irq, cpumask_of(cpu));
         setup_irq(irq, action);
 }
diff --git a/arch/mips/kernel/cevt-smtc.c b/arch/mips/kernel/cevt-smtc.c
index 5162fe4b5952..6d45e24db5bf 100644
--- a/arch/mips/kernel/cevt-smtc.c
+++ b/arch/mips/kernel/cevt-smtc.c
@@ -292,7 +292,7 @@ int __cpuinit mips_clockevent_init(void)
 
         cd->rating              = 300;
         cd->irq                 = irq;
-        cd->cpumask             = cpumask_of_cpu(cpu);
+        cd->cpumask             = cpumask_of(cpu);
         cd->set_next_event      = mips_next_event;
         cd->set_mode            = mips_set_clock_mode;
         cd->event_handler       = mips_event_handler;
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c
index b5fc4eb412d2..eccf7d6096bd 100644
--- a/arch/mips/kernel/cevt-txx9.c
+++ b/arch/mips/kernel/cevt-txx9.c
@@ -112,7 +112,6 @@ static struct clock_event_device txx9tmr_clock_event_device = {
         .name           = "TXx9",
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .rating         = 200,
-        .cpumask        = CPU_MASK_CPU0,
         .set_mode       = txx9tmr_set_mode,
         .set_next_event = txx9tmr_set_next_event,
 };
@@ -150,6 +149,7 @@ void __init txx9_clockevent_init(unsigned long baseaddr, int irq,
                 clockevent_delta2ns(0xffffffff >> (32 - TXX9_TIMER_BITS), cd);
         cd->min_delta_ns = clockevent_delta2ns(0xf, cd);
         cd->irq = irq;
+        cd->cpumask = cpumask_of(0),
         clockevents_register_device(cd);
         setup_irq(irq, &txx9tmr_irq);
         printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n",
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index b6ac55162b9a..f4d187825f96 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -115,7 +115,7 @@ void __init setup_pit_timer(void)
          * Start pit with the boot cpu mask and make it global after the
          * IO_APIC has been initialized.
          */
-        cd->cpumask = cpumask_of_cpu(cpu);
+        cd->cpumask = cpumask_of(cpu);
         clockevent_set_clock(cd, CLOCK_TICK_RATE);
         cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
         cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
diff --git a/arch/mips/kernel/init_task.c b/arch/mips/kernel/init_task.c
index d72487ad7c15..149cd914526e 100644
--- a/arch/mips/kernel/init_task.c
+++ b/arch/mips/kernel/init_task.c
@@ -9,7 +9,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index f0a4bb19e096..494a49a317e9 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -155,7 +155,7 @@ static void gic_unmask_irq(unsigned int irq)
 
 static DEFINE_SPINLOCK(gic_lock);
 
-static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
+static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
 {
         cpumask_t       tmp = CPU_MASK_NONE;
         unsigned long   flags;
@@ -164,7 +164,7 @@ static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
         pr_debug(KERN_DEBUG "%s called\n", __func__);
         irq -= _irqbase;
 
-        cpus_and(tmp, cpumask, cpu_online_map);
+        cpumask_and(&tmp, cpumask, cpu_online_mask);
         if (cpus_empty(tmp))
                 return;
 
@@ -187,7 +187,7 @@ static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
                 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
 
         }
-        irq_desc[irq].affinity = cpumask;
+        irq_desc[irq].affinity = *cpumask;
         spin_unlock_irqrestore(&gic_lock, flags);
 
 }
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index b0591ae0ce56..fd6e51224034 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -174,8 +174,8 @@ static unsigned int translate_open_flags(int flags)
 
 static void sp_setfsuidgid( uid_t uid, gid_t gid)
 {
-        current->fsuid = uid;
-        current->fsgid = gid;
+        current->cred->fsuid = uid;
+        current->cred->fsgid = gid;
 
         key_fsuid_changed(current);
         key_fsgid_changed(current);
diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c
index dc9eb72ed9de..5e77a3a21f98 100644
--- a/arch/mips/kernel/mips-mt-fpaff.c
+++ b/arch/mips/kernel/mips-mt-fpaff.c
@@ -51,6 +51,7 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
         int retval;
         struct task_struct *p;
         struct thread_info *ti;
+        uid_t euid;
 
         if (len < sizeof(new_mask))
                 return -EINVAL;
@@ -76,9 +77,9 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
          */
         get_task_struct(p);
 
+        euid = current_euid();
         retval = -EPERM;
-        if ((current->euid != p->euid) && (current->euid != p->uid) &&
-                        !capable(CAP_SYS_NICE)) {
+        if (euid != p->euid && euid != p->uid && !capable(CAP_SYS_NICE)) {
                 read_unlock(&tasklist_lock);
                 goto out_unlock;
         }
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index ca476c4f62a5..f27beca4b26d 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -51,10 +51,10 @@ static int __init allowcpus(char *str)
         int len;
 
         cpus_clear(cpu_allow_map);
-        if (cpulist_parse(str, cpu_allow_map) == 0) {
+        if (cpulist_parse(str, &cpu_allow_map) == 0) {
                 cpu_set(0, cpu_allow_map);
                 cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map);
-                len = cpulist_scnprintf(buf, sizeof(buf)-1, cpu_possible_map);
+                len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map);
                 buf[len] = '\0';
                 pr_debug("Allowable CPUs: %s\n", buf);
                 return 1;
@@ -226,7 +226,7 @@ void __init cmp_smp_setup(void)
 
         for (i = 1; i < NR_CPUS; i++) {
                 if (amon_cpu_avail(i)) {
-                        cpu_set(i, phys_cpu_present_map);
+                        cpu_set(i, cpu_possible_map);
                         __cpu_number_map[i]     = ++ncpu;
                         __cpu_logical_map[ncpu] = i;
                 }
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 87a1816c1f45..6f7ee5ac46ee 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -70,7 +70,7 @@ static unsigned int __init smvp_vpe_init(unsigned int tc, unsigned int mvpconf0,
                 write_vpe_c0_vpeconf0(tmp);
 
                 /* Record this as available CPU */
-                cpu_set(tc, phys_cpu_present_map);
+                cpu_set(tc, cpu_possible_map);
                 __cpu_number_map[tc]    = ++ncpu;
                 __cpu_logical_map[ncpu] = tc;
         }
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 8bf88faf5afd..3da94704f816 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -44,15 +44,10 @@
 #include <asm/mipsmtregs.h>
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-cpumask_t phys_cpu_present_map;         /* Bitmask of available CPUs */
 volatile cpumask_t cpu_callin_map;      /* Bitmask of started secondaries */
-cpumask_t cpu_online_map;               /* Bitmask of currently online CPUs */
 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
 
-EXPORT_SYMBOL(phys_cpu_present_map);
-EXPORT_SYMBOL(cpu_online_map);
-
 extern void cpu_idle(void);
 
 /* Number of TCs (or siblings in Intel speak) per CPU core */
@@ -195,7 +190,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 /* preload SMP state for boot cpu */
 void __devinit smp_prepare_boot_cpu(void)
 {
-        cpu_set(0, phys_cpu_present_map);
+        cpu_set(0, cpu_possible_map);
         cpu_set(0, cpu_online_map);
         cpu_set(0, cpu_callin_map);
 }
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 897fb2b4751c..b6cca01ff82b 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -290,7 +290,7 @@ static void smtc_configure_tlb(void)
  * possibly leave some TCs/VPEs as "slave" processors.
  *
  * Use c0_MVPConf0 to find out how many TCs are available, setting up
- * phys_cpu_present_map and the logical/physical mappings.
+ * cpu_possible_map and the logical/physical mappings.
  */
 
 int __init smtc_build_cpu_map(int start_cpu_slot)
@@ -304,7 +304,7 @@ int __init smtc_build_cpu_map(int start_cpu_slot)
          */
         ntcs = ((read_c0_mvpconf0() & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1;
         for (i=start_cpu_slot; i<NR_CPUS && i<ntcs; i++) {
-                cpu_set(i, phys_cpu_present_map);
+                cpu_set(i, cpu_possible_map);
                 __cpu_number_map[i] = i;
                 __cpu_logical_map[i] = i;
         }
@@ -521,7 +521,7 @@ void smtc_prepare_cpus(int cpus)
          * Pull any physically present but unused TCs out of circulation.
          */
         while (tc < (((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1)) {
-                cpu_clear(tc, phys_cpu_present_map);
+                cpu_clear(tc, cpu_possible_map);
                 cpu_clear(tc, cpu_present_map);
                 tc++;
         }
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index a1b3da6bad5c..3ca5f42e819d 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -1085,8 +1085,8 @@ static int vpe_open(struct inode *inode, struct file *filp)
         v->load_addr = NULL;
         v->len = 0;
 
-        v->uid = filp->f_uid;
-        v->gid = filp->f_gid;
+        v->uid = filp->f_cred->fsuid;
+        v->gid = filp->f_cred->fsgid;
 
 #ifdef CONFIG_MIPS_APSP_KSPD
         /* get kspd to tell us when a syscall_exit happens */
@@ -1454,7 +1454,7 @@ static int __init vpe_module_init(void)
         device_initialize(&vpe_device);
         vpe_device.class        = &vpe_class,
         vpe_device.parent       = NULL,
-        strlcpy(vpe_device.bus_id, "vpe1", BUS_ID_SIZE);
+        dev_set_name(&vpe_device, "vpe1");
         vpe_device.devt = MKDEV(major, minor);
         err = device_add(&vpe_device);
         if (err) {
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index f84a46a8ae6e..aabd7274507b 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -114,9 +114,9 @@ struct plat_smp_ops msmtc_smp_ops = {
  */
 
 
-void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity)
+void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
 {
-        cpumask_t tmask = affinity;
+        cpumask_t tmask = *affinity;
         int cpu = 0;
         void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);
 
@@ -139,7 +139,7 @@ void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity)
          * be made to forward to an offline "CPU".
          */
 
-        for_each_cpu_mask(cpu, affinity) {
+        for_each_cpu(cpu, affinity) {
                 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
                         cpu_clear(cpu, tmask);
         }
diff --git a/arch/mips/nxp/pnx8550/common/time.c b/arch/mips/nxp/pnx8550/common/time.c
index 62f495b57f93..cf293b279098 100644
--- a/arch/mips/nxp/pnx8550/common/time.c
+++ b/arch/mips/nxp/pnx8550/common/time.c
@@ -102,6 +102,7 @@ __init void plat_time_init(void)
         unsigned int p;
         unsigned int pow2p;
 
+        pnx8xxx_clockevent.cpumask = cpu_none_mask;
         clockevents_register_device(&pnx8xxx_clockevent);
         clocksource_register(&pnx_clocksource);
 
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 3a7df647ca77..f78c29b68d77 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -141,7 +141,7 @@ static void __cpuinit yos_boot_secondary(int cpu, struct task_struct *idle)
 }
 
 /*
- * Detect available CPUs, populate phys_cpu_present_map before smp_init
+ * Detect available CPUs, populate cpu_possible_map before smp_init
  *
  * We don't want to start the secondary CPU yet nor do we have a nice probing
  * feature in PMON so we just assume presence of the secondary core.
@@ -150,10 +150,10 @@ static void __init yos_smp_setup(void)
 {
         int i;
 
-        cpus_clear(phys_cpu_present_map);
+        cpus_clear(cpu_possible_map);
 
         for (i = 0; i < 2; i++) {
-                cpu_set(i, phys_cpu_present_map);
+                cpu_set(i, cpu_possible_map);
                 __cpu_number_map[i]     = i;
                 __cpu_logical_map[i]    = i;
         }
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index ba5cdebeaf0d..5b47d6b65275 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -76,7 +76,7 @@ static int do_cpumask(cnodeid_t cnode, nasid_t nasid, int highest)
                         /* Only let it join in if it's marked enabled */
                         if ((acpu->cpu_info.flags & KLINFO_ENABLE) &&
                             (tot_cpus_found != NR_CPUS)) {
-                                cpu_set(cpuid, phys_cpu_present_map);
+                                cpu_set(cpuid, cpu_possible_map);
                                 alloc_cpupda(cpuid, tot_cpus_found);
                                 cpus_found++;
                                 tot_cpus_found++;
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 1327c2746fb7..f024057a35f8 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -134,7 +134,7 @@ void __cpuinit hub_rt_clock_event_init(void)
         cd->min_delta_ns        = clockevent_delta2ns(0x300, cd);
         cd->rating              = 200;
         cd->irq                 = irq;
-        cd->cpumask             = cpumask_of_cpu(cpu);
+        cd->cpumask             = cpumask_of(cpu);
         cd->set_next_event      = rt_next_event;
         cd->set_mode            = rt_set_mode;
         clockevents_register_device(cd);
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index a35818ed4263..12b465d404df 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -50,7 +50,7 @@ static void enable_bcm1480_irq(unsigned int irq);
 static void disable_bcm1480_irq(unsigned int irq);
 static void ack_bcm1480_irq(unsigned int irq);
 #ifdef CONFIG_SMP
-static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask);
+static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
 #endif
 
 #ifdef CONFIG_PCI
@@ -109,7 +109,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
 }
 
 #ifdef CONFIG_SMP
-static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
+static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
 {
         int i = 0, old_cpu, cpu, int_on, k;
         u64 cur_ints;
@@ -117,11 +117,11 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
         unsigned long flags;
         unsigned int irq_dirty;
 
-        if (cpus_weight(mask) != 1) {
+        if (cpumask_weight(mask) != 1) {
                 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
                 return;
         }
-        i = first_cpu(mask);
+        i = cpumask_first(mask);
 
         /* Convert logical CPU to physical CPU */
         cpu = cpu_logical_map(i);
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index bd9eeb43ed0e..dddfda8e8294 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -136,7 +136,7 @@ static void __cpuinit bcm1480_boot_secondary(int cpu, struct task_struct *idle)
 
 /*
  * Use CFE to find out how many CPUs are available, setting up
- * phys_cpu_present_map and the logical/physical mappings.
+ * cpu_possible_map and the logical/physical mappings.
  * XXXKW will the boot CPU ever not be physical 0?
  *
  * Common setup before any secondaries are started
@@ -145,14 +145,14 @@ static void __init bcm1480_smp_setup(void)
 {
         int i, num;
 
-        cpus_clear(phys_cpu_present_map);
-        cpu_set(0, phys_cpu_present_map);
+        cpus_clear(cpu_possible_map);
+        cpu_set(0, cpu_possible_map);
         __cpu_number_map[0] = 0;
         __cpu_logical_map[0] = 0;
 
         for (i = 1, num = 0; i < NR_CPUS; i++) {
                 if (cfe_cpu_stop(i) == 0) {
-                        cpu_set(i, phys_cpu_present_map);
+                        cpu_set(i, cpu_possible_map);
                         __cpu_number_map[i] = ++num;
                         __cpu_logical_map[num] = i;
                 }
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index a5158483986e..808ac2959b8c 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -50,7 +50,7 @@ static void enable_sb1250_irq(unsigned int irq);
 static void disable_sb1250_irq(unsigned int irq);
 static void ack_sb1250_irq(unsigned int irq);
 #ifdef CONFIG_SMP
-static void sb1250_set_affinity(unsigned int irq, cpumask_t mask);
+static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
 #endif
 
 #ifdef CONFIG_SIBYTE_HAS_LDT
@@ -103,16 +103,16 @@ void sb1250_unmask_irq(int cpu, int irq)
 }
 
 #ifdef CONFIG_SMP
-static void sb1250_set_affinity(unsigned int irq, cpumask_t mask)
+static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
 {
         int i = 0, old_cpu, cpu, int_on;
         u64 cur_ints;
         struct irq_desc *desc = irq_desc + irq;
         unsigned long flags;
 
-        i = first_cpu(mask);
+        i = cpumask_first(mask);
 
-        if (cpus_weight(mask) > 1) {
+        if (cpumask_weight(mask) > 1) {
                 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
                 return;
         }
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index 0734b933e969..5950a288a7da 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -124,7 +124,7 @@ static void __cpuinit sb1250_boot_secondary(int cpu, struct task_struct *idle)
 
 /*
  * Use CFE to find out how many CPUs are available, setting up
- * phys_cpu_present_map and the logical/physical mappings.
+ * cpu_possible_map and the logical/physical mappings.
  * XXXKW will the boot CPU ever not be physical 0?
  *
  * Common setup before any secondaries are started
@@ -133,14 +133,14 @@ static void __init sb1250_smp_setup(void)
 {
         int i, num;
 
-        cpus_clear(phys_cpu_present_map);
-        cpu_set(0, phys_cpu_present_map);
+        cpus_clear(cpu_possible_map);
+        cpu_set(0, cpu_possible_map);
         __cpu_number_map[0] = 0;
         __cpu_logical_map[0] = 0;
 
         for (i = 1, num = 0; i < NR_CPUS; i++) {
                 if (cfe_cpu_stop(i) == 0) {
-                        cpu_set(i, phys_cpu_present_map);
+                        cpu_set(i, cpu_possible_map);
                         __cpu_number_map[i] = ++num;
                         __cpu_logical_map[num] = i;
                 }
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 796e3ce28720..69f5f88711cc 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -80,7 +80,7 @@ static void __init sni_a20r_timer_setup(void)
         struct irqaction *action = &a20r_irqaction;
         unsigned int cpu = smp_processor_id();
 
-        cd->cpumask             = cpumask_of_cpu(cpu);
+        cd->cpumask             = cpumask_of(cpu);
         clockevents_register_device(cd);
         action->dev_id = cd;
         setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction);
diff --git a/arch/mn10300/kernel/init_task.c b/arch/mn10300/kernel/init_task.c
index af16f6e5c918..5ac3566f8c98 100644
--- a/arch/mn10300/kernel/init_task.c
+++ b/arch/mn10300/kernel/init_task.c
@@ -18,7 +18,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 644a70b1b04e..aacf11d33723 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -11,6 +11,7 @@ config PARISC
         select HAVE_OPROFILE
         select RTC_CLASS
         select RTC_DRV_PARISC
+        select INIT_ALL_POSSIBLE
         help
           The PA-RISC microprocessor is designed by Hewlett-Packard and used
           in many of their workstations & servers (HP9000 700 and 800 series,
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index 57fcc4a5ebb4..edbfe25c5fc1 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -155,14 +155,11 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
 #endif
 
-/* Note that we need not lock read accesses - aligned word writes/reads
- * are atomic, so a reader never sees unconsistent values.
- *
- * Cache-line alignment would conflict with, for example, linux/module.h
+/*
+ * Note that we need not lock read accesses - aligned word writes/reads
+ * are atomic, so a reader never sees inconsistent values.
  */
 
-typedef struct { volatile int counter; } atomic_t;
-
 /* It's possible to reduce all atomic operations to either
  * __atomic_add_return, atomic_set and atomic_read (the latter
  * is there only for consistency).
@@ -260,8 +257,6 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
 
 #ifdef CONFIG_64BIT
 
-typedef struct { volatile s64 counter; } atomic64_t;
-
 #define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
 
 static __inline__ int
diff --git a/arch/parisc/include/asm/module.h b/arch/parisc/include/asm/module.h
index c2cb49e934c1..1f4123427ea0 100644
--- a/arch/parisc/include/asm/module.h
+++ b/arch/parisc/include/asm/module.h
@@ -23,8 +23,10 @@ struct mod_arch_specific
 {
         unsigned long got_offset, got_count, got_max;
         unsigned long fdesc_offset, fdesc_count, fdesc_max;
-        unsigned long stub_offset, stub_count, stub_max;
-        unsigned long init_stub_offset, init_stub_count, init_stub_max;
+        struct {
+                unsigned long stub_offset;
+                unsigned int stub_entries;
+                } *section;
         int unwind_section;
         struct unwind_table *unwind;
 };
diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h
index 409e698f4361..6ef4b7867b1b 100644
--- a/arch/parisc/include/asm/smp.h
+++ b/arch/parisc/include/asm/smp.h
@@ -16,8 +16,6 @@
 #include <linux/cpumask.h>
 typedef unsigned long address_t;
 
-extern cpumask_t cpu_online_map;
-
 
 /*
  *      Private routines/data
diff --git a/arch/parisc/kernel/init_task.c b/arch/parisc/kernel/init_task.c
index f5941c086551..1e25a45d64c1 100644
--- a/arch/parisc/kernel/init_task.c
+++ b/arch/parisc/kernel/init_task.c
@@ -34,7 +34,6 @@
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 23ef950df008..4cea935e2f99 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -131,12 +131,12 @@ int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
         return 0;
 }
 
-static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest)
+static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
 {
-        if (cpu_check_affinity(irq, &dest))
+        if (cpu_check_affinity(irq, dest))
                 return;
 
-        irq_desc[irq].affinity = dest;
+        irq_desc[irq].affinity = *dest;
 }
 #endif
 
diff --git a/arch/parisc/kernel/module.c b/arch/parisc/kernel/module.c
index 44138c3e6ea7..9013243cecca 100644
--- a/arch/parisc/kernel/module.c
+++ b/arch/parisc/kernel/module.c
@@ -6,6 +6,7 @@
  *
  *    Linux/PA-RISC Project (http://www.parisc-linux.org/)
  *    Copyright (C) 2003 Randolph Chung <tausq at debian . org>
+ *    Copyright (C) 2008 Helge Deller <deller@gmx.de>
  *
  *
  *    This program is free software; you can redistribute it and/or modify
@@ -24,6 +25,19 @@
  *
  *
  *    Notes:
+ *    - PLT stub handling
+ *      On 32bit (and sometimes 64bit) and with big kernel modules like xfs or
+ *      ipv6 the relocation types R_PARISC_PCREL17F and R_PARISC_PCREL22F may
+ *      fail to reach their PLT stub if we only create one big stub array for
+ *      all sections at the beginning of the core or init section.
+ *      Instead we now insert individual PLT stub entries directly in front of
+ *      of the code sections where the stubs are actually called.
+ *      This reduces the distance between the PCREL location and the stub entry
+ *      so that the relocations can be fulfilled.
+ *      While calculating the final layout of the kernel module in memory, the
+ *      kernel module loader calls arch_mod_section_prepend() to request the
+ *      to be reserved amount of memory in front of each individual section.
+ *
  *    - SEGREL32 handling
  *      We are not doing SEGREL32 handling correctly. According to the ABI, we
  *      should do a value offset, like this:
@@ -58,9 +72,13 @@
 #define DEBUGP(fmt...)
 #endif
 
+#define RELOC_REACHABLE(val, bits) \
+        (( ( !((val) & (1<<((bits)-1))) && ((val)>>(bits)) != 0 )  ||   \
+             ( ((val) & (1<<((bits)-1))) && ((val)>>(bits)) != (((__typeof__(val))(~0))>>((bits)+2)))) ? \
+        0 : 1)
+
 #define CHECK_RELOC(val, bits) \
-        if ( ( !((val) & (1<<((bits)-1))) && ((val)>>(bits)) != 0 )  || \
-             ( ((val) & (1<<((bits)-1))) && ((val)>>(bits)) != (((__typeof__(val))(~0))>>((bits)+2)))) { \
+        if (!RELOC_REACHABLE(val, bits)) { \
                 printk(KERN_ERR "module %s relocation of symbol %s is out of range (0x%lx in %d bits)\n", \
                 me->name, strtab + sym->st_name, (unsigned long)val, bits); \
                 return -ENOEXEC;                        \
@@ -92,13 +110,6 @@ static inline int in_local(struct module *me, void *loc)
         return in_init(me, loc) || in_core(me, loc);
 }
 
-static inline int in_local_section(struct module *me, void *loc, void *dot)
-{
-        return (in_init(me, loc) && in_init(me, dot)) ||
-                (in_core(me, loc) && in_core(me, dot));
-}
-
-
 #ifndef CONFIG_64BIT
 struct got_entry {
         Elf32_Addr addr;
@@ -258,23 +269,42 @@ static inline unsigned long count_stubs(const Elf_Rela *rela, unsigned long n)
 /* Free memory returned from module_alloc */
 void module_free(struct module *mod, void *module_region)
 {
+        kfree(mod->arch.section);
+        mod->arch.section = NULL;
+
         vfree(module_region);
         /* FIXME: If module_region == mod->init_region, trim exception
            table entries. */
 }
 
+/* Additional bytes needed in front of individual sections */
+unsigned int arch_mod_section_prepend(struct module *mod,
+                                      unsigned int section)
+{
+        /* size needed for all stubs of this section (including
+         * one additional for correct alignment of the stubs) */
+        return (mod->arch.section[section].stub_entries + 1)
+                * sizeof(struct stub_entry);
+}
+
 #define CONST 
 int module_frob_arch_sections(CONST Elf_Ehdr *hdr,
                               CONST Elf_Shdr *sechdrs,
                               CONST char *secstrings,
                               struct module *me)
 {
-        unsigned long gots = 0, fdescs = 0, stubs = 0, init_stubs = 0;
+        unsigned long gots = 0, fdescs = 0, len;
         unsigned int i;
 
+        len = hdr->e_shnum * sizeof(me->arch.section[0]);
+        me->arch.section = kzalloc(len, GFP_KERNEL);
+        if (!me->arch.section)
+                return -ENOMEM;
+
         for (i = 1; i < hdr->e_shnum; i++) {
-                const Elf_Rela *rels = (void *)hdr + sechdrs[i].sh_offset;
+                const Elf_Rela *rels = (void *)sechdrs[i].sh_addr;
                 unsigned long nrels = sechdrs[i].sh_size / sizeof(*rels);
+                unsigned int count, s;
 
                 if (strncmp(secstrings + sechdrs[i].sh_name,
                             ".PARISC.unwind", 14) == 0)
@@ -290,11 +320,23 @@ int module_frob_arch_sections(CONST Elf_Ehdr *hdr,
                  */
                 gots += count_gots(rels, nrels);
                 fdescs += count_fdescs(rels, nrels);
-                if(strncmp(secstrings + sechdrs[i].sh_name,
-                           ".rela.init", 10) == 0)
-                        init_stubs += count_stubs(rels, nrels);
-                else
-                        stubs += count_stubs(rels, nrels);
+
+                /* XXX: By sorting the relocs and finding duplicate entries
+                 *  we could reduce the number of necessary stubs and save
+                 *  some memory. */
+                count = count_stubs(rels, nrels);
+                if (!count)
+                        continue;
+
+                /* so we need relocation stubs. reserve necessary memory. */
+                /* sh_info gives the section for which we need to add stubs. */
+                s = sechdrs[i].sh_info;
+
+                /* each code section should only have one relocation section */
+                WARN_ON(me->arch.section[s].stub_entries);
+
+                /* store number of stubs we need for this section */
+                me->arch.section[s].stub_entries += count;
         }
 
         /* align things a bit */
@@ -306,18 +348,8 @@ int module_frob_arch_sections(CONST Elf_Ehdr *hdr,
         me->arch.fdesc_offset = me->core_size;
         me->core_size += fdescs * sizeof(Elf_Fdesc);
 
-        me->core_size = ALIGN(me->core_size, 16);
-        me->arch.stub_offset = me->core_size;
-        me->core_size += stubs * sizeof(struct stub_entry);
-
-        me->init_size = ALIGN(me->init_size, 16);
-        me->arch.init_stub_offset = me->init_size;
-        me->init_size += init_stubs * sizeof(struct stub_entry);
-
         me->arch.got_max = gots;
         me->arch.fdesc_max = fdescs;
-        me->arch.stub_max = stubs;
-        me->arch.init_stub_max = init_stubs;
 
         return 0;
 }
@@ -380,23 +412,27 @@ enum elf_stub_type {
 };
 
 static Elf_Addr get_stub(struct module *me, unsigned long value, long addend,
-        enum elf_stub_type stub_type, int init_section)
+        enum elf_stub_type stub_type, Elf_Addr loc0, unsigned int targetsec)
 {
-        unsigned long i;
         struct stub_entry *stub;
 
-        if(init_section) {
-                i = me->arch.init_stub_count++;
-                BUG_ON(me->arch.init_stub_count > me->arch.init_stub_max);
-                stub = me->module_init + me->arch.init_stub_offset + 
-                        i * sizeof(struct stub_entry);
-        } else {
-                i = me->arch.stub_count++;
-                BUG_ON(me->arch.stub_count > me->arch.stub_max);
-                stub = me->module_core + me->arch.stub_offset + 
-                        i * sizeof(struct stub_entry);
+        /* initialize stub_offset to point in front of the section */
+        if (!me->arch.section[targetsec].stub_offset) {
+                loc0 -= (me->arch.section[targetsec].stub_entries + 1) *
+                                sizeof(struct stub_entry);
+                /* get correct alignment for the stubs */
+                loc0 = ALIGN(loc0, sizeof(struct stub_entry));
+                me->arch.section[targetsec].stub_offset = loc0;
         }
 
+        /* get address of stub entry */
+        stub = (void *) me->arch.section[targetsec].stub_offset;
+        me->arch.section[targetsec].stub_offset += sizeof(struct stub_entry);
+
+        /* do not write outside available stub area */
+        BUG_ON(0 == me->arch.section[targetsec].stub_entries--);
+
+
 #ifndef CONFIG_64BIT
 /* for 32-bit the stub looks like this:
  *      ldil L'XXX,%r1
@@ -489,15 +525,19 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
         Elf32_Addr val;
         Elf32_Sword addend;
         Elf32_Addr dot;
+        Elf_Addr loc0;
+        unsigned int targetsec = sechdrs[relsec].sh_info;
         //unsigned long dp = (unsigned long)$global$;
         register unsigned long dp asm ("r27");
 
         DEBUGP("Applying relocate section %u to %u\n", relsec,
-               sechdrs[relsec].sh_info);
+               targetsec);
         for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
                 /* This is where to make the change */
-                loc = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                loc = (void *)sechdrs[targetsec].sh_addr
                       + rel[i].r_offset;
+                /* This is the start of the target section */
+                loc0 = sechdrs[targetsec].sh_addr;
                 /* This is the symbol it is referring to */
                 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
                         + ELF32_R_SYM(rel[i].r_info);
@@ -569,19 +609,32 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
                         break;
                 case R_PARISC_PCREL17F:
                         /* 17-bit PC relative address */
-                        val = get_stub(me, val, addend, ELF_STUB_GOT, in_init(me, loc));
+                        /* calculate direct call offset */
+                        val += addend;
                         val = (val - dot - 8)/4;
-                        CHECK_RELOC(val, 17)
+                        if (!RELOC_REACHABLE(val, 17)) {
+                                /* direct distance too far, create
+                                 * stub entry instead */
+                                val = get_stub(me, sym->st_value, addend,
+                                        ELF_STUB_DIRECT, loc0, targetsec);
+                                val = (val - dot - 8)/4;
+                                CHECK_RELOC(val, 17);
+                        }
                         *loc = (*loc & ~0x1f1ffd) | reassemble_17(val);
                         break;
                 case R_PARISC_PCREL22F:
                         /* 22-bit PC relative address; only defined for pa20 */
-                        val = get_stub(me, val, addend, ELF_STUB_GOT, in_init(me, loc));
-                        DEBUGP("STUB FOR %s loc %lx+%lx at %lx\n", 
-                               strtab + sym->st_name, (unsigned long)loc, addend, 
-                               val)
+                        /* calculate direct call offset */
+                        val += addend;
                         val = (val - dot - 8)/4;
-                        CHECK_RELOC(val, 22);
+                        if (!RELOC_REACHABLE(val, 22)) {
+                                /* direct distance too far, create
+                                 * stub entry instead */
+                                val = get_stub(me, sym->st_value, addend,
+                                        ELF_STUB_DIRECT, loc0, targetsec);
+                                val = (val - dot - 8)/4;
+                                CHECK_RELOC(val, 22);
+                        }
                         *loc = (*loc & ~0x3ff1ffd) | reassemble_22(val);
                         break;
 
@@ -610,13 +663,17 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
         Elf64_Addr val;
         Elf64_Sxword addend;
         Elf64_Addr dot;
+        Elf_Addr loc0;
+        unsigned int targetsec = sechdrs[relsec].sh_info;
 
         DEBUGP("Applying relocate section %u to %u\n", relsec,
-               sechdrs[relsec].sh_info);
+               targetsec);
         for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
                 /* This is where to make the change */
-                loc = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                loc = (void *)sechdrs[targetsec].sh_addr
                       + rel[i].r_offset;
+                /* This is the start of the target section */
+                loc0 = sechdrs[targetsec].sh_addr;
                 /* This is the symbol it is referring to */
                 sym = (Elf64_Sym *)sechdrs[symindex].sh_addr
                         + ELF64_R_SYM(rel[i].r_info);
@@ -672,42 +729,40 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
                         DEBUGP("PCREL22F Symbol %s loc %p val %lx\n",
                                strtab + sym->st_name,
                                loc, val);
+                        val += addend;
                         /* can we reach it locally? */
-                        if(!in_local_section(me, (void *)val, (void *)dot)) {
-
-                                if (in_local(me, (void *)val))
-                                        /* this is the case where the
-                                         * symbol is local to the
-                                         * module, but in a different
-                                         * section, so stub the jump
-                                         * in case it's more than 22
-                                         * bits away */
-                                        val = get_stub(me, val, addend, ELF_STUB_DIRECT,
-                                                       in_init(me, loc));
-                                else if (strncmp(strtab + sym->st_name, "$$", 2)
+                        if (in_local(me, (void *)val)) {
+                                /* this is the case where the symbol is local
+                                 * to the module, but in a different section,
+                                 * so stub the jump in case it's more than 22
+                                 * bits away */
+                                val = (val - dot - 8)/4;
+                                if (!RELOC_REACHABLE(val, 22)) {
+                                        /* direct distance too far, create
+                                         * stub entry instead */
+                                        val = get_stub(me, sym->st_value,
+                                                addend, ELF_STUB_DIRECT,
+                                                loc0, targetsec);
+                                } else {
+                                        /* Ok, we can reach it directly. */
+                                        val = sym->st_value;
+                                        val += addend;
+                                }
+                        } else {
+                                val = sym->st_value;
+                                if (strncmp(strtab + sym->st_name, "$$", 2)
                                     == 0)
                                         val = get_stub(me, val, addend, ELF_STUB_MILLI,
-                                                       in_init(me, loc));
+                                                       loc0, targetsec);
                                 else
                                         val = get_stub(me, val, addend, ELF_STUB_GOT,
-                                                       in_init(me, loc));
+                                                       loc0, targetsec);
                         }
                         DEBUGP("STUB FOR %s loc %lx, val %lx+%lx at %lx\n", 
                                strtab + sym->st_name, loc, sym->st_value,
                                addend, val);
-                        /* FIXME: local symbols work as long as the
-                         * core and init pieces aren't separated too
-                         * far.  If this is ever broken, you will trip
-                         * the check below.  The way to fix it would
-                         * be to generate local stubs to go between init
-                         * and core */
-                        if((Elf64_Sxword)(val - dot - 8) > 0x800000 -1 ||
-                           (Elf64_Sxword)(val - dot - 8) < -0x800000) {
-                                printk(KERN_ERR "Module %s, symbol %s is out of range for PCREL22F relocation\n",
-                                       me->name, strtab + sym->st_name);
-                                return -ENOEXEC;
-                        }
                         val = (val - dot - 8)/4;
+                        CHECK_RELOC(val, 22);
                         *loc = (*loc & ~0x3ff1ffd) | reassemble_22(val);
                         break;
                 case R_PARISC_DIR64:
@@ -794,12 +849,8 @@ int module_finalize(const Elf_Ehdr *hdr,
         addr = (u32 *)entry->addr;
         printk("INSNS: %x %x %x %x\n",
                addr[0], addr[1], addr[2], addr[3]);
-        printk("stubs used %ld, stubs max %ld\n"
-               "init_stubs used %ld, init stubs max %ld\n"
-               "got entries used %ld, gots max %ld\n"
+        printk("got entries used %ld, gots max %ld\n"
                "fdescs used %ld, fdescs max %ld\n",
-               me->arch.stub_count, me->arch.stub_max,
-               me->arch.init_stub_count, me->arch.init_stub_max,
                me->arch.got_count, me->arch.got_max,
                me->arch.fdesc_count, me->arch.fdesc_max);
 #endif
@@ -829,7 +880,10 @@ int module_finalize(const Elf_Ehdr *hdr,
                                 me->name, me->arch.got_count, MAX_GOTS);
                 return -EINVAL;
         }
-        
+
+        kfree(me->arch.section);
+        me->arch.section = NULL;
+
         /* no symbol table */
         if(symhdr == NULL)
                 return 0;
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index 06213d1d6d95..f82544225e8e 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -182,7 +182,7 @@ give_sigsegv:
         si.si_errno = 0;
         si.si_code = SI_KERNEL;
         si.si_pid = task_pid_vnr(current);
-        si.si_uid = current->uid;
+        si.si_uid = current_uid();
         si.si_addr = &frame->uc;
         force_sig_info(SIGSEGV, &si, current);
         return;
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index d47f3975c9c6..80bc000523fa 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -67,21 +67,6 @@ static volatile int cpu_now_booting __read_mostly = 0;	/* track which CPU is boo
 
 static int parisc_max_cpus __read_mostly = 1;
 
-/* online cpus are ones that we've managed to bring up completely
- * possible cpus are all valid cpu 
- * present cpus are all detected cpu
- *
- * On startup we bring up the "possible" cpus. Since we discover
- * CPUs later, we add them as hotplug, so the possible cpu mask is
- * empty in the beginning.
- */
-
-cpumask_t cpu_online_map   __read_mostly = CPU_MASK_NONE;       /* Bitmap of online CPUs */
-cpumask_t cpu_possible_map __read_mostly = CPU_MASK_ALL;        /* Bitmap of Present CPUs */
-
-EXPORT_SYMBOL(cpu_online_map);
-EXPORT_SYMBOL(cpu_possible_map);
-
 DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED;
 
 enum ipi_message_type {
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 525c13a4de93..79f25cef32df 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -141,7 +141,7 @@ config GENERIC_NVRAM
         bool
         default y if PPC32
 
-config SCHED_NO_NO_OMIT_FRAME_POINTER
+config SCHED_OMIT_FRAME_POINTER
         bool
         default y
 
@@ -285,6 +285,10 @@ config IOMMU_VMERGE
 config IOMMU_HELPER
         def_bool PPC64
 
+config PPC_NEED_DMA_SYNC_OPS
+        def_bool y
+        depends on NOT_COHERENT_CACHE
+
 config HOTPLUG_CPU
         bool "Support for enabling/disabling CPUs"
         depends on SMP && HOTPLUG && EXPERIMENTAL && (PPC_PSERIES || PPC_PMAC)
@@ -322,7 +326,7 @@ config KEXEC
 
 config CRASH_DUMP
         bool "Build a kdump crash kernel"
-        depends on PPC_MULTIPLATFORM && PPC64 && RELOCATABLE
+        depends on (PPC64 && RELOCATABLE) || 6xx
         help
           Build a kernel suitable for use as a kdump capture kernel.
           The same kernel binary can be used as production kernel and dump
@@ -401,23 +405,53 @@ config PPC_HAS_HASH_64K
         depends on PPC64
         default n
 
-config PPC_64K_PAGES
-        bool "64k page size"
-        depends on PPC64
-        select PPC_HAS_HASH_64K
+choice
+        prompt "Page size"
+        default PPC_4K_PAGES
         help
-          This option changes the kernel logical page size to 64k. On machines
-          without processor support for 64k pages, the kernel will simulate
-          them by loading each individual 4k page on demand transparently,
-          while on hardware with such support, it will be used to map
-          normal application pages.
+          Select the kernel logical page size. Increasing the page size
+          will reduce software overhead at each page boundary, allow
+          hardware prefetch mechanisms to be more effective, and allow
+          larger dma transfers increasing IO efficiency and reducing
+          overhead. However the utilization of memory will increase.
+          For example, each cached file will using a multiple of the
+          page size to hold its contents and the difference between the
+          end of file and the end of page is wasted.
+
+          Some dedicated systems, such as software raid serving with
+          accelerated calculations, have shown significant increases.
+
+          If you configure a 64 bit kernel for 64k pages but the
+          processor does not support them, then the kernel will simulate
+          them with 4k pages, loading them on demand, but with the
+          reduced software overhead and larger internal fragmentation.
+          For the 32 bit kernel, a large page option will not be offered
+          unless it is supported by the configured processor.
+
+          If unsure, choose 4K_PAGES.
+
+config PPC_4K_PAGES
+        bool "4k page size"
+
+config PPC_16K_PAGES
+        bool "16k page size" if 44x
+
+config PPC_64K_PAGES
+        bool "64k page size" if 44x || PPC_STD_MMU_64
+        select PPC_HAS_HASH_64K if PPC_STD_MMU_64
+
+endchoice
 
 config FORCE_MAX_ZONEORDER
         int "Maximum zone order"
-        range 9 64 if PPC_64K_PAGES
-        default "9" if PPC_64K_PAGES
-        range 13 64 if PPC64 && !PPC_64K_PAGES
-        default "13" if PPC64 && !PPC_64K_PAGES
+        range 9 64 if PPC_STD_MMU_64 && PPC_64K_PAGES
+        default "9" if PPC_STD_MMU_64 && PPC_64K_PAGES
+        range 13 64 if PPC_STD_MMU_64 && !PPC_64K_PAGES
+        default "13" if PPC_STD_MMU_64 && !PPC_64K_PAGES
+        range 9 64 if PPC_STD_MMU_32 && PPC_16K_PAGES
+        default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES
+        range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES
+        default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES
         range 11 64
         default "11"
         help
@@ -437,7 +471,7 @@ config FORCE_MAX_ZONEORDER
 
 config PPC_SUBPAGE_PROT
         bool "Support setting protections for 4k subpages"
-        depends on PPC_64K_PAGES
+        depends on PPC_STD_MMU_64 && PPC_64K_PAGES
         help
           This option adds support for a system call to allow user programs
           to set access permissions (read/write, readonly, or no access)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 15eb27861fc7..08f7cc0a1953 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -2,6 +2,15 @@ menu "Kernel hacking"
 
 source "lib/Kconfig.debug"
 
+config PRINT_STACK_DEPTH
+        int "Stack depth to print" if DEBUG_KERNEL
+        default 64
+        help
+          This option allows you to set the stack depth that the kernel
+          prints in stack traces. This can be useful if your display is
+          too small and stack traces cause important information to
+          scroll off the screen.
+
 config DEBUG_STACKOVERFLOW
         bool "Check for stack overflows"
         depends on DEBUG_KERNEL
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 1f0667069940..72d17f50e54f 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -107,7 +107,6 @@ KBUILD_CFLAGS += $(call cc-option,-mno-altivec)
 # (We use all available options to help semi-broken compilers)
 KBUILD_CFLAGS += $(call cc-option,-mno-spe)
 KBUILD_CFLAGS += $(call cc-option,-mspe=no)
-KBUILD_CFLAGS += $(call cc-option,-mabi=no-spe)
 
 # Enable unit-at-a-time mode when possible. It shrinks the
 # kernel considerably.
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 3d3daa674299..f32829937aad 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -194,6 +194,7 @@ image-$(CONFIG_PPC_MAPLE)		+= zImage.pseries
 image-$(CONFIG_PPC_IBM_CELL_BLADE)      += zImage.pseries
 image-$(CONFIG_PPC_PS3)                 += dtbImage.ps3
 image-$(CONFIG_PPC_CELLEB)              += zImage.pseries
+image-$(CONFIG_PPC_CELL_QPACE)          += zImage.pseries
 image-$(CONFIG_PPC_CHRP)                += zImage.chrp
 image-$(CONFIG_PPC_EFIKA)               += zImage.chrp
 image-$(CONFIG_PPC_PMAC)                += zImage.pmac
diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c
index 5d12336dc360..a7e21a35c03a 100644
--- a/arch/powerpc/boot/devtree.c
+++ b/arch/powerpc/boot/devtree.c
@@ -213,7 +213,7 @@ static int find_range(u32 *reg, u32 *ranges, int nregaddr,
                 u32 range_addr[MAX_ADDR_CELLS];
                 u32 range_size[MAX_ADDR_CELLS];
 
-                copy_val(range_addr, ranges + i, naddr);
+                copy_val(range_addr, ranges + i, nregaddr);
                 copy_val(range_size, ranges + i + nregaddr + naddr, nsize);
 
                 if (compare_reg(reg, range_addr, range_size))
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 6235fca445de..524af7ef9f26 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -199,8 +199,26 @@
                                 reg = <0x2>;
                                 device_type = "ethernet-phy";
                         };
+
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+
                 enet0: ethernet@24000 {
                         cell-index = <0>;
                         device_type = "network";
@@ -210,6 +228,7 @@
                         local-mac-address = [ 00 08 e5 11 32 33 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         linux,network-index = <0>;
                 };
@@ -223,6 +242,7 @@
                         local-mac-address = [ 00 08 e5 11 32 34 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         linux,network-index = <1>;
                 };
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index 6ce0cc2c0208..aa68911f6560 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -269,7 +269,8 @@
                          * later cannot be changed. Chip supports a second
                          * IO range but we don't use it for now
                          */
-                        ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
+                        ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000
+                                  0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000
                                   0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
 
                         /* Inbound 2GB range starting at 0 */
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 79fe412c11c9..8b5ba8261a36 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -40,6 +40,7 @@
                         d-cache-size = <32768>;
                         dcr-controller;
                         dcr-access-method = "native";
+                        next-level-cache = <&L2C0>;
                 };
         };
 
@@ -104,6 +105,16 @@
                 dcr-reg = <0x00c 0x002>;
         };
 
+        L2C0: l2c {
+                compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
+                dcr-reg = <0x020 0x008          /* Internal SRAM DCR's */
+                           0x030 0x008>;        /* L2 cache DCR's */
+                cache-line-size = <32>;         /* 32 bytes */
+                cache-size = <262144>;          /* L2, 256K */
+                interrupt-parent = <&UIC1>;
+                interrupts = <11 1>;
+        };
+
         plb {
                 compatible = "ibm,plb-460ex", "ibm,plb4";
                 #address-cells = <2>;
@@ -343,6 +354,7 @@
                          * later cannot be changed
                          */
                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
+                                  0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
                                   0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
 
                         /* Inbound 2GB range starting at 0 */
@@ -373,6 +385,7 @@
                          * later cannot be changed
                          */
                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
+                                  0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 
                         /* Inbound 2GB range starting at 0 */
@@ -414,6 +427,7 @@
                          * later cannot be changed
                          */
                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
+                                  0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
 
                         /* Inbound 2GB range starting at 0 */
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index e48cfa740c8a..9708b3423bbd 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -98,6 +98,12 @@
                         interrupt-parent = <&mpic>;
 
                 };
+                gef_gpio: gpio@7,14000 {
+                        #gpio-cells = <2>;
+                        compatible = "gef,sbc610-gpio";
+                        reg = <0x7 0x14000 0x24>;
+                        gpio-controller;
+                };
         };
 
         soc@fef00000 {
@@ -119,6 +125,11 @@
                         interrupt-parent = <&mpic>;
                         dfsrr;
 
+                        rtc@51 {
+                                compatible = "epson,rx8581";
+                                reg = <0x00000051>;
+                        };
+
                         eti@6b {
                                 compatible = "dallas,ds1682";
                                 reg = <0x6b>;
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index 49737589ffc8..3bfff47418db 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -141,8 +141,26 @@
                                 reg = <0x2>;
                                 device_type = "ethernet-phy";
                         };
+
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+
                 enet0: ethernet@24000 {
                         device_type = "network";
                         model = "TSEC";
@@ -152,6 +170,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&PHY1>;
                 };
 
@@ -164,6 +183,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&PHY2>;
                 };
 
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 2e5a1a1812b6..8d725d10882f 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -76,7 +76,6 @@ XXXX add flash parts, rtc, ??
                         interrupt-parent = <&mpic>;
 
                         rtc@32 {
-                                device_type = "rtc";
                                 compatible = "ricoh,rs5c372a";
                                 reg = <0x32>;
                         };
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index e4916e69ad31..b13a11eb81b0 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -76,7 +76,6 @@ XXXX add flash parts, rtc, ??
                         interrupt-parent = <&mpic>;
 
                         rtc@32 {
-                                device_type = "rtc";
                                 compatible = "ricoh,rs5c372a";
                                 reg = <0x32>;
                         };
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 2cf9a8768f44..3f7a5dce8de0 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -130,7 +130,6 @@
 
                 rtc@800 {       // Real time clock
                         compatible = "fsl,mpc5200-rtc";
-                        device_type = "rtc";
                         reg = <0x800 0x100>;
                         interrupts = <1 5 0 1 6 0>;
                         interrupt-parent = <&mpc5200_pic>;
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 7bd5b9c399b8..63e3bb48e843 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -130,7 +130,6 @@
 
                 rtc@800 {       // Real time clock
                         compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
-                        device_type = "rtc";
                         reg = <0x800 0x100>;
                         interrupts = <1 5 0 1 6 0>;
                         interrupt-parent = <&mpc5200_pic>;
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 9e3c921be164..52ba6f98b273 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -248,7 +248,6 @@
                         fsl5200-clocking;
 
                         rtc@68 {
-                                device_type = "rtc";
                                 compatible = "dallas,ds1339";
                                 reg = <0x68>;
                         };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 503031766825..d4df8b6857a4 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -190,6 +190,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 0x8 36 0x8 35 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = < &tbi0 >;
                         phy-handle = < &phy1 >;
                         fsl,magic-packet;
 
@@ -210,6 +211,10 @@
                                         reg = <0x4>;
                                         device_type = "ethernet-phy";
                                 };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
                         };
                 };
 
@@ -222,9 +227,24 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <34 0x8 33 0x8 32 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = < &tbi1 >;
                         phy-handle = < &phy4 >;
                         sleep = <&pmc 0x10000000>;
                         fsl,magic-packet;
+
+                        mdio@25520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x25520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+
+
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 6b850670de1d..072c9b0f8c8e 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -117,7 +117,6 @@
                         interrupt-parent = <&ipic>;
                         dfsrr;
                         rtc@68 {
-                                device_type = "rtc";
                                 compatible = "dallas,ds1339";
                                 reg = <0x68>;
                         };
@@ -206,8 +205,25 @@
                                 reg = <0x1>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+
                 enet0: ethernet@24000 {
                         cell-index = <0>;
                         device_type = "network";
@@ -217,6 +233,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = < &phy0 >;
                 };
 
@@ -229,6 +246,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = < &phy1 >;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 4bdbaf4993a1..b5eda94a8e2a 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -85,7 +85,6 @@
                         dfsrr;
 
                         rtc@68 {
-                                device_type = "rtc";
                                 compatible = "dallas,ds1339";
                                 reg = <0x68>;
                                 interrupts = <18 0x8>;
@@ -184,6 +183,22 @@
                                 reg = <0x1c>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -195,6 +210,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy1c>;
                         linux,network-index = <0>;
                 };
@@ -211,6 +227,7 @@
                         /* Vitesse 7385 isn't on the MDIO bus */
                         fixed-link = <1 1 1000 0 0>;
                         linux,network-index = <1>;
+                        tbi-handle = <&tbi1>;
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index fa40647ee62e..c87a6015e165 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -83,7 +83,6 @@
                         dfsrr;
 
                         rtc@68 {
-                                device_type = "rtc";
                                 compatible = "dallas,ds1339";
                                 reg = <0x68>;
                                 interrupts = <18 0x8>;
@@ -163,6 +162,10 @@
                                 reg = <0x1c>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -174,6 +177,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy1c>;
                         linux,network-index = <0>;
                 };
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index c986c541e9bb..d9adba01c09c 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -185,8 +185,25 @@
                                 reg = <0x1>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+
                 enet0: ethernet@24000 {
                         cell-index = <0>;
                         device_type = "network";
@@ -196,6 +213,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         linux,network-index = <0>;
                 };
@@ -209,6 +227,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         linux,network-index = <1>;
                 };
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 0484561bd2c0..1d14d7052e6d 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -193,8 +193,25 @@
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+
                 enet0: ethernet@24000 {
                         cell-index = <0>;
                         device_type = "network";
@@ -205,6 +222,7 @@
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -218,6 +236,7 @@
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 435ef3dd022d..9413af3b9925 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -117,7 +117,6 @@
                         interrupt-parent = <&ipic>;
                         dfsrr;
                         rtc@68 {
-                                device_type = "rtc";
                                 compatible = "dallas,ds1339";
                                 reg = <0x68>;
                         };
@@ -211,8 +210,25 @@
                                 reg = <0x2>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+
                 enet0: ethernet@24000 {
                         cell-index = <0>;
                         device_type = "network";
@@ -223,6 +239,7 @@
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -237,6 +254,7 @@
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         fixed-link = <1 1 1000 0 0>;
+                        tbi-handle = <&tbi1>;
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 67a08d2e2ff2..b85fc02682d2 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -232,8 +232,25 @@
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+
                 enet0: ethernet@24000 {
                         cell-index = <0>;
                         device_type = "network";
@@ -244,6 +261,7 @@
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -257,6 +275,7 @@
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index b11e68f56a06..23c10ce22c2c 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -117,7 +117,6 @@
                         interrupt-parent = <&ipic>;
                         dfsrr;
                         rtc@68 {
-                                device_type = "rtc";
                                 compatible = "dallas,ds1339";
                                 reg = <0x68>;
                         };
@@ -211,8 +210,25 @@
                                 reg = <0x2>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+
                 enet0: ethernet@24000 {
                         cell-index = <0>;
                         device_type = "network";
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 323370a2b5ff..acf06c438dbf 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -232,6 +232,22 @@
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -244,6 +260,7 @@
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -257,6 +274,7 @@
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 337af6ea26d3..72cdc3c4c7e3 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -117,7 +117,6 @@
                         interrupt-parent = <&ipic>;
                         dfsrr;
                         rtc@68 {
-                                device_type = "rtc";
                                 compatible = "dallas,ds1339";
                                 reg = <0x68>;
                         };
@@ -211,6 +210,22 @@
                                 reg = <0x2>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -223,6 +238,7 @@
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -237,6 +253,7 @@
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         fixed-link = <1 1 1000 0 0>;
+                        tbi-handle = <&tbi1>;
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 35db1e5440c7..3c905df1812c 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -155,6 +155,22 @@
                                 reg = <1>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 usb@22000 {
@@ -186,6 +202,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -199,6 +216,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
                 };
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 9568bfaff8f7..79570ffe41b9 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -150,6 +150,34 @@
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -161,6 +189,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                 };
 
@@ -173,6 +202,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
@@ -185,6 +215,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <41 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
                         phy-handle = <&phy3>;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 6480f4fd96e0..221036a8ce23 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -144,6 +144,22 @@
                                 reg = <0x1>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -155,6 +171,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                 };
 
@@ -167,6 +184,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index f1fb20737e3e..b9da42105066 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -116,8 +116,26 @@
                                 reg = <0x1>;
                                 device_type = "ethernet-phy";
                         };
+
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+
                 dma@21300 {
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -169,6 +187,7 @@
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy0>;
+                        tbi-handle = <&tbi0>;
                         phy-connection-type = "rgmii-id";
                 };
 
@@ -182,6 +201,7 @@
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy1>;
+                        tbi-handle = <&tbi1>;
                         phy-connection-type = "rgmii-id";
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 431b496270dc..df774a7088ff 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -172,6 +172,46 @@
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@27520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x27520 0x20>;
+
+                        tbi3: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -183,6 +223,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                 };
 
@@ -195,6 +236,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
@@ -208,6 +250,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
                 };
 
@@ -220,6 +263,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
                 };
  */
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index d833a5c4f476..053b01e1c93b 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -144,6 +144,22 @@
                                 reg = <0x1>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -155,6 +171,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                 };
 
@@ -167,6 +184,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 4d1f2f284094..11b1bcbe14ce 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -145,6 +145,22 @@
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -156,6 +172,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                 };
 
@@ -168,6 +185,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index c80158f7741d..1955bd9e113d 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -179,6 +179,22 @@
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -190,6 +206,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -202,6 +219,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
                 };
 
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 5c69b2fafd32..21459e161d02 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -63,6 +63,119 @@
                 device_type = "memory";
         };
 
+        localbus@ffe05000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+                reg = <0 0xffe05000 0 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+
+                ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
+                          0x1 0x0 0x0 0xe0000000 0x08000000
+                          0x2 0x0 0x0 0xffa00000 0x00040000
+                          0x3 0x0 0x0 0xffdf0000 0x00008000
+                          0x4 0x0 0x0 0xffa40000 0x00040000
+                          0x5 0x0 0x0 0xffa80000 0x00040000
+                          0x6 0x0 0x0 0xffac0000 0x00040000>;
+
+                nor@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0x0 0x0 0x8000000>;
+                        bank-width = <2>;
+                        device-width = <1>;
+
+                        ramdisk@0 {
+                                reg = <0x0 0x03000000>;
+                                readl-only;
+                        };
+
+                        diagnostic@3000000 {
+                                reg = <0x03000000 0x00e00000>;
+                                read-only;
+                        };
+
+                        dink@3e00000 {
+                                reg = <0x03e00000 0x00200000>;
+                                read-only;
+                        };
+
+                        kernel@4000000 {
+                                reg = <0x04000000 0x00400000>;
+                                read-only;
+                        };
+
+                        jffs2@4400000 {
+                                reg = <0x04400000 0x03b00000>;
+                        };
+
+                        dtb@7f00000 {
+                                reg = <0x07f00000 0x00080000>;
+                                read-only;
+                        };
+
+                        u-boot@7f80000 {
+                                reg = <0x07f80000 0x00080000>;
+                                read-only;
+                        };
+                };
+
+                nand@2,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x2 0x0 0x40000>;
+
+                        u-boot@0 {
+                                reg = <0x0 0x02000000>;
+                                read-only;
+                        };
+
+                        jffs2@2000000 {
+                                reg = <0x02000000 0x10000000>;
+                        };
+
+                        ramdisk@12000000 {
+                                reg = <0x12000000 0x08000000>;
+                                read-only;
+                        };
+
+                        kernel@1a000000 {
+                                reg = <0x1a000000 0x04000000>;
+                        };
+
+                        dtb@1e000000 {
+                                reg = <0x1e000000 0x01000000>;
+                                read-only;
+                        };
+
+                        empty@1f000000 {
+                                reg = <0x1f000000 0x21000000>;
+                        };
+                };
+
+                nand@4,0 {
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x4 0x0 0x40000>;
+                };
+
+                nand@5,0 {
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x5 0x0 0x40000>;
+                };
+
+                nand@6,0 {
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x6 0x0 0x40000>;
+                };
+        };
+
         soc8572@ffe00000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -225,6 +338,47 @@
                                 interrupts = <10 1>;
                                 reg = <0x3>;
                         };
+
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@27520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x27520 0x20>;
+
+                        tbi3: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -236,6 +390,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -249,6 +404,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -262,6 +418,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -275,6 +432,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
                         phy-connection-type = "rgmii-id";
                 };
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
new file mode 100644
index 000000000000..c114c4ee9931
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -0,0 +1,483 @@
+/*
+ * MPC8572 DS Core0 Device Tree Source in CAMP mode.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
+ * eth1, crypto, pci0, pci1.
+ *
+ * Copyright 2007, 2008 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+        model = "fsl,MPC8572DS";
+        compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                pci0 = &pci0;
+                pci1 = &pci1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0>;        // Filled by U-Boot
+        };
+
+        soc8572@ffe00000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "simple-bus";
+                ranges = <0x0 0xffe00000 0x100000>;
+                reg = <0xffe00000 0x1000>;      // CCSRBAR & soc regs, remove once parse code for immrbase fixed
+                bus-frequency = <0>;            // Filled out by uboot.
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                memory-controller@6000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x6000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8572-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x80000>; // L2, 512K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-mdio";
+                        reg = <0x24520 0x20>;
+
+                        phy0: ethernet-phy@0 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <10 1>;
+                                reg = <0x0>;
+                        };
+                        phy1: ethernet-phy@1 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <10 1>;
+                                reg = <0x1>;
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                enet1: ethernet@25000 {
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                };
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8572-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                crypto@30000 {
+                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+                                     "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <45 2 58 2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0x9fe>;
+                        fsl,descriptor-types-mask = <0x3ab0ebf>;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                        protected-sources = <
+                        31 32 33 37 38 39       /* enet2 enet3 */
+                        76 77 78 79 27 42       /* dma2 pci2 serial*/
+                        0xe0 0xe1 0xe2 0xe3     /* msi */
+                        0xe4 0xe5 0xe6 0xe7
+                        >;
+                };
+        };
+
+        pci0: pcie@ffe08000 {
+                cell-index = <0>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xffe08000 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
+                          0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x11 func 0 - PCI slot 1 */
+                        0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 1 - PCI slot 1 */
+                        0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 2 - PCI slot 1 */
+                        0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 3 - PCI slot 1 */
+                        0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 4 - PCI slot 1 */
+                        0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 5 - PCI slot 1 */
+                        0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 6 - PCI slot 1 */
+                        0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 7 - PCI slot 1 */
+                        0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x12 func 0 - PCI slot 2 */
+                        0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 1 - PCI slot 2 */
+                        0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 2 - PCI slot 2 */
+                        0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 3 - PCI slot 2 */
+                        0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 4 - PCI slot 2 */
+                        0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 5 - PCI slot 2 */
+                        0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 6 - PCI slot 2 */
+                        0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 7 - PCI slot 2 */
+                        0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        // IDSEL 0x1c  USB
+                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
+                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
+                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
+                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
+
+                        // IDSEL 0x1d  Audio
+                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
+
+                        // IDSEL 0x1e Legacy
+                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
+                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
+
+                        // IDSEL 0x1f IDE/SATA
+                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
+                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
+
+                        >;
+
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                        uli1575@0 {
+                                reg = <0x0 0x0 0x0 0x0 0x0>;
+                                #size-cells = <2>;
+                                #address-cells = <3>;
+                                ranges = <0x2000000 0x0 0x80000000
+                                          0x2000000 0x0 0x80000000
+                                          0x0 0x20000000
+
+                                          0x1000000 0x0 0x0
+                                          0x1000000 0x0 0x0
+                                          0x0 0x100000>;
+                                isa@1e {
+                                        device_type = "isa";
+                                        #interrupt-cells = <2>;
+                                        #size-cells = <1>;
+                                        #address-cells = <2>;
+                                        reg = <0xf000 0x0 0x0 0x0 0x0>;
+                                        ranges = <0x1 0x0 0x1000000 0x0 0x0
+                                                  0x1000>;
+                                        interrupt-parent = <&i8259>;
+
+                                        i8259: interrupt-controller@20 {
+                                                reg = <0x1 0x20 0x2
+                                                       0x1 0xa0 0x2
+                                                       0x1 0x4d0 0x2>;
+                                                interrupt-controller;
+                                                device_type = "interrupt-controller";
+                                                #address-cells = <0>;
+                                                #interrupt-cells = <2>;
+                                                compatible = "chrp,iic";
+                                                interrupts = <9 2>;
+                                                interrupt-parent = <&mpic>;
+                                        };
+
+                                        i8042@60 {
+                                                #size-cells = <0>;
+                                                #address-cells = <1>;
+                                                reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
+                                                interrupts = <1 3 12 3>;
+                                                interrupt-parent =
+                                                        <&i8259>;
+
+                                                keyboard@0 {
+                                                        reg = <0x0>;
+                                                        compatible = "pnpPNP,303";
+                                                };
+
+                                                mouse@1 {
+                                                        reg = <0x1>;
+                                                        compatible = "pnpPNP,f03";
+                                                };
+                                        };
+
+                                        rtc@70 {
+                                                compatible = "pnpPNP,b00";
+                                                reg = <0x1 0x70 0x2>;
+                                        };
+
+                                        gpio@400 {
+                                                reg = <0x1 0x400 0x80>;
+                                        };
+                                };
+                        };
+                };
+
+        };
+
+        pci1: pcie@ffe09000 {
+                cell-index = <1>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xffe09000 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
+                          0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xa0000000
+                                  0x2000000 0x0 0xa0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
new file mode 100644
index 000000000000..04ecda18d206
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -0,0 +1,234 @@
+/*
+ * MPC8572 DS Core1 Device Tree Source in CAMP mode.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts allows core1 to have l2, dma2, eth2, eth3, pci2, msi.
+ *
+ * Please note to add "-b 1" for core1's dts compiling.
+ *
+ * Copyright 2007, 2008 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+        model = "fsl,MPC8572DS";
+        compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                serial0 = &serial0;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0>;        // Filled by U-Boot
+        };
+
+        soc8572@ffe00000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "simple-bus";
+                ranges = <0x0 0xffe00000 0x100000>;
+                reg = <0xffe00000 0x1000>;      // CCSRBAR & soc regs, remove once parse code for immrbase fixed
+                bus-frequency = <0>;            // Filled out by uboot.
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8572-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x80000>; // L2, 512K
+                        interrupt-parent = <&mpic>;
+                };
+
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0xc300 0x4>;
+                        ranges = <0x0 0xc100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <76 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <77 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <78 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <79 2>;
+                        };
+                };
+
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-mdio";
+                        reg = <0x24520 0x20>;
+
+                        phy2: ethernet-phy@2 {
+                                interrupt-parent = <&mpic>;
+                                reg = <0x2>;
+                        };
+                        phy3: ethernet-phy@3 {
+                                interrupt-parent = <&mpic>;
+                                reg = <0x3>;
+                        };
+                };
+
+                enet2: ethernet@26000 {
+                        cell-index = <2>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy2>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                enet3: ethernet@27000 {
+                        cell-index = <3>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x27000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <37 2 38 2 39 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy3>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                msi@41600 {
+                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial0: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                        protected-sources = <
+                        18 16 10 42 45 58       /* MEM L2 mdio serial crypto */
+                        29 30 34 35 36 40       /* enet0 enet1 */
+                        24 26 20 21 22 23       /* pcie0 pcie1 dma1 */
+                        43                      /* i2c */
+                        0x1 0x2 0x3 0x4         /* pci slot */
+                        0x9 0xa 0xb 0xc         /* usb */
+                        0x6 0x7 0xe 0x5         /* Audio elgacy SATA */
+                        >;
+                };
+        };
+
+        pci2: pcie@ffe0a000 {
+                cell-index = <2>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xffe0a000 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
+                          0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <27 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index d665e767822a..35d5e248ccd7 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -205,8 +205,49 @@
                                 reg = <3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@27520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x27520 0x20>;
+
+                        tbi3: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
+
                 enet0: ethernet@24000 {
                         cell-index = <0>;
                         device_type = "network";
@@ -216,6 +257,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30  2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -229,6 +271,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -242,6 +285,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -255,6 +299,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
                         phy-connection-type = "rgmii-id";
                 };
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 7c1bb952360c..be2c11ca0594 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -143,7 +143,6 @@
 
                 rtc@800 {       // Real time clock
                         compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
-                        device_type = "rtc";
                         reg = <0x800 0x100>;
                         interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>;
                         interrupt-parent = <&mpc5200_pic>;
@@ -301,7 +300,6 @@
                         interrupt-parent = <&mpc5200_pic>;
                         fsl5200-clocking;
                         rtc@51 {
-                                device_type = "rtc";
                                 compatible = "nxp,pcf8563";
                                 reg = <0x51>;
                         };
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 0f941f310e44..8d365a57ebc1 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -177,6 +177,22 @@
                                 reg = <0x1a>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -188,6 +204,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         linux,network-index = <0>;
                 };
@@ -201,6 +218,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         linux,network-index = <1>;
                 };
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 333552b4e90d..2baf4a51f224 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -252,6 +252,22 @@
                                 reg = <0x1a>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -263,6 +279,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                 };
 
@@ -275,6 +292,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index db3632ef9888..01542f7062ab 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -168,6 +168,22 @@
                                 reg = <0x1c>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -179,6 +195,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                 };
 
@@ -191,6 +208,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 9652456158fb..36db981548e4 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -222,6 +222,46 @@
                                 reg = <2>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@27520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x27520 0x20>;
+
+                        tbi3: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -233,6 +273,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30  2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -246,6 +287,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -259,6 +301,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -272,6 +315,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
                         phy-connection-type = "rgmii-id";
                 };
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index fcd1db6ca0a8..fff33fe6efc6 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -142,6 +142,22 @@
                                 reg = <4>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -153,6 +169,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -165,6 +182,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy4>;
                 };
 
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 3008bf8830c1..906302e26a62 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -181,7 +181,6 @@
                         fsl5200-clocking;
 
                          rtc@68 {
-                                device_type = "rtc";
                                 compatible = "dallas,ds1307";
                                 reg = <0x68>;
                         };
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index e1d260b9085e..a693f01c21aa 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -155,6 +155,34 @@
                                 reg = <3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index d76441ec5dc7..9e3f5f0dde20 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -154,6 +154,22 @@
                                 reg = <3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -165,6 +181,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -177,6 +194,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 4199e89b4e50..15086eb65c50 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -179,6 +179,46 @@
                                 reg = <5>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@27520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x27520 0x20>;
+
+                        tbi3: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -190,6 +230,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -202,6 +243,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
@@ -214,6 +256,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
                         phy-handle = <&phy3>;
                 };
 
@@ -226,6 +269,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
                         phy-handle = <&phy4>;
                 };
 
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 58ee4185454b..b7b65f5e79b6 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -179,6 +179,46 @@
                                 reg = <5>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@27520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x27520 0x20>;
+
+                        tbi3: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -190,6 +230,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -202,6 +243,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
@@ -214,6 +256,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
                         phy-handle = <&phy3>;
                 };
 
@@ -226,6 +269,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
                         phy-handle = <&phy4>;
                 };
 
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 6f7ea59c4846..cf92b4e7945e 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -154,6 +154,22 @@
                                 reg = <3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -165,6 +181,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -177,6 +194,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 3fe35208907b..9e1ab2d2f669 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -156,6 +156,22 @@
                                 reg = <3>;
                                 device_type = "ethernet-phy";
                         };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x25520 0x20>;
+
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -167,6 +183,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
                 };
 
@@ -179,6 +196,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                 };
 
diff --git a/arch/powerpc/boot/libfdt-wrapper.c b/arch/powerpc/boot/libfdt-wrapper.c
index 9276327bc2bb..bb8b9b3505ee 100644
--- a/arch/powerpc/boot/libfdt-wrapper.c
+++ b/arch/powerpc/boot/libfdt-wrapper.c
@@ -185,7 +185,7 @@ void fdt_init(void *blob)
 
         /* Make sure the dt blob is the right version and so forth */
         fdt = blob;
-        bufsize = fdt_totalsize(fdt) + 4;
+        bufsize = fdt_totalsize(fdt) + EXPAND_GRANULARITY;
         buf = malloc(bufsize);
         if(!buf)
                 fatal("malloc failed. can't relocate the device tree\n\r");
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index 07ccaf89f379..cd1ffa449327 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -1397,8 +1397,11 @@ CONFIG_USB_STORAGE=y
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 # CONFIG_EDAC is not set
-CONFIG_RTC_LIB=m
-CONFIG_RTC_CLASS=m
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
 
 #
 # RTC interfaces
@@ -1424,6 +1427,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_M41T80 is not set
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
+CONFIG_RTC_DRV_RX8581=y
 
 #
 # SPI RTC drivers
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index cfc94cfcf4cb..034a1fbdc887 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -267,7 +267,7 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCCARD is not set
 # CONFIG_HOTPLUG_PCI is not set
@@ -354,7 +354,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_IP_SCTP is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
+CONFIG_BRIDGE=m
 # CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
@@ -579,7 +579,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
+CONFIG_TUN=m
 # CONFIG_VETH is not set
 # CONFIG_ARCNET is not set
 # CONFIG_PHYLIB is not set
@@ -1001,11 +1001,11 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
 #
 
 #
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
 #
 CONFIG_USB_STORAGE=m
 # CONFIG_USB_STORAGE_DEBUG is not set
@@ -1418,6 +1418,6 @@ CONFIG_CRYPTO_LZO=m
 # CONFIG_PPC_CLOCK is not set
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
-CONFIG_KVM_BOOKE_HOST=y
+CONFIG_KVM_440=y
 # CONFIG_VIRTIO_PCI is not set
 # CONFIG_VIRTIO_BALLOON is not set
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index f3fc733758f5..b401950f5259 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -5,7 +5,7 @@
  * PowerPC atomic operations
  */
 
-typedef struct { int counter; } atomic_t;
+#include <linux/types.h>
 
 #ifdef __KERNEL__
 #include <linux/compiler.h>
@@ -111,7 +111,7 @@ static __inline__ void atomic_inc(atomic_t *v)
         bne-    1b"
         : "=&r" (t), "+m" (v->counter)
         : "r" (&v->counter)
-        : "cc");
+        : "cc", "xer");
 }
 
 static __inline__ int atomic_inc_return(atomic_t *v)
@@ -128,7 +128,7 @@ static __inline__ int atomic_inc_return(atomic_t *v)
         ISYNC_ON_SMP
         : "=&r" (t)
         : "r" (&v->counter)
-        : "cc", "memory");
+        : "cc", "xer", "memory");
 
         return t;
 }
@@ -155,7 +155,7 @@ static __inline__ void atomic_dec(atomic_t *v)
         bne-    1b"
         : "=&r" (t), "+m" (v->counter)
         : "r" (&v->counter)
-        : "cc");
+        : "cc", "xer");
 }
 
 static __inline__ int atomic_dec_return(atomic_t *v)
@@ -172,7 +172,7 @@ static __inline__ int atomic_dec_return(atomic_t *v)
         ISYNC_ON_SMP
         : "=&r" (t)
         : "r" (&v->counter)
-        : "cc", "memory");
+        : "cc", "xer", "memory");
 
         return t;
 }
@@ -251,8 +251,6 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
 
 #ifdef __powerpc64__
 
-typedef struct { long counter; } atomic64_t;
-
 #define ATOMIC64_INIT(i)        { (i) }
 
 static __inline__ long atomic64_read(const atomic64_t *v)
@@ -346,7 +344,7 @@ static __inline__ void atomic64_inc(atomic64_t *v)
         bne-    1b"
         : "=&r" (t), "+m" (v->counter)
         : "r" (&v->counter)
-        : "cc");
+        : "cc", "xer");
 }
 
 static __inline__ long atomic64_inc_return(atomic64_t *v)
@@ -362,7 +360,7 @@ static __inline__ long atomic64_inc_return(atomic64_t *v)
         ISYNC_ON_SMP
         : "=&r" (t)
         : "r" (&v->counter)
-        : "cc", "memory");
+        : "cc", "xer", "memory");
 
         return t;
 }
@@ -388,7 +386,7 @@ static __inline__ void atomic64_dec(atomic64_t *v)
         bne-    1b"
         : "=&r" (t), "+m" (v->counter)
         : "r" (&v->counter)
-        : "cc");
+        : "cc", "xer");
 }
 
 static __inline__ long atomic64_dec_return(atomic64_t *v)
@@ -404,7 +402,7 @@ static __inline__ long atomic64_dec_return(atomic64_t *v)
         ISYNC_ON_SMP
         : "=&r" (t)
         : "r" (&v->counter)
-        : "cc", "memory");
+        : "cc", "xer", "memory");
 
         return t;
 }
@@ -431,7 +429,7 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
         "\n\
 2:"     : "=&r" (t)
         : "r" (&v->counter)
-        : "cc", "memory");
+        : "cc", "xer", "memory");
 
         return t;
 }
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h
index e55d1f66b86f..64e1fdca233e 100644
--- a/arch/powerpc/include/asm/bug.h
+++ b/arch/powerpc/include/asm/bug.h
@@ -3,6 +3,7 @@
 #ifdef __KERNEL__
 
 #include <asm/asm-compat.h>
+
 /*
  * Define an illegal instr to trap on the bug.
  * We don't use 0 because that marks the end of a function
@@ -14,6 +15,7 @@
 #ifdef CONFIG_BUG
 
 #ifdef __ASSEMBLY__
+#include <asm/asm-offsets.h>
 #ifdef CONFIG_DEBUG_BUGVERBOSE
 .macro EMIT_BUG_ENTRY addr,file,line,flags
          .section __bug_table,"a"
@@ -26,7 +28,7 @@
          .previous
 .endm
 #else
- .macro EMIT_BUG_ENTRY addr,file,line,flags
+.macro EMIT_BUG_ENTRY addr,file,line,flags
          .section __bug_table,"a"
 5001:    PPC_LONG \addr
          .short \flags
@@ -113,6 +115,13 @@
 #define HAVE_ARCH_BUG_ON
 #define HAVE_ARCH_WARN_ON
 #endif /* __ASSEMBLY __ */
+#else
+#ifdef __ASSEMBLY__
+.macro EMIT_BUG_ENTRY addr,file,line,flags
+.endm
+#else /* !__ASSEMBLY__ */
+#define _EMIT_BUG_ENTRY
+#endif
 #endif /* CONFIG_BUG */
 
 #include <asm-generic/bug.h>
diff --git a/arch/powerpc/include/asm/byteorder.h b/arch/powerpc/include/asm/byteorder.h
index b37752214a16..d5de325472e9 100644
--- a/arch/powerpc/include/asm/byteorder.h
+++ b/arch/powerpc/include/asm/byteorder.h
@@ -11,6 +11,8 @@
 #include <asm/types.h>
 #include <linux/compiler.h>
 
+#define __BIG_ENDIAN
+
 #ifdef __GNUC__
 #ifdef __KERNEL__
 
@@ -21,12 +23,19 @@ static __inline__ __u16 ld_le16(const volatile __u16 *addr)
         __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
         return val;
 }
+#define __arch_swab16p ld_le16
 
 static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
 {
         __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
 }
 
+static inline void __arch_swab16s(__u16 *addr)
+{
+        st_le16(addr, *addr);
+}
+#define __arch_swab16s __arch_swab16s
+
 static __inline__ __u32 ld_le32(const volatile __u32 *addr)
 {
         __u32 val;
@@ -34,13 +43,20 @@ static __inline__ __u32 ld_le32(const volatile __u32 *addr)
         __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
         return val;
 }
+#define __arch_swab32p ld_le32
 
 static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
 {
         __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
 }
 
-static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value)
+static inline void __arch_swab32s(__u32 *addr)
+{
+        st_le32(addr, *addr);
+}
+#define __arch_swab32s __arch_swab32s
+
+static inline __attribute_const__ __u16 __arch_swab16(__u16 value)
 {
         __u16 result;
 
@@ -49,8 +65,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value)
             : "r" (value), "0" (value >> 8));
         return result;
 }
+#define __arch_swab16 __arch_swab16
 
-static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value)
+static inline __attribute_const__ __u32 __arch_swab32(__u32 value)
 {
         __u32 result;
 
@@ -61,29 +78,16 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value)
             : "r" (value), "0" (value >> 24));
         return result;
 }
-
-#define __arch__swab16(x) ___arch__swab16(x)
-#define __arch__swab32(x) ___arch__swab32(x)
-
-/* The same, but returns converted value from the location pointer by addr. */
-#define __arch__swab16p(addr) ld_le16(addr)
-#define __arch__swab32p(addr) ld_le32(addr)
-
-/* The same, but do the conversion in situ, ie. put the value back to addr. */
-#define __arch__swab16s(addr) st_le16(addr,*addr)
-#define __arch__swab32s(addr) st_le32(addr,*addr)
+#define __arch_swab32 __arch_swab32
 
 #endif /* __KERNEL__ */
 
-#ifndef __STRICT_ANSI__
-#define __BYTEORDER_HAS_U64__
 #ifndef __powerpc64__
 #define __SWAB_64_THRU_32__
 #endif /* __powerpc64__ */
-#endif /* __STRICT_ANSI__ */
 
 #endif /* __GNUC__ */
 
-#include <linux/byteorder/big_endian.h>
+#include <linux/byteorder.h>
 
 #endif /* _ASM_POWERPC_BYTEORDER_H */
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 1e94b07a020e..4911104791c3 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -82,6 +82,7 @@ struct cpu_spec {
         char            *cpu_name;
         unsigned long   cpu_features;           /* Kernel features */
         unsigned int    cpu_user_features;      /* Userland features */
+        unsigned int    mmu_features;           /* MMU features */
 
         /* cache line sizes */
         unsigned int    icache_bsize;
@@ -144,17 +145,14 @@ extern const char *powerpc_base_platform;
 #define CPU_FTR_USE_TB                  ASM_CONST(0x0000000000000040)
 #define CPU_FTR_L2CSR                   ASM_CONST(0x0000000000000080)
 #define CPU_FTR_601                     ASM_CONST(0x0000000000000100)
-#define CPU_FTR_HPTE_TABLE              ASM_CONST(0x0000000000000200)
 #define CPU_FTR_CAN_NAP                 ASM_CONST(0x0000000000000400)
 #define CPU_FTR_L3CR                    ASM_CONST(0x0000000000000800)
 #define CPU_FTR_L3_DISABLE_NAP          ASM_CONST(0x0000000000001000)
 #define CPU_FTR_NAP_DISABLE_L2_PR       ASM_CONST(0x0000000000002000)
 #define CPU_FTR_DUAL_PLL_750FX          ASM_CONST(0x0000000000004000)
 #define CPU_FTR_NO_DPM                  ASM_CONST(0x0000000000008000)
-#define CPU_FTR_HAS_HIGH_BATS           ASM_CONST(0x0000000000010000)
 #define CPU_FTR_NEED_COHERENT           ASM_CONST(0x0000000000020000)
 #define CPU_FTR_NO_BTIC                 ASM_CONST(0x0000000000040000)
-#define CPU_FTR_BIG_PHYS                ASM_CONST(0x0000000000080000)
 #define CPU_FTR_NODSISRALIGN            ASM_CONST(0x0000000000100000)
 #define CPU_FTR_PPC_LE                  ASM_CONST(0x0000000000200000)
 #define CPU_FTR_REAL_LE                 ASM_CONST(0x0000000000400000)
@@ -163,6 +161,8 @@ extern const char *powerpc_base_platform;
 #define CPU_FTR_SPE                     ASM_CONST(0x0000000002000000)
 #define CPU_FTR_NEED_PAIRED_STWCX       ASM_CONST(0x0000000004000000)
 #define CPU_FTR_LWSYNC                  ASM_CONST(0x0000000008000000)
+#define CPU_FTR_NOEXECUTE               ASM_CONST(0x0000000010000000)
+#define CPU_FTR_INDEXED_DCR             ASM_CONST(0x0000000020000000)
 
 /*
  * Add the 64-bit processor unique features in the top half of the word;
@@ -177,7 +177,6 @@ extern const char *powerpc_base_platform;
 #define CPU_FTR_SLB                     LONG_ASM_CONST(0x0000000100000000)
 #define CPU_FTR_16M_PAGE                LONG_ASM_CONST(0x0000000200000000)
 #define CPU_FTR_TLBIEL                  LONG_ASM_CONST(0x0000000400000000)
-#define CPU_FTR_NOEXECUTE               LONG_ASM_CONST(0x0000000800000000)
 #define CPU_FTR_IABR                    LONG_ASM_CONST(0x0000002000000000)
 #define CPU_FTR_MMCRA                   LONG_ASM_CONST(0x0000004000000000)
 #define CPU_FTR_CTRL                    LONG_ASM_CONST(0x0000008000000000)
@@ -194,6 +193,7 @@ extern const char *powerpc_base_platform;
 #define CPU_FTR_VSX                     LONG_ASM_CONST(0x0010000000000000)
 #define CPU_FTR_SAO                     LONG_ASM_CONST(0x0020000000000000)
 #define CPU_FTR_CP_USE_DCBTZ            LONG_ASM_CONST(0x0040000000000000)
+#define CPU_FTR_UNALIGNED_LD_STD        LONG_ASM_CONST(0x0080000000000000)
 
 #ifndef __ASSEMBLY__
 
@@ -264,164 +264,159 @@ extern const char *powerpc_base_platform;
                      !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
                      !defined(CONFIG_BOOKE))
 
-#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE | \
+#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | \
         CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE)
 #define CPU_FTRS_603    (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
 #define CPU_FTRS_604    (CPU_FTR_COMMON | \
-            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_PPC_LE)
+            CPU_FTR_USE_TB | CPU_FTR_PPC_LE)
 #define CPU_FTRS_740_NOTAU      (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
+            CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
 #define CPU_FTRS_740    (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
-            CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
+            CPU_FTR_TAU | CPU_FTR_MAYBE_CAN_NAP | \
             CPU_FTR_PPC_LE)
 #define CPU_FTRS_750    (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
-            CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
+            CPU_FTR_TAU | CPU_FTR_MAYBE_CAN_NAP | \
             CPU_FTR_PPC_LE)
-#define CPU_FTRS_750CL  (CPU_FTRS_750 | CPU_FTR_HAS_HIGH_BATS)
+#define CPU_FTRS_750CL  (CPU_FTRS_750)
 #define CPU_FTRS_750FX1 (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM)
 #define CPU_FTRS_750FX2 (CPU_FTRS_750 | CPU_FTR_NO_DPM)
-#define CPU_FTRS_750FX  (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | \
-                CPU_FTR_HAS_HIGH_BATS)
+#define CPU_FTRS_750FX  (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX)
 #define CPU_FTRS_750GX  (CPU_FTRS_750FX)
 #define CPU_FTRS_7400_NOTAU     (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
-            CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \
+            CPU_FTR_ALTIVEC_COMP | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
 #define CPU_FTRS_7400   (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
-            CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \
+            CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
 #define CPU_FTRS_7450_20        (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
+            CPU_FTR_L3CR | CPU_FTR_SPEC7450 | \
             CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
 #define CPU_FTRS_7450_21        (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
+            CPU_FTR_L3CR | CPU_FTR_SPEC7450 | \
             CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \
             CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
 #define CPU_FTRS_7450_23        (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
+            CPU_FTR_L3CR | CPU_FTR_SPEC7450 | \
             CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
 #define CPU_FTRS_7455_1 (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \
             CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS | \
-            CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
+            CPU_FTR_SPEC7450 | CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
 #define CPU_FTRS_7455_20        (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
+            CPU_FTR_L3CR | CPU_FTR_SPEC7450 | \
             CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \
-            CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE)
+            CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
 #define CPU_FTRS_7455   (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
-            CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
+            CPU_FTR_L3CR | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
             CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
 #define CPU_FTRS_7447_10        (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
-            CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
+            CPU_FTR_L3CR | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
             CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC | CPU_FTR_PPC_LE | \
             CPU_FTR_NEED_PAIRED_STWCX)
 #define CPU_FTRS_7447   (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
-            CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
+            CPU_FTR_L3CR | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
             CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
 #define CPU_FTRS_7447A  (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
-            CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
+            CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
             CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
 #define CPU_FTRS_7448   (CPU_FTR_COMMON | \
             CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
-            CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
+            CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
             CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
 #define CPU_FTRS_82XX   (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB)
 #define CPU_FTRS_G2_LE  (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \
-            CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS)
+            CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP)
 #define CPU_FTRS_E300   (CPU_FTR_MAYBE_CAN_DOZE | \
-            CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \
+            CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | \
             CPU_FTR_COMMON)
 #define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \
-            CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \
+            CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | \
             CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE)
-#define CPU_FTRS_CLASSIC32      (CPU_FTR_COMMON | \
-            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE)
+#define CPU_FTRS_CLASSIC32      (CPU_FTR_COMMON | CPU_FTR_USE_TB)
 #define CPU_FTRS_8XX    (CPU_FTR_USE_TB)
-#define CPU_FTRS_40X    (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_44X    (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_40X    (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
+#define CPU_FTRS_44X    (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
+#define CPU_FTRS_440x6  (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE | \
+            CPU_FTR_INDEXED_DCR)
 #define CPU_FTRS_E200   (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
             CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
-            CPU_FTR_UNIFIED_ID_CACHE)
+            CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_E500   (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
-            CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN)
+            CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
+            CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
-            CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | \
-            CPU_FTR_NODSISRALIGN)
+            CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \
+            CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
-            CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN | \
-            CPU_FTR_L2CSR | CPU_FTR_LWSYNC)
+            CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
+            CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_GENERIC_32     (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
 
 /* 64-bit CPUs */
 #define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE)
+            CPU_FTR_IABR | CPU_FTR_PPC_LE)
 #define CPU_FTRS_RS64   (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | \
+            CPU_FTR_IABR | \
             CPU_FTR_MMCRA | CPU_FTR_CTRL)
 #define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ)
 #define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
             CPU_FTR_CP_USE_DCBTZ)
 #define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_MMCRA | CPU_FTR_SMT | \
             CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
             CPU_FTR_PURR)
 #define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_MMCRA | CPU_FTR_SMT | \
             CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
             CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
-            CPU_FTR_DSCR)
+            CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD)
 #define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_MMCRA | CPU_FTR_SMT | \
             CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
             CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
             CPU_FTR_DSCR | CPU_FTR_SAO)
 #define CPU_FTRS_CELL   (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
             CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \
-            CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ)
+            CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ | \
+            CPU_FTR_UNALIGNED_LD_STD)
 #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
+            CPU_FTR_PPCAS_ARCH_V2 | \
             CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
             CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B)
-#define CPU_FTRS_COMPATIBLE     (CPU_FTR_USE_TB | \
-            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
+#define CPU_FTRS_COMPATIBLE     (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2)
 
 #ifdef __powerpc64__
 #define CPU_FTRS_POSSIBLE       \
@@ -452,7 +447,7 @@ enum {
             CPU_FTRS_40X |
 #endif
 #ifdef CONFIG_44x
-            CPU_FTRS_44X |
+            CPU_FTRS_44X | CPU_FTRS_440x6 |
 #endif
 #ifdef CONFIG_E200
             CPU_FTRS_E200 |
@@ -492,7 +487,7 @@ enum {
             CPU_FTRS_40X &
 #endif
 #ifdef CONFIG_44x
-            CPU_FTRS_44X &
+            CPU_FTRS_44X & CPU_FTRS_440x6 &
 #endif
 #ifdef CONFIG_E200
             CPU_FTRS_E200 &
diff --git a/arch/powerpc/include/asm/dcr-native.h b/arch/powerpc/include/asm/dcr-native.h
index 72d2b72c7390..7d2e6235726d 100644
--- a/arch/powerpc/include/asm/dcr-native.h
+++ b/arch/powerpc/include/asm/dcr-native.h
@@ -23,6 +23,7 @@
 #ifndef __ASSEMBLY__
 
 #include <linux/spinlock.h>
+#include <asm/cputable.h>
 
 typedef struct {
         unsigned int base;
@@ -39,23 +40,45 @@ static inline bool dcr_map_ok_native(dcr_host_native_t host)
 #define dcr_read_native(host, dcr_n)            mfdcr(dcr_n + host.base)
 #define dcr_write_native(host, dcr_n, value)    mtdcr(dcr_n + host.base, value)
 
-/* Device Control Registers */
-void __mtdcr(int reg, unsigned int val);
-unsigned int __mfdcr(int reg);
+/* Table based DCR accessors */
+extern void __mtdcr(unsigned int reg, unsigned int val);
+extern unsigned int __mfdcr(unsigned int reg);
+
+/* mfdcrx/mtdcrx instruction based accessors. We hand code
+ * the opcodes in order not to depend on newer binutils
+ */
+static inline unsigned int mfdcrx(unsigned int reg)
+{
+        unsigned int ret;
+        asm volatile(".long 0x7c000206 | (%0 << 21) | (%1 << 16)"
+                     : "=r" (ret) : "r" (reg));
+        return ret;
+}
+
+static inline void mtdcrx(unsigned int reg, unsigned int val)
+{
+        asm volatile(".long 0x7c000306 | (%0 << 21) | (%1 << 16)"
+                     : : "r" (val), "r" (reg));
+}
+
 #define mfdcr(rn)                                               \
         ({unsigned int rval;                                    \
-        if (__builtin_constant_p(rn))                           \
+        if (__builtin_constant_p(rn) && rn < 1024)              \
                 asm volatile("mfdcr %0," __stringify(rn)        \
                               : "=r" (rval));                   \
+        else if (likely(cpu_has_feature(CPU_FTR_INDEXED_DCR)))  \
+                rval = mfdcrx(rn);                              \
         else                                                    \
                 rval = __mfdcr(rn);                             \
         rval;})
 
 #define mtdcr(rn, v)                                            \
 do {                                                            \
-        if (__builtin_constant_p(rn))                           \
+        if (__builtin_constant_p(rn) && rn < 1024)              \
                 asm volatile("mtdcr " __stringify(rn) ",%0"     \
                               : : "r" (v));                     \
+        else if (likely(cpu_has_feature(CPU_FTR_INDEXED_DCR)))  \
+                mtdcrx(rn, v);                                  \
         else                                                    \
                 __mtdcr(rn, v);                                 \
 } while (0)
@@ -69,8 +92,13 @@ static inline unsigned __mfdcri(int base_addr, int base_data, int reg)
         unsigned int val;
 
         spin_lock_irqsave(&dcr_ind_lock, flags);
-        __mtdcr(base_addr, reg);
-        val = __mfdcr(base_data);
+        if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
+                mtdcrx(base_addr, reg);
+                val = mfdcrx(base_data);
+        } else {
+                __mtdcr(base_addr, reg);
+                val = __mfdcr(base_data);
+        }
         spin_unlock_irqrestore(&dcr_ind_lock, flags);
         return val;
 }
@@ -81,8 +109,13 @@ static inline void __mtdcri(int base_addr, int base_data, int reg,
         unsigned long flags;
 
         spin_lock_irqsave(&dcr_ind_lock, flags);
-        __mtdcr(base_addr, reg);
-        __mtdcr(base_data, val);
+        if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
+                mtdcrx(base_addr, reg);
+                mtdcrx(base_data, val);
+        } else {
+                __mtdcr(base_addr, reg);
+                __mtdcr(base_data, val);
+        }
         spin_unlock_irqrestore(&dcr_ind_lock, flags);
 }
 
@@ -93,9 +126,15 @@ static inline void __dcri_clrset(int base_addr, int base_data, int reg,
         unsigned int val;
 
         spin_lock_irqsave(&dcr_ind_lock, flags);
-        __mtdcr(base_addr, reg);
-        val = (__mfdcr(base_data) & ~clr) | set;
-        __mtdcr(base_data, val);
+        if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
+                mtdcrx(base_addr, reg);
+                val = (mfdcrx(base_data) & ~clr) | set;
+                mtdcrx(base_data, val);
+        } else {
+                __mtdcr(base_addr, reg);
+                val = (__mfdcr(base_data) & ~clr) | set;
+                __mtdcr(base_data, val);
+        }
         spin_unlock_irqrestore(&dcr_ind_lock, flags);
 }
 
diff --git a/arch/powerpc/include/asm/dcr.h b/arch/powerpc/include/asm/dcr.h
index d13fb68bb5c0..9d6851cfb841 100644
--- a/arch/powerpc/include/asm/dcr.h
+++ b/arch/powerpc/include/asm/dcr.h
@@ -68,9 +68,9 @@ typedef dcr_host_mmio_t dcr_host_t;
  * additional helpers to read the DCR * base from the device-tree
  */
 struct device_node;
-extern unsigned int dcr_resource_start(struct device_node *np,
+extern unsigned int dcr_resource_start(const struct device_node *np,
                                        unsigned int index);
-extern unsigned int dcr_resource_len(struct device_node *np,
+extern unsigned int dcr_resource_len(const struct device_node *np,
                                      unsigned int index);
 #endif /* CONFIG_PPC_DCR */
 #endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h
index dfd504caccc1..7d2277cef09a 100644
--- a/arch/powerpc/include/asm/device.h
+++ b/arch/powerpc/include/asm/device.h
@@ -18,4 +18,16 @@ struct dev_archdata {
         void                    *dma_data;
 };
 
+static inline void dev_archdata_set_node(struct dev_archdata *ad,
+                                         struct device_node *np)
+{
+        ad->of_node = np;
+}
+
+static inline struct device_node *
+dev_archdata_get_node(const struct dev_archdata *ad)
+{
+        return ad->of_node;
+}
+
 #endif /* _ASM_POWERPC_DEVICE_H */
diff --git a/arch/powerpc/include/asm/disassemble.h b/arch/powerpc/include/asm/disassemble.h
new file mode 100644
index 000000000000..9b198d1b3b2b
--- /dev/null
+++ b/arch/powerpc/include/asm/disassemble.h
@@ -0,0 +1,80 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ */
+
+#ifndef __ASM_PPC_DISASSEMBLE_H__
+#define __ASM_PPC_DISASSEMBLE_H__
+
+#include <linux/types.h>
+
+static inline unsigned int get_op(u32 inst)
+{
+        return inst >> 26;
+}
+
+static inline unsigned int get_xop(u32 inst)
+{
+        return (inst >> 1) & 0x3ff;
+}
+
+static inline unsigned int get_sprn(u32 inst)
+{
+        return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
+}
+
+static inline unsigned int get_dcrn(u32 inst)
+{
+        return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
+}
+
+static inline unsigned int get_rt(u32 inst)
+{
+        return (inst >> 21) & 0x1f;
+}
+
+static inline unsigned int get_rs(u32 inst)
+{
+        return (inst >> 21) & 0x1f;
+}
+
+static inline unsigned int get_ra(u32 inst)
+{
+        return (inst >> 16) & 0x1f;
+}
+
+static inline unsigned int get_rb(u32 inst)
+{
+        return (inst >> 11) & 0x1f;
+}
+
+static inline unsigned int get_rc(u32 inst)
+{
+        return inst & 0x1;
+}
+
+static inline unsigned int get_ws(u32 inst)
+{
+        return (inst >> 11) & 0x1f;
+}
+
+static inline unsigned int get_d(u32 inst)
+{
+        return inst & 0xffff;
+}
+
+#endif /* __ASM_PPC_DISASSEMBLE_H__ */
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index fddb229bd74f..86cef7ddc8d5 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -60,12 +60,6 @@ struct dma_mapping_ops {
                                 dma_addr_t *dma_handle, gfp_t flag);
         void            (*free_coherent)(struct device *dev, size_t size,
                                 void *vaddr, dma_addr_t dma_handle);
-        dma_addr_t      (*map_single)(struct device *dev, void *ptr,
-                                size_t size, enum dma_data_direction direction,
-                                struct dma_attrs *attrs);
-        void            (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
-                                size_t size, enum dma_data_direction direction,
-                                struct dma_attrs *attrs);
         int             (*map_sg)(struct device *dev, struct scatterlist *sg,
                                 int nents, enum dma_data_direction direction,
                                 struct dma_attrs *attrs);
@@ -82,6 +76,22 @@ struct dma_mapping_ops {
                                 dma_addr_t dma_address, size_t size,
                                 enum dma_data_direction direction,
                                 struct dma_attrs *attrs);
+#ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
+        void            (*sync_single_range_for_cpu)(struct device *hwdev,
+                                dma_addr_t dma_handle, unsigned long offset,
+                                size_t size,
+                                enum dma_data_direction direction);
+        void            (*sync_single_range_for_device)(struct device *hwdev,
+                                dma_addr_t dma_handle, unsigned long offset,
+                                size_t size,
+                                enum dma_data_direction direction);
+        void            (*sync_sg_for_cpu)(struct device *hwdev,
+                                struct scatterlist *sg, int nelems,
+                                enum dma_data_direction direction);
+        void            (*sync_sg_for_device)(struct device *hwdev,
+                                struct scatterlist *sg, int nelems,
+                                enum dma_data_direction direction);
+#endif
 };
 
 /*
@@ -149,10 +159,9 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
 }
 
 /*
- * TODO: map_/unmap_single will ideally go away, to be completely
- * replaced by map/unmap_page.   Until then, we allow dma_ops to have
- * one or the other, or both by checking to see if the specific
- * function requested exists; and if not, falling back on the other set.
+ * map_/unmap_single actually call through to map/unmap_page now that all the
+ * dma_mapping_ops have been converted over. We just have to get the page and
+ * offset to pass through to map_page
  */
 static inline dma_addr_t dma_map_single_attrs(struct device *dev,
                                               void *cpu_addr,
@@ -164,10 +173,6 @@ static inline dma_addr_t dma_map_single_attrs(struct device *dev,
 
         BUG_ON(!dma_ops);
 
-        if (dma_ops->map_single)
-                return dma_ops->map_single(dev, cpu_addr, size, direction,
-                                           attrs);
-
         return dma_ops->map_page(dev, virt_to_page(cpu_addr),
                                  (unsigned long)cpu_addr % PAGE_SIZE, size,
                                  direction, attrs);
@@ -183,11 +188,6 @@ static inline void dma_unmap_single_attrs(struct device *dev,
 
         BUG_ON(!dma_ops);
 
-        if (dma_ops->unmap_single) {
-                dma_ops->unmap_single(dev, dma_addr, size, direction, attrs);
-                return;
-        }
-
         dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
 }
 
@@ -201,12 +201,7 @@ static inline dma_addr_t dma_map_page_attrs(struct device *dev,
 
         BUG_ON(!dma_ops);
 
-        if (dma_ops->map_page)
-                return dma_ops->map_page(dev, page, offset, size, direction,
-                                         attrs);
-
-        return dma_ops->map_single(dev, page_address(page) + offset, size,
-                                   direction, attrs);
+        return dma_ops->map_page(dev, page, offset, size, direction, attrs);
 }
 
 static inline void dma_unmap_page_attrs(struct device *dev,
@@ -219,12 +214,7 @@ static inline void dma_unmap_page_attrs(struct device *dev,
 
         BUG_ON(!dma_ops);
 
-        if (dma_ops->unmap_page) {
-                dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
-                return;
-        }
-
-        dma_ops->unmap_single(dev, dma_address, size, direction, attrs);
+        dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
 }
 
 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
@@ -308,47 +298,107 @@ static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
         dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
 }
 
+#ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
 static inline void dma_sync_single_for_cpu(struct device *dev,
                 dma_addr_t dma_handle, size_t size,
                 enum dma_data_direction direction)
 {
-        BUG_ON(direction == DMA_NONE);
-        __dma_sync(bus_to_virt(dma_handle), size, direction);
+        struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+        BUG_ON(!dma_ops);
+        dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
+                                           size, direction);
 }
 
 static inline void dma_sync_single_for_device(struct device *dev,
                 dma_addr_t dma_handle, size_t size,
                 enum dma_data_direction direction)
 {
-        BUG_ON(direction == DMA_NONE);
-        __dma_sync(bus_to_virt(dma_handle), size, direction);
+        struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+        BUG_ON(!dma_ops);
+        dma_ops->sync_single_range_for_device(dev, dma_handle,
+                                              0, size, direction);
 }
 
 static inline void dma_sync_sg_for_cpu(struct device *dev,
                 struct scatterlist *sgl, int nents,
                 enum dma_data_direction direction)
 {
-        struct scatterlist *sg;
-        int i;
+        struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
 
-        BUG_ON(direction == DMA_NONE);
+        BUG_ON(!dma_ops);
+        dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
+}
+
+static inline void dma_sync_sg_for_device(struct device *dev,
+                struct scatterlist *sgl, int nents,
+                enum dma_data_direction direction)
+{
+        struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+        BUG_ON(!dma_ops);
+        dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
+}
+
+static inline void dma_sync_single_range_for_cpu(struct device *dev,
+                dma_addr_t dma_handle, unsigned long offset, size_t size,
+                enum dma_data_direction direction)
+{
+        struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
 
-        for_each_sg(sgl, sg, nents, i)
-                __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
+        BUG_ON(!dma_ops);
+        dma_ops->sync_single_range_for_cpu(dev, dma_handle,
+                                           offset, size, direction);
+}
+
+static inline void dma_sync_single_range_for_device(struct device *dev,
+                dma_addr_t dma_handle, unsigned long offset, size_t size,
+                enum dma_data_direction direction)
+{
+        struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+        BUG_ON(!dma_ops);
+        dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
+                                              size, direction);
+}
+#else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */
+static inline void dma_sync_single_for_cpu(struct device *dev,
+                dma_addr_t dma_handle, size_t size,
+                enum dma_data_direction direction)
+{
+}
+
+static inline void dma_sync_single_for_device(struct device *dev,
+                dma_addr_t dma_handle, size_t size,
+                enum dma_data_direction direction)
+{
+}
+
+static inline void dma_sync_sg_for_cpu(struct device *dev,
+                struct scatterlist *sgl, int nents,
+                enum dma_data_direction direction)
+{
 }
 
 static inline void dma_sync_sg_for_device(struct device *dev,
                 struct scatterlist *sgl, int nents,
                 enum dma_data_direction direction)
 {
-        struct scatterlist *sg;
-        int i;
+}
 
-        BUG_ON(direction == DMA_NONE);
+static inline void dma_sync_single_range_for_cpu(struct device *dev,
+                dma_addr_t dma_handle, unsigned long offset, size_t size,
+                enum dma_data_direction direction)
+{
+}
 
-        for_each_sg(sgl, sg, nents, i)
-                __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
+static inline void dma_sync_single_range_for_device(struct device *dev,
+                dma_addr_t dma_handle, unsigned long offset, size_t size,
+                enum dma_data_direction direction)
+{
 }
+#endif
 
 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
@@ -382,22 +432,6 @@ static inline int dma_get_cache_alignment(void)
 #endif
 }
 
-static inline void dma_sync_single_range_for_cpu(struct device *dev,
-                dma_addr_t dma_handle, unsigned long offset, size_t size,
-                enum dma_data_direction direction)
-{
-        /* just sync everything for now */
-        dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
-}
-
-static inline void dma_sync_single_range_for_device(struct device *dev,
-                dma_addr_t dma_handle, unsigned long offset, size_t size,
-                enum dma_data_direction direction)
-{
-        /* just sync everything for now */
-        dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
-}
-
 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                 enum dma_data_direction direction)
 {
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index b886bec67016..66ea9b8b95c5 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -17,8 +17,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  */
 
-#ifndef _PPC64_EEH_H
-#define _PPC64_EEH_H
+#ifndef _POWERPC_EEH_H
+#define _POWERPC_EEH_H
 #ifdef __KERNEL__
 
 #include <linux/init.h>
@@ -110,6 +110,7 @@ static inline void eeh_remove_bus_device(struct pci_dev *dev) { }
 #define EEH_IO_ERROR_VALUE(size) (-1UL)
 #endif /* CONFIG_EEH */
 
+#ifdef CONFIG_PPC64
 /*
  * MMIO read/write operations with EEH support.
  */
@@ -207,5 +208,6 @@ static inline void eeh_readsl(const volatile void __iomem *addr, void * buf,
                 eeh_check_failure(addr, *(u32*)buf);
 }
 
+#endif /* CONFIG_PPC64 */
 #endif /* __KERNEL__ */
-#endif /* _PPC64_EEH_H */
+#endif /* _POWERPC_EEH_H */
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index d812929390e4..cd46f023ec6d 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -267,7 +267,7 @@ extern int ucache_bsize;
 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES
 struct linux_binprm;
 extern int arch_setup_additional_pages(struct linux_binprm *bprm,
-                                       int executable_stack);
+                                       int uses_interp);
 #define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
 
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h
index a1029967620b..e4094a5cb05b 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -81,6 +81,36 @@ label##5:					       	\
 #define ALT_FTR_SECTION_END_IFCLR(msk)  \
         ALT_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
 
+/* MMU feature dependent sections */
+#define BEGIN_MMU_FTR_SECTION_NESTED(label)     START_FTR_SECTION(label)
+#define BEGIN_MMU_FTR_SECTION                   START_FTR_SECTION(97)
+
+#define END_MMU_FTR_SECTION_NESTED(msk, val, label)             \
+        FTR_SECTION_ELSE_NESTED(label)                          \
+        MAKE_FTR_SECTION_ENTRY(msk, val, label, __mmu_ftr_fixup)
+
+#define END_MMU_FTR_SECTION(msk, val)           \
+        END_MMU_FTR_SECTION_NESTED(msk, val, 97)
+
+#define END_MMU_FTR_SECTION_IFSET(msk)  END_MMU_FTR_SECTION((msk), (msk))
+#define END_MMU_FTR_SECTION_IFCLR(msk)  END_MMU_FTR_SECTION((msk), 0)
+
+/* MMU feature sections with alternatives, use BEGIN_FTR_SECTION to start */
+#define MMU_FTR_SECTION_ELSE_NESTED(label)      FTR_SECTION_ELSE_NESTED(label)
+#define MMU_FTR_SECTION_ELSE    MMU_FTR_SECTION_ELSE_NESTED(97)
+#define ALT_MMU_FTR_SECTION_END_NESTED(msk, val, label) \
+        MAKE_FTR_SECTION_ENTRY(msk, val, label, __mmu_ftr_fixup)
+#define ALT_MMU_FTR_SECTION_END_NESTED_IFSET(msk, label)        \
+        ALT_MMU_FTR_SECTION_END_NESTED(msk, msk, label)
+#define ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(msk, label)        \
+        ALT_MMU_FTR_SECTION_END_NESTED(msk, 0, label)
+#define ALT_MMU_FTR_SECTION_END(msk, val)       \
+        ALT_MMU_FTR_SECTION_END_NESTED(msk, val, 97)
+#define ALT_MMU_FTR_SECTION_END_IFSET(msk)      \
+        ALT_MMU_FTR_SECTION_END_NESTED_IFSET(msk, 97)
+#define ALT_MMU_FTR_SECTION_END_IFCLR(msk)      \
+        ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+
 /* Firmware feature dependent sections */
 #define BEGIN_FW_FTR_SECTION_NESTED(label)      START_FTR_SECTION(label)
 #define BEGIN_FW_FTR_SECTION                    START_FTR_SECTION(97)
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h
index b298f7a631e6..e5f2ae8362f7 100644
--- a/arch/powerpc/include/asm/ftrace.h
+++ b/arch/powerpc/include/asm/ftrace.h
@@ -7,7 +7,19 @@
 
 #ifndef __ASSEMBLY__
 extern void _mcount(void);
-#endif
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+static inline unsigned long ftrace_call_adjust(unsigned long addr)
+{
+       /* reloction of mcount call site is the same as the address */
+       return addr;
+}
+
+struct dyn_arch_ftrace {
+        struct module *mod;
+};
+#endif /*  CONFIG_DYNAMIC_FTRACE */
+#endif /* __ASSEMBLY__ */
 
 #endif
 
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index 91c589520c0a..04e4a620952e 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -38,9 +38,24 @@ extern pte_t *pkmap_page_table;
  * easily, subsequent pte tables have to be allocated in one physical
  * chunk of RAM.
  */
-#define LAST_PKMAP      (1 << PTE_SHIFT)
-#define LAST_PKMAP_MASK (LAST_PKMAP-1)
+/*
+ * We use one full pte table with 4K pages. And with 16K/64K pages pte
+ * table covers enough memory (32MB and 512MB resp.) that both FIXMAP
+ * and PKMAP can be placed in single pte table. We use 1024 pages for
+ * PKMAP in case of 16K/64K pages.
+ */
+#ifdef CONFIG_PPC_4K_PAGES
+#define PKMAP_ORDER     PTE_SHIFT
+#else
+#define PKMAP_ORDER     10
+#endif
+#define LAST_PKMAP      (1 << PKMAP_ORDER)
+#ifndef CONFIG_PPC_4K_PAGES
+#define PKMAP_BASE      (FIXADDR_START - PAGE_SIZE*(LAST_PKMAP + 1))
+#else
 #define PKMAP_BASE      ((FIXADDR_START - PAGE_SIZE*(LAST_PKMAP + 1)) & PMD_MASK)
+#endif
+#define LAST_PKMAP_MASK (LAST_PKMAP-1)
 #define PKMAP_NR(virt)  ((virt-PKMAP_BASE) >> PAGE_SHIFT)
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 
@@ -85,7 +100,7 @@ static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgpro
         BUG_ON(!pte_none(*(kmap_pte-idx)));
 #endif
         __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot));
-        flush_tlb_page(NULL, vaddr);
+        local_flush_tlb_page(NULL, vaddr);
 
         return (void*) vaddr;
 }
@@ -113,7 +128,7 @@ static inline void kunmap_atomic(void *kvaddr, enum km_type type)
          * this pte without first remap it
          */
         pte_clear(&init_mm, vaddr, kmap_pte-idx);
-        flush_tlb_page(NULL, vaddr);
+        local_flush_tlb_page(NULL, vaddr);
 #endif
         pagefault_enable();
 }
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 26f0d0ab27a5..b1dafb6a9743 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -18,6 +18,12 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
                               pte_t *ptep);
 
 /*
+ * The version of vma_mmu_pagesize() in arch/powerpc/mm/hugetlbpage.c needs
+ * to override the version in mm/hugetlb.c
+ */
+#define vma_mmu_pagesize vma_mmu_pagesize
+
+/*
  * If the arch doesn't supply something else, assume that hugepage
  * size aligned regions are ok without further preparation.
  */
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 08266d2728b3..494cd8b0a278 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -713,13 +713,6 @@ static inline void * phys_to_virt(unsigned long address)
  */
 #define page_to_phys(page)      ((phys_addr_t)page_to_pfn(page) << PAGE_SHIFT)
 
-/* We do NOT want virtual merging, it would put too much pressure on
- * our iommu allocator. Instead, we want drivers to be smart enough
- * to coalesce sglists that happen to have been mapped in a contiguous
- * way by the iommu
- */
-#define BIO_VMERGE_BOUNDARY     0
-
 /*
  * 32 bits still uses virt_to_bus() for it's implementation of DMA
  * mappings se we have to keep it defined here. We also have some old
diff --git a/arch/powerpc/include/asm/kdump.h b/arch/powerpc/include/asm/kdump.h
index b07ebb9784d3..5ebfe5d3c61f 100644
--- a/arch/powerpc/include/asm/kdump.h
+++ b/arch/powerpc/include/asm/kdump.h
@@ -1,6 +1,8 @@
 #ifndef _PPC64_KDUMP_H
 #define _PPC64_KDUMP_H
 
+#include <asm/page.h>
+
 /* Kdump kernel runs at 32 MB, change at your peril. */
 #define KDUMP_KERNELBASE        0x2000000
 
@@ -11,8 +13,19 @@
 
 #ifdef CONFIG_CRASH_DUMP
 
+/*
+ * On PPC64 translation is disabled during trampoline setup, so we use
+ * physical addresses. Though on PPC32 translation is already enabled,
+ * so we can't do the same. Luckily create_trampoline() creates relative
+ * branches, so we can just add the PAGE_OFFSET and don't worry about it.
+ */
+#ifdef __powerpc64__
 #define KDUMP_TRAMPOLINE_START  0x0100
 #define KDUMP_TRAMPOLINE_END    0x3000
+#else
+#define KDUMP_TRAMPOLINE_START  (0x0100 + PAGE_OFFSET)
+#define KDUMP_TRAMPOLINE_END    (0x3000 + PAGE_OFFSET)
+#endif /* __powerpc64__ */
 
 #define KDUMP_MIN_TCE_ENTRIES   2048
 
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index 3736d9b33289..6dbffc981702 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -33,12 +33,12 @@
 
 #ifndef __ASSEMBLY__
 #include <linux/cpumask.h>
+#include <asm/reg.h>
 
 typedef void (*crash_shutdown_t)(void);
 
 #ifdef CONFIG_KEXEC
 
-#ifdef __powerpc64__
 /*
  * This function is responsible for capturing register states if coming
  * via panic or invoking dump using sysrq-trigger.
@@ -48,6 +48,7 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
 {
         if (oldregs)
                 memcpy(newregs, oldregs, sizeof(*newregs));
+#ifdef __powerpc64__
         else {
                 /* FIXME Merge this with xmon_save_regs ?? */
                 unsigned long tmp1, tmp2;
@@ -100,15 +101,11 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
                         : "b" (newregs)
                         : "memory");
         }
-}
 #else
-/*
- * Provide a dummy definition to avoid build failures. Will remain
- * empty till crash dump support is enabled.
- */
-static inline void crash_setup_regs(struct pt_regs *newregs,
-                                        struct pt_regs *oldregs) { }
-#endif /* !__powerpc64 __ */
+        else
+                ppc_save_regs(newregs);
+#endif /* __powerpc64__ */
+}
 
 extern void kexec_smp_wait(void);       /* get and clear naca physid, wait for
                                           master to copy new code to 0 */
diff --git a/arch/powerpc/include/asm/kvm_44x.h b/arch/powerpc/include/asm/kvm_44x.h
new file mode 100644
index 000000000000..f49031b632ca
--- /dev/null
+++ b/arch/powerpc/include/asm/kvm_44x.h
@@ -0,0 +1,61 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ */
+
+#ifndef __ASM_44X_H__
+#define __ASM_44X_H__
+
+#include <linux/kvm_host.h>
+
+#define PPC44x_TLB_SIZE 64
+
+/* If the guest is expecting it, this can be as large as we like; we'd just
+ * need to find some way of advertising it. */
+#define KVM44x_GUEST_TLB_SIZE 64
+
+struct kvmppc_44x_shadow_ref {
+        struct page *page;
+        u16 gtlb_index;
+        u8 writeable;
+        u8 tid;
+};
+
+struct kvmppc_vcpu_44x {
+        /* Unmodified copy of the guest's TLB. */
+        struct kvmppc_44x_tlbe guest_tlb[KVM44x_GUEST_TLB_SIZE];
+
+        /* References to guest pages in the hardware TLB. */
+        struct kvmppc_44x_shadow_ref shadow_refs[PPC44x_TLB_SIZE];
+
+        /* State of the shadow TLB at guest context switch time. */
+        struct kvmppc_44x_tlbe shadow_tlb[PPC44x_TLB_SIZE];
+        u8 shadow_tlb_mod[PPC44x_TLB_SIZE];
+
+        struct kvm_vcpu vcpu;
+};
+
+static inline struct kvmppc_vcpu_44x *to_44x(struct kvm_vcpu *vcpu)
+{
+        return container_of(vcpu, struct kvmppc_vcpu_44x, vcpu);
+}
+
+void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid);
+void kvmppc_44x_tlb_put(struct kvm_vcpu *vcpu);
+void kvmppc_44x_tlb_load(struct kvm_vcpu *vcpu);
+
+#endif /* __ASM_44X_H__ */
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 34b52b7180cd..c1e436fe7738 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -64,27 +64,58 @@ struct kvm_vcpu_stat {
         u32 halt_wakeup;
 };
 
-struct tlbe {
+struct kvmppc_44x_tlbe {
         u32 tid; /* Only the low 8 bits are used. */
         u32 word0;
         u32 word1;
         u32 word2;
 };
 
-struct kvm_arch {
+enum kvm_exit_types {
+        MMIO_EXITS,
+        DCR_EXITS,
+        SIGNAL_EXITS,
+        ITLB_REAL_MISS_EXITS,
+        ITLB_VIRT_MISS_EXITS,
+        DTLB_REAL_MISS_EXITS,
+        DTLB_VIRT_MISS_EXITS,
+        SYSCALL_EXITS,
+        ISI_EXITS,
+        DSI_EXITS,
+        EMULATED_INST_EXITS,
+        EMULATED_MTMSRWE_EXITS,
+        EMULATED_WRTEE_EXITS,
+        EMULATED_MTSPR_EXITS,
+        EMULATED_MFSPR_EXITS,
+        EMULATED_MTMSR_EXITS,
+        EMULATED_MFMSR_EXITS,
+        EMULATED_TLBSX_EXITS,
+        EMULATED_TLBWE_EXITS,
+        EMULATED_RFI_EXITS,
+        DEC_EXITS,
+        EXT_INTR_EXITS,
+        HALT_WAKEUP,
+        USR_PR_INST,
+        FP_UNAVAIL,
+        DEBUG_EXITS,
+        TIMEINGUEST,
+        __NUMBER_OF_KVM_EXIT_TYPES
 };
 
-struct kvm_vcpu_arch {
-        /* Unmodified copy of the guest's TLB. */
-        struct tlbe guest_tlb[PPC44x_TLB_SIZE];
-        /* TLB that's actually used when the guest is running. */
-        struct tlbe shadow_tlb[PPC44x_TLB_SIZE];
-        /* Pages which are referenced in the shadow TLB. */
-        struct page *shadow_pages[PPC44x_TLB_SIZE];
+/* allow access to big endian 32bit upper/lower parts and 64bit var */
+struct kvmppc_exit_timing {
+        union {
+                u64 tv64;
+                struct {
+                        u32 tbu, tbl;
+                } tv32;
+        };
+};
 
-        /* Track which TLB entries we've modified in the current exit. */
-        u8 shadow_tlb_mod[PPC44x_TLB_SIZE];
+struct kvm_arch {
+};
 
+struct kvm_vcpu_arch {
         u32 host_stack;
         u32 host_pid;
         u32 host_dbcr0;
@@ -94,32 +125,32 @@ struct kvm_vcpu_arch {
         u32 host_msr;
 
         u64 fpr[32];
-        u32 gpr[32];
+        ulong gpr[32];
 
-        u32 pc;
+        ulong pc;
         u32 cr;
-        u32 ctr;
-        u32 lr;
-        u32 xer;
+        ulong ctr;
+        ulong lr;
+        ulong xer;
 
-        u32 msr;
+        ulong msr;
         u32 mmucr;
-        u32 sprg0;
-        u32 sprg1;
-        u32 sprg2;
-        u32 sprg3;
-        u32 sprg4;
-        u32 sprg5;
-        u32 sprg6;
-        u32 sprg7;
-        u32 srr0;
-        u32 srr1;
-        u32 csrr0;
-        u32 csrr1;
-        u32 dsrr0;
-        u32 dsrr1;
-        u32 dear;
-        u32 esr;
+        ulong sprg0;
+        ulong sprg1;
+        ulong sprg2;
+        ulong sprg3;
+        ulong sprg4;
+        ulong sprg5;
+        ulong sprg6;
+        ulong sprg7;
+        ulong srr0;
+        ulong srr1;
+        ulong csrr0;
+        ulong csrr1;
+        ulong dsrr0;
+        ulong dsrr1;
+        ulong dear;
+        ulong esr;
         u32 dec;
         u32 decar;
         u32 tbl;
@@ -127,7 +158,7 @@ struct kvm_vcpu_arch {
         u32 tcr;
         u32 tsr;
         u32 ivor[16];
-        u32 ivpr;
+        ulong ivpr;
         u32 pir;
 
         u32 shadow_pid;
@@ -140,9 +171,22 @@ struct kvm_vcpu_arch {
         u32 dbcr0;
         u32 dbcr1;
 
+#ifdef CONFIG_KVM_EXIT_TIMING
+        struct kvmppc_exit_timing timing_exit;
+        struct kvmppc_exit_timing timing_last_enter;
+        u32 last_exit_type;
+        u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
+        u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
+        u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
+        u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
+        u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
+        u64 timing_last_exit;
+        struct dentry *debugfs_exit_timing;
+#endif
+
         u32 last_inst;
-        u32 fault_dear;
-        u32 fault_esr;
+        ulong fault_dear;
+        ulong fault_esr;
         gpa_t paddr_accessed;
 
         u8 io_gpr; /* GPR used as IO source/target */
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index bb62ad876de3..36d2a50a8487 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -29,11 +29,6 @@
 #include <linux/kvm_types.h>
 #include <linux/kvm_host.h>
 
-struct kvm_tlb {
-        struct tlbe guest_tlb[PPC44x_TLB_SIZE];
-        struct tlbe shadow_tlb[PPC44x_TLB_SIZE];
-};
-
 enum emulation_result {
         EMULATE_DONE,         /* no further processing */
         EMULATE_DO_MMIO,      /* kvm_run filled with MMIO request */
@@ -41,9 +36,6 @@ enum emulation_result {
         EMULATE_FAIL,         /* can't emulate this instruction */
 };
 
-extern const unsigned char exception_priority[];
-extern const unsigned char priority_exception[];
-
 extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu);
 extern char kvmppc_handlers_start[];
 extern unsigned long kvmppc_handler_len;
@@ -58,51 +50,44 @@ extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
 extern int kvmppc_emulate_instruction(struct kvm_run *run,
                                       struct kvm_vcpu *vcpu);
 extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
+extern void kvmppc_emulate_dec(struct kvm_vcpu *vcpu);
 
-extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn,
-                           u64 asid, u32 flags);
-extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
-                                  gva_t eend, u32 asid);
+extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
+                           u64 asid, u32 flags, u32 max_bytes,
+                           unsigned int gtlb_idx);
 extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode);
 extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid);
 
-/* XXX Book E specific */
-extern void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i);
-
-extern void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu);
-
-static inline void kvmppc_queue_exception(struct kvm_vcpu *vcpu, int exception)
-{
-        unsigned int priority = exception_priority[exception];
-        set_bit(priority, &vcpu->arch.pending_exceptions);
-}
-
-static inline void kvmppc_clear_exception(struct kvm_vcpu *vcpu, int exception)
-{
-        unsigned int priority = exception_priority[exception];
-        clear_bit(priority, &vcpu->arch.pending_exceptions);
-}
-
-/* Helper function for "full" MSR writes. No need to call this if only EE is
- * changing. */
-static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
-{
-        if ((new_msr & MSR_PR) != (vcpu->arch.msr & MSR_PR))
-                kvmppc_mmu_priv_switch(vcpu, new_msr & MSR_PR);
-
-        vcpu->arch.msr = new_msr;
-
-        if (vcpu->arch.msr & MSR_WE)
-                kvm_vcpu_block(vcpu);
-}
-
-static inline void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
-{
-        if (vcpu->arch.pid != new_pid) {
-                vcpu->arch.pid = new_pid;
-                vcpu->arch.swap_pid = 1;
-        }
-}
+/* Core-specific hooks */
+
+extern struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm,
+                                                unsigned int id);
+extern void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu);
+extern int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu);
+extern int kvmppc_core_check_processor_compat(void);
+extern int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
+                                      struct kvm_translation *tr);
+
+extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
+extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu);
+
+extern void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu);
+extern void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu);
+
+extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu);
+extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu);
+extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu);
+extern void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu);
+extern void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
+                                       struct kvm_interrupt *irq);
+
+extern int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
+                                  unsigned int op, int *advance);
+extern int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs);
+extern int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt);
+
+extern int kvmppc_booke_init(void);
+extern void kvmppc_booke_exit(void);
 
 extern void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu);
 
diff --git a/arch/powerpc/include/asm/local.h b/arch/powerpc/include/asm/local.h
index 612d83276653..84b457a3c1bc 100644
--- a/arch/powerpc/include/asm/local.h
+++ b/arch/powerpc/include/asm/local.h
@@ -67,7 +67,7 @@ static __inline__ long local_inc_return(local_t *l)
         bne-    1b"
         : "=&r" (t)
         : "r" (&(l->a.counter))
-        : "cc", "memory");
+        : "cc", "xer", "memory");
 
         return t;
 }
@@ -94,7 +94,7 @@ static __inline__ long local_dec_return(local_t *l)
         bne-    1b"
         : "=&r" (t)
         : "r" (&(l->a.counter))
-        : "cc", "memory");
+        : "cc", "xer", "memory");
 
         return t;
 }
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 2fe268b10333..25aaa97facd8 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -133,7 +133,8 @@ struct lppaca {
 //=============================================================================
 // CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data
 //=============================================================================
-        u8      pmc_save_area[256];     // PMC interrupt Area           x00-xFF
+        u32     page_ins;                       // CMO Hint - # page ins by OS  x00-x04
+        u8      pmc_save_area[252];     // PMC interrupt Area           x04-xFF
 } __attribute__((__aligned__(0x400)));
 
 extern struct lppaca lppaca[];
diff --git a/arch/powerpc/include/asm/mmu-40x.h b/arch/powerpc/include/asm/mmu-40x.h
index 3d108676584c..776f415a36aa 100644
--- a/arch/powerpc/include/asm/mmu-40x.h
+++ b/arch/powerpc/include/asm/mmu-40x.h
@@ -54,8 +54,9 @@
 #ifndef __ASSEMBLY__
 
 typedef struct {
-        unsigned long id;
-        unsigned long vdso_base;
+        unsigned int    id;
+        unsigned int    active;
+        unsigned long   vdso_base;
 } mm_context_t;
 
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/mmu-44x.h b/arch/powerpc/include/asm/mmu-44x.h
index a825524c981a..27cc6fdcd3b7 100644
--- a/arch/powerpc/include/asm/mmu-44x.h
+++ b/arch/powerpc/include/asm/mmu-44x.h
@@ -4,6 +4,8 @@
  * PPC440 support
  */
 
+#include <asm/page.h>
+
 #define PPC44x_MMUCR_TID        0x000000ff
 #define PPC44x_MMUCR_STS        0x00010000
 
@@ -54,10 +56,12 @@
 #ifndef __ASSEMBLY__
 
 extern unsigned int tlb_44x_hwater;
+extern unsigned int tlb_44x_index;
 
 typedef struct {
-        unsigned long id;
-        unsigned long vdso_base;
+        unsigned int    id;
+        unsigned int    active;
+        unsigned long   vdso_base;
 } mm_context_t;
 
 #endif /* !__ASSEMBLY__ */
@@ -73,4 +77,19 @@ typedef struct {
 /* Size of the TLBs used for pinning in lowmem */
 #define PPC_PIN_SIZE    (1 << 28)       /* 256M */
 
+#if (PAGE_SHIFT == 12)
+#define PPC44x_TLBE_SIZE        PPC44x_TLB_4K
+#elif (PAGE_SHIFT == 14)
+#define PPC44x_TLBE_SIZE        PPC44x_TLB_16K
+#elif (PAGE_SHIFT == 16)
+#define PPC44x_TLBE_SIZE        PPC44x_TLB_64K
+#else
+#error "Unsupported PAGE_SIZE"
+#endif
+
+#define PPC44x_PGD_OFF_SHIFT    (32 - PGDIR_SHIFT + PGD_T_LOG2)
+#define PPC44x_PGD_OFF_MASK_BIT (PGDIR_SHIFT - PGD_T_LOG2)
+#define PPC44x_PTE_ADD_SHIFT    (32 - PGDIR_SHIFT + PTE_SHIFT + PTE_T_LOG2)
+#define PPC44x_PTE_ADD_MASK_BIT (32 - PTE_T_LOG2 - PTE_SHIFT)
+
 #endif /* _ASM_POWERPC_MMU_44X_H_ */
diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/mmu-8xx.h
index 9db877eb88db..07865a357848 100644
--- a/arch/powerpc/include/asm/mmu-8xx.h
+++ b/arch/powerpc/include/asm/mmu-8xx.h
@@ -137,7 +137,8 @@
 
 #ifndef __ASSEMBLY__
 typedef struct {
-        unsigned long id;
+        unsigned int id;
+        unsigned int active;
         unsigned long vdso_base;
 } mm_context_t;
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/mmu-fsl-booke.h b/arch/powerpc/include/asm/mmu-fsl-booke.h
index 925d93cf64d8..3f941c0f7e8e 100644
--- a/arch/powerpc/include/asm/mmu-fsl-booke.h
+++ b/arch/powerpc/include/asm/mmu-fsl-booke.h
@@ -40,6 +40,8 @@
 #define MAS2_M          0x00000004
 #define MAS2_G          0x00000002
 #define MAS2_E          0x00000001
+#define MAS2_EPN_MASK(size)             (~0 << (2*(size) + 10))
+#define MAS2_VAL(addr, size, flags)     ((addr) & MAS2_EPN_MASK(size) | (flags))
 
 #define MAS3_RPN        0xFFFFF000
 #define MAS3_U0         0x00000200
@@ -74,8 +76,9 @@
 #ifndef __ASSEMBLY__
 
 typedef struct {
-        unsigned long id;
-        unsigned long vdso_base;
+        unsigned int    id;
+        unsigned int    active;
+        unsigned long   vdso_base;
 } mm_context_t;
 #endif /* !__ASSEMBLY__ */
 
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 4c0e1b4f975c..6e7639911318 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -2,6 +2,63 @@
 #define _ASM_POWERPC_MMU_H_
 #ifdef __KERNEL__
 
+#include <asm/asm-compat.h>
+#include <asm/feature-fixups.h>
+
+/*
+ * MMU features bit definitions
+ */
+
+/*
+ * First half is MMU families
+ */
+#define MMU_FTR_HPTE_TABLE              ASM_CONST(0x00000001)
+#define MMU_FTR_TYPE_8xx                ASM_CONST(0x00000002)
+#define MMU_FTR_TYPE_40x                ASM_CONST(0x00000004)
+#define MMU_FTR_TYPE_44x                ASM_CONST(0x00000008)
+#define MMU_FTR_TYPE_FSL_E              ASM_CONST(0x00000010)
+
+/*
+ * This is individual features
+ */
+
+/* Enable use of high BAT registers */
+#define MMU_FTR_USE_HIGH_BATS           ASM_CONST(0x00010000)
+
+/* Enable >32-bit physical addresses on 32-bit processor, only used
+ * by CONFIG_6xx currently as BookE supports that from day 1
+ */
+#define MMU_FTR_BIG_PHYS                ASM_CONST(0x00020000)
+
+/* Enable use of broadcast TLB invalidations. We don't always set it
+ * on processors that support it due to other constraints with the
+ * use of such invalidations
+ */
+#define MMU_FTR_USE_TLBIVAX_BCAST       ASM_CONST(0x00040000)
+
+/* Enable use of tlbilx invalidate-by-PID variant.
+ */
+#define MMU_FTR_USE_TLBILX_PID          ASM_CONST(0x00080000)
+
+/* This indicates that the processor cannot handle multiple outstanding
+ * broadcast tlbivax or tlbsync. This makes the code use a spinlock
+ * around such invalidate forms.
+ */
+#define MMU_FTR_LOCK_BCAST_INVAL        ASM_CONST(0x00100000)
+
+#ifndef __ASSEMBLY__
+#include <asm/cputable.h>
+
+static inline int mmu_has_feature(unsigned long feature)
+{
+        return (cur_cpu_spec->mmu_features & feature);
+}
+
+extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
+
+#endif /* !__ASSEMBLY__ */
+
+
 #ifdef CONFIG_PPC64
 /* 64-bit classic hash table MMU */
 #  include <asm/mmu-hash64.h>
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
index 6b993ef452ff..ab4f19263c42 100644
--- a/arch/powerpc/include/asm/mmu_context.h
+++ b/arch/powerpc/include/asm/mmu_context.h
@@ -2,237 +2,26 @@
 #define __ASM_POWERPC_MMU_CONTEXT_H
 #ifdef __KERNEL__
 
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
 #include <asm/mmu.h>    
 #include <asm/cputable.h>
 #include <asm-generic/mm_hooks.h>
-
-#ifndef CONFIG_PPC64
-#include <asm/atomic.h>
-#include <linux/bitops.h>
-
-/*
- * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
- * (virtual segment identifiers) for each context.  Although the
- * hardware supports 24-bit VSIDs, and thus >1 million contexts,
- * we only use 32,768 of them.  That is ample, since there can be
- * at most around 30,000 tasks in the system anyway, and it means
- * that we can use a bitmap to indicate which contexts are in use.
- * Using a bitmap means that we entirely avoid all of the problems
- * that we used to have when the context number overflowed,
- * particularly on SMP systems.
- *  -- paulus.
- */
-
-/*
- * This function defines the mapping from contexts to VSIDs (virtual
- * segment IDs).  We use a skew on both the context and the high 4 bits
- * of the 32-bit virtual address (the "effective segment ID") in order
- * to spread out the entries in the MMU hash table.  Note, if this
- * function is changed then arch/ppc/mm/hashtable.S will have to be
- * changed to correspond.
- */
-#define CTX_TO_VSID(ctx, va)    (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
-                                 & 0xffffff)
-
-/*
-   The MPC8xx has only 16 contexts.  We rotate through them on each
-   task switch.  A better way would be to keep track of tasks that
-   own contexts, and implement an LRU usage.  That way very active
-   tasks don't always have to pay the TLB reload overhead.  The
-   kernel pages are mapped shared, so the kernel can run on behalf
-   of any task that makes a kernel entry.  Shared does not mean they
-   are not protected, just that the ASID comparison is not performed.
-        -- Dan
-
-   The IBM4xx has 256 contexts, so we can just rotate through these
-   as a way of "switching" contexts.  If the TID of the TLB is zero,
-   the PID/TID comparison is disabled, so we can use a TID of zero
-   to represent all kernel pages as shared among all contexts.
-        -- Dan
- */
-
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
-{
-}
-
-#ifdef CONFIG_8xx
-#define NO_CONTEXT              16
-#define LAST_CONTEXT            15
-#define FIRST_CONTEXT           0
-
-#elif defined(CONFIG_4xx)
-#define NO_CONTEXT              256
-#define LAST_CONTEXT            255
-#define FIRST_CONTEXT           1
-
-#elif defined(CONFIG_E200) || defined(CONFIG_E500)
-#define NO_CONTEXT              256
-#define LAST_CONTEXT            255
-#define FIRST_CONTEXT           1
-
-#else
-
-/* PPC 6xx, 7xx CPUs */
-#define NO_CONTEXT              ((unsigned long) -1)
-#define LAST_CONTEXT            32767
-#define FIRST_CONTEXT           1
-#endif
-
-/*
- * Set the current MMU context.
- * On 32-bit PowerPCs (other than the 8xx embedded chips), this is done by
- * loading up the segment registers for the user part of the address space.
- *
- * Since the PGD is immediately available, it is much faster to simply
- * pass this along as a second parameter, which is required for 8xx and
- * can be used for debugging on all processors (if you happen to have
- * an Abatron).
- */
-extern void set_context(unsigned long contextid, pgd_t *pgd);
-
-/*
- * Bitmap of contexts in use.
- * The size of this bitmap is LAST_CONTEXT + 1 bits.
- */
-extern unsigned long context_map[];
-
-/*
- * This caches the next context number that we expect to be free.
- * Its use is an optimization only, we can't rely on this context
- * number to be free, but it usually will be.
- */
-extern unsigned long next_mmu_context;
-
-/*
- * If we don't have sufficient contexts to give one to every task
- * that could be in the system, we need to be able to steal contexts.
- * These variables support that.
- */
-#if LAST_CONTEXT < 30000
-#define FEW_CONTEXTS    1
-extern atomic_t nr_free_contexts;
-extern struct mm_struct *context_mm[LAST_CONTEXT+1];
-extern void steal_context(void);
-#endif
-
-/*
- * Get a new mmu context for the address space described by `mm'.
- */
-static inline void get_mmu_context(struct mm_struct *mm)
-{
-        unsigned long ctx;
-
-        if (mm->context.id != NO_CONTEXT)
-                return;
-#ifdef FEW_CONTEXTS
-        while (atomic_dec_if_positive(&nr_free_contexts) < 0)
-                steal_context();
-#endif
-        ctx = next_mmu_context;
-        while (test_and_set_bit(ctx, context_map)) {
-                ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
-                if (ctx > LAST_CONTEXT)
-                        ctx = 0;
-        }
-        next_mmu_context = (ctx + 1) & LAST_CONTEXT;
-        mm->context.id = ctx;
-#ifdef FEW_CONTEXTS
-        context_mm[ctx] = mm;
-#endif
-}
-
-/*
- * Set up the context for a new address space.
- */
-static inline int init_new_context(struct task_struct *t, struct mm_struct *mm)
-{
-        mm->context.id = NO_CONTEXT;
-        return 0;
-}
-
-/*
- * We're finished using the context for an address space.
- */
-static inline void destroy_context(struct mm_struct *mm)
-{
-        preempt_disable();
-        if (mm->context.id != NO_CONTEXT) {
-                clear_bit(mm->context.id, context_map);
-                mm->context.id = NO_CONTEXT;
-#ifdef FEW_CONTEXTS
-                atomic_inc(&nr_free_contexts);
-#endif
-        }
-        preempt_enable();
-}
-
-static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
-                             struct task_struct *tsk)
-{
-#ifdef CONFIG_ALTIVEC
-        if (cpu_has_feature(CPU_FTR_ALTIVEC))
-        asm volatile ("dssall;\n"
-#ifndef CONFIG_POWER4
-         "sync;\n" /* G4 needs a sync here, G5 apparently not */
-#endif
-         : : );
-#endif /* CONFIG_ALTIVEC */
-
-        tsk->thread.pgdir = next->pgd;
-
-        /* No need to flush userspace segments if the mm doesnt change */
-        if (prev == next)
-                return;
-
-        /* Setup new userspace context */
-        get_mmu_context(next);
-        set_context(next->context.id, next->pgd);
-}
-
-#define deactivate_mm(tsk,mm)   do { } while (0)
+#include <asm/cputhreads.h>
 
 /*
- * After we have set current->mm to a new value, this activates
- * the context for the new mm so we see the new mappings.
+ * Most if the context management is out of line
  */
-#define activate_mm(active_mm, mm)   switch_mm(active_mm, mm, current)
-
 extern void mmu_context_init(void);
-
-
-#else
-
-#include <linux/kernel.h>       
-#include <linux/mm.h>   
-#include <linux/sched.h>
-
-/*
- * Copyright (C) 2001 PPC 64 Team, IBM Corp
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-static inline void enter_lazy_tlb(struct mm_struct *mm,
-                                  struct task_struct *tsk)
-{
-}
-
-/*
- * The proto-VSID space has 2^35 - 1 segments available for user mappings.
- * Each segment contains 2^28 bytes.  Each context maps 2^44 bytes,
- * so we can support 2^19-1 contexts (19 == 35 + 28 - 44).
- */
-#define NO_CONTEXT      0
-#define MAX_CONTEXT     ((1UL << 19) - 1)
-
 extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
 extern void destroy_context(struct mm_struct *mm);
 
+extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next);
 extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm);
 extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
+extern void set_context(unsigned long id, pgd_t *pgd);
 
 /*
  * switch_mm is the entry point called from the architecture independent
@@ -241,22 +30,39 @@ extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk)
 {
-        if (!cpu_isset(smp_processor_id(), next->cpu_vm_mask))
-                cpu_set(smp_processor_id(), next->cpu_vm_mask);
+        /* Mark this context has been used on the new CPU */
+        cpu_set(smp_processor_id(), next->cpu_vm_mask);
+
+        /* 32-bit keeps track of the current PGDIR in the thread struct */
+#ifdef CONFIG_PPC32
+        tsk->thread.pgdir = next->pgd;
+#endif /* CONFIG_PPC32 */
 
-        /* No need to flush userspace segments if the mm doesnt change */
+        /* Nothing else to do if we aren't actually switching */
         if (prev == next)
                 return;
 
+        /* We must stop all altivec streams before changing the HW
+         * context
+         */
 #ifdef CONFIG_ALTIVEC
         if (cpu_has_feature(CPU_FTR_ALTIVEC))
                 asm volatile ("dssall");
 #endif /* CONFIG_ALTIVEC */
 
+        /* The actual HW switching method differs between the various
+         * sub architectures.
+         */
+#ifdef CONFIG_PPC_STD_MMU_64
         if (cpu_has_feature(CPU_FTR_SLB))
                 switch_slb(tsk, next);
         else
                 switch_stab(tsk, next);
+#else
+        /* Out of line for now */
+        switch_mmu_context(prev, next);
+#endif
+
 }
 
 #define deactivate_mm(tsk,mm)   do { } while (0)
@@ -274,6 +80,11 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
         local_irq_restore(flags);
 }
 
-#endif /* CONFIG_PPC64 */
+/* We don't currently use enter_lazy_tlb() for anything */
+static inline void enter_lazy_tlb(struct mm_struct *mm,
+                                  struct task_struct *tsk)
+{
+}
+
 #endif /* __KERNEL__ */
 #endif /* __ASM_POWERPC_MMU_CONTEXT_H */
diff --git a/arch/powerpc/include/asm/module.h b/arch/powerpc/include/asm/module.h
index e5f14b13ccf0..08454880a2c0 100644
--- a/arch/powerpc/include/asm/module.h
+++ b/arch/powerpc/include/asm/module.h
@@ -34,11 +34,19 @@ struct mod_arch_specific {
 #ifdef __powerpc64__
         unsigned int stubs_section;     /* Index of stubs section in module */
         unsigned int toc_section;       /* What section is the TOC? */
-#else
+#ifdef CONFIG_DYNAMIC_FTRACE
+        unsigned long toc;
+        unsigned long tramp;
+#endif
+
+#else /* powerpc64 */
         /* Indices of PLT sections within module. */
         unsigned int core_plt_section;
         unsigned int init_plt_section;
+#ifdef CONFIG_DYNAMIC_FTRACE
+        unsigned long tramp;
 #endif
+#endif /* powerpc64 */
 
         /* List of BUG addresses, source line numbers and filenames */
         struct list_head bug_list;
@@ -68,6 +76,12 @@ struct mod_arch_specific {
 #    endif      /* MODULE */
 #endif
 
+#ifdef CONFIG_DYNAMIC_FTRACE
+#    ifdef MODULE
+        asm(".section .ftrace.tramp,\"ax\",@nobits; .align 3; .previous");
+#    endif      /* MODULE */
+#endif
+
 
 struct exception_table_entry;
 void sort_ex_table(struct exception_table_entry *start,
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h
index 81ef10b6b672..81a23932a160 100644
--- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -239,6 +239,25 @@ struct mpc52xx_cdm {
         u16 mclken_div_psc6;    /* CDM + 0x36  reg13 byte2,3 */
 };
 
+/* Interrupt controller Register set */
+struct mpc52xx_intr {
+        u32 per_mask;           /* INTR + 0x00 */
+        u32 per_pri1;           /* INTR + 0x04 */
+        u32 per_pri2;           /* INTR + 0x08 */
+        u32 per_pri3;           /* INTR + 0x0c */
+        u32 ctrl;               /* INTR + 0x10 */
+        u32 main_mask;          /* INTR + 0x14 */
+        u32 main_pri1;          /* INTR + 0x18 */
+        u32 main_pri2;          /* INTR + 0x1c */
+        u32 reserved1;          /* INTR + 0x20 */
+        u32 enc_status;         /* INTR + 0x24 */
+        u32 crit_status;        /* INTR + 0x28 */
+        u32 main_status;        /* INTR + 0x2c */
+        u32 per_status;         /* INTR + 0x30 */
+        u32 reserved2;          /* INTR + 0x34 */
+        u32 per_error;          /* INTR + 0x38 */
+};
+
 #endif /* __ASSEMBLY__ */
 
 
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h
index 8917ed630565..a218da6bec7c 100644
--- a/arch/powerpc/include/asm/mpc52xx_psc.h
+++ b/arch/powerpc/include/asm/mpc52xx_psc.h
@@ -68,12 +68,20 @@
 #define MPC52xx_PSC_IMR_ORERR           0x1000
 #define MPC52xx_PSC_IMR_IPC             0x8000
 
-/* PSC input port change bit */
+/* PSC input port change bits */
 #define MPC52xx_PSC_CTS                 0x01
 #define MPC52xx_PSC_DCD                 0x02
 #define MPC52xx_PSC_D_CTS               0x10
 #define MPC52xx_PSC_D_DCD               0x20
 
+/* PSC acr bits */
+#define MPC52xx_PSC_IEC_CTS             0x01
+#define MPC52xx_PSC_IEC_DCD             0x02
+
+/* PSC output port bits */
+#define MPC52xx_PSC_OP_RTS              0x01
+#define MPC52xx_PSC_OP_RES              0x02
+
 /* PSC mode fields */
 #define MPC52xx_PSC_MODE_5_BITS                 0x00
 #define MPC52xx_PSC_MODE_6_BITS                 0x01
@@ -91,6 +99,7 @@
 #define MPC52xx_PSC_MODE_ONE_STOP_5_BITS        0x00
 #define MPC52xx_PSC_MODE_ONE_STOP               0x07
 #define MPC52xx_PSC_MODE_TWO_STOP               0x0f
+#define MPC52xx_PSC_MODE_TXCTS                  0x10
 
 #define MPC52xx_PSC_RFNUM_MASK  0x01ff
 
diff --git a/arch/powerpc/include/asm/mutex.h b/arch/powerpc/include/asm/mutex.h
index 458c1f7fbc18..dabc01c727b8 100644
--- a/arch/powerpc/include/asm/mutex.h
+++ b/arch/powerpc/include/asm/mutex.h
@@ -1,9 +1,134 @@
 /*
- * Pull in the generic implementation for the mutex fastpath.
+ * Optimised mutex implementation of include/asm-generic/mutex-dec.h algorithm
+ */
+#ifndef _ASM_POWERPC_MUTEX_H
+#define _ASM_POWERPC_MUTEX_H
+
+static inline int __mutex_cmpxchg_lock(atomic_t *v, int old, int new)
+{
+        int t;
+
+        __asm__ __volatile__ (
+"1:     lwarx   %0,0,%1         # mutex trylock\n\
+        cmpw    0,%0,%2\n\
+        bne-    2f\n"
+        PPC405_ERR77(0,%1)
+"       stwcx.  %3,0,%1\n\
+        bne-    1b"
+        ISYNC_ON_SMP
+        "\n\
+2:"
+        : "=&r" (t)
+        : "r" (&v->counter), "r" (old), "r" (new)
+        : "cc", "memory");
+
+        return t;
+}
+
+static inline int __mutex_dec_return_lock(atomic_t *v)
+{
+        int t;
+
+        __asm__ __volatile__(
+"1:     lwarx   %0,0,%1         # mutex lock\n\
+        addic   %0,%0,-1\n"
+        PPC405_ERR77(0,%1)
+"       stwcx.  %0,0,%1\n\
+        bne-    1b"
+        ISYNC_ON_SMP
+        : "=&r" (t)
+        : "r" (&v->counter)
+        : "cc", "memory");
+
+        return t;
+}
+
+static inline int __mutex_inc_return_unlock(atomic_t *v)
+{
+        int t;
+
+        __asm__ __volatile__(
+        LWSYNC_ON_SMP
+"1:     lwarx   %0,0,%1         # mutex unlock\n\
+        addic   %0,%0,1\n"
+        PPC405_ERR77(0,%1)
+"       stwcx.  %0,0,%1 \n\
+        bne-    1b"
+        : "=&r" (t)
+        : "r" (&v->counter)
+        : "cc", "memory");
+
+        return t;
+}
+
+/**
+ *  __mutex_fastpath_lock - try to take the lock by moving the count
+ *                          from 1 to a 0 value
+ *  @count: pointer of type atomic_t
+ *  @fail_fn: function to call if the original value was not 1
+ *
+ * Change the count from 1 to a value lower than 1, and call <fail_fn> if
+ * it wasn't 1 originally. This function MUST leave the value lower than
+ * 1 even when the "1" assertion wasn't true.
+ */
+static inline void
+__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
+{
+        if (unlikely(__mutex_dec_return_lock(count) < 0))
+                fail_fn(count);
+}
+
+/**
+ *  __mutex_fastpath_lock_retval - try to take the lock by moving the count
+ *                                 from 1 to a 0 value
+ *  @count: pointer of type atomic_t
+ *  @fail_fn: function to call if the original value was not 1
+ *
+ * Change the count from 1 to a value lower than 1, and call <fail_fn> if
+ * it wasn't 1 originally. This function returns 0 if the fastpath succeeds,
+ * or anything the slow path function returns.
+ */
+static inline int
+__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
+{
+        if (unlikely(__mutex_dec_return_lock(count) < 0))
+                return fail_fn(count);
+        return 0;
+}
+
+/**
+ *  __mutex_fastpath_unlock - try to promote the count from 0 to 1
+ *  @count: pointer of type atomic_t
+ *  @fail_fn: function to call if the original value was not 0
+ *
+ * Try to promote the count from 0 to 1. If it wasn't 0, call <fail_fn>.
+ * In the failure case, this function is allowed to either set the value to
+ * 1, or to set it to a value lower than 1.
+ */
+static inline void
+__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
+{
+        if (unlikely(__mutex_inc_return_unlock(count) <= 0))
+                fail_fn(count);
+}
+
+#define __mutex_slowpath_needs_to_unlock()              1
+
+/**
+ * __mutex_fastpath_trylock - try to acquire the mutex, without waiting
+ *
+ *  @count: pointer of type atomic_t
+ *  @fail_fn: fallback function
  *
- * TODO: implement optimized primitives instead, or leave the generic
- * implementation in place, or pick the atomic_xchg() based generic
- * implementation. (see asm-generic/mutex-xchg.h for details)
+ * Change the count from 1 to 0, and return 1 (success), or if the count
+ * was not 1, then return 0 (failure).
  */
+static inline int
+__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
+{
+        if (likely(__mutex_cmpxchg_lock(count, 1, 0) == 1))
+                return 1;
+        return 0;
+}
 
-#include <asm-generic/mutex-dec.h>
+#endif
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index c0b8d4a29a91..197d569f5bd3 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -19,12 +19,15 @@
 #include <asm/kdump.h>
 
 /*
- * On PPC32 page size is 4K. For PPC64 we support either 4K or 64K software
+ * On regular PPC32 page size is 4K (but we support 4K/16K/64K pages
+ * on PPC44x). For PPC64 we support either 4K or 64K software
  * page size. When using 64K pages however, whether we are really supporting
  * 64K pages in HW or not is irrelevant to those definitions.
  */
-#ifdef CONFIG_PPC_64K_PAGES
+#if defined(CONFIG_PPC_64K_PAGES)
 #define PAGE_SHIFT              16
+#elif defined(CONFIG_PPC_16K_PAGES)
+#define PAGE_SHIFT              14
 #else
 #define PAGE_SHIFT              12
 #endif
@@ -151,7 +154,7 @@ typedef struct { pte_basic_t pte; } pte_t;
 /* 64k pages additionally define a bigger "real PTE" type that gathers
  * the "second half" part of the PTE for pseudo 64k pages
  */
-#ifdef CONFIG_PPC_64K_PAGES
+#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64)
 typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
 #else
 typedef struct { pte_t pte; } real_pte_t;
@@ -191,10 +194,10 @@ typedef pte_basic_t pte_t;
 #define pte_val(x)      (x)
 #define __pte(x)        (x)
 
-#ifdef CONFIG_PPC_64K_PAGES
+#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64)
 typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
 #else
-typedef unsigned long real_pte_t;
+typedef pte_t real_pte_t;
 #endif
 
 
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index d77072a32cc6..1458d9500381 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -19,6 +19,8 @@
 #define PTE_FLAGS_OFFSET        0
 #endif
 
+#define PTE_SHIFT       (PAGE_SHIFT - PTE_T_LOG2)       /* full page */
+
 #ifndef __ASSEMBLY__
 /*
  * The basic type of a PTE - 64 bits for those CPUs with > 32 bit
@@ -26,10 +28,8 @@
  */
 #ifdef CONFIG_PTE_64BIT
 typedef unsigned long long pte_basic_t;
-#define PTE_SHIFT       (PAGE_SHIFT - 3)        /* 512 ptes per page */
 #else
 typedef unsigned long pte_basic_t;
-#define PTE_SHIFT       (PAGE_SHIFT - 2)        /* 1024 ptes per page */
 #endif
 
 struct page;
@@ -39,6 +39,9 @@ extern void copy_page(void *to, void *from);
 
 #include <asm-generic/page.h>
 
+#define PGD_T_LOG2      (__builtin_ffs(sizeof(pgd_t)) - 1)
+#define PTE_T_LOG2      (__builtin_ffs(sizeof(pte_t)) - 1)
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_POWERPC_PAGE_32_H */
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 9047af7baa69..84007afabdb5 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -13,7 +13,6 @@
 
 struct device_node;
 
-extern unsigned int ppc_pci_flags;
 enum {
         /* Force re-assigning all resources (ignore firmware
          * setup completely)
@@ -36,6 +35,31 @@ enum {
         /* ... except for domain 0 */
         PPC_PCI_COMPAT_DOMAIN_0         = 0x00000020,
 };
+#ifdef CONFIG_PCI
+extern unsigned int ppc_pci_flags;
+
+static inline void ppc_pci_set_flags(int flags)
+{
+        ppc_pci_flags = flags;
+}
+
+static inline void ppc_pci_add_flags(int flags)
+{
+        ppc_pci_flags |= flags;
+}
+
+static inline int ppc_pci_has_flag(int flag)
+{
+        return (ppc_pci_flags & flag);
+}
+#else
+static inline void ppc_pci_set_flags(int flags) { }
+static inline void ppc_pci_add_flags(int flags) { }
+static inline int ppc_pci_has_flag(int flag)
+{
+        return 0;
+}
+#endif
 
 
 /*
@@ -241,9 +265,6 @@ extern void pcibios_remove_pci_devices(struct pci_bus *bus);
 
 /** Discover new pci devices under this bus, and add them */
 extern void pcibios_add_pci_devices(struct pci_bus *bus);
-extern void pcibios_fixup_new_pci_devices(struct pci_bus *bus);
-
-extern int pcibios_remove_root_bus(struct pci_controller *phb);
 
 static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
 {
@@ -290,6 +311,7 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
 /* Allocate & free a PCI host bridge structure */
 extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
+extern void pcibios_setup_phb_resources(struct pci_controller *hose);
 
 #ifdef CONFIG_PCI
 extern unsigned long pci_address_to_pio(phys_addr_t address);
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 57a2a494886b..3548159a1beb 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -38,8 +38,8 @@ struct pci_dev;
  * Set this to 1 if you want the kernel to re-assign all PCI
  * bus numbers (don't do that on ppc64 yet !)
  */
-#define pcibios_assign_all_busses()     (ppc_pci_flags & \
-                                         PPC_PCI_REASSIGN_ALL_BUS)
+#define pcibios_assign_all_busses() \
+        (ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
 #define pcibios_scan_all_fns(a, b)      0
 
 static inline void pcibios_set_master(struct pci_dev *dev)
@@ -204,15 +204,14 @@ static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
         return root;
 }
 
-extern void pcibios_setup_new_device(struct pci_dev *dev);
-
 extern void pcibios_claim_one_bus(struct pci_bus *b);
 
-extern void pcibios_allocate_bus_resources(struct pci_bus *bus);
+extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
 
 extern void pcibios_resource_survey(void);
 
 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
+extern int remove_phb_dynamic(struct pci_controller *phb);
 
 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
                                         struct pci_bus *bus, int devfn);
@@ -221,6 +220,7 @@ extern void of_scan_pci_bridge(struct device_node *node,
                                 struct pci_dev *dev);
 
 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
+extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
 
 extern int pci_read_irq_line(struct pci_dev *dev);
 
@@ -235,9 +235,8 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
                                  const struct resource *rsrc,
                                  resource_size_t *start, resource_size_t *end);
 
-extern void pcibios_do_bus_setup(struct pci_bus *bus);
-extern void pcibios_fixup_of_probed_bus(struct pci_bus *bus);
-
+extern void pcibios_setup_bus_devices(struct pci_bus *bus);
+extern void pcibios_setup_bus_self(struct pci_bus *bus);
 
 #endif  /* __KERNEL__ */
 #endif /* __ASM_POWERPC_PCI_H */
diff --git a/arch/powerpc/include/asm/pgalloc-32.h b/arch/powerpc/include/asm/pgalloc-32.h
index 58c07147b3ea..0815eb40acae 100644
--- a/arch/powerpc/include/asm/pgalloc-32.h
+++ b/arch/powerpc/include/asm/pgalloc-32.h
@@ -3,6 +3,8 @@
 
 #include <linux/threads.h>
 
+#define PTE_NONCACHE_NUM        0  /* dummy for now to share code w/ppc64 */
+
 extern void __bad_pte(pmd_t *pmd);
 
 extern pgd_t *pgd_alloc(struct mm_struct *mm);
@@ -33,10 +35,13 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
 
 extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
 extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
-extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte);
-extern void pte_free(struct mm_struct *mm, pgtable_t pte);
 
-#define __pte_free_tlb(tlb, pte)        pte_free((tlb)->mm, (pte))
+static inline void pgtable_free(pgtable_free_t pgf)
+{
+        void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK);
+
+        free_page((unsigned long)p);
+}
 
 #define check_pgt_cache()       do { } while (0)
 
diff --git a/arch/powerpc/include/asm/pgalloc-64.h b/arch/powerpc/include/asm/pgalloc-64.h
index 812a1d8f35cb..afda2bdd860f 100644
--- a/arch/powerpc/include/asm/pgalloc-64.h
+++ b/arch/powerpc/include/asm/pgalloc-64.h
@@ -7,7 +7,6 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#include <linux/mm.h>
 #include <linux/slab.h>
 #include <linux/cpumask.h>
 #include <linux/percpu.h>
@@ -108,31 +107,6 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
         return page;
 }
 
-static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
-        free_page((unsigned long)pte);
-}
-
-static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
-{
-        pgtable_page_dtor(ptepage);
-        __free_page(ptepage);
-}
-
-#define PGF_CACHENUM_MASK       0x7
-
-typedef struct pgtable_free {
-        unsigned long val;
-} pgtable_free_t;
-
-static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
-                                                unsigned long mask)
-{
-        BUG_ON(cachenum > PGF_CACHENUM_MASK);
-
-        return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum};
-}
-
 static inline void pgtable_free(pgtable_free_t pgf)
 {
         void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK);
@@ -144,14 +118,6 @@ static inline void pgtable_free(pgtable_free_t pgf)
                 kmem_cache_free(pgtable_cache[cachenum], p);
 }
 
-extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
-
-#define __pte_free_tlb(tlb,ptepage)     \
-do { \
-        pgtable_page_dtor(ptepage); \
-        pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
-                PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \
-} while (0)
 #define __pmd_free_tlb(tlb, pmd)        \
         pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \
                 PMD_CACHE_NUM, PMD_TABLE_SIZE-1))
diff --git a/arch/powerpc/include/asm/pgalloc.h b/arch/powerpc/include/asm/pgalloc.h
index b4505ed0f0f2..5d8480265a77 100644
--- a/arch/powerpc/include/asm/pgalloc.h
+++ b/arch/powerpc/include/asm/pgalloc.h
@@ -2,11 +2,52 @@
 #define _ASM_POWERPC_PGALLOC_H
 #ifdef __KERNEL__
 
+#include <linux/mm.h>
+
+static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+        free_page((unsigned long)pte);
+}
+
+static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
+{
+        pgtable_page_dtor(ptepage);
+        __free_page(ptepage);
+}
+
+typedef struct pgtable_free {
+        unsigned long val;
+} pgtable_free_t;
+
+#define PGF_CACHENUM_MASK       0x7
+
+static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
+                                                unsigned long mask)
+{
+        BUG_ON(cachenum > PGF_CACHENUM_MASK);
+
+        return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum};
+}
+
 #ifdef CONFIG_PPC64
 #include <asm/pgalloc-64.h>
 #else
 #include <asm/pgalloc-32.h>
 #endif
 
+extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
+
+#ifdef CONFIG_SMP
+#define __pte_free_tlb(tlb,ptepage)     \
+do { \
+        pgtable_page_dtor(ptepage); \
+        pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
+                PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \
+} while (0)
+#else
+#define __pte_free_tlb(tlb, pte)        pte_free((tlb)->mm, (pte))
+#endif
+
+
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PGALLOC_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 6ab7c67cb5ab..f69a4d977729 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -228,9 +228,10 @@ extern int icache_44x_need_flush;
  *   - FILE *must* be in the bottom three bits because swap cache
  *     entries use the top 29 bits for TLB2.
  *
- *   - CACHE COHERENT bit (M) has no effect on PPC440 core, because it
- *     doesn't support SMP. So we can use this as software bit, like
- *     DIRTY.
+ *   - CACHE COHERENT bit (M) has no effect on original PPC440 cores,
+ *     because it doesn't support SMP. However, some later 460 variants
+ *     have -some- form of SMP support and so I keep the bit there for
+ *     future use
  *
  * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
  * for memory protection related functions (see PTE structure in
@@ -436,20 +437,23 @@ extern int icache_44x_need_flush;
                          _PAGE_USER | _PAGE_ACCESSED | \
                          _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
                          _PAGE_EXEC | _PAGE_HWEXEC)
+
 /*
- * Note: the _PAGE_COHERENT bit automatically gets set in the hardware
- * PTE if CONFIG_SMP is defined (hash_page does this); there is no need
- * to have it in the Linux PTE, and in fact the bit could be reused for
- * another purpose.  -- paulus.
+ * We define 2 sets of base prot bits, one for basic pages (ie,
+ * cacheable kernel and user pages) and one for non cacheable
+ * pages. We always set _PAGE_COHERENT when SMP is enabled or
+ * the processor might need it for DMA coherency.
  */
-
-#ifdef CONFIG_44x
-#define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_GUARDED)
+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
+#define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
 #else
 #define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #endif
+#define _PAGE_BASE_NC   (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_NO_CACHE)
+
 #define _PAGE_WRENABLE  (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE)
 #define _PAGE_KERNEL    (_PAGE_BASE | _PAGE_SHARED | _PAGE_WRENABLE)
+#define _PAGE_KERNEL_NC (_PAGE_BASE_NC | _PAGE_SHARED | _PAGE_WRENABLE)
 
 #ifdef CONFIG_PPC_STD_MMU
 /* On standard PPC MMU, no user access implies kernel read/write access,
@@ -459,7 +463,7 @@ extern int icache_44x_need_flush;
 #define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED)
 #endif
 
-#define _PAGE_IO        (_PAGE_KERNEL | _PAGE_NO_CACHE | _PAGE_GUARDED)
+#define _PAGE_IO        (_PAGE_KERNEL_NC | _PAGE_GUARDED)
 #define _PAGE_RAM       (_PAGE_KERNEL | _PAGE_HWEXEC)
 
 #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
@@ -552,9 +556,6 @@ static inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED;
 static inline int pte_file(pte_t pte)           { return pte_val(pte) & _PAGE_FILE; }
 static inline int pte_special(pte_t pte)        { return pte_val(pte) & _PAGE_SPECIAL; }
 
-static inline void pte_uncache(pte_t pte)       { pte_val(pte) |= _PAGE_NO_CACHE; }
-static inline void pte_cache(pte_t pte)         { pte_val(pte) &= ~_PAGE_NO_CACHE; }
-
 static inline pte_t pte_wrprotect(pte_t pte) {
         pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
 static inline pte_t pte_mkclean(pte_t pte) {
@@ -693,10 +694,11 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
 #endif
 }
 
+
 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
                               pte_t *ptep, pte_t pte)
 {
-#if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
+#if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP) && defined(CONFIG_DEBUG_VM)
         WARN_ON(pte_present(*ptep));
 #endif
         __set_pte_at(mm, addr, ptep, pte);
@@ -760,16 +762,6 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
         __changed;                                                         \
 })
 
-/*
- * Macro to mark a page protection value as "uncacheable".
- */
-#define pgprot_noncached(prot)  (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
-
-struct file;
-extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
-                                     unsigned long size, pgprot_t vma_prot);
-#define __HAVE_PHYS_MEM_ACCESS_PROT
-
 #define __HAVE_ARCH_PTE_SAME
 #define pte_same(A,B)   (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
 
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 4c0a8c62859d..b0f18be81d9f 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -100,7 +100,7 @@
 
 #define _PAGE_WRENABLE  (_PAGE_RW | _PAGE_DIRTY)
 
-/* __pgprot defined in arch/powerpc/incliude/asm/page.h */
+/* __pgprot defined in arch/powerpc/include/asm/page.h */
 #define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
 
 #define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
@@ -245,9 +245,6 @@ static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
 static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
 
-static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
-static inline void pte_cache(pte_t pte)   { pte_val(pte) &= ~_PAGE_NO_CACHE; }
-
 static inline pte_t pte_wrprotect(pte_t pte) {
         pte_val(pte) &= ~(_PAGE_RW); return pte; }
 static inline pte_t pte_mkclean(pte_t pte) {
@@ -405,16 +402,6 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
         __changed;                                                         \
 })
 
-/*
- * Macro to mark a page protection value as "uncacheable".
- */
-#define pgprot_noncached(prot)  (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
-
-struct file;
-extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
-                                     unsigned long size, pgprot_t vma_prot);
-#define __HAVE_PHYS_MEM_ACCESS_PROT
-
 #define __HAVE_ARCH_PTE_SAME
 #define pte_same(A,B)   (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
 
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index dbb8ca172e44..07f55e601696 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -16,6 +16,32 @@ struct mm_struct;
 #endif
 
 #ifndef __ASSEMBLY__
+
+/*
+ * Macro to mark a page protection value as "uncacheable".
+ */
+
+#define _PAGE_CACHE_CTL (_PAGE_COHERENT | _PAGE_GUARDED | _PAGE_NO_CACHE | \
+                         _PAGE_WRITETHRU)
+
+#define pgprot_noncached(prot)    (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
+                                            _PAGE_NO_CACHE | _PAGE_GUARDED))
+
+#define pgprot_noncached_wc(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
+                                            _PAGE_NO_CACHE))
+
+#define pgprot_cached(prot)       (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
+                                            _PAGE_COHERENT))
+
+#define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
+                                            _PAGE_COHERENT | _PAGE_WRITETHRU))
+
+
+struct file;
+extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
+                                     unsigned long size, pgprot_t vma_prot);
+#define __HAVE_PHYS_MEM_ACCESS_PROT
+
 /*
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index c4a029ccb4d3..1a0d628eb114 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -425,14 +425,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define fromreal(rd)    tovirt(rd,rd)
 
 #define tophys(rd,rs)                           \
-0:      addis   rd,rs,-KERNELBASE@h;            \
+0:      addis   rd,rs,-PAGE_OFFSET@h;           \
         .section ".vtop_fixup","aw";            \
         .align  1;                              \
         .long   0b;                             \
         .previous
 
 #define tovirt(rd,rs)                           \
-0:      addis   rd,rs,KERNELBASE@h;             \
+0:      addis   rd,rs,PAGE_OFFSET@h;            \
         .section ".ptov_fixup","aw";            \
         .align  1;                              \
         .long   0b;                             \
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 101ed87f7d84..d3466490104a 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -69,8 +69,6 @@ extern int _prep_type;
 
 #ifdef __KERNEL__
 
-extern int have_of;
-
 struct task_struct;
 void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
 void release_thread(struct task_struct *);
@@ -207,6 +205,11 @@ struct thread_struct {
 #define INIT_SP_LIMIT \
         (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack)
 
+#ifdef CONFIG_SPE
+#define SPEFSCR_INIT .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE,
+#else
+#define SPEFSCR_INIT
+#endif
 
 #ifdef CONFIG_PPC32
 #define INIT_THREAD { \
@@ -215,6 +218,7 @@ struct thread_struct {
         .fs = KERNEL_DS, \
         .pgdir = swapper_pg_dir, \
         .fpexc_mode = MSR_FE0 | MSR_FE1, \
+        SPEFSCR_INIT \
 }
 #else
 #define INIT_THREAD  { \
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index eb3bd2e1c7f6..6ff04185d2aa 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -253,6 +253,9 @@ extern void kdump_move_device_tree(void);
 /* CPU OF node matching */
 struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
 
+/* cache lookup */
+struct device_node *of_find_next_cache_node(struct device_node *np);
+
 /* Get the MAC address */
 extern const void *of_get_mac_address(struct device_node *np);
 
diff --git a/arch/powerpc/include/asm/ps3.h b/arch/powerpc/include/asm/ps3.h
index f9e34c493cbb..cff30c0ef1ff 100644
--- a/arch/powerpc/include/asm/ps3.h
+++ b/arch/powerpc/include/asm/ps3.h
@@ -305,30 +305,34 @@ static inline const char* ps3_result(int result)
 /* system bus routines */
 
 enum ps3_match_id {
-        PS3_MATCH_ID_EHCI           = 1,
-        PS3_MATCH_ID_OHCI           = 2,
-        PS3_MATCH_ID_GELIC          = 3,
-        PS3_MATCH_ID_AV_SETTINGS    = 4,
-        PS3_MATCH_ID_SYSTEM_MANAGER = 5,
-        PS3_MATCH_ID_STOR_DISK      = 6,
-        PS3_MATCH_ID_STOR_ROM       = 7,
-        PS3_MATCH_ID_STOR_FLASH     = 8,
-        PS3_MATCH_ID_SOUND          = 9,
-        PS3_MATCH_ID_GRAPHICS       = 10,
-        PS3_MATCH_ID_LPM            = 11,
+        PS3_MATCH_ID_EHCI               = 1,
+        PS3_MATCH_ID_OHCI               = 2,
+        PS3_MATCH_ID_GELIC              = 3,
+        PS3_MATCH_ID_AV_SETTINGS        = 4,
+        PS3_MATCH_ID_SYSTEM_MANAGER     = 5,
+        PS3_MATCH_ID_STOR_DISK          = 6,
+        PS3_MATCH_ID_STOR_ROM           = 7,
+        PS3_MATCH_ID_STOR_FLASH         = 8,
+        PS3_MATCH_ID_SOUND              = 9,
+        PS3_MATCH_ID_GPU                = 10,
+        PS3_MATCH_ID_LPM                = 11,
 };
 
-#define PS3_MODULE_ALIAS_EHCI           "ps3:1"
-#define PS3_MODULE_ALIAS_OHCI           "ps3:2"
-#define PS3_MODULE_ALIAS_GELIC          "ps3:3"
-#define PS3_MODULE_ALIAS_AV_SETTINGS    "ps3:4"
-#define PS3_MODULE_ALIAS_SYSTEM_MANAGER "ps3:5"
-#define PS3_MODULE_ALIAS_STOR_DISK      "ps3:6"
-#define PS3_MODULE_ALIAS_STOR_ROM       "ps3:7"
-#define PS3_MODULE_ALIAS_STOR_FLASH     "ps3:8"
-#define PS3_MODULE_ALIAS_SOUND          "ps3:9"
-#define PS3_MODULE_ALIAS_GRAPHICS       "ps3:10"
-#define PS3_MODULE_ALIAS_LPM            "ps3:11"
+enum ps3_match_sub_id {
+        PS3_MATCH_SUB_ID_GPU_FB         = 1,
+};
+
+#define PS3_MODULE_ALIAS_EHCI           "ps3:1:0"
+#define PS3_MODULE_ALIAS_OHCI           "ps3:2:0"
+#define PS3_MODULE_ALIAS_GELIC          "ps3:3:0"
+#define PS3_MODULE_ALIAS_AV_SETTINGS    "ps3:4:0"
+#define PS3_MODULE_ALIAS_SYSTEM_MANAGER "ps3:5:0"
+#define PS3_MODULE_ALIAS_STOR_DISK      "ps3:6:0"
+#define PS3_MODULE_ALIAS_STOR_ROM       "ps3:7:0"
+#define PS3_MODULE_ALIAS_STOR_FLASH     "ps3:8:0"
+#define PS3_MODULE_ALIAS_SOUND          "ps3:9:0"
+#define PS3_MODULE_ALIAS_GPU_FB         "ps3:10:1"
+#define PS3_MODULE_ALIAS_LPM            "ps3:11:0"
 
 enum ps3_system_bus_device_type {
         PS3_DEVICE_TYPE_IOC0 = 1,
@@ -337,11 +341,6 @@ enum ps3_system_bus_device_type {
         PS3_DEVICE_TYPE_LPM,
 };
 
-enum ps3_match_sub_id {
-        /* for PS3_MATCH_ID_GRAPHICS */
-        PS3_MATCH_SUB_ID_FB             = 1,
-};
-
 /**
  * struct ps3_system_bus_device - a device on the system bus
  */
@@ -516,4 +515,7 @@ void ps3_sync_irq(int node);
 u32 ps3_get_hw_thread_id(int cpu);
 u64 ps3_get_spe_id(void *arg);
 
+/* mutex synchronizing GPU accesses and video mode changes */
+extern struct mutex ps3_gpu_mutex;
+
 #endif
diff --git a/arch/powerpc/include/asm/ps3av.h b/arch/powerpc/include/asm/ps3av.h
index 5aa22cffdbd6..cd24ac16660a 100644
--- a/arch/powerpc/include/asm/ps3av.h
+++ b/arch/powerpc/include/asm/ps3av.h
@@ -740,8 +740,4 @@ extern int ps3av_audio_mute(int);
 extern int ps3av_audio_mute_analog(int);
 extern int ps3av_dev_open(void);
 extern int ps3av_dev_close(void);
-extern void ps3av_register_flip_ctl(void (*flip_ctl)(int on, void *data),
-                                    void *flip_data);
-extern void ps3av_flip_ctl(int on);
-
 #endif  /* _ASM_POWERPC_PS3AV_H_ */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c6d1ab650778..f484a343efba 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -783,6 +783,10 @@ extern void scom970_write(unsigned int address, unsigned long value);
 #define __get_SP()      ({unsigned long sp; \
                         asm volatile("mr %0,1": "=r" (sp)); sp;})
 
+struct pt_regs;
+
+extern void ppc_save_regs(struct pt_regs *regs);
+
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_REG_H */
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 8eaa7b28d9d0..e0175beb4462 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -168,6 +168,7 @@ extern void rtas_os_term(char *str);
 extern int rtas_get_sensor(int sensor, int index, int *state);
 extern int rtas_get_power_level(int powerdomain, int *level);
 extern int rtas_set_power_level(int powerdomain, int level, int *setlevel);
+extern bool rtas_indicator_present(int token, int *maxindex);
 extern int rtas_set_indicator(int indicator, int index, int new_value);
 extern int rtas_set_indicator_fast(int indicator, int index, int new_value);
 extern void rtas_progress(char *s, unsigned short hex);
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index ced34f1dc8f8..3d9f831c3c55 100644
--- a/arch/powerpc/include/asm/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -82,7 +82,7 @@
 #define _FP_MUL_MEAT_S(R,X,Y)   _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
 #define _FP_MUL_MEAT_D(R,X,Y)   _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
 
-#define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv(S,R,X,Y)
+#define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv_norm(S,R,X,Y)
 #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv(D,R,X,Y)
 
 /* These macros define what NaN looks like. They're supposed to expand to
@@ -97,6 +97,20 @@
 
 #define _FP_KEEPNANFRACP 1
 
+#ifdef FP_EX_BOOKE_E500_SPE
+#define FP_EX_INEXACT           (1 << 21)
+#define FP_EX_INVALID           (1 << 20)
+#define FP_EX_DIVZERO           (1 << 19)
+#define FP_EX_UNDERFLOW         (1 << 18)
+#define FP_EX_OVERFLOW          (1 << 17)
+#define FP_INHIBIT_RESULTS      0
+
+#define __FPU_FPSCR     (current->thread.spefscr)
+#define __FPU_ENABLED_EXC               \
+({                                      \
+        (__FPU_FPSCR >> 2) & 0x1f;      \
+})
+#else
 /* Exception flags.  We use the bit positions of the appropriate bits
    in the FPSCR, which also correspond to the FE_* bits.  This makes
    everything easier ;-).  */
@@ -111,22 +125,6 @@
 #define FP_EX_DIVZERO         (1 << (31 - 5))
 #define FP_EX_INEXACT         (1 << (31 - 6))
 
-/* This macro appears to be called when both X and Y are NaNs, and
- * has to choose one and copy it to R. i386 goes for the larger of the
- * two, sparc64 just picks Y. I don't understand this at all so I'll
- * go with sparc64 because it's shorter :->   -- PMM
- */
-#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)              \
-  do {                                                  \
-    R##_s = Y##_s;                                      \
-    _FP_FRAC_COPY_##wc(R,Y);                            \
-    R##_c = FP_CLS_NAN;                                 \
-  } while (0)
-
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-
 #define __FPU_FPSCR     (current->thread.fpscr.val)
 
 /* We only actually write to the destination register
@@ -137,6 +135,32 @@
         (__FPU_FPSCR >> 3) & 0x1f;      \
 })
 
+#endif
+
+/*
+ * If one NaN is signaling and the other is not,
+ * we choose that one, otherwise we choose X.
+ */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
+  do {                                                          \
+    if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)          \
+        && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs))     \
+      {                                                         \
+        R##_s = X##_s;                                          \
+        _FP_FRAC_COPY_##wc(R,X);                                \
+      }                                                         \
+    else                                                        \
+      {                                                         \
+        R##_s = Y##_s;                                          \
+        _FP_FRAC_COPY_##wc(R,Y);                                \
+      }                                                         \
+    R##_c = FP_CLS_NAN;                                         \
+  } while (0)
+
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
 #define __FPU_TRAP_P(bits) \
         ((__FPU_ENABLED_EXC & (bits)) != 0)
 
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 1866cec4f967..c25f73d1d842 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -81,6 +81,13 @@ extern int cpu_to_core_id(int cpu);
 #define PPC_MSG_CALL_FUNC_SINGLE        2
 #define PPC_MSG_DEBUGGER_BREAK  3
 
+/*
+ * irq controllers that have dedicated ipis per message and don't
+ * need additional code in the action handler may use this
+ */
+extern int smp_request_message_ipi(int virq, int message);
+extern const char *smp_ipi_name[];
+
 void smp_init_iSeries(void);
 void smp_init_pSeries(void);
 void smp_init_cell(void);
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h
index f56a843f4705..36864364e601 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -277,7 +277,7 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
         bne-            1b"
         : "=&r"(tmp)
         : "r"(&rw->lock)
-        : "cr0", "memory");
+        : "cr0", "xer", "memory");
 }
 
 static inline void __raw_write_unlock(raw_rwlock_t *rw)
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
index 45963e80f557..28f6ddbff4cf 100644
--- a/arch/powerpc/include/asm/synch.h
+++ b/arch/powerpc/include/asm/synch.h
@@ -5,6 +5,10 @@
 #include <linux/stringify.h>
 #include <asm/feature-fixups.h>
 
+#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
+#define __SUBARCH_HAS_LWSYNC
+#endif
+
 #ifndef __ASSEMBLY__
 extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
 extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index d6648c143322..2a4be19a92c4 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -23,15 +23,17 @@
  * read_barrier_depends() prevents data-dependent loads being reordered
  *      across this point (nop on PPC).
  *
- * We have to use the sync instructions for mb(), since lwsync doesn't
- * order loads with respect to previous stores.  Lwsync is fine for
- * rmb(), though. Note that rmb() actually uses a sync on 32-bit
- * architectures.
+ * *mb() variants without smp_ prefix must order all types of memory
+ * operations with one another. sync is the only instruction sufficient
+ * to do this.
  *
- * For wmb(), we use sync since wmb is used in drivers to order
- * stores to system memory with respect to writes to the device.
- * However, smp_wmb() can be a lighter-weight lwsync or eieio barrier
- * on SMP since it is only used to order updates to system memory.
+ * For the smp_ barriers, ordering is for cacheable memory operations
+ * only. We have to use the sync instruction for smp_mb(), since lwsync
+ * doesn't order loads with respect to previous stores.  Lwsync can be
+ * used for smp_rmb() and smp_wmb().
+ *
+ * However, on CPUs that don't support lwsync, lwsync actually maps to a
+ * heavy-weight sync, so smp_wmb() can be a lighter-weight eieio.
  */
 #define mb()   __asm__ __volatile__ ("sync" : : : "memory")
 #define rmb()  __asm__ __volatile__ ("sync" : : : "memory")
@@ -45,14 +47,14 @@
 #ifdef CONFIG_SMP
 
 #ifdef __SUBARCH_HAS_LWSYNC
-#    define SMPWMB      lwsync
+#    define SMPWMB      LWSYNC
 #else
 #    define SMPWMB      eieio
 #endif
 
 #define smp_mb()        mb()
-#define smp_rmb()       rmb()
-#define smp_wmb()       __asm__ __volatile__ (__stringify(SMPWMB) : : :"memory")
+#define smp_rmb()       __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
+#define smp_wmb()       __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
 #define smp_read_barrier_depends()      read_barrier_depends()
 #else
 #define smp_mb()        barrier()
diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index febd581ec9b0..27ccb764fdab 100644
--- a/arch/powerpc/include/asm/time.h
+++ b/arch/powerpc/include/asm/time.h
@@ -48,26 +48,6 @@ extern unsigned long ppc_proc_freq;
 extern unsigned long ppc_tb_freq;
 #define DEFAULT_TB_FREQ         125000000UL
 
-/*
- * By putting all of this stuff into a single struct we 
- * reduce the number of cache lines touched by do_gettimeofday.
- * Both by collecting all of the data in one cache line and
- * by touching only one TOC entry on ppc64.
- */
-struct gettimeofday_vars {
-        u64 tb_to_xs;
-        u64 stamp_xsec;
-        u64 tb_orig_stamp;
-};
-
-struct gettimeofday_struct {
-        unsigned long tb_ticks_per_sec;
-        struct gettimeofday_vars vars[2];
-        struct gettimeofday_vars * volatile varp;
-        unsigned      var_idx;
-        unsigned      tb_to_us;
-};
-
 struct div_result {
         u64 result_high;
         u64 result_low;
diff --git a/arch/powerpc/include/asm/tlbflush.h b/arch/powerpc/include/asm/tlbflush.h
index a2c6bfd85fb7..abbe3419d1dd 100644
--- a/arch/powerpc/include/asm/tlbflush.h
+++ b/arch/powerpc/include/asm/tlbflush.h
@@ -6,6 +6,9 @@
  *
  *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
  *  - flush_tlb_page(vma, vmaddr) flushes one page
+ *  - local_flush_tlb_mm(mm) flushes the specified mm context on
+ *                           the local processor
+ *  - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
  *  - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
  *  - flush_tlb_range(vma, start, end) flushes a range of pages
  *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
@@ -17,7 +20,7 @@
  */
 #ifdef __KERNEL__
 
-#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE)
+#ifdef CONFIG_PPC_MMU_NOHASH
 /*
  * TLB flushing for software loaded TLB chips
  *
@@ -28,63 +31,49 @@
 
 #include <linux/mm.h>
 
-extern void _tlbie(unsigned long address, unsigned int pid);
-extern void _tlbil_all(void);
-extern void _tlbil_pid(unsigned int pid);
-extern void _tlbil_va(unsigned long address, unsigned int pid);
+#define MMU_NO_CONTEXT          ((unsigned int)-1)
 
-#if defined(CONFIG_40x) || defined(CONFIG_8xx)
-#define _tlbia()        asm volatile ("tlbia; sync" : : : "memory")
-#else /* CONFIG_44x || CONFIG_FSL_BOOKE */
-extern void _tlbia(void);
-#endif
-
-static inline void flush_tlb_mm(struct mm_struct *mm)
-{
-        _tlbil_pid(mm->context.id);
-}
-
-static inline void flush_tlb_page(struct vm_area_struct *vma,
-                                  unsigned long vmaddr)
-{
-        _tlbil_va(vmaddr, vma ? vma->vm_mm->context.id : 0);
-}
+extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
+                            unsigned long end);
+extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
 
-static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
-                                         unsigned long vmaddr)
-{
-        flush_tlb_page(vma, vmaddr);
-}
+extern void local_flush_tlb_mm(struct mm_struct *mm);
+extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 
-static inline void flush_tlb_range(struct vm_area_struct *vma,
-                                   unsigned long start, unsigned long end)
-{
-        _tlbil_pid(vma->vm_mm->context.id);
-}
+#ifdef CONFIG_SMP
+extern void flush_tlb_mm(struct mm_struct *mm);
+extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
+#else
+#define flush_tlb_mm(mm)                local_flush_tlb_mm(mm)
+#define flush_tlb_page(vma,addr)        local_flush_tlb_page(vma,addr)
+#endif
+#define flush_tlb_page_nohash(vma,addr) flush_tlb_page(vma,addr)
 
-static inline void flush_tlb_kernel_range(unsigned long start,
-                                          unsigned long end)
-{
-        _tlbil_pid(0);
-}
+#elif defined(CONFIG_PPC_STD_MMU_32)
 
-#elif defined(CONFIG_PPC32)
 /*
- * TLB flushing for "classic" hash-MMMU 32-bit CPUs, 6xx, 7xx, 7xxx
+ * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
  */
-extern void _tlbie(unsigned long address);
-extern void _tlbia(void);
-
 extern void flush_tlb_mm(struct mm_struct *mm);
 extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
                             unsigned long end);
 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
+static inline void local_flush_tlb_page(struct vm_area_struct *vma,
+                                        unsigned long vmaddr)
+{
+        flush_tlb_page(vma, vmaddr);
+}
+static inline void local_flush_tlb_mm(struct mm_struct *mm)
+{
+        flush_tlb_mm(mm);
+}
+
+#elif defined(CONFIG_PPC_STD_MMU_64)
 
-#else
 /*
- * TLB flushing for 64-bit has-MMU CPUs
+ * TLB flushing for 64-bit hash-MMU CPUs
  */
 
 #include <linux/percpu.h>
@@ -134,10 +123,19 @@ extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
 extern void flush_hash_range(unsigned long number, int local);
 
 
+static inline void local_flush_tlb_mm(struct mm_struct *mm)
+{
+}
+
 static inline void flush_tlb_mm(struct mm_struct *mm)
 {
 }
 
+static inline void local_flush_tlb_page(struct vm_area_struct *vma,
+                                        unsigned long vmaddr)
+{
+}
+
 static inline void flush_tlb_page(struct vm_area_struct *vma,
                                   unsigned long vmaddr)
 {
@@ -162,7 +160,8 @@ static inline void flush_tlb_kernel_range(unsigned long start,
 extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
                                      unsigned long end);
 
-
+#else
+#error Unsupported MMU type
 #endif
 
 #endif /*__KERNEL__ */
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
index c32da6f97999..375258559ae6 100644
--- a/arch/powerpc/include/asm/topology.h
+++ b/arch/powerpc/include/asm/topology.h
@@ -22,11 +22,11 @@ static inline cpumask_t node_to_cpumask(int node)
         return numa_cpumask_lookup_table[node];
 }
 
+#define cpumask_of_node(node) (&numa_cpumask_lookup_table[node])
+
 static inline int node_to_first_cpu(int node)
 {
-        cpumask_t tmp;
-        tmp = node_to_cpumask(node);
-        return first_cpu(tmp);
+        return cpumask_first(cpumask_of_node(node));
 }
 
 int of_node_to_nid(struct device_node *device);
@@ -46,9 +46,12 @@ static inline int pcibus_to_node(struct pci_bus *bus)
                                         node_to_cpumask(pcibus_to_node(bus)) \
                                 )
 
+#define cpumask_of_pcibus(bus)  (pcibus_to_node(bus) == -1 ?            \
+                                 cpu_all_mask :                         \
+                                 cpumask_of_node(pcibus_to_node(bus)))
+
 /* sched_domains SD_NODE_INIT for PPC64 machines */
 #define SD_NODE_INIT (struct sched_domain) {            \
-        .span                   = CPU_MASK_NONE,        \
         .parent                 = NULL,                 \
         .child                  = NULL,                 \
         .groups                 = NULL,                 \
@@ -109,6 +112,8 @@ static inline void sysfs_remove_device_from_node(struct sys_device *dev,
 
 #define topology_thread_siblings(cpu)   (per_cpu(cpu_sibling_map, cpu))
 #define topology_core_siblings(cpu)     (per_cpu(cpu_core_map, cpu))
+#define topology_thread_cpumask(cpu)    (&per_cpu(cpu_sibling_map, cpu))
+#define topology_core_cpumask(cpu)      (&per_cpu(cpu_core_map, cpu))
 #define topology_core_id(cpu)           (cpu_to_core_id(cpu))
 #endif
 #endif
diff --git a/arch/powerpc/include/asm/vdso_datapage.h b/arch/powerpc/include/asm/vdso_datapage.h
index f01393224b52..13c2c283e178 100644
--- a/arch/powerpc/include/asm/vdso_datapage.h
+++ b/arch/powerpc/include/asm/vdso_datapage.h
@@ -39,6 +39,7 @@
 #ifndef __ASSEMBLY__
 
 #include <linux/unistd.h>
+#include <linux/time.h>
 
 #define SYSCALL_MAP_SIZE      ((__NR_syscalls + 31) / 32)
 
@@ -83,6 +84,7 @@ struct vdso_data {
         __u32 icache_log_block_size;            /* L1 i-cache log block size */
         __s32 wtom_clock_sec;                   /* Wall to monotonic clock */
         __s32 wtom_clock_nsec;
+        struct timespec stamp_xtime;    /* xtime as at tb_orig_stamp */
         __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls  */
         __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
 };
@@ -102,6 +104,7 @@ struct vdso_data {
         __u32 tz_dsttime;               /* Type of dst correction       0x5C */
         __s32 wtom_clock_sec;                   /* Wall to monotonic clock */
         __s32 wtom_clock_nsec;
+        struct timespec stamp_xtime;    /* xtime as at tb_orig_stamp */
         __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
         __u32 dcache_block_size;        /* L1 d-cache block size     */
         __u32 icache_block_size;        /* L1 i-cache block size     */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 92673b43858d..1308a86e9070 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -17,6 +17,7 @@ ifdef CONFIG_FUNCTION_TRACER
 CFLAGS_REMOVE_cputable.o = -pg -mno-sched-epilog
 CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog
 CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog
+CFLAGS_REMOVE_prom.o = -pg -mno-sched-epilog
 
 ifdef CONFIG_DYNAMIC_FTRACE
 # dynamic ftrace setup.
@@ -102,6 +103,10 @@ endif
 
 obj-$(CONFIG_PPC64)             += $(obj64-y)
 
+ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC),)
+obj-y                           += ppc_save_regs.o
+endif
+
 extra-$(CONFIG_PPC_FPU)         += fpu.o
 extra-$(CONFIG_PPC64)           += entry_64.o
 
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 75c5dd0138fd..9937fe44555f 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -23,9 +23,6 @@
 #include <linux/mm.h>
 #include <linux/suspend.h>
 #include <linux/hrtimer.h>
-#ifdef CONFIG_KVM
-#include <linux/kvm_host.h>
-#endif
 #ifdef CONFIG_PPC64
 #include <linux/time.h>
 #include <linux/hardirq.h>
@@ -51,6 +48,9 @@
 #ifdef CONFIG_PPC_ISERIES
 #include <asm/iseries/alpaca.h>
 #endif
+#ifdef CONFIG_KVM
+#include <asm/kvm_44x.h>
+#endif
 
 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 #include "head_booke.h"
@@ -60,6 +60,7 @@ int main(void)
 {
         DEFINE(THREAD, offsetof(struct task_struct, thread));
         DEFINE(MM, offsetof(struct task_struct, mm));
+        DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
 #ifdef CONFIG_PPC64
         DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
 #else
@@ -306,6 +307,7 @@ int main(void)
         DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
         DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
         DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
+        DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
         DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
         DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
         DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
@@ -355,12 +357,10 @@ int main(void)
         DEFINE(PTE_SIZE, sizeof(pte_t));
 
 #ifdef CONFIG_KVM
-        DEFINE(TLBE_BYTES, sizeof(struct tlbe));
+        DEFINE(TLBE_BYTES, sizeof(struct kvmppc_44x_tlbe));
 
         DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
         DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
-        DEFINE(VCPU_SHADOW_TLB, offsetof(struct kvm_vcpu, arch.shadow_tlb));
-        DEFINE(VCPU_SHADOW_MOD, offsetof(struct kvm_vcpu, arch.shadow_tlb_mod));
         DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
         DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
         DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
@@ -378,6 +378,21 @@ int main(void)
         DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
         DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
 #endif
+#ifdef CONFIG_44x
+        DEFINE(PGD_T_LOG2, PGD_T_LOG2);
+        DEFINE(PTE_T_LOG2, PTE_T_LOG2);
+#endif
+
+#ifdef CONFIG_KVM_EXIT_TIMING
+        DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
+                                                arch.timing_exit.tv32.tbu));
+        DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
+                                                arch.timing_exit.tv32.tbl));
+        DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
+                                        arch.timing_last_enter.tv32.tbu));
+        DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
+                                        arch.timing_last_enter.tv32.tbl));
+#endif
 
         return 0;
 }
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 7e8719504f39..923f87aff20a 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -19,6 +19,7 @@
 #include <asm/oprofile_impl.h>
 #include <asm/cputable.h>
 #include <asm/prom.h>           /* for PTRRELOC on ARCH=ppc */
+#include <asm/mmu.h>
 
 struct cpu_spec* cur_cpu_spec = NULL;
 EXPORT_SYMBOL(cur_cpu_spec);
@@ -94,6 +95,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER3 (630)",
                 .cpu_features           = CPU_FTRS_POWER3,
                 .cpu_user_features      = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -109,6 +111,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER3 (630+)",
                 .cpu_features           = CPU_FTRS_POWER3,
                 .cpu_user_features      = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -124,6 +127,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "RS64-II (northstar)",
                 .cpu_features           = CPU_FTRS_RS64,
                 .cpu_user_features      = COMMON_USER_PPC64,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -139,6 +143,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "RS64-III (pulsar)",
                 .cpu_features           = CPU_FTRS_RS64,
                 .cpu_user_features      = COMMON_USER_PPC64,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -154,6 +159,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "RS64-III (icestar)",
                 .cpu_features           = CPU_FTRS_RS64,
                 .cpu_user_features      = COMMON_USER_PPC64,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -169,6 +175,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "RS64-IV (sstar)",
                 .cpu_features           = CPU_FTRS_RS64,
                 .cpu_user_features      = COMMON_USER_PPC64,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -184,6 +191,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER4 (gp)",
                 .cpu_features           = CPU_FTRS_POWER4,
                 .cpu_user_features      = COMMON_USER_POWER4,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -199,6 +207,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER4+ (gq)",
                 .cpu_features           = CPU_FTRS_POWER4,
                 .cpu_user_features      = COMMON_USER_POWER4,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -215,6 +224,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -233,6 +243,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -251,6 +262,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -269,6 +281,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -287,6 +300,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -303,6 +317,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER5 (gr)",
                 .cpu_features           = CPU_FTRS_POWER5,
                 .cpu_user_features      = COMMON_USER_POWER5,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -323,6 +338,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER5+ (gs)",
                 .cpu_features           = CPU_FTRS_POWER5,
                 .cpu_user_features      = COMMON_USER_POWER5_PLUS,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -339,6 +355,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER5+ (gs)",
                 .cpu_features           = CPU_FTRS_POWER5,
                 .cpu_user_features      = COMMON_USER_POWER5_PLUS,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -356,6 +373,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER5+",
                 .cpu_features           = CPU_FTRS_POWER5,
                 .cpu_user_features      = COMMON_USER_POWER5_PLUS,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .machine_check          = machine_check_generic,
@@ -369,6 +387,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_POWER6,
                 .cpu_user_features      = COMMON_USER_POWER6 |
                         PPC_FEATURE_POWER6_EXT,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -388,6 +407,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER6 (architected)",
                 .cpu_features           = CPU_FTRS_POWER6,
                 .cpu_user_features      = COMMON_USER_POWER6,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .machine_check          = machine_check_generic,
@@ -400,6 +420,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER7 (architected)",
                 .cpu_features           = CPU_FTRS_POWER7,
                 .cpu_user_features      = COMMON_USER_POWER7,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .machine_check          = machine_check_generic,
@@ -412,6 +433,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER7 (raw)",
                 .cpu_features           = CPU_FTRS_POWER7,
                 .cpu_user_features      = COMMON_USER_POWER7,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -434,6 +456,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_user_features      = COMMON_USER_PPC64 |
                         PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
                         PPC_FEATURE_SMT,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 4,
@@ -449,6 +472,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "PA6T",
                 .cpu_features           = CPU_FTRS_PA6T,
                 .cpu_user_features      = COMMON_USER_PA6T,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 64,
                 .dcache_bsize           = 64,
                 .num_pmcs               = 6,
@@ -466,6 +490,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER4 (compatible)",
                 .cpu_features           = CPU_FTRS_COMPATIBLE,
                 .cpu_user_features      = COMMON_USER_PPC64,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -483,6 +508,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC601,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_601_INSTR |
                         PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_generic,
@@ -494,6 +520,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "603",
                 .cpu_features           = CPU_FTRS_603,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = 0,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -506,6 +533,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "603e",
                 .cpu_features           = CPU_FTRS_603,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = 0,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -518,6 +546,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "603ev",
                 .cpu_features           = CPU_FTRS_603,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = 0,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -530,6 +559,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "604",
                 .cpu_features           = CPU_FTRS_604,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 2,
@@ -543,6 +573,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "604e",
                 .cpu_features           = CPU_FTRS_604,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -556,6 +587,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "604r",
                 .cpu_features           = CPU_FTRS_604,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -569,6 +601,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "604ev",
                 .cpu_features           = CPU_FTRS_604,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -582,6 +615,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "740/750",
                 .cpu_features           = CPU_FTRS_740_NOTAU,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -595,6 +629,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750CX",
                 .cpu_features           = CPU_FTRS_750,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -608,6 +643,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750CX",
                 .cpu_features           = CPU_FTRS_750,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -622,6 +658,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750CXe",
                 .cpu_features           = CPU_FTRS_750,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -636,6 +673,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750CXe",
                 .cpu_features           = CPU_FTRS_750,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -650,6 +688,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750CL",
                 .cpu_features           = CPU_FTRS_750CL,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -664,6 +703,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "745/755",
                 .cpu_features           = CPU_FTRS_750,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -678,6 +718,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750FX",
                 .cpu_features           = CPU_FTRS_750FX1,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -692,6 +733,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750FX",
                 .cpu_features           = CPU_FTRS_750FX2,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -706,6 +748,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750FX",
                 .cpu_features           = CPU_FTRS_750FX,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -720,6 +763,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "750GX",
                 .cpu_features           = CPU_FTRS_750GX,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -734,6 +778,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "740/750",
                 .cpu_features           = CPU_FTRS_740,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -749,6 +794,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7400_NOTAU,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -764,6 +810,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7400,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -779,6 +826,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7400,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -794,6 +842,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7450_20,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -811,6 +860,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7450_21,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -828,6 +878,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7450_23,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -845,6 +896,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7455_1,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -862,6 +914,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7455_20,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -879,6 +932,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7455,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -896,6 +950,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7447_10,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -913,6 +968,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7447_10,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -929,6 +985,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "7447/7457",
                 .cpu_features           = CPU_FTRS_7447,
                 .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -946,6 +1003,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7447A,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -963,6 +1021,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_7448,
                 .cpu_user_features      = COMMON_USER |
                         PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
+                .mmu_features           = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -979,6 +1038,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "82xx",
                 .cpu_features           = CPU_FTRS_82XX,
                 .cpu_user_features      = COMMON_USER,
+                .mmu_features           = 0,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -991,6 +1051,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "G2_LE",
                 .cpu_features           = CPU_FTRS_G2_LE,
                 .cpu_user_features      = COMMON_USER,
+                .mmu_features           = MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -1003,6 +1064,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e300c1",
                 .cpu_features           = CPU_FTRS_E300,
                 .cpu_user_features      = COMMON_USER,
+                .mmu_features           = MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -1015,6 +1077,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e300c2",
                 .cpu_features           = CPU_FTRS_E300C2,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
+                .mmu_features           = MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -1027,6 +1090,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e300c3",
                 .cpu_features           = CPU_FTRS_E300,
                 .cpu_user_features      = COMMON_USER,
+                .mmu_features           = MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -1041,6 +1105,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e300c4",
                 .cpu_features           = CPU_FTRS_E300,
                 .cpu_user_features      = COMMON_USER,
+                .mmu_features           = MMU_FTR_USE_HIGH_BATS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -1056,6 +1121,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "(generic PPC)",
                 .cpu_features           = CPU_FTRS_CLASSIC32,
                 .cpu_user_features      = COMMON_USER,
+                .mmu_features           = MMU_FTR_HPTE_TABLE,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_generic,
@@ -1071,6 +1137,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                  * if the 8xx code is there.... */
                 .cpu_features           = CPU_FTRS_8XX,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
+                .mmu_features           = MMU_FTR_TYPE_8xx,
                 .icache_bsize           = 16,
                 .dcache_bsize           = 16,
                 .platform               = "ppc823",
@@ -1083,6 +1150,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "403GC",
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 16,
                 .dcache_bsize           = 16,
                 .machine_check          = machine_check_4xx,
@@ -1095,6 +1163,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 16,
                 .dcache_bsize           = 16,
                 .machine_check          = machine_check_4xx,
@@ -1106,6 +1175,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "403G ??",
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 16,
                 .dcache_bsize           = 16,
                 .machine_check          = machine_check_4xx,
@@ -1118,6 +1188,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1130,6 +1201,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1142,6 +1214,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1154,6 +1227,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1166,6 +1240,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1178,6 +1253,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1190,6 +1266,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1202,6 +1279,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1213,6 +1291,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "405LP",
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1225,6 +1304,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1237,6 +1317,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1249,6 +1330,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1261,6 +1343,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1273,6 +1356,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1286,6 +1370,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1298,6 +1383,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1312,6 +1398,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GR Rev. A",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1323,6 +1410,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440EP Rev. A",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440ep,
@@ -1335,6 +1423,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GR Rev. B",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1346,6 +1435,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440EP Rev. C",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440ep,
@@ -1358,6 +1448,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440EP Rev. B",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440ep,
@@ -1370,6 +1461,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GRX",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440grx,
@@ -1382,6 +1474,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440EPX",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440epx,
@@ -1394,6 +1487,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GP Rev. B",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1405,6 +1499,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GP Rev. C",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1416,6 +1511,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GX Rev. A",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440gx,
@@ -1428,6 +1524,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GX Rev. B",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440gx,
@@ -1440,6 +1537,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GX Rev. C",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440gx,
@@ -1452,6 +1550,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440GX Rev. F",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440gx,
@@ -1464,6 +1563,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440SP Rev. A",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1475,6 +1575,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440SPe Rev. A",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440spe,
@@ -1487,6 +1588,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440SPe Rev. B",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440spe,
@@ -1499,6 +1601,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "440 in Virtex-5 FXT",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_440x5,
@@ -1509,8 +1612,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pvr_mask               = 0xffff0002,
                 .pvr_value              = 0x13020002,
                 .cpu_name               = "460EX",
-                .cpu_features           = CPU_FTRS_44X,
+                .cpu_features           = CPU_FTRS_440x6,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_460ex,
@@ -1521,8 +1625,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pvr_mask               = 0xffff0002,
                 .pvr_value              = 0x13020000,
                 .cpu_name               = "460GT",
-                .cpu_features           = CPU_FTRS_44X,
+                .cpu_features           = CPU_FTRS_440x6,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_460gt,
@@ -1535,6 +1640,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "(generic 44x PPC)",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_4xx,
@@ -1551,6 +1657,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_user_features      = COMMON_USER_BOOKE |
                         PPC_FEATURE_HAS_EFP_SINGLE |
                         PPC_FEATURE_UNIFIED_CACHE,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_e200,
                 .platform               = "ppc5554",
@@ -1565,6 +1672,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                         PPC_FEATURE_HAS_SPE_COMP |
                         PPC_FEATURE_HAS_EFP_SINGLE_COMP |
                         PPC_FEATURE_UNIFIED_CACHE,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_e200,
                 .platform               = "ppc5554",
@@ -1577,6 +1685,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_user_features      = COMMON_USER_BOOKE |
                         PPC_FEATURE_HAS_EFP_SINGLE |
                         PPC_FEATURE_UNIFIED_CACHE,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_e200,
                 .platform               = "ppc5554",
@@ -1591,6 +1700,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_user_features      = COMMON_USER_BOOKE |
                         PPC_FEATURE_HAS_SPE_COMP |
                         PPC_FEATURE_HAS_EFP_SINGLE_COMP,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -1608,6 +1718,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                         PPC_FEATURE_HAS_SPE_COMP |
                         PPC_FEATURE_HAS_EFP_SINGLE_COMP |
                         PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -1622,6 +1733,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e500mc",
                 .cpu_features           = CPU_FTRS_E500MC,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
                 .icache_bsize           = 64,
                 .dcache_bsize           = 64,
                 .num_pmcs               = 4,
@@ -1638,6 +1750,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_user_features      = COMMON_USER_BOOKE |
                         PPC_FEATURE_HAS_SPE_COMP |
                         PPC_FEATURE_HAS_EFP_SINGLE_COMP,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .machine_check          = machine_check_e500,
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 3a6eaa876ee1..1c5c8a6fc129 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -120,6 +120,26 @@ static inline void dma_direct_unmap_page(struct device *dev,
 {
 }
 
+#ifdef CONFIG_NOT_COHERENT_CACHE
+static inline void dma_direct_sync_sg(struct device *dev,
+                struct scatterlist *sgl, int nents,
+                enum dma_data_direction direction)
+{
+        struct scatterlist *sg;
+        int i;
+
+        for_each_sg(sgl, sg, nents, i)
+                __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
+}
+
+static inline void dma_direct_sync_single_range(struct device *dev,
+                dma_addr_t dma_handle, unsigned long offset, size_t size,
+                enum dma_data_direction direction)
+{
+        __dma_sync(bus_to_virt(dma_handle+offset), size, direction);
+}
+#endif
+
 struct dma_mapping_ops dma_direct_ops = {
         .alloc_coherent = dma_direct_alloc_coherent,
         .free_coherent  = dma_direct_free_coherent,
@@ -128,5 +148,11 @@ struct dma_mapping_ops dma_direct_ops = {
         .dma_supported  = dma_direct_dma_supported,
         .map_page       = dma_direct_map_page,
         .unmap_page     = dma_direct_unmap_page,
+#ifdef CONFIG_NOT_COHERENT_CACHE
+        .sync_single_range_for_cpu      = dma_direct_sync_single_range,
+        .sync_single_range_for_device   = dma_direct_sync_single_range,
+        .sync_sg_for_cpu                = dma_direct_sync_sg,
+        .sync_sg_for_device             = dma_direct_sync_sg,
+#endif
 };
 EXPORT_SYMBOL(dma_direct_ops);
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 7ecc0d1855c3..6f7eb7e00c79 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -1162,39 +1162,17 @@ machine_check_in_rtas:
 #ifdef CONFIG_DYNAMIC_FTRACE
 _GLOBAL(mcount)
 _GLOBAL(_mcount)
-        stwu    r1,-48(r1)
-        stw     r3, 12(r1)
-        stw     r4, 16(r1)
-        stw     r5, 20(r1)
-        stw     r6, 24(r1)
-        mflr    r3
-        stw     r7, 28(r1)
-        mfcr    r5
-        stw     r8, 32(r1)
-        stw     r9, 36(r1)
-        stw     r10,40(r1)
-        stw     r3, 44(r1)
-        stw     r5, 8(r1)
-        subi    r3, r3, MCOUNT_INSN_SIZE
-        .globl mcount_call
-mcount_call:
-        bl      ftrace_stub
-        nop
-        lwz     r6, 8(r1)
-        lwz     r0, 44(r1)
-        lwz     r3, 12(r1)
+        /*
+         * It is required that _mcount on PPC32 must preserve the
+         * link register. But we have r0 to play with. We use r0
+         * to push the return address back to the caller of mcount
+         * into the ctr register, restore the link register and
+         * then jump back using the ctr register.
+         */
+        mflr    r0
         mtctr   r0
-        lwz     r4, 16(r1)
-        mtcr    r6
-        lwz     r5, 20(r1)
-        lwz     r6, 24(r1)
-        lwz     r0, 52(r1)
-        lwz     r7, 28(r1)
-        lwz     r8, 32(r1)
+        lwz     r0, 4(r1)
         mtlr    r0
-        lwz     r9, 36(r1)
-        lwz     r10,40(r1)
-        addi    r1, r1, 48
         bctr
 
 _GLOBAL(ftrace_caller)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index e0bcf9354286..383ed6eb0085 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -894,18 +894,6 @@ _GLOBAL(enter_prom)
 #ifdef CONFIG_DYNAMIC_FTRACE
 _GLOBAL(mcount)
 _GLOBAL(_mcount)
-        /* Taken from output of objdump from lib64/glibc */
-        mflr    r3
-        stdu    r1, -112(r1)
-        std     r3, 128(r1)
-        subi    r3, r3, MCOUNT_INSN_SIZE
-        .globl mcount_call
-mcount_call:
-        bl      ftrace_stub
-        nop
-        ld      r0, 128(r1)
-        mtlr    r0
-        addi    r1, r1, 112
         blr
 
 _GLOBAL(ftrace_caller)
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index f4b006ed0ab1..5355244c99ff 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -9,22 +9,30 @@
 
 #include <linux/spinlock.h>
 #include <linux/hardirq.h>
+#include <linux/uaccess.h>
+#include <linux/module.h>
 #include <linux/ftrace.h>
 #include <linux/percpu.h>
 #include <linux/init.h>
 #include <linux/list.h>
 
 #include <asm/cacheflush.h>
+#include <asm/code-patching.h>
 #include <asm/ftrace.h>
 
+#if 0
+#define DEBUGP printk
+#else
+#define DEBUGP(fmt , ...)       do { } while (0)
+#endif
 
-static unsigned int ftrace_nop = 0x60000000;
+static unsigned int ftrace_nop = PPC_NOP_INSTR;
 
 #ifdef CONFIG_PPC32
 # define GET_ADDR(addr) addr
 #else
 /* PowerPC64's functions are data that points to the functions */
-# define GET_ADDR(addr) *(unsigned long *)addr
+# define GET_ADDR(addr) (*(unsigned long *)addr)
 #endif
 
 
@@ -33,12 +41,12 @@ static unsigned int ftrace_calc_offset(long ip, long addr)
         return (int)(addr - ip);
 }
 
-unsigned char *ftrace_nop_replace(void)
+static unsigned char *ftrace_nop_replace(void)
 {
         return (char *)&ftrace_nop;
 }
 
-unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
+static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
 {
         static unsigned int op;
 
@@ -68,49 +76,422 @@ unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
 # define _ASM_PTR       " .long "
 #endif
 
-int
+static int
 ftrace_modify_code(unsigned long ip, unsigned char *old_code,
                    unsigned char *new_code)
 {
-        unsigned replaced;
-        unsigned old = *(unsigned *)old_code;
-        unsigned new = *(unsigned *)new_code;
-        int faulted = 0;
+        unsigned char replaced[MCOUNT_INSN_SIZE];
 
         /*
          * Note: Due to modules and __init, code can
          *  disappear and change, we need to protect against faulting
-         *  as well as code changing.
+         *  as well as code changing. We do this by using the
+         *  probe_kernel_* functions.
          *
          * No real locking needed, this code is run through
-         * kstop_machine.
+         * kstop_machine, or before SMP starts.
          */
-        asm volatile (
-                "1: lwz         %1, 0(%2)\n"
-                "   cmpw        %1, %5\n"
-                "   bne         2f\n"
-                "   stwu        %3, 0(%2)\n"
-                "2:\n"
-                ".section .fixup, \"ax\"\n"
-                "3:     li %0, 1\n"
-                "       b 2b\n"
-                ".previous\n"
-                ".section __ex_table,\"a\"\n"
-                _ASM_ALIGN "\n"
-                _ASM_PTR "1b, 3b\n"
-                ".previous"
-                : "=r"(faulted), "=r"(replaced)
-                : "r"(ip), "r"(new),
-                  "0"(faulted), "r"(old)
-                : "memory");
-
-        if (replaced != old && replaced != new)
-                faulted = 2;
-
-        if (!faulted)
-                flush_icache_range(ip, ip + 8);
-
-        return faulted;
+
+        /* read the text we want to modify */
+        if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE))
+                return -EFAULT;
+
+        /* Make sure it is what we expect it to be */
+        if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0)
+                return -EINVAL;
+
+        /* replace the text with the new text */
+        if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE))
+                return -EPERM;
+
+        flush_icache_range(ip, ip + 8);
+
+        return 0;
+}
+
+/*
+ * Helper functions that are the same for both PPC64 and PPC32.
+ */
+static int test_24bit_addr(unsigned long ip, unsigned long addr)
+{
+
+        /* use the create_branch to verify that this offset can be branched */
+        return create_branch((unsigned int *)ip, addr, 0);
+}
+
+static int is_bl_op(unsigned int op)
+{
+        return (op & 0xfc000003) == 0x48000001;
+}
+
+static unsigned long find_bl_target(unsigned long ip, unsigned int op)
+{
+        static int offset;
+
+        offset = (op & 0x03fffffc);
+        /* make it signed */
+        if (offset & 0x02000000)
+                offset |= 0xfe000000;
+
+        return ip + (long)offset;
+}
+
+#ifdef CONFIG_PPC64
+static int
+__ftrace_make_nop(struct module *mod,
+                  struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned int op;
+        unsigned int jmp[5];
+        unsigned long ptr;
+        unsigned long ip = rec->ip;
+        unsigned long tramp;
+        int offset;
+
+        /* read where this goes */
+        if (probe_kernel_read(&op, (void *)ip, sizeof(int)))
+                return -EFAULT;
+
+        /* Make sure that that this is still a 24bit jump */
+        if (!is_bl_op(op)) {
+                printk(KERN_ERR "Not expected bl: opcode is %x\n", op);
+                return -EINVAL;
+        }
+
+        /* lets find where the pointer goes */
+        tramp = find_bl_target(ip, op);
+
+        /*
+         * On PPC64 the trampoline looks like:
+         * 0x3d, 0x82, 0x00, 0x00,    addis   r12,r2, <high>
+         * 0x39, 0x8c, 0x00, 0x00,    addi    r12,r12, <low>
+         *   Where the bytes 2,3,6 and 7 make up the 32bit offset
+         *   to the TOC that holds the pointer.
+         *   to jump to.
+         * 0xf8, 0x41, 0x00, 0x28,    std     r2,40(r1)
+         * 0xe9, 0x6c, 0x00, 0x20,    ld      r11,32(r12)
+         *   The actually address is 32 bytes from the offset
+         *   into the TOC.
+         * 0xe8, 0x4c, 0x00, 0x28,    ld      r2,40(r12)
+         */
+
+        DEBUGP("ip:%lx jumps to %lx r2: %lx", ip, tramp, mod->arch.toc);
+
+        /* Find where the trampoline jumps to */
+        if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
+                printk(KERN_ERR "Failed to read %lx\n", tramp);
+                return -EFAULT;
+        }
+
+        DEBUGP(" %08x %08x", jmp[0], jmp[1]);
+
+        /* verify that this is what we expect it to be */
+        if (((jmp[0] & 0xffff0000) != 0x3d820000) ||
+            ((jmp[1] & 0xffff0000) != 0x398c0000) ||
+            (jmp[2] != 0xf8410028) ||
+            (jmp[3] != 0xe96c0020) ||
+            (jmp[4] != 0xe84c0028)) {
+                printk(KERN_ERR "Not a trampoline\n");
+                return -EINVAL;
+        }
+
+        offset = (unsigned)((unsigned short)jmp[0]) << 16 |
+                (unsigned)((unsigned short)jmp[1]);
+
+        DEBUGP(" %x ", offset);
+
+        /* get the address this jumps too */
+        tramp = mod->arch.toc + offset + 32;
+        DEBUGP("toc: %lx", tramp);
+
+        if (probe_kernel_read(jmp, (void *)tramp, 8)) {
+                printk(KERN_ERR "Failed to read %lx\n", tramp);
+                return -EFAULT;
+        }
+
+        DEBUGP(" %08x %08x\n", jmp[0], jmp[1]);
+
+        ptr = ((unsigned long)jmp[0] << 32) + jmp[1];
+
+        /* This should match what was called */
+        if (ptr != GET_ADDR(addr)) {
+                printk(KERN_ERR "addr does not match %lx\n", ptr);
+                return -EINVAL;
+        }
+
+        /*
+         * We want to nop the line, but the next line is
+         *  0xe8, 0x41, 0x00, 0x28   ld r2,40(r1)
+         * This needs to be turned to a nop too.
+         */
+        if (probe_kernel_read(&op, (void *)(ip+4), MCOUNT_INSN_SIZE))
+                return -EFAULT;
+
+        if (op != 0xe8410028) {
+                printk(KERN_ERR "Next line is not ld! (%08x)\n", op);
+                return -EINVAL;
+        }
+
+        /*
+         * Milton Miller pointed out that we can not blindly do nops.
+         * If a task was preempted when calling a trace function,
+         * the nops will remove the way to restore the TOC in r2
+         * and the r2 TOC will get corrupted.
+         */
+
+        /*
+         * Replace:
+         *   bl <tramp>  <==== will be replaced with "b 1f"
+         *   ld r2,40(r1)
+         *  1:
+         */
+        op = 0x48000008;        /* b +8 */
+
+        if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
+                return -EPERM;
+
+
+        flush_icache_range(ip, ip + 8);
+
+        return 0;
+}
+
+#else /* !PPC64 */
+static int
+__ftrace_make_nop(struct module *mod,
+                  struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned int op;
+        unsigned int jmp[4];
+        unsigned long ip = rec->ip;
+        unsigned long tramp;
+
+        if (probe_kernel_read(&op, (void *)ip, MCOUNT_INSN_SIZE))
+                return -EFAULT;
+
+        /* Make sure that that this is still a 24bit jump */
+        if (!is_bl_op(op)) {
+                printk(KERN_ERR "Not expected bl: opcode is %x\n", op);
+                return -EINVAL;
+        }
+
+        /* lets find where the pointer goes */
+        tramp = find_bl_target(ip, op);
+
+        /*
+         * On PPC32 the trampoline looks like:
+         *  0x3d, 0x60, 0x00, 0x00  lis r11,sym@ha
+         *  0x39, 0x6b, 0x00, 0x00  addi r11,r11,sym@l
+         *  0x7d, 0x69, 0x03, 0xa6  mtctr r11
+         *  0x4e, 0x80, 0x04, 0x20  bctr
+         */
+
+        DEBUGP("ip:%lx jumps to %lx", ip, tramp);
+
+        /* Find where the trampoline jumps to */
+        if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
+                printk(KERN_ERR "Failed to read %lx\n", tramp);
+                return -EFAULT;
+        }
+
+        DEBUGP(" %08x %08x ", jmp[0], jmp[1]);
+
+        /* verify that this is what we expect it to be */
+        if (((jmp[0] & 0xffff0000) != 0x3d600000) ||
+            ((jmp[1] & 0xffff0000) != 0x396b0000) ||
+            (jmp[2] != 0x7d6903a6) ||
+            (jmp[3] != 0x4e800420)) {
+                printk(KERN_ERR "Not a trampoline\n");
+                return -EINVAL;
+        }
+
+        tramp = (jmp[1] & 0xffff) |
+                ((jmp[0] & 0xffff) << 16);
+        if (tramp & 0x8000)
+                tramp -= 0x10000;
+
+        DEBUGP(" %x ", tramp);
+
+        if (tramp != addr) {
+                printk(KERN_ERR
+                       "Trampoline location %08lx does not match addr\n",
+                       tramp);
+                return -EINVAL;
+        }
+
+        op = PPC_NOP_INSTR;
+
+        if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
+                return -EPERM;
+
+        flush_icache_range(ip, ip + 8);
+
+        return 0;
+}
+#endif /* PPC64 */
+
+int ftrace_make_nop(struct module *mod,
+                    struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned char *old, *new;
+        unsigned long ip = rec->ip;
+
+        /*
+         * If the calling address is more that 24 bits away,
+         * then we had to use a trampoline to make the call.
+         * Otherwise just update the call site.
+         */
+        if (test_24bit_addr(ip, addr)) {
+                /* within range */
+                old = ftrace_call_replace(ip, addr);
+                new = ftrace_nop_replace();
+                return ftrace_modify_code(ip, old, new);
+        }
+
+        /*
+         * Out of range jumps are called from modules.
+         * We should either already have a pointer to the module
+         * or it has been passed in.
+         */
+        if (!rec->arch.mod) {
+                if (!mod) {
+                        printk(KERN_ERR "No module loaded addr=%lx\n",
+                               addr);
+                        return -EFAULT;
+                }
+                rec->arch.mod = mod;
+        } else if (mod) {
+                if (mod != rec->arch.mod) {
+                        printk(KERN_ERR
+                               "Record mod %p not equal to passed in mod %p\n",
+                               rec->arch.mod, mod);
+                        return -EINVAL;
+                }
+                /* nothing to do if mod == rec->arch.mod */
+        } else
+                mod = rec->arch.mod;
+
+        return __ftrace_make_nop(mod, rec, addr);
+
+}
+
+#ifdef CONFIG_PPC64
+static int
+__ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned int op[2];
+        unsigned long ip = rec->ip;
+
+        /* read where this goes */
+        if (probe_kernel_read(op, (void *)ip, MCOUNT_INSN_SIZE * 2))
+                return -EFAULT;
+
+        /*
+         * It should be pointing to two nops or
+         *  b +8; ld r2,40(r1)
+         */
+        if (((op[0] != 0x48000008) || (op[1] != 0xe8410028)) &&
+            ((op[0] != PPC_NOP_INSTR) || (op[1] != PPC_NOP_INSTR))) {
+                printk(KERN_ERR "Expected NOPs but have %x %x\n", op[0], op[1]);
+                return -EINVAL;
+        }
+
+        /* If we never set up a trampoline to ftrace_caller, then bail */
+        if (!rec->arch.mod->arch.tramp) {
+                printk(KERN_ERR "No ftrace trampoline\n");
+                return -EINVAL;
+        }
+
+        /* create the branch to the trampoline */
+        op[0] = create_branch((unsigned int *)ip,
+                              rec->arch.mod->arch.tramp, BRANCH_SET_LINK);
+        if (!op[0]) {
+                printk(KERN_ERR "REL24 out of range!\n");
+                return -EINVAL;
+        }
+
+        /* ld r2,40(r1) */
+        op[1] = 0xe8410028;
+
+        DEBUGP("write to %lx\n", rec->ip);
+
+        if (probe_kernel_write((void *)ip, op, MCOUNT_INSN_SIZE * 2))
+                return -EPERM;
+
+        flush_icache_range(ip, ip + 8);
+
+        return 0;
+}
+#else
+static int
+__ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned int op;
+        unsigned long ip = rec->ip;
+
+        /* read where this goes */
+        if (probe_kernel_read(&op, (void *)ip, MCOUNT_INSN_SIZE))
+                return -EFAULT;
+
+        /* It should be pointing to a nop */
+        if (op != PPC_NOP_INSTR) {
+                printk(KERN_ERR "Expected NOP but have %x\n", op);
+                return -EINVAL;
+        }
+
+        /* If we never set up a trampoline to ftrace_caller, then bail */
+        if (!rec->arch.mod->arch.tramp) {
+                printk(KERN_ERR "No ftrace trampoline\n");
+                return -EINVAL;
+        }
+
+        /* create the branch to the trampoline */
+        op = create_branch((unsigned int *)ip,
+                           rec->arch.mod->arch.tramp, BRANCH_SET_LINK);
+        if (!op) {
+                printk(KERN_ERR "REL24 out of range!\n");
+                return -EINVAL;
+        }
+
+        DEBUGP("write to %lx\n", rec->ip);
+
+        if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
+                return -EPERM;
+
+        flush_icache_range(ip, ip + 8);
+
+        return 0;
+}
+#endif /* CONFIG_PPC64 */
+
+int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned char *old, *new;
+        unsigned long ip = rec->ip;
+
+        /*
+         * If the calling address is more that 24 bits away,
+         * then we had to use a trampoline to make the call.
+         * Otherwise just update the call site.
+         */
+        if (test_24bit_addr(ip, addr)) {
+                /* within range */
+                old = ftrace_nop_replace();
+                new = ftrace_call_replace(ip, addr);
+                return ftrace_modify_code(ip, old, new);
+        }
+
+        /*
+         * Out of range jumps are called from modules.
+         * Being that we are converting from nop, it had better
+         * already have a module defined.
+         */
+        if (!rec->arch.mod) {
+                printk(KERN_ERR "No module loaded\n");
+                return -EINVAL;
+        }
+
+        return __ftrace_make_call(rec, addr);
 }
 
 int ftrace_update_ftrace_func(ftrace_func_t func)
@@ -128,10 +509,10 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
 
 int __init ftrace_dyn_arch_init(void *data)
 {
-        /* This is running in kstop_machine */
+        /* caller expects data to be zero */
+        unsigned long *p = data;
 
-        ftrace_mcount_set(data);
+        *p = 0;
 
         return 0;
 }
-
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 0c326823c6d4..a1c4cfd25ded 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -31,6 +31,7 @@
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/ptrace.h>
+#include <asm/bug.h>
 
 /* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
 #define LOAD_BAT(n, reg, RA, RB)        \
@@ -182,7 +183,8 @@ __after_mmu_off:
         bl      reloc_offset
         mr      r26,r3
         addis   r4,r3,KERNELBASE@h      /* current address of _start */
-        cmpwi   0,r4,0                  /* are we already running at 0? */
+        lis     r5,PHYSICAL_START@h
+        cmplw   0,r4,r5                 /* already running at PHYSICAL_START? */
         bne     relocate_kernel
 /*
  * we now have the 1st 16M of ram mapped with the bats.
@@ -810,13 +812,13 @@ giveup_altivec:
 
 /*
  * This code is jumped to from the startup code to copy
- * the kernel image to physical address 0.
+ * the kernel image to physical address PHYSICAL_START.
  */
 relocate_kernel:
         addis   r9,r26,klimit@ha        /* fetch klimit */
         lwz     r25,klimit@l(r9)
         addis   r25,r25,-KERNELBASE@h
-        li      r3,0                    /* Destination base address */
+        lis     r3,PHYSICAL_START@h     /* Destination base address */
         li      r6,0                    /* Destination offset */
         li      r5,0x4000               /* # bytes of memory to copy */
         bl      copy_and_flush          /* copy the first 0x4000 bytes */
@@ -989,12 +991,12 @@ load_up_mmu:
         LOAD_BAT(1,r3,r4,r5)
         LOAD_BAT(2,r3,r4,r5)
         LOAD_BAT(3,r3,r4,r5)
-BEGIN_FTR_SECTION
+BEGIN_MMU_FTR_SECTION
         LOAD_BAT(4,r3,r4,r5)
         LOAD_BAT(5,r3,r4,r5)
         LOAD_BAT(6,r3,r4,r5)
         LOAD_BAT(7,r3,r4,r5)
-END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
         blr
 
 /*
@@ -1070,9 +1072,14 @@ start_here:
         RFI
 
 /*
+ * void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next);
+ *
  * Set up the segment registers for a new context.
  */
-_ENTRY(set_context)
+_ENTRY(switch_mmu_context)
+        lwz     r3,MMCONTEXTID(r4)
+        cmpwi   cr0,r3,0
+        blt-    4f
         mulli   r3,r3,897       /* multiply context by skew factor */
         rlwinm  r3,r3,4,8,27    /* VSID = (context & 0xfffff) << 4 */
         addis   r3,r3,0x6000    /* Set Ks, Ku bits */
@@ -1083,6 +1090,7 @@ _ENTRY(set_context)
         /* Context switch the PTE pointer for the Abatron BDI2000.
          * The PGDIR is passed as second argument.
          */
+        lwz     r4,MM_PGD(r4)
         lis     r5, KERNELBASE@h
         lwz     r5, 0xf0(r5)
         stw     r4, 0x4(r5)
@@ -1098,6 +1106,9 @@ _ENTRY(set_context)
         sync
         isync
         blr
+4:      trap
+        EMIT_BUG_ENTRY 4b,__FILE__,__LINE__,0
+        blr
 
 /*
  * An undocumented "feature" of 604e requires that the v bit
@@ -1131,7 +1142,7 @@ clear_bats:
         mtspr   SPRN_IBAT2L,r10
         mtspr   SPRN_IBAT3U,r10
         mtspr   SPRN_IBAT3L,r10
-BEGIN_FTR_SECTION
+BEGIN_MMU_FTR_SECTION
         /* Here's a tweak: at this point, CPU setup have
          * not been called yet, so HIGH_BAT_EN may not be
          * set in HID0 for the 745x processors. However, it
@@ -1154,7 +1165,7 @@ BEGIN_FTR_SECTION
         mtspr   SPRN_IBAT6L,r10
         mtspr   SPRN_IBAT7U,r10
         mtspr   SPRN_IBAT7L,r10
-END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
         blr
 
 flush_tlbs:
@@ -1178,11 +1189,11 @@ mmu_off:
 
 /*
  * Use the first pair of BAT registers to map the 1st 16MB
- * of RAM to KERNELBASE.  From this point on we can't safely
+ * of RAM to PAGE_OFFSET.  From this point on we can't safely
  * call OF any more.
  */
 initial_bats:
-        lis     r11,KERNELBASE@h
+        lis     r11,PAGE_OFFSET@h
         mfspr   r9,SPRN_PVR
         rlwinm  r9,r9,16,16,31          /* r9 = 1 for 601, 4 for 604 */
         cmpwi   0,r9,1
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index f3a1ea9d7fe4..b56fecc93a16 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -69,6 +69,17 @@ _ENTRY(_start);
         li      r24,0           /* CPU number */
 
 /*
+ * In case the firmware didn't do it, we apply some workarounds
+ * that are good for all 440 core variants here
+ */
+        mfspr   r3,SPRN_CCR0
+        rlwinm  r3,r3,0,0,27    /* disable icache prefetch */
+        isync
+        mtspr   SPRN_CCR0,r3
+        isync
+        sync
+
+/*
  * Set up the initial MMU state
  *
  * We are still executing code at the virtual address
@@ -391,12 +402,14 @@ interrupt_base:
         rlwimi  r13,r12,10,30,30
 
         /* Load the PTE */
-        rlwinm  r12, r10, 13, 19, 29    /* Compute pgdir/pmd offset */
+        /* Compute pgdir/pmd offset */
+        rlwinm  r12, r10, PPC44x_PGD_OFF_SHIFT, PPC44x_PGD_OFF_MASK_BIT, 29
         lwzx    r11, r12, r11           /* Get pgd/pmd entry */
         rlwinm. r12, r11, 0, 0, 20      /* Extract pt base address */
         beq     2f                      /* Bail if no table */
 
-        rlwimi  r12, r10, 23, 20, 28    /* Compute pte address */
+        /* Compute pte address */
+        rlwimi  r12, r10, PPC44x_PTE_ADD_SHIFT, PPC44x_PTE_ADD_MASK_BIT, 28
         lwz     r11, 0(r12)             /* Get high word of pte entry */
         lwz     r12, 4(r12)             /* Get low word of pte entry */
 
@@ -485,12 +498,14 @@ tlb_44x_patch_hwater_D:
         /* Make up the required permissions */
         li      r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC
 
-        rlwinm  r12, r10, 13, 19, 29    /* Compute pgdir/pmd offset */
+        /* Compute pgdir/pmd offset */
+        rlwinm  r12, r10, PPC44x_PGD_OFF_SHIFT, PPC44x_PGD_OFF_MASK_BIT, 29
         lwzx    r11, r12, r11           /* Get pgd/pmd entry */
         rlwinm. r12, r11, 0, 0, 20      /* Extract pt base address */
         beq     2f                      /* Bail if no table */
 
-        rlwimi  r12, r10, 23, 20, 28    /* Compute pte address */
+        /* Compute pte address */
+        rlwimi  r12, r10, PPC44x_PTE_ADD_SHIFT, PPC44x_PTE_ADD_MASK_BIT, 28
         lwz     r11, 0(r12)             /* Get high word of pte entry */
         lwz     r12, 4(r12)             /* Get low word of pte entry */
 
@@ -554,15 +569,16 @@ tlb_44x_patch_hwater_I:
  */
 finish_tlb_load:
         /* Combine RPN & ERPN an write WS 0 */
-        rlwimi  r11,r12,0,0,19
+        rlwimi  r11,r12,0,0,31-PAGE_SHIFT
         tlbwe   r11,r13,PPC44x_TLB_XLAT
 
         /*
          * Create WS1. This is the faulting address (EPN),
          * page size, and valid flag.
          */
-        li      r11,PPC44x_TLB_VALID | PPC44x_TLB_4K
-        rlwimi  r10,r11,0,20,31                 /* Insert valid and page size*/
+        li      r11,PPC44x_TLB_VALID | PPC44x_TLBE_SIZE
+        /* Insert valid and page size */
+        rlwimi  r10,r11,0,PPC44x_PTE_ADD_MASK_BIT,31
         tlbwe   r10,r13,PPC44x_TLB_PAGEID       /* Write PAGEID */
 
         /* And WS 2 */
@@ -634,12 +650,12 @@ _GLOBAL(set_context)
  * goes at the beginning of the data segment, which is page-aligned.
  */
         .data
-        .align  12
+        .align  PAGE_SHIFT
         .globl  sdata
 sdata:
         .globl  empty_zero_page
 empty_zero_page:
-        .space  4096
+        .space  PAGE_SIZE
 
 /*
  * To support >32-bit physical addresses, we use an 8KB pgdir.
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 590304c24dad..11b549acc034 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -92,6 +92,7 @@ _ENTRY(_start);
  * if needed
  */
 
+_ENTRY(__early_start)
 /* 1. Find the index of the entry we're executing in */
         bl      invstr                          /* Find our address */
 invstr: mflr    r6                              /* Make it accessible */
@@ -235,36 +236,40 @@ skpinv:	addi	r6,r6,1				/* Increment */
         tlbivax 0,r9
         TLBSYNC
 
+/* The mapping only needs to be cache-coherent on SMP */
+#ifdef CONFIG_SMP
+#define M_IF_SMP        MAS2_M
+#else
+#define M_IF_SMP        0
+#endif
+
 /* 6. Setup KERNELBASE mapping in TLB1[0] */
         lis     r6,0x1000               /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
         mtspr   SPRN_MAS0,r6
         lis     r6,(MAS1_VALID|MAS1_IPROT)@h
         ori     r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l
         mtspr   SPRN_MAS1,r6
-        li      r7,0
-        lis     r6,PAGE_OFFSET@h
-        ori     r6,r6,PAGE_OFFSET@l
-        rlwimi  r6,r7,0,20,31
+        lis     r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@h
+        ori     r6,r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@l
         mtspr   SPRN_MAS2,r6
         mtspr   SPRN_MAS3,r8
         tlbwe
 
 /* 7. Jump to KERNELBASE mapping */
-        lis     r6,KERNELBASE@h
-        ori     r6,r6,KERNELBASE@l
-        rlwimi  r6,r7,0,20,31
+        lis     r6,(KERNELBASE & ~0xfff)@h
+        ori     r6,r6,(KERNELBASE & ~0xfff)@l
         lis     r7,MSR_KERNEL@h
         ori     r7,r7,MSR_KERNEL@l
         bl      1f                      /* Find our address */
 1:      mflr    r9
         rlwimi  r6,r9,0,20,31
-        addi    r6,r6,24
+        addi    r6,r6,(2f - 1b)
         mtspr   SPRN_SRR0,r6
         mtspr   SPRN_SRR1,r7
         rfi                             /* start execution out of TLB1[0] entry */
 
 /* 8. Clear out the temp mapping */
-        lis     r7,0x1000       /* Set MAS0(TLBSEL) = 1 */
+2:      lis     r7,0x1000       /* Set MAS0(TLBSEL) = 1 */
         rlwimi  r7,r5,16,4,15   /* Setup MAS0 = TLBSEL | ESEL(r5) */
         mtspr   SPRN_MAS0,r7
         tlbre
@@ -344,6 +349,15 @@ skpinv:	addi	r6,r6,1				/* Increment */
         mtspr   SPRN_DBSR,r2
 #endif
 
+#ifdef CONFIG_SMP
+        /* Check to see if we're the second processor, and jump
+         * to the secondary_start code if so
+         */
+        mfspr   r24,SPRN_PIR
+        cmpwi   r24,0
+        bne     __secondary_start
+#endif
+
         /*
          * This is where the main kernel code starts.
          */
@@ -685,12 +699,13 @@ interrupt_base:
         /* SPE Floating Point Data */
 #ifdef CONFIG_SPE
         EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
-#else
-        EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
-#endif /* CONFIG_SPE */
 
         /* SPE Floating Point Round */
+        EXCEPTION(0x2050, SPEFloatingPointRound, SPEFloatingPointRoundException, EXC_XFER_EE)
+#else
+        EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
         EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
+#endif /* CONFIG_SPE */
 
         /* Performance Monitor */
         EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
@@ -735,6 +750,9 @@ finish_tlb_load:
 #else
         rlwimi  r12, r11, 26, 27, 31    /* extract WIMGE from pte */
 #endif
+#ifdef CONFIG_SMP
+        ori     r12, r12, MAS2_M
+#endif
         mtspr   SPRN_MAS2, r12
 
         li      r10, (_PAGE_HWEXEC | _PAGE_PRESENT)
@@ -746,15 +764,15 @@ finish_tlb_load:
         iseleq  r12, r12, r10
         
 #ifdef CONFIG_PTE_64BIT
-2:      rlwimi  r12, r13, 24, 0, 7      /* grab RPN[32:39] */
+        rlwimi  r12, r13, 24, 0, 7      /* grab RPN[32:39] */
         rlwimi  r12, r11, 24, 8, 19     /* grab RPN[40:51] */
         mtspr   SPRN_MAS3, r12
-BEGIN_FTR_SECTION
+BEGIN_MMU_FTR_SECTION
         srwi    r10, r13, 8             /* grab RPN[8:31] */
         mtspr   SPRN_MAS7, r10
-END_FTR_SECTION_IFSET(CPU_FTR_BIG_PHYS)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
 #else
-2:      rlwimi  r11, r12, 0, 20, 31     /* Extract RPN from PTE and merge with perms */
+        rlwimi  r11, r12, 0, 20, 31     /* Extract RPN from PTE and merge with perms */
         mtspr   SPRN_MAS3, r11
 #endif
 #ifdef CONFIG_E200
@@ -1037,6 +1055,63 @@ _GLOBAL(flush_dcache_L1)
 
         blr
 
+#ifdef CONFIG_SMP
+/* When we get here, r24 needs to hold the CPU # */
+        .globl __secondary_start
+__secondary_start:
+        lis     r3,__secondary_hold_acknowledge@h
+        ori     r3,r3,__secondary_hold_acknowledge@l
+        stw     r24,0(r3)
+
+        li      r3,0
+        mr      r4,r24          /* Why? */
+        bl      call_setup_cpu
+
+        lis     r3,tlbcam_index@ha
+        lwz     r3,tlbcam_index@l(r3)
+        mtctr   r3
+        li      r26,0           /* r26 safe? */
+
+        /* Load each CAM entry */
+1:      mr      r3,r26
+        bl      loadcam_entry
+        addi    r26,r26,1
+        bdnz    1b
+
+        /* get current_thread_info and current */
+        lis     r1,secondary_ti@ha
+        lwz     r1,secondary_ti@l(r1)
+        lwz     r2,TI_TASK(r1)
+
+        /* stack */
+        addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
+        li      r0,0
+        stw     r0,0(r1)
+
+        /* ptr to current thread */
+        addi    r4,r2,THREAD    /* address of our thread_struct */
+        mtspr   SPRN_SPRG3,r4
+
+        /* Setup the defaults for TLB entries */
+        li      r4,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
+        mtspr   SPRN_MAS4,r4
+
+        /* Jump to start_secondary */
+        lis     r4,MSR_KERNEL@h
+        ori     r4,r4,MSR_KERNEL@l
+        lis     r3,start_secondary@h
+        ori     r3,r3,start_secondary@l
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
+        sync
+        rfi
+        sync
+
+        .globl __secondary_hold_acknowledge
+__secondary_hold_acknowledge:
+        .long   -1
+#endif
+
 /*
  * We put a few things here that have to be page-aligned. This stuff
  * goes at the beginning of the data segment, which is page-aligned.
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index 64299d28f364..6e3f62493659 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -47,7 +47,7 @@
 #include <asm/abs_addr.h>
 
 static struct device ibmebus_bus_device = { /* fake "parent" device */
-        .bus_id = "ibmebus",
+        .init_name = "ibmebus",
 };
 
 struct bus_type ibmebus_bus_type;
@@ -231,6 +231,7 @@ void ibmebus_free_irq(u32 ist, void *dev_id)
         unsigned int irq = irq_find_mapping(NULL, ist);
 
         free_irq(irq, dev_id);
+        irq_dispose_mapping(irq);
 }
 EXPORT_SYMBOL(ibmebus_free_irq);
 
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 31982d05d81a..88d9c1d5e5fb 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -69,10 +69,15 @@ void cpu_idle(void)
                                 smp_mb();
                                 local_irq_disable();
 
+                                /* Don't trace irqs off for idle */
+                                stop_critical_timings();
+
                                 /* check again after disabling irqs */
                                 if (!need_resched() && !cpu_should_die())
                                         ppc_md.power_save();
 
+                                start_critical_timings();
+
                                 local_irq_enable();
                                 set_thread_flag(TIF_POLLING_NRFLAG);
 
diff --git a/arch/powerpc/kernel/init_task.c b/arch/powerpc/kernel/init_task.c
index 4c85b8d56478..688b329800bd 100644
--- a/arch/powerpc/kernel/init_task.c
+++ b/arch/powerpc/kernel/init_task.c
@@ -7,7 +7,6 @@
 #include <linux/mqueue.h>
 #include <asm/uaccess.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index ac222d0ab12e..23b8b5e36f98 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -237,7 +237,7 @@ void fixup_irqs(cpumask_t map)
                         mask = map;
                 }
                 if (irq_desc[irq].chip->set_affinity)
-                        irq_desc[irq].chip->set_affinity(irq, mask);
+                        irq_desc[irq].chip->set_affinity(irq, &mask);
                 else if (irq_desc[irq].action && !(warned++))
                         printk("Cannot set affinity for irq %i\n", irq);
         }
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index de79915452c8..989edcdf0297 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -96,9 +96,10 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
 
 void __kprobes arch_remove_kprobe(struct kprobe *p)
 {
-        mutex_lock(&kprobe_mutex);
-        free_insn_slot(p->ainsn.insn, 0);
-        mutex_unlock(&kprobe_mutex);
+        if (p->ainsn.insn) {
+                free_insn_slot(p->ainsn.insn, 0);
+                p->ainsn.insn = NULL;
+        }
 }
 
 static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index ac2a21f45c75..b3abebb7ee64 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -13,13 +13,17 @@
 #include <linux/reboot.h>
 #include <linux/threads.h>
 #include <linux/lmb.h>
+#include <linux/of.h>
 #include <asm/machdep.h>
 #include <asm/prom.h>
+#include <asm/sections.h>
 
 void machine_crash_shutdown(struct pt_regs *regs)
 {
         if (ppc_md.machine_crash_shutdown)
                 ppc_md.machine_crash_shutdown(regs);
+        else
+                default_machine_crash_shutdown(regs);
 }
 
 /*
@@ -31,11 +35,8 @@ int machine_kexec_prepare(struct kimage *image)
 {
         if (ppc_md.machine_kexec_prepare)
                 return ppc_md.machine_kexec_prepare(image);
-        /*
-         * Fail if platform doesn't provide its own machine_kexec_prepare
-         * implementation.
-         */
-        return -ENOSYS;
+        else
+                return default_machine_kexec_prepare(image);
 }
 
 void machine_kexec_cleanup(struct kimage *image)
@@ -52,13 +53,11 @@ void machine_kexec(struct kimage *image)
 {
         if (ppc_md.machine_kexec)
                 ppc_md.machine_kexec(image);
-        else {
-                /*
-                 * Fall back to normal restart if platform doesn't provide
-                 * its own kexec function, and user insist to kexec...
-                 */
-                machine_restart(NULL);
-        }
+        else
+                default_machine_kexec(image);
+
+        /* Fall back to normal restart if we're still alive. */
+        machine_restart(NULL);
         for(;;);
 }
 
@@ -118,3 +117,71 @@ int overlaps_crashkernel(unsigned long start, unsigned long size)
 {
         return (start + size) > crashk_res.start && start <= crashk_res.end;
 }
+
+/* Values we need to export to the second kernel via the device tree. */
+static unsigned long kernel_end;
+static unsigned long crashk_size;
+
+static struct property kernel_end_prop = {
+        .name = "linux,kernel-end",
+        .length = sizeof(unsigned long),
+        .value = &kernel_end,
+};
+
+static struct property crashk_base_prop = {
+        .name = "linux,crashkernel-base",
+        .length = sizeof(unsigned long),
+        .value = &crashk_res.start,
+};
+
+static struct property crashk_size_prop = {
+        .name = "linux,crashkernel-size",
+        .length = sizeof(unsigned long),
+        .value = &crashk_size,
+};
+
+static void __init export_crashk_values(struct device_node *node)
+{
+        struct property *prop;
+
+        /* There might be existing crash kernel properties, but we can't
+         * be sure what's in them, so remove them. */
+        prop = of_find_property(node, "linux,crashkernel-base", NULL);
+        if (prop)
+                prom_remove_property(node, prop);
+
+        prop = of_find_property(node, "linux,crashkernel-size", NULL);
+        if (prop)
+                prom_remove_property(node, prop);
+
+        if (crashk_res.start != 0) {
+                prom_add_property(node, &crashk_base_prop);
+                crashk_size = crashk_res.end - crashk_res.start + 1;
+                prom_add_property(node, &crashk_size_prop);
+        }
+}
+
+static int __init kexec_setup(void)
+{
+        struct device_node *node;
+        struct property *prop;
+
+        node = of_find_node_by_path("/chosen");
+        if (!node)
+                return -ENOENT;
+
+        /* remove any stale properties so ours can be found */
+        prop = of_find_property(node, kernel_end_prop.name, NULL);
+        if (prop)
+                prom_remove_property(node, prop);
+
+        /* information needed by userspace when using default_machine_kexec */
+        kernel_end = __pa(_end);
+        prom_add_property(node, &kernel_end_prop);
+
+        export_crashk_values(node);
+
+        of_node_put(node);
+        return 0;
+}
+late_initcall(kexec_setup);
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 3c4ca046e854..49e705fcee6d 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -289,7 +289,7 @@ void default_machine_kexec(struct kimage *image)
 }
 
 /* Values we need to export to the second kernel via the device tree. */
-static unsigned long htab_base, kernel_end;
+static unsigned long htab_base;
 
 static struct property htab_base_prop = {
         .name = "linux,htab-base",
@@ -303,25 +303,20 @@ static struct property htab_size_prop = {
         .value = &htab_size_bytes,
 };
 
-static struct property kernel_end_prop = {
-        .name = "linux,kernel-end",
-        .length = sizeof(unsigned long),
-        .value = &kernel_end,
-};
-
-static void __init export_htab_values(void)
+static int __init export_htab_values(void)
 {
         struct device_node *node;
         struct property *prop;
 
+        /* On machines with no htab htab_address is NULL */
+        if (!htab_address)
+                return -ENODEV;
+
         node = of_find_node_by_path("/chosen");
         if (!node)
-                return;
+                return -ENODEV;
 
         /* remove any stale propertys so ours can be found */
-        prop = of_find_property(node, kernel_end_prop.name, NULL);
-        if (prop)
-                prom_remove_property(node, prop);
         prop = of_find_property(node, htab_base_prop.name, NULL);
         if (prop)
                 prom_remove_property(node, prop);
@@ -329,68 +324,11 @@ static void __init export_htab_values(void)
         if (prop)
                 prom_remove_property(node, prop);
 
-        /* information needed by userspace when using default_machine_kexec */
-        kernel_end = __pa(_end);
-        prom_add_property(node, &kernel_end_prop);
-
-        /* On machines with no htab htab_address is NULL */
-        if (NULL == htab_address)
-                goto out;
-
         htab_base = __pa(htab_address);
         prom_add_property(node, &htab_base_prop);
         prom_add_property(node, &htab_size_prop);
 
- out:
-        of_node_put(node);
-}
-
-static struct property crashk_base_prop = {
-        .name = "linux,crashkernel-base",
-        .length = sizeof(unsigned long),
-        .value = &crashk_res.start,
-};
-
-static unsigned long crashk_size;
-
-static struct property crashk_size_prop = {
-        .name = "linux,crashkernel-size",
-        .length = sizeof(unsigned long),
-        .value = &crashk_size,
-};
-
-static void __init export_crashk_values(void)
-{
-        struct device_node *node;
-        struct property *prop;
-
-        node = of_find_node_by_path("/chosen");
-        if (!node)
-                return;
-
-        /* There might be existing crash kernel properties, but we can't
-         * be sure what's in them, so remove them. */
-        prop = of_find_property(node, "linux,crashkernel-base", NULL);
-        if (prop)
-                prom_remove_property(node, prop);
-
-        prop = of_find_property(node, "linux,crashkernel-size", NULL);
-        if (prop)
-                prom_remove_property(node, prop);
-
-        if (crashk_res.start != 0) {
-                prom_add_property(node, &crashk_base_prop);
-                crashk_size = crashk_res.end - crashk_res.start + 1;
-                prom_add_property(node, &crashk_size_prop);
-        }
-
         of_node_put(node);
-}
-
-static int __init kexec_setup(void)
-{
-        export_htab_values();
-        export_crashk_values();
         return 0;
 }
-__initcall(kexec_setup);
+late_initcall(export_htab_values);
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 5c33bc14bd9f..15f28e0de78d 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -29,6 +29,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/processor.h>
 #include <asm/kexec.h>
+#include <asm/bug.h>
 
         .text
 
@@ -271,231 +272,6 @@ _GLOBAL(real_writeb)
 
 #endif /* CONFIG_40x */
 
-/*
- * Flush MMU TLB
- */
-#ifndef CONFIG_FSL_BOOKE
-_GLOBAL(_tlbil_all)
-_GLOBAL(_tlbil_pid)
-#endif
-_GLOBAL(_tlbia)
-#if defined(CONFIG_40x)
-        sync                    /* Flush to memory before changing mapping */
-        tlbia
-        isync                   /* Flush shadow TLB */
-#elif defined(CONFIG_44x)
-        li      r3,0
-        sync
-
-        /* Load high watermark */
-        lis     r4,tlb_44x_hwater@ha
-        lwz     r5,tlb_44x_hwater@l(r4)
-
-1:      tlbwe   r3,r3,PPC44x_TLB_PAGEID
-        addi    r3,r3,1
-        cmpw    0,r3,r5
-        ble     1b
-
-        isync
-#elif defined(CONFIG_FSL_BOOKE)
-        /* Invalidate all entries in TLB0 */
-        li      r3, 0x04
-        tlbivax 0,3
-        /* Invalidate all entries in TLB1 */
-        li      r3, 0x0c
-        tlbivax 0,3
-        msync
-#ifdef CONFIG_SMP
-        tlbsync
-#endif /* CONFIG_SMP */
-#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
-#if defined(CONFIG_SMP)
-        rlwinm  r8,r1,0,0,(31-THREAD_SHIFT)
-        lwz     r8,TI_CPU(r8)
-        oris    r8,r8,10
-        mfmsr   r10
-        SYNC
-        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
-        rlwinm  r0,r0,0,28,26           /* clear DR */
-        mtmsr   r0
-        SYNC_601
-        isync
-        lis     r9,mmu_hash_lock@h
-        ori     r9,r9,mmu_hash_lock@l
-        tophys(r9,r9)
-10:     lwarx   r7,0,r9
-        cmpwi   0,r7,0
-        bne-    10b
-        stwcx.  r8,0,r9
-        bne-    10b
-        sync
-        tlbia
-        sync
-        TLBSYNC
-        li      r0,0
-        stw     r0,0(r9)                /* clear mmu_hash_lock */
-        mtmsr   r10
-        SYNC_601
-        isync
-#else /* CONFIG_SMP */
-        sync
-        tlbia
-        sync
-#endif /* CONFIG_SMP */
-#endif /* ! defined(CONFIG_40x) */
-        blr
-
-/*
- * Flush MMU TLB for a particular address
- */
-#ifndef CONFIG_FSL_BOOKE
-_GLOBAL(_tlbil_va)
-#endif
-_GLOBAL(_tlbie)
-#if defined(CONFIG_40x)
-        /* We run the search with interrupts disabled because we have to change
-         * the PID and I don't want to preempt when that happens.
-         */
-        mfmsr   r5
-        mfspr   r6,SPRN_PID
-        wrteei  0
-        mtspr   SPRN_PID,r4
-        tlbsx.  r3, 0, r3
-        mtspr   SPRN_PID,r6
-        wrtee   r5
-        bne     10f
-        sync
-        /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear.
-         * Since 25 is the V bit in the TLB_TAG, loading this value will invalidate
-         * the TLB entry. */
-        tlbwe   r3, r3, TLB_TAG
-        isync
-10:
-
-#elif defined(CONFIG_44x)
-        mfspr   r5,SPRN_MMUCR
-        rlwimi  r5,r4,0,24,31                   /* Set TID */
-
-        /* We have to run the search with interrupts disabled, even critical
-         * and debug interrupts (in fact the only critical exceptions we have
-         * are debug and machine check).  Otherwise  an interrupt which causes
-         * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */
-        mfmsr   r4
-        lis     r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha
-        addi    r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
-        andc    r6,r4,r6
-        mtmsr   r6
-        mtspr   SPRN_MMUCR,r5
-        tlbsx.  r3, 0, r3
-        mtmsr   r4
-        bne     10f
-        sync
-        /* There are only 64 TLB entries, so r3 < 64,
-         * which means bit 22, is clear.  Since 22 is
-         * the V bit in the TLB_PAGEID, loading this
-         * value will invalidate the TLB entry.
-         */
-        tlbwe   r3, r3, PPC44x_TLB_PAGEID
-        isync
-10:
-#elif defined(CONFIG_FSL_BOOKE)
-        rlwinm  r4, r3, 0, 0, 19
-        ori     r5, r4, 0x08    /* TLBSEL = 1 */
-        tlbivax 0, r4
-        tlbivax 0, r5
-        msync
-#if defined(CONFIG_SMP)
-        tlbsync
-#endif /* CONFIG_SMP */
-#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
-#if defined(CONFIG_SMP)
-        rlwinm  r8,r1,0,0,(31-THREAD_SHIFT)
-        lwz     r8,TI_CPU(r8)
-        oris    r8,r8,11
-        mfmsr   r10
-        SYNC
-        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
-        rlwinm  r0,r0,0,28,26           /* clear DR */
-        mtmsr   r0
-        SYNC_601
-        isync
-        lis     r9,mmu_hash_lock@h
-        ori     r9,r9,mmu_hash_lock@l
-        tophys(r9,r9)
-10:     lwarx   r7,0,r9
-        cmpwi   0,r7,0
-        bne-    10b
-        stwcx.  r8,0,r9
-        bne-    10b
-        eieio
-        tlbie   r3
-        sync
-        TLBSYNC
-        li      r0,0
-        stw     r0,0(r9)                /* clear mmu_hash_lock */
-        mtmsr   r10
-        SYNC_601
-        isync
-#else /* CONFIG_SMP */
-        tlbie   r3
-        sync
-#endif /* CONFIG_SMP */
-#endif /* ! CONFIG_40x */
-        blr
-
-#if defined(CONFIG_FSL_BOOKE)
-/*
- * Flush MMU TLB, but only on the local processor (no broadcast)
- */
-_GLOBAL(_tlbil_all)
-#define MMUCSR0_TLBFI   (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
-                         MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
-        li      r3,(MMUCSR0_TLBFI)@l
-        mtspr   SPRN_MMUCSR0, r3
-1:
-        mfspr   r3,SPRN_MMUCSR0
-        andi.   r3,r3,MMUCSR0_TLBFI@l
-        bne     1b
-        blr
-
-/*
- * Flush MMU TLB for a particular process id, but only on the local processor
- * (no broadcast)
- */
-_GLOBAL(_tlbil_pid)
-/* we currently do an invalidate all since we don't have per pid invalidate */
-        li      r3,(MMUCSR0_TLBFI)@l
-        mtspr   SPRN_MMUCSR0, r3
-1:
-        mfspr   r3,SPRN_MMUCSR0
-        andi.   r3,r3,MMUCSR0_TLBFI@l
-        bne     1b
-        msync
-        isync
-        blr
-
-/*
- * Flush MMU TLB for a particular address, but only on the local processor
- * (no broadcast)
- */
-_GLOBAL(_tlbil_va)
-        mfmsr   r10
-        wrteei  0
-        slwi    r4,r4,16
-        mtspr   SPRN_MAS6,r4            /* assume AS=0 for now */
-        tlbsx   0,r3
-        mfspr   r4,SPRN_MAS1            /* check valid */
-        andis.  r3,r4,MAS1_VALID@h
-        beq     1f
-        rlwinm  r4,r4,0,1,31
-        mtspr   SPRN_MAS1,r4
-        tlbwe
-        msync
-        isync
-1:      wrtee   r10
-        blr
-#endif /* CONFIG_FSL_BOOKE */
-
 
 /*
  * Flush instruction cache.
@@ -650,8 +426,8 @@ _GLOBAL(__flush_dcache_icache)
 BEGIN_FTR_SECTION
         blr
 END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
-        rlwinm  r3,r3,0,0,19                    /* Get page base address */
-        li      r4,4096/L1_CACHE_BYTES  /* Number of lines in a page */
+        rlwinm  r3,r3,0,0,31-PAGE_SHIFT         /* Get page base address */
+        li      r4,PAGE_SIZE/L1_CACHE_BYTES     /* Number of lines in a page */
         mtctr   r4
         mr      r6,r3
 0:      dcbst   0,r3                            /* Write line to ram */
@@ -691,8 +467,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
         rlwinm  r0,r10,0,28,26                  /* clear DR */
         mtmsr   r0
         isync
-        rlwinm  r3,r3,0,0,19                    /* Get page base address */
-        li      r4,4096/L1_CACHE_BYTES  /* Number of lines in a page */
+        rlwinm  r3,r3,0,0,31-PAGE_SHIFT         /* Get page base address */
+        li      r4,PAGE_SIZE/L1_CACHE_BYTES     /* Number of lines in a page */
         mtctr   r4
         mr      r6,r3
 0:      dcbst   0,r3                            /* Write line to ram */
@@ -716,7 +492,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
  * void clear_pages(void *page, int order) ;
  */
 _GLOBAL(clear_pages)
-        li      r0,4096/L1_CACHE_BYTES
+        li      r0,PAGE_SIZE/L1_CACHE_BYTES
         slw     r0,r0,r4
         mtctr   r0
 #ifdef CONFIG_8xx
@@ -774,7 +550,7 @@ _GLOBAL(copy_page)
         dcbt    r5,r4
         li      r11,L1_CACHE_BYTES+4
 #endif /* MAX_COPY_PREFETCH */
-        li      r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH
+        li      r0,PAGE_SIZE/L1_CACHE_BYTES - MAX_COPY_PREFETCH
         crclr   4*cr0+eq
 2:
         mtctr   r0
diff --git a/arch/powerpc/kernel/module.c b/arch/powerpc/kernel/module.c
index 7ff292475269..43e7e3a7f130 100644
--- a/arch/powerpc/kernel/module.c
+++ b/arch/powerpc/kernel/module.c
@@ -78,6 +78,12 @@ int module_finalize(const Elf_Ehdr *hdr,
                                   (void *)sect->sh_addr,
                                   (void *)sect->sh_addr + sect->sh_size);
 
+        sect = find_section(hdr, sechdrs, "__mmu_ftr_fixup");
+        if (sect != NULL)
+                do_feature_fixups(cur_cpu_spec->mmu_features,
+                                  (void *)sect->sh_addr,
+                                  (void *)sect->sh_addr + sect->sh_size);
+
 #ifdef CONFIG_PPC64
         sect = find_section(hdr, sechdrs, "__fw_ftr_fixup");
         if (sect != NULL)
diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c
index 2df91a03462a..f832773fc28e 100644
--- a/arch/powerpc/kernel/module_32.c
+++ b/arch/powerpc/kernel/module_32.c
@@ -22,6 +22,7 @@
 #include <linux/fs.h>
 #include <linux/string.h>
 #include <linux/kernel.h>
+#include <linux/ftrace.h>
 #include <linux/cache.h>
 #include <linux/bug.h>
 #include <linux/sort.h>
@@ -53,6 +54,9 @@ static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num)
                         r_addend = rela[i].r_addend;
                 }
 
+#ifdef CONFIG_DYNAMIC_FTRACE
+        _count_relocs++;        /* add one for ftrace_caller */
+#endif
         return _count_relocs;
 }
 
@@ -306,5 +310,11 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
                         return -ENOEXEC;
                 }
         }
+#ifdef CONFIG_DYNAMIC_FTRACE
+        module->arch.tramp =
+                do_plt_call(module->module_core,
+                            (unsigned long)ftrace_caller,
+                            sechdrs, module);
+#endif
         return 0;
 }
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 1af2377e4992..8992b031a7b6 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -20,6 +20,7 @@
 #include <linux/moduleloader.h>
 #include <linux/err.h>
 #include <linux/vmalloc.h>
+#include <linux/ftrace.h>
 #include <linux/bug.h>
 #include <asm/module.h>
 #include <asm/firmware.h>
@@ -163,6 +164,11 @@ static unsigned long get_stubs_size(const Elf64_Ehdr *hdr,
                 }
         }
 
+#ifdef CONFIG_DYNAMIC_FTRACE
+        /* make the trampoline to the ftrace_caller */
+        relocs++;
+#endif
+
         DEBUGP("Looks like a total of %lu stubs, max\n", relocs);
         return relocs * sizeof(struct ppc64_stub_entry);
 }
@@ -441,5 +447,12 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
                 }
         }
 
+#ifdef CONFIG_DYNAMIC_FTRACE
+        me->arch.toc = my_r2(sechdrs, me);
+        me->arch.tramp = stub_for_addr(sechdrs,
+                                       (unsigned long)ftrace_caller,
+                                       me);
+#endif
+
         return 0;
 }
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c
index f3c9cae01dd5..fa983a59c4ce 100644
--- a/arch/powerpc/kernel/of_device.c
+++ b/arch/powerpc/kernel/of_device.c
@@ -14,7 +14,6 @@ static void of_device_make_bus_id(struct of_device *dev)
 {
         static atomic_t bus_no_reg_magic;
         struct device_node *node = dev->node;
-        char *name = dev->dev.bus_id;
         const u32 *reg;
         u64 addr;
         int magic;
@@ -27,14 +26,12 @@ static void of_device_make_bus_id(struct of_device *dev)
         reg = of_get_property(node, "dcr-reg", NULL);
         if (reg) {
 #ifdef CONFIG_PPC_DCR_NATIVE
-                snprintf(name, BUS_ID_SIZE, "d%x.%s",
-                         *reg, node->name);
+                dev_set_name(&dev->dev, "d%x.%s", *reg, node->name);
 #else /* CONFIG_PPC_DCR_NATIVE */
                 addr = of_translate_dcr_address(node, *reg, NULL);
                 if (addr != OF_BAD_ADDR) {
-                        snprintf(name, BUS_ID_SIZE,
-                                 "D%llx.%s", (unsigned long long)addr,
-                                 node->name);
+                        dev_set_name(&dev->dev, "D%llx.%s",
+                                     (unsigned long long)addr, node->name);
                         return;
                 }
 #endif /* !CONFIG_PPC_DCR_NATIVE */
@@ -48,9 +45,8 @@ static void of_device_make_bus_id(struct of_device *dev)
         if (reg) {
                 addr = of_translate_address(node, reg);
                 if (addr != OF_BAD_ADDR) {
-                        snprintf(name, BUS_ID_SIZE,
-                                 "%llx.%s", (unsigned long long)addr,
-                                 node->name);
+                        dev_set_name(&dev->dev, "%llx.%s",
+                                     (unsigned long long)addr, node->name);
                         return;
                 }
         }
@@ -60,7 +56,7 @@ static void of_device_make_bus_id(struct of_device *dev)
          * counter (and pray...)
          */
         magic = atomic_add_return(1, &bus_no_reg_magic);
-        snprintf(name, BUS_ID_SIZE, "%s.%d", node->name, magic - 1);
+        dev_set_name(&dev->dev, "%s.%d", node->name, magic - 1);
 }
 
 struct of_device *of_device_alloc(struct device_node *np,
@@ -80,7 +76,7 @@ struct of_device *of_device_alloc(struct device_node *np,
         dev->dev.archdata.of_node = np;
 
         if (bus_id)
-                strlcpy(dev->dev.bus_id, bus_id, BUS_ID_SIZE);
+                dev_set_name(&dev->dev, bus_id);
         else
                 of_device_make_bus_id(dev);
 
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index 48a347133f41..c744b327bcab 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -37,6 +37,7 @@ struct lppaca lppaca[] = {
                 .end_of_quantum = 0xfffffffffffffffful,
                 .slb_count = 64,
                 .vmxregs_in_use = 0,
+                .page_ins = 0,
         },
 };
 
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index f36936d9fda3..2538030954d8 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -37,13 +37,7 @@
 #include <asm/machdep.h>
 #include <asm/ppc-pci.h>
 #include <asm/firmware.h>
-
-#ifdef DEBUG
-#include <asm/udbg.h>
-#define DBG(fmt...) printk(fmt)
-#else
-#define DBG(fmt...)
-#endif
+#include <asm/eeh.h>
 
 static DEFINE_SPINLOCK(hose_spinlock);
 
@@ -53,8 +47,9 @@ static int global_phb_number;		/* Global phb counter */
 /* ISA Memory physical address */
 resource_size_t isa_mem_base;
 
-/* Default PCI flags is 0 */
-unsigned int ppc_pci_flags;
+/* Default PCI flags is 0 on ppc32, modified at boot on ppc64 */
+unsigned int ppc_pci_flags = 0;
+
 
 static struct dma_mapping_ops *pci_dma_ops;
 
@@ -165,8 +160,6 @@ EXPORT_SYMBOL(pci_domain_nr);
  */
 struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
 {
-        if (!have_of)
-                return NULL;
         while(node) {
                 struct pci_controller *hose, *tmp;
                 list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
@@ -208,26 +201,6 @@ char __devinit *pcibios_setup(char *str)
         return str;
 }
 
-void __devinit pcibios_setup_new_device(struct pci_dev *dev)
-{
-        struct dev_archdata *sd = &dev->dev.archdata;
-
-        sd->of_node = pci_device_to_OF_node(dev);
-
-        DBG("PCI: device %s OF node: %s\n", pci_name(dev),
-            sd->of_node ? sd->of_node->full_name : "<none>");
-
-        sd->dma_ops = pci_dma_ops;
-#ifdef CONFIG_PPC32
-        sd->dma_data = (void *)PCI_DRAM_OFFSET;
-#endif
-        set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
-
-        if (ppc_md.pci_dma_dev_setup)
-                ppc_md.pci_dma_dev_setup(dev);
-}
-EXPORT_SYMBOL(pcibios_setup_new_device);
-
 /*
  * Reads the interrupt pin to determine if interrupt is use by card.
  * If the interrupt is used, then gets the interrupt line from the
@@ -252,7 +225,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
                 return -1;
 #endif
 
-        DBG("Try to map irq for %s...\n", pci_name(pci_dev));
+        pr_debug("PCI: Try to map irq for %s...\n", pci_name(pci_dev));
 
 #ifdef DEBUG
         memset(&oirq, 0xff, sizeof(oirq));
@@ -276,26 +249,26 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
                     line == 0xff || line == 0) {
                         return -1;
                 }
-                DBG(" -> no map ! Using line %d (pin %d) from PCI config\n",
-                    line, pin);
+                pr_debug(" No map ! Using line %d (pin %d) from PCI config\n",
+                         line, pin);
 
                 virq = irq_create_mapping(NULL, line);
                 if (virq != NO_IRQ)
                         set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
         } else {
-                DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
-                    oirq.size, oirq.specifier[0], oirq.specifier[1],
+                pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
+                         oirq.size, oirq.specifier[0], oirq.specifier[1],
                     oirq.controller->full_name);
 
                 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
                                              oirq.size);
         }
         if(virq == NO_IRQ) {
-                DBG(" -> failed to map !\n");
+                pr_debug(" Failed to map !\n");
                 return -1;
         }
 
-        DBG(" -> mapped to linux irq %d\n", virq);
+        pr_debug(" Mapped to linux irq %d\n", virq);
 
         pci_dev->irq = virq;
 
@@ -397,13 +370,10 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
         }
 
         /* XXX would be nice to have a way to ask for write-through */
-        prot |= _PAGE_NO_CACHE;
         if (write_combine)
-                prot &= ~_PAGE_GUARDED;
+                return pgprot_noncached_wc(prot);
         else
-                prot |= _PAGE_GUARDED;
-
-        return __pgprot(prot);
+                return pgprot_noncached(prot);
 }
 
 /*
@@ -414,19 +384,17 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
 pgprot_t pci_phys_mem_access_prot(struct file *file,
                                   unsigned long pfn,
                                   unsigned long size,
-                                  pgprot_t protection)
+                                  pgprot_t prot)
 {
         struct pci_dev *pdev = NULL;
         struct resource *found = NULL;
-        unsigned long prot = pgprot_val(protection);
         resource_size_t offset = ((resource_size_t)pfn) << PAGE_SHIFT;
         int i;
 
         if (page_is_ram(pfn))
-                return __pgprot(prot);
-
-        prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
+                return prot;
 
+        prot = pgprot_noncached(prot);
         for_each_pci_dev(pdev) {
                 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
                         struct resource *rp = &pdev->resource[i];
@@ -447,14 +415,14 @@ pgprot_t pci_phys_mem_access_prot(struct file *file,
         }
         if (found) {
                 if (found->flags & IORESOURCE_PREFETCH)
-                        prot &= ~_PAGE_GUARDED;
+                        prot = pgprot_noncached_wc(prot);
                 pci_dev_put(pdev);
         }
 
-        DBG("non-PCI map for %llx, prot: %lx\n",
-            (unsigned long long)offset, prot);
+        pr_debug("PCI: Non-PCI map for %llx, prot: %lx\n",
+                 (unsigned long long)offset, pgprot_val(prot));
 
-        return __pgprot(prot);
+        return prot;
 }
 
 
@@ -610,8 +578,7 @@ int pci_mmap_legacy_page_range(struct pci_bus *bus,
         pr_debug(" -> mapping phys %llx\n", (unsigned long long)offset);
 
         vma->vm_pgoff = offset >> PAGE_SHIFT;
-        vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                     | _PAGE_NO_CACHE | _PAGE_GUARDED);
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
         return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
                                vma->vm_end - vma->vm_start,
                                vma->vm_page_prot);
@@ -853,15 +820,12 @@ void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
 int pci_proc_domain(struct pci_bus *bus)
 {
         struct pci_controller *hose = pci_bus_to_host(bus);
-#ifdef CONFIG_PPC64
-        return hose->buid != 0;
-#else
+
         if (!(ppc_pci_flags & PPC_PCI_ENABLE_PROC_DOMAINS))
                 return 0;
         if (ppc_pci_flags & PPC_PCI_COMPAT_DOMAIN_0)
                 return hose->global_number != 0;
         return 1;
-#endif
 }
 
 void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
@@ -1083,27 +1047,50 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
         }
 }
 
-static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
+void __devinit pcibios_setup_bus_self(struct pci_bus *bus)
 {
-        struct pci_dev *dev = bus->self;
-
-        pr_debug("PCI: Fixup bus %d (%s)\n", bus->number, dev ? pci_name(dev) : "PHB");
-
-        /* Fixup PCI<->PCI bridges. Host bridges are handled separately, for
-         * now differently between 32 and 64 bits.
-         */
-        if (dev != NULL)
+        /* Fix up the bus resources for P2P bridges */
+        if (bus->self != NULL)
                 pcibios_fixup_bridge(bus);
 
-        /* Additional setup that is different between 32 and 64 bits for now */
-        pcibios_do_bus_setup(bus);
-
-        /* Platform specific bus fixups */
+        /* Platform specific bus fixups. This is currently only used
+         * by fsl_pci and I'm hoping to get rid of it at some point
+         */
         if (ppc_md.pcibios_fixup_bus)
                 ppc_md.pcibios_fixup_bus(bus);
 
-        /* Read default IRQs and fixup if necessary */
+        /* Setup bus DMA mappings */
+        if (ppc_md.pci_dma_bus_setup)
+                ppc_md.pci_dma_bus_setup(bus);
+}
+
+void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
+{
+        struct pci_dev *dev;
+
+        pr_debug("PCI: Fixup bus devices %d (%s)\n",
+                 bus->number, bus->self ? pci_name(bus->self) : "PHB");
+
         list_for_each_entry(dev, &bus->devices, bus_list) {
+                struct dev_archdata *sd = &dev->dev.archdata;
+
+                /* Setup OF node pointer in archdata */
+                sd->of_node = pci_device_to_OF_node(dev);
+
+                /* Fixup NUMA node as it may not be setup yet by the generic
+                 * code and is needed by the DMA init
+                 */
+                set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
+
+                /* Hook up default DMA ops */
+                sd->dma_ops = pci_dma_ops;
+                sd->dma_data = (void *)PCI_DRAM_OFFSET;
+
+                /* Additional platform DMA/iommu setup */
+                if (ppc_md.pci_dma_dev_setup)
+                        ppc_md.pci_dma_dev_setup(dev);
+
+                /* Read default IRQs and fixup if necessary */
                 pci_read_irq_line(dev);
                 if (ppc_md.pci_irq_fixup)
                         ppc_md.pci_irq_fixup(dev);
@@ -1113,22 +1100,19 @@ static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
         /* When called from the generic PCI probe, read PCI<->PCI bridge
-         * bases before proceeding
+         * bases. This is -not- called when generating the PCI tree from
+         * the OF device-tree.
          */
         if (bus->self != NULL)
                 pci_read_bridge_bases(bus);
-        __pcibios_fixup_bus(bus);
-}
-EXPORT_SYMBOL(pcibios_fixup_bus);
 
-/* When building a bus from the OF tree rather than probing, we need a
- * slightly different version of the fixup which doesn't read the
- * bridge bases using config space accesses
- */
-void __devinit pcibios_fixup_of_probed_bus(struct pci_bus *bus)
-{
-        __pcibios_fixup_bus(bus);
+        /* Now fixup the bus bus */
+        pcibios_setup_bus_self(bus);
+
+        /* Now fixup devices on that bus */
+        pcibios_setup_bus_devices(bus);
 }
+EXPORT_SYMBOL(pcibios_fixup_bus);
 
 static int skip_isa_ioresource_align(struct pci_dev *dev)
 {
@@ -1198,10 +1182,10 @@ static int __init reparent_resources(struct resource *parent,
         *pp = NULL;
         for (p = res->child; p != NULL; p = p->sibling) {
                 p->parent = res;
-                DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n",
-                    p->name,
-                    (unsigned long long)p->start,
-                    (unsigned long long)p->end, res->name);
+                pr_debug("PCI: Reparented %s [%llx..%llx] under %s\n",
+                         p->name,
+                         (unsigned long long)p->start,
+                         (unsigned long long)p->end, res->name);
         }
         return 0;
 }
@@ -1245,9 +1229,12 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
         int i;
         struct resource *res, *pr;
 
+        pr_debug("PCI: Allocating bus resources for %04x:%02x...\n",
+                 pci_domain_nr(bus), bus->number);
+
         for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
                 if ((res = bus->resource[i]) == NULL || !res->flags
-                    || res->start > res->end)
+                    || res->start > res->end || res->parent)
                         continue;
                 if (bus->parent == NULL)
                         pr = (res->flags & IORESOURCE_IO) ?
@@ -1271,14 +1258,14 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
                         }
                 }
 
-                DBG("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx "
-                    "[0x%x], parent %p (%s)\n",
-                    bus->self ? pci_name(bus->self) : "PHB",
-                    bus->number, i,
-                    (unsigned long long)res->start,
-                    (unsigned long long)res->end,
-                    (unsigned int)res->flags,
-                    pr, (pr && pr->name) ? pr->name : "nil");
+                pr_debug("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx "
+                         "[0x%x], parent %p (%s)\n",
+                         bus->self ? pci_name(bus->self) : "PHB",
+                         bus->number, i,
+                         (unsigned long long)res->start,
+                         (unsigned long long)res->end,
+                         (unsigned int)res->flags,
+                         pr, (pr && pr->name) ? pr->name : "nil");
 
                 if (pr && !(pr->flags & IORESOURCE_UNSET)) {
                         if (request_resource(pr, res) == 0)
@@ -1305,11 +1292,11 @@ static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
 {
         struct resource *pr, *r = &dev->resource[idx];
 
-        DBG("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n",
-            pci_name(dev), idx,
-            (unsigned long long)r->start,
-            (unsigned long long)r->end,
-            (unsigned int)r->flags);
+        pr_debug("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n",
+                 pci_name(dev), idx,
+                 (unsigned long long)r->start,
+                 (unsigned long long)r->end,
+                 (unsigned int)r->flags);
 
         pr = pci_find_parent_resource(dev, r);
         if (!pr || (pr->flags & IORESOURCE_UNSET) ||
@@ -1317,10 +1304,11 @@ static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
                 printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
                        " of device %s, will remap\n", idx, pci_name(dev));
                 if (pr)
-                        DBG("PCI:  parent is %p: %016llx-%016llx [%x]\n", pr,
-                            (unsigned long long)pr->start,
-                            (unsigned long long)pr->end,
-                            (unsigned int)pr->flags);
+                        pr_debug("PCI:  parent is %p: %016llx-%016llx [%x]\n",
+                                 pr,
+                                 (unsigned long long)pr->start,
+                                 (unsigned long long)pr->end,
+                                 (unsigned int)pr->flags);
                 /* We'll assign a new address later */
                 r->flags |= IORESOURCE_UNSET;
                 r->end -= r->start;
@@ -1358,7 +1346,8 @@ static void __init pcibios_allocate_resources(int pass)
                          * but keep it unregistered.
                          */
                         u32 reg;
-                        DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
+                        pr_debug("PCI: Switching off ROM of %s\n",
+                                 pci_name(dev));
                         r->flags &= ~IORESOURCE_ROM_ENABLE;
                         pci_read_config_dword(dev, dev->rom_base_reg, &reg);
                         pci_write_config_dword(dev, dev->rom_base_reg,
@@ -1383,7 +1372,7 @@ void __init pcibios_resource_survey(void)
         }
 
         if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
-                DBG("PCI: Assigning unassigned resouces...\n");
+                pr_debug("PCI: Assigning unassigned resouces...\n");
                 pci_assign_unassigned_resources();
         }
 
@@ -1393,9 +1382,11 @@ void __init pcibios_resource_survey(void)
 }
 
 #ifdef CONFIG_HOTPLUG
-/* This is used by the pSeries hotplug driver to allocate resource
+
+/* This is used by the PCI hotplug driver to allocate resource
  * of newly plugged busses. We can try to consolidate with the
- * rest of the code later, for now, keep it as-is
+ * rest of the code later, for now, keep it as-is as our main
+ * resource allocation function doesn't deal with sub-trees yet.
  */
 void __devinit pcibios_claim_one_bus(struct pci_bus *bus)
 {
@@ -1410,6 +1401,14 @@ void __devinit pcibios_claim_one_bus(struct pci_bus *bus)
 
                         if (r->parent || !r->start || !r->flags)
                                 continue;
+
+                        pr_debug("PCI: Claiming %s: "
+                                 "Resource %d: %016llx..%016llx [%x]\n",
+                                 pci_name(dev), i,
+                                 (unsigned long long)r->start,
+                                 (unsigned long long)r->end,
+                                 (unsigned int)r->flags);
+
                         pci_claim_resource(dev, i);
                 }
         }
@@ -1418,6 +1417,31 @@ void __devinit pcibios_claim_one_bus(struct pci_bus *bus)
                 pcibios_claim_one_bus(child_bus);
 }
 EXPORT_SYMBOL_GPL(pcibios_claim_one_bus);
+
+
+/* pcibios_finish_adding_to_bus
+ *
+ * This is to be called by the hotplug code after devices have been
+ * added to a bus, this include calling it for a PHB that is just
+ * being added
+ */
+void pcibios_finish_adding_to_bus(struct pci_bus *bus)
+{
+        pr_debug("PCI: Finishing adding to hotplug bus %04x:%02x\n",
+                 pci_domain_nr(bus), bus->number);
+
+        /* Allocate bus and devices resources */
+        pcibios_allocate_bus_resources(bus);
+        pcibios_claim_one_bus(bus);
+
+        /* Add new devices to global lists.  Register in proc, sysfs. */
+        pci_bus_add_devices(bus);
+
+        /* Fixup EEH */
+        eeh_add_device_tree_late(bus);
+}
+EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus);
+
 #endif /* CONFIG_HOTPLUG */
 
 int pcibios_enable_device(struct pci_dev *dev, int mask)
@@ -1428,3 +1452,61 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
 
         return pci_enable_resources(dev, mask);
 }
+
+void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
+{
+        struct pci_bus *bus = hose->bus;
+        struct resource *res;
+        int i;
+
+        /* Hookup PHB IO resource */
+        bus->resource[0] = res = &hose->io_resource;
+
+        if (!res->flags) {
+                printk(KERN_WARNING "PCI: I/O resource not set for host"
+                       " bridge %s (domain %d)\n",
+                       hose->dn->full_name, hose->global_number);
+#ifdef CONFIG_PPC32
+                /* Workaround for lack of IO resource only on 32-bit */
+                res->start = (unsigned long)hose->io_base_virt - isa_io_base;
+                res->end = res->start + IO_SPACE_LIMIT;
+                res->flags = IORESOURCE_IO;
+#endif /* CONFIG_PPC32 */
+        }
+
+        pr_debug("PCI: PHB IO resource    = %016llx-%016llx [%lx]\n",
+                 (unsigned long long)res->start,
+                 (unsigned long long)res->end,
+                 (unsigned long)res->flags);
+
+        /* Hookup PHB Memory resources */
+        for (i = 0; i < 3; ++i) {
+                res = &hose->mem_resources[i];
+                if (!res->flags) {
+                        if (i > 0)
+                                continue;
+                        printk(KERN_ERR "PCI: Memory resource 0 not set for "
+                               "host bridge %s (domain %d)\n",
+                               hose->dn->full_name, hose->global_number);
+#ifdef CONFIG_PPC32
+                        /* Workaround for lack of MEM resource only on 32-bit */
+                        res->start = hose->pci_mem_offset;
+                        res->end = (resource_size_t)-1LL;
+                        res->flags = IORESOURCE_MEM;
+#endif /* CONFIG_PPC32 */
+                }
+                bus->resource[i+1] = res;
+
+                pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", i,
+                         (unsigned long long)res->start,
+                         (unsigned long long)res->end,
+                         (unsigned long)res->flags);
+        }
+
+        pr_debug("PCI: PHB MEM offset     = %016llx\n",
+                 (unsigned long long)hose->pci_mem_offset);
+        pr_debug("PCI: PHB IO  offset     = %08lx\n",
+                 (unsigned long)hose->io_base_virt - _IO_BASE);
+
+}
+
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 131b1dfa68c6..132cd80afa21 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -26,12 +26,6 @@
 
 #undef DEBUG
 
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
 unsigned long isa_io_base     = 0;
 unsigned long pci_dram_offset = 0;
 int pcibios_assign_bus_offset = 1;
@@ -272,17 +266,14 @@ pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
 {
         struct device_node *parent, *np;
 
-        if (!have_of)
-                return NULL;
-
-        DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
+        pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
         parent = scan_OF_for_pci_bus(bus);
         if (parent == NULL)
                 return NULL;
-        DBG(" parent is %s\n", parent ? parent->full_name : "<NULL>");
+        pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>");
         np = scan_OF_for_pci_dev(parent, devfn);
         of_node_put(parent);
-        DBG(" result is %s\n", np ? np->full_name : "<NULL>");
+        pr_debug(" result is %s\n", np ? np->full_name : "<NULL>");
 
         /* XXX most callers don't release the returned node
          * mostly because ppc64 doesn't increase the refcount,
@@ -315,8 +306,6 @@ pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
         struct pci_controller* hose;
         struct pci_dev* dev = NULL;
         
-        if (!have_of)
-                return -ENODEV;
         /* Make sure it's really a PCI device */
         hose = pci_find_hose_for_OF_device(node);
         if (!hose || !hose->dn)
@@ -379,10 +368,41 @@ void pcibios_make_OF_bus_map(void)
 }
 #endif /* CONFIG_PPC_OF */
 
+static void __devinit pcibios_scan_phb(struct pci_controller *hose)
+{
+        struct pci_bus *bus;
+        struct device_node *node = hose->dn;
+        unsigned long io_offset;
+        struct resource *res = &hose->io_resource;
+
+        pr_debug("PCI: Scanning PHB %s\n",
+                 node ? node->full_name : "<NO NAME>");
+
+        /* Create an empty bus for the toplevel */
+        bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
+        if (bus == NULL) {
+                printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
+                       hose->global_number);
+                return;
+        }
+        bus->secondary = hose->first_busno;
+        hose->bus = bus;
+
+        /* Fixup IO space offset */
+        io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
+        res->start = (res->start + io_offset) & 0xffffffffu;
+        res->end = (res->end + io_offset) & 0xffffffffu;
+
+        /* Wire up PHB bus resources */
+        pcibios_setup_phb_resources(hose);
+
+        /* Scan children */
+        hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
+}
+
 static int __init pcibios_init(void)
 {
         struct pci_controller *hose, *tmp;
-        struct pci_bus *bus;
         int next_busno = 0;
 
         printk(KERN_INFO "PCI: Probing PCI hardware\n");
@@ -395,12 +415,8 @@ static int __init pcibios_init(void)
                 if (pci_assign_all_buses)
                         hose->first_busno = next_busno;
                 hose->last_busno = 0xff;
-                bus = pci_scan_bus_parented(hose->parent, hose->first_busno,
-                                            hose->ops, hose);
-                if (bus) {
-                        pci_bus_add_devices(bus);
-                        hose->last_busno = bus->subordinate;
-                }
+                pcibios_scan_phb(hose);
+                pci_bus_add_devices(hose->bus);
                 if (pci_assign_all_buses || next_busno <= hose->last_busno)
                         next_busno = hose->last_busno + pcibios_assign_bus_offset;
         }
@@ -410,7 +426,7 @@ static int __init pcibios_init(void)
          * numbers vs. kernel bus numbers since we may have to
          * remap them.
          */
-        if (pci_assign_all_buses && have_of)
+        if (pci_assign_all_buses)
                 pcibios_make_OF_bus_map();
 
         /* Call common code to handle resource allocation */
@@ -425,54 +441,6 @@ static int __init pcibios_init(void)
 
 subsys_initcall(pcibios_init);
 
-void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
-{
-        struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
-        unsigned long io_offset;
-        struct resource *res;
-        int i;
-        struct pci_dev *dev;
-
-        /* Hookup PHB resources */
-        io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
-        if (bus->parent == NULL) {
-                /* This is a host bridge - fill in its resources */
-                hose->bus = bus;
-
-                bus->resource[0] = res = &hose->io_resource;
-                if (!res->flags) {
-                        if (io_offset)
-                                printk(KERN_ERR "I/O resource not set for host"
-                                       " bridge %d\n", hose->global_number);
-                        res->start = 0;
-                        res->end = IO_SPACE_LIMIT;
-                        res->flags = IORESOURCE_IO;
-                }
-                res->start = (res->start + io_offset) & 0xffffffffu;
-                res->end = (res->end + io_offset) & 0xffffffffu;
-
-                for (i = 0; i < 3; ++i) {
-                        res = &hose->mem_resources[i];
-                        if (!res->flags) {
-                                if (i > 0)
-                                        continue;
-                                printk(KERN_ERR "Memory resource not set for "
-                                       "host bridge %d\n", hose->global_number);
-                                res->start = hose->pci_mem_offset;
-                                res->end = ~0U;
-                                res->flags = IORESOURCE_MEM;
-                        }
-                        bus->resource[i+1] = res;
-                }
-        }
-
-        if (ppc_md.pci_dma_bus_setup)
-                ppc_md.pci_dma_bus_setup(bus);
-
-        list_for_each_entry(dev, &bus->devices, bus_list)
-                pcibios_setup_new_device(dev);
-}
-
 /* the next one is stolen from the alpha port... */
 void __init
 pcibios_update_irq(struct pci_dev *dev, int irq)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 3502b9101e6b..39fadc6e1492 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -32,13 +32,6 @@
 #include <asm/machdep.h>
 #include <asm/ppc-pci.h>
 
-#ifdef DEBUG
-#include <asm/udbg.h>
-#define DBG(fmt...) printk(fmt)
-#else
-#define DBG(fmt...)
-#endif
-
 unsigned long pci_probe_only = 1;
 
 /* pci_io_base -- the base address from which io bars are offsets.
@@ -102,7 +95,7 @@ static void pci_parse_of_addrs(struct device_node *node, struct pci_dev *dev)
         addrs = of_get_property(node, "assigned-addresses", &proplen);
         if (!addrs)
                 return;
-        DBG("    parse addresses (%d bytes) @ %p\n", proplen, addrs);
+        pr_debug("    parse addresses (%d bytes) @ %p\n", proplen, addrs);
         for (; proplen >= 20; proplen -= 20, addrs += 5) {
                 flags = pci_parse_of_flags(addrs[0]);
                 if (!flags)
@@ -112,8 +105,9 @@ static void pci_parse_of_addrs(struct device_node *node, struct pci_dev *dev)
                 if (!size)
                         continue;
                 i = addrs[0] & 0xff;
-                DBG("  base: %llx, size: %llx, i: %x\n",
-                    (unsigned long long)base, (unsigned long long)size, i);
+                pr_debug("  base: %llx, size: %llx, i: %x\n",
+                         (unsigned long long)base,
+                         (unsigned long long)size, i);
 
                 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
                         res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
@@ -144,7 +138,7 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
         if (type == NULL)
                 type = "";
 
-        DBG("    create device, devfn: %x, type: %s\n", devfn, type);
+        pr_debug("    create device, devfn: %x, type: %s\n", devfn, type);
 
         dev->bus = bus;
         dev->sysdata = node;
@@ -165,8 +159,8 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
         dev->class = get_int_prop(node, "class-code", 0);
         dev->revision = get_int_prop(node, "revision-id", 0);
 
-        DBG("    class: 0x%x\n", dev->class);
-        DBG("    revision: 0x%x\n", dev->revision);
+        pr_debug("    class: 0x%x\n", dev->class);
+        pr_debug("    revision: 0x%x\n", dev->revision);
 
         dev->current_state = 4;         /* unknown power state */
         dev->error_state = pci_channel_io_normal;
@@ -187,7 +181,7 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
 
         pci_parse_of_addrs(node, dev);
 
-        DBG("    adding to system ...\n");
+        pr_debug("    adding to system ...\n");
 
         pci_device_add(dev, bus);
 
@@ -195,19 +189,20 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
 }
 EXPORT_SYMBOL(of_create_pci_dev);
 
-void __devinit of_scan_bus(struct device_node *node,
-                           struct pci_bus *bus)
+static void __devinit __of_scan_bus(struct device_node *node,
+                                    struct pci_bus *bus, int rescan_existing)
 {
         struct device_node *child;
         const u32 *reg;
         int reglen, devfn;
         struct pci_dev *dev;
 
-        DBG("of_scan_bus(%s) bus no %d... \n", node->full_name, bus->number);
+        pr_debug("of_scan_bus(%s) bus no %d... \n",
+                 node->full_name, bus->number);
 
         /* Scan direct children */
         for_each_child_of_node(node, child) {
-                DBG("  * %s\n", child->full_name);
+                pr_debug("  * %s\n", child->full_name);
                 reg = of_get_property(child, "reg", &reglen);
                 if (reg == NULL || reglen < 20)
                         continue;
@@ -217,11 +212,15 @@ void __devinit of_scan_bus(struct device_node *node,
                 dev = of_create_pci_dev(child, bus, devfn);
                 if (!dev)
                         continue;
-                DBG("    dev header type: %x\n", dev->hdr_type);
+                pr_debug("    dev header type: %x\n", dev->hdr_type);
         }
 
-        /* Ally all fixups */
-        pcibios_fixup_of_probed_bus(bus);
+        /* Apply all fixups necessary. We don't fixup the bus "self"
+         * for an existing bridge that is being rescanned
+         */
+        if (!rescan_existing)
+                pcibios_setup_bus_self(bus);
+        pcibios_setup_bus_devices(bus);
 
         /* Now scan child busses */
         list_for_each_entry(dev, &bus->devices, bus_list) {
@@ -233,7 +232,20 @@ void __devinit of_scan_bus(struct device_node *node,
                 }
         }
 }
-EXPORT_SYMBOL(of_scan_bus);
+
+void __devinit of_scan_bus(struct device_node *node,
+                           struct pci_bus *bus)
+{
+        __of_scan_bus(node, bus, 0);
+}
+EXPORT_SYMBOL_GPL(of_scan_bus);
+
+void __devinit of_rescan_bus(struct device_node *node,
+                             struct pci_bus *bus)
+{
+        __of_scan_bus(node, bus, 1);
+}
+EXPORT_SYMBOL_GPL(of_rescan_bus);
 
 void __devinit of_scan_pci_bridge(struct device_node *node,
                                   struct pci_dev *dev)
@@ -245,7 +257,7 @@ void __devinit of_scan_pci_bridge(struct device_node *node,
         unsigned int flags;
         u64 size;
 
-        DBG("of_scan_pci_bridge(%s)\n", node->full_name);
+        pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
 
         /* parse bus-range property */
         busrange = of_get_property(node, "bus-range", &len);
@@ -309,12 +321,12 @@ void __devinit of_scan_pci_bridge(struct device_node *node,
         }
         sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
                 bus->number);
-        DBG("    bus name: %s\n", bus->name);
+        pr_debug("    bus name: %s\n", bus->name);
 
         mode = PCI_PROBE_NORMAL;
         if (ppc_md.pci_probe_mode)
                 mode = ppc_md.pci_probe_mode(bus);
-        DBG("    probe mode: %d\n", mode);
+        pr_debug("    probe mode: %d\n", mode);
 
         if (mode == PCI_PROBE_DEVTREE)
                 of_scan_bus(node, bus);
@@ -327,9 +339,10 @@ void __devinit scan_phb(struct pci_controller *hose)
 {
         struct pci_bus *bus;
         struct device_node *node = hose->dn;
-        int i, mode;
+        int mode;
 
-        DBG("PCI: Scanning PHB %s\n", node ? node->full_name : "<NO NAME>");
+        pr_debug("PCI: Scanning PHB %s\n",
+                 node ? node->full_name : "<NO NAME>");
 
         /* Create an empty bus for the toplevel */
         bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, node);
@@ -345,26 +358,13 @@ void __devinit scan_phb(struct pci_controller *hose)
         pcibios_map_io_space(bus);
 
         /* Wire up PHB bus resources */
-        DBG("PCI: PHB IO resource    = %016lx-%016lx [%lx]\n",
-            hose->io_resource.start, hose->io_resource.end,
-            hose->io_resource.flags);
-        bus->resource[0] = &hose->io_resource;
-        for (i = 0; i < 3; ++i) {
-                DBG("PCI: PHB MEM resource %d = %016lx-%016lx [%lx]\n", i,
-                    hose->mem_resources[i].start,
-                    hose->mem_resources[i].end,
-                    hose->mem_resources[i].flags);
-                bus->resource[i+1] = &hose->mem_resources[i];
-        }
-        DBG("PCI: PHB MEM offset     = %016lx\n", hose->pci_mem_offset);
-        DBG("PCI: PHB IO  offset     = %08lx\n",
-            (unsigned long)hose->io_base_virt - _IO_BASE);
+        pcibios_setup_phb_resources(hose);
 
         /* Get probe mode and perform scan */
         mode = PCI_PROBE_NORMAL;
         if (node && ppc_md.pci_probe_mode)
                 mode = ppc_md.pci_probe_mode(bus);
-        DBG("    probe mode: %d\n", mode);
+        pr_debug("    probe mode: %d\n", mode);
         if (mode == PCI_PROBE_DEVTREE) {
                 bus->subordinate = hose->last_busno;
                 of_scan_bus(node, bus);
@@ -380,7 +380,7 @@ static int __init pcibios_init(void)
 
         printk(KERN_INFO "PCI: Probing PCI hardware\n");
 
-        /* For now, override phys_mem_access_prot. If we need it,
+        /* For now, override phys_mem_access_prot. If we need it,g
          * later, we may move that initialization to each ppc_md
          */
         ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
@@ -388,6 +388,11 @@ static int __init pcibios_init(void)
         if (pci_probe_only)
                 ppc_pci_flags |= PPC_PCI_PROBE_ONLY;
 
+        /* On ppc64, we always enable PCI domains and we keep domain 0
+         * backward compatible in /proc for video cards
+         */
+        ppc_pci_flags |= PPC_PCI_ENABLE_PROC_DOMAINS | PPC_PCI_COMPAT_DOMAIN_0;
+
         /* Scan all of the recorded PCI controllers.  */
         list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
                 scan_phb(hose);
@@ -422,8 +427,8 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
         if (bus->self) {
                 struct resource *res = bus->resource[0];
 
-                DBG("IO unmapping for PCI-PCI bridge %s\n",
-                    pci_name(bus->self));
+                pr_debug("IO unmapping for PCI-PCI bridge %s\n",
+                         pci_name(bus->self));
 
                 __flush_hash_table_range(&init_mm, res->start + _IO_BASE,
                                          res->end + _IO_BASE + 1);
@@ -437,8 +442,8 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
         if (hose->io_base_alloc == 0)
                 return 0;
 
-        DBG("IO unmapping for PHB %s\n", hose->dn->full_name);
-        DBG("  alloc=0x%p\n", hose->io_base_alloc);
+        pr_debug("IO unmapping for PHB %s\n", hose->dn->full_name);
+        pr_debug("  alloc=0x%p\n", hose->io_base_alloc);
 
         /* This is a PHB, we fully unmap the IO area */
         vunmap(hose->io_base_alloc);
@@ -463,11 +468,11 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
          * thus HPTEs will be faulted in when needed
          */
         if (bus->self) {
-                DBG("IO mapping for PCI-PCI bridge %s\n",
-                    pci_name(bus->self));
-                DBG("  virt=0x%016lx...0x%016lx\n",
-                    bus->resource[0]->start + _IO_BASE,
-                    bus->resource[0]->end + _IO_BASE);
+                pr_debug("IO mapping for PCI-PCI bridge %s\n",
+                         pci_name(bus->self));
+                pr_debug("  virt=0x%016lx...0x%016lx\n",
+                         bus->resource[0]->start + _IO_BASE,
+                         bus->resource[0]->end + _IO_BASE);
                 return 0;
         }
 
@@ -496,11 +501,11 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
         hose->io_base_virt = (void __iomem *)(area->addr +
                                               hose->io_base_phys - phys_page);
 
-        DBG("IO mapping for PHB %s\n", hose->dn->full_name);
-        DBG("  phys=0x%016lx, virt=0x%p (alloc=0x%p)\n",
-            hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc);
-        DBG("  size=0x%016lx (alloc=0x%016lx)\n",
-            hose->pci_io_size, size_page);
+        pr_debug("IO mapping for PHB %s\n", hose->dn->full_name);
+        pr_debug("  phys=0x%016lx, virt=0x%p (alloc=0x%p)\n",
+                 hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc);
+        pr_debug("  size=0x%016lx (alloc=0x%016lx)\n",
+                 hose->pci_io_size, size_page);
 
         /* Establish the mapping */
         if (__ioremap_at(phys_page, area->addr, size_page,
@@ -512,24 +517,13 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
         hose->io_resource.start += io_virt_offset;
         hose->io_resource.end += io_virt_offset;
 
-        DBG("  hose->io_resource=0x%016lx...0x%016lx\n",
-            hose->io_resource.start, hose->io_resource.end);
+        pr_debug("  hose->io_resource=0x%016lx...0x%016lx\n",
+                 hose->io_resource.start, hose->io_resource.end);
 
         return 0;
 }
 EXPORT_SYMBOL_GPL(pcibios_map_io_space);
 
-void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
-{
-        struct pci_dev *dev;
-
-        if (ppc_md.pci_dma_bus_setup)
-                ppc_md.pci_dma_bus_setup(bus);
-
-        list_for_each_entry(dev, &bus->devices, bus_list)
-                pcibios_setup_new_device(dev);
-}
-
 unsigned long pci_address_to_pio(phys_addr_t address)
 {
         struct pci_controller *hose, *tmp;
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 260089dccfb0..dcec1325d340 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -116,12 +116,6 @@ EXPORT_SYMBOL(giveup_spe);
 
 #ifndef CONFIG_PPC64
 EXPORT_SYMBOL(flush_instruction_cache);
-EXPORT_SYMBOL(flush_tlb_kernel_range);
-EXPORT_SYMBOL(flush_tlb_page);
-EXPORT_SYMBOL(_tlbie);
-#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE)
-EXPORT_SYMBOL(_tlbil_va);
-#endif
 #endif
 EXPORT_SYMBOL(__flush_icache_range);
 EXPORT_SYMBOL(flush_dcache_range);
@@ -174,8 +168,7 @@ EXPORT_SYMBOL(cacheable_memcpy);
 #endif
 
 #ifdef CONFIG_PPC32
-EXPORT_SYMBOL(next_mmu_context);
-EXPORT_SYMBOL(set_context);
+EXPORT_SYMBOL(switch_mmu_context);
 #endif
 
 #ifdef CONFIG_PPC_STD_MMU_32
diff --git a/arch/powerpc/xmon/setjmp.S b/arch/powerpc/kernel/ppc_save_regs.S
index 04c0b305ad4a..5113bd2285e1 100644
--- a/arch/powerpc/xmon/setjmp.S
+++ b/arch/powerpc/kernel/ppc_save_regs.S
@@ -22,7 +22,7 @@
  * that will be different for 32-bit and 64-bit, because of the
  * different ABIs, though).
  */
-_GLOBAL(xmon_save_regs)
+_GLOBAL(ppc_save_regs)
         PPC_STL r0,0*SZL(r3)
         PPC_STL r2,2*SZL(r3)
         PPC_STL r3,3*SZL(r3)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 957bded0020d..fb7049c054c0 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -33,6 +33,7 @@
 #include <linux/mqueue.h>
 #include <linux/hardirq.h>
 #include <linux/utsname.h>
+#include <linux/kernel_stat.h>
 
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
@@ -467,6 +468,8 @@ static struct regbit {
         {MSR_VEC,       "VEC"},
         {MSR_VSX,       "VSX"},
         {MSR_ME,        "ME"},
+        {MSR_CE,        "CE"},
+        {MSR_DE,        "DE"},
         {MSR_IR,        "IR"},
         {MSR_DR,        "DR"},
         {0,             NULL}
@@ -998,7 +1001,7 @@ unsigned long get_wchan(struct task_struct *p)
         return 0;
 }
 
-static int kstack_depth_to_print = 64;
+static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
 
 void show_stack(struct task_struct *tsk, unsigned long *stack)
 {
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 3a2dc7e6586a..6f73c739f1e2 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -1160,6 +1160,8 @@ static inline void __init phyp_dump_reserve_mem(void) {}
 
 void __init early_init_devtree(void *params)
 {
+        unsigned long limit;
+
         DBG(" -> early_init_devtree(%p)\n", params);
 
         /* Setup flat device-tree pointer */
@@ -1200,7 +1202,19 @@ void __init early_init_devtree(void *params)
         early_reserve_mem();
         phyp_dump_reserve_mem();
 
-        lmb_enforce_memory_limit(memory_limit);
+        limit = memory_limit;
+        if (! limit) {
+                unsigned long memsize;
+
+                /* Ensure that total memory size is page-aligned, because
+                 * otherwise mark_bootmem() gets upset. */
+                lmb_analyze();
+                memsize = lmb_phys_mem_size();
+                if ((memsize & PAGE_MASK) != memsize)
+                        limit = memsize & PAGE_MASK;
+        }
+        lmb_enforce_memory_limit(limit);
+
         lmb_analyze();
 
         DBG("Phys. mem: %lx\n", lmb_phys_mem_size());
@@ -1271,6 +1285,37 @@ struct device_node *of_find_node_by_phandle(phandle handle)
 EXPORT_SYMBOL(of_find_node_by_phandle);
 
 /**
+ *      of_find_next_cache_node - Find a node's subsidiary cache
+ *      @np:    node of type "cpu" or "cache"
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.  Caller should hold a reference
+ *      to np.
+ */
+struct device_node *of_find_next_cache_node(struct device_node *np)
+{
+        struct device_node *child;
+        const phandle *handle;
+
+        handle = of_get_property(np, "l2-cache", NULL);
+        if (!handle)
+                handle = of_get_property(np, "next-level-cache", NULL);
+
+        if (handle)
+                return of_find_node_by_phandle(*handle);
+
+        /* OF on pmac has nodes instead of properties named "l2-cache"
+         * beneath CPU nodes.
+         */
+        if (!strcmp(np->type, "cpu"))
+                for_each_child_of_node(np, child)
+                        if (!strcmp(child->type, "cache"))
+                                return child;
+
+        return NULL;
+}
+
+/**
  *      of_find_all_nodes - Get next node in global list
  *      @prev:  Previous node or NULL to start iteration
  *              of_node_put() will be called on it
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index a11d68976dc8..8c1335566089 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -734,10 +734,7 @@ void of_irq_map_init(unsigned int flags)
         if (flags & OF_IMAP_NO_PHANDLE) {
                 struct device_node *np;
 
-                for(np = NULL; (np = of_find_all_nodes(np)) != NULL;) {
-                        if (of_get_property(np, "interrupt-controller", NULL)
-                            == NULL)
-                                continue;
+                for_each_node_with_property(np, "interrupt-controller") {
                         /* Skip /chosen/interrupt-controller */
                         if (strcmp(np->name, "chosen") == 0)
                                 continue;
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 1f8505c23548..fdfe14c4bdef 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -566,6 +566,32 @@ int rtas_get_sensor(int sensor, int index, int *state)
 }
 EXPORT_SYMBOL(rtas_get_sensor);
 
+bool rtas_indicator_present(int token, int *maxindex)
+{
+        int proplen, count, i;
+        const struct indicator_elem {
+                u32 token;
+                u32 maxindex;
+        } *indicators;
+
+        indicators = of_get_property(rtas.dev, "rtas-indicators", &proplen);
+        if (!indicators)
+                return false;
+
+        count = proplen / sizeof(struct indicator_elem);
+
+        for (i = 0; i < count; i++) {
+                if (indicators[i].token != token)
+                        continue;
+                if (maxindex)
+                        *maxindex = indicators[i].maxindex;
+                return true;
+        }
+
+        return false;
+}
+EXPORT_SYMBOL(rtas_indicator_present);
+
 int rtas_set_indicator(int indicator, int index, int new_value)
 {
         int token = rtas_token("set-indicator");
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 589a2797eac2..8869001ab5d7 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -301,51 +301,3 @@ void __init find_and_init_phbs(void)
 #endif /* CONFIG_PPC32 */
         }
 }
-
-/* RPA-specific bits for removing PHBs */
-int pcibios_remove_root_bus(struct pci_controller *phb)
-{
-        struct pci_bus *b = phb->bus;
-        struct resource *res;
-        int rc, i;
-
-        res = b->resource[0];
-        if (!res->flags) {
-                printk(KERN_ERR "%s: no IO resource for PHB %s\n", __func__,
-                                b->name);
-                return 1;
-        }
-
-        rc = pcibios_unmap_io_space(b);
-        if (rc) {
-                printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
-                        __func__, b->name);
-                return 1;
-        }
-
-        if (release_resource(res)) {
-                printk(KERN_ERR "%s: failed to release IO on bus %s\n",
-                                __func__, b->name);
-                return 1;
-        }
-
-        for (i = 1; i < 3; ++i) {
-                res = b->resource[i];
-                if (!res->flags && i == 0) {
-                        printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
-                                __func__, b->name);
-                        return 1;
-                }
-                if (res->flags && release_resource(res)) {
-                        printk(KERN_ERR
-                               "%s: failed to release IO %d on bus %s\n",
-                                __func__, i, b->name);
-                        return 1;
-                }
-        }
-
-        pcibios_free_controller(phb);
-
-        return 0;
-}
-EXPORT_SYMBOL(pcibios_remove_root_bus);
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index c1a27626a940..9e1ca745d8f0 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -38,6 +38,7 @@
 #include <asm/time.h>
 #include <asm/serial.h>
 #include <asm/udbg.h>
+#include <asm/mmu_context.h>
 
 #include "setup.h"
 
@@ -49,12 +50,12 @@ int boot_cpuid;
 EXPORT_SYMBOL_GPL(boot_cpuid);
 int boot_cpuid_phys;
 
+int smp_hw_index[NR_CPUS];
+
 unsigned long ISA_DMA_THRESHOLD;
 unsigned int DMA_MODE_READ;
 unsigned int DMA_MODE_WRITE;
 
-int have_of = 1;
-
 #ifdef CONFIG_VGA_CONSOLE
 unsigned long vgacon_remap_base;
 EXPORT_SYMBOL(vgacon_remap_base);
@@ -97,6 +98,10 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
                           PTRRELOC(&__start___ftr_fixup),
                           PTRRELOC(&__stop___ftr_fixup));
 
+        do_feature_fixups(spec->mmu_features,
+                          PTRRELOC(&__start___mmu_ftr_fixup),
+                          PTRRELOC(&__stop___mmu_ftr_fixup));
+
         do_lwsync_fixups(spec->cpu_features,
                          PTRRELOC(&__start___lwsync_fixup),
                          PTRRELOC(&__stop___lwsync_fixup));
@@ -121,6 +126,8 @@ notrace void __init machine_init(unsigned long dt_ptr)
 
         probe_machine();
 
+        setup_kdump_trampoline();
+
 #ifdef CONFIG_6xx
         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
             cpu_has_feature(CPU_FTR_CAN_NAP))
@@ -326,4 +333,8 @@ void __init setup_arch(char **cmdline_p)
         if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
 
         paging_init();
+
+        /* Initialize the MMU context management stuff */
+        mmu_context_init();
+
 }
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 169d74cef157..d8bd2161e738 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -70,7 +70,6 @@
 #define DBG(fmt...)
 #endif
 
-int have_of = 1;
 int boot_cpuid = 0;
 u64 ppc64_pft_size;
 
@@ -362,6 +361,8 @@ void __init setup_system(void)
          */
         do_feature_fixups(cur_cpu_spec->cpu_features,
                           &__start___ftr_fixup, &__stop___ftr_fixup);
+        do_feature_fixups(cur_cpu_spec->mmu_features,
+                          &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
         do_feature_fixups(powerpc_firmware_features,
                           &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
         do_lwsync_fixups(cur_cpu_spec->cpu_features,
@@ -606,8 +607,6 @@ void __init setup_per_cpu_areas(void)
 
         for_each_possible_cpu(i) {
                 ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size);
-                if (!ptr)
-                        panic("Cannot allocate cpu data for CPU %d\n", i);
 
                 paca[i].data_offset = ptr - __per_cpu_start;
                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
diff --git a/arch/powerpc/kernel/smp-tbsync.c b/arch/powerpc/kernel/smp-tbsync.c
index bc892e69b4f7..a5e54526403d 100644
--- a/arch/powerpc/kernel/smp-tbsync.c
+++ b/arch/powerpc/kernel/smp-tbsync.c
@@ -113,7 +113,7 @@ void __devinit smp_generic_give_timebase(void)
 {
         int i, score, score2, old, min=0, max=5000, offset=1000;
 
-        printk("Synchronizing timebase\n");
+        pr_debug("Software timebase sync\n");
 
         /* if this fails then this kernel won't work anyway... */
         tbsync = kzalloc( sizeof(*tbsync), GFP_KERNEL );
@@ -123,13 +123,13 @@ void __devinit smp_generic_give_timebase(void)
         while (!tbsync->ack)
                 barrier();
 
-        printk("Got ack\n");
+        pr_debug("Got ack\n");
 
         /* binary search */
         for (old = -1; old != offset ; offset = (min+max) / 2) {
                 score = start_contest(kSetAndTest, offset, NUM_ITER);
 
-                printk("score %d, offset %d\n", score, offset );
+                pr_debug("score %d, offset %d\n", score, offset );
 
                 if( score > 0 )
                         max = offset;
@@ -140,8 +140,8 @@ void __devinit smp_generic_give_timebase(void)
         score = start_contest(kSetAndTest, min, NUM_ITER);
         score2 = start_contest(kSetAndTest, max, NUM_ITER);
 
-        printk("Min %d (score %d), Max %d (score %d)\n",
-               min, score, max, score2);
+        pr_debug("Min %d (score %d), Max %d (score %d)\n",
+                 min, score, max, score2);
         score = abs(score);
         score2 = abs(score2);
         offset = (score < score2) ? min : max;
@@ -155,7 +155,7 @@ void __devinit smp_generic_give_timebase(void)
                 if (score2 <= score || score2 < 20)
                         break;
         }
-        printk("Final offset: %d (%d/%d)\n", offset, score2, NUM_ITER );
+        pr_debug("Final offset: %d (%d/%d)\n", offset, score2, NUM_ITER );
 
         /* exiting */
         tbsync->cmd = kExit;
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index ff9f7010097d..65484b2200b3 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -57,16 +57,11 @@
 #define DBG(fmt...)
 #endif
 
-int smp_hw_index[NR_CPUS];
 struct thread_info *secondary_ti;
 
-cpumask_t cpu_possible_map = CPU_MASK_NONE;
-cpumask_t cpu_online_map = CPU_MASK_NONE;
 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE;
 DEFINE_PER_CPU(cpumask_t, cpu_core_map) = CPU_MASK_NONE;
 
-EXPORT_SYMBOL(cpu_online_map);
-EXPORT_SYMBOL(cpu_possible_map);
 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
 
@@ -123,6 +118,65 @@ void smp_message_recv(int msg)
         }
 }
 
+static irqreturn_t call_function_action(int irq, void *data)
+{
+        generic_smp_call_function_interrupt();
+        return IRQ_HANDLED;
+}
+
+static irqreturn_t reschedule_action(int irq, void *data)
+{
+        /* we just need the return path side effect of checking need_resched */
+        return IRQ_HANDLED;
+}
+
+static irqreturn_t call_function_single_action(int irq, void *data)
+{
+        generic_smp_call_function_single_interrupt();
+        return IRQ_HANDLED;
+}
+
+static irqreturn_t debug_ipi_action(int irq, void *data)
+{
+        smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
+        return IRQ_HANDLED;
+}
+
+static irq_handler_t smp_ipi_action[] = {
+        [PPC_MSG_CALL_FUNCTION] =  call_function_action,
+        [PPC_MSG_RESCHEDULE] = reschedule_action,
+        [PPC_MSG_CALL_FUNC_SINGLE] = call_function_single_action,
+        [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action,
+};
+
+const char *smp_ipi_name[] = {
+        [PPC_MSG_CALL_FUNCTION] =  "ipi call function",
+        [PPC_MSG_RESCHEDULE] = "ipi reschedule",
+        [PPC_MSG_CALL_FUNC_SINGLE] = "ipi call function single",
+        [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger",
+};
+
+/* optional function to request ipi, for controllers with >= 4 ipis */
+int smp_request_message_ipi(int virq, int msg)
+{
+        int err;
+
+        if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) {
+                return -EINVAL;
+        }
+#if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC)
+        if (msg == PPC_MSG_DEBUGGER_BREAK) {
+                return 1;
+        }
+#endif
+        err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU,
+                          smp_ipi_name[msg], 0);
+        WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
+                virq, smp_ipi_name[msg], err);
+
+        return err;
+}
+
 void smp_send_reschedule(int cpu)
 {
         if (likely(smp_ops))
@@ -408,8 +462,7 @@ out:
 static struct device_node *cpu_to_l2cache(int cpu)
 {
         struct device_node *np;
-        const phandle *php;
-        phandle ph;
+        struct device_node *cache;
 
         if (!cpu_present(cpu))
                 return NULL;
@@ -418,13 +471,11 @@ static struct device_node *cpu_to_l2cache(int cpu)
         if (np == NULL)
                 return NULL;
 
-        php = of_get_property(np, "l2-cache", NULL);
-        if (php == NULL)
-                return NULL;
-        ph = *php;
+        cache = of_find_next_cache_node(np);
+
         of_node_put(np);
 
-        return of_find_node_by_phandle(ph);
+        return cache;
 }
 
 /* Activate a secondary processor. */
diff --git a/arch/powerpc/kernel/swsusp.c b/arch/powerpc/kernel/swsusp.c
index 77b7b34b5955..560c96119501 100644
--- a/arch/powerpc/kernel/swsusp.c
+++ b/arch/powerpc/kernel/swsusp.c
@@ -34,6 +34,6 @@ void save_processor_state(void)
 void restore_processor_state(void)
 {
 #ifdef CONFIG_PPC32
-        set_context(current->active_mm->context.id, current->active_mm->pgd);
+        switch_mmu_context(NULL, current->active_mm);
 #endif
 }
diff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S
index 77fc76607ab2..b47d8ceffb52 100644
--- a/arch/powerpc/kernel/swsusp_32.S
+++ b/arch/powerpc/kernel/swsusp_32.S
@@ -5,7 +5,7 @@
 #include <asm/thread_info.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
-
+#include <asm/mmu.h>
 
 /*
  * Structure for storing CPU registers on the save area.
@@ -279,7 +279,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
         mtibatl 3,r4
 #endif
 
-BEGIN_FTR_SECTION
+BEGIN_MMU_FTR_SECTION
         li      r4,0
         mtspr   SPRN_DBAT4U,r4
         mtspr   SPRN_DBAT4L,r4
@@ -297,7 +297,7 @@ BEGIN_FTR_SECTION
         mtspr   SPRN_IBAT6L,r4
         mtspr   SPRN_IBAT7U,r4
         mtspr   SPRN_IBAT7L,r4
-END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
 
         /* Flush all TLBs */
         lis     r4,0x1000
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 20885a38237a..0c64f10087b9 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -566,7 +566,6 @@ static bool cache_is_unified(struct device_node *np)
 
 static struct cache_desc * __cpuinit create_cache_index_info(struct device_node *np, struct kobject *parent, int index, int level)
 {
-        const phandle *next_cache_phandle;
         struct device_node *next_cache;
         struct cache_desc *new, **end;
 
@@ -591,11 +590,7 @@ static struct cache_desc * __cpuinit create_cache_index_info(struct device_node
         while (*end)
                 end = &(*end)->next;
 
-        next_cache_phandle = of_get_property(np, "l2-cache", NULL);
-        if (!next_cache_phandle)
-                goto out;
-
-        next_cache = of_find_node_by_phandle(*next_cache_phandle);
+        next_cache = of_find_next_cache_node(np);
         if (!next_cache)
                 goto out;
 
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index e2ee66b5831d..c9564031a2a9 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -164,8 +164,6 @@ static u64 tb_to_ns_scale __read_mostly;
 static unsigned tb_to_ns_shift __read_mostly;
 static unsigned long boot_tb __read_mostly;
 
-static struct gettimeofday_struct do_gtod;
-
 extern struct timezone sys_tz;
 static long timezone_offset;
 
@@ -258,8 +256,10 @@ void account_system_vtime(struct task_struct *tsk)
                 delta += sys_time;
                 get_paca()->system_time = 0;
         }
-        account_system_time(tsk, 0, delta);
-        account_system_time_scaled(tsk, deltascaled);
+        if (in_irq() || idle_task(smp_processor_id()) != tsk)
+                account_system_time(tsk, 0, delta, deltascaled);
+        else
+                account_idle_time(delta);
         per_cpu(cputime_last_delta, smp_processor_id()) = delta;
         per_cpu(cputime_scaled_last_delta, smp_processor_id()) = deltascaled;
         local_irq_restore(flags);
@@ -277,10 +277,8 @@ void account_process_tick(struct task_struct *tsk, int user_tick)
 
         utime = get_paca()->user_time;
         get_paca()->user_time = 0;
-        account_user_time(tsk, utime);
-
         utimescaled = cputime_to_scaled(utime);
-        account_user_time_scaled(tsk, utimescaled);
+        account_user_time(tsk, utime, utimescaled);
 }
 
 /*
@@ -340,8 +338,12 @@ void calculate_steal_time(void)
         tb = mftb();
         purr = mfspr(SPRN_PURR);
         stolen = (tb - pme->tb) - (purr - pme->purr);
-        if (stolen > 0)
-                account_steal_time(current, stolen);
+        if (stolen > 0) {
+                if (idle_task(smp_processor_id()) != current)
+                        account_steal_time(stolen);
+                else
+                        account_idle_time(stolen);
+        }
         pme->tb = tb;
         pme->purr = purr;
 }
@@ -415,31 +417,9 @@ void udelay(unsigned long usecs)
 }
 EXPORT_SYMBOL(udelay);
 
-
-/*
- * There are two copies of tb_to_xs and stamp_xsec so that no
- * lock is needed to access and use these values in
- * do_gettimeofday.  We alternate the copies and as long as a
- * reasonable time elapses between changes, there will never
- * be inconsistent values.  ntpd has a minimum of one minute
- * between updates.
- */
 static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec,
                                u64 new_tb_to_xs)
 {
-        unsigned temp_idx;
-        struct gettimeofday_vars *temp_varp;
-
-        temp_idx = (do_gtod.var_idx == 0);
-        temp_varp = &do_gtod.vars[temp_idx];
-
-        temp_varp->tb_to_xs = new_tb_to_xs;
-        temp_varp->tb_orig_stamp = new_tb_stamp;
-        temp_varp->stamp_xsec = new_stamp_xsec;
-        smp_mb();
-        do_gtod.varp = temp_varp;
-        do_gtod.var_idx = temp_idx;
-
         /*
          * tb_update_count is used to allow the userspace gettimeofday code
          * to assure itself that it sees a consistent view of the tb_to_xs and
@@ -456,6 +436,7 @@ static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec,
         vdso_data->tb_to_xs = new_tb_to_xs;
         vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
         vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
+        vdso_data->stamp_xtime = xtime;
         smp_wmb();
         ++(vdso_data->tb_update_count);
 }
@@ -514,9 +495,7 @@ static int __init iSeries_tb_recal(void)
                                 tb_ticks_per_sec   = new_tb_ticks_per_sec;
                                 calc_cputime_factors();
                                 div128_by_32( XSEC_PER_SEC, 0, tb_ticks_per_sec, &divres );
-                                do_gtod.tb_ticks_per_sec = tb_ticks_per_sec;
                                 tb_to_xs = divres.result_low;
-                                do_gtod.varp->tb_to_xs = tb_to_xs;
                                 vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
                                 vdso_data->tb_to_xs = tb_to_xs;
                         }
@@ -869,7 +848,7 @@ static void register_decrementer_clockevent(int cpu)
         struct clock_event_device *dec = &per_cpu(decrementers, cpu).event;
 
         *dec = decrementer_clockevent;
-        dec->cpumask = cpumask_of_cpu(cpu);
+        dec->cpumask = cpumask_of(cpu);
 
         printk(KERN_DEBUG "clockevent: %s mult[%lx] shift[%d] cpu[%d]\n",
                dec->name, dec->mult, dec->shift, cpu);
@@ -988,15 +967,6 @@ void __init time_init(void)
                 sys_tz.tz_dsttime = 0;
         }
 
-        do_gtod.varp = &do_gtod.vars[0];
-        do_gtod.var_idx = 0;
-        do_gtod.varp->tb_orig_stamp = tb_last_jiffy;
-        __get_cpu_var(last_jiffy) = tb_last_jiffy;
-        do_gtod.varp->stamp_xsec = (u64) xtime.tv_sec * XSEC_PER_SEC;
-        do_gtod.tb_ticks_per_sec = tb_ticks_per_sec;
-        do_gtod.varp->tb_to_xs = tb_to_xs;
-        do_gtod.tb_to_us = tb_to_us;
-
         vdso_data->tb_orig_stamp = tb_last_jiffy;
         vdso_data->tb_update_count = 0;
         vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index f5def6cf5cd6..5457e9575685 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1160,37 +1160,85 @@ void CacheLockingException(struct pt_regs *regs, unsigned long address,
 #ifdef CONFIG_SPE
 void SPEFloatingPointException(struct pt_regs *regs)
 {
+        extern int do_spe_mathemu(struct pt_regs *regs);
         unsigned long spefscr;
         int fpexc_mode;
         int code = 0;
+        int err;
+
+        preempt_disable();
+        if (regs->msr & MSR_SPE)
+                giveup_spe(current);
+        preempt_enable();
 
         spefscr = current->thread.spefscr;
         fpexc_mode = current->thread.fpexc_mode;
 
-        /* Hardware does not neccessarily set sticky
-         * underflow/overflow/invalid flags */
         if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
                 code = FPE_FLTOVF;
-                spefscr |= SPEFSCR_FOVFS;
         }
         else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
                 code = FPE_FLTUND;
-                spefscr |= SPEFSCR_FUNFS;
         }
         else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
                 code = FPE_FLTDIV;
         else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
                 code = FPE_FLTINV;
-                spefscr |= SPEFSCR_FINVS;
         }
         else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
                 code = FPE_FLTRES;
 
-        current->thread.spefscr = spefscr;
+        err = do_spe_mathemu(regs);
+        if (err == 0) {
+                regs->nip += 4;         /* skip emulated instruction */
+                emulate_single_step(regs);
+                return;
+        }
+
+        if (err == -EFAULT) {
+                /* got an error reading the instruction */
+                _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
+        } else if (err == -EINVAL) {
+                /* didn't recognize the instruction */
+                printk(KERN_ERR "unrecognized spe instruction "
+                       "in %s at %lx\n", current->comm, regs->nip);
+        } else {
+                _exception(SIGFPE, regs, code, regs->nip);
+        }
 
-        _exception(SIGFPE, regs, code, regs->nip);
         return;
 }
+
+void SPEFloatingPointRoundException(struct pt_regs *regs)
+{
+        extern int speround_handler(struct pt_regs *regs);
+        int err;
+
+        preempt_disable();
+        if (regs->msr & MSR_SPE)
+                giveup_spe(current);
+        preempt_enable();
+
+        regs->nip -= 4;
+        err = speround_handler(regs);
+        if (err == 0) {
+                regs->nip += 4;         /* skip emulated instruction */
+                emulate_single_step(regs);
+                return;
+        }
+
+        if (err == -EFAULT) {
+                /* got an error reading the instruction */
+                _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
+        } else if (err == -EINVAL) {
+                /* didn't recognize the instruction */
+                printk(KERN_ERR "unrecognized spe instruction "
+                       "in %s at %lx\n", current->comm, regs->nip);
+        } else {
+                _exception(SIGFPE, regs, 0, regs->nip);
+                return;
+        }
+}
 #endif
 
 /*
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 65639a43e644..ad06d5c75b15 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -184,8 +184,7 @@ static void dump_vdso_pages(struct vm_area_struct * vma)
  * This is called from binfmt_elf, we create the special vma for the
  * vDSO and insert it into the mm struct tree
  */
-int arch_setup_additional_pages(struct linux_binprm *bprm,
-                                int executable_stack)
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
 {
         struct mm_struct *mm = current->mm;
         struct page **vdso_pagelist;
@@ -567,6 +566,11 @@ static __init int vdso_fixup_features(struct lib32_elfinfo *v32,
                 do_feature_fixups(cur_cpu_spec->cpu_features,
                                   start64, start64 + size64);
 
+        start64 = find_section64(v64->hdr, "__mmu_ftr_fixup", &size64);
+        if (start64)
+                do_feature_fixups(cur_cpu_spec->mmu_features,
+                                  start64, start64 + size64);
+
         start64 = find_section64(v64->hdr, "__fw_ftr_fixup", &size64);
         if (start64)
                 do_feature_fixups(powerpc_firmware_features,
@@ -583,6 +587,11 @@ static __init int vdso_fixup_features(struct lib32_elfinfo *v32,
                 do_feature_fixups(cur_cpu_spec->cpu_features,
                                   start32, start32 + size32);
 
+        start32 = find_section32(v32->hdr, "__mmu_ftr_fixup", &size32);
+        if (start32)
+                do_feature_fixups(cur_cpu_spec->mmu_features,
+                                  start32, start32 + size32);
+
 #ifdef CONFIG_PPC64
         start32 = find_section32(v32->hdr, "__fw_ftr_fixup", &size32);
         if (start32)
diff --git a/arch/powerpc/kernel/vdso32/gettimeofday.S b/arch/powerpc/kernel/vdso32/gettimeofday.S
index 72ca26df457e..ee038d4bf252 100644
--- a/arch/powerpc/kernel/vdso32/gettimeofday.S
+++ b/arch/powerpc/kernel/vdso32/gettimeofday.S
@@ -16,6 +16,13 @@
 #include <asm/asm-offsets.h>
 #include <asm/unistd.h>
 
+/* Offset for the low 32-bit part of a field of long type */
+#ifdef CONFIG_PPC64
+#define LOPART  4
+#else
+#define LOPART  0
+#endif
+
         .text
 /*
  * Exact prototype of gettimeofday
@@ -90,101 +97,53 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
 
         mflr    r12                     /* r12 saves lr */
   .cfi_register lr,r12
-        mr      r10,r3                  /* r10 saves id */
         mr      r11,r4                  /* r11 saves tp */
         bl      __get_datapage@local    /* get data page */
         mr      r9,r3                   /* datapage ptr in r9 */
-        beq     cr1,50f                 /* if monotonic -> jump there */
-
-        /*
-         * CLOCK_REALTIME
-         */
-
-        bl      __do_get_xsec@local     /* get xsec from tb & kernel */
-        bne-    98f                     /* out of line -> do syscall */
-
-        /* seconds are xsec >> 20 */
-        rlwinm  r5,r4,12,20,31
-        rlwimi  r5,r3,12,0,19
-        stw     r5,TSPC32_TV_SEC(r11)
 
-        /* get remaining xsec and convert to nsec. we scale
-         * up remaining xsec by 12 bits and get the top 32 bits
-         * of the multiplication, then we multiply by 1000
-         */
-        rlwinm  r5,r4,12,0,19
-        lis     r6,1000000@h
-        ori     r6,r6,1000000@l
-        mulhwu  r5,r5,r6
-        mulli   r5,r5,1000
-        stw     r5,TSPC32_TV_NSEC(r11)
-        mtlr    r12
-        crclr   cr0*4+so
-        li      r3,0
-        blr
+50:     bl      __do_get_tspec@local    /* get sec/nsec from tb & kernel */
+        bne     cr1,80f                 /* not monotonic -> all done */
 
         /*
          * CLOCK_MONOTONIC
          */
 
-50:     bl      __do_get_xsec@local     /* get xsec from tb & kernel */
-        bne-    98f                     /* out of line -> do syscall */
-
-        /* seconds are xsec >> 20 */
-        rlwinm  r6,r4,12,20,31
-        rlwimi  r6,r3,12,0,19
-
-        /* get remaining xsec and convert to nsec. we scale
-         * up remaining xsec by 12 bits and get the top 32 bits
-         * of the multiplication, then we multiply by 1000
-         */
-        rlwinm  r7,r4,12,0,19
-        lis     r5,1000000@h
-        ori     r5,r5,1000000@l
-        mulhwu  r7,r7,r5
-        mulli   r7,r7,1000
-
         /* now we must fixup using wall to monotonic. We need to snapshot
          * that value and do the counter trick again. Fortunately, we still
          * have the counter value in r8 that was returned by __do_get_xsec.
-         * At this point, r6,r7 contain our sec/nsec values, r3,r4 and r5
-         * can be used
+         * At this point, r3,r4 contain our sec/nsec values, r5 and r6
+         * can be used, r7 contains NSEC_PER_SEC.
          */
 
-        lwz     r3,WTOM_CLOCK_SEC(r9)
-        lwz     r4,WTOM_CLOCK_NSEC(r9)
+        lwz     r5,WTOM_CLOCK_SEC(r9)
+        lwz     r6,WTOM_CLOCK_NSEC(r9)
 
-        /* We now have our result in r3,r4. We create a fake dependency
-         * on that result and re-check the counter
+        /* We now have our offset in r5,r6. We create a fake dependency
+         * on that value and re-check the counter
          */
-        or      r5,r4,r3
-        xor     r0,r5,r5
+        or      r0,r6,r5
+        xor     r0,r0,r0
         add     r9,r9,r0
-#ifdef CONFIG_PPC64
-        lwz     r0,(CFG_TB_UPDATE_COUNT+4)(r9)
-#else
-        lwz     r0,(CFG_TB_UPDATE_COUNT)(r9)
-#endif
+        lwz     r0,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
         cmpl    cr0,r8,r0               /* check if updated */
         bne-    50b
 
-        /* Calculate and store result. Note that this mimmics the C code,
+        /* Calculate and store result. Note that this mimics the C code,
          * which may cause funny results if nsec goes negative... is that
          * possible at all ?
          */
-        add     r3,r3,r6
-        add     r4,r4,r7
-        lis     r5,NSEC_PER_SEC@h
-        ori     r5,r5,NSEC_PER_SEC@l
-        cmpl    cr0,r4,r5
-        cmpli   cr1,r4,0
+        add     r3,r3,r5
+        add     r4,r4,r6
+        cmpw    cr0,r4,r7
+        cmpwi   cr1,r4,0
         blt     1f
-        subf    r4,r5,r4
+        subf    r4,r7,r4
         addi    r3,r3,1
-1:      bge     cr1,1f
+1:      bge     cr1,80f
         addi    r3,r3,-1
-        add     r4,r4,r5
-1:      stw     r3,TSPC32_TV_SEC(r11)
+        add     r4,r4,r7
+
+80:     stw     r3,TSPC32_TV_SEC(r11)
         stw     r4,TSPC32_TV_NSEC(r11)
 
         mtlr    r12
@@ -195,10 +154,6 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
         /*
          * syscall fallback
          */
-98:
-        mtlr    r12
-        mr      r3,r10
-        mr      r4,r11
 99:
         li      r0,__NR_clock_gettime
         sc
@@ -254,11 +209,7 @@ __do_get_xsec:
         /* Check for update count & load values. We use the low
          * order 32 bits of the update count
          */
-#ifdef CONFIG_PPC64
-1:      lwz     r8,(CFG_TB_UPDATE_COUNT+4)(r9)
-#else
-1:      lwz     r8,(CFG_TB_UPDATE_COUNT)(r9)
-#endif
+1:      lwz     r8,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
         andi.   r0,r8,1                 /* pending update ? loop */
         bne-    1b
         xor     r0,r8,r8                /* create dependency */
@@ -305,11 +256,7 @@ __do_get_xsec:
         or      r6,r4,r3
         xor     r0,r6,r6
         add     r9,r9,r0
-#ifdef CONFIG_PPC64
-        lwz     r0,(CFG_TB_UPDATE_COUNT+4)(r9)
-#else
-        lwz     r0,(CFG_TB_UPDATE_COUNT)(r9)
-#endif
+        lwz     r0,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
         cmpl    cr0,r8,r0               /* check if updated */
         bne-    1b
 
@@ -322,3 +269,98 @@ __do_get_xsec:
          */
 3:      blr
   .cfi_endproc
+
+/*
+ * This is the core of clock_gettime(), it returns the current
+ * time in seconds and nanoseconds in r3 and r4.
+ * It expects the datapage ptr in r9 and doesn't clobber it.
+ * It clobbers r0, r5, r6, r10 and returns NSEC_PER_SEC in r7.
+ * On return, r8 contains the counter value that can be reused.
+ * This clobbers cr0 but not any other cr field.
+ */
+__do_get_tspec:
+  .cfi_startproc
+        /* Check for update count & load values. We use the low
+         * order 32 bits of the update count
+         */
+1:      lwz     r8,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
+        andi.   r0,r8,1                 /* pending update ? loop */
+        bne-    1b
+        xor     r0,r8,r8                /* create dependency */
+        add     r9,r9,r0
+
+        /* Load orig stamp (offset to TB) */
+        lwz     r5,CFG_TB_ORIG_STAMP(r9)
+        lwz     r6,(CFG_TB_ORIG_STAMP+4)(r9)
+
+        /* Get a stable TB value */
+2:      mftbu   r3
+        mftbl   r4
+        mftbu   r0
+        cmpl    cr0,r3,r0
+        bne-    2b
+
+        /* Subtract tb orig stamp and shift left 12 bits.
+         */
+        subfc   r7,r6,r4
+        subfe   r0,r5,r3
+        slwi    r0,r0,12
+        rlwimi. r0,r7,12,20,31
+        slwi    r7,r7,12
+
+        /* Load scale factor & do multiplication */
+        lwz     r5,CFG_TB_TO_XS(r9)     /* load values */
+        lwz     r6,(CFG_TB_TO_XS+4)(r9)
+        mulhwu  r3,r7,r6
+        mullw   r10,r7,r5
+        mulhwu  r4,r7,r5
+        addc    r10,r3,r10
+        li      r3,0
+
+        beq+    4f                      /* skip high part computation if 0 */
+        mulhwu  r3,r0,r5
+        mullw   r7,r0,r5
+        mulhwu  r5,r0,r6
+        mullw   r6,r0,r6
+        adde    r4,r4,r7
+        addze   r3,r3
+        addc    r4,r4,r5
+        addze   r3,r3
+        addc    r10,r10,r6
+
+4:      addze   r4,r4                   /* add in carry */
+        lis     r7,NSEC_PER_SEC@h
+        ori     r7,r7,NSEC_PER_SEC@l
+        mulhwu  r4,r4,r7                /* convert to nanoseconds */
+
+        /* At this point, we have seconds & nanoseconds since the xtime
+         * stamp in r3+CA and r4.  Load & add the xtime stamp.
+         */
+#ifdef CONFIG_PPC64
+        lwz     r5,STAMP_XTIME+TSPC64_TV_SEC+LOPART(r9)
+        lwz     r6,STAMP_XTIME+TSPC64_TV_NSEC+LOPART(r9)
+#else
+        lwz     r5,STAMP_XTIME+TSPC32_TV_SEC(r9)
+        lwz     r6,STAMP_XTIME+TSPC32_TV_NSEC(r9)
+#endif
+        add     r4,r4,r6
+        adde    r3,r3,r5
+
+        /* We now have our result in r3,r4. We create a fake dependency
+         * on that result and re-check the counter
+         */
+        or      r6,r4,r3
+        xor     r0,r6,r6
+        add     r9,r9,r0
+        lwz     r0,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
+        cmpl    cr0,r8,r0               /* check if updated */
+        bne-    1b
+
+        /* check for nanosecond overflow and adjust if necessary */
+        cmpw    r4,r7
+        bltlr                           /* all done if no overflow */
+        subf    r4,r7,r4                /* adjust if overflow */
+        addi    r3,r3,1
+
+        blr
+  .cfi_endproc
diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S
index be3b6a41dc09..904ef1360dd7 100644
--- a/arch/powerpc/kernel/vdso32/vdso32.lds.S
+++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S
@@ -34,6 +34,9 @@ SECTIONS
         __ftr_fixup     : { *(__ftr_fixup) }
 
         . = ALIGN(8);
+        __mmu_ftr_fixup : { *(__mmu_ftr_fixup) }
+
+        . = ALIGN(8);
         __lwsync_fixup  : { *(__lwsync_fixup) }
 
 #ifdef CONFIG_PPC64
diff --git a/arch/powerpc/kernel/vdso64/gettimeofday.S b/arch/powerpc/kernel/vdso64/gettimeofday.S
index c6401f9e37f1..262cd5857a56 100644
--- a/arch/powerpc/kernel/vdso64/gettimeofday.S
+++ b/arch/powerpc/kernel/vdso64/gettimeofday.S
@@ -75,90 +75,49 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
 
         mflr    r12                     /* r12 saves lr */
   .cfi_register lr,r12
-        mr      r10,r3                  /* r10 saves id */
         mr      r11,r4                  /* r11 saves tp */
         bl      V_LOCAL_FUNC(__get_datapage)    /* get data page */
-        beq     cr1,50f                 /* if monotonic -> jump there */
-
-        /*
-         * CLOCK_REALTIME
-         */
-
-        bl      V_LOCAL_FUNC(__do_get_xsec)     /* get xsec from tb & kernel */
-
-        lis     r7,15                   /* r7 = 1000000 = USEC_PER_SEC */
-        ori     r7,r7,16960
-        rldicl  r5,r4,44,20             /* r5 = sec = xsec / XSEC_PER_SEC */
-        rldicr  r6,r5,20,43             /* r6 = sec * XSEC_PER_SEC */
-        std     r5,TSPC64_TV_SEC(r11)   /* store sec in tv */
-        subf    r0,r6,r4                /* r0 = xsec = (xsec - r6) */
-        mulld   r0,r0,r7                /* usec = (xsec * USEC_PER_SEC) /
-                                         * XSEC_PER_SEC
-                                         */
-        rldicl  r0,r0,44,20
-        mulli   r0,r0,1000              /* nsec = usec * 1000 */
-        std     r0,TSPC64_TV_NSEC(r11)  /* store nsec in tp */
-
-        mtlr    r12
-        crclr   cr0*4+so
-        li      r3,0
-        blr
+50:     bl      V_LOCAL_FUNC(__do_get_tspec)    /* get time from tb & kernel */
+        bne     cr1,80f                 /* if not monotonic, all done */
 
         /*
          * CLOCK_MONOTONIC
          */
 
-50:     bl      V_LOCAL_FUNC(__do_get_xsec)     /* get xsec from tb & kernel */
-
-        lis     r7,15                   /* r7 = 1000000 = USEC_PER_SEC */
-        ori     r7,r7,16960
-        rldicl  r5,r4,44,20             /* r5 = sec = xsec / XSEC_PER_SEC */
-        rldicr  r6,r5,20,43             /* r6 = sec * XSEC_PER_SEC */
-        subf    r0,r6,r4                /* r0 = xsec = (xsec - r6) */
-        mulld   r0,r0,r7                /* usec = (xsec * USEC_PER_SEC) /
-                                         * XSEC_PER_SEC
-                                         */
-        rldicl  r6,r0,44,20
-        mulli   r6,r6,1000              /* nsec = usec * 1000 */
-
         /* now we must fixup using wall to monotonic. We need to snapshot
          * that value and do the counter trick again. Fortunately, we still
-         * have the counter value in r8 that was returned by __do_get_xsec.
-         * At this point, r5,r6 contain our sec/nsec values.
-         * can be used
+         * have the counter value in r8 that was returned by __do_get_tspec.
+         * At this point, r4,r5 contain our sec/nsec values.
          */
 
-        lwa     r4,WTOM_CLOCK_SEC(r3)
-        lwa     r7,WTOM_CLOCK_NSEC(r3)
+        lwa     r6,WTOM_CLOCK_SEC(r3)
+        lwa     r9,WTOM_CLOCK_NSEC(r3)
 
-        /* We now have our result in r4,r7. We create a fake dependency
+        /* We now have our result in r6,r9. We create a fake dependency
          * on that result and re-check the counter
          */
-        or      r9,r4,r7
-        xor     r0,r9,r9
+        or      r0,r6,r9
+        xor     r0,r0,r0
         add     r3,r3,r0
         ld      r0,CFG_TB_UPDATE_COUNT(r3)
         cmpld   cr0,r0,r8               /* check if updated */
         bne-    50b
 
-        /* Calculate and store result. Note that this mimmics the C code,
-         * which may cause funny results if nsec goes negative... is that
-         * possible at all ?
+        /* Add wall->monotonic offset and check for overflow or underflow.
          */
-        add     r4,r4,r5
-        add     r7,r7,r6
-        lis     r9,NSEC_PER_SEC@h
-        ori     r9,r9,NSEC_PER_SEC@l
-        cmpl    cr0,r7,r9
-        cmpli   cr1,r7,0
+        add     r4,r4,r6
+        add     r5,r5,r9
+        cmpd    cr0,r5,r7
+        cmpdi   cr1,r5,0
         blt     1f
-        subf    r7,r9,r7
+        subf    r5,r7,r5
         addi    r4,r4,1
-1:      bge     cr1,1f
+1:      bge     cr1,80f
         addi    r4,r4,-1
-        add     r7,r7,r9
-1:      std     r4,TSPC64_TV_SEC(r11)
-        std     r7,TSPC64_TV_NSEC(r11)
+        add     r5,r5,r7
+
+80:     std     r4,TSPC64_TV_SEC(r11)
+        std     r5,TSPC64_TV_NSEC(r11)
 
         mtlr    r12
         crclr   cr0*4+so
@@ -168,10 +127,6 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
         /*
          * syscall fallback
          */
-98:
-        mtlr    r12
-        mr      r3,r10
-        mr      r4,r11
 99:
         li      r0,__NR_clock_gettime
         sc
@@ -253,3 +208,59 @@ V_FUNCTION_BEGIN(__do_get_xsec)
         blr
   .cfi_endproc
 V_FUNCTION_END(__do_get_xsec)
+
+/*
+ * This is the core of clock_gettime(), it returns the current
+ * time in seconds and nanoseconds in r4 and r5.
+ * It expects the datapage ptr in r3 and doesn't clobber it.
+ * It clobbers r0 and r6 and returns NSEC_PER_SEC in r7.
+ * On return, r8 contains the counter value that can be reused.
+ * This clobbers cr0 but not any other cr field.
+ */
+V_FUNCTION_BEGIN(__do_get_tspec)
+  .cfi_startproc
+        /* check for update count & load values */
+1:      ld      r8,CFG_TB_UPDATE_COUNT(r3)
+        andi.   r0,r8,1                 /* pending update ? loop */
+        bne-    1b
+        xor     r0,r8,r8                /* create dependency */
+        add     r3,r3,r0
+
+        /* Get TB & offset it. We use the MFTB macro which will generate
+         * workaround code for Cell.
+         */
+        MFTB(r7)
+        ld      r9,CFG_TB_ORIG_STAMP(r3)
+        subf    r7,r9,r7
+
+        /* Scale result */
+        ld      r5,CFG_TB_TO_XS(r3)
+        sldi    r7,r7,12                /* compute time since stamp_xtime */
+        mulhdu  r6,r7,r5                /* in units of 2^-32 seconds */
+
+        /* Add stamp since epoch */
+        ld      r4,STAMP_XTIME+TSPC64_TV_SEC(r3)
+        ld      r5,STAMP_XTIME+TSPC64_TV_NSEC(r3)
+        or      r0,r4,r5
+        or      r0,r0,r6
+        xor     r0,r0,r0
+        add     r3,r3,r0
+        ld      r0,CFG_TB_UPDATE_COUNT(r3)
+        cmpld   r0,r8                   /* check if updated */
+        bne-    1b                      /* reload if so */
+
+        /* convert to seconds & nanoseconds and add to stamp */
+        lis     r7,NSEC_PER_SEC@h
+        ori     r7,r7,NSEC_PER_SEC@l
+        mulhwu  r0,r6,r7                /* compute nanoseconds and */
+        srdi    r6,r6,32                /* seconds since stamp_xtime */
+        clrldi  r0,r0,32
+        add     r5,r5,r0                /* add nanoseconds together */
+        cmpd    r5,r7                   /* overflow? */
+        add     r4,r4,r6
+        bltlr                           /* all done if no overflow */
+        subf    r5,r7,r5                /* if overflow, adjust */
+        addi    r4,r4,1
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__do_get_tspec)
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S
index d0b2526dd38d..0e615404e247 100644
--- a/arch/powerpc/kernel/vdso64/vdso64.lds.S
+++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S
@@ -35,6 +35,9 @@ SECTIONS
         __ftr_fixup     : { *(__ftr_fixup) }
 
         . = ALIGN(8);
+        __mmu_ftr_fixup : { *(__mmu_ftr_fixup) }
+
+        . = ALIGN(8);
         __lwsync_fixup  : { *(__lwsync_fixup) }
 
         . = ALIGN(8);
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index a11e6bc59b30..94aa7b011b27 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -41,9 +41,9 @@
 static struct bus_type vio_bus_type;
 
 static struct vio_dev vio_bus_device  = { /* fake "parent" device */
-        .name = vio_bus_device.dev.bus_id,
+        .name = "vio",
         .type = "",
-        .dev.bus_id = "vio",
+        .dev.init_name = "vio",
         .dev.bus = &vio_bus_type,
 };
 
@@ -1216,7 +1216,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
 
         viodev->irq = irq_of_parse_and_map(of_node, 0);
 
-        snprintf(viodev->dev.bus_id, BUS_ID_SIZE, "%x", *unit_address);
+        dev_set_name(&viodev->dev, "%x", *unit_address);
         viodev->name = of_node->name;
         viodev->type = of_node->type;
         viodev->unit_address = *unit_address;
@@ -1243,7 +1243,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
         /* register with generic device framework */
         if (device_register(&viodev->dev)) {
                 printk(KERN_ERR "%s: failed to register device %s\n",
-                                __func__, viodev->dev.bus_id);
+                                __func__, dev_name(&viodev->dev));
                 /* XXX free TCE table */
                 kfree(viodev);
                 return NULL;
@@ -1400,13 +1400,13 @@ static struct vio_dev *vio_find_name(const char *name)
 struct vio_dev *vio_find_node(struct device_node *vnode)
 {
         const uint32_t *unit_address;
-        char kobj_name[BUS_ID_SIZE];
+        char kobj_name[20];
 
         /* construct the kobject name from the device node */
         unit_address = of_get_property(vnode, "reg", NULL);
         if (!unit_address)
                 return NULL;
-        snprintf(kobj_name, BUS_ID_SIZE, "%x", *unit_address);
+        snprintf(kobj_name, sizeof(kobj_name), "%x", *unit_address);
 
         return vio_find_name(kobj_name);
 }
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 2412c056baa4..47bf15cd2c9e 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -152,6 +152,12 @@ SECTIONS
                 __stop___ftr_fixup = .;
         }
         . = ALIGN(8);
+        __mmu_ftr_fixup : AT(ADDR(__mmu_ftr_fixup) - LOAD_OFFSET) {
+                __start___mmu_ftr_fixup = .;
+                *(__mmu_ftr_fixup)
+                __stop___mmu_ftr_fixup = .;
+        }
+        . = ALIGN(8);
         __lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) {
                 __start___lwsync_fixup = .;
                 *(__lwsync_fixup)
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c
new file mode 100644
index 000000000000..a66bec57265a
--- /dev/null
+++ b/arch/powerpc/kvm/44x.c
@@ -0,0 +1,228 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ */
+
+#include <linux/kvm_host.h>
+#include <linux/err.h>
+
+#include <asm/reg.h>
+#include <asm/cputable.h>
+#include <asm/tlbflush.h>
+#include <asm/kvm_44x.h>
+#include <asm/kvm_ppc.h>
+
+#include "44x_tlb.h"
+
+/* Note: clearing MSR[DE] just means that the debug interrupt will not be
+ * delivered *immediately*. Instead, it simply sets the appropriate DBSR bits.
+ * If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt
+ * will be delivered as an "imprecise debug event" (which is indicated by
+ * DBSR[IDE].
+ */
+static void kvm44x_disable_debug_interrupts(void)
+{
+        mtmsr(mfmsr() & ~MSR_DE);
+}
+
+void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
+{
+        kvm44x_disable_debug_interrupts();
+
+        mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]);
+        mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]);
+        mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]);
+        mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]);
+        mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1);
+        mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2);
+        mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0);
+        mtmsr(vcpu->arch.host_msr);
+}
+
+void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
+{
+        struct kvm_guest_debug *dbg = &vcpu->guest_debug;
+        u32 dbcr0 = 0;
+
+        vcpu->arch.host_msr = mfmsr();
+        kvm44x_disable_debug_interrupts();
+
+        /* Save host debug register state. */
+        vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1);
+        vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2);
+        vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3);
+        vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4);
+        vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0);
+        vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1);
+        vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2);
+
+        /* set registers up for guest */
+
+        if (dbg->bp[0]) {
+                mtspr(SPRN_IAC1, dbg->bp[0]);
+                dbcr0 |= DBCR0_IAC1 | DBCR0_IDM;
+        }
+        if (dbg->bp[1]) {
+                mtspr(SPRN_IAC2, dbg->bp[1]);
+                dbcr0 |= DBCR0_IAC2 | DBCR0_IDM;
+        }
+        if (dbg->bp[2]) {
+                mtspr(SPRN_IAC3, dbg->bp[2]);
+                dbcr0 |= DBCR0_IAC3 | DBCR0_IDM;
+        }
+        if (dbg->bp[3]) {
+                mtspr(SPRN_IAC4, dbg->bp[3]);
+                dbcr0 |= DBCR0_IAC4 | DBCR0_IDM;
+        }
+
+        mtspr(SPRN_DBCR0, dbcr0);
+        mtspr(SPRN_DBCR1, 0);
+        mtspr(SPRN_DBCR2, 0);
+}
+
+void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
+{
+        kvmppc_44x_tlb_load(vcpu);
+}
+
+void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
+{
+        kvmppc_44x_tlb_put(vcpu);
+}
+
+int kvmppc_core_check_processor_compat(void)
+{
+        int r;
+
+        if (strcmp(cur_cpu_spec->platform, "ppc440") == 0)
+                r = 0;
+        else
+                r = -ENOTSUPP;
+
+        return r;
+}
+
+int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[0];
+        int i;
+
+        tlbe->tid = 0;
+        tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
+        tlbe->word1 = 0;
+        tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
+
+        tlbe++;
+        tlbe->tid = 0;
+        tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
+        tlbe->word1 = 0xef600000;
+        tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
+                      | PPC44x_TLB_I | PPC44x_TLB_G;
+
+        /* Since the guest can directly access the timebase, it must know the
+         * real timebase frequency. Accordingly, it must see the state of
+         * CCR1[TCS]. */
+        vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
+
+        for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++)
+                vcpu_44x->shadow_refs[i].gtlb_index = -1;
+
+        return 0;
+}
+
+/* 'linear_address' is actually an encoding of AS|PID|EADDR . */
+int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
+                               struct kvm_translation *tr)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        struct kvmppc_44x_tlbe *gtlbe;
+        int index;
+        gva_t eaddr;
+        u8 pid;
+        u8 as;
+
+        eaddr = tr->linear_address;
+        pid = (tr->linear_address >> 32) & 0xff;
+        as = (tr->linear_address >> 40) & 0x1;
+
+        index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
+        if (index == -1) {
+                tr->valid = 0;
+                return 0;
+        }
+
+        gtlbe = &vcpu_44x->guest_tlb[index];
+
+        tr->physical_address = tlb_xlate(gtlbe, eaddr);
+        /* XXX what does "writeable" and "usermode" even mean? */
+        tr->valid = 1;
+
+        return 0;
+}
+
+struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x;
+        struct kvm_vcpu *vcpu;
+        int err;
+
+        vcpu_44x = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
+        if (!vcpu_44x) {
+                err = -ENOMEM;
+                goto out;
+        }
+
+        vcpu = &vcpu_44x->vcpu;
+        err = kvm_vcpu_init(vcpu, kvm, id);
+        if (err)
+                goto free_vcpu;
+
+        return vcpu;
+
+free_vcpu:
+        kmem_cache_free(kvm_vcpu_cache, vcpu_44x);
+out:
+        return ERR_PTR(err);
+}
+
+void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+
+        kvm_vcpu_uninit(vcpu);
+        kmem_cache_free(kvm_vcpu_cache, vcpu_44x);
+}
+
+static int kvmppc_44x_init(void)
+{
+        int r;
+
+        r = kvmppc_booke_init();
+        if (r)
+                return r;
+
+        return kvm_init(NULL, sizeof(struct kvmppc_vcpu_44x), THIS_MODULE);
+}
+
+static void kvmppc_44x_exit(void)
+{
+        kvmppc_booke_exit();
+}
+
+module_init(kvmppc_44x_init);
+module_exit(kvmppc_44x_exit);
diff --git a/arch/powerpc/kvm/44x_emulate.c b/arch/powerpc/kvm/44x_emulate.c
new file mode 100644
index 000000000000..82489a743a6f
--- /dev/null
+++ b/arch/powerpc/kvm/44x_emulate.c
@@ -0,0 +1,371 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ */
+
+#include <asm/kvm_ppc.h>
+#include <asm/dcr.h>
+#include <asm/dcr-regs.h>
+#include <asm/disassemble.h>
+#include <asm/kvm_44x.h>
+#include "timing.h"
+
+#include "booke.h"
+#include "44x_tlb.h"
+
+#define OP_RFI      19
+
+#define XOP_RFI     50
+#define XOP_MFMSR   83
+#define XOP_WRTEE   131
+#define XOP_MTMSR   146
+#define XOP_WRTEEI  163
+#define XOP_MFDCR   323
+#define XOP_MTDCR   451
+#define XOP_TLBSX   914
+#define XOP_ICCCI   966
+#define XOP_TLBWE   978
+
+static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
+{
+        vcpu->arch.pc = vcpu->arch.srr0;
+        kvmppc_set_msr(vcpu, vcpu->arch.srr1);
+}
+
+int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
+                           unsigned int inst, int *advance)
+{
+        int emulated = EMULATE_DONE;
+        int dcrn;
+        int ra;
+        int rb;
+        int rc;
+        int rs;
+        int rt;
+        int ws;
+
+        switch (get_op(inst)) {
+        case OP_RFI:
+                switch (get_xop(inst)) {
+                case XOP_RFI:
+                        kvmppc_emul_rfi(vcpu);
+                        kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
+                        *advance = 0;
+                        break;
+
+                default:
+                        emulated = EMULATE_FAIL;
+                        break;
+                }
+                break;
+
+        case 31:
+                switch (get_xop(inst)) {
+
+                case XOP_MFMSR:
+                        rt = get_rt(inst);
+                        vcpu->arch.gpr[rt] = vcpu->arch.msr;
+                        kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
+                        break;
+
+                case XOP_MTMSR:
+                        rs = get_rs(inst);
+                        kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
+                        kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
+                        break;
+
+                case XOP_WRTEE:
+                        rs = get_rs(inst);
+                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
+                                                         | (vcpu->arch.gpr[rs] & MSR_EE);
+                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
+                        break;
+
+                case XOP_WRTEEI:
+                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
+                                                         | (inst & MSR_EE);
+                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
+                        break;
+
+                case XOP_MFDCR:
+                        dcrn = get_dcrn(inst);
+                        rt = get_rt(inst);
+
+                        /* The guest may access CPR0 registers to determine the timebase
+                         * frequency, and it must know the real host frequency because it
+                         * can directly access the timebase registers.
+                         *
+                         * It would be possible to emulate those accesses in userspace,
+                         * but userspace can really only figure out the end frequency.
+                         * We could decompose that into the factors that compute it, but
+                         * that's tricky math, and it's easier to just report the real
+                         * CPR0 values.
+                         */
+                        switch (dcrn) {
+                        case DCRN_CPR0_CONFIG_ADDR:
+                                vcpu->arch.gpr[rt] = vcpu->arch.cpr0_cfgaddr;
+                                break;
+                        case DCRN_CPR0_CONFIG_DATA:
+                                local_irq_disable();
+                                mtdcr(DCRN_CPR0_CONFIG_ADDR,
+                                          vcpu->arch.cpr0_cfgaddr);
+                                vcpu->arch.gpr[rt] = mfdcr(DCRN_CPR0_CONFIG_DATA);
+                                local_irq_enable();
+                                break;
+                        default:
+                                run->dcr.dcrn = dcrn;
+                                run->dcr.data =  0;
+                                run->dcr.is_write = 0;
+                                vcpu->arch.io_gpr = rt;
+                                vcpu->arch.dcr_needed = 1;
+                                kvmppc_account_exit(vcpu, DCR_EXITS);
+                                emulated = EMULATE_DO_DCR;
+                        }
+
+                        break;
+
+                case XOP_MTDCR:
+                        dcrn = get_dcrn(inst);
+                        rs = get_rs(inst);
+
+                        /* emulate some access in kernel */
+                        switch (dcrn) {
+                        case DCRN_CPR0_CONFIG_ADDR:
+                                vcpu->arch.cpr0_cfgaddr = vcpu->arch.gpr[rs];
+                                break;
+                        default:
+                                run->dcr.dcrn = dcrn;
+                                run->dcr.data = vcpu->arch.gpr[rs];
+                                run->dcr.is_write = 1;
+                                vcpu->arch.dcr_needed = 1;
+                                kvmppc_account_exit(vcpu, DCR_EXITS);
+                                emulated = EMULATE_DO_DCR;
+                        }
+
+                        break;
+
+                case XOP_TLBWE:
+                        ra = get_ra(inst);
+                        rs = get_rs(inst);
+                        ws = get_ws(inst);
+                        emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws);
+                        break;
+
+                case XOP_TLBSX:
+                        rt = get_rt(inst);
+                        ra = get_ra(inst);
+                        rb = get_rb(inst);
+                        rc = get_rc(inst);
+                        emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc);
+                        break;
+
+                case XOP_ICCCI:
+                        break;
+
+                default:
+                        emulated = EMULATE_FAIL;
+                }
+
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        return emulated;
+}
+
+int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
+{
+        switch (sprn) {
+        case SPRN_MMUCR:
+                vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
+        case SPRN_PID:
+                kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
+        case SPRN_CCR0:
+                vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
+        case SPRN_CCR1:
+                vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break;
+        case SPRN_DEAR:
+                vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
+        case SPRN_ESR:
+                vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
+        case SPRN_DBCR0:
+                vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
+        case SPRN_DBCR1:
+                vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
+        case SPRN_TSR:
+                vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
+        case SPRN_TCR:
+                vcpu->arch.tcr = vcpu->arch.gpr[rs];
+                kvmppc_emulate_dec(vcpu);
+                break;
+
+        /* Note: SPRG4-7 are user-readable. These values are
+         * loaded into the real SPRGs when resuming the
+         * guest. */
+        case SPRN_SPRG4:
+                vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG5:
+                vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG6:
+                vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG7:
+                vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
+
+        case SPRN_IVPR:
+                vcpu->arch.ivpr = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR0:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR1:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR2:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR3:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR4:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR5:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR6:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR7:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR8:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR9:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR10:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR11:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR12:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR13:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR14:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR15:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
+                break;
+
+        default:
+                return EMULATE_FAIL;
+        }
+
+        kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
+        return EMULATE_DONE;
+}
+
+int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
+{
+        switch (sprn) {
+        /* 440 */
+        case SPRN_MMUCR:
+                vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break;
+        case SPRN_CCR0:
+                vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break;
+        case SPRN_CCR1:
+                vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break;
+
+        /* Book E */
+        case SPRN_PID:
+                vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
+        case SPRN_IVPR:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
+        case SPRN_DEAR:
+                vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
+        case SPRN_ESR:
+                vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
+        case SPRN_DBCR0:
+                vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
+        case SPRN_DBCR1:
+                vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
+
+        case SPRN_IVOR0:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
+                break;
+        case SPRN_IVOR1:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
+                break;
+        case SPRN_IVOR2:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
+                break;
+        case SPRN_IVOR3:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
+                break;
+        case SPRN_IVOR4:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
+                break;
+        case SPRN_IVOR5:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
+                break;
+        case SPRN_IVOR6:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
+                break;
+        case SPRN_IVOR7:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
+                break;
+        case SPRN_IVOR8:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
+                break;
+        case SPRN_IVOR9:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
+                break;
+        case SPRN_IVOR10:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
+                break;
+        case SPRN_IVOR11:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
+                break;
+        case SPRN_IVOR12:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
+                break;
+        case SPRN_IVOR13:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
+                break;
+        case SPRN_IVOR14:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
+                break;
+        case SPRN_IVOR15:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
+                break;
+
+        default:
+                return EMULATE_FAIL;
+        }
+
+        kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
+        return EMULATE_DONE;
+}
+
diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c
index ad72c6f9811f..9a34b8edb9e2 100644
--- a/arch/powerpc/kvm/44x_tlb.c
+++ b/arch/powerpc/kvm/44x_tlb.c
@@ -22,20 +22,103 @@
 #include <linux/kvm.h>
 #include <linux/kvm_host.h>
 #include <linux/highmem.h>
+
+#include <asm/tlbflush.h>
 #include <asm/mmu-44x.h>
 #include <asm/kvm_ppc.h>
+#include <asm/kvm_44x.h>
+#include "timing.h"
 
 #include "44x_tlb.h"
 
+#ifndef PPC44x_TLBE_SIZE
+#define PPC44x_TLBE_SIZE        PPC44x_TLB_4K
+#endif
+
+#define PAGE_SIZE_4K (1<<12)
+#define PAGE_MASK_4K (~(PAGE_SIZE_4K - 1))
+
+#define PPC44x_TLB_UATTR_MASK \
+        (PPC44x_TLB_U0|PPC44x_TLB_U1|PPC44x_TLB_U2|PPC44x_TLB_U3)
 #define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW)
 #define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW)
 
-static unsigned int kvmppc_tlb_44x_pos;
+#ifdef DEBUG
+void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_44x_tlbe *tlbe;
+        int i;
+
+        printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
+        printk("| %2s | %3s | %8s | %8s | %8s |\n",
+                        "nr", "tid", "word0", "word1", "word2");
+
+        for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) {
+                tlbe = &vcpu_44x->guest_tlb[i];
+                if (tlbe->word0 & PPC44x_TLB_VALID)
+                        printk(" G%2d |  %02X | %08X | %08X | %08X |\n",
+                               i, tlbe->tid, tlbe->word0, tlbe->word1,
+                               tlbe->word2);
+        }
+}
+#endif
+
+static inline void kvmppc_44x_tlbie(unsigned int index)
+{
+        /* 0 <= index < 64, so the V bit is clear and we can use the index as
+         * word0. */
+        asm volatile(
+                "tlbwe %[index], %[index], 0\n"
+        :
+        : [index] "r"(index)
+        );
+}
+
+static inline void kvmppc_44x_tlbre(unsigned int index,
+                                    struct kvmppc_44x_tlbe *tlbe)
+{
+        asm volatile(
+                "tlbre %[word0], %[index], 0\n"
+                "mfspr %[tid], %[sprn_mmucr]\n"
+                "andi. %[tid], %[tid], 0xff\n"
+                "tlbre %[word1], %[index], 1\n"
+                "tlbre %[word2], %[index], 2\n"
+                : [word0] "=r"(tlbe->word0),
+                  [word1] "=r"(tlbe->word1),
+                  [word2] "=r"(tlbe->word2),
+                  [tid]   "=r"(tlbe->tid)
+                : [index] "r"(index),
+                  [sprn_mmucr] "i"(SPRN_MMUCR)
+                : "cc"
+        );
+}
+
+static inline void kvmppc_44x_tlbwe(unsigned int index,
+                                    struct kvmppc_44x_tlbe *stlbe)
+{
+        unsigned long tmp;
+
+        asm volatile(
+                "mfspr %[tmp], %[sprn_mmucr]\n"
+                "rlwimi %[tmp], %[tid], 0, 0xff\n"
+                "mtspr %[sprn_mmucr], %[tmp]\n"
+                "tlbwe %[word0], %[index], 0\n"
+                "tlbwe %[word1], %[index], 1\n"
+                "tlbwe %[word2], %[index], 2\n"
+                : [tmp]   "=&r"(tmp)
+                : [word0] "r"(stlbe->word0),
+                  [word1] "r"(stlbe->word1),
+                  [word2] "r"(stlbe->word2),
+                  [tid]   "r"(stlbe->tid),
+                  [index] "r"(index),
+                  [sprn_mmucr] "i"(SPRN_MMUCR)
+        );
+}
 
 static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
 {
-        /* Mask off reserved bits. */
-        attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_ATTR_MASK;
+        /* We only care about the guest's permission and user bits. */
+        attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_UATTR_MASK;
 
         if (!usermode) {
                 /* Guest is in supervisor mode, so we need to translate guest
@@ -47,18 +130,60 @@ static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
         /* Make sure host can always access this memory. */
         attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
 
+        /* WIMGE = 0b00100 */
+        attrib |= PPC44x_TLB_M;
+
         return attrib;
 }
 
+/* Load shadow TLB back into hardware. */
+void kvmppc_44x_tlb_load(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        int i;
+
+        for (i = 0; i <= tlb_44x_hwater; i++) {
+                struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
+
+                if (get_tlb_v(stlbe) && get_tlb_ts(stlbe))
+                        kvmppc_44x_tlbwe(i, stlbe);
+        }
+}
+
+static void kvmppc_44x_tlbe_set_modified(struct kvmppc_vcpu_44x *vcpu_44x,
+                                         unsigned int i)
+{
+        vcpu_44x->shadow_tlb_mod[i] = 1;
+}
+
+/* Save hardware TLB to the vcpu, and invalidate all guest mappings. */
+void kvmppc_44x_tlb_put(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        int i;
+
+        for (i = 0; i <= tlb_44x_hwater; i++) {
+                struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
+
+                if (vcpu_44x->shadow_tlb_mod[i])
+                        kvmppc_44x_tlbre(i, stlbe);
+
+                if (get_tlb_v(stlbe) && get_tlb_ts(stlbe))
+                        kvmppc_44x_tlbie(i);
+        }
+}
+
+
 /* Search the guest TLB for a matching entry. */
 int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
                          unsigned int as)
 {
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
         int i;
 
         /* XXX Replace loop with fancy data structures. */
-        for (i = 0; i < PPC44x_TLB_SIZE; i++) {
-                struct tlbe *tlbe = &vcpu->arch.guest_tlb[i];
+        for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) {
+                struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[i];
                 unsigned int tid;
 
                 if (eaddr < get_tlb_eaddr(tlbe))
@@ -83,78 +208,89 @@ int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
         return -1;
 }
 
-struct tlbe *kvmppc_44x_itlb_search(struct kvm_vcpu *vcpu, gva_t eaddr)
+int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
         unsigned int as = !!(vcpu->arch.msr & MSR_IS);
-        unsigned int index;
 
-        index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
-        if (index == -1)
-                return NULL;
-        return &vcpu->arch.guest_tlb[index];
+        return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
 }
 
-struct tlbe *kvmppc_44x_dtlb_search(struct kvm_vcpu *vcpu, gva_t eaddr)
+int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
         unsigned int as = !!(vcpu->arch.msr & MSR_DS);
-        unsigned int index;
 
-        index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
-        if (index == -1)
-                return NULL;
-        return &vcpu->arch.guest_tlb[index];
+        return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
 }
 
-static int kvmppc_44x_tlbe_is_writable(struct tlbe *tlbe)
+static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x,
+                                      unsigned int stlb_index)
 {
-        return tlbe->word2 & (PPC44x_TLB_SW|PPC44x_TLB_UW);
-}
+        struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[stlb_index];
 
-static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu,
-                                      unsigned int index)
-{
-        struct tlbe *stlbe = &vcpu->arch.shadow_tlb[index];
-        struct page *page = vcpu->arch.shadow_pages[index];
+        if (!ref->page)
+                return;
 
-        if (get_tlb_v(stlbe)) {
-                if (kvmppc_44x_tlbe_is_writable(stlbe))
-                        kvm_release_page_dirty(page);
-                else
-                        kvm_release_page_clean(page);
-        }
+        /* Discard from the TLB. */
+        /* Note: we could actually invalidate a host mapping, if the host overwrote
+         * this TLB entry since we inserted a guest mapping. */
+        kvmppc_44x_tlbie(stlb_index);
+
+        /* Now release the page. */
+        if (ref->writeable)
+                kvm_release_page_dirty(ref->page);
+        else
+                kvm_release_page_clean(ref->page);
+
+        ref->page = NULL;
+
+        /* XXX set tlb_44x_index to stlb_index? */
+
+        KVMTRACE_1D(STLB_INVAL, &vcpu_44x->vcpu, stlb_index, handler);
 }
 
 void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
 {
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
         int i;
 
         for (i = 0; i <= tlb_44x_hwater; i++)
-                kvmppc_44x_shadow_release(vcpu, i);
-}
-
-void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i)
-{
-    vcpu->arch.shadow_tlb_mod[i] = 1;
+                kvmppc_44x_shadow_release(vcpu_44x, i);
 }
 
-/* Caller must ensure that the specified guest TLB entry is safe to insert into
- * the shadow TLB. */
-void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
-                    u32 flags)
+/**
+ * kvmppc_mmu_map -- create a host mapping for guest memory
+ *
+ * If the guest wanted a larger page than the host supports, only the first
+ * host page is mapped here and the rest are demand faulted.
+ *
+ * If the guest wanted a smaller page than the host page size, we map only the
+ * guest-size page (i.e. not a full host page mapping).
+ *
+ * Caller must ensure that the specified guest TLB entry is safe to insert into
+ * the shadow TLB.
+ */
+void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, u64 asid,
+                    u32 flags, u32 max_bytes, unsigned int gtlb_index)
 {
+        struct kvmppc_44x_tlbe stlbe;
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        struct kvmppc_44x_shadow_ref *ref;
         struct page *new_page;
-        struct tlbe *stlbe;
         hpa_t hpaddr;
+        gfn_t gfn;
         unsigned int victim;
 
-        /* Future optimization: don't overwrite the TLB entry containing the
-         * current PC (or stack?). */
-        victim = kvmppc_tlb_44x_pos++;
-        if (kvmppc_tlb_44x_pos > tlb_44x_hwater)
-                kvmppc_tlb_44x_pos = 0;
-        stlbe = &vcpu->arch.shadow_tlb[victim];
+        /* Select TLB entry to clobber. Indirectly guard against races with the TLB
+         * miss handler by disabling interrupts. */
+        local_irq_disable();
+        victim = ++tlb_44x_index;
+        if (victim > tlb_44x_hwater)
+                victim = 0;
+        tlb_44x_index = victim;
+        local_irq_enable();
 
         /* Get reference to new page. */
+        gfn = gpaddr >> PAGE_SHIFT;
         new_page = gfn_to_page(vcpu->kvm, gfn);
         if (is_error_page(new_page)) {
                 printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
@@ -163,10 +299,8 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
         }
         hpaddr = page_to_phys(new_page);
 
-        /* Drop reference to old page. */
-        kvmppc_44x_shadow_release(vcpu, victim);
-
-        vcpu->arch.shadow_pages[victim] = new_page;
+        /* Invalidate any previous shadow mappings. */
+        kvmppc_44x_shadow_release(vcpu_44x, victim);
 
         /* XXX Make sure (va, size) doesn't overlap any other
          * entries. 440x6 user manual says the result would be
@@ -174,78 +308,193 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
 
         /* XXX what about AS? */
 
-        stlbe->tid = !(asid & 0xff);
-
         /* Force TS=1 for all guest mappings. */
-        /* For now we hardcode 4KB mappings, but it will be important to
-         * use host large pages in the future. */
-        stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS
-                       | PPC44x_TLB_4K;
-        stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
-        stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags,
-                                                    vcpu->arch.msr & MSR_PR);
-        kvmppc_tlbe_set_modified(vcpu, victim);
+        stlbe.word0 = PPC44x_TLB_VALID | PPC44x_TLB_TS;
+
+        if (max_bytes >= PAGE_SIZE) {
+                /* Guest mapping is larger than or equal to host page size. We can use
+                 * a "native" host mapping. */
+                stlbe.word0 |= (gvaddr & PAGE_MASK) | PPC44x_TLBE_SIZE;
+        } else {
+                /* Guest mapping is smaller than host page size. We must restrict the
+                 * size of the mapping to be at most the smaller of the two, but for
+                 * simplicity we fall back to a 4K mapping (this is probably what the
+                 * guest is using anyways). */
+                stlbe.word0 |= (gvaddr & PAGE_MASK_4K) | PPC44x_TLB_4K;
+
+                /* 'hpaddr' is a host page, which is larger than the mapping we're
+                 * inserting here. To compensate, we must add the in-page offset to the
+                 * sub-page. */
+                hpaddr |= gpaddr & (PAGE_MASK ^ PAGE_MASK_4K);
+        }
 
-        KVMTRACE_5D(STLB_WRITE, vcpu, victim,
-                        stlbe->tid, stlbe->word0, stlbe->word1, stlbe->word2,
-                        handler);
+        stlbe.word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
+        stlbe.word2 = kvmppc_44x_tlb_shadow_attrib(flags,
+                                                    vcpu->arch.msr & MSR_PR);
+        stlbe.tid = !(asid & 0xff);
+
+        /* Keep track of the reference so we can properly release it later. */
+        ref = &vcpu_44x->shadow_refs[victim];
+        ref->page = new_page;
+        ref->gtlb_index = gtlb_index;
+        ref->writeable = !!(stlbe.word2 & PPC44x_TLB_UW);
+        ref->tid = stlbe.tid;
+
+        /* Insert shadow mapping into hardware TLB. */
+        kvmppc_44x_tlbe_set_modified(vcpu_44x, victim);
+        kvmppc_44x_tlbwe(victim, &stlbe);
+        KVMTRACE_5D(STLB_WRITE, vcpu, victim, stlbe.tid, stlbe.word0, stlbe.word1,
+                    stlbe.word2, handler);
 }
 
-void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
-                           gva_t eend, u32 asid)
+/* For a particular guest TLB entry, invalidate the corresponding host TLB
+ * mappings and release the host pages. */
+static void kvmppc_44x_invalidate(struct kvm_vcpu *vcpu,
+                                  unsigned int gtlb_index)
 {
-        unsigned int pid = !(asid & 0xff);
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
         int i;
 
-        /* XXX Replace loop with fancy data structures. */
-        for (i = 0; i <= tlb_44x_hwater; i++) {
-                struct tlbe *stlbe = &vcpu->arch.shadow_tlb[i];
-                unsigned int tid;
+        for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) {
+                struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i];
+                if (ref->gtlb_index == gtlb_index)
+                        kvmppc_44x_shadow_release(vcpu_44x, i);
+        }
+}
 
-                if (!get_tlb_v(stlbe))
-                        continue;
+void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
+{
+        vcpu->arch.shadow_pid = !usermode;
+}
 
-                if (eend < get_tlb_eaddr(stlbe))
-                        continue;
+void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        int i;
 
-                if (eaddr > get_tlb_end(stlbe))
-                        continue;
+        if (unlikely(vcpu->arch.pid == new_pid))
+                return;
 
-                tid = get_tlb_tid(stlbe);
-                if (tid && (tid != pid))
-                        continue;
+        vcpu->arch.pid = new_pid;
 
-                kvmppc_44x_shadow_release(vcpu, i);
-                stlbe->word0 = 0;
-                kvmppc_tlbe_set_modified(vcpu, i);
-                KVMTRACE_5D(STLB_INVAL, vcpu, i,
-                                stlbe->tid, stlbe->word0, stlbe->word1,
-                                stlbe->word2, handler);
+        /* Guest userspace runs with TID=0 mappings and PID=0, to make sure it
+         * can't access guest kernel mappings (TID=1). When we switch to a new
+         * guest PID, which will also use host PID=0, we must discard the old guest
+         * userspace mappings. */
+        for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) {
+                struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i];
+
+                if (ref->tid == 0)
+                        kvmppc_44x_shadow_release(vcpu_44x, i);
         }
 }
 
-/* Invalidate all mappings on the privilege switch after PID has been changed.
- * The guest always runs with PID=1, so we must clear the entire TLB when
- * switching address spaces. */
-void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
+static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
+                             const struct kvmppc_44x_tlbe *tlbe)
 {
-        int i;
+        gpa_t gpa;
 
-        if (vcpu->arch.swap_pid) {
-                /* XXX Replace loop with fancy data structures. */
-                for (i = 0; i <= tlb_44x_hwater; i++) {
-                        struct tlbe *stlbe = &vcpu->arch.shadow_tlb[i];
-
-                        /* Future optimization: clear only userspace mappings. */
-                        kvmppc_44x_shadow_release(vcpu, i);
-                        stlbe->word0 = 0;
-                        kvmppc_tlbe_set_modified(vcpu, i);
-                        KVMTRACE_5D(STLB_INVAL, vcpu, i,
-                                    stlbe->tid, stlbe->word0, stlbe->word1,
-                                    stlbe->word2, handler);
-                }
-                vcpu->arch.swap_pid = 0;
+        if (!get_tlb_v(tlbe))
+                return 0;
+
+        /* Does it match current guest AS? */
+        /* XXX what about IS != DS? */
+        if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
+                return 0;
+
+        gpa = get_tlb_raddr(tlbe);
+        if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
+                /* Mapping is not for RAM. */
+                return 0;
+
+        return 1;
+}
+
+int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        struct kvmppc_44x_tlbe *tlbe;
+        unsigned int gtlb_index;
+
+        gtlb_index = vcpu->arch.gpr[ra];
+        if (gtlb_index > KVM44x_GUEST_TLB_SIZE) {
+                printk("%s: index %d\n", __func__, gtlb_index);
+                kvmppc_dump_vcpu(vcpu);
+                return EMULATE_FAIL;
         }
 
-        vcpu->arch.shadow_pid = !usermode;
+        tlbe = &vcpu_44x->guest_tlb[gtlb_index];
+
+        /* Invalidate shadow mappings for the about-to-be-clobbered TLB entry. */
+        if (tlbe->word0 & PPC44x_TLB_VALID)
+                kvmppc_44x_invalidate(vcpu, gtlb_index);
+
+        switch (ws) {
+        case PPC44x_TLB_PAGEID:
+                tlbe->tid = get_mmucr_stid(vcpu);
+                tlbe->word0 = vcpu->arch.gpr[rs];
+                break;
+
+        case PPC44x_TLB_XLAT:
+                tlbe->word1 = vcpu->arch.gpr[rs];
+                break;
+
+        case PPC44x_TLB_ATTRIB:
+                tlbe->word2 = vcpu->arch.gpr[rs];
+                break;
+
+        default:
+                return EMULATE_FAIL;
+        }
+
+        if (tlbe_is_host_safe(vcpu, tlbe)) {
+                u64 asid;
+                gva_t eaddr;
+                gpa_t gpaddr;
+                u32 flags;
+                u32 bytes;
+
+                eaddr = get_tlb_eaddr(tlbe);
+                gpaddr = get_tlb_raddr(tlbe);
+
+                /* Use the advertised page size to mask effective and real addrs. */
+                bytes = get_tlb_bytes(tlbe);
+                eaddr &= ~(bytes - 1);
+                gpaddr &= ~(bytes - 1);
+
+                asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
+                flags = tlbe->word2 & 0xffff;
+
+                kvmppc_mmu_map(vcpu, eaddr, gpaddr, asid, flags, bytes, gtlb_index);
+        }
+
+        KVMTRACE_5D(GTLB_WRITE, vcpu, gtlb_index, tlbe->tid, tlbe->word0,
+                    tlbe->word1, tlbe->word2, handler);
+
+        kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
+        return EMULATE_DONE;
+}
+
+int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, u8 rc)
+{
+        u32 ea;
+        int gtlb_index;
+        unsigned int as = get_mmucr_sts(vcpu);
+        unsigned int pid = get_mmucr_stid(vcpu);
+
+        ea = vcpu->arch.gpr[rb];
+        if (ra)
+                ea += vcpu->arch.gpr[ra];
+
+        gtlb_index = kvmppc_44x_tlb_index(vcpu, ea, pid, as);
+        if (rc) {
+                if (gtlb_index < 0)
+                        vcpu->arch.cr &= ~0x20000000;
+                else
+                        vcpu->arch.cr |= 0x20000000;
+        }
+        vcpu->arch.gpr[rt] = gtlb_index;
+
+        kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
+        return EMULATE_DONE;
 }
diff --git a/arch/powerpc/kvm/44x_tlb.h b/arch/powerpc/kvm/44x_tlb.h
index 2ccd46b6f6b7..772191f29e62 100644
--- a/arch/powerpc/kvm/44x_tlb.h
+++ b/arch/powerpc/kvm/44x_tlb.h
@@ -25,48 +25,52 @@
 
 extern int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr,
                                 unsigned int pid, unsigned int as);
-extern struct tlbe *kvmppc_44x_dtlb_search(struct kvm_vcpu *vcpu, gva_t eaddr);
-extern struct tlbe *kvmppc_44x_itlb_search(struct kvm_vcpu *vcpu, gva_t eaddr);
+extern int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
+extern int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
+
+extern int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb,
+                                 u8 rc);
+extern int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws);
 
 /* TLB helper functions */
-static inline unsigned int get_tlb_size(const struct tlbe *tlbe)
+static inline unsigned int get_tlb_size(const struct kvmppc_44x_tlbe *tlbe)
 {
         return (tlbe->word0 >> 4) & 0xf;
 }
 
-static inline gva_t get_tlb_eaddr(const struct tlbe *tlbe)
+static inline gva_t get_tlb_eaddr(const struct kvmppc_44x_tlbe *tlbe)
 {
         return tlbe->word0 & 0xfffffc00;
 }
 
-static inline gva_t get_tlb_bytes(const struct tlbe *tlbe)
+static inline gva_t get_tlb_bytes(const struct kvmppc_44x_tlbe *tlbe)
 {
         unsigned int pgsize = get_tlb_size(tlbe);
         return 1 << 10 << (pgsize << 1);
 }
 
-static inline gva_t get_tlb_end(const struct tlbe *tlbe)
+static inline gva_t get_tlb_end(const struct kvmppc_44x_tlbe *tlbe)
 {
         return get_tlb_eaddr(tlbe) + get_tlb_bytes(tlbe) - 1;
 }
 
-static inline u64 get_tlb_raddr(const struct tlbe *tlbe)
+static inline u64 get_tlb_raddr(const struct kvmppc_44x_tlbe *tlbe)
 {
         u64 word1 = tlbe->word1;
         return ((word1 & 0xf) << 32) | (word1 & 0xfffffc00);
 }
 
-static inline unsigned int get_tlb_tid(const struct tlbe *tlbe)
+static inline unsigned int get_tlb_tid(const struct kvmppc_44x_tlbe *tlbe)
 {
         return tlbe->tid & 0xff;
 }
 
-static inline unsigned int get_tlb_ts(const struct tlbe *tlbe)
+static inline unsigned int get_tlb_ts(const struct kvmppc_44x_tlbe *tlbe)
 {
         return (tlbe->word0 >> 8) & 0x1;
 }
 
-static inline unsigned int get_tlb_v(const struct tlbe *tlbe)
+static inline unsigned int get_tlb_v(const struct kvmppc_44x_tlbe *tlbe)
 {
         return (tlbe->word0 >> 9) & 0x1;
 }
@@ -81,7 +85,7 @@ static inline unsigned int get_mmucr_sts(const struct kvm_vcpu *vcpu)
         return (vcpu->arch.mmucr >> 16) & 0x1;
 }
 
-static inline gpa_t tlb_xlate(struct tlbe *tlbe, gva_t eaddr)
+static inline gpa_t tlb_xlate(struct kvmppc_44x_tlbe *tlbe, gva_t eaddr)
 {
         unsigned int pgmask = get_tlb_bytes(tlbe) - 1;
 
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 53aaa66b25e5..6dbdc4817d80 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -15,27 +15,33 @@ menuconfig VIRTUALIZATION
 if VIRTUALIZATION
 
 config KVM
-        bool "Kernel-based Virtual Machine (KVM) support"
-        depends on 44x && EXPERIMENTAL
+        bool
         select PREEMPT_NOTIFIERS
         select ANON_INODES
-        # We can only run on Book E hosts so far
-        select KVM_BOOKE_HOST
+
+config KVM_440
+        bool "KVM support for PowerPC 440 processors"
+        depends on EXPERIMENTAL && 44x
+        select KVM
         ---help---
-          Support hosting virtualized guest machines. You will also
-          need to select one or more of the processor modules below.
+          Support running unmodified 440 guest kernels in virtual machines on
+          440 host processors.
 
           This module provides access to the hardware capabilities through
           a character device node named /dev/kvm.
 
           If unsure, say N.
 
-config KVM_BOOKE_HOST
-        bool "KVM host support for Book E PowerPC processors"
-        depends on KVM && 44x
+config KVM_EXIT_TIMING
+        bool "Detailed exit timing"
+        depends on KVM
         ---help---
-          Provides host support for KVM on Book E PowerPC processors. Currently
-          this works on 440 processors only.
+          Calculate elapsed time for every exit/enter cycle. A per-vcpu
+          report is available in debugfs kvm/vm#_vcpu#_timing.
+          The overhead is relatively small, however it is not recommended for
+          production environments.
+
+          If unsure, say N.
 
 config KVM_TRACE
         bool "KVM trace support"
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index 2a5d4397ac4b..df7ba59e6d53 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -8,10 +8,16 @@ common-objs-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o)
 
 common-objs-$(CONFIG_KVM_TRACE)  += $(addprefix ../../../virt/kvm/, kvm_trace.o)
 
-kvm-objs := $(common-objs-y) powerpc.o emulate.o booke_guest.o
+kvm-objs := $(common-objs-y) powerpc.o emulate.o
+obj-$(CONFIG_KVM_EXIT_TIMING) += timing.o
 obj-$(CONFIG_KVM) += kvm.o
 
 AFLAGS_booke_interrupts.o := -I$(obj)
 
-kvm-booke-host-objs := booke_host.o booke_interrupts.o 44x_tlb.o
-obj-$(CONFIG_KVM_BOOKE_HOST) += kvm-booke-host.o
+kvm-440-objs := \
+        booke.o \
+        booke_interrupts.o \
+        44x.o \
+        44x_tlb.o \
+        44x_emulate.o
+obj-$(CONFIG_KVM_440) += kvm-440.o
diff --git a/arch/powerpc/kvm/booke_guest.c b/arch/powerpc/kvm/booke.c
index 7b2591e26bae..35485dd6927e 100644
--- a/arch/powerpc/kvm/booke_guest.c
+++ b/arch/powerpc/kvm/booke.c
@@ -24,21 +24,26 @@
 #include <linux/module.h>
 #include <linux/vmalloc.h>
 #include <linux/fs.h>
+
 #include <asm/cputable.h>
 #include <asm/uaccess.h>
 #include <asm/kvm_ppc.h>
+#include "timing.h"
+#include <asm/cacheflush.h>
+#include <asm/kvm_44x.h>
 
+#include "booke.h"
 #include "44x_tlb.h"
 
+unsigned long kvmppc_booke_handlers;
+
 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
 
 struct kvm_stats_debugfs_item debugfs_entries[] = {
-        { "exits",      VCPU_STAT(sum_exits) },
         { "mmio",       VCPU_STAT(mmio_exits) },
         { "dcr",        VCPU_STAT(dcr_exits) },
         { "sig",        VCPU_STAT(signal_exits) },
-        { "light",      VCPU_STAT(light_exits) },
         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
@@ -53,103 +58,19 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
         { NULL }
 };
 
-static const u32 interrupt_msr_mask[16] = {
-        [BOOKE_INTERRUPT_CRITICAL]      = MSR_ME,
-        [BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
-        [BOOKE_INTERRUPT_DATA_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_INST_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_EXTERNAL]      = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_ALIGNMENT]     = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_PROGRAM]       = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_FP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_SYSCALL]       = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_AP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_DECREMENTER]   = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_FIT]           = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_WATCHDOG]      = MSR_ME,
-        [BOOKE_INTERRUPT_DTLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_ITLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
-        [BOOKE_INTERRUPT_DEBUG]         = MSR_ME,
-};
-
-const unsigned char exception_priority[] = {
-        [BOOKE_INTERRUPT_DATA_STORAGE] = 0,
-        [BOOKE_INTERRUPT_INST_STORAGE] = 1,
-        [BOOKE_INTERRUPT_ALIGNMENT] = 2,
-        [BOOKE_INTERRUPT_PROGRAM] = 3,
-        [BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
-        [BOOKE_INTERRUPT_SYSCALL] = 5,
-        [BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
-        [BOOKE_INTERRUPT_DTLB_MISS] = 7,
-        [BOOKE_INTERRUPT_ITLB_MISS] = 8,
-        [BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
-        [BOOKE_INTERRUPT_DEBUG] = 10,
-        [BOOKE_INTERRUPT_CRITICAL] = 11,
-        [BOOKE_INTERRUPT_WATCHDOG] = 12,
-        [BOOKE_INTERRUPT_EXTERNAL] = 13,
-        [BOOKE_INTERRUPT_FIT] = 14,
-        [BOOKE_INTERRUPT_DECREMENTER] = 15,
-};
-
-const unsigned char priority_exception[] = {
-        BOOKE_INTERRUPT_DATA_STORAGE,
-        BOOKE_INTERRUPT_INST_STORAGE,
-        BOOKE_INTERRUPT_ALIGNMENT,
-        BOOKE_INTERRUPT_PROGRAM,
-        BOOKE_INTERRUPT_FP_UNAVAIL,
-        BOOKE_INTERRUPT_SYSCALL,
-        BOOKE_INTERRUPT_AP_UNAVAIL,
-        BOOKE_INTERRUPT_DTLB_MISS,
-        BOOKE_INTERRUPT_ITLB_MISS,
-        BOOKE_INTERRUPT_MACHINE_CHECK,
-        BOOKE_INTERRUPT_DEBUG,
-        BOOKE_INTERRUPT_CRITICAL,
-        BOOKE_INTERRUPT_WATCHDOG,
-        BOOKE_INTERRUPT_EXTERNAL,
-        BOOKE_INTERRUPT_FIT,
-        BOOKE_INTERRUPT_DECREMENTER,
-};
-
-
-void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
-{
-        struct tlbe *tlbe;
-        int i;
-
-        printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
-        printk("| %2s | %3s | %8s | %8s | %8s |\n",
-                        "nr", "tid", "word0", "word1", "word2");
-
-        for (i = 0; i < PPC44x_TLB_SIZE; i++) {
-                tlbe = &vcpu->arch.guest_tlb[i];
-                if (tlbe->word0 & PPC44x_TLB_VALID)
-                        printk(" G%2d |  %02X | %08X | %08X | %08X |\n",
-                               i, tlbe->tid, tlbe->word0, tlbe->word1,
-                               tlbe->word2);
-        }
-
-        for (i = 0; i < PPC44x_TLB_SIZE; i++) {
-                tlbe = &vcpu->arch.shadow_tlb[i];
-                if (tlbe->word0 & PPC44x_TLB_VALID)
-                        printk(" S%2d | %02X | %08X | %08X | %08X |\n",
-                               i, tlbe->tid, tlbe->word0, tlbe->word1,
-                               tlbe->word2);
-        }
-}
-
 /* TODO: use vcpu_printf() */
 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
 {
         int i;
 
-        printk("pc:   %08x msr:  %08x\n", vcpu->arch.pc, vcpu->arch.msr);
-        printk("lr:   %08x ctr:  %08x\n", vcpu->arch.lr, vcpu->arch.ctr);
-        printk("srr0: %08x srr1: %08x\n", vcpu->arch.srr0, vcpu->arch.srr1);
+        printk("pc:   %08lx msr:  %08lx\n", vcpu->arch.pc, vcpu->arch.msr);
+        printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
+        printk("srr0: %08lx srr1: %08lx\n", vcpu->arch.srr0, vcpu->arch.srr1);
 
         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
 
         for (i = 0; i < 32; i += 4) {
-                printk("gpr%02d: %08x %08x %08x %08x\n", i,
+                printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
                        vcpu->arch.gpr[i],
                        vcpu->arch.gpr[i+1],
                        vcpu->arch.gpr[i+2],
@@ -157,69 +78,96 @@ void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
         }
 }
 
-/* Check if we are ready to deliver the interrupt */
-static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
+static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
+                                       unsigned int priority)
 {
-        int r;
+        set_bit(priority, &vcpu->arch.pending_exceptions);
+}
 
-        switch (interrupt) {
-        case BOOKE_INTERRUPT_CRITICAL:
-                r = vcpu->arch.msr & MSR_CE;
-                break;
-        case BOOKE_INTERRUPT_MACHINE_CHECK:
-                r = vcpu->arch.msr & MSR_ME;
-                break;
-        case BOOKE_INTERRUPT_EXTERNAL:
-                r = vcpu->arch.msr & MSR_EE;
+void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
+{
+        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
+}
+
+void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
+{
+        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
+}
+
+int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
+{
+        return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
+}
+
+void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
+                                struct kvm_interrupt *irq)
+{
+        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_EXTERNAL);
+}
+
+/* Deliver the interrupt of the corresponding priority, if possible. */
+static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
+                                        unsigned int priority)
+{
+        int allowed = 0;
+        ulong msr_mask;
+
+        switch (priority) {
+        case BOOKE_IRQPRIO_PROGRAM:
+        case BOOKE_IRQPRIO_DTLB_MISS:
+        case BOOKE_IRQPRIO_ITLB_MISS:
+        case BOOKE_IRQPRIO_SYSCALL:
+        case BOOKE_IRQPRIO_DATA_STORAGE:
+        case BOOKE_IRQPRIO_INST_STORAGE:
+        case BOOKE_IRQPRIO_FP_UNAVAIL:
+        case BOOKE_IRQPRIO_AP_UNAVAIL:
+        case BOOKE_IRQPRIO_ALIGNMENT:
+                allowed = 1;
+                msr_mask = MSR_CE|MSR_ME|MSR_DE;
                 break;
-        case BOOKE_INTERRUPT_DECREMENTER:
-                r = vcpu->arch.msr & MSR_EE;
+        case BOOKE_IRQPRIO_CRITICAL:
+        case BOOKE_IRQPRIO_WATCHDOG:
+                allowed = vcpu->arch.msr & MSR_CE;
+                msr_mask = MSR_ME;
                 break;
-        case BOOKE_INTERRUPT_FIT:
-                r = vcpu->arch.msr & MSR_EE;
+        case BOOKE_IRQPRIO_MACHINE_CHECK:
+                allowed = vcpu->arch.msr & MSR_ME;
+                msr_mask = 0;
                 break;
-        case BOOKE_INTERRUPT_WATCHDOG:
-                r = vcpu->arch.msr & MSR_CE;
+        case BOOKE_IRQPRIO_EXTERNAL:
+        case BOOKE_IRQPRIO_DECREMENTER:
+        case BOOKE_IRQPRIO_FIT:
+                allowed = vcpu->arch.msr & MSR_EE;
+                msr_mask = MSR_CE|MSR_ME|MSR_DE;
                 break;
-        case BOOKE_INTERRUPT_DEBUG:
-                r = vcpu->arch.msr & MSR_DE;
+        case BOOKE_IRQPRIO_DEBUG:
+                allowed = vcpu->arch.msr & MSR_DE;
+                msr_mask = MSR_ME;
                 break;
-        default:
-                r = 1;
         }
 
-        return r;
-}
+        if (allowed) {
+                vcpu->arch.srr0 = vcpu->arch.pc;
+                vcpu->arch.srr1 = vcpu->arch.msr;
+                vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
+                kvmppc_set_msr(vcpu, vcpu->arch.msr & msr_mask);
 
-static void kvmppc_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
-{
-        switch (interrupt) {
-        case BOOKE_INTERRUPT_DECREMENTER:
-                vcpu->arch.tsr |= TSR_DIS;
-                break;
+                clear_bit(priority, &vcpu->arch.pending_exceptions);
         }
 
-        vcpu->arch.srr0 = vcpu->arch.pc;
-        vcpu->arch.srr1 = vcpu->arch.msr;
-        vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
-        kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
+        return allowed;
 }
 
 /* Check pending exceptions and deliver one, if possible. */
-void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu)
+void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
 {
         unsigned long *pending = &vcpu->arch.pending_exceptions;
-        unsigned int exception;
         unsigned int priority;
 
-        priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
+        priority = __ffs(*pending);
         while (priority <= BOOKE_MAX_INTERRUPT) {
-                exception = priority_exception[priority];
-                if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
-                        kvmppc_clear_exception(vcpu, exception);
-                        kvmppc_deliver_interrupt(vcpu, exception);
+                if (kvmppc_booke_irqprio_deliver(vcpu, priority))
                         break;
-                }
 
                 priority = find_next_bit(pending,
                                          BITS_PER_BYTE * sizeof(*pending),
@@ -238,6 +186,9 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
         enum emulation_result er;
         int r = RESUME_HOST;
 
+        /* update before a new last_exit_type is rewritten */
+        kvmppc_update_timing_stats(vcpu);
+
         local_irq_enable();
 
         run->exit_reason = KVM_EXIT_UNKNOWN;
@@ -251,21 +202,19 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 break;
 
         case BOOKE_INTERRUPT_EXTERNAL:
+                kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
+                if (need_resched())
+                        cond_resched();
+                r = RESUME_GUEST;
+                break;
+
         case BOOKE_INTERRUPT_DECREMENTER:
                 /* Since we switched IVPR back to the host's value, the host
                  * handled this interrupt the moment we enabled interrupts.
                  * Now we just offer it a chance to reschedule the guest. */
-
-                /* XXX At this point the TLB still holds our shadow TLB, so if
-                 * we do reschedule the host will fault over it. Perhaps we
-                 * should politely restore the host's entries to minimize
-                 * misses before ceding control. */
+                kvmppc_account_exit(vcpu, DEC_EXITS);
                 if (need_resched())
                         cond_resched();
-                if (exit_nr == BOOKE_INTERRUPT_DECREMENTER)
-                        vcpu->stat.dec_exits++;
-                else
-                        vcpu->stat.ext_intr_exits++;
                 r = RESUME_GUEST;
                 break;
 
@@ -274,17 +223,19 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                         /* Program traps generated by user-level software must be handled
                          * by the guest kernel. */
                         vcpu->arch.esr = vcpu->arch.fault_esr;
-                        kvmppc_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
+                        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
                         r = RESUME_GUEST;
+                        kvmppc_account_exit(vcpu, USR_PR_INST);
                         break;
                 }
 
                 er = kvmppc_emulate_instruction(run, vcpu);
                 switch (er) {
                 case EMULATE_DONE:
+                        /* don't overwrite subtypes, just account kvm_stats */
+                        kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
                         /* Future optimization: only reload non-volatiles if
                          * they were actually modified by emulation. */
-                        vcpu->stat.emulated_inst_exits++;
                         r = RESUME_GUEST_NV;
                         break;
                 case EMULATE_DO_DCR:
@@ -293,7 +244,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                         break;
                 case EMULATE_FAIL:
                         /* XXX Deliver Program interrupt to guest. */
-                        printk(KERN_CRIT "%s: emulation at %x failed (%08x)\n",
+                        printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
                                __func__, vcpu->arch.pc, vcpu->arch.last_inst);
                         /* For debugging, encode the failing instruction and
                          * report it to userspace. */
@@ -307,48 +258,53 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 break;
 
         case BOOKE_INTERRUPT_FP_UNAVAIL:
-                kvmppc_queue_exception(vcpu, exit_nr);
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
+                kvmppc_account_exit(vcpu, FP_UNAVAIL);
                 r = RESUME_GUEST;
                 break;
 
         case BOOKE_INTERRUPT_DATA_STORAGE:
                 vcpu->arch.dear = vcpu->arch.fault_dear;
                 vcpu->arch.esr = vcpu->arch.fault_esr;
-                kvmppc_queue_exception(vcpu, exit_nr);
-                vcpu->stat.dsi_exits++;
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
+                kvmppc_account_exit(vcpu, DSI_EXITS);
                 r = RESUME_GUEST;
                 break;
 
         case BOOKE_INTERRUPT_INST_STORAGE:
                 vcpu->arch.esr = vcpu->arch.fault_esr;
-                kvmppc_queue_exception(vcpu, exit_nr);
-                vcpu->stat.isi_exits++;
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
+                kvmppc_account_exit(vcpu, ISI_EXITS);
                 r = RESUME_GUEST;
                 break;
 
         case BOOKE_INTERRUPT_SYSCALL:
-                kvmppc_queue_exception(vcpu, exit_nr);
-                vcpu->stat.syscall_exits++;
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
+                kvmppc_account_exit(vcpu, SYSCALL_EXITS);
                 r = RESUME_GUEST;
                 break;
 
+        /* XXX move to a 440-specific file. */
         case BOOKE_INTERRUPT_DTLB_MISS: {
-                struct tlbe *gtlbe;
+                struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+                struct kvmppc_44x_tlbe *gtlbe;
                 unsigned long eaddr = vcpu->arch.fault_dear;
+                int gtlb_index;
                 gfn_t gfn;
 
                 /* Check the guest TLB. */
-                gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
-                if (!gtlbe) {
+                gtlb_index = kvmppc_44x_dtlb_index(vcpu, eaddr);
+                if (gtlb_index < 0) {
                         /* The guest didn't have a mapping for it. */
-                        kvmppc_queue_exception(vcpu, exit_nr);
+                        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
                         vcpu->arch.dear = vcpu->arch.fault_dear;
                         vcpu->arch.esr = vcpu->arch.fault_esr;
-                        vcpu->stat.dtlb_real_miss_exits++;
+                        kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
                         r = RESUME_GUEST;
                         break;
                 }
 
+                gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
                 vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
                 gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
 
@@ -359,38 +315,45 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          * b) the guest used a large mapping which we're faking
                          * Either way, we need to satisfy the fault without
                          * invoking the guest. */
-                        kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
-                                       gtlbe->word2);
-                        vcpu->stat.dtlb_virt_miss_exits++;
+                        kvmppc_mmu_map(vcpu, eaddr, vcpu->arch.paddr_accessed, gtlbe->tid,
+                                       gtlbe->word2, get_tlb_bytes(gtlbe), gtlb_index);
+                        kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
                         r = RESUME_GUEST;
                 } else {
                         /* Guest has mapped and accessed a page which is not
                          * actually RAM. */
                         r = kvmppc_emulate_mmio(run, vcpu);
+                        kvmppc_account_exit(vcpu, MMIO_EXITS);
                 }
 
                 break;
         }
 
+        /* XXX move to a 440-specific file. */
         case BOOKE_INTERRUPT_ITLB_MISS: {
-                struct tlbe *gtlbe;
+                struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+                struct kvmppc_44x_tlbe *gtlbe;
                 unsigned long eaddr = vcpu->arch.pc;
+                gpa_t gpaddr;
                 gfn_t gfn;
+                int gtlb_index;
 
                 r = RESUME_GUEST;
 
                 /* Check the guest TLB. */
-                gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
-                if (!gtlbe) {
+                gtlb_index = kvmppc_44x_itlb_index(vcpu, eaddr);
+                if (gtlb_index < 0) {
                         /* The guest didn't have a mapping for it. */
-                        kvmppc_queue_exception(vcpu, exit_nr);
-                        vcpu->stat.itlb_real_miss_exits++;
+                        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
+                        kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
                         break;
                 }
 
-                vcpu->stat.itlb_virt_miss_exits++;
+                kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
 
-                gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT;
+                gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
+                gpaddr = tlb_xlate(gtlbe, eaddr);
+                gfn = gpaddr >> PAGE_SHIFT;
 
                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
                         /* The guest TLB had a mapping, but the shadow TLB
@@ -399,12 +362,11 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          * b) the guest used a large mapping which we're faking
                          * Either way, we need to satisfy the fault without
                          * invoking the guest. */
-                        kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
-                                       gtlbe->word2);
+                        kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlbe->tid,
+                                       gtlbe->word2, get_tlb_bytes(gtlbe), gtlb_index);
                 } else {
                         /* Guest mapped and leaped at non-RAM! */
-                        kvmppc_queue_exception(vcpu,
-                                               BOOKE_INTERRUPT_MACHINE_CHECK);
+                        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
                 }
 
                 break;
@@ -421,6 +383,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 mtspr(SPRN_DBSR, dbsr);
 
                 run->exit_reason = KVM_EXIT_DEBUG;
+                kvmppc_account_exit(vcpu, DEBUG_EXITS);
                 r = RESUME_HOST;
                 break;
         }
@@ -432,10 +395,8 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
 
         local_irq_disable();
 
-        kvmppc_check_and_deliver_interrupts(vcpu);
+        kvmppc_core_deliver_interrupts(vcpu);
 
-        /* Do some exit accounting. */
-        vcpu->stat.sum_exits++;
         if (!(r & RESUME_HOST)) {
                 /* To avoid clobbering exit_reason, only check for signals if
                  * we aren't already exiting to userspace for some other
@@ -443,22 +404,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 if (signal_pending(current)) {
                         run->exit_reason = KVM_EXIT_INTR;
                         r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
-
-                        vcpu->stat.signal_exits++;
-                } else {
-                        vcpu->stat.light_exits++;
-                }
-        } else {
-                switch (run->exit_reason) {
-                case KVM_EXIT_MMIO:
-                        vcpu->stat.mmio_exits++;
-                        break;
-                case KVM_EXIT_DCR:
-                        vcpu->stat.dcr_exits++;
-                        break;
-                case KVM_EXIT_INTR:
-                        vcpu->stat.signal_exits++;
-                        break;
+                        kvmppc_account_exit(vcpu, SIGNAL_EXITS);
                 }
         }
 
@@ -468,20 +414,6 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
 {
-        struct tlbe *tlbe = &vcpu->arch.guest_tlb[0];
-
-        tlbe->tid = 0;
-        tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
-        tlbe->word1 = 0;
-        tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
-
-        tlbe++;
-        tlbe->tid = 0;
-        tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
-        tlbe->word1 = 0xef600000;
-        tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
-                      | PPC44x_TLB_I | PPC44x_TLB_G;
-
         vcpu->arch.pc = 0;
         vcpu->arch.msr = 0;
         vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
@@ -492,12 +424,9 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
          * before it's programmed its own IVPR. */
         vcpu->arch.ivpr = 0x55550000;
 
-        /* Since the guest can directly access the timebase, it must know the
-         * real timebase frequency. Accordingly, it must see the state of
-         * CCR1[TCS]. */
-        vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
+        kvmppc_init_timing_stats(vcpu);
 
-        return 0;
+        return kvmppc_core_vcpu_setup(vcpu);
 }
 
 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
@@ -536,7 +465,7 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         vcpu->arch.ctr = regs->ctr;
         vcpu->arch.lr = regs->lr;
         vcpu->arch.xer = regs->xer;
-        vcpu->arch.msr = regs->msr;
+        kvmppc_set_msr(vcpu, regs->msr);
         vcpu->arch.srr0 = regs->srr0;
         vcpu->arch.srr1 = regs->srr1;
         vcpu->arch.sprg0 = regs->sprg0;
@@ -575,31 +504,62 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
         return -ENOTSUPP;
 }
 
-/* 'linear_address' is actually an encoding of AS|PID|EADDR . */
 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
                                   struct kvm_translation *tr)
 {
-        struct tlbe *gtlbe;
-        int index;
-        gva_t eaddr;
-        u8 pid;
-        u8 as;
-
-        eaddr = tr->linear_address;
-        pid = (tr->linear_address >> 32) & 0xff;
-        as = (tr->linear_address >> 40) & 0x1;
-
-        index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
-        if (index == -1) {
-                tr->valid = 0;
-                return 0;
-        }
+        return kvmppc_core_vcpu_translate(vcpu, tr);
+}
 
-        gtlbe = &vcpu->arch.guest_tlb[index];
+int kvmppc_booke_init(void)
+{
+        unsigned long ivor[16];
+        unsigned long max_ivor = 0;
+        int i;
 
-        tr->physical_address = tlb_xlate(gtlbe, eaddr);
-        /* XXX what does "writeable" and "usermode" even mean? */
-        tr->valid = 1;
+        /* We install our own exception handlers by hijacking IVPR. IVPR must
+         * be 16-bit aligned, so we need a 64KB allocation. */
+        kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
+                                                 VCPU_SIZE_ORDER);
+        if (!kvmppc_booke_handlers)
+                return -ENOMEM;
+
+        /* XXX make sure our handlers are smaller than Linux's */
+
+        /* Copy our interrupt handlers to match host IVORs. That way we don't
+         * have to swap the IVORs on every guest/host transition. */
+        ivor[0] = mfspr(SPRN_IVOR0);
+        ivor[1] = mfspr(SPRN_IVOR1);
+        ivor[2] = mfspr(SPRN_IVOR2);
+        ivor[3] = mfspr(SPRN_IVOR3);
+        ivor[4] = mfspr(SPRN_IVOR4);
+        ivor[5] = mfspr(SPRN_IVOR5);
+        ivor[6] = mfspr(SPRN_IVOR6);
+        ivor[7] = mfspr(SPRN_IVOR7);
+        ivor[8] = mfspr(SPRN_IVOR8);
+        ivor[9] = mfspr(SPRN_IVOR9);
+        ivor[10] = mfspr(SPRN_IVOR10);
+        ivor[11] = mfspr(SPRN_IVOR11);
+        ivor[12] = mfspr(SPRN_IVOR12);
+        ivor[13] = mfspr(SPRN_IVOR13);
+        ivor[14] = mfspr(SPRN_IVOR14);
+        ivor[15] = mfspr(SPRN_IVOR15);
+
+        for (i = 0; i < 16; i++) {
+                if (ivor[i] > max_ivor)
+                        max_ivor = ivor[i];
+
+                memcpy((void *)kvmppc_booke_handlers + ivor[i],
+                       kvmppc_handlers_start + i * kvmppc_handler_len,
+                       kvmppc_handler_len);
+        }
+        flush_icache_range(kvmppc_booke_handlers,
+                           kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
 
         return 0;
 }
+
+void __exit kvmppc_booke_exit(void)
+{
+        free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
+        kvm_exit();
+}
diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h
new file mode 100644
index 000000000000..cf7c94ca24bf
--- /dev/null
+++ b/arch/powerpc/kvm/booke.h
@@ -0,0 +1,60 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ */
+
+#ifndef __KVM_BOOKE_H__
+#define __KVM_BOOKE_H__
+
+#include <linux/types.h>
+#include <linux/kvm_host.h>
+#include "timing.h"
+
+/* interrupt priortity ordering */
+#define BOOKE_IRQPRIO_DATA_STORAGE 0
+#define BOOKE_IRQPRIO_INST_STORAGE 1
+#define BOOKE_IRQPRIO_ALIGNMENT 2
+#define BOOKE_IRQPRIO_PROGRAM 3
+#define BOOKE_IRQPRIO_FP_UNAVAIL 4
+#define BOOKE_IRQPRIO_SYSCALL 5
+#define BOOKE_IRQPRIO_AP_UNAVAIL 6
+#define BOOKE_IRQPRIO_DTLB_MISS 7
+#define BOOKE_IRQPRIO_ITLB_MISS 8
+#define BOOKE_IRQPRIO_MACHINE_CHECK 9
+#define BOOKE_IRQPRIO_DEBUG 10
+#define BOOKE_IRQPRIO_CRITICAL 11
+#define BOOKE_IRQPRIO_WATCHDOG 12
+#define BOOKE_IRQPRIO_EXTERNAL 13
+#define BOOKE_IRQPRIO_FIT 14
+#define BOOKE_IRQPRIO_DECREMENTER 15
+
+/* Helper function for "full" MSR writes. No need to call this if only EE is
+ * changing. */
+static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
+{
+        if ((new_msr & MSR_PR) != (vcpu->arch.msr & MSR_PR))
+                kvmppc_mmu_priv_switch(vcpu, new_msr & MSR_PR);
+
+        vcpu->arch.msr = new_msr;
+
+        if (vcpu->arch.msr & MSR_WE) {
+                kvm_vcpu_block(vcpu);
+                kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
+        };
+}
+
+#endif /* __KVM_BOOKE_H__ */
diff --git a/arch/powerpc/kvm/booke_host.c b/arch/powerpc/kvm/booke_host.c
deleted file mode 100644
index b480341bc31e..000000000000
--- a/arch/powerpc/kvm/booke_host.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, version 2, as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
- *
- * Copyright IBM Corp. 2008
- *
- * Authors: Hollis Blanchard <hollisb@us.ibm.com>
- */
-
-#include <linux/errno.h>
-#include <linux/kvm_host.h>
-#include <linux/module.h>
-#include <asm/cacheflush.h>
-#include <asm/kvm_ppc.h>
-
-unsigned long kvmppc_booke_handlers;
-
-static int kvmppc_booke_init(void)
-{
-        unsigned long ivor[16];
-        unsigned long max_ivor = 0;
-        int i;
-
-        /* We install our own exception handlers by hijacking IVPR. IVPR must
-         * be 16-bit aligned, so we need a 64KB allocation. */
-        kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
-                                                 VCPU_SIZE_ORDER);
-        if (!kvmppc_booke_handlers)
-                return -ENOMEM;
-
-        /* XXX make sure our handlers are smaller than Linux's */
-
-        /* Copy our interrupt handlers to match host IVORs. That way we don't
-         * have to swap the IVORs on every guest/host transition. */
-        ivor[0] = mfspr(SPRN_IVOR0);
-        ivor[1] = mfspr(SPRN_IVOR1);
-        ivor[2] = mfspr(SPRN_IVOR2);
-        ivor[3] = mfspr(SPRN_IVOR3);
-        ivor[4] = mfspr(SPRN_IVOR4);
-        ivor[5] = mfspr(SPRN_IVOR5);
-        ivor[6] = mfspr(SPRN_IVOR6);
-        ivor[7] = mfspr(SPRN_IVOR7);
-        ivor[8] = mfspr(SPRN_IVOR8);
-        ivor[9] = mfspr(SPRN_IVOR9);
-        ivor[10] = mfspr(SPRN_IVOR10);
-        ivor[11] = mfspr(SPRN_IVOR11);
-        ivor[12] = mfspr(SPRN_IVOR12);
-        ivor[13] = mfspr(SPRN_IVOR13);
-        ivor[14] = mfspr(SPRN_IVOR14);
-        ivor[15] = mfspr(SPRN_IVOR15);
-
-        for (i = 0; i < 16; i++) {
-                if (ivor[i] > max_ivor)
-                        max_ivor = ivor[i];
-
-                memcpy((void *)kvmppc_booke_handlers + ivor[i],
-                       kvmppc_handlers_start + i * kvmppc_handler_len,
-                       kvmppc_handler_len);
-        }
-        flush_icache_range(kvmppc_booke_handlers,
-                           kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
-
-        return kvm_init(NULL, sizeof(struct kvm_vcpu), THIS_MODULE);
-}
-
-static void __exit kvmppc_booke_exit(void)
-{
-        free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
-        kvm_exit();
-}
-
-module_init(kvmppc_booke_init)
-module_exit(kvmppc_booke_exit)
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 95e165baf85f..084ebcd7dd83 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -107,6 +107,18 @@ _GLOBAL(kvmppc_resume_host)
         li      r6, 1
         slw     r6, r6, r5
 
+#ifdef CONFIG_KVM_EXIT_TIMING
+        /* save exit time */
+1:
+        mfspr   r7, SPRN_TBRU
+        mfspr   r8, SPRN_TBRL
+        mfspr   r9, SPRN_TBRU
+        cmpw    r9, r7
+        bne     1b
+        stw     r8, VCPU_TIMING_EXIT_TBL(r4)
+        stw     r9, VCPU_TIMING_EXIT_TBU(r4)
+#endif
+
         /* Save the faulting instruction and all GPRs for emulation. */
         andi.   r7, r6, NEED_INST_MASK
         beq     ..skip_inst_copy
@@ -335,54 +347,6 @@ lightweight_exit:
         lwz     r3, VCPU_SHADOW_PID(r4)
         mtspr   SPRN_PID, r3
 
-        /* Prevent all asynchronous TLB updates. */
-        mfmsr   r5
-        lis     r6, (MSR_EE|MSR_CE|MSR_ME|MSR_DE)@h
-        ori     r6, r6, (MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
-        andc    r6, r5, r6
-        mtmsr   r6
-
-        /* Load the guest mappings, leaving the host's "pinned" kernel mappings
-         * in place. */
-        mfspr   r10, SPRN_MMUCR                 /* Save host MMUCR. */
-        li      r5, PPC44x_TLB_SIZE
-        lis     r5, tlb_44x_hwater@ha
-        lwz     r5, tlb_44x_hwater@l(r5)
-        mtctr   r5
-        addi    r9, r4, VCPU_SHADOW_TLB
-        addi    r5, r4, VCPU_SHADOW_MOD
-        li      r3, 0
-1:
-        lbzx    r7, r3, r5
-        cmpwi   r7, 0
-        beq     3f
-
-        /* Load guest entry. */
-        mulli   r11, r3, TLBE_BYTES
-        add     r11, r11, r9
-        lwz     r7, 0(r11)
-        mtspr   SPRN_MMUCR, r7
-        lwz     r7, 4(r11)
-        tlbwe   r7, r3, PPC44x_TLB_PAGEID
-        lwz     r7, 8(r11)
-        tlbwe   r7, r3, PPC44x_TLB_XLAT
-        lwz     r7, 12(r11)
-        tlbwe   r7, r3, PPC44x_TLB_ATTRIB
-3:
-        addi    r3, r3, 1                       /* Increment index. */
-        bdnz    1b
-
-        mtspr   SPRN_MMUCR, r10                 /* Restore host MMUCR. */
-
-        /* Clear bitmap of modified TLB entries */
-        li      r5, PPC44x_TLB_SIZE>>2
-        mtctr   r5
-        addi    r5, r4, VCPU_SHADOW_MOD - 4
-        li      r6, 0
-1:
-        stwu    r6, 4(r5)
-        bdnz    1b
-
         iccci   0, 0 /* XXX hack */
 
         /* Load some guest volatiles. */
@@ -423,6 +387,18 @@ lightweight_exit:
         lwz     r3, VCPU_SPRG7(r4)
         mtspr   SPRN_SPRG7, r3
 
+#ifdef CONFIG_KVM_EXIT_TIMING
+        /* save enter time */
+1:
+        mfspr   r6, SPRN_TBRU
+        mfspr   r7, SPRN_TBRL
+        mfspr   r8, SPRN_TBRU
+        cmpw    r8, r6
+        bne     1b
+        stw     r7, VCPU_TIMING_LAST_ENTER_TBL(r4)
+        stw     r8, VCPU_TIMING_LAST_ENTER_TBU(r4)
+#endif
+
         /* Finish loading guest volatiles and jump to guest. */
         lwz     r3, VCPU_CTR(r4)
         mtctr   r3
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index 0fce4fbdc20d..d1d38daa93fb 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -23,161 +23,14 @@
 #include <linux/string.h>
 #include <linux/kvm_host.h>
 
-#include <asm/dcr.h>
-#include <asm/dcr-regs.h>
+#include <asm/reg.h>
 #include <asm/time.h>
 #include <asm/byteorder.h>
 #include <asm/kvm_ppc.h>
+#include <asm/disassemble.h>
+#include "timing.h"
 
-#include "44x_tlb.h"
-
-/* Instruction decoding */
-static inline unsigned int get_op(u32 inst)
-{
-        return inst >> 26;
-}
-
-static inline unsigned int get_xop(u32 inst)
-{
-        return (inst >> 1) & 0x3ff;
-}
-
-static inline unsigned int get_sprn(u32 inst)
-{
-        return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
-}
-
-static inline unsigned int get_dcrn(u32 inst)
-{
-        return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
-}
-
-static inline unsigned int get_rt(u32 inst)
-{
-        return (inst >> 21) & 0x1f;
-}
-
-static inline unsigned int get_rs(u32 inst)
-{
-        return (inst >> 21) & 0x1f;
-}
-
-static inline unsigned int get_ra(u32 inst)
-{
-        return (inst >> 16) & 0x1f;
-}
-
-static inline unsigned int get_rb(u32 inst)
-{
-        return (inst >> 11) & 0x1f;
-}
-
-static inline unsigned int get_rc(u32 inst)
-{
-        return inst & 0x1;
-}
-
-static inline unsigned int get_ws(u32 inst)
-{
-        return (inst >> 11) & 0x1f;
-}
-
-static inline unsigned int get_d(u32 inst)
-{
-        return inst & 0xffff;
-}
-
-static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
-                             const struct tlbe *tlbe)
-{
-        gpa_t gpa;
-
-        if (!get_tlb_v(tlbe))
-                return 0;
-
-        /* Does it match current guest AS? */
-        /* XXX what about IS != DS? */
-        if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
-                return 0;
-
-        gpa = get_tlb_raddr(tlbe);
-        if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
-                /* Mapping is not for RAM. */
-                return 0;
-
-        return 1;
-}
-
-static int kvmppc_emul_tlbwe(struct kvm_vcpu *vcpu, u32 inst)
-{
-        u64 eaddr;
-        u64 raddr;
-        u64 asid;
-        u32 flags;
-        struct tlbe *tlbe;
-        unsigned int ra;
-        unsigned int rs;
-        unsigned int ws;
-        unsigned int index;
-
-        ra = get_ra(inst);
-        rs = get_rs(inst);
-        ws = get_ws(inst);
-
-        index = vcpu->arch.gpr[ra];
-        if (index > PPC44x_TLB_SIZE) {
-                printk("%s: index %d\n", __func__, index);
-                kvmppc_dump_vcpu(vcpu);
-                return EMULATE_FAIL;
-        }
-
-        tlbe = &vcpu->arch.guest_tlb[index];
-
-        /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
-        if (tlbe->word0 & PPC44x_TLB_VALID) {
-                eaddr = get_tlb_eaddr(tlbe);
-                asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
-                kvmppc_mmu_invalidate(vcpu, eaddr, get_tlb_end(tlbe), asid);
-        }
-
-        switch (ws) {
-        case PPC44x_TLB_PAGEID:
-                tlbe->tid = vcpu->arch.mmucr & 0xff;
-                tlbe->word0 = vcpu->arch.gpr[rs];
-                break;
-
-        case PPC44x_TLB_XLAT:
-                tlbe->word1 = vcpu->arch.gpr[rs];
-                break;
-
-        case PPC44x_TLB_ATTRIB:
-                tlbe->word2 = vcpu->arch.gpr[rs];
-                break;
-
-        default:
-                return EMULATE_FAIL;
-        }
-
-        if (tlbe_is_host_safe(vcpu, tlbe)) {
-                eaddr = get_tlb_eaddr(tlbe);
-                raddr = get_tlb_raddr(tlbe);
-                asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
-                flags = tlbe->word2 & 0xffff;
-
-                /* Create a 4KB mapping on the host. If the guest wanted a
-                 * large page, only the first 4KB is mapped here and the rest
-                 * are mapped on the fly. */
-                kvmppc_mmu_map(vcpu, eaddr, raddr >> PAGE_SHIFT, asid, flags);
-        }
-
-        KVMTRACE_5D(GTLB_WRITE, vcpu, index,
-                        tlbe->tid, tlbe->word0, tlbe->word1, tlbe->word2,
-                        handler);
-
-        return EMULATE_DONE;
-}
-
-static void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
+void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
 {
         if (vcpu->arch.tcr & TCR_DIE) {
                 /* The decrementer ticks at the same rate as the timebase, so
@@ -193,12 +46,6 @@ static void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
         }
 }
 
-static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
-{
-        vcpu->arch.pc = vcpu->arch.srr0;
-        kvmppc_set_msr(vcpu, vcpu->arch.srr1);
-}
-
 /* XXX to do:
  * lhax
  * lhaux
@@ -213,40 +60,30 @@ static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
  *
  * XXX is_bigendian should depend on MMU mapping or MSR[LE]
  */
+/* XXX Should probably auto-generate instruction decoding for a particular core
+ * from opcode tables in the future. */
 int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
 {
         u32 inst = vcpu->arch.last_inst;
         u32 ea;
         int ra;
         int rb;
-        int rc;
         int rs;
         int rt;
         int sprn;
-        int dcrn;
         enum emulation_result emulated = EMULATE_DONE;
         int advance = 1;
 
+        /* this default type might be overwritten by subcategories */
+        kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
+
         switch (get_op(inst)) {
-        case 3:                                                 /* trap */
-                printk("trap!\n");
-                kvmppc_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
+        case 3:                                             /* trap */
+                vcpu->arch.esr |= ESR_PTR;
+                kvmppc_core_queue_program(vcpu);
                 advance = 0;
                 break;
 
-        case 19:
-                switch (get_xop(inst)) {
-                case 50:                                        /* rfi */
-                        kvmppc_emul_rfi(vcpu);
-                        advance = 0;
-                        break;
-
-                default:
-                        emulated = EMULATE_FAIL;
-                        break;
-                }
-                break;
-
         case 31:
                 switch (get_xop(inst)) {
 
@@ -255,27 +92,11 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
                         break;
 
-                case 83:                                        /* mfmsr */
-                        rt = get_rt(inst);
-                        vcpu->arch.gpr[rt] = vcpu->arch.msr;
-                        break;
-
                 case 87:                                        /* lbzx */
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
                         break;
 
-                case 131:                                       /* wrtee */
-                        rs = get_rs(inst);
-                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
-                                         | (vcpu->arch.gpr[rs] & MSR_EE);
-                        break;
-
-                case 146:                                       /* mtmsr */
-                        rs = get_rs(inst);
-                        kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
-                        break;
-
                 case 151:                                       /* stwx */
                         rs = get_rs(inst);
                         emulated = kvmppc_handle_store(run, vcpu,
@@ -283,11 +104,6 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                                        4, 1);
                         break;
 
-                case 163:                                       /* wrteei */
-                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
-                                         | (inst & MSR_EE);
-                        break;
-
                 case 215:                                       /* stbx */
                         rs = get_rs(inst);
                         emulated = kvmppc_handle_store(run, vcpu,
@@ -328,42 +144,6 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         vcpu->arch.gpr[ra] = ea;
                         break;
 
-                case 323:                                       /* mfdcr */
-                        dcrn = get_dcrn(inst);
-                        rt = get_rt(inst);
-
-                        /* The guest may access CPR0 registers to determine the timebase
-                         * frequency, and it must know the real host frequency because it
-                         * can directly access the timebase registers.
-                         *
-                         * It would be possible to emulate those accesses in userspace,
-                         * but userspace can really only figure out the end frequency.
-                         * We could decompose that into the factors that compute it, but
-                         * that's tricky math, and it's easier to just report the real
-                         * CPR0 values.
-                         */
-                        switch (dcrn) {
-                        case DCRN_CPR0_CONFIG_ADDR:
-                                vcpu->arch.gpr[rt] = vcpu->arch.cpr0_cfgaddr;
-                                break;
-                        case DCRN_CPR0_CONFIG_DATA:
-                                local_irq_disable();
-                                mtdcr(DCRN_CPR0_CONFIG_ADDR,
-                                      vcpu->arch.cpr0_cfgaddr);
-                                vcpu->arch.gpr[rt] = mfdcr(DCRN_CPR0_CONFIG_DATA);
-                                local_irq_enable();
-                                break;
-                        default:
-                                run->dcr.dcrn = dcrn;
-                                run->dcr.data =  0;
-                                run->dcr.is_write = 0;
-                                vcpu->arch.io_gpr = rt;
-                                vcpu->arch.dcr_needed = 1;
-                                emulated = EMULATE_DO_DCR;
-                        }
-
-                        break;
-
                 case 339:                                       /* mfspr */
                         sprn = get_sprn(inst);
                         rt = get_rt(inst);
@@ -373,26 +153,8 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                 vcpu->arch.gpr[rt] = vcpu->arch.srr0; break;
                         case SPRN_SRR1:
                                 vcpu->arch.gpr[rt] = vcpu->arch.srr1; break;
-                        case SPRN_MMUCR:
-                                vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break;
-                        case SPRN_PID:
-                                vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
-                        case SPRN_IVPR:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
-                        case SPRN_CCR0:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break;
-                        case SPRN_CCR1:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break;
                         case SPRN_PVR:
                                 vcpu->arch.gpr[rt] = vcpu->arch.pvr; break;
-                        case SPRN_DEAR:
-                                vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
-                        case SPRN_ESR:
-                                vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
-                        case SPRN_DBCR0:
-                                vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
-                        case SPRN_DBCR1:
-                                vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
 
                         /* Note: mftb and TBRL/TBWL are user-accessible, so
                          * the guest can always access the real TB anyways.
@@ -413,42 +175,12 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         /* Note: SPRG4-7 are user-readable, so we don't get
                          * a trap. */
 
-                        case SPRN_IVOR0:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[0]; break;
-                        case SPRN_IVOR1:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[1]; break;
-                        case SPRN_IVOR2:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[2]; break;
-                        case SPRN_IVOR3:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[3]; break;
-                        case SPRN_IVOR4:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[4]; break;
-                        case SPRN_IVOR5:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[5]; break;
-                        case SPRN_IVOR6:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[6]; break;
-                        case SPRN_IVOR7:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[7]; break;
-                        case SPRN_IVOR8:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[8]; break;
-                        case SPRN_IVOR9:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[9]; break;
-                        case SPRN_IVOR10:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[10]; break;
-                        case SPRN_IVOR11:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[11]; break;
-                        case SPRN_IVOR12:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[12]; break;
-                        case SPRN_IVOR13:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[13]; break;
-                        case SPRN_IVOR14:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[14]; break;
-                        case SPRN_IVOR15:
-                                vcpu->arch.gpr[rt] = vcpu->arch.ivor[15]; break;
-
                         default:
-                                printk("mfspr: unknown spr %x\n", sprn);
-                                vcpu->arch.gpr[rt] = 0;
+                                emulated = kvmppc_core_emulate_mfspr(vcpu, sprn, rt);
+                                if (emulated == EMULATE_FAIL) {
+                                        printk("mfspr: unknown spr %x\n", sprn);
+                                        vcpu->arch.gpr[rt] = 0;
+                                }
                                 break;
                         }
                         break;
@@ -478,25 +210,6 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         vcpu->arch.gpr[ra] = ea;
                         break;
 
-                case 451:                                       /* mtdcr */
-                        dcrn = get_dcrn(inst);
-                        rs = get_rs(inst);
-
-                        /* emulate some access in kernel */
-                        switch (dcrn) {
-                        case DCRN_CPR0_CONFIG_ADDR:
-                                vcpu->arch.cpr0_cfgaddr = vcpu->arch.gpr[rs];
-                                break;
-                        default:
-                                run->dcr.dcrn = dcrn;
-                                run->dcr.data = vcpu->arch.gpr[rs];
-                                run->dcr.is_write = 1;
-                                vcpu->arch.dcr_needed = 1;
-                                emulated = EMULATE_DO_DCR;
-                        }
-
-                        break;
-
                 case 467:                                       /* mtspr */
                         sprn = get_sprn(inst);
                         rs = get_rs(inst);
@@ -505,22 +218,6 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                 vcpu->arch.srr0 = vcpu->arch.gpr[rs]; break;
                         case SPRN_SRR1:
                                 vcpu->arch.srr1 = vcpu->arch.gpr[rs]; break;
-                        case SPRN_MMUCR:
-                                vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
-                        case SPRN_PID:
-                                kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
-                        case SPRN_CCR0:
-                                vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
-                        case SPRN_CCR1:
-                                vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break;
-                        case SPRN_DEAR:
-                                vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
-                        case SPRN_ESR:
-                                vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
-                        case SPRN_DBCR0:
-                                vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
-                        case SPRN_DBCR1:
-                                vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
 
                         /* XXX We need to context-switch the timebase for
                          * watchdog and FIT. */
@@ -532,14 +229,6 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                 kvmppc_emulate_dec(vcpu);
                                 break;
 
-                        case SPRN_TSR:
-                                vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
-
-                        case SPRN_TCR:
-                                vcpu->arch.tcr = vcpu->arch.gpr[rs];
-                                kvmppc_emulate_dec(vcpu);
-                                break;
-
                         case SPRN_SPRG0:
                                 vcpu->arch.sprg0 = vcpu->arch.gpr[rs]; break;
                         case SPRN_SPRG1:
@@ -549,56 +238,10 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         case SPRN_SPRG3:
                                 vcpu->arch.sprg3 = vcpu->arch.gpr[rs]; break;
 
-                        /* Note: SPRG4-7 are user-readable. These values are
-                         * loaded into the real SPRGs when resuming the
-                         * guest. */
-                        case SPRN_SPRG4:
-                                vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
-                        case SPRN_SPRG5:
-                                vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
-                        case SPRN_SPRG6:
-                                vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
-                        case SPRN_SPRG7:
-                                vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
-
-                        case SPRN_IVPR:
-                                vcpu->arch.ivpr = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR0:
-                                vcpu->arch.ivor[0] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR1:
-                                vcpu->arch.ivor[1] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR2:
-                                vcpu->arch.ivor[2] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR3:
-                                vcpu->arch.ivor[3] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR4:
-                                vcpu->arch.ivor[4] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR5:
-                                vcpu->arch.ivor[5] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR6:
-                                vcpu->arch.ivor[6] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR7:
-                                vcpu->arch.ivor[7] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR8:
-                                vcpu->arch.ivor[8] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR9:
-                                vcpu->arch.ivor[9] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR10:
-                                vcpu->arch.ivor[10] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR11:
-                                vcpu->arch.ivor[11] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR12:
-                                vcpu->arch.ivor[12] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR13:
-                                vcpu->arch.ivor[13] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR14:
-                                vcpu->arch.ivor[14] = vcpu->arch.gpr[rs]; break;
-                        case SPRN_IVOR15:
-                                vcpu->arch.ivor[15] = vcpu->arch.gpr[rs]; break;
-
                         default:
-                                printk("mtspr: unknown spr %x\n", sprn);
-                                emulated = EMULATE_FAIL;
+                                emulated = kvmppc_core_emulate_mtspr(vcpu, sprn, rs);
+                                if (emulated == EMULATE_FAIL)
+                                        printk("mtspr: unknown spr %x\n", sprn);
                                 break;
                         }
                         break;
@@ -629,36 +272,6 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                                        4, 0);
                         break;
 
-                case 978:                                       /* tlbwe */
-                        emulated = kvmppc_emul_tlbwe(vcpu, inst);
-                        break;
-
-                case 914:       {                               /* tlbsx */
-                        int index;
-                        unsigned int as = get_mmucr_sts(vcpu);
-                        unsigned int pid = get_mmucr_stid(vcpu);
-
-                        rt = get_rt(inst);
-                        ra = get_ra(inst);
-                        rb = get_rb(inst);
-                        rc = get_rc(inst);
-
-                        ea = vcpu->arch.gpr[rb];
-                        if (ra)
-                                ea += vcpu->arch.gpr[ra];
-
-                        index = kvmppc_44x_tlb_index(vcpu, ea, pid, as);
-                        if (rc) {
-                                if (index < 0)
-                                        vcpu->arch.cr &= ~0x20000000;
-                                else
-                                        vcpu->arch.cr |= 0x20000000;
-                        }
-                        vcpu->arch.gpr[rt] = index;
-
-                        }
-                        break;
-
                 case 790:                                       /* lhbrx */
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);
@@ -674,14 +287,9 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                                        2, 0);
                         break;
 
-                case 966:                                       /* iccci */
-                        break;
-
                 default:
-                        printk("unknown: op %d xop %d\n", get_op(inst),
-                                get_xop(inst));
+                        /* Attempt core-specific emulation below. */
                         emulated = EMULATE_FAIL;
-                        break;
                 }
                 break;
 
@@ -764,12 +372,19 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 break;
 
         default:
-                printk("unknown op %d\n", get_op(inst));
                 emulated = EMULATE_FAIL;
-                break;
         }
 
-        KVMTRACE_3D(PPC_INSTR, vcpu, inst, vcpu->arch.pc, emulated, entryexit);
+        if (emulated == EMULATE_FAIL) {
+                emulated = kvmppc_core_emulate_op(run, vcpu, inst, &advance);
+                if (emulated == EMULATE_FAIL) {
+                        advance = 0;
+                        printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
+                               "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
+                }
+        }
+
+        KVMTRACE_3D(PPC_INSTR, vcpu, inst, (int)vcpu->arch.pc, emulated, entryexit);
 
         if (advance)
                 vcpu->arch.pc += 4; /* Advance past emulated instruction. */
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index fda9baada132..2822c8ccfaaf 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -28,7 +28,8 @@
 #include <asm/uaccess.h>
 #include <asm/kvm_ppc.h>
 #include <asm/tlbflush.h>
-
+#include "timing.h"
+#include "../mm/mmu_decl.h"
 
 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
 {
@@ -98,14 +99,7 @@ void kvm_arch_hardware_unsetup(void)
 
 void kvm_arch_check_processor_compat(void *rtn)
 {
-        int r;
-
-        if (strcmp(cur_cpu_spec->platform, "ppc440") == 0)
-                r = 0;
-        else
-                r = -ENOTSUPP;
-
-        *(int *)rtn = r;
+        *(int *)rtn = kvmppc_core_check_processor_compat();
 }
 
 struct kvm *kvm_arch_create_vm(void)
@@ -143,9 +137,6 @@ int kvm_dev_ioctl_check_extension(long ext)
         int r;
 
         switch (ext) {
-        case KVM_CAP_USER_MEMORY:
-                r = 1;
-                break;
         case KVM_CAP_COALESCED_MMIO:
                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
                 break;
@@ -178,30 +169,15 @@ void kvm_arch_flush_shadow(struct kvm *kvm)
 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
 {
         struct kvm_vcpu *vcpu;
-        int err;
-
-        vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
-        if (!vcpu) {
-                err = -ENOMEM;
-                goto out;
-        }
-
-        err = kvm_vcpu_init(vcpu, kvm, id);
-        if (err)
-                goto free_vcpu;
-
+        vcpu = kvmppc_core_vcpu_create(kvm, id);
+        kvmppc_create_vcpu_debugfs(vcpu, id);
         return vcpu;
-
-free_vcpu:
-        kmem_cache_free(kvm_vcpu_cache, vcpu);
-out:
-        return ERR_PTR(err);
 }
 
 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
 {
-        kvm_vcpu_uninit(vcpu);
-        kmem_cache_free(kvm_vcpu_cache, vcpu);
+        kvmppc_remove_vcpu_debugfs(vcpu);
+        kvmppc_core_vcpu_free(vcpu);
 }
 
 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
@@ -211,16 +187,14 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
 
 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
 {
-        unsigned int priority = exception_priority[BOOKE_INTERRUPT_DECREMENTER];
-
-        return test_bit(priority, &vcpu->arch.pending_exceptions);
+        return kvmppc_core_pending_dec(vcpu);
 }
 
 static void kvmppc_decrementer_func(unsigned long data)
 {
         struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
 
-        kvmppc_queue_exception(vcpu, BOOKE_INTERRUPT_DECREMENTER);
+        kvmppc_core_queue_dec(vcpu);
 
         if (waitqueue_active(&vcpu->wq)) {
                 wake_up_interruptible(&vcpu->wq);
@@ -241,96 +215,25 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
         kvmppc_core_destroy_mmu(vcpu);
 }
 
-/* Note: clearing MSR[DE] just means that the debug interrupt will not be
- * delivered *immediately*. Instead, it simply sets the appropriate DBSR bits.
- * If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt
- * will be delivered as an "imprecise debug event" (which is indicated by
- * DBSR[IDE].
- */
-static void kvmppc_disable_debug_interrupts(void)
-{
-        mtmsr(mfmsr() & ~MSR_DE);
-}
-
-static void kvmppc_restore_host_debug_state(struct kvm_vcpu *vcpu)
-{
-        kvmppc_disable_debug_interrupts();
-
-        mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]);
-        mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]);
-        mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]);
-        mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]);
-        mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1);
-        mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2);
-        mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0);
-        mtmsr(vcpu->arch.host_msr);
-}
-
-static void kvmppc_load_guest_debug_registers(struct kvm_vcpu *vcpu)
-{
-        struct kvm_guest_debug *dbg = &vcpu->guest_debug;
-        u32 dbcr0 = 0;
-
-        vcpu->arch.host_msr = mfmsr();
-        kvmppc_disable_debug_interrupts();
-
-        /* Save host debug register state. */
-        vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1);
-        vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2);
-        vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3);
-        vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4);
-        vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0);
-        vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1);
-        vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2);
-
-        /* set registers up for guest */
-
-        if (dbg->bp[0]) {
-                mtspr(SPRN_IAC1, dbg->bp[0]);
-                dbcr0 |= DBCR0_IAC1 | DBCR0_IDM;
-        }
-        if (dbg->bp[1]) {
-                mtspr(SPRN_IAC2, dbg->bp[1]);
-                dbcr0 |= DBCR0_IAC2 | DBCR0_IDM;
-        }
-        if (dbg->bp[2]) {
-                mtspr(SPRN_IAC3, dbg->bp[2]);
-                dbcr0 |= DBCR0_IAC3 | DBCR0_IDM;
-        }
-        if (dbg->bp[3]) {
-                mtspr(SPRN_IAC4, dbg->bp[3]);
-                dbcr0 |= DBCR0_IAC4 | DBCR0_IDM;
-        }
-
-        mtspr(SPRN_DBCR0, dbcr0);
-        mtspr(SPRN_DBCR1, 0);
-        mtspr(SPRN_DBCR2, 0);
-}
-
 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
-        int i;
-
         if (vcpu->guest_debug.enabled)
-                kvmppc_load_guest_debug_registers(vcpu);
+                kvmppc_core_load_guest_debugstate(vcpu);
 
-        /* Mark every guest entry in the shadow TLB entry modified, so that they
-         * will all be reloaded on the next vcpu run (instead of being
-         * demand-faulted). */
-        for (i = 0; i <= tlb_44x_hwater; i++)
-                kvmppc_tlbe_set_modified(vcpu, i);
+        kvmppc_core_vcpu_load(vcpu, cpu);
 }
 
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
 {
         if (vcpu->guest_debug.enabled)
-                kvmppc_restore_host_debug_state(vcpu);
+                kvmppc_core_load_host_debugstate(vcpu);
 
         /* Don't leave guest TLB entries resident when being de-scheduled. */
         /* XXX It would be nice to differentiate between heavyweight exit and
          * sched_out here, since we could avoid the TLB flush for heavyweight
          * exits. */
-        _tlbia();
+        _tlbil_all();
+        kvmppc_core_vcpu_put(vcpu);
 }
 
 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
@@ -354,14 +257,14 @@ int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
 static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
                                      struct kvm_run *run)
 {
-        u32 *gpr = &vcpu->arch.gpr[vcpu->arch.io_gpr];
+        ulong *gpr = &vcpu->arch.gpr[vcpu->arch.io_gpr];
         *gpr = run->dcr.data;
 }
 
 static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
                                       struct kvm_run *run)
 {
-        u32 *gpr = &vcpu->arch.gpr[vcpu->arch.io_gpr];
+        ulong *gpr = &vcpu->arch.gpr[vcpu->arch.io_gpr];
 
         if (run->mmio.len > sizeof(*gpr)) {
                 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
@@ -459,7 +362,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
                 vcpu->arch.dcr_needed = 0;
         }
 
-        kvmppc_check_and_deliver_interrupts(vcpu);
+        kvmppc_core_deliver_interrupts(vcpu);
 
         local_irq_disable();
         kvm_guest_enter();
@@ -477,7 +380,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
 
 int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)
 {
-        kvmppc_queue_exception(vcpu, BOOKE_INTERRUPT_EXTERNAL);
+        kvmppc_core_queue_external(vcpu, irq);
 
         if (waitqueue_active(&vcpu->wq)) {
                 wake_up_interruptible(&vcpu->wq);
diff --git a/arch/powerpc/kvm/timing.c b/arch/powerpc/kvm/timing.c
new file mode 100644
index 000000000000..47ee603f558e
--- /dev/null
+++ b/arch/powerpc/kvm/timing.c
@@ -0,0 +1,239 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
+ */
+
+#include <linux/kvm_host.h>
+#include <linux/fs.h>
+#include <linux/seq_file.h>
+#include <linux/debugfs.h>
+#include <linux/uaccess.h>
+
+#include <asm/time.h>
+#include <asm-generic/div64.h>
+
+#include "timing.h"
+
+void kvmppc_init_timing_stats(struct kvm_vcpu *vcpu)
+{
+        int i;
+
+        /* pause guest execution to avoid concurrent updates */
+        local_irq_disable();
+        mutex_lock(&vcpu->mutex);
+
+        vcpu->arch.last_exit_type = 0xDEAD;
+        for (i = 0; i < __NUMBER_OF_KVM_EXIT_TYPES; i++) {
+                vcpu->arch.timing_count_type[i] = 0;
+                vcpu->arch.timing_max_duration[i] = 0;
+                vcpu->arch.timing_min_duration[i] = 0xFFFFFFFF;
+                vcpu->arch.timing_sum_duration[i] = 0;
+                vcpu->arch.timing_sum_quad_duration[i] = 0;
+        }
+        vcpu->arch.timing_last_exit = 0;
+        vcpu->arch.timing_exit.tv64 = 0;
+        vcpu->arch.timing_last_enter.tv64 = 0;
+
+        mutex_unlock(&vcpu->mutex);
+        local_irq_enable();
+}
+
+static void add_exit_timing(struct kvm_vcpu *vcpu, u64 duration, int type)
+{
+        u64 old;
+
+        do_div(duration, tb_ticks_per_usec);
+        if (unlikely(duration > 0xFFFFFFFF)) {
+                printk(KERN_ERR"%s - duration too big -> overflow"
+                        " duration %lld type %d exit #%d\n",
+                        __func__, duration, type,
+                        vcpu->arch.timing_count_type[type]);
+                return;
+        }
+
+        vcpu->arch.timing_count_type[type]++;
+
+        /* sum */
+        old = vcpu->arch.timing_sum_duration[type];
+        vcpu->arch.timing_sum_duration[type] += duration;
+        if (unlikely(old > vcpu->arch.timing_sum_duration[type])) {
+                printk(KERN_ERR"%s - wrap adding sum of durations"
+                        " old %lld new %lld type %d exit # of type %d\n",
+                        __func__, old, vcpu->arch.timing_sum_duration[type],
+                        type, vcpu->arch.timing_count_type[type]);
+        }
+
+        /* square sum */
+        old = vcpu->arch.timing_sum_quad_duration[type];
+        vcpu->arch.timing_sum_quad_duration[type] += (duration*duration);
+        if (unlikely(old > vcpu->arch.timing_sum_quad_duration[type])) {
+                printk(KERN_ERR"%s - wrap adding sum of squared durations"
+                        " old %lld new %lld type %d exit # of type %d\n",
+                        __func__, old,
+                        vcpu->arch.timing_sum_quad_duration[type],
+                        type, vcpu->arch.timing_count_type[type]);
+        }
+
+        /* set min/max */
+        if (unlikely(duration < vcpu->arch.timing_min_duration[type]))
+                vcpu->arch.timing_min_duration[type] = duration;
+        if (unlikely(duration > vcpu->arch.timing_max_duration[type]))
+                vcpu->arch.timing_max_duration[type] = duration;
+}
+
+void kvmppc_update_timing_stats(struct kvm_vcpu *vcpu)
+{
+        u64 exit = vcpu->arch.timing_last_exit;
+        u64 enter = vcpu->arch.timing_last_enter.tv64;
+
+        /* save exit time, used next exit when the reenter time is known */
+        vcpu->arch.timing_last_exit = vcpu->arch.timing_exit.tv64;
+
+        if (unlikely(vcpu->arch.last_exit_type == 0xDEAD || exit == 0))
+                return; /* skip incomplete cycle (e.g. after reset) */
+
+        /* update statistics for average and standard deviation */
+        add_exit_timing(vcpu, (enter - exit), vcpu->arch.last_exit_type);
+        /* enter -> timing_last_exit is time spent in guest - log this too */
+        add_exit_timing(vcpu, (vcpu->arch.timing_last_exit - enter),
+                        TIMEINGUEST);
+}
+
+static const char *kvm_exit_names[__NUMBER_OF_KVM_EXIT_TYPES] = {
+        [MMIO_EXITS] =              "MMIO",
+        [DCR_EXITS] =               "DCR",
+        [SIGNAL_EXITS] =            "SIGNAL",
+        [ITLB_REAL_MISS_EXITS] =    "ITLBREAL",
+        [ITLB_VIRT_MISS_EXITS] =    "ITLBVIRT",
+        [DTLB_REAL_MISS_EXITS] =    "DTLBREAL",
+        [DTLB_VIRT_MISS_EXITS] =    "DTLBVIRT",
+        [SYSCALL_EXITS] =           "SYSCALL",
+        [ISI_EXITS] =               "ISI",
+        [DSI_EXITS] =               "DSI",
+        [EMULATED_INST_EXITS] =     "EMULINST",
+        [EMULATED_MTMSRWE_EXITS] =  "EMUL_WAIT",
+        [EMULATED_WRTEE_EXITS] =    "EMUL_WRTEE",
+        [EMULATED_MTSPR_EXITS] =    "EMUL_MTSPR",
+        [EMULATED_MFSPR_EXITS] =    "EMUL_MFSPR",
+        [EMULATED_MTMSR_EXITS] =    "EMUL_MTMSR",
+        [EMULATED_MFMSR_EXITS] =    "EMUL_MFMSR",
+        [EMULATED_TLBSX_EXITS] =    "EMUL_TLBSX",
+        [EMULATED_TLBWE_EXITS] =    "EMUL_TLBWE",
+        [EMULATED_RFI_EXITS] =      "EMUL_RFI",
+        [DEC_EXITS] =               "DEC",
+        [EXT_INTR_EXITS] =          "EXTINT",
+        [HALT_WAKEUP] =             "HALT",
+        [USR_PR_INST] =             "USR_PR_INST",
+        [FP_UNAVAIL] =              "FP_UNAVAIL",
+        [DEBUG_EXITS] =             "DEBUG",
+        [TIMEINGUEST] =             "TIMEINGUEST"
+};
+
+static int kvmppc_exit_timing_show(struct seq_file *m, void *private)
+{
+        struct kvm_vcpu *vcpu = m->private;
+        int i;
+
+        seq_printf(m, "%s", "type       count   min     max     sum     sum_squared\n");
+
+        for (i = 0; i < __NUMBER_OF_KVM_EXIT_TYPES; i++) {
+                seq_printf(m, "%12s     %10d    %10lld  %10lld  %20lld  %20lld\n",
+                        kvm_exit_names[i],
+                        vcpu->arch.timing_count_type[i],
+                        vcpu->arch.timing_min_duration[i],
+                        vcpu->arch.timing_max_duration[i],
+                        vcpu->arch.timing_sum_duration[i],
+                        vcpu->arch.timing_sum_quad_duration[i]);
+        }
+        return 0;
+}
+
+/* Write 'c' to clear the timing statistics. */
+static ssize_t kvmppc_exit_timing_write(struct file *file,
+                                       const char __user *user_buf,
+                                       size_t count, loff_t *ppos)
+{
+        int err = -EINVAL;
+        char c;
+
+        if (count > 1) {
+                goto done;
+        }
+
+        if (get_user(c, user_buf)) {
+                err = -EFAULT;
+                goto done;
+        }
+
+        if (c == 'c') {
+                struct seq_file *seqf = (struct seq_file *)file->private_data;
+                struct kvm_vcpu *vcpu = seqf->private;
+                /* Write does not affect our buffers previously generated with
+                 * show. seq_file is locked here to prevent races of init with
+                 * a show call */
+                mutex_lock(&seqf->lock);
+                kvmppc_init_timing_stats(vcpu);
+                mutex_unlock(&seqf->lock);
+                err = count;
+        }
+
+done:
+        return err;
+}
+
+static int kvmppc_exit_timing_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, kvmppc_exit_timing_show, inode->i_private);
+}
+
+static struct file_operations kvmppc_exit_timing_fops = {
+        .owner   = THIS_MODULE,
+        .open    = kvmppc_exit_timing_open,
+        .read    = seq_read,
+        .write   = kvmppc_exit_timing_write,
+        .llseek  = seq_lseek,
+        .release = single_release,
+};
+
+void kvmppc_create_vcpu_debugfs(struct kvm_vcpu *vcpu, unsigned int id)
+{
+        static char dbg_fname[50];
+        struct dentry *debugfs_file;
+
+        snprintf(dbg_fname, sizeof(dbg_fname), "vm%u_vcpu%u_timing",
+                 current->pid, id);
+        debugfs_file = debugfs_create_file(dbg_fname, 0666,
+                                        kvm_debugfs_dir, vcpu,
+                                        &kvmppc_exit_timing_fops);
+
+        if (!debugfs_file) {
+                printk(KERN_ERR"%s: error creating debugfs file %s\n",
+                        __func__, dbg_fname);
+                return;
+        }
+
+        vcpu->arch.debugfs_exit_timing = debugfs_file;
+}
+
+void kvmppc_remove_vcpu_debugfs(struct kvm_vcpu *vcpu)
+{
+        if (vcpu->arch.debugfs_exit_timing) {
+                debugfs_remove(vcpu->arch.debugfs_exit_timing);
+                vcpu->arch.debugfs_exit_timing = NULL;
+        }
+}
diff --git a/arch/powerpc/kvm/timing.h b/arch/powerpc/kvm/timing.h
new file mode 100644
index 000000000000..bb13b1f3cd5a
--- /dev/null
+++ b/arch/powerpc/kvm/timing.h
@@ -0,0 +1,102 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
+ */
+
+#ifndef __POWERPC_KVM_EXITTIMING_H__
+#define __POWERPC_KVM_EXITTIMING_H__
+
+#include <linux/kvm_host.h>
+#include <asm/kvm_host.h>
+
+#ifdef CONFIG_KVM_EXIT_TIMING
+void kvmppc_init_timing_stats(struct kvm_vcpu *vcpu);
+void kvmppc_update_timing_stats(struct kvm_vcpu *vcpu);
+void kvmppc_create_vcpu_debugfs(struct kvm_vcpu *vcpu, unsigned int id);
+void kvmppc_remove_vcpu_debugfs(struct kvm_vcpu *vcpu);
+
+static inline void kvmppc_set_exit_type(struct kvm_vcpu *vcpu, int type)
+{
+        vcpu->arch.last_exit_type = type;
+}
+
+#else
+/* if exit timing is not configured there is no need to build the c file */
+static inline void kvmppc_init_timing_stats(struct kvm_vcpu *vcpu) {}
+static inline void kvmppc_update_timing_stats(struct kvm_vcpu *vcpu) {}
+static inline void kvmppc_create_vcpu_debugfs(struct kvm_vcpu *vcpu,
+                                                unsigned int id) {}
+static inline void kvmppc_remove_vcpu_debugfs(struct kvm_vcpu *vcpu) {}
+static inline void kvmppc_set_exit_type(struct kvm_vcpu *vcpu, int type) {}
+#endif /* CONFIG_KVM_EXIT_TIMING */
+
+/* account the exit in kvm_stats */
+static inline void kvmppc_account_exit_stat(struct kvm_vcpu *vcpu, int type)
+{
+        /* type has to be known at build time for optimization */
+        BUILD_BUG_ON(__builtin_constant_p(type));
+        switch (type) {
+        case EXT_INTR_EXITS:
+                vcpu->stat.ext_intr_exits++;
+                break;
+        case DEC_EXITS:
+                vcpu->stat.dec_exits++;
+                break;
+        case EMULATED_INST_EXITS:
+                vcpu->stat.emulated_inst_exits++;
+                break;
+        case DCR_EXITS:
+                vcpu->stat.dcr_exits++;
+                break;
+        case DSI_EXITS:
+                vcpu->stat.dsi_exits++;
+                break;
+        case ISI_EXITS:
+                vcpu->stat.isi_exits++;
+                break;
+        case SYSCALL_EXITS:
+                vcpu->stat.syscall_exits++;
+                break;
+        case DTLB_REAL_MISS_EXITS:
+                vcpu->stat.dtlb_real_miss_exits++;
+                break;
+        case DTLB_VIRT_MISS_EXITS:
+                vcpu->stat.dtlb_virt_miss_exits++;
+                break;
+        case MMIO_EXITS:
+                vcpu->stat.mmio_exits++;
+                break;
+        case ITLB_REAL_MISS_EXITS:
+                vcpu->stat.itlb_real_miss_exits++;
+                break;
+        case ITLB_VIRT_MISS_EXITS:
+                vcpu->stat.itlb_virt_miss_exits++;
+                break;
+        case SIGNAL_EXITS:
+                vcpu->stat.signal_exits++;
+                break;
+        }
+}
+
+/* wrapper to set exit time and account for it in kvm_stats */
+static inline void kvmppc_account_exit(struct kvm_vcpu *vcpu, int type)
+{
+        kvmppc_set_exit_type(vcpu, type);
+        kvmppc_account_exit_stat(vcpu, type);
+}
+
+#endif /* __POWERPC_KVM_EXITTIMING_H__ */
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index d69912c07ce7..8db35278a4b4 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -6,6 +6,9 @@ ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS            += -mno-minimal-toc
 endif
 
+CFLAGS_REMOVE_code-patching.o = -pg
+CFLAGS_REMOVE_feature-fixups.o = -pg
+
 obj-y                   := string.o alloc.o \
                            checksum_$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_PPC32)     += div64.o copy_32.o crtsavres.o
diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S
index 25ec5378afa4..70693a5c12a1 100644
--- a/arch/powerpc/lib/copyuser_64.S
+++ b/arch/powerpc/lib/copyuser_64.S
@@ -26,11 +26,24 @@ _GLOBAL(__copy_tofrom_user)
         andi.   r6,r6,7
         PPC_MTOCRF      0x01,r5
         blt     cr1,.Lshort_copy
+/* Below we want to nop out the bne if we're on a CPU that has the
+ * CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
+ * cleared.
+ * At the time of writing the only CPU that has this combination of bits
+ * set is Power6.
+ */
+BEGIN_FTR_SECTION
+        nop
+FTR_SECTION_ELSE
         bne     .Ldst_unaligned
+ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
+                    CPU_FTR_UNALIGNED_LD_STD)
 .Ldst_aligned:
-        andi.   r0,r4,7
         addi    r3,r3,-16
+BEGIN_FTR_SECTION
+        andi.   r0,r4,7
         bne     .Lsrc_unaligned
+END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
         srdi    r7,r5,4
 20:     ld      r9,0(r4)
         addi    r4,r4,-8
@@ -138,7 +151,7 @@ _GLOBAL(__copy_tofrom_user)
         PPC_MTOCRF      0x01,r6         /* put #bytes to 8B bdry into cr7 */
         subf    r5,r6,r5
         li      r7,0
-        cmpldi  r1,r5,16
+        cmpldi  cr1,r5,16
         bf      cr7*4+3,1f
 35:     lbz     r0,0(r4)
 81:     stb     r0,0(r3)
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index 31734c0969cd..b7dc4c19f582 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -77,26 +77,26 @@ static DEFINE_SPINLOCK(consistent_lock);
  * the amount of RAM found at boot time.)  I would imagine that get_vm_area()
  * would have to initialise this each time prior to calling vm_region_alloc().
  */
-struct vm_region {
+struct ppc_vm_region {
         struct list_head        vm_list;
         unsigned long           vm_start;
         unsigned long           vm_end;
 };
 
-static struct vm_region consistent_head = {
+static struct ppc_vm_region consistent_head = {
         .vm_list        = LIST_HEAD_INIT(consistent_head.vm_list),
         .vm_start       = CONSISTENT_BASE,
         .vm_end         = CONSISTENT_END,
 };
 
-static struct vm_region *
-vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp)
+static struct ppc_vm_region *
+ppc_vm_region_alloc(struct ppc_vm_region *head, size_t size, gfp_t gfp)
 {
         unsigned long addr = head->vm_start, end = head->vm_end - size;
         unsigned long flags;
-        struct vm_region *c, *new;
+        struct ppc_vm_region *c, *new;
 
-        new = kmalloc(sizeof(struct vm_region), gfp);
+        new = kmalloc(sizeof(struct ppc_vm_region), gfp);
         if (!new)
                 goto out;
 
@@ -130,9 +130,9 @@ vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp)
         return NULL;
 }
 
-static struct vm_region *vm_region_find(struct vm_region *head, unsigned long addr)
+static struct ppc_vm_region *ppc_vm_region_find(struct ppc_vm_region *head, unsigned long addr)
 {
-        struct vm_region *c;
+        struct ppc_vm_region *c;
 
         list_for_each_entry(c, &head->vm_list, vm_list) {
                 if (c->vm_start == addr)
@@ -151,7 +151,7 @@ void *
 __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
 {
         struct page *page;
-        struct vm_region *c;
+        struct ppc_vm_region *c;
         unsigned long order;
         u64 mask = 0x00ffffff, limit; /* ISA default */
 
@@ -191,7 +191,7 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
         /*
          * Allocate a virtual address in the consistent mapping region.
          */
-        c = vm_region_alloc(&consistent_head, size,
+        c = ppc_vm_region_alloc(&consistent_head, size,
                             gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
         if (c) {
                 unsigned long vaddr = c->vm_start;
@@ -239,7 +239,7 @@ EXPORT_SYMBOL(__dma_alloc_coherent);
  */
 void __dma_free_coherent(size_t size, void *vaddr)
 {
-        struct vm_region *c;
+        struct ppc_vm_region *c;
         unsigned long flags, addr;
         pte_t *ptep;
 
@@ -247,7 +247,7 @@ void __dma_free_coherent(size_t size, void *vaddr)
 
         spin_lock_irqsave(&consistent_lock, flags);
 
-        c = vm_region_find(&consistent_head, (unsigned long)vaddr);
+        c = ppc_vm_region_find(&consistent_head, (unsigned long)vaddr);
         if (!c)
                 goto no_area;
 
@@ -320,7 +320,6 @@ static int __init dma_alloc_init(void)
                         ret = -ENOMEM;
                         break;
                 }
-                WARN_ON(!pmd_none(*pmd));
 
                 pte = pte_alloc_kernel(pmd, CONSISTENT_BASE);
                 if (!pte) {
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S
index 3f131129d1c1..fe2d34e5332d 100644
--- a/arch/powerpc/lib/memcpy_64.S
+++ b/arch/powerpc/lib/memcpy_64.S
@@ -18,11 +18,23 @@ _GLOBAL(memcpy)
         andi.   r6,r6,7
         dcbt    0,r4
         blt     cr1,.Lshort_copy
+/* Below we want to nop out the bne if we're on a CPU that has the
+   CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
+   cleared.
+   At the time of writing the only CPU that has this combination of bits
+   set is Power6. */
+BEGIN_FTR_SECTION
+        nop
+FTR_SECTION_ELSE
         bne     .Ldst_unaligned
+ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
+                    CPU_FTR_UNALIGNED_LD_STD)
 .Ldst_aligned:
-        andi.   r0,r4,7
         addi    r3,r3,-16
+BEGIN_FTR_SECTION
+        andi.   r0,r4,7
         bne     .Lsrc_unaligned
+END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
         srdi    r7,r5,4
         ld      r9,0(r4)
         addi    r4,r4,-8
@@ -131,7 +143,7 @@ _GLOBAL(memcpy)
         PPC_MTOCRF      0x01,r6         # put #bytes to 8B bdry into cr7
         subf    r5,r6,r5
         li      r7,0
-        cmpldi  r1,r5,16
+        cmpldi  cr1,r5,16
         bf      cr7*4+3,1f
         lbz     r0,0(r4)
         stb     r0,0(r3)
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index 03aa98dd9f0a..f9e506a735ae 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -11,6 +11,8 @@ obj-$(CONFIG_MATH_EMULATION)	+= fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
                                         mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
                                         mtfsf.o mtfsfi.o stfiwx.o stfs.o
 
+obj-$(CONFIG_SPE)               += math_efp.o
+
 CFLAGS_fabs.o = -fno-builtin-fabs
 CFLAGS_math.o = -fno-builtin-fabs
 
diff --git a/arch/powerpc/math-emu/fadd.c b/arch/powerpc/math-emu/fadd.c
index 04d3b4aa32ce..0158a16e2b82 100644
--- a/arch/powerpc/math-emu/fadd.c
+++ b/arch/powerpc/math-emu/fadd.c
@@ -13,7 +13,6 @@ fadd(void *frD, void *frA, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p\n", __func__, frD, frA, frB);
diff --git a/arch/powerpc/math-emu/fcmpo.c b/arch/powerpc/math-emu/fcmpo.c
index b5dc4498cd71..5bce011c2aec 100644
--- a/arch/powerpc/math-emu/fcmpo.c
+++ b/arch/powerpc/math-emu/fcmpo.c
@@ -14,7 +14,6 @@ fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
         FP_DECL_EX;
         int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
         long cmp;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB);
@@ -29,7 +28,7 @@ fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
 #endif
 
         if (A_c == FP_CLS_NAN || B_c == FP_CLS_NAN)
-                ret |= EFLAG_VXVC;
+                FP_SET_EXCEPTION(EFLAG_VXVC);
 
         FP_CMP_D(cmp, A, B, 2);
         cmp = code[(cmp + 1) & 3];
@@ -44,5 +43,5 @@ fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
         printk("CR: %08x\n", *ccr);
 #endif
 
-        return ret;
+        return FP_CUR_EXCEPTIONS;
 }
diff --git a/arch/powerpc/math-emu/fdiv.c b/arch/powerpc/math-emu/fdiv.c
index 2db15097d98e..a29239c05e3e 100644
--- a/arch/powerpc/math-emu/fdiv.c
+++ b/arch/powerpc/math-emu/fdiv.c
@@ -13,7 +13,6 @@ fdiv(void *frD, void *frA, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -28,22 +27,22 @@ fdiv(void *frD, void *frA, void *frB)
 #endif
 
         if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
-                ret |= EFLAG_VXZDZ;
+                FP_SET_EXCEPTION(EFLAG_VXZDZ);
 #ifdef DEBUG
                 printk("%s: FPSCR_VXZDZ raised\n", __func__);
 #endif
         }
         if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
-                ret |= EFLAG_VXIDI;
+                FP_SET_EXCEPTION(EFLAG_VXIDI);
 #ifdef DEBUG
                 printk("%s: FPSCR_VXIDI raised\n", __func__);
 #endif
         }
 
         if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
-                ret |= EFLAG_DIVZERO;
+                FP_SET_EXCEPTION(EFLAG_DIVZERO);
                 if (__FPU_TRAP_P(EFLAG_DIVZERO))
-                        return ret;
+                        return FP_CUR_EXCEPTIONS;
         }
         FP_DIV_D(R, A, B);
 
diff --git a/arch/powerpc/math-emu/fdivs.c b/arch/powerpc/math-emu/fdivs.c
index 797f6a9a20b5..526bc261275f 100644
--- a/arch/powerpc/math-emu/fdivs.c
+++ b/arch/powerpc/math-emu/fdivs.c
@@ -14,7 +14,6 @@ fdivs(void *frD, void *frA, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -29,22 +28,22 @@ fdivs(void *frD, void *frA, void *frB)
 #endif
 
         if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
-                ret |= EFLAG_VXZDZ;
+                FP_SET_EXCEPTION(EFLAG_VXZDZ);
 #ifdef DEBUG
                 printk("%s: FPSCR_VXZDZ raised\n", __func__);
 #endif
         }
         if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
-                ret |= EFLAG_VXIDI;
+                FP_SET_EXCEPTION(EFLAG_VXIDI);
 #ifdef DEBUG
                 printk("%s: FPSCR_VXIDI raised\n", __func__);
 #endif
         }
 
         if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
-                ret |= EFLAG_DIVZERO;
+                FP_SET_EXCEPTION(EFLAG_DIVZERO);
                 if (__FPU_TRAP_P(EFLAG_DIVZERO))
-                        return ret;
+                        return FP_CUR_EXCEPTIONS;
         }
 
         FP_DIV_D(R, A, B);
diff --git a/arch/powerpc/math-emu/fmadd.c b/arch/powerpc/math-emu/fmadd.c
index 925313aa6f82..8c3f20aa5a95 100644
--- a/arch/powerpc/math-emu/fmadd.c
+++ b/arch/powerpc/math-emu/fmadd.c
@@ -15,7 +15,6 @@ fmadd(void *frD, void *frA, void *frB, void *frC)
         FP_DECL_D(C);
         FP_DECL_D(T);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -33,12 +32,12 @@ fmadd(void *frD, void *frA, void *frB, void *frC)
 
         if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(T, A, C);
 
         if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, T, B);
 
diff --git a/arch/powerpc/math-emu/fmadds.c b/arch/powerpc/math-emu/fmadds.c
index aea80ef79399..794fb31e59d1 100644
--- a/arch/powerpc/math-emu/fmadds.c
+++ b/arch/powerpc/math-emu/fmadds.c
@@ -16,7 +16,6 @@ fmadds(void *frD, void *frA, void *frB, void *frC)
         FP_DECL_D(C);
         FP_DECL_D(T);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -34,12 +33,12 @@ fmadds(void *frD, void *frA, void *frB, void *frC)
 
         if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(T, A, C);
 
         if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, T, B);
 
diff --git a/arch/powerpc/math-emu/fmsub.c b/arch/powerpc/math-emu/fmsub.c
index a644d525fca6..626f6fed84ac 100644
--- a/arch/powerpc/math-emu/fmsub.c
+++ b/arch/powerpc/math-emu/fmsub.c
@@ -15,7 +15,6 @@ fmsub(void *frD, void *frA, void *frB, void *frC)
         FP_DECL_D(C);
         FP_DECL_D(T);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -33,7 +32,7 @@ fmsub(void *frD, void *frA, void *frB, void *frC)
 
         if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(T, A, C);
 
@@ -41,7 +40,7 @@ fmsub(void *frD, void *frA, void *frB, void *frC)
                 B_s ^= 1;
 
         if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, T, B);
 
diff --git a/arch/powerpc/math-emu/fmsubs.c b/arch/powerpc/math-emu/fmsubs.c
index 2fdeeb9bb569..3425bc899760 100644
--- a/arch/powerpc/math-emu/fmsubs.c
+++ b/arch/powerpc/math-emu/fmsubs.c
@@ -16,7 +16,6 @@ fmsubs(void *frD, void *frA, void *frB, void *frC)
         FP_DECL_D(C);
         FP_DECL_D(T);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -34,7 +33,7 @@ fmsubs(void *frD, void *frA, void *frB, void *frC)
 
         if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(T, A, C);
 
@@ -42,7 +41,7 @@ fmsubs(void *frD, void *frA, void *frB, void *frC)
                 B_s ^= 1;
 
         if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, T, B);
 
diff --git a/arch/powerpc/math-emu/fmul.c b/arch/powerpc/math-emu/fmul.c
index 391fd17d3440..2c1929779892 100644
--- a/arch/powerpc/math-emu/fmul.c
+++ b/arch/powerpc/math-emu/fmul.c
@@ -13,7 +13,6 @@ fmul(void *frD, void *frA, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -31,7 +30,7 @@ fmul(void *frD, void *frA, void *frB)
 
         if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(R, A, B);
 
diff --git a/arch/powerpc/math-emu/fmuls.c b/arch/powerpc/math-emu/fmuls.c
index 2d3ec5f7da20..f5ad5c9c77d0 100644
--- a/arch/powerpc/math-emu/fmuls.c
+++ b/arch/powerpc/math-emu/fmuls.c
@@ -14,7 +14,6 @@ fmuls(void *frD, void *frA, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -32,7 +31,7 @@ fmuls(void *frD, void *frA, void *frB)
 
         if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(R, A, B);
 
diff --git a/arch/powerpc/math-emu/fnmadd.c b/arch/powerpc/math-emu/fnmadd.c
index 2497b86494e5..e817bc5453ef 100644
--- a/arch/powerpc/math-emu/fnmadd.c
+++ b/arch/powerpc/math-emu/fnmadd.c
@@ -15,7 +15,6 @@ fnmadd(void *frD, void *frA, void *frB, void *frC)
         FP_DECL_D(C);
         FP_DECL_D(T);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -33,12 +32,12 @@ fnmadd(void *frD, void *frA, void *frB, void *frC)
 
         if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(T, A, C);
 
         if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, T, B);
 
diff --git a/arch/powerpc/math-emu/fnmadds.c b/arch/powerpc/math-emu/fnmadds.c
index ee9d71e0b376..4db4b7d9ba8d 100644
--- a/arch/powerpc/math-emu/fnmadds.c
+++ b/arch/powerpc/math-emu/fnmadds.c
@@ -16,7 +16,6 @@ fnmadds(void *frD, void *frA, void *frB, void *frC)
         FP_DECL_D(C);
         FP_DECL_D(T);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -34,12 +33,12 @@ fnmadds(void *frD, void *frA, void *frB, void *frC)
 
         if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(T, A, C);
 
         if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, T, B);
 
diff --git a/arch/powerpc/math-emu/fnmsub.c b/arch/powerpc/math-emu/fnmsub.c
index 3885a77acc93..f65979fa770e 100644
--- a/arch/powerpc/math-emu/fnmsub.c
+++ b/arch/powerpc/math-emu/fnmsub.c
@@ -15,7 +15,6 @@ fnmsub(void *frD, void *frA, void *frB, void *frC)
         FP_DECL_D(C);
         FP_DECL_D(T);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -33,7 +32,7 @@ fnmsub(void *frD, void *frA, void *frB, void *frC)
 
         if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(T, A, C);
 
@@ -41,7 +40,7 @@ fnmsub(void *frD, void *frA, void *frB, void *frC)
                 B_s ^= 1;
 
         if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, T, B);
 
diff --git a/arch/powerpc/math-emu/fnmsubs.c b/arch/powerpc/math-emu/fnmsubs.c
index f835dfeb0fd1..9021dacc03b8 100644
--- a/arch/powerpc/math-emu/fnmsubs.c
+++ b/arch/powerpc/math-emu/fnmsubs.c
@@ -16,7 +16,6 @@ fnmsubs(void *frD, void *frA, void *frB, void *frC)
         FP_DECL_D(C);
         FP_DECL_D(T);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -34,7 +33,7 @@ fnmsubs(void *frD, void *frA, void *frB, void *frC)
 
         if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
             (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
-                ret |= EFLAG_VXIMZ;
+                FP_SET_EXCEPTION(EFLAG_VXIMZ);
 
         FP_MUL_D(T, A, C);
 
@@ -42,7 +41,7 @@ fnmsubs(void *frD, void *frA, void *frB, void *frC)
                 B_s ^= 1;
 
         if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, T, B);
 
diff --git a/arch/powerpc/math-emu/fsqrt.c b/arch/powerpc/math-emu/fsqrt.c
index 3e90072693a0..a55fc7d49983 100644
--- a/arch/powerpc/math-emu/fsqrt.c
+++ b/arch/powerpc/math-emu/fsqrt.c
@@ -12,7 +12,6 @@ fsqrt(void *frD, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frB);
@@ -25,9 +24,9 @@ fsqrt(void *frD, void *frB)
 #endif
 
         if (B_s && B_c != FP_CLS_ZERO)
-                ret |= EFLAG_VXSQRT;
+                FP_SET_EXCEPTION(EFLAG_VXSQRT);
         if (B_c == FP_CLS_NAN)
-                ret |= EFLAG_VXSNAN;
+                FP_SET_EXCEPTION(EFLAG_VXSNAN);
 
         FP_SQRT_D(R, B);
 
diff --git a/arch/powerpc/math-emu/fsqrts.c b/arch/powerpc/math-emu/fsqrts.c
index 2843be986e2e..31dccbfc39ff 100644
--- a/arch/powerpc/math-emu/fsqrts.c
+++ b/arch/powerpc/math-emu/fsqrts.c
@@ -13,7 +13,6 @@ fsqrts(void *frD, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p %p\n", __func__, frD, frB);
@@ -26,9 +25,9 @@ fsqrts(void *frD, void *frB)
 #endif
 
         if (B_s && B_c != FP_CLS_ZERO)
-                ret |= EFLAG_VXSQRT;
+                FP_SET_EXCEPTION(EFLAG_VXSQRT);
         if (B_c == FP_CLS_NAN)
-                ret |= EFLAG_VXSNAN;
+                FP_SET_EXCEPTION(EFLAG_VXSNAN);
 
         FP_SQRT_D(R, B);
 
diff --git a/arch/powerpc/math-emu/fsub.c b/arch/powerpc/math-emu/fsub.c
index 78b09446a0e1..02c5dff458ba 100644
--- a/arch/powerpc/math-emu/fsub.c
+++ b/arch/powerpc/math-emu/fsub.c
@@ -13,7 +13,6 @@ fsub(void *frD, void *frA, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -31,7 +30,7 @@ fsub(void *frD, void *frA, void *frB)
                 B_s ^= 1;
 
         if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, A, B);
 
diff --git a/arch/powerpc/math-emu/fsubs.c b/arch/powerpc/math-emu/fsubs.c
index d3bf90863cf2..5d9b18c35e07 100644
--- a/arch/powerpc/math-emu/fsubs.c
+++ b/arch/powerpc/math-emu/fsubs.c
@@ -14,7 +14,6 @@ fsubs(void *frD, void *frA, void *frB)
         FP_DECL_D(B);
         FP_DECL_D(R);
         FP_DECL_EX;
-        int ret = 0;
 
 #ifdef DEBUG
         printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -32,7 +31,7 @@ fsubs(void *frD, void *frA, void *frB)
                 B_s ^= 1;
 
         if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
-                ret |= EFLAG_VXISI;
+                FP_SET_EXCEPTION(EFLAG_VXISI);
 
         FP_ADD_D(R, A, B);
 
diff --git a/arch/powerpc/math-emu/math_efp.c b/arch/powerpc/math-emu/math_efp.c
new file mode 100644
index 000000000000..41f4ef30e480
--- /dev/null
+++ b/arch/powerpc/math-emu/math_efp.c
@@ -0,0 +1,720 @@
+/*
+ * arch/powerpc/math-emu/math_efp.c
+ *
+ * Copyright (C) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Ebony Zhu,   <ebony.zhu@freescale.com>
+ *         Yu Liu,      <yu.liu@freescale.com>
+ *
+ * Derived from arch/alpha/math-emu/math.c
+ *              arch/powerpc/math-emu/math.c
+ *
+ * Description:
+ * This file is the exception handler to make E500 SPE instructions
+ * fully comply with IEEE-754 floating point standard.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/types.h>
+
+#include <asm/uaccess.h>
+#include <asm/reg.h>
+
+#define FP_EX_BOOKE_E500_SPE
+#include <asm/sfp-machine.h>
+
+#include <math-emu/soft-fp.h>
+#include <math-emu/single.h>
+#include <math-emu/double.h>
+
+#define EFAPU           0x4
+
+#define VCT             0x4
+#define SPFP            0x6
+#define DPFP            0x7
+
+#define EFSADD          0x2c0
+#define EFSSUB          0x2c1
+#define EFSABS          0x2c4
+#define EFSNABS         0x2c5
+#define EFSNEG          0x2c6
+#define EFSMUL          0x2c8
+#define EFSDIV          0x2c9
+#define EFSCMPGT        0x2cc
+#define EFSCMPLT        0x2cd
+#define EFSCMPEQ        0x2ce
+#define EFSCFD          0x2cf
+#define EFSCFSI         0x2d1
+#define EFSCTUI         0x2d4
+#define EFSCTSI         0x2d5
+#define EFSCTUF         0x2d6
+#define EFSCTSF         0x2d7
+#define EFSCTUIZ        0x2d8
+#define EFSCTSIZ        0x2da
+
+#define EVFSADD         0x280
+#define EVFSSUB         0x281
+#define EVFSABS         0x284
+#define EVFSNABS        0x285
+#define EVFSNEG         0x286
+#define EVFSMUL         0x288
+#define EVFSDIV         0x289
+#define EVFSCMPGT       0x28c
+#define EVFSCMPLT       0x28d
+#define EVFSCMPEQ       0x28e
+#define EVFSCTUI        0x294
+#define EVFSCTSI        0x295
+#define EVFSCTUF        0x296
+#define EVFSCTSF        0x297
+#define EVFSCTUIZ       0x298
+#define EVFSCTSIZ       0x29a
+
+#define EFDADD          0x2e0
+#define EFDSUB          0x2e1
+#define EFDABS          0x2e4
+#define EFDNABS         0x2e5
+#define EFDNEG          0x2e6
+#define EFDMUL          0x2e8
+#define EFDDIV          0x2e9
+#define EFDCTUIDZ       0x2ea
+#define EFDCTSIDZ       0x2eb
+#define EFDCMPGT        0x2ec
+#define EFDCMPLT        0x2ed
+#define EFDCMPEQ        0x2ee
+#define EFDCFS          0x2ef
+#define EFDCTUI         0x2f4
+#define EFDCTSI         0x2f5
+#define EFDCTUF         0x2f6
+#define EFDCTSF         0x2f7
+#define EFDCTUIZ        0x2f8
+#define EFDCTSIZ        0x2fa
+
+#define AB      2
+#define XA      3
+#define XB      4
+#define XCR     5
+#define NOTYPE  0
+
+#define SIGN_BIT_S      (1UL << 31)
+#define SIGN_BIT_D      (1ULL << 63)
+#define FP_EX_MASK      (FP_EX_INEXACT | FP_EX_INVALID | FP_EX_DIVZERO | \
+                        FP_EX_UNDERFLOW | FP_EX_OVERFLOW)
+
+union dw_union {
+        u64 dp[1];
+        u32 wp[2];
+};
+
+static unsigned long insn_type(unsigned long speinsn)
+{
+        unsigned long ret = NOTYPE;
+
+        switch (speinsn & 0x7ff) {
+        case EFSABS:    ret = XA;       break;
+        case EFSADD:    ret = AB;       break;
+        case EFSCFD:    ret = XB;       break;
+        case EFSCMPEQ:  ret = XCR;      break;
+        case EFSCMPGT:  ret = XCR;      break;
+        case EFSCMPLT:  ret = XCR;      break;
+        case EFSCTSF:   ret = XB;       break;
+        case EFSCTSI:   ret = XB;       break;
+        case EFSCTSIZ:  ret = XB;       break;
+        case EFSCTUF:   ret = XB;       break;
+        case EFSCTUI:   ret = XB;       break;
+        case EFSCTUIZ:  ret = XB;       break;
+        case EFSDIV:    ret = AB;       break;
+        case EFSMUL:    ret = AB;       break;
+        case EFSNABS:   ret = XA;       break;
+        case EFSNEG:    ret = XA;       break;
+        case EFSSUB:    ret = AB;       break;
+        case EFSCFSI:   ret = XB;       break;
+
+        case EVFSABS:   ret = XA;       break;
+        case EVFSADD:   ret = AB;       break;
+        case EVFSCMPEQ: ret = XCR;      break;
+        case EVFSCMPGT: ret = XCR;      break;
+        case EVFSCMPLT: ret = XCR;      break;
+        case EVFSCTSF:  ret = XB;       break;
+        case EVFSCTSI:  ret = XB;       break;
+        case EVFSCTSIZ: ret = XB;       break;
+        case EVFSCTUF:  ret = XB;       break;
+        case EVFSCTUI:  ret = XB;       break;
+        case EVFSCTUIZ: ret = XB;       break;
+        case EVFSDIV:   ret = AB;       break;
+        case EVFSMUL:   ret = AB;       break;
+        case EVFSNABS:  ret = XA;       break;
+        case EVFSNEG:   ret = XA;       break;
+        case EVFSSUB:   ret = AB;       break;
+
+        case EFDABS:    ret = XA;       break;
+        case EFDADD:    ret = AB;       break;
+        case EFDCFS:    ret = XB;       break;
+        case EFDCMPEQ:  ret = XCR;      break;
+        case EFDCMPGT:  ret = XCR;      break;
+        case EFDCMPLT:  ret = XCR;      break;
+        case EFDCTSF:   ret = XB;       break;
+        case EFDCTSI:   ret = XB;       break;
+        case EFDCTSIDZ: ret = XB;       break;
+        case EFDCTSIZ:  ret = XB;       break;
+        case EFDCTUF:   ret = XB;       break;
+        case EFDCTUI:   ret = XB;       break;
+        case EFDCTUIDZ: ret = XB;       break;
+        case EFDCTUIZ:  ret = XB;       break;
+        case EFDDIV:    ret = AB;       break;
+        case EFDMUL:    ret = AB;       break;
+        case EFDNABS:   ret = XA;       break;
+        case EFDNEG:    ret = XA;       break;
+        case EFDSUB:    ret = AB;       break;
+
+        default:
+                printk(KERN_ERR "\nOoops! SPE instruction no type found.");
+                printk(KERN_ERR "\ninst code: %08lx\n", speinsn);
+        }
+
+        return ret;
+}
+
+int do_spe_mathemu(struct pt_regs *regs)
+{
+        FP_DECL_EX;
+        int IR, cmp;
+
+        unsigned long type, func, fc, fa, fb, src, speinsn;
+        union dw_union vc, va, vb;
+
+        if (get_user(speinsn, (unsigned int __user *) regs->nip))
+                return -EFAULT;
+        if ((speinsn >> 26) != EFAPU)
+                return -EINVAL;         /* not an spe instruction */
+
+        type = insn_type(speinsn);
+        if (type == NOTYPE)
+                return -ENOSYS;
+
+        func = speinsn & 0x7ff;
+        fc = (speinsn >> 21) & 0x1f;
+        fa = (speinsn >> 16) & 0x1f;
+        fb = (speinsn >> 11) & 0x1f;
+        src = (speinsn >> 5) & 0x7;
+
+        vc.wp[0] = current->thread.evr[fc];
+        vc.wp[1] = regs->gpr[fc];
+        va.wp[0] = current->thread.evr[fa];
+        va.wp[1] = regs->gpr[fa];
+        vb.wp[0] = current->thread.evr[fb];
+        vb.wp[1] = regs->gpr[fb];
+
+        __FPU_FPSCR = mfspr(SPRN_SPEFSCR);
+
+#ifdef DEBUG
+        printk("speinsn:%08lx spefscr:%08lx\n", speinsn, __FPU_FPSCR);
+        printk("vc: %08x  %08x\n", vc.wp[0], vc.wp[1]);
+        printk("va: %08x  %08x\n", va.wp[0], va.wp[1]);
+        printk("vb: %08x  %08x\n", vb.wp[0], vb.wp[1]);
+#endif
+
+        switch (src) {
+        case SPFP: {
+                FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
+
+                switch (type) {
+                case AB:
+                case XCR:
+                        FP_UNPACK_SP(SA, va.wp + 1);
+                case XB:
+                        FP_UNPACK_SP(SB, vb.wp + 1);
+                        break;
+                case XA:
+                        FP_UNPACK_SP(SA, va.wp + 1);
+                        break;
+                }
+
+#ifdef DEBUG
+                printk("SA: %ld %08lx %ld (%ld)\n", SA_s, SA_f, SA_e, SA_c);
+                printk("SB: %ld %08lx %ld (%ld)\n", SB_s, SB_f, SB_e, SB_c);
+#endif
+
+                switch (func) {
+                case EFSABS:
+                        vc.wp[1] = va.wp[1] & ~SIGN_BIT_S;
+                        goto update_regs;
+
+                case EFSNABS:
+                        vc.wp[1] = va.wp[1] | SIGN_BIT_S;
+                        goto update_regs;
+
+                case EFSNEG:
+                        vc.wp[1] = va.wp[1] ^ SIGN_BIT_S;
+                        goto update_regs;
+
+                case EFSADD:
+                        FP_ADD_S(SR, SA, SB);
+                        goto pack_s;
+
+                case EFSSUB:
+                        FP_SUB_S(SR, SA, SB);
+                        goto pack_s;
+
+                case EFSMUL:
+                        FP_MUL_S(SR, SA, SB);
+                        goto pack_s;
+
+                case EFSDIV:
+                        FP_DIV_S(SR, SA, SB);
+                        goto pack_s;
+
+                case EFSCMPEQ:
+                        cmp = 0;
+                        goto cmp_s;
+
+                case EFSCMPGT:
+                        cmp = 1;
+                        goto cmp_s;
+
+                case EFSCMPLT:
+                        cmp = -1;
+                        goto cmp_s;
+
+                case EFSCTSF:
+                case EFSCTUF:
+                        if (!((vb.wp[1] >> 23) == 0xff && ((vb.wp[1] & 0x7fffff) > 0))) {
+                                /* NaN */
+                                if (((vb.wp[1] >> 23) & 0xff) == 0) {
+                                        /* denorm */
+                                        vc.wp[1] = 0x0;
+                                } else if ((vb.wp[1] >> 31) == 0) {
+                                        /* positive normal */
+                                        vc.wp[1] = (func == EFSCTSF) ?
+                                                0x7fffffff : 0xffffffff;
+                                } else { /* negative normal */
+                                        vc.wp[1] = (func == EFSCTSF) ?
+                                                0x80000000 : 0x0;
+                                }
+                        } else { /* rB is NaN */
+                                vc.wp[1] = 0x0;
+                        }
+                        goto update_regs;
+
+                case EFSCFD: {
+                        FP_DECL_D(DB);
+                        FP_CLEAR_EXCEPTIONS;
+                        FP_UNPACK_DP(DB, vb.dp);
+#ifdef DEBUG
+                        printk("DB: %ld %08lx %08lx %ld (%ld)\n",
+                                        DB_s, DB_f1, DB_f0, DB_e, DB_c);
+#endif
+                        FP_CONV(S, D, 1, 2, SR, DB);
+                        goto pack_s;
+                }
+
+                case EFSCTSI:
+                case EFSCTSIZ:
+                case EFSCTUI:
+                case EFSCTUIZ:
+                        if (func & 0x4) {
+                                _FP_ROUND(1, SB);
+                        } else {
+                                _FP_ROUND_ZERO(1, SB);
+                        }
+                        FP_TO_INT_S(vc.wp[1], SB, 32, ((func & 0x3) != 0));
+                        goto update_regs;
+
+                default:
+                        goto illegal;
+                }
+                break;
+
+pack_s:
+#ifdef DEBUG
+                printk("SR: %ld %08lx %ld (%ld)\n", SR_s, SR_f, SR_e, SR_c);
+#endif
+                FP_PACK_SP(vc.wp + 1, SR);
+                goto update_regs;
+
+cmp_s:
+                FP_CMP_S(IR, SA, SB, 3);
+                if (IR == 3 && (FP_ISSIGNAN_S(SA) || FP_ISSIGNAN_S(SB)))
+                        FP_SET_EXCEPTION(FP_EX_INVALID);
+                if (IR == cmp) {
+                        IR = 0x4;
+                } else {
+                        IR = 0;
+                }
+                goto update_ccr;
+        }
+
+        case DPFP: {
+                FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);
+
+                switch (type) {
+                case AB:
+                case XCR:
+                        FP_UNPACK_DP(DA, va.dp);
+                case XB:
+                        FP_UNPACK_DP(DB, vb.dp);
+                        break;
+                case XA:
+                        FP_UNPACK_DP(DA, va.dp);
+                        break;
+                }
+
+#ifdef DEBUG
+                printk("DA: %ld %08lx %08lx %ld (%ld)\n",
+                                DA_s, DA_f1, DA_f0, DA_e, DA_c);
+                printk("DB: %ld %08lx %08lx %ld (%ld)\n",
+                                DB_s, DB_f1, DB_f0, DB_e, DB_c);
+#endif
+
+                switch (func) {
+                case EFDABS:
+                        vc.dp[0] = va.dp[0] & ~SIGN_BIT_D;
+                        goto update_regs;
+
+                case EFDNABS:
+                        vc.dp[0] = va.dp[0] | SIGN_BIT_D;
+                        goto update_regs;
+
+                case EFDNEG:
+                        vc.dp[0] = va.dp[0] ^ SIGN_BIT_D;
+                        goto update_regs;
+
+                case EFDADD:
+                        FP_ADD_D(DR, DA, DB);
+                        goto pack_d;
+
+                case EFDSUB:
+                        FP_SUB_D(DR, DA, DB);
+                        goto pack_d;
+
+                case EFDMUL:
+                        FP_MUL_D(DR, DA, DB);
+                        goto pack_d;
+
+                case EFDDIV:
+                        FP_DIV_D(DR, DA, DB);
+                        goto pack_d;
+
+                case EFDCMPEQ:
+                        cmp = 0;
+                        goto cmp_d;
+
+                case EFDCMPGT:
+                        cmp = 1;
+                        goto cmp_d;
+
+                case EFDCMPLT:
+                        cmp = -1;
+                        goto cmp_d;
+
+                case EFDCTSF:
+                case EFDCTUF:
+                        if (!((vb.wp[0] >> 20) == 0x7ff &&
+                           ((vb.wp[0] & 0xfffff) > 0 || (vb.wp[1] > 0)))) {
+                                /* not a NaN */
+                                if (((vb.wp[0] >> 20) & 0x7ff) == 0) {
+                                        /* denorm */
+                                        vc.wp[1] = 0x0;
+                                } else if ((vb.wp[0] >> 31) == 0) {
+                                        /* positive normal */
+                                        vc.wp[1] = (func == EFDCTSF) ?
+                                                0x7fffffff : 0xffffffff;
+                                } else { /* negative normal */
+                                        vc.wp[1] = (func == EFDCTSF) ?
+                                                0x80000000 : 0x0;
+                                }
+                        } else { /* NaN */
+                                vc.wp[1] = 0x0;
+                        }
+                        goto update_regs;
+
+                case EFDCFS: {
+                        FP_DECL_S(SB);
+                        FP_CLEAR_EXCEPTIONS;
+                        FP_UNPACK_SP(SB, vb.wp + 1);
+#ifdef DEBUG
+                        printk("SB: %ld %08lx %ld (%ld)\n",
+                                        SB_s, SB_f, SB_e, SB_c);
+#endif
+                        FP_CONV(D, S, 2, 1, DR, SB);
+                        goto pack_d;
+                }
+
+                case EFDCTUIDZ:
+                case EFDCTSIDZ:
+                        _FP_ROUND_ZERO(2, DB);
+                        FP_TO_INT_D(vc.dp[0], DB, 64, ((func & 0x1) == 0));
+                        goto update_regs;
+
+                case EFDCTUI:
+                case EFDCTSI:
+                case EFDCTUIZ:
+                case EFDCTSIZ:
+                        if (func & 0x4) {
+                                _FP_ROUND(2, DB);
+                        } else {
+                                _FP_ROUND_ZERO(2, DB);
+                        }
+                        FP_TO_INT_D(vc.wp[1], DB, 32, ((func & 0x3) != 0));
+                        goto update_regs;
+
+                default:
+                        goto illegal;
+                }
+                break;
+
+pack_d:
+#ifdef DEBUG
+                printk("DR: %ld %08lx %08lx %ld (%ld)\n",
+                                DR_s, DR_f1, DR_f0, DR_e, DR_c);
+#endif
+                FP_PACK_DP(vc.dp, DR);
+                goto update_regs;
+
+cmp_d:
+                FP_CMP_D(IR, DA, DB, 3);
+                if (IR == 3 && (FP_ISSIGNAN_D(DA) || FP_ISSIGNAN_D(DB)))
+                        FP_SET_EXCEPTION(FP_EX_INVALID);
+                if (IR == cmp) {
+                        IR = 0x4;
+                } else {
+                        IR = 0;
+                }
+                goto update_ccr;
+
+        }
+
+        case VCT: {
+                FP_DECL_S(SA0); FP_DECL_S(SB0); FP_DECL_S(SR0);
+                FP_DECL_S(SA1); FP_DECL_S(SB1); FP_DECL_S(SR1);
+                int IR0, IR1;
+
+                switch (type) {
+                case AB:
+                case XCR:
+                        FP_UNPACK_SP(SA0, va.wp);
+                        FP_UNPACK_SP(SA1, va.wp + 1);
+                case XB:
+                        FP_UNPACK_SP(SB0, vb.wp);
+                        FP_UNPACK_SP(SB1, vb.wp + 1);
+                        break;
+                case XA:
+                        FP_UNPACK_SP(SA0, va.wp);
+                        FP_UNPACK_SP(SA1, va.wp + 1);
+                        break;
+                }
+
+#ifdef DEBUG
+                printk("SA0: %ld %08lx %ld (%ld)\n", SA0_s, SA0_f, SA0_e, SA0_c);
+                printk("SA1: %ld %08lx %ld (%ld)\n", SA1_s, SA1_f, SA1_e, SA1_c);
+                printk("SB0: %ld %08lx %ld (%ld)\n", SB0_s, SB0_f, SB0_e, SB0_c);
+                printk("SB1: %ld %08lx %ld (%ld)\n", SB1_s, SB1_f, SB1_e, SB1_c);
+#endif
+
+                switch (func) {
+                case EVFSABS:
+                        vc.wp[0] = va.wp[0] & ~SIGN_BIT_S;
+                        vc.wp[1] = va.wp[1] & ~SIGN_BIT_S;
+                        goto update_regs;
+
+                case EVFSNABS:
+                        vc.wp[0] = va.wp[0] | SIGN_BIT_S;
+                        vc.wp[1] = va.wp[1] | SIGN_BIT_S;
+                        goto update_regs;
+
+                case EVFSNEG:
+                        vc.wp[0] = va.wp[0] ^ SIGN_BIT_S;
+                        vc.wp[1] = va.wp[1] ^ SIGN_BIT_S;
+                        goto update_regs;
+
+                case EVFSADD:
+                        FP_ADD_S(SR0, SA0, SB0);
+                        FP_ADD_S(SR1, SA1, SB1);
+                        goto pack_vs;
+
+                case EVFSSUB:
+                        FP_SUB_S(SR0, SA0, SB0);
+                        FP_SUB_S(SR1, SA1, SB1);
+                        goto pack_vs;
+
+                case EVFSMUL:
+                        FP_MUL_S(SR0, SA0, SB0);
+                        FP_MUL_S(SR1, SA1, SB1);
+                        goto pack_vs;
+
+                case EVFSDIV:
+                        FP_DIV_S(SR0, SA0, SB0);
+                        FP_DIV_S(SR1, SA1, SB1);
+                        goto pack_vs;
+
+                case EVFSCMPEQ:
+                        cmp = 0;
+                        goto cmp_vs;
+
+                case EVFSCMPGT:
+                        cmp = 1;
+                        goto cmp_vs;
+
+                case EVFSCMPLT:
+                        cmp = -1;
+                        goto cmp_vs;
+
+                case EVFSCTSF:
+                        __asm__ __volatile__ ("mtspr 512, %4\n"
+                                "efsctsf %0, %2\n"
+                                "efsctsf %1, %3\n"
+                                : "=r" (vc.wp[0]), "=r" (vc.wp[1])
+                                : "r" (vb.wp[0]), "r" (vb.wp[1]), "r" (0));
+                        goto update_regs;
+
+                case EVFSCTUF:
+                        __asm__ __volatile__ ("mtspr 512, %4\n"
+                                "efsctuf %0, %2\n"
+                                "efsctuf %1, %3\n"
+                                : "=r" (vc.wp[0]), "=r" (vc.wp[1])
+                                : "r" (vb.wp[0]), "r" (vb.wp[1]), "r" (0));
+                        goto update_regs;
+
+                case EVFSCTUI:
+                case EVFSCTSI:
+                case EVFSCTUIZ:
+                case EVFSCTSIZ:
+                        if (func & 0x4) {
+                                _FP_ROUND(1, SB0);
+                                _FP_ROUND(1, SB1);
+                        } else {
+                                _FP_ROUND_ZERO(1, SB0);
+                                _FP_ROUND_ZERO(1, SB1);
+                        }
+                        FP_TO_INT_S(vc.wp[0], SB0, 32, ((func & 0x3) != 0));
+                        FP_TO_INT_S(vc.wp[1], SB1, 32, ((func & 0x3) != 0));
+                        goto update_regs;
+
+                default:
+                        goto illegal;
+                }
+                break;
+
+pack_vs:
+#ifdef DEBUG
+                printk("SR0: %ld %08lx %ld (%ld)\n", SR0_s, SR0_f, SR0_e, SR0_c);
+                printk("SR1: %ld %08lx %ld (%ld)\n", SR1_s, SR1_f, SR1_e, SR1_c);
+#endif
+                FP_PACK_SP(vc.wp, SR0);
+                FP_PACK_SP(vc.wp + 1, SR1);
+                goto update_regs;
+
+cmp_vs:
+                {
+                        int ch, cl;
+
+                        FP_CMP_S(IR0, SA0, SB0, 3);
+                        FP_CMP_S(IR1, SA1, SB1, 3);
+                        if (IR0 == 3 && (FP_ISSIGNAN_S(SA0) || FP_ISSIGNAN_S(SB0)))
+                                FP_SET_EXCEPTION(FP_EX_INVALID);
+                        if (IR1 == 3 && (FP_ISSIGNAN_S(SA1) || FP_ISSIGNAN_S(SB1)))
+                                FP_SET_EXCEPTION(FP_EX_INVALID);
+                        ch = (IR0 == cmp) ? 1 : 0;
+                        cl = (IR1 == cmp) ? 1 : 0;
+                        IR = (ch << 3) | (cl << 2) | ((ch | cl) << 1) |
+                                ((ch & cl) << 0);
+                        goto update_ccr;
+                }
+        }
+        default:
+                return -EINVAL;
+        }
+
+update_ccr:
+        regs->ccr &= ~(15 << ((7 - ((speinsn >> 23) & 0x7)) << 2));
+        regs->ccr |= (IR << ((7 - ((speinsn >> 23) & 0x7)) << 2));
+
+update_regs:
+        __FPU_FPSCR &= ~FP_EX_MASK;
+        __FPU_FPSCR |= (FP_CUR_EXCEPTIONS & FP_EX_MASK);
+        mtspr(SPRN_SPEFSCR, __FPU_FPSCR);
+
+        current->thread.evr[fc] = vc.wp[0];
+        regs->gpr[fc] = vc.wp[1];
+
+#ifdef DEBUG
+        printk("ccr = %08lx\n", regs->ccr);
+        printk("cur exceptions = %08x spefscr = %08lx\n",
+                        FP_CUR_EXCEPTIONS, __FPU_FPSCR);
+        printk("vc: %08x  %08x\n", vc.wp[0], vc.wp[1]);
+        printk("va: %08x  %08x\n", va.wp[0], va.wp[1]);
+        printk("vb: %08x  %08x\n", vb.wp[0], vb.wp[1]);
+#endif
+
+        return 0;
+
+illegal:
+        printk(KERN_ERR "\nOoops! IEEE-754 compliance handler encountered un-supported instruction.\ninst code: %08lx\n", speinsn);
+        return -ENOSYS;
+}
+
+int speround_handler(struct pt_regs *regs)
+{
+        union dw_union fgpr;
+        int s_lo, s_hi;
+        unsigned long speinsn, type, fc;
+
+        if (get_user(speinsn, (unsigned int __user *) regs->nip))
+                return -EFAULT;
+        if ((speinsn >> 26) != 4)
+                return -EINVAL;         /* not an spe instruction */
+
+        type = insn_type(speinsn & 0x7ff);
+        if (type == XCR) return -ENOSYS;
+
+        fc = (speinsn >> 21) & 0x1f;
+        s_lo = regs->gpr[fc] & SIGN_BIT_S;
+        s_hi = current->thread.evr[fc] & SIGN_BIT_S;
+        fgpr.wp[0] = current->thread.evr[fc];
+        fgpr.wp[1] = regs->gpr[fc];
+
+        __FPU_FPSCR = mfspr(SPRN_SPEFSCR);
+
+        switch ((speinsn >> 5) & 0x7) {
+        /* Since SPE instructions on E500 core can handle round to nearest
+         * and round toward zero with IEEE-754 complied, we just need
+         * to handle round toward +Inf and round toward -Inf by software.
+         */
+        case SPFP:
+                if ((FP_ROUNDMODE) == FP_RND_PINF) {
+                        if (!s_lo) fgpr.wp[1]++; /* Z > 0, choose Z1 */
+                } else { /* round to -Inf */
+                        if (s_lo) fgpr.wp[1]++; /* Z < 0, choose Z2 */
+                }
+                break;
+
+        case DPFP:
+                if (FP_ROUNDMODE == FP_RND_PINF) {
+                        if (!s_hi) fgpr.dp[0]++; /* Z > 0, choose Z1 */
+                } else { /* round to -Inf */
+                        if (s_hi) fgpr.dp[0]++; /* Z < 0, choose Z2 */
+                }
+                break;
+
+        case VCT:
+                if (FP_ROUNDMODE == FP_RND_PINF) {
+                        if (!s_lo) fgpr.wp[1]++; /* Z_low > 0, choose Z1 */
+                        if (!s_hi) fgpr.wp[0]++; /* Z_high word > 0, choose Z1 */
+                } else { /* round to -Inf */
+                        if (s_lo) fgpr.wp[1]++; /* Z_low < 0, choose Z2 */
+                        if (s_hi) fgpr.wp[0]++; /* Z_high < 0, choose Z2 */
+                }
+                break;
+
+        default:
+                return -EINVAL;
+        }
+
+        current->thread.evr[fc] = fgpr.wp[0];
+        regs->gpr[fc] = fgpr.wp[1];
+
+        return 0;
+}
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index e7392b45a5ef..953cc4a1cde5 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -6,17 +6,19 @@ ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS    += -mno-minimal-toc
 endif
 
-obj-y                           := fault.o mem.o \
+obj-y                           := fault.o mem.o pgtable.o \
                                    init_$(CONFIG_WORD_SIZE).o \
-                                   pgtable_$(CONFIG_WORD_SIZE).o \
-                                   mmu_context_$(CONFIG_WORD_SIZE).o
+                                   pgtable_$(CONFIG_WORD_SIZE).o
+obj-$(CONFIG_PPC_MMU_NOHASH)    += mmu_context_nohash.o tlb_nohash.o \
+                                   tlb_nohash_low.o
 hash-$(CONFIG_PPC_NATIVE)       := hash_native_64.o
 obj-$(CONFIG_PPC64)             += hash_utils_64.o \
                                    slb_low.o slb.o stab.o \
                                    gup.o mmap.o $(hash-y)
 obj-$(CONFIG_PPC_STD_MMU_32)    += ppc_mmu_32.o
 obj-$(CONFIG_PPC_STD_MMU)       += hash_low_$(CONFIG_WORD_SIZE).o \
-                                   tlb_$(CONFIG_WORD_SIZE).o
+                                   tlb_hash$(CONFIG_WORD_SIZE).o \
+                                   mmu_context_hash$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_40x)               += 40x_mmu.o
 obj-$(CONFIG_44x)               += 44x_mmu.o
 obj-$(CONFIG_FSL_BOOKE)         += fsl_booke_mmu.o
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 565b7a237c84..91c7b8636b8a 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -30,6 +30,7 @@
 #include <linux/kprobes.h>
 #include <linux/kdebug.h>
 
+#include <asm/firmware.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/mmu.h>
@@ -283,7 +284,7 @@ good_area:
                                 }
                                 pte_update(ptep, 0, _PAGE_HWEXEC |
                                            _PAGE_ACCESSED);
-                                _tlbie(address, mm->context.id);
+                                local_flush_tlb_page(vma, address);
                                 pte_unmap_unlock(ptep, ptl);
                                 up_read(&mm->mmap_sem);
                                 return 0;
@@ -318,9 +319,16 @@ good_area:
                         goto do_sigbus;
                 BUG();
         }
-        if (ret & VM_FAULT_MAJOR)
+        if (ret & VM_FAULT_MAJOR) {
                 current->maj_flt++;
-        else
+#ifdef CONFIG_PPC_SMLPAR
+                if (firmware_has_feature(FW_FEATURE_CMO)) {
+                        preempt_disable();
+                        get_lppaca()->page_ins += (1 << PAGE_FACTOR);
+                        preempt_enable();
+                }
+#endif
+        } else
                 current->min_flt++;
         up_read(&mm->mmap_sem);
         return 0;
@@ -339,7 +347,7 @@ bad_area_nosemaphore:
             && printk_ratelimit())
                 printk(KERN_CRIT "kernel tried to execute NX-protected"
                        " page (%lx) - exploit attempt? (uid: %d)\n",
-                       address, current->uid);
+                       address, current_uid());
 
         return SIGSEGV;
 
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index 7bffb70b9fe2..67850ec9feb3 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -36,36 +36,6 @@ mmu_hash_lock:
 #endif /* CONFIG_SMP */
 
 /*
- * Sync CPUs with hash_page taking & releasing the hash
- * table lock
- */
-#ifdef CONFIG_SMP
-        .text
-_GLOBAL(hash_page_sync)
-        mfmsr   r10
-        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
-        mtmsr   r0
-        lis     r8,mmu_hash_lock@h
-        ori     r8,r8,mmu_hash_lock@l
-        lis     r0,0x0fff
-        b       10f
-11:     lwz     r6,0(r8)
-        cmpwi   0,r6,0
-        bne     11b
-10:     lwarx   r6,0,r8
-        cmpwi   0,r6,0
-        bne-    11b
-        stwcx.  r0,0,r8
-        bne-    10b
-        isync
-        eieio
-        li      r0,0
-        stw     r0,0(r8)
-        mtmsr   r10
-        blr
-#endif /* CONFIG_SMP */
-
-/*
  * Load a PTE into the hash table, if possible.
  * The address is in r4, and r3 contains an access flag:
  * _PAGE_RW (0x400) if a write.
@@ -353,8 +323,8 @@ _GLOBAL(create_hpte)
         ori     r8,r8,0xe14             /* clear out reserved bits and M */
         andc    r8,r5,r8                /* PP = user? (rw&dirty? 2: 3): 0 */
 BEGIN_FTR_SECTION
-        ori     r8,r8,_PAGE_COHERENT    /* set M (coherence required) */
-END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT)
+        rlwinm  r8,r8,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
 #ifdef CONFIG_PTE_64BIT
         /* Put the XPN bits into the PTE */
         rlwimi  r8,r10,8,20,22
@@ -663,3 +633,80 @@ _GLOBAL(flush_hash_patch_B)
         SYNC_601
         isync
         blr
+
+/*
+ * Flush an entry from the TLB
+ */
+_GLOBAL(_tlbie)
+#ifdef CONFIG_SMP
+        rlwinm  r8,r1,0,0,(31-THREAD_SHIFT)
+        lwz     r8,TI_CPU(r8)
+        oris    r8,r8,11
+        mfmsr   r10
+        SYNC
+        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
+        rlwinm  r0,r0,0,28,26           /* clear DR */
+        mtmsr   r0
+        SYNC_601
+        isync
+        lis     r9,mmu_hash_lock@h
+        ori     r9,r9,mmu_hash_lock@l
+        tophys(r9,r9)
+10:     lwarx   r7,0,r9
+        cmpwi   0,r7,0
+        bne-    10b
+        stwcx.  r8,0,r9
+        bne-    10b
+        eieio
+        tlbie   r3
+        sync
+        TLBSYNC
+        li      r0,0
+        stw     r0,0(r9)                /* clear mmu_hash_lock */
+        mtmsr   r10
+        SYNC_601
+        isync
+#else /* CONFIG_SMP */
+        tlbie   r3
+        sync
+#endif /* CONFIG_SMP */
+        blr
+
+/*
+ * Flush the entire TLB. 603/603e only
+ */
+_GLOBAL(_tlbia)
+#if defined(CONFIG_SMP)
+        rlwinm  r8,r1,0,0,(31-THREAD_SHIFT)
+        lwz     r8,TI_CPU(r8)
+        oris    r8,r8,10
+        mfmsr   r10
+        SYNC
+        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
+        rlwinm  r0,r0,0,28,26           /* clear DR */
+        mtmsr   r0
+        SYNC_601
+        isync
+        lis     r9,mmu_hash_lock@h
+        ori     r9,r9,mmu_hash_lock@l
+        tophys(r9,r9)
+10:     lwarx   r7,0,r9
+        cmpwi   0,r7,0
+        bne-    10b
+        stwcx.  r8,0,r9
+        bne-    10b
+        sync
+        tlbia
+        sync
+        TLBSYNC
+        li      r0,0
+        stw     r0,0(r9)                /* clear mmu_hash_lock */
+        mtmsr   r10
+        SYNC_601
+        isync
+#else /* CONFIG_SMP */
+        sync
+        tlbia
+        sync
+#endif /* CONFIG_SMP */
+        blr
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index f0c3b88d50fa..9920d6a7cf29 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -53,8 +53,7 @@ unsigned int mmu_huge_psizes[MMU_PAGE_COUNT] = { }; /* initialize all to 0 */
 
 /* Subtract one from array size because we don't need a cache for 4K since
  * is not a huge page size */
-#define huge_pgtable_cache(psize)       (pgtable_cache[HUGEPTE_CACHE_NUM \
-                                                        + psize-1])
+#define HUGE_PGTABLE_INDEX(psize)       (HUGEPTE_CACHE_NUM + psize - 1)
 #define HUGEPTE_CACHE_NAME(psize)       (huge_pgtable_cache_name[psize])
 
 static const char *huge_pgtable_cache_name[MMU_PAGE_COUNT] = {
@@ -113,7 +112,7 @@ static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
 static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
                            unsigned long address, unsigned int psize)
 {
-        pte_t *new = kmem_cache_zalloc(huge_pgtable_cache(psize),
+        pte_t *new = kmem_cache_zalloc(pgtable_cache[HUGE_PGTABLE_INDEX(psize)],
                                       GFP_KERNEL|__GFP_REPEAT);
 
         if (! new)
@@ -121,7 +120,7 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
 
         spin_lock(&mm->page_table_lock);
         if (!hugepd_none(*hpdp))
-                kmem_cache_free(huge_pgtable_cache(psize), new);
+                kmem_cache_free(pgtable_cache[HUGE_PGTABLE_INDEX(psize)], new);
         else
                 hpdp->pd = (unsigned long)new | HUGEPD_OK;
         spin_unlock(&mm->page_table_lock);
@@ -513,6 +512,13 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
         return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
 }
 
+unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
+{
+        unsigned int psize = get_slice_psize(vma->vm_mm, vma->vm_start);
+
+        return 1UL << mmu_psize_to_shift(psize);
+}
+
 /*
  * Called by asm hashtable.S for doing lazy icache flush
  */
@@ -763,13 +769,14 @@ static int __init hugetlbpage_init(void)
 
         for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
                 if (mmu_huge_psizes[psize]) {
-                        huge_pgtable_cache(psize) = kmem_cache_create(
-                                                HUGEPTE_CACHE_NAME(psize),
-                                                HUGEPTE_TABLE_SIZE(psize),
-                                                HUGEPTE_TABLE_SIZE(psize),
-                                                0,
-                                                NULL);
-                        if (!huge_pgtable_cache(psize))
+                        pgtable_cache[HUGE_PGTABLE_INDEX(psize)] =
+                                kmem_cache_create(
+                                        HUGEPTE_CACHE_NAME(psize),
+                                        HUGEPTE_TABLE_SIZE(psize),
+                                        HUGEPTE_TABLE_SIZE(psize),
+                                        0,
+                                        NULL);
+                        if (!pgtable_cache[HUGE_PGTABLE_INDEX(psize)])
                                 panic("hugetlbpage_init(): could not create %s"\
                                       "\n", HUGEPTE_CACHE_NAME(psize));
                 }
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 388ceda632f3..666a5e8a5be1 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -35,7 +35,6 @@
 #include <asm/pgalloc.h>
 #include <asm/prom.h>
 #include <asm/io.h>
-#include <asm/mmu_context.h>
 #include <asm/pgtable.h>
 #include <asm/mmu.h>
 #include <asm/smp.h>
@@ -49,7 +48,7 @@
 
 #if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
 /* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */
-#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - KERNELBASE))
+#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - PAGE_OFFSET))
 #error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL"
 #endif
 #endif
@@ -180,9 +179,6 @@ void __init MMU_init(void)
         if (ppc_md.progress)
                 ppc_md.progress("MMU:setio", 0x302);
 
-        /* Initialize the context management stuff */
-        mmu_context_init();
-
         if (ppc_md.progress)
                 ppc_md.progress("MMU:exit", 0x211);
 
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index b9e1a1da6e52..f00f09a77f12 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -102,8 +102,8 @@ pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
                 return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
 
         if (!page_is_ram(pfn))
-                vma_prot = __pgprot(pgprot_val(vma_prot)
-                                    | _PAGE_GUARDED | _PAGE_NO_CACHE);
+                vma_prot = pgprot_noncached(vma_prot);
+
         return vma_prot;
 }
 EXPORT_SYMBOL(phys_mem_access_prot);
@@ -132,7 +132,7 @@ int arch_add_memory(int nid, u64 start, u64 size)
         /* this should work for most non-highmem platforms */
         zone = pgdata->node_zones;
 
-        return __add_pages(zone, start_pfn, nr_pages);
+        return __add_pages(nid, zone, start_pfn, nr_pages);
 }
 #endif /* CONFIG_MEMORY_HOTPLUG */
 
@@ -488,7 +488,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
                  * we invalidate the TLB here, thus avoiding dcbst
                  * misbehaviour.
                  */
-                _tlbie(address, 0 /* 8xx doesn't care about PID */);
+                _tlbil_va(address, 0 /* 8xx doesn't care about PID */);
 #endif
                 /* The _PAGE_USER test should really be _PAGE_EXEC, but
                  * older glibc versions execute some code from no-exec
diff --git a/arch/powerpc/mm/mmu_context_32.c b/arch/powerpc/mm/mmu_context_32.c
deleted file mode 100644
index cc32ba41d900..000000000000
--- a/arch/powerpc/mm/mmu_context_32.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * This file contains the routines for handling the MMU on those
- * PowerPC implementations where the MMU substantially follows the
- * architecture specification.  This includes the 6xx, 7xx, 7xxx,
- * 8260, and POWER3 implementations but excludes the 8xx and 4xx.
- *  -- paulus
- *
- *  Derived from arch/ppc/mm/init.c:
- *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
- *    Copyright (C) 1996 Paul Mackerras
- *
- *  Derived from "arch/i386/mm/init.c"
- *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/mmu_context.h>
-#include <asm/tlbflush.h>
-
-unsigned long next_mmu_context;
-unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
-#ifdef FEW_CONTEXTS
-atomic_t nr_free_contexts;
-struct mm_struct *context_mm[LAST_CONTEXT+1];
-void steal_context(void);
-#endif /* FEW_CONTEXTS */
-
-/*
- * Initialize the context management stuff.
- */
-void __init
-mmu_context_init(void)
-{
-        /*
-         * Some processors have too few contexts to reserve one for
-         * init_mm, and require using context 0 for a normal task.
-         * Other processors reserve the use of context zero for the kernel.
-         * This code assumes FIRST_CONTEXT < 32.
-         */
-        context_map[0] = (1 << FIRST_CONTEXT) - 1;
-        next_mmu_context = FIRST_CONTEXT;
-#ifdef FEW_CONTEXTS
-        atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
-#endif /* FEW_CONTEXTS */
-}
-
-#ifdef FEW_CONTEXTS
-/*
- * Steal a context from a task that has one at the moment.
- * This is only used on 8xx and 4xx and we presently assume that
- * they don't do SMP.  If they do then this will have to check
- * whether the MM we steal is in use.
- * We also assume that this is only used on systems that don't
- * use an MMU hash table - this is true for 8xx and 4xx.
- * This isn't an LRU system, it just frees up each context in
- * turn (sort-of pseudo-random replacement :).  This would be the
- * place to implement an LRU scheme if anyone was motivated to do it.
- *  -- paulus
- */
-void
-steal_context(void)
-{
-        struct mm_struct *mm;
-
-        /* free up context `next_mmu_context' */
-        /* if we shouldn't free context 0, don't... */
-        if (next_mmu_context < FIRST_CONTEXT)
-                next_mmu_context = FIRST_CONTEXT;
-        mm = context_mm[next_mmu_context];
-        flush_tlb_mm(mm);
-        destroy_context(mm);
-}
-#endif /* FEW_CONTEXTS */
diff --git a/arch/powerpc/mm/mmu_context_hash32.c b/arch/powerpc/mm/mmu_context_hash32.c
new file mode 100644
index 000000000000..0dfba2bf7f31
--- /dev/null
+++ b/arch/powerpc/mm/mmu_context_hash32.c
@@ -0,0 +1,103 @@
+/*
+ * This file contains the routines for handling the MMU on those
+ * PowerPC implementations where the MMU substantially follows the
+ * architecture specification.  This includes the 6xx, 7xx, 7xxx,
+ * 8260, and POWER3 implementations but excludes the 8xx and 4xx.
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/mmu_context.h>
+#include <asm/tlbflush.h>
+
+/*
+ * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
+ * (virtual segment identifiers) for each context.  Although the
+ * hardware supports 24-bit VSIDs, and thus >1 million contexts,
+ * we only use 32,768 of them.  That is ample, since there can be
+ * at most around 30,000 tasks in the system anyway, and it means
+ * that we can use a bitmap to indicate which contexts are in use.
+ * Using a bitmap means that we entirely avoid all of the problems
+ * that we used to have when the context number overflowed,
+ * particularly on SMP systems.
+ *  -- paulus.
+ */
+#define NO_CONTEXT              ((unsigned long) -1)
+#define LAST_CONTEXT            32767
+#define FIRST_CONTEXT           1
+
+/*
+ * This function defines the mapping from contexts to VSIDs (virtual
+ * segment IDs).  We use a skew on both the context and the high 4 bits
+ * of the 32-bit virtual address (the "effective segment ID") in order
+ * to spread out the entries in the MMU hash table.  Note, if this
+ * function is changed then arch/ppc/mm/hashtable.S will have to be
+ * changed to correspond.
+ *
+ *
+ * CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
+ *                               & 0xffffff)
+ */
+
+static unsigned long next_mmu_context;
+static unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
+
+
+/*
+ * Set up the context for a new address space.
+ */
+int init_new_context(struct task_struct *t, struct mm_struct *mm)
+{
+        unsigned long ctx = next_mmu_context;
+
+        while (test_and_set_bit(ctx, context_map)) {
+                ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
+                if (ctx > LAST_CONTEXT)
+                        ctx = 0;
+        }
+        next_mmu_context = (ctx + 1) & LAST_CONTEXT;
+        mm->context.id = ctx;
+
+        return 0;
+}
+
+/*
+ * We're finished using the context for an address space.
+ */
+void destroy_context(struct mm_struct *mm)
+{
+        preempt_disable();
+        if (mm->context.id != NO_CONTEXT) {
+                clear_bit(mm->context.id, context_map);
+                mm->context.id = NO_CONTEXT;
+        }
+        preempt_enable();
+}
+
+/*
+ * Initialize the context management stuff.
+ */
+void __init mmu_context_init(void)
+{
+        /* Reserve context 0 for kernel use */
+        context_map[0] = (1 << FIRST_CONTEXT) - 1;
+        next_mmu_context = FIRST_CONTEXT;
+}
diff --git a/arch/powerpc/mm/mmu_context_64.c b/arch/powerpc/mm/mmu_context_hash64.c
index 1db38ba1f544..dbeb86ac90cd 100644
--- a/arch/powerpc/mm/mmu_context_64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -24,6 +24,14 @@
 static DEFINE_SPINLOCK(mmu_context_lock);
 static DEFINE_IDR(mmu_context_idr);
 
+/*
+ * The proto-VSID space has 2^35 - 1 segments available for user mappings.
+ * Each segment contains 2^28 bytes.  Each context maps 2^44 bytes,
+ * so we can support 2^19-1 contexts (19 == 35 + 28 - 44).
+ */
+#define NO_CONTEXT      0
+#define MAX_CONTEXT     ((1UL << 19) - 1)
+
 int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
         int index;
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
new file mode 100644
index 000000000000..52a0cfc38b64
--- /dev/null
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -0,0 +1,397 @@
+/*
+ * This file contains the routines for handling the MMU on those
+ * PowerPC implementations where the MMU is not using the hash
+ * table, such as 8xx, 4xx, BookE's etc...
+ *
+ * Copyright 2008 Ben Herrenschmidt <benh@kernel.crashing.org>
+ *                IBM Corp.
+ *
+ *  Derived from previous arch/powerpc/mm/mmu_context.c
+ *  and arch/powerpc/include/asm/mmu_context.h
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ * TODO:
+ *
+ *   - The global context lock will not scale very well
+ *   - The maps should be dynamically allocated to allow for processors
+ *     that support more PID bits at runtime
+ *   - Implement flush_tlb_mm() by making the context stale and picking
+ *     a new one
+ *   - More aggressively clear stale map bits and maybe find some way to
+ *     also clear mm->cpu_vm_mask bits when processes are migrated
+ */
+
+#undef DEBUG
+#define DEBUG_STEAL_ONLY
+#undef DEBUG_MAP_CONSISTENCY
+/*#define DEBUG_CLAMP_LAST_CONTEXT   15 */
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/bootmem.h>
+#include <linux/notifier.h>
+#include <linux/cpu.h>
+
+#include <asm/mmu_context.h>
+#include <asm/tlbflush.h>
+
+static unsigned int first_context, last_context;
+static unsigned int next_context, nr_free_contexts;
+static unsigned long *context_map;
+static unsigned long *stale_map[NR_CPUS];
+static struct mm_struct **context_mm;
+static spinlock_t context_lock = SPIN_LOCK_UNLOCKED;
+
+#define CTX_MAP_SIZE    \
+        (sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1))
+
+
+/* Steal a context from a task that has one at the moment.
+ *
+ * This is used when we are running out of available PID numbers
+ * on the processors.
+ *
+ * This isn't an LRU system, it just frees up each context in
+ * turn (sort-of pseudo-random replacement :).  This would be the
+ * place to implement an LRU scheme if anyone was motivated to do it.
+ *  -- paulus
+ *
+ * For context stealing, we use a slightly different approach for
+ * SMP and UP. Basically, the UP one is simpler and doesn't use
+ * the stale map as we can just flush the local CPU
+ *  -- benh
+ */
+#ifdef CONFIG_SMP
+static unsigned int steal_context_smp(unsigned int id)
+{
+        struct mm_struct *mm;
+        unsigned int cpu, max;
+
+ again:
+        max = last_context - first_context;
+
+        /* Attempt to free next_context first and then loop until we manage */
+        while (max--) {
+                /* Pick up the victim mm */
+                mm = context_mm[id];
+
+                /* We have a candidate victim, check if it's active, on SMP
+                 * we cannot steal active contexts
+                 */
+                if (mm->context.active) {
+                        id++;
+                        if (id > last_context)
+                                id = first_context;
+                        continue;
+                }
+                pr_debug("[%d] steal context %d from mm @%p\n",
+                         smp_processor_id(), id, mm);
+
+                /* Mark this mm has having no context anymore */
+                mm->context.id = MMU_NO_CONTEXT;
+
+                /* Mark it stale on all CPUs that used this mm */
+                for_each_cpu_mask_nr(cpu, mm->cpu_vm_mask)
+                        __set_bit(id, stale_map[cpu]);
+                return id;
+        }
+
+        /* This will happen if you have more CPUs than available contexts,
+         * all we can do here is wait a bit and try again
+         */
+        spin_unlock(&context_lock);
+        cpu_relax();
+        spin_lock(&context_lock);
+        goto again;
+}
+#endif  /* CONFIG_SMP */
+
+/* Note that this will also be called on SMP if all other CPUs are
+ * offlined, which means that it may be called for cpu != 0. For
+ * this to work, we somewhat assume that CPUs that are onlined
+ * come up with a fully clean TLB (or are cleaned when offlined)
+ */
+static unsigned int steal_context_up(unsigned int id)
+{
+        struct mm_struct *mm;
+        int cpu = smp_processor_id();
+
+        /* Pick up the victim mm */
+        mm = context_mm[id];
+
+        pr_debug("[%d] steal context %d from mm @%p\n", cpu, id, mm);
+
+        /* Mark this mm has having no context anymore */
+        mm->context.id = MMU_NO_CONTEXT;
+
+        /* Flush the TLB for that context */
+        local_flush_tlb_mm(mm);
+
+        /* XXX This clear should ultimately be part of local_flush_tlb_mm */
+        __clear_bit(id, stale_map[cpu]);
+
+        return id;
+}
+
+#ifdef DEBUG_MAP_CONSISTENCY
+static void context_check_map(void)
+{
+        unsigned int id, nrf, nact;
+
+        nrf = nact = 0;
+        for (id = first_context; id <= last_context; id++) {
+                int used = test_bit(id, context_map);
+                if (!used)
+                        nrf++;
+                if (used != (context_mm[id] != NULL))
+                        pr_err("MMU: Context %d is %s and MM is %p !\n",
+                               id, used ? "used" : "free", context_mm[id]);
+                if (context_mm[id] != NULL)
+                        nact += context_mm[id]->context.active;
+        }
+        if (nrf != nr_free_contexts) {
+                pr_err("MMU: Free context count out of sync ! (%d vs %d)\n",
+                       nr_free_contexts, nrf);
+                nr_free_contexts = nrf;
+        }
+        if (nact > num_online_cpus())
+                pr_err("MMU: More active contexts than CPUs ! (%d vs %d)\n",
+                       nact, num_online_cpus());
+        if (first_context > 0 && !test_bit(0, context_map))
+                pr_err("MMU: Context 0 has been freed !!!\n");
+}
+#else
+static void context_check_map(void) { }
+#endif
+
+void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
+{
+        unsigned int id, cpu = smp_processor_id();
+        unsigned long *map;
+
+        /* No lockless fast path .. yet */
+        spin_lock(&context_lock);
+
+#ifndef DEBUG_STEAL_ONLY
+        pr_debug("[%d] activating context for mm @%p, active=%d, id=%d\n",
+                 cpu, next, next->context.active, next->context.id);
+#endif
+
+#ifdef CONFIG_SMP
+        /* Mark us active and the previous one not anymore */
+        next->context.active++;
+        if (prev) {
+#ifndef DEBUG_STEAL_ONLY
+                pr_debug(" old context %p active was: %d\n",
+                         prev, prev->context.active);
+#endif
+                WARN_ON(prev->context.active < 1);
+                prev->context.active--;
+        }
+#endif /* CONFIG_SMP */
+
+        /* If we already have a valid assigned context, skip all that */
+        id = next->context.id;
+        if (likely(id != MMU_NO_CONTEXT))
+                goto ctxt_ok;
+
+        /* We really don't have a context, let's try to acquire one */
+        id = next_context;
+        if (id > last_context)
+                id = first_context;
+        map = context_map;
+
+        /* No more free contexts, let's try to steal one */
+        if (nr_free_contexts == 0) {
+#ifdef CONFIG_SMP
+                if (num_online_cpus() > 1) {
+                        id = steal_context_smp(id);
+                        goto stolen;
+                }
+#endif /* CONFIG_SMP */
+                id = steal_context_up(id);
+                goto stolen;
+        }
+        nr_free_contexts--;
+
+        /* We know there's at least one free context, try to find it */
+        while (__test_and_set_bit(id, map)) {
+                id = find_next_zero_bit(map, last_context+1, id);
+                if (id > last_context)
+                        id = first_context;
+        }
+ stolen:
+        next_context = id + 1;
+        context_mm[id] = next;
+        next->context.id = id;
+
+#ifndef DEBUG_STEAL_ONLY
+        pr_debug("[%d] picked up new id %d, nrf is now %d\n",
+                 cpu, id, nr_free_contexts);
+#endif
+
+        context_check_map();
+ ctxt_ok:
+
+        /* If that context got marked stale on this CPU, then flush the
+         * local TLB for it and unmark it before we use it
+         */
+        if (test_bit(id, stale_map[cpu])) {
+                pr_debug("[%d] flushing stale context %d for mm @%p !\n",
+                         cpu, id, next);
+                local_flush_tlb_mm(next);
+
+                /* XXX This clear should ultimately be part of local_flush_tlb_mm */
+                __clear_bit(id, stale_map[cpu]);
+        }
+
+        /* Flick the MMU and release lock */
+        set_context(id, next->pgd);
+        spin_unlock(&context_lock);
+}
+
+/*
+ * Set up the context for a new address space.
+ */
+int init_new_context(struct task_struct *t, struct mm_struct *mm)
+{
+        mm->context.id = MMU_NO_CONTEXT;
+        mm->context.active = 0;
+
+        return 0;
+}
+
+/*
+ * We're finished using the context for an address space.
+ */
+void destroy_context(struct mm_struct *mm)
+{
+        unsigned int id;
+
+        if (mm->context.id == MMU_NO_CONTEXT)
+                return;
+
+        WARN_ON(mm->context.active != 0);
+
+        spin_lock(&context_lock);
+        id = mm->context.id;
+        if (id != MMU_NO_CONTEXT) {
+                __clear_bit(id, context_map);
+                mm->context.id = MMU_NO_CONTEXT;
+#ifdef DEBUG_MAP_CONSISTENCY
+                mm->context.active = 0;
+                context_mm[id] = NULL;
+#endif
+                nr_free_contexts++;
+        }
+        spin_unlock(&context_lock);
+}
+
+#ifdef CONFIG_SMP
+
+static int __cpuinit mmu_context_cpu_notify(struct notifier_block *self,
+                                            unsigned long action, void *hcpu)
+{
+        unsigned int cpu = (unsigned int)(long)hcpu;
+
+        /* We don't touch CPU 0 map, it's allocated at aboot and kept
+         * around forever
+         */
+        if (cpu == 0)
+                return NOTIFY_OK;
+
+        switch (action) {
+        case CPU_ONLINE:
+        case CPU_ONLINE_FROZEN:
+                pr_debug("MMU: Allocating stale context map for CPU %d\n", cpu);
+                stale_map[cpu] = kzalloc(CTX_MAP_SIZE, GFP_KERNEL);
+                break;
+#ifdef CONFIG_HOTPLUG_CPU
+        case CPU_DEAD:
+        case CPU_DEAD_FROZEN:
+                pr_debug("MMU: Freeing stale context map for CPU %d\n", cpu);
+                kfree(stale_map[cpu]);
+                stale_map[cpu] = NULL;
+                break;
+#endif
+        }
+        return NOTIFY_OK;
+}
+
+static struct notifier_block __cpuinitdata mmu_context_cpu_nb = {
+        .notifier_call  = mmu_context_cpu_notify,
+};
+
+#endif /* CONFIG_SMP */
+
+/*
+ * Initialize the context management stuff.
+ */
+void __init mmu_context_init(void)
+{
+        /* Mark init_mm as being active on all possible CPUs since
+         * we'll get called with prev == init_mm the first time
+         * we schedule on a given CPU
+         */
+        init_mm.context.active = NR_CPUS;
+
+        /*
+         *   The MPC8xx has only 16 contexts.  We rotate through them on each
+         * task switch.  A better way would be to keep track of tasks that
+         * own contexts, and implement an LRU usage.  That way very active
+         * tasks don't always have to pay the TLB reload overhead.  The
+         * kernel pages are mapped shared, so the kernel can run on behalf
+         * of any task that makes a kernel entry.  Shared does not mean they
+         * are not protected, just that the ASID comparison is not performed.
+         *      -- Dan
+         *
+         * The IBM4xx has 256 contexts, so we can just rotate through these
+         * as a way of "switching" contexts.  If the TID of the TLB is zero,
+         * the PID/TID comparison is disabled, so we can use a TID of zero
+         * to represent all kernel pages as shared among all contexts.
+         *      -- Dan
+         */
+        if (mmu_has_feature(MMU_FTR_TYPE_8xx)) {
+                first_context = 0;
+                last_context = 15;
+        } else {
+                first_context = 1;
+                last_context = 255;
+        }
+
+#ifdef DEBUG_CLAMP_LAST_CONTEXT
+        last_context = DEBUG_CLAMP_LAST_CONTEXT;
+#endif
+        /*
+         * Allocate the maps used by context management
+         */
+        context_map = alloc_bootmem(CTX_MAP_SIZE);
+        context_mm = alloc_bootmem(sizeof(void *) * (last_context + 1));
+        stale_map[0] = alloc_bootmem(CTX_MAP_SIZE);
+
+#ifdef CONFIG_SMP
+        register_cpu_notifier(&mmu_context_cpu_nb);
+#endif
+
+        printk(KERN_INFO
+               "MMU: Allocated %d bytes of context maps for %d contexts\n",
+               2 * CTX_MAP_SIZE + (sizeof(void *) * (last_context + 1)),
+               last_context - first_context + 1);
+
+        /*
+         * Some processors have too few contexts to reserve one for
+         * init_mm, and require using context 0 for a normal task.
+         * Other processors reserve the use of context zero for the kernel.
+         * This code assumes first_context < 32.
+         */
+        context_map[0] = (1 << first_context) - 1;
+        next_context = first_context;
+        nr_free_contexts = last_context - first_context + 1;
+}
+
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index fab3cfad4099..4314b39b6faf 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -22,10 +22,58 @@
 #include <asm/tlbflush.h>
 #include <asm/mmu.h>
 
+#ifdef CONFIG_PPC_MMU_NOHASH
+
+/*
+ * On 40x and 8xx, we directly inline tlbia and tlbivax
+ */
+#if defined(CONFIG_40x) || defined(CONFIG_8xx)
+static inline void _tlbil_all(void)
+{
+        asm volatile ("sync; tlbia; isync" : : : "memory")
+}
+static inline void _tlbil_pid(unsigned int pid)
+{
+        asm volatile ("sync; tlbia; isync" : : : "memory")
+}
+#else /* CONFIG_40x || CONFIG_8xx */
+extern void _tlbil_all(void);
+extern void _tlbil_pid(unsigned int pid);
+#endif /* !(CONFIG_40x || CONFIG_8xx) */
+
+/*
+ * On 8xx, we directly inline tlbie, on others, it's extern
+ */
+#ifdef CONFIG_8xx
+static inline void _tlbil_va(unsigned long address, unsigned int pid)
+{
+        asm volatile ("tlbie %0; sync" : : "r" (address) : "memory")
+}
+#else /* CONFIG_8xx */
+extern void _tlbil_va(unsigned long address, unsigned int pid);
+#endif /* CONIFG_8xx */
+
+/*
+ * As of today, we don't support tlbivax broadcast on any
+ * implementation. When that becomes the case, this will be
+ * an extern.
+ */
+static inline void _tlbivax_bcast(unsigned long address, unsigned int pid)
+{
+        BUG();
+}
+
+#else /* CONFIG_PPC_MMU_NOHASH */
+
 extern void hash_preload(struct mm_struct *mm, unsigned long ea,
                          unsigned long access, unsigned long trap);
 
 
+extern void _tlbie(unsigned long address);
+extern void _tlbia(void);
+
+#endif /* CONFIG_PPC_MMU_NOHASH */
+
 #ifdef CONFIG_PPC32
 extern void mapin_ram(void);
 extern int map_page(unsigned long va, phys_addr_t pa, int flags);
@@ -58,17 +106,14 @@ extern phys_addr_t lowmem_end_addr;
  * architectures.  -- Dan
  */
 #if defined(CONFIG_8xx)
-#define flush_HPTE(X, va, pg)   _tlbie(va, 0 /* 8xx doesn't care about PID */)
 #define MMU_init_hw()           do { } while(0)
 #define mmu_mapin_ram()         (0UL)
 
 #elif defined(CONFIG_4xx)
-#define flush_HPTE(pid, va, pg) _tlbie(va, pid)
 extern void MMU_init_hw(void);
 extern unsigned long mmu_mapin_ram(void);
 
 #elif defined(CONFIG_FSL_BOOKE)
-#define flush_HPTE(pid, va, pg) _tlbie(va, pid)
 extern void MMU_init_hw(void);
 extern unsigned long mmu_mapin_ram(void);
 extern void adjust_total_lowmem(void);
@@ -77,18 +122,4 @@ extern void adjust_total_lowmem(void);
 /* anything 32-bit except 4xx or 8xx */
 extern void MMU_init_hw(void);
 extern unsigned long mmu_mapin_ram(void);
-
-/* Be careful....this needs to be updated if we ever encounter 603 SMPs,
- * which includes all new 82xx processors.  We need tlbie/tlbsync here
- * in that case (I think). -- Dan.
- */
-static inline void flush_HPTE(unsigned context, unsigned long va,
-                              unsigned long pdval)
-{
-        if ((Hash != 0) &&
-            cpu_has_feature(CPU_FTR_HPTE_TABLE))
-                flush_hash_pages(0, va, pdval, 1);
-        else
-                _tlbie(va);
-}
 #endif
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
new file mode 100644
index 000000000000..6d94116fdea1
--- /dev/null
+++ b/arch/powerpc/mm/pgtable.c
@@ -0,0 +1,117 @@
+/*
+ * This file contains common routines for dealing with free of page tables
+ *
+ *  Derived from arch/powerpc/mm/tlb_64.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  Dave Engebretsen <engebret@us.ibm.com>
+ *      Rework for PPC64 port.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/percpu.h>
+#include <linux/hardirq.h>
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+#include <asm/tlb.h>
+
+static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
+static unsigned long pte_freelist_forced_free;
+
+struct pte_freelist_batch
+{
+        struct rcu_head rcu;
+        unsigned int    index;
+        pgtable_free_t  tables[0];
+};
+
+#define PTE_FREELIST_SIZE \
+        ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
+          / sizeof(pgtable_free_t))
+
+static void pte_free_smp_sync(void *arg)
+{
+        /* Do nothing, just ensure we sync with all CPUs */
+}
+
+/* This is only called when we are critically out of memory
+ * (and fail to get a page in pte_free_tlb).
+ */
+static void pgtable_free_now(pgtable_free_t pgf)
+{
+        pte_freelist_forced_free++;
+
+        smp_call_function(pte_free_smp_sync, NULL, 1);
+
+        pgtable_free(pgf);
+}
+
+static void pte_free_rcu_callback(struct rcu_head *head)
+{
+        struct pte_freelist_batch *batch =
+                container_of(head, struct pte_freelist_batch, rcu);
+        unsigned int i;
+
+        for (i = 0; i < batch->index; i++)
+                pgtable_free(batch->tables[i]);
+
+        free_page((unsigned long)batch);
+}
+
+static void pte_free_submit(struct pte_freelist_batch *batch)
+{
+        INIT_RCU_HEAD(&batch->rcu);
+        call_rcu(&batch->rcu, pte_free_rcu_callback);
+}
+
+void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
+{
+        /* This is safe since tlb_gather_mmu has disabled preemption */
+        cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
+        struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
+
+        if (atomic_read(&tlb->mm->mm_users) < 2 ||
+            cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
+                pgtable_free(pgf);
+                return;
+        }
+
+        if (*batchp == NULL) {
+                *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
+                if (*batchp == NULL) {
+                        pgtable_free_now(pgf);
+                        return;
+                }
+                (*batchp)->index = 0;
+        }
+        (*batchp)->tables[(*batchp)->index++] = pgf;
+        if ((*batchp)->index == PTE_FREELIST_SIZE) {
+                pte_free_submit(*batchp);
+                *batchp = NULL;
+        }
+}
+
+void pte_free_finish(void)
+{
+        /* This is safe since tlb_gather_mmu has disabled preemption */
+        struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
+
+        if (*batchp == NULL)
+                return;
+        pte_free_submit(*batchp);
+        *batchp = NULL;
+}
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index c31d6d26f0b5..38ff35f2142a 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -48,10 +48,6 @@ EXPORT_SYMBOL(ioremap_bot);	/* aka VMALLOC_END */
 
 extern char etext[], _stext[];
 
-#ifdef CONFIG_SMP
-extern void hash_page_sync(void);
-#endif
-
 #ifdef HAVE_BATS
 extern phys_addr_t v_mapped_by_bats(unsigned long va);
 extern unsigned long p_mapped_by_bats(phys_addr_t pa);
@@ -72,24 +68,29 @@ extern unsigned long p_mapped_by_tlbcam(unsigned long pa);
 #define p_mapped_by_tlbcam(x)   (0UL)
 #endif /* HAVE_TLBCAM */
 
-#ifdef CONFIG_PTE_64BIT
-/* Some processors use an 8kB pgdir because they have 8-byte Linux PTEs. */
-#define PGDIR_ORDER     1
-#else
-#define PGDIR_ORDER     0
-#endif
+#define PGDIR_ORDER     (32 + PGD_T_LOG2 - PGDIR_SHIFT)
 
 pgd_t *pgd_alloc(struct mm_struct *mm)
 {
         pgd_t *ret;
 
-        ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, PGDIR_ORDER);
+        /* pgdir take page or two with 4K pages and a page fraction otherwise */
+#ifndef CONFIG_PPC_4K_PAGES
+        ret = (pgd_t *)kzalloc(1 << PGDIR_ORDER, GFP_KERNEL);
+#else
+        ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO,
+                        PGDIR_ORDER - PAGE_SHIFT);
+#endif
         return ret;
 }
 
 void pgd_free(struct mm_struct *mm, pgd_t *pgd)
 {
-        free_pages((unsigned long)pgd, PGDIR_ORDER);
+#ifndef CONFIG_PPC_4K_PAGES
+        kfree((void *)pgd);
+#else
+        free_pages((unsigned long)pgd, PGDIR_ORDER - PAGE_SHIFT);
+#endif
 }
 
 __init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
@@ -125,23 +126,6 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
         return ptepage;
 }
 
-void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
-#ifdef CONFIG_SMP
-        hash_page_sync();
-#endif
-        free_page((unsigned long)pte);
-}
-
-void pte_free(struct mm_struct *mm, pgtable_t ptepage)
-{
-#ifdef CONFIG_SMP
-        hash_page_sync();
-#endif
-        pgtable_page_dtor(ptepage);
-        __free_page(ptepage);
-}
-
 void __iomem *
 ioremap(phys_addr_t addr, unsigned long size)
 {
@@ -194,6 +178,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
         if (p < 16*1024*1024)
                 p += _ISA_MEM_BASE;
 
+#ifndef CONFIG_CRASH_DUMP
         /*
          * Don't allow anybody to remap normal RAM that we're using.
          * mem_init() sets high_memory so only do the check after that.
@@ -203,6 +188,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
                        (unsigned long long)p, __builtin_return_address(0));
                 return NULL;
         }
+#endif
 
         if (size == 0)
                 return NULL;
@@ -288,7 +274,7 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
 }
 
 /*
- * Map in a big chunk of physical memory starting at KERNELBASE.
+ * Map in a big chunk of physical memory starting at PAGE_OFFSET.
  */
 void __init mapin_ram(void)
 {
@@ -297,7 +283,7 @@ void __init mapin_ram(void)
         int ktext;
 
         s = mmu_mapin_ram();
-        v = KERNELBASE + s;
+        v = PAGE_OFFSET + s;
         p = memstart_addr + s;
         for (; s < total_lowmem; s += PAGE_SIZE) {
                 ktext = ((char *) v >= _stext && (char *) v < etext);
@@ -363,7 +349,11 @@ static int __change_page_attr(struct page *page, pgprot_t prot)
                 return -EINVAL;
         set_pte_at(&init_mm, address, kpte, mk_pte(page, prot));
         wmb();
-        flush_HPTE(0, address, pmd_val(*kpmd));
+#ifdef CONFIG_PPC_STD_MMU
+        flush_hash_pages(0, address, pmd_val(*kpmd), 1);
+#else
+        flush_tlb_page(NULL, address);
+#endif
         pte_unmap(kpte);
 
         return 0;
@@ -400,7 +390,7 @@ void kernel_map_pages(struct page *page, int numpages, int enable)
 #endif /* CONFIG_DEBUG_PAGEALLOC */
 
 static int fixmaps;
-unsigned long FIXADDR_TOP = 0xfffff000;
+unsigned long FIXADDR_TOP = (-PAGE_SIZE);
 EXPORT_SYMBOL(FIXADDR_TOP);
 
 void __set_fixmap (enum fixed_addresses idx, phys_addr_t phys, pgprot_t flags)
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 6aa120813775..45d925360b89 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -95,16 +95,16 @@ unsigned long __init mmu_mapin_ram(void)
                         break;
         }
 
-        setbat(2, KERNELBASE, 0, bl, _PAGE_RAM);
-        done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1;
+        setbat(2, PAGE_OFFSET, 0, bl, _PAGE_RAM);
+        done = (unsigned long)bat_addrs[2].limit - PAGE_OFFSET + 1;
         if ((done < tot) && !bat_addrs[3].limit) {
                 /* use BAT3 to cover a bit more */
                 tot -= done;
                 for (bl = 128<<10; bl < max_size; bl <<= 1)
                         if (bl * 2 > tot)
                                 break;
-                setbat(3, KERNELBASE+done, done, bl, _PAGE_RAM);
-                done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1;
+                setbat(3, PAGE_OFFSET+done, done, bl, _PAGE_RAM);
+                done = (unsigned long)bat_addrs[3].limit - PAGE_OFFSET + 1;
         }
 
         return done;
@@ -192,7 +192,7 @@ void __init MMU_init_hw(void)
         extern unsigned int hash_page[];
         extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[];
 
-        if (!cpu_has_feature(CPU_FTR_HPTE_TABLE)) {
+        if (!mmu_has_feature(MMU_FTR_HPTE_TABLE)) {
                 /*
                  * Put a blr (procedure return) instruction at the
                  * start of hash_page, since we can still get DSI
diff --git a/arch/powerpc/mm/tlb_32.c b/arch/powerpc/mm/tlb_hash32.c
index f9a47fee3927..65190587a365 100644
--- a/arch/powerpc/mm/tlb_32.c
+++ b/arch/powerpc/mm/tlb_hash32.c
@@ -137,6 +137,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
         flush_range(&init_mm, start, end);
         FINISH_FLUSH;
 }
+EXPORT_SYMBOL(flush_tlb_kernel_range);
 
 /*
  * Flush all the (user) entries for the address space described by mm.
@@ -160,6 +161,7 @@ void flush_tlb_mm(struct mm_struct *mm)
                 flush_range(mp->vm_mm, mp->vm_start, mp->vm_end);
         FINISH_FLUSH;
 }
+EXPORT_SYMBOL(flush_tlb_mm);
 
 void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
 {
@@ -176,6 +178,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
                 flush_hash_pages(mm->context.id, vmaddr, pmd_val(*pmd), 1);
         FINISH_FLUSH;
 }
+EXPORT_SYMBOL(flush_tlb_page);
 
 /*
  * For each address in the range, find the pte for the address
@@ -188,3 +191,4 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
         flush_range(vma->vm_mm, start, end);
         FINISH_FLUSH;
 }
+EXPORT_SYMBOL(flush_tlb_range);
diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_hash64.c
index be7dd422c0fa..c931bc7d1079 100644
--- a/arch/powerpc/mm/tlb_64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -37,81 +37,6 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
  * arch/powerpc/include/asm/tlb.h file -- tgall
  */
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
-static unsigned long pte_freelist_forced_free;
-
-struct pte_freelist_batch
-{
-        struct rcu_head rcu;
-        unsigned int    index;
-        pgtable_free_t  tables[0];
-};
-
-#define PTE_FREELIST_SIZE \
-        ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
-          / sizeof(pgtable_free_t))
-
-static void pte_free_smp_sync(void *arg)
-{
-        /* Do nothing, just ensure we sync with all CPUs */
-}
-
-/* This is only called when we are critically out of memory
- * (and fail to get a page in pte_free_tlb).
- */
-static void pgtable_free_now(pgtable_free_t pgf)
-{
-        pte_freelist_forced_free++;
-
-        smp_call_function(pte_free_smp_sync, NULL, 1);
-
-        pgtable_free(pgf);
-}
-
-static void pte_free_rcu_callback(struct rcu_head *head)
-{
-        struct pte_freelist_batch *batch =
-                container_of(head, struct pte_freelist_batch, rcu);
-        unsigned int i;
-
-        for (i = 0; i < batch->index; i++)
-                pgtable_free(batch->tables[i]);
-
-        free_page((unsigned long)batch);
-}
-
-static void pte_free_submit(struct pte_freelist_batch *batch)
-{
-        INIT_RCU_HEAD(&batch->rcu);
-        call_rcu(&batch->rcu, pte_free_rcu_callback);
-}
-
-void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
-{
-        /* This is safe since tlb_gather_mmu has disabled preemption */
-        cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
-        struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
-
-        if (atomic_read(&tlb->mm->mm_users) < 2 ||
-            cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
-                pgtable_free(pgf);
-                return;
-        }
-
-        if (*batchp == NULL) {
-                *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
-                if (*batchp == NULL) {
-                        pgtable_free_now(pgf);
-                        return;
-                }
-                (*batchp)->index = 0;
-        }
-        (*batchp)->tables[(*batchp)->index++] = pgf;
-        if ((*batchp)->index == PTE_FREELIST_SIZE) {
-                pte_free_submit(*batchp);
-                *batchp = NULL;
-        }
-}
 
 /*
  * A linux PTE was changed and the corresponding hash table entry
@@ -229,17 +154,6 @@ void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
         batch->index = 0;
 }
 
-void pte_free_finish(void)
-{
-        /* This is safe since tlb_gather_mmu has disabled preemption */
-        struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
-
-        if (*batchp == NULL)
-                return;
-        pte_free_submit(*batchp);
-        *batchp = NULL;
-}
-
 /**
  * __flush_hash_table_range - Flush all HPTEs for a given address range
  *                            from the hash table (and the TLB). But keeps
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
new file mode 100644
index 000000000000..803a64c02b06
--- /dev/null
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -0,0 +1,209 @@
+/*
+ * This file contains the routines for TLB flushing.
+ * On machines where the MMU does not use a hash table to store virtual to
+ * physical translations (ie, SW loaded TLBs or Book3E compilant processors,
+ * this does -not- include 603 however which shares the implementation with
+ * hash based processors)
+ *
+ *  -- BenH
+ *
+ * Copyright 2008 Ben Herrenschmidt <benh@kernel.crashing.org>
+ *                IBM Corp.
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/highmem.h>
+#include <linux/pagemap.h>
+#include <linux/preempt.h>
+#include <linux/spinlock.h>
+
+#include <asm/tlbflush.h>
+#include <asm/tlb.h>
+
+#include "mmu_decl.h"
+
+/*
+ * Base TLB flushing operations:
+ *
+ *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
+ *  - flush_tlb_page(vma, vmaddr) flushes one page
+ *  - flush_tlb_range(vma, start, end) flushes a range of pages
+ *  - flush_tlb_kernel_range(start, end) flushes kernel pages
+ *
+ *  - local_* variants of page and mm only apply to the current
+ *    processor
+ */
+
+/*
+ * These are the base non-SMP variants of page and mm flushing
+ */
+void local_flush_tlb_mm(struct mm_struct *mm)
+{
+        unsigned int pid;
+
+        preempt_disable();
+        pid = mm->context.id;
+        if (pid != MMU_NO_CONTEXT)
+                _tlbil_pid(pid);
+        preempt_enable();
+}
+EXPORT_SYMBOL(local_flush_tlb_mm);
+
+void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
+{
+        unsigned int pid;
+
+        preempt_disable();
+        pid = vma ? vma->vm_mm->context.id : 0;
+        if (pid != MMU_NO_CONTEXT)
+                _tlbil_va(vmaddr, pid);
+        preempt_enable();
+}
+EXPORT_SYMBOL(local_flush_tlb_page);
+
+
+/*
+ * And here are the SMP non-local implementations
+ */
+#ifdef CONFIG_SMP
+
+static DEFINE_SPINLOCK(tlbivax_lock);
+
+struct tlb_flush_param {
+        unsigned long addr;
+        unsigned int pid;
+};
+
+static void do_flush_tlb_mm_ipi(void *param)
+{
+        struct tlb_flush_param *p = param;
+
+        _tlbil_pid(p ? p->pid : 0);
+}
+
+static void do_flush_tlb_page_ipi(void *param)
+{
+        struct tlb_flush_param *p = param;
+
+        _tlbil_va(p->addr, p->pid);
+}
+
+
+/* Note on invalidations and PID:
+ *
+ * We snapshot the PID with preempt disabled. At this point, it can still
+ * change either because:
+ * - our context is being stolen (PID -> NO_CONTEXT) on another CPU
+ * - we are invaliating some target that isn't currently running here
+ *   and is concurrently acquiring a new PID on another CPU
+ * - some other CPU is re-acquiring a lost PID for this mm
+ * etc...
+ *
+ * However, this shouldn't be a problem as we only guarantee
+ * invalidation of TLB entries present prior to this call, so we
+ * don't care about the PID changing, and invalidating a stale PID
+ * is generally harmless.
+ */
+
+void flush_tlb_mm(struct mm_struct *mm)
+{
+        cpumask_t cpu_mask;
+        unsigned int pid;
+
+        preempt_disable();
+        pid = mm->context.id;
+        if (unlikely(pid == MMU_NO_CONTEXT))
+                goto no_context;
+        cpu_mask = mm->cpu_vm_mask;
+        cpu_clear(smp_processor_id(), cpu_mask);
+        if (!cpus_empty(cpu_mask)) {
+                struct tlb_flush_param p = { .pid = pid };
+                smp_call_function_mask(cpu_mask, do_flush_tlb_mm_ipi, &p, 1);
+        }
+        _tlbil_pid(pid);
+ no_context:
+        preempt_enable();
+}
+EXPORT_SYMBOL(flush_tlb_mm);
+
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
+{
+        cpumask_t cpu_mask;
+        unsigned int pid;
+
+        preempt_disable();
+        pid = vma ? vma->vm_mm->context.id : 0;
+        if (unlikely(pid == MMU_NO_CONTEXT))
+                goto bail;
+        cpu_mask = vma->vm_mm->cpu_vm_mask;
+        cpu_clear(smp_processor_id(), cpu_mask);
+        if (!cpus_empty(cpu_mask)) {
+                /* If broadcast tlbivax is supported, use it */
+                if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) {
+                        int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL);
+                        if (lock)
+                                spin_lock(&tlbivax_lock);
+                        _tlbivax_bcast(vmaddr, pid);
+                        if (lock)
+                                spin_unlock(&tlbivax_lock);
+                        goto bail;
+                } else {
+                        struct tlb_flush_param p = { .pid = pid, .addr = vmaddr };
+                        smp_call_function_mask(cpu_mask,
+                                               do_flush_tlb_page_ipi, &p, 1);
+                }
+        }
+        _tlbil_va(vmaddr, pid);
+ bail:
+        preempt_enable();
+}
+EXPORT_SYMBOL(flush_tlb_page);
+
+#endif /* CONFIG_SMP */
+
+/*
+ * Flush kernel TLB entries in the given range
+ */
+void flush_tlb_kernel_range(unsigned long start, unsigned long end)
+{
+#ifdef CONFIG_SMP
+        preempt_disable();
+        smp_call_function(do_flush_tlb_mm_ipi, NULL, 1);
+        _tlbil_pid(0);
+        preempt_enable();
+#endif
+        _tlbil_pid(0);
+}
+EXPORT_SYMBOL(flush_tlb_kernel_range);
+
+/*
+ * Currently, for range flushing, we just do a full mm flush. This should
+ * be optimized based on a threshold on the size of the range, since
+ * some implementation can stack multiple tlbivax before a tlbsync but
+ * for now, we keep it that way
+ */
+void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
+                     unsigned long end)
+
+{
+        flush_tlb_mm(vma->vm_mm);
+}
+EXPORT_SYMBOL(flush_tlb_range);
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
new file mode 100644
index 000000000000..f900a39e6ec4
--- /dev/null
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -0,0 +1,166 @@
+/*
+ * This file contains low-level functions for performing various
+ * types of TLB invalidations on various processors with no hash
+ * table.
+ *
+ * This file implements the following functions for all no-hash
+ * processors. Some aren't implemented for some variants. Some
+ * are inline in tlbflush.h
+ *
+ *      - tlbil_va
+ *      - tlbil_pid
+ *      - tlbil_all
+ *      - tlbivax_bcast (not yet)
+ *
+ * Code mostly moved over from misc_32.S
+ *
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ * Partially rewritten by Cort Dougan (cort@cs.nmt.edu)
+ * Paul Mackerras, Kumar Gala and Benjamin Herrenschmidt.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/cputable.h>
+#include <asm/mmu.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/processor.h>
+
+#if defined(CONFIG_40x)
+
+/*
+ * 40x implementation needs only tlbil_va
+ */
+_GLOBAL(_tlbil_va)
+        /* We run the search with interrupts disabled because we have to change
+         * the PID and I don't want to preempt when that happens.
+         */
+        mfmsr   r5
+        mfspr   r6,SPRN_PID
+        wrteei  0
+        mtspr   SPRN_PID,r4
+        tlbsx.  r3, 0, r3
+        mtspr   SPRN_PID,r6
+        wrtee   r5
+        bne     1f
+        sync
+        /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is
+         * clear. Since 25 is the V bit in the TLB_TAG, loading this value
+         * will invalidate the TLB entry. */
+        tlbwe   r3, r3, TLB_TAG
+        isync
+1:      blr
+
+#elif defined(CONFIG_8xx)
+
+/*
+ * Nothing to do for 8xx, everything is inline
+ */
+
+#elif defined(CONFIG_44x)
+
+/*
+ * 440 implementation uses tlbsx/we for tlbil_va and a full sweep
+ * of the TLB for everything else.
+ */
+_GLOBAL(_tlbil_va)
+        mfspr   r5,SPRN_MMUCR
+        rlwimi  r5,r4,0,24,31                   /* Set TID */
+
+        /* We have to run the search with interrupts disabled, otherwise
+         * an interrupt which causes a TLB miss can clobber the MMUCR
+         * between the mtspr and the tlbsx.
+         *
+         * Critical and Machine Check interrupts take care of saving
+         * and restoring MMUCR, so only normal interrupts have to be
+         * taken care of.
+         */
+        mfmsr   r4
+        wrteei  0
+        mtspr   SPRN_MMUCR,r5
+        tlbsx.  r3, 0, r3
+        wrtee   r4
+        bne     1f
+        sync
+        /* There are only 64 TLB entries, so r3 < 64,
+         * which means bit 22, is clear.  Since 22 is
+         * the V bit in the TLB_PAGEID, loading this
+         * value will invalidate the TLB entry.
+         */
+        tlbwe   r3, r3, PPC44x_TLB_PAGEID
+        isync
+1:      blr
+
+_GLOBAL(_tlbil_all)
+_GLOBAL(_tlbil_pid)
+        li      r3,0
+        sync
+
+        /* Load high watermark */
+        lis     r4,tlb_44x_hwater@ha
+        lwz     r5,tlb_44x_hwater@l(r4)
+
+1:      tlbwe   r3,r3,PPC44x_TLB_PAGEID
+        addi    r3,r3,1
+        cmpw    0,r3,r5
+        ble     1b
+
+        isync
+        blr
+
+#elif defined(CONFIG_FSL_BOOKE)
+/*
+ * FSL BookE implementations. Currently _pid and _all are the
+ * same. This will change when tlbilx is actually supported and
+ * performs invalidate-by-PID. This change will be driven by
+ * mmu_features conditional
+ */
+
+/*
+ * Flush MMU TLB on the local processor
+ */
+_GLOBAL(_tlbil_pid)
+_GLOBAL(_tlbil_all)
+#define MMUCSR0_TLBFI   (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
+                         MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
+        li      r3,(MMUCSR0_TLBFI)@l
+        mtspr   SPRN_MMUCSR0, r3
+1:
+        mfspr   r3,SPRN_MMUCSR0
+        andi.   r3,r3,MMUCSR0_TLBFI@l
+        bne     1b
+        msync
+        isync
+        blr
+
+/*
+ * Flush MMU TLB for a particular address, but only on the local processor
+ * (no broadcast)
+ */
+_GLOBAL(_tlbil_va)
+        mfmsr   r10
+        wrteei  0
+        slwi    r4,r4,16
+        mtspr   SPRN_MAS6,r4            /* assume AS=0 for now */
+        tlbsx   0,r3
+        mfspr   r4,SPRN_MAS1            /* check valid */
+        andis.  r3,r4,MAS1_VALID@h
+        beq     1f
+        rlwinm  r4,r4,0,1,31
+        mtspr   SPRN_MAS1,r4
+        tlbwe
+        msync
+        isync
+1:      wrtee   r10
+        blr
+#elif
+#error Unsupported processor type !
+#endif
diff --git a/arch/powerpc/oprofile/cell/spu_task_sync.c b/arch/powerpc/oprofile/cell/spu_task_sync.c
index 2949126d28d1..6b793aeda72e 100644
--- a/arch/powerpc/oprofile/cell/spu_task_sync.c
+++ b/arch/powerpc/oprofile/cell/spu_task_sync.c
@@ -297,7 +297,7 @@ static inline unsigned long fast_get_dcookie(struct path *path)
 {
         unsigned long cookie;
 
-        if (path->dentry->d_cookie)
+        if (path->dentry->d_flags & DCACHE_COOKIE)
                 return (unsigned long)path->dentry;
         get_dcookie(path, &cookie);
         return cookie;
diff --git a/arch/powerpc/platforms/40x/ep405.c b/arch/powerpc/platforms/40x/ep405.c
index ae2e7f67c18e..4058fd1e7fc7 100644
--- a/arch/powerpc/platforms/40x/ep405.c
+++ b/arch/powerpc/platforms/40x/ep405.c
@@ -100,7 +100,7 @@ static void __init ep405_setup_arch(void)
         /* Find & init the BCSR CPLD */
         ep405_init_bcsr();
 
-        ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+        ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
 }
 
 static int __init ep405_probe(void)
diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c
index 1dd24ffc0dc1..fd7d934dac8b 100644
--- a/arch/powerpc/platforms/40x/kilauea.c
+++ b/arch/powerpc/platforms/40x/kilauea.c
@@ -44,7 +44,7 @@ static int __init kilauea_probe(void)
         if (!of_flat_dt_is_compatible(root, "amcc,kilauea"))
                 return 0;
 
-        ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+        ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
 
         return 1;
 }
diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
index 4498a86b46c3..f40ac9b8f99f 100644
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
@@ -61,7 +61,7 @@ static int __init ppc40x_probe(void)
 
         for (i = 0; i < ARRAY_SIZE(board); i++) {
                 if (of_flat_dt_is_compatible(root, board[i])) {
-                        ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+                        ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
                         return 1;
                 }
         }
diff --git a/arch/powerpc/platforms/44x/ebony.c b/arch/powerpc/platforms/44x/ebony.c
index a0e8fe4662f6..88b9117fa691 100644
--- a/arch/powerpc/platforms/44x/ebony.c
+++ b/arch/powerpc/platforms/44x/ebony.c
@@ -54,7 +54,7 @@ static int __init ebony_probe(void)
         if (!of_flat_dt_is_compatible(root, "ibm,ebony"))
                 return 0;
 
-        ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+        ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
 
         return 1;
 }
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c
index 29671262801f..76fdc51dac8b 100644
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
@@ -69,7 +69,7 @@ static int __init ppc44x_probe(void)
 
         for (i = 0; i < ARRAY_SIZE(board); i++) {
                 if (of_flat_dt_is_compatible(root, board[i])) {
-                        ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+                        ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
                         return 1;
                 }
         }
diff --git a/arch/powerpc/platforms/44x/sam440ep.c b/arch/powerpc/platforms/44x/sam440ep.c
index 47f10e647735..a78e8eb6da41 100644
--- a/arch/powerpc/platforms/44x/sam440ep.c
+++ b/arch/powerpc/platforms/44x/sam440ep.c
@@ -51,7 +51,7 @@ static int __init sam440ep_probe(void)
         if (!of_flat_dt_is_compatible(root, "acube,sam440ep"))
                 return 0;
 
-        ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+        ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
 
         return 1;
 }
diff --git a/arch/powerpc/platforms/52xx/lite5200_pm.c b/arch/powerpc/platforms/52xx/lite5200_pm.c
index fe92e65103ed..b5c753db125e 100644
--- a/arch/powerpc/platforms/52xx/lite5200_pm.c
+++ b/arch/powerpc/platforms/52xx/lite5200_pm.c
@@ -3,7 +3,6 @@
 #include <asm/io.h>
 #include <asm/time.h>
 #include <asm/mpc52xx.h>
-#include "mpc52xx_pic.h"
 
 /* defined in lite5200_sleep.S and only used here */
 extern void lite5200_low_power(void __iomem *sram, void __iomem *mbar);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index b49a18527661..c3f2c21024e3 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -375,7 +375,7 @@ mpc52xx_add_bridge(struct device_node *node)
 
         pr_debug("Adding MPC52xx PCI host bridge %s\n", node->full_name);
 
-        ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
+        ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
 
         if (of_address_to_resource(node, 0, &rsrc) != 0) {
                 printk(KERN_ERR "Can't get %s resources\n", node->full_name);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 8479394e9ab4..72865e8e4b51 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -2,20 +2,100 @@
  *
  * Programmable Interrupt Controller functions for the Freescale MPC52xx.
  *
+ * Copyright (C) 2008 Secret Lab Technologies Ltd.
  * Copyright (C) 2006 bplan GmbH
+ * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
+ * Copyright (C) 2003 Montavista Software, Inc
  *
  * Based on the code from the 2.4 kernel by
  * Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg.
  *
- * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
- * Copyright (C) 2003 Montavista Software, Inc
- *
  * This file is licensed under the terms of the GNU General Public License
  * version 2. This program is licensed "as is" without any warranty of any
  * kind, whether express or implied.
  *
  */
 
+/*
+ * This is the device driver for the MPC5200 interrupt controller.
+ *
+ * hardware overview
+ * -----------------
+ * The MPC5200 interrupt controller groups the all interrupt sources into
+ * three groups called 'critical', 'main', and 'peripheral'.  The critical
+ * group has 3 irqs, External IRQ0, slice timer 0 irq, and wake from deep
+ * sleep.  Main group include the other 3 external IRQs, slice timer 1, RTC,
+ * gpios, and the general purpose timers.  Peripheral group contains the
+ * remaining irq sources from all of the on-chip peripherals (PSCs, Ethernet,
+ * USB, DMA, etc).
+ *
+ * virqs
+ * -----
+ * The Linux IRQ subsystem requires that each irq source be assigned a
+ * system wide unique IRQ number starting at 1 (0 means no irq).  Since
+ * systems can have multiple interrupt controllers, the virtual IRQ (virq)
+ * infrastructure lets each interrupt controller to define a local set
+ * of IRQ numbers and the virq infrastructure maps those numbers into
+ * a unique range of the global IRQ# space.
+ *
+ * To define a range of virq numbers for this controller, this driver first
+ * assigns a number to each of the irq groups (called the level 1 or L1
+ * value).  Within each group individual irq sources are also assigned a
+ * number, as defined by the MPC5200 user guide, and refers to it as the
+ * level 2 or L2 value.  The virq number is determined by shifting up the
+ * L1 value by MPC52xx_IRQ_L1_OFFSET and ORing it with the L2 value.
+ *
+ * For example, the TMR0 interrupt is irq 9 in the main group.  The
+ * virq for TMR0 is calculated by ((1 << MPC52xx_IRQ_L1_OFFSET) | 9).
+ *
+ * The observant reader will also notice that this driver defines a 4th
+ * interrupt group called 'bestcomm'.  The bestcomm group isn't physically
+ * part of the MPC5200 interrupt controller, but it is used here to assign
+ * a separate virq number for each bestcomm task (since any of the 16
+ * bestcomm tasks can cause the bestcomm interrupt to be raised).  When a
+ * bestcomm interrupt occurs (peripheral group, irq 0) this driver determines
+ * which task needs servicing and returns the irq number for that task.  This
+ * allows drivers which use bestcomm to define their own interrupt handlers.
+ *
+ * irq_chip structures
+ * -------------------
+ * For actually manipulating IRQs (masking, enabling, clearing, etc) this
+ * driver defines four separate 'irq_chip' structures, one for the main
+ * group, one for the peripherals group, one for the bestcomm group and one
+ * for external interrupts.  The irq_chip structures provide the hooks needed
+ * to manipulate each IRQ source, and since each group is has a separate set
+ * of registers for controlling the irq, it makes sense to divide up the
+ * hooks along those lines.
+ *
+ * You'll notice that there is not an irq_chip for the critical group and
+ * you'll also notice that there is an irq_chip defined for external
+ * interrupts even though there is no external interrupt group.  The reason
+ * for this is that the four external interrupts are all managed with the same
+ * register even though one of the external IRQs is in the critical group and
+ * the other three are in the main group.  For this reason it makes sense for
+ * the 4 external irqs to be managed using a separate set of hooks.  The
+ * reason there is no crit irq_chip is that of the 3 irqs in the critical
+ * group, only external interrupt is actually support at this time by this
+ * driver and since external interrupt is the only one used, it can just
+ * be directed to make use of the external irq irq_chip.
+ *
+ * device tree bindings
+ * --------------------
+ * The device tree bindings for this controller reflect the two level
+ * organization of irqs in the device.  #interrupt-cells = <3> where the
+ * first cell is the group number [0..3], the second cell is the irq
+ * number in the group, and the third cell is the sense type (level/edge).
+ * For reference, the following is a list of the interrupt property values
+ * associated with external interrupt sources on the MPC5200 (just because
+ * it is non-obvious to determine what the interrupts property should be
+ * when reading the mpc5200 manual and it is a frequently asked question).
+ *
+ * External interrupts:
+ * <0 0 n>      external irq0, n is sense       (n=0: level high,
+ * <1 1 n>      external irq1, n is sense        n=1: edge rising,
+ * <1 2 n>      external irq2, n is sense        n=2: edge falling,
+ * <1 3 n>      external irq3, n is sense        n=3: level low)
+ */
 #undef DEBUG
 
 #include <linux/interrupt.h>
@@ -24,11 +104,19 @@
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/mpc52xx.h>
-#include "mpc52xx_pic.h"
 
-/*
- *
-*/
+/* HW IRQ mapping */
+#define MPC52xx_IRQ_L1_CRIT     (0)
+#define MPC52xx_IRQ_L1_MAIN     (1)
+#define MPC52xx_IRQ_L1_PERP     (2)
+#define MPC52xx_IRQ_L1_SDMA     (3)
+
+#define MPC52xx_IRQ_L1_OFFSET   (6)
+#define MPC52xx_IRQ_L1_MASK     (0x00c0)
+#define MPC52xx_IRQ_L2_MASK     (0x003f)
+
+#define MPC52xx_IRQ_HIGHTESTHWIRQ (0xd0)
+
 
 /* MPC5200 device tree match tables */
 static struct of_device_id mpc52xx_pic_ids[] __initdata = {
@@ -53,10 +141,7 @@ static unsigned char mpc52xx_map_senses[4] = {
         IRQ_TYPE_LEVEL_LOW,
 };
 
-/*
- *
-*/
-
+/* Utility functions */
 static inline void io_be_setbit(u32 __iomem *addr, int bitno)
 {
         out_be32(addr, in_be32(addr) | (1 << bitno));
@@ -69,15 +154,14 @@ static inline void io_be_clrbit(u32 __iomem *addr, int bitno)
 
 /*
  * IRQ[0-3] interrupt irq_chip
-*/
-
+ */
 static void mpc52xx_extirq_mask(unsigned int virq)
 {
         int irq;
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -90,7 +174,7 @@ static void mpc52xx_extirq_unmask(unsigned int virq)
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -103,7 +187,7 @@ static void mpc52xx_extirq_ack(unsigned int virq)
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -117,7 +201,7 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
 
@@ -156,15 +240,14 @@ static struct irq_chip mpc52xx_extirq_irqchip = {
 
 /*
  * Main interrupt irq_chip
-*/
-
+ */
 static void mpc52xx_main_mask(unsigned int virq)
 {
         int irq;
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -177,7 +260,7 @@ static void mpc52xx_main_unmask(unsigned int virq)
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -193,15 +276,14 @@ static struct irq_chip mpc52xx_main_irqchip = {
 
 /*
  * Peripherals interrupt irq_chip
-*/
-
+ */
 static void mpc52xx_periph_mask(unsigned int virq)
 {
         int irq;
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -214,7 +296,7 @@ static void mpc52xx_periph_unmask(unsigned int virq)
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -230,15 +312,14 @@ static struct irq_chip mpc52xx_periph_irqchip = {
 
 /*
  * SDMA interrupt irq_chip
-*/
-
+ */
 static void mpc52xx_sdma_mask(unsigned int virq)
 {
         int irq;
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -251,7 +332,7 @@ static void mpc52xx_sdma_unmask(unsigned int virq)
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -264,7 +345,7 @@ static void mpc52xx_sdma_ack(unsigned int virq)
         int l2irq;
 
         irq = irq_map[virq].hwirq;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
 
@@ -278,13 +359,12 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
         .ack = mpc52xx_sdma_ack,
 };
 
-/*
- * irq_host
-*/
-
+/**
+ * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property
+ */
 static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
-                                 u32 * intspec, unsigned int intsize,
-                                 irq_hw_number_t * out_hwirq,
+                                 u32 *intspec, unsigned int intsize,
+                                 irq_hw_number_t *out_hwirq,
                                  unsigned int *out_flags)
 {
         int intrvect_l1;
@@ -299,10 +379,9 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
         intrvect_l2 = (int)intspec[1];
         intrvect_type = (int)intspec[2];
 
-        intrvect_linux =
-            (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) & MPC52xx_IRQ_L1_MASK;
-        intrvect_linux |=
-            (intrvect_l2 << MPC52xx_IRQ_L2_OFFSET) & MPC52xx_IRQ_L2_MASK;
+        intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) &
+                         MPC52xx_IRQ_L1_MASK;
+        intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK;
 
         pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
                  intrvect_l2);
@@ -313,11 +392,11 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
-/*
- * this function retrieves the correct IRQ type out
- * of the MPC regs
- * Only externals IRQs needs this
-*/
+/**
+ * mpc52xx_irqx_gettype - determine the IRQ sense type (level/edge)
+ *
+ * Only external IRQs need this.
+ */
 static int mpc52xx_irqx_gettype(int irq)
 {
         int type;
@@ -329,6 +408,9 @@ static int mpc52xx_irqx_gettype(int irq)
         return mpc52xx_map_senses[type];
 }
 
+/**
+ * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure
+ */
 static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
                                irq_hw_number_t irq)
 {
@@ -339,7 +421,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
         int type;
 
         l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
-        l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
+        l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         /*
          * Most of ours IRQs will be level low
@@ -379,8 +461,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
                 break;
 
         default:
-                pr_debug("%s: Error, unknown L1 IRQ (0x%x)\n", __func__, l1irq);
-                printk(KERN_ERR "Unknow IRQ!\n");
+                pr_err("%s: invalid virq requested (0x%x)\n", __func__, virq);
                 return -EINVAL;
         }
 
@@ -406,10 +487,15 @@ static struct irq_host_ops mpc52xx_irqhost_ops = {
         .map = mpc52xx_irqhost_map,
 };
 
-/*
- * init (public)
-*/
-
+/**
+ * mpc52xx_init_irq - Initialize and register with the virq subsystem
+ *
+ * Hook for setting up IRQs on an mpc5200 system.  A pointer to this function
+ * is to be put into the machine definition structure.
+ *
+ * This function searches the device tree for an MPC5200 interrupt controller,
+ * initializes it, and registers it with the virq subsystem.
+ */
 void __init mpc52xx_init_irq(void)
 {
         u32 intr_ctrl;
@@ -454,7 +540,6 @@ void __init mpc52xx_init_irq(void)
          * As last step, add an irq host to translate the real
          * hw irq information provided by the ofw to linux virq
          */
-
         mpc52xx_irqhost = irq_alloc_host(picnode, IRQ_HOST_MAP_LINEAR,
                                          MPC52xx_IRQ_HIGHTESTHWIRQ,
                                          &mpc52xx_irqhost_ops, -1);
@@ -462,12 +547,38 @@ void __init mpc52xx_init_irq(void)
         if (!mpc52xx_irqhost)
                 panic(__FILE__ ": Cannot allocate the IRQ host\n");
 
-        printk(KERN_INFO "MPC52xx PIC is up and running!\n");
+        irq_set_default_host(mpc52xx_irqhost);
+
+        pr_info("MPC52xx PIC is up and running!\n");
 }
 
-/*
- * get_irq (public)
-*/
+/**
+ * mpc52xx_get_irq - Get pending interrupt number hook function
+ *
+ * Called by the interupt handler to determine what IRQ handler needs to be
+ * executed.
+ *
+ * Status of pending interrupts is determined by reading the encoded status
+ * register.  The encoded status register has three fields; one for each of the
+ * types of interrupts defined by the controller - 'critical', 'main' and
+ * 'peripheral'.  This function reads the status register and returns the IRQ
+ * number associated with the highest priority pending interrupt.  'Critical'
+ * interrupts have the highest priority, followed by 'main' interrupts, and
+ * then 'peripheral'.
+ *
+ * The mpc5200 interrupt controller can be configured to boost the priority
+ * of individual 'peripheral' interrupts.  If this is the case then a special
+ * value will appear in either the crit or main fields indicating a high
+ * or medium priority peripheral irq has occurred.
+ *
+ * This function checks each of the 3 irq request fields and returns the
+ * first pending interrupt that it finds.
+ *
+ * This function also identifies a 4th type of interrupt; 'bestcomm'.  Each
+ * bestcomm DMA task can raise the bestcomm peripheral interrupt.  When this
+ * occurs at task-specific IRQ# is decoded so that each task can have its
+ * own IRQ handler.
+ */
 unsigned int mpc52xx_get_irq(void)
 {
         u32 status;
@@ -478,25 +589,21 @@ unsigned int mpc52xx_get_irq(void)
                 irq = (status >> 8) & 0x3;
                 if (irq == 2)   /* high priority peripheral */
                         goto peripheral;
-                irq |=  (MPC52xx_IRQ_L1_CRIT << MPC52xx_IRQ_L1_OFFSET) &
-                        MPC52xx_IRQ_L1_MASK;
+                irq |= (MPC52xx_IRQ_L1_CRIT << MPC52xx_IRQ_L1_OFFSET);
         } else if (status & 0x00200000) {       /* main */
                 irq = (status >> 16) & 0x1f;
                 if (irq == 4)   /* low priority peripheral */
                         goto peripheral;
-                irq |=  (MPC52xx_IRQ_L1_MAIN << MPC52xx_IRQ_L1_OFFSET) &
-                        MPC52xx_IRQ_L1_MASK;
+                irq |= (MPC52xx_IRQ_L1_MAIN << MPC52xx_IRQ_L1_OFFSET);
         } else if (status & 0x20000000) {       /* peripheral */
               peripheral:
                 irq = (status >> 24) & 0x1f;
                 if (irq == 0) { /* bestcomm */
                         status = in_be32(&sdma->IntPend);
                         irq = ffs(status) - 1;
-                        irq |=  (MPC52xx_IRQ_L1_SDMA << MPC52xx_IRQ_L1_OFFSET) &
-                                MPC52xx_IRQ_L1_MASK;
+                        irq |= (MPC52xx_IRQ_L1_SDMA << MPC52xx_IRQ_L1_OFFSET);
                 } else {
-                        irq |=  (MPC52xx_IRQ_L1_PERP << MPC52xx_IRQ_L1_OFFSET) &
-                                MPC52xx_IRQ_L1_MASK;
+                        irq |= (MPC52xx_IRQ_L1_PERP << MPC52xx_IRQ_L1_OFFSET);
                 }
         }
 
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.h b/arch/powerpc/platforms/52xx/mpc52xx_pic.h
deleted file mode 100644
index 1a26bcdb3049..000000000000
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Header file for Freescale MPC52xx Interrupt controller
- *
- * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
- * Copyright (C) 2003 MontaVista, Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifndef __POWERPC_SYSDEV_MPC52xx_PIC_H__
-#define __POWERPC_SYSDEV_MPC52xx_PIC_H__
-
-#include <asm/types.h>
-
-
-/* HW IRQ mapping */
-#define MPC52xx_IRQ_L1_CRIT     (0)
-#define MPC52xx_IRQ_L1_MAIN     (1)
-#define MPC52xx_IRQ_L1_PERP     (2)
-#define MPC52xx_IRQ_L1_SDMA     (3)
-
-#define MPC52xx_IRQ_L1_OFFSET   (6)
-#define MPC52xx_IRQ_L1_MASK     (0x00c0)
-
-#define MPC52xx_IRQ_L2_OFFSET   (0)
-#define MPC52xx_IRQ_L2_MASK     (0x003f)
-
-#define MPC52xx_IRQ_HIGHTESTHWIRQ (0xd0)
-
-
-/* Interrupt controller Register set */
-struct mpc52xx_intr {
-        u32 per_mask;           /* INTR + 0x00 */
-        u32 per_pri1;           /* INTR + 0x04 */
-        u32 per_pri2;           /* INTR + 0x08 */
-        u32 per_pri3;           /* INTR + 0x0c */
-        u32 ctrl;               /* INTR + 0x10 */
-        u32 main_mask;          /* INTR + 0x14 */
-        u32 main_pri1;          /* INTR + 0x18 */
-        u32 main_pri2;          /* INTR + 0x1c */
-        u32 reserved1;          /* INTR + 0x20 */
-        u32 enc_status;         /* INTR + 0x24 */
-        u32 crit_status;        /* INTR + 0x28 */
-        u32 main_status;        /* INTR + 0x2c */
-        u32 per_status;         /* INTR + 0x30 */
-        u32 reserved2;          /* INTR + 0x34 */
-        u32 per_error;          /* INTR + 0x38 */
-};
-
-#endif /* __POWERPC_SYSDEV_MPC52xx_PIC_H__ */
-
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pm.c b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
index c72d3304387f..a55b0b6813ed 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pm.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
@@ -5,9 +5,6 @@
 #include <asm/cacheflush.h>
 #include <asm/mpc52xx.h>
 
-#include "mpc52xx_pic.h"
-
-
 /* these are defined in mpc52xx_sleep.S, and only used here */
 extern void mpc52xx_deep_sleep(void __iomem *sram, void __iomem *sdram_regs,
                 struct mpc52xx_cdm __iomem *, struct mpc52xx_intr __iomem*);
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index 1b75902fad64..9761a59f175f 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -53,7 +53,7 @@ static void __init pq2_pci_add_bridge(struct device_node *np)
         if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b)
                 goto err;
 
-        ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
+        ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
 
         hose = pcibios_alloc_controller(np);
         if (!hose)
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index cb3054e1001d..f0798c09980f 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -1,6 +1,8 @@
 #
 # Makefile for the PowerPC 85xx linux kernel.
 #
+obj-$(CONFIG_SMP) += smp.o
+
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 613bf8c2e30d..a8301c8ad537 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -63,6 +63,7 @@ void __init mpc85xx_ds_pic_init(void)
         struct device_node *cascade_node = NULL;
         int cascade_irq;
 #endif
+        unsigned long root = of_get_flat_dt_root();
 
         np = of_find_node_by_type(NULL, "open-pic");
         if (np == NULL) {
@@ -76,11 +77,19 @@ void __init mpc85xx_ds_pic_init(void)
                 return;
         }
 
-        mpic = mpic_alloc(np, r.start,
+        if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
+                mpic = mpic_alloc(np, r.start,
+                        MPIC_PRIMARY |
+                        MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
+                        0, 256, " OpenPIC  ");
+        } else {
+                mpic = mpic_alloc(np, r.start,
                           MPIC_PRIMARY | MPIC_WANTS_RESET |
                           MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                           MPIC_SINGLE_DEST_CPU,
                         0, 256, " OpenPIC  ");
+        }
+
         BUG_ON(mpic == NULL);
         of_node_put(np);
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 2494c5155919..658a36fab3ab 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -231,7 +231,7 @@ static void __init mpc85xx_mds_setup_arch(void)
 
 static int __init board_fixups(void)
 {
-        char phy_id[BUS_ID_SIZE];
+        char phy_id[20];
         char *compstrs[2] = {"fsl,gianfar-mdio", "fsl,ucc-mdio"};
         struct device_node *mdio;
         struct resource res;
@@ -241,13 +241,15 @@ static int __init board_fixups(void)
                 mdio = of_find_compatible_node(NULL, NULL, compstrs[i]);
 
                 of_address_to_resource(mdio, 0, &res);
-                snprintf(phy_id, BUS_ID_SIZE, "%x:%02x", res.start, 1);
+                snprintf(phy_id, sizeof(phy_id), "%llx:%02x",
+                        (unsigned long long)res.start, 1);
 
                 phy_register_fixup_for_id(phy_id, mpc8568_fixup_125_clock);
                 phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups);
 
                 /* Register a workaround for errata */
-                snprintf(phy_id, BUS_ID_SIZE, "%x:%02x", res.start, 7);
+                snprintf(phy_id, sizeof(phy_id), "%llx:%02x",
+                        (unsigned long long)res.start, 7);
                 phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups);
 
                 of_node_put(mdio);
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
new file mode 100644
index 000000000000..d652c713f496
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -0,0 +1,104 @@
+/*
+ * Author: Andy Fleming <afleming@freescale.com>
+ *         Kumar Gala <galak@kernel.crashing.org>
+ *
+ * Copyright 2006-2008 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+
+#include <asm/machdep.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/mpic.h>
+#include <asm/cacheflush.h>
+
+#include <sysdev/fsl_soc.h>
+
+extern volatile unsigned long __secondary_hold_acknowledge;
+extern void __early_start(void);
+
+#define BOOT_ENTRY_ADDR_UPPER   0
+#define BOOT_ENTRY_ADDR_LOWER   1
+#define BOOT_ENTRY_R3_UPPER     2
+#define BOOT_ENTRY_R3_LOWER     3
+#define BOOT_ENTRY_RESV         4
+#define BOOT_ENTRY_PIR          5
+#define BOOT_ENTRY_R6_UPPER     6
+#define BOOT_ENTRY_R6_LOWER     7
+#define NUM_BOOT_ENTRY          8
+#define SIZE_BOOT_ENTRY         (NUM_BOOT_ENTRY * sizeof(u32))
+
+static void __init
+smp_85xx_kick_cpu(int nr)
+{
+        unsigned long flags;
+        const u64 *cpu_rel_addr;
+        __iomem u32 *bptr_vaddr;
+        struct device_node *np;
+        int n = 0;
+
+        WARN_ON (nr < 0 || nr >= NR_CPUS);
+
+        pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
+
+        local_irq_save(flags);
+
+        np = of_get_cpu_node(nr, NULL);
+        cpu_rel_addr = of_get_property(np, "cpu-release-addr", NULL);
+
+        if (cpu_rel_addr == NULL) {
+                printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr);
+                return;
+        }
+
+        /* Map the spin table */
+        bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
+
+        out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
+        out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
+
+        /* Wait a bit for the CPU to ack. */
+        while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
+                mdelay(1);
+
+        iounmap(bptr_vaddr);
+
+        local_irq_restore(flags);
+
+        pr_debug("waited %d msecs for CPU #%d.\n", n, nr);
+}
+
+static void __init
+smp_85xx_setup_cpu(int cpu_nr)
+{
+        mpic_setup_this_cpu();
+
+        /* Clear any pending timer interrupts */
+        mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
+
+        /* Enable decrementer interrupt */
+        mtspr(SPRN_TCR, TCR_DIE);
+}
+
+struct smp_ops_t smp_85xx_ops = {
+        .message_pass = smp_mpic_message_pass,
+        .probe = smp_mpic_probe,
+        .kick_cpu = smp_85xx_kick_cpu,
+        .setup_cpu = smp_85xx_setup_cpu,
+};
+
+void __init
+mpc85xx_smp_init(void)
+{
+        smp_ops = &smp_85xx_ops;
+}
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 77dd797a2580..8e5693935975 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -34,6 +34,8 @@ config MPC8610_HPCD
 config GEF_SBC610
         bool "GE Fanuc SBC610"
         select DEFAULT_UIMAGE
+        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         select HAS_RAPIDIO
         help
           This option enables support for GE Fanuc's SBC610.
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 4a56ff619afd..31e540c2ebbc 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -7,4 +7,5 @@ obj-$(CONFIG_SMP)		+= mpc86xx_smp.o
 obj-$(CONFIG_MPC8641_HPCN)      += mpc86xx_hpcn.o
 obj-$(CONFIG_SBC8641D)          += sbc8641d.o
 obj-$(CONFIG_MPC8610_HPCD)      += mpc8610_hpcd.o
-obj-$(CONFIG_GEF_SBC610)        += gef_sbc610.o gef_pic.o
+gef-gpio-$(CONFIG_GPIOLIB)      += gef_gpio.o
+obj-$(CONFIG_GEF_SBC610)        += gef_sbc610.o gef_pic.o $(gef-gpio-y)
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
new file mode 100644
index 000000000000..85b2800f4cb7
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -0,0 +1,143 @@
+/*
+ * Driver for GE Fanuc's FPGA based GPIO pins
+ *
+ * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ *
+ * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/* TODO
+ *
+ * Configuration of output modes (totem-pole/open-drain)
+ * Interrupt configuration - interrupts are always generated the FPGA relies on
+ *      the I/O interrupt controllers mask to stop them propergating
+ */
+
+#include <linux/kernel.h>
+#include <linux/compiler.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
+
+#define GEF_GPIO_DIRECT         0x00
+#define GEF_GPIO_IN             0x04
+#define GEF_GPIO_OUT            0x08
+#define GEF_GPIO_TRIG           0x0C
+#define GEF_GPIO_POLAR_A        0x10
+#define GEF_GPIO_POLAR_B        0x14
+#define GEF_GPIO_INT_STAT       0x18
+#define GEF_GPIO_OVERRUN        0x1C
+#define GEF_GPIO_MODE           0x20
+
+#define NUM_GPIO 19
+
+static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value)
+{
+        unsigned int data;
+
+        data = ioread32be(reg);
+        /* value: 0=low; 1=high */
+        if (value & 0x1)
+                data = data | (0x1 << offset);
+        else
+                data = data & ~(0x1 << offset);
+
+        iowrite32be(data, reg);
+}
+
+
+static int gef_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
+{
+        unsigned int data;
+        struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
+
+        data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
+        data = data | (0x1 << offset);
+        iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
+
+        return 0;
+}
+
+static int gef_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
+{
+        unsigned int data;
+        struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
+
+        /* Set direction before switching to input */
+        _gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
+
+        data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
+        data = data & ~(0x1 << offset);
+        iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
+
+        return 0;
+}
+
+static int gef_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+        unsigned int data;
+        int state = 0;
+        struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
+
+        data = ioread32be(mmchip->regs + GEF_GPIO_IN);
+        state = (int)((data >> offset) & 0x1);
+
+        return state;
+}
+
+static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
+
+        _gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
+}
+
+static int __init gef_gpio_init(void)
+{
+        struct device_node *np;
+
+        for_each_compatible_node(np, NULL, "gef,sbc610-gpio") {
+                int retval;
+                struct of_mm_gpio_chip *gef_gpio_chip;
+
+                pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
+
+                /* Allocate chip structure */
+                gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
+                if (!gef_gpio_chip) {
+                        pr_err("%s: Unable to allocate structure\n",
+                                np->full_name);
+                        continue;
+                }
+
+                /* Setup pointers to chip functions */
+                gef_gpio_chip->of_gc.gpio_cells = 2;
+                gef_gpio_chip->of_gc.gc.ngpio = NUM_GPIO;
+                gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
+                gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
+                gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
+                gef_gpio_chip->of_gc.gc.set = gef_gpio_set;
+
+                /* This function adds a memory mapped GPIO chip */
+                retval = of_mm_gpiochip_add(np, gef_gpio_chip);
+                if (retval) {
+                        kfree(gef_gpio_chip);
+                        pr_err("%s: Unable to add GPIO\n", np->full_name);
+                }
+        }
+
+        return 0;
+};
+arch_initcall(gef_gpio_init);
+
+MODULE_DESCRIPTION("GE Fanuc I/O FPGA GPIO driver");
+MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com");
+MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 548efa55c8fe..3d0c776f888d 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -195,16 +195,24 @@ config SPE
 
 config PPC_STD_MMU
         bool
-        depends on 6xx || POWER3 || POWER4 || PPC64
+        depends on 6xx || PPC64
         default y
 
 config PPC_STD_MMU_32
         def_bool y
         depends on PPC_STD_MMU && PPC32
 
+config PPC_STD_MMU_64
+        def_bool y
+        depends on PPC_STD_MMU && PPC64
+
+config PPC_MMU_NOHASH
+        def_bool y
+        depends on !PPC_STD_MMU
+
 config PPC_MM_SLICES
         bool
-        default y if HUGETLB_PAGE || PPC_64K_PAGES
+        default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES)
         default n
 
 config VIRT_CPU_ACCOUNTING
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index c14d7d8d96c8..5cc3279559a4 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -2,13 +2,18 @@ config PPC_CELL
         bool
         default n
 
-config PPC_CELL_NATIVE
+config PPC_CELL_COMMON
         bool
         select PPC_CELL
         select PPC_DCR_MMIO
-        select PPC_OF_PLATFORM_PCI
         select PPC_INDIRECT_IO
         select PPC_NATIVE
+        select PPC_RTAS
+
+config PPC_CELL_NATIVE
+        bool
+        select PPC_CELL_COMMON
+        select PPC_OF_PLATFORM_PCI
         select MPIC
         select IBM_NEW_EMAC_EMAC4
         select IBM_NEW_EMAC_RGMII
@@ -20,7 +25,6 @@ config PPC_IBM_CELL_BLADE
         bool "IBM Cell Blade"
         depends on PPC_MULTIPLATFORM && PPC64
         select PPC_CELL_NATIVE
-        select PPC_RTAS
         select MMIO_NVRAM
         select PPC_UDBG_16550
         select UDBG_RTAS_CONSOLE
@@ -28,16 +32,17 @@ config PPC_IBM_CELL_BLADE
 config PPC_CELLEB
         bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
         depends on PPC_MULTIPLATFORM && PPC64
-        select PPC_CELL
         select PPC_CELL_NATIVE
-        select PPC_RTAS
-        select PPC_INDIRECT_IO
-        select PPC_OF_PLATFORM_PCI
         select HAS_TXX9_SERIAL
         select PPC_UDBG_BEAT
         select USB_OHCI_BIG_ENDIAN_MMIO
         select USB_EHCI_BIG_ENDIAN_MMIO
 
+config PPC_CELL_QPACE
+        bool "IBM Cell - QPACE"
+        depends on PPC_MULTIPLATFORM && PPC64
+        select PPC_CELL_COMMON
+
 menu "Cell Broadband Engine options"
         depends on PPC_CELL
 
@@ -102,7 +107,7 @@ config PPC_IBM_CELL_POWERBUTTON
 config CBE_THERM
         tristate "CBE thermal support"
         default m
-        depends on CBE_RAS
+        depends on CBE_RAS && SPU_BASE
 
 config CBE_CPUFREQ
         tristate "CBE frequency scaling"
@@ -136,5 +141,5 @@ endmenu
 
 config OPROFILE_CELL
         def_bool y
-        depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y)
+        depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE
 
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 7fd830872c43..43eccb270301 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -1,7 +1,7 @@
-obj-$(CONFIG_PPC_CELL_NATIVE)           += interrupt.o iommu.o setup.o \
-                                           cbe_regs.o spider-pic.o \
-                                           pervasive.o pmu.o io-workarounds.o \
-                                           spider-pci.o
+obj-$(CONFIG_PPC_CELL_COMMON)           += cbe_regs.o interrupt.o pervasive.o
+
+obj-$(CONFIG_PPC_CELL_NATIVE)           += iommu.o setup.o spider-pic.o \
+                                           pmu.o io-workarounds.o spider-pci.o
 obj-$(CONFIG_CBE_RAS)                   += ras.o
 
 obj-$(CONFIG_CBE_THERM)                 += cbe_thermal.o
@@ -14,13 +14,12 @@ obj-$(CONFIG_PPC_IBM_CELL_POWERBUTTON)	+= cbe_powerbutton.o
 
 ifeq ($(CONFIG_SMP),y)
 obj-$(CONFIG_PPC_CELL_NATIVE)           += smp.o
+obj-$(CONFIG_PPC_CELL_QPACE)            += smp.o
 endif
 
 # needed only when building loadable spufs.ko
-spu-priv1-$(CONFIG_PPC_CELL_NATIVE)     += spu_priv1_mmio.o
-
-spu-manage-$(CONFIG_PPC_CELLEB)         += spu_manage.o
-spu-manage-$(CONFIG_PPC_CELL_NATIVE)    += spu_manage.o
+spu-priv1-$(CONFIG_PPC_CELL_COMMON)     += spu_priv1_mmio.o
+spu-manage-$(CONFIG_PPC_CELL_COMMON)    += spu_manage.o
 
 obj-$(CONFIG_SPU_BASE)                  += spu_callbacks.o spu_base.o \
                                            spu_notify.o \
@@ -31,6 +30,8 @@ obj-$(CONFIG_SPU_BASE)			+= spu_callbacks.o spu_base.o \
 
 obj-$(CONFIG_PCI_MSI)                   += axon_msi.o
 
+# qpace setup
+obj-$(CONFIG_PPC_CELL_QPACE)            += qpace_setup.o
 
 # celleb stuff
 ifeq ($(CONFIG_PPC_CELLEB),y)
diff --git a/arch/powerpc/platforms/cell/celleb_setup.c b/arch/powerpc/platforms/cell/celleb_setup.c
index b11cb30decb2..07c234f6b2b6 100644
--- a/arch/powerpc/platforms/cell/celleb_setup.c
+++ b/arch/powerpc/platforms/cell/celleb_setup.c
@@ -45,7 +45,6 @@
 #include <asm/mmu.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <asm/kexec.h>
 #include <asm/prom.h>
 #include <asm/machdep.h>
 #include <asm/cputable.h>
@@ -226,9 +225,6 @@ define_machine(celleb_beat) {
         .pci_setup_phb          = celleb_setup_phb,
 #ifdef CONFIG_KEXEC
         .kexec_cpu_down         = beat_kexec_cpu_down,
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
 #endif
 };
 
@@ -248,9 +244,4 @@ define_machine(celleb_native) {
         .pci_probe_mode         = celleb_pci_probe_mode,
         .pci_setup_phb          = celleb_setup_phb,
         .init_IRQ               = celleb_init_IRQ_native,
-#ifdef CONFIG_KEXEC
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
-#endif
 };
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 3168272ab0d7..86db4dd170a0 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -1053,10 +1053,7 @@ static int __init cell_iommu_fixed_mapping_init(void)
         }
 
         /* We must have dma-ranges properties for fixed mapping to work */
-        for (np = NULL; (np = of_find_all_nodes(np));) {
-                if (of_find_property(np, "dma-ranges", NULL))
-                        break;
-        }
+        np = of_find_node_with_property(NULL, "dma-ranges");
         of_node_put(np);
 
         if (!np) {
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
new file mode 100644
index 000000000000..be84e6a16b30
--- /dev/null
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -0,0 +1,152 @@
+/*
+ *  linux/arch/powerpc/platforms/cell/qpace_setup.c
+ *
+ *  Copyright (C) 1995  Linus Torvalds
+ *  Adapted from 'alpha' version by Gary Thomas
+ *  Modified by Cort Dougan (cort@cs.nmt.edu)
+ *  Modified by PPC64 Team, IBM Corp
+ *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
+ *  Modified by Benjamin Krill <ben@codiert.org>, IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/console.h>
+#include <linux/of_platform.h>
+
+#include <asm/mmu.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/kexec.h>
+#include <asm/pgtable.h>
+#include <asm/prom.h>
+#include <asm/rtas.h>
+#include <asm/dma.h>
+#include <asm/machdep.h>
+#include <asm/time.h>
+#include <asm/cputable.h>
+#include <asm/irq.h>
+#include <asm/spu.h>
+#include <asm/spu_priv1.h>
+#include <asm/udbg.h>
+#include <asm/cell-regs.h>
+
+#include "interrupt.h"
+#include "pervasive.h"
+#include "ras.h"
+#include "io-workarounds.h"
+
+static void qpace_show_cpuinfo(struct seq_file *m)
+{
+        struct device_node *root;
+        const char *model = "";
+
+        root = of_find_node_by_path("/");
+        if (root)
+                model = of_get_property(root, "model", NULL);
+        seq_printf(m, "machine\t\t: CHRP %s\n", model);
+        of_node_put(root);
+}
+
+static void qpace_progress(char *s, unsigned short hex)
+{
+        printk("*** %04x : %s\n", hex, s ? s : "");
+}
+
+static int __init qpace_publish_devices(void)
+{
+        int node;
+
+        /* Publish OF platform devices for southbridge IOs */
+        of_platform_bus_probe(NULL, NULL, NULL);
+
+        /* There is no device for the MIC memory controller, thus we create
+         * a platform device for it to attach the EDAC driver to.
+         */
+        for_each_online_node(node) {
+                if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
+                        continue;
+                platform_device_register_simple("cbe-mic", node, NULL, 0);
+        }
+
+        return 0;
+}
+machine_subsys_initcall(qpace, qpace_publish_devices);
+
+extern int qpace_notify(struct device *dev)
+{
+        /* set dma_ops for of_platform bus */
+        if (dev->bus && dev->bus->name
+                        && !strcmp(dev->bus->name, "of_platform"))
+                set_dma_ops(dev, &dma_direct_ops);
+
+        return 0;
+}
+
+static void __init qpace_setup_arch(void)
+{
+#ifdef CONFIG_SPU_BASE
+        spu_priv1_ops = &spu_priv1_mmio_ops;
+        spu_management_ops = &spu_management_of_ops;
+#endif
+
+        cbe_regs_init();
+
+#ifdef CONFIG_CBE_RAS
+        cbe_ras_init();
+#endif
+
+#ifdef CONFIG_SMP
+        smp_init_cell();
+#endif
+
+        /* init to some ~sane value until calibrate_delay() runs */
+        loops_per_jiffy = 50000000;
+
+        cbe_pervasive_init();
+#ifdef CONFIG_DUMMY_CONSOLE
+        conswitchp = &dummy_con;
+#endif
+
+        /* set notifier function */
+        platform_notify = &qpace_notify;
+}
+
+static int __init qpace_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (!of_flat_dt_is_compatible(root, "IBM,QPACE"))
+                return 0;
+
+        hpte_init_native();
+
+        return 1;
+}
+
+define_machine(qpace) {
+        .name                   = "QPACE",
+        .probe                  = qpace_probe,
+        .setup_arch             = qpace_setup_arch,
+        .show_cpuinfo           = qpace_show_cpuinfo,
+        .restart                = rtas_restart,
+        .power_off              = rtas_power_off,
+        .halt                   = rtas_halt,
+        .get_boot_time          = rtas_get_boot_time,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = qpace_progress,
+        .init_IRQ               = iic_init_IRQ,
+#ifdef CONFIG_KEXEC
+        .machine_kexec          = default_machine_kexec,
+        .machine_kexec_prepare  = default_machine_kexec_prepare,
+        .machine_crash_shutdown = default_machine_crash_shutdown,
+#endif
+};
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index ab721b50fbba..59305369f6b2 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -35,7 +35,6 @@
 #include <asm/mmu.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <asm/kexec.h>
 #include <asm/pgtable.h>
 #include <asm/prom.h>
 #include <asm/rtas.h>
@@ -289,9 +288,4 @@ define_machine(cell) {
         .progress               = cell_progress,
         .init_IRQ               = cell_init_irq,
         .pci_setup_phb          = cell_setup_phb,
-#ifdef CONFIG_KEXEC
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
-#endif
 };
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
index 906a0a2a9fe1..1410443731eb 100644
--- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -80,10 +80,10 @@ static void cpu_affinity_set(struct spu *spu, int cpu)
         u64 route;
 
         if (nr_cpus_node(spu->node)) {
-                cpumask_t spumask = node_to_cpumask(spu->node);
-                cpumask_t cpumask = node_to_cpumask(cpu_to_node(cpu));
+                const struct cpumask *spumask = cpumask_of_node(spu->node),
+                        *cpumask = cpumask_of_node(cpu_to_node(cpu));
 
-                if (!cpus_intersects(spumask, cpumask))
+                if (!cpumask_intersects(spumask, cpumask))
                         return;
         }
 
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 1b26071a86ca..7106b63d401b 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -273,12 +273,10 @@ spufs_mem_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
                 return VM_FAULT_NOPAGE;
 
         if (ctx->state == SPU_STATE_SAVED) {
-                vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                                        & ~_PAGE_NO_CACHE);
+                vma->vm_page_prot = pgprot_cached(vma->vm_page_prot);
                 pfn = vmalloc_to_pfn(ctx->csa.lscsa->ls + offset);
         } else {
-                vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                             | _PAGE_NO_CACHE);
+                vma->vm_page_prot = pgprot_noncached_wc(vma->vm_page_prot);
                 pfn = (ctx->spu->local_store_phys + offset) >> PAGE_SHIFT;
         }
         vm_insert_pfn(vma, address, pfn);
@@ -338,8 +336,7 @@ static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma)
                 return -EINVAL;
 
         vma->vm_flags |= VM_IO | VM_PFNMAP;
-        vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                     | _PAGE_NO_CACHE);
+        vma->vm_page_prot = pgprot_noncached_wc(vma->vm_page_prot);
 
         vma->vm_ops = &spufs_mem_mmap_vmops;
         return 0;
@@ -452,8 +449,7 @@ static int spufs_cntl_mmap(struct file *file, struct vm_area_struct *vma)
                 return -EINVAL;
 
         vma->vm_flags |= VM_IO | VM_PFNMAP;
-        vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                     | _PAGE_NO_CACHE | _PAGE_GUARDED);
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
         vma->vm_ops = &spufs_cntl_mmap_vmops;
         return 0;
@@ -1155,8 +1151,7 @@ static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
                 return -EINVAL;
 
         vma->vm_flags |= VM_IO | VM_PFNMAP;
-        vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                     | _PAGE_NO_CACHE | _PAGE_GUARDED);
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
         vma->vm_ops = &spufs_signal1_mmap_vmops;
         return 0;
@@ -1292,8 +1287,7 @@ static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
                 return -EINVAL;
 
         vma->vm_flags |= VM_IO | VM_PFNMAP;
-        vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                     | _PAGE_NO_CACHE | _PAGE_GUARDED);
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
         vma->vm_ops = &spufs_signal2_mmap_vmops;
         return 0;
@@ -1414,8 +1408,7 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
                 return -EINVAL;
 
         vma->vm_flags |= VM_IO | VM_PFNMAP;
-        vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                     | _PAGE_NO_CACHE | _PAGE_GUARDED);
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
         vma->vm_ops = &spufs_mss_mmap_vmops;
         return 0;
@@ -1476,8 +1469,7 @@ static int spufs_psmap_mmap(struct file *file, struct vm_area_struct *vma)
                 return -EINVAL;
 
         vma->vm_flags |= VM_IO | VM_PFNMAP;
-        vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                     | _PAGE_NO_CACHE | _PAGE_GUARDED);
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
         vma->vm_ops = &spufs_psmap_mmap_vmops;
         return 0;
@@ -1536,8 +1528,7 @@ static int spufs_mfc_mmap(struct file *file, struct vm_area_struct *vma)
                 return -EINVAL;
 
         vma->vm_flags |= VM_IO | VM_PFNMAP;
-        vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
-                                     | _PAGE_NO_CACHE | _PAGE_GUARDED);
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
         vma->vm_ops = &spufs_mfc_mmap_vmops;
         return 0;
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index cb85d237e492..e309ef70a531 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -95,9 +95,8 @@ spufs_new_inode(struct super_block *sb, int mode)
                 goto out;
 
         inode->i_mode = mode;
-        inode->i_uid = current->fsuid;
-        inode->i_gid = current->fsgid;
-        inode->i_blocks = 0;
+        inode->i_uid = current_fsuid();
+        inode->i_gid = current_fsgid();
         inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME;
 out:
         return inode;
@@ -323,7 +322,7 @@ static int spufs_context_open(struct dentry *dentry, struct vfsmount *mnt)
                 goto out;
         }
 
-        filp = dentry_open(dentry, mnt, O_RDONLY);
+        filp = dentry_open(dentry, mnt, O_RDONLY, current_cred());
         if (IS_ERR(filp)) {
                 put_unused_fd(ret);
                 ret = PTR_ERR(filp);
@@ -562,7 +561,7 @@ static int spufs_gang_open(struct dentry *dentry, struct vfsmount *mnt)
                 goto out;
         }
 
-        filp = dentry_open(dentry, mnt, O_RDONLY);
+        filp = dentry_open(dentry, mnt, O_RDONLY, current_cred());
         if (IS_ERR(filp)) {
                 put_unused_fd(ret);
                 ret = PTR_ERR(filp);
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 2ad914c47493..6a0ad196aeb3 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -166,9 +166,9 @@ void spu_update_sched_info(struct spu_context *ctx)
 static int __node_allowed(struct spu_context *ctx, int node)
 {
         if (nr_cpus_node(node)) {
-                cpumask_t mask = node_to_cpumask(node);
+                const struct cpumask *mask = cpumask_of_node(node);
 
-                if (cpus_intersects(mask, ctx->cpus_allowed))
+                if (cpumask_intersects(mask, &ctx->cpus_allowed))
                         return 1;
         }
 
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index d3cde6b9d2df..f6b0c519d5a2 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -141,6 +141,7 @@ hydra_init(void)
                 of_node_put(np);
                 return 0;
         }
+        of_node_put(np);
         Hydra = ioremap(r.start, r.end-r.start);
         printk("Hydra Mac I/O at %llx\n", (unsigned long long)r.start);
         printk("Hydra Feature_Control was %x",
@@ -198,7 +199,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
                 printk ("RTAS supporting Pegasos OF not found, please upgrade"
                         " your firmware\n");
         }
-        ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
+        ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
         /* keep the reference to the root node */
 }
 
diff --git a/arch/powerpc/platforms/embedded6xx/c2k.c b/arch/powerpc/platforms/embedded6xx/c2k.c
index 32ba0fa0ad03..8cab5731850f 100644
--- a/arch/powerpc/platforms/embedded6xx/c2k.c
+++ b/arch/powerpc/platforms/embedded6xx/c2k.c
@@ -20,7 +20,6 @@
 #include <linux/seq_file.h>
 #include <linux/time.h>
 #include <linux/of.h>
-#include <linux/kexec.h>
 
 #include <asm/machdep.h>
 #include <asm/prom.h>
@@ -147,9 +146,4 @@ define_machine(c2k) {
         .get_irq                = mv64x60_get_irq,
         .restart                = c2k_restart,
         .calibrate_decr         = generic_calibrate_decr,
-#ifdef CONFIG_KEXEC
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
-#endif
 };
diff --git a/arch/powerpc/platforms/embedded6xx/prpmc2800.c b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
index 4c485e984236..670035f49a69 100644
--- a/arch/powerpc/platforms/embedded6xx/prpmc2800.c
+++ b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
@@ -19,7 +19,6 @@
 #include <asm/prom.h>
 #include <asm/system.h>
 #include <asm/time.h>
-#include <asm/kexec.h>
 
 #include <mm/mmu_decl.h>
 
@@ -155,9 +154,4 @@ define_machine(prpmc2800){
         .get_irq                = mv64x60_get_irq,
         .restart                = prpmc2800_restart,
         .calibrate_decr         = generic_calibrate_decr,
-#ifdef CONFIG_KEXEC
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
-#endif
 };
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
index 45ffd8e542f4..ed3753d8c109 100644
--- a/arch/powerpc/platforms/iseries/Kconfig
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -9,6 +9,7 @@ menu "iSeries device drivers"
 
 config VIODASD
         tristate "iSeries Virtual I/O disk support"
+        depends on BLOCK
         help
           If you are running on an iSeries system and you want to use
           virtual disks created and managed by OS/400, say Y.
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index d4c61c3c9669..bfd60e4accee 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -50,7 +50,6 @@
 #include <asm/system.h>
 #include <asm/pgtable.h>
 #include <asm/io.h>
-#include <asm/kexec.h>
 #include <asm/pci-bridge.h>
 #include <asm/iommu.h>
 #include <asm/machdep.h>
@@ -335,9 +334,4 @@ define_machine(maple) {
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = maple_progress,
         .power_save             = power4_idle,
-#ifdef CONFIG_KEXEC
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
-#endif
 };
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c
index 792d3ce8112e..65c585b8b00d 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_32.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_32.c
@@ -310,7 +310,7 @@ static int pmu_set_cpu_speed(int low_speed)
                 _set_L3CR(save_l3cr);
 
         /* Restore userland MMU context */
-        set_context(current->active_mm->context.id, current->active_mm->pgd);
+        switch_mmu_context(NULL, current->active_mm);
 
 #ifdef DEBUG_FREQ
         printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index bcf50d7056e9..54b7b76ed4f0 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -729,7 +729,7 @@ static void __init setup_bandit(struct pci_controller *hose,
 static int __init setup_uninorth(struct pci_controller *hose,
                                  struct resource *addr)
 {
-        ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
+        ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
         has_uninorth = 1;
         hose->ops = &macrisc_pci_ops;
         hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
@@ -996,7 +996,7 @@ void __init pmac_pci_init(void)
         struct device_node *np, *root;
         struct device_node *ht = NULL;
 
-        ppc_pci_flags = PPC_PCI_CAN_SKIP_ISA_ALIGN;
+        ppc_pci_set_flags(PPC_PCI_CAN_SKIP_ISA_ALIGN);
 
         root = of_find_node_by_path("/");
         if (root == NULL) {
@@ -1055,7 +1055,7 @@ void __init pmac_pci_init(void)
          * some offset between bus number and domains for now when we
          * assign all busses should help for now
          */
-        if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
+        if (ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
                 pcibios_assign_bus_offset = 0x10;
 #endif
 }
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 82c14d203d8b..9b78f5300c24 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -60,7 +60,6 @@
 #include <asm/system.h>
 #include <asm/pgtable.h>
 #include <asm/io.h>
-#include <asm/kexec.h>
 #include <asm/pci-bridge.h>
 #include <asm/ohare.h>
 #include <asm/mediabay.h>
@@ -310,9 +309,7 @@ static void __init pmac_setup_arch(void)
         }
 
         /* See if newworld or oldworld */
-        for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
-                if (of_get_property(ic, "interrupt-controller", NULL))
-                        break;
+        ic = of_find_node_with_property(NULL, "interrupt-controller");
         if (ic) {
                 pmac_newworld = 1;
                 of_node_put(ic);
@@ -740,11 +737,6 @@ define_machine(powermac) {
         .pci_probe_mode         = pmac_pci_probe_mode,
         .power_save             = power4_idle,
         .enable_pmcs            = power4_enable_pmcs,
-#ifdef CONFIG_KEXEC
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
-#endif
 #endif /* CONFIG_PPC64 */
 #ifdef CONFIG_PPC32
         .pcibios_enable_device_hook = pmac_pci_enable_device_hook,
diff --git a/arch/powerpc/platforms/powermac/sleep.S b/arch/powerpc/platforms/powermac/sleep.S
index adee28da353f..1c2802fabd57 100644
--- a/arch/powerpc/platforms/powermac/sleep.S
+++ b/arch/powerpc/platforms/powermac/sleep.S
@@ -17,6 +17,7 @@
 #include <asm/cache.h>
 #include <asm/thread_info.h>
 #include <asm/asm-offsets.h>
+#include <asm/mmu.h>
 
 #define MAGIC   0x4c617273      /* 'Lars' */
 
@@ -323,7 +324,7 @@ grackle_wake_up:
         lwz     r4,SL_IBAT3+4(r1)
         mtibatl 3,r4
 
-BEGIN_FTR_SECTION
+BEGIN_MMU_FTR_SECTION
         li      r4,0
         mtspr   SPRN_DBAT4U,r4
         mtspr   SPRN_DBAT4L,r4
@@ -341,7 +342,7 @@ BEGIN_FTR_SECTION
         mtspr   SPRN_IBAT6L,r4
         mtspr   SPRN_IBAT7U,r4
         mtspr   SPRN_IBAT7L,r4
-END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
 
         /* Flush all TLBs */
         lis     r4,0x1000
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 40f72c2a4699..6b0711c15eca 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -739,7 +739,7 @@ static void __init smp_core99_setup(int ncpus)
 
                 /* XXX should get this from reg properties */
                 for (i = 1; i < ncpus; ++i)
-                        smp_hw_index[i] = i;
+                        set_hard_smp_processor_id(i, i);
         }
 #endif
 
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index ffdd8e963fbd..dbc124e05646 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -314,11 +314,17 @@ static int __init ps3_setup_vuart_device(enum ps3_match_id match_id,
 
         result = ps3_system_bus_device_register(&p->dev);
 
-        if (result)
+        if (result) {
                 pr_debug("%s:%d ps3_system_bus_device_register failed\n",
                         __func__, __LINE__);
-
+                goto fail_device_register;
+        }
         pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        return 0;
+
+fail_device_register:
+        kfree(p);
+        pr_debug(" <- %s:%d fail\n", __func__, __LINE__);
         return result;
 }
 
@@ -463,11 +469,17 @@ static int __init ps3_register_sound_devices(void)
 
         result = ps3_system_bus_device_register(&p->dev);
 
-        if (result)
+        if (result) {
                 pr_debug("%s:%d ps3_system_bus_device_register failed\n",
                         __func__, __LINE__);
-
+                goto fail_device_register;
+        }
         pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        return 0;
+
+fail_device_register:
+        kfree(p);
+        pr_debug(" <- %s:%d failed\n", __func__, __LINE__);
         return result;
 }
 
@@ -485,17 +497,24 @@ static int __init ps3_register_graphics_devices(void)
         if (!p)
                 return -ENOMEM;
 
-        p->dev.match_id = PS3_MATCH_ID_GRAPHICS;
-        p->dev.match_sub_id = PS3_MATCH_SUB_ID_FB;
+        p->dev.match_id = PS3_MATCH_ID_GPU;
+        p->dev.match_sub_id = PS3_MATCH_SUB_ID_GPU_FB;
         p->dev.dev_type = PS3_DEVICE_TYPE_IOC0;
 
         result = ps3_system_bus_device_register(&p->dev);
 
-        if (result)
+        if (result) {
                 pr_debug("%s:%d ps3_system_bus_device_register failed\n",
                         __func__, __LINE__);
+                goto fail_device_register;
+        }
 
         pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        return 0;
+
+fail_device_register:
+        kfree(p);
+        pr_debug(" <- %s:%d failed\n", __func__, __LINE__);
         return result;
 }
 
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index 3a58ffabccd9..a4d49dd9e8a9 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -649,7 +649,7 @@ static int dma_sb_region_create(struct ps3_dma_region *r)
 {
         int result;
 
-        pr_info(" -> %s:%d:\n", __func__, __LINE__);
+        DBG(" -> %s:%d:\n", __func__, __LINE__);
 
         BUG_ON(!r);
 
diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c
index 77bc330263c4..35f3e85cf60e 100644
--- a/arch/powerpc/platforms/ps3/setup.c
+++ b/arch/powerpc/platforms/ps3/setup.c
@@ -23,7 +23,6 @@
 #include <linux/fs.h>
 #include <linux/root_dev.h>
 #include <linux/console.h>
-#include <linux/kexec.h>
 #include <linux/bootmem.h>
 
 #include <asm/machdep.h>
@@ -42,6 +41,10 @@
 #define DBG pr_debug
 #endif
 
+/* mutex synchronizing GPU accesses and video mode changes */
+DEFINE_MUTEX(ps3_gpu_mutex);
+EXPORT_SYMBOL_GPL(ps3_gpu_mutex);
+
 #if !defined(CONFIG_SMP)
 static void smp_send_stop(void) {}
 #endif
@@ -277,8 +280,5 @@ define_machine(ps3) {
         .halt                           = ps3_halt,
 #if defined(CONFIG_KEXEC)
         .kexec_cpu_down                 = ps3_kexec_cpu_down,
-        .machine_kexec                  = default_machine_kexec,
-        .machine_kexec_prepare          = default_machine_kexec_prepare,
-        .machine_crash_shutdown         = default_machine_crash_shutdown,
 #endif
 };
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 661e9f77ebf6..ee0d22911621 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -31,7 +31,7 @@
 #include "platform.h"
 
 static struct device ps3_system_bus = {
-        .bus_id = "ps3_system",
+        .init_name = "ps3_system",
 };
 
 /* FIXME: need device usage counters! */
@@ -175,7 +175,7 @@ int ps3_open_hv_device(struct ps3_system_bus_device *dev)
                 return ps3_open_hv_device_sb(dev);
 
         case PS3_MATCH_ID_SOUND:
-        case PS3_MATCH_ID_GRAPHICS:
+        case PS3_MATCH_ID_GPU:
                 return ps3_open_hv_device_gpu(dev);
 
         case PS3_MATCH_ID_AV_SETTINGS:
@@ -213,7 +213,7 @@ int ps3_close_hv_device(struct ps3_system_bus_device *dev)
                 return ps3_close_hv_device_sb(dev);
 
         case PS3_MATCH_ID_SOUND:
-        case PS3_MATCH_ID_GRAPHICS:
+        case PS3_MATCH_ID_GPU:
                 return ps3_close_hv_device_gpu(dev);
 
         case PS3_MATCH_ID_AV_SETTINGS:
@@ -356,12 +356,12 @@ static int ps3_system_bus_match(struct device *_dev,
         if (result)
                 pr_info("%s:%d: dev=%u.%u(%s), drv=%u.%u(%s): match\n",
                         __func__, __LINE__,
-                        dev->match_id, dev->match_sub_id, dev->core.bus_id,
+                        dev->match_id, dev->match_sub_id, dev_name(&dev->core),
                         drv->match_id, drv->match_sub_id, drv->core.name);
         else
                 pr_debug("%s:%d: dev=%u.%u(%s), drv=%u.%u(%s): miss\n",
                         __func__, __LINE__,
-                        dev->match_id, dev->match_sub_id, dev->core.bus_id,
+                        dev->match_id, dev->match_sub_id, dev_name(&dev->core),
                         drv->match_id, drv->match_sub_id, drv->core.name);
 
         return result;
@@ -383,9 +383,9 @@ static int ps3_system_bus_probe(struct device *_dev)
                 result = drv->probe(dev);
         else
                 pr_debug("%s:%d: %s no probe method\n", __func__, __LINE__,
-                        dev->core.bus_id);
+                        dev_name(&dev->core));
 
-        pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id);
+        pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core));
         return result;
 }
 
@@ -407,7 +407,7 @@ static int ps3_system_bus_remove(struct device *_dev)
                 dev_dbg(&dev->core, "%s:%d %s: no remove method\n",
                         __func__, __LINE__, drv->core.name);
 
-        pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id);
+        pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core));
         return result;
 }
 
@@ -432,7 +432,7 @@ static void ps3_system_bus_shutdown(struct device *_dev)
         BUG_ON(!drv);
 
         dev_dbg(&dev->core, "%s:%d: %s -> %s\n", __func__, __LINE__,
-                dev->core.bus_id, drv->core.name);
+                dev_name(&dev->core), drv->core.name);
 
         if (drv->shutdown)
                 drv->shutdown(dev);
@@ -453,7 +453,8 @@ static int ps3_system_bus_uevent(struct device *_dev, struct kobj_uevent_env *en
 {
         struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
 
-        if (add_uevent_var(env, "MODALIAS=ps3:%d", dev->match_id))
+        if (add_uevent_var(env, "MODALIAS=ps3:%d:%d", dev->match_id,
+                           dev->match_sub_id))
                 return -ENOMEM;
         return 0;
 }
@@ -462,7 +463,8 @@ static ssize_t modalias_show(struct device *_dev, struct device_attribute *a,
         char *buf)
 {
         struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
-        int len = snprintf(buf, PAGE_SIZE, "ps3:%d\n", dev->match_id);
+        int len = snprintf(buf, PAGE_SIZE, "ps3:%d:%d\n", dev->match_id,
+                           dev->match_sub_id);
 
         return (len >= PAGE_SIZE) ? (PAGE_SIZE - 1) : len;
 }
@@ -742,22 +744,18 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev)
         switch (dev->dev_type) {
         case PS3_DEVICE_TYPE_IOC0:
                 dev->core.archdata.dma_ops = &ps3_ioc0_dma_ops;
-                snprintf(dev->core.bus_id, sizeof(dev->core.bus_id),
-                        "ioc0_%02x", ++dev_ioc0_count);
+                dev_set_name(&dev->core, "ioc0_%02x", ++dev_ioc0_count);
                 break;
         case PS3_DEVICE_TYPE_SB:
                 dev->core.archdata.dma_ops = &ps3_sb_dma_ops;
-                snprintf(dev->core.bus_id, sizeof(dev->core.bus_id),
-                        "sb_%02x", ++dev_sb_count);
+                dev_set_name(&dev->core, "sb_%02x", ++dev_sb_count);
 
                 break;
         case PS3_DEVICE_TYPE_VUART:
-                snprintf(dev->core.bus_id, sizeof(dev->core.bus_id),
-                        "vuart_%02x", ++dev_vuart_count);
+                dev_set_name(&dev->core, "vuart_%02x", ++dev_vuart_count);
                 break;
         case PS3_DEVICE_TYPE_LPM:
-                snprintf(dev->core.bus_id, sizeof(dev->core.bus_id),
-                        "lpm_%02x", ++dev_lpm_count);
+                dev_set_name(&dev->core, "lpm_%02x", ++dev_lpm_count);
                 break;
         default:
                 BUG();
@@ -766,7 +764,7 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev)
         dev->core.archdata.of_node = NULL;
         set_dev_node(&dev->core, 0);
 
-        pr_debug("%s:%d add %s\n", __func__, __LINE__, dev->core.bus_id);
+        pr_debug("%s:%d add %s\n", __func__, __LINE__, dev_name(&dev->core));
 
         result = device_register(&dev->core);
         return result;
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index 97619fd51e39..ddc2a307cd50 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -54,7 +54,7 @@ config PPC_SMLPAR
 
 config CMM
         tristate "Collaborative memory management"
-        depends on PPC_SMLPAR
+        depends on PPC_SMLPAR && !CRASH_DUMP
         default y
         help
           Select this option, if you want to enable the kernel interface
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c
index 5cd4d2761620..6567439fe78d 100644
--- a/arch/powerpc/platforms/pseries/cmm.c
+++ b/arch/powerpc/platforms/pseries/cmm.c
@@ -28,6 +28,7 @@
 #include <linux/kthread.h>
 #include <linux/module.h>
 #include <linux/oom.h>
+#include <linux/reboot.h>
 #include <linux/sched.h>
 #include <linux/stringify.h>
 #include <linux/swap.h>
@@ -384,6 +385,26 @@ static void cmm_unregister_sysfs(struct sys_device *sysdev)
 }
 
 /**
+ * cmm_reboot_notifier - Make sure pages are not still marked as "loaned"
+ *
+ **/
+static int cmm_reboot_notifier(struct notifier_block *nb,
+                               unsigned long action, void *unused)
+{
+        if (action == SYS_RESTART) {
+                if (cmm_thread_ptr)
+                        kthread_stop(cmm_thread_ptr);
+                cmm_thread_ptr = NULL;
+                cmm_free_pages(loaned_pages);
+        }
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block cmm_reboot_nb = {
+        .notifier_call = cmm_reboot_notifier,
+};
+
+/**
  * cmm_init - Module initialization
  *
  * Return value:
@@ -399,9 +420,12 @@ static int cmm_init(void)
         if ((rc = register_oom_notifier(&cmm_oom_nb)) < 0)
                 return rc;
 
-        if ((rc = cmm_sysfs_register(&cmm_sysdev)))
+        if ((rc = register_reboot_notifier(&cmm_reboot_nb)))
                 goto out_oom_notifier;
 
+        if ((rc = cmm_sysfs_register(&cmm_sysdev)))
+                goto out_reboot_notifier;
+
         if (cmm_disabled)
                 return rc;
 
@@ -415,6 +439,8 @@ static int cmm_init(void)
 
 out_unregister_sysfs:
         cmm_unregister_sysfs(&cmm_sysdev);
+out_reboot_notifier:
+        unregister_reboot_notifier(&cmm_reboot_nb);
 out_oom_notifier:
         unregister_oom_notifier(&cmm_oom_nb);
         return rc;
@@ -431,6 +457,7 @@ static void cmm_exit(void)
         if (cmm_thread_ptr)
                 kthread_stop(cmm_thread_ptr);
         unregister_oom_notifier(&cmm_oom_nb);
+        unregister_reboot_notifier(&cmm_reboot_nb);
         cmm_free_pages(loaned_pages);
         cmm_unregister_sysfs(&cmm_sysdev);
 }
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 54816d75b578..989d6462c154 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -21,6 +21,8 @@
  * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
  */
 
+#undef DEBUG
+
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/list.h>
@@ -488,10 +490,8 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
         if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
             pdn->eeh_mode & EEH_MODE_NOCHECK) {
                 ignored_check++;
-#ifdef DEBUG
-                printk ("EEH:ignored check (%x) for %s %s\n", 
-                        pdn->eeh_mode, pci_name (dev), dn->full_name);
-#endif
+                pr_debug("EEH: Ignored check (%x) for %s %s\n",
+                         pdn->eeh_mode, pci_name (dev), dn->full_name);
                 return 0;
         }
 
@@ -1014,10 +1014,9 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
                         eeh_subsystem_enabled = 1;
                         pdn->eeh_mode |= EEH_MODE_SUPPORTED;
 
-#ifdef DEBUG
-                        printk(KERN_DEBUG "EEH: %s: eeh enabled, config=%x pe_config=%x\n",
-                               dn->full_name, pdn->eeh_config_addr, pdn->eeh_pe_config_addr);
-#endif
+                        pr_debug("EEH: %s: eeh enabled, config=%x pe_config=%x\n",
+                                 dn->full_name, pdn->eeh_config_addr,
+                                 pdn->eeh_pe_config_addr);
                 } else {
 
                         /* This device doesn't support EEH, but it may have an
@@ -1161,13 +1160,17 @@ static void eeh_add_device_late(struct pci_dev *dev)
         if (!dev || !eeh_subsystem_enabled)
                 return;
 
-#ifdef DEBUG
-        printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
-#endif
+        pr_debug("EEH: Adding device %s\n", pci_name(dev));
 
-        pci_dev_get (dev);
         dn = pci_device_to_OF_node(dev);
         pdn = PCI_DN(dn);
+        if (pdn->pcidev == dev) {
+                pr_debug("EEH: Already referenced !\n");
+                return;
+        }
+        WARN_ON(pdn->pcidev);
+
+        pci_dev_get (dev);
         pdn->pcidev = dev;
 
         pci_addr_cache_insert_device(dev);
@@ -1206,17 +1209,18 @@ static void eeh_remove_device(struct pci_dev *dev)
                 return;
 
         /* Unregister the device with the EEH/PCI address search system */
-#ifdef DEBUG
-        printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
-#endif
-        pci_addr_cache_remove_device(dev);
-        eeh_sysfs_remove_device(dev);
+        pr_debug("EEH: Removing device %s\n", pci_name(dev));
 
         dn = pci_device_to_OF_node(dev);
-        if (PCI_DN(dn)->pcidev) {
-                PCI_DN(dn)->pcidev = NULL;
-                pci_dev_put (dev);
+        if (PCI_DN(dn)->pcidev == NULL) {
+                pr_debug("EEH: Not referenced !\n");
+                return;
         }
+        PCI_DN(dn)->pcidev = NULL;
+        pci_dev_put (dev);
+
+        pci_addr_cache_remove_device(dev);
+        eeh_sysfs_remove_device(dev);
 }
 
 void eeh_remove_bus_device(struct pci_dev *dev)
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 1f032483c026..a20ead87153d 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -116,7 +116,7 @@ static void pseries_cpu_die(unsigned int cpu)
                 cpu_status = query_cpu_stopped(pcpu);
                 if (cpu_status == 0 || cpu_status == -1)
                         break;
-                msleep(200);
+                cpu_relax();
         }
         if (cpu_status != 0) {
                 printk("Querying DEAD? cpu %i (%i) shows %i\n",
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index 7190493e9bdc..5e1ed3d60ee5 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -25,6 +25,8 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+#undef DEBUG
+
 #include <linux/pci.h>
 #include <asm/pci-bridge.h>
 #include <asm/ppc-pci.h>
@@ -69,74 +71,25 @@ EXPORT_SYMBOL_GPL(pcibios_find_pci_bus);
  * Remove all of the PCI devices under this bus both from the
  * linux pci device tree, and from the powerpc EEH address cache.
  */
-void
-pcibios_remove_pci_devices(struct pci_bus *bus)
+void pcibios_remove_pci_devices(struct pci_bus *bus)
 {
-        struct pci_dev *dev, *tmp;
+        struct pci_dev *dev, *tmp;
+        struct pci_bus *child_bus;
+
+        /* First go down child busses */
+        list_for_each_entry(child_bus, &bus->children, node)
+                pcibios_remove_pci_devices(child_bus);
 
+        pr_debug("PCI: Removing devices on bus %04x:%02x\n",
+                 pci_domain_nr(bus),  bus->number);
         list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
+                pr_debug("     * Removing %s...\n", pci_name(dev));
                 eeh_remove_bus_device(dev);
-                pci_remove_bus_device(dev);
-        }
+                pci_remove_bus_device(dev);
+        }
 }
 EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices);
 
-/* Must be called before pci_bus_add_devices */
-void
-pcibios_fixup_new_pci_devices(struct pci_bus *bus)
-{
-        struct pci_dev *dev;
-
-        list_for_each_entry(dev, &bus->devices, bus_list) {
-                /* Skip already-added devices */
-                if (!dev->is_added) {
-                        int i;
-
-                        /* Fill device archdata and setup iommu table */
-                        pcibios_setup_new_device(dev);
-
-                        pci_read_irq_line(dev);
-                        for (i = 0; i < PCI_NUM_RESOURCES; i++) {
-                                struct resource *r = &dev->resource[i];
-
-                                if (r->parent || !r->start || !r->flags)
-                                        continue;
-                                pci_claim_resource(dev, i);
-                        }
-                }
-        }
-}
-EXPORT_SYMBOL_GPL(pcibios_fixup_new_pci_devices);
-
-static int
-pcibios_pci_config_bridge(struct pci_dev *dev)
-{
-        u8 sec_busno;
-        struct pci_bus *child_bus;
-
-        /* Get busno of downstream bus */
-        pci_read_config_byte(dev, PCI_SECONDARY_BUS, &sec_busno);
-
-        /* Add to children of PCI bridge dev->bus */
-        child_bus = pci_add_new_bus(dev->bus, dev, sec_busno);
-        if (!child_bus) {
-                printk (KERN_ERR "%s: could not add second bus\n", __func__);
-                return -EIO;
-        }
-        sprintf(child_bus->name, "PCI Bus #%02x", child_bus->number);
-
-        pci_scan_child_bus(child_bus);
-
-        /* Fixup new pci devices */
-        pcibios_fixup_new_pci_devices(child_bus);
-
-        /* Make the discovered devices available */
-        pci_bus_add_devices(child_bus);
-
-        eeh_add_device_tree_late(child_bus);
-        return 0;
-}
-
 /**
  * pcibios_add_pci_devices - adds new pci devices to bus
  *
@@ -147,10 +100,9 @@ pcibios_pci_config_bridge(struct pci_dev *dev)
  * is how this routine differs from other, similar pcibios
  * routines.)
  */
-void
-pcibios_add_pci_devices(struct pci_bus * bus)
+void pcibios_add_pci_devices(struct pci_bus * bus)
 {
-        int slotno, num, mode;
+        int slotno, num, mode, pass, max;
         struct pci_dev *dev;
         struct device_node *dn = pci_bus_to_OF_node(bus);
 
@@ -162,26 +114,23 @@ pcibios_add_pci_devices(struct pci_bus * bus)
 
         if (mode == PCI_PROBE_DEVTREE) {
                 /* use ofdt-based probe */
-                of_scan_bus(dn, bus);
-                if (!list_empty(&bus->devices)) {
-                        pcibios_fixup_new_pci_devices(bus);
-                        pci_bus_add_devices(bus);
-                        eeh_add_device_tree_late(bus);
-                }
+                of_rescan_bus(dn, bus);
         } else if (mode == PCI_PROBE_NORMAL) {
                 /* use legacy probe */
                 slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
                 num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
-                if (num) {
-                        pcibios_fixup_new_pci_devices(bus);
-                        pci_bus_add_devices(bus);
-                        eeh_add_device_tree_late(bus);
+                if (!num)
+                        return;
+                pcibios_setup_bus_devices(bus);
+                max = bus->secondary;
+                for (pass=0; pass < 2; pass++)
+                        list_for_each_entry(dev, &bus->devices, bus_list) {
+                        if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+                            dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
+                                max = pci_scan_bridge(bus, dev, max, pass);
                 }
-
-                list_for_each_entry(dev, &bus->devices, bus_list)
-                        if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
-                                pcibios_pci_config_bridge(dev);
         }
+        pcibios_finish_adding_to_bus(bus);
 }
 EXPORT_SYMBOL_GPL(pcibios_add_pci_devices);
 
@@ -190,6 +139,8 @@ struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
         struct pci_controller *phb;
         int primary;
 
+        pr_debug("PCI: Initializing new hotplug PHB %s\n", dn->full_name);
+
         primary = list_empty(&hose_list);
         phb = pcibios_alloc_controller(dn);
         if (!phb)
@@ -203,11 +154,59 @@ struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
                 eeh_add_device_tree_early(dn);
 
         scan_phb(phb);
-        pcibios_allocate_bus_resources(phb->bus);
-        pcibios_fixup_new_pci_devices(phb->bus);
-        pci_bus_add_devices(phb->bus);
-        eeh_add_device_tree_late(phb->bus);
+        pcibios_finish_adding_to_bus(phb->bus);
 
         return phb;
 }
 EXPORT_SYMBOL_GPL(init_phb_dynamic);
+
+/* RPA-specific bits for removing PHBs */
+int remove_phb_dynamic(struct pci_controller *phb)
+{
+        struct pci_bus *b = phb->bus;
+        struct resource *res;
+        int rc, i;
+
+        pr_debug("PCI: Removing PHB %04x:%02x... \n",
+                 pci_domain_nr(b), b->number);
+
+        /* We cannot to remove a root bus that has children */
+        if (!(list_empty(&b->children) && list_empty(&b->devices)))
+                return -EBUSY;
+
+        /* We -know- there aren't any child devices anymore at this stage
+         * and thus, we can safely unmap the IO space as it's not in use
+         */
+        res = &phb->io_resource;
+        if (res->flags & IORESOURCE_IO) {
+                rc = pcibios_unmap_io_space(b);
+                if (rc) {
+                        printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
+                               __func__, b->name);
+                        return 1;
+                }
+        }
+
+        /* Unregister the bridge device from sysfs and remove the PCI bus */
+        device_unregister(b->bridge);
+        phb->bus = NULL;
+        pci_remove_bus(b);
+
+        /* Now release the IO resource */
+        if (res->flags & IORESOURCE_IO)
+                release_resource(res);
+
+        /* Release memory resources */
+        for (i = 0; i < 3; ++i) {
+                res = &phb->mem_resources[i];
+                if (!(res->flags & IORESOURCE_MEM))
+                        continue;
+                release_resource(res);
+        }
+
+        /* Free pci_controller data structure */
+        pcibios_free_controller(phb);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(remove_phb_dynamic);
diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c
index edbc012c2ebc..6cf35cd8d0b5 100644
--- a/arch/powerpc/platforms/pseries/phyp_dump.c
+++ b/arch/powerpc/platforms/pseries/phyp_dump.c
@@ -130,6 +130,9 @@ static unsigned long init_dump_header(struct phyp_dump_header *ph)
 static void print_dump_header(const struct phyp_dump_header *ph)
 {
 #ifdef DEBUG
+        if (ph == NULL)
+                return;
+
         printk(KERN_INFO "dump header:\n");
         /* setup some ph->sections required */
         printk(KERN_INFO "version = %d\n", ph->version);
@@ -411,6 +414,8 @@ static int __init phyp_dump_setup(void)
                 of_node_put(rtas);
         }
 
+        ibm_configure_kernel_dump = rtas_token("ibm,configure-kernel-dump");
+
         print_dump_header(dump_header);
         dump_area_length = init_dump_header(&phdr);
         /* align down */
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c
index f4e55be2eea9..afad9f5ac0ac 100644
--- a/arch/powerpc/platforms/pseries/rtasd.c
+++ b/arch/powerpc/platforms/pseries/rtasd.c
@@ -208,6 +208,7 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
                 break;
         case ERR_TYPE_KERNEL_PANIC:
         default:
+                WARN_ON_ONCE(!irqs_disabled()); /* @@@ DEBUG @@@ */
                 spin_unlock_irqrestore(&rtasd_log_lock, s);
                 return;
         }
@@ -227,6 +228,7 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
         /* Check to see if we need to or have stopped logging */
         if (fatal || !logging_enabled) {
                 logging_enabled = 0;
+                WARN_ON_ONCE(!irqs_disabled()); /* @@@ DEBUG @@@ */
                 spin_unlock_irqrestore(&rtasd_log_lock, s);
                 return;
         }
@@ -249,11 +251,13 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
                 else
                         rtas_log_start += 1;
 
+                WARN_ON_ONCE(!irqs_disabled()); /* @@@ DEBUG @@@ */
                 spin_unlock_irqrestore(&rtasd_log_lock, s);
                 wake_up_interruptible(&rtas_log_wait);
                 break;
         case ERR_TYPE_KERNEL_PANIC:
         default:
+                WARN_ON_ONCE(!irqs_disabled()); /* @@@ DEBUG @@@ */
                 spin_unlock_irqrestore(&rtasd_log_lock, s);
                 return;
         }
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index e1904774a70f..84e058f1e1cc 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -332,7 +332,7 @@ static void xics_eoi_lpar(unsigned int virq)
         lpar_xirr_info_set((0xff << 24) | irq);
 }
 
-static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
+static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
 {
         unsigned int irq;
         int status;
@@ -579,7 +579,7 @@ static void xics_update_irq_servers(void)
         int i, j;
         struct device_node *np;
         u32 ilen;
-        const u32 *ireg, *isize;
+        const u32 *ireg;
         u32 hcpuid;
 
         /* Find the server numbers for the boot cpu. */
@@ -607,11 +607,6 @@ static void xics_update_irq_servers(void)
                 }
         }
 
-        /* get the bit size of server numbers */
-        isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
-        if (isize)
-                interrupt_server_size = *isize;
-
         of_node_put(np);
 }
 
@@ -682,6 +677,7 @@ void __init xics_init_IRQ(void)
         struct device_node *np;
         u32 indx = 0;
         int found = 0;
+        const u32 *isize;
 
         ppc64_boot_msg(0x20, "XICS Init");
 
@@ -701,6 +697,26 @@ void __init xics_init_IRQ(void)
         if (found == 0)
                 return;
 
+        /* get the bit size of server numbers */
+        found = 0;
+
+        for_each_compatible_node(np, NULL, "ibm,ppc-xics") {
+                isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
+
+                if (!isize)
+                        continue;
+
+                if (!found) {
+                        interrupt_server_size = *isize;
+                        found = 1;
+                } else if (*isize != interrupt_server_size) {
+                        printk(KERN_WARNING "XICS: "
+                               "mismatched ibm,interrupt-server#-size\n");
+                        interrupt_server_size = max(*isize,
+                                                    interrupt_server_size);
+                }
+        }
+
         xics_update_irq_servers();
         xics_init_host();
 
@@ -728,9 +744,18 @@ static void xics_set_cpu_priority(unsigned char cppr)
 /* Have the calling processor join or leave the specified global queue */
 static void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
 {
-        int status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
-                (1UL << interrupt_server_size) - 1 - gserver, join);
-        WARN_ON(status < 0);
+        int index;
+        int status;
+
+        if (!rtas_indicator_present(GLOBAL_INTERRUPT_QUEUE, NULL))
+                return;
+
+        index = (1UL << interrupt_server_size) - 1 - gserver;
+
+        status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, index, join);
+
+        WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n",
+             GLOBAL_INTERRUPT_QUEUE, index, join, status);
 }
 
 void xics_setup_cpu(void)
@@ -845,7 +870,7 @@ void xics_migrate_irqs_away(void)
 
                 /* Reset affinity to all cpus */
                 irq_desc[virq].affinity = CPU_MASK_ALL;
-                desc->chip->set_affinity(virq, CPU_MASK_ALL);
+                desc->chip->set_affinity(virq, cpu_all_mask);
 unlock:
                 spin_unlock_irqrestore(&desc->lock, flags);
         }
diff --git a/arch/powerpc/sysdev/bestcomm/ata.c b/arch/powerpc/sysdev/bestcomm/ata.c
index 1f5258fb38c3..901c9f91e5dd 100644
--- a/arch/powerpc/sysdev/bestcomm/ata.c
+++ b/arch/powerpc/sysdev/bestcomm/ata.c
@@ -61,6 +61,9 @@ bcom_ata_init(int queue_len, int maxbufsize)
         struct bcom_ata_var *var;
         struct bcom_ata_inc *inc;
 
+        /* Prefetch breaks ATA DMA.  Turn it off for ATA DMA */
+        bcom_disable_prefetch();
+
         tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_ata_bd), 0);
         if (!tsk)
                 return NULL;
diff --git a/arch/powerpc/sysdev/bestcomm/ata.h b/arch/powerpc/sysdev/bestcomm/ata.h
index 10982769c465..0b2371811334 100644
--- a/arch/powerpc/sysdev/bestcomm/ata.h
+++ b/arch/powerpc/sysdev/bestcomm/ata.h
@@ -16,22 +16,15 @@
 
 struct bcom_ata_bd {
         u32     status;
-        u32     dst_pa;
         u32     src_pa;
+        u32     dst_pa;
 };
 
-extern struct bcom_task *
-bcom_ata_init(int queue_len, int maxbufsize);
-
-extern void
-bcom_ata_rx_prepare(struct bcom_task *tsk);
-
-extern void
-bcom_ata_tx_prepare(struct bcom_task *tsk);
-
-extern void
-bcom_ata_reset_bd(struct bcom_task *tsk);
-
+extern struct bcom_task * bcom_ata_init(int queue_len, int maxbufsize);
+extern void bcom_ata_rx_prepare(struct bcom_task *tsk);
+extern void bcom_ata_tx_prepare(struct bcom_task *tsk);
+extern void bcom_ata_reset_bd(struct bcom_task *tsk);
+extern void bcom_ata_release(struct bcom_task *tsk);
 
 #endif /* __BESTCOMM_ATA_H__ */
 
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/sysdev/bestcomm/bestcomm.c
index 446c9ea85b30..378ebd9aac18 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.c
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c
@@ -279,7 +279,6 @@ bcom_engine_init(void)
         int task;
         phys_addr_t tdt_pa, ctx_pa, var_pa, fdt_pa;
         unsigned int tdt_size, ctx_size, var_size, fdt_size;
-        u16 regval;
 
         /* Allocate & clear SRAM zones for FDT, TDTs, contexts and vars/incs */
         tdt_size = BCOM_MAX_TASKS * sizeof(struct bcom_tdt);
@@ -331,10 +330,8 @@ bcom_engine_init(void)
         out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS);
 
         /* Disable COMM Bus Prefetch on the original 5200; it's broken */
-        if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR) {
-                regval = in_be16(&bcom_eng->regs->PtdCntrl);
-                out_be16(&bcom_eng->regs->PtdCntrl,  regval | 1);
-        }
+        if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR)
+                bcom_disable_prefetch();
 
         /* Init lock */
         spin_lock_init(&bcom_eng->lock);
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.h b/arch/powerpc/sysdev/bestcomm/bestcomm.h
index c960a8b49655..23a95f80dfdb 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.h
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.h
@@ -16,8 +16,19 @@
 #ifndef __BESTCOMM_H__
 #define __BESTCOMM_H__
 
-struct bcom_bd; /* defined later on ... */
-
+/**
+ * struct bcom_bd - Structure describing a generic BestComm buffer descriptor
+ * @status: The current status of this buffer. Exact meaning depends on the
+ *          task type
+ * @data: An array of u32 extra data.  Size of array is task dependant.
+ *
+ * Note: Don't dereference a bcom_bd pointer as an array.  The size of the
+ *       bcom_bd is variable.  Use bcom_get_bd() instead.
+ */
+struct bcom_bd {
+        u32     status;
+        u32     data[0];        /* variable payload size */
+};
 
 /* ======================================================================== */
 /* Generic task management                                                   */
@@ -84,17 +95,6 @@ bcom_get_task_irq(struct bcom_task *tsk) {
 /* BD based tasks helpers                                                   */
 /* ======================================================================== */
 
-/**
- * struct bcom_bd - Structure describing a generic BestComm buffer descriptor
- * @status: The current status of this buffer. Exact meaning depends on the
- *          task type
- * @data: An array of u32 whose meaning depends on the task type.
- */
-struct bcom_bd {
-        u32     status;
-        u32     data[1];        /* variable, but at least 1 */
-};
-
 #define BCOM_BD_READY   0x40000000ul
 
 /** _bcom_next_index - Get next input index.
@@ -140,15 +140,31 @@ bcom_queue_full(struct bcom_task *tsk)
 }
 
 /**
+ * bcom_get_bd - Get a BD from the queue
+ * @tsk: The BestComm task structure
+ * index: Index of the BD to fetch
+ */
+static inline struct bcom_bd
+*bcom_get_bd(struct bcom_task *tsk, unsigned int index)
+{
+        /* A cast to (void*) so the address can be incremented by the
+         * real size instead of by sizeof(struct bcom_bd) */
+        return ((void *)tsk->bd) + (index * tsk->bd_size);
+}
+
+/**
  * bcom_buffer_done - Checks if a BestComm 
  * @tsk: The BestComm task structure
  */
 static inline int
 bcom_buffer_done(struct bcom_task *tsk)
 {
+        struct bcom_bd *bd;
         if (bcom_queue_empty(tsk))
                 return 0;
-        return !(tsk->bd[tsk->outdex].status & BCOM_BD_READY);
+
+        bd = bcom_get_bd(tsk, tsk->outdex);
+        return !(bd->status & BCOM_BD_READY);
 }
 
 /**
@@ -160,16 +176,21 @@ bcom_buffer_done(struct bcom_task *tsk)
 static inline struct bcom_bd *
 bcom_prepare_next_buffer(struct bcom_task *tsk)
 {
-        tsk->bd[tsk->index].status = 0; /* cleanup last status */
-        return &tsk->bd[tsk->index];
+        struct bcom_bd *bd;
+
+        bd = bcom_get_bd(tsk, tsk->index);
+        bd->status = 0; /* cleanup last status */
+        return bd;
 }
 
 static inline void
 bcom_submit_next_buffer(struct bcom_task *tsk, void *cookie)
 {
+        struct bcom_bd *bd = bcom_get_bd(tsk, tsk->index);
+
         tsk->cookie[tsk->index] = cookie;
         mb();   /* ensure the bd is really up-to-date */
-        tsk->bd[tsk->index].status |= BCOM_BD_READY;
+        bd->status |= BCOM_BD_READY;
         tsk->index = _bcom_next_index(tsk);
         if (tsk->flags & BCOM_FLAGS_ENABLE_TASK)
                 bcom_enable(tsk);
@@ -179,10 +200,12 @@ static inline void *
 bcom_retrieve_buffer(struct bcom_task *tsk, u32 *p_status, struct bcom_bd **p_bd)
 {
         void *cookie = tsk->cookie[tsk->outdex];
+        struct bcom_bd *bd = bcom_get_bd(tsk, tsk->outdex);
+
         if (p_status)
-                *p_status = tsk->bd[tsk->outdex].status;
+                *p_status = bd->status;
         if (p_bd)
-                *p_bd = &tsk->bd[tsk->outdex];
+                *p_bd = bd;
         tsk->outdex = _bcom_next_outdex(tsk);
         return cookie;
 }
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
index 866a2915ef2f..eb0d1c883c31 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
@@ -198,8 +198,8 @@ struct bcom_task_header {
 #define BCOM_IPR_SCTMR_1        2
 #define BCOM_IPR_FEC_RX         6
 #define BCOM_IPR_FEC_TX         5
-#define BCOM_IPR_ATA_RX         4
-#define BCOM_IPR_ATA_TX         3
+#define BCOM_IPR_ATA_RX         7
+#define BCOM_IPR_ATA_TX         7
 #define BCOM_IPR_SCPCI_RX       2
 #define BCOM_IPR_SCPCI_TX       2
 #define BCOM_IPR_PSC3_RX        2
@@ -241,6 +241,22 @@ extern void bcom_set_initiator(int task, int initiator);
 
 #define TASK_ENABLE             0x8000
 
+/**
+ * bcom_disable_prefetch - Hook to disable bus prefetching
+ *
+ * ATA DMA and the original MPC5200 need this due to silicon bugs.  At the
+ * moment disabling prefetch is a one-way street.  There is no mechanism
+ * in place to turn prefetch back on after it has been disabled.  There is
+ * no reason it couldn't be done, it would just be more complex to implement.
+ */
+static inline void bcom_disable_prefetch(void)
+{
+        u16 regval;
+
+        regval = in_be16(&bcom_eng->regs->PtdCntrl);
+        out_be16(&bcom_eng->regs->PtdCntrl, regval | 1);
+};
+
 static inline void
 bcom_enable_task(int task)
 {
diff --git a/arch/powerpc/sysdev/dcr-low.S b/arch/powerpc/sysdev/dcr-low.S
index 2078f39e2f17..d3098ef1404a 100644
--- a/arch/powerpc/sysdev/dcr-low.S
+++ b/arch/powerpc/sysdev/dcr-low.S
@@ -11,14 +11,20 @@
 
 #include <asm/ppc_asm.h>
 #include <asm/processor.h>
+#include <asm/bug.h>
 
 #define DCR_ACCESS_PROLOG(table) \
+        cmpli   cr0,r3,1024;     \
         rlwinm  r3,r3,4,18,27;   \
         lis     r5,table@h;      \
         ori     r5,r5,table@l;   \
         add     r3,r3,r5;        \
+        bge-    1f;              \
         mtctr   r3;              \
-        bctr
+        bctr;                    \
+1:      trap;                    \
+        EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0;  \
+        blr
 
 _GLOBAL(__mfdcr)
         DCR_ACCESS_PROLOG(__mfdcr_table)
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
index a8ba9983dd5a..bb44aa9fd470 100644
--- a/arch/powerpc/sysdev/dcr.c
+++ b/arch/powerpc/sysdev/dcr.c
@@ -124,7 +124,8 @@ EXPORT_SYMBOL_GPL(dcr_write_generic);
 
 #endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
 
-unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
+unsigned int dcr_resource_start(const struct device_node *np,
+                                unsigned int index)
 {
         unsigned int ds;
         const u32 *dr = of_get_property(np, "dcr-reg", &ds);
@@ -136,7 +137,7 @@ unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
 }
 EXPORT_SYMBOL_GPL(dcr_resource_start);
 
-unsigned int dcr_resource_len(struct device_node *np, unsigned int index)
+unsigned int dcr_resource_len(const struct device_node *np, unsigned int index)
 {
         unsigned int ds;
         const u32 *dr = of_get_property(np, "dcr-reg", &ds);
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 5b264eb4b1f7..d5f9ae0f1b75 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -187,7 +187,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
                 printk(KERN_WARNING "Can't get bus-range for %s, assume"
                         " bus 0\n", dev->full_name);
 
-        ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
+        ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
         hose = pcibios_alloc_controller(dev);
         if (!hose)
                 return -ENOMEM;
@@ -300,7 +300,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
                        " bus 0\n", dev->full_name);
         }
 
-        ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
+        ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
         hose = pcibios_alloc_controller(dev);
         if (!hose)
                 return -ENOMEM;
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 26ecb96f9731..115cb16351fd 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -207,236 +207,51 @@ static int __init of_add_fixed_phys(void)
 arch_initcall(of_add_fixed_phys);
 #endif /* CONFIG_FIXED_PHY */
 
-static int gfar_mdio_of_init_one(struct device_node *np)
-{
-        int k;
-        struct device_node *child = NULL;
-        struct gianfar_mdio_data mdio_data;
-        struct platform_device *mdio_dev;
-        struct resource res;
-        int ret;
-
-        memset(&res, 0, sizeof(res));
-        memset(&mdio_data, 0, sizeof(mdio_data));
-
-        ret = of_address_to_resource(np, 0, &res);
-        if (ret)
-                return ret;
-
-        /* The gianfar device will try to use the same ID created below to find
-         * this bus, to coordinate register access (since they share).  */
-        mdio_dev = platform_device_register_simple("fsl-gianfar_mdio",
-                        res.start&0xfffff, &res, 1);
-        if (IS_ERR(mdio_dev))
-                return PTR_ERR(mdio_dev);
-
-        for (k = 0; k < 32; k++)
-                mdio_data.irq[k] = PHY_POLL;
-
-        while ((child = of_get_next_child(np, child)) != NULL) {
-                int irq = irq_of_parse_and_map(child, 0);
-                if (irq != NO_IRQ) {
-                        const u32 *id = of_get_property(child, "reg", NULL);
-                        mdio_data.irq[*id] = irq;
-                }
-        }
-
-        ret = platform_device_add_data(mdio_dev, &mdio_data,
-                                sizeof(struct gianfar_mdio_data));
-        if (ret)
-                platform_device_unregister(mdio_dev);
-
-        return ret;
-}
-
-static int __init gfar_mdio_of_init(void)
-{
-        struct device_node *np = NULL;
-
-        for_each_compatible_node(np, NULL, "fsl,gianfar-mdio")
-                gfar_mdio_of_init_one(np);
-
-        /* try the deprecated version */
-        for_each_compatible_node(np, "mdio", "gianfar");
-                gfar_mdio_of_init_one(np);
-
-        return 0;
-}
-
-arch_initcall(gfar_mdio_of_init);
-
-static const char *gfar_tx_intr = "tx";
-static const char *gfar_rx_intr = "rx";
-static const char *gfar_err_intr = "error";
-
-static int __init gfar_of_init(void)
+#ifdef CONFIG_PPC_83xx
+static int __init mpc83xx_wdt_init(void)
 {
+        struct resource r;
         struct device_node *np;
-        unsigned int i;
-        struct platform_device *gfar_dev;
-        struct resource res;
+        struct platform_device *dev;
+        u32 freq = fsl_get_sys_freq();
         int ret;
 
-        for (np = NULL, i = 0;
-             (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
-             i++) {
-                struct resource r[4];
-                struct device_node *phy, *mdio;
-                struct gianfar_platform_data gfar_data;
-                const unsigned int *id;
-                const char *model;
-                const char *ctype;
-                const void *mac_addr;
-                const phandle *ph;
-                int n_res = 2;
-
-                if (!of_device_is_available(np))
-                        continue;
-
-                memset(r, 0, sizeof(r));
-                memset(&gfar_data, 0, sizeof(gfar_data));
-
-                ret = of_address_to_resource(np, 0, &r[0]);
-                if (ret)
-                        goto err;
-
-                of_irq_to_resource(np, 0, &r[1]);
-
-                model = of_get_property(np, "model", NULL);
-
-                /* If we aren't the FEC we have multiple interrupts */
-                if (model && strcasecmp(model, "FEC")) {
-                        r[1].name = gfar_tx_intr;
-
-                        r[2].name = gfar_rx_intr;
-                        of_irq_to_resource(np, 1, &r[2]);
+        np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
 
-                        r[3].name = gfar_err_intr;
-                        of_irq_to_resource(np, 2, &r[3]);
-
-                        n_res += 2;
-                }
-
-                gfar_dev =
-                    platform_device_register_simple("fsl-gianfar", i, &r[0],
-                                                    n_res);
-
-                if (IS_ERR(gfar_dev)) {
-                        ret = PTR_ERR(gfar_dev);
-                        goto err;
-                }
-
-                mac_addr = of_get_mac_address(np);
-                if (mac_addr)
-                        memcpy(gfar_data.mac_addr, mac_addr, 6);
-
-                if (model && !strcasecmp(model, "TSEC"))
-                        gfar_data.device_flags =
-                            FSL_GIANFAR_DEV_HAS_GIGABIT |
-                            FSL_GIANFAR_DEV_HAS_COALESCE |
-                            FSL_GIANFAR_DEV_HAS_RMON |
-                            FSL_GIANFAR_DEV_HAS_MULTI_INTR;
-                if (model && !strcasecmp(model, "eTSEC"))
-                        gfar_data.device_flags =
-                            FSL_GIANFAR_DEV_HAS_GIGABIT |
-                            FSL_GIANFAR_DEV_HAS_COALESCE |
-                            FSL_GIANFAR_DEV_HAS_RMON |
-                            FSL_GIANFAR_DEV_HAS_MULTI_INTR |
-                            FSL_GIANFAR_DEV_HAS_CSUM |
-                            FSL_GIANFAR_DEV_HAS_VLAN |
-                            FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
-
-                ctype = of_get_property(np, "phy-connection-type", NULL);
-
-                /* We only care about rgmii-id.  The rest are autodetected */
-                if (ctype && !strcmp(ctype, "rgmii-id"))
-                        gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
-                else
-                        gfar_data.interface = PHY_INTERFACE_MODE_MII;
-
-                if (of_get_property(np, "fsl,magic-packet", NULL))
-                        gfar_data.device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
-
-                ph = of_get_property(np, "phy-handle", NULL);
-                if (ph == NULL) {
-                        u32 *fixed_link;
-
-                        fixed_link = (u32 *)of_get_property(np, "fixed-link",
-                                                           NULL);
-                        if (!fixed_link) {
-                                ret = -ENODEV;
-                                goto unreg;
-                        }
-
-                        snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
-                        gfar_data.phy_id = fixed_link[0];
-                } else {
-                        phy = of_find_node_by_phandle(*ph);
-
-                        if (phy == NULL) {
-                                ret = -ENODEV;
-                                goto unreg;
-                        }
-
-                        mdio = of_get_parent(phy);
-
-                        id = of_get_property(phy, "reg", NULL);
-                        ret = of_address_to_resource(mdio, 0, &res);
-                        if (ret) {
-                                of_node_put(phy);
-                                of_node_put(mdio);
-                                goto unreg;
-                        }
-
-                        gfar_data.phy_id = *id;
-                        snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx",
-                                 (unsigned long long)res.start&0xfffff);
+        if (!np) {
+                ret = -ENODEV;
+                goto nodev;
+        }
 
-                        of_node_put(phy);
-                        of_node_put(mdio);
-                }
+        memset(&r, 0, sizeof(r));
 
-                /* Get MDIO bus controlled by this eTSEC, if any.  Normally only
-                 * eTSEC 1 will control an MDIO bus, not necessarily the same
-                 * bus that its PHY is on ('mdio' above), so we can't just use
-                 * that.  What we do is look for a gianfar mdio device that has
-                 * overlapping registers with this device.  That's really the
-                 * whole point, to find the device sharing our registers to
-                 * coordinate access with it.
-                 */
-                for_each_compatible_node(mdio, NULL, "fsl,gianfar-mdio") {
-                        if (of_address_to_resource(mdio, 0, &res))
-                                continue;
-
-                        if (res.start >= r[0].start && res.end <= r[0].end) {
-                                /* Get the ID the mdio bus platform device was
-                                 * registered with.  gfar_data.bus_id is
-                                 * different because it's for finding a PHY,
-                                 * while this is for finding a MII bus.
-                                 */
-                                gfar_data.mdio_bus = res.start&0xfffff;
-                                of_node_put(mdio);
-                                break;
-                        }
-                }
+        ret = of_address_to_resource(np, 0, &r);
+        if (ret)
+                goto err;
 
-                ret =
-                    platform_device_add_data(gfar_dev, &gfar_data,
-                                             sizeof(struct
-                                                    gianfar_platform_data));
-                if (ret)
-                        goto unreg;
+        dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
+        if (IS_ERR(dev)) {
+                ret = PTR_ERR(dev);
+                goto err;
         }
 
+        ret = platform_device_add_data(dev, &freq, sizeof(freq));
+        if (ret)
+                goto unreg;
+
+        of_node_put(np);
         return 0;
 
 unreg:
-        platform_device_unregister(gfar_dev);
+        platform_device_unregister(dev);
 err:
+        of_node_put(np);
+nodev:
         return ret;
 }
 
-arch_initcall(gfar_of_init);
+arch_initcall(mpc83xx_wdt_init);
+#endif
 
 static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
 {
diff --git a/arch/powerpc/sysdev/grackle.c b/arch/powerpc/sysdev/grackle.c
index d502927644c6..5da37c2f22ee 100644
--- a/arch/powerpc/sysdev/grackle.c
+++ b/arch/powerpc/sysdev/grackle.c
@@ -57,7 +57,7 @@ void __init setup_grackle(struct pci_controller *hose)
 {
         setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0);
         if (machine_is_compatible("PowerMac1,1"))
-                ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
+                ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
         if (machine_is_compatible("AAPL,PowerBook1998"))
                 grackle_set_loop_snoop(hose, 1);
 #if 0   /* Disabled for now, HW problems ??? */
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 1890fb085cde..3e0d89dcdba2 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -661,17 +661,6 @@ static inline void mpic_eoi(struct mpic *mpic)
         (void)mpic_cpu_read(MPIC_INFO(CPU_WHOAMI));
 }
 
-#ifdef CONFIG_SMP
-static irqreturn_t mpic_ipi_action(int irq, void *data)
-{
-        long ipi = (long)data;
-
-        smp_message_recv(ipi);
-
-        return IRQ_HANDLED;
-}
-#endif /* CONFIG_SMP */
-
 /*
  * Linux descriptor level callbacks
  */
@@ -817,7 +806,7 @@ static void mpic_end_ipi(unsigned int irq)
 
 #endif /* CONFIG_SMP */
 
-void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
+void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
 {
         struct mpic *mpic = mpic_from_irq(irq);
         unsigned int src = mpic_irq_to_hw(irq);
@@ -829,7 +818,7 @@ void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
         } else {
                 cpumask_t tmp;
 
-                cpus_and(tmp, cpumask, cpu_online_map);
+                cpumask_and(&tmp, cpumask, cpu_online_mask);
 
                 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
                                mpic_physmask(cpus_addr(tmp)[0]));
@@ -1548,13 +1537,7 @@ unsigned int mpic_get_mcirq(void)
 void mpic_request_ipis(void)
 {
         struct mpic *mpic = mpic_primary;
-        long i, err;
-        static char *ipi_names[] = {
-                "IPI0 (call function)",
-                "IPI1 (reschedule)",
-                "IPI2 (call function single)",
-                "IPI3 (debugger break)",
-        };
+        int i;
         BUG_ON(mpic == NULL);
 
         printk(KERN_INFO "mpic: requesting IPIs ... \n");
@@ -1563,17 +1546,10 @@ void mpic_request_ipis(void)
                 unsigned int vipi = irq_create_mapping(mpic->irqhost,
                                                        mpic->ipi_vecs[0] + i);
                 if (vipi == NO_IRQ) {
-                        printk(KERN_ERR "Failed to map IPI %ld\n", i);
-                        break;
-                }
-                err = request_irq(vipi, mpic_ipi_action,
-                                  IRQF_DISABLED|IRQF_PERCPU,
-                                  ipi_names[i], (void *)i);
-                if (err) {
-                        printk(KERN_ERR "Request of irq %d for IPI %ld failed\n",
-                               vipi, i);
-                        break;
+                        printk(KERN_ERR "Failed to map %s\n", smp_ipi_name[i]);
+                        continue;
                 }
+                smp_request_message_ipi(vipi, i);
         }
 }
 
diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h
index 6209c62a426d..3cef2af10f42 100644
--- a/arch/powerpc/sysdev/mpic.h
+++ b/arch/powerpc/sysdev/mpic.h
@@ -36,6 +36,6 @@ static inline int mpic_pasemi_msi_init(struct mpic *mpic)
 
 extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
 extern void mpic_set_vector(unsigned int virq, unsigned int vector);
-extern void mpic_set_affinity(unsigned int irq, cpumask_t cpumask);
+extern void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask);
 
 #endif /* _POWERPC_SYSDEV_MPIC_H */
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index d3e4d61030b5..77fae5f64f2e 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -194,11 +194,41 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
  * 4xx PCI 2.x part
  */
 
+static int __init ppc4xx_setup_one_pci_PMM(struct pci_controller        *hose,
+                                           void __iomem                 *reg,
+                                           u64                          plb_addr,
+                                           u64                          pci_addr,
+                                           u64                          size,
+                                           unsigned int                 flags,
+                                           int                          index)
+{
+        u32 ma, pcila, pciha;
+
+        if ((plb_addr + size) > 0xffffffffull || !is_power_of_2(size) ||
+            size < 0x1000 || (plb_addr & (size - 1)) != 0) {
+                printk(KERN_WARNING "%s: Resource out of range\n",
+                       hose->dn->full_name);
+                return -1;
+        }
+        ma = (0xffffffffu << ilog2(size)) | 1;
+        if (flags & IORESOURCE_PREFETCH)
+                ma |= 2;
+
+        pciha = RES_TO_U32_HIGH(pci_addr);
+        pcila = RES_TO_U32_LOW(pci_addr);
+
+        writel(plb_addr, reg + PCIL0_PMM0LA + (0x10 * index));
+        writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * index));
+        writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * index));
+        writel(ma, reg + PCIL0_PMM0MA + (0x10 * index));
+
+        return 0;
+}
+
 static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
                                              void __iomem *reg)
 {
-        u32 la, ma, pcila, pciha;
-        int i, j;
+        int i, j, found_isa_hole = 0;
 
         /* Setup outbound memory windows */
         for (i = j = 0; i < 3; i++) {
@@ -213,28 +243,29 @@ static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
                         break;
                 }
 
-                /* Calculate register values */
-                la = res->start;
-                pciha = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset);
-                pcila = RES_TO_U32_LOW(res->start - hose->pci_mem_offset);
-
-                ma = res->end + 1 - res->start;
-                if (!is_power_of_2(ma) || ma < 0x1000 || ma > 0xffffffffu) {
-                        printk(KERN_WARNING "%s: Resource out of range\n",
-                               hose->dn->full_name);
-                        continue;
+                /* Configure the resource */
+                if (ppc4xx_setup_one_pci_PMM(hose, reg,
+                                             res->start,
+                                             res->start - hose->pci_mem_offset,
+                                             res->end + 1 - res->start,
+                                             res->flags,
+                                             j) == 0) {
+                        j++;
+
+                        /* If the resource PCI address is 0 then we have our
+                         * ISA memory hole
+                         */
+                        if (res->start == hose->pci_mem_offset)
+                                found_isa_hole = 1;
                 }
-                ma = (0xffffffffu << ilog2(ma)) | 0x1;
-                if (res->flags & IORESOURCE_PREFETCH)
-                        ma |= 0x2;
-
-                /* Program register values */
-                writel(la, reg + PCIL0_PMM0LA + (0x10 * j));
-                writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * j));
-                writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * j));
-                writel(ma, reg + PCIL0_PMM0MA + (0x10 * j));
-                j++;
         }
+
+        /* Handle ISA memory hole if not already covered */
+        if (j <= 2 && !found_isa_hole && hose->isa_mem_size)
+                if (ppc4xx_setup_one_pci_PMM(hose, reg, hose->isa_mem_phys, 0,
+                                             hose->isa_mem_size, 0, j) == 0)
+                        printk(KERN_INFO "%s: Legacy ISA memory support enabled\n",
+                               hose->dn->full_name);
 }
 
 static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose,
@@ -352,11 +383,52 @@ static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
  * 4xx PCI-X part
  */
 
+static int __init ppc4xx_setup_one_pcix_POM(struct pci_controller       *hose,
+                                            void __iomem                *reg,
+                                            u64                         plb_addr,
+                                            u64                         pci_addr,
+                                            u64                         size,
+                                            unsigned int                flags,
+                                            int                         index)
+{
+        u32 lah, lal, pciah, pcial, sa;
+
+        if (!is_power_of_2(size) || size < 0x1000 ||
+            (plb_addr & (size - 1)) != 0) {
+                printk(KERN_WARNING "%s: Resource out of range\n",
+                       hose->dn->full_name);
+                return -1;
+        }
+
+        /* Calculate register values */
+        lah = RES_TO_U32_HIGH(plb_addr);
+        lal = RES_TO_U32_LOW(plb_addr);
+        pciah = RES_TO_U32_HIGH(pci_addr);
+        pcial = RES_TO_U32_LOW(pci_addr);
+        sa = (0xffffffffu << ilog2(size)) | 0x1;
+
+        /* Program register values */
+        if (index == 0) {
+                writel(lah, reg + PCIX0_POM0LAH);
+                writel(lal, reg + PCIX0_POM0LAL);
+                writel(pciah, reg + PCIX0_POM0PCIAH);
+                writel(pcial, reg + PCIX0_POM0PCIAL);
+                writel(sa, reg + PCIX0_POM0SA);
+        } else {
+                writel(lah, reg + PCIX0_POM1LAH);
+                writel(lal, reg + PCIX0_POM1LAL);
+                writel(pciah, reg + PCIX0_POM1PCIAH);
+                writel(pcial, reg + PCIX0_POM1PCIAL);
+                writel(sa, reg + PCIX0_POM1SA);
+        }
+
+        return 0;
+}
+
 static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
                                               void __iomem *reg)
 {
-        u32 lah, lal, pciah, pcial, sa;
-        int i, j;
+        int i, j, found_isa_hole = 0;
 
         /* Setup outbound memory windows */
         for (i = j = 0; i < 3; i++) {
@@ -371,36 +443,29 @@ static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
                         break;
                 }
 
-                /* Calculate register values */
-                lah = RES_TO_U32_HIGH(res->start);
-                lal = RES_TO_U32_LOW(res->start);
-                pciah = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset);
-                pcial = RES_TO_U32_LOW(res->start - hose->pci_mem_offset);
-                sa = res->end + 1 - res->start;
-                if (!is_power_of_2(sa) || sa < 0x100000 ||
-                    sa > 0xffffffffu) {
-                        printk(KERN_WARNING "%s: Resource out of range\n",
-                               hose->dn->full_name);
-                        continue;
+                /* Configure the resource */
+                if (ppc4xx_setup_one_pcix_POM(hose, reg,
+                                              res->start,
+                                              res->start - hose->pci_mem_offset,
+                                              res->end + 1 - res->start,
+                                              res->flags,
+                                              j) == 0) {
+                        j++;
+
+                        /* If the resource PCI address is 0 then we have our
+                         * ISA memory hole
+                         */
+                        if (res->start == hose->pci_mem_offset)
+                                found_isa_hole = 1;
                 }
-                sa = (0xffffffffu << ilog2(sa)) | 0x1;
-
-                /* Program register values */
-                if (j == 0) {
-                        writel(lah, reg + PCIX0_POM0LAH);
-                        writel(lal, reg + PCIX0_POM0LAL);
-                        writel(pciah, reg + PCIX0_POM0PCIAH);
-                        writel(pcial, reg + PCIX0_POM0PCIAL);
-                        writel(sa, reg + PCIX0_POM0SA);
-                } else {
-                        writel(lah, reg + PCIX0_POM1LAH);
-                        writel(lal, reg + PCIX0_POM1LAL);
-                        writel(pciah, reg + PCIX0_POM1PCIAH);
-                        writel(pcial, reg + PCIX0_POM1PCIAL);
-                        writel(sa, reg + PCIX0_POM1SA);
-                }
-                j++;
         }
+
+        /* Handle ISA memory hole if not already covered */
+        if (j <= 1 && !found_isa_hole && hose->isa_mem_size)
+                if (ppc4xx_setup_one_pcix_POM(hose, reg, hose->isa_mem_phys, 0,
+                                              hose->isa_mem_size, 0, j) == 0)
+                        printk(KERN_INFO "%s: Legacy ISA memory support enabled\n",
+                               hose->dn->full_name);
 }
 
 static void __init ppc4xx_configure_pcix_PIMs(struct pci_controller *hose,
@@ -1317,12 +1382,72 @@ static struct pci_ops ppc4xx_pciex_pci_ops =
         .write = ppc4xx_pciex_write_config,
 };
 
+static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port   *port,
+                                             struct pci_controller      *hose,
+                                             void __iomem               *mbase,
+                                             u64                        plb_addr,
+                                             u64                        pci_addr,
+                                             u64                        size,
+                                             unsigned int               flags,
+                                             int                        index)
+{
+        u32 lah, lal, pciah, pcial, sa;
+
+        if (!is_power_of_2(size) ||
+            (index < 2 && size < 0x100000) ||
+            (index == 2 && size < 0x100) ||
+            (plb_addr & (size - 1)) != 0) {
+                printk(KERN_WARNING "%s: Resource out of range\n",
+                       hose->dn->full_name);
+                return -1;
+        }
+
+        /* Calculate register values */
+        lah = RES_TO_U32_HIGH(plb_addr);
+        lal = RES_TO_U32_LOW(plb_addr);
+        pciah = RES_TO_U32_HIGH(pci_addr);
+        pcial = RES_TO_U32_LOW(pci_addr);
+        sa = (0xffffffffu << ilog2(size)) | 0x1;
+
+        /* Program register values */
+        switch (index) {
+        case 0:
+                out_le32(mbase + PECFG_POM0LAH, pciah);
+                out_le32(mbase + PECFG_POM0LAL, pcial);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);
+                /* Note that 3 here means enabled | single region */
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, sa | 3);
+                break;
+        case 1:
+                out_le32(mbase + PECFG_POM1LAH, pciah);
+                out_le32(mbase + PECFG_POM1LAL, pcial);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);
+                /* Note that 3 here means enabled | single region */
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, sa | 3);
+                break;
+        case 2:
+                out_le32(mbase + PECFG_POM2LAH, pciah);
+                out_le32(mbase + PECFG_POM2LAL, pcial);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal);
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff);
+                /* Note that 3 here means enabled | IO space !!! */
+                dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, sa | 3);
+                break;
+        }
+
+        return 0;
+}
+
 static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
                                                struct pci_controller *hose,
                                                void __iomem *mbase)
 {
-        u32 lah, lal, pciah, pcial, sa;
-        int i, j;
+        int i, j, found_isa_hole = 0;
 
         /* Setup outbound memory windows */
         for (i = j = 0; i < 3; i++) {
@@ -1337,53 +1462,38 @@ static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
                         break;
                 }
 
-                /* Calculate register values */
-                lah = RES_TO_U32_HIGH(res->start);
-                lal = RES_TO_U32_LOW(res->start);
-                pciah = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset);
-                pcial = RES_TO_U32_LOW(res->start - hose->pci_mem_offset);
-                sa = res->end + 1 - res->start;
-                if (!is_power_of_2(sa) || sa < 0x100000 ||
-                    sa > 0xffffffffu) {
-                        printk(KERN_WARNING "%s: Resource out of range\n",
-                               port->node->full_name);
-                        continue;
-                }
-                sa = (0xffffffffu << ilog2(sa)) | 0x1;
-
-                /* Program register values */
-                switch (j) {
-                case 0:
-                        out_le32(mbase + PECFG_POM0LAH, pciah);
-                        out_le32(mbase + PECFG_POM0LAL, pcial);
-                        dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);
-                        dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);
-                        dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);
-                        dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, sa | 3);
-                        break;
-                case 1:
-                        out_le32(mbase + PECFG_POM1LAH, pciah);
-                        out_le32(mbase + PECFG_POM1LAL, pcial);
-                        dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);
-                        dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);
-                        dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);
-                        dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, sa | 3);
-                        break;
+                /* Configure the resource */
+                if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
+                                               res->start,
+                                               res->start - hose->pci_mem_offset,
+                                               res->end + 1 - res->start,
+                                               res->flags,
+                                               j) == 0) {
+                        j++;
+
+                        /* If the resource PCI address is 0 then we have our
+                         * ISA memory hole
+                         */
+                        if (res->start == hose->pci_mem_offset)
+                                found_isa_hole = 1;
                 }
-                j++;
         }
 
-        /* Configure IO, always 64K starting at 0 */
-        if (hose->io_resource.flags & IORESOURCE_IO) {
-                lah = RES_TO_U32_HIGH(hose->io_base_phys);
-                lal = RES_TO_U32_LOW(hose->io_base_phys);
-                out_le32(mbase + PECFG_POM2LAH, 0);
-                out_le32(mbase + PECFG_POM2LAL, 0);
-                dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah);
-                dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal);
-                dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff);
-                dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, 0xffff0000 | 3);
-        }
+        /* Handle ISA memory hole if not already covered */
+        if (j <= 1 && !found_isa_hole && hose->isa_mem_size)
+                if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
+                                               hose->isa_mem_phys, 0,
+                                               hose->isa_mem_size, 0, j) == 0)
+                        printk(KERN_INFO "%s: Legacy ISA memory support enabled\n",
+                               hose->dn->full_name);
+
+        /* Configure IO, always 64K starting at 0. We hard wire it to 64K !
+         * Note also that it -has- to be region index 2 on this HW
+         */
+        if (hose->io_resource.flags & IORESOURCE_IO)
+                ppc4xx_setup_one_pciex_POM(port, hose, mbase,
+                                           hose->io_base_phys, 0,
+                                           0x10000, IORESOURCE_IO, 2);
 }
 
 static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index b3b73ae57d6d..01bce3784b0a 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -19,6 +19,7 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/string.h>
+#include <linux/spinlock.h>
 #include <linux/mm.h>
 #include <linux/interrupt.h>
 #include <linux/bootmem.h>
@@ -38,6 +39,8 @@ static void qe_snums_init(void);
 static int qe_sdma_init(void);
 
 static DEFINE_SPINLOCK(qe_lock);
+DEFINE_SPINLOCK(cmxgcr_lock);
+EXPORT_SYMBOL(cmxgcr_lock);
 
 /* QE snum state */
 enum qe_snum_state {
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c
index 1d78071aad7d..ebb442ea1917 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc.c
@@ -18,6 +18,7 @@
 #include <linux/errno.h>
 #include <linux/slab.h>
 #include <linux/stddef.h>
+#include <linux/spinlock.h>
 #include <linux/module.h>
 
 #include <asm/irq.h>
@@ -26,9 +27,6 @@
 #include <asm/qe.h>
 #include <asm/ucc.h>
 
-DEFINE_SPINLOCK(cmxgcr_lock);
-EXPORT_SYMBOL(cmxgcr_lock);
-
 int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
 {
         unsigned long flags;
diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile
index 51d97588e762..9cb03b71b9d6 100644
--- a/arch/powerpc/xmon/Makefile
+++ b/arch/powerpc/xmon/Makefile
@@ -4,7 +4,7 @@ ifdef CONFIG_PPC64
 EXTRA_CFLAGS += -mno-minimal-toc
 endif
 
-obj-y                   += xmon.o setjmp.o start.o nonstdio.o
+obj-y                   += xmon.o start.o nonstdio.o
 
 ifdef CONFIG_XMON_DISASSEMBLY
 obj-y                   += ppc-dis.o ppc-opc.o
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 076368c8b8a9..8dfad7d9a004 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -41,6 +41,7 @@
 #include <asm/spu_priv1.h>
 #include <asm/firmware.h>
 #include <asm/setjmp.h>
+#include <asm/reg.h>
 
 #ifdef CONFIG_PPC64
 #include <asm/hvcall.h>
@@ -159,8 +160,6 @@ static int xmon_no_auto_backtrace;
 extern void xmon_enter(void);
 extern void xmon_leave(void);
 
-extern void xmon_save_regs(struct pt_regs *);
-
 #ifdef CONFIG_PPC64
 #define REG             "%.16lx"
 #define REGS_PER_LINE   4
@@ -532,7 +531,7 @@ int xmon(struct pt_regs *excp)
         struct pt_regs regs;
 
         if (excp == NULL) {
-                xmon_save_regs(&regs);
+                ppc_save_regs(&regs);
                 excp = &regs;
         }
 
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 8116a3328a19..19577aeffd7b 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -43,6 +43,9 @@ config GENERIC_HWEIGHT
 config GENERIC_TIME
         def_bool y
 
+config GENERIC_TIME_VSYSCALL
+        def_bool y
+
 config GENERIC_CLOCKEVENTS
         def_bool y
 
@@ -66,15 +69,21 @@ config PGSTE
         bool
         default y if KVM
 
+config VIRT_CPU_ACCOUNTING
+        def_bool y
+
 mainmenu "Linux Kernel Configuration"
 
 config S390
         def_bool y
+        select USE_GENERIC_SMP_HELPERS if SMP
+        select HAVE_FUNCTION_TRACER
         select HAVE_OPROFILE
         select HAVE_KPROBES
         select HAVE_KRETPROBES
         select HAVE_KVM if 64BIT
         select HAVE_ARCH_TRACEHOOK
+        select INIT_ALL_POSSIBLE
 
 source "init/Kconfig"
 
@@ -225,6 +234,14 @@ config MARCH_Z9_109
           Class (z9 BC). The kernel will be slightly faster but will not
           work on older machines such as the z990, z890, z900, and z800.
 
+config MARCH_Z10
+        bool "IBM System z10"
+        help
+          Select this to enable optimizations for IBM System z10. The
+          kernel will be slightly faster but will not work on older
+          machines such as the z990, z890, z900, z800, z9-109, z9-ec
+          and z9-bc.
+
 endchoice
 
 config PACK_STACK
@@ -343,16 +360,6 @@ config QDIO
 
           If unsure, say Y.
 
-config QDIO_DEBUG
-        bool "Extended debugging information"
-        depends on QDIO
-        help
-          Say Y here to get extended debugging output in
-            /sys/kernel/debug/s390dbf/qdio...
-          Warning: this option reduces the performance of the QDIO module.
-
-          If unsure, say N.
-
 config CHSC_SCH
         tristate "Support for CHSC subchannels"
         help
@@ -466,22 +473,9 @@ config PAGE_STATES
           hypervisor. The ESSA instruction is used to do the states
           changes between a page that has content and the unused state.
 
-config VIRT_TIMER
-        bool "Virtual CPU timer support"
-        help
-          This provides a kernel interface for virtual CPU timers.
-          Default is disabled.
-
-config VIRT_CPU_ACCOUNTING
-        bool "Base user process accounting on virtual cpu timer"
-        depends on VIRT_TIMER
-        help
-          Select this option to use CPU timer deltas to do user
-          process accounting.
-
 config APPLDATA_BASE
         bool "Linux - VM Monitor Stream, base infrastructure"
-        depends on PROC_FS && VIRT_TIMER=y
+        depends on PROC_FS
         help
           This provides a kernel interface for creating and updating z/VM APPLDATA
           monitor records. The monitor records are updated at certain time
diff --git a/arch/s390/Makefile b/arch/s390/Makefile
index 792a4e7743ce..578c61f15a4b 100644
--- a/arch/s390/Makefile
+++ b/arch/s390/Makefile
@@ -34,6 +34,7 @@ cflags-$(CONFIG_MARCH_G5)   += $(call cc-option,-march=g5)
 cflags-$(CONFIG_MARCH_Z900) += $(call cc-option,-march=z900)
 cflags-$(CONFIG_MARCH_Z990) += $(call cc-option,-march=z990)
 cflags-$(CONFIG_MARCH_Z9_109) += $(call cc-option,-march=z9-109)
+cflags-$(CONFIG_MARCH_Z10) += $(call cc-option,-march=z10)
 
 #KBUILD_IMAGE is necessary for make rpm
 KBUILD_IMAGE    :=arch/s390/boot/image
diff --git a/arch/s390/appldata/appldata.h b/arch/s390/appldata/appldata.h
index 17a2636fec0a..f0b23fc759ba 100644
--- a/arch/s390/appldata/appldata.h
+++ b/arch/s390/appldata/appldata.h
@@ -26,10 +26,6 @@
 #define CTL_APPLDATA_NET_SUM    2125
 #define CTL_APPLDATA_PROC       2126
 
-#define P_INFO(x...)    printk(KERN_INFO MY_PRINT_NAME " info: " x)
-#define P_ERROR(x...)   printk(KERN_ERR MY_PRINT_NAME " error: " x)
-#define P_WARNING(x...) printk(KERN_WARNING MY_PRINT_NAME " status: " x)
-
 struct appldata_ops {
         struct list_head list;
         struct ctl_table_header *sysctl_header;
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index a06a47cdd5e0..27b70d8a359c 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -10,6 +10,9 @@
  * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com>
  */
 
+#define KMSG_COMPONENT  "appldata"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/slab.h>
@@ -32,7 +35,6 @@
 #include "appldata.h"
 
 
-#define MY_PRINT_NAME   "appldata"              /* for debug messages, etc. */
 #define APPLDATA_CPU_INTERVAL   10000           /* default (CPU) time for
                                                    sampling interval in
                                                    milliseconds */
@@ -390,8 +392,8 @@ appldata_generic_handler(ctl_table *ctl, int write, struct file *filp,
                                         (unsigned long) ops->data, ops->size,
                                         ops->mod_lvl);
                 if (rc != 0) {
-                        P_ERROR("START DIAG 0xDC for %s failed, "
-                                "return code: %d\n", ops->name, rc);
+                        pr_err("Starting the data collection for %s "
+                               "failed with rc=%d\n", ops->name, rc);
                         module_put(ops->owner);
                 } else
                         ops->active = 1;
@@ -401,8 +403,8 @@ appldata_generic_handler(ctl_table *ctl, int write, struct file *filp,
                                 (unsigned long) ops->data, ops->size,
                                 ops->mod_lvl);
                 if (rc != 0)
-                        P_ERROR("STOP DIAG 0xDC for %s failed, "
-                                "return code: %d\n", ops->name, rc);
+                        pr_err("Stopping the data collection for %s "
+                               "failed with rc=%d\n", ops->name, rc);
                 module_put(ops->owner);
         }
         spin_unlock(&appldata_ops_lock);
diff --git a/arch/s390/appldata/appldata_net_sum.c b/arch/s390/appldata/appldata_net_sum.c
index 3b746556e1a3..fa741f84c5b9 100644
--- a/arch/s390/appldata/appldata_net_sum.c
+++ b/arch/s390/appldata/appldata_net_sum.c
@@ -67,7 +67,6 @@ static void appldata_get_net_sum_data(void *data)
         int i;
         struct appldata_net_sum_data *net_data;
         struct net_device *dev;
-        struct net_device_stats *stats;
         unsigned long rx_packets, tx_packets, rx_bytes, tx_bytes, rx_errors,
                         tx_errors, rx_dropped, tx_dropped, collisions;
 
@@ -86,7 +85,8 @@ static void appldata_get_net_sum_data(void *data)
         collisions = 0;
         read_lock(&dev_base_lock);
         for_each_netdev(&init_net, dev) {
-                stats = dev->get_stats(dev);
+                const struct net_device_stats *stats = dev_get_stats(dev);
+
                 rx_packets += stats->rx_packets;
                 tx_packets += stats->tx_packets;
                 rx_bytes   += stats->rx_bytes;
diff --git a/arch/s390/appldata/appldata_os.c b/arch/s390/appldata/appldata_os.c
index eb44f9f8ab91..55c80ffd42b9 100644
--- a/arch/s390/appldata/appldata_os.c
+++ b/arch/s390/appldata/appldata_os.c
@@ -9,6 +9,9 @@
  * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com>
  */
 
+#define KMSG_COMPONENT  "appldata"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/slab.h>
@@ -22,7 +25,6 @@
 #include "appldata.h"
 
 
-#define MY_PRINT_NAME   "appldata_os"           /* for debug messages, etc. */
 #define LOAD_INT(x) ((x) >> FSHIFT)
 #define LOAD_FRAC(x) LOAD_INT(((x) & (FIXED_1-1)) * 100)
 
@@ -143,21 +145,16 @@ static void appldata_get_os_data(void *data)
                                            (unsigned long) ops.data, new_size,
                                            ops.mod_lvl);
                         if (rc != 0)
-                                P_ERROR("os: START NEW DIAG 0xDC failed, "
-                                        "return code: %d, new size = %i\n", rc,
-                                        new_size);
+                                pr_err("Starting a new OS data collection "
+                                       "failed with rc=%d\n", rc);
 
                         rc = appldata_diag(APPLDATA_RECORD_OS_ID,
                                            APPLDATA_STOP_REC,
                                            (unsigned long) ops.data, ops.size,
                                            ops.mod_lvl);
                         if (rc != 0)
-                                P_ERROR("os: STOP OLD DIAG 0xDC failed, "
-                                        "return code: %d, old size = %i\n", rc,
-                                        ops.size);
-                        else
-                                P_INFO("os: old record size = %i stopped\n",
-                                        ops.size);
+                                pr_err("Stopping a faulty OS data "
+                                       "collection failed with rc=%d\n", rc);
                 }
                 ops.size = new_size;
         }
@@ -178,8 +175,8 @@ static int __init appldata_os_init(void)
         max_size = sizeof(struct appldata_os_data) +
                    (NR_CPUS * sizeof(struct appldata_os_per_cpu));
         if (max_size > APPLDATA_MAX_REC_SIZE) {
-                P_ERROR("Max. size of OS record = %i, bigger than maximum "
-                        "record size (%i)\n", max_size, APPLDATA_MAX_REC_SIZE);
+                pr_err("Maximum OS record size %i exceeds the maximum "
+                       "record size %i\n", max_size, APPLDATA_MAX_REC_SIZE);
                 rc = -ENOMEM;
                 goto out;
         }
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c
index e33f32b54c08..c42cd898f68b 100644
--- a/arch/s390/crypto/aes_s390.c
+++ b/arch/s390/crypto/aes_s390.c
@@ -17,6 +17,9 @@
  *
  */
 
+#define KMSG_COMPONENT "aes_s390"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <crypto/aes.h>
 #include <crypto/algapi.h>
 #include <linux/err.h>
@@ -169,7 +172,8 @@ static int fallback_init_cip(struct crypto_tfm *tfm)
                         CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
 
         if (IS_ERR(sctx->fallback.cip)) {
-                printk(KERN_ERR "Error allocating fallback algo %s\n", name);
+                pr_err("Allocating AES fallback algorithm %s failed\n",
+                       name);
                 return PTR_ERR(sctx->fallback.blk);
         }
 
@@ -349,7 +353,8 @@ static int fallback_init_blk(struct crypto_tfm *tfm)
                         CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
 
         if (IS_ERR(sctx->fallback.blk)) {
-                printk(KERN_ERR "Error allocating fallback algo %s\n", name);
+                pr_err("Allocating AES fallback algorithm %s failed\n",
+                       name);
                 return PTR_ERR(sctx->fallback.blk);
         }
 
@@ -515,9 +520,8 @@ static int __init aes_s390_init(void)
 
         /* z9 109 and z9 BC/EC only support 128 bit key length */
         if (keylen_flag == AES_KEYLEN_128)
-                printk(KERN_INFO
-                       "aes_s390: hardware acceleration only available for "
-                       "128 bit keys\n");
+                pr_info("AES hardware acceleration is only available for"
+                        " 128-bit keys\n");
 
         ret = crypto_register_alg(&aes_alg);
         if (ret)
diff --git a/arch/s390/hypfs/hypfs_diag.c b/arch/s390/hypfs/hypfs_diag.c
index b9a1ce1f28e4..b1e892a43816 100644
--- a/arch/s390/hypfs/hypfs_diag.c
+++ b/arch/s390/hypfs/hypfs_diag.c
@@ -3,10 +3,13 @@
  *    Hypervisor filesystem for Linux on s390. Diag 204 and 224
  *    implementation.
  *
- *    Copyright (C) IBM Corp. 2006
+ *    Copyright IBM Corp. 2006, 2008
  *    Author(s): Michael Holzheu <holzheu@de.ibm.com>
  */
 
+#define KMSG_COMPONENT "hypfs"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/string.h>
@@ -527,13 +530,14 @@ __init int hypfs_diag_init(void)
         int rc;
 
         if (diag204_probe()) {
-                printk(KERN_ERR "hypfs: diag 204 not working.");
+                pr_err("The hardware system does not support hypfs\n");
                 return -ENODATA;
         }
         rc = diag224_get_name_table();
         if (rc) {
                 diag204_free_buffer();
-                printk(KERN_ERR "hypfs: could not get name table.\n");
+                pr_err("The hardware system does not provide all "
+                       "functions required by hypfs\n");
         }
         return rc;
 }
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index 36313801cd5c..5a805df216bb 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -2,10 +2,13 @@
  *  arch/s390/hypfs/inode.c
  *    Hypervisor filesystem for Linux on s390.
  *
- *    Copyright (C) IBM Corp. 2006
+ *    Copyright IBM Corp. 2006, 2008
  *    Author(s): Michael Holzheu <holzheu@de.ibm.com>
  */
 
+#define KMSG_COMPONENT "hypfs"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/fs.h>
@@ -103,7 +106,6 @@ static struct inode *hypfs_make_inode(struct super_block *sb, int mode)
                 ret->i_mode = mode;
                 ret->i_uid = hypfs_info->uid;
                 ret->i_gid = hypfs_info->gid;
-                ret->i_blocks = 0;
                 ret->i_atime = ret->i_mtime = ret->i_ctime = CURRENT_TIME;
                 if (mode & S_IFDIR)
                         ret->i_nlink = 2;
@@ -200,7 +202,7 @@ static ssize_t hypfs_aio_write(struct kiocb *iocb, const struct iovec *iov,
         else
                 rc = hypfs_diag_create_files(sb, sb->s_root);
         if (rc) {
-                printk(KERN_ERR "hypfs: Update failed\n");
+                pr_err("Updating the hypfs tree failed\n");
                 hypfs_delete_tree(sb->s_root);
                 goto out;
         }
@@ -252,8 +254,7 @@ static int hypfs_parse_options(char *options, struct super_block *sb)
                         break;
                 case opt_err:
                 default:
-                        printk(KERN_ERR "hypfs: Unrecognized mount option "
-                               "\"%s\" or missing value\n", str);
+                        pr_err("%s is not a valid mount option\n", str);
                         return -EINVAL;
                 }
         }
@@ -280,8 +281,8 @@ static int hypfs_fill_super(struct super_block *sb, void *data, int silent)
         if (!sbi)
                 return -ENOMEM;
         mutex_init(&sbi->lock);
-        sbi->uid = current->uid;
-        sbi->gid = current->gid;
+        sbi->uid = current_uid();
+        sbi->gid = current_gid();
         sb->s_fs_info = sbi;
         sb->s_blocksize = PAGE_CACHE_SIZE;
         sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
@@ -317,7 +318,7 @@ static int hypfs_fill_super(struct super_block *sb, void *data, int silent)
         }
         hypfs_update_update(sb);
         sb->s_root = root_dentry;
-        printk(KERN_INFO "hypfs: Hypervisor filesystem mounted\n");
+        pr_info("Hypervisor filesystem mounted\n");
         return 0;
 
 err_tree:
@@ -513,7 +514,7 @@ fail_sysfs:
         if (!MACHINE_IS_VM)
                 hypfs_diag_exit();
 fail_diag:
-        printk(KERN_ERR "hypfs: Initialization failed with rc = %i.\n", rc);
+        pr_err("Initialization of hypfs failed with rc=%i\n", rc);
         return rc;
 }
 
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h
index 2d184655bc5d..de432f2de2d2 100644
--- a/arch/s390/include/asm/atomic.h
+++ b/arch/s390/include/asm/atomic.h
@@ -2,6 +2,7 @@
 #define __ARCH_S390_ATOMIC__
 
 #include <linux/compiler.h>
+#include <linux/types.h>
 
 /*
  *  include/asm-s390/atomic.h
@@ -23,9 +24,6 @@
  * S390 uses 'Compare And Swap' for atomicity in SMP enviroment
  */
 
-typedef struct {
-        int counter;
-} __attribute__ ((aligned (4))) atomic_t;
 #define ATOMIC_INIT(i)  { (i) }
 
 #ifdef __KERNEL__
@@ -149,9 +147,6 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
 #undef __CS_LOOP
 
 #ifdef __s390x__
-typedef struct {
-        long long counter;
-} __attribute__ ((aligned (8))) atomic64_t;
 #define ATOMIC64_INIT(i)  { (i) }
 
 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
diff --git a/arch/s390/include/asm/auxvec.h b/arch/s390/include/asm/auxvec.h
index 0d340720fd99..a1f153e89133 100644
--- a/arch/s390/include/asm/auxvec.h
+++ b/arch/s390/include/asm/auxvec.h
@@ -1,4 +1,6 @@
 #ifndef __ASMS390_AUXVEC_H
 #define __ASMS390_AUXVEC_H
 
+#define AT_SYSINFO_EHDR         33
+
 #endif
diff --git a/arch/s390/include/asm/bug.h b/arch/s390/include/asm/bug.h
index 384e3621e341..7efd0abe8887 100644
--- a/arch/s390/include/asm/bug.h
+++ b/arch/s390/include/asm/bug.h
@@ -47,7 +47,10 @@
 
 #endif /* CONFIG_DEBUG_BUGVERBOSE */
 
-#define BUG()   __EMIT_BUG(0)
+#define BUG() do {                                      \
+        __EMIT_BUG(0);                                  \
+        for (;;);                                       \
+} while (0)
 
 #define WARN_ON(x) ({                                   \
         int __ret_warn_on = !!(x);                      \
diff --git a/arch/s390/include/asm/byteorder.h b/arch/s390/include/asm/byteorder.h
index 1fe2492baa8d..8bcf277c8468 100644
--- a/arch/s390/include/asm/byteorder.h
+++ b/arch/s390/include/asm/byteorder.h
@@ -11,32 +11,39 @@
 
 #include <asm/types.h>
 
-#ifdef __GNUC__
+#define __BIG_ENDIAN
+
+#ifndef __s390x__
+# define __SWAB_64_THRU_32__
+#endif
 
 #ifdef __s390x__
-static inline __u64 ___arch__swab64p(const __u64 *x)
+static inline __u64 __arch_swab64p(const __u64 *x)
 {
         __u64 result;
 
         asm volatile("lrvg %0,%1" : "=d" (result) : "m" (*x));
         return result;
 }
+#define __arch_swab64p __arch_swab64p
 
-static inline __u64 ___arch__swab64(__u64 x)
+static inline __u64 __arch_swab64(__u64 x)
 {
         __u64 result;
 
         asm volatile("lrvgr %0,%1" : "=d" (result) : "d" (x));
         return result;
 }
+#define __arch_swab64 __arch_swab64
 
-static inline void ___arch__swab64s(__u64 *x)
+static inline void __arch_swab64s(__u64 *x)
 {
-        *x = ___arch__swab64p(x);
+        *x = __arch_swab64p(x);
 }
+#define __arch_swab64s __arch_swab64s
 #endif /* __s390x__ */
 
-static inline __u32 ___arch__swab32p(const __u32 *x)
+static inline __u32 __arch_swab32p(const __u32 *x)
 {
         __u32 result;
         
@@ -53,25 +60,20 @@ static inline __u32 ___arch__swab32p(const __u32 *x)
 #endif /* __s390x__ */
         return result;
 }
+#define __arch_swab32p __arch_swab32p
 
-static inline __u32 ___arch__swab32(__u32 x)
+#ifdef __s390x__
+static inline __u32 __arch_swab32(__u32 x)
 {
-#ifndef __s390x__
-        return ___arch__swab32p(&x);
-#else /* __s390x__ */
         __u32 result;
         
         asm volatile("lrvr  %0,%1" : "=d" (result) : "d" (x));
         return result;
-#endif /* __s390x__ */
-}
-
-static __inline__ void ___arch__swab32s(__u32 *x)
-{
-        *x = ___arch__swab32p(x);
 }
+#define __arch_swab32 __arch_swab32
+#endif /* __s390x__ */
 
-static __inline__ __u16 ___arch__swab16p(const __u16 *x)
+static inline __u16 __arch_swab16p(const __u16 *x)
 {
         __u16 result;
         
@@ -86,40 +88,8 @@ static __inline__ __u16 ___arch__swab16p(const __u16 *x)
 #endif /* __s390x__ */
         return result;
 }
+#define __arch_swab16p __arch_swab16p
 
-static __inline__ __u16 ___arch__swab16(__u16 x)
-{
-        return ___arch__swab16p(&x);
-}
-
-static __inline__ void ___arch__swab16s(__u16 *x)
-{
-        *x = ___arch__swab16p(x);
-}
-
-#ifdef __s390x__
-#define __arch__swab64(x) ___arch__swab64(x)
-#define __arch__swab64p(x) ___arch__swab64p(x)
-#define __arch__swab64s(x) ___arch__swab64s(x)
-#endif /* __s390x__ */
-#define __arch__swab32(x) ___arch__swab32(x)
-#define __arch__swab16(x) ___arch__swab16(x)
-#define __arch__swab32p(x) ___arch__swab32p(x)
-#define __arch__swab16p(x) ___arch__swab16p(x)
-#define __arch__swab32s(x) ___arch__swab32s(x)
-#define __arch__swab16s(x) ___arch__swab16s(x)
-
-#ifndef __s390x__
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-#  define __BYTEORDER_HAS_U64__
-#  define __SWAB_64_THRU_32__
-#endif
-#else /* __s390x__ */
-#define __BYTEORDER_HAS_U64__
-#endif /* __s390x__ */
-
-#endif /* __GNUC__ */
-
-#include <linux/byteorder/big_endian.h>
+#include <linux/byteorder.h>
 
 #endif /* _S390_BYTEORDER_H */
diff --git a/arch/s390/include/asm/cpu.h b/arch/s390/include/asm/cpu.h
index e5a6a9ba3adf..d60a2eefb17b 100644
--- a/arch/s390/include/asm/cpu.h
+++ b/arch/s390/include/asm/cpu.h
@@ -14,7 +14,6 @@
 
 struct s390_idle_data {
         spinlock_t lock;
-        unsigned int in_idle;
         unsigned long long idle_count;
         unsigned long long idle_enter;
         unsigned long long idle_time;
@@ -22,12 +21,12 @@ struct s390_idle_data {
 
 DECLARE_PER_CPU(struct s390_idle_data, s390_idle);
 
-void s390_idle_leave(void);
+void vtime_start_cpu(void);
 
 static inline void s390_idle_check(void)
 {
-        if ((&__get_cpu_var(s390_idle))->in_idle)
-                s390_idle_leave();
+        if ((&__get_cpu_var(s390_idle))->idle_enter != 0ULL)
+                vtime_start_cpu();
 }
 
 #endif /* _ASM_S390_CPU_H_ */
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 133ce054fc89..521726430afa 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -11,7 +11,7 @@
 
 #include <asm/div64.h>
 
-/* We want to use micro-second resolution. */
+/* We want to use full resolution of the CPU timer: 2**-12 micro-seconds. */
 
 typedef unsigned long long cputime_t;
 typedef unsigned long long cputime64_t;
@@ -53,9 +53,9 @@ __div(unsigned long long n, unsigned int base)
 #define cputime_ge(__a, __b)            ((__a) >= (__b))
 #define cputime_lt(__a, __b)            ((__a) <  (__b))
 #define cputime_le(__a, __b)            ((__a) <= (__b))
-#define cputime_to_jiffies(__ct)        (__div((__ct), 1000000 / HZ))
+#define cputime_to_jiffies(__ct)        (__div((__ct), 4096000000ULL / HZ))
 #define cputime_to_scaled(__ct)         (__ct)
-#define jiffies_to_cputime(__hz)        ((cputime_t)(__hz) * (1000000 / HZ))
+#define jiffies_to_cputime(__hz)        ((cputime_t)(__hz) * (4096000000ULL / HZ))
 
 #define cputime64_zero                  (0ULL)
 #define cputime64_add(__a, __b)         ((__a) + (__b))
@@ -64,7 +64,7 @@ __div(unsigned long long n, unsigned int base)
 static inline u64
 cputime64_to_jiffies64(cputime64_t cputime)
 {
-        do_div(cputime, 1000000 / HZ);
+        do_div(cputime, 4096000000ULL / HZ);
         return cputime;
 }
 
@@ -74,13 +74,13 @@ cputime64_to_jiffies64(cputime64_t cputime)
 static inline unsigned int
 cputime_to_msecs(const cputime_t cputime)
 {
-        return __div(cputime, 1000);
+        return __div(cputime, 4096000);
 }
 
 static inline cputime_t
 msecs_to_cputime(const unsigned int m)
 {
-        return (cputime_t) m * 1000;
+        return (cputime_t) m * 4096000;
 }
 
 /*
@@ -89,13 +89,13 @@ msecs_to_cputime(const unsigned int m)
 static inline unsigned int
 cputime_to_secs(const cputime_t cputime)
 {
-        return __div(cputime, 1000000);
+        return __div(cputime, 2048000000) >> 1;
 }
 
 static inline cputime_t
 secs_to_cputime(const unsigned int s)
 {
-        return (cputime_t) s * 1000000;
+        return (cputime_t) s * 4096000000ULL;
 }
 
 /*
@@ -104,7 +104,7 @@ secs_to_cputime(const unsigned int s)
 static inline cputime_t
 timespec_to_cputime(const struct timespec *value)
 {
-        return value->tv_nsec / 1000 + (u64) value->tv_sec * 1000000;
+        return value->tv_nsec * 4096 / 1000 + (u64) value->tv_sec * 4096000000ULL;
 }
 
 static inline void
@@ -114,12 +114,12 @@ cputime_to_timespec(const cputime_t cputime, struct timespec *value)
         register_pair rp;
 
         rp.pair = cputime >> 1;
-        asm ("dr %0,%1" : "+d" (rp) : "d" (1000000 >> 1));
-        value->tv_nsec = rp.subreg.even * 1000;
+        asm ("dr %0,%1" : "+d" (rp) : "d" (2048000000UL));
+        value->tv_nsec = rp.subreg.even * 1000 / 4096;
         value->tv_sec = rp.subreg.odd;
 #else
-        value->tv_nsec = (cputime % 1000000) * 1000;
-        value->tv_sec = cputime / 1000000;
+        value->tv_nsec = (cputime % 4096000000ULL) * 1000 / 4096;
+        value->tv_sec = cputime / 4096000000ULL;
 #endif
 }
 
@@ -131,7 +131,7 @@ cputime_to_timespec(const cputime_t cputime, struct timespec *value)
 static inline cputime_t
 timeval_to_cputime(const struct timeval *value)
 {
-        return value->tv_usec + (u64) value->tv_sec * 1000000;
+        return value->tv_usec * 4096 + (u64) value->tv_sec * 4096000000ULL;
 }
 
 static inline void
@@ -141,12 +141,12 @@ cputime_to_timeval(const cputime_t cputime, struct timeval *value)
         register_pair rp;
 
         rp.pair = cputime >> 1;
-        asm ("dr %0,%1" : "+d" (rp) : "d" (1000000 >> 1));
-        value->tv_usec = rp.subreg.even;
+        asm ("dr %0,%1" : "+d" (rp) : "d" (2048000000UL));
+        value->tv_usec = rp.subreg.even / 4096;
         value->tv_sec = rp.subreg.odd;
 #else
-        value->tv_usec = cputime % 1000000;
-        value->tv_sec = cputime / 1000000;
+        value->tv_usec = cputime % 4096000000ULL;
+        value->tv_sec = cputime / 4096000000ULL;
 #endif
 }
 
@@ -156,13 +156,13 @@ cputime_to_timeval(const cputime_t cputime, struct timeval *value)
 static inline clock_t
 cputime_to_clock_t(cputime_t cputime)
 {
-        return __div(cputime, 1000000 / USER_HZ);
+        return __div(cputime, 4096000000ULL / USER_HZ);
 }
 
 static inline cputime_t
 clock_t_to_cputime(unsigned long x)
 {
-        return (cputime_t) x * (1000000 / USER_HZ);
+        return (cputime_t) x * (4096000000ULL / USER_HZ);
 }
 
 /*
@@ -171,7 +171,7 @@ clock_t_to_cputime(unsigned long x)
 static inline clock_t
 cputime64_to_clock_t(cputime64_t cputime)
 {
-       return __div(cputime, 1000000 / USER_HZ);
+       return __div(cputime, 4096000000ULL / USER_HZ);
 }
 
 #endif /* _S390_CPUTIME_H */
diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h
index 261785ab5b22..d480f39d65e6 100644
--- a/arch/s390/include/asm/elf.h
+++ b/arch/s390/include/asm/elf.h
@@ -120,6 +120,10 @@ typedef s390_compat_regs compat_elf_gregset_t;
 #include <asm/system.h>         /* for save_access_regs */
 #include <asm/mmu_context.h>
 
+#include <asm/vdso.h>
+
+extern unsigned int vdso_enabled;
+
 /*
  * This is used to ensure we don't load something for the wrong architecture.
  */
@@ -191,4 +195,16 @@ do {							\
         current->mm->context.noexec == 0;               \
 })
 
+#define ARCH_DLINFO                                                         \
+do {                                                                        \
+        if (vdso_enabled)                                                   \
+                NEW_AUX_ENT(AT_SYSINFO_EHDR,                                \
+                            (unsigned long)current->mm->context.vdso_base); \
+} while (0)
+
+struct linux_binprm;
+
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
+int arch_setup_additional_pages(struct linux_binprm *, int);
+
 #endif
diff --git a/arch/s390/include/asm/fcx.h b/arch/s390/include/asm/fcx.h
index 8be1f3a58042..ef6170995076 100644
--- a/arch/s390/include/asm/fcx.h
+++ b/arch/s390/include/asm/fcx.h
@@ -248,8 +248,8 @@ struct dcw {
 #define TCCB_MAX_SIZE           (sizeof(struct tccb_tcah) + \
                                  TCCB_MAX_DCW * sizeof(struct dcw) + \
                                  sizeof(struct tccb_tcat))
-#define TCCB_SAC_DEFAULT        0xf901
-#define TCCB_SAC_INTRG          0xf902
+#define TCCB_SAC_DEFAULT        0x1ffe
+#define TCCB_SAC_INTRG          0x1fff
 
 /**
  * struct tccb_tcah - Transport-Command-Area Header (TCAH)
diff --git a/arch/s390/include/asm/ftrace.h b/arch/s390/include/asm/ftrace.h
new file mode 100644
index 000000000000..5a5bc75e19d4
--- /dev/null
+++ b/arch/s390/include/asm/ftrace.h
@@ -0,0 +1,8 @@
+#ifndef _ASM_S390_FTRACE_H
+#define _ASM_S390_FTRACE_H
+
+#ifndef __ASSEMBLY__
+extern void _mcount(void);
+#endif
+
+#endif /* _ASM_S390_FTRACE_H */
diff --git a/arch/s390/include/asm/isc.h b/arch/s390/include/asm/isc.h
index 34bb8916db4f..1420a1115948 100644
--- a/arch/s390/include/asm/isc.h
+++ b/arch/s390/include/asm/isc.h
@@ -17,6 +17,7 @@
 #define CHSC_SCH_ISC 7                  /* CHSC subchannels */
 /* Adapter interrupts. */
 #define QDIO_AIRQ_ISC IO_SCH_ISC        /* I/O subchannel in qdio mode */
+#define AP_ISC 6                        /* adjunct processor (crypto) devices */
 
 /* Functions for registration of I/O interruption subclasses */
 void isc_register(unsigned int isc);
diff --git a/arch/s390/include/asm/kvm_virtio.h b/arch/s390/include/asm/kvm_virtio.h
index c13568b9351c..0503936f101f 100644
--- a/arch/s390/include/asm/kvm_virtio.h
+++ b/arch/s390/include/asm/kvm_virtio.h
@@ -50,6 +50,10 @@ struct kvm_vqconfig {
 #define KVM_S390_VIRTIO_RESET           1
 #define KVM_S390_VIRTIO_SET_STATUS      2
 
+/* The alignment to use between consumer and producer parts of vring.
+ * This is pagesize for historical reasons. */
+#define KVM_S390_VIRTIO_RING_ALIGN      4096
+
 #ifdef __KERNEL__
 /* early virtio console setup */
 #ifdef CONFIG_S390_GUEST
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 0bc51d52a899..ffdef5fe8587 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -67,11 +67,11 @@
 #define __LC_SYNC_ENTER_TIMER           0x248
 #define __LC_ASYNC_ENTER_TIMER          0x250
 #define __LC_EXIT_TIMER                 0x258
-#define __LC_LAST_UPDATE_TIMER          0x260
-#define __LC_USER_TIMER                 0x268
-#define __LC_SYSTEM_TIMER               0x270
-#define __LC_LAST_UPDATE_CLOCK          0x278
-#define __LC_STEAL_CLOCK                0x280
+#define __LC_USER_TIMER                 0x260
+#define __LC_SYSTEM_TIMER               0x268
+#define __LC_STEAL_TIMER                0x270
+#define __LC_LAST_UPDATE_TIMER          0x278
+#define __LC_LAST_UPDATE_CLOCK          0x280
 #define __LC_RETURN_MCCK_PSW            0x288
 #define __LC_KERNEL_STACK               0xC40
 #define __LC_THREAD_INFO                0xC44
@@ -89,11 +89,11 @@
 #define __LC_SYNC_ENTER_TIMER           0x250
 #define __LC_ASYNC_ENTER_TIMER          0x258
 #define __LC_EXIT_TIMER                 0x260
-#define __LC_LAST_UPDATE_TIMER          0x268
-#define __LC_USER_TIMER                 0x270
-#define __LC_SYSTEM_TIMER               0x278
-#define __LC_LAST_UPDATE_CLOCK          0x280
-#define __LC_STEAL_CLOCK                0x288
+#define __LC_USER_TIMER                 0x268
+#define __LC_SYSTEM_TIMER               0x270
+#define __LC_STEAL_TIMER                0x278
+#define __LC_LAST_UPDATE_TIMER          0x280
+#define __LC_LAST_UPDATE_CLOCK          0x288
 #define __LC_RETURN_MCCK_PSW            0x290
 #define __LC_KERNEL_STACK               0xD40
 #define __LC_THREAD_INFO                0xD48
@@ -106,8 +106,10 @@
 #define __LC_IPLDEV                     0xDB8
 #define __LC_CURRENT                    0xDD8
 #define __LC_INT_CLOCK                  0xDE8
+#define __LC_VDSO_PER_CPU               0xE38
 #endif /* __s390x__ */
 
+#define __LC_PASTE                      0xE40
 
 #define __LC_PANIC_MAGIC                0xE00
 #ifndef __s390x__
@@ -252,11 +254,11 @@ struct _lowcore
         __u64        sync_enter_timer;         /* 0x248 */
         __u64        async_enter_timer;        /* 0x250 */
         __u64        exit_timer;               /* 0x258 */
-        __u64        last_update_timer;        /* 0x260 */
-        __u64        user_timer;               /* 0x268 */
-        __u64        system_timer;             /* 0x270 */
-        __u64        last_update_clock;        /* 0x278 */
-        __u64        steal_clock;              /* 0x280 */
+        __u64        user_timer;               /* 0x260 */
+        __u64        system_timer;             /* 0x268 */
+        __u64        steal_timer;              /* 0x270 */
+        __u64        last_update_timer;        /* 0x278 */
+        __u64        last_update_clock;        /* 0x280 */
         psw_t        return_mcck_psw;          /* 0x288 */
         __u8         pad8[0xc00-0x290];        /* 0x290 */
 
@@ -343,11 +345,11 @@ struct _lowcore
         __u64        sync_enter_timer;         /* 0x250 */
         __u64        async_enter_timer;        /* 0x258 */
         __u64        exit_timer;               /* 0x260 */
-        __u64        last_update_timer;        /* 0x268 */
-        __u64        user_timer;               /* 0x270 */
-        __u64        system_timer;             /* 0x278 */
-        __u64        last_update_clock;        /* 0x280 */
-        __u64        steal_clock;              /* 0x288 */
+        __u64        user_timer;               /* 0x268 */
+        __u64        system_timer;             /* 0x270 */
+        __u64        steal_timer;              /* 0x278 */
+        __u64        last_update_timer;        /* 0x280 */
+        __u64        last_update_clock;        /* 0x288 */
         psw_t        return_mcck_psw;          /* 0x290 */
         __u8         pad8[0xc00-0x2a0];        /* 0x2a0 */
         /* System info area */
@@ -381,7 +383,12 @@ struct _lowcore
         /* whether the kernel died with panic() or not */
         __u32        panic_magic;              /* 0xe00 */
 
-        __u8         pad13[0x11b8-0xe04];      /* 0xe04 */
+        /* Per cpu primary space access list */
+        __u8         pad_0xe04[0xe3c-0xe04];   /* 0xe04 */
+        __u32        vdso_per_cpu_data;        /* 0xe3c */
+        __u32        paste[16];                /* 0xe40 */
+
+        __u8         pad13[0x11b8-0xe80];      /* 0xe80 */
 
         /* 64 bit extparam used for pfault, diag 250 etc  */
         __u64        ext_params2;               /* 0x11B8 */
diff --git a/arch/s390/include/asm/mmu.h b/arch/s390/include/asm/mmu.h
index d2b4ff831477..3b59216e6284 100644
--- a/arch/s390/include/asm/mmu.h
+++ b/arch/s390/include/asm/mmu.h
@@ -6,6 +6,7 @@ typedef struct {
         struct list_head pgtable_list;
         unsigned long asce_bits;
         unsigned long asce_limit;
+        unsigned long vdso_base;
         int noexec;
         int has_pgste;   /* The mmu context has extended page tables */
         int alloc_pgste; /* cloned contexts will have extended page tables */
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 991ba939408c..32e8f6aa4384 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -152,4 +152,6 @@ void arch_alloc_page(struct page *page, int order);
 #include <asm-generic/memory_model.h>
 #include <asm-generic/page.h>
 
+#define __HAVE_ARCH_GATE_AREA 1
+
 #endif /* _S390_PAGE_H */
diff --git a/arch/s390/include/asm/pgalloc.h b/arch/s390/include/asm/pgalloc.h
index f5b2bf3d7c1d..b2658b9220fe 100644
--- a/arch/s390/include/asm/pgalloc.h
+++ b/arch/s390/include/asm/pgalloc.h
@@ -28,6 +28,8 @@ void disable_noexec(struct mm_struct *, struct task_struct *);
 
 static inline void clear_table(unsigned long *s, unsigned long val, size_t n)
 {
+        typedef struct { char _[n]; } addrtype;
+
         *s = val;
         n = (n / 256) - 1;
         asm volatile(
@@ -39,7 +41,8 @@ static inline void clear_table(unsigned long *s, unsigned long val, size_t n)
                 "0:     mvc     256(256,%0),0(%0)\n"
                 "       la      %0,256(%0)\n"
                 "       brct    %1,0b\n"
-                : "+a" (s), "+d" (n));
+                : "+a" (s), "+d" (n), "=m" (*(addrtype *) s)
+                : "m" (*(addrtype *) s));
 }
 
 static inline void crst_table_init(unsigned long *crst, unsigned long entry)
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 4af80af2a88f..066b99502e09 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -13,6 +13,7 @@
 #ifndef __ASM_S390_PROCESSOR_H
 #define __ASM_S390_PROCESSOR_H
 
+#include <linux/linkage.h>
 #include <asm/ptrace.h>
 
 #ifdef __KERNEL__
@@ -258,7 +259,7 @@ static inline void enabled_wait(void)
  * Function to drop a processor into disabled wait state
  */
 
-static inline void disabled_wait(unsigned long code)
+static inline void ATTRIB_NORET disabled_wait(unsigned long code)
 {
         unsigned long ctl_buf;
         psw_t dw_psw;
@@ -322,6 +323,7 @@ static inline void disabled_wait(unsigned long code)
                 : "=m" (ctl_buf)
                 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0");
 #endif /* __s390x__ */
+        while (1);
 }
 
 /*
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index 4734c3f05354..27fc1746de15 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -373,16 +373,16 @@ struct qdio_initialize {
 #define QDIO_FLAG_SYNC_OUTPUT           0x02
 #define QDIO_FLAG_PCI_OUT               0x10
 
-extern int qdio_initialize(struct qdio_initialize *init_data);
-extern int qdio_allocate(struct qdio_initialize *init_data);
-extern int qdio_establish(struct qdio_initialize *init_data);
+extern int qdio_initialize(struct qdio_initialize *);
+extern int qdio_allocate(struct qdio_initialize *);
+extern int qdio_establish(struct qdio_initialize *);
 extern int qdio_activate(struct ccw_device *);
 
-extern int do_QDIO(struct ccw_device*, unsigned int flags,
-                   int q_nr, int qidx, int count);
-extern int qdio_cleanup(struct ccw_device*, int how);
-extern int qdio_shutdown(struct ccw_device*, int how);
+extern int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
+                   int q_nr, int bufnr, int count);
+extern int qdio_cleanup(struct ccw_device*, int);
+extern int qdio_shutdown(struct ccw_device*, int);
 extern int qdio_free(struct ccw_device *);
-extern struct qdio_ssqd_desc *qdio_get_ssqd_desc(struct ccw_device *cdev);
+extern int qdio_get_ssqd_desc(struct ccw_device *dev, struct qdio_ssqd_desc*);
 
 #endif /* __QDIO_H__ */
diff --git a/arch/s390/include/asm/s390_rdev.h b/arch/s390/include/asm/s390_rdev.h
deleted file mode 100644
index 6fa20442a48c..000000000000
--- a/arch/s390/include/asm/s390_rdev.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- *  include/asm-s390/ccwdev.h
- *
- *    Copyright (C) 2002,2005 IBM Deutschland Entwicklung GmbH, IBM Corporation
- *    Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
- *               Carsten Otte  <cotte@de.ibm.com>
- *
- *  Interface for s390 root device
- */
-
-#ifndef _S390_RDEV_H_
-#define _S390_RDEV_H_
-extern struct device *s390_root_dev_register(const char *);
-extern void s390_root_dev_unregister(struct device *);
-#endif /* _S390_RDEV_H_ */
diff --git a/arch/s390/include/asm/sigp.h b/arch/s390/include/asm/sigp.h
index e16d56f8dfe1..ec403d4304f8 100644
--- a/arch/s390/include/asm/sigp.h
+++ b/arch/s390/include/asm/sigp.h
@@ -61,6 +61,7 @@ typedef enum
 {
         ec_schedule=0,
         ec_call_function,
+        ec_call_function_single,
         ec_bit_last
 } ec_bit_sig;
 
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index ae89cf2478fc..024b91e06239 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -91,8 +91,9 @@ extern int __cpu_up (unsigned int cpu);
 extern struct mutex smp_cpu_state_mutex;
 extern int smp_cpu_polarization[];
 
-extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
-        void *info, int wait);
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi(cpumask_t mask);
+
 #endif
 
 #ifndef CONFIG_SMP
diff --git a/arch/s390/include/asm/sysinfo.h b/arch/s390/include/asm/sysinfo.h
index 79d01343f8b0..ad93212d9e16 100644
--- a/arch/s390/include/asm/sysinfo.h
+++ b/arch/s390/include/asm/sysinfo.h
@@ -118,4 +118,15 @@ static inline int stsi(void *sysinfo, int fc, int sel1, int sel2)
         return r0;
 }
 
+/*
+ * Service level reporting interface.
+ */
+struct service_level {
+        struct list_head list;
+        void (*seq_print)(struct seq_file *, struct service_level *);
+};
+
+int register_service_level(struct service_level *);
+int unregister_service_level(struct service_level *);
+
 #endif /* __ASM_S390_SYSINFO_H */
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index 819e7d99ca0c..3a8b26eb1f2e 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -12,6 +12,7 @@
 #define __ASM_SYSTEM_H
 
 #include <linux/kernel.h>
+#include <linux/errno.h>
 #include <asm/types.h>
 #include <asm/ptrace.h>
 #include <asm/setup.h>
@@ -98,13 +99,9 @@ static inline void restore_access_regs(unsigned int *acrs)
         prev = __switch_to(prev,next);                                       \
 } while (0)
 
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-extern void account_vtime(struct task_struct *);
+extern void account_vtime(struct task_struct *, struct task_struct *);
 extern void account_tick_vtime(struct task_struct *);
 extern void account_system_vtime(struct task_struct *);
-#else
-#define account_vtime(x) do { /* empty */ } while (0)
-#endif
 
 #ifdef CONFIG_PFAULT
 extern void pfault_irq_init(void);
@@ -124,7 +121,7 @@ static inline void cmma_init(void) { }
 
 #define finish_arch_switch(prev) do {                                        \
         set_fs(current->thread.mm_segment);                                  \
-        account_vtime(prev);                                                 \
+        account_vtime(prev, current);                                        \
 } while (0)
 
 #define nop() asm volatile("nop")
@@ -413,8 +410,6 @@ __set_psw_mask(unsigned long mask)
 #define local_mcck_enable()  __set_psw_mask(psw_kernel_bits)
 #define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK)
 
-int stfle(unsigned long long *list, int doublewords);
-
 #ifdef CONFIG_SMP
 
 extern void smp_ctl_set_bit(int cr, int bit);
@@ -438,6 +433,23 @@ static inline unsigned int stfl(void)
         return S390_lowcore.stfl_fac_list;
 }
 
+static inline int __stfle(unsigned long long *list, int doublewords)
+{
+        typedef struct { unsigned long long _[doublewords]; } addrtype;
+        register unsigned long __nr asm("0") = doublewords - 1;
+
+        asm volatile(".insn s,0xb2b00000,%0" /* stfle */
+                     : "=m" (*(addrtype *) list), "+d" (__nr) : : "cc");
+        return __nr + 1;
+}
+
+static inline int stfle(unsigned long long *list, int doublewords)
+{
+        if (!(stfl() & (1UL << 24)))
+                return -EOPNOTSUPP;
+        return __stfle(list, doublewords);
+}
+
 static inline unsigned short stap(void)
 {
         unsigned short cpu_address;
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index c1eaf9604da7..c544aa524535 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -47,6 +47,8 @@ struct thread_info {
         unsigned int            cpu;            /* current CPU */
         int                     preempt_count;  /* 0 => preemptable, <0 => BUG */
         struct restart_block    restart_block;
+        __u64                   user_timer;
+        __u64                   system_timer;
 };
 
 /*
diff --git a/arch/s390/include/asm/timer.h b/arch/s390/include/asm/timer.h
index d98d79e35cd6..e4bcab739c19 100644
--- a/arch/s390/include/asm/timer.h
+++ b/arch/s390/include/asm/timer.h
@@ -23,20 +23,18 @@ struct vtimer_list {
         __u64 expires;
         __u64 interval;
 
-        spinlock_t lock;
-        unsigned long magic;
-
         void (*function)(unsigned long);
         unsigned long data;
 };
 
-/* the offset value will wrap after ca. 71 years */
+/* the vtimer value will wrap after ca. 71 years */
 struct vtimer_queue {
         struct list_head list;
         spinlock_t lock;
-        __u64 to_expire;          /* current event expire time */
-        __u64 offset;             /* list offset to zero */
-        __u64 idle;               /* temp var for idle */
+        __u64 timer;            /* last programmed timer */
+        __u64 elapsed;          /* elapsed time of timer expire values */
+        __u64 idle;             /* temp var for idle */
+        int do_spt;             /* =1: reprogram cpu timer in idle */
 };
 
 extern void init_virt_timer(struct vtimer_list *timer);
@@ -48,17 +46,8 @@ extern int del_virt_timer(struct vtimer_list *timer);
 extern void init_cpu_vtimer(void);
 extern void vtime_init(void);
 
-#ifdef CONFIG_VIRT_TIMER
-
-extern void vtime_start_cpu_timer(void);
-extern void vtime_stop_cpu_timer(void);
-
-#else
-
-static inline void vtime_start_cpu_timer(void) { }
-static inline void vtime_stop_cpu_timer(void) { }
-
-#endif /* CONFIG_VIRT_TIMER */
+extern void vtime_stop_cpu(void);
+extern void vtime_start_leave(void);
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index d96c91643458..c93eb50e1d09 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -6,10 +6,12 @@
 #define mc_capable()    (1)
 
 cpumask_t cpu_coregroup_map(unsigned int cpu);
+const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
 
 extern cpumask_t cpu_core_map[NR_CPUS];
 
 #define topology_core_siblings(cpu)     (cpu_core_map[cpu])
+#define topology_core_cpumask(cpu)      (&cpu_core_map[cpu])
 
 int topology_set_cpu_management(int fc);
 void topology_schedule_update(void);
diff --git a/arch/s390/include/asm/vdso.h b/arch/s390/include/asm/vdso.h
new file mode 100644
index 000000000000..7bdd7c8ebc91
--- /dev/null
+++ b/arch/s390/include/asm/vdso.h
@@ -0,0 +1,50 @@
+#ifndef __S390_VDSO_H__
+#define __S390_VDSO_H__
+
+#ifdef __KERNEL__
+
+/* Default link addresses for the vDSOs */
+#define VDSO32_LBASE    0
+#define VDSO64_LBASE    0
+
+#define VDSO_VERSION_STRING     LINUX_2.6.26
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Note about the vdso_data and vdso_per_cpu_data structures:
+ *
+ * NEVER USE THEM IN USERSPACE CODE DIRECTLY. The layout of the
+ * structure is supposed to be known only to the function in the vdso
+ * itself and may change without notice.
+ */
+
+struct vdso_data {
+        __u64 tb_update_count;          /* Timebase atomicity ctr       0x00 */
+        __u64 xtime_tod_stamp;          /* TOD clock for xtime          0x08 */
+        __u64 xtime_clock_sec;          /* Kernel time                  0x10 */
+        __u64 xtime_clock_nsec;         /*                              0x18 */
+        __u64 wtom_clock_sec;           /* Wall to monotonic clock      0x20 */
+        __u64 wtom_clock_nsec;          /*                              0x28 */
+        __u32 tz_minuteswest;           /* Minutes west of Greenwich    0x30 */
+        __u32 tz_dsttime;               /* Type of dst correction       0x34 */
+        __u32 ectg_available;
+};
+
+struct vdso_per_cpu_data {
+        __u64 ectg_timer_base;
+        __u64 ectg_user_time;
+};
+
+extern struct vdso_data *vdso_data;
+
+#ifdef CONFIG_64BIT
+int vdso_alloc_per_cpu(int cpu, struct _lowcore *lowcore);
+void vdso_free_per_cpu(int cpu, struct _lowcore *lowcore);
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* __S390_VDSO_H__ */
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 50f657e77344..3edc6c6f258b 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -2,6 +2,11 @@
 # Makefile for the linux kernel.
 #
 
+ifdef CONFIG_FUNCTION_TRACER
+# Do not trace early boot code
+CFLAGS_REMOVE_early.o = -pg
+endif
+
 #
 # Passing null pointers is ok for smp code, since we access the lowcore here.
 #
@@ -12,9 +17,10 @@ CFLAGS_smp.o	:= -Wno-nonnull
 #
 CFLAGS_ptrace.o         += -DUTS_MACHINE='"$(UTS_MACHINE)"'
 
-obj-y   :=  bitmap.o traps.o time.o process.o base.o early.o \
-            setup.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \
-            s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o
+obj-y   :=  bitmap.o traps.o time.o process.o base.o early.o setup.o \
+            processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \
+            s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o \
+            vdso.o vtime.o
 
 obj-y   += $(if $(CONFIG_64BIT),entry64.o,entry.o)
 obj-y   += $(if $(CONFIG_64BIT),reipl64.o,reipl.o)
@@ -30,12 +36,16 @@ obj-$(CONFIG_COMPAT)		+= compat_linux.o compat_signal.o \
                                         compat_wrapper.o compat_exec_domain.o \
                                         $(compat-obj-y)
 
-obj-$(CONFIG_VIRT_TIMER)        += vtime.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
+obj-$(CONFIG_FUNCTION_TRACER)   += mcount.o
 
 # Kexec part
 S390_KEXEC_OBJS := machine_kexec.o crash.o
 S390_KEXEC_OBJS += $(if $(CONFIG_64BIT),relocate_kernel64.o,relocate_kernel.o)
 obj-$(CONFIG_KEXEC) += $(S390_KEXEC_OBJS)
 
+# vdso
+obj-$(CONFIG_64BIT)             += vdso64/
+obj-$(CONFIG_32BIT)             += vdso32/
+obj-$(CONFIG_COMPAT)            += vdso32/
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 3d144e6020c6..67a60016babb 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -6,6 +6,7 @@
 
 #include <linux/sched.h>
 #include <linux/kbuild.h>
+#include <asm/vdso.h>
 
 int main(void)
 {
@@ -38,5 +39,24 @@ int main(void)
         DEFINE(__SF_BACKCHAIN, offsetof(struct stack_frame, back_chain));
         DEFINE(__SF_GPRS, offsetof(struct stack_frame, gprs));
         DEFINE(__SF_EMPTY, offsetof(struct stack_frame, empty1));
+        BLANK();
+        /* timeval/timezone offsets for use by vdso */
+        DEFINE(__VDSO_UPD_COUNT, offsetof(struct vdso_data, tb_update_count));
+        DEFINE(__VDSO_XTIME_STAMP, offsetof(struct vdso_data, xtime_tod_stamp));
+        DEFINE(__VDSO_XTIME_SEC, offsetof(struct vdso_data, xtime_clock_sec));
+        DEFINE(__VDSO_XTIME_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
+        DEFINE(__VDSO_WTOM_SEC, offsetof(struct vdso_data, wtom_clock_sec));
+        DEFINE(__VDSO_WTOM_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
+        DEFINE(__VDSO_TIMEZONE, offsetof(struct vdso_data, tz_minuteswest));
+        DEFINE(__VDSO_ECTG_OK, offsetof(struct vdso_data, ectg_available));
+        DEFINE(__VDSO_ECTG_BASE,
+               offsetof(struct vdso_per_cpu_data, ectg_timer_base));
+        DEFINE(__VDSO_ECTG_USER,
+               offsetof(struct vdso_per_cpu_data, ectg_user_time));
+        /* constants used by the vdso */
+        DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
+        DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
+        DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
+
         return 0;
 }
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index 4646382af34f..6cc87d8c8682 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -148,9 +148,9 @@ asmlinkage long sys32_getresuid16(u16 __user *ruid, u16 __user *euid, u16 __user
 {
         int retval;
 
-        if (!(retval = put_user(high2lowuid(current->uid), ruid)) &&
-            !(retval = put_user(high2lowuid(current->euid), euid)))
-                retval = put_user(high2lowuid(current->suid), suid);
+        if (!(retval = put_user(high2lowuid(current->cred->uid), ruid)) &&
+            !(retval = put_user(high2lowuid(current->cred->euid), euid)))
+                retval = put_user(high2lowuid(current->cred->suid), suid);
 
         return retval;
 }
@@ -165,9 +165,9 @@ asmlinkage long sys32_getresgid16(u16 __user *rgid, u16 __user *egid, u16 __user
 {
         int retval;
 
-        if (!(retval = put_user(high2lowgid(current->gid), rgid)) &&
-            !(retval = put_user(high2lowgid(current->egid), egid)))
-                retval = put_user(high2lowgid(current->sgid), sgid);
+        if (!(retval = put_user(high2lowgid(current->cred->gid), rgid)) &&
+            !(retval = put_user(high2lowgid(current->cred->egid), egid)))
+                retval = put_user(high2lowgid(current->cred->sgid), sgid);
 
         return retval;
 }
@@ -217,20 +217,20 @@ asmlinkage long sys32_getgroups16(int gidsetsize, u16 __user *grouplist)
         if (gidsetsize < 0)
                 return -EINVAL;
 
-        get_group_info(current->group_info);
-        i = current->group_info->ngroups;
+        get_group_info(current->cred->group_info);
+        i = current->cred->group_info->ngroups;
         if (gidsetsize) {
                 if (i > gidsetsize) {
                         i = -EINVAL;
                         goto out;
                 }
-                if (groups16_to_user(grouplist, current->group_info)) {
+                if (groups16_to_user(grouplist, current->cred->group_info)) {
                         i = -EFAULT;
                         goto out;
                 }
         }
 out:
-        put_group_info(current->group_info);
+        put_group_info(current->cred->group_info);
         return i;
 }
 
@@ -261,22 +261,22 @@ asmlinkage long sys32_setgroups16(int gidsetsize, u16 __user *grouplist)
 
 asmlinkage long sys32_getuid16(void)
 {
-        return high2lowuid(current->uid);
+        return high2lowuid(current->cred->uid);
 }
 
 asmlinkage long sys32_geteuid16(void)
 {
-        return high2lowuid(current->euid);
+        return high2lowuid(current->cred->euid);
 }
 
 asmlinkage long sys32_getgid16(void)
 {
-        return high2lowgid(current->gid);
+        return high2lowgid(current->cred->gid);
 }
 
 asmlinkage long sys32_getegid16(void)
 {
-        return high2lowgid(current->egid);
+        return high2lowgid(current->cred->egid);
 }
 
 /*
diff --git a/arch/s390/kernel/cpcmd.c b/arch/s390/kernel/cpcmd.c
index d8c1131e0815..3e8b8816f309 100644
--- a/arch/s390/kernel/cpcmd.c
+++ b/arch/s390/kernel/cpcmd.c
@@ -7,6 +7,9 @@
  *               Christian Borntraeger (cborntra@de.ibm.com),
  */
 
+#define KMSG_COMPONENT "cpcmd"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/slab.h>
@@ -104,8 +107,8 @@ int cpcmd(const char *cmd, char *response, int rlen, int *response_code)
                         (((unsigned long)response + rlen) >> 31)) {
                 lowbuf = kmalloc(rlen, GFP_KERNEL | GFP_DMA);
                 if (!lowbuf) {
-                        printk(KERN_WARNING
-                                "cpcmd: could not allocate response buffer\n");
+                        pr_warning("The cpcmd kernel function failed to "
+                                   "allocate a response buffer\n");
                         return -ENOMEM;
                 }
                 spin_lock_irqsave(&cpcmd_lock, flags);
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index d80fcd4a7fe1..ba03fc0a3a56 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -10,6 +10,9 @@
  *    Bugreports to: <Linux390@de.ibm.com>
  */
 
+#define KMSG_COMPONENT "s390dbf"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/stddef.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
@@ -388,7 +391,7 @@ debug_info_copy(debug_info_t* in, int mode)
                 debug_info_free(rc);
         } while (1);
 
-        if(!rc || (mode == NO_AREAS))
+        if (mode == NO_AREAS)
                 goto out;
 
         for(i = 0; i < in->nr_areas; i++){
@@ -693,8 +696,8 @@ debug_info_t *debug_register_mode(const char *name, int pages_per_area,
         /* Since debugfs currently does not support uid/gid other than root, */
         /* we do not allow gid/uid != 0 until we get support for that. */
         if ((uid != 0) || (gid != 0))
-                printk(KERN_WARNING "debug: Warning - Currently only uid/gid "
-                       "= 0 are supported. Using root as owner now!");
+                pr_warning("Root becomes the owner of all s390dbf files "
+                           "in sysfs\n");
         if (!initialized)
                 BUG();
         mutex_lock(&debug_mutex);
@@ -709,7 +712,7 @@ debug_info_t *debug_register_mode(const char *name, int pages_per_area,
         debug_register_view(rc, &debug_pages_view);
 out:
         if (!rc){
-                printk(KERN_ERR "debug: debug_register failed for %s\n",name);
+                pr_err("Registering debug feature %s failed\n", name);
         }
         mutex_unlock(&debug_mutex);
         return rc;
@@ -763,8 +766,8 @@ debug_set_size(debug_info_t* id, int nr_areas, int pages_per_area)
         if(pages_per_area > 0){
                 new_areas = debug_areas_alloc(pages_per_area, nr_areas);
                 if(!new_areas) {
-                        printk(KERN_WARNING "debug: could not allocate memory "\
-                                         "for pagenumber: %i\n",pages_per_area);
+                        pr_info("Allocating memory for %i pages failed\n",
+                                pages_per_area);
                         rc = -ENOMEM;
                         goto out;
                 }
@@ -780,8 +783,7 @@ debug_set_size(debug_info_t* id, int nr_areas, int pages_per_area)
         memset(id->active_entries,0,sizeof(int)*id->nr_areas);
         memset(id->active_pages, 0, sizeof(int)*id->nr_areas);
         spin_unlock_irqrestore(&id->lock,flags);
-        printk(KERN_INFO "debug: %s: set new size (%i pages)\n"\
-                         ,id->name, pages_per_area);
+        pr_info("%s: set new size (%i pages)\n" ,id->name, pages_per_area);
 out:
         return rc;
 }
@@ -800,10 +802,9 @@ debug_set_level(debug_info_t* id, int new_level)
         spin_lock_irqsave(&id->lock,flags);
         if(new_level == DEBUG_OFF_LEVEL){
                 id->level = DEBUG_OFF_LEVEL;
-                printk(KERN_INFO "debug: %s: switched off\n",id->name);
+                pr_info("%s: switched off\n",id->name);
         } else if ((new_level > DEBUG_MAX_LEVEL) || (new_level < 0)) {
-                printk(KERN_INFO
-                        "debug: %s: level %i is out of range (%i - %i)\n",
+                pr_info("%s: level %i is out of range (%i - %i)\n",
                         id->name, new_level, 0, DEBUG_MAX_LEVEL);
         } else {
                 id->level = new_level;
@@ -1108,8 +1109,8 @@ debug_register_view(debug_info_t * id, struct debug_view *view)
         pde = debugfs_create_file(view->name, mode, id->debugfs_root_entry,
                                 id , &debug_file_ops);
         if (!pde){
-                printk(KERN_WARNING "debug: debugfs_create_file() failed!"\
-                        " Cannot register view %s/%s\n", id->name,view->name);
+                pr_err("Registering view %s/%s failed due to out of "
+                       "memory\n", id->name,view->name);
                 rc = -1;
                 goto out;
         }
@@ -1119,10 +1120,8 @@ debug_register_view(debug_info_t * id, struct debug_view *view)
                         break;
         }
         if (i == DEBUG_MAX_VIEWS) {
-                printk(KERN_WARNING "debug: cannot register view %s/%s\n",
-                        id->name,view->name);
-                printk(KERN_WARNING 
-                        "debug: maximum number of views reached (%i)!\n", i);
+                pr_err("Registering view %s/%s would exceed the maximum "
+                       "number of views %i\n", id->name, view->name, i);
                 debugfs_remove(pde);
                 rc = -1;
         } else {
@@ -1303,7 +1302,8 @@ debug_input_level_fn(debug_info_t * id, struct debug_view *view,
                 new_level = debug_get_uint(str);
         }
         if(new_level < 0) {
-                printk(KERN_INFO "debug: level `%s` is not valid\n", str);
+                pr_warning("%s is not a valid level for a debug "
+                           "feature\n", str);
                 rc = -EINVAL;
         } else {
                 debug_set_level(id, new_level);
@@ -1380,7 +1380,8 @@ debug_input_flush_fn(debug_info_t * id, struct debug_view *view,
                 goto out;
         }
 
-        printk(KERN_INFO "debug: area `%c` is not valid\n", input_buf[0]);
+        pr_info("Flushing debug data failed because %c is not a valid "
+                 "area\n", input_buf[0]);
 
 out:
         *offset += user_len;
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 198ea18a534d..1268aa2991bf 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -109,13 +109,6 @@ STACK_SIZE  = 1 << STACK_SHIFT
  *    R15 - kernel stack pointer
  */
 
-        .macro  STORE_TIMER lc_offset
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-        stpt    \lc_offset
-#endif
-        .endm
-
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         .macro  UPDATE_VTIME lc_from,lc_to,lc_sum
         lm      %r10,%r11,\lc_from
         sl      %r10,\lc_to
@@ -128,7 +121,6 @@ STACK_SIZE  = 1 << STACK_SHIFT
         al      %r10,BASED(.Lc_1)
 1:      stm     %r10,%r11,\lc_sum
         .endm
-#endif
 
         .macro  SAVE_ALL_BASE savearea
         stm     %r12,%r15,\savearea
@@ -198,7 +190,7 @@ STACK_SIZE  = 1 << STACK_SHIFT
         ni      \psworg+1,0xfd          # clear wait state bit
         .endif
         lm      %r0,%r15,SP_R0(%r15)    # load gprs 0-15 of user
-        STORE_TIMER __LC_EXIT_TIMER
+        stpt    __LC_EXIT_TIMER
         lpsw    \psworg                 # back to caller
         .endm
 
@@ -247,20 +239,18 @@ __critical_start:
 
         .globl  system_call
 system_call:
-        STORE_TIMER __LC_SYNC_ENTER_TIMER
+        stpt    __LC_SYNC_ENTER_TIMER
 sysc_saveall:
         SAVE_ALL_BASE __LC_SAVE_AREA
         SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
         CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
         lh      %r7,0x8a          # get svc number from lowcore
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
 sysc_vtime:
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
 sysc_stime:
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 sysc_update:
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
-#endif
 sysc_do_svc:
         l       %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         ltr     %r7,%r7                 # test for svc 0
@@ -436,7 +426,7 @@ ret_from_fork:
         basr    %r14,%r1
         TRACE_IRQS_ON
         stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
-        b       BASED(sysc_return)
+        b       BASED(sysc_tracenogo)
 
 #
 # kernel_execve function needs to deal with pt_regs that is not
@@ -490,20 +480,18 @@ pgm_check_handler:
  * we just ignore the PER event (FIXME: is there anything we have to do
  * for LPSW?).
  */
-        STORE_TIMER __LC_SYNC_ENTER_TIMER
+        stpt    __LC_SYNC_ENTER_TIMER
         SAVE_ALL_BASE __LC_SAVE_AREA
         tm      __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
         bnz     BASED(pgm_per)          # got per exception -> special case
         SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
         CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
         bz      BASED(pgm_no_vtime)
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 pgm_no_vtime:
-#endif
         l       %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         TRACE_IRQS_OFF
         l       %r3,__LC_PGM_ILC        # load program interruption code
@@ -536,14 +524,12 @@ pgm_per:
 pgm_per_std:
         SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
         CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
         bz      BASED(pgm_no_vtime2)
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 pgm_no_vtime2:
-#endif
         l       %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         TRACE_IRQS_OFF
         l       %r1,__TI_task(%r9)
@@ -565,11 +551,9 @@ pgm_no_vtime2:
 pgm_svcper:
         SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
         CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
-#endif
         lh      %r7,0x8a                # get svc number from lowcore
         l       %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         TRACE_IRQS_OFF
@@ -599,19 +583,17 @@ kernel_per:
 
         .globl io_int_handler
 io_int_handler:
-        STORE_TIMER __LC_ASYNC_ENTER_TIMER
         stck    __LC_INT_CLOCK
+        stpt    __LC_ASYNC_ENTER_TIMER
         SAVE_ALL_BASE __LC_SAVE_AREA+16
         SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
         CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
         bz      BASED(io_no_vtime)
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 io_no_vtime:
-#endif
         l       %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         TRACE_IRQS_OFF
         l       %r1,BASED(.Ldo_IRQ)     # load address of do_IRQ
@@ -741,19 +723,17 @@ io_notify_resume:
 
         .globl  ext_int_handler
 ext_int_handler:
-        STORE_TIMER __LC_ASYNC_ENTER_TIMER
         stck    __LC_INT_CLOCK
+        stpt    __LC_ASYNC_ENTER_TIMER
         SAVE_ALL_BASE __LC_SAVE_AREA+16
         SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
         CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
         bz      BASED(ext_no_vtime)
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 ext_no_vtime:
-#endif
         l       %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         TRACE_IRQS_OFF
         la      %r2,SP_PTREGS(%r15)     # address of register-save area
@@ -770,13 +750,13 @@ __critical_end:
 
         .globl mcck_int_handler
 mcck_int_handler:
+        stck    __LC_INT_CLOCK
         spt     __LC_CPU_TIMER_SAVE_AREA        # revalidate cpu timer
         lm      %r0,%r15,__LC_GPREGS_SAVE_AREA  # revalidate gprs
         SAVE_ALL_BASE __LC_SAVE_AREA+32
         la      %r12,__LC_MCK_OLD_PSW
         tm      __LC_MCCK_CODE,0x80     # system damage?
         bo      BASED(mcck_int_main)    # yes -> rest of mcck code invalid
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         mvc     __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
         mvc     __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
         tm      __LC_MCCK_CODE+5,0x02   # stored cpu timer value valid?
@@ -793,9 +773,7 @@ mcck_int_handler:
         la      %r14,__LC_LAST_UPDATE_TIMER
 0:      spt     0(%r14)
         mvc     __LC_ASYNC_ENTER_TIMER(8),0(%r14)
-1:
-#endif
-        tm      __LC_MCCK_CODE+2,0x09   # mwp + ia of old psw valid?
+1:      tm      __LC_MCCK_CODE+2,0x09   # mwp + ia of old psw valid?
         bno     BASED(mcck_int_main)    # no -> skip cleanup critical
         tm      __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
         bnz     BASED(mcck_int_main)    # from user -> load async stack
@@ -812,7 +790,6 @@ mcck_int_main:
         be      BASED(0f)
         l       %r15,__LC_PANIC_STACK   # load panic stack
 0:      CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      __LC_MCCK_CODE+2,0x08   # mwp of old psw valid?
         bno     BASED(mcck_no_vtime)    # no -> skip cleanup critical
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
@@ -821,7 +798,6 @@ mcck_int_main:
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 mcck_no_vtime:
-#endif
         l       %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         la      %r2,SP_PTREGS(%r15)     # load pt_regs
         l       %r1,BASED(.Ls390_mcck)
@@ -843,16 +819,13 @@ mcck_no_vtime:
 mcck_return:
         mvc     __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
         ni      __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         mvc     __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
         tm      __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
         bno     BASED(0f)
         lm      %r0,%r15,SP_R0(%r15)    # load gprs 0-15
         stpt    __LC_EXIT_TIMER
         lpsw    __LC_RETURN_MCCK_PSW    # back to caller
-0:
-#endif
-        lm      %r0,%r15,SP_R0(%r15)    # load gprs 0-15
+0:      lm      %r0,%r15,SP_R0(%r15)    # load gprs 0-15
         lpsw    __LC_RETURN_MCCK_PSW    # back to caller
 
         RESTORE_ALL __LC_RETURN_MCCK_PSW,0
@@ -976,13 +949,11 @@ cleanup_system_call:
         b       BASED(1f)
 0:      la      %r12,__LC_SAVE_AREA+32
 1:
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         clc     __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
         bh      BASED(0f)
         mvc     __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
 0:      clc     __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
         bhe     BASED(cleanup_vtime)
-#endif
         clc     __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
         bh      BASED(0f)
         mvc     __LC_SAVE_AREA(16),0(%r12)
@@ -993,7 +964,6 @@ cleanup_system_call:
         l       %r12,__LC_SAVE_AREA+48  # argh
         st      %r15,12(%r12)
         lh      %r7,0x8a
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
 cleanup_vtime:
         clc     __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
         bhe     BASED(cleanup_stime)
@@ -1004,18 +974,15 @@ cleanup_stime:
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 cleanup_update:
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
-#endif
         mvc     __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
         la      %r12,__LC_RETURN_PSW
         br      %r14
 cleanup_system_call_insn:
         .long   sysc_saveall + 0x80000000
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         .long   system_call + 0x80000000
         .long   sysc_vtime + 0x80000000
         .long   sysc_stime + 0x80000000
         .long   sysc_update + 0x80000000
-#endif
 
 cleanup_sysc_return:
         mvc     __LC_RETURN_PSW(4),0(%r12)
@@ -1026,11 +993,9 @@ cleanup_sysc_return:
 cleanup_sysc_leave:
         clc     4(4,%r12),BASED(cleanup_sysc_leave_insn)
         be      BASED(2f)
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         mvc     __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
         clc     4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
         be      BASED(2f)
-#endif
         mvc     __LC_RETURN_PSW(8),SP_PSW(%r15)
         c       %r12,BASED(.Lmck_old_psw)
         bne     BASED(0f)
@@ -1043,9 +1008,7 @@ cleanup_sysc_leave:
         br      %r14
 cleanup_sysc_leave_insn:
         .long   sysc_done - 4 + 0x80000000
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         .long   sysc_done - 8 + 0x80000000
-#endif
 
 cleanup_io_return:
         mvc     __LC_RETURN_PSW(4),0(%r12)
@@ -1056,11 +1019,9 @@ cleanup_io_return:
 cleanup_io_leave:
         clc     4(4,%r12),BASED(cleanup_io_leave_insn)
         be      BASED(2f)
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         mvc     __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
         clc     4(4,%r12),BASED(cleanup_io_leave_insn+4)
         be      BASED(2f)
-#endif
         mvc     __LC_RETURN_PSW(8),SP_PSW(%r15)
         c       %r12,BASED(.Lmck_old_psw)
         bne     BASED(0f)
@@ -1073,9 +1034,7 @@ cleanup_io_leave:
         br      %r14
 cleanup_io_leave_insn:
         .long   io_done - 4 + 0x80000000
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         .long   io_done - 8 + 0x80000000
-#endif
 
 /*
  * Integer constants
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 89c121ae6339..c6fbde13971a 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -96,20 +96,12 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
 #define LOCKDEP_SYS_EXIT
 #endif
 
-        .macro  STORE_TIMER lc_offset
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-        stpt    \lc_offset
-#endif
-        .endm
-
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         .macro  UPDATE_VTIME lc_from,lc_to,lc_sum
         lg      %r10,\lc_from
         slg     %r10,\lc_to
         alg     %r10,\lc_sum
         stg     %r10,\lc_sum
         .endm
-#endif
 
 /*
  * Register usage in interrupt handlers:
@@ -185,8 +177,11 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
         .if !\sync
         ni      \psworg+1,0xfd          # clear wait state bit
         .endif
-        lmg     %r0,%r15,SP_R0(%r15)    # load gprs 0-15 of user
-        STORE_TIMER __LC_EXIT_TIMER
+        lg      %r14,__LC_VDSO_PER_CPU
+        lmg     %r0,%r13,SP_R0(%r15)    # load gprs 0-13 of user
+        stpt    __LC_EXIT_TIMER
+        mvc     __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
+        lmg     %r14,%r15,SP_R14(%r15)  # load grps 14-15 of user
         lpswe   \psworg                 # back to caller
         .endm
 
@@ -233,20 +228,18 @@ __critical_start:
 
         .globl  system_call
 system_call:
-        STORE_TIMER __LC_SYNC_ENTER_TIMER
+        stpt    __LC_SYNC_ENTER_TIMER
 sysc_saveall:
         SAVE_ALL_BASE __LC_SAVE_AREA
         SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
         CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
         llgh    %r7,__LC_SVC_INT_CODE   # get svc number from lowcore
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
 sysc_vtime:
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
 sysc_stime:
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 sysc_update:
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
-#endif
 sysc_do_svc:
         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         ltgr    %r7,%r7         # test for svc 0
@@ -417,7 +410,7 @@ ret_from_fork:
 0:      brasl   %r14,schedule_tail
         TRACE_IRQS_ON
         stosm   24(%r15),0x03           # reenable interrupts
-        j       sysc_return
+        j       sysc_tracenogo
 
 #
 # kernel_execve function needs to deal with pt_regs that is not
@@ -469,20 +462,18 @@ pgm_check_handler:
  * we just ignore the PER event (FIXME: is there anything we have to do
  * for LPSW?).
  */
-        STORE_TIMER __LC_SYNC_ENTER_TIMER
+        stpt    __LC_SYNC_ENTER_TIMER
         SAVE_ALL_BASE __LC_SAVE_AREA
         tm      __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
         jnz     pgm_per                  # got per exception -> special case
         SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
         CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
         jz      pgm_no_vtime
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 pgm_no_vtime:
-#endif
         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         mvc     SP_ARGS(8,%r15),__LC_LAST_BREAK
         TRACE_IRQS_OFF
@@ -516,14 +507,12 @@ pgm_per:
 pgm_per_std:
         SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
         CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
         jz      pgm_no_vtime2
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 pgm_no_vtime2:
-#endif
         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         TRACE_IRQS_OFF
         lg      %r1,__TI_task(%r9)
@@ -545,11 +534,9 @@ pgm_no_vtime2:
 pgm_svcper:
         SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
         CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
-#endif
         llgh    %r7,__LC_SVC_INT_CODE   # get svc number from lowcore
         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         lg      %r1,__TI_task(%r9)
@@ -575,19 +562,17 @@ kernel_per:
  */
         .globl io_int_handler
 io_int_handler:
-        STORE_TIMER __LC_ASYNC_ENTER_TIMER
         stck    __LC_INT_CLOCK
+        stpt    __LC_ASYNC_ENTER_TIMER
         SAVE_ALL_BASE __LC_SAVE_AREA+32
         SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
         CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
         jz      io_no_vtime
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 io_no_vtime:
-#endif
         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         TRACE_IRQS_OFF
         la      %r2,SP_PTREGS(%r15)     # address of register-save area
@@ -739,19 +724,17 @@ io_notify_resume:
  */
         .globl  ext_int_handler
 ext_int_handler:
-        STORE_TIMER __LC_ASYNC_ENTER_TIMER
         stck    __LC_INT_CLOCK
+        stpt    __LC_ASYNC_ENTER_TIMER
         SAVE_ALL_BASE __LC_SAVE_AREA+32
         SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
         CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
         jz      ext_no_vtime
         UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 ext_no_vtime:
-#endif
         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         TRACE_IRQS_OFF
         la      %r2,SP_PTREGS(%r15)     # address of register-save area
@@ -766,6 +749,7 @@ __critical_end:
  */
         .globl mcck_int_handler
 mcck_int_handler:
+        stck    __LC_INT_CLOCK
         la      %r1,4095                # revalidate r1
         spt     __LC_CPU_TIMER_SAVE_AREA-4095(%r1)      # revalidate cpu timer
         lmg     %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
@@ -773,7 +757,6 @@ mcck_int_handler:
         la      %r12,__LC_MCK_OLD_PSW
         tm      __LC_MCCK_CODE,0x80     # system damage?
         jo      mcck_int_main           # yes -> rest of mcck code invalid
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         la      %r14,4095
         mvc     __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
         mvc     __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
@@ -791,9 +774,7 @@ mcck_int_handler:
         la      %r14,__LC_LAST_UPDATE_TIMER
 0:      spt     0(%r14)
         mvc     __LC_ASYNC_ENTER_TIMER(8),0(%r14)
-1:
-#endif
-        tm      __LC_MCCK_CODE+2,0x09   # mwp + ia of old psw valid?
+1:      tm      __LC_MCCK_CODE+2,0x09   # mwp + ia of old psw valid?
         jno     mcck_int_main           # no -> skip cleanup critical
         tm      __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
         jnz     mcck_int_main           # from user -> load kernel stack
@@ -809,7 +790,6 @@ mcck_int_main:
         jz      0f
         lg      %r15,__LC_PANIC_STACK   # load panic stack
 0:      CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         tm      __LC_MCCK_CODE+2,0x08   # mwp of old psw valid?
         jno     mcck_no_vtime           # no -> no timer update
         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
@@ -818,7 +798,6 @@ mcck_int_main:
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 mcck_no_vtime:
-#endif
         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
         la      %r2,SP_PTREGS(%r15)     # load pt_regs
         brasl   %r14,s390_do_machine_check
@@ -839,14 +818,11 @@ mcck_return:
         mvc     __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
         ni      __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
         lmg     %r0,%r15,SP_R0(%r15)    # load gprs 0-15
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         mvc     __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
         tm      __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
         jno     0f
         stpt    __LC_EXIT_TIMER
-0:
-#endif
-        lpswe   __LC_RETURN_MCCK_PSW    # back to caller
+0:      lpswe   __LC_RETURN_MCCK_PSW    # back to caller
 
 /*
  * Restart interruption handler, kick starter for additional CPUs
@@ -964,13 +940,11 @@ cleanup_system_call:
         j       1f
 0:      la      %r12,__LC_SAVE_AREA+64
 1:
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
         jh      0f
         mvc     __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
 0:      clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
         jhe     cleanup_vtime
-#endif
         clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
         jh      0f
         mvc     __LC_SAVE_AREA(32),0(%r12)
@@ -981,7 +955,6 @@ cleanup_system_call:
         lg      %r12,__LC_SAVE_AREA+96  # argh
         stg     %r15,24(%r12)
         llgh    %r7,__LC_SVC_INT_CODE
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
 cleanup_vtime:
         clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
         jhe     cleanup_stime
@@ -992,18 +965,15 @@ cleanup_stime:
         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 cleanup_update:
         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
-#endif
         mvc     __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
         la      %r12,__LC_RETURN_PSW
         br      %r14
 cleanup_system_call_insn:
         .quad   sysc_saveall
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
         .quad   system_call
         .quad   sysc_vtime
         .quad   sysc_stime
         .quad   sysc_update
-#endif
 
 cleanup_sysc_return:
         mvc     __LC_RETURN_PSW(8),0(%r12)
@@ -1013,27 +983,23 @@ cleanup_sysc_return:
 
 cleanup_sysc_leave:
         clc     8(8,%r12),BASED(cleanup_sysc_leave_insn)
-        je      2f
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-        mvc     __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
+        je      3f
         clc     8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
-        je      2f
-#endif
-        mvc     __LC_RETURN_PSW(16),SP_PSW(%r15)
+        jhe     0f
+        mvc     __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
+0:      mvc     __LC_RETURN_PSW(16),SP_PSW(%r15)
         cghi    %r12,__LC_MCK_OLD_PSW
-        jne     0f
+        jne     1f
         mvc     __LC_SAVE_AREA+64(32),SP_R12(%r15)
-        j       1f
-0:      mvc     __LC_SAVE_AREA+32(32),SP_R12(%r15)
-1:      lmg     %r0,%r11,SP_R0(%r15)
+        j       2f
+1:      mvc     __LC_SAVE_AREA+32(32),SP_R12(%r15)
+2:      lmg     %r0,%r11,SP_R0(%r15)
         lg      %r15,SP_R15(%r15)
-2:      la      %r12,__LC_RETURN_PSW
+3:      la      %r12,__LC_RETURN_PSW
         br      %r14
 cleanup_sysc_leave_insn:
         .quad   sysc_done - 4
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-        .quad   sysc_done - 8
-#endif
+        .quad   sysc_done - 16
 
 cleanup_io_return:
         mvc     __LC_RETURN_PSW(8),0(%r12)
@@ -1043,27 +1009,23 @@ cleanup_io_return:
 
 cleanup_io_leave:
         clc     8(8,%r12),BASED(cleanup_io_leave_insn)
-        je      2f
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-        mvc     __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
+        je      3f
         clc     8(8,%r12),BASED(cleanup_io_leave_insn+8)
-        je      2f
-#endif
-        mvc     __LC_RETURN_PSW(16),SP_PSW(%r15)
+        jhe     0f
+        mvc     __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
+0:      mvc     __LC_RETURN_PSW(16),SP_PSW(%r15)
         cghi    %r12,__LC_MCK_OLD_PSW
-        jne     0f
+        jne     1f
         mvc     __LC_SAVE_AREA+64(32),SP_R12(%r15)
-        j       1f
-0:      mvc     __LC_SAVE_AREA+32(32),SP_R12(%r15)
-1:      lmg     %r0,%r11,SP_R0(%r15)
+        j       2f
+1:      mvc     __LC_SAVE_AREA+32(32),SP_R12(%r15)
+2:      lmg     %r0,%r11,SP_R0(%r15)
         lg      %r15,SP_R15(%r15)
-2:      la      %r12,__LC_RETURN_PSW
+3:      la      %r12,__LC_RETURN_PSW
         br      %r14
 cleanup_io_leave_insn:
         .quad   io_done - 4
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-        .quad   io_done - 8
-#endif
+        .quad   io_done - 16
 
 /*
  * Integer constants
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 83477c7dc743..ec7e35f6055b 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -461,6 +461,55 @@ start:
         .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
         .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
 
+#
+# startup-code at 0x10000, running in absolute addressing mode
+# this is called either by the ipl loader or directly by PSW restart
+# or linload or SALIPL
+#
+        .org    0x10000
+startup:basr    %r13,0                  # get base
+.LPG0:
+
+#ifndef CONFIG_MARCH_G5
+        # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
+        stidp   __LC_CPUID              # store cpuid
+        lhi     %r0,(3f-2f) / 2
+        la      %r1,2f-.LPG0(%r13)
+0:      clc     __LC_CPUID+4(2),0(%r1)
+        jne     3f
+        lpsw    1f-.LPG0(13)            # machine type not good enough, crash
+        .align 16
+1:      .long   0x000a0000,0x00000000
+2:
+#if defined(CONFIG_MARCH_Z10)
+        .short 0x9672, 0x2064, 0x2066, 0x2084, 0x2086, 0x2094, 0x2096
+#elif defined(CONFIG_MARCH_Z9_109)
+        .short 0x9672, 0x2064, 0x2066, 0x2084, 0x2086
+#elif defined(CONFIG_MARCH_Z990)
+        .short 0x9672, 0x2064, 0x2066
+#elif defined(CONFIG_MARCH_Z900)
+        .short 0x9672
+#endif
+3:      la      %r1,2(%r1)
+        brct    %r0,0b
+#endif
+
+        l       %r13,0f-.LPG0(%r13)
+        b       0(%r13)
+0:      .long   startup_continue
+
+#
+# params at 10400 (setup.h)
+#
+        .org    PARMAREA
+        .long   0,0                     # IPL_DEVICE
+        .long   0,0                     # INITRD_START
+        .long   0,0                     # INITRD_SIZE
+
+        .org    COMMAND_LINE
+        .byte   "root=/dev/ram0 ro"
+        .byte   0
+
 #ifdef CONFIG_64BIT
 #include "head64.S"
 #else
diff --git a/arch/s390/kernel/head31.S b/arch/s390/kernel/head31.S
index a816e2de32b9..db476d114caa 100644
--- a/arch/s390/kernel/head31.S
+++ b/arch/s390/kernel/head31.S
@@ -10,34 +10,13 @@
  *
  */
 
-#
-# startup-code at 0x10000, running in absolute addressing mode
-# this is called either by the ipl loader or directly by PSW restart
-# or linload or SALIPL
-#
-        .org    0x10000
-startup:basr    %r13,0                  # get base
-.LPG0:  l       %r13,0f-.LPG0(%r13)
-        b       0(%r13)
-0:      .long   startup_continue
-
-#
-# params at 10400 (setup.h)
-#
-        .org    PARMAREA
-        .long   0,0                     # IPL_DEVICE
-        .long   0,0                     # INITRD_START
-        .long   0,0                     # INITRD_SIZE
-
-        .org    COMMAND_LINE
-        .byte   "root=/dev/ram0 ro"
-        .byte   0
-
         .org    0x11000
 
 startup_continue:
         basr    %r13,0                  # get base
-.LPG1:  mvi     __LC_AR_MODE_ID,0       # set ESA flag (mode 0)
+.LPG1:
+
+        mvi     __LC_AR_MODE_ID,0       # set ESA flag (mode 0)
         lctl    %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
         l       %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
                                         # move IPL device to lowcore
@@ -50,7 +29,6 @@ startup_continue:
         ahi     %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
         st      %r15,__LC_KERNEL_STACK  # set end of kernel stack
         ahi     %r15,-96
-        xc      __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
 #
 # Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
 # and create a kernel NSS if the SAVESYS= parm is defined
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 1d06961e87b3..f9f70aa15244 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -10,29 +10,6 @@
  *
  */
 
-#
-# startup-code at 0x10000, running in absolute addressing mode
-# this is called either by the ipl loader or directly by PSW restart
-# or linload or SALIPL
-#
-        .org    0x10000
-startup:basr    %r13,0                  # get base
-.LPG0:  l       %r13,0f-.LPG0(%r13)
-        b       0(%r13)
-0:      .long   startup_continue
-
-#
-# params at 10400 (setup.h)
-#
-        .org    PARMAREA
-        .quad   0                       # IPL_DEVICE
-        .quad   0                       # INITRD_START
-        .quad   0                       # INITRD_SIZE
-
-        .org    COMMAND_LINE
-        .byte   "root=/dev/ram0 ro"
-        .byte   0
-
         .org    0x11000
 
 startup_continue:
@@ -110,6 +87,8 @@ startup_continue:
         lg      %r12,.Lparmaddr-.LPG1(%r13)     # pointer to parameter area
                                         # move IPL device to lowcore
         mvc     __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12)
+        lghi    %r0,__LC_PASTE
+        stg     %r0,__LC_VDSO_PER_CPU
 #
 # Setup stack
 #
@@ -119,7 +98,6 @@ startup_continue:
         aghi    %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
         stg     %r15,__LC_KERNEL_STACK  # set end of kernel stack
         aghi    %r15,-160
-        xc      __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
 #
 # Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
 # and create a kernel NSS if the SAVESYS= parm is defined
diff --git a/arch/s390/kernel/init_task.c b/arch/s390/kernel/init_task.c
index e80716843619..7db95c0b8693 100644
--- a/arch/s390/kernel/init_task.c
+++ b/arch/s390/kernel/init_task.c
@@ -16,7 +16,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/s390/kernel/kprobes.c b/arch/s390/kernel/kprobes.c
index 569079ec4ff0..9b92856632cf 100644
--- a/arch/s390/kernel/kprobes.c
+++ b/arch/s390/kernel/kprobes.c
@@ -218,9 +218,10 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
 
 void __kprobes arch_remove_kprobe(struct kprobe *p)
 {
-        mutex_lock(&kprobe_mutex);
-        free_insn_slot(p->ainsn.insn, 0);
-        mutex_unlock(&kprobe_mutex);
+        if (p->ainsn.insn) {
+                free_insn_slot(p->ainsn.insn, 0);
+                p->ainsn.insn = NULL;
+        }
 }
 
 static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
diff --git a/arch/s390/kernel/mcount.S b/arch/s390/kernel/mcount.S
new file mode 100644
index 000000000000..397d131a345f
--- /dev/null
+++ b/arch/s390/kernel/mcount.S
@@ -0,0 +1,56 @@
+/*
+ * Copyright IBM Corp. 2008
+ *
+ *   Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>,
+ *
+ */
+
+#ifndef CONFIG_64BIT
+.globl _mcount
+_mcount:
+        stm     %r0,%r5,8(%r15)
+        st      %r14,56(%r15)
+        lr      %r1,%r15
+        ahi     %r15,-96
+        l       %r3,100(%r15)
+        la      %r2,0(%r14)
+        st      %r1,0(%r15)
+        la      %r3,0(%r3)
+        bras    %r14,0f
+        .long   ftrace_trace_function
+0:      l       %r14,0(%r14)
+        l       %r14,0(%r14)
+        basr    %r14,%r14
+        ahi     %r15,96
+        lm      %r0,%r5,8(%r15)
+        l       %r14,56(%r15)
+        br      %r14
+
+.globl ftrace_stub
+ftrace_stub:
+        br      %r14
+
+#else /* CONFIG_64BIT */
+
+.globl _mcount
+_mcount:
+        stmg    %r0,%r5,16(%r15)
+        stg     %r14,112(%r15)
+        lgr     %r1,%r15
+        aghi    %r15,-160
+        stg     %r1,0(%r15)
+        lgr     %r2,%r14
+        lg      %r3,168(%r15)
+        larl    %r14,ftrace_trace_function
+        lg      %r14,0(%r14)
+        basr    %r14,%r14
+        aghi    %r15,160
+        lmg     %r0,%r5,16(%r15)
+        lg      %r14,112(%r15)
+        br      %r14
+
+.globl ftrace_stub
+ftrace_stub:
+        br      %r14
+
+#endif /* CONFIG_64BIT */
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 04f8c67a6101..b6110bdf8dc2 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -38,6 +38,7 @@
 #include <linux/utsname.h>
 #include <linux/tick.h>
 #include <linux/elfcore.h>
+#include <linux/kernel_stat.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -45,7 +46,6 @@
 #include <asm/processor.h>
 #include <asm/irq.h>
 #include <asm/timer.h>
-#include <asm/cpu.h>
 #include "entry.h"
 
 asmlinkage void ret_from_fork(void) asm ("ret_from_fork");
@@ -75,36 +75,6 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
         return sf->gprs[8];
 }
 
-DEFINE_PER_CPU(struct s390_idle_data, s390_idle) = {
-        .lock = __SPIN_LOCK_UNLOCKED(s390_idle.lock)
-};
-
-static int s390_idle_enter(void)
-{
-        struct s390_idle_data *idle;
-
-        idle = &__get_cpu_var(s390_idle);
-        spin_lock(&idle->lock);
-        idle->idle_count++;
-        idle->in_idle = 1;
-        idle->idle_enter = get_clock();
-        spin_unlock(&idle->lock);
-        vtime_stop_cpu_timer();
-        return NOTIFY_OK;
-}
-
-void s390_idle_leave(void)
-{
-        struct s390_idle_data *idle;
-
-        vtime_start_cpu_timer();
-        idle = &__get_cpu_var(s390_idle);
-        spin_lock(&idle->lock);
-        idle->idle_time += get_clock() - idle->idle_enter;
-        idle->in_idle = 0;
-        spin_unlock(&idle->lock);
-}
-
 extern void s390_handle_mcck(void);
 /*
  * The idle loop on a S390...
@@ -117,10 +87,6 @@ static void default_idle(void)
                 local_irq_enable();
                 return;
         }
-        if (s390_idle_enter() == NOTIFY_BAD) {
-                local_irq_enable();
-                return;
-        }
 #ifdef CONFIG_HOTPLUG_CPU
         if (cpu_is_offline(smp_processor_id())) {
                 preempt_enable_no_resched();
@@ -130,7 +96,6 @@ static void default_idle(void)
         local_mcck_disable();
         if (test_thread_flag(TIF_MCCK_PENDING)) {
                 local_mcck_enable();
-                s390_idle_leave();
                 local_irq_enable();
                 s390_handle_mcck();
                 return;
@@ -138,9 +103,9 @@ static void default_idle(void)
         trace_hardirqs_on();
         /* Don't trace preempt off for idle. */
         stop_critical_timings();
-        /* Wait for external, I/O or machine check interrupt. */
-        __load_psw_mask(psw_kernel_bits | PSW_MASK_WAIT |
-                        PSW_MASK_IO | PSW_MASK_EXT);
+        /* Stop virtual timer and halt the cpu. */
+        vtime_stop_cpu();
+        /* Reenable preemption tracer. */
         start_critical_timings();
 }
 
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
new file mode 100644
index 000000000000..82c1872cfe80
--- /dev/null
+++ b/arch/s390/kernel/processor.c
@@ -0,0 +1,98 @@
+/*
+ *  arch/s390/kernel/processor.c
+ *
+ *  Copyright IBM Corp. 2008
+ *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ */
+
+#define KMSG_COMPONENT "cpu"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/seq_file.h>
+#include <linux/delay.h>
+
+#include <asm/elf.h>
+#include <asm/lowcore.h>
+#include <asm/param.h>
+
+void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
+{
+        pr_info("Processor %d started, address %d, identification %06X\n",
+                cpuinfo->cpu_nr, cpuinfo->cpu_addr, cpuinfo->cpu_id.ident);
+}
+
+/*
+ * show_cpuinfo - Get information on one CPU for use by procfs.
+ */
+
+static int show_cpuinfo(struct seq_file *m, void *v)
+{
+        static const char *hwcap_str[8] = {
+                "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp",
+                "edat"
+        };
+       struct cpuinfo_S390 *cpuinfo;
+       unsigned long n = (unsigned long) v - 1;
+       int i;
+
+       s390_adjust_jiffies();
+       preempt_disable();
+       if (!n) {
+               seq_printf(m, "vendor_id       : IBM/S390\n"
+                          "# processors    : %i\n"
+                          "bogomips per cpu: %lu.%02lu\n",
+                          num_online_cpus(), loops_per_jiffy/(500000/HZ),
+                          (loops_per_jiffy/(5000/HZ))%100);
+               seq_puts(m, "features\t: ");
+               for (i = 0; i < 8; i++)
+                       if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
+                               seq_printf(m, "%s ", hwcap_str[i]);
+               seq_puts(m, "\n");
+       }
+
+       if (cpu_online(n)) {
+#ifdef CONFIG_SMP
+               if (smp_processor_id() == n)
+                       cpuinfo = &S390_lowcore.cpu_data;
+               else
+                       cpuinfo = &lowcore_ptr[n]->cpu_data;
+#else
+               cpuinfo = &S390_lowcore.cpu_data;
+#endif
+               seq_printf(m, "processor %li: "
+                          "version = %02X,  "
+                          "identification = %06X,  "
+                          "machine = %04X\n",
+                          n, cpuinfo->cpu_id.version,
+                          cpuinfo->cpu_id.ident,
+                          cpuinfo->cpu_id.machine);
+       }
+       preempt_enable();
+       return 0;
+}
+
+static void *c_start(struct seq_file *m, loff_t *pos)
+{
+        return *pos < NR_CPUS ? (void *)((unsigned long) *pos + 1) : NULL;
+}
+
+static void *c_next(struct seq_file *m, void *v, loff_t *pos)
+{
+        ++*pos;
+        return c_start(m, pos);
+}
+
+static void c_stop(struct seq_file *m, void *v)
+{
+}
+
+const struct seq_operations cpuinfo_op = {
+        .start  = c_start,
+        .next   = c_next,
+        .stop   = c_stop,
+        .show   = show_cpuinfo,
+};
+
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 38ff2bce1203..75c496f4f16d 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -204,7 +204,6 @@ static unsigned long __peek_user(struct task_struct *child, addr_t addr)
 static int
 peek_user(struct task_struct *child, addr_t addr, addr_t data)
 {
-        struct user *dummy = NULL;
         addr_t tmp, mask;
 
         /*
@@ -213,8 +212,8 @@ peek_user(struct task_struct *child, addr_t addr, addr_t data)
          */
         mask = __ADDR_MASK;
 #ifdef CONFIG_64BIT
-        if (addr >= (addr_t) &dummy->regs.acrs &&
-            addr < (addr_t) &dummy->regs.orig_gpr2)
+        if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs &&
+            addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2)
                 mask = 3;
 #endif
         if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK)
@@ -312,7 +311,6 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
 static int
 poke_user(struct task_struct *child, addr_t addr, addr_t data)
 {
-        struct user *dummy = NULL;
         addr_t mask;
 
         /*
@@ -321,8 +319,8 @@ poke_user(struct task_struct *child, addr_t addr, addr_t data)
          */
         mask = __ADDR_MASK;
 #ifdef CONFIG_64BIT
-        if (addr >= (addr_t) &dummy->regs.acrs &&
-            addr < (addr_t) &dummy->regs.orig_gpr2)
+        if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs &&
+            addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2)
                 mask = 3;
 #endif
         if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK)
diff --git a/arch/s390/kernel/s390_ext.c b/arch/s390/kernel/s390_ext.c
index e019b419efc6..a0d2d55d7fb3 100644
--- a/arch/s390/kernel/s390_ext.c
+++ b/arch/s390/kernel/s390_ext.c
@@ -119,8 +119,8 @@ void do_extint(struct pt_regs *regs, unsigned short code)
         struct pt_regs *old_regs;
 
         old_regs = set_irq_regs(regs);
-        irq_enter();
         s390_idle_check();
+        irq_enter();
         if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
                 /* Serve timer interrupts first. */
                 clock_comparator_work();
diff --git a/arch/s390/kernel/s390_ksyms.c b/arch/s390/kernel/s390_ksyms.c
index 48238a114ce9..46b90cb03707 100644
--- a/arch/s390/kernel/s390_ksyms.c
+++ b/arch/s390/kernel/s390_ksyms.c
@@ -14,6 +14,7 @@
 #include <asm/delay.h>
 #include <asm/pgalloc.h>
 #include <asm/setup.h>
+#include <asm/ftrace.h>
 #ifdef CONFIG_IP_MULTICAST
 #include <net/arp.h>
 #endif
@@ -43,3 +44,7 @@ EXPORT_SYMBOL(csum_fold);
 EXPORT_SYMBOL(console_mode);
 EXPORT_SYMBOL(console_devno);
 EXPORT_SYMBOL(console_irq);
+
+#ifdef CONFIG_FUNCTION_TRACER
+EXPORT_SYMBOL(_mcount);
+#endif
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 400b040df7fa..d825f4950e4e 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -14,6 +14,9 @@
  * This file handles the architecture-dependent parts of initialization
  */
 
+#define KMSG_COMPONENT "setup"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/errno.h>
 #include <linux/module.h>
 #include <linux/sched.h>
@@ -32,7 +35,6 @@
 #include <linux/bootmem.h>
 #include <linux/root_dev.h>
 #include <linux/console.h>
-#include <linux/seq_file.h>
 #include <linux/kernel_stat.h>
 #include <linux/device.h>
 #include <linux/notifier.h>
@@ -291,8 +293,8 @@ unsigned int switch_amode = 0;
 #endif
 EXPORT_SYMBOL_GPL(switch_amode);
 
-static void set_amode_and_uaccess(unsigned long user_amode,
-                                  unsigned long user32_amode)
+static int set_amode_and_uaccess(unsigned long user_amode,
+                                 unsigned long user32_amode)
 {
         psw_user_bits = PSW_BASE_BITS | PSW_MASK_DAT | user_amode |
                         PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK |
@@ -309,11 +311,11 @@ static void set_amode_and_uaccess(unsigned long user_amode,
                           PSW_MASK_MCHECK | PSW_DEFAULT_KEY;
 
         if (MACHINE_HAS_MVCOS) {
-                printk("mvcos available.\n");
                 memcpy(&uaccess, &uaccess_mvcos_switch, sizeof(uaccess));
+                return 1;
         } else {
-                printk("mvcos not available.\n");
                 memcpy(&uaccess, &uaccess_pt, sizeof(uaccess));
+                return 0;
         }
 }
 
@@ -328,9 +330,10 @@ static int __init early_parse_switch_amode(char *p)
 early_param("switch_amode", early_parse_switch_amode);
 
 #else /* CONFIG_S390_SWITCH_AMODE */
-static inline void set_amode_and_uaccess(unsigned long user_amode,
-                                         unsigned long user32_amode)
+static inline int set_amode_and_uaccess(unsigned long user_amode,
+                                        unsigned long user32_amode)
 {
+        return 0;
 }
 #endif /* CONFIG_S390_SWITCH_AMODE */
 
@@ -355,11 +358,20 @@ early_param("noexec", early_parse_noexec);
 static void setup_addressing_mode(void)
 {
         if (s390_noexec) {
-                printk("S390 execute protection active, ");
-                set_amode_and_uaccess(PSW_ASC_SECONDARY, PSW32_ASC_SECONDARY);
+                if (set_amode_and_uaccess(PSW_ASC_SECONDARY,
+                                          PSW32_ASC_SECONDARY))
+                        pr_info("Execute protection active, "
+                                "mvcos available\n");
+                else
+                        pr_info("Execute protection active, "
+                                "mvcos not available\n");
         } else if (switch_amode) {
-                printk("S390 address spaces switched, ");
-                set_amode_and_uaccess(PSW_ASC_PRIMARY, PSW32_ASC_PRIMARY);
+                if (set_amode_and_uaccess(PSW_ASC_PRIMARY, PSW32_ASC_PRIMARY))
+                        pr_info("Address spaces switched, "
+                                "mvcos available\n");
+                else
+                        pr_info("Address spaces switched, "
+                                "mvcos not available\n");
         }
 #ifdef CONFIG_TRACE_IRQFLAGS
         sysc_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK;
@@ -415,6 +427,8 @@ setup_lowcore(void)
                 /* enable extended save area */
                 __ctl_set_bit(14, 29);
         }
+#else
+        lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0];
 #endif
         set_prefix((u32)(unsigned long) lc);
 }
@@ -572,15 +586,15 @@ setup_memory(void)
                         start = PFN_PHYS(start_pfn) + bmap_size + PAGE_SIZE;
 
                         if (start + INITRD_SIZE > memory_end) {
-                                printk("initrd extends beyond end of memory "
-                                       "(0x%08lx > 0x%08lx)\n"
+                                pr_err("initrd extends beyond end of "
+                                       "memory (0x%08lx > 0x%08lx) "
                                        "disabling initrd\n",
                                        start + INITRD_SIZE, memory_end);
                                 INITRD_START = INITRD_SIZE = 0;
                         } else {
-                                printk("Moving initrd (0x%08lx -> 0x%08lx, "
-                                       "size: %ld)\n",
-                                       INITRD_START, start, INITRD_SIZE);
+                                pr_info("Moving initrd (0x%08lx -> "
+                                        "0x%08lx, size: %ld)\n",
+                                        INITRD_START, start, INITRD_SIZE);
                                 memmove((void *) start, (void *) INITRD_START,
                                         INITRD_SIZE);
                                 INITRD_START = start;
@@ -642,8 +656,9 @@ setup_memory(void)
                         initrd_start = INITRD_START;
                         initrd_end = initrd_start + INITRD_SIZE;
                 } else {
-                        printk("initrd extends beyond end of memory "
-                               "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
+                        pr_err("initrd extends beyond end of "
+                               "memory (0x%08lx > 0x%08lx) "
+                               "disabling initrd\n",
                                initrd_start + INITRD_SIZE, memory_end);
                         initrd_start = initrd_end = 0;
                 }
@@ -651,23 +666,6 @@ setup_memory(void)
 #endif
 }
 
-static int __init __stfle(unsigned long long *list, int doublewords)
-{
-        typedef struct { unsigned long long _[doublewords]; } addrtype;
-        register unsigned long __nr asm("0") = doublewords - 1;
-
-        asm volatile(".insn s,0xb2b00000,%0" /* stfle */
-                     : "=m" (*(addrtype *) list), "+d" (__nr) : : "cc");
-        return __nr + 1;
-}
-
-int __init stfle(unsigned long long *list, int doublewords)
-{
-        if (!(stfl() & (1UL << 24)))
-                return -EOPNOTSUPP;
-        return __stfle(list, doublewords);
-}
-
 /*
  * Setup hardware capabilities.
  */
@@ -739,8 +737,13 @@ static void __init setup_hwcaps(void)
                 strcpy(elf_platform, "z990");
                 break;
         case 0x2094:
+        case 0x2096:
                 strcpy(elf_platform, "z9-109");
                 break;
+        case 0x2097:
+        case 0x2098:
+                strcpy(elf_platform, "z10");
+                break;
         }
 }
 
@@ -752,25 +755,34 @@ static void __init setup_hwcaps(void)
 void __init
 setup_arch(char **cmdline_p)
 {
+        /* set up preferred console */
+        add_preferred_console("ttyS", 0, NULL);
+
         /*
          * print what head.S has found out about the machine
          */
 #ifndef CONFIG_64BIT
-        printk((MACHINE_IS_VM) ?
-               "We are running under VM (31 bit mode)\n" :
-               "We are running native (31 bit mode)\n");
-        printk((MACHINE_HAS_IEEE) ?
-               "This machine has an IEEE fpu\n" :
-               "This machine has no IEEE fpu\n");
+        if (MACHINE_IS_VM)
+                pr_info("Linux is running as a z/VM "
+                        "guest operating system in 31-bit mode\n");
+        else
+                pr_info("Linux is running natively in 31-bit mode\n");
+        if (MACHINE_HAS_IEEE)
+                pr_info("The hardware system has IEEE compatible "
+                        "floating point units\n");
+        else
+                pr_info("The hardware system has no IEEE compatible "
+                        "floating point units\n");
 #else /* CONFIG_64BIT */
         if (MACHINE_IS_VM)
-                printk("We are running under VM (64 bit mode)\n");
+                pr_info("Linux is running as a z/VM "
+                        "guest operating system in 64-bit mode\n");
         else if (MACHINE_IS_KVM) {
-                printk("We are running under KVM (64 bit mode)\n");
+                pr_info("Linux is running under KVM in 64-bit mode\n");
                 add_preferred_console("hvc", 0, NULL);
                 s390_virtio_console_init();
         } else
-                printk("We are running native (64 bit mode)\n");
+                pr_info("Linux is running natively in 64-bit mode\n");
 #endif /* CONFIG_64BIT */
 
         /* Have one command line that is parsed and saved in /proc/cmdline */
@@ -818,90 +830,3 @@ setup_arch(char **cmdline_p)
         /* Setup zfcpdump support */
         setup_zfcpdump(console_devno);
 }
-
-void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
-{
-   printk(KERN_INFO "cpu %d "
-#ifdef CONFIG_SMP
-           "phys_idx=%d "
-#endif
-           "vers=%02X ident=%06X machine=%04X unused=%04X\n",
-           cpuinfo->cpu_nr,
-#ifdef CONFIG_SMP
-           cpuinfo->cpu_addr,
-#endif
-           cpuinfo->cpu_id.version,
-           cpuinfo->cpu_id.ident,
-           cpuinfo->cpu_id.machine,
-           cpuinfo->cpu_id.unused);
-}
-
-/*
- * show_cpuinfo - Get information on one CPU for use by procfs.
- */
-
-static int show_cpuinfo(struct seq_file *m, void *v)
-{
-        static const char *hwcap_str[8] = {
-                "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp",
-                "edat"
-        };
-        struct cpuinfo_S390 *cpuinfo;
-        unsigned long n = (unsigned long) v - 1;
-        int i;
-
-        s390_adjust_jiffies();
-        preempt_disable();
-        if (!n) {
-                seq_printf(m, "vendor_id       : IBM/S390\n"
-                               "# processors    : %i\n"
-                               "bogomips per cpu: %lu.%02lu\n",
-                               num_online_cpus(), loops_per_jiffy/(500000/HZ),
-                               (loops_per_jiffy/(5000/HZ))%100);
-                seq_puts(m, "features\t: ");
-                for (i = 0; i < 8; i++)
-                        if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
-                                seq_printf(m, "%s ", hwcap_str[i]);
-                seq_puts(m, "\n");
-        }
-
-        if (cpu_online(n)) {
-#ifdef CONFIG_SMP
-                if (smp_processor_id() == n)
-                        cpuinfo = &S390_lowcore.cpu_data;
-                else
-                        cpuinfo = &lowcore_ptr[n]->cpu_data;
-#else
-                cpuinfo = &S390_lowcore.cpu_data;
-#endif
-                seq_printf(m, "processor %li: "
-                               "version = %02X,  "
-                               "identification = %06X,  "
-                               "machine = %04X\n",
-                               n, cpuinfo->cpu_id.version,
-                               cpuinfo->cpu_id.ident,
-                               cpuinfo->cpu_id.machine);
-        }
-        preempt_enable();
-        return 0;
-}
-
-static void *c_start(struct seq_file *m, loff_t *pos)
-{
-        return *pos < NR_CPUS ? (void *)((unsigned long) *pos + 1) : NULL;
-}
-static void *c_next(struct seq_file *m, void *v, loff_t *pos)
-{
-        ++*pos;
-        return c_start(m, pos);
-}
-static void c_stop(struct seq_file *m, void *v)
-{
-}
-const struct seq_operations cpuinfo_op = {
-        .start  = c_start,
-        .next   = c_next,
-        .stop   = c_stop,
-        .show   = show_cpuinfo,
-};
-
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index b5595688a477..9c0ccb532a45 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -20,6 +20,9 @@
  * cpu_number_map in other architectures.
  */
 
+#define KMSG_COMPONENT "cpu"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/mm.h>
@@ -44,6 +47,7 @@
 #include <asm/lowcore.h>
 #include <asm/sclp.h>
 #include <asm/cpu.h>
+#include <asm/vdso.h>
 #include "entry.h"
 
 /*
@@ -52,12 +56,6 @@
 struct _lowcore *lowcore_ptr[NR_CPUS];
 EXPORT_SYMBOL(lowcore_ptr);
 
-cpumask_t cpu_online_map = CPU_MASK_NONE;
-EXPORT_SYMBOL(cpu_online_map);
-
-cpumask_t cpu_possible_map = CPU_MASK_ALL;
-EXPORT_SYMBOL(cpu_possible_map);
-
 static struct task_struct *current_set[NR_CPUS];
 
 static u8 smp_cpu_type;
@@ -77,159 +75,6 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices);
 
 static void smp_ext_bitcall(int, ec_bit_sig);
 
-/*
- * Structure and data for __smp_call_function_map(). This is designed to
- * minimise static memory requirements. It also looks cleaner.
- */
-static DEFINE_SPINLOCK(call_lock);
-
-struct call_data_struct {
-        void (*func) (void *info);
-        void *info;
-        cpumask_t started;
-        cpumask_t finished;
-        int wait;
-};
-
-static struct call_data_struct *call_data;
-
-/*
- * 'Call function' interrupt callback
- */
-static void do_call_function(void)
-{
-        void (*func) (void *info) = call_data->func;
-        void *info = call_data->info;
-        int wait = call_data->wait;
-
-        cpu_set(smp_processor_id(), call_data->started);
-        (*func)(info);
-        if (wait)
-                cpu_set(smp_processor_id(), call_data->finished);;
-}
-
-static void __smp_call_function_map(void (*func) (void *info), void *info,
-                                    int wait, cpumask_t map)
-{
-        struct call_data_struct data;
-        int cpu, local = 0;
-
-        /*
-         * Can deadlock when interrupts are disabled or if in wrong context.
-         */
-        WARN_ON(irqs_disabled() || in_irq());
-
-        /*
-         * Check for local function call. We have to have the same call order
-         * as in on_each_cpu() because of machine_restart_smp().
-         */
-        if (cpu_isset(smp_processor_id(), map)) {
-                local = 1;
-                cpu_clear(smp_processor_id(), map);
-        }
-
-        cpus_and(map, map, cpu_online_map);
-        if (cpus_empty(map))
-                goto out;
-
-        data.func = func;
-        data.info = info;
-        data.started = CPU_MASK_NONE;
-        data.wait = wait;
-        if (wait)
-                data.finished = CPU_MASK_NONE;
-
-        call_data = &data;
-
-        for_each_cpu_mask(cpu, map)
-                smp_ext_bitcall(cpu, ec_call_function);
-
-        /* Wait for response */
-        while (!cpus_equal(map, data.started))
-                cpu_relax();
-        if (wait)
-                while (!cpus_equal(map, data.finished))
-                        cpu_relax();
-out:
-        if (local) {
-                local_irq_disable();
-                func(info);
-                local_irq_enable();
-        }
-}
-
-/*
- * smp_call_function:
- * @func: the function to run; this must be fast and non-blocking
- * @info: an arbitrary pointer to pass to the function
- * @wait: if true, wait (atomically) until function has completed on other CPUs
- *
- * Run a function on all other CPUs.
- *
- * You must not call this function with disabled interrupts, from a
- * hardware interrupt handler or from a bottom half.
- */
-int smp_call_function(void (*func) (void *info), void *info, int wait)
-{
-        cpumask_t map;
-
-        spin_lock(&call_lock);
-        map = cpu_online_map;
-        cpu_clear(smp_processor_id(), map);
-        __smp_call_function_map(func, info, wait, map);
-        spin_unlock(&call_lock);
-        return 0;
-}
-EXPORT_SYMBOL(smp_call_function);
-
-/*
- * smp_call_function_single:
- * @cpu: the CPU where func should run
- * @func: the function to run; this must be fast and non-blocking
- * @info: an arbitrary pointer to pass to the function
- * @wait: if true, wait (atomically) until function has completed on other CPUs
- *
- * Run a function on one processor.
- *
- * You must not call this function with disabled interrupts, from a
- * hardware interrupt handler or from a bottom half.
- */
-int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
-                             int wait)
-{
-        spin_lock(&call_lock);
-        __smp_call_function_map(func, info, wait, cpumask_of_cpu(cpu));
-        spin_unlock(&call_lock);
-        return 0;
-}
-EXPORT_SYMBOL(smp_call_function_single);
-
-/**
- * smp_call_function_mask(): Run a function on a set of other CPUs.
- * @mask: The set of cpus to run on.  Must not include the current cpu.
- * @func: The function to run. This must be fast and non-blocking.
- * @info: An arbitrary pointer to pass to the function.
- * @wait: If true, wait (atomically) until function has completed on other CPUs.
- *
- * Returns 0 on success, else a negative status code.
- *
- * If @wait is true, then returns once @func has returned; otherwise
- * it returns just before the target cpu calls @func.
- *
- * You must not call this function with disabled interrupts or from a
- * hardware interrupt handler or from a bottom half handler.
- */
-int smp_call_function_mask(cpumask_t mask, void (*func)(void *), void *info,
-                           int wait)
-{
-        spin_lock(&call_lock);
-        cpu_clear(smp_processor_id(), mask);
-        __smp_call_function_map(func, info, wait, mask);
-        spin_unlock(&call_lock);
-        return 0;
-}
-EXPORT_SYMBOL(smp_call_function_mask);
-
 void smp_send_stop(void)
 {
         int cpu, rc;
@@ -271,7 +116,10 @@ static void do_ext_call_interrupt(__u16 code)
         bits = xchg(&S390_lowcore.ext_call_fast, 0);
 
         if (test_bit(ec_call_function, &bits))
-                do_call_function();
+                generic_smp_call_function_interrupt();
+
+        if (test_bit(ec_call_function_single, &bits))
+                generic_smp_call_function_single_interrupt();
 }
 
 /*
@@ -288,6 +136,19 @@ static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
                 udelay(10);
 }
 
+void arch_send_call_function_ipi(cpumask_t mask)
+{
+        int cpu;
+
+        for_each_cpu_mask(cpu, mask)
+                smp_ext_bitcall(cpu, ec_call_function);
+}
+
+void arch_send_call_function_single_ipi(int cpu)
+{
+        smp_ext_bitcall(cpu, ec_call_function_single);
+}
+
 #ifndef CONFIG_64BIT
 /*
  * this function sends a 'purge tlb' signal to another CPU.
@@ -388,8 +249,8 @@ static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
         if (ipl_info.type != IPL_TYPE_FCP_DUMP)
                 return;
         if (cpu >= NR_CPUS) {
-                printk(KERN_WARNING "Registers for cpu %i not saved since dump "
-                       "kernel was compiled with NR_CPUS=%i\n", cpu, NR_CPUS);
+                pr_warning("CPU %i exceeds the maximum %i and is excluded from "
+                           "the dump\n", cpu, NR_CPUS - 1);
                 return;
         }
         zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL);
@@ -562,7 +423,7 @@ static void __init smp_detect_cpus(void)
         }
 out:
         kfree(info);
-        printk(KERN_INFO "CPUs: %d configured, %d standby\n", c_cpus, s_cpus);
+        pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
         get_online_cpus();
         __smp_rescan_cpus();
         put_online_cpus();
@@ -578,19 +439,17 @@ int __cpuinit start_secondary(void *cpuvoid)
         preempt_disable();
         /* Enable TOD clock interrupts on the secondary cpu. */
         init_cpu_timer();
-#ifdef CONFIG_VIRT_TIMER
         /* Enable cpu timer interrupts on the secondary cpu. */
         init_cpu_vtimer();
-#endif
         /* Enable pfault pseudo page faults on this cpu. */
         pfault_init();
 
         /* call cpu notifiers */
         notify_cpu_starting(smp_processor_id());
         /* Mark this cpu as online */
-        spin_lock(&call_lock);
+        ipi_call_lock();
         cpu_set(smp_processor_id(), cpu_online_map);
-        spin_unlock(&call_lock);
+        ipi_call_unlock();
         /* Switch on interrupts */
         local_irq_enable();
         /* Print info about this processor */
@@ -639,18 +498,18 @@ static int __cpuinit smp_alloc_lowcore(int cpu)
 
                 save_area = get_zeroed_page(GFP_KERNEL);
                 if (!save_area)
-                        goto out_save_area;
+                        goto out;
                 lowcore->extended_save_area_addr = (u32) save_area;
         }
+#else
+        if (vdso_alloc_per_cpu(cpu, lowcore))
+                goto out;
 #endif
         lowcore_ptr[cpu] = lowcore;
         return 0;
 
-#ifndef CONFIG_64BIT
-out_save_area:
-        free_page(panic_stack);
-#endif
 out:
+        free_page(panic_stack);
         free_pages(async_stack, ASYNC_ORDER);
         free_pages((unsigned long) lowcore, lc_order);
         return -ENOMEM;
@@ -667,6 +526,8 @@ static void smp_free_lowcore(int cpu)
 #ifndef CONFIG_64BIT
         if (MACHINE_HAS_IEEE)
                 free_page((unsigned long) lowcore->extended_save_area_addr);
+#else
+        vdso_free_per_cpu(cpu, lowcore);
 #endif
         free_page(lowcore->panic_stack - PAGE_SIZE);
         free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
@@ -690,12 +551,8 @@ int __cpuinit __cpu_up(unsigned int cpu)
 
         ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
                                    cpu, sigp_set_prefix);
-        if (ccode) {
-                printk("sigp_set_prefix failed for cpu %d "
-                       "with condition code %d\n",
-                       (int) cpu, (int) ccode);
+        if (ccode)
                 return -EIO;
-        }
 
         idle = current_set[cpu];
         cpu_lowcore = lowcore_ptr[cpu];
@@ -778,7 +635,7 @@ void __cpu_die(unsigned int cpu)
         while (!smp_cpu_not_running(cpu))
                 cpu_relax();
         smp_free_lowcore(cpu);
-        printk(KERN_INFO "Processor %d spun down\n", cpu);
+        pr_info("Processor %d stopped\n", cpu);
 }
 
 void cpu_die(void)
@@ -813,6 +670,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order);
         panic_stack = __get_free_page(GFP_KERNEL);
         async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
+        BUG_ON(!lowcore || !panic_stack || !async_stack);
 #ifndef CONFIG_64BIT
         if (MACHINE_HAS_IEEE)
                 save_area = get_zeroed_page(GFP_KERNEL);
@@ -826,6 +684,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 #ifndef CONFIG_64BIT
         if (MACHINE_HAS_IEEE)
                 lowcore->extended_save_area_addr = (u32) save_area;
+#else
+        BUG_ON(vdso_alloc_per_cpu(smp_processor_id(), lowcore));
 #endif
         set_prefix((u32)(unsigned long) lowcore);
         local_mcck_enable();
@@ -994,9 +854,11 @@ static ssize_t show_idle_count(struct sys_device *dev,
         unsigned long long idle_count;
 
         idle = &per_cpu(s390_idle, dev->id);
-        spin_lock_irq(&idle->lock);
+        spin_lock(&idle->lock);
         idle_count = idle->idle_count;
-        spin_unlock_irq(&idle->lock);
+        if (idle->idle_enter)
+                idle_count++;
+        spin_unlock(&idle->lock);
         return sprintf(buf, "%llu\n", idle_count);
 }
 static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
@@ -1005,18 +867,17 @@ static ssize_t show_idle_time(struct sys_device *dev,
                                 struct sysdev_attribute *attr, char *buf)
 {
         struct s390_idle_data *idle;
-        unsigned long long new_time;
+        unsigned long long now, idle_time, idle_enter;
 
         idle = &per_cpu(s390_idle, dev->id);
-        spin_lock_irq(&idle->lock);
-        if (idle->in_idle) {
-                new_time = get_clock();
-                idle->idle_time += new_time - idle->idle_enter;
-                idle->idle_enter = new_time;
-        }
-        new_time = idle->idle_time;
-        spin_unlock_irq(&idle->lock);
-        return sprintf(buf, "%llu\n", new_time >> 12);
+        spin_lock(&idle->lock);
+        now = get_clock();
+        idle_time = idle->idle_time;
+        idle_enter = idle->idle_enter;
+        if (idle_enter != 0ULL && idle_enter < now)
+                idle_time += now - idle_enter;
+        spin_unlock(&idle->lock);
+        return sprintf(buf, "%llu\n", idle_time >> 12);
 }
 static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
 
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index eccefbbff887..d649600df5b9 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -12,6 +12,9 @@
  *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
  */
 
+#define KMSG_COMPONENT "time"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/errno.h>
 #include <linux/module.h>
 #include <linux/sched.h>
@@ -20,6 +23,8 @@
 #include <linux/string.h>
 #include <linux/mm.h>
 #include <linux/interrupt.h>
+#include <linux/cpu.h>
+#include <linux/stop_machine.h>
 #include <linux/time.h>
 #include <linux/sysdev.h>
 #include <linux/delay.h>
@@ -36,6 +41,7 @@
 #include <asm/delay.h>
 #include <asm/s390_ext.h>
 #include <asm/div64.h>
+#include <asm/vdso.h>
 #include <asm/irq.h>
 #include <asm/irq_regs.h>
 #include <asm/timer.h>
@@ -154,7 +160,7 @@ void init_cpu_timer(void)
         cd->min_delta_ns        = 1;
         cd->max_delta_ns        = LONG_MAX;
         cd->rating              = 400;
-        cd->cpumask             = cpumask_of_cpu(cpu);
+        cd->cpumask             = cpumask_of(cpu);
         cd->set_next_event      = s390_next_event;
         cd->set_mode            = s390_set_mode;
 
@@ -223,6 +229,36 @@ static struct clocksource clocksource_tod = {
 };
 
 
+void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
+{
+        if (clock != &clocksource_tod)
+                return;
+
+        /* Make userspace gettimeofday spin until we're done. */
+        ++vdso_data->tb_update_count;
+        smp_wmb();
+        vdso_data->xtime_tod_stamp = clock->cycle_last;
+        vdso_data->xtime_clock_sec = xtime.tv_sec;
+        vdso_data->xtime_clock_nsec = xtime.tv_nsec;
+        vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
+        vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
+        smp_wmb();
+        ++vdso_data->tb_update_count;
+}
+
+extern struct timezone sys_tz;
+
+void update_vsyscall_tz(void)
+{
+        /* Make userspace gettimeofday spin until we're done. */
+        ++vdso_data->tb_update_count;
+        smp_wmb();
+        vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
+        vdso_data->tz_dsttime = sys_tz.tz_dsttime;
+        smp_wmb();
+        ++vdso_data->tb_update_count;
+}
+
 /*
  * Initialize the TOD clock and the CPU timer of
  * the boot cpu.
@@ -253,10 +289,8 @@ void __init time_init(void)
 
         /* Enable TOD clock interrupts on the boot cpu. */
         init_cpu_timer();
-
-#ifdef CONFIG_VIRT_TIMER
+        /* Enable cpu timer interrupts on the boot cpu. */
         vtime_init();
-#endif
 }
 
 /*
@@ -288,8 +322,8 @@ static unsigned long long adjust_time(unsigned long long old,
         }
         sched_clock_base_cc += delta;
         if (adjust.offset != 0) {
-                printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n",
-                       adjust.offset);
+                pr_notice("The ETR interface has adjusted the clock "
+                          "by %li microseconds\n", adjust.offset);
                 adjust.modes = ADJ_OFFSET_SINGLESHOT;
                 do_adjtimex(&adjust);
         }
@@ -360,6 +394,15 @@ static void enable_sync_clock(void)
         atomic_set_mask(0x80000000, sw_ptr);
 }
 
+/* Single threaded workqueue used for etr and stp sync events */
+static struct workqueue_struct *time_sync_wq;
+
+static void __init time_init_wq(void)
+{
+        if (!time_sync_wq)
+                time_sync_wq = create_singlethread_workqueue("timesync");
+}
+
 /*
  * External Time Reference (ETR) code.
  */
@@ -425,6 +468,7 @@ static struct timer_list etr_timer;
 
 static void etr_timeout(unsigned long dummy);
 static void etr_work_fn(struct work_struct *work);
+static DEFINE_MUTEX(etr_work_mutex);
 static DECLARE_WORK(etr_work, etr_work_fn);
 
 /*
@@ -440,8 +484,8 @@ static void etr_reset(void)
                 etr_tolec = get_clock();
                 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
         } else if (etr_port0_online || etr_port1_online) {
-                printk(KERN_WARNING "Running on non ETR capable "
-                       "machine, only local mode available.\n");
+                pr_warning("The real or virtual hardware system does "
+                           "not provide an ETR interface\n");
                 etr_port0_online = etr_port1_online = 0;
         }
 }
@@ -452,17 +496,18 @@ static int __init etr_init(void)
 
         if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
                 return 0;
+        time_init_wq();
         /* Check if this machine has the steai instruction. */
         if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
                 etr_steai_available = 1;
         setup_timer(&etr_timer, etr_timeout, 0UL);
         if (etr_port0_online) {
                 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
-                schedule_work(&etr_work);
+                queue_work(time_sync_wq, &etr_work);
         }
         if (etr_port1_online) {
                 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
-                schedule_work(&etr_work);
+                queue_work(time_sync_wq, &etr_work);
         }
         return 0;
 }
@@ -489,7 +534,7 @@ void etr_switch_to_local(void)
         if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
                 disable_sync_clock(NULL);
         set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
-        schedule_work(&etr_work);
+        queue_work(time_sync_wq, &etr_work);
 }
 
 /*
@@ -505,7 +550,7 @@ void etr_sync_check(void)
         if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
                 disable_sync_clock(NULL);
         set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
-        schedule_work(&etr_work);
+        queue_work(time_sync_wq, &etr_work);
 }
 
 /*
@@ -529,13 +574,13 @@ static void etr_timing_alert(struct etr_irq_parm *intparm)
                  * Both ports are not up-to-date now.
                  */
                 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
-        schedule_work(&etr_work);
+        queue_work(time_sync_wq, &etr_work);
 }
 
 static void etr_timeout(unsigned long dummy)
 {
         set_bit(ETR_EVENT_UPDATE, &etr_events);
-        schedule_work(&etr_work);
+        queue_work(time_sync_wq, &etr_work);
 }
 
 /*
@@ -642,14 +687,16 @@ static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
 }
 
 struct clock_sync_data {
+        atomic_t cpus;
         int in_sync;
         unsigned long long fixup_cc;
+        int etr_port;
+        struct etr_aib *etr_aib;
 };
 
-static void clock_sync_cpu_start(void *dummy)
+static void clock_sync_cpu(struct clock_sync_data *sync)
 {
-        struct clock_sync_data *sync = dummy;
-
+        atomic_dec(&sync->cpus);
         enable_sync_clock();
         /*
          * This looks like a busy wait loop but it isn't. etr_sync_cpus
@@ -675,39 +722,35 @@ static void clock_sync_cpu_start(void *dummy)
         fixup_clock_comparator(sync->fixup_cc);
 }
 
-static void clock_sync_cpu_end(void *dummy)
-{
-}
-
 /*
  * Sync the TOD clock using the port refered to by aibp. This port
  * has to be enabled and the other port has to be disabled. The
  * last eacr update has to be more than 1.6 seconds in the past.
  */
-static int etr_sync_clock(struct etr_aib *aib, int port)
+static int etr_sync_clock(void *data)
 {
-        struct etr_aib *sync_port;
-        struct clock_sync_data etr_sync;
+        static int first;
         unsigned long long clock, old_clock, delay, delta;
-        int follows;
+        struct clock_sync_data *etr_sync;
+        struct etr_aib *sync_port, *aib;
+        int port;
         int rc;
 
-        /* Check if the current aib is adjacent to the sync port aib. */
-        sync_port = (port == 0) ? &etr_port0 : &etr_port1;
-        follows = etr_aib_follows(sync_port, aib, port);
-        memcpy(sync_port, aib, sizeof(*aib));
-        if (!follows)
-                return -EAGAIN;
+        etr_sync = data;
 
-        /*
-         * Catch all other cpus and make them wait until we have
-         * successfully synced the clock. smp_call_function will
-         * return after all other cpus are in etr_sync_cpu_start.
-         */
-        memset(&etr_sync, 0, sizeof(etr_sync));
-        preempt_disable();
-        smp_call_function(clock_sync_cpu_start, &etr_sync, 0);
-        local_irq_disable();
+        if (xchg(&first, 1) == 1) {
+                /* Slave */
+                clock_sync_cpu(etr_sync);
+                return 0;
+        }
+
+        /* Wait until all other cpus entered the sync function. */
+        while (atomic_read(&etr_sync->cpus) != 0)
+                cpu_relax();
+
+        port = etr_sync->etr_port;
+        aib = etr_sync->etr_aib;
+        sync_port = (port == 0) ? &etr_port0 : &etr_port1;
         enable_sync_clock();
 
         /* Set clock to next OTE. */
@@ -724,16 +767,16 @@ static int etr_sync_clock(struct etr_aib *aib, int port)
                 delay = (unsigned long long)
                         (aib->edf2.etv - sync_port->edf2.etv) << 32;
                 delta = adjust_time(old_clock, clock, delay);
-                etr_sync.fixup_cc = delta;
+                etr_sync->fixup_cc = delta;
                 fixup_clock_comparator(delta);
                 /* Verify that the clock is properly set. */
                 if (!etr_aib_follows(sync_port, aib, port)) {
                         /* Didn't work. */
                         disable_sync_clock(NULL);
-                        etr_sync.in_sync = -EAGAIN;
+                        etr_sync->in_sync = -EAGAIN;
                         rc = -EAGAIN;
                 } else {
-                        etr_sync.in_sync = 1;
+                        etr_sync->in_sync = 1;
                         rc = 0;
                 }
         } else {
@@ -741,12 +784,33 @@ static int etr_sync_clock(struct etr_aib *aib, int port)
                 __ctl_clear_bit(0, 29);
                 __ctl_clear_bit(14, 21);
                 disable_sync_clock(NULL);
-                etr_sync.in_sync = -EAGAIN;
+                etr_sync->in_sync = -EAGAIN;
                 rc = -EAGAIN;
         }
-        local_irq_enable();
-        smp_call_function(clock_sync_cpu_end, NULL, 0);
-        preempt_enable();
+        xchg(&first, 0);
+        return rc;
+}
+
+static int etr_sync_clock_stop(struct etr_aib *aib, int port)
+{
+        struct clock_sync_data etr_sync;
+        struct etr_aib *sync_port;
+        int follows;
+        int rc;
+
+        /* Check if the current aib is adjacent to the sync port aib. */
+        sync_port = (port == 0) ? &etr_port0 : &etr_port1;
+        follows = etr_aib_follows(sync_port, aib, port);
+        memcpy(sync_port, aib, sizeof(*aib));
+        if (!follows)
+                return -EAGAIN;
+        memset(&etr_sync, 0, sizeof(etr_sync));
+        etr_sync.etr_aib = aib;
+        etr_sync.etr_port = port;
+        get_online_cpus();
+        atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
+        rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
+        put_online_cpus();
         return rc;
 }
 
@@ -903,7 +967,7 @@ static void etr_update_eacr(struct etr_eacr eacr)
 }
 
 /*
- * ETR tasklet. In this function you'll find the main logic. In
+ * ETR work. In this function you'll find the main logic. In
  * particular this is the only function that calls etr_update_eacr(),
  * it "controls" the etr control register.
  */
@@ -914,6 +978,9 @@ static void etr_work_fn(struct work_struct *work)
         struct etr_aib aib;
         int sync_port;
 
+        /* prevent multiple execution. */
+        mutex_lock(&etr_work_mutex);
+
         /* Create working copy of etr_eacr. */
         eacr = etr_eacr;
 
@@ -929,7 +996,7 @@ static void etr_work_fn(struct work_struct *work)
                 del_timer_sync(&etr_timer);
                 etr_update_eacr(eacr);
                 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
-                return;
+                goto out_unlock;
         }
 
         /* Store aib to get the current ETR status word. */
@@ -1016,7 +1083,7 @@ static void etr_work_fn(struct work_struct *work)
             eacr.es || sync_port < 0) {
                 etr_update_eacr(eacr);
                 etr_set_tolec_timeout(now);
-                return;
+                goto out_unlock;
         }
 
         /*
@@ -1036,7 +1103,7 @@ static void etr_work_fn(struct work_struct *work)
         etr_update_eacr(eacr);
         set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
         if (now < etr_tolec + (1600000 << 12) ||
-            etr_sync_clock(&aib, sync_port) != 0) {
+            etr_sync_clock_stop(&aib, sync_port) != 0) {
                 /* Sync failed. Try again in 1/2 second. */
                 eacr.es = 0;
                 etr_update_eacr(eacr);
@@ -1044,6 +1111,8 @@ static void etr_work_fn(struct work_struct *work)
                 etr_set_sync_timeout();
         } else
                 etr_set_tolec_timeout(now);
+out_unlock:
+        mutex_unlock(&etr_work_mutex);
 }
 
 /*
@@ -1125,13 +1194,13 @@ static ssize_t etr_online_store(struct sys_device *dev,
                         return count;   /* Nothing to do. */
                 etr_port0_online = value;
                 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
-                schedule_work(&etr_work);
+                queue_work(time_sync_wq, &etr_work);
         } else {
                 if (etr_port1_online == value)
                         return count;   /* Nothing to do. */
                 etr_port1_online = value;
                 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
-                schedule_work(&etr_work);
+                queue_work(time_sync_wq, &etr_work);
         }
         return count;
 }
@@ -1332,6 +1401,7 @@ static struct stp_sstpi stp_info;
 static void *stp_page;
 
 static void stp_work_fn(struct work_struct *work);
+static DEFINE_MUTEX(stp_work_mutex);
 static DECLARE_WORK(stp_work, stp_work_fn);
 
 static int __init early_parse_stp(char *p)
@@ -1356,7 +1426,8 @@ static void __init stp_reset(void)
         if (rc == 0)
                 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
         else if (stp_online) {
-                printk(KERN_WARNING "Running on non STP capable machine.\n");
+                pr_warning("The real or virtual hardware system does "
+                           "not provide an STP interface\n");
                 free_bootmem((unsigned long) stp_page, PAGE_SIZE);
                 stp_page = NULL;
                 stp_online = 0;
@@ -1365,8 +1436,12 @@ static void __init stp_reset(void)
 
 static int __init stp_init(void)
 {
-        if (test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags) && stp_online)
-                schedule_work(&stp_work);
+        if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
+                return 0;
+        time_init_wq();
+        if (!stp_online)
+                return 0;
+        queue_work(time_sync_wq, &stp_work);
         return 0;
 }
 
@@ -1383,7 +1458,7 @@ arch_initcall(stp_init);
 static void stp_timing_alert(struct stp_irq_parm *intparm)
 {
         if (intparm->tsc || intparm->lac || intparm->tcpc)
-                schedule_work(&stp_work);
+                queue_work(time_sync_wq, &stp_work);
 }
 
 /*
@@ -1397,7 +1472,7 @@ void stp_sync_check(void)
         if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
                 return;
         disable_sync_clock(NULL);
-        schedule_work(&stp_work);
+        queue_work(time_sync_wq, &stp_work);
 }
 
 /*
@@ -1411,46 +1486,34 @@ void stp_island_check(void)
         if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
                 return;
         disable_sync_clock(NULL);
-        schedule_work(&stp_work);
+        queue_work(time_sync_wq, &stp_work);
 }
 
-/*
- * STP tasklet. Check for the STP state and take over the clock
- * synchronization if the STP clock source is usable.
- */
-static void stp_work_fn(struct work_struct *work)
+
+static int stp_sync_clock(void *data)
 {
-        struct clock_sync_data stp_sync;
+        static int first;
         unsigned long long old_clock, delta;
+        struct clock_sync_data *stp_sync;
         int rc;
 
-        if (!stp_online) {
-                chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
-                return;
-        }
+        stp_sync = data;
 
-        rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
-        if (rc)
-                return;
+        if (xchg(&first, 1) == 1) {
+                /* Slave */
+                clock_sync_cpu(stp_sync);
+                return 0;
+        }
 
-        rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
-        if (rc || stp_info.c == 0)
-                return;
+        /* Wait until all other cpus entered the sync function. */
+        while (atomic_read(&stp_sync->cpus) != 0)
+                cpu_relax();
 
-        /*
-         * Catch all other cpus and make them wait until we have
-         * successfully synced the clock. smp_call_function will
-         * return after all other cpus are in clock_sync_cpu_start.
-         */
-        memset(&stp_sync, 0, sizeof(stp_sync));
-        preempt_disable();
-        smp_call_function(clock_sync_cpu_start, &stp_sync, 0);
-        local_irq_disable();
         enable_sync_clock();
 
         set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
         if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                schedule_work(&etr_work);
+                queue_work(time_sync_wq, &etr_work);
 
         rc = 0;
         if (stp_info.todoff[0] || stp_info.todoff[1] ||
@@ -1469,16 +1532,49 @@ static void stp_work_fn(struct work_struct *work)
         }
         if (rc) {
                 disable_sync_clock(NULL);
-                stp_sync.in_sync = -EAGAIN;
+                stp_sync->in_sync = -EAGAIN;
                 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
                 if (etr_port0_online || etr_port1_online)
-                        schedule_work(&etr_work);
+                        queue_work(time_sync_wq, &etr_work);
         } else
-                stp_sync.in_sync = 1;
+                stp_sync->in_sync = 1;
+        xchg(&first, 0);
+        return 0;
+}
+
+/*
+ * STP work. Check for the STP state and take over the clock
+ * synchronization if the STP clock source is usable.
+ */
+static void stp_work_fn(struct work_struct *work)
+{
+        struct clock_sync_data stp_sync;
+        int rc;
+
+        /* prevent multiple execution. */
+        mutex_lock(&stp_work_mutex);
+
+        if (!stp_online) {
+                chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
+                goto out_unlock;
+        }
+
+        rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
+        if (rc)
+                goto out_unlock;
+
+        rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
+        if (rc || stp_info.c == 0)
+                goto out_unlock;
+
+        memset(&stp_sync, 0, sizeof(stp_sync));
+        get_online_cpus();
+        atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
+        stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
+        put_online_cpus();
 
-        local_irq_enable();
-        smp_call_function(clock_sync_cpu_end, NULL, 0);
-        preempt_enable();
+out_unlock:
+        mutex_unlock(&stp_work_mutex);
 }
 
 /*
@@ -1587,7 +1683,7 @@ static ssize_t stp_online_store(struct sysdev_class *class,
         if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
                 return -EOPNOTSUPP;
         stp_online = value;
-        schedule_work(&stp_work);
+        queue_work(time_sync_wq, &stp_work);
         return count;
 }
 
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index a947899dcba1..cc362c9ea8f1 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -3,6 +3,9 @@
  *    Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
  */
 
+#define KMSG_COMPONENT "cpu"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/init.h>
@@ -12,6 +15,7 @@
 #include <linux/workqueue.h>
 #include <linux/cpu.h>
 #include <linux/smp.h>
+#include <linux/cpuset.h>
 #include <asm/delay.h>
 #include <asm/s390_ext.h>
 #include <asm/sysinfo.h>
@@ -57,11 +61,11 @@ struct core_info {
         cpumask_t mask;
 };
 
+static int topology_enabled;
 static void topology_work_fn(struct work_struct *work);
 static struct tl_info *tl_info;
 static struct core_info core_info;
 static int machine_has_topology;
-static int machine_has_topology_irq;
 static struct timer_list topology_timer;
 static void set_topology_timer(void);
 static DECLARE_WORK(topology_work, topology_work_fn);
@@ -77,8 +81,8 @@ cpumask_t cpu_coregroup_map(unsigned int cpu)
         cpumask_t mask;
 
         cpus_clear(mask);
-        if (!machine_has_topology)
-                return cpu_present_map;
+        if (!topology_enabled || !machine_has_topology)
+                return cpu_possible_map;
         spin_lock_irqsave(&topology_lock, flags);
         while (core) {
                 if (cpu_isset(cpu, core->mask)) {
@@ -93,6 +97,11 @@ cpumask_t cpu_coregroup_map(unsigned int cpu)
         return mask;
 }
 
+const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
+{
+        return &cpu_core_map[cpu];
+}
+
 static void add_cpus_to_core(struct tl_cpu *tl_cpu, struct core_info *core)
 {
         unsigned int cpu;
@@ -168,7 +177,7 @@ static void topology_update_polarization_simple(void)
         int cpu;
 
         mutex_lock(&smp_cpu_state_mutex);
-        for_each_present_cpu(cpu)
+        for_each_possible_cpu(cpu)
                 smp_cpu_polarization[cpu] = POLARIZATION_HRZ;
         mutex_unlock(&smp_cpu_state_mutex);
 }
@@ -199,7 +208,7 @@ int topology_set_cpu_management(int fc)
                 rc = ptf(PTF_HORIZONTAL);
         if (rc)
                 return -EBUSY;
-        for_each_present_cpu(cpu)
+        for_each_possible_cpu(cpu)
                 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
         return rc;
 }
@@ -208,11 +217,11 @@ static void update_cpu_core_map(void)
 {
         int cpu;
 
-        for_each_present_cpu(cpu)
+        for_each_possible_cpu(cpu)
                 cpu_core_map[cpu] = cpu_coregroup_map(cpu);
 }
 
-void arch_update_cpu_topology(void)
+int arch_update_cpu_topology(void)
 {
         struct tl_info *info = tl_info;
         struct sys_device *sysdev;
@@ -221,7 +230,7 @@ void arch_update_cpu_topology(void)
         if (!machine_has_topology) {
                 update_cpu_core_map();
                 topology_update_polarization_simple();
-                return;
+                return 0;
         }
         stsi(info, 15, 1, 2);
         tl_to_cores(info);
@@ -230,11 +239,12 @@ void arch_update_cpu_topology(void)
                 sysdev = get_cpu_sysdev(cpu);
                 kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
         }
+        return 1;
 }
 
 static void topology_work_fn(struct work_struct *work)
 {
-        arch_reinit_sched_domains();
+        rebuild_sched_domains();
 }
 
 void topology_schedule_update(void)
@@ -257,10 +267,14 @@ static void set_topology_timer(void)
         add_timer(&topology_timer);
 }
 
-static void topology_interrupt(__u16 code)
+static int __init early_parse_topology(char *p)
 {
-        schedule_work(&topology_work);
+        if (strncmp(p, "on", 2))
+                return 0;
+        topology_enabled = 1;
+        return 0;
 }
+early_param("topology", early_parse_topology);
 
 static int __init init_topology_update(void)
 {
@@ -272,14 +286,7 @@ static int __init init_topology_update(void)
                 goto out;
         }
         init_timer_deferrable(&topology_timer);
-        if (machine_has_topology_irq) {
-                rc = register_external_interrupt(0x2005, topology_interrupt);
-                if (rc)
-                        goto out;
-                ctl_set_bit(0, 8);
-        }
-        else
-                set_topology_timer();
+        set_topology_timer();
 out:
         update_cpu_core_map();
         return rc;
@@ -300,9 +307,6 @@ void __init s390_init_cpu_topology(void)
                 return;
         machine_has_topology = 1;
 
-        if (facility_bits & (1ULL << 51))
-                machine_has_topology_irq = 1;
-
         tl_info = alloc_bootmem_pages(PAGE_SIZE);
         info = tl_info;
         stsi(info, 15, 1, 2);
@@ -311,7 +315,7 @@ void __init s390_init_cpu_topology(void)
         for (i = 0; i < info->mnest - 2; i++)
                 nr_cores *= info->mag[NR_MAG - 3 - i];
 
-        printk(KERN_INFO "CPU topology:");
+        pr_info("The CPU configuration topology of the machine is:");
         for (i = 0; i < NR_MAG; i++)
                 printk(" %d", info->mag[i]);
         printk(" / %d\n", info->mnest);
@@ -326,5 +330,4 @@ void __init s390_init_cpu_topology(void)
         return;
 error:
         machine_has_topology = 0;
-        machine_has_topology_irq = 0;
 }
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
new file mode 100644
index 000000000000..25a6a82f1c02
--- /dev/null
+++ b/arch/s390/kernel/vdso.c
@@ -0,0 +1,351 @@
+/*
+ * vdso setup for s390
+ *
+ *  Copyright IBM Corp. 2008
+ *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License (version 2 only)
+ * as published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/user.h>
+#include <linux/elf.h>
+#include <linux/security.h>
+#include <linux/bootmem.h>
+
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/processor.h>
+#include <asm/mmu.h>
+#include <asm/mmu_context.h>
+#include <asm/sections.h>
+#include <asm/vdso.h>
+
+#if defined(CONFIG_32BIT) || defined(CONFIG_COMPAT)
+extern char vdso32_start, vdso32_end;
+static void *vdso32_kbase = &vdso32_start;
+static unsigned int vdso32_pages;
+static struct page **vdso32_pagelist;
+#endif
+
+#ifdef CONFIG_64BIT
+extern char vdso64_start, vdso64_end;
+static void *vdso64_kbase = &vdso64_start;
+static unsigned int vdso64_pages;
+static struct page **vdso64_pagelist;
+#endif /* CONFIG_64BIT */
+
+/*
+ * Should the kernel map a VDSO page into processes and pass its
+ * address down to glibc upon exec()?
+ */
+unsigned int __read_mostly vdso_enabled = 1;
+
+static int __init vdso_setup(char *s)
+{
+        vdso_enabled = simple_strtoul(s, NULL, 0);
+        return 1;
+}
+__setup("vdso=", vdso_setup);
+
+/*
+ * The vdso data page
+ */
+static union {
+        struct vdso_data        data;
+        u8                      page[PAGE_SIZE];
+} vdso_data_store __attribute__((__section__(".data.page_aligned")));
+struct vdso_data *vdso_data = &vdso_data_store.data;
+
+/*
+ * Setup vdso data page.
+ */
+static void vdso_init_data(struct vdso_data *vd)
+{
+        unsigned int facility_list;
+
+        facility_list = stfl();
+        vd->ectg_available = switch_amode && (facility_list & 1);
+}
+
+#ifdef CONFIG_64BIT
+/*
+ * Setup per cpu vdso data page.
+ */
+static void vdso_init_per_cpu_data(int cpu, struct vdso_per_cpu_data *vpcd)
+{
+}
+
+/*
+ * Allocate/free per cpu vdso data.
+ */
+#ifdef CONFIG_64BIT
+#define SEGMENT_ORDER   2
+#else
+#define SEGMENT_ORDER   1
+#endif
+
+int vdso_alloc_per_cpu(int cpu, struct _lowcore *lowcore)
+{
+        unsigned long segment_table, page_table, page_frame;
+        u32 *psal, *aste;
+        int i;
+
+        lowcore->vdso_per_cpu_data = __LC_PASTE;
+
+        if (!switch_amode || !vdso_enabled)
+                return 0;
+
+        segment_table = __get_free_pages(GFP_KERNEL, SEGMENT_ORDER);
+        page_table = get_zeroed_page(GFP_KERNEL | GFP_DMA);
+        page_frame = get_zeroed_page(GFP_KERNEL);
+        if (!segment_table || !page_table || !page_frame)
+                goto out;
+
+        clear_table((unsigned long *) segment_table, _SEGMENT_ENTRY_EMPTY,
+                    PAGE_SIZE << SEGMENT_ORDER);
+        clear_table((unsigned long *) page_table, _PAGE_TYPE_EMPTY,
+                    256*sizeof(unsigned long));
+
+        *(unsigned long *) segment_table = _SEGMENT_ENTRY + page_table;
+        *(unsigned long *) page_table = _PAGE_RO + page_frame;
+
+        psal = (u32 *) (page_table + 256*sizeof(unsigned long));
+        aste = psal + 32;
+
+        for (i = 4; i < 32; i += 4)
+                psal[i] = 0x80000000;
+
+        lowcore->paste[4] = (u32)(addr_t) psal;
+        psal[0] = 0x20000000;
+        psal[2] = (u32)(addr_t) aste;
+        *(unsigned long *) (aste + 2) = segment_table +
+                _ASCE_TABLE_LENGTH + _ASCE_USER_BITS + _ASCE_TYPE_SEGMENT;
+        aste[4] = (u32)(addr_t) psal;
+        lowcore->vdso_per_cpu_data = page_frame;
+
+        vdso_init_per_cpu_data(cpu, (struct vdso_per_cpu_data *) page_frame);
+        return 0;
+
+out:
+        free_page(page_frame);
+        free_page(page_table);
+        free_pages(segment_table, SEGMENT_ORDER);
+        return -ENOMEM;
+}
+
+#ifdef CONFIG_HOTPLUG_CPU
+void vdso_free_per_cpu(int cpu, struct _lowcore *lowcore)
+{
+        unsigned long segment_table, page_table, page_frame;
+        u32 *psal, *aste;
+
+        if (!switch_amode || !vdso_enabled)
+                return;
+
+        psal = (u32 *)(addr_t) lowcore->paste[4];
+        aste = (u32 *)(addr_t) psal[2];
+        segment_table = *(unsigned long *)(aste + 2) & PAGE_MASK;
+        page_table = *(unsigned long *) segment_table;
+        page_frame = *(unsigned long *) page_table;
+
+        free_page(page_frame);
+        free_page(page_table);
+        free_pages(segment_table, SEGMENT_ORDER);
+}
+#endif /* CONFIG_HOTPLUG_CPU */
+
+static void __vdso_init_cr5(void *dummy)
+{
+        unsigned long cr5;
+
+        cr5 = offsetof(struct _lowcore, paste);
+        __ctl_load(cr5, 5, 5);
+}
+
+static void vdso_init_cr5(void)
+{
+        if (switch_amode && vdso_enabled)
+                on_each_cpu(__vdso_init_cr5, NULL, 1);
+}
+#endif /* CONFIG_64BIT */
+
+/*
+ * This is called from binfmt_elf, we create the special vma for the
+ * vDSO and insert it into the mm struct tree
+ */
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
+{
+        struct mm_struct *mm = current->mm;
+        struct page **vdso_pagelist;
+        unsigned long vdso_pages;
+        unsigned long vdso_base;
+        int rc;
+
+        if (!vdso_enabled)
+                return 0;
+        /*
+         * Only map the vdso for dynamically linked elf binaries.
+         */
+        if (!uses_interp)
+                return 0;
+
+        vdso_base = mm->mmap_base;
+#ifdef CONFIG_64BIT
+        vdso_pagelist = vdso64_pagelist;
+        vdso_pages = vdso64_pages;
+#ifdef CONFIG_COMPAT
+        if (test_thread_flag(TIF_31BIT)) {
+                vdso_pagelist = vdso32_pagelist;
+                vdso_pages = vdso32_pages;
+        }
+#endif
+#else
+        vdso_pagelist = vdso32_pagelist;
+        vdso_pages = vdso32_pages;
+#endif
+
+        /*
+         * vDSO has a problem and was disabled, just don't "enable" it for
+         * the process
+         */
+        if (vdso_pages == 0)
+                return 0;
+
+        current->mm->context.vdso_base = 0;
+
+        /*
+         * pick a base address for the vDSO in process space. We try to put
+         * it at vdso_base which is the "natural" base for it, but we might
+         * fail and end up putting it elsewhere.
+         */
+        down_write(&mm->mmap_sem);
+        vdso_base = get_unmapped_area(NULL, vdso_base,
+                                      vdso_pages << PAGE_SHIFT, 0, 0);
+        if (IS_ERR_VALUE(vdso_base)) {
+                rc = vdso_base;
+                goto out_up;
+        }
+
+        /*
+         * our vma flags don't have VM_WRITE so by default, the process
+         * isn't allowed to write those pages.
+         * gdb can break that with ptrace interface, and thus trigger COW
+         * on those pages but it's then your responsibility to never do that
+         * on the "data" page of the vDSO or you'll stop getting kernel
+         * updates and your nice userland gettimeofday will be totally dead.
+         * It's fine to use that for setting breakpoints in the vDSO code
+         * pages though
+         *
+         * Make sure the vDSO gets into every core dump.
+         * Dumping its contents makes post-mortem fully interpretable later
+         * without matching up the same kernel and hardware config to see
+         * what PC values meant.
+         */
+        rc = install_special_mapping(mm, vdso_base, vdso_pages << PAGE_SHIFT,
+                                     VM_READ|VM_EXEC|
+                                     VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC|
+                                     VM_ALWAYSDUMP,
+                                     vdso_pagelist);
+        if (rc)
+                goto out_up;
+
+        /* Put vDSO base into mm struct */
+        current->mm->context.vdso_base = vdso_base;
+
+        up_write(&mm->mmap_sem);
+        return 0;
+
+out_up:
+        up_write(&mm->mmap_sem);
+        return rc;
+}
+
+const char *arch_vma_name(struct vm_area_struct *vma)
+{
+        if (vma->vm_mm && vma->vm_start == vma->vm_mm->context.vdso_base)
+                return "[vdso]";
+        return NULL;
+}
+
+static int __init vdso_init(void)
+{
+        int i;
+
+        if (!vdso_enabled)
+                return 0;
+        vdso_init_data(vdso_data);
+#if defined(CONFIG_32BIT) || defined(CONFIG_COMPAT)
+        /* Calculate the size of the 32 bit vDSO */
+        vdso32_pages = ((&vdso32_end - &vdso32_start
+                         + PAGE_SIZE - 1) >> PAGE_SHIFT) + 1;
+
+        /* Make sure pages are in the correct state */
+        vdso32_pagelist = kzalloc(sizeof(struct page *) * (vdso32_pages + 1),
+                                  GFP_KERNEL);
+        BUG_ON(vdso32_pagelist == NULL);
+        for (i = 0; i < vdso32_pages - 1; i++) {
+                struct page *pg = virt_to_page(vdso32_kbase + i*PAGE_SIZE);
+                ClearPageReserved(pg);
+                get_page(pg);
+                vdso32_pagelist[i] = pg;
+        }
+        vdso32_pagelist[vdso32_pages - 1] = virt_to_page(vdso_data);
+        vdso32_pagelist[vdso32_pages] = NULL;
+#endif
+
+#ifdef CONFIG_64BIT
+        /* Calculate the size of the 64 bit vDSO */
+        vdso64_pages = ((&vdso64_end - &vdso64_start
+                         + PAGE_SIZE - 1) >> PAGE_SHIFT) + 1;
+
+        /* Make sure pages are in the correct state */
+        vdso64_pagelist = kzalloc(sizeof(struct page *) * (vdso64_pages + 1),
+                                  GFP_KERNEL);
+        BUG_ON(vdso64_pagelist == NULL);
+        for (i = 0; i < vdso64_pages - 1; i++) {
+                struct page *pg = virt_to_page(vdso64_kbase + i*PAGE_SIZE);
+                ClearPageReserved(pg);
+                get_page(pg);
+                vdso64_pagelist[i] = pg;
+        }
+        vdso64_pagelist[vdso64_pages - 1] = virt_to_page(vdso_data);
+        vdso64_pagelist[vdso64_pages] = NULL;
+#ifndef CONFIG_SMP
+        BUG_ON(vdso_alloc_per_cpu(0, S390_lowcore));
+#endif
+        vdso_init_cr5();
+#endif /* CONFIG_64BIT */
+
+        get_page(virt_to_page(vdso_data));
+
+        smp_wmb();
+
+        return 0;
+}
+arch_initcall(vdso_init);
+
+int in_gate_area_no_task(unsigned long addr)
+{
+        return 0;
+}
+
+int in_gate_area(struct task_struct *task, unsigned long addr)
+{
+        return 0;
+}
+
+struct vm_area_struct *get_gate_vma(struct task_struct *tsk)
+{
+        return NULL;
+}
diff --git a/arch/s390/kernel/vdso32/Makefile b/arch/s390/kernel/vdso32/Makefile
new file mode 100644
index 000000000000..ca78ad60ba24
--- /dev/null
+++ b/arch/s390/kernel/vdso32/Makefile
@@ -0,0 +1,55 @@
+# List of files in the vdso, has to be asm only for now
+
+obj-vdso32 = gettimeofday.o clock_getres.o clock_gettime.o note.o
+
+# Build rules
+
+targets := $(obj-vdso32) vdso32.so vdso32.so.dbg
+obj-vdso32 := $(addprefix $(obj)/, $(obj-vdso32))
+
+KBUILD_AFLAGS_31 := $(filter-out -m64,$(KBUILD_AFLAGS))
+KBUILD_AFLAGS_31 += -m31 -s
+
+KBUILD_CFLAGS_31 := $(filter-out -m64,$(KBUILD_CFLAGS))
+KBUILD_CFLAGS_31 += -m31 -fPIC -shared -fno-common -fno-builtin
+KBUILD_CFLAGS_31 += -nostdlib -Wl,-soname=linux-vdso32.so.1 \
+                        $(call ld-option, -Wl$(comma)--hash-style=sysv)
+
+$(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_31)
+$(targets:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_31)
+
+obj-y += vdso32_wrapper.o
+extra-y += vdso32.lds
+CPPFLAGS_vdso32.lds += -P -C -U$(ARCH)
+
+# Force dependency (incbin is bad)
+$(obj)/vdso32_wrapper.o : $(obj)/vdso32.so
+
+# link rule for the .so file, .lds has to be first
+$(obj)/vdso32.so.dbg: $(src)/vdso32.lds $(obj-vdso32)
+        $(call if_changed,vdso32ld)
+
+# strip rule for the .so file
+$(obj)/%.so: OBJCOPYFLAGS := -S
+$(obj)/%.so: $(obj)/%.so.dbg FORCE
+        $(call if_changed,objcopy)
+
+# assembly rules for the .S files
+$(obj-vdso32): %.o: %.S
+        $(call if_changed_dep,vdso32as)
+
+# actual build commands
+quiet_cmd_vdso32ld = VDSO32L $@
+      cmd_vdso32ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
+quiet_cmd_vdso32as = VDSO32A $@
+      cmd_vdso32as = $(CC) $(a_flags) -c -o $@ $<
+
+# install commands for the unstripped file
+quiet_cmd_vdso_install = INSTALL $@
+      cmd_vdso_install = cp $(obj)/$@.dbg $(MODLIB)/vdso/$@
+
+vdso32.so: $(obj)/vdso32.so.dbg
+        @mkdir -p $(MODLIB)/vdso
+        $(call cmd,vdso_install)
+
+vdso_install: vdso32.so
diff --git a/arch/s390/kernel/vdso32/clock_getres.S b/arch/s390/kernel/vdso32/clock_getres.S
new file mode 100644
index 000000000000..9532c4e6a9d2
--- /dev/null
+++ b/arch/s390/kernel/vdso32/clock_getres.S
@@ -0,0 +1,39 @@
+/*
+ * Userland implementation of clock_getres() for 32 bits processes in a
+ * s390 kernel for use in the vDSO
+ *
+ *  Copyright IBM Corp. 2008
+ *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License (version 2 only)
+ * as published by the Free Software Foundation.
+ */
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+
+        .text
+        .align 4
+        .globl __kernel_clock_getres
+        .type  __kernel_clock_getres,@function
+__kernel_clock_getres:
+        .cfi_startproc
+        chi     %r2,CLOCK_REALTIME
+        je      0f
+        chi     %r2,CLOCK_MONOTONIC
+        jne     3f
+0:      ltr     %r3,%r3
+        jz      2f                              /* res == NULL */
+        basr    %r1,0
+1:      l       %r0,4f-1b(%r1)
+        xc      0(4,%r3),0(%r3)                 /* set tp->tv_sec to zero */
+        st      %r0,4(%r3)                      /* store tp->tv_usec */
+2:      lhi     %r2,0
+        br      %r14
+3:      lhi     %r1,__NR_clock_getres           /* fallback to svc */
+        svc     0
+        br      %r14
+4:      .long   CLOCK_REALTIME_RES
+        .cfi_endproc
+        .size   __kernel_clock_getres,.-__kernel_clock_getres
diff --git a/arch/s390/kernel/vdso32/clock_gettime.S b/arch/s390/kernel/vdso32/clock_gettime.S
new file mode 100644
index 000000000000..4a98909a8310
--- /dev/null
+++ b/arch/s390/kernel/vdso32/clock_gettime.S
@@ -0,0 +1,128 @@
+/*
+ * Userland implementation of clock_gettime() for 32 bits processes in a
+ * s390 kernel for use in the vDSO
+ *
+ *  Copyright IBM Corp. 2008
+ *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License (version 2 only)
+ * as published by the Free Software Foundation.
+ */
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+
+        .text
+        .align 4
+        .globl __kernel_clock_gettime
+        .type  __kernel_clock_gettime,@function
+__kernel_clock_gettime:
+        .cfi_startproc
+        basr    %r5,0
+0:      al      %r5,21f-0b(%r5)                 /* get &_vdso_data */
+        chi     %r2,CLOCK_REALTIME
+        je      10f
+        chi     %r2,CLOCK_MONOTONIC
+        jne     19f
+
+        /* CLOCK_MONOTONIC */
+        ltr     %r3,%r3
+        jz      9f                              /* tp == NULL */
+1:      l       %r4,__VDSO_UPD_COUNT+4(%r5)     /* load update counter */
+        tml     %r4,0x0001                      /* pending update ? loop */
+        jnz     1b
+        stck    24(%r15)                        /* Store TOD clock */
+        lm      %r0,%r1,24(%r15)
+        s       %r0,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
+        sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
+        brc     3,2f
+        ahi     %r0,-1
+2:      mhi     %r0,1000                        /* cyc2ns(clock,cycle_delta) */
+        lr      %r2,%r0
+        lhi     %r0,1000
+        ltr     %r1,%r1
+        mr      %r0,%r0
+        jnm     3f
+        ahi     %r0,1000
+3:      alr     %r0,%r2
+        srdl    %r0,12
+        al      %r0,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
+        al      %r1,__VDSO_XTIME_NSEC+4(%r5)
+        brc     12,4f
+        ahi     %r0,1
+4:      l       %r2,__VDSO_XTIME_SEC+4(%r5)
+        al      %r0,__VDSO_WTOM_NSEC(%r5)       /*  + wall_to_monotonic */
+        al      %r1,__VDSO_WTOM_NSEC+4(%r5)
+        brc     12,5f
+        ahi     %r0,1
+5:      al      %r2,__VDSO_WTOM_SEC+4(%r5)
+        cl      %r4,__VDSO_UPD_COUNT+4(%r5)     /* check update counter */
+        jne     1b
+        basr    %r5,0
+6:      ltr     %r0,%r0
+        jnz     7f
+        cl      %r1,20f-6b(%r5)
+        jl      8f
+7:      ahi     %r2,1
+        sl      %r1,20f-6b(%r5)
+        brc     3,6b
+        ahi     %r0,-1
+        j       6b
+8:      st      %r2,0(%r3)                      /* store tp->tv_sec */
+        st      %r1,4(%r3)                      /* store tp->tv_nsec */
+9:      lhi     %r2,0
+        br      %r14
+
+        /* CLOCK_REALTIME */
+10:     ltr     %r3,%r3                         /* tp == NULL */
+        jz      18f
+11:     l       %r4,__VDSO_UPD_COUNT+4(%r5)     /* load update counter */
+        tml     %r4,0x0001                      /* pending update ? loop */
+        jnz     11b
+        stck    24(%r15)                        /* Store TOD clock */
+        lm      %r0,%r1,24(%r15)
+        s       %r0,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
+        sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
+        brc     3,12f
+        ahi     %r0,-1
+12:     mhi     %r0,1000                        /* cyc2ns(clock,cycle_delta) */
+        lr      %r2,%r0
+        lhi     %r0,1000
+        ltr     %r1,%r1
+        mr      %r0,%r0
+        jnm     13f
+        ahi     %r0,1000
+13:     alr     %r0,%r2
+        srdl    %r0,12
+        al      %r0,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
+        al      %r1,__VDSO_XTIME_NSEC+4(%r5)
+        brc     12,14f
+        ahi     %r0,1
+14:     l       %r2,__VDSO_XTIME_SEC+4(%r5)
+        cl      %r4,__VDSO_UPD_COUNT+4(%r5)     /* check update counter */
+        jne     11b
+        basr    %r5,0
+15:     ltr     %r0,%r0
+        jnz     16f
+        cl      %r1,20f-15b(%r5)
+        jl      17f
+16:     ahi     %r2,1
+        sl      %r1,20f-15b(%r5)
+        brc     3,15b
+        ahi     %r0,-1
+        j       15b
+17:     st      %r2,0(%r3)                      /* store tp->tv_sec */
+        st      %r1,4(%r3)                      /* store tp->tv_nsec */
+18:     lhi     %r2,0
+        br      %r14
+
+        /* Fallback to system call */
+19:     lhi     %r1,__NR_clock_gettime
+        svc     0
+        br      %r14
+
+20:     .long   1000000000
+21:     .long   _vdso_data - 0b
+        .cfi_endproc
+        .size   __kernel_clock_gettime,.-__kernel_clock_gettime
diff --git a/arch/s390/kernel/vdso32/gettimeofday.S b/arch/s390/kernel/vdso32/gettimeofday.S
new file mode 100644
index 000000000000..c32f29c3d70c
--- /dev/null
+++ b/arch/s390/kernel/vdso32/gettimeofday.S
@@ -0,0 +1,82 @@
+/*
+ * Userland implementation of gettimeofday() for 32 bits processes in a
+ * s390 kernel for use in the vDSO
+ *
+ *  Copyright IBM Corp. 2008
+ *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License (version 2 only)
+ * as published by the Free Software Foundation.
+ */
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+
+        .text
+        .align 4
+        .globl __kernel_gettimeofday
+        .type  __kernel_gettimeofday,@function
+__kernel_gettimeofday:
+        .cfi_startproc
+        basr    %r5,0
+0:      al      %r5,13f-0b(%r5)                 /* get &_vdso_data */
+1:      ltr     %r3,%r3                         /* check if tz is NULL */
+        je      2f
+        mvc     0(8,%r3),__VDSO_TIMEZONE(%r5)
+2:      ltr     %r2,%r2                         /* check if tv is NULL */
+        je      10f
+        l       %r4,__VDSO_UPD_COUNT+4(%r5)     /* load update counter */
+        tml     %r4,0x0001                      /* pending update ? loop */
+        jnz     1b
+        stck    24(%r15)                        /* Store TOD clock */
+        lm      %r0,%r1,24(%r15)
+        s       %r0,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
+        sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
+        brc     3,3f
+        ahi     %r0,-1
+3:      mhi     %r0,1000                        /* cyc2ns(clock,cycle_delta) */
+        st      %r0,24(%r15)
+        lhi     %r0,1000
+        ltr     %r1,%r1
+        mr      %r0,%r0
+        jnm     4f
+        ahi     %r0,1000
+4:      al      %r0,24(%r15)
+        srdl    %r0,12
+        al      %r0,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
+        al      %r1,__VDSO_XTIME_NSEC+4(%r5)
+        brc     12,5f
+        ahi     %r0,1
+5:      mvc     24(4,%r15),__VDSO_XTIME_SEC+4(%r5)
+        cl      %r4,__VDSO_UPD_COUNT+4(%r5)     /* check update counter */
+        jne     1b
+        l       %r4,24(%r15)                    /* get tv_sec from stack */
+        basr    %r5,0
+6:      ltr     %r0,%r0
+        jnz     7f
+        cl      %r1,11f-6b(%r5)
+        jl      8f
+7:      ahi     %r4,1
+        sl      %r1,11f-6b(%r5)
+        brc     3,6b
+        ahi     %r0,-1
+        j       6b
+8:      st      %r4,0(%r2)                      /* store tv->tv_sec */
+        ltr     %r1,%r1
+        m       %r0,12f-6b(%r5)
+        jnm     9f
+        al      %r0,12f-6b(%r5)
+9:      srl     %r0,6
+        st      %r0,4(%r2)                      /* store tv->tv_usec */
+10:     slr     %r2,%r2
+        br      %r14
+11:     .long   1000000000
+12:     .long   274877907
+13:     .long   _vdso_data - 0b
+        .cfi_endproc
+        .size   __kernel_gettimeofday,.-__kernel_gettimeofday
diff --git a/arch/s390/kernel/vdso32/note.S b/arch/s390/kernel/vdso32/note.S
new file mode 100644
index 000000000000..79a071e4357e
--- /dev/null
+++ b/arch/s390/kernel/vdso32/note.S
@@ -0,0 +1,12 @@
+/*
+ * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
+ * Here we can supply some information useful to userland.
+ */
+
+#include <linux/uts.h>
+#include <linux/version.h>
+#include <linux/elfnote.h>
+
+ELFNOTE_START(Linux, 0, "a")
+        .long LINUX_VERSION_CODE
+ELFNOTE_END
diff --git a/arch/s390/kernel/vdso32/vdso32.lds.S b/arch/s390/kernel/vdso32/vdso32.lds.S
new file mode 100644
index 000000000000..a8c379fa1247
--- /dev/null
+++ b/arch/s390/kernel/vdso32/vdso32.lds.S
@@ -0,0 +1,138 @@
+/*
+ * This is the infamous ld script for the 32 bits vdso
+ * library
+ */
+#include <asm/vdso.h>
+
+OUTPUT_FORMAT("elf32-s390", "elf32-s390", "elf32-s390")
+OUTPUT_ARCH(s390:31-bit)
+ENTRY(_start)
+
+SECTIONS
+{
+        . = VDSO32_LBASE + SIZEOF_HEADERS;
+
+        .hash           : { *(.hash) }                  :text
+        .gnu.hash       : { *(.gnu.hash) }
+        .dynsym         : { *(.dynsym) }
+        .dynstr         : { *(.dynstr) }
+        .gnu.version    : { *(.gnu.version) }
+        .gnu.version_d  : { *(.gnu.version_d) }
+        .gnu.version_r  : { *(.gnu.version_r) }
+
+        .note           : { *(.note.*) }                :text   :note
+
+        . = ALIGN(16);
+        .text           : {
+                *(.text .stub .text.* .gnu.linkonce.t.*)
+        } :text
+        PROVIDE(__etext = .);
+        PROVIDE(_etext = .);
+        PROVIDE(etext = .);
+
+        /*
+         * Other stuff is appended to the text segment:
+         */
+        .rodata         : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
+        .rodata1        : { *(.rodata1) }
+
+        .dynamic        : { *(.dynamic) }               :text   :dynamic
+
+        .eh_frame_hdr   : { *(.eh_frame_hdr) }          :text   :eh_frame_hdr
+        .eh_frame       : { KEEP (*(.eh_frame)) }       :text
+        .gcc_except_table : { *(.gcc_except_table .gcc_except_table.*) }
+
+        .rela.dyn ALIGN(8) : { *(.rela.dyn) }
+        .got ALIGN(8)   : { *(.got .toc) }
+
+        _end = .;
+        PROVIDE(end = .);
+
+        /*
+         * Stabs debugging sections are here too.
+         */
+        .stab          0 : { *(.stab) }
+        .stabstr       0 : { *(.stabstr) }
+        .stab.excl     0 : { *(.stab.excl) }
+        .stab.exclstr  0 : { *(.stab.exclstr) }
+        .stab.index    0 : { *(.stab.index) }
+        .stab.indexstr 0 : { *(.stab.indexstr) }
+        .comment       0 : { *(.comment) }
+
+        /*
+         * DWARF debug sections.
+         * Symbols in the DWARF debugging sections are relative to the
+         * beginning of the section so we begin them at 0.
+         */
+        /* DWARF 1 */
+        .debug          0 : { *(.debug) }
+        .line           0 : { *(.line) }
+        /* GNU DWARF 1 extensions */
+        .debug_srcinfo  0 : { *(.debug_srcinfo) }
+        .debug_sfnames  0 : { *(.debug_sfnames) }
+        /* DWARF 1.1 and DWARF 2 */
+        .debug_aranges  0 : { *(.debug_aranges) }
+        .debug_pubnames 0 : { *(.debug_pubnames) }
+        /* DWARF 2 */
+        .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+        .debug_abbrev   0 : { *(.debug_abbrev) }
+        .debug_line     0 : { *(.debug_line) }
+        .debug_frame    0 : { *(.debug_frame) }
+        .debug_str      0 : { *(.debug_str) }
+        .debug_loc      0 : { *(.debug_loc) }
+        .debug_macinfo  0 : { *(.debug_macinfo) }
+        /* SGI/MIPS DWARF 2 extensions */
+        .debug_weaknames 0 : { *(.debug_weaknames) }
+        .debug_funcnames 0 : { *(.debug_funcnames) }
+        .debug_typenames 0 : { *(.debug_typenames) }
+        .debug_varnames  0 : { *(.debug_varnames) }
+        /* DWARF 3 */
+        .debug_pubtypes 0 : { *(.debug_pubtypes) }
+        .debug_ranges   0 : { *(.debug_ranges) }
+        .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
+
+        . = ALIGN(4096);
+        PROVIDE(_vdso_data = .);
+
+        /DISCARD/       : {
+                *(.note.GNU-stack)
+                *(.branch_lt)
+                *(.data .data.* .gnu.linkonce.d.* .sdata*)
+                *(.bss .sbss .dynbss .dynsbss)
+        }
+}
+
+/*
+ * Very old versions of ld do not recognize this name token; use the constant.
+ */
+#define PT_GNU_EH_FRAME 0x6474e550
+
+/*
+ * We must supply the ELF program headers explicitly to get just one
+ * PT_LOAD segment, and set the flags explicitly to make segments read-only.
+ */
+PHDRS
+{
+        text            PT_LOAD FILEHDR PHDRS FLAGS(5); /* PF_R|PF_X */
+        dynamic         PT_DYNAMIC FLAGS(4);            /* PF_R */
+        note            PT_NOTE FLAGS(4);               /* PF_R */
+        eh_frame_hdr    PT_GNU_EH_FRAME;
+}
+
+/*
+ * This controls what symbols we export from the DSO.
+ */
+VERSION
+{
+        VDSO_VERSION_STRING {
+        global:
+                /*
+                 * Has to be there for the kernel to find
+                 */
+                __kernel_gettimeofday;
+                __kernel_clock_gettime;
+                __kernel_clock_getres;
+
+        local: *;
+        };
+}
diff --git a/arch/s390/kernel/vdso32/vdso32_wrapper.S b/arch/s390/kernel/vdso32/vdso32_wrapper.S
new file mode 100644
index 000000000000..61639a89e70b
--- /dev/null
+++ b/arch/s390/kernel/vdso32/vdso32_wrapper.S
@@ -0,0 +1,13 @@
+#include <linux/init.h>
+#include <asm/page.h>
+
+        .section ".data.page_aligned"
+
+        .globl vdso32_start, vdso32_end
+        .balign PAGE_SIZE
+vdso32_start:
+        .incbin "arch/s390/kernel/vdso32/vdso32.so"
+        .balign PAGE_SIZE
+vdso32_end:
+
+        .previous
diff --git a/arch/s390/kernel/vdso64/Makefile b/arch/s390/kernel/vdso64/Makefile
new file mode 100644
index 000000000000..6fc8e829258c
--- /dev/null
+++ b/arch/s390/kernel/vdso64/Makefile
@@ -0,0 +1,55 @@
+# List of files in the vdso, has to be asm only for now
+
+obj-vdso64 = gettimeofday.o clock_getres.o clock_gettime.o note.o
+
+# Build rules
+
+targets := $(obj-vdso64) vdso64.so vdso64.so.dbg
+obj-vdso64 := $(addprefix $(obj)/, $(obj-vdso64))
+
+KBUILD_AFLAGS_64 := $(filter-out -m64,$(KBUILD_AFLAGS))
+KBUILD_AFLAGS_64 += -m64 -s
+
+KBUILD_CFLAGS_64 := $(filter-out -m64,$(KBUILD_CFLAGS))
+KBUILD_CFLAGS_64 += -m64 -fPIC -shared -fno-common -fno-builtin
+KBUILD_CFLAGS_64 += -nostdlib -Wl,-soname=linux-vdso64.so.1 \
+                        $(call ld-option, -Wl$(comma)--hash-style=sysv)
+
+$(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_64)
+$(targets:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_64)
+
+obj-y += vdso64_wrapper.o
+extra-y += vdso64.lds
+CPPFLAGS_vdso64.lds += -P -C -U$(ARCH)
+
+# Force dependency (incbin is bad)
+$(obj)/vdso64_wrapper.o : $(obj)/vdso64.so
+
+# link rule for the .so file, .lds has to be first
+$(obj)/vdso64.so.dbg: $(src)/vdso64.lds $(obj-vdso64)
+        $(call if_changed,vdso64ld)
+
+# strip rule for the .so file
+$(obj)/%.so: OBJCOPYFLAGS := -S
+$(obj)/%.so: $(obj)/%.so.dbg FORCE
+        $(call if_changed,objcopy)
+
+# assembly rules for the .S files
+$(obj-vdso64): %.o: %.S
+        $(call if_changed_dep,vdso64as)
+
+# actual build commands
+quiet_cmd_vdso64ld = VDSO64L $@
+      cmd_vdso64ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
+quiet_cmd_vdso64as = VDSO64A $@
+      cmd_vdso64as = $(CC) $(a_flags) -c -o $@ $<
+
+# install commands for the unstripped file
+quiet_cmd_vdso_install = INSTALL $@
+      cmd_vdso_install = cp $(obj)/$@.dbg $(MODLIB)/vdso/$@
+
+vdso64.so: $(obj)/vdso64.so.dbg
+        @mkdir -p $(MODLIB)/vdso
+        $(call cmd,vdso_install)
+
+vdso_install: vdso64.so
diff --git a/arch/s390/kernel/vdso64/clock_getres.S b/arch/s390/kernel/vdso64/clock_getres.S
new file mode 100644
index 000000000000..9ce8caafdb4e
--- /dev/null
+++ b/arch/s390/kernel/vdso64/clock_getres.S
@@ -0,0 +1,44 @@
+/*
+ * Userland implementation of clock_getres() for 64 bits processes in a
+ * s390 kernel for use in the vDSO
+ *
+ *  Copyright IBM Corp. 2008
+ *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License (version 2 only)
+ * as published by the Free Software Foundation.
+ */
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+
+        .text
+        .align 4
+        .globl __kernel_clock_getres
+        .type  __kernel_clock_getres,@function
+__kernel_clock_getres:
+        .cfi_startproc
+        cghi    %r2,CLOCK_REALTIME
+        je      0f
+        cghi    %r2,CLOCK_MONOTONIC
+        je      0f
+        cghi    %r2,-2          /* CLOCK_THREAD_CPUTIME_ID for this thread */
+        jne     2f
+        larl    %r5,_vdso_data
+        icm     %r0,15,__LC_ECTG_OK(%r5)
+        jz      2f
+0:      ltgr    %r3,%r3
+        jz      1f                              /* res == NULL */
+        larl    %r1,3f
+        lg      %r0,0(%r1)
+        xc      0(8,%r3),0(%r3)                 /* set tp->tv_sec to zero */
+        stg     %r0,8(%r3)                      /* store tp->tv_usec */
+1:      lghi    %r2,0
+        br      %r14
+2:      lghi    %r1,__NR_clock_getres           /* fallback to svc */
+        svc     0
+        br      %r14
+3:      .quad   CLOCK_REALTIME_RES
+        .cfi_endproc
+        .size   __kernel_clock_getres,.-__kernel_clock_getres
diff --git a/arch/s390/kernel/vdso64/clock_gettime.S b/arch/s390/kernel/vdso64/clock_gettime.S
new file mode 100644
index 000000000000..79dbfee831ec
--- /dev/null
+++ b/arch/s390/kernel/vdso64/clock_gettime.S
@@ -0,0 +1,118 @@
+/*
+ * Userland implementation of clock_gettime() for 64 bits processes in a
+ * s390 kernel for use in the vDSO
+ *
+ *  Copyright IBM Corp. 2008
+ *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License (version 2 only)
+ * as published by the Free Software Foundation.
+ */
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+
+        .text
+        .align 4
+        .globl __kernel_clock_gettime
+        .type  __kernel_clock_gettime,@function
+__kernel_clock_gettime:
+        .cfi_startproc
+        larl    %r5,_vdso_data
+        cghi    %r2,CLOCK_REALTIME
+        je      4f
+        cghi    %r2,-2          /* CLOCK_THREAD_CPUTIME_ID for this thread */
+        je      9f
+        cghi    %r2,CLOCK_MONOTONIC
+        jne     12f
+
+        /* CLOCK_MONOTONIC */
+        ltgr    %r3,%r3
+        jz      3f                              /* tp == NULL */
+0:      lg      %r4,__VDSO_UPD_COUNT(%r5)       /* load update counter */
+        tmll    %r4,0x0001                      /* pending update ? loop */
+        jnz     0b
+        stck    48(%r15)                        /* Store TOD clock */
+        lg      %r1,48(%r15)
+        sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
+        mghi    %r1,1000
+        srlg    %r1,%r1,12                      /* cyc2ns(clock,cycle_delta) */
+        alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
+        lg      %r0,__VDSO_XTIME_SEC(%r5)
+        alg     %r1,__VDSO_WTOM_NSEC(%r5)       /*  + wall_to_monotonic */
+        alg     %r0,__VDSO_WTOM_SEC(%r5)
+        clg     %r4,__VDSO_UPD_COUNT(%r5)       /* check update counter */
+        jne     0b
+        larl    %r5,13f
+1:      clg     %r1,0(%r5)
+        jl      2f
+        slg     %r1,0(%r5)
+        aghi    %r0,1
+        j       1b
+2:      stg     %r0,0(%r3)                      /* store tp->tv_sec */
+        stg     %r1,8(%r3)                      /* store tp->tv_nsec */
+3:      lghi    %r2,0
+        br      %r14
+
+        /* CLOCK_REALTIME */
+4:      ltr     %r3,%r3                         /* tp == NULL */
+        jz      8f
+5:      lg      %r4,__VDSO_UPD_COUNT(%r5)       /* load update counter */
+        tmll    %r4,0x0001                      /* pending update ? loop */
+        jnz     5b
+        stck    48(%r15)                        /* Store TOD clock */
+        lg      %r1,48(%r15)
+        sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
+        mghi    %r1,1000
+        srlg    %r1,%r1,12                      /* cyc2ns(clock,cycle_delta) */
+        alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
+        lg      %r0,__VDSO_XTIME_SEC(%r5)
+        clg     %r4,__VDSO_UPD_COUNT(%r5)       /* check update counter */
+        jne     5b
+        larl    %r5,13f
+6:      clg     %r1,0(%r5)
+        jl      7f
+        slg     %r1,0(%r5)
+        aghi    %r0,1
+        j       6b
+7:      stg     %r0,0(%r3)                      /* store tp->tv_sec */
+        stg     %r1,8(%r3)                      /* store tp->tv_nsec */
+8:      lghi    %r2,0
+        br      %r14
+
+        /* CLOCK_THREAD_CPUTIME_ID for this thread */
+9:      icm     %r0,15,__VDSO_ECTG_OK(%r5)
+        jz      12f
+        ear     %r2,%a4
+        llilh   %r4,0x0100
+        sar     %a4,%r4
+        lghi    %r4,0
+        sacf    512                             /* Magic ectg instruction */
+        .insn   ssf,0xc80100000000,__VDSO_ECTG_BASE(4),__VDSO_ECTG_USER(4),4
+        sacf    0
+        sar     %a4,%r2
+        algr    %r1,%r0                         /* r1 = cputime as TOD value */
+        mghi    %r1,1000                        /* convert to nanoseconds */
+        srlg    %r1,%r1,12                      /* r1 = cputime in nanosec */
+        lgr     %r4,%r1
+        larl    %r5,13f
+        srlg    %r1,%r1,9                       /* divide by 1000000000 */
+        mlg     %r0,8(%r5)
+        srlg    %r0,%r0,11                      /* r0 = tv_sec */
+        stg     %r0,0(%r3)
+        msg     %r0,0(%r5)                      /* calculate tv_nsec */
+        slgr    %r4,%r0                         /* r4 = tv_nsec */
+        stg     %r4,8(%r3)
+        lghi    %r2,0
+        br      %r14
+
+        /* Fallback to system call */
+12:     lghi    %r1,__NR_clock_gettime
+        svc     0
+        br      %r14
+
+13:     .quad   1000000000
+14:     .quad   19342813113834067
+        .cfi_endproc
+        .size   __kernel_clock_gettime,.-__kernel_clock_gettime
diff --git a/arch/s390/kernel/vdso64/gettimeofday.S b/arch/s390/kernel/vdso64/gettimeofday.S
new file mode 100644
index 000000000000..f873e75634e1
--- /dev/null
+++ b/arch/s390/kernel/vdso64/gettimeofday.S
@@ -0,0 +1,56 @@
+/*
+ * Userland implementation of gettimeofday() for 64 bits processes in a
+ * s390 kernel for use in the vDSO
+ *
+ *  Copyright IBM Corp. 2008
+ *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License (version 2 only)
+ * as published by the Free Software Foundation.
+ */
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+
+        .text
+        .align 4
+        .globl __kernel_gettimeofday
+        .type  __kernel_gettimeofday,@function
+__kernel_gettimeofday:
+        .cfi_startproc
+        larl    %r5,_vdso_data
+0:      ltgr    %r3,%r3                         /* check if tz is NULL */
+        je      1f
+        mvc     0(8,%r3),__VDSO_TIMEZONE(%r5)
+1:      ltgr    %r2,%r2                         /* check if tv is NULL */
+        je      4f
+        lg      %r4,__VDSO_UPD_COUNT(%r5)       /* load update counter */
+        tmll    %r4,0x0001                      /* pending update ? loop */
+        jnz     0b
+        stck    48(%r15)                        /* Store TOD clock */
+        lg      %r1,48(%r15)
+        sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
+        mghi    %r1,1000
+        srlg    %r1,%r1,12                      /* cyc2ns(clock,cycle_delta) */
+        alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + xtime.tv_nsec */
+        lg      %r0,__VDSO_XTIME_SEC(%r5)       /* xtime.tv_sec */
+        clg     %r4,__VDSO_UPD_COUNT(%r5)       /* check update counter */
+        jne     0b
+        larl    %r5,5f
+2:      clg     %r1,0(%r5)
+        jl      3f
+        slg     %r1,0(%r5)
+        aghi    %r0,1
+        j       2b
+3:      stg     %r0,0(%r2)                      /* store tv->tv_sec */
+        slgr    %r0,%r0                         /* tv_nsec -> tv_usec */
+        ml      %r0,8(%r5)
+        srlg    %r0,%r0,6
+        stg     %r0,8(%r2)                      /* store tv->tv_usec */
+4:      lghi    %r2,0
+        br      %r14
+5:      .quad   1000000000
+        .long   274877907
+        .cfi_endproc
+        .size   __kernel_gettimeofday,.-__kernel_gettimeofday
diff --git a/arch/s390/kernel/vdso64/note.S b/arch/s390/kernel/vdso64/note.S
new file mode 100644
index 000000000000..79a071e4357e
--- /dev/null
+++ b/arch/s390/kernel/vdso64/note.S
@@ -0,0 +1,12 @@
+/*
+ * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
+ * Here we can supply some information useful to userland.
+ */
+
+#include <linux/uts.h>
+#include <linux/version.h>
+#include <linux/elfnote.h>
+
+ELFNOTE_START(Linux, 0, "a")
+        .long LINUX_VERSION_CODE
+ELFNOTE_END
diff --git a/arch/s390/kernel/vdso64/vdso64.lds.S b/arch/s390/kernel/vdso64/vdso64.lds.S
new file mode 100644
index 000000000000..9f5979d102a9
--- /dev/null
+++ b/arch/s390/kernel/vdso64/vdso64.lds.S
@@ -0,0 +1,138 @@
+/*
+ * This is the infamous ld script for the 64 bits vdso
+ * library
+ */
+#include <asm/vdso.h>
+
+OUTPUT_FORMAT("elf64-s390", "elf64-s390", "elf64-s390")
+OUTPUT_ARCH(s390:64-bit)
+ENTRY(_start)
+
+SECTIONS
+{
+        . = VDSO64_LBASE + SIZEOF_HEADERS;
+
+        .hash           : { *(.hash) }                  :text
+        .gnu.hash       : { *(.gnu.hash) }
+        .dynsym         : { *(.dynsym) }
+        .dynstr         : { *(.dynstr) }
+        .gnu.version    : { *(.gnu.version) }
+        .gnu.version_d  : { *(.gnu.version_d) }
+        .gnu.version_r  : { *(.gnu.version_r) }
+
+        .note           : { *(.note.*) }                :text   :note
+
+        . = ALIGN(16);
+        .text           : {
+                *(.text .stub .text.* .gnu.linkonce.t.*)
+        } :text
+        PROVIDE(__etext = .);
+        PROVIDE(_etext = .);
+        PROVIDE(etext = .);
+
+        /*
+         * Other stuff is appended to the text segment:
+         */
+        .rodata         : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
+        .rodata1        : { *(.rodata1) }
+
+        .dynamic        : { *(.dynamic) }               :text   :dynamic
+
+        .eh_frame_hdr   : { *(.eh_frame_hdr) }          :text   :eh_frame_hdr
+        .eh_frame       : { KEEP (*(.eh_frame)) }       :text
+        .gcc_except_table : { *(.gcc_except_table .gcc_except_table.*) }
+
+        .rela.dyn ALIGN(8) : { *(.rela.dyn) }
+        .got ALIGN(8)   : { *(.got .toc) }
+
+        _end = .;
+        PROVIDE(end = .);
+
+        /*
+         * Stabs debugging sections are here too.
+         */
+        .stab          0 : { *(.stab) }
+        .stabstr       0 : { *(.stabstr) }
+        .stab.excl     0 : { *(.stab.excl) }
+        .stab.exclstr  0 : { *(.stab.exclstr) }
+        .stab.index    0 : { *(.stab.index) }
+        .stab.indexstr 0 : { *(.stab.indexstr) }
+        .comment       0 : { *(.comment) }
+
+        /*
+         * DWARF debug sections.
+         * Symbols in the DWARF debugging sections are relative to the
+         * beginning of the section so we begin them at 0.
+         */
+        /* DWARF 1 */
+        .debug          0 : { *(.debug) }
+        .line           0 : { *(.line) }
+        /* GNU DWARF 1 extensions */
+        .debug_srcinfo  0 : { *(.debug_srcinfo) }
+        .debug_sfnames  0 : { *(.debug_sfnames) }
+        /* DWARF 1.1 and DWARF 2 */
+        .debug_aranges  0 : { *(.debug_aranges) }
+        .debug_pubnames 0 : { *(.debug_pubnames) }
+        /* DWARF 2 */
+        .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+        .debug_abbrev   0 : { *(.debug_abbrev) }
+        .debug_line     0 : { *(.debug_line) }
+        .debug_frame    0 : { *(.debug_frame) }
+        .debug_str      0 : { *(.debug_str) }
+        .debug_loc      0 : { *(.debug_loc) }
+        .debug_macinfo  0 : { *(.debug_macinfo) }
+        /* SGI/MIPS DWARF 2 extensions */
+        .debug_weaknames 0 : { *(.debug_weaknames) }
+        .debug_funcnames 0 : { *(.debug_funcnames) }
+        .debug_typenames 0 : { *(.debug_typenames) }
+        .debug_varnames  0 : { *(.debug_varnames) }
+        /* DWARF 3 */
+        .debug_pubtypes 0 : { *(.debug_pubtypes) }
+        .debug_ranges   0 : { *(.debug_ranges) }
+        .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
+
+        . = ALIGN(4096);
+        PROVIDE(_vdso_data = .);
+
+        /DISCARD/       : {
+                *(.note.GNU-stack)
+                *(.branch_lt)
+                *(.data .data.* .gnu.linkonce.d.* .sdata*)
+                *(.bss .sbss .dynbss .dynsbss)
+        }
+}
+
+/*
+ * Very old versions of ld do not recognize this name token; use the constant.
+ */
+#define PT_GNU_EH_FRAME 0x6474e550
+
+/*
+ * We must supply the ELF program headers explicitly to get just one
+ * PT_LOAD segment, and set the flags explicitly to make segments read-only.
+ */
+PHDRS
+{
+        text            PT_LOAD FILEHDR PHDRS FLAGS(5); /* PF_R|PF_X */
+        dynamic         PT_DYNAMIC FLAGS(4);            /* PF_R */
+        note            PT_NOTE FLAGS(4);               /* PF_R */
+        eh_frame_hdr    PT_GNU_EH_FRAME;
+}
+
+/*
+ * This controls what symbols we export from the DSO.
+ */
+VERSION
+{
+        VDSO_VERSION_STRING {
+        global:
+                /*
+                 * Has to be there for the kernel to find
+                 */
+                __kernel_gettimeofday;
+                __kernel_clock_gettime;
+                __kernel_clock_getres;
+
+        local: *;
+        };
+}
diff --git a/arch/s390/kernel/vdso64/vdso64_wrapper.S b/arch/s390/kernel/vdso64/vdso64_wrapper.S
new file mode 100644
index 000000000000..d8e2ac14d564
--- /dev/null
+++ b/arch/s390/kernel/vdso64/vdso64_wrapper.S
@@ -0,0 +1,13 @@
+#include <linux/init.h>
+#include <asm/page.h>
+
+        .section ".data.page_aligned"
+
+        .globl vdso64_start, vdso64_end
+        .balign PAGE_SIZE
+vdso64_start:
+        .incbin "arch/s390/kernel/vdso64/vdso64.so"
+        .balign PAGE_SIZE
+vdso64_end:
+
+        .previous
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index 0fa5dc5d68e1..2fb36e462194 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -23,20 +23,43 @@
 #include <asm/s390_ext.h>
 #include <asm/timer.h>
 #include <asm/irq_regs.h>
+#include <asm/cpu.h>
 
 static ext_int_info_t ext_int_info_timer;
+
 static DEFINE_PER_CPU(struct vtimer_queue, virt_cpu_timer);
 
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+DEFINE_PER_CPU(struct s390_idle_data, s390_idle) = {
+        .lock = __SPIN_LOCK_UNLOCKED(s390_idle.lock)
+};
+
+static inline __u64 get_vtimer(void)
+{
+        __u64 timer;
+
+        asm volatile("STPT %0" : "=m" (timer));
+        return timer;
+}
+
+static inline void set_vtimer(__u64 expires)
+{
+        __u64 timer;
+
+        asm volatile ("  STPT %0\n"  /* Store current cpu timer value */
+                      "  SPT %1"     /* Set new value immediatly afterwards */
+                      : "=m" (timer) : "m" (expires) );
+        S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer;
+        S390_lowcore.last_update_timer = expires;
+}
+
 /*
  * Update process times based on virtual cpu times stored by entry.S
  * to the lowcore fields user_timer, system_timer & steal_clock.
  */
-void account_process_tick(struct task_struct *tsk, int user_tick)
+static void do_account_vtime(struct task_struct *tsk, int hardirq_offset)
 {
-        cputime_t cputime;
-        __u64 timer, clock;
-        int rcu_user_flag;
+        struct thread_info *ti = task_thread_info(tsk);
+        __u64 timer, clock, user, system, steal;
 
         timer = S390_lowcore.last_update_timer;
         clock = S390_lowcore.last_update_clock;
@@ -45,50 +68,41 @@ void account_process_tick(struct task_struct *tsk, int user_tick)
                       : "=m" (S390_lowcore.last_update_timer),
                         "=m" (S390_lowcore.last_update_clock) );
         S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;
-        S390_lowcore.steal_clock += S390_lowcore.last_update_clock - clock;
-
-        cputime = S390_lowcore.user_timer >> 12;
-        rcu_user_flag = cputime != 0;
-        S390_lowcore.user_timer -= cputime << 12;
-        S390_lowcore.steal_clock -= cputime << 12;
-        account_user_time(tsk, cputime);
-
-        cputime =  S390_lowcore.system_timer >> 12;
-        S390_lowcore.system_timer -= cputime << 12;
-        S390_lowcore.steal_clock -= cputime << 12;
-        account_system_time(tsk, HARDIRQ_OFFSET, cputime);
-
-        cputime = S390_lowcore.steal_clock;
-        if ((__s64) cputime > 0) {
-                cputime >>= 12;
-                S390_lowcore.steal_clock -= cputime << 12;
-                account_steal_time(tsk, cputime);
+        S390_lowcore.steal_timer += S390_lowcore.last_update_clock - clock;
+
+        user = S390_lowcore.user_timer - ti->user_timer;
+        S390_lowcore.steal_timer -= user;
+        ti->user_timer = S390_lowcore.user_timer;
+        account_user_time(tsk, user, user);
+
+        system = S390_lowcore.system_timer - ti->system_timer;
+        S390_lowcore.steal_timer -= system;
+        ti->system_timer = S390_lowcore.system_timer;
+        account_system_time(tsk, hardirq_offset, system, system);
+
+        steal = S390_lowcore.steal_timer;
+        if ((s64) steal > 0) {
+                S390_lowcore.steal_timer = 0;
+                account_steal_time(steal);
         }
 }
 
-/*
- * Update process times based on virtual cpu times stored by entry.S
- * to the lowcore fields user_timer, system_timer & steal_clock.
- */
-void account_vtime(struct task_struct *tsk)
+void account_vtime(struct task_struct *prev, struct task_struct *next)
 {
-        cputime_t cputime;
-        __u64 timer;
-
-        timer = S390_lowcore.last_update_timer;
-        asm volatile ("  STPT %0"    /* Store current cpu timer value */
-                      : "=m" (S390_lowcore.last_update_timer) );
-        S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;
-
-        cputime = S390_lowcore.user_timer >> 12;
-        S390_lowcore.user_timer -= cputime << 12;
-        S390_lowcore.steal_clock -= cputime << 12;
-        account_user_time(tsk, cputime);
+        struct thread_info *ti;
+
+        do_account_vtime(prev, 0);
+        ti = task_thread_info(prev);
+        ti->user_timer = S390_lowcore.user_timer;
+        ti->system_timer = S390_lowcore.system_timer;
+        ti = task_thread_info(next);
+        S390_lowcore.user_timer = ti->user_timer;
+        S390_lowcore.system_timer = ti->system_timer;
+}
 
-        cputime =  S390_lowcore.system_timer >> 12;
-        S390_lowcore.system_timer -= cputime << 12;
-        S390_lowcore.steal_clock -= cputime << 12;
-        account_system_time(tsk, 0, cputime);
+void account_process_tick(struct task_struct *tsk, int user_tick)
+{
+        do_account_vtime(tsk, HARDIRQ_OFFSET);
 }
 
 /*
@@ -97,90 +111,131 @@ void account_vtime(struct task_struct *tsk)
  */
 void account_system_vtime(struct task_struct *tsk)
 {
-        cputime_t cputime;
-        __u64 timer;
+        struct thread_info *ti = task_thread_info(tsk);
+        __u64 timer, system;
 
         timer = S390_lowcore.last_update_timer;
-        asm volatile ("  STPT %0"    /* Store current cpu timer value */
-                      : "=m" (S390_lowcore.last_update_timer) );
+        S390_lowcore.last_update_timer = get_vtimer();
         S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;
 
-        cputime =  S390_lowcore.system_timer >> 12;
-        S390_lowcore.system_timer -= cputime << 12;
-        S390_lowcore.steal_clock -= cputime << 12;
-        account_system_time(tsk, 0, cputime);
+        system = S390_lowcore.system_timer - ti->system_timer;
+        S390_lowcore.steal_timer -= system;
+        ti->system_timer = S390_lowcore.system_timer;
+        account_system_time(tsk, 0, system, system);
 }
 EXPORT_SYMBOL_GPL(account_system_vtime);
 
-static inline void set_vtimer(__u64 expires)
-{
-        __u64 timer;
-
-        asm volatile ("  STPT %0\n"  /* Store current cpu timer value */
-                      "  SPT %1"     /* Set new value immediatly afterwards */
-                      : "=m" (timer) : "m" (expires) );
-        S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer;
-        S390_lowcore.last_update_timer = expires;
-
-        /* store expire time for this CPU timer */
-        __get_cpu_var(virt_cpu_timer).to_expire = expires;
-}
-#else
-static inline void set_vtimer(__u64 expires)
-{
-        S390_lowcore.last_update_timer = expires;
-        asm volatile ("SPT %0" : : "m" (S390_lowcore.last_update_timer));
-
-        /* store expire time for this CPU timer */
-        __get_cpu_var(virt_cpu_timer).to_expire = expires;
-}
-#endif
-
-void vtime_start_cpu_timer(void)
+void vtime_start_cpu(void)
 {
-        struct vtimer_queue *vt_list;
-
-        vt_list = &__get_cpu_var(virt_cpu_timer);
-
-        /* CPU timer interrupt is pending, don't reprogramm it */
-        if (vt_list->idle & 1LL<<63)
-                return;
+        struct s390_idle_data *idle = &__get_cpu_var(s390_idle);
+        struct vtimer_queue *vq = &__get_cpu_var(virt_cpu_timer);
+        __u64 idle_time, expires;
+
+        /* Account time spent with enabled wait psw loaded as idle time. */
+        idle_time = S390_lowcore.int_clock - idle->idle_enter;
+        account_idle_time(idle_time);
+        S390_lowcore.last_update_clock = S390_lowcore.int_clock;
+
+        /* Account system time spent going idle. */
+        S390_lowcore.system_timer += S390_lowcore.last_update_timer - vq->idle;
+        S390_lowcore.last_update_timer = S390_lowcore.async_enter_timer;
+
+        /* Restart vtime CPU timer */
+        if (vq->do_spt) {
+                /* Program old expire value but first save progress. */
+                expires = vq->idle - S390_lowcore.async_enter_timer;
+                expires += get_vtimer();
+                set_vtimer(expires);
+        } else {
+                /* Don't account the CPU timer delta while the cpu was idle. */
+                vq->elapsed -= vq->idle - S390_lowcore.async_enter_timer;
+        }
 
-        if (!list_empty(&vt_list->list))
-                set_vtimer(vt_list->idle);
+        spin_lock(&idle->lock);
+        idle->idle_time += idle_time;
+        idle->idle_enter = 0ULL;
+        idle->idle_count++;
+        spin_unlock(&idle->lock);
 }
 
-void vtime_stop_cpu_timer(void)
+void vtime_stop_cpu(void)
 {
-        struct vtimer_queue *vt_list;
-
-        vt_list = &__get_cpu_var(virt_cpu_timer);
-
-        /* nothing to do */
-        if (list_empty(&vt_list->list)) {
-                vt_list->idle = VTIMER_MAX_SLICE;
-                goto fire;
+        struct s390_idle_data *idle = &__get_cpu_var(s390_idle);
+        struct vtimer_queue *vq = &__get_cpu_var(virt_cpu_timer);
+        psw_t psw;
+
+        /* Wait for external, I/O or machine check interrupt. */
+        psw.mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_IO | PSW_MASK_EXT;
+
+        /* Check if the CPU timer needs to be reprogrammed. */
+        if (vq->do_spt) {
+                __u64 vmax = VTIMER_MAX_SLICE;
+                /*
+                 * The inline assembly is equivalent to
+                 *      vq->idle = get_cpu_timer();
+                 *      set_cpu_timer(VTIMER_MAX_SLICE);
+                 *      idle->idle_enter = get_clock();
+                 *      __load_psw_mask(psw_kernel_bits | PSW_MASK_WAIT |
+                 *                         PSW_MASK_IO | PSW_MASK_EXT);
+                 * The difference is that the inline assembly makes sure that
+                 * the last three instruction are stpt, stck and lpsw in that
+                 * order. This is done to increase the precision.
+                 */
+                asm volatile(
+#ifndef CONFIG_64BIT
+                        "       basr    1,0\n"
+                        "0:     ahi     1,1f-0b\n"
+                        "       st      1,4(%2)\n"
+#else /* CONFIG_64BIT */
+                        "       larl    1,1f\n"
+                        "       stg     1,8(%2)\n"
+#endif /* CONFIG_64BIT */
+                        "       stpt    0(%4)\n"
+                        "       spt     0(%5)\n"
+                        "       stck    0(%3)\n"
+#ifndef CONFIG_64BIT
+                        "       lpsw    0(%2)\n"
+#else /* CONFIG_64BIT */
+                        "       lpswe   0(%2)\n"
+#endif /* CONFIG_64BIT */
+                        "1:"
+                        : "=m" (idle->idle_enter), "=m" (vq->idle)
+                        : "a" (&psw), "a" (&idle->idle_enter),
+                          "a" (&vq->idle), "a" (&vmax), "m" (vmax), "m" (psw)
+                        : "memory", "cc", "1");
+        } else {
+                /*
+                 * The inline assembly is equivalent to
+                 *      vq->idle = get_cpu_timer();
+                 *      idle->idle_enter = get_clock();
+                 *      __load_psw_mask(psw_kernel_bits | PSW_MASK_WAIT |
+                 *                         PSW_MASK_IO | PSW_MASK_EXT);
+                 * The difference is that the inline assembly makes sure that
+                 * the last three instruction are stpt, stck and lpsw in that
+                 * order. This is done to increase the precision.
+                 */
+                asm volatile(
+#ifndef CONFIG_64BIT
+                        "       basr    1,0\n"
+                        "0:     ahi     1,1f-0b\n"
+                        "       st      1,4(%2)\n"
+#else /* CONFIG_64BIT */
+                        "       larl    1,1f\n"
+                        "       stg     1,8(%2)\n"
+#endif /* CONFIG_64BIT */
+                        "       stpt    0(%4)\n"
+                        "       stck    0(%3)\n"
+#ifndef CONFIG_64BIT
+                        "       lpsw    0(%2)\n"
+#else /* CONFIG_64BIT */
+                        "       lpswe   0(%2)\n"
+#endif /* CONFIG_64BIT */
+                        "1:"
+                        : "=m" (idle->idle_enter), "=m" (vq->idle)
+                        : "a" (&psw), "a" (&idle->idle_enter),
+                          "a" (&vq->idle), "m" (psw)
+                        : "memory", "cc", "1");
         }
-
-        /* store the actual expire value */
-        asm volatile ("STPT %0" : "=m" (vt_list->idle));
-
-        /*
-         * If the CPU timer is negative we don't reprogramm
-         * it because we will get instantly an interrupt.
-         */
-        if (vt_list->idle & 1LL<<63)
-                return;
-
-        vt_list->offset += vt_list->to_expire - vt_list->idle;
-
-        /*
-         * We cannot halt the CPU timer, we just write a value that
-         * nearly never expires (only after 71 years) and re-write
-         * the stored expire value if we continue the timer
-         */
- fire:
-        set_vtimer(VTIMER_MAX_SLICE);
 }
 
 /*
@@ -206,30 +261,23 @@ static void list_add_sorted(struct vtimer_list *timer, struct list_head *head)
  */
 static void do_callbacks(struct list_head *cb_list)
 {
-        struct vtimer_queue *vt_list;
+        struct vtimer_queue *vq;
         struct vtimer_list *event, *tmp;
-        void (*fn)(unsigned long);
-        unsigned long data;
 
         if (list_empty(cb_list))
                 return;
 
-        vt_list = &__get_cpu_var(virt_cpu_timer);
+        vq = &__get_cpu_var(virt_cpu_timer);
 
         list_for_each_entry_safe(event, tmp, cb_list, entry) {
-                fn = event->function;
-                data = event->data;
-                fn(data);
-
-                if (!event->interval)
-                        /* delete one shot timer */
-                        list_del_init(&event->entry);
-                else {
-                        /* move interval timer back to list */
-                        spin_lock(&vt_list->lock);
-                        list_del_init(&event->entry);
-                        list_add_sorted(event, &vt_list->list);
-                        spin_unlock(&vt_list->lock);
+                list_del_init(&event->entry);
+                (event->function)(event->data);
+                if (event->interval) {
+                        /* Recharge interval timer */
+                        event->expires = event->interval + vq->elapsed;
+                        spin_lock(&vq->lock);
+                        list_add_sorted(event, &vq->list);
+                        spin_unlock(&vq->lock);
                 }
         }
 }
@@ -239,64 +287,57 @@ static void do_callbacks(struct list_head *cb_list)
  */
 static void do_cpu_timer_interrupt(__u16 error_code)
 {
-        __u64 next, delta;
-        struct vtimer_queue *vt_list;
+        struct vtimer_queue *vq;
         struct vtimer_list *event, *tmp;
-        struct list_head *ptr;
-        /* the callback queue */
-        struct list_head cb_list;
+        struct list_head cb_list;       /* the callback queue */
+        __u64 elapsed, next;
 
         INIT_LIST_HEAD(&cb_list);
-        vt_list = &__get_cpu_var(virt_cpu_timer);
+        vq = &__get_cpu_var(virt_cpu_timer);
 
         /* walk timer list, fire all expired events */
-        spin_lock(&vt_list->lock);
-
-        if (vt_list->to_expire < VTIMER_MAX_SLICE)
-                vt_list->offset += vt_list->to_expire;
-
-        list_for_each_entry_safe(event, tmp, &vt_list->list, entry) {
-                if (event->expires > vt_list->offset)
-                        /* found first unexpired event, leave */
-                        break;
-
-                /* re-charge interval timer, we have to add the offset */
-                if (event->interval)
-                        event->expires = event->interval + vt_list->offset;
-
-                /* move expired timer to the callback queue */
-                list_move_tail(&event->entry, &cb_list);
+        spin_lock(&vq->lock);
+
+        elapsed = vq->elapsed + (vq->timer - S390_lowcore.async_enter_timer);
+        BUG_ON((s64) elapsed < 0);
+        vq->elapsed = 0;
+        list_for_each_entry_safe(event, tmp, &vq->list, entry) {
+                if (event->expires < elapsed)
+                        /* move expired timer to the callback queue */
+                        list_move_tail(&event->entry, &cb_list);
+                else
+                        event->expires -= elapsed;
         }
-        spin_unlock(&vt_list->lock);
+        spin_unlock(&vq->lock);
+
+        vq->do_spt = list_empty(&cb_list);
         do_callbacks(&cb_list);
 
         /* next event is first in list */
-        spin_lock(&vt_list->lock);
-        if (!list_empty(&vt_list->list)) {
-                ptr = vt_list->list.next;
-                event = list_entry(ptr, struct vtimer_list, entry);
-                next = event->expires - vt_list->offset;
-
-                /* add the expired time from this interrupt handler
-                 * and the callback functions
-                 */
-                asm volatile ("STPT %0" : "=m" (delta));
-                delta = 0xffffffffffffffffLL - delta + 1;
-                vt_list->offset += delta;
-                next -= delta;
-        } else {
-                vt_list->offset = 0;
-                next = VTIMER_MAX_SLICE;
-        }
-        spin_unlock(&vt_list->lock);
-        set_vtimer(next);
+        next = VTIMER_MAX_SLICE;
+        spin_lock(&vq->lock);
+        if (!list_empty(&vq->list)) {
+                event = list_first_entry(&vq->list, struct vtimer_list, entry);
+                next = event->expires;
+        } else
+                vq->do_spt = 0;
+        spin_unlock(&vq->lock);
+        /*
+         * To improve precision add the time spent by the
+         * interrupt handler to the elapsed time.
+         * Note: CPU timer counts down and we got an interrupt,
+         *       the current content is negative
+         */
+        elapsed = S390_lowcore.async_enter_timer - get_vtimer();
+        set_vtimer(next - elapsed);
+        vq->timer = next - elapsed;
+        vq->elapsed = elapsed;
 }
 
 void init_virt_timer(struct vtimer_list *timer)
 {
         timer->function = NULL;
         INIT_LIST_HEAD(&timer->entry);
-        spin_lock_init(&timer->lock);
 }
 EXPORT_SYMBOL(init_virt_timer);
 
@@ -310,44 +351,40 @@ static inline int vtimer_pending(struct vtimer_list *timer)
  */
 static void internal_add_vtimer(struct vtimer_list *timer)
 {
+        struct vtimer_queue *vq;
         unsigned long flags;
-        __u64 done;
-        struct vtimer_list *event;
-        struct vtimer_queue *vt_list;
+        __u64 left, expires;
 
-        vt_list = &per_cpu(virt_cpu_timer, timer->cpu);
-        spin_lock_irqsave(&vt_list->lock, flags);
+        vq = &per_cpu(virt_cpu_timer, timer->cpu);
+        spin_lock_irqsave(&vq->lock, flags);
 
         BUG_ON(timer->cpu != smp_processor_id());
 
-        /* if list is empty we only have to set the timer */
-        if (list_empty(&vt_list->list)) {
-                /* reset the offset, this may happen if the last timer was
-                 * just deleted by mod_virt_timer and the interrupt
-                 * didn't happen until here
-                 */
-                vt_list->offset = 0;
-                goto fire;
+        if (list_empty(&vq->list)) {
+                /* First timer on this cpu, just program it. */
+                list_add(&timer->entry, &vq->list);
+                set_vtimer(timer->expires);
+                vq->timer = timer->expires;
+                vq->elapsed = 0;
+        } else {
+                /* Check progress of old timers. */
+                expires = timer->expires;
+                left = get_vtimer();
+                if (likely((s64) expires < (s64) left)) {
+                        /* The new timer expires before the current timer. */
+                        set_vtimer(expires);
+                        vq->elapsed += vq->timer - left;
+                        vq->timer = expires;
+                } else {
+                        vq->elapsed += vq->timer - left;
+                        vq->timer = left;
+                }
+                /* Insert new timer into per cpu list. */
+                timer->expires += vq->elapsed;
+                list_add_sorted(timer, &vq->list);
         }
 
-        /* save progress */
-        asm volatile ("STPT %0" : "=m" (done));
-
-        /* calculate completed work */
-        done = vt_list->to_expire - done + vt_list->offset;
-        vt_list->offset = 0;
-
-        list_for_each_entry(event, &vt_list->list, entry)
-                event->expires -= done;
-
- fire:
-        list_add_sorted(timer, &vt_list->list);
-
-        /* get first element, which is the next vtimer slice */
-        event = list_entry(vt_list->list.next, struct vtimer_list, entry);
-
-        set_vtimer(event->expires);
-        spin_unlock_irqrestore(&vt_list->lock, flags);
+        spin_unlock_irqrestore(&vq->lock, flags);
         /* release CPU acquired in prepare_vtimer or mod_virt_timer() */
         put_cpu();
 }
@@ -392,14 +429,15 @@ EXPORT_SYMBOL(add_virt_timer_periodic);
  * If we change a pending timer the function must be called on the CPU
  * where the timer is running on, e.g. by smp_call_function_single()
  *
- * The original mod_timer adds the timer if it is not pending. For compatibility
- * we do the same. The timer will be added on the current CPU as a oneshot timer.
+ * The original mod_timer adds the timer if it is not pending. For
+ * compatibility we do the same. The timer will be added on the current
+ * CPU as a oneshot timer.
  *
  * returns whether it has modified a pending timer (1) or not (0)
  */
 int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
 {
-        struct vtimer_queue *vt_list;
+        struct vtimer_queue *vq;
         unsigned long flags;
         int cpu;
 
@@ -415,17 +453,17 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
                 return 1;
 
         cpu = get_cpu();
-        vt_list = &per_cpu(virt_cpu_timer, cpu);
+        vq = &per_cpu(virt_cpu_timer, cpu);
 
         /* check if we run on the right CPU */
         BUG_ON(timer->cpu != cpu);
 
         /* disable interrupts before test if timer is pending */
-        spin_lock_irqsave(&vt_list->lock, flags);
+        spin_lock_irqsave(&vq->lock, flags);
 
         /* if timer isn't pending add it on the current CPU */
         if (!vtimer_pending(timer)) {
-                spin_unlock_irqrestore(&vt_list->lock, flags);
+                spin_unlock_irqrestore(&vq->lock, flags);
                 /* we do not activate an interval timer with mod_virt_timer */
                 timer->interval = 0;
                 timer->expires = expires;
@@ -442,7 +480,7 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
                 timer->interval = expires;
 
         /* the timer can't expire anymore so we can release the lock */
-        spin_unlock_irqrestore(&vt_list->lock, flags);
+        spin_unlock_irqrestore(&vq->lock, flags);
         internal_add_vtimer(timer);
         return 1;
 }
@@ -456,25 +494,19 @@ EXPORT_SYMBOL(mod_virt_timer);
 int del_virt_timer(struct vtimer_list *timer)
 {
         unsigned long flags;
-        struct vtimer_queue *vt_list;
+        struct vtimer_queue *vq;
 
         /* check if timer is pending */
         if (!vtimer_pending(timer))
                 return 0;
 
-        vt_list = &per_cpu(virt_cpu_timer, timer->cpu);
-        spin_lock_irqsave(&vt_list->lock, flags);
+        vq = &per_cpu(virt_cpu_timer, timer->cpu);
+        spin_lock_irqsave(&vq->lock, flags);
 
         /* we don't interrupt a running timer, just let it expire! */
         list_del_init(&timer->entry);
 
-        /* last timer removed */
-        if (list_empty(&vt_list->list)) {
-                vt_list->to_expire = 0;
-                vt_list->offset = 0;
-        }
-
-        spin_unlock_irqrestore(&vt_list->lock, flags);
+        spin_unlock_irqrestore(&vq->lock, flags);
         return 1;
 }
 EXPORT_SYMBOL(del_virt_timer);
@@ -484,24 +516,19 @@ EXPORT_SYMBOL(del_virt_timer);
  */
 void init_cpu_vtimer(void)
 {
-        struct vtimer_queue *vt_list;
+        struct vtimer_queue *vq;
 
         /* kick the virtual timer */
-        S390_lowcore.exit_timer = VTIMER_MAX_SLICE;
-        S390_lowcore.last_update_timer = VTIMER_MAX_SLICE;
-        asm volatile ("SPT %0" : : "m" (S390_lowcore.last_update_timer));
         asm volatile ("STCK %0" : "=m" (S390_lowcore.last_update_clock));
+        asm volatile ("STPT %0" : "=m" (S390_lowcore.last_update_timer));
+
+        /* initialize per cpu vtimer structure */
+        vq = &__get_cpu_var(virt_cpu_timer);
+        INIT_LIST_HEAD(&vq->list);
+        spin_lock_init(&vq->lock);
 
         /* enable cpu timer interrupts */
         __ctl_set_bit(0,10);
-
-        vt_list = &__get_cpu_var(virt_cpu_timer);
-        INIT_LIST_HEAD(&vt_list->list);
-        spin_lock_init(&vt_list->lock);
-        vt_list->to_expire = 0;
-        vt_list->offset = 0;
-        vt_list->idle = 0;
-
 }
 
 void __init vtime_init(void)
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 8b00eb2ddf57..be8497186b96 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -113,8 +113,6 @@ long kvm_arch_dev_ioctl(struct file *filp,
 int kvm_dev_ioctl_check_extension(long ext)
 {
         switch (ext) {
-        case KVM_CAP_USER_MEMORY:
-                return 1;
         default:
                 return 0;
         }
@@ -185,8 +183,6 @@ struct kvm *kvm_arch_create_vm(void)
         debug_register_view(kvm->arch.dbf, &debug_sprintf_view);
         VM_EVENT(kvm, 3, "%s", "vm created");
 
-        try_module_get(THIS_MODULE);
-
         return kvm;
 out_nodbf:
         free_page((unsigned long)(kvm->arch.sca));
@@ -196,13 +192,33 @@ out_nokvm:
         return ERR_PTR(rc);
 }
 
+void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
+{
+        VCPU_EVENT(vcpu, 3, "%s", "free cpu");
+        free_page((unsigned long)(vcpu->arch.sie_block));
+        kvm_vcpu_uninit(vcpu);
+        kfree(vcpu);
+}
+
+static void kvm_free_vcpus(struct kvm *kvm)
+{
+        unsigned int i;
+
+        for (i = 0; i < KVM_MAX_VCPUS; ++i) {
+                if (kvm->vcpus[i]) {
+                        kvm_arch_vcpu_destroy(kvm->vcpus[i]);
+                        kvm->vcpus[i] = NULL;
+                }
+        }
+}
+
 void kvm_arch_destroy_vm(struct kvm *kvm)
 {
-        debug_unregister(kvm->arch.dbf);
+        kvm_free_vcpus(kvm);
         kvm_free_physmem(kvm);
         free_page((unsigned long)(kvm->arch.sca));
+        debug_unregister(kvm->arch.dbf);
         kfree(kvm);
-        module_put(THIS_MODULE);
 }
 
 /* Section: vcpu related */
@@ -213,8 +229,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
 
 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 {
-        /* kvm common code refers to this, but does'nt call it */
-        BUG();
+        /* Nothing todo */
 }
 
 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
@@ -308,8 +323,6 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
         VM_EVENT(kvm, 3, "create cpu %d at %p, sie block at %p", id, vcpu,
                  vcpu->arch.sie_block);
 
-        try_module_get(THIS_MODULE);
-
         return vcpu;
 out_free_cpu:
         kfree(vcpu);
@@ -317,14 +330,6 @@ out_nomem:
         return ERR_PTR(rc);
 }
 
-void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
-{
-        VCPU_EVENT(vcpu, 3, "%s", "destroy cpu");
-        free_page((unsigned long)(vcpu->arch.sie_block));
-        kfree(vcpu);
-        module_put(THIS_MODULE);
-}
-
 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
 {
         /* kvm common code refers to this, but never calls it */
diff --git a/arch/s390/mm/extmem.c b/arch/s390/mm/extmem.c
index 580fc64cc735..5c8457129603 100644
--- a/arch/s390/mm/extmem.c
+++ b/arch/s390/mm/extmem.c
@@ -7,6 +7,9 @@
  * (C) IBM Corporation 2002-2004
  */
 
+#define KMSG_COMPONENT "extmem"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/spinlock.h>
@@ -24,19 +27,6 @@
 #include <asm/cpcmd.h>
 #include <asm/setup.h>
 
-#define DCSS_DEBUG      /* Debug messages on/off */
-
-#define DCSS_NAME "extmem"
-#ifdef DCSS_DEBUG
-#define PRINT_DEBUG(x...)       printk(KERN_DEBUG DCSS_NAME " debug:" x)
-#else
-#define PRINT_DEBUG(x...)   do {} while (0)
-#endif
-#define PRINT_INFO(x...)        printk(KERN_INFO DCSS_NAME " info:" x)
-#define PRINT_WARN(x...)        printk(KERN_WARNING DCSS_NAME " warning:" x)
-#define PRINT_ERR(x...)         printk(KERN_ERR DCSS_NAME " error:" x)
-
-
 #define DCSS_LOADSHR    0x00
 #define DCSS_LOADNSR    0x04
 #define DCSS_PURGESEG   0x08
@@ -286,7 +276,7 @@ query_segment_type (struct dcss_segment *seg)
                 goto out_free;
         }
         if (diag_cc > 1) {
-                PRINT_WARN ("segment_type: diag returned error %ld\n", vmrc);
+                pr_warning("Querying a DCSS type failed with rc=%ld\n", vmrc);
                 rc = dcss_diag_translate_rc (vmrc);
                 goto out_free;
         }
@@ -368,7 +358,6 @@ query_segment_type (struct dcss_segment *seg)
  * -EIO     : could not perform query diagnose
  * -ENOENT  : no such segment
  * -ENOTSUPP: multi-part segment cannot be used with linux
- * -ENOSPC  : segment cannot be used (overlaps with storage)
  * -ENOMEM  : out of memory
  * 0 .. 6   : type of segment as defined in include/asm-s390/extmem.h
  */
@@ -480,9 +469,8 @@ __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long
                 goto out_resource;
         }
         if (diag_cc > 1) {
-                PRINT_WARN ("segment_load: could not load segment %s - "
-                                "diag returned error (%ld)\n",
-                                name, end_addr);
+                pr_warning("Loading DCSS %s failed with rc=%ld\n", name,
+                           end_addr);
                 rc = dcss_diag_translate_rc(end_addr);
                 dcss_diag(&purgeseg_scode, seg->dcss_name,
                                 &dummy, &dummy);
@@ -496,15 +484,13 @@ __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long
         *addr = seg->start_addr;
         *end  = seg->end;
         if (do_nonshared)
-                PRINT_INFO ("segment_load: loaded segment %s range %p .. %p "
-                                "type %s in non-shared mode\n", name,
-                                (void*)seg->start_addr, (void*)seg->end,
-                                segtype_string[seg->vm_segtype]);
+                pr_info("DCSS %s of range %p to %p and type %s loaded as "
+                        "exclusive-writable\n", name, (void*) seg->start_addr,
+                        (void*) seg->end, segtype_string[seg->vm_segtype]);
         else {
-                PRINT_INFO ("segment_load: loaded segment %s range %p .. %p "
-                                "type %s in shared mode\n", name,
-                                (void*)seg->start_addr, (void*)seg->end,
-                                segtype_string[seg->vm_segtype]);
+                pr_info("DCSS %s of range %p to %p and type %s loaded in "
+                        "shared access mode\n", name, (void*) seg->start_addr,
+                        (void*) seg->end, segtype_string[seg->vm_segtype]);
         }
         goto out;
  out_resource:
@@ -593,14 +579,14 @@ segment_modify_shared (char *name, int do_nonshared)
                 goto out_unlock;
         }
         if (do_nonshared == seg->do_nonshared) {
-                PRINT_INFO ("segment_modify_shared: not reloading segment %s"
-                                " - already in requested mode\n",name);
+                pr_info("DCSS %s is already in the requested access "
+                        "mode\n", name);
                 rc = 0;
                 goto out_unlock;
         }
         if (atomic_read (&seg->ref_count) != 1) {
-                PRINT_WARN ("segment_modify_shared: not reloading segment %s - "
-                                "segment is in use by other driver(s)\n",name);
+                pr_warning("DCSS %s is in use and cannot be reloaded\n",
+                           name);
                 rc = -EAGAIN;
                 goto out_unlock;
         }
@@ -613,8 +599,8 @@ segment_modify_shared (char *name, int do_nonshared)
                         seg->res->flags |= IORESOURCE_READONLY;
 
         if (request_resource(&iomem_resource, seg->res)) {
-                PRINT_WARN("segment_modify_shared: could not reload segment %s"
-                           " - overlapping resources\n", name);
+                pr_warning("DCSS %s overlaps with used memory resources "
+                           "and cannot be reloaded\n", name);
                 rc = -EBUSY;
                 kfree(seg->res);
                 goto out_del_mem;
@@ -632,9 +618,8 @@ segment_modify_shared (char *name, int do_nonshared)
                 goto out_del_res;
         }
         if (diag_cc > 1) {
-                PRINT_WARN ("segment_modify_shared: could not reload segment %s"
-                                " - diag returned error (%ld)\n",
-                                name, end_addr);
+                pr_warning("Reloading DCSS %s failed with rc=%ld\n", name,
+                           end_addr);
                 rc = dcss_diag_translate_rc(end_addr);
                 goto out_del_res;
         }
@@ -673,8 +658,7 @@ segment_unload(char *name)
         mutex_lock(&dcss_lock);
         seg = segment_by_name (name);
         if (seg == NULL) {
-                PRINT_ERR ("could not find segment %s in segment_unload, "
-                                "please report to linux390@de.ibm.com\n",name);
+                pr_err("Unloading unknown DCSS %s failed\n", name);
                 goto out_unlock;
         }
         if (atomic_dec_return(&seg->ref_count) != 0)
@@ -709,8 +693,7 @@ segment_save(char *name)
         seg = segment_by_name (name);
 
         if (seg == NULL) {
-                PRINT_ERR("could not find segment %s in segment_save, please "
-                          "report to linux390@de.ibm.com\n", name);
+                pr_err("Saving unknown DCSS %s failed\n", name);
                 goto out;
         }
 
@@ -727,14 +710,14 @@ segment_save(char *name)
         response = 0;
         cpcmd(cmd1, NULL, 0, &response);
         if (response) {
-                PRINT_ERR("segment_save: DEFSEG failed with response code %i\n",
-                          response);
+                pr_err("Saving a DCSS failed with DEFSEG response code "
+                       "%i\n", response);
                 goto out;
         }
         cpcmd(cmd2, NULL, 0, &response);
         if (response) {
-                PRINT_ERR("segment_save: SAVESEG failed with response code %i\n",
-                          response);
+                pr_err("Saving a DCSS failed with SAVESEG response code "
+                       "%i\n", response);
                 goto out;
         }
 out:
@@ -749,44 +732,41 @@ void segment_warning(int rc, char *seg_name)
 {
         switch (rc) {
         case -ENOENT:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "does not exist\n", seg_name);
+                pr_err("DCSS %s cannot be loaded or queried\n", seg_name);
                 break;
         case -ENOSYS:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "not running on VM\n", seg_name);
+                pr_err("DCSS %s cannot be loaded or queried without "
+                       "z/VM\n", seg_name);
                 break;
         case -EIO:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "hardware error\n", seg_name);
+                pr_err("Loading or querying DCSS %s resulted in a "
+                       "hardware error\n", seg_name);
                 break;
         case -ENOTSUPP:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "is a multi-part segment\n", seg_name);
+                pr_err("DCSS %s has multiple page ranges and cannot be "
+                       "loaded or queried\n", seg_name);
                 break;
         case -ENOSPC:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "overlaps with storage\n", seg_name);
+                pr_err("DCSS %s overlaps with used storage and cannot "
+                       "be loaded\n", seg_name);
                 break;
         case -EBUSY:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "overlaps with already loaded dcss\n", seg_name);
+                pr_err("%s needs used memory resources and cannot be "
+                       "loaded or queried\n", seg_name);
                 break;
         case -EPERM:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "already loaded in incompatible mode\n", seg_name);
+                pr_err("DCSS %s is already loaded in a different access "
+                       "mode\n", seg_name);
                 break;
         case -ENOMEM:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "out of memory\n", seg_name);
+                pr_err("There is not enough memory to load or query "
+                       "DCSS %s\n", seg_name);
                 break;
         case -ERANGE:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "exceeds kernel mapping range\n", seg_name);
+                pr_err("DCSS %s exceeds the kernel mapping range (%lu) "
+                       "and cannot be loaded\n", seg_name, VMEM_MAX_PHYS);
                 break;
         default:
-                PRINT_WARN("cannot load/query segment %s, "
-                           "return value %i\n", seg_name, rc);
                 break;
         }
 }
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index 158b0d6d7046..f0258ca3b17e 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -183,7 +183,7 @@ int arch_add_memory(int nid, u64 start, u64 size)
         rc = vmem_add_mapping(start, size);
         if (rc)
                 return rc;
-        rc = __add_pages(zone, PFN_DOWN(start), PFN_DOWN(size));
+        rc = __add_pages(nid, zone, PFN_DOWN(start), PFN_DOWN(size));
         if (rc)
                 vmem_remove_mapping(start, size);
         return rc;
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index ef3635b52fc0..0767827540b1 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -263,7 +263,7 @@ int s390_enable_sie(void)
         /* lets check if we are allowed to replace the mm */
         task_lock(tsk);
         if (!tsk->mm || atomic_read(&tsk->mm->mm_users) > 1 ||
-            tsk->mm != tsk->active_mm || tsk->mm->ioctx_list) {
+            tsk->mm != tsk->active_mm || !hlist_empty(&tsk->mm->ioctx_list)) {
                 task_unlock(tsk);
                 return -EINVAL;
         }
@@ -279,7 +279,7 @@ int s390_enable_sie(void)
         /* Now lets check again if something happened */
         task_lock(tsk);
         if (!tsk->mm || atomic_read(&tsk->mm->mm_users) > 1 ||
-            tsk->mm != tsk->active_mm || tsk->mm->ioctx_list) {
+            tsk->mm != tsk->active_mm || !hlist_empty(&tsk->mm->ioctx_list)) {
                 mmput(mm);
                 task_unlock(tsk);
                 return -EINVAL;
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5c9cbfc14c4d..f32a5197128d 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -13,6 +13,7 @@ config SUPERH
         select HAVE_OPROFILE
         select HAVE_GENERIC_DMA_COHERENT
         select HAVE_IOREMAP_PROT if MMU
+        select HAVE_ARCH_TRACEHOOK
         help
           The SuperH is a RISC processor targeted for use in embedded systems
           and consumer electronics; it was also used in the Sega Dreamcast
@@ -23,8 +24,10 @@ config SUPERH32
         def_bool !SUPERH64
         select HAVE_KPROBES
         select HAVE_KRETPROBES
-        select HAVE_ARCH_TRACEHOOK
         select HAVE_FUNCTION_TRACER
+        select HAVE_FTRACE_MCOUNT_RECORD
+        select HAVE_DYNAMIC_FTRACE
+        select HAVE_ARCH_KGDB
 
 config SUPERH64
         def_bool y if CPU_SH5
@@ -55,8 +58,6 @@ config GENERIC_HARDIRQS
 
 config GENERIC_HARDIRQS_NO__DO_IRQ
         def_bool y
-        depends on SUPERH32 && (!SH_DREAMCAST && !SH_SH4202_MICRODEV && \
-                                !SH_7751_SYSTEMH && !HD64461)
 
 config GENERIC_IRQ_PROBE
         def_bool y
@@ -85,10 +86,17 @@ config GENERIC_LOCKBREAK
 
 config SYS_SUPPORTS_PM
         bool
+        depends on !SMP
+
+config ARCH_SUSPEND_POSSIBLE
+        def_bool n
+
+config ARCH_HIBERNATION_POSSIBLE
+        def_bool n
 
 config SYS_SUPPORTS_APM_EMULATION
         bool
-        select SYS_SUPPORTS_PM
+        select ARCH_SUSPEND_POSSIBLE
 
 config SYS_SUPPORTS_SMP
         bool
@@ -183,6 +191,11 @@ config CPU_SUBTYPE_SH7619
 
 # SH-2A Processor Support
 
+config CPU_SUBTYPE_SH7201
+        bool "Support SH7201 processor"
+        select CPU_SH2A
+        select CPU_HAS_FPU
+ 
 config CPU_SUBTYPE_SH7203
         bool "Support SH7203 processor"
         select CPU_SH2A
@@ -456,8 +469,12 @@ config SH_CPU_FREQ
         depends on CPU_FREQ
         select CPU_FREQ_TABLE
         help
-          This adds the cpufreq driver for SuperH. At present, only
-          the SH-4 is supported.
+          This adds the cpufreq driver for SuperH. Any CPU that supports
+          clock rate rounding through the clock framework can use this
+          driver. While it will make the kernel slightly larger, this is
+          harmless for CPUs that don't support rate rounding. The driver
+          will also generate a notice in the boot log before disabling
+          itself if the CPU in question is not capable of rate rounding.
 
           For details, take a look at <file:Documentation/cpu-freq>.
 
@@ -469,9 +486,6 @@ source "arch/sh/drivers/Kconfig"
 
 endmenu
 
-config ISA_DMA_API
-        bool
-
 menu "Kernel features"
 
 source kernel/Kconfig.hz
@@ -688,49 +702,6 @@ config MAPLE
          Dreamcast with a serial line terminal or a remote network
          connection.
 
-config CF_ENABLER
-        bool "Compact Flash Enabler support"
-        depends on SOLUTION_ENGINE || SH_SH03
-        ---help---
-          Compact Flash is a small, removable mass storage device introduced
-          in 1994 originally as a PCMCIA device.  If you say `Y' here, you
-          compile in support for Compact Flash devices directly connected to
-          a SuperH processor.  A Compact Flash FAQ is available at
-          <http://www.compactflash.org/faqs/faq.htm>.
-
-          If your board has "Directly Connected" CompactFlash at area 5 or 6,
-          you may want to enable this option.  Then, you can use CF as
-          primary IDE drive (only tested for SanDisk).
-
-          If in doubt, select 'N'.
-
-choice
-        prompt "Compact Flash Connection Area"
-        depends on CF_ENABLER
-        default CF_AREA6
-
-config CF_AREA5
-        bool "Area5"
-        help
-          If your board has "Directly Connected" CompactFlash, You should
-          select the area where your CF is connected to.
-
-          - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
-          - "Area6" if it is connected to Area 6 (0x18000000)
-
-          "Area6" will work for most boards.
-
-config CF_AREA6
-        bool "Area6"
-
-endchoice
-
-config CF_BASE_ADDR
-        hex
-        depends on CF_ENABLER
-        default "0xb8000000" if CF_AREA6
-        default "0xb4000000" if CF_AREA5
-
 source "arch/sh/drivers/pci/Kconfig"
 
 source "drivers/pci/Kconfig"
@@ -748,13 +719,11 @@ source "fs/Kconfig.binfmt"
 endmenu
 
 menu "Power management options (EXPERIMENTAL)"
-depends on EXPERIMENTAL && SYS_SUPPORTS_PM
+depends on EXPERIMENTAL
 
-config ARCH_SUSPEND_POSSIBLE
-        def_bool y
-        depends on !SMP
+source "kernel/power/Kconfig"
 
-source kernel/power/Kconfig
+source "drivers/cpuidle/Kconfig"
 
 endmenu
 
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index e6d2c8b11abd..0d62681f72a0 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -98,18 +98,29 @@ config IRQSTACKS
           for handling hard and soft interrupts.  This can help avoid
           overflowing the process kernel stacks.
 
-config SH_KGDB
-        bool "Include KGDB kernel debugger"
-        select FRAME_POINTER
-        select DEBUG_INFO
-        depends on CPU_SH3 || CPU_SH4
+config DUMP_CODE
+        bool "Show disassembly of nearby code in register dumps"
+        depends on DEBUG_KERNEL && SUPERH32
+        default y if DEBUG_BUGVERBOSE
+        default n
+        help
+          This prints out a code trace of the instructions leading up to
+          the faulting instruction as a debugging aid. As this does grow
+          the kernel in size a bit, most users will want to say N here.
+
+          Those looking for more verbose debugging output should say Y.
+
+config SH_NO_BSS_INIT
+        bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
+        depends on DEBUG_KERNEL
+        default n
         help
-          Include in-kernel hooks for kgdb, the Linux kernel source level
-          debugger.  See <http://kgdb.sourceforge.net/> for more information.
-          Unless you are intending to debug the kernel, say N here.
+          If running in painfully slow environments, such as an RTL
+          simulation or from remote memory via SHdebug, where the memory
+          can already be gauranteed to ber zeroed on boot, say Y.
 
-menu "KGDB configuration options"
-        depends on SH_KGDB
+          For all other cases, say N. If this option seems perplexing, or
+          you aren't sure, say N.
 
 config MORE_COMPILE_OPTIONS
         bool "Add any additional compile options"
@@ -122,85 +133,16 @@ config COMPILE_OPTIONS
         string "Additional compile arguments"
         depends on MORE_COMPILE_OPTIONS
 
-config KGDB_NMI
-        def_bool n
-        prompt "Enter KGDB on NMI"
-
-config SH_KGDB_CONSOLE
-        def_bool n
-        prompt "Console messages through GDB"
-        depends on !SERIAL_SH_SCI_CONSOLE && SERIAL_SH_SCI=y
-        select SERIAL_CORE_CONSOLE
-
-config KGDB_SYSRQ
-        def_bool y
-        prompt "Allow SysRq 'G' to enter KGDB"
-        depends on MAGIC_SYSRQ
-
-comment "Serial port setup"
-
-config KGDB_DEFPORT
-        int "Port number (ttySCn)"
-        default "1"
-
-config KGDB_DEFBAUD
-        int "Baud rate"
-        default "115200"
-
-choice
-        prompt "Parity"
-        depends on SH_KGDB
-        default KGDB_DEFPARITY_N
-
-config KGDB_DEFPARITY_N
-        bool "None"
-
-config KGDB_DEFPARITY_E
-        bool "Even"
-
-config KGDB_DEFPARITY_O
-        bool "Odd"
-
-endchoice
-
-choice
-        prompt "Data bits"
-        depends on SH_KGDB
-        default KGDB_DEFBITS_8
-
-config KGDB_DEFBITS_8
-        bool "8"
-
-config KGDB_DEFBITS_7
-        bool "7"
-
-endchoice
-
-endmenu
-
-if SUPERH64
-
-config SH64_PROC_ASIDS
-        bool "Debug: report ASIDs through /proc/asids"
-        depends on PROC_FS && MMU
-
 config SH64_SR_WATCH
         bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
+        depends on SUPERH64
 
 config POOR_MANS_STRACE
         bool "Debug: enable rudimentary strace facility"
+        depends on SUPERH64
         help
           This option allows system calls to be traced to the console.  It also
           aids in detecting kernel stack underflow.  It is useful for debugging
           early-userland problems (e.g. init incurring fatal exceptions.)
 
-config SH_ALPHANUMERIC
-        bool "Enable debug outputs to on-board alphanumeric display"
-        depends on SH_CAYMAN
-
-config SH_NO_BSS_INIT
-        bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
-
-endif
-
 endmenu
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index c43eb0d7fa3b..4067b0d9287b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -32,6 +32,7 @@ cflags-$(CONFIG_CPU_SH4)		:= $(call cc-option,-m4,) \
         $(call cc-option,-mno-implicit-fp,-m4-nofpu)
 cflags-$(CONFIG_CPU_SH4A)               += $(call cc-option,-m4a,) \
                                            $(call cc-option,-m4a-nofpu,)
+cflags-$(CONFIG_CPU_SH4AL_DSP)          += $(call cc-option,-m4al,)
 cflags-$(CONFIG_CPU_SH5)                := $(call cc-option,-m5-32media-nofpu,)
 
 ifeq ($(cflags-y),)
@@ -39,22 +40,16 @@ ifeq ($(cflags-y),)
 # In the case where we are stuck with a compiler that has been uselessly
 # restricted to a particular ISA, a favourite default of newer GCCs when
 # extensive multilib targets are not provided, ensure we get the best fit
-# regarding FP generation. This is necessary to avoid references to FP
-# variants in libgcc where integer variants exist, which otherwise result
-# in link errors. This is intentionally stupid (albeit many orders of
-# magnitude less than GCC's default behaviour), as anything with a large
-# number of multilib targets better have been built correctly for
-# the target in mind.
+# regarding FP generation. This is intentionally stupid (albeit many
+# orders of magnitude less than GCC's default behaviour), as anything
+# with a large number of multilib targets better have been built
+# correctly for the target in mind.
 #
 cflags-y        += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \
                      grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//')
-endif
-
-cflags-$(CONFIG_CPU_BIG_ENDIAN)         += -mb
-cflags-$(CONFIG_CPU_LITTLE_ENDIAN)      += -ml
-
-cflags-y        += $(call cc-option,-mno-fdpic)
-
+# At this point, anything goes.
+isaflags-y      := $(call as-option,-Wa$(comma)-isa=any,)
+else
 #
 # -Wa,-isa= tuning implies -Wa,-dsp for the versions of binutils that
 # support it, while -Wa,-dsp by itself limits the range of usable opcodes
@@ -67,7 +62,12 @@ isaflags-y	:= $(call as-option,-Wa$(comma)-isa=$(isa-y),)
 
 isaflags-$(CONFIG_SH_DSP)               := \
         $(call as-option,-Wa$(comma)-isa=$(isa-y),-Wa$(comma)-dsp)
+endif
 
+cflags-$(CONFIG_CPU_BIG_ENDIAN)         += -mb
+cflags-$(CONFIG_CPU_LITTLE_ENDIAN)      += -ml
+
+cflags-y        += $(call cc-option,-mno-fdpic)
 cflags-y        += $(isaflags-y) -ffreestanding
 
 cflags-$(CONFIG_MORE_COMPILE_OPTIONS)   += \
@@ -79,6 +79,9 @@ OBJCOPYFLAGS	:= -O binary -R .note -R .note.gnu.build-id -R .comment \
 # Give the various platforms the opportunity to set default image types
 defaultimage-$(CONFIG_SUPERH32)                 := zImage
 defaultimage-$(CONFIG_SH_SH7785LCR)             := uImage
+defaultimage-$(CONFIG_SH_RSK)                   := uImage
+defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE)  := vmlinux
+defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE)  := vmlinux
 
 # Set some sensible Kbuild defaults
 KBUILD_DEFCONFIG        := shx3_defconfig
@@ -132,6 +135,7 @@ machdir-$(CONFIG_SH_LANDISK)			+= mach-landisk
 machdir-$(CONFIG_SH_TITAN)                      += mach-titan
 machdir-$(CONFIG_SH_LBOX_RE2)                   += mach-lboxre2
 machdir-$(CONFIG_SH_CAYMAN)                     += mach-cayman
+machdir-$(CONFIG_SH_RSK)                        += mach-rsk
 
 ifneq ($(machdir-y),)
 core-y  += $(addprefix arch/sh/boards/, \
@@ -173,11 +177,8 @@ KBUILD_CFLAGS		+= -pipe $(cflags-y)
 KBUILD_CPPFLAGS         += $(cflags-y)
 KBUILD_AFLAGS           += $(cflags-y)
 
-LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
-
 libs-$(CONFIG_SUPERH32)         := arch/sh/lib/ $(libs-y)
 libs-$(CONFIG_SUPERH64)         := arch/sh/lib64/ $(libs-y)
-libs-y                          += $(LIBGCC)
 
 PHONY += maketools FORCE
 
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 50467f9d0d0b..861914747e4e 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -126,10 +126,12 @@ config SH_RTS7751R2D
           Select RTS7751R2D if configuring for a Renesas Technology
           Sales SH-Graphics board.
 
-config SH_RSK7203
-        bool "RSK7203"
-        select GENERIC_GPIO
-        depends on CPU_SUBTYPE_SH7203
+config SH_RSK
+        bool "Renesas Starter Kit"
+        depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203
+        help
+         Select this option if configuring for any of the RSK+ MCU
+         evaluation platforms.
 
 config SH_SDK7780
         bool "SDK7780R3"
@@ -253,6 +255,7 @@ source "arch/sh/boards/mach-r2d/Kconfig"
 source "arch/sh/boards/mach-highlander/Kconfig"
 source "arch/sh/boards/mach-sdk7780/Kconfig"
 source "arch/sh/boards/mach-migor/Kconfig"
+source "arch/sh/boards/mach-rsk/Kconfig"
 
 if SH_MAGIC_PANEL_R2
 
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index d9efa3923721..269ae2be49ef 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -3,7 +3,6 @@
 #
 obj-$(CONFIG_SH_AP325RXA)       += board-ap325rxa.o
 obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
-obj-$(CONFIG_SH_RSK7203)        += board-rsk7203.o
 obj-$(CONFIG_SH_SH7785LCR)      += board-sh7785lcr.o
 obj-$(CONFIG_SH_SHMIN)          += board-shmin.o
 obj-$(CONFIG_SH_EDOSK7760)      += board-edosk7760.o
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 8881a643ac32..1c67cba6e34f 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -197,6 +197,10 @@ static struct resource lcdc_resources[] = {
                 .end    = 0xfe941fff,
                 .flags  = IORESOURCE_MEM,
         },
+        [1] = {
+                .start  = 28,
+                .flags  = IORESOURCE_IRQ,
+        },
 };
 
 static struct platform_device lcdc_device = {
@@ -303,6 +307,7 @@ static struct resource ceu_resources[] = {
 
 static struct platform_device ceu_device = {
         .name           = "sh_mobile_ceu",
+        .id             = 0, /* "ceu0" clock */
         .num_resources  = ARRAY_SIZE(ceu_resources),
         .resource       = ceu_resources,
         .dev            = {
@@ -344,7 +349,6 @@ static int __init ap325rxa_devices_setup(void)
         gpio_export(GPIO_PTF7, 0);
 
         /* LCDC */
-        clk_always_enable("mstp200");
         gpio_request(GPIO_FN_LCDD15, NULL);
         gpio_request(GPIO_FN_LCDD14, NULL);
         gpio_request(GPIO_FN_LCDD13, NULL);
@@ -375,7 +379,6 @@ static int __init ap325rxa_devices_setup(void)
         gpio_direction_output(GPIO_PTS3, 1);
 
         /* CEU */
-        clk_always_enable("mstp203");
         gpio_request(GPIO_FN_VIO_CLK2, NULL);
         gpio_request(GPIO_FN_VIO_VD2, NULL);
         gpio_request(GPIO_FN_VIO_HD2, NULL);
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c
index 5cc0867de5ab..b1dcbbc89188 100644
--- a/arch/sh/boards/board-shmin.c
+++ b/arch/sh/boards/board-shmin.c
@@ -22,21 +22,13 @@ static void __init init_shmin_irq(void)
         plat_irq_setup_pins(IRQ_MODE_IRQ);
 }
 
-static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
+static void __init shmin_setup(char **cmdline_p)
 {
-        static int dummy;
-
-        if ((port & ~0x1f) == SHMIN_NE_BASE)
-                return (void __iomem *)(SHMIN_IO_BASE + port);
-
-        dummy = 0;
-
-        return &dummy;
-
+        __set_io_port_base(SHMIN_IO_BASE);
 }
 
 static struct sh_machine_vector mv_shmin __initmv = {
         .mv_name        = "SHMIN",
+        .mv_setup       = shmin_setup,
         .mv_init_irq    = init_shmin_irq,
-        .mv_ioport_map  = shmin_ioport_map,
 };
diff --git a/arch/sh/boards/mach-cayman/Makefile b/arch/sh/boards/mach-cayman/Makefile
index 489a8f867368..cafe1ac3b29c 100644
--- a/arch/sh/boards/mach-cayman/Makefile
+++ b/arch/sh/boards/mach-cayman/Makefile
@@ -2,4 +2,3 @@
 # Makefile for the Hitachi Cayman specific parts of the kernel
 #
 obj-y := setup.o irq.o
-obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index ceb37ae92c70..da62ad516994 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -94,31 +94,11 @@ static void ack_cayman_irq(unsigned int irq)
         disable_cayman_irq(irq);
 }
 
-static void end_cayman_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_cayman_irq(irq);
-}
-
-static unsigned int startup_cayman_irq(unsigned int irq)
-{
-        enable_cayman_irq(irq);
-        return 0; /* never anything pending */
-}
-
-static void shutdown_cayman_irq(unsigned int irq)
-{
-        disable_cayman_irq(irq);
-}
-
-struct hw_interrupt_type cayman_irq_type = {
-        .typename       = "Cayman-IRQ",
-        .startup        = startup_cayman_irq,
-        .shutdown       = shutdown_cayman_irq,
-        .enable         = enable_cayman_irq,
-        .disable        = disable_cayman_irq,
-        .ack            = ack_cayman_irq,
-        .end            = end_cayman_irq,
+struct irq_chip cayman_irq_type = {
+        .name           = "Cayman-IRQ",
+        .unmask         = enable_cayman_irq,
+        .mask           = disable_cayman_irq,
+        .mask_ack       = ack_cayman_irq,
 };
 
 int cayman_irq_demux(int evt)
@@ -187,8 +167,9 @@ void init_cayman_irq(void)
                 return;
         }
 
-        for (i=0; i<NR_EXT_IRQS; i++) {
-                irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type;
+        for (i = 0; i < NR_EXT_IRQS; i++) {
+                set_irq_chip_and_handler(START_EXT_IRQS + i, &cayman_irq_type,
+                                         handle_level_irq);
         }
 
         /* Setup the SMSC interrupt */
diff --git a/arch/sh/boards/mach-cayman/led.c b/arch/sh/boards/mach-cayman/led.c
deleted file mode 100644
index a808eac4ecd6..000000000000
--- a/arch/sh/boards/mach-cayman/led.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * arch/sh/boards/cayman/led.c
- *
- * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * Flash the LEDs
- */
-#include <asm/io.h>
-
-/*
-** It is supposed these functions to be used for a low level
-** debugging (via Cayman LEDs), hence to be available as soon
-** as possible.
-** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped
-** (this happen when IRQ are initialized... quite late).
-** These triky dependencies should be removed. Temporary, it
-** may be enough to NOP until EPLD is mapped.
-*/
-
-extern unsigned long epld_virt;
-
-#define LED_ADDR      (epld_virt + 0x008)
-#define HDSP2534_ADDR (epld_virt + 0x100)
-
-void mach_led(int position, int value)
-{
-        if (!epld_virt)
-                return;
-
-        if (value)
-                ctrl_outl(0, LED_ADDR);
-        else
-                ctrl_outl(1, LED_ADDR);
-
-}
-
-void mach_alphanum(int position, unsigned char value)
-{
-        if (!epld_virt)
-                return;
-
-        ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2));
-}
-
-void mach_alphanum_brightness(int setting)
-{
-        ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0);
-}
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index 67bdc33dd411..f55fc8e795e9 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -10,106 +10,90 @@
  */
 
 #include <linux/irq.h>
-#include <asm/io.h>
+#include <linux/io.h>
 #include <asm/irq.h>
 #include <mach/sysasic.h>
 
-/* Dreamcast System ASIC Hardware Events -
-
-   The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving
-   hardware events from system peripherals and triggering an SH7750 IRQ.
-   Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are
-   set in the Event Mask Registers (EMRs).  When a hardware event is
-   triggered, it's corresponding bit in the Event Status Registers (ESRs)
-   is set, and that bit should be rewritten to the ESR to acknowledge that
-   event.
-
-   There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908.  Event
-   types can be found in include/asm-sh/dreamcast/sysasic.h. There are three
-   groups of EMRs that parallel the ESRs.  Each EMR group corresponds to an
-   IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928
-   triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9.
-
-   In the kernel, these events are mapped to virtual IRQs so that drivers can
-   respond to them as they would a normal interrupt.  In order to keep this
-   mapping simple, the events are mapped as:
-
-   6900/6910 - Events  0-31, IRQ 13
-   6904/6924 - Events 32-63, IRQ 11
-   6908/6938 - Events 64-95, IRQ  9
-
-*/
+/*
+ * Dreamcast System ASIC Hardware Events -
+ *
+ * The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving
+ * hardware events from system peripherals and triggering an SH7750 IRQ.
+ * Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are
+ * set in the Event Mask Registers (EMRs).  When a hardware event is
+ * triggered, its corresponding bit in the Event Status Registers (ESRs)
+ * is set, and that bit should be rewritten to the ESR to acknowledge that
+ * event.
+ *
+ * There are three 32-bit ESRs located at 0xa05f6900 - 0xa05f6908.  Event
+ * types can be found in arch/sh/include/mach-dreamcast/mach/sysasic.h.
+ * There are three groups of EMRs that parallel the ESRs.  Each EMR group
+ * corresponds to an IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13,
+ * 0xa05f6920 - 0xa05f6928 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938
+ * triggers IRQ 9.
+ *
+ * In the kernel, these events are mapped to virtual IRQs so that drivers can
+ * respond to them as they would a normal interrupt.  In order to keep this
+ * mapping simple, the events are mapped as:
+ *
+ * 6900/6910 - Events  0-31, IRQ 13
+ * 6904/6924 - Events 32-63, IRQ 11
+ * 6908/6938 - Events 64-95, IRQ  9
+ *
+ */
 
 #define ESR_BASE 0x005f6900    /* Base event status register */
 #define EMR_BASE 0x005f6910    /* Base event mask register */
 
-/* Helps us determine the EMR group that this event belongs to: 0 = 0x6910,
-   1 = 0x6920, 2 = 0x6930; also determine the event offset */
+/*
+ * Helps us determine the EMR group that this event belongs to: 0 = 0x6910,
+ * 1 = 0x6920, 2 = 0x6930; also determine the event offset.
+ */
 #define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32)
 
 /* Return the hardware event's bit positon within the EMR/ESR */
 #define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31)
 
-/* For each of these *_irq routines, the IRQ passed in is the virtual IRQ
-   (logically mapped to the corresponding bit for the hardware event). */
+/*
+ * For each of these *_irq routines, the IRQ passed in is the virtual IRQ
+ * (logically mapped to the corresponding bit for the hardware event).
+ */
 
 /* Disable the hardware event by masking its bit in its EMR */
 static inline void disable_systemasic_irq(unsigned int irq)
 {
-        __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
-        __u32 mask;
+        __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
+        __u32 mask;
 
-        mask = inl(emr);
-        mask &= ~(1 << EVENT_BIT(irq));
-        outl(mask, emr);
+        mask = inl(emr);
+        mask &= ~(1 << EVENT_BIT(irq));
+        outl(mask, emr);
 }
 
 /* Enable the hardware event by setting its bit in its EMR */
 static inline void enable_systemasic_irq(unsigned int irq)
 {
-        __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
-        __u32 mask;
+        __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
+        __u32 mask;
 
-        mask = inl(emr);
-        mask |= (1 << EVENT_BIT(irq));
-        outl(mask, emr);
+        mask = inl(emr);
+        mask |= (1 << EVENT_BIT(irq));
+        outl(mask, emr);
 }
 
 /* Acknowledge a hardware event by writing its bit back to its ESR */
-static void ack_systemasic_irq(unsigned int irq)
-{
-        __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
-        disable_systemasic_irq(irq);
-        outl((1 << EVENT_BIT(irq)), esr);
-}
-
-/* After a IRQ has been ack'd and responded to, it needs to be renabled */
-static void end_systemasic_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_systemasic_irq(irq);
-}
-
-static unsigned int startup_systemasic_irq(unsigned int irq)
-{
-        enable_systemasic_irq(irq);
-
-        return 0;
-}
-
-static void shutdown_systemasic_irq(unsigned int irq)
+static void mask_ack_systemasic_irq(unsigned int irq)
 {
-        disable_systemasic_irq(irq);
+        __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
+        disable_systemasic_irq(irq);
+        outl((1 << EVENT_BIT(irq)), esr);
 }
 
-struct hw_interrupt_type systemasic_int = {
-        .typename       = "System ASIC",
-        .startup        = startup_systemasic_irq,
-        .shutdown       = shutdown_systemasic_irq,
-        .enable         = enable_systemasic_irq,
-        .disable        = disable_systemasic_irq,
-        .ack            = ack_systemasic_irq,
-        .end            = end_systemasic_irq,
+struct irq_chip systemasic_int = {
+        .name           = "System ASIC",
+        .mask           = disable_systemasic_irq,
+        .mask_ack       = mask_ack_systemasic_irq,
+        .unmask         = enable_systemasic_irq,
 };
 
 /*
@@ -117,37 +101,37 @@ struct hw_interrupt_type systemasic_int = {
  */
 int systemasic_irq_demux(int irq)
 {
-        __u32 emr, esr, status, level;
-        __u32 j, bit;
-
-        switch (irq) {
-                case 13:
-                        level = 0;
-                        break;
-                case 11:
-                        level = 1;
-                        break;
-                case  9:
-                        level = 2;
-                        break;
-                default:
-                        return irq;
-        }
-        emr = EMR_BASE + (level << 4) + (level << 2);
-        esr = ESR_BASE + (level << 2);
-
-        /* Mask the ESR to filter any spurious, unwanted interrupts */
-        status = inl(esr);
-        status &= inl(emr);
-
-        /* Now scan and find the first set bit as the event to map */
-        for (bit = 1, j = 0; j < 32; bit <<= 1, j++) {
-                if (status & bit) {
-                        irq = HW_EVENT_IRQ_BASE + j + (level << 5);
-                        return irq;
-                }
-        }
-
-        /* Not reached */
-        return irq;
+        __u32 emr, esr, status, level;
+        __u32 j, bit;
+
+        switch (irq) {
+        case 13:
+                level = 0;
+                break;
+        case 11:
+                level = 1;
+                break;
+        case  9:
+                level = 2;
+                break;
+        default:
+                return irq;
+        }
+        emr = EMR_BASE + (level << 4) + (level << 2);
+        esr = ESR_BASE + (level << 2);
+
+        /* Mask the ESR to filter any spurious, unwanted interrupts */
+        status = inl(esr);
+        status &= inl(emr);
+
+        /* Now scan and find the first set bit as the event to map */
+        for (bit = 1, j = 0; j < 32; bit <<= 1, j++) {
+                if (status & bit) {
+                        irq = HW_EVENT_IRQ_BASE + j + (level << 5);
+                        return irq;
+                }
+        }
+
+        /* Not reached */
+        return irq;
 }
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c
index 7d944fc75e93..d1bee4884cd6 100644
--- a/arch/sh/boards/mach-dreamcast/setup.c
+++ b/arch/sh/boards/mach-dreamcast/setup.c
@@ -28,7 +28,7 @@
 #include <asm/machvec.h>
 #include <mach/sysasic.h>
 
-extern struct hw_interrupt_type systemasic_int;
+extern struct irq_chip systemasic_int;
 extern void aica_time_init(void);
 extern int gapspci_init(void);
 extern int systemasic_irq_demux(int);
@@ -47,7 +47,8 @@ static void __init dreamcast_setup(char **cmdline_p)
 
         /* Assign all virtual IRQs to the System ASIC int. handler */
         for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
-                irq_desc[i].chip = &systemasic_int;
+                set_irq_chip_and_handler(i, &systemasic_int,
+                                         handle_level_irq);
 
         board_time_init = aica_time_init;
 
diff --git a/arch/sh/boards/mach-edosk7705/Makefile b/arch/sh/boards/mach-edosk7705/Makefile
index 14bdd531f116..cd54acb51499 100644
--- a/arch/sh/boards/mach-edosk7705/Makefile
+++ b/arch/sh/boards/mach-edosk7705/Makefile
@@ -3,4 +3,3 @@
 #
 
 obj-y    := setup.o io.o
-
diff --git a/arch/sh/boards/mach-edosk7705/io.c b/arch/sh/boards/mach-edosk7705/io.c
index 7d153e50a01b..5b9c57c43241 100644
--- a/arch/sh/boards/mach-edosk7705/io.c
+++ b/arch/sh/boards/mach-edosk7705/io.c
@@ -10,28 +10,24 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
 #include <mach/edosk7705.h>
 #include <asm/addrspace.h>
 
 #define SMC_IOADDR      0xA2000000
 
-#define maybebadio(name,port) \
-  printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
-         #name, (port), (__u32) __builtin_return_address(0))
-
 /* Map the Ethernet addresses as if it is at 0x300 - 0x320 */
-unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
+static unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
 {
-     if (port >= 0x300 && port < 0x320) {
-          /* SMC91C96 registers are 4 byte aligned rather than the
-           * usual 2 byte!
-           */
-          return SMC_IOADDR + ( (port - 0x300) * 2);
-     }
+        /*
+         * SMC91C96 registers are 4 byte aligned rather than the
+         * usual 2 byte!
+         */
+        if (port >= 0x300 && port < 0x320)
+                return SMC_IOADDR + ((port - 0x300) * 2);
 
-     maybebadio(sh_edosk7705_isa_port2addr, port);
-     return port;
+        maybebadio(port);
+        return port;
 }
 
 /* Trying to read / write bytes on odd-byte boundaries to the Ethernet
@@ -42,53 +38,34 @@ unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
  */
 unsigned char sh_edosk7705_inb(unsigned long port)
 {
-        if (port >= 0x300 && port < 0x320 && port & 0x01) {
-                return (volatile unsigned char)(generic_inw(port -1) >> 8);
-        }
-        return *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port);
-}
+        if (port >= 0x300 && port < 0x320 && port & 0x01)
+                return __raw_readw(port - 1) >> 8;
 
-unsigned int sh_edosk7705_inl(unsigned long port)
-{
-        return *(volatile unsigned long *)port;
+        return __raw_readb(sh_edosk7705_isa_port2addr(port));
 }
 
 void sh_edosk7705_outb(unsigned char value, unsigned long port)
 {
         if (port >= 0x300 && port < 0x320 && port & 0x01) {
-                generic_outw(((unsigned short)value << 8), port -1);
+                __raw_writew(((unsigned short)value << 8), port - 1);
                 return;
         }
-        *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port) = value;
-}
 
-void sh_edosk7705_outl(unsigned int value, unsigned long port)
-{
-        *(volatile unsigned long *)port = value;
+        __raw_writeb(value, sh_edosk7705_isa_port2addr(port));
 }
 
 void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count)
 {
         unsigned char *p = addr;
-        while (count--) *p++ = sh_edosk7705_inb(port);
-}
 
-void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count)
-{
-        unsigned long *p = (unsigned long*)addr;
         while (count--)
-                *p++ = *(volatile unsigned long *)port;
+                *p++ = sh_edosk7705_inb(port);
 }
 
 void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count)
 {
-        unsigned char *p = (unsigned char*)addr;
-        while (count--) sh_edosk7705_outb(*p++, port);
-}
+        unsigned char *p = (unsigned char *)addr;
 
-void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count)
-{
-        unsigned long *p = (unsigned long*)addr;
-        while (count--) sh_edosk7705_outl(*p++, port);
+        while (count--)
+                sh_edosk7705_outb(*p++, port);
 }
-
diff --git a/arch/sh/boards/mach-edosk7705/setup.c b/arch/sh/boards/mach-edosk7705/setup.c
index ab3f47bffdf3..d59225e26fb9 100644
--- a/arch/sh/boards/mach-edosk7705/setup.c
+++ b/arch/sh/boards/mach-edosk7705/setup.c
@@ -9,6 +9,7 @@
  * board by S. Dunn, 2003.
  */
 #include <linux/init.h>
+#include <linux/irq.h>
 #include <asm/machvec.h>
 #include <mach/edosk7705.h>
 
@@ -26,18 +27,10 @@ static struct sh_machine_vector mv_edosk7705 __initmv = {
         .mv_nr_irqs             = 80,
 
         .mv_inb                 = sh_edosk7705_inb,
-        .mv_inl                 = sh_edosk7705_inl,
         .mv_outb                = sh_edosk7705_outb,
-        .mv_outl                = sh_edosk7705_outl,
-
-        .mv_inl_p               = sh_edosk7705_inl,
-        .mv_outl_p              = sh_edosk7705_outl,
 
         .mv_insb                = sh_edosk7705_insb,
-        .mv_insl                = sh_edosk7705_insl,
         .mv_outsb               = sh_edosk7705_outsb,
-        .mv_outsl               = sh_edosk7705_outsl,
 
-        .mv_isa_port2addr       = sh_edosk7705_isa_port2addr,
         .mv_init_irq            = sh_edosk7705_init_irq,
 };
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index 64af1f2eef05..d936c1af7620 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -10,15 +10,91 @@
 #include <linux/suspend.h>
 #include <linux/errno.h>
 #include <linux/time.h>
+#include <linux/delay.h>
+#include <linux/gfp.h>
 #include <asm/io.h>
 #include <asm/hd64461.h>
 #include <mach/hp6xx.h>
 #include <cpu/dac.h>
-#include <asm/pm.h>
+#include <asm/freq.h>
+#include <asm/watchdog.h>
+
+#define INTR_OFFSET     0x600
 
 #define STBCR           0xffffff82
 #define STBCR2          0xffffff88
 
+#define STBCR_STBY      0x80
+#define STBCR_MSTP2     0x04
+
+#define MCR             0xffffff68
+#define RTCNT           0xffffff70
+
+#define MCR_RMODE       2
+#define MCR_RFSH        4
+
+extern u8 wakeup_start;
+extern u8 wakeup_end;
+
+static void pm_enter(void)
+{
+        u8 stbcr, csr;
+        u16 frqcr, mcr;
+        u32 vbr_new, vbr_old;
+
+        set_bl_bit();
+
+        /* set wdt */
+        csr = sh_wdt_read_csr();
+        csr &= ~WTCSR_TME;
+        csr |= WTCSR_CKS_4096;
+        sh_wdt_write_csr(csr);
+        csr = sh_wdt_read_csr();
+        sh_wdt_write_cnt(0);
+
+        /* disable PLL1 */
+        frqcr = ctrl_inw(FRQCR);
+        frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
+        ctrl_outw(frqcr, FRQCR);
+
+        /* enable standby */
+        stbcr = ctrl_inb(STBCR);
+        ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
+
+        /* set self-refresh */
+        mcr = ctrl_inw(MCR);
+        ctrl_outw(mcr & ~MCR_RFSH, MCR);
+
+        /* set interrupt handler */
+        asm volatile("stc vbr, %0" : "=r" (vbr_old));
+        vbr_new = get_zeroed_page(GFP_ATOMIC);
+        udelay(50);
+        memcpy((void*)(vbr_new + INTR_OFFSET),
+               &wakeup_start, &wakeup_end - &wakeup_start);
+        asm volatile("ldc %0, vbr" : : "r" (vbr_new));
+
+        ctrl_outw(0, RTCNT);
+        ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
+
+        cpu_sleep();
+
+        asm volatile("ldc %0, vbr" : : "r" (vbr_old));
+
+        free_page(vbr_new);
+
+        /* enable PLL1 */
+        frqcr = ctrl_inw(FRQCR);
+        frqcr |= FRQCR_PSTBY;
+        ctrl_outw(frqcr, FRQCR);
+        udelay(50);
+        frqcr |= FRQCR_PLLEN;
+        ctrl_outw(frqcr, FRQCR);
+
+        ctrl_outb(stbcr, STBCR);
+
+        clear_bl_bit();
+}
+
 static int hp6x0_pm_enter(suspend_state_t state)
 {
         u8 stbcr, stbcr2;
diff --git a/arch/sh/boards/mach-microdev/Makefile b/arch/sh/boards/mach-microdev/Makefile
index 1387dd6c85eb..4e3588e8806b 100644
--- a/arch/sh/boards/mach-microdev/Makefile
+++ b/arch/sh/boards/mach-microdev/Makefile
@@ -2,7 +2,4 @@
 # Makefile for the SuperH MicroDev specific parts of the kernel
 #
 
-obj-y    := setup.o irq.o io.o
-
-obj-$(CONFIG_HEARTBEAT) += led.o
-
+obj-y    := setup.o irq.o io.o fdc37c93xapm.o
diff --git a/arch/sh/boards/mach-microdev/fdc37c93xapm.c b/arch/sh/boards/mach-microdev/fdc37c93xapm.c
new file mode 100644
index 000000000000..458a7cf5fb46
--- /dev/null
+++ b/arch/sh/boards/mach-microdev/fdc37c93xapm.c
@@ -0,0 +1,160 @@
+/*
+ *
+ * Setup for the SMSC FDC37C93xAPM
+ *
+ * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
+ * Copyright (C) 2003, 2004 SuperH, Inc.
+ * Copyright (C) 2004, 2005 Paul Mundt
+ *
+ * SuperH SH4-202 MicroDev board support.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ */
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <mach/microdev.h>
+
+#define SMSC_CONFIG_PORT_ADDR    (0x3F0)
+#define SMSC_INDEX_PORT_ADDR     SMSC_CONFIG_PORT_ADDR
+#define SMSC_DATA_PORT_ADDR      (SMSC_INDEX_PORT_ADDR + 1)
+
+#define SMSC_ENTER_CONFIG_KEY    0x55
+#define SMSC_EXIT_CONFIG_KEY     0xaa
+
+#define SMCS_LOGICAL_DEV_INDEX   0x07   /* Logical Device Number */
+#define SMSC_DEVICE_ID_INDEX     0x20   /* Device ID */
+#define SMSC_DEVICE_REV_INDEX    0x21   /* Device Revision */
+#define SMSC_ACTIVATE_INDEX      0x30   /* Activate */
+#define SMSC_PRIMARY_BASE_INDEX  0x60   /* Primary Base Address */
+#define SMSC_SECONDARY_BASE_INDEX 0x62  /* Secondary Base Address */
+#define SMSC_PRIMARY_INT_INDEX   0x70   /* Primary Interrupt Select */
+#define SMSC_SECONDARY_INT_INDEX 0x72   /* Secondary Interrupt Select */
+#define SMSC_HDCS0_INDEX         0xf0   /* HDCS0 Address Decoder */
+#define SMSC_HDCS1_INDEX         0xf1   /* HDCS1 Address Decoder */
+
+#define SMSC_IDE1_DEVICE        1       /* IDE #1 logical device */
+#define SMSC_IDE2_DEVICE        2       /* IDE #2 logical device */
+#define SMSC_PARALLEL_DEVICE    3       /* Parallel Port logical device */
+#define SMSC_SERIAL1_DEVICE     4       /* Serial #1 logical device */
+#define SMSC_SERIAL2_DEVICE     5       /* Serial #2 logical device */
+#define SMSC_KEYBOARD_DEVICE    7       /* Keyboard logical device */
+#define SMSC_CONFIG_REGISTERS   8       /* Configuration Registers (Aux I/O) */
+
+#define SMSC_READ_INDEXED(index) ({ \
+        outb((index), SMSC_INDEX_PORT_ADDR); \
+        inb(SMSC_DATA_PORT_ADDR); })
+#define SMSC_WRITE_INDEXED(val, index) ({ \
+        outb((index), SMSC_INDEX_PORT_ADDR); \
+        outb((val),   SMSC_DATA_PORT_ADDR); })
+
+#define IDE1_PRIMARY_BASE       0x01f0  /* Task File Registe base for IDE #1 */
+#define IDE1_SECONDARY_BASE     0x03f6  /* Miscellaneous AT registers for IDE #1 */
+#define IDE2_PRIMARY_BASE       0x0170  /* Task File Registe base for IDE #2 */
+#define IDE2_SECONDARY_BASE     0x0376  /* Miscellaneous AT registers for IDE #2 */
+
+#define SERIAL1_PRIMARY_BASE    0x03f8
+#define SERIAL2_PRIMARY_BASE    0x02f8
+
+#define MSB(x)          ( (x) >> 8 )
+#define LSB(x)          ( (x) & 0xff )
+
+        /* General-Purpose base address on CPU-board FPGA */
+#define MICRODEV_FPGA_GP_BASE           0xa6100000ul
+
+static int __init smsc_superio_setup(void)
+{
+
+        unsigned char devid, devrev;
+
+                /* Initially the chip is in run state */
+                /* Put it into configuration state */
+        outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
+
+                /* Read device ID info */
+        devid  = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
+        devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
+
+        if ((devid == 0x30) && (devrev == 0x01))
+                printk("SMSC FDC37C93xAPM SuperIO device detected\n");
+        else
+                return -ENODEV;
+
+                /* Select the keyboard device */
+        SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
+                /* enable it */
+        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
+                /* enable the interrupts */
+        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX);
+        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX);
+
+                /* Select the Serial #1 device */
+        SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
+                /* enable it */
+        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
+                /* program with port addresses */
+        SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
+        SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
+        SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
+                /* enable the interrupts */
+        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX);
+
+                /* Select the Serial #2 device */
+        SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
+                /* enable it */
+        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
+                /* program with port addresses */
+        SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
+        SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
+        SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
+                /* enable the interrupts */
+        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX);
+
+                /* Select the IDE#1 device */
+        SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
+                /* enable it */
+        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
+                /* program with port addresses */
+        SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
+        SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
+        SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
+        SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
+        SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX);
+        SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX);
+                /* select the interrupt */
+        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX);
+
+                /* Select the IDE#2 device */
+        SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
+                /* enable it */
+        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
+                /* program with port addresses */
+        SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
+        SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
+        SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
+        SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
+                /* select the interrupt */
+        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX);
+
+                /* Select the configuration registers */
+        SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX);
+                /* enable the appropriate GPIO pins for IDE functionality:
+                 * bit[0]   In/Out              1==input;  0==output
+                 * bit[1]   Polarity            1==invert; 0==no invert
+                 * bit[2]   Int Enb #1          1==Enable Combined IRQ #1; 0==disable
+                 * bit[3:4] Function Select     00==original; 01==Alternate Function #1
+                 */
+        SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
+        SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
+        SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
+        SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
+        SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
+
+                /* Exit the configuration state */
+        outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
+
+        return 0;
+}
+device_initcall(smsc_superio_setup);
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index 702753cbd28f..b551963579c1 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -67,27 +67,13 @@ static const struct {
 
 static void enable_microdev_irq(unsigned int irq);
 static void disable_microdev_irq(unsigned int irq);
-
-        /* shutdown is same as "disable" */
-#define shutdown_microdev_irq disable_microdev_irq
-
 static void mask_and_ack_microdev(unsigned int);
-static void end_microdev_irq(unsigned int irq);
-
-static unsigned int startup_microdev_irq(unsigned int irq)
-{
-        enable_microdev_irq(irq);
-        return 0;               /* never anything pending */
-}
 
-static struct hw_interrupt_type microdev_irq_type = {
-        .typename = "MicroDev-IRQ",
-        .startup = startup_microdev_irq,
-        .shutdown = shutdown_microdev_irq,
-        .enable = enable_microdev_irq,
-        .disable = disable_microdev_irq,
+static struct irq_chip microdev_irq_type = {
+        .name = "MicroDev-IRQ",
+        .unmask = enable_microdev_irq,
+        .mask = disable_microdev_irq,
         .ack = mask_and_ack_microdev,
-        .end = end_microdev_irq
 };
 
 static void disable_microdev_irq(unsigned int irq)
@@ -130,11 +116,11 @@ static void enable_microdev_irq(unsigned int irq)
         ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
 }
 
-        /* This functions sets the desired irq handler to be a MicroDev type */
+/* This function sets the desired irq handler to be a MicroDev type */
 static void __init make_microdev_irq(unsigned int irq)
 {
         disable_irq_nosync(irq);
-        irq_desc[irq].chip = &microdev_irq_type;
+        set_irq_chip_and_handler(irq, &microdev_irq_type, handle_level_irq);
         disable_microdev_irq(irq);
 }
 
@@ -143,17 +129,11 @@ static void mask_and_ack_microdev(unsigned int irq)
         disable_microdev_irq(irq);
 }
 
-static void end_microdev_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_microdev_irq(irq);
-}
-
 extern void __init init_microdev_irq(void)
 {
         int i;
 
-                /* disable interrupts on the FPGA INTC register */
+        /* disable interrupts on the FPGA INTC register */
         ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
 
         for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
@@ -179,5 +159,3 @@ extern void microdev_print_fpga_intc_status(void)
         printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria);
         printk("-------------------------------------------------------------------------------\n");
 }
-
-
diff --git a/arch/sh/boards/mach-microdev/led.c b/arch/sh/boards/mach-microdev/led.c
deleted file mode 100644
index 36e54b47a752..000000000000
--- a/arch/sh/boards/mach-microdev/led.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * linux/arch/sh/boards/superh/microdev/led.c
- *
- * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
- * Copyright (C) 2003 Richard Curnow (Richard.Curnow@superh.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- */
-
-#include <asm/io.h>
-
-#define LED_REGISTER 0xa6104d20
-
-static void mach_led_d9(int value)
-{
-        unsigned long reg;
-        reg = ctrl_inl(LED_REGISTER);
-        reg &= ~1;
-        reg |= (value & 1);
-        ctrl_outl(reg, LED_REGISTER);
-        return;
-}
-
-static void mach_led_d10(int value)
-{
-        unsigned long reg;
-        reg = ctrl_inl(LED_REGISTER);
-        reg &= ~2;
-        reg |= ((value & 1) << 1);
-        ctrl_outl(reg, LED_REGISTER);
-        return;
-}
-
-
-#ifdef CONFIG_HEARTBEAT
-#include <linux/sched.h>
-
-static unsigned char banner_table[] = {
-        0x11, 0x01, 0x11, 0x01, 0x11, 0x03,
-        0x11, 0x01, 0x11, 0x01, 0x13, 0x03,
-        0x11, 0x01, 0x13, 0x01, 0x13, 0x01, 0x11, 0x03,
-        0x11, 0x03,
-        0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
-        0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x11, 0x07,
-        0x13, 0x01, 0x13, 0x03,
-        0x11, 0x01, 0x11, 0x03,
-        0x13, 0x01, 0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
-        0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
-        0x13, 0x01, 0x13, 0x01, 0x13, 0x03,
-        0x13, 0x01, 0x11, 0x01, 0x11, 0x03,
-        0x11, 0x03,
-        0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x13, 0x07,
-        0xff
-};
-
-static void banner(void)
-{
-        static int pos = 0;
-        static int count = 0;
-
-        if (count) {
-                count--;
-        } else {
-                int val = banner_table[pos];
-                if (val == 0xff) {
-                        pos = 0;
-                        val = banner_table[pos];
-                }
-                pos++;
-                mach_led_d10((val >> 4) & 1);
-                count = 10 * (val & 0xf);
-        }
-}
-
-/* From heartbeat_harp in the stboards directory */
-/* acts like an actual heart beat -- ie thump-thump-pause... */
-void microdev_heartbeat(void)
-{
-        static unsigned cnt = 0, period = 0, dist = 0;
-
-        if (cnt == 0 || cnt == dist)
-                mach_led_d9(1);
-        else if (cnt == 7 || cnt == dist+7)
-                mach_led_d9(0);
-
-        if (++cnt > period) {
-                cnt = 0;
-                /* The hyperbolic function below modifies the heartbeat period
-                 * length in dependency of the current (5min) load. It goes
-                 * through the points f(0)=126, f(1)=86, f(5)=51,
-                 * f(inf)->30. */
-                period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
-                dist = period / 4;
-        }
-
-        banner();
-}
-
-#endif
diff --git a/arch/sh/boards/mach-microdev/setup.c b/arch/sh/boards/mach-microdev/setup.c
index a9202fe3cb59..d1df2a4fb9b8 100644
--- a/arch/sh/boards/mach-microdev/setup.c
+++ b/arch/sh/boards/mach-microdev/setup.c
@@ -17,70 +17,12 @@
 #include <mach/microdev.h>
 #include <asm/io.h>
 #include <asm/machvec.h>
-
-extern void microdev_heartbeat(void);
-
-
-/****************************************************************************/
-
-
-        /*
-         * Setup for the SMSC FDC37C93xAPM
-         */
-#define SMSC_CONFIG_PORT_ADDR    (0x3F0)
-#define SMSC_INDEX_PORT_ADDR     SMSC_CONFIG_PORT_ADDR
-#define SMSC_DATA_PORT_ADDR      (SMSC_INDEX_PORT_ADDR + 1)
-
-#define SMSC_ENTER_CONFIG_KEY    0x55
-#define SMSC_EXIT_CONFIG_KEY     0xaa
-
-#define SMCS_LOGICAL_DEV_INDEX   0x07   /* Logical Device Number */
-#define SMSC_DEVICE_ID_INDEX     0x20   /* Device ID */
-#define SMSC_DEVICE_REV_INDEX    0x21   /* Device Revision */
-#define SMSC_ACTIVATE_INDEX      0x30   /* Activate */
-#define SMSC_PRIMARY_BASE_INDEX  0x60   /* Primary Base Address */
-#define SMSC_SECONDARY_BASE_INDEX 0x62  /* Secondary Base Address */
-#define SMSC_PRIMARY_INT_INDEX   0x70   /* Primary Interrupt Select */
-#define SMSC_SECONDARY_INT_INDEX 0x72   /* Secondary Interrupt Select */
-#define SMSC_HDCS0_INDEX         0xf0   /* HDCS0 Address Decoder */
-#define SMSC_HDCS1_INDEX         0xf1   /* HDCS1 Address Decoder */
-
-#define SMSC_IDE1_DEVICE        1       /* IDE #1 logical device */
-#define SMSC_IDE2_DEVICE        2       /* IDE #2 logical device */
-#define SMSC_PARALLEL_DEVICE    3       /* Parallel Port logical device */
-#define SMSC_SERIAL1_DEVICE     4       /* Serial #1 logical device */
-#define SMSC_SERIAL2_DEVICE     5       /* Serial #2 logical device */
-#define SMSC_KEYBOARD_DEVICE    7       /* Keyboard logical device */
-#define SMSC_CONFIG_REGISTERS   8       /* Configuration Registers (Aux I/O) */
-
-#define SMSC_READ_INDEXED(index) ({ \
-        outb((index), SMSC_INDEX_PORT_ADDR); \
-        inb(SMSC_DATA_PORT_ADDR); })
-#define SMSC_WRITE_INDEXED(val, index) ({ \
-        outb((index), SMSC_INDEX_PORT_ADDR); \
-        outb((val),   SMSC_DATA_PORT_ADDR); })
-
-#define IDE1_PRIMARY_BASE       0x01f0  /* Task File Registe base for IDE #1 */
-#define IDE1_SECONDARY_BASE     0x03f6  /* Miscellaneous AT registers for IDE #1 */
-#define IDE2_PRIMARY_BASE       0x0170  /* Task File Registe base for IDE #2 */
-#define IDE2_SECONDARY_BASE     0x0376  /* Miscellaneous AT registers for IDE #2 */
-
-#define SERIAL1_PRIMARY_BASE    0x03f8
-#define SERIAL2_PRIMARY_BASE    0x02f8
-
-#define MSB(x)          ( (x) >> 8 )
-#define LSB(x)          ( (x) & 0xff )
-
-        /* General-Purpose base address on CPU-board FPGA */
-#define MICRODEV_FPGA_GP_BASE           0xa6100000ul
-
-        /* assume a Keyboard Controller is present */
-int microdev_kbd_controller_present = 1;
+#include <asm/sizes.h>
 
 static struct resource smc91x_resources[] = {
         [0] = {
                 .start          = 0x300,
-                .end            = 0x300 + 0x0001000 - 1,
+                .end            = 0x300 + SZ_4K - 1,
                 .flags          = IORESOURCE_MEM,
         },
         [1] = {
@@ -97,7 +39,6 @@ static struct platform_device smc91x_device = {
         .resource       = smc91x_resources,
 };
 
-#ifdef CONFIG_FB_S1D13XXX
 static struct s1d13xxxfb_regval s1d13806_initregs[] = {
         { S1DREG_MISC,                  0x00 },
         { S1DREG_COM_DISP_MODE,         0x00 },
@@ -216,12 +157,12 @@ static struct s1d13xxxfb_pdata s1d13806_platform_data = {
 static struct resource s1d13806_resources[] = {
         [0] = {
                 .start          = 0x07200000,
-                .end            = 0x07200000 + 0x00200000 - 1,
+                .end            = 0x07200000 + SZ_2M - 1,
                 .flags          = IORESOURCE_MEM,
         },
         [1] = {
                 .start          = 0x07000000,
-                .end            = 0x07000000 + 0x00200000 - 1,
+                .end            = 0x07000000 + SZ_2M - 1,
                 .flags          = IORESOURCE_MEM,
         },
 };
@@ -236,145 +177,24 @@ static struct platform_device s1d13806_device = {
                 .platform_data  = &s1d13806_platform_data,
         },
 };
-#endif
 
 static struct platform_device *microdev_devices[] __initdata = {
         &smc91x_device,
-#ifdef CONFIG_FB_S1D13XXX
         &s1d13806_device,
-#endif
 };
 
 static int __init microdev_devices_setup(void)
 {
         return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
 }
-
-/*
- * Setup for the SMSC FDC37C93xAPM
- */
-static int __init smsc_superio_setup(void)
-{
-
-        unsigned char devid, devrev;
-
-                /* Initially the chip is in run state */
-                /* Put it into configuration state */
-        outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
-
-                /* Read device ID info */
-        devid  = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
-        devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
-        if ( (devid==0x30) && (devrev==0x01) )
-        {
-                printk("SMSC FDC37C93xAPM SuperIO device detected\n");
-        }
-        else
-        {               /* not the device identity we expected */
-                printk("Not detected a SMSC FDC37C93xAPM SuperIO device (devid=0x%02x, rev=0x%02x)\n",
-                        devid, devrev);
-                        /* inform the keyboard driver that we have no keyboard controller */
-                microdev_kbd_controller_present = 0;
-                        /* little point in doing anything else in this functon */
-                return 0;
-        }
-
-                /* Select the keyboard device */
-        SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-                /* enable it */
-        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-                /* enable the interrupts */
-        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX);
-        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX);
-
-                /* Select the Serial #1 device */
-        SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-                /* enable it */
-        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-                /* program with port addresses */
-        SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
-        SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
-        SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
-                /* enable the interrupts */
-        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX);
-
-                /* Select the Serial #2 device */
-        SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-                /* enable it */
-        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-                /* program with port addresses */
-        SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
-        SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
-        SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
-                /* enable the interrupts */
-        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX);
-
-                /* Select the IDE#1 device */
-        SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-                /* enable it */
-        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-                /* program with port addresses */
-        SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
-        SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
-        SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
-        SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
-        SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX);
-        SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX);
-                /* select the interrupt */
-        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX);
-
-                /* Select the IDE#2 device */
-        SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-                /* enable it */
-        SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-                /* program with port addresses */
-        SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
-        SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
-        SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
-        SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
-                /* select the interrupt */
-        SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX);
-
-                /* Select the configuration registers */
-        SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX);
-                /* enable the appropriate GPIO pins for IDE functionality:
-                 * bit[0]   In/Out              1==input;  0==output
-                 * bit[1]   Polarity            1==invert; 0==no invert
-                 * bit[2]   Int Enb #1          1==Enable Combined IRQ #1; 0==disable
-                 * bit[3:4] Function Select     00==original; 01==Alternate Function #1
-                 */
-        SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
-        SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
-        SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
-        SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
-        SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
-
-                /* Exit the configuration state */
-        outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
-
-        return 0;
-}
-
-static void __init microdev_setup(char **cmdline_p)
-{
-        int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
-        const int fpgaRevision = *fpgaRevisionRegister;
-        int * const CacheControlRegister = (int*)CCR;
-
-        device_initcall(microdev_devices_setup);
-        device_initcall(smsc_superio_setup);
-
-        printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n",
-                get_system_type(), fpgaRevision, *CacheControlRegister);
-}
+device_initcall(microdev_devices_setup);
 
 /*
  * The Machine Vector
  */
 static struct sh_machine_vector mv_sh4202_microdev __initmv = {
         .mv_name                = "SH4-202 MicroDev",
-        .mv_setup               = microdev_setup,
-        .mv_nr_irqs             = 72,           /* QQQ need to check this - use the MACRO */
+        .mv_nr_irqs             = 72,
 
         .mv_inb                 = microdev_inb,
         .mv_inw                 = microdev_inw,
@@ -398,8 +218,4 @@ static struct sh_machine_vector mv_sh4202_microdev __initmv = {
         .mv_outsl               = microdev_outsl,
 
         .mv_init_irq            = init_microdev_irq,
-
-#ifdef CONFIG_HEARTBEAT
-        .mv_heartbeat           = microdev_heartbeat,
-#endif
 };
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 975281980299..cc1408119c24 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -89,6 +89,7 @@ static struct resource sh_keysc_resources[] = {
 
 static struct platform_device sh_keysc_device = {
         .name           = "sh_keysc",
+        .id             = 0, /* "keysc0" clock */
         .num_resources  = ARRAY_SIZE(sh_keysc_resources),
         .resource       = sh_keysc_resources,
         .dev    = {
@@ -261,6 +262,8 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
                 .sys_bus_cfg = {
                         .ldmt2r = 0x06000a09,
                         .ldmt3r = 0x180e3418,
+                        /* set 1s delay to encourage fsync() */
+                        .deferred_io_msec = 1000,
                 },
         }
 #endif
@@ -273,6 +276,10 @@ static struct resource migor_lcdc_resources[] = {
                 .end    = 0xfe941fff,
                 .flags  = IORESOURCE_MEM,
         },
+        [1] = {
+                .start  = 28,
+                .flags  = IORESOURCE_IRQ,
+        },
 };
 
 static struct platform_device migor_lcdc_device = {
@@ -300,6 +307,7 @@ static void camera_power_on(void)
         gpio_set_value(GPIO_PTT3, 0);
         mdelay(10);
         gpio_set_value(GPIO_PTT3, 1);
+        mdelay(10); /* wait to let chip come out of reset */
 }
 
 static void camera_power_off(void)
@@ -432,6 +440,7 @@ static struct resource migor_ceu_resources[] = {
 
 static struct platform_device migor_ceu_device = {
         .name           = "sh_mobile_ceu",
+        .id             = 0, /* "ceu0" clock */
         .num_resources  = ARRAY_SIZE(migor_ceu_resources),
         .resource       = migor_ceu_resources,
         .dev    = {
@@ -479,7 +488,6 @@ static int __init migor_devices_setup(void)
         ctrl_outl(0x00110080, BSC_CS4WCR);
 
         /* KEYSC */
-        clk_always_enable("mstp214"); /* KEYSC */
         gpio_request(GPIO_FN_KEYOUT0, NULL);
         gpio_request(GPIO_FN_KEYOUT1, NULL);
         gpio_request(GPIO_FN_KEYOUT2, NULL);
@@ -501,7 +509,6 @@ static int __init migor_devices_setup(void)
         gpio_request(GPIO_FN_IRQ6, NULL);
 
         /* LCD Panel */
-        clk_always_enable("mstp200"); /* LCDC */
 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
         gpio_request(GPIO_FN_LCDD17, NULL);
         gpio_request(GPIO_FN_LCDD16, NULL);
@@ -554,7 +561,6 @@ static int __init migor_devices_setup(void)
 #endif
 
         /* CEU */
-        clk_always_enable("mstp203"); /* CEU */
         gpio_request(GPIO_FN_VIO_CLK2, NULL);
         gpio_request(GPIO_FN_VIO_VD2, NULL);
         gpio_request(GPIO_FN_VIO_HD2, NULL);
@@ -589,12 +595,3 @@ static int __init migor_devices_setup(void)
         return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
 }
 __initcall(migor_devices_setup);
-
-static void __init migor_setup(char **cmdline_p)
-{
-}
-
-static struct sh_machine_vector mv_migor __initmv = {
-        .mv_name                = "Migo-R",
-        .mv_setup               = migor_setup,
-};
diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig
new file mode 100644
index 000000000000..bff095dffc02
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/Kconfig
@@ -0,0 +1,18 @@
+if SH_RSK
+
+choice
+        prompt "RSK+ options"
+        default SH_RSK7203
+
+config SH_RSK7201
+        bool "RSK7201"
+        depends on CPU_SUBTYPE_SH7201
+
+config SH_RSK7203
+        bool "RSK7203"
+        select GENERIC_GPIO
+        depends on CPU_SUBTYPE_SH7203
+
+endchoice
+
+endif
diff --git a/arch/sh/boards/mach-rsk/Makefile b/arch/sh/boards/mach-rsk/Makefile
new file mode 100644
index 000000000000..498da75ce38b
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/Makefile
@@ -0,0 +1,2 @@
+obj-y                           := setup.o
+obj-$(CONFIG_SH_RSK7203)        += devices-rsk7203.o
diff --git a/arch/sh/boards/board-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index 58266f06134a..73f743b9be8d 100644
--- a/arch/sh/boards/board-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -50,73 +50,6 @@ static struct platform_device smc911x_device = {
         },
 };
 
-static const char *probes[] = { "cmdlinepart", NULL };
-
-static struct mtd_partition *parsed_partitions;
-
-static struct mtd_partition rsk7203_partitions[] = {
-        {
-                .name           = "Bootloader",
-                .offset         = 0x00000000,
-                .size           = 0x00040000,
-                .mask_flags     = MTD_WRITEABLE,
-        }, {
-                .name           = "Kernel",
-                .offset         = MTDPART_OFS_NXTBLK,
-                .size           = 0x001c0000,
-        }, {
-                .name           = "Flash_FS",
-                .offset         = MTDPART_OFS_NXTBLK,
-                .size           = MTDPART_SIZ_FULL,
-        }
-};
-
-static struct physmap_flash_data flash_data = {
-        .width          = 2,
-};
-
-static struct resource flash_resource = {
-        .start          = 0x20000000,
-        .end            = 0x20400000,
-        .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device flash_device = {
-        .name           = "physmap-flash",
-        .id             = -1,
-        .resource       = &flash_resource,
-        .num_resources  = 1,
-        .dev            = {
-                .platform_data = &flash_data,
-        },
-};
-
-static struct mtd_info *flash_mtd;
-
-static struct map_info rsk7203_flash_map = {
-        .name           = "RSK+ Flash",
-        .size           = 0x400000,
-        .bankwidth      = 2,
-};
-
-static void __init set_mtd_partitions(void)
-{
-        int nr_parts = 0;
-
-        simple_map_init(&rsk7203_flash_map);
-        flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map);
-        nr_parts = parse_mtd_partitions(flash_mtd, probes,
-                                        &parsed_partitions, 0);
-        /* If there is no partition table, used the hard coded table */
-        if (nr_parts <= 0) {
-                flash_data.parts = rsk7203_partitions;
-                flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions);
-        } else {
-                flash_data.nr_parts = nr_parts;
-                flash_data.parts = parsed_partitions;
-        }
-}
-
 static struct gpio_led rsk7203_gpio_leds[] = {
         {
                 .name                   = "green",
@@ -155,7 +88,6 @@ static struct platform_device led_device = {
 
 static struct platform_device *rsk7203_devices[] __initdata = {
         &smc911x_device,
-        &flash_device,
         &led_device,
 };
 
@@ -165,15 +97,7 @@ static int __init rsk7203_devices_setup(void)
         gpio_request(GPIO_FN_TXD0, NULL);
         gpio_request(GPIO_FN_RXD0, NULL);
 
-        set_mtd_partitions();
         return platform_add_devices(rsk7203_devices,
                                     ARRAY_SIZE(rsk7203_devices));
 }
 device_initcall(rsk7203_devices_setup);
-
-/*
- * The Machine Vector
- */
-static struct sh_machine_vector mv_rsk7203 __initmv = {
-        .mv_name        = "RSK+7203",
-};
diff --git a/arch/sh/boards/mach-rsk/setup.c b/arch/sh/boards/mach-rsk/setup.c
new file mode 100644
index 000000000000..af64d030a5c7
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/setup.c
@@ -0,0 +1,106 @@
+/*
+ * Renesas Technology Europe RSK+ Support.
+ *
+ * Copyright (C) 2008 Paul Mundt
+ * Copyright (C) 2008 Peter Griffin <pgriffin@mpc-data.co.uk>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/map.h>
+#include <asm/machvec.h>
+#include <asm/io.h>
+
+static const char *probes[] = { "cmdlinepart", NULL };
+
+static struct mtd_partition *parsed_partitions;
+
+static struct mtd_partition rsk_partitions[] = {
+        {
+                .name           = "Bootloader",
+                .offset         = 0x00000000,
+                .size           = 0x00040000,
+                .mask_flags     = MTD_WRITEABLE,
+        }, {
+                .name           = "Kernel",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = 0x001c0000,
+        }, {
+                .name           = "Flash_FS",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = MTDPART_SIZ_FULL,
+        }
+};
+
+static struct physmap_flash_data flash_data = {
+        .width          = 2,
+};
+
+static struct resource flash_resource = {
+        .start          = 0x20000000,
+        .end            = 0x20400000,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device flash_device = {
+        .name           = "physmap-flash",
+        .id             = -1,
+        .resource       = &flash_resource,
+        .num_resources  = 1,
+        .dev            = {
+                .platform_data = &flash_data,
+        },
+};
+
+static struct mtd_info *flash_mtd;
+
+static struct map_info rsk_flash_map = {
+        .name           = "RSK+ Flash",
+        .size           = 0x400000,
+        .bankwidth      = 2,
+};
+
+static void __init set_mtd_partitions(void)
+{
+        int nr_parts = 0;
+
+        simple_map_init(&rsk_flash_map);
+        flash_mtd = do_map_probe("cfi_probe", &rsk_flash_map);
+        nr_parts = parse_mtd_partitions(flash_mtd, probes,
+                                        &parsed_partitions, 0);
+        /* If there is no partition table, used the hard coded table */
+        if (nr_parts <= 0) {
+                flash_data.parts = rsk_partitions;
+                flash_data.nr_parts = ARRAY_SIZE(rsk_partitions);
+        } else {
+                flash_data.nr_parts = nr_parts;
+                flash_data.parts = parsed_partitions;
+        }
+}
+
+static struct platform_device *rsk_devices[] __initdata = {
+        &flash_device,
+};
+
+static int __init rsk_devices_setup(void)
+{
+        set_mtd_partitions();
+        return platform_add_devices(rsk_devices,
+                                    ARRAY_SIZE(rsk_devices));
+}
+device_initcall(rsk_devices_setup);
+
+/*
+ * The Machine Vector
+ */
+static struct sh_machine_vector mv_rsk __initmv = {
+        .mv_name        = "RSK+",
+};
diff --git a/arch/sh/boards/mach-se/7343/Makefile b/arch/sh/boards/mach-se/7343/Makefile
index 3024796c6203..4c3666a93790 100644
--- a/arch/sh/boards/mach-se/7343/Makefile
+++ b/arch/sh/boards/mach-se/7343/Makefile
@@ -2,4 +2,4 @@
 # Makefile for the 7343 SolutionEngine specific parts of the kernel
 #
 
-obj-y    := setup.o io.o irq.o
+obj-y    := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/7343/io.c b/arch/sh/boards/mach-se/7343/io.c
deleted file mode 100644
index 8741abc1da7b..000000000000
--- a/arch/sh/boards/mach-se/7343/io.c
+++ /dev/null
@@ -1,273 +0,0 @@
-/*
- * arch/sh/boards/se/7343/io.c
- *
- * I/O routine for SH-Mobile3AS 7343 SolutionEngine.
- *
- */
-#include <linux/kernel.h>
-#include <asm/io.h>
-#include <mach-se/mach/se7343.h>
-
-#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
-
-struct iop {
-        unsigned long start, end;
-        unsigned long base;
-        struct iop *(*check) (struct iop * p, unsigned long port);
-        unsigned char (*inb) (struct iop * p, unsigned long port);
-        unsigned short (*inw) (struct iop * p, unsigned long port);
-        void (*outb) (struct iop * p, unsigned char value, unsigned long port);
-        void (*outw) (struct iop * p, unsigned short value, unsigned long port);
-};
-
-struct iop *
-simple_check(struct iop *p, unsigned long port)
-{
-        static int count;
-
-        if (count < 100)
-                count++;
-
-        port &= 0xFFFF;
-
-        if ((p->start <= port) && (port <= p->end))
-                return p;
-        else
-                badio(check, port);
-}
-
-struct iop *
-ide_check(struct iop *p, unsigned long port)
-{
-        if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
-                return p;
-        return NULL;
-}
-
-unsigned char
-simple_inb(struct iop *p, unsigned long port)
-{
-        return *(unsigned char *) (p->base + port);
-}
-
-unsigned short
-simple_inw(struct iop *p, unsigned long port)
-{
-        return *(unsigned short *) (p->base + port);
-}
-
-void
-simple_outb(struct iop *p, unsigned char value, unsigned long port)
-{
-        *(unsigned char *) (p->base + port) = value;
-}
-
-void
-simple_outw(struct iop *p, unsigned short value, unsigned long port)
-{
-        *(unsigned short *) (p->base + port) = value;
-}
-
-unsigned char
-pcc_inb(struct iop *p, unsigned long port)
-{
-        unsigned long addr = p->base + port + 0x40000;
-        unsigned long v;
-
-        if (port & 1)
-                addr += 0x00400000;
-        v = *(volatile unsigned char *) addr;
-        return v;
-}
-
-void
-pcc_outb(struct iop *p, unsigned char value, unsigned long port)
-{
-        unsigned long addr = p->base + port + 0x40000;
-
-        if (port & 1)
-                addr += 0x00400000;
-        *(volatile unsigned char *) addr = value;
-}
-
-unsigned char
-bad_inb(struct iop *p, unsigned long port)
-{
-        badio(inb, port);
-}
-
-void
-bad_outb(struct iop *p, unsigned char value, unsigned long port)
-{
-        badio(inw, port);
-}
-
-#ifdef CONFIG_SMC91X
-/* MSTLANEX01 LAN at 0xb400:0000 */
-static struct iop laniop = {
-        .start = 0x00,
-        .end = 0x0F,
-        .base = 0x04000000,
-        .check = simple_check,
-        .inb = simple_inb,
-        .inw = simple_inw,
-        .outb = simple_outb,
-        .outw = simple_outw,
-};
-#endif
-
-#ifdef CONFIG_NE2000
-/* NE2000 pc card NIC */
-static struct iop neiop = {
-        .start = 0x280,
-        .end = 0x29f,
-        .base = 0xb0600000 + 0x80,      /* soft 0x280 -> hard 0x300 */
-        .check = simple_check,
-        .inb = pcc_inb,
-        .inw = simple_inw,
-        .outb = pcc_outb,
-        .outw = simple_outw,
-};
-#endif
-
-#ifdef CONFIG_IDE
-/* CF in CF slot */
-static struct iop cfiop = {
-        .base = 0xb0600000,
-        .check = ide_check,
-        .inb = pcc_inb,
-        .inw = simple_inw,
-        .outb = pcc_outb,
-        .outw = simple_outw,
-};
-#endif
-
-static __inline__ struct iop *
-port2iop(unsigned long port)
-{
-        if (0) ;
-#if defined(CONFIG_SMC91X)
-        else if (laniop.check(&laniop, port))
-                return &laniop;
-#endif
-#if defined(CONFIG_NE2000)
-        else if (neiop.check(&neiop, port))
-                return &neiop;
-#endif
-#if defined(CONFIG_IDE)
-        else if (cfiop.check(&cfiop, port))
-                return &cfiop;
-#endif
-        else
-                return NULL;
-}
-
-static inline void
-delay(void)
-{
-        ctrl_inw(0xac000000);
-        ctrl_inw(0xac000000);
-}
-
-unsigned char
-sh7343se_inb(unsigned long port)
-{
-        struct iop *p = port2iop(port);
-        return (p->inb) (p, port);
-}
-
-unsigned char
-sh7343se_inb_p(unsigned long port)
-{
-        unsigned char v = sh7343se_inb(port);
-        delay();
-        return v;
-}
-
-unsigned short
-sh7343se_inw(unsigned long port)
-{
-        struct iop *p = port2iop(port);
-        return (p->inw) (p, port);
-}
-
-unsigned int
-sh7343se_inl(unsigned long port)
-{
-        badio(inl, port);
-}
-
-void
-sh7343se_outb(unsigned char value, unsigned long port)
-{
-        struct iop *p = port2iop(port);
-        (p->outb) (p, value, port);
-}
-
-void
-sh7343se_outb_p(unsigned char value, unsigned long port)
-{
-        sh7343se_outb(value, port);
-        delay();
-}
-
-void
-sh7343se_outw(unsigned short value, unsigned long port)
-{
-        struct iop *p = port2iop(port);
-        (p->outw) (p, value, port);
-}
-
-void
-sh7343se_outl(unsigned int value, unsigned long port)
-{
-        badio(outl, port);
-}
-
-void
-sh7343se_insb(unsigned long port, void *addr, unsigned long count)
-{
-        unsigned char *a = addr;
-        struct iop *p = port2iop(port);
-        while (count--)
-                *a++ = (p->inb) (p, port);
-}
-
-void
-sh7343se_insw(unsigned long port, void *addr, unsigned long count)
-{
-        unsigned short *a = addr;
-        struct iop *p = port2iop(port);
-        while (count--)
-                *a++ = (p->inw) (p, port);
-}
-
-void
-sh7343se_insl(unsigned long port, void *addr, unsigned long count)
-{
-        badio(insl, port);
-}
-
-void
-sh7343se_outsb(unsigned long port, const void *addr, unsigned long count)
-{
-        unsigned char *a = (unsigned char *) addr;
-        struct iop *p = port2iop(port);
-        while (count--)
-                (p->outb) (p, *a++, port);
-}
-
-void
-sh7343se_outsw(unsigned long port, const void *addr, unsigned long count)
-{
-        unsigned short *a = (unsigned short *) addr;
-        struct iop *p = port2iop(port);
-        while (count--)
-                (p->outw) (p, *a++, port);
-}
-
-void
-sh7343se_outsl(unsigned long port, const void *addr, unsigned long count)
-{
-        badio(outsw, port);
-}
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 486f40bf9274..4de56f35f419 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -1,36 +1,16 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_reg.h>
+#include <linux/usb/isp116x.h>
+#include <linux/delay.h>
 #include <asm/machvec.h>
 #include <mach-se/mach/se7343.h>
 #include <asm/heartbeat.h>
 #include <asm/irq.h>
 #include <asm/io.h>
 
-static struct resource smc91x_resources[] = {
-        [0] = {
-                .start  = 0x10000000,
-                .end    = 0x1000000F,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                /*
-                 * shared with other devices via externel
-                 * interrupt controller in FPGA...
-                 */
-                .start  = SMC_IRQ,
-                .end    = SMC_IRQ,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device smc91x_device = {
-        .name           = "smc91x",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(smc91x_resources),
-        .resource       = smc91x_resources,
-};
-
 static struct resource heartbeat_resources[] = {
         [0] = {
                 .start  = PA_LED,
@@ -94,10 +74,83 @@ static struct platform_device nor_flash_device = {
         .resource       = nor_flash_resources,
 };
 
+#define ST16C2550C_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP)
+
+static struct plat_serial8250_port serial_platform_data[] = {
+        [0] = {
+                .iotype         = UPIO_MEM,
+                .mapbase        = 0x16000000,
+                .regshift       = 1,
+                .flags          = ST16C2550C_FLAGS,
+                .irq            = UARTA_IRQ,
+                .uartclk        = 7372800,
+        },
+        [1] = {
+                .iotype         = UPIO_MEM,
+                .mapbase        = 0x17000000,
+                .regshift       = 1,
+                .flags          = ST16C2550C_FLAGS,
+                .irq            = UARTB_IRQ,
+                .uartclk        = 7372800,
+        },
+        { },
+};
+
+static struct platform_device uart_device = {
+        .name                   = "serial8250",
+        .id                     = PLAT8250_DEV_PLATFORM,
+        .dev                    = {
+                .platform_data  = serial_platform_data,
+        },
+};
+
+static void isp116x_delay(struct device *dev, int delay)
+{
+        ndelay(delay);
+}
+
+static struct resource usb_resources[] = {
+        [0] = {
+                .start  = 0x11800000,
+                .end    = 0x11800001,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 0x11800002,
+                .end    = 0x11800003,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start  = USB_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct isp116x_platform_data usb_platform_data = {
+        .sel15Kres              = 1,
+        .oc_enable              = 1,
+        .int_act_high           = 0,
+        .int_edge_triggered     = 0,
+        .remote_wakeup_enable   = 0,
+        .delay                  = isp116x_delay,
+};
+
+static struct platform_device usb_device = {
+        .name                   = "isp116x-hcd",
+        .id                     = -1,
+        .num_resources          = ARRAY_SIZE(usb_resources),
+        .resource               = usb_resources,
+        .dev                    = {
+                .platform_data  = &usb_platform_data,
+        },
+
+};
+
 static struct platform_device *sh7343se_platform_devices[] __initdata = {
-        &smc91x_device,
         &heartbeat_device,
         &nor_flash_device,
+        &uart_device,
+        &usb_device,
 };
 
 static int __init sh7343se_devices_setup(void)
@@ -126,27 +179,6 @@ static void __init sh7343se_setup(char **cmdline_p)
 static struct sh_machine_vector mv_7343se __initmv = {
         .mv_name = "SolutionEngine 7343",
         .mv_setup = sh7343se_setup,
-        .mv_nr_irqs = 108,
-        .mv_inb = sh7343se_inb,
-        .mv_inw = sh7343se_inw,
-        .mv_inl = sh7343se_inl,
-        .mv_outb = sh7343se_outb,
-        .mv_outw = sh7343se_outw,
-        .mv_outl = sh7343se_outl,
-
-        .mv_inb_p = sh7343se_inb_p,
-        .mv_inw_p = sh7343se_inw,
-        .mv_inl_p = sh7343se_inl,
-        .mv_outb_p = sh7343se_outb_p,
-        .mv_outw_p = sh7343se_outw,
-        .mv_outl_p = sh7343se_outl,
-
-        .mv_insb = sh7343se_insb,
-        .mv_insw = sh7343se_insw,
-        .mv_insl = sh7343se_insl,
-        .mv_outsb = sh7343se_outsb,
-        .mv_outsw = sh7343se_outsw,
-        .mv_outsl = sh7343se_outsl,
-
+        .mv_nr_irqs = SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_NR,
         .mv_init_irq = init_7343se_IRQ,
 };
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 9123d9687bf7..527eb6b12610 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -8,8 +8,9 @@
  */
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <asm/machvec.h>
 #include <mach-se/mach/se.h>
+#include <mach-se/mach/mrshpc.h>
+#include <asm/machvec.h>
 #include <asm/io.h>
 #include <asm/smc37c93x.h>
 #include <asm/heartbeat.h>
@@ -175,6 +176,7 @@ static struct platform_device *se_devices[] __initdata = {
 
 static int __init se_devices_setup(void)
 {
+        mrshpc_setup_windows();
         return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
 }
 device_initcall(se_devices_setup);
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index d3fc80ff4d83..55af4c36b43a 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -12,8 +12,9 @@
  */
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <asm/machvec.h>
 #include <mach-se/mach/se7721.h>
+#include <mach-se/mach/mrshpc.h>
+#include <asm/machvec.h>
 #include <asm/io.h>
 #include <asm/heartbeat.h>
 
@@ -74,8 +75,8 @@ static struct platform_device *se7721_devices[] __initdata = {
 
 static int __init se7721_devices_setup(void)
 {
-        return platform_add_devices(se7721_devices,
-                ARRAY_SIZE(se7721_devices));
+        mrshpc_setup_windows();
+        return platform_add_devices(se7721_devices, ARRAY_SIZE(se7721_devices));
 }
 device_initcall(se7721_devices_setup);
 
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index fe6f96517e12..af84904ed86f 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -15,9 +15,10 @@
 #include <linux/ata_platform.h>
 #include <linux/input.h>
 #include <linux/smc91x.h>
+#include <mach-se/mach/se7722.h>
+#include <mach-se/mach/mrshpc.h>
 #include <asm/machvec.h>
 #include <asm/clock.h>
-#include <mach-se/mach/se7722.h>
 #include <asm/io.h>
 #include <asm/heartbeat.h>
 #include <asm/sh_keysc.h>
@@ -130,6 +131,7 @@ static struct resource sh_keysc_resources[] = {
 
 static struct platform_device sh_keysc_device = {
         .name           = "sh_keysc",
+        .id             = 0, /* "keysc0" clock */
         .num_resources  = ARRAY_SIZE(sh_keysc_resources),
         .resource       = sh_keysc_resources,
         .dev    = {
@@ -146,10 +148,8 @@ static struct platform_device *se7722_devices[] __initdata = {
 
 static int __init se7722_devices_setup(void)
 {
-        clk_always_enable("mstp214"); /* KEYSC */
-
-        return platform_add_devices(se7722_devices,
-                ARRAY_SIZE(se7722_devices));
+        mrshpc_setup_windows();
+        return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
 }
 device_initcall(se7722_devices_setup);
 
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index 5771219be3fd..74cfb4b8b03d 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -9,6 +9,7 @@
 #include <linux/irq.h>
 #include <linux/pci.h>
 #include <linux/platform_device.h>
+#include <linux/ata_platform.h>
 #include <asm/io.h>
 #include <asm/rtc.h>
 #include <mach-sh03/mach/io.h>
@@ -20,19 +21,6 @@ static void __init init_sh03_IRQ(void)
         plat_irq_setup_pins(IRQ_MODE_IRQ);
 }
 
-extern void *cf_io_base;
-
-static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size)
-{
-        if (PXSEG(port))
-                return (void __iomem *)port;
-        /* CompactFlash (IDE) */
-        if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6))
-                return (void __iomem *)((unsigned long)cf_io_base + port);
-
-        return (void __iomem *)(port + PCI_IO_BASE);
-}
-
 /* arch/sh/boards/sh03/rtc.c */
 void sh03_time_init(void);
 
@@ -41,6 +29,30 @@ static void __init sh03_setup(char **cmdline_p)
         board_time_init = sh03_time_init;
 }
 
+static struct resource cf_ide_resources[] = {
+        [0] = {
+                .start  = 0x1f0,
+                .end    = 0x1f0 + 8,
+                .flags  = IORESOURCE_IO,
+        },
+        [1] = {
+                .start  = 0x1f0 + 0x206,
+                .end    = 0x1f0 +8 + 0x206 + 8,
+                .flags  = IORESOURCE_IO,
+        },
+        [2] = {
+                .start  = IRL2_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cf_ide_device = {
+        .name           = "pata_platform",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(cf_ide_resources),
+        .resource       = cf_ide_resources,
+};
+
 static struct resource heartbeat_resources[] = {
         [0] = {
                 .start  = 0xa0800000,
@@ -58,10 +70,30 @@ static struct platform_device heartbeat_device = {
 
 static struct platform_device *sh03_devices[] __initdata = {
         &heartbeat_device,
+        &cf_ide_device,
 };
 
 static int __init sh03_devices_setup(void)
 {
+        pgprot_t prot;
+        unsigned long paddrbase;
+        void *cf_ide_base;
+
+        /* open I/O area window */
+        paddrbase = virt_to_phys((void *)PA_AREA5_IO);
+        prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
+        cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
+        if (!cf_ide_base) {
+                printk("allocate_cf_area : can't open CF I/O window!\n");
+                return -ENOMEM;
+        }
+
+        /* IDE cmd address : 0x1f0-0x1f7 and 0x3f6 */
+        cf_ide_resources[0].start += (unsigned long)cf_ide_base;
+        cf_ide_resources[0].end   += (unsigned long)cf_ide_base;
+        cf_ide_resources[1].start += (unsigned long)cf_ide_base;
+        cf_ide_resources[1].end   += (unsigned long)cf_ide_base;
+
         return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
 }
 __initcall(sh03_devices_setup);
@@ -70,6 +102,5 @@ static struct sh_machine_vector mv_sh03 __initmv = {
         .mv_name                = "Interface (CTP/PCI-SH03)",
         .mv_setup               = sh03_setup,
         .mv_nr_irqs             = 48,
-        .mv_ioport_map          = sh03_ioport_map,
         .mv_init_irq            = init_sh03_IRQ,
 };
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 538406872a89..986a0e71d220 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -12,8 +12,8 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#include <linux/io.h>
 
-#include <asm/io.h>
 #include <mach/systemh7751.h>
 #include <asm/smc37c93x.h>
 
@@ -24,35 +24,17 @@ static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004;
 static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
 
 /* forward declaration */
-static unsigned int startup_systemh_irq(unsigned int irq);
-static void shutdown_systemh_irq(unsigned int irq);
 static void enable_systemh_irq(unsigned int irq);
 static void disable_systemh_irq(unsigned int irq);
 static void mask_and_ack_systemh(unsigned int);
-static void end_systemh_irq(unsigned int irq);
 
-/* hw_interrupt_type */
-static struct hw_interrupt_type systemh_irq_type = {
-        .typename = " SystemH Register",
-        .startup = startup_systemh_irq,
-        .shutdown = shutdown_systemh_irq,
-        .enable = enable_systemh_irq,
-        .disable = disable_systemh_irq,
+static struct irq_chip systemh_irq_type = {
+        .name = " SystemH Register",
+        .unmask = enable_systemh_irq,
+        .mask = disable_systemh_irq,
         .ack = mask_and_ack_systemh,
-        .end = end_systemh_irq
 };
 
-static unsigned int startup_systemh_irq(unsigned int irq)
-{
-        enable_systemh_irq(irq);
-        return 0; /* never anything pending */
-}
-
-static void shutdown_systemh_irq(unsigned int irq)
-{
-        disable_systemh_irq(irq);
-}
-
 static void disable_systemh_irq(unsigned int irq)
 {
         if (systemh_irq_mask_register) {
@@ -86,16 +68,9 @@ static void mask_and_ack_systemh(unsigned int irq)
         disable_systemh_irq(irq);
 }
 
-static void end_systemh_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_systemh_irq(irq);
-}
-
 void make_systemh_irq(unsigned int irq)
 {
         disable_irq_nosync(irq);
-        irq_desc[irq].chip = &systemh_irq_type;
+        set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq);
         disable_systemh_irq(irq);
 }
-
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index f1a4a0763c59..27ceeb948bb1 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -10,99 +10,49 @@
 #include <linux/interrupt.h>
 #include <linux/init.h>
 #include <linux/irq.h>
-#include <asm/io.h>
+#include <linux/io.h>
 #include <asm/irq.h>
 #include <asm/hd64461.h>
 
 /* This belongs in cpu specific */
 #define INTC_ICR1 0xA4140010UL
 
-static void disable_hd64461_irq(unsigned int irq)
+static void hd64461_mask_irq(unsigned int irq)
 {
         unsigned short nimr;
         unsigned short mask = 1 << (irq - HD64461_IRQBASE);
 
-        nimr = inw(HD64461_NIMR);
+        nimr = __raw_readw(HD64461_NIMR);
         nimr |= mask;
-        outw(nimr, HD64461_NIMR);
+        __raw_writew(nimr, HD64461_NIMR);
 }
 
-static void enable_hd64461_irq(unsigned int irq)
+static void hd64461_unmask_irq(unsigned int irq)
 {
         unsigned short nimr;
         unsigned short mask = 1 << (irq - HD64461_IRQBASE);
 
-        nimr = inw(HD64461_NIMR);
+        nimr = __raw_readw(HD64461_NIMR);
         nimr &= ~mask;
-        outw(nimr, HD64461_NIMR);
+        __raw_writew(nimr, HD64461_NIMR);
 }
 
-static void mask_and_ack_hd64461(unsigned int irq)
+static void hd64461_mask_and_ack_irq(unsigned int irq)
 {
-        disable_hd64461_irq(irq);
+        hd64461_mask_irq(irq);
 #ifdef CONFIG_HD64461_ENABLER
         if (irq == HD64461_IRQBASE + 13)
-                outb(0x00, HD64461_PCC1CSCR);
+                __raw_writeb(0x00, HD64461_PCC1CSCR);
 #endif
 }
 
-static void end_hd64461_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_hd64461_irq(irq);
-}
-
-static unsigned int startup_hd64461_irq(unsigned int irq)
-{
-        enable_hd64461_irq(irq);
-        return 0;
-}
-
-static void shutdown_hd64461_irq(unsigned int irq)
-{
-        disable_hd64461_irq(irq);
-}
-
-static struct hw_interrupt_type hd64461_irq_type = {
-        .typename       = "HD64461-IRQ",
-        .startup        = startup_hd64461_irq,
-        .shutdown       = shutdown_hd64461_irq,
-        .enable         = enable_hd64461_irq,
-        .disable        = disable_hd64461_irq,
-        .ack            = mask_and_ack_hd64461,
-        .end            = end_hd64461_irq,
+static struct irq_chip hd64461_irq_chip = {
+        .name           = "HD64461-IRQ",
+        .mask           = hd64461_mask_irq,
+        .mask_ack       = hd64461_mask_and_ack_irq,
+        .unmask         = hd64461_unmask_irq,
 };
 
-static irqreturn_t hd64461_interrupt(int irq, void *dev_id)
-{
-        printk(KERN_INFO
-               "HD64461: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
-               inw(HD64461_NIRR), inw(HD64461_NIMR));
-
-        return IRQ_NONE;
-}
-
-static struct {
-        int (*func) (int, void *);
-        void *dev;
-} hd64461_demux[HD64461_IRQ_NUM];
-
-void hd64461_register_irq_demux(int irq,
-                                int (*demux) (int irq, void *dev), void *dev)
-{
-        hd64461_demux[irq - HD64461_IRQBASE].func = demux;
-        hd64461_demux[irq - HD64461_IRQBASE].dev = dev;
-}
-
-EXPORT_SYMBOL(hd64461_register_irq_demux);
-
-void hd64461_unregister_irq_demux(int irq)
-{
-        hd64461_demux[irq - HD64461_IRQBASE].func = 0;
-}
-
-EXPORT_SYMBOL(hd64461_unregister_irq_demux);
-
 int hd64461_irq_demux(int irq)
 {
         if (irq == CONFIG_HD64461_IRQ) {
@@ -115,25 +65,11 @@ int hd64461_irq_demux(int irq)
                 for (bit = 1, i = 0; i < 16; bit <<= 1, i++)
                         if (nirr & bit)
                                 break;
-                if (i == 16)
-                        irq = CONFIG_HD64461_IRQ;
-                else {
-                        irq = HD64461_IRQBASE + i;
-                        if (hd64461_demux[i].func != 0) {
-                                irq = hd64461_demux[i].func(irq, hd64461_demux[i].dev);
-                        }
-                }
+                irq = HD64461_IRQBASE + i;
         }
         return irq;
 }
 
-static struct irqaction irq0 = {
-        .handler = hd64461_interrupt,
-        .flags = IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
-        .name = "HD64461",
-};
-
 int __init setup_hd64461(void)
 {
         int i;
@@ -146,22 +82,21 @@ int __init setup_hd64461(void)
                CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
                HD64461_IRQBASE + 15);
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7709)  /* Should be at processor specific part.. */
-        outw(0x2240, INTC_ICR1);
+/* Should be at processor specific part.. */
+#if defined(CONFIG_CPU_SUBTYPE_SH7709)
+        __raw_writew(0x2240, INTC_ICR1);
 #endif
-        outw(0xffff, HD64461_NIMR);
+        __raw_writew(0xffff, HD64461_NIMR);
 
         /*  IRQ 80 -> 95 belongs to HD64461  */
-        for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
-                irq_desc[i].chip = &hd64461_irq_type;
-        }
-
-        setup_irq(CONFIG_HD64461_IRQ, &irq0);
+        for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++)
+                set_irq_chip_and_handler(i, &hd64461_irq_chip,
+                                         handle_level_irq);
 
 #ifdef CONFIG_HD64461_ENABLER
         printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
-        outb(0x4c, HD64461_PCC1CSCIER);
-        outb(0x00, HD64461_PCC1CSCR);
+        __raw_writeb(0x4c, HD64461_PCC1CSCIER);
+        __raw_writeb(0x00, HD64461_PCC1CSCR);
 #endif
 
         return 0;
diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig
new file mode 100644
index 000000000000..8f4329fbbd39
--- /dev/null
+++ b/arch/sh/configs/edosk7705_defconfig
@@ -0,0 +1,438 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.28-rc6
+# Wed Dec 17 13:53:02 2008
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EMBEDDED=y
+# CONFIG_UID16 is not set
+# CONFIG_SYSCTL_SYSCALL is not set
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PRINTK is not set
+# CONFIG_BUG is not set
+# CONFIG_ELF_CORE is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_BASE_FULL is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+CONFIG_SHMEM=y
+# CONFIG_AIO is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+# CONFIG_MODULES is not set
+# CONFIG_BLOCK is not set
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH3=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+CONFIG_CPU_SUBTYPE_SH7705=y
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x04000000
+CONFIG_29BIT=y
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+CONFIG_SH7705_CACHE_32KB=y
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_ADC=y
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+
+#
+# Board support
+#
+# CONFIG_SH_SOLUTION_ENGINE is not set
+CONFIG_SH_EDOSK7705=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=31250000
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_GUSA=y
+# CONFIG_GUSA_RB is not set
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_SH_SCI is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+CONFIG_STAGING_EXCLUDE_BUILD=y
+
+#
+# File systems
+#
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Pseudo filesystems
+#
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/rsk7201_defconfig b/arch/sh/configs/rsk7201_defconfig
new file mode 100644
index 000000000000..014c18cbf46a
--- /dev/null
+++ b/arch/sh/configs/rsk7201_defconfig
@@ -0,0 +1,703 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.28-rc6
+# Mon Dec  8 14:48:02 2008
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+# CONFIG_GENERIC_TIME is not set
+# CONFIG_GENERIC_CLOCKEVENTS is not set
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+CONFIG_IKCONFIG=y
+# CONFIG_IKCONFIG_PROC is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+CONFIG_USER_NS=y
+CONFIG_PID_NS=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+# CONFIG_AIO is not set
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLAB is not set
+# CONFIG_SLUB is not set
+CONFIG_SLOB=y
+CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_TINY_SHMEM=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH2=y
+CONFIG_CPU_SH2A=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+CONFIG_CPU_SUBTYPE_SH7201=y
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_PAGE_OFFSET=0x00000000
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x01000000
+CONFIG_29BIT=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_SH_FPU=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+CONFIG_SH_RSK=y
+CONFIG_SH_RSK7201=y
+# CONFIG_SH_RSK7203 is not set
+
+#
+# Timer and clock configuration
+#
+# CONFIG_SH_CMT is not set
+CONFIG_SH_MTU2=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=40000000
+CONFIG_SH_CLK_MD=0
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ignore_loglevel"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF_FDPIC=y
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_ZFLAT=y
+CONFIG_BINFMT_SHARED_FLAT=y
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x0
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=4
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=8
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_THERMAL=y
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SH=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+CONFIG_STAGING_EXCLUDE_BUILD=y
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/rsk7203_defconfig b/arch/sh/configs/rsk7203_defconfig
index 85b0ac4fc667..dcdef31cf19b 100644
--- a/arch/sh/configs/rsk7203_defconfig
+++ b/arch/sh/configs/rsk7203_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27
-# Tue Oct 21 12:58:47 2008
+# Linux kernel version: 2.6.28-rc6
+# Mon Dec  8 14:35:03 2008
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -16,6 +16,8 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_GPIO=y
 # CONFIG_GENERIC_TIME is not set
 # CONFIG_GENERIC_CLOCKEVENTS is not set
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_LOCKDEP_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -75,7 +77,6 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_PCI_QUIRKS=y
 # CONFIG_SLAB is not set
 # CONFIG_SLUB is not set
 CONFIG_SLOB=y
@@ -126,6 +127,7 @@ CONFIG_CLASSIC_RCU=y
 CONFIG_CPU_SH2=y
 CONFIG_CPU_SH2A=y
 # CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
 CONFIG_CPU_SUBTYPE_SH7203=y
 # CONFIG_CPU_SUBTYPE_SH7206 is not set
 # CONFIG_CPU_SUBTYPE_SH7263 is not set
@@ -211,6 +213,8 @@ CONFIG_CPU_HAS_FPU=y
 #
 # Board support
 #
+CONFIG_SH_RSK=y
+# CONFIG_SH_RSK7201 is not set
 CONFIG_SH_RSK7203=y
 
 #
@@ -296,6 +300,14 @@ CONFIG_BINFMT_ZFLAT=y
 CONFIG_BINFMT_SHARED_FLAT=y
 # CONFIG_HAVE_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_NET=y
 
 #
@@ -477,6 +489,7 @@ CONFIG_BLK_DEV=y
 CONFIG_MISC_DEVICES=y
 # CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -603,11 +616,11 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_HWMON is not set
 CONFIG_THERMAL=y
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -617,7 +630,11 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
-# CONFIG_MFD_WM8400 is not set
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
 
 #
 # Multimedia devices
@@ -702,19 +719,22 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
 CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
 
 #
 # USB Host Controller Drivers
 #
 # CONFIG_USB_C67X00_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
-# CONFIG_USB_ISP1760_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 CONFIG_USB_R8A66597_HCD=y
+# CONFIG_USB_HWA_HCD is not set
 
 #
 # USB Device Class drivers
@@ -725,11 +745,11 @@ CONFIG_USB_R8A66597_HCD=y
 # CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
 #
 
 #
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
 #
 # CONFIG_USB_LIBUSUAL is not set
 
@@ -770,7 +790,22 @@ CONFIG_USB_R8A66597_HCD=y
 # CONFIG_USB_GADGET is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_NEW_LEDS is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 # CONFIG_ACCESSIBILITY is not set
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
@@ -812,6 +847,7 @@ CONFIG_RTC_DRV_SH=y
 # CONFIG_DMADEVICES is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
+CONFIG_STAGING_EXCLUDE_BUILD=y
 
 #
 # File systems
@@ -950,9 +986,14 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_NOP_TRACER=y
-CONFIG_HAVE_FTRACE=y
-# CONFIG_FTRACE is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
diff --git a/arch/sh/configs/rts7751r2dplus_qemu_defconfig b/arch/sh/configs/rts7751r2dplus_qemu_defconfig
deleted file mode 100644
index ae8f63000fbf..000000000000
--- a/arch/sh/configs/rts7751r2dplus_qemu_defconfig
+++ /dev/null
@@ -1,949 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27
-# Wed Oct 22 18:51:20 2008
-#
-CONFIG_SUPERH=y
-CONFIG_SUPERH32=y
-CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
-CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_GPIO is not set
-CONFIG_GENERIC_TIME=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_SYS_SUPPORTS_PCI=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_ARCH_NO_VIRT_TO_BUS=y
-CONFIG_IO_TRAPPED=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# General setup
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-# CONFIG_RELAY is not set
-# CONFIG_NAMESPACES is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_UID16=y
-# CONFIG_SYSCTL_SYSCALL is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_COMPAT_BRK=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
-CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_AIO=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_PCI_QUIRKS=y
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
-# CONFIG_SLOB is not set
-CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
-CONFIG_OPROFILE=y
-CONFIG_HAVE_OPROFILE=y
-# CONFIG_KPROBES is not set
-CONFIG_HAVE_IOREMAP_PROT=y
-CONFIG_HAVE_KPROBES=y
-CONFIG_HAVE_KRETPROBES=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-CONFIG_MODULES=y
-# CONFIG_MODULE_FORCE_LOAD is not set
-# CONFIG_MODULE_UNLOAD is not set
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_BLK_DEV_INTEGRITY is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
-# CONFIG_FREEZER is not set
-
-#
-# System type
-#
-CONFIG_CPU_SH4=y
-# CONFIG_CPU_SUBTYPE_SH7619 is not set
-# CONFIG_CPU_SUBTYPE_SH7203 is not set
-# CONFIG_CPU_SUBTYPE_SH7206 is not set
-# CONFIG_CPU_SUBTYPE_SH7263 is not set
-# CONFIG_CPU_SUBTYPE_MXG is not set
-# CONFIG_CPU_SUBTYPE_SH7705 is not set
-# CONFIG_CPU_SUBTYPE_SH7706 is not set
-# CONFIG_CPU_SUBTYPE_SH7707 is not set
-# CONFIG_CPU_SUBTYPE_SH7708 is not set
-# CONFIG_CPU_SUBTYPE_SH7709 is not set
-# CONFIG_CPU_SUBTYPE_SH7710 is not set
-# CONFIG_CPU_SUBTYPE_SH7712 is not set
-# CONFIG_CPU_SUBTYPE_SH7720 is not set
-# CONFIG_CPU_SUBTYPE_SH7721 is not set
-# CONFIG_CPU_SUBTYPE_SH7750 is not set
-# CONFIG_CPU_SUBTYPE_SH7091 is not set
-# CONFIG_CPU_SUBTYPE_SH7750R is not set
-# CONFIG_CPU_SUBTYPE_SH7750S is not set
-# CONFIG_CPU_SUBTYPE_SH7751 is not set
-CONFIG_CPU_SUBTYPE_SH7751R=y
-# CONFIG_CPU_SUBTYPE_SH7760 is not set
-# CONFIG_CPU_SUBTYPE_SH4_202 is not set
-# CONFIG_CPU_SUBTYPE_SH7723 is not set
-# CONFIG_CPU_SUBTYPE_SH7763 is not set
-# CONFIG_CPU_SUBTYPE_SH7770 is not set
-# CONFIG_CPU_SUBTYPE_SH7780 is not set
-# CONFIG_CPU_SUBTYPE_SH7785 is not set
-# CONFIG_CPU_SUBTYPE_SHX3 is not set
-# CONFIG_CPU_SUBTYPE_SH7343 is not set
-# CONFIG_CPU_SUBTYPE_SH7722 is not set
-# CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
-
-#
-# Memory management options
-#
-CONFIG_QUICKLIST=y
-CONFIG_MMU=y
-CONFIG_PAGE_OFFSET=0x80000000
-CONFIG_MEMORY_START=0x0c000000
-CONFIG_MEMORY_SIZE=0x04000000
-CONFIG_29BIT=y
-CONFIG_VSYSCALL=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_ARCH_SPARSEMEM_ENABLE=y
-CONFIG_ARCH_SPARSEMEM_DEFAULT=y
-CONFIG_MAX_ACTIVE_REGIONS=1
-CONFIG_ARCH_POPULATES_NODE_MAP=y
-CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-CONFIG_SPARSEMEM_STATIC=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-# CONFIG_PHYS_ADDR_T_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=0
-CONFIG_NR_QUICK=2
-CONFIG_UNEVICTABLE_LRU=y
-
-#
-# Cache configuration
-#
-# CONFIG_SH_DIRECT_MAPPED is not set
-CONFIG_CACHE_WRITEBACK=y
-# CONFIG_CACHE_WRITETHROUGH is not set
-# CONFIG_CACHE_OFF is not set
-
-#
-# Processor features
-#
-CONFIG_CPU_LITTLE_ENDIAN=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_SH_FPU=y
-# CONFIG_SH_STORE_QUEUES is not set
-CONFIG_CPU_HAS_INTEVT=y
-CONFIG_CPU_HAS_SR_RB=y
-CONFIG_CPU_HAS_PTEA=y
-CONFIG_CPU_HAS_FPU=y
-
-#
-# Board support
-#
-# CONFIG_SH_7751_SYSTEMH is not set
-# CONFIG_SH_SECUREEDGE5410 is not set
-CONFIG_SH_RTS7751R2D=y
-# CONFIG_SH_LANDISK is not set
-# CONFIG_SH_TITAN is not set
-# CONFIG_SH_LBOX_RE2 is not set
-
-#
-# RTS7751R2D Board Revision
-#
-CONFIG_RTS7751R2D_PLUS=y
-# CONFIG_RTS7751R2D_1 is not set
-
-#
-# Timer and clock configuration
-#
-CONFIG_SH_TMU=y
-CONFIG_SH_TIMER_IRQ=16
-CONFIG_SH_PCLK_FREQ=60000000
-# CONFIG_NO_HZ is not set
-# CONFIG_HIGH_RES_TIMERS is not set
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-
-#
-# CPU Frequency scaling
-#
-# CONFIG_CPU_FREQ is not set
-
-#
-# DMA support
-#
-# CONFIG_SH_DMA is not set
-
-#
-# Companion Chips
-#
-
-#
-# Additional SuperH Device Drivers
-#
-CONFIG_HEARTBEAT=y
-# CONFIG_PUSH_SWITCH is not set
-
-#
-# Kernel features
-#
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_300 is not set
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-# CONFIG_SCHED_HRTICK is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CRASH_DUMP is not set
-CONFIG_SECCOMP=y
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-CONFIG_GUSA=y
-# CONFIG_GUSA_RB is not set
-
-#
-# Boot options
-#
-CONFIG_ZERO_PAGE_OFFSET=0x00010000
-CONFIG_BOOT_LINK_OFFSET=0x00800000
-# CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial"
-
-#
-# Bus options
-#
-# CONFIG_PCI is not set
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-# CONFIG_HAVE_AOUT is not set
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_NET is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
-# CONFIG_SYS_HYPERVISOR is not set
-# CONFIG_MTD is not set
-# CONFIG_PARPORT is not set
-CONFIG_BLK_DEV=y
-# CONFIG_BLK_DEV_COW_COMMON is not set
-# CONFIG_BLK_DEV_LOOP is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_XIP is not set
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
-# CONFIG_ENCLOSURE_SERVICES is not set
-CONFIG_HAVE_IDE=y
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-CONFIG_SCSI=y
-CONFIG_SCSI_DMA=y
-# CONFIG_SCSI_TGT is not set
-# CONFIG_SCSI_NETLINK is not set
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-# CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-# CONFIG_SCSI_SCAN_ASYNC is not set
-CONFIG_SCSI_WAIT_SCAN=m
-
-#
-# SCSI Transports
-#
-# CONFIG_SCSI_SPI_ATTRS is not set
-# CONFIG_SCSI_FC_ATTRS is not set
-# CONFIG_SCSI_SAS_LIBSAS is not set
-# CONFIG_SCSI_SRP_ATTRS is not set
-CONFIG_SCSI_LOWLEVEL=y
-# CONFIG_SCSI_DEBUG is not set
-# CONFIG_SCSI_DH is not set
-CONFIG_ATA=y
-# CONFIG_ATA_NONSTANDARD is not set
-CONFIG_SATA_PMP=y
-CONFIG_ATA_SFF=y
-# CONFIG_SATA_MV is not set
-# CONFIG_PATA_PLATFORM is not set
-# CONFIG_MD is not set
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
-# CONFIG_INPUT_POLLDEV is not set
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TABLET is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_CONSOLE_TRANSLATIONS=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVKMEM=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=1
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_IPMI_HANDLER is not set
-CONFIG_HW_RANDOM=y
-# CONFIG_R3964 is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_TCG_TPM is not set
-# CONFIG_I2C is not set
-CONFIG_SPI=y
-# CONFIG_SPI_DEBUG is not set
-CONFIG_SPI_MASTER=y
-
-#
-# SPI Master Controller Drivers
-#
-CONFIG_SPI_BITBANG=y
-# CONFIG_SPI_SH_SCI is not set
-
-#
-# SPI Protocol Masters
-#
-# CONFIG_SPI_AT25 is not set
-# CONFIG_SPI_SPIDEV is not set
-# CONFIG_SPI_TLE62X0 is not set
-# CONFIG_W1 is not set
-# CONFIG_POWER_SUPPLY is not set
-CONFIG_HWMON=y
-# CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_ADCXX is not set
-# CONFIG_SENSORS_F71805F is not set
-# CONFIG_SENSORS_F71882FG is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM70 is not set
-# CONFIG_SENSORS_MAX1111 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_PC87427 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_VT1211 is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
-# CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
-# CONFIG_WATCHDOG is not set
-
-#
-# Sonics Silicon Backplane
-#
-CONFIG_SSB_POSSIBLE=y
-# CONFIG_SSB is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MFD_CORE is not set
-CONFIG_MFD_SM501=y
-# CONFIG_HTC_PASIC3 is not set
-# CONFIG_MFD_TMIO is not set
-# CONFIG_MFD_WM8400 is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-CONFIG_DAB=y
-
-#
-# Graphics support
-#
-# CONFIG_VGASTATE is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=m
-CONFIG_FB=y
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB_DDC is not set
-# CONFIG_FB_BOOT_VESA_SUPPORT is not set
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-# CONFIG_FB_SYS_FILLRECT is not set
-# CONFIG_FB_SYS_COPYAREA is not set
-# CONFIG_FB_SYS_IMAGEBLIT is not set
-# CONFIG_FB_FOREIGN_ENDIAN is not set
-# CONFIG_FB_SYS_FOPS is not set
-# CONFIG_FB_SVGALIB is not set
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-# CONFIG_FB_MODE_HELPERS is not set
-# CONFIG_FB_TILEBLITTING is not set
-
-#
-# Frame buffer hardware drivers
-#
-# CONFIG_FB_S1D13XXX is not set
-CONFIG_FB_SH_MOBILE_LCDC=m
-CONFIG_FB_SM501=y
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_FB_METRONOME is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Display device support
-#
-# CONFIG_DISPLAY_SUPPORT is not set
-
-#
-# Console display driver support
-#
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
-# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-# CONFIG_FONTS is not set
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-# CONFIG_LOGO_SUPERH_MONO is not set
-# CONFIG_LOGO_SUPERH_VGA16 is not set
-CONFIG_LOGO_SUPERH_CLUT224=y
-CONFIG_SOUND=y
-CONFIG_SOUND_OSS_CORE=y
-CONFIG_SND=m
-# CONFIG_SND_SEQUENCER is not set
-# CONFIG_SND_MIXER_OSS is not set
-# CONFIG_SND_PCM_OSS is not set
-# CONFIG_SND_DYNAMIC_MINORS is not set
-CONFIG_SND_SUPPORT_OLD_API=y
-CONFIG_SND_VERBOSE_PROCFS=y
-# CONFIG_SND_VERBOSE_PRINTK is not set
-# CONFIG_SND_DEBUG is not set
-CONFIG_SND_DRIVERS=y
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-CONFIG_SND_SPI=y
-CONFIG_SND_SUPERH=y
-# CONFIG_SND_SOC is not set
-CONFIG_SOUND_PRIME=m
-CONFIG_HID_SUPPORT=y
-CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
-# CONFIG_HIDRAW is not set
-# CONFIG_HID_PID is not set
-
-#
-# Special HID drivers
-#
-CONFIG_HID_COMPAT=y
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_MMC is not set
-# CONFIG_MEMSTICK is not set
-# CONFIG_NEW_LEDS is not set
-# CONFIG_ACCESSIBILITY is not set
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-# CONFIG_RTC_DEBUG is not set
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-# CONFIG_RTC_DRV_TEST is not set
-
-#
-# SPI RTC drivers
-#
-# CONFIG_RTC_DRV_M41T94 is not set
-# CONFIG_RTC_DRV_DS1305 is not set
-# CONFIG_RTC_DRV_MAX6902 is not set
-CONFIG_RTC_DRV_R9701=y
-# CONFIG_RTC_DRV_RS5C348 is not set
-# CONFIG_RTC_DRV_DS3234 is not set
-
-#
-# Platform RTC drivers
-#
-# CONFIG_RTC_DRV_DS1286 is not set
-# CONFIG_RTC_DRV_DS1511 is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_M48T35 is not set
-# CONFIG_RTC_DRV_M48T59 is not set
-# CONFIG_RTC_DRV_BQ4802 is not set
-# CONFIG_RTC_DRV_V3020 is not set
-
-#
-# on-CPU RTC drivers
-#
-# CONFIG_RTC_DRV_SH is not set
-# CONFIG_DMADEVICES is not set
-# CONFIG_UIO is not set
-# CONFIG_STAGING is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_EXT4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
-# CONFIG_XFS_FS is not set
-CONFIG_DNOTIFY=y
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_PROC_PAGE_MONITOR=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
-# CONFIG_HUGETLBFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-CONFIG_MINIX_FS=y
-# CONFIG_OMFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-CONFIG_NLS_CODEPAGE_932=y
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_WARN_DEPRECATED=y
-CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_FRAME_WARN=1024
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_HEADERS_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
-CONFIG_DETECT_SOFTLOCKUP=y
-# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
-CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
-CONFIG_SCHED_DEBUG=y
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_TIMER_STATS is not set
-# CONFIG_DEBUG_OBJECTS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_LOCK_ALLOC is not set
-# CONFIG_PROVE_LOCKING is not set
-# CONFIG_LOCK_STAT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-# CONFIG_DEBUG_KOBJECT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_VM is not set
-# CONFIG_DEBUG_WRITECOUNT is not set
-# CONFIG_DEBUG_MEMORY_INIT is not set
-# CONFIG_DEBUG_LIST is not set
-# CONFIG_DEBUG_SG is not set
-# CONFIG_FRAME_POINTER is not set
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_BACKTRACE_SELF_TEST is not set
-# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
-# CONFIG_FAULT_INJECTION is not set
-# CONFIG_LATENCYTOP is not set
-CONFIG_NOP_TRACER=y
-CONFIG_HAVE_FTRACE=y
-# CONFIG_FTRACE is not set
-# CONFIG_IRQSOFF_TRACER is not set
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_STACK_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
-# CONFIG_SAMPLES is not set
-# CONFIG_SH_STANDARD_BIOS is not set
-CONFIG_EARLY_SCIF_CONSOLE=y
-CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
-CONFIG_EARLY_PRINTK=y
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
-# CONFIG_DEBUG_STACK_USAGE is not set
-# CONFIG_4KSTACKS is not set
-# CONFIG_IRQSTACKS is not set
-# CONFIG_SH_KGDB is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-# CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_CRYPTO=y
-
-#
-# Crypto core or helper
-#
-# CONFIG_CRYPTO_FIPS is not set
-# CONFIG_CRYPTO_MANAGER is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-# CONFIG_CRYPTO_AUTHENC is not set
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Authenticated Encryption with Associated Data
-#
-# CONFIG_CRYPTO_CCM is not set
-# CONFIG_CRYPTO_GCM is not set
-# CONFIG_CRYPTO_SEQIV is not set
-
-#
-# Block modes
-#
-# CONFIG_CRYPTO_CBC is not set
-# CONFIG_CRYPTO_CTR is not set
-# CONFIG_CRYPTO_CTS is not set
-# CONFIG_CRYPTO_ECB is not set
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_XTS is not set
-
-#
-# Hash modes
-#
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_XCBC is not set
-
-#
-# Digest
-#
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_RMD128 is not set
-# CONFIG_CRYPTO_RMD160 is not set
-# CONFIG_CRYPTO_RMD256 is not set
-# CONFIG_CRYPTO_RMD320 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_WP512 is not set
-
-#
-# Ciphers
-#
-# CONFIG_CRYPTO_AES is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_ARC4 is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_FCRYPT is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_SALSA20 is not set
-# CONFIG_CRYPTO_SEED is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-
-#
-# Compression
-#
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_LZO is not set
-
-#
-# Random Number Generation
-#
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_HW=y
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-CONFIG_CRC_T10DIF=y
-# CONFIG_CRC_ITU_T is not set
-CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig
index 075f42ed5b09..be246f381507 100644
--- a/arch/sh/configs/se7343_defconfig
+++ b/arch/sh/configs/se7343_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27
-# Wed Oct 22 19:00:21 2008
+# Linux kernel version: 2.6.28-rc6
+# Thu Dec  4 16:40:25 2008
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -74,7 +74,6 @@ CONFIG_EVENTFD=y
 # CONFIG_SHMEM is not set
 CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_PCI_QUIRKS=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -127,6 +126,7 @@ CONFIG_CPU_SH4=y
 CONFIG_CPU_SH4A=y
 CONFIG_CPU_SH4AL_DSP=y
 # CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
 # CONFIG_CPU_SUBTYPE_SH7203 is not set
 # CONFIG_CPU_SUBTYPE_SH7206 is not set
 # CONFIG_CPU_SUBTYPE_SH7263 is not set
@@ -227,7 +227,7 @@ CONFIG_SH_7343_SOLUTION_ENGINE=y
 #
 CONFIG_SH_TMU=y
 CONFIG_SH_TIMER_IRQ=16
-CONFIG_SH_PCLK_FREQ=27000000
+CONFIG_SH_PCLK_FREQ=33333333
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -274,7 +274,8 @@ CONFIG_GUSA=y
 #
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
-# CONFIG_CMDLINE_BOOL is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC0,115200"
 
 #
 # Bus options
@@ -463,6 +464,7 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
 # CONFIG_BLK_DEV_RAM is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
@@ -519,23 +521,10 @@ CONFIG_NETDEVICES=y
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 # CONFIG_VETH is not set
-# CONFIG_PHYLIB is not set
-CONFIG_NET_ETHERNET=y
+# CONFIG_NET_ETHERNET is not set
 CONFIG_MII=y
-# CONFIG_AX88796 is not set
-# CONFIG_STNIC is not set
-CONFIG_SMC91X=y
-# CONFIG_SMC911X is not set
-# CONFIG_IBM_NEW_EMAC_ZMII is not set
-# CONFIG_IBM_NEW_EMAC_RGMII is not set
-# CONFIG_IBM_NEW_EMAC_TAH is not set
-# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
-# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
-# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
-# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
-# CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -543,6 +532,26 @@ CONFIG_NETDEV_10000=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 # CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=y
+# CONFIG_USB_NET_AX8817X is not set
+CONFIG_USB_NET_CDCETHER=y
+CONFIG_USB_NET_DM9601=y
+# CONFIG_USB_NET_SMSC95XX is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_MCS7830 is not set
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -597,13 +606,17 @@ CONFIG_DEVKMEM=y
 #
 # Serial drivers
 #
-# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
 
 #
 # Non-8250 serial port support
 #
 CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=2
+CONFIG_SERIAL_SH_SCI_NR_UARTS=4
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
@@ -615,7 +628,51 @@ CONFIG_HW_RANDOM=y
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
@@ -623,11 +680,11 @@ CONFIG_HW_RANDOM=y
 # CONFIG_THERMAL is not set
 # CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -637,7 +694,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_REGULATOR is not set
 
 #
 # Multimedia devices
@@ -657,6 +717,16 @@ CONFIG_VIDEO_MEDIA=y
 # Multimedia drivers
 #
 # CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
 CONFIG_VIDEO_V4L2=y
 CONFIG_VIDEO_V4L1=y
 CONFIG_VIDEO_CAPTURE_DRIVERS=y
@@ -665,8 +735,57 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y
 CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
 # CONFIG_VIDEO_VIVI is not set
 # CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
 # CONFIG_SOC_CAMERA is not set
+CONFIG_V4L_USB_DRIVERS=y
+# CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_USB_VICAM is not set
+# CONFIG_USB_IBMCAM is not set
+# CONFIG_USB_KONICAWC is not set
+# CONFIG_USB_QUICKCAM_MESSENGER is not set
+# CONFIG_USB_ET61X251 is not set
+# CONFIG_VIDEO_OVCAMCHIP is not set
+# CONFIG_USB_OV511 is not set
+# CONFIG_USB_SE401 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_STV680 is not set
+# CONFIG_USB_ZC0301 is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
 CONFIG_RADIO_ADAPTERS=y
+# CONFIG_USB_DSBR is not set
+# CONFIG_USB_SI470X is not set
+# CONFIG_USB_MR800 is not set
 # CONFIG_DAB is not set
 
 #
@@ -700,6 +819,7 @@ CONFIG_FB_CFB_IMAGEBLIT=m
 CONFIG_FB_SH_MOBILE_LCDC=m
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
@@ -737,27 +857,147 @@ CONFIG_SND_DRIVERS=y
 # CONFIG_SND_SERIAL_U16550 is not set
 # CONFIG_SND_MPU401 is not set
 CONFIG_SND_SUPERH=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
 # CONFIG_SND_SOC is not set
 # CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
 # CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
 # CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
 
 #
 # Special HID drivers
 #
 CONFIG_HID_COMPAT=y
-# CONFIG_USB_SUPPORT is not set
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_BRIGHT=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DELL=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_ISP116X_HCD=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
-# CONFIG_UIO is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
 # CONFIG_STAGING is not set
+CONFIG_STAGING_EXCLUDE_BUILD=y
 
 #
 # File systems
@@ -889,8 +1129,13 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
-CONFIG_NOP_TRACER=y
-CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
 # CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
 # CONFIG_SH_STANDARD_BIOS is not set
diff --git a/arch/sh/drivers/dma/Makefile b/arch/sh/drivers/dma/Makefile
index 1ac812d24488..ab956adacb47 100644
--- a/arch/sh/drivers/dma/Makefile
+++ b/arch/sh/drivers/dma/Makefile
@@ -3,7 +3,6 @@
 #
 
 obj-$(CONFIG_SH_DMA_API)        += dma-api.o dma-sysfs.o
-obj-$(CONFIG_ISA_DMA_API)       += dma-isa.o
 obj-$(CONFIG_SH_DMA)            += dma-sh.o
 obj-$(CONFIG_SH_DREAMCAST)      += dma-pvr2.o dma-g2.o
 obj-$(CONFIG_SH_DMABRG)         += dmabrg.o
diff --git a/arch/sh/drivers/dma/dma-isa.c b/arch/sh/drivers/dma/dma-isa.c
deleted file mode 100644
index 5fb044b791c3..000000000000
--- a/arch/sh/drivers/dma/dma-isa.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * arch/sh/drivers/dma/dma-isa.c
- *
- * Generic ISA DMA wrapper for SH DMA API
- *
- * Copyright (C) 2003, 2004  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <asm/dma.h>
-
-/*
- * This implements a small wrapper set to make code using the old ISA DMA API
- * work with the SH DMA API. Since most of the work in the new API happens
- * at ops->xfer() time, we simply use the various set_dma_xxx() routines to
- * fill in per-channel info, and then hand hand this off to ops->xfer() at
- * enable_dma() time.
- *
- * For channels that are doing on-demand data transfer via cascading, the
- * channel itself will still need to be configured through the new API. As
- * such, this code is meant for only the simplest of tasks (and shouldn't be
- * used in any new drivers at all).
- *
- * NOTE: ops->xfer() is the preferred way of doing things. However, there
- * are some users of the ISA DMA API that exist in common code that we
- * don't necessarily want to go out of our way to break, so we still
- * allow for some compatibility at that level. Any new code is strongly
- * advised to run far away from the ISA DMA API and use the SH DMA API
- * directly.
- */
-unsigned long claim_dma_lock(void)
-{
-        unsigned long flags;
-
-        spin_lock_irqsave(&dma_spin_lock, flags);
-
-        return flags;
-}
-EXPORT_SYMBOL(claim_dma_lock);
-
-void release_dma_lock(unsigned long flags)
-{
-        spin_unlock_irqrestore(&dma_spin_lock, flags);
-}
-EXPORT_SYMBOL(release_dma_lock);
-
-void disable_dma(unsigned int chan)
-{
-        /* Nothing */
-}
-EXPORT_SYMBOL(disable_dma);
-
-void enable_dma(unsigned int chan)
-{
-        struct dma_info *info = get_dma_info(chan);
-        struct dma_channel *channel = &info->channels[chan];
-
-        info->ops->xfer(channel);
-}
-EXPORT_SYMBOL(enable_dma);
-
-void clear_dma_ff(unsigned int chan)
-{
-        /* Nothing */
-}
-EXPORT_SYMBOL(clear_dma_ff);
-
-void set_dma_mode(unsigned int chan, char mode)
-{
-        struct dma_info *info = get_dma_info(chan);
-        struct dma_channel *channel = &info->channels[chan];
-
-        channel->mode = mode;
-}
-EXPORT_SYMBOL(set_dma_mode);
-
-void set_dma_addr(unsigned int chan, unsigned int addr)
-{
-        struct dma_info *info = get_dma_info(chan);
-        struct dma_channel *channel = &info->channels[chan];
-
-        /*
-         * Single address mode is the only thing supported through
-         * this interface.
-         */
-        if ((channel->mode & DMA_MODE_MASK) == DMA_MODE_READ) {
-                channel->sar = addr;
-        } else {
-                channel->dar = addr;
-        }
-}
-EXPORT_SYMBOL(set_dma_addr);
-
-void set_dma_count(unsigned int chan, unsigned int count)
-{
-        struct dma_info *info = get_dma_info(chan);
-        struct dma_channel *channel = &info->channels[chan];
-
-        channel->count = count;
-}
-EXPORT_SYMBOL(set_dma_count);
-
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index b2ffe649c7c0..50887a592dd0 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -205,7 +205,8 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan)
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
     defined(CONFIG_CPU_SUBTYPE_SH7721) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7780)
+    defined(CONFIG_CPU_SUBTYPE_SH7780) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
 #define dmaor_read_reg()        ctrl_inw(DMAOR)
 #define dmaor_write_reg(data)   ctrl_outw(data, DMAOR)
 #else
diff --git a/arch/sh/drivers/dma/dma-sh.h b/arch/sh/drivers/dma/dma-sh.h
index b05af34fc15d..05fecd5428e4 100644
--- a/arch/sh/drivers/dma/dma-sh.h
+++ b/arch/sh/drivers/dma/dma-sh.h
@@ -29,6 +29,7 @@
 #define RS_IN   0x00000200
 #define RS_OUT  0x00000300
 #define TS_BLK  0x00000040
+#define TM_BUR  0x00000020
 #define CHCR_DE 0x00000001
 #define CHCR_TE 0x00000002
 #define CHCR_IE 0x00000004
diff --git a/arch/sh/drivers/pci/ops-sh03.c b/arch/sh/drivers/pci/ops-sh03.c
index ebb58e605d9d..e1703ff5a4d2 100644
--- a/arch/sh/drivers/pci/ops-sh03.c
+++ b/arch/sh/drivers/pci/ops-sh03.c
@@ -18,7 +18,8 @@
  */
 int __init pcibios_init_platform(void)
 {
-   return 1;
+        __set_io_port_base(SH7751_PCI_IO_BASE);
+        return 1;
 }
 
 static struct resource sh7751_io_resource = {
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index b2a2bfa3c1bd..078dc44d6b08 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -123,16 +123,14 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
          * Window0 = map->window0.size @ non-cached area base = SDRAM
          * Window1 = map->window1.size @ cached area base = SDRAM
          */
-        word = ((map->window0.size - 1) & 0x1ff00001) | 0x01;
-        pci_write_reg(0x07f00001, SH4_PCILSR0);
-        word = ((map->window1.size - 1) & 0x1ff00001) | 0x01;
+        word = (CONFIG_MEMORY_SIZE - 0x00100000) | 0x00000001;
+        pci_write_reg(word, SH4_PCILSR0);
         pci_write_reg(0x00000001, SH4_PCILSR1);
         /* Set the values on window 0 PCI config registers */
-        word = P2SEGADDR(map->window0.base);
-        pci_write_reg(0xa8000000, SH4_PCILAR0);
-        pci_write_reg(0x08000000, SH7780_PCIMBAR0);
+        word = (CONFIG_MEMORY_SIZE > 0x08000000) ? 0x10000000 : 0x08000000;
+        pci_write_reg(word | 0xa0000000, SH4_PCILAR0);
+        pci_write_reg(word, SH7780_PCIMBAR0);
         /* Set the values on window 1 PCI config registers */
-        word = P2SEGADDR(map->window1.base);
         pci_write_reg(0x00000000, SH4_PCILAR1);
         pci_write_reg(0x00000000, SH7780_PCIMBAR1);
 
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 2702d81bfc0d..36736c7e93db 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -49,5 +49,16 @@
 /* Check if an address can be reached in 29 bits */
 #define IS_29BIT(a)     (((unsigned long)(a)) < 0x20000000)
 
+#ifdef CONFIG_SH_STORE_QUEUES
+/*
+ * This is a special case for the SH-4 store queues, as pages for this
+ * space still need to be faulted in before it's possible to flush the
+ * store queue cache for writeout to the remapped region.
+ */
+#define P3_ADDR_MAX             (P4SEG_STORE_QUE + 0x04000000)
+#else
+#define P3_ADDR_MAX             P4SEG
+#endif
+
 #endif /* __KERNEL__ */
 #endif /* __ASM_SH_ADDRSPACE_H */
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index c043ef003028..6327ffbb1992 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -7,16 +7,15 @@
  *
  */
 
-typedef struct { volatile int counter; } atomic_t;
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <asm/system.h>
 
 #define ATOMIC_INIT(i)  ( (atomic_t) { (i) } )
 
 #define atomic_read(v)          ((v)->counter)
 #define atomic_set(v,i)         ((v)->counter = (i))
 
-#include <linux/compiler.h>
-#include <asm/system.h>
-
 #if defined(CONFIG_GUSA_RB)
 #include <asm/atomic-grb.h>
 #elif defined(CONFIG_CPU_SH4A)
diff --git a/arch/sh/include/asm/bitops-grb.h b/arch/sh/include/asm/bitops-grb.h
index a5907b94395b..e73af33acbf4 100644
--- a/arch/sh/include/asm/bitops-grb.h
+++ b/arch/sh/include/asm/bitops-grb.h
@@ -166,4 +166,7 @@ static inline int test_and_change_bit(int nr, volatile void * addr)
 
         return retval;
 }
+
+#include <asm-generic/bitops/non-atomic.h>
+
 #endif /* __ASM_SH_BITOPS_GRB_H */
diff --git a/arch/sh/include/asm/bitops-irq.h b/arch/sh/include/asm/bitops-irq.h
deleted file mode 100644
index 653a12750584..000000000000
--- a/arch/sh/include/asm/bitops-irq.h
+++ /dev/null
@@ -1,91 +0,0 @@
-#ifndef __ASM_SH_BITOPS_IRQ_H
-#define __ASM_SH_BITOPS_IRQ_H
-
-static inline void set_bit(int nr, volatile void *addr)
-{
-        int     mask;
-        volatile unsigned int *a = addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save(flags);
-        *a |= mask;
-        local_irq_restore(flags);
-}
-
-static inline void clear_bit(int nr, volatile void *addr)
-{
-        int     mask;
-        volatile unsigned int *a = addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save(flags);
-        *a &= ~mask;
-        local_irq_restore(flags);
-}
-
-static inline void change_bit(int nr, volatile void *addr)
-{
-        int     mask;
-        volatile unsigned int *a = addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save(flags);
-        *a ^= mask;
-        local_irq_restore(flags);
-}
-
-static inline int test_and_set_bit(int nr, volatile void *addr)
-{
-        int     mask, retval;
-        volatile unsigned int *a = addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save(flags);
-        retval = (mask & *a) != 0;
-        *a |= mask;
-        local_irq_restore(flags);
-
-        return retval;
-}
-
-static inline int test_and_clear_bit(int nr, volatile void *addr)
-{
-        int     mask, retval;
-        volatile unsigned int *a = addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save(flags);
-        retval = (mask & *a) != 0;
-        *a &= ~mask;
-        local_irq_restore(flags);
-
-        return retval;
-}
-
-static inline int test_and_change_bit(int nr, volatile void *addr)
-{
-        int     mask, retval;
-        volatile unsigned int *a = addr;
-        unsigned long flags;
-
-        a += nr >> 5;
-        mask = 1 << (nr & 0x1f);
-        local_irq_save(flags);
-        retval = (mask & *a) != 0;
-        *a ^= mask;
-        local_irq_restore(flags);
-
-        return retval;
-}
-
-#endif /* __ASM_SH_BITOPS_IRQ_H */
diff --git a/arch/sh/include/asm/bitops-llsc.h b/arch/sh/include/asm/bitops-llsc.h
index 43b8e1a8239e..1d2fc0b010ad 100644
--- a/arch/sh/include/asm/bitops-llsc.h
+++ b/arch/sh/include/asm/bitops-llsc.h
@@ -141,4 +141,6 @@ static inline int test_and_change_bit(int nr, volatile void * addr)
         return retval != 0;
 }
 
+#include <asm-generic/bitops/non-atomic.h>
+
 #endif /* __ASM_SH_BITOPS_LLSC_H */
diff --git a/arch/sh/include/asm/bitops-op32.h b/arch/sh/include/asm/bitops-op32.h
new file mode 100644
index 000000000000..f0ae7e9218e0
--- /dev/null
+++ b/arch/sh/include/asm/bitops-op32.h
@@ -0,0 +1,142 @@
+#ifndef __ASM_SH_BITOPS_OP32_H
+#define __ASM_SH_BITOPS_OP32_H
+
+/*
+ * The bit modifying instructions on SH-2A are only capable of working
+ * with a 3-bit immediate, which signifies the shift position for the bit
+ * being worked on.
+ */
+#if defined(__BIG_ENDIAN)
+#define BITOP_LE_SWIZZLE        ((BITS_PER_LONG-1) & ~0x7)
+#define BYTE_NUMBER(nr)         ((nr ^ BITOP_LE_SWIZZLE) / BITS_PER_BYTE)
+#define BYTE_OFFSET(nr)         ((nr ^ BITOP_LE_SWIZZLE) % BITS_PER_BYTE)
+#else
+#define BYTE_NUMBER(nr)         ((nr) / BITS_PER_BYTE)
+#define BYTE_OFFSET(nr)         ((nr) % BITS_PER_BYTE)
+#endif
+
+#define IS_IMMEDIATE(nr)        (__builtin_constant_p(nr))
+
+static inline void __set_bit(int nr, volatile unsigned long *addr)
+{
+        if (IS_IMMEDIATE(nr)) {
+                __asm__ __volatile__ (
+                        "bset.b %1, @(%O2,%0)           ! __set_bit\n\t"
+                        : "+r" (addr)
+                        : "i" (BYTE_OFFSET(nr)), "i" (BYTE_NUMBER(nr))
+                        : "t", "memory"
+                );
+        } else {
+                unsigned long mask = BIT_MASK(nr);
+                unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+                *p |= mask;
+        }
+}
+
+static inline void __clear_bit(int nr, volatile unsigned long *addr)
+{
+        if (IS_IMMEDIATE(nr)) {
+                __asm__ __volatile__ (
+                        "bclr.b %1, @(%O2,%0)           ! __clear_bit\n\t"
+                        : "+r" (addr)
+                        : "i" (BYTE_OFFSET(nr)),
+                          "i" (BYTE_NUMBER(nr))
+                        : "t", "memory"
+                );
+        } else {
+                unsigned long mask = BIT_MASK(nr);
+                unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+                *p &= ~mask;
+        }
+}
+
+/**
+ * __change_bit - Toggle a bit in memory
+ * @nr: the bit to change
+ * @addr: the address to start counting from
+ *
+ * Unlike change_bit(), this function is non-atomic and may be reordered.
+ * If it's called on the same region of memory simultaneously, the effect
+ * may be that only one operation succeeds.
+ */
+static inline void __change_bit(int nr, volatile unsigned long *addr)
+{
+        if (IS_IMMEDIATE(nr)) {
+                __asm__ __volatile__ (
+                        "bxor.b %1, @(%O2,%0)           ! __change_bit\n\t"
+                        : "+r" (addr)
+                        : "i" (BYTE_OFFSET(nr)),
+                          "i" (BYTE_NUMBER(nr))
+                        : "t", "memory"
+                );
+        } else {
+                unsigned long mask = BIT_MASK(nr);
+                unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+                *p ^= mask;
+        }
+}
+
+/**
+ * __test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
+ */
+static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
+{
+        unsigned long mask = BIT_MASK(nr);
+        unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+        unsigned long old = *p;
+
+        *p = old | mask;
+        return (old & mask) != 0;
+}
+
+/**
+ * __test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to clear
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
+ */
+static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
+{
+        unsigned long mask = BIT_MASK(nr);
+        unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+        unsigned long old = *p;
+
+        *p = old & ~mask;
+        return (old & mask) != 0;
+}
+
+/* WARNING: non atomic and it can be reordered! */
+static inline int __test_and_change_bit(int nr,
+                                            volatile unsigned long *addr)
+{
+        unsigned long mask = BIT_MASK(nr);
+        unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+        unsigned long old = *p;
+
+        *p = old ^ mask;
+        return (old & mask) != 0;
+}
+
+/**
+ * test_bit - Determine whether a bit is set
+ * @nr: bit number to test
+ * @addr: Address to start counting from
+ */
+static inline int test_bit(int nr, const volatile unsigned long *addr)
+{
+        return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
+}
+
+#endif /* __ASM_SH_BITOPS_OP32_H */
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h
index 367930d8e5ae..ebe595b7ab1f 100644
--- a/arch/sh/include/asm/bitops.h
+++ b/arch/sh/include/asm/bitops.h
@@ -13,21 +13,22 @@
 
 #ifdef CONFIG_GUSA_RB
 #include <asm/bitops-grb.h>
+#elif defined(CONFIG_CPU_SH2A)
+#include <asm-generic/bitops/atomic.h>
+#include <asm/bitops-op32.h>
 #elif defined(CONFIG_CPU_SH4A)
 #include <asm/bitops-llsc.h>
 #else
-#include <asm/bitops-irq.h>
+#include <asm-generic/bitops/atomic.h>
+#include <asm-generic/bitops/non-atomic.h>
 #endif
 
-
 /*
  * clear_bit() doesn't provide any barrier for the compiler.
  */
 #define smp_mb__before_clear_bit()      barrier()
 #define smp_mb__after_clear_bit()       barrier()
 
-#include <asm-generic/bitops/non-atomic.h>
-
 #ifdef CONFIG_SUPERH32
 static inline unsigned long ffz(unsigned long word)
 {
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h
index 121b2ecddfc3..4924ff6f5439 100644
--- a/arch/sh/include/asm/bugs.h
+++ b/arch/sh/include/asm/bugs.h
@@ -25,7 +25,7 @@ static void __init check_bugs(void)
         case CPU_SH7619:
                 *p++ = '2';
                 break;
-        case CPU_SH7203 ... CPU_MXG:
+        case CPU_SH7201 ... CPU_MXG:
                 *p++ = '2';
                 *p++ = 'a';
                 break;
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index 9eb9036a1bdc..ccb1d93bb043 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -108,13 +108,11 @@ typedef struct user_fpu_struct elf_fpregset_t;
 #define elf_check_fdpic(x)              ((x)->e_flags & EF_SH_FDPIC)
 #define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC)
 
-#ifdef CONFIG_SUPERH32
 /*
  * Enable dump using regset.
  * This covers all of general/DSP/FPU regs.
  */
 #define CORE_DUMP_USE_REGSET
-#endif
 
 #define USE_ELF_CORE_DUMP
 #define ELF_FDPIC_CORE_EFLAGS   EF_SH_FDPIC
@@ -204,7 +202,7 @@ do {									\
 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES
 struct linux_binprm;
 extern int arch_setup_additional_pages(struct linux_binprm *bprm,
-                                       int executable_stack);
+                                       int uses_interp);
 
 extern unsigned int vdso_enabled;
 extern void __kernel_vsyscall;
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h
index 3aed362c9463..8fea7d8c8258 100644
--- a/arch/sh/include/asm/ftrace.h
+++ b/arch/sh/include/asm/ftrace.h
@@ -1,8 +1,34 @@
 #ifndef __ASM_SH_FTRACE_H
 #define __ASM_SH_FTRACE_H
 
+#ifdef CONFIG_FUNCTION_TRACER
+
+#define MCOUNT_INSN_SIZE        4 /* sizeof mcount call */
+
 #ifndef __ASSEMBLY__
 extern void mcount(void);
-#endif
+
+#define MCOUNT_ADDR             ((long)(mcount))
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+#define CALLER_ADDR             ((long)(ftrace_caller))
+#define STUB_ADDR               ((long)(ftrace_stub))
+
+#define MCOUNT_INSN_OFFSET      ((STUB_ADDR - CALLER_ADDR) >> 1)
+
+struct dyn_arch_ftrace {
+        /* No extra data needed on sh */
+};
+
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+static inline unsigned long ftrace_call_adjust(unsigned long addr)
+{
+        /* 'addr' is the memory table address. */
+        return addr;
+}
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_FUNCTION_TRACER */
 
 #endif /* __ASM_SH_FTRACE_H */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 65eaae34e753..61f6dae40534 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -260,6 +260,10 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
 
                 return (void __iomem *)P2SEGADDR(offset);
         }
+
+        /* P4 above the store queues are always mapped. */
+        if (unlikely(offset >= P3_ADDR_MAX))
+                return (void __iomem *)P4SEGADDR(offset);
 #endif
 
         return __ioremap(offset, size, flags);
diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h
index 24e42078f36f..72704ed725e5 100644
--- a/arch/sh/include/asm/kgdb.h
+++ b/arch/sh/include/asm/kgdb.h
@@ -1,21 +1,7 @@
-/*
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * Based on original code by Glenn Engel, Jim Kingdon,
- * David Grothe <dave@gcom.com>, Tigran Aivazian, <tigran@sco.com> and
- * Amit S. Kale <akale@veritas.com>
- * 
- * Super-H port based on sh-stub.c (Ben Lee and Steve Chamberlain) by
- * Henry Bell <henry.bell@st.com>
- * 
- * Header file for low-level support for remote debug using GDB. 
- *
- */
-
-#ifndef __KGDB_H
-#define __KGDB_H
+#ifndef __ASM_SH_KGDB_H
+#define __ASM_SH_KGDB_H
 
+#include <asm/cacheflush.h>
 #include <asm/ptrace.h>
 
 /* Same as pt_regs but has vbr in place of syscall_nr */
@@ -30,40 +16,26 @@ struct kgdb_regs {
         unsigned long vbr;
 };
 
-/* State info */
-extern char kgdb_in_gdb_mode;
-extern int kgdb_nofault;        /* Ignore bus errors (in gdb mem access) */
-extern char in_nmi;             /* Debounce flag to prevent NMI reentry*/
+enum regnames {
+        GDB_R0, GDB_R1, GDB_R2, GDB_R3, GDB_R4, GDB_R5, GDB_R6, GDB_R7,
+        GDB_R8, GDB_R9, GDB_R10, GDB_R11, GDB_R12, GDB_R13, GDB_R14, GDB_R15,
 
-/* SCI */
-extern int kgdb_portnum;
-extern int kgdb_baud;
-extern char kgdb_parity;
-extern char kgdb_bits;
+        GDB_PC, GDB_PR, GDB_SR, GDB_GBR, GDB_MACH, GDB_MACL, GDB_VBR,
+};
 
-/* Init and interface stuff */
-extern int kgdb_init(void);
-extern int (*kgdb_getchar)(void);
-extern void (*kgdb_putchar)(int);
+#define NUMREGBYTES    ((GDB_VBR + 1) * 4)
 
-/* Trap functions */
-typedef void (kgdb_debug_hook_t)(struct pt_regs *regs);
-typedef void (kgdb_bus_error_hook_t)(void);
-extern kgdb_debug_hook_t  *kgdb_debug_hook;
-extern kgdb_bus_error_hook_t *kgdb_bus_err_hook;
+static inline void arch_kgdb_breakpoint(void)
+{
+        __asm__ __volatile__ ("trapa #0x3c\n");
+}
 
-/* Console */
-struct console;
-void kgdb_console_write(struct console *co, const char *s, unsigned count);
-extern int kgdb_console_setup(struct console *, char *);
+/* State info */
+extern char in_nmi;             /* Debounce flag to prevent NMI reentry*/
 
-/* Prototypes for jmp fns */
-#define _JBLEN 9
-typedef        int jmp_buf[_JBLEN];
-extern void    longjmp(jmp_buf __jmpb, int __retval);
-extern int     setjmp(jmp_buf __jmpb);
+#define BUFMAX                 2048
 
-/* Forced breakpoint */
-#define breakpoint()    __asm__ __volatile__("trapa   #0x3c")
+#define CACHE_FLUSH_IS_SAFE     1
+#define BREAK_INSTR_SIZE        2
 
-#endif
+#endif /* __ASM_SH_KGDB_H */
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index f1bae02ef7b6..64b1c16a0f03 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -14,8 +14,6 @@
 #include <linux/time.h>
 #include <asm/machtypes.h>
 
-struct device;
-
 struct sh_machine_vector {
         void (*mv_setup)(char **cmdline_p);
         const char *mv_name;
@@ -45,9 +43,6 @@ struct sh_machine_vector {
         int (*mv_irq_demux)(int irq);
 
         void (*mv_init_irq)(void);
-        void (*mv_init_pci)(void);
-
-        void (*mv_heartbeat)(void);
 
         void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
         void (*mv_ioport_unmap)(void __iomem *);
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 04c0c9733ad6..5d9157bd474d 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -22,7 +22,7 @@
 #define MMU_CONTEXT_ASID_MASK           0x000000ff
 #define MMU_CONTEXT_VERSION_MASK        0xffffff00
 #define MMU_CONTEXT_FIRST_VERSION       0x00000100
-#define NO_CONTEXT                      0
+#define NO_CONTEXT                      0UL
 
 /* ASID is 8-bit value, so it can't be 0x100 */
 #define MMU_NO_ASID                     0x100
@@ -130,7 +130,7 @@ static inline void switch_mm(struct mm_struct *prev,
 #define destroy_context(mm)             do { } while (0)
 #define set_asid(asid)                  do { } while (0)
 #define get_asid()                      (0)
-#define cpu_asid(cpu, mm)               ({ (void)cpu; 0; })
+#define cpu_asid(cpu, mm)               ({ (void)cpu; NO_CONTEXT; })
 #define switch_and_save_asid(asid)      (0)
 #define set_TTB(pgd)                    do { } while (0)
 #define get_TTB()                       (0)
diff --git a/arch/sh/include/asm/mutex-llsc.h b/arch/sh/include/asm/mutex-llsc.h
new file mode 100644
index 000000000000..ee839ee58ac8
--- /dev/null
+++ b/arch/sh/include/asm/mutex-llsc.h
@@ -0,0 +1,112 @@
+/*
+ * arch/sh/include/asm/mutex-llsc.h
+ *
+ * SH-4A optimized mutex locking primitives
+ *
+ * Please look into asm-generic/mutex-xchg.h for a formal definition.
+ */
+#ifndef __ASM_SH_MUTEX_LLSC_H
+#define __ASM_SH_MUTEX_LLSC_H
+
+/*
+ * Attempting to lock a mutex on SH4A is done like in ARMv6+ architecure.
+ * with a bastardized atomic decrement (it is not a reliable atomic decrement
+ * but it satisfies the defined semantics for our purpose, while being
+ * smaller and faster than a real atomic decrement or atomic swap.
+ * The idea is to attempt  decrementing the lock value only once. If once
+ * decremented it isn't zero, or if its store-back fails due to a dispute
+ * on the exclusive store, we simply bail out immediately through the slow
+ * path where the lock will be reattempted until it succeeds.
+ */
+static inline void
+__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
+{
+        int __ex_flag, __res;
+
+        __asm__ __volatile__ (
+                "movli.l        @%2, %0 \n"
+                "add            #-1, %0 \n"
+                "movco.l        %0, @%2 \n"
+                "movt           %1      \n"
+                : "=&z" (__res), "=&r" (__ex_flag)
+                : "r" (&(count)->counter)
+                : "t");
+
+        __res |= !__ex_flag;
+        if (unlikely(__res != 0))
+                fail_fn(count);
+}
+
+static inline int
+__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
+{
+        int __ex_flag, __res;
+
+        __asm__ __volatile__ (
+                "movli.l        @%2, %0 \n"
+                "add            #-1, %0 \n"
+                "movco.l        %0, @%2 \n"
+                "movt           %1      \n"
+                : "=&z" (__res), "=&r" (__ex_flag)
+                : "r" (&(count)->counter)
+                : "t");
+
+        __res |= !__ex_flag;
+        if (unlikely(__res != 0))
+                __res = fail_fn(count);
+
+        return __res;
+}
+
+static inline void
+__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
+{
+        int __ex_flag, __res;
+
+        __asm__ __volatile__ (
+                "movli.l        @%2, %0 \n\t"
+                "add            #1, %0  \n\t"
+                "movco.l        %0, @%2 \n\t"
+                "movt           %1      \n\t"
+                : "=&z" (__res), "=&r" (__ex_flag)
+                : "r" (&(count)->counter)
+                : "t");
+
+        __res |= !__ex_flag;
+        if (unlikely(__res <= 0))
+                fail_fn(count);
+}
+
+/*
+ * If the unlock was done on a contended lock, or if the unlock simply fails
+ * then the mutex remains locked.
+ */
+#define __mutex_slowpath_needs_to_unlock()      1
+
+/*
+ * For __mutex_fastpath_trylock we do an atomic decrement and check the
+ * result and put it in the __res variable.
+ */
+static inline int
+__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
+{
+        int __res, __orig;
+
+        __asm__ __volatile__ (
+                "1: movli.l     @%2, %0         \n\t"
+                "dt             %0              \n\t"
+                "movco.l        %0,@%2          \n\t"
+                "bf             1b              \n\t"
+                "cmp/eq         #0,%0           \n\t"
+                "bt             2f              \n\t"
+                "mov            #0, %1          \n\t"
+                "bf             3f              \n\t"
+                "2: mov         #1, %1          \n\t"
+                "3:                             "
+                : "=&z" (__orig), "=&r" (__res)
+                : "r" (&count->counter)
+                : "t");
+
+        return __res;
+}
+#endif /* __ASM_SH_MUTEX_LLSC_H */
diff --git a/arch/sh/include/asm/mutex.h b/arch/sh/include/asm/mutex.h
index 458c1f7fbc18..d8e37716a4a0 100644
--- a/arch/sh/include/asm/mutex.h
+++ b/arch/sh/include/asm/mutex.h
@@ -5,5 +5,8 @@
  * implementation in place, or pick the atomic_xchg() based generic
  * implementation. (see asm-generic/mutex-xchg.h for details)
  */
-
+#if defined(CONFIG_CPU_SH4A)
+#include <asm/mutex-llsc.h>
+#else
 #include <asm-generic/mutex-dec.h>
+#endif
diff --git a/arch/sh/include/asm/pm.h b/arch/sh/include/asm/pm.h
deleted file mode 100644
index 56fdbd6b1c94..000000000000
--- a/arch/sh/include/asm/pm.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright 2006 (c) Andriy Skulysh <askulysh@gmail.com>
- *
- */
-#ifndef __ASM_SH_PM_H
-#define __ASM_SH_PM_H
-
-extern u8 wakeup_start;
-extern u8 wakeup_end;
-
-void pm_enter(void);
-
-#endif
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 693364a20ad7..1ef4b24d7619 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -18,7 +18,7 @@ enum cpu_type {
         CPU_SH7619,
 
         /* SH-2A types */
-        CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
+        CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
 
         /* SH-3 types */
         CPU_SH7705, CPU_SH7706, CPU_SH7707,
@@ -82,6 +82,9 @@ extern struct sh_cpuinfo cpu_data[];
 #define current_cpu_data cpu_data[smp_processor_id()]
 #define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
 
+#define cpu_sleep()     __asm__ __volatile__ ("sleep" : : : "memory")
+#define cpu_relax()     barrier()
+
 /* Forward decl */
 struct seq_operations;
 
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index a46a0207e977..d79063c5eb9c 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -175,6 +175,15 @@ static __inline__ void enable_fpu(void)
 
 void show_trace(struct task_struct *tsk, unsigned long *sp,
                 struct pt_regs *regs);
+
+#ifdef CONFIG_DUMP_CODE
+void show_code(struct pt_regs *regs);
+#else
+static inline void show_code(struct pt_regs *regs)
+{
+}
+#endif
+
 extern unsigned long get_wchan(struct task_struct *p);
 
 #define KSTK_EIP(tsk)  (task_pt_regs(tsk)->pc)
@@ -182,9 +191,6 @@ extern unsigned long get_wchan(struct task_struct *p);
 
 #define user_stack_pointer(regs)        ((regs)->regs[15])
 
-#define cpu_sleep()     __asm__ __volatile__ ("sleep" : : : "memory")
-#define cpu_relax()     barrier()
-
 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
     defined(CONFIG_CPU_SH4)
 #define PREFETCH_STRIDE         L1_CACHE_BYTES
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index b0b4824dfc4c..803177fcf086 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -226,9 +226,7 @@ extern unsigned long get_wchan(struct task_struct *p);
 #define KSTK_EIP(tsk)  ((tsk)->thread.pc)
 #define KSTK_ESP(tsk)  ((tsk)->thread.sp)
 
-#define user_stack_pointer(regs)        ((regs)->sp)
-
-#define cpu_relax()     barrier()
+#define user_stack_pointer(regs)        ((regs)->regs[15])
 
 #endif  /* __ASSEMBLY__ */
 #endif /* __ASM_SH_PROCESSOR_64_H */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 3ad18e91bca6..12912ab80c15 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -86,6 +86,7 @@ struct pt_dspregs {
         unsigned long   re;
         unsigned long   mod;
 };
+#endif
 
 #define PTRACE_GETREGS          12      /* General registers */
 #define PTRACE_SETREGS          13
@@ -100,7 +101,6 @@ struct pt_dspregs {
 
 #define PTRACE_GETDSPREGS       55      /* DSP registers */
 #define PTRACE_SETDSPREGS       56
-#endif
 
 #ifdef __KERNEL__
 #include <asm/addrspace.h>
diff --git a/arch/sh/include/asm/sh_bios.h b/arch/sh/include/asm/sh_bios.h
index 0ca261956e3d..d9c96d7cf6c7 100644
--- a/arch/sh/include/asm/sh_bios.h
+++ b/arch/sh/include/asm/sh_bios.h
@@ -10,7 +10,6 @@
 
 extern void sh_bios_console_write(const char *buf, unsigned int len);
 extern void sh_bios_char_out(char ch);
-extern int sh_bios_in_gdb_mode(void);
 extern void sh_bios_gdb_detach(void);
 
 extern void sh_bios_get_node_addr(unsigned char *node_addr);
diff --git a/arch/sh/include/asm/smp.h b/arch/sh/include/asm/smp.h
index 85b660c17eb0..c24e9c6a1736 100644
--- a/arch/sh/include/asm/smp.h
+++ b/arch/sh/include/asm/smp.h
@@ -31,7 +31,7 @@ enum {
 };
 
 void smp_message_recv(unsigned int msg);
-void smp_timer_broadcast(cpumask_t mask);
+void smp_timer_broadcast(const struct cpumask *mask);
 
 void local_timer_interrupt(void);
 void local_timer_setup(unsigned int cpu);
diff --git a/arch/sh/include/asm/string_64.h b/arch/sh/include/asm/string_64.h
index aa1fef229c78..742007172624 100644
--- a/arch/sh/include/asm/string_64.h
+++ b/arch/sh/include/asm/string_64.h
@@ -1,17 +1,20 @@
 #ifndef __ASM_SH_STRING_64_H
 #define __ASM_SH_STRING_64_H
 
-/*
- * include/asm-sh/string_64.h
- *
- * Copyright (C) 2000, 2001  Paolo Alberelli
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
+#ifdef __KERNEL__
+
+#define __HAVE_ARCH_MEMSET
+extern void *memset(void *__s, int __c, size_t __count);
 
 #define __HAVE_ARCH_MEMCPY
 extern void *memcpy(void *dest, const void *src, size_t count);
 
+#define __HAVE_ARCH_STRLEN
+extern size_t strlen(const char *);
+
+#define __HAVE_ARCH_STRCPY
+extern char *strcpy(char *__dest, const char *__src);
+
+#endif /* __KERNEL__ */
+
 #endif /* __ASM_SH_STRING_64_H */
diff --git a/arch/sh/include/asm/syscall_32.h b/arch/sh/include/asm/syscall_32.h
index 54773f26cd44..05a868a71ef5 100644
--- a/arch/sh/include/asm/syscall_32.h
+++ b/arch/sh/include/asm/syscall_32.h
@@ -5,7 +5,7 @@
 #include <linux/sched.h>
 #include <asm/ptrace.h>
 
-/* The system call number is given by the user in %g1 */
+/* The system call number is given by the user in R3 */
 static inline long syscall_get_nr(struct task_struct *task,
                                   struct pt_regs *regs)
 {
diff --git a/arch/sh/include/asm/syscall_64.h b/arch/sh/include/asm/syscall_64.h
index bcaaa8ca4d70..e1143b9784d6 100644
--- a/arch/sh/include/asm/syscall_64.h
+++ b/arch/sh/include/asm/syscall_64.h
@@ -1,6 +1,80 @@
 #ifndef __ASM_SH_SYSCALL_64_H
 #define __ASM_SH_SYSCALL_64_H
 
-#include <asm-generic/syscall.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <asm/ptrace.h>
+
+/* The system call number is given by the user in R9 */
+static inline long syscall_get_nr(struct task_struct *task,
+                                  struct pt_regs *regs)
+{
+        return (regs->syscall_nr >= 0) ? regs->regs[9] : -1L;
+}
+
+static inline void syscall_rollback(struct task_struct *task,
+                                    struct pt_regs *regs)
+{
+        /*
+         * XXX: This needs some thought. On SH we don't
+         * save away the original R9 value anywhere.
+         */
+}
+
+static inline bool syscall_has_error(struct pt_regs *regs)
+{
+        return (regs->sr & 0x1) ? true : false;
+}
+static inline void syscall_set_error(struct pt_regs *regs)
+{
+        regs->sr |= 0x1;
+}
+static inline void syscall_clear_error(struct pt_regs *regs)
+{
+        regs->sr &= ~0x1;
+}
+
+static inline long syscall_get_error(struct task_struct *task,
+                                     struct pt_regs *regs)
+{
+        return syscall_has_error(regs) ? regs->regs[9] : 0;
+}
+
+static inline long syscall_get_return_value(struct task_struct *task,
+                                            struct pt_regs *regs)
+{
+        return regs->regs[9];
+}
+
+static inline void syscall_set_return_value(struct task_struct *task,
+                                            struct pt_regs *regs,
+                                            int error, long val)
+{
+        if (error) {
+                syscall_set_error(regs);
+                regs->regs[9] = -error;
+        } else {
+                syscall_clear_error(regs);
+                regs->regs[9] = val;
+        }
+}
+
+static inline void syscall_get_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         unsigned long *args)
+{
+        BUG_ON(i + n > 6);
+        memcpy(args, &regs->regs[2 + i], n * sizeof(args[0]));
+}
+
+static inline void syscall_set_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         const unsigned long *args)
+{
+        BUG_ON(i + n > 6);
+        memcpy(&regs->regs[2 + i], args, n * sizeof(args[0]));
+}
 
 #endif /* __ASM_SH_SYSCALL_64_H */
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index 6160fe445161..c9ec6af8e745 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -175,6 +175,8 @@ asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs)
 BUILD_TRAP_HANDLER(address_error);
 BUILD_TRAP_HANDLER(debug);
 BUILD_TRAP_HANDLER(bug);
+BUILD_TRAP_HANDLER(breakpoint);
+BUILD_TRAP_HANDLER(singlestep);
 BUILD_TRAP_HANDLER(fpu_error);
 BUILD_TRAP_HANDLER(fpu_state_restore);
 
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index 95f0085e098a..066f0fba590e 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -5,7 +5,6 @@
 
 /* sched_domains SD_NODE_INIT for sh machines */
 #define SD_NODE_INIT (struct sched_domain) {            \
-        .span                   = CPU_MASK_NONE,        \
         .parent                 = NULL,                 \
         .child                  = NULL,                 \
         .groups                 = NULL,                 \
@@ -33,6 +32,7 @@
 #define parent_node(node)       ((void)(node),0)
 
 #define node_to_cpumask(node)   ((void)node, cpu_online_map)
+#define cpumask_of_node(node)   ((void)node, cpu_online_mask)
 #define node_to_first_cpu(node) ((void)(node),0)
 
 #define pcibus_to_node(bus)     ((void)(bus), -1)
diff --git a/arch/sh/include/asm/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h
new file mode 100644
index 000000000000..d8f89770275b
--- /dev/null
+++ b/arch/sh/include/asm/unaligned-sh4a.h
@@ -0,0 +1,258 @@
+#ifndef __ASM_SH_UNALIGNED_SH4A_H
+#define __ASM_SH_UNALIGNED_SH4A_H
+
+/*
+ * SH-4A has support for unaligned 32-bit loads, and 32-bit loads only.
+ * Support for 16 and 64-bit accesses are done through shifting and
+ * masking relative to the endianness. Unaligned stores are not supported
+ * by the instruction encoding, so these continue to use the packed
+ * struct.
+ *
+ * The same note as with the movli.l/movco.l pair applies here, as long
+ * as the load is gauranteed to be inlined, nothing else will hook in to
+ * r0 and we get the return value for free.
+ *
+ * NOTE: Due to the fact we require r0 encoding, care should be taken to
+ * avoid mixing these heavily with other r0 consumers, such as the atomic
+ * ops. Failure to adhere to this can result in the compiler running out
+ * of spill registers and blowing up when building at low optimization
+ * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777.
+ */
+#include <linux/types.h>
+#include <asm/byteorder.h>
+
+static __always_inline u32 __get_unaligned_cpu32(const u8 *p)
+{
+        unsigned long unaligned;
+
+        __asm__ __volatile__ (
+                "movua.l        @%1, %0\n\t"
+                 : "=z" (unaligned)
+                 : "r" (p)
+        );
+
+        return unaligned;
+}
+
+struct __una_u16 { u16 x __attribute__((packed)); };
+struct __una_u32 { u32 x __attribute__((packed)); };
+struct __una_u64 { u64 x __attribute__((packed)); };
+
+static inline u16 __get_unaligned_cpu16(const u8 *p)
+{
+#ifdef __LITTLE_ENDIAN
+        return __get_unaligned_cpu32(p) & 0xffff;
+#else
+        return __get_unaligned_cpu32(p) >> 16;
+#endif
+}
+
+/*
+ * Even though movua.l supports auto-increment on the read side, it can
+ * only store to r0 due to instruction encoding constraints, so just let
+ * the compiler sort it out on its own.
+ */
+static inline u64 __get_unaligned_cpu64(const u8 *p)
+{
+#ifdef __LITTLE_ENDIAN
+        return (u64)__get_unaligned_cpu32(p + 4) << 32 |
+                    __get_unaligned_cpu32(p);
+#else
+        return (u64)__get_unaligned_cpu32(p) << 32 |
+                    __get_unaligned_cpu32(p + 4);
+#endif
+}
+
+static inline u16 get_unaligned_le16(const void *p)
+{
+        return le16_to_cpu(__get_unaligned_cpu16(p));
+}
+
+static inline u32 get_unaligned_le32(const void *p)
+{
+        return le32_to_cpu(__get_unaligned_cpu32(p));
+}
+
+static inline u64 get_unaligned_le64(const void *p)
+{
+        return le64_to_cpu(__get_unaligned_cpu64(p));
+}
+
+static inline u16 get_unaligned_be16(const void *p)
+{
+        return be16_to_cpu(__get_unaligned_cpu16(p));
+}
+
+static inline u32 get_unaligned_be32(const void *p)
+{
+        return be32_to_cpu(__get_unaligned_cpu32(p));
+}
+
+static inline u64 get_unaligned_be64(const void *p)
+{
+        return be64_to_cpu(__get_unaligned_cpu64(p));
+}
+
+static inline void __put_le16_noalign(u8 *p, u16 val)
+{
+        *p++ = val;
+        *p++ = val >> 8;
+}
+
+static inline void __put_le32_noalign(u8 *p, u32 val)
+{
+        __put_le16_noalign(p, val);
+        __put_le16_noalign(p + 2, val >> 16);
+}
+
+static inline void __put_le64_noalign(u8 *p, u64 val)
+{
+        __put_le32_noalign(p, val);
+        __put_le32_noalign(p + 4, val >> 32);
+}
+
+static inline void __put_be16_noalign(u8 *p, u16 val)
+{
+        *p++ = val >> 8;
+        *p++ = val;
+}
+
+static inline void __put_be32_noalign(u8 *p, u32 val)
+{
+        __put_be16_noalign(p, val >> 16);
+        __put_be16_noalign(p + 2, val);
+}
+
+static inline void __put_be64_noalign(u8 *p, u64 val)
+{
+        __put_be32_noalign(p, val >> 32);
+        __put_be32_noalign(p + 4, val);
+}
+
+static inline void put_unaligned_le16(u16 val, void *p)
+{
+#ifdef __LITTLE_ENDIAN
+        ((struct __una_u16 *)p)->x = val;
+#else
+        __put_le16_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_le32(u32 val, void *p)
+{
+#ifdef __LITTLE_ENDIAN
+        ((struct __una_u32 *)p)->x = val;
+#else
+        __put_le32_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_le64(u64 val, void *p)
+{
+#ifdef __LITTLE_ENDIAN
+        ((struct __una_u64 *)p)->x = val;
+#else
+        __put_le64_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_be16(u16 val, void *p)
+{
+#ifdef __BIG_ENDIAN
+        ((struct __una_u16 *)p)->x = val;
+#else
+        __put_be16_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_be32(u32 val, void *p)
+{
+#ifdef __BIG_ENDIAN
+        ((struct __una_u32 *)p)->x = val;
+#else
+        __put_be32_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_be64(u64 val, void *p)
+{
+#ifdef __BIG_ENDIAN
+        ((struct __una_u64 *)p)->x = val;
+#else
+        __put_be64_noalign(p, val);
+#endif
+}
+
+/*
+ * Cause a link-time error if we try an unaligned access other than
+ * 1,2,4 or 8 bytes long
+ */
+extern void __bad_unaligned_access_size(void);
+
+#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({                     \
+        __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr),                      \
+        __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)),   \
+        __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)),   \
+        __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)),   \
+        __bad_unaligned_access_size()))));                                      \
+        }))
+
+#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({                     \
+        __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr),                      \
+        __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)),   \
+        __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)),   \
+        __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)),   \
+        __bad_unaligned_access_size()))));                                      \
+        }))
+
+#define __put_unaligned_le(val, ptr) ({                                 \
+        void *__gu_p = (ptr);                                           \
+        switch (sizeof(*(ptr))) {                                       \
+        case 1:                                                         \
+                *(u8 *)__gu_p = (__force u8)(val);                      \
+                break;                                                  \
+        case 2:                                                         \
+                put_unaligned_le16((__force u16)(val), __gu_p);         \
+                break;                                                  \
+        case 4:                                                         \
+                put_unaligned_le32((__force u32)(val), __gu_p);         \
+                break;                                                  \
+        case 8:                                                         \
+                put_unaligned_le64((__force u64)(val), __gu_p);         \
+                break;                                                  \
+        default:                                                        \
+                __bad_unaligned_access_size();                          \
+                break;                                                  \
+        }                                                               \
+        (void)0; })
+
+#define __put_unaligned_be(val, ptr) ({                                 \
+        void *__gu_p = (ptr);                                           \
+        switch (sizeof(*(ptr))) {                                       \
+        case 1:                                                         \
+                *(u8 *)__gu_p = (__force u8)(val);                      \
+                break;                                                  \
+        case 2:                                                         \
+                put_unaligned_be16((__force u16)(val), __gu_p);         \
+                break;                                                  \
+        case 4:                                                         \
+                put_unaligned_be32((__force u32)(val), __gu_p);         \
+                break;                                                  \
+        case 8:                                                         \
+                put_unaligned_be64((__force u64)(val), __gu_p);         \
+                break;                                                  \
+        default:                                                        \
+                __bad_unaligned_access_size();                          \
+                break;                                                  \
+        }                                                               \
+        (void)0; })
+
+#ifdef __LITTLE_ENDIAN
+# define get_unaligned __get_unaligned_le
+# define put_unaligned __put_unaligned_le
+#else
+# define get_unaligned __get_unaligned_be
+# define put_unaligned __put_unaligned_be
+#endif
+
+#endif /* __ASM_SH_UNALIGNED_SH4A_H */
diff --git a/arch/sh/include/asm/unaligned.h b/arch/sh/include/asm/unaligned.h
index c1641a01d50f..8c0ad5e4487a 100644
--- a/arch/sh/include/asm/unaligned.h
+++ b/arch/sh/include/asm/unaligned.h
@@ -1,7 +1,11 @@
 #ifndef _ASM_SH_UNALIGNED_H
 #define _ASM_SH_UNALIGNED_H
 
-/* SH can't handle unaligned accesses. */
+#ifdef CONFIG_CPU_SH4A
+/* SH-4A can handle unaligned loads in a relatively neutered fashion. */
+#include <asm/unaligned-sh4a.h>
+#else
+/* Otherwise, SH can't handle unaligned accesses. */
 #ifdef __LITTLE_ENDIAN__
 # include <linux/unaligned/le_struct.h>
 # include <linux/unaligned/be_byteshift.h>
@@ -15,5 +19,6 @@
 # define get_unaligned  __get_unaligned_be
 # define put_unaligned  __put_unaligned_be
 #endif
+#endif
 
 #endif /* _ASM_SH_UNALIGNED_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/gpio.h b/arch/sh/include/cpu-sh3/cpu/gpio.h
index 4e53eb314b8f..9a22b882f3dc 100644
--- a/arch/sh/include/cpu-sh3/cpu/gpio.h
+++ b/arch/sh/include/cpu-sh3/cpu/gpio.h
@@ -62,6 +62,20 @@
 #define PORT_PSELC      0xA4050128UL
 #define PORT_PSELD      0xA405012AUL
 
+#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
+
+/* Control registers */
+#define PORT_PACR       0xa4000100UL
+#define PORT_PBCR       0xa4000102UL
+#define PORT_PCCR       0xa4000104UL
+#define PORT_PFCR       0xa400010aUL
+
+/* Data registers */
+#define PORT_PADR       0xa4000120UL
+#define PORT_PBDR       0xa4000122UL
+#define PORT_PCDR       0xa4000124UL
+#define PORT_PFDR       0xa400012aUL
+
 #endif
 
 #endif
diff --git a/arch/sh/include/mach-common/mach/edosk7705.h b/arch/sh/include/mach-common/mach/edosk7705.h
index 5bdc9d9be3de..efc43b323466 100644
--- a/arch/sh/include/mach-common/mach/edosk7705.h
+++ b/arch/sh/include/mach-common/mach/edosk7705.h
@@ -1,30 +1,7 @@
-/*
- * include/asm-sh/edosk7705.h
- *
- * Modified version of io_se.h for the EDOSK7705 specific functions.
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * IO functions for an Hitachi EDOSK7705 development board
- */
-
-#ifndef __ASM_SH_EDOSK7705_IO_H
-#define __ASM_SH_EDOSK7705_IO_H
+#ifndef __ASM_SH_EDOSK7705_H
+#define __ASM_SH_EDOSK7705_H
 
+#define __IO_PREFIX sh_edosk7705
 #include <asm/io_generic.h>
 
-extern unsigned char sh_edosk7705_inb(unsigned long port);
-extern unsigned int sh_edosk7705_inl(unsigned long port);
-
-extern void sh_edosk7705_outb(unsigned char value, unsigned long port);
-extern void sh_edosk7705_outl(unsigned int value, unsigned long port);
-
-extern void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count);
-extern void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count);
-extern void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count);
-extern void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count);
-
-extern unsigned long sh_edosk7705_isa_port2addr(unsigned long offset);
-
-#endif /* __ASM_SH_EDOSK7705_IO_H */
+#endif /* __ASM_SH_EDOSK7705_H */
diff --git a/arch/sh/include/mach-se/mach/mrshpc.h b/arch/sh/include/mach-se/mach/mrshpc.h
new file mode 100644
index 000000000000..56287ee8563a
--- /dev/null
+++ b/arch/sh/include/mach-se/mach/mrshpc.h
@@ -0,0 +1,52 @@
+#ifndef __MACH_SE_MRSHPC_H
+#define __MACH_SE_MRSHPC_H
+
+#include <linux/io.h>
+
+static inline void __init mrshpc_setup_windows(void)
+{
+        if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0)
+                return; /* Not detected */
+
+        if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) {
+                __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
+        } else {
+                __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
+        }
+
+        /*
+         *  PC-Card window open
+         *  flag == COMMON/ATTRIBUTE/IO
+         */
+        /* common window open */
+        __raw_writew(0x8a84, MRSHPC_MW0CR1);
+        if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+                /* common mode & bus width 16bit SWAP = 1*/
+                __raw_writew(0x0b00, MRSHPC_MW0CR2);
+        else
+                /* common mode & bus width 16bit SWAP = 0*/
+                __raw_writew(0x0300, MRSHPC_MW0CR2);
+
+        /* attribute window open */
+        __raw_writew(0x8a85, MRSHPC_MW1CR1);
+        if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+                /* attribute mode & bus width 16bit SWAP = 1*/
+                __raw_writew(0x0a00, MRSHPC_MW1CR2);
+        else
+                /* attribute mode & bus width 16bit SWAP = 0*/
+                __raw_writew(0x0200, MRSHPC_MW1CR2);
+
+        /* I/O window open */
+        __raw_writew(0x8a86, MRSHPC_IOWCR1);
+        __raw_writew(0x0008, MRSHPC_CDCR);       /* I/O card mode */
+        if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+                __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
+        else
+                __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
+
+        __raw_writew(0x2000, MRSHPC_ICR);
+        __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206);
+        __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200);
+}
+
+#endif /* __MACH_SE_MRSHPC_H */
diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h
index eb23000e1bbe..14be91c5a2f0 100644
--- a/arch/sh/include/mach-se/mach/se.h
+++ b/arch/sh/include/mach-se/mach/se.h
@@ -68,6 +68,24 @@
 #define BCR_ILCRF       (PA_BCR + 10)
 #define BCR_ILCRG       (PA_BCR + 12)
 
+#if defined(CONFIG_CPU_SUBTYPE_SH7709)
+#define INTC_IRR0       0xa4000004UL
+#define INTC_IRR1       0xa4000006UL
+#define INTC_IRR2       0xa4000008UL
+
+#define INTC_ICR0       0xfffffee0UL
+#define INTC_ICR1       0xa4000010UL
+#define INTC_ICR2       0xa4000012UL
+#define INTC_INTER      0xa4000014UL
+
+#define INTC_IPRC       0xa4000016UL
+#define INTC_IPRD       0xa4000018UL
+#define INTC_IPRE       0xa400001aUL
+
+#define IRQ0_IRQ        32
+#define IRQ1_IRQ        33
+#endif
+
 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
 #define IRQ_STNIC       12
 #define IRQ_CFCARD      14
diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h
index 98458460e632..749914b400fb 100644
--- a/arch/sh/include/mach-se/mach/se7343.h
+++ b/arch/sh/include/mach-se/mach/se7343.h
@@ -118,9 +118,6 @@
 #define FPGA_IN         0xb1400000
 #define FPGA_OUT        0xb1400002
 
-#define __IO_PREFIX     sh7343se
-#include <asm/io_generic.h>
-
 #define IRQ0_IRQ        32
 #define IRQ1_IRQ        33
 #define IRQ4_IRQ        36
@@ -132,8 +129,10 @@
 #define SE7343_FPGA_IRQ_MRSHPC3 3
 #define SE7343_FPGA_IRQ_SMC     6       /* EXT_IRQ2 */
 #define SE7343_FPGA_IRQ_USB     8
+#define SE7343_FPGA_IRQ_UARTA   10
+#define SE7343_FPGA_IRQ_UARTB   11
 
-#define SE7343_FPGA_IRQ_NR      11
+#define SE7343_FPGA_IRQ_NR      12
 #define SE7343_FPGA_IRQ_BASE    120
 
 #define MRSHPC_IRQ3     (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3)
@@ -142,6 +141,8 @@
 #define MRSHPC_IRQ0     (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0)
 #define SMC_IRQ         (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC)
 #define USB_IRQ         (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB)
+#define UARTA_IRQ       (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTA)
+#define UARTB_IRQ       (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTB)
 
 /* arch/sh/boards/se/7343/irq.c */
 void init_7343se_IRQ(void);
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index 48edfb145fb4..2e1b86e16ab5 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -4,25 +4,31 @@
 
 extra-y := head_32.o init_task.o vmlinux.lds
 
-obj-y   := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \
-           ptrace_32.o setup.o signal_32.o sys_sh.o sys_sh32.o \
-           syscalls_32.o time_32.o topology.o traps.o traps_32.o
+ifdef CONFIG_FUNCTION_TRACER
+# Do not profile debug and lowlevel utilities
+CFLAGS_REMOVE_ftrace.o = -pg
+endif
+
+obj-y   := debugtraps.o idle.o io.o io_generic.o irq.o                  \
+           machvec.o process_32.o ptrace_32.o setup.o signal_32.o       \
+           sys_sh.o sys_sh32.o syscalls_32.o time_32.o topology.o       \
+           traps.o traps_32.o
 
 obj-y                           += cpu/ timers/
 obj-$(CONFIG_VSYSCALL)          += vsyscall/
 obj-$(CONFIG_SMP)               += smp.o
-obj-$(CONFIG_CF_ENABLER)        += cf-enabler.o
 obj-$(CONFIG_SH_STANDARD_BIOS)  += sh_bios.o
-obj-$(CONFIG_SH_KGDB)           += kgdb_stub.o kgdb_jmp.o
+obj-$(CONFIG_KGDB)              += kgdb.o
 obj-$(CONFIG_SH_CPU_FREQ)       += cpufreq.o
 obj-$(CONFIG_MODULES)           += sh_ksyms_32.o module.o
 obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
-obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-$(CONFIG_IO_TRAPPED)        += io_trapped.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
 obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
+obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
+obj-$(CONFIG_DUMP_CODE)         += disassemble.o
 
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64
index c97660b2b48d..fe425d7f6871 100644
--- a/arch/sh/kernel/Makefile_64
+++ b/arch/sh/kernel/Makefile_64
@@ -1,21 +1,18 @@
 extra-y := head_64.o init_task.o vmlinux.lds
 
-obj-y   := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \
+obj-y   := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \
            ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \
            syscalls_64.o time_64.o topology.o traps.o traps_64.o
 
 obj-y                           += cpu/ timers/
 obj-$(CONFIG_VSYSCALL)          += vsyscall/
 obj-$(CONFIG_SMP)               += smp.o
-obj-$(CONFIG_CF_ENABLER)        += cf-enabler.o
 obj-$(CONFIG_SH_STANDARD_BIOS)  += sh_bios.o
-obj-$(CONFIG_SH_KGDB)           += kgdb_stub.o kgdb_jmp.o
 obj-$(CONFIG_SH_CPU_FREQ)       += cpufreq.o
 obj-$(CONFIG_MODULES)           += sh_ksyms_64.o module.o
 obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
-obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-$(CONFIG_IO_TRAPPED)        += io_trapped.o
 obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c
deleted file mode 100644
index bea40339919b..000000000000
--- a/arch/sh/kernel/cf-enabler.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/* $Id: cf-enabler.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $
- *
- *  linux/drivers/block/cf-enabler.c
- *
- *  Copyright (C) 1999  Niibe Yutaka
- *  Copyright (C) 2000  Toshiharu Nozawa
- *  Copyright (C) 2001  A&D Co., Ltd.
- *
- *  Enable the CF configuration.
- */
-
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/vmalloc.h>
-#include <linux/interrupt.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-
-/*
- * You can connect Compact Flash directly to the bus of SuperH.
- * This is the enabler for that.
- *
- * SIM: How generic is this really? It looks pretty board, or at
- * least SH sub-type, specific to me.
- * I know it doesn't work on the Overdrive!
- */
-
-/*
- * 0xB8000000 : Attribute
- * 0xB8001000 : Common Memory
- * 0xBA000000 : I/O
- */
-#if defined(CONFIG_CPU_SH4)
-/* SH4 can't access PCMCIA interface through P2 area.
- * we must remap it with appropriate attribute bit of the page set.
- * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
-
-#if defined(CONFIG_CF_AREA6)
-#define slot_no 0
-#else
-#define slot_no 1
-#endif
-
-/* use this pointer to access to directly connected compact flash io area*/
-void *cf_io_base;
-
-static int __init allocate_cf_area(void)
-{
-        pgprot_t prot;
-        unsigned long paddrbase, psize;
-
-        /* open I/O area window */
-        paddrbase = virt_to_phys((void*)CONFIG_CF_BASE_ADDR);
-        psize = PAGE_SIZE;
-        prot = PAGE_KERNEL_PCC(slot_no, _PAGE_PCC_IO16);
-        cf_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
-        if (!cf_io_base) {
-                printk("allocate_cf_area : can't open CF I/O window!\n");
-                return -ENOMEM;
-        }
-/*      printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n",
-                paddrbase, psize, prot.pgprot, cf_io_base);*/
-
-        /* XXX : do we need attribute and common-memory area also? */
-
-        return 0;
-}
-#endif
-
-static int __init cf_init_default(void)
-{
-/* You must have enabled the card, and set the level interrupt
- * before reaching this point. Possibly in boot ROM or boot loader.
- */
-#if defined(CONFIG_CPU_SH4)
-        allocate_cf_area();
-#endif
-
-        return 0;
-}
-
-#if defined(CONFIG_SH_SOLUTION_ENGINE)
-#include <mach-se/mach/se.h>
-#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
-#include <mach-se/mach/se7722.h>
-#elif defined(CONFIG_SH_7721_SOLUTION_ENGINE)
-#include <mach-se/mach/se7721.h>
-#endif
-
-/*
- * SolutionEngine Seriese
- *
- * about MS770xSE
- * 0xB8400000 : Common Memory
- * 0xB8500000 : Attribute
- * 0xB8600000 : I/O
- *
- * about MS7722SE
- * 0xB0400000 : Common Memory
- * 0xB0500000 : Attribute
- * 0xB0600000 : I/O
- */
-
-#if defined(CONFIG_SH_SOLUTION_ENGINE) || \
-    defined(CONFIG_SH_7722_SOLUTION_ENGINE) || \
-    defined(CONFIG_SH_7721_SOLUTION_ENGINE)
-static int __init cf_init_se(void)
-{
-        if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
-                return 0;       /* Not detected */
-
-        if ((ctrl_inw(MRSHPC_CSR) & 0x0080) == 0) {
-                ctrl_outw(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
-        } else {
-                ctrl_outw(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
-        }
-
-        /*
-         *  PC-Card window open
-         *  flag == COMMON/ATTRIBUTE/IO
-         */
-        /* common window open */
-        ctrl_outw(0x8a84, MRSHPC_MW0CR1);
-        if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
-                /* common mode & bus width 16bit SWAP = 1*/
-                ctrl_outw(0x0b00, MRSHPC_MW0CR2);
-        else
-                /* common mode & bus width 16bit SWAP = 0*/
-                ctrl_outw(0x0300, MRSHPC_MW0CR2);
-
-        /* attribute window open */
-        ctrl_outw(0x8a85, MRSHPC_MW1CR1);
-        if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
-                /* attribute mode & bus width 16bit SWAP = 1*/
-                ctrl_outw(0x0a00, MRSHPC_MW1CR2);
-        else
-                /* attribute mode & bus width 16bit SWAP = 0*/
-                ctrl_outw(0x0200, MRSHPC_MW1CR2);
-
-        /* I/O window open */
-        ctrl_outw(0x8a86, MRSHPC_IOWCR1);
-        ctrl_outw(0x0008, MRSHPC_CDCR);  /* I/O card mode */
-        if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
-                ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
-        else
-                ctrl_outw(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
-
-        ctrl_outw(0x2000, MRSHPC_ICR);
-        ctrl_outb(0x00, PA_MRSHPC_MW2 + 0x206);
-        ctrl_outb(0x42, PA_MRSHPC_MW2 + 0x200);
-        return 0;
-}
-#else
-static int __init cf_init_se(void)
-{
-        return -1;
-}
-#endif
-
-static int __init cf_init(void)
-{
-        if (mach_is_se() || mach_is_7722se() || mach_is_7721se())
-                return cf_init_se();
-
-        return cf_init_default();
-}
-
-__initcall (cf_init);
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index b7e46d5bba43..7b17137536d6 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -117,6 +117,11 @@ int clk_enable(struct clk *clk)
         unsigned long flags;
         int ret;
 
+        if (!clk)
+                return -EINVAL;
+
+        clk_enable(clk->parent);
+
         spin_lock_irqsave(&clock_lock, flags);
         ret = __clk_enable(clk);
         spin_unlock_irqrestore(&clock_lock, flags);
@@ -147,9 +152,14 @@ void clk_disable(struct clk *clk)
 {
         unsigned long flags;
 
+        if (!clk)
+                return;
+
         spin_lock_irqsave(&clock_lock, flags);
         __clk_disable(clk);
         spin_unlock_irqrestore(&clock_lock, flags);
+
+        clk_disable(clk->parent);
 }
 EXPORT_SYMBOL_GPL(clk_disable);
 
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 75fb03d35670..d29e69c156f0 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -261,9 +261,11 @@ asmlinkage void __init sh_cpu_init(void)
         cache_init();
 
         if (raw_smp_processor_id() == 0) {
+#ifdef CONFIG_MMU
                 shm_align_mask = max_t(unsigned long,
                                        current_cpu_data.dcache.way_size - 1,
                                        PAGE_SIZE - 1);
+#endif
 
                 /* Boot CPU sets the cache shape */
                 detect_cache_shape();
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index 428450cc0809..45f85c77ef75 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -8,9 +8,10 @@ common-y	+= ex.o entry.o
 
 obj-$(CONFIG_SH_FPU)    += fpu.o
 
-obj-$(CONFIG_CPU_SUBTYPE_SH7206)        += setup-sh7206.o clock-sh7206.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7201)        += setup-sh7201.o clock-sh7201.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7203)        += setup-sh7203.o clock-sh7203.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7263)        += setup-sh7203.o clock-sh7203.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7206)        += setup-sh7206.o clock-sh7206.o
 obj-$(CONFIG_CPU_SUBTYPE_MXG)           += setup-mxg.o clock-sh7206.o
 
 # Pinmux setup
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
new file mode 100644
index 000000000000..020a96fe961a
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -0,0 +1,85 @@
+/*
+ * arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+ *
+ * SH7201 support for the clock framework
+ *
+ *  Copyright (C) 2008 Peter Griffin  <pgriffin@mpc-data.co.uk>
+ *
+ * Based on clock-sh4.c
+ *  Copyright (C) 2005  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+const static int pll1rate[]={1,2,3,4,6,8};
+const static int pfc_divisors[]={1,2,3,4,6,8,12};
+#define ifc_divisors pfc_divisors
+
+#if (CONFIG_SH_CLK_MD == 0)
+#define PLL2 (4)
+#elif (CONFIG_SH_CLK_MD == 2)
+#define PLL2 (2)
+#elif (CONFIG_SH_CLK_MD == 3)
+#define PLL2 (1)
+#else
+#error "Illegal Clock Mode!"
+#endif
+
+static void master_clk_init(struct clk *clk)
+{
+        clk->rate = 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+}
+
+static struct clk_ops sh7201_master_clk_ops = {
+        .init           = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh7201_module_clk_ops = {
+        .recalc         = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh7201_bus_clk_ops = {
+        .recalc         = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007);
+        clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh7201_cpu_clk_ops = {
+        .recalc         = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7201_clk_ops[] = {
+        &sh7201_master_clk_ops,
+        &sh7201_module_clk_ops,
+        &sh7201_bus_clk_ops,
+        &sh7201_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+        if (idx < ARRAY_SIZE(sh7201_clk_ops))
+                *ops = sh7201_clk_ops[idx];
+}
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 6e79132f6f30..e098e2f6aa08 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -18,16 +18,17 @@ int __init detect_cpu_and_cache_system(void)
         /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */
         boot_cpu_data.flags                     |= CPU_HAS_OP32;
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7203)
+#if defined(CONFIG_CPU_SUBTYPE_SH7201)
+        boot_cpu_data.type                      = CPU_SH7201;
+        boot_cpu_data.flags                     |= CPU_HAS_FPU;
+#elif defined(CONFIG_CPU_SUBTYPE_SH7203)
         boot_cpu_data.type                      = CPU_SH7203;
-        /* SH7203 has an FPU.. */
         boot_cpu_data.flags                     |= CPU_HAS_FPU;
 #elif defined(CONFIG_CPU_SUBTYPE_SH7263)
         boot_cpu_data.type                      = CPU_SH7263;
         boot_cpu_data.flags                     |= CPU_HAS_FPU;
 #elif defined(CONFIG_CPU_SUBTYPE_SH7206)
         boot_cpu_data.type                      = CPU_SH7206;
-        /* While SH7206 has a DSP.. */
         boot_cpu_data.flags                     |= CPU_HAS_DSP;
 #elif defined(CONFIG_CPU_SUBTYPE_MXG)
         boot_cpu_data.type                      = CPU_MXG;
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
new file mode 100644
index 000000000000..0631e421c022
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -0,0 +1,331 @@
+/*
+ *  SH7201 setup
+ *
+ *  Copyright (C) 2008  Peter Griffin pgriffin@mpc-data.co.uk
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/serial_sci.h>
+
+enum {
+        UNUSED = 0,
+
+        /* interrupt sources */
+        IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+        PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
+        ADC_ADI,
+        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
+        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
+        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
+        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
+        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
+        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
+        MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
+        RTC_ARM, RTC_PRD, RTC_CUP,
+        WDT,
+        IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI,
+        IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI,
+        IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI,
+
+        DMAC0_DMINT0, DMAC1_DMINT1,
+        DMAC2_DMINT2, DMAC3_DMINT3,
+
+        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
+        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
+        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
+        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
+        SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI,
+        SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI,
+        SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI,
+        SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI,
+
+        DMAC0_DMINTA, DMAC4_DMINT4, DMAC5_DMINT5, DMAC6_DMINT6,
+        DMAC7_DMINT7,
+
+        RCAN0_ERS, RCAN0_OVR,
+        RCAN0_SLE,
+        RCAN0_RM0, RCAN0_RM1,
+
+        RCAN1_ERS, RCAN1_OVR,
+        RCAN1_SLE,
+        RCAN1_RM0, RCAN1_RM1,
+
+        SSI0_SSII, SSI1_SSII,
+
+        TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0,
+        TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1,
+
+        /* interrupt groups */
+
+        IRQ, PINT, ADC,
+        MTU20_ABCD, MTU20_VEF, MTU21_AB, MTU21_VU, MTU22_AB, MTU22_VU,
+        MTU23_ABCD, MTU24_ABCD, MTU25_UVW,
+        RTC, IIC30, IIC31, IIC32,
+        SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,
+        RCAN0, RCAN1, TMR0, TMR1
+
+};
+
+static struct intc_vect vectors[] __initdata = {
+        INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
+        INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
+        INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
+        INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
+        INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
+        INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
+        INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
+        INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
+
+        INTC_IRQ(ADC_ADI, 92),
+
+        INTC_IRQ(MTU2_TGI0A, 108), INTC_IRQ(MTU2_TGI0B, 109),
+        INTC_IRQ(MTU2_TGI0C, 110), INTC_IRQ(MTU2_TGI0D, 111),
+        INTC_IRQ(MTU2_TCI0V, 112),
+        INTC_IRQ(MTU2_TGI0E, 113), INTC_IRQ(MTU2_TGI0F, 114),
+
+        INTC_IRQ(MTU2_TGI1A, 116), INTC_IRQ(MTU2_TGI1B, 117),
+        INTC_IRQ(MTU2_TCI1V, 120), INTC_IRQ(MTU2_TCI1U, 121),
+
+        INTC_IRQ(MTU2_TGI2A, 124), INTC_IRQ(MTU2_TGI2B, 125),
+        INTC_IRQ(MTU2_TCI2V, 128), INTC_IRQ(MTU2_TCI2U, 129),
+
+        INTC_IRQ(MTU2_TGI3A, 132), INTC_IRQ(MTU2_TGI3B, 133),
+        INTC_IRQ(MTU2_TGI3C, 134), INTC_IRQ(MTU2_TGI3D, 135),
+        INTC_IRQ(MTU2_TCI3V, 136),
+
+        INTC_IRQ(MTU2_TGI4A, 140), INTC_IRQ(MTU2_TGI4B, 141),
+        INTC_IRQ(MTU2_TGI4C, 142), INTC_IRQ(MTU2_TGI4D, 143),
+        INTC_IRQ(MTU2_TCI4V, 144),
+
+        INTC_IRQ(MTU2_TGI5U, 148), INTC_IRQ(MTU2_TGI5V, 149),
+        INTC_IRQ(MTU2_TGI5W, 150),
+
+        INTC_IRQ(RTC_ARM, 152), INTC_IRQ(RTC_PRD, 153),
+        INTC_IRQ(RTC_CUP, 154), INTC_IRQ(WDT, 156),
+
+        INTC_IRQ(IIC30_STPI, 157), INTC_IRQ(IIC30_NAKI, 158),
+        INTC_IRQ(IIC30_RXI, 159), INTC_IRQ(IIC30_TXI, 160),
+        INTC_IRQ(IIC30_TEI, 161),
+
+        INTC_IRQ(IIC31_STPI, 164), INTC_IRQ(IIC31_NAKI, 165),
+        INTC_IRQ(IIC31_RXI, 166), INTC_IRQ(IIC31_TXI, 167),
+        INTC_IRQ(IIC31_TEI, 168),
+
+        INTC_IRQ(IIC32_STPI, 170), INTC_IRQ(IIC32_NAKI, 171),
+        INTC_IRQ(IIC32_RXI, 172), INTC_IRQ(IIC32_TXI, 173),
+        INTC_IRQ(IIC32_TEI, 174),
+
+        INTC_IRQ(DMAC0_DMINT0, 176), INTC_IRQ(DMAC1_DMINT1, 177),
+        INTC_IRQ(DMAC2_DMINT2, 178), INTC_IRQ(DMAC3_DMINT3, 179),
+
+        INTC_IRQ(SCIF0_BRI, 180), INTC_IRQ(SCIF0_ERI, 181),
+        INTC_IRQ(SCIF0_RXI, 182), INTC_IRQ(SCIF0_TXI, 183),
+        INTC_IRQ(SCIF1_BRI, 184), INTC_IRQ(SCIF1_ERI, 185),
+        INTC_IRQ(SCIF1_RXI, 186), INTC_IRQ(SCIF1_TXI, 187),
+        INTC_IRQ(SCIF2_BRI, 188), INTC_IRQ(SCIF2_ERI, 189),
+        INTC_IRQ(SCIF2_RXI, 190), INTC_IRQ(SCIF2_TXI, 191),
+        INTC_IRQ(SCIF3_BRI, 192), INTC_IRQ(SCIF3_ERI, 193),
+        INTC_IRQ(SCIF3_RXI, 194), INTC_IRQ(SCIF3_TXI, 195),
+        INTC_IRQ(SCIF4_BRI, 196), INTC_IRQ(SCIF4_ERI, 197),
+        INTC_IRQ(SCIF4_RXI, 198), INTC_IRQ(SCIF4_TXI, 199),
+        INTC_IRQ(SCIF5_BRI, 200), INTC_IRQ(SCIF5_ERI, 201),
+        INTC_IRQ(SCIF5_RXI, 202), INTC_IRQ(SCIF5_TXI, 203),
+        INTC_IRQ(SCIF6_BRI, 204), INTC_IRQ(SCIF6_ERI, 205),
+        INTC_IRQ(SCIF6_RXI, 206), INTC_IRQ(SCIF6_TXI, 207),
+        INTC_IRQ(SCIF7_BRI, 208), INTC_IRQ(SCIF7_ERI, 209),
+        INTC_IRQ(SCIF7_RXI, 210), INTC_IRQ(SCIF7_TXI, 211),
+
+        INTC_IRQ(DMAC0_DMINTA, 212), INTC_IRQ(DMAC4_DMINT4, 216),
+        INTC_IRQ(DMAC5_DMINT5, 217), INTC_IRQ(DMAC6_DMINT6, 218),
+        INTC_IRQ(DMAC7_DMINT7, 219),
+
+        INTC_IRQ(RCAN0_ERS, 228), INTC_IRQ(RCAN0_OVR, 229),
+        INTC_IRQ(RCAN0_SLE, 230),
+        INTC_IRQ(RCAN0_RM0, 231), INTC_IRQ(RCAN0_RM1, 232),
+
+        INTC_IRQ(RCAN1_ERS, 234), INTC_IRQ(RCAN1_OVR, 235),
+        INTC_IRQ(RCAN1_SLE, 236),
+        INTC_IRQ(RCAN1_RM0, 237), INTC_IRQ(RCAN1_RM1, 238),
+
+        INTC_IRQ(SSI0_SSII, 244), INTC_IRQ(SSI1_SSII, 245),
+
+        INTC_IRQ(TMR0_CMIA0, 246), INTC_IRQ(TMR0_CMIB0, 247),
+        INTC_IRQ(TMR0_OVI0, 248),
+
+        INTC_IRQ(TMR1_CMIA1, 252), INTC_IRQ(TMR1_CMIB1, 253),
+        INTC_IRQ(TMR1_OVI1, 254),
+
+};
+
+static struct intc_group groups[] __initdata = {
+        INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
+                   PINT4, PINT5, PINT6, PINT7),
+        INTC_GROUP(MTU20_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
+        INTC_GROUP(MTU20_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
+
+        INTC_GROUP(MTU21_AB, MTU2_TGI1A, MTU2_TGI1B),
+        INTC_GROUP(MTU21_VU, MTU2_TCI1V, MTU2_TCI1U),
+        INTC_GROUP(MTU22_AB, MTU2_TGI2A, MTU2_TGI2B),
+        INTC_GROUP(MTU22_VU, MTU2_TCI2V, MTU2_TCI2U),
+        INTC_GROUP(MTU23_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
+        INTC_GROUP(MTU24_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
+        INTC_GROUP(MTU25_UVW, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
+        INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP ),
+
+        INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI,
+                   IIC30_TEI),
+        INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI,
+                   IIC31_TEI),
+        INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI,
+                   IIC32_TEI),
+
+        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
+        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
+        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
+        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
+        INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI),
+        INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI),
+        INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI),
+        INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI),
+
+        INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1,
+                   RCAN0_SLE),
+        INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1,
+                   RCAN1_SLE),
+
+        INTC_GROUP(TMR0, TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0),
+        INTC_GROUP(TMR1, TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1),
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+        { 0xfffe9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
+        { 0xfffe941a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
+        { 0xfffe9420, 0, 16, 4, /* IPR05 */ { PINT, 0, ADC_ADI, 0 } },
+        { 0xfffe9800, 0, 16, 4, /* IPR06 */ { 0, MTU20_ABCD, MTU20_VEF, MTU21_AB } },
+        { 0xfffe9802, 0, 16, 4, /* IPR07 */ { MTU21_VU, MTU22_AB, MTU22_VU,  MTU23_ABCD } },
+        { 0xfffe9804, 0, 16, 4, /* IPR08 */ { MTU2_TCI3V, MTU24_ABCD, MTU2_TCI4V, MTU25_UVW } },
+
+        { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
+        { 0xfffe9808, 0, 16, 4, /* IPR10 */ { IIC31, IIC32, DMAC0_DMINT0, DMAC1_DMINT1 } },
+        { 0xfffe980a, 0, 16, 4, /* IPR11 */ { DMAC2_DMINT2, DMAC3_DMINT3, SCIF0 , SCIF1 } },
+        { 0xfffe980c, 0, 16, 4, /* IPR12 */ { SCIF2, SCIF3, SCIF4, SCIF5 } },
+        { 0xfffe980e, 0, 16, 4, /* IPR13 */ { SCIF6, SCIF7, DMAC0_DMINTA, DMAC4_DMINT4  } },
+        { 0xfffe9810, 0, 16, 4, /* IPR14 */ { DMAC5_DMINT5, DMAC6_DMINT6, DMAC7_DMINT7, 0 } },
+        { 0xfffe9812, 0, 16, 4, /* IPR15 */ { 0, RCAN0, RCAN1, 0 } },
+        { 0xfffe9814, 0, 16, 4, /* IPR16 */ { SSI0_SSII, SSI1_SSII, TMR0, TMR1 } },
+};
+
+static struct intc_mask_reg mask_registers[] __initdata = {
+        { 0xfffe9408, 0, 16, /* PINTER */
+          { 0, 0, 0, 0, 0, 0, 0, 0,
+            PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
+                         mask_registers, prio_registers, NULL);
+
+static struct plat_sci_port sci_platform_data[] = {
+        {
+                .mapbase        = 0xfffe8000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 181, 182, 183, 180}
+        }, {
+                .mapbase        = 0xfffe8800,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 185, 186, 187, 184}
+        }, {
+                .mapbase        = 0xfffe9000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 189, 186, 187, 188}
+        }, {
+                .mapbase        = 0xfffe9800,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 193, 194, 195, 192}
+        }, {
+                .mapbase        = 0xfffea000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 196, 198, 199, 196}
+        }, {
+                .mapbase        = 0xfffea800,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 201, 202, 203, 200}
+        }, {
+                .mapbase        = 0xfffeb000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 205, 206, 207, 204}
+        }, {
+                .mapbase        = 0xfffeb800,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 209, 210, 211, 208}
+        }, {
+                .flags = 0,
+        }
+};
+
+static struct platform_device sci_device = {
+        .name           = "sh-sci",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = sci_platform_data,
+        },
+};
+
+static struct resource rtc_resources[] = {
+        [0] = {
+                .start  = 0xffff0800,
+                .end    = 0xffff2000 + 0x58 - 1,
+                .flags  = IORESOURCE_IO,
+        },
+        [1] = {
+                /* Period IRQ */
+                .start  = 153,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* Carry IRQ */
+                .start  = 154,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                /* Alarm IRQ */
+                .start  = 152,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device rtc_device = {
+        .name           = "sh-rtc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(rtc_resources),
+        .resource       = rtc_resources,
+};
+
+static struct platform_device *sh7201_devices[] __initdata = {
+        &sci_device,
+        &rtc_device,
+};
+
+static int __init sh7201_devices_setup(void)
+{
+        return platform_add_devices(sh7201_devices,
+                                    ARRAY_SIZE(sh7201_devices));
+}
+__initcall(sh7201_devices_setup);
+
+void __init plat_irq_setup(void)
+{
+        register_intc_controller(&intc_desc);
+}
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 3fe482dd05c1..b4106d0c68ec 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -52,7 +52,7 @@
  *      syscall #
  *
  */
-#if defined(CONFIG_KGDB_NMI)
+#if defined(CONFIG_KGDB)
 NMI_VEC = 0x1c0                 ! Must catch early for debounce
 #endif
 
@@ -307,7 +307,7 @@ skip_restore:
 6:      or      k0, k2                  ! Set the IMASK-bits
         ldc     k2, ssr
         !
-#if defined(CONFIG_KGDB_NMI)
+#if defined(CONFIG_KGDB)
         ! Clear in_nmi
         mov.l   6f, k0
         mov     #0, k1
@@ -320,7 +320,7 @@ skip_restore:
 
         .align  2
 5:      .long   0x00001000      ! DSP
-#ifdef CONFIG_KGDB_NMI
+#ifdef CONFIG_KGDB
 6:      .long   in_nmi
 #endif
 7:      .long   0x30000000
@@ -376,9 +376,9 @@ tlb_miss:
 !
         .balign         512,0,512
 interrupt:
-        mov.l   2f, k2
         mov.l   3f, k3
-#if defined(CONFIG_KGDB_NMI)
+#if defined(CONFIG_KGDB)
+        mov.l   2f, k2
         ! Debounce (filter nested NMI)
         mov.l   @k2, k0
         mov.l   5f, k1
@@ -390,16 +390,16 @@ interrupt:
         rte
          nop
         .align  2
+2:      .long   INTEVT
 5:      .long   NMI_VEC
 6:      .long   in_nmi
 0:
-#endif /* defined(CONFIG_KGDB_NMI) */
+#endif /* defined(CONFIG_KGDB) */
         bra     handle_exception
          mov    #-1, k2         ! interrupt exception marker
 
         .align  2
 1:      .long   EXPEVT
-2:      .long   INTEVT
 3:      .long   ret_from_irq
 4:      .long   ret_from_exception
 
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index dac429726899..e5a0de39a2db 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -26,7 +26,7 @@
 #define fpu_error_trap_handler          exception_error
 #endif
 
-#if !defined(CONFIG_KGDB_NMI)
+#if !defined(CONFIG_KGDB)
 #define kgdb_handle_exception           exception_error
 #endif
 
diff --git a/arch/sh/kernel/cpu/sh4/softfloat.c b/arch/sh/kernel/cpu/sh4/softfloat.c
index 2b747f3b02bd..42edf2e54e85 100644
--- a/arch/sh/kernel/cpu/sh4/softfloat.c
+++ b/arch/sh/kernel/cpu/sh4/softfloat.c
@@ -37,6 +37,7 @@
  */
 #include <linux/kernel.h>
 #include <cpu/fpu.h>
+#include <asm/div64.h>
 
 #define LIT64( a ) a##LL
 
@@ -67,16 +68,16 @@ typedef unsigned long long float64;
 extern void float_raise(unsigned int flags);    /* in fpu.c */
 extern int float_rounding_mode(void);   /* in fpu.c */
 
-inline bits64 extractFloat64Frac(float64 a);
-inline flag extractFloat64Sign(float64 a);
-inline int16 extractFloat64Exp(float64 a);
-inline int16 extractFloat32Exp(float32 a);
-inline flag extractFloat32Sign(float32 a);
-inline bits32 extractFloat32Frac(float32 a);
-inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig);
-inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr);
-inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig);
-inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr);
+bits64 extractFloat64Frac(float64 a);
+flag extractFloat64Sign(float64 a);
+int16 extractFloat64Exp(float64 a);
+int16 extractFloat32Exp(float32 a);
+flag extractFloat32Sign(float32 a);
+bits32 extractFloat32Frac(float32 a);
+float64 packFloat64(flag zSign, int16 zExp, bits64 zSig);
+void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr);
+float32 packFloat32(flag zSign, int16 zExp, bits32 zSig);
+void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr);
 float64 float64_sub(float64 a, float64 b);
 float32 float32_sub(float32 a, float32 b);
 float32 float32_add(float32 a, float32 b);
@@ -86,11 +87,11 @@ float32 float32_div(float32 a, float32 b);
 float32 float32_mul(float32 a, float32 b);
 float64 float64_mul(float64 a, float64 b);
 float32 float64_to_float32(float64 a);
-inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
+void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
                    bits64 * z1Ptr);
-inline void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
+void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
                    bits64 * z1Ptr);
-inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr);
+void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr);
 
 static int8 countLeadingZeros32(bits32 a);
 static int8 countLeadingZeros64(bits64 a);
@@ -110,42 +111,42 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b);
 static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr,
                                       bits32 * zSigPtr);
 
-inline bits64 extractFloat64Frac(float64 a)
+bits64 extractFloat64Frac(float64 a)
 {
         return a & LIT64(0x000FFFFFFFFFFFFF);
 }
 
-inline flag extractFloat64Sign(float64 a)
+flag extractFloat64Sign(float64 a)
 {
         return a >> 63;
 }
 
-inline int16 extractFloat64Exp(float64 a)
+int16 extractFloat64Exp(float64 a)
 {
         return (a >> 52) & 0x7FF;
 }
 
-inline int16 extractFloat32Exp(float32 a)
+int16 extractFloat32Exp(float32 a)
 {
         return (a >> 23) & 0xFF;
 }
 
-inline flag extractFloat32Sign(float32 a)
+flag extractFloat32Sign(float32 a)
 {
         return a >> 31;
 }
 
-inline bits32 extractFloat32Frac(float32 a)
+bits32 extractFloat32Frac(float32 a)
 {
         return a & 0x007FFFFF;
 }
 
-inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig)
+float64 packFloat64(flag zSign, int16 zExp, bits64 zSig)
 {
         return (((bits64) zSign) << 63) + (((bits64) zExp) << 52) + zSig;
 }
 
-inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr)
+void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr)
 {
         bits64 z;
 
@@ -338,12 +339,12 @@ static float64 addFloat64Sigs(float64 a, float64 b, flag zSign)
 
 }
 
-inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig)
+float32 packFloat32(flag zSign, int16 zExp, bits32 zSig)
 {
         return (((bits32) zSign) << 31) + (((bits32) zExp) << 23) + zSig;
 }
 
-inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr)
+void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr)
 {
         bits32 z;
         if (count == 0) {
@@ -634,7 +635,7 @@ normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr, bits64 * zSigPtr)
         *zExpPtr = 1 - shiftCount;
 }
 
-inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
+void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
                    bits64 * z1Ptr)
 {
         bits64 z1;
@@ -644,7 +645,7 @@ inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
         *z0Ptr = a0 + b0 + (z1 < a1);
 }
 
-inline void
+void
 sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
        bits64 * z1Ptr)
 {
@@ -656,11 +657,14 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b)
 {
         bits64 b0, b1;
         bits64 rem0, rem1, term0, term1;
-        bits64 z;
+        bits64 z, tmp;
         if (b <= a0)
                 return LIT64(0xFFFFFFFFFFFFFFFF);
         b0 = b >> 32;
-        z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : (a0 / b0) << 32;
+        tmp = a0;
+        do_div(tmp, b0);
+
+        z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : tmp << 32;
         mul64To128(b, z, &term0, &term1);
         sub128(a0, a1, term0, term1, &rem0, &rem1);
         while (((sbits64) rem0) < 0) {
@@ -669,11 +673,13 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b)
                 add128(rem0, rem1, b0, b1, &rem0, &rem1);
         }
         rem0 = (rem0 << 32) | (rem1 >> 32);
-        z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : rem0 / b0;
+        tmp = rem0;
+        do_div(tmp, b0);
+        z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : tmp;
         return z;
 }
 
-inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr)
+void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr)
 {
         bits32 aHigh, aLow, bHigh, bLow;
         bits64 z0, zMiddleA, zMiddleB, z1;
@@ -769,7 +775,8 @@ float32 float32_div(float32 a, float32 b)
 {
         flag aSign, bSign, zSign;
         int16 aExp, bExp, zExp;
-        bits32 aSig, bSig, zSig;
+        bits32 aSig, bSig;
+        uint64_t zSig;
 
         aSig = extractFloat32Frac(a);
         aExp = extractFloat32Exp(a);
@@ -804,11 +811,13 @@ float32 float32_div(float32 a, float32 b)
                 aSig >>= 1;
                 ++zExp;
         }
-        zSig = (((bits64) aSig) << 32) / bSig;
+        zSig = (((bits64) aSig) << 32);
+        do_div(zSig, bSig);
+
         if ((zSig & 0x3F) == 0) {
                 zSig |= (((bits64) bSig) * zSig != ((bits64) aSig) << 32);
         }
-        return roundAndPackFloat32(zSign, zExp, zSig);
+        return roundAndPackFloat32(zSign, zExp, (bits32)zSig);
 
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index db913855c2fd..0e174af21874 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -229,7 +229,7 @@ struct frqcr_context sh7722_get_clk_context(const char *name)
 }
 
 /**
- * sh7722_find_divisors - find divisor for setting rate
+ * sh7722_find_div_index - find divisor for setting rate
  *
  * All sh7722 clocks use the same set of multipliers/divisors. This function
  * chooses correct divisor to set the rate of clock with parent clock that
@@ -238,7 +238,7 @@ struct frqcr_context sh7722_get_clk_context(const char *name)
  * @parent_rate: rate of parent clock
  * @rate: requested rate to be set
  */
-static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate)
+static int sh7722_find_div_index(unsigned long parent_rate, unsigned rate)
 {
         unsigned div2 = parent_rate * 2 / rate;
         int index;
@@ -247,12 +247,12 @@ static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate)
                 return -EINVAL;
 
         for (index = 1; index < ARRAY_SIZE(divisors2); index++) {
-                if (div2 > divisors2[index] && div2 <= divisors2[index])
+                if (div2 > divisors2[index - 1] && div2 <= divisors2[index])
                         break;
         }
         if (index >= ARRAY_SIZE(divisors2))
                 index = ARRAY_SIZE(divisors2) - 1;
-        return divisors2[index];
+        return index;
 }
 
 static void sh7722_frqcr_recalc(struct clk *clk)
@@ -279,12 +279,12 @@ static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate,
                 return -EINVAL;
 
         /* look for multiplier/divisor pair */
-        div = sh7722_find_divisors(parent_rate, rate);
+        div = sh7722_find_div_index(parent_rate, rate);
         if (div<0)
                 return div;
 
         /* calculate new value of clock rate */
-        clk->rate = parent_rate * 2 / div;
+        clk->rate = parent_rate * 2 / divisors2[div];
         frqcr = ctrl_inl(FRQCR);
 
         /* FIXME: adjust as algo_id specifies */
@@ -353,7 +353,7 @@ static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate,
                         int part_div;
 
                         if (likely(!err)) {
-                                part_div = sh7722_find_divisors(parent_rate,
+                                part_div = sh7722_find_div_index(parent_rate,
                                                                 rate);
                                 if (part_div > 0) {
                                         part_ctx = sh7722_get_clk_context(
@@ -394,12 +394,12 @@ static long sh7722_frqcr_round_rate(struct clk *clk, unsigned long rate)
         int div;
 
         /* look for multiplier/divisor pair */
-        div = sh7722_find_divisors(parent_rate, rate);
+        div = sh7722_find_div_index(parent_rate, rate);
         if (div < 0)
                 return clk->rate;
 
         /* calculate new value of clock rate */
-        return parent_rate * 2 / div;
+        return parent_rate * 2 / divisors2[div];
 }
 
 static struct clk_ops sh7722_frqcr_clk_ops = {
@@ -421,7 +421,7 @@ static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
         int div;
 
         r = ctrl_inl(clk->arch_flags);
-        div = sh7722_find_divisors(clk->parent->rate, rate);
+        div = sh7722_find_div_index(clk->parent->rate, rate);
         if (div < 0)
                 return div;
         r = (r & ~0xF) | div;
@@ -516,16 +516,19 @@ static struct clk_ops sh7722_video_clk_ops = {
 static struct clk sh7722_umem_clock = {
         .name = "umem_clk",
         .ops = &sh7722_frqcr_clk_ops,
+        .flags = CLK_RATE_PROPAGATES,
 };
 
 static struct clk sh7722_sh_clock = {
         .name = "sh_clk",
         .ops = &sh7722_frqcr_clk_ops,
+        .flags = CLK_RATE_PROPAGATES,
 };
 
 static struct clk sh7722_peripheral_clock = {
         .name = "peripheral_clk",
         .ops = &sh7722_frqcr_clk_ops,
+        .flags = CLK_RATE_PROPAGATES,
 };
 
 static struct clk sh7722_sdram_clock = {
@@ -533,6 +536,11 @@ static struct clk sh7722_sdram_clock = {
         .ops = &sh7722_frqcr_clk_ops,
 };
 
+static struct clk sh7722_r_clock = {
+        .name = "r_clk",
+        .rate = 32768,
+        .flags = CLK_RATE_PROPAGATES,
+};
 
 #ifndef CONFIG_CPU_SUBTYPE_SH7343
 
@@ -567,12 +575,30 @@ static struct clk sh7722_video_clock = {
         .ops = &sh7722_video_clk_ops,
 };
 
-static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg,
-                                    int enable)
+#define MSTPCR_ARCH_FLAGS(reg, bit) (((reg) << 8) | (bit))
+#define MSTPCR_ARCH_FLAGS_REG(value) ((value) >> 8)
+#define MSTPCR_ARCH_FLAGS_BIT(value) ((value) & 0xff)
+
+static int sh7722_mstpcr_start_stop(struct clk *clk, int enable)
 {
-        unsigned long bit = clk->arch_flags;
+        unsigned long bit = MSTPCR_ARCH_FLAGS_BIT(clk->arch_flags);
+        unsigned long reg;
         unsigned long r;
 
+        switch(MSTPCR_ARCH_FLAGS_REG(clk->arch_flags)) {
+        case 0:
+                reg = MSTPCR0;
+                break;
+        case 1:
+                reg = MSTPCR1;
+                break;
+        case 2:
+                reg = MSTPCR2;
+                break;
+        default:
+                return -EINVAL;
+        }  
+
         r = ctrl_inl(reg);
 
         if (enable)
@@ -584,96 +610,175 @@ static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg,
         return 0;
 }
 
-static void sh7722_mstpcr0_enable(struct clk *clk)
-{
-        sh7722_mstpcr_start_stop(clk, MSTPCR0, 1);
-}
-
-static void sh7722_mstpcr0_disable(struct clk *clk)
-{
-        sh7722_mstpcr_start_stop(clk, MSTPCR0, 0);
-}
-
-static void sh7722_mstpcr1_enable(struct clk *clk)
-{
-        sh7722_mstpcr_start_stop(clk, MSTPCR1, 1);
-}
-
-static void sh7722_mstpcr1_disable(struct clk *clk)
+static void sh7722_mstpcr_enable(struct clk *clk)
 {
-        sh7722_mstpcr_start_stop(clk, MSTPCR1, 0);
+        sh7722_mstpcr_start_stop(clk, 1);
 }
 
-static void sh7722_mstpcr2_enable(struct clk *clk)
+static void sh7722_mstpcr_disable(struct clk *clk)
 {
-        sh7722_mstpcr_start_stop(clk, MSTPCR2, 1);
+        sh7722_mstpcr_start_stop(clk, 0);
 }
 
-static void sh7722_mstpcr2_disable(struct clk *clk)
+static void sh7722_mstpcr_recalc(struct clk *clk)
 {
-        sh7722_mstpcr_start_stop(clk, MSTPCR2, 0);
+        if (clk->parent)
+                clk->rate = clk->parent->rate;
 }
 
-static struct clk_ops sh7722_mstpcr0_clk_ops = {
-        .enable = sh7722_mstpcr0_enable,
-        .disable = sh7722_mstpcr0_disable,
-};
-
-static struct clk_ops sh7722_mstpcr1_clk_ops = {
-        .enable = sh7722_mstpcr1_enable,
-        .disable = sh7722_mstpcr1_disable,
+static struct clk_ops sh7722_mstpcr_clk_ops = {
+        .enable = sh7722_mstpcr_enable,
+        .disable = sh7722_mstpcr_disable,
+        .recalc = sh7722_mstpcr_recalc,
 };
 
-static struct clk_ops sh7722_mstpcr2_clk_ops = {
-        .enable = sh7722_mstpcr2_enable,
-        .disable = sh7722_mstpcr2_disable,
-};
-
-#define DECLARE_MSTPCRN(regnr, bitnr, bitstr)           \
-{                                                       \
-        .name = "mstp" __stringify(regnr) bitstr,       \
-        .arch_flags = bitnr,                            \
-        .ops = &sh7722_mstpcr ## regnr ## _clk_ops,     \
+#define MSTPCR(_name, _parent, regnr, bitnr) \
+{                                               \
+        .name = _name,                          \
+        .arch_flags = MSTPCR_ARCH_FLAGS(regnr, bitnr),  \
+        .ops = (void *)_parent,         \
 }
 
-#define DECLARE_MSTPCR(regnr) \
-        DECLARE_MSTPCRN(regnr, 31, "31"), \
-        DECLARE_MSTPCRN(regnr, 30, "30"), \
-        DECLARE_MSTPCRN(regnr, 29, "29"), \
-        DECLARE_MSTPCRN(regnr, 28, "28"), \
-        DECLARE_MSTPCRN(regnr, 27, "27"), \
-        DECLARE_MSTPCRN(regnr, 26, "26"), \
-        DECLARE_MSTPCRN(regnr, 25, "25"), \
-        DECLARE_MSTPCRN(regnr, 24, "24"), \
-        DECLARE_MSTPCRN(regnr, 23, "23"), \
-        DECLARE_MSTPCRN(regnr, 22, "22"), \
-        DECLARE_MSTPCRN(regnr, 21, "21"), \
-        DECLARE_MSTPCRN(regnr, 20, "20"), \
-        DECLARE_MSTPCRN(regnr, 19, "19"), \
-        DECLARE_MSTPCRN(regnr, 18, "18"), \
-        DECLARE_MSTPCRN(regnr, 17, "17"), \
-        DECLARE_MSTPCRN(regnr, 16, "16"), \
-        DECLARE_MSTPCRN(regnr, 15, "15"), \
-        DECLARE_MSTPCRN(regnr, 14, "14"), \
-        DECLARE_MSTPCRN(regnr, 13, "13"), \
-        DECLARE_MSTPCRN(regnr, 12, "12"), \
-        DECLARE_MSTPCRN(regnr, 11, "11"), \
-        DECLARE_MSTPCRN(regnr, 10, "10"), \
-        DECLARE_MSTPCRN(regnr, 9, "09"), \
-        DECLARE_MSTPCRN(regnr, 8, "08"), \
-        DECLARE_MSTPCRN(regnr, 7, "07"), \
-        DECLARE_MSTPCRN(regnr, 6, "06"), \
-        DECLARE_MSTPCRN(regnr, 5, "05"), \
-        DECLARE_MSTPCRN(regnr, 4, "04"), \
-        DECLARE_MSTPCRN(regnr, 3, "03"), \
-        DECLARE_MSTPCRN(regnr, 2, "02"), \
-        DECLARE_MSTPCRN(regnr, 1, "01"), \
-        DECLARE_MSTPCRN(regnr, 0, "00")
-
-static struct clk sh7722_mstpcr[] = {
-        DECLARE_MSTPCR(0),
-        DECLARE_MSTPCR(1),
-        DECLARE_MSTPCR(2),
+static struct clk sh7722_mstpcr_clocks[] = {
+#if defined(CONFIG_CPU_SUBTYPE_SH7722)
+        MSTPCR("uram0", "umem_clk", 0, 28),
+        MSTPCR("xymem0", "bus_clk", 0, 26),
+        MSTPCR("tmu0", "peripheral_clk", 0, 15),
+        MSTPCR("cmt0", "r_clk", 0, 14),
+        MSTPCR("rwdt0", "r_clk", 0, 13),
+        MSTPCR("flctl0", "peripheral_clk", 0, 10),
+        MSTPCR("scif0", "peripheral_clk", 0, 7),
+        MSTPCR("scif1", "peripheral_clk", 0, 6),
+        MSTPCR("scif2", "peripheral_clk", 0, 5),
+        MSTPCR("i2c0", "peripheral_clk", 1, 9),
+        MSTPCR("rtc0", "r_clk", 1, 8),
+        MSTPCR("sdhi0", "peripheral_clk", 2, 18),
+        MSTPCR("keysc0", "r_clk", 2, 14),
+        MSTPCR("usbf0", "peripheral_clk", 2, 11),
+        MSTPCR("2dg0", "bus_clk", 2, 9),
+        MSTPCR("siu0", "bus_clk", 2, 8),
+        MSTPCR("vou0", "bus_clk", 2, 5),
+        MSTPCR("jpu0", "bus_clk", 2, 6),
+        MSTPCR("beu0", "bus_clk", 2, 4),
+        MSTPCR("ceu0", "bus_clk", 2, 3),
+        MSTPCR("veu0", "bus_clk", 2, 2),
+        MSTPCR("vpu0", "bus_clk", 2, 1),
+        MSTPCR("lcdc0", "bus_clk", 2, 0),
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)
+        /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
+        MSTPCR("tlb0", "cpu_clk", 0, 31),
+        MSTPCR("ic0", "cpu_clk", 0, 30),
+        MSTPCR("oc0", "cpu_clk", 0, 29),
+        MSTPCR("l2c0", "sh_clk", 0, 28),
+        MSTPCR("ilmem0", "cpu_clk", 0, 27),
+        MSTPCR("fpu0", "cpu_clk", 0, 24),
+        MSTPCR("intc0", "cpu_clk", 0, 22),
+        MSTPCR("dmac0", "bus_clk", 0, 21),
+        MSTPCR("sh0", "sh_clk", 0, 20),
+        MSTPCR("hudi0", "peripheral_clk", 0, 19),
+        MSTPCR("ubc0", "cpu_clk", 0, 17),
+        MSTPCR("tmu0", "peripheral_clk", 0, 15),
+        MSTPCR("cmt0", "r_clk", 0, 14),
+        MSTPCR("rwdt0", "r_clk", 0, 13),
+        MSTPCR("dmac1", "bus_clk", 0, 12),
+        MSTPCR("tmu1", "peripheral_clk", 0, 11),
+        MSTPCR("flctl0", "peripheral_clk", 0, 10),
+        MSTPCR("scif0", "peripheral_clk", 0, 9),
+        MSTPCR("scif1", "peripheral_clk", 0, 8),
+        MSTPCR("scif2", "peripheral_clk", 0, 7),
+        MSTPCR("scif3", "bus_clk", 0, 6),
+        MSTPCR("scif4", "bus_clk", 0, 5),
+        MSTPCR("scif5", "bus_clk", 0, 4),
+        MSTPCR("msiof0", "bus_clk", 0, 2),
+        MSTPCR("msiof1", "bus_clk", 0, 1),
+        MSTPCR("meram0", "sh_clk", 0, 0),
+        MSTPCR("i2c0", "peripheral_clk", 1, 9),
+        MSTPCR("rtc0", "r_clk", 1, 8),
+        MSTPCR("atapi0", "sh_clk", 2, 28),
+        MSTPCR("adc0", "peripheral_clk", 2, 28),
+        MSTPCR("tpu0", "bus_clk", 2, 25),
+        MSTPCR("irda0", "peripheral_clk", 2, 24),
+        MSTPCR("tsif0", "bus_clk", 2, 22),
+        MSTPCR("icb0", "bus_clk", 2, 21),
+        MSTPCR("sdhi0", "bus_clk", 2, 18),
+        MSTPCR("sdhi1", "bus_clk", 2, 17),
+        MSTPCR("keysc0", "r_clk", 2, 14),
+        MSTPCR("usb0", "bus_clk", 2, 11),
+        MSTPCR("2dg0", "bus_clk", 2, 10),
+        MSTPCR("siu0", "bus_clk", 2, 8),
+        MSTPCR("veu1", "bus_clk", 2, 6),
+        MSTPCR("vou0", "bus_clk", 2, 5),
+        MSTPCR("beu0", "bus_clk", 2, 4),
+        MSTPCR("ceu0", "bus_clk", 2, 3),
+        MSTPCR("veu0", "bus_clk", 2, 2),
+        MSTPCR("vpu0", "bus_clk", 2, 1),
+        MSTPCR("lcdc0", "bus_clk", 2, 0),
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7343)
+        MSTPCR("uram0", "umem_clk", 0, 28),
+        MSTPCR("xymem0", "bus_clk", 0, 26),
+        MSTPCR("tmu0", "peripheral_clk", 0, 15),
+        MSTPCR("cmt0", "r_clk", 0, 14),
+        MSTPCR("rwdt0", "r_clk", 0, 13),
+        MSTPCR("scif0", "peripheral_clk", 0, 7),
+        MSTPCR("scif1", "peripheral_clk", 0, 6),
+        MSTPCR("scif2", "peripheral_clk", 0, 5),
+        MSTPCR("scif3", "peripheral_clk", 0, 4),
+        MSTPCR("i2c0", "peripheral_clk", 1, 9),
+        MSTPCR("i2c1", "peripheral_clk", 1, 8),
+        MSTPCR("sdhi0", "peripheral_clk", 2, 18),
+        MSTPCR("keysc0", "r_clk", 2, 14),
+        MSTPCR("usbf0", "peripheral_clk", 2, 11),
+        MSTPCR("siu0", "bus_clk", 2, 8),
+        MSTPCR("jpu0", "bus_clk", 2, 6),
+        MSTPCR("vou0", "bus_clk", 2, 5),
+        MSTPCR("beu0", "bus_clk", 2, 4),
+        MSTPCR("ceu0", "bus_clk", 2, 3),
+        MSTPCR("veu0", "bus_clk", 2, 2),
+        MSTPCR("vpu0", "bus_clk", 2, 1),
+        MSTPCR("lcdc0", "bus_clk", 2, 0),
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7366)
+        /* See page 52 of Datasheet V0.40: Overview -> Block Diagram */
+        MSTPCR("tlb0", "cpu_clk", 0, 31),
+        MSTPCR("ic0", "cpu_clk", 0, 30),
+        MSTPCR("oc0", "cpu_clk", 0, 29),
+        MSTPCR("rsmem0", "sh_clk", 0, 28),
+        MSTPCR("xymem0", "cpu_clk", 0, 26),
+        MSTPCR("intc30", "peripheral_clk", 0, 23),
+        MSTPCR("intc0", "peripheral_clk", 0, 22),
+        MSTPCR("dmac0", "bus_clk", 0, 21),
+        MSTPCR("sh0", "sh_clk", 0, 20),
+        MSTPCR("hudi0", "peripheral_clk", 0, 19),
+        MSTPCR("ubc0", "cpu_clk", 0, 17),
+        MSTPCR("tmu0", "peripheral_clk", 0, 15),
+        MSTPCR("cmt0", "r_clk", 0, 14),
+        MSTPCR("rwdt0", "r_clk", 0, 13),
+        MSTPCR("flctl0", "peripheral_clk", 0, 10),
+        MSTPCR("scif0", "peripheral_clk", 0, 7),
+        MSTPCR("scif1", "bus_clk", 0, 6),
+        MSTPCR("scif2", "bus_clk", 0, 5),
+        MSTPCR("msiof0", "peripheral_clk", 0, 2),
+        MSTPCR("sbr0", "peripheral_clk", 0, 1),
+        MSTPCR("i2c0", "peripheral_clk", 1, 9),
+        MSTPCR("icb0", "bus_clk", 2, 27),
+        MSTPCR("meram0", "sh_clk", 2, 26),
+        MSTPCR("dacc0", "peripheral_clk", 2, 24),
+        MSTPCR("dacy0", "peripheral_clk", 2, 23),
+        MSTPCR("tsif0", "bus_clk", 2, 22),
+        MSTPCR("sdhi0", "bus_clk", 2, 18),
+        MSTPCR("mmcif0", "bus_clk", 2, 17),
+        MSTPCR("usb0", "bus_clk", 2, 11),
+        MSTPCR("siu0", "bus_clk", 2, 8),
+        MSTPCR("veu1", "bus_clk", 2, 7),
+        MSTPCR("vou0", "bus_clk", 2, 5),
+        MSTPCR("beu0", "bus_clk", 2, 4),
+        MSTPCR("ceu0", "bus_clk", 2, 3),
+        MSTPCR("veu0", "bus_clk", 2, 2),
+        MSTPCR("vpu0", "bus_clk", 2, 1),
+        MSTPCR("lcdc0", "bus_clk", 2, 0),
+#endif
 };
 
 static struct clk *sh7722_clocks[] = {
@@ -710,21 +815,30 @@ arch_init_clk_ops(struct clk_ops **ops, int type)
 
 int __init arch_clk_init(void)
 {
-        struct clk *master;
+        struct clk *clk;
         int i;
 
-        master = clk_get(NULL, "master_clk");
+        clk = clk_get(NULL, "master_clk");
         for (i = 0; i < ARRAY_SIZE(sh7722_clocks); i++) {
                 pr_debug( "Registering clock '%s'\n", sh7722_clocks[i]->name);
-                sh7722_clocks[i]->parent = master;
+                sh7722_clocks[i]->parent = clk;
                 clk_register(sh7722_clocks[i]);
         }
-        clk_put(master);
-
-        for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr); i++) {
-                pr_debug( "Registering mstpcr '%s'\n", sh7722_mstpcr[i].name);
-                clk_register(&sh7722_mstpcr[i]);
+        clk_put(clk);
+
+        clk_register(&sh7722_r_clock);
+
+        for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr_clocks); i++) {
+                pr_debug( "Registering mstpcr clock '%s'\n",
+                          sh7722_mstpcr_clocks[i].name);
+                clk = clk_get(NULL, (void *) sh7722_mstpcr_clocks[i].ops);
+                sh7722_mstpcr_clocks[i].parent = clk;
+                sh7722_mstpcr_clocks[i].ops = &sh7722_mstpcr_clk_ops;
+                clk_register(&sh7722_mstpcr_clocks[i]);
+                clk_put(clk);
         }
 
+        clk_recalc_rate(&sh7722_r_clock); /* make sure rate gets propagated */
+
         return 0;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 78881b4214da..0623e377f488 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -30,6 +30,7 @@ static struct resource iic0_resources[] = {
 
 static struct platform_device iic0_device = {
         .name           = "i2c-sh_mobile",
+        .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic0_resources),
         .resource       = iic0_resources,
 };
@@ -50,6 +51,7 @@ static struct resource iic1_resources[] = {
 
 static struct platform_device iic1_device = {
         .name           = "i2c-sh_mobile",
+        .id             = 1, /* "i2c1" clock */
         .num_resources  = ARRAY_SIZE(iic1_resources),
         .resource       = iic1_resources,
 };
@@ -115,7 +117,22 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 80, 81, 83, 82 },
+                .irqs           = { 80, 80, 80, 80 },
+        }, {
+                .mapbase        = 0xffe10000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 81, 81, 81, 81 },
+        }, {
+                .mapbase        = 0xffe20000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 82, 82, 82, 82 },
+        }, {
+                .mapbase        = 0xffe30000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 83, 83, 83, 83 },
         }, {
                 .flags = 0,
         }
@@ -139,18 +156,10 @@ static struct platform_device *sh7343_devices[] __initdata = {
 
 static int __init sh7343_devices_setup(void)
 {
-        clk_always_enable("mstp031"); /* TLB */
-        clk_always_enable("mstp030"); /* IC */
-        clk_always_enable("mstp029"); /* OC */
-        clk_always_enable("mstp028"); /* URAM */
-        clk_always_enable("mstp026"); /* XYMEM */
-        clk_always_enable("mstp023"); /* INTC3 */
-        clk_always_enable("mstp022"); /* INTC */
-        clk_always_enable("mstp020"); /* SuperHyway */
-        clk_always_enable("mstp109"); /* I2C0 */
-        clk_always_enable("mstp108"); /* I2C1 */
-        clk_always_enable("mstp202"); /* VEU */
-        clk_always_enable("mstp201"); /* VPU */
+        clk_always_enable("uram0"); /* URAM */
+        clk_always_enable("xymem0"); /* XYMEM */
+        clk_always_enable("veu0"); /* VEU */
+        clk_always_enable("vpu0"); /* VPU */
 
         platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
         platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
@@ -171,7 +180,7 @@ enum {
         MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY,
         DMAC4, DMAC5, DMAC_DADERR,
         KEYSC,
-        SCIF, SCIF1, SCIF2, SCIF3, SCIF4,
+        SCIF, SCIF1, SCIF2, SCIF3,
         SIOF0, SIOF1, SIO,
         FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
         I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index e17db39b97aa..839ae97a7fd2 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -32,6 +32,7 @@ static struct resource iic_resources[] = {
 
 static struct platform_device iic_device = {
         .name           = "i2c-sh_mobile",
+        .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic_resources),
         .resource       = iic_resources,
 };
@@ -176,19 +177,11 @@ static struct platform_device *sh7366_devices[] __initdata = {
 
 static int __init sh7366_devices_setup(void)
 {
-        clk_always_enable("mstp031"); /* TLB */
-        clk_always_enable("mstp030"); /* IC */
-        clk_always_enable("mstp029"); /* OC */
-        clk_always_enable("mstp028"); /* RSMEM */
-        clk_always_enable("mstp026"); /* XYMEM */
-        clk_always_enable("mstp023"); /* INTC3 */
-        clk_always_enable("mstp022"); /* INTC */
-        clk_always_enable("mstp020"); /* SuperHyway */
-        clk_always_enable("mstp109"); /* I2C */
-        clk_always_enable("mstp211"); /* USB */
-        clk_always_enable("mstp207"); /* VEU-2 */
-        clk_always_enable("mstp202"); /* VEU-1 */
-        clk_always_enable("mstp201"); /* VPU */
+        clk_always_enable("rsmem0"); /* RSMEM */
+        clk_always_enable("xymem0"); /* XYMEM */
+        clk_always_enable("veu1"); /* VEU-2 */
+        clk_always_enable("veu0"); /* VEU-1 */
+        clk_always_enable("vpu0"); /* VPU */
 
         platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
         platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index ef77ee1d9f53..50cf6838ec41 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -62,7 +62,7 @@ static struct resource usbf_resources[] = {
 
 static struct platform_device usbf_device = {
         .name           = "m66592_udc",
-        .id             = -1,
+        .id             = 0, /* "usbf0" clock */
         .dev = {
                 .dma_mask               = NULL,
                 .coherent_dma_mask      = 0xffffffff,
@@ -87,6 +87,7 @@ static struct resource iic_resources[] = {
 
 static struct platform_device iic_device = {
         .name           = "i2c-sh_mobile",
+        .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic_resources),
         .resource       = iic_resources,
 };
@@ -147,6 +148,34 @@ static struct platform_device veu_device = {
         .num_resources  = ARRAY_SIZE(veu_resources),
 };
 
+static struct uio_info jpu_platform_data = {
+        .name = "JPU",
+        .version = "0",
+        .irq = 27,
+};
+
+static struct resource jpu_resources[] = {
+        [0] = {
+                .name   = "JPU",
+                .start  = 0xfea00000,
+                .end    = 0xfea102d0,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device jpu_device = {
+        .name           = "uio_pdrv_genirq",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &jpu_platform_data,
+        },
+        .resource       = jpu_resources,
+        .num_resources  = ARRAY_SIZE(jpu_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -186,24 +215,21 @@ static struct platform_device *sh7722_devices[] __initdata = {
         &sci_device,
         &vpu_device,
         &veu_device,
+        &jpu_device,
 };
 
 static int __init sh7722_devices_setup(void)
 {
-        clk_always_enable("mstp031"); /* TLB */
-        clk_always_enable("mstp030"); /* IC */
-        clk_always_enable("mstp029"); /* OC */
-        clk_always_enable("mstp028"); /* URAM */
-        clk_always_enable("mstp026"); /* XYMEM */
-        clk_always_enable("mstp022"); /* INTC */
-        clk_always_enable("mstp020"); /* SuperHyway */
-        clk_always_enable("mstp109"); /* I2C */
-        clk_always_enable("mstp211"); /* USB */
-        clk_always_enable("mstp202"); /* VEU */
-        clk_always_enable("mstp201"); /* VPU */
+        clk_always_enable("uram0"); /* URAM */
+        clk_always_enable("xymem0"); /* XYMEM */
+        clk_always_enable("rtc0"); /* RTC */
+        clk_always_enable("veu0"); /* VEU */
+        clk_always_enable("vpu0"); /* VPU */
+        clk_always_enable("jpu0"); /* JPU */
 
         platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
         platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
+        platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20);
 
         return platform_add_devices(sh7722_devices,
                                     ARRAY_SIZE(sh7722_devices));
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 6d9e6972cfc9..849770d780ae 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -215,6 +215,7 @@ static struct resource iic_resources[] = {
 
 static struct platform_device iic_device = {
         .name           = "i2c-sh_mobile",
+        .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic_resources),
         .resource       = iic_resources,
 };
@@ -231,19 +232,11 @@ static struct platform_device *sh7723_devices[] __initdata = {
 
 static int __init sh7723_devices_setup(void)
 {
-        clk_always_enable("mstp031"); /* TLB */
-        clk_always_enable("mstp030"); /* IC */
-        clk_always_enable("mstp029"); /* OC */
-        clk_always_enable("mstp024"); /* FPU */
-        clk_always_enable("mstp022"); /* INTC */
-        clk_always_enable("mstp020"); /* SuperHyway */
-        clk_always_enable("mstp000"); /* MERAM */
-        clk_always_enable("mstp109"); /* I2C */
-        clk_always_enable("mstp108"); /* RTC */
-        clk_always_enable("mstp211"); /* USB */
-        clk_always_enable("mstp206"); /* VEU2H1 */
-        clk_always_enable("mstp202"); /* VEU2H0 */
-        clk_always_enable("mstp201"); /* VPU */
+        clk_always_enable("meram0"); /* MERAM */
+        clk_always_enable("rtc0"); /* RTC */
+        clk_always_enable("veu1"); /* VEU2H1 */
+        clk_always_enable("veu0"); /* VEU2H0 */
+        clk_always_enable("vpu0"); /* VPU */
 
         platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
         platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
diff --git a/arch/sh/kernel/debugtraps.S b/arch/sh/kernel/debugtraps.S
index 13b66746410a..591741383ee6 100644
--- a/arch/sh/kernel/debugtraps.S
+++ b/arch/sh/kernel/debugtraps.S
@@ -3,7 +3,7 @@
  *
  * Debug trap jump tables for SuperH
  *
- *  Copyright (C) 2006  Paul Mundt
+ *  Copyright (C) 2006 - 2008  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -12,12 +12,13 @@
 #include <linux/sys.h>
 #include <linux/linkage.h>
 
-#if !defined(CONFIG_SH_KGDB)
-#define kgdb_handle_exception   debug_trap_handler
+#if !defined(CONFIG_KGDB)
+#define breakpoint_trap_handler         debug_trap_handler
+#define singlestep_trap_handler         debug_trap_handler
 #endif
 
 #if !defined(CONFIG_SH_STANDARD_BIOS)
-#define sh_bios_handler         debug_trap_handler
+#define sh_bios_handler                 debug_trap_handler
 #endif
 
         .data
@@ -35,7 +36,7 @@ ENTRY(debug_trap_table)
         .long debug_trap_handler        /* 0x39 */
         .long debug_trap_handler        /* 0x3a */
         .long debug_trap_handler        /* 0x3b */
-        .long kgdb_handle_exception     /* 0x3c */
-        .long debug_trap_handler        /* 0x3d */
+        .long breakpoint_trap_handler   /* 0x3c */
+        .long singlestep_trap_handler   /* 0x3d */
         .long bug_trap_handler          /* 0x3e */
         .long sh_bios_handler           /* 0x3f */
diff --git a/arch/sh/kernel/disassemble.c b/arch/sh/kernel/disassemble.c
new file mode 100644
index 000000000000..64d5d8dded7c
--- /dev/null
+++ b/arch/sh/kernel/disassemble.c
@@ -0,0 +1,573 @@
+/*
+ * Disassemble SuperH instructions.
+ *
+ * Copyright (C) 1999 kaz Kojima
+ * Copyright (C) 2008 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/uaccess.h>
+
+/*
+ * Format of an instruction in memory.
+ */
+typedef enum {
+        HEX_0, HEX_1, HEX_2, HEX_3, HEX_4, HEX_5, HEX_6, HEX_7,
+        HEX_8, HEX_9, HEX_A, HEX_B, HEX_C, HEX_D, HEX_E, HEX_F,
+        REG_N, REG_M, REG_NM, REG_B,
+        BRANCH_12, BRANCH_8,
+        DISP_8, DISP_4,
+        IMM_4, IMM_4BY2, IMM_4BY4, PCRELIMM_8BY2, PCRELIMM_8BY4,
+        IMM_8, IMM_8BY2, IMM_8BY4,
+} sh_nibble_type;
+
+typedef enum {
+        A_END, A_BDISP12, A_BDISP8,
+        A_DEC_M, A_DEC_N,
+        A_DISP_GBR, A_DISP_PC, A_DISP_REG_M, A_DISP_REG_N,
+        A_GBR,
+        A_IMM,
+        A_INC_M, A_INC_N,
+        A_IND_M, A_IND_N, A_IND_R0_REG_M, A_IND_R0_REG_N,
+        A_MACH, A_MACL,
+        A_PR, A_R0, A_R0_GBR, A_REG_M, A_REG_N, A_REG_B,
+        A_SR, A_VBR, A_SSR, A_SPC, A_SGR, A_DBR,
+        F_REG_N, F_REG_M, D_REG_N, D_REG_M,
+        X_REG_N, /* Only used for argument parsing */
+        X_REG_M, /* Only used for argument parsing */
+        DX_REG_N, DX_REG_M, V_REG_N, V_REG_M,
+        FD_REG_N,
+        XMTRX_M4,
+        F_FR0,
+        FPUL_N, FPUL_M, FPSCR_N, FPSCR_M,
+} sh_arg_type;
+
+static struct sh_opcode_info {
+        char *name;
+        sh_arg_type arg[7];
+        sh_nibble_type nibbles[4];
+} sh_table[] = {
+        {"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM_8}},
+        {"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}},
+        {"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}},
+        {"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}},
+        {"and",{A_IMM,A_R0},{HEX_C,HEX_9,IMM_8}},
+        {"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}},
+        {"and.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_D,IMM_8}},
+        {"bra",{A_BDISP12},{HEX_A,BRANCH_12}},
+        {"bsr",{A_BDISP12},{HEX_B,BRANCH_12}},
+        {"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}},
+        {"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}},
+        {"bt.s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}},
+        {"bt/s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}},
+        {"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}},
+        {"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}},
+        {"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}},
+        {"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}},
+        {"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}},
+        {"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM_8}},
+        {"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}},
+        {"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}},
+        {"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}},
+        {"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}},
+        {"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_2}},
+        {"cmp/pl",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_5}},
+        {"cmp/pz",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_1}},
+        {"cmp/str",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_C}},
+        {"div0s",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_7}},
+        {"div0u",{0},{HEX_0,HEX_0,HEX_1,HEX_9}},
+        {"div1",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_4}},
+        {"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}},
+        {"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}},
+        {"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}},
+        {"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}},
+        {"jmp",{A_IND_N},{HEX_4,REG_N,HEX_2,HEX_B}},
+        {"jsr",{A_IND_N},{HEX_4,REG_N,HEX_0,HEX_B}},
+        {"ldc",{A_REG_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_E}},
+        {"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}},
+        {"ldc",{A_REG_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_E}},
+        {"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}},
+        {"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}},
+        {"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_E}},
+        {"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}},
+        {"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}},
+        {"ldc.l",{A_INC_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_7}},
+        {"ldc.l",{A_INC_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_7}},
+        {"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}},
+        {"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}},
+        {"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_7}},
+        {"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}},
+        {"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}},
+        {"lds",{A_REG_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_A}},
+        {"lds",{A_REG_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_A}},
+        {"lds",{A_REG_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_A}},
+        {"lds",{A_REG_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_A}},
+        {"lds.l",{A_INC_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_6}},
+        {"lds.l",{A_INC_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_6}},
+        {"lds.l",{A_INC_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_6}},
+        {"lds.l",{A_INC_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_6}},
+        {"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}},
+        {"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}},
+        {"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}},
+        {"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM_8}},
+        {"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}},
+        {"mov.b",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_4}},
+        {"mov.b",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_4}},
+        {"mov.b",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_0}},
+        {"mov.b",{A_DISP_REG_M,A_R0},{HEX_8,HEX_4,REG_M,IMM_4}},
+        {"mov.b",{A_DISP_GBR,A_R0},{HEX_C,HEX_4,IMM_8}},
+        {"mov.b",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_C}},
+        {"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}},
+        {"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}},
+        {"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM_4}},
+        {"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM_8}},
+        {"mov.l",{ A_REG_M,A_DISP_REG_N},{HEX_1,REG_N,REG_M,IMM_4BY4}},
+        {"mov.l",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_6}},
+        {"mov.l",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_6}},
+        {"mov.l",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_2}},
+        {"mov.l",{A_DISP_REG_M,A_REG_N},{HEX_5,REG_N,REG_M,IMM_4BY4}},
+        {"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM_8BY4}},
+        {"mov.l",{A_DISP_PC,A_REG_N},{HEX_D,REG_N,PCRELIMM_8BY4}},
+        {"mov.l",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_E}},
+        {"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}},
+        {"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}},
+        {"mov.l",{A_R0,A_DISP_GBR},{HEX_C,HEX_2,IMM_8BY4}},
+        {"mov.w",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_5}},
+        {"mov.w",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_5}},
+        {"mov.w",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_1}},
+        {"mov.w",{A_DISP_REG_M,A_R0},{HEX_8,HEX_5,REG_M,IMM_4BY2}},
+        {"mov.w",{A_DISP_GBR,A_R0},{HEX_C,HEX_5,IMM_8BY2}},
+        {"mov.w",{A_DISP_PC,A_REG_N},{HEX_9,REG_N,PCRELIMM_8BY2}},
+        {"mov.w",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_D}},
+        {"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}},
+        {"mov.w",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_1}},
+        {"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM_4BY2}},
+        {"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}},
+        {"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}},
+        {"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}},
+        {"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}},
+        {"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}},
+        {"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}},
+        {"mulu",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_E}},
+        {"neg",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_B}},
+        {"negc",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_A}},
+        {"nop",{0},{HEX_0,HEX_0,HEX_0,HEX_9}},
+        {"not",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_7}},
+        {"ocbi",{A_IND_N},{HEX_0,REG_N,HEX_9,HEX_3}},
+        {"ocbp",{A_IND_N},{HEX_0,REG_N,HEX_A,HEX_3}},
+        {"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}},
+        {"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM_8}},
+        {"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}},
+        {"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM_8}},
+        {"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}},
+        {"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}},
+        {"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}},
+        {"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}},
+        {"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}},
+        {"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}},
+        {"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}},
+        {"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}},
+        {"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}},
+        {"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}},
+        {"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}},
+        {"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}},
+        {"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}},
+        {"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}},
+        {"shll16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_8}},
+        {"shll2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_8}},
+        {"shll8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_8}},
+        {"shlr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_1}},
+        {"shlr16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_9}},
+        {"shlr2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_9}},
+        {"shlr8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_9}},
+        {"sleep",{0},{HEX_0,HEX_0,HEX_1,HEX_B}},
+        {"stc",{A_SR,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_2}},
+        {"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}},
+        {"stc",{A_VBR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_2}},
+        {"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}},
+        {"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}},
+        {"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_2}},
+        {"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_7,HEX_2}},
+        {"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}},
+        {"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}},
+        {"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}},
+        {"stc.l",{A_VBR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_3}},
+        {"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}},
+        {"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}},
+        {"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_3}},
+        {"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_7,HEX_3}},
+        {"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}},
+        {"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}},
+        {"sts",{A_MACL,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_A}},
+        {"sts",{A_PR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_A}},
+        {"sts",{FPUL_M,A_REG_N},{HEX_0,REG_N,HEX_5,HEX_A}},
+        {"sts",{FPSCR_M,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_A}},
+        {"sts.l",{A_MACH,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_2}},
+        {"sts.l",{A_MACL,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_2}},
+        {"sts.l",{A_PR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_2}},
+        {"sts.l",{FPUL_M,A_DEC_N},{HEX_4,REG_N,HEX_5,HEX_2}},
+        {"sts.l",{FPSCR_M,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_2}},
+        {"sub",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_8}},
+        {"subc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_A}},
+        {"subv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_B}},
+        {"swap.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_8}},
+        {"swap.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_9}},
+        {"tas.b",{A_IND_N},{HEX_4,REG_N,HEX_1,HEX_B}},
+        {"trapa",{A_IMM},{HEX_C,HEX_3,IMM_8}},
+        {"tst",{A_IMM,A_R0},{HEX_C,HEX_8,IMM_8}},
+        {"tst",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_8}},
+        {"tst.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_C,IMM_8}},
+        {"xor",{A_IMM,A_R0},{HEX_C,HEX_A,IMM_8}},
+        {"xor",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_A}},
+        {"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM_8}},
+        {"xtrct",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_D}},
+        {"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}},
+        {"dt",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_0}},
+        {"dmuls.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_D}},
+        {"dmulu.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_5}},
+        {"mac.l",{A_INC_M,A_INC_N},{HEX_0,REG_N,REG_M,HEX_F}},
+        {"braf",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_3}},
+        {"bsrf",{A_REG_N},{HEX_0,REG_N,HEX_0,HEX_3}},
+        {"fabs",{FD_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}},
+        {"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
+        {"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
+        {"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}},
+        {"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}},
+        {"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}},
+        {"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}},
+        {"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_B,HEX_D}},
+        {"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_A,HEX_D}},
+        {"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}},
+        {"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}},
+        {"fipr",{V_REG_M,V_REG_N},{HEX_F,REG_NM,HEX_E,HEX_D}},
+        {"fldi0",{F_REG_N},{HEX_F,REG_N,HEX_8,HEX_D}},
+        {"fldi1",{F_REG_N},{HEX_F,REG_N,HEX_9,HEX_D}},
+        {"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}},
+        {"float",{FPUL_M,FD_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}},
+        {"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}},
+        {"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}},
+        {"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}},
+        {"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
+        {"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
+        {"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
+        {"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
+        {"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
+        {"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
+        {"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
+        {"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
+        {"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
+        {"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
+        {"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
+        {"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
+        {"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
+        {"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
+        {"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
+        {"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
+        {"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
+        {"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
+        {"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
+        {"fmov.s",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
+        {"fmov.s",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
+        {"fmov.s",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
+        {"fmov.s",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
+        {"fmov.s",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
+        {"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}},
+        {"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}},
+        {"fneg",{FD_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}},
+        {"frchg",{0},{HEX_F,HEX_B,HEX_F,HEX_D}},
+        {"fschg",{0},{HEX_F,HEX_3,HEX_F,HEX_D}},
+        {"fsqrt",{FD_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}},
+        {"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}},
+        {"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},
+        {"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},
+        {"ftrc",{FD_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}},
+        {"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_NM,HEX_F,HEX_D}},
+        { 0 },
+};
+
+static void print_sh_insn(u32 memaddr, u16 insn)
+{
+        int relmask = ~0;
+        int nibs[4] = { (insn >> 12) & 0xf, (insn >> 8) & 0xf, (insn >> 4) & 0xf, insn & 0xf};
+        int lastsp;
+        struct sh_opcode_info *op = sh_table;
+
+        for (; op->name; op++) {
+                int n;
+                int imm = 0;
+                int rn = 0;
+                int rm = 0;
+                int rb = 0;
+                int disp_pc;
+                int disp_pc_addr = 0;
+
+                for (n = 0; n < 4; n++) {
+                        int i = op->nibbles[n];
+
+                        if (i < 16) {
+                                if (nibs[n] == i)
+                                        continue;
+                                goto fail;
+                        }
+                        switch (i) {
+                        case BRANCH_8:
+                                imm = (nibs[2] << 4) | (nibs[3]);
+                                if (imm & 0x80)
+                                        imm |= ~0xff;
+                                imm = ((char)imm) * 2 + 4 ;
+                                goto ok;
+                        case BRANCH_12:
+                                imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]);
+                                if (imm & 0x800)
+                                        imm |= ~0xfff;
+                                imm = imm * 2 + 4;
+                                goto ok;
+                        case IMM_4:
+                                imm = nibs[3];
+                                goto ok;
+                        case IMM_4BY2:
+                                imm = nibs[3] <<1;
+                                goto ok;
+                        case IMM_4BY4:
+                                imm = nibs[3] <<2;
+                                goto ok;
+                        case IMM_8:
+                                imm = (nibs[2] << 4) | nibs[3];
+                                goto ok;
+                        case PCRELIMM_8BY2:
+                                imm = ((nibs[2] << 4) | nibs[3]) <<1;
+                                relmask = ~1;
+                                goto ok;
+                        case PCRELIMM_8BY4:
+                                imm = ((nibs[2] << 4) | nibs[3]) <<2;
+                                relmask = ~3;
+                                goto ok;
+                        case IMM_8BY2:
+                                imm = ((nibs[2] << 4) | nibs[3]) <<1;
+                                goto ok;
+                        case IMM_8BY4:
+                                imm = ((nibs[2] << 4) | nibs[3]) <<2;
+                                goto ok;
+                        case DISP_8:
+                                imm = (nibs[2] << 4) | (nibs[3]);
+                                goto ok;
+                        case DISP_4:
+                                imm = nibs[3];
+                                goto ok;
+                        case REG_N:
+                                rn = nibs[n];
+                                break;
+                        case REG_M:
+                                rm = nibs[n];
+                                break;
+                        case REG_NM:
+                                rn = (nibs[n] & 0xc) >> 2;
+                                rm = (nibs[n] & 0x3);
+                                break;
+                        case REG_B:
+                                rb = nibs[n] & 0x07;
+                                break;
+                        default:
+                                return;
+                        }
+                }
+
+        ok:
+                printk("%-8s  ", op->name);
+                lastsp = (op->arg[0] == A_END);
+                disp_pc = 0;
+                for (n = 0; n < 6 && op->arg[n] != A_END; n++) {
+                        if (n && op->arg[1] != A_END)
+                                printk(", ");
+                        switch (op->arg[n]) {
+                        case A_IMM:
+                                printk("#%d", (char)(imm));
+                                break;
+                        case A_R0:
+                                printk("r0");
+                                break;
+                        case A_REG_N:
+                                printk("r%d", rn);
+                                break;
+                        case A_INC_N:
+                                printk("@r%d+", rn);
+                                break;
+                        case A_DEC_N:
+                                printk("@-r%d", rn);
+                                break;
+                        case A_IND_N:
+                                printk("@r%d", rn);
+                                break;
+                        case A_DISP_REG_N:
+                                printk("@(%d,r%d)", imm, rn);
+                                break;
+                        case A_REG_M:
+                                printk("r%d", rm);
+                                break;
+                        case A_INC_M:
+                                printk("@r%d+", rm);
+                                break;
+                        case A_DEC_M:
+                                printk("@-r%d", rm);
+                                break;
+                        case A_IND_M:
+                                printk("@r%d", rm);
+                                break;
+                        case A_DISP_REG_M:
+                                printk("@(%d,r%d)", imm, rm);
+                                break;
+                        case A_REG_B:
+                                printk("r%d_bank", rb);
+                                break;
+                        case A_DISP_PC:
+                                disp_pc = 1;
+                                disp_pc_addr = imm + 4 + (memaddr & relmask);
+                                printk("%08x <%pS>", disp_pc_addr,
+                                       (void *)disp_pc_addr);
+                                break;
+                        case A_IND_R0_REG_N:
+                                printk("@(r0,r%d)", rn);
+                                break;
+                        case A_IND_R0_REG_M:
+                                printk("@(r0,r%d)", rm);
+                                break;
+                        case A_DISP_GBR:
+                                printk("@(%d,gbr)",imm);
+                                break;
+                        case A_R0_GBR:
+                                printk("@(r0,gbr)");
+                                break;
+                        case A_BDISP12:
+                        case A_BDISP8:
+                                printk("%08x", imm + memaddr);
+                                break;
+                        case A_SR:
+                                printk("sr");
+                                break;
+                        case A_GBR:
+                                printk("gbr");
+                                break;
+                        case A_VBR:
+                                printk("vbr");
+                                break;
+                        case A_SSR:
+                                printk("ssr");
+                                break;
+                        case A_SPC:
+                                printk("spc");
+                                break;
+                        case A_MACH:
+                                printk("mach");
+                                break;
+                        case A_MACL:
+                                printk("macl");
+                                break;
+                        case A_PR:
+                                printk("pr");
+                                break;
+                        case A_SGR:
+                                printk("sgr");
+                                break;
+                        case A_DBR:
+                                printk("dbr");
+                                break;
+                        case FD_REG_N:
+                                if (0)
+                                        goto d_reg_n;
+                        case F_REG_N:
+                                printk("fr%d", rn);
+                                break;
+                        case F_REG_M:
+                                printk("fr%d", rm);
+                                break;
+                        case DX_REG_N:
+                                if (rn & 1) {
+                                        printk("xd%d", rn & ~1);
+                                        break;
+                                }
+                        d_reg_n:
+                        case D_REG_N:
+                                printk("dr%d", rn);
+                                break;
+                        case DX_REG_M:
+                                if (rm & 1) {
+                                        printk("xd%d", rm & ~1);
+                                        break;
+                                }
+                        case D_REG_M:
+                                printk("dr%d", rm);
+                                break;
+                        case FPSCR_M:
+                        case FPSCR_N:
+                                printk("fpscr");
+                                break;
+                        case FPUL_M:
+                        case FPUL_N:
+                                printk("fpul");
+                                break;
+                        case F_FR0:
+                                printk("fr0");
+                                break;
+                        case V_REG_N:
+                                printk("fv%d", rn*4);
+                                break;
+                        case V_REG_M:
+                                printk("fv%d", rm*4);
+                                break;
+                        case XMTRX_M4:
+                                printk("xmtrx");
+                                break;
+                        default:
+                                return;
+                        }
+                }
+
+                if (disp_pc && strcmp(op->name, "mova") != 0) {
+                        u32 val;
+
+                        if (relmask == ~1)
+                                __get_user(val, (u16 *)disp_pc_addr);
+                        else
+                                __get_user(val, (u32 *)disp_pc_addr);
+
+                        printk("  ! %08x <%pS>", val, (void *)val);
+                }
+
+                return;
+        fail:
+                ;
+
+        }
+
+        printk(".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]);
+}
+
+void show_code(struct pt_regs *regs)
+{
+        unsigned short *pc = (unsigned short *)regs->pc;
+        long i;
+
+        if (regs->pc & 0x1)
+                return;
+
+        printk("Code:\n");
+
+        for (i = -3 ; i < 6 ; i++) {
+                unsigned short insn;
+
+                if (__get_user(insn, pc + i)) {
+                        printk(" (Bad address in pc)\n");
+                        break;
+                }
+
+                printk("%s%08lx:  ", (i ? "  ": "->"), (unsigned long)(pc + i));
+                print_sh_insn((unsigned long)(pc + i), insn);
+                printk("\n");
+        }
+
+        printk("\n");
+}
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 5b7efc4016fa..d62359cfbbe2 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -308,15 +308,19 @@ ENTRY(system_call)
         mov.l   1f, r9
         mov.l   @r9, r8         ! Read from TRA (Trap Address) Register
 #endif
+
+        mov     #OFF_TRA, r10
+        add     r15, r10
+        mov.l   r8, @r10                ! set TRA value to tra
+
         /*
          * Check the trap type
          */
         mov     #((0x20 << 2) - 1), r9
         cmp/hi  r9, r8
         bt/s    debug_trap              ! it's a debug trap..
-         mov    #OFF_TRA, r9
-        add     r15, r9
-        mov.l   r8, @r9                 ! set TRA value to tra
+         nop
+
 #ifdef CONFIG_TRACE_IRQFLAGS
         mov.l   5f, r10
         jsr     @r10
@@ -371,47 +375,3 @@ syscall_exit:
 #endif
 7:      .long   do_syscall_trace_enter
 8:      .long   do_syscall_trace_leave
-
-#ifdef CONFIG_FUNCTION_TRACER
-        .align 2
-        .globl  _mcount
-        .type   _mcount,@function
-        .globl  mcount
-        .type   mcount,@function
-_mcount:
-mcount:
-        mov.l   r4, @-r15
-        mov.l   r5, @-r15
-        mov.l   r6, @-r15
-        mov.l   r7, @-r15
-        sts.l   pr, @-r15
-
-        mov.l   @(20,r15),r4
-        sts     pr, r5
-
-        mov.l   1f, r6
-        mov.l   ftrace_stub, r7 
-        cmp/eq  r6, r7
-        bt      skip_trace
-
-        mov.l   @r6, r6
-        jsr     @r6
-         nop
-
-skip_trace:
-
-        lds.l   @r15+, pr
-        mov.l   @r15+, r7
-        mov.l   @r15+, r6
-        mov.l   @r15+, r5
-        rts
-         mov.l  @r15+, r4
-
-        .align 2
-1:      .long   ftrace_trace_function
-
-        .globl  ftrace_stub
-ftrace_stub:
-        rts
-         nop
-#endif /* CONFIG_FUNCTION_TRACER */
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
new file mode 100644
index 000000000000..4c3247477aa3
--- /dev/null
+++ b/arch/sh/kernel/ftrace.c
@@ -0,0 +1,133 @@
+/*
+ * Copyright (C) 2008 Matt Fleming <mjf@gentoo.org>
+ * Copyright (C) 2008 Paul Mundt <lethal@linux-sh.org>
+ *
+ * Code for replacing ftrace calls with jumps.
+ *
+ * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
+ *
+ * Thanks goes to Ingo Molnar, for suggesting the idea.
+ * Mathieu Desnoyers, for suggesting postponing the modifications.
+ * Arjan van de Ven, for keeping me straight, and explaining to me
+ * the dangers of modifying code on the run.
+ */
+#include <linux/uaccess.h>
+#include <linux/ftrace.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <asm/ftrace.h>
+#include <asm/cacheflush.h>
+
+static unsigned char ftrace_nop[] = {
+        0x09, 0x00,             /* nop */
+        0x09, 0x00,             /* nop */
+};
+
+static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE];
+
+unsigned char *ftrace_nop_replace(void)
+{
+        return ftrace_nop;
+}
+
+static int is_sh_nop(unsigned char *ip)
+{
+        return strncmp(ip, ftrace_nop, sizeof(ftrace_nop));
+}
+
+unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
+{
+        /* Place the address in the memory table. */
+        if (addr == CALLER_ADDR)
+                __raw_writel(addr + MCOUNT_INSN_OFFSET, ftrace_replaced_code);
+        else
+                __raw_writel(addr, ftrace_replaced_code);
+
+        /*
+         * No locking needed, this must be called via kstop_machine
+         * which in essence is like running on a uniprocessor machine.
+         */
+        return ftrace_replaced_code;
+}
+
+int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
+                       unsigned char *new_code)
+{
+        unsigned char replaced[MCOUNT_INSN_SIZE];
+
+        /*
+         * Note: Due to modules and __init, code can
+         *  disappear and change, we need to protect against faulting
+         *  as well as code changing. We do this by using the
+         *  probe_kernel_* functions.
+         *
+         * No real locking needed, this code is run through
+         * kstop_machine, or before SMP starts.
+         */
+
+        /*
+         * If we're trying to nop out a call to a function, we instead
+         * place a call to the address after the memory table.
+         */
+        if (is_sh_nop(new_code) == 0)
+                __raw_writel(ip + MCOUNT_INSN_SIZE, (unsigned long)new_code);
+
+        /* read the text we want to modify */
+        if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE))
+                return -EFAULT;
+
+        /* Make sure it is what we expect it to be */
+        if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0)
+                return -EINVAL;
+
+        /* replace the text with the new text */
+        if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE))
+                return -EPERM;
+
+        flush_icache_range(ip, ip + MCOUNT_INSN_SIZE);
+
+        return 0;
+}
+
+int ftrace_update_ftrace_func(ftrace_func_t func)
+{
+        unsigned long ip = (unsigned long)(&ftrace_call);
+        unsigned char old[MCOUNT_INSN_SIZE], *new;
+
+        memcpy(old, (unsigned char *)(ip + MCOUNT_INSN_OFFSET), MCOUNT_INSN_SIZE);
+        new = ftrace_call_replace(ip, (unsigned long)func);
+
+        return ftrace_modify_code(ip + MCOUNT_INSN_OFFSET, old, new);
+}
+
+int ftrace_make_nop(struct module *mod,
+                    struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned char *new, *old;
+        unsigned long ip = rec->ip;
+
+        old = ftrace_call_replace(ip, addr);
+        new = ftrace_nop_replace();
+
+        return ftrace_modify_code(rec->ip, old, new);
+}
+
+int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned char *new, *old;
+        unsigned long ip = rec->ip;
+
+        old = ftrace_nop_replace();
+        new = ftrace_call_replace(ip, addr);
+
+        return ftrace_modify_code(rec->ip, old, new);
+}
+
+int __init ftrace_dyn_arch_init(void *data)
+{
+        /* The return code is retured via data */
+        __raw_writel(0, (unsigned long)data);
+
+        return 0;
+}
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index ae0a382a82eb..788605ff7088 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -80,8 +80,14 @@ ENTRY(_stext)
         mov.l   7f, r0
         ldc     r0, r7_bank     ! ... and initial thread_info
 #endif
-        
-        !                       Clear BSS area
+
+#ifndef CONFIG_SH_NO_BSS_INIT
+        /*
+         * Don't clear BSS if running on slow platforms such as an RTL simulation,
+         * remote memory via SHdebug link, etc.  For these the memory can be guaranteed
+         * to be all zero on boot anyway.
+         */
+                                ! Clear BSS area
 #ifdef CONFIG_SMP       
         mov.l   3f, r0
         cmp/eq  #0, r0          ! skip clear if set to zero
@@ -97,6 +103,8 @@ ENTRY(_stext)
          mov.l  r0,@-r2
 
 10:             
+#endif
+
         !                       Additional CPU initialization
         mov.l   6f, r0
         jsr     @r0
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
new file mode 100644
index 000000000000..fe59ccfc1152
--- /dev/null
+++ b/arch/sh/kernel/idle.c
@@ -0,0 +1,81 @@
+/*
+ * The idle loop for all SuperH platforms.
+ *
+ *  Copyright (C) 2002 - 2008  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/pm.h>
+#include <linux/tick.h>
+#include <linux/preempt.h>
+#include <linux/thread_info.h>
+#include <linux/irqflags.h>
+#include <asm/pgalloc.h>
+#include <asm/system.h>
+#include <asm/atomic.h>
+
+static int hlt_counter;
+void (*pm_idle)(void);
+void (*pm_power_off)(void);
+EXPORT_SYMBOL(pm_power_off);
+
+static int __init nohlt_setup(char *__unused)
+{
+        hlt_counter = 1;
+        return 1;
+}
+__setup("nohlt", nohlt_setup);
+
+static int __init hlt_setup(char *__unused)
+{
+        hlt_counter = 0;
+        return 1;
+}
+__setup("hlt", hlt_setup);
+
+static void default_idle(void)
+{
+        if (!hlt_counter) {
+                clear_thread_flag(TIF_POLLING_NRFLAG);
+                smp_mb__after_clear_bit();
+                set_bl_bit();
+                stop_critical_timings();
+
+                while (!need_resched())
+                        cpu_sleep();
+
+                start_critical_timings();
+                clear_bl_bit();
+                set_thread_flag(TIF_POLLING_NRFLAG);
+        } else
+                while (!need_resched())
+                        cpu_relax();
+}
+
+void cpu_idle(void)
+{
+        set_thread_flag(TIF_POLLING_NRFLAG);
+
+        /* endless idle loop with no priority at all */
+        while (1) {
+                void (*idle)(void) = pm_idle;
+
+                if (!idle)
+                        idle = default_idle;
+
+                tick_nohz_stop_sched_tick(1);
+                while (!need_resched())
+                        idle();
+                tick_nohz_restart_sched_tick();
+
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
+                check_pgt_cache();
+        }
+}
diff --git a/arch/sh/kernel/init_task.c b/arch/sh/kernel/init_task.c
index b151a25cb14d..80c35ff71d56 100644
--- a/arch/sh/kernel/init_task.c
+++ b/arch/sh/kernel/init_task.c
@@ -7,7 +7,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct pt_regs fake_swapper_regs;
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
new file mode 100644
index 000000000000..7c747e7d71b8
--- /dev/null
+++ b/arch/sh/kernel/kgdb.c
@@ -0,0 +1,285 @@
+/*
+ * SuperH KGDB support
+ *
+ * Copyright (C) 2008  Paul Mundt
+ *
+ * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kgdb.h>
+#include <linux/kdebug.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/cacheflush.h>
+
+char in_nmi = 0;        /* Set during NMI to prevent re-entry */
+
+/* Macros for single step instruction identification */
+#define OPCODE_BT(op)           (((op) & 0xff00) == 0x8900)
+#define OPCODE_BF(op)           (((op) & 0xff00) == 0x8b00)
+#define OPCODE_BTF_DISP(op)     (((op) & 0x80) ? (((op) | 0xffffff80) << 1) : \
+                                 (((op) & 0x7f ) << 1))
+#define OPCODE_BFS(op)          (((op) & 0xff00) == 0x8f00)
+#define OPCODE_BTS(op)          (((op) & 0xff00) == 0x8d00)
+#define OPCODE_BRA(op)          (((op) & 0xf000) == 0xa000)
+#define OPCODE_BRA_DISP(op)     (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
+                                 (((op) & 0x7ff) << 1))
+#define OPCODE_BRAF(op)         (((op) & 0xf0ff) == 0x0023)
+#define OPCODE_BRAF_REG(op)     (((op) & 0x0f00) >> 8)
+#define OPCODE_BSR(op)          (((op) & 0xf000) == 0xb000)
+#define OPCODE_BSR_DISP(op)     (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
+                                 (((op) & 0x7ff) << 1))
+#define OPCODE_BSRF(op)         (((op) & 0xf0ff) == 0x0003)
+#define OPCODE_BSRF_REG(op)     (((op) >> 8) & 0xf)
+#define OPCODE_JMP(op)          (((op) & 0xf0ff) == 0x402b)
+#define OPCODE_JMP_REG(op)      (((op) >> 8) & 0xf)
+#define OPCODE_JSR(op)          (((op) & 0xf0ff) == 0x400b)
+#define OPCODE_JSR_REG(op)      (((op) >> 8) & 0xf)
+#define OPCODE_RTS(op)          ((op) == 0xb)
+#define OPCODE_RTE(op)          ((op) == 0x2b)
+
+#define SR_T_BIT_MASK           0x1
+#define STEP_OPCODE             0xc33d
+
+/* Calculate the new address for after a step */
+static short *get_step_address(struct pt_regs *linux_regs)
+{
+        opcode_t op = __raw_readw(linux_regs->pc);
+        long addr;
+
+        /* BT */
+        if (OPCODE_BT(op)) {
+                if (linux_regs->sr & SR_T_BIT_MASK)
+                        addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
+                else
+                        addr = linux_regs->pc + 2;
+        }
+
+        /* BTS */
+        else if (OPCODE_BTS(op)) {
+                if (linux_regs->sr & SR_T_BIT_MASK)
+                        addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
+                else
+                        addr = linux_regs->pc + 4;      /* Not in delay slot */
+        }
+
+        /* BF */
+        else if (OPCODE_BF(op)) {
+                if (!(linux_regs->sr & SR_T_BIT_MASK))
+                        addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
+                else
+                        addr = linux_regs->pc + 2;
+        }
+
+        /* BFS */
+        else if (OPCODE_BFS(op)) {
+                if (!(linux_regs->sr & SR_T_BIT_MASK))
+                        addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
+                else
+                        addr = linux_regs->pc + 4;      /* Not in delay slot */
+        }
+
+        /* BRA */
+        else if (OPCODE_BRA(op))
+                addr = linux_regs->pc + 4 + OPCODE_BRA_DISP(op);
+
+        /* BRAF */
+        else if (OPCODE_BRAF(op))
+                addr = linux_regs->pc + 4
+                    + linux_regs->regs[OPCODE_BRAF_REG(op)];
+
+        /* BSR */
+        else if (OPCODE_BSR(op))
+                addr = linux_regs->pc + 4 + OPCODE_BSR_DISP(op);
+
+        /* BSRF */
+        else if (OPCODE_BSRF(op))
+                addr = linux_regs->pc + 4
+                    + linux_regs->regs[OPCODE_BSRF_REG(op)];
+
+        /* JMP */
+        else if (OPCODE_JMP(op))
+                addr = linux_regs->regs[OPCODE_JMP_REG(op)];
+
+        /* JSR */
+        else if (OPCODE_JSR(op))
+                addr = linux_regs->regs[OPCODE_JSR_REG(op)];
+
+        /* RTS */
+        else if (OPCODE_RTS(op))
+                addr = linux_regs->pr;
+
+        /* RTE */
+        else if (OPCODE_RTE(op))
+                addr = linux_regs->regs[15];
+
+        /* Other */
+        else
+                addr = linux_regs->pc + instruction_size(op);
+
+        flush_icache_range(addr, addr + instruction_size(op));
+        return (short *)addr;
+}
+
+/*
+ * Replace the instruction immediately after the current instruction
+ * (i.e. next in the expected flow of control) with a trap instruction,
+ * so that returning will cause only a single instruction to be executed.
+ * Note that this model is slightly broken for instructions with delay
+ * slots (e.g. B[TF]S, BSR, BRA etc), where both the branch and the
+ * instruction in the delay slot will be executed.
+ */
+
+static unsigned long stepped_address;
+static opcode_t stepped_opcode;
+
+static void do_single_step(struct pt_regs *linux_regs)
+{
+        /* Determine where the target instruction will send us to */
+        unsigned short *addr = get_step_address(linux_regs);
+
+        stepped_address = (int)addr;
+
+        /* Replace it */
+        stepped_opcode = __raw_readw((long)addr);
+        *addr = STEP_OPCODE;
+
+        /* Flush and return */
+        flush_icache_range((long)addr, (long)addr +
+                           instruction_size(stepped_opcode));
+}
+
+/* Undo a single step */
+static void undo_single_step(struct pt_regs *linux_regs)
+{
+        /* If we have stepped, put back the old instruction */
+        /* Use stepped_address in case we stopped elsewhere */
+        if (stepped_opcode != 0) {
+                __raw_writew(stepped_opcode, stepped_address);
+                flush_icache_range(stepped_address, stepped_address + 2);
+        }
+
+        stepped_opcode = 0;
+}
+
+void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
+{
+        int i;
+
+        for (i = 0; i < 16; i++)
+                gdb_regs[GDB_R0 + i] = regs->regs[i];
+
+        gdb_regs[GDB_PC] = regs->pc;
+        gdb_regs[GDB_PR] = regs->pr;
+        gdb_regs[GDB_SR] = regs->sr;
+        gdb_regs[GDB_GBR] = regs->gbr;
+        gdb_regs[GDB_MACH] = regs->mach;
+        gdb_regs[GDB_MACL] = regs->macl;
+
+        __asm__ __volatile__ ("stc vbr, %0" : "=r" (gdb_regs[GDB_VBR]));
+}
+
+void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
+{
+        int i;
+
+        for (i = 0; i < 16; i++)
+                regs->regs[GDB_R0 + i] = gdb_regs[GDB_R0 + i];
+
+        regs->pc = gdb_regs[GDB_PC];
+        regs->pr = gdb_regs[GDB_PR];
+        regs->sr = gdb_regs[GDB_SR];
+        regs->gbr = gdb_regs[GDB_GBR];
+        regs->mach = gdb_regs[GDB_MACH];
+        regs->macl = gdb_regs[GDB_MACL];
+
+        __asm__ __volatile__ ("ldc %0, vbr" : : "r" (gdb_regs[GDB_VBR]));
+}
+
+void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
+{
+        gdb_regs[GDB_R15] = p->thread.sp;
+        gdb_regs[GDB_PC] = p->thread.pc;
+}
+
+int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
+                               char *remcomInBuffer, char *remcomOutBuffer,
+                               struct pt_regs *linux_regs)
+{
+        unsigned long addr;
+        char *ptr;
+
+        /* Undo any stepping we may have done */
+        undo_single_step(linux_regs);
+
+        switch (remcomInBuffer[0]) {
+        case 'c':
+        case 's':
+                /* try to read optional parameter, pc unchanged if no parm */
+                ptr = &remcomInBuffer[1];
+                if (kgdb_hex2long(&ptr, &addr))
+                        linux_regs->pc = addr;
+        case 'D':
+        case 'k':
+                atomic_set(&kgdb_cpu_doing_single_step, -1);
+
+                if (remcomInBuffer[0] == 's') {
+                        do_single_step(linux_regs);
+                        kgdb_single_step = 1;
+
+                        atomic_set(&kgdb_cpu_doing_single_step,
+                                   raw_smp_processor_id());
+                }
+
+                return 0;
+        }
+
+        /* this means that we do not want to exit from the handler: */
+        return -1;
+}
+
+/*
+ * The primary entry points for the kgdb debug trap table entries.
+ */
+BUILD_TRAP_HANDLER(singlestep)
+{
+        unsigned long flags;
+        TRAP_HANDLER_DECL;
+
+        local_irq_save(flags);
+        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
+        kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs);
+        local_irq_restore(flags);
+}
+
+
+BUILD_TRAP_HANDLER(breakpoint)
+{
+        unsigned long flags;
+        TRAP_HANDLER_DECL;
+
+        local_irq_save(flags);
+        kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs);
+        local_irq_restore(flags);
+}
+
+int kgdb_arch_init(void)
+{
+        return 0;
+}
+
+void kgdb_arch_exit(void)
+{
+}
+
+struct kgdb_arch arch_kgdb_ops = {
+        /* Breakpoint instruction: trapa #0x3c */
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+        .gdb_bpt_instr          = { 0x3c, 0xc3 },
+#else
+        .gdb_bpt_instr          = { 0xc3, 0x3c },
+#endif
+};
diff --git a/arch/sh/kernel/kgdb_jmp.S b/arch/sh/kernel/kgdb_jmp.S
deleted file mode 100644
index 339bb1d7ff0b..000000000000
--- a/arch/sh/kernel/kgdb_jmp.S
+++ /dev/null
@@ -1,33 +0,0 @@
-#include <linux/linkage.h>
-
-ENTRY(setjmp)
-        add     #(9*4), r4
-        sts.l   pr, @-r4
-        mov.l   r15, @-r4
-        mov.l   r14, @-r4
-        mov.l   r13, @-r4
-        mov.l   r12, @-r4
-        mov.l   r11, @-r4
-        mov.l   r10, @-r4
-        mov.l   r9, @-r4
-        mov.l   r8, @-r4
-        rts
-         mov    #0, r0
-
-ENTRY(longjmp)
-        mov.l   @r4+, r8
-        mov.l   @r4+, r9
-        mov.l   @r4+, r10
-        mov.l   @r4+, r11
-        mov.l   @r4+, r12
-        mov.l   @r4+, r13
-        mov.l   @r4+, r14
-        mov.l   @r4+, r15
-        lds.l   @r4+, pr
-        mov     r5, r0
-        tst     r0, r0
-        bf      1f
-        mov     #1, r0  ! in case val==0
-1:      rts
-         nop
-
diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c
deleted file mode 100644
index bf8ac4c71640..000000000000
--- a/arch/sh/kernel/kgdb_stub.c
+++ /dev/null
@@ -1,1052 +0,0 @@
-/*
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * Contains extracts from code by Glenn Engel, Jim Kingdon,
- * David Grothe <dave@gcom.com>, Tigran Aivazian <tigran@sco.com>,
- * Amit S. Kale <akale@veritas.com>,  William Gatliff <bgat@open-widgets.com>,
- * Ben Lee, Steve Chamberlain and Benoit Miller <fulg@iname.com>.
- *
- * This version by Henry Bell <henry.bell@st.com>
- * Minor modifications by Jeremy Siegel <jsiegel@mvista.com>
- *
- * Contains low-level support for remote debug using GDB.
- *
- * To enable debugger support, two things need to happen. A call to
- * set_debug_traps() is necessary in order to allow any breakpoints
- * or error conditions to be properly intercepted and reported to gdb.
- * A breakpoint also needs to be generated to begin communication.  This
- * is most easily accomplished by a call to breakpoint() which does
- * a trapa if the initialisation phase has been successfully completed.
- *
- * In this case, set_debug_traps() is not used to "take over" exceptions;
- * other kernel code is modified instead to enter the kgdb functions here
- * when appropriate (see entry.S for breakpoint traps and NMI interrupts,
- * see traps.c for kernel error exceptions).
- *
- * The following gdb commands are supported:
- *
- *    Command       Function                               Return value
- *
- *    g             return the value of the CPU registers  hex data or ENN
- *    G             set the value of the CPU registers     OK or ENN
- *
- *    mAA..AA,LLLL  Read LLLL bytes at address AA..AA      hex data or ENN
- *    MAA..AA,LLLL: Write LLLL bytes at address AA.AA      OK or ENN
- *    XAA..AA,LLLL: Same, but data is binary (not hex)     OK or ENN
- *
- *    c             Resume at current address              SNN   ( signal NN)
- *    cAA..AA       Continue at address AA..AA             SNN
- *    CNN;          Resume at current address with signal  SNN
- *    CNN;AA..AA    Resume at address AA..AA with signal   SNN
- *
- *    s             Step one instruction                   SNN
- *    sAA..AA       Step one instruction from AA..AA       SNN
- *    SNN;          Step one instruction with signal       SNN
- *    SNNAA..AA     Step one instruction from AA..AA w/NN  SNN
- *
- *    k             kill (Detach GDB)
- *
- *    d             Toggle debug flag
- *    D             Detach GDB
- *
- *    Hct           Set thread t for operations,           OK or ENN
- *                  c = 'c' (step, cont), c = 'g' (other
- *                  operations)
- *
- *    qC            Query current thread ID                QCpid
- *    qfThreadInfo  Get list of current threads (first)    m<id>
- *    qsThreadInfo   "    "  "     "      "   (subsequent)
- *    qOffsets      Get section offsets                  Text=x;Data=y;Bss=z
- *
- *    TXX           Find if thread XX is alive             OK or ENN
- *    ?             What was the last sigval ?             SNN   (signal NN)
- *    O             Output to GDB console
- *
- * Remote communication protocol.
- *
- *    A debug packet whose contents are <data> is encapsulated for
- *    transmission in the form:
- *
- *       $ <data> # CSUM1 CSUM2
- *
- *       <data> must be ASCII alphanumeric and cannot include characters
- *       '$' or '#'.  If <data> starts with two characters followed by
- *       ':', then the existing stubs interpret this as a sequence number.
- *
- *       CSUM1 and CSUM2 are ascii hex representation of an 8-bit
- *       checksum of <data>, the most significant nibble is sent first.
- *       the hex digits 0-9,a-f are used.
- *
- *    Receiver responds with:
- *
- *       +       - if CSUM is correct and ready for next packet
- *       -       - if CSUM is incorrect
- *
- * Responses can be run-length encoded to save space.  A '*' means that
- * the next character is an ASCII encoding giving a repeat count which
- * stands for that many repetitions of the character preceding the '*'.
- * The encoding is n+29, yielding a printable character where n >=3
- * (which is where RLE starts to win).  Don't use an n > 126.
- *
- * So "0* " means the same as "0000".
- */
-
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <linux/spinlock.h>
-#include <linux/delay.h>
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/sysrq.h>
-#include <linux/module.h>
-#include <asm/system.h>
-#include <asm/cacheflush.h>
-#include <asm/current.h>
-#include <asm/signal.h>
-#include <asm/pgtable.h>
-#include <asm/ptrace.h>
-#include <asm/kgdb.h>
-#include <asm/io.h>
-
-/* Function pointers for linkage */
-kgdb_debug_hook_t *kgdb_debug_hook;
-kgdb_bus_error_hook_t *kgdb_bus_err_hook;
-
-int (*kgdb_getchar)(void);
-EXPORT_SYMBOL_GPL(kgdb_getchar);
-void (*kgdb_putchar)(int);
-EXPORT_SYMBOL_GPL(kgdb_putchar);
-
-static void put_debug_char(int c)
-{
-        if (!kgdb_putchar)
-                return;
-        (*kgdb_putchar)(c);
-}
-static int get_debug_char(void)
-{
-        if (!kgdb_getchar)
-                return -1;
-        return (*kgdb_getchar)();
-}
-
-/* Num chars in in/out bound buffers, register packets need NUMREGBYTES * 2 */
-#define BUFMAX 1024
-#define NUMREGBYTES (MAXREG*4)
-#define OUTBUFMAX (NUMREGBYTES*2+512)
-
-enum {
-        R0 = 0, R1,  R2,  R3,   R4,   R5,  R6, R7,
-        R8, R9, R10, R11, R12,  R13,  R14, R15,
-        PC, PR, GBR, VBR, MACH, MACL, SR,
-        /*  */
-        MAXREG
-};
-
-static unsigned int registers[MAXREG];
-struct kgdb_regs trap_registers;
-
-char kgdb_in_gdb_mode;
-char in_nmi;                    /* Set during NMI to prevent reentry */
-int kgdb_nofault;               /* Boolean to ignore bus errs (i.e. in GDB) */
-
-/* Default values for SCI (can override via kernel args in setup.c) */
-#ifndef CONFIG_KGDB_DEFPORT
-#define CONFIG_KGDB_DEFPORT 1
-#endif
-
-#ifndef CONFIG_KGDB_DEFBAUD
-#define CONFIG_KGDB_DEFBAUD 115200
-#endif
-
-#if defined(CONFIG_KGDB_DEFPARITY_E)
-#define CONFIG_KGDB_DEFPARITY 'E'
-#elif defined(CONFIG_KGDB_DEFPARITY_O)
-#define CONFIG_KGDB_DEFPARITY 'O'
-#else /* CONFIG_KGDB_DEFPARITY_N */
-#define CONFIG_KGDB_DEFPARITY 'N'
-#endif
-
-#ifdef CONFIG_KGDB_DEFBITS_7
-#define CONFIG_KGDB_DEFBITS '7'
-#else /* CONFIG_KGDB_DEFBITS_8 */
-#define CONFIG_KGDB_DEFBITS '8'
-#endif
-
-/* SCI/UART settings, used in kgdb_console_setup() */
-int  kgdb_portnum = CONFIG_KGDB_DEFPORT;
-EXPORT_SYMBOL_GPL(kgdb_portnum);
-int  kgdb_baud = CONFIG_KGDB_DEFBAUD;
-EXPORT_SYMBOL_GPL(kgdb_baud);
-char kgdb_parity = CONFIG_KGDB_DEFPARITY;
-EXPORT_SYMBOL_GPL(kgdb_parity);
-char kgdb_bits = CONFIG_KGDB_DEFBITS;
-EXPORT_SYMBOL_GPL(kgdb_bits);
-
-/* Jump buffer for setjmp/longjmp */
-static jmp_buf rem_com_env;
-
-/* TRA differs sh3/4 */
-#if defined(CONFIG_CPU_SH3)
-#define TRA 0xffffffd0
-#elif defined(CONFIG_CPU_SH4)
-#define TRA 0xff000020
-#endif
-
-/* Macros for single step instruction identification */
-#define OPCODE_BT(op)         (((op) & 0xff00) == 0x8900)
-#define OPCODE_BF(op)         (((op) & 0xff00) == 0x8b00)
-#define OPCODE_BTF_DISP(op)   (((op) & 0x80) ? (((op) | 0xffffff80) << 1) : \
-                              (((op) & 0x7f ) << 1))
-#define OPCODE_BFS(op)        (((op) & 0xff00) == 0x8f00)
-#define OPCODE_BTS(op)        (((op) & 0xff00) == 0x8d00)
-#define OPCODE_BRA(op)        (((op) & 0xf000) == 0xa000)
-#define OPCODE_BRA_DISP(op)   (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
-                              (((op) & 0x7ff) << 1))
-#define OPCODE_BRAF(op)       (((op) & 0xf0ff) == 0x0023)
-#define OPCODE_BRAF_REG(op)   (((op) & 0x0f00) >> 8)
-#define OPCODE_BSR(op)        (((op) & 0xf000) == 0xb000)
-#define OPCODE_BSR_DISP(op)   (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
-                              (((op) & 0x7ff) << 1))
-#define OPCODE_BSRF(op)       (((op) & 0xf0ff) == 0x0003)
-#define OPCODE_BSRF_REG(op)   (((op) >> 8) & 0xf)
-#define OPCODE_JMP(op)        (((op) & 0xf0ff) == 0x402b)
-#define OPCODE_JMP_REG(op)    (((op) >> 8) & 0xf)
-#define OPCODE_JSR(op)        (((op) & 0xf0ff) == 0x400b)
-#define OPCODE_JSR_REG(op)    (((op) >> 8) & 0xf)
-#define OPCODE_RTS(op)        ((op) == 0xb)
-#define OPCODE_RTE(op)        ((op) == 0x2b)
-
-#define SR_T_BIT_MASK           0x1
-#define STEP_OPCODE             0xc320
-#define BIOS_CALL_TRAP          0x3f
-
-/* Exception codes as per SH-4 core manual */
-#define ADDRESS_ERROR_LOAD_VEC   7
-#define ADDRESS_ERROR_STORE_VEC  8
-#define TRAP_VEC                 11
-#define INVALID_INSN_VEC         12
-#define INVALID_SLOT_VEC         13
-#define NMI_VEC                  14
-#define USER_BREAK_VEC           15
-#define SERIAL_BREAK_VEC         58
-
-/* Misc static */
-static int stepped_address;
-static short stepped_opcode;
-static char in_buffer[BUFMAX];
-static char out_buffer[OUTBUFMAX];
-
-static void kgdb_to_gdb(const char *s);
-
-/* Convert ch to hex */
-static int hex(const char ch)
-{
-        if ((ch >= 'a') && (ch <= 'f'))
-                return (ch - 'a' + 10);
-        if ((ch >= '0') && (ch <= '9'))
-                return (ch - '0');
-        if ((ch >= 'A') && (ch <= 'F'))
-                return (ch - 'A' + 10);
-        return (-1);
-}
-
-/* Convert the memory pointed to by mem into hex, placing result in buf.
-   Returns a pointer to the last char put in buf (null) */
-static char *mem_to_hex(const char *mem, char *buf, const int count)
-{
-        int i;
-        int ch;
-        unsigned short s_val;
-        unsigned long l_val;
-
-        /* Check for 16 or 32 */
-        if (count == 2 && ((long) mem & 1) == 0) {
-                s_val = *(unsigned short *) mem;
-                mem = (char *) &s_val;
-        } else if (count == 4 && ((long) mem & 3) == 0) {
-                l_val = *(unsigned long *) mem;
-                mem = (char *) &l_val;
-        }
-        for (i = 0; i < count; i++) {
-                ch = *mem++;
-                buf = pack_hex_byte(buf, ch);
-        }
-        *buf = 0;
-        return (buf);
-}
-
-/* Convert the hex array pointed to by buf into binary, to be placed in mem.
-   Return a pointer to the character after the last byte written */
-static char *hex_to_mem(const char *buf, char *mem, const int count)
-{
-        int i;
-        unsigned char ch;
-
-        for (i = 0; i < count; i++) {
-                ch = hex(*buf++) << 4;
-                ch = ch + hex(*buf++);
-                *mem++ = ch;
-        }
-        return (mem);
-}
-
-/* While finding valid hex chars, convert to an integer, then return it */
-static int hex_to_int(char **ptr, int *int_value)
-{
-        int num_chars = 0;
-        int hex_value;
-
-        *int_value = 0;
-
-        while (**ptr) {
-                hex_value = hex(**ptr);
-                if (hex_value >= 0) {
-                        *int_value = (*int_value << 4) | hex_value;
-                        num_chars++;
-                } else
-                        break;
-                (*ptr)++;
-        }
-        return num_chars;
-}
-
-/*  Copy the binary array pointed to by buf into mem.  Fix $, #,
-    and 0x7d escaped with 0x7d.  Return a pointer to the character
-    after the last byte written. */
-static char *ebin_to_mem(const char *buf, char *mem, int count)
-{
-        for (; count > 0; count--, buf++) {
-                if (*buf == 0x7d)
-                        *mem++ = *(++buf) ^ 0x20;
-                else
-                        *mem++ = *buf;
-        }
-        return mem;
-}
-
-/* Scan for the start char '$', read the packet and check the checksum */
-static void get_packet(char *buffer, int buflen)
-{
-        unsigned char checksum;
-        unsigned char xmitcsum;
-        int i;
-        int count;
-        char ch;
-
-        do {
-                /* Ignore everything until the start character */
-                while ((ch = get_debug_char()) != '$');
-
-                checksum = 0;
-                xmitcsum = -1;
-                count = 0;
-
-                /* Now, read until a # or end of buffer is found */
-                while (count < (buflen - 1)) {
-                        ch = get_debug_char();
-
-                        if (ch == '#')
-                                break;
-
-                        checksum = checksum + ch;
-                        buffer[count] = ch;
-                        count = count + 1;
-                }
-
-                buffer[count] = 0;
-
-                /* Continue to read checksum following # */
-                if (ch == '#') {
-                        xmitcsum = hex(get_debug_char()) << 4;
-                        xmitcsum += hex(get_debug_char());
-
-                        /* Checksum */
-                        if (checksum != xmitcsum)
-                                put_debug_char('-');    /* Failed checksum */
-                        else {
-                                /* Ack successful transfer */
-                                put_debug_char('+');
-
-                                /* If a sequence char is present, reply
-                                   the sequence ID */
-                                if (buffer[2] == ':') {
-                                        put_debug_char(buffer[0]);
-                                        put_debug_char(buffer[1]);
-
-                                        /* Remove sequence chars from buffer */
-                                        count = strlen(buffer);
-                                        for (i = 3; i <= count; i++)
-                                                buffer[i - 3] = buffer[i];
-                                }
-                        }
-                }
-        }
-        while (checksum != xmitcsum);   /* Keep trying while we fail */
-}
-
-/* Send the packet in the buffer with run-length encoding */
-static void put_packet(char *buffer)
-{
-        int checksum;
-        char *src;
-        int runlen;
-        int encode;
-
-        do {
-                src = buffer;
-                put_debug_char('$');
-                checksum = 0;
-
-                /* Continue while we still have chars left */
-                while (*src) {
-                        /* Check for runs up to 99 chars long */
-                        for (runlen = 1; runlen < 99; runlen++) {
-                                if (src[0] != src[runlen])
-                                        break;
-                        }
-
-                        if (runlen > 3) {
-                                /* Got a useful amount, send encoding */
-                                encode = runlen + ' ' - 4;
-                                put_debug_char(*src);   checksum += *src;
-                                put_debug_char('*');    checksum += '*';
-                                put_debug_char(encode); checksum += encode;
-                                src += runlen;
-                        } else {
-                                /* Otherwise just send the current char */
-                                put_debug_char(*src);   checksum += *src;
-                                src += 1;
-                        }
-                }
-
-                /* '#' Separator, put high and low components of checksum */
-                put_debug_char('#');
-                put_debug_char(hex_asc_hi(checksum));
-                put_debug_char(hex_asc_lo(checksum));
-        }
-        while ((get_debug_char()) != '+');      /* While no ack */
-}
-
-/* A bus error has occurred - perform a longjmp to return execution and
-   allow handling of the error */
-static void kgdb_handle_bus_error(void)
-{
-        longjmp(rem_com_env, 1);
-}
-
-/* Translate SH-3/4 exception numbers to unix-like signal values */
-static int compute_signal(const int excep_code)
-{
-        int sigval;
-
-        switch (excep_code) {
-
-        case INVALID_INSN_VEC:
-        case INVALID_SLOT_VEC:
-                sigval = SIGILL;
-                break;
-        case ADDRESS_ERROR_LOAD_VEC:
-        case ADDRESS_ERROR_STORE_VEC:
-                sigval = SIGSEGV;
-                break;
-
-        case SERIAL_BREAK_VEC:
-        case NMI_VEC:
-                sigval = SIGINT;
-                break;
-
-        case USER_BREAK_VEC:
-        case TRAP_VEC:
-                sigval = SIGTRAP;
-                break;
-
-        default:
-                sigval = SIGBUS;        /* "software generated" */
-                break;
-        }
-
-        return (sigval);
-}
-
-/* Make a local copy of the registers passed into the handler (bletch) */
-static void kgdb_regs_to_gdb_regs(const struct kgdb_regs *regs,
-                                  int *gdb_regs)
-{
-        gdb_regs[R0] = regs->regs[R0];
-        gdb_regs[R1] = regs->regs[R1];
-        gdb_regs[R2] = regs->regs[R2];
-        gdb_regs[R3] = regs->regs[R3];
-        gdb_regs[R4] = regs->regs[R4];
-        gdb_regs[R5] = regs->regs[R5];
-        gdb_regs[R6] = regs->regs[R6];
-        gdb_regs[R7] = regs->regs[R7];
-        gdb_regs[R8] = regs->regs[R8];
-        gdb_regs[R9] = regs->regs[R9];
-        gdb_regs[R10] = regs->regs[R10];
-        gdb_regs[R11] = regs->regs[R11];
-        gdb_regs[R12] = regs->regs[R12];
-        gdb_regs[R13] = regs->regs[R13];
-        gdb_regs[R14] = regs->regs[R14];
-        gdb_regs[R15] = regs->regs[R15];
-        gdb_regs[PC] = regs->pc;
-        gdb_regs[PR] = regs->pr;
-        gdb_regs[GBR] = regs->gbr;
-        gdb_regs[MACH] = regs->mach;
-        gdb_regs[MACL] = regs->macl;
-        gdb_regs[SR] = regs->sr;
-        gdb_regs[VBR] = regs->vbr;
-}
-
-/* Copy local gdb registers back to kgdb regs, for later copy to kernel */
-static void gdb_regs_to_kgdb_regs(const int *gdb_regs,
-                                  struct kgdb_regs *regs)
-{
-        regs->regs[R0] = gdb_regs[R0];
-        regs->regs[R1] = gdb_regs[R1];
-        regs->regs[R2] = gdb_regs[R2];
-        regs->regs[R3] = gdb_regs[R3];
-        regs->regs[R4] = gdb_regs[R4];
-        regs->regs[R5] = gdb_regs[R5];
-        regs->regs[R6] = gdb_regs[R6];
-        regs->regs[R7] = gdb_regs[R7];
-        regs->regs[R8] = gdb_regs[R8];
-        regs->regs[R9] = gdb_regs[R9];
-        regs->regs[R10] = gdb_regs[R10];
-        regs->regs[R11] = gdb_regs[R11];
-        regs->regs[R12] = gdb_regs[R12];
-        regs->regs[R13] = gdb_regs[R13];
-        regs->regs[R14] = gdb_regs[R14];
-        regs->regs[R15] = gdb_regs[R15];
-        regs->pc = gdb_regs[PC];
-        regs->pr = gdb_regs[PR];
-        regs->gbr = gdb_regs[GBR];
-        regs->mach = gdb_regs[MACH];
-        regs->macl = gdb_regs[MACL];
-        regs->sr = gdb_regs[SR];
-        regs->vbr = gdb_regs[VBR];
-}
-
-/* Calculate the new address for after a step */
-static short *get_step_address(void)
-{
-        short op = *(short *) trap_registers.pc;
-        long addr;
-
-        /* BT */
-        if (OPCODE_BT(op)) {
-                if (trap_registers.sr & SR_T_BIT_MASK)
-                        addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
-                else
-                        addr = trap_registers.pc + 2;
-        }
-
-        /* BTS */
-        else if (OPCODE_BTS(op)) {
-                if (trap_registers.sr & SR_T_BIT_MASK)
-                        addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
-                else
-                        addr = trap_registers.pc + 4;   /* Not in delay slot */
-        }
-
-        /* BF */
-        else if (OPCODE_BF(op)) {
-                if (!(trap_registers.sr & SR_T_BIT_MASK))
-                        addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
-                else
-                        addr = trap_registers.pc + 2;
-        }
-
-        /* BFS */
-        else if (OPCODE_BFS(op)) {
-                if (!(trap_registers.sr & SR_T_BIT_MASK))
-                        addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
-                else
-                        addr = trap_registers.pc + 4;   /* Not in delay slot */
-        }
-
-        /* BRA */
-        else if (OPCODE_BRA(op))
-                addr = trap_registers.pc + 4 + OPCODE_BRA_DISP(op);
-
-        /* BRAF */
-        else if (OPCODE_BRAF(op))
-                addr = trap_registers.pc + 4
-                    + trap_registers.regs[OPCODE_BRAF_REG(op)];
-
-        /* BSR */
-        else if (OPCODE_BSR(op))
-                addr = trap_registers.pc + 4 + OPCODE_BSR_DISP(op);
-
-        /* BSRF */
-        else if (OPCODE_BSRF(op))
-                addr = trap_registers.pc + 4
-                    + trap_registers.regs[OPCODE_BSRF_REG(op)];
-
-        /* JMP */
-        else if (OPCODE_JMP(op))
-                addr = trap_registers.regs[OPCODE_JMP_REG(op)];
-
-        /* JSR */
-        else if (OPCODE_JSR(op))
-                addr = trap_registers.regs[OPCODE_JSR_REG(op)];
-
-        /* RTS */
-        else if (OPCODE_RTS(op))
-                addr = trap_registers.pr;
-
-        /* RTE */
-        else if (OPCODE_RTE(op))
-                addr = trap_registers.regs[15];
-
-        /* Other */
-        else
-                addr = trap_registers.pc + 2;
-
-        flush_icache_range(addr, addr + 2);
-        return (short *) addr;
-}
-
-/* Set up a single-step.  Replace the instruction immediately after the
-   current instruction (i.e. next in the expected flow of control) with a
-   trap instruction, so that returning will cause only a single instruction
-   to be executed. Note that this model is slightly broken for instructions
-   with delay slots (e.g. B[TF]S, BSR, BRA etc), where both the branch
-   and the instruction in the delay slot will be executed. */
-static void do_single_step(void)
-{
-        unsigned short *addr = 0;
-
-        /* Determine where the target instruction will send us to */
-        addr = get_step_address();
-        stepped_address = (int)addr;
-
-        /* Replace it */
-        stepped_opcode = *(short *)addr;
-        *addr = STEP_OPCODE;
-
-        /* Flush and return */
-        flush_icache_range((long) addr, (long) addr + 2);
-}
-
-/* Undo a single step */
-static void undo_single_step(void)
-{
-        /* If we have stepped, put back the old instruction */
-        /* Use stepped_address in case we stopped elsewhere */
-        if (stepped_opcode != 0) {
-                *(short*)stepped_address = stepped_opcode;
-                flush_icache_range(stepped_address, stepped_address + 2);
-        }
-        stepped_opcode = 0;
-}
-
-/* Send a signal message */
-static void send_signal_msg(const int signum)
-{
-        out_buffer[0] = 'S';
-        out_buffer[1] = hex_asc_hi(signum);
-        out_buffer[2] = hex_asc_lo(signum);
-        out_buffer[3] = 0;
-        put_packet(out_buffer);
-}
-
-/* Reply that all was well */
-static void send_ok_msg(void)
-{
-        strcpy(out_buffer, "OK");
-        put_packet(out_buffer);
-}
-
-/* Reply that an error occurred */
-static void send_err_msg(void)
-{
-        strcpy(out_buffer, "E01");
-        put_packet(out_buffer);
-}
-
-/* Empty message indicates unrecognised command */
-static void send_empty_msg(void)
-{
-        put_packet("");
-}
-
-/* Read memory due to 'm' message */
-static void read_mem_msg(void)
-{
-        char *ptr;
-        int addr;
-        int length;
-
-        /* Jmp, disable bus error handler */
-        if (setjmp(rem_com_env) == 0) {
-
-                kgdb_nofault = 1;
-
-                /* Walk through, have m<addr>,<length> */
-                ptr = &in_buffer[1];
-                if (hex_to_int(&ptr, &addr) && (*ptr++ == ','))
-                        if (hex_to_int(&ptr, &length)) {
-                                ptr = 0;
-                                if (length * 2 > OUTBUFMAX)
-                                        length = OUTBUFMAX / 2;
-                                mem_to_hex((char *) addr, out_buffer, length);
-                        }
-                if (ptr)
-                        send_err_msg();
-                else
-                        put_packet(out_buffer);
-        } else
-                send_err_msg();
-
-        /* Restore bus error handler */
-        kgdb_nofault = 0;
-}
-
-/* Write memory due to 'M' or 'X' message */
-static void write_mem_msg(int binary)
-{
-        char *ptr;
-        int addr;
-        int length;
-
-        if (setjmp(rem_com_env) == 0) {
-
-                kgdb_nofault = 1;
-
-                /* Walk through, have M<addr>,<length>:<data> */
-                ptr = &in_buffer[1];
-                if (hex_to_int(&ptr, &addr) && (*ptr++ == ','))
-                        if (hex_to_int(&ptr, &length) && (*ptr++ == ':')) {
-                                if (binary)
-                                        ebin_to_mem(ptr, (char*)addr, length);
-                                else
-                                        hex_to_mem(ptr, (char*)addr, length);
-                                flush_icache_range(addr, addr + length);
-                                ptr = 0;
-                                send_ok_msg();
-                        }
-                if (ptr)
-                        send_err_msg();
-        } else
-                send_err_msg();
-
-        /* Restore bus error handler */
-        kgdb_nofault = 0;
-}
-
-/* Continue message  */
-static void continue_msg(void)
-{
-        /* Try to read optional parameter, PC unchanged if none */
-        char *ptr = &in_buffer[1];
-        int addr;
-
-        if (hex_to_int(&ptr, &addr))
-                trap_registers.pc = addr;
-}
-
-/* Continue message with signal */
-static void continue_with_sig_msg(void)
-{
-        int signal;
-        char *ptr = &in_buffer[1];
-        int addr;
-
-        /* Report limitation */
-        kgdb_to_gdb("Cannot force signal in kgdb, continuing anyway.\n");
-
-        /* Signal */
-        hex_to_int(&ptr, &signal);
-        if (*ptr == ';')
-                ptr++;
-
-        /* Optional address */
-        if (hex_to_int(&ptr, &addr))
-                trap_registers.pc = addr;
-}
-
-/* Step message */
-static void step_msg(void)
-{
-        continue_msg();
-        do_single_step();
-}
-
-/* Step message with signal */
-static void step_with_sig_msg(void)
-{
-        continue_with_sig_msg();
-        do_single_step();
-}
-
-/* Send register contents */
-static void send_regs_msg(void)
-{
-        kgdb_regs_to_gdb_regs(&trap_registers, registers);
-        mem_to_hex((char *) registers, out_buffer, NUMREGBYTES);
-        put_packet(out_buffer);
-}
-
-/* Set register contents - currently can't set other thread's registers */
-static void set_regs_msg(void)
-{
-        kgdb_regs_to_gdb_regs(&trap_registers, registers);
-        hex_to_mem(&in_buffer[1], (char *) registers, NUMREGBYTES);
-        gdb_regs_to_kgdb_regs(registers, &trap_registers);
-        send_ok_msg();
-}
-
-#ifdef CONFIG_SH_KGDB_CONSOLE
-/*
- * Bring up the ports..
- */
-static int __init kgdb_serial_setup(void)
-{
-        struct console dummy;
-        return kgdb_console_setup(&dummy, 0);
-}
-#else
-#define kgdb_serial_setup()     0
-#endif
-
-/* The command loop, read and act on requests */
-static void kgdb_command_loop(const int excep_code, const int trapa_value)
-{
-        int sigval;
-
-        /* Enter GDB mode (e.g. after detach) */
-        if (!kgdb_in_gdb_mode) {
-                /* Do serial setup, notify user, issue preemptive ack */
-                printk(KERN_NOTICE "KGDB: Waiting for GDB\n");
-                kgdb_in_gdb_mode = 1;
-                put_debug_char('+');
-        }
-
-        /* Reply to host that an exception has occurred */
-        sigval = compute_signal(excep_code);
-        send_signal_msg(sigval);
-
-        /* TRAP_VEC exception indicates a software trap inserted in place of
-           code by GDB so back up PC by one instruction, as this instruction
-           will later be replaced by its original one.  Do NOT do this for
-           trap 0xff, since that indicates a compiled-in breakpoint which
-           will not be replaced (and we would retake the trap forever) */
-        if ((excep_code == TRAP_VEC) && (trapa_value != (0x3c << 2)))
-                trap_registers.pc -= 2;
-
-        /* Undo any stepping we may have done */
-        undo_single_step();
-
-        while (1) {
-                out_buffer[0] = 0;
-                get_packet(in_buffer, BUFMAX);
-
-                /* Examine first char of buffer to see what we need to do */
-                switch (in_buffer[0]) {
-                case '?':       /* Send which signal we've received */
-                        send_signal_msg(sigval);
-                        break;
-
-                case 'g':       /* Return the values of the CPU registers */
-                        send_regs_msg();
-                        break;
-
-                case 'G':       /* Set the value of the CPU registers */
-                        set_regs_msg();
-                        break;
-
-                case 'm':       /* Read LLLL bytes address AA..AA */
-                        read_mem_msg();
-                        break;
-
-                case 'M':       /* Write LLLL bytes address AA..AA, ret OK */
-                        write_mem_msg(0);       /* 0 = data in hex */
-                        break;
-
-                case 'X':       /* Write LLLL bytes esc bin address AA..AA */
-                        if (kgdb_bits == '8')
-                                write_mem_msg(1); /* 1 = data in binary */
-                        else
-                                send_empty_msg();
-                        break;
-
-                case 'C':       /* Continue, signum included, we ignore it */
-                        continue_with_sig_msg();
-                        return;
-
-                case 'c':       /* Continue at address AA..AA (optional) */
-                        continue_msg();
-                        return;
-
-                case 'S':       /* Step, signum included, we ignore it */
-                        step_with_sig_msg();
-                        return;
-
-                case 's':       /* Step one instruction from AA..AA */
-                        step_msg();
-                        return;
-
-                case 'k':       /* 'Kill the program' with a kernel ? */
-                        break;
-
-                case 'D':       /* Detach from program, send reply OK */
-                        kgdb_in_gdb_mode = 0;
-                        send_ok_msg();
-                        get_debug_char();
-                        return;
-
-                default:
-                        send_empty_msg();
-                        break;
-                }
-        }
-}
-
-/* There has been an exception, most likely a breakpoint. */
-static void handle_exception(struct pt_regs *regs)
-{
-        int excep_code, vbr_val;
-        int count;
-        int trapa_value = ctrl_inl(TRA);
-
-        /* Copy kernel regs (from stack) */
-        for (count = 0; count < 16; count++)
-                trap_registers.regs[count] = regs->regs[count];
-        trap_registers.pc = regs->pc;
-        trap_registers.pr = regs->pr;
-        trap_registers.sr = regs->sr;
-        trap_registers.gbr = regs->gbr;
-        trap_registers.mach = regs->mach;
-        trap_registers.macl = regs->macl;
-
-        asm("stc vbr, %0":"=r"(vbr_val));
-        trap_registers.vbr = vbr_val;
-
-        /* Get excode for command loop call, user access */
-        asm("stc r2_bank, %0":"=r"(excep_code));
-
-        /* Act on the exception */
-        kgdb_command_loop(excep_code, trapa_value);
-
-        /* Copy back the (maybe modified) registers */
-        for (count = 0; count < 16; count++)
-                regs->regs[count] = trap_registers.regs[count];
-        regs->pc = trap_registers.pc;
-        regs->pr = trap_registers.pr;
-        regs->sr = trap_registers.sr;
-        regs->gbr = trap_registers.gbr;
-        regs->mach = trap_registers.mach;
-        regs->macl = trap_registers.macl;
-
-        vbr_val = trap_registers.vbr;
-        asm("ldc %0, vbr": :"r"(vbr_val));
-}
-
-asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5,
-                                      unsigned long r6, unsigned long r7,
-                                      struct pt_regs __regs)
-{
-        struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
-        handle_exception(regs);
-}
-
-/* Initialise the KGDB data structures and serial configuration */
-int __init kgdb_init(void)
-{
-        in_nmi = 0;
-        kgdb_nofault = 0;
-        stepped_opcode = 0;
-        kgdb_in_gdb_mode = 0;
-
-        if (kgdb_serial_setup() != 0) {
-                printk(KERN_NOTICE "KGDB: serial setup error\n");
-                return -1;
-        }
-
-        /* Init ptr to exception handler */
-        kgdb_debug_hook = handle_exception;
-        kgdb_bus_err_hook = kgdb_handle_bus_error;
-
-        /* Enter kgdb now if requested, or just report init done */
-        printk(KERN_NOTICE "KGDB: stub is initialized.\n");
-
-        return 0;
-}
-
-/* Make function available for "user messages"; console will use it too. */
-
-char gdbmsgbuf[BUFMAX];
-#define MAXOUT ((BUFMAX-2)/2)
-
-static void kgdb_msg_write(const char *s, unsigned count)
-{
-        int i;
-        int wcount;
-        char *bufptr;
-
-        /* 'O'utput */
-        gdbmsgbuf[0] = 'O';
-
-        /* Fill and send buffers... */
-        while (count > 0) {
-                bufptr = gdbmsgbuf + 1;
-
-                /* Calculate how many this time */
-                wcount = (count > MAXOUT) ? MAXOUT : count;
-
-                /* Pack in hex chars */
-                for (i = 0; i < wcount; i++)
-                        bufptr = pack_hex_byte(bufptr, s[i]);
-                *bufptr = '\0';
-
-                /* Move up */
-                s += wcount;
-                count -= wcount;
-
-                /* Write packet */
-                put_packet(gdbmsgbuf);
-        }
-}
-
-static void kgdb_to_gdb(const char *s)
-{
-        kgdb_msg_write(s, strlen(s));
-}
-
-#ifdef CONFIG_SH_KGDB_CONSOLE
-void kgdb_console_write(struct console *co, const char *s, unsigned count)
-{
-        /* Bail if we're not talking to GDB */
-        if (!kgdb_in_gdb_mode)
-                return;
-
-        kgdb_msg_write(s, count);
-}
-#endif
-
-#ifdef CONFIG_KGDB_SYSRQ
-static void sysrq_handle_gdb(int key, struct tty_struct *tty)
-{
-        printk("Entering GDB stub\n");
-        breakpoint();
-}
-
-static struct sysrq_key_op sysrq_gdb_op = {
-        .handler        = sysrq_handle_gdb,
-        .help_msg       = "Gdb",
-        .action_msg     = "GDB",
-};
-
-static int gdb_register_sysrq(void)
-{
-        printk("Registering GDB sysrq handler\n");
-        register_sysrq_key('g', &sysrq_gdb_op);
-        return 0;
-}
-module_init(gdb_register_sysrq);
-#endif
diff --git a/arch/sh/kernel/pm.c b/arch/sh/kernel/pm.c
deleted file mode 100644
index 10ab62c9aede..000000000000
--- a/arch/sh/kernel/pm.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Generic Power Management Routine
- *
- * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License.
- */
-#include <linux/suspend.h>
-#include <linux/delay.h>
-#include <linux/gfp.h>
-#include <asm/freq.h>
-#include <asm/io.h>
-#include <asm/watchdog.h>
-#include <asm/pm.h>
-
-#define INTR_OFFSET     0x600
-
-#define STBCR           0xffffff82
-#define STBCR2          0xffffff88
-
-#define STBCR_STBY      0x80
-#define STBCR_MSTP2     0x04
-
-#define MCR             0xffffff68
-#define RTCNT           0xffffff70
-
-#define MCR_RMODE       2
-#define MCR_RFSH        4
-
-void pm_enter(void)
-{
-        u8 stbcr, csr;
-        u16 frqcr, mcr;
-        u32 vbr_new, vbr_old;
-
-        set_bl_bit();
-
-        /* set wdt */
-        csr = sh_wdt_read_csr();
-        csr &= ~WTCSR_TME;
-        csr |= WTCSR_CKS_4096;
-        sh_wdt_write_csr(csr);
-        csr = sh_wdt_read_csr();
-        sh_wdt_write_cnt(0);
-
-        /* disable PLL1 */
-        frqcr = ctrl_inw(FRQCR);
-        frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
-        ctrl_outw(frqcr, FRQCR);
-
-        /* enable standby */
-        stbcr = ctrl_inb(STBCR);
-        ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
-
-        /* set self-refresh */
-        mcr = ctrl_inw(MCR);
-        ctrl_outw(mcr & ~MCR_RFSH, MCR);
-
-        /* set interrupt handler */
-        asm volatile("stc vbr, %0" : "=r" (vbr_old));
-        vbr_new = get_zeroed_page(GFP_ATOMIC);
-        udelay(50);
-        memcpy((void*)(vbr_new + INTR_OFFSET),
-               &wakeup_start, &wakeup_end - &wakeup_start);
-        asm volatile("ldc %0, vbr" : : "r" (vbr_new));
-
-        ctrl_outw(0, RTCNT);
-        ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
-
-        cpu_sleep();
-
-        asm volatile("ldc %0, vbr" : : "r" (vbr_old));
-
-        free_page(vbr_new);
-
-        /* enable PLL1 */
-        frqcr = ctrl_inw(FRQCR);
-        frqcr |= FRQCR_PSTBY;
-        ctrl_outw(frqcr, FRQCR);
-        udelay(50);
-        frqcr |= FRQCR_PLLEN;
-        ctrl_outw(frqcr, FRQCR);
-
-        ctrl_outb(stbcr, STBCR);
-
-        clear_bl_bit();
-}
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index b965f0282c7d..ddafbbbab2ab 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -32,65 +32,8 @@
 #include <asm/fpu.h>
 #include <asm/syscalls.h>
 
-static int hlt_counter;
 int ubc_usercnt = 0;
 
-void (*pm_idle)(void);
-void (*pm_power_off)(void);
-EXPORT_SYMBOL(pm_power_off);
-
-static int __init nohlt_setup(char *__unused)
-{
-        hlt_counter = 1;
-        return 1;
-}
-__setup("nohlt", nohlt_setup);
-
-static int __init hlt_setup(char *__unused)
-{
-        hlt_counter = 0;
-        return 1;
-}
-__setup("hlt", hlt_setup);
-
-static void default_idle(void)
-{
-        if (!hlt_counter) {
-                clear_thread_flag(TIF_POLLING_NRFLAG);
-                smp_mb__after_clear_bit();
-                set_bl_bit();
-                while (!need_resched())
-                        cpu_sleep();
-                clear_bl_bit();
-                set_thread_flag(TIF_POLLING_NRFLAG);
-        } else
-                while (!need_resched())
-                        cpu_relax();
-}
-
-void cpu_idle(void)
-{
-        set_thread_flag(TIF_POLLING_NRFLAG);
-
-        /* endless idle loop with no priority at all */
-        while (1) {
-                void (*idle)(void) = pm_idle;
-
-                if (!idle)
-                        idle = default_idle;
-
-                tick_nohz_stop_sched_tick(1);
-                while (!need_resched())
-                        idle();
-                tick_nohz_restart_sched_tick();
-
-                preempt_enable_no_resched();
-                schedule();
-                preempt_disable();
-                check_pgt_cache();
-        }
-}
-
 void machine_restart(char * __unused)
 {
         /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
@@ -115,8 +58,8 @@ void machine_power_off(void)
 void show_regs(struct pt_regs * regs)
 {
         printk("\n");
-        printk("Pid : %d, Comm: %20s\n", task_pid_nr(current), current->comm);
-        printk("CPU : %d    %s  (%s %.*s)\n",
+        printk("Pid : %d, Comm: \t\t%s\n", task_pid_nr(current), current->comm);
+        printk("CPU : %d        \t\t%s  (%s %.*s)\n\n",
                smp_processor_id(), print_tainted(), init_utsname()->release,
                (int)strcspn(init_utsname()->version, " "),
                init_utsname()->version);
@@ -148,26 +91,16 @@ void show_regs(struct pt_regs * regs)
                regs->mach, regs->macl, regs->gbr, regs->pr);
 
         show_trace(NULL, (unsigned long *)regs->regs[15], regs);
+        show_code(regs);
 }
 
 /*
  * Create a kernel thread
  */
-
-/*
- * This is the mechanism for creating a new kernel thread.
- *
- */
-extern void kernel_thread_helper(void);
-__asm__(".align 5\n"
-        "kernel_thread_helper:\n\t"
-        "jsr    @r5\n\t"
-        " nop\n\t"
-        "mov.l  1f, r1\n\t"
-        "jsr    @r1\n\t"
-        " mov   r0, r4\n\t"
-        ".align 2\n\t"
-        "1:.long do_exit");
+ATTRIB_NORET void kernel_thread_helper(void *arg, int (*fn)(void *))
+{
+        do_exit(fn(arg));
+}
 
 /* Don't use this in BL=1(cli).  Or else, CPU resets! */
 int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index b7aa09235b51..a7e5f2e74bac 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -23,7 +23,6 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <linux/proc_fs.h>
 #include <linux/io.h>
 #include <asm/syscalls.h>
 #include <asm/uaccess.h>
@@ -33,56 +32,6 @@
 
 struct task_struct *last_task_used_math = NULL;
 
-static int hlt_counter = 1;
-
-#define HARD_IDLE_TIMEOUT (HZ / 3)
-
-static int __init nohlt_setup(char *__unused)
-{
-        hlt_counter = 1;
-        return 1;
-}
-
-static int __init hlt_setup(char *__unused)
-{
-        hlt_counter = 0;
-        return 1;
-}
-
-__setup("nohlt", nohlt_setup);
-__setup("hlt", hlt_setup);
-
-static inline void hlt(void)
-{
-        __asm__ __volatile__ ("sleep" : : : "memory");
-}
-
-/*
- * The idle loop on a uniprocessor SH..
- */
-void cpu_idle(void)
-{
-        /* endless idle loop with no priority at all */
-        while (1) {
-                if (hlt_counter) {
-                        while (!need_resched())
-                                cpu_relax();
-                } else {
-                        local_irq_disable();
-                        while (!need_resched()) {
-                                local_irq_enable();
-                                hlt();
-                                local_irq_disable();
-                        }
-                        local_irq_enable();
-                }
-                preempt_enable_no_resched();
-                schedule();
-                preempt_disable();
-        }
-
-}
-
 void machine_restart(char * __unused)
 {
         extern void phys_stext(void);
@@ -97,13 +46,6 @@ void machine_halt(void)
 
 void machine_power_off(void)
 {
-#if 0
-        /* Disable watchdog timer */
-        ctrl_outl(0xa5000000, WTCSR);
-        /* Configure deep standby on sleep */
-        ctrl_outl(0x03, STBCR);
-#endif
-
         __asm__ __volatile__ (
                 "sleep\n\t"
                 "synci\n\t"
@@ -113,9 +55,6 @@ void machine_power_off(void)
         panic("Unexpected wakeup!\n");
 }
 
-void (*pm_power_off)(void) = machine_power_off;
-EXPORT_SYMBOL(pm_power_off);
-
 void show_regs(struct pt_regs * regs)
 {
         unsigned long long ah, al, bh, bl, ch, cl;
@@ -365,18 +304,6 @@ void show_regs(struct pt_regs * regs)
         }
 }
 
-struct task_struct * alloc_task_struct(void)
-{
-        /* Get task descriptor pages */
-        return (struct task_struct *)
-                __get_free_pages(GFP_KERNEL, get_order(THREAD_SIZE));
-}
-
-void free_task_struct(struct task_struct *p)
-{
-        free_pages((unsigned long) p, get_order(THREAD_SIZE));
-}
-
 /*
  * Create a kernel thread
  */
@@ -662,41 +589,3 @@ unsigned long get_wchan(struct task_struct *p)
 #endif
         return pc;
 }
-
-/* Provide a /proc/asids file that lists out the
-   ASIDs currently associated with the processes.  (If the DM.PC register is
-   examined through the debug link, this shows ASID + PC.  To make use of this,
-   the PID->ASID relationship needs to be known.  This is primarily for
-   debugging.)
-   */
-
-#if defined(CONFIG_SH64_PROC_ASIDS)
-static int
-asids_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void *data)
-{
-        int len=0;
-        struct task_struct *p;
-        read_lock(&tasklist_lock);
-        for_each_process(p) {
-                int pid = p->pid;
-
-                if (!pid)
-                        continue;
-                if (p->mm)
-                        len += sprintf(buf+len, "%5d : %02lx\n", pid,
-                                       asid_cache(smp_processor_id()));
-                else
-                        len += sprintf(buf+len, "%5d : (none)\n", pid);
-        }
-        read_unlock(&tasklist_lock);
-        *eof = 1;
-        return len;
-}
-
-static int __init register_proc_asids(void)
-{
-        create_proc_read_entry("asids", 0, NULL, asids_proc_info, NULL);
-        return 0;
-}
-__initcall(register_proc_asids);
-#endif
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index e15b099c1f06..695097438f02 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -2,7 +2,7 @@
  * arch/sh/kernel/ptrace_64.c
  *
  * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003 - 2007  Paul Mundt
+ * Copyright (C) 2003 - 2008  Paul Mundt
  *
  * Started from SH3/4 version:
  *   SuperH version:   Copyright (C) 1999, 2000  Kaz Kojima & Niibe Yutaka
@@ -29,6 +29,8 @@
 #include <linux/audit.h>
 #include <linux/seccomp.h>
 #include <linux/tracehook.h>
+#include <linux/elf.h>
+#include <linux/regset.h>
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
@@ -137,6 +139,165 @@ void user_disable_single_step(struct task_struct *child)
         regs->sr &= ~SR_SSTEP;
 }
 
+static int genregs_get(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       void *kbuf, void __user *ubuf)
+{
+        const struct pt_regs *regs = task_pt_regs(target);
+        int ret;
+
+        /* PC, SR, SYSCALL */
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  &regs->pc,
+                                  0, 3 * sizeof(unsigned long long));
+
+        /* R1 -> R63 */
+        if (!ret)
+                ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                          regs->regs,
+                                          offsetof(struct pt_regs, regs[0]),
+                                          63 * sizeof(unsigned long long));
+        /* TR0 -> TR7 */
+        if (!ret)
+                ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                          regs->tregs,
+                                          offsetof(struct pt_regs, tregs[0]),
+                                          8 * sizeof(unsigned long long));
+
+        if (!ret)
+                ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                               sizeof(struct pt_regs), -1);
+
+        return ret;
+}
+
+static int genregs_set(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       const void *kbuf, const void __user *ubuf)
+{
+        struct pt_regs *regs = task_pt_regs(target);
+        int ret;
+
+        /* PC, SR, SYSCALL */
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 &regs->pc,
+                                 0, 3 * sizeof(unsigned long long));
+
+        /* R1 -> R63 */
+        if (!ret && count > 0)
+                ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                         regs->regs,
+                                         offsetof(struct pt_regs, regs[0]),
+                                         63 * sizeof(unsigned long long));
+
+        /* TR0 -> TR7 */
+        if (!ret && count > 0)
+                ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                         regs->tregs,
+                                         offsetof(struct pt_regs, tregs[0]),
+                                         8 * sizeof(unsigned long long));
+
+        if (!ret)
+                ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                                sizeof(struct pt_regs), -1);
+
+        return ret;
+}
+
+#ifdef CONFIG_SH_FPU
+int fpregs_get(struct task_struct *target,
+               const struct user_regset *regset,
+               unsigned int pos, unsigned int count,
+               void *kbuf, void __user *ubuf)
+{
+        int ret;
+
+        ret = init_fpu(target);
+        if (ret)
+                return ret;
+
+        return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                   &target->thread.fpu.hard, 0, -1);
+}
+
+static int fpregs_set(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       const void *kbuf, const void __user *ubuf)
+{
+        int ret;
+
+        ret = init_fpu(target);
+        if (ret)
+                return ret;
+
+        set_stopped_child_used_math(target);
+
+        return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                  &target->thread.fpu.hard, 0, -1);
+}
+
+static int fpregs_active(struct task_struct *target,
+                         const struct user_regset *regset)
+{
+        return tsk_used_math(target) ? regset->n : 0;
+}
+#endif
+
+/*
+ * These are our native regset flavours.
+ */
+enum sh_regset {
+        REGSET_GENERAL,
+#ifdef CONFIG_SH_FPU
+        REGSET_FPU,
+#endif
+};
+
+static const struct user_regset sh_regsets[] = {
+        /*
+         * Format is:
+         *      PC, SR, SYSCALL,
+         *      R1 --> R63,
+         *      TR0 --> TR7,
+         */
+        [REGSET_GENERAL] = {
+                .core_note_type = NT_PRSTATUS,
+                .n              = ELF_NGREG,
+                .size           = sizeof(long long),
+                .align          = sizeof(long long),
+                .get            = genregs_get,
+                .set            = genregs_set,
+        },
+
+#ifdef CONFIG_SH_FPU
+        [REGSET_FPU] = {
+                .core_note_type = NT_PRFPREG,
+                .n              = sizeof(struct user_fpu_struct) /
+                                  sizeof(long long),
+                .size           = sizeof(long long),
+                .align          = sizeof(long long),
+                .get            = fpregs_get,
+                .set            = fpregs_set,
+                .active         = fpregs_active,
+        },
+#endif
+};
+
+static const struct user_regset_view user_sh64_native_view = {
+        .name           = "sh64",
+        .e_machine      = EM_SH,
+        .regsets        = sh_regsets,
+        .n              = ARRAY_SIZE(sh_regsets),
+};
+
+const struct user_regset_view *task_user_regset_view(struct task_struct *task)
+{
+        return &user_sh64_native_view;
+}
+
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
 {
         int ret;
@@ -195,10 +356,33 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 }
                 break;
 
+        case PTRACE_GETREGS:
+                return copy_regset_to_user(child, &user_sh64_native_view,
+                                           REGSET_GENERAL,
+                                           0, sizeof(struct pt_regs),
+                                           (void __user *)data);
+        case PTRACE_SETREGS:
+                return copy_regset_from_user(child, &user_sh64_native_view,
+                                             REGSET_GENERAL,
+                                             0, sizeof(struct pt_regs),
+                                             (const void __user *)data);
+#ifdef CONFIG_SH_FPU
+        case PTRACE_GETFPREGS:
+                return copy_regset_to_user(child, &user_sh64_native_view,
+                                           REGSET_FPU,
+                                           0, sizeof(struct user_fpu_struct),
+                                           (void __user *)data);
+        case PTRACE_SETFPREGS:
+                return copy_regset_from_user(child, &user_sh64_native_view,
+                                             REGSET_FPU,
+                                             0, sizeof(struct user_fpu_struct),
+                                             (const void __user *)data);
+#endif
         default:
                 ret = ptrace_request(child, request, addr, data);
                 break;
         }
+
         return ret;
 }
 
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index e7152cc6930e..534247508572 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -417,6 +417,7 @@ void __init setup_arch(char **cmdline_p)
 }
 
 static const char *cpu_name[] = {
+        [CPU_SH7201]    = "SH7201",
         [CPU_SH7203]    = "SH7203",     [CPU_SH7263]    = "SH7263",
         [CPU_SH7206]    = "SH7206",     [CPU_SH7619]    = "SH7619",
         [CPU_SH7705]    = "SH7705",     [CPU_SH7706]    = "SH7706",
diff --git a/arch/sh/kernel/sh_bios.c b/arch/sh/kernel/sh_bios.c
index d1bcac4fa269..c852f7805728 100644
--- a/arch/sh/kernel/sh_bios.c
+++ b/arch/sh/kernel/sh_bios.c
@@ -8,69 +8,50 @@
 #include <linux/module.h>
 #include <asm/sh_bios.h>
 
-#define BIOS_CALL_CONSOLE_WRITE         0
-#define BIOS_CALL_READ_BLOCK            1
+#define BIOS_CALL_CONSOLE_WRITE         0
 #define BIOS_CALL_ETH_NODE_ADDR         10
 #define BIOS_CALL_SHUTDOWN              11
-#define BIOS_CALL_CHAR_OUT              0x1f    /* TODO: hack */
-#define BIOS_CALL_GDB_GET_MODE_PTR      0xfe
-#define BIOS_CALL_GDB_DETACH            0xff
+#define BIOS_CALL_CHAR_OUT              0x1f    /* TODO: hack */
+#define BIOS_CALL_GDB_DETACH            0xff
 
-static __inline__ long sh_bios_call(long func, long arg0, long arg1, long arg2, long arg3)
+static inline long sh_bios_call(long func, long arg0, long arg1, long arg2,
+                                    long arg3)
 {
-    register long r0 __asm__("r0") = func;
-    register long r4 __asm__("r4") = arg0;
-    register long r5 __asm__("r5") = arg1;
-    register long r6 __asm__("r6") = arg2;
-    register long r7 __asm__("r7") = arg3;
-    __asm__ __volatile__("trapa #0x3f"
-         : "=z" (r0)
-         : "0" (r0), "r" (r4), "r" (r5), "r" (r6), "r" (r7)
-         : "memory");
-    return r0;
+        register long r0 __asm__("r0") = func;
+        register long r4 __asm__("r4") = arg0;
+        register long r5 __asm__("r5") = arg1;
+        register long r6 __asm__("r6") = arg2;
+        register long r7 __asm__("r7") = arg3;
+
+        __asm__ __volatile__("trapa     #0x3f":"=z"(r0)
+                             :"0"(r0), "r"(r4), "r"(r5), "r"(r6), "r"(r7)
+                             :"memory");
+        return r0;
 }
 
-
 void sh_bios_console_write(const char *buf, unsigned int len)
 {
-    sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0);
+        sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0);
 }
 
-
 void sh_bios_char_out(char ch)
 {
-    sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0);
-}
-
-
-int sh_bios_in_gdb_mode(void)
-{
-    static char queried = 0;
-    static char *gdb_mode_p = 0;
-
-    if (!queried)
-    {
-        /* Query the gdb stub for address of its gdb mode variable */
-        long r = sh_bios_call(BIOS_CALL_GDB_GET_MODE_PTR, 0, 0, 0, 0);
-        if (r != ~0)    /* BIOS returns -1 for unknown function */
-            gdb_mode_p = (char *)r;
-        queried = 1;
-    }
-    return (gdb_mode_p != 0 ? *gdb_mode_p : 0);
+        sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0);
 }
 
 void sh_bios_gdb_detach(void)
 {
-    sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0);
+        sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0);
 }
-EXPORT_SYMBOL(sh_bios_gdb_detach);
+EXPORT_SYMBOL_GPL(sh_bios_gdb_detach);
 
-void sh_bios_get_node_addr (unsigned char *node_addr)
+void sh_bios_get_node_addr(unsigned char *node_addr)
 {
-    sh_bios_call(BIOS_CALL_ETH_NODE_ADDR, 0, (long)node_addr, 0, 0);
+        sh_bios_call(BIOS_CALL_ETH_NODE_ADDR, 0, (long)node_addr, 0, 0);
 }
+EXPORT_SYMBOL_GPL(sh_bios_get_node_addr);
 
 void sh_bios_shutdown(unsigned int how)
 {
-    sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0);
+        sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0);
 }
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 92ae5e6c099e..528de2955c81 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -52,16 +52,12 @@ EXPORT_SYMBOL(__const_udelay);
 
 #define DECLARE_EXPORT(name)            \
         extern void name(void);EXPORT_SYMBOL(name)
-#define MAYBE_DECLARE_EXPORT(name)      \
-        extern void name(void) __weak;EXPORT_SYMBOL(name)
 
-/* These symbols are generated by the compiler itself */
 DECLARE_EXPORT(__udivsi3);
 DECLARE_EXPORT(__sdivsi3);
+DECLARE_EXPORT(__lshrsi3);
 DECLARE_EXPORT(__ashrsi3);
 DECLARE_EXPORT(__ashlsi3);
-DECLARE_EXPORT(__ashrdi3);
-DECLARE_EXPORT(__ashldi3);
 DECLARE_EXPORT(__ashiftrt_r4_6);
 DECLARE_EXPORT(__ashiftrt_r4_7);
 DECLARE_EXPORT(__ashiftrt_r4_8);
@@ -79,8 +75,7 @@ DECLARE_EXPORT(__ashiftrt_r4_23);
 DECLARE_EXPORT(__ashiftrt_r4_24);
 DECLARE_EXPORT(__ashiftrt_r4_27);
 DECLARE_EXPORT(__ashiftrt_r4_30);
-DECLARE_EXPORT(__lshrsi3);
-DECLARE_EXPORT(__lshrdi3);
+DECLARE_EXPORT(__movstr);
 DECLARE_EXPORT(__movstrSI8);
 DECLARE_EXPORT(__movstrSI12);
 DECLARE_EXPORT(__movstrSI16);
@@ -95,31 +90,17 @@ DECLARE_EXPORT(__movstrSI48);
 DECLARE_EXPORT(__movstrSI52);
 DECLARE_EXPORT(__movstrSI56);
 DECLARE_EXPORT(__movstrSI60);
-#if __GNUC__ == 4
-DECLARE_EXPORT(__movmem);
-#else
-DECLARE_EXPORT(__movstr);
-#endif
-
-#if __GNUC__ == 4
+DECLARE_EXPORT(__movstr_i4_even);
+DECLARE_EXPORT(__movstr_i4_odd);
+DECLARE_EXPORT(__movstrSI12_i4);
 DECLARE_EXPORT(__movmem_i4_even);
 DECLARE_EXPORT(__movmem_i4_odd);
 DECLARE_EXPORT(__movmemSI12_i4);
-
-#if (__GNUC_MINOR__ >= 2 || defined(__GNUC_STM_RELEASE__))
-/*
- * GCC >= 4.2 emits these for division, as do GCC 4.1.x versions of the ST
- * compiler which include backported patches.
- */
 DECLARE_EXPORT(__udiv_qrnnd_16);
-MAYBE_DECLARE_EXPORT(__sdivsi3_i4i);
-MAYBE_DECLARE_EXPORT(__udivsi3_i4i);
-#endif
-#else /* GCC 3.x */
-DECLARE_EXPORT(__movstr_i4_even);
-DECLARE_EXPORT(__movstr_i4_odd);
-DECLARE_EXPORT(__movstrSI12_i4);
-#endif /* __GNUC__ == 4 */
+DECLARE_EXPORT(__sdivsi3_i4);
+DECLARE_EXPORT(__udivsi3_i4);
+DECLARE_EXPORT(__sdivsi3_i4i);
+DECLARE_EXPORT(__udivsi3_i4i);
 
 #if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
         defined(CONFIG_SH7705_CACHE_32KB))
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index 9324d32adacc..0d74d6b8774e 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -65,15 +65,16 @@ EXPORT_SYMBOL(copy_page);
 EXPORT_SYMBOL(__copy_user);
 EXPORT_SYMBOL(empty_zero_page);
 EXPORT_SYMBOL(memcpy);
+EXPORT_SYMBOL(memset);
 EXPORT_SYMBOL(__udelay);
 EXPORT_SYMBOL(__ndelay);
 EXPORT_SYMBOL(__const_udelay);
+EXPORT_SYMBOL(strlen);
+EXPORT_SYMBOL(strcpy);
 
 /* Ugh.  These come in from libgcc.a at link time. */
 #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
 
 DECLARE_EXPORT(__sdivsi3);
-DECLARE_EXPORT(__sdivsi3_2);
-DECLARE_EXPORT(__muldi3);
 DECLARE_EXPORT(__udivsi3);
 DECLARE_EXPORT(__div_table);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 69d09c0b3498..77c21bde376a 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -533,7 +533,6 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
 {
         int ret;
 
-
         /* Set up the stack frame */
         if (ka->sa.sa_flags & SA_SIGINFO)
                 ret = setup_rt_frame(sig, ka, info, oldset, regs);
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index ce3e851dffcb..b22fdfaaa191 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -2,7 +2,7 @@
  * arch/sh/kernel/signal_64.c
  *
  * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003  Paul Mundt
+ * Copyright (C) 2003 - 2008  Paul Mundt
  * Copyright (C) 2004  Richard Curnow
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -43,10 +43,38 @@
 
 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
 
-static void
+static int
 handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
                 sigset_t *oldset, struct pt_regs * regs);
 
+static inline void
+handle_syscall_restart(struct pt_regs *regs, struct sigaction *sa)
+{
+        /* If we're not from a syscall, bail out */
+        if (regs->syscall_nr < 0)
+                return;
+
+        /* check for system call restart.. */
+        switch (regs->regs[REG_RET]) {
+                case -ERESTART_RESTARTBLOCK:
+                case -ERESTARTNOHAND:
+                no_system_call_restart:
+                        regs->regs[REG_RET] = -EINTR;
+                        regs->sr |= 1;
+                        break;
+
+                case -ERESTARTSYS:
+                        if (!(sa->sa_flags & SA_RESTART))
+                                goto no_system_call_restart;
+                /* fallthrough */
+                case -ERESTARTNOINTR:
+                        /* Decode syscall # */
+                        regs->regs[REG_RET] = regs->syscall_nr;
+                        regs->pc -= 4;
+                        break;
+        }
+}
+
 /*
  * Note that 'init' is a special process: it doesn't get signals it doesn't
  * want to handle. Thus you cannot kill init even with a SIGKILL even by
@@ -80,21 +108,23 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)
                 oldset = &current->blocked;
 
         signr = get_signal_to_deliver(&info, &ka, regs, 0);
-
         if (signr > 0) {
-                /* Whee!  Actually deliver the signal.  */
-                handle_signal(signr, &info, &ka, oldset, regs);
+                if (regs->sr & 1)
+                        handle_syscall_restart(regs, &ka.sa);
 
-                /*
-                 * If a signal was successfully delivered, the saved sigmask
-                 * is in its frame, and we can clear the TIF_RESTORE_SIGMASK
-                 * flag.
-                 */
-                if (test_thread_flag(TIF_RESTORE_SIGMASK))
-                        clear_thread_flag(TIF_RESTORE_SIGMASK);
-
-                tracehook_signal_handler(signr, &info, &ka, regs, 0);
-                return 1;
+                /* Whee!  Actually deliver the signal.  */
+                if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
+                        /*
+                         * If a signal was successfully delivered, the
+                         * saved sigmask is in its frame, and we can
+                         * clear the TIF_RESTORE_SIGMASK flag.
+                         */
+                        if (test_thread_flag(TIF_RESTORE_SIGMASK))
+                                clear_thread_flag(TIF_RESTORE_SIGMASK);
+
+                        tracehook_signal_handler(signr, &info, &ka, regs, 0);
+                        return 1;
+                }
         }
 
 no_signal:
@@ -129,7 +159,6 @@ no_signal:
 /*
  * Atomically swap in the new signal mask, and wait for a signal.
  */
-
 asmlinkage int
 sys_sigsuspend(old_sigset_t mask,
                unsigned long r3, unsigned long r4, unsigned long r5,
@@ -235,20 +264,16 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
         return do_sigaltstack(uss, uoss, REF_REG_SP);
 }
 
-
 /*
  * Do a signal return; undo the signal stack.
  */
-
-struct sigframe
-{
+struct sigframe {
         struct sigcontext sc;
         unsigned long extramask[_NSIG_WORDS-1];
         long long retcode[2];
 };
 
-struct rt_sigframe
-{
+struct rt_sigframe {
         struct siginfo __user *pinfo;
         void *puc;
         struct siginfo info;
@@ -450,7 +475,6 @@ badframe:
 /*
  * Set up a signal frame.
  */
-
 static int
 setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
                  unsigned long mask)
@@ -504,8 +528,8 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
 void sa_default_restorer(void);         /* See comments below */
 void sa_default_rt_restorer(void);      /* See comments below */
 
-static void setup_frame(int sig, struct k_sigaction *ka,
-                        sigset_t *set, struct pt_regs *regs)
+static int setup_frame(int sig, struct k_sigaction *ka,
+                       sigset_t *set, struct pt_regs *regs)
 {
         struct sigframe __user *frame;
         int err = 0;
@@ -596,23 +620,21 @@ static void setup_frame(int sig, struct k_sigaction *ka,
 
         set_fs(USER_DS);
 
-#if DEBUG_SIG
         /* Broken %016Lx */
-        printk("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n",
-                signal,
-                current->comm, current->pid, frame,
-                regs->pc >> 32, regs->pc & 0xffffffff,
-                DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff);
-#endif
+        pr_debug("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n",
+                 signal, current->comm, current->pid, frame,
+                 regs->pc >> 32, regs->pc & 0xffffffff,
+                 DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff);
 
-        return;
+        return 0;
 
 give_sigsegv:
         force_sigsegv(sig, current);
+        return -EFAULT;
 }
 
-static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
-                           sigset_t *set, struct pt_regs *regs)
+static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
+                          sigset_t *set, struct pt_regs *regs)
 {
         struct rt_sigframe __user *frame;
         int err = 0;
@@ -702,62 +724,46 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 
         set_fs(USER_DS);
 
-#if DEBUG_SIG
-        /* Broken %016Lx */
-        printk("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n",
-                signal,
-                current->comm, current->pid, frame,
-                regs->pc >> 32, regs->pc & 0xffffffff,
-                DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff);
-#endif
+        pr_debug("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n",
+                 signal, current->comm, current->pid, frame,
+                 regs->pc >> 32, regs->pc & 0xffffffff,
+                 DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff);
 
-        return;
+        return 0;
 
 give_sigsegv:
         force_sigsegv(sig, current);
+        return -EFAULT;
 }
 
 /*
  * OK, we're invoking a handler
  */
-
-static void
+static int
 handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
                 sigset_t *oldset, struct pt_regs * regs)
 {
-        /* Are we from a system call? */
-        if (regs->syscall_nr >= 0) {
-                /* If so, check system call restarting.. */
-                switch (regs->regs[REG_RET]) {
-                        case -ERESTART_RESTARTBLOCK:
-                        case -ERESTARTNOHAND:
-                        no_system_call_restart:
-                                regs->regs[REG_RET] = -EINTR;
-                                break;
-
-                        case -ERESTARTSYS:
-                                if (!(ka->sa.sa_flags & SA_RESTART))
-                                        goto no_system_call_restart;
-                        /* fallthrough */
-                        case -ERESTARTNOINTR:
-                                /* Decode syscall # */
-                                regs->regs[REG_RET] = regs->syscall_nr;
-                                regs->pc -= 4;
-                }
-        }
+        int ret;
 
         /* Set up the stack frame */
         if (ka->sa.sa_flags & SA_SIGINFO)
-                setup_rt_frame(sig, ka, info, oldset, regs);
+                ret = setup_rt_frame(sig, ka, info, oldset, regs);
         else
-                setup_frame(sig, ka, oldset, regs);
+                ret = setup_frame(sig, ka, oldset, regs);
+
+        if (ka->sa.sa_flags & SA_ONESHOT)
+                ka->sa.sa_handler = SIG_DFL;
+
+        if (ret == 0) {
+                spin_lock_irq(&current->sighand->siglock);
+                sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
+                if (!(ka->sa.sa_flags & SA_NODEFER))
+                        sigaddset(&current->blocked,sig);
+                recalc_sigpending();
+                spin_unlock_irq(&current->sighand->siglock);
+        }
 
-        spin_lock_irq(&current->sighand->siglock);
-        sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
-        if (!(ka->sa.sa_flags & SA_NODEFER))
-                sigaddset(&current->blocked,sig);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
+        return ret;
 }
 
 asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 3c5ad1660bbc..8f4027412614 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -31,12 +31,6 @@
 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
 
-cpumask_t cpu_possible_map;
-EXPORT_SYMBOL(cpu_possible_map);
-
-cpumask_t cpu_online_map;
-EXPORT_SYMBOL(cpu_online_map);
-
 static inline void __init smp_store_cpu_info(unsigned int cpu)
 {
         struct sh_cpuinfo *c = cpu_data + cpu;
@@ -190,11 +184,11 @@ void arch_send_call_function_single_ipi(int cpu)
         plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE);
 }
 
-void smp_timer_broadcast(cpumask_t mask)
+void smp_timer_broadcast(const struct cpumask *mask)
 {
         int cpu;
 
-        for_each_cpu_mask(cpu, mask)
+        for_each_cpu(cpu, mask)
                 plat_send_ipi(cpu, SMP_MSG_TIMER);
 }
 
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 38f098c9c72d..58dfc02c7af1 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -22,102 +22,10 @@
 #include <linux/module.h>
 #include <linux/fs.h>
 #include <linux/ipc.h>
-#include <asm/cacheflush.h>
 #include <asm/syscalls.h>
 #include <asm/uaccess.h>
 #include <asm/unistd.h>
 
-unsigned long shm_align_mask = PAGE_SIZE - 1;   /* Sane caches */
-EXPORT_SYMBOL(shm_align_mask);
-
-#ifdef CONFIG_MMU
-/*
- * To avoid cache aliases, we map the shared page with same color.
- */
-#define COLOUR_ALIGN(addr, pgoff)                               \
-        ((((addr) + shm_align_mask) & ~shm_align_mask) +        \
-         (((pgoff) << PAGE_SHIFT) & shm_align_mask))
-
-unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
-        unsigned long len, unsigned long pgoff, unsigned long flags)
-{
-        struct mm_struct *mm = current->mm;
-        struct vm_area_struct *vma;
-        unsigned long start_addr;
-        int do_colour_align;
-
-        if (flags & MAP_FIXED) {
-                /* We do not accept a shared mapping if it would violate
-                 * cache aliasing constraints.
-                 */
-                if ((flags & MAP_SHARED) && (addr & shm_align_mask))
-                        return -EINVAL;
-                return addr;
-        }
-
-        if (unlikely(len > TASK_SIZE))
-                return -ENOMEM;
-
-        do_colour_align = 0;
-        if (filp || (flags & MAP_SHARED))
-                do_colour_align = 1;
-
-        if (addr) {
-                if (do_colour_align)
-                        addr = COLOUR_ALIGN(addr, pgoff);
-                else
-                        addr = PAGE_ALIGN(addr);
-
-                vma = find_vma(mm, addr);
-                if (TASK_SIZE - len >= addr &&
-                    (!vma || addr + len <= vma->vm_start))
-                        return addr;
-        }
-
-        if (len > mm->cached_hole_size) {
-                start_addr = addr = mm->free_area_cache;
-        } else {
-                mm->cached_hole_size = 0;
-                start_addr = addr = TASK_UNMAPPED_BASE;
-        }
-
-full_search:
-        if (do_colour_align)
-                addr = COLOUR_ALIGN(addr, pgoff);
-        else
-                addr = PAGE_ALIGN(mm->free_area_cache);
-
-        for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
-                /* At this point:  (!vma || addr < vma->vm_end). */
-                if (unlikely(TASK_SIZE - len < addr)) {
-                        /*
-                         * Start a new search - just in case we missed
-                         * some holes.
-                         */
-                        if (start_addr != TASK_UNMAPPED_BASE) {
-                                start_addr = addr = TASK_UNMAPPED_BASE;
-                                mm->cached_hole_size = 0;
-                                goto full_search;
-                        }
-                        return -ENOMEM;
-                }
-                if (likely(!vma || addr + len <= vma->vm_start)) {
-                        /*
-                         * Remember the place where we stopped the search:
-                         */
-                        mm->free_area_cache = addr + len;
-                        return addr;
-                }
-                if (addr + mm->cached_hole_size < vma->vm_start)
-                        mm->cached_hole_size = vma->vm_start - addr;
-
-                addr = vma->vm_end;
-                if (do_colour_align)
-                        addr = COLOUR_ALIGN(addr, pgoff);
-        }
-}
-#endif /* CONFIG_MMU */
-
 static inline long
 do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
          unsigned long flags, int fd, unsigned long pgoff)
diff --git a/arch/sh/kernel/time_32.c b/arch/sh/kernel/time_32.c
index 23ca711c27d2..8457f83242c5 100644
--- a/arch/sh/kernel/time_32.c
+++ b/arch/sh/kernel/time_32.c
@@ -125,11 +125,6 @@ void handle_timer_tick(void)
         if (current->pid)
                 profile_tick(CPU_PROFILING);
 
-#ifdef CONFIG_HEARTBEAT
-        if (sh_mv.mv_heartbeat != NULL)
-                sh_mv.mv_heartbeat();
-#endif
-
         /*
          * Here we are in the timer irq handler. We just have irqs locally
          * disabled but we don't know if the timer_bh is running on the other
@@ -277,11 +272,4 @@ void __init time_init(void)
                        ((sh_hpt_frequency + 500) / 1000) / 1000,
                        ((sh_hpt_frequency + 500) / 1000) % 1000);
 
-#if defined(CONFIG_SH_KGDB)
-        /*
-         * Set up kgdb as requested. We do it here because the serial
-         * init uses the timer vars we just set up for figuring baud.
-         */
-        kgdb_init();
-#endif
 }
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
index bbb2af1004d9..59d2a03e8b3c 100644
--- a/arch/sh/kernel/time_64.c
+++ b/arch/sh/kernel/time_64.c
@@ -240,11 +240,6 @@ static inline void do_timer_interrupt(void)
 
         do_timer(1);
 
-#ifdef CONFIG_HEARTBEAT
-        if (sh_mv.mv_heartbeat != NULL)
-                sh_mv.mv_heartbeat();
-#endif
-
         /*
          * If we have an externally synchronized Linux clock, then update
          * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
diff --git a/arch/sh/kernel/timers/timer-broadcast.c b/arch/sh/kernel/timers/timer-broadcast.c
index c2317635230f..96e8eaea1e62 100644
--- a/arch/sh/kernel/timers/timer-broadcast.c
+++ b/arch/sh/kernel/timers/timer-broadcast.c
@@ -51,7 +51,7 @@ void __cpuinit local_timer_setup(unsigned int cpu)
         clk->mult               = 1;
         clk->set_mode           = dummy_timer_set_mode;
         clk->broadcast          = smp_timer_broadcast;
-        clk->cpumask            = cpumask_of_cpu(cpu);
+        clk->cpumask            = cpumask_of(cpu);
 
         clockevents_register_device(clk);
 }
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
index fe453c01f9c9..c3d237e1d566 100644
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ b/arch/sh/kernel/timers/timer-mtu2.c
@@ -34,7 +34,12 @@
 #define MTU2_TIER_1     0xfffe4384
 #define MTU2_TSR_1      0xfffe4385
 #define MTU2_TCNT_1     0xfffe4386      /* 16-bit counter */
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7201)
+#define MTU2_TGRA_1     0xfffe4388
+#else
 #define MTU2_TGRA_1     0xfffe438a
+#endif
 
 #define STBCR3          0xfffe0408
 
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 3c61ddd4d43e..0db3f9510336 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -263,7 +263,7 @@ static int tmu_timer_init(void)
         tmu0_clockevent.min_delta_ns =
                         clockevent_delta2ns(1, &tmu0_clockevent);
 
-        tmu0_clockevent.cpumask = cpumask_of_cpu(0);
+        tmu0_clockevent.cpumask = cpumask_of(0);
 
         clockevents_register_device(&tmu0_clockevent);
 
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 1e5c74efbacc..c0aa3d83ec0e 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -13,6 +13,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/ptrace.h>
+#include <linux/hardirq.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
 #include <linux/module.h>
@@ -28,17 +29,6 @@
 #include <asm/fpu.h>
 #include <asm/kprobes.h>
 
-#ifdef CONFIG_SH_KGDB
-#include <asm/kgdb.h>
-#define CHK_REMOTE_DEBUG(regs)                  \
-{                                               \
-        if (kgdb_debug_hook && !user_mode(regs))\
-                (*kgdb_debug_hook)(regs);       \
-}
-#else
-#define CHK_REMOTE_DEBUG(regs)
-#endif
-
 #ifdef CONFIG_CPU_SH2
 # define TRAP_RESERVED_INST     4
 # define TRAP_ILLEGAL_SLOT_INST 6
@@ -94,7 +84,6 @@ void die(const char * str, struct pt_regs * regs, long err)
 
         printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
 
-        CHK_REMOTE_DEBUG(regs);
         print_modules();
         show_regs(regs);
 
@@ -683,13 +672,12 @@ asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
         error_code = lookup_exception_vector();
 
         local_irq_enable();
-        CHK_REMOTE_DEBUG(regs);
         force_sig(SIGILL, tsk);
         die_if_no_fixup("reserved instruction", regs, error_code);
 }
 
 #ifdef CONFIG_SH_FPU_EMU
-static int emulate_branch(unsigned short inst, struct pt_regs* regs)
+static int emulate_branch(unsigned short inst, struct pt_regs *regs)
 {
         /*
          * bfs: 8fxx: PC+=d*2+4;
@@ -702,27 +690,32 @@ static int emulate_branch(unsigned short inst, struct pt_regs* regs)
          * jsr: 4x0b: PC=Rn      after PR=PC+4;
          * rts: 000b: PC=PR;
          */
-        if ((inst & 0xfd00) == 0x8d00) {
+        if (((inst & 0xf000) == 0xb000)  ||     /* bsr */
+            ((inst & 0xf0ff) == 0x0003)  ||     /* bsrf */
+            ((inst & 0xf0ff) == 0x400b))        /* jsr */
+                regs->pr = regs->pc + 4;
+
+        if ((inst & 0xfd00) == 0x8d00) {        /* bfs, bts */
                 regs->pc += SH_PC_8BIT_OFFSET(inst);
                 return 0;
         }
 
-        if ((inst & 0xe000) == 0xa000) {
+        if ((inst & 0xe000) == 0xa000) {        /* bra, bsr */
                 regs->pc += SH_PC_12BIT_OFFSET(inst);
                 return 0;
         }
 
-        if ((inst & 0xf0df) == 0x0003) {
+        if ((inst & 0xf0df) == 0x0003) {        /* braf, bsrf */
                 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
                 return 0;
         }
 
-        if ((inst & 0xf0df) == 0x400b) {
+        if ((inst & 0xf0df) == 0x400b) {        /* jmp, jsr */
                 regs->pc = regs->regs[(inst & 0x0f00) >> 8];
                 return 0;
         }
 
-        if ((inst & 0xffff) == 0x000b) {
+        if ((inst & 0xffff) == 0x000b) {        /* rts */
                 regs->pc = regs->pr;
                 return 0;
         }
@@ -756,7 +749,6 @@ asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
         inst = lookup_exception_vector();
 
         local_irq_enable();
-        CHK_REMOTE_DEBUG(regs);
         force_sig(SIGILL, tsk);
         die_if_no_fixup("illegal slot instruction", regs, inst);
 }
@@ -868,10 +860,7 @@ void show_trace(struct task_struct *tsk, unsigned long *sp,
         if (regs && user_mode(regs))
                 return;
 
-        printk("\nCall trace: ");
-#ifdef CONFIG_KALLSYMS
-        printk("\n");
-#endif
+        printk("\nCall trace:\n");
 
         while (!kstack_end(sp)) {
                 addr = *sp++;
diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c
index 95f4de0800ec..3f7e415be86a 100644
--- a/arch/sh/kernel/vsyscall/vsyscall.c
+++ b/arch/sh/kernel/vsyscall/vsyscall.c
@@ -59,8 +59,7 @@ int __init vsyscall_init(void)
 }
 
 /* Setup a VMA at program startup for the vsyscall page */
-int arch_setup_additional_pages(struct linux_binprm *bprm,
-                                int executable_stack)
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
 {
         struct mm_struct *mm = current->mm;
         unsigned long addr;
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index 8596cc78e18d..aaea580b65bb 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -5,12 +5,26 @@
 lib-y  = delay.o memset.o memmove.o memchr.o \
          checksum.o strlen.o div64.o div64-generic.o
 
+# Extracted from libgcc
+lib-y += movmem.o ashldi3.o ashrdi3.o lshrdi3.o \
+         ashlsi3.o ashrsi3.o ashiftrt.o lshrsi3.o \
+         udiv_qrnnd.o
+
+udivsi3-y                       := udivsi3_i4i-Os.o
+
+ifneq ($(CONFIG_CC_OPTIMIZE_FOR_SIZE),y)
+udivsi3-$(CONFIG_CPU_SH3)       := udivsi3_i4i.o
+udivsi3-$(CONFIG_CPU_SH4)       := udivsi3_i4i.o
+endif
+udivsi3-y                       += udivsi3.o
+
 obj-y                           += io.o
 
 memcpy-y                        := memcpy.o
 memcpy-$(CONFIG_CPU_SH4)        := memcpy-sh4.o
 
 lib-$(CONFIG_MMU)               += copy_page.o clear_page.o
-lib-y                           += $(memcpy-y)
+lib-$(CONFIG_FUNCTION_TRACER)   += mcount.o
+lib-y                           += $(memcpy-y) $(udivsi3-y)
 
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/lib/ashiftrt.S b/arch/sh/lib/ashiftrt.S
new file mode 100644
index 000000000000..45ce86558f46
--- /dev/null
+++ b/arch/sh/lib/ashiftrt.S
@@ -0,0 +1,149 @@
+/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+   2004, 2005, 2006
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
+!! recoded in assembly by Toshiyasu Morita
+!! tm@netcom.com
+
+/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
+   ELF local label prefixes by J"orn Rennecke
+   amylaar@cygnus.com  */
+
+        .global __ashiftrt_r4_0
+        .global __ashiftrt_r4_1
+        .global __ashiftrt_r4_2
+        .global __ashiftrt_r4_3
+        .global __ashiftrt_r4_4
+        .global __ashiftrt_r4_5
+        .global __ashiftrt_r4_6
+        .global __ashiftrt_r4_7
+        .global __ashiftrt_r4_8
+        .global __ashiftrt_r4_9
+        .global __ashiftrt_r4_10
+        .global __ashiftrt_r4_11
+        .global __ashiftrt_r4_12
+        .global __ashiftrt_r4_13
+        .global __ashiftrt_r4_14
+        .global __ashiftrt_r4_15
+        .global __ashiftrt_r4_16
+        .global __ashiftrt_r4_17
+        .global __ashiftrt_r4_18
+        .global __ashiftrt_r4_19
+        .global __ashiftrt_r4_20
+        .global __ashiftrt_r4_21
+        .global __ashiftrt_r4_22
+        .global __ashiftrt_r4_23
+        .global __ashiftrt_r4_24
+        .global __ashiftrt_r4_25
+        .global __ashiftrt_r4_26
+        .global __ashiftrt_r4_27
+        .global __ashiftrt_r4_28
+        .global __ashiftrt_r4_29
+        .global __ashiftrt_r4_30
+        .global __ashiftrt_r4_31
+        .global __ashiftrt_r4_32
+
+        .align  1
+__ashiftrt_r4_32:
+__ashiftrt_r4_31:
+        rotcl   r4
+        rts
+        subc    r4,r4
+__ashiftrt_r4_30:
+        shar    r4
+__ashiftrt_r4_29:
+        shar    r4
+__ashiftrt_r4_28:
+        shar    r4
+__ashiftrt_r4_27:
+        shar    r4
+__ashiftrt_r4_26:
+        shar    r4
+__ashiftrt_r4_25:
+        shar    r4
+__ashiftrt_r4_24:
+        shlr16  r4
+        shlr8   r4
+        rts
+        exts.b  r4,r4
+__ashiftrt_r4_23:
+        shar    r4
+__ashiftrt_r4_22:
+        shar    r4
+__ashiftrt_r4_21:
+        shar    r4
+__ashiftrt_r4_20:
+        shar    r4
+__ashiftrt_r4_19:
+        shar    r4
+__ashiftrt_r4_18:
+        shar    r4
+__ashiftrt_r4_17:
+        shar    r4
+__ashiftrt_r4_16:
+        shlr16  r4
+        rts
+        exts.w  r4,r4
+__ashiftrt_r4_15:
+        shar    r4
+__ashiftrt_r4_14:
+        shar    r4
+__ashiftrt_r4_13:
+        shar    r4
+__ashiftrt_r4_12:
+        shar    r4
+__ashiftrt_r4_11:
+        shar    r4
+__ashiftrt_r4_10:
+        shar    r4
+__ashiftrt_r4_9:
+        shar    r4
+__ashiftrt_r4_8:
+        shar    r4
+__ashiftrt_r4_7:
+        shar    r4
+__ashiftrt_r4_6:
+        shar    r4
+__ashiftrt_r4_5:
+        shar    r4
+__ashiftrt_r4_4:
+        shar    r4
+__ashiftrt_r4_3:
+        shar    r4
+__ashiftrt_r4_2:
+        shar    r4
+__ashiftrt_r4_1:
+        rts
+        shar    r4
+__ashiftrt_r4_0:
+        rts
+        nop
diff --git a/arch/sh/lib/ashldi3.c b/arch/sh/lib/ashldi3.c
new file mode 100644
index 000000000000..beb80f316095
--- /dev/null
+++ b/arch/sh/lib/ashldi3.c
@@ -0,0 +1,29 @@
+#include <linux/module.h>
+
+#include "libgcc.h"
+
+long long __ashldi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                w.s.low = 0;
+                w.s.high = (unsigned int) uu.s.low << -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.low >> bm;
+
+                w.s.low = (unsigned int) uu.s.low << b;
+                w.s.high = ((unsigned int) uu.s.high << b) | carries;
+        }
+
+        return w.ll;
+}
+
+EXPORT_SYMBOL(__ashldi3);
diff --git a/arch/sh/lib/ashlsi3.S b/arch/sh/lib/ashlsi3.S
new file mode 100644
index 000000000000..bd47e9b403a5
--- /dev/null
+++ b/arch/sh/lib/ashlsi3.S
@@ -0,0 +1,193 @@
+/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+   2004, 2005, 2006
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
+!! recoded in assembly by Toshiyasu Morita
+!! tm@netcom.com
+
+/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
+   ELF local label prefixes by J"orn Rennecke
+   amylaar@cygnus.com  */
+
+!
+! __ashlsi3
+!
+! Entry:
+!
+! r4: Value to shift
+! r5: Shifts
+!
+! Exit:
+!
+! r0: Result
+!
+! Destroys:
+!
+! (none)
+!
+        .global __ashlsi3
+        
+        .align  2
+__ashlsi3:
+        mov     #31,r0
+        and     r0,r5
+        mova    ashlsi3_table,r0
+        mov.b   @(r0,r5),r5
+#ifdef __sh1__
+        add     r5,r0
+        jmp     @r0
+#else
+        braf    r5
+#endif
+        mov     r4,r0
+
+        .align  2
+ashlsi3_table:
+        .byte           ashlsi3_0-ashlsi3_table
+        .byte           ashlsi3_1-ashlsi3_table
+        .byte           ashlsi3_2-ashlsi3_table
+        .byte           ashlsi3_3-ashlsi3_table
+        .byte           ashlsi3_4-ashlsi3_table
+        .byte           ashlsi3_5-ashlsi3_table
+        .byte           ashlsi3_6-ashlsi3_table
+        .byte           ashlsi3_7-ashlsi3_table
+        .byte           ashlsi3_8-ashlsi3_table
+        .byte           ashlsi3_9-ashlsi3_table
+        .byte           ashlsi3_10-ashlsi3_table
+        .byte           ashlsi3_11-ashlsi3_table
+        .byte           ashlsi3_12-ashlsi3_table
+        .byte           ashlsi3_13-ashlsi3_table
+        .byte           ashlsi3_14-ashlsi3_table
+        .byte           ashlsi3_15-ashlsi3_table
+        .byte           ashlsi3_16-ashlsi3_table
+        .byte           ashlsi3_17-ashlsi3_table
+        .byte           ashlsi3_18-ashlsi3_table
+        .byte           ashlsi3_19-ashlsi3_table
+        .byte           ashlsi3_20-ashlsi3_table
+        .byte           ashlsi3_21-ashlsi3_table
+        .byte           ashlsi3_22-ashlsi3_table
+        .byte           ashlsi3_23-ashlsi3_table
+        .byte           ashlsi3_24-ashlsi3_table
+        .byte           ashlsi3_25-ashlsi3_table
+        .byte           ashlsi3_26-ashlsi3_table
+        .byte           ashlsi3_27-ashlsi3_table
+        .byte           ashlsi3_28-ashlsi3_table
+        .byte           ashlsi3_29-ashlsi3_table
+        .byte           ashlsi3_30-ashlsi3_table
+        .byte           ashlsi3_31-ashlsi3_table
+
+ashlsi3_6:
+        shll2   r0
+ashlsi3_4:
+        shll2   r0
+ashlsi3_2:
+        rts
+        shll2   r0
+
+ashlsi3_7:
+        shll2   r0
+ashlsi3_5:
+        shll2   r0
+ashlsi3_3:
+        shll2   r0
+ashlsi3_1:
+        rts
+        shll    r0
+
+ashlsi3_14:
+        shll2   r0
+ashlsi3_12:
+        shll2   r0
+ashlsi3_10:
+        shll2   r0
+ashlsi3_8:
+        rts
+        shll8   r0
+
+ashlsi3_15:
+        shll2   r0
+ashlsi3_13:
+        shll2   r0
+ashlsi3_11:
+        shll2   r0
+ashlsi3_9:
+        shll8   r0
+        rts
+        shll    r0
+
+ashlsi3_22:
+        shll2   r0
+ashlsi3_20:
+        shll2   r0
+ashlsi3_18:
+        shll2   r0
+ashlsi3_16:
+        rts
+        shll16  r0
+
+ashlsi3_23:
+        shll2   r0
+ashlsi3_21:
+        shll2   r0
+ashlsi3_19:
+        shll2   r0
+ashlsi3_17:
+        shll16  r0
+        rts
+        shll    r0
+
+ashlsi3_30:
+        shll2   r0
+ashlsi3_28:
+        shll2   r0
+ashlsi3_26:
+        shll2   r0
+ashlsi3_24:
+        shll16  r0
+        rts
+        shll8   r0
+
+ashlsi3_31:
+        shll2   r0
+ashlsi3_29:
+        shll2   r0
+ashlsi3_27:
+        shll2   r0
+ashlsi3_25:
+        shll16  r0
+        shll8   r0
+        rts
+        shll    r0
+
+ashlsi3_0:
+        rts
+        nop
diff --git a/arch/sh/lib/ashrdi3.c b/arch/sh/lib/ashrdi3.c
new file mode 100644
index 000000000000..c884a912b660
--- /dev/null
+++ b/arch/sh/lib/ashrdi3.c
@@ -0,0 +1,31 @@
+#include <linux/module.h>
+
+#include "libgcc.h"
+
+long long __ashrdi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                /* w.s.high = 1..1 or 0..0 */
+                w.s.high =
+                    uu.s.high >> 31;
+                w.s.low = uu.s.high >> -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.high << bm;
+
+                w.s.high = uu.s.high >> b;
+                w.s.low = ((unsigned int) uu.s.low >> b) | carries;
+        }
+
+        return w.ll;
+}
+
+EXPORT_SYMBOL(__ashrdi3);
diff --git a/arch/sh/lib/ashrsi3.S b/arch/sh/lib/ashrsi3.S
new file mode 100644
index 000000000000..6f3cf46b77c2
--- /dev/null
+++ b/arch/sh/lib/ashrsi3.S
@@ -0,0 +1,185 @@
+/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+   2004, 2005, 2006
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
+!! recoded in assembly by Toshiyasu Morita
+!! tm@netcom.com
+
+/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
+   ELF local label prefixes by J"orn Rennecke
+   amylaar@cygnus.com  */
+
+!
+! __ashrsi3
+!
+! Entry:
+!
+! r4: Value to shift
+! r5: Shifts
+!
+! Exit:
+!
+! r0: Result
+!
+! Destroys:
+!
+! (none)
+!
+
+        .global __ashrsi3
+        
+        .align  2
+__ashrsi3:
+        mov     #31,r0
+        and     r0,r5
+        mova    ashrsi3_table,r0
+        mov.b   @(r0,r5),r5
+#ifdef __sh1__
+        add     r5,r0
+        jmp     @r0
+#else
+        braf    r5
+#endif
+        mov     r4,r0
+
+        .align  2
+ashrsi3_table:
+        .byte           ashrsi3_0-ashrsi3_table
+        .byte           ashrsi3_1-ashrsi3_table
+        .byte           ashrsi3_2-ashrsi3_table
+        .byte           ashrsi3_3-ashrsi3_table
+        .byte           ashrsi3_4-ashrsi3_table
+        .byte           ashrsi3_5-ashrsi3_table
+        .byte           ashrsi3_6-ashrsi3_table
+        .byte           ashrsi3_7-ashrsi3_table
+        .byte           ashrsi3_8-ashrsi3_table
+        .byte           ashrsi3_9-ashrsi3_table
+        .byte           ashrsi3_10-ashrsi3_table
+        .byte           ashrsi3_11-ashrsi3_table
+        .byte           ashrsi3_12-ashrsi3_table
+        .byte           ashrsi3_13-ashrsi3_table
+        .byte           ashrsi3_14-ashrsi3_table
+        .byte           ashrsi3_15-ashrsi3_table
+        .byte           ashrsi3_16-ashrsi3_table
+        .byte           ashrsi3_17-ashrsi3_table
+        .byte           ashrsi3_18-ashrsi3_table
+        .byte           ashrsi3_19-ashrsi3_table
+        .byte           ashrsi3_20-ashrsi3_table
+        .byte           ashrsi3_21-ashrsi3_table
+        .byte           ashrsi3_22-ashrsi3_table
+        .byte           ashrsi3_23-ashrsi3_table
+        .byte           ashrsi3_24-ashrsi3_table
+        .byte           ashrsi3_25-ashrsi3_table
+        .byte           ashrsi3_26-ashrsi3_table
+        .byte           ashrsi3_27-ashrsi3_table
+        .byte           ashrsi3_28-ashrsi3_table
+        .byte           ashrsi3_29-ashrsi3_table
+        .byte           ashrsi3_30-ashrsi3_table
+        .byte           ashrsi3_31-ashrsi3_table
+
+ashrsi3_31:
+        rotcl   r0
+        rts
+        subc    r0,r0
+
+ashrsi3_30:
+        shar    r0
+ashrsi3_29:
+        shar    r0
+ashrsi3_28:
+        shar    r0
+ashrsi3_27:
+        shar    r0
+ashrsi3_26:
+        shar    r0
+ashrsi3_25:
+        shar    r0
+ashrsi3_24:
+        shlr16  r0
+        shlr8   r0
+        rts
+        exts.b  r0,r0
+
+ashrsi3_23:
+        shar    r0
+ashrsi3_22:
+        shar    r0
+ashrsi3_21:
+        shar    r0
+ashrsi3_20:
+        shar    r0
+ashrsi3_19:
+        shar    r0
+ashrsi3_18:
+        shar    r0
+ashrsi3_17:
+        shar    r0
+ashrsi3_16:
+        shlr16  r0
+        rts
+        exts.w  r0,r0
+
+ashrsi3_15:
+        shar    r0
+ashrsi3_14:
+        shar    r0
+ashrsi3_13:
+        shar    r0
+ashrsi3_12:
+        shar    r0
+ashrsi3_11:
+        shar    r0
+ashrsi3_10:
+        shar    r0
+ashrsi3_9:
+        shar    r0
+ashrsi3_8:
+        shar    r0
+ashrsi3_7:
+        shar    r0
+ashrsi3_6:
+        shar    r0
+ashrsi3_5:
+        shar    r0
+ashrsi3_4:
+        shar    r0
+ashrsi3_3:
+        shar    r0
+ashrsi3_2:
+        shar    r0
+ashrsi3_1:
+        rts
+        shar    r0
+
+ashrsi3_0:
+        rts
+        nop
diff --git a/arch/sh/lib/libgcc.h b/arch/sh/lib/libgcc.h
new file mode 100644
index 000000000000..3f19d1c5d942
--- /dev/null
+++ b/arch/sh/lib/libgcc.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_LIBGCC_H
+#define __ASM_LIBGCC_H
+
+#include <asm/byteorder.h>
+
+typedef int word_type __attribute__ ((mode (__word__)));
+
+#ifdef __BIG_ENDIAN
+struct DWstruct {
+        int high, low;
+};
+#elif defined(__LITTLE_ENDIAN)
+struct DWstruct {
+        int low, high;
+};
+#else
+#error I feel sick.
+#endif
+
+typedef union
+{
+        struct DWstruct s;
+        long long ll;
+} DWunion;
+
+#endif /* __ASM_LIBGCC_H */
diff --git a/arch/sh/lib/lshrdi3.c b/arch/sh/lib/lshrdi3.c
new file mode 100644
index 000000000000..dcf8d6810b7c
--- /dev/null
+++ b/arch/sh/lib/lshrdi3.c
@@ -0,0 +1,29 @@
+#include <linux/module.h>
+
+#include "libgcc.h"
+
+long long __lshrdi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                w.s.high = 0;
+                w.s.low = (unsigned int) uu.s.high >> -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.high << bm;
+
+                w.s.high = (unsigned int) uu.s.high >> b;
+                w.s.low = ((unsigned int) uu.s.low >> b) | carries;
+        }
+
+        return w.ll;
+}
+
+EXPORT_SYMBOL(__lshrdi3);
diff --git a/arch/sh/lib/lshrsi3.S b/arch/sh/lib/lshrsi3.S
new file mode 100644
index 000000000000..1e7aaa557130
--- /dev/null
+++ b/arch/sh/lib/lshrsi3.S
@@ -0,0 +1,193 @@
+/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+   2004, 2005, 2006
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
+!! recoded in assembly by Toshiyasu Morita
+!! tm@netcom.com
+
+/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
+   ELF local label prefixes by J"orn Rennecke
+   amylaar@cygnus.com  */
+
+!
+! __lshrsi3
+!
+! Entry:
+!
+! r4: Value to shift
+! r5: Shifts
+!
+! Exit:
+!
+! r0: Result
+!
+! Destroys:
+!
+! (none)
+!
+        .global __lshrsi3
+        
+        .align  2
+__lshrsi3:
+        mov     #31,r0
+        and     r0,r5
+        mova    lshrsi3_table,r0
+        mov.b   @(r0,r5),r5
+#ifdef __sh1__
+        add     r5,r0
+        jmp     @r0
+#else
+        braf    r5
+#endif
+        mov     r4,r0
+
+        .align  2
+lshrsi3_table:
+        .byte           lshrsi3_0-lshrsi3_table
+        .byte           lshrsi3_1-lshrsi3_table
+        .byte           lshrsi3_2-lshrsi3_table
+        .byte           lshrsi3_3-lshrsi3_table
+        .byte           lshrsi3_4-lshrsi3_table
+        .byte           lshrsi3_5-lshrsi3_table
+        .byte           lshrsi3_6-lshrsi3_table
+        .byte           lshrsi3_7-lshrsi3_table
+        .byte           lshrsi3_8-lshrsi3_table
+        .byte           lshrsi3_9-lshrsi3_table
+        .byte           lshrsi3_10-lshrsi3_table
+        .byte           lshrsi3_11-lshrsi3_table
+        .byte           lshrsi3_12-lshrsi3_table
+        .byte           lshrsi3_13-lshrsi3_table
+        .byte           lshrsi3_14-lshrsi3_table
+        .byte           lshrsi3_15-lshrsi3_table
+        .byte           lshrsi3_16-lshrsi3_table
+        .byte           lshrsi3_17-lshrsi3_table
+        .byte           lshrsi3_18-lshrsi3_table
+        .byte           lshrsi3_19-lshrsi3_table
+        .byte           lshrsi3_20-lshrsi3_table
+        .byte           lshrsi3_21-lshrsi3_table
+        .byte           lshrsi3_22-lshrsi3_table
+        .byte           lshrsi3_23-lshrsi3_table
+        .byte           lshrsi3_24-lshrsi3_table
+        .byte           lshrsi3_25-lshrsi3_table
+        .byte           lshrsi3_26-lshrsi3_table
+        .byte           lshrsi3_27-lshrsi3_table
+        .byte           lshrsi3_28-lshrsi3_table
+        .byte           lshrsi3_29-lshrsi3_table
+        .byte           lshrsi3_30-lshrsi3_table
+        .byte           lshrsi3_31-lshrsi3_table
+
+lshrsi3_6:
+        shlr2   r0
+lshrsi3_4:
+        shlr2   r0
+lshrsi3_2:
+        rts
+        shlr2   r0
+
+lshrsi3_7:
+        shlr2   r0
+lshrsi3_5:
+        shlr2   r0
+lshrsi3_3:
+        shlr2   r0
+lshrsi3_1:
+        rts
+        shlr    r0
+
+lshrsi3_14:
+        shlr2   r0
+lshrsi3_12:
+        shlr2   r0
+lshrsi3_10:
+        shlr2   r0
+lshrsi3_8:
+        rts
+        shlr8   r0
+
+lshrsi3_15:
+        shlr2   r0
+lshrsi3_13:
+        shlr2   r0
+lshrsi3_11:
+        shlr2   r0
+lshrsi3_9:
+        shlr8   r0
+        rts
+        shlr    r0
+
+lshrsi3_22:
+        shlr2   r0
+lshrsi3_20:
+        shlr2   r0
+lshrsi3_18:
+        shlr2   r0
+lshrsi3_16:
+        rts
+        shlr16  r0
+
+lshrsi3_23:
+        shlr2   r0
+lshrsi3_21:
+        shlr2   r0
+lshrsi3_19:
+        shlr2   r0
+lshrsi3_17:
+        shlr16  r0
+        rts
+        shlr    r0
+
+lshrsi3_30:
+        shlr2   r0
+lshrsi3_28:
+        shlr2   r0
+lshrsi3_26:
+        shlr2   r0
+lshrsi3_24:
+        shlr16  r0
+        rts
+        shlr8   r0
+
+lshrsi3_31:
+        shlr2   r0
+lshrsi3_29:
+        shlr2   r0
+lshrsi3_27:
+        shlr2   r0
+lshrsi3_25:
+        shlr16  r0
+        shlr8   r0
+        rts
+        shlr    r0
+
+lshrsi3_0:
+        rts
+        nop
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S
new file mode 100644
index 000000000000..110fbfe1831f
--- /dev/null
+++ b/arch/sh/lib/mcount.S
@@ -0,0 +1,90 @@
+/*
+ * arch/sh/lib/mcount.S
+ *
+ *  Copyright (C) 2008  Paul Mundt
+ *  Copyright (C) 2008  Matt Fleming
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <asm/ftrace.h>
+
+#define MCOUNT_ENTER()          \
+        mov.l   r4, @-r15;      \
+        mov.l   r5, @-r15;      \
+        mov.l   r6, @-r15;      \
+        mov.l   r7, @-r15;      \
+        sts.l   pr, @-r15;      \
+                                \
+        mov.l   @(20,r15),r4;   \
+        sts     pr, r5
+
+#define MCOUNT_LEAVE()          \
+        lds.l   @r15+, pr;      \
+        mov.l   @r15+, r7;      \
+        mov.l   @r15+, r6;      \
+        mov.l   @r15+, r5;      \
+        rts;                    \
+         mov.l  @r15+, r4
+
+        .align 2
+        .globl  _mcount
+        .type   _mcount,@function
+        .globl  mcount
+        .type   mcount,@function
+_mcount:
+mcount:
+        MCOUNT_ENTER()
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+        .globl  mcount_call
+mcount_call:
+        mov.l   .Lftrace_stub, r6
+#else
+        mov.l   .Lftrace_trace_function, r6
+        mov.l   ftrace_stub, r7
+        cmp/eq  r6, r7
+        bt      skip_trace
+        mov.l   @r6, r6
+#endif
+
+        jsr     @r6
+         nop
+
+skip_trace:
+        MCOUNT_LEAVE()
+
+        .align 2
+.Lftrace_trace_function:
+        .long   ftrace_trace_function
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+        .globl ftrace_caller
+ftrace_caller:
+        MCOUNT_ENTER()
+
+        .globl ftrace_call
+ftrace_call:
+        mov.l   .Lftrace_stub, r6
+        jsr     @r6
+         nop
+
+        MCOUNT_LEAVE()
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+/*
+ * NOTE: From here on the locations of the .Lftrace_stub label and
+ * ftrace_stub itself are fixed. Adding additional data here will skew
+ * the displacement for the memory table and break the block replacement.
+ * Place new labels either after the ftrace_stub body, or before
+ * ftrace_caller. You have been warned.
+ */
+        .align 2
+.Lftrace_stub:
+        .long   ftrace_stub
+
+        .globl  ftrace_stub
+ftrace_stub:
+        rts
+         nop
diff --git a/arch/sh/lib/movmem.S b/arch/sh/lib/movmem.S
new file mode 100644
index 000000000000..62075f6bc67c
--- /dev/null
+++ b/arch/sh/lib/movmem.S
@@ -0,0 +1,238 @@
+/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+   2004, 2005, 2006
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
+!! recoded in assembly by Toshiyasu Morita
+!! tm@netcom.com
+
+/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
+   ELF local label prefixes by J"orn Rennecke
+   amylaar@cygnus.com  */
+
+        .text
+        .balign 4
+        .global __movmem
+        .global __movstr
+        .set __movstr, __movmem 
+        /* This would be a lot simpler if r6 contained the byte count
+           minus 64, and we wouldn't be called here for a byte count of 64.  */
+__movmem:
+        sts.l   pr,@-r15
+        shll2   r6
+        bsr     __movmemSI52+2
+        mov.l   @(48,r5),r0
+        .balign 4
+movmem_loop: /* Reached with rts */
+        mov.l   @(60,r5),r0
+        add     #-64,r6
+        mov.l   r0,@(60,r4)
+        tst     r6,r6
+        mov.l   @(56,r5),r0
+        bt      movmem_done
+        mov.l   r0,@(56,r4)
+        cmp/pl  r6
+        mov.l   @(52,r5),r0
+        add     #64,r5
+        mov.l   r0,@(52,r4)
+        add     #64,r4
+        bt      __movmemSI52
+! done all the large groups, do the remainder
+! jump to movmem+
+        mova    __movmemSI4+4,r0
+        add     r6,r0
+        jmp     @r0
+movmem_done: ! share slot insn, works out aligned.
+        lds.l   @r15+,pr
+        mov.l   r0,@(56,r4)
+        mov.l   @(52,r5),r0
+        rts
+        mov.l   r0,@(52,r4)
+        .balign 4
+
+        .global __movmemSI64
+        .global __movstrSI64
+        .set    __movstrSI64, __movmemSI64
+__movmemSI64:
+        mov.l   @(60,r5),r0
+        mov.l   r0,@(60,r4)
+        .global __movmemSI60
+        .global __movstrSI60
+        .set    __movstrSI60, __movmemSI60
+__movmemSI60:
+        mov.l   @(56,r5),r0
+        mov.l   r0,@(56,r4)
+        .global __movmemSI56
+        .global __movstrSI56
+        .set    __movstrSI56, __movmemSI56
+__movmemSI56:
+        mov.l   @(52,r5),r0
+        mov.l   r0,@(52,r4)
+        .global __movmemSI52
+        .global __movstrSI52
+        .set    __movstrSI52, __movmemSI52
+__movmemSI52:
+        mov.l   @(48,r5),r0
+        mov.l   r0,@(48,r4)
+        .global __movmemSI48
+        .global __movstrSI48
+        .set    __movstrSI48, __movmemSI48
+__movmemSI48:
+        mov.l   @(44,r5),r0
+        mov.l   r0,@(44,r4)
+        .global __movmemSI44
+        .global __movstrSI44
+        .set    __movstrSI44, __movmemSI44
+__movmemSI44:
+        mov.l   @(40,r5),r0
+        mov.l   r0,@(40,r4)
+        .global __movmemSI40
+        .global __movstrSI40
+        .set    __movstrSI40, __movmemSI40
+__movmemSI40:
+        mov.l   @(36,r5),r0
+        mov.l   r0,@(36,r4)
+        .global __movmemSI36
+        .global __movstrSI36
+        .set    __movstrSI36, __movmemSI36
+__movmemSI36:
+        mov.l   @(32,r5),r0
+        mov.l   r0,@(32,r4)
+        .global __movmemSI32
+        .global __movstrSI32
+        .set    __movstrSI32, __movmemSI32
+__movmemSI32:
+        mov.l   @(28,r5),r0
+        mov.l   r0,@(28,r4)
+        .global __movmemSI28
+        .global __movstrSI28
+        .set    __movstrSI28, __movmemSI28
+__movmemSI28:
+        mov.l   @(24,r5),r0
+        mov.l   r0,@(24,r4)
+        .global __movmemSI24
+        .global __movstrSI24
+        .set    __movstrSI24, __movmemSI24
+__movmemSI24:
+        mov.l   @(20,r5),r0
+        mov.l   r0,@(20,r4)
+        .global __movmemSI20
+        .global __movstrSI20
+        .set    __movstrSI20, __movmemSI20
+__movmemSI20:
+        mov.l   @(16,r5),r0
+        mov.l   r0,@(16,r4)
+        .global __movmemSI16
+        .global __movstrSI16
+        .set    __movstrSI16, __movmemSI16
+__movmemSI16:
+        mov.l   @(12,r5),r0
+        mov.l   r0,@(12,r4)
+        .global __movmemSI12
+        .global __movstrSI12
+        .set    __movstrSI12, __movmemSI12
+__movmemSI12:
+        mov.l   @(8,r5),r0
+        mov.l   r0,@(8,r4)
+        .global __movmemSI8
+        .global __movstrSI8
+        .set    __movstrSI8, __movmemSI8
+__movmemSI8:
+        mov.l   @(4,r5),r0
+        mov.l   r0,@(4,r4)
+        .global __movmemSI4
+        .global __movstrSI4
+        .set    __movstrSI4, __movmemSI4
+__movmemSI4:
+        mov.l   @(0,r5),r0
+        rts
+        mov.l   r0,@(0,r4)
+
+        .global __movmem_i4_even
+        .global __movstr_i4_even
+        .set    __movstr_i4_even, __movmem_i4_even
+
+        .global __movmem_i4_odd
+        .global __movstr_i4_odd
+        .set    __movstr_i4_odd, __movmem_i4_odd
+
+        .global __movmemSI12_i4
+        .global __movstrSI12_i4
+        .set    __movstrSI12_i4, __movmemSI12_i4
+
+        .p2align        5
+L_movmem_2mod4_end:
+        mov.l   r0,@(16,r4)
+        rts
+        mov.l   r1,@(20,r4)
+
+        .p2align        2
+
+__movmem_i4_even:
+        mov.l   @r5+,r0
+        bra     L_movmem_start_even
+        mov.l   @r5+,r1
+
+__movmem_i4_odd:
+        mov.l   @r5+,r1
+        add     #-4,r4
+        mov.l   @r5+,r2
+        mov.l   @r5+,r3
+        mov.l   r1,@(4,r4)
+        mov.l   r2,@(8,r4)
+
+L_movmem_loop:
+        mov.l   r3,@(12,r4)
+        dt      r6
+        mov.l   @r5+,r0
+        bt/s    L_movmem_2mod4_end
+        mov.l   @r5+,r1
+        add     #16,r4
+L_movmem_start_even:
+        mov.l   @r5+,r2
+        mov.l   @r5+,r3
+        mov.l   r0,@r4
+        dt      r6
+        mov.l   r1,@(4,r4)
+        bf/s    L_movmem_loop
+        mov.l   r2,@(8,r4)
+        rts
+        mov.l   r3,@(12,r4)
+
+        .p2align        4
+__movmemSI12_i4:
+        mov.l   @r5,r0
+        mov.l   @(4,r5),r1
+        mov.l   @(8,r5),r2
+        mov.l   r0,@r4
+        mov.l   r1,@(4,r4)
+        rts
+        mov.l   r2,@(8,r4)
diff --git a/arch/sh/lib/udiv_qrnnd.S b/arch/sh/lib/udiv_qrnnd.S
new file mode 100644
index 000000000000..32b9a36de943
--- /dev/null
+++ b/arch/sh/lib/udiv_qrnnd.S
@@ -0,0 +1,81 @@
+/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+   2004, 2005, 2006
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
+!! recoded in assembly by Toshiyasu Morita
+!! tm@netcom.com
+
+/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
+   ELF local label prefixes by J"orn Rennecke
+   amylaar@cygnus.com  */
+
+        /* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */
+        /* n1 < d, but n1 might be larger than d1.  */
+        .global __udiv_qrnnd_16
+        .balign 8
+__udiv_qrnnd_16:
+        div0u
+        cmp/hi r6,r0
+        bt .Lots
+        .rept 16
+        div1 r6,r0 
+        .endr
+        extu.w r0,r1
+        bt 0f
+        add r6,r0
+0:      rotcl r1
+        mulu.w r1,r5
+        xtrct r4,r0
+        swap.w r0,r0
+        sts macl,r2
+        cmp/hs r2,r0
+        sub r2,r0
+        bt 0f
+        addc r5,r0
+        add #-1,r1
+        bt 0f
+1:      add #-1,r1
+        rts
+        add r5,r0
+        .balign 8
+.Lots:
+        sub r5,r0
+        swap.w r4,r1
+        xtrct r0,r1
+        clrt
+        mov r1,r0
+        addc r5,r0
+        mov #-1,r1
+        bf/s 1b
+         shlr16 r1
+0:      rts
+         nop
diff --git a/arch/sh/lib/udivsi3.S b/arch/sh/lib/udivsi3.S
new file mode 100644
index 000000000000..72157ab5c314
--- /dev/null
+++ b/arch/sh/lib/udivsi3.S
@@ -0,0 +1,87 @@
+/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+   2004, 2005
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+        .balign 4
+        .global __udivsi3
+        .type   __udivsi3, @function
+div8:
+        div1 r5,r4
+div7:
+        div1 r5,r4; div1 r5,r4; div1 r5,r4
+        div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
+
+divx4:
+        div1 r5,r4; rotcl r0
+        div1 r5,r4; rotcl r0
+        div1 r5,r4; rotcl r0
+        rts; div1 r5,r4
+
+__udivsi3:
+        sts.l pr,@-r15
+        extu.w r5,r0
+        cmp/eq r5,r0
+        bf/s large_divisor
+        div0u
+        swap.w r4,r0
+        shlr16 r4
+        bsr div8
+        shll16 r5
+        bsr div7
+        div1 r5,r4
+        xtrct r4,r0
+        xtrct r0,r4
+        bsr div8
+        swap.w r4,r4
+        bsr div7
+        div1 r5,r4
+        lds.l @r15+,pr
+        xtrct r4,r0
+        swap.w r0,r0
+        rotcl r0
+        rts
+        shlr16 r5
+
+large_divisor:
+        mov #0,r0
+        xtrct r4,r0
+        xtrct r0,r4
+        bsr divx4
+        rotcl r0
+        bsr divx4
+        rotcl r0
+        bsr divx4
+        rotcl r0
+        bsr divx4
+        rotcl r0
+        lds.l @r15+,pr
+        rts
+        rotcl r0
diff --git a/arch/sh/lib/udivsi3_i4i-Os.S b/arch/sh/lib/udivsi3_i4i-Os.S
new file mode 100644
index 000000000000..4835553e1ea9
--- /dev/null
+++ b/arch/sh/lib/udivsi3_i4i-Os.S
@@ -0,0 +1,149 @@
+/* Copyright (C) 2006 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+/* Moderately Space-optimized libgcc routines for the Renesas SH /
+   STMicroelectronics ST40 CPUs.
+   Contributed by J"orn Rennecke joern.rennecke@st.com.  */
+
+/* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i
+   sh4-200 run times:
+   udiv small divisor: 55 cycles
+   udiv large divisor: 52 cycles
+   sdiv small divisor, positive result: 59 cycles
+   sdiv large divisor, positive result: 56 cycles
+   sdiv small divisor, negative result: 65 cycles (*)
+   sdiv large divisor, negative result: 62 cycles (*)
+   (*): r2 is restored in the rts delay slot and has a lingering latency
+        of two more cycles.  */
+        .balign 4
+        .global __udivsi3_i4i
+        .global __udivsi3_i4
+        .set    __udivsi3_i4, __udivsi3_i4i
+        .type   __udivsi3_i4i, @function
+        .type   __sdivsi3_i4i, @function
+__udivsi3_i4i:
+        sts pr,r1
+        mov.l r4,@-r15
+        extu.w r5,r0
+        cmp/eq r5,r0
+        swap.w r4,r0
+        shlr16 r4
+        bf/s large_divisor
+        div0u
+        mov.l r5,@-r15
+        shll16 r5
+sdiv_small_divisor:
+        div1 r5,r4
+        bsr div6
+        div1 r5,r4
+        div1 r5,r4
+        bsr div6
+        div1 r5,r4
+        xtrct r4,r0
+        xtrct r0,r4
+        bsr div7
+        swap.w r4,r4
+        div1 r5,r4
+        bsr div7
+        div1 r5,r4
+        xtrct r4,r0
+        mov.l @r15+,r5
+        swap.w r0,r0
+        mov.l @r15+,r4
+        jmp @r1
+        rotcl r0
+div7:
+        div1 r5,r4
+div6:
+                    div1 r5,r4; div1 r5,r4; div1 r5,r4
+        div1 r5,r4; div1 r5,r4; rts;        div1 r5,r4
+
+divx3:
+        rotcl r0
+        div1 r5,r4
+        rotcl r0
+        div1 r5,r4
+        rotcl r0
+        rts
+        div1 r5,r4
+
+large_divisor:
+        mov.l r5,@-r15
+sdiv_large_divisor:
+        xor r4,r0
+        .rept 4
+        rotcl r0
+        bsr divx3
+        div1 r5,r4
+        .endr
+        mov.l @r15+,r5
+        mov.l @r15+,r4
+        jmp @r1
+        rotcl r0
+
+        .global __sdivsi3_i4i
+        .global __sdivsi3_i4
+        .global __sdivsi3
+        .set    __sdivsi3_i4, __sdivsi3_i4i
+        .set    __sdivsi3, __sdivsi3_i4i
+__sdivsi3_i4i:
+        mov.l r4,@-r15
+        cmp/pz r5
+        mov.l r5,@-r15
+        bt/s pos_divisor
+        cmp/pz r4
+        neg r5,r5
+        extu.w r5,r0
+        bt/s neg_result
+        cmp/eq r5,r0
+        neg r4,r4
+pos_result:
+        swap.w r4,r0
+        bra sdiv_check_divisor
+        sts pr,r1
+pos_divisor:
+        extu.w r5,r0
+        bt/s pos_result
+        cmp/eq r5,r0
+        neg r4,r4
+neg_result:
+        mova negate_result,r0
+        ;
+        mov r0,r1
+        swap.w r4,r0
+        lds r2,macl
+        sts pr,r2
+sdiv_check_divisor:
+        shlr16 r4
+        bf/s sdiv_large_divisor
+        div0u
+        bra sdiv_small_divisor
+        shll16 r5
+        .balign 4
+negate_result:
+        neg r0,r0
+        jmp @r2
+        sts macl,r2
diff --git a/arch/sh/lib/udivsi3_i4i.S b/arch/sh/lib/udivsi3_i4i.S
new file mode 100644
index 000000000000..f1a79d9c5015
--- /dev/null
+++ b/arch/sh/lib/udivsi3_i4i.S
@@ -0,0 +1,666 @@
+/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+   2004, 2005, 2006
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
+!! recoded in assembly by Toshiyasu Morita
+!! tm@netcom.com
+
+/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
+   ELF local label prefixes by J"orn Rennecke
+   amylaar@cygnus.com  */
+
+/* This code used shld, thus is not suitable for SH1 / SH2.  */
+
+/* Signed / unsigned division without use of FPU, optimized for SH4.
+   Uses a lookup table for divisors in the range -128 .. +128, and
+   div1 with case distinction for larger divisors in three more ranges.
+   The code is lumped together with the table to allow the use of mova.  */
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+#define L_LSB 0
+#define L_LSWMSB 1
+#define L_MSWLSB 2
+#else
+#define L_LSB 3
+#define L_LSWMSB 2
+#define L_MSWLSB 1
+#endif
+
+        .balign 4
+        .global __udivsi3_i4i
+        .global __udivsi3_i4
+        .set    __udivsi3_i4, __udivsi3_i4i
+        .type   __udivsi3_i4i, @function
+__udivsi3_i4i:
+        mov.w c128_w, r1
+        div0u
+        mov r4,r0
+        shlr8 r0
+        cmp/hi r1,r5
+        extu.w r5,r1
+        bf udiv_le128
+        cmp/eq r5,r1
+        bf udiv_ge64k
+        shlr r0
+        mov r5,r1
+        shll16 r5
+        mov.l r4,@-r15
+        div1 r5,r0
+        mov.l r1,@-r15
+        div1 r5,r0
+        div1 r5,r0
+        bra udiv_25
+        div1 r5,r0
+
+div_le128:
+        mova div_table_ix,r0
+        bra div_le128_2
+        mov.b @(r0,r5),r1
+udiv_le128:
+        mov.l r4,@-r15
+        mova div_table_ix,r0
+        mov.b @(r0,r5),r1
+        mov.l r5,@-r15
+div_le128_2:
+        mova div_table_inv,r0
+        mov.l @(r0,r1),r1
+        mov r5,r0
+        tst #0xfe,r0
+        mova div_table_clz,r0
+        dmulu.l r1,r4
+        mov.b @(r0,r5),r1
+        bt/s div_by_1
+        mov r4,r0
+        mov.l @r15+,r5
+        sts mach,r0
+        /* clrt */
+        addc r4,r0
+        mov.l @r15+,r4
+        rotcr r0
+        rts
+        shld r1,r0
+
+div_by_1_neg:
+        neg r4,r0
+div_by_1:
+        mov.l @r15+,r5
+        rts
+        mov.l @r15+,r4
+
+div_ge64k:
+        bt/s div_r8
+        div0u
+        shll8 r5
+        bra div_ge64k_2
+        div1 r5,r0
+udiv_ge64k:
+        cmp/hi r0,r5
+        mov r5,r1
+        bt udiv_r8
+        shll8 r5
+        mov.l r4,@-r15
+        div1 r5,r0
+        mov.l r1,@-r15
+div_ge64k_2:
+        div1 r5,r0
+        mov.l zero_l,r1
+        .rept 4
+        div1 r5,r0
+        .endr
+        mov.l r1,@-r15
+        div1 r5,r0
+        mov.w m256_w,r1
+        div1 r5,r0
+        mov.b r0,@(L_LSWMSB,r15)
+        xor r4,r0
+        and r1,r0
+        bra div_ge64k_end
+        xor r4,r0
+        
+div_r8:
+        shll16 r4
+        bra div_r8_2
+        shll8 r4
+udiv_r8:
+        mov.l r4,@-r15
+        shll16 r4
+        clrt
+        shll8 r4
+        mov.l r5,@-r15
+div_r8_2:
+        rotcl r4
+        mov r0,r1
+        div1 r5,r1
+        mov r4,r0
+        rotcl r0
+        mov r5,r4
+        div1 r5,r1
+        .rept 5
+        rotcl r0; div1 r5,r1
+        .endr
+        rotcl r0
+        mov.l @r15+,r5
+        div1 r4,r1
+        mov.l @r15+,r4
+        rts
+        rotcl r0
+
+        .global __sdivsi3_i4i
+        .global __sdivsi3_i4
+        .global __sdivsi3
+        .set    __sdivsi3_i4, __sdivsi3_i4i
+        .set    __sdivsi3, __sdivsi3_i4i
+        .type   __sdivsi3_i4i, @function
+        /* This is link-compatible with a __sdivsi3 call,
+           but we effectively clobber only r1.  */
+__sdivsi3_i4i:
+        mov.l r4,@-r15
+        cmp/pz r5
+        mov.w c128_w, r1
+        bt/s pos_divisor
+        cmp/pz r4
+        mov.l r5,@-r15
+        neg r5,r5
+        bt/s neg_result
+        cmp/hi r1,r5
+        neg r4,r4
+pos_result:
+        extu.w r5,r0
+        bf div_le128
+        cmp/eq r5,r0
+        mov r4,r0
+        shlr8 r0
+        bf/s div_ge64k
+        cmp/hi r0,r5
+        div0u
+        shll16 r5
+        div1 r5,r0
+        div1 r5,r0
+        div1 r5,r0
+udiv_25:
+        mov.l zero_l,r1
+        div1 r5,r0
+        div1 r5,r0
+        mov.l r1,@-r15
+        .rept 3
+        div1 r5,r0
+        .endr
+        mov.b r0,@(L_MSWLSB,r15)
+        xtrct r4,r0
+        swap.w r0,r0
+        .rept 8
+        div1 r5,r0
+        .endr
+        mov.b r0,@(L_LSWMSB,r15)
+div_ge64k_end:
+        .rept 8
+        div1 r5,r0
+        .endr
+        mov.l @r15+,r4 ! zero-extension and swap using LS unit.
+        extu.b r0,r0
+        mov.l @r15+,r5
+        or r4,r0
+        mov.l @r15+,r4
+        rts
+        rotcl r0
+
+div_le128_neg:
+        tst #0xfe,r0
+        mova div_table_ix,r0
+        mov.b @(r0,r5),r1
+        mova div_table_inv,r0
+        bt/s div_by_1_neg
+        mov.l @(r0,r1),r1
+        mova div_table_clz,r0
+        dmulu.l r1,r4
+        mov.b @(r0,r5),r1
+        mov.l @r15+,r5
+        sts mach,r0
+        /* clrt */
+        addc r4,r0
+        mov.l @r15+,r4
+        rotcr r0
+        shld r1,r0
+        rts
+        neg r0,r0
+
+pos_divisor:
+        mov.l r5,@-r15
+        bt/s pos_result
+        cmp/hi r1,r5
+        neg r4,r4
+neg_result:
+        extu.w r5,r0
+        bf div_le128_neg
+        cmp/eq r5,r0
+        mov r4,r0
+        shlr8 r0
+        bf/s div_ge64k_neg
+        cmp/hi r0,r5
+        div0u
+        mov.l zero_l,r1
+        shll16 r5
+        div1 r5,r0
+        mov.l r1,@-r15
+        .rept 7
+        div1 r5,r0
+        .endr
+        mov.b r0,@(L_MSWLSB,r15)
+        xtrct r4,r0
+        swap.w r0,r0
+        .rept 8
+        div1 r5,r0
+        .endr
+        mov.b r0,@(L_LSWMSB,r15)
+div_ge64k_neg_end:
+        .rept 8
+        div1 r5,r0
+        .endr
+        mov.l @r15+,r4 ! zero-extension and swap using LS unit.
+        extu.b r0,r1
+        mov.l @r15+,r5
+        or r4,r1
+div_r8_neg_end:
+        mov.l @r15+,r4
+        rotcl r1
+        rts
+        neg r1,r0
+
+div_ge64k_neg:
+        bt/s div_r8_neg
+        div0u
+        shll8 r5
+        mov.l zero_l,r1
+        .rept 6
+        div1 r5,r0
+        .endr
+        mov.l r1,@-r15
+        div1 r5,r0
+        mov.w m256_w,r1
+        div1 r5,r0
+        mov.b r0,@(L_LSWMSB,r15)
+        xor r4,r0
+        and r1,r0
+        bra div_ge64k_neg_end
+        xor r4,r0
+
+c128_w:
+        .word 128
+
+div_r8_neg:
+        clrt
+        shll16 r4
+        mov r4,r1
+        shll8 r1
+        mov r5,r4
+        .rept 7
+        rotcl r1; div1 r5,r0
+        .endr
+        mov.l @r15+,r5
+        rotcl r1
+        bra div_r8_neg_end
+        div1 r4,r0
+
+m256_w:
+        .word 0xff00
+/* This table has been generated by divtab-sh4.c.  */
+        .balign 4
+div_table_clz:
+        .byte   0
+        .byte   1
+        .byte   0
+        .byte   -1
+        .byte   -1
+        .byte   -2
+        .byte   -2
+        .byte   -2
+        .byte   -2
+        .byte   -3
+        .byte   -3
+        .byte   -3
+        .byte   -3
+        .byte   -3
+        .byte   -3
+        .byte   -3
+        .byte   -3
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -4
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -5
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+        .byte   -6
+/* Lookup table translating positive divisor to index into table of
+   normalized inverse.  N.B. the '0' entry is also the last entry of the
+ previous table, and causes an unaligned access for division by zero.  */
+div_table_ix:
+        .byte   -6
+        .byte   -128
+        .byte   -128
+        .byte   0
+        .byte   -128
+        .byte   -64
+        .byte   0
+        .byte   64
+        .byte   -128
+        .byte   -96
+        .byte   -64
+        .byte   -32
+        .byte   0
+        .byte   32
+        .byte   64
+        .byte   96
+        .byte   -128
+        .byte   -112
+        .byte   -96
+        .byte   -80
+        .byte   -64
+        .byte   -48
+        .byte   -32
+        .byte   -16
+        .byte   0
+        .byte   16
+        .byte   32
+        .byte   48
+        .byte   64
+        .byte   80
+        .byte   96
+        .byte   112
+        .byte   -128
+        .byte   -120
+        .byte   -112
+        .byte   -104
+        .byte   -96
+        .byte   -88
+        .byte   -80
+        .byte   -72
+        .byte   -64
+        .byte   -56
+        .byte   -48
+        .byte   -40
+        .byte   -32
+        .byte   -24
+        .byte   -16
+        .byte   -8
+        .byte   0
+        .byte   8
+        .byte   16
+        .byte   24
+        .byte   32
+        .byte   40
+        .byte   48
+        .byte   56
+        .byte   64
+        .byte   72
+        .byte   80
+        .byte   88
+        .byte   96
+        .byte   104
+        .byte   112
+        .byte   120
+        .byte   -128
+        .byte   -124
+        .byte   -120
+        .byte   -116
+        .byte   -112
+        .byte   -108
+        .byte   -104
+        .byte   -100
+        .byte   -96
+        .byte   -92
+        .byte   -88
+        .byte   -84
+        .byte   -80
+        .byte   -76
+        .byte   -72
+        .byte   -68
+        .byte   -64
+        .byte   -60
+        .byte   -56
+        .byte   -52
+        .byte   -48
+        .byte   -44
+        .byte   -40
+        .byte   -36
+        .byte   -32
+        .byte   -28
+        .byte   -24
+        .byte   -20
+        .byte   -16
+        .byte   -12
+        .byte   -8
+        .byte   -4
+        .byte   0
+        .byte   4
+        .byte   8
+        .byte   12
+        .byte   16
+        .byte   20
+        .byte   24
+        .byte   28
+        .byte   32
+        .byte   36
+        .byte   40
+        .byte   44
+        .byte   48
+        .byte   52
+        .byte   56
+        .byte   60
+        .byte   64
+        .byte   68
+        .byte   72
+        .byte   76
+        .byte   80
+        .byte   84
+        .byte   88
+        .byte   92
+        .byte   96
+        .byte   100
+        .byte   104
+        .byte   108
+        .byte   112
+        .byte   116
+        .byte   120
+        .byte   124
+        .byte   -128
+/* 1/64 .. 1/127, normalized.  There is an implicit leading 1 in bit 32.  */
+        .balign 4
+zero_l:
+        .long   0x0
+        .long   0xF81F81F9
+        .long   0xF07C1F08
+        .long   0xE9131AC0
+        .long   0xE1E1E1E2
+        .long   0xDAE6076C
+        .long   0xD41D41D5
+        .long   0xCD856891
+        .long   0xC71C71C8
+        .long   0xC0E07039
+        .long   0xBACF914D
+        .long   0xB4E81B4F
+        .long   0xAF286BCB
+        .long   0xA98EF607
+        .long   0xA41A41A5
+        .long   0x9EC8E952
+        .long   0x9999999A
+        .long   0x948B0FCE
+        .long   0x8F9C18FA
+        .long   0x8ACB90F7
+        .long   0x86186187
+        .long   0x81818182
+        .long   0x7D05F418
+        .long   0x78A4C818
+        .long   0x745D1746
+        .long   0x702E05C1
+        .long   0x6C16C16D
+        .long   0x68168169
+        .long   0x642C8591
+        .long   0x60581606
+        .long   0x5C9882BA
+        .long   0x58ED2309
+div_table_inv:
+        .long   0x55555556
+        .long   0x51D07EAF
+        .long   0x4E5E0A73
+        .long   0x4AFD6A06
+        .long   0x47AE147B
+        .long   0x446F8657
+        .long   0x41414142
+        .long   0x3E22CBCF
+        .long   0x3B13B13C
+        .long   0x38138139
+        .long   0x3521CFB3
+        .long   0x323E34A3
+        .long   0x2F684BDB
+        .long   0x2C9FB4D9
+        .long   0x29E4129F
+        .long   0x27350B89
+        .long   0x24924925
+        .long   0x21FB7813
+        .long   0x1F7047DD
+        .long   0x1CF06ADB
+        .long   0x1A7B9612
+        .long   0x18118119
+        .long   0x15B1E5F8
+        .long   0x135C8114
+        .long   0x11111112
+        .long   0xECF56BF
+        .long   0xC9714FC
+        .long   0xA6810A7
+        .long   0x8421085
+        .long   0x624DD30
+        .long   0x4104105
+        .long   0x2040811
+        /* maximum error: 0.987342 scaled: 0.921875*/
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile
index 9950966923a0..4bacb9e83478 100644
--- a/arch/sh/lib64/Makefile
+++ b/arch/sh/lib64/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the SH-5 specific library files..
 #
 # Copyright (C) 2000, 2001  Paolo Alberelli
-# Copyright (C) 2003  Paul Mundt
+# Copyright (C) 2003 - 2008  Paul Mundt
 #
 # This file is subject to the terms and conditions of the GNU General Public
 # License.  See the file "COPYING" in the main directory of this archive
@@ -10,6 +10,8 @@
 #
 
 # Panic should really be compiled as PIC
-lib-y  := udelay.o c-checksum.o dbg.o panic.o memcpy.o copy_user_memcpy.o \
-                copy_page.o clear_page.o
+lib-y  := udelay.o c-checksum.o dbg.o panic.o memcpy.o memset.o \
+          copy_user_memcpy.o copy_page.o clear_page.o strcpy.o strlen.o
 
+# Extracted from libgcc
+lib-y   += udivsi3.o udivdi3.o sdivsi3.o
diff --git a/arch/sh/lib64/c-checksum.c b/arch/sh/lib64/c-checksum.c
index 5c284e0cff9c..73c0877e3a29 100644
--- a/arch/sh/lib64/c-checksum.c
+++ b/arch/sh/lib64/c-checksum.c
@@ -35,7 +35,7 @@ static inline unsigned short foldto16(unsigned long x)
 
 static inline unsigned short myfoldto16(unsigned long long x)
 {
-        /* Fold down to 32-bits so we don't loose in the typedef-less
+        /* Fold down to 32-bits so we don't lose in the typedef-less
            network stack.  */
         /* 64 to 33 */
         x = (x & 0xffffffff) + (x >> 32);
@@ -199,7 +199,7 @@ __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
         result = (__force u64) saddr + (__force u64) daddr +
                  (__force u64) sum + ((len + proto) << 8);
 
-        /* Fold down to 32-bits so we don't loose in the typedef-less
+        /* Fold down to 32-bits so we don't lose in the typedef-less
            network stack.  */
         /* 64 to 33 */
         result = (result & 0xffffffff) + (result >> 32);
diff --git a/arch/sh/lib64/memcpy.S b/arch/sh/lib64/memcpy.S
new file mode 100644
index 000000000000..dd300c372ce1
--- /dev/null
+++ b/arch/sh/lib64/memcpy.S
@@ -0,0 +1,201 @@
+/* Cloned and hacked for uClibc by Paul Mundt, December 2003 */
+/* Modified by SuperH, Inc. September 2003 */
+!
+! Fast SH memcpy
+!
+! by Toshiyasu Morita (tm@netcom.com)
+! hacked by J"orn Rernnecke (joern.rennecke@superh.com) ("o for o-umlaut)
+! SH5 code Copyright 2002 SuperH Ltd.
+!
+! Entry: ARG0: destination pointer
+!        ARG1: source pointer
+!        ARG2: byte count
+!
+! Exit:  RESULT: destination pointer
+!        any other registers in the range r0-r7: trashed
+!
+! Notes: Usually one wants to do small reads and write a longword, but
+!        unfortunately it is difficult in some cases to concatanate bytes
+!        into a longword on the SH, so this does a longword read and small
+!        writes.
+!
+! This implementation makes two assumptions about how it is called:
+!
+! 1.: If the byte count is nonzero, the address of the last byte to be
+!     copied is unsigned greater than the address of the first byte to
+!     be copied.  This could be easily swapped for a signed comparison,
+!     but the algorithm used needs some comparison.
+!
+! 2.: When there are two or three bytes in the last word of an 11-or-more
+!     bytes memory chunk to b copied, the rest of the word can be read
+!     without side effects.
+!     This could be easily changed by increasing the minumum size of
+!     a fast memcpy and the amount subtracted from r7 before L_2l_loop be 2,
+!     however, this would cost a few extra cyles on average.
+!     For SHmedia, the assumption is that any quadword can be read in its
+!     enirety if at least one byte is included in the copy.
+!
+
+        .section .text..SHmedia32,"ax"
+        .globl  memcpy
+        .type   memcpy, @function
+        .align  5
+
+memcpy:
+
+#define LDUAQ(P,O,D0,D1) ldlo.q P,O,D0; ldhi.q P,O+7,D1
+#define STUAQ(P,O,D0,D1) stlo.q P,O,D0; sthi.q P,O+7,D1
+#define LDUAL(P,O,D0,D1) ldlo.l P,O,D0; ldhi.l P,O+3,D1
+#define STUAL(P,O,D0,D1) stlo.l P,O,D0; sthi.l P,O+3,D1
+
+        ld.b r3,0,r63
+        pta/l Large,tr0
+        movi 25,r0
+        bgeu/u r4,r0,tr0
+        nsb r4,r0
+        shlli r0,5,r0
+        movi (L1-L0+63*32 + 1) & 0xffff,r1
+        sub r1, r0, r0
+L0:     ptrel r0,tr0
+        add r2,r4,r5
+        ptabs r18,tr1
+        add r3,r4,r6
+        blink tr0,r63
+        
+/* Rearranged to make cut2 safe */
+        .balign 8
+L4_7:   /* 4..7 byte memcpy cntd. */
+        stlo.l r2, 0, r0
+        or r6, r7, r6
+        sthi.l r5, -1, r6
+        stlo.l r5, -4, r6
+        blink tr1,r63
+
+        .balign 8
+L1:     /* 0 byte memcpy */
+        nop
+        blink tr1,r63
+        nop
+        nop
+        nop
+        nop
+
+L2_3:   /* 2 or 3 byte memcpy cntd. */
+        st.b r5,-1,r6
+        blink tr1,r63
+
+        /* 1 byte memcpy */
+        ld.b r3,0,r0
+        st.b r2,0,r0
+        blink tr1,r63
+
+L8_15:  /* 8..15 byte memcpy cntd. */
+        stlo.q r2, 0, r0
+        or r6, r7, r6
+        sthi.q r5, -1, r6
+        stlo.q r5, -8, r6
+        blink tr1,r63
+        
+        /* 2 or 3 byte memcpy */
+        ld.b r3,0,r0
+        ld.b r2,0,r63
+        ld.b r3,1,r1
+        st.b r2,0,r0
+        pta/l L2_3,tr0
+        ld.b r6,-1,r6
+        st.b r2,1,r1
+        blink tr0, r63
+
+        /* 4 .. 7 byte memcpy */
+        LDUAL (r3, 0, r0, r1)
+        pta L4_7, tr0
+        ldlo.l r6, -4, r7
+        or r0, r1, r0
+        sthi.l r2, 3, r0
+        ldhi.l r6, -1, r6
+        blink tr0, r63
+
+        /* 8 .. 15 byte memcpy */
+        LDUAQ (r3, 0, r0, r1)
+        pta L8_15, tr0
+        ldlo.q r6, -8, r7
+        or r0, r1, r0
+        sthi.q r2, 7, r0
+        ldhi.q r6, -1, r6
+        blink tr0, r63
+
+        /* 16 .. 24 byte memcpy */
+        LDUAQ (r3, 0, r0, r1)
+        LDUAQ (r3, 8, r8, r9)
+        or r0, r1, r0
+        sthi.q r2, 7, r0
+        or r8, r9, r8
+        sthi.q r2, 15, r8
+        ldlo.q r6, -8, r7
+        ldhi.q r6, -1, r6
+        stlo.q r2, 8, r8
+        stlo.q r2, 0, r0
+        or r6, r7, r6
+        sthi.q r5, -1, r6
+        stlo.q r5, -8, r6
+        blink tr1,r63
+
+Large:
+        ld.b r2, 0, r63
+        pta/l  Loop_ua, tr1
+        ori r3, -8, r7
+        sub r2, r7, r22
+        sub r3, r2, r6
+        add r2, r4, r5
+        ldlo.q r3, 0, r0
+        addi r5, -16, r5
+        movi 64+8, r27 // could subtract r7 from that.
+        stlo.q r2, 0, r0
+        sthi.q r2, 7, r0
+        ldx.q r22, r6, r0
+        bgtu/l r27, r4, tr1
+
+        addi r5, -48, r27
+        pta/l Loop_line, tr0
+        addi r6, 64, r36
+        addi r6, -24, r19
+        addi r6, -16, r20
+        addi r6, -8, r21
+
+Loop_line:
+        ldx.q r22, r36, r63
+        alloco r22, 32
+        addi r22, 32, r22
+        ldx.q r22, r19, r23
+        sthi.q r22, -25, r0
+        ldx.q r22, r20, r24
+        ldx.q r22, r21, r25
+        stlo.q r22, -32, r0
+        ldx.q r22, r6,  r0
+        sthi.q r22, -17, r23
+        sthi.q r22,  -9, r24
+        sthi.q r22,  -1, r25
+        stlo.q r22, -24, r23
+        stlo.q r22, -16, r24
+        stlo.q r22,  -8, r25
+        bgeu r27, r22, tr0
+
+Loop_ua:
+        addi r22, 8, r22
+        sthi.q r22, -1, r0
+        stlo.q r22, -8, r0
+        ldx.q r22, r6, r0
+        bgtu/l r5, r22, tr1
+
+        add r3, r4, r7
+        ldlo.q r7, -8, r1
+        sthi.q r22, 7, r0
+        ldhi.q r7, -1, r7
+        ptabs r18,tr1
+        stlo.q r22, 0, r0
+        or r1, r7, r1
+        sthi.q r5, 15, r1
+        stlo.q r5, 8, r1
+        blink tr1, r63
+
+        .size memcpy,.-memcpy
diff --git a/arch/sh/lib64/memcpy.c b/arch/sh/lib64/memcpy.c
deleted file mode 100644
index fba436a92bfa..000000000000
--- a/arch/sh/lib64/memcpy.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2002 Mark Debbage (Mark.Debbage@superh.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- */
-
-#include <linux/types.h>
-#include <asm/string.h>
-
-// This is a simplistic optimization of memcpy to increase the
-// granularity of access beyond one byte using aligned
-// loads and stores. This is not an optimal implementation
-// for SH-5 (especially with regard to prefetching and the cache),
-// and a better version should be provided later ...
-
-void *memcpy(void *dest, const void *src, size_t count)
-{
-        char *d = (char *) dest, *s = (char *) src;
-
-        if (count >= 32) {
-                int i = 8 - (((unsigned long) d) & 0x7);
-
-                if (i != 8)
-                        while (i-- && count--) {
-                                *d++ = *s++;
-                        }
-
-                if (((((unsigned long) d) & 0x7) == 0) &&
-                    ((((unsigned long) s) & 0x7) == 0)) {
-                        while (count >= 32) {
-                                unsigned long long t1, t2, t3, t4;
-                                t1 = *(unsigned long long *) (s);
-                                t2 = *(unsigned long long *) (s + 8);
-                                t3 = *(unsigned long long *) (s + 16);
-                                t4 = *(unsigned long long *) (s + 24);
-                                *(unsigned long long *) (d) = t1;
-                                *(unsigned long long *) (d + 8) = t2;
-                                *(unsigned long long *) (d + 16) = t3;
-                                *(unsigned long long *) (d + 24) = t4;
-                                d += 32;
-                                s += 32;
-                                count -= 32;
-                        }
-                        while (count >= 8) {
-                                *(unsigned long long *) d =
-                                    *(unsigned long long *) s;
-                                d += 8;
-                                s += 8;
-                                count -= 8;
-                        }
-                }
-
-                if (((((unsigned long) d) & 0x3) == 0) &&
-                    ((((unsigned long) s) & 0x3) == 0)) {
-                        while (count >= 4) {
-                                *(unsigned long *) d = *(unsigned long *) s;
-                                d += 4;
-                                s += 4;
-                                count -= 4;
-                        }
-                }
-
-                if (((((unsigned long) d) & 0x1) == 0) &&
-                    ((((unsigned long) s) & 0x1) == 0)) {
-                        while (count >= 2) {
-                                *(unsigned short *) d = *(unsigned short *) s;
-                                d += 2;
-                                s += 2;
-                                count -= 2;
-                        }
-                }
-        }
-
-        while (count--) {
-                *d++ = *s++;
-        }
-
-        return d;
-}
diff --git a/arch/sh/lib64/memset.S b/arch/sh/lib64/memset.S
new file mode 100644
index 000000000000..2d37b0488552
--- /dev/null
+++ b/arch/sh/lib64/memset.S
@@ -0,0 +1,91 @@
+/* Cloned and hacked for uClibc by Paul Mundt, December 2003 */
+/* Modified by SuperH, Inc. September 2003 */
+!
+! Fast SH memset
+!
+! by Toshiyasu Morita (tm@netcom.com)
+!
+! SH5 code by J"orn Rennecke (joern.rennecke@superh.com)
+! Copyright 2002 SuperH Ltd.
+!
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define SHHI shlld
+#define SHLO shlrd
+#else
+#define SHHI shlrd
+#define SHLO shlld
+#endif
+
+        .section .text..SHmedia32,"ax"
+        .globl  memset
+        .type   memset, @function
+
+        .align 5
+
+memset:
+        pta/l multiquad, tr0
+        andi r2, 7, r22
+        ptabs r18, tr2
+        mshflo.b r3,r3,r3
+        add r4, r22, r23
+        mperm.w r3, r63, r3     // Fill pattern now in every byte of r3
+
+        movi 8, r9
+        bgtu/u r23, r9, tr0 // multiquad
+
+        beqi/u r4, 0, tr2       // Return with size 0 - ensures no mem accesses
+        ldlo.q r2, 0, r7
+        shlli r4, 2, r4
+        movi -1, r8
+        SHHI r8, r4, r8
+        SHHI r8, r4, r8
+        mcmv r7, r8, r3
+        stlo.q r2, 0, r3
+        blink tr2, r63
+
+multiquad:
+        pta/l lastquad, tr0
+        stlo.q r2, 0, r3
+        shlri r23, 3, r24
+        add r2, r4, r5
+        beqi/u r24, 1, tr0 // lastquad
+        pta/l loop, tr1
+        sub r2, r22, r25
+        andi r5, -8, r20   // calculate end address and
+        addi r20, -7*8, r8 // loop end address; This might overflow, so we need
+                           // to use a different test before we start the loop
+        bge/u r24, r9, tr1 // loop
+        st.q r25, 8, r3
+        st.q r20, -8, r3
+        shlri r24, 1, r24
+        beqi/u r24, 1, tr0 // lastquad
+        st.q r25, 16, r3
+        st.q r20, -16, r3
+        beqi/u r24, 2, tr0 // lastquad
+        st.q r25, 24, r3
+        st.q r20, -24, r3
+lastquad:
+        sthi.q r5, -1, r3
+        blink tr2,r63
+
+loop:
+!!!     alloco r25, 32  // QQQ comment out for short-term fix to SHUK #3895.
+                        // QQQ commenting out is locically correct, but sub-optimal
+                        // QQQ Sean McGoogan - 4th April 2003.
+        st.q r25, 8, r3
+        st.q r25, 16, r3
+        st.q r25, 24, r3
+        st.q r25, 32, r3
+        addi r25, 32, r25
+        bgeu/l r8, r25, tr1 // loop
+
+        st.q r20, -40, r3
+        st.q r20, -32, r3
+        st.q r20, -24, r3
+        st.q r20, -16, r3
+        st.q r20, -8, r3
+        sthi.q r5, -1, r3
+        blink tr2,r63
+
+        .size   memset,.-memset
diff --git a/arch/sh/lib64/sdivsi3.S b/arch/sh/lib64/sdivsi3.S
new file mode 100644
index 000000000000..6a800c6a4904
--- /dev/null
+++ b/arch/sh/lib64/sdivsi3.S
@@ -0,0 +1,131 @@
+        .global __sdivsi3
+        .section        .text..SHmedia32,"ax"
+        .align  2
+
+        /* inputs: r4,r5 */
+        /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */
+        /* result in r0 */
+__sdivsi3:
+        ptb __div_table,tr0
+
+        nsb r5, r1
+        shlld r5, r1, r25    /* normalize; [-2 ..1, 1..2) in s2.62 */
+        shari r25, 58, r21   /* extract 5(6) bit index (s2.4 with hole -1..1) */
+        /* bubble */
+        gettr tr0,r20
+        ldx.ub r20, r21, r19 /* u0.8 */
+        shari r25, 32, r25   /* normalize to s2.30 */
+        shlli r21, 1, r21
+        muls.l r25, r19, r19 /* s2.38 */
+        ldx.w r20, r21, r21  /* s2.14 */
+        ptabs r18, tr0
+        shari r19, 24, r19   /* truncate to s2.14 */
+        sub r21, r19, r19    /* some 11 bit inverse in s1.14 */
+        muls.l r19, r19, r21 /* u0.28 */
+        sub r63, r1, r1
+        addi r1, 92, r1
+        muls.l r25, r21, r18 /* s2.58 */
+        shlli r19, 45, r19   /* multiply by two and convert to s2.58 */
+        /* bubble */
+        sub r19, r18, r18
+        shari r18, 28, r18   /* some 22 bit inverse in s1.30 */
+        muls.l r18, r25, r0  /* s2.60 */
+        muls.l r18, r4, r25 /* s32.30 */
+        /* bubble */
+        shari r0, 16, r19   /* s-16.44 */
+        muls.l r19, r18, r19 /* s-16.74 */
+        shari r25, 63, r0
+        shari r4, 14, r18   /* s19.-14 */
+        shari r19, 30, r19   /* s-16.44 */
+        muls.l r19, r18, r19 /* s15.30 */
+        xor r21, r0, r21    /* You could also use the constant 1 << 27. */
+        add r21, r25, r21
+        sub r21, r19, r21
+        shard r21, r1, r21
+        sub r21, r0, r0
+        blink tr0, r63
+        
+/* This table has been generated by divtab.c .
+Defects for bias -330:
+   Max defect: 6.081536e-07 at -1.000000e+00
+   Min defect: 2.849516e-08 at 1.030651e+00
+   Max 2nd step defect: 9.606539e-12 at -1.000000e+00
+   Min 2nd step defect: 0.000000e+00 at 0.000000e+00
+   Defect at 1: 1.238659e-07
+   Defect at -2: 1.061708e-07 */
+
+        .balign 2
+        .type   __div_table,@object
+        .size   __div_table,128
+/* negative division constants */
+        .word   -16638
+        .word   -17135
+        .word   -17737
+        .word   -18433
+        .word   -19103
+        .word   -19751
+        .word   -20583
+        .word   -21383
+        .word   -22343
+        .word   -23353
+        .word   -24407
+        .word   -25582
+        .word   -26863
+        .word   -28382
+        .word   -29965
+        .word   -31800
+/* negative division factors */
+        .byte   66
+        .byte   70
+        .byte   75
+        .byte   81
+        .byte   87
+        .byte   93
+        .byte   101
+        .byte   109
+        .byte   119
+        .byte   130
+        .byte   142
+        .byte   156
+        .byte   172
+        .byte   192
+        .byte   214
+        .byte   241
+        .skip 16
+        .global __div_table
+__div_table:
+        .skip 16
+/* positive division factors */
+        .byte   241
+        .byte   214
+        .byte   192
+        .byte   172
+        .byte   156
+        .byte   142
+        .byte   130
+        .byte   119
+        .byte   109
+        .byte   101
+        .byte   93
+        .byte   87
+        .byte   81
+        .byte   75
+        .byte   70
+        .byte   66
+/* positive division constants */
+        .word   31801
+        .word   29966
+        .word   28383
+        .word   26864
+        .word   25583
+        .word   24408
+        .word   23354
+        .word   22344
+        .word   21384
+        .word   20584
+        .word   19752
+        .word   19104
+        .word   18434
+        .word   17738
+        .word   17136
+        .word   16639
diff --git a/arch/sh/lib64/strcpy.S b/arch/sh/lib64/strcpy.S
new file mode 100644
index 000000000000..ea7c9c533eea
--- /dev/null
+++ b/arch/sh/lib64/strcpy.S
@@ -0,0 +1,97 @@
+/* Cloned and hacked for uClibc by Paul Mundt, December 2003 */
+/* Modified by SuperH, Inc. September 2003 */
+! Entry: arg0: destination
+!        arg1: source
+! Exit:  result: destination
+!
+! SH5 code Copyright 2002 SuperH Ltd.
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define SHHI shlld
+#define SHLO shlrd
+#else
+#define SHHI shlrd
+#define SHLO shlld
+#endif
+
+        .section .text..SHmedia32,"ax"
+        .globl  strcpy
+        .type   strcpy, @function
+        .align 5
+
+strcpy:
+
+        pta/l shortstring,tr1
+        ldlo.q r3,0,r4
+        ptabs r18,tr4
+        shlli r3,3,r7
+        addi r2, 8, r0
+        mcmpeq.b r4,r63,r6
+        SHHI r6,r7,r6
+        bnei/u r6,0,tr1 // shortstring
+        pta/l no_lddst, tr2
+        ori r3,-8,r23
+        sub r2, r23, r0
+        sub r3, r2, r21
+        addi r21, 8, r20
+        ldx.q r0, r21, r5
+        pta/l loop, tr0
+        ori r2,-8,r22
+        mcmpeq.b r5, r63, r6
+        bgt/u r22, r23, tr2 // no_lddst
+
+        // r22 < r23 :  Need to do a load from the destination.
+        // r22 == r23 : Doesn't actually need to load from destination,
+        //              but still can be handled here.
+        ldlo.q r2, 0, r9
+        movi -1, r8
+        SHLO r8, r7, r8
+        mcmv r4, r8, r9
+        stlo.q r2, 0, r9
+        beqi/l r6, 0, tr0 // loop
+
+        add r5, r63, r4
+        addi r0, 8, r0
+        blink tr1, r63 // shortstring
+no_lddst:
+        // r22 > r23: note that for r22 == r23 the sthi.q would clobber
+        //            bytes before the destination region.
+        stlo.q r2, 0, r4
+        SHHI r4, r7, r4
+        sthi.q r0, -1, r4
+        beqi/l r6, 0, tr0 // loop
+
+        add r5, r63, r4
+        addi r0, 8, r0
+shortstring:
+#if __BYTE_ORDER != __LITTLE_ENDIAN
+        pta/l shortstring2,tr1
+        byterev r4,r4
+#endif
+shortstring2:
+        st.b r0,-8,r4
+        andi r4,0xff,r5
+        shlri r4,8,r4
+        addi r0,1,r0
+        bnei/l r5,0,tr1
+        blink tr4,r63 // return
+        
+        .balign 8
+loop:
+        stlo.q r0, 0, r5
+        ldx.q r0, r20, r4
+        addi r0, 16, r0
+        sthi.q r0, -9, r5
+        mcmpeq.b r4, r63, r6
+        bnei/u r6, 0, tr1 // shortstring
+        ldx.q r0, r21, r5
+        stlo.q r0, -8, r4
+        sthi.q r0, -1, r4
+        mcmpeq.b r5, r63, r6
+        beqi/l r6, 0, tr0 // loop
+
+        add r5, r63, r4
+        addi r0, 8, r0
+        blink tr1, r63 // shortstring
+
+        .size   strcpy,.-strcpy
diff --git a/arch/sh/lib64/strlen.S b/arch/sh/lib64/strlen.S
new file mode 100644
index 000000000000..cbc0d912e5f3
--- /dev/null
+++ b/arch/sh/lib64/strlen.S
@@ -0,0 +1,33 @@
+/*
+ * Simplistic strlen() implementation for SHmedia.
+ *
+ * Copyright (C) 2003  Paul Mundt <lethal@linux-sh.org>
+ */
+
+        .section .text..SHmedia32,"ax"
+        .globl  strlen
+        .type   strlen,@function
+
+        .balign 16
+strlen:
+        ptabs   r18, tr4
+
+        /*
+         * Note: We could easily deal with the NULL case here with a simple
+         * sanity check, though it seems that the behavior we want is to fault
+         * in the event that r2 == NULL, so we don't bother.
+         */
+/*      beqi    r2, 0, tr4 */   ! Sanity check
+
+        movi    -1, r0
+        pta/l   loop, tr0
+loop:
+        ld.b    r2, 0, r1
+        addi    r2, 1, r2
+        addi    r0, 1, r0
+        bnei/l  r1, 0, tr0
+
+        or      r0, r63, r2
+        blink   tr4, r63
+
+        .size   strlen,.-strlen
diff --git a/arch/sh/lib64/udivdi3.S b/arch/sh/lib64/udivdi3.S
new file mode 100644
index 000000000000..6895c0225b85
--- /dev/null
+++ b/arch/sh/lib64/udivdi3.S
@@ -0,0 +1,120 @@
+        .section        .text..SHmedia32,"ax"
+        .align  2
+        .global __udivdi3
+__udivdi3:
+        shlri r3,1,r4
+        nsb r4,r22
+        shlld r3,r22,r6
+        shlri r6,49,r5
+        movi 0xffffffffffffbaf1,r21 /* .l shift count 17.  */
+        sub r21,r5,r1
+        mmulfx.w r1,r1,r4
+        mshflo.w r1,r63,r1
+        sub r63,r22,r20 // r63 == 64 % 64
+        mmulfx.w r5,r4,r4
+        pta large_divisor,tr0
+        addi r20,32,r9
+        msub.w r1,r4,r1
+        madd.w r1,r1,r1
+        mmulfx.w r1,r1,r4
+        shlri r6,32,r7
+        bgt/u r9,r63,tr0 // large_divisor
+        mmulfx.w r5,r4,r4
+        shlri r2,32+14,r19
+        addi r22,-31,r0
+        msub.w r1,r4,r1
+
+        mulu.l r1,r7,r4
+        addi r1,-3,r5
+        mulu.l r5,r19,r5
+        sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
+        shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as
+                         the case may be, %0000000000000000 000.11111111111, still */
+        muls.l r1,r4,r4 /* leaving at least one sign bit.  */
+        mulu.l r5,r3,r8
+        mshalds.l r1,r21,r1
+        shari r4,26,r4
+        shlld r8,r0,r8
+        add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
+        sub r2,r8,r2
+        /* Can do second step of 64 : 32 div now, using r1 and the rest in r2.  */
+
+        shlri r2,22,r21
+        mulu.l r21,r1,r21
+        shlld r5,r0,r8
+        addi r20,30-22,r0
+        shlrd r21,r0,r21
+        mulu.l r21,r3,r5
+        add r8,r21,r8
+        mcmpgt.l r21,r63,r21 // See Note 1
+        addi r20,30,r0
+        mshfhi.l r63,r21,r21
+        sub r2,r5,r2
+        andc r2,r21,r2
+
+        /* small divisor: need a third divide step */
+        mulu.l r2,r1,r7
+        ptabs r18,tr0
+        addi r2,1,r2
+        shlrd r7,r0,r7
+        mulu.l r7,r3,r5
+        add r8,r7,r8
+        sub r2,r3,r2
+        cmpgt r2,r5,r5
+        add r8,r5,r2
+        /* could test r3 here to check for divide by zero.  */
+        blink tr0,r63
+
+large_divisor:
+        mmulfx.w r5,r4,r4
+        shlrd r2,r9,r25
+        shlri r25,32,r8
+        msub.w r1,r4,r1
+
+        mulu.l r1,r7,r4
+        addi r1,-3,r5
+        mulu.l r5,r8,r5
+        sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
+        shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as
+                         the case may be, %0000000000000000 000.11111111111, still */
+        muls.l r1,r4,r4 /* leaving at least one sign bit.  */
+        shlri r5,14-1,r8
+        mulu.l r8,r7,r5
+        mshalds.l r1,r21,r1
+        shari r4,26,r4
+        add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
+        sub r25,r5,r25
+        /* Can do second step of 64 : 32 div now, using r1 and the rest in r25.  */
+
+        shlri r25,22,r21
+        mulu.l r21,r1,r21
+        pta no_lo_adj,tr0
+        addi r22,32,r0
+        shlri r21,40,r21
+        mulu.l r21,r7,r5
+        add r8,r21,r8
+        shlld r2,r0,r2
+        sub r25,r5,r25
+        bgtu/u r7,r25,tr0 // no_lo_adj
+        addi r8,1,r8
+        sub r25,r7,r25
+no_lo_adj:
+        mextr4 r2,r25,r2
+
+        /* large_divisor: only needs a few adjustments.  */
+        mulu.l r8,r6,r5
+        ptabs r18,tr0
+        /* bubble */
+        cmpgtu r5,r2,r5
+        sub r8,r5,r2
+        blink tr0,r63
+        
+/* Note 1: To shift the result of the second divide stage so that the result
+   always fits into 32 bits, yet we still reduce the rest sufficiently
+   would require a lot of instructions to do the shifts just right.  Using
+   the full 64 bit shift result to multiply with the divisor would require
+   four extra instructions for the upper 32 bits (shift / mulu / shift / sub).
+   Fortunately, if the upper 32 bits of the shift result are nonzero, we
+   know that the rest after taking this partial result into account will
+   fit into 32 bits.  So we just clear the upper 32 bits of the rest if the
+   upper 32 bits of the partial result are nonzero.  */
diff --git a/arch/sh/lib64/udivsi3.S b/arch/sh/lib64/udivsi3.S
new file mode 100644
index 000000000000..e68120e4b847
--- /dev/null
+++ b/arch/sh/lib64/udivsi3.S
@@ -0,0 +1,59 @@
+        .global __udivsi3
+        .section        .text..SHmedia32,"ax"
+        .align  2
+
+/*
+   inputs: r4,r5
+   clobbered: r18,r19,r20,r21,r22,r25,tr0
+   result in r0.
+ */
+__udivsi3:
+        addz.l r5,r63,r22
+        nsb r22,r0
+        shlld r22,r0,r25
+        shlri r25,48,r25
+        movi 0xffffffffffffbb0c,r20 /* shift count eqiv 76 */
+        sub r20,r25,r21
+        mmulfx.w r21,r21,r19
+        mshflo.w r21,r63,r21
+        ptabs r18,tr0
+        mmulfx.w r25,r19,r19
+        sub r20,r0,r0
+        /* bubble */
+        msub.w r21,r19,r19
+
+        /*
+         * It would be nice for scheduling to do this add to r21 before
+         * the msub.w, but we need a different value for r19 to keep
+         * errors under control.
+         */
+        addi r19,-2,r21
+        mulu.l r4,r21,r18
+        mmulfx.w r19,r19,r19
+        shlli r21,15,r21
+        shlrd r18,r0,r18
+        mulu.l r18,r22,r20
+        mmacnfx.wl r25,r19,r21
+        /* bubble */
+        sub r4,r20,r25
+
+        mulu.l r25,r21,r19
+        addi r0,14,r0
+        /* bubble */
+        shlrd r19,r0,r19
+        mulu.l r19,r22,r20
+        add r18,r19,r18
+        /* bubble */
+        sub.l r25,r20,r25
+
+        mulu.l r25,r21,r19
+        addz.l r25,r63,r25
+        sub r25,r22,r25
+        shlrd r19,r0,r19
+        mulu.l r19,r22,r20
+        addi r25,1,r25
+        add r18,r19,r18
+
+        cmpgt r25,r20,r25
+        add.l r18,r25,r0
+        blink tr0,r63
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32
index f066e76da204..cb2f3f299591 100644
--- a/arch/sh/mm/Makefile_32
+++ b/arch/sh/mm/Makefile_32
@@ -18,6 +18,7 @@ mmu-y			:= tlb-nommu.o pg-nommu.o
 mmu-$(CONFIG_MMU)       := fault_32.o tlbflush_32.o ioremap_32.o
 
 obj-y                   += $(mmu-y)
+obj-$(CONFIG_DEBUG_FS)  += asids-debugfs.o
 
 ifdef CONFIG_DEBUG_FS
 obj-$(CONFIG_CPU_SH4)   += cache-debugfs.o
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index 9481d0f54efd..2863ffb7006d 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -13,6 +13,7 @@ obj-y			+= cache-sh5.o
 endif
 
 obj-y                   += $(mmu-y)
+obj-$(CONFIG_DEBUG_FS)  += asids-debugfs.o
 
 obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
 obj-$(CONFIG_NUMA)              += numa.o
diff --git a/arch/sh/mm/asids-debugfs.c b/arch/sh/mm/asids-debugfs.c
new file mode 100644
index 000000000000..8e912a15e94f
--- /dev/null
+++ b/arch/sh/mm/asids-debugfs.c
@@ -0,0 +1,79 @@
+/*
+ * debugfs ops for process ASIDs
+ *
+ *  Copyright (C) 2000, 2001  Paolo Alberelli
+ *  Copyright (C) 2003 - 2008  Paul Mundt
+ *  Copyright (C) 2003, 2004  Richard Curnow
+ *
+ * Provides a debugfs file that lists out the ASIDs currently associated
+ * with the processes.
+ *
+ * In the SH-5 case, if the DM.PC register is examined through the debug
+ * link, this shows ASID + PC. To make use of this, the PID->ASID
+ * relationship needs to be known. This is primarily for debugging.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include <linux/spinlock.h>
+#include <asm/processor.h>
+#include <asm/mmu_context.h>
+
+static int asids_seq_show(struct seq_file *file, void *iter)
+{
+        struct task_struct *p;
+
+        read_lock(&tasklist_lock);
+
+        for_each_process(p) {
+                int pid = p->pid;
+
+                if (unlikely(!pid))
+                        continue;
+
+                if (p->mm)
+                        seq_printf(file, "%5d : %02lx\n", pid,
+                                   cpu_asid(smp_processor_id(), p->mm));
+                else
+                        seq_printf(file, "%5d : (none)\n", pid);
+        }
+
+        read_unlock(&tasklist_lock);
+
+        return 0;
+}
+
+static int asids_debugfs_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, asids_seq_show, inode->i_private);
+}
+
+static const struct file_operations asids_debugfs_fops = {
+        .owner          = THIS_MODULE,
+        .open           = asids_debugfs_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init asids_debugfs_init(void)
+{
+        struct dentry *asids_dentry;
+
+        asids_dentry = debugfs_create_file("asids", S_IRUSR, sh_debugfs_root,
+                                           NULL, &asids_debugfs_fops);
+        if (!asids_dentry)
+                return -ENOMEM;
+        if (IS_ERR(asids_dentry))
+                return PTR_ERR(asids_dentry);
+
+        return 0;
+}
+module_init(asids_debugfs_init);
+
+MODULE_LICENSE("GPL v2");
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index 9f8ea3ada4db..edcd5fbf9651 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -42,6 +42,8 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
                 return NULL;
         }
 
+        split_page(pfn_to_page(virt_to_phys(ret) >> PAGE_SHIFT), order);
+
         *dma_handle = virt_to_phys(ret);
         return ret_nocache;
 }
@@ -51,10 +53,13 @@ void dma_free_coherent(struct device *dev, size_t size,
                          void *vaddr, dma_addr_t dma_handle)
 {
         int order = get_order(size);
+        unsigned long pfn = dma_handle >> PAGE_SHIFT;
+        int k;
 
         if (!dma_release_from_coherent(dev, order, vaddr)) {
                 WARN_ON(irqs_disabled());       /* for portability */
-                free_pages((unsigned long)phys_to_virt(dma_handle), order);
+                for (k = 0; k < (1 << order); k++)
+                        __free_pages(pfn_to_page(pfn + k), 0);
                 iounmap(vaddr);
         }
 }
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 898d477e47c1..31a33ebdef6f 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -20,7 +20,6 @@
 #include <asm/system.h>
 #include <asm/mmu_context.h>
 #include <asm/tlbflush.h>
-#include <asm/kgdb.h>
 
 /*
  * This routine handles page faults.  It determines the address,
@@ -265,17 +264,6 @@ static inline int notify_page_fault(struct pt_regs *regs, int trap)
         return ret;
 }
 
-#ifdef CONFIG_SH_STORE_QUEUES
-/*
- * This is a special case for the SH-4 store queues, as pages for this
- * space still need to be faulted in before it's possible to flush the
- * store queue cache for writeout to the remapped region.
- */
-#define P3_ADDR_MAX             (P4SEG_STORE_QUE + 0x04000000)
-#else
-#define P3_ADDR_MAX             P4SEG
-#endif
-
 /*
  * Called with interrupts disabled.
  */
@@ -293,11 +281,6 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
         if (notify_page_fault(regs, lookup_exception_vector()))
                 goto out;
 
-#ifdef CONFIG_SH_KGDB
-        if (kgdb_nofault && kgdb_bus_err_hook)
-                kgdb_bus_err_hook();
-#endif
-
         ret = 1;
 
         /*
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 6cbef8caeb56..3edf297c829b 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -311,7 +311,8 @@ int arch_add_memory(int nid, u64 start, u64 size)
         pgdat = NODE_DATA(nid);
 
         /* We only have ZONE_NORMAL, so this is easy.. */
-        ret = __add_pages(pgdat->node_zones + ZONE_NORMAL, start_pfn, nr_pages);
+        ret = __add_pages(nid, pgdat->node_zones + ZONE_NORMAL,
+                                start_pfn, nr_pages);
         if (unlikely(ret))
                 printk("%s: Failed, __add_pages() == %d\n", __func__, ret);
 
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
index 882a32ebc6b7..32946fba123e 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap_32.c
@@ -116,9 +116,10 @@ EXPORT_SYMBOL(__ioremap);
 void __iounmap(void __iomem *addr)
 {
         unsigned long vaddr = (unsigned long __force)addr;
+        unsigned long seg = PXSEG(vaddr);
         struct vm_struct *p;
 
-        if (PXSEG(vaddr) < P3SEG || is_pci_memaddr(vaddr))
+        if (seg < P3SEG || seg >= P3_ADDR_MAX || is_pci_memaddr(vaddr))
                 return;
 
 #ifdef CONFIG_32BIT
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
index 8837d511710a..931f4d003fa0 100644
--- a/arch/sh/mm/mmap.c
+++ b/arch/sh/mm/mmap.c
@@ -9,7 +9,101 @@
  */
 #include <linux/io.h>
 #include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/module.h>
 #include <asm/page.h>
+#include <asm/processor.h>
+
+#ifdef CONFIG_MMU
+unsigned long shm_align_mask = PAGE_SIZE - 1;   /* Sane caches */
+EXPORT_SYMBOL(shm_align_mask);
+
+/*
+ * To avoid cache aliases, we map the shared page with same color.
+ */
+#define COLOUR_ALIGN(addr, pgoff)                               \
+        ((((addr) + shm_align_mask) & ~shm_align_mask) +        \
+         (((pgoff) << PAGE_SHIFT) & shm_align_mask))
+
+unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
+        unsigned long len, unsigned long pgoff, unsigned long flags)
+{
+        struct mm_struct *mm = current->mm;
+        struct vm_area_struct *vma;
+        unsigned long start_addr;
+        int do_colour_align;
+
+        if (flags & MAP_FIXED) {
+                /* We do not accept a shared mapping if it would violate
+                 * cache aliasing constraints.
+                 */
+                if ((flags & MAP_SHARED) && (addr & shm_align_mask))
+                        return -EINVAL;
+                return addr;
+        }
+
+        if (unlikely(len > TASK_SIZE))
+                return -ENOMEM;
+
+        do_colour_align = 0;
+        if (filp || (flags & MAP_SHARED))
+                do_colour_align = 1;
+
+        if (addr) {
+                if (do_colour_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+                else
+                        addr = PAGE_ALIGN(addr);
+
+                vma = find_vma(mm, addr);
+                if (TASK_SIZE - len >= addr &&
+                    (!vma || addr + len <= vma->vm_start))
+                        return addr;
+        }
+
+        if (len > mm->cached_hole_size) {
+                start_addr = addr = mm->free_area_cache;
+        } else {
+                mm->cached_hole_size = 0;
+                start_addr = addr = TASK_UNMAPPED_BASE;
+        }
+
+full_search:
+        if (do_colour_align)
+                addr = COLOUR_ALIGN(addr, pgoff);
+        else
+                addr = PAGE_ALIGN(mm->free_area_cache);
+
+        for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
+                /* At this point:  (!vma || addr < vma->vm_end). */
+                if (unlikely(TASK_SIZE - len < addr)) {
+                        /*
+                         * Start a new search - just in case we missed
+                         * some holes.
+                         */
+                        if (start_addr != TASK_UNMAPPED_BASE) {
+                                start_addr = addr = TASK_UNMAPPED_BASE;
+                                mm->cached_hole_size = 0;
+                                goto full_search;
+                        }
+                        return -ENOMEM;
+                }
+                if (likely(!vma || addr + len <= vma->vm_start)) {
+                        /*
+                         * Remember the place where we stopped the search:
+                         */
+                        mm->free_area_cache = addr + len;
+                        return addr;
+                }
+                if (addr + mm->cached_hole_size < vma->vm_start)
+                        mm->cached_hole_size = vma->vm_start - addr;
+
+                addr = vma->vm_end;
+                if (do_colour_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+        }
+}
+#endif /* CONFIG_MMU */
 
 /*
  * You really shouldn't be using read() or write() on /dev/mem.  This
diff --git a/arch/sh/oprofile/Makefile b/arch/sh/oprofile/Makefile
index 2efc2e79fd29..8e6eec91c14c 100644
--- a/arch/sh/oprofile/Makefile
+++ b/arch/sh/oprofile/Makefile
@@ -6,13 +6,8 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
                 oprofilefs.o oprofile_stats.o \
                 timer_int.o )
 
-profdrvr-y                              := op_model_null.o
+oprofile-y      := $(DRIVER_OBJS) common.o backtrace.o
 
-# SH7750-style performance counters exist across 7750/7750S and 7091.
-profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750S)  := op_model_sh7750.o
-profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750)   := op_model_sh7750.o
-profdrvr-$(CONFIG_CPU_SUBTYPE_SH7091)   := op_model_sh7750.o
-
-oprofile-y                              := $(DRIVER_OBJS) $(profdrvr-y)
-
-EXTRA_CFLAGS += -Werror
+oprofile-$(CONFIG_CPU_SUBTYPE_SH7750S)  += op_model_sh7750.o
+oprofile-$(CONFIG_CPU_SUBTYPE_SH7750)   += op_model_sh7750.o
+oprofile-$(CONFIG_CPU_SUBTYPE_SH7091)   += op_model_sh7750.o
diff --git a/arch/sh/oprofile/backtrace.c b/arch/sh/oprofile/backtrace.c
new file mode 100644
index 000000000000..9499a2914f89
--- /dev/null
+++ b/arch/sh/oprofile/backtrace.c
@@ -0,0 +1,114 @@
+/*
+ * SH specific backtracing code for oprofile
+ *
+ * Copyright 2007 STMicroelectronics Ltd.
+ *
+ * Author: Dave Peverley <dpeverley@mpc-data.co.uk>
+ *
+ * Based on ARM oprofile backtrace code by Richard Purdie and in turn, i386
+ * oprofile backtrace code by John Levon, David Smith
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/oprofile.h>
+#include <linux/sched.h>
+#include <linux/kallsyms.h>
+#include <linux/mm.h>
+#include <asm/ptrace.h>
+#include <asm/uaccess.h>
+#include <asm/sections.h>
+
+/* Limit to stop backtracing too far. */
+static int backtrace_limit = 20;
+
+static unsigned long *
+user_backtrace(unsigned long *stackaddr, struct pt_regs *regs)
+{
+        unsigned long buf_stack;
+
+        /* Also check accessibility of address */
+        if (!access_ok(VERIFY_READ, stackaddr, sizeof(unsigned long)))
+                return NULL;
+
+        if (__copy_from_user_inatomic(&buf_stack, stackaddr, sizeof(unsigned long)))
+                return NULL;
+
+        /* Quick paranoia check */
+        if (buf_stack & 3)
+                return NULL;
+
+        oprofile_add_trace(buf_stack);
+
+        stackaddr++;
+
+        return stackaddr;
+}
+
+/*
+ * |             | /\ Higher addresses
+ * |             |
+ * --------------- stack base (address of current_thread_info)
+ * | thread info |
+ * .             .
+ * |    stack    |
+ * --------------- saved regs->regs[15] value if valid
+ * .             .
+ * --------------- struct pt_regs stored on stack (struct pt_regs *)
+ * |             |
+ * .             .
+ * |             |
+ * --------------- ???
+ * |             |
+ * |             | \/ Lower addresses
+ *
+ * Thus, &pt_regs <-> stack base restricts the valid(ish) fp values
+ */
+static int valid_kernel_stack(unsigned long *stackaddr, struct pt_regs *regs)
+{
+        unsigned long stack = (unsigned long)regs;
+        unsigned long stack_base = (stack & ~(THREAD_SIZE - 1)) + THREAD_SIZE;
+
+        return ((unsigned long)stackaddr > stack) && ((unsigned long)stackaddr < stack_base);
+}
+
+static unsigned long *
+kernel_backtrace(unsigned long *stackaddr, struct pt_regs *regs)
+{
+        unsigned long addr;
+
+        /*
+         * If not a valid kernel address, keep going till we find one
+         * or the SP stops being a valid address.
+         */
+        do {
+                addr = *stackaddr++;
+                oprofile_add_trace(addr);
+        } while (valid_kernel_stack(stackaddr, regs));
+
+        return stackaddr;
+}
+
+void sh_backtrace(struct pt_regs * const regs, unsigned int depth)
+{
+        unsigned long *stackaddr;
+
+        /*
+         * Paranoia - clip max depth as we could get lost in the weeds.
+         */
+        if (depth > backtrace_limit)
+                depth = backtrace_limit;
+
+        stackaddr = (unsigned long *)regs->regs[15];
+        if (!user_mode(regs)) {
+                while (depth-- && valid_kernel_stack(stackaddr, regs))
+                        stackaddr = kernel_backtrace(stackaddr, regs);
+
+                return;
+        }
+
+        while (depth-- && (stackaddr != NULL))
+                stackaddr = user_backtrace(stackaddr, regs);
+}
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
new file mode 100644
index 000000000000..1d97d64cb95f
--- /dev/null
+++ b/arch/sh/oprofile/common.c
@@ -0,0 +1,150 @@
+/*
+ * arch/sh/oprofile/init.c
+ *
+ * Copyright (C) 2003 - 2008  Paul Mundt
+ *
+ * Based on arch/mips/oprofile/common.c:
+ *
+ *      Copyright (C) 2004, 2005 Ralf Baechle
+ *      Copyright (C) 2005 MIPS Technologies, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/oprofile.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/smp.h>
+#include <asm/processor.h>
+#include "op_impl.h"
+
+extern struct op_sh_model op_model_sh7750_ops __weak;
+extern struct op_sh_model op_model_sh4a_ops __weak;
+
+static struct op_sh_model *model;
+
+static struct op_counter_config ctr[20];
+
+extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth);
+
+static int op_sh_setup(void)
+{
+        /* Pre-compute the values to stuff in the hardware registers.  */
+        model->reg_setup(ctr);
+
+        /* Configure the registers on all cpus.  */
+        on_each_cpu(model->cpu_setup, NULL, 1);
+
+        return 0;
+}
+
+static int op_sh_create_files(struct super_block *sb, struct dentry *root)
+{
+        int i, ret = 0;
+
+        for (i = 0; i < model->num_counters; i++) {
+                struct dentry *dir;
+                char buf[4];
+
+                snprintf(buf, sizeof(buf), "%d", i);
+                dir = oprofilefs_mkdir(sb, root, buf);
+
+                ret |= oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
+                ret |= oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
+                ret |= oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
+                ret |= oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
+
+                if (model->create_files)
+                        ret |= model->create_files(sb, dir);
+                else
+                        ret |= oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
+
+                /* Dummy entries */
+                ret |= oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
+        }
+
+        return ret;
+}
+
+static int op_sh_start(void)
+{
+        /* Enable performance monitoring for all counters.  */
+        on_each_cpu(model->cpu_start, NULL, 1);
+
+        return 0;
+}
+
+static void op_sh_stop(void)
+{
+        /* Disable performance monitoring for all counters.  */
+        on_each_cpu(model->cpu_stop, NULL, 1);
+}
+
+int __init oprofile_arch_init(struct oprofile_operations *ops)
+{
+        struct op_sh_model *lmodel = NULL;
+        int ret;
+
+        /*
+         * Always assign the backtrace op. If the counter initialization
+         * fails, we fall back to the timer which will still make use of
+         * this.
+         */
+        ops->backtrace = sh_backtrace;
+
+        switch (current_cpu_data.type) {
+        /* SH-4 types */
+        case CPU_SH7750:
+        case CPU_SH7750S:
+                lmodel = &op_model_sh7750_ops;
+                break;
+
+        /* SH-4A types */
+        case CPU_SH7763:
+        case CPU_SH7770:
+        case CPU_SH7780:
+        case CPU_SH7781:
+        case CPU_SH7785:
+        case CPU_SH7723:
+        case CPU_SHX3:
+                lmodel = &op_model_sh4a_ops;
+                break;
+
+        /* SH4AL-DSP types */
+        case CPU_SH7343:
+        case CPU_SH7722:
+        case CPU_SH7366:
+                lmodel = &op_model_sh4a_ops;
+                break;
+        }
+
+        if (!lmodel)
+                return -ENODEV;
+        if (!(current_cpu_data.flags & CPU_HAS_PERF_COUNTER))
+                return -ENODEV;
+
+        ret = lmodel->init();
+        if (unlikely(ret != 0))
+                return ret;
+
+        model = lmodel;
+
+        ops->setup              = op_sh_setup;
+        ops->create_files       = op_sh_create_files;
+        ops->start              = op_sh_start;
+        ops->stop               = op_sh_stop;
+        ops->cpu_type           = lmodel->cpu_type;
+
+        printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
+               lmodel->cpu_type);
+
+        return 0;
+}
+
+void oprofile_arch_exit(void)
+{
+        if (model && model->exit)
+                model->exit();
+}
diff --git a/arch/sh/oprofile/op_impl.h b/arch/sh/oprofile/op_impl.h
new file mode 100644
index 000000000000..4d509975eba6
--- /dev/null
+++ b/arch/sh/oprofile/op_impl.h
@@ -0,0 +1,33 @@
+#ifndef __OP_IMPL_H
+#define __OP_IMPL_H
+
+/* Per-counter configuration as set via oprofilefs.  */
+struct op_counter_config {
+        unsigned long enabled;
+        unsigned long event;
+
+        unsigned long long count;
+
+        /* Dummy values for userspace tool compliance */
+        unsigned long kernel;
+        unsigned long user;
+        unsigned long unit_mask;
+};
+
+/* Per-architecture configury and hooks.  */
+struct op_sh_model {
+        void (*reg_setup)(struct op_counter_config *);
+        int (*create_files)(struct super_block *sb, struct dentry *dir);
+        void (*cpu_setup)(void *dummy);
+        int (*init)(void);
+        void (*exit)(void);
+        void (*cpu_start)(void *args);
+        void (*cpu_stop)(void *args);
+        char *cpu_type;
+        unsigned char num_counters;
+};
+
+/* arch/sh/oprofile/common.c */
+extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth);
+
+#endif /* __OP_IMPL_H */
diff --git a/arch/sh/oprofile/op_model_null.c b/arch/sh/oprofile/op_model_null.c
deleted file mode 100644
index a845b088edb4..000000000000
--- a/arch/sh/oprofile/op_model_null.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/sh/oprofile/op_model_null.c
- *
- * Copyright (C) 2003  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/oprofile.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-
-int __init oprofile_arch_init(struct oprofile_operations *ops)
-{
-        return -ENODEV;
-}
-
-void oprofile_arch_exit(void)
-{
-}
-
diff --git a/arch/sh/oprofile/op_model_sh7750.c b/arch/sh/oprofile/op_model_sh7750.c
index 008b3b03750a..c892c7c30c2f 100644
--- a/arch/sh/oprofile/op_model_sh7750.c
+++ b/arch/sh/oprofile/op_model_sh7750.c
@@ -3,7 +3,7 @@
  *
  * OProfile support for SH7750/SH7750S Performance Counters
  *
- * Copyright (C) 2003, 2004  Paul Mundt
+ * Copyright (C) 2003 - 2008  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -15,19 +15,16 @@
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/interrupt.h>
+#include <linux/io.h>
 #include <linux/fs.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include "op_impl.h"
 
 #define PM_CR_BASE      0xff000084      /* 16-bit */
 #define PM_CTR_BASE     0xff100004      /* 32-bit */
 
-#define PMCR1           (PM_CR_BASE  + 0x00)
-#define PMCR2           (PM_CR_BASE  + 0x04)
-#define PMCTR1H         (PM_CTR_BASE + 0x00)
-#define PMCTR1L         (PM_CTR_BASE + 0x04)
-#define PMCTR2H         (PM_CTR_BASE + 0x08)
-#define PMCTR2L         (PM_CTR_BASE + 0x0c)
+#define PMCR(n)         (PM_CR_BASE + ((n) * 0x04))
+#define PMCTRH(n)       (PM_CTR_BASE + 0x00 + ((n) * 0x08))
+#define PMCTRL(n)       (PM_CTR_BASE + 0x04 + ((n) * 0x08))
 
 #define PMCR_PMM_MASK   0x0000003f
 
@@ -36,25 +33,15 @@
 #define PMCR_PMST       0x00004000
 #define PMCR_PMEN       0x00008000
 
-#define PMCR_ENABLE     (PMCR_PMST | PMCR_PMEN)
+struct op_sh_model op_model_sh7750_ops;
 
-/*
- * SH7750/SH7750S have 2 perf counters
- */
 #define NR_CNTRS        2
 
-struct op_counter_config {
-        unsigned long enabled;
-        unsigned long event;
-        unsigned long count;
-
-        /* Dummy values for userspace tool compliance */
-        unsigned long kernel;
-        unsigned long user;
-        unsigned long unit_mask;
-};
-
-static struct op_counter_config ctr[NR_CNTRS];
+static struct sh7750_ppc_register_config {
+        unsigned int ctrl;
+        unsigned long cnt_hi;
+        unsigned long cnt_lo;
+} regcache[NR_CNTRS];
 
 /*
  * There are a number of events supported by each counter (33 in total).
@@ -116,12 +103,8 @@ static int sh7750_timer_notify(struct pt_regs *regs)
 
 static u64 sh7750_read_counter(int counter)
 {
-        u32 hi, lo;
-
-        hi = (counter == 0) ? ctrl_inl(PMCTR1H) : ctrl_inl(PMCTR2H);
-        lo = (counter == 0) ? ctrl_inl(PMCTR1L) : ctrl_inl(PMCTR2L);
-
-        return (u64)((u64)(hi & 0xffff) << 32) | lo;
+        return (u64)((u64)(__raw_readl(PMCTRH(counter)) & 0xffff) << 32) |
+                           __raw_readl(PMCTRL(counter));
 }
 
 /*
@@ -170,11 +153,7 @@ static ssize_t sh7750_write_count(struct file *file, const char __user *buf,
          */
         WARN_ON(val != 0);
 
-        if (counter == 0) {
-                ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1);
-        } else {
-                ctrl_outw(ctrl_inw(PMCR2) | PMCR_PMCLR, PMCR2);
-        }
+        __raw_writew(__raw_readw(PMCR(counter)) | PMCR_PMCLR, PMCR(counter));
 
         return count;
 }
@@ -184,88 +163,93 @@ static const struct file_operations count_fops = {
         .write          = sh7750_write_count,
 };
 
-static int sh7750_perf_counter_create_files(struct super_block *sb, struct dentry *root)
+static int sh7750_ppc_create_files(struct super_block *sb, struct dentry *dir)
 {
-        int i;
+        return oprofilefs_create_file(sb, dir, "count", &count_fops);
+}
 
-        for (i = 0; i < NR_CNTRS; i++) {
-                struct dentry *dir;
-                char buf[4];
+static void sh7750_ppc_reg_setup(struct op_counter_config *ctr)
+{
+        unsigned int counters = op_model_sh7750_ops.num_counters;
+        int i;
 
-                snprintf(buf, sizeof(buf), "%d", i);
-                dir = oprofilefs_mkdir(sb, root, buf);
+        for (i = 0; i < counters; i++) {
+                regcache[i].ctrl        = 0;
+                regcache[i].cnt_hi      = 0;
+                regcache[i].cnt_lo      = 0;
 
-                oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
-                oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
-                oprofilefs_create_file(sb, dir, "count", &count_fops);
+                if (!ctr[i].enabled)
+                        continue;
 
-                /* Dummy entries */
-                oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
-                oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
-                oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
+                regcache[i].ctrl |= ctr[i].event | PMCR_PMEN | PMCR_PMST;
+                regcache[i].cnt_hi = (unsigned long)((ctr->count >> 32) & 0xffff);
+                regcache[i].cnt_lo = (unsigned long)(ctr->count & 0xffffffff);
         }
-
-        return 0;
 }
 
-static int sh7750_perf_counter_start(void)
+static void sh7750_ppc_cpu_setup(void *args)
 {
-        u16 pmcr;
-
-        /* Enable counter 1 */
-        if (ctr[0].enabled) {
-                pmcr = ctrl_inw(PMCR1);
-                WARN_ON(pmcr & PMCR_PMEN);
-
-                pmcr &= ~PMCR_PMM_MASK;
-                pmcr |= ctr[0].event;
-                ctrl_outw(pmcr | PMCR_ENABLE, PMCR1);
-        }
-
-        /* Enable counter 2 */
-        if (ctr[1].enabled) {
-                pmcr = ctrl_inw(PMCR2);
-                WARN_ON(pmcr & PMCR_PMEN);
+        unsigned int counters = op_model_sh7750_ops.num_counters;
+        int i;
 
-                pmcr &= ~PMCR_PMM_MASK;
-                pmcr |= ctr[1].event;
-                ctrl_outw(pmcr | PMCR_ENABLE, PMCR2);
+        for (i = 0; i < counters; i++) {
+                __raw_writew(0, PMCR(i));
+                __raw_writel(regcache[i].cnt_hi, PMCTRH(i));
+                __raw_writel(regcache[i].cnt_lo, PMCTRL(i));
         }
-
-        return register_timer_hook(sh7750_timer_notify);
 }
 
-static void sh7750_perf_counter_stop(void)
+static void sh7750_ppc_cpu_start(void *args)
 {
-        ctrl_outw(ctrl_inw(PMCR1) & ~PMCR_PMEN, PMCR1);
-        ctrl_outw(ctrl_inw(PMCR2) & ~PMCR_PMEN, PMCR2);
+        unsigned int counters = op_model_sh7750_ops.num_counters;
+        int i;
 
-        unregister_timer_hook(sh7750_timer_notify);
+        for (i = 0; i < counters; i++)
+                __raw_writew(regcache[i].ctrl, PMCR(i));
 }
 
-static struct oprofile_operations sh7750_perf_counter_ops = {
-        .create_files   = sh7750_perf_counter_create_files,
-        .start          = sh7750_perf_counter_start,
-        .stop           = sh7750_perf_counter_stop,
-};
-
-int __init oprofile_arch_init(struct oprofile_operations *ops)
+static void sh7750_ppc_cpu_stop(void *args)
 {
-        if (!(current_cpu_data.flags & CPU_HAS_PERF_COUNTER))
-                return -ENODEV;
+        unsigned int counters = op_model_sh7750_ops.num_counters;
+        int i;
 
-        ops = &sh7750_perf_counter_ops;
-        ops->cpu_type = "sh/sh7750";
+        /* Disable the counters */
+        for (i = 0; i < counters; i++)
+                __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
+}
 
-        printk(KERN_INFO "oprofile: using SH-4 performance monitoring.\n");
+static inline void sh7750_ppc_reset(void)
+{
+        unsigned int counters = op_model_sh7750_ops.num_counters;
+        int i;
 
         /* Clear the counters */
-        ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1);
-        ctrl_outw(ctrl_inw(PMCR2) | PMCR_PMCLR, PMCR2);
+        for (i = 0; i < counters; i++)
+                __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMCLR, PMCR(i));
+}
 
-        return 0;
+static int sh7750_ppc_init(void)
+{
+        sh7750_ppc_reset();
+
+        return register_timer_hook(sh7750_timer_notify);
 }
 
-void oprofile_arch_exit(void)
+static void sh7750_ppc_exit(void)
 {
+        unregister_timer_hook(sh7750_timer_notify);
+
+        sh7750_ppc_reset();
 }
+
+struct op_sh_model op_model_sh7750_ops = {
+        .cpu_type       = "sh/sh7750",
+        .num_counters   = NR_CNTRS,
+        .reg_setup      = sh7750_ppc_reg_setup,
+        .cpu_setup      = sh7750_ppc_cpu_setup,
+        .cpu_start      = sh7750_ppc_cpu_start,
+        .cpu_stop       = sh7750_ppc_cpu_stop,
+        .init           = sh7750_ppc_init,
+        .exit           = sh7750_ppc_exit,
+        .create_files   = sh7750_ppc_create_files,
+};
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index d0c2928d1066..284b7e867496 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -8,6 +8,7 @@
 SE                      SH_SOLUTION_ENGINE
 HIGHLANDER              SH_HIGHLANDER
 RTS7751R2D              SH_RTS7751R2D
+RSK                     SH_RSK
 
 #
 # List of companion chips / MFDs.
@@ -46,6 +47,7 @@ R2D_1			RTS7751R2D_1
 CAYMAN                  SH_CAYMAN
 SDK7780                 SH_SDK7780
 MIGOR                   SH_MIGOR
+RSK7201                 SH_RSK7201
 RSK7203                 SH_RSK7203
 AP325RXA                SH_AP325RXA
 SH7763RDP               SH_SH7763RDP
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index e594559c8dba..de58c02633b4 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -4,21 +4,113 @@
 
 mainmenu "Linux/SPARC Kernel Configuration"
 
+config 64BIT
+        bool "64-bit kernel" if ARCH = "sparc"
+        default ARCH = "sparc64"
+        help
+          SPARC is a family of RISC microprocessors designed and marketed by
+          Sun Microsystems, incorporated.  They are very widely found in Sun
+          workstations and clones.
+
+          Say yes to build a 64-bit kernel - formerly known as sparc64
+          Say no to build a 32-bit kernel - formerly known as sparc
+
+config SPARC
+        bool
+        default y
+        select HAVE_IDE
+        select HAVE_OPROFILE
+        select HAVE_ARCH_KGDB if !SMP || SPARC64
+        select HAVE_ARCH_TRACEHOOK
+        select ARCH_WANT_OPTIONAL_GPIOLIB
+        select RTC_CLASS
+        select RTC_DRV_M48T59
+
+config SPARC32
+        def_bool !64BIT
+
+config SPARC64
+        def_bool 64BIT
+        select ARCH_SUPPORTS_MSI
+        select HAVE_FUNCTION_TRACER
+        select HAVE_KRETPROBES
+        select HAVE_KPROBES
+        select HAVE_LMB
+        select USE_GENERIC_SMP_HELPERS if SMP
+        select RTC_DRV_CMOS
+        select RTC_DRV_BQ4802
+        select RTC_DRV_SUN4V
+        select RTC_DRV_STARFIRE
+
+config ARCH_DEFCONFIG
+        string
+        default "arch/sparc/configs/sparc32_defconfig" if SPARC32
+        default "arch/sparc/configs/sparc64_defconfig" if SPARC64
+
+# CONFIG_BITS can be used at source level to get 32/64 bits
+config BITS
+        int
+        default 32 if SPARC32
+        default 64 if SPARC64
+
+config GENERIC_TIME
+        bool
+        default y if SPARC64
+
+config GENERIC_CMOS_UPDATE
+        bool
+        default y if SPARC64
+
+config GENERIC_CLOCKEVENTS
+        bool
+        default y if SPARC64
+
+config IOMMU_HELPER
+        bool
+        default y if SPARC64
+
+config QUICKLIST
+        bool
+        default y if SPARC64
+
+config STACKTRACE_SUPPORT
+        bool
+        default y if SPARC64
+
+config LOCKDEP_SUPPORT
+        bool
+        default y if SPARC64
+
+config HAVE_LATENCYTOP_SUPPORT
+        bool
+        default y if SPARC64
+
+config AUDIT_ARCH
+        bool
+        default y
+
+config HAVE_SETUP_PER_CPU_AREA
+        def_bool y if SPARC64
+
+config GENERIC_HARDIRQS_NO__DO_IRQ
+        bool
+        def_bool y if SPARC64
+
 config MMU
         bool
         default y
 
 config HIGHMEM
         bool
-        default y
+        default y if SPARC32
 
 config ZONE_DMA
         bool
-        default y
+        default y if SPARC32
 
 config GENERIC_ISA_DMA
         bool
-        default y
+        default y if SPARC32
 
 config GENERIC_GPIO
         bool
@@ -31,15 +123,11 @@ config ARCH_NO_VIRT_TO_BUS
 config OF
         def_bool y
 
-config HZ
-        int
-        default 100
-
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
 
-menu "General machine setup"
+menu "Processor type and features"
 
 config SMP
         bool "Symmetric multi-processing support (does not work on sun4/sun4c)"
@@ -64,82 +152,261 @@ config SMP
           If you don't know what to do here, say N.
 
 config NR_CPUS
-        int "Maximum number of CPUs (2-32)"
-        range 2 32
+        int "Maximum number of CPUs"
         depends on SMP
-        default "32"
+        range 2 32 if SPARC32
+        range 2 1024 if SPARC64
+        default 32 if SPARC32
+        default 64 if SPARC64
 
-config SPARC
+source kernel/Kconfig.hz
+
+config RWSEM_GENERIC_SPINLOCK
+        bool
+        default y if SPARC32
+
+config RWSEM_XCHGADD_ALGORITHM
+        bool
+        default y if SPARC64
+
+config GENERIC_FIND_NEXT_BIT
         bool
         default y
-        select HAVE_IDE
-        select HAVE_OPROFILE
-        select HAVE_ARCH_KGDB if !SMP
-        select HAVE_ARCH_TRACEHOOK
-        select ARCH_WANT_OPTIONAL_GPIOLIB
-        select RTC_CLASS
-        select RTC_DRV_M48T59
 
-# Identify this as a Sparc32 build
-config SPARC32
+config GENERIC_HWEIGHT
+        bool
+        default y if !ULTRA_HAS_POPULATION_COUNT
+
+config GENERIC_CALIBRATE_DELAY
         bool
         default y
-        help
-          SPARC is a family of RISC microprocessors designed and marketed by
-          Sun Microsystems, incorporated.  They are very widely found in Sun
-          workstations and clones. This port covers the original 32-bit SPARC;
-          it is old and stable and usually considered one of the "big three"
-          along with the Intel and Alpha ports.  The UltraLinux project
-          maintains both the SPARC32 and SPARC64 ports; its web page is
-          available at <http://www.ultralinux.org/>.
 
-# Global things across all Sun machines.
-config ISA
+config ARCH_MAY_HAVE_PC_FDC
         bool
-        help
-          ISA is found on Espresso only and is not supported currently.
-          Say N
+        default y
 
-config EISA
+config EMULATED_CMPXCHG
         bool
+        default y if SPARC32
         help
-          EISA is not supported.
-          Say N
+          Sparc32 does not have a CAS instruction like sparc64. cmpxchg()
+          is emulated, and therefore it is not completely atomic.
+
+# Makefile helpers
+config SPARC32_SMP
+        bool
+        default y
+        depends on SPARC32 && SMP
 
-config MCA
+config SPARC64_SMP
         bool
+        default y
+        depends on SPARC64 && SMP
+
+choice
+        prompt "Kernel page size" if SPARC64
+        default SPARC64_PAGE_SIZE_8KB
+
+config SPARC64_PAGE_SIZE_8KB
+        bool "8KB"
         help
-          MCA is not supported.
-          Say N
+          This lets you select the page size of the kernel.
 
-config PCMCIA
-        tristate
-        ---help---
-          Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
-          computer.  These are credit-card size devices such as network cards,
-          modems or hard drives often used with laptops computers.  There are
-          actually two varieties of these cards: the older 16 bit PCMCIA cards
-          and the newer 32 bit CardBus cards.  If you want to use CardBus
-          cards, you need to say Y here and also to "CardBus support" below.
+          8KB and 64KB work quite well, since SPARC ELF sections
+          provide for up to 64KB alignment.
 
-          To use your PC-cards, you will need supporting software from David
-          Hinds' pcmcia-cs package (see the file <file:Documentation/Changes>
-          for location).  Please also read the PCMCIA-HOWTO, available from
-          <http://www.tldp.org/docs.html#howto>.
+          If you don't know what to do, choose 8KB.
 
-          To compile this driver as modules, choose M here: the
-          modules will be called pcmcia_core and ds.
+config SPARC64_PAGE_SIZE_64KB
+        bool "64KB"
 
-config SBUS
+endchoice
+
+config SECCOMP
+        bool "Enable seccomp to safely compute untrusted bytecode"
+        depends on SPARC64 && PROC_FS
+        default y
+        help
+          This kernel feature is useful for number crunching applications
+          that may need to compute untrusted bytecode during their
+          execution. By using pipes or other transports made available to
+          the process as file descriptors supporting the read/write
+          syscalls, it's possible to isolate those applications in
+          their own address space using seccomp. Once seccomp is
+          enabled via /proc/<pid>/seccomp, it cannot be disabled
+          and the task is only allowed to execute a few safe syscalls
+          defined by each seccomp mode.
+
+          If unsure, say Y. Only embedded should say N here.
+
+config HOTPLUG_CPU
+        bool "Support for hot-pluggable CPUs"
+        depends on SPARC64 && SMP
+        select HOTPLUG
+        help
+          Say Y here to experiment with turning CPUs off and on.  CPUs
+          can be controlled through /sys/devices/system/cpu/cpu#.
+          Say N if you want to disable CPU hotplug.
+
+config GENERIC_HARDIRQS
         bool
+        default y if SPARC64
+
+source "kernel/time/Kconfig"
+
+if SPARC64
+source "drivers/cpufreq/Kconfig"
+
+config US3_FREQ
+        tristate "UltraSPARC-III CPU Frequency driver"
+        depends on CPU_FREQ
+        select CPU_FREQ_TABLE
+        help
+          This adds the CPUFreq driver for UltraSPARC-III processors.
+
+          For details, take a look at <file:Documentation/cpu-freq>.
+
+          If in doubt, say N.
+
+config US2E_FREQ
+        tristate "UltraSPARC-IIe CPU Frequency driver"
+        depends on CPU_FREQ
+        select CPU_FREQ_TABLE
+        help
+          This adds the CPUFreq driver for UltraSPARC-IIe processors.
+
+          For details, take a look at <file:Documentation/cpu-freq>.
+
+          If in doubt, say N.
+
+endif
+
+config US3_MC
+        tristate "UltraSPARC-III Memory Controller driver"
+        depends on SPARC64
         default y
+        help
+          This adds a driver for the UltraSPARC-III memory controller.
+          Loading this driver allows exact mnemonic strings to be
+          printed in the event of a memory error, so that the faulty DIMM
+          on the motherboard can be matched to the error.
 
-config SBUSCHAR
+          If in doubt, say Y, as this information can be very useful.
+
+# Global things across all Sun machines.
+config GENERIC_LOCKBREAK
         bool
         default y
+        depends on SPARC64 && SMP && PREEMPT
+
+choice
+        prompt "SPARC64 Huge TLB Page Size"
+        depends on SPARC64 && HUGETLB_PAGE
+        default HUGETLB_PAGE_SIZE_4MB
+
+config HUGETLB_PAGE_SIZE_4MB
+        bool "4MB"
+
+config HUGETLB_PAGE_SIZE_512K
+        bool "512K"
+
+config HUGETLB_PAGE_SIZE_64K
+        depends on !SPARC64_PAGE_SIZE_64KB
+        bool "64K"
+
+endchoice
+
+config NUMA
+        bool "NUMA support"
+        depends on SPARC64 && SMP
+
+config NODES_SHIFT
+        int
+        default "4"
+        depends on NEED_MULTIPLE_NODES
+
+# Some NUMA nodes have memory ranges that span
+# other nodes.  Even though a pfn is valid and
+# between a node's start and end pfns, it may not
+# reside on that node.  See memmap_init_zone()
+# for details.
+config NODES_SPAN_OTHER_NODES
+        def_bool y
+        depends on NEED_MULTIPLE_NODES
+
+config ARCH_POPULATES_NODE_MAP
+        def_bool y if SPARC64
+
+config ARCH_SELECT_MEMORY_MODEL
+        def_bool y if SPARC64
+
+config ARCH_SPARSEMEM_ENABLE
+        def_bool y if SPARC64
+        select SPARSEMEM_VMEMMAP_ENABLE
+
+config ARCH_SPARSEMEM_DEFAULT
+        def_bool y if SPARC64
+
+source "mm/Kconfig"
+
+config SCHED_SMT
+        bool "SMT (Hyperthreading) scheduler support"
+        depends on SPARC64 && SMP
+        default y
+        help
+          SMT scheduler support improves the CPU scheduler's decision making
+          when dealing with SPARC cpus at a cost of slightly increased overhead
+          in some places. If unsure say N here.
+
+config SCHED_MC
+        bool "Multi-core scheduler support"
+        depends on SPARC64 && SMP
+        default y
+        help
+          Multi-core scheduler support improves the CPU scheduler's decision
+          making when dealing with multi-core CPU chips at a cost of slightly
+          increased overhead in some places. If unsure say N here.
+
+if SPARC64
+source "kernel/Kconfig.preempt"
+endif
+
+config CMDLINE_BOOL
+        bool "Default bootloader kernel arguments"
+        depends on SPARC64
+
+config CMDLINE
+        string "Initial kernel command string"
+        depends on CMDLINE_BOOL
+        default "console=ttyS0,9600 root=/dev/sda1"
+        help
+          Say Y here if you want to be able to pass default arguments to
+          the kernel. This will be overridden by the bootloader, if you
+          use one (such as SILO). This is most useful if you want to boot
+          a kernel from TFTP, and want default options to be available
+          with having them passed on the command line.
+
+          NOTE: This option WILL override the PROM bootargs setting!
+
+config SUN_PM
+        bool
+        default y if SPARC32
+        help
+          Enable power management and CPU standby features on supported
+          SPARC platforms.
+
+config SPARC_LED
+        tristate "Sun4m LED driver"
+        depends on SPARC32
+        help
+          This driver toggles the front-panel LED on sun4m systems
+          in a user-specifiable manner.  Its state can be probed
+          by reading /proc/led and its blinking mode can be changed
+          via writes to /proc/led
 
 config SERIAL_CONSOLE
         bool
+        depends on SPARC32
         default y
         ---help---
           If you say Y here, it will be possible to use a serial port as the
@@ -161,71 +428,46 @@ config SERIAL_CONSOLE
 
           If unsure, say N.
 
-config SUN_AUXIO
-        bool
-        default y
-
-config SUN_IO
-        bool
-        default y
-
-config RWSEM_GENERIC_SPINLOCK
-        bool
-        default y
-
-config RWSEM_XCHGADD_ALGORITHM
-        bool
-
-config GENERIC_FIND_NEXT_BIT
-        bool
-        default y
-
-config GENERIC_HWEIGHT
-        bool
-        default y
-
-config GENERIC_CALIBRATE_DELAY
-        bool
-        default y
+endmenu
 
-config ARCH_MAY_HAVE_PC_FDC
+menu "Bus options (PCI etc.)"
+config SBUS
         bool
         default y
 
-config ARCH_HAS_ILOG2_U32
-        bool
-        default n
-
-config ARCH_HAS_ILOG2_U64
-        bool
-        default n
-
-config EMULATED_CMPXCHG
+config SBUSCHAR
         bool
         default y
-        help
-          Sparc32 does not have a CAS instruction like sparc64. cmpxchg()
-          is emulated, and therefore it is not completely atomic.
 
-config SUN_PM
-        bool
-        default y
+config SUN_LDOMS
+        bool "Sun Logical Domains support"
+        depends on SPARC64
         help
-          Enable power management and CPU standby features on supported
-          SPARC platforms.
+          Say Y here is you want to support virtual devices via
+          Logical Domains.
 
 config PCI
         bool "Support for PCI and PS/2 keyboard/mouse"
         help
+          Find out whether your system includes a PCI bus. PCI is the name of
+          a bus system, i.e. the way the CPU talks to the other stuff inside
+          your box.  If you say Y here, the kernel will include drivers and
+          infrastructure code to support PCI bus devices.
+
           CONFIG_PCI is needed for all JavaStation's (including MrCoffee),
           CP-1200, JavaEngine-1, Corona, Red October, and Serengeti SGSC.
           All of these platforms are extremely obscure, so say N if unsure.
 
+config PCI_DOMAINS
+        def_bool PCI if SPARC64
+
 config PCI_SYSCALL
         def_bool PCI
 
 source "drivers/pci/Kconfig"
 
+source "drivers/pcmcia/Kconfig"
+
 config SUN_OPENPROMFS
         tristate "Openprom tree appears in /proc/openprom"
         help
@@ -239,17 +481,33 @@ config SUN_OPENPROMFS
           Only choose N if you know in advance that you will not need to modify
           OpenPROM settings on the running system.
 
-config SPARC_LED
-        tristate "Sun4m LED driver"
-        help
-          This driver toggles the front-panel LED on sun4m systems
-          in a user-specifiable manner.  Its state can be probed
-          by reading /proc/led and its blinking mode can be changed
-          via writes to /proc/led
+# Makefile helpers
+config SPARC32_PCI
+        bool
+        default y
+        depends on SPARC32 && PCI
+
+config SPARC64_PCI
+        bool
+        default y
+        depends on SPARC64 && PCI
+
+endmenu
+
+menu "Executable file formats"
 
 source "fs/Kconfig.binfmt"
 
-source "mm/Kconfig"
+config COMPAT
+        bool
+        depends on SPARC64
+        default y
+        select COMPAT_BINFMT_ELF
+
+config SYSVIPC_COMPAT
+        bool
+        depends on COMPAT && SYSVIPC
+        default y
 
 endmenu
 
@@ -259,40 +517,6 @@ source "drivers/Kconfig"
 
 source "drivers/sbus/char/Kconfig"
 
-# This one must be before the filesystem configs. -DaveM
-
-menu "Unix98 PTY support"
-
-config UNIX98_PTYS
-        bool "Unix98 PTY support"
-        ---help---
-          A pseudo terminal (PTY) is a software device consisting of two
-          halves: a master and a slave. The slave device behaves identical to
-          a physical terminal; the master device is used by a process to
-          read data from and write data to the slave, thereby emulating a
-          terminal. Typical programs for the master side are telnet servers
-          and xterms.
-
-          Linux has traditionally used the BSD-like names /dev/ptyxx for
-          masters and /dev/ttyxx for slaves of pseudo terminals. This scheme
-          has a number of problems. The GNU C library glibc 2.1 and later,
-          however, supports the Unix98 naming standard: in order to acquire a
-          pseudo terminal, a process opens /dev/ptmx; the number of the pseudo
-          terminal is then made available to the process and the pseudo
-          terminal slave can be accessed as /dev/pts/<number>. What was
-          traditionally /dev/ttyp2 will then be /dev/pts/2, for example.
-
-          The entries in /dev/pts/ are created on the fly by a virtual
-          file system; therefore, if you say Y here you should say Y to
-          "/dev/pts file system for Unix98 PTYs" as well.
-
-          If you want to say Y here, you need to have the C library glibc 2.1
-          or later (equal to libc-6.1, check with "ls -l /lib/libc.so.*").
-          Read the instructions in <file:Documentation/Changes> pertaining to
-          pseudo terminals. It's safe to say N.
-
-endmenu
-
 source "fs/Kconfig"
 
 source "arch/sparc/Kconfig.debug"
diff --git a/arch/sparc/Kconfig.debug b/arch/sparc/Kconfig.debug
index 87dd496f15eb..b8a15e271bfa 100644
--- a/arch/sparc/Kconfig.debug
+++ b/arch/sparc/Kconfig.debug
@@ -15,4 +15,30 @@ config DEBUG_STACK_USAGE
 
           This option will slow down process creation somewhat.
 
+config DEBUG_DCFLUSH
+        bool "D-cache flush debugging"
+        depends on SPARC64 && DEBUG_KERNEL
+
+config STACK_DEBUG
+        bool "Stack Overflow Detection Support"
+
+config DEBUG_PAGEALLOC
+        bool "Debug page memory allocations"
+        depends on SPARC64 && DEBUG_KERNEL && !HIBERNATION
+        help
+          Unmap pages from the kernel linear mapping after free_pages().
+          This results in a large slowdown, but helps to find certain types
+          of memory corruptions.
+
+config MCOUNT
+        bool
+        depends on SPARC64
+        depends on STACK_DEBUG || FUNCTION_TRACER
+        default y
+
+config FRAME_POINTER
+        bool
+        depends on MCOUNT
+        default y
+
 endmenu
diff --git a/arch/sparc/Makefile b/arch/sparc/Makefile
index 9592889a6fd0..2003ded054c2 100644
--- a/arch/sparc/Makefile
+++ b/arch/sparc/Makefile
@@ -2,18 +2,31 @@
 # sparc/Makefile
 #
 # Makefile for the architecture dependent flags and dependencies on the
-# Sparc.
+# Sparc and sparc64.
 #
-# Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
+# Copyright (C) 1994,1996,1998 David S. Miller (davem@caip.rutgers.edu)
+# Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
+
+# We are not yet configured - so test on arch
+ifeq ($(ARCH),sparc)
+        KBUILD_DEFCONFIG := sparc32_defconfig
+else
+        KBUILD_DEFCONFIG := sparc64_defconfig
+endif
+
+ifeq ($(CONFIG_SPARC32),y)
+#####
+# sparc32
 #
 
 #
 # Uncomment the first KBUILD_CFLAGS if you are doing kgdb source level
 # debugging of the kernel to get the proper debugging information.
 
-AS              := $(AS) -32
-LDFLAGS         := -m elf32_sparc
-CHECKFLAGS      += -D__sparc__
+AS             := $(AS) -32
+LDFLAGS        := -m elf32_sparc
+CHECKFLAGS     += -D__sparc__
+export BITS    := 32
 
 #KBUILD_CFLAGS += -g -pipe -fcall-used-g5 -fcall-used-g7
 KBUILD_CFLAGS += -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7
@@ -25,38 +38,60 @@ CPPFLAGS_vmlinux.lds += -m32
 #  Actual linking is done with "make image".
 LDFLAGS_vmlinux = -r
 
-head-y := arch/sparc/kernel/head.o arch/sparc/kernel/init_task.o
-HEAD_Y := $(head-y)
+# Default target
+all: zImage
+
+
+else
+#####
+# sparc64
+#
 
-core-y += arch/sparc/kernel/ arch/sparc/mm/ arch/sparc/math-emu/
-libs-y += arch/sparc/prom/ arch/sparc/lib/
+CHECKFLAGS      += -D__sparc__ -D__sparc_v9__ -D__arch64__ -m64
+
+# Undefine sparc when processing vmlinux.lds - it is used
+# And teach CPP we are doing 64 bit builds (for this case)
+CPPFLAGS_vmlinux.lds += -m64 -Usparc
+LDFLAGS              := -m elf64_sparc
+export BITS          := 64
+
+KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow   \
+                 -ffixed-g4 -ffixed-g5 -fcall-used-g7 -Wno-sign-compare \
+                 -Wa,--undeclared-regs
+KBUILD_CFLAGS += $(call cc-option,-mtune=ultrasparc3)
+KBUILD_AFLAGS += -m64 -mcpu=ultrasparc -Wa,--undeclared-regs
+
+ifeq ($(CONFIG_MCOUNT),y)
+  KBUILD_CFLAGS += -pg
+endif
+
+endif
+
+head-y                 := arch/sparc/kernel/head_$(BITS).o
+head-y                 += arch/sparc/kernel/init_task.o
+
+core-y                 += arch/sparc/kernel/
+core-y                 += arch/sparc/mm/ arch/sparc/math-emu/
+
+libs-y                 += arch/sparc/prom/
+libs-y                 += arch/sparc/lib/
 
 drivers-$(CONFIG_OPROFILE)      += arch/sparc/oprofile/
 
 # Export what is needed by arch/sparc/boot/Makefile
-# Renaming is done to avoid confusing pattern matching rules in 2.5.45 (multy-)
-INIT_Y          := $(patsubst %/, %/built-in.o, $(init-y))
-CORE_Y          := $(core-y)
-CORE_Y          += kernel/ mm/ fs/ ipc/ security/ crypto/ block/
-CORE_Y          := $(patsubst %/, %/built-in.o, $(CORE_Y))
-DRIVERS_Y       := $(patsubst %/, %/built-in.o, $(drivers-y))
-NET_Y           := $(patsubst %/, %/built-in.o, $(net-y))
-LIBS_Y1         := $(patsubst %/, %/lib.a, $(libs-y))
-LIBS_Y2         := $(patsubst %/, %/built-in.o, $(libs-y))
-LIBS_Y          := $(LIBS_Y1) $(LIBS_Y2)
+export VMLINUX_INIT VMLINUX_MAIN
+VMLINUX_INIT := $(head-y) $(init-y)
+VMLINUX_MAIN := $(core-y) kernel/ mm/ fs/ ipc/ security/ crypto/ block/
+VMLINUX_MAIN += $(patsubst %/, %/lib.a, $(libs-y)) $(libs-y)
+VMLINUX_MAIN += $(drivers-y) $(net-y)
 
 ifdef CONFIG_KALLSYMS
-kallsyms.o := .tmp_kallsyms2.o
+export kallsyms.o := .tmp_kallsyms2.o
 endif
 
-export INIT_Y CORE_Y DRIVERS_Y NET_Y LIBS_Y HEAD_Y kallsyms.o
-
-# Default target
-all: zImage
-
 boot := arch/sparc/boot
 
-image zImage tftpboot.img: vmlinux
+image zImage tftpboot.img vmlinux.aout: vmlinux
         $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
 
 archclean:
@@ -65,11 +100,17 @@ archclean:
 # This is the image used for packaging
 KBUILD_IMAGE := $(boot)/zImage
 
-CLEAN_FILES += arch/$(ARCH)/boot/System.map
-
 # Don't use tabs in echo arguments.
+ifeq ($(ARCH),sparc)
 define archhelp
   echo  '* image        - kernel image ($(boot)/image)'
   echo  '* zImage       - stripped kernel image ($(boot)/zImage)'
   echo  '  tftpboot.img - image prepared for tftp'
 endef
+else
+define archhelp
+  echo  '* vmlinux       - Standard sparc64 kernel'
+  echo  '  vmlinux.aout  - a.out kernel for sparc64'
+  echo  '  tftpboot.img - image prepared for tftp'
+endef
+endif
diff --git a/arch/sparc64/boot/.gitignore b/arch/sparc/boot/.gitignore
index 36356f9d498e..fc6f3986c76c 100644
--- a/arch/sparc64/boot/.gitignore
+++ b/arch/sparc/boot/.gitignore
@@ -1,4 +1,8 @@
+btfix.S
+btfixupprep
 image
+zImage
 tftpboot.img
 vmlinux.aout
 piggyback
+
diff --git a/arch/sparc/boot/Makefile b/arch/sparc/boot/Makefile
index 3e77a9f52248..96041a8d39e8 100644
--- a/arch/sparc/boot/Makefile
+++ b/arch/sparc/boot/Makefile
@@ -6,13 +6,16 @@
 ROOT_IMG        := /usr/src/root.img
 ELFTOAOUT       := elftoaout
 
-hostprogs-y     := piggyback btfixupprep
-targets         := tftpboot.img btfix.o btfix.S image
+hostprogs-y     := piggyback_32 piggyback_64 btfixupprep
+targets         := tftpboot.img btfix.o btfix.S image zImage vmlinux.aout
+clean-files     := System.map
 
 quiet_cmd_elftoaout     = ELFTOAOUT $@
       cmd_elftoaout     = $(ELFTOAOUT) $(obj)/image -o $@
+
+ifeq ($(CONFIG_SPARC32),y)
 quiet_cmd_piggy         = PIGGY   $@
-      cmd_piggy         = $(obj)/piggyback $@ $(obj)/System.map $(ROOT_IMG)
+      cmd_piggy         = $(obj)/piggyback_32 $@ $(obj)/System.map $(ROOT_IMG)
 quiet_cmd_btfix         = BTFIX   $@
       cmd_btfix         = $(OBJDUMP) -x vmlinux | $(obj)/btfixupprep > $@
 quiet_cmd_sysmap        = SYSMAP  $(obj)/System.map
@@ -37,8 +40,8 @@ define rule_image
         echo 'cmd_$@ := $(cmd_image)' > $(@D)/.$(@F).cmd
 endef
 
-BTOBJS := $(HEAD_Y) $(INIT_Y)
-BTLIBS := $(CORE_Y) $(LIBS_Y) $(DRIVERS_Y) $(NET_Y)
+BTOBJS := $(patsubst %/, %/built-in.o, $(VMLINUX_INIT))
+BTLIBS := $(patsubst %/, %/built-in.o, $(VMLINUX_MAIN))
 LDFLAGS_image := -T arch/sparc/kernel/vmlinux.lds $(BTOBJS) \
                   --start-group $(BTLIBS) --end-group \
                   $(kallsyms.o) $(obj)/btfix.o
@@ -61,3 +64,28 @@ $(obj)/tftpboot.img: $(obj)/piggyback $(obj)/System.map $(obj)/image FORCE
 
 $(obj)/btfix.S: $(obj)/btfixupprep vmlinux FORCE
         $(call if_changed,btfix)
+
+endif
+
+ifeq ($(CONFIG_SPARC64),y)
+quiet_cmd_piggy     = PIGGY   $@
+      cmd_piggy     = $(obj)/piggyback_64 $@ System.map $(ROOT_IMG)
+quiet_cmd_strip     = STRIP   $@
+      cmd_strip     = $(STRIP) -R .comment -R .note -K sun4u_init -K _end -K _start vmlinux -o $@
+
+
+# Actual linking
+$(obj)/image: vmlinux FORCE
+        $(call if_changed,strip)
+        @echo '  kernel: $@ is ready'
+
+$(obj)/tftpboot.img: vmlinux $(obj)/piggyback_64 System.map $(ROOT_IMG) FORCE
+        $(call if_changed,elftoaout)
+        $(call if_changed,piggy)
+        @echo '  kernel: $@ is ready'
+
+$(obj)/vmlinux.aout: vmlinux FORCE
+        $(call if_changed,elftoaout)
+        @echo '  kernel: $@ is ready'
+endif
+
diff --git a/arch/sparc/boot/piggyback.c b/arch/sparc/boot/piggyback_32.c
index c9f500c1a8b2..c9f500c1a8b2 100644
--- a/arch/sparc/boot/piggyback.c
+++ b/arch/sparc/boot/piggyback_32.c
diff --git a/arch/sparc64/boot/piggyback.c b/arch/sparc/boot/piggyback_64.c
index de364bfed0bb..de364bfed0bb 100644
--- a/arch/sparc64/boot/piggyback.c
+++ b/arch/sparc/boot/piggyback_64.c
diff --git a/arch/sparc/defconfig b/arch/sparc/configs/sparc32_defconfig
index 2e3a149ea0e7..2e3a149ea0e7 100644
--- a/arch/sparc/defconfig
+++ b/arch/sparc/configs/sparc32_defconfig
diff --git a/arch/sparc64/defconfig b/arch/sparc/configs/sparc64_defconfig
index 05d19a3e590f..cde19ae78f5a 100644
--- a/arch/sparc64/defconfig
+++ b/arch/sparc/configs/sparc64_defconfig
@@ -1,27 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc4
-# Mon Nov 10 12:35:09 2008
+# Linux kernel version: 2.6.28
+# Fri Jan  2 18:14:26 2009
 #
 CONFIG_SPARC=y
 CONFIG_SPARC64=y
+CONFIG_ARCH_DEFCONFIG="arch/sparc/configs/sparc64_defconfig"
+CONFIG_BITS=64
+CONFIG_64BIT=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_64BIT=y
-CONFIG_MMU=y
 CONFIG_IOMMU_HELPER=y
 CONFIG_QUICKLIST=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 CONFIG_AUDIT_ARCH=y
 CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_MMU=y
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_OF=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
@@ -86,6 +86,7 @@ CONFIG_SLUB_DEBUG=y
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
 # CONFIG_MARKERS is not set
 CONFIG_OPROFILE=m
 CONFIG_HAVE_OPROFILE=y
@@ -127,34 +128,40 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
 CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_FREEZER is not set
 
 #
 # Processor type and features
 #
-CONFIG_SPARC64_PAGE_SIZE_8KB=y
-# CONFIG_SPARC64_PAGE_SIZE_64KB is not set
-CONFIG_SECCOMP=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=64
 CONFIG_HZ_100=y
 # CONFIG_HZ_250 is not set
 # CONFIG_HZ_300 is not set
 # CONFIG_HZ_1000 is not set
 CONFIG_HZ=100
 CONFIG_SCHED_HRTICK=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_SPARC64_SMP=y
+CONFIG_SPARC64_PAGE_SIZE_8KB=y
+# CONFIG_SPARC64_PAGE_SIZE_64KB is not set
+CONFIG_SECCOMP=y
 CONFIG_HOTPLUG_CPU=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=64
 # CONFIG_CPU_FREQ is not set
 CONFIG_US3_MC=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_HUGETLB_PAGE_SIZE_4MB=y
 # CONFIG_HUGETLB_PAGE_SIZE_512K is not set
 # CONFIG_HUGETLB_PAGE_SIZE_64K is not set
@@ -183,10 +190,18 @@ CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=1
 CONFIG_UNEVICTABLE_LRU=y
+CONFIG_SCHED_SMT=y
+CONFIG_SCHED_MC=y
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Bus options (PCI etc.)
+#
 CONFIG_SBUS=y
 CONFIG_SBUSCHAR=y
-CONFIG_SUN_AUXIO=y
-CONFIG_SUN_IO=y
 CONFIG_SUN_LDOMS=y
 CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
@@ -195,7 +210,9 @@ CONFIG_ARCH_SUPPORTS_MSI=y
 CONFIG_PCI_MSI=y
 # CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
+# CONFIG_PCCARD is not set
 CONFIG_SUN_OPENPROMFS=m
+CONFIG_SPARC64_PCI=y
 
 #
 # Executable file formats
@@ -207,17 +224,13 @@ CONFIG_COMPAT_BINFMT_ELF=y
 CONFIG_BINFMT_MISC=m
 CONFIG_COMPAT=y
 CONFIG_SYSVIPC_COMPAT=y
-CONFIG_SCHED_SMT=y
-CONFIG_SCHED_MC=y
-# CONFIG_PREEMPT_NONE is not set
-CONFIG_PREEMPT_VOLUNTARY=y
-# CONFIG_PREEMPT is not set
-# CONFIG_CMDLINE_BOOL is not set
 CONFIG_NET=y
 
 #
 # Networking options
 #
+# CONFIG_NET_NS is not set
+CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
@@ -314,6 +327,7 @@ CONFIG_VLAN_8021Q=m
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -330,8 +344,8 @@ CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
 CONFIG_WIRELESS_OLD_REGULATORY=y
 # CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
 # CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -378,8 +392,10 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_EEPROM_93CX6 is not set
 # CONFIG_SGI_IOC4 is not set
 # CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
+# CONFIG_C2PORT is not set
 CONFIG_HAVE_IDE=y
 CONFIG_IDE=y
 
@@ -387,6 +403,7 @@ CONFIG_IDE=y
 # Please see Documentation/ide/ide.txt for help/info on IDE drives
 #
 CONFIG_IDE_TIMINGS=y
+CONFIG_IDE_ATAPI=y
 # CONFIG_BLK_DEV_IDE_SATA is not set
 CONFIG_IDE_GD=y
 CONFIG_IDE_GD_ATA=y
@@ -394,7 +411,6 @@ CONFIG_IDE_GD_ATA=y
 CONFIG_BLK_DEV_IDECD=y
 CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
 # CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
 # CONFIG_IDE_TASK_IOCTL is not set
 CONFIG_IDE_PROC_FS=y
 
@@ -477,6 +493,7 @@ CONFIG_SCSI_FC_ATTRS=y
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
 # CONFIG_SCSI_3W_9XXX is not set
 # CONFIG_SCSI_ACARD is not set
@@ -490,6 +507,8 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_MEGARAID_LEGACY is not set
 # CONFIG_MEGARAID_SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
 # CONFIG_SCSI_IPS is not set
@@ -564,6 +583,9 @@ CONFIG_PHYLIB=m
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=m
@@ -590,7 +612,6 @@ CONFIG_NET_PCI=y
 # CONFIG_ADAPTEC_STARFIRE is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
-# CONFIG_EEPRO100 is not set
 # CONFIG_E100 is not set
 # CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
@@ -600,6 +621,7 @@ CONFIG_NET_PCI=y
 # CONFIG_R6040 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
@@ -629,6 +651,7 @@ CONFIG_BNX2=m
 # CONFIG_JME is not set
 CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
@@ -778,6 +801,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=m
@@ -870,6 +894,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
 # CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ATXP1 is not set
@@ -919,11 +944,11 @@ CONFIG_HWMON=y
 # CONFIG_THERMAL is not set
 # CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -1071,6 +1096,7 @@ CONFIG_SND_MIXER_OSS=m
 CONFIG_SND_PCM_OSS=m
 CONFIG_SND_PCM_OSS_PLUGINS=y
 CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_HRTIMER is not set
 # CONFIG_SND_DYNAMIC_MINORS is not set
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
@@ -1242,11 +1268,11 @@ CONFIG_USB_UHCI_HCD=m
 # CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
 #
 
 #
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
 #
 CONFIG_USB_STORAGE=m
 # CONFIG_USB_STORAGE_DEBUG is not set
@@ -1337,6 +1363,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_M41T80 is not set
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
 
 #
 # SPI RTC drivers
@@ -1365,7 +1392,6 @@ CONFIG_RTC_DRV_STARFIRE=y
 # CONFIG_DMADEVICES is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
-CONFIG_STAGING_EXCLUDE_BUILD=y
 
 #
 # Misc Linux/SPARC drivers
@@ -1544,6 +1570,7 @@ CONFIG_SCHEDSTATS=y
 # CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
@@ -1552,6 +1579,7 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
@@ -1560,8 +1588,12 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
 
 #
 # Tracers
@@ -1571,7 +1603,9 @@ CONFIG_HAVE_FUNCTION_TRACER=y
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
@@ -1600,11 +1634,16 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_GF128MUL=m
 CONFIG_CRYPTO_NULL=m
 # CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild
index 2d2769d766ec..deeb0fba8029 100644
--- a/arch/sparc/include/asm/Kbuild
+++ b/arch/sparc/include/asm/Kbuild
@@ -1,23 +1,6 @@
 # User exported sparc header files
 include include/asm-generic/Kbuild.asm
 
-header-y += ipcbuf_32.h
-header-y += ipcbuf_64.h
-header-y += posix_types_32.h
-header-y += posix_types_64.h
-header-y += ptrace_32.h
-header-y += ptrace_64.h
-header-y += sigcontext_32.h
-header-y += sigcontext_64.h
-header-y += siginfo_32.h
-header-y += siginfo_64.h
-header-y += signal_32.h
-header-y += signal_64.h
-header-y += stat_32.h
-header-y += stat_64.h
-header-y += unistd_32.h
-header-y += unistd_64.h
-
 header-y += apc.h
 header-y += asi.h
 header-y += display7seg.h
@@ -25,16 +8,11 @@ header-y += envctrl.h
 header-y += fbio.h
 header-y += jsflash.h
 header-y += openprom.h
-header-y += openprom_32.h
-header-y += openprom_64.h
 header-y += openpromio.h
 header-y += perfctr.h
 header-y += psrcompat.h
 header-y += psr.h
 header-y += pstate.h
-header-y += reg.h
-header-y += reg_32.h
-header-y += reg_64.h
 header-y += traps.h
 header-y += uctx.h
 header-y += utrap.h
diff --git a/arch/sparc/include/asm/asm.h b/arch/sparc/include/asm/asm.h
new file mode 100644
index 000000000000..e8e1d94b4cc9
--- /dev/null
+++ b/arch/sparc/include/asm/asm.h
@@ -0,0 +1,40 @@
+#ifndef _SPARC_ASM_H
+#define _SPARC_ASM_H
+
+/* Macros to assist the sharing of assembler code between 32-bit and
+ * 64-bit sparc.
+ */
+
+#ifdef CONFIG_SPARC64
+#define BRANCH32(TYPE, PREDICT, DEST) \
+        TYPE,PREDICT    %icc, DEST
+#define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \
+        TYPE,a,PREDICT  %icc, DEST
+#define BRANCH_REG_ZERO(PREDICT, REG, DEST) \
+        brz,PREDICT     REG, DEST
+#define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \
+        brz,a,PREDICT   REG, DEST
+#define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \
+        brnz,PREDICT    REG, DEST
+#define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \
+        brnz,a,PREDICT  REG, DEST
+#else
+#define BRANCH32(TYPE, PREDICT, DEST) \
+        TYPE            DEST
+#define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \
+        TYPE,a          DEST
+#define BRANCH_REG_ZERO(PREDICT, REG, DEST) \
+        cmp             REG, 0; \
+        be              DEST
+#define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \
+        cmp             REG, 0; \
+        be,a            DEST
+#define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \
+        cmp             REG, 0; \
+        bne             DEST
+#define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \
+        cmp             REG, 0; \
+        bne,a           DEST
+#endif
+
+#endif /* _SPARC_ASM_H */
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index 5c944b5a8040..ce465975a6a5 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -13,8 +13,6 @@
 
 #include <linux/types.h>
 
-typedef struct { volatile int counter; } atomic_t;
-
 #ifdef __KERNEL__
 
 #define ATOMIC_INIT(i)  { (i) }
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index 2c71ec4a3b18..a0a706492696 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -10,9 +10,6 @@
 #include <linux/types.h>
 #include <asm/system.h>
 
-typedef struct { volatile int counter; } atomic_t;
-typedef struct { volatile __s64 counter; } atomic64_t;
-
 #define ATOMIC_INIT(i)          { (i) }
 #define ATOMIC64_INIT(i)        { (i) }
 
@@ -112,17 +109,10 @@ static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
 
 /* Atomic operations are already serializing */
-#ifdef CONFIG_SMP
-#define smp_mb__before_atomic_dec()     membar_storeload_loadload();
-#define smp_mb__after_atomic_dec()      membar_storeload_storestore();
-#define smp_mb__before_atomic_inc()     membar_storeload_loadload();
-#define smp_mb__after_atomic_inc()      membar_storeload_storestore();
-#else
 #define smp_mb__before_atomic_dec()     barrier()
 #define smp_mb__after_atomic_dec()      barrier()
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
-#endif
 
 #include <asm-generic/atomic.h>
 #endif /* !(__ARCH_SPARC64_ATOMIC__) */
diff --git a/arch/sparc/include/asm/bitops_64.h b/arch/sparc/include/asm/bitops_64.h
index bb87b8080220..e72ac9cdfb98 100644
--- a/arch/sparc/include/asm/bitops_64.h
+++ b/arch/sparc/include/asm/bitops_64.h
@@ -23,13 +23,8 @@ extern void change_bit(unsigned long nr, volatile unsigned long *addr);
 
 #include <asm-generic/bitops/non-atomic.h>
 
-#ifdef CONFIG_SMP
-#define smp_mb__before_clear_bit()      membar_storeload_loadload()
-#define smp_mb__after_clear_bit()       membar_storeload_storestore()
-#else
 #define smp_mb__before_clear_bit()      barrier()
 #define smp_mb__after_clear_bit()       barrier()
-#endif
 
 #include <asm-generic/bitops/ffz.h>
 #include <asm-generic/bitops/__ffs.h>
diff --git a/arch/sparc/include/asm/byteorder.h b/arch/sparc/include/asm/byteorder.h
index 5a70f137f1f7..738414b26558 100644
--- a/arch/sparc/include/asm/byteorder.h
+++ b/arch/sparc/include/asm/byteorder.h
@@ -1,16 +1,12 @@
 #ifndef _SPARC_BYTEORDER_H
 #define _SPARC_BYTEORDER_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <asm/asi.h>
 
 #define __BIG_ENDIAN
 
-#ifdef CONFIG_SPARC32
-#define __SWAB_64_THRU_32__
-#endif
-
-#ifdef CONFIG_SPARC64
+#if defined(__sparc__) && defined(__arch64__)
 static inline __u16 __arch_swab16p(const __u16 *addr)
 {
         __u16 ret;
@@ -44,7 +40,9 @@ static inline __u64 __arch_swab64p(const __u64 *addr)
 }
 #define __arch_swab64p __arch_swab64p
 
-#endif /* CONFIG_SPARC64 */
+#else
+#define __SWAB_64_THRU_32__
+#endif /* defined(__sparc__) && defined(__arch64__) */
 
 #include <linux/byteorder.h>
 
diff --git a/arch/sparc/include/asm/device.h b/arch/sparc/include/asm/device.h
index 19790eb99cc6..3702e087df2c 100644
--- a/arch/sparc/include/asm/device.h
+++ b/arch/sparc/include/asm/device.h
@@ -20,4 +20,16 @@ struct dev_archdata {
         int                     numa_node;
 };
 
+static inline void dev_archdata_set_node(struct dev_archdata *ad,
+                                         struct device_node *np)
+{
+        ad->prom_node = np;
+}
+
+static inline struct device_node *
+dev_archdata_get_node(const struct dev_archdata *ad)
+{
+        return ad->prom_node;
+}
+
 #endif /* _ASM_SPARC_DEVICE_H */
diff --git a/arch/sparc/include/asm/hypervisor.h b/arch/sparc/include/asm/hypervisor.h
index 109ae24ba242..bafe5a631b6d 100644
--- a/arch/sparc/include/asm/hypervisor.h
+++ b/arch/sparc/include/asm/hypervisor.h
@@ -2713,6 +2713,30 @@ extern unsigned long sun4v_ldc_revoke(unsigned long channel,
  */
 #define HV_FAST_SET_PERFREG             0x101
 
+#define HV_N2_PERF_SPARC_CTL            0x0
+#define HV_N2_PERF_DRAM_CTL0            0x1
+#define HV_N2_PERF_DRAM_CNT0            0x2
+#define HV_N2_PERF_DRAM_CTL1            0x3
+#define HV_N2_PERF_DRAM_CNT1            0x4
+#define HV_N2_PERF_DRAM_CTL2            0x5
+#define HV_N2_PERF_DRAM_CNT2            0x6
+#define HV_N2_PERF_DRAM_CTL3            0x7
+#define HV_N2_PERF_DRAM_CNT3            0x8
+
+#define HV_FAST_N2_GET_PERFREG          0x104
+#define HV_FAST_N2_SET_PERFREG          0x105
+
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_niagara_getperf(unsigned long reg,
+                                           unsigned long *val);
+extern unsigned long sun4v_niagara_setperf(unsigned long reg,
+                                           unsigned long val);
+extern unsigned long sun4v_niagara2_getperf(unsigned long reg,
+                                            unsigned long *val);
+extern unsigned long sun4v_niagara2_setperf(unsigned long reg,
+                                            unsigned long val);
+#endif
+
 /* MMU statistics services.
  *
  * The hypervisor maintains MMU statistics and privileged code provides
diff --git a/arch/sparc/include/asm/ipcbuf.h b/arch/sparc/include/asm/ipcbuf.h
index 17d6ef7b23a4..66013b4fe10d 100644
--- a/arch/sparc/include/asm/ipcbuf.h
+++ b/arch/sparc/include/asm/ipcbuf.h
@@ -1,8 +1,32 @@
-#ifndef ___ASM_SPARC_IPCBUF_H
-#define ___ASM_SPARC_IPCBUF_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/ipcbuf_64.h>
-#else
-#include <asm/ipcbuf_32.h>
-#endif
+#ifndef __SPARC_IPCBUF_H
+#define __SPARC_IPCBUF_H
+
+/*
+ * The ipc64_perm structure for sparc/sparc64 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 32-bit seq
+ * - on sparc for 32 bit mode (it is 32 bit on sparc64)
+ * - 2 miscellaneous 64-bit values
+ */
+
+struct ipc64_perm
+{
+        __kernel_key_t  key;
+        __kernel_uid_t  uid;
+        __kernel_gid_t  gid;
+        __kernel_uid_t  cuid;
+        __kernel_gid_t  cgid;
+#ifndef __arch64__
+        unsigned short  __pad0;
 #endif
+        __kernel_mode_t mode;
+        unsigned short  __pad1;
+        unsigned short  seq;
+        unsigned long long __unused1;
+        unsigned long long __unused2;
+};
+
+#endif /* __SPARC_IPCBUF_H */
diff --git a/arch/sparc/include/asm/ipcbuf_32.h b/arch/sparc/include/asm/ipcbuf_32.h
deleted file mode 100644
index 6387209518f2..000000000000
--- a/arch/sparc/include/asm/ipcbuf_32.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef _SPARC_IPCBUF_H
-#define _SPARC_IPCBUF_H
-
-/*
- * The ipc64_perm structure for sparc architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode
- * - 32-bit seq
- * - 2 miscellaneous 64-bit values (so that this structure matches
- *                                  sparc64 ipc64_perm)
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        unsigned short          __pad1;
-        __kernel_mode_t         mode;
-        unsigned short          __pad2;
-        unsigned short          seq;
-        unsigned long long      __unused1;
-        unsigned long long      __unused2;
-};
-
-#endif /* _SPARC_IPCBUF_H */
diff --git a/arch/sparc/include/asm/ipcbuf_64.h b/arch/sparc/include/asm/ipcbuf_64.h
deleted file mode 100644
index a44b855b98db..000000000000
--- a/arch/sparc/include/asm/ipcbuf_64.h
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef _SPARC64_IPCBUF_H
-#define _SPARC64_IPCBUF_H
-
-/*
- * The ipc64_perm structure for sparc64 architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit seq
- * - 2 miscellaneous 64-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t  key;
-        __kernel_uid_t  uid;
-        __kernel_gid_t  gid;
-        __kernel_uid_t  cuid;
-        __kernel_gid_t  cgid;
-        __kernel_mode_t mode;
-        unsigned short  __pad1;
-        unsigned short  seq;
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-};
-
-#endif /* _SPARC64_IPCBUF_H */
diff --git a/arch/sparc/include/asm/irq_32.h b/arch/sparc/include/asm/irq_32.h
index fe205cc444b8..ea43057d4763 100644
--- a/arch/sparc/include/asm/irq_32.h
+++ b/arch/sparc/include/asm/irq_32.h
@@ -12,4 +12,5 @@
 
 #define irq_canonicalize(irq)   (irq)
 
+extern void __init init_IRQ(void);
 #endif
diff --git a/arch/sparc/include/asm/irq_64.h b/arch/sparc/include/asm/irq_64.h
index 71673eca3660..d47d4a1955a9 100644
--- a/arch/sparc/include/asm/irq_64.h
+++ b/arch/sparc/include/asm/irq_64.h
@@ -66,6 +66,9 @@ extern void virt_irq_free(unsigned int virt_irq);
 extern void __init init_IRQ(void);
 extern void fixup_irqs(void);
 
+extern int register_perfctr_intr(void (*handler)(struct pt_regs *));
+extern void release_perfctr_intr(void (*handler)(struct pt_regs *));
+
 static inline void set_softint(unsigned long bits)
 {
         __asm__ __volatile__("wr        %0, 0x0, %%set_softint"
diff --git a/arch/sparc/include/asm/irqflags_64.h b/arch/sparc/include/asm/irqflags_64.h
index bb42e59162aa..8b49bf920df3 100644
--- a/arch/sparc/include/asm/irqflags_64.h
+++ b/arch/sparc/include/asm/irqflags_64.h
@@ -10,6 +10,8 @@
 #ifndef _ASM_IRQFLAGS_H
 #define _ASM_IRQFLAGS_H
 
+#include <asm/pil.h>
+
 #ifndef __ASSEMBLY__
 
 static inline unsigned long __raw_local_save_flags(void)
@@ -40,9 +42,9 @@ static inline void raw_local_irq_restore(unsigned long flags)
 static inline void raw_local_irq_disable(void)
 {
         __asm__ __volatile__(
-                "wrpr   15, %%pil"
+                "wrpr   %0, %%pil"
                 : /* no outputs */
-                : /* no inputs */
+                : "i" (PIL_NORMAL_MAX)
                 : "memory"
         );
 }
diff --git a/arch/sparc/include/asm/jsflash.h b/arch/sparc/include/asm/jsflash.h
index 3457f29bd73b..0717d9e39d2d 100644
--- a/arch/sparc/include/asm/jsflash.h
+++ b/arch/sparc/include/asm/jsflash.h
@@ -8,7 +8,7 @@
 #define _SPARC_JSFLASH_H
 
 #ifndef _SPARC_TYPES_H
-#include <asm/types.h>
+#include <linux/types.h>
 #endif
 
 /*
diff --git a/arch/sparc/include/asm/module.h b/arch/sparc/include/asm/module.h
index e82cf9a3e60e..ff8e02d80334 100644
--- a/arch/sparc/include/asm/module.h
+++ b/arch/sparc/include/asm/module.h
@@ -1,8 +1,24 @@
-#ifndef ___ASM_SPARC_MODULE_H
-#define ___ASM_SPARC_MODULE_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/module_64.h>
-#else
-#include <asm/module_32.h>
-#endif
-#endif
+#ifndef __SPARC_MODULE_H
+#define __SPARC_MODULE_H
+struct mod_arch_specific { };
+
+/*
+ * Use some preprocessor magic to define the correct symbol
+ * for sparc32 and sparc64.
+ * Elf_Addr becomes Elf32_Addr for sparc32 and Elf64_Addr for sparc64
+ */
+#define ___ELF(a, b, c) a##b##c
+#define __ELF(a, b, c)  ___ELF(a, b, c)
+#define  _Elf(t)        __ELF(Elf, CONFIG_BITS, t)
+#define  _ELF(t)        __ELF(ELF, CONFIG_BITS, t)
+
+#define Elf_Shdr     _Elf(_Shdr)
+#define Elf_Sym      _Elf(_Sym)
+#define Elf_Ehdr     _Elf(_Ehdr)
+#define Elf_Rela     _Elf(_Rela)
+#define Elf_Addr     _Elf(_Addr)
+
+#define ELF_R_SYM    _ELF(_R_SYM)
+#define ELF_R_TYPE   _ELF(_R_TYPE)
+
+#endif /* __SPARC_MODULE_H */
diff --git a/arch/sparc/include/asm/module_32.h b/arch/sparc/include/asm/module_32.h
deleted file mode 100644
index cbd9e67b0c0b..000000000000
--- a/arch/sparc/include/asm/module_32.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _ASM_SPARC_MODULE_H
-#define _ASM_SPARC_MODULE_H
-struct mod_arch_specific { };
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
-#endif /* _ASM_SPARC_MODULE_H */
diff --git a/arch/sparc/include/asm/module_64.h b/arch/sparc/include/asm/module_64.h
deleted file mode 100644
index 3d77ba465783..000000000000
--- a/arch/sparc/include/asm/module_64.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _ASM_SPARC64_MODULE_H
-#define _ASM_SPARC64_MODULE_H
-struct mod_arch_specific { };
-#define Elf_Shdr Elf64_Shdr
-#define Elf_Sym Elf64_Sym
-#define Elf_Ehdr Elf64_Ehdr
-#endif /* _ASM_SPARC64_MODULE_H */
diff --git a/arch/sparc/include/asm/openprom.h b/arch/sparc/include/asm/openprom.h
index aaeae905ed3f..963e1a45c35f 100644
--- a/arch/sparc/include/asm/openprom.h
+++ b/arch/sparc/include/asm/openprom.h
@@ -1,8 +1,277 @@
-#ifndef ___ASM_SPARC_OPENPROM_H
-#define ___ASM_SPARC_OPENPROM_H
+#ifndef __SPARC_OPENPROM_H
+#define __SPARC_OPENPROM_H
+
+/* openprom.h:  Prom structures and defines for access to the OPENBOOT
+ *              prom routines and data areas.
+ *
+ * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+/* Empirical constants... */
+#define LINUX_OPPROM_MAGIC      0x10010407
+
+#ifndef __ASSEMBLY__
+/* V0 prom device operations. */
+struct linux_dev_v0_funcs {
+        int (*v0_devopen)(char *device_str);
+        int (*v0_devclose)(int dev_desc);
+        int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
+        int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
+        int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf);
+        int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf);
+        int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
+        int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
+        int (*v0_seekdev)(int dev_desc, long logical_offst, int from);
+};
+
+/* V2 and later prom device operations. */
+struct linux_dev_v2_funcs {
+        int (*v2_inst2pkg)(int d);      /* Convert ihandle to phandle */
+        char * (*v2_dumb_mem_alloc)(char *va, unsigned sz);
+        void (*v2_dumb_mem_free)(char *va, unsigned sz);
+
+        /* To map devices into virtual I/O space. */
+        char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz);
+        void (*v2_dumb_munmap)(char *virta, unsigned size);
+
+        int (*v2_dev_open)(char *devpath);
+        void (*v2_dev_close)(int d);
+        int (*v2_dev_read)(int d, char *buf, int nbytes);
+        int (*v2_dev_write)(int d, char *buf, int nbytes);
+        int (*v2_dev_seek)(int d, int hi, int lo);
+
+        /* Never issued (multistage load support) */
+        void (*v2_wheee2)(void);
+        void (*v2_wheee3)(void);
+};
+
+struct linux_mlist_v0 {
+        struct linux_mlist_v0 *theres_more;
+        unsigned int start_adr;
+        unsigned num_bytes;
+};
+
+struct linux_mem_v0 {
+        struct linux_mlist_v0 **v0_totphys;
+        struct linux_mlist_v0 **v0_prommap;
+        struct linux_mlist_v0 **v0_available; /* What we can use */
+};
+
+/* Arguments sent to the kernel from the boot prompt. */
+struct linux_arguments_v0 {
+        char *argv[8];
+        char args[100];
+        char boot_dev[2];
+        int boot_dev_ctrl;
+        int boot_dev_unit;
+        int dev_partition;
+        char *kernel_file_name;
+        void *aieee1;           /* XXX */
+};
+
+/* V2 and up boot things. */
+struct linux_bootargs_v2 {
+        char **bootpath;
+        char **bootargs;
+        int *fd_stdin;
+        int *fd_stdout;
+};
+
+/* The top level PROM vector. */
+struct linux_romvec {
+        /* Version numbers. */
+        unsigned int pv_magic_cookie;
+        unsigned int pv_romvers;
+        unsigned int pv_plugin_revision;
+        unsigned int pv_printrev;
+
+        /* Version 0 memory descriptors. */
+        struct linux_mem_v0 pv_v0mem;
+
+        /* Node operations. */
+        struct linux_nodeops *pv_nodeops;
+
+        char **pv_bootstr;
+        struct linux_dev_v0_funcs pv_v0devops;
+
+        char *pv_stdin;
+        char *pv_stdout;
+#define PROMDEV_KBD     0               /* input from keyboard */
+#define PROMDEV_SCREEN  0               /* output to screen */
+#define PROMDEV_TTYA    1               /* in/out to ttya */
+#define PROMDEV_TTYB    2               /* in/out to ttyb */
+
+        /* Blocking getchar/putchar.  NOT REENTRANT! (grr) */
+        int (*pv_getchar)(void);
+        void (*pv_putchar)(int ch);
+
+        /* Non-blocking variants. */
+        int (*pv_nbgetchar)(void);
+        int (*pv_nbputchar)(int ch);
+
+        void (*pv_putstr)(char *str, int len);
+
+        /* Miscellany. */
+        void (*pv_reboot)(char *bootstr);
+        void (*pv_printf)(__const__ char *fmt, ...);
+        void (*pv_abort)(void);
+        __volatile__ int *pv_ticks;
+        void (*pv_halt)(void);
+        void (**pv_synchook)(void);
+
+        /* Evaluate a forth string, not different proto for V0 and V2->up. */
+        union {
+                void (*v0_eval)(int len, char *str);
+                void (*v2_eval)(char *str);
+        } pv_fortheval;
+
+        struct linux_arguments_v0 **pv_v0bootargs;
+
+        /* Get ether address. */
+        unsigned int (*pv_enaddr)(int d, char *enaddr);
+
+        struct linux_bootargs_v2 pv_v2bootargs;
+        struct linux_dev_v2_funcs pv_v2devops;
+
+        int filler[15];
+
+        /* This one is sun4c/sun4 only. */
+        void (*pv_setctxt)(int ctxt, char *va, int pmeg);
+
+        /* Prom version 3 Multiprocessor routines. This stuff is crazy.
+         * No joke. Calling these when there is only one cpu probably
+         * crashes the machine, have to test this. :-)
+         */
+
+        /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context
+         * 'thiscontext' executing at address 'prog_counter'
+         */
+        int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr,
+                           int thiscontext, char *prog_counter);
+
+        /* v3_cpustop() will cause cpu 'whichcpu' to stop executing
+         * until a resume cpu call is made.
+         */
+        int (*v3_cpustop)(unsigned int whichcpu);
+
+        /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or
+         * resume cpu call is made.
+         */
+        int (*v3_cpuidle)(unsigned int whichcpu);
+
+        /* v3_cpuresume() will resume processor 'whichcpu' executing
+         * starting with whatever 'pc' and 'npc' were left at the
+         * last 'idle' or 'stop' call.
+         */
+        int (*v3_cpuresume)(unsigned int whichcpu);
+};
+
+/* Routines for traversing the prom device tree. */
+struct linux_nodeops {
+        int (*no_nextnode)(int node);
+        int (*no_child)(int node);
+        int (*no_proplen)(int node, const char *name);
+        int (*no_getprop)(int node, const char *name, char *val);
+        int (*no_setprop)(int node, const char *name, char *val, int len);
+        char * (*no_nextprop)(int node, char *name);
+};
+
+/* More fun PROM structures for device probing. */
 #if defined(__sparc__) && defined(__arch64__)
-#include <asm/openprom_64.h>
+#define PROMREG_MAX     24
+#define PROMVADDR_MAX   16
+#define PROMINTR_MAX    32
 #else
-#include <asm/openprom_32.h>
+#define PROMREG_MAX     16
+#define PROMVADDR_MAX   16
+#define PROMINTR_MAX    15
 #endif
+
+struct linux_prom_registers {
+        unsigned int which_io;  /* hi part of physical address */
+        unsigned int phys_addr; /* The physical address of this register */
+        unsigned int reg_size;  /* How many bytes does this register take up? */
+};
+
+struct linux_prom64_registers {
+        unsigned long phys_addr;
+        unsigned long reg_size;
+};
+
+struct linux_prom_irqs {
+        int pri;    /* IRQ priority */
+        int vector; /* This is foobar, what does it do? */
+};
+
+/* Element of the "ranges" vector */
+struct linux_prom_ranges {
+        unsigned int ot_child_space;
+        unsigned int ot_child_base;             /* Bus feels this */
+        unsigned int ot_parent_space;
+        unsigned int ot_parent_base;            /* CPU looks from here */
+        unsigned int or_size;
+};
+
+/*
+ * Ranges and reg properties are a bit different for PCI.
+ */
+#if defined(__sparc__) && defined(__arch64__)
+struct linux_prom_pci_registers {
+        unsigned int phys_hi;
+        unsigned int phys_mid;
+        unsigned int phys_lo;
+
+        unsigned int size_hi;
+        unsigned int size_lo;
+};
+#else
+struct linux_prom_pci_registers {
+        /*
+         * We don't know what information this field contain.
+         * We guess, PCI device function is in bits 15:8
+         * So, ...
+         */
+        unsigned int which_io;  /* Let it be which_io */
+
+        unsigned int phys_hi;
+        unsigned int phys_lo;
+
+        unsigned int size_hi;
+        unsigned int size_lo;
+};
+
 #endif
+
+struct linux_prom_pci_ranges {
+        unsigned int child_phys_hi;     /* Only certain bits are encoded here. */
+        unsigned int child_phys_mid;
+        unsigned int child_phys_lo;
+
+        unsigned int parent_phys_hi;
+        unsigned int parent_phys_lo;
+
+        unsigned int size_hi;
+        unsigned int size_lo;
+};
+
+struct linux_prom_pci_intmap {
+        unsigned int phys_hi;
+        unsigned int phys_mid;
+        unsigned int phys_lo;
+
+        unsigned int interrupt;
+
+        int          cnode;
+        unsigned int cinterrupt;
+};
+
+struct linux_prom_pci_intmask {
+        unsigned int phys_hi;
+        unsigned int phys_mid;
+        unsigned int phys_lo;
+        unsigned int interrupt;
+};
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__SPARC_OPENPROM_H) */
diff --git a/arch/sparc/include/asm/openprom_32.h b/arch/sparc/include/asm/openprom_32.h
deleted file mode 100644
index 8b1649f29ed9..000000000000
--- a/arch/sparc/include/asm/openprom_32.h
+++ /dev/null
@@ -1,255 +0,0 @@
-#ifndef __SPARC_OPENPROM_H
-#define __SPARC_OPENPROM_H
-
-/* openprom.h:  Prom structures and defines for access to the OPENBOOT
- *              prom routines and data areas.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-
-/* Empirical constants... */
-#define LINUX_OPPROM_MAGIC      0x10010407
-
-#ifndef __ASSEMBLY__
-/* V0 prom device operations. */
-struct linux_dev_v0_funcs {
-        int (*v0_devopen)(char *device_str);
-        int (*v0_devclose)(int dev_desc);
-        int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
-        int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
-        int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf);
-        int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf);
-        int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
-        int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
-        int (*v0_seekdev)(int dev_desc, long logical_offst, int from);
-};
-
-/* V2 and later prom device operations. */
-struct linux_dev_v2_funcs {
-        int (*v2_inst2pkg)(int d);      /* Convert ihandle to phandle */
-        char * (*v2_dumb_mem_alloc)(char *va, unsigned sz);
-        void (*v2_dumb_mem_free)(char *va, unsigned sz);
-
-        /* To map devices into virtual I/O space. */
-        char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz);
-        void (*v2_dumb_munmap)(char *virta, unsigned size);
-
-        int (*v2_dev_open)(char *devpath);
-        void (*v2_dev_close)(int d);
-        int (*v2_dev_read)(int d, char *buf, int nbytes);
-        int (*v2_dev_write)(int d, char *buf, int nbytes);
-        int (*v2_dev_seek)(int d, int hi, int lo);
-
-        /* Never issued (multistage load support) */
-        void (*v2_wheee2)(void);
-        void (*v2_wheee3)(void);
-};
-
-struct linux_mlist_v0 {
-        struct linux_mlist_v0 *theres_more;
-        char *start_adr;
-        unsigned num_bytes;
-};
-
-struct linux_mem_v0 {
-        struct linux_mlist_v0 **v0_totphys;
-        struct linux_mlist_v0 **v0_prommap;
-        struct linux_mlist_v0 **v0_available; /* What we can use */
-};
-
-/* Arguments sent to the kernel from the boot prompt. */
-struct linux_arguments_v0 {
-        char *argv[8];
-        char args[100];
-        char boot_dev[2];
-        int boot_dev_ctrl;
-        int boot_dev_unit;
-        int dev_partition;
-        char *kernel_file_name;
-        void *aieee1;           /* XXX */
-};
-
-/* V2 and up boot things. */
-struct linux_bootargs_v2 {
-        char **bootpath;
-        char **bootargs;
-        int *fd_stdin;
-        int *fd_stdout;
-};
-
-/* The top level PROM vector. */
-struct linux_romvec {
-        /* Version numbers. */
-        unsigned int pv_magic_cookie;
-        unsigned int pv_romvers;
-        unsigned int pv_plugin_revision;
-        unsigned int pv_printrev;
-
-        /* Version 0 memory descriptors. */
-        struct linux_mem_v0 pv_v0mem;
-
-        /* Node operations. */
-        struct linux_nodeops *pv_nodeops;
-
-        char **pv_bootstr;
-        struct linux_dev_v0_funcs pv_v0devops;
-
-        char *pv_stdin;
-        char *pv_stdout;
-#define PROMDEV_KBD     0               /* input from keyboard */
-#define PROMDEV_SCREEN  0               /* output to screen */
-#define PROMDEV_TTYA    1               /* in/out to ttya */
-#define PROMDEV_TTYB    2               /* in/out to ttyb */
-
-        /* Blocking getchar/putchar.  NOT REENTRANT! (grr) */
-        int (*pv_getchar)(void);
-        void (*pv_putchar)(int ch);
-
-        /* Non-blocking variants. */
-        int (*pv_nbgetchar)(void);
-        int (*pv_nbputchar)(int ch);
-
-        void (*pv_putstr)(char *str, int len);
-
-        /* Miscellany. */
-        void (*pv_reboot)(char *bootstr);
-        void (*pv_printf)(__const__ char *fmt, ...);
-        void (*pv_abort)(void);
-        __volatile__ int *pv_ticks;
-        void (*pv_halt)(void);
-        void (**pv_synchook)(void);
-
-        /* Evaluate a forth string, not different proto for V0 and V2->up. */
-        union {
-                void (*v0_eval)(int len, char *str);
-                void (*v2_eval)(char *str);
-        } pv_fortheval;
-
-        struct linux_arguments_v0 **pv_v0bootargs;
-
-        /* Get ether address. */
-        unsigned int (*pv_enaddr)(int d, char *enaddr);
-
-        struct linux_bootargs_v2 pv_v2bootargs;
-        struct linux_dev_v2_funcs pv_v2devops;
-
-        int filler[15];
-
-        /* This one is sun4c/sun4 only. */
-        void (*pv_setctxt)(int ctxt, char *va, int pmeg);
-
-        /* Prom version 3 Multiprocessor routines. This stuff is crazy.
-         * No joke. Calling these when there is only one cpu probably
-         * crashes the machine, have to test this. :-)
-         */
-
-        /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context
-         * 'thiscontext' executing at address 'prog_counter'
-         */
-        int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr,
-                           int thiscontext, char *prog_counter);
-
-        /* v3_cpustop() will cause cpu 'whichcpu' to stop executing
-         * until a resume cpu call is made.
-         */
-        int (*v3_cpustop)(unsigned int whichcpu);
-
-        /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or
-         * resume cpu call is made.
-         */
-        int (*v3_cpuidle)(unsigned int whichcpu);
-
-        /* v3_cpuresume() will resume processor 'whichcpu' executing
-         * starting with whatever 'pc' and 'npc' were left at the
-         * last 'idle' or 'stop' call.
-         */
-        int (*v3_cpuresume)(unsigned int whichcpu);
-};
-
-/* Routines for traversing the prom device tree. */
-struct linux_nodeops {
-        int (*no_nextnode)(int node);
-        int (*no_child)(int node);
-        int (*no_proplen)(int node, char *name);
-        int (*no_getprop)(int node, char *name, char *val);
-        int (*no_setprop)(int node, char *name, char *val, int len);
-        char * (*no_nextprop)(int node, char *name);
-};
-
-/* More fun PROM structures for device probing. */
-#define PROMREG_MAX     16
-#define PROMVADDR_MAX   16
-#define PROMINTR_MAX    15
-
-struct linux_prom_registers {
-        unsigned int which_io;         /* is this in OBIO space? */
-        unsigned int phys_addr;        /* The physical address of this register */
-        unsigned int reg_size;         /* How many bytes does this register take up? */
-};
-
-struct linux_prom_irqs {
-        int pri;    /* IRQ priority */
-        int vector; /* This is foobar, what does it do? */
-};
-
-/* Element of the "ranges" vector */
-struct linux_prom_ranges {
-        unsigned int ot_child_space;
-        unsigned int ot_child_base;             /* Bus feels this */
-        unsigned int ot_parent_space;
-        unsigned int ot_parent_base;            /* CPU looks from here */
-        unsigned int or_size;
-};
-
-/* Ranges and reg properties are a bit different for PCI. */
-struct linux_prom_pci_registers {
-        /*
-         * We don't know what information this field contain.
-         * We guess, PCI device function is in bits 15:8
-         * So, ...
-         */
-        unsigned int which_io;  /* Let it be which_io */
-
-        unsigned int phys_hi;
-        unsigned int phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_pci_ranges {
-        unsigned int child_phys_hi;     /* Only certain bits are encoded here. */
-        unsigned int child_phys_mid;
-        unsigned int child_phys_lo;
-
-        unsigned int parent_phys_hi;
-        unsigned int parent_phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_pci_assigned_addresses {
-        unsigned int which_io;
-
-        unsigned int phys_hi;
-        unsigned int phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_ebus_ranges {
-        unsigned int child_phys_hi;
-        unsigned int child_phys_lo;
-
-        unsigned int parent_phys_hi;
-        unsigned int parent_phys_mid;
-        unsigned int parent_phys_lo;
-
-        unsigned int size;
-};
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC_OPENPROM_H) */
diff --git a/arch/sparc/include/asm/openprom_64.h b/arch/sparc/include/asm/openprom_64.h
deleted file mode 100644
index b69e4a8c9170..000000000000
--- a/arch/sparc/include/asm/openprom_64.h
+++ /dev/null
@@ -1,280 +0,0 @@
-#ifndef __SPARC64_OPENPROM_H
-#define __SPARC64_OPENPROM_H
-
-/* openprom.h:  Prom structures and defines for access to the OPENBOOT
- *              prom routines and data areas.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#ifndef __ASSEMBLY__
-/* V0 prom device operations. */
-struct linux_dev_v0_funcs {
-        int (*v0_devopen)(char *device_str);
-        int (*v0_devclose)(int dev_desc);
-        int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
-        int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf);
-        int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf);
-        int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf);
-        int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
-        int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf);
-        int (*v0_seekdev)(int dev_desc, long logical_offst, int from);
-};
-
-/* V2 and later prom device operations. */
-struct linux_dev_v2_funcs {
-        int (*v2_inst2pkg)(int d);      /* Convert ihandle to phandle */
-        char * (*v2_dumb_mem_alloc)(char *va, unsigned sz);
-        void (*v2_dumb_mem_free)(char *va, unsigned sz);
-
-        /* To map devices into virtual I/O space. */
-        char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz);
-        void (*v2_dumb_munmap)(char *virta, unsigned size);
-
-        int (*v2_dev_open)(char *devpath);
-        void (*v2_dev_close)(int d);
-        int (*v2_dev_read)(int d, char *buf, int nbytes);
-        int (*v2_dev_write)(int d, char *buf, int nbytes);
-        int (*v2_dev_seek)(int d, int hi, int lo);
-
-        /* Never issued (multistage load support) */
-        void (*v2_wheee2)(void);
-        void (*v2_wheee3)(void);
-};
-
-struct linux_mlist_v0 {
-        struct linux_mlist_v0 *theres_more;
-        unsigned start_adr;
-        unsigned num_bytes;
-};
-
-struct linux_mem_v0 {
-        struct linux_mlist_v0 **v0_totphys;
-        struct linux_mlist_v0 **v0_prommap;
-        struct linux_mlist_v0 **v0_available; /* What we can use */
-};
-
-/* Arguments sent to the kernel from the boot prompt. */
-struct linux_arguments_v0 {
-        char *argv[8];
-        char args[100];
-        char boot_dev[2];
-        int boot_dev_ctrl;
-        int boot_dev_unit;
-        int dev_partition;
-        char *kernel_file_name;
-        void *aieee1;           /* XXX */
-};
-
-/* V2 and up boot things. */
-struct linux_bootargs_v2 {
-        char **bootpath;
-        char **bootargs;
-        int *fd_stdin;
-        int *fd_stdout;
-};
-
-/* The top level PROM vector. */
-struct linux_romvec {
-        /* Version numbers. */
-        unsigned int pv_magic_cookie;
-        unsigned int pv_romvers;
-        unsigned int pv_plugin_revision;
-        unsigned int pv_printrev;
-
-        /* Version 0 memory descriptors. */
-        struct linux_mem_v0 pv_v0mem;
-
-        /* Node operations. */
-        struct linux_nodeops *pv_nodeops;
-
-        char **pv_bootstr;
-        struct linux_dev_v0_funcs pv_v0devops;
-
-        char *pv_stdin;
-        char *pv_stdout;
-#define PROMDEV_KBD     0               /* input from keyboard */
-#define PROMDEV_SCREEN  0               /* output to screen */
-#define PROMDEV_TTYA    1               /* in/out to ttya */
-#define PROMDEV_TTYB    2               /* in/out to ttyb */
-
-        /* Blocking getchar/putchar.  NOT REENTRANT! (grr) */
-        int (*pv_getchar)(void);
-        void (*pv_putchar)(int ch);
-
-        /* Non-blocking variants. */
-        int (*pv_nbgetchar)(void);
-        int (*pv_nbputchar)(int ch);
-
-        void (*pv_putstr)(char *str, int len);
-
-        /* Miscellany. */
-        void (*pv_reboot)(char *bootstr);
-        void (*pv_printf)(__const__ char *fmt, ...);
-        void (*pv_abort)(void);
-        __volatile__ int *pv_ticks;
-        void (*pv_halt)(void);
-        void (**pv_synchook)(void);
-
-        /* Evaluate a forth string, not different proto for V0 and V2->up. */
-        union {
-                void (*v0_eval)(int len, char *str);
-                void (*v2_eval)(char *str);
-        } pv_fortheval;
-
-        struct linux_arguments_v0 **pv_v0bootargs;
-
-        /* Get ether address. */
-        unsigned int (*pv_enaddr)(int d, char *enaddr);
-
-        struct linux_bootargs_v2 pv_v2bootargs;
-        struct linux_dev_v2_funcs pv_v2devops;
-
-        int filler[15];
-
-        /* This one is sun4c/sun4 only. */
-        void (*pv_setctxt)(int ctxt, char *va, int pmeg);
-
-        /* Prom version 3 Multiprocessor routines. This stuff is crazy.
-         * No joke. Calling these when there is only one cpu probably
-         * crashes the machine, have to test this. :-)
-         */
-
-        /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context
-         * 'thiscontext' executing at address 'prog_counter'
-         */
-        int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr,
-                           int thiscontext, char *prog_counter);
-
-        /* v3_cpustop() will cause cpu 'whichcpu' to stop executing
-         * until a resume cpu call is made.
-         */
-        int (*v3_cpustop)(unsigned int whichcpu);
-
-        /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or
-         * resume cpu call is made.
-         */
-        int (*v3_cpuidle)(unsigned int whichcpu);
-
-        /* v3_cpuresume() will resume processor 'whichcpu' executing
-         * starting with whatever 'pc' and 'npc' were left at the
-         * last 'idle' or 'stop' call.
-         */
-        int (*v3_cpuresume)(unsigned int whichcpu);
-};
-
-/* Routines for traversing the prom device tree. */
-struct linux_nodeops {
-        int (*no_nextnode)(int node);
-        int (*no_child)(int node);
-        int (*no_proplen)(int node, char *name);
-        int (*no_getprop)(int node, char *name, char *val);
-        int (*no_setprop)(int node, char *name, char *val, int len);
-        char * (*no_nextprop)(int node, char *name);
-};
-
-/* More fun PROM structures for device probing. */
-#define PROMREG_MAX     24
-#define PROMVADDR_MAX   16
-#define PROMINTR_MAX    32
-
-struct linux_prom_registers {
-        unsigned which_io;      /* hi part of physical address                  */
-        unsigned phys_addr;     /* The physical address of this register        */
-        int reg_size;           /* How many bytes does this register take up?   */
-};
-
-struct linux_prom64_registers {
-        unsigned long phys_addr;
-        unsigned long reg_size;
-};
-
-struct linux_prom_irqs {
-        int pri;    /* IRQ priority */
-        int vector; /* This is foobar, what does it do? */
-};
-
-/* Element of the "ranges" vector */
-struct linux_prom_ranges {
-        unsigned int ot_child_space;
-        unsigned int ot_child_base;             /* Bus feels this */
-        unsigned int ot_parent_space;
-        unsigned int ot_parent_base;            /* CPU looks from here */
-        unsigned int or_size;
-};
-
-struct linux_prom64_ranges {
-        unsigned long ot_child_base;            /* Bus feels this */
-        unsigned long ot_parent_base;           /* CPU looks from here */
-        unsigned long or_size;
-};
-
-/* Ranges and reg properties are a bit different for PCI. */
-struct linux_prom_pci_registers {
-        unsigned int phys_hi;
-        unsigned int phys_mid;
-        unsigned int phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_pci_ranges {
-        unsigned int child_phys_hi;     /* Only certain bits are encoded here. */
-        unsigned int child_phys_mid;
-        unsigned int child_phys_lo;
-
-        unsigned int parent_phys_hi;
-        unsigned int parent_phys_lo;
-
-        unsigned int size_hi;
-        unsigned int size_lo;
-};
-
-struct linux_prom_pci_intmap {
-        unsigned int phys_hi;
-        unsigned int phys_mid;
-        unsigned int phys_lo;
-
-        unsigned int interrupt;
-
-        int          cnode;
-        unsigned int cinterrupt;
-};
-
-struct linux_prom_pci_intmask {
-        unsigned int phys_hi;
-        unsigned int phys_mid;
-        unsigned int phys_lo;
-        unsigned int interrupt;
-};
-
-struct linux_prom_ebus_ranges {
-        unsigned int child_phys_hi;
-        unsigned int child_phys_lo;
-
-        unsigned int parent_phys_hi;
-        unsigned int parent_phys_mid;
-        unsigned int parent_phys_lo;
-
-        unsigned int size;
-};
-
-struct linux_prom_ebus_intmap {
-        unsigned int phys_hi;
-        unsigned int phys_lo;
-
-        unsigned int interrupt;
-
-        int          cnode;
-        unsigned int cinterrupt;
-};
-
-struct linux_prom_ebus_intmask {
-        unsigned int phys_hi;
-        unsigned int phys_lo;
-        unsigned int interrupt;
-};
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC64_OPENPROM_H) */
diff --git a/arch/sparc/include/asm/oplib_32.h b/arch/sparc/include/asm/oplib_32.h
index 699da05235c8..73d45521db04 100644
--- a/arch/sparc/include/asm/oplib_32.h
+++ b/arch/sparc/include/asm/oplib_32.h
@@ -136,7 +136,7 @@ extern char prom_getchar(void);
 extern void prom_putchar(char character);
 
 /* Prom's internal routines, don't use in kernel/boot code. */
-extern void prom_printf(char *fmt, ...);
+extern void prom_printf(const char *fmt, ...);
 extern void prom_write(const char *buf, unsigned int len);
 
 /* Multiprocessor operations... */
@@ -199,12 +199,12 @@ extern int prom_getsibling(int node);
 /* Get the length, at the passed node, of the given property type.
  * Returns -1 on error (ie. no such property at this node).
  */
-extern int prom_getproplen(int thisnode, char *property);
+extern int prom_getproplen(int thisnode, const char *property);
 
 /* Fetch the requested property using the given buffer.  Returns
  * the number of bytes the prom put into your buffer or -1 on error.
  */
-extern int __must_check prom_getproperty(int thisnode, char *property,
+extern int __must_check prom_getproperty(int thisnode, const char *property,
                                          char *prop_buffer, int propbuf_size);
 
 /* Acquire an integer property. */
@@ -246,7 +246,7 @@ extern int prom_node_has_property(int node, char *property);
 /* Set the indicated property at the given node with the passed value.
  * Returns the number of bytes of your value that the prom took.
  */
-extern int prom_setprop(int node, char *prop_name, char *prop_value,
+extern int prom_setprop(int node, const char *prop_name, char *prop_value,
                         int value_size);
 
 extern int prom_pathtoinode(char *path);
diff --git a/arch/sparc/include/asm/pil.h b/arch/sparc/include/asm/pil.h
index 71819bb943fc..d573820c0ff4 100644
--- a/arch/sparc/include/asm/pil.h
+++ b/arch/sparc/include/asm/pil.h
@@ -10,7 +10,12 @@
  *
  * In fact any XCALL which has to etrap/rtrap has a problem because
  * it is difficult to prevent rtrap from running BH's, and that would
- * need to be done if the XCALL arrived while %pil==15.
+ * need to be done if the XCALL arrived while %pil==PIL_NORMAL_MAX.
+ *
+ * Finally, in order to handle profiling events even when a
+ * local_irq_disable() is in progress, we only disable up to level 14
+ * interrupts.  Profile counter overflow interrupts arrive at level
+ * 15.
  */
 #define PIL_SMP_CALL_FUNC       1
 #define PIL_SMP_RECEIVE_SIGNAL  2
@@ -18,5 +23,7 @@
 #define PIL_SMP_CTX_NEW_VERSION 4
 #define PIL_DEVICE_IRQ          5
 #define PIL_SMP_CALL_FUNC_SNGL  6
+#define PIL_NORMAL_MAX          14
+#define PIL_NMI                 15
 
 #endif /* !(_SPARC64_PIL_H) */
diff --git a/arch/sparc/include/asm/posix_types.h b/arch/sparc/include/asm/posix_types.h
index 03a0e091a884..98d6ebb922fb 100644
--- a/arch/sparc/include/asm/posix_types.h
+++ b/arch/sparc/include/asm/posix_types.h
@@ -1,8 +1,155 @@
-#ifndef ___ASM_SPARC_POSIX_TYPES_H
-#define ___ASM_SPARC_POSIX_TYPES_H
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc.  Also, we cannot
+ * assume GCC is being used.
+ */
+
+#ifndef __SPARC_POSIX_TYPES_H
+#define __SPARC_POSIX_TYPES_H
+
 #if defined(__sparc__) && defined(__arch64__)
-#include <asm/posix_types_64.h>
+/* sparc 64 bit */
+typedef unsigned long          __kernel_size_t;
+typedef long                   __kernel_ssize_t;
+typedef long                   __kernel_ptrdiff_t;
+typedef long                   __kernel_time_t;
+typedef long                   __kernel_clock_t;
+typedef int                    __kernel_pid_t;
+typedef int                    __kernel_ipc_pid_t;
+typedef unsigned int           __kernel_uid_t;
+typedef unsigned int           __kernel_gid_t;
+typedef unsigned long          __kernel_ino_t;
+typedef unsigned int           __kernel_mode_t;
+typedef unsigned short         __kernel_umode_t;
+typedef unsigned int           __kernel_nlink_t;
+typedef int                    __kernel_daddr_t;
+typedef long                   __kernel_off_t;
+typedef char *                 __kernel_caddr_t;
+typedef unsigned short         __kernel_uid16_t;
+typedef unsigned short         __kernel_gid16_t;
+typedef int                    __kernel_clockid_t;
+typedef int                    __kernel_timer_t;
+
+typedef unsigned short         __kernel_old_uid_t;
+typedef unsigned short         __kernel_old_gid_t;
+typedef __kernel_uid_t         __kernel_uid32_t;
+typedef __kernel_gid_t         __kernel_gid32_t;
+
+typedef unsigned int           __kernel_old_dev_t;
+
+/* Note this piece of asymmetry from the v9 ABI.  */
+typedef int                    __kernel_suseconds_t;
+
 #else
-#include <asm/posix_types_32.h>
-#endif
+/* sparc 32 bit */
+
+typedef unsigned int           __kernel_size_t;
+typedef int                    __kernel_ssize_t;
+typedef long int               __kernel_ptrdiff_t;
+typedef long                   __kernel_time_t;
+typedef long                   __kernel_suseconds_t;
+typedef long                   __kernel_clock_t;
+typedef int                    __kernel_pid_t;
+typedef unsigned short         __kernel_ipc_pid_t;
+typedef unsigned short         __kernel_uid_t;
+typedef unsigned short         __kernel_gid_t;
+typedef unsigned long          __kernel_ino_t;
+typedef unsigned short         __kernel_mode_t;
+typedef unsigned short         __kernel_umode_t;
+typedef short                  __kernel_nlink_t;
+typedef long                   __kernel_daddr_t;
+typedef long                   __kernel_off_t;
+typedef char *                 __kernel_caddr_t;
+typedef unsigned short         __kernel_uid16_t;
+typedef unsigned short         __kernel_gid16_t;
+typedef unsigned int           __kernel_uid32_t;
+typedef unsigned int           __kernel_gid32_t;
+typedef unsigned short         __kernel_old_uid_t;
+typedef unsigned short         __kernel_old_gid_t;
+typedef unsigned short         __kernel_old_dev_t;
+typedef int                    __kernel_clockid_t;
+typedef int                    __kernel_timer_t;
+
+#endif /* defined(__sparc__) && defined(__arch64__) */
+
+#ifdef __GNUC__
+typedef long long              __kernel_loff_t;
 #endif
+
+typedef struct {
+        int     val[2];
+} __kernel_fsid_t;
+
+#ifdef __KERNEL__
+
+#undef __FD_SET
+static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
+}
+
+#undef __FD_CLR
+static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
+}
+
+#undef __FD_ISSET
+static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
+{
+        unsigned long _tmp = fd / __NFDBITS;
+        unsigned long _rem = fd % __NFDBITS;
+        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
+}
+
+/*
+ * This will unroll the loop for the normal constant cases (8 or 32 longs,
+ * for 256 and 1024-bit fd_sets respectively)
+ */
+#undef __FD_ZERO
+static inline void __FD_ZERO(__kernel_fd_set *p)
+{
+        unsigned long *tmp = p->fds_bits;
+        int i;
+
+        if (__builtin_constant_p(__FDSET_LONGS)) {
+                switch (__FDSET_LONGS) {
+                        case 32:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
+                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
+                          tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
+                          tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
+                          tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
+                          tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
+                          return;
+                        case 16:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
+                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
+                          return;
+                        case 8:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
+                          return;
+                        case 4:
+                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
+                          return;
+                }
+        }
+        i = __FDSET_LONGS;
+        while (i) {
+                i--;
+                *tmp = 0;
+                tmp++;
+        }
+}
+
+#endif /* __KERNEL__ */
+#endif /* __SPARC_POSIX_TYPES_H */
diff --git a/arch/sparc/include/asm/posix_types_32.h b/arch/sparc/include/asm/posix_types_32.h
deleted file mode 100644
index 6bb6eb1ca0f2..000000000000
--- a/arch/sparc/include/asm/posix_types_32.h
+++ /dev/null
@@ -1,118 +0,0 @@
-#ifndef __ARCH_SPARC_POSIX_TYPES_H
-#define __ARCH_SPARC_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc.  Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned int           __kernel_size_t;
-typedef int                    __kernel_ssize_t;
-typedef long int               __kernel_ptrdiff_t;
-typedef long                   __kernel_time_t;
-typedef long                   __kernel_suseconds_t;
-typedef long                   __kernel_clock_t;
-typedef int                    __kernel_pid_t;
-typedef unsigned short         __kernel_ipc_pid_t;
-typedef unsigned short         __kernel_uid_t;
-typedef unsigned short         __kernel_gid_t;
-typedef unsigned long          __kernel_ino_t;
-typedef unsigned short         __kernel_mode_t;
-typedef unsigned short         __kernel_umode_t;
-typedef short                  __kernel_nlink_t;
-typedef long                   __kernel_daddr_t;
-typedef long                   __kernel_off_t;
-typedef char *                 __kernel_caddr_t;
-typedef unsigned short         __kernel_uid16_t;
-typedef unsigned short         __kernel_gid16_t;
-typedef unsigned int           __kernel_uid32_t;
-typedef unsigned int           __kernel_gid32_t;
-typedef unsigned short         __kernel_old_uid_t;
-typedef unsigned short         __kernel_old_gid_t;
-typedef unsigned short         __kernel_old_dev_t;
-typedef int                    __kernel_clockid_t;
-typedef int                    __kernel_timer_t;
-
-#ifdef __GNUC__
-typedef long long       __kernel_loff_t;
-#endif
-
-typedef struct {
-        int     val[2];
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__)
-
-#undef __FD_SET
-static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
-}
-
-#undef __FD_CLR
-static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
-}
-
-#undef __FD_ISSET
-static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
-}
-
-/*
- * This will unroll the loop for the normal constant cases (8 or 32 longs,
- * for 256 and 1024-bit fd_sets respectively)
- */
-#undef __FD_ZERO
-static inline void __FD_ZERO(__kernel_fd_set *p)
-{
-        unsigned long *tmp = p->fds_bits;
-        int i;
-
-        if (__builtin_constant_p(__FDSET_LONGS)) {
-                switch (__FDSET_LONGS) {
-                        case 32:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
-                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
-                          tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
-                          tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
-                          tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
-                          tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
-                          return;
-                        case 16:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
-                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
-                          return;
-                        case 8:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          return;
-                        case 4:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          return;
-                }
-        }
-        i = __FDSET_LONGS;
-        while (i) {
-                i--;
-                *tmp = 0;
-                tmp++;
-        }
-}
-
-#endif /* defined(__KERNEL__) */
-
-#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */
diff --git a/arch/sparc/include/asm/posix_types_64.h b/arch/sparc/include/asm/posix_types_64.h
deleted file mode 100644
index ba8f93295763..000000000000
--- a/arch/sparc/include/asm/posix_types_64.h
+++ /dev/null
@@ -1,122 +0,0 @@
-#ifndef __ARCH_SPARC64_POSIX_TYPES_H
-#define __ARCH_SPARC64_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc.  Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned long          __kernel_size_t;
-typedef long                   __kernel_ssize_t;
-typedef long                   __kernel_ptrdiff_t;
-typedef long                   __kernel_time_t;
-typedef long                   __kernel_clock_t;
-typedef int                    __kernel_pid_t;
-typedef int                    __kernel_ipc_pid_t;
-typedef unsigned int           __kernel_uid_t;
-typedef unsigned int           __kernel_gid_t;
-typedef unsigned long          __kernel_ino_t;
-typedef unsigned int           __kernel_mode_t;
-typedef unsigned short         __kernel_umode_t;
-typedef unsigned int           __kernel_nlink_t;
-typedef int                    __kernel_daddr_t;
-typedef long                   __kernel_off_t;
-typedef char *                 __kernel_caddr_t;
-typedef unsigned short         __kernel_uid16_t;
-typedef unsigned short         __kernel_gid16_t;
-typedef int                    __kernel_clockid_t;
-typedef int                    __kernel_timer_t;
-
-typedef unsigned short         __kernel_old_uid_t;
-typedef unsigned short         __kernel_old_gid_t;
-typedef __kernel_uid_t         __kernel_uid32_t;
-typedef __kernel_gid_t         __kernel_gid32_t;
-
-typedef unsigned int           __kernel_old_dev_t;
-
-/* Note this piece of asymmetry from the v9 ABI.  */
-typedef int                    __kernel_suseconds_t;
-
-#ifdef __GNUC__
-typedef long long              __kernel_loff_t;
-#endif
-
-typedef struct {
-        int     val[2];
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__)
-
-#undef __FD_SET
-static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
-}
-
-#undef __FD_CLR
-static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
-}
-
-#undef __FD_ISSET
-static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
-}
-
-/*
- * This will unroll the loop for the normal constant cases (8 or 32 longs,
- * for 256 and 1024-bit fd_sets respectively)
- */
-#undef __FD_ZERO
-static inline void __FD_ZERO(__kernel_fd_set *p)
-{
-        unsigned long *tmp = p->fds_bits;
-        int i;
-
-        if (__builtin_constant_p(__FDSET_LONGS)) {
-                switch (__FDSET_LONGS) {
-                        case 32:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
-                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
-                          tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0;
-                          tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0;
-                          tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0;
-                          tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0;
-                          return;
-                        case 16:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0;
-                          tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0;
-                          return;
-                        case 8:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0;
-                          return;
-                        case 4:
-                          tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0;
-                          return;
-                }
-        }
-        i = __FDSET_LONGS;
-        while (i) {
-                i--;
-                *tmp = 0;
-                tmp++;
-        }
-}
-
-#endif /* defined(__KERNEL__) */
-
-#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */
diff --git a/arch/sparc/include/asm/processor_32.h b/arch/sparc/include/asm/processor_32.h
index 2ae67a2e7f3a..09521c6a5edb 100644
--- a/arch/sparc/include/asm/processor_32.h
+++ b/arch/sparc/include/asm/processor_32.h
@@ -99,7 +99,7 @@ static inline void start_thread(struct pt_regs * regs, unsigned long pc,
                              "st\t%%g0, [%0 + %3 + 0x3c]"
                              : /* no outputs */
                              : "r" (regs),
-                               "r" (sp - sizeof(struct reg_window)),
+                               "r" (sp - sizeof(struct reg_window32)),
                                "r" (zero),
                                "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))
                              : "memory");
diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h
index 6dcbe2eed2e2..30b0b797dc0c 100644
--- a/arch/sparc/include/asm/ptrace.h
+++ b/arch/sparc/include/asm/ptrace.h
@@ -1,8 +1,448 @@
-#ifndef ___ASM_SPARC_PTRACE_H
-#define ___ASM_SPARC_PTRACE_H
+#ifndef __SPARC_PTRACE_H
+#define __SPARC_PTRACE_H
+
 #if defined(__sparc__) && defined(__arch64__)
-#include <asm/ptrace_64.h>
+/* 64 bit sparc */
+#include <asm/pstate.h>
+
+/* This struct defines the way the registers are stored on the
+ * stack during a system call and basically all traps.
+ */
+
+/* This magic value must have the low 9 bits clear,
+ * as that is where we encode the %tt value, see below.
+ */
+#define PT_REGS_MAGIC 0x57ac6c00
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+struct pt_regs {
+        unsigned long u_regs[16]; /* globals and ins */
+        unsigned long tstate;
+        unsigned long tpc;
+        unsigned long tnpc;
+        unsigned int y;
+
+        /* We encode a magic number, PT_REGS_MAGIC, along
+         * with the %tt (trap type) register value at trap
+         * entry time.  The magic number allows us to identify
+         * accurately a trap stack frame in the stack
+         * unwinder, and the %tt value allows us to test
+         * things like "in a system call" etc. for an arbitray
+         * process.
+         *
+         * The PT_REGS_MAGIC is choosen such that it can be
+         * loaded completely using just a sethi instruction.
+         */
+        unsigned int magic;
+};
+
+struct pt_regs32 {
+        unsigned int psr;
+        unsigned int pc;
+        unsigned int npc;
+        unsigned int y;
+        unsigned int u_regs[16]; /* globals and ins */
+};
+
+/* A V9 register window */
+struct reg_window {
+        unsigned long locals[8];
+        unsigned long ins[8];
+};
+
+/* A 32-bit register window. */
+struct reg_window32 {
+        unsigned int locals[8];
+        unsigned int ins[8];
+};
+
+/* A V9 Sparc stack frame */
+struct sparc_stackf {
+        unsigned long locals[8];
+        unsigned long ins[6];
+        struct sparc_stackf *fp;
+        unsigned long callers_pc;
+        char *structptr;
+        unsigned long xargs[6];
+        unsigned long xxargs[1];
+};
+
+/* A 32-bit Sparc stack frame */
+struct sparc_stackf32 {
+        unsigned int locals[8];
+        unsigned int ins[6];
+        unsigned int fp;
+        unsigned int callers_pc;
+        unsigned int structptr;
+        unsigned int xargs[6];
+        unsigned int xxargs[1];
+};
+
+struct sparc_trapf {
+        unsigned long locals[8];
+        unsigned long ins[8];
+        unsigned long _unused;
+        struct pt_regs *regs;
+};
+#endif /* (!__ASSEMBLY__) */
 #else
-#include <asm/ptrace_32.h>
+/* 32 bit sparc */
+
+#include <asm/psr.h>
+
+/* This struct defines the way the registers are stored on the
+ * stack during a system call and basically all traps.
+ */
+#ifndef __ASSEMBLY__
+
+struct pt_regs {
+        unsigned long psr;
+        unsigned long pc;
+        unsigned long npc;
+        unsigned long y;
+        unsigned long u_regs[16]; /* globals and ins */
+};
+
+/* A 32-bit register window. */
+struct reg_window32 {
+        unsigned long locals[8];
+        unsigned long ins[8];
+};
+
+/* A Sparc stack frame */
+struct sparc_stackf {
+        unsigned long locals[8];
+        unsigned long ins[6];
+        struct sparc_stackf *fp;
+        unsigned long callers_pc;
+        char *structptr;
+        unsigned long xargs[6];
+        unsigned long xxargs[1];
+};
+#endif /* (!__ASSEMBLY__) */
+
+#endif /* (defined(__sparc__) && defined(__arch64__))*/
+
+#ifndef __ASSEMBLY__
+
+#define TRACEREG_SZ     sizeof(struct pt_regs)
+#define STACKFRAME_SZ   sizeof(struct sparc_stackf)
+
+#define TRACEREG32_SZ   sizeof(struct pt_regs32)
+#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
+
+#endif /* (!__ASSEMBLY__) */
+
+#define UREG_G0        0
+#define UREG_G1        1
+#define UREG_G2        2
+#define UREG_G3        3
+#define UREG_G4        4
+#define UREG_G5        5
+#define UREG_G6        6
+#define UREG_G7        7
+#define UREG_I0        8
+#define UREG_I1        9
+#define UREG_I2        10
+#define UREG_I3        11
+#define UREG_I4        12
+#define UREG_I5        13
+#define UREG_I6        14
+#define UREG_I7        15
+#define UREG_FP        UREG_I6
+#define UREG_RETPC     UREG_I7
+
+#if defined(__sparc__) && defined(__arch64__)
+/* 64 bit sparc */
+
+#ifndef __ASSEMBLY__
+
+#ifdef __KERNEL__
+
+#include <linux/threads.h>
+#include <asm/system.h>
+
+static inline int pt_regs_trap_type(struct pt_regs *regs)
+{
+        return regs->magic & 0x1ff;
+}
+
+static inline bool pt_regs_is_syscall(struct pt_regs *regs)
+{
+        return (regs->tstate & TSTATE_SYSCALL);
+}
+
+static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
+{
+        return (regs->tstate &= ~TSTATE_SYSCALL);
+}
+
+#define arch_ptrace_stop_needed(exit_code, info) \
+({      flush_user_windows(); \
+        get_thread_wsaved() != 0; \
+})
+
+#define arch_ptrace_stop(exit_code, info) \
+        synchronize_user_stack()
+
+struct global_reg_snapshot {
+        unsigned long           tstate;
+        unsigned long           tpc;
+        unsigned long           tnpc;
+        unsigned long           o7;
+        unsigned long           i7;
+        unsigned long           rpc;
+        struct thread_info      *thread;
+        unsigned long           pad1;
+};
+extern struct global_reg_snapshot global_reg_snapshot[NR_CPUS];
+
+#define force_successful_syscall_return()           \
+do {    current_thread_info()->syscall_noerror = 1; \
+} while (0)
+#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
+#define instruction_pointer(regs) ((regs)->tpc)
+#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
+#define regs_return_value(regs) ((regs)->u_regs[UREG_I0])
+#ifdef CONFIG_SMP
+extern unsigned long profile_pc(struct pt_regs *);
+#else
+#define profile_pc(regs) instruction_pointer(regs)
 #endif
+extern void show_regs(struct pt_regs *);
+#endif /* (__KERNEL__) */
+
+#else /* __ASSEMBLY__ */
+/* For assembly code. */
+#define TRACEREG_SZ             0xa0
+#define STACKFRAME_SZ           0xc0
+
+#define TRACEREG32_SZ           0x50
+#define STACKFRAME32_SZ         0x60
+#endif /* __ASSEMBLY__ */
+
+#else /* (defined(__sparc__) && defined(__arch64__)) */
+
+/* 32 bit sparc */
+
+#ifndef __ASSEMBLY__
+
+#ifdef __KERNEL__
+
+#include <asm/system.h>
+
+static inline bool pt_regs_is_syscall(struct pt_regs *regs)
+{
+        return (regs->psr & PSR_SYSCALL);
+}
+
+static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
+{
+        return (regs->psr &= ~PSR_SYSCALL);
+}
+
+#define arch_ptrace_stop_needed(exit_code, info) \
+({      flush_user_windows(); \
+        current_thread_info()->w_saved != 0;    \
+})
+
+#define arch_ptrace_stop(exit_code, info) \
+        synchronize_user_stack()
+
+#define user_mode(regs) (!((regs)->psr & PSR_PS))
+#define instruction_pointer(regs) ((regs)->pc)
+#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
+unsigned long profile_pc(struct pt_regs *);
+extern void show_regs(struct pt_regs *);
+#endif /* (__KERNEL__) */
+
+#else /* (!__ASSEMBLY__) */
+/* For assembly code. */
+#define TRACEREG_SZ       0x50
+#define STACKFRAME_SZ     0x60
+#endif /* (!__ASSEMBLY__) */
+
+#endif /* (defined(__sparc__) && defined(__arch64__)) */
+
+#ifdef __KERNEL__
+#define STACK_BIAS              2047
 #endif
+
+/* These are for pt_regs. */
+#define PT_V9_G0     0x00
+#define PT_V9_G1     0x08
+#define PT_V9_G2     0x10
+#define PT_V9_G3     0x18
+#define PT_V9_G4     0x20
+#define PT_V9_G5     0x28
+#define PT_V9_G6     0x30
+#define PT_V9_G7     0x38
+#define PT_V9_I0     0x40
+#define PT_V9_I1     0x48
+#define PT_V9_I2     0x50
+#define PT_V9_I3     0x58
+#define PT_V9_I4     0x60
+#define PT_V9_I5     0x68
+#define PT_V9_I6     0x70
+#define PT_V9_FP     PT_V9_I6
+#define PT_V9_I7     0x78
+#define PT_V9_TSTATE 0x80
+#define PT_V9_TPC    0x88
+#define PT_V9_TNPC   0x90
+#define PT_V9_Y      0x98
+#define PT_V9_MAGIC  0x9c
+#define PT_TSTATE       PT_V9_TSTATE
+#define PT_TPC          PT_V9_TPC
+#define PT_TNPC         PT_V9_TNPC
+
+/* These for pt_regs32. */
+#define PT_PSR    0x0
+#define PT_PC     0x4
+#define PT_NPC    0x8
+#define PT_Y      0xc
+#define PT_G0     0x10
+#define PT_WIM    PT_G0
+#define PT_G1     0x14
+#define PT_G2     0x18
+#define PT_G3     0x1c
+#define PT_G4     0x20
+#define PT_G5     0x24
+#define PT_G6     0x28
+#define PT_G7     0x2c
+#define PT_I0     0x30
+#define PT_I1     0x34
+#define PT_I2     0x38
+#define PT_I3     0x3c
+#define PT_I4     0x40
+#define PT_I5     0x44
+#define PT_I6     0x48
+#define PT_FP     PT_I6
+#define PT_I7     0x4c
+
+/* Reg_window offsets */
+#define RW_V9_L0     0x00
+#define RW_V9_L1     0x08
+#define RW_V9_L2     0x10
+#define RW_V9_L3     0x18
+#define RW_V9_L4     0x20
+#define RW_V9_L5     0x28
+#define RW_V9_L6     0x30
+#define RW_V9_L7     0x38
+#define RW_V9_I0     0x40
+#define RW_V9_I1     0x48
+#define RW_V9_I2     0x50
+#define RW_V9_I3     0x58
+#define RW_V9_I4     0x60
+#define RW_V9_I5     0x68
+#define RW_V9_I6     0x70
+#define RW_V9_I7     0x78
+
+#define RW_L0     0x00
+#define RW_L1     0x04
+#define RW_L2     0x08
+#define RW_L3     0x0c
+#define RW_L4     0x10
+#define RW_L5     0x14
+#define RW_L6     0x18
+#define RW_L7     0x1c
+#define RW_I0     0x20
+#define RW_I1     0x24
+#define RW_I2     0x28
+#define RW_I3     0x2c
+#define RW_I4     0x30
+#define RW_I5     0x34
+#define RW_I6     0x38
+#define RW_I7     0x3c
+
+/* Stack_frame offsets */
+#define SF_V9_L0     0x00
+#define SF_V9_L1     0x08
+#define SF_V9_L2     0x10
+#define SF_V9_L3     0x18
+#define SF_V9_L4     0x20
+#define SF_V9_L5     0x28
+#define SF_V9_L6     0x30
+#define SF_V9_L7     0x38
+#define SF_V9_I0     0x40
+#define SF_V9_I1     0x48
+#define SF_V9_I2     0x50
+#define SF_V9_I3     0x58
+#define SF_V9_I4     0x60
+#define SF_V9_I5     0x68
+#define SF_V9_FP     0x70
+#define SF_V9_PC     0x78
+#define SF_V9_RETP   0x80
+#define SF_V9_XARG0  0x88
+#define SF_V9_XARG1  0x90
+#define SF_V9_XARG2  0x98
+#define SF_V9_XARG3  0xa0
+#define SF_V9_XARG4  0xa8
+#define SF_V9_XARG5  0xb0
+#define SF_V9_XXARG  0xb8
+
+#define SF_L0     0x00
+#define SF_L1     0x04
+#define SF_L2     0x08
+#define SF_L3     0x0c
+#define SF_L4     0x10
+#define SF_L5     0x14
+#define SF_L6     0x18
+#define SF_L7     0x1c
+#define SF_I0     0x20
+#define SF_I1     0x24
+#define SF_I2     0x28
+#define SF_I3     0x2c
+#define SF_I4     0x30
+#define SF_I5     0x34
+#define SF_FP     0x38
+#define SF_PC     0x3c
+#define SF_RETP   0x40
+#define SF_XARG0  0x44
+#define SF_XARG1  0x48
+#define SF_XARG2  0x4c
+#define SF_XARG3  0x50
+#define SF_XARG4  0x54
+#define SF_XARG5  0x58
+#define SF_XXARG  0x5c
+
+#ifdef __KERNEL__
+
+/* global_reg_snapshot offsets */
+#define GR_SNAP_TSTATE  0x00
+#define GR_SNAP_TPC     0x08
+#define GR_SNAP_TNPC    0x10
+#define GR_SNAP_O7      0x18
+#define GR_SNAP_I7      0x20
+#define GR_SNAP_RPC     0x28
+#define GR_SNAP_THREAD  0x30
+#define GR_SNAP_PAD1    0x38
+
+#endif  /*  __KERNEL__  */
+
+/* Stuff for the ptrace system call */
+#define PTRACE_SPARC_DETACH       11
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+#define PTRACE_GETFPREGS          14
+#define PTRACE_SETFPREGS          15
+#define PTRACE_READDATA           16
+#define PTRACE_WRITEDATA          17
+#define PTRACE_READTEXT           18
+#define PTRACE_WRITETEXT          19
+#define PTRACE_GETFPAREGS         20
+#define PTRACE_SETFPAREGS         21
+
+/* There are for debugging 64-bit processes, either from a 32 or 64 bit
+ * parent.  Thus their complements are for debugging 32-bit processes only.
+ */
+
+#define PTRACE_GETREGS64          22
+#define PTRACE_SETREGS64          23
+/* PTRACE_SYSCALL is 24 */
+#define PTRACE_GETFPREGS64        25
+#define PTRACE_SETFPREGS64        26
+
+#endif /* !(__SPARC_PTRACE_H) */
diff --git a/arch/sparc/include/asm/ptrace_32.h b/arch/sparc/include/asm/ptrace_32.h
deleted file mode 100644
index 4cef450167dd..000000000000
--- a/arch/sparc/include/asm/ptrace_32.h
+++ /dev/null
@@ -1,186 +0,0 @@
-#ifndef _SPARC_PTRACE_H
-#define _SPARC_PTRACE_H
-
-#include <asm/psr.h>
-
-/* This struct defines the way the registers are stored on the
- * stack during a system call and basically all traps.
- */
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-struct pt_regs {
-        unsigned long psr;
-        unsigned long pc;
-        unsigned long npc;
-        unsigned long y;
-        unsigned long u_regs[16]; /* globals and ins */
-};
-
-#define UREG_G0        0
-#define UREG_G1        1
-#define UREG_G2        2
-#define UREG_G3        3
-#define UREG_G4        4
-#define UREG_G5        5
-#define UREG_G6        6
-#define UREG_G7        7
-#define UREG_I0        8
-#define UREG_I1        9
-#define UREG_I2        10
-#define UREG_I3        11
-#define UREG_I4        12
-#define UREG_I5        13
-#define UREG_I6        14
-#define UREG_I7        15
-#define UREG_WIM       UREG_G0
-#define UREG_FADDR     UREG_G0
-#define UREG_FP        UREG_I6
-#define UREG_RETPC     UREG_I7
-
-/* A register window */
-struct reg_window {
-        unsigned long locals[8];
-        unsigned long ins[8];
-};
-
-/* A Sparc stack frame */
-struct sparc_stackf {
-        unsigned long locals[8];
-        unsigned long ins[6];
-        struct sparc_stackf *fp;
-        unsigned long callers_pc;
-        char *structptr;
-        unsigned long xargs[6];
-        unsigned long xxargs[1];
-};
-
-#define TRACEREG_SZ   sizeof(struct pt_regs)
-#define STACKFRAME_SZ sizeof(struct sparc_stackf)
-
-#ifdef __KERNEL__
-
-#include <asm/system.h>
-
-static inline bool pt_regs_is_syscall(struct pt_regs *regs)
-{
-        return (regs->psr & PSR_SYSCALL);
-}
-
-static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
-{
-        return (regs->psr &= ~PSR_SYSCALL);
-}
-
-#define arch_ptrace_stop_needed(exit_code, info) \
-({      flush_user_windows(); \
-        current_thread_info()->w_saved != 0;    \
-})
-
-#define arch_ptrace_stop(exit_code, info) \
-        synchronize_user_stack()
-
-#define user_mode(regs) (!((regs)->psr & PSR_PS))
-#define instruction_pointer(regs) ((regs)->pc)
-#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
-unsigned long profile_pc(struct pt_regs *);
-extern void show_regs(struct pt_regs *);
-#endif
-
-#else /* __ASSEMBLY__ */
-/* For assembly code. */
-#define TRACEREG_SZ       0x50
-#define STACKFRAME_SZ     0x60
-#endif
-
-/*
- * The asm-offsets.h is a generated file, so we cannot include it.
- * It may be OK for glibc headers, but it's utterly pointless for C code.
- * The assembly code using those offsets has to include it explicitly.
- */
-/* #include <asm/asm-offsets.h> */
-
-/* These are for pt_regs. */
-#define PT_PSR    0x0
-#define PT_PC     0x4
-#define PT_NPC    0x8
-#define PT_Y      0xc
-#define PT_G0     0x10
-#define PT_WIM    PT_G0
-#define PT_G1     0x14
-#define PT_G2     0x18
-#define PT_G3     0x1c
-#define PT_G4     0x20
-#define PT_G5     0x24
-#define PT_G6     0x28
-#define PT_G7     0x2c
-#define PT_I0     0x30
-#define PT_I1     0x34
-#define PT_I2     0x38
-#define PT_I3     0x3c
-#define PT_I4     0x40
-#define PT_I5     0x44
-#define PT_I6     0x48
-#define PT_FP     PT_I6
-#define PT_I7     0x4c
-
-/* Reg_window offsets */
-#define RW_L0     0x00
-#define RW_L1     0x04
-#define RW_L2     0x08
-#define RW_L3     0x0c
-#define RW_L4     0x10
-#define RW_L5     0x14
-#define RW_L6     0x18
-#define RW_L7     0x1c
-#define RW_I0     0x20
-#define RW_I1     0x24
-#define RW_I2     0x28
-#define RW_I3     0x2c
-#define RW_I4     0x30
-#define RW_I5     0x34
-#define RW_I6     0x38
-#define RW_I7     0x3c
-
-/* Stack_frame offsets */
-#define SF_L0     0x00
-#define SF_L1     0x04
-#define SF_L2     0x08
-#define SF_L3     0x0c
-#define SF_L4     0x10
-#define SF_L5     0x14
-#define SF_L6     0x18
-#define SF_L7     0x1c
-#define SF_I0     0x20
-#define SF_I1     0x24
-#define SF_I2     0x28
-#define SF_I3     0x2c
-#define SF_I4     0x30
-#define SF_I5     0x34
-#define SF_FP     0x38
-#define SF_PC     0x3c
-#define SF_RETP   0x40
-#define SF_XARG0  0x44
-#define SF_XARG1  0x48
-#define SF_XARG2  0x4c
-#define SF_XARG3  0x50
-#define SF_XARG4  0x54
-#define SF_XARG5  0x58
-#define SF_XXARG  0x5c
-
-/* Stuff for the ptrace system call */
-#define PTRACE_SPARC_DETACH       11
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-#define PTRACE_READDATA           16
-#define PTRACE_WRITEDATA          17
-#define PTRACE_READTEXT           18
-#define PTRACE_WRITETEXT          19
-#define PTRACE_GETFPAREGS         20
-#define PTRACE_SETFPAREGS         21
-
-#endif /* !(_SPARC_PTRACE_H) */
diff --git a/arch/sparc/include/asm/ptrace_64.h b/arch/sparc/include/asm/ptrace_64.h
deleted file mode 100644
index cd6fbfc20435..000000000000
--- a/arch/sparc/include/asm/ptrace_64.h
+++ /dev/null
@@ -1,356 +0,0 @@
-#ifndef _SPARC64_PTRACE_H
-#define _SPARC64_PTRACE_H
-
-#include <asm/pstate.h>
-
-/* This struct defines the way the registers are stored on the
- * stack during a system call and basically all traps.
- */
-
-/* This magic value must have the low 9 bits clear,
- * as that is where we encode the %tt value, see below.
- */
-#define PT_REGS_MAGIC 0x57ac6c00
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-struct pt_regs {
-        unsigned long u_regs[16]; /* globals and ins */
-        unsigned long tstate;
-        unsigned long tpc;
-        unsigned long tnpc;
-        unsigned int y;
-
-        /* We encode a magic number, PT_REGS_MAGIC, along
-         * with the %tt (trap type) register value at trap
-         * entry time.  The magic number allows us to identify
-         * accurately a trap stack frame in the stack
-         * unwinder, and the %tt value allows us to test
-         * things like "in a system call" etc. for an arbitray
-         * process.
-         *
-         * The PT_REGS_MAGIC is choosen such that it can be
-         * loaded completely using just a sethi instruction.
-         */
-        unsigned int magic;
-};
-
-struct pt_regs32 {
-        unsigned int psr;
-        unsigned int pc;
-        unsigned int npc;
-        unsigned int y;
-        unsigned int u_regs[16]; /* globals and ins */
-};
-
-#define UREG_G0        0
-#define UREG_G1        1
-#define UREG_G2        2
-#define UREG_G3        3
-#define UREG_G4        4
-#define UREG_G5        5
-#define UREG_G6        6
-#define UREG_G7        7
-#define UREG_I0        8
-#define UREG_I1        9
-#define UREG_I2        10
-#define UREG_I3        11
-#define UREG_I4        12
-#define UREG_I5        13
-#define UREG_I6        14
-#define UREG_I7        15
-#define UREG_FP        UREG_I6
-#define UREG_RETPC     UREG_I7
-
-/* A V9 register window */
-struct reg_window {
-        unsigned long locals[8];
-        unsigned long ins[8];
-};
-
-/* A 32-bit register window. */
-struct reg_window32 {
-        unsigned int locals[8];
-        unsigned int ins[8];
-};
-
-/* A V9 Sparc stack frame */
-struct sparc_stackf {
-        unsigned long locals[8];
-        unsigned long ins[6];
-        struct sparc_stackf *fp;
-        unsigned long callers_pc;
-        char *structptr;
-        unsigned long xargs[6];
-        unsigned long xxargs[1];
-};
-
-/* A 32-bit Sparc stack frame */
-struct sparc_stackf32 {
-        unsigned int locals[8];
-        unsigned int ins[6];
-        unsigned int fp;
-        unsigned int callers_pc;
-        unsigned int structptr;
-        unsigned int xargs[6];
-        unsigned int xxargs[1];
-};
-
-struct sparc_trapf {
-        unsigned long locals[8];
-        unsigned long ins[8];
-        unsigned long _unused;
-        struct pt_regs *regs;
-};
-
-#define TRACEREG_SZ     sizeof(struct pt_regs)
-#define STACKFRAME_SZ   sizeof(struct sparc_stackf)
-
-#define TRACEREG32_SZ   sizeof(struct pt_regs32)
-#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
-
-#ifdef __KERNEL__
-
-#include <linux/threads.h>
-#include <asm/system.h>
-
-static inline int pt_regs_trap_type(struct pt_regs *regs)
-{
-        return regs->magic & 0x1ff;
-}
-
-static inline bool pt_regs_is_syscall(struct pt_regs *regs)
-{
-        return (regs->tstate & TSTATE_SYSCALL);
-}
-
-static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
-{
-        return (regs->tstate &= ~TSTATE_SYSCALL);
-}
-
-#define arch_ptrace_stop_needed(exit_code, info) \
-({      flush_user_windows(); \
-        get_thread_wsaved() != 0; \
-})
-
-#define arch_ptrace_stop(exit_code, info) \
-        synchronize_user_stack()
-
-struct global_reg_snapshot {
-        unsigned long           tstate;
-        unsigned long           tpc;
-        unsigned long           tnpc;
-        unsigned long           o7;
-        unsigned long           i7;
-        unsigned long           rpc;
-        struct thread_info      *thread;
-        unsigned long           pad1;
-};
-extern struct global_reg_snapshot global_reg_snapshot[NR_CPUS];
-
-#define force_successful_syscall_return()           \
-do {    current_thread_info()->syscall_noerror = 1; \
-} while (0)
-#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
-#define instruction_pointer(regs) ((regs)->tpc)
-#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
-#define regs_return_value(regs) ((regs)->u_regs[UREG_I0])
-#ifdef CONFIG_SMP
-extern unsigned long profile_pc(struct pt_regs *);
-#else
-#define profile_pc(regs) instruction_pointer(regs)
-#endif
-extern void show_regs(struct pt_regs *);
-#endif
-
-#else /* __ASSEMBLY__ */
-/* For assembly code. */
-#define TRACEREG_SZ             0xa0
-#define STACKFRAME_SZ           0xc0
-
-#define TRACEREG32_SZ           0x50
-#define STACKFRAME32_SZ         0x60
-#endif
-
-#ifdef __KERNEL__
-#define STACK_BIAS              2047
-#endif
-
-/* These are for pt_regs. */
-#define PT_V9_G0     0x00
-#define PT_V9_G1     0x08
-#define PT_V9_G2     0x10
-#define PT_V9_G3     0x18
-#define PT_V9_G4     0x20
-#define PT_V9_G5     0x28
-#define PT_V9_G6     0x30
-#define PT_V9_G7     0x38
-#define PT_V9_I0     0x40
-#define PT_V9_I1     0x48
-#define PT_V9_I2     0x50
-#define PT_V9_I3     0x58
-#define PT_V9_I4     0x60
-#define PT_V9_I5     0x68
-#define PT_V9_I6     0x70
-#define PT_V9_FP     PT_V9_I6
-#define PT_V9_I7     0x78
-#define PT_V9_TSTATE 0x80
-#define PT_V9_TPC    0x88
-#define PT_V9_TNPC   0x90
-#define PT_V9_Y      0x98
-#define PT_V9_MAGIC  0x9c
-#define PT_TSTATE       PT_V9_TSTATE
-#define PT_TPC          PT_V9_TPC
-#define PT_TNPC         PT_V9_TNPC
-
-/* These for pt_regs32. */
-#define PT_PSR    0x0
-#define PT_PC     0x4
-#define PT_NPC    0x8
-#define PT_Y      0xc
-#define PT_G0     0x10
-#define PT_WIM    PT_G0
-#define PT_G1     0x14
-#define PT_G2     0x18
-#define PT_G3     0x1c
-#define PT_G4     0x20
-#define PT_G5     0x24
-#define PT_G6     0x28
-#define PT_G7     0x2c
-#define PT_I0     0x30
-#define PT_I1     0x34
-#define PT_I2     0x38
-#define PT_I3     0x3c
-#define PT_I4     0x40
-#define PT_I5     0x44
-#define PT_I6     0x48
-#define PT_FP     PT_I6
-#define PT_I7     0x4c
-
-/* Reg_window offsets */
-#define RW_V9_L0     0x00
-#define RW_V9_L1     0x08
-#define RW_V9_L2     0x10
-#define RW_V9_L3     0x18
-#define RW_V9_L4     0x20
-#define RW_V9_L5     0x28
-#define RW_V9_L6     0x30
-#define RW_V9_L7     0x38
-#define RW_V9_I0     0x40
-#define RW_V9_I1     0x48
-#define RW_V9_I2     0x50
-#define RW_V9_I3     0x58
-#define RW_V9_I4     0x60
-#define RW_V9_I5     0x68
-#define RW_V9_I6     0x70
-#define RW_V9_I7     0x78
-
-#define RW_L0     0x00
-#define RW_L1     0x04
-#define RW_L2     0x08
-#define RW_L3     0x0c
-#define RW_L4     0x10
-#define RW_L5     0x14
-#define RW_L6     0x18
-#define RW_L7     0x1c
-#define RW_I0     0x20
-#define RW_I1     0x24
-#define RW_I2     0x28
-#define RW_I3     0x2c
-#define RW_I4     0x30
-#define RW_I5     0x34
-#define RW_I6     0x38
-#define RW_I7     0x3c
-
-/* Stack_frame offsets */
-#define SF_V9_L0     0x00
-#define SF_V9_L1     0x08
-#define SF_V9_L2     0x10
-#define SF_V9_L3     0x18
-#define SF_V9_L4     0x20
-#define SF_V9_L5     0x28
-#define SF_V9_L6     0x30
-#define SF_V9_L7     0x38
-#define SF_V9_I0     0x40
-#define SF_V9_I1     0x48
-#define SF_V9_I2     0x50
-#define SF_V9_I3     0x58
-#define SF_V9_I4     0x60
-#define SF_V9_I5     0x68
-#define SF_V9_FP     0x70
-#define SF_V9_PC     0x78
-#define SF_V9_RETP   0x80
-#define SF_V9_XARG0  0x88
-#define SF_V9_XARG1  0x90
-#define SF_V9_XARG2  0x98
-#define SF_V9_XARG3  0xa0
-#define SF_V9_XARG4  0xa8
-#define SF_V9_XARG5  0xb0
-#define SF_V9_XXARG  0xb8
-
-#define SF_L0     0x00
-#define SF_L1     0x04
-#define SF_L2     0x08
-#define SF_L3     0x0c
-#define SF_L4     0x10
-#define SF_L5     0x14
-#define SF_L6     0x18
-#define SF_L7     0x1c
-#define SF_I0     0x20
-#define SF_I1     0x24
-#define SF_I2     0x28
-#define SF_I3     0x2c
-#define SF_I4     0x30
-#define SF_I5     0x34
-#define SF_FP     0x38
-#define SF_PC     0x3c
-#define SF_RETP   0x40
-#define SF_XARG0  0x44
-#define SF_XARG1  0x48
-#define SF_XARG2  0x4c
-#define SF_XARG3  0x50
-#define SF_XARG4  0x54
-#define SF_XARG5  0x58
-#define SF_XXARG  0x5c
-
-#ifdef __KERNEL__
-
-/* global_reg_snapshot offsets */
-#define GR_SNAP_TSTATE  0x00
-#define GR_SNAP_TPC     0x08
-#define GR_SNAP_TNPC    0x10
-#define GR_SNAP_O7      0x18
-#define GR_SNAP_I7      0x20
-#define GR_SNAP_RPC     0x28
-#define GR_SNAP_THREAD  0x30
-#define GR_SNAP_PAD1    0x38
-
-#endif  /*  __KERNEL__  */
-
-/* Stuff for the ptrace system call */
-#define PTRACE_SPARC_DETACH       11
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-#define PTRACE_READDATA           16
-#define PTRACE_WRITEDATA          17
-#define PTRACE_READTEXT           18
-#define PTRACE_WRITETEXT          19
-#define PTRACE_GETFPAREGS         20
-#define PTRACE_SETFPAREGS         21
-
-/* There are for debugging 64-bit processes, either from a 32 or 64 bit
- * parent.  Thus their complements are for debugging 32-bit processes only.
- */
-
-#define PTRACE_GETREGS64          22
-#define PTRACE_SETREGS64          23
-/* PTRACE_SYSCALL is 24 */
-#define PTRACE_GETFPREGS64        25
-#define PTRACE_SETFPREGS64        26
-
-#endif /* !(_SPARC64_PTRACE_H) */
diff --git a/arch/sparc/include/asm/reg.h b/arch/sparc/include/asm/reg.h
deleted file mode 100644
index 0c16e19cae4d..000000000000
--- a/arch/sparc/include/asm/reg.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef ___ASM_SPARC_REG_H
-#define ___ASM_SPARC_REG_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/reg_64.h>
-#else
-#include <asm/reg_32.h>
-#endif
-#endif
diff --git a/arch/sparc/include/asm/reg_32.h b/arch/sparc/include/asm/reg_32.h
deleted file mode 100644
index 1efb056fb3d1..000000000000
--- a/arch/sparc/include/asm/reg_32.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * linux/include/asm/reg.h
- * Layout of the registers as expected by gdb on the Sparc
- * we should replace the user.h definitions with those in
- * this file, we don't even use the other
- * -miguel
- *
- * The names of the structures, constants and aliases in this file
- * have the same names as the sunos ones, some programs rely on these
- * names (gdb for example).
- *
- */
-
-#ifndef __SPARC_REG_H
-#define __SPARC_REG_H
-
-struct regs {
-        int     r_psr;
-#define r_ps r_psr
-        int     r_pc;
-        int     r_npc;
-        int     r_y;
-        int     r_g1;
-        int     r_g2;
-        int     r_g3;
-        int     r_g4;
-        int     r_g5;
-        int     r_g6;
-        int     r_g7;
-        int     r_o0;
-        int     r_o1;
-        int     r_o2;
-        int     r_o3;
-        int     r_o4;
-        int     r_o5;
-        int     r_o6;
-        int     r_o7;
-};
-
-struct fpq {
-        unsigned long *addr;
-        unsigned long instr;
-};
-
-struct  fq {
-        union {
-                double  whole;
-                struct  fpq fpq;
-        } FQu;
-};
-
-#define FPU_REGS_TYPE unsigned int
-#define FPU_FSR_TYPE unsigned
-
-struct fp_status {
-        union {
-                FPU_REGS_TYPE Fpu_regs[32];
-                double  Fpu_dregs[16];
-        } fpu_fr;
-        FPU_FSR_TYPE Fpu_fsr;
-        unsigned Fpu_flags;
-        unsigned Fpu_extra;
-        unsigned Fpu_qcnt;
-        struct fq Fpu_q[16];
-};
-
-#define fpu_regs  f_fpstatus.fpu_fr.Fpu_regs
-#define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs
-#define fpu_fsr   f_fpstatus.Fpu_fsr
-#define fpu_flags f_fpstatus.Fpu_flags
-#define fpu_extra f_fpstatus.Fpu_extra
-#define fpu_q     f_fpstatus.Fpu_q
-#define fpu_qcnt  f_fpstatus.Fpu_qcnt
-
-struct fpu {
-        struct fp_status f_fpstatus;
-};
-
-#endif /* __SPARC_REG_H */
diff --git a/arch/sparc/include/asm/reg_64.h b/arch/sparc/include/asm/reg_64.h
deleted file mode 100644
index 6f277d7c7d88..000000000000
--- a/arch/sparc/include/asm/reg_64.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * linux/asm/reg.h
- * Layout of the registers as expected by gdb on the Sparc
- * we should replace the user.h definitions with those in
- * this file, we don't even use the other
- * -miguel
- *
- * The names of the structures, constants and aliases in this file
- * have the same names as the sunos ones, some programs rely on these
- * names (gdb for example).
- *
- */
-
-#ifndef __SPARC64_REG_H
-#define __SPARC64_REG_H
-
-struct regs {
-        unsigned long r_g1;
-        unsigned long r_g2;
-        unsigned long r_g3;
-        unsigned long r_g4;
-        unsigned long r_g5;
-        unsigned long r_g6;
-        unsigned long r_g7;
-        unsigned long r_o0;
-        unsigned long r_o1;
-        unsigned long r_o2;
-        unsigned long r_o3;
-        unsigned long r_o4;
-        unsigned long r_o5;
-        unsigned long r_o6;
-        unsigned long r_o7;
-        unsigned long __pad;
-        unsigned long r_tstate;
-        unsigned long r_tpc;
-        unsigned long r_tnpc;
-        unsigned int  r_y;
-        unsigned int  r_fprs;
-};
-
-#define FPU_REGS_TYPE unsigned int
-#define FPU_FSR_TYPE unsigned long
-
-struct fp_status {
-        unsigned long fpu_fr[32];
-        unsigned long Fpu_fsr;
-};
-
-struct fpu {
-        struct fp_status f_fpstatus;
-};
-
-#define fpu_regs  f_fpstatus.fpu_fr
-#define fpu_fsr   f_fpstatus.Fpu_fsr
-
-#endif /* __SPARC64_REG_H */
diff --git a/arch/sparc/include/asm/scatterlist.h b/arch/sparc/include/asm/scatterlist.h
index ec21a4517641..e580f5581c88 100644
--- a/arch/sparc/include/asm/scatterlist.h
+++ b/arch/sparc/include/asm/scatterlist.h
@@ -1,8 +1,27 @@
-#ifndef ___ASM_SPARC_SCATTERLIST_H
-#define ___ASM_SPARC_SCATTERLIST_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/scatterlist_64.h>
-#else
-#include <asm/scatterlist_32.h>
-#endif
+#ifndef _SPARC_SCATTERLIST_H
+#define _SPARC_SCATTERLIST_H
+
+#include <asm/page.h>
+#include <asm/types.h>
+
+struct scatterlist {
+#ifdef CONFIG_DEBUG_SG
+        unsigned long   sg_magic;
 #endif
+        unsigned long   page_link;
+        unsigned int    offset;
+
+        unsigned int    length;
+
+        dma_addr_t      dma_address;
+        __u32           dma_length;
+};
+
+#define sg_dma_address(sg)      ((sg)->dma_address)
+#define sg_dma_len(sg)          ((sg)->dma_length)
+
+#define ISA_DMA_THRESHOLD       (~0UL)
+
+#define ARCH_HAS_SG_CHAIN
+
+#endif /* !(_SPARC_SCATTERLIST_H) */
diff --git a/arch/sparc/include/asm/scatterlist_32.h b/arch/sparc/include/asm/scatterlist_32.h
deleted file mode 100644
index c82609ca1d0f..000000000000
--- a/arch/sparc/include/asm/scatterlist_32.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef _SPARC_SCATTERLIST_H
-#define _SPARC_SCATTERLIST_H
-
-#include <linux/types.h>
-
-struct scatterlist {
-#ifdef CONFIG_DEBUG_SG
-        unsigned long sg_magic;
-#endif
-        unsigned long page_link;
-        unsigned int offset;
-
-        unsigned int length;
-
-        __u32 dvma_address; /* A place to hang host-specific addresses at. */
-        __u32 dvma_length;
-};
-
-#define sg_dma_address(sg) ((sg)->dvma_address)
-#define sg_dma_len(sg)     ((sg)->dvma_length)
-
-#define ISA_DMA_THRESHOLD (~0UL)
-
-#define ARCH_HAS_SG_CHAIN
-
-#endif /* !(_SPARC_SCATTERLIST_H) */
diff --git a/arch/sparc/include/asm/scatterlist_64.h b/arch/sparc/include/asm/scatterlist_64.h
deleted file mode 100644
index 81bd058f9382..000000000000
--- a/arch/sparc/include/asm/scatterlist_64.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef _SPARC64_SCATTERLIST_H
-#define _SPARC64_SCATTERLIST_H
-
-#include <asm/page.h>
-#include <asm/types.h>
-
-struct scatterlist {
-#ifdef CONFIG_DEBUG_SG
-        unsigned long   sg_magic;
-#endif
-        unsigned long   page_link;
-        unsigned int    offset;
-
-        unsigned int    length;
-
-        dma_addr_t      dma_address;
-        __u32           dma_length;
-};
-
-#define sg_dma_address(sg)      ((sg)->dma_address)
-#define sg_dma_len(sg)          ((sg)->dma_length)
-
-#define ISA_DMA_THRESHOLD       (~0UL)
-
-#define ARCH_HAS_SG_CHAIN
-
-#endif /* !(_SPARC64_SCATTERLIST_H) */
diff --git a/arch/sparc/include/asm/sections.h b/arch/sparc/include/asm/sections.h
index c7c69b00967f..0b0553bbd8a0 100644
--- a/arch/sparc/include/asm/sections.h
+++ b/arch/sparc/include/asm/sections.h
@@ -1,8 +1,10 @@
-#ifndef ___ASM_SPARC_SECTIONS_H
-#define ___ASM_SPARC_SECTIONS_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/sections_64.h>
-#else
-#include <asm/sections_32.h>
-#endif
+#ifndef __SPARC_SECTIONS_H
+#define __SPARC_SECTIONS_H
+
+/* nothing to see, move along */
+#include <asm-generic/sections.h>
+
+/* sparc entry point */
+extern char _start[];
+
 #endif
diff --git a/arch/sparc/include/asm/sections_32.h b/arch/sparc/include/asm/sections_32.h
deleted file mode 100644
index 6832841df051..000000000000
--- a/arch/sparc/include/asm/sections_32.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _SPARC_SECTIONS_H
-#define _SPARC_SECTIONS_H
-
-#include <asm-generic/sections.h>
-
-#endif
diff --git a/arch/sparc/include/asm/sections_64.h b/arch/sparc/include/asm/sections_64.h
deleted file mode 100644
index 3f4b9fdc28d0..000000000000
--- a/arch/sparc/include/asm/sections_64.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef _SPARC64_SECTIONS_H
-#define _SPARC64_SECTIONS_H
-
-/* nothing to see, move along */
-#include <asm-generic/sections.h>
-
-extern char _start[];
-
-#endif
diff --git a/arch/sparc/include/asm/sigcontext.h b/arch/sparc/include/asm/sigcontext.h
index e92de7e286b5..a1607d180354 100644
--- a/arch/sparc/include/asm/sigcontext.h
+++ b/arch/sparc/include/asm/sigcontext.h
@@ -1,8 +1,96 @@
-#ifndef ___ASM_SPARC_SIGCONTEXT_H
-#define ___ASM_SPARC_SIGCONTEXT_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/sigcontext_64.h>
+#ifndef __SPARC_SIGCONTEXT_H
+#define __SPARC_SIGCONTEXT_H
+
+#ifdef __KERNEL__
+#include <asm/ptrace.h>
+
+#ifndef __ASSEMBLY__
+
+#define __SUNOS_MAXWIN   31
+
+/* This is what SunOS does, so shall I unless we use new 32bit signals or rt signals. */
+struct sigcontext32 {
+        int sigc_onstack;      /* state to restore */
+        int sigc_mask;         /* sigmask to restore */
+        int sigc_sp;           /* stack pointer */
+        int sigc_pc;           /* program counter */
+        int sigc_npc;          /* next program counter */
+        int sigc_psr;          /* for condition codes etc */
+        int sigc_g1;           /* User uses these two registers */
+        int sigc_o0;           /* within the trampoline code. */
+
+        /* Now comes information regarding the users window set
+         * at the time of the signal.
+         */
+        int sigc_oswins;       /* outstanding windows */
+
+        /* stack ptrs for each regwin buf */
+        unsigned sigc_spbuf[__SUNOS_MAXWIN];
+
+        /* Windows to restore after signal */
+        struct reg_window32 sigc_wbuf[__SUNOS_MAXWIN];
+};
+
+
+/* This is what we use for 32bit new non-rt signals. */
+
+typedef struct {
+        struct {
+                unsigned int psr;
+                unsigned int pc;
+                unsigned int npc;
+                unsigned int y;
+                unsigned int u_regs[16]; /* globals and ins */
+        }                       si_regs;
+        int                     si_mask;
+} __siginfo32_t;
+
+#ifdef CONFIG_SPARC64
+typedef struct {
+        unsigned   int si_float_regs [64];
+        unsigned   long si_fsr;
+        unsigned   long si_gsr;
+        unsigned   long si_fprs;
+} __siginfo_fpu_t;
+
+/* This is what SunOS doesn't, so we have to write this alone
+   and do it properly. */
+struct sigcontext {
+        /* The size of this array has to match SI_MAX_SIZE from siginfo.h */
+        char                    sigc_info[128];
+        struct {
+                unsigned long   u_regs[16]; /* globals and ins */
+                unsigned long   tstate;
+                unsigned long   tpc;
+                unsigned long   tnpc;
+                unsigned int    y;
+                unsigned int    fprs;
+        }                       sigc_regs;
+        __siginfo_fpu_t *       sigc_fpu_save;
+        struct {
+                void    *       ss_sp;
+                int             ss_flags;
+                unsigned long   ss_size;
+        }                       sigc_stack;
+        unsigned long           sigc_mask;
+};
+
 #else
-#include <asm/sigcontext_32.h>
-#endif
-#endif
+
+typedef struct {
+        unsigned long si_float_regs [32];
+        unsigned long si_fsr;
+        unsigned long si_fpqdepth;
+        struct {
+                unsigned long *insn_addr;
+                unsigned long insn;
+        } si_fpqueue [16];
+} __siginfo_fpu_t;
+#endif /* (CONFIG_SPARC64) */
+
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* (__KERNEL__) */
+
+#endif /* !(__SPARC_SIGCONTEXT_H) */
diff --git a/arch/sparc/include/asm/sigcontext_32.h b/arch/sparc/include/asm/sigcontext_32.h
deleted file mode 100644
index c5fb60dcbd75..000000000000
--- a/arch/sparc/include/asm/sigcontext_32.h
+++ /dev/null
@@ -1,62 +0,0 @@
-#ifndef __SPARC_SIGCONTEXT_H
-#define __SPARC_SIGCONTEXT_H
-
-#ifdef __KERNEL__
-#include <asm/ptrace.h>
-
-#ifndef __ASSEMBLY__
-
-#define __SUNOS_MAXWIN   31
-
-/* This is what SunOS does, so shall I. */
-struct sigcontext {
-        int sigc_onstack;      /* state to restore */
-        int sigc_mask;         /* sigmask to restore */
-        int sigc_sp;           /* stack pointer */
-        int sigc_pc;           /* program counter */
-        int sigc_npc;          /* next program counter */
-        int sigc_psr;          /* for condition codes etc */
-        int sigc_g1;           /* User uses these two registers */
-        int sigc_o0;           /* within the trampoline code. */
-
-        /* Now comes information regarding the users window set
-         * at the time of the signal.
-         */
-        int sigc_oswins;       /* outstanding windows */
-
-        /* stack ptrs for each regwin buf */
-        char *sigc_spbuf[__SUNOS_MAXWIN];
-
-        /* Windows to restore after signal */
-        struct {
-                unsigned long   locals[8];
-                unsigned long   ins[8];
-        } sigc_wbuf[__SUNOS_MAXWIN];
-};
-
-typedef struct {
-        struct {
-                unsigned long psr;
-                unsigned long pc;
-                unsigned long npc;
-                unsigned long y;
-                unsigned long u_regs[16]; /* globals and ins */
-        }               si_regs;
-        int             si_mask;
-} __siginfo_t;
-
-typedef struct {
-        unsigned   long si_float_regs [32];
-        unsigned   long si_fsr;
-        unsigned   long si_fpqdepth;
-        struct {
-                unsigned long *insn_addr;
-                unsigned long insn;
-        } si_fpqueue [16];
-} __siginfo_fpu_t;
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* (__KERNEL__) */
-
-#endif /* !(__SPARC_SIGCONTEXT_H) */
diff --git a/arch/sparc/include/asm/sigcontext_64.h b/arch/sparc/include/asm/sigcontext_64.h
deleted file mode 100644
index 1c868d680cfc..000000000000
--- a/arch/sparc/include/asm/sigcontext_64.h
+++ /dev/null
@@ -1,87 +0,0 @@
-#ifndef __SPARC64_SIGCONTEXT_H
-#define __SPARC64_SIGCONTEXT_H
-
-#ifdef __KERNEL__
-#include <asm/ptrace.h>
-#endif
-
-#ifndef __ASSEMBLY__
-
-#ifdef __KERNEL__
-
-#define __SUNOS_MAXWIN   31
-
-/* This is what SunOS does, so shall I unless we use new 32bit signals or rt signals. */
-struct sigcontext32 {
-        int sigc_onstack;      /* state to restore */
-        int sigc_mask;         /* sigmask to restore */
-        int sigc_sp;           /* stack pointer */
-        int sigc_pc;           /* program counter */
-        int sigc_npc;          /* next program counter */
-        int sigc_psr;          /* for condition codes etc */
-        int sigc_g1;           /* User uses these two registers */
-        int sigc_o0;           /* within the trampoline code. */
-
-        /* Now comes information regarding the users window set
-         * at the time of the signal.
-         */
-        int sigc_oswins;       /* outstanding windows */
-
-        /* stack ptrs for each regwin buf */
-        unsigned sigc_spbuf[__SUNOS_MAXWIN];
-
-        /* Windows to restore after signal */
-        struct reg_window32 sigc_wbuf[__SUNOS_MAXWIN];
-};
-
-#endif
-
-#ifdef __KERNEL__
-
-/* This is what we use for 32bit new non-rt signals. */
-
-typedef struct {
-        struct {
-                unsigned int psr;
-                unsigned int pc;
-                unsigned int npc;
-                unsigned int y;
-                unsigned int u_regs[16]; /* globals and ins */
-        }                       si_regs;
-        int                     si_mask;
-} __siginfo32_t;
-
-#endif
-
-typedef struct {
-        unsigned   int si_float_regs [64];
-        unsigned   long si_fsr;
-        unsigned   long si_gsr;
-        unsigned   long si_fprs;
-} __siginfo_fpu_t;
-
-/* This is what SunOS doesn't, so we have to write this alone
-   and do it properly. */
-struct sigcontext {
-        /* The size of this array has to match SI_MAX_SIZE from siginfo.h */
-        char                    sigc_info[128];
-        struct {
-                unsigned long   u_regs[16]; /* globals and ins */
-                unsigned long   tstate;
-                unsigned long   tpc;
-                unsigned long   tnpc;
-                unsigned int    y;
-                unsigned int    fprs;
-        }                       sigc_regs;
-        __siginfo_fpu_t *       sigc_fpu_save;
-        struct {
-                void    *       ss_sp;
-                int             ss_flags;
-                unsigned long   ss_size;
-        }                       sigc_stack;
-        unsigned long           sigc_mask;
-};
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC64_SIGCONTEXT_H) */
diff --git a/arch/sparc/include/asm/siginfo.h b/arch/sparc/include/asm/siginfo.h
index bd81f8d7f5ce..988e5d8ed11a 100644
--- a/arch/sparc/include/asm/siginfo.h
+++ b/arch/sparc/include/asm/siginfo.h
@@ -1,8 +1,37 @@
-#ifndef ___ASM_SPARC_SIGINFO_H
-#define ___ASM_SPARC_SIGINFO_H
+#ifndef __SPARC_SIGINFO_H
+#define __SPARC_SIGINFO_H
+
 #if defined(__sparc__) && defined(__arch64__)
-#include <asm/siginfo_64.h>
-#else
-#include <asm/siginfo_32.h>
-#endif
-#endif
+
+#define SI_PAD_SIZE32   ((SI_MAX_SIZE/sizeof(int)) - 3)
+#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+#define __ARCH_SI_BAND_T int
+
+#endif /* defined(__sparc__) && defined(__arch64__) */
+
+
+#define __ARCH_SI_TRAPNO
+
+#include <asm-generic/siginfo.h>
+
+#ifdef __KERNEL__
+
+#include <linux/compat.h>
+
+#ifdef CONFIG_COMPAT
+
+struct compat_siginfo;
+
+#endif /* CONFIG_COMPAT */
+
+#endif /* __KERNEL__ */
+
+#define SI_NOINFO       32767           /* no information in siginfo_t */
+
+/*
+ * SIGEMT si_codes
+ */
+#define EMT_TAGOVF      (__SI_FAULT|1)  /* tag overflow */
+#define NSIGEMT         1
+
+#endif /* !(__SPARC_SIGINFO_H) */
diff --git a/arch/sparc/include/asm/siginfo_32.h b/arch/sparc/include/asm/siginfo_32.h
deleted file mode 100644
index 3c71af135c52..000000000000
--- a/arch/sparc/include/asm/siginfo_32.h
+++ /dev/null
@@ -1,17 +0,0 @@
-#ifndef _SPARC_SIGINFO_H
-#define _SPARC_SIGINFO_H
-
-#define __ARCH_SI_UID_T         unsigned int
-#define __ARCH_SI_TRAPNO
-
-#include <asm-generic/siginfo.h>
-
-#define SI_NOINFO       32767           /* no information in siginfo_t */
-
-/*
- * SIGEMT si_codes
- */
-#define EMT_TAGOVF      (__SI_FAULT|1)  /* tag overflow */
-#define NSIGEMT         1
-
-#endif /* !(_SPARC_SIGINFO_H) */
diff --git a/arch/sparc/include/asm/siginfo_64.h b/arch/sparc/include/asm/siginfo_64.h
deleted file mode 100644
index c96e6c30f8b0..000000000000
--- a/arch/sparc/include/asm/siginfo_64.h
+++ /dev/null
@@ -1,32 +0,0 @@
-#ifndef _SPARC64_SIGINFO_H
-#define _SPARC64_SIGINFO_H
-
-#define SI_PAD_SIZE32   ((SI_MAX_SIZE/sizeof(int)) - 3)
-
-#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
-#define __ARCH_SI_TRAPNO
-#define __ARCH_SI_BAND_T int
-
-#include <asm-generic/siginfo.h>
-
-#ifdef __KERNEL__
-
-#include <linux/compat.h>
-
-#ifdef CONFIG_COMPAT
-
-struct compat_siginfo;
-
-#endif /* CONFIG_COMPAT */
-
-#endif /* __KERNEL__ */
-
-#define SI_NOINFO       32767           /* no information in siginfo_t */
-
-/*
- * SIGEMT si_codes
- */
-#define EMT_TAGOVF      (__SI_FAULT|1)  /* tag overflow */
-#define NSIGEMT         1
-
-#endif
diff --git a/arch/sparc/include/asm/signal.h b/arch/sparc/include/asm/signal.h
index 27ab05dc203e..41535e77b255 100644
--- a/arch/sparc/include/asm/signal.h
+++ b/arch/sparc/include/asm/signal.h
@@ -1,8 +1,210 @@
-#ifndef ___ASM_SPARC_SIGNAL_H
-#define ___ASM_SPARC_SIGNAL_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/signal_64.h>
+#ifndef __SPARC_SIGNAL_H
+#define __SPARC_SIGNAL_H
+
+#include <asm/sigcontext.h>
+#include <linux/compiler.h>
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+#include <linux/personality.h>
+#include <linux/types.h>
+#endif
+#endif
+
+/* On the Sparc the signal handlers get passed a 'sub-signal' code
+ * for certain signal types, which we document here.
+ */
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define    SUBSIG_STACK       0
+#define    SUBSIG_ILLINST     2
+#define    SUBSIG_PRIVINST    3
+#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
+
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+
+#define SIGEMT           7
+#define    SUBSIG_TAG    10
+
+#define SIGFPE           8
+#define    SUBSIG_FPDISABLED     0x400
+#define    SUBSIG_FPERROR        0x404
+#define    SUBSIG_FPINTOVFL      0x001
+#define    SUBSIG_FPSTSIG        0x002
+#define    SUBSIG_IDIVZERO       0x014
+#define    SUBSIG_FPINEXACT      0x0c4
+#define    SUBSIG_FPDIVZERO      0x0c8
+#define    SUBSIG_FPUNFLOW       0x0cc
+#define    SUBSIG_FPOPERROR      0x0d0
+#define    SUBSIG_FPOVFLOW       0x0d4
+
+#define SIGKILL          9
+#define SIGBUS          10
+#define    SUBSIG_BUSTIMEOUT    1
+#define    SUBSIG_ALIGNMENT     2
+#define    SUBSIG_MISCERROR     5
+
+#define SIGSEGV         11
+#define    SUBSIG_NOMAPPING     3
+#define    SUBSIG_PROTECTION    4
+#define    SUBSIG_SEGERROR      5
+
+#define SIGSYS          12
+
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGURG          16
+
+/* SunOS values which deviate from the Linux/i386 ones */
+#define SIGSTOP         17
+#define SIGTSTP         18
+#define SIGCONT         19
+#define SIGCHLD         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGIO           23
+#define SIGPOLL         SIGIO   /* SysV name for SIGIO */
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGLOST         29
+#define SIGPWR          SIGLOST
+#define SIGUSR1         30
+#define SIGUSR2         31
+
+/* Most things should be clean enough to redefine this at will, if care
+   is taken to make libc match.  */
+
+#define __OLD_NSIG      32
+#define __NEW_NSIG      64
+#define _NSIG_BPW       64
+#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
+
+#define SIGRTMIN       32
+#define SIGRTMAX       __NEW_NSIG
+
+#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
+#define _NSIG                   __NEW_NSIG
+#define __new_sigset_t          sigset_t
+#define __new_sigaction         sigaction
+#define __new_sigaction32       sigaction32
+#define __old_sigset_t          old_sigset_t
+#define __old_sigaction         old_sigaction
+#define __old_sigaction32       old_sigaction32
 #else
-#include <asm/signal_32.h>
+#define _NSIG                   __OLD_NSIG
+#define NSIG                    _NSIG
+#define __old_sigset_t          sigset_t
+#define __old_sigaction         sigaction
+#define __old_sigaction32       sigaction32
 #endif
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long __old_sigset_t;            /* at least 32 bits */
+
+typedef struct {
+       unsigned long sig[_NSIG_WORDS];
+} __new_sigset_t;
+
+/* A SunOS sigstack */
+struct sigstack {
+        /* XXX 32-bit pointers pinhead XXX */
+        char *the_stack;
+        int   cur_status;
+};
+
+/* Sigvec flags */
+#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
+#define _SV_INTR      2u    /* Sig return should not restart system call */
+#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
+#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
+
+/*
+ * sa_flags values: SA_STACK is not currently supported, but will allow the
+ * usage of signal stacks by using the (now obsolete) sa_restorer field in
+ * the sigaction structure as a stack pointer. This is now possible due to
+ * the changes in signal handling. LBT 010493.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ */
+#define SA_NOCLDSTOP    _SV_IGNCHILD
+#define SA_STACK        _SV_SSTACK
+#define SA_ONSTACK      _SV_SSTACK
+#define SA_RESTART      _SV_INTR
+#define SA_ONESHOT      _SV_RESET
+#define SA_NOMASK       0x20u
+#define SA_NOCLDWAIT    0x100u
+#define SA_SIGINFO      0x200u
+
+
+#define SIG_BLOCK          0x01 /* for blocking signals */
+#define SIG_UNBLOCK        0x02 /* for unblocking signals */
+#define SIG_SETMASK        0x04 /* for setting the signal mask */
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     4096
+#define SIGSTKSZ        16384
+
+#ifdef __KERNEL__
+/*
+ * DJHR
+ * SA_STATIC_ALLOC is used for the sparc32 system to indicate that this
+ * interrupt handler's irq structure should be statically allocated
+ * by the request_irq routine.
+ * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge
+ * of interrupt usage and that sucks. Also without a flag like this
+ * it may be possible for the free_irq routine to attempt to free
+ * statically allocated data.. which is NOT GOOD.
+ *
+ */
+#define SA_STATIC_ALLOC         0x8000
 #endif
+
+#include <asm-generic/signal.h>
+
+struct __new_sigaction {
+        __sighandler_t          sa_handler;
+        unsigned long           sa_flags;
+        __sigrestore_t          sa_restorer;  /* not used by Linux/SPARC yet */
+        __new_sigset_t          sa_mask;
+};
+
+struct __old_sigaction {
+        __sighandler_t          sa_handler;
+        __old_sigset_t          sa_mask;
+        unsigned long           sa_flags;
+        void                    (*sa_restorer)(void);  /* not used by Linux/SPARC yet */
+};
+
+typedef struct sigaltstack {
+        void                    __user *ss_sp;
+        int                     ss_flags;
+        size_t                  ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+
+struct k_sigaction {
+        struct                  __new_sigaction sa;
+        void                    __user *ka_restorer;
+};
+
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* !(__KERNEL__) */
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(__SPARC_SIGNAL_H) */
diff --git a/arch/sparc/include/asm/signal_32.h b/arch/sparc/include/asm/signal_32.h
deleted file mode 100644
index 96a60ab03ca1..000000000000
--- a/arch/sparc/include/asm/signal_32.h
+++ /dev/null
@@ -1,207 +0,0 @@
-#ifndef _ASMSPARC_SIGNAL_H
-#define _ASMSPARC_SIGNAL_H
-
-#include <asm/sigcontext.h>
-#include <linux/compiler.h>
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-#include <linux/personality.h>
-#include <linux/types.h>
-#endif
-#endif
-
-/* On the Sparc the signal handlers get passed a 'sub-signal' code
- * for certain signal types, which we document here.
- */
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define    SUBSIG_STACK       0
-#define    SUBSIG_ILLINST     2
-#define    SUBSIG_PRIVINST    3
-#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
-
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-
-#define SIGEMT           7
-#define    SUBSIG_TAG    10
-
-#define SIGFPE           8
-#define    SUBSIG_FPDISABLED     0x400
-#define    SUBSIG_FPERROR        0x404
-#define    SUBSIG_FPINTOVFL      0x001
-#define    SUBSIG_FPSTSIG        0x002
-#define    SUBSIG_IDIVZERO       0x014
-#define    SUBSIG_FPINEXACT      0x0c4
-#define    SUBSIG_FPDIVZERO      0x0c8
-#define    SUBSIG_FPUNFLOW       0x0cc
-#define    SUBSIG_FPOPERROR      0x0d0
-#define    SUBSIG_FPOVFLOW       0x0d4
-
-#define SIGKILL          9
-#define SIGBUS          10
-#define    SUBSIG_BUSTIMEOUT    1
-#define    SUBSIG_ALIGNMENT     2
-#define    SUBSIG_MISCERROR     5
-
-#define SIGSEGV         11
-#define    SUBSIG_NOMAPPING     3
-#define    SUBSIG_PROTECTION    4
-#define    SUBSIG_SEGERROR      5
-
-#define SIGSYS          12
-
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGURG          16
-
-/* SunOS values which deviate from the Linux/i386 ones */
-#define SIGSTOP         17
-#define SIGTSTP         18
-#define SIGCONT         19
-#define SIGCHLD         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGIO           23
-#define SIGPOLL         SIGIO   /* SysV name for SIGIO */
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGLOST         29
-#define SIGPWR          SIGLOST
-#define SIGUSR1         30
-#define SIGUSR2         31
-
-/* Most things should be clean enough to redefine this at will, if care
- * is taken to make libc match.
- */
-
-#define __OLD_NSIG      32
-#define __NEW_NSIG      64
-#define _NSIG_BPW       32
-#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
-
-#define SIGRTMIN        32
-#define SIGRTMAX        __NEW_NSIG
-
-#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
-#define _NSIG           __NEW_NSIG
-#define __new_sigset_t  sigset_t
-#define __new_sigaction sigaction
-#define __old_sigset_t  old_sigset_t
-#define __old_sigaction old_sigaction
-#else
-#define _NSIG           __OLD_NSIG
-#define __old_sigset_t  sigset_t
-#define __old_sigaction sigaction
-#endif
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned long __old_sigset_t;
-
-typedef struct {
-        unsigned long   sig[_NSIG_WORDS];
-} __new_sigset_t;
-
-
-#ifdef __KERNEL__
-/* A SunOS sigstack */
-struct sigstack {
-        char *the_stack;
-        int   cur_status;
-};
-#endif
-
-/* Sigvec flags */
-#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
-#define _SV_INTR      2u    /* Sig return should not restart system call */
-#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
-#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
-
-/*
- * sa_flags values: SA_STACK is not currently supported, but will allow the
- * usage of signal stacks by using the (now obsolete) sa_restorer field in
- * the sigaction structure as a stack pointer. This is now possible due to
- * the changes in signal handling. LBT 010493.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- */
-#define SA_NOCLDSTOP    _SV_IGNCHILD
-#define SA_STACK        _SV_SSTACK
-#define SA_ONSTACK      _SV_SSTACK
-#define SA_RESTART      _SV_INTR
-#define SA_ONESHOT      _SV_RESET
-#define SA_NOMASK       0x20u
-#define SA_NOCLDWAIT    0x100u
-#define SA_SIGINFO      0x200u
-
-#define SIG_BLOCK          0x01 /* for blocking signals */
-#define SIG_UNBLOCK        0x02 /* for unblocking signals */
-#define SIG_SETMASK        0x04 /* for setting the signal mask */
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     4096
-#define SIGSTKSZ        16384
-
-#ifdef __KERNEL__
-/*
- * DJHR
- * SA_STATIC_ALLOC is used for the SPARC system to indicate that this
- * interrupt handler's irq structure should be statically allocated
- * by the request_irq routine.
- * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge
- * of interrupt usage and that sucks. Also without a flag like this
- * it may be possible for the free_irq routine to attempt to free
- * statically allocated data.. which is NOT GOOD.
- *
- */
-#define SA_STATIC_ALLOC         0x8000
-#endif
-
-#include <asm-generic/signal.h>
-
-#ifdef __KERNEL__
-struct __new_sigaction {
-        __sighandler_t  sa_handler;
-        unsigned long   sa_flags;
-        void            (*sa_restorer)(void);   /* Not used by Linux/SPARC */
-        __new_sigset_t  sa_mask;
-};
-
-struct k_sigaction {
-        struct __new_sigaction  sa;
-        void                    __user *ka_restorer;
-};
-
-struct __old_sigaction {
-        __sighandler_t  sa_handler;
-        __old_sigset_t  sa_mask;
-        unsigned long   sa_flags;
-        void            (*sa_restorer) (void);  /* not used by Linux/SPARC */
-};
-
-typedef struct sigaltstack {
-        void            __user *ss_sp;
-        int             ss_flags;
-        size_t          ss_size;
-} stack_t;
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#endif /* !(__KERNEL__) */
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(_ASMSPARC_SIGNAL_H) */
diff --git a/arch/sparc/include/asm/signal_64.h b/arch/sparc/include/asm/signal_64.h
deleted file mode 100644
index ab1509a101c5..000000000000
--- a/arch/sparc/include/asm/signal_64.h
+++ /dev/null
@@ -1,194 +0,0 @@
-#ifndef _ASMSPARC64_SIGNAL_H
-#define _ASMSPARC64_SIGNAL_H
-
-#include <asm/sigcontext.h>
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-#include <linux/personality.h>
-#include <linux/types.h>
-#endif
-#endif
-
-/* On the Sparc the signal handlers get passed a 'sub-signal' code
- * for certain signal types, which we document here.
- */
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define    SUBSIG_STACK       0
-#define    SUBSIG_ILLINST     2
-#define    SUBSIG_PRIVINST    3
-#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
-
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-
-#define SIGEMT           7
-#define    SUBSIG_TAG    10
-
-#define SIGFPE           8
-#define    SUBSIG_FPDISABLED     0x400
-#define    SUBSIG_FPERROR        0x404
-#define    SUBSIG_FPINTOVFL      0x001
-#define    SUBSIG_FPSTSIG        0x002
-#define    SUBSIG_IDIVZERO       0x014
-#define    SUBSIG_FPINEXACT      0x0c4
-#define    SUBSIG_FPDIVZERO      0x0c8
-#define    SUBSIG_FPUNFLOW       0x0cc
-#define    SUBSIG_FPOPERROR      0x0d0
-#define    SUBSIG_FPOVFLOW       0x0d4
-
-#define SIGKILL          9
-#define SIGBUS          10
-#define    SUBSIG_BUSTIMEOUT    1
-#define    SUBSIG_ALIGNMENT     2
-#define    SUBSIG_MISCERROR     5
-
-#define SIGSEGV         11
-#define    SUBSIG_NOMAPPING     3
-#define    SUBSIG_PROTECTION    4
-#define    SUBSIG_SEGERROR      5
-
-#define SIGSYS          12
-
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGURG          16
-
-/* SunOS values which deviate from the Linux/i386 ones */
-#define SIGSTOP         17
-#define SIGTSTP         18
-#define SIGCONT         19
-#define SIGCHLD         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGIO           23
-#define SIGPOLL         SIGIO   /* SysV name for SIGIO */
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGLOST         29
-#define SIGPWR          SIGLOST
-#define SIGUSR1         30
-#define SIGUSR2         31
-
-/* Most things should be clean enough to redefine this at will, if care
-   is taken to make libc match.  */
-
-#define __OLD_NSIG      32
-#define __NEW_NSIG      64
-#define _NSIG_BPW       64
-#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
-
-#define SIGRTMIN       32
-#define SIGRTMAX       __NEW_NSIG
-
-#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
-#define _NSIG                   __NEW_NSIG
-#define __new_sigset_t          sigset_t
-#define __new_sigaction         sigaction
-#define __new_sigaction32       sigaction32
-#define __old_sigset_t          old_sigset_t
-#define __old_sigaction         old_sigaction
-#define __old_sigaction32       old_sigaction32
-#else
-#define _NSIG                   __OLD_NSIG
-#define NSIG                    _NSIG
-#define __old_sigset_t          sigset_t
-#define __old_sigaction         sigaction
-#define __old_sigaction32       sigaction32
-#endif
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned long __old_sigset_t;            /* at least 32 bits */
-
-typedef struct {
-       unsigned long sig[_NSIG_WORDS];
-} __new_sigset_t;
-
-/* A SunOS sigstack */
-struct sigstack {
-        /* XXX 32-bit pointers pinhead XXX */
-        char *the_stack;
-        int   cur_status;
-};
-
-/* Sigvec flags */
-#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
-#define _SV_INTR      2u    /* Sig return should not restart system call */
-#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
-#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
-
-/*
- * sa_flags values: SA_STACK is not currently supported, but will allow the
- * usage of signal stacks by using the (now obsolete) sa_restorer field in
- * the sigaction structure as a stack pointer. This is now possible due to
- * the changes in signal handling. LBT 010493.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- */
-#define SA_NOCLDSTOP    _SV_IGNCHILD
-#define SA_STACK        _SV_SSTACK
-#define SA_ONSTACK      _SV_SSTACK
-#define SA_RESTART      _SV_INTR
-#define SA_ONESHOT      _SV_RESET
-#define SA_NOMASK       0x20u
-#define SA_NOCLDWAIT    0x100u
-#define SA_SIGINFO      0x200u
-
-
-#define SIG_BLOCK          0x01 /* for blocking signals */
-#define SIG_UNBLOCK        0x02 /* for unblocking signals */
-#define SIG_SETMASK        0x04 /* for setting the signal mask */
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     4096
-#define SIGSTKSZ        16384
-
-#include <asm-generic/signal.h>
-
-struct __new_sigaction {
-        __sighandler_t          sa_handler;
-        unsigned long           sa_flags;
-        __sigrestore_t          sa_restorer;  /* not used by Linux/SPARC yet */
-        __new_sigset_t          sa_mask;
-};
-
-struct __old_sigaction {
-        __sighandler_t          sa_handler;
-        __old_sigset_t          sa_mask;
-        unsigned long           sa_flags;
-        void                    (*sa_restorer)(void);     /* not used by Linux/SPARC yet */
-};
-
-typedef struct sigaltstack {
-        void                    __user *ss_sp;
-        int                     ss_flags;
-        size_t                  ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-
-struct k_sigaction {
-        struct __new_sigaction  sa;
-        void __user             *ka_restorer;
-};
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#endif /* !(__KERNEL__) */
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(_ASMSPARC64_SIGNAL_H) */
diff --git a/arch/sparc/include/asm/smp_32.h b/arch/sparc/include/asm/smp_32.h
index a8180e546a48..58101dc70493 100644
--- a/arch/sparc/include/asm/smp_32.h
+++ b/arch/sparc/include/asm/smp_32.h
@@ -29,8 +29,6 @@
  */
 
 extern unsigned char boot_cpu_id;
-extern cpumask_t phys_cpu_present_map;
-#define cpu_possible_map phys_cpu_present_map
 
 typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
                        unsigned long, unsigned long);
@@ -172,7 +170,4 @@ void smp_setup_cpu_possible_map(void);
 #define smp_setup_cpu_possible_map() do { } while (0)
 
 #endif /* !(SMP) */
-
-#define NO_PROC_ID            0xFF
-
 #endif /* !(_SPARC_SMP_H) */
diff --git a/arch/sparc/include/asm/spinlock_64.h b/arch/sparc/include/asm/spinlock_64.h
index 120cfe4577c7..c4d274d330e9 100644
--- a/arch/sparc/include/asm/spinlock_64.h
+++ b/arch/sparc/include/asm/spinlock_64.h
@@ -13,17 +13,12 @@
  * and rebuild your kernel.
  */
 
-/* All of these locking primitives are expected to work properly
- * even in an RMO memory model, which currently is what the kernel
- * runs in.
- *
- * There is another issue.  Because we play games to save cycles
- * in the non-contention case, we need to be extra careful about
- * branch targets into the "spinning" code.  They live in their
- * own section, but the newer V9 branches have a shorter range
- * than the traditional 32-bit sparc branch variants.  The rule
- * is that the branches that go into and out of the spinner sections
- * must be pre-V9 branches.
+/* Because we play games to save cycles in the non-contention case, we
+ * need to be extra careful about branch targets into the "spinning"
+ * code.  They live in their own section, but the newer V9 branches
+ * have a shorter range than the traditional 32-bit sparc branch
+ * variants.  The rule is that the branches that go into and out of
+ * the spinner sections must be pre-V9 branches.
  */
 
 #define __raw_spin_is_locked(lp)        ((lp)->lock != 0)
@@ -38,12 +33,10 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
 
         __asm__ __volatile__(
 "1:     ldstub          [%1], %0\n"
-"       membar          #StoreLoad | #StoreStore\n"
 "       brnz,pn         %0, 2f\n"
 "        nop\n"
 "       .subsection     2\n"
 "2:     ldub            [%1], %0\n"
-"       membar          #LoadLoad\n"
 "       brnz,pt         %0, 2b\n"
 "        nop\n"
 "       ba,a,pt         %%xcc, 1b\n"
@@ -59,7 +52,6 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
 
         __asm__ __volatile__(
 "       ldstub          [%1], %0\n"
-"       membar          #StoreLoad | #StoreStore"
         : "=r" (result)
         : "r" (lock)
         : "memory");
@@ -70,7 +62,6 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
 static inline void __raw_spin_unlock(raw_spinlock_t *lock)
 {
         __asm__ __volatile__(
-"       membar          #StoreStore | #LoadStore\n"
 "       stb             %%g0, [%0]"
         : /* No outputs */
         : "r" (lock)
@@ -83,14 +74,12 @@ static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long fla
 
         __asm__ __volatile__(
 "1:     ldstub          [%2], %0\n"
-"       membar          #StoreLoad | #StoreStore\n"
 "       brnz,pn         %0, 2f\n"
 "        nop\n"
 "       .subsection     2\n"
 "2:     rdpr            %%pil, %1\n"
 "       wrpr            %3, %%pil\n"
 "3:     ldub            [%2], %0\n"
-"       membar          #LoadLoad\n"
 "       brnz,pt         %0, 3b\n"
 "        nop\n"
 "       ba,pt           %%xcc, 1b\n"
@@ -113,12 +102,10 @@ static void inline __read_lock(raw_rwlock_t *lock)
 "4:      add            %0, 1, %1\n"
 "       cas             [%2], %0, %1\n"
 "       cmp             %0, %1\n"
-"       membar          #StoreLoad | #StoreStore\n"
 "       bne,pn          %%icc, 1b\n"
 "        nop\n"
 "       .subsection     2\n"
 "2:     ldsw            [%2], %0\n"
-"       membar          #LoadLoad\n"
 "       brlz,pt         %0, 2b\n"
 "        nop\n"
 "       ba,a,pt         %%xcc, 4b\n"
@@ -139,7 +126,6 @@ static int inline __read_trylock(raw_rwlock_t *lock)
 "       add             %0, 1, %1\n"
 "       cas             [%2], %0, %1\n"
 "       cmp             %0, %1\n"
-"       membar          #StoreLoad | #StoreStore\n"
 "       bne,pn          %%icc, 1b\n"
 "        mov            1, %0\n"
 "2:"
@@ -155,7 +141,6 @@ static void inline __read_unlock(raw_rwlock_t *lock)
         unsigned long tmp1, tmp2;
 
         __asm__ __volatile__(
-"       membar  #StoreLoad | #LoadLoad\n"
 "1:     lduw    [%2], %0\n"
 "       sub     %0, 1, %1\n"
 "       cas     [%2], %0, %1\n"
@@ -179,12 +164,10 @@ static void inline __write_lock(raw_rwlock_t *lock)
 "4:      or             %0, %3, %1\n"
 "       cas             [%2], %0, %1\n"
 "       cmp             %0, %1\n"
-"       membar          #StoreLoad | #StoreStore\n"
 "       bne,pn          %%icc, 1b\n"
 "        nop\n"
 "       .subsection     2\n"
 "2:     lduw            [%2], %0\n"
-"       membar          #LoadLoad\n"
 "       brnz,pt         %0, 2b\n"
 "        nop\n"
 "       ba,a,pt         %%xcc, 4b\n"
@@ -197,7 +180,6 @@ static void inline __write_lock(raw_rwlock_t *lock)
 static void inline __write_unlock(raw_rwlock_t *lock)
 {
         __asm__ __volatile__(
-"       membar          #LoadStore | #StoreStore\n"
 "       stw             %%g0, [%0]"
         : /* no outputs */
         : "r" (lock)
@@ -217,7 +199,6 @@ static int inline __write_trylock(raw_rwlock_t *lock)
 "        or             %0, %4, %1\n"
 "       cas             [%3], %0, %1\n"
 "       cmp             %0, %1\n"
-"       membar          #StoreLoad | #StoreStore\n"
 "       bne,pn          %%icc, 1b\n"
 "        nop\n"
 "       mov             1, %2\n"
diff --git a/arch/sparc/include/asm/spitfire.h b/arch/sparc/include/asm/spitfire.h
index 985ea7e31992..f0d0c40c44da 100644
--- a/arch/sparc/include/asm/spitfire.h
+++ b/arch/sparc/include/asm/spitfire.h
@@ -6,6 +6,8 @@
 #ifndef _SPARC64_SPITFIRE_H
 #define _SPARC64_SPITFIRE_H
 
+#ifdef CONFIG_SPARC64
+
 #include <asm/asi.h>
 
 /* The following register addresses are accessible via ASI_DMMU
@@ -338,5 +340,5 @@ static inline void cheetah_put_itlb_data(int entry, unsigned long data)
 }
 
 #endif /* !(__ASSEMBLY__) */
-
+#endif /* CONFIG_SPARC64 */
 #endif /* !(_SPARC64_SPITFIRE_H) */
diff --git a/arch/sparc/include/asm/stat.h b/arch/sparc/include/asm/stat.h
index d8153013df72..55db5eca08e2 100644
--- a/arch/sparc/include/asm/stat.h
+++ b/arch/sparc/include/asm/stat.h
@@ -1,8 +1,107 @@
-#ifndef ___ASM_SPARC_STAT_H
-#define ___ASM_SPARC_STAT_H
+#ifndef __SPARC_STAT_H
+#define __SPARC_STAT_H
+
+#include <linux/types.h>
+
 #if defined(__sparc__) && defined(__arch64__)
-#include <asm/stat_64.h>
+/* 64 bit sparc */
+struct stat {
+        unsigned   st_dev;
+        ino_t   st_ino;
+        mode_t  st_mode;
+        short   st_nlink;
+        uid_t   st_uid;
+        gid_t   st_gid;
+        unsigned   st_rdev;
+        off_t   st_size;
+        time_t  st_atime;
+        time_t  st_mtime;
+        time_t  st_ctime;
+        off_t   st_blksize;
+        off_t   st_blocks;
+        unsigned long  __unused4[2];
+};
+
+struct stat64 {
+        unsigned long   st_dev;
+        unsigned long   st_ino;
+        unsigned long   st_nlink;
+
+        unsigned int    st_mode;
+        unsigned int    st_uid;
+        unsigned int    st_gid;
+        unsigned int    __pad0;
+
+        unsigned long   st_rdev;
+        long            st_size;
+        long            st_blksize;
+        long            st_blocks;
+
+        unsigned long   st_atime;
+        unsigned long   st_atime_nsec;
+        unsigned long   st_mtime;
+        unsigned long   st_mtime_nsec;
+        unsigned long   st_ctime;
+        unsigned long   st_ctime_nsec;
+        long            __unused[3];
+};
+
 #else
-#include <asm/stat_32.h>
-#endif
-#endif
+/* 32 bit sparc */
+struct stat {
+        unsigned short  st_dev;
+        ino_t           st_ino;
+        mode_t          st_mode;
+        short           st_nlink;
+        uid_t           st_uid;
+        gid_t           st_gid;
+        unsigned short  st_rdev;
+        off_t           st_size;
+        time_t          st_atime;
+        unsigned long   st_atime_nsec;
+        time_t          st_mtime;
+        unsigned long   st_mtime_nsec;
+        time_t          st_ctime;
+        unsigned long   st_ctime_nsec;
+        off_t           st_blksize;
+        off_t           st_blocks;
+        unsigned long   __unused4[2];
+};
+
+#define STAT_HAVE_NSEC 1
+
+struct stat64 {
+        unsigned long long st_dev;
+
+        unsigned long long st_ino;
+
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned int    st_uid;
+        unsigned int    st_gid;
+
+        unsigned long long st_rdev;
+
+        unsigned char   __pad3[8];
+
+        long long       st_size;
+        unsigned int    st_blksize;
+
+        unsigned char   __pad4[8];
+        unsigned int    st_blocks;
+
+        unsigned int    st_atime;
+        unsigned int    st_atime_nsec;
+
+        unsigned int    st_mtime;
+        unsigned int    st_mtime_nsec;
+
+        unsigned int    st_ctime;
+        unsigned int    st_ctime_nsec;
+
+        unsigned int    __unused4;
+        unsigned int    __unused5;
+};
+#endif /* defined(__sparc__) && defined(__arch64__) */
+#endif /* __SPARC_STAT_H */
diff --git a/arch/sparc/include/asm/stat_32.h b/arch/sparc/include/asm/stat_32.h
deleted file mode 100644
index 2299e1d5d94c..000000000000
--- a/arch/sparc/include/asm/stat_32.h
+++ /dev/null
@@ -1,76 +0,0 @@
-#ifndef _SPARC_STAT_H
-#define _SPARC_STAT_H
-
-#include <linux/types.h>
-
-struct __old_kernel_stat {
-        unsigned short st_dev;
-        unsigned short st_ino;
-        unsigned short st_mode;
-        unsigned short st_nlink;
-        unsigned short st_uid;
-        unsigned short st_gid;
-        unsigned short st_rdev;
-        unsigned long  st_size;
-        unsigned long  st_atime;
-        unsigned long  st_mtime;
-        unsigned long  st_ctime;
-};
-
-struct stat {
-        unsigned short  st_dev;
-        unsigned long   st_ino;
-        unsigned short  st_mode;
-        short           st_nlink;
-        unsigned short  st_uid;
-        unsigned short  st_gid;
-        unsigned short  st_rdev;
-        long            st_size;
-        long            st_atime;
-        unsigned long   st_atime_nsec;
-        long            st_mtime;
-        unsigned long   st_mtime_nsec;
-        long            st_ctime;
-        unsigned long   st_ctime_nsec;
-        long            st_blksize;
-        long            st_blocks;
-        unsigned long   __unused4[2];
-};
-
-#define STAT_HAVE_NSEC 1
-
-struct stat64 {
-        unsigned long long st_dev;
-
-        unsigned long long st_ino;
-
-        unsigned int    st_mode;
-        unsigned int    st_nlink;
-
-        unsigned int    st_uid;
-        unsigned int    st_gid;
-
-        unsigned long long st_rdev;
-
-        unsigned char   __pad3[8];
-
-        long long       st_size;
-        unsigned int    st_blksize;
-
-        unsigned char   __pad4[8];
-        unsigned int    st_blocks;
-
-        unsigned int    st_atime;
-        unsigned int    st_atime_nsec;
-
-        unsigned int    st_mtime;
-        unsigned int    st_mtime_nsec;
-
-        unsigned int    st_ctime;
-        unsigned int    st_ctime_nsec;
-
-        unsigned int    __unused4;
-        unsigned int    __unused5;
-};
-
-#endif
diff --git a/arch/sparc/include/asm/stat_64.h b/arch/sparc/include/asm/stat_64.h
deleted file mode 100644
index 9650fdea847f..000000000000
--- a/arch/sparc/include/asm/stat_64.h
+++ /dev/null
@@ -1,47 +0,0 @@
-#ifndef _SPARC64_STAT_H
-#define _SPARC64_STAT_H
-
-#include <linux/types.h>
-
-struct stat {
-        unsigned   st_dev;
-        ino_t   st_ino;
-        mode_t  st_mode;
-        short   st_nlink;
-        uid_t   st_uid;
-        gid_t   st_gid;
-        unsigned   st_rdev;
-        off_t   st_size;
-        time_t  st_atime;
-        time_t  st_mtime;
-        time_t  st_ctime;
-        off_t   st_blksize;
-        off_t   st_blocks;
-        unsigned long  __unused4[2];
-};
-
-struct stat64 {
-        unsigned long   st_dev;
-        unsigned long   st_ino;
-        unsigned long   st_nlink;
-
-        unsigned int    st_mode;
-        unsigned int    st_uid;
-        unsigned int    st_gid;
-        unsigned int    __pad0;
-
-        unsigned long   st_rdev;
-        long            st_size;
-        long            st_blksize;
-        long            st_blocks;
-
-        unsigned long   st_atime;
-        unsigned long   st_atime_nsec;
-        unsigned long   st_mtime;
-        unsigned long   st_mtime_nsec;
-        unsigned long   st_ctime;
-        unsigned long   st_ctime_nsec;
-        long            __unused[3];
-};
-
-#endif
diff --git a/arch/sparc/include/asm/system_32.h b/arch/sparc/include/asm/system_32.h
index 8623fc48fe24..79c1ae2b42a3 100644
--- a/arch/sparc/include/asm/system_32.h
+++ b/arch/sparc/include/asm/system_32.h
@@ -15,6 +15,11 @@
 
 #include <linux/irqflags.h>
 
+static inline unsigned int probe_irq_mask(unsigned long val)
+{
+        return 0;
+}
+
 /*
  * Sparc (general) CPU types
  */
diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h
index 8759f2a1b837..6c077816ab28 100644
--- a/arch/sparc/include/asm/system_64.h
+++ b/arch/sparc/include/asm/system_64.h
@@ -59,20 +59,9 @@ do {	__asm__ __volatile__("ba,pt	%%xcc, 1f\n\t" \
                              : : : "memory"); \
 } while (0)
 
-#define mb()    \
-        membar_safe("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad")
-#define rmb()   \
-        membar_safe("#LoadLoad")
-#define wmb()   \
-        membar_safe("#StoreStore")
-#define membar_storeload() \
-        membar_safe("#StoreLoad")
-#define membar_storeload_storestore() \
-        membar_safe("#StoreLoad | #StoreStore")
-#define membar_storeload_loadload() \
-        membar_safe("#StoreLoad | #LoadLoad")
-#define membar_storestore_loadstore() \
-        membar_safe("#StoreStore | #LoadStore")
+#define mb()    membar_safe("#StoreLoad")
+#define rmb()   __asm__ __volatile__("":::"memory")
+#define wmb()   __asm__ __volatile__("":::"memory")
 
 #endif
 
@@ -80,20 +69,20 @@ do {	__asm__ __volatile__("ba,pt	%%xcc, 1f\n\t" \
 
 #define read_barrier_depends()          do { } while(0)
 #define set_mb(__var, __value) \
-        do { __var = __value; membar_storeload_storestore(); } while(0)
+        do { __var = __value; membar_safe("#StoreLoad"); } while(0)
 
 #ifdef CONFIG_SMP
 #define smp_mb()        mb()
 #define smp_rmb()       rmb()
 #define smp_wmb()       wmb()
-#define smp_read_barrier_depends()      read_barrier_depends()
 #else
 #define smp_mb()        __asm__ __volatile__("":::"memory")
 #define smp_rmb()       __asm__ __volatile__("":::"memory")
 #define smp_wmb()       __asm__ __volatile__("":::"memory")
-#define smp_read_barrier_depends()      do { } while(0)
 #endif
 
+#define smp_read_barrier_depends()      do { } while(0)
+
 #define flushi(addr)    __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")
 
 #define flushw_all()    __asm__ __volatile__("flushw")
@@ -107,11 +96,12 @@ do {	__asm__ __volatile__("ba,pt	%%xcc, 1f\n\t" \
  * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt()
  * for more information.
  */
-#define reset_pic()                                             \
-        __asm__ __volatile__("ba,pt     %xcc, 99f\n\t"          \
+#define write_pic(__p)                                          \
+        __asm__ __volatile__("ba,pt     %%xcc, 99f\n\t"         \
                              ".align    64\n"                   \
-                          "99:wr        %g0, 0x0, %pic\n\t"     \
-                             "rd        %pic, %g0")
+                          "99:wr        %0, 0x0, %%pic\n\t"     \
+                             "rd        %%pic, %%g0" : : "r" (__p))
+#define reset_pic()     write_pic(0)
 
 #ifndef __ASSEMBLY__
 
@@ -170,6 +160,7 @@ do {	if (test_thread_flag(TIF_PERFCTR)) {				\
         "stb    %%o5, [%%g6 + %5]\n\t"                                  \
         "rdpr   %%cwp, %%o5\n\t"                                        \
         "stb    %%o5, [%%g6 + %8]\n\t"                                  \
+        "wrpr   %%g0, 15, %%pil\n\t"                                    \
         "mov    %4, %%g6\n\t"                                           \
         "ldub   [%4 + %8], %%g1\n\t"                                    \
         "wrpr   %%g1, %%cwp\n\t"                                        \
@@ -180,6 +171,7 @@ do {	if (test_thread_flag(TIF_PERFCTR)) {				\
         "ldx    [%%sp + 2047 + 0x70], %%i6\n\t"                         \
         "ldx    [%%sp + 2047 + 0x78], %%i7\n\t"                         \
         "ldx    [%%g6 + %9], %%g4\n\t"                                  \
+        "wrpr   %%g0, 14, %%pil\n\t"                                    \
         "brz,pt %%o7, switch_to_pc\n\t"                                 \
         " mov   %%g7, %0\n\t"                                           \
         "sethi  %%hi(ret_from_syscall), %%g1\n\t"                       \
@@ -209,14 +201,12 @@ static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int va
         unsigned long tmp1, tmp2;
 
         __asm__ __volatile__(
-"       membar          #StoreLoad | #LoadLoad\n"
 "       mov             %0, %1\n"
 "1:     lduw            [%4], %2\n"
 "       cas             [%4], %2, %0\n"
 "       cmp             %2, %0\n"
 "       bne,a,pn        %%icc, 1b\n"
 "        mov            %1, %0\n"
-"       membar          #StoreLoad | #StoreStore\n"
         : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
         : "0" (val), "r" (m)
         : "cc", "memory");
@@ -228,14 +218,12 @@ static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long
         unsigned long tmp1, tmp2;
 
         __asm__ __volatile__(
-"       membar          #StoreLoad | #LoadLoad\n"
 "       mov             %0, %1\n"
 "1:     ldx             [%4], %2\n"
 "       casx            [%4], %2, %0\n"
 "       cmp             %2, %0\n"
 "       bne,a,pn        %%xcc, 1b\n"
 "        mov            %1, %0\n"
-"       membar          #StoreLoad | #StoreStore\n"
         : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
         : "0" (val), "r" (m)
         : "cc", "memory");
@@ -272,9 +260,7 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret
 static inline unsigned long
 __cmpxchg_u32(volatile int *m, int old, int new)
 {
-        __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
-                             "cas [%2], %3, %0\n\t"
-                             "membar #StoreLoad | #StoreStore"
+        __asm__ __volatile__("cas [%2], %3, %0"
                              : "=&r" (new)
                              : "0" (new), "r" (m), "r" (old)
                              : "memory");
@@ -285,9 +271,7 @@ __cmpxchg_u32(volatile int *m, int old, int new)
 static inline unsigned long
 __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
 {
-        __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
-                             "casx [%2], %3, %0\n\t"
-                             "membar #StoreLoad | #StoreStore"
+        __asm__ __volatile__("casx [%2], %3, %0"
                              : "=&r" (new)
                              : "0" (new), "r" (m), "r" (old)
                              : "memory");
diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h
index 80fe547c3f45..0f7b0e5fb1c7 100644
--- a/arch/sparc/include/asm/thread_info_32.h
+++ b/arch/sparc/include/asm/thread_info_32.h
@@ -45,7 +45,7 @@ struct thread_info {
         /* A place to store user windows and stack pointers
          * when the stack needs inspection.
          */
-        struct reg_window       reg_window[NSWINS];     /* align for ldd! */
+        struct reg_window32     reg_window[NSWINS];     /* align for ldd! */
         unsigned long           rwbuf_stkptrs[NSWINS];
         unsigned long           w_saved;
 
diff --git a/arch/sparc/include/asm/topology_64.h b/arch/sparc/include/asm/topology_64.h
index 001c04027c82..b8a65b64e1df 100644
--- a/arch/sparc/include/asm/topology_64.h
+++ b/arch/sparc/include/asm/topology_64.h
@@ -16,8 +16,12 @@ static inline cpumask_t node_to_cpumask(int node)
 {
         return numa_cpumask_lookup_table[node];
 }
+#define cpumask_of_node(node) (&numa_cpumask_lookup_table[node])
 
-/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
+/*
+ * Returns a pointer to the cpumask of CPUs on Node 'node'.
+ * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
+ */
 #define node_to_cpumask_ptr(v, node)            \
                 cpumask_t *v = &(numa_cpumask_lookup_table[node])
 
@@ -26,9 +30,7 @@ static inline cpumask_t node_to_cpumask(int node)
 
 static inline int node_to_first_cpu(int node)
 {
-        cpumask_t tmp;
-        tmp = node_to_cpumask(node);
-        return first_cpu(tmp);
+        return cpumask_first(cpumask_of_node(node));
 }
 
 struct pci_bus;
@@ -77,10 +79,13 @@ static inline int pcibus_to_node(struct pci_bus *pbus)
 #define topology_core_id(cpu)                   (cpu_data(cpu).core_id)
 #define topology_core_siblings(cpu)             (cpu_core_map[cpu])
 #define topology_thread_siblings(cpu)           (per_cpu(cpu_sibling_map, cpu))
+#define topology_core_cpumask(cpu)              (&cpu_core_map[cpu])
+#define topology_thread_cpumask(cpu)            (&per_cpu(cpu_sibling_map, cpu))
 #define mc_capable()                            (sparc64_multi_core)
 #define smt_capable()                           (sparc64_multi_core)
 #endif /* CONFIG_SMP */
 
 #define cpu_coregroup_map(cpu)                  (cpu_core_map[cpu])
+#define cpu_coregroup_mask(cpu)                 (&cpu_core_map[cpu])
 
 #endif /* _ASM_SPARC64_TOPOLOGY_H */
diff --git a/arch/sparc/include/asm/traps.h b/arch/sparc/include/asm/traps.h
index bebdbf8f43a8..3aa62dde343f 100644
--- a/arch/sparc/include/asm/traps.h
+++ b/arch/sparc/include/asm/traps.h
@@ -10,7 +10,7 @@
 #define NUM_SPARC_TRAPS  255
 
 #ifndef __ASSEMBLY__
-
+#ifdef __KERNEL__
 /* This is for V8 compliant Sparc CPUS */
 struct tt_entry {
         unsigned long inst_one;
@@ -22,14 +22,7 @@ struct tt_entry {
 /* We set this to _start in system setup. */
 extern struct tt_entry *sparc_ttable;
 
-static inline unsigned long get_tbr(void)
-{
-        unsigned long tbr;
-
-        __asm__ __volatile__("rd %%tbr, %0\n\t" : "=r" (tbr));
-        return tbr;
-}
-
+#endif /* (__KERNEL__) */
 #endif /* !(__ASSEMBLY__) */
 
 /* For patching the trap table at boot time, we need to know how to
diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h
index 76e4299dd9bc..83c571d8c8a7 100644
--- a/arch/sparc/include/asm/tsb.h
+++ b/arch/sparc/include/asm/tsb.h
@@ -50,8 +50,6 @@
 #define TSB_TAG_INVALID_BIT     46
 #define TSB_TAG_INVALID_HIGH    (1 << (TSB_TAG_INVALID_BIT - 32))
 
-#define TSB_MEMBAR      membar  #StoreStore
-
 /* Some cpus support physical address quad loads.  We want to use
  * those if possible so we don't need to hard-lock the TSB mapping
  * into the TLB.  We encode some instruction patching in order to
@@ -128,13 +126,11 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
         cmp     REG1, REG2;             \
         bne,pn  %icc, 99b;              \
          nop;                           \
-        TSB_MEMBAR
 
 #define TSB_WRITE(TSB, TTE, TAG) \
         add     TSB, 0x8, TSB;   \
         TSB_STORE(TSB, TTE);     \
         sub     TSB, 0x8, TSB;   \
-        TSB_MEMBAR;              \
         TSB_STORE(TSB, TAG);
 
 #define KTSB_LOAD_QUAD(TSB, REG) \
@@ -153,13 +149,11 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
         cmp     REG1, REG2;             \
         bne,pn  %icc, 99b;              \
          nop;                           \
-        TSB_MEMBAR
 
 #define KTSB_WRITE(TSB, TTE, TAG) \
         add     TSB, 0x8, TSB;   \
         stxa    TTE, [TSB] ASI_N;     \
         sub     TSB, 0x8, TSB;   \
-        TSB_MEMBAR;              \
         stxa    TAG, [TSB] ASI_N;
 
         /* Do a kernel page table walk.  Leaves physical PTE pointer in
diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h
index 5708ba2719fb..48f2807d3265 100644
--- a/arch/sparc/include/asm/ttable.h
+++ b/arch/sparc/include/asm/ttable.h
@@ -2,6 +2,7 @@
 #define _SPARC64_TTABLE_H
 
 #include <asm/utrap.h>
+#include <asm/pil.h>
 
 #ifdef __ASSEMBLY__
 #include <asm/thread_info.h>
@@ -123,7 +124,7 @@
 
 #define TRAP_IRQ(routine, level)                        \
         rdpr    %pil, %g2;                              \
-        wrpr    %g0, 15, %pil;                          \
+        wrpr    %g0, PIL_NORMAL_MAX, %pil;              \
         sethi   %hi(1f-4), %g7;                         \
         ba,pt   %xcc, etrap_irq;                        \
          or     %g7, %lo(1f-4), %g7;                    \
@@ -143,7 +144,7 @@
 
 #define TRAP_IRQ(routine, level)                        \
         rdpr    %pil, %g2;                              \
-        wrpr    %g0, 15, %pil;                          \
+        wrpr    %g0, PIL_NORMAL_MAX, %pil;              \
         ba,pt   %xcc, etrap_irq;                        \
          rd     %pc, %g7;                               \
         mov     level, %o0;                             \
@@ -153,6 +154,16 @@
 
 #endif
 
+#define TRAP_NMI_IRQ(routine, level)                    \
+        rdpr    %pil, %g2;                              \
+        wrpr    %g0, PIL_NMI, %pil;                     \
+        ba,pt   %xcc, etrap_irq;                        \
+         rd     %pc, %g7;                               \
+        mov     level, %o0;                             \
+        call    routine;                                \
+         add    %sp, PTREGS_OFF, %o1;                   \
+        ba,a,pt %xcc, rtrap_nmi;
+
 #define TRAP_IVEC TRAP_NOSAVE(do_ivec)
 
 #define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index 4207fb362da0..031f038b19f7 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -1,8 +1,444 @@
-#ifndef ___ASM_SPARC_UNISTD_H
-#define ___ASM_SPARC_UNISTD_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/unistd_64.h>
+#ifndef _SPARC_UNISTD_H
+#define _SPARC_UNISTD_H
+
+/*
+ * System calls under the Sparc.
+ *
+ * Don't be scared by the ugly clobbers, it is the only way I can
+ * think of right now to force the arguments into fixed registers
+ * before the trap into the system call with gcc 'asm' statements.
+ *
+ * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
+ *
+ * SunOS compatibility based upon preliminary work which is:
+ *
+ * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
+ */
+#ifndef __32bit_syscall_numbers__
+#ifndef __arch64__
+#define __32bit_syscall_numbers__
+#endif
+#endif
+
+#define __NR_restart_syscall      0 /* Linux Specific                              */
+#define __NR_exit                 1 /* Common                                      */
+#define __NR_fork                 2 /* Common                                      */
+#define __NR_read                 3 /* Common                                      */
+#define __NR_write                4 /* Common                                      */
+#define __NR_open                 5 /* Common                                      */
+#define __NR_close                6 /* Common                                      */
+#define __NR_wait4                7 /* Common                                      */
+#define __NR_creat                8 /* Common                                      */
+#define __NR_link                 9 /* Common                                      */
+#define __NR_unlink              10 /* Common                                      */
+#define __NR_execv               11 /* SunOS Specific                              */
+#define __NR_chdir               12 /* Common                                      */
+#define __NR_chown               13 /* Common                                      */
+#define __NR_mknod               14 /* Common                                      */
+#define __NR_chmod               15 /* Common                                      */
+#define __NR_lchown              16 /* Common                                      */
+#define __NR_brk                 17 /* Common                                      */
+#define __NR_perfctr             18 /* Performance counter operations              */
+#define __NR_lseek               19 /* Common                                      */
+#define __NR_getpid              20 /* Common                                      */
+#define __NR_capget              21 /* Linux Specific                              */
+#define __NR_capset              22 /* Linux Specific                              */
+#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
+#define __NR_getuid              24 /* Common                                      */
+#define __NR_vmsplice            25 /* ENOSYS under SunOS                          */
+#define __NR_ptrace              26 /* Common                                      */
+#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
+#define __NR_sigaltstack         28 /* Common                                      */
+#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
+#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
+#ifdef __32bit_syscall_numbers__
+#define __NR_lchown32            31 /* Linux sparc32 specific                      */
+#define __NR_fchown32            32 /* Linux sparc32 specific                      */
+#endif
+#define __NR_access              33 /* Common                                      */
+#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
+#ifdef __32bit_syscall_numbers__
+#define __NR_chown32             35 /* Linux sparc32 specific                      */
+#endif
+#define __NR_sync                36 /* Common                                      */
+#define __NR_kill                37 /* Common                                      */
+#define __NR_stat                38 /* Common                                      */
+#define __NR_sendfile            39 /* Linux Specific                              */
+#define __NR_lstat               40 /* Common                                      */
+#define __NR_dup                 41 /* Common                                      */
+#define __NR_pipe                42 /* Common                                      */
+#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
+#ifdef __32bit_syscall_numbers__
+#define __NR_getuid32            44 /* Linux sparc32 specific                      */
+#endif
+#define __NR_umount2             45 /* Linux Specific                              */
+#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
+#define __NR_getgid              47 /* Common                                      */
+#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
+#define __NR_geteuid             49 /* SunOS calls getuid()                        */
+#define __NR_getegid             50 /* SunOS calls getgid()                        */
+#define __NR_acct                51 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_getgid32            53 /* Linux sparc32 specific                      */
+#else
+#define __NR_memory_ordering     52 /* Linux Specific                              */
+#endif
+#define __NR_ioctl               54 /* Common                                      */
+#define __NR_reboot              55 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_mmap2               56 /* Linux sparc32 Specific                      */
+#endif
+#define __NR_symlink             57 /* Common                                      */
+#define __NR_readlink            58 /* Common                                      */
+#define __NR_execve              59 /* Common                                      */
+#define __NR_umask               60 /* Common                                      */
+#define __NR_chroot              61 /* Common                                      */
+#define __NR_fstat               62 /* Common                                      */
+#define __NR_fstat64             63 /* Linux Specific                              */
+#define __NR_getpagesize         64 /* Common                                      */
+#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
+#define __NR_vfork               66 /* Common                                      */
+#define __NR_pread64             67 /* Linux Specific                              */
+#define __NR_pwrite64            68 /* Linux Specific                              */
+#ifdef __32bit_syscall_numbers__
+#define __NR_geteuid32           69 /* Linux sparc32, sbrk under SunOS             */
+#define __NR_getegid32           70 /* Linux sparc32, sstk under SunOS             */
+#endif
+#define __NR_mmap                71 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setreuid32          72 /* Linux sparc32, vadvise under SunOS          */
+#endif
+#define __NR_munmap              73 /* Common                                      */
+#define __NR_mprotect            74 /* Common                                      */
+#define __NR_madvise             75 /* Common                                      */
+#define __NR_vhangup             76 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_truncate64          77 /* Linux sparc32 Specific                      */
+#endif
+#define __NR_mincore             78 /* Common                                      */
+#define __NR_getgroups           79 /* Common                                      */
+#define __NR_setgroups           80 /* Common                                      */
+#define __NR_getpgrp             81 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setgroups32         82 /* Linux sparc32, setpgrp under SunOS          */
+#endif
+#define __NR_setitimer           83 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_ftruncate64         84 /* Linux sparc32 Specific                      */
+#endif
+#define __NR_swapon              85 /* Common                                      */
+#define __NR_getitimer           86 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setuid32            87 /* Linux sparc32, gethostname under SunOS      */
+#endif
+#define __NR_sethostname         88 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setgid32            89 /* Linux sparc32, getdtablesize under SunOS    */
+#endif
+#define __NR_dup2                90 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setfsuid32          91 /* Linux sparc32, getdopt under SunOS          */
+#endif
+#define __NR_fcntl               92 /* Common                                      */
+#define __NR_select              93 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setfsgid32          94 /* Linux sparc32, setdopt under SunOS          */
+#endif
+#define __NR_fsync               95 /* Common                                      */
+#define __NR_setpriority         96 /* Common                                      */
+#define __NR_socket              97 /* Common                                      */
+#define __NR_connect             98 /* Common                                      */
+#define __NR_accept              99 /* Common                                      */
+#define __NR_getpriority        100 /* Common                                      */
+#define __NR_rt_sigreturn       101 /* Linux Specific                              */
+#define __NR_rt_sigaction       102 /* Linux Specific                              */
+#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
+#define __NR_rt_sigpending      104 /* Linux Specific                              */
+#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
+#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
+#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setresuid32        108 /* Linux Specific, sigvec under SunOS          */
+#define __NR_getresuid32        109 /* Linux Specific, sigblock under SunOS        */
+#define __NR_setresgid32        110 /* Linux Specific, sigsetmask under SunOS      */
+#define __NR_getresgid32        111 /* Linux Specific, sigpause under SunOS        */
+#define __NR_setregid32         112 /* Linux sparc32, sigstack under SunOS         */
+#else
+#define __NR_setresuid          108 /* Linux Specific, sigvec under SunOS          */
+#define __NR_getresuid          109 /* Linux Specific, sigblock under SunOS        */
+#define __NR_setresgid          110 /* Linux Specific, sigsetmask under SunOS      */
+#define __NR_getresgid          111 /* Linux Specific, sigpause under SunOS        */
+#endif
+#define __NR_recvmsg            113 /* Common                                      */
+#define __NR_sendmsg            114 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_getgroups32        115 /* Linux sparc32, vtrace under SunOS           */
+#endif
+#define __NR_gettimeofday       116 /* Common                                      */
+#define __NR_getrusage          117 /* Common                                      */
+#define __NR_getsockopt         118 /* Common                                      */
+#define __NR_getcwd             119 /* Linux Specific                              */
+#define __NR_readv              120 /* Common                                      */
+#define __NR_writev             121 /* Common                                      */
+#define __NR_settimeofday       122 /* Common                                      */
+#define __NR_fchown             123 /* Common                                      */
+#define __NR_fchmod             124 /* Common                                      */
+#define __NR_recvfrom           125 /* Common                                      */
+#define __NR_setreuid           126 /* Common                                      */
+#define __NR_setregid           127 /* Common                                      */
+#define __NR_rename             128 /* Common                                      */
+#define __NR_truncate           129 /* Common                                      */
+#define __NR_ftruncate          130 /* Common                                      */
+#define __NR_flock              131 /* Common                                      */
+#define __NR_lstat64            132 /* Linux Specific                              */
+#define __NR_sendto             133 /* Common                                      */
+#define __NR_shutdown           134 /* Common                                      */
+#define __NR_socketpair         135 /* Common                                      */
+#define __NR_mkdir              136 /* Common                                      */
+#define __NR_rmdir              137 /* Common                                      */
+#define __NR_utimes             138 /* SunOS Specific                              */
+#define __NR_stat64             139 /* Linux Specific                              */
+#define __NR_sendfile64         140 /* adjtime under SunOS                         */
+#define __NR_getpeername        141 /* Common                                      */
+#define __NR_futex              142 /* gethostid under SunOS                       */
+#define __NR_gettid             143 /* ENOSYS under SunOS                          */
+#define __NR_getrlimit          144 /* Common                                      */
+#define __NR_setrlimit          145 /* Common                                      */
+#define __NR_pivot_root         146 /* Linux Specific, killpg under SunOS          */
+#define __NR_prctl              147 /* ENOSYS under SunOS                          */
+#define __NR_pciconfig_read     148 /* ENOSYS under SunOS                          */
+#define __NR_pciconfig_write    149 /* ENOSYS under SunOS                          */
+#define __NR_getsockname        150 /* Common                                      */
+#define __NR_inotify_init       151 /* Linux specific                              */
+#define __NR_inotify_add_watch  152 /* Linux specific                              */
+#define __NR_poll               153 /* Common                                      */
+#define __NR_getdents64         154 /* Linux specific                              */
+#ifdef __32bit_syscall_numbers__
+#define __NR_fcntl64            155 /* Linux sparc32 Specific                      */
+#endif
+#define __NR_inotify_rm_watch   156 /* Linux specific                              */
+#define __NR_statfs             157 /* Common                                      */
+#define __NR_fstatfs            158 /* Common                                      */
+#define __NR_umount             159 /* Common                                      */
+#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
+#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
+#define __NR_getdomainname      162 /* SunOS Specific                              */
+#define __NR_setdomainname      163 /* Common                                      */
+#ifndef __32bit_syscall_numbers__
+#define __NR_utrap_install      164 /* SYSV ABI/v9 required                        */
+#endif
+#define __NR_quotactl           165 /* Common                                      */
+#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
+#define __NR_mount              167 /* Common                                      */
+#define __NR_ustat              168 /* Common                                      */
+#define __NR_setxattr           169 /* SunOS: semsys                               */
+#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
+#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
+#define __NR_getxattr           172 /* SunOS: auditsys                             */
+#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
+#define __NR_getdents           174 /* Common                                      */
+#define __NR_setsid             175 /* Common                                      */
+#define __NR_fchdir             176 /* Common                                      */
+#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
+#define __NR_listxattr          178 /* SunOS: vpixsys                              */
+#define __NR_llistxattr         179 /* SunOS: aioread                              */
+#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
+#define __NR_removexattr        181 /* SunOS: aiowait                              */
+#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
+#define __NR_sigpending         183 /* Common                                      */
+#define __NR_query_module       184 /* Linux Specific                              */
+#define __NR_setpgid            185 /* Common                                      */
+#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
+#define __NR_tkill              187 /* SunOS: fpathconf                            */
+#define __NR_exit_group         188 /* Linux specific, sysconf undef SunOS         */
+#define __NR_uname              189 /* Linux Specific                              */
+#define __NR_init_module        190 /* Linux Specific                              */
+#define __NR_personality        191 /* Linux Specific                              */
+#define __NR_remap_file_pages   192 /* Linux Specific                              */
+#define __NR_epoll_create       193 /* Linux Specific                              */
+#define __NR_epoll_ctl          194 /* Linux Specific                              */
+#define __NR_epoll_wait         195 /* Linux Specific                              */
+#define __NR_ioprio_set         196 /* Linux Specific                              */
+#define __NR_getppid            197 /* Linux Specific                              */
+#define __NR_sigaction          198 /* Linux Specific                              */
+#define __NR_sgetmask           199 /* Linux Specific                              */
+#define __NR_ssetmask           200 /* Linux Specific                              */
+#define __NR_sigsuspend         201 /* Linux Specific                              */
+#define __NR_oldlstat           202 /* Linux Specific                              */
+#define __NR_uselib             203 /* Linux Specific                              */
+#define __NR_readdir            204 /* Linux Specific                              */
+#define __NR_readahead          205 /* Linux Specific                              */
+#define __NR_socketcall         206 /* Linux Specific                              */
+#define __NR_syslog             207 /* Linux Specific                              */
+#define __NR_lookup_dcookie     208 /* Linux Specific                              */
+#define __NR_fadvise64          209 /* Linux Specific                              */
+#define __NR_fadvise64_64       210 /* Linux Specific                              */
+#define __NR_tgkill             211 /* Linux Specific                              */
+#define __NR_waitpid            212 /* Linux Specific                              */
+#define __NR_swapoff            213 /* Linux Specific                              */
+#define __NR_sysinfo            214 /* Linux Specific                              */
+#define __NR_ipc                215 /* Linux Specific                              */
+#define __NR_sigreturn          216 /* Linux Specific                              */
+#define __NR_clone              217 /* Linux Specific                              */
+#define __NR_ioprio_get         218 /* Linux Specific                              */
+#define __NR_adjtimex           219 /* Linux Specific                              */
+#define __NR_sigprocmask        220 /* Linux Specific                              */
+#define __NR_create_module      221 /* Linux Specific                              */
+#define __NR_delete_module      222 /* Linux Specific                              */
+#define __NR_get_kernel_syms    223 /* Linux Specific                              */
+#define __NR_getpgid            224 /* Linux Specific                              */
+#define __NR_bdflush            225 /* Linux Specific                              */
+#define __NR_sysfs              226 /* Linux Specific                              */
+#define __NR_afs_syscall        227 /* Linux Specific                              */
+#define __NR_setfsuid           228 /* Linux Specific                              */
+#define __NR_setfsgid           229 /* Linux Specific                              */
+#define __NR__newselect         230 /* Linux Specific                              */
+#ifdef __32bit_syscall_numbers__
+#define __NR_time               231 /* Linux Specific                              */
 #else
-#include <asm/unistd_32.h>
+#ifdef __KERNEL__
+#define __NR_time               231 /* Linux sparc32                               */
+#endif
+#endif
+#define __NR_splice             232 /* Linux Specific                              */
+#define __NR_stime              233 /* Linux Specific                              */
+#define __NR_statfs64           234 /* Linux Specific                              */
+#define __NR_fstatfs64          235 /* Linux Specific                              */
+#define __NR__llseek            236 /* Linux Specific                              */
+#define __NR_mlock              237
+#define __NR_munlock            238
+#define __NR_mlockall           239
+#define __NR_munlockall         240
+#define __NR_sched_setparam     241
+#define __NR_sched_getparam     242
+#define __NR_sched_setscheduler 243
+#define __NR_sched_getscheduler 244
+#define __NR_sched_yield        245
+#define __NR_sched_get_priority_max 246
+#define __NR_sched_get_priority_min 247
+#define __NR_sched_rr_get_interval  248
+#define __NR_nanosleep          249
+#define __NR_mremap             250
+#define __NR__sysctl            251
+#define __NR_getsid             252
+#define __NR_fdatasync          253
+#define __NR_nfsservctl         254
+#define __NR_sync_file_range    255
+#define __NR_clock_settime      256
+#define __NR_clock_gettime      257
+#define __NR_clock_getres       258
+#define __NR_clock_nanosleep    259
+#define __NR_sched_getaffinity  260
+#define __NR_sched_setaffinity  261
+#define __NR_timer_settime      262
+#define __NR_timer_gettime      263
+#define __NR_timer_getoverrun   264
+#define __NR_timer_delete       265
+#define __NR_timer_create       266
+/* #define __NR_vserver         267 Reserved for VSERVER */
+#define __NR_io_setup           268
+#define __NR_io_destroy         269
+#define __NR_io_submit          270
+#define __NR_io_cancel          271
+#define __NR_io_getevents       272
+#define __NR_mq_open            273
+#define __NR_mq_unlink          274
+#define __NR_mq_timedsend       275
+#define __NR_mq_timedreceive    276
+#define __NR_mq_notify          277
+#define __NR_mq_getsetattr      278
+#define __NR_waitid             279
+#define __NR_tee                280
+#define __NR_add_key            281
+#define __NR_request_key        282
+#define __NR_keyctl             283
+#define __NR_openat             284
+#define __NR_mkdirat            285
+#define __NR_mknodat            286
+#define __NR_fchownat           287
+#define __NR_futimesat          288
+#define __NR_fstatat64          289
+#define __NR_unlinkat           290
+#define __NR_renameat           291
+#define __NR_linkat             292
+#define __NR_symlinkat          293
+#define __NR_readlinkat         294
+#define __NR_fchmodat           295
+#define __NR_faccessat          296
+#define __NR_pselect6           297
+#define __NR_ppoll              298
+#define __NR_unshare            299
+#define __NR_set_robust_list    300
+#define __NR_get_robust_list    301
+#define __NR_migrate_pages      302
+#define __NR_mbind              303
+#define __NR_get_mempolicy      304
+#define __NR_set_mempolicy      305
+#define __NR_kexec_load         306
+#define __NR_move_pages         307
+#define __NR_getcpu             308
+#define __NR_epoll_pwait        309
+#define __NR_utimensat          310
+#define __NR_signalfd           311
+#define __NR_timerfd_create     312
+#define __NR_eventfd            313
+#define __NR_fallocate          314
+#define __NR_timerfd_settime    315
+#define __NR_timerfd_gettime    316
+#define __NR_signalfd4          317
+#define __NR_eventfd2           318
+#define __NR_epoll_create1      319
+#define __NR_dup3               320
+#define __NR_pipe2              321
+#define __NR_inotify_init1      322
+#define __NR_accept4            323
+
+#define NR_SYSCALLS             324
+
+#ifdef __32bit_syscall_numbers__
+/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
+ * it never had the plain ones and there is no value to adding those
+ * old versions into the syscall table.
+ */
+#define __IGNORE_setresuid
+#define __IGNORE_getresuid
+#define __IGNORE_setresgid
+#define __IGNORE_getresgid
 #endif
+
+#ifdef __KERNEL__
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#ifndef __32bit_syscall_numbers__
+#define __ARCH_WANT_COMPAT_SYS_TIME
+#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
 #endif
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+
+#endif /* __KERNEL__ */
+#endif /* _SPARC_UNISTD_H */
diff --git a/arch/sparc/include/asm/unistd_32.h b/arch/sparc/include/asm/unistd_32.h
deleted file mode 100644
index 0d13d2a4c76f..000000000000
--- a/arch/sparc/include/asm/unistd_32.h
+++ /dev/null
@@ -1,385 +0,0 @@
-#ifndef _SPARC_UNISTD_H
-#define _SPARC_UNISTD_H
-
-/*
- * System calls under the Sparc.
- *
- * Don't be scared by the ugly clobbers, it is the only way I can
- * think of right now to force the arguments into fixed registers
- * before the trap into the system call with gcc 'asm' statements.
- *
- * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
- *
- * SunOS compatibility based upon preliminary work which is:
- *
- * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
- */
-
-#define __NR_restart_syscall      0 /* Linux Specific                              */
-#define __NR_exit                 1 /* Common                                      */
-#define __NR_fork                 2 /* Common                                      */
-#define __NR_read                 3 /* Common                                      */
-#define __NR_write                4 /* Common                                      */
-#define __NR_open                 5 /* Common                                      */
-#define __NR_close                6 /* Common                                      */
-#define __NR_wait4                7 /* Common                                      */
-#define __NR_creat                8 /* Common                                      */
-#define __NR_link                 9 /* Common                                      */
-#define __NR_unlink              10 /* Common                                      */
-#define __NR_execv               11 /* SunOS Specific                              */
-#define __NR_chdir               12 /* Common                                      */
-#define __NR_chown               13 /* Common                                      */
-#define __NR_mknod               14 /* Common                                      */
-#define __NR_chmod               15 /* Common                                      */
-#define __NR_lchown              16 /* Common                                      */
-#define __NR_brk                 17 /* Common                                      */
-#define __NR_perfctr             18 /* Performance counter operations              */
-#define __NR_lseek               19 /* Common                                      */
-#define __NR_getpid              20 /* Common                                      */
-#define __NR_capget              21 /* Linux Specific                              */
-#define __NR_capset              22 /* Linux Specific                              */
-#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
-#define __NR_getuid              24 /* Common                                      */
-#define __NR_vmsplice            25 /* ENOSYS under SunOS                          */
-#define __NR_ptrace              26 /* Common                                      */
-#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
-#define __NR_sigaltstack         28 /* Common                                      */
-#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
-#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
-#define __NR_lchown32            31 /* Linux sparc32 specific                      */
-#define __NR_fchown32            32 /* Linux sparc32 specific                      */
-#define __NR_access              33 /* Common                                      */
-#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
-#define __NR_chown32             35 /* Linux sparc32 specific                      */
-#define __NR_sync                36 /* Common                                      */
-#define __NR_kill                37 /* Common                                      */
-#define __NR_stat                38 /* Common                                      */
-#define __NR_sendfile            39 /* Linux Specific                              */
-#define __NR_lstat               40 /* Common                                      */
-#define __NR_dup                 41 /* Common                                      */
-#define __NR_pipe                42 /* Common                                      */
-#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
-#define __NR_getuid32            44 /* Linux sparc32 specific                      */
-#define __NR_umount2             45 /* Linux Specific                              */
-#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
-#define __NR_getgid              47 /* Common                                      */
-#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
-#define __NR_geteuid             49 /* SunOS calls getuid()                        */
-#define __NR_getegid             50 /* SunOS calls getgid()                        */
-#define __NR_acct                51 /* Common                                      */
-/* #define __NR_memory_ordering  52    Linux sparc64 specific                      */
-#define __NR_getgid32            53 /* Linux sparc32 specific                      */
-#define __NR_ioctl               54 /* Common                                      */
-#define __NR_reboot              55 /* Common                                      */
-#define __NR_mmap2               56 /* Linux sparc32 Specific                      */
-#define __NR_symlink             57 /* Common                                      */
-#define __NR_readlink            58 /* Common                                      */
-#define __NR_execve              59 /* Common                                      */
-#define __NR_umask               60 /* Common                                      */
-#define __NR_chroot              61 /* Common                                      */
-#define __NR_fstat               62 /* Common                                      */
-#define __NR_fstat64             63 /* Linux Specific                              */
-#define __NR_getpagesize         64 /* Common                                      */
-#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
-#define __NR_vfork               66 /* Common                                      */
-#define __NR_pread64             67 /* Linux Specific                              */
-#define __NR_pwrite64            68 /* Linux Specific                              */
-#define __NR_geteuid32           69 /* Linux sparc32, sbrk under SunOS             */
-#define __NR_getegid32           70 /* Linux sparc32, sstk under SunOS             */
-#define __NR_mmap                71 /* Common                                      */
-#define __NR_setreuid32          72 /* Linux sparc32, vadvise under SunOS          */
-#define __NR_munmap              73 /* Common                                      */
-#define __NR_mprotect            74 /* Common                                      */
-#define __NR_madvise             75 /* Common                                      */
-#define __NR_vhangup             76 /* Common                                      */
-#define __NR_truncate64          77 /* Linux sparc32 Specific                      */
-#define __NR_mincore             78 /* Common                                      */
-#define __NR_getgroups           79 /* Common                                      */
-#define __NR_setgroups           80 /* Common                                      */
-#define __NR_getpgrp             81 /* Common                                      */
-#define __NR_setgroups32         82 /* Linux sparc32, setpgrp under SunOS          */
-#define __NR_setitimer           83 /* Common                                      */
-#define __NR_ftruncate64         84 /* Linux sparc32 Specific                      */
-#define __NR_swapon              85 /* Common                                      */
-#define __NR_getitimer           86 /* Common                                      */
-#define __NR_setuid32            87 /* Linux sparc32, gethostname under SunOS      */
-#define __NR_sethostname         88 /* Common                                      */
-#define __NR_setgid32            89 /* Linux sparc32, getdtablesize under SunOS    */
-#define __NR_dup2                90 /* Common                                      */
-#define __NR_setfsuid32          91 /* Linux sparc32, getdopt under SunOS          */
-#define __NR_fcntl               92 /* Common                                      */
-#define __NR_select              93 /* Common                                      */
-#define __NR_setfsgid32          94 /* Linux sparc32, setdopt under SunOS          */
-#define __NR_fsync               95 /* Common                                      */
-#define __NR_setpriority         96 /* Common                                      */
-#define __NR_socket              97 /* Common                                      */
-#define __NR_connect             98 /* Common                                      */
-#define __NR_accept              99 /* Common                                      */
-#define __NR_getpriority        100 /* Common                                      */
-#define __NR_rt_sigreturn       101 /* Linux Specific                              */
-#define __NR_rt_sigaction       102 /* Linux Specific                              */
-#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
-#define __NR_rt_sigpending      104 /* Linux Specific                              */
-#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
-#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
-#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
-#define __NR_setresuid32        108 /* Linux Specific, sigvec under SunOS          */
-#define __NR_getresuid32        109 /* Linux Specific, sigblock under SunOS        */
-#define __NR_setresgid32        110 /* Linux Specific, sigsetmask under SunOS      */
-#define __NR_getresgid32        111 /* Linux Specific, sigpause under SunOS        */
-#define __NR_setregid32         112 /* Linux sparc32, sigstack under SunOS         */
-#define __NR_recvmsg            113 /* Common                                      */
-#define __NR_sendmsg            114 /* Common                                      */
-#define __NR_getgroups32        115 /* Linux sparc32, vtrace under SunOS           */
-#define __NR_gettimeofday       116 /* Common                                      */
-#define __NR_getrusage          117 /* Common                                      */
-#define __NR_getsockopt         118 /* Common                                      */
-#define __NR_getcwd             119 /* Linux Specific                              */
-#define __NR_readv              120 /* Common                                      */
-#define __NR_writev             121 /* Common                                      */
-#define __NR_settimeofday       122 /* Common                                      */
-#define __NR_fchown             123 /* Common                                      */
-#define __NR_fchmod             124 /* Common                                      */
-#define __NR_recvfrom           125 /* Common                                      */
-#define __NR_setreuid           126 /* Common                                      */
-#define __NR_setregid           127 /* Common                                      */
-#define __NR_rename             128 /* Common                                      */
-#define __NR_truncate           129 /* Common                                      */
-#define __NR_ftruncate          130 /* Common                                      */
-#define __NR_flock              131 /* Common                                      */
-#define __NR_lstat64            132 /* Linux Specific                              */
-#define __NR_sendto             133 /* Common                                      */
-#define __NR_shutdown           134 /* Common                                      */
-#define __NR_socketpair         135 /* Common                                      */
-#define __NR_mkdir              136 /* Common                                      */
-#define __NR_rmdir              137 /* Common                                      */
-#define __NR_utimes             138 /* SunOS Specific                              */
-#define __NR_stat64             139 /* Linux Specific                              */
-#define __NR_sendfile64         140 /* adjtime under SunOS                         */
-#define __NR_getpeername        141 /* Common                                      */
-#define __NR_futex              142 /* gethostid under SunOS                       */
-#define __NR_gettid             143 /* ENOSYS under SunOS                          */
-#define __NR_getrlimit          144 /* Common                                      */
-#define __NR_setrlimit          145 /* Common                                      */
-#define __NR_pivot_root         146 /* Linux Specific, killpg under SunOS          */
-#define __NR_prctl              147 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_read     148 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_write    149 /* ENOSYS under SunOS                          */
-#define __NR_getsockname        150 /* Common                                      */
-#define __NR_inotify_init       151 /* Linux specific                              */
-#define __NR_inotify_add_watch  152 /* Linux specific                              */
-#define __NR_poll               153 /* Common                                      */
-#define __NR_getdents64         154 /* Linux specific                              */
-#define __NR_fcntl64            155 /* Linux sparc32 Specific                      */
-#define __NR_inotify_rm_watch   156 /* Linux specific                              */
-#define __NR_statfs             157 /* Common                                      */
-#define __NR_fstatfs            158 /* Common                                      */
-#define __NR_umount             159 /* Common                                      */
-#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
-#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
-#define __NR_getdomainname      162 /* SunOS Specific                              */
-#define __NR_setdomainname      163 /* Common                                      */
-/* #define __NR_utrap_install   164    Linux sparc64 specific                      */
-#define __NR_quotactl           165 /* Common                                      */
-#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
-#define __NR_mount              167 /* Common                                      */
-#define __NR_ustat              168 /* Common                                      */
-#define __NR_setxattr           169 /* SunOS: semsys                               */
-#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
-#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
-#define __NR_getxattr           172 /* SunOS: auditsys                             */
-#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
-#define __NR_getdents           174 /* Common                                      */
-#define __NR_setsid             175 /* Common                                      */
-#define __NR_fchdir             176 /* Common                                      */
-#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
-#define __NR_listxattr          178 /* SunOS: vpixsys                              */
-#define __NR_llistxattr         179 /* SunOS: aioread                              */
-#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
-#define __NR_removexattr        181 /* SunOS: aiowait                              */
-#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
-#define __NR_sigpending         183 /* Common                                      */
-#define __NR_query_module       184 /* Linux Specific                              */
-#define __NR_setpgid            185 /* Common                                      */
-#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
-#define __NR_tkill              187 /* SunOS: fpathconf                            */
-#define __NR_exit_group         188 /* Linux specific, sysconf undef SunOS         */
-#define __NR_uname              189 /* Linux Specific                              */
-#define __NR_init_module        190 /* Linux Specific                              */
-#define __NR_personality        191 /* Linux Specific                              */
-#define __NR_remap_file_pages   192 /* Linux Specific                              */
-#define __NR_epoll_create       193 /* Linux Specific                              */
-#define __NR_epoll_ctl          194 /* Linux Specific                              */
-#define __NR_epoll_wait         195 /* Linux Specific                              */
-#define __NR_ioprio_set         196 /* Linux Specific                              */
-#define __NR_getppid            197 /* Linux Specific                              */
-#define __NR_sigaction          198 /* Linux Specific                              */
-#define __NR_sgetmask           199 /* Linux Specific                              */
-#define __NR_ssetmask           200 /* Linux Specific                              */
-#define __NR_sigsuspend         201 /* Linux Specific                              */
-#define __NR_oldlstat           202 /* Linux Specific                              */
-#define __NR_uselib             203 /* Linux Specific                              */
-#define __NR_readdir            204 /* Linux Specific                              */
-#define __NR_readahead          205 /* Linux Specific                              */
-#define __NR_socketcall         206 /* Linux Specific                              */
-#define __NR_syslog             207 /* Linux Specific                              */
-#define __NR_lookup_dcookie     208 /* Linux Specific                              */
-#define __NR_fadvise64          209 /* Linux Specific                              */
-#define __NR_fadvise64_64       210 /* Linux Specific                              */
-#define __NR_tgkill             211 /* Linux Specific                              */
-#define __NR_waitpid            212 /* Linux Specific                              */
-#define __NR_swapoff            213 /* Linux Specific                              */
-#define __NR_sysinfo            214 /* Linux Specific                              */
-#define __NR_ipc                215 /* Linux Specific                              */
-#define __NR_sigreturn          216 /* Linux Specific                              */
-#define __NR_clone              217 /* Linux Specific                              */
-#define __NR_ioprio_get         218 /* Linux Specific                              */
-#define __NR_adjtimex           219 /* Linux Specific                              */
-#define __NR_sigprocmask        220 /* Linux Specific                              */
-#define __NR_create_module      221 /* Linux Specific                              */
-#define __NR_delete_module      222 /* Linux Specific                              */
-#define __NR_get_kernel_syms    223 /* Linux Specific                              */
-#define __NR_getpgid            224 /* Linux Specific                              */
-#define __NR_bdflush            225 /* Linux Specific                              */
-#define __NR_sysfs              226 /* Linux Specific                              */
-#define __NR_afs_syscall        227 /* Linux Specific                              */
-#define __NR_setfsuid           228 /* Linux Specific                              */
-#define __NR_setfsgid           229 /* Linux Specific                              */
-#define __NR__newselect         230 /* Linux Specific                              */
-#define __NR_time               231 /* Linux Specific                              */
-#define __NR_splice             232 /* Linux Specific                              */
-#define __NR_stime              233 /* Linux Specific                              */
-#define __NR_statfs64           234 /* Linux Specific                              */
-#define __NR_fstatfs64          235 /* Linux Specific                              */
-#define __NR__llseek            236 /* Linux Specific                              */
-#define __NR_mlock              237
-#define __NR_munlock            238
-#define __NR_mlockall           239
-#define __NR_munlockall         240
-#define __NR_sched_setparam     241
-#define __NR_sched_getparam     242
-#define __NR_sched_setscheduler 243
-#define __NR_sched_getscheduler 244
-#define __NR_sched_yield        245
-#define __NR_sched_get_priority_max 246
-#define __NR_sched_get_priority_min 247
-#define __NR_sched_rr_get_interval  248
-#define __NR_nanosleep          249
-#define __NR_mremap             250
-#define __NR__sysctl            251
-#define __NR_getsid             252
-#define __NR_fdatasync          253
-#define __NR_nfsservctl         254
-#define __NR_sync_file_range    255
-#define __NR_clock_settime      256
-#define __NR_clock_gettime      257
-#define __NR_clock_getres       258
-#define __NR_clock_nanosleep    259
-#define __NR_sched_getaffinity  260
-#define __NR_sched_setaffinity  261
-#define __NR_timer_settime      262
-#define __NR_timer_gettime      263
-#define __NR_timer_getoverrun   264
-#define __NR_timer_delete       265
-#define __NR_timer_create       266
-/* #define __NR_vserver         267 Reserved for VSERVER */
-#define __NR_io_setup           268
-#define __NR_io_destroy         269
-#define __NR_io_submit          270
-#define __NR_io_cancel          271
-#define __NR_io_getevents       272
-#define __NR_mq_open            273
-#define __NR_mq_unlink          274
-#define __NR_mq_timedsend       275
-#define __NR_mq_timedreceive    276
-#define __NR_mq_notify          277
-#define __NR_mq_getsetattr      278
-#define __NR_waitid             279
-#define __NR_tee                280
-#define __NR_add_key            281
-#define __NR_request_key        282
-#define __NR_keyctl             283
-#define __NR_openat             284
-#define __NR_mkdirat            285
-#define __NR_mknodat            286
-#define __NR_fchownat           287
-#define __NR_futimesat          288
-#define __NR_fstatat64          289
-#define __NR_unlinkat           290
-#define __NR_renameat           291
-#define __NR_linkat             292
-#define __NR_symlinkat          293
-#define __NR_readlinkat         294
-#define __NR_fchmodat           295
-#define __NR_faccessat          296
-#define __NR_pselect6           297
-#define __NR_ppoll              298
-#define __NR_unshare            299
-#define __NR_set_robust_list    300
-#define __NR_get_robust_list    301
-#define __NR_migrate_pages      302
-#define __NR_mbind              303
-#define __NR_get_mempolicy      304
-#define __NR_set_mempolicy      305
-#define __NR_kexec_load         306
-#define __NR_move_pages         307
-#define __NR_getcpu             308
-#define __NR_epoll_pwait        309
-#define __NR_utimensat          310
-#define __NR_signalfd           311
-#define __NR_timerfd_create     312
-#define __NR_eventfd            313
-#define __NR_fallocate          314
-#define __NR_timerfd_settime    315
-#define __NR_timerfd_gettime    316
-#define __NR_signalfd4          317
-#define __NR_eventfd2           318
-#define __NR_epoll_create1      319
-#define __NR_dup3               320
-#define __NR_pipe2              321
-#define __NR_inotify_init1      322
-#define __NR_accept4            323
-
-#define NR_SYSCALLS             324
-
-/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
- * it never had the plain ones and there is no value to adding those
- * old versions into the syscall table.
- */
-#define __IGNORE_setresuid
-#define __IGNORE_getresuid
-#define __IGNORE_setresgid
-#define __IGNORE_getresgid
-
-#ifdef __KERNEL__
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGSUSPEND
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _SPARC_UNISTD_H */
diff --git a/arch/sparc/include/asm/unistd_64.h b/arch/sparc/include/asm/unistd_64.h
deleted file mode 100644
index fa5d3c0343c7..000000000000
--- a/arch/sparc/include/asm/unistd_64.h
+++ /dev/null
@@ -1,380 +0,0 @@
-#ifndef _SPARC64_UNISTD_H
-#define _SPARC64_UNISTD_H
-
-/*
- * System calls under the Sparc.
- *
- * Don't be scared by the ugly clobbers, it is the only way I can
- * think of right now to force the arguments into fixed registers
- * before the trap into the system call with gcc 'asm' statements.
- *
- * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
- *
- * SunOS compatibility based upon preliminary work which is:
- *
- * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
- */
-
-#define __NR_restart_syscall      0 /* Linux Specific                              */
-#define __NR_exit                 1 /* Common                                      */
-#define __NR_fork                 2 /* Common                                      */
-#define __NR_read                 3 /* Common                                      */
-#define __NR_write                4 /* Common                                      */
-#define __NR_open                 5 /* Common                                      */
-#define __NR_close                6 /* Common                                      */
-#define __NR_wait4                7 /* Common                                      */
-#define __NR_creat                8 /* Common                                      */
-#define __NR_link                 9 /* Common                                      */
-#define __NR_unlink              10 /* Common                                      */
-#define __NR_execv               11 /* SunOS Specific                              */
-#define __NR_chdir               12 /* Common                                      */
-#define __NR_chown               13 /* Common                                      */
-#define __NR_mknod               14 /* Common                                      */
-#define __NR_chmod               15 /* Common                                      */
-#define __NR_lchown              16 /* Common                                      */
-#define __NR_brk                 17 /* Common                                      */
-#define __NR_perfctr             18 /* Performance counter operations              */
-#define __NR_lseek               19 /* Common                                      */
-#define __NR_getpid              20 /* Common                                      */
-#define __NR_capget              21 /* Linux Specific                              */
-#define __NR_capset              22 /* Linux Specific                              */
-#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
-#define __NR_getuid              24 /* Common                                      */
-#define __NR_vmsplice            25 /* ENOSYS under SunOS                          */
-#define __NR_ptrace              26 /* Common                                      */
-#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
-#define __NR_sigaltstack         28 /* Common                                      */
-#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
-#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
-/* #define __NR_lchown32         31    Linux sparc32 specific                      */
-/* #define __NR_fchown32         32    Linux sparc32 specific                      */
-#define __NR_access              33 /* Common                                      */
-#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
-/* #define __NR_chown32          35    Linux sparc32 specific                      */
-#define __NR_sync                36 /* Common                                      */
-#define __NR_kill                37 /* Common                                      */
-#define __NR_stat                38 /* Common                                      */
-#define __NR_sendfile            39 /* Linux Specific                              */
-#define __NR_lstat               40 /* Common                                      */
-#define __NR_dup                 41 /* Common                                      */
-#define __NR_pipe                42 /* Common                                      */
-#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
-/* #define __NR_getuid32         44    Linux sparc32 specific                      */
-#define __NR_umount2             45 /* Linux Specific                              */
-#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
-#define __NR_getgid              47 /* Common                                      */
-#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
-#define __NR_geteuid             49 /* SunOS calls getuid()                        */
-#define __NR_getegid             50 /* SunOS calls getgid()                        */
-#define __NR_acct                51 /* Common                                      */
-#define __NR_memory_ordering     52 /* Linux Specific                              */
-/* #define __NR_getgid32         53    Linux sparc32 specific                      */
-#define __NR_ioctl               54 /* Common                                      */
-#define __NR_reboot              55 /* Common                                      */
-/* #define __NR_mmap2            56    Linux sparc32 Specific                      */
-#define __NR_symlink             57 /* Common                                      */
-#define __NR_readlink            58 /* Common                                      */
-#define __NR_execve              59 /* Common                                      */
-#define __NR_umask               60 /* Common                                      */
-#define __NR_chroot              61 /* Common                                      */
-#define __NR_fstat               62 /* Common                                      */
-#define __NR_fstat64             63 /* Linux Specific                              */
-#define __NR_getpagesize         64 /* Common                                      */
-#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
-#define __NR_vfork               66 /* Common                                      */
-#define __NR_pread64             67 /* Linux Specific                              */
-#define __NR_pwrite64            68 /* Linux Specific                              */
-/* #define __NR_geteuid32        69    Linux sparc32, sbrk under SunOS             */
-/* #define __NR_getegid32        70    Linux sparc32, sstk under SunOS             */
-#define __NR_mmap                71 /* Common                                      */
-/* #define __NR_setreuid32       72    Linux sparc32, vadvise under SunOS          */
-#define __NR_munmap              73 /* Common                                      */
-#define __NR_mprotect            74 /* Common                                      */
-#define __NR_madvise             75 /* Common                                      */
-#define __NR_vhangup             76 /* Common                                      */
-/* #define __NR_truncate64       77    Linux sparc32 Specific                      */
-#define __NR_mincore             78 /* Common                                      */
-#define __NR_getgroups           79 /* Common                                      */
-#define __NR_setgroups           80 /* Common                                      */
-#define __NR_getpgrp             81 /* Common                                      */
-/* #define __NR_setgroups32      82    Linux sparc32, setpgrp under SunOS          */
-#define __NR_setitimer           83 /* Common                                      */
-/* #define __NR_ftruncate64      84    Linux sparc32 Specific                      */
-#define __NR_swapon              85 /* Common                                      */
-#define __NR_getitimer           86 /* Common                                      */
-/* #define __NR_setuid32         87    Linux sparc32, gethostname under SunOS      */
-#define __NR_sethostname         88 /* Common                                      */
-/* #define __NR_setgid32         89    Linux sparc32, getdtablesize under SunOS    */
-#define __NR_dup2                90 /* Common                                      */
-/* #define __NR_setfsuid32       91    Linux sparc32, getdopt under SunOS          */
-#define __NR_fcntl               92 /* Common                                      */
-#define __NR_select              93 /* Common                                      */
-/* #define __NR_setfsgid32       94    Linux sparc32, setdopt under SunOS          */
-#define __NR_fsync               95 /* Common                                      */
-#define __NR_setpriority         96 /* Common                                      */
-#define __NR_socket              97 /* Common                                      */
-#define __NR_connect             98 /* Common                                      */
-#define __NR_accept              99 /* Common                                      */
-#define __NR_getpriority        100 /* Common                                      */
-#define __NR_rt_sigreturn       101 /* Linux Specific                              */
-#define __NR_rt_sigaction       102 /* Linux Specific                              */
-#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
-#define __NR_rt_sigpending      104 /* Linux Specific                              */
-#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
-#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
-#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
-#define __NR_setresuid          108 /* Linux Specific, sigvec under SunOS          */
-#define __NR_getresuid          109 /* Linux Specific, sigblock under SunOS        */
-#define __NR_setresgid          110 /* Linux Specific, sigsetmask under SunOS      */
-#define __NR_getresgid          111 /* Linux Specific, sigpause under SunOS        */
-/* #define __NR_setregid32       75    Linux sparc32, sigstack under SunOS         */
-#define __NR_recvmsg            113 /* Common                                      */
-#define __NR_sendmsg            114 /* Common                                      */
-/* #define __NR_getgroups32     115    Linux sparc32, vtrace under SunOS           */
-#define __NR_gettimeofday       116 /* Common                                      */
-#define __NR_getrusage          117 /* Common                                      */
-#define __NR_getsockopt         118 /* Common                                      */
-#define __NR_getcwd             119 /* Linux Specific                              */
-#define __NR_readv              120 /* Common                                      */
-#define __NR_writev             121 /* Common                                      */
-#define __NR_settimeofday       122 /* Common                                      */
-#define __NR_fchown             123 /* Common                                      */
-#define __NR_fchmod             124 /* Common                                      */
-#define __NR_recvfrom           125 /* Common                                      */
-#define __NR_setreuid           126 /* Common                                      */
-#define __NR_setregid           127 /* Common                                      */
-#define __NR_rename             128 /* Common                                      */
-#define __NR_truncate           129 /* Common                                      */
-#define __NR_ftruncate          130 /* Common                                      */
-#define __NR_flock              131 /* Common                                      */
-#define __NR_lstat64            132 /* Linux Specific                              */
-#define __NR_sendto             133 /* Common                                      */
-#define __NR_shutdown           134 /* Common                                      */
-#define __NR_socketpair         135 /* Common                                      */
-#define __NR_mkdir              136 /* Common                                      */
-#define __NR_rmdir              137 /* Common                                      */
-#define __NR_utimes             138 /* SunOS Specific                              */
-#define __NR_stat64             139 /* Linux Specific                              */
-#define __NR_sendfile64         140 /* adjtime under SunOS                         */
-#define __NR_getpeername        141 /* Common                                      */
-#define __NR_futex              142 /* gethostid under SunOS                       */
-#define __NR_gettid             143 /* ENOSYS under SunOS                          */
-#define __NR_getrlimit          144 /* Common                                      */
-#define __NR_setrlimit          145 /* Common                                      */
-#define __NR_pivot_root         146 /* Linux Specific, killpg under SunOS          */
-#define __NR_prctl              147 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_read     148 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_write    149 /* ENOSYS under SunOS                          */
-#define __NR_getsockname        150 /* Common                                      */
-#define __NR_inotify_init       151 /* Linux specific                              */
-#define __NR_inotify_add_watch  152 /* Linux specific                              */
-#define __NR_poll               153 /* Common                                      */
-#define __NR_getdents64         154 /* Linux specific                              */
-/* #define __NR_fcntl64         155    Linux sparc32 Specific                      */
-#define __NR_inotify_rm_watch   156 /* Linux specific                              */
-#define __NR_statfs             157 /* Common                                      */
-#define __NR_fstatfs            158 /* Common                                      */
-#define __NR_umount             159 /* Common                                      */
-#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
-#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
-#define __NR_getdomainname      162 /* SunOS Specific                              */
-#define __NR_setdomainname      163 /* Common                                      */
-#define __NR_utrap_install      164 /* SYSV ABI/v9 required                        */
-#define __NR_quotactl           165 /* Common                                      */
-#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
-#define __NR_mount              167 /* Common                                      */
-#define __NR_ustat              168 /* Common                                      */
-#define __NR_setxattr           169 /* SunOS: semsys                               */
-#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
-#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
-#define __NR_getxattr           172 /* SunOS: auditsys                             */
-#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
-#define __NR_getdents           174 /* Common                                      */
-#define __NR_setsid             175 /* Common                                      */
-#define __NR_fchdir             176 /* Common                                      */
-#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
-#define __NR_listxattr          178 /* SunOS: vpixsys                              */
-#define __NR_llistxattr         179 /* SunOS: aioread                              */
-#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
-#define __NR_removexattr        181 /* SunOS: aiowait                              */
-#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
-#define __NR_sigpending         183 /* Common                                      */
-#define __NR_query_module       184 /* Linux Specific                              */
-#define __NR_setpgid            185 /* Common                                      */
-#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
-#define __NR_tkill              187 /* SunOS: fpathconf                            */
-#define __NR_exit_group         188 /* Linux specific, sysconf undef SunOS         */
-#define __NR_uname              189 /* Linux Specific                              */
-#define __NR_init_module        190 /* Linux Specific                              */
-#define __NR_personality        191 /* Linux Specific                              */
-#define __NR_remap_file_pages   192 /* Linux Specific                              */
-#define __NR_epoll_create       193 /* Linux Specific                              */
-#define __NR_epoll_ctl          194 /* Linux Specific                              */
-#define __NR_epoll_wait         195 /* Linux Specific                              */
-#define __NR_ioprio_set         196 /* Linux Specific                              */
-#define __NR_getppid            197 /* Linux Specific                              */
-#define __NR_sigaction          198 /* Linux Specific                              */
-#define __NR_sgetmask           199 /* Linux Specific                              */
-#define __NR_ssetmask           200 /* Linux Specific                              */
-#define __NR_sigsuspend         201 /* Linux Specific                              */
-#define __NR_oldlstat           202 /* Linux Specific                              */
-#define __NR_uselib             203 /* Linux Specific                              */
-#define __NR_readdir            204 /* Linux Specific                              */
-#define __NR_readahead          205 /* Linux Specific                              */
-#define __NR_socketcall         206 /* Linux Specific                              */
-#define __NR_syslog             207 /* Linux Specific                              */
-#define __NR_lookup_dcookie     208 /* Linux Specific                              */
-#define __NR_fadvise64          209 /* Linux Specific                              */
-#define __NR_fadvise64_64       210 /* Linux Specific                              */
-#define __NR_tgkill             211 /* Linux Specific                              */
-#define __NR_waitpid            212 /* Linux Specific                              */
-#define __NR_swapoff            213 /* Linux Specific                              */
-#define __NR_sysinfo            214 /* Linux Specific                              */
-#define __NR_ipc                215 /* Linux Specific                              */
-#define __NR_sigreturn          216 /* Linux Specific                              */
-#define __NR_clone              217 /* Linux Specific                              */
-#define __NR_ioprio_get         218 /* Linux Specific                              */
-#define __NR_adjtimex           219 /* Linux Specific                              */
-#define __NR_sigprocmask        220 /* Linux Specific                              */
-#define __NR_create_module      221 /* Linux Specific                              */
-#define __NR_delete_module      222 /* Linux Specific                              */
-#define __NR_get_kernel_syms    223 /* Linux Specific                              */
-#define __NR_getpgid            224 /* Linux Specific                              */
-#define __NR_bdflush            225 /* Linux Specific                              */
-#define __NR_sysfs              226 /* Linux Specific                              */
-#define __NR_afs_syscall        227 /* Linux Specific                              */
-#define __NR_setfsuid           228 /* Linux Specific                              */
-#define __NR_setfsgid           229 /* Linux Specific                              */
-#define __NR__newselect         230 /* Linux Specific                              */
-#ifdef __KERNEL__
-#define __NR_time               231 /* Linux sparc32                               */
-#endif
-#define __NR_splice             232 /* Linux Specific                              */
-#define __NR_stime              233 /* Linux Specific                              */
-#define __NR_statfs64           234 /* Linux Specific                              */
-#define __NR_fstatfs64          235 /* Linux Specific                              */
-#define __NR__llseek            236 /* Linux Specific                              */
-#define __NR_mlock              237
-#define __NR_munlock            238
-#define __NR_mlockall           239
-#define __NR_munlockall         240
-#define __NR_sched_setparam     241
-#define __NR_sched_getparam     242
-#define __NR_sched_setscheduler 243
-#define __NR_sched_getscheduler 244
-#define __NR_sched_yield        245
-#define __NR_sched_get_priority_max 246
-#define __NR_sched_get_priority_min 247
-#define __NR_sched_rr_get_interval  248
-#define __NR_nanosleep          249
-#define __NR_mremap             250
-#define __NR__sysctl            251
-#define __NR_getsid             252
-#define __NR_fdatasync          253
-#define __NR_nfsservctl         254
-#define __NR_sync_file_range    255
-#define __NR_clock_settime      256
-#define __NR_clock_gettime      257
-#define __NR_clock_getres       258
-#define __NR_clock_nanosleep    259
-#define __NR_sched_getaffinity  260
-#define __NR_sched_setaffinity  261
-#define __NR_timer_settime      262
-#define __NR_timer_gettime      263
-#define __NR_timer_getoverrun   264
-#define __NR_timer_delete       265
-#define __NR_timer_create       266
-/* #define __NR_vserver         267 Reserved for VSERVER */
-#define __NR_io_setup           268
-#define __NR_io_destroy         269
-#define __NR_io_submit          270
-#define __NR_io_cancel          271
-#define __NR_io_getevents       272
-#define __NR_mq_open            273
-#define __NR_mq_unlink          274
-#define __NR_mq_timedsend       275
-#define __NR_mq_timedreceive    276
-#define __NR_mq_notify          277
-#define __NR_mq_getsetattr      278
-#define __NR_waitid             279
-#define __NR_tee                280
-#define __NR_add_key            281
-#define __NR_request_key        282
-#define __NR_keyctl             283
-#define __NR_openat             284
-#define __NR_mkdirat            285
-#define __NR_mknodat            286
-#define __NR_fchownat           287
-#define __NR_futimesat          288
-#define __NR_fstatat64          289
-#define __NR_unlinkat           290
-#define __NR_renameat           291
-#define __NR_linkat             292
-#define __NR_symlinkat          293
-#define __NR_readlinkat         294
-#define __NR_fchmodat           295
-#define __NR_faccessat          296
-#define __NR_pselect6           297
-#define __NR_ppoll              298
-#define __NR_unshare            299
-#define __NR_set_robust_list    300
-#define __NR_get_robust_list    301
-#define __NR_migrate_pages      302
-#define __NR_mbind              303
-#define __NR_get_mempolicy      304
-#define __NR_set_mempolicy      305
-#define __NR_kexec_load         306
-#define __NR_move_pages         307
-#define __NR_getcpu             308
-#define __NR_epoll_pwait        309
-#define __NR_utimensat          310
-#define __NR_signalfd           311
-#define __NR_timerfd_create     312
-#define __NR_eventfd            313
-#define __NR_fallocate          314
-#define __NR_timerfd_settime    315
-#define __NR_timerfd_gettime    316
-#define __NR_signalfd4          317
-#define __NR_eventfd2           318
-#define __NR_epoll_create1      319
-#define __NR_dup3               320
-#define __NR_pipe2              321
-#define __NR_inotify_init1      322
-#define __NR_accept4            323
-
-#define NR_SYSCALLS             324
-
-#ifdef __KERNEL__
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_COMPAT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGSUSPEND
-#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _SPARC64_UNISTD_H */
diff --git a/arch/sparc/kernel/.gitignore b/arch/sparc/kernel/.gitignore
new file mode 100644
index 000000000000..c5f676c3c224
--- /dev/null
+++ b/arch/sparc/kernel/.gitignore
@@ -0,0 +1 @@
+vmlinux.lds
diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile
index 2d6582095099..53adcaa0348b 100644
--- a/arch/sparc/kernel/Makefile
+++ b/arch/sparc/kernel/Makefile
@@ -2,25 +2,98 @@
 # Makefile for the linux kernel.
 #
 
-extra-y         := head.o init_task.o vmlinux.lds
-
-EXTRA_AFLAGS    := -ansi
-
-IRQ_OBJS := irq.o sun4m_irq.o sun4c_irq.o sun4d_irq.o
-obj-y    := entry.o wof.o wuf.o etrap.o rtrap.o traps.o $(IRQ_OBJS) \
-            process.o signal.o ioport.o setup.o idprom.o \
-            sys_sparc.o systbls.o \
-            time.o windows.o cpu.o devices.o \
-            tadpole.o tick14.o ptrace.o \
-            unaligned.o una_asm.o muldiv.o \
-            prom.o of_device.o devres.o dma.o
-
-devres-y = ../../../kernel/irq/devres.o
-
-obj-$(CONFIG_PCI) += pcic.o
-obj-$(CONFIG_SMP) += trampoline.o smp.o sun4m_smp.o sun4d_smp.o
-obj-$(CONFIG_SUN_AUXIO) += auxio.o
-obj-$(CONFIG_SUN_PM) += apc.o pmc.o
-obj-$(CONFIG_MODULES) += module.o sparc_ksyms.o
-obj-$(CONFIG_SPARC_LED) += led.o
-obj-$(CONFIG_KGDB) += kgdb.o
+asflags-y := -ansi
+ccflags-y := -Werror
+
+extra-y     := head_$(BITS).o
+extra-y     += init_task.o
+extra-y     += vmlinux.lds
+
+obj-$(CONFIG_SPARC32)   += entry.o wof.o wuf.o
+obj-$(CONFIG_SPARC32)   += etrap_32.o
+obj-$(CONFIG_SPARC32)   += rtrap_32.o
+obj-y                   += traps_$(BITS).o
+
+# IRQ
+obj-y                   += irq_$(BITS).o
+obj-$(CONFIG_SPARC32)   += sun4m_irq.o sun4c_irq.o sun4d_irq.o
+
+obj-y                   += process_$(BITS).o
+obj-y                   += signal_$(BITS).o
+obj-$(CONFIG_SPARC32)   += ioport.o
+obj-y                   += setup_$(BITS).o
+obj-y                   += idprom.o
+obj-y                   += sys_sparc_$(BITS).o
+obj-$(CONFIG_SPARC32)   += systbls_32.o
+obj-y                   += time_$(BITS).o
+obj-$(CONFIG_SPARC32)   += windows.o
+obj-y                   += cpu.o
+obj-$(CONFIG_SPARC32)   += devices.o
+obj-$(CONFIG_SPARC32)   += tadpole.o
+obj-$(CONFIG_SPARC32)   += tick14.o
+obj-y                   += ptrace_$(BITS).o
+obj-y                   += unaligned_$(BITS).o
+obj-y                   += una_asm_$(BITS).o
+obj-$(CONFIG_SPARC32)   += muldiv.o
+obj-y                   += prom_common.o
+obj-y                   += prom_$(BITS).o
+obj-y                   += of_device_$(BITS).o
+obj-$(CONFIG_SPARC64)   += prom_irqtrans.o
+
+obj-$(CONFIG_SPARC64)   += reboot.o
+obj-$(CONFIG_SPARC64)   += sysfs.o
+obj-$(CONFIG_SPARC64)   += iommu.o
+obj-$(CONFIG_SPARC64)   += central.o
+obj-$(CONFIG_SPARC64)   += starfire.o
+obj-$(CONFIG_SPARC64)   += power.o
+obj-$(CONFIG_SPARC64)   += sbus.o
+obj-$(CONFIG_SPARC64)   += ebus.o
+obj-$(CONFIG_SPARC64)   += visemul.o
+obj-$(CONFIG_SPARC64)   += hvapi.o
+obj-$(CONFIG_SPARC64)   += sstate.o
+obj-$(CONFIG_SPARC64)   += mdesc.o
+
+# sparc32 do not use GENERIC_HARDIRQS but uses the generic devres implementation
+obj-$(CONFIG_SPARC32)     += devres.o
+devres-y                  := ../../../kernel/irq/devres.o
+
+obj-$(CONFIG_SPARC32)     += dma.o
+
+obj-$(CONFIG_SPARC32_PCI) += pcic.o
+
+obj-$(CONFIG_SMP)         += trampoline_$(BITS).o smp_$(BITS).o
+obj-$(CONFIG_SPARC32_SMP) += sun4m_smp.o sun4d_smp.o
+obj-$(CONFIG_SPARC64_SMP) += hvtramp.o
+
+obj-y                     += auxio_$(BITS).o
+obj-$(CONFIG_SUN_PM)      += apc.o pmc.o
+
+obj-$(CONFIG_MODULES)     += module.o
+obj-$(CONFIG_MODULES)     += sparc_ksyms_$(BITS).o
+obj-$(CONFIG_SPARC_LED)   += led.o
+obj-$(CONFIG_KGDB)        += kgdb_$(BITS).o
+
+
+obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
+CFLAGS_REMOVE_ftrace.o := -pg
+
+obj-$(CONFIG_STACKTRACE)     += stacktrace.o
+# sparc64 PCI
+obj-$(CONFIG_SPARC64_PCI)    += pci.o pci_common.o psycho_common.o
+obj-$(CONFIG_SPARC64_PCI)    += pci_psycho.o pci_sabre.o pci_schizo.o
+obj-$(CONFIG_SPARC64_PCI)    += pci_sun4v.o pci_sun4v_asm.o pci_fire.o
+obj-$(CONFIG_PCI_MSI)        += pci_msi.o
+
+obj-$(CONFIG_COMPAT)         += sys32.o sys_sparc32.o signal32.o
+
+# sparc64 cpufreq
+obj-$(CONFIG_US3_FREQ)  += us3_cpufreq.o
+obj-$(CONFIG_US2E_FREQ) += us2e_cpufreq.o
+obj-$(CONFIG_US3_MC)    += chmc.o
+
+obj-$(CONFIG_KPROBES)   += kprobes.o
+obj-$(CONFIG_SUN_LDOMS) += ldc.o vio.o viohs.o ds.o
+
+obj-$(CONFIG_AUDIT)     += audit.o
+audit--$(CONFIG_AUDIT)  := compat_audit.o
+obj-$(CONFIG_COMPAT)    += $(audit--y)
diff --git a/arch/sparc/kernel/asm-offsets.c b/arch/sparc/kernel/asm-offsets.c
index b5bb99ed892c..68f7e1118e9b 100644
--- a/arch/sparc/kernel/asm-offsets.c
+++ b/arch/sparc/kernel/asm-offsets.c
@@ -14,15 +14,28 @@
 // #include <linux/mm.h>
 #include <linux/kbuild.h>
 
-int foo(void)
+#ifdef CONFIG_SPARC32
+int sparc32_foo(void)
 {
-        DEFINE(AOFF_task_thread, offsetof(struct task_struct, thread));
-        BLANK();
         DEFINE(AOFF_thread_fork_kpsr,
                         offsetof(struct thread_struct, fork_kpsr));
+        return 0;
+}
+#else
+int sparc64_foo(void)
+{
+        return 0;
+}
+#endif
+
+int foo(void)
+{
+        BLANK();
+        DEFINE(AOFF_task_thread, offsetof(struct task_struct, thread));
         BLANK();
         DEFINE(AOFF_mm_context, offsetof(struct mm_struct, context));
 
         /* DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28); */
         return 0;
 }
+
diff --git a/arch/sparc64/kernel/audit.c b/arch/sparc/kernel/audit.c
index 8fff0ac63d56..8fff0ac63d56 100644
--- a/arch/sparc64/kernel/audit.c
+++ b/arch/sparc/kernel/audit.c
diff --git a/arch/sparc/kernel/auxio.c b/arch/sparc/kernel/auxio_32.c
index 09c857215a52..09c857215a52 100644
--- a/arch/sparc/kernel/auxio.c
+++ b/arch/sparc/kernel/auxio_32.c
diff --git a/arch/sparc64/kernel/auxio.c b/arch/sparc/kernel/auxio_64.c
index 858beda86524..8b67347d4221 100644
--- a/arch/sparc64/kernel/auxio.c
+++ b/arch/sparc/kernel/auxio_64.c
@@ -27,73 +27,55 @@ enum auxio_type {
 static enum auxio_type auxio_devtype = AUXIO_TYPE_NODEV;
 static DEFINE_SPINLOCK(auxio_lock);
 
-static void __auxio_sbus_set(u8 bits_on, u8 bits_off)
+static void __auxio_rmw(u8 bits_on, u8 bits_off, int ebus)
 {
         if (auxio_register) {
-                unsigned char regval;
                 unsigned long flags;
-                unsigned char newval;
+                u8 regval, newval;
 
                 spin_lock_irqsave(&auxio_lock, flags);
 
-                regval =  sbus_readb(auxio_register);
+                regval = (ebus ?
+                          (u8) readl(auxio_register) :
+                          sbus_readb(auxio_register));
                 newval =  regval | bits_on;
                 newval &= ~bits_off;
-                newval &= ~AUXIO_AUX1_MASK;
-                sbus_writeb(newval, auxio_register);
+                if (!ebus)
+                        newval &= ~AUXIO_AUX1_MASK;
+                if (ebus)
+                        writel((u32) newval, auxio_register);
+                else
+                        sbus_writeb(newval, auxio_register);
                 
                 spin_unlock_irqrestore(&auxio_lock, flags);
         }
 }
 
-static void __auxio_ebus_set(u8 bits_on, u8 bits_off)
+static void __auxio_set_bit(u8 bit, int on, int ebus)
 {
-        if (auxio_register) {
-                unsigned char regval;
-                unsigned long flags;
-                unsigned char newval;
-
-                spin_lock_irqsave(&auxio_lock, flags);
-
-                regval =  (u8)readl(auxio_register);
-                newval =  regval | bits_on;
-                newval &= ~bits_off;
-                writel((u32)newval, auxio_register);
+        u8 bits_on = (ebus ? AUXIO_PCIO_LED : AUXIO_AUX1_LED);
+        u8 bits_off = 0;
 
-                spin_unlock_irqrestore(&auxio_lock, flags);
+        if (!on) {
+                u8 tmp = bits_off;
+                bits_off = bits_on;
+                bits_on = tmp;
         }
-}
-
-static inline void __auxio_ebus_set_led(int on)
-{
-        (on) ? __auxio_ebus_set(AUXIO_PCIO_LED, 0) :
-                __auxio_ebus_set(0, AUXIO_PCIO_LED) ;
-}
-
-static inline void __auxio_sbus_set_led(int on)
-{
-        (on) ? __auxio_sbus_set(AUXIO_AUX1_LED, 0) :
-                __auxio_sbus_set(0, AUXIO_AUX1_LED) ;
+        __auxio_rmw(bits_on, bits_off, ebus);
 }
 
 void auxio_set_led(int on)
 {
-        switch(auxio_devtype) {
-        case AUXIO_TYPE_SBUS:
-                __auxio_sbus_set_led(on);
-                break;
-        case AUXIO_TYPE_EBUS:
-                __auxio_ebus_set_led(on);
-                break;
-        default:
-                break;
-        }
+        int ebus = auxio_devtype == AUXIO_TYPE_EBUS;
+        u8 bit;
+
+        bit = (ebus ? AUXIO_PCIO_LED : AUXIO_AUX1_LED);
+        __auxio_set_bit(bit, on, ebus);
 }
 
-static inline void __auxio_sbus_set_lte(int on)
+static void __auxio_sbus_set_lte(int on)
 {
-        (on) ? __auxio_sbus_set(AUXIO_AUX1_LTE, 0) : 
-                __auxio_sbus_set(0, AUXIO_AUX1_LTE) ;
+        __auxio_set_bit(AUXIO_AUX1_LTE, on, 0);
 }
 
 void auxio_set_lte(int on)
diff --git a/arch/sparc64/kernel/central.c b/arch/sparc/kernel/central.c
index 05f1c916db06..05f1c916db06 100644
--- a/arch/sparc64/kernel/central.c
+++ b/arch/sparc/kernel/central.c
diff --git a/arch/sparc64/kernel/cherrs.S b/arch/sparc/kernel/cherrs.S
index 89afebd7eca0..4ee1ad420862 100644
--- a/arch/sparc64/kernel/cherrs.S
+++ b/arch/sparc/kernel/cherrs.S
@@ -102,7 +102,7 @@ cheetah_plus_dcpe_trap_vector:
         .type           do_cheetah_plus_data_parity,#function
 do_cheetah_plus_data_parity:
         rdpr            %pil, %g2
-        wrpr            %g0, 15, %pil
+        wrpr            %g0, PIL_NORMAL_MAX, %pil
         ba,pt           %xcc, etrap_irq
          rd             %pc, %g7
 #ifdef CONFIG_TRACE_IRQFLAGS
@@ -144,7 +144,7 @@ cheetah_plus_icpe_trap_vector:
         .type           do_cheetah_plus_insn_parity,#function
 do_cheetah_plus_insn_parity:
         rdpr            %pil, %g2
-        wrpr            %g0, 15, %pil
+        wrpr            %g0, PIL_NORMAL_MAX, %pil
         ba,pt           %xcc, etrap_irq
          rd             %pc, %g7
 #ifdef CONFIG_TRACE_IRQFLAGS
@@ -492,7 +492,7 @@ cheetah_fast_ecc:
         .type           c_fast_ecc,#function
 c_fast_ecc:
         rdpr            %pil, %g2
-        wrpr            %g0, 15, %pil
+        wrpr            %g0, PIL_NORMAL_MAX, %pil
         ba,pt           %xcc, etrap_irq
          rd             %pc, %g7
 #ifdef CONFIG_TRACE_IRQFLAGS
@@ -528,7 +528,7 @@ cheetah_cee:
         .type           c_cee,#function
 c_cee:
         rdpr            %pil, %g2
-        wrpr            %g0, 15, %pil
+        wrpr            %g0, PIL_NORMAL_MAX, %pil
         ba,pt           %xcc, etrap_irq
          rd             %pc, %g7
 #ifdef CONFIG_TRACE_IRQFLAGS
@@ -564,7 +564,7 @@ cheetah_deferred_trap:
         .type           c_deferred,#function
 c_deferred:
         rdpr            %pil, %g2
-        wrpr            %g0, 15, %pil
+        wrpr            %g0, PIL_NORMAL_MAX, %pil
         ba,pt           %xcc, etrap_irq
          rd             %pc, %g7
 #ifdef CONFIG_TRACE_IRQFLAGS
diff --git a/arch/sparc64/kernel/chmc.c b/arch/sparc/kernel/chmc.c
index 3b9f4d6e14a9..3b9f4d6e14a9 100644
--- a/arch/sparc64/kernel/chmc.c
+++ b/arch/sparc/kernel/chmc.c
diff --git a/arch/sparc64/kernel/compat_audit.c b/arch/sparc/kernel/compat_audit.c
index c831b0a4e660..d865575b25bf 100644
--- a/arch/sparc64/kernel/compat_audit.c
+++ b/arch/sparc/kernel/compat_audit.c
@@ -1,4 +1,5 @@
-#include <asm/unistd_32.h>
+#define __32bit_syscall_numbers__
+#include <asm/unistd.h>
 
 unsigned sparc32_dir_class[] = {
 #include <asm-generic/audit_dir_write.h>
diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c
index 1fc17f59c6bf..6c2da2420f76 100644
--- a/arch/sparc/kernel/cpu.c
+++ b/arch/sparc/kernel/cpu.c
@@ -8,6 +8,8 @@
 #include <linux/init.h>
 #include <linux/smp.h>
 #include <linux/threads.h>
+
+#include <asm/spitfire.h>
 #include <asm/oplib.h>
 #include <asm/page.h>
 #include <asm/head.h>
@@ -15,153 +17,322 @@
 #include <asm/mbus.h>
 #include <asm/cpudata.h>
 
+#include "kernel.h"
+
 DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
 
-struct cpu_iu_info {
-  int psr_impl;
-  int psr_vers;
-  char* cpu_name;   /* should be enough I hope... */
+struct cpu_info {
+        int psr_vers;
+        const char *name;
+};
+
+struct fpu_info {
+        int fp_vers;
+        const char *name;
 };
 
-struct cpu_fp_info {
-  int psr_impl;
-  int fp_vers;
-  char* fp_name;
+#define NOCPU 8
+#define NOFPU 8
+
+struct manufacturer_info {
+        int psr_impl;
+        struct cpu_info cpu_info[NOCPU];
+        struct fpu_info fpu_info[NOFPU];
 };
 
+#define CPU(ver, _name) \
+{ .psr_vers = ver, .name = _name }
+
+#define FPU(ver, _name) \
+{ .fp_vers = ver, .name = _name }
+
+static const struct manufacturer_info __initconst manufacturer_info[] = {
+{
+        0,
+        /* Sun4/100, 4/200, SLC */
+        .cpu_info = {
+                CPU(0, "Fujitsu  MB86900/1A or LSI L64831 SparcKIT-40"),
+                /* borned STP1012PGA */
+                CPU(4,  "Fujitsu  MB86904"),
+                CPU(5, "Fujitsu TurboSparc MB86907"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(0, "Fujitsu MB86910 or Weitek WTL1164/5"),
+                FPU(1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"),
+                FPU(2, "LSI Logic L64802 or Texas Instruments ACT8847"),
+                /* SparcStation SLC, SparcStation1 */
+                FPU(3, "Weitek WTL3170/2"),
+                /* SPARCstation-5 */
+                FPU(4, "Lsi Logic/Meiko L64804 or compatible"),
+                FPU(-1, NULL)
+        }
+},{
+        1,
+        .cpu_info = {
+                /* SparcStation2, SparcServer 490 & 690 */
+                CPU(0, "LSI Logic Corporation - L64811"),
+                /* SparcStation2 */
+                CPU(1, "Cypress/ROSS CY7C601"),
+                /* Embedded controller */
+                CPU(3, "Cypress/ROSS CY7C611"),
+                /* Ross Technologies HyperSparc */
+                CPU(0xf, "ROSS HyperSparc RT620"),
+                CPU(0xe, "ROSS HyperSparc RT625 or RT626"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(0, "ROSS HyperSparc combined IU/FPU"),
+                FPU(1, "Lsi Logic L64814"),
+                FPU(2, "Texas Instruments TMS390-C602A"),
+                FPU(3, "Cypress CY7C602 FPU"),
+                FPU(-1, NULL)
+        }
+},{
+        2,
+        .cpu_info = {
+                /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */
+                /* Someone please write the code to support this beast! ;) */
+                CPU(0, "Bipolar Integrated Technology - B5010"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(-1, NULL)
+        }
+},{
+        3,
+        .cpu_info = {
+                CPU(0, "LSI Logic Corporation - unknown-type"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(-1, NULL)
+        }
+},{
+        4,
+        .cpu_info = {
+                CPU(0, "Texas Instruments, Inc. - SuperSparc-(II)"),
+                /* SparcClassic  --  borned STP1010TAB-50*/
+                CPU(1, "Texas Instruments, Inc. - MicroSparc"),
+                CPU(2, "Texas Instruments, Inc. - MicroSparc II"),
+                CPU(3, "Texas Instruments, Inc. - SuperSparc 51"),
+                CPU(4, "Texas Instruments, Inc. - SuperSparc 61"),
+                CPU(5, "Texas Instruments, Inc. - unknown"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                /* SuperSparc 50 module */
+                FPU(0, "SuperSparc on-chip FPU"),
+                /* SparcClassic */
+                FPU(4, "TI MicroSparc on chip FPU"),
+                FPU(-1, NULL)
+        }
+},{
+        5,
+        .cpu_info = {
+                CPU(0, "Matsushita - MN10501"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(0, "Matsushita MN10501"),
+                FPU(-1, NULL)
+        }
+},{
+        6,
+        .cpu_info = {
+                CPU(0, "Philips Corporation - unknown"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(-1, NULL)
+        }
+},{
+        7,
+        .cpu_info = {
+                CPU(0, "Harvest VLSI Design Center, Inc. - unknown"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(-1, NULL)
+        }
+},{
+        8,
+        .cpu_info = {
+                CPU(0, "Systems and Processes Engineering Corporation (SPEC)"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(-1, NULL)
+        }
+},{
+        9,
+        .cpu_info = {
+                /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */
+                CPU(0, "Fujitsu or Weitek Power-UP"),
+                CPU(1, "Fujitsu or Weitek Power-UP"),
+                CPU(2, "Fujitsu or Weitek Power-UP"),
+                CPU(3, "Fujitsu or Weitek Power-UP"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(3, "Fujitsu or Weitek on-chip FPU"),
+                FPU(-1, NULL)
+        }
+},{
+        0x17,
+        .cpu_info = {
+                CPU(0x10, "TI UltraSparc I   (SpitFire)"),
+                CPU(0x11, "TI UltraSparc II  (BlackBird)"),
+                CPU(0x12, "TI UltraSparc IIi (Sabre)"),
+                CPU(0x13, "TI UltraSparc IIe (Hummingbird)"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(0x10, "UltraSparc I integrated FPU"),
+                FPU(0x11, "UltraSparc II integrated FPU"),
+                FPU(0x12, "UltraSparc IIi integrated FPU"),
+                FPU(0x13, "UltraSparc IIe integrated FPU"),
+                FPU(-1, NULL)
+        }
+},{
+        0x22,
+        .cpu_info = {
+                CPU(0x10, "TI UltraSparc I   (SpitFire)"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(0x10, "UltraSparc I integrated FPU"),
+                FPU(-1, NULL)
+        }
+},{
+        0x3e,
+        .cpu_info = {
+                CPU(0x14, "TI UltraSparc III (Cheetah)"),
+                CPU(0x15, "TI UltraSparc III+ (Cheetah+)"),
+                CPU(0x16, "TI UltraSparc IIIi (Jalapeno)"),
+                CPU(0x18, "TI UltraSparc IV (Jaguar)"),
+                CPU(0x19, "TI UltraSparc IV+ (Panther)"),
+                CPU(0x22, "TI UltraSparc IIIi+ (Serrano)"),
+                CPU(-1, NULL)
+        },
+        .fpu_info = {
+                FPU(0x14, "UltraSparc III integrated FPU"),
+                FPU(0x15, "UltraSparc III+ integrated FPU"),
+                FPU(0x16, "UltraSparc IIIi integrated FPU"),
+                FPU(0x18, "UltraSparc IV integrated FPU"),
+                FPU(0x19, "UltraSparc IV+ integrated FPU"),
+                FPU(0x22, "UltraSparc IIIi+ integrated FPU"),
+                FPU(-1, NULL)
+        }
+}};
+
 /* In order to get the fpu type correct, you need to take the IDPROM's
  * machine type value into consideration too.  I will fix this.
  */
-static struct cpu_fp_info linux_sparc_fpu[] = {
-  { 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"},
-  { 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"},
-  { 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"},
-  /* SparcStation SLC, SparcStation1 */
-  { 0, 3, "Weitek WTL3170/2"},
-  /* SPARCstation-5 */
-  { 0, 4, "Lsi Logic/Meiko L64804 or compatible"},
-  { 0, 5, "reserved"},
-  { 0, 6, "reserved"},
-  { 0, 7, "No FPU"},
-  { 1, 0, "ROSS HyperSparc combined IU/FPU"},
-  { 1, 1, "Lsi Logic L64814"},
-  { 1, 2, "Texas Instruments TMS390-C602A"},
-  { 1, 3, "Cypress CY7C602 FPU"},
-  { 1, 4, "reserved"},
-  { 1, 5, "reserved"},
-  { 1, 6, "reserved"},
-  { 1, 7, "No FPU"},
-  { 2, 0, "BIT B5010 or B5110/20 or B5210"},
-  { 2, 1, "reserved"},
-  { 2, 2, "reserved"},
-  { 2, 3, "reserved"},
-  { 2, 4, "reserved"},
-  { 2, 5, "reserved"},
-  { 2, 6, "reserved"},
-  { 2, 7, "No FPU"},
-  /* SuperSparc 50 module */
-  { 4, 0, "SuperSparc on-chip FPU"},
-  /* SparcClassic */
-  { 4, 4, "TI MicroSparc on chip FPU"},
-  { 5, 0, "Matsushita MN10501"},
-  { 5, 1, "reserved"},
-  { 5, 2, "reserved"},
-  { 5, 3, "reserved"},
-  { 5, 4, "reserved"},
-  { 5, 5, "reserved"},
-  { 5, 6, "reserved"},
-  { 5, 7, "No FPU"},
-  { 9, 3, "Fujitsu or Weitek on-chip FPU"},
-};
 
-#define NSPARCFPU  ARRAY_SIZE(linux_sparc_fpu)
-
-static struct cpu_iu_info linux_sparc_chips[] = {
-  /* Sun4/100, 4/200, SLC */
-  { 0, 0, "Fujitsu  MB86900/1A or LSI L64831 SparcKIT-40"},
-  /* borned STP1012PGA */
-  { 0, 4, "Fujitsu  MB86904"},
-  { 0, 5, "Fujitsu TurboSparc MB86907"},
-  /* SparcStation2, SparcServer 490 & 690 */
-  { 1, 0, "LSI Logic Corporation - L64811"},
-  /* SparcStation2 */
-  { 1, 1, "Cypress/ROSS CY7C601"},
-  /* Embedded controller */
-  { 1, 3, "Cypress/ROSS CY7C611"},
-  /* Ross Technologies HyperSparc */
-  { 1, 0xf, "ROSS HyperSparc RT620"},
-  { 1, 0xe, "ROSS HyperSparc RT625 or RT626"},
-  /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */
-  /* Someone please write the code to support this beast! ;) */
-  { 2, 0, "Bipolar Integrated Technology - B5010"},
-  { 3, 0, "LSI Logic Corporation - unknown-type"},
-  { 4, 0, "Texas Instruments, Inc. - SuperSparc-(II)"},
-  /* SparcClassic  --  borned STP1010TAB-50*/
-  { 4, 1, "Texas Instruments, Inc. - MicroSparc"},
-  { 4, 2, "Texas Instruments, Inc. - MicroSparc II"},
-  { 4, 3, "Texas Instruments, Inc. - SuperSparc 51"},
-  { 4, 4, "Texas Instruments, Inc. - SuperSparc 61"},
-  { 4, 5, "Texas Instruments, Inc. - unknown"},
-  { 5, 0, "Matsushita - MN10501"},
-  { 6, 0, "Philips Corporation - unknown"},
-  { 7, 0, "Harvest VLSI Design Center, Inc. - unknown"},
-  /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */
-  { 8, 0, "Systems and Processes Engineering Corporation (SPEC)"},
-  { 9, 0, "Fujitsu or Weitek Power-UP"},
-  { 9, 1, "Fujitsu or Weitek Power-UP"},
-  { 9, 2, "Fujitsu or Weitek Power-UP"},
-  { 9, 3, "Fujitsu or Weitek Power-UP"},
-  { 0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"},
-  { 0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"},
-  { 0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"},
-  { 0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"},
-  { 0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"},
-  { 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"},
-};
+const char *sparc_cpu_type;
+const char *sparc_fpu_type;
 
-#define NSPARCCHIPS  ARRAY_SIZE(linux_sparc_chips)
+unsigned int fsr_storage;
 
-char *sparc_cpu_type;
-char *sparc_fpu_type;
+static void set_cpu_and_fpu(int psr_impl, int psr_vers, int fpu_vers)
+{
+        sparc_cpu_type = NULL;
+        sparc_fpu_type = NULL;
+        if (psr_impl < ARRAY_SIZE(manufacturer_info))
+        {
+                const struct cpu_info *cpu;
+                const struct fpu_info *fpu;
 
-unsigned int fsr_storage;
+                cpu = &manufacturer_info[psr_impl].cpu_info[0];
+                while (cpu->psr_vers != -1)
+                {
+                        if (cpu->psr_vers == psr_vers) {
+                                sparc_cpu_type = cpu->name;
+                                sparc_fpu_type = "No FPU";
+                                break;
+                        }
+                        cpu++;
+                }
+                fpu =  &manufacturer_info[psr_impl].fpu_info[0];
+                while (fpu->fp_vers != -1)
+                {
+                        if (fpu->fp_vers == fpu_vers) {
+                                sparc_fpu_type = fpu->name;
+                                break;
+                        }
+                        fpu++;
+                }
+        }
+        if (sparc_cpu_type == NULL)
+        {
+                printk(KERN_ERR "CPU: Unknown chip, impl[0x%x] vers[0x%x]\n",
+                       psr_impl, psr_vers);
+                sparc_cpu_type = "Unknown CPU";
+        }
+        if (sparc_fpu_type == NULL)
+        {
+                printk(KERN_ERR "FPU: Unknown chip, impl[0x%x] vers[0x%x]\n",
+                       psr_impl, fpu_vers);
+                sparc_fpu_type = "Unknown FPU";
+        }
+}
 
+#ifdef CONFIG_SPARC32
 void __cpuinit cpu_probe(void)
 {
         int psr_impl, psr_vers, fpu_vers;
-        int i, psr;
+        int psr;
 
-        psr_impl = ((get_psr()>>28)&0xf);
-        psr_vers = ((get_psr()>>24)&0xf);
+        psr_impl = ((get_psr() >> 28) & 0xf);
+        psr_vers = ((get_psr() >> 24) & 0xf);
 
         psr = get_psr();
         put_psr(psr | PSR_EF);
-        fpu_vers = ((get_fsr()>>17)&0x7);
+        fpu_vers = ((get_fsr() >> 17) & 0x7);
         put_psr(psr);
 
-        for(i = 0; i<NSPARCCHIPS; i++) {
-                if(linux_sparc_chips[i].psr_impl == psr_impl)
-                        if(linux_sparc_chips[i].psr_vers == psr_vers) {
-                                sparc_cpu_type = linux_sparc_chips[i].cpu_name;
-                                break;
-                        }
-        }
+        set_cpu_and_fpu(psr_impl, psr_vers, fpu_vers);
+}
+#else
+static void __init sun4v_cpu_probe(void)
+{
+        switch (sun4v_chip_type) {
+        case SUN4V_CHIP_NIAGARA1:
+                sparc_cpu_type = "UltraSparc T1 (Niagara)";
+                sparc_fpu_type = "UltraSparc T1 integrated FPU";
+                break;
 
-        if(i==NSPARCCHIPS)
-                printk("DEBUG: psr.impl = 0x%x   psr.vers = 0x%x\n", psr_impl, 
-                            psr_vers);
+        case SUN4V_CHIP_NIAGARA2:
+                sparc_cpu_type = "UltraSparc T2 (Niagara2)";
+                sparc_fpu_type = "UltraSparc T2 integrated FPU";
+                break;
 
-        for(i = 0; i<NSPARCFPU; i++) {
-                if(linux_sparc_fpu[i].psr_impl == psr_impl)
-                        if(linux_sparc_fpu[i].fp_vers == fpu_vers) {
-                                sparc_fpu_type = linux_sparc_fpu[i].fp_name;
-                                break;
-                        }
+        default:
+                printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n",
+                       prom_cpu_compatible);
+                sparc_cpu_type = "Unknown SUN4V CPU";
+                sparc_fpu_type = "Unknown SUN4V FPU";
+                break;
         }
+}
+
+static int __init cpu_type_probe(void)
+{
+        if (tlb_type == hypervisor) {
+                sun4v_cpu_probe();
+        } else {
+                unsigned long ver;
+                int manuf, impl;
 
-        if(i == NSPARCFPU) {
-                printk("DEBUG: psr.impl = 0x%x  fsr.vers = 0x%x\n", psr_impl,
-                            fpu_vers);
-                sparc_fpu_type = linux_sparc_fpu[31].fp_name;
+                __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
+
+                manuf = ((ver >> 48) & 0xffff);
+                impl = ((ver >> 32) & 0xffff);
+                set_cpu_and_fpu(manuf, impl, impl);
         }
+        return 0;
 }
+
+arch_initcall(cpu_type_probe);
+#endif
diff --git a/arch/sparc/kernel/devices.c b/arch/sparc/kernel/devices.c
index ad656b044b8c..b171ae8de90d 100644
--- a/arch/sparc/kernel/devices.c
+++ b/arch/sparc/kernel/devices.c
@@ -133,14 +133,12 @@ void __init device_scan(void)
 #endif /* !CONFIG_SMP */
 
         cpu_probe();
-#ifdef CONFIG_SUN_AUXIO
         {
                 extern void auxio_probe(void);
                 extern void auxio_power_probe(void);
                 auxio_probe();
                 auxio_power_probe();
         }
-#endif
         clock_stop_probe();
 
         if (ARCH_SUN4C)
diff --git a/arch/sparc64/kernel/ds.c b/arch/sparc/kernel/ds.c
index f52e0534d91d..f52e0534d91d 100644
--- a/arch/sparc64/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
diff --git a/arch/sparc64/kernel/dtlb_miss.S b/arch/sparc/kernel/dtlb_miss.S
index 09a6a15a7105..09a6a15a7105 100644
--- a/arch/sparc64/kernel/dtlb_miss.S
+++ b/arch/sparc/kernel/dtlb_miss.S
diff --git a/arch/sparc64/kernel/dtlb_prot.S b/arch/sparc/kernel/dtlb_prot.S
index b2c2c5be281c..b2c2c5be281c 100644
--- a/arch/sparc64/kernel/dtlb_prot.S
+++ b/arch/sparc/kernel/dtlb_prot.S
diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc/kernel/ebus.c
index 77dbf6d45faf..77dbf6d45faf 100644
--- a/arch/sparc64/kernel/ebus.c
+++ b/arch/sparc/kernel/ebus.c
diff --git a/arch/sparc64/kernel/entry.h b/arch/sparc/kernel/entry.h
index 34d7ab5e10d2..4f53a2395ac6 100644
--- a/arch/sparc64/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -5,9 +5,43 @@
 #include <linux/types.h>
 #include <linux/init.h>
 
-extern const char *sparc_cpu_type;
-extern const char *sparc_fpu_type;
+/* irq */
+extern void handler_irq(int irq, struct pt_regs *regs);
 
+#ifdef CONFIG_SPARC32
+/* traps */
+extern void do_hw_interrupt(struct pt_regs *regs, unsigned long type);
+extern void do_illegal_instruction(struct pt_regs *regs, unsigned long pc,
+                                   unsigned long npc, unsigned long psr);
+
+extern void do_priv_instruction(struct pt_regs *regs, unsigned long pc,
+                                unsigned long npc, unsigned long psr);
+extern void do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc,
+                                   unsigned long npc,
+                                   unsigned long psr);
+extern void do_fpd_trap(struct pt_regs *regs, unsigned long pc,
+                        unsigned long npc, unsigned long psr);
+extern void do_fpe_trap(struct pt_regs *regs, unsigned long pc,
+                        unsigned long npc, unsigned long psr);
+extern void handle_tag_overflow(struct pt_regs *regs, unsigned long pc,
+                                unsigned long npc, unsigned long psr);
+extern void handle_watchpoint(struct pt_regs *regs, unsigned long pc,
+                              unsigned long npc, unsigned long psr);
+extern void handle_reg_access(struct pt_regs *regs, unsigned long pc,
+                              unsigned long npc, unsigned long psr);
+extern void handle_cp_disabled(struct pt_regs *regs, unsigned long pc,
+                               unsigned long npc, unsigned long psr);
+extern void handle_cp_exception(struct pt_regs *regs, unsigned long pc,
+                                unsigned long npc, unsigned long psr);
+
+
+
+/* entry.S */
+extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
+                   void *fpqueue, unsigned long *fpqdepth);
+extern void fpload(unsigned long *fpregs, unsigned long *fsr);
+
+#else /* CONFIG_SPARC32 */
 extern void __init per_cpu_patch(void);
 extern void __init sun4v_patch(void);
 extern void __init boot_cpu_id_too_large(int cpu);
@@ -188,8 +222,8 @@ struct ino_bucket {
 extern struct ino_bucket *ivector_table;
 extern unsigned long ivector_table_pa;
 
-extern void handler_irq(int irq, struct pt_regs *regs);
 extern void init_irqwork_curcpu(void);
 extern void __cpuinit sun4v_register_mondo_queues(int this_cpu);
 
+#endif /* CONFIG_SPARC32 */
 #endif /* _ENTRY_H */
diff --git a/arch/sparc/kernel/etrap.S b/arch/sparc/kernel/etrap_32.S
index e806fcdc46db..e806fcdc46db 100644
--- a/arch/sparc/kernel/etrap.S
+++ b/arch/sparc/kernel/etrap_32.S
diff --git a/arch/sparc64/kernel/etrap.S b/arch/sparc/kernel/etrap_64.S
index 29ce489bc188..786b185e6e3f 100644
--- a/arch/sparc64/kernel/etrap.S
+++ b/arch/sparc/kernel/etrap_64.S
@@ -16,9 +16,9 @@
 #include <asm/mmu.h>
 
 #define         TASK_REGOFF             (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ)
-#define         ETRAP_PSTATE1           (PSTATE_RMO | PSTATE_PRIV)
+#define         ETRAP_PSTATE1           (PSTATE_TSO | PSTATE_PRIV)
 #define         ETRAP_PSTATE2           \
-                (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
+                (PSTATE_TSO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
 
 /*
  * On entry, %g7 is return address - 0x4.
@@ -130,7 +130,7 @@ etrap_save:	save	%g2, -STACK_BIAS, %sp
                 stx     %g6, [%sp + PTREGS_OFF + PT_V9_G6]
                 stx     %g7, [%sp + PTREGS_OFF + PT_V9_G7]
                 or      %l7, %l0, %l7
-                sethi   %hi(TSTATE_RMO | TSTATE_PEF), %l0
+                sethi   %hi(TSTATE_TSO | TSTATE_PEF), %l0
                 or      %l7, %l0, %l7
                 wrpr    %l2, %tnpc
                 wrpr    %l7, (TSTATE_PRIV | TSTATE_IE), %tstate
diff --git a/arch/sparc64/kernel/fpu_traps.S b/arch/sparc/kernel/fpu_traps.S
index a6864826a4bd..a6864826a4bd 100644
--- a/arch/sparc64/kernel/fpu_traps.S
+++ b/arch/sparc/kernel/fpu_traps.S
diff --git a/arch/sparc64/kernel/ftrace.c b/arch/sparc/kernel/ftrace.c
index d0218e73f982..d0218e73f982 100644
--- a/arch/sparc64/kernel/ftrace.c
+++ b/arch/sparc/kernel/ftrace.c
diff --git a/arch/sparc64/kernel/getsetcc.S b/arch/sparc/kernel/getsetcc.S
index a14d272d2061..a14d272d2061 100644
--- a/arch/sparc64/kernel/getsetcc.S
+++ b/arch/sparc/kernel/getsetcc.S
diff --git a/arch/sparc/kernel/head.S b/arch/sparc/kernel/head_32.S
index 51b40426f9c6..f0b4b516304f 100644
--- a/arch/sparc/kernel/head.S
+++ b/arch/sparc/kernel/head_32.S
@@ -990,7 +990,7 @@ sun4c_continue_boot:
 
                 /* Zero out our BSS section. */
                 set     __bss_start , %o0       ! First address of BSS
-                set     end , %o1               ! Last address of BSS
+                set     _end , %o1              ! Last address of BSS
                 add     %o0, 0x1, %o0
 1:      
                 stb     %g0, [%o0]
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc/kernel/head_64.S
index 353226fa0239..8ffee714f932 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc/kernel/head_64.S
@@ -706,7 +706,7 @@ setup_trap_table:
         andn    %l0, PSTATE_IE, %o1
         wrpr    %o1, 0x0, %pstate
         rdpr    %pil, %l1
-        wrpr    %g0, 15, %pil
+        wrpr    %g0, PIL_NORMAL_MAX, %pil
 
         /* Make the firmware call to jump over to the Linux trap table.  */
         sethi   %hi(is_sun4v), %o0
@@ -825,8 +825,8 @@ setup_tba:
          restore
 sparc64_boot_end:
 
-#include "etrap.S"
-#include "rtrap.S"
+#include "etrap_64.S"
+#include "rtrap_64.S"
 #include "winfixup.S"
 #include "fpu_traps.S"
 #include "ivec.S"
@@ -882,7 +882,7 @@ swapper_4m_tsb:
 
 ! 0x0000000000428000
 
-#include "systbls.S"
+#include "systbls_64.S"
 
         .data
         .align  8
diff --git a/arch/sparc64/kernel/helpers.S b/arch/sparc/kernel/helpers.S
index 314dd0c9fc5b..314dd0c9fc5b 100644
--- a/arch/sparc64/kernel/helpers.S
+++ b/arch/sparc/kernel/helpers.S
diff --git a/arch/sparc64/kernel/hvapi.c b/arch/sparc/kernel/hvapi.c
index 1d272c3b5740..1d272c3b5740 100644
--- a/arch/sparc64/kernel/hvapi.c
+++ b/arch/sparc/kernel/hvapi.c
diff --git a/arch/sparc64/kernel/hvcalls.S b/arch/sparc/kernel/hvcalls.S
index e066269d1594..8a5f35ffb15e 100644
--- a/arch/sparc64/kernel/hvcalls.S
+++ b/arch/sparc/kernel/hvcalls.S
@@ -766,3 +766,35 @@ ENTRY(sun4v_mmu_demap_all)
         retl
          nop
 ENDPROC(sun4v_mmu_demap_all)
+
+ENTRY(sun4v_niagara_getperf)
+        mov     %o0, %o4
+        mov     HV_FAST_GET_PERFREG, %o5
+        ta      HV_FAST_TRAP
+        stx     %o1, [%o4]
+        retl
+         nop
+ENDPROC(sun4v_niagara_getperf)
+
+ENTRY(sun4v_niagara_setperf)
+        mov     HV_FAST_SET_PERFREG, %o5
+        ta      HV_FAST_TRAP
+        retl
+         nop
+ENDPROC(sun4v_niagara_setperf)
+
+ENTRY(sun4v_niagara2_getperf)
+        mov     %o0, %o4
+        mov     HV_FAST_N2_GET_PERFREG, %o5
+        ta      HV_FAST_TRAP
+        stx     %o1, [%o4]
+        retl
+         nop
+ENDPROC(sun4v_niagara2_getperf)
+
+ENTRY(sun4v_niagara2_setperf)
+        mov     HV_FAST_N2_SET_PERFREG, %o5
+        ta      HV_FAST_TRAP
+        retl
+         nop
+ENDPROC(sun4v_niagara2_setperf)
diff --git a/arch/sparc64/kernel/hvtramp.S b/arch/sparc/kernel/hvtramp.S
index 0236c43772fa..9365432904d6 100644
--- a/arch/sparc64/kernel/hvtramp.S
+++ b/arch/sparc/kernel/hvtramp.S
@@ -1,6 +1,6 @@
 /* hvtramp.S: Hypervisor start-cpu trampoline code.
  *
- * Copyright (C) 2007 David S. Miller <davem@davemloft.net>
+ * Copyright (C) 2007, 2008 David S. Miller <davem@davemloft.net>
  */
 
 #include <linux/init.h>
@@ -14,6 +14,7 @@
 #include <asm/ptrace.h>
 #include <asm/head.h>
 #include <asm/asi.h>
+#include <asm/pil.h>
 
         __CPUINIT
         .align          8
@@ -32,7 +33,7 @@
          */
 hv_cpu_startup:
         SET_GL(0)
-        wrpr            %g0, 15, %pil
+        wrpr            %g0, PIL_NORMAL_MAX, %pil
         wrpr            %g0, 0, %canrestore
         wrpr            %g0, 0, %otherwin
         wrpr            %g0, 6, %cansave
diff --git a/arch/sparc/kernel/idprom.c b/arch/sparc/kernel/idprom.c
index 223a6582e1e2..c16135e0c151 100644
--- a/arch/sparc/kernel/idprom.c
+++ b/arch/sparc/kernel/idprom.c
@@ -11,35 +11,37 @@
 
 #include <asm/oplib.h>
 #include <asm/idprom.h>
-#include <asm/machines.h>  /* Fun with Sun released architectures. */
 
 struct idprom *idprom;
 static struct idprom idprom_buffer;
 
+#ifdef CONFIG_SPARC32
+#include <asm/machines.h>  /* Fun with Sun released architectures. */
+
 /* Here is the master table of Sun machines which use some implementation
  * of the Sparc CPU and have a meaningful IDPROM machtype value that we
  * know about.  See asm-sparc/machines.h for empirical constants.
  */
 static struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES] = {
 /* First, Sun4's */
-{ "Sun 4/100 Series", (SM_SUN4 | SM_4_110) },
-{ "Sun 4/200 Series", (SM_SUN4 | SM_4_260) },
-{ "Sun 4/300 Series", (SM_SUN4 | SM_4_330) },
-{ "Sun 4/400 Series", (SM_SUN4 | SM_4_470) },
+{ .name = "Sun 4/100 Series",        .id_machtype = (SM_SUN4 | SM_4_110) },
+{ .name = "Sun 4/200 Series",        .id_machtype = (SM_SUN4 | SM_4_260) },
+{ .name = "Sun 4/300 Series",        .id_machtype = (SM_SUN4 | SM_4_330) },
+{ .name = "Sun 4/400 Series",        .id_machtype = (SM_SUN4 | SM_4_470) },
 /* Now, Sun4c's */
-{ "Sun4c SparcStation 1", (SM_SUN4C | SM_4C_SS1) },
-{ "Sun4c SparcStation IPC", (SM_SUN4C | SM_4C_IPC) },
-{ "Sun4c SparcStation 1+", (SM_SUN4C | SM_4C_SS1PLUS) },
-{ "Sun4c SparcStation SLC", (SM_SUN4C | SM_4C_SLC) },
-{ "Sun4c SparcStation 2", (SM_SUN4C | SM_4C_SS2) },
-{ "Sun4c SparcStation ELC", (SM_SUN4C | SM_4C_ELC) },
-{ "Sun4c SparcStation IPX", (SM_SUN4C | SM_4C_IPX) },
+{ .name = "Sun4c SparcStation 1",    .id_machtype = (SM_SUN4C | SM_4C_SS1) },
+{ .name = "Sun4c SparcStation IPC",  .id_machtype = (SM_SUN4C | SM_4C_IPC) },
+{ .name = "Sun4c SparcStation 1+",   .id_machtype = (SM_SUN4C | SM_4C_SS1PLUS) },
+{ .name = "Sun4c SparcStation SLC",  .id_machtype = (SM_SUN4C | SM_4C_SLC) },
+{ .name = "Sun4c SparcStation 2",    .id_machtype = (SM_SUN4C | SM_4C_SS2) },
+{ .name = "Sun4c SparcStation ELC",  .id_machtype = (SM_SUN4C | SM_4C_ELC) },
+{ .name = "Sun4c SparcStation IPX",  .id_machtype = (SM_SUN4C | SM_4C_IPX) },
 /* Finally, early Sun4m's */
-{ "Sun4m SparcSystem600", (SM_SUN4M | SM_4M_SS60) },
-{ "Sun4m SparcStation10/20", (SM_SUN4M | SM_4M_SS50) },
-{ "Sun4m SparcStation5", (SM_SUN4M | SM_4M_SS40) },
+{ .name = "Sun4m SparcSystem600",    .id_machtype = (SM_SUN4M | SM_4M_SS60) },
+{ .name = "Sun4m SparcStation10/20", .id_machtype = (SM_SUN4M | SM_4M_SS50) },
+{ .name = "Sun4m SparcStation5",     .id_machtype = (SM_SUN4M | SM_4M_SS40) },
 /* One entry for the OBP arch's which are sun4d, sun4e, and newer sun4m's */
-{ "Sun4M OBP based system", (SM_SUN4M_OBP | 0x0) } };
+{ .name = "Sun4M OBP based system",  .id_machtype = (SM_SUN4M_OBP | 0x0) } };
 
 static void __init display_system_type(unsigned char machtype)
 {
@@ -47,21 +49,25 @@ static void __init display_system_type(unsigned char machtype)
         register int i;
 
         for (i = 0; i < NUM_SUN_MACHINES; i++) {
-                if(Sun_Machines[i].id_machtype == machtype) {
+                if (Sun_Machines[i].id_machtype == machtype) {
                         if (machtype != (SM_SUN4M_OBP | 0x00) ||
                             prom_getproperty(prom_root_node, "banner-name",
                                              sysname, sizeof(sysname)) <= 0)
-                                printk("TYPE: %s\n", Sun_Machines[i].name);
+                                printk(KERN_WARNING "TYPE: %s\n",
+                                       Sun_Machines[i].name);
                         else
-                                printk("TYPE: %s\n", sysname);
+                                printk(KERN_WARNING "TYPE: %s\n", sysname);
                         return;
                 }
         }
 
-        prom_printf("IDPROM: Bogus id_machtype value, 0x%x\n", machtype);
-        prom_halt();
+        prom_printf("IDPROM: Warning, bogus id_machtype value, 0x%x\n", machtype);
 }
-
+#else
+static void __init display_system_type(unsigned char machtype)
+{
+}
+#endif
 /* Calculate the IDPROM checksum (xor of the data bytes). */
 static unsigned char __init calc_idprom_cksum(struct idprom *idprom)
 {
@@ -80,21 +86,14 @@ void __init idprom_init(void)
 
         idprom = &idprom_buffer;
 
-        if (idprom->id_format != 0x01)  {
-                prom_printf("IDPROM: Unknown format type!\n");
-                prom_halt();
-        }
+        if (idprom->id_format != 0x01)
+                prom_printf("IDPROM: Warning, unknown format type!\n");
 
-        if (idprom->id_cksum != calc_idprom_cksum(idprom)) {
-                prom_printf("IDPROM: Checksum failure (nvram=%x, calc=%x)!\n",
+        if (idprom->id_cksum != calc_idprom_cksum(idprom))
+                prom_printf("IDPROM: Warning, checksum failure (nvram=%x, calc=%x)!\n",
                             idprom->id_cksum, calc_idprom_cksum(idprom));
-                prom_halt();
-        }
 
         display_system_type(idprom->id_machtype);
 
-        printk("Ethernet address: %x:%x:%x:%x:%x:%x\n",
-                    idprom->id_ethaddr[0], idprom->id_ethaddr[1],
-                    idprom->id_ethaddr[2], idprom->id_ethaddr[3],
-                    idprom->id_ethaddr[4], idprom->id_ethaddr[5]);
+        printk(KERN_WARNING "Ethernet address: %pM\n", idprom->id_ethaddr);
 }
diff --git a/arch/sparc/kernel/init_task.c b/arch/sparc/kernel/init_task.c
index 8e64ebc445ef..f28cb8278e98 100644
--- a/arch/sparc/kernel/init_task.c
+++ b/arch/sparc/kernel/init_task.c
@@ -8,7 +8,6 @@
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
@@ -23,6 +22,5 @@ EXPORT_SYMBOL(init_task);
  * in etrap.S which assumes it.
  */
 union thread_union init_thread_union
-        __attribute__((section (".text\"\n\t#")))
-        __attribute__((aligned (THREAD_SIZE)))
+        __attribute__((section (".data.init_task")))
         = { INIT_THREAD_INFO(init_task) };
diff --git a/arch/sparc64/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 1cc1995531e2..1cc1995531e2 100644
--- a/arch/sparc64/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
diff --git a/arch/sparc64/kernel/iommu_common.h b/arch/sparc/kernel/iommu_common.h
index 591f5879039c..591f5879039c 100644
--- a/arch/sparc64/kernel/iommu_common.h
+++ b/arch/sparc/kernel/iommu_common.h
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index 4f025b36934b..7ce14f05eb48 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -552,8 +552,8 @@ int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents,
         /* IIep is write-through, not flushing. */
         for_each_sg(sgl, sg, nents, n) {
                 BUG_ON(page_address(sg_page(sg)) == NULL);
-                sg->dvma_address = virt_to_phys(sg_virt(sg));
-                sg->dvma_length = sg->length;
+                sg->dma_address = virt_to_phys(sg_virt(sg));
+                sg->dma_length = sg->length;
         }
         return nents;
 }
diff --git a/arch/sparc/kernel/irq.c b/arch/sparc/kernel/irq_32.c
index 93e1d1c65290..1eff942fe22f 100644
--- a/arch/sparc/kernel/irq.c
+++ b/arch/sparc/kernel/irq_32.c
@@ -46,6 +46,7 @@
 #include <asm/cacheflush.h>
 #include <asm/irq_regs.h>
 
+#include "kernel.h"
 #include "irq.h"
 
 #ifdef CONFIG_SMP
@@ -592,19 +593,19 @@ EXPORT_SYMBOL(request_irq);
 
 void disable_irq_nosync(unsigned int irq)
 {
-        return __disable_irq(irq);
+        __disable_irq(irq);
 }
 EXPORT_SYMBOL(disable_irq_nosync);
 
 void disable_irq(unsigned int irq)
 {
-        return __disable_irq(irq);
+        __disable_irq(irq);
 }
 EXPORT_SYMBOL(disable_irq);
 
 void enable_irq(unsigned int irq)
 {
-        return __enable_irq(irq);
+        __enable_irq(irq);
 }
 
 EXPORT_SYMBOL(enable_irq);
@@ -668,7 +669,9 @@ void __init init_IRQ(void)
         btfixup();
 }
 
+#ifdef CONFIG_PROC_FS
 void init_irq_proc(void)
 {
         /* For now, nothing... */
 }
+#endif /* CONFIG_PROC_FS */
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc/kernel/irq_64.c
index 52fc836f464d..cab8e0286871 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -312,7 +312,8 @@ static void sun4u_irq_enable(unsigned int virt_irq)
         }
 }
 
-static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
+static void sun4u_set_affinity(unsigned int virt_irq,
+                               const struct cpumask *mask)
 {
         sun4u_irq_enable(virt_irq);
 }
@@ -362,7 +363,8 @@ static void sun4v_irq_enable(unsigned int virt_irq)
                        ino, err);
 }
 
-static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
+static void sun4v_set_affinity(unsigned int virt_irq,
+                               const struct cpumask *mask)
 {
         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
         unsigned long cpuid = irq_choose_cpu(virt_irq);
@@ -429,7 +431,8 @@ static void sun4v_virq_enable(unsigned int virt_irq)
                        dev_handle, dev_ino, err);
 }
 
-static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
+static void sun4v_virt_set_affinity(unsigned int virt_irq,
+                                    const struct cpumask *mask)
 {
         unsigned long cpuid, dev_handle, dev_ino;
         int err;
@@ -775,6 +778,69 @@ void do_softirq(void)
         local_irq_restore(flags);
 }
 
+static void unhandled_perf_irq(struct pt_regs *regs)
+{
+        unsigned long pcr, pic;
+
+        read_pcr(pcr);
+        read_pic(pic);
+
+        write_pcr(0);
+
+        printk(KERN_EMERG "CPU %d: Got unexpected perf counter IRQ.\n",
+               smp_processor_id());
+        printk(KERN_EMERG "CPU %d: PCR[%016lx] PIC[%016lx]\n",
+               smp_processor_id(), pcr, pic);
+}
+
+/* Almost a direct copy of the powerpc PMC code.  */
+static DEFINE_SPINLOCK(perf_irq_lock);
+static void *perf_irq_owner_caller; /* mostly for debugging */
+static void (*perf_irq)(struct pt_regs *regs) = unhandled_perf_irq;
+
+/* Invoked from level 15 PIL handler in trap table.  */
+void perfctr_irq(int irq, struct pt_regs *regs)
+{
+        clear_softint(1 << irq);
+        perf_irq(regs);
+}
+
+int register_perfctr_intr(void (*handler)(struct pt_regs *))
+{
+        int ret;
+
+        if (!handler)
+                return -EINVAL;
+
+        spin_lock(&perf_irq_lock);
+        if (perf_irq != unhandled_perf_irq) {
+                printk(KERN_WARNING "register_perfctr_intr: "
+                       "perf IRQ busy (reserved by caller %p)\n",
+                       perf_irq_owner_caller);
+                ret = -EBUSY;
+                goto out;
+        }
+
+        perf_irq_owner_caller = __builtin_return_address(0);
+        perf_irq = handler;
+
+        ret = 0;
+out:
+        spin_unlock(&perf_irq_lock);
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(register_perfctr_intr);
+
+void release_perfctr_intr(void (*handler)(struct pt_regs *))
+{
+        spin_lock(&perf_irq_lock);
+        perf_irq_owner_caller = NULL;
+        perf_irq = unhandled_perf_irq;
+        spin_unlock(&perf_irq_lock);
+}
+EXPORT_SYMBOL_GPL(release_perfctr_intr);
+
 #ifdef CONFIG_HOTPLUG_CPU
 void fixup_irqs(void)
 {
@@ -788,7 +854,7 @@ void fixup_irqs(void)
                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
                         if (irq_desc[irq].chip->set_affinity)
                                 irq_desc[irq].chip->set_affinity(irq,
-                                        irq_desc[irq].affinity);
+                                        &irq_desc[irq].affinity);
                 }
                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
         }
diff --git a/arch/sparc64/kernel/itlb_miss.S b/arch/sparc/kernel/itlb_miss.S
index 5a8377b54955..5a8377b54955 100644
--- a/arch/sparc64/kernel/itlb_miss.S
+++ b/arch/sparc/kernel/itlb_miss.S
diff --git a/arch/sparc64/kernel/ivec.S b/arch/sparc/kernel/ivec.S
index d29f92ebca5e..d29f92ebca5e 100644
--- a/arch/sparc64/kernel/ivec.S
+++ b/arch/sparc/kernel/ivec.S
diff --git a/arch/sparc/kernel/kernel.h b/arch/sparc/kernel/kernel.h
new file mode 100644
index 000000000000..81a972e8d8ea
--- /dev/null
+++ b/arch/sparc/kernel/kernel.h
@@ -0,0 +1,31 @@
+#ifndef __SPARC_KERNEL_H
+#define __SPARC_KERNEL_H
+
+#include <linux/interrupt.h>
+
+/* cpu.c */
+extern const char *sparc_cpu_type;
+extern const char *sparc_fpu_type;
+
+extern unsigned int fsr_storage;
+
+#ifdef CONFIG_SPARC32
+/* cpu.c */
+extern void cpu_probe(void);
+
+/* traps_32.c */
+extern void handle_hw_divzero(struct pt_regs *regs, unsigned long pc,
+                              unsigned long npc, unsigned long psr);
+/* muldiv.c */
+extern int do_user_muldiv (struct pt_regs *, unsigned long);
+
+/* irq_32.c */
+extern struct irqaction static_irqaction[];
+extern int static_irq_count;
+extern spinlock_t irq_action_lock;
+
+extern void unexpected_irq(int irq, void *dev_id, struct pt_regs * regs);
+
+#else /* CONFIG_SPARC32 */
+#endif /* CONFIG_SPARC32 */
+#endif /* !(__SPARC_KERNEL_H) */
diff --git a/arch/sparc/kernel/kgdb.c b/arch/sparc/kernel/kgdb_32.c
index 757805ce02ee..04df4edc0073 100644
--- a/arch/sparc/kernel/kgdb.c
+++ b/arch/sparc/kernel/kgdb_32.c
@@ -14,14 +14,14 @@ extern unsigned long trapbase;
 
 void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 {
-        struct reg_window *win;
+        struct reg_window32 *win;
         int i;
 
         gdb_regs[GDB_G0] = 0;
         for (i = 0; i < 15; i++)
                 gdb_regs[GDB_G1 + i] = regs->u_regs[UREG_G1 + i];
 
-        win = (struct reg_window *) regs->u_regs[UREG_FP];
+        win = (struct reg_window32 *) regs->u_regs[UREG_FP];
         for (i = 0; i < 8; i++)
                 gdb_regs[GDB_L0 + i] = win->locals[i];
         for (i = 0; i < 8; i++)
@@ -43,7 +43,7 @@ void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
 {
         struct thread_info *t = task_thread_info(p);
-        struct reg_window *win;
+        struct reg_window32 *win;
         int i;
 
         for (i = GDB_G0; i < GDB_G6; i++)
@@ -55,7 +55,7 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
         gdb_regs[GDB_SP] = t->ksp;
         gdb_regs[GDB_O7] = 0;
 
-        win = (struct reg_window *) t->ksp;
+        win = (struct reg_window32 *) t->ksp;
         for (i = 0; i < 8; i++)
                 gdb_regs[GDB_L0 + i] = win->locals[i];
         for (i = 0; i < 8; i++)
@@ -77,7 +77,7 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
 
 void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 {
-        struct reg_window *win;
+        struct reg_window32 *win;
         int i;
 
         for (i = 0; i < 15; i++)
@@ -96,7 +96,7 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
         regs->npc = gdb_regs[GDB_NPC];
         regs->y = gdb_regs[GDB_Y];
 
-        win = (struct reg_window *) regs->u_regs[UREG_FP];
+        win = (struct reg_window32 *) regs->u_regs[UREG_FP];
         for (i = 0; i < 8; i++)
                 win->locals[i] = gdb_regs[GDB_L0 + i];
         for (i = 0; i < 8; i++)
diff --git a/arch/sparc64/kernel/kgdb.c b/arch/sparc/kernel/kgdb_64.c
index fefbe6dc51be..fefbe6dc51be 100644
--- a/arch/sparc64/kernel/kgdb.c
+++ b/arch/sparc/kernel/kgdb_64.c
diff --git a/arch/sparc64/kernel/kprobes.c b/arch/sparc/kernel/kprobes.c
index 201a6e547e4a..201a6e547e4a 100644
--- a/arch/sparc64/kernel/kprobes.c
+++ b/arch/sparc/kernel/kprobes.c
diff --git a/arch/sparc64/kernel/kstack.h b/arch/sparc/kernel/kstack.h
index 4248d969272f..4248d969272f 100644
--- a/arch/sparc64/kernel/kstack.h
+++ b/arch/sparc/kernel/kstack.h
diff --git a/arch/sparc64/kernel/ktlb.S b/arch/sparc/kernel/ktlb.S
index cef8defcd7a9..cef8defcd7a9 100644
--- a/arch/sparc64/kernel/ktlb.S
+++ b/arch/sparc/kernel/ktlb.S
diff --git a/arch/sparc64/kernel/ldc.c b/arch/sparc/kernel/ldc.c
index d68982330f66..d68982330f66 100644
--- a/arch/sparc64/kernel/ldc.c
+++ b/arch/sparc/kernel/ldc.c
diff --git a/arch/sparc64/kernel/mdesc.c b/arch/sparc/kernel/mdesc.c
index dde52bcf5c64..3c539a6d7c18 100644
--- a/arch/sparc64/kernel/mdesc.c
+++ b/arch/sparc/kernel/mdesc.c
@@ -11,6 +11,7 @@
 #include <linux/mm.h>
 #include <linux/miscdevice.h>
 
+#include <asm/cpudata.h>
 #include <asm/hypervisor.h>
 #include <asm/mdesc.h>
 #include <asm/prom.h>
diff --git a/arch/sparc64/kernel/misctrap.S b/arch/sparc/kernel/misctrap.S
index 753b4f031bfb..753b4f031bfb 100644
--- a/arch/sparc64/kernel/misctrap.S
+++ b/arch/sparc/kernel/misctrap.S
diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index 598682f31ebf..90273765e81f 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -1,4 +1,4 @@
-/* Kernel module help for sparc32.
+/* Kernel module help for sparc64.
  *
  * Copyright (C) 2001 Rusty Russell.
  * Copyright (C) 2002 David S. Miller.
@@ -11,6 +11,48 @@
 #include <linux/fs.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+
+#include <asm/processor.h>
+#include <asm/spitfire.h>
+
+#ifdef CONFIG_SPARC64
+static void *module_map(unsigned long size)
+{
+        struct vm_struct *area;
+
+        size = PAGE_ALIGN(size);
+        if (!size || size > MODULES_LEN)
+                return NULL;
+
+        area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END);
+        if (!area)
+                return NULL;
+
+        return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL);
+}
+
+static char *dot2underscore(char *name)
+{
+        return name;
+}
+#else
+static void *module_map(unsigned long size)
+{
+        return vmalloc(size);
+}
+
+/* Replace references to .func with _Func */
+static char *dot2underscore(char *name)
+{
+        if (name[0] == '.') {
+                name[0] = '_';
+                name[1] = toupper(name[1]);
+        }
+        return name;
+}
+#endif /* CONFIG_SPARC64 */
 
 void *module_alloc(unsigned long size)
 {
@@ -20,7 +62,7 @@ void *module_alloc(unsigned long size)
         if (size == 0)
                 return NULL;
 
-        ret = vmalloc(size);
+        ret = module_map(size);
         if (!ret)
                 ret = ERR_PTR(-ENOMEM);
         else
@@ -37,16 +79,14 @@ void module_free(struct module *mod, void *module_region)
            table entries. */
 }
 
-/* Make generic code ignore STT_REGISTER dummy undefined symbols,
- * and replace references to .func with _Func
- */
+/* Make generic code ignore STT_REGISTER dummy undefined symbols.  */
 int module_frob_arch_sections(Elf_Ehdr *hdr,
                               Elf_Shdr *sechdrs,
                               char *secstrings,
                               struct module *mod)
 {
         unsigned int symidx;
-        Elf32_Sym *sym;
+        Elf_Sym *sym;
         char *strtab;
         int i;
 
@@ -56,26 +96,23 @@ int module_frob_arch_sections(Elf_Ehdr *hdr,
                         return -ENOEXEC;
                 }
         }
-        sym = (Elf32_Sym *)sechdrs[symidx].sh_addr;
+        sym = (Elf_Sym *)sechdrs[symidx].sh_addr;
         strtab = (char *)sechdrs[sechdrs[symidx].sh_link].sh_addr;
 
         for (i = 1; i < sechdrs[symidx].sh_size / sizeof(Elf_Sym); i++) {
                 if (sym[i].st_shndx == SHN_UNDEF) {
-                        if (ELF32_ST_TYPE(sym[i].st_info) == STT_REGISTER)
+                        if (ELF_ST_TYPE(sym[i].st_info) == STT_REGISTER) {
                                 sym[i].st_shndx = SHN_ABS;
-                        else {
+                        } else {
                                 char *name = strtab + sym[i].st_name;
-                                if (name[0] == '.') {
-                                        name[0] = '_';
-                                        name[1] = toupper(name[1]);
-                                }
+                                dot2underscore(name);
                         }
                 }
         }
         return 0;
 }
 
-int apply_relocate(Elf32_Shdr *sechdrs,
+int apply_relocate(Elf_Shdr *sechdrs,
                    const char *strtab,
                    unsigned int symindex,
                    unsigned int relsec,
@@ -86,32 +123,68 @@ int apply_relocate(Elf32_Shdr *sechdrs,
         return -ENOEXEC;
 }
 
-int apply_relocate_add(Elf32_Shdr *sechdrs,
+int apply_relocate_add(Elf_Shdr *sechdrs,
                        const char *strtab,
                        unsigned int symindex,
                        unsigned int relsec,
                        struct module *me)
 {
         unsigned int i;
-        Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
-        Elf32_Sym *sym;
+        Elf_Rela *rel = (void *)sechdrs[relsec].sh_addr;
+        Elf_Sym *sym;
         u8 *location;
         u32 *loc32;
 
         for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
-                Elf32_Addr v;
+                Elf_Addr v;
 
                 /* This is where to make the change */
                 location = (u8 *)sechdrs[sechdrs[relsec].sh_info].sh_addr
                         + rel[i].r_offset;
                 loc32 = (u32 *) location;
+
+#ifdef CONFIG_SPARC64
+                BUG_ON(((u64)location >> (u64)32) != (u64)0);
+#endif /* CONFIG_SPARC64 */
+
                 /* This is the symbol it is referring to.  Note that all
                    undefined symbols have been resolved.  */
-                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
-                        + ELF32_R_SYM(rel[i].r_info);
+                sym = (Elf_Sym *)sechdrs[symindex].sh_addr
+                        + ELF_R_SYM(rel[i].r_info);
                 v = sym->st_value + rel[i].r_addend;
 
-                switch (ELF32_R_TYPE(rel[i].r_info)) {
+                switch (ELF_R_TYPE(rel[i].r_info) & 0xff) {
+#ifdef CONFIG_SPARC64
+                case R_SPARC_64:
+                        location[0] = v >> 56;
+                        location[1] = v >> 48;
+                        location[2] = v >> 40;
+                        location[3] = v >> 32;
+                        location[4] = v >> 24;
+                        location[5] = v >> 16;
+                        location[6] = v >>  8;
+                        location[7] = v >>  0;
+                        break;
+
+                case R_SPARC_DISP32:
+                        v -= (Elf_Addr) location;
+                        *loc32 = v;
+                        break;
+
+                case R_SPARC_WDISP19:
+                        v -= (Elf_Addr) location;
+                        *loc32 = (*loc32 & ~0x7ffff) |
+                                ((v >> 2) & 0x7ffff);
+                        break;
+
+                case R_SPARC_OLO10:
+                        *loc32 = (*loc32 & ~0x1fff) |
+                                (((v & 0x3ff) +
+                                  (ELF_R_TYPE(rel[i].r_info) >> 8))
+                                 & 0x1fff);
+                        break;
+#endif /* CONFIG_SPARC64 */
+
                 case R_SPARC_32:
                 case R_SPARC_UA32:
                         location[0] = v >> 24;
@@ -121,13 +194,13 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
                         break;
 
                 case R_SPARC_WDISP30:
-                        v -= (Elf32_Addr) location;
+                        v -= (Elf_Addr) location;
                         *loc32 = (*loc32 & ~0x3fffffff) |
                                 ((v >> 2) & 0x3fffffff);
                         break;
 
                 case R_SPARC_WDISP22:
-                        v -= (Elf32_Addr) location;
+                        v -= (Elf_Addr) location;
                         *loc32 = (*loc32 & ~0x3fffff) |
                                 ((v >> 2) & 0x3fffff);
                         break;
@@ -144,19 +217,38 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
                 default:
                         printk(KERN_ERR "module %s: Unknown relocation: %x\n",
                                me->name,
-                               (int) (ELF32_R_TYPE(rel[i].r_info) & 0xff));
+                               (int) (ELF_R_TYPE(rel[i].r_info) & 0xff));
                         return -ENOEXEC;
                 };
         }
         return 0;
 }
 
+#ifdef CONFIG_SPARC64
 int module_finalize(const Elf_Ehdr *hdr,
                     const Elf_Shdr *sechdrs,
                     struct module *me)
 {
+        /* Cheetah's I-cache is fully coherent.  */
+        if (tlb_type == spitfire) {
+                unsigned long va;
+
+                flushw_all();
+                for (va =  0; va < (PAGE_SIZE << 1); va += 32)
+                        spitfire_put_icache_tag(va, 0x0);
+                __asm__ __volatile__("flush %g6");
+        }
+
         return 0;
 }
+#else
+int module_finalize(const Elf_Ehdr *hdr,
+                    const Elf_Shdr *sechdrs,
+                    struct module *me)
+{
+        return 0;
+}
+#endif /* CONFIG_SPARC64 */
 
 void module_arch_cleanup(struct module *mod)
 {
diff --git a/arch/sparc/kernel/muldiv.c b/arch/sparc/kernel/muldiv.c
index e352239e72c8..6ce1021d487c 100644
--- a/arch/sparc/kernel/muldiv.c
+++ b/arch/sparc/kernel/muldiv.c
@@ -17,6 +17,8 @@
 #include <asm/system.h>
 #include <asm/uaccess.h>
 
+#include "kernel.h"
+
 /* #define DEBUG_MULDIV */
 
 static inline int has_imm13(int insn)
@@ -58,7 +60,7 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
 }
 
 #define fetch_reg(reg, regs) ({                                         \
-        struct reg_window __user *win;                                  \
+        struct reg_window32 __user *win;                                        \
         register unsigned long ret;                                     \
                                                                         \
         if (!(reg)) ret = 0;                                            \
@@ -66,7 +68,7 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
                 ret = regs->u_regs[(reg)];                              \
         } else {                                                        \
                 /* Ho hum, the slightly complicated case. */            \
-                win = (struct reg_window __user *)regs->u_regs[UREG_FP];\
+                win = (struct reg_window32 __user *)regs->u_regs[UREG_FP];\
                 if (get_user (ret, &win->locals[(reg) - 16])) return -1;\
         }                                                               \
         ret;                                                            \
@@ -75,7 +77,7 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
 static inline int
 store_reg(unsigned int result, unsigned int reg, struct pt_regs *regs)
 {
-        struct reg_window __user *win;
+        struct reg_window32 __user *win;
 
         if (!reg)
                 return 0;
@@ -84,13 +86,10 @@ store_reg(unsigned int result, unsigned int reg, struct pt_regs *regs)
                 return 0;
         } else {
                 /* need to use put_user() in this case: */
-                win = (struct reg_window __user *) regs->u_regs[UREG_FP];
+                win = (struct reg_window32 __user *) regs->u_regs[UREG_FP];
                 return (put_user(result, &win->locals[reg - 16]));
         }
 }
-                
-extern void handle_hw_divzero (struct pt_regs *regs, unsigned long pc,
-                               unsigned long npc, unsigned long psr);
 
 /* Should return 0 if mul/div emulation succeeded and SIGILL should
  * not be issued.
diff --git a/arch/sparc/kernel/of_device.c b/arch/sparc/kernel/of_device_32.c
index 0a83bd737654..0a83bd737654 100644
--- a/arch/sparc/kernel/of_device.c
+++ b/arch/sparc/kernel/of_device_32.c
diff --git a/arch/sparc64/kernel/of_device.c b/arch/sparc/kernel/of_device_64.c
index 0f616ae3246c..4873f28905b0 100644
--- a/arch/sparc64/kernel/of_device.c
+++ b/arch/sparc/kernel/of_device_64.c
@@ -778,9 +778,9 @@ static unsigned int __init build_one_device_irq(struct of_device *op,
 out:
         nid = of_node_to_nid(dp);
         if (nid != -1) {
-                cpumask_t numa_mask = node_to_cpumask(nid);
+                cpumask_t numa_mask = *cpumask_of_node(nid);
 
-                irq_set_affinity(irq, numa_mask);
+                irq_set_affinity(irq, &numa_mask);
         }
 
         return irq;
@@ -811,20 +811,20 @@ static struct of_device * __init scan_one_device(struct device_node *dp,
 
         irq = of_get_property(dp, "interrupts", &len);
         if (irq) {
-                memcpy(op->irqs, irq, len);
                 op->num_irqs = len / 4;
+
+                /* Prevent overrunning the op->irqs[] array.  */
+                if (op->num_irqs > PROMINTR_MAX) {
+                        printk(KERN_WARNING "%s: Too many irqs (%d), "
+                               "limiting to %d.\n",
+                               dp->full_name, op->num_irqs, PROMINTR_MAX);
+                        op->num_irqs = PROMINTR_MAX;
+                }
+                memcpy(op->irqs, irq, op->num_irqs * 4);
         } else {
                 op->num_irqs = 0;
         }
 
-        /* Prevent overrunning the op->irqs[] array.  */
-        if (op->num_irqs > PROMINTR_MAX) {
-                printk(KERN_WARNING "%s: Too many irqs (%d), "
-                       "limiting to %d.\n",
-                       dp->full_name, op->num_irqs, PROMINTR_MAX);
-                op->num_irqs = PROMINTR_MAX;
-        }
-
         build_device_resources(op, parent);
         for (i = 0; i < op->num_irqs; i++)
                 op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]);
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc/kernel/pci.c
index bdb7c0a6d83d..bdb7c0a6d83d 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
diff --git a/arch/sparc64/kernel/pci_common.c b/arch/sparc/kernel/pci_common.c
index 23b88082d0b2..23b88082d0b2 100644
--- a/arch/sparc64/kernel/pci_common.c
+++ b/arch/sparc/kernel/pci_common.c
diff --git a/arch/sparc64/kernel/pci_fire.c b/arch/sparc/kernel/pci_fire.c
index 9462b68f4894..9462b68f4894 100644
--- a/arch/sparc64/kernel/pci_fire.c
+++ b/arch/sparc/kernel/pci_fire.c
diff --git a/arch/sparc64/kernel/pci_impl.h b/arch/sparc/kernel/pci_impl.h
index 03186824327e..03186824327e 100644
--- a/arch/sparc64/kernel/pci_impl.h
+++ b/arch/sparc/kernel/pci_impl.h
diff --git a/arch/sparc64/kernel/pci_msi.c b/arch/sparc/kernel/pci_msi.c
index 2e680f34f727..4ef282e81912 100644
--- a/arch/sparc64/kernel/pci_msi.c
+++ b/arch/sparc/kernel/pci_msi.c
@@ -286,9 +286,9 @@ static int bringup_one_msi_queue(struct pci_pbm_info *pbm,
 
         nid = pbm->numa_node;
         if (nid != -1) {
-                cpumask_t numa_mask = node_to_cpumask(nid);
+                cpumask_t numa_mask = *cpumask_of_node(nid);
 
-                irq_set_affinity(irq, numa_mask);
+                irq_set_affinity(irq, &numa_mask);
         }
         err = request_irq(irq, sparc64_msiq_interrupt, 0,
                           "MSIQ",
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc/kernel/pci_psycho.c
index dfb3ec892987..3b34344082ef 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc/kernel/pci_psycho.c
@@ -307,10 +307,7 @@ static void psycho_register_error_handlers(struct pci_pbm_info *pbm)
 
         /* We really mean to ignore the return result here.  Two
          * PCI controller share the same interrupt numbers and
-         * drive the same front-end hardware.  Whichever of the
-         * two get in here first will register the IRQ handler
-         * the second will just error out since we do not pass in
-         * IRQF_SHARED.
+         * drive the same front-end hardware.
          */
         err = request_irq(op->irqs[1], psycho_ue_intr, IRQF_SHARED,
                           "PSYCHO_UE", pbm);
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc/kernel/pci_sabre.c
index 713257b6963c..713257b6963c 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc/kernel/pci_sabre.c
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc/kernel/pci_schizo.c
index 45d9dba1ba11..45d9dba1ba11 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc/kernel/pci_schizo.c
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index 34a1fded3941..34a1fded3941 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
diff --git a/arch/sparc64/kernel/pci_sun4v.h b/arch/sparc/kernel/pci_sun4v.h
index 8e9fc3a5b4f5..8e9fc3a5b4f5 100644
--- a/arch/sparc64/kernel/pci_sun4v.h
+++ b/arch/sparc/kernel/pci_sun4v.h
diff --git a/arch/sparc64/kernel/pci_sun4v_asm.S b/arch/sparc/kernel/pci_sun4v_asm.S
index e606d46c6815..e606d46c6815 100644
--- a/arch/sparc64/kernel/pci_sun4v_asm.S
+++ b/arch/sparc/kernel/pci_sun4v_asm.S
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 462584e55fba..75ed98be3edf 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -436,7 +436,7 @@ int pcic_present(void)
         return pcic0_up;
 }
 
-static int __init pdev_to_pnode(struct linux_pbm_info *pbm, 
+static int __devinit pdev_to_pnode(struct linux_pbm_info *pbm,
                                     struct pci_dev *pdev)
 {
         struct linux_prom_pci_registers regs[PROMREG_MAX];
diff --git a/arch/sparc/kernel/pmc.c b/arch/sparc/kernel/pmc.c
index 2afcfab4f11c..5e4563d86f19 100644
--- a/arch/sparc/kernel/pmc.c
+++ b/arch/sparc/kernel/pmc.c
@@ -24,32 +24,32 @@
  */
 
 #define PMC_OBPNAME     "SUNW,pmc"
-#define PMC_DEVNAME "pmc"
+#define PMC_DEVNAME     "pmc"
 
 #define PMC_IDLE_REG    0x00
-#define PMC_IDLE_ON             0x01
+#define PMC_IDLE_ON     0x01
 
 static u8 __iomem *regs;
 
 #define pmc_readb(offs)         (sbus_readb(regs+offs))
-#define pmc_writeb(val, offs)   (sbus_writeb(val, regs+offs))
+#define pmc_writeb(val, offs)   (sbus_writeb(val, regs+offs))
 
-/* 
+/*
  * CPU idle callback function
  * See .../arch/sparc/kernel/process.c
  */
-void pmc_swift_idle(void)
+static void pmc_swift_idle(void)
 {
 #ifdef PMC_DEBUG_LED
-        set_auxio(0x00, AUXIO_LED); 
+        set_auxio(0x00, AUXIO_LED);
 #endif
 
         pmc_writeb(pmc_readb(PMC_IDLE_REG) | PMC_IDLE_ON, PMC_IDLE_REG);
 
 #ifdef PMC_DEBUG_LED
-        set_auxio(AUXIO_LED, 0x00); 
+        set_auxio(AUXIO_LED, 0x00);
 #endif
-} 
+}
 
 static int __devinit pmc_probe(struct of_device *op,
                                const struct of_device_id *match)
@@ -63,7 +63,7 @@ static int __devinit pmc_probe(struct of_device *op,
 
 #ifndef PMC_NO_IDLE
         /* Assign power management IDLE handler */
-        pm_idle = pmc_swift_idle;       
+        pm_idle = pmc_swift_idle;
 #endif
 
         printk(KERN_INFO "%s: power management initialized\n", PMC_DEVNAME);
diff --git a/arch/sparc64/kernel/power.c b/arch/sparc/kernel/power.c
index 076cad7f9757..076cad7f9757 100644
--- a/arch/sparc64/kernel/power.c
+++ b/arch/sparc/kernel/power.c
diff --git a/arch/sparc/kernel/process.c b/arch/sparc/kernel/process_32.c
index e8c43ffe317e..5a8d8ced33da 100644
--- a/arch/sparc/kernel/process.c
+++ b/arch/sparc/kernel/process_32.c
@@ -168,11 +168,9 @@ void machine_restart(char * cmd)
 
 void machine_power_off(void)
 {
-#ifdef CONFIG_SUN_AUXIO
         if (auxio_power_register &&
             (strcmp(of_console_device->type, "serial") || scons_pwroff))
                 *auxio_power_register |= AUXIO_POWER_OFF;
-#endif
         machine_halt();
 }
 
@@ -182,13 +180,13 @@ static DEFINE_SPINLOCK(sparc_backtrace_lock);
 
 void __show_backtrace(unsigned long fp)
 {
-        struct reg_window *rw;
+        struct reg_window32 *rw;
         unsigned long flags;
         int cpu = smp_processor_id();
 
         spin_lock_irqsave(&sparc_backtrace_lock, flags);
 
-        rw = (struct reg_window *)fp;
+        rw = (struct reg_window32 *)fp;
         while(rw && (((unsigned long) rw) >= PAGE_OFFSET) &&
             !(((unsigned long) rw) & 0x7)) {
                 printk("CPU[%d]: ARGS[%08lx,%08lx,%08lx,%08lx,%08lx,%08lx] "
@@ -198,7 +196,7 @@ void __show_backtrace(unsigned long fp)
                        rw->ins[6],
                        rw->ins[7]);
                 printk("%pS\n", (void *) rw->ins[7]);
-                rw = (struct reg_window *) rw->ins[6];
+                rw = (struct reg_window32 *) rw->ins[6];
         }
         spin_unlock_irqrestore(&sparc_backtrace_lock, flags);
 }
@@ -260,7 +258,7 @@ void show_stackframe(struct sparc_stackf *sf)
 
 void show_regs(struct pt_regs *r)
 {
-        struct reg_window *rw = (struct reg_window *) r->u_regs[14];
+        struct reg_window32 *rw = (struct reg_window32 *) r->u_regs[14];
 
         printk("PSR: %08lx PC: %08lx NPC: %08lx Y: %08lx    %s\n",
                r->psr, r->pc, r->npc, r->y, print_tainted());
@@ -289,7 +287,7 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp)
 {
         unsigned long pc, fp;
         unsigned long task_base;
-        struct reg_window *rw;
+        struct reg_window32 *rw;
         int count = 0;
 
         if (tsk != NULL)
@@ -303,7 +301,7 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp)
                 if (fp < (task_base + sizeof(struct thread_info)) ||
                     fp >= (task_base + (PAGE_SIZE << 1)))
                         break;
-                rw = (struct reg_window *) fp;
+                rw = (struct reg_window32 *) fp;
                 pc = rw->ins[7];
                 printk("[%08lx : ", pc);
                 printk("%pS ] ", (void *) pc);
@@ -681,7 +679,7 @@ unsigned long get_wchan(struct task_struct *task)
         unsigned long pc, fp, bias = 0;
         unsigned long task_base = (unsigned long) task;
         unsigned long ret = 0;
-        struct reg_window *rw;
+        struct reg_window32 *rw;
         int count = 0;
 
         if (!task || task == current ||
@@ -694,7 +692,7 @@ unsigned long get_wchan(struct task_struct *task)
                 if (fp < (task_base + sizeof(struct thread_info)) ||
                     fp >= (task_base + (2 * PAGE_SIZE)))
                         break;
-                rw = (struct reg_window *) fp;
+                rw = (struct reg_window32 *) fp;
                 pc = rw->ins[7];
                 if (!in_sched_functions(pc)) {
                         ret = pc;
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc/kernel/process_64.c
index d5e2acef9877..d5e2acef9877 100644
--- a/arch/sparc64/kernel/process.c
+++ b/arch/sparc/kernel/process_64.c
diff --git a/arch/sparc/kernel/prom.h b/arch/sparc/kernel/prom.h
new file mode 100644
index 000000000000..bb0f0fda6cab
--- /dev/null
+++ b/arch/sparc/kernel/prom.h
@@ -0,0 +1,29 @@
+#ifndef __PROM_H
+#define __PROM_H
+
+#include <linux/spinlock.h>
+#include <asm/prom.h>
+
+extern struct device_node *allnodes;    /* temporary while merging */
+extern rwlock_t devtree_lock;   /* temporary while merging */
+
+extern void * prom_early_alloc(unsigned long size);
+extern void irq_trans_init(struct device_node *dp);
+
+extern unsigned int prom_unique_id;
+
+static inline int is_root_node(const struct device_node *dp)
+{
+        if (!dp)
+                return 0;
+
+        return (dp->parent == NULL);
+}
+
+extern char *build_path_component(struct device_node *dp);
+extern void of_console_init(void);
+extern void of_fill_in_cpu_data(void);
+
+extern unsigned int prom_early_allocated;
+
+#endif /* __PROM_H */
diff --git a/arch/sparc/kernel/prom.c b/arch/sparc/kernel/prom_32.c
index eee5efcfe50e..fe43e80772db 100644
--- a/arch/sparc/kernel/prom.c
+++ b/arch/sparc/kernel/prom_32.c
@@ -25,107 +25,9 @@
 #include <asm/prom.h>
 #include <asm/oplib.h>
 
-extern struct device_node *allnodes;    /* temporary while merging */
+#include "prom.h"
 
-extern rwlock_t devtree_lock;   /* temporary while merging */
-
-struct device_node *of_find_node_by_phandle(phandle handle)
-{
-        struct device_node *np;
-
-        for (np = allnodes; np != 0; np = np->allnext)
-                if (np->node == handle)
-                        break;
-
-        return np;
-}
-EXPORT_SYMBOL(of_find_node_by_phandle);
-
-int of_getintprop_default(struct device_node *np, const char *name, int def)
-{
-        struct property *prop;
-        int len;
-
-        prop = of_find_property(np, name, &len);
-        if (!prop || len != 4)
-                return def;
-
-        return *(int *) prop->value;
-}
-EXPORT_SYMBOL(of_getintprop_default);
-
-DEFINE_MUTEX(of_set_property_mutex);
-EXPORT_SYMBOL(of_set_property_mutex);
-
-int of_set_property(struct device_node *dp, const char *name, void *val, int len)
-{
-        struct property **prevp;
-        void *new_val;
-        int err;
-
-        new_val = kmalloc(len, GFP_KERNEL);
-        if (!new_val)
-                return -ENOMEM;
-
-        memcpy(new_val, val, len);
-
-        err = -ENODEV;
-
-        write_lock(&devtree_lock);
-        prevp = &dp->properties;
-        while (*prevp) {
-                struct property *prop = *prevp;
-
-                if (!strcasecmp(prop->name, name)) {
-                        void *old_val = prop->value;
-                        int ret;
-
-                        mutex_lock(&of_set_property_mutex);
-                        ret = prom_setprop(dp->node, (char *) name, val, len);
-                        mutex_unlock(&of_set_property_mutex);
-
-                        err = -EINVAL;
-                        if (ret >= 0) {
-                                prop->value = new_val;
-                                prop->length = len;
-
-                                if (OF_IS_DYNAMIC(prop))
-                                        kfree(old_val);
-
-                                OF_MARK_DYNAMIC(prop);
-
-                                err = 0;
-                        }
-                        break;
-                }
-                prevp = &(*prevp)->next;
-        }
-        write_unlock(&devtree_lock);
-
-        /* XXX Upate procfs if necessary... */
-
-        return err;
-}
-EXPORT_SYMBOL(of_set_property);
-
-int of_find_in_proplist(const char *list, const char *match, int len)
-{
-        while (len > 0) {
-                int l;
-
-                if (!strcmp(list, match))
-                        return 1;
-                l = strlen(list) + 1;
-                list += l;
-                len -= l;
-        }
-        return 0;
-}
-EXPORT_SYMBOL(of_find_in_proplist);
-
-static unsigned int prom_early_allocated;
-
-static void * __init prom_early_alloc(unsigned long size)
+void * __init prom_early_alloc(unsigned long size)
 {
         void *ret;
 
@@ -138,14 +40,6 @@ static void * __init prom_early_alloc(unsigned long size)
         return ret;
 }
 
-static int is_root_node(const struct device_node *dp)
-{
-        if (!dp)
-                return 0;
-
-        return (dp->parent == NULL);
-}
-
 /* The following routines deal with the black magic of fully naming a
  * node.
  *
@@ -257,7 +151,7 @@ static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
         return sparc32_path_component(dp, tmp_buf);
 }
 
-static char * __init build_path_component(struct device_node *dp)
+char * __init build_path_component(struct device_node *dp)
 {
         char tmp_buf[64], *n;
 
@@ -272,164 +166,9 @@ static char * __init build_path_component(struct device_node *dp)
         return n;
 }
 
-static char * __init build_full_name(struct device_node *dp)
-{
-        int len, ourlen, plen;
-        char *n;
-
-        plen = strlen(dp->parent->full_name);
-        ourlen = strlen(dp->path_component_name);
-        len = ourlen + plen + 2;
-
-        n = prom_early_alloc(len);
-        strcpy(n, dp->parent->full_name);
-        if (!is_root_node(dp->parent)) {
-                strcpy(n + plen, "/");
-                plen++;
-        }
-        strcpy(n + plen, dp->path_component_name);
-
-        return n;
-}
-
-static unsigned int unique_id;
-
-static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
-{
-        static struct property *tmp = NULL;
-        struct property *p;
-        int len;
-        const char *name;
-
-        if (tmp) {
-                p = tmp;
-                memset(p, 0, sizeof(*p) + 32);
-                tmp = NULL;
-        } else {
-                p = prom_early_alloc(sizeof(struct property) + 32);
-                p->unique_id = unique_id++;
-        }
-
-        p->name = (char *) (p + 1);
-        if (special_name) {
-                strcpy(p->name, special_name);
-                p->length = special_len;
-                p->value = prom_early_alloc(special_len);
-                memcpy(p->value, special_val, special_len);
-        } else {
-                if (prev == NULL) {
-                        name = prom_firstprop(node, NULL);
-                } else {
-                        name = prom_nextprop(node, prev, NULL);
-                }
-                if (strlen(name) == 0) {
-                        tmp = p;
-                        return NULL;
-                }
-                strcpy(p->name, name);
-                p->length = prom_getproplen(node, p->name);
-                if (p->length <= 0) {
-                        p->length = 0;
-                } else {
-                        p->value = prom_early_alloc(p->length + 1);
-                        len = prom_getproperty(node, p->name, p->value,
-                                               p->length);
-                        if (len <= 0)
-                                p->length = 0;
-                        ((unsigned char *)p->value)[p->length] = '\0';
-                }
-        }
-        return p;
-}
-
-static struct property * __init build_prop_list(phandle node)
-{
-        struct property *head, *tail;
-
-        head = tail = build_one_prop(node, NULL,
-                                     ".node", &node, sizeof(node));
-
-        tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
-        tail = tail->next;
-        while(tail) {
-                tail->next = build_one_prop(node, tail->name,
-                                            NULL, NULL, 0);
-                tail = tail->next;
-        }
-
-        return head;
-}
-
-static char * __init get_one_property(phandle node, char *name)
-{
-        char *buf = "<NULL>";
-        int len;
-
-        len = prom_getproplen(node, name);
-        if (len > 0) {
-                buf = prom_early_alloc(len);
-                len = prom_getproperty(node, name, buf, len);
-        }
-
-        return buf;
-}
-
-static struct device_node * __init create_node(phandle node)
-{
-        struct device_node *dp;
-
-        if (!node)
-                return NULL;
-
-        dp = prom_early_alloc(sizeof(*dp));
-        dp->unique_id = unique_id++;
-
-        kref_init(&dp->kref);
-
-        dp->name = get_one_property(node, "name");
-        dp->type = get_one_property(node, "device_type");
-        dp->node = node;
-
-        /* Build interrupts later... */
-
-        dp->properties = build_prop_list(node);
-
-        return dp;
-}
-
-static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
-{
-        struct device_node *dp;
-
-        dp = create_node(node);
-        if (dp) {
-                *(*nextp) = dp;
-                *nextp = &dp->allnext;
-
-                dp->parent = parent;
-                dp->path_component_name = build_path_component(dp);
-                dp->full_name = build_full_name(dp);
-
-                dp->child = build_tree(dp, prom_getchild(node), nextp);
-
-                dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
-        }
-
-        return dp;
-}
-
-struct device_node *of_console_device;
-EXPORT_SYMBOL(of_console_device);
-
-char *of_console_path;
-EXPORT_SYMBOL(of_console_path);
-
-char *of_console_options;
-EXPORT_SYMBOL(of_console_options);
-
 extern void restore_current(void);
 
-static void __init of_console_init(void)
+void __init of_console_init(void)
 {
         char *msg = "OF stdout device is: %s\n";
         struct device_node *dp;
@@ -547,20 +286,10 @@ static void __init of_console_init(void)
         printk(msg, of_console_path);
 }
 
-void __init prom_build_devicetree(void)
+void __init of_fill_in_cpu_data(void)
 {
-        struct device_node **nextp;
-
-        allnodes = create_node(prom_root_node);
-        allnodes->path_component_name = "";
-        allnodes->full_name = "/";
-
-        nextp = &allnodes->allnext;
-        allnodes->child = build_tree(allnodes,
-                                     prom_getchild(allnodes->node),
-                                     &nextp);
-        of_console_init();
+}
 
-        printk("PROM: Built device tree with %u bytes of memory.\n",
-               prom_early_allocated);
+void __init irq_trans_init(struct device_node *dp)
+{
 }
diff --git a/arch/sparc/kernel/prom_64.c b/arch/sparc/kernel/prom_64.c
new file mode 100644
index 000000000000..edecca7b8116
--- /dev/null
+++ b/arch/sparc/kernel/prom_64.c
@@ -0,0 +1,571 @@
+/*
+ * Procedures for creating, accessing and interpreting the device tree.
+ *
+ * Paul Mackerras       August 1996.
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ * 
+ *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
+ *    {engebret|bergner}@us.ibm.com 
+ *
+ *  Adapted for sparc64 by David S. Miller davem@davemloft.net
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/lmb.h>
+#include <linux/of_device.h>
+
+#include <asm/prom.h>
+#include <asm/oplib.h>
+#include <asm/irq.h>
+#include <asm/asi.h>
+#include <asm/upa.h>
+#include <asm/smp.h>
+
+#include "prom.h"
+
+void * __init prom_early_alloc(unsigned long size)
+{
+        unsigned long paddr = lmb_alloc(size, SMP_CACHE_BYTES);
+        void *ret;
+
+        if (!paddr) {
+                prom_printf("prom_early_alloc(%lu) failed\n");
+                prom_halt();
+        }
+
+        ret = __va(paddr);
+        memset(ret, 0, size);
+        prom_early_allocated += size;
+
+        return ret;
+}
+
+/* The following routines deal with the black magic of fully naming a
+ * node.
+ *
+ * Certain well known named nodes are just the simple name string.
+ *
+ * Actual devices have an address specifier appended to the base name
+ * string, like this "foo@addr".  The "addr" can be in any number of
+ * formats, and the platform plus the type of the node determine the
+ * format and how it is constructed.
+ *
+ * For children of the ROOT node, the naming convention is fixed and
+ * determined by whether this is a sun4u or sun4v system.
+ *
+ * For children of other nodes, it is bus type specific.  So
+ * we walk up the tree until we discover a "device_type" property
+ * we recognize and we go from there.
+ *
+ * As an example, the boot device on my workstation has a full path:
+ *
+ *      /pci@1e,600000/ide@d/disk@0,0:c
+ */
+static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct linux_prom64_registers *regs;
+        struct property *rprop;
+        u32 high_bits, low_bits, type;
+
+        rprop = of_find_property(dp, "reg", NULL);
+        if (!rprop)
+                return;
+
+        regs = rprop->value;
+        if (!is_root_node(dp->parent)) {
+                sprintf(tmp_buf, "%s@%x,%x",
+                        dp->name,
+                        (unsigned int) (regs->phys_addr >> 32UL),
+                        (unsigned int) (regs->phys_addr & 0xffffffffUL));
+                return;
+        }
+
+        type = regs->phys_addr >> 60UL;
+        high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
+        low_bits = (regs->phys_addr & 0xffffffffUL);
+
+        if (type == 0 || type == 8) {
+                const char *prefix = (type == 0) ? "m" : "i";
+
+                if (low_bits)
+                        sprintf(tmp_buf, "%s@%s%x,%x",
+                                dp->name, prefix,
+                                high_bits, low_bits);
+                else
+                        sprintf(tmp_buf, "%s@%s%x",
+                                dp->name,
+                                prefix,
+                                high_bits);
+        } else if (type == 12) {
+                sprintf(tmp_buf, "%s@%x",
+                        dp->name, high_bits);
+        }
+}
+
+static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct linux_prom64_registers *regs;
+        struct property *prop;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+        if (!is_root_node(dp->parent)) {
+                sprintf(tmp_buf, "%s@%x,%x",
+                        dp->name,
+                        (unsigned int) (regs->phys_addr >> 32UL),
+                        (unsigned int) (regs->phys_addr & 0xffffffffUL));
+                return;
+        }
+
+        prop = of_find_property(dp, "upa-portid", NULL);
+        if (!prop)
+                prop = of_find_property(dp, "portid", NULL);
+        if (prop) {
+                unsigned long mask = 0xffffffffUL;
+
+                if (tlb_type >= cheetah)
+                        mask = 0x7fffff;
+
+                sprintf(tmp_buf, "%s@%x,%x",
+                        dp->name,
+                        *(u32 *)prop->value,
+                        (unsigned int) (regs->phys_addr & mask));
+        }
+}
+
+/* "name@slot,offset"  */
+static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct linux_prom_registers *regs;
+        struct property *prop;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+        sprintf(tmp_buf, "%s@%x,%x",
+                dp->name,
+                regs->which_io,
+                regs->phys_addr);
+}
+
+/* "name@devnum[,func]" */
+static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct linux_prom_pci_registers *regs;
+        struct property *prop;
+        unsigned int devfn;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+        devfn = (regs->phys_hi >> 8) & 0xff;
+        if (devfn & 0x07) {
+                sprintf(tmp_buf, "%s@%x,%x",
+                        dp->name,
+                        devfn >> 3,
+                        devfn & 0x07);
+        } else {
+                sprintf(tmp_buf, "%s@%x",
+                        dp->name,
+                        devfn >> 3);
+        }
+}
+
+/* "name@UPA_PORTID,offset" */
+static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct linux_prom64_registers *regs;
+        struct property *prop;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+
+        prop = of_find_property(dp, "upa-portid", NULL);
+        if (!prop)
+                return;
+
+        sprintf(tmp_buf, "%s@%x,%x",
+                dp->name,
+                *(u32 *) prop->value,
+                (unsigned int) (regs->phys_addr & 0xffffffffUL));
+}
+
+/* "name@reg" */
+static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct property *prop;
+        u32 *regs;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+
+        sprintf(tmp_buf, "%s@%x", dp->name, *regs);
+}
+
+/* "name@addrhi,addrlo" */
+static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct linux_prom64_registers *regs;
+        struct property *prop;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+
+        sprintf(tmp_buf, "%s@%x,%x",
+                dp->name,
+                (unsigned int) (regs->phys_addr >> 32UL),
+                (unsigned int) (regs->phys_addr & 0xffffffffUL));
+}
+
+/* "name@bus,addr" */
+static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct property *prop;
+        u32 *regs;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+
+        /* This actually isn't right... should look at the #address-cells
+         * property of the i2c bus node etc. etc.
+         */
+        sprintf(tmp_buf, "%s@%x,%x",
+                dp->name, regs[0], regs[1]);
+}
+
+/* "name@reg0[,reg1]" */
+static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct property *prop;
+        u32 *regs;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+
+        if (prop->length == sizeof(u32) || regs[1] == 1) {
+                sprintf(tmp_buf, "%s@%x",
+                        dp->name, regs[0]);
+        } else {
+                sprintf(tmp_buf, "%s@%x,%x",
+                        dp->name, regs[0], regs[1]);
+        }
+}
+
+/* "name@reg0reg1[,reg2reg3]" */
+static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct property *prop;
+        u32 *regs;
+
+        prop = of_find_property(dp, "reg", NULL);
+        if (!prop)
+                return;
+
+        regs = prop->value;
+
+        if (regs[2] || regs[3]) {
+                sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
+                        dp->name, regs[0], regs[1], regs[2], regs[3]);
+        } else {
+                sprintf(tmp_buf, "%s@%08x%08x",
+                        dp->name, regs[0], regs[1]);
+        }
+}
+
+static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
+{
+        struct device_node *parent = dp->parent;
+
+        if (parent != NULL) {
+                if (!strcmp(parent->type, "pci") ||
+                    !strcmp(parent->type, "pciex")) {
+                        pci_path_component(dp, tmp_buf);
+                        return;
+                }
+                if (!strcmp(parent->type, "sbus")) {
+                        sbus_path_component(dp, tmp_buf);
+                        return;
+                }
+                if (!strcmp(parent->type, "upa")) {
+                        upa_path_component(dp, tmp_buf);
+                        return;
+                }
+                if (!strcmp(parent->type, "ebus")) {
+                        ebus_path_component(dp, tmp_buf);
+                        return;
+                }
+                if (!strcmp(parent->name, "usb") ||
+                    !strcmp(parent->name, "hub")) {
+                        usb_path_component(dp, tmp_buf);
+                        return;
+                }
+                if (!strcmp(parent->type, "i2c")) {
+                        i2c_path_component(dp, tmp_buf);
+                        return;
+                }
+                if (!strcmp(parent->type, "firewire")) {
+                        ieee1394_path_component(dp, tmp_buf);
+                        return;
+                }
+                if (!strcmp(parent->type, "virtual-devices")) {
+                        vdev_path_component(dp, tmp_buf);
+                        return;
+                }
+                /* "isa" is handled with platform naming */
+        }
+
+        /* Use platform naming convention.  */
+        if (tlb_type == hypervisor) {
+                sun4v_path_component(dp, tmp_buf);
+                return;
+        } else {
+                sun4u_path_component(dp, tmp_buf);
+        }
+}
+
+char * __init build_path_component(struct device_node *dp)
+{
+        char tmp_buf[64], *n;
+
+        tmp_buf[0] = '\0';
+        __build_path_component(dp, tmp_buf);
+        if (tmp_buf[0] == '\0')
+                strcpy(tmp_buf, dp->name);
+
+        n = prom_early_alloc(strlen(tmp_buf) + 1);
+        strcpy(n, tmp_buf);
+
+        return n;
+}
+
+static const char *get_mid_prop(void)
+{
+        return (tlb_type == spitfire ? "upa-portid" : "portid");
+}
+
+struct device_node *of_find_node_by_cpuid(int cpuid)
+{
+        struct device_node *dp;
+        const char *mid_prop = get_mid_prop();
+
+        for_each_node_by_type(dp, "cpu") {
+                int id = of_getintprop_default(dp, mid_prop, -1);
+                const char *this_mid_prop = mid_prop;
+
+                if (id < 0) {
+                        this_mid_prop = "cpuid";
+                        id = of_getintprop_default(dp, this_mid_prop, -1);
+                }
+
+                if (id < 0) {
+                        prom_printf("OF: Serious problem, cpu lacks "
+                                    "%s property", this_mid_prop);
+                        prom_halt();
+                }
+                if (cpuid == id)
+                        return dp;
+        }
+        return NULL;
+}
+
+void __init of_fill_in_cpu_data(void)
+{
+        struct device_node *dp;
+        const char *mid_prop;
+
+        if (tlb_type == hypervisor)
+                return;
+
+        mid_prop = get_mid_prop();
+        ncpus_probed = 0;
+        for_each_node_by_type(dp, "cpu") {
+                int cpuid = of_getintprop_default(dp, mid_prop, -1);
+                const char *this_mid_prop = mid_prop;
+                struct device_node *portid_parent;
+                int portid = -1;
+
+                portid_parent = NULL;
+                if (cpuid < 0) {
+                        this_mid_prop = "cpuid";
+                        cpuid = of_getintprop_default(dp, this_mid_prop, -1);
+                        if (cpuid >= 0) {
+                                int limit = 2;
+
+                                portid_parent = dp;
+                                while (limit--) {
+                                        portid_parent = portid_parent->parent;
+                                        if (!portid_parent)
+                                                break;
+                                        portid = of_getintprop_default(portid_parent,
+                                                                       "portid", -1);
+                                        if (portid >= 0)
+                                                break;
+                                }
+                        }
+                }
+
+                if (cpuid < 0) {
+                        prom_printf("OF: Serious problem, cpu lacks "
+                                    "%s property", this_mid_prop);
+                        prom_halt();
+                }
+
+                ncpus_probed++;
+
+#ifdef CONFIG_SMP
+                if (cpuid >= NR_CPUS) {
+                        printk(KERN_WARNING "Ignoring CPU %d which is "
+                               ">= NR_CPUS (%d)\n",
+                               cpuid, NR_CPUS);
+                        continue;
+                }
+#else
+                /* On uniprocessor we only want the values for the
+                 * real physical cpu the kernel booted onto, however
+                 * cpu_data() only has one entry at index 0.
+                 */
+                if (cpuid != real_hard_smp_processor_id())
+                        continue;
+                cpuid = 0;
+#endif
+
+                cpu_data(cpuid).clock_tick =
+                        of_getintprop_default(dp, "clock-frequency", 0);
+
+                if (portid_parent) {
+                        cpu_data(cpuid).dcache_size =
+                                of_getintprop_default(dp, "l1-dcache-size",
+                                                      16 * 1024);
+                        cpu_data(cpuid).dcache_line_size =
+                                of_getintprop_default(dp, "l1-dcache-line-size",
+                                                      32);
+                        cpu_data(cpuid).icache_size =
+                                of_getintprop_default(dp, "l1-icache-size",
+                                                      8 * 1024);
+                        cpu_data(cpuid).icache_line_size =
+                                of_getintprop_default(dp, "l1-icache-line-size",
+                                                      32);
+                        cpu_data(cpuid).ecache_size =
+                                of_getintprop_default(dp, "l2-cache-size", 0);
+                        cpu_data(cpuid).ecache_line_size =
+                                of_getintprop_default(dp, "l2-cache-line-size", 0);
+                        if (!cpu_data(cpuid).ecache_size ||
+                            !cpu_data(cpuid).ecache_line_size) {
+                                cpu_data(cpuid).ecache_size =
+                                        of_getintprop_default(portid_parent,
+                                                              "l2-cache-size",
+                                                              (4 * 1024 * 1024));
+                                cpu_data(cpuid).ecache_line_size =
+                                        of_getintprop_default(portid_parent,
+                                                              "l2-cache-line-size", 64);
+                        }
+
+                        cpu_data(cpuid).core_id = portid + 1;
+                        cpu_data(cpuid).proc_id = portid;
+#ifdef CONFIG_SMP
+                        sparc64_multi_core = 1;
+#endif
+                } else {
+                        cpu_data(cpuid).dcache_size =
+                                of_getintprop_default(dp, "dcache-size", 16 * 1024);
+                        cpu_data(cpuid).dcache_line_size =
+                                of_getintprop_default(dp, "dcache-line-size", 32);
+
+                        cpu_data(cpuid).icache_size =
+                                of_getintprop_default(dp, "icache-size", 16 * 1024);
+                        cpu_data(cpuid).icache_line_size =
+                                of_getintprop_default(dp, "icache-line-size", 32);
+
+                        cpu_data(cpuid).ecache_size =
+                                of_getintprop_default(dp, "ecache-size",
+                                                      (4 * 1024 * 1024));
+                        cpu_data(cpuid).ecache_line_size =
+                                of_getintprop_default(dp, "ecache-line-size", 64);
+
+                        cpu_data(cpuid).core_id = 0;
+                        cpu_data(cpuid).proc_id = -1;
+                }
+
+#ifdef CONFIG_SMP
+                cpu_set(cpuid, cpu_present_map);
+                cpu_set(cpuid, cpu_possible_map);
+#endif
+        }
+
+        smp_fill_in_sib_core_maps();
+}
+
+void __init of_console_init(void)
+{
+        char *msg = "OF stdout device is: %s\n";
+        struct device_node *dp;
+        const char *type;
+        phandle node;
+
+        of_console_path = prom_early_alloc(256);
+        if (prom_ihandle2path(prom_stdout, of_console_path, 256) < 0) {
+                prom_printf("Cannot obtain path of stdout.\n");
+                prom_halt();
+        }
+        of_console_options = strrchr(of_console_path, ':');
+        if (of_console_options) {
+                of_console_options++;
+                if (*of_console_options == '\0')
+                        of_console_options = NULL;
+        }
+
+        node = prom_inst2pkg(prom_stdout);
+        if (!node) {
+                prom_printf("Cannot resolve stdout node from "
+                            "instance %08x.\n", prom_stdout);
+                prom_halt();
+        }
+
+        dp = of_find_node_by_phandle(node);
+        type = of_get_property(dp, "device_type", NULL);
+        if (!type) {
+                prom_printf("Console stdout lacks device_type property.\n");
+                prom_halt();
+        }
+
+        if (strcmp(type, "display") && strcmp(type, "serial")) {
+                prom_printf("Console device_type is neither display "
+                            "nor serial.\n");
+                prom_halt();
+        }
+
+        of_console_device = dp;
+
+        printk(msg, of_console_path);
+}
diff --git a/arch/sparc/kernel/prom_common.c b/arch/sparc/kernel/prom_common.c
new file mode 100644
index 000000000000..ff7b591c8946
--- /dev/null
+++ b/arch/sparc/kernel/prom_common.c
@@ -0,0 +1,318 @@
+/* prom_common.c: OF device tree support common code.
+ *
+ * Paul Mackerras       August 1996.
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ *
+ *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
+ *    {engebret|bergner}@us.ibm.com
+ *
+ *  Adapted for sparc by David S. Miller davem@davemloft.net
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <asm/prom.h>
+#include <asm/oplib.h>
+
+#include "prom.h"
+
+struct device_node *of_console_device;
+EXPORT_SYMBOL(of_console_device);
+
+char *of_console_path;
+EXPORT_SYMBOL(of_console_path);
+
+char *of_console_options;
+EXPORT_SYMBOL(of_console_options);
+
+struct device_node *of_find_node_by_phandle(phandle handle)
+{
+        struct device_node *np;
+
+        for (np = allnodes; np; np = np->allnext)
+                if (np->node == handle)
+                        break;
+
+        return np;
+}
+EXPORT_SYMBOL(of_find_node_by_phandle);
+
+int of_getintprop_default(struct device_node *np, const char *name, int def)
+{
+        struct property *prop;
+        int len;
+
+        prop = of_find_property(np, name, &len);
+        if (!prop || len != 4)
+                return def;
+
+        return *(int *) prop->value;
+}
+EXPORT_SYMBOL(of_getintprop_default);
+
+DEFINE_MUTEX(of_set_property_mutex);
+EXPORT_SYMBOL(of_set_property_mutex);
+
+int of_set_property(struct device_node *dp, const char *name, void *val, int len)
+{
+        struct property **prevp;
+        void *new_val;
+        int err;
+
+        new_val = kmalloc(len, GFP_KERNEL);
+        if (!new_val)
+                return -ENOMEM;
+
+        memcpy(new_val, val, len);
+
+        err = -ENODEV;
+
+        write_lock(&devtree_lock);
+        prevp = &dp->properties;
+        while (*prevp) {
+                struct property *prop = *prevp;
+
+                if (!strcasecmp(prop->name, name)) {
+                        void *old_val = prop->value;
+                        int ret;
+
+                        mutex_lock(&of_set_property_mutex);
+                        ret = prom_setprop(dp->node, name, val, len);
+                        mutex_unlock(&of_set_property_mutex);
+
+                        err = -EINVAL;
+                        if (ret >= 0) {
+                                prop->value = new_val;
+                                prop->length = len;
+
+                                if (OF_IS_DYNAMIC(prop))
+                                        kfree(old_val);
+
+                                OF_MARK_DYNAMIC(prop);
+
+                                err = 0;
+                        }
+                        break;
+                }
+                prevp = &(*prevp)->next;
+        }
+        write_unlock(&devtree_lock);
+
+        /* XXX Upate procfs if necessary... */
+
+        return err;
+}
+EXPORT_SYMBOL(of_set_property);
+
+int of_find_in_proplist(const char *list, const char *match, int len)
+{
+        while (len > 0) {
+                int l;
+
+                if (!strcmp(list, match))
+                        return 1;
+                l = strlen(list) + 1;
+                list += l;
+                len -= l;
+        }
+        return 0;
+}
+EXPORT_SYMBOL(of_find_in_proplist);
+
+unsigned int prom_unique_id;
+
+static struct property * __init build_one_prop(phandle node, char *prev,
+                                               char *special_name,
+                                               void *special_val,
+                                               int special_len)
+{
+        static struct property *tmp = NULL;
+        struct property *p;
+        const char *name;
+
+        if (tmp) {
+                p = tmp;
+                memset(p, 0, sizeof(*p) + 32);
+                tmp = NULL;
+        } else {
+                p = prom_early_alloc(sizeof(struct property) + 32);
+                p->unique_id = prom_unique_id++;
+        }
+
+        p->name = (char *) (p + 1);
+        if (special_name) {
+                strcpy(p->name, special_name);
+                p->length = special_len;
+                p->value = prom_early_alloc(special_len);
+                memcpy(p->value, special_val, special_len);
+        } else {
+                if (prev == NULL) {
+                        name = prom_firstprop(node, p->name);
+                } else {
+                        name = prom_nextprop(node, prev, p->name);
+                }
+
+                if (strlen(name) == 0) {
+                        tmp = p;
+                        return NULL;
+                }
+#ifdef CONFIG_SPARC32
+                strcpy(p->name, name);
+#endif
+                p->length = prom_getproplen(node, p->name);
+                if (p->length <= 0) {
+                        p->length = 0;
+                } else {
+                        int len;
+
+                        p->value = prom_early_alloc(p->length + 1);
+                        len = prom_getproperty(node, p->name, p->value,
+                                               p->length);
+                        if (len <= 0)
+                                p->length = 0;
+                        ((unsigned char *)p->value)[p->length] = '\0';
+                }
+        }
+        return p;
+}
+
+static struct property * __init build_prop_list(phandle node)
+{
+        struct property *head, *tail;
+
+        head = tail = build_one_prop(node, NULL,
+                                     ".node", &node, sizeof(node));
+
+        tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
+        tail = tail->next;
+        while(tail) {
+                tail->next = build_one_prop(node, tail->name,
+                                            NULL, NULL, 0);
+                tail = tail->next;
+        }
+
+        return head;
+}
+
+static char * __init get_one_property(phandle node, const char *name)
+{
+        char *buf = "<NULL>";
+        int len;
+
+        len = prom_getproplen(node, name);
+        if (len > 0) {
+                buf = prom_early_alloc(len);
+                len = prom_getproperty(node, name, buf, len);
+        }
+
+        return buf;
+}
+
+static struct device_node * __init prom_create_node(phandle node,
+                                                    struct device_node *parent)
+{
+        struct device_node *dp;
+
+        if (!node)
+                return NULL;
+
+        dp = prom_early_alloc(sizeof(*dp));
+        dp->unique_id = prom_unique_id++;
+        dp->parent = parent;
+
+        kref_init(&dp->kref);
+
+        dp->name = get_one_property(node, "name");
+        dp->type = get_one_property(node, "device_type");
+        dp->node = node;
+
+        dp->properties = build_prop_list(node);
+
+        irq_trans_init(dp);
+
+        return dp;
+}
+
+static char * __init build_full_name(struct device_node *dp)
+{
+        int len, ourlen, plen;
+        char *n;
+
+        plen = strlen(dp->parent->full_name);
+        ourlen = strlen(dp->path_component_name);
+        len = ourlen + plen + 2;
+
+        n = prom_early_alloc(len);
+        strcpy(n, dp->parent->full_name);
+        if (!is_root_node(dp->parent)) {
+                strcpy(n + plen, "/");
+                plen++;
+        }
+        strcpy(n + plen, dp->path_component_name);
+
+        return n;
+}
+
+static struct device_node * __init prom_build_tree(struct device_node *parent,
+                                                   phandle node,
+                                                   struct device_node ***nextp)
+{
+        struct device_node *ret = NULL, *prev_sibling = NULL;
+        struct device_node *dp;
+
+        while (1) {
+                dp = prom_create_node(node, parent);
+                if (!dp)
+                        break;
+
+                if (prev_sibling)
+                        prev_sibling->sibling = dp;
+
+                if (!ret)
+                        ret = dp;
+                prev_sibling = dp;
+
+                *(*nextp) = dp;
+                *nextp = &dp->allnext;
+
+                dp->path_component_name = build_path_component(dp);
+                dp->full_name = build_full_name(dp);
+
+                dp->child = prom_build_tree(dp, prom_getchild(node), nextp);
+
+                node = prom_getsibling(node);
+        }
+
+        return ret;
+}
+
+unsigned int prom_early_allocated __initdata;
+
+void __init prom_build_devicetree(void)
+{
+        struct device_node **nextp;
+
+        allnodes = prom_create_node(prom_root_node, NULL);
+        allnodes->path_component_name = "";
+        allnodes->full_name = "/";
+
+        nextp = &allnodes->allnext;
+        allnodes->child = prom_build_tree(allnodes,
+                                          prom_getchild(allnodes->node),
+                                          &nextp);
+        of_console_init();
+
+        printk("PROM: Built device tree with %u bytes of memory.\n",
+               prom_early_allocated);
+
+        of_fill_in_cpu_data();
+}
diff --git a/arch/sparc64/kernel/prom.c b/arch/sparc/kernel/prom_irqtrans.c
index dbba82f9b142..96958c4dce8e 100644
--- a/arch/sparc64/kernel/prom.c
+++ b/arch/sparc/kernel/prom_irqtrans.c
@@ -1,151 +1,15 @@
-/*
- * Procedures for creating, accessing and interpreting the device tree.
- *
- * Paul Mackerras       August 1996.
- * Copyright (C) 1996-2005 Paul Mackerras.
- * 
- *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
- *    {engebret|bergner}@us.ibm.com 
- *
- *  Adapted for sparc64 by David S. Miller davem@davemloft.net
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- */
-
 #include <linux/kernel.h>
-#include <linux/types.h>
 #include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/lmb.h>
-#include <linux/of_device.h>
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
 
-#include <asm/prom.h>
 #include <asm/oplib.h>
+#include <asm/prom.h>
 #include <asm/irq.h>
-#include <asm/asi.h>
 #include <asm/upa.h>
-#include <asm/smp.h>
-
-extern struct device_node *allnodes;    /* temporary while merging */
-
-extern rwlock_t devtree_lock;   /* temporary while merging */
-
-struct device_node *of_find_node_by_phandle(phandle handle)
-{
-        struct device_node *np;
-
-        for (np = allnodes; np; np = np->allnext)
-                if (np->node == handle)
-                        break;
-
-        return np;
-}
-EXPORT_SYMBOL(of_find_node_by_phandle);
-
-int of_getintprop_default(struct device_node *np, const char *name, int def)
-{
-        struct property *prop;
-        int len;
-
-        prop = of_find_property(np, name, &len);
-        if (!prop || len != 4)
-                return def;
-
-        return *(int *) prop->value;
-}
-EXPORT_SYMBOL(of_getintprop_default);
-
-DEFINE_MUTEX(of_set_property_mutex);
-EXPORT_SYMBOL(of_set_property_mutex);
-
-int of_set_property(struct device_node *dp, const char *name, void *val, int len)
-{
-        struct property **prevp;
-        void *new_val;
-        int err;
-
-        new_val = kmalloc(len, GFP_KERNEL);
-        if (!new_val)
-                return -ENOMEM;
-
-        memcpy(new_val, val, len);
-
-        err = -ENODEV;
-
-        write_lock(&devtree_lock);
-        prevp = &dp->properties;
-        while (*prevp) {
-                struct property *prop = *prevp;
-
-                if (!strcasecmp(prop->name, name)) {
-                        void *old_val = prop->value;
-                        int ret;
-
-                        mutex_lock(&of_set_property_mutex);
-                        ret = prom_setprop(dp->node, name, val, len);
-                        mutex_unlock(&of_set_property_mutex);
-
-                        err = -EINVAL;
-                        if (ret >= 0) {
-                                prop->value = new_val;
-                                prop->length = len;
-
-                                if (OF_IS_DYNAMIC(prop))
-                                        kfree(old_val);
-
-                                OF_MARK_DYNAMIC(prop);
-
-                                err = 0;
-                        }
-                        break;
-                }
-                prevp = &(*prevp)->next;
-        }
-        write_unlock(&devtree_lock);
-
-        /* XXX Upate procfs if necessary... */
 
-        return err;
-}
-EXPORT_SYMBOL(of_set_property);
-
-int of_find_in_proplist(const char *list, const char *match, int len)
-{
-        while (len > 0) {
-                int l;
-
-                if (!strcmp(list, match))
-                        return 1;
-                l = strlen(list) + 1;
-                list += l;
-                len -= l;
-        }
-        return 0;
-}
-EXPORT_SYMBOL(of_find_in_proplist);
-
-static unsigned int prom_early_allocated __initdata;
-
-static void * __init prom_early_alloc(unsigned long size)
-{
-        unsigned long paddr = lmb_alloc(size, SMP_CACHE_BYTES);
-        void *ret;
-
-        if (!paddr) {
-                prom_printf("prom_early_alloc(%lu) failed\n");
-                prom_halt();
-        }
-
-        ret = __va(paddr);
-        memset(ret, 0, size);
-        prom_early_allocated += size;
-
-        return ret;
-}
+#include "prom.h"
 
 #ifdef CONFIG_PCI
 /* PSYCHO interrupt mapping support. */
@@ -936,7 +800,7 @@ static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 }
 
-static void __init irq_trans_init(struct device_node *dp)
+void __init irq_trans_init(struct device_node *dp)
 {
 #ifdef CONFIG_PCI
         const char *model;
@@ -976,709 +840,3 @@ static void __init irq_trans_init(struct device_node *dp)
                 return;
         }
 }
-
-static int is_root_node(const struct device_node *dp)
-{
-        if (!dp)
-                return 0;
-
-        return (dp->parent == NULL);
-}
-
-/* The following routines deal with the black magic of fully naming a
- * node.
- *
- * Certain well known named nodes are just the simple name string.
- *
- * Actual devices have an address specifier appended to the base name
- * string, like this "foo@addr".  The "addr" can be in any number of
- * formats, and the platform plus the type of the node determine the
- * format and how it is constructed.
- *
- * For children of the ROOT node, the naming convention is fixed and
- * determined by whether this is a sun4u or sun4v system.
- *
- * For children of other nodes, it is bus type specific.  So
- * we walk up the tree until we discover a "device_type" property
- * we recognize and we go from there.
- *
- * As an example, the boot device on my workstation has a full path:
- *
- *      /pci@1e,600000/ide@d/disk@0,0:c
- */
-static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct linux_prom64_registers *regs;
-        struct property *rprop;
-        u32 high_bits, low_bits, type;
-
-        rprop = of_find_property(dp, "reg", NULL);
-        if (!rprop)
-                return;
-
-        regs = rprop->value;
-        if (!is_root_node(dp->parent)) {
-                sprintf(tmp_buf, "%s@%x,%x",
-                        dp->name,
-                        (unsigned int) (regs->phys_addr >> 32UL),
-                        (unsigned int) (regs->phys_addr & 0xffffffffUL));
-                return;
-        }
-
-        type = regs->phys_addr >> 60UL;
-        high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
-        low_bits = (regs->phys_addr & 0xffffffffUL);
-
-        if (type == 0 || type == 8) {
-                const char *prefix = (type == 0) ? "m" : "i";
-
-                if (low_bits)
-                        sprintf(tmp_buf, "%s@%s%x,%x",
-                                dp->name, prefix,
-                                high_bits, low_bits);
-                else
-                        sprintf(tmp_buf, "%s@%s%x",
-                                dp->name,
-                                prefix,
-                                high_bits);
-        } else if (type == 12) {
-                sprintf(tmp_buf, "%s@%x",
-                        dp->name, high_bits);
-        }
-}
-
-static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct linux_prom64_registers *regs;
-        struct property *prop;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-        if (!is_root_node(dp->parent)) {
-                sprintf(tmp_buf, "%s@%x,%x",
-                        dp->name,
-                        (unsigned int) (regs->phys_addr >> 32UL),
-                        (unsigned int) (regs->phys_addr & 0xffffffffUL));
-                return;
-        }
-
-        prop = of_find_property(dp, "upa-portid", NULL);
-        if (!prop)
-                prop = of_find_property(dp, "portid", NULL);
-        if (prop) {
-                unsigned long mask = 0xffffffffUL;
-
-                if (tlb_type >= cheetah)
-                        mask = 0x7fffff;
-
-                sprintf(tmp_buf, "%s@%x,%x",
-                        dp->name,
-                        *(u32 *)prop->value,
-                        (unsigned int) (regs->phys_addr & mask));
-        }
-}
-
-/* "name@slot,offset"  */
-static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct linux_prom_registers *regs;
-        struct property *prop;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-        sprintf(tmp_buf, "%s@%x,%x",
-                dp->name,
-                regs->which_io,
-                regs->phys_addr);
-}
-
-/* "name@devnum[,func]" */
-static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct linux_prom_pci_registers *regs;
-        struct property *prop;
-        unsigned int devfn;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-        devfn = (regs->phys_hi >> 8) & 0xff;
-        if (devfn & 0x07) {
-                sprintf(tmp_buf, "%s@%x,%x",
-                        dp->name,
-                        devfn >> 3,
-                        devfn & 0x07);
-        } else {
-                sprintf(tmp_buf, "%s@%x",
-                        dp->name,
-                        devfn >> 3);
-        }
-}
-
-/* "name@UPA_PORTID,offset" */
-static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct linux_prom64_registers *regs;
-        struct property *prop;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-
-        prop = of_find_property(dp, "upa-portid", NULL);
-        if (!prop)
-                return;
-
-        sprintf(tmp_buf, "%s@%x,%x",
-                dp->name,
-                *(u32 *) prop->value,
-                (unsigned int) (regs->phys_addr & 0xffffffffUL));
-}
-
-/* "name@reg" */
-static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct property *prop;
-        u32 *regs;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-
-        sprintf(tmp_buf, "%s@%x", dp->name, *regs);
-}
-
-/* "name@addrhi,addrlo" */
-static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct linux_prom64_registers *regs;
-        struct property *prop;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-
-        sprintf(tmp_buf, "%s@%x,%x",
-                dp->name,
-                (unsigned int) (regs->phys_addr >> 32UL),
-                (unsigned int) (regs->phys_addr & 0xffffffffUL));
-}
-
-/* "name@bus,addr" */
-static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct property *prop;
-        u32 *regs;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-
-        /* This actually isn't right... should look at the #address-cells
-         * property of the i2c bus node etc. etc.
-         */
-        sprintf(tmp_buf, "%s@%x,%x",
-                dp->name, regs[0], regs[1]);
-}
-
-/* "name@reg0[,reg1]" */
-static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct property *prop;
-        u32 *regs;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-
-        if (prop->length == sizeof(u32) || regs[1] == 1) {
-                sprintf(tmp_buf, "%s@%x",
-                        dp->name, regs[0]);
-        } else {
-                sprintf(tmp_buf, "%s@%x,%x",
-                        dp->name, regs[0], regs[1]);
-        }
-}
-
-/* "name@reg0reg1[,reg2reg3]" */
-static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct property *prop;
-        u32 *regs;
-
-        prop = of_find_property(dp, "reg", NULL);
-        if (!prop)
-                return;
-
-        regs = prop->value;
-
-        if (regs[2] || regs[3]) {
-                sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
-                        dp->name, regs[0], regs[1], regs[2], regs[3]);
-        } else {
-                sprintf(tmp_buf, "%s@%08x%08x",
-                        dp->name, regs[0], regs[1]);
-        }
-}
-
-static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
-{
-        struct device_node *parent = dp->parent;
-
-        if (parent != NULL) {
-                if (!strcmp(parent->type, "pci") ||
-                    !strcmp(parent->type, "pciex")) {
-                        pci_path_component(dp, tmp_buf);
-                        return;
-                }
-                if (!strcmp(parent->type, "sbus")) {
-                        sbus_path_component(dp, tmp_buf);
-                        return;
-                }
-                if (!strcmp(parent->type, "upa")) {
-                        upa_path_component(dp, tmp_buf);
-                        return;
-                }
-                if (!strcmp(parent->type, "ebus")) {
-                        ebus_path_component(dp, tmp_buf);
-                        return;
-                }
-                if (!strcmp(parent->name, "usb") ||
-                    !strcmp(parent->name, "hub")) {
-                        usb_path_component(dp, tmp_buf);
-                        return;
-                }
-                if (!strcmp(parent->type, "i2c")) {
-                        i2c_path_component(dp, tmp_buf);
-                        return;
-                }
-                if (!strcmp(parent->type, "firewire")) {
-                        ieee1394_path_component(dp, tmp_buf);
-                        return;
-                }
-                if (!strcmp(parent->type, "virtual-devices")) {
-                        vdev_path_component(dp, tmp_buf);
-                        return;
-                }
-                /* "isa" is handled with platform naming */
-        }
-
-        /* Use platform naming convention.  */
-        if (tlb_type == hypervisor) {
-                sun4v_path_component(dp, tmp_buf);
-                return;
-        } else {
-                sun4u_path_component(dp, tmp_buf);
-        }
-}
-
-static char * __init build_path_component(struct device_node *dp)
-{
-        char tmp_buf[64], *n;
-
-        tmp_buf[0] = '\0';
-        __build_path_component(dp, tmp_buf);
-        if (tmp_buf[0] == '\0')
-                strcpy(tmp_buf, dp->name);
-
-        n = prom_early_alloc(strlen(tmp_buf) + 1);
-        strcpy(n, tmp_buf);
-
-        return n;
-}
-
-static char * __init build_full_name(struct device_node *dp)
-{
-        int len, ourlen, plen;
-        char *n;
-
-        plen = strlen(dp->parent->full_name);
-        ourlen = strlen(dp->path_component_name);
-        len = ourlen + plen + 2;
-
-        n = prom_early_alloc(len);
-        strcpy(n, dp->parent->full_name);
-        if (!is_root_node(dp->parent)) {
-                strcpy(n + plen, "/");
-                plen++;
-        }
-        strcpy(n + plen, dp->path_component_name);
-
-        return n;
-}
-
-static unsigned int unique_id;
-
-static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
-{
-        static struct property *tmp = NULL;
-        struct property *p;
-
-        if (tmp) {
-                p = tmp;
-                memset(p, 0, sizeof(*p) + 32);
-                tmp = NULL;
-        } else {
-                p = prom_early_alloc(sizeof(struct property) + 32);
-                p->unique_id = unique_id++;
-        }
-
-        p->name = (char *) (p + 1);
-        if (special_name) {
-                strcpy(p->name, special_name);
-                p->length = special_len;
-                p->value = prom_early_alloc(special_len);
-                memcpy(p->value, special_val, special_len);
-        } else {
-                if (prev == NULL) {
-                        prom_firstprop(node, p->name);
-                } else {
-                        prom_nextprop(node, prev, p->name);
-                }
-                if (strlen(p->name) == 0) {
-                        tmp = p;
-                        return NULL;
-                }
-                p->length = prom_getproplen(node, p->name);
-                if (p->length <= 0) {
-                        p->length = 0;
-                } else {
-                        p->value = prom_early_alloc(p->length + 1);
-                        prom_getproperty(node, p->name, p->value, p->length);
-                        ((unsigned char *)p->value)[p->length] = '\0';
-                }
-        }
-        return p;
-}
-
-static struct property * __init build_prop_list(phandle node)
-{
-        struct property *head, *tail;
-
-        head = tail = build_one_prop(node, NULL,
-                                     ".node", &node, sizeof(node));
-
-        tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
-        tail = tail->next;
-        while(tail) {
-                tail->next = build_one_prop(node, tail->name,
-                                            NULL, NULL, 0);
-                tail = tail->next;
-        }
-
-        return head;
-}
-
-static char * __init get_one_property(phandle node, const char *name)
-{
-        char *buf = "<NULL>";
-        int len;
-
-        len = prom_getproplen(node, name);
-        if (len > 0) {
-                buf = prom_early_alloc(len);
-                prom_getproperty(node, name, buf, len);
-        }
-
-        return buf;
-}
-
-static struct device_node * __init create_node(phandle node, struct device_node *parent)
-{
-        struct device_node *dp;
-
-        if (!node)
-                return NULL;
-
-        dp = prom_early_alloc(sizeof(*dp));
-        dp->unique_id = unique_id++;
-        dp->parent = parent;
-
-        kref_init(&dp->kref);
-
-        dp->name = get_one_property(node, "name");
-        dp->type = get_one_property(node, "device_type");
-        dp->node = node;
-
-        dp->properties = build_prop_list(node);
-
-        irq_trans_init(dp);
-
-        return dp;
-}
-
-static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
-{
-        struct device_node *ret = NULL, *prev_sibling = NULL;
-        struct device_node *dp;
-
-        while (1) {
-                dp = create_node(node, parent);
-                if (!dp)
-                        break;
-
-                if (prev_sibling)
-                        prev_sibling->sibling = dp;
-
-                if (!ret)
-                        ret = dp;
-                prev_sibling = dp;
-
-                *(*nextp) = dp;
-                *nextp = &dp->allnext;
-
-                dp->path_component_name = build_path_component(dp);
-                dp->full_name = build_full_name(dp);
-
-                dp->child = build_tree(dp, prom_getchild(node), nextp);
-
-                node = prom_getsibling(node);
-        }
-
-        return ret;
-}
-
-static const char *get_mid_prop(void)
-{
-        return (tlb_type == spitfire ? "upa-portid" : "portid");
-}
-
-struct device_node *of_find_node_by_cpuid(int cpuid)
-{
-        struct device_node *dp;
-        const char *mid_prop = get_mid_prop();
-
-        for_each_node_by_type(dp, "cpu") {
-                int id = of_getintprop_default(dp, mid_prop, -1);
-                const char *this_mid_prop = mid_prop;
-
-                if (id < 0) {
-                        this_mid_prop = "cpuid";
-                        id = of_getintprop_default(dp, this_mid_prop, -1);
-                }
-
-                if (id < 0) {
-                        prom_printf("OF: Serious problem, cpu lacks "
-                                    "%s property", this_mid_prop);
-                        prom_halt();
-                }
-                if (cpuid == id)
-                        return dp;
-        }
-        return NULL;
-}
-
-static void __init of_fill_in_cpu_data(void)
-{
-        struct device_node *dp;
-        const char *mid_prop = get_mid_prop();
-
-        ncpus_probed = 0;
-        for_each_node_by_type(dp, "cpu") {
-                int cpuid = of_getintprop_default(dp, mid_prop, -1);
-                const char *this_mid_prop = mid_prop;
-                struct device_node *portid_parent;
-                int portid = -1;
-
-                portid_parent = NULL;
-                if (cpuid < 0) {
-                        this_mid_prop = "cpuid";
-                        cpuid = of_getintprop_default(dp, this_mid_prop, -1);
-                        if (cpuid >= 0) {
-                                int limit = 2;
-
-                                portid_parent = dp;
-                                while (limit--) {
-                                        portid_parent = portid_parent->parent;
-                                        if (!portid_parent)
-                                                break;
-                                        portid = of_getintprop_default(portid_parent,
-                                                                       "portid", -1);
-                                        if (portid >= 0)
-                                                break;
-                                }
-                        }
-                }
-
-                if (cpuid < 0) {
-                        prom_printf("OF: Serious problem, cpu lacks "
-                                    "%s property", this_mid_prop);
-                        prom_halt();
-                }
-
-                ncpus_probed++;
-
-#ifdef CONFIG_SMP
-                if (cpuid >= NR_CPUS) {
-                        printk(KERN_WARNING "Ignoring CPU %d which is "
-                               ">= NR_CPUS (%d)\n",
-                               cpuid, NR_CPUS);
-                        continue;
-                }
-#else
-                /* On uniprocessor we only want the values for the
-                 * real physical cpu the kernel booted onto, however
-                 * cpu_data() only has one entry at index 0.
-                 */
-                if (cpuid != real_hard_smp_processor_id())
-                        continue;
-                cpuid = 0;
-#endif
-
-                cpu_data(cpuid).clock_tick =
-                        of_getintprop_default(dp, "clock-frequency", 0);
-
-                if (portid_parent) {
-                        cpu_data(cpuid).dcache_size =
-                                of_getintprop_default(dp, "l1-dcache-size",
-                                                      16 * 1024);
-                        cpu_data(cpuid).dcache_line_size =
-                                of_getintprop_default(dp, "l1-dcache-line-size",
-                                                      32);
-                        cpu_data(cpuid).icache_size =
-                                of_getintprop_default(dp, "l1-icache-size",
-                                                      8 * 1024);
-                        cpu_data(cpuid).icache_line_size =
-                                of_getintprop_default(dp, "l1-icache-line-size",
-                                                      32);
-                        cpu_data(cpuid).ecache_size =
-                                of_getintprop_default(dp, "l2-cache-size", 0);
-                        cpu_data(cpuid).ecache_line_size =
-                                of_getintprop_default(dp, "l2-cache-line-size", 0);
-                        if (!cpu_data(cpuid).ecache_size ||
-                            !cpu_data(cpuid).ecache_line_size) {
-                                cpu_data(cpuid).ecache_size =
-                                        of_getintprop_default(portid_parent,
-                                                              "l2-cache-size",
-                                                              (4 * 1024 * 1024));
-                                cpu_data(cpuid).ecache_line_size =
-                                        of_getintprop_default(portid_parent,
-                                                              "l2-cache-line-size", 64);
-                        }
-
-                        cpu_data(cpuid).core_id = portid + 1;
-                        cpu_data(cpuid).proc_id = portid;
-#ifdef CONFIG_SMP
-                        sparc64_multi_core = 1;
-#endif
-                } else {
-                        cpu_data(cpuid).dcache_size =
-                                of_getintprop_default(dp, "dcache-size", 16 * 1024);
-                        cpu_data(cpuid).dcache_line_size =
-                                of_getintprop_default(dp, "dcache-line-size", 32);
-
-                        cpu_data(cpuid).icache_size =
-                                of_getintprop_default(dp, "icache-size", 16 * 1024);
-                        cpu_data(cpuid).icache_line_size =
-                                of_getintprop_default(dp, "icache-line-size", 32);
-
-                        cpu_data(cpuid).ecache_size =
-                                of_getintprop_default(dp, "ecache-size",
-                                                      (4 * 1024 * 1024));
-                        cpu_data(cpuid).ecache_line_size =
-                                of_getintprop_default(dp, "ecache-line-size", 64);
-
-                        cpu_data(cpuid).core_id = 0;
-                        cpu_data(cpuid).proc_id = -1;
-                }
-
-#ifdef CONFIG_SMP
-                cpu_set(cpuid, cpu_present_map);
-                cpu_set(cpuid, cpu_possible_map);
-#endif
-        }
-
-        smp_fill_in_sib_core_maps();
-}
-
-struct device_node *of_console_device;
-EXPORT_SYMBOL(of_console_device);
-
-char *of_console_path;
-EXPORT_SYMBOL(of_console_path);
-
-char *of_console_options;
-EXPORT_SYMBOL(of_console_options);
-
-static void __init of_console_init(void)
-{
-        char *msg = "OF stdout device is: %s\n";
-        struct device_node *dp;
-        const char *type;
-        phandle node;
-
-        of_console_path = prom_early_alloc(256);
-        if (prom_ihandle2path(prom_stdout, of_console_path, 256) < 0) {
-                prom_printf("Cannot obtain path of stdout.\n");
-                prom_halt();
-        }
-        of_console_options = strrchr(of_console_path, ':');
-        if (of_console_options) {
-                of_console_options++;
-                if (*of_console_options == '\0')
-                        of_console_options = NULL;
-        }
-
-        node = prom_inst2pkg(prom_stdout);
-        if (!node) {
-                prom_printf("Cannot resolve stdout node from "
-                            "instance %08x.\n", prom_stdout);
-                prom_halt();
-        }
-
-        dp = of_find_node_by_phandle(node);
-        type = of_get_property(dp, "device_type", NULL);
-        if (!type) {
-                prom_printf("Console stdout lacks device_type property.\n");
-                prom_halt();
-        }
-
-        if (strcmp(type, "display") && strcmp(type, "serial")) {
-                prom_printf("Console device_type is neither display "
-                            "nor serial.\n");
-                prom_halt();
-        }
-
-        of_console_device = dp;
-
-        printk(msg, of_console_path);
-}
-
-void __init prom_build_devicetree(void)
-{
-        struct device_node **nextp;
-
-        allnodes = create_node(prom_root_node, NULL);
-        allnodes->path_component_name = "";
-        allnodes->full_name = "/";
-
-        nextp = &allnodes->allnext;
-        allnodes->child = build_tree(allnodes,
-                                     prom_getchild(allnodes->node),
-                                     &nextp);
-        of_console_init();
-
-        printk("PROM: Built device tree with %u bytes of memory.\n",
-               prom_early_allocated);
-
-        if (tlb_type != hypervisor)
-                of_fill_in_cpu_data();
-}
diff --git a/arch/sparc64/kernel/psycho_common.c b/arch/sparc/kernel/psycho_common.c
index 790996428c14..790996428c14 100644
--- a/arch/sparc64/kernel/psycho_common.c
+++ b/arch/sparc/kernel/psycho_common.c
diff --git a/arch/sparc64/kernel/psycho_common.h b/arch/sparc/kernel/psycho_common.h
index 092c278ef28d..092c278ef28d 100644
--- a/arch/sparc64/kernel/psycho_common.h
+++ b/arch/sparc/kernel/psycho_common.h
diff --git a/arch/sparc/kernel/ptrace.c b/arch/sparc/kernel/ptrace_32.c
index 8ce6285a06d5..8ce6285a06d5 100644
--- a/arch/sparc/kernel/ptrace.c
+++ b/arch/sparc/kernel/ptrace_32.c
diff --git a/arch/sparc64/kernel/ptrace.c b/arch/sparc/kernel/ptrace_64.c
index a941c610e7ce..a941c610e7ce 100644
--- a/arch/sparc64/kernel/ptrace.c
+++ b/arch/sparc/kernel/ptrace_64.c
diff --git a/arch/sparc64/kernel/reboot.c b/arch/sparc/kernel/reboot.c
index ef89d3d69748..ef89d3d69748 100644
--- a/arch/sparc64/kernel/reboot.c
+++ b/arch/sparc/kernel/reboot.c
diff --git a/arch/sparc/kernel/rtrap.S b/arch/sparc/kernel/rtrap_32.S
index 4da2e1f66290..4da2e1f66290 100644
--- a/arch/sparc/kernel/rtrap.S
+++ b/arch/sparc/kernel/rtrap_32.S
diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc/kernel/rtrap_64.S
index 97a993c1f7f3..fd3cee4d117c 100644
--- a/arch/sparc64/kernel/rtrap.S
+++ b/arch/sparc/kernel/rtrap_64.S
@@ -14,9 +14,9 @@
 #include <asm/visasm.h>
 #include <asm/processor.h>
 
-#define         RTRAP_PSTATE            (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
-#define         RTRAP_PSTATE_IRQOFF     (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV)
-#define         RTRAP_PSTATE_AG_IRQOFF  (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)
+#define         RTRAP_PSTATE            (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
+#define         RTRAP_PSTATE_IRQOFF     (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV)
+#define         RTRAP_PSTATE_AG_IRQOFF  (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)
 
                 .text
                 .align                  32
@@ -132,6 +132,18 @@ __handle_signal:
                 ba,pt                   %xcc, __handle_signal_continue
                  andn                   %l1, %l4, %l1
 
+                /* When returning from a NMI (%pil==15) interrupt we want to
+                 * avoid running softirqs, doing IRQ tracing, preempting, etc.
+                 */
+                .globl                  rtrap_nmi
+rtrap_nmi:      ldx                     [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
+                sethi                   %hi(0xf << 20), %l4
+                and                     %l1, %l4, %l4
+                andn                    %l1, %l4, %l1
+                srl                     %l4, 20, %l4
+                ba,pt                   %xcc, rtrap_no_irq_enable
+                 wrpr                   %l4, %pil
+
                 .align                  64
                 .globl                  rtrap_irq, rtrap, irqsz_patchme, rtrap_xcall
 rtrap_irq:
@@ -161,8 +173,8 @@ rtrap_xcall:
                 call                    trace_hardirqs_on
                  nop
                 wrpr                    %l4, %pil
-rtrap_no_irq_enable:
 #endif
+rtrap_no_irq_enable:
                 andcc                   %l1, TSTATE_PRIV, %l3
                 bne,pn                  %icc, to_kernel
                  nop
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc/kernel/sbus.c
index 2ead310066d1..2ead310066d1 100644
--- a/arch/sparc64/kernel/sbus.c
+++ b/arch/sparc/kernel/sbus.c
diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup_32.c
index 24fe3078bd4b..c96c65d1b58b 100644
--- a/arch/sparc/kernel/setup.c
+++ b/arch/sparc/kernel/setup_32.c
@@ -46,6 +46,8 @@
 #include <asm/cpudata.h>
 #include <asm/setup.h>
 
+#include "kernel.h"
+
 struct screen_info screen_info = {
         0, 0,                   /* orig-x, orig-y */
         0,                      /* unused */
@@ -308,9 +310,6 @@ void __init setup_arch(char **cmdline_p)
         smp_setup_cpu_possible_map();
 }
 
-extern char *sparc_cpu_type;
-extern char *sparc_fpu_type;
-
 static int ncpus_probed;
 
 static int show_cpuinfo(struct seq_file *m, void *__unused)
@@ -328,8 +327,8 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
                    "CPU0ClkTck\t: %ld\n"
 #endif
                    ,
-                   sparc_cpu_type ? sparc_cpu_type : "undetermined",
-                   sparc_fpu_type ? sparc_fpu_type : "undetermined",
+                   sparc_cpu_type,
+                   sparc_fpu_type ,
                    romvec->pv_romvers,
                    prom_rev,
                    romvec->pv_printrev >> 16,
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc/kernel/setup_64.c
index c8b03a4f68bf..555db7452ebe 100644
--- a/arch/sparc64/kernel/setup.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -52,6 +52,7 @@
 #endif
 
 #include "entry.h"
+#include "kernel.h"
 
 /* Used to synchronize accesses to NatSemi SUPER I/O chip configure
  * operations in asm/ns87303.h
diff --git a/arch/sparc64/kernel/signal32.c b/arch/sparc/kernel/signal32.c
index ba5b09ad6666..ba5b09ad6666 100644
--- a/arch/sparc64/kernel/signal32.c
+++ b/arch/sparc/kernel/signal32.c
diff --git a/arch/sparc/kernel/signal.c b/arch/sparc/kernel/signal_32.c
index c94f91c8b6e0..181d069a2d44 100644
--- a/arch/sparc/kernel/signal.c
+++ b/arch/sparc/kernel/signal_32.c
@@ -34,7 +34,7 @@ extern void fpload(unsigned long *fpregs, unsigned long *fsr);
 
 struct signal_frame {
         struct sparc_stackf     ss;
-        __siginfo_t             info;
+        __siginfo32_t           info;
         __siginfo_fpu_t __user  *fpu_save;
         unsigned long           insns[2] __attribute__ ((aligned (8)));
         unsigned int            extramask[_NSIG_WORDS - 1];
@@ -351,7 +351,7 @@ static void setup_frame(struct k_sigaction *ka, struct pt_regs *regs,
         err |= __copy_to_user(sf->extramask, &oldset->sig[1],
                               (_NSIG_WORDS - 1) * sizeof(unsigned int));
         err |= __copy_to_user(sf, (char *) regs->u_regs[UREG_FP],
-                              sizeof(struct reg_window));
+                              sizeof(struct reg_window32));
         if (err)
                 goto sigsegv;
         
@@ -433,7 +433,7 @@ static void setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
         err |= __put_user(current->sas_ss_size, &sf->stack.ss_size);
         
         err |= __copy_to_user(sf, (char *) regs->u_regs[UREG_FP],
-                              sizeof(struct reg_window));       
+                              sizeof(struct reg_window32));
 
         err |= copy_siginfo_to_user(&sf->info, info);
 
diff --git a/arch/sparc64/kernel/signal.c b/arch/sparc/kernel/signal_64.c
index ec82d76dc6f2..ec82d76dc6f2 100644
--- a/arch/sparc64/kernel/signal.c
+++ b/arch/sparc/kernel/signal_64.c
diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp_32.c
index e396c1f17a92..1e5ac4e282e1 100644
--- a/arch/sparc/kernel/smp.c
+++ b/arch/sparc/kernel/smp_32.c
@@ -39,8 +39,6 @@ volatile unsigned long cpu_callin_map[NR_CPUS] __cpuinitdata = {0,};
 unsigned char boot_cpu_id = 0;
 unsigned char boot_cpu_id4 = 0; /* boot_cpu_id << 2 */
 
-cpumask_t cpu_online_map = CPU_MASK_NONE;
-cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
 cpumask_t smp_commenced_mask = CPU_MASK_NONE;
 
 /* The only guaranteed locking primitive available on all Sparc
@@ -334,7 +332,7 @@ void __init smp_setup_cpu_possible_map(void)
         instance = 0;
         while (!cpu_find_by_instance(instance, NULL, &mid)) {
                 if (mid < NR_CPUS) {
-                        cpu_set(mid, phys_cpu_present_map);
+                        cpu_set(mid, cpu_possible_map);
                         cpu_set(mid, cpu_present_map);
                 }
                 instance++;
@@ -354,7 +352,7 @@ void __init smp_prepare_boot_cpu(void)
 
         current_thread_info()->cpu = cpuid;
         cpu_set(cpuid, cpu_online_map);
-        cpu_set(cpuid, phys_cpu_present_map);
+        cpu_set(cpuid, cpu_possible_map);
 }
 
 int __cpuinit __cpu_up(unsigned int cpu)
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc/kernel/smp_64.c
index f500b0618bb0..46329799f346 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -49,14 +49,10 @@
 
 int sparc64_multi_core __read_mostly;
 
-cpumask_t cpu_possible_map __read_mostly = CPU_MASK_NONE;
-cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE;
 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE;
 cpumask_t cpu_core_map[NR_CPUS] __read_mostly =
         { [0 ... NR_CPUS-1] = CPU_MASK_NONE };
 
-EXPORT_SYMBOL(cpu_possible_map);
-EXPORT_SYMBOL(cpu_online_map);
 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
 EXPORT_SYMBOL(cpu_core_map);
 
@@ -163,7 +159,7 @@ static inline long get_delta (long *rt, long *master)
         for (i = 0; i < NUM_ITERS; i++) {
                 t0 = tick_ops->get_tick();
                 go[MASTER] = 1;
-                membar_storeload();
+                membar_safe("#StoreLoad");
                 while (!(tm = go[SLAVE]))
                         rmb();
                 go[SLAVE] = 0;
@@ -257,7 +253,7 @@ static void smp_synchronize_one_tick(int cpu)
 
         /* now let the client proceed into his loop */
         go[MASTER] = 0;
-        membar_storeload();
+        membar_safe("#StoreLoad");
 
         spin_lock_irqsave(&itc_sync_lock, flags);
         {
@@ -267,7 +263,7 @@ static void smp_synchronize_one_tick(int cpu)
                         go[MASTER] = 0;
                         wmb();
                         go[SLAVE] = tick_ops->get_tick();
-                        membar_storeload();
+                        membar_safe("#StoreLoad");
                 }
         }
         spin_unlock_irqrestore(&itc_sync_lock, flags);
@@ -773,7 +769,7 @@ static void xcall_deliver(u64 data0, u64 data1, u64 data2, const cpumask_t *mask
 
         /* Setup the initial cpu list.  */
         cnt = 0;
-        for_each_cpu_mask_nr(i, *mask) {
+        for_each_cpu(i, mask) {
                 if (i == this_cpu || !cpu_online(i))
                         continue;
                 cpu_list[cnt++] = i;
@@ -1122,7 +1118,6 @@ void smp_capture(void)
                        smp_processor_id());
 #endif
                 penguins_are_doing_time = 1;
-                membar_storestore_loadstore();
                 atomic_inc(&smp_capture_registry);
                 smp_cross_call(&xcall_capture, 0, 0, 0);
                 while (atomic_read(&smp_capture_registry) != ncpus)
@@ -1142,13 +1137,13 @@ void smp_release(void)
                        smp_processor_id());
 #endif
                 penguins_are_doing_time = 0;
-                membar_storeload_storestore();
+                membar_safe("#StoreLoad");
                 atomic_dec(&smp_capture_registry);
         }
 }
 
-/* Imprisoned penguins run with %pil == 15, but PSTATE_IE set, so they
- * can service tlb flush xcalls...
+/* Imprisoned penguins run with %pil == PIL_NORMAL_MAX, but PSTATE_IE
+ * set, so they can service tlb flush xcalls...
  */
 extern void prom_world(int);
 
@@ -1161,7 +1156,7 @@ void smp_penguin_jailcell(int irq, struct pt_regs *regs)
         __asm__ __volatile__("flushw");
         prom_world(1);
         atomic_inc(&smp_capture_registry);
-        membar_storeload_storestore();
+        membar_safe("#StoreLoad");
         while (penguins_are_doing_time)
                 rmb();
         atomic_dec(&smp_capture_registry);
diff --git a/arch/sparc/kernel/sparc_ksyms.c b/arch/sparc/kernel/sparc_ksyms_32.c
index b0dfff848653..e1e97639231b 100644
--- a/arch/sparc/kernel/sparc_ksyms.c
+++ b/arch/sparc/kernel/sparc_ksyms_32.c
@@ -61,7 +61,6 @@ extern void (*bzero_1page)(void *);
 extern void *__bzero(void *, size_t);
 extern void *__memscan_zero(void *, size_t);
 extern void *__memscan_generic(void *, int, size_t);
-extern int __memcmp(const void *, const void *, __kernel_size_t);
 extern int __strncmp(const char *, const char *, __kernel_size_t);
 
 extern int __ashrdi3(int, int);
@@ -113,19 +112,13 @@ EXPORT_PER_CPU_SYMBOL(__cpu_data);
 #ifdef CONFIG_SMP
 /* IRQ implementation. */
 EXPORT_SYMBOL(synchronize_irq);
-
-/* CPU online map and active count. */
-EXPORT_SYMBOL(cpu_online_map);
-EXPORT_SYMBOL(phys_cpu_present_map);
 #endif
 
 EXPORT_SYMBOL(__udelay);
 EXPORT_SYMBOL(__ndelay);
 EXPORT_SYMBOL(rtc_lock);
-#ifdef CONFIG_SUN_AUXIO
 EXPORT_SYMBOL(set_auxio);
 EXPORT_SYMBOL(get_auxio);
-#endif
 EXPORT_SYMBOL(io_remap_pfn_range);
 
 #ifndef CONFIG_SMP
@@ -213,7 +206,6 @@ EXPORT_SYMBOL(bzero_1page);
 EXPORT_SYMBOL(__bzero);
 EXPORT_SYMBOL(__memscan_zero);
 EXPORT_SYMBOL(__memscan_generic);
-EXPORT_SYMBOL(__memcmp);
 EXPORT_SYMBOL(__strncmp);
 EXPORT_SYMBOL(__memmove);
 
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc/kernel/sparc_ksyms_64.c
index 30bba8b0a3b0..0133211ab634 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc/kernel/sparc_ksyms_64.c
@@ -49,6 +49,7 @@
 #include <asm/timer.h>
 #include <asm/cpudata.h>
 #include <asm/ftrace.h>
+#include <asm/hypervisor.h>
 
 struct poll {
         int fd;
@@ -61,7 +62,6 @@ extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 extern void *__bzero(void *, size_t);
 extern void *__memscan_zero(void *, size_t);
 extern void *__memscan_generic(void *, int, size_t);
-extern int __memcmp(const void *, const void *, __kernel_size_t);
 extern __kernel_size_t strlen(const char *);
 extern void sys_sigsuspend(void);
 extern int compat_sys_ioctl(unsigned int fd, unsigned int cmd, u32 arg);
@@ -148,10 +148,13 @@ EXPORT_SYMBOL(flush_dcache_page);
 EXPORT_SYMBOL(__flush_dcache_range);
 #endif
 
-#ifdef CONFIG_SUN_AUXIO
+EXPORT_SYMBOL(sun4v_niagara_getperf);
+EXPORT_SYMBOL(sun4v_niagara_setperf);
+EXPORT_SYMBOL(sun4v_niagara2_getperf);
+EXPORT_SYMBOL(sun4v_niagara2_setperf);
+
 EXPORT_SYMBOL(auxio_set_led);
 EXPORT_SYMBOL(auxio_set_lte);
-#endif
 #ifdef CONFIG_SBUS
 EXPORT_SYMBOL(sbus_set_sbus64);
 #endif
@@ -177,7 +180,6 @@ EXPORT_SYMBOL(pci_dma_supported);
 EXPORT_SYMBOL(io_remap_pfn_range);
 
 EXPORT_SYMBOL(dump_fpu);
-EXPORT_SYMBOL(put_fs_struct);
 
 /* math-emu wants this */
 EXPORT_SYMBOL(die_if_kernel);
@@ -219,7 +221,6 @@ EXPORT_SYMBOL(copy_user_page);
 EXPORT_SYMBOL(__bzero);
 EXPORT_SYMBOL(__memscan_zero);
 EXPORT_SYMBOL(__memscan_generic);
-EXPORT_SYMBOL(__memcmp);
 EXPORT_SYMBOL(__memset);
 
 EXPORT_SYMBOL(csum_partial);
diff --git a/arch/sparc64/kernel/spiterrs.S b/arch/sparc/kernel/spiterrs.S
index ef902c6f8e3c..c357e40ffd01 100644
--- a/arch/sparc64/kernel/spiterrs.S
+++ b/arch/sparc/kernel/spiterrs.S
@@ -80,7 +80,7 @@ __spitfire_cee_trap_continue:
         cmp             %g2, 1
         rdpr            %pil, %g2
         bleu,pt         %xcc, 1f
-         wrpr           %g0, 15, %pil
+         wrpr           %g0, PIL_NORMAL_MAX, %pil
 
         ba,pt           %xcc, etraptl1
          rd             %pc, %g7
diff --git a/arch/sparc64/kernel/sstate.c b/arch/sparc/kernel/sstate.c
index 8cdbe5946b43..8cdbe5946b43 100644
--- a/arch/sparc64/kernel/sstate.c
+++ b/arch/sparc/kernel/sstate.c
diff --git a/arch/sparc64/kernel/stacktrace.c b/arch/sparc/kernel/stacktrace.c
index 4e21d4a57d3b..acb12f673757 100644
--- a/arch/sparc64/kernel/stacktrace.c
+++ b/arch/sparc/kernel/stacktrace.c
@@ -7,17 +7,18 @@
 
 #include "kstack.h"
 
-void save_stack_trace(struct stack_trace *trace)
+static void __save_stack_trace(struct thread_info *tp,
+                               struct stack_trace *trace,
+                               bool skip_sched)
 {
-        struct thread_info *tp = task_thread_info(current);
         unsigned long ksp, fp;
 
-        stack_trace_flush();
-
-        __asm__ __volatile__(
-                "mov    %%fp, %0"
-                : "=r" (ksp)
-        );
+        if (tp == current_thread_info()) {
+                stack_trace_flush();
+                __asm__ __volatile__("mov %%fp, %0" : "=r" (ksp));
+        } else {
+                ksp = tp->ksp;
+        }
 
         fp = ksp + STACK_BIAS;
         do {
@@ -43,8 +44,21 @@ void save_stack_trace(struct stack_trace *trace)
 
                 if (trace->skip > 0)
                         trace->skip--;
-                else
+                else if (!skip_sched || !in_sched_functions(pc))
                         trace->entries[trace->nr_entries++] = pc;
         } while (trace->nr_entries < trace->max_entries);
 }
+
+void save_stack_trace(struct stack_trace *trace)
+{
+        __save_stack_trace(current_thread_info(), trace, false);
+}
 EXPORT_SYMBOL_GPL(save_stack_trace);
+
+void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
+{
+        struct thread_info *tp = task_thread_info(tsk);
+
+        __save_stack_trace(tp, trace, true);
+}
+EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
diff --git a/arch/sparc64/kernel/starfire.c b/arch/sparc/kernel/starfire.c
index 060d0f3a6151..060d0f3a6151 100644
--- a/arch/sparc64/kernel/starfire.c
+++ b/arch/sparc/kernel/starfire.c
diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c
index 5dc8a5769489..bc3adbf79c6a 100644
--- a/arch/sparc/kernel/sun4c_irq.c
+++ b/arch/sparc/kernel/sun4c_irq.c
@@ -160,6 +160,7 @@ static void __init sun4c_init_timers(irq_handler_t counter_fn)
         sun4c_timers = (void __iomem *) (unsigned long) addr[0];
 
         irq = of_get_property(dp, "intr", NULL);
+        of_node_put(dp);
         if (!irq) {
                 prom_printf("sun4c_init_timers: No intr property\n");
                 prom_halt();
@@ -200,6 +201,7 @@ void __init sun4c_init_IRQ(void)
         }
 
         addr = of_get_property(dp, "address", NULL);
+        of_node_put(dp);
         if (!addr) {
                 prom_printf("sun4c_init_IRQ: No address property\n");
                 prom_halt();
diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c
index d3cb76ce418b..3369fef5b4b3 100644
--- a/arch/sparc/kernel/sun4d_irq.c
+++ b/arch/sparc/kernel/sun4d_irq.c
@@ -40,6 +40,7 @@
 #include <asm/cacheflush.h>
 #include <asm/irq_regs.h>
 
+#include "kernel.h"
 #include "irq.h"
 
 /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */
@@ -58,7 +59,6 @@ static struct sun4d_timer_regs __iomem *sun4d_timers;
 #define TIMER_IRQ       10
 
 #define MAX_STATIC_ALLOC        4
-extern struct irqaction static_irqaction[MAX_STATIC_ALLOC];
 extern int static_irq_count;
 static unsigned char sbus_tid[32];
 
@@ -508,6 +508,7 @@ static void __init sun4d_init_timers(irq_handler_t counter_fn)
          * bootbus.
          */
         reg = of_get_property(dp, "reg", NULL);
+        of_node_put(dp);
         if (!reg) {
                 prom_printf("sun4d_init_timers: No reg property\n");
                 prom_halt();
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c
index f10317179ee6..301892e2d718 100644
--- a/arch/sparc/kernel/sun4m_irq.c
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -374,6 +374,7 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn)
         }
 
         addr = of_get_property(dp, "address", &len);
+        of_node_put(dp);
         if (!addr) {
                 printk(KERN_ERR "sun4m_init_timers: No 'address' prop.\n");
                 return;
@@ -437,6 +438,7 @@ void __init sun4m_init_IRQ(void)
         }
 
         addr = of_get_property(dp, "address", &len);
+        of_node_put(dp);
         if (!addr) {
                 printk(KERN_ERR "sun4m_init_IRQ: No 'address' prop.\n");
                 return;
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc/kernel/sun4v_ivec.S
index e2f8e1b4882a..559bc5e9c199 100644
--- a/arch/sparc64/kernel/sun4v_ivec.S
+++ b/arch/sparc/kernel/sun4v_ivec.S
@@ -186,7 +186,7 @@ sun4v_res_mondo:
          * when it's done.
          */
         rdpr    %pil, %g2
-        wrpr    %g0, 15, %pil
+        wrpr    %g0, PIL_NORMAL_MAX, %pil
         mov     %g1, %g4
         ba,pt   %xcc, etrap_irq
          rd     %pc, %g7
@@ -216,7 +216,7 @@ sun4v_res_mondo_queue_full:
         membar  #Sync
 
         rdpr    %pil, %g2
-        wrpr    %g0, 15, %pil
+        wrpr    %g0, PIL_NORMAL_MAX, %pil
         ba,pt   %xcc, etrap_irq
          rd     %pc, %g7
 #ifdef CONFIG_TRACE_IRQFLAGS
@@ -297,7 +297,7 @@ sun4v_nonres_mondo:
          * when it's done.
          */
         rdpr    %pil, %g2
-        wrpr    %g0, 15, %pil
+        wrpr    %g0, PIL_NORMAL_MAX, %pil
         mov     %g1, %g4
         ba,pt   %xcc, etrap_irq
          rd     %pc, %g7
@@ -327,7 +327,7 @@ sun4v_nonres_mondo_queue_full:
         membar  #Sync
 
         rdpr    %pil, %g2
-        wrpr    %g0, 15, %pil
+        wrpr    %g0, PIL_NORMAL_MAX, %pil
         ba,pt   %xcc, etrap_irq
          rd     %pc, %g7
 #ifdef CONFIG_TRACE_IRQFLAGS
diff --git a/arch/sparc64/kernel/sun4v_tlb_miss.S b/arch/sparc/kernel/sun4v_tlb_miss.S
index e1fbf8c75787..e1fbf8c75787 100644
--- a/arch/sparc64/kernel/sun4v_tlb_miss.S
+++ b/arch/sparc/kernel/sun4v_tlb_miss.S
diff --git a/arch/sparc64/kernel/sys32.S b/arch/sparc/kernel/sys32.S
index f061c4dda9ef..f061c4dda9ef 100644
--- a/arch/sparc64/kernel/sys32.S
+++ b/arch/sparc/kernel/sys32.S
diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc/kernel/sys_sparc32.c
index e800503879e4..e800503879e4 100644
--- a/arch/sparc64/kernel/sys_sparc32.c
+++ b/arch/sparc/kernel/sys_sparc32.c
diff --git a/arch/sparc/kernel/sys_sparc.c b/arch/sparc/kernel/sys_sparc_32.c
index 03035c852a43..03035c852a43 100644
--- a/arch/sparc/kernel/sys_sparc.c
+++ b/arch/sparc/kernel/sys_sparc_32.c
diff --git a/arch/sparc64/kernel/sys_sparc.c b/arch/sparc/kernel/sys_sparc_64.c
index 39749e32dc7e..39749e32dc7e 100644
--- a/arch/sparc64/kernel/sys_sparc.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
diff --git a/arch/sparc64/kernel/syscalls.S b/arch/sparc/kernel/syscalls.S
index 7a6786a71363..7a6786a71363 100644
--- a/arch/sparc64/kernel/syscalls.S
+++ b/arch/sparc/kernel/syscalls.S
diff --git a/arch/sparc64/kernel/sysfs.c b/arch/sparc/kernel/sysfs.c
index 84e5ce146713..d28f496f4669 100644
--- a/arch/sparc64/kernel/sysfs.c
+++ b/arch/sparc/kernel/sysfs.c
@@ -8,6 +8,7 @@
 #include <linux/percpu.h>
 #include <linux/init.h>
 
+#include <asm/cpudata.h>
 #include <asm/hypervisor.h>
 #include <asm/spitfire.h>
 
diff --git a/arch/sparc64/kernel/systbls.h b/arch/sparc/kernel/systbls.h
index bc9f5dac4069..bc9f5dac4069 100644
--- a/arch/sparc64/kernel/systbls.h
+++ b/arch/sparc/kernel/systbls.h
diff --git a/arch/sparc/kernel/systbls.S b/arch/sparc/kernel/systbls_32.S
index 7d0807586442..7d0807586442 100644
--- a/arch/sparc/kernel/systbls.S
+++ b/arch/sparc/kernel/systbls_32.S
diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc/kernel/systbls_64.S
index 9fc78cf354bd..9fc78cf354bd 100644
--- a/arch/sparc64/kernel/systbls.S
+++ b/arch/sparc/kernel/systbls_64.S
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time_32.c
index 00f7383c7657..00f7383c7657 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time_32.c
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc/kernel/time_64.c
index 141da3759091..9df8f095a8b1 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc/kernel/time_64.c
@@ -763,7 +763,7 @@ void __devinit setup_sparc64_timer(void)
         sevt = &__get_cpu_var(sparc64_events);
 
         memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
-        sevt->cpumask = cpumask_of_cpu(smp_processor_id());
+        sevt->cpumask = cpumask_of(smp_processor_id());
 
         clockevents_register_device(sevt);
 }
diff --git a/arch/sparc/kernel/trampoline.S b/arch/sparc/kernel/trampoline_32.S
index 5e235c52d667..5e235c52d667 100644
--- a/arch/sparc/kernel/trampoline.S
+++ b/arch/sparc/kernel/trampoline_32.S
diff --git a/arch/sparc64/kernel/trampoline.S b/arch/sparc/kernel/trampoline_64.S
index 83abd5ae88a4..da1b781b5e65 100644
--- a/arch/sparc64/kernel/trampoline.S
+++ b/arch/sparc/kernel/trampoline_64.S
@@ -109,7 +109,6 @@ startup_continue:
          */
         sethi           %hi(prom_entry_lock), %g2
 1:      ldstub          [%g2 + %lo(prom_entry_lock)], %g1
-        membar          #StoreLoad | #StoreStore
         brnz,pn         %g1, 1b
          nop
 
@@ -214,7 +213,6 @@ startup_continue:
 
         sethi           %hi(prom_entry_lock), %g2
         stb             %g0, [%g2 + %lo(prom_entry_lock)]
-        membar          #StoreStore | #StoreLoad
 
         ba,pt           %xcc, after_lock_tlb
          nop
@@ -330,7 +328,6 @@ after_lock_tlb:
 
         sethi           %hi(prom_entry_lock), %g2
 1:      ldstub          [%g2 + %lo(prom_entry_lock)], %g1
-        membar          #StoreLoad | #StoreStore
         brnz,pn         %g1, 1b
          nop
 
@@ -394,7 +391,6 @@ after_lock_tlb:
 
 3:      sethi           %hi(prom_entry_lock), %g2
         stb             %g0, [%g2 + %lo(prom_entry_lock)]
-        membar          #StoreStore | #StoreLoad
 
         ldx             [%l0], %g6
         ldx             [%g6 + TI_TASK], %g4
diff --git a/arch/sparc/kernel/traps.c b/arch/sparc/kernel/traps_32.c
index 2b7d50659036..213645be6e92 100644
--- a/arch/sparc/kernel/traps.c
+++ b/arch/sparc/kernel/traps_32.c
@@ -25,31 +25,10 @@
 #include <asm/unistd.h>
 #include <asm/traps.h>
 
-/* #define TRAP_DEBUG */
-
-struct trap_trace_entry {
-        unsigned long pc;
-        unsigned long type;
-};
-
-void syscall_trace_entry(struct pt_regs *regs)
-{
-        printk("%s[%d]: ", current->comm, task_pid_nr(current));
-        printk("scall<%d> (could be %d)\n", (int) regs->u_regs[UREG_G1],
-               (int) regs->u_regs[UREG_I0]);
-}
-
-void syscall_trace_exit(struct pt_regs *regs)
-{
-}
+#include "entry.h"
+#include "kernel.h"
 
-void sun4d_nmi(struct pt_regs *regs)
-{
-        printk("Aieee: sun4d NMI received!\n");
-        printk("you lose buddy boy...\n");
-        show_regs(regs);
-        prom_halt();
-}
+/* #define TRAP_DEBUG */
 
 static void instruction_dump(unsigned long *pc)
 {
@@ -88,7 +67,7 @@ void die_if_kernel(char *str, struct pt_regs *regs)
         __RESTORE; __RESTORE; __RESTORE; __RESTORE;
 
         {
-                struct reg_window *rw = (struct reg_window *)regs->u_regs[UREG_FP];
+                struct reg_window32 *rw = (struct reg_window32 *)regs->u_regs[UREG_FP];
 
                 /* Stop the back trace when we hit userland or we
                  * find some badly aligned kernel stack. Set an upper
@@ -100,7 +79,7 @@ void die_if_kernel(char *str, struct pt_regs *regs)
                       !(((unsigned long) rw) & 0x7)) {
                         printk("Caller[%08lx]: %pS\n", rw->ins[7],
                                (void *) rw->ins[7]);
-                        rw = (struct reg_window *)rw->ins[6];
+                        rw = (struct reg_window32 *)rw->ins[6];
                 }
         }
         printk("Instruction DUMP:");
@@ -134,7 +113,6 @@ void do_hw_interrupt(struct pt_regs *regs, unsigned long type)
 void do_illegal_instruction(struct pt_regs *regs, unsigned long pc, unsigned long npc,
                             unsigned long psr)
 {
-        extern int do_user_muldiv (struct pt_regs *, unsigned long);
         siginfo_t info;
 
         if(psr & PSR_PS)
@@ -195,10 +173,6 @@ void do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc, unsigned lon
         send_sig_info(SIGBUS, &info, current);
 }
 
-extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
-                   void *fpqueue, unsigned long *fpqdepth);
-extern void fpload(unsigned long *fpregs, unsigned long *fsr);
-
 static unsigned long init_fsr = 0x0UL;
 static unsigned long init_fregs[32] __attribute__ ((aligned (8))) =
                 { ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL,
@@ -456,8 +430,6 @@ void do_BUG(const char *file, int line)
  * up here so that timer interrupts work during initialization.
  */
 
-extern void sparc_cpu_startup(void);
-
 void trap_init(void)
 {
         extern void thread_info_offsets_are_bolixed_pete(void);
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc/kernel/traps_64.c
index 81ccd22e78d4..4638af2f55a0 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc/kernel/traps_64.c
@@ -1371,7 +1371,6 @@ static int cheetah_fix_ce(unsigned long physaddr)
         __asm__ __volatile__("ldxa      [%0] %3, %%g0\n\t"
                              "ldxa      [%1] %3, %%g0\n\t"
                              "casxa     [%2] %3, %%g0, %%g0\n\t"
-                             "membar    #StoreLoad | #StoreStore\n\t"
                              "ldxa      [%0] %3, %%g0\n\t"
                              "ldxa      [%1] %3, %%g0\n\t"
                              "membar    #Sync"
@@ -1833,7 +1832,7 @@ static void sun4v_log_error(struct pt_regs *regs, struct sun4v_error_entry *ent,
         }
 }
 
-/* We run with %pil set to 15 and PSTATE_IE enabled in %pstate.
+/* We run with %pil set to PIL_NORMAL_MAX and PSTATE_IE enabled in %pstate.
  * Log the event and clear the first word of the entry.
  */
 void sun4v_resum_error(struct pt_regs *regs, unsigned long offset)
@@ -1881,7 +1880,7 @@ void sun4v_resum_overflow(struct pt_regs *regs)
         atomic_inc(&sun4v_resum_oflow_cnt);
 }
 
-/* We run with %pil set to 15 and PSTATE_IE enabled in %pstate.
+/* We run with %pil set to PIL_NORMAL_MAX and PSTATE_IE enabled in %pstate.
  * Log the event, clear the first word of the entry, and die.
  */
 void sun4v_nonresum_error(struct pt_regs *regs, unsigned long offset)
diff --git a/arch/sparc64/kernel/tsb.S b/arch/sparc/kernel/tsb.S
index c499214b501d..8c91d9b29a2f 100644
--- a/arch/sparc64/kernel/tsb.S
+++ b/arch/sparc/kernel/tsb.S
@@ -317,7 +317,7 @@ tsb_flush:
         srlx    %g1, 32, %o3
         andcc   %o3, %g2, %g0
         bne,pn  %icc, 1b
-         membar #LoadLoad
+         nop
         cmp     %g1, %o1
         mov     1, %o3
         bne,pt  %xcc, 2f
@@ -327,7 +327,7 @@ tsb_flush:
         bne,pn  %xcc, 1b
          nop
 2:      retl
-         TSB_MEMBAR
+         nop
         .size   tsb_flush, .-tsb_flush
 
         /* Reload MMU related context switch state at
@@ -478,7 +478,7 @@ copy_tsb:		/* %o0=old_tsb_base, %o1=old_tsb_size
          nop
 
         retl
-         TSB_MEMBAR
+         nop
         .size           copy_tsb, .-copy_tsb
 
         /* Set the invalid bit in all TSB entries.  */
diff --git a/arch/sparc64/kernel/ttable.S b/arch/sparc/kernel/ttable.S
index 1ade3d6fb7fc..ea925503b42e 100644
--- a/arch/sparc64/kernel/ttable.S
+++ b/arch/sparc/kernel/ttable.S
@@ -66,7 +66,7 @@ tl0_irq6:	BTRAP(0x46)
 tl0_irq7:       BTRAP(0x47) BTRAP(0x48) BTRAP(0x49)
 tl0_irq10:      BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d)
 tl0_irq14:      TRAP_IRQ(timer_interrupt, 14)
-tl0_irq15:      TRAP_IRQ(handler_irq, 15)
+tl0_irq15:      TRAP_NMI_IRQ(perfctr_irq, 15)
 tl0_resv050:    BTRAP(0x50) BTRAP(0x51) BTRAP(0x52) BTRAP(0x53) BTRAP(0x54) BTRAP(0x55)
 tl0_resv056:    BTRAP(0x56) BTRAP(0x57) BTRAP(0x58) BTRAP(0x59) BTRAP(0x5a) BTRAP(0x5b)
 tl0_resv05c:    BTRAP(0x5c) BTRAP(0x5d) BTRAP(0x5e) BTRAP(0x5f)
diff --git a/arch/sparc/kernel/una_asm.S b/arch/sparc/kernel/una_asm_32.S
index 8cc03458eb7e..8cc03458eb7e 100644
--- a/arch/sparc/kernel/una_asm.S
+++ b/arch/sparc/kernel/una_asm_32.S
diff --git a/arch/sparc64/kernel/una_asm.S b/arch/sparc/kernel/una_asm_64.S
index be183fe41443..be183fe41443 100644
--- a/arch/sparc64/kernel/una_asm.S
+++ b/arch/sparc/kernel/una_asm_64.S
diff --git a/arch/sparc/kernel/unaligned.c b/arch/sparc/kernel/unaligned_32.c
index c2a28c5ad650..6b1e6cde6fff 100644
--- a/arch/sparc/kernel/unaligned.c
+++ b/arch/sparc/kernel/unaligned_32.c
@@ -97,26 +97,26 @@ static inline int sign_extend_imm13(int imm)
 
 static inline unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 {
-        struct reg_window *win;
+        struct reg_window32 *win;
 
         if(reg < 16)
                 return (!reg ? 0 : regs->u_regs[reg]);
 
         /* Ho hum, the slightly complicated case. */
-        win = (struct reg_window *) regs->u_regs[UREG_FP];
+        win = (struct reg_window32 *) regs->u_regs[UREG_FP];
         return win->locals[reg - 16]; /* yes, I know what this does... */
 }
 
 static inline unsigned long safe_fetch_reg(unsigned int reg, struct pt_regs *regs)
 {
-        struct reg_window __user *win;
+        struct reg_window32 __user *win;
         unsigned long ret;
 
         if (reg < 16)
                 return (!reg ? 0 : regs->u_regs[reg]);
 
         /* Ho hum, the slightly complicated case. */
-        win = (struct reg_window __user *) regs->u_regs[UREG_FP];
+        win = (struct reg_window32 __user *) regs->u_regs[UREG_FP];
 
         if ((unsigned long)win & 3)
                 return -1;
@@ -129,11 +129,11 @@ static inline unsigned long safe_fetch_reg(unsigned int reg, struct pt_regs *reg
 
 static inline unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
 {
-        struct reg_window *win;
+        struct reg_window32 *win;
 
         if(reg < 16)
                 return &regs->u_regs[reg];
-        win = (struct reg_window *) regs->u_regs[UREG_FP];
+        win = (struct reg_window32 *) regs->u_regs[UREG_FP];
         return &win->locals[reg - 16];
 }
 
diff --git a/arch/sparc64/kernel/unaligned.c b/arch/sparc/kernel/unaligned_64.c
index 203ddfad9f27..203ddfad9f27 100644
--- a/arch/sparc64/kernel/unaligned.c
+++ b/arch/sparc/kernel/unaligned_64.c
diff --git a/arch/sparc64/kernel/us2e_cpufreq.c b/arch/sparc/kernel/us2e_cpufreq.c
index 791c15138f3a..791c15138f3a 100644
--- a/arch/sparc64/kernel/us2e_cpufreq.c
+++ b/arch/sparc/kernel/us2e_cpufreq.c
diff --git a/arch/sparc64/kernel/us3_cpufreq.c b/arch/sparc/kernel/us3_cpufreq.c
index 365b6464e2ce..365b6464e2ce 100644
--- a/arch/sparc64/kernel/us3_cpufreq.c
+++ b/arch/sparc/kernel/us3_cpufreq.c
diff --git a/arch/sparc64/kernel/utrap.S b/arch/sparc/kernel/utrap.S
index b7f0f3f3a909..b7f0f3f3a909 100644
--- a/arch/sparc64/kernel/utrap.S
+++ b/arch/sparc/kernel/utrap.S
diff --git a/arch/sparc64/kernel/vio.c b/arch/sparc/kernel/vio.c
index 92b1f8ec01de..92b1f8ec01de 100644
--- a/arch/sparc64/kernel/vio.c
+++ b/arch/sparc/kernel/vio.c
diff --git a/arch/sparc64/kernel/viohs.c b/arch/sparc/kernel/viohs.c
index 708fa1705fbe..708fa1705fbe 100644
--- a/arch/sparc64/kernel/viohs.c
+++ b/arch/sparc/kernel/viohs.c
diff --git a/arch/sparc64/kernel/visemul.c b/arch/sparc/kernel/visemul.c
index b956fd71c131..b956fd71c131 100644
--- a/arch/sparc64/kernel/visemul.c
+++ b/arch/sparc/kernel/visemul.c
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 5b7e69a8c32f..76267085b13b 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -1,27 +1,56 @@
-/* ld script to make SparcLinux kernel */
+/* ld script for sparc32/sparc64 kernel */
 
 #include <asm-generic/vmlinux.lds.h>
+
 #include <asm/page.h>
+#include <asm/thread_info.h>
+
+#ifdef CONFIG_SPARC32
+#define INITIAL_ADDRESS  0x10000 + SIZEOF_HEADERS
+#define TEXTSTART       0xf0004000
+
+#define SMP_CACHE_BYTES_SHIFT 5
+
+#else
+#define SMP_CACHE_BYTES_SHIFT 6
+#define INITIAL_ADDRESS 0x4000
+#define TEXTSTART      0x0000000000404000
+
+#endif
+
+#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
 
+#ifdef CONFIG_SPARC32
 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
 OUTPUT_ARCH(sparc)
 ENTRY(_start)
 jiffies = jiffies_64 + 4;
+#else
+/* sparc64 */
+OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
+OUTPUT_ARCH(sparc:v9a)
+ENTRY(_start)
+jiffies = jiffies_64;
+#endif
+
 SECTIONS
 {
-        . = 0x10000 + SIZEOF_HEADERS;
-        .text 0xf0004000 :
+        /* swapper_low_pmd_dir is sparc64 only */
+        swapper_low_pmd_dir = 0x0000000000402000;
+        . = INITIAL_ADDRESS;
+        .text TEXTSTART :
         {
                 _text = .;
                 *(.text.head)
                 TEXT_TEXT
                 SCHED_TEXT
                 LOCK_TEXT
+                KPROBES_TEXT
                 *(.gnu.warning)
         } = 0
         _etext = .;
-        PROVIDE (etext = .);
-        RODATA
+
+        RO_DATA(PAGE_SIZE)
         .data : {
                 DATA_DATA
                 CONSTRUCTORS
@@ -29,25 +58,38 @@ SECTIONS
         .data1 : {
                 *(.data1)
         }
+        . = ALIGN(SMP_CACHE_BYTES);
+        .data.cacheline_aligned : {
+                *(.data.cacheline_aligned)
+        }
+        . = ALIGN(SMP_CACHE_BYTES);
+        .data.read_mostly : {
+                *(.data.read_mostly)
+        }
+        /* End of data section */
         _edata = .;
-        PROVIDE (edata = .);
 
+        /* init_task */
+        . = ALIGN(THREAD_SIZE);
+        .data.init_task : {
+                *(.data.init_task)
+        }
         .fixup : {
                 __start___fixup = .;
                 *(.fixup)
                 __stop___fixup = .;
         }
+        . = ALIGN(16);
         __ex_table : {
                 __start___ex_table = .;
                 *(__ex_table)
                 __stop___ex_table = .;
         }
-
         NOTES
 
         . = ALIGN(PAGE_SIZE);
-        __init_begin = .;
         .init.text : {
+                __init_begin = .;
                 _sinittext = .;
                 INIT_TEXT
                 _einittext = .;
@@ -65,7 +107,7 @@ SECTIONS
         .initcall.init : {
                 __initcall_start = .;
                 INITCALLS
-        __initcall_end = .;
+                __initcall_end = .;
         }
         .con_initcall.init : {
                 __con_initcall_start = .;
@@ -74,38 +116,61 @@ SECTIONS
         }
         SECURITY_INIT
 
+        . = ALIGN(4);
+        .tsb_ldquad_phys_patch : {
+                __tsb_ldquad_phys_patch = .;
+                *(.tsb_ldquad_phys_patch)
+                __tsb_ldquad_phys_patch_end = .;
+        }
+
+        .tsb_phys_patch : {
+                __tsb_phys_patch = .;
+                *(.tsb_phys_patch)
+                __tsb_phys_patch_end = .;
+        }
+
+        .cpuid_patch : {
+                __cpuid_patch = .;
+                *(.cpuid_patch)
+                __cpuid_patch_end = .;
+        }
+
+        .sun4v_1insn_patch : {
+                __sun4v_1insn_patch = .;
+                *(.sun4v_1insn_patch)
+                __sun4v_1insn_patch_end = .;
+        }
+        .sun4v_2insn_patch : {
+                __sun4v_2insn_patch = .;
+                *(.sun4v_2insn_patch)
+                __sun4v_2insn_patch_end = .;
+        }
+
 #ifdef CONFIG_BLK_DEV_INITRD
         . = ALIGN(PAGE_SIZE);
         .init.ramfs : {
-        __initramfs_start = .;
+                __initramfs_start = .;
                 *(.init.ramfs)
-        __initramfs_end = .;
+                __initramfs_end = .;
         }
 #endif
 
         PERCPU(PAGE_SIZE)
+
         . = ALIGN(PAGE_SIZE);
         __init_end = .;
-        . = ALIGN(32);
-        .data.cacheline_aligned : {
-                *(.data.cacheline_aligned)
-        }
-        . = ALIGN(32);
-        .data.read_mostly : {
-                *(.data.read_mostly)
-        }
-
         __bss_start = .;
         .sbss : {
                 *(.sbss)
-                *(.scommon) }
+                *(.scommon)
+        }
         .bss : {
                 *(.dynbss)
                 *(.bss)
                 *(COMMON)
         }
         _end = . ;
-        PROVIDE (end = .);
+
         /DISCARD/ : {
                 EXIT_TEXT
                 EXIT_DATA
diff --git a/arch/sparc/kernel/windows.c b/arch/sparc/kernel/windows.c
index 9cc93eaa4abf..f24d298bda29 100644
--- a/arch/sparc/kernel/windows.c
+++ b/arch/sparc/kernel/windows.c
@@ -42,7 +42,7 @@ static inline void shift_window_buffer(int first_win, int last_win, struct threa
 
         for(i = first_win; i < last_win; i++) {
                 tp->rwbuf_stkptrs[i] = tp->rwbuf_stkptrs[i+1];
-                memcpy(&tp->reg_window[i], &tp->reg_window[i+1], sizeof(struct reg_window));
+                memcpy(&tp->reg_window[i], &tp->reg_window[i+1], sizeof(struct reg_window32));
         }
 }
 
@@ -70,7 +70,7 @@ void synchronize_user_stack(void)
 
                 /* Ok, let it rip. */
                 if (copy_to_user((char __user *) sp, &tp->reg_window[window],
-                                 sizeof(struct reg_window)))
+                                 sizeof(struct reg_window32)))
                         continue;
 
                 shift_window_buffer(window, tp->w_saved - 1, tp);
@@ -119,7 +119,7 @@ void try_to_clear_window_buffer(struct pt_regs *regs, int who)
 
                 if ((sp & 7) ||
                     copy_to_user((char __user *) sp, &tp->reg_window[window],
-                                 sizeof(struct reg_window)))
+                                 sizeof(struct reg_window32)))
                         do_exit(SIGILL);
         }
         tp->w_saved = 0;
diff --git a/arch/sparc64/kernel/winfixup.S b/arch/sparc/kernel/winfixup.S
index a6b0863c27df..a6b0863c27df 100644
--- a/arch/sparc64/kernel/winfixup.S
+++ b/arch/sparc/kernel/winfixup.S
diff --git a/arch/sparc64/lib/GENbzero.S b/arch/sparc/lib/GENbzero.S
index 6a4f956a2f7a..6a4f956a2f7a 100644
--- a/arch/sparc64/lib/GENbzero.S
+++ b/arch/sparc/lib/GENbzero.S
diff --git a/arch/sparc64/lib/GENcopy_from_user.S b/arch/sparc/lib/GENcopy_from_user.S
index 2b9df99e87f9..2b9df99e87f9 100644
--- a/arch/sparc64/lib/GENcopy_from_user.S
+++ b/arch/sparc/lib/GENcopy_from_user.S
diff --git a/arch/sparc64/lib/GENcopy_to_user.S b/arch/sparc/lib/GENcopy_to_user.S
index bb3f7084daf9..bb3f7084daf9 100644
--- a/arch/sparc64/lib/GENcopy_to_user.S
+++ b/arch/sparc/lib/GENcopy_to_user.S
diff --git a/arch/sparc64/lib/GENmemcpy.S b/arch/sparc/lib/GENmemcpy.S
index 89358ee94851..89358ee94851 100644
--- a/arch/sparc64/lib/GENmemcpy.S
+++ b/arch/sparc/lib/GENmemcpy.S
diff --git a/arch/sparc64/lib/GENpage.S b/arch/sparc/lib/GENpage.S
index 2ef9d05f21bc..2ef9d05f21bc 100644
--- a/arch/sparc64/lib/GENpage.S
+++ b/arch/sparc/lib/GENpage.S
diff --git a/arch/sparc64/lib/GENpatch.S b/arch/sparc/lib/GENpatch.S
index fab9e89f16bd..fab9e89f16bd 100644
--- a/arch/sparc64/lib/GENpatch.S
+++ b/arch/sparc/lib/GENpatch.S
diff --git a/arch/sparc/lib/Makefile b/arch/sparc/lib/Makefile
index 6e303e10c3b9..375016e19144 100644
--- a/arch/sparc/lib/Makefile
+++ b/arch/sparc/lib/Makefile
@@ -1,13 +1,44 @@
 # Makefile for Sparc library files..
 #
 
-EXTRA_AFLAGS := -ansi -DST_DIV0=0x02
+asflags-y := -ansi -DST_DIV0=0x02
+ccflags-y := -Werror
 
-lib-y := mul.o rem.o sdiv.o udiv.o umul.o urem.o ashrdi3.o memcpy.o memset.o \
-         strlen.o checksum.o blockops.o memscan.o memcmp.o strncmp.o \
-         strncpy_from_user.o divdi3.o udivdi3.o strlen_user.o \
-         copy_user.o locks.o atomic.o \
-         lshrdi3.o ashldi3.o rwsem.o muldi3.o bitext.o \
-         cmpdi2.o
+lib-$(CONFIG_SPARC32) += mul.o rem.o sdiv.o udiv.o umul.o urem.o ashrdi3.o
+lib-$(CONFIG_SPARC32) += memcpy.o memset.o
+lib-y                 += strlen.o
+lib-y                 += checksum_$(BITS).o
+lib-$(CONFIG_SPARC32) += blockops.o
+lib-y                 += memscan_$(BITS).o memcmp.o strncmp_$(BITS).o
+lib-y                 += strncpy_from_user_$(BITS).o strlen_user_$(BITS).o
+lib-$(CONFIG_SPARC32) += divdi3.o udivdi3.o
+lib-$(CONFIG_SPARC32) += copy_user.o locks.o
+lib-y                 += atomic_$(BITS).o
+lib-$(CONFIG_SPARC32) += lshrdi3.o ashldi3.o
+lib-y                 += rwsem_$(BITS).o
+lib-$(CONFIG_SPARC32) += muldi3.o bitext.o cmpdi2.o
 
-obj-y += iomap.o atomic32.o
+lib-$(CONFIG_SPARC64) += PeeCeeI.o copy_page.o clear_page.o bzero.o
+lib-$(CONFIG_SPARC64) += csum_copy.o csum_copy_from_user.o csum_copy_to_user.o
+lib-$(CONFIG_SPARC64) += VISsave.o
+lib-$(CONFIG_SPARC64) += bitops.o
+
+lib-$(CONFIG_SPARC64) += U1memcpy.o U1copy_from_user.o U1copy_to_user.o
+
+lib-$(CONFIG_SPARC64) += U3memcpy.o U3copy_from_user.o U3copy_to_user.o
+lib-$(CONFIG_SPARC64) += U3patch.o
+
+lib-$(CONFIG_SPARC64) += NGmemcpy.o NGcopy_from_user.o NGcopy_to_user.o
+lib-$(CONFIG_SPARC64) += NGpatch.o NGpage.o NGbzero.o
+
+lib-$(CONFIG_SPARC64) += NG2memcpy.o NG2copy_from_user.o NG2copy_to_user.o
+lib-$(CONFIG_SPARC64) +=  NG2patch.o NG2page.o
+
+lib-$(CONFIG_SPARC64) += GENmemcpy.o GENcopy_from_user.o GENcopy_to_user.o
+lib-$(CONFIG_SPARC64) += GENpatch.o GENpage.o GENbzero.o
+
+lib-$(CONFIG_SPARC64) += copy_in_user.o user_fixup.o memmove.o
+lib-$(CONFIG_SPARC64) += mcount.o ipcsum.o xor.o
+
+obj-y                 += iomap.o
+obj-$(CONFIG_SPARC32) += atomic32.o
diff --git a/arch/sparc64/lib/NG2copy_from_user.S b/arch/sparc/lib/NG2copy_from_user.S
index c77ef5f22102..c77ef5f22102 100644
--- a/arch/sparc64/lib/NG2copy_from_user.S
+++ b/arch/sparc/lib/NG2copy_from_user.S
diff --git a/arch/sparc64/lib/NG2copy_to_user.S b/arch/sparc/lib/NG2copy_to_user.S
index 4bd4093acbbd..4bd4093acbbd 100644
--- a/arch/sparc64/lib/NG2copy_to_user.S
+++ b/arch/sparc/lib/NG2copy_to_user.S
diff --git a/arch/sparc64/lib/NG2memcpy.S b/arch/sparc/lib/NG2memcpy.S
index 0aed75653b50..0aed75653b50 100644
--- a/arch/sparc64/lib/NG2memcpy.S
+++ b/arch/sparc/lib/NG2memcpy.S
diff --git a/arch/sparc64/lib/NG2page.S b/arch/sparc/lib/NG2page.S
index 73b6b7c72cbf..73b6b7c72cbf 100644
--- a/arch/sparc64/lib/NG2page.S
+++ b/arch/sparc/lib/NG2page.S
diff --git a/arch/sparc64/lib/NG2patch.S b/arch/sparc/lib/NG2patch.S
index 28c36f06a6d1..28c36f06a6d1 100644
--- a/arch/sparc64/lib/NG2patch.S
+++ b/arch/sparc/lib/NG2patch.S
diff --git a/arch/sparc64/lib/NGbzero.S b/arch/sparc/lib/NGbzero.S
index 814d5f7a45e1..814d5f7a45e1 100644
--- a/arch/sparc64/lib/NGbzero.S
+++ b/arch/sparc/lib/NGbzero.S
diff --git a/arch/sparc64/lib/NGcopy_from_user.S b/arch/sparc/lib/NGcopy_from_user.S
index e7f433f71b42..e7f433f71b42 100644
--- a/arch/sparc64/lib/NGcopy_from_user.S
+++ b/arch/sparc/lib/NGcopy_from_user.S
diff --git a/arch/sparc64/lib/NGcopy_to_user.S b/arch/sparc/lib/NGcopy_to_user.S
index 6ea01c5532a0..6ea01c5532a0 100644
--- a/arch/sparc64/lib/NGcopy_to_user.S
+++ b/arch/sparc/lib/NGcopy_to_user.S
diff --git a/arch/sparc64/lib/NGmemcpy.S b/arch/sparc/lib/NGmemcpy.S
index 96a14caf6966..96a14caf6966 100644
--- a/arch/sparc64/lib/NGmemcpy.S
+++ b/arch/sparc/lib/NGmemcpy.S
diff --git a/arch/sparc64/lib/NGpage.S b/arch/sparc/lib/NGpage.S
index 428920de05ba..428920de05ba 100644
--- a/arch/sparc64/lib/NGpage.S
+++ b/arch/sparc/lib/NGpage.S
diff --git a/arch/sparc64/lib/NGpatch.S b/arch/sparc/lib/NGpatch.S
index 3b0674fc3366..3b0674fc3366 100644
--- a/arch/sparc64/lib/NGpatch.S
+++ b/arch/sparc/lib/NGpatch.S
diff --git a/arch/sparc64/lib/PeeCeeI.c b/arch/sparc/lib/PeeCeeI.c
index 46053e6ddd7b..46053e6ddd7b 100644
--- a/arch/sparc64/lib/PeeCeeI.c
+++ b/arch/sparc/lib/PeeCeeI.c
diff --git a/arch/sparc64/lib/U1copy_from_user.S b/arch/sparc/lib/U1copy_from_user.S
index 3192b0bf4fab..3192b0bf4fab 100644
--- a/arch/sparc64/lib/U1copy_from_user.S
+++ b/arch/sparc/lib/U1copy_from_user.S
diff --git a/arch/sparc64/lib/U1copy_to_user.S b/arch/sparc/lib/U1copy_to_user.S
index d1210ffb0b82..d1210ffb0b82 100644
--- a/arch/sparc64/lib/U1copy_to_user.S
+++ b/arch/sparc/lib/U1copy_to_user.S
diff --git a/arch/sparc64/lib/U1memcpy.S b/arch/sparc/lib/U1memcpy.S
index bafd2fc07acb..bafd2fc07acb 100644
--- a/arch/sparc64/lib/U1memcpy.S
+++ b/arch/sparc/lib/U1memcpy.S
diff --git a/arch/sparc64/lib/U3copy_from_user.S b/arch/sparc/lib/U3copy_from_user.S
index f5bfc8d9d216..f5bfc8d9d216 100644
--- a/arch/sparc64/lib/U3copy_from_user.S
+++ b/arch/sparc/lib/U3copy_from_user.S
diff --git a/arch/sparc64/lib/U3copy_to_user.S b/arch/sparc/lib/U3copy_to_user.S
index 2334f111bb0c..2334f111bb0c 100644
--- a/arch/sparc64/lib/U3copy_to_user.S
+++ b/arch/sparc/lib/U3copy_to_user.S
diff --git a/arch/sparc64/lib/U3memcpy.S b/arch/sparc/lib/U3memcpy.S
index 7cae9cc6a204..7cae9cc6a204 100644
--- a/arch/sparc64/lib/U3memcpy.S
+++ b/arch/sparc/lib/U3memcpy.S
diff --git a/arch/sparc64/lib/U3patch.S b/arch/sparc/lib/U3patch.S
index ecc302619a6e..ecc302619a6e 100644
--- a/arch/sparc64/lib/U3patch.S
+++ b/arch/sparc/lib/U3patch.S
diff --git a/arch/sparc64/lib/VISsave.S b/arch/sparc/lib/VISsave.S
index b320ae9e2e2e..b320ae9e2e2e 100644
--- a/arch/sparc64/lib/VISsave.S
+++ b/arch/sparc/lib/VISsave.S
diff --git a/arch/sparc/lib/atomic.S b/arch/sparc/lib/atomic_32.S
index 178cbb8ae1b9..178cbb8ae1b9 100644
--- a/arch/sparc/lib/atomic.S
+++ b/arch/sparc/lib/atomic_32.S
diff --git a/arch/sparc64/lib/atomic.S b/arch/sparc/lib/atomic_64.S
index 70ac4186f62b..0268210ca168 100644
--- a/arch/sparc64/lib/atomic.S
+++ b/arch/sparc/lib/atomic_64.S
@@ -43,29 +43,10 @@ atomic_sub: /* %o0 = decrement, %o1 = atomic_ptr */
 2:      BACKOFF_SPIN(%o2, %o3, 1b)
         .size   atomic_sub, .-atomic_sub
 
-        /* On SMP we need to use memory barriers to ensure
-         * correct memory operation ordering, nop these out
-         * for uniprocessor.
-         */
-#ifdef CONFIG_SMP
-
-#define ATOMIC_PRE_BARRIER      membar #StoreLoad | #LoadLoad;
-#define ATOMIC_POST_BARRIER     \
-        ba,pt %xcc, 80b;        \
-        membar #StoreLoad | #StoreStore
-
-80:     retl
-         nop
-#else
-#define ATOMIC_PRE_BARRIER
-#define ATOMIC_POST_BARRIER
-#endif
-
         .globl  atomic_add_ret
         .type   atomic_add_ret,#function
 atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
         BACKOFF_SETUP(%o2)
-        ATOMIC_PRE_BARRIER
 1:      lduw    [%o1], %g1
         add     %g1, %o0, %g7
         cas     [%o1], %g1, %g7
@@ -73,7 +54,6 @@ atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
         bne,pn  %icc, 2f
          add    %g7, %o0, %g7
         sra     %g7, 0, %o0
-        ATOMIC_POST_BARRIER
         retl
          nop
 2:      BACKOFF_SPIN(%o2, %o3, 1b)
@@ -83,7 +63,6 @@ atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
         .type   atomic_sub_ret,#function
 atomic_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
         BACKOFF_SETUP(%o2)
-        ATOMIC_PRE_BARRIER
 1:      lduw    [%o1], %g1
         sub     %g1, %o0, %g7
         cas     [%o1], %g1, %g7
@@ -91,7 +70,6 @@ atomic_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
         bne,pn  %icc, 2f
          sub    %g7, %o0, %g7
         sra     %g7, 0, %o0
-        ATOMIC_POST_BARRIER
         retl
          nop
 2:      BACKOFF_SPIN(%o2, %o3, 1b)
@@ -131,7 +109,6 @@ atomic64_sub: /* %o0 = decrement, %o1 = atomic_ptr */
         .type   atomic64_add_ret,#function
 atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
         BACKOFF_SETUP(%o2)
-        ATOMIC_PRE_BARRIER
 1:      ldx     [%o1], %g1
         add     %g1, %o0, %g7
         casx    [%o1], %g1, %g7
@@ -139,7 +116,6 @@ atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
         bne,pn  %xcc, 2f
          add    %g7, %o0, %g7
         mov     %g7, %o0
-        ATOMIC_POST_BARRIER
         retl
          nop
 2:      BACKOFF_SPIN(%o2, %o3, 1b)
@@ -149,7 +125,6 @@ atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
         .type   atomic64_sub_ret,#function
 atomic64_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
         BACKOFF_SETUP(%o2)
-        ATOMIC_PRE_BARRIER
 1:      ldx     [%o1], %g1
         sub     %g1, %o0, %g7
         casx    [%o1], %g1, %g7
@@ -157,7 +132,6 @@ atomic64_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
         bne,pn  %xcc, 2f
          sub    %g7, %o0, %g7
         mov     %g7, %o0
-        ATOMIC_POST_BARRIER
         retl
          nop
 2:      BACKOFF_SPIN(%o2, %o3, 1b)
diff --git a/arch/sparc64/lib/bitops.S b/arch/sparc/lib/bitops.S
index 6b015a6eefb5..2b7228cb8c22 100644
--- a/arch/sparc64/lib/bitops.S
+++ b/arch/sparc/lib/bitops.S
@@ -8,29 +8,10 @@
 
         .text
 
-        /* On SMP we need to use memory barriers to ensure
-         * correct memory operation ordering, nop these out
-         * for uniprocessor.
-         */
-
-#ifdef CONFIG_SMP
-#define BITOP_PRE_BARRIER       membar #StoreLoad | #LoadLoad
-#define BITOP_POST_BARRIER      \
-        ba,pt   %xcc, 80b;      \
-        membar #StoreLoad | #StoreStore
-
-80:     retl
-         nop
-#else
-#define BITOP_PRE_BARRIER
-#define BITOP_POST_BARRIER
-#endif
-
         .globl  test_and_set_bit
         .type   test_and_set_bit,#function
 test_and_set_bit:       /* %o0=nr, %o1=addr */
         BACKOFF_SETUP(%o3)
-        BITOP_PRE_BARRIER
         srlx    %o0, 6, %g1
         mov     1, %o2
         sllx    %g1, 3, %g3
@@ -45,7 +26,6 @@ test_and_set_bit:	/* %o0=nr, %o1=addr */
          and    %g7, %o2, %g2
         clr     %o0
         movrne  %g2, 1, %o0
-        BITOP_POST_BARRIER
         retl
          nop
 2:      BACKOFF_SPIN(%o3, %o4, 1b)
@@ -55,7 +35,6 @@ test_and_set_bit:	/* %o0=nr, %o1=addr */
         .type   test_and_clear_bit,#function
 test_and_clear_bit:     /* %o0=nr, %o1=addr */
         BACKOFF_SETUP(%o3)
-        BITOP_PRE_BARRIER
         srlx    %o0, 6, %g1
         mov     1, %o2
         sllx    %g1, 3, %g3
@@ -70,7 +49,6 @@ test_and_clear_bit:	/* %o0=nr, %o1=addr */
          and    %g7, %o2, %g2
         clr     %o0
         movrne  %g2, 1, %o0
-        BITOP_POST_BARRIER
         retl
          nop
 2:      BACKOFF_SPIN(%o3, %o4, 1b)
@@ -80,7 +58,6 @@ test_and_clear_bit:	/* %o0=nr, %o1=addr */
         .type   test_and_change_bit,#function
 test_and_change_bit:    /* %o0=nr, %o1=addr */
         BACKOFF_SETUP(%o3)
-        BITOP_PRE_BARRIER
         srlx    %o0, 6, %g1
         mov     1, %o2
         sllx    %g1, 3, %g3
@@ -95,7 +72,6 @@ test_and_change_bit:	/* %o0=nr, %o1=addr */
          and    %g7, %o2, %g2
         clr     %o0
         movrne  %g2, 1, %o0
-        BITOP_POST_BARRIER
         retl
          nop
 2:      BACKOFF_SPIN(%o3, %o4, 1b)
diff --git a/arch/sparc64/lib/bzero.S b/arch/sparc/lib/bzero.S
index c7bbae8c590f..c7bbae8c590f 100644
--- a/arch/sparc64/lib/bzero.S
+++ b/arch/sparc/lib/bzero.S
diff --git a/arch/sparc/lib/checksum.S b/arch/sparc/lib/checksum_32.S
index 77f228533d47..77f228533d47 100644
--- a/arch/sparc/lib/checksum.S
+++ b/arch/sparc/lib/checksum_32.S
diff --git a/arch/sparc64/lib/checksum.S b/arch/sparc/lib/checksum_64.S
index 1d230f693dc4..1d230f693dc4 100644
--- a/arch/sparc64/lib/checksum.S
+++ b/arch/sparc/lib/checksum_64.S
diff --git a/arch/sparc64/lib/clear_page.S b/arch/sparc/lib/clear_page.S
index 77e531f6c2a7..77e531f6c2a7 100644
--- a/arch/sparc64/lib/clear_page.S
+++ b/arch/sparc/lib/clear_page.S
diff --git a/arch/sparc64/lib/copy_in_user.S b/arch/sparc/lib/copy_in_user.S
index 650af3f21f78..650af3f21f78 100644
--- a/arch/sparc64/lib/copy_in_user.S
+++ b/arch/sparc/lib/copy_in_user.S
diff --git a/arch/sparc64/lib/copy_page.S b/arch/sparc/lib/copy_page.S
index b243d3b606ba..b243d3b606ba 100644
--- a/arch/sparc64/lib/copy_page.S
+++ b/arch/sparc/lib/copy_page.S
diff --git a/arch/sparc64/lib/csum_copy.S b/arch/sparc/lib/csum_copy.S
index e566c770a0f6..e566c770a0f6 100644
--- a/arch/sparc64/lib/csum_copy.S
+++ b/arch/sparc/lib/csum_copy.S
diff --git a/arch/sparc64/lib/csum_copy_from_user.S b/arch/sparc/lib/csum_copy_from_user.S
index a22eddbe5dba..a22eddbe5dba 100644
--- a/arch/sparc64/lib/csum_copy_from_user.S
+++ b/arch/sparc/lib/csum_copy_from_user.S
diff --git a/arch/sparc64/lib/csum_copy_to_user.S b/arch/sparc/lib/csum_copy_to_user.S
index d5b12f441f02..d5b12f441f02 100644
--- a/arch/sparc64/lib/csum_copy_to_user.S
+++ b/arch/sparc/lib/csum_copy_to_user.S
diff --git a/arch/sparc64/lib/ipcsum.S b/arch/sparc/lib/ipcsum.S
index 58ca5b9a8778..58ca5b9a8778 100644
--- a/arch/sparc64/lib/ipcsum.S
+++ b/arch/sparc/lib/ipcsum.S
diff --git a/arch/sparc64/lib/mcount.S b/arch/sparc/lib/mcount.S
index 7ce9c65f3592..7ce9c65f3592 100644
--- a/arch/sparc64/lib/mcount.S
+++ b/arch/sparc/lib/mcount.S
diff --git a/arch/sparc/lib/memcmp.S b/arch/sparc/lib/memcmp.S
index cb4bdb0cc2af..efa106c41ed0 100644
--- a/arch/sparc/lib/memcmp.S
+++ b/arch/sparc/lib/memcmp.S
@@ -1,312 +1,27 @@
-        .text
-        .align 4
-        .global __memcmp, memcmp
-__memcmp:
-memcmp:
-#if 1
-        cmp     %o2, 0
-        ble     L3
-         mov    0, %g3
-L5:
-        ldub    [%o0], %g2
-        ldub    [%o1], %g3
-        sub     %g2, %g3, %g2
-        mov     %g2, %g3
-        sll     %g2, 24, %g2
-
-        cmp     %g2, 0
-        bne     L3
-         add    %o0, 1, %o0
+/* Sparc optimized memcmp code.
+ *
+ * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ * Copyright (C) 2000, 2008 David S. Miller (davem@davemloft.net)
+ */
 
-        add     %o2, -1, %o2
+#include <linux/linkage.h>
+#include <asm/asm.h>
 
+        .text
+ENTRY(memcmp)
         cmp     %o2, 0
-        bg      L5
-         add    %o1, 1, %o1
-L3:
-        sll     %g3, 24, %o0
-        sra     %o0, 24, %o0
-
-        retl
+1:      BRANCH32(be, pn, 2f)
          nop
-#else
-        save    %sp, -104, %sp
-        mov     %i2, %o4
-        mov     %i0, %o0
-
-        cmp     %o4, 15
-        ble     L72
-         mov    %i1, %i2
-
-        andcc   %i2, 3, %g0
-        be      L161
-         andcc  %o0, 3, %g2
-L75:
-        ldub    [%o0], %g3
-        ldub    [%i2], %g2
-        add     %o0,1, %o0
-
-        subcc   %g3, %g2, %i0
-        bne     L156
-         add    %i2, 1, %i2
-
-        andcc   %i2, 3, %g0
-        bne     L75
-         add    %o4, -1, %o4
-
-        andcc   %o0, 3, %g2
-L161:
-        bne,a   L78
-         mov    %i2, %i1
-
-        mov     %o0, %i5
-        mov     %i2, %i3
-        srl     %o4, 2, %i4
-
-        cmp     %i4, 0
-        bge     L93
-         mov    %i4, %g2
-
-        add %i4, 3, %g2
-L93:
-        sra     %g2, 2, %g2
-        sll     %g2, 2, %g2
-        sub     %i4, %g2, %g2
-
-        cmp     %g2, 1
-        be,a    L88
-         add    %o0, 4, %i5
-
-        bg      L94
-         cmp    %g2, 2
-
-        cmp     %g2, 0
-        be,a    L86
-         ld     [%o0], %g3
-
-        b       L162
-         ld     [%i5], %g3
-L94:
-        be      L81
-         cmp    %g2, 3
-
-        be,a    L83
-         add    %o0, -4, %i5
-
-        b       L162
-         ld     [%i5], %g3
-L81:
-        add     %o0, -8, %i5
-        ld      [%o0], %g3
-        add     %i2, -8, %i3
-        ld      [%i2], %g2
-
-        b       L82
-         add    %i4, 2, %i4
-L83:
-        ld      [%o0], %g4
-        add     %i2, -4, %i3
-        ld      [%i2], %g1
-
-        b       L84
-         add    %i4, 1, %i4
-L86:
-        b       L87
-         ld     [%i2], %g2
-L88:
-        add     %i2, 4, %i3
-        ld      [%o0], %g4
-        add     %i4, -1, %i4
-        ld      [%i2], %g1
-L95:
-        ld      [%i5], %g3
-L162:
-        cmp     %g4, %g1
-        be      L87
-         ld     [%i3], %g2
-
-        cmp     %g4, %g1
-L163:
-        bleu    L114
-         mov    -1, %i0
-
-        b       L114
-         mov    1, %i0
-L87:
-        ld      [%i5 + 4], %g4
-        cmp     %g3, %g2
-        bne     L163
-         ld     [%i3 + 4], %g1
-L84:
-        ld      [%i5 + 8], %g3
-
-        cmp     %g4, %g1
-        bne     L163
-         ld     [%i3 + 8], %g2
-L82:
-        ld      [%i5 + 12], %g4
-        cmp     %g3, %g2
-        bne     L163
-         ld     [%i3 + 12], %g1
-
-        add     %i5, 16, %i5
-
-        addcc   %i4, -4, %i4
-        bne     L95
-         add    %i3, 16, %i3
-
-        cmp     %g4, %g1
-        bne     L163
-         nop
-
-        b       L114
-         mov    0, %i0
-L78:
-        srl     %o4, 2, %i0
-        and     %o0, -4, %i3
-        orcc    %i0, %g0, %g3
-        sll     %g2, 3, %o7
-        mov     32, %g2
-
-        bge     L129
-         sub    %g2, %o7, %o1
-
-        add     %i0, 3, %g3
-L129:
-        sra     %g3, 2, %g2
-        sll     %g2, 2, %g2
-        sub     %i0, %g2, %g2
-
-        cmp     %g2, 1
-        be,a    L124
-         ld     [%i3], %o3
-
-        bg      L130
-         cmp    %g2, 2
-
-        cmp     %g2, 0
-        be,a    L122
-         ld     [%i3], %o2
-
-        b       L164
-        sll     %o3, %o7, %g3
-L130:
-        be      L117
-         cmp    %g2, 3
-
-        be,a    L119
-         ld     [%i3], %g1
-
-        b       L164
-         sll    %o3, %o7, %g3
-L117:
-        ld      [%i3], %g4
-        add     %i2, -8, %i1
-        ld      [%i3 + 4], %o3
-        add     %i0, 2, %i0
-        ld      [%i2], %i4
-
-        b       L118
-         add    %i3, -4, %i3
-L119:
-        ld      [%i3 + 4], %g4
-        add     %i2, -4, %i1
-        ld      [%i2], %i5
-
-        b       L120
-         add    %i0, 1, %i0
-L122:
-        ld      [%i3 + 4], %g1
-        ld      [%i2], %i4
-
-        b       L123
-         add    %i3, 4, %i3
-L124:
-        add     %i2, 4, %i1
-        ld      [%i3 + 4], %o2
-        add     %i0, -1, %i0
-        ld      [%i2], %i5
-        add     %i3, 8, %i3
-L131:
-        sll     %o3, %o7, %g3
-L164:
-        srl     %o2, %o1, %g2
-        ld      [%i3], %g1
-        or      %g3, %g2, %g3
-
-        cmp     %g3, %i5
-        bne     L163
-         ld     [%i1], %i4
-L123:
-        sll     %o2, %o7, %g3
-        srl     %g1, %o1, %g2
-        ld      [%i3 + 4], %g4
-        or      %g3, %g2, %g3
-
-        cmp     %g3, %i4
-        bne     L163
-         ld     [%i1 + 4], %i5
-L120:
-        sll     %g1, %o7, %g3
-        srl     %g4, %o1, %g2
-        ld      [%i3 + 8], %o3
-        or      %g3, %g2, %g3
-
-        cmp     %g3, %i5
-        bne     L163
-         ld     [%i1 + 8], %i4
-L118:
-        sll     %g4, %o7, %g3
-        srl     %o3, %o1, %g2
-        ld      [%i3 + 12], %o2
-        or      %g3, %g2, %g3
-
-        cmp     %g3, %i4
-        bne     L163
-         ld     [%i1 + 12], %i5
-
-        add     %i3, 16, %i3
-        addcc   %i0, -4, %i0
-        bne     L131
-         add    %i1, 16, %i1
-
-        sll     %o3, %o7, %g3
-        srl     %o2, %o1, %g2
-        or      %g3, %g2, %g3
-
-        cmp     %g3, %i5
-        be,a    L114
-         mov    0, %i0
-
-        b,a L163
-L114:
-        cmp     %i0, 0
-        bne     L156
-         and    %o4, -4, %g2
-
-        add     %o0, %g2, %o0
-        add     %i2, %g2, %i2
-        and     %o4, 3, %o4
-L72:
-        cmp     %o4, 0
-        be      L156
-         mov    0, %i0
-
-        ldub    [%o0], %g3
-L165:
-        ldub    [%i2], %g2
+        ldub    [%o0], %g7
+        ldub    [%o1], %g3
+        sub     %o2, 1, %o2
         add     %o0, 1, %o0
-
-        subcc   %g3, %g2, %i0
-        bne     L156
-         add    %i2, 1, %i2
-
-        addcc   %o4, -1, %o4
-        bne,a   L165
-         ldub   [%o0], %g3
-
-        mov     0, %i0
-L156:
-        ret
-        restore
-#endif
+        add     %o1, 1, %o1
+        subcc   %g7, %g3, %g3
+        BRANCH32(be, pt, 1b)
+         cmp    %o2, 0
+        retl
+         mov    %g3, %o0
+2:      retl
+         mov    0, %o0
+ENDPROC(memcmp)
diff --git a/arch/sparc64/lib/memmove.S b/arch/sparc/lib/memmove.S
index 97395802c23c..97395802c23c 100644
--- a/arch/sparc64/lib/memmove.S
+++ b/arch/sparc/lib/memmove.S
diff --git a/arch/sparc/lib/memscan.S b/arch/sparc/lib/memscan_32.S
index 4ff1657dfc24..4ff1657dfc24 100644
--- a/arch/sparc/lib/memscan.S
+++ b/arch/sparc/lib/memscan_32.S
diff --git a/arch/sparc64/lib/memscan.S b/arch/sparc/lib/memscan_64.S
index 5686dfa5dc15..5686dfa5dc15 100644
--- a/arch/sparc64/lib/memscan.S
+++ b/arch/sparc/lib/memscan_64.S
diff --git a/arch/sparc/lib/rwsem.S b/arch/sparc/lib/rwsem_32.S
index 9675268e7fde..9675268e7fde 100644
--- a/arch/sparc/lib/rwsem.S
+++ b/arch/sparc/lib/rwsem_32.S
diff --git a/arch/sparc64/lib/rwsem.S b/arch/sparc/lib/rwsem_64.S
index 1a4cc5654de4..91a7d29a79d5 100644
--- a/arch/sparc64/lib/rwsem.S
+++ b/arch/sparc/lib/rwsem_64.S
@@ -17,7 +17,6 @@ __down_read:
         bne,pn          %icc, 1b
          add            %g7, 1, %g7
         cmp             %g7, 0
-        membar          #StoreLoad | #StoreStore
         bl,pn           %icc, 3f
          nop
 2:
@@ -42,7 +41,6 @@ __down_read_trylock:
         cmp             %g1, %g7
         bne,pn          %icc, 1b
          mov            1, %o1
-        membar          #StoreLoad | #StoreStore
 2:      retl
          mov            %o1, %o0
         .size           __down_read_trylock, .-__down_read_trylock
@@ -58,7 +56,6 @@ __down_write:
         cmp             %g3, %g7
         bne,pn          %icc, 1b
          cmp            %g7, 0
-        membar          #StoreLoad | #StoreStore
         bne,pn          %icc, 3f
          nop
 2:      retl
@@ -85,7 +82,6 @@ __down_write_trylock:
         cmp             %g3, %g7
         bne,pn          %icc, 1b
          mov            1, %o1
-        membar          #StoreLoad | #StoreStore
 2:      retl
          mov            %o1, %o0
         .size           __down_write_trylock, .-__down_write_trylock
@@ -99,7 +95,6 @@ __up_read:
         cmp             %g1, %g7
         bne,pn          %icc, 1b
          cmp            %g7, 0
-        membar          #StoreLoad | #StoreStore
         bl,pn           %icc, 3f
          nop
 2:      retl
@@ -129,7 +124,6 @@ __up_write:
         bne,pn          %icc, 1b
          sub            %g7, %g1, %g7
         cmp             %g7, 0
-        membar          #StoreLoad | #StoreStore
         bl,pn           %icc, 3f
          nop
 2:
@@ -155,7 +149,6 @@ __downgrade_write:
         bne,pn          %icc, 1b
          sub            %g7, %g1, %g7
         cmp             %g7, 0
-        membar          #StoreLoad | #StoreStore
         bl,pn           %icc, 3f
          nop
 2:
diff --git a/arch/sparc/lib/strlen.S b/arch/sparc/lib/strlen.S
index ed9a763368cd..536f83507fbf 100644
--- a/arch/sparc/lib/strlen.S
+++ b/arch/sparc/lib/strlen.S
@@ -1,51 +1,40 @@
 /* strlen.S: Sparc optimized strlen code
  * Hand optimized from GNU libc's strlen
  * Copyright (C) 1991,1996 Free Software Foundation
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ * Copyright (C) 1996,2008 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1996, 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  */
 
+#include <linux/linkage.h>
+#include <asm/asm.h>
+
 #define LO_MAGIC 0x01010101
 #define HI_MAGIC 0x80808080
 
-0:
+        .text
+ENTRY(strlen)
+        mov     %o0, %o1
+        andcc   %o0, 3, %g0
+        BRANCH32(be, pt, 9f)
+         sethi  %hi(HI_MAGIC), %o4
         ldub    [%o0], %o5
-        cmp     %o5, 0
-        be      1f
+        BRANCH_REG_ZERO(pn, %o5, 11f)
          add    %o0, 1, %o0
         andcc   %o0, 3, %g0
-        be      4f
+        BRANCH32(be, pn, 4f)
          or     %o4, %lo(HI_MAGIC), %o3
         ldub    [%o0], %o5
-        cmp     %o5, 0
-        be      2f
+        BRANCH_REG_ZERO(pn, %o5, 12f)
          add    %o0, 1, %o0
         andcc   %o0, 3, %g0
-        be      5f
+        BRANCH32(be, pt, 5f)
          sethi  %hi(LO_MAGIC), %o4
         ldub    [%o0], %o5
-        cmp     %o5, 0
-        be      3f
+        BRANCH_REG_ZERO(pn, %o5, 13f)
          add    %o0, 1, %o0
-        b       8f
+        BRANCH32(ba, pt, 8f)
          or     %o4, %lo(LO_MAGIC), %o2
-1:
-        retl
-         mov    0, %o0
-2:
-        retl
-         mov    1, %o0
-3:
-        retl
-         mov    2, %o0
-
-        .align 4
-        .global strlen
-strlen:
-        mov     %o0, %o1
-        andcc   %o0, 3, %g0
-        bne     0b
-         sethi  %hi(HI_MAGIC), %o4
+9:
         or      %o4, %lo(HI_MAGIC), %o3
 4:
         sethi   %hi(LO_MAGIC), %o4
@@ -56,26 +45,36 @@ strlen:
 2:
         sub     %o5, %o2, %o4
         andcc   %o4, %o3, %g0
-        be      8b
+        BRANCH32(be, pt, 8b)
          add    %o0, 4, %o0
 
         /* Check every byte. */
-        srl     %o5, 24, %g5
-        andcc   %g5, 0xff, %g0
-        be      1f
+        srl     %o5, 24, %g7
+        andcc   %g7, 0xff, %g0
+        BRANCH32(be, pn, 1f)
          add    %o0, -4, %o4
-        srl     %o5, 16, %g5
-        andcc   %g5, 0xff, %g0
-        be      1f
+        srl     %o5, 16, %g7
+        andcc   %g7, 0xff, %g0
+        BRANCH32(be, pn, 1f)
          add    %o4, 1, %o4
-        srl     %o5, 8, %g5
-        andcc   %g5, 0xff, %g0
-        be      1f
+        srl     %o5, 8, %g7
+        andcc   %g7, 0xff, %g0
+        BRANCH32(be, pn, 1f)
          add    %o4, 1, %o4
         andcc   %o5, 0xff, %g0
-        bne,a   2b
+        BRANCH32_ANNUL(bne, pt, 2b)
          ld     [%o0], %o5
         add     %o4, 1, %o4
 1:
         retl
          sub    %o4, %o1, %o0
+11:
+        retl
+         mov    0, %o0
+12:
+        retl
+         mov    1, %o0
+13:
+        retl
+         mov    2, %o0
+ENDPROC(strlen)
diff --git a/arch/sparc/lib/strlen_user.S b/arch/sparc/lib/strlen_user_32.S
index 8c8a371df3c9..8c8a371df3c9 100644
--- a/arch/sparc/lib/strlen_user.S
+++ b/arch/sparc/lib/strlen_user_32.S
diff --git a/arch/sparc64/lib/strlen_user.S b/arch/sparc/lib/strlen_user_64.S
index 114ed111e251..114ed111e251 100644
--- a/arch/sparc64/lib/strlen_user.S
+++ b/arch/sparc/lib/strlen_user_64.S
diff --git a/arch/sparc/lib/strncmp.S b/arch/sparc/lib/strncmp_32.S
index 494ec664537a..494ec664537a 100644
--- a/arch/sparc/lib/strncmp.S
+++ b/arch/sparc/lib/strncmp_32.S
diff --git a/arch/sparc64/lib/strncmp.S b/arch/sparc/lib/strncmp_64.S
index 980e83751556..980e83751556 100644
--- a/arch/sparc64/lib/strncmp.S
+++ b/arch/sparc/lib/strncmp_64.S
diff --git a/arch/sparc/lib/strncpy_from_user.S b/arch/sparc/lib/strncpy_from_user_32.S
index d77198976a66..d77198976a66 100644
--- a/arch/sparc/lib/strncpy_from_user.S
+++ b/arch/sparc/lib/strncpy_from_user_32.S
diff --git a/arch/sparc64/lib/strncpy_from_user.S b/arch/sparc/lib/strncpy_from_user_64.S
index 511c8f136f95..511c8f136f95 100644
--- a/arch/sparc64/lib/strncpy_from_user.S
+++ b/arch/sparc/lib/strncpy_from_user_64.S
diff --git a/arch/sparc64/lib/user_fixup.c b/arch/sparc/lib/user_fixup.c
index 05a361b0a1a4..05a361b0a1a4 100644
--- a/arch/sparc64/lib/user_fixup.c
+++ b/arch/sparc/lib/user_fixup.c
diff --git a/arch/sparc64/lib/xor.S b/arch/sparc/lib/xor.S
index f44f58f40234..f44f58f40234 100644
--- a/arch/sparc64/lib/xor.S
+++ b/arch/sparc/lib/xor.S
diff --git a/arch/sparc/math-emu/Makefile b/arch/sparc/math-emu/Makefile
index 8136987977f4..b9085ecbb27b 100644
--- a/arch/sparc/math-emu/Makefile
+++ b/arch/sparc/math-emu/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the FPU instruction emulation.
 #
 
-obj-y    := math.o
+# supress all warnings - as math.c produces a lot!
+ccflags-y := -w
 
-EXTRA_AFLAGS := -ansi
-EXTRA_CFLAGS = -I. -Iinclude/math-emu -w
+obj-y    := math_$(BITS).o
diff --git a/arch/sparc/math-emu/ashldi3.S b/arch/sparc/math-emu/ashldi3.S
deleted file mode 100644
index 7230ff5c7aa1..000000000000
--- a/arch/sparc/math-emu/ashldi3.S
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * ashldi3.S:   Math-emu code creates all kinds of references to
- *              this little routine on the sparc with gcc.
- *
- * Copyright (C) 1998 Jakub Jelinek(jj@ultra.linux.cz)
- */
-
-#include <asm/cprefix.h>
-
-        .globl C_LABEL(__ashldi3)
-C_LABEL(__ashldi3):
-        tst     %o2
-        be      3f
-         mov    32, %g2
-
-        sub     %g2, %o2, %g2
-
-        tst     %g2
-        bg      1f
-         srl    %o1, %g2, %g3
-
-        clr     %o5
-        neg     %g2
-        ba      2f
-         sll    %o1, %g2, %o4
-
-1:
-        sll     %o1, %o2, %o5
-        srl     %o0, %o2, %g2
-        or      %g2, %g3, %o4
-2:
-        mov     %o4, %o0
-        mov     %o5, %o1
-3:
-        jmpl    %o7 + 8, %g0
-         nop
diff --git a/arch/sparc/math-emu/math.c b/arch/sparc/math-emu/math_32.c
index 8613b3eb877c..e13f65da17df 100644
--- a/arch/sparc/math-emu/math.c
+++ b/arch/sparc/math-emu/math_32.c
@@ -69,7 +69,7 @@
 #include <linux/mm.h>
 #include <asm/uaccess.h>
 
-#include "sfp-util.h"
+#include "sfp-util_32.h"
 #include <math-emu/soft-fp.h>
 #include <math-emu/single.h>
 #include <math-emu/double.h>
diff --git a/arch/sparc64/math-emu/math.c b/arch/sparc/math-emu/math_64.c
index add053e0f3b3..6863c9bde25c 100644
--- a/arch/sparc64/math-emu/math.c
+++ b/arch/sparc/math-emu/math_64.c
@@ -16,7 +16,7 @@
 #include <asm/ptrace.h>
 #include <asm/uaccess.h>
 
-#include "sfp-util.h"
+#include "sfp-util_64.h"
 #include <math-emu/soft-fp.h>
 #include <math-emu/single.h>
 #include <math-emu/double.h>
diff --git a/arch/sparc/math-emu/sfp-util.h b/arch/sparc/math-emu/sfp-util_32.h
index d1b2aff3c259..d1b2aff3c259 100644
--- a/arch/sparc/math-emu/sfp-util.h
+++ b/arch/sparc/math-emu/sfp-util_32.h
diff --git a/arch/sparc64/math-emu/sfp-util.h b/arch/sparc/math-emu/sfp-util_64.h
index 425d3cf01af4..425d3cf01af4 100644
--- a/arch/sparc64/math-emu/sfp-util.h
+++ b/arch/sparc/math-emu/sfp-util_64.h
diff --git a/arch/sparc/mm/Makefile b/arch/sparc/mm/Makefile
index ea88955d97ff..681abe0a4594 100644
--- a/arch/sparc/mm/Makefile
+++ b/arch/sparc/mm/Makefile
@@ -1,17 +1,25 @@
 # Makefile for the linux Sparc-specific parts of the memory manager.
 #
 
-EXTRA_AFLAGS := -ansi
+asflags-y := -ansi
+ccflags-y := -Werror
 
-obj-y   := fault.o init.o loadmmu.o generic.o extable.o btfixup.o \
-            srmmu.o iommu.o io-unit.o hypersparc.o viking.o tsunami.o swift.o
+obj-$(CONFIG_SPARC64)   += ultra.o tlb.o tsb.o
+obj-y                   += fault_$(BITS).o
+obj-y                   += init_$(BITS).o
+obj-$(CONFIG_SPARC32)   += loadmmu.o
+obj-y                   += generic_$(BITS).o
+obj-$(CONFIG_SPARC32)   += extable.o btfixup.o srmmu.o iommu.o io-unit.o
+obj-$(CONFIG_SPARC32)   += hypersparc.o viking.o tsunami.o swift.o
 
-ifdef CONFIG_HIGHMEM
-obj-y   += highmem.o
-endif
+# Only used by sparc64
+obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
+
+# Only used by sparc32
+obj-$(CONFIG_HIGHMEM)   += highmem.o
 
 ifdef CONFIG_SMP
-obj-y   += nosun4c.o
+obj-$(CONFIG_SPARC32) += nosun4c.o
 else
-obj-y   += sun4c.o
+obj-$(CONFIG_SPARC32) += sun4c.o
 endif
diff --git a/arch/sparc/mm/fault.c b/arch/sparc/mm/fault_32.c
index a507e1174662..a507e1174662 100644
--- a/arch/sparc/mm/fault.c
+++ b/arch/sparc/mm/fault_32.c
diff --git a/arch/sparc64/mm/fault.c b/arch/sparc/mm/fault_64.c
index a9e474bf6385..a9e474bf6385 100644
--- a/arch/sparc64/mm/fault.c
+++ b/arch/sparc/mm/fault_64.c
diff --git a/arch/sparc/mm/generic.c b/arch/sparc/mm/generic_32.c
index a289261da9fd..a289261da9fd 100644
--- a/arch/sparc/mm/generic.c
+++ b/arch/sparc/mm/generic_32.c
diff --git a/arch/sparc64/mm/generic.c b/arch/sparc/mm/generic_64.c
index f362c2037013..f362c2037013 100644
--- a/arch/sparc64/mm/generic.c
+++ b/arch/sparc/mm/generic_64.c
diff --git a/arch/sparc64/mm/hugetlbpage.c b/arch/sparc/mm/hugetlbpage.c
index f27d10369e0c..f27d10369e0c 100644
--- a/arch/sparc64/mm/hugetlbpage.c
+++ b/arch/sparc/mm/hugetlbpage.c
diff --git a/arch/sparc/mm/init.c b/arch/sparc/mm/init_32.c
index 677c1e187a23..fec926021f49 100644
--- a/arch/sparc/mm/init.c
+++ b/arch/sparc/mm/init_32.c
@@ -25,6 +25,7 @@
 #include <linux/pagemap.h>
 #include <linux/poison.h>
 
+#include <asm/sections.h>
 #include <asm/system.h>
 #include <asm/vac-ops.h>
 #include <asm/page.h>
@@ -48,9 +49,6 @@ unsigned long sparc_unmapped_base;
 
 struct pgtable_cache_struct pgt_quicklists;
 
-/* References to section boundaries */
-extern char __init_begin, __init_end, _start, _end, etext , edata;
-
 /* Initial ramdisk setup */
 extern unsigned int sparc_ramdisk_image;
 extern unsigned int sparc_ramdisk_size;
@@ -450,9 +448,9 @@ void __init mem_init(void)
         
         totalram_pages += totalhigh_pages;
 
-        codepages = (((unsigned long) &etext) - ((unsigned long)&_start));
+        codepages = (((unsigned long) &_etext) - ((unsigned long)&_start));
         codepages = PAGE_ALIGN(codepages) >> PAGE_SHIFT;
-        datapages = (((unsigned long) &edata) - ((unsigned long)&etext));
+        datapages = (((unsigned long) &_edata) - ((unsigned long)&_etext));
         datapages = PAGE_ALIGN(datapages) >> PAGE_SHIFT;
         initpages = (((unsigned long) &__init_end) - ((unsigned long) &__init_begin));
         initpages = PAGE_ALIGN(initpages) >> PAGE_SHIFT;
@@ -476,8 +474,10 @@ void __init mem_init(void)
 void free_initmem (void)
 {
         unsigned long addr;
+        unsigned long freed;
 
         addr = (unsigned long)(&__init_begin);
+        freed = (unsigned long)(&__init_end) - addr;
         for (; addr < (unsigned long)(&__init_end); addr += PAGE_SIZE) {
                 struct page *p;
 
@@ -490,8 +490,8 @@ void free_initmem (void)
                 totalram_pages++;
                 num_physpages++;
         }
-        printk(KERN_INFO "Freeing unused kernel memory: %dk freed\n",
-                (&__init_end - &__init_begin) >> 10);
+        printk(KERN_INFO "Freeing unused kernel memory: %ldk freed\n",
+                freed >> 10);
 }
 
 #ifdef CONFIG_BLK_DEV_INITRD
diff --git a/arch/sparc64/mm/init.c b/arch/sparc/mm/init_64.c
index 185f34679110..6ea73da29312 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc/mm/init_64.c
@@ -50,7 +50,7 @@
 #include <asm/cpudata.h>
 #include <asm/irq.h>
 
-#include "init.h"
+#include "init_64.h"
 
 unsigned long kern_linear_pte_xor[2] __read_mostly;
 
@@ -214,7 +214,6 @@ static inline void set_dcache_dirty(struct page *page, int this_cpu)
                              "or        %%g1, %0, %%g1\n\t"
                              "casx      [%2], %%g7, %%g1\n\t"
                              "cmp       %%g7, %%g1\n\t"
-                             "membar    #StoreLoad | #StoreStore\n\t"
                              "bne,pn    %%xcc, 1b\n\t"
                              " nop"
                              : /* no outputs */
@@ -236,7 +235,6 @@ static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
                              " andn     %%g7, %1, %%g1\n\t"
                              "casx      [%2], %%g7, %%g1\n\t"
                              "cmp       %%g7, %%g1\n\t"
-                             "membar    #StoreLoad | #StoreStore\n\t"
                              "bne,pn    %%xcc, 1b\n\t"
                              " nop\n"
                              "2:"
@@ -956,7 +954,7 @@ int of_node_to_nid(struct device_node *dp)
         return nid;
 }
 
-static void __init add_node_ranges(void)
+static void add_node_ranges(void)
 {
         int i;
 
diff --git a/arch/sparc64/mm/init.h b/arch/sparc/mm/init_64.h
index 16063870a489..16063870a489 100644
--- a/arch/sparc64/mm/init.h
+++ b/arch/sparc/mm/init_64.h
diff --git a/arch/sparc/mm/io-unit.c b/arch/sparc/mm/io-unit.c
index daadf5f88050..005e758a4db7 100644
--- a/arch/sparc/mm/io-unit.c
+++ b/arch/sparc/mm/io-unit.c
@@ -156,8 +156,8 @@ static void iounit_get_scsi_sgl(struct device *dev, struct scatterlist *sg, int
         spin_lock_irqsave(&iounit->lock, flags);
         while (sz != 0) {
                 --sz;
-                sg->dvma_address = iounit_get_area(iounit, (unsigned long) sg_virt(sg), sg->length);
-                sg->dvma_length = sg->length;
+                sg->dma_address = iounit_get_area(iounit, (unsigned long) sg_virt(sg), sg->length);
+                sg->dma_length = sg->length;
                 sg = sg_next(sg);
         }
         spin_unlock_irqrestore(&iounit->lock, flags);
@@ -186,8 +186,8 @@ static void iounit_release_scsi_sgl(struct device *dev, struct scatterlist *sg,
         spin_lock_irqsave(&iounit->lock, flags);
         while (sz != 0) {
                 --sz;
-                len = ((sg->dvma_address & ~PAGE_MASK) + sg->length + (PAGE_SIZE-1)) >> PAGE_SHIFT;
-                vaddr = (sg->dvma_address - IOUNIT_DMA_BASE) >> PAGE_SHIFT;
+                len = ((sg->dma_address & ~PAGE_MASK) + sg->length + (PAGE_SIZE-1)) >> PAGE_SHIFT;
+                vaddr = (sg->dma_address - IOUNIT_DMA_BASE) >> PAGE_SHIFT;
                 IOD(("iounit_release %08lx-%08lx\n", (long)vaddr, (long)len+vaddr));
                 for (len += vaddr; vaddr < len; vaddr++)
                         clear_bit(vaddr, iounit->bmap);
diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c
index e7a499e3aa3c..b2e6e73888b5 100644
--- a/arch/sparc/mm/iommu.c
+++ b/arch/sparc/mm/iommu.c
@@ -245,8 +245,8 @@ static void iommu_get_scsi_sgl_noflush(struct device *dev, struct scatterlist *s
         while (sz != 0) {
                 --sz;
                 n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT;
-                sg->dvma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset;
-                sg->dvma_length = (__u32) sg->length;
+                sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset;
+                sg->dma_length = sg->length;
                 sg = sg_next(sg);
         }
 }
@@ -259,8 +259,8 @@ static void iommu_get_scsi_sgl_gflush(struct device *dev, struct scatterlist *sg
         while (sz != 0) {
                 --sz;
                 n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT;
-                sg->dvma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset;
-                sg->dvma_length = (__u32) sg->length;
+                sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset;
+                sg->dma_length = sg->length;
                 sg = sg_next(sg);
         }
 }
@@ -290,8 +290,8 @@ static void iommu_get_scsi_sgl_pflush(struct device *dev, struct scatterlist *sg
                         }
                 }
 
-                sg->dvma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset;
-                sg->dvma_length = (__u32) sg->length;
+                sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset;
+                sg->dma_length = sg->length;
                 sg = sg_next(sg);
         }
 }
@@ -330,8 +330,8 @@ static void iommu_release_scsi_sgl(struct device *dev, struct scatterlist *sg, i
                 --sz;
 
                 n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT;
-                iommu_release_one(dev, sg->dvma_address & PAGE_MASK, n);
-                sg->dvma_address = 0x21212121;
+                iommu_release_one(dev, sg->dma_address & PAGE_MASK, n);
+                sg->dma_address = 0x21212121;
                 sg = sg_next(sg);
         }
 }
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index dd8aa36f366c..fe7ed08390bb 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -1312,10 +1312,8 @@ void __init srmmu_paging_init(void)
 #endif
         poke_srmmu();
 
-#ifdef CONFIG_SUN_IO
         srmmu_allocate_ptable_skeleton(sparc_iomap.start, IOBASE_END);
         srmmu_allocate_ptable_skeleton(DVMA_VADDR, DVMA_END);
-#endif
 
         srmmu_allocate_ptable_skeleton(
                 __fix_to_virt(__end_of_fixed_addresses - 1), FIXADDR_TOP);
@@ -1916,18 +1914,6 @@ static void __cpuinit poke_viking(void)
         mreg |= VIKING_SBENABLE;
         mreg &= ~(VIKING_ACENABLE);
         srmmu_set_mmureg(mreg);
-
-#ifdef CONFIG_SMP
-        /* Avoid unnecessary cross calls. */
-        BTFIXUPCOPY_CALL(flush_cache_all, local_flush_cache_all);
-        BTFIXUPCOPY_CALL(flush_cache_mm, local_flush_cache_mm);
-        BTFIXUPCOPY_CALL(flush_cache_range, local_flush_cache_range);
-        BTFIXUPCOPY_CALL(flush_cache_page, local_flush_cache_page);
-        BTFIXUPCOPY_CALL(__flush_page_to_ram, local_flush_page_to_ram);
-        BTFIXUPCOPY_CALL(flush_sig_insns, local_flush_sig_insns);
-        BTFIXUPCOPY_CALL(flush_page_for_dma, local_flush_page_for_dma);
-        btfixup();
-#endif
 }
 
 static void __init init_viking(void)
@@ -2272,6 +2258,17 @@ void __init ld_mmu_srmmu(void)
         BTFIXUPSET_CALL(__flush_page_to_ram, smp_flush_page_to_ram, BTFIXUPCALL_NORM);
         BTFIXUPSET_CALL(flush_sig_insns, smp_flush_sig_insns, BTFIXUPCALL_NORM);
         BTFIXUPSET_CALL(flush_page_for_dma, smp_flush_page_for_dma, BTFIXUPCALL_NORM);
+
+        if (poke_srmmu == poke_viking) {
+                /* Avoid unnecessary cross calls. */
+                BTFIXUPCOPY_CALL(flush_cache_all, local_flush_cache_all);
+                BTFIXUPCOPY_CALL(flush_cache_mm, local_flush_cache_mm);
+                BTFIXUPCOPY_CALL(flush_cache_range, local_flush_cache_range);
+                BTFIXUPCOPY_CALL(flush_cache_page, local_flush_cache_page);
+                BTFIXUPCOPY_CALL(__flush_page_to_ram, local_flush_page_to_ram);
+                BTFIXUPCOPY_CALL(flush_sig_insns, local_flush_sig_insns);
+                BTFIXUPCOPY_CALL(flush_page_for_dma, local_flush_page_for_dma);
+        }
 #endif
 
         if (sparc_cpu_model == sun4d)
diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c
index fe65aeeb3947..2ffacd67c424 100644
--- a/arch/sparc/mm/sun4c.c
+++ b/arch/sparc/mm/sun4c.c
@@ -18,6 +18,7 @@
 #include <linux/seq_file.h>
 #include <linux/scatterlist.h>
 
+#include <asm/sections.h>
 #include <asm/page.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
@@ -240,9 +241,7 @@ void sun4c_complete_all_stores(void)
 
         _unused = sun4c_get_context();
         sun4c_set_context(_unused);
-#ifdef CONFIG_SUN_AUXIO
         _unused = get_auxio();
-#endif
 }
 
 /* Bootup utility functions. */
@@ -1124,8 +1123,8 @@ static void sun4c_get_scsi_sgl(struct device *dev, struct scatterlist *sg, int s
 {
         while (sz != 0) {
                 --sz;
-                sg->dvma_address = (__u32)sun4c_lockarea(sg_virt(sg), sg->length);
-                sg->dvma_length = sg->length;
+                sg->dma_address = (__u32)sun4c_lockarea(sg_virt(sg), sg->length);
+                sg->dma_length = sg->length;
                 sg = sg_next(sg);
         }
 }
@@ -1141,7 +1140,7 @@ static void sun4c_release_scsi_sgl(struct device *dev, struct scatterlist *sg, i
 {
         while (sz != 0) {
                 --sz;
-                sun4c_unlockarea((char *)sg->dvma_address, sg->length);
+                sun4c_unlockarea((char *)sg->dma_address, sg->length);
                 sg = sg_next(sg);
         }
 }
@@ -1953,7 +1952,6 @@ void sun4c_update_mmu_cache(struct vm_area_struct *vma, unsigned long address, p
 }
 
 extern void sparc_context_init(int);
-extern unsigned long end;
 extern unsigned long bootmem_init(unsigned long *pages_avail);
 extern unsigned long last_valid_pfn;
 
@@ -1964,7 +1962,7 @@ void __init sun4c_paging_init(void)
         extern struct resource sparc_iomap;
         unsigned long end_pfn, pages_avail;
 
-        kernel_end = (unsigned long) &end;
+        kernel_end = (unsigned long) &_end;
         kernel_end = SUN4C_REAL_PGDIR_ALIGN(kernel_end);
 
         pages_avail = 0;
diff --git a/arch/sparc64/mm/tlb.c b/arch/sparc/mm/tlb.c
index d8f21e24a82f..d8f21e24a82f 100644
--- a/arch/sparc64/mm/tlb.c
+++ b/arch/sparc/mm/tlb.c
diff --git a/arch/sparc64/mm/tsb.c b/arch/sparc/mm/tsb.c
index 587f8efb2e05..36a0813f9517 100644
--- a/arch/sparc64/mm/tsb.c
+++ b/arch/sparc/mm/tsb.c
@@ -41,10 +41,8 @@ void flush_tsb_kernel_range(unsigned long start, unsigned long end)
                                               KERNEL_TSB_NENTRIES);
                 struct tsb *ent = &swapper_tsb[hash];
 
-                if (tag_compare(ent->tag, v)) {
+                if (tag_compare(ent->tag, v))
                         ent->tag = (1UL << TSB_TAG_INVALID_BIT);
-                        membar_storeload_storestore();
-                }
         }
 }
 
@@ -267,6 +265,18 @@ void __init pgtable_cache_init(void)
         }
 }
 
+int sysctl_tsb_ratio = -2;
+
+static unsigned long tsb_size_to_rss_limit(unsigned long new_size)
+{
+        unsigned long num_ents = (new_size / sizeof(struct tsb));
+
+        if (sysctl_tsb_ratio < 0)
+                return num_ents - (num_ents >> -sysctl_tsb_ratio);
+        else
+                return num_ents + (num_ents >> sysctl_tsb_ratio);
+}
+
 /* When the RSS of an address space exceeds tsb_rss_limit for a TSB,
  * do_sparc64_fault() invokes this routine to try and grow it.
  *
@@ -297,19 +307,14 @@ void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long rss)
 
         new_cache_index = 0;
         for (new_size = 8192; new_size < max_tsb_size; new_size <<= 1UL) {
-                unsigned long n_entries = new_size / sizeof(struct tsb);
-
-                n_entries = (n_entries * 3) / 4;
-                if (n_entries > rss)
+                new_rss_limit = tsb_size_to_rss_limit(new_size);
+                if (new_rss_limit > rss)
                         break;
-
                 new_cache_index++;
         }
 
         if (new_size == max_tsb_size)
                 new_rss_limit = ~0UL;
-        else
-                new_rss_limit = ((new_size / sizeof(struct tsb)) * 3) / 4;
 
 retry_tsb_alloc:
         gfp_flags = GFP_KERNEL;
diff --git a/arch/sparc64/mm/ultra.S b/arch/sparc/mm/ultra.S
index 86773e89dc1b..80c788ec7c32 100644
--- a/arch/sparc64/mm/ultra.S
+++ b/arch/sparc/mm/ultra.S
@@ -125,7 +125,6 @@ __spitfire_flush_tlb_mm_slow:
         .align          32
         .globl          __flush_icache_page
 __flush_icache_page:    /* %o0 = phys_page */
-        membar          #StoreStore
         srlx            %o0, PAGE_SHIFT, %o0
         sethi           %uhi(PAGE_OFFSET), %g1
         sllx            %o0, PAGE_SHIFT, %o0
@@ -467,7 +466,7 @@ xcall_sync_tick:
         .previous
 
         rdpr            %pil, %g2
-        wrpr            %g0, 15, %pil
+        wrpr            %g0, PIL_NORMAL_MAX, %pil
         sethi           %hi(109f), %g7
         b,pt            %xcc, etrap_irq
 109:     or             %g7, %lo(109b), %g7
@@ -507,7 +506,6 @@ xcall_fetch_glob_regs:
         sllx            %g2, TRAP_BLOCK_SZ_SHIFT, %g2
         add             %g7, %g2, %g7
         ldx             [%g7 + TRAP_PER_CPU_THREAD], %g3
-        membar          #StoreStore
         stx             %g3, [%g1 + GR_SNAP_THREAD]
         retry
 
@@ -690,7 +688,7 @@ xcall_kgdb_capture:
         .previous
 
         rdpr            %pil, %g2
-        wrpr            %g0, 15, %pil
+        wrpr            %g0, PIL_NORMAL_MAX, %pil
         sethi           %hi(109f), %g7
         ba,pt           %xcc, etrap_irq
 109:     or             %g7, %lo(109b), %g7
diff --git a/arch/sparc/oprofile/init.c b/arch/sparc/oprofile/init.c
index 17bb6035069b..d6e170c074fc 100644
--- a/arch/sparc/oprofile/init.c
+++ b/arch/sparc/oprofile/init.c
@@ -12,12 +12,239 @@
 #include <linux/errno.h>
 #include <linux/init.h>
  
+#ifdef CONFIG_SPARC64
+#include <asm/hypervisor.h>
+#include <asm/spitfire.h>
+#include <asm/cpudata.h>
+#include <asm/irq.h>
+
+static int nmi_enabled;
+
+struct pcr_ops {
+        u64 (*read)(void);
+        void (*write)(u64);
+};
+static const struct pcr_ops *pcr_ops;
+
+static u64 direct_pcr_read(void)
+{
+        u64 val;
+
+        read_pcr(val);
+        return val;
+}
+
+static void direct_pcr_write(u64 val)
+{
+        write_pcr(val);
+}
+
+static const struct pcr_ops direct_pcr_ops = {
+        .read   = direct_pcr_read,
+        .write  = direct_pcr_write,
+};
+
+static void n2_pcr_write(u64 val)
+{
+        unsigned long ret;
+
+        ret = sun4v_niagara2_setperf(HV_N2_PERF_SPARC_CTL, val);
+        if (val != HV_EOK)
+                write_pcr(val);
+}
+
+static const struct pcr_ops n2_pcr_ops = {
+        .read   = direct_pcr_read,
+        .write  = n2_pcr_write,
+};
+
+/* In order to commonize as much of the implementation as
+ * possible, we use PICH as our counter.  Mostly this is
+ * to accomodate Niagara-1 which can only count insn cycles
+ * in PICH.
+ */
+static u64 picl_value(void)
+{
+        u32 delta = local_cpu_data().clock_tick / HZ;
+
+        return ((u64)((0 - delta) & 0xffffffff)) << 32;
+}
+
+#define PCR_PIC_PRIV            0x00000001 /* PIC access is privileged */
+#define PCR_STRACE              0x00000002 /* Trace supervisor events  */
+#define PCR_UTRACE              0x00000004 /* Trace user events        */
+#define PCR_N2_HTRACE           0x00000008 /* Trace hypervisor events  */
+#define PCR_N2_TOE_OV0          0x00000010 /* Trap if PIC 0 overflows  */
+#define PCR_N2_TOE_OV1          0x00000020 /* Trap if PIC 1 overflows  */
+#define PCR_N2_MASK0            0x00003fc0
+#define PCR_N2_MASK0_SHIFT      6
+#define PCR_N2_SL0              0x0003c000
+#define PCR_N2_SL0_SHIFT        14
+#define PCR_N2_OV0              0x00040000
+#define PCR_N2_MASK1            0x07f80000
+#define PCR_N2_MASK1_SHIFT      19
+#define PCR_N2_SL1              0x78000000
+#define PCR_N2_SL1_SHIFT        27
+#define PCR_N2_OV1              0x80000000
+
+#define PCR_SUN4U_ENABLE        (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE)
+#define PCR_N2_ENABLE           (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE | \
+                                 PCR_N2_TOE_OV1 | \
+                                 (2 << PCR_N2_SL1_SHIFT) | \
+                                 (0xff << PCR_N2_MASK1_SHIFT))
+
+static u64 pcr_enable = PCR_SUN4U_ENABLE;
+
+static void nmi_handler(struct pt_regs *regs)
+{
+        pcr_ops->write(PCR_PIC_PRIV);
+
+        if (nmi_enabled) {
+                oprofile_add_sample(regs, 0);
+
+                write_pic(picl_value());
+                pcr_ops->write(pcr_enable);
+        }
+}
+
+/* We count "clock cycle" events in the lower 32-bit PIC.
+ * Then configure it such that it overflows every HZ, and thus
+ * generates a level 15 interrupt at that frequency.
+ */
+static void cpu_nmi_start(void *_unused)
+{
+        pcr_ops->write(PCR_PIC_PRIV);
+        write_pic(picl_value());
+
+        pcr_ops->write(pcr_enable);
+}
+
+static void cpu_nmi_stop(void *_unused)
+{
+        pcr_ops->write(PCR_PIC_PRIV);
+}
+
+static int nmi_start(void)
+{
+        int err = register_perfctr_intr(nmi_handler);
+
+        if (!err) {
+                nmi_enabled = 1;
+                wmb();
+                err = on_each_cpu(cpu_nmi_start, NULL, 1);
+                if (err) {
+                        nmi_enabled = 0;
+                        wmb();
+                        on_each_cpu(cpu_nmi_stop, NULL, 1);
+                        release_perfctr_intr(nmi_handler);
+                }
+        }
+
+        return err;
+}
+
+static void nmi_stop(void)
+{
+        nmi_enabled = 0;
+        wmb();
+
+        on_each_cpu(cpu_nmi_stop, NULL, 1);
+        release_perfctr_intr(nmi_handler);
+        synchronize_sched();
+}
+
+static unsigned long perf_hsvc_group;
+static unsigned long perf_hsvc_major;
+static unsigned long perf_hsvc_minor;
+
+static int __init register_perf_hsvc(void)
+{
+        if (tlb_type == hypervisor) {
+                switch (sun4v_chip_type) {
+                case SUN4V_CHIP_NIAGARA1:
+                        perf_hsvc_group = HV_GRP_NIAG_PERF;
+                        break;
+
+                case SUN4V_CHIP_NIAGARA2:
+                        perf_hsvc_group = HV_GRP_N2_CPU;
+                        break;
+
+                default:
+                        return -ENODEV;
+                }
+
+
+                perf_hsvc_major = 1;
+                perf_hsvc_minor = 0;
+                if (sun4v_hvapi_register(perf_hsvc_group,
+                                         perf_hsvc_major,
+                                         &perf_hsvc_minor)) {
+                        printk("perfmon: Could not register N2 hvapi.\n");
+                        return -ENODEV;
+                }
+        }
+        return 0;
+}
+
+static void unregister_perf_hsvc(void)
+{
+        if (tlb_type != hypervisor)
+                return;
+        sun4v_hvapi_unregister(perf_hsvc_group);
+}
+
+static int oprofile_nmi_init(struct oprofile_operations *ops)
+{
+        int err = register_perf_hsvc();
+
+        if (err)
+                return err;
+
+        switch (tlb_type) {
+        case hypervisor:
+                pcr_ops = &n2_pcr_ops;
+                pcr_enable = PCR_N2_ENABLE;
+                break;
+
+        case cheetah:
+        case cheetah_plus:
+                pcr_ops = &direct_pcr_ops;
+                break;
+
+        default:
+                return -ENODEV;
+        }
+
+        ops->create_files = NULL;
+        ops->setup = NULL;
+        ops->shutdown = NULL;
+        ops->start = nmi_start;
+        ops->stop = nmi_stop;
+        ops->cpu_type = "timer";
+
+        printk(KERN_INFO "oprofile: Using perfctr based NMI timer interrupt.\n");
+
+        return 0;
+}
+#endif
+
 int __init oprofile_arch_init(struct oprofile_operations *ops)
 {
-        return -ENODEV;
+        int ret = -ENODEV;
+
+#ifdef CONFIG_SPARC64
+        ret = oprofile_nmi_init(ops);
+        if (!ret)
+                return ret;
+#endif
+
+        return ret;
 }
 
 
 void oprofile_arch_exit(void)
 {
+#ifdef CONFIG_SPARC64
+        unregister_perf_hsvc();
+#endif
 }
diff --git a/arch/sparc/prom/Makefile b/arch/sparc/prom/Makefile
index 8f7e18546c97..1b8c073adb44 100644
--- a/arch/sparc/prom/Makefile
+++ b/arch/sparc/prom/Makefile
@@ -1,6 +1,21 @@
 # Makefile for the Sun Boot PROM interface library under
 # Linux.
 #
+asflags := -ansi
+ccflags := -Werror
 
-lib-y := bootstr.o devmap.o devops.o init.o memory.o misc.o mp.o \
-         palloc.o ranges.o segment.o console.o printf.o tree.o
+lib-y                 := bootstr_$(BITS).o
+lib-$(CONFIG_SPARC32) += devmap.o
+lib-y                 += devops_$(BITS).o
+lib-y                 += init_$(BITS).o
+lib-$(CONFIG_SPARC32) += memory.o
+lib-y                 += misc_$(BITS).o
+lib-$(CONFIG_SPARC32) += mp.o
+lib-$(CONFIG_SPARC32) += palloc.o
+lib-$(CONFIG_SPARC32) += ranges.o
+lib-$(CONFIG_SPARC32) += segment.o
+lib-y                 += console_$(BITS).o
+lib-y                 += printf.o
+lib-y                 += tree_$(BITS).o
+lib-$(CONFIG_SPARC64) += p1275.o
+lib-$(CONFIG_SPARC64) += cif.o
diff --git a/arch/sparc/prom/bootstr.c b/arch/sparc/prom/bootstr_32.c
index 916831da7e67..916831da7e67 100644
--- a/arch/sparc/prom/bootstr.c
+++ b/arch/sparc/prom/bootstr_32.c
diff --git a/arch/sparc64/prom/bootstr.c b/arch/sparc/prom/bootstr_64.c
index ab9ccc63b388..ab9ccc63b388 100644
--- a/arch/sparc64/prom/bootstr.c
+++ b/arch/sparc/prom/bootstr_64.c
diff --git a/arch/sparc64/prom/cif.S b/arch/sparc/prom/cif.S
index 5f27ad779c0c..5f27ad779c0c 100644
--- a/arch/sparc64/prom/cif.S
+++ b/arch/sparc/prom/cif.S
diff --git a/arch/sparc/prom/console.c b/arch/sparc/prom/console_32.c
index b3075d73fc19..b3075d73fc19 100644
--- a/arch/sparc/prom/console.c
+++ b/arch/sparc/prom/console_32.c
diff --git a/arch/sparc64/prom/console.c b/arch/sparc/prom/console_64.c
index e1c3fc87484d..e1c3fc87484d 100644
--- a/arch/sparc64/prom/console.c
+++ b/arch/sparc/prom/console_64.c
diff --git a/arch/sparc/prom/devops.c b/arch/sparc/prom/devops_32.c
index 9f1a95c91ad1..9f1a95c91ad1 100644
--- a/arch/sparc/prom/devops.c
+++ b/arch/sparc/prom/devops_32.c
diff --git a/arch/sparc64/prom/devops.c b/arch/sparc/prom/devops_64.c
index 9dbd803e46e1..9dbd803e46e1 100644
--- a/arch/sparc64/prom/devops.c
+++ b/arch/sparc/prom/devops_64.c
diff --git a/arch/sparc/prom/init.c b/arch/sparc/prom/init_32.c
index 873217c6d823..873217c6d823 100644
--- a/arch/sparc/prom/init.c
+++ b/arch/sparc/prom/init_32.c
diff --git a/arch/sparc64/prom/init.c b/arch/sparc/prom/init_64.c
index 7b00f89490a4..7b00f89490a4 100644
--- a/arch/sparc64/prom/init.c
+++ b/arch/sparc/prom/init_64.c
diff --git a/arch/sparc/prom/misc.c b/arch/sparc/prom/misc_32.c
index 49b5057b9601..cf6c3f6d36c3 100644
--- a/arch/sparc/prom/misc.c
+++ b/arch/sparc/prom/misc_32.c
@@ -61,9 +61,7 @@ prom_cmdline(void)
         restore_current();
         install_linux_ticker();
         spin_unlock_irqrestore(&prom_lock, flags);
-#ifdef CONFIG_SUN_AUXIO
         set_auxio(AUXIO_LED, 0);
-#endif
 }
 
 /* Drop into the prom, but completely terminate the program.
diff --git a/arch/sparc64/prom/misc.c b/arch/sparc/prom/misc_64.c
index 9b0c0760901e..9b0c0760901e 100644
--- a/arch/sparc64/prom/misc.c
+++ b/arch/sparc/prom/misc_64.c
diff --git a/arch/sparc64/prom/p1275.c b/arch/sparc/prom/p1275.c
index 4b7c937bba61..4b7c937bba61 100644
--- a/arch/sparc64/prom/p1275.c
+++ b/arch/sparc/prom/p1275.c
diff --git a/arch/sparc/prom/printf.c b/arch/sparc/prom/printf.c
index a36ab9c5ee08..660943ee4c2a 100644
--- a/arch/sparc/prom/printf.c
+++ b/arch/sparc/prom/printf.c
@@ -2,6 +2,7 @@
  * printf.c:  Internal prom library printf facility.
  *
  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com)
  *
  * We used to warn all over the code: DO NOT USE prom_printf(),
@@ -13,7 +14,6 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/module.h>
 
 #include <asm/openprom.h>
 #include <asm/oplib.h>
@@ -34,7 +34,7 @@ prom_write(const char *buf, unsigned int n)
 }
 
 void
-prom_printf(char *fmt, ...)
+prom_printf(const char *fmt, ...)
 {
         va_list args;
         int i;
@@ -45,4 +45,3 @@ prom_printf(char *fmt, ...)
 
         prom_write(ppbuf, i);
 }
-EXPORT_SYMBOL(prom_printf);
diff --git a/arch/sparc/prom/tree.c b/arch/sparc/prom/tree_32.c
index f228fe057b24..6d8187357331 100644
--- a/arch/sparc/prom/tree.c
+++ b/arch/sparc/prom/tree_32.c
@@ -85,7 +85,7 @@ int prom_getsibling(int node)
 /* Return the length in bytes of property 'prop' at node 'node'.
  * Return -1 on error.
  */
-int prom_getproplen(int node, char *prop)
+int prom_getproplen(int node, const char *prop)
 {
         int ret;
         unsigned long flags;
@@ -104,7 +104,7 @@ int prom_getproplen(int node, char *prop)
  * 'buffer' which has a size of 'bufsize'.  If the acquisition
  * was successful the length will be returned, else -1 is returned.
  */
-int prom_getproperty(int node, char *prop, char *buffer, int bufsize)
+int prom_getproperty(int node, const char *prop, char *buffer, int bufsize)
 {
         int plen, ret;
         unsigned long flags;
@@ -303,7 +303,7 @@ int prom_node_has_property(int node, char *prop)
 /* Set property 'pname' at node 'node' to value 'value' which has a length
  * of 'size' bytes.  Return the number of bytes the prom accepted.
  */
-int prom_setprop(int node, char *pname, char *value, int size)
+int prom_setprop(int node, const char *pname, char *value, int size)
 {
         unsigned long flags;
         int ret;
diff --git a/arch/sparc64/prom/tree.c b/arch/sparc/prom/tree_64.c
index 281aea44790b..281aea44790b 100644
--- a/arch/sparc64/prom/tree.c
+++ b/arch/sparc/prom/tree_64.c
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
deleted file mode 100644
index 3b96e70b4670..000000000000
--- a/arch/sparc64/Kconfig
+++ /dev/null
@@ -1,433 +0,0 @@
-# sparc64 configuration
-mainmenu "Linux Kernel Configuration for 64-bit SPARC"
-
-config SPARC
-        bool
-        default y
-        select HAVE_OPROFILE
-        select HAVE_KPROBES
-        select HAVE_KRETPROBES
-
-config SPARC64
-        bool
-        default y
-        select HAVE_FUNCTION_TRACER
-        select HAVE_IDE
-        select HAVE_LMB
-        select HAVE_ARCH_KGDB
-        select USE_GENERIC_SMP_HELPERS if SMP
-        select HAVE_ARCH_TRACEHOOK
-        select ARCH_WANT_OPTIONAL_GPIOLIB
-        select RTC_CLASS
-        select RTC_DRV_M48T59
-        select RTC_DRV_CMOS
-        select RTC_DRV_BQ4802
-        select RTC_DRV_SUN4V
-        select RTC_DRV_STARFIRE
-
-config GENERIC_TIME
-        bool
-        default y
-
-config GENERIC_CMOS_UPDATE
-        bool
-        default y
-
-config GENERIC_CLOCKEVENTS
-        bool
-        default y
-
-config GENERIC_GPIO
-        bool
-        help
-          Generic GPIO API support
-
-config 64BIT
-        def_bool y
-
-config MMU
-        bool
-        default y
-
-config IOMMU_HELPER
-        bool
-        default y
-
-config QUICKLIST
-        bool
-        default y
-
-config STACKTRACE_SUPPORT
-        bool
-        default y
-
-config LOCKDEP_SUPPORT
-        bool
-        default y
-
-config ARCH_MAY_HAVE_PC_FDC
-        bool
-        default y
-
-config ARCH_HAS_ILOG2_U32
-        bool
-        default n
-
-config ARCH_HAS_ILOG2_U64
-        bool
-        default n
-
-config AUDIT_ARCH
-        bool
-        default y
-
-config HAVE_SETUP_PER_CPU_AREA
-        def_bool y
-
-config ARCH_NO_VIRT_TO_BUS
-        def_bool y
-
-config OF
-        def_bool y
-
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        bool
-        def_bool y
-
-source "init/Kconfig"
-source "kernel/Kconfig.freezer"
-
-menu "Processor type and features"
-
-choice
-        prompt "Kernel page size"
-        default SPARC64_PAGE_SIZE_8KB
-
-config SPARC64_PAGE_SIZE_8KB
-        bool "8KB"
-        help
-          This lets you select the page size of the kernel.
-
-          8KB and 64KB work quite well, since SPARC ELF sections
-          provide for up to 64KB alignment.
-
-          If you don't know what to do, choose 8KB.
-
-config SPARC64_PAGE_SIZE_64KB
-        bool "64KB"
-
-endchoice
-
-config SECCOMP
-        bool "Enable seccomp to safely compute untrusted bytecode"
-        depends on PROC_FS
-        default y
-        help
-          This kernel feature is useful for number crunching applications
-          that may need to compute untrusted bytecode during their
-          execution. By using pipes or other transports made available to
-          the process as file descriptors supporting the read/write
-          syscalls, it's possible to isolate those applications in
-          their own address space using seccomp. Once seccomp is
-          enabled via /proc/<pid>/seccomp, it cannot be disabled
-          and the task is only allowed to execute a few safe syscalls
-          defined by each seccomp mode.
-
-          If unsure, say Y. Only embedded should say N here.
-
-source kernel/Kconfig.hz
-
-config HOTPLUG_CPU
-        bool "Support for hot-pluggable CPUs"
-        depends on SMP
-        select HOTPLUG
-        help
-          Say Y here to experiment with turning CPUs off and on.  CPUs
-          can be controlled through /sys/devices/system/cpu/cpu#.
-          Say N if you want to disable CPU hotplug.
-
-config GENERIC_HARDIRQS
-        bool
-        default y
-
-source "kernel/time/Kconfig"
-
-config SMP
-        bool "Symmetric multi-processing support"
-        help
-          This enables support for systems with more than one CPU. If you have
-          a system with only one CPU, say N. If you have a system with more than
-          one CPU, say Y.
-
-          If you say N here, the kernel will run on single and multiprocessor
-          machines, but will use only one CPU of a multiprocessor machine. If
-          you say Y here, the kernel will run on single-processor machines.
-          On a single-processor machine, the kernel will run faster if you say
-          N here.
-
-          If you don't know what to do here, say N.
-
-config NR_CPUS
-        int "Maximum number of CPUs (2-1024)"
-        range 2 1024
-        depends on SMP
-        default "64"
-
-source "drivers/cpufreq/Kconfig"
-
-config US3_FREQ
-        tristate "UltraSPARC-III CPU Frequency driver"
-        depends on CPU_FREQ
-        select CPU_FREQ_TABLE
-        help
-          This adds the CPUFreq driver for UltraSPARC-III processors.
-
-          For details, take a look at <file:Documentation/cpu-freq>.
-
-          If in doubt, say N.
-
-config US2E_FREQ
-        tristate "UltraSPARC-IIe CPU Frequency driver"
-        depends on CPU_FREQ
-        select CPU_FREQ_TABLE
-        help
-          This adds the CPUFreq driver for UltraSPARC-IIe processors.
-
-          For details, take a look at <file:Documentation/cpu-freq>.
-
-          If in doubt, say N.
-
-config US3_MC
-        tristate "UltraSPARC-III Memory Controller driver"
-        default y
-        help
-          This adds a driver for the UltraSPARC-III memory controller.
-          Loading this driver allows exact mnemonic strings to be
-          printed in the event of a memory error, so that the faulty DIMM
-          on the motherboard can be matched to the error.
-
-          If in doubt, say Y, as this information can be very useful.
-
-# Global things across all Sun machines.
-config GENERIC_LOCKBREAK
-        bool
-        default y
-        depends on SMP && PREEMPT
-
-config RWSEM_GENERIC_SPINLOCK
-        bool
-
-config RWSEM_XCHGADD_ALGORITHM
-        bool
-        default y
-
-config GENERIC_FIND_NEXT_BIT
-        bool
-        default y
-
-config GENERIC_HWEIGHT
-        bool
-        default y if !ULTRA_HAS_POPULATION_COUNT
-
-config GENERIC_CALIBRATE_DELAY
-        bool
-        default y
-
-choice
-        prompt "SPARC64 Huge TLB Page Size"
-        depends on HUGETLB_PAGE
-        default HUGETLB_PAGE_SIZE_4MB
-
-config HUGETLB_PAGE_SIZE_4MB
-        bool "4MB"
-
-config HUGETLB_PAGE_SIZE_512K
-        bool "512K"
-
-config HUGETLB_PAGE_SIZE_64K
-        depends on !SPARC64_PAGE_SIZE_64KB
-        bool "64K"
-
-endchoice
-
-endmenu
-
-config NUMA
-        bool "NUMA support"
-        depends on SMP
-
-config NODES_SHIFT
-        int
-        default "4"
-        depends on NEED_MULTIPLE_NODES
-
-# Some NUMA nodes have memory ranges that span
-# other nodes.  Even though a pfn is valid and
-# between a node's start and end pfns, it may not
-# reside on that node.  See memmap_init_zone()
-# for details.
-config NODES_SPAN_OTHER_NODES
-        def_bool y
-        depends on NEED_MULTIPLE_NODES
-
-config ARCH_POPULATES_NODE_MAP
-        def_bool y
-
-config ARCH_SELECT_MEMORY_MODEL
-        def_bool y
-
-config ARCH_SPARSEMEM_ENABLE
-        def_bool y
-        select SPARSEMEM_VMEMMAP_ENABLE
-
-config ARCH_SPARSEMEM_DEFAULT
-        def_bool y
-
-source "mm/Kconfig"
-
-config ISA
-        bool
-
-config ISAPNP
-        bool
-
-config EISA
-        bool
-
-config MCA
-        bool
-
-config PCMCIA
-        tristate
-        help
-          Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
-          computer.  These are credit-card size devices such as network cards,
-          modems or hard drives often used with laptops computers.  There are
-          actually two varieties of these cards: the older 16 bit PCMCIA cards
-          and the newer 32 bit CardBus cards.  If you want to use CardBus
-          cards, you need to say Y here and also to "CardBus support" below.
-
-          To use your PC-cards, you will need supporting software from David
-          Hinds' pcmcia-cs package (see the file <file:Documentation/Changes>
-          for location).  Please also read the PCMCIA-HOWTO, available from
-          <http://www.tldp.org/docs.html#howto>.
-
-          To compile this driver as modules, choose M here: the
-          modules will be called pcmcia_core and ds.
-
-config SBUS
-        bool
-        default y
-
-config SBUSCHAR
-        bool
-        default y
-
-config SUN_AUXIO
-        bool
-        default y
-
-config SUN_IO
-        bool
-        default y
-
-config SUN_LDOMS
-        bool "Sun Logical Domains support"
-        help
-          Say Y here is you want to support virtual devices via
-          Logical Domains.
-
-config PCI
-        bool "PCI support"
-        select ARCH_SUPPORTS_MSI
-        help
-          Find out whether your system includes a PCI bus. PCI is the name of
-          a bus system, i.e. the way the CPU talks to the other stuff inside
-          your box.  If you say Y here, the kernel will include drivers and
-          infrastructure code to support PCI bus devices.
-
-config PCI_DOMAINS
-        def_bool PCI
-
-config PCI_SYSCALL
-        def_bool PCI
-
-source "drivers/pci/Kconfig"
-
-config SUN_OPENPROMFS
-        tristate "Openprom tree appears in /proc/openprom"
-        help
-          If you say Y, the OpenPROM device tree will be available as a
-          virtual file system, which you can mount to /proc/openprom by "mount
-          -t openpromfs none /proc/openprom".
-
-          To compile the /proc/openprom support as a module, choose M here: the
-          module will be called openpromfs.  If unsure, choose M.
-
-menu "Executable file formats"
-
-source "fs/Kconfig.binfmt"
-
-config COMPAT
-        bool
-        default y
-        select COMPAT_BINFMT_ELF
-
-config SYSVIPC_COMPAT
-        bool
-        depends on COMPAT && SYSVIPC
-        default y
-
-endmenu
-
-config SCHED_SMT
-        bool "SMT (Hyperthreading) scheduler support"
-        depends on SMP
-        default y
-        help
-          SMT scheduler support improves the CPU scheduler's decision making
-          when dealing with SPARC cpus at a cost of slightly increased overhead
-          in some places. If unsure say N here.
-
-config SCHED_MC
-        bool "Multi-core scheduler support"
-        depends on SMP
-        default y
-        help
-          Multi-core scheduler support improves the CPU scheduler's decision
-          making when dealing with multi-core CPU chips at a cost of slightly
-          increased overhead in some places. If unsure say N here.
-
-source "kernel/Kconfig.preempt"
-
-config CMDLINE_BOOL
-        bool "Default bootloader kernel arguments"
-
-config CMDLINE
-        string "Initial kernel command string"
-        depends on CMDLINE_BOOL
-        default "console=ttyS0,9600 root=/dev/sda1"
-        help
-          Say Y here if you want to be able to pass default arguments to
-          the kernel. This will be overridden by the bootloader, if you
-          use one (such as SILO). This is most useful if you want to boot
-          a kernel from TFTP, and want default options to be available
-          with having them passed on the command line.
-
-          NOTE: This option WILL override the PROM bootargs setting!
-
-source "net/Kconfig"
-
-source "drivers/Kconfig"
-
-source "drivers/sbus/char/Kconfig"
-
-source "fs/Kconfig"
-
-source "arch/sparc64/Kconfig.debug"
-
-source "security/Kconfig"
-
-source "crypto/Kconfig"
-
-source "lib/Kconfig"
diff --git a/arch/sparc64/Kconfig.debug b/arch/sparc64/Kconfig.debug
deleted file mode 100644
index c40515c06690..000000000000
--- a/arch/sparc64/Kconfig.debug
+++ /dev/null
@@ -1,44 +0,0 @@
-menu "Kernel hacking"
-
-config TRACE_IRQFLAGS_SUPPORT
-        bool
-        default y
-
-source "lib/Kconfig.debug"
-
-config DEBUG_STACK_USAGE
-        bool "Enable stack utilization instrumentation"
-        depends on DEBUG_KERNEL
-        help
-          Enables the display of the minimum amount of free stack which each
-          task has ever had available in the sysrq-T and sysrq-P debug output.
-
-          This option will slow down process creation somewhat.
-
-config DEBUG_DCFLUSH
-        bool "D-cache flush debugging"
-        depends on DEBUG_KERNEL
-
-config STACK_DEBUG
-        depends on DEBUG_KERNEL
-        bool "Stack Overflow Detection Support"
-
-config DEBUG_PAGEALLOC
-        bool "Debug page memory allocations"
-        depends on DEBUG_KERNEL && !HIBERNATION
-        help
-          Unmap pages from the kernel linear mapping after free_pages().
-          This results in a large slowdown, but helps to find certain types
-          of memory corruptions.
-
-config MCOUNT
-        bool
-        depends on STACK_DEBUG || FUNCTION_TRACER
-        default y
-
-config FRAME_POINTER
-        bool
-        depends on MCOUNT
-        default y
-
-endmenu
diff --git a/arch/sparc64/Makefile b/arch/sparc64/Makefile
deleted file mode 100644
index c7214abc0d84..000000000000
--- a/arch/sparc64/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-# sparc64/Makefile
-#
-# Makefile for the architecture dependent flags and dependencies on the
-# 64-bit Sparc.
-#
-# Copyright (C) 1996,1998 David S. Miller (davem@caip.rutgers.edu)
-# Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
-#
-
-CHECKFLAGS      += -D__sparc__ -D__sparc_v9__ -D__arch64__ -m64
-
-# Undefine sparc when processing vmlinux.lds - it is used
-# And teach CPP we are doing 64 bit builds (for this case)
-CPPFLAGS_vmlinux.lds += -m64 -Usparc
-
-LDFLAGS         := -m elf64_sparc
-
-KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow \
-        -ffixed-g4 -ffixed-g5 -fcall-used-g7 -Wno-sign-compare \
-        -Wa,--undeclared-regs
-KBUILD_CFLAGS += $(call cc-option,-mtune=ultrasparc3)
-KBUILD_AFLAGS += -m64 -mcpu=ultrasparc -Wa,--undeclared-regs
-
-ifeq ($(CONFIG_MCOUNT),y)
-  KBUILD_CFLAGS += -pg
-endif
-
-head-y := arch/sparc64/kernel/head.o arch/sparc64/kernel/init_task.o
-
-core-y                          += arch/sparc64/kernel/ arch/sparc64/mm/
-core-y                          += arch/sparc64/math-emu/
-libs-y                          += arch/sparc64/prom/ arch/sparc64/lib/
-drivers-$(CONFIG_OPROFILE)      += arch/sparc64/oprofile/
-
-boot := arch/sparc64/boot
-
-image tftpboot.img vmlinux.aout: vmlinux
-        $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
-
-archclean:
-        $(Q)$(MAKE) $(clean)=$(boot)
-
-define archhelp
-  echo  '* vmlinux       - Standard sparc64 kernel'
-  echo  '  vmlinux.aout  - a.out kernel for sparc64'
-  echo  '  tftpboot.img  - Image prepared for tftp'
-endef
-
diff --git a/arch/sparc64/boot/Makefile b/arch/sparc64/boot/Makefile
deleted file mode 100644
index 0458b5244f09..000000000000
--- a/arch/sparc64/boot/Makefile
+++ /dev/null
@@ -1,33 +0,0 @@
-# Makefile for the Sparc64 boot stuff.
-#
-# Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
-# Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
-
-ROOT_IMG        := /usr/src/root.img
-ELFTOAOUT       := elftoaout
-
-hostprogs-y     := piggyback
-targets         := image tftpboot.img vmlinux.aout
-
-quiet_cmd_elftoaout = ELF2AOUT $@
-      cmd_elftoaout = $(ELFTOAOUT) vmlinux -o $@
-quiet_cmd_piggy     = PIGGY   $@
-      cmd_piggy     = $(obj)/piggyback $@ System.map $(ROOT_IMG)
-quiet_cmd_strip     = STRIP   $@
-      cmd_strip     = $(STRIP) -R .comment -R .note -K sun4u_init -K _end -K _start vmlinux -o $@
-
-
-# Actual linking
-$(obj)/image: vmlinux FORCE
-        $(call if_changed,strip)
-        @echo '  kernel: $@ is ready'
-
-$(obj)/tftpboot.img: vmlinux $(obj)/piggyback System.map $(ROOT_IMG) FORCE
-        $(call if_changed,elftoaout)
-        $(call if_changed,piggy)
-        @echo '  kernel: $@ is ready'
-
-$(obj)/vmlinux.aout: vmlinux FORCE
-        $(call if_changed,elftoaout)
-        @echo '  kernel: $@ is ready'
-
diff --git a/arch/sparc64/kernel/Makefile b/arch/sparc64/kernel/Makefile
deleted file mode 100644
index b3e0b986bef8..000000000000
--- a/arch/sparc64/kernel/Makefile
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-EXTRA_AFLAGS := -ansi
-EXTRA_CFLAGS := -Werror
-
-CFLAGS_REMOVE_ftrace.o = -pg
-
-extra-y         := head.o init_task.o vmlinux.lds
-
-obj-y           := process.o setup.o cpu.o idprom.o reboot.o \
-                   traps.o auxio.o una_asm.o sysfs.o iommu.o \
-                   irq.o ptrace.o time.o sys_sparc.o signal.o \
-                   unaligned.o central.o starfire.o \
-                   power.o sbus.o sparc64_ksyms.o ebus.o \
-                   visemul.o prom.o of_device.o hvapi.o sstate.o mdesc.o
-
-obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
-obj-$(CONFIG_STACKTRACE) += stacktrace.o
-obj-$(CONFIG_PCI)        += pci.o pci_common.o psycho_common.o \
-                            pci_psycho.o pci_sabre.o pci_schizo.o \
-                            pci_sun4v.o pci_sun4v_asm.o pci_fire.o
-obj-$(CONFIG_PCI_MSI)   += pci_msi.o
-obj-$(CONFIG_SMP)        += smp.o trampoline.o hvtramp.o
-obj-$(CONFIG_COMPAT) += sys32.o sys_sparc32.o signal32.o
-obj-$(CONFIG_MODULES) += module.o
-obj-$(CONFIG_US3_FREQ) += us3_cpufreq.o
-obj-$(CONFIG_US2E_FREQ) += us2e_cpufreq.o
-obj-$(CONFIG_US3_MC) += chmc.o
-obj-$(CONFIG_KPROBES) += kprobes.o
-obj-$(CONFIG_SUN_LDOMS) += ldc.o vio.o viohs.o ds.o
-obj-$(CONFIG_AUDIT) += audit.o
-obj-$(CONFIG_AUDIT)$(CONFIG_COMPAT) += compat_audit.o
-obj-y += $(obj-yy)
-obj-$(CONFIG_KGDB) += kgdb.o
diff --git a/arch/sparc64/kernel/asm-offsets.c b/arch/sparc64/kernel/asm-offsets.c
deleted file mode 100644
index 9e263112a6e2..000000000000
--- a/arch/sparc64/kernel/asm-offsets.c
+++ /dev/null
@@ -1 +0,0 @@
-/* Dummy asm-offsets.c file. Required by kbuild and ready to be used - hint! */
diff --git a/arch/sparc64/kernel/cpu.c b/arch/sparc64/kernel/cpu.c
deleted file mode 100644
index 0c9ac83ed0a8..000000000000
--- a/arch/sparc64/kernel/cpu.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/* cpu.c: Dinky routines to look for the kind of Sparc cpu
- *        we are on.
- *
- * Copyright (C) 1996, 2007, 2008 David S. Miller (davem@davemloft.net)
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <asm/asi.h>
-#include <asm/system.h>
-#include <asm/fpumacro.h>
-#include <asm/cpudata.h>
-#include <asm/spitfire.h>
-#include <asm/oplib.h>
-
-#include "entry.h"
-
-DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
-
-struct cpu_chip_info {
-        unsigned short  manuf;
-        unsigned short  impl;
-        const char      *cpu_name;
-        const char      *fp_name;
-};
-
-static const struct cpu_chip_info cpu_chips[] = {
-        {
-                .manuf          = 0x17,
-                .impl           = 0x10,
-                .cpu_name       = "TI UltraSparc I   (SpitFire)",
-                .fp_name        = "UltraSparc I integrated FPU",
-        },
-        {
-                .manuf          = 0x22,
-                .impl           = 0x10,
-                .cpu_name       = "TI UltraSparc I   (SpitFire)",
-                .fp_name        = "UltraSparc I integrated FPU",
-        },
-        {
-                .manuf          = 0x17,
-                .impl           = 0x11,
-                .cpu_name       = "TI UltraSparc II  (BlackBird)",
-                .fp_name        = "UltraSparc II integrated FPU",
-        },
-        {
-                .manuf          = 0x17,
-                .impl           = 0x12,
-                .cpu_name       = "TI UltraSparc IIi (Sabre)",
-                .fp_name        = "UltraSparc IIi integrated FPU",
-        },
-        {
-                .manuf          = 0x17,
-                .impl           = 0x13,
-                .cpu_name       = "TI UltraSparc IIe (Hummingbird)",
-                .fp_name        = "UltraSparc IIe integrated FPU",
-        },
-        {
-                .manuf          = 0x3e,
-                .impl           = 0x14,
-                .cpu_name       = "TI UltraSparc III (Cheetah)",
-                .fp_name        = "UltraSparc III integrated FPU",
-        },
-        {
-                .manuf          = 0x3e,
-                .impl           = 0x15,
-                .cpu_name       = "TI UltraSparc III+ (Cheetah+)",
-                .fp_name        = "UltraSparc III+ integrated FPU",
-        },
-        {
-                .manuf          = 0x3e,
-                .impl           = 0x16,
-                .cpu_name       = "TI UltraSparc IIIi (Jalapeno)",
-                .fp_name        = "UltraSparc IIIi integrated FPU",
-        },
-        {
-                .manuf          = 0x3e,
-                .impl           = 0x18,
-                .cpu_name       = "TI UltraSparc IV (Jaguar)",
-                .fp_name        = "UltraSparc IV integrated FPU",
-        },
-        {
-                .manuf          = 0x3e,
-                .impl           = 0x19,
-                .cpu_name       = "TI UltraSparc IV+ (Panther)",
-                .fp_name        = "UltraSparc IV+ integrated FPU",
-        },
-        {
-                .manuf          = 0x3e,
-                .impl           = 0x22,
-                .cpu_name       = "TI UltraSparc IIIi+ (Serrano)",
-                .fp_name        = "UltraSparc IIIi+ integrated FPU",
-        },
-};
-
-#define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips)
-
-const char *sparc_cpu_type;
-const char *sparc_fpu_type;
-
-static void __init sun4v_cpu_probe(void)
-{
-        switch (sun4v_chip_type) {
-        case SUN4V_CHIP_NIAGARA1:
-                sparc_cpu_type = "UltraSparc T1 (Niagara)";
-                sparc_fpu_type = "UltraSparc T1 integrated FPU";
-                break;
-
-        case SUN4V_CHIP_NIAGARA2:
-                sparc_cpu_type = "UltraSparc T2 (Niagara2)";
-                sparc_fpu_type = "UltraSparc T2 integrated FPU";
-                break;
-
-        default:
-                printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n",
-                       prom_cpu_compatible);
-                sparc_cpu_type = "Unknown SUN4V CPU";
-                sparc_fpu_type = "Unknown SUN4V FPU";
-                break;
-        }
-}
-
-static const struct cpu_chip_info * __init find_cpu_chip(unsigned short manuf,
-                                                         unsigned short impl)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(cpu_chips); i++) {
-                const struct cpu_chip_info *p = &cpu_chips[i];
-
-                if (p->manuf == manuf && p->impl == impl)
-                        return p;
-        }
-        return NULL;
-}
-
-static int __init cpu_type_probe(void)
-{
-        if (tlb_type == hypervisor) {
-                sun4v_cpu_probe();
-        } else {
-                unsigned long ver, manuf, impl;
-                const struct cpu_chip_info *p;
-        
-                __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
-        
-                manuf = ((ver >> 48) & 0xffff);
-                impl = ((ver >> 32) & 0xffff);
-
-                p = find_cpu_chip(manuf, impl);
-                if (p) {
-                        sparc_cpu_type = p->cpu_name;
-                        sparc_fpu_type = p->fp_name;
-                } else {
-                        printk(KERN_ERR "CPU: Unknown chip, manuf[%lx] impl[%lx]\n",
-                               manuf, impl);
-                        sparc_cpu_type = "Unknown CPU";
-                        sparc_fpu_type = "Unknown FPU";
-                }
-        }
-        return 0;
-}
-
-arch_initcall(cpu_type_probe);
diff --git a/arch/sparc64/kernel/idprom.c b/arch/sparc64/kernel/idprom.c
deleted file mode 100644
index 5b45a808c621..000000000000
--- a/arch/sparc64/kernel/idprom.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * idprom.c: Routines to load the idprom into kernel addresses and
- *           interpret the data contained within.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-
-#include <asm/oplib.h>
-#include <asm/idprom.h>
-
-struct idprom *idprom;
-static struct idprom idprom_buffer;
-
-/* Calculate the IDPROM checksum (xor of the data bytes). */
-static unsigned char __init calc_idprom_cksum(struct idprom *idprom)
-{
-        unsigned char cksum, i, *ptr = (unsigned char *)idprom;
-
-        for (i = cksum = 0; i <= 0x0E; i++)
-                cksum ^= *ptr++;
-
-        return cksum;
-}
-
-/* Create a local IDPROM copy and verify integrity. */
-void __init idprom_init(void)
-{
-        prom_get_idprom((char *) &idprom_buffer, sizeof(idprom_buffer));
-
-        idprom = &idprom_buffer;
-
-        if (idprom->id_format != 0x01)  {
-                prom_printf("IDPROM: Warning, unknown format type!\n");
-        }
-
-        if (idprom->id_cksum != calc_idprom_cksum(idprom)) {
-                prom_printf("IDPROM: Warning, checksum failure (nvram=%x, calc=%x)!\n",
-                            idprom->id_cksum, calc_idprom_cksum(idprom));
-        }
-
-        printk("Ethernet address: %02x:%02x:%02x:%02x:%02x:%02x\n",
-               idprom->id_ethaddr[0], idprom->id_ethaddr[1],
-               idprom->id_ethaddr[2], idprom->id_ethaddr[3],
-               idprom->id_ethaddr[4], idprom->id_ethaddr[5]);
-}
diff --git a/arch/sparc64/kernel/init_task.c b/arch/sparc64/kernel/init_task.c
deleted file mode 100644
index d2b312381c19..000000000000
--- a/arch/sparc64/kernel/init_task.c
+++ /dev/null
@@ -1,35 +0,0 @@
-#include <linux/mm.h>
-#include <linux/fs.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/init_task.h>
-#include <linux/mqueue.h>
-
-#include <asm/pgtable.h>
-#include <asm/uaccess.h>
-#include <asm/processor.h>
-
-static struct fs_struct init_fs = INIT_FS;
-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
-struct mm_struct init_mm = INIT_MM(init_mm);
-
-EXPORT_SYMBOL(init_mm);
-
-/* .text section in head.S is aligned at 2 page boundary and this gets linked
- * right after that so that the init_thread_union is aligned properly as well.
- * We really don't need this special alignment like the Intel does, but
- * I do it anyways for completeness.
- */
-__asm__ (".text");
-union thread_union init_thread_union = { INIT_THREAD_INFO(init_task) };
-
-/*
- * Initial task structure.
- *
- * All other task structs will be allocated on slabs in fork.c
- */
-EXPORT_SYMBOL(init_task);
-
-__asm__(".data");
-struct task_struct init_task = INIT_TASK(init_task);
diff --git a/arch/sparc64/kernel/module.c b/arch/sparc64/kernel/module.c
deleted file mode 100644
index 158484bf5999..000000000000
--- a/arch/sparc64/kernel/module.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/* Kernel module help for sparc64.
- *
- * Copyright (C) 2001 Rusty Russell.
- * Copyright (C) 2002 David S. Miller.
- */
-
-#include <linux/moduleloader.h>
-#include <linux/kernel.h>
-#include <linux/elf.h>
-#include <linux/vmalloc.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-
-#include <asm/processor.h>
-#include <asm/spitfire.h>
-
-static void *module_map(unsigned long size)
-{
-        struct vm_struct *area;
-
-        size = PAGE_ALIGN(size);
-        if (!size || size > MODULES_LEN)
-                return NULL;
-
-        area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END);
-        if (!area)
-                return NULL;
-
-        return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL);
-}
-
-void *module_alloc(unsigned long size)
-{
-        void *ret;
-
-        /* We handle the zero case fine, unlike vmalloc */
-        if (size == 0)
-                return NULL;
-
-        ret = module_map(size);
-        if (!ret)
-                ret = ERR_PTR(-ENOMEM);
-        else
-                memset(ret, 0, size);
-
-        return ret;
-}
-
-/* Free memory returned from module_core_alloc/module_init_alloc */
-void module_free(struct module *mod, void *module_region)
-{
-        vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
-}
-
-/* Make generic code ignore STT_REGISTER dummy undefined symbols.  */
-int module_frob_arch_sections(Elf_Ehdr *hdr,
-                              Elf_Shdr *sechdrs,
-                              char *secstrings,
-                              struct module *mod)
-{
-        unsigned int symidx;
-        Elf64_Sym *sym;
-        const char *strtab;
-        int i;
-
-        for (symidx = 0; sechdrs[symidx].sh_type != SHT_SYMTAB; symidx++) {
-                if (symidx == hdr->e_shnum-1) {
-                        printk("%s: no symtab found.\n", mod->name);
-                        return -ENOEXEC;
-                }
-        }
-        sym = (Elf64_Sym *)sechdrs[symidx].sh_addr;
-        strtab = (char *)sechdrs[sechdrs[symidx].sh_link].sh_addr;
-
-        for (i = 1; i < sechdrs[symidx].sh_size / sizeof(Elf_Sym); i++) {
-                if (sym[i].st_shndx == SHN_UNDEF &&
-                    ELF64_ST_TYPE(sym[i].st_info) == STT_REGISTER)
-                        sym[i].st_shndx = SHN_ABS;
-        }
-        return 0;
-}
-
-int apply_relocate(Elf64_Shdr *sechdrs,
-                   const char *strtab,
-                   unsigned int symindex,
-                   unsigned int relsec,
-                   struct module *me)
-{
-        printk(KERN_ERR "module %s: non-ADD RELOCATION unsupported\n",
-               me->name);
-        return -ENOEXEC;
-}
-
-int apply_relocate_add(Elf64_Shdr *sechdrs,
-                       const char *strtab,
-                       unsigned int symindex,
-                       unsigned int relsec,
-                       struct module *me)
-{
-        unsigned int i;
-        Elf64_Rela *rel = (void *)sechdrs[relsec].sh_addr;
-        Elf64_Sym *sym;
-        u8 *location;
-        u32 *loc32;
-
-        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
-                Elf64_Addr v;
-
-                /* This is where to make the change */
-                location = (u8 *)sechdrs[sechdrs[relsec].sh_info].sh_addr
-                        + rel[i].r_offset;
-                loc32 = (u32 *) location;
-
-                BUG_ON(((u64)location >> (u64)32) != (u64)0);
-
-                /* This is the symbol it is referring to.  Note that all
-                   undefined symbols have been resolved.  */
-                sym = (Elf64_Sym *)sechdrs[symindex].sh_addr
-                        + ELF64_R_SYM(rel[i].r_info);
-                v = sym->st_value + rel[i].r_addend;
-
-                switch (ELF64_R_TYPE(rel[i].r_info) & 0xff) {
-                case R_SPARC_64:
-                        location[0] = v >> 56;
-                        location[1] = v >> 48;
-                        location[2] = v >> 40;
-                        location[3] = v >> 32;
-                        location[4] = v >> 24;
-                        location[5] = v >> 16;
-                        location[6] = v >>  8;
-                        location[7] = v >>  0;
-                        break;
-
-                case R_SPARC_32:
-                        location[0] = v >> 24;
-                        location[1] = v >> 16;
-                        location[2] = v >>  8;
-                        location[3] = v >>  0;
-                        break;
-
-                case R_SPARC_DISP32:
-                        v -= (Elf64_Addr) location;
-                        *loc32 = v;
-                        break;
-
-                case R_SPARC_WDISP30:
-                        v -= (Elf64_Addr) location;
-                        *loc32 = (*loc32 & ~0x3fffffff) |
-                                ((v >> 2) & 0x3fffffff);
-                        break;
-
-                case R_SPARC_WDISP22:
-                        v -= (Elf64_Addr) location;
-                        *loc32 = (*loc32 & ~0x3fffff) |
-                                ((v >> 2) & 0x3fffff);
-                        break;
-
-                case R_SPARC_WDISP19:
-                        v -= (Elf64_Addr) location;
-                        *loc32 = (*loc32 & ~0x7ffff) |
-                                ((v >> 2) & 0x7ffff);
-                        break;
-
-                case R_SPARC_LO10:
-                        *loc32 = (*loc32 & ~0x3ff) | (v & 0x3ff);
-                        break;
-
-                case R_SPARC_HI22:
-                        *loc32 = (*loc32 & ~0x3fffff) |
-                                ((v >> 10) & 0x3fffff);
-                        break;
-
-                case R_SPARC_OLO10:
-                        *loc32 = (*loc32 & ~0x1fff) |
-                                (((v & 0x3ff) +
-                                  (ELF64_R_TYPE(rel[i].r_info) >> 8))
-                                 & 0x1fff);
-                        break;
-
-                default:
-                        printk(KERN_ERR "module %s: Unknown relocation: %x\n",
-                               me->name,
-                               (int) (ELF64_R_TYPE(rel[i].r_info) & 0xff));
-                        return -ENOEXEC;
-                };
-        }
-        return 0;
-}
-
-int module_finalize(const Elf_Ehdr *hdr,
-                    const Elf_Shdr *sechdrs,
-                    struct module *me)
-{
-        /* Cheetah's I-cache is fully coherent.  */
-        if (tlb_type == spitfire) {
-                unsigned long va;
-
-                flushw_all();
-                for (va =  0; va < (PAGE_SIZE << 1); va += 32)
-                        spitfire_put_icache_tag(va, 0x0);
-                __asm__ __volatile__("flush %g6");
-        }
-
-        return 0;
-}
-
-void module_arch_cleanup(struct module *mod)
-{
-}
diff --git a/arch/sparc64/kernel/vmlinux.lds.S b/arch/sparc64/kernel/vmlinux.lds.S
deleted file mode 100644
index 01f809617e5e..000000000000
--- a/arch/sparc64/kernel/vmlinux.lds.S
+++ /dev/null
@@ -1,147 +0,0 @@
-/* ld script to make UltraLinux kernel */
-
-#include <asm/page.h>
-#include <asm-generic/vmlinux.lds.h>
-
-OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
-OUTPUT_ARCH(sparc:v9a)
-ENTRY(_start)
-
-jiffies = jiffies_64;
-SECTIONS
-{
-        swapper_low_pmd_dir = 0x0000000000402000;
-        . = 0x4000;
-        .text 0x0000000000404000 : {
-                _text = .;
-                TEXT_TEXT
-                SCHED_TEXT
-                LOCK_TEXT
-                KPROBES_TEXT
-                *(.gnu.warning)
-        } = 0
-        _etext = .;
-        PROVIDE (etext = .);
-
-        RO_DATA(PAGE_SIZE)
-        .data : {
-                DATA_DATA
-                CONSTRUCTORS
-        }
-        .data1 : {
-                *(.data1)
-        }
-        . = ALIGN(64);
-        .data.cacheline_aligned : {
-                *(.data.cacheline_aligned)
-        }
-        . = ALIGN(64);
-        .data.read_mostly : {
-                *(.data.read_mostly)
-        }
-        _edata = .;
-        PROVIDE (edata = .);
-        .fixup : {
-                *(.fixup)
-        }
-        . = ALIGN(16);
-        __ex_table : {
-                __start___ex_table = .;
-                *(__ex_table)
-                __stop___ex_table = .;
-        }
-        NOTES
-
-        . = ALIGN(PAGE_SIZE);
-        .init.text : {
-                __init_begin = .;
-                _sinittext = .;
-                INIT_TEXT
-                _einittext = .;
-        }
-        .init.data : {
-                INIT_DATA
-        }
-        . = ALIGN(16);
-        .init.setup : {
-                __setup_start = .;
-                *(.init.setup)
-                __setup_end = .;
-        }
-        .initcall.init : {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
-        }
-        .con_initcall.init : {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
-        }
-        SECURITY_INIT
-
-        . = ALIGN(4);
-        .tsb_ldquad_phys_patch : {
-                __tsb_ldquad_phys_patch = .;
-                *(.tsb_ldquad_phys_patch)
-                __tsb_ldquad_phys_patch_end = .;
-        }
-
-        .tsb_phys_patch : {
-                __tsb_phys_patch = .;
-                *(.tsb_phys_patch)
-                __tsb_phys_patch_end = .;
-        }
-
-        .cpuid_patch : {
-                __cpuid_patch = .;
-                *(.cpuid_patch)
-                __cpuid_patch_end = .;
-        }
-
-        .sun4v_1insn_patch : {
-                __sun4v_1insn_patch = .;
-                *(.sun4v_1insn_patch)
-                __sun4v_1insn_patch_end = .;
-        }
-        .sun4v_2insn_patch : {
-                __sun4v_2insn_patch = .;
-                *(.sun4v_2insn_patch)
-                __sun4v_2insn_patch_end = .;
-        }
-
-#ifdef CONFIG_BLK_DEV_INITRD
-        . = ALIGN(PAGE_SIZE);
-        .init.ramfs : {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
-        }
-#endif
-
-        PERCPU(PAGE_SIZE)
-
-        . = ALIGN(PAGE_SIZE);
-        __init_end = .;
-        __bss_start = .;
-        .sbss : {
-                *(.sbss)
-                *(.scommon)
-        }
-        .bss : {
-                *(.dynbss)
-                *(.bss)
-                *(COMMON)
-        }
-        _end = . ;
-        PROVIDE (end = .);
-
-        /DISCARD/ : {
-                EXIT_TEXT
-                EXIT_DATA
-                *(.exitcall.exit)
-        }
-
-        STABS_DEBUG
-        DWARF_DEBUG
-}
diff --git a/arch/sparc64/lib/Makefile b/arch/sparc64/lib/Makefile
deleted file mode 100644
index f095e13910bc..000000000000
--- a/arch/sparc64/lib/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# Makefile for Sparc64 library files..
-#
-
-EXTRA_AFLAGS := -ansi
-EXTRA_CFLAGS := -Werror
-
-lib-y := PeeCeeI.o copy_page.o clear_page.o strlen.o strncmp.o \
-         memscan.o strncpy_from_user.o strlen_user.o memcmp.o checksum.o \
-         bzero.o csum_copy.o csum_copy_from_user.o csum_copy_to_user.o \
-         VISsave.o atomic.o bitops.o \
-         U1memcpy.o U1copy_from_user.o U1copy_to_user.o \
-         U3memcpy.o U3copy_from_user.o U3copy_to_user.o U3patch.o \
-         NGmemcpy.o NGcopy_from_user.o NGcopy_to_user.o NGpatch.o \
-         NGpage.o NGbzero.o \
-         NG2memcpy.o NG2copy_from_user.o NG2copy_to_user.o NG2patch.o \
-         NG2page.o \
-         GENmemcpy.o GENcopy_from_user.o GENcopy_to_user.o GENpatch.o \
-         GENpage.o GENbzero.o \
-         copy_in_user.o user_fixup.o memmove.o \
-         mcount.o ipcsum.o rwsem.o xor.o
-
-obj-y += iomap.o
diff --git a/arch/sparc64/lib/iomap.c b/arch/sparc64/lib/iomap.c
deleted file mode 100644
index 7120ebbd4d03..000000000000
--- a/arch/sparc64/lib/iomap.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Implement the sparc64 iomap interfaces
- */
-#include <linux/pci.h>
-#include <linux/module.h>
-#include <asm/io.h>
-
-/* Create a virtual mapping cookie for an IO port range */
-void __iomem *ioport_map(unsigned long port, unsigned int nr)
-{
-        return (void __iomem *) (unsigned long) port;
-}
-
-void ioport_unmap(void __iomem *addr)
-{
-        /* Nothing to do */
-}
-EXPORT_SYMBOL(ioport_map);
-EXPORT_SYMBOL(ioport_unmap);
-
-/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
-void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
-{
-        resource_size_t start = pci_resource_start(dev, bar);
-        resource_size_t len = pci_resource_len(dev, bar);
-        unsigned long flags = pci_resource_flags(dev, bar);
-
-        if (!len || !start)
-                return NULL;
-        if (maxlen && len > maxlen)
-                len = maxlen;
-        if (flags & IORESOURCE_IO)
-                return ioport_map(start, len);
-        if (flags & IORESOURCE_MEM) {
-                if (flags & IORESOURCE_CACHEABLE)
-                        return ioremap(start, len);
-                return ioremap_nocache(start, len);
-        }
-        /* What? */
-        return NULL;
-}
-
-void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
-{
-        /* nothing to do */
-}
-EXPORT_SYMBOL(pci_iomap);
-EXPORT_SYMBOL(pci_iounmap);
diff --git a/arch/sparc64/lib/memcmp.S b/arch/sparc64/lib/memcmp.S
deleted file mode 100644
index d3fdaa898566..000000000000
--- a/arch/sparc64/lib/memcmp.S
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Sparc64 optimized memcmp code.
- *
- * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- * Copyright (C) 2000 David S. Miller (davem@redhat.com)
- */
-
-        .text
-        .align  32
-        .globl  __memcmp, memcmp
-__memcmp:
-memcmp:
-        cmp     %o2, 0          ! IEU1  Group
-loop:   be,pn   %icc, ret_0     ! CTI
-         nop                    ! IEU0
-        ldub    [%o0], %g7      ! LSU   Group
-        ldub    [%o1], %g3      ! LSU   Group
-        sub     %o2, 1, %o2     ! IEU0
-        add     %o0, 1, %o0     ! IEU1
-        add     %o1, 1, %o1     ! IEU0  Group
-        subcc   %g7, %g3, %g3   ! IEU1  Group
-        be,pt   %icc, loop      ! CTI
-         cmp    %o2, 0          ! IEU1  Group
-
-ret_n0: retl
-         mov    %g3, %o0
-ret_0:  retl
-         mov    0, %o0
diff --git a/arch/sparc64/lib/strlen.S b/arch/sparc64/lib/strlen.S
deleted file mode 100644
index e9ba1920d818..000000000000
--- a/arch/sparc64/lib/strlen.S
+++ /dev/null
@@ -1,80 +0,0 @@
-/* strlen.S: Sparc64 optimized strlen code
- * Hand optimized from GNU libc's strlen
- * Copyright (C) 1991,1996 Free Software Foundation
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1996, 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- */
-
-#define LO_MAGIC 0x01010101
-#define HI_MAGIC 0x80808080
-
-        .align  32
-        .globl  strlen
-        .type   strlen,#function
-strlen:
-        mov     %o0, %o1
-        andcc   %o0, 3, %g0
-        be,pt   %icc, 9f
-         sethi  %hi(HI_MAGIC), %o4
-        ldub    [%o0], %o5
-        brz,pn  %o5, 11f
-         add    %o0, 1, %o0
-        andcc   %o0, 3, %g0
-        be,pn   %icc, 4f
-         or     %o4, %lo(HI_MAGIC), %o3
-        ldub    [%o0], %o5
-        brz,pn  %o5, 12f
-         add    %o0, 1, %o0
-        andcc   %o0, 3, %g0
-        be,pt   %icc, 5f
-         sethi  %hi(LO_MAGIC), %o4
-        ldub    [%o0], %o5
-        brz,pn  %o5, 13f
-         add    %o0, 1, %o0
-        ba,pt   %icc, 8f
-         or     %o4, %lo(LO_MAGIC), %o2
-9:
-        or      %o4, %lo(HI_MAGIC), %o3
-4:
-        sethi   %hi(LO_MAGIC), %o4
-5:
-        or      %o4, %lo(LO_MAGIC), %o2
-8:
-        ld      [%o0], %o5
-2:
-        sub     %o5, %o2, %o4
-        andcc   %o4, %o3, %g0
-        be,pt   %icc, 8b
-         add    %o0, 4, %o0
-
-        /* Check every byte. */
-        srl     %o5, 24, %g7
-        andcc   %g7, 0xff, %g0
-        be,pn   %icc, 1f
-         add    %o0, -4, %o4
-        srl     %o5, 16, %g7
-        andcc   %g7, 0xff, %g0
-        be,pn   %icc, 1f
-         add    %o4, 1, %o4
-        srl     %o5, 8, %g7
-        andcc   %g7, 0xff, %g0
-        be,pn   %icc, 1f
-         add    %o4, 1, %o4
-        andcc   %o5, 0xff, %g0
-        bne,a,pt %icc, 2b
-         ld     [%o0], %o5
-        add     %o4, 1, %o4
-1:
-        retl
-         sub    %o4, %o1, %o0
-11:
-        retl
-         mov    0, %o0
-12:
-        retl
-         mov    1, %o0
-13:
-        retl
-         mov    2, %o0
-
-        .size   strlen, .-strlen
diff --git a/arch/sparc64/math-emu/Makefile b/arch/sparc64/math-emu/Makefile
deleted file mode 100644
index cc5cb9baf6aa..000000000000
--- a/arch/sparc64/math-emu/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Makefile for the FPU instruction emulation.
-#
-
-obj-y    := math.o
-
-EXTRA_CFLAGS = -Iinclude/math-emu -w
diff --git a/arch/sparc64/mm/Makefile b/arch/sparc64/mm/Makefile
deleted file mode 100644
index 68d04c0370f4..000000000000
--- a/arch/sparc64/mm/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# Makefile for the linux Sparc64-specific parts of the memory manager.
-#
-
-EXTRA_AFLAGS := -ansi
-EXTRA_CFLAGS := -Werror
-
-obj-y    := ultra.o tlb.o tsb.o fault.o init.o generic.o
-
-obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
diff --git a/arch/sparc64/oprofile/Makefile b/arch/sparc64/oprofile/Makefile
deleted file mode 100644
index e9feca1ca28b..000000000000
--- a/arch/sparc64/oprofile/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-obj-$(CONFIG_OPROFILE) += oprofile.o
-
-DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
-                oprof.o cpu_buffer.o buffer_sync.o \
-                event_buffer.o oprofile_files.o \
-                oprofilefs.o oprofile_stats.o \
-                timer_int.o )
-
-oprofile-y                              := $(DRIVER_OBJS) init.o
diff --git a/arch/sparc64/oprofile/init.c b/arch/sparc64/oprofile/init.c
deleted file mode 100644
index 17bb6035069b..000000000000
--- a/arch/sparc64/oprofile/init.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/**
- * @file init.c
- *
- * @remark Copyright 2002 OProfile authors
- * @remark Read the file COPYING
- *
- * @author John Levon <levon@movementarian.org>
- */
-
-#include <linux/kernel.h>
-#include <linux/oprofile.h>
-#include <linux/errno.h>
-#include <linux/init.h>
- 
-int __init oprofile_arch_init(struct oprofile_operations *ops)
-{
-        return -ENODEV;
-}
-
-
-void oprofile_arch_exit(void)
-{
-}
diff --git a/arch/sparc64/prom/Makefile b/arch/sparc64/prom/Makefile
deleted file mode 100644
index 8c94483ca54d..000000000000
--- a/arch/sparc64/prom/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# Makefile for the Sun Boot PROM interface library under
-# Linux.
-#
-
-EXTRA_AFLAGS := -ansi
-EXTRA_CFLAGS := -Werror
-
-lib-y   := bootstr.o devops.o init.o misc.o \
-           tree.o console.o printf.o p1275.o cif.o
diff --git a/arch/sparc64/prom/printf.c b/arch/sparc64/prom/printf.c
deleted file mode 100644
index 660943ee4c2a..000000000000
--- a/arch/sparc64/prom/printf.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * printf.c:  Internal prom library printf facility.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com)
- *
- * We used to warn all over the code: DO NOT USE prom_printf(),
- * and yet people do. Anton's banking code was outputting banks
- * with prom_printf for most of the 2.4 lifetime. Since an effective
- * stick is not available, we deployed a carrot: an early printk
- * through PROM by means of -p boot option. This ought to fix it.
- * USE printk; if you need, deploy -p.
- */
-
-#include <linux/kernel.h>
-
-#include <asm/openprom.h>
-#include <asm/oplib.h>
-
-static char ppbuf[1024];
-
-void
-prom_write(const char *buf, unsigned int n)
-{
-        char ch;
-
-        while (n != 0) {
-                --n;
-                if ((ch = *buf++) == '\n')
-                        prom_putchar('\r');
-                prom_putchar(ch);
-        }
-}
-
-void
-prom_printf(const char *fmt, ...)
-{
-        va_list args;
-        int i;
-
-        va_start(args, fmt);
-        i = vscnprintf(ppbuf, sizeof(ppbuf), fmt, args);
-        va_end(args);
-
-        prom_write(ppbuf, i);
-}
diff --git a/arch/um/Makefile b/arch/um/Makefile
index d944c343acdb..0728def32234 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -22,10 +22,11 @@ MODE_INCLUDE	+= -I$(srctree)/$(ARCH_DIR)/include/shared/skas
 
 include $(srctree)/$(ARCH_DIR)/Makefile-skas
 
-ARCH_INCLUDE    := -I$(srctree)/$(ARCH_DIR)/include/shared
+SHARED_HEADERS  := $(ARCH_DIR)/include/shared
+ARCH_INCLUDE    := -I$(srctree)/$(SHARED_HEADERS)
 ARCH_INCLUDE    += -I$(srctree)/$(ARCH_DIR)/sys-$(SUBARCH)/shared
 ifneq ($(KBUILD_SRC),)
-ARCH_INCLUDE    += -I$(ARCH_DIR)/include/shared # for two generated files
+ARCH_INCLUDE    += -I$(SHARED_HEADERS)
 endif
 KBUILD_CPPFLAGS += -I$(srctree)/$(ARCH_DIR)/sys-$(SUBARCH)
 
@@ -85,8 +86,8 @@ endef
 
 KBUILD_KCONFIG := arch/um/Kconfig.$(HEADER_ARCH)
 
-archprepare: $(ARCH_DIR)/include/shared/user_constants.h
-prepare: $(ARCH_DIR)/include/shared/kern_constants.h
+archprepare: $(SHARED_HEADERS)/user_constants.h
+archprepare: $(SHARED_HEADERS)/kern_constants.h
 
 LINK-$(CONFIG_LD_SCRIPT_STATIC) += -static
 LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib
@@ -119,17 +120,13 @@ endef
 # When cleaning we don't include .config, so we don't include
 # TT or skas makefiles and don't clean skas_ptregs.h.
 CLEAN_FILES += linux x.i gmon.out \
-        $(ARCH_DIR)/include/shared/user_constants.h \
-        $(ARCH_DIR)/include/shared/kern_constants.h
+        $(SHARED_HEADERS)/user_constants.h \
+        $(SHARED_HEADERS)/kern_constants.h
 
 archclean:
         @find . \( -name '*.bb' -o -name '*.bbg' -o -name '*.da' \
                 -o -name '*.gcov' \) -type f -print | xargs rm -f
 
-$(objtree)/$(ARCH_DIR)/include/shared:
-        @echo '  MKDIR $@'
-        $(Q)mkdir -p $@
-
 # Generated files
 
 $(ARCH_DIR)/sys-$(SUBARCH)/user-offsets.s: FORCE
@@ -148,11 +145,11 @@ define filechk_gen-asm-offsets
          echo ""; )
 endef
 
-$(ARCH_DIR)/include/shared/user_constants.h: $(ARCH_DIR)/sys-$(SUBARCH)/user-offsets.s
+$(SHARED_HEADERS)/user_constants.h: $(ARCH_DIR)/sys-$(SUBARCH)/user-offsets.s
         $(call filechk,gen-asm-offsets)
 
-$(ARCH_DIR)/include/shared/kern_constants.h: $(objtree)/$(ARCH_DIR)/include/shared
-        @echo '  SYMLINK $@'
-        $(Q)ln -sf ../../../../include/asm/asm-offsets.h $@
+$(SHARED_HEADERS)/kern_constants.h:
+        $(Q)mkdir -p $(dir $@)
+        $(Q)echo '#include "../../../../include/asm/asm-offsets.h"' >$@
 
 export SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING OS HEADER_ARCH DEV_NULL_PATH
diff --git a/arch/um/drivers/daemon_kern.c b/arch/um/drivers/daemon_kern.c
index d53ff52bb404..b4a1522f2157 100644
--- a/arch/um/drivers/daemon_kern.c
+++ b/arch/um/drivers/daemon_kern.c
@@ -22,7 +22,7 @@ static void daemon_init(struct net_device *dev, void *data)
         struct daemon_data *dpri;
         struct daemon_init *init = data;
 
-        pri = dev->priv;
+        pri = netdev_priv(dev);
         dpri = (struct daemon_data *) pri->user;
         dpri->sock_type = init->sock_type;
         dpri->ctl_sock = init->ctl_sock;
diff --git a/arch/um/drivers/mcast_kern.c b/arch/um/drivers/mcast_kern.c
index 8c4378a76d63..ffc6416d5ed7 100644
--- a/arch/um/drivers/mcast_kern.c
+++ b/arch/um/drivers/mcast_kern.c
@@ -28,7 +28,7 @@ static void mcast_init(struct net_device *dev, void *data)
         struct mcast_data *dpri;
         struct mcast_init *init = data;
 
-        pri = dev->priv;
+        pri = netdev_priv(dev);
         dpri = (struct mcast_data *) pri->user;
         dpri->addr = init->addr;
         dpri->port = init->port;
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index 8f44ebb0dec8..e14629c87de4 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -161,7 +161,8 @@ void mconsole_proc(struct mc_request *req)
                 goto out_kill;
         }
 
-        file = dentry_open(nd.path.dentry, nd.path.mnt, O_RDONLY);
+        file = dentry_open(nd.path.dentry, nd.path.mnt, O_RDONLY,
+                           current_cred());
         if (IS_ERR(file)) {
                 mconsole_reply(req, "Failed to open file", 1, 0);
                 goto out_kill;
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index 5b4ca8d93682..fde510b664d3 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -76,7 +76,7 @@ out:
 
 static int uml_net_rx(struct net_device *dev)
 {
-        struct uml_net_private *lp = dev->priv;
+        struct uml_net_private *lp = netdev_priv(dev);
         int pkt_len;
         struct sk_buff *skb;
 
@@ -119,7 +119,7 @@ static void uml_dev_close(struct work_struct *work)
 static irqreturn_t uml_net_interrupt(int irq, void *dev_id)
 {
         struct net_device *dev = dev_id;
-        struct uml_net_private *lp = dev->priv;
+        struct uml_net_private *lp = netdev_priv(dev);
         int err;
 
         if (!netif_running(dev))
@@ -150,7 +150,7 @@ out:
 
 static int uml_net_open(struct net_device *dev)
 {
-        struct uml_net_private *lp = dev->priv;
+        struct uml_net_private *lp = netdev_priv(dev);
         int err;
 
         if (lp->fd >= 0) {
@@ -195,7 +195,7 @@ out:
 
 static int uml_net_close(struct net_device *dev)
 {
-        struct uml_net_private *lp = dev->priv;
+        struct uml_net_private *lp = netdev_priv(dev);
 
         netif_stop_queue(dev);
 
@@ -213,7 +213,7 @@ static int uml_net_close(struct net_device *dev)
 
 static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
-        struct uml_net_private *lp = dev->priv;
+        struct uml_net_private *lp = netdev_priv(dev);
         unsigned long flags;
         int len;
 
@@ -250,7 +250,7 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
 
 static struct net_device_stats *uml_net_get_stats(struct net_device *dev)
 {
-        struct uml_net_private *lp = dev->priv;
+        struct uml_net_private *lp = netdev_priv(dev);
         return &lp->stats;
 }
 
@@ -267,7 +267,7 @@ static void uml_net_tx_timeout(struct net_device *dev)
 
 static int uml_net_set_mac(struct net_device *dev, void *addr)
 {
-        struct uml_net_private *lp = dev->priv;
+        struct uml_net_private *lp = netdev_priv(dev);
         struct sockaddr *hwaddr = addr;
 
         spin_lock_irq(&lp->lock);
@@ -368,7 +368,7 @@ static void net_device_release(struct device *dev)
 {
         struct uml_net *device = dev->driver_data;
         struct net_device *netdev = device->dev;
-        struct uml_net_private *lp = netdev->priv;
+        struct uml_net_private *lp = netdev_priv(netdev);
 
         if (lp->remove != NULL)
                 (*lp->remove)(&lp->user);
@@ -418,14 +418,9 @@ static void eth_configure(int n, void *init, char *mac,
 
         setup_etheraddr(mac, device->mac, dev->name);
 
-        printk(KERN_INFO "Netdevice %d ", n);
-        printk("(%02x:%02x:%02x:%02x:%02x:%02x) ",
-               device->mac[0], device->mac[1],
-               device->mac[2], device->mac[3],
-               device->mac[4], device->mac[5]);
-        printk(": ");
+        printk(KERN_INFO "Netdevice %d (%pM) : ", n, device->mac);
 
-        lp = dev->priv;
+        lp = netdev_priv(dev);
         /* This points to the transport private data. It's still clear, but we
          * must memset it to 0 *now*. Let's help the drivers. */
         memset(lp, 0, size);
@@ -735,7 +730,7 @@ static int net_remove(int n, char **error_out)
                 return -ENODEV;
 
         dev = device->dev;
-        lp = dev->priv;
+        lp = netdev_priv(dev);
         if (lp->fd > 0)
                 return -EBUSY;
         unregister_netdev(dev);
@@ -766,7 +761,7 @@ static int uml_inetaddr_event(struct notifier_block *this, unsigned long event,
         if (dev->open != uml_net_open)
                 return NOTIFY_DONE;
 
-        lp = dev->priv;
+        lp = netdev_priv(dev);
 
         proc = NULL;
         switch (event) {
diff --git a/arch/um/drivers/pcap_kern.c b/arch/um/drivers/pcap_kern.c
index 3a750dd39be1..2860525f8ff6 100644
--- a/arch/um/drivers/pcap_kern.c
+++ b/arch/um/drivers/pcap_kern.c
@@ -21,7 +21,7 @@ void pcap_init(struct net_device *dev, void *data)
         struct pcap_data *ppri;
         struct pcap_init *init = data;
 
-        pri = dev->priv;
+        pri = netdev_priv(dev);
         ppri = (struct pcap_data *) pri->user;
         ppri->host_if = init->host_if;
         ppri->promisc = init->promisc;
diff --git a/arch/um/drivers/slip_kern.c b/arch/um/drivers/slip_kern.c
index d19faec7046e..5ec17563142e 100644
--- a/arch/um/drivers/slip_kern.c
+++ b/arch/um/drivers/slip_kern.c
@@ -19,7 +19,7 @@ static void slip_init(struct net_device *dev, void *data)
         struct slip_data *spri;
         struct slip_init *init = data;
 
-        private = dev->priv;
+        private = netdev_priv(dev);
         spri = (struct slip_data *) private->user;
 
         memset(spri->name, 0, sizeof(spri->name));
diff --git a/arch/um/drivers/slirp_kern.c b/arch/um/drivers/slirp_kern.c
index d987af277db9..f15a6e7654f3 100644
--- a/arch/um/drivers/slirp_kern.c
+++ b/arch/um/drivers/slirp_kern.c
@@ -22,7 +22,7 @@ void slirp_init(struct net_device *dev, void *data)
         struct slirp_init *init = data;
         int i;
 
-        private = dev->priv;
+        private = netdev_priv(dev);
         spri = (struct slirp_data *) private->user;
 
         spri->argw = init->argw;
diff --git a/arch/um/drivers/vde_kern.c b/arch/um/drivers/vde_kern.c
index add7e722defb..1b852bffdebc 100644
--- a/arch/um/drivers/vde_kern.c
+++ b/arch/um/drivers/vde_kern.c
@@ -19,7 +19,7 @@ static void vde_init(struct net_device *dev, void *data)
         struct uml_net_private *pri;
         struct vde_data *vpri;
 
-        pri = dev->priv;
+        pri = netdev_priv(dev);
         vpri = (struct vde_data *) pri->user;
 
         vpri->vde_switch = init->vde_switch;
diff --git a/arch/um/kernel/init_task.c b/arch/um/kernel/init_task.c
index 910eda8fca18..806d381947bf 100644
--- a/arch/um/kernel/init_task.c
+++ b/arch/um/kernel/init_task.c
@@ -10,7 +10,6 @@
 #include "linux/mqueue.h"
 #include "asm/uaccess.h"
 
-static struct fs_struct init_fs = INIT_FS;
 struct mm_struct init_mm = INIT_MM(init_mm);
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
diff --git a/arch/um/kernel/smp.c b/arch/um/kernel/smp.c
index 045772142844..98351c78bc81 100644
--- a/arch/um/kernel/smp.c
+++ b/arch/um/kernel/smp.c
@@ -25,13 +25,6 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 #include "irq_user.h"
 #include "os.h"
 
-/* CPU online map, set by smp_boot_cpus */
-cpumask_t cpu_online_map = CPU_MASK_NONE;
-cpumask_t cpu_possible_map = CPU_MASK_NONE;
-
-EXPORT_SYMBOL(cpu_online_map);
-EXPORT_SYMBOL(cpu_possible_map);
-
 /* Per CPU bogomips and other parameters
  * The only piece used here is the ipi pipe, which is set before SMP is
  * started and never changed.
diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
index 47f04f4a3464..b13a87a3ec95 100644
--- a/arch/um/kernel/time.c
+++ b/arch/um/kernel/time.c
@@ -50,7 +50,7 @@ static int itimer_next_event(unsigned long delta,
 static struct clock_event_device itimer_clockevent = {
         .name           = "itimer",
         .rating         = 250,
-        .cpumask        = CPU_MASK_ALL,
+        .cpumask        = cpu_all_mask,
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .set_mode       = itimer_set_mode,
         .set_next_event = itimer_next_event,
diff --git a/arch/um/kernel/trap.c b/arch/um/kernel/trap.c
index 44e490419495..7384d8accfe7 100644
--- a/arch/um/kernel/trap.c
+++ b/arch/um/kernel/trap.c
@@ -64,11 +64,10 @@ good_area:
 
         do {
                 int fault;
-survive:
+
                 fault = handle_mm_fault(mm, vma, address, is_write);
                 if (unlikely(fault & VM_FAULT_ERROR)) {
                         if (fault & VM_FAULT_OOM) {
-                                err = -ENOMEM;
                                 goto out_of_memory;
                         } else if (fault & VM_FAULT_SIGBUS) {
                                 err = -EACCES;
@@ -104,18 +103,14 @@ out:
 out_nosemaphore:
         return err;
 
-/*
- * We ran out of memory, or some other thing happened to us that made
- * us unable to handle the page fault gracefully.
- */
 out_of_memory:
-        if (is_global_init(current)) {
-                up_read(&mm->mmap_sem);
-                yield();
-                down_read(&mm->mmap_sem);
-                goto survive;
-        }
-        goto out;
+        /*
+         * We ran out of memory, call the OOM killer, and return the userspace
+         * (which will retry the fault, or kill us if we got oom-killed).
+         */
+        up_read(&mm->mmap_sem);
+        pagefault_out_of_memory();
+        return 0;
 }
 
 static void bad_segv(struct faultinfo fi, unsigned long ip)
@@ -214,9 +209,6 @@ unsigned long segv(struct faultinfo fi, unsigned long ip, int is_user,
                 si.si_addr = (void __user *)address;
                 current->thread.arch.faultinfo = fi;
                 force_sig_info(SIGBUS, &si, current);
-        } else if (err == -ENOMEM) {
-                printk(KERN_INFO "VM: killing process %s\n", current->comm);
-                do_exit(SIGKILL);
         } else {
                 BUG_ON(err != -EFAULT);
                 si.si_signo = SIGSEGV;
diff --git a/arch/um/os-Linux/drivers/ethertap_kern.c b/arch/um/os-Linux/drivers/ethertap_kern.c
index 046a131f6104..7f6f9a71aae4 100644
--- a/arch/um/os-Linux/drivers/ethertap_kern.c
+++ b/arch/um/os-Linux/drivers/ethertap_kern.c
@@ -22,7 +22,7 @@ static void etap_init(struct net_device *dev, void *data)
         struct ethertap_data *epri;
         struct ethertap_init *init = data;
 
-        pri = dev->priv;
+        pri = netdev_priv(dev);
         epri = (struct ethertap_data *) pri->user;
         epri->dev_name = init->dev_name;
         epri->gate_addr = init->gate_addr;
diff --git a/arch/um/os-Linux/drivers/tuntap_kern.c b/arch/um/os-Linux/drivers/tuntap_kern.c
index 6b9e33d5de20..4048800e4696 100644
--- a/arch/um/os-Linux/drivers/tuntap_kern.c
+++ b/arch/um/os-Linux/drivers/tuntap_kern.c
@@ -21,7 +21,7 @@ static void tuntap_init(struct net_device *dev, void *data)
         struct tuntap_data *tpri;
         struct tuntap_init *init = data;
 
-        pri = dev->priv;
+        pri = netdev_priv(dev);
         tpri = (struct tuntap_data *) pri->user;
         tpri->dev_name = init->dev_name;
         tpri->fixed_config = (init->dev_name != NULL);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ac22bb7719f7..862adb9bf0d4 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -19,6 +19,8 @@ config X86_64
 config X86
         def_bool y
         select HAVE_AOUT if X86_32
+        select HAVE_READQ
+        select HAVE_WRITEQ
         select HAVE_UNSTABLE_SCHED_CLOCK
         select HAVE_IDE
         select HAVE_OPROFILE
@@ -29,11 +31,14 @@ config X86
         select HAVE_FTRACE_MCOUNT_RECORD
         select HAVE_DYNAMIC_FTRACE
         select HAVE_FUNCTION_TRACER
+        select HAVE_FUNCTION_GRAPH_TRACER
+        select HAVE_FUNCTION_TRACE_MCOUNT_TEST
         select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64)
         select HAVE_ARCH_KGDB if !X86_VOYAGER
         select HAVE_ARCH_TRACEHOOK
         select HAVE_GENERIC_DMA_COHERENT if X86_32
         select HAVE_EFFICIENT_UNALIGNED_ACCESS
+        select USER_STACKTRACE_SUPPORT
 
 config ARCH_DEFCONFIG
         string
@@ -87,6 +92,10 @@ config GENERIC_IOMAP
 config GENERIC_BUG
         def_bool y
         depends on BUG
+        select GENERIC_BUG_RELATIVE_POINTERS if X86_64
+
+config GENERIC_BUG_RELATIVE_POINTERS
+        bool
 
 config GENERIC_HWEIGHT
         def_bool y
@@ -238,25 +247,39 @@ config X86_HAS_BOOT_CPU_ID
         def_bool y
         depends on X86_VOYAGER
 
+config SPARSE_IRQ
+        bool "Support sparse irq numbering"
+        depends on PCI_MSI || HT_IRQ
+        help
+          This enables support for sparse irqs. This is useful for distro
+          kernels that want to define a high CONFIG_NR_CPUS value but still
+          want to have low kernel memory footprint on smaller machines.
+
+          ( Sparse IRQs can also be beneficial on NUMA boxes, as they spread
+            out the irq_desc[] array in a more NUMA-friendly way. )
+
+          If you don't know what to do here, say N.
+
+config NUMA_MIGRATE_IRQ_DESC
+        bool "Move irq desc when changing irq smp_affinity"
+        depends on SPARSE_IRQ && NUMA
+        default n
+        help
+          This enables moving irq_desc to cpu/node that irq will use handled.
+
+          If you don't know what to do here, say N.
+
 config X86_FIND_SMP_CONFIG
         def_bool y
         depends on X86_MPPARSE || X86_VOYAGER
 
-if ACPI
 config X86_MPPARSE
-        def_bool y
-        bool "Enable MPS table"
+        bool "Enable MPS table" if ACPI
+        default y
         depends on X86_LOCAL_APIC
         help
           For old smp systems that do not have proper acpi support. Newer systems
           (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
-endif
-
-if !ACPI
-config X86_MPPARSE
-        def_bool y
-        depends on X86_LOCAL_APIC
-endif
 
 choice
         prompt "Subarchitecture Type"
@@ -367,10 +390,10 @@ config X86_RDC321X
           as R-8610-(G).
           If you don't have one of these chips, you should say N here.
 
-config SCHED_NO_NO_OMIT_FRAME_POINTER
+config SCHED_OMIT_FRAME_POINTER
         def_bool y
         prompt "Single-depth WCHAN output"
-        depends on X86_32
+        depends on X86
         help
           Calculate simpler /proc/<PID>/wchan values. If this option
           is disabled then wchan values will recurse back to the
@@ -465,10 +488,6 @@ config X86_CYCLONE_TIMER
         def_bool y
         depends on X86_GENERICARCH
 
-config ES7000_CLUSTERED_APIC
-        def_bool y
-        depends on SMP && X86_ES7000 && MPENTIUMIII
-
 source "arch/x86/Kconfig.cpu"
 
 config HPET_TIMER
@@ -482,7 +501,7 @@ config HPET_TIMER
          The HPET provides a stable time base on SMP
          systems, unlike the TSC, but it is more expensive to access,
          as it is off-chip.  You can find the HPET spec at
-         <http://www.intel.com/hardwaredesign/hpetspec.htm>.
+         <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
 
          You can safely choose Y here.  However, HPET will only be
          activated if the platform and the BIOS support this feature.
@@ -567,9 +586,19 @@ config AMD_IOMMU
           your BIOS for an option to enable it or if you have an IVRS ACPI
           table.
 
+config AMD_IOMMU_STATS
+        bool "Export AMD IOMMU statistics to debugfs"
+        depends on AMD_IOMMU
+        select DEBUG_FS
+        help
+          This option enables code in the AMD IOMMU driver to collect various
+          statistics about whats happening in the driver and exports that
+          information to userspace via debugfs.
+          If unsure, say N.
+
 # need this always selected by IOMMU for the VIA workaround
 config SWIOTLB
-        bool
+        def_bool y if X86_64
         help
           Support for software bounce buffers used on x86-64 systems
           which don't have a hardware IOMMU (e.g. the current generation
@@ -580,21 +609,25 @@ config SWIOTLB
 config IOMMU_HELPER
         def_bool (CALGARY_IOMMU || GART_IOMMU || SWIOTLB || AMD_IOMMU)
 
+config IOMMU_API
+        def_bool (AMD_IOMMU || DMAR)
+
 config MAXSMP
         bool "Configure Maximum number of SMP Processors and NUMA Nodes"
-        depends on X86_64 && SMP && BROKEN
+        depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL
+        select CPUMASK_OFFSTACK
         default n
         help
           Configure maximum number of CPUS and NUMA Nodes for this architecture.
           If unsure, say N.
 
 config NR_CPUS
-        int "Maximum number of CPUs (2-512)" if !MAXSMP
-        range 2 512
-        depends on SMP
+        int "Maximum number of CPUs" if SMP && !MAXSMP
+        range 2 512 if SMP && !MAXSMP
+        default "1" if !SMP
         default "4096" if MAXSMP
-        default "32" if X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000
-        default "8"
+        default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)
+        default "8" if SMP
         help
           This allows you to specify the maximum number of CPUs which this
           kernel will support.  The maximum supported value is 512 and the
@@ -660,6 +693,30 @@ config X86_VISWS_APIC
         def_bool y
         depends on X86_32 && X86_VISWS
 
+config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
+        bool "Reroute for broken boot IRQs"
+        default n
+        depends on X86_IO_APIC
+        help
+          This option enables a workaround that fixes a source of
+          spurious interrupts. This is recommended when threaded
+          interrupt handling is used on systems where the generation of
+          superfluous "boot interrupts" cannot be disabled.
+
+          Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
+          entry in the chipset's IO-APIC is masked (as, e.g. the RT
+          kernel does during interrupt handling). On chipsets where this
+          boot IRQ generation cannot be disabled, this workaround keeps
+          the original IRQ line masked so that only the equivalent "boot
+          IRQ" is delivered to the CPUs. The workaround also tells the
+          kernel to set up the IRQ handler on the boot IRQ line. In this
+          way only one interrupt is delivered to the kernel. Otherwise
+          the spurious second interrupt may cause the kernel to bring
+          down (vital) interrupt lines.
+
+          Only affects "broken" chipsets. Interrupt sharing may be
+          increased on these systems.
+
 config X86_MCE
         bool "Machine Check Exception"
         depends on !X86_VOYAGER
@@ -956,24 +1013,37 @@ config X86_PAE
 config ARCH_PHYS_ADDR_T_64BIT
        def_bool X86_64 || X86_PAE
 
+config DIRECT_GBPAGES
+        bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
+        default y
+        depends on X86_64
+        help
+          Allow the kernel linear mapping to use 1GB pages on CPUs that
+          support it. This can improve the kernel's performance a tiny bit by
+          reducing TLB pressure. If in doubt, say "Y".
+
 # Common NUMA Features
 config NUMA
-        bool "Numa Memory Allocation and Scheduler Support (EXPERIMENTAL)"
+        bool "Numa Memory Allocation and Scheduler Support"
         depends on SMP
         depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
         default n if X86_PC
         default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
         help
           Enable NUMA (Non Uniform Memory Access) support.
+
           The kernel will try to allocate memory used by a CPU on the
           local memory controller of the CPU and add some more
           NUMA awareness to the kernel.
 
-          For 32-bit this is currently highly experimental and should be only
-          used for kernel development. It might also cause boot failures.
-          For 64-bit this is recommended on all multiprocessor Opteron systems.
-          If the system is EM64T, you should say N unless your system is
-          EM64T NUMA.
+          For 64-bit this is recommended if the system is Intel Core i7
+          (or later), AMD Opteron, or EM64T NUMA.
+
+          For 32-bit this is only needed on (rare) 32-bit-only platforms
+          that support NUMA topologies, such as NUMAQ / Summit, or if you
+          boot a 32-bit kernel on a 64-bit NUMA platform.
+
+          Otherwise, you should say N.
 
 comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
         depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI)
@@ -1493,6 +1563,10 @@ config ARCH_ENABLE_MEMORY_HOTPLUG
         def_bool y
         depends on X86_64 || (X86_32 && HIGHMEM)
 
+config ARCH_ENABLE_MEMORY_HOTREMOVE
+        def_bool y
+        depends on MEMORY_HOTPLUG
+
 config HAVE_ARCH_EARLY_PFN_TO_NID
         def_bool X86_64
         depends on NUMA
@@ -1632,13 +1706,6 @@ config APM_ALLOW_INTS
           many of the newer IBM Thinkpads.  If you experience hangs when you
           suspend, try setting this to Y.  Otherwise, say N.
 
-config APM_REAL_MODE_POWER_OFF
-        bool "Use real mode APM BIOS call to power off"
-        help
-          Use real mode APM BIOS calls to switch off the computer. This is
-          a work-around for a number of buggy BIOSes. Switch this option on if
-          your computer crashes instead of powering off properly.
-
 endif # APM
 
 source "arch/x86/kernel/cpu/cpufreq/Kconfig"
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 8e99073b9e0f..8078955845ae 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -408,7 +408,7 @@ config X86_MINIMUM_CPU_FAMILY
 
 config X86_DEBUGCTLMSR
         def_bool y
-        depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386)
+        depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML
 
 menuconfig PROCESSOR_SELECT
         bool "Supported processor vendors" if EMBEDDED
@@ -515,12 +515,12 @@ config CPU_SUP_UMC_32
 config X86_DS
         def_bool X86_PTRACE_BTS
         depends on X86_DEBUGCTLMSR
+        select HAVE_HW_BRANCH_TRACER
 
 config X86_PTRACE_BTS
         bool "Branch Trace Store"
         default y
         depends on X86_DEBUGCTLMSR
-        depends on BROKEN
         help
           This adds a ptrace interface to the hardware's branch trace store.
 
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 2a3dfbd5e677..10d6cc3fd052 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -114,18 +114,6 @@ config DEBUG_RODATA
           data. This is recommended so that we can catch kernel bugs sooner.
           If in doubt, say "Y".
 
-config DIRECT_GBPAGES
-        bool "Enable gbpages-mapped kernel pagetables"
-        depends on DEBUG_KERNEL && EXPERIMENTAL && X86_64
-        help
-          Enable gigabyte pages support (if the CPU supports it). This can
-          improve the kernel's performance a tiny bit by reducing TLB
-          pressure.
-
-          This is experimental code.
-
-          If in doubt, say "N".
-
 config DEBUG_RODATA_TEST
         bool "Testcase for the DEBUG_RODATA feature"
         depends on DEBUG_RODATA
@@ -186,14 +174,10 @@ config IOMMU_LEAK
           Add a simple leak tracer to the IOMMU code. This is useful when you
           are debugging a buggy device driver that leaks IOMMU mappings.
 
-config MMIOTRACE_HOOKS
-        bool
-
 config MMIOTRACE
         bool "Memory mapped IO tracing"
         depends on DEBUG_KERNEL && PCI
         select TRACING
-        select MMIOTRACE_HOOKS
         help
           Mmiotrace traces Memory Mapped I/O access and is meant for
           debugging and reverse engineering. It is called from the ioremap
@@ -307,10 +291,10 @@ config OPTIMIZE_INLINING
           developers have marked 'inline'. Doing so takes away freedom from gcc to
           do what it thinks is best, which is desirable for the gcc 3.x series of
           compilers. The gcc 4.x series have a rewritten inlining algorithm and
-          disabling this option will generate a smaller kernel there. Hopefully
-          this algorithm is so good that allowing gcc4 to make the decision can
-          become the default in the future, until then this option is there to
-          test gcc for this.
+          enabling this option will generate a smaller kernel there. Hopefully
+          this algorithm is so good that allowing gcc 4.x and above to make the
+          decision will become the default in the future. Until then this option
+          is there to test gcc for this.
 
           If unsure, say N.
 
diff --git a/arch/x86/boot/video-vga.c b/arch/x86/boot/video-vga.c
index b939cb476dec..5d4742ed4aa2 100644
--- a/arch/x86/boot/video-vga.c
+++ b/arch/x86/boot/video-vga.c
@@ -34,7 +34,7 @@ static struct mode_info cga_modes[] = {
         { VIDEO_80x25,  80, 25, 0 },
 };
 
-__videocard video_vga;
+static __videocard video_vga;
 
 /* Set basic 80x25 mode */
 static u8 vga_set_basic_mode(void)
@@ -259,7 +259,7 @@ static int vga_probe(void)
         return mode_count[adapter];
 }
 
-__videocard video_vga = {
+static __videocard video_vga = {
         .card_name      = "VGA",
         .probe          = vga_probe,
         .set_mode       = vga_set_mode,
diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c
index 83598b23093a..3bef2c1febe9 100644
--- a/arch/x86/boot/video.c
+++ b/arch/x86/boot/video.c
@@ -226,7 +226,7 @@ static unsigned int mode_menu(void)
 
 #ifdef CONFIG_VIDEO_RETAIN
 /* Save screen content to the heap */
-struct saved_screen {
+static struct saved_screen {
         int x, y;
         int curx, cury;
         u16 *data;
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index 13b8c86ae985..b30a08ed8eb4 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -77,7 +77,7 @@ CONFIG_AUDIT=y
 CONFIG_AUDITSYSCALL=y
 CONFIG_AUDIT_TREE=y
 # CONFIG_IKCONFIG is not set
-CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LOG_BUF_SHIFT=18
 CONFIG_CGROUPS=y
 # CONFIG_CGROUP_DEBUG is not set
 CONFIG_CGROUP_NS=y
@@ -298,7 +298,7 @@ CONFIG_KEXEC=y
 CONFIG_CRASH_DUMP=y
 # CONFIG_KEXEC_JUMP is not set
 CONFIG_PHYSICAL_START=0x1000000
-CONFIG_RELOCATABLE=y
+# CONFIG_RELOCATABLE is not set
 CONFIG_PHYSICAL_ALIGN=0x200000
 CONFIG_HOTPLUG_CPU=y
 # CONFIG_COMPAT_VDSO is not set
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index f0a03d7a7d63..0e7dbc0a3e46 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -77,7 +77,7 @@ CONFIG_AUDIT=y
 CONFIG_AUDITSYSCALL=y
 CONFIG_AUDIT_TREE=y
 # CONFIG_IKCONFIG is not set
-CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LOG_BUF_SHIFT=18
 CONFIG_CGROUPS=y
 # CONFIG_CGROUP_DEBUG is not set
 CONFIG_CGROUP_NS=y
@@ -298,7 +298,7 @@ CONFIG_SCHED_HRTICK=y
 CONFIG_KEXEC=y
 CONFIG_CRASH_DUMP=y
 CONFIG_PHYSICAL_START=0x1000000
-CONFIG_RELOCATABLE=y
+# CONFIG_RELOCATABLE is not set
 CONFIG_PHYSICAL_ALIGN=0x200000
 CONFIG_HOTPLUG_CPU=y
 # CONFIG_COMPAT_VDSO is not set
diff --git a/arch/x86/crypto/crc32c-intel.c b/arch/x86/crypto/crc32c-intel.c
index 070afc5b6c94..b9d00261703c 100644
--- a/arch/x86/crypto/crc32c-intel.c
+++ b/arch/x86/crypto/crc32c-intel.c
@@ -6,13 +6,22 @@
  * Intel(R) 64 and IA-32 Architectures Software Developer's Manual
  * Volume 2A: Instruction Set Reference, A-M
  *
- * Copyright (c) 2008 Austin Zhang <austin_zhang@linux.intel.com>
- * Copyright (c) 2008 Kent Liu <kent.liu@intel.com>
+ * Copyright (C) 2008 Intel Corporation
+ * Authors: Austin Zhang <austin_zhang@linux.intel.com>
+ *          Kent Liu <kent.liu@intel.com>
  *
  * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  *
  */
 #include <linux/init.h>
@@ -75,99 +84,92 @@ static u32 __pure crc32c_intel_le_hw(u32 crc, unsigned char const *p, size_t len
  * If your algorithm starts with ~0, then XOR with ~0 before you set
  * the seed.
  */
-static int crc32c_intel_setkey(struct crypto_ahash *hash, const u8 *key,
+static int crc32c_intel_setkey(struct crypto_shash *hash, const u8 *key,
                         unsigned int keylen)
 {
-        u32 *mctx = crypto_ahash_ctx(hash);
+        u32 *mctx = crypto_shash_ctx(hash);
 
         if (keylen != sizeof(u32)) {
-                crypto_ahash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
+                crypto_shash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
                 return -EINVAL;
         }
         *mctx = le32_to_cpup((__le32 *)key);
         return 0;
 }
 
-static int crc32c_intel_init(struct ahash_request *req)
+static int crc32c_intel_init(struct shash_desc *desc)
 {
-        u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
-        u32 *crcp = ahash_request_ctx(req);
+        u32 *mctx = crypto_shash_ctx(desc->tfm);
+        u32 *crcp = shash_desc_ctx(desc);
 
         *crcp = *mctx;
 
         return 0;
 }
 
-static int crc32c_intel_update(struct ahash_request *req)
+static int crc32c_intel_update(struct shash_desc *desc, const u8 *data,
+                               unsigned int len)
 {
-        struct crypto_hash_walk walk;
-        u32 *crcp = ahash_request_ctx(req);
-        u32 crc = *crcp;
-        int nbytes;
-
-        for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
-           nbytes = crypto_hash_walk_done(&walk, 0))
-        crc = crc32c_intel_le_hw(crc, walk.data, nbytes);
+        u32 *crcp = shash_desc_ctx(desc);
 
-        *crcp = crc;
+        *crcp = crc32c_intel_le_hw(*crcp, data, len);
         return 0;
 }
 
-static int crc32c_intel_final(struct ahash_request *req)
+static int __crc32c_intel_finup(u32 *crcp, const u8 *data, unsigned int len,
+                                u8 *out)
 {
-        u32 *crcp = ahash_request_ctx(req);
-
-        *(__le32 *)req->result = ~cpu_to_le32p(crcp);
+        *(__le32 *)out = ~cpu_to_le32(crc32c_intel_le_hw(*crcp, data, len));
         return 0;
 }
 
-static int crc32c_intel_digest(struct ahash_request *req)
+static int crc32c_intel_finup(struct shash_desc *desc, const u8 *data,
+                              unsigned int len, u8 *out)
 {
-        struct crypto_hash_walk walk;
-        u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
-        u32 crc = *mctx;
-        int nbytes;
+        return __crc32c_intel_finup(shash_desc_ctx(desc), data, len, out);
+}
 
-        for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
-           nbytes = crypto_hash_walk_done(&walk, 0))
-                crc = crc32c_intel_le_hw(crc, walk.data, nbytes);
+static int crc32c_intel_final(struct shash_desc *desc, u8 *out)
+{
+        u32 *crcp = shash_desc_ctx(desc);
 
-        *(__le32 *)req->result = ~cpu_to_le32(crc);
+        *(__le32 *)out = ~cpu_to_le32p(crcp);
         return 0;
 }
 
+static int crc32c_intel_digest(struct shash_desc *desc, const u8 *data,
+                               unsigned int len, u8 *out)
+{
+        return __crc32c_intel_finup(crypto_shash_ctx(desc->tfm), data, len,
+                                    out);
+}
+
 static int crc32c_intel_cra_init(struct crypto_tfm *tfm)
 {
         u32 *key = crypto_tfm_ctx(tfm);
 
         *key = ~0;
 
-        tfm->crt_ahash.reqsize = sizeof(u32);
-
         return 0;
 }
 
-static struct crypto_alg alg = {
-        .cra_name               =       "crc32c",
-        .cra_driver_name        =       "crc32c-intel",
-        .cra_priority           =       200,
-        .cra_flags              =       CRYPTO_ALG_TYPE_AHASH,
-        .cra_blocksize          =       CHKSUM_BLOCK_SIZE,
-        .cra_alignmask          =       3,
-        .cra_ctxsize            =       sizeof(u32),
-        .cra_module             =       THIS_MODULE,
-        .cra_list               =       LIST_HEAD_INIT(alg.cra_list),
-        .cra_init               =       crc32c_intel_cra_init,
-        .cra_type               =       &crypto_ahash_type,
-        .cra_u                  =       {
-                .ahash = {
-                        .digestsize    =       CHKSUM_DIGEST_SIZE,
-                        .setkey        =       crc32c_intel_setkey,
-                        .init          =       crc32c_intel_init,
-                        .update        =       crc32c_intel_update,
-                        .final         =       crc32c_intel_final,
-                        .digest        =       crc32c_intel_digest,
-                }
+static struct shash_alg alg = {
+        .setkey                 =       crc32c_intel_setkey,
+        .init                   =       crc32c_intel_init,
+        .update                 =       crc32c_intel_update,
+        .final                  =       crc32c_intel_final,
+        .finup                  =       crc32c_intel_finup,
+        .digest                 =       crc32c_intel_digest,
+        .descsize               =       sizeof(u32),
+        .digestsize             =       CHKSUM_DIGEST_SIZE,
+        .base                   =       {
+                .cra_name               =       "crc32c",
+                .cra_driver_name        =       "crc32c-intel",
+                .cra_priority           =       200,
+                .cra_blocksize          =       CHKSUM_BLOCK_SIZE,
+                .cra_ctxsize            =       sizeof(u32),
+                .cra_module             =       THIS_MODULE,
+                .cra_init               =       crc32c_intel_cra_init,
         }
 };
 
@@ -175,14 +177,14 @@ static struct crypto_alg alg = {
 static int __init crc32c_intel_mod_init(void)
 {
         if (cpu_has_xmm4_2)
-                return crypto_register_alg(&alg);
+                return crypto_register_shash(&alg);
         else
                 return -ENODEV;
 }
 
 static void __exit crc32c_intel_mod_fini(void)
 {
-        crypto_unregister_alg(&alg);
+        crypto_unregister_shash(&alg);
 }
 
 module_init(crc32c_intel_mod_init);
@@ -194,4 +196,3 @@ MODULE_LICENSE("GPL");
 
 MODULE_ALIAS("crc32c");
 MODULE_ALIAS("crc32c-intel");
-
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index 127ec3f07214..2a4d073d2cf1 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -327,7 +327,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
         current->mm->cached_hole_size = 0;
 
         current->mm->mmap = NULL;
-        compute_creds(bprm);
+        install_exec_creds(bprm);
         current->flags &= ~PF_FORKNOEXEC;
 
         if (N_MAGIC(ex) == OMAGIC) {
diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c
index 4bc02b23674b..9dabd00e9805 100644
--- a/arch/x86/ia32/ia32_signal.c
+++ b/arch/x86/ia32/ia32_signal.c
@@ -24,13 +24,14 @@
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
 #include <asm/i387.h>
-#include <asm/ia32.h>
 #include <asm/ptrace.h>
 #include <asm/ia32_unistd.h>
 #include <asm/user32.h>
 #include <asm/sigcontext32.h>
 #include <asm/proto.h>
 #include <asm/vdso.h>
+#include <asm/sigframe.h>
+#include <asm/sys_ia32.h>
 
 #define DEBUG_SIG 0
 
@@ -41,7 +42,6 @@
                          X86_EFLAGS_ZF | X86_EFLAGS_AF | X86_EFLAGS_PF | \
                          X86_EFLAGS_CF)
 
-asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset);
 void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
 
 int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
@@ -173,47 +173,28 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,
 /*
  * Do a signal return; undo the signal stack.
  */
+#define COPY(x)                 {               \
+        err |= __get_user(regs->x, &sc->x);     \
+}
 
-struct sigframe
-{
-        u32 pretcode;
-        int sig;
-        struct sigcontext_ia32 sc;
-        struct _fpstate_ia32 fpstate_unused; /* look at kernel/sigframe.h */
-        unsigned int extramask[_COMPAT_NSIG_WORDS-1];
-        char retcode[8];
-        /* fp state follows here */
-};
-
-struct rt_sigframe
-{
-        u32 pretcode;
-        int sig;
-        u32 pinfo;
-        u32 puc;
-        compat_siginfo_t info;
-        struct ucontext_ia32 uc;
-        char retcode[8];
-        /* fp state follows here */
-};
-
-#define COPY(x)         {               \
-        unsigned int reg;               \
-        err |= __get_user(reg, &sc->x); \
-        regs->x = reg;                  \
+#define COPY_SEG_CPL3(seg)      {                       \
+                unsigned short tmp;                     \
+                err |= __get_user(tmp, &sc->seg);       \
+                regs->seg = tmp | 3;                    \
 }
 
-#define RELOAD_SEG(seg,mask)                                            \
-        { unsigned int cur;                                             \
-          unsigned short pre;                                           \
-          err |= __get_user(pre, &sc->seg);                             \
-          savesegment(seg, cur);                                        \
-          pre |= mask;                                                  \
-          if (pre != cur) loadsegment(seg, pre); }
+#define RELOAD_SEG(seg)         {               \
+        unsigned int cur, pre;                  \
+        err |= __get_user(pre, &sc->seg);       \
+        savesegment(seg, cur);                  \
+        pre |= 3;                               \
+        if (pre != cur)                         \
+                loadsegment(seg, pre);          \
+}
 
 static int ia32_restore_sigcontext(struct pt_regs *regs,
                                    struct sigcontext_ia32 __user *sc,
-                                   unsigned int *peax)
+                                   unsigned int *pax)
 {
         unsigned int tmpflags, gs, oldgs, err = 0;
         void __user *buf;
@@ -240,18 +221,16 @@ static int ia32_restore_sigcontext(struct pt_regs *regs,
         if (gs != oldgs)
                 load_gs_index(gs);
 
-        RELOAD_SEG(fs, 3);
-        RELOAD_SEG(ds, 3);
-        RELOAD_SEG(es, 3);
+        RELOAD_SEG(fs);
+        RELOAD_SEG(ds);
+        RELOAD_SEG(es);
 
         COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
         COPY(dx); COPY(cx); COPY(ip);
         /* Don't touch extended registers */
 
-        err |= __get_user(regs->cs, &sc->cs);
-        regs->cs |= 3;
-        err |= __get_user(regs->ss, &sc->ss);
-        regs->ss |= 3;
+        COPY_SEG_CPL3(cs);
+        COPY_SEG_CPL3(ss);
 
         err |= __get_user(tmpflags, &sc->flags);
         regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
@@ -262,15 +241,13 @@ static int ia32_restore_sigcontext(struct pt_regs *regs,
         buf = compat_ptr(tmp);
         err |= restore_i387_xstate_ia32(buf);
 
-        err |= __get_user(tmp, &sc->ax);
-        *peax = tmp;
-
+        err |= __get_user(*pax, &sc->ax);
         return err;
 }
 
 asmlinkage long sys32_sigreturn(struct pt_regs *regs)
 {
-        struct sigframe __user *frame = (struct sigframe __user *)(regs->sp-8);
+        struct sigframe_ia32 __user *frame = (struct sigframe_ia32 __user *)(regs->sp-8);
         sigset_t set;
         unsigned int ax;
 
@@ -300,12 +277,12 @@ badframe:
 
 asmlinkage long sys32_rt_sigreturn(struct pt_regs *regs)
 {
-        struct rt_sigframe __user *frame;
+        struct rt_sigframe_ia32 __user *frame;
         sigset_t set;
         unsigned int ax;
         struct pt_regs tregs;
 
-        frame = (struct rt_sigframe __user *)(regs->sp - 4);
+        frame = (struct rt_sigframe_ia32 __user *)(regs->sp - 4);
 
         if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
                 goto badframe;
@@ -359,20 +336,15 @@ static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc,
         err |= __put_user(regs->dx, &sc->dx);
         err |= __put_user(regs->cx, &sc->cx);
         err |= __put_user(regs->ax, &sc->ax);
-        err |= __put_user(regs->cs, &sc->cs);
-        err |= __put_user(regs->ss, &sc->ss);
         err |= __put_user(current->thread.trap_no, &sc->trapno);
         err |= __put_user(current->thread.error_code, &sc->err);
         err |= __put_user(regs->ip, &sc->ip);
+        err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);
         err |= __put_user(regs->flags, &sc->flags);
         err |= __put_user(regs->sp, &sc->sp_at_signal);
+        err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);
 
-        tmp = save_i387_xstate_ia32(fpstate);
-        if (tmp < 0)
-                err = -EFAULT;
-        else
-                err |= __put_user(ptr_to_compat(tmp ? fpstate : NULL),
-                                        &sc->fpstate);
+        err |= __put_user(ptr_to_compat(fpstate), &sc->fpstate);
 
         /* non-iBCS2 extensions.. */
         err |= __put_user(mask, &sc->oldmask);
@@ -400,7 +372,7 @@ static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
         }
 
         /* This is the legacy signal stack switching. */
-        else if ((regs->ss & 0xffff) != __USER_DS &&
+        else if ((regs->ss & 0xffff) != __USER32_DS &&
                 !(ka->sa.sa_flags & SA_RESTORER) &&
                  ka->sa.sa_restorer)
                 sp = (unsigned long) ka->sa.sa_restorer;
@@ -408,6 +380,8 @@ static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
         if (used_math()) {
                 sp = sp - sig_xstate_ia32_size;
                 *fpstate = (struct _fpstate_ia32 *) sp;
+                if (save_i387_xstate_ia32(*fpstate) < 0)
+                        return (void __user *) -1L;
         }
 
         sp -= frame_size;
@@ -420,7 +394,7 @@ static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
 int ia32_setup_frame(int sig, struct k_sigaction *ka,
                      compat_sigset_t *set, struct pt_regs *regs)
 {
-        struct sigframe __user *frame;
+        struct sigframe_ia32 __user *frame;
         void __user *restorer;
         int err = 0;
         void __user *fpstate = NULL;
@@ -430,12 +404,10 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
                 u16 poplmovl;
                 u32 val;
                 u16 int80;
-                u16 pad;
         } __attribute__((packed)) code = {
                 0xb858,          /* popl %eax ; movl $...,%eax */
                 __NR_ia32_sigreturn,
                 0x80cd,         /* int $0x80 */
-                0,
         };
 
         frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);
@@ -471,7 +443,7 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
          * These are actually not used anymore, but left because some
          * gdb versions depend on them as a marker.
          */
-        err |= __copy_to_user(frame->retcode, &code, 8);
+        err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
         if (err)
                 return -EFAULT;
 
@@ -501,7 +473,7 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
 int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                         compat_sigset_t *set, struct pt_regs *regs)
 {
-        struct rt_sigframe __user *frame;
+        struct rt_sigframe_ia32 __user *frame;
         void __user *restorer;
         int err = 0;
         void __user *fpstate = NULL;
@@ -511,8 +483,7 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                 u8 movl;
                 u32 val;
                 u16 int80;
-                u16 pad;
-                u8  pad2;
+                u8  pad;
         } __attribute__((packed)) code = {
                 0xb8,
                 __NR_ia32_rt_sigreturn,
@@ -559,7 +530,7 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
          * Not actually used anymore, but left because some gdb
          * versions need it.
          */
-        err |= __copy_to_user(frame->retcode, &code, 8);
+        err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
         if (err)
                 return -EFAULT;
 
@@ -572,11 +543,6 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         regs->dx = (unsigned long) &frame->info;
         regs->cx = (unsigned long) &frame->uc;
 
-        /* Make -mregparm=3 work */
-        regs->ax = sig;
-        regs->dx = (unsigned long) &frame->info;
-        regs->cx = (unsigned long) &frame->uc;
-
         loadsegment(ds, __USER32_DS);
         loadsegment(es, __USER32_DS);
 
diff --git a/arch/x86/ia32/ipc32.c b/arch/x86/ia32/ipc32.c
index d21991ce606c..29cdcd02ead3 100644
--- a/arch/x86/ia32/ipc32.c
+++ b/arch/x86/ia32/ipc32.c
@@ -8,6 +8,7 @@
 #include <linux/shm.h>
 #include <linux/ipc.h>
 #include <linux/compat.h>
+#include <asm/sys_ia32.h>
 
 asmlinkage long sys32_ipc(u32 call, int first, int second, int third,
                           compat_uptr_t ptr, u32 fifth)
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index 2e09dcd3c0a6..6c0d7f6231af 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -44,8 +44,8 @@
 #include <asm/types.h>
 #include <asm/uaccess.h>
 #include <asm/atomic.h>
-#include <asm/ia32.h>
 #include <asm/vgtod.h>
+#include <asm/sys_ia32.h>
 
 #define AA(__x)         ((unsigned long)(__x))
 
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index ac302a2fa339..95c8cd9d22b5 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -190,16 +190,23 @@
 /* FIXME: move this macro to <linux/pci.h> */
 #define PCI_BUS(x) (((x) >> 8) & 0xff)
 
+/* Protection domain flags */
+#define PD_DMA_OPS_MASK         (1UL << 0) /* domain used for dma_ops */
+#define PD_DEFAULT_MASK         (1UL << 1) /* domain is a default dma_ops
+                                              domain for an IOMMU */
+
 /*
  * This structure contains generic data for  IOMMU protection domains
  * independent of their use.
  */
 struct protection_domain {
-        spinlock_t lock; /* mostly used to lock the page table*/
-        u16 id;          /* the domain id written to the device table */
-        int mode;        /* paging mode (0-6 levels) */
-        u64 *pt_root;    /* page table root pointer */
-        void *priv;      /* private data */
+        spinlock_t lock;        /* mostly used to lock the page table*/
+        u16 id;                 /* the domain id written to the device table */
+        int mode;               /* paging mode (0-6 levels) */
+        u64 *pt_root;           /* page table root pointer */
+        unsigned long flags;    /* flags to find out type of domain */
+        unsigned dev_cnt;       /* devices assigned to this domain */
+        void *priv;             /* private data */
 };
 
 /*
@@ -295,7 +302,7 @@ struct amd_iommu {
         bool int_enabled;
 
         /* if one, we need to send a completion wait command */
-        int need_sync;
+        bool need_sync;
 
         /* default dma_ops domain for that IOMMU */
         struct dma_ops_domain *default_dom;
@@ -374,7 +381,7 @@ extern struct protection_domain **amd_iommu_pd_table;
 extern unsigned long *amd_iommu_pd_alloc_bitmap;
 
 /* will be 1 if device isolation is enabled */
-extern int amd_iommu_isolate;
+extern bool amd_iommu_isolate;
 
 /*
  * If true, the addresses will be flushed on unmap time, not when
@@ -382,18 +389,6 @@ extern int amd_iommu_isolate;
  */
 extern bool amd_iommu_unmap_flush;
 
-/* takes a PCI device id and prints it out in a readable form */
-static inline void print_devid(u16 devid, int nl)
-{
-        int bus = devid >> 8;
-        int dev = devid >> 3 & 0x1f;
-        int fn  = devid & 0x07;
-
-        printk("%02x:%02x.%x", bus, dev, fn);
-        if (nl)
-                printk("\n");
-}
-
 /* takes bus and device/function and returns the device id
  * FIXME: should that be in generic PCI code? */
 static inline u16 calc_devid(u8 bus, u8 devfn)
@@ -401,4 +396,32 @@ static inline u16 calc_devid(u8 bus, u8 devfn)
         return (((u16)bus) << 8) | devfn;
 }
 
+#ifdef CONFIG_AMD_IOMMU_STATS
+
+struct __iommu_counter {
+        char *name;
+        struct dentry *dent;
+        u64 value;
+};
+
+#define DECLARE_STATS_COUNTER(nm) \
+        static struct __iommu_counter nm = {    \
+                .name = #nm,                    \
+        }
+
+#define INC_STATS_COUNTER(name)         name.value += 1
+#define ADD_STATS_COUNTER(name, x)      name.value += (x)
+#define SUB_STATS_COUNTER(name, x)      name.value -= (x)
+
+#else /* CONFIG_AMD_IOMMU_STATS */
+
+#define DECLARE_STATS_COUNTER(name)
+#define INC_STATS_COUNTER(name)
+#define ADD_STATS_COUNTER(name, x)
+#define SUB_STATS_COUNTER(name, x)
+
+static inline void amd_iommu_stats_init(void) { }
+
+#endif /* CONFIG_AMD_IOMMU_STATS */
+
 #endif /* _ASM_X86_AMD_IOMMU_TYPES_H */
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 3b1510b4fc57..ab1d51a8855e 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -54,7 +54,6 @@ extern int disable_apic;
 extern int is_vsmp_box(void);
 extern void xapic_wait_icr_idle(void);
 extern u32 safe_xapic_wait_icr_idle(void);
-extern u64 xapic_icr_read(void);
 extern void xapic_icr_write(u32, u32);
 extern int setup_profiling_timer(unsigned int);
 
@@ -93,7 +92,7 @@ static inline u32 native_apic_msr_read(u32 reg)
 }
 
 #ifndef CONFIG_X86_32
-extern int x2apic, x2apic_preenabled;
+extern int x2apic;
 extern void check_x2apic(void);
 extern void enable_x2apic(void);
 extern void enable_IR_x2apic(void);
@@ -193,6 +192,7 @@ extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
 static inline void lapic_shutdown(void) { }
 #define local_apic_timer_c2_ok          1
 static inline void init_apic_mappings(void) { }
+static inline void disable_local_APIC(void) { }
 
 #endif /* !CONFIG_X86_LOCAL_APIC */
 
diff --git a/arch/x86/include/asm/atomic_32.h b/arch/x86/include/asm/atomic_32.h
index ad5b9f6ecddf..85b46fba4229 100644
--- a/arch/x86/include/asm/atomic_32.h
+++ b/arch/x86/include/asm/atomic_32.h
@@ -2,6 +2,7 @@
 #define _ASM_X86_ATOMIC_32_H
 
 #include <linux/compiler.h>
+#include <linux/types.h>
 #include <asm/processor.h>
 #include <asm/cmpxchg.h>
 
@@ -10,15 +11,6 @@
  * resource counting etc..
  */
 
-/*
- * Make sure gcc doesn't try to be clever and move things around
- * on us. We need to use _exactly_ the address the user gave us,
- * not some alias that contains the same information.
- */
-typedef struct {
-        int counter;
-} atomic_t;
-
 #define ATOMIC_INIT(i)  { (i) }
 
 /**
diff --git a/arch/x86/include/asm/atomic_64.h b/arch/x86/include/asm/atomic_64.h
index 279d2a731f3f..8c21731984da 100644
--- a/arch/x86/include/asm/atomic_64.h
+++ b/arch/x86/include/asm/atomic_64.h
@@ -1,25 +1,15 @@
 #ifndef _ASM_X86_ATOMIC_64_H
 #define _ASM_X86_ATOMIC_64_H
 
+#include <linux/types.h>
 #include <asm/alternative.h>
 #include <asm/cmpxchg.h>
 
-/* atomic_t should be 32 bit signed type */
-
 /*
  * Atomic operations that C can't guarantee us.  Useful for
  * resource counting etc..
  */
 
-/*
- * Make sure gcc doesn't try to be clever and move things around
- * on us. We need to use _exactly_ the address the user gave us,
- * not some alias that contains the same information.
- */
-typedef struct {
-        int counter;
-} atomic_t;
-
 #define ATOMIC_INIT(i)  { (i) }
 
 /**
@@ -191,11 +181,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
 #define atomic_inc_return(v)  (atomic_add_return(1, v))
 #define atomic_dec_return(v)  (atomic_sub_return(1, v))
 
-/* An 64bit atomic type */
-
-typedef struct {
-        long counter;
-} atomic64_t;
+/* The 64-bit atomic type */
 
 #define ATOMIC64_INIT(i)        { (i) }
 
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index 1d9543b9d358..d8dd9f537911 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -9,12 +9,12 @@ static inline int apic_id_registered(void)
         return (1);
 }
 
-static inline cpumask_t target_cpus(void)
+static inline const cpumask_t *target_cpus(void)
 {
 #ifdef CONFIG_SMP
-        return cpu_online_map;
+        return &cpu_online_map;
 #else
-        return cpumask_of_cpu(0);
+        return &cpumask_of_cpu(0);
 #endif
 }
 
@@ -24,8 +24,6 @@ static inline cpumask_t target_cpus(void)
 #define INT_DELIVERY_MODE       (dest_Fixed)
 #define INT_DEST_MODE           (0)    /* phys delivery to target proc */
 #define NO_BALANCE_IRQ          (0)
-#define WAKE_SECONDARY_VIA_INIT
-
 
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {
@@ -81,7 +79,7 @@ static inline int apicid_to_node(int logical_apicid)
 
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
-        if (mps_cpu < NR_CPUS)
+        if (mps_cpu < nr_cpu_ids)
                 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
 
         return BAD_APICID;
@@ -96,7 +94,7 @@ extern u8 cpu_2_logical_apicid[];
 /* Mapping from cpu number to logical apicid */
 static inline int cpu_to_logical_apicid(int cpu)
 {
-        if (cpu >= NR_CPUS)
+        if (cpu >= nr_cpu_ids)
                 return BAD_APICID;
         return cpu_physical_id(cpu);
 }
@@ -121,16 +119,34 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
 }
 
 /* As we are using single CPU as destination, pick only one CPU here */
-static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
 {
         int cpu;
         int apicid;     
 
-        cpu = first_cpu(cpumask);
+        cpu = first_cpu(*cpumask);
         apicid = cpu_to_logical_apicid(cpu);
         return apicid;
 }
 
+static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                                  const struct cpumask *andmask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * May as well be the first.
+         */
+        for_each_cpu_and(cpu, cpumask, andmask)
+                if (cpumask_test_cpu(cpu, cpu_online_mask))
+                        break;
+        if (cpu < nr_cpu_ids)
+                return cpu_to_logical_apicid(cpu);
+
+        return BAD_APICID;
+}
+
 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
 {
         return cpuid_apic >> index_msb;
diff --git a/arch/x86/include/asm/bigsmp/ipi.h b/arch/x86/include/asm/bigsmp/ipi.h
index 9404c535b7ec..27fcd01b3ae6 100644
--- a/arch/x86/include/asm/bigsmp/ipi.h
+++ b/arch/x86/include/asm/bigsmp/ipi.h
@@ -1,25 +1,22 @@
 #ifndef __ASM_MACH_IPI_H
 #define __ASM_MACH_IPI_H
 
-void send_IPI_mask_sequence(cpumask_t mask, int vector);
+void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
+void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
 
-static inline void send_IPI_mask(cpumask_t mask, int vector)
+static inline void send_IPI_mask(const struct cpumask *mask, int vector)
 {
         send_IPI_mask_sequence(mask, vector);
 }
 
 static inline void send_IPI_allbutself(int vector)
 {
-        cpumask_t mask = cpu_online_map;
-        cpu_clear(smp_processor_id(), mask);
-
-        if (!cpus_empty(mask))
-                send_IPI_mask(mask, vector);
+        send_IPI_mask_allbutself(cpu_online_mask, vector);
 }
 
 static inline void send_IPI_all(int vector)
 {
-        send_IPI_mask(cpu_online_map, vector);
+        send_IPI_mask(cpu_online_mask, vector);
 }
 
 #endif /* __ASM_MACH_IPI_H */
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 360010322711..9fa9dcdf344b 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -168,7 +168,15 @@ static inline void __change_bit(int nr, volatile unsigned long *addr)
  */
 static inline void change_bit(int nr, volatile unsigned long *addr)
 {
-        asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
+        if (IS_IMMEDIATE(nr)) {
+                asm volatile(LOCK_PREFIX "xorb %1,%0"
+                        : CONST_MASK_ADDR(nr, addr)
+                        : "iq" ((u8)CONST_MASK(nr)));
+        } else {
+                asm volatile(LOCK_PREFIX "btc %1,%0"
+                        : BITOP_ADDR(addr)
+                        : "Ir" (nr));
+        }
 }
 
 /**
diff --git a/arch/x86/include/asm/bug.h b/arch/x86/include/asm/bug.h
index 3def2065fcea..d9cf1cd156d2 100644
--- a/arch/x86/include/asm/bug.h
+++ b/arch/x86/include/asm/bug.h
@@ -9,7 +9,7 @@
 #ifdef CONFIG_X86_32
 # define __BUG_C0       "2:\t.long 1b, %c0\n"
 #else
-# define __BUG_C0       "2:\t.quad 1b, %c0\n"
+# define __BUG_C0       "2:\t.long 1b - 2b, %c0 - 2b\n"
 #endif
 
 #define BUG()                                                   \
diff --git a/arch/x86/include/asm/byteorder.h b/arch/x86/include/asm/byteorder.h
index e02ae2d89acf..f110ad417df3 100644
--- a/arch/x86/include/asm/byteorder.h
+++ b/arch/x86/include/asm/byteorder.h
@@ -4,26 +4,33 @@
 #include <asm/types.h>
 #include <linux/compiler.h>
 
-#ifdef __GNUC__
+#define __LITTLE_ENDIAN
 
-#ifdef __i386__
-
-static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
+static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
 {
-#ifdef CONFIG_X86_BSWAP
-        asm("bswap %0" : "=r" (x) : "0" (x));
-#else
+#ifdef __i386__
+# ifdef CONFIG_X86_BSWAP
+        asm("bswap %0" : "=r" (val) : "0" (val));
+# else
         asm("xchgb %b0,%h0\n\t" /* swap lower bytes     */
             "rorl $16,%0\n\t"   /* swap words           */
             "xchgb %b0,%h0"     /* swap higher bytes    */
-            : "=q" (x)
-            : "0" (x));
+            : "=q" (val)
+            : "0" (val));
+# endif
+
+#else /* __i386__ */
+        asm("bswapl %0"
+            : "=r" (val)
+            : "0" (val));
 #endif
-        return x;
+        return val;
 }
+#define __arch_swab32 __arch_swab32
 
-static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
+static inline __attribute_const__ __u64 __arch_swab64(__u64 val)
 {
+#ifdef __i386__
         union {
                 struct {
                         __u32 a;
@@ -32,50 +39,27 @@ static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
                 __u64 u;
         } v;
         v.u = val;
-#ifdef CONFIG_X86_BSWAP
+# ifdef CONFIG_X86_BSWAP
         asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
             : "=r" (v.s.a), "=r" (v.s.b)
             : "0" (v.s.a), "1" (v.s.b));
-#else
-        v.s.a = ___arch__swab32(v.s.a);
-        v.s.b = ___arch__swab32(v.s.b);
+# else
+        v.s.a = __arch_swab32(v.s.a);
+        v.s.b = __arch_swab32(v.s.b);
         asm("xchgl %0,%1"
             : "=r" (v.s.a), "=r" (v.s.b)
             : "0" (v.s.a), "1" (v.s.b));
-#endif
+# endif
         return v.u;
-}
-
 #else /* __i386__ */
-
-static inline __attribute_const__ __u64 ___arch__swab64(__u64 x)
-{
         asm("bswapq %0"
-            : "=r" (x)
-            : "0" (x));
-        return x;
-}
-
-static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
-{
-        asm("bswapl %0"
-            : "=r" (x)
-            : "0" (x));
-        return x;
-}
-
+            : "=r" (val)
+            : "0" (val));
+        return val;
 #endif
+}
+#define __arch_swab64 __arch_swab64
 
-/* Do not define swab16.  Gcc is smart enough to recognize "C" version and
-   convert it into rotation or exhange.  */
-
-#define __arch__swab64(x) ___arch__swab64(x)
-#define __arch__swab32(x) ___arch__swab32(x)
-
-#define __BYTEORDER_HAS_U64__
-
-#endif /* __GNUC__ */
-
-#include <linux/byteorder/little_endian.h>
+#include <linux/byteorder.h>
 
 #endif /* _ASM_X86_BYTEORDER_H */
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index cfdf8c2c5c31..ea408dcba513 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -80,7 +80,6 @@
 #define X86_FEATURE_UP          (3*32+ 9) /* smp kernel running on up */
 #define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* "" FXSAVE leaks FOP/FIP/FOP */
 #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */
-#define X86_FEATURE_NOPL        (3*32+20) /* The NOPL (0F 1F) instructions */
 #define X86_FEATURE_PEBS        (3*32+12) /* Precise-Event Based Sampling */
 #define X86_FEATURE_BTS         (3*32+13) /* Branch Trace Store */
 #define X86_FEATURE_SYSCALL32   (3*32+14) /* "" syscall in ia32 userspace */
@@ -92,6 +91,8 @@
 #define X86_FEATURE_NOPL        (3*32+20) /* The NOPL (0F 1F) instructions */
 #define X86_FEATURE_AMDC1E      (3*32+21) /* AMD C1E detected */
 #define X86_FEATURE_XTOPOLOGY   (3*32+22) /* cpu topology enum extensions */
+#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */
+#define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3        (4*32+ 0) /* "pni" SSE-3 */
@@ -117,6 +118,7 @@
 #define X86_FEATURE_XSAVE       (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
 #define X86_FEATURE_OSXSAVE     (4*32+27) /* "" XSAVE enabled in the OS */
 #define X86_FEATURE_AVX         (4*32+28) /* Advanced Vector Extensions */
+#define X86_FEATURE_HYPERVISOR  (4*32+31) /* Running on a hypervisor */
 
 /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
 #define X86_FEATURE_XSTORE      (5*32+ 2) /* "rng" RNG present (xstore) */
@@ -237,6 +239,7 @@ extern const char * const x86_power_flags[32];
 #define cpu_has_xmm4_2          boot_cpu_has(X86_FEATURE_XMM4_2)
 #define cpu_has_x2apic          boot_cpu_has(X86_FEATURE_X2APIC)
 #define cpu_has_xsave           boot_cpu_has(X86_FEATURE_XSAVE)
+#define cpu_has_hypervisor      boot_cpu_has(X86_FEATURE_HYPERVISOR)
 
 #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
 # define cpu_has_invlpg         1
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index e6b82b17b072..dc27705f5443 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -320,16 +320,14 @@ static inline void set_intr_gate(unsigned int n, void *addr)
         _set_gate(n, GATE_INTERRUPT, addr, 0, 0, __KERNEL_CS);
 }
 
-#define SYS_VECTOR_FREE         0
-#define SYS_VECTOR_ALLOCED      1
-
 extern int first_system_vector;
-extern char system_vectors[];
+/* used_vectors is BITMAP for irq is not managed by percpu vector_irq */
+extern unsigned long used_vectors[];
 
 static inline void alloc_system_vector(int vector)
 {
-        if (system_vectors[vector] == SYS_VECTOR_FREE) {
-                system_vectors[vector] = SYS_VECTOR_ALLOCED;
+        if (!test_bit(vector, used_vectors)) {
+                set_bit(vector, used_vectors);
                 if (first_system_vector > vector)
                         first_system_vector = vector;
         } else
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 097794ff6b79..4035357f5b9d 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -65,18 +65,16 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
                 return dma_ops;
         else
                 return dev->archdata.dma_ops;
-#endif /* _ASM_X86_DMA_MAPPING_H */
+#endif
 }
 
 /* Make sure we keep the same behaviour */
 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
-#ifdef CONFIG_X86_64
         struct dma_mapping_ops *ops = get_dma_ops(dev);
         if (ops->mapping_error)
                 return ops->mapping_error(dev, dma_addr);
 
-#endif
         return (dma_addr == bad_dma_address);
 }
 
diff --git a/arch/x86/include/asm/ds.h b/arch/x86/include/asm/ds.h
index a95008457ea4..a8f672ba100c 100644
--- a/arch/x86/include/asm/ds.h
+++ b/arch/x86/include/asm/ds.h
@@ -6,14 +6,13 @@
  * precise-event based sampling (PEBS).
  *
  * It manages:
- * - per-thread and per-cpu allocation of BTS and PEBS
- * - buffer memory allocation (optional)
- * - buffer overflow handling
+ * - DS and BTS hardware configuration
+ * - buffer overflow handling (to be done)
  * - buffer access
  *
- * It assumes:
- * - get_task_struct on all parameter tasks
- * - current is allowed to trace parameter tasks
+ * It does not do:
+ * - security checking (is the caller allowed to trace the task)
+ * - buffer allocation (memory accounting)
  *
  *
  * Copyright (C) 2007-2008 Intel Corporation.
@@ -26,11 +25,51 @@
 
 #include <linux/types.h>
 #include <linux/init.h>
+#include <linux/err.h>
 
 
 #ifdef CONFIG_X86_DS
 
 struct task_struct;
+struct ds_context;
+struct ds_tracer;
+struct bts_tracer;
+struct pebs_tracer;
+
+typedef void (*bts_ovfl_callback_t)(struct bts_tracer *);
+typedef void (*pebs_ovfl_callback_t)(struct pebs_tracer *);
+
+
+/*
+ * A list of features plus corresponding macros to talk about them in
+ * the ds_request function's flags parameter.
+ *
+ * We use the enum to index an array of corresponding control bits;
+ * we use the macro to index a flags bit-vector.
+ */
+enum ds_feature {
+        dsf_bts = 0,
+        dsf_bts_kernel,
+#define BTS_KERNEL (1 << dsf_bts_kernel)
+        /* trace kernel-mode branches */
+
+        dsf_bts_user,
+#define BTS_USER (1 << dsf_bts_user)
+        /* trace user-mode branches */
+
+        dsf_bts_overflow,
+        dsf_bts_max,
+        dsf_pebs = dsf_bts_max,
+
+        dsf_pebs_max,
+        dsf_ctl_max = dsf_pebs_max,
+        dsf_bts_timestamps = dsf_ctl_max,
+#define BTS_TIMESTAMPS (1 << dsf_bts_timestamps)
+        /* add timestamps into BTS trace */
+
+#define BTS_USER_FLAGS (BTS_KERNEL | BTS_USER | BTS_TIMESTAMPS)
+};
+
 
 /*
  * Request BTS or PEBS
@@ -38,163 +77,169 @@ struct task_struct;
  * Due to alignement constraints, the actual buffer may be slightly
  * smaller than the requested or provided buffer.
  *
- * Returns 0 on success; -Eerrno otherwise
+ * Returns a pointer to a tracer structure on success, or
+ * ERR_PTR(errcode) on failure.
+ *
+ * The interrupt threshold is independent from the overflow callback
+ * to allow users to use their own overflow interrupt handling mechanism.
  *
  * task: the task to request recording for;
  *       NULL for per-cpu recording on the current cpu
  * base: the base pointer for the (non-pageable) buffer;
- *       NULL if buffer allocation requested
- * size: the size of the requested or provided buffer
+ * size: the size of the provided buffer in bytes
  * ovfl: pointer to a function to be called on buffer overflow;
  *       NULL if cyclic buffer requested
+ * th: the interrupt threshold in records from the end of the buffer;
+ *     -1 if no interrupt threshold is requested.
+ * flags: a bit-mask of the above flags
  */
-typedef void (*ds_ovfl_callback_t)(struct task_struct *);
-extern int ds_request_bts(struct task_struct *task, void *base, size_t size,
-                          ds_ovfl_callback_t ovfl);
-extern int ds_request_pebs(struct task_struct *task, void *base, size_t size,
-                           ds_ovfl_callback_t ovfl);
+extern struct bts_tracer *ds_request_bts(struct task_struct *task,
+                                         void *base, size_t size,
+                                         bts_ovfl_callback_t ovfl,
+                                         size_t th, unsigned int flags);
+extern struct pebs_tracer *ds_request_pebs(struct task_struct *task,
+                                           void *base, size_t size,
+                                           pebs_ovfl_callback_t ovfl,
+                                           size_t th, unsigned int flags);
 
 /*
  * Release BTS or PEBS resources
+ * Suspend and resume BTS or PEBS tracing
  *
- * Frees buffers allocated on ds_request.
- *
- * Returns 0 on success; -Eerrno otherwise
- *
- * task: the task to release resources for;
- *       NULL to release resources for the current cpu
+ * tracer: the tracer handle returned from ds_request_~()
  */
-extern int ds_release_bts(struct task_struct *task);
-extern int ds_release_pebs(struct task_struct *task);
+extern void ds_release_bts(struct bts_tracer *tracer);
+extern void ds_suspend_bts(struct bts_tracer *tracer);
+extern void ds_resume_bts(struct bts_tracer *tracer);
+extern void ds_release_pebs(struct pebs_tracer *tracer);
+extern void ds_suspend_pebs(struct pebs_tracer *tracer);
+extern void ds_resume_pebs(struct pebs_tracer *tracer);
 
-/*
- * Return the (array) index of the write pointer.
- * (assuming an array of BTS/PEBS records)
- *
- * Returns -Eerrno on error
- *
- * task: the task to access;
- *       NULL to access the current cpu
- * pos (out): if not NULL, will hold the result
- */
-extern int ds_get_bts_index(struct task_struct *task, size_t *pos);
-extern int ds_get_pebs_index(struct task_struct *task, size_t *pos);
 
 /*
- * Return the (array) index one record beyond the end of the array.
- * (assuming an array of BTS/PEBS records)
+ * The raw DS buffer state as it is used for BTS and PEBS recording.
  *
- * Returns -Eerrno on error
- *
- * task: the task to access;
- *       NULL to access the current cpu
- * pos (out): if not NULL, will hold the result
+ * This is the low-level, arch-dependent interface for working
+ * directly on the raw trace data.
  */
-extern int ds_get_bts_end(struct task_struct *task, size_t *pos);
-extern int ds_get_pebs_end(struct task_struct *task, size_t *pos);
+struct ds_trace {
+        /* the number of bts/pebs records */
+        size_t n;
+        /* the size of a bts/pebs record in bytes */
+        size_t size;
+        /* pointers into the raw buffer:
+           - to the first entry */
+        void *begin;
+        /* - one beyond the last entry */
+        void *end;
+        /* - one beyond the newest entry */
+        void *top;
+        /* - the interrupt threshold */
+        void *ith;
+        /* flags given on ds_request() */
+        unsigned int flags;
+};
 
 /*
- * Provide a pointer to the BTS/PEBS record at parameter index.
- * (assuming an array of BTS/PEBS records)
- *
- * The pointer points directly into the buffer. The user is
- * responsible for copying the record.
- *
- * Returns the size of a single record on success; -Eerrno on error
- *
- * task: the task to access;
- *       NULL to access the current cpu
- * index: the index of the requested record
- * record (out): pointer to the requested record
+ * An arch-independent view on branch trace data.
  */
-extern int ds_access_bts(struct task_struct *task,
-                         size_t index, const void **record);
-extern int ds_access_pebs(struct task_struct *task,
-                          size_t index, const void **record);
+enum bts_qualifier {
+        bts_invalid,
+#define BTS_INVALID bts_invalid
+
+        bts_branch,
+#define BTS_BRANCH bts_branch
+
+        bts_task_arrives,
+#define BTS_TASK_ARRIVES bts_task_arrives
+
+        bts_task_departs,
+#define BTS_TASK_DEPARTS bts_task_departs
+
+        bts_qual_bit_size = 4,
+        bts_qual_max = (1 << bts_qual_bit_size),
+};
+
+struct bts_struct {
+        __u64 qualifier;
+        union {
+                /* BTS_BRANCH */
+                struct {
+                        __u64 from;
+                        __u64 to;
+                } lbr;
+                /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */
+                struct {
+                        __u64 jiffies;
+                        pid_t pid;
+                } timestamp;
+        } variant;
+};
 
-/*
- * Write one or more BTS/PEBS records at the write pointer index and
- * advance the write pointer.
- *
- * If size is not a multiple of the record size, trailing bytes are
- * zeroed out.
- *
- * May result in one or more overflow notifications.
- *
- * If called during overflow handling, that is, with index >=
- * interrupt threshold, the write will wrap around.
- *
- * An overflow notification is given if and when the interrupt
- * threshold is reached during or after the write.
- *
- * Returns the number of bytes written or -Eerrno.
- *
- * task: the task to access;
- *       NULL to access the current cpu
- * buffer: the buffer to write
- * size: the size of the buffer
- */
-extern int ds_write_bts(struct task_struct *task,
-                        const void *buffer, size_t size);
-extern int ds_write_pebs(struct task_struct *task,
-                         const void *buffer, size_t size);
 
 /*
- * Same as ds_write_bts/pebs, but omit ownership checks.
+ * The BTS state.
  *
- * This is needed to have some other task than the owner of the
- * BTS/PEBS buffer or the parameter task itself write into the
- * respective buffer.
+ * This gives access to the raw DS state and adds functions to provide
+ * an arch-independent view of the BTS data.
  */
-extern int ds_unchecked_write_bts(struct task_struct *task,
-                                  const void *buffer, size_t size);
-extern int ds_unchecked_write_pebs(struct task_struct *task,
-                                   const void *buffer, size_t size);
+struct bts_trace {
+        struct ds_trace ds;
+
+        int (*read)(struct bts_tracer *tracer, const void *at,
+                    struct bts_struct *out);
+        int (*write)(struct bts_tracer *tracer, const struct bts_struct *in);
+};
+
 
 /*
- * Reset the write pointer of the BTS/PEBS buffer.
+ * The PEBS state.
  *
- * Returns 0 on success; -Eerrno on error
- *
- * task: the task to access;
- *       NULL to access the current cpu
+ * This gives access to the raw DS state and the PEBS-specific counter
+ * reset value.
  */
-extern int ds_reset_bts(struct task_struct *task);
-extern int ds_reset_pebs(struct task_struct *task);
+struct pebs_trace {
+        struct ds_trace ds;
+
+        /* the PEBS reset value */
+        unsigned long long reset_value;
+};
+
 
 /*
- * Clear the BTS/PEBS buffer and reset the write pointer.
- * The entire buffer will be zeroed out.
+ * Read the BTS or PEBS trace.
  *
- * Returns 0 on success; -Eerrno on error
+ * Returns a view on the trace collected for the parameter tracer.
+ *
+ * The view remains valid as long as the traced task is not running or
+ * the tracer is suspended.
+ * Writes into the trace buffer are not reflected.
  *
- * task: the task to access;
- *       NULL to access the current cpu
+ * tracer: the tracer handle returned from ds_request_~()
  */
-extern int ds_clear_bts(struct task_struct *task);
-extern int ds_clear_pebs(struct task_struct *task);
+extern const struct bts_trace *ds_read_bts(struct bts_tracer *tracer);
+extern const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer);
+
 
 /*
- * Provide the PEBS counter reset value.
+ * Reset the write pointer of the BTS/PEBS buffer.
  *
  * Returns 0 on success; -Eerrno on error
  *
- * task: the task to access;
- *       NULL to access the current cpu
- * value (out): the counter reset value
+ * tracer: the tracer handle returned from ds_request_~()
  */
-extern int ds_get_pebs_reset(struct task_struct *task, u64 *value);
+extern int ds_reset_bts(struct bts_tracer *tracer);
+extern int ds_reset_pebs(struct pebs_tracer *tracer);
 
 /*
  * Set the PEBS counter reset value.
  *
  * Returns 0 on success; -Eerrno on error
  *
- * task: the task to access;
- *       NULL to access the current cpu
+ * tracer: the tracer handle returned from ds_request_pebs()
  * value: the new counter reset value
  */
-extern int ds_set_pebs_reset(struct task_struct *task, u64 value);
+extern int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value);
 
 /*
  * Initialization
@@ -202,39 +247,26 @@ extern int ds_set_pebs_reset(struct task_struct *task, u64 value);
 struct cpuinfo_x86;
 extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *);
 
-
-
 /*
- * The DS context - part of struct thread_struct.
+ * Context switch work
  */
-struct ds_context {
-        /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
-        unsigned char *ds;
-        /* the owner of the BTS and PEBS configuration, respectively */
-        struct task_struct *owner[2];
-        /* buffer overflow notification function for BTS and PEBS */
-        ds_ovfl_callback_t callback[2];
-        /* the original buffer address */
-        void *buffer[2];
-        /* the number of allocated pages for on-request allocated buffers */
-        unsigned int pages[2];
-        /* use count */
-        unsigned long count;
-        /* a pointer to the context location inside the thread_struct
-         * or the per_cpu context array */
-        struct ds_context **this;
-        /* a pointer to the task owning this context, or NULL, if the
-         * context is owned by a cpu */
-        struct task_struct *task;
-};
+extern void ds_switch_to(struct task_struct *prev, struct task_struct *next);
 
-/* called by exit_thread() to free leftover contexts */
-extern void ds_free(struct ds_context *context);
+/*
+ * Task clone/init and cleanup work
+ */
+extern void ds_copy_thread(struct task_struct *tsk, struct task_struct *father);
+extern void ds_exit_thread(struct task_struct *tsk);
 
 #else /* CONFIG_X86_DS */
 
 struct cpuinfo_x86;
 static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {}
+static inline void ds_switch_to(struct task_struct *prev,
+                                struct task_struct *next) {}
+static inline void ds_copy_thread(struct task_struct *tsk,
+                                  struct task_struct *father) {}
+static inline void ds_exit_thread(struct task_struct *tsk) {}
 
 #endif /* CONFIG_X86_DS */
 #endif /* _ASM_X86_DS_H */
diff --git a/arch/x86/include/asm/dwarf2.h b/arch/x86/include/asm/dwarf2.h
index 804b6e6be929..3afc5e87cfdd 100644
--- a/arch/x86/include/asm/dwarf2.h
+++ b/arch/x86/include/asm/dwarf2.h
@@ -6,56 +6,91 @@
 #endif
 
 /*
-   Macros for dwarf2 CFI unwind table entries.
-   See "as.info" for details on these pseudo ops. Unfortunately
-   they are only supported in very new binutils, so define them
-   away for older version.
+ * Macros for dwarf2 CFI unwind table entries.
+ * See "as.info" for details on these pseudo ops. Unfortunately
+ * they are only supported in very new binutils, so define them
+ * away for older version.
  */
 
 #ifdef CONFIG_AS_CFI
 
-#define CFI_STARTPROC .cfi_startproc
-#define CFI_ENDPROC .cfi_endproc
-#define CFI_DEF_CFA .cfi_def_cfa
-#define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register
-#define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset
-#define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset
-#define CFI_OFFSET .cfi_offset
-#define CFI_REL_OFFSET .cfi_rel_offset
-#define CFI_REGISTER .cfi_register
-#define CFI_RESTORE .cfi_restore
-#define CFI_REMEMBER_STATE .cfi_remember_state
-#define CFI_RESTORE_STATE .cfi_restore_state
-#define CFI_UNDEFINED .cfi_undefined
+#define CFI_STARTPROC           .cfi_startproc
+#define CFI_ENDPROC             .cfi_endproc
+#define CFI_DEF_CFA             .cfi_def_cfa
+#define CFI_DEF_CFA_REGISTER    .cfi_def_cfa_register
+#define CFI_DEF_CFA_OFFSET      .cfi_def_cfa_offset
+#define CFI_ADJUST_CFA_OFFSET   .cfi_adjust_cfa_offset
+#define CFI_OFFSET              .cfi_offset
+#define CFI_REL_OFFSET          .cfi_rel_offset
+#define CFI_REGISTER            .cfi_register
+#define CFI_RESTORE             .cfi_restore
+#define CFI_REMEMBER_STATE      .cfi_remember_state
+#define CFI_RESTORE_STATE       .cfi_restore_state
+#define CFI_UNDEFINED           .cfi_undefined
 
 #ifdef CONFIG_AS_CFI_SIGNAL_FRAME
-#define CFI_SIGNAL_FRAME .cfi_signal_frame
+#define CFI_SIGNAL_FRAME        .cfi_signal_frame
 #else
 #define CFI_SIGNAL_FRAME
 #endif
 
 #else
 
-/* Due to the structure of pre-exisiting code, don't use assembler line
-   comment character # to ignore the arguments. Instead, use a dummy macro. */
+/*
+ * Due to the structure of pre-exisiting code, don't use assembler line
+ * comment character # to ignore the arguments. Instead, use a dummy macro.
+ */
 .macro cfi_ignore a=0, b=0, c=0, d=0
 .endm
 
-#define CFI_STARTPROC   cfi_ignore
-#define CFI_ENDPROC     cfi_ignore
-#define CFI_DEF_CFA     cfi_ignore
+#define CFI_STARTPROC           cfi_ignore
+#define CFI_ENDPROC             cfi_ignore
+#define CFI_DEF_CFA             cfi_ignore
 #define CFI_DEF_CFA_REGISTER    cfi_ignore
 #define CFI_DEF_CFA_OFFSET      cfi_ignore
 #define CFI_ADJUST_CFA_OFFSET   cfi_ignore
-#define CFI_OFFSET      cfi_ignore
-#define CFI_REL_OFFSET  cfi_ignore
-#define CFI_REGISTER    cfi_ignore
-#define CFI_RESTORE     cfi_ignore
-#define CFI_REMEMBER_STATE cfi_ignore
-#define CFI_RESTORE_STATE cfi_ignore
-#define CFI_UNDEFINED cfi_ignore
-#define CFI_SIGNAL_FRAME cfi_ignore
+#define CFI_OFFSET              cfi_ignore
+#define CFI_REL_OFFSET          cfi_ignore
+#define CFI_REGISTER            cfi_ignore
+#define CFI_RESTORE             cfi_ignore
+#define CFI_REMEMBER_STATE      cfi_ignore
+#define CFI_RESTORE_STATE       cfi_ignore
+#define CFI_UNDEFINED           cfi_ignore
+#define CFI_SIGNAL_FRAME        cfi_ignore
 
 #endif
 
+/*
+ * An attempt to make CFI annotations more or less
+ * correct and shorter. It is implied that you know
+ * what you're doing if you use them.
+ */
+#ifdef __ASSEMBLY__
+#ifdef CONFIG_X86_64
+        .macro pushq_cfi reg
+        pushq \reg
+        CFI_ADJUST_CFA_OFFSET 8
+        .endm
+
+        .macro popq_cfi reg
+        popq \reg
+        CFI_ADJUST_CFA_OFFSET -8
+        .endm
+
+        .macro movq_cfi reg offset=0
+        movq %\reg, \offset(%rsp)
+        CFI_REL_OFFSET \reg, \offset
+        .endm
+
+        .macro movq_cfi_restore offset reg
+        movq \offset(%rsp), %\reg
+        CFI_RESTORE \reg
+        .endm
+#else /*!CONFIG_X86_64*/
+
+        /* 32bit defenitions are missed yet */
+
+#endif /*!CONFIG_X86_64*/
+#endif /*__ASSEMBLY__*/
+
 #endif /* _ASM_X86_DWARF2_H */
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index a2e545c91c35..ca5ffb2856b6 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -90,6 +90,7 @@ extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size);
 
 #endif /* CONFIG_X86_32 */
 
+extern int add_efi_memmap;
 extern void efi_reserve_early(void);
 extern void efi_call_phys_prelog(void);
 extern void efi_call_phys_epilog(void);
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 40ca1bea7916..f51a3ddde01a 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -325,7 +325,7 @@ struct linux_binprm;
 
 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
 extern int arch_setup_additional_pages(struct linux_binprm *bprm,
-                                       int executable_stack);
+                                       int uses_interp);
 
 extern int syscall32_setup_pages(struct linux_binprm *, int exstack);
 #define compat_arch_setup_additional_pages      syscall32_setup_pages
diff --git a/arch/x86/include/asm/emergency-restart.h b/arch/x86/include/asm/emergency-restart.h
index 94826cf87455..cc70c1c78ca4 100644
--- a/arch/x86/include/asm/emergency-restart.h
+++ b/arch/x86/include/asm/emergency-restart.h
@@ -8,7 +8,9 @@ enum reboot_type {
         BOOT_BIOS = 'b',
 #endif
         BOOT_ACPI = 'a',
-        BOOT_EFI = 'e'
+        BOOT_EFI = 'e',
+        BOOT_CF9 = 'p',
+        BOOT_CF9_COND = 'q',
 };
 
 extern enum reboot_type reboot_type;
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 380f0b4f17ed..bc53d5ef1386 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -9,31 +9,27 @@ static inline int apic_id_registered(void)
                 return (1);
 }
 
-static inline cpumask_t target_cpus(void)
+static inline const cpumask_t *target_cpus_cluster(void)
 {
-#if defined CONFIG_ES7000_CLUSTERED_APIC
-        return CPU_MASK_ALL;
-#else
-        return cpumask_of_cpu(smp_processor_id());
-#endif
+        return &CPU_MASK_ALL;
 }
 
-#if defined CONFIG_ES7000_CLUSTERED_APIC
-#define APIC_DFR_VALUE          (APIC_DFR_CLUSTER)
-#define INT_DELIVERY_MODE       (dest_LowestPrio)
-#define INT_DEST_MODE           (1)    /* logical delivery broadcast to all procs */
-#define NO_BALANCE_IRQ          (1)
-#undef  WAKE_SECONDARY_VIA_INIT
-#define WAKE_SECONDARY_VIA_MIP
-#else
+static inline const cpumask_t *target_cpus(void)
+{
+        return &cpumask_of_cpu(smp_processor_id());
+}
+
+#define APIC_DFR_VALUE_CLUSTER          (APIC_DFR_CLUSTER)
+#define INT_DELIVERY_MODE_CLUSTER       (dest_LowestPrio)
+#define INT_DEST_MODE_CLUSTER           (1) /* logical delivery broadcast to all procs */
+#define NO_BALANCE_IRQ_CLUSTER          (1)
+
 #define APIC_DFR_VALUE          (APIC_DFR_FLAT)
 #define INT_DELIVERY_MODE       (dest_Fixed)
 #define INT_DEST_MODE           (0)    /* phys delivery to target procs */
 #define NO_BALANCE_IRQ          (0)
 #undef  APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL       0x0
-#define WAKE_SECONDARY_VIA_INIT
-#endif
 
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {
@@ -60,6 +56,16 @@ static inline unsigned long calculate_ldr(int cpu)
  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
  * document number 292116).  So here it goes...
  */
+static inline void init_apic_ldr_cluster(void)
+{
+        unsigned long val;
+        int cpu = smp_processor_id();
+
+        apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
+        val = calculate_ldr(cpu);
+        apic_write(APIC_LDR, val);
+}
+
 static inline void init_apic_ldr(void)
 {
         unsigned long val;
@@ -70,17 +76,14 @@ static inline void init_apic_ldr(void)
         apic_write(APIC_LDR, val);
 }
 
-#ifndef CONFIG_X86_GENERICARCH
-extern void enable_apic_mode(void);
-#endif
-
 extern int apic_version [MAX_APICS];
 static inline void setup_apic_routing(void)
 {
         int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
-        printk("Enabling APIC mode:  %s.  Using %d I/O APICs, target cpus %lx\n",
+        printk("Enabling APIC mode:  %s. Using %d I/O APICs, target cpus %lx\n",
                 (apic_version[apic] == 0x14) ?
-                "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(target_cpus())[0]);
+                        "Physical Cluster" : "Logical Cluster",
+                        nr_ioapics, cpus_addr(*target_cpus())[0]);
 }
 
 static inline int multi_timer_check(int apic, int irq)
@@ -98,7 +101,7 @@ static inline int cpu_present_to_apicid(int mps_cpu)
 {
         if (!mps_cpu)
                 return boot_cpu_physical_apicid;
-        else if (mps_cpu < NR_CPUS)
+        else if (mps_cpu < nr_cpu_ids)
                 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
         else
                 return BAD_APICID;
@@ -118,9 +121,9 @@ extern u8 cpu_2_logical_apicid[];
 static inline int cpu_to_logical_apicid(int cpu)
 {
 #ifdef CONFIG_SMP
-       if (cpu >= NR_CPUS)
-               return BAD_APICID;
-       return (int)cpu_2_logical_apicid[cpu];
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return (int)cpu_2_logical_apicid[cpu];
 #else
         return logical_smp_processor_id();
 #endif
@@ -144,38 +147,64 @@ static inline int check_phys_apicid_present(int cpu_physical_apicid)
         return (1);
 }
 
-static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
+static inline unsigned int
+cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
 {
         int num_bits_set;
         int cpus_found = 0;
         int cpu;
         int apicid;
 
-        num_bits_set = cpus_weight(cpumask);
+        num_bits_set = cpumask_weight(cpumask);
         /* Return id to all */
-        if (num_bits_set == NR_CPUS)
-#if defined CONFIG_ES7000_CLUSTERED_APIC
+        if (num_bits_set == nr_cpu_ids)
                 return 0xFF;
-#else
-                return cpu_to_logical_apicid(0);
-#endif
         /*
          * The cpus in the mask must all be on the apic cluster.  If are not
          * on the same apicid cluster return default value of TARGET_CPUS.
          */
-        cpu = first_cpu(cpumask);
+        cpu = cpumask_first(cpumask);
         apicid = cpu_to_logical_apicid(cpu);
         while (cpus_found < num_bits_set) {
-                if (cpu_isset(cpu, cpumask)) {
+                if (cpumask_test_cpu(cpu, cpumask)) {
                         int new_apicid = cpu_to_logical_apicid(cpu);
                         if (apicid_cluster(apicid) !=
                                         apicid_cluster(new_apicid)){
                                 printk ("%s: Not a valid mask!\n", __func__);
-#if defined CONFIG_ES7000_CLUSTERED_APIC
                                 return 0xFF;
-#else
+                        }
+                        apicid = new_apicid;
+                        cpus_found++;
+                }
+                cpu++;
+        }
+        return apicid;
+}
+
+static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        int num_bits_set;
+        int cpus_found = 0;
+        int cpu;
+        int apicid;
+
+        num_bits_set = cpus_weight(*cpumask);
+        /* Return id to all */
+        if (num_bits_set == nr_cpu_ids)
+                return cpu_to_logical_apicid(0);
+        /*
+         * The cpus in the mask must all be on the apic cluster.  If are not
+         * on the same apicid cluster return default value of TARGET_CPUS.
+         */
+        cpu = first_cpu(*cpumask);
+        apicid = cpu_to_logical_apicid(cpu);
+        while (cpus_found < num_bits_set) {
+                if (cpu_isset(cpu, *cpumask)) {
+                        int new_apicid = cpu_to_logical_apicid(cpu);
+                        if (apicid_cluster(apicid) !=
+                                        apicid_cluster(new_apicid)){
+                                printk ("%s: Not a valid mask!\n", __func__);
                                 return cpu_to_logical_apicid(0);
-#endif
                         }
                         apicid = new_apicid;
                         cpus_found++;
@@ -185,6 +214,24 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
         return apicid;
 }
 
+
+static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
+                                                  const struct cpumask *andmask)
+{
+        int apicid = cpu_to_logical_apicid(0);
+        cpumask_var_t cpumask;
+
+        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
+                return apicid;
+
+        cpumask_and(cpumask, inmask, andmask);
+        cpumask_and(cpumask, cpumask, cpu_online_mask);
+        apicid = cpu_mask_to_apicid(cpumask);
+
+        free_cpumask_var(cpumask);
+        return apicid;
+}
+
 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
 {
         return cpuid_apic >> index_msb;
diff --git a/arch/x86/include/asm/es7000/ipi.h b/arch/x86/include/asm/es7000/ipi.h
index 632a955fcc0a..7e8ed24d4b8a 100644
--- a/arch/x86/include/asm/es7000/ipi.h
+++ b/arch/x86/include/asm/es7000/ipi.h
@@ -1,24 +1,22 @@
 #ifndef __ASM_ES7000_IPI_H
 #define __ASM_ES7000_IPI_H
 
-void send_IPI_mask_sequence(cpumask_t mask, int vector);
+void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
+void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
 
-static inline void send_IPI_mask(cpumask_t mask, int vector)
+static inline void send_IPI_mask(const struct cpumask *mask, int vector)
 {
         send_IPI_mask_sequence(mask, vector);
 }
 
 static inline void send_IPI_allbutself(int vector)
 {
-        cpumask_t mask = cpu_online_map;
-        cpu_clear(smp_processor_id(), mask);
-        if (!cpus_empty(mask))
-                send_IPI_mask(mask, vector);
+        send_IPI_mask_allbutself(cpu_online_mask, vector);
 }
 
 static inline void send_IPI_all(int vector)
 {
-        send_IPI_mask(cpu_online_map, vector);
+        send_IPI_mask(cpu_online_mask, vector);
 }
 
 #endif /* __ASM_ES7000_IPI_H */
diff --git a/arch/x86/include/asm/es7000/wakecpu.h b/arch/x86/include/asm/es7000/wakecpu.h
index 398493461913..78f0daaee436 100644
--- a/arch/x86/include/asm/es7000/wakecpu.h
+++ b/arch/x86/include/asm/es7000/wakecpu.h
@@ -1,36 +1,12 @@
 #ifndef __ASM_ES7000_WAKECPU_H
 #define __ASM_ES7000_WAKECPU_H
 
-/*
- * This file copes with machines that wakeup secondary CPUs by the
- * INIT, INIT, STARTUP sequence.
- */
-
-#ifdef CONFIG_ES7000_CLUSTERED_APIC
-#define WAKE_SECONDARY_VIA_MIP
-#else
-#define WAKE_SECONDARY_VIA_INIT
-#endif
-
-#ifdef WAKE_SECONDARY_VIA_MIP
-extern int es7000_start_cpu(int cpu, unsigned long eip);
-static inline int
-wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
-{
-        int boot_error = 0;
-        boot_error = es7000_start_cpu(phys_apicid, start_eip);
-        return boot_error;
-}
-#endif
-
-#define TRAMPOLINE_LOW phys_to_virt(0x467)
-#define TRAMPOLINE_HIGH phys_to_virt(0x469)
-
-#define boot_cpu_apicid boot_cpu_physical_apicid
+#define TRAMPOLINE_PHYS_LOW     0x467
+#define TRAMPOLINE_PHYS_HIGH    0x469
 
 static inline void wait_for_init_deassert(atomic_t *deassert)
 {
-#ifdef WAKE_SECONDARY_VIA_INIT
+#ifndef CONFIG_ES7000_CLUSTERED_APIC
         while (!atomic_read(deassert))
                 cpu_relax();
 #endif
@@ -50,9 +26,12 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
 {
 }
 
-#define inquire_remote_apic(apicid) do {                \
-                if (apic_verbosity >= APIC_DEBUG)       \
-                        __inquire_remote_apic(apicid);  \
-        } while (0)
+extern void __inquire_remote_apic(int apicid);
+
+static inline void inquire_remote_apic(int apicid)
+{
+        if (apic_verbosity >= APIC_DEBUG)
+                __inquire_remote_apic(apicid);
+}
 
 #endif /* __ASM_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/ftrace.h b/arch/x86/include/asm/ftrace.h
index 9e8bc29b8b17..b55b4a7fbefd 100644
--- a/arch/x86/include/asm/ftrace.h
+++ b/arch/x86/include/asm/ftrace.h
@@ -1,6 +1,33 @@
 #ifndef _ASM_X86_FTRACE_H
 #define _ASM_X86_FTRACE_H
 
+#ifdef __ASSEMBLY__
+
+        .macro MCOUNT_SAVE_FRAME
+        /* taken from glibc */
+        subq $0x38, %rsp
+        movq %rax, (%rsp)
+        movq %rcx, 8(%rsp)
+        movq %rdx, 16(%rsp)
+        movq %rsi, 24(%rsp)
+        movq %rdi, 32(%rsp)
+        movq %r8, 40(%rsp)
+        movq %r9, 48(%rsp)
+        .endm
+
+        .macro MCOUNT_RESTORE_FRAME
+        movq 48(%rsp), %r9
+        movq 40(%rsp), %r8
+        movq 32(%rsp), %rdi
+        movq 24(%rsp), %rsi
+        movq 16(%rsp), %rdx
+        movq 8(%rsp), %rcx
+        movq (%rsp), %rax
+        addq $0x38, %rsp
+        .endm
+
+#endif
+
 #ifdef CONFIG_FUNCTION_TRACER
 #define MCOUNT_ADDR             ((long)(mcount))
 #define MCOUNT_INSN_SIZE        5 /* sizeof mcount call */
@@ -17,8 +44,40 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
          */
         return addr - 1;
 }
-#endif
 
+#ifdef CONFIG_DYNAMIC_FTRACE
+
+struct dyn_arch_ftrace {
+        /* No extra data needed for x86 */
+};
+
+#endif /*  CONFIG_DYNAMIC_FTRACE */
+#endif /* __ASSEMBLY__ */
 #endif /* CONFIG_FUNCTION_TRACER */
 
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Stack of return addresses for functions
+ * of a thread.
+ * Used in struct thread_info
+ */
+struct ftrace_ret_stack {
+        unsigned long ret;
+        unsigned long func;
+        unsigned long long calltime;
+};
+
+/*
+ * Primary handler of a function return.
+ * It relays on ftrace_return_to_handler.
+ * Defined in entry_32/64.S
+ */
+extern void return_to_handler(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+
 #endif /* _ASM_X86_FTRACE_H */
diff --git a/arch/x86/include/asm/gart.h b/arch/x86/include/asm/gart.h
index 74252264433d..6cfdafa409d8 100644
--- a/arch/x86/include/asm/gart.h
+++ b/arch/x86/include/asm/gart.h
@@ -29,6 +29,39 @@ extern int fix_aperture;
 #define AMD64_GARTCACHECTL      0x9c
 #define AMD64_GARTEN            (1<<0)
 
+#ifdef CONFIG_GART_IOMMU
+extern int gart_iommu_aperture;
+extern int gart_iommu_aperture_allowed;
+extern int gart_iommu_aperture_disabled;
+
+extern void early_gart_iommu_check(void);
+extern void gart_iommu_init(void);
+extern void gart_iommu_shutdown(void);
+extern void __init gart_parse_options(char *);
+extern void gart_iommu_hole_init(void);
+
+#else
+#define gart_iommu_aperture            0
+#define gart_iommu_aperture_allowed    0
+#define gart_iommu_aperture_disabled   1
+
+static inline void early_gart_iommu_check(void)
+{
+}
+static inline void gart_iommu_init(void)
+{
+}
+static inline void gart_iommu_shutdown(void)
+{
+}
+static inline void gart_parse_options(char *options)
+{
+}
+static inline void gart_iommu_hole_init(void)
+{
+}
+#endif
+
 extern int agp_amd64_init(void);
 
 static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h
index 5cbd4fcc06fd..746f37a7963a 100644
--- a/arch/x86/include/asm/genapic_32.h
+++ b/arch/x86/include/asm/genapic_32.h
@@ -2,6 +2,7 @@
 #define _ASM_X86_GENAPIC_32_H
 
 #include <asm/mpspec.h>
+#include <asm/atomic.h>
 
 /*
  * Generic APIC driver interface.
@@ -23,7 +24,7 @@ struct genapic {
         int (*probe)(void);
 
         int (*apic_id_registered)(void);
-        cpumask_t (*target_cpus)(void);
+        const struct cpumask *(*target_cpus)(void);
         int int_delivery_mode;
         int int_dest_mode;
         int ESR_DISABLE;
@@ -56,15 +57,27 @@ struct genapic {
 
         unsigned (*get_apic_id)(unsigned long x);
         unsigned long apic_id_mask;
-        unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
-        cpumask_t (*vector_allocation_domain)(int cpu);
+        unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
+        unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
+                                               const struct cpumask *andmask);
+        void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
 
 #ifdef CONFIG_SMP
         /* ipi */
-        void (*send_IPI_mask)(cpumask_t mask, int vector);
+        void (*send_IPI_mask)(const struct cpumask *mask, int vector);
+        void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
+                                         int vector);
         void (*send_IPI_allbutself)(int vector);
         void (*send_IPI_all)(int vector);
 #endif
+        int (*wakeup_cpu)(int apicid, unsigned long start_eip);
+        int trampoline_phys_low;
+        int trampoline_phys_high;
+        void (*wait_for_init_deassert)(atomic_t *deassert);
+        void (*smp_callin_clear_local_apic)(void);
+        void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
+        void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
+        void (*inquire_remote_apic)(int apicid);
 };
 
 #define APICFUNC(x) .x = x,
@@ -105,16 +118,25 @@ struct genapic {
         APICFUNC(get_apic_id)                           \
         .apic_id_mask = APIC_ID_MASK,                   \
         APICFUNC(cpu_mask_to_apicid)                    \
-        APICFUNC(vector_allocation_domain)                      \
+        APICFUNC(cpu_mask_to_apicid_and)                \
+        APICFUNC(vector_allocation_domain)              \
         APICFUNC(acpi_madt_oem_check)                   \
         IPIFUNC(send_IPI_mask)                          \
         IPIFUNC(send_IPI_allbutself)                    \
         IPIFUNC(send_IPI_all)                           \
         APICFUNC(enable_apic_mode)                      \
         APICFUNC(phys_pkg_id)                           \
+        .trampoline_phys_low = TRAMPOLINE_PHYS_LOW,             \
+        .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH,           \
+        APICFUNC(wait_for_init_deassert)                \
+        APICFUNC(smp_callin_clear_local_apic)           \
+        APICFUNC(store_NMI_vector)                      \
+        APICFUNC(restore_NMI_vector)                    \
+        APICFUNC(inquire_remote_apic)                   \
 }
 
 extern struct genapic *genapic;
+extern void es7000_update_genapic_to_cluster(void);
 
 enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
 #define get_uv_system_type()            UV_NONE
diff --git a/arch/x86/include/asm/genapic_64.h b/arch/x86/include/asm/genapic_64.h
index 13c4e96199ea..adf32fb56aa6 100644
--- a/arch/x86/include/asm/genapic_64.h
+++ b/arch/x86/include/asm/genapic_64.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_GENAPIC_64_H
 #define _ASM_X86_GENAPIC_64_H
 
+#include <linux/cpumask.h>
+
 /*
  * Copyright 2004 James Cleverdon, IBM.
  * Subject to the GNU Public License, v.2
@@ -18,20 +20,26 @@ struct genapic {
         u32 int_delivery_mode;
         u32 int_dest_mode;
         int (*apic_id_registered)(void);
-        cpumask_t (*target_cpus)(void);
-        cpumask_t (*vector_allocation_domain)(int cpu);
+        const struct cpumask *(*target_cpus)(void);
+        void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
         void (*init_apic_ldr)(void);
         /* ipi */
-        void (*send_IPI_mask)(cpumask_t mask, int vector);
+        void (*send_IPI_mask)(const struct cpumask *mask, int vector);
+        void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
+                                         int vector);
         void (*send_IPI_allbutself)(int vector);
         void (*send_IPI_all)(int vector);
         void (*send_IPI_self)(int vector);
         /* */
-        unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
+        unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
+        unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
+                                               const struct cpumask *andmask);
         unsigned int (*phys_pkg_id)(int index_msb);
         unsigned int (*get_apic_id)(unsigned long x);
         unsigned long (*set_apic_id)(unsigned int id);
         unsigned long apic_id_mask;
+        /* wakeup_secondary_cpu */
+        int (*wakeup_cpu)(int apicid, unsigned long start_eip);
 };
 
 extern struct genapic *genapic;
diff --git a/arch/x86/include/asm/hardirq_32.h b/arch/x86/include/asm/hardirq_32.h
index 5ca135e72f2b..cf7954d1405f 100644
--- a/arch/x86/include/asm/hardirq_32.h
+++ b/arch/x86/include/asm/hardirq_32.h
@@ -22,6 +22,8 @@ DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
 #define __ARCH_IRQ_STAT
 #define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member)
 
+#define inc_irq_stat(member)    (__get_cpu_var(irq_stat).member++)
+
 void ack_bad_irq(unsigned int irq);
 #include <linux/irq_cpustat.h>
 
diff --git a/arch/x86/include/asm/hardirq_64.h b/arch/x86/include/asm/hardirq_64.h
index 1ba381fc51d3..b5a6b5d56704 100644
--- a/arch/x86/include/asm/hardirq_64.h
+++ b/arch/x86/include/asm/hardirq_64.h
@@ -11,6 +11,8 @@
 
 #define __ARCH_IRQ_STAT 1
 
+#define inc_irq_stat(member)    add_pda(member, 1)
+
 #define local_softirq_pending() read_pda(__softirq_pending)
 
 #define __ARCH_SET_SOFTIRQ_PENDING 1
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index b97aecb0b61d..8de644b6b959 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -109,9 +109,7 @@ extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *);
 #endif
 #endif
 
-#ifdef CONFIG_X86_32
-extern void (*const interrupt[NR_VECTORS])(void);
-#endif
+extern void (*__initconst interrupt[NR_VECTORS-FIRST_EXTERNAL_VECTOR])(void);
 
 typedef int vector_irq_t[NR_VECTORS];
 DECLARE_PER_CPU(vector_irq_t, vector_irq);
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h
new file mode 100644
index 000000000000..369f5c5d09a1
--- /dev/null
+++ b/arch/x86/include/asm/hypervisor.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2008, VMware, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+#ifndef ASM_X86__HYPERVISOR_H
+#define ASM_X86__HYPERVISOR_H
+
+extern unsigned long get_hypervisor_tsc_freq(void);
+extern void init_hypervisor(struct cpuinfo_x86 *c);
+
+#endif
diff --git a/arch/x86/include/asm/ia32.h b/arch/x86/include/asm/ia32.h
index 97989c0e534c..50ca486fd88c 100644
--- a/arch/x86/include/asm/ia32.h
+++ b/arch/x86/include/asm/ia32.h
@@ -129,24 +129,6 @@ typedef struct compat_siginfo {
         } _sifields;
 } compat_siginfo_t;
 
-struct sigframe32 {
-        u32 pretcode;
-        int sig;
-        struct sigcontext_ia32 sc;
-        struct _fpstate_ia32 fpstate;
-        unsigned int extramask[_COMPAT_NSIG_WORDS-1];
-};
-
-struct rt_sigframe32 {
-        u32 pretcode;
-        int sig;
-        u32 pinfo;
-        u32 puc;
-        compat_siginfo_t info;
-        struct ucontext_ia32 uc;
-        struct _fpstate_ia32 fpstate;
-};
-
 struct ustat32 {
         __u32                   f_tfree;
         compat_ino_t            f_tinode;
diff --git a/arch/x86/include/asm/idle.h b/arch/x86/include/asm/idle.h
index 44c89c3a23e9..38d87379e270 100644
--- a/arch/x86/include/asm/idle.h
+++ b/arch/x86/include/asm/idle.h
@@ -8,8 +8,13 @@ struct notifier_block;
 void idle_notifier_register(struct notifier_block *n);
 void idle_notifier_unregister(struct notifier_block *n);
 
+#ifdef CONFIG_X86_64
 void enter_idle(void);
 void exit_idle(void);
+#else /* !CONFIG_X86_64 */
+static inline void enter_idle(void) { }
+static inline void exit_idle(void) { }
+#endif /* CONFIG_X86_64 */
 
 void c1e_remove_cpu(int cpu);
 
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index ac2abc88cd95..05cfed4485fa 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -4,6 +4,7 @@
 #define ARCH_HAS_IOREMAP_WC
 
 #include <linux/compiler.h>
+#include <asm-generic/int-ll64.h>
 
 #define build_mmio_read(name, size, type, reg, barrier) \
 static inline type name(const volatile void __iomem *addr) \
@@ -45,21 +46,39 @@ build_mmio_write(__writel, "l", unsigned int, "r", )
 #define mmiowb() barrier()
 
 #ifdef CONFIG_X86_64
+
 build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
-build_mmio_read(__readq, "q", unsigned long, "=r", )
 build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
-build_mmio_write(__writeq, "q", unsigned long, "r", )
 
-#define readq_relaxed(a) __readq(a)
-#define __raw_readq __readq
-#define __raw_writeq writeq
+#else
+
+static inline __u64 readq(const volatile void __iomem *addr)
+{
+        const volatile u32 __iomem *p = addr;
+        u32 low, high;
+
+        low = readl(p);
+        high = readl(p + 1);
+
+        return low + ((u64)high << 32);
+}
+
+static inline void writeq(__u64 val, volatile void __iomem *addr)
+{
+        writel(val, addr);
+        writel(val >> 32, addr+4);
+}
 
-/* Let people know we have them */
-#define readq readq
-#define writeq writeq
 #endif
 
-extern int iommu_bio_merge;
+#define readq_relaxed(a)        readq(a)
+
+#define __raw_readq(a)          readq(a)
+#define __raw_writeq(val, addr) writeq(val, addr)
+
+/* Let people know that we have them */
+#define readq                   readq
+#define writeq                  writeq
 
 #ifdef CONFIG_X86_32
 # include "io_32.h"
diff --git a/arch/x86/include/asm/io_64.h b/arch/x86/include/asm/io_64.h
index fea325a1122f..563c16270ba6 100644
--- a/arch/x86/include/asm/io_64.h
+++ b/arch/x86/include/asm/io_64.h
@@ -232,8 +232,6 @@ void memset_io(volatile void __iomem *a, int b, size_t c);
 
 #define flush_write_buffers()
 
-#define BIO_VMERGE_BOUNDARY iommu_bio_merge
-
 /*
  * Convert a virtual cached pointer to an uncached pointer
  */
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 6afd9933a7dd..7a1f44ac1f17 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -156,11 +156,21 @@ extern int sis_apic_bug;
 /* 1 if "noapic" boot option passed */
 extern int skip_ioapic_setup;
 
+/* 1 if "noapic" boot option passed */
+extern int noioapicquirk;
+
+/* -1 if "noapic" boot option passed */
+extern int noioapicreroute;
+
 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 extern int timer_through_8259;
 
 static inline void disable_ioapic_setup(void)
 {
+#ifdef CONFIG_PCI
+        noioapicquirk = 1;
+        noioapicreroute = -1;
+#endif
         skip_ioapic_setup = 1;
 }
 
@@ -188,17 +198,14 @@ extern void restore_IO_APIC_setup(void);
 extern void reinit_intr_remapped_IO_APIC(int);
 #endif
 
-extern int probe_nr_irqs(void);
+extern void probe_nr_irqs_gsi(void);
 
 #else  /* !CONFIG_X86_IO_APIC */
 #define io_apic_assign_pci_irqs 0
 static const int timer_through_8259 = 0;
-static inline void ioapic_init_mappings(void) { }
+static inline void ioapic_init_mappings(void)   { }
 
-static inline int probe_nr_irqs(void)
-{
-        return NR_IRQS;
-}
+static inline void probe_nr_irqs_gsi(void)      { }
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/iommu.h b/arch/x86/include/asm/iommu.h
index 0b500c5b6446..a6ee9e6f530f 100644
--- a/arch/x86/include/asm/iommu.h
+++ b/arch/x86/include/asm/iommu.h
@@ -7,42 +7,7 @@ extern struct dma_mapping_ops nommu_dma_ops;
 extern int force_iommu, no_iommu;
 extern int iommu_detected;
 
-extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len);
-
 /* 10 seconds */
 #define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000)
 
-#ifdef CONFIG_GART_IOMMU
-extern int gart_iommu_aperture;
-extern int gart_iommu_aperture_allowed;
-extern int gart_iommu_aperture_disabled;
-
-extern void early_gart_iommu_check(void);
-extern void gart_iommu_init(void);
-extern void gart_iommu_shutdown(void);
-extern void __init gart_parse_options(char *);
-extern void gart_iommu_hole_init(void);
-
-#else
-#define gart_iommu_aperture            0
-#define gart_iommu_aperture_allowed    0
-#define gart_iommu_aperture_disabled   1
-
-static inline void early_gart_iommu_check(void)
-{
-}
-static inline void gart_iommu_init(void)
-{
-}
-static inline void gart_iommu_shutdown(void)
-{
-}
-static inline void gart_parse_options(char *options)
-{
-}
-static inline void gart_iommu_hole_init(void)
-{
-}
-#endif
-
 #endif /* _ASM_X86_IOMMU_H */
diff --git a/arch/x86/include/asm/ipi.h b/arch/x86/include/asm/ipi.h
index f89dffb28aa9..c745a306f7d3 100644
--- a/arch/x86/include/asm/ipi.h
+++ b/arch/x86/include/asm/ipi.h
@@ -117,7 +117,8 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector,
         native_apic_mem_write(APIC_ICR, cfg);
 }
 
-static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
+static inline void send_IPI_mask_sequence(const struct cpumask *mask,
+                                          int vector)
 {
         unsigned long flags;
         unsigned long query_cpu;
@@ -128,11 +129,29 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
          * - mbligh
          */
         local_irq_save(flags);
-        for_each_cpu_mask_nr(query_cpu, mask) {
+        for_each_cpu(query_cpu, mask) {
                 __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu),
                                       vector, APIC_DEST_PHYSICAL);
         }
         local_irq_restore(flags);
 }
 
+static inline void send_IPI_mask_allbutself(const struct cpumask *mask,
+                                            int vector)
+{
+        unsigned long flags;
+        unsigned int query_cpu;
+        unsigned int this_cpu = smp_processor_id();
+
+        /* See Hack comment above */
+
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask)
+                if (query_cpu != this_cpu)
+                        __send_IPI_dest_field(
+                                per_cpu(x86_cpu_to_apicid, query_cpu),
+                                vector, APIC_DEST_PHYSICAL);
+        local_irq_restore(flags);
+}
+
 #endif /* _ASM_X86_IPI_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index bae0eda95486..592688ed04d3 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -31,13 +31,9 @@ static inline int irq_canonicalize(int irq)
 # endif
 #endif
 
-#ifdef CONFIG_IRQBALANCE
-extern int irqbalance_disable(char *str);
-#endif
-
 #ifdef CONFIG_HOTPLUG_CPU
 #include <linux/cpumask.h>
-extern void fixup_irqs(cpumask_t map);
+extern void fixup_irqs(void);
 #endif
 
 extern unsigned int do_IRQ(struct pt_regs *regs);
@@ -46,5 +42,6 @@ extern void native_init_IRQ(void);
 
 /* Interrupt vector management */
 extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
+extern int vector_used_by_percpu_irq(unsigned int vector);
 
 #endif /* _ASM_X86_IRQ_H */
diff --git a/arch/x86/include/asm/irq_regs_32.h b/arch/x86/include/asm/irq_regs_32.h
index af2f02d27fc7..86afd7473457 100644
--- a/arch/x86/include/asm/irq_regs_32.h
+++ b/arch/x86/include/asm/irq_regs_32.h
@@ -9,6 +9,8 @@
 
 #include <asm/percpu.h>
 
+#define ARCH_HAS_OWN_IRQ_REGS
+
 DECLARE_PER_CPU(struct pt_regs *, irq_regs);
 
 static inline struct pt_regs *get_irq_regs(void)
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 0005adb0f941..f7ff65032b9d 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -101,12 +101,23 @@
 #define LAST_VM86_IRQ           15
 #define invalid_vm86_irq(irq)   ((irq) < 3 || (irq) > 15)
 
+#define NR_IRQS_LEGACY          16
+
 #if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER)
+
+#ifndef CONFIG_SPARSE_IRQ
 # if NR_CPUS < MAX_IO_APICS
 #  define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
 # else
 #  define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
 # endif
+#else
+# if (8 * NR_CPUS) > (32 * MAX_IO_APICS)
+#  define NR_IRQS (NR_VECTORS + (8 * NR_CPUS))
+# else
+#  define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
+# endif
+#endif
 
 #elif defined(CONFIG_X86_VOYAGER)
 
diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h
index a1f22771a15a..c61d8b2ab8b9 100644
--- a/arch/x86/include/asm/kexec.h
+++ b/arch/x86/include/asm/kexec.h
@@ -5,21 +5,8 @@
 # define PA_CONTROL_PAGE        0
 # define VA_CONTROL_PAGE        1
 # define PA_PGD                 2
-# define VA_PGD                 3
-# define PA_PTE_0               4
-# define VA_PTE_0               5
-# define PA_PTE_1               6
-# define VA_PTE_1               7
-# define PA_SWAP_PAGE           8
-# ifdef CONFIG_X86_PAE
-#  define PA_PMD_0              9
-#  define VA_PMD_0              10
-#  define PA_PMD_1              11
-#  define VA_PMD_1              12
-#  define PAGES_NR              13
-# else
-#  define PAGES_NR              9
-# endif
+# define PA_SWAP_PAGE           3
+# define PAGES_NR               4
 #else
 # define PA_CONTROL_PAGE        0
 # define VA_CONTROL_PAGE        1
@@ -170,6 +157,20 @@ relocate_kernel(unsigned long indirection_page,
                 unsigned long start_address) ATTRIB_NORET;
 #endif
 
+#ifdef CONFIG_X86_32
+#define ARCH_HAS_KIMAGE_ARCH
+
+struct kimage_arch {
+        pgd_t *pgd;
+#ifdef CONFIG_X86_PAE
+        pmd_t *pmd0;
+        pmd_t *pmd1;
+#endif
+        pte_t *pte0;
+        pte_t *pte1;
+};
+#endif
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_X86_KEXEC_H */
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 8346be87cfa1..730843d1d2fb 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -21,6 +21,7 @@
 
 #include <asm/pvclock-abi.h>
 #include <asm/desc.h>
+#include <asm/mtrr.h>
 
 #define KVM_MAX_VCPUS 16
 #define KVM_MEMORY_SLOTS 32
@@ -86,6 +87,7 @@
 #define KVM_MIN_FREE_MMU_PAGES 5
 #define KVM_REFILL_PAGES 25
 #define KVM_MAX_CPUID_ENTRIES 40
+#define KVM_NR_FIXED_MTRR_REGION 88
 #define KVM_NR_VAR_MTRR 8
 
 extern spinlock_t kvm_lock;
@@ -180,6 +182,8 @@ struct kvm_mmu_page {
         struct list_head link;
         struct hlist_node hash_link;
 
+        struct list_head oos_link;
+
         /*
          * The following two entries are used to key the shadow page in the
          * hash table.
@@ -190,13 +194,16 @@ struct kvm_mmu_page {
         u64 *spt;
         /* hold the gfn of each spte inside spt */
         gfn_t *gfns;
-        unsigned long slot_bitmap; /* One bit set per slot which has memory
-                                    * in this shadow page.
-                                    */
+        /*
+         * One bit set per slot which has memory
+         * in this shadow page.
+         */
+        DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
         int multimapped;         /* More than one parent_pte? */
         int root_count;          /* Currently serving as active root */
         bool unsync;
-        bool unsync_children;
+        bool global;
+        unsigned int unsync_children;
         union {
                 u64 *parent_pte;               /* !multimapped */
                 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
@@ -327,8 +334,10 @@ struct kvm_vcpu_arch {
 
         bool nmi_pending;
         bool nmi_injected;
+        bool nmi_window_open;
 
-        u64 mtrr[0x100];
+        struct mtrr_state_type mtrr_state;
+        u32 pat;
 };
 
 struct kvm_mem_alias {
@@ -350,11 +359,13 @@ struct kvm_arch{
          */
         struct list_head active_mmu_pages;
         struct list_head assigned_dev_head;
-        struct dmar_domain *intel_iommu_domain;
+        struct list_head oos_global_pages;
+        struct iommu_domain *iommu_domain;
         struct kvm_pic *vpic;
         struct kvm_ioapic *vioapic;
         struct kvm_pit *vpit;
         struct hlist_head irq_ack_notifier_list;
+        int vapics_in_nmi_mode;
 
         int round_robin_prev_vcpu;
         unsigned int tss_addr;
@@ -378,6 +389,7 @@ struct kvm_vm_stat {
         u32 mmu_recycled;
         u32 mmu_cache_miss;
         u32 mmu_unsync;
+        u32 mmu_unsync_global;
         u32 remote_tlb_flush;
         u32 lpages;
 };
@@ -397,6 +409,7 @@ struct kvm_vcpu_stat {
         u32 halt_exits;
         u32 halt_wakeup;
         u32 request_irq_exits;
+        u32 request_nmi_exits;
         u32 irq_exits;
         u32 host_state_reload;
         u32 efer_reload;
@@ -405,6 +418,7 @@ struct kvm_vcpu_stat {
         u32 insn_emulation_fail;
         u32 hypercalls;
         u32 irq_injections;
+        u32 nmi_injections;
 };
 
 struct descriptor_table {
@@ -477,6 +491,7 @@ struct kvm_x86_ops {
 
         int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
         int (*get_tdp_level)(void);
+        int (*get_mt_mask_shift)(void);
 };
 
 extern struct kvm_x86_ops *kvm_x86_ops;
@@ -490,7 +505,7 @@ int kvm_mmu_setup(struct kvm_vcpu *vcpu);
 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
 void kvm_mmu_set_base_ptes(u64 base_pte);
 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
-                u64 dirty_mask, u64 nx_mask, u64 x_mask);
+                u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask);
 
 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
@@ -587,12 +602,14 @@ unsigned long segment_base(u16 selector);
 
 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
-                       const u8 *new, int bytes);
+                       const u8 *new, int bytes,
+                       bool guest_initiated);
 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
 int kvm_mmu_load(struct kvm_vcpu *vcpu);
 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
+void kvm_mmu_sync_global(struct kvm_vcpu *vcpu);
 
 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
 
@@ -607,6 +624,8 @@ void kvm_disable_tdp(void);
 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
 int complete_pio(struct kvm_vcpu *vcpu);
 
+struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
+
 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
 {
         struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
@@ -702,18 +721,6 @@ static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
         kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
 }
 
-#define ASM_VMX_VMCLEAR_RAX       ".byte 0x66, 0x0f, 0xc7, 0x30"
-#define ASM_VMX_VMLAUNCH          ".byte 0x0f, 0x01, 0xc2"
-#define ASM_VMX_VMRESUME          ".byte 0x0f, 0x01, 0xc3"
-#define ASM_VMX_VMPTRLD_RAX       ".byte 0x0f, 0xc7, 0x30"
-#define ASM_VMX_VMREAD_RDX_RAX    ".byte 0x0f, 0x78, 0xd0"
-#define ASM_VMX_VMWRITE_RAX_RDX   ".byte 0x0f, 0x79, 0xd0"
-#define ASM_VMX_VMWRITE_RSP_RDX   ".byte 0x0f, 0x79, 0xd4"
-#define ASM_VMX_VMXOFF            ".byte 0x0f, 0x01, 0xc4"
-#define ASM_VMX_VMXON_RAX         ".byte 0xf3, 0x0f, 0xc7, 0x30"
-#define ASM_VMX_INVEPT            ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
-#define ASM_VMX_INVVPID           ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
-
 #define MSR_IA32_TIME_STAMP_COUNTER             0x010
 
 #define TSS_IOPB_BASE_OFFSET 0x66
diff --git a/arch/x86/include/asm/kvm_x86_emulate.h b/arch/x86/include/asm/kvm_x86_emulate.h
index 25179a29f208..6a159732881a 100644
--- a/arch/x86/include/asm/kvm_x86_emulate.h
+++ b/arch/x86/include/asm/kvm_x86_emulate.h
@@ -123,6 +123,7 @@ struct decode_cache {
         u8 ad_bytes;
         u8 rex_prefix;
         struct operand src;
+        struct operand src2;
         struct operand dst;
         bool has_seg_override;
         u8 seg_override;
@@ -146,22 +147,18 @@ struct x86_emulate_ctxt {
         /* Register state before/after emulation. */
         struct kvm_vcpu *vcpu;
 
-        /* Linear faulting address (if emulating a page-faulting instruction) */
         unsigned long eflags;
-
         /* Emulated execution mode, represented by an X86EMUL_MODE value. */
         int mode;
-
         u32 cs_base;
 
         /* decode cache */
-
         struct decode_cache decode;
 };
 
 /* Repeat String Operation Prefix */
-#define REPE_PREFIX  1
-#define REPNE_PREFIX    2
+#define REPE_PREFIX     1
+#define REPNE_PREFIX    2
 
 /* Execution mode, passed to the emulator. */
 #define X86EMUL_MODE_REAL     0 /* Real mode.             */
@@ -170,7 +167,7 @@ struct x86_emulate_ctxt {
 #define X86EMUL_MODE_PROT64   8 /* 64-bit (long) mode.    */
 
 /* Host execution mode. */
-#if defined(__i386__)
+#if defined(CONFIG_X86_32)
 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
 #elif defined(CONFIG_X86_64)
 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
diff --git a/arch/x86/include/asm/lguest.h b/arch/x86/include/asm/lguest.h
index d28a507cef39..1caf57628b9c 100644
--- a/arch/x86/include/asm/lguest.h
+++ b/arch/x86/include/asm/lguest.h
@@ -15,7 +15,7 @@
 #define SHARED_SWITCHER_PAGES \
         DIV_ROUND_UP(end_switcher_text - start_switcher_text, PAGE_SIZE)
 /* Pages for switcher itself, then two pages per cpu */
-#define TOTAL_SWITCHER_PAGES (SHARED_SWITCHER_PAGES + 2 * NR_CPUS)
+#define TOTAL_SWITCHER_PAGES (SHARED_SWITCHER_PAGES + 2 * nr_cpu_ids)
 
 /* We map at -4M for ease of mapping into the guest (one PTE page). */
 #define SWITCHER_ADDR 0xFFC00000
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h
index f61ee8f937e4..5d98d0b68ffc 100644
--- a/arch/x86/include/asm/linkage.h
+++ b/arch/x86/include/asm/linkage.h
@@ -57,5 +57,65 @@
 #define __ALIGN_STR ".align 16,0x90"
 #endif
 
+/*
+ * to check ENTRY_X86/END_X86 and
+ * KPROBE_ENTRY_X86/KPROBE_END_X86
+ * unbalanced-missed-mixed appearance
+ */
+#define __set_entry_x86         .set ENTRY_X86_IN, 0
+#define __unset_entry_x86       .set ENTRY_X86_IN, 1
+#define __set_kprobe_x86        .set KPROBE_X86_IN, 0
+#define __unset_kprobe_x86      .set KPROBE_X86_IN, 1
+
+#define __macro_err_x86 .error "ENTRY_X86/KPROBE_X86 unbalanced,missed,mixed"
+
+#define __check_entry_x86       \
+        .ifdef ENTRY_X86_IN;    \
+        .ifeq ENTRY_X86_IN;     \
+        __macro_err_x86;        \
+        .abort;                 \
+        .endif;                 \
+        .endif
+
+#define __check_kprobe_x86      \
+        .ifdef KPROBE_X86_IN;   \
+        .ifeq KPROBE_X86_IN;    \
+        __macro_err_x86;        \
+        .abort;                 \
+        .endif;                 \
+        .endif
+
+#define __check_entry_kprobe_x86        \
+        __check_entry_x86;              \
+        __check_kprobe_x86
+
+#define ENTRY_KPROBE_FINAL_X86 __check_entry_kprobe_x86
+
+#define ENTRY_X86(name)                 \
+        __check_entry_kprobe_x86;       \
+        __set_entry_x86;                \
+        .globl name;                    \
+        __ALIGN;                        \
+        name:
+
+#define END_X86(name)                   \
+        __unset_entry_x86;              \
+        __check_entry_kprobe_x86;       \
+        .size name, .-name
+
+#define KPROBE_ENTRY_X86(name)          \
+        __check_entry_kprobe_x86;       \
+        __set_kprobe_x86;               \
+        .pushsection .kprobes.text, "ax"; \
+        .globl name;                    \
+        __ALIGN;                        \
+        name:
+
+#define KPROBE_END_X86(name)            \
+        __unset_kprobe_x86;             \
+        __check_entry_kprobe_x86;       \
+        .size name, .-name;             \
+        .popsection
+
 #endif /* _ASM_X86_LINKAGE_H */
 
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index ff3a6c236c00..cc09cbbee27e 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -8,12 +8,12 @@
 
 #define APIC_DFR_VALUE  (APIC_DFR_FLAT)
 
-static inline cpumask_t target_cpus(void)
+static inline const struct cpumask *target_cpus(void)
 { 
 #ifdef CONFIG_SMP
-        return cpu_online_map;
+        return cpu_online_mask;
 #else
-        return cpumask_of_cpu(0);
+        return cpumask_of(0);
 #endif
 } 
 
@@ -28,15 +28,18 @@ static inline cpumask_t target_cpus(void)
 #define apic_id_registered (genapic->apic_id_registered)
 #define init_apic_ldr (genapic->init_apic_ldr)
 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
+#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
 #define phys_pkg_id     (genapic->phys_pkg_id)
 #define vector_allocation_domain    (genapic->vector_allocation_domain)
 #define read_apic_id()  (GET_APIC_ID(apic_read(APIC_ID)))
 #define send_IPI_self (genapic->send_IPI_self)
+#define wakeup_secondary_cpu (genapic->wakeup_cpu)
 extern void setup_apic_routing(void);
 #else
 #define INT_DELIVERY_MODE dest_LowestPrio
 #define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
 #define TARGET_CPUS (target_cpus())
+#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
 /*
  * Set up the logical destination ID.
  *
@@ -59,9 +62,19 @@ static inline int apic_id_registered(void)
         return physid_isset(read_apic_id(), phys_cpu_present_map);
 }
 
-static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
-        return cpus_addr(cpumask)[0];
+        return cpumask_bits(cpumask)[0];
+}
+
+static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                                  const struct cpumask *andmask)
+{
+        unsigned long mask1 = cpumask_bits(cpumask)[0];
+        unsigned long mask2 = cpumask_bits(andmask)[0];
+        unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
+
+        return (unsigned int)(mask1 & mask2 & mask3);
 }
 
 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
@@ -86,7 +99,7 @@ static inline int apicid_to_node(int logical_apicid)
 #endif
 }
 
-static inline cpumask_t vector_allocation_domain(int cpu)
+static inline void vector_allocation_domain(int cpu, struct cpumask *retmask)
 {
         /* Careful. Some cpus do not strictly honor the set of cpus
          * specified in the interrupt destination when using lowest
@@ -96,8 +109,7 @@ static inline cpumask_t vector_allocation_domain(int cpu)
          * deliver interrupts to the wrong hyperthread when only one
          * hyperthread was specified in the interrupt desitination.
          */
-        cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
-        return domain;
+        *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
 }
 #endif
 
@@ -129,7 +141,7 @@ static inline int cpu_to_logical_apicid(int cpu)
 
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
-        if (mps_cpu < NR_CPUS && cpu_present(mps_cpu))
+        if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
                 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
         else
                 return BAD_APICID;
diff --git a/arch/x86/include/asm/mach-default/mach_ipi.h b/arch/x86/include/asm/mach-default/mach_ipi.h
index fabca01ebacf..191312d155da 100644
--- a/arch/x86/include/asm/mach-default/mach_ipi.h
+++ b/arch/x86/include/asm/mach-default/mach_ipi.h
@@ -4,7 +4,8 @@
 /* Avoid include hell */
 #define NMI_VECTOR 0x02
 
-void send_IPI_mask_bitmask(cpumask_t mask, int vector);
+void send_IPI_mask_bitmask(const struct cpumask *mask, int vector);
+void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
 void __send_IPI_shortcut(unsigned int shortcut, int vector);
 
 extern int no_broadcast;
@@ -12,28 +13,27 @@ extern int no_broadcast;
 #ifdef CONFIG_X86_64
 #include <asm/genapic.h>
 #define send_IPI_mask (genapic->send_IPI_mask)
+#define send_IPI_mask_allbutself (genapic->send_IPI_mask_allbutself)
 #else
-static inline void send_IPI_mask(cpumask_t mask, int vector)
+static inline void send_IPI_mask(const struct cpumask *mask, int vector)
 {
         send_IPI_mask_bitmask(mask, vector);
 }
+void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
 #endif
 
 static inline void __local_send_IPI_allbutself(int vector)
 {
-        if (no_broadcast || vector == NMI_VECTOR) {
-                cpumask_t mask = cpu_online_map;
-
-                cpu_clear(smp_processor_id(), mask);
-                send_IPI_mask(mask, vector);
-        } else
+        if (no_broadcast || vector == NMI_VECTOR)
+                send_IPI_mask_allbutself(cpu_online_mask, vector);
+        else
                 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
 }
 
 static inline void __local_send_IPI_all(int vector)
 {
         if (no_broadcast || vector == NMI_VECTOR)
-                send_IPI_mask(cpu_online_map, vector);
+                send_IPI_mask(cpu_online_mask, vector);
         else
                 __send_IPI_shortcut(APIC_DEST_ALLINC, vector);
 }
diff --git a/arch/x86/include/asm/mach-default/mach_wakecpu.h b/arch/x86/include/asm/mach-default/mach_wakecpu.h
index 9d80db91e992..ceb013660146 100644
--- a/arch/x86/include/asm/mach-default/mach_wakecpu.h
+++ b/arch/x86/include/asm/mach-default/mach_wakecpu.h
@@ -1,17 +1,8 @@
 #ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
 #define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
 
-/* 
- * This file copes with machines that wakeup secondary CPUs by the
- * INIT, INIT, STARTUP sequence.
- */
-
-#define WAKE_SECONDARY_VIA_INIT
-
-#define TRAMPOLINE_LOW phys_to_virt(0x467)
-#define TRAMPOLINE_HIGH phys_to_virt(0x469)
-
-#define boot_cpu_apicid boot_cpu_physical_apicid
+#define TRAMPOLINE_PHYS_LOW (0x467)
+#define TRAMPOLINE_PHYS_HIGH (0x469)
 
 static inline void wait_for_init_deassert(atomic_t *deassert)
 {
@@ -33,9 +24,12 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
 {
 }
 
-#define inquire_remote_apic(apicid) do {                \
-                if (apic_verbosity >= APIC_DEBUG)       \
-                        __inquire_remote_apic(apicid);  \
-        } while (0)
+extern void __inquire_remote_apic(int apicid);
+
+static inline void inquire_remote_apic(int apicid)
+{
+        if (apic_verbosity >= APIC_DEBUG)
+                __inquire_remote_apic(apicid);
+}
 
 #endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/mach-default/smpboot_hooks.h b/arch/x86/include/asm/mach-default/smpboot_hooks.h
index dbab36d64d48..23bf52103b89 100644
--- a/arch/x86/include/asm/mach-default/smpboot_hooks.h
+++ b/arch/x86/include/asm/mach-default/smpboot_hooks.h
@@ -13,9 +13,11 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
         CMOS_WRITE(0xa, 0xf);
         local_flush_tlb();
         pr_debug("1.\n");
-        *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4;
+        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
+                                                                 start_eip >> 4;
         pr_debug("2.\n");
-        *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf;
+        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
+                                                         start_eip & 0xf;
         pr_debug("3.\n");
 }
 
@@ -32,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
          */
         CMOS_WRITE(0, 0xf);
 
-        *((volatile long *) phys_to_virt(0x467)) = 0;
+        *((volatile long *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
 }
 
 static inline void __init smpboot_setup_io_apic(void)
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
index 5180bd7478fb..48553e958ad5 100644
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ b/arch/x86/include/asm/mach-generic/mach_apic.h
@@ -24,9 +24,11 @@
 #define check_phys_apicid_present (genapic->check_phys_apicid_present)
 #define check_apicid_used (genapic->check_apicid_used)
 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
+#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
 #define vector_allocation_domain (genapic->vector_allocation_domain)
 #define enable_apic_mode (genapic->enable_apic_mode)
 #define phys_pkg_id (genapic->phys_pkg_id)
+#define wakeup_secondary_cpu (genapic->wakeup_cpu)
 
 extern void generic_bigsmp_probe(void);
 
diff --git a/arch/x86/include/asm/mach-generic/mach_wakecpu.h b/arch/x86/include/asm/mach-generic/mach_wakecpu.h
new file mode 100644
index 000000000000..1ab16b168c8a
--- /dev/null
+++ b/arch/x86/include/asm/mach-generic/mach_wakecpu.h
@@ -0,0 +1,12 @@
+#ifndef _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
+#define _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
+
+#define TRAMPOLINE_PHYS_LOW (genapic->trampoline_phys_low)
+#define TRAMPOLINE_PHYS_HIGH (genapic->trampoline_phys_high)
+#define wait_for_init_deassert (genapic->wait_for_init_deassert)
+#define smp_callin_clear_local_apic (genapic->smp_callin_clear_local_apic)
+#define store_NMI_vector (genapic->store_NMI_vector)
+#define restore_NMI_vector (genapic->restore_NMI_vector)
+#define inquire_remote_apic (genapic->inquire_remote_apic)
+
+#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mmu_context_32.h b/arch/x86/include/asm/mmu_context_32.h
index 8e10015781fb..7e98ce1d2c0e 100644
--- a/arch/x86/include/asm/mmu_context_32.h
+++ b/arch/x86/include/asm/mmu_context_32.h
@@ -4,9 +4,8 @@
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
 #ifdef CONFIG_SMP
-        unsigned cpu = smp_processor_id();
-        if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
-                per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_LAZY;
+        if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK)
+                x86_write_percpu(cpu_tlbstate.state, TLBSTATE_LAZY);
 #endif
 }
 
@@ -20,8 +19,8 @@ static inline void switch_mm(struct mm_struct *prev,
                 /* stop flush ipis for the previous mm */
                 cpu_clear(cpu, prev->cpu_vm_mask);
 #ifdef CONFIG_SMP
-                per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
-                per_cpu(cpu_tlbstate, cpu).active_mm = next;
+                x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
+                x86_write_percpu(cpu_tlbstate.active_mm, next);
 #endif
                 cpu_set(cpu, next->cpu_vm_mask);
 
@@ -36,8 +35,8 @@ static inline void switch_mm(struct mm_struct *prev,
         }
 #ifdef CONFIG_SMP
         else {
-                per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
-                BUG_ON(per_cpu(cpu_tlbstate, cpu).active_mm != next);
+                x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
+                BUG_ON(x86_read_percpu(cpu_tlbstate.active_mm) != next);
 
                 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
                         /* We were in lazy tlb mode and leave_mm disabled
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index 91885c28f66b..62d14ce3cd00 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -6,13 +6,13 @@
 #include <asm/mpspec_def.h>
 
 extern int apic_version[MAX_APICS];
+extern int pic_mode;
 
 #ifdef CONFIG_X86_32
 #include <mach_mpspec.h>
 
 extern unsigned int def_to_bigsmp;
 extern u8 apicid_2_node[];
-extern int pic_mode;
 
 #ifdef CONFIG_X86_NUMAQ
 extern int mp_bus_id_to_node[MAX_MP_BUSSES];
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index e38859d577a1..cb58643947b9 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -85,7 +85,9 @@
 /* AMD64 MSRs. Not complete. See the architecture manual for a more
    complete list. */
 
+#define MSR_AMD64_PATCH_LEVEL           0x0000008b
 #define MSR_AMD64_NB_CFG                0xc001001f
+#define MSR_AMD64_PATCH_LOADER          0xc0010020
 #define MSR_AMD64_IBSFETCHCTL           0xc0011030
 #define MSR_AMD64_IBSFETCHLINAD         0xc0011031
 #define MSR_AMD64_IBSFETCHPHYSAD        0xc0011032
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index c2a812ebde89..638bf6241807 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -22,10 +22,10 @@ static inline unsigned long long native_read_tscp(unsigned int *aux)
 }
 
 /*
- * i386 calling convention returns 64-bit value in edx:eax, while
- * x86_64 returns at rax. Also, the "A" constraint does not really
- * mean rdx:rax in x86_64, so we need specialized behaviour for each
- * architecture
+ * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
+ * constraint has different meanings. For i386, "A" means exactly
+ * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
+ * it means rax *or* rdx.
  */
 #ifdef CONFIG_X86_64
 #define DECLARE_ARGS(val, low, high)    unsigned low, high
@@ -85,7 +85,8 @@ static inline void native_write_msr(unsigned int msr,
         asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
 }
 
-static inline int native_write_msr_safe(unsigned int msr,
+/* Can be uninlined because referenced by paravirt */
+notrace static inline int native_write_msr_safe(unsigned int msr,
                                         unsigned low, unsigned high)
 {
         int err;
@@ -181,10 +182,10 @@ static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
 }
 
 #define rdtscl(low)                                             \
-        ((low) = (u32)native_read_tsc())
+        ((low) = (u32)__native_read_tsc())
 
 #define rdtscll(val)                                            \
-        ((val) = native_read_tsc())
+        ((val) = __native_read_tsc())
 
 #define rdpmc(counter, low, high)                       \
 do {                                                    \
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 7c1e4258b31e..cb988aab716d 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -57,6 +57,31 @@ struct mtrr_gentry {
 };
 #endif /* !__i386__ */
 
+struct mtrr_var_range {
+        u32 base_lo;
+        u32 base_hi;
+        u32 mask_lo;
+        u32 mask_hi;
+};
+
+/* In the Intel processor's MTRR interface, the MTRR type is always held in
+   an 8 bit field: */
+typedef u8 mtrr_type;
+
+#define MTRR_NUM_FIXED_RANGES 88
+#define MTRR_MAX_VAR_RANGES 256
+
+struct mtrr_state_type {
+        struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
+        mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
+        unsigned char enabled;
+        unsigned char have_fixed;
+        mtrr_type def_type;
+};
+
+#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
+#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
+
 /*  These are the various ioctls  */
 #define MTRRIOC_ADD_ENTRY        _IOW(MTRR_IOCTL_BASE,  0, struct mtrr_sentry)
 #define MTRRIOC_SET_ENTRY        _IOW(MTRR_IOCTL_BASE,  1, struct mtrr_sentry)
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index 0bf2a06b7a4e..bf37bc49bd8e 100644
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -7,9 +7,9 @@
 
 #define APIC_DFR_VALUE  (APIC_DFR_CLUSTER)
 
-static inline cpumask_t target_cpus(void)
+static inline const cpumask_t *target_cpus(void)
 {
-        return CPU_MASK_ALL;
+        return &CPU_MASK_ALL;
 }
 
 #define NO_BALANCE_IRQ (1)
@@ -63,8 +63,8 @@ static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
 extern u8 cpu_2_logical_apicid[];
 static inline int cpu_to_logical_apicid(int cpu)
 {
-       if (cpu >= NR_CPUS)
-               return BAD_APICID;
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
         return (int)cpu_2_logical_apicid[cpu];
 }
 
@@ -122,7 +122,13 @@ static inline void enable_apic_mode(void)
  * We use physical apicids here, not logical, so just return the default
  * physical broadcast to stop people from breaking us
  */
-static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        return (int) 0xF;
+}
+
+static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                                  const struct cpumask *andmask)
 {
         return (int) 0xF;
 }
diff --git a/arch/x86/include/asm/numaq/ipi.h b/arch/x86/include/asm/numaq/ipi.h
index 935588d286cf..a8374c652778 100644
--- a/arch/x86/include/asm/numaq/ipi.h
+++ b/arch/x86/include/asm/numaq/ipi.h
@@ -1,25 +1,22 @@
 #ifndef __ASM_NUMAQ_IPI_H
 #define __ASM_NUMAQ_IPI_H
 
-void send_IPI_mask_sequence(cpumask_t, int vector);
+void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
+void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
 
-static inline void send_IPI_mask(cpumask_t mask, int vector)
+static inline void send_IPI_mask(const struct cpumask *mask, int vector)
 {
         send_IPI_mask_sequence(mask, vector);
 }
 
 static inline void send_IPI_allbutself(int vector)
 {
-        cpumask_t mask = cpu_online_map;
-        cpu_clear(smp_processor_id(), mask);
-
-        if (!cpus_empty(mask))
-                send_IPI_mask(mask, vector);
+        send_IPI_mask_allbutself(cpu_online_mask, vector);
 }
 
 static inline void send_IPI_all(int vector)
 {
-        send_IPI_mask(cpu_online_map, vector);
+        send_IPI_mask(cpu_online_mask, vector);
 }
 
 #endif /* __ASM_NUMAQ_IPI_H */
diff --git a/arch/x86/include/asm/numaq/wakecpu.h b/arch/x86/include/asm/numaq/wakecpu.h
index c577bda5b1c5..6f499df8eddb 100644
--- a/arch/x86/include/asm/numaq/wakecpu.h
+++ b/arch/x86/include/asm/numaq/wakecpu.h
@@ -3,12 +3,8 @@
 
 /* This file copes with machines that wakeup secondary CPUs by NMIs */
 
-#define WAKE_SECONDARY_VIA_NMI
-
-#define TRAMPOLINE_LOW phys_to_virt(0x8)
-#define TRAMPOLINE_HIGH phys_to_virt(0xa)
-
-#define boot_cpu_apicid boot_cpu_logical_apicid
+#define TRAMPOLINE_PHYS_LOW (0x8)
+#define TRAMPOLINE_PHYS_HIGH (0xa)
 
 /* We don't do anything here because we use NMI's to boot instead */
 static inline void wait_for_init_deassert(atomic_t *deassert)
@@ -27,17 +23,23 @@ static inline void smp_callin_clear_local_apic(void)
 static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
 {
         printk("Storing NMI vector\n");
-        *high = *((volatile unsigned short *) TRAMPOLINE_HIGH);
-        *low = *((volatile unsigned short *) TRAMPOLINE_LOW);
+        *high =
+          *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH));
+        *low =
+          *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW));
 }
 
 static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
 {
         printk("Restoring NMI vector\n");
-        *((volatile unsigned short *) TRAMPOLINE_HIGH) = *high;
-        *((volatile unsigned short *) TRAMPOLINE_LOW) = *low;
+        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
+                                                                 *high;
+        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
+                                                                 *low;
 }
 
-#define inquire_remote_apic(apicid) {}
+static inline void inquire_remote_apic(int apicid)
+{
+}
 
 #endif /* __ASM_NUMAQ_WAKECPU_H */
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 875b38edf193..a977de23cb4d 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -19,6 +19,8 @@ struct pci_sysdata {
 };
 
 extern int pci_routeirq;
+extern int noioapicquirk;
+extern int noioapicreroute;
 
 /* scan a bus after allocating a pci_sysdata for it */
 extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops,
@@ -82,6 +84,8 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 static inline void early_quirks(void) { }
 #endif
 
+extern void pci_iommu_alloc(void);
+
 #endif  /* __KERNEL__ */
 
 #ifdef CONFIG_X86_32
@@ -98,9 +102,9 @@ static inline void early_quirks(void) { }
 
 #ifdef CONFIG_NUMA
 /* Returns the node based on pci bus */
-static inline int __pcibus_to_node(struct pci_bus *bus)
+static inline int __pcibus_to_node(const struct pci_bus *bus)
 {
-        struct pci_sysdata *sd = bus->sysdata;
+        const struct pci_sysdata *sd = bus->sysdata;
 
         return sd->node;
 }
@@ -109,6 +113,12 @@ static inline cpumask_t __pcibus_to_cpumask(struct pci_bus *bus)
 {
         return node_to_cpumask(__pcibus_to_node(bus));
 }
+
+static inline const struct cpumask *
+cpumask_of_pcibus(const struct pci_bus *bus)
+{
+        return cpumask_of_node(__pcibus_to_node(bus));
+}
 #endif
 
 #endif /* _ASM_X86_PCI_H */
diff --git a/arch/x86/include/asm/pci_64.h b/arch/x86/include/asm/pci_64.h
index d02d936840a3..4da207982777 100644
--- a/arch/x86/include/asm/pci_64.h
+++ b/arch/x86/include/asm/pci_64.h
@@ -23,7 +23,6 @@ extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
                                int reg, int len, u32 value);
 
 extern void dma32_reserve_bootmem(void);
-extern void pci_iommu_alloc(void);
 
 /* The PCI address space does equal the physical memory
  * address space.  The networking and block device layers use
diff --git a/arch/x86/pci/pci.h b/arch/x86/include/asm/pci_x86.h
index 15b9cf6be729..e60fd3e14bdf 100644
--- a/arch/x86/pci/pci.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -57,7 +57,8 @@ extern struct pci_ops pci_root_ops;
 struct irq_info {
         u8 bus, devfn;                  /* Bus, device and function */
         struct {
-                u8 link;                /* IRQ line ID, chipset dependent, 0=not routed */
+                u8 link;                /* IRQ line ID, chipset dependent,
+                                           0 = not routed */
                 u16 bitmap;             /* Available IRQs */
         } __attribute__((packed)) irq[4];
         u8 slot;                        /* Slot number, 0=onboard */
@@ -69,11 +70,13 @@ struct irq_routing_table {
         u16 version;                    /* PIRQ_VERSION */
         u16 size;                       /* Table size in bytes */
         u8 rtr_bus, rtr_devfn;          /* Where the interrupt router lies */
-        u16 exclusive_irqs;             /* IRQs devoted exclusively to PCI usage */
-        u16 rtr_vendor, rtr_device;     /* Vendor and device ID of interrupt router */
+        u16 exclusive_irqs;             /* IRQs devoted exclusively to
+                                           PCI usage */
+        u16 rtr_vendor, rtr_device;     /* Vendor and device ID of
+                                           interrupt router */
         u32 miniport_data;              /* Crap */
         u8 rfu[11];
-        u8 checksum;                    /* Modulo 256 checksum must give zero */
+        u8 checksum;                    /* Modulo 256 checksum must give 0 */
         struct irq_info slots[0];
 } __attribute__((packed));
 
@@ -96,6 +99,7 @@ extern struct pci_raw_ops *raw_pci_ops;
 extern struct pci_raw_ops *raw_pci_ext_ops;
 
 extern struct pci_raw_ops pci_direct_conf1;
+extern bool port_cf9_safe;
 
 /* arch_initcall level */
 extern int pci_direct_probe(void);
@@ -147,15 +151,15 @@ static inline unsigned int mmio_config_readl(void __iomem *pos)
 
 static inline void mmio_config_writeb(void __iomem *pos, u8 val)
 {
-        asm volatile("movb %%al,(%1)" :: "a" (val), "r" (pos) : "memory");
+        asm volatile("movb %%al,(%1)" : : "a" (val), "r" (pos) : "memory");
 }
 
 static inline void mmio_config_writew(void __iomem *pos, u16 val)
 {
-        asm volatile("movw %%ax,(%1)" :: "a" (val), "r" (pos) : "memory");
+        asm volatile("movw %%ax,(%1)" : : "a" (val), "r" (pos) : "memory");
 }
 
 static inline void mmio_config_writel(void __iomem *pos, u32 val)
 {
-        asm volatile("movl %%eax,(%1)" :: "a" (val), "r" (pos) : "memory");
+        asm volatile("movl %%eax,(%1)" : : "a" (val), "r" (pos) : "memory");
 }
diff --git a/arch/x86/include/asm/pgtable-2level.h b/arch/x86/include/asm/pgtable-2level.h
index b17edfd23628..e0d199fe1d83 100644
--- a/arch/x86/include/asm/pgtable-2level.h
+++ b/arch/x86/include/asm/pgtable-2level.h
@@ -56,23 +56,55 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
 #define pte_none(x)             (!(x).pte_low)
 
 /*
- * Bits 0, 6 and 7 are taken, split up the 29 bits of offset
- * into this range:
+ * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken,
+ * split up the 29 bits of offset into this range:
  */
 #define PTE_FILE_MAX_BITS       29
+#define PTE_FILE_SHIFT1         (_PAGE_BIT_PRESENT + 1)
+#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
+#define PTE_FILE_SHIFT2         (_PAGE_BIT_FILE + 1)
+#define PTE_FILE_SHIFT3         (_PAGE_BIT_PROTNONE + 1)
+#else
+#define PTE_FILE_SHIFT2         (_PAGE_BIT_PROTNONE + 1)
+#define PTE_FILE_SHIFT3         (_PAGE_BIT_FILE + 1)
+#endif
+#define PTE_FILE_BITS1          (PTE_FILE_SHIFT2 - PTE_FILE_SHIFT1 - 1)
+#define PTE_FILE_BITS2          (PTE_FILE_SHIFT3 - PTE_FILE_SHIFT2 - 1)
 
 #define pte_to_pgoff(pte)                                               \
-        ((((pte).pte_low >> 1) & 0x1f) + (((pte).pte_low >> 8) << 5))
+        ((((pte).pte_low >> PTE_FILE_SHIFT1)                            \
+          & ((1U << PTE_FILE_BITS1) - 1))                               \
+         + ((((pte).pte_low >> PTE_FILE_SHIFT2)                         \
+             & ((1U << PTE_FILE_BITS2) - 1)) << PTE_FILE_BITS1)         \
+         + (((pte).pte_low >> PTE_FILE_SHIFT3)                          \
+            << (PTE_FILE_BITS1 + PTE_FILE_BITS2)))
 
 #define pgoff_to_pte(off)                                               \
-        ((pte_t) { .pte_low = (((off) & 0x1f) << 1) +                   \
-                        (((off) >> 5) << 8) + _PAGE_FILE })
+        ((pte_t) { .pte_low =                                           \
+         (((off) & ((1U << PTE_FILE_BITS1) - 1)) << PTE_FILE_SHIFT1)    \
+         + ((((off) >> PTE_FILE_BITS1) & ((1U << PTE_FILE_BITS2) - 1))  \
+            << PTE_FILE_SHIFT2)                                         \
+         + (((off) >> (PTE_FILE_BITS1 + PTE_FILE_BITS2))                \
+            << PTE_FILE_SHIFT3)                                         \
+         + _PAGE_FILE })
 
 /* Encode and de-code a swap entry */
-#define __swp_type(x)                   (((x).val >> 1) & 0x1f)
-#define __swp_offset(x)                 ((x).val >> 8)
-#define __swp_entry(type, offset)                               \
-        ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
+#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
+#define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1)
+#define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1)
+#else
+#define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1)
+#define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1)
+#endif
+
+#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
+
+#define __swp_type(x)                   (((x).val >> (_PAGE_BIT_PRESENT + 1)) \
+                                         & ((1U << SWP_TYPE_BITS) - 1))
+#define __swp_offset(x)                 ((x).val >> SWP_OFFSET_SHIFT)
+#define __swp_entry(type, offset)       ((swp_entry_t) { \
+                                         ((type) << (_PAGE_BIT_PRESENT + 1)) \
+                                         | ((offset) << SWP_OFFSET_SHIFT) })
 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { (pte).pte_low })
 #define __swp_entry_to_pte(x)           ((pte_t) { .pte = (x).val })
 
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 52597aeadfff..447da43cddb3 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -166,6 +166,7 @@ static inline int pte_none(pte_t pte)
 #define PTE_FILE_MAX_BITS       32
 
 /* Encode and de-code a swap entry */
+#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > 5)
 #define __swp_type(x)                   (((x).val) & 0x1f)
 #define __swp_offset(x)                 ((x).val >> 5)
 #define __swp_entry(type, offset)       ((swp_entry_t){(type) | (offset) << 5})
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index c012f3b11671..83e69f4a37f0 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -10,7 +10,6 @@
 #define _PAGE_BIT_PCD           4       /* page cache disabled */
 #define _PAGE_BIT_ACCESSED      5       /* was accessed (raised by CPU) */
 #define _PAGE_BIT_DIRTY         6       /* was written to (raised by CPU) */
-#define _PAGE_BIT_FILE          6
 #define _PAGE_BIT_PSE           7       /* 4 MB (or 2MB) page */
 #define _PAGE_BIT_PAT           7       /* on 4KB pages */
 #define _PAGE_BIT_GLOBAL        8       /* Global TLB entry PPro+ */
@@ -22,6 +21,12 @@
 #define _PAGE_BIT_CPA_TEST      _PAGE_BIT_UNUSED1
 #define _PAGE_BIT_NX           63       /* No execute: only valid after cpuid check */
 
+/* If _PAGE_BIT_PRESENT is clear, we use these: */
+/* - if the user mapped it with PROT_NONE; pte_present gives true */
+#define _PAGE_BIT_PROTNONE      _PAGE_BIT_GLOBAL
+/* - set: nonlinear file mapping, saved PTE; unset:swap */
+#define _PAGE_BIT_FILE          _PAGE_BIT_DIRTY
+
 #define _PAGE_PRESENT   (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
 #define _PAGE_RW        (_AT(pteval_t, 1) << _PAGE_BIT_RW)
 #define _PAGE_USER      (_AT(pteval_t, 1) << _PAGE_BIT_USER)
@@ -46,11 +51,8 @@
 #define _PAGE_NX        (_AT(pteval_t, 0))
 #endif
 
-/* If _PAGE_PRESENT is clear, we use these: */
-#define _PAGE_FILE      _PAGE_DIRTY     /* nonlinear file mapping,
-                                         * saved PTE; unset:swap */
-#define _PAGE_PROTNONE  _PAGE_PSE       /* if the user mapped it with PROT_NONE;
-                                           pte_present gives true */
+#define _PAGE_FILE      (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
+#define _PAGE_PROTNONE  (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
 
 #define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |        \
                          _PAGE_ACCESSED | _PAGE_DIRTY)
@@ -158,8 +160,19 @@
 #define PGD_IDENT_ATTR   0x001          /* PRESENT (no other attributes) */
 #endif
 
+/*
+ * Macro to mark a page protection value as UC-
+ */
+#define pgprot_noncached(prot)                                  \
+        ((boot_cpu_data.x86 > 3)                                \
+         ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS))  \
+         : (prot))
+
 #ifndef __ASSEMBLY__
 
+#define pgprot_writecombine     pgprot_writecombine
+extern pgprot_t pgprot_writecombine(pgprot_t prot);
+
 /*
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
@@ -329,6 +342,9 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
 #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
 
 #ifndef __ASSEMBLY__
+/* Indicate that x86 has its own track and untrack pfn vma functions */
+#define __HAVE_PFNMAP_TRACKING
+
 #define __HAVE_PHYS_MEM_ACCESS_PROT
 struct file;
 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index f9d5889b336b..72b020deb46b 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -101,15 +101,6 @@ extern unsigned long pg0[];
 #endif
 
 /*
- * Macro to mark a page protection value as "uncacheable".
- * On processors which do not support it, this is a no-op.
- */
-#define pgprot_noncached(prot)                                  \
-        ((boot_cpu_data.x86 > 3)                                \
-         ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) \
-         : (prot))
-
-/*
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.
  */
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 545a0e042bb2..ba09289accaa 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -146,7 +146,7 @@ static inline void native_pgd_clear(pgd_t *pgd)
 #define PGDIR_MASK      (~(PGDIR_SIZE - 1))
 
 
-#define MAXMEM           _AC(0x00003fffffffffff, UL)
+#define MAXMEM           _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
 #define VMALLOC_START    _AC(0xffffc20000000000, UL)
 #define VMALLOC_END      _AC(0xffffe1ffffffffff, UL)
 #define VMEMMAP_START    _AC(0xffffe20000000000, UL)
@@ -177,12 +177,6 @@ static inline int pmd_bad(pmd_t pmd)
 #define pages_to_mb(x)  ((x) >> (20 - PAGE_SHIFT))   /* FIXME: is this right? */
 
 /*
- * Macro to mark a page protection value as "uncacheable".
- */
-#define pgprot_noncached(prot)                                  \
-        (__pgprot(pgprot_val((prot)) | _PAGE_PCD | _PAGE_PWT))
-
-/*
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.
  */
@@ -250,10 +244,22 @@ static inline int pud_large(pud_t pte)
 extern int direct_gbpages;
 
 /* Encode and de-code a swap entry */
-#define __swp_type(x)                   (((x).val >> 1) & 0x3f)
-#define __swp_offset(x)                 ((x).val >> 8)
-#define __swp_entry(type, offset)       ((swp_entry_t) { ((type) << 1) | \
-                                                         ((offset) << 8) })
+#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
+#define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1)
+#define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1)
+#else
+#define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1)
+#define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1)
+#endif
+
+#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
+
+#define __swp_type(x)                   (((x).val >> (_PAGE_BIT_PRESENT + 1)) \
+                                         & ((1U << SWP_TYPE_BITS) - 1))
+#define __swp_offset(x)                 ((x).val >> SWP_OFFSET_SHIFT)
+#define __swp_entry(type, offset)       ((swp_entry_t) { \
+                                         ((type) << (_PAGE_BIT_PRESENT + 1)) \
+                                         | ((offset) << SWP_OFFSET_SHIFT) })
 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val((pte)) })
 #define __swp_entry_to_pte(x)           ((pte_t) { .pte = (x).val })
 
diff --git a/arch/x86/include/asm/prctl.h b/arch/x86/include/asm/prctl.h
index fe681147a4f7..a8894647dd9a 100644
--- a/arch/x86/include/asm/prctl.h
+++ b/arch/x86/include/asm/prctl.h
@@ -6,5 +6,8 @@
 #define ARCH_GET_FS 0x1003
 #define ARCH_GET_GS 0x1004
 
+#ifdef CONFIG_X86_64
+extern long sys_arch_prctl(int, unsigned long);
+#endif /* CONFIG_X86_64 */
 
 #endif /* _ASM_X86_PRCTL_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 5ca01e383269..091cd8855f2e 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -110,6 +110,7 @@ struct cpuinfo_x86 {
         /* Index into per_cpu list: */
         u16                     cpu_index;
 #endif
+        unsigned int            x86_hyper_vendor;
 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
 
 #define X86_VENDOR_INTEL        0
@@ -123,6 +124,9 @@ struct cpuinfo_x86 {
 
 #define X86_VENDOR_UNKNOWN      0xff
 
+#define X86_HYPER_VENDOR_NONE  0
+#define X86_HYPER_VENDOR_VMWARE 1
+
 /*
  * capabilities of CPUs
  */
@@ -752,6 +756,19 @@ extern void switch_to_new_gdt(void);
 extern void cpu_init(void);
 extern void init_gdt(int cpu);
 
+static inline unsigned long get_debugctlmsr(void)
+{
+    unsigned long debugctlmsr = 0;
+
+#ifndef CONFIG_X86_DEBUGCTLMSR
+        if (boot_cpu_data.x86 < 6)
+                return 0;
+#endif
+        rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
+
+    return debugctlmsr;
+}
+
 static inline void update_debugctlmsr(unsigned long debugctlmsr)
 {
 #ifndef CONFIG_X86_DEBUGCTLMSR
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index eefb0594b058..6d34d954c228 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -6,7 +6,6 @@
 #include <asm/processor-flags.h>
 
 #ifdef __KERNEL__
-#include <asm/ds.h>             /* the DS BTS struct is used for ptrace too */
 #include <asm/segment.h>
 #endif
 
@@ -128,34 +127,6 @@ struct pt_regs {
 #endif /* !__i386__ */
 
 
-#ifdef CONFIG_X86_PTRACE_BTS
-/* a branch trace record entry
- *
- * In order to unify the interface between various processor versions,
- * we use the below data structure for all processors.
- */
-enum bts_qualifier {
-        BTS_INVALID = 0,
-        BTS_BRANCH,
-        BTS_TASK_ARRIVES,
-        BTS_TASK_DEPARTS
-};
-
-struct bts_struct {
-        __u64 qualifier;
-        union {
-                /* BTS_BRANCH */
-                struct {
-                        __u64 from_ip;
-                        __u64 to_ip;
-                } lbr;
-                /* BTS_TASK_ARRIVES or
-                   BTS_TASK_DEPARTS */
-                __u64 jiffies;
-        } variant;
-};
-#endif /* CONFIG_X86_PTRACE_BTS */
-
 #ifdef __KERNEL__
 
 #include <linux/init.h>
@@ -163,13 +134,6 @@ struct bts_struct {
 struct cpuinfo_x86;
 struct task_struct;
 
-#ifdef CONFIG_X86_PTRACE_BTS
-extern void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *);
-extern void ptrace_bts_take_timestamp(struct task_struct *, enum bts_qualifier);
-#else
-#define ptrace_bts_init_intel(config) do {} while (0)
-#endif /* CONFIG_X86_PTRACE_BTS */
-
 extern unsigned long profile_pc(struct pt_regs *regs);
 
 extern unsigned long
@@ -271,6 +235,13 @@ extern int do_get_thread_area(struct task_struct *p, int idx,
 extern int do_set_thread_area(struct task_struct *p, int idx,
                               struct user_desc __user *info, int can_allocate);
 
+extern void x86_ptrace_untrace(struct task_struct *);
+extern void x86_ptrace_fork(struct task_struct *child,
+                            unsigned long clone_flags);
+
+#define arch_ptrace_untrace(tsk) x86_ptrace_untrace(tsk)
+#define arch_ptrace_fork(child, flags) x86_ptrace_fork(child, flags)
+
 #endif /* __KERNEL__ */
 
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/x86/include/asm/reboot.h b/arch/x86/include/asm/reboot.h
index df7710354f85..562d4fd31ba8 100644
--- a/arch/x86/include/asm/reboot.h
+++ b/arch/x86/include/asm/reboot.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_REBOOT_H
 #define _ASM_X86_REBOOT_H
 
+#include <linux/kdebug.h>
+
 struct pt_regs;
 
 struct machine_ops {
@@ -18,4 +20,7 @@ void native_machine_crash_shutdown(struct pt_regs *regs);
 void native_machine_shutdown(void);
 void machine_real_restart(const unsigned char *code, int length);
 
+typedef void (*nmi_shootdown_cb)(int, struct die_args*);
+void nmi_shootdown_cpus(nmi_shootdown_cb callback);
+
 #endif /* _ASM_X86_REBOOT_H */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index f12d37237465..4fcd53fd5f43 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -8,6 +8,10 @@
 /* Interrupt control for vSMPowered x86_64 systems */
 void vsmp_init(void);
 
+
+void setup_bios_corruption_check(void);
+
+
 #ifdef CONFIG_X86_VISWS
 extern void visws_early_detect(void);
 extern int is_visws_box(void);
@@ -16,6 +20,8 @@ static inline void visws_early_detect(void) { }
 static inline int is_visws_box(void) { return 0; }
 #endif
 
+extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
+extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip);
 /*
  * Any setup quirks to be performed?
  */
@@ -39,6 +45,7 @@ struct x86_quirks {
         void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable,
                                     unsigned short oemsize);
         int (*setup_ioapic_ids)(void);
+        int (*update_genapic)(void);
 };
 
 extern struct x86_quirks *x86_quirks;
diff --git a/arch/x86/include/asm/sigframe.h b/arch/x86/include/asm/sigframe.h
new file mode 100644
index 000000000000..4e0fe26d27d3
--- /dev/null
+++ b/arch/x86/include/asm/sigframe.h
@@ -0,0 +1,70 @@
+#ifndef _ASM_X86_SIGFRAME_H
+#define _ASM_X86_SIGFRAME_H
+
+#include <asm/sigcontext.h>
+#include <asm/siginfo.h>
+#include <asm/ucontext.h>
+
+#ifdef CONFIG_X86_32
+#define sigframe_ia32           sigframe
+#define rt_sigframe_ia32        rt_sigframe
+#define sigcontext_ia32         sigcontext
+#define _fpstate_ia32           _fpstate
+#define ucontext_ia32           ucontext
+#else /* !CONFIG_X86_32 */
+
+#ifdef CONFIG_IA32_EMULATION
+#include <asm/ia32.h>
+#endif /* CONFIG_IA32_EMULATION */
+
+#endif /* CONFIG_X86_32 */
+
+#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
+struct sigframe_ia32 {
+        u32 pretcode;
+        int sig;
+        struct sigcontext_ia32 sc;
+        /*
+         * fpstate is unused. fpstate is moved/allocated after
+         * retcode[] below. This movement allows to have the FP state and the
+         * future state extensions (xsave) stay together.
+         * And at the same time retaining the unused fpstate, prevents changing
+         * the offset of extramask[] in the sigframe and thus prevent any
+         * legacy application accessing/modifying it.
+         */
+        struct _fpstate_ia32 fpstate_unused;
+#ifdef CONFIG_IA32_EMULATION
+        unsigned int extramask[_COMPAT_NSIG_WORDS-1];
+#else /* !CONFIG_IA32_EMULATION */
+        unsigned long extramask[_NSIG_WORDS-1];
+#endif /* CONFIG_IA32_EMULATION */
+        char retcode[8];
+        /* fp state follows here */
+};
+
+struct rt_sigframe_ia32 {
+        u32 pretcode;
+        int sig;
+        u32 pinfo;
+        u32 puc;
+#ifdef CONFIG_IA32_EMULATION
+        compat_siginfo_t info;
+#else /* !CONFIG_IA32_EMULATION */
+        struct siginfo info;
+#endif /* CONFIG_IA32_EMULATION */
+        struct ucontext_ia32 uc;
+        char retcode[8];
+        /* fp state follows here */
+};
+#endif /* defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) */
+
+#ifdef CONFIG_X86_64
+struct rt_sigframe {
+        char __user *pretcode;
+        struct ucontext uc;
+        struct siginfo info;
+        /* fp state follows here */
+};
+#endif /* CONFIG_X86_64 */
+
+#endif /* _ASM_X86_SIGFRAME_H */
diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm/signal.h
index 96ac44f275da..7761a5d554bb 100644
--- a/arch/x86/include/asm/signal.h
+++ b/arch/x86/include/asm/signal.h
@@ -121,6 +121,10 @@ typedef unsigned long sigset_t;
 
 #ifndef __ASSEMBLY__
 
+# ifdef __KERNEL__
+extern void do_notify_resume(struct pt_regs *, void *, __u32);
+# endif /* __KERNEL__ */
+
 #ifdef __i386__
 # ifdef __KERNEL__
 struct old_sigaction {
@@ -141,8 +145,6 @@ struct k_sigaction {
         struct sigaction sa;
 };
 
-extern void do_notify_resume(struct pt_regs *, void *, __u32);
-
 # else /* __KERNEL__ */
 /* Here we must cater to libcs that poke about in kernel headers.  */
 
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index d12811ce51d9..830b9fcb6427 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -60,7 +60,7 @@ struct smp_ops {
         void (*cpu_die)(unsigned int cpu);
         void (*play_dead)(void);
 
-        void (*send_call_func_ipi)(cpumask_t mask);
+        void (*send_call_func_ipi)(const struct cpumask *mask);
         void (*send_call_func_single_ipi)(int cpu);
 };
 
@@ -125,7 +125,7 @@ static inline void arch_send_call_function_single_ipi(int cpu)
 
 static inline void arch_send_call_function_ipi(cpumask_t mask)
 {
-        smp_ops.send_call_func_ipi(mask);
+        smp_ops.send_call_func_ipi(&mask);
 }
 
 void cpu_disable_common(void);
@@ -138,7 +138,7 @@ void native_cpu_die(unsigned int cpu);
 void native_play_dead(void);
 void play_dead_common(void);
 
-void native_send_call_func_ipi(cpumask_t mask);
+void native_send_call_func_ipi(const struct cpumask *mask);
 void native_send_call_func_single_ipi(int cpu);
 
 extern void prefill_possible_map(void);
diff --git a/arch/x86/include/asm/sparsemem.h b/arch/x86/include/asm/sparsemem.h
index be44f7dab395..e3cc3c063ec5 100644
--- a/arch/x86/include/asm/sparsemem.h
+++ b/arch/x86/include/asm/sparsemem.h
@@ -27,7 +27,7 @@
 #else /* CONFIG_X86_32 */
 # define SECTION_SIZE_BITS      27 /* matt - 128 is convenient right now */
 # define MAX_PHYSADDR_BITS      44
-# define MAX_PHYSMEM_BITS       44
+# define MAX_PHYSMEM_BITS       44 /* Can be max 45 bits */
 #endif
 
 #endif /* CONFIG_SPARSEMEM */
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index 9b3070f1c2ac..4bb5fb34f030 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -14,13 +14,13 @@
 
 #define APIC_DFR_VALUE  (APIC_DFR_CLUSTER)
 
-static inline cpumask_t target_cpus(void)
+static inline const cpumask_t *target_cpus(void)
 {
         /* CPU_MASK_ALL (0xff) has undefined behaviour with
          * dest_LowestPrio mode logical clustered apic interrupt routing
          * Just start on cpu 0.  IRQ balancing will spread load
          */
-        return cpumask_of_cpu(0);
+        return &cpumask_of_cpu(0);
 }
 
 #define INT_DELIVERY_MODE (dest_LowestPrio)
@@ -52,7 +52,7 @@ static inline void init_apic_ldr(void)
         int i;
 
         /* Create logical APIC IDs by counting CPUs already in cluster. */
-        for (count = 0, i = NR_CPUS; --i >= 0; ) {
+        for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
                 lid = cpu_2_logical_apicid[i];
                 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
                         ++count;
@@ -97,8 +97,8 @@ static inline int apicid_to_node(int logical_apicid)
 static inline int cpu_to_logical_apicid(int cpu)
 {
 #ifdef CONFIG_SMP
-       if (cpu >= NR_CPUS)
-               return BAD_APICID;
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
         return (int)cpu_2_logical_apicid[cpu];
 #else
         return logical_smp_processor_id();
@@ -107,7 +107,7 @@ static inline int cpu_to_logical_apicid(int cpu)
 
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
-        if (mps_cpu < NR_CPUS)
+        if (mps_cpu < nr_cpu_ids)
                 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
         else
                 return BAD_APICID;
@@ -137,25 +137,25 @@ static inline void enable_apic_mode(void)
 {
 }
 
-static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
 {
         int num_bits_set;
         int cpus_found = 0;
         int cpu;
         int apicid;
 
-        num_bits_set = cpus_weight(cpumask);
+        num_bits_set = cpus_weight(*cpumask);
         /* Return id to all */
-        if (num_bits_set == NR_CPUS)
+        if (num_bits_set >= nr_cpu_ids)
                 return (int) 0xFF;
         /*
          * The cpus in the mask must all be on the apic cluster.  If are not
          * on the same apicid cluster return default value of TARGET_CPUS.
          */
-        cpu = first_cpu(cpumask);
+        cpu = first_cpu(*cpumask);
         apicid = cpu_to_logical_apicid(cpu);
         while (cpus_found < num_bits_set) {
-                if (cpu_isset(cpu, cpumask)) {
+                if (cpu_isset(cpu, *cpumask)) {
                         int new_apicid = cpu_to_logical_apicid(cpu);
                         if (apicid_cluster(apicid) !=
                                         apicid_cluster(new_apicid)){
@@ -170,6 +170,23 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
         return apicid;
 }
 
+static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
+                                                  const struct cpumask *andmask)
+{
+        int apicid = cpu_to_logical_apicid(0);
+        cpumask_var_t cpumask;
+
+        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
+                return apicid;
+
+        cpumask_and(cpumask, inmask, andmask);
+        cpumask_and(cpumask, cpumask, cpu_online_mask);
+        apicid = cpu_mask_to_apicid(cpumask);
+
+        free_cpumask_var(cpumask);
+        return apicid;
+}
+
 /* cpuid returns the value latched in the HW at reset, not the APIC ID
  * register's value.  For any box whose BIOS changes APIC IDs, like
  * clustered APIC systems, we must use hard_smp_processor_id.
diff --git a/arch/x86/include/asm/summit/ipi.h b/arch/x86/include/asm/summit/ipi.h
index 53bd1e7bd7b4..a8a2c24f50cc 100644
--- a/arch/x86/include/asm/summit/ipi.h
+++ b/arch/x86/include/asm/summit/ipi.h
@@ -1,9 +1,10 @@
 #ifndef __ASM_SUMMIT_IPI_H
 #define __ASM_SUMMIT_IPI_H
 
-void send_IPI_mask_sequence(cpumask_t mask, int vector);
+void send_IPI_mask_sequence(const cpumask_t *mask, int vector);
+void send_IPI_mask_allbutself(const cpumask_t *mask, int vector);
 
-static inline void send_IPI_mask(cpumask_t mask, int vector)
+static inline void send_IPI_mask(const cpumask_t *mask, int vector)
 {
         send_IPI_mask_sequence(mask, vector);
 }
@@ -14,12 +15,12 @@ static inline void send_IPI_allbutself(int vector)
         cpu_clear(smp_processor_id(), mask);
 
         if (!cpus_empty(mask))
-                send_IPI_mask(mask, vector);
+                send_IPI_mask(&mask, vector);
 }
 
 static inline void send_IPI_all(int vector)
 {
-        send_IPI_mask(cpu_online_map, vector);
+        send_IPI_mask(&cpu_online_map, vector);
 }
 
 #endif /* __ASM_SUMMIT_IPI_H */
diff --git a/arch/x86/kvm/svm.h b/arch/x86/include/asm/svm.h
index 1b8afa78e869..1b8afa78e869 100644
--- a/arch/x86/kvm/svm.h
+++ b/arch/x86/include/asm/svm.h
diff --git a/arch/x86/include/asm/swiotlb.h b/arch/x86/include/asm/swiotlb.h
index 51fb2c76ad74..b9e4e20174fb 100644
--- a/arch/x86/include/asm/swiotlb.h
+++ b/arch/x86/include/asm/swiotlb.h
@@ -1,46 +1,10 @@
 #ifndef _ASM_X86_SWIOTLB_H
 #define _ASM_X86_SWIOTLB_H
 
-#include <asm/dma-mapping.h>
+#include <linux/swiotlb.h>
 
 /* SWIOTLB interface */
 
-extern dma_addr_t swiotlb_map_single(struct device *hwdev, void *ptr,
-                                     size_t size, int dir);
-extern void *swiotlb_alloc_coherent(struct device *hwdev, size_t size,
-                                    dma_addr_t *dma_handle, gfp_t flags);
-extern void swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr,
-                                 size_t size, int dir);
-extern void swiotlb_sync_single_for_cpu(struct device *hwdev,
-                                        dma_addr_t dev_addr,
-                                        size_t size, int dir);
-extern void swiotlb_sync_single_for_device(struct device *hwdev,
-                                           dma_addr_t dev_addr,
-                                           size_t size, int dir);
-extern void swiotlb_sync_single_range_for_cpu(struct device *hwdev,
-                                              dma_addr_t dev_addr,
-                                              unsigned long offset,
-                                              size_t size, int dir);
-extern void swiotlb_sync_single_range_for_device(struct device *hwdev,
-                                                 dma_addr_t dev_addr,
-                                                 unsigned long offset,
-                                                 size_t size, int dir);
-extern void swiotlb_sync_sg_for_cpu(struct device *hwdev,
-                                    struct scatterlist *sg, int nelems,
-                                    int dir);
-extern void swiotlb_sync_sg_for_device(struct device *hwdev,
-                                       struct scatterlist *sg, int nelems,
-                                       int dir);
-extern int swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg,
-                          int nents, int direction);
-extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg,
-                             int nents, int direction);
-extern int swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr);
-extern void swiotlb_free_coherent(struct device *hwdev, size_t size,
-                                  void *vaddr, dma_addr_t dma_handle);
-extern int swiotlb_dma_supported(struct device *hwdev, u64 mask);
-extern void swiotlb_init(void);
-
 extern int swiotlb_force;
 
 #ifdef CONFIG_SWIOTLB
diff --git a/arch/x86/include/asm/sys_ia32.h b/arch/x86/include/asm/sys_ia32.h
new file mode 100644
index 000000000000..ffb08be2a530
--- /dev/null
+++ b/arch/x86/include/asm/sys_ia32.h
@@ -0,0 +1,101 @@
+/*
+ * sys_ia32.h - Linux ia32 syscall interfaces
+ *
+ * Copyright (c) 2008 Jaswinder Singh Rajput
+ *
+ * This file is released under the GPLv2.
+ * See the file COPYING for more details.
+ */
+
+#ifndef _ASM_X86_SYS_IA32_H
+#define _ASM_X86_SYS_IA32_H
+
+#include <linux/compiler.h>
+#include <linux/linkage.h>
+#include <linux/types.h>
+#include <linux/signal.h>
+#include <asm/compat.h>
+#include <asm/ia32.h>
+
+/* ia32/sys_ia32.c */
+asmlinkage long sys32_truncate64(char __user *, unsigned long, unsigned long);
+asmlinkage long sys32_ftruncate64(unsigned int, unsigned long, unsigned long);
+
+asmlinkage long sys32_stat64(char __user *, struct stat64 __user *);
+asmlinkage long sys32_lstat64(char __user *, struct stat64 __user *);
+asmlinkage long sys32_fstat64(unsigned int, struct stat64 __user *);
+asmlinkage long sys32_fstatat(unsigned int, char __user *,
+                              struct stat64 __user *, int);
+struct mmap_arg_struct;
+asmlinkage long sys32_mmap(struct mmap_arg_struct __user *);
+asmlinkage long sys32_mprotect(unsigned long, size_t, unsigned long);
+
+asmlinkage long sys32_pipe(int __user *);
+struct sigaction32;
+struct old_sigaction32;
+asmlinkage long sys32_rt_sigaction(int, struct sigaction32 __user *,
+                                   struct sigaction32 __user *, unsigned int);
+asmlinkage long sys32_sigaction(int, struct old_sigaction32 __user *,
+                                struct old_sigaction32 __user *);
+asmlinkage long sys32_rt_sigprocmask(int, compat_sigset_t __user *,
+                                     compat_sigset_t __user *, unsigned int);
+asmlinkage long sys32_alarm(unsigned int);
+
+struct sel_arg_struct;
+asmlinkage long sys32_old_select(struct sel_arg_struct __user *);
+asmlinkage long sys32_waitpid(compat_pid_t, unsigned int *, int);
+asmlinkage long sys32_sysfs(int, u32, u32);
+
+asmlinkage long sys32_sched_rr_get_interval(compat_pid_t,
+                                            struct compat_timespec __user *);
+asmlinkage long sys32_rt_sigpending(compat_sigset_t __user *, compat_size_t);
+asmlinkage long sys32_rt_sigqueueinfo(int, int, compat_siginfo_t __user *);
+
+#ifdef CONFIG_SYSCTL_SYSCALL
+struct sysctl_ia32;
+asmlinkage long sys32_sysctl(struct sysctl_ia32 __user *);
+#endif
+
+asmlinkage long sys32_pread(unsigned int, char __user *, u32, u32, u32);
+asmlinkage long sys32_pwrite(unsigned int, char __user *, u32, u32, u32);
+
+asmlinkage long sys32_personality(unsigned long);
+asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32);
+
+asmlinkage long sys32_mmap2(unsigned long, unsigned long, unsigned long,
+                            unsigned long, unsigned long, unsigned long);
+
+struct oldold_utsname;
+struct old_utsname;
+asmlinkage long sys32_olduname(struct oldold_utsname __user *);
+long sys32_uname(struct old_utsname __user *);
+
+long sys32_ustat(unsigned, struct ustat32 __user *);
+
+asmlinkage long sys32_execve(char __user *, compat_uptr_t __user *,
+                             compat_uptr_t __user *, struct pt_regs *);
+asmlinkage long sys32_clone(unsigned int, unsigned int, struct pt_regs *);
+
+long sys32_lseek(unsigned int, int, unsigned int);
+long sys32_kill(int, int);
+long sys32_fadvise64_64(int, __u32, __u32, __u32, __u32, int);
+long sys32_vm86_warning(void);
+long sys32_lookup_dcookie(u32, u32, char __user *, size_t);
+
+asmlinkage ssize_t sys32_readahead(int, unsigned, unsigned, size_t);
+asmlinkage long sys32_sync_file_range(int, unsigned, unsigned,
+                                      unsigned, unsigned, int);
+asmlinkage long sys32_fadvise64(int, unsigned, unsigned, size_t, int);
+asmlinkage long sys32_fallocate(int, int, unsigned,
+                                unsigned, unsigned, unsigned);
+
+/* ia32/ia32_signal.c */
+asmlinkage long sys32_sigsuspend(int, int, old_sigset_t);
+asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *,
+                                  stack_ia32_t __user *, struct pt_regs *);
+asmlinkage long sys32_sigreturn(struct pt_regs *);
+asmlinkage long sys32_rt_sigreturn(struct pt_regs *);
+
+/* ia32/ipc32.c */
+asmlinkage long sys32_ipc(u32, int, int, int, compat_uptr_t, u32);
+#endif /* _ASM_X86_SYS_IA32_H */
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 87803da44010..9c6797c3e56c 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -19,6 +19,13 @@
 /* kernel/ioport.c */
 asmlinkage long sys_ioperm(unsigned long, unsigned long, int);
 
+/* kernel/ldt.c */
+asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
+
+/* kernel/tls.c */
+asmlinkage int sys_set_thread_area(struct user_desc __user *);
+asmlinkage int sys_get_thread_area(struct user_desc __user *);
+
 /* X86_32 only */
 #ifdef CONFIG_X86_32
 /* kernel/process_32.c */
@@ -33,14 +40,11 @@ asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
                              struct old_sigaction __user *);
 asmlinkage int sys_sigaltstack(unsigned long);
 asmlinkage unsigned long sys_sigreturn(unsigned long);
-asmlinkage int sys_rt_sigreturn(unsigned long);
+asmlinkage int sys_rt_sigreturn(struct pt_regs);
 
 /* kernel/ioport.c */
 asmlinkage long sys_iopl(unsigned long);
 
-/* kernel/ldt.c */
-asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
-
 /* kernel/sys_i386_32.c */
 asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
                           unsigned long, unsigned long, unsigned long);
@@ -54,10 +58,6 @@ asmlinkage int sys_uname(struct old_utsname __user *);
 struct oldold_utsname;
 asmlinkage int sys_olduname(struct oldold_utsname __user *);
 
-/* kernel/tls.c */
-asmlinkage int sys_set_thread_area(struct user_desc __user *);
-asmlinkage int sys_get_thread_area(struct user_desc __user *);
-
 /* kernel/vm86_32.c */
 asmlinkage int sys_vm86old(struct pt_regs);
 asmlinkage int sys_vm86(struct pt_regs);
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index 2ed3f0f44ff7..8e626ea33a1a 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -17,12 +17,12 @@
 # define AT_VECTOR_SIZE_ARCH 1
 #endif
 
-#ifdef CONFIG_X86_32
-
 struct task_struct; /* one of the stranger aspects of C forward declarations */
 struct task_struct *__switch_to(struct task_struct *prev,
                                 struct task_struct *next);
 
+#ifdef CONFIG_X86_32
+
 /*
  * Saving eflags is important. It switches not only IOPL between tasks,
  * it also protects other tasks from NT leaking through sysenter etc.
@@ -314,6 +314,8 @@ extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
 
 void default_idle(void);
 
+void stop_this_cpu(void *dummy);
+
 /*
  * Force strict CPU ordering.
  * And yes, this is required on UP too when we're talking
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index e44d379faad2..98789647baa9 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -20,11 +20,13 @@
 struct task_struct;
 struct exec_domain;
 #include <asm/processor.h>
+#include <asm/ftrace.h>
+#include <asm/atomic.h>
 
 struct thread_info {
         struct task_struct      *task;          /* main task structure */
         struct exec_domain      *exec_domain;   /* execution domain */
-        unsigned long           flags;          /* low level flags */
+        __u32                   flags;          /* low level flags */
         __u32                   status;         /* thread synchronous flags */
         __u32                   cpu;            /* current CPU */
         int                     preempt_count;  /* 0 => preemptable,
@@ -91,7 +93,6 @@ struct thread_info {
 #define TIF_FORCED_TF           24      /* true if TF in eflags artificially */
 #define TIF_DEBUGCTLMSR         25      /* uses thread_struct.debugctlmsr */
 #define TIF_DS_AREA_MSR         26      /* uses thread_struct.ds_area_msr */
-#define TIF_BTS_TRACE_TS        27      /* record scheduling event timestamps */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
@@ -113,7 +114,6 @@ struct thread_info {
 #define _TIF_FORCED_TF          (1 << TIF_FORCED_TF)
 #define _TIF_DEBUGCTLMSR        (1 << TIF_DEBUGCTLMSR)
 #define _TIF_DS_AREA_MSR        (1 << TIF_DS_AREA_MSR)
-#define _TIF_BTS_TRACE_TS       (1 << TIF_BTS_TRACE_TS)
 
 /* work to do in syscall_trace_enter() */
 #define _TIF_WORK_SYSCALL_ENTRY \
@@ -139,8 +139,7 @@ struct thread_info {
 
 /* flags to check in __switch_to() */
 #define _TIF_WORK_CTXSW                                                 \
-        (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_BTS_TRACE_TS| \
-                                                                _TIF_NOTSC)
+        (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_NOTSC)
 
 #define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW
 #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG)
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index ff386ff50ed7..4e2f2e0aab27 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -61,13 +61,19 @@ static inline int cpu_to_node(int cpu)
  *
  * Side note: this function creates the returned cpumask on the stack
  * so with a high NR_CPUS count, excessive stack space is used.  The
- * node_to_cpumask_ptr function should be used whenever possible.
+ * cpumask_of_node function should be used whenever possible.
  */
 static inline cpumask_t node_to_cpumask(int node)
 {
         return node_to_cpumask_map[node];
 }
 
+/* Returns a bitmask of CPUs on Node 'node'. */
+static inline const struct cpumask *cpumask_of_node(int node)
+{
+        return &node_to_cpumask_map[node];
+}
+
 #else /* CONFIG_X86_64 */
 
 /* Mappings between node number and cpus on that node. */
@@ -82,7 +88,7 @@ DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
 #ifdef CONFIG_DEBUG_PER_CPU_MAPS
 extern int cpu_to_node(int cpu);
 extern int early_cpu_to_node(int cpu);
-extern const cpumask_t *_node_to_cpumask_ptr(int node);
+extern const cpumask_t *cpumask_of_node(int node);
 extern cpumask_t node_to_cpumask(int node);
 
 #else   /* !CONFIG_DEBUG_PER_CPU_MAPS */
@@ -103,7 +109,7 @@ static inline int early_cpu_to_node(int cpu)
 }
 
 /* Returns a pointer to the cpumask of CPUs on Node 'node'. */
-static inline const cpumask_t *_node_to_cpumask_ptr(int node)
+static inline const cpumask_t *cpumask_of_node(int node)
 {
         return &node_to_cpumask_map[node];
 }
@@ -116,12 +122,15 @@ static inline cpumask_t node_to_cpumask(int node)
 
 #endif /* !CONFIG_DEBUG_PER_CPU_MAPS */
 
-/* Replace default node_to_cpumask_ptr with optimized version */
+/*
+ * Replace default node_to_cpumask_ptr with optimized version
+ * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
+ */
 #define node_to_cpumask_ptr(v, node)            \
-                const cpumask_t *v = _node_to_cpumask_ptr(node)
+                const cpumask_t *v = cpumask_of_node(node)
 
 #define node_to_cpumask_ptr_next(v, node)       \
-                           v = _node_to_cpumask_ptr(node)
+                           v = cpumask_of_node(node)
 
 #endif /* CONFIG_X86_64 */
 
@@ -187,7 +196,7 @@ extern int __node_distance(int, int);
 #define cpu_to_node(cpu)        0
 #define early_cpu_to_node(cpu)  0
 
-static inline const cpumask_t *_node_to_cpumask_ptr(int node)
+static inline const cpumask_t *cpumask_of_node(int node)
 {
         return &cpu_online_map;
 }
@@ -200,12 +209,15 @@ static inline int node_to_first_cpu(int node)
         return first_cpu(cpu_online_map);
 }
 
-/* Replace default node_to_cpumask_ptr with optimized version */
+/*
+ * Replace default node_to_cpumask_ptr with optimized version
+ * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
+ */
 #define node_to_cpumask_ptr(v, node)            \
-                const cpumask_t *v = _node_to_cpumask_ptr(node)
+                const cpumask_t *v = cpumask_of_node(node)
 
 #define node_to_cpumask_ptr_next(v, node)       \
-                           v = _node_to_cpumask_ptr(node)
+                           v = cpumask_of_node(node)
 #endif
 
 #include <asm-generic/topology.h>
@@ -214,18 +226,20 @@ static inline int node_to_first_cpu(int node)
 /* Returns the number of the first CPU on Node 'node'. */
 static inline int node_to_first_cpu(int node)
 {
-        node_to_cpumask_ptr(mask, node);
-        return first_cpu(*mask);
+        return cpumask_first(cpumask_of_node(node));
 }
 #endif
 
 extern cpumask_t cpu_coregroup_map(int cpu);
+extern const struct cpumask *cpu_coregroup_mask(int cpu);
 
 #ifdef ENABLE_TOPO_DEFINES
 #define topology_physical_package_id(cpu)       (cpu_data(cpu).phys_proc_id)
 #define topology_core_id(cpu)                   (cpu_data(cpu).cpu_core_id)
 #define topology_core_siblings(cpu)             (per_cpu(cpu_core_map, cpu))
 #define topology_thread_siblings(cpu)           (per_cpu(cpu_sibling_map, cpu))
+#define topology_core_cpumask(cpu)              (&per_cpu(cpu_core_map, cpu))
+#define topology_thread_cpumask(cpu)            (&per_cpu(cpu_sibling_map, cpu))
 
 /* indicates that pointers to the topology cpumask_t maps are valid */
 #define arch_provides_topology_pointers         yes
diff --git a/arch/x86/include/asm/trampoline.h b/arch/x86/include/asm/trampoline.h
index fa0d79facdbc..780ba0ab94f9 100644
--- a/arch/x86/include/asm/trampoline.h
+++ b/arch/x86/include/asm/trampoline.h
@@ -3,6 +3,7 @@
 
 #ifndef __ASSEMBLY__
 
+#ifdef CONFIG_X86_TRAMPOLINE
 /*
  * Trampoline 80x86 program as an array.
  */
@@ -13,8 +14,14 @@ extern unsigned char *trampoline_base;
 extern unsigned long init_rsp;
 extern unsigned long initial_code;
 
+#define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE)
 #define TRAMPOLINE_BASE 0x6000
+
 extern unsigned long setup_trampoline(void);
+extern void __init reserve_trampoline_memory(void);
+#else
+static inline void reserve_trampoline_memory(void) {};
+#endif /* CONFIG_X86_TRAMPOLINE */
 
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index 45dee286e45c..2ee0a3bceedf 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -46,6 +46,10 @@ dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);
 dotraplinkage void do_invalid_TSS(struct pt_regs *, long);
 dotraplinkage void do_segment_not_present(struct pt_regs *, long);
 dotraplinkage void do_stack_segment(struct pt_regs *, long);
+#ifdef CONFIG_X86_64
+dotraplinkage void do_double_fault(struct pt_regs *, long);
+asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *);
+#endif
 dotraplinkage void do_general_protection(struct pt_regs *, long);
 dotraplinkage void do_page_fault(struct pt_regs *, unsigned long);
 dotraplinkage void do_spurious_interrupt_bug(struct pt_regs *, long);
@@ -72,10 +76,13 @@ static inline int get_si_code(unsigned long condition)
 extern int panic_on_unrecovered_nmi;
 extern int kstack_depth_to_print;
 
-#ifdef CONFIG_X86_32
 void math_error(void __user *);
-unsigned long patch_espfix_desc(unsigned long, unsigned long);
 asmlinkage void math_emulate(long);
+#ifdef CONFIG_X86_32
+unsigned long patch_espfix_desc(unsigned long, unsigned long);
+#else
+asmlinkage void smp_thermal_interrupt(void);
+asmlinkage void mce_threshold_interrupt(void);
 #endif
 
 #endif /* _ASM_X86_TRAPS_H */
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 9cd83a8e40d5..38ae163cc91b 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -34,8 +34,6 @@ static inline cycles_t get_cycles(void)
 
 static __always_inline cycles_t vget_cycles(void)
 {
-        cycles_t cycles;
-
         /*
          * We only do VDSOs on TSC capable CPUs, so this shouldnt
          * access boot_cpu_data (which is not VDSO-safe):
@@ -44,11 +42,7 @@ static __always_inline cycles_t vget_cycles(void)
         if (!cpu_has_tsc)
                 return 0;
 #endif
-        rdtsc_barrier();
-        cycles = (cycles_t)__native_read_tsc();
-        rdtsc_barrier();
-
-        return cycles;
+        return (cycles_t)__native_read_tsc();
 }
 
 extern void tsc_init(void);
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 35c54921b2e4..4340055b7559 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -157,6 +157,7 @@ extern int __get_user_bad(void);
         int __ret_gu;                                                   \
         unsigned long __val_gu;                                         \
         __chk_user_ptr(ptr);                                            \
+        might_fault();                                                  \
         switch (sizeof(*(ptr))) {                                       \
         case 1:                                                         \
                 __get_user_x(1, __ret_gu, __val_gu, ptr);               \
@@ -241,6 +242,7 @@ extern void __put_user_8(void);
         int __ret_pu;                                           \
         __typeof__(*(ptr)) __pu_val;                            \
         __chk_user_ptr(ptr);                                    \
+        might_fault();                                          \
         __pu_val = x;                                           \
         switch (sizeof(*(ptr))) {                               \
         case 1:                                                 \
@@ -350,14 +352,14 @@ do {									\
 
 #define __put_user_nocheck(x, ptr, size)                        \
 ({                                                              \
-        long __pu_err;                                          \
+        int __pu_err;                                           \
         __put_user_size((x), (ptr), (size), __pu_err, -EFAULT); \
         __pu_err;                                               \
 })
 
 #define __get_user_nocheck(x, ptr, size)                                \
 ({                                                                      \
-        long __gu_err;                                                  \
+        int __gu_err;                                                   \
         unsigned long __gu_val;                                         \
         __get_user_size(__gu_val, (ptr), (size), __gu_err, -EFAULT);    \
         (x) = (__force __typeof__(*(ptr)))__gu_val;                     \
diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h
index d095a3aeea1b..5e06259e90e5 100644
--- a/arch/x86/include/asm/uaccess_32.h
+++ b/arch/x86/include/asm/uaccess_32.h
@@ -82,8 +82,8 @@ __copy_to_user_inatomic(void __user *to, const void *from, unsigned long n)
 static __always_inline unsigned long __must_check
 __copy_to_user(void __user *to, const void *from, unsigned long n)
 {
-       might_sleep();
-       return __copy_to_user_inatomic(to, from, n);
+        might_fault();
+        return __copy_to_user_inatomic(to, from, n);
 }
 
 static __always_inline unsigned long
@@ -137,7 +137,7 @@ __copy_from_user_inatomic(void *to, const void __user *from, unsigned long n)
 static __always_inline unsigned long
 __copy_from_user(void *to, const void __user *from, unsigned long n)
 {
-        might_sleep();
+        might_fault();
         if (__builtin_constant_p(n)) {
                 unsigned long ret;
 
@@ -159,7 +159,7 @@ __copy_from_user(void *to, const void __user *from, unsigned long n)
 static __always_inline unsigned long __copy_from_user_nocache(void *to,
                                 const void __user *from, unsigned long n)
 {
-        might_sleep();
+        might_fault();
         if (__builtin_constant_p(n)) {
                 unsigned long ret;
 
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h
index f8cfd00db450..84210c479fca 100644
--- a/arch/x86/include/asm/uaccess_64.h
+++ b/arch/x86/include/asm/uaccess_64.h
@@ -29,6 +29,8 @@ static __always_inline __must_check
 int __copy_from_user(void *dst, const void __user *src, unsigned size)
 {
         int ret = 0;
+
+        might_fault();
         if (!__builtin_constant_p(size))
                 return copy_user_generic(dst, (__force void *)src, size);
         switch (size) {
@@ -71,6 +73,8 @@ static __always_inline __must_check
 int __copy_to_user(void __user *dst, const void *src, unsigned size)
 {
         int ret = 0;
+
+        might_fault();
         if (!__builtin_constant_p(size))
                 return copy_user_generic((__force void *)dst, src, size);
         switch (size) {
@@ -113,6 +117,8 @@ static __always_inline __must_check
 int __copy_in_user(void __user *dst, const void __user *src, unsigned size)
 {
         int ret = 0;
+
+        might_fault();
         if (!__builtin_constant_p(size))
                 return copy_user_generic((__force void *)dst,
                                          (__force void *)src, size);
diff --git a/arch/x86/include/asm/unwind.h b/arch/x86/include/asm/unwind.h
deleted file mode 100644
index 8b064bd9c553..000000000000
--- a/arch/x86/include/asm/unwind.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef _ASM_X86_UNWIND_H
-#define _ASM_X86_UNWIND_H
-
-#define UNW_PC(frame) ((void)(frame), 0UL)
-#define UNW_SP(frame) ((void)(frame), 0UL)
-#define UNW_FP(frame) ((void)(frame), 0UL)
-
-static inline int arch_unw_user_mode(const void *info)
-{
-        return 0;
-}
-
-#endif /* _ASM_X86_UNWIND_H */
diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index d931d3b7e6f7..7ed17ff502b9 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -32,13 +32,18 @@
 enum uv_bios_cmd {
         UV_BIOS_COMMON,
         UV_BIOS_GET_SN_INFO,
-        UV_BIOS_FREQ_BASE
+        UV_BIOS_FREQ_BASE,
+        UV_BIOS_WATCHLIST_ALLOC,
+        UV_BIOS_WATCHLIST_FREE,
+        UV_BIOS_MEMPROTECT,
+        UV_BIOS_GET_PARTITION_ADDR
 };
 
 /*
  * Status values returned from a BIOS call.
  */
 enum {
+        BIOS_STATUS_MORE_PASSES         =  1,
         BIOS_STATUS_SUCCESS             =  0,
         BIOS_STATUS_UNIMPLEMENTED       = -ENOSYS,
         BIOS_STATUS_EINVAL              = -EINVAL,
@@ -71,6 +76,21 @@ union partition_info_u {
         };
 };
 
+union uv_watchlist_u {
+        u64     val;
+        struct {
+                u64     blade   : 16,
+                        size    : 32,
+                        filler  : 16;
+        };
+};
+
+enum uv_memprotect {
+        UV_MEMPROT_RESTRICT_ACCESS,
+        UV_MEMPROT_ALLOW_AMO,
+        UV_MEMPROT_ALLOW_RW
+};
+
 /*
  * bios calls have 6 parameters
  */
@@ -80,14 +100,20 @@ extern s64 uv_bios_call_reentrant(enum uv_bios_cmd, u64, u64, u64, u64, u64);
 
 extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *);
 extern s64 uv_bios_freq_base(u64, u64 *);
+extern int uv_bios_mq_watchlist_alloc(int, unsigned long, unsigned int,
+                                        unsigned long *);
+extern int uv_bios_mq_watchlist_free(int, int);
+extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect);
+extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 *);
 
 extern void uv_bios_init(void);
 
+extern unsigned long sn_rtc_cycles_per_second;
 extern int uv_type;
 extern long sn_partition_id;
-extern long uv_coherency_id;
-extern long uv_region_size;
-#define partition_coherence_id()        (uv_coherency_id)
+extern long sn_coherency_id;
+extern long sn_region_size;
+#define partition_coherence_id()        (sn_coherency_id)
 
 extern struct kobject *sgi_uv_kobj;     /* /sys/firmware/sgi_uv */
 
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index e2363253bbbf..50423c7b56b2 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -133,61 +133,61 @@ struct bau_msg_payload {
  * see table 4.2.3.0.1 in broacast_assist spec.
  */
 struct bau_msg_header {
-        int dest_subnodeid:6;   /* must be zero */
+        unsigned int dest_subnodeid:6;  /* must be zero */
         /* bits 5:0 */
-        int base_dest_nodeid:15; /* nasid>>1 (pnode) of first bit in node_map */
-        /* bits 20:6 */
-        int command:8;          /* message type */
+        unsigned int base_dest_nodeid:15; /* nasid>>1 (pnode) of */
+        /* bits 20:6 */                   /* first bit in node_map */
+        unsigned int command:8; /* message type */
         /* bits 28:21 */
                                 /* 0x38: SN3net EndPoint Message */
-        int rsvd_1:3;           /* must be zero */
+        unsigned int rsvd_1:3;  /* must be zero */
         /* bits 31:29 */
                                 /* int will align on 32 bits */
-        int rsvd_2:9;           /* must be zero */
+        unsigned int rsvd_2:9;  /* must be zero */
         /* bits 40:32 */
                                 /* Suppl_A is 56-41 */
-        int payload_2a:8;       /* becomes byte 16 of msg */
+        unsigned int payload_2a:8;/* becomes byte 16 of msg */
         /* bits 48:41 */        /* not currently using */
-        int payload_2b:8;       /* becomes byte 17 of msg */
+        unsigned int payload_2b:8;/* becomes byte 17 of msg */
         /* bits 56:49 */        /* not currently using */
                                 /* Address field (96:57) is never used as an
                                    address (these are address bits 42:3) */
-        int rsvd_3:1;           /* must be zero */
+        unsigned int rsvd_3:1;  /* must be zero */
         /* bit 57 */
                                 /* address bits 27:4 are payload */
                                 /* these 24 bits become bytes 12-14 of msg */
-        int replied_to:1;       /* sent as 0 by the source to byte 12 */
+        unsigned int replied_to:1;/* sent as 0 by the source to byte 12 */
         /* bit 58 */
 
-        int payload_1a:5;       /* not currently used */
+        unsigned int payload_1a:5;/* not currently used */
         /* bits 63:59 */
-        int payload_1b:8;       /* not currently used */
+        unsigned int payload_1b:8;/* not currently used */
         /* bits 71:64 */
-        int payload_1c:8;       /* not currently used */
+        unsigned int payload_1c:8;/* not currently used */
         /* bits 79:72 */
-        int payload_1d:2;       /* not currently used */
+        unsigned int payload_1d:2;/* not currently used */
         /* bits 81:80 */
 
-        int rsvd_4:7;           /* must be zero */
+        unsigned int rsvd_4:7;  /* must be zero */
         /* bits 88:82 */
-        int sw_ack_flag:1;      /* software acknowledge flag */
+        unsigned int sw_ack_flag:1;/* software acknowledge flag */
         /* bit 89 */
                                 /* INTD trasactions at destination are to
                                    wait for software acknowledge */
-        int rsvd_5:6;           /* must be zero */
+        unsigned int rsvd_5:6;  /* must be zero */
         /* bits 95:90 */
-        int rsvd_6:5;           /* must be zero */
+        unsigned int rsvd_6:5;  /* must be zero */
         /* bits 100:96 */
-        int int_both:1;         /* if 1, interrupt both sockets on the blade */
+        unsigned int int_both:1;/* if 1, interrupt both sockets on the blade */
         /* bit 101*/
-        int fairness:3;         /* usually zero */
+        unsigned int fairness:3;/* usually zero */
         /* bits 104:102 */
-        int multilevel:1;       /* multi-level multicast format */
+        unsigned int multilevel:1;      /* multi-level multicast format */
         /* bit 105 */
                                 /* 0 for TLB: endpoint multi-unicast messages */
-        int chaining:1;         /* next descriptor is part of this activation*/
+        unsigned int chaining:1;/* next descriptor is part of this activation*/
         /* bit 106 */
-        int rsvd_7:21;          /* must be zero */
+        unsigned int rsvd_7:21; /* must be zero */
         /* bits 127:107 */
 };
 
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 7a5782610b2b..777327ef05c1 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -113,25 +113,37 @@
  */
 #define UV_MAX_NASID_VALUE      (UV_MAX_NUMALINK_NODES * 2)
 
+struct uv_scir_s {
+        struct timer_list timer;
+        unsigned long   offset;
+        unsigned long   last;
+        unsigned long   idle_on;
+        unsigned long   idle_off;
+        unsigned char   state;
+        unsigned char   enabled;
+};
+
 /*
  * The following defines attributes of the HUB chip. These attributes are
  * frequently referenced and are kept in the per-cpu data areas of each cpu.
  * They are kept together in a struct to minimize cache misses.
  */
 struct uv_hub_info_s {
-        unsigned long   global_mmr_base;
-        unsigned long   gpa_mask;
-        unsigned long   gnode_upper;
-        unsigned long   lowmem_remap_top;
-        unsigned long   lowmem_remap_base;
-        unsigned short  pnode;
-        unsigned short  pnode_mask;
-        unsigned short  coherency_domain_number;
-        unsigned short  numa_blade_id;
-        unsigned char   blade_processor_id;
-        unsigned char   m_val;
-        unsigned char   n_val;
+        unsigned long           global_mmr_base;
+        unsigned long           gpa_mask;
+        unsigned long           gnode_upper;
+        unsigned long           lowmem_remap_top;
+        unsigned long           lowmem_remap_base;
+        unsigned short          pnode;
+        unsigned short          pnode_mask;
+        unsigned short          coherency_domain_number;
+        unsigned short          numa_blade_id;
+        unsigned char           blade_processor_id;
+        unsigned char           m_val;
+        unsigned char           n_val;
+        struct uv_scir_s        scir;
 };
+
 DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 #define uv_hub_info             (&__get_cpu_var(__uv_hub_info))
 #define uv_cpu_hub_info(cpu)    (&per_cpu(__uv_hub_info, cpu))
@@ -163,6 +175,30 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 
 #define UV_APIC_PNODE_SHIFT     6
 
+/* Local Bus from cpu's perspective */
+#define LOCAL_BUS_BASE          0x1c00000
+#define LOCAL_BUS_SIZE          (4 * 1024 * 1024)
+
+/*
+ * System Controller Interface Reg
+ *
+ * Note there are NO leds on a UV system.  This register is only
+ * used by the system controller to monitor system-wide operation.
+ * There are 64 regs per node.  With Nahelem cpus (2 cores per node,
+ * 8 cpus per core, 2 threads per cpu) there are 32 cpu threads on
+ * a node.
+ *
+ * The window is located at top of ACPI MMR space
+ */
+#define SCIR_WINDOW_COUNT       64
+#define SCIR_LOCAL_MMR_BASE     (LOCAL_BUS_BASE + \
+                                 LOCAL_BUS_SIZE - \
+                                 SCIR_WINDOW_COUNT)
+
+#define SCIR_CPU_HEARTBEAT      0x01    /* timer interrupt */
+#define SCIR_CPU_ACTIVITY       0x02    /* not idle */
+#define SCIR_CPU_HB_INTERVAL    (HZ)    /* once per second */
+
 /*
  * Macros for converting between kernel virtual addresses, socket local physical
  * addresses, and UV global physical addresses.
@@ -174,7 +210,7 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr)
 {
         if (paddr < uv_hub_info->lowmem_remap_top)
-                paddr += uv_hub_info->lowmem_remap_base;
+                paddr |= uv_hub_info->lowmem_remap_base;
         return paddr | uv_hub_info->gnode_upper;
 }
 
@@ -182,19 +218,7 @@ static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr)
 /* socket virtual --> UV global physical address */
 static inline unsigned long uv_gpa(void *v)
 {
-        return __pa(v) | uv_hub_info->gnode_upper;
-}
-
-/* socket virtual --> UV global physical address */
-static inline void *uv_vgpa(void *v)
-{
-        return (void *)uv_gpa(v);
-}
-
-/* UV global physical address --> socket virtual */
-static inline void *uv_va(unsigned long gpa)
-{
-        return __va(gpa & uv_hub_info->gpa_mask);
+        return uv_soc_phys_ram_to_gpa(__pa(v));
 }
 
 /* pnode, offset --> socket virtual */
@@ -277,6 +301,16 @@ static inline void uv_write_local_mmr(unsigned long offset, unsigned long val)
         *uv_local_mmr_address(offset) = val;
 }
 
+static inline unsigned char uv_read_local_mmr8(unsigned long offset)
+{
+        return *((unsigned char *)uv_local_mmr_address(offset));
+}
+
+static inline void uv_write_local_mmr8(unsigned long offset, unsigned char val)
+{
+        *((unsigned char *)uv_local_mmr_address(offset)) = val;
+}
+
 /*
  * Structures and definitions for converting between cpu, node, pnode, and blade
  * numbers.
@@ -351,5 +385,20 @@ static inline int uv_num_possible_blades(void)
         return uv_possible_blades;
 }
 
-#endif /* _ASM_X86_UV_UV_HUB_H */
+/* Update SCIR state */
+static inline void uv_set_scir_bits(unsigned char value)
+{
+        if (uv_hub_info->scir.state != value) {
+                uv_hub_info->scir.state = value;
+                uv_write_local_mmr8(uv_hub_info->scir.offset, value);
+        }
+}
+static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
+{
+        if (uv_cpu_hub_info(cpu)->scir.state != value) {
+                uv_cpu_hub_info(cpu)->scir.state = value;
+                uv_write_local_mmr8(uv_cpu_hub_info(cpu)->scir.offset, value);
+        }
+}
 
+#endif /* _ASM_X86_UV_UV_HUB_H */
diff --git a/arch/x86/include/asm/virtext.h b/arch/x86/include/asm/virtext.h
new file mode 100644
index 000000000000..593636275238
--- /dev/null
+++ b/arch/x86/include/asm/virtext.h
@@ -0,0 +1,132 @@
+/* CPU virtualization extensions handling
+ *
+ * This should carry the code for handling CPU virtualization extensions
+ * that needs to live in the kernel core.
+ *
+ * Author: Eduardo Habkost <ehabkost@redhat.com>
+ *
+ * Copyright (C) 2008, Red Hat Inc.
+ *
+ * Contains code from KVM, Copyright (C) 2006 Qumranet, Inc.
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+#ifndef _ASM_X86_VIRTEX_H
+#define _ASM_X86_VIRTEX_H
+
+#include <asm/processor.h>
+#include <asm/system.h>
+
+#include <asm/vmx.h>
+#include <asm/svm.h>
+
+/*
+ * VMX functions:
+ */
+
+static inline int cpu_has_vmx(void)
+{
+        unsigned long ecx = cpuid_ecx(1);
+        return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
+}
+
+
+/** Disable VMX on the current CPU
+ *
+ * vmxoff causes a undefined-opcode exception if vmxon was not run
+ * on the CPU previously. Only call this function if you know VMX
+ * is enabled.
+ */
+static inline void cpu_vmxoff(void)
+{
+        asm volatile (ASM_VMX_VMXOFF : : : "cc");
+        write_cr4(read_cr4() & ~X86_CR4_VMXE);
+}
+
+static inline int cpu_vmx_enabled(void)
+{
+        return read_cr4() & X86_CR4_VMXE;
+}
+
+/** Disable VMX if it is enabled on the current CPU
+ *
+ * You shouldn't call this if cpu_has_vmx() returns 0.
+ */
+static inline void __cpu_emergency_vmxoff(void)
+{
+        if (cpu_vmx_enabled())
+                cpu_vmxoff();
+}
+
+/** Disable VMX if it is supported and enabled on the current CPU
+ */
+static inline void cpu_emergency_vmxoff(void)
+{
+        if (cpu_has_vmx())
+                __cpu_emergency_vmxoff();
+}
+
+
+
+
+/*
+ * SVM functions:
+ */
+
+/** Check if the CPU has SVM support
+ *
+ * You can use the 'msg' arg to get a message describing the problem,
+ * if the function returns zero. Simply pass NULL if you are not interested
+ * on the messages; gcc should take care of not generating code for
+ * the messages on this case.
+ */
+static inline int cpu_has_svm(const char **msg)
+{
+        uint32_t eax, ebx, ecx, edx;
+
+        if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
+                if (msg)
+                        *msg = "not amd";
+                return 0;
+        }
+
+        cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
+        if (eax < SVM_CPUID_FUNC) {
+                if (msg)
+                        *msg = "can't execute cpuid_8000000a";
+                return 0;
+        }
+
+        cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
+        if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
+                if (msg)
+                        *msg = "svm not available";
+                return 0;
+        }
+        return 1;
+}
+
+
+/** Disable SVM on the current CPU
+ *
+ * You should call this only if cpu_has_svm() returned true.
+ */
+static inline void cpu_svm_disable(void)
+{
+        uint64_t efer;
+
+        wrmsrl(MSR_VM_HSAVE_PA, 0);
+        rdmsrl(MSR_EFER, efer);
+        wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
+}
+
+/** Makes sure SVM is disabled, if it is supported on the CPU
+ */
+static inline void cpu_emergency_svm_disable(void)
+{
+        if (cpu_has_svm(NULL))
+                cpu_svm_disable();
+}
+
+#endif /* _ASM_X86_VIRTEX_H */
diff --git a/arch/x86/include/asm/vmware.h b/arch/x86/include/asm/vmware.h
new file mode 100644
index 000000000000..c11b7e100d83
--- /dev/null
+++ b/arch/x86/include/asm/vmware.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2008, VMware, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+#ifndef ASM_X86__VMWARE_H
+#define ASM_X86__VMWARE_H
+
+extern unsigned long vmware_get_tsc_khz(void);
+extern int vmware_platform(void);
+extern void vmware_set_feature_bits(struct cpuinfo_x86 *c);
+
+#endif
diff --git a/arch/x86/kvm/vmx.h b/arch/x86/include/asm/vmx.h
index ec5edc339da6..d0238e6151d8 100644
--- a/arch/x86/kvm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -63,10 +63,13 @@
 
 #define VM_EXIT_HOST_ADDR_SPACE_SIZE            0x00000200
 #define VM_EXIT_ACK_INTR_ON_EXIT                0x00008000
+#define VM_EXIT_SAVE_IA32_PAT                   0x00040000
+#define VM_EXIT_LOAD_IA32_PAT                   0x00080000
 
 #define VM_ENTRY_IA32E_MODE                     0x00000200
 #define VM_ENTRY_SMM                            0x00000400
 #define VM_ENTRY_DEACT_DUAL_MONITOR             0x00000800
+#define VM_ENTRY_LOAD_IA32_PAT                  0x00004000
 
 /* VMCS Encodings */
 enum vmcs_field {
@@ -112,6 +115,8 @@ enum vmcs_field {
         VMCS_LINK_POINTER_HIGH          = 0x00002801,
         GUEST_IA32_DEBUGCTL             = 0x00002802,
         GUEST_IA32_DEBUGCTL_HIGH        = 0x00002803,
+        GUEST_IA32_PAT                  = 0x00002804,
+        GUEST_IA32_PAT_HIGH             = 0x00002805,
         GUEST_PDPTR0                    = 0x0000280a,
         GUEST_PDPTR0_HIGH               = 0x0000280b,
         GUEST_PDPTR1                    = 0x0000280c,
@@ -120,6 +125,8 @@ enum vmcs_field {
         GUEST_PDPTR2_HIGH               = 0x0000280f,
         GUEST_PDPTR3                    = 0x00002810,
         GUEST_PDPTR3_HIGH               = 0x00002811,
+        HOST_IA32_PAT                   = 0x00002c00,
+        HOST_IA32_PAT_HIGH              = 0x00002c01,
         PIN_BASED_VM_EXEC_CONTROL       = 0x00004000,
         CPU_BASED_VM_EXEC_CONTROL       = 0x00004002,
         EXCEPTION_BITMAP                = 0x00004004,
@@ -331,8 +338,9 @@ enum vmcs_field {
 
 #define AR_RESERVD_MASK 0xfffe0f00
 
-#define APIC_ACCESS_PAGE_PRIVATE_MEMSLOT        9
-#define IDENTITY_PAGETABLE_PRIVATE_MEMSLOT      10
+#define TSS_PRIVATE_MEMSLOT                     (KVM_MEMORY_SLOTS + 0)
+#define APIC_ACCESS_PAGE_PRIVATE_MEMSLOT        (KVM_MEMORY_SLOTS + 1)
+#define IDENTITY_PAGETABLE_PRIVATE_MEMSLOT      (KVM_MEMORY_SLOTS + 2)
 
 #define VMX_NR_VPIDS                            (1 << 16)
 #define VMX_VPID_EXTENT_SINGLE_CONTEXT          1
@@ -356,4 +364,19 @@ enum vmcs_field {
 
 #define VMX_EPT_IDENTITY_PAGETABLE_ADDR         0xfffbc000ul
 
+
+#define ASM_VMX_VMCLEAR_RAX       ".byte 0x66, 0x0f, 0xc7, 0x30"
+#define ASM_VMX_VMLAUNCH          ".byte 0x0f, 0x01, 0xc2"
+#define ASM_VMX_VMRESUME          ".byte 0x0f, 0x01, 0xc3"
+#define ASM_VMX_VMPTRLD_RAX       ".byte 0x0f, 0xc7, 0x30"
+#define ASM_VMX_VMREAD_RDX_RAX    ".byte 0x0f, 0x78, 0xd0"
+#define ASM_VMX_VMWRITE_RAX_RDX   ".byte 0x0f, 0x79, 0xd0"
+#define ASM_VMX_VMWRITE_RSP_RDX   ".byte 0x0f, 0x79, 0xd4"
+#define ASM_VMX_VMXOFF            ".byte 0x0f, 0x01, 0xc4"
+#define ASM_VMX_VMXON_RAX         ".byte 0xf3, 0x0f, 0xc7, 0x30"
+#define ASM_VMX_INVEPT            ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
+#define ASM_VMX_INVVPID           ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
+
+
+
 #endif
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index 3f6000d95fe2..5e79ca694326 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -33,8 +33,14 @@
 #ifndef _ASM_X86_XEN_HYPERCALL_H
 #define _ASM_X86_XEN_HYPERCALL_H
 
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
 #include <linux/errno.h>
 #include <linux/string.h>
+#include <linux/types.h>
+
+#include <asm/page.h>
+#include <asm/pgtable.h>
 
 #include <xen/interface/xen.h>
 #include <xen/interface/sched.h>
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index a38d25ac87d2..81fbd735aec4 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -33,39 +33,10 @@
 #ifndef _ASM_X86_XEN_HYPERVISOR_H
 #define _ASM_X86_XEN_HYPERVISOR_H
 
-#include <linux/types.h>
-#include <linux/kernel.h>
-
-#include <xen/interface/xen.h>
-#include <xen/interface/version.h>
-
-#include <asm/ptrace.h>
-#include <asm/page.h>
-#include <asm/desc.h>
-#if defined(__i386__)
-#  ifdef CONFIG_X86_PAE
-#   include <asm-generic/pgtable-nopud.h>
-#  else
-#   include <asm-generic/pgtable-nopmd.h>
-#  endif
-#endif
-#include <asm/xen/hypercall.h>
-
 /* arch/i386/kernel/setup.c */
 extern struct shared_info *HYPERVISOR_shared_info;
 extern struct start_info *xen_start_info;
 
-/* arch/i386/mach-xen/evtchn.c */
-/* Force a proper event-channel callback from Xen. */
-extern void force_evtchn_callback(void);
-
-/* Turn jiffies into Xen system time. */
-u64 jiffies_to_st(unsigned long jiffies);
-
-
-#define MULTI_UVMFLAGS_INDEX 3
-#define MULTI_UVMDOMID_INDEX 4
-
 enum xen_domain_type {
         XEN_NATIVE,
         XEN_PV_DOMAIN,
@@ -74,9 +45,15 @@ enum xen_domain_type {
 
 extern enum xen_domain_type xen_domain_type;
 
+#ifdef CONFIG_XEN
 #define xen_domain()            (xen_domain_type != XEN_NATIVE)
-#define xen_pv_domain()         (xen_domain_type == XEN_PV_DOMAIN)
+#else
+#define xen_domain()            (0)
+#endif
+
+#define xen_pv_domain()         (xen_domain() && xen_domain_type == XEN_PV_DOMAIN)
+#define xen_hvm_domain()        (xen_domain() && xen_domain_type == XEN_HVM_DOMAIN)
+
 #define xen_initial_domain()    (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN)
-#define xen_hvm_domain()        (xen_domain_type == XEN_HVM_DOMAIN)
 
 #endif /* _ASM_X86_XEN_HYPERVISOR_H */
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index bc628998a1b9..7ef617ef1df3 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -1,11 +1,16 @@
 #ifndef _ASM_X86_XEN_PAGE_H
 #define _ASM_X86_XEN_PAGE_H
 
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
 #include <linux/pfn.h>
 
 #include <asm/uaccess.h>
+#include <asm/page.h>
 #include <asm/pgtable.h>
 
+#include <xen/interface/xen.h>
 #include <xen/features.h>
 
 /* Xen machine address */
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index b62a7667828e..d364df03c1d6 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -12,6 +12,7 @@ CFLAGS_REMOVE_tsc.o = -pg
 CFLAGS_REMOVE_rtc.o = -pg
 CFLAGS_REMOVE_paravirt-spinlocks.o = -pg
 CFLAGS_REMOVE_ftrace.o = -pg
+CFLAGS_REMOVE_early_printk.o = -pg
 endif
 
 #
@@ -23,9 +24,9 @@ CFLAGS_vsyscall_64.o	:= $(PROFILING) -g0 $(nostackp)
 CFLAGS_hpet.o           := $(nostackp)
 CFLAGS_tsc.o            := $(nostackp)
 
-obj-y                   := process_$(BITS).o signal_$(BITS).o entry_$(BITS).o
+obj-y                   := process_$(BITS).o signal.o entry_$(BITS).o
 obj-y                   += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
-obj-y                   += time_$(BITS).o ioport.o ldt.o
+obj-y                   += time_$(BITS).o ioport.o ldt.o dumpstack.o
 obj-y                   += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o
 obj-$(CONFIG_X86_VISWS) += visws_quirks.o
 obj-$(CONFIG_X86_32)    += probe_roms_32.o
@@ -65,6 +66,7 @@ obj-$(CONFIG_X86_LOCAL_APIC)	+= apic.o nmi.o
 obj-$(CONFIG_X86_IO_APIC)       += io_apic.o
 obj-$(CONFIG_X86_REBOOTFIXUPS)  += reboot_fixups_32.o
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
+obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
 obj-$(CONFIG_KEXEC)             += machine_kexec_$(BITS).o
 obj-$(CONFIG_KEXEC)             += relocate_kernel_$(BITS).o crash.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump_$(BITS).o
@@ -105,6 +107,10 @@ microcode-$(CONFIG_MICROCODE_INTEL)	+= microcode_intel.o
 microcode-$(CONFIG_MICROCODE_AMD)       += microcode_amd.o
 obj-$(CONFIG_MICROCODE)                 += microcode.o
 
+obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
+
+obj-$(CONFIG_SWIOTLB)                   += pci-swiotlb_64.o # NB rename without _64
+
 ###
 # 64 bit specific files
 ifeq ($(CONFIG_X86_64),y)
@@ -118,7 +124,6 @@ ifeq ($(CONFIG_X86_64),y)
         obj-$(CONFIG_GART_IOMMU)        += pci-gart_64.o aperture_64.o
         obj-$(CONFIG_CALGARY_IOMMU)     += pci-calgary_64.o tce_64.o
         obj-$(CONFIG_AMD_IOMMU)         += amd_iommu_init.o amd_iommu.o
-        obj-$(CONFIG_SWIOTLB)           += pci-swiotlb_64.o
 
         obj-$(CONFIG_PCI_MMCONFIG)      += mmconf-fam10h_64.o
 endif
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 4c51a2f8fd31..29dc0c89d4af 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -538,9 +538,10 @@ static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
         union acpi_object *obj;
         struct acpi_madt_local_apic *lapic;
-        cpumask_t tmp_map, new_map;
+        cpumask_var_t tmp_map, new_map;
         u8 physid;
         int cpu;
+        int retval = -ENOMEM;
 
         if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer)))
                 return -EINVAL;
@@ -569,23 +570,37 @@ static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
         buffer.length = ACPI_ALLOCATE_BUFFER;
         buffer.pointer = NULL;
 
-        tmp_map = cpu_present_map;
+        if (!alloc_cpumask_var(&tmp_map, GFP_KERNEL))
+                goto out;
+
+        if (!alloc_cpumask_var(&new_map, GFP_KERNEL))
+                goto free_tmp_map;
+
+        cpumask_copy(tmp_map, cpu_present_mask);
         acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED);
 
         /*
          * If mp_register_lapic successfully generates a new logical cpu
          * number, then the following will get us exactly what was mapped
          */
-        cpus_andnot(new_map, cpu_present_map, tmp_map);
-        if (cpus_empty(new_map)) {
+        cpumask_andnot(new_map, cpu_present_mask, tmp_map);
+        if (cpumask_empty(new_map)) {
                 printk ("Unable to map lapic to logical cpu number\n");
-                return -EINVAL;
+                retval = -EINVAL;
+                goto free_new_map;
         }
 
-        cpu = first_cpu(new_map);
+        cpu = cpumask_first(new_map);
 
         *pcpu = cpu;
-        return 0;
+        retval = 0;
+
+free_new_map:
+        free_cpumask_var(new_map);
+free_tmp_map:
+        free_cpumask_var(tmp_map);
+out:
+        return retval;
 }
 
 /* wrapper to silence section mismatch warning */
@@ -598,7 +613,7 @@ EXPORT_SYMBOL(acpi_map_lsapic);
 int acpi_unmap_lsapic(int cpu)
 {
         per_cpu(x86_cpu_to_apicid, cpu) = -1;
-        cpu_clear(cpu, cpu_present_map);
+        set_cpu_present(cpu, false);
         num_processors--;
 
         return (0);
@@ -1360,6 +1375,17 @@ static void __init acpi_process_madt(void)
                         disable_acpi();
                 }
         }
+
+        /*
+         * ACPI supports both logical (e.g. Hyper-Threading) and physical
+         * processors, where MPS only supports physical.
+         */
+        if (acpi_lapic && acpi_ioapic)
+                printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
+                       "information\n");
+        else if (acpi_lapic)
+                printk(KERN_INFO "Using ACPI for processor (LAPIC) "
+                       "configuration information\n");
 #endif
         return;
 }
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 0a60d60ed036..5113c080f0c4 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -20,10 +20,15 @@
 #include <linux/pci.h>
 #include <linux/gfp.h>
 #include <linux/bitops.h>
+#include <linux/debugfs.h>
 #include <linux/scatterlist.h>
 #include <linux/iommu-helper.h>
+#ifdef CONFIG_IOMMU_API
+#include <linux/iommu.h>
+#endif
 #include <asm/proto.h>
 #include <asm/iommu.h>
+#include <asm/gart.h>
 #include <asm/amd_iommu_types.h>
 #include <asm/amd_iommu.h>
 
@@ -37,6 +42,10 @@ static DEFINE_RWLOCK(amd_iommu_devtable_lock);
 static LIST_HEAD(iommu_pd_list);
 static DEFINE_SPINLOCK(iommu_pd_list_lock);
 
+#ifdef CONFIG_IOMMU_API
+static struct iommu_ops amd_iommu_ops;
+#endif
+
 /*
  * general struct to manage commands send to an IOMMU
  */
@@ -46,6 +55,68 @@ struct iommu_cmd {
 
 static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
                              struct unity_map_entry *e);
+static struct dma_ops_domain *find_protection_domain(u16 devid);
+
+
+#ifdef CONFIG_AMD_IOMMU_STATS
+
+/*
+ * Initialization code for statistics collection
+ */
+
+DECLARE_STATS_COUNTER(compl_wait);
+DECLARE_STATS_COUNTER(cnt_map_single);
+DECLARE_STATS_COUNTER(cnt_unmap_single);
+DECLARE_STATS_COUNTER(cnt_map_sg);
+DECLARE_STATS_COUNTER(cnt_unmap_sg);
+DECLARE_STATS_COUNTER(cnt_alloc_coherent);
+DECLARE_STATS_COUNTER(cnt_free_coherent);
+DECLARE_STATS_COUNTER(cross_page);
+DECLARE_STATS_COUNTER(domain_flush_single);
+DECLARE_STATS_COUNTER(domain_flush_all);
+DECLARE_STATS_COUNTER(alloced_io_mem);
+DECLARE_STATS_COUNTER(total_map_requests);
+
+static struct dentry *stats_dir;
+static struct dentry *de_isolate;
+static struct dentry *de_fflush;
+
+static void amd_iommu_stats_add(struct __iommu_counter *cnt)
+{
+        if (stats_dir == NULL)
+                return;
+
+        cnt->dent = debugfs_create_u64(cnt->name, 0444, stats_dir,
+                                       &cnt->value);
+}
+
+static void amd_iommu_stats_init(void)
+{
+        stats_dir = debugfs_create_dir("amd-iommu", NULL);
+        if (stats_dir == NULL)
+                return;
+
+        de_isolate = debugfs_create_bool("isolation", 0444, stats_dir,
+                                         (u32 *)&amd_iommu_isolate);
+
+        de_fflush  = debugfs_create_bool("fullflush", 0444, stats_dir,
+                                         (u32 *)&amd_iommu_unmap_flush);
+
+        amd_iommu_stats_add(&compl_wait);
+        amd_iommu_stats_add(&cnt_map_single);
+        amd_iommu_stats_add(&cnt_unmap_single);
+        amd_iommu_stats_add(&cnt_map_sg);
+        amd_iommu_stats_add(&cnt_unmap_sg);
+        amd_iommu_stats_add(&cnt_alloc_coherent);
+        amd_iommu_stats_add(&cnt_free_coherent);
+        amd_iommu_stats_add(&cross_page);
+        amd_iommu_stats_add(&domain_flush_single);
+        amd_iommu_stats_add(&domain_flush_all);
+        amd_iommu_stats_add(&alloced_io_mem);
+        amd_iommu_stats_add(&total_map_requests);
+}
+
+#endif
 
 /* returns !0 if the IOMMU is caching non-present entries in its TLB */
 static int iommu_has_npcache(struct amd_iommu *iommu)
@@ -188,13 +259,55 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
         spin_lock_irqsave(&iommu->lock, flags);
         ret = __iommu_queue_command(iommu, cmd);
         if (!ret)
-                iommu->need_sync = 1;
+                iommu->need_sync = true;
         spin_unlock_irqrestore(&iommu->lock, flags);
 
         return ret;
 }
 
 /*
+ * This function waits until an IOMMU has completed a completion
+ * wait command
+ */
+static void __iommu_wait_for_completion(struct amd_iommu *iommu)
+{
+        int ready = 0;
+        unsigned status = 0;
+        unsigned long i = 0;
+
+        INC_STATS_COUNTER(compl_wait);
+
+        while (!ready && (i < EXIT_LOOP_COUNT)) {
+                ++i;
+                /* wait for the bit to become one */
+                status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
+                ready = status & MMIO_STATUS_COM_WAIT_INT_MASK;
+        }
+
+        /* set bit back to zero */
+        status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
+        writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
+
+        if (unlikely(i == EXIT_LOOP_COUNT))
+                panic("AMD IOMMU: Completion wait loop failed\n");
+}
+
+/*
+ * This function queues a completion wait command into the command
+ * buffer of an IOMMU
+ */
+static int __iommu_completion_wait(struct amd_iommu *iommu)
+{
+        struct iommu_cmd cmd;
+
+         memset(&cmd, 0, sizeof(cmd));
+         cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
+         CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
+
+         return __iommu_queue_command(iommu, &cmd);
+}
+
+/*
  * This function is called whenever we need to ensure that the IOMMU has
  * completed execution of all commands we sent. It sends a
  * COMPLETION_WAIT command and waits for it to finish. The IOMMU informs
@@ -203,40 +316,22 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
  */
 static int iommu_completion_wait(struct amd_iommu *iommu)
 {
-        int ret = 0, ready = 0;
-        unsigned status = 0;
-        struct iommu_cmd cmd;
-        unsigned long flags, i = 0;
-
-        memset(&cmd, 0, sizeof(cmd));
-        cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
-        CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
+        int ret = 0;
+        unsigned long flags;
 
         spin_lock_irqsave(&iommu->lock, flags);
 
         if (!iommu->need_sync)
                 goto out;
 
-        iommu->need_sync = 0;
+        ret = __iommu_completion_wait(iommu);
 
-        ret = __iommu_queue_command(iommu, &cmd);
+        iommu->need_sync = false;
 
         if (ret)
                 goto out;
 
-        while (!ready && (i < EXIT_LOOP_COUNT)) {
-                ++i;
-                /* wait for the bit to become one */
-                status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
-                ready = status & MMIO_STATUS_COM_WAIT_INT_MASK;
-        }
-
-        /* set bit back to zero */
-        status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
-        writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
-
-        if (unlikely(i == EXIT_LOOP_COUNT))
-                panic("AMD IOMMU: Completion wait loop failed\n");
+        __iommu_wait_for_completion(iommu);
 
 out:
         spin_unlock_irqrestore(&iommu->lock, flags);
@@ -263,6 +358,21 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
         return ret;
 }
 
+static void __iommu_build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address,
+                                          u16 domid, int pde, int s)
+{
+        memset(cmd, 0, sizeof(*cmd));
+        address &= PAGE_MASK;
+        CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES);
+        cmd->data[1] |= domid;
+        cmd->data[2] = lower_32_bits(address);
+        cmd->data[3] = upper_32_bits(address);
+        if (s) /* size bit - we flush more than one 4kb page */
+                cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
+        if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
+                cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
+}
+
 /*
  * Generic command send function for invalidaing TLB entries
  */
@@ -272,16 +382,7 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
         struct iommu_cmd cmd;
         int ret;
 
-        memset(&cmd, 0, sizeof(cmd));
-        address &= PAGE_MASK;
-        CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES);
-        cmd.data[1] |= domid;
-        cmd.data[2] = lower_32_bits(address);
-        cmd.data[3] = upper_32_bits(address);
-        if (s) /* size bit - we flush more than one 4kb page */
-                cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
-        if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
-                cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
+        __iommu_build_inv_iommu_pages(&cmd, address, domid, pde, s);
 
         ret = iommu_queue_command(iommu, &cmd);
 
@@ -320,9 +421,35 @@ static void iommu_flush_tlb(struct amd_iommu *iommu, u16 domid)
 {
         u64 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
 
+        INC_STATS_COUNTER(domain_flush_single);
+
         iommu_queue_inv_iommu_pages(iommu, address, domid, 0, 1);
 }
 
+/*
+ * This function is used to flush the IO/TLB for a given protection domain
+ * on every IOMMU in the system
+ */
+static void iommu_flush_domain(u16 domid)
+{
+        unsigned long flags;
+        struct amd_iommu *iommu;
+        struct iommu_cmd cmd;
+
+        INC_STATS_COUNTER(domain_flush_all);
+
+        __iommu_build_inv_iommu_pages(&cmd, CMD_INV_IOMMU_ALL_PAGES_ADDRESS,
+                                      domid, 1, 1);
+
+        list_for_each_entry(iommu, &amd_iommu_list, list) {
+                spin_lock_irqsave(&iommu->lock, flags);
+                __iommu_queue_command(iommu, &cmd);
+                __iommu_completion_wait(iommu);
+                __iommu_wait_for_completion(iommu);
+                spin_unlock_irqrestore(&iommu->lock, flags);
+        }
+}
+
 /****************************************************************************
  *
  * The functions below are used the create the page table mappings for
@@ -337,10 +464,10 @@ static void iommu_flush_tlb(struct amd_iommu *iommu, u16 domid)
  * supporting all features of AMD IOMMU page tables like level skipping
  * and full 64 bit address spaces.
  */
-static int iommu_map(struct protection_domain *dom,
-                     unsigned long bus_addr,
-                     unsigned long phys_addr,
-                     int prot)
+static int iommu_map_page(struct protection_domain *dom,
+                          unsigned long bus_addr,
+                          unsigned long phys_addr,
+                          int prot)
 {
         u64 __pte, *pte, *page;
 
@@ -387,6 +514,28 @@ static int iommu_map(struct protection_domain *dom,
         return 0;
 }
 
+static void iommu_unmap_page(struct protection_domain *dom,
+                             unsigned long bus_addr)
+{
+        u64 *pte;
+
+        pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)];
+
+        if (!IOMMU_PTE_PRESENT(*pte))
+                return;
+
+        pte = IOMMU_PTE_PAGE(*pte);
+        pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)];
+
+        if (!IOMMU_PTE_PRESENT(*pte))
+                return;
+
+        pte = IOMMU_PTE_PAGE(*pte);
+        pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)];
+
+        *pte = 0;
+}
+
 /*
  * This function checks if a specific unity mapping entry is needed for
  * this specific IOMMU.
@@ -439,7 +588,7 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
 
         for (addr = e->address_start; addr < e->address_end;
              addr += PAGE_SIZE) {
-                ret = iommu_map(&dma_dom->domain, addr, addr, e->prot);
+                ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot);
                 if (ret)
                         return ret;
                 /*
@@ -570,6 +719,16 @@ static u16 domain_id_alloc(void)
         return id;
 }
 
+static void domain_id_free(int id)
+{
+        unsigned long flags;
+
+        write_lock_irqsave(&amd_iommu_devtable_lock, flags);
+        if (id > 0 && id < MAX_DOMAIN_ID)
+                __clear_bit(id, amd_iommu_pd_alloc_bitmap);
+        write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
+}
+
 /*
  * Used to reserve address ranges in the aperture (e.g. for exclusion
  * ranges.
@@ -586,12 +745,12 @@ static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
         iommu_area_reserve(dom->bitmap, start_page, pages);
 }
 
-static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom)
+static void free_pagetable(struct protection_domain *domain)
 {
         int i, j;
         u64 *p1, *p2, *p3;
 
-        p1 = dma_dom->domain.pt_root;
+        p1 = domain->pt_root;
 
         if (!p1)
                 return;
@@ -612,6 +771,8 @@ static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom)
         }
 
         free_page((unsigned long)p1);
+
+        domain->pt_root = NULL;
 }
 
 /*
@@ -623,7 +784,7 @@ static void dma_ops_domain_free(struct dma_ops_domain *dom)
         if (!dom)
                 return;
 
-        dma_ops_free_pagetable(dom);
+        free_pagetable(&dom->domain);
 
         kfree(dom->pte_pages);
 
@@ -662,6 +823,7 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
                 goto free_dma_dom;
         dma_dom->domain.mode = PAGE_MODE_3_LEVEL;
         dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL);
+        dma_dom->domain.flags = PD_DMA_OPS_MASK;
         dma_dom->domain.priv = dma_dom;
         if (!dma_dom->domain.pt_root)
                 goto free_dma_dom;
@@ -724,6 +886,15 @@ free_dma_dom:
 }
 
 /*
+ * little helper function to check whether a given protection domain is a
+ * dma_ops domain
+ */
+static bool dma_ops_domain(struct protection_domain *domain)
+{
+        return domain->flags & PD_DMA_OPS_MASK;
+}
+
+/*
  * Find out the protection domain structure for a given PCI device. This
  * will give us the pointer to the page table root for example.
  */
@@ -743,14 +914,15 @@ static struct protection_domain *domain_for_device(u16 devid)
  * If a device is not yet associated with a domain, this function does
  * assigns it visible for the hardware
  */
-static void set_device_domain(struct amd_iommu *iommu,
-                              struct protection_domain *domain,
-                              u16 devid)
+static void attach_device(struct amd_iommu *iommu,
+                          struct protection_domain *domain,
+                          u16 devid)
 {
         unsigned long flags;
-
         u64 pte_root = virt_to_phys(domain->pt_root);
 
+        domain->dev_cnt += 1;
+
         pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)
                     << DEV_ENTRY_MODE_SHIFT;
         pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
@@ -766,6 +938,116 @@ static void set_device_domain(struct amd_iommu *iommu,
         iommu_queue_inv_dev_entry(iommu, devid);
 }
 
+/*
+ * Removes a device from a protection domain (unlocked)
+ */
+static void __detach_device(struct protection_domain *domain, u16 devid)
+{
+
+        /* lock domain */
+        spin_lock(&domain->lock);
+
+        /* remove domain from the lookup table */
+        amd_iommu_pd_table[devid] = NULL;
+
+        /* remove entry from the device table seen by the hardware */
+        amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV;
+        amd_iommu_dev_table[devid].data[1] = 0;
+        amd_iommu_dev_table[devid].data[2] = 0;
+
+        /* decrease reference counter */
+        domain->dev_cnt -= 1;
+
+        /* ready */
+        spin_unlock(&domain->lock);
+}
+
+/*
+ * Removes a device from a protection domain (with devtable_lock held)
+ */
+static void detach_device(struct protection_domain *domain, u16 devid)
+{
+        unsigned long flags;
+
+        /* lock device table */
+        write_lock_irqsave(&amd_iommu_devtable_lock, flags);
+        __detach_device(domain, devid);
+        write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
+}
+
+static int device_change_notifier(struct notifier_block *nb,
+                                  unsigned long action, void *data)
+{
+        struct device *dev = data;
+        struct pci_dev *pdev = to_pci_dev(dev);
+        u16 devid = calc_devid(pdev->bus->number, pdev->devfn);
+        struct protection_domain *domain;
+        struct dma_ops_domain *dma_domain;
+        struct amd_iommu *iommu;
+        int order = amd_iommu_aperture_order;
+        unsigned long flags;
+
+        if (devid > amd_iommu_last_bdf)
+                goto out;
+
+        devid = amd_iommu_alias_table[devid];
+
+        iommu = amd_iommu_rlookup_table[devid];
+        if (iommu == NULL)
+                goto out;
+
+        domain = domain_for_device(devid);
+
+        if (domain && !dma_ops_domain(domain))
+                WARN_ONCE(1, "AMD IOMMU WARNING: device %s already bound "
+                          "to a non-dma-ops domain\n", dev_name(dev));
+
+        switch (action) {
+        case BUS_NOTIFY_BOUND_DRIVER:
+                if (domain)
+                        goto out;
+                dma_domain = find_protection_domain(devid);
+                if (!dma_domain)
+                        dma_domain = iommu->default_dom;
+                attach_device(iommu, &dma_domain->domain, devid);
+                printk(KERN_INFO "AMD IOMMU: Using protection domain %d for "
+                       "device %s\n", dma_domain->domain.id, dev_name(dev));
+                break;
+        case BUS_NOTIFY_UNBIND_DRIVER:
+                if (!domain)
+                        goto out;
+                detach_device(domain, devid);
+                break;
+        case BUS_NOTIFY_ADD_DEVICE:
+                /* allocate a protection domain if a device is added */
+                dma_domain = find_protection_domain(devid);
+                if (dma_domain)
+                        goto out;
+                dma_domain = dma_ops_domain_alloc(iommu, order);
+                if (!dma_domain)
+                        goto out;
+                dma_domain->target_dev = devid;
+
+                spin_lock_irqsave(&iommu_pd_list_lock, flags);
+                list_add_tail(&dma_domain->list, &iommu_pd_list);
+                spin_unlock_irqrestore(&iommu_pd_list_lock, flags);
+
+                break;
+        default:
+                goto out;
+        }
+
+        iommu_queue_inv_dev_entry(iommu, devid);
+        iommu_completion_wait(iommu);
+
+out:
+        return 0;
+}
+
+struct notifier_block device_nb = {
+        .notifier_call = device_change_notifier,
+};
+
 /*****************************************************************************
  *
  * The next functions belong to the dma_ops mapping/unmapping code.
@@ -801,7 +1083,6 @@ static struct dma_ops_domain *find_protection_domain(u16 devid)
         list_for_each_entry(entry, &iommu_pd_list, list) {
                 if (entry->target_dev == devid) {
                         ret = entry;
-                        list_del(&ret->list);
                         break;
                 }
         }
@@ -852,14 +1133,13 @@ static int get_device_resources(struct device *dev,
                 if (!dma_dom)
                         dma_dom = (*iommu)->default_dom;
                 *domain = &dma_dom->domain;
-                set_device_domain(*iommu, *domain, *bdf);
+                attach_device(*iommu, *domain, *bdf);
                 printk(KERN_INFO "AMD IOMMU: Using protection domain %d for "
-                                "device ", (*domain)->id);
-                print_devid(_bdf, 1);
+                                "device %s\n", (*domain)->id, dev_name(dev));
         }
 
         if (domain_for_device(_bdf) == NULL)
-                set_device_domain(*iommu, *domain, _bdf);
+                attach_device(*iommu, *domain, _bdf);
 
         return 1;
 }
@@ -945,6 +1225,11 @@ static dma_addr_t __map_single(struct device *dev,
         pages = iommu_num_pages(paddr, size, PAGE_SIZE);
         paddr &= PAGE_MASK;
 
+        INC_STATS_COUNTER(total_map_requests);
+
+        if (pages > 1)
+                INC_STATS_COUNTER(cross_page);
+
         if (align)
                 align_mask = (1UL << get_order(size)) - 1;
 
@@ -961,6 +1246,8 @@ static dma_addr_t __map_single(struct device *dev,
         }
         address += offset;
 
+        ADD_STATS_COUNTER(alloced_io_mem, size);
+
         if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) {
                 iommu_flush_tlb(iommu, dma_dom->domain.id);
                 dma_dom->need_flush = false;
@@ -997,6 +1284,8 @@ static void __unmap_single(struct amd_iommu *iommu,
                 start += PAGE_SIZE;
         }
 
+        SUB_STATS_COUNTER(alloced_io_mem, size);
+
         dma_ops_free_addresses(dma_dom, dma_addr, pages);
 
         if (amd_iommu_unmap_flush || dma_dom->need_flush) {
@@ -1018,6 +1307,8 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
         dma_addr_t addr;
         u64 dma_mask;
 
+        INC_STATS_COUNTER(cnt_map_single);
+
         if (!check_device(dev))
                 return bad_dma_address;
 
@@ -1029,6 +1320,9 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
                 /* device not handled by any AMD IOMMU */
                 return (dma_addr_t)paddr;
 
+        if (!dma_ops_domain(domain))
+                return bad_dma_address;
+
         spin_lock_irqsave(&domain->lock, flags);
         addr = __map_single(dev, iommu, domain->priv, paddr, size, dir, false,
                             dma_mask);
@@ -1054,11 +1348,16 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr,
         struct protection_domain *domain;
         u16 devid;
 
+        INC_STATS_COUNTER(cnt_unmap_single);
+
         if (!check_device(dev) ||
             !get_device_resources(dev, &iommu, &domain, &devid))
                 /* device not handled by any AMD IOMMU */
                 return;
 
+        if (!dma_ops_domain(domain))
+                return;
+
         spin_lock_irqsave(&domain->lock, flags);
 
         __unmap_single(iommu, domain->priv, dma_addr, size, dir);
@@ -1103,6 +1402,8 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
         int mapped_elems = 0;
         u64 dma_mask;
 
+        INC_STATS_COUNTER(cnt_map_sg);
+
         if (!check_device(dev))
                 return 0;
 
@@ -1113,6 +1414,9 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
         if (!iommu || !domain)
                 return map_sg_no_iommu(dev, sglist, nelems, dir);
 
+        if (!dma_ops_domain(domain))
+                return 0;
+
         spin_lock_irqsave(&domain->lock, flags);
 
         for_each_sg(sglist, s, nelems, i) {
@@ -1162,10 +1466,15 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
         u16 devid;
         int i;
 
+        INC_STATS_COUNTER(cnt_unmap_sg);
+
         if (!check_device(dev) ||
             !get_device_resources(dev, &iommu, &domain, &devid))
                 return;
 
+        if (!dma_ops_domain(domain))
+                return;
+
         spin_lock_irqsave(&domain->lock, flags);
 
         for_each_sg(sglist, s, nelems, i) {
@@ -1193,6 +1502,8 @@ static void *alloc_coherent(struct device *dev, size_t size,
         phys_addr_t paddr;
         u64 dma_mask = dev->coherent_dma_mask;
 
+        INC_STATS_COUNTER(cnt_alloc_coherent);
+
         if (!check_device(dev))
                 return NULL;
 
@@ -1211,6 +1522,9 @@ static void *alloc_coherent(struct device *dev, size_t size,
                 return virt_addr;
         }
 
+        if (!dma_ops_domain(domain))
+                goto out_free;
+
         if (!dma_mask)
                 dma_mask = *dev->dma_mask;
 
@@ -1219,18 +1533,20 @@ static void *alloc_coherent(struct device *dev, size_t size,
         *dma_addr = __map_single(dev, iommu, domain->priv, paddr,
                                  size, DMA_BIDIRECTIONAL, true, dma_mask);
 
-        if (*dma_addr == bad_dma_address) {
-                free_pages((unsigned long)virt_addr, get_order(size));
-                virt_addr = NULL;
-                goto out;
-        }
+        if (*dma_addr == bad_dma_address)
+                goto out_free;
 
         iommu_completion_wait(iommu);
 
-out:
         spin_unlock_irqrestore(&domain->lock, flags);
 
         return virt_addr;
+
+out_free:
+
+        free_pages((unsigned long)virt_addr, get_order(size));
+
+        return NULL;
 }
 
 /*
@@ -1244,6 +1560,8 @@ static void free_coherent(struct device *dev, size_t size,
         struct protection_domain *domain;
         u16 devid;
 
+        INC_STATS_COUNTER(cnt_free_coherent);
+
         if (!check_device(dev))
                 return;
 
@@ -1252,6 +1570,9 @@ static void free_coherent(struct device *dev, size_t size,
         if (!iommu || !domain)
                 goto free_mem;
 
+        if (!dma_ops_domain(domain))
+                goto free_mem;
+
         spin_lock_irqsave(&domain->lock, flags);
 
         __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
@@ -1295,7 +1616,7 @@ static int amd_iommu_dma_supported(struct device *dev, u64 mask)
  * we don't need to preallocate the protection domains anymore.
  * For now we have to.
  */
-void prealloc_protection_domains(void)
+static void prealloc_protection_domains(void)
 {
         struct pci_dev *dev = NULL;
         struct dma_ops_domain *dma_dom;
@@ -1304,7 +1625,7 @@ void prealloc_protection_domains(void)
         u16 devid;
 
         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
-                devid = (dev->bus->number << 8) | dev->devfn;
+                devid = calc_devid(dev->bus->number, dev->devfn);
                 if (devid > amd_iommu_last_bdf)
                         continue;
                 devid = amd_iommu_alias_table[devid];
@@ -1351,6 +1672,7 @@ int __init amd_iommu_init_dma_ops(void)
                 iommu->default_dom = dma_ops_domain_alloc(iommu, order);
                 if (iommu->default_dom == NULL)
                         return -ENOMEM;
+                iommu->default_dom->domain.flags |= PD_DEFAULT_MASK;
                 ret = iommu_init_unity_mappings(iommu);
                 if (ret)
                         goto free_domains;
@@ -1374,6 +1696,12 @@ int __init amd_iommu_init_dma_ops(void)
         /* Make the driver finally visible to the drivers */
         dma_ops = &amd_iommu_dma_ops;
 
+        register_iommu(&amd_iommu_ops);
+
+        bus_register_notifier(&pci_bus_type, &device_nb);
+
+        amd_iommu_stats_init();
+
         return 0;
 
 free_domains:
@@ -1385,3 +1713,224 @@ free_domains:
 
         return ret;
 }
+
+/*****************************************************************************
+ *
+ * The following functions belong to the exported interface of AMD IOMMU
+ *
+ * This interface allows access to lower level functions of the IOMMU
+ * like protection domain handling and assignement of devices to domains
+ * which is not possible with the dma_ops interface.
+ *
+ *****************************************************************************/
+
+static void cleanup_domain(struct protection_domain *domain)
+{
+        unsigned long flags;
+        u16 devid;
+
+        write_lock_irqsave(&amd_iommu_devtable_lock, flags);
+
+        for (devid = 0; devid <= amd_iommu_last_bdf; ++devid)
+                if (amd_iommu_pd_table[devid] == domain)
+                        __detach_device(domain, devid);
+
+        write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
+}
+
+static int amd_iommu_domain_init(struct iommu_domain *dom)
+{
+        struct protection_domain *domain;
+
+        domain = kzalloc(sizeof(*domain), GFP_KERNEL);
+        if (!domain)
+                return -ENOMEM;
+
+        spin_lock_init(&domain->lock);
+        domain->mode = PAGE_MODE_3_LEVEL;
+        domain->id = domain_id_alloc();
+        if (!domain->id)
+                goto out_free;
+        domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL);
+        if (!domain->pt_root)
+                goto out_free;
+
+        dom->priv = domain;
+
+        return 0;
+
+out_free:
+        kfree(domain);
+
+        return -ENOMEM;
+}
+
+static void amd_iommu_domain_destroy(struct iommu_domain *dom)
+{
+        struct protection_domain *domain = dom->priv;
+
+        if (!domain)
+                return;
+
+        if (domain->dev_cnt > 0)
+                cleanup_domain(domain);
+
+        BUG_ON(domain->dev_cnt != 0);
+
+        free_pagetable(domain);
+
+        domain_id_free(domain->id);
+
+        kfree(domain);
+
+        dom->priv = NULL;
+}
+
+static void amd_iommu_detach_device(struct iommu_domain *dom,
+                                    struct device *dev)
+{
+        struct protection_domain *domain = dom->priv;
+        struct amd_iommu *iommu;
+        struct pci_dev *pdev;
+        u16 devid;
+
+        if (dev->bus != &pci_bus_type)
+                return;
+
+        pdev = to_pci_dev(dev);
+
+        devid = calc_devid(pdev->bus->number, pdev->devfn);
+
+        if (devid > 0)
+                detach_device(domain, devid);
+
+        iommu = amd_iommu_rlookup_table[devid];
+        if (!iommu)
+                return;
+
+        iommu_queue_inv_dev_entry(iommu, devid);
+        iommu_completion_wait(iommu);
+}
+
+static int amd_iommu_attach_device(struct iommu_domain *dom,
+                                   struct device *dev)
+{
+        struct protection_domain *domain = dom->priv;
+        struct protection_domain *old_domain;
+        struct amd_iommu *iommu;
+        struct pci_dev *pdev;
+        u16 devid;
+
+        if (dev->bus != &pci_bus_type)
+                return -EINVAL;
+
+        pdev = to_pci_dev(dev);
+
+        devid = calc_devid(pdev->bus->number, pdev->devfn);
+
+        if (devid >= amd_iommu_last_bdf ||
+                        devid != amd_iommu_alias_table[devid])
+                return -EINVAL;
+
+        iommu = amd_iommu_rlookup_table[devid];
+        if (!iommu)
+                return -EINVAL;
+
+        old_domain = domain_for_device(devid);
+        if (old_domain)
+                return -EBUSY;
+
+        attach_device(iommu, domain, devid);
+
+        iommu_completion_wait(iommu);
+
+        return 0;
+}
+
+static int amd_iommu_map_range(struct iommu_domain *dom,
+                               unsigned long iova, phys_addr_t paddr,
+                               size_t size, int iommu_prot)
+{
+        struct protection_domain *domain = dom->priv;
+        unsigned long i,  npages = iommu_num_pages(paddr, size, PAGE_SIZE);
+        int prot = 0;
+        int ret;
+
+        if (iommu_prot & IOMMU_READ)
+                prot |= IOMMU_PROT_IR;
+        if (iommu_prot & IOMMU_WRITE)
+                prot |= IOMMU_PROT_IW;
+
+        iova  &= PAGE_MASK;
+        paddr &= PAGE_MASK;
+
+        for (i = 0; i < npages; ++i) {
+                ret = iommu_map_page(domain, iova, paddr, prot);
+                if (ret)
+                        return ret;
+
+                iova  += PAGE_SIZE;
+                paddr += PAGE_SIZE;
+        }
+
+        return 0;
+}
+
+static void amd_iommu_unmap_range(struct iommu_domain *dom,
+                                  unsigned long iova, size_t size)
+{
+
+        struct protection_domain *domain = dom->priv;
+        unsigned long i,  npages = iommu_num_pages(iova, size, PAGE_SIZE);
+
+        iova  &= PAGE_MASK;
+
+        for (i = 0; i < npages; ++i) {
+                iommu_unmap_page(domain, iova);
+                iova  += PAGE_SIZE;
+        }
+
+        iommu_flush_domain(domain->id);
+}
+
+static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
+                                          unsigned long iova)
+{
+        struct protection_domain *domain = dom->priv;
+        unsigned long offset = iova & ~PAGE_MASK;
+        phys_addr_t paddr;
+        u64 *pte;
+
+        pte = &domain->pt_root[IOMMU_PTE_L2_INDEX(iova)];
+
+        if (!IOMMU_PTE_PRESENT(*pte))
+                return 0;
+
+        pte = IOMMU_PTE_PAGE(*pte);
+        pte = &pte[IOMMU_PTE_L1_INDEX(iova)];
+
+        if (!IOMMU_PTE_PRESENT(*pte))
+                return 0;
+
+        pte = IOMMU_PTE_PAGE(*pte);
+        pte = &pte[IOMMU_PTE_L0_INDEX(iova)];
+
+        if (!IOMMU_PTE_PRESENT(*pte))
+                return 0;
+
+        paddr  = *pte & IOMMU_PAGE_MASK;
+        paddr |= offset;
+
+        return paddr;
+}
+
+static struct iommu_ops amd_iommu_ops = {
+        .domain_init = amd_iommu_domain_init,
+        .domain_destroy = amd_iommu_domain_destroy,
+        .attach_dev = amd_iommu_attach_device,
+        .detach_dev = amd_iommu_detach_device,
+        .map = amd_iommu_map_range,
+        .unmap = amd_iommu_unmap_range,
+        .iova_to_phys = amd_iommu_iova_to_phys,
+};
+
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index c6cc22815d35..42c33cebf00f 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -28,6 +28,7 @@
 #include <asm/amd_iommu_types.h>
 #include <asm/amd_iommu.h>
 #include <asm/iommu.h>
+#include <asm/gart.h>
 
 /*
  * definitions for the ACPI scanning code
@@ -121,7 +122,8 @@ u16 amd_iommu_last_bdf;			/* largest PCI device id we have
 LIST_HEAD(amd_iommu_unity_map);         /* a list of required unity mappings
                                            we find in ACPI */
 unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */
-int amd_iommu_isolate = 1;              /* if 1, device isolation is enabled */
+bool amd_iommu_isolate = true;          /* if true, device isolation is
+                                           enabled */
 bool amd_iommu_unmap_flush;             /* if true, flush on every unmap */
 
 LIST_HEAD(amd_iommu_list);              /* list of all AMD IOMMUs in the
@@ -242,20 +244,16 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
 }
 
 /* Function to enable the hardware */
-void __init iommu_enable(struct amd_iommu *iommu)
+static void __init iommu_enable(struct amd_iommu *iommu)
 {
-        printk(KERN_INFO "AMD IOMMU: Enabling IOMMU "
-               "at %02x:%02x.%x cap 0x%hx\n",
-               iommu->dev->bus->number,
-               PCI_SLOT(iommu->dev->devfn),
-               PCI_FUNC(iommu->dev->devfn),
-               iommu->cap_ptr);
+        printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at %s cap 0x%hx\n",
+               dev_name(&iommu->dev->dev), iommu->cap_ptr);
 
         iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
 }
 
 /* Function to enable IOMMU event logging and event interrupts */
-void __init iommu_enable_event_logging(struct amd_iommu *iommu)
+static void __init iommu_enable_event_logging(struct amd_iommu *iommu)
 {
         iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN);
         iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
@@ -1217,9 +1215,9 @@ static int __init parse_amd_iommu_options(char *str)
 {
         for (; *str; ++str) {
                 if (strncmp(str, "isolate", 7) == 0)
-                        amd_iommu_isolate = 1;
+                        amd_iommu_isolate = true;
                 if (strncmp(str, "share", 5) == 0)
-                        amd_iommu_isolate = 0;
+                        amd_iommu_isolate = false;
                 if (strncmp(str, "fullflush", 9) == 0)
                         amd_iommu_unmap_flush = true;
         }
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 9a32b37ee2ee..676debfc1702 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -1,8 +1,9 @@
 /*
  * Firmware replacement code.
  *
- * Work around broken BIOSes that don't set an aperture or only set the
- * aperture in the AGP bridge.
+ * Work around broken BIOSes that don't set an aperture, only set the
+ * aperture in the AGP bridge, or set too small aperture.
+ *
  * If all fails map the aperture over some low memory.  This is cheaper than
  * doing bounce buffering. The memory is lost. This is done at early boot
  * because only the bootmem allocator can allocate 32+MB.
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 16f94879b525..b13d3c4dbd42 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -30,6 +30,7 @@
 #include <linux/module.h>
 #include <linux/dmi.h>
 #include <linux/dmar.h>
+#include <linux/ftrace.h>
 
 #include <asm/atomic.h>
 #include <asm/smp.h>
@@ -97,8 +98,8 @@ __setup("apicpmtimer", setup_apicpmtimer);
 #ifdef HAVE_X2APIC
 int x2apic;
 /* x2apic enabled before OS handover */
-int x2apic_preenabled;
-int disable_x2apic;
+static int x2apic_preenabled;
+static int disable_x2apic;
 static __init int setup_nox2apic(char *str)
 {
         disable_x2apic = 1;
@@ -118,8 +119,6 @@ EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok);
 
 int first_system_vector = 0xfe;
 
-char system_vectors[NR_VECTORS] = { [0 ... NR_VECTORS-1] = SYS_VECTOR_FREE};
-
 /*
  * Debug level, exported for io_apic.c
  */
@@ -141,7 +140,7 @@ static int lapic_next_event(unsigned long delta,
                             struct clock_event_device *evt);
 static void lapic_timer_setup(enum clock_event_mode mode,
                               struct clock_event_device *evt);
-static void lapic_timer_broadcast(cpumask_t mask);
+static void lapic_timer_broadcast(const struct cpumask *mask);
 static void apic_pm_activate(void);
 
 /*
@@ -227,7 +226,7 @@ void xapic_icr_write(u32 low, u32 id)
         apic_write(APIC_ICR, low);
 }
 
-u64 xapic_icr_read(void)
+static u64 xapic_icr_read(void)
 {
         u32 icr1, icr2;
 
@@ -267,7 +266,7 @@ void x2apic_icr_write(u32 low, u32 id)
         wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
 }
 
-u64 x2apic_icr_read(void)
+static u64 x2apic_icr_read(void)
 {
         unsigned long val;
 
@@ -441,6 +440,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
                 v = apic_read(APIC_LVTT);
                 v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
                 apic_write(APIC_LVTT, v);
+                apic_write(APIC_TMICT, 0xffffffff);
                 break;
         case CLOCK_EVT_MODE_RESUME:
                 /* Nothing to do here */
@@ -453,7 +453,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
 /*
  * Local APIC timer broadcast function
  */
-static void lapic_timer_broadcast(cpumask_t mask)
+static void lapic_timer_broadcast(const struct cpumask *mask)
 {
 #ifdef CONFIG_SMP
         send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
@@ -469,7 +469,7 @@ static void __cpuinit setup_APIC_timer(void)
         struct clock_event_device *levt = &__get_cpu_var(lapic_events);
 
         memcpy(levt, &lapic_clockevent, sizeof(*levt));
-        levt->cpumask = cpumask_of_cpu(smp_processor_id());
+        levt->cpumask = cpumask_of(smp_processor_id());
 
         clockevents_register_device(levt);
 }
@@ -559,13 +559,13 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
         } else {
                 res = (((u64)deltapm) *  mult) >> 22;
                 do_div(res, 1000000);
-                printk(KERN_WARNING "APIC calibration not consistent "
+                pr_warning("APIC calibration not consistent "
                         "with PM Timer: %ldms instead of 100ms\n",
                         (long)res);
                 /* Correct the lapic counter value */
                 res = (((u64)(*delta)) * pm_100ms);
                 do_div(res, deltapm);
-                printk(KERN_INFO "APIC delta adjusted to PM-Timer: "
+                pr_info("APIC delta adjusted to PM-Timer: "
                         "%lu (%ld)\n", (unsigned long)res, *delta);
                 *delta = (long)res;
         }
@@ -645,8 +645,7 @@ static int __init calibrate_APIC_clock(void)
          */
         if (calibration_result < (1000000 / HZ)) {
                 local_irq_enable();
-                printk(KERN_WARNING
-                       "APIC frequency too slow, disabling apic timer\n");
+                pr_warning("APIC frequency too slow, disabling apic timer\n");
                 return -1;
         }
 
@@ -672,13 +671,9 @@ static int __init calibrate_APIC_clock(void)
                 while (lapic_cal_loops <= LAPIC_CAL_LOOPS)
                         cpu_relax();
 
-                local_irq_disable();
-
                 /* Stop the lapic timer */
                 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt);
 
-                local_irq_enable();
-
                 /* Jiffies delta */
                 deltaj = lapic_cal_j2 - lapic_cal_j1;
                 apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
@@ -692,8 +687,7 @@ static int __init calibrate_APIC_clock(void)
                 local_irq_enable();
 
         if (levt->features & CLOCK_EVT_FEAT_DUMMY) {
-                printk(KERN_WARNING
-                       "APIC timer disabled due to verification failure.\n");
+                pr_warning("APIC timer disabled due to verification failure.\n");
                         return -1;
         }
 
@@ -714,7 +708,7 @@ void __init setup_boot_APIC_clock(void)
          * broadcast mechanism is used. On UP systems simply ignore it.
          */
         if (disable_apic_timer) {
-                printk(KERN_INFO "Disabling APIC timer\n");
+                pr_info("Disabling APIC timer\n");
                 /* No broadcast on UP ! */
                 if (num_possible_cpus() > 1) {
                         lapic_clockevent.mult = 1;
@@ -741,7 +735,7 @@ void __init setup_boot_APIC_clock(void)
         if (nmi_watchdog != NMI_IO_APIC)
                 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
         else
-                printk(KERN_WARNING "APIC timer registered as dummy,"
+                pr_warning("APIC timer registered as dummy,"
                         " due to nmi_watchdog=%d!\n", nmi_watchdog);
 
         /* Setup the lapic or request the broadcast */
@@ -773,8 +767,7 @@ static void local_apic_timer_interrupt(void)
          * spurious.
          */
         if (!evt->event_handler) {
-                printk(KERN_WARNING
-                       "Spurious LAPIC timer interrupt on cpu %d\n", cpu);
+                pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu);
                 /* Switch it off */
                 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt);
                 return;
@@ -783,11 +776,7 @@ static void local_apic_timer_interrupt(void)
         /*
          * the NMI deadlock-detector uses this.
          */
-#ifdef CONFIG_X86_64
-        add_pda(apic_timer_irqs, 1);
-#else
-        per_cpu(irq_stat, cpu).apic_timer_irqs++;
-#endif
+        inc_irq_stat(apic_timer_irqs);
 
         evt->event_handler(evt);
 }
@@ -800,7 +789,7 @@ static void local_apic_timer_interrupt(void)
  * [ if a single-CPU system runs an SMP kernel then we call the local
  *   interrupt as well. Thus we cannot inline the local irq ... ]
  */
-void smp_apic_timer_interrupt(struct pt_regs *regs)
+void __irq_entry smp_apic_timer_interrupt(struct pt_regs *regs)
 {
         struct pt_regs *old_regs = set_irq_regs(regs);
 
@@ -814,9 +803,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
          * Besides, if we don't timer interrupts ignore the global
          * interrupt lock, which is the WrongThing (tm) to do.
          */
-#ifdef CONFIG_X86_64
         exit_idle();
-#endif
         irq_enter();
         local_apic_timer_interrupt();
         irq_exit();
@@ -1093,7 +1080,7 @@ static void __cpuinit lapic_setup_esr(void)
         unsigned int oldvalue, value, maxlvt;
 
         if (!lapic_is_integrated()) {
-                printk(KERN_INFO "No ESR for 82489DX.\n");
+                pr_info("No ESR for 82489DX.\n");
                 return;
         }
 
@@ -1104,7 +1091,7 @@ static void __cpuinit lapic_setup_esr(void)
                  * ESR disabled - we can't do anything useful with the
                  * errors anyway - mbligh
                  */
-                printk(KERN_INFO "Leaving ESR disabled.\n");
+                pr_info("Leaving ESR disabled.\n");
                 return;
         }
 
@@ -1298,7 +1285,7 @@ void check_x2apic(void)
         rdmsr(MSR_IA32_APICBASE, msr, msr2);
 
         if (msr & X2APIC_ENABLE) {
-                printk("x2apic enabled by BIOS, switching to x2apic ops\n");
+                pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
                 x2apic_preenabled = x2apic = 1;
                 apic_ops = &x2apic_ops;
         }
@@ -1310,7 +1297,7 @@ void enable_x2apic(void)
 
         rdmsr(MSR_IA32_APICBASE, msr, msr2);
         if (!(msr & X2APIC_ENABLE)) {
-                printk("Enabling x2apic\n");
+                pr_info("Enabling x2apic\n");
                 wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0);
         }
 }
@@ -1325,9 +1312,8 @@ void __init enable_IR_x2apic(void)
                 return;
 
         if (!x2apic_preenabled && disable_x2apic) {
-                printk(KERN_INFO
-                       "Skipped enabling x2apic and Interrupt-remapping "
-                       "because of nox2apic\n");
+                pr_info("Skipped enabling x2apic and Interrupt-remapping "
+                        "because of nox2apic\n");
                 return;
         }
 
@@ -1335,22 +1321,19 @@ void __init enable_IR_x2apic(void)
                 panic("Bios already enabled x2apic, can't enforce nox2apic");
 
         if (!x2apic_preenabled && skip_ioapic_setup) {
-                printk(KERN_INFO
-                       "Skipped enabling x2apic and Interrupt-remapping "
-                       "because of skipping io-apic setup\n");
+                pr_info("Skipped enabling x2apic and Interrupt-remapping "
+                        "because of skipping io-apic setup\n");
                 return;
         }
 
         ret = dmar_table_init();
         if (ret) {
-                printk(KERN_INFO
-                       "dmar_table_init() failed with %d:\n", ret);
+                pr_info("dmar_table_init() failed with %d:\n", ret);
 
                 if (x2apic_preenabled)
                         panic("x2apic enabled by bios. But IR enabling failed");
                 else
-                        printk(KERN_INFO
-                               "Not enabling x2apic,Intr-remapping\n");
+                        pr_info("Not enabling x2apic,Intr-remapping\n");
                 return;
         }
 
@@ -1359,7 +1342,7 @@ void __init enable_IR_x2apic(void)
 
         ret = save_mask_IO_APIC_setup();
         if (ret) {
-                printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret);
+                pr_info("Saving IO-APIC state failed: %d\n", ret);
                 goto end;
         }
 
@@ -1394,14 +1377,11 @@ end:
 
         if (!ret) {
                 if (!x2apic_preenabled)
-                        printk(KERN_INFO
-                               "Enabled x2apic and interrupt-remapping\n");
+                        pr_info("Enabled x2apic and interrupt-remapping\n");
                 else
-                        printk(KERN_INFO
-                               "Enabled Interrupt-remapping\n");
+                        pr_info("Enabled Interrupt-remapping\n");
         } else
-                printk(KERN_ERR
-                       "Failed to enable Interrupt-remapping and x2apic\n");
+                pr_err("Failed to enable Interrupt-remapping and x2apic\n");
 #else
         if (!cpu_has_x2apic)
                 return;
@@ -1410,8 +1390,8 @@ end:
                 panic("x2apic enabled prior OS handover,"
                       " enable CONFIG_INTR_REMAP");
 
-        printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping "
-               " and x2apic\n");
+        pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping "
+                " and x2apic\n");
 #endif
 
         return;
@@ -1428,7 +1408,7 @@ end:
 static int __init detect_init_APIC(void)
 {
         if (!cpu_has_apic) {
-                printk(KERN_INFO "No local APIC present\n");
+                pr_info("No local APIC present\n");
                 return -1;
         }
 
@@ -1469,8 +1449,8 @@ static int __init detect_init_APIC(void)
                  * "lapic" specified.
                  */
                 if (!force_enable_local_apic) {
-                        printk(KERN_INFO "Local APIC disabled by BIOS -- "
-                               "you can enable it with \"lapic\"\n");
+                        pr_info("Local APIC disabled by BIOS -- "
+                                "you can enable it with \"lapic\"\n");
                         return -1;
                 }
                 /*
@@ -1480,8 +1460,7 @@ static int __init detect_init_APIC(void)
                  */
                 rdmsr(MSR_IA32_APICBASE, l, h);
                 if (!(l & MSR_IA32_APICBASE_ENABLE)) {
-                        printk(KERN_INFO
-                               "Local APIC disabled by BIOS -- reenabling.\n");
+                        pr_info("Local APIC disabled by BIOS -- reenabling.\n");
                         l &= ~MSR_IA32_APICBASE_BASE;
                         l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE;
                         wrmsr(MSR_IA32_APICBASE, l, h);
@@ -1494,7 +1473,7 @@ static int __init detect_init_APIC(void)
          */
         features = cpuid_edx(1);
         if (!(features & (1 << X86_FEATURE_APIC))) {
-                printk(KERN_WARNING "Could not enable APIC!\n");
+                pr_warning("Could not enable APIC!\n");
                 return -1;
         }
         set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
@@ -1505,14 +1484,14 @@ static int __init detect_init_APIC(void)
         if (l & MSR_IA32_APICBASE_ENABLE)
                 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
 
-        printk(KERN_INFO "Found and enabled local APIC!\n");
+        pr_info("Found and enabled local APIC!\n");
 
         apic_pm_activate();
 
         return 0;
 
 no_apic:
-        printk(KERN_INFO "No local APIC present or hardware disabled\n");
+        pr_info("No local APIC present or hardware disabled\n");
         return -1;
 }
 #endif
@@ -1588,12 +1567,12 @@ int __init APIC_init_uniprocessor(void)
 {
 #ifdef CONFIG_X86_64
         if (disable_apic) {
-                printk(KERN_INFO "Apic disabled\n");
+                pr_info("Apic disabled\n");
                 return -1;
         }
         if (!cpu_has_apic) {
                 disable_apic = 1;
-                printk(KERN_INFO "Apic disabled by BIOS\n");
+                pr_info("Apic disabled by BIOS\n");
                 return -1;
         }
 #else
@@ -1605,8 +1584,8 @@ int __init APIC_init_uniprocessor(void)
          */
         if (!cpu_has_apic &&
             APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
-                printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n",
-                       boot_cpu_physical_apicid);
+                pr_err("BIOS bug, local APIC 0x%x not detected!...\n",
+                        boot_cpu_physical_apicid);
                 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
                 return -1;
         }
@@ -1682,9 +1661,7 @@ void smp_spurious_interrupt(struct pt_regs *regs)
 {
         u32 v;
 
-#ifdef CONFIG_X86_64
         exit_idle();
-#endif
         irq_enter();
         /*
          * Check if this really is a spurious interrupt and ACK it
@@ -1695,14 +1672,11 @@ void smp_spurious_interrupt(struct pt_regs *regs)
         if (v & (1 << (SPURIOUS_APIC_VECTOR & 0x1f)))
                 ack_APIC_irq();
 
-#ifdef CONFIG_X86_64
-        add_pda(irq_spurious_count, 1);
-#else
+        inc_irq_stat(irq_spurious_count);
+
         /* see sw-dev-man vol 3, chapter 7.4.13.5 */
-        printk(KERN_INFO "spurious APIC interrupt on CPU#%d, "
-               "should never happen.\n", smp_processor_id());
-        __get_cpu_var(irq_stat).irq_spurious_count++;
-#endif
+        pr_info("spurious APIC interrupt on CPU#%d, "
+                "should never happen.\n", smp_processor_id());
         irq_exit();
 }
 
@@ -1713,9 +1687,7 @@ void smp_error_interrupt(struct pt_regs *regs)
 {
         u32 v, v1;
 
-#ifdef CONFIG_X86_64
         exit_idle();
-#endif
         irq_enter();
         /* First tickle the hardware, only then report what went on. -- REW */
         v = apic_read(APIC_ESR);
@@ -1724,17 +1696,18 @@ void smp_error_interrupt(struct pt_regs *regs)
         ack_APIC_irq();
         atomic_inc(&irq_err_count);
 
-        /* Here is what the APIC error bits mean:
-           0: Send CS error
-           1: Receive CS error
-           2: Send accept error
-           3: Receive accept error
-           4: Reserved
-           5: Send illegal vector
-           6: Received illegal vector
-           7: Illegal register address
-        */
-        printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n",
+        /*
+         * Here is what the APIC error bits mean:
+         * 0: Send CS error
+         * 1: Receive CS error
+         * 2: Send accept error
+         * 3: Receive accept error
+         * 4: Reserved
+         * 5: Send illegal vector
+         * 6: Received illegal vector
+         * 7: Illegal register address
+         */
+        pr_debug("APIC error on CPU%d: %02x(%02x)\n",
                 smp_processor_id(), v , v1);
         irq_exit();
 }
@@ -1832,28 +1805,32 @@ void disconnect_bsp_APIC(int virt_wire_setup)
 void __cpuinit generic_processor_info(int apicid, int version)
 {
         int cpu;
-        cpumask_t tmp_map;
 
         /*
          * Validate version
          */
         if (version == 0x0) {
-                printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! "
-                                "fixing up to 0x10. (tell your hw vendor)\n",
+                pr_warning("BIOS bug, APIC version is 0 for CPU#%d! "
+                           "fixing up to 0x10. (tell your hw vendor)\n",
                                 version);
                 version = 0x10;
         }
         apic_version[apicid] = version;
 
-        if (num_processors >= NR_CPUS) {
-                printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
-                        "  Processor ignored.\n", NR_CPUS);
+        if (num_processors >= nr_cpu_ids) {
+                int max = nr_cpu_ids;
+                int thiscpu = max + disabled_cpus;
+
+                pr_warning(
+                        "ACPI: NR_CPUS/possible_cpus limit of %i reached."
+                        "  Processor %d/0x%x ignored.\n", max, thiscpu, apicid);
+
+                disabled_cpus++;
                 return;
         }
 
         num_processors++;
-        cpus_complement(tmp_map, cpu_present_map);
-        cpu = first_cpu(tmp_map);
+        cpu = cpumask_next_zero(-1, cpu_present_mask);
 
         physid_set(apicid, phys_cpu_present_map);
         if (apicid == boot_cpu_physical_apicid) {
@@ -1903,8 +1880,8 @@ void __cpuinit generic_processor_info(int apicid, int version)
         }
 #endif
 
-        cpu_set(cpu, cpu_possible_map);
-        cpu_set(cpu, cpu_present_map);
+        set_cpu_possible(cpu, true);
+        set_cpu_present(cpu, true);
 }
 
 #ifdef CONFIG_X86_64
@@ -2106,7 +2083,7 @@ __cpuinit int apic_is_clustered_box(void)
         bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid);
         bitmap_zero(clustermap, NUM_APIC_CLUSTERS);
 
-        for (i = 0; i < NR_CPUS; i++) {
+        for (i = 0; i < nr_cpu_ids; i++) {
                 /* are we being called early in kernel startup? */
                 if (bios_cpu_apicid) {
                         id = bios_cpu_apicid[i];
@@ -2209,7 +2186,7 @@ static int __init apic_set_verbosity(char *arg)
         else if (strcmp("verbose", arg) == 0)
                 apic_verbosity = APIC_VERBOSE;
         else {
-                printk(KERN_WARNING "APIC Verbosity level %s not recognised"
+                pr_warning("APIC Verbosity level %s not recognised"
                         " use apic=verbose or apic=debug\n", arg);
                 return -EINVAL;
         }
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 5145a6e72bbb..3a26525a3f31 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -391,11 +391,7 @@ static int power_off;
 #else
 static int power_off = 1;
 #endif
-#ifdef CONFIG_APM_REAL_MODE_POWER_OFF
-static int realmode_power_off = 1;
-#else
 static int realmode_power_off;
-#endif
 #ifdef CONFIG_APM_ALLOW_INTS
 static int allow_ints = 1;
 #else
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index 6649d09ad88f..ee4df08feee6 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -11,7 +11,7 @@
 #include <linux/suspend.h>
 #include <linux/kbuild.h>
 #include <asm/ucontext.h>
-#include "sigframe.h"
+#include <asm/sigframe.h>
 #include <asm/pgtable.h>
 #include <asm/fixmap.h>
 #include <asm/processor.h>
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index 7fcf63d22f8b..1d41d3f1edbc 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -20,6 +20,8 @@
 
 #include <xen/interface/xen.h>
 
+#include <asm/sigframe.h>
+
 #define __NO_STUBS 1
 #undef __SYSCALL
 #undef _ASM_X86_UNISTD_64_H
@@ -87,7 +89,7 @@ int main(void)
         BLANK();
 #undef ENTRY
         DEFINE(IA32_RT_SIGFRAME_sigcontext,
-               offsetof (struct rt_sigframe32, uc.uc_mcontext));
+               offsetof (struct rt_sigframe_ia32, uc.uc_mcontext));
         BLANK();
 #endif
         DEFINE(pbe_address, offsetof(struct pbe, address));
diff --git a/arch/x86/kernel/bios_uv.c b/arch/x86/kernel/bios_uv.c
index f0dfe6f17e7e..f63882728d91 100644
--- a/arch/x86/kernel/bios_uv.c
+++ b/arch/x86/kernel/bios_uv.c
@@ -25,7 +25,7 @@
 #include <asm/uv/bios.h>
 #include <asm/uv/uv_hub.h>
 
-struct uv_systab uv_systab;
+static struct uv_systab uv_systab;
 
 s64 uv_bios_call(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, u64 a4, u64 a5)
 {
@@ -69,10 +69,10 @@ s64 uv_bios_call_reentrant(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3,
 
 long sn_partition_id;
 EXPORT_SYMBOL_GPL(sn_partition_id);
-long uv_coherency_id;
-EXPORT_SYMBOL_GPL(uv_coherency_id);
-long uv_region_size;
-EXPORT_SYMBOL_GPL(uv_region_size);
+long sn_coherency_id;
+EXPORT_SYMBOL_GPL(sn_coherency_id);
+long sn_region_size;
+EXPORT_SYMBOL_GPL(sn_region_size);
 int uv_type;
 
 
@@ -100,6 +100,56 @@ s64 uv_bios_get_sn_info(int fc, int *uvtype, long *partid, long *coher,
         return ret;
 }
 
+int
+uv_bios_mq_watchlist_alloc(int blade, unsigned long addr, unsigned int mq_size,
+                           unsigned long *intr_mmr_offset)
+{
+        union uv_watchlist_u size_blade;
+        u64 watchlist;
+        s64 ret;
+
+        size_blade.size = mq_size;
+        size_blade.blade = blade;
+
+        /*
+         * bios returns watchlist number or negative error number.
+         */
+        ret = (int)uv_bios_call_irqsave(UV_BIOS_WATCHLIST_ALLOC, addr,
+                        size_blade.val, (u64)intr_mmr_offset,
+                        (u64)&watchlist, 0);
+        if (ret < BIOS_STATUS_SUCCESS)
+                return ret;
+
+        return watchlist;
+}
+EXPORT_SYMBOL_GPL(uv_bios_mq_watchlist_alloc);
+
+int
+uv_bios_mq_watchlist_free(int blade, int watchlist_num)
+{
+        return (int)uv_bios_call_irqsave(UV_BIOS_WATCHLIST_FREE,
+                                blade, watchlist_num, 0, 0, 0);
+}
+EXPORT_SYMBOL_GPL(uv_bios_mq_watchlist_free);
+
+s64
+uv_bios_change_memprotect(u64 paddr, u64 len, enum uv_memprotect perms)
+{
+        return uv_bios_call_irqsave(UV_BIOS_MEMPROTECT, paddr, len,
+                                        perms, 0, 0);
+}
+EXPORT_SYMBOL_GPL(uv_bios_change_memprotect);
+
+s64
+uv_bios_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
+{
+        s64 ret;
+
+        ret = uv_bios_call_irqsave(UV_BIOS_GET_PARTITION_ADDR, (u64)cookie,
+                                        (u64)addr, buf, (u64)len, 0);
+        return ret;
+}
+EXPORT_SYMBOL_GPL(uv_bios_reserved_page_pa);
 
 s64 uv_bios_freq_base(u64 clock_type, u64 *ticks_per_second)
 {
diff --git a/arch/x86/kernel/check.c b/arch/x86/kernel/check.c
new file mode 100644
index 000000000000..2ac0ab71412a
--- /dev/null
+++ b/arch/x86/kernel/check.c
@@ -0,0 +1,161 @@
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/kthread.h>
+#include <linux/workqueue.h>
+#include <asm/e820.h>
+#include <asm/proto.h>
+
+/*
+ * Some BIOSes seem to corrupt the low 64k of memory during events
+ * like suspend/resume and unplugging an HDMI cable.  Reserve all
+ * remaining free memory in that area and fill it with a distinct
+ * pattern.
+ */
+#define MAX_SCAN_AREAS  8
+
+static int __read_mostly memory_corruption_check = -1;
+
+static unsigned __read_mostly corruption_check_size = 64*1024;
+static unsigned __read_mostly corruption_check_period = 60; /* seconds */
+
+static struct e820entry scan_areas[MAX_SCAN_AREAS];
+static int num_scan_areas;
+
+
+static __init int set_corruption_check(char *arg)
+{
+        char *end;
+
+        memory_corruption_check = simple_strtol(arg, &end, 10);
+
+        return (*end == 0) ? 0 : -EINVAL;
+}
+early_param("memory_corruption_check", set_corruption_check);
+
+static __init int set_corruption_check_period(char *arg)
+{
+        char *end;
+
+        corruption_check_period = simple_strtoul(arg, &end, 10);
+
+        return (*end == 0) ? 0 : -EINVAL;
+}
+early_param("memory_corruption_check_period", set_corruption_check_period);
+
+static __init int set_corruption_check_size(char *arg)
+{
+        char *end;
+        unsigned size;
+
+        size = memparse(arg, &end);
+
+        if (*end == '\0')
+                corruption_check_size = size;
+
+        return (size == corruption_check_size) ? 0 : -EINVAL;
+}
+early_param("memory_corruption_check_size", set_corruption_check_size);
+
+
+void __init setup_bios_corruption_check(void)
+{
+        u64 addr = PAGE_SIZE;   /* assume first page is reserved anyway */
+
+        if (memory_corruption_check == -1) {
+                memory_corruption_check =
+#ifdef CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
+                        1
+#else
+                        0
+#endif
+                        ;
+        }
+
+        if (corruption_check_size == 0)
+                memory_corruption_check = 0;
+
+        if (!memory_corruption_check)
+                return;
+
+        corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);
+
+        while (addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
+                u64 size;
+                addr = find_e820_area_size(addr, &size, PAGE_SIZE);
+
+                if (addr == 0)
+                        break;
+
+                if ((addr + size) > corruption_check_size)
+                        size = corruption_check_size - addr;
+
+                if (size == 0)
+                        break;
+
+                e820_update_range(addr, size, E820_RAM, E820_RESERVED);
+                scan_areas[num_scan_areas].addr = addr;
+                scan_areas[num_scan_areas].size = size;
+                num_scan_areas++;
+
+                /* Assume we've already mapped this early memory */
+                memset(__va(addr), 0, size);
+
+                addr += size;
+        }
+
+        printk(KERN_INFO "Scanning %d areas for low memory corruption\n",
+               num_scan_areas);
+        update_e820();
+}
+
+
+void check_for_bios_corruption(void)
+{
+        int i;
+        int corruption = 0;
+
+        if (!memory_corruption_check)
+                return;
+
+        for (i = 0; i < num_scan_areas; i++) {
+                unsigned long *addr = __va(scan_areas[i].addr);
+                unsigned long size = scan_areas[i].size;
+
+                for (; size; addr++, size -= sizeof(unsigned long)) {
+                        if (!*addr)
+                                continue;
+                        printk(KERN_ERR "Corrupted low memory at %p (%lx phys) = %08lx\n",
+                               addr, __pa(addr), *addr);
+                        corruption = 1;
+                        *addr = 0;
+                }
+        }
+
+        WARN_ONCE(corruption, KERN_ERR "Memory corruption detected in low memory\n");
+}
+
+static void check_corruption(struct work_struct *dummy);
+static DECLARE_DELAYED_WORK(bios_check_work, check_corruption);
+
+static void check_corruption(struct work_struct *dummy)
+{
+        check_for_bios_corruption();
+        schedule_delayed_work(&bios_check_work,
+                round_jiffies_relative(corruption_check_period*HZ)); 
+}
+
+static int start_periodic_check_for_corruption(void)
+{
+        if (!memory_corruption_check || corruption_check_period == 0)
+                return 0;
+
+        printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n",
+               corruption_check_period);
+
+        /* First time we run the checks right away */
+        schedule_delayed_work(&bios_check_work, 0);
+        return 0;
+}
+
+module_init(start_periodic_check_for_corruption);
+
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 82ec6075c057..82db7f45e2de 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -2,8 +2,14 @@
 # Makefile for x86-compatible CPU details and quirks
 #
 
+# Don't trace early stages of a secondary CPU boot
+ifdef CONFIG_FUNCTION_TRACER
+CFLAGS_REMOVE_common.o = -pg
+endif
+
 obj-y                   := intel_cacheinfo.o addon_cpuid_features.o
 obj-y                   += proc.o capflags.o powerflags.o common.o
+obj-y                   += vmware.o hypervisor.o
 
 obj-$(CONFIG_X86_32)    += bugs.o cmpxchg.o
 obj-$(CONFIG_X86_64)    += bugs_64.o
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index ef8f831af823..2cf23634b6d9 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -120,9 +120,17 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
         c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
                                                  & core_select_mask;
         c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width);
+        /*
+         * Reinit the apicid, now that we have extended initial_apicid.
+         */
+        c->apicid = phys_pkg_id(c->initial_apicid, 0);
 #else
         c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
         c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
+        /*
+         * Reinit the apicid, now that we have extended initial_apicid.
+         */
+        c->apicid = phys_pkg_id(0);
 #endif
         c->x86_max_cores = (core_level_siblings / smp_num_siblings);
 
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 8f1e31db2ad5..7c878f6aa919 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -283,9 +283,14 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
 {
         early_init_amd_mc(c);
 
-        /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
-        if (c->x86_power & (1<<8))
+        /*
+         * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate
+         * with P/T states and does not stop in deep C-states
+         */
+        if (c->x86_power & (1 << 8)) {
                 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
+                set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
+        }
 
 #ifdef CONFIG_X86_64
         set_cpu_cap(c, X86_FEATURE_SYSCALL32);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index b9c9ea0217a9..3f95a40f718a 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -36,6 +36,7 @@
 #include <asm/proto.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
+#include <asm/hypervisor.h>
 
 #include "cpu.h"
 
@@ -354,7 +355,7 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
         } else if (smp_num_siblings > 1) {
 
-                if (smp_num_siblings > NR_CPUS) {
+                if (smp_num_siblings > nr_cpu_ids) {
                         printk(KERN_WARNING "CPU: Unsupported number of siblings %d",
                                         smp_num_siblings);
                         smp_num_siblings = 1;
@@ -703,6 +704,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
         detect_ht(c);
 #endif
 
+        init_hypervisor(c);
         /*
          * On SMP, boot_cpu_data holds the common feature set between
          * all CPUs; so make sure that we indicate which features are
@@ -862,7 +864,7 @@ EXPORT_SYMBOL(_cpu_pda);
 
 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
 
-char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss;
+static char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss;
 
 void __cpuinit pda_init(int cpu)
 {
@@ -903,8 +905,8 @@ void __cpuinit pda_init(int cpu)
         }
 }
 
-char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
-                           DEBUG_STKSZ] __page_aligned_bss;
+static char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
+                                  DEBUG_STKSZ] __page_aligned_bss;
 
 extern asmlinkage void ignore_sysret(void);
 
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 8e48c5d4467d..28102ad1a363 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -33,6 +33,7 @@
 #include <linux/cpufreq.h>
 #include <linux/compiler.h>
 #include <linux/dmi.h>
+#include <linux/ftrace.h>
 
 #include <linux/acpi.h>
 #include <acpi/processor.h>
@@ -391,6 +392,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
         unsigned int next_perf_state = 0; /* Index into perf table */
         unsigned int i;
         int result = 0;
+        struct power_trace it;
 
         dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
 
@@ -427,6 +429,8 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
                 }
         }
 
+        trace_power_mark(&it, POWER_PSTATE, next_perf_state);
+
         switch (data->cpu_feature) {
         case SYSTEM_INTEL_MSR_CAPABLE:
                 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
@@ -513,6 +517,17 @@ acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
         }
 }
 
+static void free_acpi_perf_data(void)
+{
+        unsigned int i;
+
+        /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
+        for_each_possible_cpu(i)
+                free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
+                                 ->shared_cpu_map);
+        free_percpu(acpi_perf_data);
+}
+
 /*
  * acpi_cpufreq_early_init - initialize ACPI P-States library
  *
@@ -523,6 +538,7 @@ acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
  */
 static int __init acpi_cpufreq_early_init(void)
 {
+        unsigned int i;
         dprintk("acpi_cpufreq_early_init\n");
 
         acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
@@ -530,6 +546,16 @@ static int __init acpi_cpufreq_early_init(void)
                 dprintk("Memory allocation error for acpi_perf_data.\n");
                 return -ENOMEM;
         }
+        for_each_possible_cpu(i) {
+                if (!alloc_cpumask_var_node(
+                        &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
+                        GFP_KERNEL, cpu_to_node(i))) {
+
+                        /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
+                        free_acpi_perf_data();
+                        return -ENOMEM;
+                }
+        }
 
         /* Do initialization in ACPI core */
         acpi_processor_preregister_performance(acpi_perf_data);
@@ -600,9 +626,9 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
          */
         if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
             policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
-                policy->cpus = perf->shared_cpu_map;
+                cpumask_copy(&policy->cpus, perf->shared_cpu_map);
         }
-        policy->related_cpus = perf->shared_cpu_map;
+        cpumask_copy(&policy->related_cpus, perf->shared_cpu_map);
 
 #ifdef CONFIG_SMP
         dmi_check_system(sw_any_bug_dmi_table);
@@ -791,7 +817,7 @@ static int __init acpi_cpufreq_init(void)
 
         ret = cpufreq_register_driver(&acpi_cpufreq_driver);
         if (ret)
-                free_percpu(acpi_perf_data);
+                free_acpi_perf_data();
 
         return ret;
 }
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
index b8e05ee4f736..beea4466b063 100644
--- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
@@ -160,6 +160,7 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
                 switch (c->x86_model) {
                 case 0x0E: /* Core */
                 case 0x0F: /* Core Duo */
+                case 0x16: /* Celeron Core */
                         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
                         return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PCORE);
                 case 0x0D: /* Pentium M (Dothan) */
@@ -171,7 +172,9 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
         }
 
         if (c->x86 != 0xF) {
-                printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <cpufreq@vger.kernel.org>\n");
+                if (!cpu_has(c, X86_FEATURE_EST))
+                        printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. "
+                                "Please send an e-mail to <cpufreq@vger.kernel.org>\n");
                 return 0;
         }
 
@@ -274,6 +277,7 @@ static struct cpufreq_driver p4clockmod_driver = {
         .name           = "p4-clockmod",
         .owner          = THIS_MODULE,
         .attr           = p4clockmod_attr,
+        .hide_interface = 1,
 };
 
 
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
index 7c7d56b43136..1b446d79a8fd 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
@@ -310,6 +310,12 @@ static int powernow_acpi_init(void)
                 goto err0;
         }
 
+        if (!alloc_cpumask_var(&acpi_processor_perf->shared_cpu_map,
+                                                                GFP_KERNEL)) {
+                retval = -ENOMEM;
+                goto err05;
+        }
+
         if (acpi_processor_register_performance(acpi_processor_perf, 0)) {
                 retval = -EIO;
                 goto err1;
@@ -412,6 +418,8 @@ static int powernow_acpi_init(void)
 err2:
         acpi_processor_unregister_performance(acpi_processor_perf, 0);
 err1:
+        free_cpumask_var(acpi_processor_perf->shared_cpu_map);
+err05:
         kfree(acpi_processor_perf);
 err0:
         printk(KERN_WARNING PFX "ACPI perflib can not be used in this platform\n");
@@ -652,6 +660,7 @@ static int powernow_cpu_exit (struct cpufreq_policy *policy) {
 #ifdef CONFIG_X86_POWERNOW_K7_ACPI
         if (acpi_processor_perf) {
                 acpi_processor_unregister_performance(acpi_processor_perf, 0);
+                free_cpumask_var(acpi_processor_perf->shared_cpu_map);
                 kfree(acpi_processor_perf);
         }
 #endif
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 7f05f44b97e9..c3c9adbaa26f 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -766,7 +766,7 @@ static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned
 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
 {
         struct cpufreq_frequency_table *powernow_table;
-        int ret_val;
+        int ret_val = -ENODEV;
 
         if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
                 dprintk("register performance failed: bad ACPI data\n");
@@ -815,6 +815,13 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
         /* notify BIOS that we exist */
         acpi_processor_notify_smm(THIS_MODULE);
 
+        if (!alloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
+                printk(KERN_ERR PFX
+                                "unable to alloc powernow_k8_data cpumask\n");
+                ret_val = -ENOMEM;
+                goto err_out_mem;
+        }
+
         return 0;
 
 err_out_mem:
@@ -826,7 +833,7 @@ err_out:
         /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
         data->acpi_data.state_count = 0;
 
-        return -ENODEV;
+        return ret_val;
 }
 
 static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
@@ -929,6 +936,7 @@ static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
 {
         if (data->acpi_data.state_count)
                 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
+        free_cpumask_var(data->acpi_data.shared_cpu_map);
 }
 
 #else
@@ -1134,7 +1142,8 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
         data->cpu = pol->cpu;
         data->currpstate = HW_PSTATE_INVALID;
 
-        if (powernow_k8_cpu_init_acpi(data)) {
+        rc = powernow_k8_cpu_init_acpi(data);
+        if (rc) {
                 /*
                  * Use the PSB BIOS structure. This is only availabe on
                  * an UP version, and is deprecated by AMD.
@@ -1152,20 +1161,17 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
                                "ACPI maintainers and complain to your BIOS "
                                "vendor.\n");
 #endif
-                        kfree(data);
-                        return -ENODEV;
+                        goto err_out;
                 }
                 if (pol->cpu != 0) {
                         printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
                                "CPU other than CPU0. Complain to your BIOS "
                                "vendor.\n");
-                        kfree(data);
-                        return -ENODEV;
+                        goto err_out;
                 }
                 rc = find_psb_table(data);
                 if (rc) {
-                        kfree(data);
-                        return -ENODEV;
+                        goto err_out;
                 }
         }
 
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
index 3b5f06423e77..f0ea6fa2f53c 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -459,9 +459,7 @@ static int centrino_verify (struct cpufreq_policy *policy)
  * Sets a new CPUFreq policy.
  */
 struct allmasks {
-        cpumask_t               online_policy_cpus;
         cpumask_t               saved_mask;
-        cpumask_t               set_mask;
         cpumask_t               covered_cpus;
 };
 
@@ -475,9 +473,7 @@ static int centrino_target (struct cpufreq_policy *policy,
         int                     retval = 0;
         unsigned int            j, k, first_cpu, tmp;
         CPUMASK_ALLOC(allmasks);
-        CPUMASK_PTR(online_policy_cpus, allmasks);
         CPUMASK_PTR(saved_mask, allmasks);
-        CPUMASK_PTR(set_mask, allmasks);
         CPUMASK_PTR(covered_cpus, allmasks);
 
         if (unlikely(allmasks == NULL))
@@ -497,30 +493,28 @@ static int centrino_target (struct cpufreq_policy *policy,
                 goto out;
         }
 
-#ifdef CONFIG_HOTPLUG_CPU
-        /* cpufreq holds the hotplug lock, so we are safe from here on */
-        cpus_and(*online_policy_cpus, cpu_online_map, policy->cpus);
-#else
-        *online_policy_cpus = policy->cpus;
-#endif
-
         *saved_mask = current->cpus_allowed;
         first_cpu = 1;
         cpus_clear(*covered_cpus);
-        for_each_cpu_mask_nr(j, *online_policy_cpus) {
+        for_each_cpu_mask_nr(j, policy->cpus) {
+                const cpumask_t *mask;
+
+                /* cpufreq holds the hotplug lock, so we are safe here */
+                if (!cpu_online(j))
+                        continue;
+
                 /*
                  * Support for SMP systems.
                  * Make sure we are running on CPU that wants to change freq
                  */
-                cpus_clear(*set_mask);
                 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
-                        cpus_or(*set_mask, *set_mask, *online_policy_cpus);
+                        mask = &policy->cpus;
                 else
-                        cpu_set(j, *set_mask);
+                        mask = &cpumask_of_cpu(j);
 
-                set_cpus_allowed_ptr(current, set_mask);
+                set_cpus_allowed_ptr(current, mask);
                 preempt_disable();
-                if (unlikely(!cpu_isset(smp_processor_id(), *set_mask))) {
+                if (unlikely(!cpu_isset(smp_processor_id(), *mask))) {
                         dprintk("couldn't limit to CPUs in this domain\n");
                         retval = -EAGAIN;
                         if (first_cpu) {
@@ -548,7 +542,9 @@ static int centrino_target (struct cpufreq_policy *policy,
                         dprintk("target=%dkHz old=%d new=%d msr=%04x\n",
                                 target_freq, freqs.old, freqs.new, msr);
 
-                        for_each_cpu_mask_nr(k, *online_policy_cpus) {
+                        for_each_cpu_mask_nr(k, policy->cpus) {
+                                if (!cpu_online(k))
+                                        continue;
                                 freqs.cpu = k;
                                 cpufreq_notify_transition(&freqs,
                                         CPUFREQ_PRECHANGE);
@@ -571,7 +567,9 @@ static int centrino_target (struct cpufreq_policy *policy,
                 preempt_enable();
         }
 
-        for_each_cpu_mask_nr(k, *online_policy_cpus) {
+        for_each_cpu_mask_nr(k, policy->cpus) {
+                if (!cpu_online(k))
+                        continue;
                 freqs.cpu = k;
                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
         }
@@ -584,18 +582,17 @@ static int centrino_target (struct cpufreq_policy *policy,
                  * Best effort undo..
                  */
 
-                if (!cpus_empty(*covered_cpus))
-                        for_each_cpu_mask_nr(j, *covered_cpus) {
-                                set_cpus_allowed_ptr(current,
-                                                     &cpumask_of_cpu(j));
-                                wrmsr(MSR_IA32_PERF_CTL, oldmsr, h);
-                        }
+                for_each_cpu_mask_nr(j, *covered_cpus) {
+                        set_cpus_allowed_ptr(current, &cpumask_of_cpu(j));
+                        wrmsr(MSR_IA32_PERF_CTL, oldmsr, h);
+                }
 
                 tmp = freqs.new;
                 freqs.new = freqs.old;
                 freqs.old = tmp;
-                for_each_cpu_mask_nr(j, *online_policy_cpus) {
-                        freqs.cpu = j;
+                for_each_cpu_mask_nr(j, policy->cpus) {
+                        if (!cpu_online(j))
+                                continue;
                         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
                         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
                 }
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
index 98d4fdb7dc04..cdac7d62369b 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
@@ -139,6 +139,15 @@ static unsigned int pentium_core_get_frequency(void)
         case 3:
                 fsb = 166667;
                 break;
+        case 2:
+                fsb = 200000;
+                break;
+        case 0:
+                fsb = 266667;
+                break;
+        case 4:
+                fsb = 333333;
+                break;
         default:
                 printk(KERN_ERR "PCORE - MSR_FSB_FREQ undefined value");
         }
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
new file mode 100644
index 000000000000..fb5b86af0b01
--- /dev/null
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -0,0 +1,58 @@
+/*
+ * Common hypervisor code
+ *
+ * Copyright (C) 2008, VMware, Inc.
+ * Author : Alok N Kataria <akataria@vmware.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <asm/processor.h>
+#include <asm/vmware.h>
+#include <asm/hypervisor.h>
+
+static inline void __cpuinit
+detect_hypervisor_vendor(struct cpuinfo_x86 *c)
+{
+        if (vmware_platform()) {
+                c->x86_hyper_vendor = X86_HYPER_VENDOR_VMWARE;
+        } else {
+                c->x86_hyper_vendor = X86_HYPER_VENDOR_NONE;
+        }
+}
+
+unsigned long get_hypervisor_tsc_freq(void)
+{
+        if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE)
+                return vmware_get_tsc_khz();
+        return 0;
+}
+
+static inline void __cpuinit
+hypervisor_set_feature_bits(struct cpuinfo_x86 *c)
+{
+        if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE) {
+                vmware_set_feature_bits(c);
+                return;
+        }
+}
+
+void __cpuinit init_hypervisor(struct cpuinfo_x86 *c)
+{
+        detect_hypervisor_vendor(c);
+        hypervisor_set_feature_bits(c);
+}
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index cce0b6118d55..8ea6929e974c 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -11,7 +11,6 @@
 #include <asm/pgtable.h>
 #include <asm/msr.h>
 #include <asm/uaccess.h>
-#include <asm/ptrace.h>
 #include <asm/ds.h>
 #include <asm/bugs.h>
 
@@ -41,6 +40,16 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
         if (c->x86 == 15 && c->x86_cache_alignment == 64)
                 c->x86_cache_alignment = 128;
 #endif
+
+        /*
+         * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate
+         * with P/T states and does not stop in deep C-states
+         */
+        if (c->x86_power & (1 << 8)) {
+                set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
+                set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
+        }
+
 }
 
 #ifdef CONFIG_X86_32
@@ -242,6 +251,13 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 
         intel_workarounds(c);
 
+        /*
+         * Detect the extended topology information if available. This
+         * will reinitialise the initial_apicid which will be used
+         * in init_intel_cacheinfo()
+         */
+        detect_extended_topology(c);
+
         l2 = init_intel_cacheinfo(c);
         if (c->cpuid_level > 9) {
                 unsigned eax = cpuid_eax(10);
@@ -307,13 +323,8 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
                 set_cpu_cap(c, X86_FEATURE_P4);
         if (c->x86 == 6)
                 set_cpu_cap(c, X86_FEATURE_P3);
-
-        if (cpu_has_bts)
-                ptrace_bts_init_intel(c);
-
 #endif
 
-        detect_extended_topology(c);
         if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
                 /*
                  * let's use the legacy cpuid vector 0x1 and 0x4 for topology
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 3f46afbb1cf1..48533d77be78 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -534,31 +534,16 @@ static void __cpuinit free_cache_attributes(unsigned int cpu)
         per_cpu(cpuid4_info, cpu) = NULL;
 }
 
-static int __cpuinit detect_cache_attributes(unsigned int cpu)
+static void __cpuinit get_cpu_leaves(void *_retval)
 {
-        struct _cpuid4_info     *this_leaf;
-        unsigned long           j;
-        int                     retval;
-        cpumask_t               oldmask;
-
-        if (num_cache_leaves == 0)
-                return -ENOENT;
-
-        per_cpu(cpuid4_info, cpu) = kzalloc(
-            sizeof(struct _cpuid4_info) * num_cache_leaves, GFP_KERNEL);
-        if (per_cpu(cpuid4_info, cpu) == NULL)
-                return -ENOMEM;
-
-        oldmask = current->cpus_allowed;
-        retval = set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
-        if (retval)
-                goto out;
+        int j, *retval = _retval, cpu = smp_processor_id();
 
         /* Do cpuid and store the results */
         for (j = 0; j < num_cache_leaves; j++) {
+                struct _cpuid4_info *this_leaf;
                 this_leaf = CPUID4_INFO_IDX(cpu, j);
-                retval = cpuid4_cache_lookup(j, this_leaf);
-                if (unlikely(retval < 0)) {
+                *retval = cpuid4_cache_lookup(j, this_leaf);
+                if (unlikely(*retval < 0)) {
                         int i;
 
                         for (i = 0; i < j; i++)
@@ -567,9 +552,21 @@ static int __cpuinit detect_cache_attributes(unsigned int cpu)
                 }
                 cache_shared_cpu_map_setup(cpu, j);
         }
-        set_cpus_allowed_ptr(current, &oldmask);
+}
+
+static int __cpuinit detect_cache_attributes(unsigned int cpu)
+{
+        int                     retval;
+
+        if (num_cache_leaves == 0)
+                return -ENOENT;
 
-out:
+        per_cpu(cpuid4_info, cpu) = kzalloc(
+            sizeof(struct _cpuid4_info) * num_cache_leaves, GFP_KERNEL);
+        if (per_cpu(cpuid4_info, cpu) == NULL)
+                return -ENOMEM;
+
+        smp_call_function_single(cpu, get_cpu_leaves, &retval, true);
         if (retval) {
                 kfree(per_cpu(cpuid4_info, cpu));
                 per_cpu(cpuid4_info, cpu) = NULL;
@@ -626,8 +623,8 @@ static ssize_t show_shared_cpu_map_func(struct _cpuid4_info *this_leaf,
                 cpumask_t *mask = &this_leaf->shared_cpu_map;
 
                 n = type?
-                        cpulist_scnprintf(buf, len-2, *mask):
-                        cpumask_scnprintf(buf, len-2, *mask);
+                        cpulist_scnprintf(buf, len-2, mask) :
+                        cpumask_scnprintf(buf, len-2, mask);
                 buf[n++] = '\n';
                 buf[n] = '\0';
         }
@@ -644,20 +641,17 @@ static inline ssize_t show_shared_cpu_list(struct _cpuid4_info *leaf, char *buf)
         return show_shared_cpu_map_func(leaf, 1, buf);
 }
 
-static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) {
-        switch(this_leaf->eax.split.type) {
-            case CACHE_TYPE_DATA:
+static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf)
+{
+        switch (this_leaf->eax.split.type) {
+        case CACHE_TYPE_DATA:
                 return sprintf(buf, "Data\n");
-                break;
-            case CACHE_TYPE_INST:
+        case CACHE_TYPE_INST:
                 return sprintf(buf, "Instruction\n");
-                break;
-            case CACHE_TYPE_UNIFIED:
+        case CACHE_TYPE_UNIFIED:
                 return sprintf(buf, "Unified\n");
-                break;
-            default:
+        default:
                 return sprintf(buf, "Unknown\n");
-                break;
         }
 }
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index 5eb390a4b2e9..a5a5e0530370 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -83,34 +83,41 @@ static DEFINE_PER_CPU(unsigned char, bank_map);	/* see which banks are on */
  * CPU Initialization
  */
 
+struct thresh_restart {
+        struct threshold_block *b;
+        int reset;
+        u16 old_limit;
+};
+
 /* must be called with correct cpu affinity */
-static void threshold_restart_bank(struct threshold_block *b,
-                                   int reset, u16 old_limit)
+static long threshold_restart_bank(void *_tr)
 {
+        struct thresh_restart *tr = _tr;
         u32 mci_misc_hi, mci_misc_lo;
 
-        rdmsr(b->address, mci_misc_lo, mci_misc_hi);
+        rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
 
-        if (b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
-                reset = 1;      /* limit cannot be lower than err count */
+        if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
+                tr->reset = 1;  /* limit cannot be lower than err count */
 
-        if (reset) {            /* reset err count and overflow bit */
+        if (tr->reset) {                /* reset err count and overflow bit */
                 mci_misc_hi =
                     (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
-                    (THRESHOLD_MAX - b->threshold_limit);
-        } else if (old_limit) { /* change limit w/o reset */
+                    (THRESHOLD_MAX - tr->b->threshold_limit);
+        } else if (tr->old_limit) {     /* change limit w/o reset */
                 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
-                    (old_limit - b->threshold_limit);
+                    (tr->old_limit - tr->b->threshold_limit);
                 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
                     (new_count & THRESHOLD_MAX);
         }
 
-        b->interrupt_enable ?
+        tr->b->interrupt_enable ?
             (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
             (mci_misc_hi &= ~MASK_INT_TYPE_HI);
 
         mci_misc_hi |= MASK_COUNT_EN_HI;
-        wrmsr(b->address, mci_misc_lo, mci_misc_hi);
+        wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
+        return 0;
 }
 
 /* cpu init entry point, called from mce.c with preempt off */
@@ -120,6 +127,7 @@ void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
         unsigned int cpu = smp_processor_id();
         u8 lvt_off;
         u32 low = 0, high = 0, address = 0;
+        struct thresh_restart tr;
 
         for (bank = 0; bank < NR_BANKS; ++bank) {
                 for (block = 0; block < NR_BLOCKS; ++block) {
@@ -162,7 +170,10 @@ void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
                         wrmsr(address, low, high);
 
                         threshold_defaults.address = address;
-                        threshold_restart_bank(&threshold_defaults, 0, 0);
+                        tr.b = &threshold_defaults;
+                        tr.reset = 0;
+                        tr.old_limit = 0;
+                        threshold_restart_bank(&tr);
                 }
         }
 }
@@ -237,7 +248,7 @@ asmlinkage void mce_threshold_interrupt(void)
                 }
         }
 out:
-        add_pda(irq_threshold_count, 1);
+        inc_irq_stat(irq_threshold_count);
         irq_exit();
 }
 
@@ -251,20 +262,6 @@ struct threshold_attr {
         ssize_t(*store) (struct threshold_block *, const char *, size_t count);
 };
 
-static void affinity_set(unsigned int cpu, cpumask_t *oldmask,
-                                           cpumask_t *newmask)
-{
-        *oldmask = current->cpus_allowed;
-        cpus_clear(*newmask);
-        cpu_set(cpu, *newmask);
-        set_cpus_allowed_ptr(current, newmask);
-}
-
-static void affinity_restore(const cpumask_t *oldmask)
-{
-        set_cpus_allowed_ptr(current, oldmask);
-}
-
 #define SHOW_FIELDS(name)                                           \
 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
 {                                                                   \
@@ -277,15 +274,16 @@ static ssize_t store_interrupt_enable(struct threshold_block *b,
                                       const char *buf, size_t count)
 {
         char *end;
-        cpumask_t oldmask, newmask;
+        struct thresh_restart tr;
         unsigned long new = simple_strtoul(buf, &end, 0);
         if (end == buf)
                 return -EINVAL;
         b->interrupt_enable = !!new;
 
-        affinity_set(b->cpu, &oldmask, &newmask);
-        threshold_restart_bank(b, 0, 0);
-        affinity_restore(&oldmask);
+        tr.b = b;
+        tr.reset = 0;
+        tr.old_limit = 0;
+        work_on_cpu(b->cpu, threshold_restart_bank, &tr);
 
         return end - buf;
 }
@@ -294,8 +292,7 @@ static ssize_t store_threshold_limit(struct threshold_block *b,
                                      const char *buf, size_t count)
 {
         char *end;
-        cpumask_t oldmask, newmask;
-        u16 old;
+        struct thresh_restart tr;
         unsigned long new = simple_strtoul(buf, &end, 0);
         if (end == buf)
                 return -EINVAL;
@@ -303,34 +300,36 @@ static ssize_t store_threshold_limit(struct threshold_block *b,
                 new = THRESHOLD_MAX;
         if (new < 1)
                 new = 1;
-        old = b->threshold_limit;
+        tr.old_limit = b->threshold_limit;
         b->threshold_limit = new;
+        tr.b = b;
+        tr.reset = 0;
 
-        affinity_set(b->cpu, &oldmask, &newmask);
-        threshold_restart_bank(b, 0, old);
-        affinity_restore(&oldmask);
+        work_on_cpu(b->cpu, threshold_restart_bank, &tr);
 
         return end - buf;
 }
 
-static ssize_t show_error_count(struct threshold_block *b, char *buf)
+static long local_error_count(void *_b)
 {
-        u32 high, low;
-        cpumask_t oldmask, newmask;
-        affinity_set(b->cpu, &oldmask, &newmask);
+        struct threshold_block *b = _b;
+        u32 low, high;
+
         rdmsr(b->address, low, high);
-        affinity_restore(&oldmask);
-        return sprintf(buf, "%x\n",
-                       (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit));
+        return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
+}
+
+static ssize_t show_error_count(struct threshold_block *b, char *buf)
+{
+        return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
 }
 
 static ssize_t store_error_count(struct threshold_block *b,
                                  const char *buf, size_t count)
 {
-        cpumask_t oldmask, newmask;
-        affinity_set(b->cpu, &oldmask, &newmask);
-        threshold_restart_bank(b, 1, 0);
-        affinity_restore(&oldmask);
+        struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
+
+        work_on_cpu(b->cpu, threshold_restart_bank, &tr);
         return 1;
 }
 
@@ -463,12 +462,19 @@ out_free:
         return err;
 }
 
+static long local_allocate_threshold_blocks(void *_bank)
+{
+        unsigned int *bank = _bank;
+
+        return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
+                                         MSR_IA32_MC0_MISC + *bank * 4);
+}
+
 /* symlinks sibling shared banks to first core.  first core owns dir/files. */
 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 {
         int i, err = 0;
         struct threshold_bank *b = NULL;
-        cpumask_t oldmask, newmask;
         char name[32];
 
         sprintf(name, "threshold_bank%i", bank);
@@ -519,11 +525,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
         per_cpu(threshold_banks, cpu)[bank] = b;
 
-        affinity_set(cpu, &oldmask, &newmask);
-        err = allocate_threshold_blocks(cpu, bank, 0,
-                                        MSR_IA32_MC0_MISC + bank * 4);
-        affinity_restore(&oldmask);
-
+        err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
         if (err)
                 goto out_free;
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index c17eaf5dd6dd..4b48f251fd39 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -26,7 +26,7 @@ asmlinkage void smp_thermal_interrupt(void)
         if (therm_throt_process(msr_val & 1))
                 mce_log_therm_throt_event(smp_processor_id(), msr_val);
 
-        add_pda(irq_thermal_count, 1);
+        inc_irq_stat(irq_thermal_count);
         irq_exit();
 }
 
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 4e8d77f01eeb..b59ddcc88cd8 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -14,14 +14,6 @@
 #include <asm/pat.h>
 #include "mtrr.h"
 
-struct mtrr_state {
-        struct mtrr_var_range var_ranges[MAX_VAR_RANGES];
-        mtrr_type fixed_ranges[NUM_FIXED_RANGES];
-        unsigned char enabled;
-        unsigned char have_fixed;
-        mtrr_type def_type;
-};
-
 struct fixed_range_block {
         int base_msr; /* start address of an MTRR block */
         int ranges;   /* number of MTRRs in this block  */
@@ -35,10 +27,12 @@ static struct fixed_range_block fixed_range_blocks[] = {
 };
 
 static unsigned long smp_changes_mask;
-static struct mtrr_state mtrr_state = {};
 static int mtrr_state_set;
 u64 mtrr_tom2;
 
+struct mtrr_state_type mtrr_state = {};
+EXPORT_SYMBOL_GPL(mtrr_state);
+
 #undef MODULE_PARAM_PREFIX
 #define MODULE_PARAM_PREFIX "mtrr."
 
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index c78c04821ea1..d259e5d2e054 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -49,7 +49,7 @@
 
 u32 num_var_ranges = 0;
 
-unsigned int mtrr_usage_table[MAX_VAR_RANGES];
+unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];
 static DEFINE_MUTEX(mtrr_mutex);
 
 u64 size_or_mask, size_and_mask;
@@ -574,7 +574,7 @@ struct mtrr_value {
         unsigned long   lsize;
 };
 
-static struct mtrr_value mtrr_state[MAX_VAR_RANGES];
+static struct mtrr_value mtrr_state[MTRR_MAX_VAR_RANGES];
 
 static int mtrr_save(struct sys_device * sysdev, pm_message_t state)
 {
@@ -803,6 +803,7 @@ x86_get_mtrr_mem_range(struct res_range *range, int nr_range,
 }
 
 static struct res_range __initdata range[RANGE_NUM];
+static int __initdata nr_range;
 
 #ifdef CONFIG_MTRR_SANITIZER
 
@@ -823,16 +824,14 @@ static int enable_mtrr_cleanup __initdata =
 
 static int __init disable_mtrr_cleanup_setup(char *str)
 {
-        if (enable_mtrr_cleanup != -1)
-                enable_mtrr_cleanup = 0;
+        enable_mtrr_cleanup = 0;
         return 0;
 }
 early_param("disable_mtrr_cleanup", disable_mtrr_cleanup_setup);
 
 static int __init enable_mtrr_cleanup_setup(char *str)
 {
-        if (enable_mtrr_cleanup != -1)
-                enable_mtrr_cleanup = 1;
+        enable_mtrr_cleanup = 1;
         return 0;
 }
 early_param("enable_mtrr_cleanup", enable_mtrr_cleanup_setup);
@@ -1206,39 +1205,43 @@ struct mtrr_cleanup_result {
 #define PSHIFT          (PAGE_SHIFT - 10)
 
 static struct mtrr_cleanup_result __initdata result[NUM_RESULT];
-static struct res_range __initdata range_new[RANGE_NUM];
 static unsigned long __initdata min_loss_pfn[RANGE_NUM];
 
-static int __init mtrr_cleanup(unsigned address_bits)
+static void __init print_out_mtrr_range_state(void)
 {
-        unsigned long extra_remove_base, extra_remove_size;
-        unsigned long base, size, def, dummy;
-        mtrr_type type;
-        int nr_range, nr_range_new;
-        u64 chunk_size, gran_size;
-        unsigned long range_sums, range_sums_new;
-        int index_good;
-        int num_reg_good;
         int i;
+        char start_factor = 'K', size_factor = 'K';
+        unsigned long start_base, size_base;
+        mtrr_type type;
 
-        /* extra one for all 0 */
-        int num[MTRR_NUM_TYPES + 1];
+        for (i = 0; i < num_var_ranges; i++) {
 
-        if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1)
-                return 0;
-        rdmsr(MTRRdefType_MSR, def, dummy);
-        def &= 0xff;
-        if (def != MTRR_TYPE_UNCACHABLE)
-                return 0;
+                size_base = range_state[i].size_pfn << (PAGE_SHIFT - 10);
+                if (!size_base)
+                        continue;
 
-        /* get it and store it aside */
-        memset(range_state, 0, sizeof(range_state));
-        for (i = 0; i < num_var_ranges; i++) {
-                mtrr_if->get(i, &base, &size, &type);
-                range_state[i].base_pfn = base;
-                range_state[i].size_pfn = size;
-                range_state[i].type = type;
+                size_base = to_size_factor(size_base, &size_factor),
+                start_base = range_state[i].base_pfn << (PAGE_SHIFT - 10);
+                start_base = to_size_factor(start_base, &start_factor),
+                type = range_state[i].type;
+
+                printk(KERN_DEBUG "reg %d, base: %ld%cB, range: %ld%cB, type %s\n",
+                        i, start_base, start_factor,
+                        size_base, size_factor,
+                        (type == MTRR_TYPE_UNCACHABLE) ? "UC" :
+                            ((type == MTRR_TYPE_WRPROT) ? "WP" :
+                             ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other"))
+                        );
         }
+}
+
+static int __init mtrr_need_cleanup(void)
+{
+        int i;
+        mtrr_type type;
+        unsigned long size;
+        /* extra one for all 0 */
+        int num[MTRR_NUM_TYPES + 1];
 
         /* check entries number */
         memset(num, 0, sizeof(num));
@@ -1263,29 +1266,133 @@ static int __init mtrr_cleanup(unsigned address_bits)
                 num_var_ranges - num[MTRR_NUM_TYPES])
                 return 0;
 
-        /* print original var MTRRs at first, for debugging: */
-        printk(KERN_DEBUG "original variable MTRRs\n");
-        for (i = 0; i < num_var_ranges; i++) {
-                char start_factor = 'K', size_factor = 'K';
-                unsigned long start_base, size_base;
+        return 1;
+}
 
-                size_base = range_state[i].size_pfn << (PAGE_SHIFT - 10);
-                if (!size_base)
-                        continue;
+static unsigned long __initdata range_sums;
+static void __init mtrr_calc_range_state(u64 chunk_size, u64 gran_size,
+                                         unsigned long extra_remove_base,
+                                         unsigned long extra_remove_size,
+                                         int i)
+{
+        int num_reg;
+        static struct res_range range_new[RANGE_NUM];
+        static int nr_range_new;
+        unsigned long range_sums_new;
+
+        /* convert ranges to var ranges state */
+        num_reg = x86_setup_var_mtrrs(range, nr_range,
+                                                chunk_size, gran_size);
+
+        /* we got new setting in range_state, check it */
+        memset(range_new, 0, sizeof(range_new));
+        nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
+                                extra_remove_base, extra_remove_size);
+        range_sums_new = sum_ranges(range_new, nr_range_new);
+
+        result[i].chunk_sizek = chunk_size >> 10;
+        result[i].gran_sizek = gran_size >> 10;
+        result[i].num_reg = num_reg;
+        if (range_sums < range_sums_new) {
+                result[i].lose_cover_sizek =
+                        (range_sums_new - range_sums) << PSHIFT;
+                result[i].bad = 1;
+        } else
+                result[i].lose_cover_sizek =
+                        (range_sums - range_sums_new) << PSHIFT;
 
-                size_base = to_size_factor(size_base, &size_factor),
-                start_base = range_state[i].base_pfn << (PAGE_SHIFT - 10);
-                start_base = to_size_factor(start_base, &start_factor),
-                type = range_state[i].type;
+        /* double check it */
+        if (!result[i].bad && !result[i].lose_cover_sizek) {
+                if (nr_range_new != nr_range ||
+                        memcmp(range, range_new, sizeof(range)))
+                                result[i].bad = 1;
+        }
 
-                printk(KERN_DEBUG "reg %d, base: %ld%cB, range: %ld%cB, type %s\n",
-                        i, start_base, start_factor,
-                        size_base, size_factor,
-                        (type == MTRR_TYPE_UNCACHABLE) ? "UC" :
-                            ((type == MTRR_TYPE_WRPROT) ? "WP" :
-                             ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other"))
-                        );
+        if (!result[i].bad && (range_sums - range_sums_new <
+                                min_loss_pfn[num_reg])) {
+                min_loss_pfn[num_reg] =
+                        range_sums - range_sums_new;
         }
+}
+
+static void __init mtrr_print_out_one_result(int i)
+{
+        char gran_factor, chunk_factor, lose_factor;
+        unsigned long gran_base, chunk_base, lose_base;
+
+        gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
+        chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
+        lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
+        printk(KERN_INFO "%sgran_size: %ld%c \tchunk_size: %ld%c \t",
+                        result[i].bad ? "*BAD*" : " ",
+                        gran_base, gran_factor, chunk_base, chunk_factor);
+        printk(KERN_CONT "num_reg: %d  \tlose cover RAM: %s%ld%c\n",
+                        result[i].num_reg, result[i].bad ? "-" : "",
+                        lose_base, lose_factor);
+}
+
+static int __init mtrr_search_optimal_index(void)
+{
+        int i;
+        int num_reg_good;
+        int index_good;
+
+        if (nr_mtrr_spare_reg >= num_var_ranges)
+                nr_mtrr_spare_reg = num_var_ranges - 1;
+        num_reg_good = -1;
+        for (i = num_var_ranges - nr_mtrr_spare_reg; i > 0; i--) {
+                if (!min_loss_pfn[i])
+                        num_reg_good = i;
+        }
+
+        index_good = -1;
+        if (num_reg_good != -1) {
+                for (i = 0; i < NUM_RESULT; i++) {
+                        if (!result[i].bad &&
+                            result[i].num_reg == num_reg_good &&
+                            !result[i].lose_cover_sizek) {
+                                index_good = i;
+                                break;
+                        }
+                }
+        }
+
+        return index_good;
+}
+
+
+static int __init mtrr_cleanup(unsigned address_bits)
+{
+        unsigned long extra_remove_base, extra_remove_size;
+        unsigned long base, size, def, dummy;
+        mtrr_type type;
+        u64 chunk_size, gran_size;
+        int index_good;
+        int i;
+
+        if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1)
+                return 0;
+        rdmsr(MTRRdefType_MSR, def, dummy);
+        def &= 0xff;
+        if (def != MTRR_TYPE_UNCACHABLE)
+                return 0;
+
+        /* get it and store it aside */
+        memset(range_state, 0, sizeof(range_state));
+        for (i = 0; i < num_var_ranges; i++) {
+                mtrr_if->get(i, &base, &size, &type);
+                range_state[i].base_pfn = base;
+                range_state[i].size_pfn = size;
+                range_state[i].type = type;
+        }
+
+        /* check if we need handle it and can handle it */
+        if (!mtrr_need_cleanup())
+                return 0;
+
+        /* print original var MTRRs at first, for debugging: */
+        printk(KERN_DEBUG "original variable MTRRs\n");
+        print_out_mtrr_range_state();
 
         memset(range, 0, sizeof(range));
         extra_remove_size = 0;
@@ -1309,176 +1416,64 @@ static int __init mtrr_cleanup(unsigned address_bits)
                range_sums >> (20 - PAGE_SHIFT));
 
         if (mtrr_chunk_size && mtrr_gran_size) {
-                int num_reg;
-                char gran_factor, chunk_factor, lose_factor;
-                unsigned long gran_base, chunk_base, lose_base;
-
-                debug_print++;
-                /* convert ranges to var ranges state */
-                num_reg = x86_setup_var_mtrrs(range, nr_range, mtrr_chunk_size,
-                                              mtrr_gran_size);
+                i = 0;
+                mtrr_calc_range_state(mtrr_chunk_size, mtrr_gran_size,
+                                      extra_remove_base, extra_remove_size, i);
 
-                /* we got new setting in range_state, check it */
-                memset(range_new, 0, sizeof(range_new));
-                nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
-                                                      extra_remove_base,
-                                                      extra_remove_size);
-                range_sums_new = sum_ranges(range_new, nr_range_new);
+                mtrr_print_out_one_result(i);
 
-                i = 0;
-                result[i].chunk_sizek = mtrr_chunk_size >> 10;
-                result[i].gran_sizek = mtrr_gran_size >> 10;
-                result[i].num_reg = num_reg;
-                if (range_sums < range_sums_new) {
-                        result[i].lose_cover_sizek =
-                                (range_sums_new - range_sums) << PSHIFT;
-                        result[i].bad = 1;
-                } else
-                        result[i].lose_cover_sizek =
-                                (range_sums - range_sums_new) << PSHIFT;
-
-                gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
-                chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
-                lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
-                printk(KERN_INFO "%sgran_size: %ld%c \tchunk_size: %ld%c \t",
-                         result[i].bad?"*BAD*":" ",
-                         gran_base, gran_factor, chunk_base, chunk_factor);
-                printk(KERN_CONT "num_reg: %d  \tlose cover RAM: %s%ld%c\n",
-                         result[i].num_reg, result[i].bad?"-":"",
-                         lose_base, lose_factor);
                 if (!result[i].bad) {
                         set_var_mtrr_all(address_bits);
                         return 1;
                 }
                 printk(KERN_INFO "invalid mtrr_gran_size or mtrr_chunk_size, "
                        "will find optimal one\n");
-                debug_print--;
-                memset(result, 0, sizeof(result[0]));
         }
 
         i = 0;
         memset(min_loss_pfn, 0xff, sizeof(min_loss_pfn));
         memset(result, 0, sizeof(result));
         for (gran_size = (1ULL<<16); gran_size < (1ULL<<32); gran_size <<= 1) {
-                char gran_factor;
-                unsigned long gran_base;
-
-                if (debug_print)
-                        gran_base = to_size_factor(gran_size >> 10, &gran_factor);
 
                 for (chunk_size = gran_size; chunk_size < (1ULL<<32);
                      chunk_size <<= 1) {
-                        int num_reg;
 
-                        if (debug_print) {
-                                char chunk_factor;
-                                unsigned long chunk_base;
-
-                                chunk_base = to_size_factor(chunk_size>>10, &chunk_factor),
-                                printk(KERN_INFO "\n");
-                                printk(KERN_INFO "gran_size: %ld%c   chunk_size: %ld%c \n",
-                                       gran_base, gran_factor, chunk_base, chunk_factor);
-                        }
                         if (i >= NUM_RESULT)
                                 continue;
 
-                        /* convert ranges to var ranges state */
-                        num_reg = x86_setup_var_mtrrs(range, nr_range,
-                                                         chunk_size, gran_size);
-
-                        /* we got new setting in range_state, check it */
-                        memset(range_new, 0, sizeof(range_new));
-                        nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
-                                         extra_remove_base, extra_remove_size);
-                        range_sums_new = sum_ranges(range_new, nr_range_new);
-
-                        result[i].chunk_sizek = chunk_size >> 10;
-                        result[i].gran_sizek = gran_size >> 10;
-                        result[i].num_reg = num_reg;
-                        if (range_sums < range_sums_new) {
-                                result[i].lose_cover_sizek =
-                                        (range_sums_new - range_sums) << PSHIFT;
-                                result[i].bad = 1;
-                        } else
-                                result[i].lose_cover_sizek =
-                                        (range_sums - range_sums_new) << PSHIFT;
-
-                        /* double check it */
-                        if (!result[i].bad && !result[i].lose_cover_sizek) {
-                                if (nr_range_new != nr_range ||
-                                        memcmp(range, range_new, sizeof(range)))
-                                                result[i].bad = 1;
+                        mtrr_calc_range_state(chunk_size, gran_size,
+                                      extra_remove_base, extra_remove_size, i);
+                        if (debug_print) {
+                                mtrr_print_out_one_result(i);
+                                printk(KERN_INFO "\n");
                         }
 
-                        if (!result[i].bad && (range_sums - range_sums_new <
-                                               min_loss_pfn[num_reg])) {
-                                min_loss_pfn[num_reg] =
-                                        range_sums - range_sums_new;
-                        }
                         i++;
                 }
         }
 
-        /* print out all */
-        for (i = 0; i < NUM_RESULT; i++) {
-                char gran_factor, chunk_factor, lose_factor;
-                unsigned long gran_base, chunk_base, lose_base;
-
-                gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
-                chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
-                lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
-                printk(KERN_INFO "%sgran_size: %ld%c \tchunk_size: %ld%c \t",
-                         result[i].bad?"*BAD*":" ",
-                         gran_base, gran_factor, chunk_base, chunk_factor);
-                printk(KERN_CONT "num_reg: %d  \tlose cover RAM: %s%ld%c\n",
-                         result[i].num_reg, result[i].bad?"-":"",
-                         lose_base, lose_factor);
-        }
-
         /* try to find the optimal index */
-        if (nr_mtrr_spare_reg >= num_var_ranges)
-                nr_mtrr_spare_reg = num_var_ranges - 1;
-        num_reg_good = -1;
-        for (i = num_var_ranges - nr_mtrr_spare_reg; i > 0; i--) {
-                if (!min_loss_pfn[i])
-                        num_reg_good = i;
-        }
-
-        index_good = -1;
-        if (num_reg_good != -1) {
-                for (i = 0; i < NUM_RESULT; i++) {
-                        if (!result[i].bad &&
-                            result[i].num_reg == num_reg_good &&
-                            !result[i].lose_cover_sizek) {
-                                index_good = i;
-                                break;
-                        }
-                }
-        }
+        index_good = mtrr_search_optimal_index();
 
         if (index_good != -1) {
-                char gran_factor, chunk_factor, lose_factor;
-                unsigned long gran_base, chunk_base, lose_base;
-
                 printk(KERN_INFO "Found optimal setting for mtrr clean up\n");
                 i = index_good;
-                gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
-                chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
-                lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
-                printk(KERN_INFO "gran_size: %ld%c \tchunk_size: %ld%c \t",
-                         gran_base, gran_factor, chunk_base, chunk_factor);
-                printk(KERN_CONT "num_reg: %d  \tlose RAM: %ld%c\n",
-                         result[i].num_reg, lose_base, lose_factor);
+                mtrr_print_out_one_result(i);
+
                 /* convert ranges to var ranges state */
                 chunk_size = result[i].chunk_sizek;
                 chunk_size <<= 10;
                 gran_size = result[i].gran_sizek;
                 gran_size <<= 10;
-                debug_print++;
                 x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size);
-                debug_print--;
                 set_var_mtrr_all(address_bits);
+                printk(KERN_DEBUG "New variable MTRRs\n");
+                print_out_mtrr_range_state();
                 return 1;
+        } else {
+                /* print out all */
+                for (i = 0; i < NUM_RESULT; i++)
+                        mtrr_print_out_one_result(i);
         }
 
         printk(KERN_INFO "mtrr_cleanup: can not find optimal value\n");
@@ -1562,7 +1557,6 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
 {
         unsigned long i, base, size, highest_pfn = 0, def, dummy;
         mtrr_type type;
-        int nr_range;
         u64 total_trim_size;
 
         /* extra one for all 0 */
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h
index 2dc4ec656b23..ffd60409cc6d 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.h
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.h
@@ -8,11 +8,6 @@
 #define MTRRcap_MSR     0x0fe
 #define MTRRdefType_MSR 0x2ff
 
-#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
-#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
-
-#define NUM_FIXED_RANGES 88
-#define MAX_VAR_RANGES 256
 #define MTRRfix64K_00000_MSR 0x250
 #define MTRRfix16K_80000_MSR 0x258
 #define MTRRfix16K_A0000_MSR 0x259
@@ -29,11 +24,7 @@
 #define MTRR_CHANGE_MASK_VARIABLE  0x02
 #define MTRR_CHANGE_MASK_DEFTYPE   0x04
 
-/* In the Intel processor's MTRR interface, the MTRR type is always held in
-   an 8 bit field: */
-typedef u8 mtrr_type;
-
-extern unsigned int mtrr_usage_table[MAX_VAR_RANGES];
+extern unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];
 
 struct mtrr_ops {
         u32     vendor;
@@ -70,13 +61,6 @@ struct set_mtrr_context {
         u32 ccr3;
 };
 
-struct mtrr_var_range {
-        u32 base_lo;
-        u32 base_hi;
-        u32 mask_lo;
-        u32 mask_hi;
-};
-
 void set_mtrr_done(struct set_mtrr_context *ctxt);
 void set_mtrr_cache_disable(struct set_mtrr_context *ctxt);
 void set_mtrr_prepare_save(struct set_mtrr_context *ctxt);
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
new file mode 100644
index 000000000000..284c399e3234
--- /dev/null
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -0,0 +1,112 @@
+/*
+ * VMware Detection code.
+ *
+ * Copyright (C) 2008, VMware, Inc.
+ * Author : Alok N Kataria <akataria@vmware.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <linux/dmi.h>
+#include <asm/div64.h>
+#include <asm/vmware.h>
+
+#define CPUID_VMWARE_INFO_LEAF  0x40000000
+#define VMWARE_HYPERVISOR_MAGIC 0x564D5868
+#define VMWARE_HYPERVISOR_PORT  0x5658
+
+#define VMWARE_PORT_CMD_GETVERSION      10
+#define VMWARE_PORT_CMD_GETHZ           45
+
+#define VMWARE_PORT(cmd, eax, ebx, ecx, edx)                            \
+        __asm__("inl (%%dx)" :                                          \
+                        "=a"(eax), "=c"(ecx), "=d"(edx), "=b"(ebx) :    \
+                        "0"(VMWARE_HYPERVISOR_MAGIC),                   \
+                        "1"(VMWARE_PORT_CMD_##cmd),                     \
+                        "2"(VMWARE_HYPERVISOR_PORT), "3"(UINT_MAX) :    \
+                        "memory");
+
+static inline int __vmware_platform(void)
+{
+        uint32_t eax, ebx, ecx, edx;
+        VMWARE_PORT(GETVERSION, eax, ebx, ecx, edx);
+        return eax != (uint32_t)-1 && ebx == VMWARE_HYPERVISOR_MAGIC;
+}
+
+static unsigned long __vmware_get_tsc_khz(void)
+{
+        uint64_t tsc_hz;
+        uint32_t eax, ebx, ecx, edx;
+
+        VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
+
+        if (ebx == UINT_MAX)
+                return 0;
+        tsc_hz = eax | (((uint64_t)ebx) << 32);
+        do_div(tsc_hz, 1000);
+        BUG_ON(tsc_hz >> 32);
+        return tsc_hz;
+}
+
+/*
+ * While checking the dmi string infomation, just checking the product
+ * serial key should be enough, as this will always have a VMware
+ * specific string when running under VMware hypervisor.
+ */
+int vmware_platform(void)
+{
+        if (cpu_has_hypervisor) {
+                unsigned int eax, ebx, ecx, edx;
+                char hyper_vendor_id[13];
+
+                cpuid(CPUID_VMWARE_INFO_LEAF, &eax, &ebx, &ecx, &edx);
+                memcpy(hyper_vendor_id + 0, &ebx, 4);
+                memcpy(hyper_vendor_id + 4, &ecx, 4);
+                memcpy(hyper_vendor_id + 8, &edx, 4);
+                hyper_vendor_id[12] = '\0';
+                if (!strcmp(hyper_vendor_id, "VMwareVMware"))
+                        return 1;
+        } else if (dmi_available && dmi_name_in_serial("VMware") &&
+                   __vmware_platform())
+                return 1;
+
+        return 0;
+}
+
+unsigned long vmware_get_tsc_khz(void)
+{
+        BUG_ON(!vmware_platform());
+        return __vmware_get_tsc_khz();
+}
+
+/*
+ * VMware hypervisor takes care of exporting a reliable TSC to the guest.
+ * Still, due to timing difference when running on virtual cpus, the TSC can
+ * be marked as unstable in some cases. For example, the TSC sync check at
+ * bootup can fail due to a marginal offset between vcpus' TSCs (though the
+ * TSCs do not drift from each other).  Also, the ACPI PM timer clocksource
+ * is not suitable as a watchdog when running on a hypervisor because the
+ * kernel may miss a wrap of the counter if the vcpu is descheduled for a
+ * long time. To skip these checks at runtime we set these capability bits,
+ * so that the kernel could just trust the hypervisor with providing a
+ * reliable virtual TSC that is suitable for timekeeping.
+ */
+void __cpuinit vmware_set_feature_bits(struct cpuinfo_x86 *c)
+{
+        set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
+        set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
+}
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 72cefd1e649b..2ac1f0c2beb3 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -39,10 +39,10 @@
 #include <linux/device.h>
 #include <linux/cpu.h>
 #include <linux/notifier.h>
+#include <linux/uaccess.h>
 
 #include <asm/processor.h>
 #include <asm/msr.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 static struct class *cpuid_class;
@@ -82,7 +82,7 @@ static loff_t cpuid_seek(struct file *file, loff_t offset, int orig)
 }
 
 static ssize_t cpuid_read(struct file *file, char __user *buf,
-                          size_t count, loff_t * ppos)
+                          size_t count, loff_t *ppos)
 {
         char __user *tmp = buf;
         struct cpuid_regs cmd;
@@ -117,11 +117,11 @@ static int cpuid_open(struct inode *inode, struct file *file)
         unsigned int cpu;
         struct cpuinfo_x86 *c;
         int ret = 0;
-        
+
         lock_kernel();
 
         cpu = iminor(file->f_path.dentry->d_inode);
-        if (cpu >= NR_CPUS || !cpu_online(cpu)) {
+        if (cpu >= nr_cpu_ids || !cpu_online(cpu)) {
                 ret = -ENXIO;   /* No such CPU */
                 goto out;
         }
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index 268553817909..c689d19e35ab 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -26,37 +26,21 @@
 #include <linux/kdebug.h>
 #include <asm/smp.h>
 #include <asm/reboot.h>
+#include <asm/virtext.h>
 
 #include <mach_ipi.h>
 
-/* This keeps a track of which one is crashing cpu. */
-static int crashing_cpu;
 
 #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
-static atomic_t waiting_for_crash_ipi;
 
-static int crash_nmi_callback(struct notifier_block *self,
-                        unsigned long val, void *data)
+static void kdump_nmi_callback(int cpu, struct die_args *args)
 {
         struct pt_regs *regs;
 #ifdef CONFIG_X86_32
         struct pt_regs fixed_regs;
 #endif
-        int cpu;
 
-        if (val != DIE_NMI_IPI)
-                return NOTIFY_OK;
-
-        regs = ((struct die_args *)data)->regs;
-        cpu = raw_smp_processor_id();
-
-        /* Don't do anything if this handler is invoked on crashing cpu.
-         * Otherwise, system will completely hang. Crashing cpu can get
-         * an NMI if system was initially booted with nmi_watchdog parameter.
-         */
-        if (cpu == crashing_cpu)
-                return NOTIFY_STOP;
-        local_irq_disable();
+        regs = args->regs;
 
 #ifdef CONFIG_X86_32
         if (!user_mode_vm(regs)) {
@@ -65,54 +49,28 @@ static int crash_nmi_callback(struct notifier_block *self,
         }
 #endif
         crash_save_cpu(regs, cpu);
-        disable_local_APIC();
-        atomic_dec(&waiting_for_crash_ipi);
-        /* Assume hlt works */
-        halt();
-        for (;;)
-                cpu_relax();
 
-        return 1;
-}
+        /* Disable VMX or SVM if needed.
+         *
+         * We need to disable virtualization on all CPUs.
+         * Having VMX or SVM enabled on any CPU may break rebooting
+         * after the kdump kernel has finished its task.
+         */
+        cpu_emergency_vmxoff();
+        cpu_emergency_svm_disable();
 
-static void smp_send_nmi_allbutself(void)
-{
-        cpumask_t mask = cpu_online_map;
-        cpu_clear(safe_smp_processor_id(), mask);
-        if (!cpus_empty(mask))
-                send_IPI_mask(mask, NMI_VECTOR);
+        disable_local_APIC();
 }
 
-static struct notifier_block crash_nmi_nb = {
-        .notifier_call = crash_nmi_callback,
-};
-
-static void nmi_shootdown_cpus(void)
+static void kdump_nmi_shootdown_cpus(void)
 {
-        unsigned long msecs;
-
-        atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
-        /* Would it be better to replace the trap vector here? */
-        if (register_die_notifier(&crash_nmi_nb))
-                return;         /* return what? */
-        /* Ensure the new callback function is set before sending
-         * out the NMI
-         */
-        wmb();
-
-        smp_send_nmi_allbutself();
-
-        msecs = 1000; /* Wait at most a second for the other cpus to stop */
-        while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
-                mdelay(1);
-                msecs--;
-        }
+        nmi_shootdown_cpus(kdump_nmi_callback);
 
-        /* Leave the nmi callback set */
         disable_local_APIC();
 }
+
 #else
-static void nmi_shootdown_cpus(void)
+static void kdump_nmi_shootdown_cpus(void)
 {
         /* There are no cpus to shootdown */
 }
@@ -131,9 +89,15 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
         /* The kernel is broken so disable interrupts */
         local_irq_disable();
 
-        /* Make a note of crashing cpu. Will be used in NMI callback.*/
-        crashing_cpu = safe_smp_processor_id();
-        nmi_shootdown_cpus();
+        kdump_nmi_shootdown_cpus();
+
+        /* Booting kdump kernel with VMX or SVM enabled won't work,
+         * because (among other limitations) we can't disable paging
+         * with the virt flags.
+         */
+        cpu_emergency_vmxoff();
+        cpu_emergency_svm_disable();
+
         lapic_shutdown();
 #if defined(CONFIG_X86_IO_APIC)
         disable_IO_APIC();
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c
index a2d1176c38ee..da91701a2348 100644
--- a/arch/x86/kernel/ds.c
+++ b/arch/x86/kernel/ds.c
@@ -6,14 +6,13 @@
  * precise-event based sampling (PEBS).
  *
  * It manages:
- * - per-thread and per-cpu allocation of BTS and PEBS
- * - buffer memory allocation (optional)
- * - buffer overflow handling
+ * - DS and BTS hardware configuration
+ * - buffer overflow handling (to be done)
  * - buffer access
  *
- * It assumes:
- * - get_task_struct on all parameter tasks
- * - current is allowed to trace parameter tasks
+ * It does not do:
+ * - security checking (is the caller allowed to trace the task)
+ * - buffer allocation (memory accounting)
  *
  *
  * Copyright (C) 2007-2008 Intel Corporation.
@@ -28,22 +27,69 @@
 #include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/mm.h>
+#include <linux/kernel.h>
 
 
 /*
  * The configuration for a particular DS hardware implementation.
  */
 struct ds_configuration {
-        /* the size of the DS structure in bytes */
-        unsigned char  sizeof_ds;
-        /* the size of one pointer-typed field in the DS structure in bytes;
-           this covers the first 8 fields related to buffer management. */
+        /* the name of the configuration */
+        const char *name;
+        /* the size of one pointer-typed field in the DS structure and
+           in the BTS and PEBS buffers in bytes;
+           this covers the first 8 DS fields related to buffer management. */
         unsigned char  sizeof_field;
         /* the size of a BTS/PEBS record in bytes */
         unsigned char  sizeof_rec[2];
+        /* a series of bit-masks to control various features indexed
+         * by enum ds_feature */
+        unsigned long ctl[dsf_ctl_max];
 };
-static struct ds_configuration ds_cfg;
+static DEFINE_PER_CPU(struct ds_configuration, ds_cfg_array);
 
+#define ds_cfg per_cpu(ds_cfg_array, smp_processor_id())
+
+#define MAX_SIZEOF_DS (12 * 8)  /* maximal size of a DS configuration */
+#define MAX_SIZEOF_BTS (3 * 8)  /* maximal size of a BTS record */
+#define DS_ALIGNMENT (1 << 3)   /* BTS and PEBS buffer alignment */
+
+#define BTS_CONTROL \
+ (ds_cfg.ctl[dsf_bts] | ds_cfg.ctl[dsf_bts_kernel] | ds_cfg.ctl[dsf_bts_user] |\
+  ds_cfg.ctl[dsf_bts_overflow])
+
+
+/*
+ * A BTS or PEBS tracer.
+ *
+ * This holds the configuration of the tracer and serves as a handle
+ * to identify tracers.
+ */
+struct ds_tracer {
+        /* the DS context (partially) owned by this tracer */
+        struct ds_context *context;
+        /* the buffer provided on ds_request() and its size in bytes */
+        void *buffer;
+        size_t size;
+};
+
+struct bts_tracer {
+        /* the common DS part */
+        struct ds_tracer ds;
+        /* the trace including the DS configuration */
+        struct bts_trace trace;
+        /* buffer overflow notification function */
+        bts_ovfl_callback_t ovfl;
+};
+
+struct pebs_tracer {
+        /* the common DS part */
+        struct ds_tracer ds;
+        /* the trace including the DS configuration */
+        struct pebs_trace trace;
+        /* buffer overflow notification function */
+        pebs_ovfl_callback_t ovfl;
+};
 
 /*
  * Debug Store (DS) save area configuration (see Intel64 and IA32
@@ -109,32 +155,9 @@ static inline void ds_set(unsigned char *base, enum ds_qualifier qual,
 
 
 /*
- * Locking is done only for allocating BTS or PEBS resources and for
- * guarding context and buffer memory allocation.
- *
- * Most functions require the current task to own the ds context part
- * they are going to access. All the locking is done when validating
- * access to the context.
+ * Locking is done only for allocating BTS or PEBS resources.
  */
-static spinlock_t ds_lock = __SPIN_LOCK_UNLOCKED(ds_lock);
-
-/*
- * Validate that the current task is allowed to access the BTS/PEBS
- * buffer of the parameter task.
- *
- * Returns 0, if access is granted; -Eerrno, otherwise.
- */
-static inline int ds_validate_access(struct ds_context *context,
-                                     enum ds_qualifier qual)
-{
-        if (!context)
-                return -EPERM;
-
-        if (context->owner[qual] == current)
-                return 0;
-
-        return -EPERM;
-}
+static DEFINE_SPINLOCK(ds_lock);
 
 
 /*
@@ -150,27 +173,32 @@ static inline int ds_validate_access(struct ds_context *context,
  *   >0  number of per-thread tracers
  *   <0  number of per-cpu tracers
  *
- * The below functions to get and put tracers and to check the
- * allocation type require the ds_lock to be held by the caller.
- *
  * Tracers essentially gives the number of ds contexts for a certain
  * type of allocation.
  */
-static long tracers;
+static atomic_t tracers = ATOMIC_INIT(0);
 
 static inline void get_tracer(struct task_struct *task)
 {
-        tracers += (task ? 1 : -1);
+        if (task)
+                atomic_inc(&tracers);
+        else
+                atomic_dec(&tracers);
 }
 
 static inline void put_tracer(struct task_struct *task)
 {
-        tracers -= (task ? 1 : -1);
+        if (task)
+                atomic_dec(&tracers);
+        else
+                atomic_inc(&tracers);
 }
 
 static inline int check_tracer(struct task_struct *task)
 {
-        return (task ? (tracers >= 0) : (tracers <= 0));
+        return task ?
+                (atomic_read(&tracers) >= 0) :
+                (atomic_read(&tracers) <= 0);
 }
 
 
@@ -183,99 +211,70 @@ static inline int check_tracer(struct task_struct *task)
  *
  * Contexts are use-counted. They are allocated on first access and
  * deallocated when the last user puts the context.
- *
- * We distinguish between an allocating and a non-allocating get of a
- * context:
- * - the allocating get is used for requesting BTS/PEBS resources. It
- *   requires the caller to hold the global ds_lock.
- * - the non-allocating get is used for all other cases. A
- *   non-existing context indicates an error. It acquires and releases
- *   the ds_lock itself for obtaining the context.
- *
- * A context and its DS configuration are allocated and deallocated
- * together. A context always has a DS configuration of the
- * appropriate size.
- */
-static DEFINE_PER_CPU(struct ds_context *, system_context);
-
-#define this_system_context per_cpu(system_context, smp_processor_id())
-
-/*
- * Returns the pointer to the parameter task's context or to the
- * system-wide context, if task is NULL.
- *
- * Increases the use count of the returned context, if not NULL.
  */
-static inline struct ds_context *ds_get_context(struct task_struct *task)
-{
-        struct ds_context *context;
-        unsigned long irq;
+struct ds_context {
+        /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
+        unsigned char ds[MAX_SIZEOF_DS];
+        /* the owner of the BTS and PEBS configuration, respectively */
+        struct bts_tracer *bts_master;
+        struct pebs_tracer *pebs_master;
+        /* use count */
+        unsigned long count;
+        /* a pointer to the context location inside the thread_struct
+         * or the per_cpu context array */
+        struct ds_context **this;
+        /* a pointer to the task owning this context, or NULL, if the
+         * context is owned by a cpu */
+        struct task_struct *task;
+};
 
-        spin_lock_irqsave(&ds_lock, irq);
+static DEFINE_PER_CPU(struct ds_context *, system_context_array);
 
-        context = (task ? task->thread.ds_ctx : this_system_context);
-        if (context)
-                context->count++;
+#define system_context per_cpu(system_context_array, smp_processor_id())
 
-        spin_unlock_irqrestore(&ds_lock, irq);
-
-        return context;
-}
 
-/*
- * Same as ds_get_context, but allocates the context and it's DS
- * structure, if necessary; returns NULL; if out of memory.
- */
-static inline struct ds_context *ds_alloc_context(struct task_struct *task)
+static inline struct ds_context *ds_get_context(struct task_struct *task)
 {
         struct ds_context **p_context =
-                (task ? &task->thread.ds_ctx : &this_system_context);
-        struct ds_context *context = *p_context;
+                (task ? &task->thread.ds_ctx : &system_context);
+        struct ds_context *context = NULL;
+        struct ds_context *new_context = NULL;
         unsigned long irq;
 
-        if (!context) {
-                context = kzalloc(sizeof(*context), GFP_KERNEL);
-                if (!context)
-                        return NULL;
-
-                context->ds = kzalloc(ds_cfg.sizeof_ds, GFP_KERNEL);
-                if (!context->ds) {
-                        kfree(context);
-                        return NULL;
-                }
+        /* Chances are small that we already have a context. */
+        new_context = kzalloc(sizeof(*new_context), GFP_KERNEL);
+        if (!new_context)
+                return NULL;
 
-                spin_lock_irqsave(&ds_lock, irq);
+        spin_lock_irqsave(&ds_lock, irq);
 
-                if (*p_context) {
-                        kfree(context->ds);
-                        kfree(context);
+        context = *p_context;
+        if (!context) {
+                context = new_context;
 
-                        context = *p_context;
-                } else {
-                        *p_context = context;
+                context->this = p_context;
+                context->task = task;
+                context->count = 0;
 
-                        context->this = p_context;
-                        context->task = task;
+                if (task)
+                        set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
 
-                        if (task)
-                                set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
+                if (!task || (task == current))
+                        wrmsrl(MSR_IA32_DS_AREA, (unsigned long)context->ds);
 
-                        if (!task || (task == current))
-                                wrmsrl(MSR_IA32_DS_AREA,
-                                       (unsigned long)context->ds);
-                }
-                spin_unlock_irqrestore(&ds_lock, irq);
+                *p_context = context;
         }
 
         context->count++;
 
+        spin_unlock_irqrestore(&ds_lock, irq);
+
+        if (context != new_context)
+                kfree(new_context);
+
         return context;
 }
 
-/*
- * Decreases the use count of the parameter context, if not NULL.
- * Deallocates the context, if the use count reaches zero.
- */
 static inline void ds_put_context(struct ds_context *context)
 {
         unsigned long irq;
@@ -285,8 +284,10 @@ static inline void ds_put_context(struct ds_context *context)
 
         spin_lock_irqsave(&ds_lock, irq);
 
-        if (--context->count)
-                goto out;
+        if (--context->count) {
+                spin_unlock_irqrestore(&ds_lock, irq);
+                return;
+        }
 
         *(context->this) = NULL;
 
@@ -296,135 +297,263 @@ static inline void ds_put_context(struct ds_context *context)
         if (!context->task || (context->task == current))
                 wrmsrl(MSR_IA32_DS_AREA, 0);
 
-        put_tracer(context->task);
+        spin_unlock_irqrestore(&ds_lock, irq);
 
-        /* free any leftover buffers from tracers that did not
-         * deallocate them properly. */
-        kfree(context->buffer[ds_bts]);
-        kfree(context->buffer[ds_pebs]);
-        kfree(context->ds);
         kfree(context);
- out:
-        spin_unlock_irqrestore(&ds_lock, irq);
 }
 
 
 /*
- * Handle a buffer overflow
+ * Call the tracer's callback on a buffer overflow.
  *
- * task: the task whose buffers are overflowing;
- *       NULL for a buffer overflow on the current cpu
  * context: the ds context
  * qual: the buffer type
  */
-static void ds_overflow(struct task_struct *task, struct ds_context *context,
-                        enum ds_qualifier qual)
+static void ds_overflow(struct ds_context *context, enum ds_qualifier qual)
 {
-        if (!context)
-                return;
-
-        if (context->callback[qual])
-                (*context->callback[qual])(task);
-
-        /* todo: do some more overflow handling */
+        switch (qual) {
+        case ds_bts:
+                if (context->bts_master &&
+                    context->bts_master->ovfl)
+                        context->bts_master->ovfl(context->bts_master);
+                break;
+        case ds_pebs:
+                if (context->pebs_master &&
+                    context->pebs_master->ovfl)
+                        context->pebs_master->ovfl(context->pebs_master);
+                break;
+        }
 }
 
 
 /*
- * Allocate a non-pageable buffer of the parameter size.
- * Checks the memory and the locked memory rlimit.
+ * Write raw data into the BTS or PEBS buffer.
  *
- * Returns the buffer, if successful;
- *         NULL, if out of memory or rlimit exceeded.
+ * The remainder of any partially written record is zeroed out.
  *
- * size: the requested buffer size in bytes
- * pages (out): if not NULL, contains the number of pages reserved
+ * context: the DS context
+ * qual: the buffer type
+ * record: the data to write
+ * size: the size of the data
  */
-static inline void *ds_allocate_buffer(size_t size, unsigned int *pages)
+static int ds_write(struct ds_context *context, enum ds_qualifier qual,
+                    const void *record, size_t size)
 {
-        unsigned long rlim, vm, pgsz;
-        void *buffer;
+        int bytes_written = 0;
 
-        pgsz = PAGE_ALIGN(size) >> PAGE_SHIFT;
+        if (!record)
+                return -EINVAL;
 
-        rlim = current->signal->rlim[RLIMIT_AS].rlim_cur >> PAGE_SHIFT;
-        vm   = current->mm->total_vm  + pgsz;
-        if (rlim < vm)
-                return NULL;
+        while (size) {
+                unsigned long base, index, end, write_end, int_th;
+                unsigned long write_size, adj_write_size;
 
-        rlim = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur >> PAGE_SHIFT;
-        vm   = current->mm->locked_vm  + pgsz;
-        if (rlim < vm)
-                return NULL;
+                /*
+                 * write as much as possible without producing an
+                 * overflow interrupt.
+                 *
+                 * interrupt_threshold must either be
+                 * - bigger than absolute_maximum or
+                 * - point to a record between buffer_base and absolute_maximum
+                 *
+                 * index points to a valid record.
+                 */
+                base   = ds_get(context->ds, qual, ds_buffer_base);
+                index  = ds_get(context->ds, qual, ds_index);
+                end    = ds_get(context->ds, qual, ds_absolute_maximum);
+                int_th = ds_get(context->ds, qual, ds_interrupt_threshold);
 
-        buffer = kzalloc(size, GFP_KERNEL);
-        if (!buffer)
-                return NULL;
+                write_end = min(end, int_th);
 
-        current->mm->total_vm  += pgsz;
-        current->mm->locked_vm += pgsz;
+                /* if we are already beyond the interrupt threshold,
+                 * we fill the entire buffer */
+                if (write_end <= index)
+                        write_end = end;
 
-        if (pages)
-                *pages = pgsz;
+                if (write_end <= index)
+                        break;
+
+                write_size = min((unsigned long) size, write_end - index);
+                memcpy((void *)index, record, write_size);
 
-        return buffer;
+                record = (const char *)record + write_size;
+                size -= write_size;
+                bytes_written += write_size;
+
+                adj_write_size = write_size / ds_cfg.sizeof_rec[qual];
+                adj_write_size *= ds_cfg.sizeof_rec[qual];
+
+                /* zero out trailing bytes */
+                memset((char *)index + write_size, 0,
+                       adj_write_size - write_size);
+                index += adj_write_size;
+
+                if (index >= end)
+                        index = base;
+                ds_set(context->ds, qual, ds_index, index);
+
+                if (index >= int_th)
+                        ds_overflow(context, qual);
+        }
+
+        return bytes_written;
 }
 
-static int ds_request(struct task_struct *task, void *base, size_t size,
-                      ds_ovfl_callback_t ovfl, enum ds_qualifier qual)
+
+/*
+ * Branch Trace Store (BTS) uses the following format. Different
+ * architectures vary in the size of those fields.
+ * - source linear address
+ * - destination linear address
+ * - flags
+ *
+ * Later architectures use 64bit pointers throughout, whereas earlier
+ * architectures use 32bit pointers in 32bit mode.
+ *
+ * We compute the base address for the first 8 fields based on:
+ * - the field size stored in the DS configuration
+ * - the relative field position
+ *
+ * In order to store additional information in the BTS buffer, we use
+ * a special source address to indicate that the record requires
+ * special interpretation.
+ *
+ * Netburst indicated via a bit in the flags field whether the branch
+ * was predicted; this is ignored.
+ *
+ * We use two levels of abstraction:
+ * - the raw data level defined here
+ * - an arch-independent level defined in ds.h
+ */
+
+enum bts_field {
+        bts_from,
+        bts_to,
+        bts_flags,
+
+        bts_qual = bts_from,
+        bts_jiffies = bts_to,
+        bts_pid = bts_flags,
+
+        bts_qual_mask = (bts_qual_max - 1),
+        bts_escape = ((unsigned long)-1 & ~bts_qual_mask)
+};
+
+static inline unsigned long bts_get(const char *base, enum bts_field field)
 {
-        struct ds_context *context;
-        unsigned long buffer, adj;
-        const unsigned long alignment = (1 << 3);
-        unsigned long irq;
-        int error = 0;
+        base += (ds_cfg.sizeof_field * field);
+        return *(unsigned long *)base;
+}
+
+static inline void bts_set(char *base, enum bts_field field, unsigned long val)
+{
+        base += (ds_cfg.sizeof_field * field);;
+        (*(unsigned long *)base) = val;
+}
 
-        if (!ds_cfg.sizeof_ds)
-                return -EOPNOTSUPP;
 
-        /* we require some space to do alignment adjustments below */
-        if (size < (alignment + ds_cfg.sizeof_rec[qual]))
+/*
+ * The raw BTS data is architecture dependent.
+ *
+ * For higher-level users, we give an arch-independent view.
+ * - ds.h defines struct bts_struct
+ * - bts_read translates one raw bts record into a bts_struct
+ * - bts_write translates one bts_struct into the raw format and
+ *   writes it into the top of the parameter tracer's buffer.
+ *
+ * return: bytes read/written on success; -Eerrno, otherwise
+ */
+static int bts_read(struct bts_tracer *tracer, const void *at,
+                    struct bts_struct *out)
+{
+        if (!tracer)
                 return -EINVAL;
 
-        /* buffer overflow notification is not yet implemented */
-        if (ovfl)
-                return -EOPNOTSUPP;
+        if (at < tracer->trace.ds.begin)
+                return -EINVAL;
 
+        if (tracer->trace.ds.end < (at + tracer->trace.ds.size))
+                return -EINVAL;
 
-        context = ds_alloc_context(task);
-        if (!context)
-                return -ENOMEM;
+        memset(out, 0, sizeof(*out));
+        if ((bts_get(at, bts_qual) & ~bts_qual_mask) == bts_escape) {
+                out->qualifier = (bts_get(at, bts_qual) & bts_qual_mask);
+                out->variant.timestamp.jiffies = bts_get(at, bts_jiffies);
+                out->variant.timestamp.pid = bts_get(at, bts_pid);
+        } else {
+                out->qualifier = bts_branch;
+                out->variant.lbr.from = bts_get(at, bts_from);
+                out->variant.lbr.to   = bts_get(at, bts_to);
+
+                if (!out->variant.lbr.from && !out->variant.lbr.to)
+                        out->qualifier = bts_invalid;
+        }
 
-        spin_lock_irqsave(&ds_lock, irq);
+        return ds_cfg.sizeof_rec[ds_bts];
+}
 
-        error = -EPERM;
-        if (!check_tracer(task))
-                goto out_unlock;
+static int bts_write(struct bts_tracer *tracer, const struct bts_struct *in)
+{
+        unsigned char raw[MAX_SIZEOF_BTS];
 
-        get_tracer(task);
+        if (!tracer)
+                return -EINVAL;
 
-        error = -EALREADY;
-        if (context->owner[qual] == current)
-                goto out_put_tracer;
-        error = -EPERM;
-        if (context->owner[qual] != NULL)
-                goto out_put_tracer;
-        context->owner[qual] = current;
+        if (MAX_SIZEOF_BTS < ds_cfg.sizeof_rec[ds_bts])
+                return -EOVERFLOW;
 
-        spin_unlock_irqrestore(&ds_lock, irq);
+        switch (in->qualifier) {
+        case bts_invalid:
+                bts_set(raw, bts_from, 0);
+                bts_set(raw, bts_to, 0);
+                bts_set(raw, bts_flags, 0);
+                break;
+        case bts_branch:
+                bts_set(raw, bts_from, in->variant.lbr.from);
+                bts_set(raw, bts_to,   in->variant.lbr.to);
+                bts_set(raw, bts_flags, 0);
+                break;
+        case bts_task_arrives:
+        case bts_task_departs:
+                bts_set(raw, bts_qual, (bts_escape | in->qualifier));
+                bts_set(raw, bts_jiffies, in->variant.timestamp.jiffies);
+                bts_set(raw, bts_pid, in->variant.timestamp.pid);
+                break;
+        default:
+                return -EINVAL;
+        }
 
+        return ds_write(tracer->ds.context, ds_bts, raw,
+                        ds_cfg.sizeof_rec[ds_bts]);
+}
 
-        error = -ENOMEM;
-        if (!base) {
-                base = ds_allocate_buffer(size, &context->pages[qual]);
-                if (!base)
-                        goto out_release;
 
-                context->buffer[qual]   = base;
-        }
-        error = 0;
+static void ds_write_config(struct ds_context *context,
+                            struct ds_trace *cfg, enum ds_qualifier qual)
+{
+        unsigned char *ds = context->ds;
+
+        ds_set(ds, qual, ds_buffer_base, (unsigned long)cfg->begin);
+        ds_set(ds, qual, ds_index, (unsigned long)cfg->top);
+        ds_set(ds, qual, ds_absolute_maximum, (unsigned long)cfg->end);
+        ds_set(ds, qual, ds_interrupt_threshold, (unsigned long)cfg->ith);
+}
+
+static void ds_read_config(struct ds_context *context,
+                           struct ds_trace *cfg, enum ds_qualifier qual)
+{
+        unsigned char *ds = context->ds;
 
-        context->callback[qual] = ovfl;
+        cfg->begin = (void *)ds_get(ds, qual, ds_buffer_base);
+        cfg->top = (void *)ds_get(ds, qual, ds_index);
+        cfg->end = (void *)ds_get(ds, qual, ds_absolute_maximum);
+        cfg->ith = (void *)ds_get(ds, qual, ds_interrupt_threshold);
+}
+
+static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual,
+                             void *base, size_t size, size_t ith,
+                             unsigned int flags) {
+        unsigned long buffer, adj;
 
         /* adjust the buffer address and size to meet alignment
          * constraints:
@@ -436,410 +565,383 @@ static int ds_request(struct task_struct *task, void *base, size_t size,
          */
         buffer = (unsigned long)base;
 
-        adj = ALIGN(buffer, alignment) - buffer;
+        adj = ALIGN(buffer, DS_ALIGNMENT) - buffer;
         buffer += adj;
         size   -= adj;
 
-        size /= ds_cfg.sizeof_rec[qual];
-        size *= ds_cfg.sizeof_rec[qual];
-
-        ds_set(context->ds, qual, ds_buffer_base, buffer);
-        ds_set(context->ds, qual, ds_index, buffer);
-        ds_set(context->ds, qual, ds_absolute_maximum, buffer + size);
+        trace->n = size / ds_cfg.sizeof_rec[qual];
+        trace->size = ds_cfg.sizeof_rec[qual];
 
-        if (ovfl) {
-                /* todo: select a suitable interrupt threshold */
-        } else
-                ds_set(context->ds, qual,
-                       ds_interrupt_threshold, buffer + size + 1);
+        size = (trace->n * trace->size);
 
-        /* we keep the context until ds_release */
-        return error;
-
- out_release:
-        context->owner[qual] = NULL;
-        ds_put_context(context);
-        put_tracer(task);
-        return error;
-
- out_put_tracer:
-        spin_unlock_irqrestore(&ds_lock, irq);
-        ds_put_context(context);
-        put_tracer(task);
-        return error;
+        trace->begin = (void *)buffer;
+        trace->top = trace->begin;
+        trace->end = (void *)(buffer + size);
+        /* The value for 'no threshold' is -1, which will set the
+         * threshold outside of the buffer, just like we want it.
+         */
+        trace->ith = (void *)(buffer + size - ith);
 
- out_unlock:
-        spin_unlock_irqrestore(&ds_lock, irq);
-        ds_put_context(context);
-        return error;
+        trace->flags = flags;
 }
 
-int ds_request_bts(struct task_struct *task, void *base, size_t size,
-                   ds_ovfl_callback_t ovfl)
-{
-        return ds_request(task, base, size, ovfl, ds_bts);
-}
 
-int ds_request_pebs(struct task_struct *task, void *base, size_t size,
-                    ds_ovfl_callback_t ovfl)
-{
-        return ds_request(task, base, size, ovfl, ds_pebs);
-}
-
-static int ds_release(struct task_struct *task, enum ds_qualifier qual)
+static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace,
+                      enum ds_qualifier qual, struct task_struct *task,
+                      void *base, size_t size, size_t th, unsigned int flags)
 {
         struct ds_context *context;
         int error;
 
-        context = ds_get_context(task);
-        error = ds_validate_access(context, qual);
-        if (error < 0)
+        error = -EINVAL;
+        if (!base)
                 goto out;
 
-        kfree(context->buffer[qual]);
-        context->buffer[qual] = NULL;
-
-        current->mm->total_vm  -= context->pages[qual];
-        current->mm->locked_vm -= context->pages[qual];
-        context->pages[qual] = 0;
-        context->owner[qual] = NULL;
-
-        /*
-         * we put the context twice:
-         *   once for the ds_get_context
-         *   once for the corresponding ds_request
-         */
-        ds_put_context(context);
- out:
-        ds_put_context(context);
-        return error;
-}
+        /* we require some space to do alignment adjustments below */
+        error = -EINVAL;
+        if (size < (DS_ALIGNMENT + ds_cfg.sizeof_rec[qual]))
+                goto out;
 
-int ds_release_bts(struct task_struct *task)
-{
-        return ds_release(task, ds_bts);
-}
+        if (th != (size_t)-1) {
+                th *= ds_cfg.sizeof_rec[qual];
 
-int ds_release_pebs(struct task_struct *task)
-{
-        return ds_release(task, ds_pebs);
-}
+                error = -EINVAL;
+                if (size <= th)
+                        goto out;
+        }
 
-static int ds_get_index(struct task_struct *task, size_t *pos,
-                        enum ds_qualifier qual)
-{
-        struct ds_context *context;
-        unsigned long base, index;
-        int error;
+        tracer->buffer = base;
+        tracer->size = size;
 
+        error = -ENOMEM;
         context = ds_get_context(task);
-        error = ds_validate_access(context, qual);
-        if (error < 0)
+        if (!context)
                 goto out;
+        tracer->context = context;
 
-        base  = ds_get(context->ds, qual, ds_buffer_base);
-        index = ds_get(context->ds, qual, ds_index);
+        ds_init_ds_trace(trace, qual, base, size, th, flags);
 
-        error = ((index - base) / ds_cfg.sizeof_rec[qual]);
-        if (pos)
-                *pos = error;
+        error = 0;
  out:
-        ds_put_context(context);
         return error;
 }
 
-int ds_get_bts_index(struct task_struct *task, size_t *pos)
-{
-        return ds_get_index(task, pos, ds_bts);
-}
-
-int ds_get_pebs_index(struct task_struct *task, size_t *pos)
+struct bts_tracer *ds_request_bts(struct task_struct *task,
+                                  void *base, size_t size,
+                                  bts_ovfl_callback_t ovfl, size_t th,
+                                  unsigned int flags)
 {
-        return ds_get_index(task, pos, ds_pebs);
-}
-
-static int ds_get_end(struct task_struct *task, size_t *pos,
-                      enum ds_qualifier qual)
-{
-        struct ds_context *context;
-        unsigned long base, end;
+        struct bts_tracer *tracer;
+        unsigned long irq;
         int error;
 
-        context = ds_get_context(task);
-        error = ds_validate_access(context, qual);
-        if (error < 0)
+        error = -EOPNOTSUPP;
+        if (!ds_cfg.ctl[dsf_bts])
                 goto out;
 
-        base = ds_get(context->ds, qual, ds_buffer_base);
-        end  = ds_get(context->ds, qual, ds_absolute_maximum);
+        /* buffer overflow notification is not yet implemented */
+        error = -EOPNOTSUPP;
+        if (ovfl)
+                goto out;
 
-        error = ((end - base) / ds_cfg.sizeof_rec[qual]);
-        if (pos)
-                *pos = error;
- out:
-        ds_put_context(context);
-        return error;
-}
+        error = -ENOMEM;
+        tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
+        if (!tracer)
+                goto out;
+        tracer->ovfl = ovfl;
 
-int ds_get_bts_end(struct task_struct *task, size_t *pos)
-{
-        return ds_get_end(task, pos, ds_bts);
-}
+        error = ds_request(&tracer->ds, &tracer->trace.ds,
+                           ds_bts, task, base, size, th, flags);
+        if (error < 0)
+                goto out_tracer;
 
-int ds_get_pebs_end(struct task_struct *task, size_t *pos)
-{
-        return ds_get_end(task, pos, ds_pebs);
-}
 
-static int ds_access(struct task_struct *task, size_t index,
-                     const void **record, enum ds_qualifier qual)
-{
-        struct ds_context *context;
-        unsigned long base, idx;
-        int error;
+        spin_lock_irqsave(&ds_lock, irq);
 
-        if (!record)
-                return -EINVAL;
+        error = -EPERM;
+        if (!check_tracer(task))
+                goto out_unlock;
+        get_tracer(task);
 
-        context = ds_get_context(task);
-        error = ds_validate_access(context, qual);
-        if (error < 0)
-                goto out;
+        error = -EPERM;
+        if (tracer->ds.context->bts_master)
+                goto out_put_tracer;
+        tracer->ds.context->bts_master = tracer;
 
-        base = ds_get(context->ds, qual, ds_buffer_base);
-        idx = base + (index * ds_cfg.sizeof_rec[qual]);
+        spin_unlock_irqrestore(&ds_lock, irq);
 
-        error = -EINVAL;
-        if (idx > ds_get(context->ds, qual, ds_absolute_maximum))
-                goto out;
 
-        *record = (const void *)idx;
-        error = ds_cfg.sizeof_rec[qual];
- out:
-        ds_put_context(context);
-        return error;
-}
+        tracer->trace.read  = bts_read;
+        tracer->trace.write = bts_write;
 
-int ds_access_bts(struct task_struct *task, size_t index, const void **record)
-{
-        return ds_access(task, index, record, ds_bts);
-}
+        ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
+        ds_resume_bts(tracer);
 
-int ds_access_pebs(struct task_struct *task, size_t index, const void **record)
-{
-        return ds_access(task, index, record, ds_pebs);
+        return tracer;
+
+ out_put_tracer:
+        put_tracer(task);
+ out_unlock:
+        spin_unlock_irqrestore(&ds_lock, irq);
+        ds_put_context(tracer->ds.context);
+ out_tracer:
+        kfree(tracer);
+ out:
+        return ERR_PTR(error);
 }
 
-static int ds_write(struct task_struct *task, const void *record, size_t size,
-                    enum ds_qualifier qual, int force)
+struct pebs_tracer *ds_request_pebs(struct task_struct *task,
+                                    void *base, size_t size,
+                                    pebs_ovfl_callback_t ovfl, size_t th,
+                                    unsigned int flags)
 {
-        struct ds_context *context;
+        struct pebs_tracer *tracer;
+        unsigned long irq;
         int error;
 
-        if (!record)
-                return -EINVAL;
+        /* buffer overflow notification is not yet implemented */
+        error = -EOPNOTSUPP;
+        if (ovfl)
+                goto out;
 
-        error = -EPERM;
-        context = ds_get_context(task);
-        if (!context)
+        error = -ENOMEM;
+        tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
+        if (!tracer)
                 goto out;
+        tracer->ovfl = ovfl;
 
-        if (!force) {
-                error = ds_validate_access(context, qual);
-                if (error < 0)
-                        goto out;
-        }
+        error = ds_request(&tracer->ds, &tracer->trace.ds,
+                           ds_pebs, task, base, size, th, flags);
+        if (error < 0)
+                goto out_tracer;
 
-        error = 0;
-        while (size) {
-                unsigned long base, index, end, write_end, int_th;
-                unsigned long write_size, adj_write_size;
+        spin_lock_irqsave(&ds_lock, irq);
 
-                /*
-                 * write as much as possible without producing an
-                 * overflow interrupt.
-                 *
-                 * interrupt_threshold must either be
-                 * - bigger than absolute_maximum or
-                 * - point to a record between buffer_base and absolute_maximum
-                 *
-                 * index points to a valid record.
-                 */
-                base   = ds_get(context->ds, qual, ds_buffer_base);
-                index  = ds_get(context->ds, qual, ds_index);
-                end    = ds_get(context->ds, qual, ds_absolute_maximum);
-                int_th = ds_get(context->ds, qual, ds_interrupt_threshold);
+        error = -EPERM;
+        if (!check_tracer(task))
+                goto out_unlock;
+        get_tracer(task);
 
-                write_end = min(end, int_th);
+        error = -EPERM;
+        if (tracer->ds.context->pebs_master)
+                goto out_put_tracer;
+        tracer->ds.context->pebs_master = tracer;
 
-                /* if we are already beyond the interrupt threshold,
-                 * we fill the entire buffer */
-                if (write_end <= index)
-                        write_end = end;
+        spin_unlock_irqrestore(&ds_lock, irq);
 
-                if (write_end <= index)
-                        goto out;
+        ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
+        ds_resume_pebs(tracer);
 
-                write_size = min((unsigned long) size, write_end - index);
-                memcpy((void *)index, record, write_size);
+        return tracer;
 
-                record = (const char *)record + write_size;
-                size  -= write_size;
-                error += write_size;
+ out_put_tracer:
+        put_tracer(task);
+ out_unlock:
+        spin_unlock_irqrestore(&ds_lock, irq);
+        ds_put_context(tracer->ds.context);
+ out_tracer:
+        kfree(tracer);
+ out:
+        return ERR_PTR(error);
+}
 
-                adj_write_size = write_size / ds_cfg.sizeof_rec[qual];
-                adj_write_size *= ds_cfg.sizeof_rec[qual];
+void ds_release_bts(struct bts_tracer *tracer)
+{
+        if (!tracer)
+                return;
 
-                /* zero out trailing bytes */
-                memset((char *)index + write_size, 0,
-                       adj_write_size - write_size);
-                index += adj_write_size;
+        ds_suspend_bts(tracer);
 
-                if (index >= end)
-                        index = base;
-                ds_set(context->ds, qual, ds_index, index);
+        WARN_ON_ONCE(tracer->ds.context->bts_master != tracer);
+        tracer->ds.context->bts_master = NULL;
 
-                if (index >= int_th)
-                        ds_overflow(task, context, qual);
-        }
+        put_tracer(tracer->ds.context->task);
+        ds_put_context(tracer->ds.context);
 
- out:
-        ds_put_context(context);
-        return error;
+        kfree(tracer);
 }
 
-int ds_write_bts(struct task_struct *task, const void *record, size_t size)
+void ds_suspend_bts(struct bts_tracer *tracer)
 {
-        return ds_write(task, record, size, ds_bts, /* force = */ 0);
-}
+        struct task_struct *task;
 
-int ds_write_pebs(struct task_struct *task, const void *record, size_t size)
-{
-        return ds_write(task, record, size, ds_pebs, /* force = */ 0);
-}
+        if (!tracer)
+                return;
 
-int ds_unchecked_write_bts(struct task_struct *task,
-                           const void *record, size_t size)
-{
-        return ds_write(task, record, size, ds_bts, /* force = */ 1);
-}
+        task = tracer->ds.context->task;
 
-int ds_unchecked_write_pebs(struct task_struct *task,
-                            const void *record, size_t size)
-{
-        return ds_write(task, record, size, ds_pebs, /* force = */ 1);
+        if (!task || (task == current))
+                update_debugctlmsr(get_debugctlmsr() & ~BTS_CONTROL);
+
+        if (task) {
+                task->thread.debugctlmsr &= ~BTS_CONTROL;
+
+                if (!task->thread.debugctlmsr)
+                        clear_tsk_thread_flag(task, TIF_DEBUGCTLMSR);
+        }
 }
 
-static int ds_reset_or_clear(struct task_struct *task,
-                             enum ds_qualifier qual, int clear)
+void ds_resume_bts(struct bts_tracer *tracer)
 {
-        struct ds_context *context;
-        unsigned long base, end;
-        int error;
+        struct task_struct *task;
+        unsigned long control;
 
-        context = ds_get_context(task);
-        error = ds_validate_access(context, qual);
-        if (error < 0)
-                goto out;
+        if (!tracer)
+                return;
 
-        base = ds_get(context->ds, qual, ds_buffer_base);
-        end  = ds_get(context->ds, qual, ds_absolute_maximum);
+        task = tracer->ds.context->task;
 
-        if (clear)
-                memset((void *)base, 0, end - base);
+        control = ds_cfg.ctl[dsf_bts];
+        if (!(tracer->trace.ds.flags & BTS_KERNEL))
+                control |= ds_cfg.ctl[dsf_bts_kernel];
+        if (!(tracer->trace.ds.flags & BTS_USER))
+                control |= ds_cfg.ctl[dsf_bts_user];
 
-        ds_set(context->ds, qual, ds_index, base);
+        if (task) {
+                task->thread.debugctlmsr |= control;
+                set_tsk_thread_flag(task, TIF_DEBUGCTLMSR);
+        }
 
-        error = 0;
- out:
-        ds_put_context(context);
-        return error;
+        if (!task || (task == current))
+                update_debugctlmsr(get_debugctlmsr() | control);
 }
 
-int ds_reset_bts(struct task_struct *task)
+void ds_release_pebs(struct pebs_tracer *tracer)
 {
-        return ds_reset_or_clear(task, ds_bts, /* clear = */ 0);
+        if (!tracer)
+                return;
+
+        ds_suspend_pebs(tracer);
+
+        WARN_ON_ONCE(tracer->ds.context->pebs_master != tracer);
+        tracer->ds.context->pebs_master = NULL;
+
+        put_tracer(tracer->ds.context->task);
+        ds_put_context(tracer->ds.context);
+
+        kfree(tracer);
 }
 
-int ds_reset_pebs(struct task_struct *task)
+void ds_suspend_pebs(struct pebs_tracer *tracer)
 {
-        return ds_reset_or_clear(task, ds_pebs, /* clear = */ 0);
+
 }
 
-int ds_clear_bts(struct task_struct *task)
+void ds_resume_pebs(struct pebs_tracer *tracer)
 {
-        return ds_reset_or_clear(task, ds_bts, /* clear = */ 1);
+
 }
 
-int ds_clear_pebs(struct task_struct *task)
+const struct bts_trace *ds_read_bts(struct bts_tracer *tracer)
 {
-        return ds_reset_or_clear(task, ds_pebs, /* clear = */ 1);
+        if (!tracer)
+                return NULL;
+
+        ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
+        return &tracer->trace;
 }
 
-int ds_get_pebs_reset(struct task_struct *task, u64 *value)
+const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer)
 {
-        struct ds_context *context;
-        int error;
+        if (!tracer)
+                return NULL;
+
+        ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
+        tracer->trace.reset_value =
+                *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8));
 
-        if (!value)
+        return &tracer->trace;
+}
+
+int ds_reset_bts(struct bts_tracer *tracer)
+{
+        if (!tracer)
                 return -EINVAL;
 
-        context = ds_get_context(task);
-        error = ds_validate_access(context, ds_pebs);
-        if (error < 0)
-                goto out;
+        tracer->trace.ds.top = tracer->trace.ds.begin;
 
-        *value = *(u64 *)(context->ds + (ds_cfg.sizeof_field * 8));
+        ds_set(tracer->ds.context->ds, ds_bts, ds_index,
+               (unsigned long)tracer->trace.ds.top);
 
-        error = 0;
- out:
-        ds_put_context(context);
-        return error;
+        return 0;
 }
 
-int ds_set_pebs_reset(struct task_struct *task, u64 value)
+int ds_reset_pebs(struct pebs_tracer *tracer)
 {
-        struct ds_context *context;
-        int error;
+        if (!tracer)
+                return -EINVAL;
 
-        context = ds_get_context(task);
-        error = ds_validate_access(context, ds_pebs);
-        if (error < 0)
-                goto out;
+        tracer->trace.ds.top = tracer->trace.ds.begin;
 
-        *(u64 *)(context->ds + (ds_cfg.sizeof_field * 8)) = value;
+        ds_set(tracer->ds.context->ds, ds_bts, ds_index,
+               (unsigned long)tracer->trace.ds.top);
 
-        error = 0;
- out:
-        ds_put_context(context);
-        return error;
+        return 0;
+}
+
+int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value)
+{
+        if (!tracer)
+                return -EINVAL;
+
+        *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8)) = value;
+
+        return 0;
 }
 
-static const struct ds_configuration ds_cfg_var = {
-        .sizeof_ds    = sizeof(long) * 12,
-        .sizeof_field = sizeof(long),
-        .sizeof_rec[ds_bts]   = sizeof(long) * 3,
+static const struct ds_configuration ds_cfg_netburst = {
+        .name = "netburst",
+        .ctl[dsf_bts]           = (1 << 2) | (1 << 3),
+        .ctl[dsf_bts_kernel]    = (1 << 5),
+        .ctl[dsf_bts_user]      = (1 << 6),
+
+        .sizeof_field           = sizeof(long),
+        .sizeof_rec[ds_bts]     = sizeof(long) * 3,
 #ifdef __i386__
-        .sizeof_rec[ds_pebs]  = sizeof(long) * 10
+        .sizeof_rec[ds_pebs]    = sizeof(long) * 10,
 #else
-        .sizeof_rec[ds_pebs]  = sizeof(long) * 18
+        .sizeof_rec[ds_pebs]    = sizeof(long) * 18,
 #endif
 };
-static const struct ds_configuration ds_cfg_64 = {
-        .sizeof_ds    = 8 * 12,
-        .sizeof_field = 8,
-        .sizeof_rec[ds_bts]   = 8 * 3,
+static const struct ds_configuration ds_cfg_pentium_m = {
+        .name = "pentium m",
+        .ctl[dsf_bts]           = (1 << 6) | (1 << 7),
+
+        .sizeof_field           = sizeof(long),
+        .sizeof_rec[ds_bts]     = sizeof(long) * 3,
 #ifdef __i386__
-        .sizeof_rec[ds_pebs]  = 8 * 10
+        .sizeof_rec[ds_pebs]    = sizeof(long) * 10,
 #else
-        .sizeof_rec[ds_pebs]  = 8 * 18
+        .sizeof_rec[ds_pebs]    = sizeof(long) * 18,
 #endif
 };
+static const struct ds_configuration ds_cfg_core2 = {
+        .name = "core 2",
+        .ctl[dsf_bts]           = (1 << 6) | (1 << 7),
+        .ctl[dsf_bts_kernel]    = (1 << 9),
+        .ctl[dsf_bts_user]      = (1 << 10),
+
+        .sizeof_field           = 8,
+        .sizeof_rec[ds_bts]     = 8 * 3,
+        .sizeof_rec[ds_pebs]    = 8 * 18,
+};
 
-static inline void
+static void
 ds_configure(const struct ds_configuration *cfg)
 {
+        memset(&ds_cfg, 0, sizeof(ds_cfg));
         ds_cfg = *cfg;
+
+        printk(KERN_INFO "[ds] using %s configuration\n", ds_cfg.name);
+
+        if (!cpu_has_bts) {
+                ds_cfg.ctl[dsf_bts] = 0;
+                printk(KERN_INFO "[ds] bts not available\n");
+        }
+        if (!cpu_has_pebs)
+                printk(KERN_INFO "[ds] pebs not available\n");
+
+        WARN_ON_ONCE(MAX_SIZEOF_DS < (12 * ds_cfg.sizeof_field));
 }
 
 void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
@@ -847,16 +949,15 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
         switch (c->x86) {
         case 0x6:
                 switch (c->x86_model) {
+                case 0 ... 0xC:
+                        /* sorry, don't know about them */
+                        break;
                 case 0xD:
                 case 0xE: /* Pentium M */
-                        ds_configure(&ds_cfg_var);
+                        ds_configure(&ds_cfg_pentium_m);
                         break;
-                case 0xF: /* Core2 */
-                case 0x1C: /* Atom */
-                        ds_configure(&ds_cfg_64);
-                        break;
-                default:
-                        /* sorry, don't know about them */
+                default: /* Core2, Atom, ... */
+                        ds_configure(&ds_cfg_core2);
                         break;
                 }
                 break;
@@ -865,7 +966,7 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
                 case 0x0:
                 case 0x1:
                 case 0x2: /* Netburst */
-                        ds_configure(&ds_cfg_var);
+                        ds_configure(&ds_cfg_netburst);
                         break;
                 default:
                         /* sorry, don't know about them */
@@ -878,12 +979,52 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
         }
 }
 
-void ds_free(struct ds_context *context)
+/*
+ * Change the DS configuration from tracing prev to tracing next.
+ */
+void ds_switch_to(struct task_struct *prev, struct task_struct *next)
+{
+        struct ds_context *prev_ctx = prev->thread.ds_ctx;
+        struct ds_context *next_ctx = next->thread.ds_ctx;
+
+        if (prev_ctx) {
+                update_debugctlmsr(0);
+
+                if (prev_ctx->bts_master &&
+                    (prev_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) {
+                        struct bts_struct ts = {
+                                .qualifier = bts_task_departs,
+                                .variant.timestamp.jiffies = jiffies_64,
+                                .variant.timestamp.pid = prev->pid
+                        };
+                        bts_write(prev_ctx->bts_master, &ts);
+                }
+        }
+
+        if (next_ctx) {
+                if (next_ctx->bts_master &&
+                    (next_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) {
+                        struct bts_struct ts = {
+                                .qualifier = bts_task_arrives,
+                                .variant.timestamp.jiffies = jiffies_64,
+                                .variant.timestamp.pid = next->pid
+                        };
+                        bts_write(next_ctx->bts_master, &ts);
+                }
+
+                wrmsrl(MSR_IA32_DS_AREA, (unsigned long)next_ctx->ds);
+        }
+
+        update_debugctlmsr(next->thread.debugctlmsr);
+}
+
+void ds_copy_thread(struct task_struct *tsk, struct task_struct *father)
+{
+        clear_tsk_thread_flag(tsk, TIF_DS_AREA_MSR);
+        tsk->thread.ds_ctx = NULL;
+}
+
+void ds_exit_thread(struct task_struct *tsk)
 {
-        /* This is called when the task owning the parameter context
-         * is dying. There should not be any user of that context left
-         * to disturb us, anymore. */
-        unsigned long leftovers = context->count;
-        while (leftovers--)
-                ds_put_context(context);
+        WARN_ON(tsk->thread.ds_ctx);
 }
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
new file mode 100644
index 000000000000..6b1f6f6f8661
--- /dev/null
+++ b/arch/x86/kernel/dumpstack.c
@@ -0,0 +1,351 @@
+/*
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *  Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
+ */
+#include <linux/kallsyms.h>
+#include <linux/kprobes.h>
+#include <linux/uaccess.h>
+#include <linux/utsname.h>
+#include <linux/hardirq.h>
+#include <linux/kdebug.h>
+#include <linux/module.h>
+#include <linux/ptrace.h>
+#include <linux/kexec.h>
+#include <linux/bug.h>
+#include <linux/nmi.h>
+#include <linux/sysfs.h>
+
+#include <asm/stacktrace.h>
+
+#include "dumpstack.h"
+
+int panic_on_unrecovered_nmi;
+unsigned int code_bytes = 64;
+int kstack_depth_to_print = 3 * STACKSLOTS_PER_LINE;
+static int die_counter;
+
+void printk_address(unsigned long address, int reliable)
+{
+        printk(" [<%p>] %s%pS\n", (void *) address,
+                        reliable ? "" : "? ", (void *) address);
+}
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+static void
+print_ftrace_graph_addr(unsigned long addr, void *data,
+                        const struct stacktrace_ops *ops,
+                        struct thread_info *tinfo, int *graph)
+{
+        struct task_struct *task = tinfo->task;
+        unsigned long ret_addr;
+        int index = task->curr_ret_stack;
+
+        if (addr != (unsigned long)return_to_handler)
+                return;
+
+        if (!task->ret_stack || index < *graph)
+                return;
+
+        index -= *graph;
+        ret_addr = task->ret_stack[index].ret;
+
+        ops->address(data, ret_addr, 1);
+
+        (*graph)++;
+}
+#else
+static inline void
+print_ftrace_graph_addr(unsigned long addr, void *data,
+                        const struct stacktrace_ops *ops,
+                        struct thread_info *tinfo, int *graph)
+{ }
+#endif
+
+/*
+ * x86-64 can have up to three kernel stacks:
+ * process stack
+ * interrupt stack
+ * severe exception (double fault, nmi, stack fault, debug, mce) hardware stack
+ */
+
+static inline int valid_stack_ptr(struct thread_info *tinfo,
+                        void *p, unsigned int size, void *end)
+{
+        void *t = tinfo;
+        if (end) {
+                if (p < end && p >= (end-THREAD_SIZE))
+                        return 1;
+                else
+                        return 0;
+        }
+        return p > t && p < t + THREAD_SIZE - size;
+}
+
+unsigned long
+print_context_stack(struct thread_info *tinfo,
+                unsigned long *stack, unsigned long bp,
+                const struct stacktrace_ops *ops, void *data,
+                unsigned long *end, int *graph)
+{
+        struct stack_frame *frame = (struct stack_frame *)bp;
+
+        while (valid_stack_ptr(tinfo, stack, sizeof(*stack), end)) {
+                unsigned long addr;
+
+                addr = *stack;
+                if (__kernel_text_address(addr)) {
+                        if ((unsigned long) stack == bp + sizeof(long)) {
+                                ops->address(data, addr, 1);
+                                frame = frame->next_frame;
+                                bp = (unsigned long) frame;
+                        } else {
+                                ops->address(data, addr, bp == 0);
+                        }
+                        print_ftrace_graph_addr(addr, data, ops, tinfo, graph);
+                }
+                stack++;
+        }
+        return bp;
+}
+
+
+static void
+print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
+{
+        printk(data);
+        print_symbol(msg, symbol);
+        printk("\n");
+}
+
+static void print_trace_warning(void *data, char *msg)
+{
+        printk("%s%s\n", (char *)data, msg);
+}
+
+static int print_trace_stack(void *data, char *name)
+{
+        printk("%s <%s> ", (char *)data, name);
+        return 0;
+}
+
+/*
+ * Print one address/symbol entries per line.
+ */
+static void print_trace_address(void *data, unsigned long addr, int reliable)
+{
+        touch_nmi_watchdog();
+        printk(data);
+        printk_address(addr, reliable);
+}
+
+static const struct stacktrace_ops print_trace_ops = {
+        .warning = print_trace_warning,
+        .warning_symbol = print_trace_warning_symbol,
+        .stack = print_trace_stack,
+        .address = print_trace_address,
+};
+
+void
+show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
+                unsigned long *stack, unsigned long bp, char *log_lvl)
+{
+        printk("%sCall Trace:\n", log_lvl);
+        dump_trace(task, regs, stack, bp, &print_trace_ops, log_lvl);
+}
+
+void show_trace(struct task_struct *task, struct pt_regs *regs,
+                unsigned long *stack, unsigned long bp)
+{
+        show_trace_log_lvl(task, regs, stack, bp, "");
+}
+
+void show_stack(struct task_struct *task, unsigned long *sp)
+{
+        show_stack_log_lvl(task, NULL, sp, 0, "");
+}
+
+/*
+ * The architecture-independent dump_stack generator
+ */
+void dump_stack(void)
+{
+        unsigned long bp = 0;
+        unsigned long stack;
+
+#ifdef CONFIG_FRAME_POINTER
+        if (!bp)
+                get_bp(bp);
+#endif
+
+        printk("Pid: %d, comm: %.20s %s %s %.*s\n",
+                current->pid, current->comm, print_tainted(),
+                init_utsname()->release,
+                (int)strcspn(init_utsname()->version, " "),
+                init_utsname()->version);
+        show_trace(NULL, NULL, &stack, bp);
+}
+EXPORT_SYMBOL(dump_stack);
+
+static raw_spinlock_t die_lock = __RAW_SPIN_LOCK_UNLOCKED;
+static int die_owner = -1;
+static unsigned int die_nest_count;
+
+unsigned __kprobes long oops_begin(void)
+{
+        int cpu;
+        unsigned long flags;
+
+        oops_enter();
+
+        /* racy, but better than risking deadlock. */
+        raw_local_irq_save(flags);
+        cpu = smp_processor_id();
+        if (!__raw_spin_trylock(&die_lock)) {
+                if (cpu == die_owner)
+                        /* nested oops. should stop eventually */;
+                else
+                        __raw_spin_lock(&die_lock);
+        }
+        die_nest_count++;
+        die_owner = cpu;
+        console_verbose();
+        bust_spinlocks(1);
+        return flags;
+}
+
+void __kprobes oops_end(unsigned long flags, struct pt_regs *regs, int signr)
+{
+        if (regs && kexec_should_crash(current))
+                crash_kexec(regs);
+
+        bust_spinlocks(0);
+        die_owner = -1;
+        add_taint(TAINT_DIE);
+        die_nest_count--;
+        if (!die_nest_count)
+                /* Nest count reaches zero, release the lock. */
+                __raw_spin_unlock(&die_lock);
+        raw_local_irq_restore(flags);
+        oops_exit();
+
+        if (!signr)
+                return;
+        if (in_interrupt())
+                panic("Fatal exception in interrupt");
+        if (panic_on_oops)
+                panic("Fatal exception");
+        do_exit(signr);
+}
+
+int __kprobes __die(const char *str, struct pt_regs *regs, long err)
+{
+#ifdef CONFIG_X86_32
+        unsigned short ss;
+        unsigned long sp;
+#endif
+        printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
+#ifdef CONFIG_PREEMPT
+        printk("PREEMPT ");
+#endif
+#ifdef CONFIG_SMP
+        printk("SMP ");
+#endif
+#ifdef CONFIG_DEBUG_PAGEALLOC
+        printk("DEBUG_PAGEALLOC");
+#endif
+        printk("\n");
+        sysfs_printk_last_file();
+        if (notify_die(DIE_OOPS, str, regs, err,
+                        current->thread.trap_no, SIGSEGV) == NOTIFY_STOP)
+                return 1;
+
+        show_registers(regs);
+#ifdef CONFIG_X86_32
+        sp = (unsigned long) (&regs->sp);
+        savesegment(ss, ss);
+        if (user_mode(regs)) {
+                sp = regs->sp;
+                ss = regs->ss & 0xffff;
+        }
+        printk(KERN_EMERG "EIP: [<%08lx>] ", regs->ip);
+        print_symbol("%s", regs->ip);
+        printk(" SS:ESP %04x:%08lx\n", ss, sp);
+#else
+        /* Executive summary in case the oops scrolled away */
+        printk(KERN_ALERT "RIP ");
+        printk_address(regs->ip, 1);
+        printk(" RSP <%016lx>\n", regs->sp);
+#endif
+        return 0;
+}
+
+/*
+ * This is gone through when something in the kernel has done something bad
+ * and is about to be terminated:
+ */
+void die(const char *str, struct pt_regs *regs, long err)
+{
+        unsigned long flags = oops_begin();
+        int sig = SIGSEGV;
+
+        if (!user_mode_vm(regs))
+                report_bug(regs->ip, regs);
+
+        if (__die(str, regs, err))
+                sig = 0;
+        oops_end(flags, regs, sig);
+}
+
+void notrace __kprobes
+die_nmi(char *str, struct pt_regs *regs, int do_panic)
+{
+        unsigned long flags;
+
+        if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
+                return;
+
+        /*
+         * We are in trouble anyway, lets at least try
+         * to get a message out.
+         */
+        flags = oops_begin();
+        printk(KERN_EMERG "%s", str);
+        printk(" on CPU%d, ip %08lx, registers:\n",
+                smp_processor_id(), regs->ip);
+        show_registers(regs);
+        oops_end(flags, regs, 0);
+        if (do_panic || panic_on_oops)
+                panic("Non maskable interrupt");
+        nmi_exit();
+        local_irq_enable();
+        do_exit(SIGBUS);
+}
+
+static int __init oops_setup(char *s)
+{
+        if (!s)
+                return -EINVAL;
+        if (!strcmp(s, "panic"))
+                panic_on_oops = 1;
+        return 0;
+}
+early_param("oops", oops_setup);
+
+static int __init kstack_setup(char *s)
+{
+        if (!s)
+                return -EINVAL;
+        kstack_depth_to_print = simple_strtoul(s, NULL, 0);
+        return 0;
+}
+early_param("kstack", kstack_setup);
+
+static int __init code_bytes_setup(char *s)
+{
+        code_bytes = simple_strtoul(s, NULL, 0);
+        if (code_bytes > 8192)
+                code_bytes = 8192;
+
+        return 1;
+}
+__setup("code_bytes=", code_bytes_setup);
diff --git a/arch/x86/kernel/dumpstack.h b/arch/x86/kernel/dumpstack.h
new file mode 100644
index 000000000000..da87590b8698
--- /dev/null
+++ b/arch/x86/kernel/dumpstack.h
@@ -0,0 +1,39 @@
+/*
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *  Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
+ */
+
+#ifndef DUMPSTACK_H
+#define DUMPSTACK_H
+
+#ifdef CONFIG_X86_32
+#define STACKSLOTS_PER_LINE 8
+#define get_bp(bp) asm("movl %%ebp, %0" : "=r" (bp) :)
+#else
+#define STACKSLOTS_PER_LINE 4
+#define get_bp(bp) asm("movq %%rbp, %0" : "=r" (bp) :)
+#endif
+
+extern unsigned long
+print_context_stack(struct thread_info *tinfo,
+                unsigned long *stack, unsigned long bp,
+                const struct stacktrace_ops *ops, void *data,
+                unsigned long *end, int *graph);
+
+extern void
+show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
+                unsigned long *stack, unsigned long bp, char *log_lvl);
+
+extern void
+show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
+                unsigned long *sp, unsigned long bp, char *log_lvl);
+
+extern unsigned int code_bytes;
+extern int kstack_depth_to_print;
+
+/* The form of the top of the frame on the stack */
+struct stack_frame {
+        struct stack_frame *next_frame;
+        unsigned long return_address;
+};
+#endif
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index b3614752197b..d593cd1f58dc 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -17,69 +17,14 @@
 
 #include <asm/stacktrace.h>
 
-#define STACKSLOTS_PER_LINE 8
-#define get_bp(bp) asm("movl %%ebp, %0" : "=r" (bp) :)
-
-int panic_on_unrecovered_nmi;
-int kstack_depth_to_print = 3 * STACKSLOTS_PER_LINE;
-static unsigned int code_bytes = 64;
-static int die_counter;
-
-void printk_address(unsigned long address, int reliable)
-{
-        printk(" [<%p>] %s%pS\n", (void *) address,
-                        reliable ? "" : "? ", (void *) address);
-}
-
-static inline int valid_stack_ptr(struct thread_info *tinfo,
-                        void *p, unsigned int size, void *end)
-{
-        void *t = tinfo;
-        if (end) {
-                if (p < end && p >= (end-THREAD_SIZE))
-                        return 1;
-                else
-                        return 0;
-        }
-        return p > t && p < t + THREAD_SIZE - size;
-}
-
-/* The form of the top of the frame on the stack */
-struct stack_frame {
-        struct stack_frame *next_frame;
-        unsigned long return_address;
-};
-
-static inline unsigned long
-print_context_stack(struct thread_info *tinfo,
-                unsigned long *stack, unsigned long bp,
-                const struct stacktrace_ops *ops, void *data,
-                unsigned long *end)
-{
-        struct stack_frame *frame = (struct stack_frame *)bp;
-
-        while (valid_stack_ptr(tinfo, stack, sizeof(*stack), end)) {
-                unsigned long addr;
-
-                addr = *stack;
-                if (__kernel_text_address(addr)) {
-                        if ((unsigned long) stack == bp + sizeof(long)) {
-                                ops->address(data, addr, 1);
-                                frame = frame->next_frame;
-                                bp = (unsigned long) frame;
-                        } else {
-                                ops->address(data, addr, bp == 0);
-                        }
-                }
-                stack++;
-        }
-        return bp;
-}
+#include "dumpstack.h"
 
 void dump_trace(struct task_struct *task, struct pt_regs *regs,
                 unsigned long *stack, unsigned long bp,
                 const struct stacktrace_ops *ops, void *data)
 {
+        int graph = 0;
+
         if (!task)
                 task = current;
 
@@ -107,7 +52,8 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
 
                 context = (struct thread_info *)
                         ((unsigned long)stack & (~(THREAD_SIZE - 1)));
-                bp = print_context_stack(context, stack, bp, ops, data, NULL);
+                bp = print_context_stack(context, stack, bp, ops,
+                                         data, NULL, &graph);
 
                 stack = (unsigned long *)context->previous_esp;
                 if (!stack)
@@ -119,57 +65,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
 }
 EXPORT_SYMBOL(dump_trace);
 
-static void
-print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
-{
-        printk(data);
-        print_symbol(msg, symbol);
-        printk("\n");
-}
-
-static void print_trace_warning(void *data, char *msg)
-{
-        printk("%s%s\n", (char *)data, msg);
-}
-
-static int print_trace_stack(void *data, char *name)
-{
-        printk("%s <%s> ", (char *)data, name);
-        return 0;
-}
-
-/*
- * Print one address/symbol entries per line.
- */
-static void print_trace_address(void *data, unsigned long addr, int reliable)
-{
-        touch_nmi_watchdog();
-        printk(data);
-        printk_address(addr, reliable);
-}
-
-static const struct stacktrace_ops print_trace_ops = {
-        .warning = print_trace_warning,
-        .warning_symbol = print_trace_warning_symbol,
-        .stack = print_trace_stack,
-        .address = print_trace_address,
-};
-
-static void
-show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
-                unsigned long *stack, unsigned long bp, char *log_lvl)
-{
-        printk("%sCall Trace:\n", log_lvl);
-        dump_trace(task, regs, stack, bp, &print_trace_ops, log_lvl);
-}
-
-void show_trace(struct task_struct *task, struct pt_regs *regs,
-                unsigned long *stack, unsigned long bp)
-{
-        show_trace_log_lvl(task, regs, stack, bp, "");
-}
-
-static void
+void
 show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
                 unsigned long *sp, unsigned long bp, char *log_lvl)
 {
@@ -196,33 +92,6 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
         show_trace_log_lvl(task, regs, sp, bp, log_lvl);
 }
 
-void show_stack(struct task_struct *task, unsigned long *sp)
-{
-        show_stack_log_lvl(task, NULL, sp, 0, "");
-}
-
-/*
- * The architecture-independent dump_stack generator
- */
-void dump_stack(void)
-{
-        unsigned long bp = 0;
-        unsigned long stack;
-
-#ifdef CONFIG_FRAME_POINTER
-        if (!bp)
-                get_bp(bp);
-#endif
-
-        printk("Pid: %d, comm: %.20s %s %s %.*s\n",
-                current->pid, current->comm, print_tainted(),
-                init_utsname()->release,
-                (int)strcspn(init_utsname()->version, " "),
-                init_utsname()->version);
-        show_trace(NULL, NULL, &stack, bp);
-}
-
-EXPORT_SYMBOL(dump_stack);
 
 void show_registers(struct pt_regs *regs)
 {
@@ -283,167 +152,3 @@ int is_valid_bugaddr(unsigned long ip)
         return ud2 == 0x0b0f;
 }
 
-static raw_spinlock_t die_lock = __RAW_SPIN_LOCK_UNLOCKED;
-static int die_owner = -1;
-static unsigned int die_nest_count;
-
-unsigned __kprobes long oops_begin(void)
-{
-        unsigned long flags;
-
-        oops_enter();
-
-        if (die_owner != raw_smp_processor_id()) {
-                console_verbose();
-                raw_local_irq_save(flags);
-                __raw_spin_lock(&die_lock);
-                die_owner = smp_processor_id();
-                die_nest_count = 0;
-                bust_spinlocks(1);
-        } else {
-                raw_local_irq_save(flags);
-        }
-        die_nest_count++;
-        return flags;
-}
-
-void __kprobes oops_end(unsigned long flags, struct pt_regs *regs, int signr)
-{
-        bust_spinlocks(0);
-        die_owner = -1;
-        add_taint(TAINT_DIE);
-        __raw_spin_unlock(&die_lock);
-        raw_local_irq_restore(flags);
-
-        if (!regs)
-                return;
-
-        if (kexec_should_crash(current))
-                crash_kexec(regs);
-        if (in_interrupt())
-                panic("Fatal exception in interrupt");
-        if (panic_on_oops)
-                panic("Fatal exception");
-        oops_exit();
-        do_exit(signr);
-}
-
-int __kprobes __die(const char *str, struct pt_regs *regs, long err)
-{
-        unsigned short ss;
-        unsigned long sp;
-
-        printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
-#ifdef CONFIG_PREEMPT
-        printk("PREEMPT ");
-#endif
-#ifdef CONFIG_SMP
-        printk("SMP ");
-#endif
-#ifdef CONFIG_DEBUG_PAGEALLOC
-        printk("DEBUG_PAGEALLOC");
-#endif
-        printk("\n");
-        sysfs_printk_last_file();
-        if (notify_die(DIE_OOPS, str, regs, err,
-                        current->thread.trap_no, SIGSEGV) == NOTIFY_STOP)
-                return 1;
-
-        show_registers(regs);
-        /* Executive summary in case the oops scrolled away */
-        sp = (unsigned long) (&regs->sp);
-        savesegment(ss, ss);
-        if (user_mode(regs)) {
-                sp = regs->sp;
-                ss = regs->ss & 0xffff;
-        }
-        printk(KERN_EMERG "EIP: [<%08lx>] ", regs->ip);
-        print_symbol("%s", regs->ip);
-        printk(" SS:ESP %04x:%08lx\n", ss, sp);
-        return 0;
-}
-
-/*
- * This is gone through when something in the kernel has done something bad
- * and is about to be terminated:
- */
-void die(const char *str, struct pt_regs *regs, long err)
-{
-        unsigned long flags = oops_begin();
-
-        if (die_nest_count < 3) {
-                report_bug(regs->ip, regs);
-
-                if (__die(str, regs, err))
-                        regs = NULL;
-        } else {
-                printk(KERN_EMERG "Recursive die() failure, output suppressed\n");
-        }
-
-        oops_end(flags, regs, SIGSEGV);
-}
-
-static DEFINE_SPINLOCK(nmi_print_lock);
-
-void notrace __kprobes
-die_nmi(char *str, struct pt_regs *regs, int do_panic)
-{
-        if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
-                return;
-
-        spin_lock(&nmi_print_lock);
-        /*
-        * We are in trouble anyway, lets at least try
-        * to get a message out:
-        */
-        bust_spinlocks(1);
-        printk(KERN_EMERG "%s", str);
-        printk(" on CPU%d, ip %08lx, registers:\n",
-                smp_processor_id(), regs->ip);
-        show_registers(regs);
-        if (do_panic)
-                panic("Non maskable interrupt");
-        console_silent();
-        spin_unlock(&nmi_print_lock);
-
-        /*
-         * If we are in kernel we are probably nested up pretty bad
-         * and might aswell get out now while we still can:
-         */
-        if (!user_mode_vm(regs)) {
-                current->thread.trap_no = 2;
-                crash_kexec(regs);
-        }
-
-        bust_spinlocks(0);
-        do_exit(SIGSEGV);
-}
-
-static int __init oops_setup(char *s)
-{
-        if (!s)
-                return -EINVAL;
-        if (!strcmp(s, "panic"))
-                panic_on_oops = 1;
-        return 0;
-}
-early_param("oops", oops_setup);
-
-static int __init kstack_setup(char *s)
-{
-        if (!s)
-                return -EINVAL;
-        kstack_depth_to_print = simple_strtoul(s, NULL, 0);
-        return 0;
-}
-early_param("kstack", kstack_setup);
-
-static int __init code_bytes_setup(char *s)
-{
-        code_bytes = simple_strtoul(s, NULL, 0);
-        if (code_bytes > 8192)
-                code_bytes = 8192;
-
-        return 1;
-}
-__setup("code_bytes=", code_bytes_setup);
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 96a5db7da8a7..c302d0707048 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -17,19 +17,7 @@
 
 #include <asm/stacktrace.h>
 
-#define STACKSLOTS_PER_LINE 4
-#define get_bp(bp) asm("movq %%rbp, %0" : "=r" (bp) :)
-
-int panic_on_unrecovered_nmi;
-int kstack_depth_to_print = 3 * STACKSLOTS_PER_LINE;
-static unsigned int code_bytes = 64;
-static int die_counter;
-
-void printk_address(unsigned long address, int reliable)
-{
-        printk(" [<%p>] %s%pS\n", (void *) address,
-                        reliable ? "" : "? ", (void *) address);
-}
+#include "dumpstack.h"
 
 static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack,
                                         unsigned *usedp, char **idp)
@@ -113,51 +101,6 @@ static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack,
  * severe exception (double fault, nmi, stack fault, debug, mce) hardware stack
  */
 
-static inline int valid_stack_ptr(struct thread_info *tinfo,
-                        void *p, unsigned int size, void *end)
-{
-        void *t = tinfo;
-        if (end) {
-                if (p < end && p >= (end-THREAD_SIZE))
-                        return 1;
-                else
-                        return 0;
-        }
-        return p > t && p < t + THREAD_SIZE - size;
-}
-
-/* The form of the top of the frame on the stack */
-struct stack_frame {
-        struct stack_frame *next_frame;
-        unsigned long return_address;
-};
-
-static inline unsigned long
-print_context_stack(struct thread_info *tinfo,
-                unsigned long *stack, unsigned long bp,
-                const struct stacktrace_ops *ops, void *data,
-                unsigned long *end)
-{
-        struct stack_frame *frame = (struct stack_frame *)bp;
-
-        while (valid_stack_ptr(tinfo, stack, sizeof(*stack), end)) {
-                unsigned long addr;
-
-                addr = *stack;
-                if (__kernel_text_address(addr)) {
-                        if ((unsigned long) stack == bp + sizeof(long)) {
-                                ops->address(data, addr, 1);
-                                frame = frame->next_frame;
-                                bp = (unsigned long) frame;
-                        } else {
-                                ops->address(data, addr, bp == 0);
-                        }
-                }
-                stack++;
-        }
-        return bp;
-}
-
 void dump_trace(struct task_struct *task, struct pt_regs *regs,
                 unsigned long *stack, unsigned long bp,
                 const struct stacktrace_ops *ops, void *data)
@@ -166,6 +109,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
         unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr;
         unsigned used = 0;
         struct thread_info *tinfo;
+        int graph = 0;
 
         if (!task)
                 task = current;
@@ -206,7 +150,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
                                 break;
 
                         bp = print_context_stack(tinfo, stack, bp, ops,
-                                                        data, estack_end);
+                                                 data, estack_end, &graph);
                         ops->stack(data, "<EOE>");
                         /*
                          * We link to the next stack via the
@@ -225,7 +169,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
                                 if (ops->stack(data, "IRQ") < 0)
                                         break;
                                 bp = print_context_stack(tinfo, stack, bp,
-                                                ops, data, irqstack_end);
+                                        ops, data, irqstack_end, &graph);
                                 /*
                                  * We link to the next stack (which would be
                                  * the process stack normally) the last
@@ -243,62 +187,12 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
         /*
          * This handles the process stack:
          */
-        bp = print_context_stack(tinfo, stack, bp, ops, data, NULL);
+        bp = print_context_stack(tinfo, stack, bp, ops, data, NULL, &graph);
         put_cpu();
 }
 EXPORT_SYMBOL(dump_trace);
 
-static void
-print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
-{
-        printk(data);
-        print_symbol(msg, symbol);
-        printk("\n");
-}
-
-static void print_trace_warning(void *data, char *msg)
-{
-        printk("%s%s\n", (char *)data, msg);
-}
-
-static int print_trace_stack(void *data, char *name)
-{
-        printk("%s <%s> ", (char *)data, name);
-        return 0;
-}
-
-/*
- * Print one address/symbol entries per line.
- */
-static void print_trace_address(void *data, unsigned long addr, int reliable)
-{
-        touch_nmi_watchdog();
-        printk(data);
-        printk_address(addr, reliable);
-}
-
-static const struct stacktrace_ops print_trace_ops = {
-        .warning = print_trace_warning,
-        .warning_symbol = print_trace_warning_symbol,
-        .stack = print_trace_stack,
-        .address = print_trace_address,
-};
-
-static void
-show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
-                unsigned long *stack, unsigned long bp, char *log_lvl)
-{
-        printk("%sCall Trace:\n", log_lvl);
-        dump_trace(task, regs, stack, bp, &print_trace_ops, log_lvl);
-}
-
-void show_trace(struct task_struct *task, struct pt_regs *regs,
-                unsigned long *stack, unsigned long bp)
-{
-        show_trace_log_lvl(task, regs, stack, bp, "");
-}
-
-static void
+void
 show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
                 unsigned long *sp, unsigned long bp, char *log_lvl)
 {
@@ -342,33 +236,6 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
         show_trace_log_lvl(task, regs, sp, bp, log_lvl);
 }
 
-void show_stack(struct task_struct *task, unsigned long *sp)
-{
-        show_stack_log_lvl(task, NULL, sp, 0, "");
-}
-
-/*
- * The architecture-independent dump_stack generator
- */
-void dump_stack(void)
-{
-        unsigned long bp = 0;
-        unsigned long stack;
-
-#ifdef CONFIG_FRAME_POINTER
-        if (!bp)
-                get_bp(bp);
-#endif
-
-        printk("Pid: %d, comm: %.20s %s %s %.*s\n",
-                current->pid, current->comm, print_tainted(),
-                init_utsname()->release,
-                (int)strcspn(init_utsname()->version, " "),
-                init_utsname()->version);
-        show_trace(NULL, NULL, &stack, bp);
-}
-EXPORT_SYMBOL(dump_stack);
-
 void show_registers(struct pt_regs *regs)
 {
         int i;
@@ -429,147 +296,3 @@ int is_valid_bugaddr(unsigned long ip)
         return ud2 == 0x0b0f;
 }
 
-static raw_spinlock_t die_lock = __RAW_SPIN_LOCK_UNLOCKED;
-static int die_owner = -1;
-static unsigned int die_nest_count;
-
-unsigned __kprobes long oops_begin(void)
-{
-        int cpu;
-        unsigned long flags;
-
-        oops_enter();
-
-        /* racy, but better than risking deadlock. */
-        raw_local_irq_save(flags);
-        cpu = smp_processor_id();
-        if (!__raw_spin_trylock(&die_lock)) {
-                if (cpu == die_owner)
-                        /* nested oops. should stop eventually */;
-                else
-                        __raw_spin_lock(&die_lock);
-        }
-        die_nest_count++;
-        die_owner = cpu;
-        console_verbose();
-        bust_spinlocks(1);
-        return flags;
-}
-
-void __kprobes oops_end(unsigned long flags, struct pt_regs *regs, int signr)
-{
-        die_owner = -1;
-        bust_spinlocks(0);
-        die_nest_count--;
-        if (!die_nest_count)
-                /* Nest count reaches zero, release the lock. */
-                __raw_spin_unlock(&die_lock);
-        raw_local_irq_restore(flags);
-        if (!regs) {
-                oops_exit();
-                return;
-        }
-        if (in_interrupt())
-                panic("Fatal exception in interrupt");
-        if (panic_on_oops)
-                panic("Fatal exception");
-        oops_exit();
-        do_exit(signr);
-}
-
-int __kprobes __die(const char *str, struct pt_regs *regs, long err)
-{
-        printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
-#ifdef CONFIG_PREEMPT
-        printk("PREEMPT ");
-#endif
-#ifdef CONFIG_SMP
-        printk("SMP ");
-#endif
-#ifdef CONFIG_DEBUG_PAGEALLOC
-        printk("DEBUG_PAGEALLOC");
-#endif
-        printk("\n");
-        sysfs_printk_last_file();
-        if (notify_die(DIE_OOPS, str, regs, err,
-                        current->thread.trap_no, SIGSEGV) == NOTIFY_STOP)
-                return 1;
-
-        show_registers(regs);
-        add_taint(TAINT_DIE);
-        /* Executive summary in case the oops scrolled away */
-        printk(KERN_ALERT "RIP ");
-        printk_address(regs->ip, 1);
-        printk(" RSP <%016lx>\n", regs->sp);
-        if (kexec_should_crash(current))
-                crash_kexec(regs);
-        return 0;
-}
-
-void die(const char *str, struct pt_regs *regs, long err)
-{
-        unsigned long flags = oops_begin();
-
-        if (!user_mode(regs))
-                report_bug(regs->ip, regs);
-
-        if (__die(str, regs, err))
-                regs = NULL;
-        oops_end(flags, regs, SIGSEGV);
-}
-
-notrace __kprobes void
-die_nmi(char *str, struct pt_regs *regs, int do_panic)
-{
-        unsigned long flags;
-
-        if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
-                return;
-
-        flags = oops_begin();
-        /*
-         * We are in trouble anyway, lets at least try
-         * to get a message out.
-         */
-        printk(KERN_EMERG "%s", str);
-        printk(" on CPU%d, ip %08lx, registers:\n",
-                smp_processor_id(), regs->ip);
-        show_registers(regs);
-        if (kexec_should_crash(current))
-                crash_kexec(regs);
-        if (do_panic || panic_on_oops)
-                panic("Non maskable interrupt");
-        oops_end(flags, NULL, SIGBUS);
-        nmi_exit();
-        local_irq_enable();
-        do_exit(SIGBUS);
-}
-
-static int __init oops_setup(char *s)
-{
-        if (!s)
-                return -EINVAL;
-        if (!strcmp(s, "panic"))
-                panic_on_oops = 1;
-        return 0;
-}
-early_param("oops", oops_setup);
-
-static int __init kstack_setup(char *s)
-{
-        if (!s)
-                return -EINVAL;
-        kstack_depth_to_print = simple_strtoul(s, NULL, 0);
-        return 0;
-}
-early_param("kstack", kstack_setup);
-
-static int __init code_bytes_setup(char *s)
-{
-        code_bytes = simple_strtoul(s, NULL, 0);
-        if (code_bytes > 8192)
-                code_bytes = 8192;
-
-        return 1;
-}
-__setup("code_bytes=", code_bytes_setup);
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 7aafeb5263ef..65a13943e098 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -677,22 +677,6 @@ struct early_res {
 };
 static struct early_res early_res[MAX_EARLY_RES] __initdata = {
         { 0, PAGE_SIZE, "BIOS data page" },     /* BIOS data page */
-#if defined(CONFIG_X86_64) && defined(CONFIG_X86_TRAMPOLINE)
-        { TRAMPOLINE_BASE, TRAMPOLINE_BASE + 2 * PAGE_SIZE, "TRAMPOLINE" },
-#endif
-#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
-        /*
-         * But first pinch a few for the stack/trampoline stuff
-         * FIXME: Don't need the extra page at 4K, but need to fix
-         * trampoline before removing it. (see the GDT stuff)
-         */
-        { PAGE_SIZE, PAGE_SIZE + PAGE_SIZE, "EX TRAMPOLINE" },
-        /*
-         * Has to be in very low memory so we can execute
-         * real-mode AP code.
-         */
-        { TRAMPOLINE_BASE, TRAMPOLINE_BASE + PAGE_SIZE, "TRAMPOLINE" },
-#endif
         {}
 };
 
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 1b894b72c0f5..744aa7fc49d5 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -17,6 +17,7 @@
 #include <asm/io_apic.h>
 #include <asm/apic.h>
 #include <asm/iommu.h>
+#include <asm/gart.h>
 
 static void __init fix_hypertransport_config(int num, int slot, int func)
 {
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 34ad997d3834..504ad198e4ad 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -875,49 +875,6 @@ static struct console early_dbgp_console = {
 };
 #endif
 
-/* Console interface to a host file on AMD's SimNow! */
-
-static int simnow_fd;
-
-enum {
-        MAGIC1 = 0xBACCD00A,
-        MAGIC2 = 0xCA110000,
-        XOPEN = 5,
-        XWRITE = 4,
-};
-
-static noinline long simnow(long cmd, long a, long b, long c)
-{
-        long ret;
-
-        asm volatile("cpuid" :
-                     "=a" (ret) :
-                     "b" (a), "c" (b), "d" (c), "0" (MAGIC1), "D" (cmd + MAGIC2));
-        return ret;
-}
-
-static void __init simnow_init(char *str)
-{
-        char *fn = "klog";
-
-        if (*str == '=')
-                fn = ++str;
-        /* error ignored */
-        simnow_fd = simnow(XOPEN, (unsigned long)fn, O_WRONLY|O_APPEND|O_CREAT, 0644);
-}
-
-static void simnow_write(struct console *con, const char *s, unsigned n)
-{
-        simnow(XWRITE, simnow_fd, (unsigned long)s, n);
-}
-
-static struct console simnow_console = {
-        .name =         "simnow",
-        .write =        simnow_write,
-        .flags =        CON_PRINTBUFFER,
-        .index =        -1,
-};
-
 /* Direct interface for emergencies */
 static struct console *early_console = &early_vga_console;
 static int __initdata early_console_initialized;
@@ -929,7 +886,7 @@ asmlinkage void early_printk(const char *fmt, ...)
         va_list ap;
 
         va_start(ap, fmt);
-        n = vscnprintf(buf, 512, fmt, ap);
+        n = vscnprintf(buf, sizeof(buf), fmt, ap);
         early_console->write(early_console, buf, n);
         va_end(ap);
 }
@@ -960,10 +917,6 @@ static int __init setup_early_printk(char *buf)
                 max_ypos = boot_params.screen_info.orig_video_lines;
                 current_ypos = boot_params.screen_info.orig_y;
                 early_console = &early_vga_console;
-        } else if (!strncmp(buf, "simnow", 6)) {
-                simnow_init(buf + 6);
-                early_console = &simnow_console;
-                keep_early = 1;
 #ifdef CONFIG_EARLY_PRINTK_DBGP
         } else if (!strncmp(buf, "dbgp", 4)) {
                 if (early_dbgp_init(buf+4) < 0)
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 28b597ef9ca1..d6f0490a7391 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -619,28 +619,37 @@ END(syscall_badsys)
 27:;
 
 /*
- * Build the entry stubs and pointer table with
- * some assembler magic.
+ * Build the entry stubs and pointer table with some assembler magic.
+ * We pack 7 stubs into a single 32-byte chunk, which will fit in a
+ * single cache line on all modern x86 implementations.
  */
-.section .rodata,"a"
+.section .init.rodata,"a"
 ENTRY(interrupt)
 .text
-
+        .p2align 5
+        .p2align CONFIG_X86_L1_CACHE_SHIFT
 ENTRY(irq_entries_start)
         RING0_INT_FRAME
-vector=0
-.rept NR_VECTORS
-        ALIGN
- .if vector
+vector=FIRST_EXTERNAL_VECTOR
+.rept (NR_VECTORS-FIRST_EXTERNAL_VECTOR+6)/7
+        .balign 32
+  .rept 7
+    .if vector < NR_VECTORS
+      .if vector <> FIRST_EXTERNAL_VECTOR
         CFI_ADJUST_CFA_OFFSET -4
- .endif
-1:      pushl $~(vector)
+      .endif
+1:      pushl $(~vector+0x80)   /* Note: always in signed byte range */
         CFI_ADJUST_CFA_OFFSET 4
-        jmp common_interrupt
- .previous
+      .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
+        jmp 2f
+      .endif
+      .previous
         .long 1b
- .text
+      .text
 vector=vector+1
+    .endif
+  .endr
+2:      jmp common_interrupt
 .endr
 END(irq_entries_start)
 
@@ -652,8 +661,9 @@ END(interrupt)
  * the CPU automatically disables interrupts when executing an IRQ vector,
  * so IRQ-flags tracing has to follow that:
  */
-        ALIGN
+        .p2align CONFIG_X86_L1_CACHE_SHIFT
 common_interrupt:
+        addl $-0x80,(%esp)      /* Adjust vector into the [-256,-1] range */
         SAVE_ALL
         TRACE_IRQS_OFF
         movl %esp,%eax
@@ -678,65 +688,6 @@ ENDPROC(name)
 /* The include is where all of the SMP etc. interrupts come from */
 #include "entry_arch.h"
 
-KPROBE_ENTRY(page_fault)
-        RING0_EC_FRAME
-        pushl $do_page_fault
-        CFI_ADJUST_CFA_OFFSET 4
-        ALIGN
-error_code:
-        /* the function address is in %fs's slot on the stack */
-        pushl %es
-        CFI_ADJUST_CFA_OFFSET 4
-        /*CFI_REL_OFFSET es, 0*/
-        pushl %ds
-        CFI_ADJUST_CFA_OFFSET 4
-        /*CFI_REL_OFFSET ds, 0*/
-        pushl %eax
-        CFI_ADJUST_CFA_OFFSET 4
-        CFI_REL_OFFSET eax, 0
-        pushl %ebp
-        CFI_ADJUST_CFA_OFFSET 4
-        CFI_REL_OFFSET ebp, 0
-        pushl %edi
-        CFI_ADJUST_CFA_OFFSET 4
-        CFI_REL_OFFSET edi, 0
-        pushl %esi
-        CFI_ADJUST_CFA_OFFSET 4
-        CFI_REL_OFFSET esi, 0
-        pushl %edx
-        CFI_ADJUST_CFA_OFFSET 4
-        CFI_REL_OFFSET edx, 0
-        pushl %ecx
-        CFI_ADJUST_CFA_OFFSET 4
-        CFI_REL_OFFSET ecx, 0
-        pushl %ebx
-        CFI_ADJUST_CFA_OFFSET 4
-        CFI_REL_OFFSET ebx, 0
-        cld
-        pushl %fs
-        CFI_ADJUST_CFA_OFFSET 4
-        /*CFI_REL_OFFSET fs, 0*/
-        movl $(__KERNEL_PERCPU), %ecx
-        movl %ecx, %fs
-        UNWIND_ESPFIX_STACK
-        popl %ecx
-        CFI_ADJUST_CFA_OFFSET -4
-        /*CFI_REGISTER es, ecx*/
-        movl PT_FS(%esp), %edi          # get the function address
-        movl PT_ORIG_EAX(%esp), %edx    # get the error code
-        movl $-1, PT_ORIG_EAX(%esp)     # no syscall to restart
-        mov  %ecx, PT_FS(%esp)
-        /*CFI_REL_OFFSET fs, ES*/
-        movl $(__USER_DS), %ecx
-        movl %ecx, %ds
-        movl %ecx, %es
-        TRACE_IRQS_OFF
-        movl %esp,%eax                  # pt_regs pointer
-        call *%edi
-        jmp ret_from_exception
-        CFI_ENDPROC
-KPROBE_END(page_fault)
-
 ENTRY(coprocessor_error)
         RING0_INT_FRAME
         pushl $0
@@ -767,140 +718,6 @@ ENTRY(device_not_available)
         CFI_ENDPROC
 END(device_not_available)
 
-/*
- * Debug traps and NMI can happen at the one SYSENTER instruction
- * that sets up the real kernel stack. Check here, since we can't
- * allow the wrong stack to be used.
- *
- * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have
- * already pushed 3 words if it hits on the sysenter instruction:
- * eflags, cs and eip.
- *
- * We just load the right stack, and push the three (known) values
- * by hand onto the new stack - while updating the return eip past
- * the instruction that would have done it for sysenter.
- */
-#define FIX_STACK(offset, ok, label)            \
-        cmpw $__KERNEL_CS,4(%esp);              \
-        jne ok;                                 \
-label:                                          \
-        movl TSS_sysenter_sp0+offset(%esp),%esp;        \
-        CFI_DEF_CFA esp, 0;                     \
-        CFI_UNDEFINED eip;                      \
-        pushfl;                                 \
-        CFI_ADJUST_CFA_OFFSET 4;                \
-        pushl $__KERNEL_CS;                     \
-        CFI_ADJUST_CFA_OFFSET 4;                \
-        pushl $sysenter_past_esp;               \
-        CFI_ADJUST_CFA_OFFSET 4;                \
-        CFI_REL_OFFSET eip, 0
-
-KPROBE_ENTRY(debug)
-        RING0_INT_FRAME
-        cmpl $ia32_sysenter_target,(%esp)
-        jne debug_stack_correct
-        FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn)
-debug_stack_correct:
-        pushl $-1                       # mark this as an int
-        CFI_ADJUST_CFA_OFFSET 4
-        SAVE_ALL
-        TRACE_IRQS_OFF
-        xorl %edx,%edx                  # error code 0
-        movl %esp,%eax                  # pt_regs pointer
-        call do_debug
-        jmp ret_from_exception
-        CFI_ENDPROC
-KPROBE_END(debug)
-
-/*
- * NMI is doubly nasty. It can happen _while_ we're handling
- * a debug fault, and the debug fault hasn't yet been able to
- * clear up the stack. So we first check whether we got  an
- * NMI on the sysenter entry path, but after that we need to
- * check whether we got an NMI on the debug path where the debug
- * fault happened on the sysenter path.
- */
-KPROBE_ENTRY(nmi)
-        RING0_INT_FRAME
-        pushl %eax
-        CFI_ADJUST_CFA_OFFSET 4
-        movl %ss, %eax
-        cmpw $__ESPFIX_SS, %ax
-        popl %eax
-        CFI_ADJUST_CFA_OFFSET -4
-        je nmi_espfix_stack
-        cmpl $ia32_sysenter_target,(%esp)
-        je nmi_stack_fixup
-        pushl %eax
-        CFI_ADJUST_CFA_OFFSET 4
-        movl %esp,%eax
-        /* Do not access memory above the end of our stack page,
-         * it might not exist.
-         */
-        andl $(THREAD_SIZE-1),%eax
-        cmpl $(THREAD_SIZE-20),%eax
-        popl %eax
-        CFI_ADJUST_CFA_OFFSET -4
-        jae nmi_stack_correct
-        cmpl $ia32_sysenter_target,12(%esp)
-        je nmi_debug_stack_check
-nmi_stack_correct:
-        /* We have a RING0_INT_FRAME here */
-        pushl %eax
-        CFI_ADJUST_CFA_OFFSET 4
-        SAVE_ALL
-        TRACE_IRQS_OFF
-        xorl %edx,%edx          # zero error code
-        movl %esp,%eax          # pt_regs pointer
-        call do_nmi
-        jmp restore_nocheck_notrace
-        CFI_ENDPROC
-
-nmi_stack_fixup:
-        RING0_INT_FRAME
-        FIX_STACK(12,nmi_stack_correct, 1)
-        jmp nmi_stack_correct
-
-nmi_debug_stack_check:
-        /* We have a RING0_INT_FRAME here */
-        cmpw $__KERNEL_CS,16(%esp)
-        jne nmi_stack_correct
-        cmpl $debug,(%esp)
-        jb nmi_stack_correct
-        cmpl $debug_esp_fix_insn,(%esp)
-        ja nmi_stack_correct
-        FIX_STACK(24,nmi_stack_correct, 1)
-        jmp nmi_stack_correct
-
-nmi_espfix_stack:
-        /* We have a RING0_INT_FRAME here.
-         *
-         * create the pointer to lss back
-         */
-        pushl %ss
-        CFI_ADJUST_CFA_OFFSET 4
-        pushl %esp
-        CFI_ADJUST_CFA_OFFSET 4
-        addw $4, (%esp)
-        /* copy the iret frame of 12 bytes */
-        .rept 3
-        pushl 16(%esp)
-        CFI_ADJUST_CFA_OFFSET 4
-        .endr
-        pushl %eax
-        CFI_ADJUST_CFA_OFFSET 4
-        SAVE_ALL
-        TRACE_IRQS_OFF
-        FIXUP_ESPFIX_STACK              # %eax == %esp
-        xorl %edx,%edx                  # zero error code
-        call do_nmi
-        RESTORE_REGS
-        lss 12+4(%esp), %esp            # back to espfix stack
-        CFI_ADJUST_CFA_OFFSET -24
-        jmp irq_return
-        CFI_ENDPROC
-KPROBE_END(nmi)
-
 #ifdef CONFIG_PARAVIRT
 ENTRY(native_iret)
         iret
@@ -916,19 +733,6 @@ ENTRY(native_irq_enable_sysexit)
 END(native_irq_enable_sysexit)
 #endif
 
-KPROBE_ENTRY(int3)
-        RING0_INT_FRAME
-        pushl $-1                       # mark this as an int
-        CFI_ADJUST_CFA_OFFSET 4
-        SAVE_ALL
-        TRACE_IRQS_OFF
-        xorl %edx,%edx          # zero error code
-        movl %esp,%eax          # pt_regs pointer
-        call do_int3
-        jmp ret_from_exception
-        CFI_ENDPROC
-KPROBE_END(int3)
-
 ENTRY(overflow)
         RING0_INT_FRAME
         pushl $0
@@ -993,14 +797,6 @@ ENTRY(stack_segment)
         CFI_ENDPROC
 END(stack_segment)
 
-KPROBE_ENTRY(general_protection)
-        RING0_EC_FRAME
-        pushl $do_general_protection
-        CFI_ADJUST_CFA_OFFSET 4
-        jmp error_code
-        CFI_ENDPROC
-KPROBE_END(general_protection)
-
 ENTRY(alignment_check)
         RING0_EC_FRAME
         pushl $do_alignment_check
@@ -1051,6 +847,7 @@ ENTRY(kernel_thread_helper)
         push %eax
         CFI_ADJUST_CFA_OFFSET 4
         call do_exit
+        ud2                     # padding for call trace
         CFI_ENDPROC
 ENDPROC(kernel_thread_helper)
 
@@ -1157,6 +954,9 @@ ENTRY(mcount)
 END(mcount)
 
 ENTRY(ftrace_caller)
+        cmpl $0, function_trace_stop
+        jne  ftrace_stub
+
         pushl %eax
         pushl %ecx
         pushl %edx
@@ -1171,6 +971,11 @@ ftrace_call:
         popl %edx
         popl %ecx
         popl %eax
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+.globl ftrace_graph_call
+ftrace_graph_call:
+        jmp ftrace_stub
+#endif
 
 .globl ftrace_stub
 ftrace_stub:
@@ -1180,8 +985,18 @@ END(ftrace_caller)
 #else /* ! CONFIG_DYNAMIC_FTRACE */
 
 ENTRY(mcount)
+        cmpl $0, function_trace_stop
+        jne  ftrace_stub
+
         cmpl $ftrace_stub, ftrace_trace_function
         jnz trace
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        cmpl $ftrace_stub, ftrace_graph_return
+        jnz ftrace_graph_caller
+
+        cmpl $ftrace_graph_entry_stub, ftrace_graph_entry
+        jnz ftrace_graph_caller
+#endif
 .globl ftrace_stub
 ftrace_stub:
         ret
@@ -1200,13 +1015,268 @@ trace:
         popl %edx
         popl %ecx
         popl %eax
-
         jmp ftrace_stub
 END(mcount)
 #endif /* CONFIG_DYNAMIC_FTRACE */
 #endif /* CONFIG_FUNCTION_TRACER */
 
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+ENTRY(ftrace_graph_caller)
+        cmpl $0, function_trace_stop
+        jne ftrace_stub
+
+        pushl %eax
+        pushl %ecx
+        pushl %edx
+        movl 0xc(%esp), %edx
+        lea 0x4(%ebp), %eax
+        subl $MCOUNT_INSN_SIZE, %edx
+        call prepare_ftrace_return
+        popl %edx
+        popl %ecx
+        popl %eax
+        ret
+END(ftrace_graph_caller)
+
+.globl return_to_handler
+return_to_handler:
+        pushl $0
+        pushl %eax
+        pushl %ecx
+        pushl %edx
+        call ftrace_return_to_handler
+        movl %eax, 0xc(%esp)
+        popl %edx
+        popl %ecx
+        popl %eax
+        ret
+#endif
+
 .section .rodata,"a"
 #include "syscall_table_32.S"
 
 syscall_table_size=(.-sys_call_table)
+
+/*
+ * Some functions should be protected against kprobes
+ */
+        .pushsection .kprobes.text, "ax"
+
+ENTRY(page_fault)
+        RING0_EC_FRAME
+        pushl $do_page_fault
+        CFI_ADJUST_CFA_OFFSET 4
+        ALIGN
+error_code:
+        /* the function address is in %fs's slot on the stack */
+        pushl %es
+        CFI_ADJUST_CFA_OFFSET 4
+        /*CFI_REL_OFFSET es, 0*/
+        pushl %ds
+        CFI_ADJUST_CFA_OFFSET 4
+        /*CFI_REL_OFFSET ds, 0*/
+        pushl %eax
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET eax, 0
+        pushl %ebp
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET ebp, 0
+        pushl %edi
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET edi, 0
+        pushl %esi
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET esi, 0
+        pushl %edx
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET edx, 0
+        pushl %ecx
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET ecx, 0
+        pushl %ebx
+        CFI_ADJUST_CFA_OFFSET 4
+        CFI_REL_OFFSET ebx, 0
+        cld
+        pushl %fs
+        CFI_ADJUST_CFA_OFFSET 4
+        /*CFI_REL_OFFSET fs, 0*/
+        movl $(__KERNEL_PERCPU), %ecx
+        movl %ecx, %fs
+        UNWIND_ESPFIX_STACK
+        popl %ecx
+        CFI_ADJUST_CFA_OFFSET -4
+        /*CFI_REGISTER es, ecx*/
+        movl PT_FS(%esp), %edi          # get the function address
+        movl PT_ORIG_EAX(%esp), %edx    # get the error code
+        movl $-1, PT_ORIG_EAX(%esp)     # no syscall to restart
+        mov  %ecx, PT_FS(%esp)
+        /*CFI_REL_OFFSET fs, ES*/
+        movl $(__USER_DS), %ecx
+        movl %ecx, %ds
+        movl %ecx, %es
+        TRACE_IRQS_OFF
+        movl %esp,%eax                  # pt_regs pointer
+        call *%edi
+        jmp ret_from_exception
+        CFI_ENDPROC
+END(page_fault)
+
+/*
+ * Debug traps and NMI can happen at the one SYSENTER instruction
+ * that sets up the real kernel stack. Check here, since we can't
+ * allow the wrong stack to be used.
+ *
+ * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have
+ * already pushed 3 words if it hits on the sysenter instruction:
+ * eflags, cs and eip.
+ *
+ * We just load the right stack, and push the three (known) values
+ * by hand onto the new stack - while updating the return eip past
+ * the instruction that would have done it for sysenter.
+ */
+#define FIX_STACK(offset, ok, label)            \
+        cmpw $__KERNEL_CS,4(%esp);              \
+        jne ok;                                 \
+label:                                          \
+        movl TSS_sysenter_sp0+offset(%esp),%esp;        \
+        CFI_DEF_CFA esp, 0;                     \
+        CFI_UNDEFINED eip;                      \
+        pushfl;                                 \
+        CFI_ADJUST_CFA_OFFSET 4;                \
+        pushl $__KERNEL_CS;                     \
+        CFI_ADJUST_CFA_OFFSET 4;                \
+        pushl $sysenter_past_esp;               \
+        CFI_ADJUST_CFA_OFFSET 4;                \
+        CFI_REL_OFFSET eip, 0
+
+ENTRY(debug)
+        RING0_INT_FRAME
+        cmpl $ia32_sysenter_target,(%esp)
+        jne debug_stack_correct
+        FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn)
+debug_stack_correct:
+        pushl $-1                       # mark this as an int
+        CFI_ADJUST_CFA_OFFSET 4
+        SAVE_ALL
+        TRACE_IRQS_OFF
+        xorl %edx,%edx                  # error code 0
+        movl %esp,%eax                  # pt_regs pointer
+        call do_debug
+        jmp ret_from_exception
+        CFI_ENDPROC
+END(debug)
+
+/*
+ * NMI is doubly nasty. It can happen _while_ we're handling
+ * a debug fault, and the debug fault hasn't yet been able to
+ * clear up the stack. So we first check whether we got  an
+ * NMI on the sysenter entry path, but after that we need to
+ * check whether we got an NMI on the debug path where the debug
+ * fault happened on the sysenter path.
+ */
+ENTRY(nmi)
+        RING0_INT_FRAME
+        pushl %eax
+        CFI_ADJUST_CFA_OFFSET 4
+        movl %ss, %eax
+        cmpw $__ESPFIX_SS, %ax
+        popl %eax
+        CFI_ADJUST_CFA_OFFSET -4
+        je nmi_espfix_stack
+        cmpl $ia32_sysenter_target,(%esp)
+        je nmi_stack_fixup
+        pushl %eax
+        CFI_ADJUST_CFA_OFFSET 4
+        movl %esp,%eax
+        /* Do not access memory above the end of our stack page,
+         * it might not exist.
+         */
+        andl $(THREAD_SIZE-1),%eax
+        cmpl $(THREAD_SIZE-20),%eax
+        popl %eax
+        CFI_ADJUST_CFA_OFFSET -4
+        jae nmi_stack_correct
+        cmpl $ia32_sysenter_target,12(%esp)
+        je nmi_debug_stack_check
+nmi_stack_correct:
+        /* We have a RING0_INT_FRAME here */
+        pushl %eax
+        CFI_ADJUST_CFA_OFFSET 4
+        SAVE_ALL
+        TRACE_IRQS_OFF
+        xorl %edx,%edx          # zero error code
+        movl %esp,%eax          # pt_regs pointer
+        call do_nmi
+        jmp restore_nocheck_notrace
+        CFI_ENDPROC
+
+nmi_stack_fixup:
+        RING0_INT_FRAME
+        FIX_STACK(12,nmi_stack_correct, 1)
+        jmp nmi_stack_correct
+
+nmi_debug_stack_check:
+        /* We have a RING0_INT_FRAME here */
+        cmpw $__KERNEL_CS,16(%esp)
+        jne nmi_stack_correct
+        cmpl $debug,(%esp)
+        jb nmi_stack_correct
+        cmpl $debug_esp_fix_insn,(%esp)
+        ja nmi_stack_correct
+        FIX_STACK(24,nmi_stack_correct, 1)
+        jmp nmi_stack_correct
+
+nmi_espfix_stack:
+        /* We have a RING0_INT_FRAME here.
+         *
+         * create the pointer to lss back
+         */
+        pushl %ss
+        CFI_ADJUST_CFA_OFFSET 4
+        pushl %esp
+        CFI_ADJUST_CFA_OFFSET 4
+        addw $4, (%esp)
+        /* copy the iret frame of 12 bytes */
+        .rept 3
+        pushl 16(%esp)
+        CFI_ADJUST_CFA_OFFSET 4
+        .endr
+        pushl %eax
+        CFI_ADJUST_CFA_OFFSET 4
+        SAVE_ALL
+        TRACE_IRQS_OFF
+        FIXUP_ESPFIX_STACK              # %eax == %esp
+        xorl %edx,%edx                  # zero error code
+        call do_nmi
+        RESTORE_REGS
+        lss 12+4(%esp), %esp            # back to espfix stack
+        CFI_ADJUST_CFA_OFFSET -24
+        jmp irq_return
+        CFI_ENDPROC
+END(nmi)
+
+ENTRY(int3)
+        RING0_INT_FRAME
+        pushl $-1                       # mark this as an int
+        CFI_ADJUST_CFA_OFFSET 4
+        SAVE_ALL
+        TRACE_IRQS_OFF
+        xorl %edx,%edx          # zero error code
+        movl %esp,%eax          # pt_regs pointer
+        call do_int3
+        jmp ret_from_exception
+        CFI_ENDPROC
+END(int3)
+
+ENTRY(general_protection)
+        RING0_EC_FRAME
+        pushl $do_general_protection
+        CFI_ADJUST_CFA_OFFSET 4
+        jmp error_code
+        CFI_ENDPROC
+END(general_protection)
+
+/*
+ * End of kprobes section
+ */
+        .popsection
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index b86f332c96a6..e28c7a987793 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -11,15 +11,15 @@
  *
  * NOTE: This code handles signal-recognition, which happens every time
  * after an interrupt and after each system call.
- * 
- * Normal syscalls and interrupts don't save a full stack frame, this is 
+ *
+ * Normal syscalls and interrupts don't save a full stack frame, this is
  * only done for syscall tracing, signals or fork/exec et.al.
- * 
- * A note on terminology:        
- * - top of stack: Architecture defined interrupt frame from SS to RIP 
- * at the top of the kernel process stack.      
+ *
+ * A note on terminology:
+ * - top of stack: Architecture defined interrupt frame from SS to RIP
+ * at the top of the kernel process stack.
  * - partial stack frame: partially saved registers upto R11.
- * - full stack frame: Like partial stack frame, but all register saved. 
+ * - full stack frame: Like partial stack frame, but all register saved.
  *
  * Some macro usage:
  * - CFI macros are used to generate dwarf2 unwind information for better
@@ -60,7 +60,6 @@
 #define __AUDIT_ARCH_LE    0x40000000
 
         .code64
-
 #ifdef CONFIG_FUNCTION_TRACER
 #ifdef CONFIG_DYNAMIC_FTRACE
 ENTRY(mcount)
@@ -68,16 +67,10 @@ ENTRY(mcount)
 END(mcount)
 
 ENTRY(ftrace_caller)
+        cmpl $0, function_trace_stop
+        jne  ftrace_stub
 
-        /* taken from glibc */
-        subq $0x38, %rsp
-        movq %rax, (%rsp)
-        movq %rcx, 8(%rsp)
-        movq %rdx, 16(%rsp)
-        movq %rsi, 24(%rsp)
-        movq %rdi, 32(%rsp)
-        movq %r8, 40(%rsp)
-        movq %r9, 48(%rsp)
+        MCOUNT_SAVE_FRAME
 
         movq 0x38(%rsp), %rdi
         movq 8(%rbp), %rsi
@@ -87,14 +80,13 @@ ENTRY(ftrace_caller)
 ftrace_call:
         call ftrace_stub
 
-        movq 48(%rsp), %r9
-        movq 40(%rsp), %r8
-        movq 32(%rsp), %rdi
-        movq 24(%rsp), %rsi
-        movq 16(%rsp), %rdx
-        movq 8(%rsp), %rcx
-        movq (%rsp), %rax
-        addq $0x38, %rsp
+        MCOUNT_RESTORE_FRAME
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+.globl ftrace_graph_call
+ftrace_graph_call:
+        jmp ftrace_stub
+#endif
 
 .globl ftrace_stub
 ftrace_stub:
@@ -103,15 +95,63 @@ END(ftrace_caller)
 
 #else /* ! CONFIG_DYNAMIC_FTRACE */
 ENTRY(mcount)
+        cmpl $0, function_trace_stop
+        jne  ftrace_stub
+
         cmpq $ftrace_stub, ftrace_trace_function
         jnz trace
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        cmpq $ftrace_stub, ftrace_graph_return
+        jnz ftrace_graph_caller
+
+        cmpq $ftrace_graph_entry_stub, ftrace_graph_entry
+        jnz ftrace_graph_caller
+#endif
+
 .globl ftrace_stub
 ftrace_stub:
         retq
 
 trace:
-        /* taken from glibc */
-        subq $0x38, %rsp
+        MCOUNT_SAVE_FRAME
+
+        movq 0x38(%rsp), %rdi
+        movq 8(%rbp), %rsi
+        subq $MCOUNT_INSN_SIZE, %rdi
+
+        call   *ftrace_trace_function
+
+        MCOUNT_RESTORE_FRAME
+
+        jmp ftrace_stub
+END(mcount)
+#endif /* CONFIG_DYNAMIC_FTRACE */
+#endif /* CONFIG_FUNCTION_TRACER */
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+ENTRY(ftrace_graph_caller)
+        cmpl $0, function_trace_stop
+        jne ftrace_stub
+
+        MCOUNT_SAVE_FRAME
+
+        leaq 8(%rbp), %rdi
+        movq 0x38(%rsp), %rsi
+        subq $MCOUNT_INSN_SIZE, %rsi
+
+        call    prepare_ftrace_return
+
+        MCOUNT_RESTORE_FRAME
+
+        retq
+END(ftrace_graph_caller)
+
+
+.globl return_to_handler
+return_to_handler:
+        subq  $80, %rsp
+
         movq %rax, (%rsp)
         movq %rcx, 8(%rsp)
         movq %rdx, 16(%rsp)
@@ -119,13 +159,14 @@ trace:
         movq %rdi, 32(%rsp)
         movq %r8, 40(%rsp)
         movq %r9, 48(%rsp)
+        movq %r10, 56(%rsp)
+        movq %r11, 64(%rsp)
 
-        movq 0x38(%rsp), %rdi
-        movq 8(%rbp), %rsi
-        subq $MCOUNT_INSN_SIZE, %rdi
-
-        call   *ftrace_trace_function
+        call ftrace_return_to_handler
 
+        movq %rax, 72(%rsp)
+        movq 64(%rsp), %r11
+        movq 56(%rsp), %r10
         movq 48(%rsp), %r9
         movq 40(%rsp), %r8
         movq 32(%rsp), %rdi
@@ -133,16 +174,14 @@ trace:
         movq 16(%rsp), %rdx
         movq 8(%rsp), %rcx
         movq (%rsp), %rax
-        addq $0x38, %rsp
+        addq $72, %rsp
+        retq
+#endif
 
-        jmp ftrace_stub
-END(mcount)
-#endif /* CONFIG_DYNAMIC_FTRACE */
-#endif /* CONFIG_FUNCTION_TRACER */
 
 #ifndef CONFIG_PREEMPT
 #define retint_kernel retint_restore_args
-#endif  
+#endif
 
 #ifdef CONFIG_PARAVIRT
 ENTRY(native_usergs_sysret64)
@@ -161,29 +200,29 @@ ENTRY(native_usergs_sysret64)
 .endm
 
 /*
- * C code is not supposed to know about undefined top of stack. Every time 
- * a C function with an pt_regs argument is called from the SYSCALL based 
+ * C code is not supposed to know about undefined top of stack. Every time
+ * a C function with an pt_regs argument is called from the SYSCALL based
  * fast path FIXUP_TOP_OF_STACK is needed.
  * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs
  * manipulation.
- */             
-                
-        /* %rsp:at FRAMEEND */ 
-        .macro FIXUP_TOP_OF_STACK tmp
-        movq    %gs:pda_oldrsp,\tmp
-        movq    \tmp,RSP(%rsp)
-        movq    $__USER_DS,SS(%rsp)
-        movq    $__USER_CS,CS(%rsp)
-        movq    $-1,RCX(%rsp)
-        movq    R11(%rsp),\tmp  /* get eflags */
-        movq    \tmp,EFLAGS(%rsp)
+ */
+
+        /* %rsp:at FRAMEEND */
+        .macro FIXUP_TOP_OF_STACK tmp offset=0
+        movq %gs:pda_oldrsp,\tmp
+        movq \tmp,RSP+\offset(%rsp)
+        movq $__USER_DS,SS+\offset(%rsp)
+        movq $__USER_CS,CS+\offset(%rsp)
+        movq $-1,RCX+\offset(%rsp)
+        movq R11+\offset(%rsp),\tmp  /* get eflags */
+        movq \tmp,EFLAGS+\offset(%rsp)
         .endm
 
-        .macro RESTORE_TOP_OF_STACK tmp,offset=0
-        movq   RSP-\offset(%rsp),\tmp
-        movq   \tmp,%gs:pda_oldrsp
-        movq   EFLAGS-\offset(%rsp),\tmp
-        movq   \tmp,R11-\offset(%rsp)
+        .macro RESTORE_TOP_OF_STACK tmp offset=0
+        movq RSP+\offset(%rsp),\tmp
+        movq \tmp,%gs:pda_oldrsp
+        movq EFLAGS+\offset(%rsp),\tmp
+        movq \tmp,R11+\offset(%rsp)
         .endm
 
         .macro FAKE_STACK_FRAME child_rip
@@ -195,7 +234,7 @@ ENTRY(native_usergs_sysret64)
         pushq %rax /* rsp */
         CFI_ADJUST_CFA_OFFSET   8
         CFI_REL_OFFSET  rsp,0
-        pushq $(1<<9) /* eflags - interrupts on */
+        pushq $X86_EFLAGS_IF /* eflags - interrupts on */
         CFI_ADJUST_CFA_OFFSET   8
         /*CFI_REL_OFFSET        rflags,0*/
         pushq $__KERNEL_CS /* cs */
@@ -213,62 +252,184 @@ ENTRY(native_usergs_sysret64)
         CFI_ADJUST_CFA_OFFSET   -(6*8)
         .endm
 
-        .macro  CFI_DEFAULT_STACK start=1
+/*
+ * initial frame state for interrupts (and exceptions without error code)
+ */
+        .macro EMPTY_FRAME start=1 offset=0
         .if \start
-        CFI_STARTPROC   simple
+        CFI_STARTPROC simple
         CFI_SIGNAL_FRAME
-        CFI_DEF_CFA     rsp,SS+8
+        CFI_DEF_CFA rsp,8+\offset
         .else
-        CFI_DEF_CFA_OFFSET SS+8
+        CFI_DEF_CFA_OFFSET 8+\offset
         .endif
-        CFI_REL_OFFSET  r15,R15
-        CFI_REL_OFFSET  r14,R14
-        CFI_REL_OFFSET  r13,R13
-        CFI_REL_OFFSET  r12,R12
-        CFI_REL_OFFSET  rbp,RBP
-        CFI_REL_OFFSET  rbx,RBX
-        CFI_REL_OFFSET  r11,R11
-        CFI_REL_OFFSET  r10,R10
-        CFI_REL_OFFSET  r9,R9
-        CFI_REL_OFFSET  r8,R8
-        CFI_REL_OFFSET  rax,RAX
-        CFI_REL_OFFSET  rcx,RCX
-        CFI_REL_OFFSET  rdx,RDX
-        CFI_REL_OFFSET  rsi,RSI
-        CFI_REL_OFFSET  rdi,RDI
-        CFI_REL_OFFSET  rip,RIP
-        /*CFI_REL_OFFSET        cs,CS*/
-        /*CFI_REL_OFFSET        rflags,EFLAGS*/
-        CFI_REL_OFFSET  rsp,RSP
-        /*CFI_REL_OFFSET        ss,SS*/
         .endm
+
+/*
+ * initial frame state for interrupts (and exceptions without error code)
+ */
+        .macro INTR_FRAME start=1 offset=0
+        EMPTY_FRAME \start, SS+8+\offset-RIP
+        /*CFI_REL_OFFSET ss, SS+\offset-RIP*/
+        CFI_REL_OFFSET rsp, RSP+\offset-RIP
+        /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/
+        /*CFI_REL_OFFSET cs, CS+\offset-RIP*/
+        CFI_REL_OFFSET rip, RIP+\offset-RIP
+        .endm
+
+/*
+ * initial frame state for exceptions with error code (and interrupts
+ * with vector already pushed)
+ */
+        .macro XCPT_FRAME start=1 offset=0
+        INTR_FRAME \start, RIP+\offset-ORIG_RAX
+        /*CFI_REL_OFFSET orig_rax, ORIG_RAX-ORIG_RAX*/
+        .endm
+
 /*
- * A newly forked process directly context switches into this.
- */     
-/* rdi: prev */ 
+ * frame that enables calling into C.
+ */
+        .macro PARTIAL_FRAME start=1 offset=0
+        XCPT_FRAME \start, ORIG_RAX+\offset-ARGOFFSET
+        CFI_REL_OFFSET rdi, RDI+\offset-ARGOFFSET
+        CFI_REL_OFFSET rsi, RSI+\offset-ARGOFFSET
+        CFI_REL_OFFSET rdx, RDX+\offset-ARGOFFSET
+        CFI_REL_OFFSET rcx, RCX+\offset-ARGOFFSET
+        CFI_REL_OFFSET rax, RAX+\offset-ARGOFFSET
+        CFI_REL_OFFSET r8, R8+\offset-ARGOFFSET
+        CFI_REL_OFFSET r9, R9+\offset-ARGOFFSET
+        CFI_REL_OFFSET r10, R10+\offset-ARGOFFSET
+        CFI_REL_OFFSET r11, R11+\offset-ARGOFFSET
+        .endm
+
+/*
+ * frame that enables passing a complete pt_regs to a C function.
+ */
+        .macro DEFAULT_FRAME start=1 offset=0
+        PARTIAL_FRAME \start, R11+\offset-R15
+        CFI_REL_OFFSET rbx, RBX+\offset
+        CFI_REL_OFFSET rbp, RBP+\offset
+        CFI_REL_OFFSET r12, R12+\offset
+        CFI_REL_OFFSET r13, R13+\offset
+        CFI_REL_OFFSET r14, R14+\offset
+        CFI_REL_OFFSET r15, R15+\offset
+        .endm
+
+/* save partial stack frame */
+ENTRY(save_args)
+        XCPT_FRAME
+        cld
+        movq_cfi rdi, RDI+16-ARGOFFSET
+        movq_cfi rsi, RSI+16-ARGOFFSET
+        movq_cfi rdx, RDX+16-ARGOFFSET
+        movq_cfi rcx, RCX+16-ARGOFFSET
+        movq_cfi rax, RAX+16-ARGOFFSET
+        movq_cfi  r8,  R8+16-ARGOFFSET
+        movq_cfi  r9,  R9+16-ARGOFFSET
+        movq_cfi r10, R10+16-ARGOFFSET
+        movq_cfi r11, R11+16-ARGOFFSET
+
+        leaq -ARGOFFSET+16(%rsp),%rdi   /* arg1 for handler */
+        movq_cfi rbp, 8         /* push %rbp */
+        leaq 8(%rsp), %rbp              /* mov %rsp, %ebp */
+        testl $3, CS(%rdi)
+        je 1f
+        SWAPGS
+        /*
+         * irqcount is used to check if a CPU is already on an interrupt stack
+         * or not. While this is essentially redundant with preempt_count it is
+         * a little cheaper to use a separate counter in the PDA (short of
+         * moving irq_enter into assembly, which would be too much work)
+         */
+1:      incl %gs:pda_irqcount
+        jne 2f
+        popq_cfi %rax                   /* move return address... */
+        mov %gs:pda_irqstackptr,%rsp
+        EMPTY_FRAME 0
+        pushq_cfi %rax                  /* ... to the new stack */
+        /*
+         * We entered an interrupt context - irqs are off:
+         */
+2:      TRACE_IRQS_OFF
+        ret
+        CFI_ENDPROC
+END(save_args)
+
+ENTRY(save_rest)
+        PARTIAL_FRAME 1 REST_SKIP+8
+        movq 5*8+16(%rsp), %r11 /* save return address */
+        movq_cfi rbx, RBX+16
+        movq_cfi rbp, RBP+16
+        movq_cfi r12, R12+16
+        movq_cfi r13, R13+16
+        movq_cfi r14, R14+16
+        movq_cfi r15, R15+16
+        movq %r11, 8(%rsp)      /* return address */
+        FIXUP_TOP_OF_STACK %r11, 16
+        ret
+        CFI_ENDPROC
+END(save_rest)
+
+/* save complete stack frame */
+ENTRY(save_paranoid)
+        XCPT_FRAME 1 RDI+8
+        cld
+        movq_cfi rdi, RDI+8
+        movq_cfi rsi, RSI+8
+        movq_cfi rdx, RDX+8
+        movq_cfi rcx, RCX+8
+        movq_cfi rax, RAX+8
+        movq_cfi r8, R8+8
+        movq_cfi r9, R9+8
+        movq_cfi r10, R10+8
+        movq_cfi r11, R11+8
+        movq_cfi rbx, RBX+8
+        movq_cfi rbp, RBP+8
+        movq_cfi r12, R12+8
+        movq_cfi r13, R13+8
+        movq_cfi r14, R14+8
+        movq_cfi r15, R15+8
+        movl $1,%ebx
+        movl $MSR_GS_BASE,%ecx
+        rdmsr
+        testl %edx,%edx
+        js 1f   /* negative -> in kernel */
+        SWAPGS
+        xorl %ebx,%ebx
+1:      ret
+        CFI_ENDPROC
+END(save_paranoid)
+
+/*
+ * A newly forked process directly context switches into this address.
+ *
+ * rdi: prev task we switched from
+ */
 ENTRY(ret_from_fork)
-        CFI_DEFAULT_STACK
+        DEFAULT_FRAME
+
         push kernel_eflags(%rip)
         CFI_ADJUST_CFA_OFFSET 8
-        popf                            # reset kernel eflags
+        popf                                    # reset kernel eflags
         CFI_ADJUST_CFA_OFFSET -8
-        call schedule_tail
+
+        call schedule_tail                      # rdi: 'prev' task parameter
+
         GET_THREAD_INFO(%rcx)
-        testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT),TI_flags(%rcx)
-        jnz rff_trace
-rff_action:     
+
+        CFI_REMEMBER_STATE
         RESTORE_REST
-        testl $3,CS-ARGOFFSET(%rsp)     # from kernel_thread?
+
+        testl $3, CS-ARGOFFSET(%rsp)            # from kernel_thread?
         je   int_ret_from_sys_call
-        testl $_TIF_IA32,TI_flags(%rcx)
+
+        testl $_TIF_IA32, TI_flags(%rcx)        # 32-bit compat task needs IRET
         jnz  int_ret_from_sys_call
-        RESTORE_TOP_OF_STACK %rdi,ARGOFFSET
-        jmp ret_from_sys_call
-rff_trace:
-        movq %rsp,%rdi
-        call syscall_trace_leave
-        GET_THREAD_INFO(%rcx)   
-        jmp rff_action
+
+        RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET
+        jmp ret_from_sys_call                   # go to the SYSRET fastpath
+
+        CFI_RESTORE_STATE
         CFI_ENDPROC
 END(ret_from_fork)
 
@@ -278,20 +439,20 @@ END(ret_from_fork)
  * SYSCALL does not save anything on the stack and does not change the
  * stack pointer.
  */
-                
+
 /*
- * Register setup:      
+ * Register setup:
  * rax  system call number
  * rdi  arg0
- * rcx  return address for syscall/sysret, C arg3 
+ * rcx  return address for syscall/sysret, C arg3
  * rsi  arg1
- * rdx  arg2    
+ * rdx  arg2
  * r10  arg3    (--> moved to rcx for C)
  * r8   arg4
  * r9   arg5
  * r11  eflags for syscall/sysret, temporary for C
- * r12-r15,rbp,rbx saved by C code, not touched.                
- * 
+ * r12-r15,rbp,rbx saved by C code, not touched.
+ *
  * Interrupts are off on entry.
  * Only called from user space.
  *
@@ -301,7 +462,7 @@ END(ret_from_fork)
  * When user can change the frames always force IRET. That is because
  * it deals with uncanonical addresses better. SYSRET has trouble
  * with them due to bugs in both AMD and Intel CPUs.
- */                                     
+ */
 
 ENTRY(system_call)
         CFI_STARTPROC   simple
@@ -317,7 +478,7 @@ ENTRY(system_call)
          */
 ENTRY(system_call_after_swapgs)
 
-        movq    %rsp,%gs:pda_oldrsp 
+        movq    %rsp,%gs:pda_oldrsp
         movq    %gs:pda_kernelstack,%rsp
         /*
          * No need to follow this irqs off/on section - it's straight
@@ -325,7 +486,7 @@ ENTRY(system_call_after_swapgs)
          */
         ENABLE_INTERRUPTS(CLBR_NONE)
         SAVE_ARGS 8,1
-        movq  %rax,ORIG_RAX-ARGOFFSET(%rsp) 
+        movq  %rax,ORIG_RAX-ARGOFFSET(%rsp)
         movq  %rcx,RIP-ARGOFFSET(%rsp)
         CFI_REL_OFFSET rip,RIP-ARGOFFSET
         GET_THREAD_INFO(%rcx)
@@ -339,19 +500,19 @@ system_call_fastpath:
         movq %rax,RAX-ARGOFFSET(%rsp)
 /*
  * Syscall return path ending with SYSRET (fast path)
- * Has incomplete stack frame and undefined top of stack. 
- */             
+ * Has incomplete stack frame and undefined top of stack.
+ */
 ret_from_sys_call:
         movl $_TIF_ALLWORK_MASK,%edi
         /* edi: flagmask */
-sysret_check:           
+sysret_check:
         LOCKDEP_SYS_EXIT
         GET_THREAD_INFO(%rcx)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
         movl TI_flags(%rcx),%edx
         andl %edi,%edx
-        jnz  sysret_careful 
+        jnz  sysret_careful
         CFI_REMEMBER_STATE
         /*
          * sysretq will re-enable interrupts:
@@ -366,7 +527,7 @@ sysret_check:
 
         CFI_RESTORE_STATE
         /* Handle reschedules */
-        /* edx: work, edi: workmask */  
+        /* edx: work, edi: workmask */
 sysret_careful:
         bt $TIF_NEED_RESCHED,%edx
         jnc sysret_signal
@@ -379,7 +540,7 @@ sysret_careful:
         CFI_ADJUST_CFA_OFFSET -8
         jmp sysret_check
 
-        /* Handle a signal */ 
+        /* Handle a signal */
 sysret_signal:
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_NONE)
@@ -388,17 +549,20 @@ sysret_signal:
         jc sysret_audit
 #endif
         /* edx: work flags (arg3) */
-        leaq do_notify_resume(%rip),%rax
         leaq -ARGOFFSET(%rsp),%rdi # &pt_regs -> arg1
         xorl %esi,%esi # oldset -> arg2
-        call ptregscall_common
+        SAVE_REST
+        FIXUP_TOP_OF_STACK %r11
+        call do_notify_resume
+        RESTORE_TOP_OF_STACK %r11
+        RESTORE_REST
         movl $_TIF_WORK_MASK,%edi
         /* Use IRET because user could have changed frame. This
            works because ptregscall_common has called FIXUP_TOP_OF_STACK. */
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
         jmp int_with_check
-        
+
 badsys:
         movq $-ENOSYS,RAX-ARGOFFSET(%rsp)
         jmp ret_from_sys_call
@@ -437,7 +601,7 @@ sysret_audit:
 #endif  /* CONFIG_AUDITSYSCALL */
 
         /* Do syscall tracing */
-tracesys:                        
+tracesys:
 #ifdef CONFIG_AUDITSYSCALL
         testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%rcx)
         jz auditsys
@@ -460,8 +624,8 @@ tracesys:
         call *sys_call_table(,%rax,8)
         movq %rax,RAX-ARGOFFSET(%rsp)
         /* Use IRET because user could have changed frame */
-                
-/* 
+
+/*
  * Syscall return path ending with IRET.
  * Has correct top of stack, but partial stack frame.
  */
@@ -505,18 +669,18 @@ int_very_careful:
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_NONE)
         SAVE_REST
-        /* Check for syscall exit trace */      
+        /* Check for syscall exit trace */
         testl $_TIF_WORK_SYSCALL_EXIT,%edx
         jz int_signal
         pushq %rdi
         CFI_ADJUST_CFA_OFFSET 8
-        leaq 8(%rsp),%rdi       # &ptregs -> arg1       
+        leaq 8(%rsp),%rdi       # &ptregs -> arg1
         call syscall_trace_leave
         popq %rdi
         CFI_ADJUST_CFA_OFFSET -8
         andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
         jmp int_restore_rest
-        
+
 int_signal:
         testl $_TIF_DO_NOTIFY_MASK,%edx
         jz 1f
@@ -531,22 +695,24 @@ int_restore_rest:
         jmp int_with_check
         CFI_ENDPROC
 END(system_call)
-                
-/* 
+
+/*
  * Certain special system calls that need to save a complete full stack frame.
- */                                                             
-        
+ */
         .macro PTREGSCALL label,func,arg
-        .globl \label
-\label:
-        leaq    \func(%rip),%rax
-        leaq    -ARGOFFSET+8(%rsp),\arg /* 8 for return address */
-        jmp     ptregscall_common
+ENTRY(\label)
+        PARTIAL_FRAME 1 8               /* offset 8: return address */
+        subq $REST_SKIP, %rsp
+        CFI_ADJUST_CFA_OFFSET REST_SKIP
+        call save_rest
+        DEFAULT_FRAME 0 8               /* offset 8: return address */
+        leaq 8(%rsp), \arg      /* pt_regs pointer */
+        call \func
+        jmp ptregscall_common
+        CFI_ENDPROC
 END(\label)
         .endm
 
-        CFI_STARTPROC
-
         PTREGSCALL stub_clone, sys_clone, %r8
         PTREGSCALL stub_fork, sys_fork, %rdi
         PTREGSCALL stub_vfork, sys_vfork, %rdi
@@ -554,25 +720,18 @@ END(\label)
         PTREGSCALL stub_iopl, sys_iopl, %rsi
 
 ENTRY(ptregscall_common)
-        popq %r11
-        CFI_ADJUST_CFA_OFFSET -8
-        CFI_REGISTER rip, r11
-        SAVE_REST
-        movq %r11, %r15
-        CFI_REGISTER rip, r15
-        FIXUP_TOP_OF_STACK %r11
-        call *%rax
-        RESTORE_TOP_OF_STACK %r11
-        movq %r15, %r11
-        CFI_REGISTER rip, r11
-        RESTORE_REST
-        pushq %r11
-        CFI_ADJUST_CFA_OFFSET 8
-        CFI_REL_OFFSET rip, 0
-        ret
+        DEFAULT_FRAME 1 8       /* offset 8: return address */
+        RESTORE_TOP_OF_STACK %r11, 8
+        movq_cfi_restore R15+8, r15
+        movq_cfi_restore R14+8, r14
+        movq_cfi_restore R13+8, r13
+        movq_cfi_restore R12+8, r12
+        movq_cfi_restore RBP+8, rbp
+        movq_cfi_restore RBX+8, rbx
+        ret $REST_SKIP          /* pop extended registers */
         CFI_ENDPROC
 END(ptregscall_common)
-        
+
 ENTRY(stub_execve)
         CFI_STARTPROC
         popq %r11
@@ -588,11 +747,11 @@ ENTRY(stub_execve)
         jmp int_ret_from_sys_call
         CFI_ENDPROC
 END(stub_execve)
-        
+
 /*
  * sigreturn is special because it needs to restore all registers on return.
  * This cannot be done with SYSRET, so use the IRET return path instead.
- */                
+ */
 ENTRY(stub_rt_sigreturn)
         CFI_STARTPROC
         addq $8, %rsp
@@ -608,70 +767,70 @@ ENTRY(stub_rt_sigreturn)
 END(stub_rt_sigreturn)
 
 /*
- * initial frame state for interrupts and exceptions
+ * Build the entry stubs and pointer table with some assembler magic.
+ * We pack 7 stubs into a single 32-byte chunk, which will fit in a
+ * single cache line on all modern x86 implementations.
  */
-        .macro _frame ref
-        CFI_STARTPROC simple
-        CFI_SIGNAL_FRAME
-        CFI_DEF_CFA rsp,SS+8-\ref
-        /*CFI_REL_OFFSET ss,SS-\ref*/
-        CFI_REL_OFFSET rsp,RSP-\ref
-        /*CFI_REL_OFFSET rflags,EFLAGS-\ref*/
-        /*CFI_REL_OFFSET cs,CS-\ref*/
-        CFI_REL_OFFSET rip,RIP-\ref
-        .endm
+        .section .init.rodata,"a"
+ENTRY(interrupt)
+        .text
+        .p2align 5
+        .p2align CONFIG_X86_L1_CACHE_SHIFT
+ENTRY(irq_entries_start)
+        INTR_FRAME
+vector=FIRST_EXTERNAL_VECTOR
+.rept (NR_VECTORS-FIRST_EXTERNAL_VECTOR+6)/7
+        .balign 32
+  .rept 7
+    .if vector < NR_VECTORS
+      .if vector <> FIRST_EXTERNAL_VECTOR
+        CFI_ADJUST_CFA_OFFSET -8
+      .endif
+1:      pushq $(~vector+0x80)   /* Note: always in signed byte range */
+        CFI_ADJUST_CFA_OFFSET 8
+      .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
+        jmp 2f
+      .endif
+      .previous
+        .quad 1b
+      .text
+vector=vector+1
+    .endif
+  .endr
+2:      jmp common_interrupt
+.endr
+        CFI_ENDPROC
+END(irq_entries_start)
 
-/* initial frame state for interrupts (and exceptions without error code) */
-#define INTR_FRAME _frame RIP
-/* initial frame state for exceptions with error code (and interrupts with
-   vector already pushed) */
-#define XCPT_FRAME _frame ORIG_RAX
+.previous
+END(interrupt)
+.previous
 
-/* 
+/*
  * Interrupt entry/exit.
  *
  * Interrupt entry points save only callee clobbered registers in fast path.
- *      
- * Entry runs with interrupts off.      
- */ 
+ *
+ * Entry runs with interrupts off.
+ */
 
-/* 0(%rsp): interrupt number */ 
+/* 0(%rsp): ~(interrupt number) */
         .macro interrupt func
-        cld
-        SAVE_ARGS
-        leaq -ARGOFFSET(%rsp),%rdi      # arg1 for handler
-        pushq %rbp
-        /*
-         * Save rbp twice: One is for marking the stack frame, as usual, and the
-         * other, to fill pt_regs properly. This is because bx comes right
-         * before the last saved register in that structure, and not bp. If the
-         * base pointer were in the place bx is today, this would not be needed.
-         */
-        movq %rbp, -8(%rsp)
-        CFI_ADJUST_CFA_OFFSET   8
-        CFI_REL_OFFSET          rbp, 0
-        movq %rsp,%rbp
-        CFI_DEF_CFA_REGISTER    rbp
-        testl $3,CS(%rdi)
-        je 1f
-        SWAPGS
-        /* irqcount is used to check if a CPU is already on an interrupt
-           stack or not. While this is essentially redundant with preempt_count
-           it is a little cheaper to use a separate counter in the PDA
-           (short of moving irq_enter into assembly, which would be too
-            much work) */
-1:      incl    %gs:pda_irqcount
-        cmoveq %gs:pda_irqstackptr,%rsp
-        push    %rbp                    # backlink for old unwinder
-        /*
-         * We entered an interrupt context - irqs are off:
-         */
-        TRACE_IRQS_OFF
+        subq $10*8, %rsp
+        CFI_ADJUST_CFA_OFFSET 10*8
+        call save_args
+        PARTIAL_FRAME 0
         call \func
         .endm
 
-ENTRY(common_interrupt)
+        /*
+         * The interrupt stubs push (~vector+0x80) onto the stack and
+         * then jump to common_interrupt.
+         */
+        .p2align CONFIG_X86_L1_CACHE_SHIFT
+common_interrupt:
         XCPT_FRAME
+        addq $-0x80,(%rsp)              /* Adjust vector to [-256,-1] range */
         interrupt do_IRQ
         /* 0(%rsp): oldrsp-ARGOFFSET */
 ret_from_intr:
@@ -685,12 +844,12 @@ exit_intr:
         GET_THREAD_INFO(%rcx)
         testl $3,CS-ARGOFFSET(%rsp)
         je retint_kernel
-        
+
         /* Interrupt came from user space */
         /*
          * Has a correct top of stack, but a partial stack frame
          * %rcx: thread info. Interrupts off.
-         */             
+         */
 retint_with_reschedule:
         movl $_TIF_WORK_MASK,%edi
 retint_check:
@@ -763,20 +922,20 @@ retint_careful:
         pushq %rdi
         CFI_ADJUST_CFA_OFFSET   8
         call  schedule
-        popq %rdi               
+        popq %rdi
         CFI_ADJUST_CFA_OFFSET   -8
         GET_THREAD_INFO(%rcx)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
         jmp retint_check
-        
+
 retint_signal:
         testl $_TIF_DO_NOTIFY_MASK,%edx
         jz    retint_swapgs
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_NONE)
         SAVE_REST
-        movq $-1,ORIG_RAX(%rsp)                         
+        movq $-1,ORIG_RAX(%rsp)
         xorl %esi,%esi          # oldset
         movq %rsp,%rdi          # &pt_regs
         call do_notify_resume
@@ -798,324 +957,211 @@ ENTRY(retint_kernel)
         jnc  retint_restore_args
         call preempt_schedule_irq
         jmp exit_intr
-#endif  
+#endif
 
         CFI_ENDPROC
 END(common_interrupt)
-        
+
 /*
  * APIC interrupts.
- */             
-        .macro apicinterrupt num,func
+ */
+.macro apicinterrupt num sym do_sym
+ENTRY(\sym)
         INTR_FRAME
         pushq $~(\num)
         CFI_ADJUST_CFA_OFFSET 8
-        interrupt \func
+        interrupt \do_sym
         jmp ret_from_intr
         CFI_ENDPROC
-        .endm
-
-ENTRY(thermal_interrupt)
-        apicinterrupt THERMAL_APIC_VECTOR,smp_thermal_interrupt
-END(thermal_interrupt)
-
-ENTRY(threshold_interrupt)
-        apicinterrupt THRESHOLD_APIC_VECTOR,mce_threshold_interrupt
-END(threshold_interrupt)
-
-#ifdef CONFIG_SMP       
-ENTRY(reschedule_interrupt)
-        apicinterrupt RESCHEDULE_VECTOR,smp_reschedule_interrupt
-END(reschedule_interrupt)
-
-        .macro INVALIDATE_ENTRY num
-ENTRY(invalidate_interrupt\num)
-        apicinterrupt INVALIDATE_TLB_VECTOR_START+\num,smp_invalidate_interrupt 
-END(invalidate_interrupt\num)
-        .endm
+END(\sym)
+.endm
 
-        INVALIDATE_ENTRY 0
-        INVALIDATE_ENTRY 1
-        INVALIDATE_ENTRY 2
-        INVALIDATE_ENTRY 3
-        INVALIDATE_ENTRY 4
-        INVALIDATE_ENTRY 5
-        INVALIDATE_ENTRY 6
-        INVALIDATE_ENTRY 7
-
-ENTRY(call_function_interrupt)
-        apicinterrupt CALL_FUNCTION_VECTOR,smp_call_function_interrupt
-END(call_function_interrupt)
-ENTRY(call_function_single_interrupt)
-        apicinterrupt CALL_FUNCTION_SINGLE_VECTOR,smp_call_function_single_interrupt
-END(call_function_single_interrupt)
-ENTRY(irq_move_cleanup_interrupt)
-        apicinterrupt IRQ_MOVE_CLEANUP_VECTOR,smp_irq_move_cleanup_interrupt
-END(irq_move_cleanup_interrupt)
+#ifdef CONFIG_SMP
+apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \
+        irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
 #endif
 
-ENTRY(apic_timer_interrupt)
-        apicinterrupt LOCAL_TIMER_VECTOR,smp_apic_timer_interrupt
-END(apic_timer_interrupt)
+apicinterrupt UV_BAU_MESSAGE \
+        uv_bau_message_intr1 uv_bau_message_interrupt
+apicinterrupt LOCAL_TIMER_VECTOR \
+        apic_timer_interrupt smp_apic_timer_interrupt
+
+#ifdef CONFIG_SMP
+apicinterrupt INVALIDATE_TLB_VECTOR_START+0 \
+        invalidate_interrupt0 smp_invalidate_interrupt
+apicinterrupt INVALIDATE_TLB_VECTOR_START+1 \
+        invalidate_interrupt1 smp_invalidate_interrupt
+apicinterrupt INVALIDATE_TLB_VECTOR_START+2 \
+        invalidate_interrupt2 smp_invalidate_interrupt
+apicinterrupt INVALIDATE_TLB_VECTOR_START+3 \
+        invalidate_interrupt3 smp_invalidate_interrupt
+apicinterrupt INVALIDATE_TLB_VECTOR_START+4 \
+        invalidate_interrupt4 smp_invalidate_interrupt
+apicinterrupt INVALIDATE_TLB_VECTOR_START+5 \
+        invalidate_interrupt5 smp_invalidate_interrupt
+apicinterrupt INVALIDATE_TLB_VECTOR_START+6 \
+        invalidate_interrupt6 smp_invalidate_interrupt
+apicinterrupt INVALIDATE_TLB_VECTOR_START+7 \
+        invalidate_interrupt7 smp_invalidate_interrupt
+#endif
 
-ENTRY(uv_bau_message_intr1)
-        apicinterrupt 220,uv_bau_message_interrupt
-END(uv_bau_message_intr1)
+apicinterrupt THRESHOLD_APIC_VECTOR \
+        threshold_interrupt mce_threshold_interrupt
+apicinterrupt THERMAL_APIC_VECTOR \
+        thermal_interrupt smp_thermal_interrupt
+
+#ifdef CONFIG_SMP
+apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
+        call_function_single_interrupt smp_call_function_single_interrupt
+apicinterrupt CALL_FUNCTION_VECTOR \
+        call_function_interrupt smp_call_function_interrupt
+apicinterrupt RESCHEDULE_VECTOR \
+        reschedule_interrupt smp_reschedule_interrupt
+#endif
 
-ENTRY(error_interrupt)
-        apicinterrupt ERROR_APIC_VECTOR,smp_error_interrupt
-END(error_interrupt)
+apicinterrupt ERROR_APIC_VECTOR \
+        error_interrupt smp_error_interrupt
+apicinterrupt SPURIOUS_APIC_VECTOR \
+        spurious_interrupt smp_spurious_interrupt
 
-ENTRY(spurious_interrupt)
-        apicinterrupt SPURIOUS_APIC_VECTOR,smp_spurious_interrupt
-END(spurious_interrupt)
-                                
 /*
  * Exception entry points.
- */             
-        .macro zeroentry sym
+ */
+.macro zeroentry sym do_sym
+ENTRY(\sym)
         INTR_FRAME
         PARAVIRT_ADJUST_EXCEPTION_FRAME
-        pushq $0        /* push error code/oldrax */ 
-        CFI_ADJUST_CFA_OFFSET 8
-        pushq %rax      /* push real oldrax to the rdi slot */ 
-        CFI_ADJUST_CFA_OFFSET 8
-        CFI_REL_OFFSET rax,0
-        leaq  \sym(%rip),%rax
-        jmp error_entry
+        pushq_cfi $-1           /* ORIG_RAX: no syscall to restart */
+        subq $15*8,%rsp
+        CFI_ADJUST_CFA_OFFSET 15*8
+        call error_entry
+        DEFAULT_FRAME 0
+        movq %rsp,%rdi          /* pt_regs pointer */
+        xorl %esi,%esi          /* no error code */
+        call \do_sym
+        jmp error_exit          /* %ebx: no swapgs flag */
         CFI_ENDPROC
-        .endm   
+END(\sym)
+.endm
 
-        .macro errorentry sym
-        XCPT_FRAME
+.macro paranoidzeroentry sym do_sym
+ENTRY(\sym)
+        INTR_FRAME
         PARAVIRT_ADJUST_EXCEPTION_FRAME
-        pushq %rax
+        pushq $-1               /* ORIG_RAX: no syscall to restart */
         CFI_ADJUST_CFA_OFFSET 8
-        CFI_REL_OFFSET rax,0
-        leaq  \sym(%rip),%rax
-        jmp error_entry
+        subq $15*8, %rsp
+        call save_paranoid
+        TRACE_IRQS_OFF
+        movq %rsp,%rdi          /* pt_regs pointer */
+        xorl %esi,%esi          /* no error code */
+        call \do_sym
+        jmp paranoid_exit       /* %ebx: no swapgs flag */
         CFI_ENDPROC
-        .endm
+END(\sym)
+.endm
 
-        /* error code is on the stack already */
-        /* handle NMI like exceptions that can happen everywhere */
-        .macro paranoidentry sym, ist=0, irqtrace=1
-        SAVE_ALL
-        cld
-        movl $1,%ebx
-        movl  $MSR_GS_BASE,%ecx
-        rdmsr
-        testl %edx,%edx
-        js    1f
-        SWAPGS
-        xorl  %ebx,%ebx
-1:
-        .if \ist
-        movq    %gs:pda_data_offset, %rbp
-        .endif
-        .if \irqtrace
-        TRACE_IRQS_OFF
-        .endif
-        movq %rsp,%rdi
-        movq ORIG_RAX(%rsp),%rsi
-        movq $-1,ORIG_RAX(%rsp)
-        .if \ist
-        subq    $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
-        .endif
-        call \sym
-        .if \ist
-        addq    $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
-        .endif
-        DISABLE_INTERRUPTS(CLBR_NONE)
-        .if \irqtrace
+.macro paranoidzeroentry_ist sym do_sym ist
+ENTRY(\sym)
+        INTR_FRAME
+        PARAVIRT_ADJUST_EXCEPTION_FRAME
+        pushq $-1               /* ORIG_RAX: no syscall to restart */
+        CFI_ADJUST_CFA_OFFSET 8
+        subq $15*8, %rsp
+        call save_paranoid
         TRACE_IRQS_OFF
-        .endif
-        .endm
+        movq %rsp,%rdi          /* pt_regs pointer */
+        xorl %esi,%esi          /* no error code */
+        movq %gs:pda_data_offset, %rbp
+        subq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
+        call \do_sym
+        addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
+        jmp paranoid_exit       /* %ebx: no swapgs flag */
+        CFI_ENDPROC
+END(\sym)
+.endm
 
-        /*
-         * "Paranoid" exit path from exception stack.
-         * Paranoid because this is used by NMIs and cannot take
-         * any kernel state for granted.
-         * We don't do kernel preemption checks here, because only
-         * NMI should be common and it does not enable IRQs and
-         * cannot get reschedule ticks.
-         *
-         * "trace" is 0 for the NMI handler only, because irq-tracing
-         * is fundamentally NMI-unsafe. (we cannot change the soft and
-         * hard flags at once, atomically)
-         */
-        .macro paranoidexit trace=1
-        /* ebx: no swapgs flag */
-paranoid_exit\trace:
-        testl %ebx,%ebx                         /* swapgs needed? */
-        jnz paranoid_restore\trace
-        testl $3,CS(%rsp)
-        jnz   paranoid_userspace\trace
-paranoid_swapgs\trace:
-        .if \trace
-        TRACE_IRQS_IRETQ 0
-        .endif
-        SWAPGS_UNSAFE_STACK
-paranoid_restore\trace:
-        RESTORE_ALL 8
-        jmp irq_return
-paranoid_userspace\trace:
-        GET_THREAD_INFO(%rcx)
-        movl TI_flags(%rcx),%ebx
-        andl $_TIF_WORK_MASK,%ebx
-        jz paranoid_swapgs\trace
-        movq %rsp,%rdi                  /* &pt_regs */
-        call sync_regs
-        movq %rax,%rsp                  /* switch stack for scheduling */
-        testl $_TIF_NEED_RESCHED,%ebx
-        jnz paranoid_schedule\trace
-        movl %ebx,%edx                  /* arg3: thread flags */
-        .if \trace
-        TRACE_IRQS_ON
-        .endif
-        ENABLE_INTERRUPTS(CLBR_NONE)
-        xorl %esi,%esi                  /* arg2: oldset */
-        movq %rsp,%rdi                  /* arg1: &pt_regs */
-        call do_notify_resume
-        DISABLE_INTERRUPTS(CLBR_NONE)
-        .if \trace
-        TRACE_IRQS_OFF
-        .endif
-        jmp paranoid_userspace\trace
-paranoid_schedule\trace:
-        .if \trace
-        TRACE_IRQS_ON
-        .endif
-        ENABLE_INTERRUPTS(CLBR_ANY)
-        call schedule
-        DISABLE_INTERRUPTS(CLBR_ANY)
-        .if \trace
-        TRACE_IRQS_OFF
-        .endif
-        jmp paranoid_userspace\trace
+.macro errorentry sym do_sym
+ENTRY(\sym)
+        XCPT_FRAME
+        PARAVIRT_ADJUST_EXCEPTION_FRAME
+        subq $15*8,%rsp
+        CFI_ADJUST_CFA_OFFSET 15*8
+        call error_entry
+        DEFAULT_FRAME 0
+        movq %rsp,%rdi                  /* pt_regs pointer */
+        movq ORIG_RAX(%rsp),%rsi        /* get error code */
+        movq $-1,ORIG_RAX(%rsp)         /* no syscall to restart */
+        call \do_sym
+        jmp error_exit                  /* %ebx: no swapgs flag */
         CFI_ENDPROC
-        .endm
+END(\sym)
+.endm
 
-/*
- * Exception entry point. This expects an error code/orig_rax on the stack
- * and the exception handler in %rax.   
- */                                             
-KPROBE_ENTRY(error_entry)
-        _frame RDI
-        CFI_REL_OFFSET rax,0
-        /* rdi slot contains rax, oldrax contains error code */
-        cld     
-        subq  $14*8,%rsp
-        CFI_ADJUST_CFA_OFFSET   (14*8)
-        movq %rsi,13*8(%rsp)
-        CFI_REL_OFFSET  rsi,RSI
-        movq 14*8(%rsp),%rsi    /* load rax from rdi slot */
-        CFI_REGISTER    rax,rsi
-        movq %rdx,12*8(%rsp)
-        CFI_REL_OFFSET  rdx,RDX
-        movq %rcx,11*8(%rsp)
-        CFI_REL_OFFSET  rcx,RCX
-        movq %rsi,10*8(%rsp)    /* store rax */ 
-        CFI_REL_OFFSET  rax,RAX
-        movq %r8, 9*8(%rsp)
-        CFI_REL_OFFSET  r8,R8
-        movq %r9, 8*8(%rsp)
-        CFI_REL_OFFSET  r9,R9
-        movq %r10,7*8(%rsp)
-        CFI_REL_OFFSET  r10,R10
-        movq %r11,6*8(%rsp)
-        CFI_REL_OFFSET  r11,R11
-        movq %rbx,5*8(%rsp) 
-        CFI_REL_OFFSET  rbx,RBX
-        movq %rbp,4*8(%rsp) 
-        CFI_REL_OFFSET  rbp,RBP
-        movq %r12,3*8(%rsp) 
-        CFI_REL_OFFSET  r12,R12
-        movq %r13,2*8(%rsp) 
-        CFI_REL_OFFSET  r13,R13
-        movq %r14,1*8(%rsp) 
-        CFI_REL_OFFSET  r14,R14
-        movq %r15,(%rsp) 
-        CFI_REL_OFFSET  r15,R15
-        xorl %ebx,%ebx  
-        testl $3,CS(%rsp)
-        je  error_kernelspace
-error_swapgs:   
-        SWAPGS
-error_sti:
-        TRACE_IRQS_OFF
-        movq %rdi,RDI(%rsp)     
-        CFI_REL_OFFSET  rdi,RDI
-        movq %rsp,%rdi
-        movq ORIG_RAX(%rsp),%rsi        /* get error code */ 
-        movq $-1,ORIG_RAX(%rsp)
-        call *%rax
-        /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */
-error_exit:
-        movl %ebx,%eax
-        RESTORE_REST
-        DISABLE_INTERRUPTS(CLBR_NONE)
+        /* error code is on the stack already */
+.macro paranoiderrorentry sym do_sym
+ENTRY(\sym)
+        XCPT_FRAME
+        PARAVIRT_ADJUST_EXCEPTION_FRAME
+        subq $15*8,%rsp
+        CFI_ADJUST_CFA_OFFSET 15*8
+        call save_paranoid
+        DEFAULT_FRAME 0
         TRACE_IRQS_OFF
-        GET_THREAD_INFO(%rcx)   
-        testl %eax,%eax
-        jne  retint_kernel
-        LOCKDEP_SYS_EXIT_IRQ
-        movl  TI_flags(%rcx),%edx
-        movl  $_TIF_WORK_MASK,%edi
-        andl  %edi,%edx
-        jnz  retint_careful
-        jmp retint_swapgs
+        movq %rsp,%rdi                  /* pt_regs pointer */
+        movq ORIG_RAX(%rsp),%rsi        /* get error code */
+        movq $-1,ORIG_RAX(%rsp)         /* no syscall to restart */
+        call \do_sym
+        jmp paranoid_exit               /* %ebx: no swapgs flag */
         CFI_ENDPROC
+END(\sym)
+.endm
 
-error_kernelspace:
-        incl %ebx
-       /* There are two places in the kernel that can potentially fault with
-          usergs. Handle them here. The exception handlers after
-           iret run with kernel gs again, so don't set the user space flag.
-           B stepping K8s sometimes report an truncated RIP for IRET 
-           exceptions returning to compat mode. Check for these here too. */
-        leaq irq_return(%rip),%rcx
-        cmpq %rcx,RIP(%rsp)
-        je   error_swapgs
-        movl %ecx,%ecx  /* zero extend */
-        cmpq %rcx,RIP(%rsp)
-        je   error_swapgs
-        cmpq $gs_change,RIP(%rsp)
-        je   error_swapgs
-        jmp  error_sti
-KPROBE_END(error_entry)
-        
-       /* Reload gs selector with exception handling */
-       /* edi:  new selector */ 
+zeroentry divide_error do_divide_error
+zeroentry overflow do_overflow
+zeroentry bounds do_bounds
+zeroentry invalid_op do_invalid_op
+zeroentry device_not_available do_device_not_available
+paranoiderrorentry double_fault do_double_fault
+zeroentry coprocessor_segment_overrun do_coprocessor_segment_overrun
+errorentry invalid_TSS do_invalid_TSS
+errorentry segment_not_present do_segment_not_present
+zeroentry spurious_interrupt_bug do_spurious_interrupt_bug
+zeroentry coprocessor_error do_coprocessor_error
+errorentry alignment_check do_alignment_check
+zeroentry simd_coprocessor_error do_simd_coprocessor_error
+
+        /* Reload gs selector with exception handling */
+        /* edi:  new selector */
 ENTRY(native_load_gs_index)
         CFI_STARTPROC
         pushf
         CFI_ADJUST_CFA_OFFSET 8
         DISABLE_INTERRUPTS(CLBR_ANY | ~(CLBR_RDI))
-        SWAPGS
-gs_change:     
-        movl %edi,%gs   
+        SWAPGS
+gs_change:
+        movl %edi,%gs
 2:      mfence          /* workaround */
         SWAPGS
-        popf
+        popf
         CFI_ADJUST_CFA_OFFSET -8
-        ret
+        ret
         CFI_ENDPROC
-ENDPROC(native_load_gs_index)
-       
-        .section __ex_table,"a"
-        .align 8
-        .quad gs_change,bad_gs
-        .previous
-        .section .fixup,"ax"
+END(native_load_gs_index)
+
+        .section __ex_table,"a"
+        .align 8
+        .quad gs_change,bad_gs
+        .previous
+        .section .fixup,"ax"
         /* running with kernelgs */
-bad_gs: 
+bad_gs:
         SWAPGS                  /* switch back to user gs */
         xorl %eax,%eax
-        movl %eax,%gs
-        jmp  2b
-        .previous       
-        
+        movl %eax,%gs
+        jmp  2b
+        .previous
+
 /*
  * Create a kernel thread.
  *
@@ -1138,7 +1184,7 @@ ENTRY(kernel_thread)
 
         xorl %r8d,%r8d
         xorl %r9d,%r9d
-        
+
         # clone now
         call do_fork
         movq %rax,RAX(%rsp)
@@ -1149,15 +1195,15 @@ ENTRY(kernel_thread)
          * so internally to the x86_64 port you can rely on kernel_thread()
          * not to reschedule the child before returning, this avoids the need
          * of hacks for example to fork off the per-CPU idle tasks.
-         * [Hopefully no generic code relies on the reschedule -AK]     
+         * [Hopefully no generic code relies on the reschedule -AK]
          */
         RESTORE_ALL
         UNFAKE_STACK_FRAME
         ret
         CFI_ENDPROC
-ENDPROC(kernel_thread)
-        
-child_rip:
+END(kernel_thread)
+
+ENTRY(child_rip)
         pushq $0                # fake return address
         CFI_STARTPROC
         /*
@@ -1170,8 +1216,9 @@ child_rip:
         # exit
         mov %eax, %edi
         call do_exit
+        ud2                     # padding for call trace
         CFI_ENDPROC
-ENDPROC(child_rip)
+END(child_rip)
 
 /*
  * execve(). This function needs to use IRET, not SYSRET, to set up all state properly.
@@ -1191,10 +1238,10 @@ ENDPROC(child_rip)
 ENTRY(kernel_execve)
         CFI_STARTPROC
         FAKE_STACK_FRAME $0
-        SAVE_ALL        
+        SAVE_ALL
         movq %rsp,%rcx
         call sys_execve
-        movq %rax, RAX(%rsp)    
+        movq %rax, RAX(%rsp)
         RESTORE_REST
         testq %rax,%rax
         je int_ret_from_sys_call
@@ -1202,129 +1249,7 @@ ENTRY(kernel_execve)
         UNFAKE_STACK_FRAME
         ret
         CFI_ENDPROC
-ENDPROC(kernel_execve)
-
-KPROBE_ENTRY(page_fault)
-        errorentry do_page_fault
-KPROBE_END(page_fault)
-
-ENTRY(coprocessor_error)
-        zeroentry do_coprocessor_error
-END(coprocessor_error)
-
-ENTRY(simd_coprocessor_error)
-        zeroentry do_simd_coprocessor_error     
-END(simd_coprocessor_error)
-
-ENTRY(device_not_available)
-        zeroentry do_device_not_available
-END(device_not_available)
-
-        /* runs on exception stack */
-KPROBE_ENTRY(debug)
-        INTR_FRAME
-        PARAVIRT_ADJUST_EXCEPTION_FRAME
-        pushq $0
-        CFI_ADJUST_CFA_OFFSET 8         
-        paranoidentry do_debug, DEBUG_STACK
-        paranoidexit
-KPROBE_END(debug)
-
-        /* runs on exception stack */   
-KPROBE_ENTRY(nmi)
-        INTR_FRAME
-        PARAVIRT_ADJUST_EXCEPTION_FRAME
-        pushq $-1
-        CFI_ADJUST_CFA_OFFSET 8
-        paranoidentry do_nmi, 0, 0
-#ifdef CONFIG_TRACE_IRQFLAGS
-        paranoidexit 0
-#else
-        jmp paranoid_exit1
-        CFI_ENDPROC
-#endif
-KPROBE_END(nmi)
-
-KPROBE_ENTRY(int3)
-        INTR_FRAME
-        PARAVIRT_ADJUST_EXCEPTION_FRAME
-        pushq $0
-        CFI_ADJUST_CFA_OFFSET 8
-        paranoidentry do_int3, DEBUG_STACK
-        jmp paranoid_exit1
-        CFI_ENDPROC
-KPROBE_END(int3)
-
-ENTRY(overflow)
-        zeroentry do_overflow
-END(overflow)
-
-ENTRY(bounds)
-        zeroentry do_bounds
-END(bounds)
-
-ENTRY(invalid_op)
-        zeroentry do_invalid_op 
-END(invalid_op)
-
-ENTRY(coprocessor_segment_overrun)
-        zeroentry do_coprocessor_segment_overrun
-END(coprocessor_segment_overrun)
-
-        /* runs on exception stack */
-ENTRY(double_fault)
-        XCPT_FRAME
-        PARAVIRT_ADJUST_EXCEPTION_FRAME
-        paranoidentry do_double_fault
-        jmp paranoid_exit1
-        CFI_ENDPROC
-END(double_fault)
-
-ENTRY(invalid_TSS)
-        errorentry do_invalid_TSS
-END(invalid_TSS)
-
-ENTRY(segment_not_present)
-        errorentry do_segment_not_present
-END(segment_not_present)
-
-        /* runs on exception stack */
-ENTRY(stack_segment)
-        XCPT_FRAME
-        PARAVIRT_ADJUST_EXCEPTION_FRAME
-        paranoidentry do_stack_segment
-        jmp paranoid_exit1
-        CFI_ENDPROC
-END(stack_segment)
-
-KPROBE_ENTRY(general_protection)
-        errorentry do_general_protection
-KPROBE_END(general_protection)
-
-ENTRY(alignment_check)
-        errorentry do_alignment_check
-END(alignment_check)
-
-ENTRY(divide_error)
-        zeroentry do_divide_error
-END(divide_error)
-
-ENTRY(spurious_interrupt_bug)
-        zeroentry do_spurious_interrupt_bug
-END(spurious_interrupt_bug)
-
-#ifdef CONFIG_X86_MCE
-        /* runs on exception stack */
-ENTRY(machine_check)
-        INTR_FRAME
-        PARAVIRT_ADJUST_EXCEPTION_FRAME
-        pushq $0
-        CFI_ADJUST_CFA_OFFSET 8 
-        paranoidentry do_machine_check
-        jmp paranoid_exit1
-        CFI_ENDPROC
-END(machine_check)
-#endif
+END(kernel_execve)
 
 /* Call softirq on interrupt stack. Interrupts are off. */
 ENTRY(call_softirq)
@@ -1344,40 +1269,33 @@ ENTRY(call_softirq)
         decl %gs:pda_irqcount
         ret
         CFI_ENDPROC
-ENDPROC(call_softirq)
-
-KPROBE_ENTRY(ignore_sysret)
-        CFI_STARTPROC
-        mov $-ENOSYS,%eax
-        sysret
-        CFI_ENDPROC
-ENDPROC(ignore_sysret)
+END(call_softirq)
 
 #ifdef CONFIG_XEN
-ENTRY(xen_hypervisor_callback)
-        zeroentry xen_do_hypervisor_callback
-END(xen_hypervisor_callback)
+zeroentry xen_hypervisor_callback xen_do_hypervisor_callback
 
 /*
-# A note on the "critical region" in our callback handler.
-# We want to avoid stacking callback handlers due to events occurring
-# during handling of the last event. To do this, we keep events disabled
-# until we've done all processing. HOWEVER, we must enable events before
-# popping the stack frame (can't be done atomically) and so it would still
-# be possible to get enough handler activations to overflow the stack.
-# Although unlikely, bugs of that kind are hard to track down, so we'd
-# like to avoid the possibility.
-# So, on entry to the handler we detect whether we interrupted an
-# existing activation in its critical region -- if so, we pop the current
-# activation and restart the handler using the previous one.
-*/
+ * A note on the "critical region" in our callback handler.
+ * We want to avoid stacking callback handlers due to events occurring
+ * during handling of the last event. To do this, we keep events disabled
+ * until we've done all processing. HOWEVER, we must enable events before
+ * popping the stack frame (can't be done atomically) and so it would still
+ * be possible to get enough handler activations to overflow the stack.
+ * Although unlikely, bugs of that kind are hard to track down, so we'd
+ * like to avoid the possibility.
+ * So, on entry to the handler we detect whether we interrupted an
+ * existing activation in its critical region -- if so, we pop the current
+ * activation and restart the handler using the previous one.
+ */
 ENTRY(xen_do_hypervisor_callback)   # do_hypervisor_callback(struct *pt_regs)
         CFI_STARTPROC
-/* Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
-   see the correct pointer to the pt_regs */
+/*
+ * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
+ * see the correct pointer to the pt_regs
+ */
         movq %rdi, %rsp            # we don't return, adjust the stack frame
         CFI_ENDPROC
-        CFI_DEFAULT_STACK
+        DEFAULT_FRAME
 11:     incl %gs:pda_irqcount
         movq %rsp,%rbp
         CFI_DEF_CFA_REGISTER rbp
@@ -1392,23 +1310,26 @@ ENTRY(xen_do_hypervisor_callback)   # do_hypervisor_callback(struct *pt_regs)
 END(do_hypervisor_callback)
 
 /*
-# Hypervisor uses this for application faults while it executes.
-# We get here for two reasons:
-#  1. Fault while reloading DS, ES, FS or GS
-#  2. Fault while executing IRET
-# Category 1 we do not need to fix up as Xen has already reloaded all segment
-# registers that could be reloaded and zeroed the others.
-# Category 2 we fix up by killing the current process. We cannot use the
-# normal Linux return path in this case because if we use the IRET hypercall
-# to pop the stack frame we end up in an infinite loop of failsafe callbacks.
-# We distinguish between categories by comparing each saved segment register
-# with its current contents: any discrepancy means we in category 1.
-*/
+ * Hypervisor uses this for application faults while it executes.
+ * We get here for two reasons:
+ *  1. Fault while reloading DS, ES, FS or GS
+ *  2. Fault while executing IRET
+ * Category 1 we do not need to fix up as Xen has already reloaded all segment
+ * registers that could be reloaded and zeroed the others.
+ * Category 2 we fix up by killing the current process. We cannot use the
+ * normal Linux return path in this case because if we use the IRET hypercall
+ * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
+ * We distinguish between categories by comparing each saved segment register
+ * with its current contents: any discrepancy means we in category 1.
+ */
 ENTRY(xen_failsafe_callback)
-        framesz = (RIP-0x30)    /* workaround buggy gas */
-        _frame framesz
-        CFI_REL_OFFSET rcx, 0
-        CFI_REL_OFFSET r11, 8
+        INTR_FRAME 1 (6*8)
+        /*CFI_REL_OFFSET gs,GS*/
+        /*CFI_REL_OFFSET fs,FS*/
+        /*CFI_REL_OFFSET es,ES*/
+        /*CFI_REL_OFFSET ds,DS*/
+        CFI_REL_OFFSET r11,8
+        CFI_REL_OFFSET rcx,0
         movw %ds,%cx
         cmpw %cx,0x10(%rsp)
         CFI_REMEMBER_STATE
@@ -1429,12 +1350,9 @@ ENTRY(xen_failsafe_callback)
         CFI_RESTORE r11
         addq $0x30,%rsp
         CFI_ADJUST_CFA_OFFSET -0x30
-        pushq $0
-        CFI_ADJUST_CFA_OFFSET 8
-        pushq %r11
-        CFI_ADJUST_CFA_OFFSET 8
-        pushq %rcx
-        CFI_ADJUST_CFA_OFFSET 8
+        pushq_cfi $0    /* RIP */
+        pushq_cfi %r11
+        pushq_cfi %rcx
         jmp general_protection
         CFI_RESTORE_STATE
 1:      /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
@@ -1444,11 +1362,223 @@ ENTRY(xen_failsafe_callback)
         CFI_RESTORE r11
         addq $0x30,%rsp
         CFI_ADJUST_CFA_OFFSET -0x30
-        pushq $0
-        CFI_ADJUST_CFA_OFFSET 8
+        pushq_cfi $0
         SAVE_ALL
         jmp error_exit
         CFI_ENDPROC
 END(xen_failsafe_callback)
 
 #endif /* CONFIG_XEN */
+
+/*
+ * Some functions should be protected against kprobes
+ */
+        .pushsection .kprobes.text, "ax"
+
+paranoidzeroentry_ist debug do_debug DEBUG_STACK
+paranoidzeroentry_ist int3 do_int3 DEBUG_STACK
+paranoiderrorentry stack_segment do_stack_segment
+errorentry general_protection do_general_protection
+errorentry page_fault do_page_fault
+#ifdef CONFIG_X86_MCE
+paranoidzeroentry machine_check do_machine_check
+#endif
+
+        /*
+         * "Paranoid" exit path from exception stack.
+         * Paranoid because this is used by NMIs and cannot take
+         * any kernel state for granted.
+         * We don't do kernel preemption checks here, because only
+         * NMI should be common and it does not enable IRQs and
+         * cannot get reschedule ticks.
+         *
+         * "trace" is 0 for the NMI handler only, because irq-tracing
+         * is fundamentally NMI-unsafe. (we cannot change the soft and
+         * hard flags at once, atomically)
+         */
+
+        /* ebx: no swapgs flag */
+ENTRY(paranoid_exit)
+        INTR_FRAME
+        DISABLE_INTERRUPTS(CLBR_NONE)
+        TRACE_IRQS_OFF
+        testl %ebx,%ebx                         /* swapgs needed? */
+        jnz paranoid_restore
+        testl $3,CS(%rsp)
+        jnz   paranoid_userspace
+paranoid_swapgs:
+        TRACE_IRQS_IRETQ 0
+        SWAPGS_UNSAFE_STACK
+paranoid_restore:
+        RESTORE_ALL 8
+        jmp irq_return
+paranoid_userspace:
+        GET_THREAD_INFO(%rcx)
+        movl TI_flags(%rcx),%ebx
+        andl $_TIF_WORK_MASK,%ebx
+        jz paranoid_swapgs
+        movq %rsp,%rdi                  /* &pt_regs */
+        call sync_regs
+        movq %rax,%rsp                  /* switch stack for scheduling */
+        testl $_TIF_NEED_RESCHED,%ebx
+        jnz paranoid_schedule
+        movl %ebx,%edx                  /* arg3: thread flags */
+        TRACE_IRQS_ON
+        ENABLE_INTERRUPTS(CLBR_NONE)
+        xorl %esi,%esi                  /* arg2: oldset */
+        movq %rsp,%rdi                  /* arg1: &pt_regs */
+        call do_notify_resume
+        DISABLE_INTERRUPTS(CLBR_NONE)
+        TRACE_IRQS_OFF
+        jmp paranoid_userspace
+paranoid_schedule:
+        TRACE_IRQS_ON
+        ENABLE_INTERRUPTS(CLBR_ANY)
+        call schedule
+        DISABLE_INTERRUPTS(CLBR_ANY)
+        TRACE_IRQS_OFF
+        jmp paranoid_userspace
+        CFI_ENDPROC
+END(paranoid_exit)
+
+/*
+ * Exception entry point. This expects an error code/orig_rax on the stack.
+ * returns in "no swapgs flag" in %ebx.
+ */
+ENTRY(error_entry)
+        XCPT_FRAME
+        CFI_ADJUST_CFA_OFFSET 15*8
+        /* oldrax contains error code */
+        cld
+        movq_cfi rdi, RDI+8
+        movq_cfi rsi, RSI+8
+        movq_cfi rdx, RDX+8
+        movq_cfi rcx, RCX+8
+        movq_cfi rax, RAX+8
+        movq_cfi  r8,  R8+8
+        movq_cfi  r9,  R9+8
+        movq_cfi r10, R10+8
+        movq_cfi r11, R11+8
+        movq_cfi rbx, RBX+8
+        movq_cfi rbp, RBP+8
+        movq_cfi r12, R12+8
+        movq_cfi r13, R13+8
+        movq_cfi r14, R14+8
+        movq_cfi r15, R15+8
+        xorl %ebx,%ebx
+        testl $3,CS+8(%rsp)
+        je error_kernelspace
+error_swapgs:
+        SWAPGS
+error_sti:
+        TRACE_IRQS_OFF
+        ret
+        CFI_ENDPROC
+
+/*
+ * There are two places in the kernel that can potentially fault with
+ * usergs. Handle them here. The exception handlers after iret run with
+ * kernel gs again, so don't set the user space flag. B stepping K8s
+ * sometimes report an truncated RIP for IRET exceptions returning to
+ * compat mode. Check for these here too.
+ */
+error_kernelspace:
+        incl %ebx
+        leaq irq_return(%rip),%rcx
+        cmpq %rcx,RIP+8(%rsp)
+        je error_swapgs
+        movl %ecx,%ecx  /* zero extend */
+        cmpq %rcx,RIP+8(%rsp)
+        je error_swapgs
+        cmpq $gs_change,RIP+8(%rsp)
+        je error_swapgs
+        jmp error_sti
+END(error_entry)
+
+
+/* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */
+ENTRY(error_exit)
+        DEFAULT_FRAME
+        movl %ebx,%eax
+        RESTORE_REST
+        DISABLE_INTERRUPTS(CLBR_NONE)
+        TRACE_IRQS_OFF
+        GET_THREAD_INFO(%rcx)
+        testl %eax,%eax
+        jne retint_kernel
+        LOCKDEP_SYS_EXIT_IRQ
+        movl TI_flags(%rcx),%edx
+        movl $_TIF_WORK_MASK,%edi
+        andl %edi,%edx
+        jnz retint_careful
+        jmp retint_swapgs
+        CFI_ENDPROC
+END(error_exit)
+
+
+        /* runs on exception stack */
+ENTRY(nmi)
+        INTR_FRAME
+        PARAVIRT_ADJUST_EXCEPTION_FRAME
+        pushq_cfi $-1
+        subq $15*8, %rsp
+        CFI_ADJUST_CFA_OFFSET 15*8
+        call save_paranoid
+        DEFAULT_FRAME 0
+        /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
+        movq %rsp,%rdi
+        movq $-1,%rsi
+        call do_nmi
+#ifdef CONFIG_TRACE_IRQFLAGS
+        /* paranoidexit; without TRACE_IRQS_OFF */
+        /* ebx: no swapgs flag */
+        DISABLE_INTERRUPTS(CLBR_NONE)
+        testl %ebx,%ebx                         /* swapgs needed? */
+        jnz nmi_restore
+        testl $3,CS(%rsp)
+        jnz nmi_userspace
+nmi_swapgs:
+        SWAPGS_UNSAFE_STACK
+nmi_restore:
+        RESTORE_ALL 8
+        jmp irq_return
+nmi_userspace:
+        GET_THREAD_INFO(%rcx)
+        movl TI_flags(%rcx),%ebx
+        andl $_TIF_WORK_MASK,%ebx
+        jz nmi_swapgs
+        movq %rsp,%rdi                  /* &pt_regs */
+        call sync_regs
+        movq %rax,%rsp                  /* switch stack for scheduling */
+        testl $_TIF_NEED_RESCHED,%ebx
+        jnz nmi_schedule
+        movl %ebx,%edx                  /* arg3: thread flags */
+        ENABLE_INTERRUPTS(CLBR_NONE)
+        xorl %esi,%esi                  /* arg2: oldset */
+        movq %rsp,%rdi                  /* arg1: &pt_regs */
+        call do_notify_resume
+        DISABLE_INTERRUPTS(CLBR_NONE)
+        jmp nmi_userspace
+nmi_schedule:
+        ENABLE_INTERRUPTS(CLBR_ANY)
+        call schedule
+        DISABLE_INTERRUPTS(CLBR_ANY)
+        jmp nmi_userspace
+        CFI_ENDPROC
+#else
+        jmp paranoid_exit
+        CFI_ENDPROC
+#endif
+END(nmi)
+
+ENTRY(ignore_sysret)
+        CFI_STARTPROC
+        mov $-ENOSYS,%eax
+        sysret
+        CFI_ENDPROC
+END(ignore_sysret)
+
+/*
+ * End of kprobes section
+ */
+        .popsection
diff --git a/arch/x86/kernel/es7000_32.c b/arch/x86/kernel/es7000_32.c
index 0aa2c443d600..53699c931ad4 100644
--- a/arch/x86/kernel/es7000_32.c
+++ b/arch/x86/kernel/es7000_32.c
@@ -38,8 +38,11 @@
 #include <asm/io.h>
 #include <asm/nmi.h>
 #include <asm/smp.h>
+#include <asm/atomic.h>
 #include <asm/apicdef.h>
 #include <mach_mpparse.h>
+#include <asm/genapic.h>
+#include <asm/setup.h>
 
 /*
  * ES7000 chipsets
@@ -161,6 +164,43 @@ es7000_rename_gsi(int ioapic, int gsi)
         return gsi;
 }
 
+static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
+{
+        unsigned long vect = 0, psaival = 0;
+
+        if (psai == NULL)
+                return -1;
+
+        vect = ((unsigned long)__pa(eip)/0x1000) << 16;
+        psaival = (0x1000000 | vect | cpu);
+
+        while (*psai & 0x1000000)
+                ;
+
+        *psai = psaival;
+
+        return 0;
+}
+
+static void noop_wait_for_deassert(atomic_t *deassert_not_used)
+{
+}
+
+static int __init es7000_update_genapic(void)
+{
+        genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
+
+        /* MPENTIUMIII */
+        if (boot_cpu_data.x86 == 6 &&
+            (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
+                es7000_update_genapic_to_cluster();
+                genapic->wait_for_init_deassert = noop_wait_for_deassert;
+                genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
+        }
+
+        return 0;
+}
+
 void __init
 setup_unisys(void)
 {
@@ -176,6 +216,8 @@ setup_unisys(void)
         else
                 es7000_plat = ES7000_CLASSIC;
         ioapic_renumber_irq = es7000_rename_gsi;
+
+        x86_quirks->update_genapic = es7000_update_genapic;
 }
 
 /*
@@ -317,26 +359,6 @@ es7000_mip_write(struct mip_reg *mip_reg)
         return status;
 }
 
-int
-es7000_start_cpu(int cpu, unsigned long eip)
-{
-        unsigned long vect = 0, psaival = 0;
-
-        if (psai == NULL)
-                return -1;
-
-        vect = ((unsigned long)__pa(eip)/0x1000) << 16;
-        psaival = (0x1000000 | vect | cpu);
-
-        while (*psai & 0x1000000)
-                ;
-
-        *psai = psaival;
-
-        return 0;
-
-}
-
 void __init
 es7000_sw_apic(void)
 {
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 50ea0ac8c9bf..1b43086b097a 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -14,14 +14,17 @@
 #include <linux/uaccess.h>
 #include <linux/ftrace.h>
 #include <linux/percpu.h>
+#include <linux/sched.h>
 #include <linux/init.h>
 #include <linux/list.h>
 
 #include <asm/ftrace.h>
+#include <linux/ftrace.h>
 #include <asm/nops.h>
+#include <asm/nmi.h>
 
 
-static unsigned char ftrace_nop[MCOUNT_INSN_SIZE];
+#ifdef CONFIG_DYNAMIC_FTRACE
 
 union ftrace_code_union {
         char code[MCOUNT_INSN_SIZE];
@@ -31,18 +34,12 @@ union ftrace_code_union {
         } __attribute__((packed));
 };
 
-
 static int ftrace_calc_offset(long ip, long addr)
 {
         return (int)(addr - ip);
 }
 
-unsigned char *ftrace_nop_replace(void)
-{
-        return ftrace_nop;
-}
-
-unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
+static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
 {
         static union ftrace_code_union calc;
 
@@ -56,7 +53,142 @@ unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
         return calc.code;
 }
 
-int
+/*
+ * Modifying code must take extra care. On an SMP machine, if
+ * the code being modified is also being executed on another CPU
+ * that CPU will have undefined results and possibly take a GPF.
+ * We use kstop_machine to stop other CPUS from exectuing code.
+ * But this does not stop NMIs from happening. We still need
+ * to protect against that. We separate out the modification of
+ * the code to take care of this.
+ *
+ * Two buffers are added: An IP buffer and a "code" buffer.
+ *
+ * 1) Put the instruction pointer into the IP buffer
+ *    and the new code into the "code" buffer.
+ * 2) Set a flag that says we are modifying code
+ * 3) Wait for any running NMIs to finish.
+ * 4) Write the code
+ * 5) clear the flag.
+ * 6) Wait for any running NMIs to finish.
+ *
+ * If an NMI is executed, the first thing it does is to call
+ * "ftrace_nmi_enter". This will check if the flag is set to write
+ * and if it is, it will write what is in the IP and "code" buffers.
+ *
+ * The trick is, it does not matter if everyone is writing the same
+ * content to the code location. Also, if a CPU is executing code
+ * it is OK to write to that code location if the contents being written
+ * are the same as what exists.
+ */
+
+static atomic_t in_nmi = ATOMIC_INIT(0);
+static int mod_code_status;             /* holds return value of text write */
+static int mod_code_write;              /* set when NMI should do the write */
+static void *mod_code_ip;               /* holds the IP to write to */
+static void *mod_code_newcode;          /* holds the text to write to the IP */
+
+static unsigned nmi_wait_count;
+static atomic_t nmi_update_count = ATOMIC_INIT(0);
+
+int ftrace_arch_read_dyn_info(char *buf, int size)
+{
+        int r;
+
+        r = snprintf(buf, size, "%u %u",
+                     nmi_wait_count,
+                     atomic_read(&nmi_update_count));
+        return r;
+}
+
+static void ftrace_mod_code(void)
+{
+        /*
+         * Yes, more than one CPU process can be writing to mod_code_status.
+         *    (and the code itself)
+         * But if one were to fail, then they all should, and if one were
+         * to succeed, then they all should.
+         */
+        mod_code_status = probe_kernel_write(mod_code_ip, mod_code_newcode,
+                                             MCOUNT_INSN_SIZE);
+}
+
+void ftrace_nmi_enter(void)
+{
+        atomic_inc(&in_nmi);
+        /* Must have in_nmi seen before reading write flag */
+        smp_mb();
+        if (mod_code_write) {
+                ftrace_mod_code();
+                atomic_inc(&nmi_update_count);
+        }
+}
+
+void ftrace_nmi_exit(void)
+{
+        /* Finish all executions before clearing in_nmi */
+        smp_wmb();
+        atomic_dec(&in_nmi);
+}
+
+static void wait_for_nmi(void)
+{
+        int waited = 0;
+
+        while (atomic_read(&in_nmi)) {
+                waited = 1;
+                cpu_relax();
+        }
+
+        if (waited)
+                nmi_wait_count++;
+}
+
+static int
+do_ftrace_mod_code(unsigned long ip, void *new_code)
+{
+        mod_code_ip = (void *)ip;
+        mod_code_newcode = new_code;
+
+        /* The buffers need to be visible before we let NMIs write them */
+        smp_wmb();
+
+        mod_code_write = 1;
+
+        /* Make sure write bit is visible before we wait on NMIs */
+        smp_mb();
+
+        wait_for_nmi();
+
+        /* Make sure all running NMIs have finished before we write the code */
+        smp_mb();
+
+        ftrace_mod_code();
+
+        /* Make sure the write happens before clearing the bit */
+        smp_wmb();
+
+        mod_code_write = 0;
+
+        /* make sure NMIs see the cleared bit */
+        smp_mb();
+
+        wait_for_nmi();
+
+        return mod_code_status;
+}
+
+
+
+
+static unsigned char ftrace_nop[MCOUNT_INSN_SIZE];
+
+static unsigned char *ftrace_nop_replace(void)
+{
+        return ftrace_nop;
+}
+
+static int
 ftrace_modify_code(unsigned long ip, unsigned char *old_code,
                    unsigned char *new_code)
 {
@@ -81,7 +213,7 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
                 return -EINVAL;
 
         /* replace the text with the new text */
-        if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE))
+        if (do_ftrace_mod_code(ip, new_code))
                 return -EPERM;
 
         sync_core();
@@ -89,6 +221,29 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
         return 0;
 }
 
+int ftrace_make_nop(struct module *mod,
+                    struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned char *new, *old;
+        unsigned long ip = rec->ip;
+
+        old = ftrace_call_replace(ip, addr);
+        new = ftrace_nop_replace();
+
+        return ftrace_modify_code(rec->ip, old, new);
+}
+
+int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
+{
+        unsigned char *new, *old;
+        unsigned long ip = rec->ip;
+
+        old = ftrace_nop_replace();
+        new = ftrace_call_replace(ip, addr);
+
+        return ftrace_modify_code(rec->ip, old, new);
+}
+
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
         unsigned long ip = (unsigned long)(&ftrace_call);
@@ -165,3 +320,218 @@ int __init ftrace_dyn_arch_init(void *data)
 
         return 0;
 }
+#endif
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+extern void ftrace_graph_call(void);
+
+static int ftrace_mod_jmp(unsigned long ip,
+                          int old_offset, int new_offset)
+{
+        unsigned char code[MCOUNT_INSN_SIZE];
+
+        if (probe_kernel_read(code, (void *)ip, MCOUNT_INSN_SIZE))
+                return -EFAULT;
+
+        if (code[0] != 0xe9 || old_offset != *(int *)(&code[1]))
+                return -EINVAL;
+
+        *(int *)(&code[1]) = new_offset;
+
+        if (do_ftrace_mod_code(ip, &code))
+                return -EPERM;
+
+        return 0;
+}
+
+int ftrace_enable_ftrace_graph_caller(void)
+{
+        unsigned long ip = (unsigned long)(&ftrace_graph_call);
+        int old_offset, new_offset;
+
+        old_offset = (unsigned long)(&ftrace_stub) - (ip + MCOUNT_INSN_SIZE);
+        new_offset = (unsigned long)(&ftrace_graph_caller) - (ip + MCOUNT_INSN_SIZE);
+
+        return ftrace_mod_jmp(ip, old_offset, new_offset);
+}
+
+int ftrace_disable_ftrace_graph_caller(void)
+{
+        unsigned long ip = (unsigned long)(&ftrace_graph_call);
+        int old_offset, new_offset;
+
+        old_offset = (unsigned long)(&ftrace_graph_caller) - (ip + MCOUNT_INSN_SIZE);
+        new_offset = (unsigned long)(&ftrace_stub) - (ip + MCOUNT_INSN_SIZE);
+
+        return ftrace_mod_jmp(ip, old_offset, new_offset);
+}
+
+#else /* CONFIG_DYNAMIC_FTRACE */
+
+/*
+ * These functions are picked from those used on
+ * this page for dynamic ftrace. They have been
+ * simplified to ignore all traces in NMI context.
+ */
+static atomic_t in_nmi;
+
+void ftrace_nmi_enter(void)
+{
+        atomic_inc(&in_nmi);
+}
+
+void ftrace_nmi_exit(void)
+{
+        atomic_dec(&in_nmi);
+}
+
+#endif /* !CONFIG_DYNAMIC_FTRACE */
+
+/* Add a function return address to the trace stack on thread info.*/
+static int push_return_trace(unsigned long ret, unsigned long long time,
+                                unsigned long func, int *depth)
+{
+        int index;
+
+        if (!current->ret_stack)
+                return -EBUSY;
+
+        /* The return trace stack is full */
+        if (current->curr_ret_stack == FTRACE_RETFUNC_DEPTH - 1) {
+                atomic_inc(&current->trace_overrun);
+                return -EBUSY;
+        }
+
+        index = ++current->curr_ret_stack;
+        barrier();
+        current->ret_stack[index].ret = ret;
+        current->ret_stack[index].func = func;
+        current->ret_stack[index].calltime = time;
+        *depth = index;
+
+        return 0;
+}
+
+/* Retrieve a function return address to the trace stack on thread info.*/
+static void pop_return_trace(struct ftrace_graph_ret *trace, unsigned long *ret)
+{
+        int index;
+
+        index = current->curr_ret_stack;
+
+        if (unlikely(index < 0)) {
+                ftrace_graph_stop();
+                WARN_ON(1);
+                /* Might as well panic, otherwise we have no where to go */
+                *ret = (unsigned long)panic;
+                return;
+        }
+
+        *ret = current->ret_stack[index].ret;
+        trace->func = current->ret_stack[index].func;
+        trace->calltime = current->ret_stack[index].calltime;
+        trace->overrun = atomic_read(&current->trace_overrun);
+        trace->depth = index;
+        barrier();
+        current->curr_ret_stack--;
+
+}
+
+/*
+ * Send the trace to the ring-buffer.
+ * @return the original return address.
+ */
+unsigned long ftrace_return_to_handler(void)
+{
+        struct ftrace_graph_ret trace;
+        unsigned long ret;
+
+        pop_return_trace(&trace, &ret);
+        trace.rettime = cpu_clock(raw_smp_processor_id());
+        ftrace_graph_return(&trace);
+
+        if (unlikely(!ret)) {
+                ftrace_graph_stop();
+                WARN_ON(1);
+                /* Might as well panic. What else to do? */
+                ret = (unsigned long)panic;
+        }
+
+        return ret;
+}
+
+/*
+ * Hook the return address and push it in the stack of return addrs
+ * in current thread info.
+ */
+void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
+{
+        unsigned long old;
+        unsigned long long calltime;
+        int faulted;
+        struct ftrace_graph_ent trace;
+        unsigned long return_hooker = (unsigned long)
+                                &return_to_handler;
+
+        /* Nmi's are currently unsupported */
+        if (unlikely(atomic_read(&in_nmi)))
+                return;
+
+        if (unlikely(atomic_read(&current->tracing_graph_pause)))
+                return;
+
+        /*
+         * Protect against fault, even if it shouldn't
+         * happen. This tool is too much intrusive to
+         * ignore such a protection.
+         */
+        asm volatile(
+                "1: " _ASM_MOV " (%[parent_old]), %[old]\n"
+                "2: " _ASM_MOV " %[return_hooker], (%[parent_replaced])\n"
+                "   movl $0, %[faulted]\n"
+
+                ".section .fixup, \"ax\"\n"
+                "3: movl $1, %[faulted]\n"
+                ".previous\n"
+
+                _ASM_EXTABLE(1b, 3b)
+                _ASM_EXTABLE(2b, 3b)
+
+                : [parent_replaced] "=r" (parent), [old] "=r" (old),
+                  [faulted] "=r" (faulted)
+                : [parent_old] "0" (parent), [return_hooker] "r" (return_hooker)
+                : "memory"
+        );
+
+        if (unlikely(faulted)) {
+                ftrace_graph_stop();
+                WARN_ON(1);
+                return;
+        }
+
+        if (unlikely(!__kernel_text_address(old))) {
+                ftrace_graph_stop();
+                *parent = old;
+                WARN_ON(1);
+                return;
+        }
+
+        calltime = cpu_clock(raw_smp_processor_id());
+
+        if (push_return_trace(old, calltime,
+                                self_addr, &trace.depth) == -EBUSY) {
+                *parent = old;
+                return;
+        }
+
+        trace.func = self_addr;
+
+        /* Only trace if the calling function expects to */
+        if (!ftrace_graph_entry(&trace)) {
+                current->curr_ret_stack--;
+                *parent = old;
+        }
+}
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/genapic_64.c
index 6c9bfc9e1e95..2bced78b0b8e 100644
--- a/arch/x86/kernel/genapic_64.c
+++ b/arch/x86/kernel/genapic_64.c
@@ -21,6 +21,7 @@
 #include <asm/smp.h>
 #include <asm/ipi.h>
 #include <asm/genapic.h>
+#include <asm/setup.h>
 
 extern struct genapic apic_flat;
 extern struct genapic apic_physflat;
@@ -53,6 +54,9 @@ void __init setup_apic_routing(void)
                         genapic = &apic_physflat;
                 printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name);
         }
+
+        if (x86_quirks->update_genapic)
+                x86_quirks->update_genapic();
 }
 
 /* Same for both flat and physical. */
diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/genapic_flat_64.c
index c0262791bda4..34185488e4fb 100644
--- a/arch/x86/kernel/genapic_flat_64.c
+++ b/arch/x86/kernel/genapic_flat_64.c
@@ -30,12 +30,12 @@ static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
         return 1;
 }
 
-static cpumask_t flat_target_cpus(void)
+static const struct cpumask *flat_target_cpus(void)
 {
-        return cpu_online_map;
+        return cpu_online_mask;
 }
 
-static cpumask_t flat_vector_allocation_domain(int cpu)
+static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask)
 {
         /* Careful. Some cpus do not strictly honor the set of cpus
          * specified in the interrupt destination when using lowest
@@ -45,8 +45,8 @@ static cpumask_t flat_vector_allocation_domain(int cpu)
          * deliver interrupts to the wrong hyperthread when only one
          * hyperthread was specified in the interrupt desitination.
          */
-        cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
-        return domain;
+        cpumask_clear(retmask);
+        cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
 }
 
 /*
@@ -69,9 +69,8 @@ static void flat_init_apic_ldr(void)
         apic_write(APIC_LDR, val);
 }
 
-static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
+static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
 {
-        unsigned long mask = cpus_addr(cpumask)[0];
         unsigned long flags;
 
         local_irq_save(flags);
@@ -79,20 +78,41 @@ static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
         local_irq_restore(flags);
 }
 
+static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
+{
+        unsigned long mask = cpumask_bits(cpumask)[0];
+
+        _flat_send_IPI_mask(mask, vector);
+}
+
+static void flat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
+                                          int vector)
+{
+        unsigned long mask = cpumask_bits(cpumask)[0];
+        int cpu = smp_processor_id();
+
+        if (cpu < BITS_PER_LONG)
+                clear_bit(cpu, &mask);
+        _flat_send_IPI_mask(mask, vector);
+}
+
 static void flat_send_IPI_allbutself(int vector)
 {
+        int cpu = smp_processor_id();
 #ifdef  CONFIG_HOTPLUG_CPU
         int hotplug = 1;
 #else
         int hotplug = 0;
 #endif
         if (hotplug || vector == NMI_VECTOR) {
-                cpumask_t allbutme = cpu_online_map;
+                if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) {
+                        unsigned long mask = cpumask_bits(cpu_online_mask)[0];
 
-                cpu_clear(smp_processor_id(), allbutme);
+                        if (cpu < BITS_PER_LONG)
+                                clear_bit(cpu, &mask);
 
-                if (!cpus_empty(allbutme))
-                        flat_send_IPI_mask(allbutme, vector);
+                        _flat_send_IPI_mask(mask, vector);
+                }
         } else if (num_online_cpus() > 1) {
                 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
         }
@@ -101,7 +121,7 @@ static void flat_send_IPI_allbutself(int vector)
 static void flat_send_IPI_all(int vector)
 {
         if (vector == NMI_VECTOR)
-                flat_send_IPI_mask(cpu_online_map, vector);
+                flat_send_IPI_mask(cpu_online_mask, vector);
         else
                 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
 }
@@ -135,9 +155,18 @@ static int flat_apic_id_registered(void)
         return physid_isset(read_xapic_id(), phys_cpu_present_map);
 }
 
-static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask)
+static unsigned int flat_cpu_mask_to_apicid(const struct cpumask *cpumask)
+{
+        return cpumask_bits(cpumask)[0] & APIC_ALL_CPUS;
+}
+
+static unsigned int flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                                const struct cpumask *andmask)
 {
-        return cpus_addr(cpumask)[0] & APIC_ALL_CPUS;
+        unsigned long mask1 = cpumask_bits(cpumask)[0] & APIC_ALL_CPUS;
+        unsigned long mask2 = cpumask_bits(andmask)[0] & APIC_ALL_CPUS;
+
+        return mask1 & mask2;
 }
 
 static unsigned int phys_pkg_id(int index_msb)
@@ -157,8 +186,10 @@ struct genapic apic_flat =  {
         .send_IPI_all = flat_send_IPI_all,
         .send_IPI_allbutself = flat_send_IPI_allbutself,
         .send_IPI_mask = flat_send_IPI_mask,
+        .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
         .send_IPI_self = apic_send_IPI_self,
         .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and,
         .phys_pkg_id = phys_pkg_id,
         .get_apic_id = get_apic_id,
         .set_apic_id = set_apic_id,
@@ -188,35 +219,39 @@ static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
         return 0;
 }
 
-static cpumask_t physflat_target_cpus(void)
+static const struct cpumask *physflat_target_cpus(void)
 {
-        return cpu_online_map;
+        return cpu_online_mask;
 }
 
-static cpumask_t physflat_vector_allocation_domain(int cpu)
+static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
 {
-        return cpumask_of_cpu(cpu);
+        cpumask_clear(retmask);
+        cpumask_set_cpu(cpu, retmask);
 }
 
-static void physflat_send_IPI_mask(cpumask_t cpumask, int vector)
+static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
 {
         send_IPI_mask_sequence(cpumask, vector);
 }
 
-static void physflat_send_IPI_allbutself(int vector)
+static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
+                                              int vector)
 {
-        cpumask_t allbutme = cpu_online_map;
+        send_IPI_mask_allbutself(cpumask, vector);
+}
 
-        cpu_clear(smp_processor_id(), allbutme);
-        physflat_send_IPI_mask(allbutme, vector);
+static void physflat_send_IPI_allbutself(int vector)
+{
+        send_IPI_mask_allbutself(cpu_online_mask, vector);
 }
 
 static void physflat_send_IPI_all(int vector)
 {
-        physflat_send_IPI_mask(cpu_online_map, vector);
+        physflat_send_IPI_mask(cpu_online_mask, vector);
 }
 
-static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask)
+static unsigned int physflat_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
         int cpu;
 
@@ -224,13 +259,31 @@ static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask)
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        cpu = first_cpu(cpumask);
+        cpu = cpumask_first(cpumask);
         if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
+static unsigned int
+physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                const struct cpumask *andmask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * May as well be the first.
+         */
+        for_each_cpu_and(cpu, cpumask, andmask)
+                if (cpumask_test_cpu(cpu, cpu_online_mask))
+                        break;
+        if (cpu < nr_cpu_ids)
+                return per_cpu(x86_cpu_to_apicid, cpu);
+        return BAD_APICID;
+}
+
 struct genapic apic_physflat =  {
         .name = "physical flat",
         .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
@@ -243,8 +296,10 @@ struct genapic apic_physflat =  {
         .send_IPI_all = physflat_send_IPI_all,
         .send_IPI_allbutself = physflat_send_IPI_allbutself,
         .send_IPI_mask = physflat_send_IPI_mask,
+        .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
         .send_IPI_self = apic_send_IPI_self,
         .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
         .phys_pkg_id = phys_pkg_id,
         .get_apic_id = get_apic_id,
         .set_apic_id = set_apic_id,
diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/genx2apic_cluster.c
index f6a2c8eb48a6..6ce497cc372d 100644
--- a/arch/x86/kernel/genx2apic_cluster.c
+++ b/arch/x86/kernel/genx2apic_cluster.c
@@ -22,19 +22,18 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 
 /* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
 
-static cpumask_t x2apic_target_cpus(void)
+static const struct cpumask *x2apic_target_cpus(void)
 {
-        return cpumask_of_cpu(0);
+        return cpumask_of(0);
 }
 
 /*
  * for now each logical cpu is in its own vector allocation domain.
  */
-static cpumask_t x2apic_vector_allocation_domain(int cpu)
+static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
 {
-        cpumask_t domain = CPU_MASK_NONE;
-        cpu_set(cpu, domain);
-        return domain;
+        cpumask_clear(retmask);
+        cpumask_set_cpu(cpu, retmask);
 }
 
 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
@@ -56,32 +55,53 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  * at once. We have 16 cpu's in a cluster. This will minimize IPI register
  * writes.
  */
-static void x2apic_send_IPI_mask(cpumask_t mask, int vector)
+static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 {
         unsigned long flags;
         unsigned long query_cpu;
 
         local_irq_save(flags);
-        for_each_cpu_mask(query_cpu, mask) {
-                __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_logical_apicid, query_cpu),
-                                       vector, APIC_DEST_LOGICAL);
-        }
+        for_each_cpu(query_cpu, mask)
+                __x2apic_send_IPI_dest(
+                        per_cpu(x86_cpu_to_logical_apicid, query_cpu),
+                        vector, APIC_DEST_LOGICAL);
         local_irq_restore(flags);
 }
 
-static void x2apic_send_IPI_allbutself(int vector)
+static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
+                                            int vector)
 {
-        cpumask_t mask = cpu_online_map;
+        unsigned long flags;
+        unsigned long query_cpu;
+        unsigned long this_cpu = smp_processor_id();
 
-        cpu_clear(smp_processor_id(), mask);
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask)
+                if (query_cpu != this_cpu)
+                        __x2apic_send_IPI_dest(
+                                per_cpu(x86_cpu_to_logical_apicid, query_cpu),
+                                vector, APIC_DEST_LOGICAL);
+        local_irq_restore(flags);
+}
+
+static void x2apic_send_IPI_allbutself(int vector)
+{
+        unsigned long flags;
+        unsigned long query_cpu;
+        unsigned long this_cpu = smp_processor_id();
 
-        if (!cpus_empty(mask))
-                x2apic_send_IPI_mask(mask, vector);
+        local_irq_save(flags);
+        for_each_online_cpu(query_cpu)
+                if (query_cpu != this_cpu)
+                        __x2apic_send_IPI_dest(
+                                per_cpu(x86_cpu_to_logical_apicid, query_cpu),
+                                vector, APIC_DEST_LOGICAL);
+        local_irq_restore(flags);
 }
 
 static void x2apic_send_IPI_all(int vector)
 {
-        x2apic_send_IPI_mask(cpu_online_map, vector);
+        x2apic_send_IPI_mask(cpu_online_mask, vector);
 }
 
 static int x2apic_apic_id_registered(void)
@@ -89,21 +109,38 @@ static int x2apic_apic_id_registered(void)
         return 1;
 }
 
-static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask)
+static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
         int cpu;
 
         /*
-         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * We're using fixed IRQ delivery, can only return one logical APIC ID.
          * May as well be the first.
          */
-        cpu = first_cpu(cpumask);
-        if ((unsigned)cpu < NR_CPUS)
+        cpu = cpumask_first(cpumask);
+        if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_logical_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
+static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                                  const struct cpumask *andmask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one logical APIC ID.
+         * May as well be the first.
+         */
+        for_each_cpu_and(cpu, cpumask, andmask)
+                if (cpumask_test_cpu(cpu, cpu_online_mask))
+                        break;
+        if (cpu < nr_cpu_ids)
+                return per_cpu(x86_cpu_to_logical_apicid, cpu);
+        return BAD_APICID;
+}
+
 static unsigned int get_apic_id(unsigned long x)
 {
         unsigned int id;
@@ -150,8 +187,10 @@ struct genapic apic_x2apic_cluster = {
         .send_IPI_all = x2apic_send_IPI_all,
         .send_IPI_allbutself = x2apic_send_IPI_allbutself,
         .send_IPI_mask = x2apic_send_IPI_mask,
+        .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
         .send_IPI_self = x2apic_send_IPI_self,
         .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
         .phys_pkg_id = phys_pkg_id,
         .get_apic_id = get_apic_id,
         .set_apic_id = set_apic_id,
diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/genx2apic_phys.c
index d042211768b7..21bcc0e098ba 100644
--- a/arch/x86/kernel/genx2apic_phys.c
+++ b/arch/x86/kernel/genx2apic_phys.c
@@ -29,16 +29,15 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 
 /* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
 
-static cpumask_t x2apic_target_cpus(void)
+static const struct cpumask *x2apic_target_cpus(void)
 {
-        return cpumask_of_cpu(0);
+        return cpumask_of(0);
 }
 
-static cpumask_t x2apic_vector_allocation_domain(int cpu)
+static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
 {
-        cpumask_t domain = CPU_MASK_NONE;
-        cpu_set(cpu, domain);
-        return domain;
+        cpumask_clear(retmask);
+        cpumask_set_cpu(cpu, retmask);
 }
 
 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
@@ -54,32 +53,54 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
         x2apic_icr_write(cfg, apicid);
 }
 
-static void x2apic_send_IPI_mask(cpumask_t mask, int vector)
+static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 {
         unsigned long flags;
         unsigned long query_cpu;
 
         local_irq_save(flags);
-        for_each_cpu_mask(query_cpu, mask) {
+        for_each_cpu(query_cpu, mask) {
                 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
                                        vector, APIC_DEST_PHYSICAL);
         }
         local_irq_restore(flags);
 }
 
-static void x2apic_send_IPI_allbutself(int vector)
+static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
+                                            int vector)
 {
-        cpumask_t mask = cpu_online_map;
+        unsigned long flags;
+        unsigned long query_cpu;
+        unsigned long this_cpu = smp_processor_id();
+
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask) {
+                if (query_cpu != this_cpu)
+                        __x2apic_send_IPI_dest(
+                                per_cpu(x86_cpu_to_apicid, query_cpu),
+                                vector, APIC_DEST_PHYSICAL);
+        }
+        local_irq_restore(flags);
+}
 
-        cpu_clear(smp_processor_id(), mask);
+static void x2apic_send_IPI_allbutself(int vector)
+{
+        unsigned long flags;
+        unsigned long query_cpu;
+        unsigned long this_cpu = smp_processor_id();
 
-        if (!cpus_empty(mask))
-                x2apic_send_IPI_mask(mask, vector);
+        local_irq_save(flags);
+        for_each_online_cpu(query_cpu)
+                if (query_cpu != this_cpu)
+                        __x2apic_send_IPI_dest(
+                                per_cpu(x86_cpu_to_apicid, query_cpu),
+                                vector, APIC_DEST_PHYSICAL);
+        local_irq_restore(flags);
 }
 
 static void x2apic_send_IPI_all(int vector)
 {
-        x2apic_send_IPI_mask(cpu_online_map, vector);
+        x2apic_send_IPI_mask(cpu_online_mask, vector);
 }
 
 static int x2apic_apic_id_registered(void)
@@ -87,7 +108,7 @@ static int x2apic_apic_id_registered(void)
         return 1;
 }
 
-static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask)
+static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
         int cpu;
 
@@ -95,13 +116,30 @@ static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask)
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        cpu = first_cpu(cpumask);
-        if ((unsigned)cpu < NR_CPUS)
+        cpu = cpumask_first(cpumask);
+        if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
+static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                                  const struct cpumask *andmask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * May as well be the first.
+         */
+        for_each_cpu_and(cpu, cpumask, andmask)
+                if (cpumask_test_cpu(cpu, cpu_online_mask))
+                        break;
+        if (cpu < nr_cpu_ids)
+                return per_cpu(x86_cpu_to_apicid, cpu);
+        return BAD_APICID;
+}
+
 static unsigned int get_apic_id(unsigned long x)
 {
         unsigned int id;
@@ -123,12 +161,12 @@ static unsigned int phys_pkg_id(int index_msb)
         return current_cpu_data.initial_apicid >> index_msb;
 }
 
-void x2apic_send_IPI_self(int vector)
+static void x2apic_send_IPI_self(int vector)
 {
         apic_write(APIC_SELF_IPI, vector);
 }
 
-void init_x2apic_ldr(void)
+static void init_x2apic_ldr(void)
 {
         return;
 }
@@ -145,8 +183,10 @@ struct genapic apic_x2apic_phys = {
         .send_IPI_all = x2apic_send_IPI_all,
         .send_IPI_allbutself = x2apic_send_IPI_allbutself,
         .send_IPI_mask = x2apic_send_IPI_mask,
+        .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
         .send_IPI_self = x2apic_send_IPI_self,
         .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
         .phys_pkg_id = phys_pkg_id,
         .get_apic_id = get_apic_id,
         .set_apic_id = set_apic_id,
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index 2c7dbdb98278..b193e082f6ce 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -10,6 +10,7 @@
 
 #include <linux/kernel.h>
 #include <linux/threads.h>
+#include <linux/cpu.h>
 #include <linux/cpumask.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
@@ -17,6 +18,9 @@
 #include <linux/sched.h>
 #include <linux/module.h>
 #include <linux/hardirq.h>
+#include <linux/timer.h>
+#include <linux/proc_fs.h>
+#include <asm/current.h>
 #include <asm/smp.h>
 #include <asm/ipi.h>
 #include <asm/genapic.h>
@@ -75,16 +79,15 @@ EXPORT_SYMBOL(sn_rtc_cycles_per_second);
 
 /* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
 
-static cpumask_t uv_target_cpus(void)
+static const struct cpumask *uv_target_cpus(void)
 {
-        return cpumask_of_cpu(0);
+        return cpumask_of(0);
 }
 
-static cpumask_t uv_vector_allocation_domain(int cpu)
+static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)
 {
-        cpumask_t domain = CPU_MASK_NONE;
-        cpu_set(cpu, domain);
-        return domain;
+        cpumask_clear(retmask);
+        cpumask_set_cpu(cpu, retmask);
 }
 
 int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip)
@@ -123,28 +126,37 @@ static void uv_send_IPI_one(int cpu, int vector)
         uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
 }
 
-static void uv_send_IPI_mask(cpumask_t mask, int vector)
+static void uv_send_IPI_mask(const struct cpumask *mask, int vector)
 {
         unsigned int cpu;
 
-        for_each_possible_cpu(cpu)
-                if (cpu_isset(cpu, mask))
+        for_each_cpu(cpu, mask)
+                uv_send_IPI_one(cpu, vector);
+}
+
+static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
+{
+        unsigned int cpu;
+        unsigned int this_cpu = smp_processor_id();
+
+        for_each_cpu(cpu, mask)
+                if (cpu != this_cpu)
                         uv_send_IPI_one(cpu, vector);
 }
 
 static void uv_send_IPI_allbutself(int vector)
 {
-        cpumask_t mask = cpu_online_map;
-
-        cpu_clear(smp_processor_id(), mask);
+        unsigned int cpu;
+        unsigned int this_cpu = smp_processor_id();
 
-        if (!cpus_empty(mask))
-                uv_send_IPI_mask(mask, vector);
+        for_each_online_cpu(cpu)
+                if (cpu != this_cpu)
+                        uv_send_IPI_one(cpu, vector);
 }
 
 static void uv_send_IPI_all(int vector)
 {
-        uv_send_IPI_mask(cpu_online_map, vector);
+        uv_send_IPI_mask(cpu_online_mask, vector);
 }
 
 static int uv_apic_id_registered(void)
@@ -156,7 +168,7 @@ static void uv_init_apic_ldr(void)
 {
 }
 
-static unsigned int uv_cpu_mask_to_apicid(cpumask_t cpumask)
+static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
         int cpu;
 
@@ -164,13 +176,30 @@ static unsigned int uv_cpu_mask_to_apicid(cpumask_t cpumask)
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        cpu = first_cpu(cpumask);
+        cpu = cpumask_first(cpumask);
         if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
+static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                              const struct cpumask *andmask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * May as well be the first.
+         */
+        for_each_cpu_and(cpu, cpumask, andmask)
+                if (cpumask_test_cpu(cpu, cpu_online_mask))
+                        break;
+        if (cpu < nr_cpu_ids)
+                return per_cpu(x86_cpu_to_apicid, cpu);
+        return BAD_APICID;
+}
+
 static unsigned int get_apic_id(unsigned long x)
 {
         unsigned int id;
@@ -218,8 +247,10 @@ struct genapic apic_x2apic_uv_x = {
         .send_IPI_all = uv_send_IPI_all,
         .send_IPI_allbutself = uv_send_IPI_allbutself,
         .send_IPI_mask = uv_send_IPI_mask,
+        .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself,
         .send_IPI_self = uv_send_IPI_self,
         .cpu_mask_to_apicid = uv_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and,
         .phys_pkg_id = phys_pkg_id,
         .get_apic_id = get_apic_id,
         .set_apic_id = set_apic_id,
@@ -356,6 +387,103 @@ static __init void uv_rtc_init(void)
 }
 
 /*
+ * percpu heartbeat timer
+ */
+static void uv_heartbeat(unsigned long ignored)
+{
+        struct timer_list *timer = &uv_hub_info->scir.timer;
+        unsigned char bits = uv_hub_info->scir.state;
+
+        /* flip heartbeat bit */
+        bits ^= SCIR_CPU_HEARTBEAT;
+
+        /* is this cpu idle? */
+        if (idle_cpu(raw_smp_processor_id()))
+                bits &= ~SCIR_CPU_ACTIVITY;
+        else
+                bits |= SCIR_CPU_ACTIVITY;
+
+        /* update system controller interface reg */
+        uv_set_scir_bits(bits);
+
+        /* enable next timer period */
+        mod_timer(timer, jiffies + SCIR_CPU_HB_INTERVAL);
+}
+
+static void __cpuinit uv_heartbeat_enable(int cpu)
+{
+        if (!uv_cpu_hub_info(cpu)->scir.enabled) {
+                struct timer_list *timer = &uv_cpu_hub_info(cpu)->scir.timer;
+
+                uv_set_cpu_scir_bits(cpu, SCIR_CPU_HEARTBEAT|SCIR_CPU_ACTIVITY);
+                setup_timer(timer, uv_heartbeat, cpu);
+                timer->expires = jiffies + SCIR_CPU_HB_INTERVAL;
+                add_timer_on(timer, cpu);
+                uv_cpu_hub_info(cpu)->scir.enabled = 1;
+        }
+
+        /* check boot cpu */
+        if (!uv_cpu_hub_info(0)->scir.enabled)
+                uv_heartbeat_enable(0);
+}
+
+#ifdef CONFIG_HOTPLUG_CPU
+static void __cpuinit uv_heartbeat_disable(int cpu)
+{
+        if (uv_cpu_hub_info(cpu)->scir.enabled) {
+                uv_cpu_hub_info(cpu)->scir.enabled = 0;
+                del_timer(&uv_cpu_hub_info(cpu)->scir.timer);
+        }
+        uv_set_cpu_scir_bits(cpu, 0xff);
+}
+
+/*
+ * cpu hotplug notifier
+ */
+static __cpuinit int uv_scir_cpu_notify(struct notifier_block *self,
+                                       unsigned long action, void *hcpu)
+{
+        long cpu = (long)hcpu;
+
+        switch (action) {
+        case CPU_ONLINE:
+                uv_heartbeat_enable(cpu);
+                break;
+        case CPU_DOWN_PREPARE:
+                uv_heartbeat_disable(cpu);
+                break;
+        default:
+                break;
+        }
+        return NOTIFY_OK;
+}
+
+static __init void uv_scir_register_cpu_notifier(void)
+{
+        hotcpu_notifier(uv_scir_cpu_notify, 0);
+}
+
+#else /* !CONFIG_HOTPLUG_CPU */
+
+static __init void uv_scir_register_cpu_notifier(void)
+{
+}
+
+static __init int uv_init_heartbeat(void)
+{
+        int cpu;
+
+        if (is_uv_system())
+                for_each_online_cpu(cpu)
+                        uv_heartbeat_enable(cpu);
+        return 0;
+}
+
+late_initcall(uv_init_heartbeat);
+
+#endif /* !CONFIG_HOTPLUG_CPU */
+
+/*
  * Called on each cpu to initialize the per_cpu UV data area.
  *      ZZZ hotplug not supported yet
  */
@@ -428,7 +556,7 @@ void __init uv_system_init(void)
 
         uv_bios_init();
         uv_bios_get_sn_info(0, &uv_type, &sn_partition_id,
-                            &uv_coherency_id, &uv_region_size);
+                            &sn_coherency_id, &sn_region_size);
         uv_rtc_init();
 
         for_each_present_cpu(cpu) {
@@ -439,8 +567,7 @@ void __init uv_system_init(void)
                 uv_blade_info[blade].nr_possible_cpus++;
 
                 uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;
-                uv_cpu_hub_info(cpu)->lowmem_remap_top =
-                                        lowmem_redir_base + lowmem_redir_size;
+                uv_cpu_hub_info(cpu)->lowmem_remap_top = lowmem_redir_size;
                 uv_cpu_hub_info(cpu)->m_val = m_val;
                 uv_cpu_hub_info(cpu)->n_val = m_val;
                 uv_cpu_hub_info(cpu)->numa_blade_id = blade;
@@ -450,7 +577,8 @@ void __init uv_system_init(void)
                 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
                 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
                 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
-                uv_cpu_hub_info(cpu)->coherency_domain_number = uv_coherency_id;
+                uv_cpu_hub_info(cpu)->coherency_domain_number = sn_coherency_id;
+                uv_cpu_hub_info(cpu)->scir.offset = SCIR_LOCAL_MMR_BASE + lcpu;
                 uv_node_to_blade[nid] = blade;
                 uv_cpu_to_blade[cpu] = blade;
                 max_pnode = max(pnode, max_pnode);
@@ -467,4 +595,6 @@ void __init uv_system_init(void)
         map_mmioh_high(max_pnode);
 
         uv_cpu_init();
+        uv_scir_register_cpu_notifier();
+        proc_mkdir("sgi_uv", NULL);
 }
diff --git a/arch/x86/kernel/head.c b/arch/x86/kernel/head.c
index 1dcb0f13897e..3e66bd364a9d 100644
--- a/arch/x86/kernel/head.c
+++ b/arch/x86/kernel/head.c
@@ -35,7 +35,6 @@ void __init reserve_ebda_region(void)
 
         /* start of EBDA area */
         ebda_addr = get_bios_ebda();
-        printk(KERN_INFO "BIOS EBDA/lowmem at: %08x/%08x\n", ebda_addr, lowmem);
 
         /* Fixup: bios puts an EBDA in the top 64K segment */
         /* of conventional memory, but does not adjust lowmem. */
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index fa1d25dd83e3..ac108d1fe182 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -12,9 +12,12 @@
 #include <asm/sections.h>
 #include <asm/e820.h>
 #include <asm/bios_ebda.h>
+#include <asm/trampoline.h>
 
 void __init i386_start_kernel(void)
 {
+        reserve_trampoline_memory();
+
         reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS");
 
 #ifdef CONFIG_BLK_DEV_INITRD
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index d16084f90649..b9a4d8c4b935 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -24,9 +24,10 @@
 #include <asm/kdebug.h>
 #include <asm/e820.h>
 #include <asm/bios_ebda.h>
+#include <asm/trampoline.h>
 
 /* boot cpu pda */
-static struct x8664_pda _boot_cpu_pda __read_mostly;
+static struct x8664_pda _boot_cpu_pda;
 
 #ifdef CONFIG_SMP
 /*
@@ -120,6 +121,8 @@ void __init x86_64_start_reservations(char *real_mode_data)
 {
         copy_bootdata(__va(real_mode_data));
 
+        reserve_trampoline_memory();
+
         reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS");
 
 #ifdef CONFIG_BLK_DEV_INITRD
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 067d8de913f6..cd759ad90690 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -33,7 +33,9 @@
  * HPET address is set in acpi/boot.c, when an ACPI entry exists
  */
 unsigned long                           hpet_address;
-unsigned long                           hpet_num_timers;
+#ifdef CONFIG_PCI_MSI
+static unsigned long                    hpet_num_timers;
+#endif
 static void __iomem                     *hpet_virt_address;
 
 struct hpet_dev {
@@ -246,7 +248,7 @@ static void hpet_legacy_clockevent_register(void)
          * Start hpet with the boot cpu mask and make it
          * global after the IO_APIC has been initialized.
          */
-        hpet_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
+        hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
         clockevents_register_device(&hpet_clockevent);
         global_clock_event = &hpet_clockevent;
         printk(KERN_DEBUG "hpet clockevent registered\n");
@@ -301,7 +303,7 @@ static void hpet_set_mode(enum clock_event_mode mode,
                         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
                         hpet_setup_msi_irq(hdev->irq);
                         disable_irq(hdev->irq);
-                        irq_set_affinity(hdev->irq, cpumask_of_cpu(hdev->cpu));
+                        irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
                         enable_irq(hdev->irq);
                 }
                 break;
@@ -449,7 +451,7 @@ static int hpet_setup_irq(struct hpet_dev *dev)
                 return -1;
 
         disable_irq(dev->irq);
-        irq_set_affinity(dev->irq, cpumask_of_cpu(dev->cpu));
+        irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
         enable_irq(dev->irq);
 
         printk(KERN_DEBUG "hpet: %s irq %d for MSI\n",
@@ -500,7 +502,7 @@ static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
         /* 5 usec minimum reprogramming delta. */
         evt->min_delta_ns = 5000;
 
-        evt->cpumask = cpumask_of_cpu(hdev->cpu);
+        evt->cpumask = cpumask_of(hdev->cpu);
         clockevents_register_device(evt);
 }
 
@@ -811,7 +813,7 @@ int __init hpet_enable(void)
 
 out_nohpet:
         hpet_clear_mapping();
-        boot_hpet_disable = 1;
+        hpet_address = 0;
         return 0;
 }
 
@@ -834,10 +836,11 @@ static __init int hpet_late_init(void)
 
                 hpet_address = force_hpet_address;
                 hpet_enable();
-                if (!hpet_virt_address)
-                        return -ENODEV;
         }
 
+        if (!hpet_virt_address)
+                return -ENODEV;
+
         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
 
         for_each_online_cpu(cpu) {
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c
index c1b5e3ece1f2..10f92fb532f3 100644
--- a/arch/x86/kernel/i8253.c
+++ b/arch/x86/kernel/i8253.c
@@ -114,7 +114,7 @@ void __init setup_pit_timer(void)
          * Start pit with the boot cpu mask and make it global after the
          * IO_APIC has been initialized.
          */
-        pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
+        pit_clockevent.cpumask = cpumask_of(smp_processor_id());
         pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
                                      pit_clockevent.shift);
         pit_clockevent.max_delta_ns =
diff --git a/arch/x86/kernel/init_task.c b/arch/x86/kernel/init_task.c
index a4f93b4120c1..df3bf269beab 100644
--- a/arch/x86/kernel/init_task.c
+++ b/arch/x86/kernel/init_task.c
@@ -10,11 +10,9 @@
 #include <asm/pgtable.h>
 #include <asm/desc.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
-EXPORT_UNUSED_SYMBOL(init_mm); /* will be removed in 2.6.26 */
 
 /*
  * Initial thread structure.
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index 9043251210fb..3639442aa7a4 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -108,93 +108,276 @@ static int __init parse_noapic(char *str)
 early_param("noapic", parse_noapic);
 
 struct irq_pin_list;
+
+/*
+ * This is performance-critical, we want to do it O(1)
+ *
+ * the indexing order of this array favors 1:1 mappings
+ * between pins and IRQs.
+ */
+
+struct irq_pin_list {
+        int apic, pin;
+        struct irq_pin_list *next;
+};
+
+static struct irq_pin_list *get_one_free_irq_2_pin(int cpu)
+{
+        struct irq_pin_list *pin;
+        int node;
+
+        node = cpu_to_node(cpu);
+
+        pin = kzalloc_node(sizeof(*pin), GFP_ATOMIC, node);
+        printk(KERN_DEBUG "  alloc irq_2_pin on cpu %d node %d\n", cpu, node);
+
+        return pin;
+}
+
 struct irq_cfg {
-        unsigned int irq;
         struct irq_pin_list *irq_2_pin;
-        cpumask_t domain;
-        cpumask_t old_domain;
+        cpumask_var_t domain;
+        cpumask_var_t old_domain;
         unsigned move_cleanup_count;
         u8 vector;
         u8 move_in_progress : 1;
+#ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
+        u8 move_desc_pending : 1;
+#endif
 };
 
 /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */
+#ifdef CONFIG_SPARSE_IRQ
+static struct irq_cfg irq_cfgx[] = {
+#else
 static struct irq_cfg irq_cfgx[NR_IRQS] = {
-        [0]  = { .irq =  0, .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR,  },
-        [1]  = { .irq =  1, .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR,  },
-        [2]  = { .irq =  2, .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR,  },
-        [3]  = { .irq =  3, .domain = CPU_MASK_ALL, .vector = IRQ3_VECTOR,  },
-        [4]  = { .irq =  4, .domain = CPU_MASK_ALL, .vector = IRQ4_VECTOR,  },
-        [5]  = { .irq =  5, .domain = CPU_MASK_ALL, .vector = IRQ5_VECTOR,  },
-        [6]  = { .irq =  6, .domain = CPU_MASK_ALL, .vector = IRQ6_VECTOR,  },
-        [7]  = { .irq =  7, .domain = CPU_MASK_ALL, .vector = IRQ7_VECTOR,  },
-        [8]  = { .irq =  8, .domain = CPU_MASK_ALL, .vector = IRQ8_VECTOR,  },
-        [9]  = { .irq =  9, .domain = CPU_MASK_ALL, .vector = IRQ9_VECTOR,  },
-        [10] = { .irq = 10, .domain = CPU_MASK_ALL, .vector = IRQ10_VECTOR, },
-        [11] = { .irq = 11, .domain = CPU_MASK_ALL, .vector = IRQ11_VECTOR, },
-        [12] = { .irq = 12, .domain = CPU_MASK_ALL, .vector = IRQ12_VECTOR, },
-        [13] = { .irq = 13, .domain = CPU_MASK_ALL, .vector = IRQ13_VECTOR, },
-        [14] = { .irq = 14, .domain = CPU_MASK_ALL, .vector = IRQ14_VECTOR, },
-        [15] = { .irq = 15, .domain = CPU_MASK_ALL, .vector = IRQ15_VECTOR, },
+#endif
+        [0]  = { .vector = IRQ0_VECTOR,  },
+        [1]  = { .vector = IRQ1_VECTOR,  },
+        [2]  = { .vector = IRQ2_VECTOR,  },
+        [3]  = { .vector = IRQ3_VECTOR,  },
+        [4]  = { .vector = IRQ4_VECTOR,  },
+        [5]  = { .vector = IRQ5_VECTOR,  },
+        [6]  = { .vector = IRQ6_VECTOR,  },
+        [7]  = { .vector = IRQ7_VECTOR,  },
+        [8]  = { .vector = IRQ8_VECTOR,  },
+        [9]  = { .vector = IRQ9_VECTOR,  },
+        [10] = { .vector = IRQ10_VECTOR, },
+        [11] = { .vector = IRQ11_VECTOR, },
+        [12] = { .vector = IRQ12_VECTOR, },
+        [13] = { .vector = IRQ13_VECTOR, },
+        [14] = { .vector = IRQ14_VECTOR, },
+        [15] = { .vector = IRQ15_VECTOR, },
 };
 
-#define for_each_irq_cfg(irq, cfg)              \
-        for (irq = 0, cfg = irq_cfgx; irq < nr_irqs; irq++, cfg++)
+int __init arch_early_irq_init(void)
+{
+        struct irq_cfg *cfg;
+        struct irq_desc *desc;
+        int count;
+        int i;
+
+        cfg = irq_cfgx;
+        count = ARRAY_SIZE(irq_cfgx);
 
+        for (i = 0; i < count; i++) {
+                desc = irq_to_desc(i);
+                desc->chip_data = &cfg[i];
+                alloc_bootmem_cpumask_var(&cfg[i].domain);
+                alloc_bootmem_cpumask_var(&cfg[i].old_domain);
+                if (i < NR_IRQS_LEGACY)
+                        cpumask_setall(cfg[i].domain);
+        }
+
+        return 0;
+}
+
+#ifdef CONFIG_SPARSE_IRQ
 static struct irq_cfg *irq_cfg(unsigned int irq)
 {
-        return irq < nr_irqs ? irq_cfgx + irq : NULL;
+        struct irq_cfg *cfg = NULL;
+        struct irq_desc *desc;
+
+        desc = irq_to_desc(irq);
+        if (desc)
+                cfg = desc->chip_data;
+
+        return cfg;
 }
 
-static struct irq_cfg *irq_cfg_alloc(unsigned int irq)
+static struct irq_cfg *get_one_free_irq_cfg(int cpu)
 {
-        return irq_cfg(irq);
+        struct irq_cfg *cfg;
+        int node;
+
+        node = cpu_to_node(cpu);
+
+        cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node);
+        if (cfg) {
+                if (!alloc_cpumask_var_node(&cfg->domain, GFP_ATOMIC, node)) {
+                        kfree(cfg);
+                        cfg = NULL;
+                } else if (!alloc_cpumask_var_node(&cfg->old_domain,
+                                                          GFP_ATOMIC, node)) {
+                        free_cpumask_var(cfg->domain);
+                        kfree(cfg);
+                        cfg = NULL;
+                } else {
+                        cpumask_clear(cfg->domain);
+                        cpumask_clear(cfg->old_domain);
+                }
+        }
+        printk(KERN_DEBUG "  alloc irq_cfg on cpu %d node %d\n", cpu, node);
+
+        return cfg;
 }
 
-/*
- * Rough estimation of how many shared IRQs there are, can be changed
- * anytime.
- */
-#define MAX_PLUS_SHARED_IRQS NR_IRQS
-#define PIN_MAP_SIZE (MAX_PLUS_SHARED_IRQS + NR_IRQS)
+int arch_init_chip_data(struct irq_desc *desc, int cpu)
+{
+        struct irq_cfg *cfg;
 
-/*
- * This is performance-critical, we want to do it O(1)
- *
- * the indexing order of this array favors 1:1 mappings
- * between pins and IRQs.
- */
+        cfg = desc->chip_data;
+        if (!cfg) {
+                desc->chip_data = get_one_free_irq_cfg(cpu);
+                if (!desc->chip_data) {
+                        printk(KERN_ERR "can not alloc irq_cfg\n");
+                        BUG_ON(1);
+                }
+        }
 
-struct irq_pin_list {
-        int apic, pin;
-        struct irq_pin_list *next;
-};
+        return 0;
+}
 
-static struct irq_pin_list irq_2_pin_head[PIN_MAP_SIZE];
-static struct irq_pin_list *irq_2_pin_ptr;
+#ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
 
-static void __init irq_2_pin_init(void)
+static void
+init_copy_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg, int cpu)
 {
-        struct irq_pin_list *pin = irq_2_pin_head;
-        int i;
+        struct irq_pin_list *old_entry, *head, *tail, *entry;
+
+        cfg->irq_2_pin = NULL;
+        old_entry = old_cfg->irq_2_pin;
+        if (!old_entry)
+                return;
+
+        entry = get_one_free_irq_2_pin(cpu);
+        if (!entry)
+                return;
+
+        entry->apic     = old_entry->apic;
+        entry->pin      = old_entry->pin;
+        head            = entry;
+        tail            = entry;
+        old_entry       = old_entry->next;
+        while (old_entry) {
+                entry = get_one_free_irq_2_pin(cpu);
+                if (!entry) {
+                        entry = head;
+                        while (entry) {
+                                head = entry->next;
+                                kfree(entry);
+                                entry = head;
+                        }
+                        /* still use the old one */
+                        return;
+                }
+                entry->apic     = old_entry->apic;
+                entry->pin      = old_entry->pin;
+                tail->next      = entry;
+                tail            = entry;
+                old_entry       = old_entry->next;
+        }
 
-        for (i = 1; i < PIN_MAP_SIZE; i++)
-                pin[i-1].next = &pin[i];
+        tail->next = NULL;
+        cfg->irq_2_pin = head;
+}
+
+static void free_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg)
+{
+        struct irq_pin_list *entry, *next;
+
+        if (old_cfg->irq_2_pin == cfg->irq_2_pin)
+                return;
 
-        irq_2_pin_ptr = &pin[0];
+        entry = old_cfg->irq_2_pin;
+
+        while (entry) {
+                next = entry->next;
+                kfree(entry);
+                entry = next;
+        }
+        old_cfg->irq_2_pin = NULL;
 }
 
-static struct irq_pin_list *get_one_free_irq_2_pin(void)
+void arch_init_copy_chip_data(struct irq_desc *old_desc,
+                                 struct irq_desc *desc, int cpu)
 {
-        struct irq_pin_list *pin = irq_2_pin_ptr;
+        struct irq_cfg *cfg;
+        struct irq_cfg *old_cfg;
 
-        if (!pin)
-                panic("can not get more irq_2_pin\n");
+        cfg = get_one_free_irq_cfg(cpu);
 
-        irq_2_pin_ptr = pin->next;
-        pin->next = NULL;
-        return pin;
+        if (!cfg)
+                return;
+
+        desc->chip_data = cfg;
+
+        old_cfg = old_desc->chip_data;
+
+        memcpy(cfg, old_cfg, sizeof(struct irq_cfg));
+
+        init_copy_irq_2_pin(old_cfg, cfg, cpu);
+}
+
+static void free_irq_cfg(struct irq_cfg *old_cfg)
+{
+        kfree(old_cfg);
+}
+
+void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc)
+{
+        struct irq_cfg *old_cfg, *cfg;
+
+        old_cfg = old_desc->chip_data;
+        cfg = desc->chip_data;
+
+        if (old_cfg == cfg)
+                return;
+
+        if (old_cfg) {
+                free_irq_2_pin(old_cfg, cfg);
+                free_irq_cfg(old_cfg);
+                old_desc->chip_data = NULL;
+        }
+}
+
+static void
+set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask)
+{
+        struct irq_cfg *cfg = desc->chip_data;
+
+        if (!cfg->move_in_progress) {
+                /* it means that domain is not changed */
+                if (!cpumask_intersects(&desc->affinity, mask))
+                        cfg->move_desc_pending = 1;
+        }
 }
+#endif
+
+#else
+static struct irq_cfg *irq_cfg(unsigned int irq)
+{
+        return irq < nr_irqs ? irq_cfgx + irq : NULL;
+}
+
+#endif
+
+#ifndef CONFIG_NUMA_MIGRATE_IRQ_DESC
+static inline void
+set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask)
+{
+}
+#endif
 
 struct io_apic {
         unsigned int index;
@@ -237,11 +420,10 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned
         writel(value, &io_apic->data);
 }
 
-static bool io_apic_level_ack_pending(unsigned int irq)
+static bool io_apic_level_ack_pending(struct irq_cfg *cfg)
 {
         struct irq_pin_list *entry;
         unsigned long flags;
-        struct irq_cfg *cfg = irq_cfg(irq);
 
         spin_lock_irqsave(&ioapic_lock, flags);
         entry = cfg->irq_2_pin;
@@ -323,13 +505,32 @@ static void ioapic_mask_entry(int apic, int pin)
 }
 
 #ifdef CONFIG_SMP
-static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, u8 vector)
+static void send_cleanup_vector(struct irq_cfg *cfg)
+{
+        cpumask_var_t cleanup_mask;
+
+        if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) {
+                unsigned int i;
+                cfg->move_cleanup_count = 0;
+                for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
+                        cfg->move_cleanup_count++;
+                for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
+                        send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
+        } else {
+                cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask);
+                cfg->move_cleanup_count = cpumask_weight(cleanup_mask);
+                send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
+                free_cpumask_var(cleanup_mask);
+        }
+        cfg->move_in_progress = 0;
+}
+
+static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg)
 {
         int apic, pin;
-        struct irq_cfg *cfg;
         struct irq_pin_list *entry;
+        u8 vector = cfg->vector;
 
-        cfg = irq_cfg(irq);
         entry = cfg->irq_2_pin;
         for (;;) {
                 unsigned int reg;
@@ -359,36 +560,61 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, u8 vector)
         }
 }
 
-static int assign_irq_vector(int irq, cpumask_t mask);
+static int
+assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask);
 
-static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
+/*
+ * Either sets desc->affinity to a valid value, and returns cpu_mask_to_apicid
+ * of that, or returns BAD_APICID and leaves desc->affinity untouched.
+ */
+static unsigned int
+set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
+{
+        struct irq_cfg *cfg;
+        unsigned int irq;
+
+        if (!cpumask_intersects(mask, cpu_online_mask))
+                return BAD_APICID;
+
+        irq = desc->irq;
+        cfg = desc->chip_data;
+        if (assign_irq_vector(irq, cfg, mask))
+                return BAD_APICID;
+
+        cpumask_and(&desc->affinity, cfg->domain, mask);
+        set_extra_move_desc(desc, mask);
+        return cpu_mask_to_apicid_and(&desc->affinity, cpu_online_mask);
+}
+
+static void
+set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
 {
         struct irq_cfg *cfg;
         unsigned long flags;
         unsigned int dest;
-        cpumask_t tmp;
-        struct irq_desc *desc;
+        unsigned int irq;
 
-        cpus_and(tmp, mask, cpu_online_map);
-        if (cpus_empty(tmp))
-                return;
+        irq = desc->irq;
+        cfg = desc->chip_data;
 
-        cfg = irq_cfg(irq);
-        if (assign_irq_vector(irq, mask))
-                return;
+        spin_lock_irqsave(&ioapic_lock, flags);
+        dest = set_desc_affinity(desc, mask);
+        if (dest != BAD_APICID) {
+                /* Only the high 8 bits are valid. */
+                dest = SET_APIC_LOGICAL_ID(dest);
+                __target_IO_APIC_irq(irq, dest, cfg);
+        }
+        spin_unlock_irqrestore(&ioapic_lock, flags);
+}
 
-        cpus_and(tmp, cfg->domain, mask);
-        dest = cpu_mask_to_apicid(tmp);
-        /*
-         * Only the high 8 bits are valid.
-         */
-        dest = SET_APIC_LOGICAL_ID(dest);
+static void
+set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask)
+{
+        struct irq_desc *desc;
 
         desc = irq_to_desc(irq);
-        spin_lock_irqsave(&ioapic_lock, flags);
-        __target_IO_APIC_irq(irq, dest, cfg->vector);
-        desc->affinity = mask;
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+
+        set_ioapic_affinity_irq_desc(desc, mask);
 }
 #endif /* CONFIG_SMP */
 
@@ -397,16 +623,18 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
  * shared ISA-space IRQs, so we have to support them. We are super
  * fast in the common case, and fast for shared ISA-space IRQs.
  */
-static void add_pin_to_irq(unsigned int irq, int apic, int pin)
+static void add_pin_to_irq_cpu(struct irq_cfg *cfg, int cpu, int apic, int pin)
 {
-        struct irq_cfg *cfg;
         struct irq_pin_list *entry;
 
-        /* first time to refer irq_cfg, so with new */
-        cfg = irq_cfg_alloc(irq);
         entry = cfg->irq_2_pin;
         if (!entry) {
-                entry = get_one_free_irq_2_pin();
+                entry = get_one_free_irq_2_pin(cpu);
+                if (!entry) {
+                        printk(KERN_ERR "can not alloc irq_2_pin to add %d - %d\n",
+                                        apic, pin);
+                        return;
+                }
                 cfg->irq_2_pin = entry;
                 entry->apic = apic;
                 entry->pin = pin;
@@ -421,7 +649,7 @@ static void add_pin_to_irq(unsigned int irq, int apic, int pin)
                 entry = entry->next;
         }
 
-        entry->next = get_one_free_irq_2_pin();
+        entry->next = get_one_free_irq_2_pin(cpu);
         entry = entry->next;
         entry->apic = apic;
         entry->pin = pin;
@@ -430,11 +658,10 @@ static void add_pin_to_irq(unsigned int irq, int apic, int pin)
 /*
  * Reroute an IRQ to a different pin.
  */
-static void __init replace_pin_at_irq(unsigned int irq,
+static void __init replace_pin_at_irq_cpu(struct irq_cfg *cfg, int cpu,
                                       int oldapic, int oldpin,
                                       int newapic, int newpin)
 {
-        struct irq_cfg *cfg = irq_cfg(irq);
         struct irq_pin_list *entry = cfg->irq_2_pin;
         int replaced = 0;
 
@@ -451,18 +678,16 @@ static void __init replace_pin_at_irq(unsigned int irq,
 
         /* why? call replace before add? */
         if (!replaced)
-                add_pin_to_irq(irq, newapic, newpin);
+                add_pin_to_irq_cpu(cfg, cpu, newapic, newpin);
 }
 
-static inline void io_apic_modify_irq(unsigned int irq,
+static inline void io_apic_modify_irq(struct irq_cfg *cfg,
                                 int mask_and, int mask_or,
                                 void (*final)(struct irq_pin_list *entry))
 {
         int pin;
-        struct irq_cfg *cfg;
         struct irq_pin_list *entry;
 
-        cfg = irq_cfg(irq);
         for (entry = cfg->irq_2_pin; entry != NULL; entry = entry->next) {
                 unsigned int reg;
                 pin = entry->pin;
@@ -475,13 +700,13 @@ static inline void io_apic_modify_irq(unsigned int irq,
         }
 }
 
-static void __unmask_IO_APIC_irq(unsigned int irq)
+static void __unmask_IO_APIC_irq(struct irq_cfg *cfg)
 {
-        io_apic_modify_irq(irq, ~IO_APIC_REDIR_MASKED, 0, NULL);
+        io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, 0, NULL);
 }
 
 #ifdef CONFIG_X86_64
-void io_apic_sync(struct irq_pin_list *entry)
+static void io_apic_sync(struct irq_pin_list *entry)
 {
         /*
          * Synchronize the IO-APIC and the CPU by doing
@@ -492,47 +717,64 @@ void io_apic_sync(struct irq_pin_list *entry)
         readl(&io_apic->data);
 }
 
-static void __mask_IO_APIC_irq(unsigned int irq)
+static void __mask_IO_APIC_irq(struct irq_cfg *cfg)
 {
-        io_apic_modify_irq(irq, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync);
+        io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync);
 }
 #else /* CONFIG_X86_32 */
-static void __mask_IO_APIC_irq(unsigned int irq)
+static void __mask_IO_APIC_irq(struct irq_cfg *cfg)
 {
-        io_apic_modify_irq(irq, ~0, IO_APIC_REDIR_MASKED, NULL);
+        io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, NULL);
 }
 
-static void __mask_and_edge_IO_APIC_irq(unsigned int irq)
+static void __mask_and_edge_IO_APIC_irq(struct irq_cfg *cfg)
 {
-        io_apic_modify_irq(irq, ~IO_APIC_REDIR_LEVEL_TRIGGER,
+        io_apic_modify_irq(cfg, ~IO_APIC_REDIR_LEVEL_TRIGGER,
                         IO_APIC_REDIR_MASKED, NULL);
 }
 
-static void __unmask_and_level_IO_APIC_irq(unsigned int irq)
+static void __unmask_and_level_IO_APIC_irq(struct irq_cfg *cfg)
 {
-        io_apic_modify_irq(irq, ~IO_APIC_REDIR_MASKED,
+        io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED,
                         IO_APIC_REDIR_LEVEL_TRIGGER, NULL);
 }
 #endif /* CONFIG_X86_32 */
 
-static void mask_IO_APIC_irq (unsigned int irq)
+static void mask_IO_APIC_irq_desc(struct irq_desc *desc)
 {
+        struct irq_cfg *cfg = desc->chip_data;
         unsigned long flags;
 
+        BUG_ON(!cfg);
+
         spin_lock_irqsave(&ioapic_lock, flags);
-        __mask_IO_APIC_irq(irq);
+        __mask_IO_APIC_irq(cfg);
         spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 
-static void unmask_IO_APIC_irq (unsigned int irq)
+static void unmask_IO_APIC_irq_desc(struct irq_desc *desc)
 {
+        struct irq_cfg *cfg = desc->chip_data;
         unsigned long flags;
 
         spin_lock_irqsave(&ioapic_lock, flags);
-        __unmask_IO_APIC_irq(irq);
+        __unmask_IO_APIC_irq(cfg);
         spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 
+static void mask_IO_APIC_irq(unsigned int irq)
+{
+        struct irq_desc *desc = irq_to_desc(irq);
+
+        mask_IO_APIC_irq_desc(desc);
+}
+static void unmask_IO_APIC_irq(unsigned int irq)
+{
+        struct irq_desc *desc = irq_to_desc(irq);
+
+        unmask_IO_APIC_irq_desc(desc);
+}
+
 static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
 {
         struct IO_APIC_route_entry entry;
@@ -809,7 +1051,7 @@ EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector);
  */
 static int EISA_ELCR(unsigned int irq)
 {
-        if (irq < 16) {
+        if (irq < NR_IRQS_LEGACY) {
                 unsigned int port = 0x4d0 + (irq >> 3);
                 return (inb(port) >> (irq & 7)) & 1;
         }
@@ -1034,7 +1276,8 @@ void unlock_vector_lock(void)
         spin_unlock(&vector_lock);
 }
 
-static int __assign_irq_vector(int irq, cpumask_t mask)
+static int
+__assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
 {
         /*
          * NOTE! The local APIC isn't very good at handling
@@ -1049,52 +1292,49 @@ static int __assign_irq_vector(int irq, cpumask_t mask)
          */
         static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0;
         unsigned int old_vector;
-        int cpu;
-        struct irq_cfg *cfg;
-
-        cfg = irq_cfg(irq);
-
-        /* Only try and allocate irqs on cpus that are present */
-        cpus_and(mask, mask, cpu_online_map);
+        int cpu, err;
+        cpumask_var_t tmp_mask;
 
         if ((cfg->move_in_progress) || cfg->move_cleanup_count)
                 return -EBUSY;
 
+        if (!alloc_cpumask_var(&tmp_mask, GFP_ATOMIC))
+                return -ENOMEM;
+
         old_vector = cfg->vector;
         if (old_vector) {
-                cpumask_t tmp;
-                cpus_and(tmp, cfg->domain, mask);
-                if (!cpus_empty(tmp))
+                cpumask_and(tmp_mask, mask, cpu_online_mask);
+                cpumask_and(tmp_mask, cfg->domain, tmp_mask);
+                if (!cpumask_empty(tmp_mask)) {
+                        free_cpumask_var(tmp_mask);
                         return 0;
+                }
         }
 
-        for_each_cpu_mask_nr(cpu, mask) {
-                cpumask_t domain, new_mask;
+        /* Only try and allocate irqs on cpus that are present */
+        err = -ENOSPC;
+        for_each_cpu_and(cpu, mask, cpu_online_mask) {
                 int new_cpu;
                 int vector, offset;
 
-                domain = vector_allocation_domain(cpu);
-                cpus_and(new_mask, domain, cpu_online_map);
+                vector_allocation_domain(cpu, tmp_mask);
 
                 vector = current_vector;
                 offset = current_offset;
 next:
                 vector += 8;
                 if (vector >= first_system_vector) {
-                        /* If we run out of vectors on large boxen, must share them. */
+                        /* If out of vectors on large boxen, must share them. */
                         offset = (offset + 1) % 8;
                         vector = FIRST_DEVICE_VECTOR + offset;
                 }
                 if (unlikely(current_vector == vector))
                         continue;
-#ifdef CONFIG_X86_64
-                if (vector == IA32_SYSCALL_VECTOR)
-                        goto next;
-#else
-                if (vector == SYSCALL_VECTOR)
+
+                if (test_bit(vector, used_vectors))
                         goto next;
-#endif
-                for_each_cpu_mask_nr(new_cpu, new_mask)
+
+                for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask)
                         if (per_cpu(vector_irq, new_cpu)[vector] != -1)
                                 goto next;
                 /* Found one! */
@@ -1102,49 +1342,47 @@ next:
                 current_offset = offset;
                 if (old_vector) {
                         cfg->move_in_progress = 1;
-                        cfg->old_domain = cfg->domain;
+                        cpumask_copy(cfg->old_domain, cfg->domain);
                 }
-                for_each_cpu_mask_nr(new_cpu, new_mask)
+                for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask)
                         per_cpu(vector_irq, new_cpu)[vector] = irq;
                 cfg->vector = vector;
-                cfg->domain = domain;
-                return 0;
+                cpumask_copy(cfg->domain, tmp_mask);
+                err = 0;
+                break;
         }
-        return -ENOSPC;
+        free_cpumask_var(tmp_mask);
+        return err;
 }
 
-static int assign_irq_vector(int irq, cpumask_t mask)
+static int
+assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
 {
         int err;
         unsigned long flags;
 
         spin_lock_irqsave(&vector_lock, flags);
-        err = __assign_irq_vector(irq, mask);
+        err = __assign_irq_vector(irq, cfg, mask);
         spin_unlock_irqrestore(&vector_lock, flags);
         return err;
 }
 
-static void __clear_irq_vector(int irq)
+static void __clear_irq_vector(int irq, struct irq_cfg *cfg)
 {
-        struct irq_cfg *cfg;
-        cpumask_t mask;
         int cpu, vector;
 
-        cfg = irq_cfg(irq);
         BUG_ON(!cfg->vector);
 
         vector = cfg->vector;
-        cpus_and(mask, cfg->domain, cpu_online_map);
-        for_each_cpu_mask_nr(cpu, mask)
+        for_each_cpu_and(cpu, cfg->domain, cpu_online_mask)
                 per_cpu(vector_irq, cpu)[vector] = -1;
 
         cfg->vector = 0;
-        cpus_clear(cfg->domain);
+        cpumask_clear(cfg->domain);
 
         if (likely(!cfg->move_in_progress))
                 return;
-        cpus_and(mask, cfg->old_domain, cpu_online_map);
-        for_each_cpu_mask_nr(cpu, mask) {
+        for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) {
                 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS;
                                                                 vector++) {
                         if (per_cpu(vector_irq, cpu)[vector] != irq)
@@ -1162,10 +1400,12 @@ void __setup_vector_irq(int cpu)
         /* This function must be called with vector_lock held */
         int irq, vector;
         struct irq_cfg *cfg;
+        struct irq_desc *desc;
 
         /* Mark the inuse vectors */
-        for_each_irq_cfg(irq, cfg) {
-                if (!cpu_isset(cpu, cfg->domain))
+        for_each_irq_desc(irq, desc) {
+                cfg = desc->chip_data;
+                if (!cpumask_test_cpu(cpu, cfg->domain))
                         continue;
                 vector = cfg->vector;
                 per_cpu(vector_irq, cpu)[vector] = irq;
@@ -1177,7 +1417,7 @@ void __setup_vector_irq(int cpu)
                         continue;
 
                 cfg = irq_cfg(irq);
-                if (!cpu_isset(cpu, cfg->domain))
+                if (!cpumask_test_cpu(cpu, cfg->domain))
                         per_cpu(vector_irq, cpu)[vector] = -1;
         }
 }
@@ -1215,11 +1455,8 @@ static inline int IO_APIC_irq_trigger(int irq)
 }
 #endif
 
-static void ioapic_register_intr(int irq, unsigned long trigger)
+static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long trigger)
 {
-        struct irq_desc *desc;
-
-        desc = irq_to_desc(irq);
 
         if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
             trigger == IOAPIC_LEVEL)
@@ -1311,23 +1548,22 @@ static int setup_ioapic_entry(int apic, int irq,
         return 0;
 }
 
-static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq,
+static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_desc *desc,
                               int trigger, int polarity)
 {
         struct irq_cfg *cfg;
         struct IO_APIC_route_entry entry;
-        cpumask_t mask;
+        unsigned int dest;
 
         if (!IO_APIC_IRQ(irq))
                 return;
 
-        cfg = irq_cfg(irq);
+        cfg = desc->chip_data;
 
-        mask = TARGET_CPUS;
-        if (assign_irq_vector(irq, mask))
+        if (assign_irq_vector(irq, cfg, TARGET_CPUS))
                 return;
 
-        cpus_and(mask, cfg->domain, mask);
+        dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
 
         apic_printk(APIC_VERBOSE,KERN_DEBUG
                     "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
@@ -1337,16 +1573,15 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq,
 
 
         if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry,
-                               cpu_mask_to_apicid(mask), trigger, polarity,
-                               cfg->vector)) {
+                               dest, trigger, polarity, cfg->vector)) {
                 printk("Failed to setup ioapic entry for ioapic  %d, pin %d\n",
                        mp_ioapics[apic].mp_apicid, pin);
-                __clear_irq_vector(irq);
+                __clear_irq_vector(irq, cfg);
                 return;
         }
 
-        ioapic_register_intr(irq, trigger);
-        if (irq < 16)
+        ioapic_register_intr(irq, desc, trigger);
+        if (irq < NR_IRQS_LEGACY)
                 disable_8259A_irq(irq);
 
         ioapic_write_entry(apic, pin, entry);
@@ -1356,6 +1591,9 @@ static void __init setup_IO_APIC_irqs(void)
 {
         int apic, pin, idx, irq;
         int notcon = 0;
+        struct irq_desc *desc;
+        struct irq_cfg *cfg;
+        int cpu = boot_cpu_id;
 
         apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
 
@@ -1387,9 +1625,15 @@ static void __init setup_IO_APIC_irqs(void)
                         if (multi_timer_check(apic, irq))
                                 continue;
 #endif
-                        add_pin_to_irq(irq, apic, pin);
+                        desc = irq_to_desc_alloc_cpu(irq, cpu);
+                        if (!desc) {
+                                printk(KERN_INFO "can not get irq_desc for %d\n", irq);
+                                continue;
+                        }
+                        cfg = desc->chip_data;
+                        add_pin_to_irq_cpu(cfg, cpu, apic, pin);
 
-                        setup_IO_APIC_irq(apic, pin, irq,
+                        setup_IO_APIC_irq(apic, pin, irq, desc,
                                         irq_trigger(idx), irq_polarity(idx));
                 }
         }
@@ -1448,6 +1692,7 @@ __apicdebuginit(void) print_IO_APIC(void)
         union IO_APIC_reg_03 reg_03;
         unsigned long flags;
         struct irq_cfg *cfg;
+        struct irq_desc *desc;
         unsigned int irq;
 
         if (apic_verbosity == APIC_QUIET)
@@ -1537,8 +1782,11 @@ __apicdebuginit(void) print_IO_APIC(void)
         }
         }
         printk(KERN_DEBUG "IRQ to pin mappings:\n");
-        for_each_irq_cfg(irq, cfg) {
-                struct irq_pin_list *entry = cfg->irq_2_pin;
+        for_each_irq_desc(irq, desc) {
+                struct irq_pin_list *entry;
+
+                cfg = desc->chip_data;
+                entry = cfg->irq_2_pin;
                 if (!entry)
                         continue;
                 printk(KERN_DEBUG "IRQ%d ", irq);
@@ -2022,14 +2270,16 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
 {
         int was_pending = 0;
         unsigned long flags;
+        struct irq_cfg *cfg;
 
         spin_lock_irqsave(&ioapic_lock, flags);
-        if (irq < 16) {
+        if (irq < NR_IRQS_LEGACY) {
                 disable_8259A_irq(irq);
                 if (i8259A_irq_pending(irq))
                         was_pending = 1;
         }
-        __unmask_IO_APIC_irq(irq);
+        cfg = irq_cfg(irq);
+        __unmask_IO_APIC_irq(cfg);
         spin_unlock_irqrestore(&ioapic_lock, flags);
 
         return was_pending;
@@ -2043,7 +2293,7 @@ static int ioapic_retrigger_irq(unsigned int irq)
         unsigned long flags;
 
         spin_lock_irqsave(&vector_lock, flags);
-        send_IPI_mask(cpumask_of_cpu(first_cpu(cfg->domain)), cfg->vector);
+        send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);
         spin_unlock_irqrestore(&vector_lock, flags);
 
         return 1;
@@ -2092,35 +2342,35 @@ static DECLARE_DELAYED_WORK(ir_migration_work, ir_irq_migration);
  * as simple as edge triggered migration and we can do the irq migration
  * with a simple atomic update to IO-APIC RTE.
  */
-static void migrate_ioapic_irq(int irq, cpumask_t mask)
+static void
+migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
 {
         struct irq_cfg *cfg;
-        struct irq_desc *desc;
-        cpumask_t tmp, cleanup_mask;
         struct irte irte;
         int modify_ioapic_rte;
         unsigned int dest;
         unsigned long flags;
+        unsigned int irq;
 
-        cpus_and(tmp, mask, cpu_online_map);
-        if (cpus_empty(tmp))
+        if (!cpumask_intersects(mask, cpu_online_mask))
                 return;
 
+        irq = desc->irq;
         if (get_irte(irq, &irte))
                 return;
 
-        if (assign_irq_vector(irq, mask))
+        cfg = desc->chip_data;
+        if (assign_irq_vector(irq, cfg, mask))
                 return;
 
-        cfg = irq_cfg(irq);
-        cpus_and(tmp, cfg->domain, mask);
-        dest = cpu_mask_to_apicid(tmp);
+        set_extra_move_desc(desc, mask);
+
+        dest = cpu_mask_to_apicid_and(cfg->domain, mask);
 
-        desc = irq_to_desc(irq);
         modify_ioapic_rte = desc->status & IRQ_LEVEL;
         if (modify_ioapic_rte) {
                 spin_lock_irqsave(&ioapic_lock, flags);
-                __target_IO_APIC_irq(irq, dest, cfg->vector);
+                __target_IO_APIC_irq(irq, dest, cfg);
                 spin_unlock_irqrestore(&ioapic_lock, flags);
         }
 
@@ -2132,24 +2382,20 @@ static void migrate_ioapic_irq(int irq, cpumask_t mask)
          */
         modify_irte(irq, &irte);
 
-        if (cfg->move_in_progress) {
-                cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map);
-                cfg->move_cleanup_count = cpus_weight(cleanup_mask);
-                send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
-                cfg->move_in_progress = 0;
-        }
+        if (cfg->move_in_progress)
+                send_cleanup_vector(cfg);
 
-        desc->affinity = mask;
+        cpumask_copy(&desc->affinity, mask);
 }
 
-static int migrate_irq_remapped_level(int irq)
+static int migrate_irq_remapped_level_desc(struct irq_desc *desc)
 {
         int ret = -1;
-        struct irq_desc *desc = irq_to_desc(irq);
+        struct irq_cfg *cfg = desc->chip_data;
 
-        mask_IO_APIC_irq(irq);
+        mask_IO_APIC_irq_desc(desc);
 
-        if (io_apic_level_ack_pending(irq)) {
+        if (io_apic_level_ack_pending(cfg)) {
                 /*
                  * Interrupt in progress. Migrating irq now will change the
                  * vector information in the IO-APIC RTE and that will confuse
@@ -2161,14 +2407,15 @@ static int migrate_irq_remapped_level(int irq)
         }
 
         /* everthing is clear. we have right of way */
-        migrate_ioapic_irq(irq, desc->pending_mask);
+        migrate_ioapic_irq_desc(desc, &desc->pending_mask);
 
         ret = 0;
         desc->status &= ~IRQ_MOVE_PENDING;
-        cpus_clear(desc->pending_mask);
+        cpumask_clear(&desc->pending_mask);
 
 unmask:
-        unmask_IO_APIC_irq(irq);
+        unmask_IO_APIC_irq_desc(desc);
+
         return ret;
 }
 
@@ -2189,7 +2436,7 @@ static void ir_irq_migration(struct work_struct *work)
                                 continue;
                         }
 
-                        desc->chip->set_affinity(irq, desc->pending_mask);
+                        desc->chip->set_affinity(irq, &desc->pending_mask);
                         spin_unlock_irqrestore(&desc->lock, flags);
                 }
         }
@@ -2198,28 +2445,33 @@ static void ir_irq_migration(struct work_struct *work)
 /*
  * Migrates the IRQ destination in the process context.
  */
-static void set_ir_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
+static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
+                                            const struct cpumask *mask)
 {
-        struct irq_desc *desc = irq_to_desc(irq);
-
         if (desc->status & IRQ_LEVEL) {
                 desc->status |= IRQ_MOVE_PENDING;
-                desc->pending_mask = mask;
-                migrate_irq_remapped_level(irq);
+                cpumask_copy(&desc->pending_mask, mask);
+                migrate_irq_remapped_level_desc(desc);
                 return;
         }
 
-        migrate_ioapic_irq(irq, mask);
+        migrate_ioapic_irq_desc(desc, mask);
+}
+static void set_ir_ioapic_affinity_irq(unsigned int irq,
+                                       const struct cpumask *mask)
+{
+        struct irq_desc *desc = irq_to_desc(irq);
+
+        set_ir_ioapic_affinity_irq_desc(desc, mask);
 }
 #endif
 
 asmlinkage void smp_irq_move_cleanup_interrupt(void)
 {
         unsigned vector, me;
+
         ack_APIC_irq();
-#ifdef CONFIG_X86_64
         exit_idle();
-#endif
         irq_enter();
 
         me = smp_processor_id();
@@ -2229,6 +2481,9 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void)
                 struct irq_cfg *cfg;
                 irq = __get_cpu_var(vector_irq)[vector];
 
+                if (irq == -1)
+                        continue;
+
                 desc = irq_to_desc(irq);
                 if (!desc)
                         continue;
@@ -2238,7 +2493,7 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void)
                 if (!cfg->move_cleanup_count)
                         goto unlock;
 
-                if ((vector == cfg->vector) && cpu_isset(me, cfg->domain))
+                if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain))
                         goto unlock;
 
                 __get_cpu_var(vector_irq)[vector] = -1;
@@ -2250,28 +2505,44 @@ unlock:
         irq_exit();
 }
 
-static void irq_complete_move(unsigned int irq)
+static void irq_complete_move(struct irq_desc **descp)
 {
-        struct irq_cfg *cfg = irq_cfg(irq);
+        struct irq_desc *desc = *descp;
+        struct irq_cfg *cfg = desc->chip_data;
         unsigned vector, me;
 
-        if (likely(!cfg->move_in_progress))
+        if (likely(!cfg->move_in_progress)) {
+#ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
+                if (likely(!cfg->move_desc_pending))
+                        return;
+
+                /* domain has not changed, but affinity did */
+                me = smp_processor_id();
+                if (cpu_isset(me, desc->affinity)) {
+                        *descp = desc = move_irq_desc(desc, me);
+                        /* get the new one */
+                        cfg = desc->chip_data;
+                        cfg->move_desc_pending = 0;
+                }
+#endif
                 return;
+        }
 
         vector = ~get_irq_regs()->orig_ax;
         me = smp_processor_id();
-        if ((vector == cfg->vector) && cpu_isset(me, cfg->domain)) {
-                cpumask_t cleanup_mask;
+#ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
+                *descp = desc = move_irq_desc(desc, me);
+                /* get the new one */
+                cfg = desc->chip_data;
+#endif
 
-                cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map);
-                cfg->move_cleanup_count = cpus_weight(cleanup_mask);
-                send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
-                cfg->move_in_progress = 0;
-        }
+        if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain))
+                send_cleanup_vector(cfg);
 }
 #else
-static inline void irq_complete_move(unsigned int irq) {}
+static inline void irq_complete_move(struct irq_desc **descp) {}
 #endif
+
 #ifdef CONFIG_INTR_REMAP
 static void ack_x2apic_level(unsigned int irq)
 {
@@ -2282,11 +2553,14 @@ static void ack_x2apic_edge(unsigned int irq)
 {
         ack_x2APIC_irq();
 }
+
 #endif
 
 static void ack_apic_edge(unsigned int irq)
 {
-        irq_complete_move(irq);
+        struct irq_desc *desc = irq_to_desc(irq);
+
+        irq_complete_move(&desc);
         move_native_irq(irq);
         ack_APIC_irq();
 }
@@ -2295,18 +2569,21 @@ atomic_t irq_mis_count;
 
 static void ack_apic_level(unsigned int irq)
 {
+        struct irq_desc *desc = irq_to_desc(irq);
+
 #ifdef CONFIG_X86_32
         unsigned long v;
         int i;
 #endif
+        struct irq_cfg *cfg;
         int do_unmask_irq = 0;
 
-        irq_complete_move(irq);
+        irq_complete_move(&desc);
 #ifdef CONFIG_GENERIC_PENDING_IRQ
         /* If we are moving the irq we need to mask it */
-        if (unlikely(irq_to_desc(irq)->status & IRQ_MOVE_PENDING)) {
+        if (unlikely(desc->status & IRQ_MOVE_PENDING)) {
                 do_unmask_irq = 1;
-                mask_IO_APIC_irq(irq);
+                mask_IO_APIC_irq_desc(desc);
         }
 #endif
 
@@ -2330,7 +2607,8 @@ static void ack_apic_level(unsigned int irq)
         * operation to prevent an edge-triggered interrupt escaping meanwhile.
         * The idea is from Manfred Spraul.  --macro
         */
-        i = irq_cfg(irq)->vector;
+        cfg = desc->chip_data;
+        i = cfg->vector;
 
         v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1));
 #endif
@@ -2369,17 +2647,18 @@ static void ack_apic_level(unsigned int irq)
                  * accurate and is causing problems then it is a hardware bug
                  * and you can go talk to the chipset vendor about it.
                  */
-                if (!io_apic_level_ack_pending(irq))
+                cfg = desc->chip_data;
+                if (!io_apic_level_ack_pending(cfg))
                         move_masked_irq(irq);
-                unmask_IO_APIC_irq(irq);
+                unmask_IO_APIC_irq_desc(desc);
         }
 
 #ifdef CONFIG_X86_32
         if (!(v & (1 << (i & 0x1f)))) {
                 atomic_inc(&irq_mis_count);
                 spin_lock(&ioapic_lock);
-                __mask_and_edge_IO_APIC_irq(irq);
-                __unmask_and_level_IO_APIC_irq(irq);
+                __mask_and_edge_IO_APIC_irq(cfg);
+                __unmask_and_level_IO_APIC_irq(cfg);
                 spin_unlock(&ioapic_lock);
         }
 #endif
@@ -2430,20 +2709,19 @@ static inline void init_IO_APIC_traps(void)
          * Also, we've got to be careful not to trash gate
          * 0x80, because int 0x80 is hm, kind of importantish. ;)
          */
-        for_each_irq_cfg(irq, cfg) {
-                if (IO_APIC_IRQ(irq) && !cfg->vector) {
+        for_each_irq_desc(irq, desc) {
+                cfg = desc->chip_data;
+                if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) {
                         /*
                          * Hmm.. We don't have an entry for this,
                          * so default to an old-fashioned 8259
                          * interrupt if we can..
                          */
-                        if (irq < 16)
+                        if (irq < NR_IRQS_LEGACY)
                                 make_8259A_irq(irq);
-                        else {
-                                desc = irq_to_desc(irq);
+                        else
                                 /* Strange. Oh, well.. */
                                 desc->chip = &no_irq_chip;
-                        }
                 }
         }
 }
@@ -2468,7 +2746,7 @@ static void unmask_lapic_irq(unsigned int irq)
         apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED);
 }
 
-static void ack_lapic_irq (unsigned int irq)
+static void ack_lapic_irq(unsigned int irq)
 {
         ack_APIC_irq();
 }
@@ -2480,11 +2758,8 @@ static struct irq_chip lapic_chip __read_mostly = {
         .ack            = ack_lapic_irq,
 };
 
-static void lapic_register_intr(int irq)
+static void lapic_register_intr(int irq, struct irq_desc *desc)
 {
-        struct irq_desc *desc;
-
-        desc = irq_to_desc(irq);
         desc->status &= ~IRQ_LEVEL;
         set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq,
                                       "edge");
@@ -2588,7 +2863,9 @@ int timer_through_8259 __initdata;
  */
 static inline void __init check_timer(void)
 {
-        struct irq_cfg *cfg = irq_cfg(0);
+        struct irq_desc *desc = irq_to_desc(0);
+        struct irq_cfg *cfg = desc->chip_data;
+        int cpu = boot_cpu_id;
         int apic1, pin1, apic2, pin2;
         unsigned long flags;
         unsigned int ver;
@@ -2603,7 +2880,7 @@ static inline void __init check_timer(void)
          * get/set the timer IRQ vector:
          */
         disable_8259A_irq(0);
-        assign_irq_vector(0, TARGET_CPUS);
+        assign_irq_vector(0, cfg, TARGET_CPUS);
 
         /*
          * As IRQ0 is to be enabled in the 8259A, the virtual
@@ -2654,10 +2931,10 @@ static inline void __init check_timer(void)
                  * Ok, does IRQ0 through the IOAPIC work?
                  */
                 if (no_pin1) {
-                        add_pin_to_irq(0, apic1, pin1);
+                        add_pin_to_irq_cpu(cfg, cpu, apic1, pin1);
                         setup_timer_IRQ0_pin(apic1, pin1, cfg->vector);
                 }
-                unmask_IO_APIC_irq(0);
+                unmask_IO_APIC_irq_desc(desc);
                 if (timer_irq_works()) {
                         if (nmi_watchdog == NMI_IO_APIC) {
                                 setup_nmi();
@@ -2683,9 +2960,9 @@ static inline void __init check_timer(void)
                 /*
                  * legacy devices should be connected to IO APIC #0
                  */
-                replace_pin_at_irq(0, apic1, pin1, apic2, pin2);
+                replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2);
                 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
-                unmask_IO_APIC_irq(0);
+                unmask_IO_APIC_irq_desc(desc);
                 enable_8259A_irq(0);
                 if (timer_irq_works()) {
                         apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
@@ -2717,7 +2994,7 @@ static inline void __init check_timer(void)
         apic_printk(APIC_QUIET, KERN_INFO
                     "...trying to set up timer as Virtual Wire IRQ...\n");
 
-        lapic_register_intr(0);
+        lapic_register_intr(0, desc);
         apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector);     /* Fixed mode */
         enable_8259A_irq(0);
 
@@ -2902,22 +3179,26 @@ unsigned int create_irq_nr(unsigned int irq_want)
         unsigned int irq;
         unsigned int new;
         unsigned long flags;
-        struct irq_cfg *cfg_new;
-
-        irq_want = nr_irqs - 1;
+        struct irq_cfg *cfg_new = NULL;
+        int cpu = boot_cpu_id;
+        struct irq_desc *desc_new = NULL;
 
         irq = 0;
         spin_lock_irqsave(&vector_lock, flags);
-        for (new = irq_want; new > 0; new--) {
+        for (new = irq_want; new < NR_IRQS; new++) {
                 if (platform_legacy_irq(new))
                         continue;
-                cfg_new = irq_cfg(new);
-                if (cfg_new && cfg_new->vector != 0)
+
+                desc_new = irq_to_desc_alloc_cpu(new, cpu);
+                if (!desc_new) {
+                        printk(KERN_INFO "can not get irq_desc for %d\n", new);
                         continue;
-                /* check if need to create one */
-                if (!cfg_new)
-                        cfg_new = irq_cfg_alloc(new);
-                if (__assign_irq_vector(new, TARGET_CPUS) == 0)
+                }
+                cfg_new = desc_new->chip_data;
+
+                if (cfg_new->vector != 0)
+                        continue;
+                if (__assign_irq_vector(new, cfg_new, TARGET_CPUS) == 0)
                         irq = new;
                 break;
         }
@@ -2925,15 +3206,21 @@ unsigned int create_irq_nr(unsigned int irq_want)
 
         if (irq > 0) {
                 dynamic_irq_init(irq);
+                /* restore it, in case dynamic_irq_init clear it */
+                if (desc_new)
+                        desc_new->chip_data = cfg_new;
         }
         return irq;
 }
 
+static int nr_irqs_gsi = NR_IRQS_LEGACY;
 int create_irq(void)
 {
+        unsigned int irq_want;
         int irq;
 
-        irq = create_irq_nr(nr_irqs - 1);
+        irq_want = nr_irqs_gsi;
+        irq = create_irq_nr(irq_want);
 
         if (irq == 0)
                 irq = -1;
@@ -2944,14 +3231,22 @@ int create_irq(void)
 void destroy_irq(unsigned int irq)
 {
         unsigned long flags;
+        struct irq_cfg *cfg;
+        struct irq_desc *desc;
 
+        /* store it, in case dynamic_irq_cleanup clear it */
+        desc = irq_to_desc(irq);
+        cfg = desc->chip_data;
         dynamic_irq_cleanup(irq);
+        /* connect back irq_cfg */
+        if (desc)
+                desc->chip_data = cfg;
 
 #ifdef CONFIG_INTR_REMAP
         free_irte(irq);
 #endif
         spin_lock_irqsave(&vector_lock, flags);
-        __clear_irq_vector(irq);
+        __clear_irq_vector(irq, cfg);
         spin_unlock_irqrestore(&vector_lock, flags);
 }
 
@@ -2964,16 +3259,13 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
         struct irq_cfg *cfg;
         int err;
         unsigned dest;
-        cpumask_t tmp;
 
-        tmp = TARGET_CPUS;
-        err = assign_irq_vector(irq, tmp);
+        cfg = irq_cfg(irq);
+        err = assign_irq_vector(irq, cfg, TARGET_CPUS);
         if (err)
                 return err;
 
-        cfg = irq_cfg(irq);
-        cpus_and(tmp, cfg->domain, tmp);
-        dest = cpu_mask_to_apicid(tmp);
+        dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
 
 #ifdef CONFIG_INTR_REMAP
         if (irq_remapped(irq)) {
@@ -3027,64 +3319,48 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
 }
 
 #ifdef CONFIG_SMP
-static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
+static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
 {
+        struct irq_desc *desc = irq_to_desc(irq);
         struct irq_cfg *cfg;
         struct msi_msg msg;
         unsigned int dest;
-        cpumask_t tmp;
-        struct irq_desc *desc;
 
-        cpus_and(tmp, mask, cpu_online_map);
-        if (cpus_empty(tmp))
+        dest = set_desc_affinity(desc, mask);
+        if (dest == BAD_APICID)
                 return;
 
-        if (assign_irq_vector(irq, mask))
-                return;
+        cfg = desc->chip_data;
 
-        cfg = irq_cfg(irq);
-        cpus_and(tmp, cfg->domain, mask);
-        dest = cpu_mask_to_apicid(tmp);
-
-        read_msi_msg(irq, &msg);
+        read_msi_msg_desc(desc, &msg);
 
         msg.data &= ~MSI_DATA_VECTOR_MASK;
         msg.data |= MSI_DATA_VECTOR(cfg->vector);
         msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
         msg.address_lo |= MSI_ADDR_DEST_ID(dest);
 
-        write_msi_msg(irq, &msg);
-        desc = irq_to_desc(irq);
-        desc->affinity = mask;
+        write_msi_msg_desc(desc, &msg);
 }
-
 #ifdef CONFIG_INTR_REMAP
 /*
  * Migrate the MSI irq to another cpumask. This migration is
  * done in the process context using interrupt-remapping hardware.
  */
-static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
+static void
+ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
 {
-        struct irq_cfg *cfg;
+        struct irq_desc *desc = irq_to_desc(irq);
+        struct irq_cfg *cfg = desc->chip_data;
         unsigned int dest;
-        cpumask_t tmp, cleanup_mask;
         struct irte irte;
-        struct irq_desc *desc;
-
-        cpus_and(tmp, mask, cpu_online_map);
-        if (cpus_empty(tmp))
-                return;
 
         if (get_irte(irq, &irte))
                 return;
 
-        if (assign_irq_vector(irq, mask))
+        dest = set_desc_affinity(desc, mask);
+        if (dest == BAD_APICID)
                 return;
 
-        cfg = irq_cfg(irq);
-        cpus_and(tmp, cfg->domain, mask);
-        dest = cpu_mask_to_apicid(tmp);
-
         irte.vector = cfg->vector;
         irte.dest_id = IRTE_DEST(dest);
 
@@ -3098,16 +3374,10 @@ static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
          * at the new destination. So, time to cleanup the previous
          * vector allocation.
          */
-        if (cfg->move_in_progress) {
-                cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map);
-                cfg->move_cleanup_count = cpus_weight(cleanup_mask);
-                send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
-                cfg->move_in_progress = 0;
-        }
-
-        desc = irq_to_desc(irq);
-        desc->affinity = mask;
+        if (cfg->move_in_progress)
+                send_cleanup_vector(cfg);
 }
+
 #endif
 #endif /* CONFIG_SMP */
 
@@ -3166,7 +3436,7 @@ static int msi_alloc_irte(struct pci_dev *dev, int irq, int nvec)
 }
 #endif
 
-static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc, int irq)
+static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
 {
         int ret;
         struct msi_msg msg;
@@ -3175,7 +3445,7 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc, int irq)
         if (ret < 0)
                 return ret;
 
-        set_irq_msi(irq, desc);
+        set_irq_msi(irq, msidesc);
         write_msi_msg(irq, &msg);
 
 #ifdef CONFIG_INTR_REMAP
@@ -3195,26 +3465,13 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc, int irq)
         return 0;
 }
 
-static unsigned int build_irq_for_pci_dev(struct pci_dev *dev)
-{
-        unsigned int irq;
-
-        irq = dev->bus->number;
-        irq <<= 8;
-        irq |= dev->devfn;
-        irq <<= 12;
-
-        return irq;
-}
-
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc)
 {
         unsigned int irq;
         int ret;
         unsigned int irq_want;
 
-        irq_want = build_irq_for_pci_dev(dev) + 0x100;
-
+        irq_want = nr_irqs_gsi;
         irq = create_irq_nr(irq_want);
         if (irq == 0)
                 return -1;
@@ -3228,7 +3485,7 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
                 goto error;
 no_ir:
 #endif
-        ret = setup_msi_irq(dev, desc, irq);
+        ret = setup_msi_irq(dev, msidesc, irq);
         if (ret < 0) {
                 destroy_irq(irq);
                 return ret;
@@ -3246,7 +3503,7 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 {
         unsigned int irq;
         int ret, sub_handle;
-        struct msi_desc *desc;
+        struct msi_desc *msidesc;
         unsigned int irq_want;
 
 #ifdef CONFIG_INTR_REMAP
@@ -3254,10 +3511,11 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
         int index = 0;
 #endif
 
-        irq_want = build_irq_for_pci_dev(dev) + 0x100;
+        irq_want = nr_irqs_gsi;
         sub_handle = 0;
-        list_for_each_entry(desc, &dev->msi_list, list) {
-                irq = create_irq_nr(irq_want--);
+        list_for_each_entry(msidesc, &dev->msi_list, list) {
+                irq = create_irq_nr(irq_want);
+                irq_want++;
                 if (irq == 0)
                         return -1;
 #ifdef CONFIG_INTR_REMAP
@@ -3289,7 +3547,7 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
                 }
 no_ir:
 #endif
-                ret = setup_msi_irq(dev, desc, irq);
+                ret = setup_msi_irq(dev, msidesc, irq);
                 if (ret < 0)
                         goto error;
                 sub_handle++;
@@ -3308,24 +3566,18 @@ void arch_teardown_msi_irq(unsigned int irq)
 
 #ifdef CONFIG_DMAR
 #ifdef CONFIG_SMP
-static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
+static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
 {
+        struct irq_desc *desc = irq_to_desc(irq);
         struct irq_cfg *cfg;
         struct msi_msg msg;
         unsigned int dest;
-        cpumask_t tmp;
-        struct irq_desc *desc;
 
-        cpus_and(tmp, mask, cpu_online_map);
-        if (cpus_empty(tmp))
+        dest = set_desc_affinity(desc, mask);
+        if (dest == BAD_APICID)
                 return;
 
-        if (assign_irq_vector(irq, mask))
-                return;
-
-        cfg = irq_cfg(irq);
-        cpus_and(tmp, cfg->domain, mask);
-        dest = cpu_mask_to_apicid(tmp);
+        cfg = desc->chip_data;
 
         dmar_msi_read(irq, &msg);
 
@@ -3335,9 +3587,8 @@ static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
         msg.address_lo |= MSI_ADDR_DEST_ID(dest);
 
         dmar_msi_write(irq, &msg);
-        desc = irq_to_desc(irq);
-        desc->affinity = mask;
 }
+
 #endif /* CONFIG_SMP */
 
 struct irq_chip dmar_msi_type = {
@@ -3369,24 +3620,18 @@ int arch_setup_dmar_msi(unsigned int irq)
 #ifdef CONFIG_HPET_TIMER
 
 #ifdef CONFIG_SMP
-static void hpet_msi_set_affinity(unsigned int irq, cpumask_t mask)
+static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
 {
+        struct irq_desc *desc = irq_to_desc(irq);
         struct irq_cfg *cfg;
-        struct irq_desc *desc;
         struct msi_msg msg;
         unsigned int dest;
-        cpumask_t tmp;
 
-        cpus_and(tmp, mask, cpu_online_map);
-        if (cpus_empty(tmp))
+        dest = set_desc_affinity(desc, mask);
+        if (dest == BAD_APICID)
                 return;
 
-        if (assign_irq_vector(irq, mask))
-                return;
-
-        cfg = irq_cfg(irq);
-        cpus_and(tmp, cfg->domain, mask);
-        dest = cpu_mask_to_apicid(tmp);
+        cfg = desc->chip_data;
 
         hpet_msi_read(irq, &msg);
 
@@ -3396,9 +3641,8 @@ static void hpet_msi_set_affinity(unsigned int irq, cpumask_t mask)
         msg.address_lo |= MSI_ADDR_DEST_ID(dest);
 
         hpet_msi_write(irq, &msg);
-        desc = irq_to_desc(irq);
-        desc->affinity = mask;
 }
+
 #endif /* CONFIG_SMP */
 
 struct irq_chip hpet_msi_type = {
@@ -3451,28 +3695,21 @@ static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector)
         write_ht_irq_msg(irq, &msg);
 }
 
-static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
+static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
 {
+        struct irq_desc *desc = irq_to_desc(irq);
         struct irq_cfg *cfg;
         unsigned int dest;
-        cpumask_t tmp;
-        struct irq_desc *desc;
 
-        cpus_and(tmp, mask, cpu_online_map);
-        if (cpus_empty(tmp))
+        dest = set_desc_affinity(desc, mask);
+        if (dest == BAD_APICID)
                 return;
 
-        if (assign_irq_vector(irq, mask))
-                return;
-
-        cfg = irq_cfg(irq);
-        cpus_and(tmp, cfg->domain, mask);
-        dest = cpu_mask_to_apicid(tmp);
+        cfg = desc->chip_data;
 
         target_ht_irq(irq, dest, cfg->vector);
-        desc = irq_to_desc(irq);
-        desc->affinity = mask;
 }
+
 #endif
 
 static struct irq_chip ht_irq_chip = {
@@ -3490,17 +3727,14 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
 {
         struct irq_cfg *cfg;
         int err;
-        cpumask_t tmp;
 
-        tmp = TARGET_CPUS;
-        err = assign_irq_vector(irq, tmp);
+        cfg = irq_cfg(irq);
+        err = assign_irq_vector(irq, cfg, TARGET_CPUS);
         if (!err) {
                 struct ht_irq_msg msg;
                 unsigned dest;
 
-                cfg = irq_cfg(irq);
-                cpus_and(tmp, cfg->domain, tmp);
-                dest = cpu_mask_to_apicid(tmp);
+                dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
 
                 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);
 
@@ -3536,7 +3770,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
 int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
                        unsigned long mmr_offset)
 {
-        const cpumask_t *eligible_cpu = get_cpu_mask(cpu);
+        const struct cpumask *eligible_cpu = cpumask_of(cpu);
         struct irq_cfg *cfg;
         int mmr_pnode;
         unsigned long mmr_value;
@@ -3544,7 +3778,9 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
         unsigned long flags;
         int err;
 
-        err = assign_irq_vector(irq, *eligible_cpu);
+        cfg = irq_cfg(irq);
+
+        err = assign_irq_vector(irq, cfg, eligible_cpu);
         if (err != 0)
                 return err;
 
@@ -3553,8 +3789,6 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
                                       irq_name);
         spin_unlock_irqrestore(&vector_lock, flags);
 
-        cfg = irq_cfg(irq);
-
         mmr_value = 0;
         entry = (struct uv_IO_APIC_route_entry *)&mmr_value;
         BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
@@ -3565,7 +3799,7 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
         entry->polarity = 0;
         entry->trigger = 0;
         entry->mask = 0;
-        entry->dest = cpu_mask_to_apicid(*eligible_cpu);
+        entry->dest = cpu_mask_to_apicid(eligible_cpu);
 
         mmr_pnode = uv_blade_to_pnode(mmr_blade);
         uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@ -3606,9 +3840,16 @@ int __init io_apic_get_redir_entries (int ioapic)
         return reg_01.bits.entries;
 }
 
-int __init probe_nr_irqs(void)
+void __init probe_nr_irqs_gsi(void)
 {
-        return NR_IRQS;
+        int idx;
+        int nr = 0;
+
+        for (idx = 0; idx < nr_ioapics; idx++)
+                nr += io_apic_get_redir_entries(idx) + 1;
+
+        if (nr > nr_irqs_gsi)
+                nr_irqs_gsi = nr;
 }
 
 /* --------------------------------------------------------------------------
@@ -3707,19 +3948,31 @@ int __init io_apic_get_version(int ioapic)
 
 int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int polarity)
 {
+        struct irq_desc *desc;
+        struct irq_cfg *cfg;
+        int cpu = boot_cpu_id;
+
         if (!IO_APIC_IRQ(irq)) {
                 apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n",
                         ioapic);
                 return -EINVAL;
         }
 
+        desc = irq_to_desc_alloc_cpu(irq, cpu);
+        if (!desc) {
+                printk(KERN_INFO "can not get irq_desc %d\n", irq);
+                return 0;
+        }
+
         /*
          * IRQs < 16 are already in the irq_2_pin[] map
          */
-        if (irq >= 16)
-                add_pin_to_irq(irq, ioapic, pin);
+        if (irq >= NR_IRQS_LEGACY) {
+                cfg = desc->chip_data;
+                add_pin_to_irq_cpu(cfg, cpu, ioapic, pin);
+        }
 
-        setup_IO_APIC_irq(ioapic, pin, irq, triggering, polarity);
+        setup_IO_APIC_irq(ioapic, pin, irq, desc, triggering, polarity);
 
         return 0;
 }
@@ -3757,7 +4010,7 @@ void __init setup_ioapic_dest(void)
         int pin, ioapic, irq, irq_entry;
         struct irq_desc *desc;
         struct irq_cfg *cfg;
-        cpumask_t mask;
+        const struct cpumask *mask;
 
         if (skip_ioapic_setup == 1)
                 return;
@@ -3773,9 +4026,10 @@ void __init setup_ioapic_dest(void)
                          * when you have too many devices, because at that time only boot
                          * cpu is online.
                          */
-                        cfg = irq_cfg(irq);
+                        desc = irq_to_desc(irq);
+                        cfg = desc->chip_data;
                         if (!cfg->vector) {
-                                setup_IO_APIC_irq(ioapic, pin, irq,
+                                setup_IO_APIC_irq(ioapic, pin, irq, desc,
                                                   irq_trigger(irq_entry),
                                                   irq_polarity(irq_entry));
                                 continue;
@@ -3785,19 +4039,18 @@ void __init setup_ioapic_dest(void)
                         /*
                          * Honour affinities which have been set in early boot
                          */
-                        desc = irq_to_desc(irq);
                         if (desc->status &
                             (IRQ_NO_BALANCING | IRQ_AFFINITY_SET))
-                                mask = desc->affinity;
+                                mask = &desc->affinity;
                         else
                                 mask = TARGET_CPUS;
 
 #ifdef CONFIG_INTR_REMAP
                         if (intr_remapping_enabled)
-                                set_ir_ioapic_affinity_irq(irq, mask);
+                                set_ir_ioapic_affinity_irq_desc(desc, mask);
                         else
 #endif
-                                set_ioapic_affinity_irq(irq, mask);
+                                set_ioapic_affinity_irq_desc(desc, mask);
                 }
 
         }
@@ -3846,7 +4099,6 @@ void __init ioapic_init_mappings(void)
         struct resource *ioapic_res;
         int i;
 
-        irq_2_pin_init();
         ioapic_res = ioapic_setup_resources();
         for (i = 0; i < nr_ioapics; i++) {
                 if (smp_found_config) {
diff --git a/arch/x86/kernel/ipi.c b/arch/x86/kernel/ipi.c
index f1c688e46f35..285bbf8831fa 100644
--- a/arch/x86/kernel/ipi.c
+++ b/arch/x86/kernel/ipi.c
@@ -116,18 +116,18 @@ static inline void __send_IPI_dest_field(unsigned long mask, int vector)
 /*
  * This is only used on smaller machines.
  */
-void send_IPI_mask_bitmask(cpumask_t cpumask, int vector)
+void send_IPI_mask_bitmask(const struct cpumask *cpumask, int vector)
 {
-        unsigned long mask = cpus_addr(cpumask)[0];
+        unsigned long mask = cpumask_bits(cpumask)[0];
         unsigned long flags;
 
         local_irq_save(flags);
-        WARN_ON(mask & ~cpus_addr(cpu_online_map)[0]);
+        WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]);
         __send_IPI_dest_field(mask, vector);
         local_irq_restore(flags);
 }
 
-void send_IPI_mask_sequence(cpumask_t mask, int vector)
+void send_IPI_mask_sequence(const struct cpumask *mask, int vector)
 {
         unsigned long flags;
         unsigned int query_cpu;
@@ -139,12 +139,24 @@ void send_IPI_mask_sequence(cpumask_t mask, int vector)
          */
 
         local_irq_save(flags);
-        for_each_possible_cpu(query_cpu) {
-                if (cpu_isset(query_cpu, mask)) {
+        for_each_cpu(query_cpu, mask)
+                __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), vector);
+        local_irq_restore(flags);
+}
+
+void send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
+{
+        unsigned long flags;
+        unsigned int query_cpu;
+        unsigned int this_cpu = smp_processor_id();
+
+        /* See Hack comment above */
+
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask)
+                if (query_cpu != this_cpu)
                         __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu),
                                               vector);
-                }
-        }
         local_irq_restore(flags);
 }
 
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index d1d4dc52f649..bce53e1352a0 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -9,6 +9,7 @@
 #include <asm/apic.h>
 #include <asm/io_apic.h>
 #include <asm/smp.h>
+#include <asm/irq.h>
 
 atomic_t irq_err_count;
 
@@ -118,6 +119,9 @@ int show_interrupts(struct seq_file *p, void *v)
         }
 
         desc = irq_to_desc(i);
+        if (!desc)
+                return 0;
+
         spin_lock_irqsave(&desc->lock, flags);
 #ifndef CONFIG_SMP
         any_count = kstat_irqs(i);
@@ -187,3 +191,5 @@ u64 arch_irq_stat(void)
 #endif
         return sum;
 }
+
+EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index a51382672de0..9dc5588f336a 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -233,25 +233,28 @@ unsigned int do_IRQ(struct pt_regs *regs)
 #ifdef CONFIG_HOTPLUG_CPU
 #include <mach_apic.h>
 
-void fixup_irqs(cpumask_t map)
+/* A cpu has been removed from cpu_online_mask.  Reset irq affinities. */
+void fixup_irqs(void)
 {
         unsigned int irq;
         static int warned;
         struct irq_desc *desc;
 
         for_each_irq_desc(irq, desc) {
-                cpumask_t mask;
+                const struct cpumask *affinity;
 
+                if (!desc)
+                        continue;
                 if (irq == 2)
                         continue;
 
-                cpus_and(mask, desc->affinity, map);
-                if (any_online_cpu(mask) == NR_CPUS) {
+                affinity = &desc->affinity;
+                if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
                         printk("Breaking affinity for irq %i\n", irq);
-                        mask = map;
+                        affinity = cpu_all_mask;
                 }
                 if (desc->chip->set_affinity)
-                        desc->chip->set_affinity(irq, mask);
+                        desc->chip->set_affinity(irq, affinity);
                 else if (desc->action && !(warned++))
                         printk("Cannot set affinity for irq %i\n", irq);
         }
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index 60eb84eb77a0..6383d50f82ea 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -13,12 +13,12 @@
 #include <linux/seq_file.h>
 #include <linux/module.h>
 #include <linux/delay.h>
+#include <linux/ftrace.h>
 #include <asm/uaccess.h>
 #include <asm/io_apic.h>
 #include <asm/idle.h>
 #include <asm/smp.h>
 
-#ifdef CONFIG_DEBUG_STACKOVERFLOW
 /*
  * Probabilistic stack overflow check:
  *
@@ -28,26 +28,25 @@
  */
 static inline void stack_overflow_check(struct pt_regs *regs)
 {
+#ifdef CONFIG_DEBUG_STACKOVERFLOW
         u64 curbase = (u64)task_stack_page(current);
-        static unsigned long warned = -60*HZ;
-
-        if (regs->sp >= curbase && regs->sp <= curbase + THREAD_SIZE &&
-            regs->sp <  curbase + sizeof(struct thread_info) + 128 &&
-            time_after(jiffies, warned + 60*HZ)) {
-                printk("do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n",
-                       current->comm, curbase, regs->sp);
-                show_stack(NULL,NULL);
-                warned = jiffies;
-        }
-}
+
+        WARN_ONCE(regs->sp >= curbase &&
+                  regs->sp <= curbase + THREAD_SIZE &&
+                  regs->sp <  curbase + sizeof(struct thread_info) +
+                                        sizeof(struct pt_regs) + 128,
+
+                  "do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n",
+                        current->comm, curbase, regs->sp);
 #endif
+}
 
 /*
  * do_IRQ handles all normal device IRQ's (the special
  * SMP cross-CPU interrupts have their own specific
  * handlers).
  */
-asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
+asmlinkage unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
 {
         struct pt_regs *old_regs = set_irq_regs(regs);
         struct irq_desc *desc;
@@ -60,9 +59,7 @@ asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
         irq_enter();
         irq = __get_cpu_var(vector_irq)[vector];
 
-#ifdef CONFIG_DEBUG_STACKOVERFLOW
         stack_overflow_check(regs);
-#endif
 
         desc = irq_to_desc(irq);
         if (likely(desc))
@@ -83,40 +80,43 @@ asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
-void fixup_irqs(cpumask_t map)
+/* A cpu has been removed from cpu_online_mask.  Reset irq affinities. */
+void fixup_irqs(void)
 {
         unsigned int irq;
         static int warned;
         struct irq_desc *desc;
 
         for_each_irq_desc(irq, desc) {
-                cpumask_t mask;
                 int break_affinity = 0;
                 int set_affinity = 1;
+                const struct cpumask *affinity;
 
+                if (!desc)
+                        continue;
                 if (irq == 2)
                         continue;
 
                 /* interrupt's are disabled at this point */
                 spin_lock(&desc->lock);
 
+                affinity = &desc->affinity;
                 if (!irq_has_action(irq) ||
-                    cpus_equal(desc->affinity, map)) {
+                    cpumask_equal(affinity, cpu_online_mask)) {
                         spin_unlock(&desc->lock);
                         continue;
                 }
 
-                cpus_and(mask, desc->affinity, map);
-                if (cpus_empty(mask)) {
+                if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
                         break_affinity = 1;
-                        mask = map;
+                        affinity = cpu_all_mask;
                 }
 
                 if (desc->chip->mask)
                         desc->chip->mask(irq);
 
                 if (desc->chip->set_affinity)
-                        desc->chip->set_affinity(irq, mask);
+                        desc->chip->set_affinity(irq, affinity);
                 else if (!(warned++))
                         set_affinity = 0;
 
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 845aa9803e80..84723295f88a 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -68,8 +68,7 @@ void __init init_ISA_irqs (void)
         /*
          * 16 old-style INTA-cycle interrupts:
          */
-        for (i = 0; i < 16; i++) {
-                /* first time call this irq_desc */
+        for (i = 0; i < NR_IRQS_LEGACY; i++) {
                 struct irq_desc *desc = irq_to_desc(i);
 
                 desc->status = IRQ_DISABLED;
@@ -111,6 +110,18 @@ DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
         [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
 };
 
+int vector_used_by_percpu_irq(unsigned int vector)
+{
+        int cpu;
+
+        for_each_online_cpu(cpu) {
+                if (per_cpu(vector_irq, cpu)[vector] != -1)
+                        return 1;
+        }
+
+        return 0;
+}
+
 /* Overridden in paravirt.c */
 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
 
@@ -129,7 +140,7 @@ void __init native_init_IRQ(void)
         for (i =  FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
                 /* SYSCALL_VECTOR was reserved in trap_init. */
                 if (i != SYSCALL_VECTOR)
-                        set_intr_gate(i, interrupt[i]);
+                        set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
         }
 
 
@@ -147,10 +158,12 @@ void __init native_init_IRQ(void)
         alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
 
         /* IPI for single call function */
-        set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, call_function_single_interrupt);
+        alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
+                                 call_function_single_interrupt);
 
         /* Low priority IPI to cleanup after moving an irq */
         set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
+        set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors);
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
diff --git a/arch/x86/kernel/irqinit_64.c b/arch/x86/kernel/irqinit_64.c
index ff0235391285..31ebfe38e96c 100644
--- a/arch/x86/kernel/irqinit_64.c
+++ b/arch/x86/kernel/irqinit_64.c
@@ -24,41 +24,6 @@
 #include <asm/i8259.h>
 
 /*
- * Common place to define all x86 IRQ vectors
- *
- * This builds up the IRQ handler stubs using some ugly macros in irq.h
- *
- * These macros create the low-level assembly IRQ routines that save
- * register context and call do_IRQ(). do_IRQ() then does all the
- * operations that are needed to keep the AT (or SMP IOAPIC)
- * interrupt-controller happy.
- */
-
-#define IRQ_NAME2(nr) nr##_interrupt(void)
-#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
-
-/*
- *      SMP has a few special interrupts for IPI messages
- */
-
-#define BUILD_IRQ(nr)                           \
-        asmlinkage void IRQ_NAME(nr);           \
-        asm("\n.text\n.p2align\n"               \
-            "IRQ" #nr "_interrupt:\n\t"         \
-            "push $~(" #nr ") ; "               \
-            "jmp common_interrupt\n"            \
-            ".previous");
-
-#define BI(x,y) \
-        BUILD_IRQ(x##y)
-
-#define BUILD_16_IRQS(x) \
-        BI(x,0) BI(x,1) BI(x,2) BI(x,3) \
-        BI(x,4) BI(x,5) BI(x,6) BI(x,7) \
-        BI(x,8) BI(x,9) BI(x,a) BI(x,b) \
-        BI(x,c) BI(x,d) BI(x,e) BI(x,f)
-
-/*
  * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
  * (these are usually mapped to vectors 0x30-0x3f)
  */
@@ -73,37 +38,6 @@
  *
  * (these are usually mapped into the 0x30-0xff vector range)
  */
-                                      BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3)
-BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7)
-BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb)
-BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe) BUILD_16_IRQS(0xf)
-
-#undef BUILD_16_IRQS
-#undef BI
-
-
-#define IRQ(x,y) \
-        IRQ##x##y##_interrupt
-
-#define IRQLIST_16(x) \
-        IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \
-        IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \
-        IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
-        IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
-
-/* for the irq vectors */
-static void (*__initdata interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = {
-                                          IRQLIST_16(0x2), IRQLIST_16(0x3),
-        IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7),
-        IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb),
-        IRQLIST_16(0xc), IRQLIST_16(0xd), IRQLIST_16(0xe), IRQLIST_16(0xf)
-};
-
-#undef IRQ
-#undef IRQLIST_16
-
-
-
 
 /*
  * IRQ2 is cascade interrupt to second interrupt controller
@@ -135,6 +69,18 @@ DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
         [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
 };
 
+int vector_used_by_percpu_irq(unsigned int vector)
+{
+        int cpu;
+
+        for_each_online_cpu(cpu) {
+                if (per_cpu(vector_irq, cpu)[vector] != -1)
+                        return 1;
+        }
+
+        return 0;
+}
+
 void __init init_ISA_irqs(void)
 {
         int i;
@@ -142,8 +88,7 @@ void __init init_ISA_irqs(void)
         init_bsp_APIC();
         init_8259A(0);
 
-        for (i = 0; i < 16; i++) {
-                /* first time call this irq_desc */
+        for (i = 0; i < NR_IRQS_LEGACY; i++) {
                 struct irq_desc *desc = irq_to_desc(i);
 
                 desc->status = IRQ_DISABLED;
@@ -188,6 +133,7 @@ static void __init smp_intr_init(void)
 
         /* Low priority IPI to cleanup after moving an irq */
         set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
+        set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors);
 #endif
 }
 
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 6c27679ec6aa..eead6f8f9218 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -376,9 +376,10 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
 
 void __kprobes arch_remove_kprobe(struct kprobe *p)
 {
-        mutex_lock(&kprobe_mutex);
-        free_insn_slot(p->ainsn.insn, (p->ainsn.boostable == 1));
-        mutex_unlock(&kprobe_mutex);
+        if (p->ainsn.insn) {
+                free_insn_slot(p->ainsn.insn, (p->ainsn.boostable == 1));
+                p->ainsn.insn = NULL;
+        }
 }
 
 static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index e169ae9b6a62..652fce6d2cce 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -89,17 +89,17 @@ static cycle_t kvm_clock_read(void)
  */
 static unsigned long kvm_get_tsc_khz(void)
 {
-        return preset_lpj;
+        struct pvclock_vcpu_time_info *src;
+        src = &per_cpu(hv_clock, 0);
+        return pvclock_tsc_khz(src);
 }
 
 static void kvm_get_preset_lpj(void)
 {
-        struct pvclock_vcpu_time_info *src;
         unsigned long khz;
         u64 lpj;
 
-        src = &per_cpu(hv_clock, 0);
-        khz = pvclock_tsc_khz(src);
+        khz = kvm_get_tsc_khz();
 
         lpj = ((u64)khz * 1000);
         do_div(lpj, HZ);
@@ -194,5 +194,7 @@ void __init kvmclock_init(void)
 #endif
                 kvm_get_preset_lpj();
                 clocksource_register(&kvm_clock);
+                pv_info.paravirt_enabled = 1;
+                pv_info.name = "KVM";
         }
 }
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index eee32b43fee3..71f1d99a635d 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -12,8 +12,8 @@
 #include <linux/mm.h>
 #include <linux/smp.h>
 #include <linux/vmalloc.h>
+#include <linux/uaccess.h>
 
-#include <asm/uaccess.h>
 #include <asm/system.h>
 #include <asm/ldt.h>
 #include <asm/desc.h>
@@ -93,7 +93,7 @@ static inline int copy_ldt(mm_context_t *new, mm_context_t *old)
         if (err < 0)
                 return err;
 
-        for(i = 0; i < old->size; i++)
+        for (i = 0; i < old->size; i++)
                 write_ldt_entry(new->ldt, i, old->ldt + i * LDT_ENTRY_SIZE);
         return 0;
 }
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 7a385746509a..37f420018a41 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -13,6 +13,7 @@
 #include <linux/numa.h>
 #include <linux/ftrace.h>
 #include <linux/suspend.h>
+#include <linux/gfp.h>
 
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
@@ -25,15 +26,6 @@
 #include <asm/system.h>
 #include <asm/cacheflush.h>
 
-#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE)))
-static u32 kexec_pgd[1024] PAGE_ALIGNED;
-#ifdef CONFIG_X86_PAE
-static u32 kexec_pmd0[1024] PAGE_ALIGNED;
-static u32 kexec_pmd1[1024] PAGE_ALIGNED;
-#endif
-static u32 kexec_pte0[1024] PAGE_ALIGNED;
-static u32 kexec_pte1[1024] PAGE_ALIGNED;
-
 static void set_idt(void *newidt, __u16 limit)
 {
         struct desc_ptr curidt;
@@ -76,6 +68,76 @@ static void load_segments(void)
 #undef __STR
 }
 
+static void machine_kexec_free_page_tables(struct kimage *image)
+{
+        free_page((unsigned long)image->arch.pgd);
+#ifdef CONFIG_X86_PAE
+        free_page((unsigned long)image->arch.pmd0);
+        free_page((unsigned long)image->arch.pmd1);
+#endif
+        free_page((unsigned long)image->arch.pte0);
+        free_page((unsigned long)image->arch.pte1);
+}
+
+static int machine_kexec_alloc_page_tables(struct kimage *image)
+{
+        image->arch.pgd = (pgd_t *)get_zeroed_page(GFP_KERNEL);
+#ifdef CONFIG_X86_PAE
+        image->arch.pmd0 = (pmd_t *)get_zeroed_page(GFP_KERNEL);
+        image->arch.pmd1 = (pmd_t *)get_zeroed_page(GFP_KERNEL);
+#endif
+        image->arch.pte0 = (pte_t *)get_zeroed_page(GFP_KERNEL);
+        image->arch.pte1 = (pte_t *)get_zeroed_page(GFP_KERNEL);
+        if (!image->arch.pgd ||
+#ifdef CONFIG_X86_PAE
+            !image->arch.pmd0 || !image->arch.pmd1 ||
+#endif
+            !image->arch.pte0 || !image->arch.pte1) {
+                machine_kexec_free_page_tables(image);
+                return -ENOMEM;
+        }
+        return 0;
+}
+
+static void machine_kexec_page_table_set_one(
+        pgd_t *pgd, pmd_t *pmd, pte_t *pte,
+        unsigned long vaddr, unsigned long paddr)
+{
+        pud_t *pud;
+
+        pgd += pgd_index(vaddr);
+#ifdef CONFIG_X86_PAE
+        if (!(pgd_val(*pgd) & _PAGE_PRESENT))
+                set_pgd(pgd, __pgd(__pa(pmd) | _PAGE_PRESENT));
+#endif
+        pud = pud_offset(pgd, vaddr);
+        pmd = pmd_offset(pud, vaddr);
+        if (!(pmd_val(*pmd) & _PAGE_PRESENT))
+                set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE));
+        pte = pte_offset_kernel(pmd, vaddr);
+        set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL_EXEC));
+}
+
+static void machine_kexec_prepare_page_tables(struct kimage *image)
+{
+        void *control_page;
+        pmd_t *pmd = 0;
+
+        control_page = page_address(image->control_code_page);
+#ifdef CONFIG_X86_PAE
+        pmd = image->arch.pmd0;
+#endif
+        machine_kexec_page_table_set_one(
+                image->arch.pgd, pmd, image->arch.pte0,
+                (unsigned long)control_page, __pa(control_page));
+#ifdef CONFIG_X86_PAE
+        pmd = image->arch.pmd1;
+#endif
+        machine_kexec_page_table_set_one(
+                image->arch.pgd, pmd, image->arch.pte1,
+                __pa(control_page), __pa(control_page));
+}
+
 /*
  * A architecture hook called to validate the
  * proposed image and prepare the control pages
@@ -87,12 +149,20 @@ static void load_segments(void)
  * reboot code buffer to allow us to avoid allocations
  * later.
  *
- * Make control page executable.
+ * - Make control page executable.
+ * - Allocate page tables
+ * - Setup page tables
  */
 int machine_kexec_prepare(struct kimage *image)
 {
+        int error;
+
         if (nx_enabled)
                 set_pages_x(image->control_code_page, 1);
+        error = machine_kexec_alloc_page_tables(image);
+        if (error)
+                return error;
+        machine_kexec_prepare_page_tables(image);
         return 0;
 }
 
@@ -104,6 +174,7 @@ void machine_kexec_cleanup(struct kimage *image)
 {
         if (nx_enabled)
                 set_pages_nx(image->control_code_page, 1);
+        machine_kexec_free_page_tables(image);
 }
 
 /*
@@ -150,18 +221,7 @@ void machine_kexec(struct kimage *image)
         relocate_kernel_ptr = control_page;
         page_list[PA_CONTROL_PAGE] = __pa(control_page);
         page_list[VA_CONTROL_PAGE] = (unsigned long)control_page;
-        page_list[PA_PGD] = __pa(kexec_pgd);
-        page_list[VA_PGD] = (unsigned long)kexec_pgd;
-#ifdef CONFIG_X86_PAE
-        page_list[PA_PMD_0] = __pa(kexec_pmd0);
-        page_list[VA_PMD_0] = (unsigned long)kexec_pmd0;
-        page_list[PA_PMD_1] = __pa(kexec_pmd1);
-        page_list[VA_PMD_1] = (unsigned long)kexec_pmd1;
-#endif
-        page_list[PA_PTE_0] = __pa(kexec_pte0);
-        page_list[VA_PTE_0] = (unsigned long)kexec_pte0;
-        page_list[PA_PTE_1] = __pa(kexec_pte1);
-        page_list[VA_PTE_1] = (unsigned long)kexec_pte1;
+        page_list[PA_PGD] = __pa(image->arch.pgd);
 
         if (image->type == KEXEC_TYPE_DEFAULT)
                 page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page)
diff --git a/arch/x86/kernel/mfgpt_32.c b/arch/x86/kernel/mfgpt_32.c
index 3b599518c322..c12314c9e86f 100644
--- a/arch/x86/kernel/mfgpt_32.c
+++ b/arch/x86/kernel/mfgpt_32.c
@@ -287,7 +287,7 @@ static struct clock_event_device mfgpt_clockevent = {
         .set_mode = mfgpt_set_mode,
         .set_next_event = mfgpt_next_event,
         .rating = 250,
-        .cpumask = CPU_MASK_ALL,
+        .cpumask = cpu_all_mask,
         .shift = 32
 };
 
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 5f8e5d75a254..c25fdb382292 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -10,7 +10,7 @@
  *  This driver allows to upgrade microcode on AMD
  *  family 0x10 and 0x11 processors.
  *
- *  Licensed unter the terms of the GNU General Public
+ *  Licensed under the terms of the GNU General Public
  *  License version 2. See file COPYING for details.
 */
 
@@ -32,9 +32,9 @@
 #include <linux/platform_device.h>
 #include <linux/pci.h>
 #include <linux/pci_ids.h>
+#include <linux/uaccess.h>
 
 #include <asm/msr.h>
-#include <asm/uaccess.h>
 #include <asm/processor.h>
 #include <asm/microcode.h>
 
@@ -47,43 +47,38 @@ MODULE_LICENSE("GPL v2");
 #define UCODE_UCODE_TYPE           0x00000001
 
 struct equiv_cpu_entry {
-        unsigned int installed_cpu;
-        unsigned int fixed_errata_mask;
-        unsigned int fixed_errata_compare;
-        unsigned int equiv_cpu;
-};
+        u32     installed_cpu;
+        u32     fixed_errata_mask;
+        u32     fixed_errata_compare;
+        u16     equiv_cpu;
+        u16     res;
+} __attribute__((packed));
 
 struct microcode_header_amd {
-        unsigned int  data_code;
-        unsigned int  patch_id;
-        unsigned char mc_patch_data_id[2];
-        unsigned char mc_patch_data_len;
-        unsigned char init_flag;
-        unsigned int  mc_patch_data_checksum;
-        unsigned int  nb_dev_id;
-        unsigned int  sb_dev_id;
-        unsigned char processor_rev_id[2];
-        unsigned char nb_rev_id;
-        unsigned char sb_rev_id;
-        unsigned char bios_api_rev;
-        unsigned char reserved1[3];
-        unsigned int  match_reg[8];
-};
+        u32     data_code;
+        u32     patch_id;
+        u16     mc_patch_data_id;
+        u8      mc_patch_data_len;
+        u8      init_flag;
+        u32     mc_patch_data_checksum;
+        u32     nb_dev_id;
+        u32     sb_dev_id;
+        u16     processor_rev_id;
+        u8      nb_rev_id;
+        u8      sb_rev_id;
+        u8      bios_api_rev;
+        u8      reserved1[3];
+        u32     match_reg[8];
+} __attribute__((packed));
 
 struct microcode_amd {
         struct microcode_header_amd hdr;
         unsigned int mpb[0];
 };
 
-#define UCODE_MAX_SIZE          (2048)
-#define DEFAULT_UCODE_DATASIZE  (896)
-#define MC_HEADER_SIZE          (sizeof(struct microcode_header_amd))
-#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
-#define DWSIZE                  (sizeof(u32))
-/* For now we support a fixed ucode total size only */
-#define get_totalsize(mc) \
-        ((((struct microcode_amd *)mc)->hdr.mc_patch_data_len * 28) \
-         + MC_HEADER_SIZE)
+#define UCODE_MAX_SIZE                  2048
+#define UCODE_CONTAINER_SECTION_HDR     8
+#define UCODE_CONTAINER_HEADER_SIZE     12
 
 /* serialize access to the physical write */
 static DEFINE_SPINLOCK(microcode_update_lock);
@@ -93,31 +88,24 @@ static struct equiv_cpu_entry *equiv_cpu_table;
 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
 {
         struct cpuinfo_x86 *c = &cpu_data(cpu);
+        u32 dummy;
 
         memset(csig, 0, sizeof(*csig));
-
         if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
-                printk(KERN_ERR "microcode: CPU%d not a capable AMD processor\n",
-                       cpu);
+                printk(KERN_WARNING "microcode: CPU%d: AMD CPU family 0x%x not "
+                       "supported\n", cpu, c->x86);
                 return -1;
         }
-
-        asm volatile("movl %1, %%ecx; rdmsr"
-                     : "=a" (csig->rev)
-                     : "i" (0x0000008B) : "ecx");
-
-        printk(KERN_INFO "microcode: collect_cpu_info_amd : patch_id=0x%x\n",
-                csig->rev);
-
+        rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
+        printk(KERN_INFO "microcode: CPU%d: patch_level=0x%x\n", cpu, csig->rev);
         return 0;
 }
 
 static int get_matching_microcode(int cpu, void *mc, int rev)
 {
         struct microcode_header_amd *mc_header = mc;
-        struct pci_dev *nb_pci_dev, *sb_pci_dev;
         unsigned int current_cpu_id;
-        unsigned int equiv_cpu_id = 0x00;
+        u16 equiv_cpu_id = 0;
         unsigned int i = 0;
 
         BUG_ON(equiv_cpu_table == NULL);
@@ -132,57 +120,25 @@ static int get_matching_microcode(int cpu, void *mc, int rev)
         }
 
         if (!equiv_cpu_id) {
-                printk(KERN_ERR "microcode: CPU%d cpu_id "
-                       "not found in equivalent cpu table \n", cpu);
+                printk(KERN_WARNING "microcode: CPU%d: cpu revision "
+                       "not listed in equivalent cpu table\n", cpu);
                 return 0;
         }
 
-        if ((mc_header->processor_rev_id[0]) != (equiv_cpu_id & 0xff)) {
-                printk(KERN_ERR
-                        "microcode: CPU%d patch does not match "
-                        "(patch is %x, cpu extended is %x) \n",
-                        cpu, mc_header->processor_rev_id[0],
-                        (equiv_cpu_id & 0xff));
+        if (mc_header->processor_rev_id != equiv_cpu_id) {
+                printk(KERN_ERR "microcode: CPU%d: patch mismatch "
+                       "(processor_rev_id: %x, equiv_cpu_id: %x)\n",
+                       cpu, mc_header->processor_rev_id, equiv_cpu_id);
                 return 0;
         }
 
-        if ((mc_header->processor_rev_id[1]) != ((equiv_cpu_id >> 16) & 0xff)) {
-                printk(KERN_ERR "microcode: CPU%d patch does not match "
-                        "(patch is %x, cpu base id is %x) \n",
-                        cpu, mc_header->processor_rev_id[1],
-                        ((equiv_cpu_id >> 16) & 0xff));
-
+        /* ucode might be chipset specific -- currently we don't support this */
+        if (mc_header->nb_dev_id || mc_header->sb_dev_id) {
+                printk(KERN_ERR "microcode: CPU%d: loading of chipset "
+                       "specific code not yet supported\n", cpu);
                 return 0;
         }
 
-        /* ucode may be northbridge specific */
-        if (mc_header->nb_dev_id) {
-                nb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
-                                            (mc_header->nb_dev_id & 0xff),
-                                            NULL);
-                if ((!nb_pci_dev) ||
-                    (mc_header->nb_rev_id != nb_pci_dev->revision)) {
-                        printk(KERN_ERR "microcode: CPU%d NB mismatch \n", cpu);
-                        pci_dev_put(nb_pci_dev);
-                        return 0;
-                }
-                pci_dev_put(nb_pci_dev);
-        }
-
-        /* ucode may be southbridge specific */
-        if (mc_header->sb_dev_id) {
-                sb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
-                                            (mc_header->sb_dev_id & 0xff),
-                                            NULL);
-                if ((!sb_pci_dev) ||
-                    (mc_header->sb_rev_id != sb_pci_dev->revision)) {
-                        printk(KERN_ERR "microcode: CPU%d SB mismatch \n", cpu);
-                        pci_dev_put(sb_pci_dev);
-                        return 0;
-                }
-                pci_dev_put(sb_pci_dev);
-        }
-
         if (mc_header->patch_id <= rev)
                 return 0;
 
@@ -192,12 +148,10 @@ static int get_matching_microcode(int cpu, void *mc, int rev)
 static void apply_microcode_amd(int cpu)
 {
         unsigned long flags;
-        unsigned int eax, edx;
-        unsigned int rev;
+        u32 rev, dummy;
         int cpu_num = raw_smp_processor_id();
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
         struct microcode_amd *mc_amd = uci->mc;
-        unsigned long addr;
 
         /* We should bind the task to the CPU */
         BUG_ON(cpu_num != cpu);
@@ -206,42 +160,34 @@ static void apply_microcode_amd(int cpu)
                 return;
 
         spin_lock_irqsave(&microcode_update_lock, flags);
-
-        addr = (unsigned long)&mc_amd->hdr.data_code;
-        edx = (unsigned int)(((unsigned long)upper_32_bits(addr)));
-        eax = (unsigned int)(((unsigned long)lower_32_bits(addr)));
-
-        asm volatile("movl %0, %%ecx; wrmsr" :
-                     : "i" (0xc0010020), "a" (eax), "d" (edx) : "ecx");
-
+        wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
         /* get patch id after patching */
-        asm volatile("movl %1, %%ecx; rdmsr"
-                     : "=a" (rev)
-                     : "i" (0x0000008B) : "ecx");
-
+        rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
         spin_unlock_irqrestore(&microcode_update_lock, flags);
 
         /* check current patch id and patch's id for match */
         if (rev != mc_amd->hdr.patch_id) {
-                printk(KERN_ERR "microcode: CPU%d update from revision "
-                       "0x%x to 0x%x failed\n", cpu_num,
-                       mc_amd->hdr.patch_id, rev);
+                printk(KERN_ERR "microcode: CPU%d: update failed "
+                       "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id);
                 return;
         }
 
-        printk(KERN_INFO "microcode: CPU%d updated from revision "
-               "0x%x to 0x%x \n",
-               cpu_num, uci->cpu_sig.rev, mc_amd->hdr.patch_id);
+        printk(KERN_INFO "microcode: CPU%d: updated (new patch_level=0x%x)\n",
+               cpu, rev);
 
         uci->cpu_sig.rev = rev;
 }
 
-static void * get_next_ucode(u8 *buf, unsigned int size,
-                        int (*get_ucode_data)(void *, const void *, size_t),
-                        unsigned int *mc_size)
+static int get_ucode_data(void *to, const u8 *from, size_t n)
+{
+        memcpy(to, from, n);
+        return 0;
+}
+
+static void *get_next_ucode(const u8 *buf, unsigned int size,
+                            unsigned int *mc_size)
 {
         unsigned int total_size;
-#define UCODE_CONTAINER_SECTION_HDR     8
         u8 section_hdr[UCODE_CONTAINER_SECTION_HDR];
         void *mc;
 
@@ -249,39 +195,37 @@ static void * get_next_ucode(u8 *buf, unsigned int size,
                 return NULL;
 
         if (section_hdr[0] != UCODE_UCODE_TYPE) {
-                printk(KERN_ERR "microcode: error! "
-                       "Wrong microcode payload type field\n");
+                printk(KERN_ERR "microcode: error: invalid type field in "
+                       "container file section header\n");
                 return NULL;
         }
 
         total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8));
 
-        printk(KERN_INFO "microcode: size %u, total_size %u\n",
-                size, total_size);
+        printk(KERN_DEBUG "microcode: size %u, total_size %u\n",
+               size, total_size);
 
         if (total_size > size || total_size > UCODE_MAX_SIZE) {
-                printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
+                printk(KERN_ERR "microcode: error: size mismatch\n");
                 return NULL;
         }
 
         mc = vmalloc(UCODE_MAX_SIZE);
         if (mc) {
                 memset(mc, 0, UCODE_MAX_SIZE);
-                if (get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR, total_size)) {
+                if (get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR,
+                                   total_size)) {
                         vfree(mc);
                         mc = NULL;
                 } else
                         *mc_size = total_size + UCODE_CONTAINER_SECTION_HDR;
         }
-#undef UCODE_CONTAINER_SECTION_HDR
         return mc;
 }
 
 
-static int install_equiv_cpu_table(u8 *buf,
-                int (*get_ucode_data)(void *, const void *, size_t))
+static int install_equiv_cpu_table(const u8 *buf)
 {
-#define UCODE_CONTAINER_HEADER_SIZE     12
         u8 *container_hdr[UCODE_CONTAINER_HEADER_SIZE];
         unsigned int *buf_pos = (unsigned int *)container_hdr;
         unsigned long size;
@@ -292,14 +236,15 @@ static int install_equiv_cpu_table(u8 *buf,
         size = buf_pos[2];
 
         if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
-                printk(KERN_ERR "microcode: error! "
-                       "Wrong microcode equivalnet cpu table\n");
+                printk(KERN_ERR "microcode: error: invalid type field in "
+                       "container file section header\n");
                 return 0;
         }
 
         equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
         if (!equiv_cpu_table) {
-                printk(KERN_ERR "microcode: error, can't allocate memory for equiv CPU table\n");
+                printk(KERN_ERR "microcode: failed to allocate "
+                       "equivalent CPU table\n");
                 return 0;
         }
 
@@ -310,7 +255,6 @@ static int install_equiv_cpu_table(u8 *buf,
         }
 
         return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */
-#undef UCODE_CONTAINER_HEADER_SIZE
 }
 
 static void free_equiv_cpu_table(void)
@@ -321,18 +265,20 @@ static void free_equiv_cpu_table(void)
         }
 }
 
-static int generic_load_microcode(int cpu, void *data, size_t size,
-                int (*get_ucode_data)(void *, const void *, size_t))
+static int generic_load_microcode(int cpu, const u8 *data, size_t size)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
-        u8 *ucode_ptr = data, *new_mc = NULL, *mc;
+        const u8 *ucode_ptr = data;
+        void *new_mc = NULL;
+        void *mc;
         int new_rev = uci->cpu_sig.rev;
         unsigned int leftover;
         unsigned long offset;
 
-        offset = install_equiv_cpu_table(ucode_ptr, get_ucode_data);
+        offset = install_equiv_cpu_table(ucode_ptr);
         if (!offset) {
-                printk(KERN_ERR "microcode: installing equivalent cpu table failed\n");
+                printk(KERN_ERR "microcode: failed to create "
+                       "equivalent cpu table\n");
                 return -EINVAL;
         }
 
@@ -343,7 +289,7 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
                 unsigned int uninitialized_var(mc_size);
                 struct microcode_header_amd *mc_header;
 
-                mc = get_next_ucode(ucode_ptr, leftover, get_ucode_data, &mc_size);
+                mc = get_next_ucode(ucode_ptr, leftover, &mc_size);
                 if (!mc)
                         break;
 
@@ -353,7 +299,7 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
                                 vfree(new_mc);
                         new_rev = mc_header->patch_id;
                         new_mc  = mc;
-                } else 
+                } else
                         vfree(mc);
 
                 ucode_ptr += mc_size;
@@ -365,9 +311,9 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
                         if (uci->mc)
                                 vfree(uci->mc);
                         uci->mc = new_mc;
-                        pr_debug("microcode: CPU%d found a matching microcode update with"
-                                " version 0x%x (current=0x%x)\n",
-                                cpu, new_rev, uci->cpu_sig.rev);
+                        pr_debug("microcode: CPU%d found a matching microcode "
+                                 "update with version 0x%x (current=0x%x)\n",
+                                 cpu, new_rev, uci->cpu_sig.rev);
                 } else
                         vfree(new_mc);
         }
@@ -377,12 +323,6 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
         return (int)leftover;
 }
 
-static int get_ucode_fw(void *to, const void *from, size_t n)
-{
-        memcpy(to, from, n);
-        return 0;
-}
-
 static int request_microcode_fw(int cpu, struct device *device)
 {
         const char *fw_name = "amd-ucode/microcode_amd.bin";
@@ -394,12 +334,11 @@ static int request_microcode_fw(int cpu, struct device *device)
 
         ret = request_firmware(&firmware, fw_name, device);
         if (ret) {
-                printk(KERN_ERR "microcode: ucode data file %s load failed\n", fw_name);
+                printk(KERN_ERR "microcode: failed to load file %s\n", fw_name);
                 return ret;
         }
 
-        ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size,
-                        &get_ucode_fw);
+        ret = generic_load_microcode(cpu, firmware->data, firmware->size);
 
         release_firmware(firmware);
 
@@ -408,8 +347,8 @@ static int request_microcode_fw(int cpu, struct device *device)
 
 static int request_microcode_user(int cpu, const void __user *buf, size_t size)
 {
-        printk(KERN_WARNING "microcode: AMD microcode update via /dev/cpu/microcode"
-                        "is not supported\n");
+        printk(KERN_INFO "microcode: AMD microcode update via "
+               "/dev/cpu/microcode not supported\n");
         return -1;
 }
 
@@ -433,3 +372,4 @@ struct microcode_ops * __init init_amd_microcode(void)
 {
         return &microcode_amd_ops;
 }
+
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index c4b5b24e0217..c9b721ba968c 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -99,7 +99,7 @@ MODULE_LICENSE("GPL");
 
 #define MICROCODE_VERSION       "2.00"
 
-struct microcode_ops *microcode_ops;
+static struct microcode_ops *microcode_ops;
 
 /* no concurrent ->write()s are allowed on /dev/cpu/microcode */
 static DEFINE_MUTEX(microcode_mutex);
@@ -203,7 +203,7 @@ MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
 #endif
 
 /* fake device for request_firmware */
-struct platform_device *microcode_pdev;
+static struct platform_device *microcode_pdev;
 
 static ssize_t reload_store(struct sys_device *dev,
                             struct sysdev_attribute *attr,
@@ -328,7 +328,7 @@ static int microcode_resume_cpu(int cpu)
         return 0;
 }
 
-void microcode_update_cpu(int cpu)
+static void microcode_update_cpu(int cpu)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
         int err = 0;
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index a8e62792d171..b7f4c929e615 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -471,7 +471,7 @@ static void microcode_fini_cpu(int cpu)
         uci->mc = NULL;
 }
 
-struct microcode_ops microcode_intel_ops = {
+static struct microcode_ops microcode_intel_ops = {
         .request_microcode_user           = request_microcode_user,
         .request_microcode_fw             = request_microcode_fw,
         .collect_cpu_info                 = collect_cpu_info,
diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c
index efc2f361fe85..666e43df51f9 100644
--- a/arch/x86/kernel/mmconf-fam10h_64.c
+++ b/arch/x86/kernel/mmconf-fam10h_64.c
@@ -13,8 +13,7 @@
 #include <asm/msr.h>
 #include <asm/acpi.h>
 #include <asm/mmconfig.h>
-
-#include "../pci/pci.h"
+#include <asm/pci_x86.h>
 
 struct pci_hostbridge_probe {
         u32 bus;
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 0f4c1fd5a1f4..c5c5b8df1dbc 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -16,14 +16,14 @@
 #include <linux/bitops.h>
 #include <linux/acpi.h>
 #include <linux/module.h>
+#include <linux/smp.h>
+#include <linux/acpi.h>
 
-#include <asm/smp.h>
 #include <asm/mtrr.h>
 #include <asm/mpspec.h>
 #include <asm/pgalloc.h>
 #include <asm/io_apic.h>
 #include <asm/proto.h>
-#include <asm/acpi.h>
 #include <asm/bios_ebda.h>
 #include <asm/e820.h>
 #include <asm/trampoline.h>
@@ -95,8 +95,8 @@ static void __init MP_bus_info(struct mpc_config_bus *m)
 #endif
 
         if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
-                 set_bit(m->mpc_busid, mp_bus_not_pci);
-#if defined(CONFIG_EISA) || defined (CONFIG_MCA)
+                set_bit(m->mpc_busid, mp_bus_not_pci);
+#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
                 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
 #endif
         } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
@@ -104,7 +104,7 @@ static void __init MP_bus_info(struct mpc_config_bus *m)
                         x86_quirks->mpc_oem_pci_bus(m);
 
                 clear_bit(m->mpc_busid, mp_bus_not_pci);
-#if defined(CONFIG_EISA) || defined (CONFIG_MCA)
+#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
                 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
         } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
                 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
@@ -586,26 +586,23 @@ static void __init __get_smp_config(unsigned int early)
 {
         struct intel_mp_floating *mpf = mpf_found;
 
-        if (x86_quirks->mach_get_smp_config) {
-                if (x86_quirks->mach_get_smp_config(early))
-                        return;
-        }
+        if (!mpf)
+                return;
+
         if (acpi_lapic && early)
                 return;
+
         /*
-         * ACPI supports both logical (e.g. Hyper-Threading) and physical
-         * processors, where MPS only supports physical.
+         * MPS doesn't support hyperthreading, aka only have
+         * thread 0 apic id in MPS table
          */
-        if (acpi_lapic && acpi_ioapic) {
-                printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
-                       "information\n");
+        if (acpi_lapic && acpi_ioapic)
                 return;
-        } else if (acpi_lapic)
-                printk(KERN_INFO "Using ACPI for processor (LAPIC) "
-                       "configuration information\n");
 
-        if (!mpf)
-                return;
+        if (x86_quirks->mach_get_smp_config) {
+                if (x86_quirks->mach_get_smp_config(early))
+                        return;
+        }
 
         printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
                mpf->mpf_specification);
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 82a7c7ed6d45..726266695b2c 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -136,7 +136,7 @@ static int msr_open(struct inode *inode, struct file *file)
         lock_kernel();
         cpu = iminor(file->f_path.dentry->d_inode);
 
-        if (cpu >= NR_CPUS || !cpu_online(cpu)) {
+        if (cpu >= nr_cpu_ids || !cpu_online(cpu)) {
                 ret = -ENXIO;   /* No such CPU */
                 goto out;
         }
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index 2c97f07f1c2c..45a09ccdc214 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -26,11 +26,10 @@
 #include <linux/kernel_stat.h>
 #include <linux/kdebug.h>
 #include <linux/smp.h>
+#include <linux/nmi.h>
 
 #include <asm/i8259.h>
 #include <asm/io_apic.h>
-#include <asm/smp.h>
-#include <asm/nmi.h>
 #include <asm/proto.h>
 #include <asm/timer.h>
 
@@ -131,6 +130,11 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
         atomic_dec(&nmi_active);
 }
 
+static void __acpi_nmi_disable(void *__unused)
+{
+        apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
+}
+
 int __init check_nmi_watchdog(void)
 {
         unsigned int *prev_nmi_count;
@@ -179,8 +183,12 @@ int __init check_nmi_watchdog(void)
         kfree(prev_nmi_count);
         return 0;
 error:
-        if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
-                disable_8259A_irq(0);
+        if (nmi_watchdog == NMI_IO_APIC) {
+                if (!timer_through_8259)
+                        disable_8259A_irq(0);
+                on_each_cpu(__acpi_nmi_disable, NULL, 1);
+        }
+
 #ifdef CONFIG_X86_32
         timer_ack = 0;
 #endif
@@ -199,12 +207,17 @@ static int __init setup_nmi_watchdog(char *str)
                 ++str;
         }
 
-        get_option(&str, &nmi);
-
-        if (nmi >= NMI_INVALID)
-                return 0;
+        if (!strncmp(str, "lapic", 5))
+                nmi_watchdog = NMI_LOCAL_APIC;
+        else if (!strncmp(str, "ioapic", 6))
+                nmi_watchdog = NMI_IO_APIC;
+        else {
+                get_option(&str, &nmi);
+                if (nmi >= NMI_INVALID)
+                        return 0;
+                nmi_watchdog = nmi;
+        }
 
-        nmi_watchdog = nmi;
         return 1;
 }
 __setup("nmi_watchdog=", setup_nmi_watchdog);
@@ -285,11 +298,6 @@ void acpi_nmi_enable(void)
                 on_each_cpu(__acpi_nmi_enable, NULL, 1);
 }
 
-static void __acpi_nmi_disable(void *__unused)
-{
-        apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
-}
-
 /*
  * Disable timer based NMIs on all CPUs:
  */
@@ -340,6 +348,8 @@ void stop_apic_nmi_watchdog(void *unused)
                 return;
         if (nmi_watchdog == NMI_LOCAL_APIC)
                 lapic_watchdog_stop();
+        else
+                __acpi_nmi_disable(NULL);
         __get_cpu_var(wd_enabled) = 0;
         atomic_dec(&nmi_active);
 }
@@ -465,6 +475,24 @@ nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
 
 #ifdef CONFIG_SYSCTL
 
+static void enable_ioapic_nmi_watchdog_single(void *unused)
+{
+        __get_cpu_var(wd_enabled) = 1;
+        atomic_inc(&nmi_active);
+        __acpi_nmi_enable(NULL);
+}
+
+static void enable_ioapic_nmi_watchdog(void)
+{
+        on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1);
+        touch_nmi_watchdog();
+}
+
+static void disable_ioapic_nmi_watchdog(void)
+{
+        on_each_cpu(stop_apic_nmi_watchdog, NULL, 1);
+}
+
 static int __init setup_unknown_nmi_panic(char *str)
 {
         unknown_nmi_panic = 1;
@@ -507,6 +535,11 @@ int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
                         enable_lapic_nmi_watchdog();
                 else
                         disable_lapic_nmi_watchdog();
+        } else if (nmi_watchdog == NMI_IO_APIC) {
+                if (nmi_watchdog_enabled)
+                        enable_ioapic_nmi_watchdog();
+                else
+                        disable_ioapic_nmi_watchdog();
         } else {
                 printk(KERN_WARNING
                         "NMI watchdog doesn't know what hardware to touch\n");
diff --git a/arch/x86/kernel/numaq_32.c b/arch/x86/kernel/numaq_32.c
index 4caff39078e0..0deea37a53cf 100644
--- a/arch/x86/kernel/numaq_32.c
+++ b/arch/x86/kernel/numaq_32.c
@@ -31,7 +31,7 @@
 #include <asm/numaq.h>
 #include <asm/topology.h>
 #include <asm/processor.h>
-#include <asm/mpspec.h>
+#include <asm/genapic.h>
 #include <asm/e820.h>
 #include <asm/setup.h>
 
@@ -235,6 +235,13 @@ static int __init numaq_setup_ioapic_ids(void)
         return 1;
 }
 
+static int __init numaq_update_genapic(void)
+{
+        genapic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
+
+        return 0;
+}
+
 static struct x86_quirks numaq_x86_quirks __initdata = {
         .arch_pre_time_init     = numaq_pre_time_init,
         .arch_time_init         = NULL,
@@ -250,6 +257,7 @@ static struct x86_quirks numaq_x86_quirks __initdata = {
         .mpc_oem_pci_bus        = mpc_oem_pci_bus,
         .smp_read_mpc_oem       = smp_read_mpc_oem,
         .setup_ioapic_ids       = numaq_setup_ioapic_ids,
+        .update_genapic         = numaq_update_genapic,
 };
 
 void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem,
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 192624820217..19a1044a0cd9 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -6,6 +6,7 @@
 #include <asm/proto.h>
 #include <asm/dma.h>
 #include <asm/iommu.h>
+#include <asm/gart.h>
 #include <asm/calgary.h>
 #include <asm/amd_iommu.h>
 
@@ -30,11 +31,6 @@ int no_iommu __read_mostly;
 /* Set this to 1 if there is a HW IOMMU in the system */
 int iommu_detected __read_mostly = 0;
 
-/* This tells the BIO block layer to assume merging. Default to off
-   because we cannot guarantee merging later. */
-int iommu_bio_merge __read_mostly = 0;
-EXPORT_SYMBOL(iommu_bio_merge);
-
 dma_addr_t bad_dma_address __read_mostly = 0;
 EXPORT_SYMBOL(bad_dma_address);
 
@@ -105,11 +101,15 @@ static void __init dma32_free_bootmem(void)
         dma32_bootmem_ptr = NULL;
         dma32_bootmem_size = 0;
 }
+#endif
 
 void __init pci_iommu_alloc(void)
 {
+#ifdef CONFIG_X86_64
         /* free the range so iommu could get some range less than 4G */
         dma32_free_bootmem();
+#endif
+
         /*
          * The order of these functions is important for
          * fall-back/fail-over reasons
@@ -125,15 +125,6 @@ void __init pci_iommu_alloc(void)
         pci_swiotlb_init();
 }
 
-unsigned long iommu_nr_pages(unsigned long addr, unsigned long len)
-{
-        unsigned long size = roundup((addr & ~PAGE_MASK) + len, PAGE_SIZE);
-
-        return size >> PAGE_SHIFT;
-}
-EXPORT_SYMBOL(iommu_nr_pages);
-#endif
-
 void *dma_generic_alloc_coherent(struct device *dev, size_t size,
                                  dma_addr_t *dma_addr, gfp_t flag)
 {
@@ -188,7 +179,6 @@ static __init int iommu_setup(char *p)
                 }
 
                 if (!strncmp(p, "biomerge", 8)) {
-                        iommu_bio_merge = 4096;
                         iommu_merge = 1;
                         force_iommu = 1;
                 }
@@ -300,8 +290,8 @@ fs_initcall(pci_iommu_init);
 static __devinit void via_no_dac(struct pci_dev *dev)
 {
         if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
-                printk(KERN_INFO "PCI: VIA PCI bridge detected."
-                                 "Disabling DAC.\n");
+                printk(KERN_INFO
+                        "PCI: VIA PCI bridge detected. Disabling DAC.\n");
                 forbid_dac = 1;
         }
 }
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index a35eaa379ff6..00c2bcd41463 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -52,7 +52,7 @@ static u32 *iommu_gatt_base;		/* Remapping table */
  * to trigger bugs with some popular PCI cards, in particular 3ware (but
  * has been also also seen with Qlogic at least).
  */
-int iommu_fullflush = 1;
+static int iommu_fullflush = 1;
 
 /* Allocation bitmap for the remapping area: */
 static DEFINE_SPINLOCK(iommu_bitmap_lock);
diff --git a/arch/x86/kernel/pci-swiotlb_64.c b/arch/x86/kernel/pci-swiotlb_64.c
index 3c539d111abb..d59c91747665 100644
--- a/arch/x86/kernel/pci-swiotlb_64.c
+++ b/arch/x86/kernel/pci-swiotlb_64.c
@@ -3,6 +3,8 @@
 #include <linux/pci.h>
 #include <linux/cache.h>
 #include <linux/module.h>
+#include <linux/swiotlb.h>
+#include <linux/bootmem.h>
 #include <linux/dma-mapping.h>
 
 #include <asm/iommu.h>
@@ -11,6 +13,31 @@
 
 int swiotlb __read_mostly;
 
+void * __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
+{
+        return alloc_bootmem_low_pages(size);
+}
+
+void *swiotlb_alloc(unsigned order, unsigned long nslabs)
+{
+        return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
+}
+
+dma_addr_t swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
+{
+        return paddr;
+}
+
+phys_addr_t swiotlb_bus_to_phys(dma_addr_t baddr)
+{
+        return baddr;
+}
+
+int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
+{
+        return 0;
+}
+
 static dma_addr_t
 swiotlb_map_single_phys(struct device *hwdev, phys_addr_t paddr, size_t size,
                         int direction)
@@ -50,8 +77,10 @@ struct dma_mapping_ops swiotlb_dma_ops = {
 void __init pci_swiotlb_init(void)
 {
         /* don't initialize swiotlb if iommu=off (no_iommu=1) */
+#ifdef CONFIG_X86_64
         if (!iommu_detected && !no_iommu && max_pfn > MAX_DMA32_PFN)
                swiotlb = 1;
+#endif
         if (swiotlb_force)
                 swiotlb = 1;
         if (swiotlb) {
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index c622772744d8..e68bb9e30864 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -1,13 +1,16 @@
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
+#include <asm/idle.h>
 #include <linux/smp.h>
 #include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/module.h>
 #include <linux/pm.h>
 #include <linux/clockchips.h>
+#include <linux/ftrace.h>
 #include <asm/system.h>
+#include <asm/apic.h>
 
 unsigned long idle_halt;
 EXPORT_SYMBOL(idle_halt);
@@ -100,6 +103,9 @@ static inline int hlt_use_halt(void)
 void default_idle(void)
 {
         if (hlt_use_halt()) {
+                struct power_trace it;
+
+                trace_power_start(&it, POWER_CSTATE, 1);
                 current_thread_info()->status &= ~TS_POLLING;
                 /*
                  * TS_POLLING-cleared state must be visible before we
@@ -112,6 +118,7 @@ void default_idle(void)
                 else
                         local_irq_enable();
                 current_thread_info()->status |= TS_POLLING;
+                trace_power_end(&it);
         } else {
                 local_irq_enable();
                 /* loop is done by the caller */
@@ -122,6 +129,21 @@ void default_idle(void)
 EXPORT_SYMBOL(default_idle);
 #endif
 
+void stop_this_cpu(void *dummy)
+{
+        local_irq_disable();
+        /*
+         * Remove this CPU:
+         */
+        cpu_clear(smp_processor_id(), cpu_online_map);
+        disable_local_APIC();
+
+        for (;;) {
+                if (hlt_works(smp_processor_id()))
+                        halt();
+        }
+}
+
 static void do_nothing(void *unused)
 {
 }
@@ -154,24 +176,31 @@ EXPORT_SYMBOL_GPL(cpu_idle_wait);
  */
 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
 {
+        struct power_trace it;
+
+        trace_power_start(&it, POWER_CSTATE, (ax>>4)+1);
         if (!need_resched()) {
                 __monitor((void *)&current_thread_info()->flags, 0, 0);
                 smp_mb();
                 if (!need_resched())
                         __mwait(ax, cx);
         }
+        trace_power_end(&it);
 }
 
 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 static void mwait_idle(void)
 {
+        struct power_trace it;
         if (!need_resched()) {
+                trace_power_start(&it, POWER_CSTATE, 1);
                 __monitor((void *)&current_thread_info()->flags, 0, 0);
                 smp_mb();
                 if (!need_resched())
                         __sti_mwait(0, 0);
                 else
                         local_irq_enable();
+                trace_power_end(&it);
         } else
                 local_irq_enable();
 }
@@ -183,9 +212,13 @@ static void mwait_idle(void)
  */
 static void poll_idle(void)
 {
+        struct power_trace it;
+
+        trace_power_start(&it, POWER_CSTATE, 0);
         local_irq_enable();
         while (!need_resched())
                 cpu_relax();
+        trace_power_end(&it);
 }
 
 /*
@@ -270,7 +303,7 @@ static void c1e_idle(void)
                 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
                 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
                         c1e_detected = 1;
-                        if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
+                        if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
                                 mark_tsc_unstable("TSC halt in AMD C1E");
                         printk(KERN_INFO "System has AMD C1E enabled\n");
                         set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 0a1302fe6d45..3ba155d24884 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -38,6 +38,7 @@
 #include <linux/percpu.h>
 #include <linux/prctl.h>
 #include <linux/dmi.h>
+#include <linux/ftrace.h>
 
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
@@ -59,6 +60,7 @@
 #include <asm/idle.h>
 #include <asm/syscalls.h>
 #include <asm/smp.h>
+#include <asm/ds.h>
 
 asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
 
@@ -250,14 +252,8 @@ void exit_thread(void)
                 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
                 put_cpu();
         }
-#ifdef CONFIG_X86_DS
-        /* Free any DS contexts that have not been properly released. */
-        if (unlikely(current->thread.ds_ctx)) {
-                /* we clear debugctl to make sure DS is not used. */
-                update_debugctlmsr(0);
-                ds_free(current->thread.ds_ctx);
-        }
-#endif /* CONFIG_X86_DS */
+
+        ds_exit_thread(current);
 }
 
 void flush_thread(void)
@@ -339,6 +335,12 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
                 kfree(p->thread.io_bitmap_ptr);
                 p->thread.io_bitmap_max = 0;
         }
+
+        ds_copy_thread(p, current);
+
+        clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
+        p->thread.debugctlmsr = 0;
+
         return err;
 }
 
@@ -419,48 +421,19 @@ int set_tsc_mode(unsigned int val)
         return 0;
 }
 
-#ifdef CONFIG_X86_DS
-static int update_debugctl(struct thread_struct *prev,
-                        struct thread_struct *next, unsigned long debugctl)
-{
-        unsigned long ds_prev = 0;
-        unsigned long ds_next = 0;
-
-        if (prev->ds_ctx)
-                ds_prev = (unsigned long)prev->ds_ctx->ds;
-        if (next->ds_ctx)
-                ds_next = (unsigned long)next->ds_ctx->ds;
-
-        if (ds_next != ds_prev) {
-                /* we clear debugctl to make sure DS
-                 * is not in use when we change it */
-                debugctl = 0;
-                update_debugctlmsr(0);
-                wrmsr(MSR_IA32_DS_AREA, ds_next, 0);
-        }
-        return debugctl;
-}
-#else
-static int update_debugctl(struct thread_struct *prev,
-                        struct thread_struct *next, unsigned long debugctl)
-{
-        return debugctl;
-}
-#endif /* CONFIG_X86_DS */
-
 static noinline void
 __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
                  struct tss_struct *tss)
 {
         struct thread_struct *prev, *next;
-        unsigned long debugctl;
 
         prev = &prev_p->thread;
         next = &next_p->thread;
 
-        debugctl = update_debugctl(prev, next, prev->debugctlmsr);
-
-        if (next->debugctlmsr != debugctl)
+        if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
+            test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
+                ds_switch_to(prev_p, next_p);
+        else if (next->debugctlmsr != prev->debugctlmsr)
                 update_debugctlmsr(next->debugctlmsr);
 
         if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
@@ -482,15 +455,6 @@ __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
                         hard_enable_TSC();
         }
 
-#ifdef CONFIG_X86_PTRACE_BTS
-        if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
-                ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
-
-        if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
-                ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
-#endif /* CONFIG_X86_PTRACE_BTS */
-
-
         if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
                 /*
                  * Disable the bitmap via an invalid offset. We still cache
@@ -548,7 +512,8 @@ __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
  * the task-switch, and shows up in ret_from_fork in entry.S,
  * for example.
  */
-struct task_struct * __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
+__notrace_funcgraph struct task_struct *
+__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
 {
         struct thread_struct *prev = &prev_p->thread,
                                  *next = &next_p->thread;
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index c958120fb1b6..416fb9282f4f 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -39,6 +39,7 @@
 #include <linux/prctl.h>
 #include <linux/uaccess.h>
 #include <linux/io.h>
+#include <linux/ftrace.h>
 
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -52,6 +53,7 @@
 #include <asm/ia32.h>
 #include <asm/idle.h>
 #include <asm/syscalls.h>
+#include <asm/ds.h>
 
 asmlinkage extern void ret_from_fork(void);
 
@@ -235,14 +237,8 @@ void exit_thread(void)
                 t->io_bitmap_max = 0;
                 put_cpu();
         }
-#ifdef CONFIG_X86_DS
-        /* Free any DS contexts that have not been properly released. */
-        if (unlikely(t->ds_ctx)) {
-                /* we clear debugctl to make sure DS is not used. */
-                update_debugctlmsr(0);
-                ds_free(t->ds_ctx);
-        }
-#endif /* CONFIG_X86_DS */
+
+        ds_exit_thread(current);
 }
 
 void flush_thread(void)
@@ -372,6 +368,12 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
                 if (err)
                         goto out;
         }
+
+        ds_copy_thread(p, me);
+
+        clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
+        p->thread.debugctlmsr = 0;
+
         err = 0;
 out:
         if (err && p->thread.io_bitmap_ptr) {
@@ -470,35 +472,14 @@ static inline void __switch_to_xtra(struct task_struct *prev_p,
                                     struct tss_struct *tss)
 {
         struct thread_struct *prev, *next;
-        unsigned long debugctl;
 
         prev = &prev_p->thread,
         next = &next_p->thread;
 
-        debugctl = prev->debugctlmsr;
-
-#ifdef CONFIG_X86_DS
-        {
-                unsigned long ds_prev = 0, ds_next = 0;
-
-                if (prev->ds_ctx)
-                        ds_prev = (unsigned long)prev->ds_ctx->ds;
-                if (next->ds_ctx)
-                        ds_next = (unsigned long)next->ds_ctx->ds;
-
-                if (ds_next != ds_prev) {
-                        /*
-                         * We clear debugctl to make sure DS
-                         * is not in use when we change it:
-                         */
-                        debugctl = 0;
-                        update_debugctlmsr(0);
-                        wrmsrl(MSR_IA32_DS_AREA, ds_next);
-                }
-        }
-#endif /* CONFIG_X86_DS */
-
-        if (next->debugctlmsr != debugctl)
+        if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
+            test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
+                ds_switch_to(prev_p, next_p);
+        else if (next->debugctlmsr != prev->debugctlmsr)
                 update_debugctlmsr(next->debugctlmsr);
 
         if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
@@ -533,14 +514,6 @@ static inline void __switch_to_xtra(struct task_struct *prev_p,
                  */
                 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
         }
-
-#ifdef CONFIG_X86_PTRACE_BTS
-        if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
-                ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
-
-        if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
-                ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
-#endif /* CONFIG_X86_PTRACE_BTS */
 }
 
 /*
@@ -551,8 +524,9 @@ static inline void __switch_to_xtra(struct task_struct *prev_p,
  * - could test fs/gs bitsliced
  *
  * Kprobes not supported here. Set the probe on schedule instead.
+ * Function graph tracer not supported too.
  */
-struct task_struct *
+__notrace_funcgraph struct task_struct *
 __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
 {
         struct thread_struct *prev = &prev_p->thread;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 0a6d8c12e10d..0a5df5f82fb9 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -581,158 +581,91 @@ static int ioperm_get(struct task_struct *target,
 }
 
 #ifdef CONFIG_X86_PTRACE_BTS
-/*
- * The configuration for a particular BTS hardware implementation.
- */
-struct bts_configuration {
-        /* the size of a BTS record in bytes; at most BTS_MAX_RECORD_SIZE */
-        unsigned char  sizeof_bts;
-        /* the size of a field in the BTS record in bytes */
-        unsigned char  sizeof_field;
-        /* a bitmask to enable/disable BTS in DEBUGCTL MSR */
-        unsigned long debugctl_mask;
-};
-static struct bts_configuration bts_cfg;
-
-#define BTS_MAX_RECORD_SIZE (8 * 3)
-
-
-/*
- * Branch Trace Store (BTS) uses the following format. Different
- * architectures vary in the size of those fields.
- * - source linear address
- * - destination linear address
- * - flags
- *
- * Later architectures use 64bit pointers throughout, whereas earlier
- * architectures use 32bit pointers in 32bit mode.
- *
- * We compute the base address for the first 8 fields based on:
- * - the field size stored in the DS configuration
- * - the relative field position
- *
- * In order to store additional information in the BTS buffer, we use
- * a special source address to indicate that the record requires
- * special interpretation.
- *
- * Netburst indicated via a bit in the flags field whether the branch
- * was predicted; this is ignored.
- */
-
-enum bts_field {
-        bts_from = 0,
-        bts_to,
-        bts_flags,
-
-        bts_escape = (unsigned long)-1,
-        bts_qual = bts_to,
-        bts_jiffies = bts_flags
-};
-
-static inline unsigned long bts_get(const char *base, enum bts_field field)
-{
-        base += (bts_cfg.sizeof_field * field);
-        return *(unsigned long *)base;
-}
-
-static inline void bts_set(char *base, enum bts_field field, unsigned long val)
-{
-        base += (bts_cfg.sizeof_field * field);;
-        (*(unsigned long *)base) = val;
-}
-
-/*
- * Translate a BTS record from the raw format into the bts_struct format
- *
- * out (out): bts_struct interpretation
- * raw: raw BTS record
- */
-static void ptrace_bts_translate_record(struct bts_struct *out, const void *raw)
-{
-        memset(out, 0, sizeof(*out));
-        if (bts_get(raw, bts_from) == bts_escape) {
-                out->qualifier       = bts_get(raw, bts_qual);
-                out->variant.jiffies = bts_get(raw, bts_jiffies);
-        } else {
-                out->qualifier = BTS_BRANCH;
-                out->variant.lbr.from_ip = bts_get(raw, bts_from);
-                out->variant.lbr.to_ip   = bts_get(raw, bts_to);
-        }
-}
-
 static int ptrace_bts_read_record(struct task_struct *child, size_t index,
                                   struct bts_struct __user *out)
 {
-        struct bts_struct ret;
-        const void *bts_record;
-        size_t bts_index, bts_end;
+        const struct bts_trace *trace;
+        struct bts_struct bts;
+        const unsigned char *at;
         int error;
 
-        error = ds_get_bts_end(child, &bts_end);
-        if (error < 0)
-                return error;
-
-        if (bts_end <= index)
-                return -EINVAL;
+        trace = ds_read_bts(child->bts);
+        if (!trace)
+                return -EPERM;
 
-        error = ds_get_bts_index(child, &bts_index);
-        if (error < 0)
-                return error;
+        at = trace->ds.top - ((index + 1) * trace->ds.size);
+        if ((void *)at < trace->ds.begin)
+                at += (trace->ds.n * trace->ds.size);
 
-        /* translate the ptrace bts index into the ds bts index */
-        bts_index += bts_end - (index + 1);
-        if (bts_end <= bts_index)
-                bts_index -= bts_end;
+        if (!trace->read)
+                return -EOPNOTSUPP;
 
-        error = ds_access_bts(child, bts_index, &bts_record);
+        error = trace->read(child->bts, at, &bts);
         if (error < 0)
                 return error;
 
-        ptrace_bts_translate_record(&ret, bts_record);
-
-        if (copy_to_user(out, &ret, sizeof(ret)))
+        if (copy_to_user(out, &bts, sizeof(bts)))
                 return -EFAULT;
 
-        return sizeof(ret);
+        return sizeof(bts);
 }
 
 static int ptrace_bts_drain(struct task_struct *child,
                             long size,
                             struct bts_struct __user *out)
 {
-        struct bts_struct ret;
-        const unsigned char *raw;
-        size_t end, i;
-        int error;
+        const struct bts_trace *trace;
+        const unsigned char *at;
+        int error, drained = 0;
 
-        error = ds_get_bts_index(child, &end);
-        if (error < 0)
-                return error;
+        trace = ds_read_bts(child->bts);
+        if (!trace)
+                return -EPERM;
 
-        if (size < (end * sizeof(struct bts_struct)))
+        if (!trace->read)
+                return -EOPNOTSUPP;
+
+        if (size < (trace->ds.top - trace->ds.begin))
                 return -EIO;
 
-        error = ds_access_bts(child, 0, (const void **)&raw);
-        if (error < 0)
-                return error;
+        for (at = trace->ds.begin; (void *)at < trace->ds.top;
+             out++, drained++, at += trace->ds.size) {
+                struct bts_struct bts;
+                int error;
 
-        for (i = 0; i < end; i++, out++, raw += bts_cfg.sizeof_bts) {
-                ptrace_bts_translate_record(&ret, raw);
+                error = trace->read(child->bts, at, &bts);
+                if (error < 0)
+                        return error;
 
-                if (copy_to_user(out, &ret, sizeof(ret)))
+                if (copy_to_user(out, &bts, sizeof(bts)))
                         return -EFAULT;
         }
 
-        error = ds_clear_bts(child);
+        memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);
+
+        error = ds_reset_bts(child->bts);
         if (error < 0)
                 return error;
 
-        return end;
+        return drained;
 }
 
-static void ptrace_bts_ovfl(struct task_struct *child)
+static int ptrace_bts_allocate_buffer(struct task_struct *child, size_t size)
 {
-        send_sig(child->thread.bts_ovfl_signal, child, 0);
+        child->bts_buffer = alloc_locked_buffer(size);
+        if (!child->bts_buffer)
+                return -ENOMEM;
+
+        child->bts_size = size;
+
+        return 0;
+}
+
+static void ptrace_bts_free_buffer(struct task_struct *child)
+{
+        free_locked_buffer(child->bts_buffer, child->bts_size);
+        child->bts_buffer = NULL;
+        child->bts_size = 0;
 }
 
 static int ptrace_bts_config(struct task_struct *child,
@@ -740,114 +673,86 @@ static int ptrace_bts_config(struct task_struct *child,
                              const struct ptrace_bts_config __user *ucfg)
 {
         struct ptrace_bts_config cfg;
-        int error = 0;
-
-        error = -EOPNOTSUPP;
-        if (!bts_cfg.sizeof_bts)
-                goto errout;
+        unsigned int flags = 0;
 
-        error = -EIO;
         if (cfg_size < sizeof(cfg))
-                goto errout;
+                return -EIO;
 
-        error = -EFAULT;
         if (copy_from_user(&cfg, ucfg, sizeof(cfg)))
-                goto errout;
+                return -EFAULT;
 
-        error = -EINVAL;
-        if ((cfg.flags & PTRACE_BTS_O_SIGNAL) &&
-            !(cfg.flags & PTRACE_BTS_O_ALLOC))
-                goto errout;
+        if (child->bts) {
+                ds_release_bts(child->bts);
+                child->bts = NULL;
+        }
 
-        if (cfg.flags & PTRACE_BTS_O_ALLOC) {
-                ds_ovfl_callback_t ovfl = NULL;
-                unsigned int sig = 0;
+        if (cfg.flags & PTRACE_BTS_O_SIGNAL) {
+                if (!cfg.signal)
+                        return -EINVAL;
 
-                /* we ignore the error in case we were not tracing child */
-                (void)ds_release_bts(child);
+                return -EOPNOTSUPP;
 
-                if (cfg.flags & PTRACE_BTS_O_SIGNAL) {
-                        if (!cfg.signal)
-                                goto errout;
+                child->thread.bts_ovfl_signal = cfg.signal;
+        }
 
-                        sig  = cfg.signal;
-                        ovfl = ptrace_bts_ovfl;
-                }
+        if ((cfg.flags & PTRACE_BTS_O_ALLOC) &&
+            (cfg.size != child->bts_size)) {
+                int error;
 
-                error = ds_request_bts(child, /* base = */ NULL, cfg.size, ovfl);
-                if (error < 0)
-                        goto errout;
+                ptrace_bts_free_buffer(child);
 
-                child->thread.bts_ovfl_signal = sig;
+                error = ptrace_bts_allocate_buffer(child, cfg.size);
+                if (error < 0)
+                        return error;
         }
 
-        error = -EINVAL;
-        if (!child->thread.ds_ctx && cfg.flags)
-                goto errout;
-
         if (cfg.flags & PTRACE_BTS_O_TRACE)
-                child->thread.debugctlmsr |= bts_cfg.debugctl_mask;
-        else
-                child->thread.debugctlmsr &= ~bts_cfg.debugctl_mask;
+                flags |= BTS_USER;
 
         if (cfg.flags & PTRACE_BTS_O_SCHED)
-                set_tsk_thread_flag(child, TIF_BTS_TRACE_TS);
-        else
-                clear_tsk_thread_flag(child, TIF_BTS_TRACE_TS);
+                flags |= BTS_TIMESTAMPS;
 
-        error = sizeof(cfg);
+        child->bts = ds_request_bts(child, child->bts_buffer, child->bts_size,
+                                    /* ovfl = */ NULL, /* th = */ (size_t)-1,
+                                    flags);
+        if (IS_ERR(child->bts)) {
+                int error = PTR_ERR(child->bts);
 
-out:
-        if (child->thread.debugctlmsr)
-                set_tsk_thread_flag(child, TIF_DEBUGCTLMSR);
-        else
-                clear_tsk_thread_flag(child, TIF_DEBUGCTLMSR);
+                ptrace_bts_free_buffer(child);
+                child->bts = NULL;
 
-        return error;
+                return error;
+        }
 
-errout:
-        child->thread.debugctlmsr &= ~bts_cfg.debugctl_mask;
-        clear_tsk_thread_flag(child, TIF_BTS_TRACE_TS);
-        goto out;
+        return sizeof(cfg);
 }
 
 static int ptrace_bts_status(struct task_struct *child,
                              long cfg_size,
                              struct ptrace_bts_config __user *ucfg)
 {
+        const struct bts_trace *trace;
         struct ptrace_bts_config cfg;
-        size_t end;
-        const void *base, *max;
-        int error;
 
         if (cfg_size < sizeof(cfg))
                 return -EIO;
 
-        error = ds_get_bts_end(child, &end);
-        if (error < 0)
-                return error;
-
-        error = ds_access_bts(child, /* index = */ 0, &base);
-        if (error < 0)
-                return error;
-
-        error = ds_access_bts(child, /* index = */ end, &max);
-        if (error < 0)
-                return error;
+        trace = ds_read_bts(child->bts);
+        if (!trace)
+                return -EPERM;
 
         memset(&cfg, 0, sizeof(cfg));
-        cfg.size = (max - base);
+        cfg.size = trace->ds.end - trace->ds.begin;
         cfg.signal = child->thread.bts_ovfl_signal;
         cfg.bts_size = sizeof(struct bts_struct);
 
         if (cfg.signal)
                 cfg.flags |= PTRACE_BTS_O_SIGNAL;
 
-        if (test_tsk_thread_flag(child, TIF_DEBUGCTLMSR) &&
-            child->thread.debugctlmsr & bts_cfg.debugctl_mask)
+        if (trace->ds.flags & BTS_USER)
                 cfg.flags |= PTRACE_BTS_O_TRACE;
 
-        if (test_tsk_thread_flag(child, TIF_BTS_TRACE_TS))
+        if (trace->ds.flags & BTS_TIMESTAMPS)
                 cfg.flags |= PTRACE_BTS_O_SCHED;
 
         if (copy_to_user(ucfg, &cfg, sizeof(cfg)))
@@ -856,110 +761,77 @@ static int ptrace_bts_status(struct task_struct *child,
         return sizeof(cfg);
 }
 
-static int ptrace_bts_write_record(struct task_struct *child,
-                                   const struct bts_struct *in)
+static int ptrace_bts_clear(struct task_struct *child)
 {
-        unsigned char bts_record[BTS_MAX_RECORD_SIZE];
+        const struct bts_trace *trace;
 
-        BUG_ON(BTS_MAX_RECORD_SIZE < bts_cfg.sizeof_bts);
+        trace = ds_read_bts(child->bts);
+        if (!trace)
+                return -EPERM;
 
-        memset(bts_record, 0, bts_cfg.sizeof_bts);
-        switch (in->qualifier) {
-        case BTS_INVALID:
-                break;
+        memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);
 
-        case BTS_BRANCH:
-                bts_set(bts_record, bts_from, in->variant.lbr.from_ip);
-                bts_set(bts_record, bts_to,   in->variant.lbr.to_ip);
-                break;
+        return ds_reset_bts(child->bts);
+}
 
-        case BTS_TASK_ARRIVES:
-        case BTS_TASK_DEPARTS:
-                bts_set(bts_record, bts_from,    bts_escape);
-                bts_set(bts_record, bts_qual,    in->qualifier);
-                bts_set(bts_record, bts_jiffies, in->variant.jiffies);
-                break;
+static int ptrace_bts_size(struct task_struct *child)
+{
+        const struct bts_trace *trace;
 
-        default:
-                return -EINVAL;
-        }
+        trace = ds_read_bts(child->bts);
+        if (!trace)
+                return -EPERM;
 
-        /* The writing task will be the switched-to task on a context
-         * switch. It needs to write into the switched-from task's BTS
-         * buffer. */
-        return ds_unchecked_write_bts(child, bts_record, bts_cfg.sizeof_bts);
+        return (trace->ds.top - trace->ds.begin) / trace->ds.size;
 }
 
-void ptrace_bts_take_timestamp(struct task_struct *tsk,
-                               enum bts_qualifier qualifier)
+static void ptrace_bts_fork(struct task_struct *tsk)
 {
-        struct bts_struct rec = {
-                .qualifier = qualifier,
-                .variant.jiffies = jiffies_64
-        };
-
-        ptrace_bts_write_record(tsk, &rec);
+        tsk->bts = NULL;
+        tsk->bts_buffer = NULL;
+        tsk->bts_size = 0;
+        tsk->thread.bts_ovfl_signal = 0;
 }
 
-static const struct bts_configuration bts_cfg_netburst = {
-        .sizeof_bts    = sizeof(long) * 3,
-        .sizeof_field  = sizeof(long),
-        .debugctl_mask = (1<<2)|(1<<3)|(1<<5)
-};
+static void ptrace_bts_untrace(struct task_struct *child)
+{
+        if (unlikely(child->bts)) {
+                ds_release_bts(child->bts);
+                child->bts = NULL;
+
+                /* We cannot update total_vm and locked_vm since
+                   child's mm is already gone. But we can reclaim the
+                   memory. */
+                kfree(child->bts_buffer);
+                child->bts_buffer = NULL;
+                child->bts_size = 0;
+        }
+}
 
-static const struct bts_configuration bts_cfg_pentium_m = {
-        .sizeof_bts    = sizeof(long) * 3,
-        .sizeof_field  = sizeof(long),
-        .debugctl_mask = (1<<6)|(1<<7)
-};
+static void ptrace_bts_detach(struct task_struct *child)
+{
+        if (unlikely(child->bts)) {
+                ds_release_bts(child->bts);
+                child->bts = NULL;
 
-static const struct bts_configuration bts_cfg_core2 = {
-        .sizeof_bts    = 8 * 3,
-        .sizeof_field  = 8,
-        .debugctl_mask = (1<<6)|(1<<7)|(1<<9)
-};
+                ptrace_bts_free_buffer(child);
+        }
+}
+#else
+static inline void ptrace_bts_fork(struct task_struct *tsk) {}
+static inline void ptrace_bts_detach(struct task_struct *child) {}
+static inline void ptrace_bts_untrace(struct task_struct *child) {}
+#endif /* CONFIG_X86_PTRACE_BTS */
 
-static inline void bts_configure(const struct bts_configuration *cfg)
+void x86_ptrace_fork(struct task_struct *child, unsigned long clone_flags)
 {
-        bts_cfg = *cfg;
+        ptrace_bts_fork(child);
 }
 
-void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *c)
+void x86_ptrace_untrace(struct task_struct *child)
 {
-        switch (c->x86) {
-        case 0x6:
-                switch (c->x86_model) {
-                case 0xD:
-                case 0xE: /* Pentium M */
-                        bts_configure(&bts_cfg_pentium_m);
-                        break;
-                case 0xF: /* Core2 */
-        case 0x1C: /* Atom */
-                        bts_configure(&bts_cfg_core2);
-                        break;
-                default:
-                        /* sorry, don't know about them */
-                        break;
-                }
-                break;
-        case 0xF:
-                switch (c->x86_model) {
-                case 0x0:
-                case 0x1:
-                case 0x2: /* Netburst */
-                        bts_configure(&bts_cfg_netburst);
-                        break;
-                default:
-                        /* sorry, don't know about them */
-                        break;
-                }
-                break;
-        default:
-                /* sorry, don't know about them */
-                break;
-        }
+        ptrace_bts_untrace(child);
 }
-#endif /* CONFIG_X86_PTRACE_BTS */
 
 /*
  * Called by kernel/ptrace.c when detaching..
@@ -972,15 +844,7 @@ void ptrace_disable(struct task_struct *child)
 #ifdef TIF_SYSCALL_EMU
         clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
 #endif
-#ifdef CONFIG_X86_PTRACE_BTS
-        (void)ds_release_bts(child);
-
-        child->thread.debugctlmsr &= ~bts_cfg.debugctl_mask;
-        if (!child->thread.debugctlmsr)
-                clear_tsk_thread_flag(child, TIF_DEBUGCTLMSR);
-
-        clear_tsk_thread_flag(child, TIF_BTS_TRACE_TS);
-#endif /* CONFIG_X86_PTRACE_BTS */
+        ptrace_bts_detach(child);
 }
 
 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
@@ -1112,7 +976,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 break;
 
         case PTRACE_BTS_SIZE:
-                ret = ds_get_bts_index(child, /* pos = */ NULL);
+                ret = ptrace_bts_size(child);
                 break;
 
         case PTRACE_BTS_GET:
@@ -1121,7 +985,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 break;
 
         case PTRACE_BTS_CLEAR:
-                ret = ds_clear_bts(child);
+                ret = ptrace_bts_clear(child);
                 break;
 
         case PTRACE_BTS_DRAIN:
@@ -1384,6 +1248,14 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
 
         case PTRACE_GET_THREAD_AREA:
         case PTRACE_SET_THREAD_AREA:
+#ifdef CONFIG_X86_PTRACE_BTS
+        case PTRACE_BTS_CONFIG:
+        case PTRACE_BTS_STATUS:
+        case PTRACE_BTS_SIZE:
+        case PTRACE_BTS_GET:
+        case PTRACE_BTS_CLEAR:
+        case PTRACE_BTS_DRAIN:
+#endif /* CONFIG_X86_PTRACE_BTS */
                 return arch_ptrace(child, request, addr, data);
 
         default:
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 67465ed89310..309949e9e1c1 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -168,6 +168,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_31,
                          ich_force_enable_hpet);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_1,
                          ich_force_enable_hpet);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_4,
+                         ich_force_enable_hpet);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_7,
                          ich_force_enable_hpet);
 
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index cc5a2545dd41..2b46eb41643b 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -12,6 +12,8 @@
 #include <asm/proto.h>
 #include <asm/reboot_fixups.h>
 #include <asm/reboot.h>
+#include <asm/pci_x86.h>
+#include <asm/virtext.h>
 
 #ifdef CONFIG_X86_32
 # include <linux/dmi.h>
@@ -21,6 +23,8 @@
 # include <asm/iommu.h>
 #endif
 
+#include <mach_ipi.h>
+
 /*
  * Power off function, if any
  */
@@ -36,7 +40,16 @@ int reboot_force;
 static int reboot_cpu = -1;
 #endif
 
-/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old]
+/* This is set if we need to go through the 'emergency' path.
+ * When machine_emergency_restart() is called, we may be on
+ * an inconsistent state and won't be able to do a clean cleanup
+ */
+static int reboot_emergency;
+
+/* This is set by the PCI code if either type 1 or type 2 PCI is detected */
+bool port_cf9_safe = false;
+
+/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
    warm   Don't set the cold reboot flag
    cold   Set the cold reboot flag
    bios   Reboot by jumping through the BIOS (only for X86_32)
@@ -45,6 +58,7 @@ static int reboot_cpu = -1;
    kbd    Use the keyboard controller. cold reset (default)
    acpi   Use the RESET_REG in the FADT
    efi    Use efi reset_system runtime service
+   pci    Use the so-called "PCI reset register", CF9
    force  Avoid anything that could hang.
  */
 static int __init reboot_setup(char *str)
@@ -79,6 +93,7 @@ static int __init reboot_setup(char *str)
                 case 'k':
                 case 't':
                 case 'e':
+                case 'p':
                         reboot_type = *str;
                         break;
 
@@ -360,6 +375,48 @@ static inline void kb_wait(void)
         }
 }
 
+static void vmxoff_nmi(int cpu, struct die_args *args)
+{
+        cpu_emergency_vmxoff();
+}
+
+/* Use NMIs as IPIs to tell all CPUs to disable virtualization
+ */
+static void emergency_vmx_disable_all(void)
+{
+        /* Just make sure we won't change CPUs while doing this */
+        local_irq_disable();
+
+        /* We need to disable VMX on all CPUs before rebooting, otherwise
+         * we risk hanging up the machine, because the CPU ignore INIT
+         * signals when VMX is enabled.
+         *
+         * We can't take any locks and we may be on an inconsistent
+         * state, so we use NMIs as IPIs to tell the other CPUs to disable
+         * VMX and halt.
+         *
+         * For safety, we will avoid running the nmi_shootdown_cpus()
+         * stuff unnecessarily, but we don't have a way to check
+         * if other CPUs have VMX enabled. So we will call it only if the
+         * CPU we are running on has VMX enabled.
+         *
+         * We will miss cases where VMX is not enabled on all CPUs. This
+         * shouldn't do much harm because KVM always enable VMX on all
+         * CPUs anyway. But we can miss it on the small window where KVM
+         * is still enabling VMX.
+         */
+        if (cpu_has_vmx() && cpu_vmx_enabled()) {
+                /* Disable VMX on this CPU.
+                 */
+                cpu_vmxoff();
+
+                /* Halt and disable VMX on the other CPUs */
+                nmi_shootdown_cpus(vmxoff_nmi);
+
+        }
+}
+
+
 void __attribute__((weak)) mach_reboot_fixups(void)
 {
 }
@@ -368,6 +425,9 @@ static void native_machine_emergency_restart(void)
 {
         int i;
 
+        if (reboot_emergency)
+                emergency_vmx_disable_all();
+
         /* Tell the BIOS if we want cold or warm reboot */
         *((unsigned short *)__va(0x472)) = reboot_mode;
 
@@ -404,12 +464,27 @@ static void native_machine_emergency_restart(void)
                         reboot_type = BOOT_KBD;
                         break;
 
-
                 case BOOT_EFI:
                         if (efi_enabled)
-                                efi.reset_system(reboot_mode ? EFI_RESET_WARM : EFI_RESET_COLD,
+                                efi.reset_system(reboot_mode ?
+                                                 EFI_RESET_WARM :
+                                                 EFI_RESET_COLD,
                                                  EFI_SUCCESS, 0, NULL);
+                        reboot_type = BOOT_KBD;
+                        break;
+
+                case BOOT_CF9:
+                        port_cf9_safe = true;
+                        /* fall through */
 
+                case BOOT_CF9_COND:
+                        if (port_cf9_safe) {
+                                u8 cf9 = inb(0xcf9) & ~6;
+                                outb(cf9|2, 0xcf9); /* Request hard reset */
+                                udelay(50);
+                                outb(cf9|6, 0xcf9); /* Actually do the reset */
+                                udelay(50);
+                        }
                         reboot_type = BOOT_KBD;
                         break;
                 }
@@ -426,7 +501,7 @@ void native_machine_shutdown(void)
 
 #ifdef CONFIG_X86_32
         /* See if there has been given a command line override */
-        if ((reboot_cpu != -1) && (reboot_cpu < NR_CPUS) &&
+        if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
                 cpu_online(reboot_cpu))
                 reboot_cpu_id = reboot_cpu;
 #endif
@@ -436,7 +511,7 @@ void native_machine_shutdown(void)
                 reboot_cpu_id = smp_processor_id();
 
         /* Make certain I only run on the appropriate processor */
-        set_cpus_allowed_ptr(current, &cpumask_of_cpu(reboot_cpu_id));
+        set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
 
         /* O.K Now that I'm on the appropriate processor,
          * stop all of the others.
@@ -459,17 +534,28 @@ void native_machine_shutdown(void)
 #endif
 }
 
+static void __machine_emergency_restart(int emergency)
+{
+        reboot_emergency = emergency;
+        machine_ops.emergency_restart();
+}
+
 static void native_machine_restart(char *__unused)
 {
         printk("machine restart\n");
 
         if (!reboot_force)
                 machine_shutdown();
-        machine_emergency_restart();
+        __machine_emergency_restart(0);
 }
 
 static void native_machine_halt(void)
 {
+        /* stop other cpus and apics */
+        machine_shutdown();
+
+        /* stop this cpu */
+        stop_this_cpu(NULL);
 }
 
 static void native_machine_power_off(void)
@@ -504,7 +590,7 @@ void machine_shutdown(void)
 
 void machine_emergency_restart(void)
 {
-        machine_ops.emergency_restart();
+        __machine_emergency_restart(1);
 }
 
 void machine_restart(char *cmd)
@@ -523,3 +609,92 @@ void machine_crash_shutdown(struct pt_regs *regs)
         machine_ops.crash_shutdown(regs);
 }
 #endif
+
+
+#if defined(CONFIG_SMP)
+
+/* This keeps a track of which one is crashing cpu. */
+static int crashing_cpu;
+static nmi_shootdown_cb shootdown_callback;
+
+static atomic_t waiting_for_crash_ipi;
+
+static int crash_nmi_callback(struct notifier_block *self,
+                        unsigned long val, void *data)
+{
+        int cpu;
+
+        if (val != DIE_NMI_IPI)
+                return NOTIFY_OK;
+
+        cpu = raw_smp_processor_id();
+
+        /* Don't do anything if this handler is invoked on crashing cpu.
+         * Otherwise, system will completely hang. Crashing cpu can get
+         * an NMI if system was initially booted with nmi_watchdog parameter.
+         */
+        if (cpu == crashing_cpu)
+                return NOTIFY_STOP;
+        local_irq_disable();
+
+        shootdown_callback(cpu, (struct die_args *)data);
+
+        atomic_dec(&waiting_for_crash_ipi);
+        /* Assume hlt works */
+        halt();
+        for (;;)
+                cpu_relax();
+
+        return 1;
+}
+
+static void smp_send_nmi_allbutself(void)
+{
+        send_IPI_allbutself(NMI_VECTOR);
+}
+
+static struct notifier_block crash_nmi_nb = {
+        .notifier_call = crash_nmi_callback,
+};
+
+/* Halt all other CPUs, calling the specified function on each of them
+ *
+ * This function can be used to halt all other CPUs on crash
+ * or emergency reboot time. The function passed as parameter
+ * will be called inside a NMI handler on all CPUs.
+ */
+void nmi_shootdown_cpus(nmi_shootdown_cb callback)
+{
+        unsigned long msecs;
+        local_irq_disable();
+
+        /* Make a note of crashing cpu. Will be used in NMI callback.*/
+        crashing_cpu = safe_smp_processor_id();
+
+        shootdown_callback = callback;
+
+        atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
+        /* Would it be better to replace the trap vector here? */
+        if (register_die_notifier(&crash_nmi_nb))
+                return;         /* return what? */
+        /* Ensure the new callback function is set before sending
+         * out the NMI
+         */
+        wmb();
+
+        smp_send_nmi_allbutself();
+
+        msecs = 1000; /* Wait at most a second for the other cpus to stop */
+        while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
+                mdelay(1);
+                msecs--;
+        }
+
+        /* Leave the nmi callback set */
+}
+#else /* !CONFIG_SMP */
+void nmi_shootdown_cpus(nmi_shootdown_cb callback)
+{
+        /* No other CPUs to shoot down */
+}
+#endif
diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S
index 6f50664b2ba5..a160f3119725 100644
--- a/arch/x86/kernel/relocate_kernel_32.S
+++ b/arch/x86/kernel/relocate_kernel_32.S
@@ -10,15 +10,12 @@
 #include <asm/page.h>
 #include <asm/kexec.h>
 #include <asm/processor-flags.h>
-#include <asm/pgtable.h>
 
 /*
  * Must be relocatable PIC code callable as a C function
  */
 
 #define PTR(x) (x << 2)
-#define PAGE_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
-#define PAE_PGD_ATTR (_PAGE_PRESENT)
 
 /* control_page + KEXEC_CONTROL_CODE_MAX_SIZE
  * ~ control_page + PAGE_SIZE are used as data storage and stack for
@@ -39,7 +36,6 @@
 #define CP_PA_BACKUP_PAGES_MAP  DATA(0x1c)
 
         .text
-        .align PAGE_SIZE
         .globl relocate_kernel
 relocate_kernel:
         /* Save the CPU context, used for jumping back */
@@ -60,117 +56,6 @@ relocate_kernel:
         movl    %cr4, %eax
         movl    %eax, CR4(%edi)
 
-#ifdef CONFIG_X86_PAE
-        /* map the control page at its virtual address */
-
-        movl    PTR(VA_PGD)(%ebp), %edi
-        movl    PTR(VA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0xc0000000, %eax
-        shrl    $27, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_PMD_0)(%ebp), %edx
-        orl     $PAE_PGD_ATTR, %edx
-        movl    %edx, (%eax)
-
-        movl    PTR(VA_PMD_0)(%ebp), %edi
-        movl    PTR(VA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0x3fe00000, %eax
-        shrl    $18, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_PTE_0)(%ebp), %edx
-        orl     $PAGE_ATTR, %edx
-        movl    %edx, (%eax)
-
-        movl    PTR(VA_PTE_0)(%ebp), %edi
-        movl    PTR(VA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0x001ff000, %eax
-        shrl    $9, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %edx
-        orl     $PAGE_ATTR, %edx
-        movl    %edx, (%eax)
-
-        /* identity map the control page at its physical address */
-
-        movl    PTR(VA_PGD)(%ebp), %edi
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0xc0000000, %eax
-        shrl    $27, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_PMD_1)(%ebp), %edx
-        orl     $PAE_PGD_ATTR, %edx
-        movl    %edx, (%eax)
-
-        movl    PTR(VA_PMD_1)(%ebp), %edi
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0x3fe00000, %eax
-        shrl    $18, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_PTE_1)(%ebp), %edx
-        orl     $PAGE_ATTR, %edx
-        movl    %edx, (%eax)
-
-        movl    PTR(VA_PTE_1)(%ebp), %edi
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0x001ff000, %eax
-        shrl    $9, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %edx
-        orl     $PAGE_ATTR, %edx
-        movl    %edx, (%eax)
-#else
-        /* map the control page at its virtual address */
-
-        movl    PTR(VA_PGD)(%ebp), %edi
-        movl    PTR(VA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0xffc00000, %eax
-        shrl    $20, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_PTE_0)(%ebp), %edx
-        orl     $PAGE_ATTR, %edx
-        movl    %edx, (%eax)
-
-        movl    PTR(VA_PTE_0)(%ebp), %edi
-        movl    PTR(VA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0x003ff000, %eax
-        shrl    $10, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %edx
-        orl     $PAGE_ATTR, %edx
-        movl    %edx, (%eax)
-
-        /* identity map the control page at its physical address */
-
-        movl    PTR(VA_PGD)(%ebp), %edi
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0xffc00000, %eax
-        shrl    $20, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_PTE_1)(%ebp), %edx
-        orl     $PAGE_ATTR, %edx
-        movl    %edx, (%eax)
-
-        movl    PTR(VA_PTE_1)(%ebp), %edi
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %eax
-        andl    $0x003ff000, %eax
-        shrl    $10, %eax
-        addl    %edi, %eax
-
-        movl    PTR(PA_CONTROL_PAGE)(%ebp), %edx
-        orl     $PAGE_ATTR, %edx
-        movl    %edx, (%eax)
-#endif
-
-relocate_new_kernel:
         /* read the arguments and say goodbye to the stack */
         movl  20+4(%esp), %ebx /* page_list */
         movl  20+8(%esp), %ebp /* list of pages */
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index bdec76e55594..ae0d8042cf69 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -93,11 +93,13 @@
 #include <asm/desc.h>
 #include <asm/dma.h>
 #include <asm/iommu.h>
+#include <asm/gart.h>
 #include <asm/mmu_context.h>
 #include <asm/proto.h>
 
 #include <mach_apic.h>
 #include <asm/paravirt.h>
+#include <asm/hypervisor.h>
 
 #include <asm/percpu.h>
 #include <asm/topology.h>
@@ -448,6 +450,7 @@ static void __init reserve_early_setup_data(void)
  * @size: Size of the crashkernel memory to reserve.
  * Returns the base address on success, and -1ULL on failure.
  */
+static
 unsigned long long __init find_and_reserve_crashkernel(unsigned long long size)
 {
         const unsigned long long alignment = 16<<20;    /* 16M */
@@ -583,161 +586,24 @@ static int __init setup_elfcorehdr(char *arg)
 early_param("elfcorehdr", setup_elfcorehdr);
 #endif
 
-static struct x86_quirks default_x86_quirks __initdata;
-
-struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
-
-/*
- * Some BIOSes seem to corrupt the low 64k of memory during events
- * like suspend/resume and unplugging an HDMI cable.  Reserve all
- * remaining free memory in that area and fill it with a distinct
- * pattern.
- */
-#ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
-#define MAX_SCAN_AREAS  8
-
-static int __read_mostly memory_corruption_check = -1;
-
-static unsigned __read_mostly corruption_check_size = 64*1024;
-static unsigned __read_mostly corruption_check_period = 60; /* seconds */
-
-static struct e820entry scan_areas[MAX_SCAN_AREAS];
-static int num_scan_areas;
-
-
-static int set_corruption_check(char *arg)
-{
-        char *end;
-
-        memory_corruption_check = simple_strtol(arg, &end, 10);
-
-        return (*end == 0) ? 0 : -EINVAL;
-}
-early_param("memory_corruption_check", set_corruption_check);
-
-static int set_corruption_check_period(char *arg)
-{
-        char *end;
-
-        corruption_check_period = simple_strtoul(arg, &end, 10);
-
-        return (*end == 0) ? 0 : -EINVAL;
-}
-early_param("memory_corruption_check_period", set_corruption_check_period);
-
-static int set_corruption_check_size(char *arg)
+static int __init default_update_genapic(void)
 {
-        char *end;
-        unsigned size;
-
-        size = memparse(arg, &end);
-
-        if (*end == '\0')
-                corruption_check_size = size;
-
-        return (size == corruption_check_size) ? 0 : -EINVAL;
-}
-early_param("memory_corruption_check_size", set_corruption_check_size);
-
-
-static void __init setup_bios_corruption_check(void)
-{
-        u64 addr = PAGE_SIZE;   /* assume first page is reserved anyway */
-
-        if (memory_corruption_check == -1) {
-                memory_corruption_check =
-#ifdef CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
-                        1
-#else
-                        0
+#ifdef CONFIG_X86_SMP
+# if defined(CONFIG_X86_GENERICARCH) || defined(CONFIG_X86_64)
+        genapic->wakeup_cpu = wakeup_secondary_cpu_via_init;
+# endif
 #endif
-                        ;
-        }
-
-        if (corruption_check_size == 0)
-                memory_corruption_check = 0;
-
-        if (!memory_corruption_check)
-                return;
-
-        corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);
 
-        while(addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
-                u64 size;
-                addr = find_e820_area_size(addr, &size, PAGE_SIZE);
-
-                if (addr == 0)
-                        break;
-
-                if ((addr + size) > corruption_check_size)
-                        size = corruption_check_size - addr;
-
-                if (size == 0)
-                        break;
-
-                e820_update_range(addr, size, E820_RAM, E820_RESERVED);
-                scan_areas[num_scan_areas].addr = addr;
-                scan_areas[num_scan_areas].size = size;
-                num_scan_areas++;
-
-                /* Assume we've already mapped this early memory */
-                memset(__va(addr), 0, size);
-
-                addr += size;
-        }
-
-        printk(KERN_INFO "Scanning %d areas for low memory corruption\n",
-               num_scan_areas);
-        update_e820();
-}
-
-static struct timer_list periodic_check_timer;
-
-void check_for_bios_corruption(void)
-{
-        int i;
-        int corruption = 0;
-
-        if (!memory_corruption_check)
-                return;
-
-        for(i = 0; i < num_scan_areas; i++) {
-                unsigned long *addr = __va(scan_areas[i].addr);
-                unsigned long size = scan_areas[i].size;
-
-                for(; size; addr++, size -= sizeof(unsigned long)) {
-                        if (!*addr)
-                                continue;
-                        printk(KERN_ERR "Corrupted low memory at %p (%lx phys) = %08lx\n",
-                               addr, __pa(addr), *addr);
-                        corruption = 1;
-                        *addr = 0;
-                }
-        }
-
-        WARN(corruption, KERN_ERR "Memory corruption detected in low memory\n");
-}
-
-static void periodic_check_for_corruption(unsigned long data)
-{
-        check_for_bios_corruption();
-        mod_timer(&periodic_check_timer, round_jiffies(jiffies + corruption_check_period*HZ));
+        return 0;
 }
 
-void start_periodic_check_for_corruption(void)
-{
-        if (!memory_corruption_check || corruption_check_period == 0)
-                return;
-
-        printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n",
-               corruption_check_period);
+static struct x86_quirks default_x86_quirks __initdata = {
+        .update_genapic         = default_update_genapic,
+};
 
-        init_timer(&periodic_check_timer);
-        periodic_check_timer.function = &periodic_check_for_corruption;
-        periodic_check_for_corruption(0);
-}
-#endif
+struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
 
+#ifdef CONFIG_X86_RESERVE_LOW_64K
 static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
 {
         printk(KERN_NOTICE
@@ -749,6 +615,7 @@ static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
 
         return 0;
 }
+#endif
 
 /* List of systems that have known low memory corruption BIOS problems */
 static struct dmi_system_id __initdata bad_bios_dmi_table[] = {
@@ -907,6 +774,12 @@ void __init setup_arch(char **cmdline_p)
 
         dmi_check_system(bad_bios_dmi_table);
 
+        /*
+         * VMware detection requires dmi to be available, so this
+         * needs to be done after dmi_scan_machine, for the BP.
+         */
+        init_hypervisor(&boot_cpu_data);
+
 #ifdef CONFIG_X86_32
         probe_roms();
 #endif
@@ -1080,7 +953,7 @@ void __init setup_arch(char **cmdline_p)
         ioapic_init_mappings();
 
         /* need to wait for io_apic is mapped */
-        nr_irqs = probe_nr_irqs();
+        probe_nr_irqs_gsi();
 
         kvm_guest_init();
 
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index ae0c0d3bb770..a4b619c33106 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -152,8 +152,11 @@ void __init setup_per_cpu_areas(void)
         old_size = PERCPU_ENOUGH_ROOM;
         align = max_t(unsigned long, PAGE_SIZE, align);
         size = roundup(old_size, align);
-        printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n",
-                          size);
+
+        pr_info("NR_CPUS:%d nr_cpumask_bits:%d nr_cpu_ids:%d nr_node_ids:%d\n",
+                NR_CPUS, nr_cpumask_bits, nr_cpu_ids, nr_node_ids);
+
+        pr_info("PERCPU: Allocating %zd bytes of per cpu data\n", size);
 
         for_each_possible_cpu(cpu) {
 #ifndef CONFIG_NEED_MULTIPLE_NODES
@@ -164,28 +167,21 @@ void __init setup_per_cpu_areas(void)
                 if (!node_online(node) || !NODE_DATA(node)) {
                         ptr = __alloc_bootmem(size, align,
                                          __pa(MAX_DMA_ADDRESS));
-                        printk(KERN_INFO
-                               "cpu %d has no node %d or node-local memory\n",
+                        pr_info("cpu %d has no node %d or node-local memory\n",
                                 cpu, node);
-                        if (ptr)
-                                printk(KERN_DEBUG "per cpu data for cpu%d at %016lx\n",
-                                         cpu, __pa(ptr));
-                }
-                else {
+                        pr_debug("per cpu data for cpu%d at %016lx\n",
+                                 cpu, __pa(ptr));
+                } else {
                         ptr = __alloc_bootmem_node(NODE_DATA(node), size, align,
                                                         __pa(MAX_DMA_ADDRESS));
-                        if (ptr)
-                                printk(KERN_DEBUG "per cpu data for cpu%d on node%d at %016lx\n",
-                                         cpu, node, __pa(ptr));
+                        pr_debug("per cpu data for cpu%d on node%d at %016lx\n",
+                                cpu, node, __pa(ptr));
                 }
 #endif
                 per_cpu_offset(cpu) = ptr - __per_cpu_start;
                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
         }
 
-        printk(KERN_DEBUG "NR_CPUS: %d, nr_cpu_ids: %d, nr_node_ids %d\n",
-                NR_CPUS, nr_cpu_ids, nr_node_ids);
-
         /* Setup percpu data maps */
         setup_per_cpu_maps();
 
@@ -282,7 +278,7 @@ static void __cpuinit numa_set_cpumask(int cpu, int enable)
         else
                 cpu_clear(cpu, *mask);
 
-        cpulist_scnprintf(buf, sizeof(buf), *mask);
+        cpulist_scnprintf(buf, sizeof(buf), mask);
         printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n",
                 enable? "numa_add_cpu":"numa_remove_cpu", cpu, node, buf);
  }
@@ -334,25 +330,25 @@ static const cpumask_t cpu_mask_none;
 /*
  * Returns a pointer to the bitmask of CPUs on Node 'node'.
  */
-const cpumask_t *_node_to_cpumask_ptr(int node)
+const cpumask_t *cpumask_of_node(int node)
 {
         if (node_to_cpumask_map == NULL) {
                 printk(KERN_WARNING
-                        "_node_to_cpumask_ptr(%d): no node_to_cpumask_map!\n",
+                        "cpumask_of_node(%d): no node_to_cpumask_map!\n",
                         node);
                 dump_stack();
                 return (const cpumask_t *)&cpu_online_map;
         }
         if (node >= nr_node_ids) {
                 printk(KERN_WARNING
-                        "_node_to_cpumask_ptr(%d): node > nr_node_ids(%d)\n",
+                        "cpumask_of_node(%d): node > nr_node_ids(%d)\n",
                         node, nr_node_ids);
                 dump_stack();
                 return &cpu_mask_none;
         }
         return &node_to_cpumask_map[node];
 }
-EXPORT_SYMBOL(_node_to_cpumask_ptr);
+EXPORT_SYMBOL(cpumask_of_node);
 
 /*
  * Returns a bitmask of CPUs on Node 'node'.
diff --git a/arch/x86/kernel/sigframe.h b/arch/x86/kernel/sigframe.h
deleted file mode 100644
index cc673aa55ce4..000000000000
--- a/arch/x86/kernel/sigframe.h
+++ /dev/null
@@ -1,42 +0,0 @@
-#ifdef CONFIG_X86_32
-struct sigframe {
-        char __user *pretcode;
-        int sig;
-        struct sigcontext sc;
-        /*
-         * fpstate is unused. fpstate is moved/allocated after
-         * retcode[] below. This movement allows to have the FP state and the
-         * future state extensions (xsave) stay together.
-         * And at the same time retaining the unused fpstate, prevents changing
-         * the offset of extramask[] in the sigframe and thus prevent any
-         * legacy application accessing/modifying it.
-         */
-        struct _fpstate fpstate_unused;
-        unsigned long extramask[_NSIG_WORDS-1];
-        char retcode[8];
-        /* fp state follows here */
-};
-
-struct rt_sigframe {
-        char __user *pretcode;
-        int sig;
-        struct siginfo __user *pinfo;
-        void __user *puc;
-        struct siginfo info;
-        struct ucontext uc;
-        char retcode[8];
-        /* fp state follows here */
-};
-#else
-struct rt_sigframe {
-        char __user *pretcode;
-        struct ucontext uc;
-        struct siginfo info;
-        /* fp state follows here */
-};
-
-int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
-                sigset_t *set, struct pt_regs *regs);
-int ia32_setup_frame(int sig, struct k_sigaction *ka,
-                sigset_t *set, struct pt_regs *regs);
-#endif
diff --git a/arch/x86/kernel/signal_32.c b/arch/x86/kernel/signal.c
index d6dd057d0f22..89bb7668041d 100644
--- a/arch/x86/kernel/signal_32.c
+++ b/arch/x86/kernel/signal.c
@@ -1,36 +1,41 @@
 /*
  *  Copyright (C) 1991, 1992  Linus Torvalds
+ *  Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
  *
  *  1997-11-28  Modified for POSIX.1b signals by Richard Henderson
  *  2000-06-20  Pentium III FXSR, SSE support by Gareth Hughes
+ *  2000-2002   x86-64 support by Andi Kleen
  */
-#include <linux/list.h>
 
-#include <linux/personality.h>
-#include <linux/binfmts.h>
-#include <linux/suspend.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
 #include <linux/kernel.h>
-#include <linux/ptrace.h>
 #include <linux/signal.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
 #include <linux/errno.h>
-#include <linux/sched.h>
 #include <linux/wait.h>
+#include <linux/ptrace.h>
 #include <linux/tracehook.h>
-#include <linux/elf.h>
-#include <linux/smp.h>
-#include <linux/mm.h>
+#include <linux/unistd.h>
+#include <linux/stddef.h>
+#include <linux/personality.h>
+#include <linux/uaccess.h>
 
 #include <asm/processor.h>
 #include <asm/ucontext.h>
-#include <asm/uaccess.h>
 #include <asm/i387.h>
 #include <asm/vdso.h>
+
+#ifdef CONFIG_X86_64
+#include <asm/proto.h>
+#include <asm/ia32_unistd.h>
+#include <asm/mce.h>
+#endif /* CONFIG_X86_64 */
+
 #include <asm/syscall.h>
 #include <asm/syscalls.h>
 
-#include "sigframe.h"
+#include <asm/sigframe.h>
 
 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
 
@@ -45,74 +50,6 @@
 # define FIX_EFLAGS     __FIX_EFLAGS
 #endif
 
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-asmlinkage int
-sys_sigsuspend(int history0, int history1, old_sigset_t mask)
-{
-        mask &= _BLOCKABLE;
-        spin_lock_irq(&current->sighand->siglock);
-        current->saved_sigmask = current->blocked;
-        siginitset(&current->blocked, mask);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        current->state = TASK_INTERRUPTIBLE;
-        schedule();
-        set_restore_sigmask();
-
-        return -ERESTARTNOHAND;
-}
-
-asmlinkage int
-sys_sigaction(int sig, const struct old_sigaction __user *act,
-              struct old_sigaction __user *oact)
-{
-        struct k_sigaction new_ka, old_ka;
-        int ret;
-
-        if (act) {
-                old_sigset_t mask;
-
-                if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
-                    __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
-                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
-                        return -EFAULT;
-
-                __get_user(new_ka.sa.sa_flags, &act->sa_flags);
-                __get_user(mask, &act->sa_mask);
-                siginitset(&new_ka.sa.sa_mask, mask);
-        }
-
-        ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
-
-        if (!ret && oact) {
-                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
-                    __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
-                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
-                        return -EFAULT;
-
-                __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
-                __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
-        }
-
-        return ret;
-}
-
-asmlinkage int sys_sigaltstack(unsigned long bx)
-{
-        /*
-         * This is needed to make gcc realize it doesn't own the
-         * "struct pt_regs"
-         */
-        struct pt_regs *regs = (struct pt_regs *)&bx;
-        const stack_t __user *uss = (const stack_t __user *)bx;
-        stack_t __user *uoss = (stack_t __user *)regs->cx;
-
-        return do_sigaltstack(uss, uoss, regs->sp);
-}
-
 #define COPY(x)                 {               \
         err |= __get_user(regs->x, &sc->x);     \
 }
@@ -123,7 +60,7 @@ asmlinkage int sys_sigaltstack(unsigned long bx)
                 regs->seg = tmp;                        \
 }
 
-#define COPY_SEG_STRICT(seg)    {                       \
+#define COPY_SEG_CPL3(seg)      {                       \
                 unsigned short tmp;                     \
                 err |= __get_user(tmp, &sc->seg);       \
                 regs->seg = tmp | 3;                    \
@@ -135,9 +72,6 @@ asmlinkage int sys_sigaltstack(unsigned long bx)
                 loadsegment(seg, tmp);                  \
 }
 
-/*
- * Do a signal return; undo the signal stack.
- */
 static int
 restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
                    unsigned long *pax)
@@ -149,14 +83,36 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
         /* Always make any pending restarted system calls return -EINTR */
         current_thread_info()->restart_block.fn = do_no_restart_syscall;
 
+#ifdef CONFIG_X86_32
         GET_SEG(gs);
         COPY_SEG(fs);
         COPY_SEG(es);
         COPY_SEG(ds);
+#endif /* CONFIG_X86_32 */
+
         COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
         COPY(dx); COPY(cx); COPY(ip);
-        COPY_SEG_STRICT(cs);
-        COPY_SEG_STRICT(ss);
+
+#ifdef CONFIG_X86_64
+        COPY(r8);
+        COPY(r9);
+        COPY(r10);
+        COPY(r11);
+        COPY(r12);
+        COPY(r13);
+        COPY(r14);
+        COPY(r15);
+#endif /* CONFIG_X86_64 */
+
+#ifdef CONFIG_X86_32
+        COPY_SEG_CPL3(cs);
+        COPY_SEG_CPL3(ss);
+#else /* !CONFIG_X86_32 */
+        /* Kernel saves and restores only the CS segment register on signals,
+         * which is the bare minimum needed to allow mixed 32/64-bit code.
+         * App's signal handler can save/restore other segments if needed. */
+        COPY_SEG_CPL3(cs);
+#endif /* CONFIG_X86_32 */
 
         err |= __get_user(tmpflags, &sc->flags);
         regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
@@ -169,102 +125,24 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
         return err;
 }
 
-asmlinkage unsigned long sys_sigreturn(unsigned long __unused)
-{
-        struct sigframe __user *frame;
-        struct pt_regs *regs;
-        unsigned long ax;
-        sigset_t set;
-
-        regs = (struct pt_regs *) &__unused;
-        frame = (struct sigframe __user *)(regs->sp - 8);
-
-        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
-                goto badframe;
-        if (__get_user(set.sig[0], &frame->sc.oldmask) || (_NSIG_WORDS > 1
-                && __copy_from_user(&set.sig[1], &frame->extramask,
-                                    sizeof(frame->extramask))))
-                goto badframe;
-
-        sigdelsetmask(&set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
-        current->blocked = set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        if (restore_sigcontext(regs, &frame->sc, &ax))
-                goto badframe;
-        return ax;
-
-badframe:
-        if (show_unhandled_signals && printk_ratelimit()) {
-                printk("%s%s[%d] bad frame in sigreturn frame:"
-                        "%p ip:%lx sp:%lx oeax:%lx",
-                    task_pid_nr(current) > 1 ? KERN_INFO : KERN_EMERG,
-                    current->comm, task_pid_nr(current), frame, regs->ip,
-                    regs->sp, regs->orig_ax);
-                print_vma_addr(" in ", regs->ip);
-                printk(KERN_CONT "\n");
-        }
-
-        force_sig(SIGSEGV, current);
-
-        return 0;
-}
-
-static long do_rt_sigreturn(struct pt_regs *regs)
-{
-        struct rt_sigframe __user *frame;
-        unsigned long ax;
-        sigset_t set;
-
-        frame = (struct rt_sigframe __user *)(regs->sp - sizeof(long));
-        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
-                goto badframe;
-        if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
-                goto badframe;
-
-        sigdelsetmask(&set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
-        current->blocked = set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
-                goto badframe;
-
-        if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
-                goto badframe;
-
-        return ax;
-
-badframe:
-        signal_fault(regs, frame, "rt_sigreturn");
-        return 0;
-}
-
-asmlinkage int sys_rt_sigreturn(unsigned long __unused)
-{
-        struct pt_regs *regs = (struct pt_regs *)&__unused;
-
-        return do_rt_sigreturn(regs);
-}
-
-/*
- * Set up a signal frame.
- */
 static int
 setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
                  struct pt_regs *regs, unsigned long mask)
 {
-        int tmp, err = 0;
+        int err = 0;
 
-        err |= __put_user(regs->fs, (unsigned int __user *)&sc->fs);
-        savesegment(gs, tmp);
-        err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
+#ifdef CONFIG_X86_32
+        {
+                unsigned int tmp;
 
+                savesegment(gs, tmp);
+                err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
+        }
+        err |= __put_user(regs->fs, (unsigned int __user *)&sc->fs);
         err |= __put_user(regs->es, (unsigned int __user *)&sc->es);
         err |= __put_user(regs->ds, (unsigned int __user *)&sc->ds);
+#endif /* CONFIG_X86_32 */
+
         err |= __put_user(regs->di, &sc->di);
         err |= __put_user(regs->si, &sc->si);
         err |= __put_user(regs->bp, &sc->bp);
@@ -273,19 +151,33 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
         err |= __put_user(regs->dx, &sc->dx);
         err |= __put_user(regs->cx, &sc->cx);
         err |= __put_user(regs->ax, &sc->ax);
+#ifdef CONFIG_X86_64
+        err |= __put_user(regs->r8, &sc->r8);
+        err |= __put_user(regs->r9, &sc->r9);
+        err |= __put_user(regs->r10, &sc->r10);
+        err |= __put_user(regs->r11, &sc->r11);
+        err |= __put_user(regs->r12, &sc->r12);
+        err |= __put_user(regs->r13, &sc->r13);
+        err |= __put_user(regs->r14, &sc->r14);
+        err |= __put_user(regs->r15, &sc->r15);
+#endif /* CONFIG_X86_64 */
+
         err |= __put_user(current->thread.trap_no, &sc->trapno);
         err |= __put_user(current->thread.error_code, &sc->err);
         err |= __put_user(regs->ip, &sc->ip);
+#ifdef CONFIG_X86_32
         err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);
         err |= __put_user(regs->flags, &sc->flags);
         err |= __put_user(regs->sp, &sc->sp_at_signal);
         err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);
+#else /* !CONFIG_X86_32 */
+        err |= __put_user(regs->flags, &sc->flags);
+        err |= __put_user(regs->cs, &sc->cs);
+        err |= __put_user(0, &sc->gs);
+        err |= __put_user(0, &sc->fs);
+#endif /* CONFIG_X86_32 */
 
-        tmp = save_i387_xstate(fpstate);
-        if (tmp < 0)
-                err = 1;
-        else
-                err |= __put_user(tmp ? fpstate : NULL, &sc->fpstate);
+        err |= __put_user(fpstate, &sc->fpstate);
 
         /* non-iBCS2 extensions.. */
         err |= __put_user(mask, &sc->oldmask);
@@ -295,6 +187,32 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
 }
 
 /*
+ * Set up a signal frame.
+ */
+#ifdef CONFIG_X86_32
+static const struct {
+        u16 poplmovl;
+        u32 val;
+        u16 int80;
+} __attribute__((packed)) retcode = {
+        0xb858,         /* popl %eax; movl $..., %eax */
+        __NR_sigreturn,
+        0x80cd,         /* int $0x80 */
+};
+
+static const struct {
+        u8  movl;
+        u32 val;
+        u16 int80;
+        u8  pad;
+} __attribute__((packed)) rt_retcode = {
+        0xb8,           /* movl $..., %eax */
+        __NR_rt_sigreturn,
+        0x80cd,         /* int $0x80 */
+        0
+};
+
+/*
  * Determine which stack to use..
  */
 static inline void __user *
@@ -328,6 +246,8 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
         if (used_math()) {
                 sp = sp - sig_xstate_size;
                 *fpstate = (struct _fpstate *) sp;
+                if (save_i387_xstate(*fpstate) < 0)
+                        return (void __user *)-1L;
         }
 
         sp -= frame_size;
@@ -383,9 +303,7 @@ __setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
          * reasons and because gdb uses it as a signature to notice
          * signal handler stack frames.
          */
-        err |= __put_user(0xb858, (short __user *)(frame->retcode+0));
-        err |= __put_user(__NR_sigreturn, (int __user *)(frame->retcode+2));
-        err |= __put_user(0x80cd, (short __user *)(frame->retcode+6));
+        err |= __put_user(*((u64 *)&retcode), (u64 *)frame->retcode);
 
         if (err)
                 return -EFAULT;
@@ -454,9 +372,7 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
          * reasons and because gdb uses it as a signature to notice
          * signal handler stack frames.
          */
-        err |= __put_user(0xb8, (char __user *)(frame->retcode+0));
-        err |= __put_user(__NR_rt_sigreturn, (int __user *)(frame->retcode+1));
-        err |= __put_user(0x80cd, (short __user *)(frame->retcode+5));
+        err |= __put_user(*((u64 *)&rt_retcode), (u64 *)frame->retcode);
 
         if (err)
                 return -EFAULT;
@@ -475,23 +391,293 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 
         return 0;
 }
+#else /* !CONFIG_X86_32 */
+/*
+ * Determine which stack to use..
+ */
+static void __user *
+get_stack(struct k_sigaction *ka, unsigned long sp, unsigned long size)
+{
+        /* Default to using normal stack - redzone*/
+        sp -= 128;
+
+        /* This is the X/Open sanctioned signal stack switching.  */
+        if (ka->sa.sa_flags & SA_ONSTACK) {
+                if (sas_ss_flags(sp) == 0)
+                        sp = current->sas_ss_sp + current->sas_ss_size;
+        }
+
+        return (void __user *)round_down(sp - size, 64);
+}
+
+static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
+                            sigset_t *set, struct pt_regs *regs)
+{
+        struct rt_sigframe __user *frame;
+        void __user *fp = NULL;
+        int err = 0;
+        struct task_struct *me = current;
+
+        if (used_math()) {
+                fp = get_stack(ka, regs->sp, sig_xstate_size);
+                frame = (void __user *)round_down(
+                        (unsigned long)fp - sizeof(struct rt_sigframe), 16) - 8;
+
+                if (save_i387_xstate(fp) < 0)
+                        return -EFAULT;
+        } else
+                frame = get_stack(ka, regs->sp, sizeof(struct rt_sigframe)) - 8;
+
+        if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
+                return -EFAULT;
+
+        if (ka->sa.sa_flags & SA_SIGINFO) {
+                if (copy_siginfo_to_user(&frame->info, info))
+                        return -EFAULT;
+        }
+
+        /* Create the ucontext.  */
+        if (cpu_has_xsave)
+                err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags);
+        else
+                err |= __put_user(0, &frame->uc.uc_flags);
+        err |= __put_user(0, &frame->uc.uc_link);
+        err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
+        err |= __put_user(sas_ss_flags(regs->sp),
+                          &frame->uc.uc_stack.ss_flags);
+        err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size);
+        err |= setup_sigcontext(&frame->uc.uc_mcontext, fp, regs, set->sig[0]);
+        err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
+
+        /* Set up to return from userspace.  If provided, use a stub
+           already in userspace.  */
+        /* x86-64 should always use SA_RESTORER. */
+        if (ka->sa.sa_flags & SA_RESTORER) {
+                err |= __put_user(ka->sa.sa_restorer, &frame->pretcode);
+        } else {
+                /* could use a vstub here */
+                return -EFAULT;
+        }
+
+        if (err)
+                return -EFAULT;
+
+        /* Set up registers for signal handler */
+        regs->di = sig;
+        /* In case the signal handler was declared without prototypes */
+        regs->ax = 0;
+
+        /* This also works for non SA_SIGINFO handlers because they expect the
+           next argument after the signal number on the stack. */
+        regs->si = (unsigned long)&frame->info;
+        regs->dx = (unsigned long)&frame->uc;
+        regs->ip = (unsigned long) ka->sa.sa_handler;
+
+        regs->sp = (unsigned long)frame;
+
+        /* Set up the CS register to run signal handlers in 64-bit mode,
+           even if the handler happens to be interrupting 32-bit code. */
+        regs->cs = __USER_CS;
+
+        return 0;
+}
+#endif /* CONFIG_X86_32 */
+
+#ifdef CONFIG_X86_32
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+asmlinkage int
+sys_sigsuspend(int history0, int history1, old_sigset_t mask)
+{
+        mask &= _BLOCKABLE;
+        spin_lock_irq(&current->sighand->siglock);
+        current->saved_sigmask = current->blocked;
+        siginitset(&current->blocked, mask);
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        current->state = TASK_INTERRUPTIBLE;
+        schedule();
+        set_restore_sigmask();
+
+        return -ERESTARTNOHAND;
+}
+
+asmlinkage int
+sys_sigaction(int sig, const struct old_sigaction __user *act,
+              struct old_sigaction __user *oact)
+{
+        struct k_sigaction new_ka, old_ka;
+        int ret;
+
+        if (act) {
+                old_sigset_t mask;
+
+                if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
+                    __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
+                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
+                        return -EFAULT;
+
+                __get_user(new_ka.sa.sa_flags, &act->sa_flags);
+                __get_user(mask, &act->sa_mask);
+                siginitset(&new_ka.sa.sa_mask, mask);
+        }
+
+        ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+
+        if (!ret && oact) {
+                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
+                    __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
+                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
+                        return -EFAULT;
+
+                __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
+                __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
+        }
+
+        return ret;
+}
+#endif /* CONFIG_X86_32 */
+
+#ifdef CONFIG_X86_32
+asmlinkage int sys_sigaltstack(unsigned long bx)
+{
+        /*
+         * This is needed to make gcc realize it doesn't own the
+         * "struct pt_regs"
+         */
+        struct pt_regs *regs = (struct pt_regs *)&bx;
+        const stack_t __user *uss = (const stack_t __user *)bx;
+        stack_t __user *uoss = (stack_t __user *)regs->cx;
+
+        return do_sigaltstack(uss, uoss, regs->sp);
+}
+#else /* !CONFIG_X86_32 */
+asmlinkage long
+sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
+                struct pt_regs *regs)
+{
+        return do_sigaltstack(uss, uoss, regs->sp);
+}
+#endif /* CONFIG_X86_32 */
+
+/*
+ * Do a signal return; undo the signal stack.
+ */
+#ifdef CONFIG_X86_32
+asmlinkage unsigned long sys_sigreturn(unsigned long __unused)
+{
+        struct sigframe __user *frame;
+        struct pt_regs *regs;
+        unsigned long ax;
+        sigset_t set;
+
+        regs = (struct pt_regs *) &__unused;
+        frame = (struct sigframe __user *)(regs->sp - 8);
+
+        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+                goto badframe;
+        if (__get_user(set.sig[0], &frame->sc.oldmask) || (_NSIG_WORDS > 1
+                && __copy_from_user(&set.sig[1], &frame->extramask,
+                                    sizeof(frame->extramask))))
+                goto badframe;
+
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        if (restore_sigcontext(regs, &frame->sc, &ax))
+                goto badframe;
+        return ax;
+
+badframe:
+        signal_fault(regs, frame, "sigreturn");
+
+        return 0;
+}
+#endif /* CONFIG_X86_32 */
+
+static long do_rt_sigreturn(struct pt_regs *regs)
+{
+        struct rt_sigframe __user *frame;
+        unsigned long ax;
+        sigset_t set;
+
+        frame = (struct rt_sigframe __user *)(regs->sp - sizeof(long));
+        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+                goto badframe;
+        if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
+                goto badframe;
+
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
+                goto badframe;
+
+        if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
+                goto badframe;
+
+        return ax;
+
+badframe:
+        signal_fault(regs, frame, "rt_sigreturn");
+        return 0;
+}
+
+#ifdef CONFIG_X86_32
+asmlinkage int sys_rt_sigreturn(struct pt_regs regs)
+{
+        return do_rt_sigreturn(&regs);
+}
+#else /* !CONFIG_X86_32 */
+asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
+{
+        return do_rt_sigreturn(regs);
+}
+#endif /* CONFIG_X86_32 */
 
 /*
  * OK, we're invoking a handler:
  */
 static int signr_convert(int sig)
 {
+#ifdef CONFIG_X86_32
         struct thread_info *info = current_thread_info();
 
         if (info->exec_domain && info->exec_domain->signal_invmap && sig < 32)
                 return info->exec_domain->signal_invmap[sig];
+#endif /* CONFIG_X86_32 */
         return sig;
 }
 
+#ifdef CONFIG_X86_32
+
 #define is_ia32 1
 #define ia32_setup_frame        __setup_frame
 #define ia32_setup_rt_frame     __setup_rt_frame
 
+#else /* !CONFIG_X86_32 */
+
+#ifdef CONFIG_IA32_EMULATION
+#define is_ia32 test_thread_flag(TIF_IA32)
+#else /* !CONFIG_IA32_EMULATION */
+#define is_ia32 0
+#endif /* CONFIG_IA32_EMULATION */
+
+int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
+                sigset_t *set, struct pt_regs *regs);
+int ia32_setup_frame(int sig, struct k_sigaction *ka,
+                sigset_t *set, struct pt_regs *regs);
+
+#endif /* CONFIG_X86_32 */
+
 static int
 setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                sigset_t *set, struct pt_regs *regs)
@@ -592,7 +778,13 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
         return 0;
 }
 
+#ifdef CONFIG_X86_32
 #define NR_restart_syscall      __NR_restart_syscall
+#else /* !CONFIG_X86_32 */
+#define NR_restart_syscall      \
+        test_thread_flag(TIF_IA32) ? __NR_ia32_restart_syscall : __NR_restart_syscall
+#endif /* CONFIG_X86_32 */
+
 /*
  * Note that 'init' is a special process: it doesn't get signals it doesn't
  * want to handle. Thus you cannot kill init even with a SIGKILL even by
@@ -704,8 +896,9 @@ void signal_fault(struct pt_regs *regs, void __user *frame, char *where)
         struct task_struct *me = current;
 
         if (show_unhandled_signals && printk_ratelimit()) {
-                printk(KERN_INFO
+                printk("%s"
                        "%s[%d] bad frame in %s frame:%p ip:%lx sp:%lx orax:%lx",
+                       task_pid_nr(current) > 1 ? KERN_INFO : KERN_EMERG,
                        me->comm, me->pid, where, frame,
                        regs->ip, regs->sp, regs->orig_ax);
                 print_vma_addr(" in ", regs->ip);
diff --git a/arch/x86/kernel/signal_64.c b/arch/x86/kernel/signal_64.c
deleted file mode 100644
index a5c9627f4db9..000000000000
--- a/arch/x86/kernel/signal_64.c
+++ /dev/null
@@ -1,516 +0,0 @@
-/*
- *  Copyright (C) 1991, 1992  Linus Torvalds
- *  Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
- *
- *  1997-11-28  Modified for POSIX.1b signals by Richard Henderson
- *  2000-06-20  Pentium III FXSR, SSE support by Gareth Hughes
- *  2000-2002   x86-64 support by Andi Kleen
- */
-
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/ptrace.h>
-#include <linux/tracehook.h>
-#include <linux/unistd.h>
-#include <linux/stddef.h>
-#include <linux/personality.h>
-#include <linux/compiler.h>
-#include <linux/uaccess.h>
-
-#include <asm/processor.h>
-#include <asm/ucontext.h>
-#include <asm/i387.h>
-#include <asm/proto.h>
-#include <asm/ia32_unistd.h>
-#include <asm/mce.h>
-#include <asm/syscall.h>
-#include <asm/syscalls.h>
-#include "sigframe.h"
-
-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-
-#define __FIX_EFLAGS    (X86_EFLAGS_AC | X86_EFLAGS_OF | \
-                         X86_EFLAGS_DF | X86_EFLAGS_TF | X86_EFLAGS_SF | \
-                         X86_EFLAGS_ZF | X86_EFLAGS_AF | X86_EFLAGS_PF | \
-                         X86_EFLAGS_CF)
-
-#ifdef CONFIG_X86_32
-# define FIX_EFLAGS     (__FIX_EFLAGS | X86_EFLAGS_RF)
-#else
-# define FIX_EFLAGS     __FIX_EFLAGS
-#endif
-
-asmlinkage long
-sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
-                struct pt_regs *regs)
-{
-        return do_sigaltstack(uss, uoss, regs->sp);
-}
-
-#define COPY(x)                 {               \
-        err |= __get_user(regs->x, &sc->x);     \
-}
-
-#define COPY_SEG_STRICT(seg)    {                       \
-                unsigned short tmp;                     \
-                err |= __get_user(tmp, &sc->seg);       \
-                regs->seg = tmp | 3;                    \
-}
-
-/*
- * Do a signal return; undo the signal stack.
- */
-static int
-restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
-                   unsigned long *pax)
-{
-        void __user *buf;
-        unsigned int tmpflags;
-        unsigned int err = 0;
-
-        /* Always make any pending restarted system calls return -EINTR */
-        current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
-        COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
-        COPY(dx); COPY(cx); COPY(ip);
-        COPY(r8);
-        COPY(r9);
-        COPY(r10);
-        COPY(r11);
-        COPY(r12);
-        COPY(r13);
-        COPY(r14);
-        COPY(r15);
-
-        /* Kernel saves and restores only the CS segment register on signals,
-         * which is the bare minimum needed to allow mixed 32/64-bit code.
-         * App's signal handler can save/restore other segments if needed. */
-        COPY_SEG_STRICT(cs);
-
-        err |= __get_user(tmpflags, &sc->flags);
-        regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
-        regs->orig_ax = -1;             /* disable syscall checks */
-
-        err |= __get_user(buf, &sc->fpstate);
-        err |= restore_i387_xstate(buf);
-
-        err |= __get_user(*pax, &sc->ax);
-        return err;
-}
-
-static long do_rt_sigreturn(struct pt_regs *regs)
-{
-        struct rt_sigframe __user *frame;
-        unsigned long ax;
-        sigset_t set;
-
-        frame = (struct rt_sigframe __user *)(regs->sp - sizeof(long));
-        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
-                goto badframe;
-        if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
-                goto badframe;
-
-        sigdelsetmask(&set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
-        current->blocked = set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
-                goto badframe;
-
-        if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
-                goto badframe;
-
-        return ax;
-
-badframe:
-        signal_fault(regs, frame, "rt_sigreturn");
-        return 0;
-}
-
-asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
-{
-        return do_rt_sigreturn(regs);
-}
-
-/*
- * Set up a signal frame.
- */
-
-static inline int
-setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
-                unsigned long mask, struct task_struct *me)
-{
-        int err = 0;
-
-        err |= __put_user(regs->cs, &sc->cs);
-        err |= __put_user(0, &sc->gs);
-        err |= __put_user(0, &sc->fs);
-
-        err |= __put_user(regs->di, &sc->di);
-        err |= __put_user(regs->si, &sc->si);
-        err |= __put_user(regs->bp, &sc->bp);
-        err |= __put_user(regs->sp, &sc->sp);
-        err |= __put_user(regs->bx, &sc->bx);
-        err |= __put_user(regs->dx, &sc->dx);
-        err |= __put_user(regs->cx, &sc->cx);
-        err |= __put_user(regs->ax, &sc->ax);
-        err |= __put_user(regs->r8, &sc->r8);
-        err |= __put_user(regs->r9, &sc->r9);
-        err |= __put_user(regs->r10, &sc->r10);
-        err |= __put_user(regs->r11, &sc->r11);
-        err |= __put_user(regs->r12, &sc->r12);
-        err |= __put_user(regs->r13, &sc->r13);
-        err |= __put_user(regs->r14, &sc->r14);
-        err |= __put_user(regs->r15, &sc->r15);
-        err |= __put_user(me->thread.trap_no, &sc->trapno);
-        err |= __put_user(me->thread.error_code, &sc->err);
-        err |= __put_user(regs->ip, &sc->ip);
-        err |= __put_user(regs->flags, &sc->flags);
-        err |= __put_user(mask, &sc->oldmask);
-        err |= __put_user(me->thread.cr2, &sc->cr2);
-
-        return err;
-}
-
-/*
- * Determine which stack to use..
- */
-
-static void __user *
-get_stack(struct k_sigaction *ka, struct pt_regs *regs, unsigned long size)
-{
-        unsigned long sp;
-
-        /* Default to using normal stack - redzone*/
-        sp = regs->sp - 128;
-
-        /* This is the X/Open sanctioned signal stack switching.  */
-        if (ka->sa.sa_flags & SA_ONSTACK) {
-                if (sas_ss_flags(sp) == 0)
-                        sp = current->sas_ss_sp + current->sas_ss_size;
-        }
-
-        return (void __user *)round_down(sp - size, 64);
-}
-
-static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
-                            sigset_t *set, struct pt_regs *regs)
-{
-        struct rt_sigframe __user *frame;
-        void __user *fp = NULL;
-        int err = 0;
-        struct task_struct *me = current;
-
-        if (used_math()) {
-                fp = get_stack(ka, regs, sig_xstate_size);
-                frame = (void __user *)round_down(
-                        (unsigned long)fp - sizeof(struct rt_sigframe), 16) - 8;
-
-                if (save_i387_xstate(fp) < 0)
-                        return -EFAULT;
-        } else
-                frame = get_stack(ka, regs, sizeof(struct rt_sigframe)) - 8;
-
-        if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
-                return -EFAULT;
-
-        if (ka->sa.sa_flags & SA_SIGINFO) {
-                if (copy_siginfo_to_user(&frame->info, info))
-                        return -EFAULT;
-        }
-
-        /* Create the ucontext.  */
-        if (cpu_has_xsave)
-                err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags);
-        else
-                err |= __put_user(0, &frame->uc.uc_flags);
-        err |= __put_user(0, &frame->uc.uc_link);
-        err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
-        err |= __put_user(sas_ss_flags(regs->sp),
-                          &frame->uc.uc_stack.ss_flags);
-        err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size);
-        err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, set->sig[0], me);
-        err |= __put_user(fp, &frame->uc.uc_mcontext.fpstate);
-        if (sizeof(*set) == 16) {
-                __put_user(set->sig[0], &frame->uc.uc_sigmask.sig[0]);
-                __put_user(set->sig[1], &frame->uc.uc_sigmask.sig[1]);
-        } else
-                err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
-
-        /* Set up to return from userspace.  If provided, use a stub
-           already in userspace.  */
-        /* x86-64 should always use SA_RESTORER. */
-        if (ka->sa.sa_flags & SA_RESTORER) {
-                err |= __put_user(ka->sa.sa_restorer, &frame->pretcode);
-        } else {
-                /* could use a vstub here */
-                return -EFAULT;
-        }
-
-        if (err)
-                return -EFAULT;
-
-        /* Set up registers for signal handler */
-        regs->di = sig;
-        /* In case the signal handler was declared without prototypes */
-        regs->ax = 0;
-
-        /* This also works for non SA_SIGINFO handlers because they expect the
-           next argument after the signal number on the stack. */
-        regs->si = (unsigned long)&frame->info;
-        regs->dx = (unsigned long)&frame->uc;
-        regs->ip = (unsigned long) ka->sa.sa_handler;
-
-        regs->sp = (unsigned long)frame;
-
-        /* Set up the CS register to run signal handlers in 64-bit mode,
-           even if the handler happens to be interrupting 32-bit code. */
-        regs->cs = __USER_CS;
-
-        return 0;
-}
-
-/*
- * OK, we're invoking a handler
- */
-static int signr_convert(int sig)
-{
-        return sig;
-}
-
-#ifdef CONFIG_IA32_EMULATION
-#define is_ia32 test_thread_flag(TIF_IA32)
-#else
-#define is_ia32 0
-#endif
-
-static int
-setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
-               sigset_t *set, struct pt_regs *regs)
-{
-        int usig = signr_convert(sig);
-        int ret;
-
-        /* Set up the stack frame */
-        if (is_ia32) {
-                if (ka->sa.sa_flags & SA_SIGINFO)
-                        ret = ia32_setup_rt_frame(usig, ka, info, set, regs);
-                else
-                        ret = ia32_setup_frame(usig, ka, set, regs);
-        } else
-                ret = __setup_rt_frame(sig, ka, info, set, regs);
-
-        if (ret) {
-                force_sigsegv(sig, current);
-                return -EFAULT;
-        }
-
-        return ret;
-}
-
-static int
-handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
-              sigset_t *oldset, struct pt_regs *regs)
-{
-        int ret;
-
-        /* Are we from a system call? */
-        if (syscall_get_nr(current, regs) >= 0) {
-                /* If so, check system call restarting.. */
-                switch (syscall_get_error(current, regs)) {
-                case -ERESTART_RESTARTBLOCK:
-                case -ERESTARTNOHAND:
-                        regs->ax = -EINTR;
-                        break;
-
-                case -ERESTARTSYS:
-                        if (!(ka->sa.sa_flags & SA_RESTART)) {
-                                regs->ax = -EINTR;
-                                break;
-                        }
-                /* fallthrough */
-                case -ERESTARTNOINTR:
-                        regs->ax = regs->orig_ax;
-                        regs->ip -= 2;
-                        break;
-                }
-        }
-
-        /*
-         * If TF is set due to a debugger (TIF_FORCED_TF), clear the TF
-         * flag so that register information in the sigcontext is correct.
-         */
-        if (unlikely(regs->flags & X86_EFLAGS_TF) &&
-            likely(test_and_clear_thread_flag(TIF_FORCED_TF)))
-                regs->flags &= ~X86_EFLAGS_TF;
-
-        ret = setup_rt_frame(sig, ka, info, oldset, regs);
-
-        if (ret)
-                return ret;
-
-#ifdef CONFIG_X86_64
-        /*
-         * This has nothing to do with segment registers,
-         * despite the name.  This magic affects uaccess.h
-         * macros' behavior.  Reset it to the normal setting.
-         */
-        set_fs(USER_DS);
-#endif
-
-        /*
-         * Clear the direction flag as per the ABI for function entry.
-         */
-        regs->flags &= ~X86_EFLAGS_DF;
-
-        /*
-         * Clear TF when entering the signal handler, but
-         * notify any tracer that was single-stepping it.
-         * The tracer may want to single-step inside the
-         * handler too.
-         */
-        regs->flags &= ~X86_EFLAGS_TF;
-
-        spin_lock_irq(&current->sighand->siglock);
-        sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
-        if (!(ka->sa.sa_flags & SA_NODEFER))
-                sigaddset(&current->blocked, sig);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        tracehook_signal_handler(sig, info, ka, regs,
-                                 test_thread_flag(TIF_SINGLESTEP));
-
-        return 0;
-}
-
-#define NR_restart_syscall      \
-        test_thread_flag(TIF_IA32) ? __NR_ia32_restart_syscall : __NR_restart_syscall
-/*
- * Note that 'init' is a special process: it doesn't get signals it doesn't
- * want to handle. Thus you cannot kill init even with a SIGKILL even by
- * mistake.
- */
-static void do_signal(struct pt_regs *regs)
-{
-        struct k_sigaction ka;
-        siginfo_t info;
-        int signr;
-        sigset_t *oldset;
-
-        /*
-         * We want the common case to go fast, which is why we may in certain
-         * cases get here from kernel mode. Just return without doing anything
-         * if so.
-         * X86_32: vm86 regs switched out by assembly code before reaching
-         * here, so testing against kernel CS suffices.
-         */
-        if (!user_mode(regs))
-                return;
-
-        if (current_thread_info()->status & TS_RESTORE_SIGMASK)
-                oldset = &current->saved_sigmask;
-        else
-                oldset = &current->blocked;
-
-        signr = get_signal_to_deliver(&info, &ka, regs, NULL);
-        if (signr > 0) {
-                /*
-                 * Re-enable any watchpoints before delivering the
-                 * signal to user space. The processor register will
-                 * have been cleared if the watchpoint triggered
-                 * inside the kernel.
-                 */
-                if (current->thread.debugreg7)
-                        set_debugreg(current->thread.debugreg7, 7);
-
-                /* Whee! Actually deliver the signal.  */
-                if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
-                        /*
-                         * A signal was successfully delivered; the saved
-                         * sigmask will have been stored in the signal frame,
-                         * and will be restored by sigreturn, so we can simply
-                         * clear the TS_RESTORE_SIGMASK flag.
-                         */
-                        current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
-                }
-                return;
-        }
-
-        /* Did we come from a system call? */
-        if (syscall_get_nr(current, regs) >= 0) {
-                /* Restart the system call - no handlers present */
-                switch (syscall_get_error(current, regs)) {
-                case -ERESTARTNOHAND:
-                case -ERESTARTSYS:
-                case -ERESTARTNOINTR:
-                        regs->ax = regs->orig_ax;
-                        regs->ip -= 2;
-                        break;
-
-                case -ERESTART_RESTARTBLOCK:
-                        regs->ax = NR_restart_syscall;
-                        regs->ip -= 2;
-                        break;
-                }
-        }
-
-        /*
-         * If there's no signal to deliver, we just put the saved sigmask
-         * back.
-         */
-        if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
-                current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
-                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
-        }
-}
-
-/*
- * notification of userspace execution resumption
- * - triggered by the TIF_WORK_MASK flags
- */
-void
-do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
-{
-#if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
-        /* notify userspace of pending MCEs */
-        if (thread_info_flags & _TIF_MCE_NOTIFY)
-                mce_notify_user();
-#endif /* CONFIG_X86_64 && CONFIG_X86_MCE */
-
-        /* deal with pending signal delivery */
-        if (thread_info_flags & _TIF_SIGPENDING)
-                do_signal(regs);
-
-        if (thread_info_flags & _TIF_NOTIFY_RESUME) {
-                clear_thread_flag(TIF_NOTIFY_RESUME);
-                tracehook_notify_resume(regs);
-        }
-
-#ifdef CONFIG_X86_32
-        clear_thread_flag(TIF_IRET);
-#endif /* CONFIG_X86_32 */
-}
-
-void signal_fault(struct pt_regs *regs, void __user *frame, char *where)
-{
-        struct task_struct *me = current;
-
-        if (show_unhandled_signals && printk_ratelimit()) {
-                printk(KERN_INFO
-                       "%s[%d] bad frame in %s frame:%p ip:%lx sp:%lx orax:%lx",
-                       me->comm, me->pid, where, frame,
-                       regs->ip, regs->sp, regs->orig_ax);
-                print_vma_addr(" in ", regs->ip);
-                printk(KERN_CONT "\n");
-        }
-
-        force_sig(SIGSEGV, me);
-}
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 18f9b19f5f8f..beea2649a240 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -118,41 +118,28 @@ static void native_smp_send_reschedule(int cpu)
                 WARN_ON(1);
                 return;
         }
-        send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR);
+        send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
 }
 
 void native_send_call_func_single_ipi(int cpu)
 {
-        send_IPI_mask(cpumask_of_cpu(cpu), CALL_FUNCTION_SINGLE_VECTOR);
+        send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
 }
 
-void native_send_call_func_ipi(cpumask_t mask)
+void native_send_call_func_ipi(const struct cpumask *mask)
 {
         cpumask_t allbutself;
 
         allbutself = cpu_online_map;
         cpu_clear(smp_processor_id(), allbutself);
 
-        if (cpus_equal(mask, allbutself) &&
+        if (cpus_equal(*mask, allbutself) &&
             cpus_equal(cpu_online_map, cpu_callout_map))
                 send_IPI_allbutself(CALL_FUNCTION_VECTOR);
         else
                 send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
 }
 
-static void stop_this_cpu(void *dummy)
-{
-        local_irq_disable();
-        /*
-         * Remove this CPU:
-         */
-        cpu_clear(smp_processor_id(), cpu_online_map);
-        disable_local_APIC();
-        if (hlt_works(smp_processor_id()))
-                for (;;) halt();
-        for (;;);
-}
-
 /*
  * this function calls the 'stop' function on all other CPUs in the system.
  */
@@ -178,11 +165,7 @@ static void native_smp_send_stop(void)
 void smp_reschedule_interrupt(struct pt_regs *regs)
 {
         ack_APIC_irq();
-#ifdef CONFIG_X86_32
-        __get_cpu_var(irq_stat).irq_resched_count++;
-#else
-        add_pda(irq_resched_count, 1);
-#endif
+        inc_irq_stat(irq_resched_count);
 }
 
 void smp_call_function_interrupt(struct pt_regs *regs)
@@ -190,11 +173,7 @@ void smp_call_function_interrupt(struct pt_regs *regs)
         ack_APIC_irq();
         irq_enter();
         generic_smp_call_function_interrupt();
-#ifdef CONFIG_X86_32
-        __get_cpu_var(irq_stat).irq_call_count++;
-#else
-        add_pda(irq_call_count, 1);
-#endif
+        inc_irq_stat(irq_call_count);
         irq_exit();
 }
 
@@ -203,11 +182,7 @@ void smp_call_function_single_interrupt(struct pt_regs *regs)
         ack_APIC_irq();
         irq_enter();
         generic_smp_call_function_single_interrupt();
-#ifdef CONFIG_X86_32
-        __get_cpu_var(irq_stat).irq_call_count++;
-#else
-        add_pda(irq_call_count, 1);
-#endif
+        inc_irq_stat(irq_call_count);
         irq_exit();
 }
 
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index f71f96fc9e62..6bd4d9b73870 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -62,6 +62,7 @@
 #include <asm/mtrr.h>
 #include <asm/vmi.h>
 #include <asm/genapic.h>
+#include <asm/setup.h>
 #include <linux/mc146818rtc.h>
 
 #include <mach_apic.h>
@@ -101,14 +102,8 @@ EXPORT_SYMBOL(smp_num_siblings);
 /* Last level cache ID of each logical CPU */
 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
 
-/* bitmap of online cpus */
-cpumask_t cpu_online_map __read_mostly;
-EXPORT_SYMBOL(cpu_online_map);
-
 cpumask_t cpu_callin_map;
 cpumask_t cpu_callout_map;
-cpumask_t cpu_possible_map;
-EXPORT_SYMBOL(cpu_possible_map);
 
 /* representing HT siblings of each logical CPU */
 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
@@ -287,7 +282,7 @@ static int __cpuinitdata unsafe_smp;
 /*
  * Activate a secondary processor.
  */
-static void __cpuinit start_secondary(void *unused)
+notrace static void __cpuinit start_secondary(void *unused)
 {
         /*
          * Don't put *anything* before cpu_init(), SMP booting is too
@@ -501,7 +496,7 @@ void __cpuinit set_cpu_sibling_map(int cpu)
 }
 
 /* maps the cpu to the sched domain representing multi-core */
-cpumask_t cpu_coregroup_map(int cpu)
+const struct cpumask *cpu_coregroup_mask(int cpu)
 {
         struct cpuinfo_x86 *c = &cpu_data(cpu);
         /*
@@ -509,9 +504,14 @@ cpumask_t cpu_coregroup_map(int cpu)
          * And for power savings, we return cpu_core_map
          */
         if (sched_mc_power_savings || sched_smt_power_savings)
-                return per_cpu(cpu_core_map, cpu);
+                return &per_cpu(cpu_core_map, cpu);
         else
-                return c->llc_shared_map;
+                return &c->llc_shared_map;
+}
+
+cpumask_t cpu_coregroup_map(int cpu)
+{
+        return *cpu_coregroup_mask(cpu);
 }
 
 static void impress_friends(void)
@@ -534,7 +534,7 @@ static void impress_friends(void)
         pr_debug("Before bogocount - setting activated=1.\n");
 }
 
-static inline void __inquire_remote_apic(int apicid)
+void __inquire_remote_apic(int apicid)
 {
         unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
         char *names[] = { "ID", "VERSION", "SPIV" };
@@ -573,14 +573,13 @@ static inline void __inquire_remote_apic(int apicid)
         }
 }
 
-#ifdef WAKE_SECONDARY_VIA_NMI
 /*
  * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
  * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
  * won't ... remember to clear down the APIC, etc later.
  */
-static int __devinit
-wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
+int __devinit
+wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
 {
         unsigned long send_status, accept_status = 0;
         int maxlvt;
@@ -597,7 +596,7 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
          * Give the other CPU some time to accept the IPI.
          */
         udelay(200);
-        if (APIC_INTEGRATED(apic_version[phys_apicid])) {
+        if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
                 maxlvt = lapic_get_maxlvt();
                 if (maxlvt > 3)                 /* Due to the Pentium erratum 3AP.  */
                         apic_write(APIC_ESR, 0);
@@ -612,11 +611,9 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
 
         return (send_status | accept_status);
 }
-#endif  /* WAKE_SECONDARY_VIA_NMI */
 
-#ifdef WAKE_SECONDARY_VIA_INIT
-static int __devinit
-wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
+int __devinit
+wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
 {
         unsigned long send_status, accept_status = 0;
         int maxlvt, num_starts, j;
@@ -735,7 +732,6 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
 
         return (send_status | accept_status);
 }
-#endif  /* WAKE_SECONDARY_VIA_INIT */
 
 struct create_idle {
         struct work_struct work;
@@ -1084,8 +1080,10 @@ static int __init smp_sanity_check(unsigned max_cpus)
 #endif
 
         if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
-                printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
-                                    "by the BIOS.\n", hard_smp_processor_id());
+                printk(KERN_WARNING
+                        "weird, boot CPU (#%d) not listed by the BIOS.\n",
+                        hard_smp_processor_id());
+
                 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
         }
 
@@ -1156,7 +1154,7 @@ static void __init smp_cpu_index_default(void)
         for_each_possible_cpu(i) {
                 c = &cpu_data(i);
                 /* mark all to hotplug */
-                c->cpu_index = NR_CPUS;
+                c->cpu_index = nr_cpu_ids;
         }
 }
 
@@ -1261,6 +1259,15 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
         check_nmi_watchdog();
 }
 
+static int __initdata setup_possible_cpus = -1;
+static int __init _setup_possible_cpus(char *str)
+{
+        get_option(&str, &setup_possible_cpus);
+        return 0;
+}
+early_param("possible_cpus", _setup_possible_cpus);
+
+
 /*
  * cpu_possible_map should be static, it cannot change as cpu's
  * are onlined, or offlined. The reason is per-cpu data-structures
@@ -1273,7 +1280,7 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
  *
  * Three ways to find out the number of additional hotplug CPUs:
  * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
- * - The user can overwrite it with additional_cpus=NUM
+ * - The user can overwrite it with possible_cpus=NUM
  * - Otherwise don't reserve additional CPUs.
  * We do this because additional CPUs waste a lot of memory.
  * -AK
@@ -1286,9 +1293,19 @@ __init void prefill_possible_map(void)
         if (!num_processors)
                 num_processors = 1;
 
-        possible = num_processors + disabled_cpus;
-        if (possible > NR_CPUS)
-                possible = NR_CPUS;
+        if (setup_possible_cpus == -1)
+                possible = num_processors + disabled_cpus;
+        else
+                possible = setup_possible_cpus;
+
+        total_cpus = max_t(int, possible, num_processors + disabled_cpus);
+
+        if (possible > CONFIG_NR_CPUS) {
+                printk(KERN_WARNING
+                        "%d Processors exceeds NR_CPUS limit of %d\n",
+                        possible, CONFIG_NR_CPUS);
+                possible = CONFIG_NR_CPUS;
+        }
 
         printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
                 possible, max_t(int, possible - num_processors, 0));
@@ -1353,7 +1370,7 @@ void cpu_disable_common(void)
         lock_vector_lock();
         remove_cpu_from_maps(cpu);
         unlock_vector_lock();
-        fixup_irqs(cpu_online_map);
+        fixup_irqs();
 }
 
 int native_cpu_disable(void)
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index a03e7f6d90c3..10786af95545 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -6,6 +6,7 @@
 #include <linux/sched.h>
 #include <linux/stacktrace.h>
 #include <linux/module.h>
+#include <linux/uaccess.h>
 #include <asm/stacktrace.h>
 
 static void save_stack_warning(void *data, char *msg)
@@ -83,3 +84,66 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
                 trace->entries[trace->nr_entries++] = ULONG_MAX;
 }
 EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
+
+/* Userspace stacktrace - based on kernel/trace/trace_sysprof.c */
+
+struct stack_frame {
+        const void __user       *next_fp;
+        unsigned long           ret_addr;
+};
+
+static int copy_stack_frame(const void __user *fp, struct stack_frame *frame)
+{
+        int ret;
+
+        if (!access_ok(VERIFY_READ, fp, sizeof(*frame)))
+                return 0;
+
+        ret = 1;
+        pagefault_disable();
+        if (__copy_from_user_inatomic(frame, fp, sizeof(*frame)))
+                ret = 0;
+        pagefault_enable();
+
+        return ret;
+}
+
+static inline void __save_stack_trace_user(struct stack_trace *trace)
+{
+        const struct pt_regs *regs = task_pt_regs(current);
+        const void __user *fp = (const void __user *)regs->bp;
+
+        if (trace->nr_entries < trace->max_entries)
+                trace->entries[trace->nr_entries++] = regs->ip;
+
+        while (trace->nr_entries < trace->max_entries) {
+                struct stack_frame frame;
+
+                frame.next_fp = NULL;
+                frame.ret_addr = 0;
+                if (!copy_stack_frame(fp, &frame))
+                        break;
+                if ((unsigned long)fp < regs->sp)
+                        break;
+                if (frame.ret_addr) {
+                        trace->entries[trace->nr_entries++] =
+                                frame.ret_addr;
+                }
+                if (fp == frame.next_fp)
+                        break;
+                fp = frame.next_fp;
+        }
+}
+
+void save_stack_trace_user(struct stack_trace *trace)
+{
+        /*
+         * Trace user stack if we are not a kernel thread
+         */
+        if (current->mm) {
+                __save_stack_trace_user(trace);
+        }
+        if (trace->nr_entries < trace->max_entries)
+                trace->entries[trace->nr_entries++] = ULONG_MAX;
+}
+
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 77b400f06ea2..65309e4cb1c0 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -75,7 +75,7 @@ EXPORT_SYMBOL(profile_pc);
 irqreturn_t timer_interrupt(int irq, void *dev_id)
 {
         /* Keep nmi watchdog up to date */
-        per_cpu(irq_stat, smp_processor_id()).irq0_irqs++;
+        inc_irq_stat(irq0_irqs);
 
 #ifdef CONFIG_X86_IO_APIC
         if (timer_ack) {
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index cb19d650c216..891e7a7c4334 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -49,9 +49,9 @@ unsigned long profile_pc(struct pt_regs *regs)
 }
 EXPORT_SYMBOL(profile_pc);
 
-irqreturn_t timer_interrupt(int irq, void *dev_id)
+static irqreturn_t timer_interrupt(int irq, void *dev_id)
 {
-        add_pda(irq0_irqs, 1);
+        inc_irq_stat(irq0_irqs);
 
         global_clock_event->event_handler(global_clock_event);
 
@@ -80,6 +80,8 @@ unsigned long __init calibrate_cpu(void)
                         break;
         no_ctr_free = (i == 4);
         if (no_ctr_free) {
+                WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... "
+                     "cpu_khz value may be incorrect.\n");
                 i = 3;
                 rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
                 wrmsrl(MSR_K7_EVNTSEL3, 0);
diff --git a/arch/x86/kernel/tlb_32.c b/arch/x86/kernel/tlb_32.c
index f4049f3513b6..ce5054642247 100644
--- a/arch/x86/kernel/tlb_32.c
+++ b/arch/x86/kernel/tlb_32.c
@@ -34,9 +34,8 @@ static DEFINE_SPINLOCK(tlbstate_lock);
  */
 void leave_mm(int cpu)
 {
-        if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
-                BUG();
-        cpu_clear(cpu, per_cpu(cpu_tlbstate, cpu).active_mm->cpu_vm_mask);
+        BUG_ON(x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK);
+        cpu_clear(cpu, x86_read_percpu(cpu_tlbstate.active_mm)->cpu_vm_mask);
         load_cr3(swapper_pg_dir);
 }
 EXPORT_SYMBOL_GPL(leave_mm);
@@ -104,8 +103,8 @@ void smp_invalidate_interrupt(struct pt_regs *regs)
                  * BUG();
                  */
 
-        if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) {
-                if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) {
+        if (flush_mm == x86_read_percpu(cpu_tlbstate.active_mm)) {
+                if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK) {
                         if (flush_va == TLB_FLUSH_ALL)
                                 local_flush_tlb();
                         else
@@ -119,7 +118,7 @@ void smp_invalidate_interrupt(struct pt_regs *regs)
         smp_mb__after_clear_bit();
 out:
         put_cpu_no_resched();
-        __get_cpu_var(irq_stat).irq_tlb_count++;
+        inc_irq_stat(irq_tlb_count);
 }
 
 void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
@@ -164,7 +163,7 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
          * We have to send the IPI only to
          * CPUs affected.
          */
-        send_IPI_mask(cpumask, INVALIDATE_TLB_VECTOR);
+        send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR);
 
         while (!cpus_empty(flush_cpumask))
                 /* nothing. lockup detection does not belong here */
@@ -238,7 +237,7 @@ static void do_flush_tlb_all(void *info)
         unsigned long cpu = smp_processor_id();
 
         __flush_tlb_all();
-        if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_LAZY)
+        if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_LAZY)
                 leave_mm(cpu);
 }
 
diff --git a/arch/x86/kernel/tlb_64.c b/arch/x86/kernel/tlb_64.c
index 8f919ca69494..f8be6f1d2e48 100644
--- a/arch/x86/kernel/tlb_64.c
+++ b/arch/x86/kernel/tlb_64.c
@@ -154,7 +154,7 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
 out:
         ack_APIC_irq();
         cpu_clear(cpu, f->flush_cpumask);
-        add_pda(irq_tlb_count, 1);
+        inc_irq_stat(irq_tlb_count);
 }
 
 void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
@@ -191,7 +191,7 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
          * We have to send the IPI only to
          * CPUs affected.
          */
-        send_IPI_mask(cpumask, INVALIDATE_TLB_VECTOR_START + sender);
+        send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR_START + sender);
 
         while (!cpus_empty(f->flush_cpumask))
                 cpu_relax();
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 04431f34fd16..f885023167e0 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -566,14 +566,10 @@ static int __init uv_ptc_init(void)
         if (!is_uv_system())
                 return 0;
 
-        if (!proc_mkdir("sgi_uv", NULL))
-                return -EINVAL;
-
         proc_uv_ptc = create_proc_entry(UV_PTC_BASENAME, 0444, NULL);
         if (!proc_uv_ptc) {
                 printk(KERN_ERR "unable to create %s proc entry\n",
                        UV_PTC_BASENAME);
-                remove_proc_entry("sgi_uv", NULL);
                 return -EINVAL;
         }
         proc_uv_ptc->proc_fops = &proc_uv_ptc_operations;
@@ -586,7 +582,6 @@ static int __init uv_ptc_init(void)
 static struct bau_control * __init uv_table_bases_init(int blade, int node)
 {
         int i;
-        int *ip;
         struct bau_msg_status *msp;
         struct bau_control *bau_tabp;
 
@@ -603,13 +598,6 @@ static struct bau_control * __init uv_table_bases_init(int blade, int node)
                 bau_cpubits_clear(&msp->seen_by, (int)
                                   uv_blade_nr_possible_cpus(blade));
 
-        bau_tabp->watching =
-            kmalloc_node(sizeof(int) * DEST_NUM_RESOURCES, GFP_KERNEL, node);
-        BUG_ON(!bau_tabp->watching);
-
-        for (i = 0, ip = bau_tabp->watching; i < DEST_Q_SIZE; i++, ip++)
-                *ip = 0;
-
         uv_bau_table_bases[blade] = bau_tabp;
 
         return bau_tabp;
@@ -632,7 +620,6 @@ uv_table_bases_finish(int blade, int node, int cur_cpu,
                 bcp->bau_msg_head       = bau_tablesp->va_queue_first;
                 bcp->va_queue_first     = bau_tablesp->va_queue_first;
                 bcp->va_queue_last      = bau_tablesp->va_queue_last;
-                bcp->watching           = bau_tablesp->watching;
                 bcp->msg_statuses       = bau_tablesp->msg_statuses;
                 bcp->descriptor_base    = adp;
         }
diff --git a/arch/x86/kernel/trampoline.c b/arch/x86/kernel/trampoline.c
index 1106fac6024d..808031a5ba19 100644
--- a/arch/x86/kernel/trampoline.c
+++ b/arch/x86/kernel/trampoline.c
@@ -1,10 +1,26 @@
 #include <linux/io.h>
 
 #include <asm/trampoline.h>
+#include <asm/e820.h>
 
 /* ready for x86_64 and x86 */
 unsigned char *trampoline_base = __va(TRAMPOLINE_BASE);
 
+void __init reserve_trampoline_memory(void)
+{
+#ifdef CONFIG_X86_32
+        /*
+         * But first pinch a few for the stack/trampoline stuff
+         * FIXME: Don't need the extra page at 4K, but need to fix
+         * trampoline before removing it. (see the GDT stuff)
+         */
+        reserve_early(PAGE_SIZE, PAGE_SIZE + PAGE_SIZE, "EX TRAMPOLINE");
+#endif
+        /* Has to be in very low memory so we can execute real-mode AP code. */
+        reserve_early(TRAMPOLINE_BASE, TRAMPOLINE_BASE + TRAMPOLINE_SIZE,
+                        "TRAMPOLINE");
+}
+
 /*
  * Currently trivial. Write the real->protected mode
  * bootstrap into the page concerned. The caller
@@ -12,7 +28,6 @@ unsigned char *trampoline_base = __va(TRAMPOLINE_BASE);
  */
 unsigned long setup_trampoline(void)
 {
-        memcpy(trampoline_base, trampoline_data,
-               trampoline_end - trampoline_data);
+        memcpy(trampoline_base, trampoline_data, TRAMPOLINE_SIZE);
         return virt_to_phys(trampoline_base);
 }
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 04d242ab0161..c9a666cdd3db 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -20,7 +20,6 @@
 #include <linux/module.h>
 #include <linux/ptrace.h>
 #include <linux/string.h>
-#include <linux/unwind.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/kexec.h>
@@ -51,7 +50,6 @@
 #include <asm/debugreg.h>
 #include <asm/atomic.h>
 #include <asm/system.h>
-#include <asm/unwind.h>
 #include <asm/traps.h>
 #include <asm/desc.h>
 #include <asm/i387.h>
@@ -72,9 +70,6 @@
 
 #include "cpu/mcheck/mce.h"
 
-DECLARE_BITMAP(used_vectors, NR_VECTORS);
-EXPORT_SYMBOL_GPL(used_vectors);
-
 asmlinkage int system_call(void);
 
 /* Do we ignore FPU interrupts ? */
@@ -89,6 +84,9 @@ gate_desc idt_table[256]
         __attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, };
 #endif
 
+DECLARE_BITMAP(used_vectors, NR_VECTORS);
+EXPORT_SYMBOL_GPL(used_vectors);
+
 static int ignore_nmis;
 
 static inline void conditional_sti(struct pt_regs *regs)
@@ -292,8 +290,10 @@ dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
         tsk->thread.error_code = error_code;
         tsk->thread.trap_no = 8;
 
-        /* This is always a kernel trap and never fixable (and thus must
-           never return). */
+        /*
+         * This is always a kernel trap and never fixable (and thus must
+         * never return).
+         */
         for (;;)
                 die(str, regs, error_code);
 }
@@ -481,11 +481,7 @@ do_nmi(struct pt_regs *regs, long error_code)
 {
         nmi_enter();
 
-#ifdef CONFIG_X86_32
-        { int cpu; cpu = smp_processor_id(); ++nmi_count(cpu); }
-#else
-        add_pda(__nmi_count, 1);
-#endif
+        inc_irq_stat(__nmi_count);
 
         if (!ignore_nmis)
                 default_do_nmi(regs);
@@ -524,9 +520,11 @@ dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
 }
 
 #ifdef CONFIG_X86_64
-/* Help handler running on IST stack to switch back to user stack
-   for scheduling or signal handling. The actual stack switch is done in
-   entry.S */
+/*
+ * Help handler running on IST stack to switch back to user stack
+ * for scheduling or signal handling. The actual stack switch is done in
+ * entry.S
+ */
 asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
 {
         struct pt_regs *regs = eregs;
@@ -536,8 +534,10 @@ asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
         /* Exception from user space */
         else if (user_mode(eregs))
                 regs = task_pt_regs(current);
-        /* Exception from kernel and interrupts are enabled. Move to
-           kernel process stack. */
+        /*
+         * Exception from kernel and interrupts are enabled. Move to
+         * kernel process stack.
+         */
         else if (eregs->flags & X86_EFLAGS_IF)
                 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
         if (eregs != regs)
@@ -664,7 +664,7 @@ void math_error(void __user *ip)
 {
         struct task_struct *task;
         siginfo_t info;
-        unsigned short cwd, swd;
+        unsigned short cwd, swd, err;
 
         /*
          * Save the info for the exception handler and clear the error.
@@ -675,7 +675,6 @@ void math_error(void __user *ip)
         task->thread.error_code = 0;
         info.si_signo = SIGFPE;
         info.si_errno = 0;
-        info.si_code = __SI_FAULT;
         info.si_addr = ip;
         /*
          * (~cwd & swd) will mask out exceptions that are not set to unmasked
@@ -689,34 +688,30 @@ void math_error(void __user *ip)
          */
         cwd = get_fpu_cwd(task);
         swd = get_fpu_swd(task);
-        switch (swd & ~cwd & 0x3f) {
-        case 0x000: /* No unmasked exception */
-#ifdef CONFIG_X86_32
-                return;
-#endif
-        default: /* Multiple exceptions */
-                break;
-        case 0x001: /* Invalid Op */
+
+        err = swd & ~cwd;
+
+        if (err & 0x001) {      /* Invalid op */
                 /*
                  * swd & 0x240 == 0x040: Stack Underflow
                  * swd & 0x240 == 0x240: Stack Overflow
                  * User must clear the SF bit (0x40) if set
                  */
                 info.si_code = FPE_FLTINV;
-                break;
-        case 0x002: /* Denormalize */
-        case 0x010: /* Underflow */
-                info.si_code = FPE_FLTUND;
-                break;
-        case 0x004: /* Zero Divide */
+        } else if (err & 0x004) { /* Divide by Zero */
                 info.si_code = FPE_FLTDIV;
-                break;
-        case 0x008: /* Overflow */
+        } else if (err & 0x008) { /* Overflow */
                 info.si_code = FPE_FLTOVF;
-                break;
-        case 0x020: /* Precision */
+        } else if (err & 0x012) { /* Denormal, Underflow */
+                info.si_code = FPE_FLTUND;
+        } else if (err & 0x020) { /* Precision */
                 info.si_code = FPE_FLTRES;
-                break;
+        } else {
+                /*
+                 * If we're using IRQ 13, or supposedly even some trap 16
+                 * implementations, it's possible we get a spurious trap...
+                 */
+                return;         /* Spurious trap, no error */
         }
         force_sig_info(SIGFPE, &info, task);
 }
@@ -949,9 +944,7 @@ dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
 
 void __init trap_init(void)
 {
-#ifdef CONFIG_X86_32
         int i;
-#endif
 
 #ifdef CONFIG_EISA
         void __iomem *p = early_ioremap(0x0FFFD9, 4);
@@ -1008,11 +1001,15 @@ void __init trap_init(void)
         }
 
         set_system_trap_gate(SYSCALL_VECTOR, &system_call);
+#endif
 
         /* Reserve all the builtin and the syscall vector: */
         for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
                 set_bit(i, used_vectors);
 
+#ifdef CONFIG_X86_64
+        set_bit(IA32_SYSCALL_VECTOR, used_vectors);
+#else
         set_bit(SYSCALL_VECTOR, used_vectors);
 #endif
         /*
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 424093b157d3..599e58168631 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -15,6 +15,7 @@
 #include <asm/vgtod.h>
 #include <asm/time.h>
 #include <asm/delay.h>
+#include <asm/hypervisor.h>
 
 unsigned int cpu_khz;           /* TSC clocks / usec, not used here */
 EXPORT_SYMBOL(cpu_khz);
@@ -31,6 +32,7 @@ static int tsc_unstable;
    erroneous rdtsc usage on !cpu_has_tsc processors */
 static int tsc_disabled = -1;
 
+static int tsc_clocksource_reliable;
 /*
  * Scheduler clock - returns current time in nanosec units.
  */
@@ -98,6 +100,15 @@ int __init notsc_setup(char *str)
 
 __setup("notsc", notsc_setup);
 
+static int __init tsc_setup(char *str)
+{
+        if (!strcmp(str, "reliable"))
+                tsc_clocksource_reliable = 1;
+        return 1;
+}
+
+__setup("tsc=", tsc_setup);
+
 #define MAX_RETRIES     5
 #define SMI_TRESHOLD    50000
 
@@ -352,9 +363,15 @@ unsigned long native_calibrate_tsc(void)
 {
         u64 tsc1, tsc2, delta, ref1, ref2;
         unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
-        unsigned long flags, latch, ms, fast_calibrate;
+        unsigned long flags, latch, ms, fast_calibrate, tsc_khz;
         int hpet = is_hpet_enabled(), i, loopmin;
 
+        tsc_khz = get_hypervisor_tsc_freq();
+        if (tsc_khz) {
+                printk(KERN_INFO "TSC: Frequency read from the hypervisor\n");
+                return tsc_khz;
+        }
+
         local_irq_save(flags);
         fast_calibrate = quick_pit_calibrate();
         local_irq_restore(flags);
@@ -731,24 +748,21 @@ static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
         {}
 };
 
-/*
- * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
- */
+static void __init check_system_tsc_reliable(void)
+{
 #ifdef CONFIG_MGEODE_LX
-/* RTSC counts during suspend */
+        /* RTSC counts during suspend */
 #define RTSC_SUSP 0x100
-
-static void __init check_geode_tsc_reliable(void)
-{
         unsigned long res_low, res_high;
 
         rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
+        /* Geode_LX - the OLPC CPU has a possibly a very reliable TSC */
         if (res_low & RTSC_SUSP)
-                clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
-}
-#else
-static inline void check_geode_tsc_reliable(void) { }
+                tsc_clocksource_reliable = 1;
 #endif
+        if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
+                tsc_clocksource_reliable = 1;
+}
 
 /*
  * Make an educated guess if the TSC is trustworthy and synchronized
@@ -783,6 +797,8 @@ static void __init init_tsc_clocksource(void)
 {
         clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
                         clocksource_tsc.shift);
+        if (tsc_clocksource_reliable)
+                clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
         /* lower the rating if we already know its unstable: */
         if (check_tsc_unstable()) {
                 clocksource_tsc.rating = 0;
@@ -843,7 +859,7 @@ void __init tsc_init(void)
         if (unsynchronized_tsc())
                 mark_tsc_unstable("TSCs unsynchronized");
 
-        check_geode_tsc_reliable();
+        check_system_tsc_reliable();
         init_tsc_clocksource();
 }
 
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 1c0dfbca87c1..bf36328f6ef9 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -112,6 +112,12 @@ void __cpuinit check_tsc_sync_source(int cpu)
         if (unsynchronized_tsc())
                 return;
 
+        if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) {
+                printk(KERN_INFO
+                       "Skipping synchronization checks as TSC is reliable.\n");
+                return;
+        }
+
         printk(KERN_INFO "checking TSC synchronization [CPU#%d -> CPU#%d]:",
                           smp_processor_id(), cpu);
 
@@ -165,7 +171,7 @@ void __cpuinit check_tsc_sync_target(void)
 {
         int cpus = 2;
 
-        if (unsynchronized_tsc())
+        if (unsynchronized_tsc() || boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
                 return;
 
         /*
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index 22fd6577156a..23206ba16874 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -266,109 +266,6 @@ static void vmi_nop(void)
 {
 }
 
-#ifdef CONFIG_DEBUG_PAGE_TYPE
-
-#ifdef CONFIG_X86_PAE
-#define MAX_BOOT_PTS (2048+4+1)
-#else
-#define MAX_BOOT_PTS (1024+1)
-#endif
-
-/*
- * During boot, mem_map is not yet available in paging_init, so stash
- * all the boot page allocations here.
- */
-static struct {
-        u32 pfn;
-        int type;
-} boot_page_allocations[MAX_BOOT_PTS];
-static int num_boot_page_allocations;
-static int boot_allocations_applied;
-
-void vmi_apply_boot_page_allocations(void)
-{
-        int i;
-        BUG_ON(!mem_map);
-        for (i = 0; i < num_boot_page_allocations; i++) {
-                struct page *page = pfn_to_page(boot_page_allocations[i].pfn);
-                page->type = boot_page_allocations[i].type;
-                page->type = boot_page_allocations[i].type &
-                                ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
-        }
-        boot_allocations_applied = 1;
-}
-
-static void record_page_type(u32 pfn, int type)
-{
-        BUG_ON(num_boot_page_allocations >= MAX_BOOT_PTS);
-        boot_page_allocations[num_boot_page_allocations].pfn = pfn;
-        boot_page_allocations[num_boot_page_allocations].type = type;
-        num_boot_page_allocations++;
-}
-
-static void check_zeroed_page(u32 pfn, int type, struct page *page)
-{
-        u32 *ptr;
-        int i;
-        int limit = PAGE_SIZE / sizeof(int);
-
-        if (page_address(page))
-                ptr = (u32 *)page_address(page);
-        else
-                ptr = (u32 *)__va(pfn << PAGE_SHIFT);
-        /*
-         * When cloning the root in non-PAE mode, only the userspace
-         * pdes need to be zeroed.
-         */
-        if (type & VMI_PAGE_CLONE)
-                limit = KERNEL_PGD_BOUNDARY;
-        for (i = 0; i < limit; i++)
-                BUG_ON(ptr[i]);
-}
-
-/*
- * We stash the page type into struct page so we can verify the page
- * types are used properly.
- */
-static void vmi_set_page_type(u32 pfn, int type)
-{
-        /* PAE can have multiple roots per page - don't track */
-        if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP))
-                return;
-
-        if (boot_allocations_applied) {
-                struct page *page = pfn_to_page(pfn);
-                if (type != VMI_PAGE_NORMAL)
-                        BUG_ON(page->type);
-                else
-                        BUG_ON(page->type == VMI_PAGE_NORMAL);
-                page->type = type & ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
-                if (type & VMI_PAGE_ZEROED)
-                        check_zeroed_page(pfn, type, page);
-        } else {
-                record_page_type(pfn, type);
-        }
-}
-
-static void vmi_check_page_type(u32 pfn, int type)
-{
-        /* PAE can have multiple roots per page - skip checks */
-        if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP))
-                return;
-
-        type &= ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
-        if (boot_allocations_applied) {
-                struct page *page = pfn_to_page(pfn);
-                BUG_ON((page->type ^ type) & VMI_PAGE_PAE);
-                BUG_ON(type == VMI_PAGE_NORMAL && page->type);
-                BUG_ON((type & page->type) == 0);
-        }
-}
-#else
-#define vmi_set_page_type(p,t) do { } while (0)
-#define vmi_check_page_type(p,t) do { } while (0)
-#endif
-
 #ifdef CONFIG_HIGHPTE
 static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type)
 {
@@ -395,7 +292,6 @@ static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type)
 
 static void vmi_allocate_pte(struct mm_struct *mm, unsigned long pfn)
 {
-        vmi_set_page_type(pfn, VMI_PAGE_L1);
         vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0);
 }
 
@@ -406,27 +302,22 @@ static void vmi_allocate_pmd(struct mm_struct *mm, unsigned long pfn)
          * It is called only for swapper_pg_dir, which already has
          * data on it.
          */
-        vmi_set_page_type(pfn, VMI_PAGE_L2);
         vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0);
 }
 
 static void vmi_allocate_pmd_clone(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count)
 {
-        vmi_set_page_type(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE);
-        vmi_check_page_type(clonepfn, VMI_PAGE_L2);
         vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count);
 }
 
 static void vmi_release_pte(unsigned long pfn)
 {
         vmi_ops.release_page(pfn, VMI_PAGE_L1);
-        vmi_set_page_type(pfn, VMI_PAGE_NORMAL);
 }
 
 static void vmi_release_pmd(unsigned long pfn)
 {
         vmi_ops.release_page(pfn, VMI_PAGE_L2);
-        vmi_set_page_type(pfn, VMI_PAGE_NORMAL);
 }
 
 /*
@@ -450,26 +341,22 @@ static void vmi_release_pmd(unsigned long pfn)
 
 static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
-        vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
         vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
 }
 
 static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
-        vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
         vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0));
 }
 
 static void vmi_set_pte(pte_t *ptep, pte_t pte)
 {
         /* XXX because of set_pmd_pte, this can be called on PT or PD layers */
-        vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE | VMI_PAGE_PD);
         vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT);
 }
 
 static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
 {
-        vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
         vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
 }
 
@@ -477,10 +364,8 @@ static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval)
 {
 #ifdef CONFIG_X86_PAE
         const pte_t pte = { .pte = pmdval.pmd };
-        vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PMD);
 #else
         const pte_t pte = { pmdval.pud.pgd.pgd };
-        vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PGD);
 #endif
         vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD);
 }
@@ -502,7 +387,6 @@ static void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval)
 
 static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
 {
-        vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
         vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1));
 }
 
@@ -510,21 +394,18 @@ static void vmi_set_pud(pud_t *pudp, pud_t pudval)
 {
         /* Um, eww */
         const pte_t pte = { .pte = pudval.pgd.pgd };
-        vmi_check_page_type(__pa(pudp) >> PAGE_SHIFT, VMI_PAGE_PGD);
         vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP);
 }
 
 static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
         const pte_t pte = { .pte = 0 };
-        vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
         vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
 }
 
 static void vmi_pmd_clear(pmd_t *pmd)
 {
         const pte_t pte = { .pte = 0 };
-        vmi_check_page_type(__pa(pmd) >> PAGE_SHIFT, VMI_PAGE_PMD);
         vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD);
 }
 #endif
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 254ee07f8635..c4c1f9e09402 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -226,7 +226,7 @@ static void __devinit vmi_time_init_clockevent(void)
         /* Upper bound is clockevent's use of ulong for cycle deltas. */
         evt->max_delta_ns = clockevent_delta2ns(ULONG_MAX, evt);
         evt->min_delta_ns = clockevent_delta2ns(1, evt);
-        evt->cpumask = cpumask_of_cpu(cpu);
+        evt->cpumask = cpumask_of(cpu);
 
         printk(KERN_WARNING "vmi: registering clock event %s. mult=%lu shift=%u\n",
                evt->name, evt->mult, evt->shift);
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
index a9b8560adbc2..82c67559dde7 100644
--- a/arch/x86/kernel/vmlinux_32.lds.S
+++ b/arch/x86/kernel/vmlinux_32.lds.S
@@ -44,6 +44,7 @@ SECTIONS
         SCHED_TEXT
         LOCK_TEXT
         KPROBES_TEXT
+        IRQENTRY_TEXT
         *(.fixup)
         *(.gnu.warning)
         _etext = .;                     /* End of text section */
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S
index 46e05447405b..1a614c0e6bef 100644
--- a/arch/x86/kernel/vmlinux_64.lds.S
+++ b/arch/x86/kernel/vmlinux_64.lds.S
@@ -35,6 +35,7 @@ SECTIONS
         SCHED_TEXT
         LOCK_TEXT
         KPROBES_TEXT
+        IRQENTRY_TEXT
         *(.fixup)
         *(.gnu.warning)
         _etext = .;             /* End of text section */
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 0b8b6690a86d..44153afc9067 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -17,6 +17,9 @@
  *  want per guest time just set the kernel.vsyscall64 sysctl to 0.
  */
 
+/* Disable profiling for userspace code: */
+#define DISABLE_BRANCH_PROFILING
+
 #include <linux/time.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -128,7 +131,16 @@ static __always_inline void do_vgettimeofday(struct timeval * tv)
                         gettimeofday(tv,NULL);
                         return;
                 }
+
+                /*
+                 * Surround the RDTSC by barriers, to make sure it's not
+                 * speculated to outside the seqlock critical section and
+                 * does not cause time warps:
+                 */
+                rdtsc_barrier();
                 now = vread();
+                rdtsc_barrier();
+
                 base = __vsyscall_gtod_data.clock.cycle_last;
                 mask = __vsyscall_gtod_data.clock.mask;
                 mult = __vsyscall_gtod_data.clock.mult;
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c
index 15c3e6999182..2b54fe002e94 100644
--- a/arch/x86/kernel/xsave.c
+++ b/arch/x86/kernel/xsave.c
@@ -159,7 +159,7 @@ int save_i387_xstate(void __user *buf)
  * Restore the extended state if present. Otherwise, restore the FP/SSE
  * state.
  */
-int restore_user_xstate(void __user *buf)
+static int restore_user_xstate(void __user *buf)
 {
         struct _fpx_sw_bytes fx_sw_user;
         u64 mask;
diff --git a/arch/x86/kvm/Makefile b/arch/x86/kvm/Makefile
index c02343594b4d..d3ec292f00f2 100644
--- a/arch/x86/kvm/Makefile
+++ b/arch/x86/kvm/Makefile
@@ -7,8 +7,8 @@ common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \
 ifeq ($(CONFIG_KVM_TRACE),y)
 common-objs += $(addprefix ../../../virt/kvm/, kvm_trace.o)
 endif
-ifeq ($(CONFIG_DMAR),y)
-common-objs += $(addprefix ../../../virt/kvm/, vtd.o)
+ifeq ($(CONFIG_IOMMU_API),y)
+common-objs += $(addprefix ../../../virt/kvm/, iommu.o)
 endif
 
 EXTRA_CFLAGS += -Ivirt/kvm -Iarch/x86/kvm
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 59ebd37ad79e..e665d1c623ca 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -603,10 +603,29 @@ void kvm_free_pit(struct kvm *kvm)
 
 static void __inject_pit_timer_intr(struct kvm *kvm)
 {
+        struct kvm_vcpu *vcpu;
+        int i;
+
         mutex_lock(&kvm->lock);
         kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
         kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
         mutex_unlock(&kvm->lock);
+
+        /*
+         * Provides NMI watchdog support via Virtual Wire mode.
+         * The route is: PIT -> PIC -> LVT0 in NMI mode.
+         *
+         * Note: Our Virtual Wire implementation is simplified, only
+         * propagating PIT interrupts to all VCPUs when they have set
+         * LVT0 to NMI delivery. Other PIC interrupts are just sent to
+         * VCPU0, and only if its LVT0 is in EXTINT mode.
+         */
+        if (kvm->arch.vapics_in_nmi_mode > 0)
+                for (i = 0; i < KVM_MAX_VCPUS; ++i) {
+                        vcpu = kvm->vcpus[i];
+                        if (vcpu)
+                                kvm_apic_nmi_wd_deliver(vcpu);
+                }
 }
 
 void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index 17e41e165f1a..179dcb0103fd 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -26,10 +26,40 @@
  *   Port from Qemu.
  */
 #include <linux/mm.h>
+#include <linux/bitops.h>
 #include "irq.h"
 
 #include <linux/kvm_host.h>
 
+static void pic_lock(struct kvm_pic *s)
+{
+        spin_lock(&s->lock);
+}
+
+static void pic_unlock(struct kvm_pic *s)
+{
+        struct kvm *kvm = s->kvm;
+        unsigned acks = s->pending_acks;
+        bool wakeup = s->wakeup_needed;
+        struct kvm_vcpu *vcpu;
+
+        s->pending_acks = 0;
+        s->wakeup_needed = false;
+
+        spin_unlock(&s->lock);
+
+        while (acks) {
+                kvm_notify_acked_irq(kvm, __ffs(acks));
+                acks &= acks - 1;
+        }
+
+        if (wakeup) {
+                vcpu = s->kvm->vcpus[0];
+                if (vcpu)
+                        kvm_vcpu_kick(vcpu);
+        }
+}
+
 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
 {
         s->isr &= ~(1 << irq);
@@ -136,17 +166,21 @@ static void pic_update_irq(struct kvm_pic *s)
 
 void kvm_pic_update_irq(struct kvm_pic *s)
 {
+        pic_lock(s);
         pic_update_irq(s);
+        pic_unlock(s);
 }
 
 void kvm_pic_set_irq(void *opaque, int irq, int level)
 {
         struct kvm_pic *s = opaque;
 
+        pic_lock(s);
         if (irq >= 0 && irq < PIC_NUM_PINS) {
                 pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
                 pic_update_irq(s);
         }
+        pic_unlock(s);
 }
 
 /*
@@ -172,6 +206,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
         int irq, irq2, intno;
         struct kvm_pic *s = pic_irqchip(kvm);
 
+        pic_lock(s);
         irq = pic_get_irq(&s->pics[0]);
         if (irq >= 0) {
                 pic_intack(&s->pics[0], irq);
@@ -196,6 +231,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
                 intno = s->pics[0].irq_base + irq;
         }
         pic_update_irq(s);
+        pic_unlock(s);
         kvm_notify_acked_irq(kvm, irq);
 
         return intno;
@@ -203,7 +239,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
 
 void kvm_pic_reset(struct kvm_kpic_state *s)
 {
-        int irq, irqbase;
+        int irq, irqbase, n;
         struct kvm *kvm = s->pics_state->irq_request_opaque;
         struct kvm_vcpu *vcpu0 = kvm->vcpus[0];
 
@@ -214,8 +250,10 @@ void kvm_pic_reset(struct kvm_kpic_state *s)
 
         for (irq = 0; irq < PIC_NUM_PINS/2; irq++) {
                 if (vcpu0 && kvm_apic_accept_pic_intr(vcpu0))
-                        if (s->irr & (1 << irq) || s->isr & (1 << irq))
-                                kvm_notify_acked_irq(kvm, irq+irqbase);
+                        if (s->irr & (1 << irq) || s->isr & (1 << irq)) {
+                                n = irq + irqbase;
+                                s->pics_state->pending_acks |= 1 << n;
+                        }
         }
         s->last_irr = 0;
         s->irr = 0;
@@ -406,6 +444,7 @@ static void picdev_write(struct kvm_io_device *this,
                         printk(KERN_ERR "PIC: non byte write\n");
                 return;
         }
+        pic_lock(s);
         switch (addr) {
         case 0x20:
         case 0x21:
@@ -418,6 +457,7 @@ static void picdev_write(struct kvm_io_device *this,
                 elcr_ioport_write(&s->pics[addr & 1], addr, data);
                 break;
         }
+        pic_unlock(s);
 }
 
 static void picdev_read(struct kvm_io_device *this,
@@ -431,6 +471,7 @@ static void picdev_read(struct kvm_io_device *this,
                         printk(KERN_ERR "PIC: non byte read\n");
                 return;
         }
+        pic_lock(s);
         switch (addr) {
         case 0x20:
         case 0x21:
@@ -444,6 +485,7 @@ static void picdev_read(struct kvm_io_device *this,
                 break;
         }
         *(unsigned char *)val = data;
+        pic_unlock(s);
 }
 
 /*
@@ -459,7 +501,7 @@ static void pic_irq_request(void *opaque, int level)
         s->output = level;
         if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) {
                 s->pics[0].isr_ack &= ~(1 << irq);
-                kvm_vcpu_kick(vcpu);
+                s->wakeup_needed = true;
         }
 }
 
@@ -469,6 +511,8 @@ struct kvm_pic *kvm_create_pic(struct kvm *kvm)
         s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
         if (!s)
                 return NULL;
+        spin_lock_init(&s->lock);
+        s->kvm = kvm;
         s->pics[0].elcr_mask = 0xf8;
         s->pics[1].elcr_mask = 0xde;
         s->irq_request = pic_irq_request;
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h
index f17c8f5bbf31..2bf32a03ceec 100644
--- a/arch/x86/kvm/irq.h
+++ b/arch/x86/kvm/irq.h
@@ -25,6 +25,7 @@
 #include <linux/mm_types.h>
 #include <linux/hrtimer.h>
 #include <linux/kvm_host.h>
+#include <linux/spinlock.h>
 
 #include "iodev.h"
 #include "ioapic.h"
@@ -59,6 +60,10 @@ struct kvm_kpic_state {
 };
 
 struct kvm_pic {
+        spinlock_t lock;
+        bool wakeup_needed;
+        unsigned pending_acks;
+        struct kvm *kvm;
         struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */
         irq_request_func *irq_request;
         void *irq_request_opaque;
@@ -87,6 +92,7 @@ void kvm_pic_reset(struct kvm_kpic_state *s);
 void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
 void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
 void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu);
+void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu);
 void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu);
 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu);
 void __kvm_migrate_timers(struct kvm_vcpu *vcpu);
diff --git a/arch/x86/kvm/kvm_svm.h b/arch/x86/kvm/kvm_svm.h
index 65ef0fc2c036..8e5ee99551f6 100644
--- a/arch/x86/kvm/kvm_svm.h
+++ b/arch/x86/kvm/kvm_svm.h
@@ -7,7 +7,7 @@
 #include <linux/kvm_host.h>
 #include <asm/msr.h>
 
-#include "svm.h"
+#include <asm/svm.h>
 
 static const u32 host_save_user_msrs[] = {
 #ifdef CONFIG_X86_64
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 0fc3cab48943..afac68c0815c 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -130,6 +130,11 @@ static inline int apic_lvtt_period(struct kvm_lapic *apic)
         return apic_get_reg(apic, APIC_LVTT) & APIC_LVT_TIMER_PERIODIC;
 }
 
+static inline int apic_lvt_nmi_mode(u32 lvt_val)
+{
+        return (lvt_val & (APIC_MODE_MASK | APIC_LVT_MASKED)) == APIC_DM_NMI;
+}
+
 static unsigned int apic_lvt_mask[APIC_LVT_NUM] = {
         LVT_MASK | APIC_LVT_TIMER_PERIODIC,     /* LVTT */
         LVT_MASK | APIC_MODE_MASK,      /* LVTTHMR */
@@ -354,6 +359,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
 
         case APIC_DM_NMI:
                 kvm_inject_nmi(vcpu);
+                kvm_vcpu_kick(vcpu);
                 break;
 
         case APIC_DM_INIT:
@@ -380,6 +386,14 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
                 }
                 break;
 
+        case APIC_DM_EXTINT:
+                /*
+                 * Should only be called by kvm_apic_local_deliver() with LVT0,
+                 * before NMI watchdog was enabled. Already handled by
+                 * kvm_apic_accept_pic_intr().
+                 */
+                break;
+
         default:
                 printk(KERN_ERR "TODO: unsupported delivery mode %x\n",
                        delivery_mode);
@@ -663,6 +677,20 @@ static void start_apic_timer(struct kvm_lapic *apic)
                                         apic->timer.period)));
 }
 
+static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)
+{
+        int nmi_wd_enabled = apic_lvt_nmi_mode(apic_get_reg(apic, APIC_LVT0));
+
+        if (apic_lvt_nmi_mode(lvt0_val)) {
+                if (!nmi_wd_enabled) {
+                        apic_debug("Receive NMI setting on APIC_LVT0 "
+                                   "for cpu %d\n", apic->vcpu->vcpu_id);
+                        apic->vcpu->kvm->arch.vapics_in_nmi_mode++;
+                }
+        } else if (nmi_wd_enabled)
+                apic->vcpu->kvm->arch.vapics_in_nmi_mode--;
+}
+
 static void apic_mmio_write(struct kvm_io_device *this,
                             gpa_t address, int len, const void *data)
 {
@@ -743,10 +771,11 @@ static void apic_mmio_write(struct kvm_io_device *this,
                 apic_set_reg(apic, APIC_ICR2, val & 0xff000000);
                 break;
 
+        case APIC_LVT0:
+                apic_manage_nmi_watchdog(apic, val);
         case APIC_LVTT:
         case APIC_LVTTHMR:
         case APIC_LVTPC:
-        case APIC_LVT0:
         case APIC_LVT1:
         case APIC_LVTERR:
                 /* TODO: Check vector */
@@ -961,12 +990,26 @@ int apic_has_pending_timer(struct kvm_vcpu *vcpu)
         return 0;
 }
 
-static int __inject_apic_timer_irq(struct kvm_lapic *apic)
+static int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type)
+{
+        u32 reg = apic_get_reg(apic, lvt_type);
+        int vector, mode, trig_mode;
+
+        if (apic_hw_enabled(apic) && !(reg & APIC_LVT_MASKED)) {
+                vector = reg & APIC_VECTOR_MASK;
+                mode = reg & APIC_MODE_MASK;
+                trig_mode = reg & APIC_LVT_LEVEL_TRIGGER;
+                return __apic_accept_irq(apic, mode, vector, 1, trig_mode);
+        }
+        return 0;
+}
+
+void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu)
 {
-        int vector;
+        struct kvm_lapic *apic = vcpu->arch.apic;
 
-        vector = apic_lvt_vector(apic, APIC_LVTT);
-        return __apic_accept_irq(apic, APIC_DM_FIXED, vector, 1, 0);
+        if (apic)
+                kvm_apic_local_deliver(apic, APIC_LVT0);
 }
 
 static enum hrtimer_restart apic_timer_fn(struct hrtimer *data)
@@ -1061,9 +1104,8 @@ void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu)
 {
         struct kvm_lapic *apic = vcpu->arch.apic;
 
-        if (apic && apic_lvt_enabled(apic, APIC_LVTT) &&
-                atomic_read(&apic->timer.pending) > 0) {
-                if (__inject_apic_timer_irq(apic))
+        if (apic && atomic_read(&apic->timer.pending) > 0) {
+                if (kvm_apic_local_deliver(apic, APIC_LVTT))
                         atomic_dec(&apic->timer.pending);
         }
 }
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 410ddbc1aa2e..83f11c7474a1 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -17,7 +17,6 @@
  *
  */
 
-#include "vmx.h"
 #include "mmu.h"
 
 #include <linux/kvm_host.h>
@@ -33,6 +32,7 @@
 #include <asm/page.h>
 #include <asm/cmpxchg.h>
 #include <asm/io.h>
+#include <asm/vmx.h>
 
 /*
  * When setting this variable to true it enables Two-Dimensional-Paging
@@ -168,6 +168,7 @@ static u64 __read_mostly shadow_x_mask;	/* mutual exclusive with nx_mask */
 static u64 __read_mostly shadow_user_mask;
 static u64 __read_mostly shadow_accessed_mask;
 static u64 __read_mostly shadow_dirty_mask;
+static u64 __read_mostly shadow_mt_mask;
 
 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
 {
@@ -183,13 +184,14 @@ void kvm_mmu_set_base_ptes(u64 base_pte)
 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
 
 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
-                u64 dirty_mask, u64 nx_mask, u64 x_mask)
+                u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
 {
         shadow_user_mask = user_mask;
         shadow_accessed_mask = accessed_mask;
         shadow_dirty_mask = dirty_mask;
         shadow_nx_mask = nx_mask;
         shadow_x_mask = x_mask;
+        shadow_mt_mask = mt_mask;
 }
 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 
@@ -384,7 +386,9 @@ static void account_shadowed(struct kvm *kvm, gfn_t gfn)
 {
         int *write_count;
 
-        write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
+        gfn = unalias_gfn(kvm, gfn);
+        write_count = slot_largepage_idx(gfn,
+                                         gfn_to_memslot_unaliased(kvm, gfn));
         *write_count += 1;
 }
 
@@ -392,16 +396,20 @@ static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
 {
         int *write_count;
 
-        write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
+        gfn = unalias_gfn(kvm, gfn);
+        write_count = slot_largepage_idx(gfn,
+                                         gfn_to_memslot_unaliased(kvm, gfn));
         *write_count -= 1;
         WARN_ON(*write_count < 0);
 }
 
 static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
 {
-        struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
+        struct kvm_memory_slot *slot;
         int *largepage_idx;
 
+        gfn = unalias_gfn(kvm, gfn);
+        slot = gfn_to_memslot_unaliased(kvm, gfn);
         if (slot) {
                 largepage_idx = slot_largepage_idx(gfn, slot);
                 return *largepage_idx;
@@ -613,7 +621,7 @@ static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
         return NULL;
 }
 
-static void rmap_write_protect(struct kvm *kvm, u64 gfn)
+static int rmap_write_protect(struct kvm *kvm, u64 gfn)
 {
         unsigned long *rmapp;
         u64 *spte;
@@ -659,8 +667,7 @@ static void rmap_write_protect(struct kvm *kvm, u64 gfn)
                 spte = rmap_next(kvm, rmapp, spte);
         }
 
-        if (write_protected)
-                kvm_flush_remote_tlbs(kvm);
+        return write_protected;
 }
 
 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
@@ -786,9 +793,11 @@ static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
         sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
+        INIT_LIST_HEAD(&sp->oos_link);
         ASSERT(is_empty_shadow_page(sp->spt));
-        sp->slot_bitmap = 0;
+        bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
         sp->multimapped = 0;
+        sp->global = 1;
         sp->parent_pte = parent_pte;
         --vcpu->kvm->arch.n_free_mmu_pages;
         return sp;
@@ -900,8 +909,9 @@ static void kvm_mmu_update_unsync_bitmap(u64 *spte)
         struct kvm_mmu_page *sp = page_header(__pa(spte));
 
         index = spte - sp->spt;
-        __set_bit(index, sp->unsync_child_bitmap);
-        sp->unsync_children = 1;
+        if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
+                sp->unsync_children++;
+        WARN_ON(!sp->unsync_children);
 }
 
 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
@@ -928,7 +938,6 @@ static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
 
 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
 {
-        sp->unsync_children = 1;
         kvm_mmu_update_parents_unsync(sp);
         return 1;
 }
@@ -959,38 +968,66 @@ static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
 {
 }
 
+#define KVM_PAGE_ARRAY_NR 16
+
+struct kvm_mmu_pages {
+        struct mmu_page_and_offset {
+                struct kvm_mmu_page *sp;
+                unsigned int idx;
+        } page[KVM_PAGE_ARRAY_NR];
+        unsigned int nr;
+};
+
 #define for_each_unsync_children(bitmap, idx)           \
         for (idx = find_first_bit(bitmap, 512);         \
              idx < 512;                                 \
              idx = find_next_bit(bitmap, 512, idx+1))
 
-static int mmu_unsync_walk(struct kvm_mmu_page *sp,
-                           struct kvm_unsync_walk *walker)
+int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
+                   int idx)
 {
-        int i, ret;
+        int i;
 
-        if (!sp->unsync_children)
-                return 0;
+        if (sp->unsync)
+                for (i=0; i < pvec->nr; i++)
+                        if (pvec->page[i].sp == sp)
+                                return 0;
+
+        pvec->page[pvec->nr].sp = sp;
+        pvec->page[pvec->nr].idx = idx;
+        pvec->nr++;
+        return (pvec->nr == KVM_PAGE_ARRAY_NR);
+}
+
+static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
+                           struct kvm_mmu_pages *pvec)
+{
+        int i, ret, nr_unsync_leaf = 0;
 
         for_each_unsync_children(sp->unsync_child_bitmap, i) {
                 u64 ent = sp->spt[i];
 
-                if (is_shadow_present_pte(ent)) {
+                if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
                         struct kvm_mmu_page *child;
                         child = page_header(ent & PT64_BASE_ADDR_MASK);
 
                         if (child->unsync_children) {
-                                ret = mmu_unsync_walk(child, walker);
-                                if (ret)
+                                if (mmu_pages_add(pvec, child, i))
+                                        return -ENOSPC;
+
+                                ret = __mmu_unsync_walk(child, pvec);
+                                if (!ret)
+                                        __clear_bit(i, sp->unsync_child_bitmap);
+                                else if (ret > 0)
+                                        nr_unsync_leaf += ret;
+                                else
                                         return ret;
-                                __clear_bit(i, sp->unsync_child_bitmap);
                         }
 
                         if (child->unsync) {
-                                ret = walker->entry(child, walker);
-                                __clear_bit(i, sp->unsync_child_bitmap);
-                                if (ret)
-                                        return ret;
+                                nr_unsync_leaf++;
+                                if (mmu_pages_add(pvec, child, i))
+                                        return -ENOSPC;
                         }
                 }
         }
@@ -998,7 +1035,17 @@ static int mmu_unsync_walk(struct kvm_mmu_page *sp,
         if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
                 sp->unsync_children = 0;
 
-        return 0;
+        return nr_unsync_leaf;
+}
+
+static int mmu_unsync_walk(struct kvm_mmu_page *sp,
+                           struct kvm_mmu_pages *pvec)
+{
+        if (!sp->unsync_children)
+                return 0;
+
+        mmu_pages_add(pvec, sp, 0);
+        return __mmu_unsync_walk(sp, pvec);
 }
 
 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
@@ -1021,10 +1068,18 @@ static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
         return NULL;
 }
 
+static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
+{
+        list_del(&sp->oos_link);
+        --kvm->stat.mmu_unsync_global;
+}
+
 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
 {
         WARN_ON(!sp->unsync);
         sp->unsync = 0;
+        if (sp->global)
+                kvm_unlink_unsync_global(kvm, sp);
         --kvm->stat.mmu_unsync;
 }
 
@@ -1037,7 +1092,8 @@ static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
                 return 1;
         }
 
-        rmap_write_protect(vcpu->kvm, sp->gfn);
+        if (rmap_write_protect(vcpu->kvm, sp->gfn))
+                kvm_flush_remote_tlbs(vcpu->kvm);
         kvm_unlink_unsync_page(vcpu->kvm, sp);
         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
                 kvm_mmu_zap_page(vcpu->kvm, sp);
@@ -1048,30 +1104,89 @@ static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
         return 0;
 }
 
-struct sync_walker {
-        struct kvm_vcpu *vcpu;
-        struct kvm_unsync_walk walker;
+struct mmu_page_path {
+        struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
+        unsigned int idx[PT64_ROOT_LEVEL-1];
 };
 
-static int mmu_sync_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
+#define for_each_sp(pvec, sp, parents, i)                       \
+                for (i = mmu_pages_next(&pvec, &parents, -1),   \
+                        sp = pvec.page[i].sp;                   \
+                        i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
+                        i = mmu_pages_next(&pvec, &parents, i))
+
+int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
+                   int i)
 {
-        struct sync_walker *sync_walk = container_of(walk, struct sync_walker,
-                                                     walker);
-        struct kvm_vcpu *vcpu = sync_walk->vcpu;
+        int n;
 
-        kvm_sync_page(vcpu, sp);
-        return (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock));
+        for (n = i+1; n < pvec->nr; n++) {
+                struct kvm_mmu_page *sp = pvec->page[n].sp;
+
+                if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
+                        parents->idx[0] = pvec->page[n].idx;
+                        return n;
+                }
+
+                parents->parent[sp->role.level-2] = sp;
+                parents->idx[sp->role.level-1] = pvec->page[n].idx;
+        }
+
+        return n;
 }
 
-static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
+void mmu_pages_clear_parents(struct mmu_page_path *parents)
 {
-        struct sync_walker walker = {
-                .walker = { .entry = mmu_sync_fn, },
-                .vcpu = vcpu,
-        };
+        struct kvm_mmu_page *sp;
+        unsigned int level = 0;
+
+        do {
+                unsigned int idx = parents->idx[level];
+
+                sp = parents->parent[level];
+                if (!sp)
+                        return;
+
+                --sp->unsync_children;
+                WARN_ON((int)sp->unsync_children < 0);
+                __clear_bit(idx, sp->unsync_child_bitmap);
+                level++;
+        } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
+}
+
+static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
+                               struct mmu_page_path *parents,
+                               struct kvm_mmu_pages *pvec)
+{
+        parents->parent[parent->role.level-1] = NULL;
+        pvec->nr = 0;
+}
+
+static void mmu_sync_children(struct kvm_vcpu *vcpu,
+                              struct kvm_mmu_page *parent)
+{
+        int i;
+        struct kvm_mmu_page *sp;
+        struct mmu_page_path parents;
+        struct kvm_mmu_pages pages;
+
+        kvm_mmu_pages_init(parent, &parents, &pages);
+        while (mmu_unsync_walk(parent, &pages)) {
+                int protected = 0;
 
-        while (mmu_unsync_walk(sp, &walker.walker))
+                for_each_sp(pages, sp, parents, i)
+                        protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
+
+                if (protected)
+                        kvm_flush_remote_tlbs(vcpu->kvm);
+
+                for_each_sp(pages, sp, parents, i) {
+                        kvm_sync_page(vcpu, sp);
+                        mmu_pages_clear_parents(&parents);
+                }
                 cond_resched_lock(&vcpu->kvm->mmu_lock);
+                kvm_mmu_pages_init(parent, &parents, &pages);
+        }
 }
 
 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
@@ -1129,7 +1244,8 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
         sp->role = role;
         hlist_add_head(&sp->hash_link, bucket);
         if (!metaphysical) {
-                rmap_write_protect(vcpu->kvm, gfn);
+                if (rmap_write_protect(vcpu->kvm, gfn))
+                        kvm_flush_remote_tlbs(vcpu->kvm);
                 account_shadowed(vcpu->kvm, gfn);
         }
         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
@@ -1153,6 +1269,8 @@ static int walk_shadow(struct kvm_shadow_walk *walker,
         if (level == PT32E_ROOT_LEVEL) {
                 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
                 shadow_addr &= PT64_BASE_ADDR_MASK;
+                if (!shadow_addr)
+                        return 1;
                 --level;
         }
 
@@ -1237,33 +1355,29 @@ static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
         }
 }
 
-struct zap_walker {
-        struct kvm_unsync_walk walker;
-        struct kvm *kvm;
-        int zapped;
-};
-
-static int mmu_zap_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
+static int mmu_zap_unsync_children(struct kvm *kvm,
+                                   struct kvm_mmu_page *parent)
 {
-        struct zap_walker *zap_walk = container_of(walk, struct zap_walker,
-                                                     walker);
-        kvm_mmu_zap_page(zap_walk->kvm, sp);
-        zap_walk->zapped = 1;
-        return 0;
-}
+        int i, zapped = 0;
+        struct mmu_page_path parents;
+        struct kvm_mmu_pages pages;
 
-static int mmu_zap_unsync_children(struct kvm *kvm, struct kvm_mmu_page *sp)
-{
-        struct zap_walker walker = {
-                .walker = { .entry = mmu_zap_fn, },
-                .kvm = kvm,
-                .zapped = 0,
-        };
-
-        if (sp->role.level == PT_PAGE_TABLE_LEVEL)
+        if (parent->role.level == PT_PAGE_TABLE_LEVEL)
                 return 0;
-        mmu_unsync_walk(sp, &walker.walker);
-        return walker.zapped;
+
+        kvm_mmu_pages_init(parent, &parents, &pages);
+        while (mmu_unsync_walk(parent, &pages)) {
+                struct kvm_mmu_page *sp;
+
+                for_each_sp(pages, sp, parents, i) {
+                        kvm_mmu_zap_page(kvm, sp);
+                        mmu_pages_clear_parents(&parents);
+                }
+                zapped += pages.nr;
+                kvm_mmu_pages_init(parent, &parents, &pages);
+        }
+
+        return zapped;
 }
 
 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
@@ -1362,7 +1476,7 @@ static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
         int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
         struct kvm_mmu_page *sp = page_header(__pa(pte));
 
-        __set_bit(slot, &sp->slot_bitmap);
+        __set_bit(slot, sp->slot_bitmap);
 }
 
 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
@@ -1393,6 +1507,110 @@ struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
         return page;
 }
 
+/*
+ * The function is based on mtrr_type_lookup() in
+ * arch/x86/kernel/cpu/mtrr/generic.c
+ */
+static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
+                         u64 start, u64 end)
+{
+        int i;
+        u64 base, mask;
+        u8 prev_match, curr_match;
+        int num_var_ranges = KVM_NR_VAR_MTRR;
+
+        if (!mtrr_state->enabled)
+                return 0xFF;
+
+        /* Make end inclusive end, instead of exclusive */
+        end--;
+
+        /* Look in fixed ranges. Just return the type as per start */
+        if (mtrr_state->have_fixed && (start < 0x100000)) {
+                int idx;
+
+                if (start < 0x80000) {
+                        idx = 0;
+                        idx += (start >> 16);
+                        return mtrr_state->fixed_ranges[idx];
+                } else if (start < 0xC0000) {
+                        idx = 1 * 8;
+                        idx += ((start - 0x80000) >> 14);
+                        return mtrr_state->fixed_ranges[idx];
+                } else if (start < 0x1000000) {
+                        idx = 3 * 8;
+                        idx += ((start - 0xC0000) >> 12);
+                        return mtrr_state->fixed_ranges[idx];
+                }
+        }
+
+        /*
+         * Look in variable ranges
+         * Look of multiple ranges matching this address and pick type
+         * as per MTRR precedence
+         */
+        if (!(mtrr_state->enabled & 2))
+                return mtrr_state->def_type;
+
+        prev_match = 0xFF;
+        for (i = 0; i < num_var_ranges; ++i) {
+                unsigned short start_state, end_state;
+
+                if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
+                        continue;
+
+                base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
+                       (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
+                mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
+                       (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
+
+                start_state = ((start & mask) == (base & mask));
+                end_state = ((end & mask) == (base & mask));
+                if (start_state != end_state)
+                        return 0xFE;
+
+                if ((start & mask) != (base & mask))
+                        continue;
+
+                curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
+                if (prev_match == 0xFF) {
+                        prev_match = curr_match;
+                        continue;
+                }
+
+                if (prev_match == MTRR_TYPE_UNCACHABLE ||
+                    curr_match == MTRR_TYPE_UNCACHABLE)
+                        return MTRR_TYPE_UNCACHABLE;
+
+                if ((prev_match == MTRR_TYPE_WRBACK &&
+                     curr_match == MTRR_TYPE_WRTHROUGH) ||
+                    (prev_match == MTRR_TYPE_WRTHROUGH &&
+                     curr_match == MTRR_TYPE_WRBACK)) {
+                        prev_match = MTRR_TYPE_WRTHROUGH;
+                        curr_match = MTRR_TYPE_WRTHROUGH;
+                }
+
+                if (prev_match != curr_match)
+                        return MTRR_TYPE_UNCACHABLE;
+        }
+
+        if (prev_match != 0xFF)
+                return prev_match;
+
+        return mtrr_state->def_type;
+}
+
+static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
+{
+        u8 mtrr;
+
+        mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
+                             (gfn << PAGE_SHIFT) + PAGE_SIZE);
+        if (mtrr == 0xfe || mtrr == 0xff)
+                mtrr = MTRR_TYPE_WRBACK;
+        return mtrr;
+}
+
 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
 {
         unsigned index;
@@ -1409,9 +1627,15 @@ static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
                 if (s->role.word != sp->role.word)
                         return 1;
         }
-        kvm_mmu_mark_parents_unsync(vcpu, sp);
         ++vcpu->kvm->stat.mmu_unsync;
         sp->unsync = 1;
+
+        if (sp->global) {
+                list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
+                ++vcpu->kvm->stat.mmu_unsync_global;
+        } else
+                kvm_mmu_mark_parents_unsync(vcpu, sp);
+
         mmu_convert_notrap(sp);
         return 0;
 }
@@ -1437,11 +1661,24 @@ static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
 static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                     unsigned pte_access, int user_fault,
                     int write_fault, int dirty, int largepage,
-                    gfn_t gfn, pfn_t pfn, bool speculative,
+                    int global, gfn_t gfn, pfn_t pfn, bool speculative,
                     bool can_unsync)
 {
         u64 spte;
         int ret = 0;
+        u64 mt_mask = shadow_mt_mask;
+        struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
+
+        if (!(vcpu->arch.cr4 & X86_CR4_PGE))
+                global = 0;
+        if (!global && sp->global) {
+                sp->global = 0;
+                if (sp->unsync) {
+                        kvm_unlink_unsync_global(vcpu->kvm, sp);
+                        kvm_mmu_mark_parents_unsync(vcpu, sp);
+                }
+        }
+
         /*
          * We don't set the accessed bit, since we sometimes want to see
          * whether the guest actually used the pte (in order to detect
@@ -1460,6 +1697,11 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                 spte |= shadow_user_mask;
         if (largepage)
                 spte |= PT_PAGE_SIZE_MASK;
+        if (mt_mask) {
+                mt_mask = get_memory_type(vcpu, gfn) <<
+                          kvm_x86_ops->get_mt_mask_shift();
+                spte |= mt_mask;
+        }
 
         spte |= (u64)pfn << PAGE_SHIFT;
 
@@ -1474,6 +1716,15 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
 
                 spte |= PT_WRITABLE_MASK;
 
+                /*
+                 * Optimization: for pte sync, if spte was writable the hash
+                 * lookup is unnecessary (and expensive). Write protection
+                 * is responsibility of mmu_get_page / kvm_sync_page.
+                 * Same reasoning can be applied to dirty page accounting.
+                 */
+                if (!can_unsync && is_writeble_pte(*shadow_pte))
+                        goto set_pte;
+
                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
                         pgprintk("%s: found shadow page for %lx, marking ro\n",
                                  __func__, gfn);
@@ -1495,8 +1746,8 @@ set_pte:
 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                          unsigned pt_access, unsigned pte_access,
                          int user_fault, int write_fault, int dirty,
-                         int *ptwrite, int largepage, gfn_t gfn,
-                         pfn_t pfn, bool speculative)
+                         int *ptwrite, int largepage, int global,
+                         gfn_t gfn, pfn_t pfn, bool speculative)
 {
         int was_rmapped = 0;
         int was_writeble = is_writeble_pte(*shadow_pte);
@@ -1529,7 +1780,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                 }
         }
         if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
-                      dirty, largepage, gfn, pfn, speculative, true)) {
+                      dirty, largepage, global, gfn, pfn, speculative, true)) {
                 if (write_fault)
                         *ptwrite = 1;
                 kvm_x86_ops->tlb_flush(vcpu);
@@ -1586,7 +1837,7 @@ static int direct_map_entry(struct kvm_shadow_walk *_walk,
             || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
                 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
                              0, walk->write, 1, &walk->pt_write,
-                             walk->largepage, gfn, walk->pfn, false);
+                             walk->largepage, 0, gfn, walk->pfn, false);
                 ++vcpu->stat.pf_fixed;
                 return 1;
         }
@@ -1773,6 +2024,15 @@ static void mmu_sync_roots(struct kvm_vcpu *vcpu)
         }
 }
 
+static void mmu_sync_global(struct kvm_vcpu *vcpu)
+{
+        struct kvm *kvm = vcpu->kvm;
+        struct kvm_mmu_page *sp, *n;
+
+        list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
+                kvm_sync_page(vcpu, sp);
+}
+
 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
 {
         spin_lock(&vcpu->kvm->mmu_lock);
@@ -1780,6 +2040,13 @@ void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
         spin_unlock(&vcpu->kvm->mmu_lock);
 }
 
+void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
+{
+        spin_lock(&vcpu->kvm->mmu_lock);
+        mmu_sync_global(vcpu);
+        spin_unlock(&vcpu->kvm->mmu_lock);
+}
+
 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
 {
         return vaddr;
@@ -2178,7 +2445,8 @@ static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
 }
 
 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
-                       const u8 *new, int bytes)
+                       const u8 *new, int bytes,
+                       bool guest_initiated)
 {
         gfn_t gfn = gpa >> PAGE_SHIFT;
         struct kvm_mmu_page *sp;
@@ -2204,15 +2472,17 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
         kvm_mmu_free_some_pages(vcpu);
         ++vcpu->kvm->stat.mmu_pte_write;
         kvm_mmu_audit(vcpu, "pre pte write");
-        if (gfn == vcpu->arch.last_pt_write_gfn
-            && !last_updated_pte_accessed(vcpu)) {
-                ++vcpu->arch.last_pt_write_count;
-                if (vcpu->arch.last_pt_write_count >= 3)
-                        flooded = 1;
-        } else {
-                vcpu->arch.last_pt_write_gfn = gfn;
-                vcpu->arch.last_pt_write_count = 1;
-                vcpu->arch.last_pte_updated = NULL;
+        if (guest_initiated) {
+                if (gfn == vcpu->arch.last_pt_write_gfn
+                    && !last_updated_pte_accessed(vcpu)) {
+                        ++vcpu->arch.last_pt_write_count;
+                        if (vcpu->arch.last_pt_write_count >= 3)
+                                flooded = 1;
+                } else {
+                        vcpu->arch.last_pt_write_gfn = gfn;
+                        vcpu->arch.last_pt_write_count = 1;
+                        vcpu->arch.last_pte_updated = NULL;
+                }
         }
         index = kvm_page_table_hashfn(gfn);
         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
@@ -2352,9 +2622,7 @@ EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
 
 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
 {
-        spin_lock(&vcpu->kvm->mmu_lock);
         vcpu->arch.mmu.invlpg(vcpu, gva);
-        spin_unlock(&vcpu->kvm->mmu_lock);
         kvm_mmu_flush_tlb(vcpu);
         ++vcpu->stat.invlpg;
 }
@@ -2451,7 +2719,7 @@ void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
                 int i;
                 u64 *pt;
 
-                if (!test_bit(slot, &sp->slot_bitmap))
+                if (!test_bit(slot, sp->slot_bitmap))
                         continue;
 
                 pt = sp->spt;
@@ -2860,8 +3128,8 @@ static void audit_write_protection(struct kvm_vcpu *vcpu)
                 if (sp->role.metaphysical)
                         continue;
 
-                slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
+                slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
                 rmapp = &slot->rmap[gfn - slot->base_gfn];
                 if (*rmapp)
                         printk(KERN_ERR "%s: (%s) shadow page has writable"
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 84eee43bbe74..9fd78b6e17ad 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -82,6 +82,7 @@ struct shadow_walker {
         int *ptwrite;
         pfn_t pfn;
         u64 *sptep;
+        gpa_t pte_gpa;
 };
 
 static gfn_t gpte_to_gfn(pt_element_t gpte)
@@ -222,7 +223,7 @@ walk:
                 if (ret)
                         goto walk;
                 pte |= PT_DIRTY_MASK;
-                kvm_mmu_pte_write(vcpu, pte_gpa, (u8 *)&pte, sizeof(pte));
+                kvm_mmu_pte_write(vcpu, pte_gpa, (u8 *)&pte, sizeof(pte), 0);
                 walker->ptes[walker->level - 1] = pte;
         }
 
@@ -274,7 +275,8 @@ static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
                 return;
         kvm_get_pfn(pfn);
         mmu_set_spte(vcpu, spte, page->role.access, pte_access, 0, 0,
-                     gpte & PT_DIRTY_MASK, NULL, largepage, gpte_to_gfn(gpte),
+                     gpte & PT_DIRTY_MASK, NULL, largepage,
+                     gpte & PT_GLOBAL_MASK, gpte_to_gfn(gpte),
                      pfn, true);
 }
 
@@ -301,8 +303,9 @@ static int FNAME(shadow_walk_entry)(struct kvm_shadow_walk *_sw,
                 mmu_set_spte(vcpu, sptep, access, gw->pte_access & access,
                              sw->user_fault, sw->write_fault,
                              gw->ptes[gw->level-1] & PT_DIRTY_MASK,
-                             sw->ptwrite, sw->largepage, gw->gfn, sw->pfn,
-                             false);
+                             sw->ptwrite, sw->largepage,
+                             gw->ptes[gw->level-1] & PT_GLOBAL_MASK,
+                             gw->gfn, sw->pfn, false);
                 sw->sptep = sptep;
                 return 1;
         }
@@ -466,10 +469,22 @@ static int FNAME(shadow_invlpg_entry)(struct kvm_shadow_walk *_sw,
                                       struct kvm_vcpu *vcpu, u64 addr,
                                       u64 *sptep, int level)
 {
+        struct shadow_walker *sw =
+                container_of(_sw, struct shadow_walker, walker);
 
-        if (level == PT_PAGE_TABLE_LEVEL) {
-                if (is_shadow_present_pte(*sptep))
+        /* FIXME: properly handle invlpg on large guest pages */
+        if (level == PT_PAGE_TABLE_LEVEL ||
+            ((level == PT_DIRECTORY_LEVEL) && is_large_pte(*sptep))) {
+                struct kvm_mmu_page *sp = page_header(__pa(sptep));
+
+                sw->pte_gpa = (sp->gfn << PAGE_SHIFT);
+                sw->pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t);
+
+                if (is_shadow_present_pte(*sptep)) {
                         rmap_remove(vcpu->kvm, sptep);
+                        if (is_large_pte(*sptep))
+                                --vcpu->kvm->stat.lpages;
+                }
                 set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
                 return 1;
         }
@@ -480,11 +495,26 @@ static int FNAME(shadow_invlpg_entry)(struct kvm_shadow_walk *_sw,
 
 static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
 {
+        pt_element_t gpte;
         struct shadow_walker walker = {
                 .walker = { .entry = FNAME(shadow_invlpg_entry), },
+                .pte_gpa = -1,
         };
 
+        spin_lock(&vcpu->kvm->mmu_lock);
         walk_shadow(&walker.walker, vcpu, gva);
+        spin_unlock(&vcpu->kvm->mmu_lock);
+        if (walker.pte_gpa == -1)
+                return;
+        if (kvm_read_guest_atomic(vcpu->kvm, walker.pte_gpa, &gpte,
+                                  sizeof(pt_element_t)))
+                return;
+        if (is_present_pte(gpte) && (gpte & PT_ACCESSED_MASK)) {
+                if (mmu_topup_memory_caches(vcpu))
+                        return;
+                kvm_mmu_pte_write(vcpu, walker.pte_gpa, (const u8 *)&gpte,
+                                  sizeof(pt_element_t), 0);
+        }
 }
 
 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
@@ -580,7 +610,7 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
                 nr_present++;
                 pte_access = sp->role.access & FNAME(gpte_access)(vcpu, gpte);
                 set_spte(vcpu, &sp->spt[i], pte_access, 0, 0,
-                         is_dirty_pte(gpte), 0, gfn,
+                         is_dirty_pte(gpte), 0, gpte & PT_GLOBAL_MASK, gfn,
                          spte_to_pfn(sp->spt[i]), true, false);
         }
 
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 9c4ce657d963..1452851ae258 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -28,6 +28,8 @@
 
 #include <asm/desc.h>
 
+#include <asm/virtext.h>
+
 #define __ex(x) __kvm_handle_fault_on_reboot(x)
 
 MODULE_AUTHOR("Qumranet");
@@ -245,34 +247,19 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 
 static int has_svm(void)
 {
-        uint32_t eax, ebx, ecx, edx;
-
-        if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
-                printk(KERN_INFO "has_svm: not amd\n");
-                return 0;
-        }
+        const char *msg;
 
-        cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
-        if (eax < SVM_CPUID_FUNC) {
-                printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
+        if (!cpu_has_svm(&msg)) {
+                printk(KERN_INFO "has_svn: %s\n", msg);
                 return 0;
         }
 
-        cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
-        if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
-                printk(KERN_DEBUG "has_svm: svm not available\n");
-                return 0;
-        }
         return 1;
 }
 
 static void svm_hardware_disable(void *garbage)
 {
-        uint64_t efer;
-
-        wrmsrl(MSR_VM_HSAVE_PA, 0);
-        rdmsrl(MSR_EFER, efer);
-        wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
+        cpu_svm_disable();
 }
 
 static void svm_hardware_enable(void *garbage)
@@ -772,6 +759,22 @@ static void svm_get_segment(struct kvm_vcpu *vcpu,
         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
+
+        /*
+         * SVM always stores 0 for the 'G' bit in the CS selector in
+         * the VMCB on a VMEXIT. This hurts cross-vendor migration:
+         * Intel's VMENTRY has a check on the 'G' bit.
+         */
+        if (seg == VCPU_SREG_CS)
+                var->g = s->limit > 0xfffff;
+
+        /*
+         * Work around a bug where the busy flag in the tr selector
+         * isn't exposed
+         */
+        if (seg == VCPU_SREG_TR)
+                var->type |= 0x2;
+
         var->unusable = !var->present;
 }
 
@@ -1099,6 +1102,7 @@ static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         rep = (io_info & SVM_IOIO_REP_MASK) != 0;
         down = (svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
 
+        skip_emulated_instruction(&svm->vcpu);
         return kvm_emulate_pio(&svm->vcpu, kvm_run, in, size, port);
 }
 
@@ -1912,6 +1916,11 @@ static int get_npt_level(void)
 #endif
 }
 
+static int svm_get_mt_mask_shift(void)
+{
+        return 0;
+}
+
 static struct kvm_x86_ops svm_x86_ops = {
         .cpu_has_kvm_support = has_svm,
         .disabled_by_bios = is_disabled,
@@ -1967,6 +1976,7 @@ static struct kvm_x86_ops svm_x86_ops = {
 
         .set_tss_addr = svm_set_tss_addr,
         .get_tdp_level = get_npt_level,
+        .get_mt_mask_shift = svm_get_mt_mask_shift,
 };
 
 static int __init svm_init(void)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a4018b01e1f9..6259d7467648 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -16,7 +16,6 @@
  */
 
 #include "irq.h"
-#include "vmx.h"
 #include "mmu.h"
 
 #include <linux/kvm_host.h>
@@ -31,6 +30,8 @@
 
 #include <asm/io.h>
 #include <asm/desc.h>
+#include <asm/vmx.h>
+#include <asm/virtext.h>
 
 #define __ex(x) __kvm_handle_fault_on_reboot(x)
 
@@ -90,6 +91,11 @@ struct vcpu_vmx {
         } rmode;
         int vpid;
         bool emulation_required;
+
+        /* Support for vnmi-less CPUs */
+        int soft_vnmi_blocked;
+        ktime_t entry_time;
+        s64 vnmi_blocked_time;
 };
 
 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
@@ -122,7 +128,7 @@ static struct vmcs_config {
         u32 vmentry_ctrl;
 } vmcs_config;
 
-struct vmx_capability {
+static struct vmx_capability {
         u32 ept;
         u32 vpid;
 } vmx_capability;
@@ -957,6 +963,13 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: 0x%x data 0x%llx\n", msr_index, data);
 
                 break;
+        case MSR_IA32_CR_PAT:
+                if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
+                        vmcs_write64(GUEST_IA32_PAT, data);
+                        vcpu->arch.pat = data;
+                        break;
+                }
+                /* Otherwise falls through to kvm_set_msr_common */
         default:
                 vmx_load_host_state(vmx);
                 msr = find_msr_entry(vmx, msr_index);
@@ -1032,8 +1045,7 @@ static int vmx_get_irq(struct kvm_vcpu *vcpu)
 
 static __init int cpu_has_kvm_support(void)
 {
-        unsigned long ecx = cpuid_ecx(1);
-        return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
+        return cpu_has_vmx();
 }
 
 static __init int vmx_disabled_by_bios(void)
@@ -1079,13 +1091,22 @@ static void vmclear_local_vcpus(void)
                 __vcpu_clear(vmx);
 }
 
-static void hardware_disable(void *garbage)
+
+/* Just like cpu_vmxoff(), but with the __kvm_handle_fault_on_reboot()
+ * tricks.
+ */
+static void kvm_cpu_vmxoff(void)
 {
-        vmclear_local_vcpus();
         asm volatile (__ex(ASM_VMX_VMXOFF) : : : "cc");
         write_cr4(read_cr4() & ~X86_CR4_VMXE);
 }
 
+static void hardware_disable(void *garbage)
+{
+        vmclear_local_vcpus();
+        kvm_cpu_vmxoff();
+}
+
 static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
                                       u32 msr, u32 *result)
 {
@@ -1176,12 +1197,13 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
 #ifdef CONFIG_X86_64
         min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
 #endif
-        opt = 0;
+        opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT;
         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
                                 &_vmexit_control) < 0)
                 return -EIO;
 
-        min = opt = 0;
+        min = 0;
+        opt = VM_ENTRY_LOAD_IA32_PAT;
         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
                                 &_vmentry_control) < 0)
                 return -EIO;
@@ -2087,8 +2109,9 @@ static void vmx_disable_intercept_for_msr(struct page *msr_bitmap, u32 msr)
  */
 static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
 {
-        u32 host_sysenter_cs;
+        u32 host_sysenter_cs, msr_low, msr_high;
         u32 junk;
+        u64 host_pat;
         unsigned long a;
         struct descriptor_table dt;
         int i;
@@ -2176,6 +2199,20 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
 
+        if (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PAT) {
+                rdmsr(MSR_IA32_CR_PAT, msr_low, msr_high);
+                host_pat = msr_low | ((u64) msr_high << 32);
+                vmcs_write64(HOST_IA32_PAT, host_pat);
+        }
+        if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
+                rdmsr(MSR_IA32_CR_PAT, msr_low, msr_high);
+                host_pat = msr_low | ((u64) msr_high << 32);
+                /* Write the default value follow host pat */
+                vmcs_write64(GUEST_IA32_PAT, host_pat);
+                /* Keep arch.pat sync with GUEST_IA32_PAT */
+                vmx->vcpu.arch.pat = host_pat;
+        }
+
         for (i = 0; i < NR_VMX_MSR; ++i) {
                 u32 index = vmx_msr_index[i];
                 u32 data_low, data_high;
@@ -2230,6 +2267,8 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
 
         vmx->vcpu.arch.rmode.active = 0;
 
+        vmx->soft_vnmi_blocked = 0;
+
         vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
         kvm_set_cr8(&vmx->vcpu, 0);
         msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
@@ -2335,6 +2374,29 @@ out:
         return ret;
 }
 
+static void enable_irq_window(struct kvm_vcpu *vcpu)
+{
+        u32 cpu_based_vm_exec_control;
+
+        cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
+        cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
+        vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
+}
+
+static void enable_nmi_window(struct kvm_vcpu *vcpu)
+{
+        u32 cpu_based_vm_exec_control;
+
+        if (!cpu_has_virtual_nmis()) {
+                enable_irq_window(vcpu);
+                return;
+        }
+
+        cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
+        cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_NMI_PENDING;
+        vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
+}
+
 static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
@@ -2358,10 +2420,54 @@ static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
 
 static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
 {
+        struct vcpu_vmx *vmx = to_vmx(vcpu);
+
+        if (!cpu_has_virtual_nmis()) {
+                /*
+                 * Tracking the NMI-blocked state in software is built upon
+                 * finding the next open IRQ window. This, in turn, depends on
+                 * well-behaving guests: They have to keep IRQs disabled at
+                 * least as long as the NMI handler runs. Otherwise we may
+                 * cause NMI nesting, maybe breaking the guest. But as this is
+                 * highly unlikely, we can live with the residual risk.
+                 */
+                vmx->soft_vnmi_blocked = 1;
+                vmx->vnmi_blocked_time = 0;
+        }
+
+        ++vcpu->stat.nmi_injections;
+        if (vcpu->arch.rmode.active) {
+                vmx->rmode.irq.pending = true;
+                vmx->rmode.irq.vector = NMI_VECTOR;
+                vmx->rmode.irq.rip = kvm_rip_read(vcpu);
+                vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
+                             NMI_VECTOR | INTR_TYPE_SOFT_INTR |
+                             INTR_INFO_VALID_MASK);
+                vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
+                kvm_rip_write(vcpu, vmx->rmode.irq.rip - 1);
+                return;
+        }
         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
                         INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR);
 }
 
+static void vmx_update_window_states(struct kvm_vcpu *vcpu)
+{
+        u32 guest_intr = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
+
+        vcpu->arch.nmi_window_open =
+                !(guest_intr & (GUEST_INTR_STATE_STI |
+                                GUEST_INTR_STATE_MOV_SS |
+                                GUEST_INTR_STATE_NMI));
+        if (!cpu_has_virtual_nmis() && to_vmx(vcpu)->soft_vnmi_blocked)
+                vcpu->arch.nmi_window_open = 0;
+
+        vcpu->arch.interrupt_window_open =
+                ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
+                 !(guest_intr & (GUEST_INTR_STATE_STI |
+                                 GUEST_INTR_STATE_MOV_SS)));
+}
+
 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
 {
         int word_index = __ffs(vcpu->arch.irq_summary);
@@ -2374,40 +2480,49 @@ static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
         kvm_queue_interrupt(vcpu, irq);
 }
 
-
 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
                                        struct kvm_run *kvm_run)
 {
-        u32 cpu_based_vm_exec_control;
-
-        vcpu->arch.interrupt_window_open =
-                ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
-                 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
+        vmx_update_window_states(vcpu);
 
-        if (vcpu->arch.interrupt_window_open &&
-            vcpu->arch.irq_summary && !vcpu->arch.interrupt.pending)
-                kvm_do_inject_irq(vcpu);
+        if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
+                if (vcpu->arch.interrupt.pending) {
+                        enable_nmi_window(vcpu);
+                } else if (vcpu->arch.nmi_window_open) {
+                        vcpu->arch.nmi_pending = false;
+                        vcpu->arch.nmi_injected = true;
+                } else {
+                        enable_nmi_window(vcpu);
+                        return;
+                }
+        }
+        if (vcpu->arch.nmi_injected) {
+                vmx_inject_nmi(vcpu);
+                if (vcpu->arch.nmi_pending)
+                        enable_nmi_window(vcpu);
+                else if (vcpu->arch.irq_summary
+                         || kvm_run->request_interrupt_window)
+                        enable_irq_window(vcpu);
+                return;
+        }
 
-        if (vcpu->arch.interrupt_window_open && vcpu->arch.interrupt.pending)
-                vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr);
+        if (vcpu->arch.interrupt_window_open) {
+                if (vcpu->arch.irq_summary && !vcpu->arch.interrupt.pending)
+                        kvm_do_inject_irq(vcpu);
 
-        cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
+                if (vcpu->arch.interrupt.pending)
+                        vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr);
+        }
         if (!vcpu->arch.interrupt_window_open &&
             (vcpu->arch.irq_summary || kvm_run->request_interrupt_window))
-                /*
-                 * Interrupts blocked.  Wait for unblock.
-                 */
-                cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
-        else
-                cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
-        vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
+                enable_irq_window(vcpu);
 }
 
 static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
 {
         int ret;
         struct kvm_userspace_memory_region tss_mem = {
-                .slot = 8,
+                .slot = TSS_PRIVATE_MEMSLOT,
                 .guest_phys_addr = addr,
                 .memory_size = PAGE_SIZE * 3,
                 .flags = 0,
@@ -2492,7 +2607,7 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 set_bit(irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
         }
 
-        if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
+        if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR)
                 return 1;  /* already handled by vmx_vcpu_run() */
 
         if (is_no_device(intr_info)) {
@@ -2581,6 +2696,7 @@ static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         rep = (exit_qualification & 32) != 0;
         port = exit_qualification >> 16;
 
+        skip_emulated_instruction(vcpu);
         return kvm_emulate_pio(vcpu, kvm_run, in, size, port);
 }
 
@@ -2767,6 +2883,7 @@ static int handle_interrupt_window(struct kvm_vcpu *vcpu,
         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
 
         KVMTRACE_0D(PEND_INTR, vcpu, handler);
+        ++vcpu->stat.irq_window_exits;
 
         /*
          * If the user space waits to inject interrupts, exit as soon as
@@ -2775,7 +2892,6 @@ static int handle_interrupt_window(struct kvm_vcpu *vcpu,
         if (kvm_run->request_interrupt_window &&
             !vcpu->arch.irq_summary) {
                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
-                ++vcpu->stat.irq_window_exits;
                 return 0;
         }
         return 1;
@@ -2832,6 +2948,7 @@ static int handle_apic_access(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
 static int handle_task_switch(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
+        struct vcpu_vmx *vmx = to_vmx(vcpu);
         unsigned long exit_qualification;
         u16 tss_selector;
         int reason;
@@ -2839,6 +2956,15 @@ static int handle_task_switch(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
 
         reason = (u32)exit_qualification >> 30;
+        if (reason == TASK_SWITCH_GATE && vmx->vcpu.arch.nmi_injected &&
+            (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) &&
+            (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK)
+            == INTR_TYPE_NMI_INTR) {
+                vcpu->arch.nmi_injected = false;
+                if (cpu_has_virtual_nmis())
+                        vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
+                                      GUEST_INTR_STATE_NMI);
+        }
         tss_selector = exit_qualification;
 
         return kvm_task_switch(vcpu, tss_selector, reason);
@@ -2927,16 +3053,12 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
         while (!guest_state_valid(vcpu)) {
                 err = emulate_instruction(vcpu, kvm_run, 0, 0, 0);
 
-                switch (err) {
-                        case EMULATE_DONE:
-                                break;
-                        case EMULATE_DO_MMIO:
-                                kvm_report_emulation_failure(vcpu, "mmio");
-                                /* TODO: Handle MMIO */
-                                return;
-                        default:
-                                kvm_report_emulation_failure(vcpu, "emulation failure");
-                                return;
+                if (err == EMULATE_DO_MMIO)
+                        break;
+
+                if (err != EMULATE_DONE) {
+                        kvm_report_emulation_failure(vcpu, "emulation failure");
+                        return;
                 }
 
                 if (signal_pending(current))
@@ -2948,8 +3070,10 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
         local_irq_disable();
         preempt_disable();
 
-        /* Guest state should be valid now, no more emulation should be needed */
-        vmx->emulation_required = 0;
+        /* Guest state should be valid now except if we need to
+         * emulate an MMIO */
+        if (guest_state_valid(vcpu))
+                vmx->emulation_required = 0;
 }
 
 /*
@@ -2996,6 +3120,11 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
         KVMTRACE_3D(VMEXIT, vcpu, exit_reason, (u32)kvm_rip_read(vcpu),
                     (u32)((u64)kvm_rip_read(vcpu) >> 32), entryexit);
 
+        /* If we need to emulate an MMIO from handle_invalid_guest_state
+         * we just return 0 */
+        if (vmx->emulation_required && emulate_invalid_guest_state)
+                return 0;
+
         /* Access CR3 don't cause VMExit in paging mode, so we need
          * to sync with guest real CR3. */
         if (vm_need_ept() && is_paging(vcpu)) {
@@ -3012,9 +3141,32 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 
         if ((vectoring_info & VECTORING_INFO_VALID_MASK) &&
                         (exit_reason != EXIT_REASON_EXCEPTION_NMI &&
-                        exit_reason != EXIT_REASON_EPT_VIOLATION))
-                printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
-                       "exit reason is 0x%x\n", __func__, exit_reason);
+                        exit_reason != EXIT_REASON_EPT_VIOLATION &&
+                        exit_reason != EXIT_REASON_TASK_SWITCH))
+                printk(KERN_WARNING "%s: unexpected, valid vectoring info "
+                       "(0x%x) and exit reason is 0x%x\n",
+                       __func__, vectoring_info, exit_reason);
+
+        if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked)) {
+                if (vcpu->arch.interrupt_window_open) {
+                        vmx->soft_vnmi_blocked = 0;
+                        vcpu->arch.nmi_window_open = 1;
+                } else if (vmx->vnmi_blocked_time > 1000000000LL &&
+                           vcpu->arch.nmi_pending) {
+                        /*
+                         * This CPU don't support us in finding the end of an
+                         * NMI-blocked window if the guest runs with IRQs
+                         * disabled. So we pull the trigger after 1 s of
+                         * futile waiting, but inform the user about this.
+                         */
+                        printk(KERN_WARNING "%s: Breaking out of NMI-blocked "
+                               "state on VCPU %d after 1 s timeout\n",
+                               __func__, vcpu->vcpu_id);
+                        vmx->soft_vnmi_blocked = 0;
+                        vmx->vcpu.arch.nmi_window_open = 1;
+                }
+        }
+
         if (exit_reason < kvm_vmx_max_exit_handlers
             && kvm_vmx_exit_handlers[exit_reason])
                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
@@ -3042,51 +3194,6 @@ static void update_tpr_threshold(struct kvm_vcpu *vcpu)
         vmcs_write32(TPR_THRESHOLD, (max_irr > tpr) ? tpr >> 4 : max_irr >> 4);
 }
 
-static void enable_irq_window(struct kvm_vcpu *vcpu)
-{
-        u32 cpu_based_vm_exec_control;
-
-        cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
-        cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
-        vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
-}
-
-static void enable_nmi_window(struct kvm_vcpu *vcpu)
-{
-        u32 cpu_based_vm_exec_control;
-
-        if (!cpu_has_virtual_nmis())
-                return;
-
-        cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
-        cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_NMI_PENDING;
-        vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
-}
-
-static int vmx_nmi_enabled(struct kvm_vcpu *vcpu)
-{
-        u32 guest_intr = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
-        return !(guest_intr & (GUEST_INTR_STATE_NMI |
-                               GUEST_INTR_STATE_MOV_SS |
-                               GUEST_INTR_STATE_STI));
-}
-
-static int vmx_irq_enabled(struct kvm_vcpu *vcpu)
-{
-        u32 guest_intr = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
-        return (!(guest_intr & (GUEST_INTR_STATE_MOV_SS |
-                               GUEST_INTR_STATE_STI)) &&
-                (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
-}
-
-static void enable_intr_window(struct kvm_vcpu *vcpu)
-{
-        if (vcpu->arch.nmi_pending)
-                enable_nmi_window(vcpu);
-        else if (kvm_cpu_has_interrupt(vcpu))
-                enable_irq_window(vcpu);
-}
-
 static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
 {
         u32 exit_intr_info;
@@ -3109,7 +3216,9 @@ static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
                 if (unblock_nmi && vector != DF_VECTOR)
                         vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
                                       GUEST_INTR_STATE_NMI);
-        }
+        } else if (unlikely(vmx->soft_vnmi_blocked))
+                vmx->vnmi_blocked_time +=
+                        ktime_to_ns(ktime_sub(ktime_get(), vmx->entry_time));
 
         idt_vectoring_info = vmx->idt_vectoring_info;
         idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK;
@@ -3147,26 +3256,29 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
 {
         update_tpr_threshold(vcpu);
 
-        if (cpu_has_virtual_nmis()) {
-                if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
-                        if (vcpu->arch.interrupt.pending) {
-                                enable_nmi_window(vcpu);
-                        } else if (vmx_nmi_enabled(vcpu)) {
-                                vcpu->arch.nmi_pending = false;
-                                vcpu->arch.nmi_injected = true;
-                        } else {
-                                enable_intr_window(vcpu);
-                                return;
-                        }
-                }
-                if (vcpu->arch.nmi_injected) {
-                        vmx_inject_nmi(vcpu);
-                        enable_intr_window(vcpu);
+        vmx_update_window_states(vcpu);
+
+        if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
+                if (vcpu->arch.interrupt.pending) {
+                        enable_nmi_window(vcpu);
+                } else if (vcpu->arch.nmi_window_open) {
+                        vcpu->arch.nmi_pending = false;
+                        vcpu->arch.nmi_injected = true;
+                } else {
+                        enable_nmi_window(vcpu);
                         return;
                 }
         }
+        if (vcpu->arch.nmi_injected) {
+                vmx_inject_nmi(vcpu);
+                if (vcpu->arch.nmi_pending)
+                        enable_nmi_window(vcpu);
+                else if (kvm_cpu_has_interrupt(vcpu))
+                        enable_irq_window(vcpu);
+                return;
+        }
         if (!vcpu->arch.interrupt.pending && kvm_cpu_has_interrupt(vcpu)) {
-                if (vmx_irq_enabled(vcpu))
+                if (vcpu->arch.interrupt_window_open)
                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu));
                 else
                         enable_irq_window(vcpu);
@@ -3174,6 +3286,8 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
         if (vcpu->arch.interrupt.pending) {
                 vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr);
                 kvm_timer_intr_post(vcpu, vcpu->arch.interrupt.nr);
+                if (kvm_cpu_has_interrupt(vcpu))
+                        enable_irq_window(vcpu);
         }
 }
 
@@ -3213,6 +3327,10 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         struct vcpu_vmx *vmx = to_vmx(vcpu);
         u32 intr_info;
 
+        /* Record the guest's net vcpu time for enforced NMI injections. */
+        if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked))
+                vmx->entry_time = ktime_get();
+
         /* Handle invalid guest state instead of entering VMX */
         if (vmx->emulation_required && emulate_invalid_guest_state) {
                 handle_invalid_guest_state(vcpu, kvm_run);
@@ -3327,9 +3445,7 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         if (vmx->rmode.irq.pending)
                 fixup_rmode_irq(vmx);
 
-        vcpu->arch.interrupt_window_open =
-                (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
-                 (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS)) == 0;
+        vmx_update_window_states(vcpu);
 
         asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
         vmx->launched = 1;
@@ -3337,7 +3453,7 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
 
         /* We need to handle NMIs before interrupts are enabled */
-        if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200 &&
+        if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR &&
             (intr_info & INTR_INFO_VALID_MASK)) {
                 KVMTRACE_0D(NMI, vcpu, handler);
                 asm("int $2");
@@ -3455,6 +3571,11 @@ static int get_ept_level(void)
         return VMX_EPT_DEFAULT_GAW + 1;
 }
 
+static int vmx_get_mt_mask_shift(void)
+{
+        return VMX_EPT_MT_EPTE_SHIFT;
+}
+
 static struct kvm_x86_ops vmx_x86_ops = {
         .cpu_has_kvm_support = cpu_has_kvm_support,
         .disabled_by_bios = vmx_disabled_by_bios,
@@ -3510,6 +3631,7 @@ static struct kvm_x86_ops vmx_x86_ops = {
 
         .set_tss_addr = vmx_set_tss_addr,
         .get_tdp_level = get_ept_level,
+        .get_mt_mask_shift = vmx_get_mt_mask_shift,
 };
 
 static int __init vmx_init(void)
@@ -3566,10 +3688,10 @@ static int __init vmx_init(void)
                 bypass_guest_pf = 0;
                 kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK |
                         VMX_EPT_WRITABLE_MASK |
-                        VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT |
                         VMX_EPT_IGMT_BIT);
                 kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull,
-                                VMX_EPT_EXECUTABLE_MASK);
+                                VMX_EPT_EXECUTABLE_MASK,
+                                VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT);
                 kvm_enable_tdp();
         } else
                 kvm_disable_tdp();
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index f1f8ff2f1fa2..cc17546a2406 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -34,11 +34,13 @@
 #include <linux/module.h>
 #include <linux/mman.h>
 #include <linux/highmem.h>
+#include <linux/iommu.h>
 #include <linux/intel-iommu.h>
 
 #include <asm/uaccess.h>
 #include <asm/msr.h>
 #include <asm/desc.h>
+#include <asm/mtrr.h>
 
 #define MAX_IO_MSRS 256
 #define CR0_RESERVED_BITS                                               \
@@ -86,6 +88,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
         { "hypercalls", VCPU_STAT(hypercalls) },
         { "request_irq", VCPU_STAT(request_irq_exits) },
+        { "request_nmi", VCPU_STAT(request_nmi_exits) },
         { "irq_exits", VCPU_STAT(irq_exits) },
         { "host_state_reload", VCPU_STAT(host_state_reload) },
         { "efer_reload", VCPU_STAT(efer_reload) },
@@ -93,6 +96,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
         { "insn_emulation", VCPU_STAT(insn_emulation) },
         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
         { "irq_injections", VCPU_STAT(irq_injections) },
+        { "nmi_injections", VCPU_STAT(nmi_injections) },
         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
@@ -101,6 +105,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
         { "mmu_recycled", VM_STAT(mmu_recycled) },
         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
         { "mmu_unsync", VM_STAT(mmu_unsync) },
+        { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
         { "largepages", VM_STAT(lpages) },
         { NULL }
@@ -312,6 +317,7 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
         kvm_x86_ops->set_cr0(vcpu, cr0);
         vcpu->arch.cr0 = cr0;
 
+        kvm_mmu_sync_global(vcpu);
         kvm_mmu_reset_context(vcpu);
         return;
 }
@@ -355,6 +361,7 @@ void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
         }
         kvm_x86_ops->set_cr4(vcpu, cr4);
         vcpu->arch.cr4 = cr4;
+        kvm_mmu_sync_global(vcpu);
         kvm_mmu_reset_context(vcpu);
 }
 EXPORT_SYMBOL_GPL(kvm_set_cr4);
@@ -449,7 +456,7 @@ static u32 msrs_to_save[] = {
         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 #endif
         MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
-        MSR_IA32_PERF_STATUS,
+        MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT
 };
 
 static unsigned num_msrs_to_save;
@@ -648,10 +655,38 @@ static bool msr_mtrr_valid(unsigned msr)
 
 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 {
+        u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
+
         if (!msr_mtrr_valid(msr))
                 return 1;
 
-        vcpu->arch.mtrr[msr - 0x200] = data;
+        if (msr == MSR_MTRRdefType) {
+                vcpu->arch.mtrr_state.def_type = data;
+                vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
+        } else if (msr == MSR_MTRRfix64K_00000)
+                p[0] = data;
+        else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
+                p[1 + msr - MSR_MTRRfix16K_80000] = data;
+        else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
+                p[3 + msr - MSR_MTRRfix4K_C0000] = data;
+        else if (msr == MSR_IA32_CR_PAT)
+                vcpu->arch.pat = data;
+        else {  /* Variable MTRRs */
+                int idx, is_mtrr_mask;
+                u64 *pt;
+
+                idx = (msr - 0x200) / 2;
+                is_mtrr_mask = msr - 0x200 - 2 * idx;
+                if (!is_mtrr_mask)
+                        pt =
+                          (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
+                else
+                        pt =
+                          (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
+                *pt = data;
+        }
+
+        kvm_mmu_reset_context(vcpu);
         return 0;
 }
 
@@ -747,10 +782,37 @@ int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 
 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 {
+        u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
+
         if (!msr_mtrr_valid(msr))
                 return 1;
 
-        *pdata = vcpu->arch.mtrr[msr - 0x200];
+        if (msr == MSR_MTRRdefType)
+                *pdata = vcpu->arch.mtrr_state.def_type +
+                         (vcpu->arch.mtrr_state.enabled << 10);
+        else if (msr == MSR_MTRRfix64K_00000)
+                *pdata = p[0];
+        else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
+                *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
+        else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
+                *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
+        else if (msr == MSR_IA32_CR_PAT)
+                *pdata = vcpu->arch.pat;
+        else {  /* Variable MTRRs */
+                int idx, is_mtrr_mask;
+                u64 *pt;
+
+                idx = (msr - 0x200) / 2;
+                is_mtrr_mask = msr - 0x200 - 2 * idx;
+                if (!is_mtrr_mask)
+                        pt =
+                          (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
+                else
+                        pt =
+                          (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
+                *pdata = *pt;
+        }
+
         return 0;
 }
 
@@ -903,7 +965,6 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_IRQCHIP:
         case KVM_CAP_HLT:
         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
-        case KVM_CAP_USER_MEMORY:
         case KVM_CAP_SET_TSS_ADDR:
         case KVM_CAP_EXT_CPUID:
         case KVM_CAP_CLOCKSOURCE:
@@ -929,7 +990,7 @@ int kvm_dev_ioctl_check_extension(long ext)
                 r = !tdp_enabled;
                 break;
         case KVM_CAP_IOMMU:
-                r = intel_iommu_found();
+                r = iommu_found();
                 break;
         default:
                 r = 0;
@@ -1188,6 +1249,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
                 int t, times = entry->eax & 0xff;
 
                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
+                entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
                 for (t = 1; t < times && *nent < maxnent; ++t) {
                         do_cpuid_1_ent(&entry[t], function, 0);
                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
@@ -1218,7 +1280,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
                 /* read more entries until level_type is zero */
                 for (i = 1; *nent < maxnent; ++i) {
-                        level_type = entry[i - 1].ecx & 0xff;
+                        level_type = entry[i - 1].ecx & 0xff00;
                         if (!level_type)
                                 break;
                         do_cpuid_1_ent(&entry[i], function, i);
@@ -1318,6 +1380,15 @@ static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
         return 0;
 }
 
+static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
+{
+        vcpu_load(vcpu);
+        kvm_inject_nmi(vcpu);
+        vcpu_put(vcpu);
+
+        return 0;
+}
+
 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
                                            struct kvm_tpr_access_ctl *tac)
 {
@@ -1377,6 +1448,13 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
                 r = 0;
                 break;
         }
+        case KVM_NMI: {
+                r = kvm_vcpu_ioctl_nmi(vcpu);
+                if (r)
+                        goto out;
+                r = 0;
+                break;
+        }
         case KVM_SET_CPUID: {
                 struct kvm_cpuid __user *cpuid_arg = argp;
                 struct kvm_cpuid cpuid;
@@ -1968,7 +2046,7 @@ int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
         if (ret < 0)
                 return 0;
-        kvm_mmu_pte_write(vcpu, gpa, val, bytes);
+        kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
         return 1;
 }
 
@@ -2404,8 +2482,6 @@ int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
         memcpy(vcpu->arch.pio_data, &val, 4);
 
-        kvm_x86_ops->skip_emulated_instruction(vcpu);
-
         pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
         if (pio_dev) {
                 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
@@ -2541,7 +2617,7 @@ int kvm_arch_init(void *opaque)
         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
-                        PT_DIRTY_MASK, PT64_NX_MASK, 0);
+                        PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
         return 0;
 
 out:
@@ -2729,7 +2805,7 @@ static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
 
         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
         /* when no next entry is found, the current entry[i] is reselected */
-        for (j = i + 1; j == i; j = (j + 1) % nent) {
+        for (j = i + 1; ; j = (j + 1) % nent) {
                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
                 if (ej->function == e->function) {
                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
@@ -2973,7 +3049,7 @@ static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 pr_debug("vcpu %d received sipi with vector # %x\n",
                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
                 kvm_lapic_reset(vcpu);
-                r = kvm_x86_ops->vcpu_reset(vcpu);
+                r = kvm_arch_vcpu_reset(vcpu);
                 if (r)
                         return r;
                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
@@ -3275,9 +3351,9 @@ static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
         kvm_desct->padding = 0;
 }
 
-static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
-                                           u16 selector,
-                                           struct descriptor_table *dtable)
+static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
+                                          u16 selector,
+                                          struct descriptor_table *dtable)
 {
         if (selector & 1 << 2) {
                 struct kvm_segment kvm_seg;
@@ -3302,7 +3378,7 @@ static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
         struct descriptor_table dtable;
         u16 index = selector >> 3;
 
-        get_segment_descritptor_dtable(vcpu, selector, &dtable);
+        get_segment_descriptor_dtable(vcpu, selector, &dtable);
 
         if (dtable.limit < index * 8 + 7) {
                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
@@ -3321,7 +3397,7 @@ static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
         struct descriptor_table dtable;
         u16 index = selector >> 3;
 
-        get_segment_descritptor_dtable(vcpu, selector, &dtable);
+        get_segment_descriptor_dtable(vcpu, selector, &dtable);
 
         if (dtable.limit < index * 8 + 7)
                 return 1;
@@ -3900,6 +3976,7 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
         /* We do fxsave: this must be aligned. */
         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
 
+        vcpu->arch.mtrr_state.have_fixed = 1;
         vcpu_load(vcpu);
         r = kvm_arch_vcpu_reset(vcpu);
         if (r == 0)
@@ -3925,6 +4002,9 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
 
 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
 {
+        vcpu->arch.nmi_pending = false;
+        vcpu->arch.nmi_injected = false;
+
         return kvm_x86_ops->vcpu_reset(vcpu);
 }
 
@@ -4012,6 +4092,7 @@ struct  kvm *kvm_arch_create_vm(void)
                 return ERR_PTR(-ENOMEM);
 
         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
+        INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
 
         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
@@ -4048,8 +4129,8 @@ static void kvm_free_vcpus(struct kvm *kvm)
 
 void kvm_arch_destroy_vm(struct kvm *kvm)
 {
-        kvm_iommu_unmap_guest(kvm);
         kvm_free_all_assigned_devices(kvm);
+        kvm_iommu_unmap_guest(kvm);
         kvm_free_pit(kvm);
         kfree(kvm->arch.vpic);
         kfree(kvm->arch.vioapic);
@@ -4127,7 +4208,8 @@ void kvm_arch_flush_shadow(struct kvm *kvm)
 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
 {
         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
-               || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
+               || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
+               || vcpu->arch.nmi_pending;
 }
 
 static void vcpu_kick_intr(void *info)
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index ea051173b0da..d174db7a3370 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -58,6 +58,7 @@
 #define SrcMem32    (4<<4)      /* Memory operand (32-bit). */
 #define SrcImm      (5<<4)      /* Immediate operand. */
 #define SrcImmByte  (6<<4)      /* 8-bit sign-extended immediate operand. */
+#define SrcOne      (7<<4)      /* Implied '1' */
 #define SrcMask     (7<<4)
 /* Generic ModRM decode. */
 #define ModRM       (1<<7)
@@ -70,17 +71,23 @@
 #define Group       (1<<14)     /* Bits 3:5 of modrm byte extend opcode */
 #define GroupDual   (1<<15)     /* Alternate decoding of mod == 3 */
 #define GroupMask   0xff        /* Group number stored in bits 0:7 */
+/* Source 2 operand type */
+#define Src2None    (0<<29)
+#define Src2CL      (1<<29)
+#define Src2ImmByte (2<<29)
+#define Src2One     (3<<29)
+#define Src2Mask    (7<<29)
 
 enum {
         Group1_80, Group1_81, Group1_82, Group1_83,
         Group1A, Group3_Byte, Group3, Group4, Group5, Group7,
 };
 
-static u16 opcode_table[256] = {
+static u32 opcode_table[256] = {
         /* 0x00 - 0x07 */
         ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-        0, 0, 0, 0,
+        ByteOp | DstAcc | SrcImm, DstAcc | SrcImm, 0, 0,
         /* 0x08 - 0x0F */
         ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
@@ -195,7 +202,7 @@ static u16 opcode_table[256] = {
         ImplicitOps, ImplicitOps, Group | Group4, Group | Group5,
 };
 
-static u16 twobyte_table[256] = {
+static u32 twobyte_table[256] = {
         /* 0x00 - 0x0F */
         0, Group | GroupDual | Group7, 0, 0, 0, 0, ImplicitOps, 0,
         ImplicitOps, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0,
@@ -230,9 +237,14 @@ static u16 twobyte_table[256] = {
         /* 0x90 - 0x9F */
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         /* 0xA0 - 0xA7 */
-        0, 0, 0, DstMem | SrcReg | ModRM | BitOp, 0, 0, 0, 0,
+        0, 0, 0, DstMem | SrcReg | ModRM | BitOp,
+        DstMem | SrcReg | Src2ImmByte | ModRM,
+        DstMem | SrcReg | Src2CL | ModRM, 0, 0,
         /* 0xA8 - 0xAF */
-        0, 0, 0, DstMem | SrcReg | ModRM | BitOp, 0, 0, ModRM, 0,
+        0, 0, 0, DstMem | SrcReg | ModRM | BitOp,
+        DstMem | SrcReg | Src2ImmByte | ModRM,
+        DstMem | SrcReg | Src2CL | ModRM,
+        ModRM, 0,
         /* 0xB0 - 0xB7 */
         ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 0,
             DstMem | SrcReg | ModRM | BitOp,
@@ -253,7 +265,7 @@ static u16 twobyte_table[256] = {
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
 };
 
-static u16 group_table[] = {
+static u32 group_table[] = {
         [Group1_80*8] =
         ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
         ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
@@ -297,9 +309,9 @@ static u16 group_table[] = {
         SrcMem16 | ModRM | Mov, SrcMem | ModRM | ByteOp,
 };
 
-static u16 group2_table[] = {
+static u32 group2_table[] = {
         [Group7*8] =
-        SrcNone | ModRM, 0, 0, 0,
+        SrcNone | ModRM, 0, 0, SrcNone | ModRM,
         SrcNone | ModRM | DstMem | Mov, 0,
         SrcMem16 | ModRM | Mov, 0,
 };
@@ -359,49 +371,48 @@ static u16 group2_table[] = {
         "andl %"_msk",%"_LO32 _tmp"; "          \
         "orl  %"_LO32 _tmp",%"_sav"; "
 
+#ifdef CONFIG_X86_64
+#define ON64(x) x
+#else
+#define ON64(x)
+#endif
+
+#define ____emulate_2op(_op, _src, _dst, _eflags, _x, _y, _suffix)      \
+        do {                                                            \
+                __asm__ __volatile__ (                                  \
+                        _PRE_EFLAGS("0", "4", "2")                      \
+                        _op _suffix " %"_x"3,%1; "                      \
+                        _POST_EFLAGS("0", "4", "2")                     \
+                        : "=m" (_eflags), "=m" ((_dst).val),            \
+                          "=&r" (_tmp)                                  \
+                        : _y ((_src).val), "i" (EFLAGS_MASK));          \
+        } while (0)
+
+
 /* Raw emulation: instruction has two explicit operands. */
 #define __emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy) \
-        do {                                                                \
-                unsigned long _tmp;                                         \
-                                                                            \
-                switch ((_dst).bytes) {                                     \
-                case 2:                                                     \
-                        __asm__ __volatile__ (                              \
-                                _PRE_EFLAGS("0", "4", "2")                  \
-                                _op"w %"_wx"3,%1; "                         \
-                                _POST_EFLAGS("0", "4", "2")                 \
-                                : "=m" (_eflags), "=m" ((_dst).val),        \
-                                  "=&r" (_tmp)                              \
-                                : _wy ((_src).val), "i" (EFLAGS_MASK));     \
-                        break;                                              \
-                case 4:                                                     \
-                        __asm__ __volatile__ (                              \
-                                _PRE_EFLAGS("0", "4", "2")                  \
-                                _op"l %"_lx"3,%1; "                         \
-                                _POST_EFLAGS("0", "4", "2")                 \
-                                : "=m" (_eflags), "=m" ((_dst).val),        \
-                                  "=&r" (_tmp)                              \
-                                : _ly ((_src).val), "i" (EFLAGS_MASK));     \
-                        break;                                              \
-                case 8:                                                     \
-                        __emulate_2op_8byte(_op, _src, _dst,                \
-                                            _eflags, _qx, _qy);             \
-                        break;                                              \
-                }                                                           \
+        do {                                                            \
+                unsigned long _tmp;                                     \
+                                                                        \
+                switch ((_dst).bytes) {                                 \
+                case 2:                                                 \
+                        ____emulate_2op(_op,_src,_dst,_eflags,_wx,_wy,"w"); \
+                        break;                                          \
+                case 4:                                                 \
+                        ____emulate_2op(_op,_src,_dst,_eflags,_lx,_ly,"l"); \
+                        break;                                          \
+                case 8:                                                 \
+                        ON64(____emulate_2op(_op,_src,_dst,_eflags,_qx,_qy,"q")); \
+                        break;                                          \
+                }                                                       \
         } while (0)
 
 #define __emulate_2op(_op,_src,_dst,_eflags,_bx,_by,_wx,_wy,_lx,_ly,_qx,_qy) \
         do {                                                                 \
-                unsigned long __tmp;                                         \
+                unsigned long _tmp;                                          \
                 switch ((_dst).bytes) {                                      \
                 case 1:                                                      \
-                        __asm__ __volatile__ (                               \
-                                _PRE_EFLAGS("0", "4", "2")                   \
-                                _op"b %"_bx"3,%1; "                          \
-                                _POST_EFLAGS("0", "4", "2")                  \
-                                : "=m" (_eflags), "=m" ((_dst).val),         \
-                                  "=&r" (__tmp)                              \
-                                : _by ((_src).val), "i" (EFLAGS_MASK));      \
+                        ____emulate_2op(_op,_src,_dst,_eflags,_bx,_by,"b");  \
                         break;                                               \
                 default:                                                     \
                         __emulate_2op_nobyte(_op, _src, _dst, _eflags,       \
@@ -425,71 +436,68 @@ static u16 group2_table[] = {
         __emulate_2op_nobyte(_op, _src, _dst, _eflags,                  \
                              "w", "r", _LO32, "r", "", "r")
 
-/* Instruction has only one explicit operand (no source operand). */
-#define emulate_1op(_op, _dst, _eflags)                                    \
-        do {                                                            \
-                unsigned long _tmp;                                     \
-                                                                        \
-                switch ((_dst).bytes) {                                 \
-                case 1:                                                 \
-                        __asm__ __volatile__ (                          \
-                                _PRE_EFLAGS("0", "3", "2")              \
-                                _op"b %1; "                             \
-                                _POST_EFLAGS("0", "3", "2")             \
-                                : "=m" (_eflags), "=m" ((_dst).val),    \
-                                  "=&r" (_tmp)                          \
-                                : "i" (EFLAGS_MASK));                   \
-                        break;                                          \
-                case 2:                                                 \
-                        __asm__ __volatile__ (                          \
-                                _PRE_EFLAGS("0", "3", "2")              \
-                                _op"w %1; "                             \
-                                _POST_EFLAGS("0", "3", "2")             \
-                                : "=m" (_eflags), "=m" ((_dst).val),    \
-                                  "=&r" (_tmp)                          \
-                                : "i" (EFLAGS_MASK));                   \
-                        break;                                          \
-                case 4:                                                 \
-                        __asm__ __volatile__ (                          \
-                                _PRE_EFLAGS("0", "3", "2")              \
-                                _op"l %1; "                             \
-                                _POST_EFLAGS("0", "3", "2")             \
-                                : "=m" (_eflags), "=m" ((_dst).val),    \
-                                  "=&r" (_tmp)                          \
-                                : "i" (EFLAGS_MASK));                   \
-                        break;                                          \
-                case 8:                                                 \
-                        __emulate_1op_8byte(_op, _dst, _eflags);        \
-                        break;                                          \
-                }                                                       \
+/* Instruction has three operands and one operand is stored in ECX register */
+#define __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, _suffix, _type)         \
+        do {                                                                    \
+                unsigned long _tmp;                                             \
+                _type _clv  = (_cl).val;                                        \
+                _type _srcv = (_src).val;                                       \
+                _type _dstv = (_dst).val;                                       \
+                                                                                \
+                __asm__ __volatile__ (                                          \
+                        _PRE_EFLAGS("0", "5", "2")                              \
+                        _op _suffix " %4,%1 \n"                                 \
+                        _POST_EFLAGS("0", "5", "2")                             \
+                        : "=m" (_eflags), "+r" (_dstv), "=&r" (_tmp)            \
+                        : "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK)           \
+                        );                                                      \
+                                                                                \
+                (_cl).val  = (unsigned long) _clv;                              \
+                (_src).val = (unsigned long) _srcv;                             \
+                (_dst).val = (unsigned long) _dstv;                             \
         } while (0)
 
-/* Emulate an instruction with quadword operands (x86/64 only). */
-#if defined(CONFIG_X86_64)
-#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)           \
-        do {                                                              \
-                __asm__ __volatile__ (                                    \
-                        _PRE_EFLAGS("0", "4", "2")                        \
-                        _op"q %"_qx"3,%1; "                               \
-                        _POST_EFLAGS("0", "4", "2")                       \
-                        : "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
-                        : _qy ((_src).val), "i" (EFLAGS_MASK));         \
+#define emulate_2op_cl(_op, _cl, _src, _dst, _eflags)                           \
+        do {                                                                    \
+                switch ((_dst).bytes) {                                         \
+                case 2:                                                         \
+                        __emulate_2op_cl(_op, _cl, _src, _dst, _eflags,         \
+                                                "w", unsigned short);           \
+                        break;                                                  \
+                case 4:                                                         \
+                        __emulate_2op_cl(_op, _cl, _src, _dst, _eflags,         \
+                                                "l", unsigned int);             \
+                        break;                                                  \
+                case 8:                                                         \
+                        ON64(__emulate_2op_cl(_op, _cl, _src, _dst, _eflags,    \
+                                                "q", unsigned long));           \
+                        break;                                                  \
+                }                                                               \
         } while (0)
 
-#define __emulate_1op_8byte(_op, _dst, _eflags)                           \
-        do {                                                              \
-                __asm__ __volatile__ (                                    \
-                        _PRE_EFLAGS("0", "3", "2")                        \
-                        _op"q %1; "                                       \
-                        _POST_EFLAGS("0", "3", "2")                       \
-                        : "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
-                        : "i" (EFLAGS_MASK));                             \
+#define __emulate_1op(_op, _dst, _eflags, _suffix)                      \
+        do {                                                            \
+                unsigned long _tmp;                                     \
+                                                                        \
+                __asm__ __volatile__ (                                  \
+                        _PRE_EFLAGS("0", "3", "2")                      \
+                        _op _suffix " %1; "                             \
+                        _POST_EFLAGS("0", "3", "2")                     \
+                        : "=m" (_eflags), "+m" ((_dst).val),            \
+                          "=&r" (_tmp)                                  \
+                        : "i" (EFLAGS_MASK));                           \
         } while (0)
 
-#elif defined(__i386__)
-#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)
-#define __emulate_1op_8byte(_op, _dst, _eflags)
-#endif                          /* __i386__ */
+/* Instruction has only one explicit operand (no source operand). */
+#define emulate_1op(_op, _dst, _eflags)                                    \
+        do {                                                            \
+                switch ((_dst).bytes) {                                 \
+                case 1: __emulate_1op(_op, _dst, _eflags, "b"); break;  \
+                case 2: __emulate_1op(_op, _dst, _eflags, "w"); break;  \
+                case 4: __emulate_1op(_op, _dst, _eflags, "l"); break;  \
+                case 8: ON64(__emulate_1op(_op, _dst, _eflags, "q")); break; \
+                }                                                       \
+        } while (0)
 
 /* Fetch next part of the instruction being emulated. */
 #define insn_fetch(_type, _size, _eip)                                  \
@@ -1041,6 +1049,33 @@ done_prefixes:
                 c->src.bytes = 1;
                 c->src.val = insn_fetch(s8, 1, c->eip);
                 break;
+        case SrcOne:
+                c->src.bytes = 1;
+                c->src.val = 1;
+                break;
+        }
+
+        /*
+         * Decode and fetch the second source operand: register, memory
+         * or immediate.
+         */
+        switch (c->d & Src2Mask) {
+        case Src2None:
+                break;
+        case Src2CL:
+                c->src2.bytes = 1;
+                c->src2.val = c->regs[VCPU_REGS_RCX] & 0x8;
+                break;
+        case Src2ImmByte:
+                c->src2.type = OP_IMM;
+                c->src2.ptr = (unsigned long *)c->eip;
+                c->src2.bytes = 1;
+                c->src2.val = insn_fetch(u8, 1, c->eip);
+                break;
+        case Src2One:
+                c->src2.bytes = 1;
+                c->src2.val = 1;
+                break;
         }
 
         /* Decode and fetch the destination operand: register or memory. */
@@ -1100,20 +1135,33 @@ static inline void emulate_push(struct x86_emulate_ctxt *ctxt)
                                                c->regs[VCPU_REGS_RSP]);
 }
 
-static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
-                                struct x86_emulate_ops *ops)
+static int emulate_pop(struct x86_emulate_ctxt *ctxt,
+                       struct x86_emulate_ops *ops)
 {
         struct decode_cache *c = &ctxt->decode;
         int rc;
 
-        rc = ops->read_std(register_address(c, ss_base(ctxt),
-                                            c->regs[VCPU_REGS_RSP]),
-                           &c->dst.val, c->dst.bytes, ctxt->vcpu);
+        rc = ops->read_emulated(register_address(c, ss_base(ctxt),
+                                                 c->regs[VCPU_REGS_RSP]),
+                                &c->src.val, c->src.bytes, ctxt->vcpu);
         if (rc != 0)
                 return rc;
 
-        register_address_increment(c, &c->regs[VCPU_REGS_RSP], c->dst.bytes);
+        register_address_increment(c, &c->regs[VCPU_REGS_RSP], c->src.bytes);
+        return rc;
+}
+
+static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
+                                struct x86_emulate_ops *ops)
+{
+        struct decode_cache *c = &ctxt->decode;
+        int rc;
 
+        c->src.bytes = c->dst.bytes;
+        rc = emulate_pop(ctxt, ops);
+        if (rc != 0)
+                return rc;
+        c->dst.val = c->src.val;
         return 0;
 }
 
@@ -1415,24 +1463,15 @@ special_insn:
                 emulate_1op("dec", c->dst, ctxt->eflags);
                 break;
         case 0x50 ... 0x57:  /* push reg */
-                c->dst.type  = OP_MEM;
-                c->dst.bytes = c->op_bytes;
-                c->dst.val = c->src.val;
-                register_address_increment(c, &c->regs[VCPU_REGS_RSP],
-                                           -c->op_bytes);
-                c->dst.ptr = (void *) register_address(
-                        c, ss_base(ctxt), c->regs[VCPU_REGS_RSP]);
+                emulate_push(ctxt);
                 break;
         case 0x58 ... 0x5f: /* pop reg */
         pop_instruction:
-                if ((rc = ops->read_std(register_address(c, ss_base(ctxt),
-                        c->regs[VCPU_REGS_RSP]), c->dst.ptr,
-                        c->op_bytes, ctxt->vcpu)) != 0)
+                c->src.bytes = c->op_bytes;
+                rc = emulate_pop(ctxt, ops);
+                if (rc != 0)
                         goto done;
-
-                register_address_increment(c, &c->regs[VCPU_REGS_RSP],
-                                           c->op_bytes);
-                c->dst.type = OP_NONE;  /* Disable writeback. */
+                c->dst.val = c->src.val;
                 break;
         case 0x63:              /* movsxd */
                 if (ctxt->mode != X86EMUL_MODE_PROT64)
@@ -1591,7 +1630,9 @@ special_insn:
                 emulate_push(ctxt);
                 break;
         case 0x9d: /* popf */
+                c->dst.type = OP_REG;
                 c->dst.ptr = (unsigned long *) &ctxt->eflags;
+                c->dst.bytes = c->op_bytes;
                 goto pop_instruction;
         case 0xa0 ... 0xa1:     /* mov */
                 c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
@@ -1689,7 +1730,9 @@ special_insn:
                 emulate_grp2(ctxt);
                 break;
         case 0xc3: /* ret */
+                c->dst.type = OP_REG;
                 c->dst.ptr = &c->eip;
+                c->dst.bytes = c->op_bytes;
                 goto pop_instruction;
         case 0xc6 ... 0xc7:     /* mov (sole member of Grp11) */
         mov:
@@ -1778,7 +1821,7 @@ special_insn:
                         c->eip = saved_eip;
                         goto cannot_emulate;
                 }
-                return 0;
+                break;
         case 0xf4:              /* hlt */
                 ctxt->vcpu->arch.halt_request = 1;
                 break;
@@ -1999,12 +2042,20 @@ twobyte_insn:
                 c->src.val &= (c->dst.bytes << 3) - 1;
                 emulate_2op_SrcV_nobyte("bt", c->src, c->dst, ctxt->eflags);
                 break;
+        case 0xa4: /* shld imm8, r, r/m */
+        case 0xa5: /* shld cl, r, r/m */
+                emulate_2op_cl("shld", c->src2, c->src, c->dst, ctxt->eflags);
+                break;
         case 0xab:
               bts:              /* bts */
                 /* only subword offset */
                 c->src.val &= (c->dst.bytes << 3) - 1;
                 emulate_2op_SrcV_nobyte("bts", c->src, c->dst, ctxt->eflags);
                 break;
+        case 0xac: /* shrd imm8, r, r/m */
+        case 0xad: /* shrd cl, r, r/m */
+                emulate_2op_cl("shrd", c->src2, c->src, c->dst, ctxt->eflags);
+                break;
         case 0xae:              /* clflush */
                 break;
         case 0xb0 ... 0xb1:     /* cmpxchg */
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index a5d8e1ace1cf..a7ed208f81e3 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -590,7 +590,8 @@ static void __init lguest_init_IRQ(void)
                  * a straightforward 1 to 1 mapping, so force that here. */
                 __get_cpu_var(vector_irq)[vector] = i;
                 if (vector != SYSCALL_VECTOR) {
-                        set_intr_gate(vector, interrupt[vector]);
+                        set_intr_gate(vector,
+                                      interrupt[vector-FIRST_EXTERNAL_VECTOR]);
                         set_irq_chip_and_handler_name(i, &lguest_irq_controller,
                                                       handle_level_irq,
                                                       "level");
@@ -737,7 +738,7 @@ static void lguest_time_init(void)
 
         /* We can't set cpumask in the initializer: damn C limitations!  Set it
          * here and register our timer device. */
-        lguest_clockevent.cpumask = cpumask_of_cpu(0);
+        lguest_clockevent.cpumask = cpumask_of(0);
         clockevents_register_device(&lguest_clockevent);
 
         /* Finally, we unblock the timer interrupt. */
diff --git a/arch/x86/lguest/i386_head.S b/arch/x86/lguest/i386_head.S
index 5c7cef34c9e7..10b9bd35a8ff 100644
--- a/arch/x86/lguest/i386_head.S
+++ b/arch/x86/lguest/i386_head.S
@@ -30,21 +30,6 @@ ENTRY(lguest_entry)
         movl $lguest_data - __PAGE_OFFSET, %edx
         int $LGUEST_TRAP_ENTRY
 
-        /* The Host put the toplevel pagetable in lguest_data.pgdir.  The movsl
-         * instruction uses %esi implicitly as the source for the copy we're
-         * about to do. */
-        movl lguest_data - __PAGE_OFFSET + LGUEST_DATA_pgdir, %esi
-
-        /* Copy first 32 entries of page directory to __PAGE_OFFSET entries.
-         * This means the first 128M of kernel memory will be mapped at
-         * PAGE_OFFSET where the kernel expects to run.  This will get it far
-         * enough through boot to switch to its own pagetables. */
-        movl $32, %ecx
-        movl %esi, %edi
-        addl $((__PAGE_OFFSET >> 22) * 4), %edi
-        rep
-        movsl
-
         /* Set up the initial stack so we can run C code. */
         movl $(init_thread_union+THREAD_SIZE),%esp
 
diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c
index 9e68075544f6..4a20b2f9a381 100644
--- a/arch/x86/lib/usercopy_32.c
+++ b/arch/x86/lib/usercopy_32.c
@@ -39,7 +39,7 @@ static inline int __movsl_is_ok(unsigned long a1, unsigned long a2, unsigned lon
 #define __do_strncpy_from_user(dst, src, count, res)                       \
 do {                                                                       \
         int __d0, __d1, __d2;                                              \
-        might_sleep();                                                     \
+        might_fault();                                                     \
         __asm__ __volatile__(                                              \
                 "       testl %1,%1\n"                                     \
                 "       jz 2f\n"                                           \
@@ -126,7 +126,7 @@ EXPORT_SYMBOL(strncpy_from_user);
 #define __do_clear_user(addr,size)                                      \
 do {                                                                    \
         int __d0;                                                       \
-        might_sleep();                                                  \
+        might_fault();                                                  \
         __asm__ __volatile__(                                           \
                 "0:     rep; stosl\n"                                   \
                 "       movl %2,%0\n"                                   \
@@ -155,7 +155,7 @@ do {									\
 unsigned long
 clear_user(void __user *to, unsigned long n)
 {
-        might_sleep();
+        might_fault();
         if (access_ok(VERIFY_WRITE, to, n))
                 __do_clear_user(to, n);
         return n;
@@ -197,7 +197,7 @@ long strnlen_user(const char __user *s, long n)
         unsigned long mask = -__addr_ok(s);
         unsigned long res, tmp;
 
-        might_sleep();
+        might_fault();
 
         __asm__ __volatile__(
                 "       testl %0, %0\n"
diff --git a/arch/x86/lib/usercopy_64.c b/arch/x86/lib/usercopy_64.c
index f4df6e7c718b..64d6c84e6353 100644
--- a/arch/x86/lib/usercopy_64.c
+++ b/arch/x86/lib/usercopy_64.c
@@ -15,7 +15,7 @@
 #define __do_strncpy_from_user(dst,src,count,res)                          \
 do {                                                                       \
         long __d0, __d1, __d2;                                             \
-        might_sleep();                                                     \
+        might_fault();                                                     \
         __asm__ __volatile__(                                              \
                 "       testq %1,%1\n"                                     \
                 "       jz 2f\n"                                           \
@@ -64,7 +64,7 @@ EXPORT_SYMBOL(strncpy_from_user);
 unsigned long __clear_user(void __user *addr, unsigned long size)
 {
         long __d0;
-        might_sleep();
+        might_fault();
         /* no memory constraint because it doesn't change any memory gcc knows
            about */
         asm volatile(
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
index 37b9ae4d44c5..df167f265622 100644
--- a/arch/x86/mach-default/setup.c
+++ b/arch/x86/mach-default/setup.c
@@ -133,29 +133,28 @@ void __init time_init_hook(void)
  **/
 void mca_nmi_hook(void)
 {
-        /* If I recall correctly, there's a whole bunch of other things that
+        /*
+         * If I recall correctly, there's a whole bunch of other things that
          * we can do to check for NMI problems, but that's all I know about
          * at the moment.
          */
-
-        printk("NMI generated from unknown source!\n");
+        pr_warning("NMI generated from unknown source!\n");
 }
 #endif
 
 static __init int no_ipi_broadcast(char *str)
 {
         get_option(&str, &no_broadcast);
-        printk ("Using %s mode\n", no_broadcast ? "No IPI Broadcast" :
-                                                                                        "IPI Broadcast");
+        pr_info("Using %s mode\n",
+                no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
         return 1;
 }
-
 __setup("no_ipi_broadcast=", no_ipi_broadcast);
 
 static int __init print_ipi_mode(void)
 {
-        printk ("Using IPI %s mode\n", no_broadcast ? "No-Shortcut" :
-                                                                                        "Shortcut");
+        pr_info("Using IPI %s mode\n",
+                no_broadcast ? "No-Shortcut" : "Shortcut");
         return 0;
 }
 
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
index 3c3b471ea496..bc4c7840b2a8 100644
--- a/arch/x86/mach-generic/bigsmp.c
+++ b/arch/x86/mach-generic/bigsmp.c
@@ -17,6 +17,7 @@
 #include <asm/bigsmp/apic.h>
 #include <asm/bigsmp/ipi.h>
 #include <asm/mach-default/mach_mpparse.h>
+#include <asm/mach-default/mach_wakecpu.h>
 
 static int dmi_bigsmp; /* can be set by dmi scanners */
 
@@ -41,9 +42,10 @@ static const struct dmi_system_id bigsmp_dmi_table[] = {
          { }
 };
 
-static cpumask_t vector_allocation_domain(int cpu)
+static void vector_allocation_domain(int cpu, cpumask_t *retmask)
 {
-        return cpumask_of_cpu(cpu);
+        cpus_clear(*retmask);
+        cpu_set(cpu, *retmask);
 }
 
 static int probe_bigsmp(void)
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
index 9e835a11a13a..e63a4a76d8cd 100644
--- a/arch/x86/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
@@ -16,6 +16,7 @@
 #include <asm/mach-default/mach_apic.h>
 #include <asm/mach-default/mach_ipi.h>
 #include <asm/mach-default/mach_mpparse.h>
+#include <asm/mach-default/mach_wakecpu.h>
 
 /* should be called last. */
 static int probe_default(void)
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index 28459cab3ddb..4ba5ccaa1584 100644
--- a/arch/x86/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
@@ -16,7 +16,19 @@
 #include <asm/es7000/apic.h>
 #include <asm/es7000/ipi.h>
 #include <asm/es7000/mpparse.h>
-#include <asm/es7000/wakecpu.h>
+#include <asm/mach-default/mach_wakecpu.h>
+
+void __init es7000_update_genapic_to_cluster(void)
+{
+        genapic->target_cpus = target_cpus_cluster;
+        genapic->int_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
+        genapic->int_dest_mode = INT_DEST_MODE_CLUSTER;
+        genapic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER;
+
+        genapic->init_apic_ldr = init_apic_ldr_cluster;
+
+        genapic->cpu_mask_to_apicid = cpu_mask_to_apicid_cluster;
+}
 
 static int probe_es7000(void)
 {
@@ -75,7 +87,7 @@ static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 }
 #endif
 
-static cpumask_t vector_allocation_domain(int cpu)
+static void vector_allocation_domain(int cpu, cpumask_t *retmask)
 {
         /* Careful. Some cpus do not strictly honor the set of cpus
          * specified in the interrupt destination when using lowest
@@ -85,8 +97,7 @@ static cpumask_t vector_allocation_domain(int cpu)
          * deliver interrupts to the wrong hyperthread when only one
          * hyperthread was specified in the interrupt desitination.
          */
-        cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
-        return domain;
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
 }
 
 struct genapic __initdata_refok apic_es7000 = APIC_INIT("es7000", probe_es7000);
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
index 71a309b122e6..511d7941364f 100644
--- a/arch/x86/mach-generic/numaq.c
+++ b/arch/x86/mach-generic/numaq.c
@@ -38,7 +38,7 @@ static int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
         return 0;
 }
 
-static cpumask_t vector_allocation_domain(int cpu)
+static void vector_allocation_domain(int cpu, cpumask_t *retmask)
 {
         /* Careful. Some cpus do not strictly honor the set of cpus
          * specified in the interrupt destination when using lowest
@@ -48,8 +48,7 @@ static cpumask_t vector_allocation_domain(int cpu)
          * deliver interrupts to the wrong hyperthread when only one
          * hyperthread was specified in the interrupt desitination.
          */
-        cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
-        return domain;
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
 }
 
 struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq);
diff --git a/arch/x86/mach-generic/probe.c b/arch/x86/mach-generic/probe.c
index 5a7e4619e1c4..c346d9d0226f 100644
--- a/arch/x86/mach-generic/probe.c
+++ b/arch/x86/mach-generic/probe.c
@@ -15,6 +15,7 @@
 #include <asm/mpspec.h>
 #include <asm/apicdef.h>
 #include <asm/genapic.h>
+#include <asm/setup.h>
 
 extern struct genapic apic_numaq;
 extern struct genapic apic_summit;
@@ -57,6 +58,9 @@ static int __init parse_apic(char *arg)
                 }
         }
 
+        if (x86_quirks->update_genapic)
+                x86_quirks->update_genapic();
+
         /* Parsed again by __setup for debug/verbose */
         return 0;
 }
@@ -72,12 +76,15 @@ void __init generic_bigsmp_probe(void)
          * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
          */
 
-        if (!cmdline_apic && genapic == &apic_default)
+        if (!cmdline_apic && genapic == &apic_default) {
                 if (apic_bigsmp.probe()) {
                         genapic = &apic_bigsmp;
+                        if (x86_quirks->update_genapic)
+                                x86_quirks->update_genapic();
                         printk(KERN_INFO "Overriding APIC driver with %s\n",
                                genapic->name);
                 }
+        }
 #endif
 }
 
@@ -94,6 +101,9 @@ void __init generic_apic_probe(void)
                 /* Not visible without early console */
                 if (!apic_probe[i])
                         panic("Didn't find an APIC driver");
+
+                if (x86_quirks->update_genapic)
+                        x86_quirks->update_genapic();
         }
         printk(KERN_INFO "Using APIC driver %s\n", genapic->name);
 }
@@ -108,6 +118,8 @@ int __init mps_oem_check(struct mp_config_table *mpc, char *oem,
                 if (apic_probe[i]->mps_oem_check(mpc, oem, productid)) {
                         if (!cmdline_apic) {
                                 genapic = apic_probe[i];
+                                if (x86_quirks->update_genapic)
+                                        x86_quirks->update_genapic();
                                 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
                                        genapic->name);
                         }
@@ -124,6 +136,8 @@ int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
                 if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
                         if (!cmdline_apic) {
                                 genapic = apic_probe[i];
+                                if (x86_quirks->update_genapic)
+                                        x86_quirks->update_genapic();
                                 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
                                        genapic->name);
                         }
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
index 6272b5e69da6..2821ffc188b5 100644
--- a/arch/x86/mach-generic/summit.c
+++ b/arch/x86/mach-generic/summit.c
@@ -16,6 +16,7 @@
 #include <asm/summit/apic.h>
 #include <asm/summit/ipi.h>
 #include <asm/summit/mpparse.h>
+#include <asm/mach-default/mach_wakecpu.h>
 
 static int probe_summit(void)
 {
@@ -23,7 +24,7 @@ static int probe_summit(void)
         return 0;
 }
 
-static cpumask_t vector_allocation_domain(int cpu)
+static void vector_allocation_domain(int cpu, cpumask_t *retmask)
 {
         /* Careful. Some cpus do not strictly honor the set of cpus
          * specified in the interrupt destination when using lowest
@@ -33,8 +34,7 @@ static cpumask_t vector_allocation_domain(int cpu)
          * deliver interrupts to the wrong hyperthread when only one
          * hyperthread was specified in the interrupt desitination.
          */
-        cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
-        return domain;
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
 }
 
 struct genapic apic_summit = APIC_INIT("summit", probe_summit);
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index 52145007bd7e..9840b7ec749a 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -63,11 +63,6 @@ static int voyager_extended_cpus = 1;
 /* Used for the invalidate map that's also checked in the spinlock */
 static volatile unsigned long smp_invalidate_needed;
 
-/* Bitmask of currently online CPUs - used by setup.c for
-   /proc/cpuinfo, visible externally but still physical */
-cpumask_t cpu_online_map = CPU_MASK_NONE;
-EXPORT_SYMBOL(cpu_online_map);
-
 /* Bitmask of CPUs present in the system - exported by i386_syms.c, used
  * by scheduler but indexed physically */
 cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
@@ -218,8 +213,6 @@ static cpumask_t smp_commenced_mask = CPU_MASK_NONE;
 /* This is for the new dynamic CPU boot code */
 cpumask_t cpu_callin_map = CPU_MASK_NONE;
 cpumask_t cpu_callout_map = CPU_MASK_NONE;
-cpumask_t cpu_possible_map = CPU_MASK_NONE;
-EXPORT_SYMBOL(cpu_possible_map);
 
 /* The per processor IRQ masks (these are usually kept in sync) */
 static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
@@ -364,9 +357,8 @@ void __init find_smp_config(void)
         printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id);
 
         /* initialize the CPU structures (moved from smp_boot_cpus) */
-        for (i = 0; i < NR_CPUS; i++) {
+        for (i = 0; i < nr_cpu_ids; i++)
                 cpu_irq_affinity[i] = ~0;
-        }
         cpu_online_map = cpumask_of_cpu(boot_cpu_id);
 
         /* The boot CPU must be extended */
@@ -679,7 +671,7 @@ void __init smp_boot_cpus(void)
 
         /* loop over all the extended VIC CPUs and boot them.  The
          * Quad CPUs must be bootstrapped by their extended VIC cpu */
-        for (i = 0; i < NR_CPUS; i++) {
+        for (i = 0; i < nr_cpu_ids; i++) {
                 if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map))
                         continue;
                 do_boot_cpu(i);
@@ -1234,7 +1226,7 @@ int setup_profiling_timer(unsigned int multiplier)
          * new values until the next timer interrupt in which they do process
          * accounting.
          */
-        for (i = 0; i < NR_CPUS; ++i)
+        for (i = 0; i < nr_cpu_ids; ++i)
                 per_cpu(prof_multiplier, i) = multiplier;
 
         return 0;
@@ -1264,7 +1256,7 @@ void __init voyager_smp_intr_init(void)
         int i;
 
         /* initialize the per cpu irq mask to all disabled */
-        for (i = 0; i < NR_CPUS; i++)
+        for (i = 0; i < nr_cpu_ids; i++)
                 vic_irq_mask[i] = 0xFFFF;
 
         VIC_SET_GATE(VIC_CPI_LEVEL0, vic_cpi_interrupt);
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
index fea4565ff576..d8cc96a2738f 100644
--- a/arch/x86/mm/Makefile
+++ b/arch/x86/mm/Makefile
@@ -8,9 +8,8 @@ obj-$(CONFIG_X86_PTDUMP)	+= dump_pagetables.o
 
 obj-$(CONFIG_HIGHMEM)           += highmem_32.o
 
-obj-$(CONFIG_MMIOTRACE_HOOKS)   += kmmio.o
 obj-$(CONFIG_MMIOTRACE)         += mmiotrace.o
-mmiotrace-y                     := pf_in.o mmio-mod.o
+mmiotrace-y                     := kmmio.o pf_in.o mmio-mod.o
 obj-$(CONFIG_MMIOTRACE_TEST)    += testmmiotrace.o
 
 obj-$(CONFIG_NUMA)              += numa_$(BITS).o
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 31e8730fa246..9e268b6b204e 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -53,7 +53,7 @@
 
 static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr)
 {
-#ifdef CONFIG_MMIOTRACE_HOOKS
+#ifdef CONFIG_MMIOTRACE
         if (unlikely(is_kmmio_active()))
                 if (kmmio_handler(regs, addr) == 1)
                         return -1;
@@ -393,7 +393,7 @@ static void show_fault_oops(struct pt_regs *regs, unsigned long error_code,
                 if (pte && pte_present(*pte) && !pte_exec(*pte))
                         printk(KERN_CRIT "kernel tried to execute "
                                 "NX-protected page - exploit attempt? "
-                                "(uid: %d)\n", current->uid);
+                                "(uid: %d)\n", current_uid());
         }
 #endif
 
@@ -413,6 +413,7 @@ static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs,
                                  unsigned long error_code)
 {
         unsigned long flags = oops_begin();
+        int sig = SIGKILL;
         struct task_struct *tsk;
 
         printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
@@ -423,8 +424,8 @@ static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs,
         tsk->thread.trap_no = 14;
         tsk->thread.error_code = error_code;
         if (__die("Bad pagetable", regs, error_code))
-                regs = NULL;
-        oops_end(flags, regs, SIGKILL);
+                sig = 0;
+        oops_end(flags, regs, sig);
 }
 #endif
 
@@ -590,6 +591,7 @@ void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
         int fault;
 #ifdef CONFIG_X86_64
         unsigned long flags;
+        int sig;
 #endif
 
         tsk = current;
@@ -665,7 +667,6 @@ void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
         if (unlikely(in_atomic() || !mm))
                 goto bad_area_nosemaphore;
 
-again:
         /*
          * When running in the kernel we expect faults to occur only to
          * addresses in user space.  All other faults represent errors in the
@@ -849,32 +850,22 @@ no_context:
         bust_spinlocks(0);
         do_exit(SIGKILL);
 #else
+        sig = SIGKILL;
         if (__die("Oops", regs, error_code))
-                regs = NULL;
+                sig = 0;
         /* Executive summary in case the body of the oops scrolled away */
         printk(KERN_EMERG "CR2: %016lx\n", address);
-        oops_end(flags, regs, SIGKILL);
+        oops_end(flags, regs, sig);
 #endif
 
-/*
- * We ran out of memory, or some other thing happened to us that made
- * us unable to handle the page fault gracefully.
- */
 out_of_memory:
+        /*
+         * We ran out of memory, call the OOM killer, and return the userspace
+         * (which will retry the fault, or kill us if we got oom-killed).
+         */
         up_read(&mm->mmap_sem);
-        if (is_global_init(tsk)) {
-                yield();
-                /*
-                 * Re-lookup the vma - in theory the vma tree might
-                 * have changed:
-                 */
-                goto again;
-        }
-
-        printk("VM: killing process %s\n", tsk->comm);
-        if (error_code & PF_USER)
-                do_group_exit(SIGKILL);
-        goto no_context;
+        pagefault_out_of_memory();
+        return;
 
 do_sigbus:
         up_read(&mm->mmap_sem);
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index c483f4242079..544d724caeee 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -21,6 +21,7 @@
 #include <linux/init.h>
 #include <linux/highmem.h>
 #include <linux/pagemap.h>
+#include <linux/pci.h>
 #include <linux/pfn.h>
 #include <linux/poison.h>
 #include <linux/bootmem.h>
@@ -67,7 +68,7 @@ static unsigned long __meminitdata table_top;
 
 static int __initdata after_init_bootmem;
 
-static __init void *alloc_low_page(unsigned long *phys)
+static __init void *alloc_low_page(void)
 {
         unsigned long pfn = table_end++;
         void *adr;
@@ -77,7 +78,6 @@ static __init void *alloc_low_page(unsigned long *phys)
 
         adr = __va(pfn * PAGE_SIZE);
         memset(adr, 0, PAGE_SIZE);
-        *phys  = pfn * PAGE_SIZE;
         return adr;
 }
 
@@ -92,16 +92,17 @@ static pmd_t * __init one_md_table_init(pgd_t *pgd)
         pmd_t *pmd_table;
 
 #ifdef CONFIG_X86_PAE
-        unsigned long phys;
         if (!(pgd_val(*pgd) & _PAGE_PRESENT)) {
                 if (after_init_bootmem)
                         pmd_table = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
                 else
-                        pmd_table = (pmd_t *)alloc_low_page(&phys);
+                        pmd_table = (pmd_t *)alloc_low_page();
                 paravirt_alloc_pmd(&init_mm, __pa(pmd_table) >> PAGE_SHIFT);
                 set_pgd(pgd, __pgd(__pa(pmd_table) | _PAGE_PRESENT));
                 pud = pud_offset(pgd, 0);
                 BUG_ON(pmd_table != pmd_offset(pud, 0));
+
+                return pmd_table;
         }
 #endif
         pud = pud_offset(pgd, 0);
@@ -126,10 +127,8 @@ static pte_t * __init one_page_table_init(pmd_t *pmd)
                         if (!page_table)
                                 page_table =
                                 (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE);
-                } else {
-                        unsigned long phys;
-                        page_table = (pte_t *)alloc_low_page(&phys);
-                }
+                } else
+                        page_table = (pte_t *)alloc_low_page();
 
                 paravirt_alloc_pte(&init_mm, __pa(page_table) >> PAGE_SHIFT);
                 set_pmd(pmd, __pmd(__pa(page_table) | _PAGE_TABLE));
@@ -436,8 +435,12 @@ static void __init set_highmem_pages_init(void)
 #endif /* !CONFIG_NUMA */
 
 #else
-# define permanent_kmaps_init(pgd_base)         do { } while (0)
-# define set_highmem_pages_init()       do { } while (0)
+static inline void permanent_kmaps_init(pgd_t *pgd_base)
+{
+}
+static inline void set_highmem_pages_init(void)
+{
+}
 #endif /* CONFIG_HIGHMEM */
 
 void __init native_pagetable_setup_start(pgd_t *base)
@@ -969,7 +972,7 @@ void __init mem_init(void)
         int codesize, reservedpages, datasize, initsize;
         int tmp;
 
-        start_periodic_check_for_corruption();
+        pci_iommu_alloc();
 
 #ifdef CONFIG_FLATMEM
         BUG_ON(!mem_map);
@@ -1040,11 +1043,25 @@ void __init mem_init(void)
                 (unsigned long)&_text, (unsigned long)&_etext,
                 ((unsigned long)&_etext - (unsigned long)&_text) >> 10);
 
+        /*
+         * Check boundaries twice: Some fundamental inconsistencies can
+         * be detected at build time already.
+         */
+#define __FIXADDR_TOP (-PAGE_SIZE)
+#ifdef CONFIG_HIGHMEM
+        BUILD_BUG_ON(PKMAP_BASE + LAST_PKMAP*PAGE_SIZE  > FIXADDR_START);
+        BUILD_BUG_ON(VMALLOC_END                        > PKMAP_BASE);
+#endif
+#define high_memory (-128UL << 20)
+        BUILD_BUG_ON(VMALLOC_START                      >= VMALLOC_END);
+#undef high_memory
+#undef __FIXADDR_TOP
+
 #ifdef CONFIG_HIGHMEM
         BUG_ON(PKMAP_BASE + LAST_PKMAP*PAGE_SIZE        > FIXADDR_START);
         BUG_ON(VMALLOC_END                              > PKMAP_BASE);
 #endif
-        BUG_ON(VMALLOC_START                            > VMALLOC_END);
+        BUG_ON(VMALLOC_START                            >= VMALLOC_END);
         BUG_ON((unsigned long)high_memory               > VMALLOC_START);
 
         if (boot_cpu_data.wp_works_ok < 0)
@@ -1062,7 +1079,7 @@ int arch_add_memory(int nid, u64 start, u64 size)
         unsigned long start_pfn = start >> PAGE_SHIFT;
         unsigned long nr_pages = size >> PAGE_SHIFT;
 
-        return __add_pages(zone, start_pfn, nr_pages);
+        return __add_pages(nid, zone, start_pfn, nr_pages);
 }
 #endif
 
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 9db01db6e3cd..54c437e96541 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -857,7 +857,7 @@ int arch_add_memory(int nid, u64 start, u64 size)
         if (last_mapped_pfn > max_pfn_mapped)
                 max_pfn_mapped = last_mapped_pfn;
 
-        ret = __add_pages(zone, start_pfn, nr_pages);
+        ret = __add_pages(nid, zone, start_pfn, nr_pages);
         WARN_ON_ONCE(ret);
 
         return ret;
@@ -902,8 +902,6 @@ void __init mem_init(void)
         long codesize, reservedpages, datasize, initsize;
         unsigned long absent_pages;
 
-        start_periodic_check_for_corruption();
-
         pci_iommu_alloc();
 
         /* clear_bss() already clear the empty_zero_page */
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index d4c4307ff3e0..bd85d42819e1 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -223,7 +223,8 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,
          * Check if the request spans more than any BAR in the iomem resource
          * tree.
          */
-        WARN_ON(iomem_map_sanity_check(phys_addr, size));
+        WARN_ONCE(iomem_map_sanity_check(phys_addr, size),
+                  KERN_INFO "Info: mapping multiple BARs. Your kernel is fine.");
 
         /*
          * Don't allow anybody to remap normal RAM that we're using..
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index cebcbf152d46..71a14f89f89e 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -278,7 +278,7 @@ void __init numa_init_array(void)
         int rr, i;
 
         rr = first_node(node_online_map);
-        for (i = 0; i < NR_CPUS; i++) {
+        for (i = 0; i < nr_cpu_ids; i++) {
                 if (early_cpu_to_node(i) != NUMA_NO_NODE)
                         continue;
                 numa_set_node(i, rr);
@@ -549,7 +549,7 @@ void __init initmem_init(unsigned long start_pfn, unsigned long last_pfn)
         memnodemap[0] = 0;
         node_set_online(0);
         node_set(0, node_possible_map);
-        for (i = 0; i < NR_CPUS; i++)
+        for (i = 0; i < nr_cpu_ids; i++)
                 numa_set_node(i, 0);
         e820_register_active_regions(0, start_pfn, last_pfn);
         setup_node_bootmem(0, start_pfn << PAGE_SHIFT, last_pfn << PAGE_SHIFT);
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index eb1bf000d12e..85cbd3cd3723 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -596,6 +596,242 @@ void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
         free_memtype(addr, addr + size);
 }
 
+/*
+ * Internal interface to reserve a range of physical memory with prot.
+ * Reserved non RAM regions only and after successful reserve_memtype,
+ * this func also keeps identity mapping (if any) in sync with this new prot.
+ */
+static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t vma_prot)
+{
+        int is_ram = 0;
+        int id_sz, ret;
+        unsigned long flags;
+        unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK);
+
+        is_ram = pagerange_is_ram(paddr, paddr + size);
+
+        if (is_ram != 0) {
+                /*
+                 * For mapping RAM pages, drivers need to call
+                 * set_memory_[uc|wc|wb] directly, for reserve and free, before
+                 * setting up the PTE.
+                 */
+                WARN_ON_ONCE(1);
+                return 0;
+        }
+
+        ret = reserve_memtype(paddr, paddr + size, want_flags, &flags);
+        if (ret)
+                return ret;
+
+        if (flags != want_flags) {
+                free_memtype(paddr, paddr + size);
+                printk(KERN_ERR
+                "%s:%d map pfn expected mapping type %s for %Lx-%Lx, got %s\n",
+                        current->comm, current->pid,
+                        cattr_name(want_flags),
+                        (unsigned long long)paddr,
+                        (unsigned long long)(paddr + size),
+                        cattr_name(flags));
+                return -EINVAL;
+        }
+
+        /* Need to keep identity mapping in sync */
+        if (paddr >= __pa(high_memory))
+                return 0;
+
+        id_sz = (__pa(high_memory) < paddr + size) ?
+                                __pa(high_memory) - paddr :
+                                size;
+
+        if (ioremap_change_attr((unsigned long)__va(paddr), id_sz, flags) < 0) {
+                free_memtype(paddr, paddr + size);
+                printk(KERN_ERR
+                        "%s:%d reserve_pfn_range ioremap_change_attr failed %s "
+                        "for %Lx-%Lx\n",
+                        current->comm, current->pid,
+                        cattr_name(flags),
+                        (unsigned long long)paddr,
+                        (unsigned long long)(paddr + size));
+                return -EINVAL;
+        }
+        return 0;
+}
+
+/*
+ * Internal interface to free a range of physical memory.
+ * Frees non RAM regions only.
+ */
+static void free_pfn_range(u64 paddr, unsigned long size)
+{
+        int is_ram;
+
+        is_ram = pagerange_is_ram(paddr, paddr + size);
+        if (is_ram == 0)
+                free_memtype(paddr, paddr + size);
+}
+
+/*
+ * track_pfn_vma_copy is called when vma that is covering the pfnmap gets
+ * copied through copy_page_range().
+ *
+ * If the vma has a linear pfn mapping for the entire range, we get the prot
+ * from pte and reserve the entire vma range with single reserve_pfn_range call.
+ * Otherwise, we reserve the entire vma range, my ging through the PTEs page
+ * by page to get physical address and protection.
+ */
+int track_pfn_vma_copy(struct vm_area_struct *vma)
+{
+        int retval = 0;
+        unsigned long i, j;
+        resource_size_t paddr;
+        unsigned long prot;
+        unsigned long vma_start = vma->vm_start;
+        unsigned long vma_end = vma->vm_end;
+        unsigned long vma_size = vma_end - vma_start;
+
+        if (!pat_enabled)
+                return 0;
+
+        if (is_linear_pfn_mapping(vma)) {
+                /*
+                 * reserve the whole chunk covered by vma. We need the
+                 * starting address and protection from pte.
+                 */
+                if (follow_phys(vma, vma_start, 0, &prot, &paddr)) {
+                        WARN_ON_ONCE(1);
+                        return -EINVAL;
+                }
+                return reserve_pfn_range(paddr, vma_size, __pgprot(prot));
+        }
+
+        /* reserve entire vma page by page, using pfn and prot from pte */
+        for (i = 0; i < vma_size; i += PAGE_SIZE) {
+                if (follow_phys(vma, vma_start + i, 0, &prot, &paddr))
+                        continue;
+
+                retval = reserve_pfn_range(paddr, PAGE_SIZE, __pgprot(prot));
+                if (retval)
+                        goto cleanup_ret;
+        }
+        return 0;
+
+cleanup_ret:
+        /* Reserve error: Cleanup partial reservation and return error */
+        for (j = 0; j < i; j += PAGE_SIZE) {
+                if (follow_phys(vma, vma_start + j, 0, &prot, &paddr))
+                        continue;
+
+                free_pfn_range(paddr, PAGE_SIZE);
+        }
+
+        return retval;
+}
+
+/*
+ * track_pfn_vma_new is called when a _new_ pfn mapping is being established
+ * for physical range indicated by pfn and size.
+ *
+ * prot is passed in as a parameter for the new mapping. If the vma has a
+ * linear pfn mapping for the entire range reserve the entire vma range with
+ * single reserve_pfn_range call.
+ * Otherwise, we look t the pfn and size and reserve only the specified range
+ * page by page.
+ *
+ * Note that this function can be called with caller trying to map only a
+ * subrange/page inside the vma.
+ */
+int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t prot,
+                        unsigned long pfn, unsigned long size)
+{
+        int retval = 0;
+        unsigned long i, j;
+        resource_size_t base_paddr;
+        resource_size_t paddr;
+        unsigned long vma_start = vma->vm_start;
+        unsigned long vma_end = vma->vm_end;
+        unsigned long vma_size = vma_end - vma_start;
+
+        if (!pat_enabled)
+                return 0;
+
+        if (is_linear_pfn_mapping(vma)) {
+                /* reserve the whole chunk starting from vm_pgoff */
+                paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT;
+                return reserve_pfn_range(paddr, vma_size, prot);
+        }
+
+        /* reserve page by page using pfn and size */
+        base_paddr = (resource_size_t)pfn << PAGE_SHIFT;
+        for (i = 0; i < size; i += PAGE_SIZE) {
+                paddr = base_paddr + i;
+                retval = reserve_pfn_range(paddr, PAGE_SIZE, prot);
+                if (retval)
+                        goto cleanup_ret;
+        }
+        return 0;
+
+cleanup_ret:
+        /* Reserve error: Cleanup partial reservation and return error */
+        for (j = 0; j < i; j += PAGE_SIZE) {
+                paddr = base_paddr + j;
+                free_pfn_range(paddr, PAGE_SIZE);
+        }
+
+        return retval;
+}
+
+/*
+ * untrack_pfn_vma is called while unmapping a pfnmap for a region.
+ * untrack can be called for a specific region indicated by pfn and size or
+ * can be for the entire vma (in which case size can be zero).
+ */
+void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn,
+                        unsigned long size)
+{
+        unsigned long i;
+        resource_size_t paddr;
+        unsigned long prot;
+        unsigned long vma_start = vma->vm_start;
+        unsigned long vma_end = vma->vm_end;
+        unsigned long vma_size = vma_end - vma_start;
+
+        if (!pat_enabled)
+                return;
+
+        if (is_linear_pfn_mapping(vma)) {
+                /* free the whole chunk starting from vm_pgoff */
+                paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT;
+                free_pfn_range(paddr, vma_size);
+                return;
+        }
+
+        if (size != 0 && size != vma_size) {
+                /* free page by page, using pfn and size */
+                paddr = (resource_size_t)pfn << PAGE_SHIFT;
+                for (i = 0; i < size; i += PAGE_SIZE) {
+                        paddr = paddr + i;
+                        free_pfn_range(paddr, PAGE_SIZE);
+                }
+        } else {
+                /* free entire vma, page by page, using the pfn from pte */
+                for (i = 0; i < vma_size; i += PAGE_SIZE) {
+                        if (follow_phys(vma, vma_start + i, 0, &prot, &paddr))
+                                continue;
+
+                        free_pfn_range(paddr, PAGE_SIZE);
+                }
+        }
+}
+
+pgprot_t pgprot_writecombine(pgprot_t prot)
+{
+        if (pat_enabled)
+                return __pgprot(pgprot_val(prot) | _PAGE_CACHE_WC);
+        else
+                return pgprot_noncached(prot);
+}
+
 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT)
 
 /* get Nth element of the linked list */
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index 51c0a2fc14fe..09737c8af074 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -382,7 +382,7 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end)
                 if (!node_online(i))
                         setup_node_bootmem(i, nodes[i].start, nodes[i].end);
 
-        for (i = 0; i < NR_CPUS; i++) {
+        for (i = 0; i < nr_cpu_ids; i++) {
                 int node = early_cpu_to_node(i);
 
                 if (node == NUMA_NO_NODE)
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 509513760a6e..98658f25f542 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -65,11 +65,13 @@ static unsigned long reset_value[NUM_COUNTERS];
 #define IBS_FETCH_BEGIN 3
 #define IBS_OP_BEGIN    4
 
-/* The function interface needs to be fixed, something like add
-   data. Should then be added to linux/oprofile.h. */
+/*
+ * The function interface needs to be fixed, something like add
+ * data. Should then be added to linux/oprofile.h.
+ */
 extern void
-oprofile_add_ibs_sample(struct pt_regs *const regs,
-                        unsigned int *const ibs_sample, int ibs_code);
+oprofile_add_ibs_sample(struct pt_regs * const regs,
+                        unsigned int * const ibs_sample, int ibs_code);
 
 struct ibs_fetch_sample {
         /* MSRC001_1031 IBS Fetch Linear Address Register */
@@ -104,11 +106,6 @@ struct ibs_op_sample {
         unsigned int ibs_dc_phys_high;
 };
 
-/*
- * unitialize the APIC for the IBS interrupts if needed on AMD Family10h+
-*/
-static void clear_ibs_nmi(void);
-
 static int ibs_allowed; /* AMD Family10h and later */
 
 struct op_ibs_config {
@@ -223,7 +220,7 @@ op_amd_handle_ibs(struct pt_regs * const regs,
                                                 (unsigned int *)&ibs_fetch,
                                                 IBS_FETCH_BEGIN);
 
-                        /*reenable the IRQ */
+                        /* reenable the IRQ */
                         rdmsr(MSR_AMD64_IBSFETCHCTL, low, high);
                         high &= ~IBS_FETCH_HIGH_VALID_BIT;
                         high |= IBS_FETCH_HIGH_ENABLE;
@@ -331,8 +328,10 @@ static void op_amd_stop(struct op_msrs const * const msrs)
         unsigned int low, high;
         int i;
 
-        /* Subtle: stop on all counters to avoid race with
-         * setting our pm callback */
+        /*
+         * Subtle: stop on all counters to avoid race with setting our
+         * pm callback
+         */
         for (i = 0 ; i < NUM_COUNTERS ; ++i) {
                 if (!reset_value[i])
                         continue;
@@ -343,13 +342,15 @@ static void op_amd_stop(struct op_msrs const * const msrs)
 
 #ifdef CONFIG_OPROFILE_IBS
         if (ibs_allowed && ibs_config.fetch_enabled) {
-                low = 0;                /* clear max count and enable */
+                /* clear max count and enable */
+                low = 0;
                 high = 0;
                 wrmsr(MSR_AMD64_IBSFETCHCTL, low, high);
         }
 
         if (ibs_allowed && ibs_config.op_enabled) {
-                low = 0;                /* clear max count and enable */
+                /* clear max count and enable */
+                low = 0;
                 high = 0;
                 wrmsr(MSR_AMD64_IBSOPCTL, low, high);
         }
@@ -370,18 +371,7 @@ static void op_amd_shutdown(struct op_msrs const * const msrs)
         }
 }
 
-#ifndef CONFIG_OPROFILE_IBS
-
-/* no IBS support */
-
-static int op_amd_init(struct oprofile_operations *ops)
-{
-        return 0;
-}
-
-static void op_amd_exit(void) {}
-
-#else
+#ifdef CONFIG_OPROFILE_IBS
 
 static u8 ibs_eilvt_off;
 
@@ -395,7 +385,7 @@ static inline void apic_clear_ibs_nmi_per_cpu(void *arg)
         setup_APIC_eilvt_ibs(0, APIC_EILVT_MSG_FIX, 1);
 }
 
-static int pfm_amd64_setup_eilvt(void)
+static int init_ibs_nmi(void)
 {
 #define IBSCTL_LVTOFFSETVAL             (1 << 8)
 #define IBSCTL                          0x1cc
@@ -443,18 +433,22 @@ static int pfm_amd64_setup_eilvt(void)
         return 0;
 }
 
-/*
- * initialize the APIC for the IBS interrupts
- * if available (AMD Family10h rev B0 and later)
- */
-static void setup_ibs(void)
+/* uninitialize the APIC for the IBS interrupts if needed */
+static void clear_ibs_nmi(void)
+{
+        if (ibs_allowed)
+                on_each_cpu(apic_clear_ibs_nmi_per_cpu, NULL, 1);
+}
+
+/* initialize the APIC for the IBS interrupts if available */
+static void ibs_init(void)
 {
         ibs_allowed = boot_cpu_has(X86_FEATURE_IBS);
 
         if (!ibs_allowed)
                 return;
 
-        if (pfm_amd64_setup_eilvt()) {
+        if (init_ibs_nmi()) {
                 ibs_allowed = 0;
                 return;
         }
@@ -462,14 +456,12 @@ static void setup_ibs(void)
         printk(KERN_INFO "oprofile: AMD IBS detected\n");
 }
 
-
-/*
- * unitialize the APIC for the IBS interrupts if needed on AMD Family10h
- * rev B0 and later */
-static void clear_ibs_nmi(void)
+static void ibs_exit(void)
 {
-        if (ibs_allowed)
-                on_each_cpu(apic_clear_ibs_nmi_per_cpu, NULL, 1);
+        if (!ibs_allowed)
+                return;
+
+        clear_ibs_nmi();
 }
 
 static int (*create_arch_files)(struct super_block *sb, struct dentry *root);
@@ -519,7 +511,7 @@ static int setup_ibs_files(struct super_block *sb, struct dentry *root)
 
 static int op_amd_init(struct oprofile_operations *ops)
 {
-        setup_ibs();
+        ibs_init();
         create_arch_files = ops->create_files;
         ops->create_files = setup_ibs_files;
         return 0;
@@ -527,10 +519,21 @@ static int op_amd_init(struct oprofile_operations *ops)
 
 static void op_amd_exit(void)
 {
-        clear_ibs_nmi();
+        ibs_exit();
 }
 
-#endif
+#else
+
+/* no IBS support */
+
+static int op_amd_init(struct oprofile_operations *ops)
+{
+        return 0;
+}
+
+static void op_amd_exit(void) {}
+
+#endif /* CONFIG_OPROFILE_IBS */
 
 struct op_x86_model_spec const op_amd_spec = {
         .init                   = op_amd_init,
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 1d88d2b39771..9e5752fe4d15 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -4,7 +4,7 @@
 #include <linux/irq.h>
 #include <linux/dmi.h>
 #include <asm/numa.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 struct pci_root_info {
         char *name;
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index 22e057665e55..9bb09823b362 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -2,7 +2,7 @@
 #include <linux/pci.h>
 #include <linux/topology.h>
 #include <linux/cpu.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 #ifdef CONFIG_X86_64
 #include <asm/pci-direct.h>
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index b67732bbb85a..62ddb73e09ed 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -14,8 +14,7 @@
 #include <asm/segment.h>
 #include <asm/io.h>
 #include <asm/smp.h>
-
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
                                 PCI_PROBE_MMCONF;
@@ -23,6 +22,12 @@ unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
 unsigned int pci_early_dump_regs;
 static int pci_bf_sort;
 int pci_routeirq;
+int noioapicquirk;
+#ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
+int noioapicreroute = 0;
+#else
+int noioapicreroute = 1;
+#endif
 int pcibios_last_bus = -1;
 unsigned long pirq_table_addr;
 struct pci_bus *pci_root_bus;
@@ -519,6 +524,17 @@ char * __devinit  pcibios_setup(char *str)
         } else if (!strcmp(str, "skip_isa_align")) {
                 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
                 return NULL;
+        } else if (!strcmp(str, "noioapicquirk")) {
+                noioapicquirk = 1;
+                return NULL;
+        } else if (!strcmp(str, "ioapicreroute")) {
+                if (noioapicreroute != -1)
+                        noioapicreroute = 0;
+                return NULL;
+        } else if (!strcmp(str, "noioapicreroute")) {
+                if (noioapicreroute != -1)
+                        noioapicreroute = 1;
+                return NULL;
         }
         return str;
 }
diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c
index 9915293500fb..bd13c3e4c6db 100644
--- a/arch/x86/pci/direct.c
+++ b/arch/x86/pci/direct.c
@@ -5,7 +5,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/dmi.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 /*
  * Functions for accessing PCI base (first 256 bytes) and extended
@@ -173,7 +173,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus,
 
 #undef PCI_CONF2_ADDRESS
 
-static struct pci_raw_ops pci_direct_conf2 = {
+struct pci_raw_ops pci_direct_conf2 = {
         .read =         pci_conf2_read,
         .write =        pci_conf2_write,
 };
@@ -289,6 +289,7 @@ int __init pci_direct_probe(void)
 
         if (pci_check_type1()) {
                 raw_pci_ops = &pci_direct_conf1;
+                port_cf9_safe = true;
                 return 1;
         }
         release_resource(region);
@@ -305,6 +306,7 @@ int __init pci_direct_probe(void)
 
         if (pci_check_type2()) {
                 raw_pci_ops = &pci_direct_conf2;
+                port_cf9_safe = true;
                 return 2;
         }
 
diff --git a/arch/x86/pci/early.c b/arch/x86/pci/early.c
index 86631ccbc25a..f6adf2c6d751 100644
--- a/arch/x86/pci/early.c
+++ b/arch/x86/pci/early.c
@@ -2,7 +2,7 @@
 #include <linux/pci.h>
 #include <asm/pci-direct.h>
 #include <asm/io.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 /* Direct PCI access. This is used for PCI accesses in early boot before
    the PCI subsystem works. */
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index 2051dc96b8e9..7d388d5cf548 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -6,8 +6,7 @@
 #include <linux/dmi.h>
 #include <linux/pci.h>
 #include <linux/init.h>
-#include "pci.h"
-
+#include <asm/pci_x86.h>
 
 static void __devinit pci_fixup_i450nx(struct pci_dev *d)
 {
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 844df0cbbd3e..e51bf2cda4b0 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -34,8 +34,8 @@
 
 #include <asm/pat.h>
 #include <asm/e820.h>
+#include <asm/pci_x86.h>
 
-#include "pci.h"
 
 static int
 skip_isa_ioresource_align(struct pci_dev *dev) {
diff --git a/arch/x86/pci/init.c b/arch/x86/pci/init.c
index d6c950f81858..bec3b048e72b 100644
--- a/arch/x86/pci/init.c
+++ b/arch/x86/pci/init.c
@@ -1,6 +1,6 @@
 #include <linux/pci.h>
 #include <linux/init.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 /* arch_initcall has too random ordering, so call the initializers
    in the right sequence from here. */
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index bf69dbe08bff..373b9afe6d44 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -16,8 +16,7 @@
 #include <asm/io_apic.h>
 #include <linux/irq.h>
 #include <linux/acpi.h>
-
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 #define PIRQ_SIGNATURE  (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
 #define PIRQ_VERSION 0x0100
diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
index b722dd481b39..f1065b129e9c 100644
--- a/arch/x86/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
@@ -3,7 +3,7 @@
  */
 #include <linux/init.h>
 #include <linux/pci.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 /*
  * Discover remaining PCI buses in case there are peer host bridges.
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 654a2234f8f3..89bf9242c80a 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -15,8 +15,7 @@
 #include <linux/acpi.h>
 #include <linux/bitmap.h>
 #include <asm/e820.h>
-
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 /* aperture is up to 256MB but BIOS may reserve less */
 #define MMCONFIG_APER_MIN       (2 * 1024*1024)
diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c
index f3c761dce695..8b2d561046a3 100644
--- a/arch/x86/pci/mmconfig_32.c
+++ b/arch/x86/pci/mmconfig_32.c
@@ -13,7 +13,7 @@
 #include <linux/init.h>
 #include <linux/acpi.h>
 #include <asm/e820.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 /* Assume systems with more busses have correct MCFG */
 #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
diff --git a/arch/x86/pci/mmconfig_64.c b/arch/x86/pci/mmconfig_64.c
index a1994163c99d..30007ffc8e11 100644
--- a/arch/x86/pci/mmconfig_64.c
+++ b/arch/x86/pci/mmconfig_64.c
@@ -10,8 +10,7 @@
 #include <linux/acpi.h>
 #include <linux/bitmap.h>
 #include <asm/e820.h>
-
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 /* Static virtual mapping of the MMCONFIG aperture */
 struct mmcfg_virt {
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 1177845d3186..2089354968a2 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -7,7 +7,7 @@
 #include <linux/nodemask.h>
 #include <mach_apic.h>
 #include <asm/mpspec.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 #define XQUAD_PORTIO_BASE 0xfe400000
 #define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
diff --git a/arch/x86/pci/olpc.c b/arch/x86/pci/olpc.c
index e11e9e803d5f..b889d824f7c6 100644
--- a/arch/x86/pci/olpc.c
+++ b/arch/x86/pci/olpc.c
@@ -29,7 +29,7 @@
 #include <linux/init.h>
 #include <asm/olpc.h>
 #include <asm/geode.h>
-#include "pci.h"
+#include <asm/pci_x86.h>
 
 /*
  * In the tables below, the first two line (8 longwords) are the
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c
index 37472fc6f729..b82cae970dfd 100644
--- a/arch/x86/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
@@ -6,9 +6,8 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/uaccess.h>
-#include "pci.h"
-#include "pci-functions.h"
-
+#include <asm/pci_x86.h>
+#include <asm/mach-default/pci-functions.h>
 
 /* BIOS32 signature: "_32_" */
 #define BIOS32_SIGNATURE        (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
diff --git a/arch/x86/pci/visws.c b/arch/x86/pci/visws.c
index 42f4cb19faca..16d0c0eb0d19 100644
--- a/arch/x86/pci/visws.c
+++ b/arch/x86/pci/visws.c
@@ -9,11 +9,10 @@
 #include <linux/init.h>
 
 #include <asm/setup.h>
+#include <asm/pci_x86.h>
 #include <asm/visws/cobalt.h>
 #include <asm/visws/lithium.h>
 
-#include "pci.h"
-
 static int pci_visws_enable_irq(struct pci_dev *dev) { return 0; }
 static void pci_visws_disable_irq(struct pci_dev *dev) { }
 
diff --git a/arch/x86/scripts/strip-symbols b/arch/x86/scripts/strip-symbols
new file mode 100644
index 000000000000..a2f1ccb827c7
--- /dev/null
+++ b/arch/x86/scripts/strip-symbols
@@ -0,0 +1 @@
+__cpu_vendor_dev_X86_VENDOR_*
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index 1ef0f90813d6..d9d35824c56f 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -9,6 +9,9 @@
  * Also alternative() doesn't work.
  */
 
+/* Disable profiling for userspace code: */
+#define DISABLE_BRANCH_PROFILING
+
 #include <linux/kernel.h>
 #include <linux/posix-timers.h>
 #include <linux/time.h>
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c
index 513f330c5832..1241f118ab56 100644
--- a/arch/x86/vdso/vdso32-setup.c
+++ b/arch/x86/vdso/vdso32-setup.c
@@ -310,7 +310,7 @@ int __init sysenter_setup(void)
 }
 
 /* Setup a VMA at program startup for the vsyscall page */
-int arch_setup_additional_pages(struct linux_binprm *bprm, int exstack)
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
 {
         struct mm_struct *mm = current->mm;
         unsigned long addr;
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 257ba4a10abf..9c98cc6ba978 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -98,7 +98,7 @@ static unsigned long vdso_addr(unsigned long start, unsigned len)
 
 /* Setup a VMA at program startup for the vsyscall page.
    Not called for compat tasks */
-int arch_setup_additional_pages(struct linux_binprm *bprm, int exstack)
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
 {
         struct mm_struct *mm = current->mm;
         unsigned long addr;
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 5e4686d70f62..bea215230b20 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -28,6 +28,7 @@
 #include <linux/console.h>
 
 #include <xen/interface/xen.h>
+#include <xen/interface/version.h>
 #include <xen/interface/physdev.h>
 #include <xen/interface/vcpu.h>
 #include <xen/features.h>
@@ -793,7 +794,7 @@ static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
 
         ret = 0;
 
-        switch(msr) {
+        switch (msr) {
 #ifdef CONFIG_X86_64
                 unsigned which;
                 u64 base;
@@ -1453,7 +1454,7 @@ static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
 
         ident_pte = 0;
         pfn = 0;
-        for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
+        for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
                 pte_t *pte_page;
 
                 /* Reuse or allocate a page of ptes */
@@ -1471,7 +1472,7 @@ static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
                 }
 
                 /* Install mappings */
-                for(pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
+                for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
                         pte_t pte;
 
                         if (pfn > max_pfn_mapped)
@@ -1485,7 +1486,7 @@ static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
                 }
         }
 
-        for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
+        for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
                 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
 
         set_page_prot(pmd, PAGE_KERNEL_RO);
@@ -1499,7 +1500,7 @@ static void convert_pfn_mfn(void *v)
 
         /* All levels are converted the same way, so just treat them
            as ptes. */
-        for(i = 0; i < PTRS_PER_PTE; i++)
+        for (i = 0; i < PTRS_PER_PTE; i++)
                 pte[i] = xen_make_pte(pte[i].pte);
 }
 
@@ -1514,7 +1515,8 @@ static void convert_pfn_mfn(void *v)
  * of the physical mapping once some sort of allocator has been set
  * up.
  */
-static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
+static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
+                                                unsigned long max_pfn)
 {
         pud_t *l3;
         pmd_t *l2;
@@ -1577,7 +1579,8 @@ static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pf
 #else   /* !CONFIG_X86_64 */
 static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
 
-static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
+static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
+                                                unsigned long max_pfn)
 {
         pmd_t *kernel_pmd;
 
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 636ef4caa52d..503c240e26c7 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -154,13 +154,13 @@ void xen_setup_mfn_list_list(void)
 {
         unsigned pfn, idx;
 
-        for(pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
+        for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
                 unsigned topidx = p2m_top_index(pfn);
 
                 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
         }
 
-        for(idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
+        for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
                 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
                 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
         }
@@ -179,7 +179,7 @@ void __init xen_build_dynamic_phys_to_machine(void)
         unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
         unsigned pfn;
 
-        for(pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
+        for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
                 unsigned topidx = p2m_top_index(pfn);
 
                 p2m_top[topidx] = &mfn_list[pfn];
@@ -207,7 +207,7 @@ static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
         p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
         BUG_ON(p == NULL);
 
-        for(i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
+        for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
                 p[i] = INVALID_P2M_ENTRY;
 
         if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
@@ -407,7 +407,8 @@ out:
                 preempt_enable();
 }
 
-pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
+                                 unsigned long addr, pte_t *ptep)
 {
         /* Just return the pte as-is.  We preserve the bits on commit */
         return *ptep;
@@ -878,7 +879,8 @@ static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
 
                 if (user_pgd) {
                         xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
-                        xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(user_pgd)));
+                        xen_do_pin(MMUEXT_PIN_L4_TABLE,
+                                   PFN_DOWN(__pa(user_pgd)));
                 }
         }
 #else /* CONFIG_X86_32 */
@@ -993,7 +995,8 @@ static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
                 pgd_t *user_pgd = xen_get_user_pgd(pgd);
 
                 if (user_pgd) {
-                        xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(user_pgd)));
+                        xen_do_pin(MMUEXT_UNPIN_TABLE,
+                                   PFN_DOWN(__pa(user_pgd)));
                         xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
                 }
         }
@@ -1079,7 +1082,7 @@ static void drop_other_mm_ref(void *info)
 
 static void xen_drop_mm_ref(struct mm_struct *mm)
 {
-        cpumask_t mask;
+        cpumask_var_t mask;
         unsigned cpu;
 
         if (current->active_mm == mm) {
@@ -1091,7 +1094,16 @@ static void xen_drop_mm_ref(struct mm_struct *mm)
         }
 
         /* Get the "official" set of cpus referring to our pagetable. */
-        mask = mm->cpu_vm_mask;
+        if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
+                for_each_online_cpu(cpu) {
+                        if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
+                            && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
+                                continue;
+                        smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
+                }
+                return;
+        }
+        cpumask_copy(mask, &mm->cpu_vm_mask);
 
         /* It's possible that a vcpu may have a stale reference to our
            cr3, because its in lazy mode, and it hasn't yet flushed
@@ -1100,11 +1112,12 @@ static void xen_drop_mm_ref(struct mm_struct *mm)
            if needed. */
         for_each_online_cpu(cpu) {
                 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
-                        cpu_set(cpu, mask);
+                        cpumask_set_cpu(cpu, mask);
         }
 
-        if (!cpus_empty(mask))
-                smp_call_function_mask(mask, drop_other_mm_ref, mm, 1);
+        if (!cpumask_empty(mask))
+                smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
+        free_cpumask_var(mask);
 }
 #else
 static void xen_drop_mm_ref(struct mm_struct *mm)
diff --git a/arch/x86/xen/multicalls.c b/arch/x86/xen/multicalls.c
index 8ea8a0d0b0de..c738644b5435 100644
--- a/arch/x86/xen/multicalls.c
+++ b/arch/x86/xen/multicalls.c
@@ -154,7 +154,7 @@ void xen_mc_flush(void)
                                ret, smp_processor_id());
                         dump_stack();
                         for (i = 0; i < b->mcidx; i++) {
-                                printk("  call %2d/%d: op=%lu arg=[%lx] result=%ld\n",
+                                printk(KERN_DEBUG "  call %2d/%d: op=%lu arg=[%lx] result=%ld\n",
                                        i+1, b->mcidx,
                                        b->debug[i].op,
                                        b->debug[i].args[0],
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index d67901083888..15c6c68db6a2 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -28,6 +28,9 @@
 /* These are code, but not functions.  Defined in entry.S */
 extern const char xen_hypervisor_callback[];
 extern const char xen_failsafe_callback[];
+extern void xen_sysenter_target(void);
+extern void xen_syscall_target(void);
+extern void xen_syscall32_target(void);
 
 
 /**
@@ -110,7 +113,6 @@ static __cpuinit int register_callback(unsigned type, const void *func)
 
 void __cpuinit xen_enable_sysenter(void)
 {
-        extern void xen_sysenter_target(void);
         int ret;
         unsigned sysenter_feature;
 
@@ -132,8 +134,6 @@ void __cpuinit xen_enable_syscall(void)
 {
 #ifdef CONFIG_X86_64
         int ret;
-        extern void xen_syscall_target(void);
-        extern void xen_syscall32_target(void);
 
         ret = register_callback(CALLBACKTYPE_syscall, xen_syscall_target);
         if (ret != 0) {
@@ -160,7 +160,8 @@ void __init xen_arch_setup(void)
         HYPERVISOR_vm_assist(VMASST_CMD_enable, VMASST_TYPE_writable_pagetables);
 
         if (!xen_feature(XENFEAT_auto_translated_physmap))
-                HYPERVISOR_vm_assist(VMASST_CMD_enable, VMASST_TYPE_pae_extended_cr3);
+                HYPERVISOR_vm_assist(VMASST_CMD_enable,
+                                     VMASST_TYPE_pae_extended_cr3);
 
         if (register_callback(CALLBACKTYPE_event, xen_hypervisor_callback) ||
             register_callback(CALLBACKTYPE_failsafe, xen_failsafe_callback))
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index acd9b6705e02..c44e2069c7c7 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -33,7 +33,7 @@
 #include "xen-ops.h"
 #include "mmu.h"
 
-cpumask_t xen_cpu_initialized_map;
+cpumask_var_t xen_cpu_initialized_map;
 
 static DEFINE_PER_CPU(int, resched_irq);
 static DEFINE_PER_CPU(int, callfunc_irq);
@@ -158,7 +158,7 @@ static void __init xen_fill_possible_map(void)
 {
         int i, rc;
 
-        for (i = 0; i < NR_CPUS; i++) {
+        for (i = 0; i < nr_cpu_ids; i++) {
                 rc = HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL);
                 if (rc >= 0) {
                         num_processors++;
@@ -192,11 +192,14 @@ static void __init xen_smp_prepare_cpus(unsigned int max_cpus)
         if (xen_smp_intr_init(0))
                 BUG();
 
-        xen_cpu_initialized_map = cpumask_of_cpu(0);
+        if (!alloc_cpumask_var(&xen_cpu_initialized_map, GFP_KERNEL))
+                panic("could not allocate xen_cpu_initialized_map\n");
+
+        cpumask_copy(xen_cpu_initialized_map, cpumask_of(0));
 
         /* Restrict the possible_map according to max_cpus. */
         while ((num_possible_cpus() > 1) && (num_possible_cpus() > max_cpus)) {
-                for (cpu = NR_CPUS - 1; !cpu_possible(cpu); cpu--)
+                for (cpu = nr_cpu_ids - 1; !cpu_possible(cpu); cpu--)
                         continue;
                 cpu_clear(cpu, cpu_possible_map);
         }
@@ -221,7 +224,7 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
         struct vcpu_guest_context *ctxt;
         struct desc_struct *gdt;
 
-        if (cpu_test_and_set(cpu, xen_cpu_initialized_map))
+        if (cpumask_test_and_set_cpu(cpu, xen_cpu_initialized_map))
                 return 0;
 
         ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
@@ -408,24 +411,23 @@ static void xen_smp_send_reschedule(int cpu)
         xen_send_IPI_one(cpu, XEN_RESCHEDULE_VECTOR);
 }
 
-static void xen_send_IPI_mask(cpumask_t mask, enum ipi_vector vector)
+static void xen_send_IPI_mask(const struct cpumask *mask,
+                              enum ipi_vector vector)
 {
         unsigned cpu;
 
-        cpus_and(mask, mask, cpu_online_map);
-
-        for_each_cpu_mask_nr(cpu, mask)
+        for_each_cpu_and(cpu, mask, cpu_online_mask)
                 xen_send_IPI_one(cpu, vector);
 }
 
-static void xen_smp_send_call_function_ipi(cpumask_t mask)
+static void xen_smp_send_call_function_ipi(const struct cpumask *mask)
 {
         int cpu;
 
         xen_send_IPI_mask(mask, XEN_CALL_FUNCTION_VECTOR);
 
         /* Make sure other vcpus get a chance to run if they need to. */
-        for_each_cpu_mask_nr(cpu, mask) {
+        for_each_cpu(cpu, mask) {
                 if (xen_vcpu_stolen(cpu)) {
                         HYPERVISOR_sched_op(SCHEDOP_yield, 0);
                         break;
@@ -435,7 +437,8 @@ static void xen_smp_send_call_function_ipi(cpumask_t mask)
 
 static void xen_smp_send_call_function_single_ipi(int cpu)
 {
-        xen_send_IPI_mask(cpumask_of_cpu(cpu), XEN_CALL_FUNCTION_SINGLE_VECTOR);
+        xen_send_IPI_mask(cpumask_of(cpu),
+                          XEN_CALL_FUNCTION_SINGLE_VECTOR);
 }
 
 static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id)
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
index 2a234db5949b..212ffe012b76 100644
--- a/arch/x86/xen/suspend.c
+++ b/arch/x86/xen/suspend.c
@@ -35,7 +35,8 @@ void xen_post_suspend(int suspend_cancelled)
                         pfn_to_mfn(xen_start_info->console.domU.mfn);
         } else {
 #ifdef CONFIG_SMP
-                xen_cpu_initialized_map = cpu_online_map;
+                BUG_ON(xen_cpu_initialized_map == NULL);
+                cpumask_copy(xen_cpu_initialized_map, cpu_online_mask);
 #endif
                 xen_vcpu_restore();
         }
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index c9f7cda48ed7..14f240623497 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -132,8 +132,7 @@ static void do_stolen_accounting(void)
         *snap = state;
 
         /* Add the appropriate number of ticks of stolen time,
-           including any left-overs from last time.  Passing NULL to
-           account_steal_time accounts the time as stolen. */
+           including any left-overs from last time. */
         stolen = runnable + offline + __get_cpu_var(residual_stolen);
 
         if (stolen < 0)
@@ -141,11 +140,10 @@ static void do_stolen_accounting(void)
 
         ticks = iter_div_u64_rem(stolen, NS_PER_TICK, &stolen);
         __get_cpu_var(residual_stolen) = stolen;
-        account_steal_time(NULL, ticks);
+        account_steal_ticks(ticks);
 
         /* Add the appropriate number of ticks of blocked time,
-           including any left-overs from last time.  Passing idle to
-           account_steal_time accounts the time as idle/wait. */
+           including any left-overs from last time. */
         blocked += __get_cpu_var(residual_blocked);
 
         if (blocked < 0)
@@ -153,7 +151,7 @@ static void do_stolen_accounting(void)
 
         ticks = iter_div_u64_rem(blocked, NS_PER_TICK, &blocked);
         __get_cpu_var(residual_blocked) = blocked;
-        account_steal_time(idle_task(smp_processor_id()), ticks);
+        account_idle_ticks(ticks);
 }
 
 /*
@@ -437,7 +435,7 @@ void xen_setup_timer(int cpu)
         evt = &per_cpu(xen_clock_events, cpu);
         memcpy(evt, xen_clockevent, sizeof(*evt));
 
-        evt->cpumask = cpumask_of_cpu(cpu);
+        evt->cpumask = cpumask_of(cpu);
         evt->irq = irq;
 
         setup_runstate_info(cpu);
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 9e1afae8461f..c1f8faf0a2c5 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -58,7 +58,7 @@ void __init xen_init_spinlocks(void);
 __cpuinit void xen_init_lock_cpu(int cpu);
 void xen_uninit_lock_cpu(int cpu);
 
-extern cpumask_t xen_cpu_initialized_map;
+extern cpumask_var_t xen_cpu_initialized_map;
 #else
 static inline void xen_smp_init(void) {}
 #endif
diff --git a/arch/xtensa/kernel/init_task.c b/arch/xtensa/kernel/init_task.c
index 3df469dbe814..e07f5c9fcd35 100644
--- a/arch/xtensa/kernel/init_task.c
+++ b/arch/xtensa/kernel/init_task.c
@@ -21,7 +21,6 @@
 
 #include <asm/uaccess.h>
 
-static struct fs_struct init_fs = INIT_FS;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/xtensa/platforms/iss/network.c b/arch/xtensa/platforms/iss/network.c
index 11a20adc1409..64f057d89e73 100644
--- a/arch/xtensa/platforms/iss/network.c
+++ b/arch/xtensa/platforms/iss/network.c
@@ -365,7 +365,7 @@ static int tuntap_probe(struct iss_net_private *lp, int index, char *init)
 
 static int iss_net_rx(struct net_device *dev)
 {
-        struct iss_net_private *lp = dev->priv;
+        struct iss_net_private *lp = netdev_priv(dev);
         int pkt_len;
         struct sk_buff *skb;
 
@@ -456,7 +456,7 @@ static void iss_net_timer(unsigned long priv)
 
 static int iss_net_open(struct net_device *dev)
 {
-        struct iss_net_private *lp = dev->priv;
+        struct iss_net_private *lp = netdev_priv(dev);
         char addr[sizeof "255.255.255.255\0"];
         int err;
 
@@ -496,7 +496,7 @@ out:
 
 static int iss_net_close(struct net_device *dev)
 {
-        struct iss_net_private *lp = dev->priv;
+        struct iss_net_private *lp = netdev_priv(dev);
 printk("iss_net_close!\n");
         netif_stop_queue(dev);
         spin_lock(&lp->lock);
@@ -515,7 +515,7 @@ printk("iss_net_close!\n");
 
 static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
-        struct iss_net_private *lp = dev->priv;
+        struct iss_net_private *lp = netdev_priv(dev);
         unsigned long flags;
         int len;
 
@@ -551,7 +551,7 @@ static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
 
 static struct net_device_stats *iss_net_get_stats(struct net_device *dev)
 {
-        struct iss_net_private *lp = dev->priv;
+        struct iss_net_private *lp = netdev_priv(dev);
         return &lp->stats;
 }
 
@@ -578,7 +578,7 @@ static void iss_net_tx_timeout(struct net_device *dev)
 static int iss_net_set_mac(struct net_device *dev, void *addr)
 {
 #if 0
-        struct iss_net_private *lp = dev->priv;
+        struct iss_net_private *lp = netdev_priv(dev);
         struct sockaddr *hwaddr = addr;
 
         spin_lock(&lp->lock);
@@ -592,7 +592,7 @@ static int iss_net_set_mac(struct net_device *dev, void *addr)
 static int iss_net_change_mtu(struct net_device *dev, int new_mtu)
 {
 #if 0
-        struct iss_net_private *lp = dev->priv;
+        struct iss_net_private *lp = netdev_priv(dev);
         int err = 0;
 
         spin_lock(&lp->lock);
@@ -636,7 +636,7 @@ static int iss_net_configure(int index, char *init)
 
         /* Initialize private element. */
 
-        lp = dev->priv;
+        lp = netdev_priv(dev);
         *lp = ((struct iss_net_private) {
                 .device_list            = LIST_HEAD_INIT(lp->device_list),
                 .opened_list            = LIST_HEAD_INIT(lp->opened_list),
@@ -660,10 +660,7 @@ static int iss_net_configure(int index, char *init)
 
         printk(KERN_INFO "Netdevice %d ", index);
         if (lp->have_mac)
-                printk("(%02x:%02x:%02x:%02x:%02x:%02x) ",
-                                lp->mac[0], lp->mac[1],
-                                lp->mac[2], lp->mac[3],
-                                lp->mac[4], lp->mac[5]);
+                printk("(%pM) ", lp->mac);
         printk(": ");
 
         /* sysfs register */