2 files changed, 58 insertions, 28 deletions

diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index d91efe1dc2d1..fecbe9adc9e0 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -36,8 +36,6 @@
 #include <asm/machdep.h>
 #include <asm/pci-bridge.h>
 
-#include <syslib/mpc52xx_pci.h>
-
 
 extern int powersave_nap;
 
@@ -99,34 +97,23 @@ lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
 static void __init
 lite5200_setup_cpu(void)
 {
-        struct mpc52xx_cdm  __iomem *cdm;
         struct mpc52xx_gpio __iomem *gpio;
         struct mpc52xx_intr __iomem *intr;
-        struct mpc52xx_xlb  __iomem *xlb;
 
         u32 port_config;
         u32 intr_ctrl;
 
         /* Map zones */
-        cdm  = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
         gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
-        xlb  = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
         intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
 
-        if (!cdm || !gpio || !xlb || !intr) {
-                printk("lite5200.c: Error while mapping CDM/GPIO/XLB/INTR during"
-                                "lite5200_setup_cpu\n");
+        if (!gpio || !intr) {
+                printk(KERN_ERR __FILE__ ": "
+                        "Error while mapping GPIO/INTR during "
+                        "lite5200_setup_cpu\n");
                 goto unmap_regs;
         }
 
-        /* Use internal 48 Mhz */
-        out_8(&cdm->ext_48mhz_en, 0x00);
-        out_8(&cdm->fd_enable, 0x01);
-        if (in_be32(&cdm->rstcfg) & 0x40)       /* Assumes 33Mhz clock */
-                out_be16(&cdm->fd_counters, 0x0001);
-        else
-                out_be16(&cdm->fd_counters, 0x5555);
-
         /* Get port mux config */
         port_config = in_be32(&gpio->port_config);
 
@@ -137,17 +124,13 @@ lite5200_setup_cpu(void)
         port_config &= ~0x00007000;     /* Differential mode - USB1 only */
         port_config |=  0x00001000;
 
+        /* ATA CS is on csb_4/5 */
+        port_config &= ~0x03000000;
+        port_config |=  0x01000000;
+
         /* Commit port config */
         out_be32(&gpio->port_config, port_config);
 
-        /* Configure the XLB Arbiter */
-        out_be32(&xlb->master_pri_enable, 0xff);
-        out_be32(&xlb->master_priority, 0x11111111);
-
-        /* Enable ram snooping for 1GB window */
-        out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
-        out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
-
         /* IRQ[0-3] setup */
         intr_ctrl = in_be32(&intr->ctrl);
         intr_ctrl &= ~0x00ff0000;
@@ -163,9 +146,7 @@ lite5200_setup_cpu(void)
 
         /* Unmap reg zone */
 unmap_regs:
-        if (cdm)  iounmap(cdm);
         if (gpio) iounmap(gpio);
-        if (xlb)  iounmap(xlb);
         if (intr) iounmap(intr);
 }
 
@@ -173,7 +154,8 @@ static void __init
 lite5200_setup_arch(void)
 {
         /* CPU & Port mux setup */
-        lite5200_setup_cpu();
+        mpc52xx_setup_cpu();    /* Generic */
+        lite5200_setup_cpu();   /* Platform specific */
 
 #ifdef CONFIG_PCI
         /* PCI Bridge setup */
diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c
index 2ee48ce0a517..ee6379bb415e 100644
--- a/arch/ppc/syslib/mpc52xx_setup.c
+++ b/arch/ppc/syslib/mpc52xx_setup.c
@@ -24,6 +24,8 @@
 #include <asm/pgtable.h>
 #include <asm/ppcboot.h>
 
+#include <syslib/mpc52xx_pci.h>
+
 extern bd_t __res;
 
 static int core_mult[] = {              /* CPU Frequency multiplier, taken    */
@@ -216,6 +218,52 @@ mpc52xx_calibrate_decr(void)
         tb_to_us = mulhwu_scale_factor(xlbfreq / divisor, 1000000);
 }
 
+
+void __init
+mpc52xx_setup_cpu(void)
+{
+        struct mpc52xx_cdm  __iomem *cdm;
+        struct mpc52xx_xlb  __iomem *xlb;
+
+        /* Map zones */
+        cdm  = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
+        xlb  = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
+
+        if (!cdm || !xlb) {
+                printk(KERN_ERR __FILE__ ": "
+                        "Error while mapping CDM/XLB during "
+                        "mpc52xx_setup_cpu\n");
+                goto unmap_regs;
+        }
+
+        /* Use internal 48 Mhz */
+        out_8(&cdm->ext_48mhz_en, 0x00);
+        out_8(&cdm->fd_enable, 0x01);
+        if (in_be32(&cdm->rstcfg) & 0x40)       /* Assumes 33Mhz clock */
+                out_be16(&cdm->fd_counters, 0x0001);
+        else
+                out_be16(&cdm->fd_counters, 0x5555);
+
+        /* Configure the XLB Arbiter priorities */
+        out_be32(&xlb->master_pri_enable, 0xff);
+        out_be32(&xlb->master_priority, 0x11111111);
+
+        /* Enable ram snooping for 1GB window */
+        out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
+        out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
+
+        /* Disable XLB pipelining */
+        /* (cfr errate 292. We could do this only just before ATA PIO
+            transaction and re-enable it after ...) */
+        out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
+
+        /* Unmap reg zone */
+unmap_regs:
+        if (cdm)  iounmap(cdm);
+        if (xlb)  iounmap(xlb);
+}
+
+
 int mpc52xx_match_psc_function(int psc_idx, const char *func)
 {
         struct mpc52xx_psc_func *cf = mpc52xx_psc_functions;