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-rw-r--r--arch/arm/mach-imx/cpufreq.c1
-rw-r--r--arch/arm/mach-omap1/board-h2.c45
-rw-r--r--arch/arm/mach-omap1/board-h3.c39
-rw-r--r--arch/arm/mach-omap1/board-osk.c64
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1110.c1
-rw-r--r--arch/arm/plat-omap/cpu-omap.c1
-rw-r--r--arch/blackfin/mach-bf533/cpu.c2
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c2
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c2
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c2
-rw-r--r--arch/i386/Kconfig26
-rw-r--r--arch/ia64/hp/sim/simscsi.c9
-rw-r--r--arch/ia64/kernel/cpufreq/acpi-cpufreq.c2
-rw-r--r--arch/ia64/sn/kernel/tiocx.c3
-rw-r--r--arch/m68k/atari/atakeyb.c104
-rw-r--r--arch/mips/kernel/smp.c6
-rw-r--r--arch/mips/mm/tlbex.c96
-rw-r--r--arch/powerpc/kernel/of_device.c37
-rw-r--r--arch/powerpc/kernel/vio.c16
-rw-r--r--arch/powerpc/platforms/52xx/lite5200.c14
-rw-r--r--arch/powerpc/platforms/cell/cbe_cpufreq.c2
-rw-r--r--arch/powerpc/platforms/pasemi/cpufreq.c2
-rw-r--r--arch/powerpc/platforms/powermac/cpufreq_32.c1
-rw-r--r--arch/powerpc/platforms/powermac/cpufreq_64.c1
-rw-r--r--arch/powerpc/platforms/ps3/system-bus.c10
-rw-r--r--arch/s390/appldata/appldata_base.c59
-rw-r--r--arch/s390/kernel/audit.c7
-rw-r--r--arch/s390/kernel/audit.h15
-rw-r--r--arch/s390/kernel/compat_audit.c1
-rw-r--r--arch/s390/kernel/cpcmd.c100
-rw-r--r--arch/s390/kernel/dis.c5
-rw-r--r--arch/s390/kernel/ipl.c4
-rw-r--r--arch/s390/kernel/vmlinux.lds.S234
-rw-r--r--arch/s390/mm/fault.c2
-rw-r--r--arch/sh/Kconfig53
-rw-r--r--arch/sh/Kconfig.debug6
-rw-r--r--arch/sh/Makefile4
-rw-r--r--arch/sh/boards/hp6xx/hp6xx_apm.c9
-rw-r--r--arch/sh/boards/hp6xx/setup.c35
-rw-r--r--arch/sh/boards/magicpanelr2/Kconfig13
-rw-r--r--arch/sh/boards/magicpanelr2/Makefile5
-rw-r--r--arch/sh/boards/magicpanelr2/setup.c394
-rw-r--r--arch/sh/boards/mpc1211/setup.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/Makefile5
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780mp.c61
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780rp.c6
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7785rp.c46
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c70
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/Kconfig19
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/irq.c179
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c95
-rw-r--r--arch/sh/boards/renesas/x3proto/Makefile1
-rw-r--r--arch/sh/boards/renesas/x3proto/ilsel.c151
-rw-r--r--arch/sh/boards/renesas/x3proto/setup.c136
-rw-r--r--arch/sh/boards/se/7206/io.c31
-rw-r--r--arch/sh/boards/se/7206/setup.c19
-rw-r--r--arch/sh/boards/se/7343/irq.c7
-rw-r--r--arch/sh/boards/se/7343/setup.c2
-rw-r--r--arch/sh/boards/se/770x/setup.c10
-rw-r--r--arch/sh/boards/se/7722/setup.c9
-rw-r--r--arch/sh/boards/se/7751/setup.c11
-rw-r--r--arch/sh/boards/se/7780/irq.c28
-rw-r--r--arch/sh/boards/se/7780/setup.c7
-rw-r--r--arch/sh/boards/sh03/setup.c28
-rw-r--r--arch/sh/boards/shmin/setup.c26
-rw-r--r--arch/sh/boards/snapgear/setup.c30
-rw-r--r--arch/sh/boards/titan/setup.c30
-rw-r--r--arch/sh/cchips/Kconfig13
-rw-r--r--arch/sh/cchips/hd6446x/hd64461.c13
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/setup.c7
-rw-r--r--arch/sh/cchips/voyagergx/irq.c188
-rw-r--r--arch/sh/configs/dreamcast_defconfig155
-rw-r--r--arch/sh/configs/hp6xx_defconfig559
-rw-r--r--arch/sh/configs/magicpanelr2_defconfig925
-rw-r--r--arch/sh/configs/rts7751r2d1_defconfig (renamed from arch/sh/configs/rts7751r2d_defconfig)472
-rw-r--r--arch/sh/configs/rts7751r2dplus_defconfig1167
-rw-r--r--arch/sh/configs/se7206_defconfig223
-rw-r--r--arch/sh/configs/shx3_defconfig456
-rw-r--r--arch/sh/drivers/dma/Kconfig1
-rw-r--r--arch/sh/drivers/dma/dma-sh.c13
-rw-r--r--arch/sh/drivers/heartbeat.c70
-rw-r--r--arch/sh/drivers/pci/ops-rts7751r2d.c8
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c13
-rw-r--r--arch/sh/kernel/cpu/clock.c2
-rw-r--r--arch/sh/kernel/cpu/init.c27
-rw-r--r--arch/sh/kernel/cpu/irq/Makefile4
-rw-r--r--arch/sh/kernel/cpu/irq/intc.c562
-rw-r--r--arch/sh/kernel/cpu/irq/intc2.c86
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c19
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c93
-rw-r--r--arch/sh/kernel/cpu/sh2a/probe.c18
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c217
-rw-r--r--arch/sh/kernel/cpu/sh3/Makefile10
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c48
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c172
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7708.c43
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7709.c145
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c224
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c200
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c210
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c178
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c54
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c253
-rw-r--r--arch/sh/kernel/cpu/sh4/sq.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c38
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c91
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c304
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c234
-rw-r--r--arch/sh/kernel/cpu/sh4a/smp-shx3.c120
-rw-r--r--arch/sh/kernel/cpufreq.c4
-rw-r--r--arch/sh/kernel/early_printk.c49
-rw-r--r--arch/sh/kernel/entry-common.S2
-rw-r--r--arch/sh/kernel/head.S18
-rw-r--r--arch/sh/kernel/kgdb_stub.c53
-rw-r--r--arch/sh/kernel/process.c8
-rw-r--r--arch/sh/kernel/setup.c15
-rw-r--r--arch/sh/kernel/sh_ksyms.c18
-rw-r--r--arch/sh/kernel/signal.c10
-rw-r--r--arch/sh/kernel/smp.c307
-rw-r--r--arch/sh/kernel/syscalls.S18
-rw-r--r--arch/sh/kernel/timers/timer-tmu.c3
-rw-r--r--arch/sh/kernel/traps.c5
-rw-r--r--arch/sh/kernel/vmlinux.lds.S10
-rw-r--r--arch/sh/mm/Kconfig67
-rw-r--r--arch/sh/mm/Makefile23
-rw-r--r--arch/sh/mm/cache-sh4.c81
-rw-r--r--arch/sh/mm/copy_page.S169
-rw-r--r--arch/sh/mm/fault-nommu.c64
-rw-r--r--arch/sh/mm/pmb.c2
-rw-r--r--arch/sh/mm/tlb-sh4.c55
-rw-r--r--arch/sh64/Kconfig51
-rw-r--r--arch/sh64/Kconfig.debug13
-rw-r--r--arch/sh64/Makefile6
-rw-r--r--arch/sh64/configs/cayman_defconfig258
-rw-r--r--arch/sh64/configs/harp_defconfig756
-rw-r--r--arch/sh64/configs/sim_defconfig566
-rw-r--r--arch/sh64/kernel/Makefile2
-rw-r--r--arch/sh64/kernel/alphanum.c1
-rw-r--r--arch/sh64/kernel/sh_ksyms.c32
-rw-r--r--arch/sh64/kernel/time.c14
-rw-r--r--arch/sh64/kernel/vmlinux.lds.S60
-rw-r--r--arch/sh64/lib/c-checksum.c3
-rw-r--r--arch/sh64/lib/io.c29
-rw-r--r--arch/sh64/lib/iomap.c10
-rw-r--r--arch/sh64/mach-cayman/setup.c10
-rw-r--r--arch/sh64/mach-harp/Makefile13
-rw-r--r--arch/sh64/mach-harp/setup.c25
-rw-r--r--arch/sh64/mach-romram/Makefile14
-rw-r--r--arch/sh64/mach-romram/setup.c141
-rw-r--r--arch/sh64/mach-sim/Makefile13
-rw-r--r--arch/sh64/mach-sim/setup.c53
-rw-r--r--arch/sh64/mm/Makefile4
-rw-r--r--arch/sh64/mm/consistent.c (renamed from arch/sh64/kernel/pci-dma.c)4
-rw-r--r--arch/sh64/mm/init.c4
-rw-r--r--arch/sh64/mm/ioremap.c7
-rw-r--r--arch/sparc/Kconfig.debug4
-rw-r--r--arch/sparc/kernel/irq.c12
-rw-r--r--arch/sparc/kernel/of_device.c5
-rw-r--r--arch/sparc/kernel/time.c4
-rw-r--r--arch/sparc/kernel/vmlinux.lds.S165
-rw-r--r--arch/sparc64/defconfig38
-rw-r--r--arch/sparc64/kernel/Makefile1
-rw-r--r--arch/sparc64/kernel/auxio.c4
-rw-r--r--arch/sparc64/kernel/entry.S14
-rw-r--r--arch/sparc64/kernel/irq.c610
-rw-r--r--arch/sparc64/kernel/of_device.c5
-rw-r--r--arch/sparc64/kernel/pci.c60
-rw-r--r--arch/sparc64/kernel/pci_fire.c279
-rw-r--r--arch/sparc64/kernel/pci_impl.h32
-rw-r--r--arch/sparc64/kernel/pci_msi.c433
-rw-r--r--arch/sparc64/kernel/pci_psycho.c6
-rw-r--r--arch/sparc64/kernel/pci_schizo.c3
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c405
-rw-r--r--arch/sparc64/kernel/power.c4
-rw-r--r--arch/sparc64/kernel/sun4v_ivec.S22
-rw-r--r--arch/sparc64/kernel/sys_sparc.c15
-rw-r--r--arch/sparc64/kernel/time.c4
-rw-r--r--arch/sparc64/kernel/traps.c4
-rw-r--r--arch/sparc64/kernel/us2e_cpufreq.c1
-rw-r--r--arch/sparc64/kernel/vmlinux.lds.S211
-rw-r--r--arch/sparc64/lib/xor.S12
-rw-r--r--arch/sparc64/mm/init.c2
-rw-r--r--arch/um/Makefile6
-rw-r--r--arch/um/Makefile-i3868
-rw-r--r--arch/um/Makefile-x86_643
-rw-r--r--arch/um/scripts/Makefile.rules2
-rw-r--r--arch/um/sys-i386/Makefile6
-rw-r--r--arch/um/sys-x86_64/Makefile4
-rw-r--r--arch/x86/kernel/Makefile_326
-rw-r--r--arch/x86/kernel/Makefile_644
-rw-r--r--arch/x86/kernel/alternative.c1
-rw-r--r--arch/x86/kernel/apic_64.c372
-rw-r--r--arch/x86/kernel/bugs_64.c2
-rw-r--r--arch/x86/kernel/cpu/bugs.c2
-rw-r--r--arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/e_powersaver.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/elanfreq.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/gx-suspmod.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/longhaul.c5
-rw-r--r--arch/x86/kernel/cpu/cpufreq/p4-clockmod.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k6.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k7.c2
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k8.c13
-rw-r--r--arch/x86/kernel/cpu/cpufreq/sc520_freq.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-ich.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-smi.c1
-rw-r--r--arch/x86/kernel/cpuid.c2
-rw-r--r--arch/x86/kernel/crash_dump_32.c2
-rw-r--r--arch/x86/kernel/crash_dump_64.c2
-rw-r--r--arch/x86/kernel/geode_32.c4
-rw-r--r--arch/x86/kernel/head64.c2
-rw-r--r--arch/x86/kernel/hpet.c (renamed from arch/x86/kernel/hpet_32.c)250
-rw-r--r--arch/x86/kernel/hpet_64.c493
-rw-r--r--arch/x86/kernel/i387_32.c2
-rw-r--r--arch/x86/kernel/i387_64.c2
-rw-r--r--arch/x86/kernel/i8237.c2
-rw-r--r--arch/x86/kernel/i8253.c (renamed from arch/x86/kernel/i8253_32.c)6
-rw-r--r--arch/x86/kernel/i8259_32.c1
-rw-r--r--arch/x86/kernel/i8259_64.c46
-rw-r--r--arch/x86/kernel/ioport_32.c2
-rw-r--r--arch/x86/kernel/ioport_64.c2
-rw-r--r--arch/x86/kernel/irq_32.c2
-rw-r--r--arch/x86/kernel/irq_64.c2
-rw-r--r--arch/x86/kernel/kprobes_32.c1
-rw-r--r--arch/x86/kernel/kprobes_64.c1
-rw-r--r--arch/x86/kernel/ldt_32.c2
-rw-r--r--arch/x86/kernel/ldt_64.c2
-rw-r--r--arch/x86/kernel/machine_kexec_32.c2
-rw-r--r--arch/x86/kernel/machine_kexec_64.c2
-rw-r--r--arch/x86/kernel/mca_32.c1
-rw-r--r--arch/x86/kernel/mfgpt_32.c362
-rw-r--r--arch/x86/kernel/msr.c2
-rw-r--r--arch/x86/kernel/nmi_32.c5
-rw-r--r--arch/x86/kernel/nmi_64.c4
-rw-r--r--arch/x86/kernel/pci-dma_32.c3
-rw-r--r--arch/x86/kernel/pci-dma_64.c1
-rw-r--r--arch/x86/kernel/process_32.c2
-rw-r--r--arch/x86/kernel/process_64.c6
-rw-r--r--arch/x86/kernel/ptrace_32.c1
-rw-r--r--arch/x86/kernel/ptrace_64.c1
-rw-r--r--arch/x86/kernel/quirks.c205
-rw-r--r--arch/x86/kernel/reboot_32.c4
-rw-r--r--arch/x86/kernel/reboot_fixups_32.c8
-rw-r--r--arch/x86/kernel/scx200_32.c12
-rw-r--r--arch/x86/kernel/setup_32.c2
-rw-r--r--arch/x86/kernel/setup_64.c39
-rw-r--r--arch/x86/kernel/signal_32.c2
-rw-r--r--arch/x86/kernel/signal_64.c2
-rw-r--r--arch/x86/kernel/smpboot_64.c11
-rw-r--r--arch/x86/kernel/stacktrace.c2
-rw-r--r--arch/x86/kernel/summit_32.c2
-rw-r--r--arch/x86/kernel/sys_i386_32.c2
-rw-r--r--arch/x86/kernel/sys_x86_64.c4
-rw-r--r--arch/x86/kernel/sysenter_32.c2
-rw-r--r--arch/x86/kernel/time_32.c5
-rw-r--r--arch/x86/kernel/time_64.c179
-rw-r--r--arch/x86/kernel/topology.c2
-rw-r--r--arch/x86/kernel/traps_32.c2
-rw-r--r--arch/x86/kernel/traps_64.c2
-rw-r--r--arch/x86/kernel/tsc_32.c6
-rw-r--r--arch/x86/kernel/tsc_64.c93
-rw-r--r--arch/x86/kernel/tsc_sync.c2
-rw-r--r--arch/x86/kernel/vm86_32.c2
-rw-r--r--arch/x86/kernel/vsyscall_64.c2
-rw-r--r--arch/x86/lib/copy_user_nocache_64.S1
-rw-r--r--arch/x86/pci/acpi.c194
-rw-r--r--arch/x86/pci/common.c19
-rw-r--r--arch/x86/pci/fixup.c47
-rw-r--r--arch/x86/pci/i386.c13
-rw-r--r--arch/x86/pci/irq.c39
-rw-r--r--arch/x86/pci/pci.h2
-rw-r--r--arch/x86_64/Kconfig19
277 files changed, 12148 insertions, 5966 deletions
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index 467d899fbe75..e548ba74a4d2 100644
--- a/arch/arm/mach-imx/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -269,7 +269,6 @@ static int __init imx_cpufreq_driver_init(struct cpufreq_policy *policy)
269 return -EINVAL; 269 return -EINVAL;
270 270
271 policy->cur = policy->min = policy->max = imx_get_speed(0); 271 policy->cur = policy->min = policy->max = imx_get_speed(0);
272 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
273 policy->cpuinfo.min_freq = 8000; 272 policy->cpuinfo.min_freq = 8000;
274 policy->cpuinfo.max_freq = 200000; 273 policy->cpuinfo.max_freq = 200000;
275 /* Manual states, that PLL stabilizes in two CLK32 periods */ 274 /* Manual states, that PLL stabilizes in two CLK32 periods */
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 48c8c9195dc3..2f8f6ecf111f 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -20,22 +20,23 @@
20 */ 20 */
21 21
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/platform_device.h> 23#include <linux/platform_device.h>
25#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/i2c.h>
26#include <linux/mtd/mtd.h> 26#include <linux/mtd/mtd.h>
27#include <linux/mtd/nand.h> 27#include <linux/mtd/nand.h>
28#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
29#include <linux/input.h> 29#include <linux/input.h>
30#include <linux/workqueue.h>
31 30
32#include <asm/hardware.h> 31#include <asm/hardware.h>
32#include <asm/gpio.h>
33
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
35#include <asm/mach/flash.h> 36#include <asm/mach/flash.h>
36#include <asm/mach/map.h> 37#include <asm/mach/map.h>
37 38
38#include <asm/arch/gpio.h> 39#include <asm/arch/tps65010.h>
39#include <asm/arch/mux.h> 40#include <asm/arch/mux.h>
40#include <asm/arch/tc.h> 41#include <asm/arch/tc.h>
41#include <asm/arch/irda.h> 42#include <asm/arch/irda.h>
@@ -277,6 +278,20 @@ static struct platform_device *h2_devices[] __initdata = {
277 &h2_mcbsp1_device, 278 &h2_mcbsp1_device,
278}; 279};
279 280
281static struct i2c_board_info __initdata h2_i2c_board_info[] = {
282 {
283 I2C_BOARD_INFO("tps65010", 0x48),
284 .type = "tps65010",
285 .irq = OMAP_GPIO_IRQ(58),
286 },
287 /* TODO when driver support is ready:
288 * - isp1301 OTG transceiver
289 * - optional ov9640 camera sensor at 0x30
290 * - pcf9754 for aGPS control
291 * - ... etc
292 */
293};
294
280static void __init h2_init_smc91x(void) 295static void __init h2_init_smc91x(void)
281{ 296{
282 if ((omap_request_gpio(0)) < 0) { 297 if ((omap_request_gpio(0)) < 0) {
@@ -367,6 +382,14 @@ static void __init h2_init(void)
367 omap_board_config = h2_config; 382 omap_board_config = h2_config;
368 omap_board_config_size = ARRAY_SIZE(h2_config); 383 omap_board_config_size = ARRAY_SIZE(h2_config);
369 omap_serial_init(); 384 omap_serial_init();
385
386 /* irq for tps65010 chip */
387 omap_cfg_reg(W4_GPIO58);
388 if (gpio_request(58, "tps65010") == 0)
389 gpio_direction_input(58);
390
391 i2c_register_board_info(1, h2_i2c_board_info,
392 ARRAY_SIZE(h2_i2c_board_info));
370} 393}
371 394
372static void __init h2_map_io(void) 395static void __init h2_map_io(void)
@@ -374,6 +397,22 @@ static void __init h2_map_io(void)
374 omap1_map_common_io(); 397 omap1_map_common_io();
375} 398}
376 399
400#ifdef CONFIG_TPS65010
401static int __init h2_tps_init(void)
402{
403 if (!machine_is_omap_h2())
404 return 0;
405
406 /* gpio3 for SD, gpio4 for VDD_DSP */
407 /* FIXME send power to DSP iff it's configured */
408
409 /* Enable LOW_PWR */
410 tps65010_set_low_pwr(ON);
411 return 0;
412}
413fs_initcall(h2_tps_init);
414#endif
415
377MACHINE_START(OMAP_H2, "TI-H2") 416MACHINE_START(OMAP_H2, "TI-H2")
378 /* Maintainer: Imre Deak <imre.deak@nokia.com> */ 417 /* Maintainer: Imre Deak <imre.deak@nokia.com> */
379 .phys_io = 0xfff00000, 418 .phys_io = 0xfff00000,
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 79d4ef4c54d4..add2f703204f 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -21,6 +21,7 @@
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/errno.h> 22#include <linux/errno.h>
23#include <linux/workqueue.h> 23#include <linux/workqueue.h>
24#include <linux/i2c.h>
24#include <linux/mtd/mtd.h> 25#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h> 26#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
@@ -29,12 +30,14 @@
29#include <asm/setup.h> 30#include <asm/setup.h>
30#include <asm/page.h> 31#include <asm/page.h>
31#include <asm/hardware.h> 32#include <asm/hardware.h>
33#include <asm/gpio.h>
34
32#include <asm/mach-types.h> 35#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
34#include <asm/mach/flash.h> 37#include <asm/mach/flash.h>
35#include <asm/mach/map.h> 38#include <asm/mach/map.h>
36 39
37#include <asm/arch/gpio.h> 40#include <asm/arch/tps65010.h>
38#include <asm/arch/gpioexpander.h> 41#include <asm/arch/gpioexpander.h>
39#include <asm/arch/irqs.h> 42#include <asm/arch/irqs.h>
40#include <asm/arch/mux.h> 43#include <asm/arch/mux.h>
@@ -413,6 +416,19 @@ static struct omap_board_config_kernel h3_config[] = {
413 { OMAP_TAG_LCD, &h3_lcd_config }, 416 { OMAP_TAG_LCD, &h3_lcd_config },
414}; 417};
415 418
419static struct i2c_board_info __initdata h3_i2c_board_info[] = {
420 {
421 I2C_BOARD_INFO("tps65010", 0x48),
422 .type = "tps65013",
423 /* .irq = OMAP_GPIO_IRQ(??), */
424 },
425 /* TODO when driver support is ready:
426 * - isp1301 OTG transceiver
427 * - optional ov9640 camera sensor at 0x30
428 * - ...
429 */
430};
431
416#define H3_NAND_RB_GPIO_PIN 10 432#define H3_NAND_RB_GPIO_PIN 10
417 433
418static int nand_dev_ready(struct nand_platform_data *data) 434static int nand_dev_ready(struct nand_platform_data *data)
@@ -446,6 +462,10 @@ static void __init h3_init(void)
446 omap_board_config = h3_config; 462 omap_board_config = h3_config;
447 omap_board_config_size = ARRAY_SIZE(h3_config); 463 omap_board_config_size = ARRAY_SIZE(h3_config);
448 omap_serial_init(); 464 omap_serial_init();
465
466 /* FIXME setup irq for tps65013 chip */
467 i2c_register_board_info(1, h3_i2c_board_info,
468 ARRAY_SIZE(h3_i2c_board_info));
449} 469}
450 470
451static void __init h3_init_smc91x(void) 471static void __init h3_init_smc91x(void)
@@ -470,6 +490,23 @@ static void __init h3_map_io(void)
470 omap1_map_common_io(); 490 omap1_map_common_io();
471} 491}
472 492
493#ifdef CONFIG_TPS65010
494static int __init h3_tps_init(void)
495{
496 if (!machine_is_omap_h3())
497 return 0;
498
499 /* gpio4 for SD, gpio3 for VDD_DSP */
500 /* FIXME send power to DSP iff it's configured */
501
502 /* Enable LOW_PWR */
503 tps65013_set_low_pwr(ON);
504
505 return 0;
506}
507fs_initcall(h3_tps_init);
508#endif
509
473MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") 510MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
474 /* Maintainer: Texas Instruments, Inc. */ 511 /* Maintainer: Texas Instruments, Inc. */
475 .phys_io = 0xfff00000, 512 .phys_io = 0xfff00000,
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index e7130293a03f..a61bf455ee02 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -31,18 +31,21 @@
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/irq.h> 32#include <linux/irq.h>
33#include <linux/interrupt.h> 33#include <linux/interrupt.h>
34#include <linux/i2c.h>
34 35
35#include <linux/mtd/mtd.h> 36#include <linux/mtd/mtd.h>
36#include <linux/mtd/partitions.h> 37#include <linux/mtd/partitions.h>
37 38
38#include <asm/hardware.h> 39#include <asm/hardware.h>
40#include <asm/gpio.h>
41
39#include <asm/mach-types.h> 42#include <asm/mach-types.h>
40#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
41#include <asm/mach/map.h> 44#include <asm/mach/map.h>
42#include <asm/mach/flash.h> 45#include <asm/mach/flash.h>
43 46
44#include <asm/arch/gpio.h>
45#include <asm/arch/usb.h> 47#include <asm/arch/usb.h>
48#include <asm/arch/tps65010.h>
46#include <asm/arch/mux.h> 49#include <asm/arch/mux.h>
47#include <asm/arch/tc.h> 50#include <asm/arch/tc.h>
48#include <asm/arch/common.h> 51#include <asm/arch/common.h>
@@ -179,6 +182,19 @@ static struct platform_device *osk5912_devices[] __initdata = {
179 &osk5912_mcbsp1_device, 182 &osk5912_mcbsp1_device,
180}; 183};
181 184
185static struct i2c_board_info __initdata osk_i2c_board_info[] = {
186 {
187 I2C_BOARD_INFO("tps65010", 0x48),
188 .type = "tps65010",
189 .irq = OMAP_GPIO_IRQ(OMAP_MPUIO(1)),
190 },
191 /* TODO when driver support is ready:
192 * - aic23 audio chip at 0x1a
193 * - on Mistral, 24c04 eeprom at 0x50
194 * - optionally on Mistral, ov9640 camera sensor at 0x30
195 */
196};
197
182static void __init osk_init_smc91x(void) 198static void __init osk_init_smc91x(void)
183{ 199{
184 if ((omap_request_gpio(0)) < 0) { 200 if ((omap_request_gpio(0)) < 0) {
@@ -397,6 +413,14 @@ static void __init osk_init(void)
397 omap_board_config_size = ARRAY_SIZE(osk_config); 413 omap_board_config_size = ARRAY_SIZE(osk_config);
398 USB_TRANSCEIVER_CTRL_REG |= (3 << 1); 414 USB_TRANSCEIVER_CTRL_REG |= (3 << 1);
399 415
416 /* irq for tps65010 chip */
417 /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */
418 if (gpio_request(OMAP_MPUIO(1), "tps65010") == 0)
419 gpio_direction_input(OMAP_MPUIO(1));
420
421 i2c_register_board_info(1, osk_i2c_board_info,
422 ARRAY_SIZE(osk_i2c_board_info));
423
400 omap_serial_init(); 424 omap_serial_init();
401 osk_mistral_init(); 425 osk_mistral_init();
402} 426}
@@ -406,6 +430,44 @@ static void __init osk_map_io(void)
406 omap1_map_common_io(); 430 omap1_map_common_io();
407} 431}
408 432
433#ifdef CONFIG_TPS65010
434static int __init osk_tps_init(void)
435{
436 if (!machine_is_omap_osk())
437 return 0;
438
439 /* Let LED1 (D9) blink */
440 tps65010_set_led(LED1, BLINK);
441
442 /* Disable LED 2 (D2) */
443 tps65010_set_led(LED2, OFF);
444
445 /* Set GPIO 1 HIGH to disable VBUS power supply;
446 * OHCI driver powers it up/down as needed.
447 */
448 tps65010_set_gpio_out_value(GPIO1, HIGH);
449
450 /* Set GPIO 2 low to turn on LED D3 */
451 tps65010_set_gpio_out_value(GPIO2, HIGH);
452
453 /* Set GPIO 3 low to take ethernet out of reset */
454 tps65010_set_gpio_out_value(GPIO3, LOW);
455
456 /* gpio4 for VDD_DSP */
457 /* FIXME send power to DSP iff it's configured */
458
459 /* Enable LOW_PWR */
460 tps65010_set_low_pwr(ON);
461
462 /* Switch VLDO2 to 3.0V for AIC23 */
463 tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V
464 | TPS_LDO1_ENABLE);
465
466 return 0;
467}
468fs_initcall(osk_tps_init);
469#endif
470
409MACHINE_START(OMAP_OSK, "TI-OSK") 471MACHINE_START(OMAP_OSK, "TI-OSK")
410 /* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */ 472 /* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */
411 .phys_io = 0xfff00000, 473 .phys_io = 0xfff00000,
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c
index 78f4c1346044..36b47ff5af11 100644
--- a/arch/arm/mach-sa1100/cpu-sa1110.c
+++ b/arch/arm/mach-sa1100/cpu-sa1110.c
@@ -331,7 +331,6 @@ static int __init sa1110_cpu_init(struct cpufreq_policy *policy)
331 if (policy->cpu != 0) 331 if (policy->cpu != 0)
332 return -EINVAL; 332 return -EINVAL;
333 policy->cur = policy->min = policy->max = sa11x0_getspeed(0); 333 policy->cur = policy->min = policy->max = sa11x0_getspeed(0);
334 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
335 policy->cpuinfo.min_freq = 59000; 334 policy->cpuinfo.min_freq = 59000;
336 policy->cpuinfo.max_freq = 287000; 335 policy->cpuinfo.max_freq = 287000;
337 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 336 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index a0c71dca2373..c0d63b0c61c9 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -108,7 +108,6 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
108 if (policy->cpu != 0) 108 if (policy->cpu != 0)
109 return -EINVAL; 109 return -EINVAL;
110 policy->cur = policy->min = policy->max = omap_getspeed(0); 110 policy->cur = policy->min = policy->max = omap_getspeed(0);
111 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
112 policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; 111 policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
113 policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, VERY_HI_RATE) / 1000; 112 policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, VERY_HI_RATE) / 1000;
114 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 113 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
diff --git a/arch/blackfin/mach-bf533/cpu.c b/arch/blackfin/mach-bf533/cpu.c
index 6fd9cfd0a31b..b7a0e0fbd9af 100644
--- a/arch/blackfin/mach-bf533/cpu.c
+++ b/arch/blackfin/mach-bf533/cpu.c
@@ -118,8 +118,6 @@ static int __init __bf533_cpu_init(struct cpufreq_policy *policy)
118 if (policy->cpu != 0) 118 if (policy->cpu != 0)
119 return -EINVAL; 119 return -EINVAL;
120 120
121 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
122
123 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 121 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
124 /*Now ,only support one cpu */ 122 /*Now ,only support one cpu */
125 policy->cur = bf533_getfreq(0); 123 policy->cur = bf533_getfreq(0);
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
index 5e9d09eb8579..6668c8e4a3fc 100644
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ b/arch/blackfin/mach-bf537/boards/generic_board.c
@@ -40,7 +40,7 @@
40#include <linux/pata_platform.h> 40#include <linux/pata_platform.h>
41#include <linux/irq.h> 41#include <linux/irq.h>
42#include <linux/interrupt.h> 42#include <linux/interrupt.h>
43#include <linux/usb_sl811.h> 43#include <linux/usb/sl811.h>
44#include <asm/dma.h> 44#include <asm/dma.h>
45#include <asm/bfin5xx_spi.h> 45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h> 46#include <asm/reboot.h>
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 20507e92a3a4..f83a2544004d 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -40,7 +40,7 @@
40#include <linux/irq.h> 40#include <linux/irq.h>
41#include <asm/dma.h> 41#include <asm/dma.h>
42#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
43#include <linux/usb_sl811.h> 43#include <linux/usb/sl811.h>
44 44
45#include <linux/spi/ad7877.h> 45#include <linux/spi/ad7877.h>
46 46
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 47d7d4a0e73d..f42ba3aa86d7 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -40,7 +40,7 @@
40#include <linux/pata_platform.h> 40#include <linux/pata_platform.h>
41#include <linux/irq.h> 41#include <linux/irq.h>
42#include <linux/interrupt.h> 42#include <linux/interrupt.h>
43#include <linux/usb_sl811.h> 43#include <linux/usb/sl811.h>
44#include <asm/dma.h> 44#include <asm/dma.h>
45#include <asm/bfin5xx_spi.h> 45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h> 46#include <asm/reboot.h>
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index 2d85e4b87307..bf9aafad4978 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -214,6 +214,17 @@ config X86_ES7000
214 214
215endchoice 215endchoice
216 216
217config SCHED_NO_NO_OMIT_FRAME_POINTER
218 bool "Single-depth WCHAN output"
219 default y
220 help
221 Calculate simpler /proc/<PID>/wchan values. If this option
222 is disabled then wchan values will recurse back to the
223 caller function. This provides more accurate wchan values,
224 at the expense of slightly more scheduling overhead.
225
226 If in doubt, say "Y".
227
217config PARAVIRT 228config PARAVIRT
218 bool "Paravirtualization support (EXPERIMENTAL)" 229 bool "Paravirtualization support (EXPERIMENTAL)"
219 depends on EXPERIMENTAL 230 depends on EXPERIMENTAL
@@ -1137,6 +1148,11 @@ config PCI_MMCONFIG
1137 depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY) 1148 depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY)
1138 default y 1149 default y
1139 1150
1151config PCI_DOMAINS
1152 bool
1153 depends on PCI
1154 default y
1155
1140source "drivers/pci/pcie/Kconfig" 1156source "drivers/pci/pcie/Kconfig"
1141 1157
1142source "drivers/pci/Kconfig" 1158source "drivers/pci/Kconfig"
@@ -1206,6 +1222,16 @@ config SCx200HR_TIMER
1206 processor goes idle (as is done by the scheduler). The 1222 processor goes idle (as is done by the scheduler). The
1207 other workaround is idle=poll boot option. 1223 other workaround is idle=poll boot option.
1208 1224
1225config GEODE_MFGPT_TIMER
1226 bool "Geode Multi-Function General Purpose Timer (MFGPT) events"
1227 depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS
1228 default y
1229 help
1230 This driver provides a clock event source based on the MFGPT
1231 timer(s) in the CS5535 and CS5536 companion chip for the geode.
1232 MFGPTs have a better resolution and max interval than the
1233 generic PIT, and are suitable for use as high-res timers.
1234
1209config K8_NB 1235config K8_NB
1210 def_bool y 1236 def_bool y
1211 depends on AGP_AMD64 1237 depends on AGP_AMD64
diff --git a/arch/ia64/hp/sim/simscsi.c b/arch/ia64/hp/sim/simscsi.c
index 4552a1cf5b33..d62fa76e5a7d 100644
--- a/arch/ia64/hp/sim/simscsi.c
+++ b/arch/ia64/hp/sim/simscsi.c
@@ -372,8 +372,13 @@ simscsi_init(void)
372 return -ENOMEM; 372 return -ENOMEM;
373 373
374 error = scsi_add_host(host, NULL); 374 error = scsi_add_host(host, NULL);
375 if (!error) 375 if (error)
376 scsi_scan_host(host); 376 goto free_host;
377 scsi_scan_host(host);
378 return 0;
379
380 free_host:
381 scsi_host_put(host);
377 return error; 382 return error;
378} 383}
379 384
diff --git a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
index 8c6ec7070844..b8498ea62068 100644
--- a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
+++ b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
@@ -321,8 +321,6 @@ acpi_cpufreq_cpu_init (
321 data->acpi_data.states[i].transition_latency * 1000; 321 data->acpi_data.states[i].transition_latency * 1000;
322 } 322 }
323 } 323 }
324 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
325
326 policy->cur = processor_get_freq(data, policy->cpu); 324 policy->cur = processor_get_freq(data, policy->cpu);
327 325
328 /* table init */ 326 /* table init */
diff --git a/arch/ia64/sn/kernel/tiocx.c b/arch/ia64/sn/kernel/tiocx.c
index 5a289e4de838..a88eba3314d7 100644
--- a/arch/ia64/sn/kernel/tiocx.c
+++ b/arch/ia64/sn/kernel/tiocx.c
@@ -66,8 +66,7 @@ static int tiocx_match(struct device *dev, struct device_driver *drv)
66 66
67} 67}
68 68
69static int tiocx_uevent(struct device *dev, char **envp, int num_envp, 69static int tiocx_uevent(struct device *dev, struct kobj_uevent_env *env)
70 char *buffer, int buffer_size)
71{ 70{
72 return -ENODEV; 71 return -ENODEV;
73} 72}
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c
index 2b5f64726a2e..fbbccb5e7511 100644
--- a/arch/m68k/atari/atakeyb.c
+++ b/arch/m68k/atari/atakeyb.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/atari/atakeyb.c 2 * linux/arch/m68k/atari/atakeyb.c
3 * 3 *
4 * Atari Keyboard driver for 680x0 Linux 4 * Atari Keyboard driver for 680x0 Linux
5 * 5 *
@@ -11,6 +11,9 @@
11/* 11/*
12 * Atari support by Robert de Vries 12 * Atari support by Robert de Vries
13 * enhanced by Bjoern Brauel and Roman Hodek 13 * enhanced by Bjoern Brauel and Roman Hodek
14 *
15 * 2.6 and input cleanup (removed autorepeat stuff) for 2.6.21
16 * 06/07 Michael Schmitz
14 */ 17 */
15 18
16#include <linux/module.h> 19#include <linux/module.h>
@@ -32,7 +35,6 @@
32#include <asm/atari_joystick.h> 35#include <asm/atari_joystick.h>
33#include <asm/irq.h> 36#include <asm/irq.h>
34 37
35static void atakeyb_rep(unsigned long ignore);
36extern unsigned int keymap_count; 38extern unsigned int keymap_count;
37 39
38/* Hook for MIDI serial driver */ 40/* Hook for MIDI serial driver */
@@ -104,25 +106,6 @@ static unsigned long broken_keys[128/(sizeof(unsigned long)*8)] = { 0, };
104 * - Keypad Left/Right Parenthesis mapped to new K_PPAREN[LR] 106 * - Keypad Left/Right Parenthesis mapped to new K_PPAREN[LR]
105 */ 107 */
106 108
107static u_short ataplain_map[NR_KEYS] __initdata = {
108 0xf200, 0xf01b, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036,
109 0xf037, 0xf038, 0xf039, 0xf030, 0xf02d, 0xf03d, 0xf008, 0xf009,
110 0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xfb75, 0xfb69,
111 0xfb6f, 0xfb70, 0xf05b, 0xf05d, 0xf201, 0xf702, 0xfb61, 0xfb73,
112 0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c, 0xf03b,
113 0xf027, 0xf060, 0xf700, 0xf05c, 0xfb7a, 0xfb78, 0xfb63, 0xfb76,
114 0xfb62, 0xfb6e, 0xfb6d, 0xf02c, 0xf02e, 0xf02f, 0xf700, 0xf200,
115 0xf703, 0xf020, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
116 0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf200, 0xf200, 0xf114,
117 0xf603, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
118 0xf600, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf200, 0xf200,
119 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
120 0xf200, 0xf1ff, 0xf11b, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf307,
121 0xf308, 0xf309, 0xf304, 0xf305, 0xf306, 0xf301, 0xf302, 0xf303,
122 0xf300, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
123 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
124};
125
126typedef enum kb_state_t { 109typedef enum kb_state_t {
127 KEYBOARD, AMOUSE, RMOUSE, JOYSTICK, CLOCK, RESYNC 110 KEYBOARD, AMOUSE, RMOUSE, JOYSTICK, CLOCK, RESYNC
128} KB_STATE_T; 111} KB_STATE_T;
@@ -137,41 +120,6 @@ typedef struct keyboard_state {
137 120
138KEYBOARD_STATE kb_state; 121KEYBOARD_STATE kb_state;
139 122
140#define DEFAULT_KEYB_REP_DELAY (HZ/4)
141#define DEFAULT_KEYB_REP_RATE (HZ/25)
142
143/* These could be settable by some ioctl() in future... */
144static unsigned int key_repeat_delay = DEFAULT_KEYB_REP_DELAY;
145static unsigned int key_repeat_rate = DEFAULT_KEYB_REP_RATE;
146
147static unsigned char rep_scancode;
148static struct timer_list atakeyb_rep_timer = {
149 .function = atakeyb_rep,
150};
151
152static void atakeyb_rep(unsigned long ignore)
153{
154 /* Disable keyboard for the time we call handle_scancode(), else a race
155 * in the keyboard tty queue may happen */
156 atari_disable_irq(IRQ_MFP_ACIA);
157 del_timer(&atakeyb_rep_timer);
158
159 /* A keyboard int may have come in before we disabled the irq, so
160 * double-check whether rep_scancode is still != 0 */
161 if (rep_scancode) {
162 init_timer(&atakeyb_rep_timer);
163 atakeyb_rep_timer.expires = jiffies + key_repeat_rate;
164 add_timer(&atakeyb_rep_timer);
165
166 //handle_scancode(rep_scancode, 1);
167 if (atari_input_keyboard_interrupt_hook)
168 atari_input_keyboard_interrupt_hook(rep_scancode, 1);
169 }
170
171 atari_enable_irq(IRQ_MFP_ACIA);
172}
173
174
175/* ++roman: If a keyboard overrun happened, we can't tell in general how much 123/* ++roman: If a keyboard overrun happened, we can't tell in general how much
176 * bytes have been lost and in which state of the packet structure we are now. 124 * bytes have been lost and in which state of the packet structure we are now.
177 * This usually causes keyboards bytes to be interpreted as mouse movements 125 * This usually causes keyboards bytes to be interpreted as mouse movements
@@ -209,9 +157,6 @@ repeat:
209 /* ...happens often if interrupts were disabled for too long */ 157 /* ...happens often if interrupts were disabled for too long */
210 printk(KERN_DEBUG "Keyboard overrun\n"); 158 printk(KERN_DEBUG "Keyboard overrun\n");
211 scancode = acia.key_data; 159 scancode = acia.key_data;
212 /* Turn off autorepeating in case a break code has been lost */
213 del_timer(&atakeyb_rep_timer);
214 rep_scancode = 0;
215 if (ikbd_self_test) 160 if (ikbd_self_test)
216 /* During self test, don't do resyncing, just process the code */ 161 /* During self test, don't do resyncing, just process the code */
217 goto interpret_scancode; 162 goto interpret_scancode;
@@ -281,11 +226,12 @@ repeat:
281 * make codes instead. Therefore, simply ignore 226 * make codes instead. Therefore, simply ignore
282 * break_flag... 227 * break_flag...
283 */ 228 */
284 int keyval = plain_map[scancode], keytyp; 229 int keyval, keytyp;
285 230
286 set_bit(scancode, broken_keys); 231 set_bit(scancode, broken_keys);
287 self_test_last_rcv = jiffies; 232 self_test_last_rcv = jiffies;
288 keyval = plain_map[scancode]; 233 /* new Linux scancodes; approx. */
234 keyval = scancode;
289 keytyp = KTYP(keyval) - 0xf0; 235 keytyp = KTYP(keyval) - 0xf0;
290 keyval = KVAL(keyval); 236 keyval = KVAL(keyval);
291 237
@@ -301,19 +247,6 @@ repeat:
301 } else if (test_bit(scancode, broken_keys)) 247 } else if (test_bit(scancode, broken_keys))
302 break; 248 break;
303 249
304#if 0 // FIXME; hangs at boot
305 if (break_flag) {
306 del_timer(&atakeyb_rep_timer);
307 rep_scancode = 0;
308 } else {
309 del_timer(&atakeyb_rep_timer);
310 rep_scancode = scancode;
311 atakeyb_rep_timer.expires = jiffies + key_repeat_delay;
312 add_timer(&atakeyb_rep_timer);
313 }
314#endif
315
316 // handle_scancode(scancode, !break_flag);
317 if (atari_input_keyboard_interrupt_hook) 250 if (atari_input_keyboard_interrupt_hook)
318 atari_input_keyboard_interrupt_hook((unsigned char)scancode, !break_flag); 251 atari_input_keyboard_interrupt_hook((unsigned char)scancode, !break_flag);
319 break; 252 break;
@@ -639,9 +572,6 @@ int __init atari_keyb_init(void)
639 if (atari_keyb_done) 572 if (atari_keyb_done)
640 return 0; 573 return 0;
641 574
642 /* setup key map */
643 memcpy(key_maps[0], ataplain_map, sizeof(plain_map));
644
645 kb_state.state = KEYBOARD; 575 kb_state.state = KEYBOARD;
646 kb_state.len = 0; 576 kb_state.len = 0;
647 577
@@ -704,26 +634,6 @@ int __init atari_keyb_init(void)
704 return 0; 634 return 0;
705} 635}
706 636
707int atari_kbdrate(struct kbd_repeat *k)
708{
709 if (k->delay > 0) {
710 /* convert from msec to jiffies */
711 key_repeat_delay = (k->delay * HZ + 500) / 1000;
712 if (key_repeat_delay < 1)
713 key_repeat_delay = 1;
714 }
715 if (k->period > 0) {
716 key_repeat_rate = (k->period * HZ + 500) / 1000;
717 if (key_repeat_rate < 1)
718 key_repeat_rate = 1;
719 }
720
721 k->delay = key_repeat_delay * 1000 / HZ;
722 k->period = key_repeat_rate * 1000 / HZ;
723
724 return 0;
725}
726
727int atari_kbd_translate(unsigned char keycode, unsigned char *keycodep, char raw_mode) 637int atari_kbd_translate(unsigned char keycode, unsigned char *keycodep, char raw_mode)
728{ 638{
729#ifdef CONFIG_MAGIC_SYSRQ 639#ifdef CONFIG_MAGIC_SYSRQ
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 432f2e376aea..63989e9df4f9 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -379,7 +379,7 @@ void flush_tlb_mm(struct mm_struct *mm)
379 unsigned int cpu; 379 unsigned int cpu;
380 380
381 cpu_clear(smp_processor_id(), mask); 381 cpu_clear(smp_processor_id(), mask);
382 for_each_online_cpu(cpu) 382 for_each_cpu_mask(cpu, mask)
383 if (cpu_context(cpu, mm)) 383 if (cpu_context(cpu, mm))
384 cpu_context(cpu, mm) = 0; 384 cpu_context(cpu, mm) = 0;
385 } 385 }
@@ -419,7 +419,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned l
419 unsigned int cpu; 419 unsigned int cpu;
420 420
421 cpu_clear(smp_processor_id(), mask); 421 cpu_clear(smp_processor_id(), mask);
422 for_each_online_cpu(cpu) 422 for_each_cpu_mask(cpu, mask)
423 if (cpu_context(cpu, mm)) 423 if (cpu_context(cpu, mm))
424 cpu_context(cpu, mm) = 0; 424 cpu_context(cpu, mm) = 0;
425 } 425 }
@@ -466,7 +466,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
466 unsigned int cpu; 466 unsigned int cpu;
467 467
468 cpu_clear(smp_processor_id(), mask); 468 cpu_clear(smp_processor_id(), mask);
469 for_each_online_cpu(cpu) 469 for_each_cpu_mask(cpu, mask)
470 if (cpu_context(cpu, vma->vm_mm)) 470 if (cpu_context(cpu, vma->vm_mm))
471 cpu_context(cpu, vma->vm_mm) = 0; 471 cpu_context(cpu, vma->vm_mm) = 0;
472 } 472 }
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 01b0961acfb6..a61246d3533d 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -66,7 +66,7 @@ static inline int __maybe_unused r10000_llsc_war(void)
66 * why; it's not an issue caused by the core RTL. 66 * why; it's not an issue caused by the core RTL.
67 * 67 *
68 */ 68 */
69static int __init m4kc_tlbp_war(void) 69static __init int __attribute__((unused)) m4kc_tlbp_war(void)
70{ 70{
71 return (current_cpu_data.processor_id & 0xffff00) == 71 return (current_cpu_data.processor_id & 0xffff00) ==
72 (PRID_COMP_MIPS | PRID_IMP_4KC); 72 (PRID_COMP_MIPS | PRID_IMP_4KC);
@@ -140,7 +140,7 @@ struct insn {
140 | (e) << RE_SH \ 140 | (e) << RE_SH \
141 | (f) << FUNC_SH) 141 | (f) << FUNC_SH)
142 142
143static struct insn insn_table[] __initdata = { 143static __initdata struct insn insn_table[] = {
144 { insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 144 { insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
145 { insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD }, 145 { insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD },
146 { insn_and, M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD }, 146 { insn_and, M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD },
@@ -193,7 +193,7 @@ static struct insn insn_table[] __initdata = {
193 193
194#undef M 194#undef M
195 195
196static u32 __init build_rs(u32 arg) 196static __init u32 build_rs(u32 arg)
197{ 197{
198 if (arg & ~RS_MASK) 198 if (arg & ~RS_MASK)
199 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 199 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -201,7 +201,7 @@ static u32 __init build_rs(u32 arg)
201 return (arg & RS_MASK) << RS_SH; 201 return (arg & RS_MASK) << RS_SH;
202} 202}
203 203
204static u32 __init build_rt(u32 arg) 204static __init u32 build_rt(u32 arg)
205{ 205{
206 if (arg & ~RT_MASK) 206 if (arg & ~RT_MASK)
207 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 207 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -209,7 +209,7 @@ static u32 __init build_rt(u32 arg)
209 return (arg & RT_MASK) << RT_SH; 209 return (arg & RT_MASK) << RT_SH;
210} 210}
211 211
212static u32 __init build_rd(u32 arg) 212static __init u32 build_rd(u32 arg)
213{ 213{
214 if (arg & ~RD_MASK) 214 if (arg & ~RD_MASK)
215 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 215 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -217,7 +217,7 @@ static u32 __init build_rd(u32 arg)
217 return (arg & RD_MASK) << RD_SH; 217 return (arg & RD_MASK) << RD_SH;
218} 218}
219 219
220static u32 __init build_re(u32 arg) 220static __init u32 build_re(u32 arg)
221{ 221{
222 if (arg & ~RE_MASK) 222 if (arg & ~RE_MASK)
223 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 223 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -225,7 +225,7 @@ static u32 __init build_re(u32 arg)
225 return (arg & RE_MASK) << RE_SH; 225 return (arg & RE_MASK) << RE_SH;
226} 226}
227 227
228static u32 __init build_simm(s32 arg) 228static __init u32 build_simm(s32 arg)
229{ 229{
230 if (arg > 0x7fff || arg < -0x8000) 230 if (arg > 0x7fff || arg < -0x8000)
231 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 231 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -233,7 +233,7 @@ static u32 __init build_simm(s32 arg)
233 return arg & 0xffff; 233 return arg & 0xffff;
234} 234}
235 235
236static u32 __init build_uimm(u32 arg) 236static __init u32 build_uimm(u32 arg)
237{ 237{
238 if (arg & ~IMM_MASK) 238 if (arg & ~IMM_MASK)
239 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 239 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -241,7 +241,7 @@ static u32 __init build_uimm(u32 arg)
241 return arg & IMM_MASK; 241 return arg & IMM_MASK;
242} 242}
243 243
244static u32 __init build_bimm(s32 arg) 244static __init u32 build_bimm(s32 arg)
245{ 245{
246 if (arg > 0x1ffff || arg < -0x20000) 246 if (arg > 0x1ffff || arg < -0x20000)
247 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 247 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -252,7 +252,7 @@ static u32 __init build_bimm(s32 arg)
252 return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff); 252 return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff);
253} 253}
254 254
255static u32 __init build_jimm(u32 arg) 255static __init u32 build_jimm(u32 arg)
256{ 256{
257 if (arg & ~((JIMM_MASK) << 2)) 257 if (arg & ~((JIMM_MASK) << 2))
258 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 258 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -260,7 +260,7 @@ static u32 __init build_jimm(u32 arg)
260 return (arg >> 2) & JIMM_MASK; 260 return (arg >> 2) & JIMM_MASK;
261} 261}
262 262
263static u32 __init build_func(u32 arg) 263static __init u32 build_func(u32 arg)
264{ 264{
265 if (arg & ~FUNC_MASK) 265 if (arg & ~FUNC_MASK)
266 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 266 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -268,7 +268,7 @@ static u32 __init build_func(u32 arg)
268 return arg & FUNC_MASK; 268 return arg & FUNC_MASK;
269} 269}
270 270
271static u32 __init build_set(u32 arg) 271static __init u32 build_set(u32 arg)
272{ 272{
273 if (arg & ~SET_MASK) 273 if (arg & ~SET_MASK)
274 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 274 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -315,69 +315,69 @@ static void __init build_insn(u32 **buf, enum opcode opc, ...)
315} 315}
316 316
317#define I_u1u2u3(op) \ 317#define I_u1u2u3(op) \
318 static inline void i##op(u32 **buf, unsigned int a, \ 318 static inline void __init i##op(u32 **buf, unsigned int a, \
319 unsigned int b, unsigned int c) \ 319 unsigned int b, unsigned int c) \
320 { \ 320 { \
321 build_insn(buf, insn##op, a, b, c); \ 321 build_insn(buf, insn##op, a, b, c); \
322 } 322 }
323 323
324#define I_u2u1u3(op) \ 324#define I_u2u1u3(op) \
325 static inline void i##op(u32 **buf, unsigned int a, \ 325 static inline void __init i##op(u32 **buf, unsigned int a, \
326 unsigned int b, unsigned int c) \ 326 unsigned int b, unsigned int c) \
327 { \ 327 { \
328 build_insn(buf, insn##op, b, a, c); \ 328 build_insn(buf, insn##op, b, a, c); \
329 } 329 }
330 330
331#define I_u3u1u2(op) \ 331#define I_u3u1u2(op) \
332 static inline void i##op(u32 **buf, unsigned int a, \ 332 static inline void __init i##op(u32 **buf, unsigned int a, \
333 unsigned int b, unsigned int c) \ 333 unsigned int b, unsigned int c) \
334 { \ 334 { \
335 build_insn(buf, insn##op, b, c, a); \ 335 build_insn(buf, insn##op, b, c, a); \
336 } 336 }
337 337
338#define I_u1u2s3(op) \ 338#define I_u1u2s3(op) \
339 static inline void i##op(u32 **buf, unsigned int a, \ 339 static inline void __init i##op(u32 **buf, unsigned int a, \
340 unsigned int b, signed int c) \ 340 unsigned int b, signed int c) \
341 { \ 341 { \
342 build_insn(buf, insn##op, a, b, c); \ 342 build_insn(buf, insn##op, a, b, c); \
343 } 343 }
344 344
345#define I_u2s3u1(op) \ 345#define I_u2s3u1(op) \
346 static inline void i##op(u32 **buf, unsigned int a, \ 346 static inline void __init i##op(u32 **buf, unsigned int a, \
347 signed int b, unsigned int c) \ 347 signed int b, unsigned int c) \
348 { \ 348 { \
349 build_insn(buf, insn##op, c, a, b); \ 349 build_insn(buf, insn##op, c, a, b); \
350 } 350 }
351 351
352#define I_u2u1s3(op) \ 352#define I_u2u1s3(op) \
353 static inline void i##op(u32 **buf, unsigned int a, \ 353 static inline void __init i##op(u32 **buf, unsigned int a, \
354 unsigned int b, signed int c) \ 354 unsigned int b, signed int c) \
355 { \ 355 { \
356 build_insn(buf, insn##op, b, a, c); \ 356 build_insn(buf, insn##op, b, a, c); \
357 } 357 }
358 358
359#define I_u1u2(op) \ 359#define I_u1u2(op) \
360 static inline void i##op(u32 **buf, unsigned int a, \ 360 static inline void __init i##op(u32 **buf, unsigned int a, \
361 unsigned int b) \ 361 unsigned int b) \
362 { \ 362 { \
363 build_insn(buf, insn##op, a, b); \ 363 build_insn(buf, insn##op, a, b); \
364 } 364 }
365 365
366#define I_u1s2(op) \ 366#define I_u1s2(op) \
367 static inline void i##op(u32 **buf, unsigned int a, \ 367 static inline void __init i##op(u32 **buf, unsigned int a, \
368 signed int b) \ 368 signed int b) \
369 { \ 369 { \
370 build_insn(buf, insn##op, a, b); \ 370 build_insn(buf, insn##op, a, b); \
371 } 371 }
372 372
373#define I_u1(op) \ 373#define I_u1(op) \
374 static inline void i##op(u32 **buf, unsigned int a) \ 374 static inline void __init i##op(u32 **buf, unsigned int a) \
375 { \ 375 { \
376 build_insn(buf, insn##op, a); \ 376 build_insn(buf, insn##op, a); \
377 } 377 }
378 378
379#define I_0(op) \ 379#define I_0(op) \
380 static inline void i##op(u32 **buf) \ 380 static inline void __init i##op(u32 **buf) \
381 { \ 381 { \
382 build_insn(buf, insn##op); \ 382 build_insn(buf, insn##op); \
383 } 383 }
@@ -457,7 +457,7 @@ struct label {
457 enum label_id lab; 457 enum label_id lab;
458}; 458};
459 459
460static void __init build_label(struct label **lab, u32 *addr, 460static __init void build_label(struct label **lab, u32 *addr,
461 enum label_id l) 461 enum label_id l)
462{ 462{
463 (*lab)->addr = addr; 463 (*lab)->addr = addr;
@@ -526,34 +526,34 @@ L_LA(_r3000_write_probe_fail)
526#define i_ehb(buf) i_sll(buf, 0, 0, 3) 526#define i_ehb(buf) i_sll(buf, 0, 0, 3)
527 527
528#ifdef CONFIG_64BIT 528#ifdef CONFIG_64BIT
529static int __init __maybe_unused in_compat_space_p(long addr) 529static __init int __maybe_unused in_compat_space_p(long addr)
530{ 530{
531 /* Is this address in 32bit compat space? */ 531 /* Is this address in 32bit compat space? */
532 return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L); 532 return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L);
533} 533}
534 534
535static int __init __maybe_unused rel_highest(long val) 535static __init int __maybe_unused rel_highest(long val)
536{ 536{
537 return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000; 537 return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
538} 538}
539 539
540static int __init __maybe_unused rel_higher(long val) 540static __init int __maybe_unused rel_higher(long val)
541{ 541{
542 return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000; 542 return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
543} 543}
544#endif 544#endif
545 545
546static int __init rel_hi(long val) 546static __init int rel_hi(long val)
547{ 547{
548 return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000; 548 return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000;
549} 549}
550 550
551static int __init rel_lo(long val) 551static __init int rel_lo(long val)
552{ 552{
553 return ((val & 0xffff) ^ 0x8000) - 0x8000; 553 return ((val & 0xffff) ^ 0x8000) - 0x8000;
554} 554}
555 555
556static void __init i_LA_mostly(u32 **buf, unsigned int rs, long addr) 556static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr)
557{ 557{
558#ifdef CONFIG_64BIT 558#ifdef CONFIG_64BIT
559 if (!in_compat_space_p(addr)) { 559 if (!in_compat_space_p(addr)) {
@@ -571,7 +571,7 @@ static void __init i_LA_mostly(u32 **buf, unsigned int rs, long addr)
571 i_lui(buf, rs, rel_hi(addr)); 571 i_lui(buf, rs, rel_hi(addr));
572} 572}
573 573
574static void __init __maybe_unused i_LA(u32 **buf, unsigned int rs, 574static __init void __maybe_unused i_LA(u32 **buf, unsigned int rs,
575 long addr) 575 long addr)
576{ 576{
577 i_LA_mostly(buf, rs, addr); 577 i_LA_mostly(buf, rs, addr);
@@ -589,7 +589,7 @@ struct reloc {
589 enum label_id lab; 589 enum label_id lab;
590}; 590};
591 591
592static void __init r_mips_pc16(struct reloc **rel, u32 *addr, 592static __init void r_mips_pc16(struct reloc **rel, u32 *addr,
593 enum label_id l) 593 enum label_id l)
594{ 594{
595 (*rel)->addr = addr; 595 (*rel)->addr = addr;
@@ -614,7 +614,7 @@ static inline void __resolve_relocs(struct reloc *rel, struct label *lab)
614 } 614 }
615} 615}
616 616
617static void __init resolve_relocs(struct reloc *rel, struct label *lab) 617static __init void resolve_relocs(struct reloc *rel, struct label *lab)
618{ 618{
619 struct label *l; 619 struct label *l;
620 620
@@ -624,7 +624,7 @@ static void __init resolve_relocs(struct reloc *rel, struct label *lab)
624 __resolve_relocs(rel, l); 624 __resolve_relocs(rel, l);
625} 625}
626 626
627static void __init move_relocs(struct reloc *rel, u32 *first, u32 *end, 627static __init void move_relocs(struct reloc *rel, u32 *first, u32 *end,
628 long off) 628 long off)
629{ 629{
630 for (; rel->lab != label_invalid; rel++) 630 for (; rel->lab != label_invalid; rel++)
@@ -632,7 +632,7 @@ static void __init move_relocs(struct reloc *rel, u32 *first, u32 *end,
632 rel->addr += off; 632 rel->addr += off;
633} 633}
634 634
635static void __init move_labels(struct label *lab, u32 *first, u32 *end, 635static __init void move_labels(struct label *lab, u32 *first, u32 *end,
636 long off) 636 long off)
637{ 637{
638 for (; lab->lab != label_invalid; lab++) 638 for (; lab->lab != label_invalid; lab++)
@@ -640,7 +640,7 @@ static void __init move_labels(struct label *lab, u32 *first, u32 *end,
640 lab->addr += off; 640 lab->addr += off;
641} 641}
642 642
643static void __init copy_handler(struct reloc *rel, struct label *lab, 643static __init void copy_handler(struct reloc *rel, struct label *lab,
644 u32 *first, u32 *end, u32 *target) 644 u32 *first, u32 *end, u32 *target)
645{ 645{
646 long off = (long)(target - first); 646 long off = (long)(target - first);
@@ -651,7 +651,7 @@ static void __init copy_handler(struct reloc *rel, struct label *lab,
651 move_labels(lab, first, end, off); 651 move_labels(lab, first, end, off);
652} 652}
653 653
654static int __init __maybe_unused insn_has_bdelay(struct reloc *rel, 654static __init int __maybe_unused insn_has_bdelay(struct reloc *rel,
655 u32 *addr) 655 u32 *addr)
656{ 656{
657 for (; rel->lab != label_invalid; rel++) { 657 for (; rel->lab != label_invalid; rel++) {
@@ -743,11 +743,11 @@ il_bgez(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
743 * We deliberately chose a buffer size of 128, so we won't scribble 743 * We deliberately chose a buffer size of 128, so we won't scribble
744 * over anything important on overflow before we panic. 744 * over anything important on overflow before we panic.
745 */ 745 */
746static u32 tlb_handler[128] __initdata; 746static __initdata u32 tlb_handler[128];
747 747
748/* simply assume worst case size for labels and relocs */ 748/* simply assume worst case size for labels and relocs */
749static struct label labels[128] __initdata; 749static __initdata struct label labels[128];
750static struct reloc relocs[128] __initdata; 750static __initdata struct reloc relocs[128];
751 751
752/* 752/*
753 * The R3000 TLB handler is simple. 753 * The R3000 TLB handler is simple.
@@ -801,7 +801,7 @@ static void __init build_r3000_tlb_refill_handler(void)
801 * other one.To keep things simple, we first assume linear space, 801 * other one.To keep things simple, we first assume linear space,
802 * then we relocate it to the final handler layout as needed. 802 * then we relocate it to the final handler layout as needed.
803 */ 803 */
804static u32 final_handler[64] __initdata; 804static __initdata u32 final_handler[64];
805 805
806/* 806/*
807 * Hazards 807 * Hazards
@@ -825,7 +825,7 @@ static u32 final_handler[64] __initdata;
825 * 825 *
826 * As if we MIPS hackers wouldn't know how to nop pipelines happy ... 826 * As if we MIPS hackers wouldn't know how to nop pipelines happy ...
827 */ 827 */
828static void __init __maybe_unused build_tlb_probe_entry(u32 **p) 828static __init void __maybe_unused build_tlb_probe_entry(u32 **p)
829{ 829{
830 switch (current_cpu_type()) { 830 switch (current_cpu_type()) {
831 /* Found by experiment: R4600 v2.0 needs this, too. */ 831 /* Found by experiment: R4600 v2.0 needs this, too. */
@@ -849,7 +849,7 @@ static void __init __maybe_unused build_tlb_probe_entry(u32 **p)
849 */ 849 */
850enum tlb_write_entry { tlb_random, tlb_indexed }; 850enum tlb_write_entry { tlb_random, tlb_indexed };
851 851
852static void __init build_tlb_write_entry(u32 **p, struct label **l, 852static __init void build_tlb_write_entry(u32 **p, struct label **l,
853 struct reloc **r, 853 struct reloc **r,
854 enum tlb_write_entry wmode) 854 enum tlb_write_entry wmode)
855{ 855{
@@ -993,7 +993,7 @@ static void __init build_tlb_write_entry(u32 **p, struct label **l,
993 * TMP and PTR are scratch. 993 * TMP and PTR are scratch.
994 * TMP will be clobbered, PTR will hold the pmd entry. 994 * TMP will be clobbered, PTR will hold the pmd entry.
995 */ 995 */
996static void __init 996static __init void
997build_get_pmde64(u32 **p, struct label **l, struct reloc **r, 997build_get_pmde64(u32 **p, struct label **l, struct reloc **r,
998 unsigned int tmp, unsigned int ptr) 998 unsigned int tmp, unsigned int ptr)
999{ 999{
@@ -1054,7 +1054,7 @@ build_get_pmde64(u32 **p, struct label **l, struct reloc **r,
1054 * BVADDR is the faulting address, PTR is scratch. 1054 * BVADDR is the faulting address, PTR is scratch.
1055 * PTR will hold the pgd for vmalloc. 1055 * PTR will hold the pgd for vmalloc.
1056 */ 1056 */
1057static void __init 1057static __init void
1058build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, 1058build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r,
1059 unsigned int bvaddr, unsigned int ptr) 1059 unsigned int bvaddr, unsigned int ptr)
1060{ 1060{
@@ -1118,7 +1118,7 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r,
1118 * TMP and PTR are scratch. 1118 * TMP and PTR are scratch.
1119 * TMP will be clobbered, PTR will hold the pgd entry. 1119 * TMP will be clobbered, PTR will hold the pgd entry.
1120 */ 1120 */
1121static void __init __maybe_unused 1121static __init void __maybe_unused
1122build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr) 1122build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1123{ 1123{
1124 long pgdc = (long)pgd_current; 1124 long pgdc = (long)pgd_current;
@@ -1153,7 +1153,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1153 1153
1154#endif /* !CONFIG_64BIT */ 1154#endif /* !CONFIG_64BIT */
1155 1155
1156static void __init build_adjust_context(u32 **p, unsigned int ctx) 1156static __init void build_adjust_context(u32 **p, unsigned int ctx)
1157{ 1157{
1158 unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12; 1158 unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12;
1159 unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1); 1159 unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1);
@@ -1179,7 +1179,7 @@ static void __init build_adjust_context(u32 **p, unsigned int ctx)
1179 i_andi(p, ctx, ctx, mask); 1179 i_andi(p, ctx, ctx, mask);
1180} 1180}
1181 1181
1182static void __init build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr) 1182static __init void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
1183{ 1183{
1184 /* 1184 /*
1185 * Bug workaround for the Nevada. It seems as if under certain 1185 * Bug workaround for the Nevada. It seems as if under certain
@@ -1204,7 +1204,7 @@ static void __init build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
1204 i_ADDU(p, ptr, ptr, tmp); /* add in offset */ 1204 i_ADDU(p, ptr, ptr, tmp); /* add in offset */
1205} 1205}
1206 1206
1207static void __init build_update_entries(u32 **p, unsigned int tmp, 1207static __init void build_update_entries(u32 **p, unsigned int tmp,
1208 unsigned int ptep) 1208 unsigned int ptep)
1209{ 1209{
1210 /* 1210 /*
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c
index 89b911e83c04..8f3db32fac8b 100644
--- a/arch/powerpc/kernel/of_device.c
+++ b/arch/powerpc/kernel/of_device.c
@@ -57,26 +57,21 @@ ssize_t of_device_get_modalias(struct of_device *ofdev,
57 return tsize; 57 return tsize;
58} 58}
59 59
60int of_device_uevent(struct device *dev, 60int of_device_uevent(struct device *dev, struct kobj_uevent_env *env)
61 char **envp, int num_envp, char *buffer, int buffer_size)
62{ 61{
63 struct of_device *ofdev; 62 struct of_device *ofdev;
64 const char *compat; 63 const char *compat;
65 int i = 0, length = 0, seen = 0, cplen, sl; 64 int seen = 0, cplen, sl;
66 65
67 if (!dev) 66 if (!dev)
68 return -ENODEV; 67 return -ENODEV;
69 68
70 ofdev = to_of_device(dev); 69 ofdev = to_of_device(dev);
71 70
72 if (add_uevent_var(envp, num_envp, &i, 71 if (add_uevent_var(env, "OF_NAME=%s", ofdev->node->name))
73 buffer, buffer_size, &length,
74 "OF_NAME=%s", ofdev->node->name))
75 return -ENOMEM; 72 return -ENOMEM;
76 73
77 if (add_uevent_var(envp, num_envp, &i, 74 if (add_uevent_var(env, "OF_TYPE=%s", ofdev->node->type))
78 buffer, buffer_size, &length,
79 "OF_TYPE=%s", ofdev->node->type))
80 return -ENOMEM; 75 return -ENOMEM;
81 76
82 /* Since the compatible field can contain pretty much anything 77 /* Since the compatible field can contain pretty much anything
@@ -85,9 +80,7 @@ int of_device_uevent(struct device *dev,
85 80
86 compat = of_get_property(ofdev->node, "compatible", &cplen); 81 compat = of_get_property(ofdev->node, "compatible", &cplen);
87 while (compat && *compat && cplen > 0) { 82 while (compat && *compat && cplen > 0) {
88 if (add_uevent_var(envp, num_envp, &i, 83 if (add_uevent_var(env, "OF_COMPATIBLE_%d=%s", seen, compat))
89 buffer, buffer_size, &length,
90 "OF_COMPATIBLE_%d=%s", seen, compat))
91 return -ENOMEM; 84 return -ENOMEM;
92 85
93 sl = strlen (compat) + 1; 86 sl = strlen (compat) + 1;
@@ -96,25 +89,17 @@ int of_device_uevent(struct device *dev,
96 seen++; 89 seen++;
97 } 90 }
98 91
99 if (add_uevent_var(envp, num_envp, &i, 92 if (add_uevent_var(env, "OF_COMPATIBLE_N=%d", seen))
100 buffer, buffer_size, &length,
101 "OF_COMPATIBLE_N=%d", seen))
102 return -ENOMEM; 93 return -ENOMEM;
103 94
104 /* modalias is trickier, we add it in 2 steps */ 95 /* modalias is trickier, we add it in 2 steps */
105 if (add_uevent_var(envp, num_envp, &i, 96 if (add_uevent_var(env, "MODALIAS="))
106 buffer, buffer_size, &length,
107 "MODALIAS="))
108 return -ENOMEM; 97 return -ENOMEM;
109 98 sl = of_device_get_modalias(ofdev, &env->buf[env->buflen-1],
110 sl = of_device_get_modalias(ofdev, &buffer[length-1], 99 sizeof(env->buf) - env->buflen);
111 buffer_size-length); 100 if (sl >= (sizeof(env->buf) - env->buflen))
112 if (sl >= (buffer_size-length))
113 return -ENOMEM; 101 return -ENOMEM;
114 102 env->buflen += sl;
115 length += sl;
116
117 envp[i] = NULL;
118 103
119 return 0; 104 return 0;
120} 105}
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index cb22a3557c4e..19a5656001c0 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -317,30 +317,20 @@ static int vio_bus_match(struct device *dev, struct device_driver *drv)
317 return (ids != NULL) && (vio_match_device(ids, vio_dev) != NULL); 317 return (ids != NULL) && (vio_match_device(ids, vio_dev) != NULL);
318} 318}
319 319
320static int vio_hotplug(struct device *dev, char **envp, int num_envp, 320static int vio_hotplug(struct device *dev, struct kobj_uevent_env *env)
321 char *buffer, int buffer_size)
322{ 321{
323 const struct vio_dev *vio_dev = to_vio_dev(dev); 322 const struct vio_dev *vio_dev = to_vio_dev(dev);
324 struct device_node *dn; 323 struct device_node *dn;
325 const char *cp; 324 const char *cp;
326 int length;
327
328 if (!num_envp)
329 return -ENOMEM;
330 325
331 dn = dev->archdata.of_node; 326 dn = dev->archdata.of_node;
332 if (!dn) 327 if (!dn)
333 return -ENODEV; 328 return -ENODEV;
334 cp = of_get_property(dn, "compatible", &length); 329 cp = of_get_property(dn, "compatible", NULL);
335 if (!cp) 330 if (!cp)
336 return -ENODEV; 331 return -ENODEV;
337 332
338 envp[0] = buffer; 333 add_uevent_var(env, "MODALIAS=vio:T%sS%s", vio_dev->type, cp);
339 length = scnprintf(buffer, buffer_size, "MODALIAS=vio:T%sS%s",
340 vio_dev->type, cp);
341 if ((buffer_size - length) <= 0)
342 return -ENOMEM;
343 envp[1] = NULL;
344 return 0; 334 return 0;
345} 335}
346 336
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c
index 0caa3d955c3b..65b7ae426238 100644
--- a/arch/powerpc/platforms/52xx/lite5200.c
+++ b/arch/powerpc/platforms/52xx/lite5200.c
@@ -18,6 +18,8 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/pci.h> 19#include <linux/pci.h>
20#include <linux/of.h> 20#include <linux/of.h>
21#include <linux/root_dev.h>
22#include <linux/initrd.h>
21#include <asm/time.h> 23#include <asm/time.h>
22#include <asm/io.h> 24#include <asm/io.h>
23#include <asm/machdep.h> 25#include <asm/machdep.h>
@@ -156,18 +158,6 @@ static void __init lite5200_setup_arch(void)
156 of_node_put(np); 158 of_node_put(np);
157 } 159 }
158#endif 160#endif
159
160#ifdef CONFIG_BLK_DEV_INITRD
161 if (initrd_start)
162 ROOT_DEV = Root_RAM0;
163 else
164#endif
165#ifdef CONFIG_ROOT_NFS
166 ROOT_DEV = Root_NFS;
167#else
168 ROOT_DEV = Root_HDA1;
169#endif
170
171} 161}
172 162
173/* 163/*
diff --git a/arch/powerpc/platforms/cell/cbe_cpufreq.c b/arch/powerpc/platforms/cell/cbe_cpufreq.c
index 901236fa0f07..5123e9d4164b 100644
--- a/arch/powerpc/platforms/cell/cbe_cpufreq.c
+++ b/arch/powerpc/platforms/cell/cbe_cpufreq.c
@@ -107,8 +107,6 @@ static int cbe_cpufreq_cpu_init(struct cpufreq_policy *policy)
107 pr_debug("%d: %d\n", i, cbe_freqs[i].frequency); 107 pr_debug("%d: %d\n", i, cbe_freqs[i].frequency);
108 } 108 }
109 109
110 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
111
112 /* if DEBUG is enabled set_pmode() measures the latency 110 /* if DEBUG is enabled set_pmode() measures the latency
113 * of a transition */ 111 * of a transition */
114 policy->cpuinfo.transition_latency = 25000; 112 policy->cpuinfo.transition_latency = 25000;
diff --git a/arch/powerpc/platforms/pasemi/cpufreq.c b/arch/powerpc/platforms/pasemi/cpufreq.c
index 3ae083851b01..1cfb8b0c8fec 100644
--- a/arch/powerpc/platforms/pasemi/cpufreq.c
+++ b/arch/powerpc/platforms/pasemi/cpufreq.c
@@ -195,8 +195,6 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
195 pr_debug("%d: %d\n", i, pas_freqs[i].frequency); 195 pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
196 } 196 }
197 197
198 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
199
200 policy->cpuinfo.transition_latency = get_gizmo_latency(); 198 policy->cpuinfo.transition_latency = get_gizmo_latency();
201 199
202 cur_astate = get_cur_astate(policy->cpu); 200 cur_astate = get_cur_astate(policy->cpu);
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c
index 1fe35dab0e9e..c04abcc28a7a 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_32.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_32.c
@@ -410,7 +410,6 @@ static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
410 if (policy->cpu != 0) 410 if (policy->cpu != 0)
411 return -ENODEV; 411 return -ENODEV;
412 412
413 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
414 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 413 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
415 policy->cur = cur_freq; 414 policy->cur = cur_freq;
416 415
diff --git a/arch/powerpc/platforms/powermac/cpufreq_64.c b/arch/powerpc/platforms/powermac/cpufreq_64.c
index 00f50298c342..4dfb4bc242b5 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_64.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_64.c
@@ -357,7 +357,6 @@ static unsigned int g5_cpufreq_get_speed(unsigned int cpu)
357 357
358static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy) 358static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy)
359{ 359{
360 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
361 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 360 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
362 policy->cur = g5_cpu_freqs[g5_query_freq()].frequency; 361 policy->cur = g5_cpu_freqs[g5_query_freq()].frequency;
363 /* secondary CPUs are tied to the primary one by the 362 /* secondary CPUs are tied to the primary one by the
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 4bb634a17e43..190ff4b59a55 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -437,18 +437,12 @@ static void ps3_system_bus_shutdown(struct device *_dev)
437 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__); 437 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__);
438} 438}
439 439
440static int ps3_system_bus_uevent(struct device *_dev, char **envp, 440static int ps3_system_bus_uevent(struct device *_dev, struct kobj_uevent_env *env)
441 int num_envp, char *buffer, int buffer_size)
442{ 441{
443 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); 442 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
444 int i = 0, length = 0;
445 443
446 if (add_uevent_var(envp, num_envp, &i, buffer, buffer_size, 444 if (add_uevent_var(env, "MODALIAS=ps3:%d", dev->match_id))
447 &length, "MODALIAS=ps3:%d",
448 dev->match_id))
449 return -ENOMEM; 445 return -ENOMEM;
450
451 envp[i] = NULL;
452 return 0; 446 return 0;
453} 447}
454 448
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 62391fb1f61f..ac61cf43a7d9 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -547,8 +547,7 @@ static void __cpuinit appldata_online_cpu(int cpu)
547 spin_unlock(&appldata_timer_lock); 547 spin_unlock(&appldata_timer_lock);
548} 548}
549 549
550static void 550static void __cpuinit appldata_offline_cpu(int cpu)
551appldata_offline_cpu(int cpu)
552{ 551{
553 del_virt_timer(&per_cpu(appldata_timer, cpu)); 552 del_virt_timer(&per_cpu(appldata_timer, cpu));
554 if (atomic_dec_and_test(&appldata_expire_count)) { 553 if (atomic_dec_and_test(&appldata_expire_count)) {
@@ -560,9 +559,9 @@ appldata_offline_cpu(int cpu)
560 spin_unlock(&appldata_timer_lock); 559 spin_unlock(&appldata_timer_lock);
561} 560}
562 561
563static int __cpuinit 562static int __cpuinit appldata_cpu_notify(struct notifier_block *self,
564appldata_cpu_notify(struct notifier_block *self, 563 unsigned long action,
565 unsigned long action, void *hcpu) 564 void *hcpu)
566{ 565{
567 switch (action) { 566 switch (action) {
568 case CPU_ONLINE: 567 case CPU_ONLINE:
@@ -608,63 +607,15 @@ static int __init appldata_init(void)
608 register_hotcpu_notifier(&appldata_nb); 607 register_hotcpu_notifier(&appldata_nb);
609 608
610 appldata_sysctl_header = register_sysctl_table(appldata_dir_table); 609 appldata_sysctl_header = register_sysctl_table(appldata_dir_table);
611#ifdef MODULE
612 appldata_dir_table[0].de->owner = THIS_MODULE;
613 appldata_table[0].de->owner = THIS_MODULE;
614 appldata_table[1].de->owner = THIS_MODULE;
615#endif
616 610
617 P_DEBUG("Base interface initialized.\n"); 611 P_DEBUG("Base interface initialized.\n");
618 return 0; 612 return 0;
619} 613}
620 614
621/* 615__initcall(appldata_init);
622 * appldata_exit()
623 *
624 * stop timer, unregister /proc entries
625 */
626static void __exit appldata_exit(void)
627{
628 struct list_head *lh;
629 struct appldata_ops *ops;
630 int rc, i;
631 616
632 P_DEBUG("Unloading module ...\n");
633 /*
634 * ops list should be empty, but just in case something went wrong...
635 */
636 spin_lock(&appldata_ops_lock);
637 list_for_each(lh, &appldata_ops_list) {
638 ops = list_entry(lh, struct appldata_ops, list);
639 rc = appldata_diag(ops->record_nr, APPLDATA_STOP_REC,
640 (unsigned long) ops->data, ops->size,
641 ops->mod_lvl);
642 if (rc != 0) {
643 P_ERROR("STOP DIAG 0xDC for %s failed, "
644 "return code: %d\n", ops->name, rc);
645 }
646 }
647 spin_unlock(&appldata_ops_lock);
648
649 for_each_online_cpu(i)
650 appldata_offline_cpu(i);
651
652 appldata_timer_active = 0;
653
654 unregister_sysctl_table(appldata_sysctl_header);
655
656 destroy_workqueue(appldata_wq);
657 P_DEBUG("... module unloaded!\n");
658}
659/**************************** init / exit <END> ******************************/ 617/**************************** init / exit <END> ******************************/
660 618
661
662module_init(appldata_init);
663module_exit(appldata_exit);
664MODULE_LICENSE("GPL");
665MODULE_AUTHOR("Gerald Schaefer");
666MODULE_DESCRIPTION("Linux-VM Monitor Stream, base infrastructure");
667
668EXPORT_SYMBOL_GPL(appldata_register_ops); 619EXPORT_SYMBOL_GPL(appldata_register_ops);
669EXPORT_SYMBOL_GPL(appldata_unregister_ops); 620EXPORT_SYMBOL_GPL(appldata_unregister_ops);
670EXPORT_SYMBOL_GPL(appldata_diag); 621EXPORT_SYMBOL_GPL(appldata_diag);
diff --git a/arch/s390/kernel/audit.c b/arch/s390/kernel/audit.c
index d1c76fe10f29..f4932c22ebe4 100644
--- a/arch/s390/kernel/audit.c
+++ b/arch/s390/kernel/audit.c
@@ -2,6 +2,7 @@
2#include <linux/types.h> 2#include <linux/types.h>
3#include <linux/audit.h> 3#include <linux/audit.h>
4#include <asm/unistd.h> 4#include <asm/unistd.h>
5#include "audit.h"
5 6
6static unsigned dir_class[] = { 7static unsigned dir_class[] = {
7#include <asm-generic/audit_dir_write.h> 8#include <asm-generic/audit_dir_write.h>
@@ -40,7 +41,6 @@ int audit_classify_arch(int arch)
40int audit_classify_syscall(int abi, unsigned syscall) 41int audit_classify_syscall(int abi, unsigned syscall)
41{ 42{
42#ifdef CONFIG_COMPAT 43#ifdef CONFIG_COMPAT
43 extern int s390_classify_syscall(unsigned);
44 if (abi == AUDIT_ARCH_S390) 44 if (abi == AUDIT_ARCH_S390)
45 return s390_classify_syscall(syscall); 45 return s390_classify_syscall(syscall);
46#endif 46#endif
@@ -61,11 +61,6 @@ int audit_classify_syscall(int abi, unsigned syscall)
61static int __init audit_classes_init(void) 61static int __init audit_classes_init(void)
62{ 62{
63#ifdef CONFIG_COMPAT 63#ifdef CONFIG_COMPAT
64 extern __u32 s390_dir_class[];
65 extern __u32 s390_write_class[];
66 extern __u32 s390_read_class[];
67 extern __u32 s390_chattr_class[];
68 extern __u32 s390_signal_class[];
69 audit_register_class(AUDIT_CLASS_WRITE_32, s390_write_class); 64 audit_register_class(AUDIT_CLASS_WRITE_32, s390_write_class);
70 audit_register_class(AUDIT_CLASS_READ_32, s390_read_class); 65 audit_register_class(AUDIT_CLASS_READ_32, s390_read_class);
71 audit_register_class(AUDIT_CLASS_DIR_WRITE_32, s390_dir_class); 66 audit_register_class(AUDIT_CLASS_DIR_WRITE_32, s390_dir_class);
diff --git a/arch/s390/kernel/audit.h b/arch/s390/kernel/audit.h
new file mode 100644
index 000000000000..12b56f4b5a73
--- /dev/null
+++ b/arch/s390/kernel/audit.h
@@ -0,0 +1,15 @@
1#ifndef __ARCH_S390_KERNEL_AUDIT_H
2#define __ARCH_S390_KERNEL_AUDIT_H
3
4#include <linux/types.h>
5
6#ifdef CONFIG_COMPAT
7extern int s390_classify_syscall(unsigned);
8extern __u32 s390_dir_class[];
9extern __u32 s390_write_class[];
10extern __u32 s390_read_class[];
11extern __u32 s390_chattr_class[];
12extern __u32 s390_signal_class[];
13#endif /* CONFIG_COMPAT */
14
15#endif /* __ARCH_S390_KERNEL_AUDIT_H */
diff --git a/arch/s390/kernel/compat_audit.c b/arch/s390/kernel/compat_audit.c
index 0569f5126e49..d6487bf879e5 100644
--- a/arch/s390/kernel/compat_audit.c
+++ b/arch/s390/kernel/compat_audit.c
@@ -1,5 +1,6 @@
1#undef __s390x__ 1#undef __s390x__
2#include <asm/unistd.h> 2#include <asm/unistd.h>
3#include "audit.h"
3 4
4unsigned s390_dir_class[] = { 5unsigned s390_dir_class[] = {
5#include <asm-generic/audit_dir_write.h> 6#include <asm-generic/audit_dir_write.h>
diff --git a/arch/s390/kernel/cpcmd.c b/arch/s390/kernel/cpcmd.c
index 6c89f30c8e31..d8c1131e0815 100644
--- a/arch/s390/kernel/cpcmd.c
+++ b/arch/s390/kernel/cpcmd.c
@@ -2,7 +2,7 @@
2 * arch/s390/kernel/cpcmd.c 2 * arch/s390/kernel/cpcmd.c
3 * 3 *
4 * S390 version 4 * S390 version
5 * Copyright (C) 1999,2005 IBM Deutschland Entwicklung GmbH, IBM Corporation 5 * Copyright IBM Corp. 1999,2007
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Christian Borntraeger (cborntra@de.ibm.com), 7 * Christian Borntraeger (cborntra@de.ibm.com),
8 */ 8 */
@@ -21,6 +21,49 @@
21static DEFINE_SPINLOCK(cpcmd_lock); 21static DEFINE_SPINLOCK(cpcmd_lock);
22static char cpcmd_buf[241]; 22static char cpcmd_buf[241];
23 23
24static int diag8_noresponse(int cmdlen)
25{
26 register unsigned long reg2 asm ("2") = (addr_t) cpcmd_buf;
27 register unsigned long reg3 asm ("3") = cmdlen;
28
29 asm volatile(
30#ifndef CONFIG_64BIT
31 " diag %1,%0,0x8\n"
32#else /* CONFIG_64BIT */
33 " sam31\n"
34 " diag %1,%0,0x8\n"
35 " sam64\n"
36#endif /* CONFIG_64BIT */
37 : "+d" (reg3) : "d" (reg2) : "cc");
38 return reg3;
39}
40
41static int diag8_response(int cmdlen, char *response, int *rlen)
42{
43 register unsigned long reg2 asm ("2") = (addr_t) cpcmd_buf;
44 register unsigned long reg3 asm ("3") = (addr_t) response;
45 register unsigned long reg4 asm ("4") = cmdlen | 0x40000000L;
46 register unsigned long reg5 asm ("5") = *rlen;
47
48 asm volatile(
49#ifndef CONFIG_64BIT
50 " diag %2,%0,0x8\n"
51 " brc 8,1f\n"
52 " ar %1,%4\n"
53#else /* CONFIG_64BIT */
54 " sam31\n"
55 " diag %2,%0,0x8\n"
56 " sam64\n"
57 " brc 8,1f\n"
58 " agr %1,%4\n"
59#endif /* CONFIG_64BIT */
60 "1:\n"
61 : "+d" (reg4), "+d" (reg5)
62 : "d" (reg2), "d" (reg3), "d" (*rlen) : "cc");
63 *rlen = reg5;
64 return reg4;
65}
66
24/* 67/*
25 * __cpcmd has some restrictions over cpcmd 68 * __cpcmd has some restrictions over cpcmd
26 * - the response buffer must reside below 2GB (if any) 69 * - the response buffer must reside below 2GB (if any)
@@ -28,59 +71,27 @@ static char cpcmd_buf[241];
28 */ 71 */
29int __cpcmd(const char *cmd, char *response, int rlen, int *response_code) 72int __cpcmd(const char *cmd, char *response, int rlen, int *response_code)
30{ 73{
31 unsigned cmdlen; 74 int cmdlen;
32 int return_code, return_len; 75 int rc;
76 int response_len;
33 77
34 cmdlen = strlen(cmd); 78 cmdlen = strlen(cmd);
35 BUG_ON(cmdlen > 240); 79 BUG_ON(cmdlen > 240);
36 memcpy(cpcmd_buf, cmd, cmdlen); 80 memcpy(cpcmd_buf, cmd, cmdlen);
37 ASCEBC(cpcmd_buf, cmdlen); 81 ASCEBC(cpcmd_buf, cmdlen);
38 82
39 if (response != NULL && rlen > 0) { 83 if (response) {
40 register unsigned long reg2 asm ("2") = (addr_t) cpcmd_buf;
41 register unsigned long reg3 asm ("3") = (addr_t) response;
42 register unsigned long reg4 asm ("4") = cmdlen | 0x40000000L;
43 register unsigned long reg5 asm ("5") = rlen;
44
45 memset(response, 0, rlen); 84 memset(response, 0, rlen);
46 asm volatile( 85 response_len = rlen;
47#ifndef CONFIG_64BIT 86 rc = diag8_response(cmdlen, response, &rlen);
48 " diag %2,%0,0x8\n" 87 EBCASC(response, response_len);
49 " brc 8,1f\n"
50 " ar %1,%4\n"
51#else /* CONFIG_64BIT */
52 " sam31\n"
53 " diag %2,%0,0x8\n"
54 " sam64\n"
55 " brc 8,1f\n"
56 " agr %1,%4\n"
57#endif /* CONFIG_64BIT */
58 "1:\n"
59 : "+d" (reg4), "+d" (reg5)
60 : "d" (reg2), "d" (reg3), "d" (rlen) : "cc");
61 return_code = (int) reg4;
62 return_len = (int) reg5;
63 EBCASC(response, rlen);
64 } else { 88 } else {
65 register unsigned long reg2 asm ("2") = (addr_t) cpcmd_buf; 89 rc = diag8_noresponse(cmdlen);
66 register unsigned long reg3 asm ("3") = cmdlen;
67 return_len = 0;
68 asm volatile(
69#ifndef CONFIG_64BIT
70 " diag %1,%0,0x8\n"
71#else /* CONFIG_64BIT */
72 " sam31\n"
73 " diag %1,%0,0x8\n"
74 " sam64\n"
75#endif /* CONFIG_64BIT */
76 : "+d" (reg3) : "d" (reg2) : "cc");
77 return_code = (int) reg3;
78 } 90 }
79 if (response_code != NULL) 91 if (response_code)
80 *response_code = return_code; 92 *response_code = rc;
81 return return_len; 93 return rlen;
82} 94}
83
84EXPORT_SYMBOL(__cpcmd); 95EXPORT_SYMBOL(__cpcmd);
85 96
86int cpcmd(const char *cmd, char *response, int rlen, int *response_code) 97int cpcmd(const char *cmd, char *response, int rlen, int *response_code)
@@ -109,5 +120,4 @@ int cpcmd(const char *cmd, char *response, int rlen, int *response_code)
109 } 120 }
110 return len; 121 return len;
111} 122}
112
113EXPORT_SYMBOL(cpcmd); 123EXPORT_SYMBOL(cpcmd);
diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c
index 50d2235df732..c14a336f6300 100644
--- a/arch/s390/kernel/dis.c
+++ b/arch/s390/kernel/dis.c
@@ -1162,6 +1162,7 @@ static int print_insn(char *buffer, unsigned char *code, unsigned long addr)
1162 unsigned int value; 1162 unsigned int value;
1163 char separator; 1163 char separator;
1164 char *ptr; 1164 char *ptr;
1165 int i;
1165 1166
1166 ptr = buffer; 1167 ptr = buffer;
1167 insn = find_insn(code); 1168 insn = find_insn(code);
@@ -1169,7 +1170,8 @@ static int print_insn(char *buffer, unsigned char *code, unsigned long addr)
1169 ptr += sprintf(ptr, "%.5s\t", insn->name); 1170 ptr += sprintf(ptr, "%.5s\t", insn->name);
1170 /* Extract the operands. */ 1171 /* Extract the operands. */
1171 separator = 0; 1172 separator = 0;
1172 for (ops = formats[insn->format] + 1; *ops != 0; ops++) { 1173 for (ops = formats[insn->format] + 1, i = 0;
1174 *ops != 0 && i < 6; ops++, i++) {
1173 operand = operands + *ops; 1175 operand = operands + *ops;
1174 value = extract_operand(code, operand); 1176 value = extract_operand(code, operand);
1175 if ((operand->flags & OPERAND_INDEX) && value == 0) 1177 if ((operand->flags & OPERAND_INDEX) && value == 0)
@@ -1241,7 +1243,6 @@ void show_code(struct pt_regs *regs)
1241 } 1243 }
1242 /* Find a starting point for the disassembly. */ 1244 /* Find a starting point for the disassembly. */
1243 while (start < 32) { 1245 while (start < 32) {
1244 hops = 0;
1245 for (i = 0, hops = 0; start + i < 32 && hops < 3; hops++) { 1246 for (i = 0, hops = 0; start + i < 32 && hops < 3; hops++) {
1246 if (!find_insn(code + start + i)) 1247 if (!find_insn(code + start + i))
1247 break; 1248 break;
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index 8b8f136d9cc7..66b51901c87d 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -735,10 +735,10 @@ void do_reipl(void)
735 case REIPL_METHOD_CCW_VM: 735 case REIPL_METHOD_CCW_VM:
736 reipl_get_ascii_loadparm(loadparm); 736 reipl_get_ascii_loadparm(loadparm);
737 if (strlen(loadparm) == 0) 737 if (strlen(loadparm) == 0)
738 sprintf(buf, "IPL %X", 738 sprintf(buf, "IPL %X CLEAR",
739 reipl_block_ccw->ipl_info.ccw.devno); 739 reipl_block_ccw->ipl_info.ccw.devno);
740 else 740 else
741 sprintf(buf, "IPL %X LOADPARM '%s'", 741 sprintf(buf, "IPL %X CLEAR LOADPARM '%s'",
742 reipl_block_ccw->ipl_info.ccw.devno, loadparm); 742 reipl_block_ccw->ipl_info.ccw.devno, loadparm);
743 __cpcmd(buf, NULL, 0, NULL); 743 __cpcmd(buf, NULL, 0, NULL);
744 break; 744 break;
diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S
index b4622a3889b0..849120e3e28a 100644
--- a/arch/s390/kernel/vmlinux.lds.S
+++ b/arch/s390/kernel/vmlinux.lds.S
@@ -2,6 +2,7 @@
2 * Written by Martin Schwidefsky (schwidefsky@de.ibm.com) 2 * Written by Martin Schwidefsky (schwidefsky@de.ibm.com)
3 */ 3 */
4 4
5#include <asm/page.h>
5#include <asm-generic/vmlinux.lds.h> 6#include <asm-generic/vmlinux.lds.h>
6 7
7#ifndef CONFIG_64BIT 8#ifndef CONFIG_64BIT
@@ -18,121 +19,142 @@ jiffies = jiffies_64;
18 19
19SECTIONS 20SECTIONS
20{ 21{
21 . = 0x00000000; 22 . = 0x00000000;
22 _text = .; /* Text and read-only data */ 23 .text : {
23 .text : { 24 _text = .; /* Text and read-only data */
24 *(.text.head) 25 *(.text.head)
25 TEXT_TEXT 26 TEXT_TEXT
26 SCHED_TEXT 27 SCHED_TEXT
27 LOCK_TEXT 28 LOCK_TEXT
28 KPROBES_TEXT 29 KPROBES_TEXT
29 *(.fixup) 30 *(.fixup)
30 *(.gnu.warning) 31 *(.gnu.warning)
31 } = 0x0700 32 } = 0x0700
32 33
33 _etext = .; /* End of text section */ 34 _etext = .; /* End of text section */
34 35
35 RODATA 36 RODATA
36 37
37#ifdef CONFIG_SHARED_KERNEL 38#ifdef CONFIG_SHARED_KERNEL
38 . = ALIGN(1048576); /* VM shared segments are 1MB aligned */ 39 . = ALIGN(0x100000); /* VM shared segments are 1MB aligned */
39#endif 40#endif
40 41
41 . = ALIGN(4096); 42 . = ALIGN(PAGE_SIZE);
42 _eshared = .; /* End of shareable data */ 43 _eshared = .; /* End of shareable data */
43 44
44 . = ALIGN(16); /* Exception table */ 45 . = ALIGN(16); /* Exception table */
45 __start___ex_table = .; 46 __ex_table : {
46 __ex_table : { *(__ex_table) } 47 __start___ex_table = .;
47 __stop___ex_table = .; 48 *(__ex_table)
48 49 __stop___ex_table = .;
49 NOTES 50 }
50 51
51 BUG_TABLE 52 NOTES
52 53 BUG_TABLE
53 .data : { /* Data */ 54
54 DATA_DATA 55 .data : { /* Data */
55 CONSTRUCTORS 56 DATA_DATA
56 } 57 CONSTRUCTORS
57 58 }
58 . = ALIGN(4096); 59
59 __nosave_begin = .; 60 . = ALIGN(PAGE_SIZE);
60 .data_nosave : { *(.data.nosave) } 61 .data_nosave : {
61 . = ALIGN(4096); 62 __nosave_begin = .;
62 __nosave_end = .; 63 *(.data.nosave)
63 64 }
64 . = ALIGN(4096); 65 . = ALIGN(PAGE_SIZE);
65 .data.page_aligned : { *(.data.idt) } 66 __nosave_end = .;
66 67
67 . = ALIGN(256); 68 . = ALIGN(PAGE_SIZE);
68 .data.cacheline_aligned : { *(.data.cacheline_aligned) } 69 .data.page_aligned : {
69 70 *(.data.idt)
70 . = ALIGN(256); 71 }
71 .data.read_mostly : { *(.data.read_mostly) } 72
72 _edata = .; /* End of data section */ 73 . = ALIGN(0x100);
73 74 .data.cacheline_aligned : {
74 . = ALIGN(8192); /* init_task */ 75 *(.data.cacheline_aligned)
75 .data.init_task : { *(.data.init_task) } 76 }
76 77
77 /* will be freed after init */ 78 . = ALIGN(0x100);
78 . = ALIGN(4096); /* Init code and data */ 79 .data.read_mostly : {
79 __init_begin = .; 80 *(.data.read_mostly)
80 .init.text : { 81 }
81 _sinittext = .; 82 _edata = .; /* End of data section */
82 *(.init.text) 83
83 _einittext = .; 84 . = ALIGN(2 * PAGE_SIZE); /* init_task */
84 } 85 .data.init_task : {
85 /* 86 *(.data.init_task)
86 * .exit.text is discarded at runtime, not link time, 87 }
87 * to deal with references from __bug_table 88
88 */ 89 /* will be freed after init */
89 .exit.text : { *(.exit.text) } 90 . = ALIGN(PAGE_SIZE); /* Init code and data */
90 91 __init_begin = .;
91 .init.data : { *(.init.data) } 92 .init.text : {
92 . = ALIGN(256); 93 _sinittext = .;
93 __setup_start = .; 94 *(.init.text)
94 .init.setup : { *(.init.setup) } 95 _einittext = .;
95 __setup_end = .; 96 }
96 __initcall_start = .; 97 /*
97 .initcall.init : { 98 * .exit.text is discarded at runtime, not link time,
98 INITCALLS 99 * to deal with references from __bug_table
99 } 100 */
100 __initcall_end = .; 101 .exit.text : {
101 __con_initcall_start = .; 102 *(.exit.text)
102 .con_initcall.init : { *(.con_initcall.init) } 103 }
103 __con_initcall_end = .; 104
104 SECURITY_INIT 105 .init.data : {
106 *(.init.data)
107 }
108 . = ALIGN(0x100);
109 .init.setup : {
110 __setup_start = .;
111 *(.init.setup)
112 __setup_end = .;
113 }
114 .initcall.init : {
115 __initcall_start = .;
116 INITCALLS
117 __initcall_end = .;
118 }
119
120 .con_initcall.init : {
121 __con_initcall_start = .;
122 *(.con_initcall.init)
123 __con_initcall_end = .;
124 }
125 SECURITY_INIT
105 126
106#ifdef CONFIG_BLK_DEV_INITRD 127#ifdef CONFIG_BLK_DEV_INITRD
107 . = ALIGN(256); 128 . = ALIGN(0x100);
108 __initramfs_start = .; 129 .init.ramfs : {
109 .init.ramfs : { *(.init.initramfs) } 130 __initramfs_start = .;
110 . = ALIGN(2); 131 *(.init.ramfs)
111 __initramfs_end = .; 132 . = ALIGN(2);
133 __initramfs_end = .;
134 }
112#endif 135#endif
113 PERCPU(4096) 136
114 . = ALIGN(4096); 137 PERCPU(PAGE_SIZE)
115 __init_end = .; 138 . = ALIGN(PAGE_SIZE);
116 /* freed after init ends here */ 139 __init_end = .; /* freed after init ends here */
117 140
118 __bss_start = .; /* BSS */ 141 /* BSS */
119 .bss : { *(.bss) } 142 .bss : {
120 . = ALIGN(2); 143 __bss_start = .;
121 __bss_stop = .; 144 *(.bss)
122 145 . = ALIGN(2);
123 _end = . ; 146 __bss_stop = .;
124 147 }
125 /* Sections to be discarded */ 148
126 /DISCARD/ : { 149 _end = . ;
127 *(.exit.data) *(.exitcall.exit) 150
128 } 151 /* Sections to be discarded */
129 152 /DISCARD/ : {
130 /* Stabs debugging sections. */ 153 *(.exit.data)
131 .stab 0 : { *(.stab) } 154 *(.exitcall.exit)
132 .stabstr 0 : { *(.stabstr) } 155 }
133 .stab.excl 0 : { *(.stab.excl) } 156
134 .stab.exclstr 0 : { *(.stab.exclstr) } 157 /* Debugging sections. */
135 .stab.index 0 : { *(.stab.index) } 158 STABS_DEBUG
136 .stab.indexstr 0 : { *(.stab.indexstr) } 159 DWARF_DEBUG
137 .comment 0 : { *(.comment) }
138} 160}
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 54055194e9af..4c1ac341ec80 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -468,7 +468,7 @@ typedef struct {
468 __u64 refselmk; 468 __u64 refselmk;
469 __u64 refcmpmk; 469 __u64 refcmpmk;
470 __u64 reserved; 470 __u64 reserved;
471} __attribute__ ((packed)) pfault_refbk_t; 471} __attribute__ ((packed, aligned(8))) pfault_refbk_t;
472 472
473int pfault_init(void) 473int pfault_init(void)
474{ 474{
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 54878f07cf0c..44982c1dfa23 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -118,7 +118,7 @@ endchoice
118 118
119config SH_FPU 119config SH_FPU
120 bool "FPU support" 120 bool "FPU support"
121 depends on CPU_SH4 121 depends on CPU_HAS_FPU
122 default y 122 default y
123 help 123 help
124 Selecting this option will enable support for SH processors that 124 Selecting this option will enable support for SH processors that
@@ -178,12 +178,6 @@ config CPU_HAS_INTEVT
178config CPU_HAS_MASKREG_IRQ 178config CPU_HAS_MASKREG_IRQ
179 bool 179 bool
180 180
181config CPU_HAS_INTC_IRQ
182 bool
183
184config CPU_HAS_INTC2_IRQ
185 bool
186
187config CPU_HAS_IPR_IRQ 181config CPU_HAS_IPR_IRQ
188 bool 182 bool
189 183
@@ -205,6 +199,9 @@ config CPU_HAS_PTEA
205config CPU_HAS_DSP 199config CPU_HAS_DSP
206 bool 200 bool
207 201
202config CPU_HAS_FPU
203 bool
204
208endmenu 205endmenu
209 206
210menu "Board support" 207menu "Board support"
@@ -258,7 +255,6 @@ config SH_7780_SOLUTION_ENGINE
258 bool "SolutionEngine7780" 255 bool "SolutionEngine7780"
259 select SOLUTION_ENGINE 256 select SOLUTION_ENGINE
260 select SYS_SUPPORTS_PCI 257 select SYS_SUPPORTS_PCI
261 select CPU_HAS_INTC2_IRQ
262 depends on CPU_SUBTYPE_SH7780 258 depends on CPU_SUBTYPE_SH7780
263 help 259 help
264 Select 7780 SolutionEngine if configuring for a Renesas SH7780 260 Select 7780 SolutionEngine if configuring for a Renesas SH7780
@@ -309,7 +305,7 @@ config SH_MPC1211
309 305
310config SH_SH03 306config SH_SH03
311 bool "Interface CTP/PCI-SH03" 307 bool "Interface CTP/PCI-SH03"
312 depends on CPU_SUBTYPE_SH7751 && BROKEN 308 depends on CPU_SUBTYPE_SH7751
313 select CPU_HAS_IPR_IRQ 309 select CPU_HAS_IPR_IRQ
314 select SYS_SUPPORTS_PCI 310 select SYS_SUPPORTS_PCI
315 help 311 help
@@ -395,11 +391,22 @@ config SH_LBOX_RE2
395 help 391 help
396 Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2. 392 Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
397 393
394config SH_X3PROTO
395 bool "SH-X3 Prototype board"
396 depends on CPU_SUBTYPE_SHX3
397
398config SH_MAGIC_PANEL_R2
399 bool "Magic Panel R2"
400 depends on CPU_SUBTYPE_SH7720
401 help
402 Select Magic Panel R2 if configuring for Magic Panel R2.
403
398endmenu 404endmenu
399 405
400source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" 406source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
401source "arch/sh/boards/renesas/rts7751r2d/Kconfig" 407source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
402source "arch/sh/boards/renesas/r7780rp/Kconfig" 408source "arch/sh/boards/renesas/r7780rp/Kconfig"
409source "arch/sh/boards/magicpanelr2/Kconfig"
403 410
404menu "Timer and clock configuration" 411menu "Timer and clock configuration"
405 412
@@ -563,10 +570,19 @@ config NR_CPUS
563 570
564source "kernel/Kconfig.preempt" 571source "kernel/Kconfig.preempt"
565 572
566config NODES_SHIFT 573config GUSA
567 int 574 def_bool y
568 default "1" 575 depends on !SMP
569 depends on NEED_MULTIPLE_NODES 576 help
577 This enables support for gUSA (general UserSpace Atomicity).
578 This is the default implementation for both UP and non-ll/sc
579 CPUs, and is used by the libc, amongst others.
580
581 For additional information, design information can be found
582 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
583
584 This should only be disabled for special cases where alternate
585 atomicity implementations exist.
570 586
571endmenu 587endmenu
572 588
@@ -659,6 +675,17 @@ config SUPERHYWAY
659 tristate "SuperHyway Bus support" 675 tristate "SuperHyway Bus support"
660 depends on CPU_SUBTYPE_SH4_202 676 depends on CPU_SUBTYPE_SH4_202
661 677
678config MAPLE
679 bool "Maple Bus support"
680 depends on SH_DREAMCAST
681 help
682 The Maple Bus is SEGA's serial communication bus for peripherals
683 on the Dreamcast. Without this bus support you won't be able to
684 get your Dreamcast keyboard etc to work, so most users
685 probably want to say 'Y' here, unless you are only using the
686 Dreamcast with a serial line terminal or a remote network
687 connection.
688
662config CF_ENABLER 689config CF_ENABLER
663 bool "Compact Flash Enabler support" 690 bool "Compact Flash Enabler support"
664 depends on SOLUTION_ENGINE || SH_SH03 691 depends on SOLUTION_ENGINE || SH_SH03
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 52f6a99c8ecc..b507b501f0cf 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -28,13 +28,17 @@ config EARLY_SCIF_CONSOLE
28 serial I/O. 28 serial I/O.
29 29
30config EARLY_SCIF_CONSOLE_PORT 30config EARLY_SCIF_CONSOLE_PORT
31 hex "SCIF port for early console" 31 hex
32 depends on EARLY_SCIF_CONSOLE 32 depends on EARLY_SCIF_CONSOLE
33 default "0xffe00000" if CPU_SUBTYPE_SH7780 33 default "0xffe00000" if CPU_SUBTYPE_SH7780
34 default "0xffea0000" if CPU_SUBTYPE_SH7785
34 default "0xfffe9800" if CPU_SUBTYPE_SH7206 35 default "0xfffe9800" if CPU_SUBTYPE_SH7206
35 default "0xf8420000" if CPU_SUBTYPE_SH7619 36 default "0xf8420000" if CPU_SUBTYPE_SH7619
36 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 37 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
38 default "0xa4430000" if CPU_SUBTYPE_SH7720
39 default "0xffc30000" if CPU_SUBTYPE_SHX3
37 default "0xffe80000" if CPU_SH4 40 default "0xffe80000" if CPU_SH4
41 default "0x00000000"
38 42
39config EARLY_PRINTK 43config EARLY_PRINTK
40 bool "Early printk support" 44 bool "Early printk support"
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 97ac58682d0f..a0a2083aad3e 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -118,6 +118,7 @@ machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh
118machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705 118machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705
119machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp 119machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp
120machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw 120machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw
121machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto
121machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev 122machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev
122machdir-$(CONFIG_SH_LANDISK) += landisk 123machdir-$(CONFIG_SH_LANDISK) += landisk
123machdir-$(CONFIG_SH_TITAN) += titan 124machdir-$(CONFIG_SH_TITAN) += titan
@@ -125,6 +126,7 @@ machdir-$(CONFIG_SH_SHMIN) += shmin
125machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) += se/7206 126machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) += se/7206
126machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619 127machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619
127machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2 128machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2
129machdir-$(CONFIG_SH_MAGIC_PANEL_R2) += magicpanelr2
128 130
129incdir-y := $(notdir $(machdir-y)) 131incdir-y := $(notdir $(machdir-y))
130 132
@@ -135,7 +137,7 @@ endif
135 137
136# Companion chips 138# Companion chips
137core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/ 139core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
138core-$(CONFIG_VOYAGERGX) += arch/sh/cchips/voyagergx/ 140core-$(CONFIG_MFD_SM501) += arch/sh/cchips/voyagergx/
139 141
140cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2 142cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2
141cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a 143cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a
diff --git a/arch/sh/boards/hp6xx/hp6xx_apm.c b/arch/sh/boards/hp6xx/hp6xx_apm.c
index d1c1460c8a06..640ca2a74f16 100644
--- a/arch/sh/boards/hp6xx/hp6xx_apm.c
+++ b/arch/sh/boards/hp6xx/hp6xx_apm.c
@@ -20,9 +20,9 @@
20#define APM_CRITICAL 10 20#define APM_CRITICAL 10
21#define APM_LOW 30 21#define APM_LOW 30
22 22
23#define HP680_BATTERY_MAX 875 23#define HP680_BATTERY_MAX 898
24#define HP680_BATTERY_MIN 600 24#define HP680_BATTERY_MIN 486
25#define HP680_BATTERY_AC_ON 900 25#define HP680_BATTERY_AC_ON 1023
26 26
27#define MODNAME "hp6x0_apm" 27#define MODNAME "hp6x0_apm"
28 28
@@ -65,7 +65,7 @@ static void hp6x0_apm_get_power_status(struct apm_power_info *info)
65 65
66static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev) 66static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev)
67{ 67{
68 if (!apm_suspended) 68 if (!APM_DISABLED)
69 apm_queue_event(APM_USER_SUSPEND); 69 apm_queue_event(APM_USER_SUSPEND);
70 70
71 return IRQ_HANDLED; 71 return IRQ_HANDLED;
@@ -91,7 +91,6 @@ static int __init hp6x0_apm_init(void)
91static void __exit hp6x0_apm_exit(void) 91static void __exit hp6x0_apm_exit(void)
92{ 92{
93 free_irq(HP680_BTN_IRQ, 0); 93 free_irq(HP680_BTN_IRQ, 0);
94 apm_get_info = NULL;
95} 94}
96 95
97module_init(hp6x0_apm_init); 96module_init(hp6x0_apm_init);
diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c
index 7ae708930bac..2f414ac3c690 100644
--- a/arch/sh/boards/hp6xx/setup.c
+++ b/arch/sh/boards/hp6xx/setup.c
@@ -7,7 +7,7 @@
7 * May be copied or modified under the terms of the GNU General Public 7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information. 8 * License. See linux/COPYING for more information.
9 * 9 *
10 * Setup code for an HP680 (internal peripherials only) 10 * Setup code for HP620/HP660/HP680/HP690 (internal peripherials only)
11 */ 11 */
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
@@ -19,7 +19,7 @@
19#include <asm/cpu/dac.h> 19#include <asm/cpu/dac.h>
20 20
21#define SCPCR 0xa4000116 21#define SCPCR 0xa4000116
22#define SCPDR 0xa4000136 22#define SCPDR 0xa4000136
23 23
24/* CF Slot */ 24/* CF Slot */
25static struct resource cf_ide_resources[] = { 25static struct resource cf_ide_resources[] = {
@@ -34,7 +34,7 @@ static struct resource cf_ide_resources[] = {
34 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
35 }, 35 },
36 [2] = { 36 [2] = {
37 .start = 93, 37 .start = 77,
38 .flags = IORESOURCE_IRQ, 38 .flags = IORESOURCE_IRQ,
39 }, 39 },
40}; 40};
@@ -46,10 +46,22 @@ static struct platform_device cf_ide_device = {
46 .resource = cf_ide_resources, 46 .resource = cf_ide_resources,
47}; 47};
48 48
49static struct platform_device jornadakbd_device = {
50 .name = "jornada680_kbd",
51 .id = -1,
52};
53
49static struct platform_device *hp6xx_devices[] __initdata = { 54static struct platform_device *hp6xx_devices[] __initdata = {
50 &cf_ide_device, 55 &cf_ide_device,
56 &jornadakbd_device,
51}; 57};
52 58
59static void __init hp6xx_init_irq(void)
60{
61 /* Gets touchscreen and powerbutton IRQ working */
62 plat_irq_setup_pins(IRQ_MODE_IRQ);
63}
64
53static int __init hp6xx_devices_setup(void) 65static int __init hp6xx_devices_setup(void)
54{ 66{
55 return platform_add_devices(hp6xx_devices, ARRAY_SIZE(hp6xx_devices)); 67 return platform_add_devices(hp6xx_devices, ARRAY_SIZE(hp6xx_devices));
@@ -61,11 +73,11 @@ static void __init hp6xx_setup(char **cmdline_p)
61 u16 v; 73 u16 v;
62 74
63 v = inw(HD64461_STBCR); 75 v = inw(HD64461_STBCR);
64 v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | 76 v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST |
65 HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST | 77 HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST |
66 HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST | 78 HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST |
67 HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST | 79 HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST|
68 HD64461_STBCR_SAFECKE_IST; 80 HD64461_STBCR_SAFECKE_IST;
69#ifndef CONFIG_HD64461_ENABLER 81#ifndef CONFIG_HD64461_ENABLER
70 v |= HD64461_STBCR_SPC1ST; 82 v |= HD64461_STBCR_SPC1ST;
71#endif 83#endif
@@ -101,6 +113,9 @@ device_initcall(hp6xx_devices_setup);
101static struct sh_machine_vector mv_hp6xx __initmv = { 113static struct sh_machine_vector mv_hp6xx __initmv = {
102 .mv_name = "hp6xx", 114 .mv_name = "hp6xx",
103 .mv_setup = hp6xx_setup, 115 .mv_setup = hp6xx_setup,
104 .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM, 116 /* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */
117 .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6,
105 .mv_irq_demux = hd64461_irq_demux, 118 .mv_irq_demux = hd64461_irq_demux,
119 /* Enable IRQ0 -> IRQ3 in IRQ_MODE */
120 .mv_init_irq = hp6xx_init_irq,
106}; 121};
diff --git a/arch/sh/boards/magicpanelr2/Kconfig b/arch/sh/boards/magicpanelr2/Kconfig
new file mode 100644
index 000000000000..b0abddc3e84f
--- /dev/null
+++ b/arch/sh/boards/magicpanelr2/Kconfig
@@ -0,0 +1,13 @@
1if SH_MAGIC_PANEL_R2
2
3menu "Magic Panel R2 options"
4
5config SH_MAGIC_PANEL_R2_VERSION
6 int SH_MAGIC_PANEL_R2_VERSION
7 default "3"
8 help
9 Set the version of the Magic Panel R2
10
11endmenu
12
13endif
diff --git a/arch/sh/boards/magicpanelr2/Makefile b/arch/sh/boards/magicpanelr2/Makefile
new file mode 100644
index 000000000000..7a6d586b9072
--- /dev/null
+++ b/arch/sh/boards/magicpanelr2/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Magic Panel specific parts
3#
4
5obj-y := setup.o \ No newline at end of file
diff --git a/arch/sh/boards/magicpanelr2/setup.c b/arch/sh/boards/magicpanelr2/setup.c
new file mode 100644
index 000000000000..f3b8b07ea5d6
--- /dev/null
+++ b/arch/sh/boards/magicpanelr2/setup.c
@@ -0,0 +1,394 @@
1/*
2 * linux/arch/sh/boards/magicpanel/setup.c
3 *
4 * Copyright (C) 2007 Markus Brunner, Mark Jonas
5 *
6 * Magic Panel Release 2 board setup
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/platform_device.h>
15#include <linux/delay.h>
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h>
18#include <linux/mtd/physmap.h>
19#include <linux/mtd/map.h>
20#include <asm/magicpanelr2.h>
21#include <asm/heartbeat.h>
22
23#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL)
24
25/* Prefer cmdline over RedBoot */
26static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
27
28/* Wait until reset finished. Timeout is 100ms. */
29static int __init ethernet_reset_finished(void)
30{
31 int i;
32
33 if (LAN9115_READY)
34 return 1;
35
36 for (i = 0; i < 10; ++i) {
37 mdelay(10);
38 if (LAN9115_READY)
39 return 1;
40 }
41
42 return 0;
43}
44
45static void __init reset_ethernet(void)
46{
47 /* PMDR: LAN_RESET=on */
48 CLRBITS_OUTB(0x10, PORT_PMDR);
49
50 udelay(200);
51
52 /* PMDR: LAN_RESET=off */
53 SETBITS_OUTB(0x10, PORT_PMDR);
54}
55
56static void __init setup_chip_select(void)
57{
58 /* CS2: LAN (0x08000000 - 0x0bffffff) */
59 /* no idle cycles, normal space, 8 bit data bus */
60 ctrl_outl(0x36db0400, CS2BCR);
61 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
62 ctrl_outl(0x000003c0, CS2WCR);
63
64 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */
65 /* no idle cycles, normal space, 8 bit data bus */
66 ctrl_outl(0x00000200, CS4BCR);
67 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
68 ctrl_outl(0x00100981, CS4WCR);
69
70 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */
71 /* no idle cycles, normal space, 8 bit data bus */
72 ctrl_outl(0x00000200, CS5ABCR);
73 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
74 ctrl_outl(0x00100981, CS5AWCR);
75
76 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */
77 /* no idle cycles, normal space, 8 bit data bus */
78 ctrl_outl(0x00000200, CS5BBCR);
79 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
80 ctrl_outl(0x00100981, CS5BWCR);
81
82 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */
83 /* no idle cycles, normal space, 8 bit data bus */
84 ctrl_outl(0x00000200, CS6ABCR);
85 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
86 ctrl_outl(0x001009C1, CS6AWCR);
87}
88
89static void __init setup_port_multiplexing(void)
90{
91 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5);
92 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1);
93 */
94 ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */
95
96 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1);
97 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0);
98 */
99 ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */
100
101 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4);
102 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0;
103 */
104 ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */
105
106 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4);
107 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0);
108 */
109 ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */
110
111 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP;
112 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM;
113 */
114 ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */
115
116 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3;
117 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc);
118 */
119 ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */
120
121 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2);
122 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9);
123 */
124 ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */
125
126 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE);
127 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR;
128 */
129 ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */
130
131 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3;
132 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC;
133 */
134 ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */
135
136 /* K7 (x); K6 (x); K5 (x); K4 (x);
137 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY)
138 */
139 ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */
140
141 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI;
142 * L3 TCK; L2 (x); L1 (x); L0 (x);
143 */
144 ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */
145
146 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED);
147 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL);
148 * M1 CS5B(CAN3_CS); M0 GPI+(nc);
149 */
150 ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */
151
152 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit,
153 * LAN_RESET=off, BUZZER=off, LCD_BL=off
154 */
155#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2
156 ctrl_outb(0x30, PORT_PMDR);
157#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3
158 ctrl_outb(0xF0, PORT_PMDR);
159#else
160#error Unknown revision of PLATFORM_MP_R2
161#endif
162
163 /* P7 (x); P6 (x); P5 (x);
164 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);
165 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ)
166 */
167 ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */
168 ctrl_outb(0x10, PORT_PPDR);
169
170 /* R7 A25; R6 A24; R5 A23; R4 A22;
171 * R3 A21; R2 A20; R1 A19; R0 A0;
172 */
173 ctrl_outw(0x0000, PORT_PRCR); /* 00 00 00 00 00 00 00 00 */
174
175 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
176 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
177 */
178 ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */
179
180 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS;
181 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG)
182 */
183 ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */
184
185 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT);
186 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK;
187 */
188 ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */
189
190 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2);
191 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT);
192 */
193 ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */
194}
195
196static void __init mpr2_setup(char **cmdline_p)
197{
198 __set_io_port_base(0xa0000000);
199
200 /* set Pin Select Register A:
201 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
202 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
203 */
204 ctrl_outw(0xAABC, PORT_PSELA);
205 /* set Pin Select Register B:
206 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC,
207 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved
208 */
209 ctrl_outw(0x3C00, PORT_PSELB);
210 /* set Pin Select Register C:
211 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved
212 */
213 ctrl_outw(0x0000, PORT_PSELC);
214 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK,
215 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved
216 */
217 ctrl_outw(0x0000, PORT_PSELD);
218 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */
219 ctrl_outw(0x0101, PORT_UTRCTL);
220 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */
221 ctrl_outw(0xA5C0, PORT_UCLKCR_W);
222
223 setup_chip_select();
224
225 setup_port_multiplexing();
226
227 reset_ethernet();
228
229 printk(KERN_INFO "Magic Panel Release 2 A.%i\n",
230 CONFIG_SH_MAGIC_PANEL_R2_VERSION);
231
232 if (ethernet_reset_finished() == 0)
233 printk(KERN_WARNING "Ethernet not ready\n");
234}
235
236static struct resource smc911x_resources[] = {
237 [0] = {
238 .start = 0xa8000000,
239 .end = 0xabffffff,
240 .flags = IORESOURCE_MEM,
241 },
242 [1] = {
243 .start = 35,
244 .end = 35,
245 .flags = IORESOURCE_IRQ,
246 },
247};
248
249static struct platform_device smc911x_device = {
250 .name = "smc911x",
251 .id = -1,
252 .num_resources = ARRAY_SIZE(smc911x_resources),
253 .resource = smc911x_resources,
254};
255
256static struct resource heartbeat_resources[] = {
257 [0] = {
258 .start = PA_LED,
259 .end = PA_LED,
260 .flags = IORESOURCE_MEM,
261 },
262};
263
264static struct heartbeat_data heartbeat_data = {
265 .flags = HEARTBEAT_INVERTED,
266};
267
268static struct platform_device heartbeat_device = {
269 .name = "heartbeat",
270 .id = -1,
271 .dev = {
272 .platform_data = &heartbeat_data,
273 },
274 .num_resources = ARRAY_SIZE(heartbeat_resources),
275 .resource = heartbeat_resources,
276};
277
278static struct mtd_partition *parsed_partitions;
279
280static struct mtd_partition mpr2_partitions[] = {
281 /* Reserved for bootloader, read-only */
282 {
283 .name = "Bootloader",
284 .offset = 0x00000000UL,
285 .size = MPR2_MTD_BOOTLOADER_SIZE,
286 .mask_flags = MTD_WRITEABLE,
287 },
288 /* Reserved for kernel image */
289 {
290 .name = "Kernel",
291 .offset = MTDPART_OFS_NXTBLK,
292 .size = MPR2_MTD_KERNEL_SIZE,
293 },
294 /* Rest is used for Flash FS */
295 {
296 .name = "Flash_FS",
297 .offset = MTDPART_OFS_NXTBLK,
298 .size = MTDPART_SIZ_FULL,
299 }
300};
301
302static struct physmap_flash_data flash_data = {
303 .width = 2,
304};
305
306static struct resource flash_resource = {
307 .start = 0x00000000,
308 .end = 0x2000000UL,
309 .flags = IORESOURCE_MEM,
310};
311
312static struct platform_device flash_device = {
313 .name = "physmap-flash",
314 .id = -1,
315 .resource = &flash_resource,
316 .num_resources = 1,
317 .dev = {
318 .platform_data = &flash_data,
319 },
320};
321
322static struct mtd_info *flash_mtd;
323
324static struct map_info mpr2_flash_map = {
325 .name = "Magic Panel R2 Flash",
326 .size = 0x2000000UL,
327 .bankwidth = 2,
328};
329
330static void __init set_mtd_partitions(void)
331{
332 int nr_parts = 0;
333
334 simple_map_init(&mpr2_flash_map);
335 flash_mtd = do_map_probe("cfi_probe", &mpr2_flash_map);
336 nr_parts = parse_mtd_partitions(flash_mtd, probes,
337 &parsed_partitions, 0);
338 /* If there is no partition table, used the hard coded table */
339 if (nr_parts <= 0) {
340 flash_data.parts = mpr2_partitions;
341 flash_data.nr_parts = ARRAY_SIZE(mpr2_partitions);
342 } else {
343 flash_data.nr_parts = nr_parts;
344 flash_data.parts = parsed_partitions;
345 }
346}
347
348/*
349 * Add all resources to the platform_device
350 */
351
352static struct platform_device *mpr2_devices[] __initdata = {
353 &heartbeat_device,
354 &smc911x_device,
355 &flash_device,
356};
357
358
359static int __init mpr2_devices_setup(void)
360{
361 set_mtd_partitions();
362 return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices));
363}
364device_initcall(mpr2_devices_setup);
365
366/*
367 * Initialize IRQ setting
368 */
369static void __init init_mpr2_IRQ(void)
370{
371 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */
372
373 set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */
374 set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */
375 set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */
376 set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */
377 set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */
378 set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
379
380 intc_set_priority(32, 13); /* IRQ0 CAN1 */
381 intc_set_priority(33, 13); /* IRQ0 CAN2 */
382 intc_set_priority(34, 13); /* IRQ0 CAN3 */
383 intc_set_priority(35, 6); /* IRQ3 SMSC9115 */
384}
385
386/*
387 * The Machine Vector
388 */
389
390static struct sh_machine_vector mv_mpr2 __initmv = {
391 .mv_name = "mpr2",
392 .mv_setup = mpr2_setup,
393 .mv_init_irq = init_mpr2_IRQ,
394};
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
index 8ce03e00b0ae..fede36361dc7 100644
--- a/arch/sh/boards/mpc1211/setup.c
+++ b/arch/sh/boards/mpc1211/setup.c
@@ -285,7 +285,7 @@ static int put_smb_blk(unsigned char *p, int address, int command, int no)
285static struct resource heartbeat_resources[] = { 285static struct resource heartbeat_resources[] = {
286 [0] = { 286 [0] = {
287 .start = 0xa2000000, 287 .start = 0xa2000000,
288 .end = 0xa2000000 + 8 - 1, 288 .end = 0xa2000000,
289 .flags = IORESOURCE_MEM, 289 .flags = IORESOURCE_MEM,
290 }, 290 },
291}; 291};
diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile
index b1d20afb4eb3..dd26182fbf58 100644
--- a/arch/sh/boards/renesas/r7780rp/Makefile
+++ b/arch/sh/boards/renesas/r7780rp/Makefile
@@ -1,9 +1,10 @@
1# 1#
2# Makefile for the R7780RP-1 specific parts of the kernel 2# Makefile for the R7780RP-1 specific parts of the kernel
3# 3#
4irqinit-y := irq-r7780rp.o 4irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o
5irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o 5irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o
6obj-y := setup.o irq.o $(irqinit-y) 6irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o irq.o
7obj-y := setup.o $(irqinit-y)
7 8
8ifneq ($(CONFIG_SH_R7785RP),y) 9ifneq ($(CONFIG_SH_R7785RP),y)
9obj-$(CONFIG_PUSH_SWITCH) += psw.o 10obj-$(CONFIG_PUSH_SWITCH) += psw.o
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
new file mode 100644
index 000000000000..59b47fe061f9
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -0,0 +1,61 @@
1/*
2 * Renesas Solutions Highlander R7780MP Support.
3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 Paul Mundt
6 * Copyright (C) 2007 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/io.h>
15#include <asm/r7780rp.h>
16
17enum {
18 UNUSED = 0,
19
20 /* board specific interrupt sources */
21 AX88796, /* Ethernet controller */
22 CF, /* Compact Flash */
23 PSW, /* Push Switch */
24 EXT1, /* EXT1n IRQ */
25 EXT4, /* EXT4n IRQ */
26};
27
28static struct intc_vect vectors[] __initdata = {
29 INTC_IRQ(CF, IRQ_CF),
30 INTC_IRQ(PSW, IRQ_PSW),
31 INTC_IRQ(AX88796, IRQ_AX88796),
32 INTC_IRQ(EXT1, IRQ_EXT1),
33 INTC_IRQ(EXT4, IRQ_EXT4),
34};
35
36static struct intc_mask_reg mask_registers[] __initdata = {
37 { 0xa4000000, 0, 16, /* IRLMSK */
38 { 0, 0, 0, 0, CF, 0, 0, 0,
39 0, 0, 0, EXT4, 0, EXT1, PSW, AX88796 } },
40};
41
42static unsigned char irl2irq[HL_NR_IRL] __initdata = {
43 0, IRQ_CF, 0, 0,
44 0, 0, 0, 0,
45 0, IRQ_EXT4, 0, IRQ_EXT1,
46 0, IRQ_AX88796, IRQ_PSW,
47};
48
49static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
50 NULL, NULL, mask_registers, NULL, NULL);
51
52unsigned char * __init highlander_init_irq_r7780mp(void)
53{
54 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
55 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
56 register_intc_controller(&intc_desc);
57 return irl2irq;
58 }
59
60 return NULL;
61}
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
index f5f358746c9e..fa4a534cade9 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
@@ -9,13 +9,15 @@
9 * for more details. 9 * for more details.
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <asm/io.h> 12#include <linux/io.h>
13#include <asm/r7780rp.h> 13#include <asm/r7780rp.h>
14 14
15void __init highlander_init_irq(void) 15unsigned char * __init highlander_init_irq_r7780rp(void)
16{ 16{
17 int i; 17 int i;
18 18
19 for (i = 0; i < 15; i++) 19 for (i = 0; i < 15; i++)
20 make_r7780rp_irq(i); 20 make_r7780rp_irq(i);
21
22 return NULL;
21} 23}
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
index dd6ec4ce44dc..b2c6a84673bd 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
@@ -1,19 +1,55 @@
1/* 1/*
2 * Renesas Solutions Highlander R7780RP-1 Support. 2 * Renesas Solutions Highlander R7785RP Support.
3 * 3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 Paul Mundt 5 * Copyright (C) 2006 Paul Mundt
6 * Copyright (C) 2007 Magnus Damm
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 10 * for more details.
10 */ 11 */
11#include <linux/init.h> 12#include <linux/init.h>
12#include <asm/io.h> 13#include <linux/irq.h>
14#include <linux/io.h>
13#include <asm/r7780rp.h> 15#include <asm/r7780rp.h>
14 16
15void __init highlander_init_irq(void) 17enum {
18 UNUSED = 0,
19
20 /* board specific interrupt sources */
21 AX88796, /* Ethernet controller */
22 CF, /* Compact Flash */
23};
24
25static struct intc_vect vectors[] __initdata = {
26 INTC_IRQ(CF, IRQ_CF),
27 INTC_IRQ(AX88796, IRQ_AX88796),
28};
29
30static struct intc_mask_reg mask_registers[] __initdata = {
31 { 0xa4000010, 0, 16, /* IRLMCR1 */
32 { 0, 0, 0, 0, CF, AX88796, 0, 0,
33 0, 0, 0, 0, 0, 0, 0, 0 } },
34};
35
36static unsigned char irl2irq[HL_NR_IRL] __initdata = {
37 0, IRQ_CF, 0, 0,
38 0, 0, 0, 0,
39 0, 0, IRQ_AX88796, 0,
40 0, 0, 0,
41};
42
43static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
44 NULL, NULL, mask_registers, NULL, NULL);
45
46unsigned char * __init highlander_init_irq_r7785rp(void)
16{ 47{
48 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
49 return NULL;
50
51 printk(KERN_INFO "Using r7785rp interrupt controller.\n");
52
17 ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ 53 ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
18 54
19 /* Setup the FPGA IRL */ 55 /* Setup the FPGA IRL */
@@ -24,6 +60,6 @@ void __init highlander_init_irq(void)
24 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ 60 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */
25 ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */ 61 ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */
26 62
27 make_r7780rp_irq(1); /* CF card */ 63 register_intc_controller(&intc_desc);
28 make_r7780rp_irq(10); /* On-board ethernet */ 64 return irl2irq;
29} 65}
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index adb529d01bae..afe9de73666a 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -19,6 +19,7 @@
19#include <asm/machvec.h> 19#include <asm/machvec.h>
20#include <asm/r7780rp.h> 20#include <asm/r7780rp.h>
21#include <asm/clock.h> 21#include <asm/clock.h>
22#include <asm/heartbeat.h>
22#include <asm/io.h> 23#include <asm/io.h>
23 24
24static struct resource r8a66597_usb_host_resources[] = { 25static struct resource r8a66597_usb_host_resources[] = {
@@ -30,8 +31,8 @@ static struct resource r8a66597_usb_host_resources[] = {
30 }, 31 },
31 [1] = { 32 [1] = {
32 .name = "r8a66597_hcd", 33 .name = "r8a66597_hcd",
33 .start = 11, /* irq number */ 34 .start = IRQ_EXT1, /* irq number */
34 .end = 11, 35 .end = IRQ_EXT1,
35 .flags = IORESOURCE_IRQ, 36 .flags = IORESOURCE_IRQ,
36 }, 37 },
37}; 38};
@@ -56,8 +57,8 @@ static struct resource m66592_usb_peripheral_resources[] = {
56 }, 57 },
57 [1] = { 58 [1] = {
58 .name = "m66592_udc", 59 .name = "m66592_udc",
59 .start = 9, /* irq number */ 60 .start = IRQ_EXT4, /* irq number */
60 .end = 9, 61 .end = IRQ_EXT4,
61 .flags = IORESOURCE_IRQ, 62 .flags = IORESOURCE_IRQ,
62 }, 63 },
63}; 64};
@@ -85,11 +86,7 @@ static struct resource cf_ide_resources[] = {
85 .flags = IORESOURCE_MEM, 86 .flags = IORESOURCE_MEM,
86 }, 87 },
87 [2] = { 88 [2] = {
88#ifdef CONFIG_SH_R7780RP 89 .start = IRQ_CF,
89 .start = 4,
90#else
91 .start = 1,
92#endif
93 .flags = IORESOURCE_IRQ, 90 .flags = IORESOURCE_IRQ,
94 }, 91 },
95}; 92};
@@ -108,16 +105,23 @@ static struct platform_device cf_ide_device = {
108 }, 105 },
109}; 106};
110 107
111static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 };
112
113static struct resource heartbeat_resources[] = { 108static struct resource heartbeat_resources[] = {
114 [0] = { 109 [0] = {
115 .start = PA_OBLED, 110 .start = PA_OBLED,
116 .end = PA_OBLED + ARRAY_SIZE(heartbeat_bit_pos) - 1, 111 .end = PA_OBLED,
117 .flags = IORESOURCE_MEM, 112 .flags = IORESOURCE_MEM,
118 }, 113 },
119}; 114};
120 115
116#ifndef CONFIG_SH_R7785RP
117static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 };
118
119static struct heartbeat_data heartbeat_data = {
120 .bit_pos = heartbeat_bit_pos,
121 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
122};
123#endif
124
121static struct platform_device heartbeat_device = { 125static struct platform_device heartbeat_device = {
122 .name = "heartbeat", 126 .name = "heartbeat",
123 .id = -1, 127 .id = -1,
@@ -125,7 +129,7 @@ static struct platform_device heartbeat_device = {
125 /* R7785RP has a slightly more sensible FPGA.. */ 129 /* R7785RP has a slightly more sensible FPGA.. */
126#ifndef CONFIG_SH_R7785RP 130#ifndef CONFIG_SH_R7785RP
127 .dev = { 131 .dev = {
128 .platform_data = heartbeat_bit_pos, 132 .platform_data = &heartbeat_data,
129 }, 133 },
130#endif 134#endif
131 .num_resources = ARRAY_SIZE(heartbeat_resources), 135 .num_resources = ARRAY_SIZE(heartbeat_resources),
@@ -217,12 +221,50 @@ static void __init highlander_setup(char **cmdline_p)
217 pm_power_off = r7780rp_power_off; 221 pm_power_off = r7780rp_power_off;
218} 222}
219 223
224static unsigned char irl2irq[HL_NR_IRL];
225
226int highlander_irq_demux(int irq)
227{
228 if (irq >= HL_NR_IRL || !irl2irq[irq])
229 return irq;
230
231 return irl2irq[irq];
232}
233
234void __init highlander_init_irq(void)
235{
236 unsigned char *ucp = NULL;
237
238 do {
239#ifdef CONFIG_SH_R7780MP
240 ucp = highlander_init_irq_r7780mp();
241 if (ucp)
242 break;
243#endif
244#ifdef CONFIG_SH_R7785RP
245 ucp = highlander_init_irq_r7785rp();
246 if (ucp)
247 break;
248#endif
249#ifdef CONFIG_SH_R7780RP
250 highlander_init_irq_r7780rp();
251 ucp = irl2irq;
252 break;
253#endif
254 } while (0);
255
256 if (ucp) {
257 plat_irq_setup_pins(IRQ_MODE_IRL3210);
258 memcpy(irl2irq, ucp, HL_NR_IRL);
259 }
260}
261
220/* 262/*
221 * The Machine Vector 263 * The Machine Vector
222 */ 264 */
223static struct sh_machine_vector mv_highlander __initmv = { 265static struct sh_machine_vector mv_highlander __initmv = {
224 .mv_name = "Highlander", 266 .mv_name = "Highlander",
225 .mv_nr_irqs = 109,
226 .mv_setup = highlander_setup, 267 .mv_setup = highlander_setup,
227 .mv_init_irq = highlander_init_irq, 268 .mv_init_irq = highlander_init_irq,
269 .mv_irq_demux = highlander_irq_demux,
228}; 270};
diff --git a/arch/sh/boards/renesas/rts7751r2d/Kconfig b/arch/sh/boards/renesas/rts7751r2d/Kconfig
index 7780d1fb13ff..8122a9667fc9 100644
--- a/arch/sh/boards/renesas/rts7751r2d/Kconfig
+++ b/arch/sh/boards/renesas/rts7751r2d/Kconfig
@@ -1,11 +1,22 @@
1if SH_RTS7751R2D 1if SH_RTS7751R2D
2 2
3menu "RTS7751R2D options" 3menu "RTS7751R2D Board Revision"
4 4
5config RTS7751R2D_REV11 5config RTS7751R2D_PLUS
6 bool "RTS7751R2D Rev. 1.1 board support" 6 bool "R2D-PLUS"
7 help 7 help
8 Selecting this option will support version rev. 1.1. 8 Selecting this option will configure the kernel for R2D-PLUS.
9
10 R2D-PLUS is the smaller of the two R2D board versions, equipped
11 with a single PCI slot.
12
13config RTS7751R2D_1
14 bool "R2D-1"
15 help
16 Selecting this option will configure the kernel for R2D-1.
17
18 R2D-1 is the larger of the two R2D board versions, equipped
19 with two PCI slots.
9endmenu 20endmenu
10 21
11endif 22endif
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index 0bae9041aceb..7cc2813adfe4 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -1,84 +1,159 @@
1/* 1/*
2 * linux/arch/sh/boards/renesas/rts7751r2d/irq.c 2 * linux/arch/sh/boards/renesas/rts7751r2d/irq.c
3 * 3 *
4 * Copyright (C) 2007 Magnus Damm
4 * Copyright (C) 2000 Kazumoto Kojima 5 * Copyright (C) 2000 Kazumoto Kojima
5 * 6 *
6 * Renesas Technology Sales RTS7751R2D Support. 7 * Renesas Technology Sales RTS7751R2D Support, R2D-PLUS and R2D-1.
7 * 8 *
8 * Modified for RTS7751R2D by 9 * Modified for RTS7751R2D by
9 * Atom Create Engineering Co., Ltd. 2002. 10 * Atom Create Engineering Co., Ltd. 2002.
10 */ 11 */
11#include <linux/init.h> 12#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/voyagergx.h>
16#include <asm/rts7751r2d.h> 17#include <asm/rts7751r2d.h>
17 18
18#if defined(CONFIG_RTS7751R2D_REV11) 19#define R2D_NR_IRL 13
19static int mask_pos[] = {11, 9, 8, 12, 10, 6, 5, 4, 7, 14, 13, 0, 0, 0, 0};
20#else
21static int mask_pos[] = {6, 11, 9, 8, 12, 10, 5, 4, 7, 14, 13, 0, 0, 0, 0};
22#endif
23 20
24extern int voyagergx_irq_demux(int irq); 21enum {
25extern void setup_voyagergx_irq(void); 22 UNUSED = 0,
26 23
27static void enable_rts7751r2d_irq(unsigned int irq) 24 /* board specific interrupt sources (R2D-1 and R2D-PLUS) */
28{ 25 EXT, /* EXT_INT0-3 */
29 /* Set priority in IPR back to original value */ 26 RTC_T, RTC_A, /* Real Time Clock */
30 ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1); 27 AX88796, /* Ethernet controller (R2D-1 board) */
31} 28 KEY, /* Key input (R2D-PLUS board) */
29 SDCARD, /* SD Card */
30 CF_CD, CF_IDE, /* CF Card Detect + CF IDE */
31 SM501, /* SM501 aka Voyager */
32 PCI_INTD_RTL8139, /* Ethernet controller */
33 PCI_INTC_PCI1520, /* Cardbus/PCMCIA bridge */
34 PCI_INTB_RTL8139, /* Ethernet controller with HUB (R2D-PLUS board) */
35 PCI_INTB_SLOT, /* PCI Slot 3.3v (R2D-1 board) */
36 PCI_INTA_SLOT, /* PCI Slot 3.3v */
37 TP, /* Touch Panel */
38};
32 39
33static void disable_rts7751r2d_irq(unsigned int irq) 40#ifdef CONFIG_RTS7751R2D_1
34{ 41
35 /* Set the priority in IPR to 0 */ 42/* Vectors for R2D-1 */
36 ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])), 43static struct intc_vect vectors_r2d_1[] __initdata = {
37 IRLCNTR1); 44 INTC_IRQ(EXT, IRQ_EXT),
38} 45 INTC_IRQ(RTC_T, IRQ_RTC_T), INTC_IRQ(RTC_A, IRQ_RTC_A),
46 INTC_IRQ(AX88796, IRQ_AX88796), INTC_IRQ(SDCARD, IRQ_SDCARD),
47 INTC_IRQ(CF_CD, IRQ_CF_CD), INTC_IRQ(CF_IDE, IRQ_CF_IDE), /* ng */
48 INTC_IRQ(SM501, IRQ_VOYAGER),
49 INTC_IRQ(PCI_INTD_RTL8139, IRQ_PCI_INTD),
50 INTC_IRQ(PCI_INTC_PCI1520, IRQ_PCI_INTC),
51 INTC_IRQ(PCI_INTB_SLOT, IRQ_PCI_INTB),
52 INTC_IRQ(PCI_INTA_SLOT, IRQ_PCI_INTA),
53 INTC_IRQ(TP, IRQ_TP),
54};
55
56/* IRLMSK mask register layout for R2D-1 */
57static struct intc_mask_reg mask_registers_r2d_1[] __initdata = {
58 { 0xa4000000, 0, 16, /* IRLMSK */
59 { TP, PCI_INTA_SLOT, PCI_INTB_SLOT,
60 PCI_INTC_PCI1520, PCI_INTD_RTL8139,
61 SM501, CF_IDE, CF_CD, SDCARD, AX88796,
62 RTC_A, RTC_T, 0, 0, 0, EXT } },
63};
64
65/* IRLn to IRQ table for R2D-1 */
66static unsigned char irl2irq_r2d_1[R2D_NR_IRL] __initdata = {
67 IRQ_PCI_INTD, IRQ_CF_IDE, IRQ_CF_CD, IRQ_PCI_INTC,
68 IRQ_VOYAGER, IRQ_AX88796, IRQ_RTC_A, IRQ_RTC_T,
69 IRQ_SDCARD, IRQ_PCI_INTA, IRQ_PCI_INTB, IRQ_EXT,
70 IRQ_TP,
71};
72
73static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1,
74 NULL, NULL, mask_registers_r2d_1, NULL, NULL);
75
76#endif /* CONFIG_RTS7751R2D_1 */
77
78#ifdef CONFIG_RTS7751R2D_PLUS
79
80/* Vectors for R2D-PLUS */
81static struct intc_vect vectors_r2d_plus[] __initdata = {
82 INTC_IRQ(EXT, IRQ_EXT),
83 INTC_IRQ(RTC_T, IRQ_RTC_T), INTC_IRQ(RTC_A, IRQ_RTC_A),
84 INTC_IRQ(KEY, IRQ_KEY), INTC_IRQ(SDCARD, IRQ_SDCARD),
85 INTC_IRQ(CF_CD, IRQ_CF_CD), INTC_IRQ(CF_IDE, IRQ_CF_IDE),
86 INTC_IRQ(SM501, IRQ_VOYAGER),
87 INTC_IRQ(PCI_INTD_RTL8139, IRQ_PCI_INTD),
88 INTC_IRQ(PCI_INTC_PCI1520, IRQ_PCI_INTC),
89 INTC_IRQ(PCI_INTB_RTL8139, IRQ_PCI_INTB),
90 INTC_IRQ(PCI_INTA_SLOT, IRQ_PCI_INTA),
91 INTC_IRQ(TP, IRQ_TP),
92};
93
94/* IRLMSK mask register layout for R2D-PLUS */
95static struct intc_mask_reg mask_registers_r2d_plus[] __initdata = {
96 { 0xa4000000, 0, 16, /* IRLMSK */
97 { TP, PCI_INTA_SLOT, PCI_INTB_RTL8139,
98 PCI_INTC_PCI1520, PCI_INTD_RTL8139,
99 SM501, CF_IDE, CF_CD, SDCARD, KEY,
100 RTC_A, RTC_T, 0, 0, 0, EXT } },
101};
102
103/* IRLn to IRQ table for R2D-PLUS */
104static unsigned char irl2irq_r2d_plus[R2D_NR_IRL] __initdata = {
105 IRQ_PCI_INTD, IRQ_CF_IDE, IRQ_CF_CD, IRQ_PCI_INTC,
106 IRQ_VOYAGER, IRQ_KEY, IRQ_RTC_A, IRQ_RTC_T,
107 IRQ_SDCARD, IRQ_PCI_INTA, IRQ_PCI_INTB, IRQ_EXT,
108 IRQ_TP,
109};
110
111static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus,
112 NULL, NULL, mask_registers_r2d_plus, NULL, NULL);
113
114#endif /* CONFIG_RTS7751R2D_PLUS */
115
116static unsigned char irl2irq[R2D_NR_IRL];
39 117
40int rts7751r2d_irq_demux(int irq) 118int rts7751r2d_irq_demux(int irq)
41{ 119{
42 return voyagergx_irq_demux(irq); 120 if (irq >= R2D_NR_IRL || !irl2irq[irq])
43} 121 return irq;
44 122
45static struct irq_chip rts7751r2d_irq_chip __read_mostly = { 123 return irl2irq[irq];
46 .name = "rts7751r2d", 124}
47 .mask = disable_rts7751r2d_irq,
48 .unmask = enable_rts7751r2d_irq,
49 .mask_ack = disable_rts7751r2d_irq,
50};
51 125
52/* 126/*
53 * Initialize IRQ setting 127 * Initialize IRQ setting
54 */ 128 */
55void __init init_rts7751r2d_IRQ(void) 129void __init init_rts7751r2d_IRQ(void)
56{ 130{
57 int i; 131 struct intc_desc *d;
58 132
59 /* IRL0=KEY Input 133 switch (ctrl_inw(PA_VERREG) & 0xf0) {
60 * IRL1=Ethernet 134#ifdef CONFIG_RTS7751R2D_PLUS
61 * IRL2=CF Card 135 case 0x10:
62 * IRL3=CF Card Insert 136 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
63 * IRL4=PCMCIA 137 d = &intc_desc_r2d_plus;
64 * IRL5=VOYAGER 138 memcpy(irl2irq, irl2irq_r2d_plus, R2D_NR_IRL);
65 * IRL6=RTC Alarm 139 break;
66 * IRL7=RTC Timer 140#endif
67 * IRL8=SD Card 141#ifdef CONFIG_RTS7751R2D_1
68 * IRL9=PCI Slot #1 142 case 0x00: /* according to manual */
69 * IRL10=PCI Slot #2 143 case 0x30: /* in reality */
70 * IRL11=Extention #0 144 printk(KERN_INFO "Using R2D-1 interrupt controller.\n");
71 * IRL12=Extention #1 145 d = &intc_desc_r2d_1;
72 * IRL13=Extention #2 146 memcpy(irl2irq, irl2irq_r2d_1, R2D_NR_IRL);
73 * IRL14=Extention #3 147 break;
74 */ 148#endif
75 149 default:
76 for (i=0; i<15; i++) { 150 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
77 disable_irq_nosync(i); 151 ctrl_inw(PA_VERREG));
78 set_irq_chip_and_handler_name(i, &rts7751r2d_irq_chip, 152 return;
79 handle_level_irq, "level");
80 enable_rts7751r2d_irq(i);
81 } 153 }
82 154
155 register_intc_controller(d);
156#ifdef CONFIG_MFD_SM501
83 setup_voyagergx_irq(); 157 setup_voyagergx_irq();
158#endif
84} 159}
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index 6f7029d33241..37f2c0b447fe 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -45,20 +45,16 @@ static void __init voyagergx_serial_init(void)
45static struct resource cf_ide_resources[] = { 45static struct resource cf_ide_resources[] = {
46 [0] = { 46 [0] = {
47 .start = PA_AREA5_IO + 0x1000, 47 .start = PA_AREA5_IO + 0x1000,
48 .end = PA_AREA5_IO + 0x1000 + 0x08 - 1, 48 .end = PA_AREA5_IO + 0x1000 + 0x10 - 0x2,
49 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
50 }, 50 },
51 [1] = { 51 [1] = {
52 .start = PA_AREA5_IO + 0x80c, 52 .start = PA_AREA5_IO + 0x80c,
53 .end = PA_AREA5_IO + 0x80c + 0x16 - 1, 53 .end = PA_AREA5_IO + 0x80c,
54 .flags = IORESOURCE_MEM, 54 .flags = IORESOURCE_MEM,
55 }, 55 },
56 [2] = { 56 [2] = {
57#ifdef CONFIG_RTS7751R2D_REV11 57 .start = IRQ_CF_IDE,
58 .start = 1,
59#else
60 .start = 2,
61#endif
62 .flags = IORESOURCE_IRQ, 58 .flags = IORESOURCE_IRQ,
63 }, 59 },
64}; 60};
@@ -77,12 +73,28 @@ static struct platform_device cf_ide_device = {
77 }, 73 },
78}; 74};
79 75
76static struct resource heartbeat_resources[] = {
77 [0] = {
78 .start = PA_OUTPORT,
79 .end = PA_OUTPORT,
80 .flags = IORESOURCE_MEM,
81 },
82};
83
84static struct platform_device heartbeat_device = {
85 .name = "heartbeat",
86 .id = -1,
87 .num_resources = ARRAY_SIZE(heartbeat_resources),
88 .resource = heartbeat_resources,
89};
90
91#ifdef CONFIG_MFD_SM501
80static struct plat_serial8250_port uart_platform_data[] = { 92static struct plat_serial8250_port uart_platform_data[] = {
81 { 93 {
82 .membase = (void __iomem *)VOYAGER_UART_BASE, 94 .membase = (void __iomem *)VOYAGER_UART_BASE,
83 .mapbase = VOYAGER_UART_BASE, 95 .mapbase = VOYAGER_UART_BASE,
84 .iotype = UPIO_MEM, 96 .iotype = UPIO_MEM,
85 .irq = VOYAGER_UART0_IRQ, 97 .irq = IRQ_SM501_U0,
86 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 98 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
87 .regshift = 2, 99 .regshift = 2,
88 .uartclk = (9600 * 16), 100 .uartclk = (9600 * 16),
@@ -98,21 +110,6 @@ static struct platform_device uart_device = {
98 }, 110 },
99}; 111};
100 112
101static struct resource heartbeat_resources[] = {
102 [0] = {
103 .start = PA_OUTPORT,
104 .end = PA_OUTPORT + 8 - 1,
105 .flags = IORESOURCE_MEM,
106 },
107};
108
109static struct platform_device heartbeat_device = {
110 .name = "heartbeat",
111 .id = -1,
112 .num_resources = ARRAY_SIZE(heartbeat_resources),
113 .resource = heartbeat_resources,
114};
115
116static struct resource sm501_resources[] = { 113static struct resource sm501_resources[] = {
117 [0] = { 114 [0] = {
118 .start = 0x10000000, 115 .start = 0x10000000,
@@ -125,7 +122,7 @@ static struct resource sm501_resources[] = {
125 .flags = IORESOURCE_MEM, 122 .flags = IORESOURCE_MEM,
126 }, 123 },
127 [2] = { 124 [2] = {
128 .start = 32, 125 .start = IRQ_SM501_CV,
129 .flags = IORESOURCE_IRQ, 126 .flags = IORESOURCE_IRQ,
130 }, 127 },
131}; 128};
@@ -137,22 +134,19 @@ static struct platform_device sm501_device = {
137 .resource = sm501_resources, 134 .resource = sm501_resources,
138}; 135};
139 136
137#endif /* CONFIG_MFD_SM501 */
138
140static struct platform_device *rts7751r2d_devices[] __initdata = { 139static struct platform_device *rts7751r2d_devices[] __initdata = {
140#ifdef CONFIG_MFD_SM501
141 &uart_device, 141 &uart_device,
142 &heartbeat_device,
143 &sm501_device, 142 &sm501_device,
143#endif
144 &cf_ide_device,
145 &heartbeat_device,
144}; 146};
145 147
146static int __init rts7751r2d_devices_setup(void) 148static int __init rts7751r2d_devices_setup(void)
147{ 149{
148 int ret;
149
150 if (ctrl_inw(PA_BVERREG) == 0x10) { /* only working on R2D-PLUS */
151 ret = platform_device_register(&cf_ide_device);
152 if (ret)
153 return ret;
154 }
155
156 return platform_add_devices(rts7751r2d_devices, 150 return platform_add_devices(rts7751r2d_devices,
157 ARRAY_SIZE(rts7751r2d_devices)); 151 ARRAY_SIZE(rts7751r2d_devices));
158} 152}
@@ -163,6 +157,34 @@ static void rts7751r2d_power_off(void)
163 ctrl_outw(0x0001, PA_POWOFF); 157 ctrl_outw(0x0001, PA_POWOFF);
164} 158}
165 159
160static inline unsigned char is_ide_ioaddr(unsigned long addr)
161{
162 return ((cf_ide_resources[0].start <= addr &&
163 addr <= cf_ide_resources[0].end) ||
164 (cf_ide_resources[1].start <= addr &&
165 addr <= cf_ide_resources[1].end));
166}
167
168void rts7751r2d_writeb(u8 b, void __iomem *addr)
169{
170 unsigned long tmp = (unsigned long __force)addr;
171
172 if (is_ide_ioaddr(tmp))
173 ctrl_outw((u16)b, tmp);
174 else
175 ctrl_outb(b, tmp);
176}
177
178u8 rts7751r2d_readb(void __iomem *addr)
179{
180 unsigned long tmp = (unsigned long __force)addr;
181
182 if (is_ide_ioaddr(tmp))
183 return ctrl_inw(tmp) & 0xff;
184 else
185 return ctrl_inb(tmp);
186}
187
166/* 188/*
167 * Initialize the board 189 * Initialize the board
168 */ 190 */
@@ -187,12 +209,11 @@ static void __init rts7751r2d_setup(char **cmdline_p)
187static struct sh_machine_vector mv_rts7751r2d __initmv = { 209static struct sh_machine_vector mv_rts7751r2d __initmv = {
188 .mv_name = "RTS7751R2D", 210 .mv_name = "RTS7751R2D",
189 .mv_setup = rts7751r2d_setup, 211 .mv_setup = rts7751r2d_setup,
190 .mv_nr_irqs = 72,
191
192 .mv_init_irq = init_rts7751r2d_IRQ, 212 .mv_init_irq = init_rts7751r2d_IRQ,
193 .mv_irq_demux = rts7751r2d_irq_demux, 213 .mv_irq_demux = rts7751r2d_irq_demux,
194 214 .mv_writeb = rts7751r2d_writeb,
195#ifdef CONFIG_USB_SM501 215 .mv_readb = rts7751r2d_readb,
216#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD)
196 .mv_consistent_alloc = voyagergx_consistent_alloc, 217 .mv_consistent_alloc = voyagergx_consistent_alloc,
197 .mv_consistent_free = voyagergx_consistent_free, 218 .mv_consistent_free = voyagergx_consistent_free,
198#endif 219#endif
diff --git a/arch/sh/boards/renesas/x3proto/Makefile b/arch/sh/boards/renesas/x3proto/Makefile
new file mode 100644
index 000000000000..983e4551fecf
--- /dev/null
+++ b/arch/sh/boards/renesas/x3proto/Makefile
@@ -0,0 +1 @@
obj-y += setup.o ilsel.o
diff --git a/arch/sh/boards/renesas/x3proto/ilsel.c b/arch/sh/boards/renesas/x3proto/ilsel.c
new file mode 100644
index 000000000000..6d4454fef97c
--- /dev/null
+++ b/arch/sh/boards/renesas/x3proto/ilsel.c
@@ -0,0 +1,151 @@
1/*
2 * arch/sh/boards/renesas/x3proto/ilsel.c
3 *
4 * Helper routines for SH-X3 proto board ILSEL.
5 *
6 * Copyright (C) 2007 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/bitmap.h>
16#include <linux/io.h>
17#include <asm/ilsel.h>
18
19/*
20 * ILSEL is split across:
21 *
22 * ILSEL0 - 0xb8100004 [ Levels 1 - 4 ]
23 * ILSEL1 - 0xb8100006 [ Levels 5 - 8 ]
24 * ILSEL2 - 0xb8100008 [ Levels 9 - 12 ]
25 * ILSEL3 - 0xb810000a [ Levels 13 - 15 ]
26 *
27 * With each level being relative to an ilsel_source_t.
28 */
29#define ILSEL_BASE 0xb8100004
30#define ILSEL_LEVELS 15
31
32/*
33 * ILSEL level map, in descending order from the highest level down.
34 *
35 * Supported levels are 1 - 15 spread across ILSEL0 - ILSEL4, mapping
36 * directly to IRLs. As the IRQs are numbered in reverse order relative
37 * to the interrupt level, the level map is carefully managed to ensure a
38 * 1:1 mapping between the bit position and the IRQ number.
39 *
40 * This careful constructions allows ilsel_enable*() to be referenced
41 * directly for hooking up an ILSEL set and getting back an IRQ which can
42 * subsequently be used for internal accounting in the (optional) disable
43 * path.
44 */
45static unsigned long ilsel_level_map;
46
47static inline unsigned int ilsel_offset(unsigned int bit)
48{
49 return ILSEL_LEVELS - bit - 1;
50}
51
52static inline unsigned long mk_ilsel_addr(unsigned int bit)
53{
54 return ILSEL_BASE + ((ilsel_offset(bit) >> 1) & ~0x1);
55}
56
57static inline unsigned int mk_ilsel_shift(unsigned int bit)
58{
59 return (ilsel_offset(bit) & 0x3) << 2;
60}
61
62static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
63{
64 unsigned int tmp, shift;
65 unsigned long addr;
66
67 addr = mk_ilsel_addr(bit);
68 shift = mk_ilsel_shift(bit);
69
70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
71 __FUNCTION__, bit, addr, shift, set);
72
73 tmp = ctrl_inw(addr);
74 tmp &= ~(0xf << shift);
75 tmp |= set << shift;
76 ctrl_outw(tmp, addr);
77}
78
79/**
80 * ilsel_enable - Enable an ILSEL set.
81 * @set: ILSEL source (see ilsel_source_t enum in include/asm-sh/ilsel.h).
82 *
83 * Enables a given non-aliased ILSEL source (<= ILSEL_KEY) at the highest
84 * available interrupt level. Callers should take care to order callsites
85 * noting descending interrupt levels. Aliasing FPGA and external board
86 * IRQs need to use ilsel_enable_fixed().
87 *
88 * The return value is an IRQ number that can later be taken down with
89 * ilsel_disable().
90 */
91int ilsel_enable(ilsel_source_t set)
92{
93 unsigned int bit;
94
95 /* Aliased sources must use ilsel_enable_fixed() */
96 BUG_ON(set > ILSEL_KEY);
97
98 do {
99 bit = find_first_zero_bit(&ilsel_level_map, ILSEL_LEVELS);
100 } while (test_and_set_bit(bit, &ilsel_level_map));
101
102 __ilsel_enable(set, bit);
103
104 return bit;
105}
106EXPORT_SYMBOL_GPL(ilsel_enable);
107
108/**
109 * ilsel_enable_fixed - Enable an ILSEL set at a fixed interrupt level
110 * @set: ILSEL source (see ilsel_source_t enum in include/asm-sh/ilsel.h).
111 * @level: Interrupt level (1 - 15)
112 *
113 * Enables a given ILSEL source at a fixed interrupt level. Necessary
114 * both for level reservation as well as for aliased sources that only
115 * exist on special ILSEL#s.
116 *
117 * Returns an IRQ number (as ilsel_enable()).
118 */
119int ilsel_enable_fixed(ilsel_source_t set, unsigned int level)
120{
121 unsigned int bit = ilsel_offset(level - 1);
122
123 if (test_and_set_bit(bit, &ilsel_level_map))
124 return -EBUSY;
125
126 __ilsel_enable(set, bit);
127
128 return bit;
129}
130EXPORT_SYMBOL_GPL(ilsel_enable_fixed);
131
132/**
133 * ilsel_disable - Disable an ILSEL set
134 * @irq: Bit position for ILSEL set value (retval from enable routines)
135 *
136 * Disable a previously enabled ILSEL set.
137 */
138void ilsel_disable(unsigned int irq)
139{
140 unsigned long addr;
141 unsigned int tmp;
142
143 addr = mk_ilsel_addr(irq);
144
145 tmp = ctrl_inw(addr);
146 tmp &= ~(0xf << mk_ilsel_shift(irq));
147 ctrl_outw(tmp, addr);
148
149 clear_bit(irq, &ilsel_level_map);
150}
151EXPORT_SYMBOL_GPL(ilsel_disable);
diff --git a/arch/sh/boards/renesas/x3proto/setup.c b/arch/sh/boards/renesas/x3proto/setup.c
new file mode 100644
index 000000000000..abc5b6d418fe
--- /dev/null
+++ b/arch/sh/boards/renesas/x3proto/setup.c
@@ -0,0 +1,136 @@
1/*
2 * arch/sh/boards/renesas/x3proto/setup.c
3 *
4 * Renesas SH-X3 Prototype Board Support.
5 *
6 * Copyright (C) 2007 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/kernel.h>
15#include <linux/io.h>
16#include <asm/ilsel.h>
17
18static struct resource heartbeat_resources[] = {
19 [0] = {
20 .start = 0xb8140020,
21 .end = 0xb8140020,
22 .flags = IORESOURCE_MEM,
23 },
24};
25
26static struct platform_device heartbeat_device = {
27 .name = "heartbeat",
28 .id = -1,
29 .num_resources = ARRAY_SIZE(heartbeat_resources),
30 .resource = heartbeat_resources,
31};
32
33static struct resource smc91x_resources[] = {
34 [0] = {
35 .start = 0x18000300,
36 .end = 0x18000300 + 0x10 - 1,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 /* Filled in by ilsel */
41 .flags = IORESOURCE_IRQ,
42 },
43};
44
45static struct platform_device smc91x_device = {
46 .name = "smc91x",
47 .id = -1,
48 .resource = smc91x_resources,
49 .num_resources = ARRAY_SIZE(smc91x_resources),
50};
51
52static struct resource r8a66597_usb_host_resources[] = {
53 [0] = {
54 .name = "r8a66597_hcd",
55 .start = 0x18040000,
56 .end = 0x18080000 - 1,
57 .flags = IORESOURCE_MEM,
58 },
59 [1] = {
60 .name = "r8a66597_hcd",
61 /* Filled in by ilsel */
62 .flags = IORESOURCE_IRQ,
63 },
64};
65
66static struct platform_device r8a66597_usb_host_device = {
67 .name = "r8a66597_hcd",
68 .id = -1,
69 .dev = {
70 .dma_mask = NULL, /* don't use dma */
71 .coherent_dma_mask = 0xffffffff,
72 },
73 .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
74 .resource = r8a66597_usb_host_resources,
75};
76
77static struct resource m66592_usb_peripheral_resources[] = {
78 [0] = {
79 .name = "m66592_udc",
80 .start = 0x18080000,
81 .end = 0x180c0000 - 1,
82 .flags = IORESOURCE_MEM,
83 },
84 [1] = {
85 .name = "m66592_udc",
86 /* Filled in by ilsel */
87 .flags = IORESOURCE_IRQ,
88 },
89};
90
91static struct platform_device m66592_usb_peripheral_device = {
92 .name = "m66592_udc",
93 .id = -1,
94 .dev = {
95 .dma_mask = NULL, /* don't use dma */
96 .coherent_dma_mask = 0xffffffff,
97 },
98 .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources),
99 .resource = m66592_usb_peripheral_resources,
100};
101
102static struct platform_device *x3proto_devices[] __initdata = {
103 &heartbeat_device,
104 &smc91x_device,
105 &r8a66597_usb_host_device,
106 &m66592_usb_peripheral_device,
107};
108
109static int __init x3proto_devices_setup(void)
110{
111 r8a66597_usb_host_resources[1].start =
112 r8a66597_usb_host_resources[1].end = ilsel_enable(ILSEL_USBH_I);
113
114 m66592_usb_peripheral_resources[1].start =
115 m66592_usb_peripheral_resources[1].end = ilsel_enable(ILSEL_USBP_I);
116
117 smc91x_resources[1].start =
118 smc91x_resources[1].end = ilsel_enable(ILSEL_LAN);
119
120 return platform_add_devices(x3proto_devices,
121 ARRAY_SIZE(x3proto_devices));
122}
123device_initcall(x3proto_devices_setup);
124
125static void __init x3proto_init_irq(void)
126{
127 plat_irq_setup_pins(IRQ_MODE_IRL3210);
128
129 /* Set ICR0.LVLMODE */
130 ctrl_outl(ctrl_inl(0xfe410000) | (1 << 21), 0xfe410000);
131}
132
133static struct sh_machine_vector mv_x3proto __initmv = {
134 .mv_name = "x3proto",
135 .mv_init_irq = x3proto_init_irq,
136};
diff --git a/arch/sh/boards/se/7206/io.c b/arch/sh/boards/se/7206/io.c
index b557273e0cbe..1308e618e044 100644
--- a/arch/sh/boards/se/7206/io.c
+++ b/arch/sh/boards/se/7206/io.c
@@ -26,22 +26,24 @@ static inline void delay(void)
26static inline volatile __u16 * 26static inline volatile __u16 *
27port2adr(unsigned int port) 27port2adr(unsigned int port)
28{ 28{
29 if (port >= 0x2000) 29 if (port >= 0x2000 && port < 0x2020)
30 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 30 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
31 else if (port >= 0x300 || port < 0x310) 31 else if (port >= 0x300 && port < 0x310)
32 return (volatile __u16 *) (PA_SMSC + (port - 0x300)); 32 return (volatile __u16 *) (PA_SMSC + (port - 0x300));
33
34 return (volatile __u16 *)port;
33} 35}
34 36
35unsigned char se7206_inb(unsigned long port) 37unsigned char se7206_inb(unsigned long port)
36{ 38{
37 return (*port2adr(port))&0xff; 39 return (*port2adr(port)) & 0xff;
38} 40}
39 41
40unsigned char se7206_inb_p(unsigned long port) 42unsigned char se7206_inb_p(unsigned long port)
41{ 43{
42 unsigned long v; 44 unsigned long v;
43 45
44 v = (*port2adr(port))&0xff; 46 v = (*port2adr(port)) & 0xff;
45 delay(); 47 delay();
46 return v; 48 return v;
47} 49}
@@ -51,12 +53,6 @@ unsigned short se7206_inw(unsigned long port)
51 return *port2adr(port);; 53 return *port2adr(port);;
52} 54}
53 55
54unsigned int se7206_inl(unsigned long port)
55{
56 maybebadio(port);
57 return 0;
58}
59
60void se7206_outb(unsigned char value, unsigned long port) 56void se7206_outb(unsigned char value, unsigned long port)
61{ 57{
62 *(port2adr(port)) = value; 58 *(port2adr(port)) = value;
@@ -73,11 +69,6 @@ void se7206_outw(unsigned short value, unsigned long port)
73 *port2adr(port) = value; 69 *port2adr(port) = value;
74} 70}
75 71
76void se7206_outl(unsigned int value, unsigned long port)
77{
78 maybebadio(port);
79}
80
81void se7206_insb(unsigned long port, void *addr, unsigned long count) 72void se7206_insb(unsigned long port, void *addr, unsigned long count)
82{ 73{
83 volatile __u16 *p = port2adr(port); 74 volatile __u16 *p = port2adr(port);
@@ -95,11 +86,6 @@ void se7206_insw(unsigned long port, void *addr, unsigned long count)
95 *ap++ = *p; 86 *ap++ = *p;
96} 87}
97 88
98void se7206_insl(unsigned long port, void *addr, unsigned long count)
99{
100 maybebadio(port);
101}
102
103void se7206_outsb(unsigned long port, const void *addr, unsigned long count) 89void se7206_outsb(unsigned long port, const void *addr, unsigned long count)
104{ 90{
105 volatile __u16 *p = port2adr(port); 91 volatile __u16 *p = port2adr(port);
@@ -116,8 +102,3 @@ void se7206_outsw(unsigned long port, const void *addr, unsigned long count)
116 while (count--) 102 while (count--)
117 *p = *ap++; 103 *p = *ap++;
118} 104}
119
120void se7206_outsl(unsigned long port, const void *addr, unsigned long count)
121{
122 maybebadio(port);
123}
diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c
index a074b62505ef..5b3ee089d91d 100644
--- a/arch/sh/boards/se/7206/setup.c
+++ b/arch/sh/boards/se/7206/setup.c
@@ -6,14 +6,13 @@
6 * Copyright (C) 2007 Paul Mundt 6 * Copyright (C) 2007 Paul Mundt
7 * 7 *
8 * Hitachi 7206 SolutionEngine Support. 8 * Hitachi 7206 SolutionEngine Support.
9 *
10 */ 9 */
11
12#include <linux/init.h> 10#include <linux/init.h>
13#include <linux/platform_device.h> 11#include <linux/platform_device.h>
14#include <asm/se7206.h> 12#include <asm/se7206.h>
15#include <asm/io.h> 13#include <asm/io.h>
16#include <asm/machvec.h> 14#include <asm/machvec.h>
15#include <asm/heartbeat.h>
17 16
18static struct resource smc91x_resources[] = { 17static struct resource smc91x_resources[] = {
19 [0] = { 18 [0] = {
@@ -37,10 +36,16 @@ static struct platform_device smc91x_device = {
37 36
38static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; 37static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
39 38
39static struct heartbeat_data heartbeat_data = {
40 .bit_pos = heartbeat_bit_pos,
41 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
42 .regsize = 32,
43};
44
40static struct resource heartbeat_resources[] = { 45static struct resource heartbeat_resources[] = {
41 [0] = { 46 [0] = {
42 .start = PA_LED, 47 .start = PA_LED,
43 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, 48 .end = PA_LED,
44 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
45 }, 50 },
46}; 51};
@@ -49,7 +54,7 @@ static struct platform_device heartbeat_device = {
49 .name = "heartbeat", 54 .name = "heartbeat",
50 .id = -1, 55 .id = -1,
51 .dev = { 56 .dev = {
52 .platform_data = heartbeat_bit_pos, 57 .platform_data = &heartbeat_data,
53 }, 58 },
54 .num_resources = ARRAY_SIZE(heartbeat_resources), 59 .num_resources = ARRAY_SIZE(heartbeat_resources),
55 .resource = heartbeat_resources, 60 .resource = heartbeat_resources,
@@ -75,24 +80,18 @@ static struct sh_machine_vector mv_se __initmv = {
75 .mv_nr_irqs = 256, 80 .mv_nr_irqs = 256,
76 .mv_inb = se7206_inb, 81 .mv_inb = se7206_inb,
77 .mv_inw = se7206_inw, 82 .mv_inw = se7206_inw,
78 .mv_inl = se7206_inl,
79 .mv_outb = se7206_outb, 83 .mv_outb = se7206_outb,
80 .mv_outw = se7206_outw, 84 .mv_outw = se7206_outw,
81 .mv_outl = se7206_outl,
82 85
83 .mv_inb_p = se7206_inb_p, 86 .mv_inb_p = se7206_inb_p,
84 .mv_inw_p = se7206_inw, 87 .mv_inw_p = se7206_inw,
85 .mv_inl_p = se7206_inl,
86 .mv_outb_p = se7206_outb_p, 88 .mv_outb_p = se7206_outb_p,
87 .mv_outw_p = se7206_outw, 89 .mv_outw_p = se7206_outw,
88 .mv_outl_p = se7206_outl,
89 90
90 .mv_insb = se7206_insb, 91 .mv_insb = se7206_insb,
91 .mv_insw = se7206_insw, 92 .mv_insw = se7206_insw,
92 .mv_insl = se7206_insl,
93 .mv_outsb = se7206_outsb, 93 .mv_outsb = se7206_outsb,
94 .mv_outsw = se7206_outsw, 94 .mv_outsw = se7206_outsw,
95 .mv_outsl = se7206_outsl,
96 95
97 .mv_init_irq = init_se7206_IRQ, 96 .mv_init_irq = init_se7206_IRQ,
98}; 97};
diff --git a/arch/sh/boards/se/7343/irq.c b/arch/sh/boards/se/7343/irq.c
index 360153ecc55b..763f6deba814 100644
--- a/arch/sh/boards/se/7343/irq.c
+++ b/arch/sh/boards/se/7343/irq.c
@@ -99,8 +99,11 @@ shmse_irq_demux(int irq)
99 * 99 *
100 * We configure IRQ5 as a cascade IRQ. 100 * We configure IRQ5 as a cascade IRQ.
101 */ 101 */
102static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade", 102static struct irqaction irq5 = {
103 NULL, NULL}; 103 .handler = no_action,
104 .mask = CPU_MASK_NONE,
105 .name = "IRQ5-cascade",
106};
104 107
105static struct ipr_data se7343_irq5_ipr_map[] = { 108static struct ipr_data se7343_irq5_ipr_map[] = {
106 { IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY }, 109 { IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY },
diff --git a/arch/sh/boards/se/7343/setup.c b/arch/sh/boards/se/7343/setup.c
index 8fec155e2ff7..c9431b3a051b 100644
--- a/arch/sh/boards/se/7343/setup.c
+++ b/arch/sh/boards/se/7343/setup.c
@@ -33,7 +33,7 @@ static struct platform_device smc91x_device = {
33static struct resource heartbeat_resources[] = { 33static struct resource heartbeat_resources[] = {
34 [0] = { 34 [0] = {
35 .start = PA_LED, 35 .start = PA_LED,
36 .end = PA_LED + 8 - 1, 36 .end = PA_LED,
37 .flags = IORESOURCE_MEM, 37 .flags = IORESOURCE_MEM,
38 }, 38 },
39}; 39};
diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c
index 2962da148f3f..d07a3368f546 100644
--- a/arch/sh/boards/se/770x/setup.c
+++ b/arch/sh/boards/se/770x/setup.c
@@ -12,6 +12,7 @@
12#include <asm/se.h> 12#include <asm/se.h>
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/smc37c93x.h> 14#include <asm/smc37c93x.h>
15#include <asm/heartbeat.h>
15 16
16void init_se_IRQ(void); 17void init_se_IRQ(void);
17 18
@@ -90,10 +91,15 @@ static struct platform_device cf_ide_device = {
90 91
91static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; 92static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
92 93
94static struct heartbeat_data heartbeat_data = {
95 .bit_pos = heartbeat_bit_pos,
96 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
97};
98
93static struct resource heartbeat_resources[] = { 99static struct resource heartbeat_resources[] = {
94 [0] = { 100 [0] = {
95 .start = PA_LED, 101 .start = PA_LED,
96 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, 102 .end = PA_LED,
97 .flags = IORESOURCE_MEM, 103 .flags = IORESOURCE_MEM,
98 }, 104 },
99}; 105};
@@ -102,7 +108,7 @@ static struct platform_device heartbeat_device = {
102 .name = "heartbeat", 108 .name = "heartbeat",
103 .id = -1, 109 .id = -1,
104 .dev = { 110 .dev = {
105 .platform_data = heartbeat_bit_pos, 111 .platform_data = &heartbeat_data,
106 }, 112 },
107 .num_resources = ARRAY_SIZE(heartbeat_resources), 113 .num_resources = ARRAY_SIZE(heartbeat_resources),
108 .resource = heartbeat_resources, 114 .resource = heartbeat_resources,
diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c
index 495fc7e2b60f..03b63457e178 100644
--- a/arch/sh/boards/se/7722/setup.c
+++ b/arch/sh/boards/se/7722/setup.c
@@ -18,12 +18,10 @@
18#include <asm/io.h> 18#include <asm/io.h>
19 19
20/* Heartbeat */ 20/* Heartbeat */
21static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
22
23static struct resource heartbeat_resources[] = { 21static struct resource heartbeat_resources[] = {
24 [0] = { 22 [0] = {
25 .start = PA_LED, 23 .start = PA_LED,
26 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, 24 .end = PA_LED,
27 .flags = IORESOURCE_MEM, 25 .flags = IORESOURCE_MEM,
28 }, 26 },
29}; 27};
@@ -31,9 +29,6 @@ static struct resource heartbeat_resources[] = {
31static struct platform_device heartbeat_device = { 29static struct platform_device heartbeat_device = {
32 .name = "heartbeat", 30 .name = "heartbeat",
33 .id = -1, 31 .id = -1,
34 .dev = {
35 .platform_data = heartbeat_bit_pos,
36 },
37 .num_resources = ARRAY_SIZE(heartbeat_resources), 32 .num_resources = ARRAY_SIZE(heartbeat_resources),
38 .resource = heartbeat_resources, 33 .resource = heartbeat_resources,
39}; 34};
@@ -109,7 +104,7 @@ static void __init se7722_setup(char **cmdline_p)
109 ctrl_outl(0x00051001, MSTPCR0); 104 ctrl_outl(0x00051001, MSTPCR0);
110 ctrl_outl(0x00000000, MSTPCR1); 105 ctrl_outl(0x00000000, MSTPCR1);
111 /* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC */ 106 /* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC */
112 ctrl_outl(0xffffbfC0, MSTPCR2); 107 ctrl_outl(0xffffbfC0, MSTPCR2);
113 108
114 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 109 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
115 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ 110 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
diff --git a/arch/sh/boards/se/7751/setup.c b/arch/sh/boards/se/7751/setup.c
index 7873d07e40c1..deefbfd92591 100644
--- a/arch/sh/boards/se/7751/setup.c
+++ b/arch/sh/boards/se/7751/setup.c
@@ -13,13 +13,19 @@
13#include <asm/machvec.h> 13#include <asm/machvec.h>
14#include <asm/se7751.h> 14#include <asm/se7751.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/heartbeat.h>
16 17
17static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; 18static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
18 19
20static struct heartbeat_data heartbeat_data = {
21 .bit_pos = heartbeat_bit_pos,
22 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
23};
24
19static struct resource heartbeat_resources[] = { 25static struct resource heartbeat_resources[] = {
20 [0] = { 26 [0] = {
21 .start = PA_LED, 27 .start = PA_LED,
22 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, 28 .end = PA_LED,
23 .flags = IORESOURCE_MEM, 29 .flags = IORESOURCE_MEM,
24 }, 30 },
25}; 31};
@@ -28,14 +34,13 @@ static struct platform_device heartbeat_device = {
28 .name = "heartbeat", 34 .name = "heartbeat",
29 .id = -1, 35 .id = -1,
30 .dev = { 36 .dev = {
31 .platform_data = heartbeat_bit_pos, 37 .platform_data = &heartbeat_data,
32 }, 38 },
33 .num_resources = ARRAY_SIZE(heartbeat_resources), 39 .num_resources = ARRAY_SIZE(heartbeat_resources),
34 .resource = heartbeat_resources, 40 .resource = heartbeat_resources,
35}; 41};
36 42
37static struct platform_device *se7751_devices[] __initdata = { 43static struct platform_device *se7751_devices[] __initdata = {
38 &smc91x_device,
39 &heartbeat_device, 44 &heartbeat_device,
40}; 45};
41 46
diff --git a/arch/sh/boards/se/7780/irq.c b/arch/sh/boards/se/7780/irq.c
index 874914746009..6bd70da6bb47 100644
--- a/arch/sh/boards/se/7780/irq.c
+++ b/arch/sh/boards/se/7780/irq.c
@@ -16,32 +16,6 @@
16#include <asm/io.h> 16#include <asm/io.h>
17#include <asm/se7780.h> 17#include <asm/se7780.h>
18 18
19static struct intc2_data intc2_irq_table[] = {
20 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
21 { 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
22 { 6, 0, 29, 0, 29, 3 }, /* daughter board EXTINT3 */
23 { 8, 0, 28, 0, 28, 3 }, /* SMC 91C111 (LAN) */
24 { 10, 0, 27, 0, 27, 3 }, /* daughter board EXTINT4 */
25 { 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT5 */
26 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT6 */
27 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT7 */
28 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT8 */
29 { 0 , 0, 24, 0, 24, 3 }, /* SM501 */
30};
31
32static struct intc2_desc intc2_irq_desc __read_mostly = {
33 .prio_base = 0, /* N/A */
34 .msk_base = 0xffd00044,
35 .mskclr_base = 0xffd00064,
36
37 .intc2_data = intc2_irq_table,
38 .nr_irqs = ARRAY_SIZE(intc2_irq_table),
39
40 .chip = {
41 .name = "INTC2-se7780",
42 },
43};
44
45/* 19/*
46 * Initialize IRQ setting 20 * Initialize IRQ setting
47 */ 21 */
@@ -68,5 +42,5 @@ void __init init_se7780_IRQ(void)
68 /* FPGA + 0x0A */ 42 /* FPGA + 0x0A */
69 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); 43 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
70 44
71 register_intc2_controller(&intc2_irq_desc); 45 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
72} 46}
diff --git a/arch/sh/boards/se/7780/setup.c b/arch/sh/boards/se/7780/setup.c
index 723f2fd4d55b..76e53b26a808 100644
--- a/arch/sh/boards/se/7780/setup.c
+++ b/arch/sh/boards/se/7780/setup.c
@@ -16,12 +16,10 @@
16#include <asm/io.h> 16#include <asm/io.h>
17 17
18/* Heartbeat */ 18/* Heartbeat */
19static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
20
21static struct resource heartbeat_resources[] = { 19static struct resource heartbeat_resources[] = {
22 [0] = { 20 [0] = {
23 .start = PA_LED, 21 .start = PA_LED,
24 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, 22 .end = PA_LED,
25 .flags = IORESOURCE_MEM, 23 .flags = IORESOURCE_MEM,
26 }, 24 },
27}; 25};
@@ -29,9 +27,6 @@ static struct resource heartbeat_resources[] = {
29static struct platform_device heartbeat_device = { 27static struct platform_device heartbeat_device = {
30 .name = "heartbeat", 28 .name = "heartbeat",
31 .id = -1, 29 .id = -1,
32 .dev = {
33 .platform_data = heartbeat_bit_pos,
34 },
35 .num_resources = ARRAY_SIZE(heartbeat_resources), 30 .num_resources = ARRAY_SIZE(heartbeat_resources),
36 .resource = heartbeat_resources, 31 .resource = heartbeat_resources,
37}; 32};
diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c
index 9c031a8c0a1c..934ac4f1c48f 100644
--- a/arch/sh/boards/sh03/setup.c
+++ b/arch/sh/boards/sh03/setup.c
@@ -15,33 +15,9 @@
15#include <asm/sh03/sh03.h> 15#include <asm/sh03/sh03.h>
16#include <asm/addrspace.h> 16#include <asm/addrspace.h>
17 17
18static struct ipr_data ipr_irq_table[] = {
19 { IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
20 { IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
21 { IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
22 { IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
23};
24
25static unsigned long ipr_offsets[] = {
26 INTC_IPRD,
27};
28
29static struct ipr_desc ipr_irq_desc = {
30 .ipr_offsets = ipr_offsets,
31 .nr_offsets = ARRAY_SIZE(ipr_offsets),
32
33 .ipr_data = ipr_irq_table,
34 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
35
36 .chip = {
37 .name = "IPR-sh03",
38 },
39};
40
41static void __init init_sh03_IRQ(void) 18static void __init init_sh03_IRQ(void)
42{ 19{
43 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 20 plat_irq_setup_pins(IRQ_MODE_IRQ);
44 register_ipr_controller(&ipr_irq_desc);
45} 21}
46 22
47extern void *cf_io_base; 23extern void *cf_io_base;
@@ -68,7 +44,7 @@ static void __init sh03_setup(char **cmdline_p)
68static struct resource heartbeat_resources[] = { 44static struct resource heartbeat_resources[] = {
69 [0] = { 45 [0] = {
70 .start = 0xa0800000, 46 .start = 0xa0800000,
71 .end = 0xa0800000 + 8 - 1, 47 .end = 0xa0800000,
72 .flags = IORESOURCE_MEM, 48 .flags = IORESOURCE_MEM,
73 }, 49 },
74}; 50};
diff --git a/arch/sh/boards/shmin/setup.c b/arch/sh/boards/shmin/setup.c
index dfd124509f42..16e5dae8ecfb 100644
--- a/arch/sh/boards/shmin/setup.c
+++ b/arch/sh/boards/shmin/setup.c
@@ -14,36 +14,12 @@
14 14
15#define PFC_PHCR 0xa400010eUL 15#define PFC_PHCR 0xa400010eUL
16#define INTC_ICR1 0xa4000010UL 16#define INTC_ICR1 0xa4000010UL
17#define INTC_IPRC 0xa4000016UL
18
19static struct ipr_data ipr_irq_table[] = {
20 { 32, 0, 0, 0 },
21 { 33, 0, 4, 0 },
22 { 34, 0, 8, 8 },
23 { 35, 0, 12, 0 },
24};
25
26static unsigned long ipr_offsets[] = {
27 INTC_IPRC,
28};
29
30static struct ipr_desc ipr_irq_desc = {
31 .ipr_offsets = ipr_offsets,
32 .nr_offsets = ARRAY_SIZE(ipr_offsets),
33
34 .ipr_data = ipr_irq_table,
35 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
36
37 .chip = {
38 .name = "IPR-shmin",
39 },
40};
41 17
42static void __init init_shmin_irq(void) 18static void __init init_shmin_irq(void)
43{ 19{
44 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ 20 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
45 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. 21 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
46 register_ipr_controller(&ipr_irq_desc); 22 plat_irq_setup_pins(IRQ_MODE_IRQ);
47} 23}
48 24
49static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) 25static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c
index 84271d85a8dd..2b594f600002 100644
--- a/arch/sh/boards/snapgear/setup.c
+++ b/arch/sh/boards/snapgear/setup.c
@@ -68,37 +68,11 @@ module_init(eraseconfig_init);
68 * IRL3 = crypto 68 * IRL3 = crypto
69 */ 69 */
70 70
71static struct ipr_data ipr_irq_table[] = {
72 { IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
73 { IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
74 { IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
75 { IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
76};
77
78static unsigned long ipr_offsets[] = {
79 INTC_IPRD,
80};
81
82static struct ipr_desc ipr_irq_desc = {
83 .ipr_offsets = ipr_offsets,
84 .nr_offsets = ARRAY_SIZE(ipr_offsets),
85
86 .ipr_data = ipr_irq_table,
87 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
88
89 .chip = {
90 .name = "IPR-snapgear",
91 },
92};
93
94static void __init init_snapgear_IRQ(void) 71static void __init init_snapgear_IRQ(void)
95{ 72{
96 /* enable individual interrupt mode for externals */
97 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
98
99 printk("Setup SnapGear IRQ/IPR ...\n"); 73 printk("Setup SnapGear IRQ/IPR ...\n");
100 74 /* enable individual interrupt mode for externals */
101 register_ipr_controller(&ipr_irq_desc); 75 plat_irq_setup_pins(IRQ_MODE_IRQ);
102} 76}
103 77
104/* 78/*
diff --git a/arch/sh/boards/titan/setup.c b/arch/sh/boards/titan/setup.c
index 606d25a4b870..5de3b2ad71af 100644
--- a/arch/sh/boards/titan/setup.c
+++ b/arch/sh/boards/titan/setup.c
@@ -12,38 +12,10 @@
12#include <asm/titan.h> 12#include <asm/titan.h>
13#include <asm/io.h> 13#include <asm/io.h>
14 14
15static struct ipr_data ipr_irq_table[] = {
16 /* IRQ, IPR idx, shift, prio */
17 { TITAN_IRQ_WAN, 3, 12, 8 }, /* eth0 (WAN) */
18 { TITAN_IRQ_LAN, 3, 8, 8 }, /* eth1 (LAN) */
19 { TITAN_IRQ_MPCIA, 3, 4, 8 }, /* mPCI A (top) */
20 { TITAN_IRQ_USB, 3, 0, 8 }, /* mPCI B (bottom), USB */
21};
22
23static unsigned long ipr_offsets[] = { /* stolen from setup-sh7750.c */
24 0xffd00004UL, /* 0: IPRA */
25 0xffd00008UL, /* 1: IPRB */
26 0xffd0000cUL, /* 2: IPRC */
27 0xffd00010UL, /* 3: IPRD */
28};
29
30static struct ipr_desc ipr_irq_desc = {
31 .ipr_offsets = ipr_offsets,
32 .nr_offsets = ARRAY_SIZE(ipr_offsets),
33
34 .ipr_data = ipr_irq_table,
35 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
36
37 .chip = {
38 .name = "IPR-titan",
39 },
40};
41static void __init init_titan_irq(void) 15static void __init init_titan_irq(void)
42{ 16{
43 /* enable individual interrupt mode for externals */ 17 /* enable individual interrupt mode for externals */
44 ipr_irq_enable_irlm(); 18 plat_irq_setup_pins(IRQ_MODE_IRQ);
45 /* register ipr irqs */
46 register_ipr_controller(&ipr_irq_desc);
47} 19}
48 20
49static struct sh_machine_vector mv_titan __initmv = { 21static struct sh_machine_vector mv_titan __initmv = {
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig
index 2e516e9a6ede..7892361eedc8 100644
--- a/arch/sh/cchips/Kconfig
+++ b/arch/sh/cchips/Kconfig
@@ -1,18 +1,5 @@
1menu "Companion Chips" 1menu "Companion Chips"
2 2
3config VOYAGERGX
4 bool "VoyagerGX chip support"
5 depends on SH_RTS7751R2D
6 help
7 Selecting this option will support Silicon Motion, Inc. SM501.
8 Designed to complement needs for the embedded industry, it
9 provides video and 2D capability. To reduce system cost a
10 wide variety of include I/O is supported, including analog RGB
11 and digital LCD Panel interface, 8-bit parallel interface, USB,
12 UART, IrDA, Zoom Video, AC97 or I2S, SSP, PWM, and I2C. There
13 are additional GPIO bits that can be used to interface to
14 external as well.
15
16config HD6446X_SERIES 3config HD6446X_SERIES
17 bool 4 bool
18 5
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index 97f6512aa1b7..f1a4a0763c59 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -14,6 +14,9 @@
14#include <asm/irq.h> 14#include <asm/irq.h>
15#include <asm/hd64461.h> 15#include <asm/hd64461.h>
16 16
17/* This belongs in cpu specific */
18#define INTC_ICR1 0xA4140010UL
19
17static void disable_hd64461_irq(unsigned int irq) 20static void disable_hd64461_irq(unsigned int irq)
18{ 21{
19 unsigned short nimr; 22 unsigned short nimr;
@@ -121,10 +124,15 @@ int hd64461_irq_demux(int irq)
121 } 124 }
122 } 125 }
123 } 126 }
124 return __irq_demux(irq); 127 return irq;
125} 128}
126 129
127static struct irqaction irq0 = { hd64461_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "HD64461", NULL, NULL }; 130static struct irqaction irq0 = {
131 .handler = hd64461_interrupt,
132 .flags = IRQF_DISABLED,
133 .mask = CPU_MASK_NONE,
134 .name = "HD64461",
135};
128 136
129int __init setup_hd64461(void) 137int __init setup_hd64461(void)
130{ 138{
@@ -143,6 +151,7 @@ int __init setup_hd64461(void)
143#endif 151#endif
144 outw(0xffff, HD64461_NIMR); 152 outw(0xffff, HD64461_NIMR);
145 153
154 /* IRQ 80 -> 95 belongs to HD64461 */
146 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { 155 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
147 irq_desc[i].chip = &hd64461_irq_type; 156 irq_desc[i].chip = &hd64461_irq_type;
148 } 157 }
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c
index d126e1f30dee..5cef0db4018b 100644
--- a/arch/sh/cchips/hd6446x/hd64465/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64465/setup.c
@@ -147,7 +147,12 @@ int hd64465_irq_demux(int irq)
147 return irq; 147 return irq;
148} 148}
149 149
150static struct irqaction irq0 = { hd64465_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "HD64465", NULL, NULL}; 150static struct irqaction irq0 = {
151 .handler = hd64465_interrupt,
152 .flags = IRQF_DISABLED,
153 .mask = CPU_MASK_NONE,
154 .name = "HD64465",
155};
151 156
152 157
153static int __init setup_hd64465(void) 158static int __init setup_hd64465(void)
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
index d70e5c8461b5..ade303876841 100644
--- a/arch/sh/cchips/voyagergx/irq.c
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -23,149 +23,79 @@
23#include <asm/voyagergx.h> 23#include <asm/voyagergx.h>
24#include <asm/rts7751r2d.h> 24#include <asm/rts7751r2d.h>
25 25
26static void disable_voyagergx_irq(unsigned int irq) 26enum {
27{ 27 UNUSED = 0,
28 unsigned long val; 28
29 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); 29 /* voyager specific interrupt sources */
30 30 UP, G54, G53, G52, G51, G50, G49, G48,
31 pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask); 31 I2C, PW, DMA, PCI, I2S, AC, US,
32 val = readl((void __iomem *)VOYAGER_INT_MASK); 32 U1, U0, CV, MC, S1, S0,
33 val &= ~mask; 33 UH, TWOD, ZD, PV, CI,
34 writel(val, (void __iomem *)VOYAGER_INT_MASK);
35}
36
37static void enable_voyagergx_irq(unsigned int irq)
38{
39 unsigned long val;
40 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
41
42 pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
43 val = readl((void __iomem *)VOYAGER_INT_MASK);
44 val |= mask;
45 writel(val, (void __iomem *)VOYAGER_INT_MASK);
46}
47
48static void mask_and_ack_voyagergx(unsigned int irq)
49{
50 disable_voyagergx_irq(irq);
51}
52
53static void end_voyagergx_irq(unsigned int irq)
54{
55 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
56 enable_voyagergx_irq(irq);
57}
58
59static unsigned int startup_voyagergx_irq(unsigned int irq)
60{
61 enable_voyagergx_irq(irq);
62 return 0;
63}
64
65static void shutdown_voyagergx_irq(unsigned int irq)
66{
67 disable_voyagergx_irq(irq);
68}
69
70static struct hw_interrupt_type voyagergx_irq_type = {
71 .typename = "VOYAGERGX-IRQ",
72 .startup = startup_voyagergx_irq,
73 .shutdown = shutdown_voyagergx_irq,
74 .enable = enable_voyagergx_irq,
75 .disable = disable_voyagergx_irq,
76 .ack = mask_and_ack_voyagergx,
77 .end = end_voyagergx_irq,
78}; 34};
79 35
80static irqreturn_t voyagergx_interrupt(int irq, void *dev_id) 36static struct intc_vect vectors[] __initdata = {
81{ 37 INTC_IRQ(UP, IRQ_SM501_UP), INTC_IRQ(G54, IRQ_SM501_G54),
82 printk(KERN_INFO 38 INTC_IRQ(G53, IRQ_SM501_G53), INTC_IRQ(G52, IRQ_SM501_G52),
83 "VoyagerGX: spurious interrupt, status: 0x%x\n", 39 INTC_IRQ(G51, IRQ_SM501_G51), INTC_IRQ(G50, IRQ_SM501_G50),
84 (unsigned int)readl((void __iomem *)INT_STATUS)); 40 INTC_IRQ(G49, IRQ_SM501_G49), INTC_IRQ(G48, IRQ_SM501_G48),
85 return IRQ_HANDLED; 41 INTC_IRQ(I2C, IRQ_SM501_I2C), INTC_IRQ(PW, IRQ_SM501_PW),
86} 42 INTC_IRQ(DMA, IRQ_SM501_DMA), INTC_IRQ(PCI, IRQ_SM501_PCI),
87 43 INTC_IRQ(I2S, IRQ_SM501_I2S), INTC_IRQ(AC, IRQ_SM501_AC),
88static struct { 44 INTC_IRQ(US, IRQ_SM501_US), INTC_IRQ(U1, IRQ_SM501_U1),
89 int (*func)(int, void *); 45 INTC_IRQ(U0, IRQ_SM501_U0), INTC_IRQ(CV, IRQ_SM501_CV),
90 void *dev; 46 INTC_IRQ(MC, IRQ_SM501_MC), INTC_IRQ(S1, IRQ_SM501_S1),
91} voyagergx_demux[VOYAGER_IRQ_NUM]; 47 INTC_IRQ(S0, IRQ_SM501_S0), INTC_IRQ(UH, IRQ_SM501_UH),
48 INTC_IRQ(TWOD, IRQ_SM501_2D), INTC_IRQ(ZD, IRQ_SM501_ZD),
49 INTC_IRQ(PV, IRQ_SM501_PV), INTC_IRQ(CI, IRQ_SM501_CI),
50};
92 51
93void voyagergx_register_irq_demux(int irq, 52static struct intc_mask_reg mask_registers[] __initdata = {
94 int (*demux)(int irq, void *dev), void *dev) 53 { VOYAGER_INT_MASK, 0, 32, /* "Interrupt Mask", MMIO_base + 0x30 */
95{ 54 { UP, G54, G53, G52, G51, G50, G49, G48,
96 voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux; 55 I2C, PW, 0, DMA, PCI, I2S, AC, US,
97 voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev; 56 0, 0, U1, U0, CV, MC, S1, S0,
98} 57 0, UH, 0, 0, TWOD, ZD, PV, CI } },
58};
99 59
100void voyagergx_unregister_irq_demux(int irq) 60static DECLARE_INTC_DESC(intc_desc, "voyagergx", vectors,
101{ 61 NULL, NULL, mask_registers, NULL, NULL);
102 voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0; 62
103} 63static unsigned int voyagergx_stat2irq[32] = {
64 IRQ_SM501_CI, IRQ_SM501_PV, IRQ_SM501_ZD, IRQ_SM501_2D,
65 0, 0, IRQ_SM501_UH, 0,
66 IRQ_SM501_S0, IRQ_SM501_S1, IRQ_SM501_MC, IRQ_SM501_CV,
67 IRQ_SM501_U0, IRQ_SM501_U1, 0, 0,
68 IRQ_SM501_US, IRQ_SM501_AC, IRQ_SM501_I2S, IRQ_SM501_PCI,
69 IRQ_SM501_DMA, 0, IRQ_SM501_PW, IRQ_SM501_I2C,
70 IRQ_SM501_G48, IRQ_SM501_G49, IRQ_SM501_G50, IRQ_SM501_G51,
71 IRQ_SM501_G52, IRQ_SM501_G53, IRQ_SM501_G54, IRQ_SM501_UP
72};
104 73
105int voyagergx_irq_demux(int irq) 74static void voyagergx_irq_demux(unsigned int irq, struct irq_desc *desc)
106{ 75{
107 76 unsigned long intv = ctrl_inl(INT_STATUS);
108 if (irq == IRQ_VOYAGER ) { 77 struct irq_desc *ext_desc;
109 unsigned long i = 0, bit __attribute__ ((unused)); 78 unsigned int ext_irq;
110 unsigned long val = readl((void __iomem *)INT_STATUS); 79 unsigned int k = 0;
111 80
112 if (val & (1 << 1)) 81 while (intv) {
113 i = 1; 82 ext_irq = voyagergx_stat2irq[k];
114 else if (val & (1 << 2)) 83 if (ext_irq && (intv & 1)) {
115 i = 2; 84 ext_desc = irq_desc + ext_irq;
116 else if (val & (1 << 6)) 85 handle_level_irq(ext_irq, ext_desc);
117 i = 6;
118 else if (val & (1 << 10))
119 i = 10;
120 else if (val & (1 << 11))
121 i = 11;
122 else if (val & (1 << 12))
123 i = 12;
124 else if (val & (1 << 17))
125 i = 17;
126 else
127 printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
128 pr_debug("voyagergx_irq_demux %ld \n", i);
129 if (i < VOYAGER_IRQ_NUM) {
130 irq = VOYAGER_IRQ_BASE + i;
131 if (voyagergx_demux[i].func != 0)
132 irq = voyagergx_demux[i].func(irq,
133 voyagergx_demux[i].dev);
134 } 86 }
87 intv >>= 1;
88 k++;
135 } 89 }
136 return irq;
137} 90}
138 91
139static struct irqaction irq0 = {
140 .name = "voyagergx",
141 .handler = voyagergx_interrupt,
142 .flags = IRQF_DISABLED,
143 .mask = CPU_MASK_NONE,
144};
145
146void __init setup_voyagergx_irq(void) 92void __init setup_voyagergx_irq(void)
147{ 93{
148 int i, flag; 94 printk(KERN_INFO "VoyagerGX on irq %d (mapped into %d to %d)\n",
149
150 printk(KERN_INFO "VoyagerGX configured at 0x%x on irq %d(mapped into %d to %d)\n",
151 VOYAGER_BASE,
152 IRQ_VOYAGER, 95 IRQ_VOYAGER,
153 VOYAGER_IRQ_BASE, 96 VOYAGER_IRQ_BASE,
154 VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1); 97 VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1);
155 98
156 for (i=0; i<VOYAGER_IRQ_NUM; i++) { 99 register_intc_controller(&intc_desc);
157 flag = 0; 100 set_irq_chained_handler(IRQ_VOYAGER, voyagergx_irq_demux);
158 switch (VOYAGER_IRQ_BASE + i) {
159 case VOYAGER_USBH_IRQ:
160 case VOYAGER_8051_IRQ:
161 case VOYAGER_UART0_IRQ:
162 case VOYAGER_UART1_IRQ:
163 case VOYAGER_AC97_IRQ:
164 flag = 1;
165 }
166 if (flag == 1)
167 irq_desc[VOYAGER_IRQ_BASE + i].chip = &voyagergx_irq_type;
168 }
169
170 setup_irq(IRQ_VOYAGER, &irq0);
171} 101}
diff --git a/arch/sh/configs/dreamcast_defconfig b/arch/sh/configs/dreamcast_defconfig
index 3fdd270eecf7..57728788b753 100644
--- a/arch/sh/configs/dreamcast_defconfig
+++ b/arch/sh/configs/dreamcast_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22-rc4 3# Linux kernel version: 2.6.23-rc7
4# Sat Jul 7 03:47:45 2007 4# Fri Sep 21 15:46:27 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
@@ -18,30 +18,26 @@ CONFIG_STACKTRACE_SUPPORT=y
18CONFIG_LOCKDEP_SUPPORT=y 18CONFIG_LOCKDEP_SUPPORT=y
19# CONFIG_ARCH_HAS_ILOG2_U32 is not set 19# CONFIG_ARCH_HAS_ILOG2_U32 is not set
20# CONFIG_ARCH_HAS_ILOG2_U64 is not set 20# CONFIG_ARCH_HAS_ILOG2_U64 is not set
21CONFIG_ARCH_NO_VIRT_TO_BUS=y
21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
22 23
23# 24#
24# Code maturity level options 25# General setup
25# 26#
26CONFIG_EXPERIMENTAL=y 27CONFIG_EXPERIMENTAL=y
27CONFIG_BROKEN_ON_SMP=y 28CONFIG_BROKEN_ON_SMP=y
28CONFIG_LOCK_KERNEL=y 29CONFIG_LOCK_KERNEL=y
29CONFIG_INIT_ENV_ARG_LIMIT=32 30CONFIG_INIT_ENV_ARG_LIMIT=32
30
31#
32# General setup
33#
34CONFIG_LOCALVERSION="" 31CONFIG_LOCALVERSION=""
35CONFIG_LOCALVERSION_AUTO=y 32CONFIG_LOCALVERSION_AUTO=y
36CONFIG_SWAP=y 33CONFIG_SWAP=y
37CONFIG_SYSVIPC=y 34CONFIG_SYSVIPC=y
38# CONFIG_IPC_NS is not set
39CONFIG_SYSVIPC_SYSCTL=y 35CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_POSIX_MQUEUE is not set 36# CONFIG_POSIX_MQUEUE is not set
41CONFIG_BSD_PROCESS_ACCT=y 37CONFIG_BSD_PROCESS_ACCT=y
42# CONFIG_BSD_PROCESS_ACCT_V3 is not set 38# CONFIG_BSD_PROCESS_ACCT_V3 is not set
43# CONFIG_TASKSTATS is not set 39# CONFIG_TASKSTATS is not set
44# CONFIG_UTS_NS is not set 40# CONFIG_USER_NS is not set
45# CONFIG_AUDIT is not set 41# CONFIG_AUDIT is not set
46# CONFIG_IKCONFIG is not set 42# CONFIG_IKCONFIG is not set
47CONFIG_LOG_BUF_SHIFT=14 43CONFIG_LOG_BUF_SHIFT=14
@@ -64,7 +60,6 @@ CONFIG_FUTEX=y
64CONFIG_ANON_INODES=y 60CONFIG_ANON_INODES=y
65CONFIG_EPOLL=y 61CONFIG_EPOLL=y
66CONFIG_SIGNALFD=y 62CONFIG_SIGNALFD=y
67CONFIG_TIMERFD=y
68CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
69CONFIG_SHMEM=y 64CONFIG_SHMEM=y
70CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
@@ -74,24 +69,17 @@ CONFIG_SLAB=y
74CONFIG_RT_MUTEXES=y 69CONFIG_RT_MUTEXES=y
75# CONFIG_TINY_SHMEM is not set 70# CONFIG_TINY_SHMEM is not set
76CONFIG_BASE_SMALL=0 71CONFIG_BASE_SMALL=0
77
78#
79# Loadable module support
80#
81CONFIG_MODULES=y 72CONFIG_MODULES=y
82CONFIG_MODULE_UNLOAD=y 73CONFIG_MODULE_UNLOAD=y
83# CONFIG_MODULE_FORCE_UNLOAD is not set 74# CONFIG_MODULE_FORCE_UNLOAD is not set
84# CONFIG_MODVERSIONS is not set 75# CONFIG_MODVERSIONS is not set
85# CONFIG_MODULE_SRCVERSION_ALL is not set 76# CONFIG_MODULE_SRCVERSION_ALL is not set
86CONFIG_KMOD=y 77CONFIG_KMOD=y
87
88#
89# Block layer
90#
91CONFIG_BLOCK=y 78CONFIG_BLOCK=y
92# CONFIG_LBD is not set 79# CONFIG_LBD is not set
93# CONFIG_BLK_DEV_IO_TRACE is not set 80# CONFIG_BLK_DEV_IO_TRACE is not set
94# CONFIG_LSF is not set 81# CONFIG_LSF is not set
82# CONFIG_BLK_DEV_BSG is not set
95 83
96# 84#
97# IO Schedulers 85# IO Schedulers
@@ -112,7 +100,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
112CONFIG_CPU_SH4=y 100CONFIG_CPU_SH4=y
113# CONFIG_CPU_SUBTYPE_SH7619 is not set 101# CONFIG_CPU_SUBTYPE_SH7619 is not set
114# CONFIG_CPU_SUBTYPE_SH7206 is not set 102# CONFIG_CPU_SUBTYPE_SH7206 is not set
115# CONFIG_CPU_SUBTYPE_SH7300 is not set
116# CONFIG_CPU_SUBTYPE_SH7705 is not set 103# CONFIG_CPU_SUBTYPE_SH7705 is not set
117# CONFIG_CPU_SUBTYPE_SH7706 is not set 104# CONFIG_CPU_SUBTYPE_SH7706 is not set
118# CONFIG_CPU_SUBTYPE_SH7707 is not set 105# CONFIG_CPU_SUBTYPE_SH7707 is not set
@@ -120,6 +107,7 @@ CONFIG_CPU_SH4=y
120# CONFIG_CPU_SUBTYPE_SH7709 is not set 107# CONFIG_CPU_SUBTYPE_SH7709 is not set
121# CONFIG_CPU_SUBTYPE_SH7710 is not set 108# CONFIG_CPU_SUBTYPE_SH7710 is not set
122# CONFIG_CPU_SUBTYPE_SH7712 is not set 109# CONFIG_CPU_SUBTYPE_SH7712 is not set
110# CONFIG_CPU_SUBTYPE_SH7720 is not set
123# CONFIG_CPU_SUBTYPE_SH7750 is not set 111# CONFIG_CPU_SUBTYPE_SH7750 is not set
124CONFIG_CPU_SUBTYPE_SH7091=y 112CONFIG_CPU_SUBTYPE_SH7091=y
125# CONFIG_CPU_SUBTYPE_SH7750R is not set 113# CONFIG_CPU_SUBTYPE_SH7750R is not set
@@ -134,7 +122,6 @@ CONFIG_CPU_SUBTYPE_SH7091=y
134# CONFIG_CPU_SUBTYPE_SH7780 is not set 122# CONFIG_CPU_SUBTYPE_SH7780 is not set
135# CONFIG_CPU_SUBTYPE_SH7785 is not set 123# CONFIG_CPU_SUBTYPE_SH7785 is not set
136# CONFIG_CPU_SUBTYPE_SHX3 is not set 124# CONFIG_CPU_SUBTYPE_SHX3 is not set
137# CONFIG_CPU_SUBTYPE_SH73180 is not set
138# CONFIG_CPU_SUBTYPE_SH7343 is not set 125# CONFIG_CPU_SUBTYPE_SH7343 is not set
139# CONFIG_CPU_SUBTYPE_SH7722 is not set 126# CONFIG_CPU_SUBTYPE_SH7722 is not set
140 127
@@ -177,7 +164,9 @@ CONFIG_NR_QUICK=2
177# Cache configuration 164# Cache configuration
178# 165#
179# CONFIG_SH_DIRECT_MAPPED is not set 166# CONFIG_SH_DIRECT_MAPPED is not set
180# CONFIG_SH_WRITETHROUGH is not set 167CONFIG_CACHE_WRITEBACK=y
168# CONFIG_CACHE_WRITETHROUGH is not set
169# CONFIG_CACHE_OFF is not set
181 170
182# 171#
183# Processor features 172# Processor features
@@ -185,12 +174,11 @@ CONFIG_NR_QUICK=2
185CONFIG_CPU_LITTLE_ENDIAN=y 174CONFIG_CPU_LITTLE_ENDIAN=y
186# CONFIG_CPU_BIG_ENDIAN is not set 175# CONFIG_CPU_BIG_ENDIAN is not set
187CONFIG_SH_FPU=y 176CONFIG_SH_FPU=y
188# CONFIG_SH_DSP is not set
189CONFIG_SH_STORE_QUEUES=y 177CONFIG_SH_STORE_QUEUES=y
190CONFIG_CPU_HAS_INTEVT=y 178CONFIG_CPU_HAS_INTEVT=y
191CONFIG_CPU_HAS_IPR_IRQ=y
192CONFIG_CPU_HAS_SR_RB=y 179CONFIG_CPU_HAS_SR_RB=y
193CONFIG_CPU_HAS_PTEA=y 180CONFIG_CPU_HAS_PTEA=y
181CONFIG_CPU_HAS_FPU=y
194 182
195# 183#
196# Board support 184# Board support
@@ -270,6 +258,7 @@ CONFIG_CMDLINE="console=ttySC1,115200 panic=3"
270# 258#
271# Bus options 259# Bus options
272# 260#
261CONFIG_MAPLE=y
273CONFIG_PCI=y 262CONFIG_PCI=y
274CONFIG_SH_PCIDMA_NONCOHERENT=y 263CONFIG_SH_PCIDMA_NONCOHERENT=y
275CONFIG_PCI_AUTO=y 264CONFIG_PCI_AUTO=y
@@ -368,6 +357,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
368# CONFIG_MAC80211 is not set 357# CONFIG_MAC80211 is not set
369# CONFIG_IEEE80211 is not set 358# CONFIG_IEEE80211 is not set
370# CONFIG_RFKILL is not set 359# CONFIG_RFKILL is not set
360# CONFIG_NET_9P is not set
371 361
372# 362#
373# Device Drivers 363# Device Drivers
@@ -380,27 +370,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
380CONFIG_PREVENT_FIRMWARE_BUILD=y 370CONFIG_PREVENT_FIRMWARE_BUILD=y
381# CONFIG_FW_LOADER is not set 371# CONFIG_FW_LOADER is not set
382# CONFIG_SYS_HYPERVISOR is not set 372# CONFIG_SYS_HYPERVISOR is not set
383
384#
385# Connector - unified userspace <-> kernelspace linker
386#
387# CONFIG_CONNECTOR is not set 373# CONFIG_CONNECTOR is not set
388# CONFIG_MTD is not set 374# CONFIG_MTD is not set
389
390#
391# Parallel port support
392#
393# CONFIG_PARPORT is not set 375# CONFIG_PARPORT is not set
394 376CONFIG_BLK_DEV=y
395#
396# Plug and Play support
397#
398# CONFIG_PNPACPI is not set
399
400#
401# Block devices
402#
403# CONFIG_BLK_CPQ_DA is not set
404# CONFIG_BLK_CPQ_CISS_DA is not set 377# CONFIG_BLK_CPQ_CISS_DA is not set
405# CONFIG_BLK_DEV_DAC960 is not set 378# CONFIG_BLK_DEV_DAC960 is not set
406# CONFIG_BLK_DEV_UMEM is not set 379# CONFIG_BLK_DEV_UMEM is not set
@@ -411,14 +384,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
411# CONFIG_BLK_DEV_RAM is not set 384# CONFIG_BLK_DEV_RAM is not set
412# CONFIG_CDROM_PKTCDVD is not set 385# CONFIG_CDROM_PKTCDVD is not set
413# CONFIG_ATA_OVER_ETH is not set 386# CONFIG_ATA_OVER_ETH is not set
414 387CONFIG_MISC_DEVICES=y
415#
416# Misc devices
417#
418# CONFIG_PHANTOM is not set 388# CONFIG_PHANTOM is not set
389# CONFIG_EEPROM_93CX6 is not set
419# CONFIG_SGI_IOC4 is not set 390# CONFIG_SGI_IOC4 is not set
420# CONFIG_TIFM_CORE is not set 391# CONFIG_TIFM_CORE is not set
421# CONFIG_BLINK is not set
422# CONFIG_IDE is not set 392# CONFIG_IDE is not set
423 393
424# 394#
@@ -426,12 +396,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
426# 396#
427# CONFIG_RAID_ATTRS is not set 397# CONFIG_RAID_ATTRS is not set
428# CONFIG_SCSI is not set 398# CONFIG_SCSI is not set
399# CONFIG_SCSI_DMA is not set
429# CONFIG_SCSI_NETLINK is not set 400# CONFIG_SCSI_NETLINK is not set
430# CONFIG_ATA is not set 401# CONFIG_ATA is not set
431
432#
433# Multi-device support (RAID and LVM)
434#
435# CONFIG_MD is not set 402# CONFIG_MD is not set
436 403
437# 404#
@@ -444,26 +411,16 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
444# 411#
445# CONFIG_FIREWIRE is not set 412# CONFIG_FIREWIRE is not set
446# CONFIG_IEEE1394 is not set 413# CONFIG_IEEE1394 is not set
447
448#
449# I2O device support
450#
451# CONFIG_I2O is not set 414# CONFIG_I2O is not set
452
453#
454# Network device support
455#
456CONFIG_NETDEVICES=y 415CONFIG_NETDEVICES=y
416# CONFIG_NETDEVICES_MULTIQUEUE is not set
457# CONFIG_DUMMY is not set 417# CONFIG_DUMMY is not set
458# CONFIG_BONDING is not set 418# CONFIG_BONDING is not set
419# CONFIG_MACVLAN is not set
459# CONFIG_EQUALIZER is not set 420# CONFIG_EQUALIZER is not set
460# CONFIG_TUN is not set 421# CONFIG_TUN is not set
461# CONFIG_ARCNET is not set 422# CONFIG_ARCNET is not set
462# CONFIG_PHYLIB is not set 423# CONFIG_PHYLIB is not set
463
464#
465# Ethernet (10 or 100Mbit)
466#
467CONFIG_NET_ETHERNET=y 424CONFIG_NET_ETHERNET=y
468CONFIG_MII=y 425CONFIG_MII=y
469# CONFIG_STNIC is not set 426# CONFIG_STNIC is not set
@@ -472,10 +429,6 @@ CONFIG_MII=y
472# CONFIG_CASSINI is not set 429# CONFIG_CASSINI is not set
473# CONFIG_NET_VENDOR_3COM is not set 430# CONFIG_NET_VENDOR_3COM is not set
474# CONFIG_SMC91X is not set 431# CONFIG_SMC91X is not set
475
476#
477# Tulip family network device support
478#
479# CONFIG_NET_TULIP is not set 432# CONFIG_NET_TULIP is not set
480# CONFIG_HP100 is not set 433# CONFIG_HP100 is not set
481CONFIG_NET_PCI=y 434CONFIG_NET_PCI=y
@@ -520,15 +473,7 @@ CONFIG_8139TOO=y
520# CONFIG_NETCONSOLE is not set 473# CONFIG_NETCONSOLE is not set
521# CONFIG_NETPOLL is not set 474# CONFIG_NETPOLL is not set
522# CONFIG_NET_POLL_CONTROLLER is not set 475# CONFIG_NET_POLL_CONTROLLER is not set
523
524#
525# ISDN subsystem
526#
527# CONFIG_ISDN is not set 476# CONFIG_ISDN is not set
528
529#
530# Telephony Support
531#
532# CONFIG_PHONE is not set 477# CONFIG_PHONE is not set
533 478
534# 479#
@@ -536,6 +481,7 @@ CONFIG_8139TOO=y
536# 481#
537CONFIG_INPUT=y 482CONFIG_INPUT=y
538# CONFIG_INPUT_FF_MEMLESS is not set 483# CONFIG_INPUT_FF_MEMLESS is not set
484# CONFIG_INPUT_POLLDEV is not set
539 485
540# 486#
541# Userland interfaces 487# Userland interfaces
@@ -606,10 +552,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
606CONFIG_UNIX98_PTYS=y 552CONFIG_UNIX98_PTYS=y
607CONFIG_LEGACY_PTYS=y 553CONFIG_LEGACY_PTYS=y
608CONFIG_LEGACY_PTY_COUNT=256 554CONFIG_LEGACY_PTY_COUNT=256
609
610#
611# IPMI
612#
613# CONFIG_IPMI_HANDLER is not set 555# CONFIG_IPMI_HANDLER is not set
614CONFIG_WATCHDOG=y 556CONFIG_WATCHDOG=y
615# CONFIG_WATCHDOG_NOWAYOUT is not set 557# CONFIG_WATCHDOG_NOWAYOUT is not set
@@ -631,10 +573,6 @@ CONFIG_HW_RANDOM=y
631# CONFIG_APPLICOM is not set 573# CONFIG_APPLICOM is not set
632# CONFIG_DRM is not set 574# CONFIG_DRM is not set
633# CONFIG_RAW_DRIVER is not set 575# CONFIG_RAW_DRIVER is not set
634
635#
636# TPM devices
637#
638# CONFIG_TCG_TPM is not set 576# CONFIG_TCG_TPM is not set
639CONFIG_DEVPORT=y 577CONFIG_DEVPORT=y
640# CONFIG_I2C is not set 578# CONFIG_I2C is not set
@@ -644,11 +582,8 @@ CONFIG_DEVPORT=y
644# 582#
645# CONFIG_SPI is not set 583# CONFIG_SPI is not set
646# CONFIG_SPI_MASTER is not set 584# CONFIG_SPI_MASTER is not set
647
648#
649# Dallas's 1-wire bus
650#
651# CONFIG_W1 is not set 585# CONFIG_W1 is not set
586# CONFIG_POWER_SUPPLY is not set
652# CONFIG_HWMON is not set 587# CONFIG_HWMON is not set
653 588
654# 589#
@@ -673,6 +608,7 @@ CONFIG_DEVPORT=y
673# 608#
674# CONFIG_DISPLAY_SUPPORT is not set 609# CONFIG_DISPLAY_SUPPORT is not set
675# CONFIG_VGASTATE is not set 610# CONFIG_VGASTATE is not set
611CONFIG_VIDEO_OUTPUT_CONTROL=m
676CONFIG_FB=y 612CONFIG_FB=y
677CONFIG_FIRMWARE_EDID=y 613CONFIG_FIRMWARE_EDID=y
678# CONFIG_FB_DDC is not set 614# CONFIG_FB_DDC is not set
@@ -699,7 +635,6 @@ CONFIG_FB_DEFERRED_IO=y
699# CONFIG_FB_ASILIANT is not set 635# CONFIG_FB_ASILIANT is not set
700# CONFIG_FB_IMSTT is not set 636# CONFIG_FB_IMSTT is not set
701CONFIG_FB_PVR2=y 637CONFIG_FB_PVR2=y
702# CONFIG_FB_EPSON1355 is not set
703# CONFIG_FB_S1D13XXX is not set 638# CONFIG_FB_S1D13XXX is not set
704# CONFIG_FB_NVIDIA is not set 639# CONFIG_FB_NVIDIA is not set
705# CONFIG_FB_RIVA is not set 640# CONFIG_FB_RIVA is not set
@@ -725,6 +660,7 @@ CONFIG_FB_PVR2=y
725# 660#
726CONFIG_DUMMY_CONSOLE=y 661CONFIG_DUMMY_CONSOLE=y
727CONFIG_FRAMEBUFFER_CONSOLE=y 662CONFIG_FRAMEBUFFER_CONSOLE=y
663# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
728# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set 664# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
729CONFIG_FONTS=y 665CONFIG_FONTS=y
730CONFIG_FONT_8x8=y 666CONFIG_FONT_8x8=y
@@ -749,16 +685,10 @@ CONFIG_LOGO_SUPERH_CLUT224=y
749# Sound 685# Sound
750# 686#
751# CONFIG_SOUND is not set 687# CONFIG_SOUND is not set
752 688CONFIG_HID_SUPPORT=y
753#
754# HID Devices
755#
756CONFIG_HID=y 689CONFIG_HID=y
757# CONFIG_HID_DEBUG is not set 690# CONFIG_HID_DEBUG is not set
758 691CONFIG_USB_SUPPORT=y
759#
760# USB support
761#
762CONFIG_USB_ARCH_HAS_HCD=y 692CONFIG_USB_ARCH_HAS_HCD=y
763CONFIG_USB_ARCH_HAS_OHCI=y 693CONFIG_USB_ARCH_HAS_OHCI=y
764CONFIG_USB_ARCH_HAS_EHCI=y 694CONFIG_USB_ARCH_HAS_EHCI=y
@@ -773,32 +703,8 @@ CONFIG_USB_ARCH_HAS_EHCI=y
773# 703#
774# CONFIG_USB_GADGET is not set 704# CONFIG_USB_GADGET is not set
775# CONFIG_MMC is not set 705# CONFIG_MMC is not set
776
777#
778# LED devices
779#
780# CONFIG_NEW_LEDS is not set 706# CONFIG_NEW_LEDS is not set
781
782#
783# LED drivers
784#
785
786#
787# LED Triggers
788#
789
790#
791# InfiniBand support
792#
793# CONFIG_INFINIBAND is not set 707# CONFIG_INFINIBAND is not set
794
795#
796# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
797#
798
799#
800# Real Time Clock
801#
802# CONFIG_RTC_CLASS is not set 708# CONFIG_RTC_CLASS is not set
803 709
804# 710#
@@ -815,6 +721,11 @@ CONFIG_USB_ARCH_HAS_EHCI=y
815# 721#
816 722
817# 723#
724# Userspace I/O
725#
726# CONFIG_UIO is not set
727
728#
818# File systems 729# File systems
819# 730#
820# CONFIG_EXT2_FS is not set 731# CONFIG_EXT2_FS is not set
@@ -890,7 +801,6 @@ CONFIG_RAMFS=y
890# CONFIG_NCP_FS is not set 801# CONFIG_NCP_FS is not set
891# CONFIG_CODA_FS is not set 802# CONFIG_CODA_FS is not set
892# CONFIG_AFS_FS is not set 803# CONFIG_AFS_FS is not set
893# CONFIG_9P_FS is not set
894 804
895# 805#
896# Partition Types 806# Partition Types
@@ -935,10 +845,6 @@ CONFIG_ENABLE_MUST_CHECK=y
935# 845#
936# CONFIG_KEYS is not set 846# CONFIG_KEYS is not set
937# CONFIG_SECURITY is not set 847# CONFIG_SECURITY is not set
938
939#
940# Cryptographic options
941#
942# CONFIG_CRYPTO is not set 848# CONFIG_CRYPTO is not set
943 849
944# 850#
@@ -949,6 +855,7 @@ CONFIG_BITREVERSE=y
949# CONFIG_CRC16 is not set 855# CONFIG_CRC16 is not set
950# CONFIG_CRC_ITU_T is not set 856# CONFIG_CRC_ITU_T is not set
951CONFIG_CRC32=y 857CONFIG_CRC32=y
858# CONFIG_CRC7 is not set
952# CONFIG_LIBCRC32C is not set 859# CONFIG_LIBCRC32C is not set
953CONFIG_PLIST=y 860CONFIG_PLIST=y
954CONFIG_HAS_IOMEM=y 861CONFIG_HAS_IOMEM=y
diff --git a/arch/sh/configs/hp6xx_defconfig b/arch/sh/configs/hp6xx_defconfig
index b931d9b2d579..756d38dc2f71 100644
--- a/arch/sh/configs/hp6xx_defconfig
+++ b/arch/sh/configs/hp6xx_defconfig
@@ -1,37 +1,47 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18 3# Linux kernel version: 2.6.23-rc4
4# Tue Oct 3 11:10:06 2006 4# Tue Sep 11 19:42:44 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_BUG=y
8CONFIG_GENERIC_FIND_NEXT_BIT=y 9CONFIG_GENERIC_FIND_NEXT_BIT=y
9CONFIG_GENERIC_HWEIGHT=y 10CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y 11CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y 12CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y 13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_TIME=y
15CONFIG_GENERIC_CLOCKEVENTS=y
16CONFIG_SYS_SUPPORTS_PM=y
17CONFIG_SYS_SUPPORTS_APM_EMULATION=y
18CONFIG_STACKTRACE_SUPPORT=y
19CONFIG_LOCKDEP_SUPPORT=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_ARCH_NO_VIRT_TO_BUS=y
13CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
14 24
15# 25#
16# Code maturity level options 26# General setup
17# 27#
18CONFIG_EXPERIMENTAL=y 28CONFIG_EXPERIMENTAL=y
19CONFIG_BROKEN_ON_SMP=y 29CONFIG_BROKEN_ON_SMP=y
20CONFIG_INIT_ENV_ARG_LIMIT=32 30CONFIG_INIT_ENV_ARG_LIMIT=32
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION="" 31CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y 32CONFIG_LOCALVERSION_AUTO=y
27CONFIG_SWAP=y 33CONFIG_SWAP=y
28# CONFIG_SYSVIPC is not set 34# CONFIG_SYSVIPC is not set
29# CONFIG_BSD_PROCESS_ACCT is not set 35CONFIG_BSD_PROCESS_ACCT=y
30# CONFIG_UTS_NS is not set 36# CONFIG_BSD_PROCESS_ACCT_V3 is not set
31# CONFIG_IKCONFIG is not set 37# CONFIG_USER_NS is not set
38CONFIG_IKCONFIG=y
39CONFIG_IKCONFIG_PROC=y
40CONFIG_LOG_BUF_SHIFT=14
41CONFIG_SYSFS_DEPRECATED=y
32# CONFIG_RELAY is not set 42# CONFIG_RELAY is not set
33CONFIG_INITRAMFS_SOURCE="" 43# CONFIG_BLK_DEV_INITRD is not set
34CONFIG_CC_OPTIMIZE_FOR_SIZE=y 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
35CONFIG_SYSCTL=y 45CONFIG_SYSCTL=y
36CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
37CONFIG_UID16=y 47CONFIG_UID16=y
@@ -44,27 +54,25 @@ CONFIG_BUG=y
44CONFIG_ELF_CORE=y 54CONFIG_ELF_CORE=y
45CONFIG_BASE_FULL=y 55CONFIG_BASE_FULL=y
46CONFIG_FUTEX=y 56CONFIG_FUTEX=y
57CONFIG_ANON_INODES=y
47CONFIG_EPOLL=y 58CONFIG_EPOLL=y
59CONFIG_SIGNALFD=y
60CONFIG_TIMERFD=y
61CONFIG_EVENTFD=y
48CONFIG_SHMEM=y 62CONFIG_SHMEM=y
49CONFIG_SLAB=y
50CONFIG_VM_EVENT_COUNTERS=y 63CONFIG_VM_EVENT_COUNTERS=y
64CONFIG_SLAB=y
65# CONFIG_SLUB is not set
66# CONFIG_SLOB is not set
51CONFIG_RT_MUTEXES=y 67CONFIG_RT_MUTEXES=y
52# CONFIG_TINY_SHMEM is not set 68# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0 69CONFIG_BASE_SMALL=0
54# CONFIG_SLOB is not set
55
56#
57# Loadable module support
58#
59# CONFIG_MODULES is not set 70# CONFIG_MODULES is not set
60
61#
62# Block layer
63#
64CONFIG_BLOCK=y 71CONFIG_BLOCK=y
65# CONFIG_LBD is not set 72# CONFIG_LBD is not set
66# CONFIG_BLK_DEV_IO_TRACE is not set 73# CONFIG_BLK_DEV_IO_TRACE is not set
67# CONFIG_LSF is not set 74# CONFIG_LSF is not set
75# CONFIG_BLK_DEV_BSG is not set
68 76
69# 77#
70# IO Schedulers 78# IO Schedulers
@@ -82,55 +90,17 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
82# 90#
83# System type 91# System type
84# 92#
85# CONFIG_SH_SOLUTION_ENGINE is not set
86# CONFIG_SH_7751_SOLUTION_ENGINE is not set
87# CONFIG_SH_7300_SOLUTION_ENGINE is not set
88# CONFIG_SH_7343_SOLUTION_ENGINE is not set
89# CONFIG_SH_73180_SOLUTION_ENGINE is not set
90# CONFIG_SH_7751_SYSTEMH is not set
91CONFIG_SH_HP6XX=y
92# CONFIG_SH_EC3104 is not set
93# CONFIG_SH_SATURN is not set
94# CONFIG_SH_DREAMCAST is not set
95# CONFIG_SH_BIGSUR is not set
96# CONFIG_SH_MPC1211 is not set
97# CONFIG_SH_SH03 is not set
98# CONFIG_SH_SECUREEDGE5410 is not set
99# CONFIG_SH_HS7751RVOIP is not set
100# CONFIG_SH_7710VOIPGW is not set
101# CONFIG_SH_RTS7751R2D is not set
102# CONFIG_SH_R7780RP is not set
103# CONFIG_SH_EDOSK7705 is not set
104# CONFIG_SH_SH4202_MICRODEV is not set
105# CONFIG_SH_LANDISK is not set
106# CONFIG_SH_TITAN is not set
107# CONFIG_SH_SHMIN is not set
108# CONFIG_SH_UNKNOWN is not set
109
110#
111# Processor selection
112#
113CONFIG_CPU_SH3=y 93CONFIG_CPU_SH3=y
114 94# CONFIG_CPU_SUBTYPE_SH7619 is not set
115# 95# CONFIG_CPU_SUBTYPE_SH7206 is not set
116# SH-2 Processor Support
117#
118# CONFIG_CPU_SUBTYPE_SH7604 is not set
119
120#
121# SH-3 Processor Support
122#
123# CONFIG_CPU_SUBTYPE_SH7300 is not set
124# CONFIG_CPU_SUBTYPE_SH7705 is not set 96# CONFIG_CPU_SUBTYPE_SH7705 is not set
125# CONFIG_CPU_SUBTYPE_SH7706 is not set 97# CONFIG_CPU_SUBTYPE_SH7706 is not set
126# CONFIG_CPU_SUBTYPE_SH7707 is not set 98# CONFIG_CPU_SUBTYPE_SH7707 is not set
127# CONFIG_CPU_SUBTYPE_SH7708 is not set 99# CONFIG_CPU_SUBTYPE_SH7708 is not set
128CONFIG_CPU_SUBTYPE_SH7709=y 100CONFIG_CPU_SUBTYPE_SH7709=y
129# CONFIG_CPU_SUBTYPE_SH7710 is not set 101# CONFIG_CPU_SUBTYPE_SH7710 is not set
130 102# CONFIG_CPU_SUBTYPE_SH7712 is not set
131# 103# CONFIG_CPU_SUBTYPE_SH7720 is not set
132# SH-4 Processor Support
133#
134# CONFIG_CPU_SUBTYPE_SH7750 is not set 104# CONFIG_CPU_SUBTYPE_SH7750 is not set
135# CONFIG_CPU_SUBTYPE_SH7091 is not set 105# CONFIG_CPU_SUBTYPE_SH7091 is not set
136# CONFIG_CPU_SUBTYPE_SH7750R is not set 106# CONFIG_CPU_SUBTYPE_SH7750R is not set
@@ -139,66 +109,78 @@ CONFIG_CPU_SUBTYPE_SH7709=y
139# CONFIG_CPU_SUBTYPE_SH7751R is not set 109# CONFIG_CPU_SUBTYPE_SH7751R is not set
140# CONFIG_CPU_SUBTYPE_SH7760 is not set 110# CONFIG_CPU_SUBTYPE_SH7760 is not set
141# CONFIG_CPU_SUBTYPE_SH4_202 is not set 111# CONFIG_CPU_SUBTYPE_SH4_202 is not set
142
143#
144# ST40 Processor Support
145#
146# CONFIG_CPU_SUBTYPE_ST40STB1 is not set 112# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
147# CONFIG_CPU_SUBTYPE_ST40GX1 is not set 113# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
148
149#
150# SH-4A Processor Support
151#
152# CONFIG_CPU_SUBTYPE_SH7770 is not set 114# CONFIG_CPU_SUBTYPE_SH7770 is not set
153# CONFIG_CPU_SUBTYPE_SH7780 is not set 115# CONFIG_CPU_SUBTYPE_SH7780 is not set
154 116# CONFIG_CPU_SUBTYPE_SH7785 is not set
155# 117# CONFIG_CPU_SUBTYPE_SHX3 is not set
156# SH4AL-DSP Processor Support
157#
158# CONFIG_CPU_SUBTYPE_SH73180 is not set
159# CONFIG_CPU_SUBTYPE_SH7343 is not set 118# CONFIG_CPU_SUBTYPE_SH7343 is not set
119# CONFIG_CPU_SUBTYPE_SH7722 is not set
160 120
161# 121#
162# Memory management options 122# Memory management options
163# 123#
124CONFIG_QUICKLIST=y
164CONFIG_MMU=y 125CONFIG_MMU=y
165CONFIG_PAGE_OFFSET=0x80000000 126CONFIG_PAGE_OFFSET=0x80000000
166CONFIG_MEMORY_START=0x0c000000 127CONFIG_MEMORY_START=0x0d000000
167CONFIG_MEMORY_SIZE=0x00400000 128CONFIG_MEMORY_SIZE=0x00400000
168CONFIG_VSYSCALL=y 129CONFIG_VSYSCALL=y
130CONFIG_ARCH_FLATMEM_ENABLE=y
131CONFIG_ARCH_SPARSEMEM_ENABLE=y
132CONFIG_ARCH_SPARSEMEM_DEFAULT=y
133CONFIG_MAX_ACTIVE_REGIONS=1
134CONFIG_ARCH_POPULATES_NODE_MAP=y
135CONFIG_ARCH_SELECT_MEMORY_MODEL=y
136CONFIG_PAGE_SIZE_4KB=y
137# CONFIG_PAGE_SIZE_8KB is not set
138# CONFIG_PAGE_SIZE_64KB is not set
169CONFIG_SELECT_MEMORY_MODEL=y 139CONFIG_SELECT_MEMORY_MODEL=y
170CONFIG_FLATMEM_MANUAL=y 140CONFIG_FLATMEM_MANUAL=y
171# CONFIG_DISCONTIGMEM_MANUAL is not set 141# CONFIG_DISCONTIGMEM_MANUAL is not set
172# CONFIG_SPARSEMEM_MANUAL is not set 142# CONFIG_SPARSEMEM_MANUAL is not set
173CONFIG_FLATMEM=y 143CONFIG_FLATMEM=y
174CONFIG_FLAT_NODE_MEM_MAP=y 144CONFIG_FLAT_NODE_MEM_MAP=y
175# CONFIG_SPARSEMEM_STATIC is not set 145CONFIG_SPARSEMEM_STATIC=y
176CONFIG_SPLIT_PTLOCK_CPUS=4 146CONFIG_SPLIT_PTLOCK_CPUS=4
177# CONFIG_RESOURCES_64BIT is not set 147# CONFIG_RESOURCES_64BIT is not set
148CONFIG_ZONE_DMA_FLAG=0
149CONFIG_NR_QUICK=2
178 150
179# 151#
180# Cache configuration 152# Cache configuration
181# 153#
182# CONFIG_SH_DIRECT_MAPPED is not set 154# CONFIG_SH_DIRECT_MAPPED is not set
183# CONFIG_SH_WRITETHROUGH is not set 155CONFIG_CACHE_WRITEBACK=y
184# CONFIG_SH_OCRAM is not set 156# CONFIG_CACHE_WRITETHROUGH is not set
157# CONFIG_CACHE_OFF is not set
185 158
186# 159#
187# Processor features 160# Processor features
188# 161#
189CONFIG_CPU_LITTLE_ENDIAN=y 162CONFIG_CPU_LITTLE_ENDIAN=y
163# CONFIG_CPU_BIG_ENDIAN is not set
190# CONFIG_SH_FPU_EMU is not set 164# CONFIG_SH_FPU_EMU is not set
191# CONFIG_SH_DSP is not set
192CONFIG_SH_ADC=y 165CONFIG_SH_ADC=y
193CONFIG_CPU_HAS_INTEVT=y 166CONFIG_CPU_HAS_INTEVT=y
194CONFIG_CPU_HAS_PINT_IRQ=y
195CONFIG_CPU_HAS_SR_RB=y 167CONFIG_CPU_HAS_SR_RB=y
196 168
197# 169#
198# Timer support 170# Board support
171#
172# CONFIG_SH_SOLUTION_ENGINE is not set
173CONFIG_SH_HP6XX=y
174
175#
176# Timer and clock configuration
199# 177#
200CONFIG_SH_TMU=y 178CONFIG_SH_TMU=y
179CONFIG_SH_TIMER_IRQ=16
201CONFIG_SH_PCLK_FREQ=22110000 180CONFIG_SH_PCLK_FREQ=22110000
181# CONFIG_TICK_ONESHOT is not set
182# CONFIG_NO_HZ is not set
183# CONFIG_HIGH_RES_TIMERS is not set
202 184
203# 185#
204# CPU Frequency scaling 186# CPU Frequency scaling
@@ -208,6 +190,7 @@ CONFIG_SH_PCLK_FREQ=22110000
208# 190#
209# DMA support 191# DMA support
210# 192#
193CONFIG_SH_DMA_API=y
211CONFIG_SH_DMA=y 194CONFIG_SH_DMA=y
212CONFIG_NR_ONCHIP_DMA_CHANNELS=4 195CONFIG_NR_ONCHIP_DMA_CHANNELS=4
213# CONFIG_NR_DMA_CHANNELS_BOOL is not set 196# CONFIG_NR_DMA_CHANNELS_BOOL is not set
@@ -223,14 +206,21 @@ CONFIG_HD64461_IOBASE=0xb0000000
223CONFIG_HD64461_ENABLER=y 206CONFIG_HD64461_ENABLER=y
224 207
225# 208#
209# Additional SuperH Device Drivers
210#
211# CONFIG_HEARTBEAT is not set
212# CONFIG_PUSH_SWITCH is not set
213
214#
226# Kernel features 215# Kernel features
227# 216#
228# CONFIG_HZ_100 is not set 217# CONFIG_HZ_100 is not set
229CONFIG_HZ_250=y 218CONFIG_HZ_250=y
219# CONFIG_HZ_300 is not set
230# CONFIG_HZ_1000 is not set 220# CONFIG_HZ_1000 is not set
231CONFIG_HZ=250 221CONFIG_HZ=250
232# CONFIG_KEXEC is not set 222# CONFIG_KEXEC is not set
233# CONFIG_SMP is not set 223# CONFIG_CRASH_DUMP is not set
234CONFIG_PREEMPT_NONE=y 224CONFIG_PREEMPT_NONE=y
235# CONFIG_PREEMPT_VOLUNTARY is not set 225# CONFIG_PREEMPT_VOLUNTARY is not set
236# CONFIG_PREEMPT is not set 226# CONFIG_PREEMPT is not set
@@ -240,14 +230,13 @@ CONFIG_PREEMPT_NONE=y
240# 230#
241CONFIG_ZERO_PAGE_OFFSET=0x00001000 231CONFIG_ZERO_PAGE_OFFSET=0x00001000
242CONFIG_BOOT_LINK_OFFSET=0x00800000 232CONFIG_BOOT_LINK_OFFSET=0x00800000
243# CONFIG_UBC_WAKEUP is not set
244# CONFIG_CMDLINE_BOOL is not set 233# CONFIG_CMDLINE_BOOL is not set
245 234
246# 235#
247# Bus options 236# Bus options
248# 237#
249CONFIG_ISA=y 238CONFIG_ISA=y
250# CONFIG_PCI is not set 239# CONFIG_ARCH_SUPPORTS_MSI is not set
251 240
252# 241#
253# PCCARD (PCMCIA/CardBus) support 242# PCCARD (PCMCIA/CardBus) support
@@ -266,14 +255,9 @@ CONFIG_PCMCIA_IOCTL=y
266CONFIG_PCMCIA_PROBE=y 255CONFIG_PCMCIA_PROBE=y
267 256
268# 257#
269# PCI Hotplug Support
270#
271
272#
273# Executable file formats 258# Executable file formats
274# 259#
275CONFIG_BINFMT_ELF=y 260CONFIG_BINFMT_ELF=y
276# CONFIG_BINFMT_FLAT is not set
277# CONFIG_BINFMT_MISC is not set 261# CONFIG_BINFMT_MISC is not set
278 262
279# 263#
@@ -282,8 +266,9 @@ CONFIG_BINFMT_ELF=y
282CONFIG_PM=y 266CONFIG_PM=y
283CONFIG_PM_LEGACY=y 267CONFIG_PM_LEGACY=y
284# CONFIG_PM_DEBUG is not set 268# CONFIG_PM_DEBUG is not set
285# CONFIG_PM_SYSFS_DEPRECATED is not set 269CONFIG_PM_SLEEP=y
286CONFIG_APM=y 270CONFIG_SUSPEND=y
271CONFIG_APM_EMULATION=y
287 272
288# 273#
289# Networking 274# Networking
@@ -301,109 +286,76 @@ CONFIG_APM=y
301CONFIG_PREVENT_FIRMWARE_BUILD=y 286CONFIG_PREVENT_FIRMWARE_BUILD=y
302CONFIG_FW_LOADER=y 287CONFIG_FW_LOADER=y
303# CONFIG_SYS_HYPERVISOR is not set 288# CONFIG_SYS_HYPERVISOR is not set
304
305#
306# Connector - unified userspace <-> kernelspace linker
307#
308
309#
310# Memory Technology Devices (MTD)
311#
312# CONFIG_MTD is not set 289# CONFIG_MTD is not set
313
314#
315# Parallel port support
316#
317# CONFIG_PARPORT is not set 290# CONFIG_PARPORT is not set
318
319#
320# Plug and Play support
321#
322# CONFIG_PNP is not set 291# CONFIG_PNP is not set
323 292CONFIG_BLK_DEV=y
324#
325# Block devices
326#
327# CONFIG_BLK_DEV_COW_COMMON is not set 293# CONFIG_BLK_DEV_COW_COMMON is not set
328# CONFIG_BLK_DEV_LOOP is not set 294# CONFIG_BLK_DEV_LOOP is not set
329CONFIG_BLK_DEV_RAM=y 295# CONFIG_BLK_DEV_RAM is not set
330CONFIG_BLK_DEV_RAM_COUNT=16
331CONFIG_BLK_DEV_RAM_SIZE=4096
332CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
333CONFIG_BLK_DEV_INITRD=y
334# CONFIG_CDROM_PKTCDVD is not set 296# CONFIG_CDROM_PKTCDVD is not set
335 297CONFIG_MISC_DEVICES=y
336# 298# CONFIG_EEPROM_93CX6 is not set
337# ATA/ATAPI/MFM/RLL support 299# CONFIG_IDE is not set
338#
339CONFIG_IDE=y
340CONFIG_IDE_MAX_HWIFS=4
341CONFIG_BLK_DEV_IDE=y
342
343#
344# Please see Documentation/ide.txt for help/info on IDE drives
345#
346# CONFIG_BLK_DEV_IDE_SATA is not set
347CONFIG_BLK_DEV_IDEDISK=y
348# CONFIG_IDEDISK_MULTI_MODE is not set
349CONFIG_BLK_DEV_IDECS=y
350# CONFIG_BLK_DEV_IDECD is not set
351# CONFIG_BLK_DEV_IDETAPE is not set
352# CONFIG_BLK_DEV_IDEFLOPPY is not set
353# CONFIG_IDE_TASK_IOCTL is not set
354
355#
356# IDE chipset support/bugfixes
357#
358CONFIG_IDE_GENERIC=y
359# CONFIG_IDE_ARM is not set
360# CONFIG_IDE_CHIPSETS is not set
361# CONFIG_BLK_DEV_IDEDMA is not set
362# CONFIG_IDEDMA_AUTO is not set
363# CONFIG_BLK_DEV_HD is not set
364 300
365# 301#
366# SCSI device support 302# SCSI device support
367# 303#
368# CONFIG_RAID_ATTRS is not set 304# CONFIG_RAID_ATTRS is not set
369# CONFIG_SCSI is not set 305CONFIG_SCSI=y
306CONFIG_SCSI_DMA=y
307# CONFIG_SCSI_TGT is not set
370# CONFIG_SCSI_NETLINK is not set 308# CONFIG_SCSI_NETLINK is not set
371 309CONFIG_SCSI_PROC_FS=y
372# 310
373# Serial ATA (prod) and Parallel ATA (experimental) drivers 311#
374# 312# SCSI support type (disk, tape, CD-ROM)
375# CONFIG_ATA is not set 313#
376 314CONFIG_BLK_DEV_SD=y
377# 315# CONFIG_CHR_DEV_ST is not set
378# Old CD-ROM drivers (not SCSI, not IDE) 316# CONFIG_CHR_DEV_OSST is not set
379# 317# CONFIG_BLK_DEV_SR is not set
380# CONFIG_CD_NO_IDESCSI is not set 318# CONFIG_CHR_DEV_SG is not set
381 319# CONFIG_CHR_DEV_SCH is not set
382# 320
383# Multi-device support (RAID and LVM) 321#
384# 322# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
323#
324# CONFIG_SCSI_MULTI_LUN is not set
325# CONFIG_SCSI_CONSTANTS is not set
326# CONFIG_SCSI_LOGGING is not set
327# CONFIG_SCSI_SCAN_ASYNC is not set
328
329#
330# SCSI Transports
331#
332# CONFIG_SCSI_SPI_ATTRS is not set
333# CONFIG_SCSI_FC_ATTRS is not set
334# CONFIG_SCSI_SAS_LIBSAS is not set
335CONFIG_SCSI_LOWLEVEL=y
336# CONFIG_SCSI_AHA152X is not set
337# CONFIG_SCSI_AIC7XXX_OLD is not set
338# CONFIG_SCSI_IN2000 is not set
339# CONFIG_SCSI_DTC3280 is not set
340# CONFIG_SCSI_FUTURE_DOMAIN is not set
341# CONFIG_SCSI_GENERIC_NCR5380 is not set
342# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
343# CONFIG_SCSI_NCR53C406A is not set
344# CONFIG_SCSI_PAS16 is not set
345# CONFIG_SCSI_PSI240I is not set
346# CONFIG_SCSI_QLOGIC_FAS is not set
347# CONFIG_SCSI_SYM53C416 is not set
348# CONFIG_SCSI_T128 is not set
349# CONFIG_SCSI_DEBUG is not set
350# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
351CONFIG_ATA=y
352# CONFIG_ATA_NONSTANDARD is not set
353# CONFIG_PATA_LEGACY is not set
354# CONFIG_PATA_PCMCIA is not set
355# CONFIG_PATA_QDI is not set
356# CONFIG_PATA_WINBOND_VLB is not set
357CONFIG_PATA_PLATFORM=y
385# CONFIG_MD is not set 358# CONFIG_MD is not set
386
387#
388# Fusion MPT device support
389#
390# CONFIG_FUSION is not set
391
392#
393# IEEE 1394 (FireWire) support
394#
395
396#
397# I2O device support
398#
399
400#
401# ISDN subsystem
402#
403
404#
405# Telephony Support
406#
407# CONFIG_PHONE is not set 359# CONFIG_PHONE is not set
408 360
409# 361#
@@ -411,19 +363,17 @@ CONFIG_IDE_GENERIC=y
411# 363#
412CONFIG_INPUT=y 364CONFIG_INPUT=y
413# CONFIG_INPUT_FF_MEMLESS is not set 365# CONFIG_INPUT_FF_MEMLESS is not set
366CONFIG_INPUT_POLLDEV=y
414 367
415# 368#
416# Userland interfaces 369# Userland interfaces
417# 370#
418CONFIG_INPUT_MOUSEDEV=y 371# CONFIG_INPUT_MOUSEDEV is not set
419CONFIG_INPUT_MOUSEDEV_PSAUX=y
420CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
421CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
422# CONFIG_INPUT_JOYDEV is not set 372# CONFIG_INPUT_JOYDEV is not set
423CONFIG_INPUT_TSDEV=y 373CONFIG_INPUT_TSDEV=y
424CONFIG_INPUT_TSDEV_SCREEN_X=240 374CONFIG_INPUT_TSDEV_SCREEN_X=240
425CONFIG_INPUT_TSDEV_SCREEN_Y=320 375CONFIG_INPUT_TSDEV_SCREEN_Y=320
426# CONFIG_INPUT_EVDEV is not set 376CONFIG_INPUT_EVDEV=y
427# CONFIG_INPUT_EVBUG is not set 377# CONFIG_INPUT_EVBUG is not set
428 378
429# 379#
@@ -436,9 +386,12 @@ CONFIG_INPUT_KEYBOARD=y
436# CONFIG_KEYBOARD_XTKBD is not set 386# CONFIG_KEYBOARD_XTKBD is not set
437# CONFIG_KEYBOARD_NEWTON is not set 387# CONFIG_KEYBOARD_NEWTON is not set
438# CONFIG_KEYBOARD_STOWAWAY is not set 388# CONFIG_KEYBOARD_STOWAWAY is not set
389CONFIG_KEYBOARD_HP6XX=y
439# CONFIG_INPUT_MOUSE is not set 390# CONFIG_INPUT_MOUSE is not set
440# CONFIG_INPUT_JOYSTICK is not set 391# CONFIG_INPUT_JOYSTICK is not set
392# CONFIG_INPUT_TABLET is not set
441CONFIG_INPUT_TOUCHSCREEN=y 393CONFIG_INPUT_TOUCHSCREEN=y
394# CONFIG_TOUCHSCREEN_FUJITSU is not set
442# CONFIG_TOUCHSCREEN_GUNZE is not set 395# CONFIG_TOUCHSCREEN_GUNZE is not set
443# CONFIG_TOUCHSCREEN_ELO is not set 396# CONFIG_TOUCHSCREEN_ELO is not set
444# CONFIG_TOUCHSCREEN_MTOUCH is not set 397# CONFIG_TOUCHSCREEN_MTOUCH is not set
@@ -447,6 +400,7 @@ CONFIG_TOUCHSCREEN_HP600=y
447# CONFIG_TOUCHSCREEN_PENMOUNT is not set 400# CONFIG_TOUCHSCREEN_PENMOUNT is not set
448# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 401# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
449# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 402# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
403# CONFIG_TOUCHSCREEN_UCB1400 is not set
450# CONFIG_INPUT_MISC is not set 404# CONFIG_INPUT_MISC is not set
451 405
452# 406#
@@ -476,46 +430,29 @@ CONFIG_HW_CONSOLE=y
476# 430#
477# Non-8250 serial port support 431# Non-8250 serial port support
478# 432#
479# CONFIG_SERIAL_SH_SCI is not set 433CONFIG_SERIAL_SH_SCI=y
434CONFIG_SERIAL_SH_SCI_NR_UARTS=3
435CONFIG_SERIAL_SH_SCI_CONSOLE=y
436CONFIG_SERIAL_CORE=y
437CONFIG_SERIAL_CORE_CONSOLE=y
480CONFIG_UNIX98_PTYS=y 438CONFIG_UNIX98_PTYS=y
481CONFIG_LEGACY_PTYS=y 439CONFIG_LEGACY_PTYS=y
482CONFIG_LEGACY_PTY_COUNT=256 440CONFIG_LEGACY_PTY_COUNT=64
483
484#
485# IPMI
486#
487# CONFIG_IPMI_HANDLER is not set 441# CONFIG_IPMI_HANDLER is not set
488
489#
490# Watchdog Cards
491#
492# CONFIG_WATCHDOG is not set 442# CONFIG_WATCHDOG is not set
493CONFIG_HW_RANDOM=y 443CONFIG_HW_RANDOM=y
494# CONFIG_GEN_RTC is not set
495# CONFIG_DTLK is not set 444# CONFIG_DTLK is not set
496# CONFIG_R3964 is not set 445# CONFIG_R3964 is not set
497 446
498# 447#
499# Ftape, the floppy tape device driver
500#
501
502#
503# PCMCIA character devices 448# PCMCIA character devices
504# 449#
505# CONFIG_SYNCLINK_CS is not set 450# CONFIG_SYNCLINK_CS is not set
506# CONFIG_CARDMAN_4000 is not set 451# CONFIG_CARDMAN_4000 is not set
507# CONFIG_CARDMAN_4040 is not set 452# CONFIG_CARDMAN_4040 is not set
508# CONFIG_RAW_DRIVER is not set 453# CONFIG_RAW_DRIVER is not set
509
510#
511# TPM devices
512#
513# CONFIG_TCG_TPM is not set 454# CONFIG_TCG_TPM is not set
514# CONFIG_TELCLOCK is not set 455CONFIG_DEVPORT=y
515
516#
517# I2C support
518#
519# CONFIG_I2C is not set 456# CONFIG_I2C is not set
520 457
521# 458#
@@ -523,48 +460,55 @@ CONFIG_HW_RANDOM=y
523# 460#
524# CONFIG_SPI is not set 461# CONFIG_SPI is not set
525# CONFIG_SPI_MASTER is not set 462# CONFIG_SPI_MASTER is not set
463# CONFIG_W1 is not set
464# CONFIG_POWER_SUPPLY is not set
465# CONFIG_HWMON is not set
526 466
527# 467#
528# Dallas's 1-wire bus 468# Multifunction device drivers
529#
530
531#
532# Hardware Monitoring support
533#
534CONFIG_HWMON=y
535# CONFIG_HWMON_VID is not set
536# CONFIG_SENSORS_ABITUGURU is not set
537# CONFIG_SENSORS_F71805F is not set
538# CONFIG_SENSORS_VT1211 is not set
539# CONFIG_HWMON_DEBUG_CHIP is not set
540
541#
542# Misc devices
543# 469#
470# CONFIG_MFD_SM501 is not set
544 471
545# 472#
546# Multimedia devices 473# Multimedia devices
547# 474#
548# CONFIG_VIDEO_DEV is not set 475# CONFIG_VIDEO_DEV is not set
549CONFIG_VIDEO_V4L2=y 476# CONFIG_DAB is not set
550 477
551# 478#
552# Digital Video Broadcasting Devices 479# Graphics support
553# 480#
481CONFIG_BACKLIGHT_LCD_SUPPORT=y
482CONFIG_LCD_CLASS_DEVICE=y
483CONFIG_BACKLIGHT_CLASS_DEVICE=y
484CONFIG_BACKLIGHT_HP680=y
554 485
555# 486#
556# Graphics support 487# Display device support
557# 488#
558CONFIG_FIRMWARE_EDID=y 489# CONFIG_DISPLAY_SUPPORT is not set
490# CONFIG_VGASTATE is not set
491CONFIG_VIDEO_OUTPUT_CONTROL=y
559CONFIG_FB=y 492CONFIG_FB=y
493CONFIG_FIRMWARE_EDID=y
494# CONFIG_FB_DDC is not set
560CONFIG_FB_CFB_FILLRECT=y 495CONFIG_FB_CFB_FILLRECT=y
561CONFIG_FB_CFB_COPYAREA=y 496CONFIG_FB_CFB_COPYAREA=y
562CONFIG_FB_CFB_IMAGEBLIT=y 497CONFIG_FB_CFB_IMAGEBLIT=y
498# CONFIG_FB_SYS_FILLRECT is not set
499# CONFIG_FB_SYS_COPYAREA is not set
500# CONFIG_FB_SYS_IMAGEBLIT is not set
501# CONFIG_FB_SYS_FOPS is not set
502CONFIG_FB_DEFERRED_IO=y
503# CONFIG_FB_SVGALIB is not set
563# CONFIG_FB_MACMODES is not set 504# CONFIG_FB_MACMODES is not set
564# CONFIG_FB_BACKLIGHT is not set 505# CONFIG_FB_BACKLIGHT is not set
565# CONFIG_FB_MODE_HELPERS is not set 506# CONFIG_FB_MODE_HELPERS is not set
566# CONFIG_FB_TILEBLITTING is not set 507# CONFIG_FB_TILEBLITTING is not set
567# CONFIG_FB_EPSON1355 is not set 508
509#
510# Frame buffer hardware drivers
511#
568# CONFIG_FB_S1D13XXX is not set 512# CONFIG_FB_S1D13XXX is not set
569CONFIG_FB_HIT=y 513CONFIG_FB_HIT=y
570# CONFIG_FB_VIRTUAL is not set 514# CONFIG_FB_VIRTUAL is not set
@@ -575,6 +519,7 @@ CONFIG_FB_HIT=y
575# CONFIG_MDA_CONSOLE is not set 519# CONFIG_MDA_CONSOLE is not set
576CONFIG_DUMMY_CONSOLE=y 520CONFIG_DUMMY_CONSOLE=y
577CONFIG_FRAMEBUFFER_CONSOLE=y 521CONFIG_FRAMEBUFFER_CONSOLE=y
522# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
578# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set 523# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
579CONFIG_FONTS=y 524CONFIG_FONTS=y
580# CONFIG_FONT_8x8 is not set 525# CONFIG_FONT_8x8 is not set
@@ -587,79 +532,49 @@ CONFIG_FONT_PEARL_8x8=y
587# CONFIG_FONT_SUN8x16 is not set 532# CONFIG_FONT_SUN8x16 is not set
588# CONFIG_FONT_SUN12x22 is not set 533# CONFIG_FONT_SUN12x22 is not set
589# CONFIG_FONT_10x18 is not set 534# CONFIG_FONT_10x18 is not set
590
591#
592# Logo configuration
593#
594# CONFIG_LOGO is not set 535# CONFIG_LOGO is not set
595# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
596 536
597# 537#
598# Sound 538# Sound
599# 539#
600CONFIG_SOUND=y 540# CONFIG_SOUND is not set
601 541# CONFIG_HID_SUPPORT is not set
602# 542# CONFIG_USB_SUPPORT is not set
603# Advanced Linux Sound Architecture
604#
605# CONFIG_SND is not set
606
607#
608# Open Sound System
609#
610CONFIG_SOUND_PRIME=y
611# CONFIG_OSS_OBSOLETE_DRIVER is not set
612# CONFIG_SOUND_MSNDCLAS is not set
613# CONFIG_SOUND_MSNDPIN is not set
614CONFIG_SOUND_SH_DAC_AUDIO=y
615CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL=1
616
617#
618# USB support
619#
620# CONFIG_USB_ARCH_HAS_HCD is not set
621# CONFIG_USB_ARCH_HAS_OHCI is not set
622# CONFIG_USB_ARCH_HAS_EHCI is not set
623
624#
625# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
626#
627
628#
629# USB Gadget Support
630#
631# CONFIG_USB_GADGET is not set
632
633#
634# MMC/SD Card support
635#
636# CONFIG_MMC is not set 543# CONFIG_MMC is not set
637
638#
639# LED devices
640#
641# CONFIG_NEW_LEDS is not set 544# CONFIG_NEW_LEDS is not set
545CONFIG_RTC_LIB=y
546CONFIG_RTC_CLASS=y
547CONFIG_RTC_HCTOSYS=y
548CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
549# CONFIG_RTC_DEBUG is not set
642 550
643# 551#
644# LED drivers 552# RTC interfaces
645#
646
647#
648# LED Triggers
649# 553#
554CONFIG_RTC_INTF_SYSFS=y
555CONFIG_RTC_INTF_PROC=y
556CONFIG_RTC_INTF_DEV=y
557# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
558# CONFIG_RTC_DRV_TEST is not set
650 559
651# 560#
652# InfiniBand support 561# SPI RTC drivers
653# 562#
654 563
655# 564#
656# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 565# Platform RTC drivers
657# 566#
567# CONFIG_RTC_DRV_DS1553 is not set
568# CONFIG_RTC_DRV_STK17TA8 is not set
569# CONFIG_RTC_DRV_DS1742 is not set
570# CONFIG_RTC_DRV_M48T86 is not set
571# CONFIG_RTC_DRV_M48T59 is not set
572# CONFIG_RTC_DRV_V3020 is not set
658 573
659# 574#
660# Real Time Clock 575# on-CPU RTC drivers
661# 576#
662# CONFIG_RTC_CLASS is not set 577CONFIG_RTC_DRV_SH=y
663 578
664# 579#
665# DMA Engine support 580# DMA Engine support
@@ -675,16 +590,23 @@ CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL=1
675# 590#
676 591
677# 592#
593# Userspace I/O
594#
595# CONFIG_UIO is not set
596
597#
678# File systems 598# File systems
679# 599#
680CONFIG_EXT2_FS=y 600CONFIG_EXT2_FS=y
681# CONFIG_EXT2_FS_XATTR is not set 601# CONFIG_EXT2_FS_XATTR is not set
682# CONFIG_EXT2_FS_XIP is not set 602# CONFIG_EXT2_FS_XIP is not set
683# CONFIG_EXT3_FS is not set 603# CONFIG_EXT3_FS is not set
604# CONFIG_EXT4DEV_FS is not set
684# CONFIG_REISERFS_FS is not set 605# CONFIG_REISERFS_FS is not set
685# CONFIG_JFS_FS is not set 606# CONFIG_JFS_FS is not set
686# CONFIG_FS_POSIX_ACL is not set 607# CONFIG_FS_POSIX_ACL is not set
687# CONFIG_XFS_FS is not set 608# CONFIG_XFS_FS is not set
609# CONFIG_GFS2_FS is not set
688# CONFIG_MINIX_FS is not set 610# CONFIG_MINIX_FS is not set
689# CONFIG_ROMFS_FS is not set 611# CONFIG_ROMFS_FS is not set
690CONFIG_INOTIFY=y 612CONFIG_INOTIFY=y
@@ -705,7 +627,7 @@ CONFIG_DNOTIFY=y
705# DOS/FAT/NT Filesystems 627# DOS/FAT/NT Filesystems
706# 628#
707CONFIG_FAT_FS=y 629CONFIG_FAT_FS=y
708# CONFIG_MSDOS_FS is not set 630CONFIG_MSDOS_FS=y
709CONFIG_VFAT_FS=y 631CONFIG_VFAT_FS=y
710CONFIG_FAT_DEFAULT_CODEPAGE=437 632CONFIG_FAT_DEFAULT_CODEPAGE=437
711CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" 633CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
@@ -755,7 +677,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
755# CONFIG_NLS_CODEPAGE_437 is not set 677# CONFIG_NLS_CODEPAGE_437 is not set
756# CONFIG_NLS_CODEPAGE_737 is not set 678# CONFIG_NLS_CODEPAGE_737 is not set
757# CONFIG_NLS_CODEPAGE_775 is not set 679# CONFIG_NLS_CODEPAGE_775 is not set
758# CONFIG_NLS_CODEPAGE_850 is not set 680CONFIG_NLS_CODEPAGE_850=y
759# CONFIG_NLS_CODEPAGE_852 is not set 681# CONFIG_NLS_CODEPAGE_852 is not set
760# CONFIG_NLS_CODEPAGE_855 is not set 682# CONFIG_NLS_CODEPAGE_855 is not set
761# CONFIG_NLS_CODEPAGE_857 is not set 683# CONFIG_NLS_CODEPAGE_857 is not set
@@ -799,34 +721,73 @@ CONFIG_NLS_DEFAULT="iso8859-1"
799# 721#
800# Kernel hacking 722# Kernel hacking
801# 723#
724CONFIG_TRACE_IRQFLAGS_SUPPORT=y
802# CONFIG_PRINTK_TIME is not set 725# CONFIG_PRINTK_TIME is not set
803CONFIG_ENABLE_MUST_CHECK=y 726CONFIG_ENABLE_MUST_CHECK=y
804# CONFIG_MAGIC_SYSRQ is not set 727# CONFIG_MAGIC_SYSRQ is not set
805# CONFIG_UNUSED_SYMBOLS is not set 728# CONFIG_UNUSED_SYMBOLS is not set
729# CONFIG_DEBUG_FS is not set
730# CONFIG_HEADERS_CHECK is not set
806# CONFIG_DEBUG_KERNEL is not set 731# CONFIG_DEBUG_KERNEL is not set
807CONFIG_LOG_BUF_SHIFT=14
808# CONFIG_DEBUG_BUGVERBOSE is not set 732# CONFIG_DEBUG_BUGVERBOSE is not set
809# CONFIG_DEBUG_FS is not set
810# CONFIG_UNWIND_INFO is not set
811# CONFIG_SH_STANDARD_BIOS is not set 733# CONFIG_SH_STANDARD_BIOS is not set
812# CONFIG_KGDB is not set 734# CONFIG_EARLY_SCIF_CONSOLE is not set
735# CONFIG_SH_KGDB is not set
813 736
814# 737#
815# Security options 738# Security options
816# 739#
817# CONFIG_KEYS is not set 740# CONFIG_KEYS is not set
818# CONFIG_SECURITY is not set 741# CONFIG_SECURITY is not set
819 742CONFIG_CRYPTO=y
820# 743CONFIG_CRYPTO_ALGAPI=y
821# Cryptographic options 744CONFIG_CRYPTO_BLKCIPHER=y
822# 745CONFIG_CRYPTO_MANAGER=y
823# CONFIG_CRYPTO is not set 746# CONFIG_CRYPTO_HMAC is not set
747# CONFIG_CRYPTO_XCBC is not set
748# CONFIG_CRYPTO_NULL is not set
749# CONFIG_CRYPTO_MD4 is not set
750CONFIG_CRYPTO_MD5=y
751# CONFIG_CRYPTO_SHA1 is not set
752# CONFIG_CRYPTO_SHA256 is not set
753# CONFIG_CRYPTO_SHA512 is not set
754# CONFIG_CRYPTO_WP512 is not set
755# CONFIG_CRYPTO_TGR192 is not set
756# CONFIG_CRYPTO_GF128MUL is not set
757CONFIG_CRYPTO_ECB=y
758CONFIG_CRYPTO_CBC=y
759CONFIG_CRYPTO_PCBC=y
760# CONFIG_CRYPTO_LRW is not set
761# CONFIG_CRYPTO_CRYPTD is not set
762# CONFIG_CRYPTO_DES is not set
763# CONFIG_CRYPTO_FCRYPT is not set
764# CONFIG_CRYPTO_BLOWFISH is not set
765# CONFIG_CRYPTO_TWOFISH is not set
766# CONFIG_CRYPTO_SERPENT is not set
767# CONFIG_CRYPTO_AES is not set
768# CONFIG_CRYPTO_CAST5 is not set
769# CONFIG_CRYPTO_CAST6 is not set
770# CONFIG_CRYPTO_TEA is not set
771# CONFIG_CRYPTO_ARC4 is not set
772# CONFIG_CRYPTO_KHAZAD is not set
773# CONFIG_CRYPTO_ANUBIS is not set
774# CONFIG_CRYPTO_DEFLATE is not set
775# CONFIG_CRYPTO_MICHAEL_MIC is not set
776# CONFIG_CRYPTO_CRC32C is not set
777# CONFIG_CRYPTO_CAMELLIA is not set
778# CONFIG_CRYPTO_HW is not set
824 779
825# 780#
826# Library routines 781# Library routines
827# 782#
783CONFIG_BITREVERSE=y
828# CONFIG_CRC_CCITT is not set 784# CONFIG_CRC_CCITT is not set
829# CONFIG_CRC16 is not set 785CONFIG_CRC16=y
786# CONFIG_CRC_ITU_T is not set
830CONFIG_CRC32=y 787CONFIG_CRC32=y
788# CONFIG_CRC7 is not set
831# CONFIG_LIBCRC32C is not set 789# CONFIG_LIBCRC32C is not set
832CONFIG_PLIST=y 790CONFIG_PLIST=y
791CONFIG_HAS_IOMEM=y
792CONFIG_HAS_IOPORT=y
793CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/magicpanelr2_defconfig b/arch/sh/configs/magicpanelr2_defconfig
new file mode 100644
index 000000000000..f8398a5f10ee
--- /dev/null
+++ b/arch/sh/configs/magicpanelr2_defconfig
@@ -0,0 +1,925 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc2
4# Fri Aug 17 12:15:16 2007
5#
6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_BUG=y
9CONFIG_GENERIC_FIND_NEXT_BIT=y
10CONFIG_GENERIC_HWEIGHT=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_TIME=y
15CONFIG_GENERIC_CLOCKEVENTS=y
16CONFIG_STACKTRACE_SUPPORT=y
17CONFIG_LOCKDEP_SUPPORT=y
18# CONFIG_ARCH_HAS_ILOG2_U32 is not set
19# CONFIG_ARCH_HAS_ILOG2_U64 is not set
20CONFIG_ARCH_NO_VIRT_TO_BUS=y
21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
22
23#
24# General setup
25#
26CONFIG_EXPERIMENTAL=y
27CONFIG_BROKEN_ON_SMP=y
28CONFIG_INIT_ENV_ARG_LIMIT=32
29CONFIG_LOCALVERSION=""
30# CONFIG_LOCALVERSION_AUTO is not set
31CONFIG_SWAP=y
32CONFIG_SYSVIPC=y
33CONFIG_SYSVIPC_SYSCTL=y
34CONFIG_POSIX_MQUEUE=y
35CONFIG_BSD_PROCESS_ACCT=y
36CONFIG_BSD_PROCESS_ACCT_V3=y
37# CONFIG_TASKSTATS is not set
38# CONFIG_USER_NS is not set
39CONFIG_AUDIT=y
40# CONFIG_IKCONFIG is not set
41CONFIG_LOG_BUF_SHIFT=17
42CONFIG_SYSFS_DEPRECATED=y
43CONFIG_RELAY=y
44CONFIG_BLK_DEV_INITRD=y
45CONFIG_INITRAMFS_SOURCE=""
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SYSCTL=y
48CONFIG_EMBEDDED=y
49CONFIG_UID16=y
50CONFIG_SYSCTL_SYSCALL=y
51CONFIG_KALLSYMS=y
52CONFIG_KALLSYMS_ALL=y
53# CONFIG_KALLSYMS_EXTRA_PASS is not set
54CONFIG_HOTPLUG=y
55CONFIG_PRINTK=y
56CONFIG_BUG=y
57CONFIG_ELF_CORE=y
58CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y
60CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y
65CONFIG_SHMEM=y
66CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y
68# CONFIG_SLUB is not set
69# CONFIG_SLOB is not set
70CONFIG_RT_MUTEXES=y
71# CONFIG_TINY_SHMEM is not set
72CONFIG_BASE_SMALL=0
73CONFIG_MODULES=y
74CONFIG_MODULE_UNLOAD=y
75# CONFIG_MODULE_FORCE_UNLOAD is not set
76CONFIG_MODVERSIONS=y
77CONFIG_MODULE_SRCVERSION_ALL=y
78CONFIG_KMOD=y
79CONFIG_BLOCK=y
80# CONFIG_LBD is not set
81# CONFIG_BLK_DEV_IO_TRACE is not set
82# CONFIG_LSF is not set
83# CONFIG_BLK_DEV_BSG is not set
84
85#
86# IO Schedulers
87#
88CONFIG_IOSCHED_NOOP=y
89# CONFIG_IOSCHED_AS is not set
90# CONFIG_IOSCHED_DEADLINE is not set
91# CONFIG_IOSCHED_CFQ is not set
92# CONFIG_DEFAULT_AS is not set
93# CONFIG_DEFAULT_DEADLINE is not set
94# CONFIG_DEFAULT_CFQ is not set
95CONFIG_DEFAULT_NOOP=y
96CONFIG_DEFAULT_IOSCHED="noop"
97
98#
99# System type
100#
101CONFIG_CPU_SH3=y
102# CONFIG_CPU_SUBTYPE_SH7619 is not set
103# CONFIG_CPU_SUBTYPE_SH7206 is not set
104# CONFIG_CPU_SUBTYPE_SH7705 is not set
105# CONFIG_CPU_SUBTYPE_SH7706 is not set
106# CONFIG_CPU_SUBTYPE_SH7707 is not set
107# CONFIG_CPU_SUBTYPE_SH7708 is not set
108# CONFIG_CPU_SUBTYPE_SH7709 is not set
109# CONFIG_CPU_SUBTYPE_SH7710 is not set
110# CONFIG_CPU_SUBTYPE_SH7712 is not set
111CONFIG_CPU_SUBTYPE_SH7720=y
112# CONFIG_CPU_SUBTYPE_SH7750 is not set
113# CONFIG_CPU_SUBTYPE_SH7091 is not set
114# CONFIG_CPU_SUBTYPE_SH7750R is not set
115# CONFIG_CPU_SUBTYPE_SH7750S is not set
116# CONFIG_CPU_SUBTYPE_SH7751 is not set
117# CONFIG_CPU_SUBTYPE_SH7751R is not set
118# CONFIG_CPU_SUBTYPE_SH7760 is not set
119# CONFIG_CPU_SUBTYPE_SH4_202 is not set
120# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
121# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
122# CONFIG_CPU_SUBTYPE_SH7770 is not set
123# CONFIG_CPU_SUBTYPE_SH7780 is not set
124# CONFIG_CPU_SUBTYPE_SH7785 is not set
125# CONFIG_CPU_SUBTYPE_SHX3 is not set
126# CONFIG_CPU_SUBTYPE_SH7343 is not set
127# CONFIG_CPU_SUBTYPE_SH7722 is not set
128
129#
130# Memory management options
131#
132CONFIG_QUICKLIST=y
133CONFIG_MMU=y
134CONFIG_PAGE_OFFSET=0x80000000
135CONFIG_MEMORY_START=0x0C000000
136CONFIG_MEMORY_SIZE=0x03F00000
137CONFIG_VSYSCALL=y
138CONFIG_ARCH_FLATMEM_ENABLE=y
139CONFIG_ARCH_SPARSEMEM_ENABLE=y
140CONFIG_ARCH_SPARSEMEM_DEFAULT=y
141CONFIG_MAX_ACTIVE_REGIONS=1
142CONFIG_ARCH_POPULATES_NODE_MAP=y
143CONFIG_ARCH_SELECT_MEMORY_MODEL=y
144CONFIG_PAGE_SIZE_4KB=y
145# CONFIG_PAGE_SIZE_8KB is not set
146# CONFIG_PAGE_SIZE_64KB is not set
147CONFIG_SELECT_MEMORY_MODEL=y
148CONFIG_FLATMEM_MANUAL=y
149# CONFIG_DISCONTIGMEM_MANUAL is not set
150# CONFIG_SPARSEMEM_MANUAL is not set
151CONFIG_FLATMEM=y
152CONFIG_FLAT_NODE_MEM_MAP=y
153CONFIG_SPARSEMEM_STATIC=y
154CONFIG_SPLIT_PTLOCK_CPUS=4
155# CONFIG_RESOURCES_64BIT is not set
156CONFIG_ZONE_DMA_FLAG=0
157CONFIG_NR_QUICK=2
158
159#
160# Cache configuration
161#
162# CONFIG_SH_DIRECT_MAPPED is not set
163CONFIG_CACHE_WRITEBACK=y
164# CONFIG_CACHE_WRITETHROUGH is not set
165# CONFIG_CACHE_OFF is not set
166
167#
168# Processor features
169#
170CONFIG_CPU_LITTLE_ENDIAN=y
171# CONFIG_CPU_BIG_ENDIAN is not set
172# CONFIG_SH_FPU_EMU is not set
173CONFIG_SH_DSP=y
174CONFIG_SH_ADC=y
175CONFIG_CPU_HAS_INTEVT=y
176CONFIG_CPU_HAS_INTC_IRQ=y
177CONFIG_CPU_HAS_SR_RB=y
178CONFIG_CPU_HAS_DSP=y
179
180#
181# Board support
182#
183CONFIG_SH_MAGIC_PANEL_R2=y
184
185#
186# Magic Panel R2 options
187#
188CONFIG_SH_MAGIC_PANEL_R2_VERSION=3
189
190#
191# Timer and clock configuration
192#
193CONFIG_SH_TMU=y
194CONFIG_SH_TIMER_IRQ=16
195CONFIG_SH_PCLK_FREQ=24000000
196# CONFIG_TICK_ONESHOT is not set
197# CONFIG_NO_HZ is not set
198# CONFIG_HIGH_RES_TIMERS is not set
199
200#
201# CPU Frequency scaling
202#
203# CONFIG_CPU_FREQ is not set
204
205#
206# DMA support
207#
208CONFIG_SH_DMA_API=y
209CONFIG_SH_DMA=y
210CONFIG_NR_ONCHIP_DMA_CHANNELS=6
211# CONFIG_NR_DMA_CHANNELS_BOOL is not set
212
213#
214# Companion Chips
215#
216
217#
218# Additional SuperH Device Drivers
219#
220CONFIG_HEARTBEAT=y
221# CONFIG_PUSH_SWITCH is not set
222
223#
224# Kernel features
225#
226# CONFIG_HZ_100 is not set
227CONFIG_HZ_250=y
228# CONFIG_HZ_300 is not set
229# CONFIG_HZ_1000 is not set
230CONFIG_HZ=250
231# CONFIG_KEXEC is not set
232# CONFIG_CRASH_DUMP is not set
233CONFIG_PREEMPT_NONE=y
234# CONFIG_PREEMPT_VOLUNTARY is not set
235# CONFIG_PREEMPT is not set
236
237#
238# Boot options
239#
240CONFIG_ZERO_PAGE_OFFSET=0x00001000
241CONFIG_BOOT_LINK_OFFSET=0x00800000
242# CONFIG_CMDLINE_BOOL is not set
243
244#
245# Bus options
246#
247# CONFIG_ARCH_SUPPORTS_MSI is not set
248
249#
250# PCCARD (PCMCIA/CardBus) support
251#
252# CONFIG_PCCARD is not set
253
254#
255# Executable file formats
256#
257CONFIG_BINFMT_ELF=y
258# CONFIG_BINFMT_MISC is not set
259
260#
261# Networking
262#
263CONFIG_NET=y
264
265#
266# Networking options
267#
268CONFIG_PACKET=y
269CONFIG_PACKET_MMAP=y
270CONFIG_UNIX=y
271# CONFIG_NET_KEY is not set
272CONFIG_INET=y
273# CONFIG_IP_MULTICAST is not set
274# CONFIG_IP_ADVANCED_ROUTER is not set
275CONFIG_IP_FIB_HASH=y
276CONFIG_IP_PNP=y
277CONFIG_IP_PNP_DHCP=y
278# CONFIG_IP_PNP_BOOTP is not set
279# CONFIG_IP_PNP_RARP is not set
280# CONFIG_NET_IPIP is not set
281# CONFIG_NET_IPGRE is not set
282# CONFIG_ARPD is not set
283# CONFIG_SYN_COOKIES is not set
284# CONFIG_INET_AH is not set
285# CONFIG_INET_ESP is not set
286# CONFIG_INET_IPCOMP is not set
287# CONFIG_INET_XFRM_TUNNEL is not set
288# CONFIG_INET_TUNNEL is not set
289# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
290# CONFIG_INET_XFRM_MODE_TUNNEL is not set
291# CONFIG_INET_XFRM_MODE_BEET is not set
292CONFIG_INET_DIAG=y
293CONFIG_INET_TCP_DIAG=y
294# CONFIG_TCP_CONG_ADVANCED is not set
295CONFIG_TCP_CONG_CUBIC=y
296CONFIG_DEFAULT_TCP_CONG="cubic"
297# CONFIG_TCP_MD5SIG is not set
298# CONFIG_IPV6 is not set
299# CONFIG_INET6_XFRM_TUNNEL is not set
300# CONFIG_INET6_TUNNEL is not set
301# CONFIG_NETWORK_SECMARK is not set
302# CONFIG_NETFILTER is not set
303# CONFIG_IP_DCCP is not set
304# CONFIG_IP_SCTP is not set
305# CONFIG_TIPC is not set
306# CONFIG_ATM is not set
307# CONFIG_BRIDGE is not set
308# CONFIG_VLAN_8021Q is not set
309# CONFIG_DECNET is not set
310# CONFIG_LLC2 is not set
311# CONFIG_IPX is not set
312# CONFIG_ATALK is not set
313# CONFIG_X25 is not set
314# CONFIG_LAPB is not set
315# CONFIG_ECONET is not set
316# CONFIG_WAN_ROUTER is not set
317
318#
319# QoS and/or fair queueing
320#
321# CONFIG_NET_SCHED is not set
322
323#
324# Network testing
325#
326# CONFIG_NET_PKTGEN is not set
327# CONFIG_HAMRADIO is not set
328# CONFIG_IRDA is not set
329# CONFIG_BT is not set
330# CONFIG_AF_RXRPC is not set
331
332#
333# Wireless
334#
335# CONFIG_CFG80211 is not set
336# CONFIG_WIRELESS_EXT is not set
337# CONFIG_MAC80211 is not set
338# CONFIG_IEEE80211 is not set
339# CONFIG_RFKILL is not set
340# CONFIG_NET_9P is not set
341
342#
343# Device Drivers
344#
345
346#
347# Generic Driver Options
348#
349# CONFIG_STANDALONE is not set
350# CONFIG_PREVENT_FIRMWARE_BUILD is not set
351CONFIG_FW_LOADER=y
352# CONFIG_DEBUG_DRIVER is not set
353# CONFIG_DEBUG_DEVRES is not set
354# CONFIG_SYS_HYPERVISOR is not set
355# CONFIG_CONNECTOR is not set
356CONFIG_MTD=y
357# CONFIG_MTD_DEBUG is not set
358# CONFIG_MTD_CONCAT is not set
359CONFIG_MTD_PARTITIONS=y
360CONFIG_MTD_REDBOOT_PARTS=y
361CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
362# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
363# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
364CONFIG_MTD_CMDLINE_PARTS=y
365
366#
367# User Modules And Translation Layers
368#
369CONFIG_MTD_CHAR=y
370CONFIG_MTD_BLKDEVS=y
371CONFIG_MTD_BLOCK=y
372# CONFIG_FTL is not set
373# CONFIG_NFTL is not set
374# CONFIG_INFTL is not set
375# CONFIG_RFD_FTL is not set
376# CONFIG_SSFDC is not set
377
378#
379# RAM/ROM/Flash chip drivers
380#
381CONFIG_MTD_CFI=y
382# CONFIG_MTD_JEDECPROBE is not set
383CONFIG_MTD_GEN_PROBE=y
384# CONFIG_MTD_CFI_ADV_OPTIONS is not set
385CONFIG_MTD_MAP_BANK_WIDTH_1=y
386CONFIG_MTD_MAP_BANK_WIDTH_2=y
387CONFIG_MTD_MAP_BANK_WIDTH_4=y
388# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
389# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
390# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
391CONFIG_MTD_CFI_I1=y
392CONFIG_MTD_CFI_I2=y
393# CONFIG_MTD_CFI_I4 is not set
394# CONFIG_MTD_CFI_I8 is not set
395# CONFIG_MTD_CFI_INTELEXT is not set
396CONFIG_MTD_CFI_AMDSTD=y
397# CONFIG_MTD_CFI_STAA is not set
398CONFIG_MTD_CFI_UTIL=y
399# CONFIG_MTD_RAM is not set
400# CONFIG_MTD_ROM is not set
401# CONFIG_MTD_ABSENT is not set
402
403#
404# Mapping drivers for chip access
405#
406# CONFIG_MTD_COMPLEX_MAPPINGS is not set
407CONFIG_MTD_PHYSMAP=y
408CONFIG_MTD_PHYSMAP_START=0x0000000
409CONFIG_MTD_PHYSMAP_LEN=0
410CONFIG_MTD_PHYSMAP_BANKWIDTH=0
411# CONFIG_MTD_SOLUTIONENGINE is not set
412# CONFIG_MTD_PLATRAM is not set
413
414#
415# Self-contained MTD device drivers
416#
417# CONFIG_MTD_SLRAM is not set
418# CONFIG_MTD_PHRAM is not set
419# CONFIG_MTD_MTDRAM is not set
420# CONFIG_MTD_BLOCK2MTD is not set
421
422#
423# Disk-On-Chip Device Drivers
424#
425# CONFIG_MTD_DOC2000 is not set
426# CONFIG_MTD_DOC2001 is not set
427# CONFIG_MTD_DOC2001PLUS is not set
428# CONFIG_MTD_NAND is not set
429# CONFIG_MTD_ONENAND is not set
430
431#
432# UBI - Unsorted block images
433#
434# CONFIG_MTD_UBI is not set
435# CONFIG_PARPORT is not set
436CONFIG_BLK_DEV=y
437# CONFIG_BLK_DEV_COW_COMMON is not set
438# CONFIG_BLK_DEV_LOOP is not set
439# CONFIG_BLK_DEV_NBD is not set
440CONFIG_BLK_DEV_RAM=y
441CONFIG_BLK_DEV_RAM_COUNT=16
442CONFIG_BLK_DEV_RAM_SIZE=65536
443CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
444# CONFIG_CDROM_PKTCDVD is not set
445# CONFIG_ATA_OVER_ETH is not set
446CONFIG_MISC_DEVICES=y
447# CONFIG_EEPROM_93CX6 is not set
448# CONFIG_IDE is not set
449
450#
451# SCSI device support
452#
453# CONFIG_RAID_ATTRS is not set
454# CONFIG_SCSI is not set
455# CONFIG_SCSI_DMA is not set
456# CONFIG_SCSI_NETLINK is not set
457# CONFIG_ATA is not set
458# CONFIG_MD is not set
459CONFIG_NETDEVICES=y
460# CONFIG_NETDEVICES_MULTIQUEUE is not set
461# CONFIG_DUMMY is not set
462# CONFIG_BONDING is not set
463# CONFIG_MACVLAN is not set
464# CONFIG_EQUALIZER is not set
465# CONFIG_TUN is not set
466# CONFIG_PHYLIB is not set
467CONFIG_NET_ETHERNET=y
468CONFIG_MII=y
469# CONFIG_STNIC is not set
470# CONFIG_SMC91X is not set
471CONFIG_SMC911X=y
472# CONFIG_NETDEV_1000 is not set
473# CONFIG_NETDEV_10000 is not set
474
475#
476# Wireless LAN
477#
478# CONFIG_WLAN_PRE80211 is not set
479# CONFIG_WLAN_80211 is not set
480# CONFIG_WAN is not set
481# CONFIG_PPP is not set
482# CONFIG_SLIP is not set
483# CONFIG_SHAPER is not set
484# CONFIG_NETCONSOLE is not set
485# CONFIG_NETPOLL is not set
486# CONFIG_NET_POLL_CONTROLLER is not set
487# CONFIG_ISDN is not set
488# CONFIG_PHONE is not set
489
490#
491# Input device support
492#
493CONFIG_INPUT=y
494# CONFIG_INPUT_FF_MEMLESS is not set
495# CONFIG_INPUT_POLLDEV is not set
496
497#
498# Userland interfaces
499#
500CONFIG_INPUT_MOUSEDEV=y
501CONFIG_INPUT_MOUSEDEV_PSAUX=y
502CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
503CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
504# CONFIG_INPUT_JOYDEV is not set
505# CONFIG_INPUT_TSDEV is not set
506CONFIG_INPUT_EVDEV=y
507# CONFIG_INPUT_EVBUG is not set
508
509#
510# Input Device Drivers
511#
512CONFIG_INPUT_KEYBOARD=y
513CONFIG_KEYBOARD_ATKBD=y
514# CONFIG_KEYBOARD_SUNKBD is not set
515# CONFIG_KEYBOARD_LKKBD is not set
516# CONFIG_KEYBOARD_XTKBD is not set
517# CONFIG_KEYBOARD_NEWTON is not set
518# CONFIG_KEYBOARD_STOWAWAY is not set
519CONFIG_INPUT_MOUSE=y
520# CONFIG_MOUSE_PS2 is not set
521# CONFIG_MOUSE_SERIAL is not set
522# CONFIG_MOUSE_VSXXXAA is not set
523# CONFIG_INPUT_JOYSTICK is not set
524# CONFIG_INPUT_TABLET is not set
525# CONFIG_INPUT_TOUCHSCREEN is not set
526# CONFIG_INPUT_MISC is not set
527
528#
529# Hardware I/O ports
530#
531CONFIG_SERIO=y
532# CONFIG_SERIO_I8042 is not set
533CONFIG_SERIO_SERPORT=y
534CONFIG_SERIO_LIBPS2=y
535# CONFIG_SERIO_RAW is not set
536# CONFIG_GAMEPORT is not set
537
538#
539# Character devices
540#
541CONFIG_VT=y
542CONFIG_VT_CONSOLE=y
543CONFIG_HW_CONSOLE=y
544# CONFIG_VT_HW_CONSOLE_BINDING is not set
545# CONFIG_SERIAL_NONSTANDARD is not set
546
547#
548# Serial drivers
549#
550CONFIG_SERIAL_8250=y
551CONFIG_SERIAL_8250_CONSOLE=y
552CONFIG_SERIAL_8250_NR_UARTS=48
553CONFIG_SERIAL_8250_RUNTIME_UARTS=4
554CONFIG_SERIAL_8250_EXTENDED=y
555# CONFIG_SERIAL_8250_MANY_PORTS is not set
556CONFIG_SERIAL_8250_SHARE_IRQ=y
557# CONFIG_SERIAL_8250_DETECT_IRQ is not set
558# CONFIG_SERIAL_8250_RSA is not set
559
560#
561# Non-8250 serial port support
562#
563CONFIG_SERIAL_SH_SCI=y
564CONFIG_SERIAL_SH_SCI_NR_UARTS=2
565CONFIG_SERIAL_SH_SCI_CONSOLE=y
566CONFIG_SERIAL_CORE=y
567CONFIG_SERIAL_CORE_CONSOLE=y
568CONFIG_UNIX98_PTYS=y
569CONFIG_LEGACY_PTYS=y
570CONFIG_LEGACY_PTY_COUNT=256
571# CONFIG_IPMI_HANDLER is not set
572# CONFIG_WATCHDOG is not set
573# CONFIG_HW_RANDOM is not set
574# CONFIG_R3964 is not set
575# CONFIG_RAW_DRIVER is not set
576# CONFIG_TCG_TPM is not set
577# CONFIG_I2C is not set
578
579#
580# SPI support
581#
582# CONFIG_SPI is not set
583# CONFIG_SPI_MASTER is not set
584# CONFIG_W1 is not set
585# CONFIG_POWER_SUPPLY is not set
586# CONFIG_HWMON is not set
587
588#
589# Multifunction device drivers
590#
591# CONFIG_MFD_SM501 is not set
592
593#
594# Multimedia devices
595#
596# CONFIG_VIDEO_DEV is not set
597# CONFIG_DVB_CORE is not set
598CONFIG_DAB=y
599
600#
601# Graphics support
602#
603# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
604
605#
606# Display device support
607#
608# CONFIG_DISPLAY_SUPPORT is not set
609# CONFIG_VGASTATE is not set
610# CONFIG_VIDEO_OUTPUT_CONTROL is not set
611# CONFIG_FB is not set
612
613#
614# Console display driver support
615#
616CONFIG_DUMMY_CONSOLE=y
617
618#
619# Sound
620#
621# CONFIG_SOUND is not set
622# CONFIG_HID_SUPPORT is not set
623# CONFIG_USB_SUPPORT is not set
624# CONFIG_MMC is not set
625# CONFIG_NEW_LEDS is not set
626CONFIG_RTC_LIB=y
627CONFIG_RTC_CLASS=y
628# CONFIG_RTC_HCTOSYS is not set
629# CONFIG_RTC_DEBUG is not set
630
631#
632# RTC interfaces
633#
634CONFIG_RTC_INTF_SYSFS=y
635CONFIG_RTC_INTF_PROC=y
636CONFIG_RTC_INTF_DEV=y
637# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
638# CONFIG_RTC_DRV_TEST is not set
639
640#
641# SPI RTC drivers
642#
643
644#
645# Platform RTC drivers
646#
647# CONFIG_RTC_DRV_DS1553 is not set
648# CONFIG_RTC_DRV_STK17TA8 is not set
649# CONFIG_RTC_DRV_DS1742 is not set
650# CONFIG_RTC_DRV_M48T86 is not set
651# CONFIG_RTC_DRV_M48T59 is not set
652# CONFIG_RTC_DRV_V3020 is not set
653
654#
655# on-CPU RTC drivers
656#
657CONFIG_RTC_DRV_SH=y
658
659#
660# DMA Engine support
661#
662# CONFIG_DMA_ENGINE is not set
663
664#
665# DMA Clients
666#
667
668#
669# DMA Devices
670#
671
672#
673# Userspace I/O
674#
675# CONFIG_UIO is not set
676
677#
678# File systems
679#
680CONFIG_EXT2_FS=y
681# CONFIG_EXT2_FS_XATTR is not set
682# CONFIG_EXT2_FS_XIP is not set
683CONFIG_EXT3_FS=y
684# CONFIG_EXT3_FS_XATTR is not set
685# CONFIG_EXT4DEV_FS is not set
686CONFIG_JBD=y
687# CONFIG_JBD_DEBUG is not set
688# CONFIG_REISERFS_FS is not set
689# CONFIG_JFS_FS is not set
690# CONFIG_FS_POSIX_ACL is not set
691# CONFIG_XFS_FS is not set
692# CONFIG_GFS2_FS is not set
693# CONFIG_OCFS2_FS is not set
694# CONFIG_MINIX_FS is not set
695# CONFIG_ROMFS_FS is not set
696# CONFIG_INOTIFY is not set
697# CONFIG_QUOTA is not set
698# CONFIG_DNOTIFY is not set
699# CONFIG_AUTOFS_FS is not set
700# CONFIG_AUTOFS4_FS is not set
701# CONFIG_FUSE_FS is not set
702
703#
704# CD-ROM/DVD Filesystems
705#
706# CONFIG_ISO9660_FS is not set
707# CONFIG_UDF_FS is not set
708
709#
710# DOS/FAT/NT Filesystems
711#
712# CONFIG_MSDOS_FS is not set
713# CONFIG_VFAT_FS is not set
714# CONFIG_NTFS_FS is not set
715
716#
717# Pseudo filesystems
718#
719CONFIG_PROC_FS=y
720CONFIG_PROC_KCORE=y
721CONFIG_PROC_SYSCTL=y
722CONFIG_SYSFS=y
723CONFIG_TMPFS=y
724# CONFIG_TMPFS_POSIX_ACL is not set
725# CONFIG_HUGETLBFS is not set
726# CONFIG_HUGETLB_PAGE is not set
727CONFIG_RAMFS=y
728# CONFIG_CONFIGFS_FS is not set
729
730#
731# Miscellaneous filesystems
732#
733# CONFIG_ADFS_FS is not set
734# CONFIG_AFFS_FS is not set
735# CONFIG_HFS_FS is not set
736# CONFIG_HFSPLUS_FS is not set
737# CONFIG_BEFS_FS is not set
738# CONFIG_BFS_FS is not set
739# CONFIG_EFS_FS is not set
740CONFIG_JFFS2_FS=y
741CONFIG_JFFS2_FS_DEBUG=0
742# CONFIG_JFFS2_FS_WRITEBUFFER is not set
743# CONFIG_JFFS2_SUMMARY is not set
744# CONFIG_JFFS2_FS_XATTR is not set
745# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
746CONFIG_JFFS2_ZLIB=y
747CONFIG_JFFS2_RTIME=y
748# CONFIG_JFFS2_RUBIN is not set
749# CONFIG_CRAMFS is not set
750# CONFIG_VXFS_FS is not set
751# CONFIG_HPFS_FS is not set
752# CONFIG_QNX4FS_FS is not set
753# CONFIG_SYSV_FS is not set
754# CONFIG_UFS_FS is not set
755
756#
757# Network File Systems
758#
759CONFIG_NFS_FS=y
760CONFIG_NFS_V3=y
761# CONFIG_NFS_V3_ACL is not set
762# CONFIG_NFS_V4 is not set
763# CONFIG_NFS_DIRECTIO is not set
764# CONFIG_NFSD is not set
765CONFIG_ROOT_NFS=y
766CONFIG_LOCKD=y
767CONFIG_LOCKD_V4=y
768CONFIG_NFS_COMMON=y
769CONFIG_SUNRPC=y
770CONFIG_SUNRPC_BIND34=y
771# CONFIG_RPCSEC_GSS_KRB5 is not set
772# CONFIG_RPCSEC_GSS_SPKM3 is not set
773# CONFIG_SMB_FS is not set
774# CONFIG_CIFS is not set
775# CONFIG_NCP_FS is not set
776# CONFIG_CODA_FS is not set
777# CONFIG_AFS_FS is not set
778
779#
780# Partition Types
781#
782# CONFIG_PARTITION_ADVANCED is not set
783CONFIG_MSDOS_PARTITION=y
784
785#
786# Native Language Support
787#
788CONFIG_NLS=y
789CONFIG_NLS_DEFAULT="cp437"
790CONFIG_NLS_CODEPAGE_437=y
791# CONFIG_NLS_CODEPAGE_737 is not set
792# CONFIG_NLS_CODEPAGE_775 is not set
793CONFIG_NLS_CODEPAGE_850=y
794# CONFIG_NLS_CODEPAGE_852 is not set
795# CONFIG_NLS_CODEPAGE_855 is not set
796# CONFIG_NLS_CODEPAGE_857 is not set
797# CONFIG_NLS_CODEPAGE_860 is not set
798# CONFIG_NLS_CODEPAGE_861 is not set
799# CONFIG_NLS_CODEPAGE_862 is not set
800# CONFIG_NLS_CODEPAGE_863 is not set
801# CONFIG_NLS_CODEPAGE_864 is not set
802# CONFIG_NLS_CODEPAGE_865 is not set
803# CONFIG_NLS_CODEPAGE_866 is not set
804# CONFIG_NLS_CODEPAGE_869 is not set
805# CONFIG_NLS_CODEPAGE_936 is not set
806# CONFIG_NLS_CODEPAGE_950 is not set
807# CONFIG_NLS_CODEPAGE_932 is not set
808# CONFIG_NLS_CODEPAGE_949 is not set
809# CONFIG_NLS_CODEPAGE_874 is not set
810# CONFIG_NLS_ISO8859_8 is not set
811# CONFIG_NLS_CODEPAGE_1250 is not set
812# CONFIG_NLS_CODEPAGE_1251 is not set
813# CONFIG_NLS_ASCII is not set
814CONFIG_NLS_ISO8859_1=y
815# CONFIG_NLS_ISO8859_2 is not set
816# CONFIG_NLS_ISO8859_3 is not set
817# CONFIG_NLS_ISO8859_4 is not set
818# CONFIG_NLS_ISO8859_5 is not set
819# CONFIG_NLS_ISO8859_6 is not set
820# CONFIG_NLS_ISO8859_7 is not set
821# CONFIG_NLS_ISO8859_9 is not set
822# CONFIG_NLS_ISO8859_13 is not set
823# CONFIG_NLS_ISO8859_14 is not set
824# CONFIG_NLS_ISO8859_15 is not set
825# CONFIG_NLS_KOI8_R is not set
826# CONFIG_NLS_KOI8_U is not set
827# CONFIG_NLS_UTF8 is not set
828
829#
830# Distributed Lock Manager
831#
832# CONFIG_DLM is not set
833
834#
835# Profiling support
836#
837# CONFIG_PROFILING is not set
838
839#
840# Kernel hacking
841#
842CONFIG_TRACE_IRQFLAGS_SUPPORT=y
843# CONFIG_PRINTK_TIME is not set
844CONFIG_ENABLE_MUST_CHECK=y
845CONFIG_MAGIC_SYSRQ=y
846# CONFIG_UNUSED_SYMBOLS is not set
847# CONFIG_DEBUG_FS is not set
848# CONFIG_HEADERS_CHECK is not set
849CONFIG_DEBUG_KERNEL=y
850# CONFIG_DEBUG_SHIRQ is not set
851# CONFIG_DETECT_SOFTLOCKUP is not set
852# CONFIG_SCHED_DEBUG is not set
853# CONFIG_SCHEDSTATS is not set
854# CONFIG_TIMER_STATS is not set
855# CONFIG_DEBUG_SLAB is not set
856# CONFIG_DEBUG_RT_MUTEXES is not set
857# CONFIG_RT_MUTEX_TESTER is not set
858# CONFIG_DEBUG_SPINLOCK is not set
859# CONFIG_DEBUG_MUTEXES is not set
860# CONFIG_DEBUG_LOCK_ALLOC is not set
861# CONFIG_PROVE_LOCKING is not set
862# CONFIG_LOCK_STAT is not set
863# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
864# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
865CONFIG_DEBUG_KOBJECT=y
866CONFIG_DEBUG_BUGVERBOSE=y
867CONFIG_DEBUG_INFO=y
868# CONFIG_DEBUG_VM is not set
869# CONFIG_DEBUG_LIST is not set
870CONFIG_FRAME_POINTER=y
871# CONFIG_FORCED_INLINING is not set
872# CONFIG_RCU_TORTURE_TEST is not set
873# CONFIG_FAULT_INJECTION is not set
874# CONFIG_SH_STANDARD_BIOS is not set
875CONFIG_EARLY_SCIF_CONSOLE=y
876CONFIG_EARLY_SCIF_CONSOLE_PORT=0xa4430000
877CONFIG_EARLY_PRINTK=y
878# CONFIG_DEBUG_BOOTMEM is not set
879# CONFIG_DEBUG_STACKOVERFLOW is not set
880# CONFIG_DEBUG_STACK_USAGE is not set
881# CONFIG_4KSTACKS is not set
882CONFIG_SH_KGDB=y
883
884#
885# KGDB configuration options
886#
887# CONFIG_MORE_COMPILE_OPTIONS is not set
888# CONFIG_KGDB_NMI is not set
889CONFIG_KGDB_SYSRQ=y
890
891#
892# Serial port setup
893#
894CONFIG_KGDB_DEFPORT=0
895CONFIG_KGDB_DEFBAUD=115200
896CONFIG_KGDB_DEFPARITY_N=y
897# CONFIG_KGDB_DEFPARITY_E is not set
898# CONFIG_KGDB_DEFPARITY_O is not set
899CONFIG_KGDB_DEFBITS_8=y
900# CONFIG_KGDB_DEFBITS_7 is not set
901
902#
903# Security options
904#
905# CONFIG_KEYS is not set
906# CONFIG_SECURITY is not set
907# CONFIG_CRYPTO is not set
908
909#
910# Library routines
911#
912CONFIG_BITREVERSE=y
913CONFIG_CRC_CCITT=m
914CONFIG_CRC16=m
915# CONFIG_CRC_ITU_T is not set
916CONFIG_CRC32=y
917# CONFIG_CRC7 is not set
918# CONFIG_LIBCRC32C is not set
919CONFIG_AUDIT_GENERIC=y
920CONFIG_ZLIB_INFLATE=y
921CONFIG_ZLIB_DEFLATE=y
922CONFIG_PLIST=y
923CONFIG_HAS_IOMEM=y
924CONFIG_HAS_IOPORT=y
925CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/rts7751r2d_defconfig b/arch/sh/configs/rts7751r2d1_defconfig
index b64f73b704d6..2dc754e5b733 100644
--- a/arch/sh/configs/rts7751r2d_defconfig
+++ b/arch/sh/configs/rts7751r2d1_defconfig
@@ -1,46 +1,47 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21-rc1 3# Linux kernel version: 2.6.23-rc2
4# Thu Mar 1 16:42:40 2007 4# Tue Aug 14 18:04:44 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_BUG=y
8CONFIG_GENERIC_FIND_NEXT_BIT=y 9CONFIG_GENERIC_FIND_NEXT_BIT=y
9CONFIG_GENERIC_HWEIGHT=y 10CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y 11CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y 12CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y 13CONFIG_GENERIC_CALIBRATE_DELAY=y
13# CONFIG_GENERIC_TIME is not set 14CONFIG_GENERIC_TIME=y
15CONFIG_GENERIC_CLOCKEVENTS=y
16CONFIG_SYS_SUPPORTS_PCI=y
14CONFIG_STACKTRACE_SUPPORT=y 17CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 18CONFIG_LOCKDEP_SUPPORT=y
16# CONFIG_ARCH_HAS_ILOG2_U32 is not set 19# CONFIG_ARCH_HAS_ILOG2_U32 is not set
17# CONFIG_ARCH_HAS_ILOG2_U64 is not set 20# CONFIG_ARCH_HAS_ILOG2_U64 is not set
21CONFIG_ARCH_NO_VIRT_TO_BUS=y
18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
19 23
20# 24#
21# Code maturity level options 25# General setup
22# 26#
23CONFIG_EXPERIMENTAL=y 27CONFIG_EXPERIMENTAL=y
24CONFIG_BROKEN_ON_SMP=y 28CONFIG_BROKEN_ON_SMP=y
25CONFIG_INIT_ENV_ARG_LIMIT=32 29CONFIG_INIT_ENV_ARG_LIMIT=32
26
27#
28# General setup
29#
30CONFIG_LOCALVERSION="" 30CONFIG_LOCALVERSION=""
31CONFIG_LOCALVERSION_AUTO=y 31CONFIG_LOCALVERSION_AUTO=y
32CONFIG_SWAP=y 32CONFIG_SWAP=y
33CONFIG_SYSVIPC=y 33CONFIG_SYSVIPC=y
34# CONFIG_IPC_NS is not set
35CONFIG_SYSVIPC_SYSCTL=y 34CONFIG_SYSVIPC_SYSCTL=y
36# CONFIG_POSIX_MQUEUE is not set 35# CONFIG_POSIX_MQUEUE is not set
37# CONFIG_BSD_PROCESS_ACCT is not set 36# CONFIG_BSD_PROCESS_ACCT is not set
38# CONFIG_TASKSTATS is not set 37# CONFIG_TASKSTATS is not set
39# CONFIG_UTS_NS is not set 38# CONFIG_USER_NS is not set
40# CONFIG_AUDIT is not set 39# CONFIG_AUDIT is not set
41# CONFIG_IKCONFIG is not set 40# CONFIG_IKCONFIG is not set
41CONFIG_LOG_BUF_SHIFT=14
42CONFIG_SYSFS_DEPRECATED=y 42CONFIG_SYSFS_DEPRECATED=y
43# CONFIG_RELAY is not set 43# CONFIG_RELAY is not set
44# CONFIG_BLK_DEV_INITRD is not set
44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
45CONFIG_SYSCTL=y 46CONFIG_SYSCTL=y
46CONFIG_EMBEDDED=y 47CONFIG_EMBEDDED=y
@@ -54,31 +55,29 @@ CONFIG_BUG=y
54CONFIG_ELF_CORE=y 55CONFIG_ELF_CORE=y
55CONFIG_BASE_FULL=y 56CONFIG_BASE_FULL=y
56CONFIG_FUTEX=y 57CONFIG_FUTEX=y
58CONFIG_ANON_INODES=y
57CONFIG_EPOLL=y 59CONFIG_EPOLL=y
60CONFIG_SIGNALFD=y
61CONFIG_TIMERFD=y
62CONFIG_EVENTFD=y
58CONFIG_SHMEM=y 63CONFIG_SHMEM=y
59CONFIG_SLAB=y
60CONFIG_VM_EVENT_COUNTERS=y 64CONFIG_VM_EVENT_COUNTERS=y
65CONFIG_SLAB=y
66# CONFIG_SLUB is not set
67# CONFIG_SLOB is not set
61CONFIG_RT_MUTEXES=y 68CONFIG_RT_MUTEXES=y
62# CONFIG_TINY_SHMEM is not set 69# CONFIG_TINY_SHMEM is not set
63CONFIG_BASE_SMALL=0 70CONFIG_BASE_SMALL=0
64# CONFIG_SLOB is not set
65
66#
67# Loadable module support
68#
69CONFIG_MODULES=y 71CONFIG_MODULES=y
70# CONFIG_MODULE_UNLOAD is not set 72# CONFIG_MODULE_UNLOAD is not set
71# CONFIG_MODVERSIONS is not set 73# CONFIG_MODVERSIONS is not set
72# CONFIG_MODULE_SRCVERSION_ALL is not set 74# CONFIG_MODULE_SRCVERSION_ALL is not set
73# CONFIG_KMOD is not set 75# CONFIG_KMOD is not set
74
75#
76# Block layer
77#
78CONFIG_BLOCK=y 76CONFIG_BLOCK=y
79# CONFIG_LBD is not set 77# CONFIG_LBD is not set
80# CONFIG_BLK_DEV_IO_TRACE is not set 78# CONFIG_BLK_DEV_IO_TRACE is not set
81# CONFIG_LSF is not set 79# CONFIG_LSF is not set
80# CONFIG_BLK_DEV_BSG is not set
82 81
83# 82#
84# IO Schedulers 83# IO Schedulers
@@ -96,61 +95,16 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
96# 95#
97# System type 96# System type
98# 97#
99# CONFIG_SH_SOLUTION_ENGINE is not set
100# CONFIG_SH_7751_SOLUTION_ENGINE is not set
101# CONFIG_SH_7300_SOLUTION_ENGINE is not set
102# CONFIG_SH_7343_SOLUTION_ENGINE is not set
103# CONFIG_SH_73180_SOLUTION_ENGINE is not set
104# CONFIG_SH_7751_SYSTEMH is not set
105# CONFIG_SH_HP6XX is not set
106# CONFIG_SH_SATURN is not set
107# CONFIG_SH_DREAMCAST is not set
108# CONFIG_SH_MPC1211 is not set
109# CONFIG_SH_SH03 is not set
110# CONFIG_SH_SECUREEDGE5410 is not set
111# CONFIG_SH_HS7751RVOIP is not set
112# CONFIG_SH_7710VOIPGW is not set
113CONFIG_SH_RTS7751R2D=y
114# CONFIG_SH_R7780RP is not set
115# CONFIG_SH_EDOSK7705 is not set
116# CONFIG_SH_SH4202_MICRODEV is not set
117# CONFIG_SH_LANDISK is not set
118# CONFIG_SH_TITAN is not set
119# CONFIG_SH_SHMIN is not set
120# CONFIG_SH_7206_SOLUTION_ENGINE is not set
121# CONFIG_SH_7619_SOLUTION_ENGINE is not set
122# CONFIG_SH_UNKNOWN is not set
123
124#
125# Processor selection
126#
127CONFIG_CPU_SH4=y 98CONFIG_CPU_SH4=y
128
129#
130# SH-2 Processor Support
131#
132# CONFIG_CPU_SUBTYPE_SH7604 is not set
133# CONFIG_CPU_SUBTYPE_SH7619 is not set 99# CONFIG_CPU_SUBTYPE_SH7619 is not set
134
135#
136# SH-2A Processor Support
137#
138# CONFIG_CPU_SUBTYPE_SH7206 is not set 100# CONFIG_CPU_SUBTYPE_SH7206 is not set
139
140#
141# SH-3 Processor Support
142#
143# CONFIG_CPU_SUBTYPE_SH7300 is not set
144# CONFIG_CPU_SUBTYPE_SH7705 is not set 101# CONFIG_CPU_SUBTYPE_SH7705 is not set
145# CONFIG_CPU_SUBTYPE_SH7706 is not set 102# CONFIG_CPU_SUBTYPE_SH7706 is not set
146# CONFIG_CPU_SUBTYPE_SH7707 is not set 103# CONFIG_CPU_SUBTYPE_SH7707 is not set
147# CONFIG_CPU_SUBTYPE_SH7708 is not set 104# CONFIG_CPU_SUBTYPE_SH7708 is not set
148# CONFIG_CPU_SUBTYPE_SH7709 is not set 105# CONFIG_CPU_SUBTYPE_SH7709 is not set
149# CONFIG_CPU_SUBTYPE_SH7710 is not set 106# CONFIG_CPU_SUBTYPE_SH7710 is not set
150 107# CONFIG_CPU_SUBTYPE_SH7712 is not set
151#
152# SH-4 Processor Support
153#
154# CONFIG_CPU_SUBTYPE_SH7750 is not set 108# CONFIG_CPU_SUBTYPE_SH7750 is not set
155# CONFIG_CPU_SUBTYPE_SH7091 is not set 109# CONFIG_CPU_SUBTYPE_SH7091 is not set
156# CONFIG_CPU_SUBTYPE_SH7750R is not set 110# CONFIG_CPU_SUBTYPE_SH7750R is not set
@@ -159,35 +113,30 @@ CONFIG_CPU_SH4=y
159CONFIG_CPU_SUBTYPE_SH7751R=y 113CONFIG_CPU_SUBTYPE_SH7751R=y
160# CONFIG_CPU_SUBTYPE_SH7760 is not set 114# CONFIG_CPU_SUBTYPE_SH7760 is not set
161# CONFIG_CPU_SUBTYPE_SH4_202 is not set 115# CONFIG_CPU_SUBTYPE_SH4_202 is not set
162
163#
164# ST40 Processor Support
165#
166# CONFIG_CPU_SUBTYPE_ST40STB1 is not set 116# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
167# CONFIG_CPU_SUBTYPE_ST40GX1 is not set 117# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
168
169#
170# SH-4A Processor Support
171#
172# CONFIG_CPU_SUBTYPE_SH7770 is not set 118# CONFIG_CPU_SUBTYPE_SH7770 is not set
173# CONFIG_CPU_SUBTYPE_SH7780 is not set 119# CONFIG_CPU_SUBTYPE_SH7780 is not set
174# CONFIG_CPU_SUBTYPE_SH7785 is not set 120# CONFIG_CPU_SUBTYPE_SH7785 is not set
175 121# CONFIG_CPU_SUBTYPE_SHX3 is not set
176#
177# SH4AL-DSP Processor Support
178#
179# CONFIG_CPU_SUBTYPE_SH73180 is not set
180# CONFIG_CPU_SUBTYPE_SH7343 is not set 122# CONFIG_CPU_SUBTYPE_SH7343 is not set
181# CONFIG_CPU_SUBTYPE_SH7722 is not set 123# CONFIG_CPU_SUBTYPE_SH7722 is not set
182 124
183# 125#
184# Memory management options 126# Memory management options
185# 127#
128CONFIG_QUICKLIST=y
186CONFIG_MMU=y 129CONFIG_MMU=y
187CONFIG_PAGE_OFFSET=0x80000000 130CONFIG_PAGE_OFFSET=0x80000000
188CONFIG_MEMORY_START=0x0c000000 131CONFIG_MEMORY_START=0x0c000000
189CONFIG_MEMORY_SIZE=0x04000000 132CONFIG_MEMORY_SIZE=0x04000000
190CONFIG_VSYSCALL=y 133CONFIG_VSYSCALL=y
134CONFIG_ARCH_FLATMEM_ENABLE=y
135CONFIG_ARCH_SPARSEMEM_ENABLE=y
136CONFIG_ARCH_SPARSEMEM_DEFAULT=y
137CONFIG_MAX_ACTIVE_REGIONS=1
138CONFIG_ARCH_POPULATES_NODE_MAP=y
139CONFIG_ARCH_SELECT_MEMORY_MODEL=y
191CONFIG_PAGE_SIZE_4KB=y 140CONFIG_PAGE_SIZE_4KB=y
192# CONFIG_PAGE_SIZE_8KB is not set 141# CONFIG_PAGE_SIZE_8KB is not set
193# CONFIG_PAGE_SIZE_64KB is not set 142# CONFIG_PAGE_SIZE_64KB is not set
@@ -197,17 +146,19 @@ CONFIG_FLATMEM_MANUAL=y
197# CONFIG_SPARSEMEM_MANUAL is not set 146# CONFIG_SPARSEMEM_MANUAL is not set
198CONFIG_FLATMEM=y 147CONFIG_FLATMEM=y
199CONFIG_FLAT_NODE_MEM_MAP=y 148CONFIG_FLAT_NODE_MEM_MAP=y
200# CONFIG_SPARSEMEM_STATIC is not set 149CONFIG_SPARSEMEM_STATIC=y
201CONFIG_SPLIT_PTLOCK_CPUS=4 150CONFIG_SPLIT_PTLOCK_CPUS=4
202# CONFIG_RESOURCES_64BIT is not set 151# CONFIG_RESOURCES_64BIT is not set
203CONFIG_ZONE_DMA_FLAG=0 152CONFIG_ZONE_DMA_FLAG=0
153CONFIG_NR_QUICK=2
204 154
205# 155#
206# Cache configuration 156# Cache configuration
207# 157#
208# CONFIG_SH_DIRECT_MAPPED is not set 158# CONFIG_SH_DIRECT_MAPPED is not set
209# CONFIG_SH_WRITETHROUGH is not set 159CONFIG_CACHE_WRITEBACK=y
210# CONFIG_SH_OCRAM is not set 160# CONFIG_CACHE_WRITETHROUGH is not set
161# CONFIG_CACHE_OFF is not set
211 162
212# 163#
213# Processor features 164# Processor features
@@ -215,7 +166,6 @@ CONFIG_ZONE_DMA_FLAG=0
215CONFIG_CPU_LITTLE_ENDIAN=y 166CONFIG_CPU_LITTLE_ENDIAN=y
216# CONFIG_CPU_BIG_ENDIAN is not set 167# CONFIG_CPU_BIG_ENDIAN is not set
217CONFIG_SH_FPU=y 168CONFIG_SH_FPU=y
218# CONFIG_SH_DSP is not set
219# CONFIG_SH_STORE_QUEUES is not set 169# CONFIG_SH_STORE_QUEUES is not set
220CONFIG_CPU_HAS_INTEVT=y 170CONFIG_CPU_HAS_INTEVT=y
221CONFIG_CPU_HAS_INTC_IRQ=y 171CONFIG_CPU_HAS_INTC_IRQ=y
@@ -223,17 +173,31 @@ CONFIG_CPU_HAS_SR_RB=y
223CONFIG_CPU_HAS_PTEA=y 173CONFIG_CPU_HAS_PTEA=y
224 174
225# 175#
226# Timer support 176# Board support
227# 177#
228CONFIG_SH_TMU=y 178# CONFIG_SH_7751_SYSTEMH is not set
179# CONFIG_SH_SECUREEDGE5410 is not set
180# CONFIG_SH_HS7751RVOIP is not set
181CONFIG_SH_RTS7751R2D=y
182# CONFIG_SH_LANDISK is not set
183# CONFIG_SH_TITAN is not set
184# CONFIG_SH_LBOX_RE2 is not set
229 185
230# 186#
231# RTS7751R2D options 187# RTS7751R2D options
232# 188#
233CONFIG_RTS7751R2D_REV11=y 189# CONFIG_RTS7751R2D_PLUS is not set
190CONFIG_RTS7751R2D_1=y
191
192#
193# Timer and clock configuration
194#
195CONFIG_SH_TMU=y
234CONFIG_SH_TIMER_IRQ=16 196CONFIG_SH_TIMER_IRQ=16
235# CONFIG_NO_IDLE_HZ is not set
236CONFIG_SH_PCLK_FREQ=60000000 197CONFIG_SH_PCLK_FREQ=60000000
198# CONFIG_TICK_ONESHOT is not set
199# CONFIG_NO_HZ is not set
200# CONFIG_HIGH_RES_TIMERS is not set
237 201
238# 202#
239# CPU Frequency scaling 203# CPU Frequency scaling
@@ -244,19 +208,15 @@ CONFIG_SH_PCLK_FREQ=60000000
244# DMA support 208# DMA support
245# 209#
246# CONFIG_SH_DMA is not set 210# CONFIG_SH_DMA is not set
247# CONFIG_NR_ONCHIP_DMA_CHANNELS is not set
248# CONFIG_NR_DMA_CHANNELS_BOOL is not set
249 211
250# 212#
251# Companion Chips 213# Companion Chips
252# 214#
253CONFIG_VOYAGERGX=y
254# CONFIG_HD6446X_SERIES is not set
255CONFIG_HEARTBEAT=y
256 215
257# 216#
258# Additional SuperH Device Drivers 217# Additional SuperH Device Drivers
259# 218#
219CONFIG_HEARTBEAT=y
260# CONFIG_PUSH_SWITCH is not set 220# CONFIG_PUSH_SWITCH is not set
261 221
262# 222#
@@ -268,7 +228,7 @@ CONFIG_HZ_250=y
268# CONFIG_HZ_1000 is not set 228# CONFIG_HZ_1000 is not set
269CONFIG_HZ=250 229CONFIG_HZ=250
270# CONFIG_KEXEC is not set 230# CONFIG_KEXEC is not set
271# CONFIG_SMP is not set 231# CONFIG_CRASH_DUMP is not set
272CONFIG_PREEMPT_NONE=y 232CONFIG_PREEMPT_NONE=y
273# CONFIG_PREEMPT_VOLUNTARY is not set 233# CONFIG_PREEMPT_VOLUNTARY is not set
274# CONFIG_PREEMPT is not set 234# CONFIG_PREEMPT is not set
@@ -289,15 +249,12 @@ CONFIG_PCI=y
289CONFIG_SH_PCIDMA_NONCOHERENT=y 249CONFIG_SH_PCIDMA_NONCOHERENT=y
290CONFIG_PCI_AUTO=y 250CONFIG_PCI_AUTO=y
291CONFIG_PCI_AUTO_UPDATE_RESOURCES=y 251CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
252# CONFIG_ARCH_SUPPORTS_MSI is not set
292 253
293# 254#
294# PCCARD (PCMCIA/CardBus) support 255# PCCARD (PCMCIA/CardBus) support
295# 256#
296# CONFIG_PCCARD is not set 257# CONFIG_PCCARD is not set
297
298#
299# PCI Hotplug Support
300#
301CONFIG_HOTPLUG_PCI=y 258CONFIG_HOTPLUG_PCI=y
302# CONFIG_HOTPLUG_PCI_FAKE is not set 259# CONFIG_HOTPLUG_PCI_FAKE is not set
303# CONFIG_HOTPLUG_PCI_CPCI is not set 260# CONFIG_HOTPLUG_PCI_CPCI is not set
@@ -307,15 +264,9 @@ CONFIG_HOTPLUG_PCI=y
307# Executable file formats 264# Executable file formats
308# 265#
309CONFIG_BINFMT_ELF=y 266CONFIG_BINFMT_ELF=y
310# CONFIG_BINFMT_FLAT is not set
311# CONFIG_BINFMT_MISC is not set 267# CONFIG_BINFMT_MISC is not set
312 268
313# 269#
314# Power management options (EXPERIMENTAL)
315#
316# CONFIG_PM is not set
317
318#
319# Networking 270# Networking
320# 271#
321CONFIG_NET=y 272CONFIG_NET=y
@@ -323,7 +274,6 @@ CONFIG_NET=y
323# 274#
324# Networking options 275# Networking options
325# 276#
326# CONFIG_NETDEBUG is not set
327CONFIG_PACKET=y 277CONFIG_PACKET=y
328# CONFIG_PACKET_MMAP is not set 278# CONFIG_PACKET_MMAP is not set
329CONFIG_UNIX=y 279CONFIG_UNIX=y
@@ -360,20 +310,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
360# CONFIG_INET6_TUNNEL is not set 310# CONFIG_INET6_TUNNEL is not set
361# CONFIG_NETWORK_SECMARK is not set 311# CONFIG_NETWORK_SECMARK is not set
362# CONFIG_NETFILTER is not set 312# CONFIG_NETFILTER is not set
363
364#
365# DCCP Configuration (EXPERIMENTAL)
366#
367# CONFIG_IP_DCCP is not set 313# CONFIG_IP_DCCP is not set
368
369#
370# SCTP Configuration (EXPERIMENTAL)
371#
372# CONFIG_IP_SCTP is not set 314# CONFIG_IP_SCTP is not set
373
374#
375# TIPC Configuration (EXPERIMENTAL)
376#
377# CONFIG_TIPC is not set 315# CONFIG_TIPC is not set
378# CONFIG_ATM is not set 316# CONFIG_ATM is not set
379# CONFIG_BRIDGE is not set 317# CONFIG_BRIDGE is not set
@@ -399,8 +337,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
399# CONFIG_HAMRADIO is not set 337# CONFIG_HAMRADIO is not set
400# CONFIG_IRDA is not set 338# CONFIG_IRDA is not set
401# CONFIG_BT is not set 339# CONFIG_BT is not set
402# CONFIG_IEEE80211 is not set 340# CONFIG_AF_RXRPC is not set
341
342#
343# Wireless
344#
345# CONFIG_CFG80211 is not set
403CONFIG_WIRELESS_EXT=y 346CONFIG_WIRELESS_EXT=y
347# CONFIG_MAC80211 is not set
348# CONFIG_IEEE80211 is not set
349# CONFIG_RFKILL is not set
350# CONFIG_NET_9P is not set
404 351
405# 352#
406# Device Drivers 353# Device Drivers
@@ -413,31 +360,10 @@ CONFIG_STANDALONE=y
413CONFIG_PREVENT_FIRMWARE_BUILD=y 360CONFIG_PREVENT_FIRMWARE_BUILD=y
414CONFIG_FW_LOADER=m 361CONFIG_FW_LOADER=m
415# CONFIG_SYS_HYPERVISOR is not set 362# CONFIG_SYS_HYPERVISOR is not set
416
417#
418# Connector - unified userspace <-> kernelspace linker
419#
420# CONFIG_CONNECTOR is not set 363# CONFIG_CONNECTOR is not set
421
422#
423# Memory Technology Devices (MTD)
424#
425# CONFIG_MTD is not set 364# CONFIG_MTD is not set
426
427#
428# Parallel port support
429#
430# CONFIG_PARPORT is not set 365# CONFIG_PARPORT is not set
431 366CONFIG_BLK_DEV=y
432#
433# Plug and Play support
434#
435# CONFIG_PNPACPI is not set
436
437#
438# Block devices
439#
440# CONFIG_BLK_CPQ_DA is not set
441# CONFIG_BLK_CPQ_CISS_DA is not set 367# CONFIG_BLK_CPQ_CISS_DA is not set
442# CONFIG_BLK_DEV_DAC960 is not set 368# CONFIG_BLK_DEV_DAC960 is not set
443# CONFIG_BLK_DEV_UMEM is not set 369# CONFIG_BLK_DEV_UMEM is not set
@@ -449,19 +375,13 @@ CONFIG_BLK_DEV_RAM=y
449CONFIG_BLK_DEV_RAM_COUNT=16 375CONFIG_BLK_DEV_RAM_COUNT=16
450CONFIG_BLK_DEV_RAM_SIZE=4096 376CONFIG_BLK_DEV_RAM_SIZE=4096
451CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 377CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
452# CONFIG_BLK_DEV_INITRD is not set
453# CONFIG_CDROM_PKTCDVD is not set 378# CONFIG_CDROM_PKTCDVD is not set
454# CONFIG_ATA_OVER_ETH is not set 379# CONFIG_ATA_OVER_ETH is not set
455 380CONFIG_MISC_DEVICES=y
456# 381# CONFIG_PHANTOM is not set
457# Misc devices 382# CONFIG_EEPROM_93CX6 is not set
458#
459# CONFIG_SGI_IOC4 is not set 383# CONFIG_SGI_IOC4 is not set
460# CONFIG_TIFM_CORE is not set 384# CONFIG_TIFM_CORE is not set
461
462#
463# ATA/ATAPI/MFM/RLL support
464#
465# CONFIG_IDE is not set 385# CONFIG_IDE is not set
466 386
467# 387#
@@ -469,6 +389,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
469# 389#
470# CONFIG_RAID_ATTRS is not set 390# CONFIG_RAID_ATTRS is not set
471CONFIG_SCSI=y 391CONFIG_SCSI=y
392CONFIG_SCSI_DMA=y
472# CONFIG_SCSI_TGT is not set 393# CONFIG_SCSI_TGT is not set
473# CONFIG_SCSI_NETLINK is not set 394# CONFIG_SCSI_NETLINK is not set
474CONFIG_SCSI_PROC_FS=y 395CONFIG_SCSI_PROC_FS=y
@@ -490,6 +411,7 @@ CONFIG_BLK_DEV_SD=y
490# CONFIG_SCSI_CONSTANTS is not set 411# CONFIG_SCSI_CONSTANTS is not set
491# CONFIG_SCSI_LOGGING is not set 412# CONFIG_SCSI_LOGGING is not set
492# CONFIG_SCSI_SCAN_ASYNC is not set 413# CONFIG_SCSI_SCAN_ASYNC is not set
414CONFIG_SCSI_WAIT_SCAN=m
493 415
494# 416#
495# SCSI Transports 417# SCSI Transports
@@ -497,12 +419,8 @@ CONFIG_BLK_DEV_SD=y
497# CONFIG_SCSI_SPI_ATTRS is not set 419# CONFIG_SCSI_SPI_ATTRS is not set
498# CONFIG_SCSI_FC_ATTRS is not set 420# CONFIG_SCSI_FC_ATTRS is not set
499# CONFIG_SCSI_ISCSI_ATTRS is not set 421# CONFIG_SCSI_ISCSI_ATTRS is not set
500# CONFIG_SCSI_SAS_ATTRS is not set
501# CONFIG_SCSI_SAS_LIBSAS is not set 422# CONFIG_SCSI_SAS_LIBSAS is not set
502 423CONFIG_SCSI_LOWLEVEL=y
503#
504# SCSI low-level drivers
505#
506# CONFIG_ISCSI_TCP is not set 424# CONFIG_ISCSI_TCP is not set
507# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 425# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
508# CONFIG_SCSI_3W_9XXX is not set 426# CONFIG_SCSI_3W_9XXX is not set
@@ -512,7 +430,6 @@ CONFIG_BLK_DEV_SD=y
512# CONFIG_SCSI_AIC7XXX_OLD is not set 430# CONFIG_SCSI_AIC7XXX_OLD is not set
513# CONFIG_SCSI_AIC79XX is not set 431# CONFIG_SCSI_AIC79XX is not set
514# CONFIG_SCSI_AIC94XX is not set 432# CONFIG_SCSI_AIC94XX is not set
515# CONFIG_SCSI_DPT_I2O is not set
516# CONFIG_SCSI_ARCMSR is not set 433# CONFIG_SCSI_ARCMSR is not set
517# CONFIG_MEGARAID_NEWGEN is not set 434# CONFIG_MEGARAID_NEWGEN is not set
518# CONFIG_MEGARAID_LEGACY is not set 435# CONFIG_MEGARAID_LEGACY is not set
@@ -535,10 +452,6 @@ CONFIG_BLK_DEV_SD=y
535# CONFIG_SCSI_NSP32 is not set 452# CONFIG_SCSI_NSP32 is not set
536# CONFIG_SCSI_DEBUG is not set 453# CONFIG_SCSI_DEBUG is not set
537# CONFIG_SCSI_SRP is not set 454# CONFIG_SCSI_SRP is not set
538
539#
540# Serial ATA (prod) and Parallel ATA (experimental) drivers
541#
542CONFIG_ATA=y 455CONFIG_ATA=y
543# CONFIG_ATA_NONSTANDARD is not set 456# CONFIG_ATA_NONSTANDARD is not set
544# CONFIG_SATA_AHCI is not set 457# CONFIG_SATA_AHCI is not set
@@ -561,6 +474,7 @@ CONFIG_ATA=y
561# CONFIG_PATA_AMD is not set 474# CONFIG_PATA_AMD is not set
562# CONFIG_PATA_ARTOP is not set 475# CONFIG_PATA_ARTOP is not set
563# CONFIG_PATA_ATIIXP is not set 476# CONFIG_PATA_ATIIXP is not set
477# CONFIG_PATA_CMD640_PCI is not set
564# CONFIG_PATA_CMD64X is not set 478# CONFIG_PATA_CMD64X is not set
565# CONFIG_PATA_CS5520 is not set 479# CONFIG_PATA_CS5520 is not set
566# CONFIG_PATA_CS5530 is not set 480# CONFIG_PATA_CS5530 is not set
@@ -593,10 +507,6 @@ CONFIG_ATA=y
593# CONFIG_PATA_VIA is not set 507# CONFIG_PATA_VIA is not set
594# CONFIG_PATA_WINBOND is not set 508# CONFIG_PATA_WINBOND is not set
595CONFIG_PATA_PLATFORM=y 509CONFIG_PATA_PLATFORM=y
596
597#
598# Multi-device support (RAID and LVM)
599#
600# CONFIG_MD is not set 510# CONFIG_MD is not set
601 511
602# 512#
@@ -610,35 +520,18 @@ CONFIG_PATA_PLATFORM=y
610# 520#
611# IEEE 1394 (FireWire) support 521# IEEE 1394 (FireWire) support
612# 522#
523# CONFIG_FIREWIRE is not set
613# CONFIG_IEEE1394 is not set 524# CONFIG_IEEE1394 is not set
614
615#
616# I2O device support
617#
618# CONFIG_I2O is not set 525# CONFIG_I2O is not set
619
620#
621# Network device support
622#
623CONFIG_NETDEVICES=y 526CONFIG_NETDEVICES=y
527# CONFIG_NETDEVICES_MULTIQUEUE is not set
624# CONFIG_DUMMY is not set 528# CONFIG_DUMMY is not set
625# CONFIG_BONDING is not set 529# CONFIG_BONDING is not set
530# CONFIG_MACVLAN is not set
626# CONFIG_EQUALIZER is not set 531# CONFIG_EQUALIZER is not set
627# CONFIG_TUN is not set 532# CONFIG_TUN is not set
628
629#
630# ARCnet devices
631#
632# CONFIG_ARCNET is not set 533# CONFIG_ARCNET is not set
633
634#
635# PHY device support
636#
637# CONFIG_PHYLIB is not set 534# CONFIG_PHYLIB is not set
638
639#
640# Ethernet (10 or 100Mbit)
641#
642CONFIG_NET_ETHERNET=y 535CONFIG_NET_ETHERNET=y
643CONFIG_MII=y 536CONFIG_MII=y
644# CONFIG_STNIC is not set 537# CONFIG_STNIC is not set
@@ -647,10 +540,6 @@ CONFIG_MII=y
647# CONFIG_CASSINI is not set 540# CONFIG_CASSINI is not set
648# CONFIG_NET_VENDOR_3COM is not set 541# CONFIG_NET_VENDOR_3COM is not set
649# CONFIG_SMC91X is not set 542# CONFIG_SMC91X is not set
650
651#
652# Tulip family network device support
653#
654# CONFIG_NET_TULIP is not set 543# CONFIG_NET_TULIP is not set
655# CONFIG_HP100 is not set 544# CONFIG_HP100 is not set
656CONFIG_NET_PCI=y 545CONFIG_NET_PCI=y
@@ -677,10 +566,7 @@ CONFIG_8139TOO=y
677# CONFIG_TLAN is not set 566# CONFIG_TLAN is not set
678# CONFIG_VIA_RHINE is not set 567# CONFIG_VIA_RHINE is not set
679# CONFIG_SC92031 is not set 568# CONFIG_SC92031 is not set
680 569CONFIG_NETDEV_1000=y
681#
682# Ethernet (1000 Mbit)
683#
684# CONFIG_ACENIC is not set 570# CONFIG_ACENIC is not set
685# CONFIG_DL2K is not set 571# CONFIG_DL2K is not set
686# CONFIG_E1000 is not set 572# CONFIG_E1000 is not set
@@ -691,61 +577,26 @@ CONFIG_8139TOO=y
691# CONFIG_SIS190 is not set 577# CONFIG_SIS190 is not set
692# CONFIG_SKGE is not set 578# CONFIG_SKGE is not set
693# CONFIG_SKY2 is not set 579# CONFIG_SKY2 is not set
694# CONFIG_SK98LIN is not set
695# CONFIG_VIA_VELOCITY is not set 580# CONFIG_VIA_VELOCITY is not set
696# CONFIG_TIGON3 is not set 581# CONFIG_TIGON3 is not set
697# CONFIG_BNX2 is not set 582# CONFIG_BNX2 is not set
698# CONFIG_QLA3XXX is not set 583# CONFIG_QLA3XXX is not set
699# CONFIG_ATL1 is not set 584# CONFIG_ATL1 is not set
700 585CONFIG_NETDEV_10000=y
701#
702# Ethernet (10000 Mbit)
703#
704# CONFIG_CHELSIO_T1 is not set 586# CONFIG_CHELSIO_T1 is not set
705# CONFIG_CHELSIO_T3 is not set 587# CONFIG_CHELSIO_T3 is not set
706# CONFIG_IXGB is not set 588# CONFIG_IXGB is not set
707# CONFIG_S2IO is not set 589# CONFIG_S2IO is not set
708# CONFIG_MYRI10GE is not set 590# CONFIG_MYRI10GE is not set
709# CONFIG_NETXEN_NIC is not set 591# CONFIG_NETXEN_NIC is not set
710 592# CONFIG_MLX4_CORE is not set
711#
712# Token Ring devices
713#
714# CONFIG_TR is not set 593# CONFIG_TR is not set
715 594
716# 595#
717# Wireless LAN (non-hamradio) 596# Wireless LAN
718#
719CONFIG_NET_RADIO=y
720# CONFIG_NET_WIRELESS_RTNETLINK is not set
721
722#
723# Obsolete Wireless cards support (pre-802.11)
724#
725# CONFIG_STRIP is not set
726
727#
728# Wireless 802.11b ISA/PCI cards support
729#
730# CONFIG_IPW2100 is not set
731# CONFIG_IPW2200 is not set
732CONFIG_HERMES=m
733# CONFIG_PLX_HERMES is not set
734# CONFIG_TMD_HERMES is not set
735# CONFIG_NORTEL_HERMES is not set
736# CONFIG_PCI_HERMES is not set
737# CONFIG_ATMEL is not set
738
739#
740# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
741#
742# CONFIG_PRISM54 is not set
743# CONFIG_HOSTAP is not set
744CONFIG_NET_WIRELESS=y
745
746#
747# Wan interfaces
748# 597#
598# CONFIG_WLAN_PRE80211 is not set
599# CONFIG_WLAN_80211 is not set
749# CONFIG_WAN is not set 600# CONFIG_WAN is not set
750# CONFIG_FDDI is not set 601# CONFIG_FDDI is not set
751# CONFIG_HIPPI is not set 602# CONFIG_HIPPI is not set
@@ -756,15 +607,7 @@ CONFIG_NET_WIRELESS=y
756# CONFIG_NETCONSOLE is not set 607# CONFIG_NETCONSOLE is not set
757# CONFIG_NETPOLL is not set 608# CONFIG_NETPOLL is not set
758# CONFIG_NET_POLL_CONTROLLER is not set 609# CONFIG_NET_POLL_CONTROLLER is not set
759
760#
761# ISDN subsystem
762#
763# CONFIG_ISDN is not set 610# CONFIG_ISDN is not set
764
765#
766# Telephony Support
767#
768# CONFIG_PHONE is not set 611# CONFIG_PHONE is not set
769 612
770# 613#
@@ -772,6 +615,7 @@ CONFIG_NET_WIRELESS=y
772# 615#
773CONFIG_INPUT=y 616CONFIG_INPUT=y
774# CONFIG_INPUT_FF_MEMLESS is not set 617# CONFIG_INPUT_FF_MEMLESS is not set
618# CONFIG_INPUT_POLLDEV is not set
775 619
776# 620#
777# Userland interfaces 621# Userland interfaces
@@ -788,6 +632,7 @@ CONFIG_INPUT=y
788# CONFIG_INPUT_KEYBOARD is not set 632# CONFIG_INPUT_KEYBOARD is not set
789# CONFIG_INPUT_MOUSE is not set 633# CONFIG_INPUT_MOUSE is not set
790# CONFIG_INPUT_JOYSTICK is not set 634# CONFIG_INPUT_JOYSTICK is not set
635# CONFIG_INPUT_TABLET is not set
791# CONFIG_INPUT_TOUCHSCREEN is not set 636# CONFIG_INPUT_TOUCHSCREEN is not set
792# CONFIG_INPUT_MISC is not set 637# CONFIG_INPUT_MISC is not set
793 638
@@ -828,32 +673,15 @@ CONFIG_SERIAL_CORE_CONSOLE=y
828CONFIG_UNIX98_PTYS=y 673CONFIG_UNIX98_PTYS=y
829CONFIG_LEGACY_PTYS=y 674CONFIG_LEGACY_PTYS=y
830CONFIG_LEGACY_PTY_COUNT=256 675CONFIG_LEGACY_PTY_COUNT=256
831
832#
833# IPMI
834#
835# CONFIG_IPMI_HANDLER is not set 676# CONFIG_IPMI_HANDLER is not set
836
837#
838# Watchdog Cards
839#
840# CONFIG_WATCHDOG is not set 677# CONFIG_WATCHDOG is not set
841CONFIG_HW_RANDOM=y 678CONFIG_HW_RANDOM=y
842# CONFIG_GEN_RTC is not set
843# CONFIG_DTLK is not set
844# CONFIG_R3964 is not set 679# CONFIG_R3964 is not set
845# CONFIG_APPLICOM is not set 680# CONFIG_APPLICOM is not set
846# CONFIG_DRM is not set 681# CONFIG_DRM is not set
847# CONFIG_RAW_DRIVER is not set 682# CONFIG_RAW_DRIVER is not set
848
849#
850# TPM devices
851#
852# CONFIG_TCG_TPM is not set 683# CONFIG_TCG_TPM is not set
853 684CONFIG_DEVPORT=y
854#
855# I2C support
856#
857# CONFIG_I2C is not set 685# CONFIG_I2C is not set
858 686
859# 687#
@@ -861,21 +689,24 @@ CONFIG_HW_RANDOM=y
861# 689#
862# CONFIG_SPI is not set 690# CONFIG_SPI is not set
863# CONFIG_SPI_MASTER is not set 691# CONFIG_SPI_MASTER is not set
864
865#
866# Dallas's 1-wire bus
867#
868# CONFIG_W1 is not set 692# CONFIG_W1 is not set
869 693# CONFIG_POWER_SUPPLY is not set
870#
871# Hardware Monitoring support
872#
873CONFIG_HWMON=y 694CONFIG_HWMON=y
874# CONFIG_HWMON_VID is not set 695# CONFIG_HWMON_VID is not set
875# CONFIG_SENSORS_ABITUGURU is not set 696# CONFIG_SENSORS_ABITUGURU is not set
697# CONFIG_SENSORS_ABITUGURU3 is not set
876# CONFIG_SENSORS_F71805F is not set 698# CONFIG_SENSORS_F71805F is not set
699# CONFIG_SENSORS_IT87 is not set
700# CONFIG_SENSORS_PC87360 is not set
877# CONFIG_SENSORS_PC87427 is not set 701# CONFIG_SENSORS_PC87427 is not set
702# CONFIG_SENSORS_SIS5595 is not set
703# CONFIG_SENSORS_SMSC47M1 is not set
704# CONFIG_SENSORS_SMSC47B397 is not set
705# CONFIG_SENSORS_VIA686A is not set
878# CONFIG_SENSORS_VT1211 is not set 706# CONFIG_SENSORS_VT1211 is not set
707# CONFIG_SENSORS_VT8231 is not set
708# CONFIG_SENSORS_W83627HF is not set
709# CONFIG_SENSORS_W83627EHF is not set
879# CONFIG_HWMON_DEBUG_CHIP is not set 710# CONFIG_HWMON_DEBUG_CHIP is not set
880 711
881# 712#
@@ -887,22 +718,31 @@ CONFIG_MFD_SM501=y
887# Multimedia devices 718# Multimedia devices
888# 719#
889# CONFIG_VIDEO_DEV is not set 720# CONFIG_VIDEO_DEV is not set
721# CONFIG_DVB_CORE is not set
722CONFIG_DAB=y
890 723
891# 724#
892# Digital Video Broadcasting Devices 725# Graphics support
893# 726#
894# CONFIG_DVB is not set 727# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
895 728
896# 729#
897# Graphics support 730# Display device support
898# 731#
899# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 732# CONFIG_DISPLAY_SUPPORT is not set
733# CONFIG_VGASTATE is not set
734CONFIG_VIDEO_OUTPUT_CONTROL=m
900CONFIG_FB=y 735CONFIG_FB=y
901# CONFIG_FIRMWARE_EDID is not set 736# CONFIG_FIRMWARE_EDID is not set
902# CONFIG_FB_DDC is not set 737# CONFIG_FB_DDC is not set
903CONFIG_FB_CFB_FILLRECT=y 738CONFIG_FB_CFB_FILLRECT=y
904CONFIG_FB_CFB_COPYAREA=y 739CONFIG_FB_CFB_COPYAREA=y
905CONFIG_FB_CFB_IMAGEBLIT=y 740CONFIG_FB_CFB_IMAGEBLIT=y
741# CONFIG_FB_SYS_FILLRECT is not set
742# CONFIG_FB_SYS_COPYAREA is not set
743# CONFIG_FB_SYS_IMAGEBLIT is not set
744# CONFIG_FB_SYS_FOPS is not set
745CONFIG_FB_DEFERRED_IO=y
906# CONFIG_FB_SVGALIB is not set 746# CONFIG_FB_SVGALIB is not set
907# CONFIG_FB_MACMODES is not set 747# CONFIG_FB_MACMODES is not set
908# CONFIG_FB_BACKLIGHT is not set 748# CONFIG_FB_BACKLIGHT is not set
@@ -910,14 +750,13 @@ CONFIG_FB_CFB_IMAGEBLIT=y
910# CONFIG_FB_TILEBLITTING is not set 750# CONFIG_FB_TILEBLITTING is not set
911 751
912# 752#
913# Frambuffer hardware drivers 753# Frame buffer hardware drivers
914# 754#
915# CONFIG_FB_CIRRUS is not set 755# CONFIG_FB_CIRRUS is not set
916# CONFIG_FB_PM2 is not set 756# CONFIG_FB_PM2 is not set
917# CONFIG_FB_CYBER2000 is not set 757# CONFIG_FB_CYBER2000 is not set
918# CONFIG_FB_ASILIANT is not set 758# CONFIG_FB_ASILIANT is not set
919# CONFIG_FB_IMSTT is not set 759# CONFIG_FB_IMSTT is not set
920# CONFIG_FB_EPSON1355 is not set
921# CONFIG_FB_S1D13XXX is not set 760# CONFIG_FB_S1D13XXX is not set
922# CONFIG_FB_NVIDIA is not set 761# CONFIG_FB_NVIDIA is not set
923# CONFIG_FB_RIVA is not set 762# CONFIG_FB_RIVA is not set
@@ -932,7 +771,10 @@ CONFIG_FB_CFB_IMAGEBLIT=y
932# CONFIG_FB_KYRO is not set 771# CONFIG_FB_KYRO is not set
933# CONFIG_FB_3DFX is not set 772# CONFIG_FB_3DFX is not set
934# CONFIG_FB_VOODOO1 is not set 773# CONFIG_FB_VOODOO1 is not set
774# CONFIG_FB_VT8623 is not set
935# CONFIG_FB_TRIDENT is not set 775# CONFIG_FB_TRIDENT is not set
776# CONFIG_FB_ARK is not set
777# CONFIG_FB_PM3 is not set
936CONFIG_FB_SM501=y 778CONFIG_FB_SM501=y
937# CONFIG_FB_VIRTUAL is not set 779# CONFIG_FB_VIRTUAL is not set
938 780
@@ -941,14 +783,11 @@ CONFIG_FB_SM501=y
941# 783#
942CONFIG_DUMMY_CONSOLE=y 784CONFIG_DUMMY_CONSOLE=y
943CONFIG_FRAMEBUFFER_CONSOLE=y 785CONFIG_FRAMEBUFFER_CONSOLE=y
786# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
944# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set 787# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
945# CONFIG_FONTS is not set 788# CONFIG_FONTS is not set
946CONFIG_FONT_8x8=y 789CONFIG_FONT_8x8=y
947CONFIG_FONT_8x16=y 790CONFIG_FONT_8x16=y
948
949#
950# Logo configuration
951#
952CONFIG_LOGO=y 791CONFIG_LOGO=y
953# CONFIG_LOGO_LINUX_MONO is not set 792# CONFIG_LOGO_LINUX_MONO is not set
954# CONFIG_LOGO_LINUX_VGA16 is not set 793# CONFIG_LOGO_LINUX_VGA16 is not set
@@ -1048,35 +887,34 @@ CONFIG_SND_AC97_CODEC=m
1048# CONFIG_SND_VIA82XX_MODEM is not set 887# CONFIG_SND_VIA82XX_MODEM is not set
1049# CONFIG_SND_VX222 is not set 888# CONFIG_SND_VX222 is not set
1050CONFIG_SND_YMFPCI=m 889CONFIG_SND_YMFPCI=m
890CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL=y
1051# CONFIG_SND_AC97_POWER_SAVE is not set 891# CONFIG_SND_AC97_POWER_SAVE is not set
1052 892
1053# 893#
1054# SoC audio support 894# SUPERH devices
895#
896
897#
898# System on Chip audio support
1055# 899#
1056# CONFIG_SND_SOC is not set 900# CONFIG_SND_SOC is not set
1057 901
1058# 902#
903# SoC Audio support for SuperH
904#
905
906#
1059# Open Sound System 907# Open Sound System
1060# 908#
1061CONFIG_SOUND_PRIME=m 909CONFIG_SOUND_PRIME=m
1062# CONFIG_OBSOLETE_OSS is not set
1063# CONFIG_SOUND_BT878 is not set
1064# CONFIG_SOUND_ICH is not set
1065# CONFIG_SOUND_TRIDENT is not set 910# CONFIG_SOUND_TRIDENT is not set
1066# CONFIG_SOUND_MSNDCLAS is not set 911# CONFIG_SOUND_MSNDCLAS is not set
1067# CONFIG_SOUND_MSNDPIN is not set 912# CONFIG_SOUND_MSNDPIN is not set
1068# CONFIG_SOUND_VIA82CXXX is not set
1069CONFIG_AC97_BUS=m 913CONFIG_AC97_BUS=m
1070 914CONFIG_HID_SUPPORT=y
1071#
1072# HID Devices
1073#
1074CONFIG_HID=y 915CONFIG_HID=y
1075# CONFIG_HID_DEBUG is not set 916# CONFIG_HID_DEBUG is not set
1076 917CONFIG_USB_SUPPORT=y
1077#
1078# USB support
1079#
1080CONFIG_USB_ARCH_HAS_HCD=y 918CONFIG_USB_ARCH_HAS_HCD=y
1081CONFIG_USB_ARCH_HAS_OHCI=y 919CONFIG_USB_ARCH_HAS_OHCI=y
1082CONFIG_USB_ARCH_HAS_EHCI=y 920CONFIG_USB_ARCH_HAS_EHCI=y
@@ -1090,37 +928,9 @@ CONFIG_USB_ARCH_HAS_EHCI=y
1090# USB Gadget Support 928# USB Gadget Support
1091# 929#
1092# CONFIG_USB_GADGET is not set 930# CONFIG_USB_GADGET is not set
1093
1094#
1095# MMC/SD Card support
1096#
1097# CONFIG_MMC is not set 931# CONFIG_MMC is not set
1098
1099#
1100# LED devices
1101#
1102# CONFIG_NEW_LEDS is not set 932# CONFIG_NEW_LEDS is not set
1103
1104#
1105# LED drivers
1106#
1107
1108#
1109# LED Triggers
1110#
1111
1112#
1113# InfiniBand support
1114#
1115# CONFIG_INFINIBAND is not set 933# CONFIG_INFINIBAND is not set
1116
1117#
1118# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1119#
1120
1121#
1122# Real Time Clock
1123#
1124CONFIG_RTC_LIB=y 934CONFIG_RTC_LIB=y
1125CONFIG_RTC_CLASS=y 935CONFIG_RTC_CLASS=y
1126CONFIG_RTC_HCTOSYS=y 936CONFIG_RTC_HCTOSYS=y
@@ -1134,18 +944,28 @@ CONFIG_RTC_INTF_SYSFS=y
1134CONFIG_RTC_INTF_PROC=y 944CONFIG_RTC_INTF_PROC=y
1135CONFIG_RTC_INTF_DEV=y 945CONFIG_RTC_INTF_DEV=y
1136# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 946# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
947# CONFIG_RTC_DRV_TEST is not set
948
949#
950# SPI RTC drivers
951#
1137 952
1138# 953#
1139# RTC drivers 954# Platform RTC drivers
1140# 955#
1141# CONFIG_RTC_DRV_DS1553 is not set 956# CONFIG_RTC_DRV_DS1553 is not set
957# CONFIG_RTC_DRV_STK17TA8 is not set
1142# CONFIG_RTC_DRV_DS1742 is not set 958# CONFIG_RTC_DRV_DS1742 is not set
1143# CONFIG_RTC_DRV_M48T86 is not set 959# CONFIG_RTC_DRV_M48T86 is not set
1144CONFIG_RTC_DRV_SH=y 960# CONFIG_RTC_DRV_M48T59 is not set
1145# CONFIG_RTC_DRV_TEST is not set
1146# CONFIG_RTC_DRV_V3020 is not set 961# CONFIG_RTC_DRV_V3020 is not set
1147 962
1148# 963#
964# on-CPU RTC drivers
965#
966CONFIG_RTC_DRV_SH=y
967
968#
1149# DMA Engine support 969# DMA Engine support
1150# 970#
1151# CONFIG_DMA_ENGINE is not set 971# CONFIG_DMA_ENGINE is not set
@@ -1159,12 +979,9 @@ CONFIG_RTC_DRV_SH=y
1159# 979#
1160 980
1161# 981#
1162# Auxiliary Display support 982# Userspace I/O
1163#
1164
1165#
1166# Virtualization
1167# 983#
984# CONFIG_UIO is not set
1168 985
1169# 986#
1170# File systems 987# File systems
@@ -1247,7 +1064,6 @@ CONFIG_RAMFS=y
1247# CONFIG_NCP_FS is not set 1064# CONFIG_NCP_FS is not set
1248# CONFIG_CODA_FS is not set 1065# CONFIG_CODA_FS is not set
1249# CONFIG_AFS_FS is not set 1066# CONFIG_AFS_FS is not set
1250# CONFIG_9P_FS is not set
1251 1067
1252# 1068#
1253# Partition Types 1069# Partition Types
@@ -1321,7 +1137,6 @@ CONFIG_ENABLE_MUST_CHECK=y
1321# CONFIG_DEBUG_FS is not set 1137# CONFIG_DEBUG_FS is not set
1322# CONFIG_HEADERS_CHECK is not set 1138# CONFIG_HEADERS_CHECK is not set
1323# CONFIG_DEBUG_KERNEL is not set 1139# CONFIG_DEBUG_KERNEL is not set
1324CONFIG_LOG_BUF_SHIFT=14
1325# CONFIG_DEBUG_BUGVERBOSE is not set 1140# CONFIG_DEBUG_BUGVERBOSE is not set
1326# CONFIG_SH_STANDARD_BIOS is not set 1141# CONFIG_SH_STANDARD_BIOS is not set
1327CONFIG_EARLY_SCIF_CONSOLE=y 1142CONFIG_EARLY_SCIF_CONSOLE=y
@@ -1334,10 +1149,6 @@ CONFIG_EARLY_PRINTK=y
1334# 1149#
1335# CONFIG_KEYS is not set 1150# CONFIG_KEYS is not set
1336# CONFIG_SECURITY is not set 1151# CONFIG_SECURITY is not set
1337
1338#
1339# Cryptographic options
1340#
1341# CONFIG_CRYPTO is not set 1152# CONFIG_CRYPTO is not set
1342 1153
1343# 1154#
@@ -1346,8 +1157,11 @@ CONFIG_EARLY_PRINTK=y
1346CONFIG_BITREVERSE=y 1157CONFIG_BITREVERSE=y
1347# CONFIG_CRC_CCITT is not set 1158# CONFIG_CRC_CCITT is not set
1348# CONFIG_CRC16 is not set 1159# CONFIG_CRC16 is not set
1160# CONFIG_CRC_ITU_T is not set
1349CONFIG_CRC32=y 1161CONFIG_CRC32=y
1162# CONFIG_CRC7 is not set
1350# CONFIG_LIBCRC32C is not set 1163# CONFIG_LIBCRC32C is not set
1351CONFIG_PLIST=y 1164CONFIG_PLIST=y
1352CONFIG_HAS_IOMEM=y 1165CONFIG_HAS_IOMEM=y
1353CONFIG_HAS_IOPORT=y 1166CONFIG_HAS_IOPORT=y
1167CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/rts7751r2dplus_defconfig b/arch/sh/configs/rts7751r2dplus_defconfig
new file mode 100644
index 000000000000..4ff5a752dcd9
--- /dev/null
+++ b/arch/sh/configs/rts7751r2dplus_defconfig
@@ -0,0 +1,1167 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc2
4# Tue Aug 14 16:33:08 2007
5#
6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_BUG=y
9CONFIG_GENERIC_FIND_NEXT_BIT=y
10CONFIG_GENERIC_HWEIGHT=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_TIME=y
15CONFIG_GENERIC_CLOCKEVENTS=y
16CONFIG_SYS_SUPPORTS_PCI=y
17CONFIG_STACKTRACE_SUPPORT=y
18CONFIG_LOCKDEP_SUPPORT=y
19# CONFIG_ARCH_HAS_ILOG2_U32 is not set
20# CONFIG_ARCH_HAS_ILOG2_U64 is not set
21CONFIG_ARCH_NO_VIRT_TO_BUS=y
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23
24#
25# General setup
26#
27CONFIG_EXPERIMENTAL=y
28CONFIG_BROKEN_ON_SMP=y
29CONFIG_INIT_ENV_ARG_LIMIT=32
30CONFIG_LOCALVERSION=""
31CONFIG_LOCALVERSION_AUTO=y
32CONFIG_SWAP=y
33CONFIG_SYSVIPC=y
34CONFIG_SYSVIPC_SYSCTL=y
35# CONFIG_POSIX_MQUEUE is not set
36# CONFIG_BSD_PROCESS_ACCT is not set
37# CONFIG_TASKSTATS is not set
38# CONFIG_USER_NS is not set
39# CONFIG_AUDIT is not set
40# CONFIG_IKCONFIG is not set
41CONFIG_LOG_BUF_SHIFT=14
42CONFIG_SYSFS_DEPRECATED=y
43# CONFIG_RELAY is not set
44# CONFIG_BLK_DEV_INITRD is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y
47CONFIG_EMBEDDED=y
48CONFIG_UID16=y
49# CONFIG_SYSCTL_SYSCALL is not set
50CONFIG_KALLSYMS=y
51# CONFIG_KALLSYMS_EXTRA_PASS is not set
52CONFIG_HOTPLUG=y
53CONFIG_PRINTK=y
54CONFIG_BUG=y
55CONFIG_ELF_CORE=y
56CONFIG_BASE_FULL=y
57CONFIG_FUTEX=y
58CONFIG_ANON_INODES=y
59CONFIG_EPOLL=y
60CONFIG_SIGNALFD=y
61CONFIG_TIMERFD=y
62CONFIG_EVENTFD=y
63CONFIG_SHMEM=y
64CONFIG_VM_EVENT_COUNTERS=y
65CONFIG_SLAB=y
66# CONFIG_SLUB is not set
67# CONFIG_SLOB is not set
68CONFIG_RT_MUTEXES=y
69# CONFIG_TINY_SHMEM is not set
70CONFIG_BASE_SMALL=0
71CONFIG_MODULES=y
72# CONFIG_MODULE_UNLOAD is not set
73# CONFIG_MODVERSIONS is not set
74# CONFIG_MODULE_SRCVERSION_ALL is not set
75# CONFIG_KMOD is not set
76CONFIG_BLOCK=y
77# CONFIG_LBD is not set
78# CONFIG_BLK_DEV_IO_TRACE is not set
79# CONFIG_LSF is not set
80# CONFIG_BLK_DEV_BSG is not set
81
82#
83# IO Schedulers
84#
85CONFIG_IOSCHED_NOOP=y
86CONFIG_IOSCHED_AS=y
87CONFIG_IOSCHED_DEADLINE=y
88CONFIG_IOSCHED_CFQ=y
89CONFIG_DEFAULT_AS=y
90# CONFIG_DEFAULT_DEADLINE is not set
91# CONFIG_DEFAULT_CFQ is not set
92# CONFIG_DEFAULT_NOOP is not set
93CONFIG_DEFAULT_IOSCHED="anticipatory"
94
95#
96# System type
97#
98CONFIG_CPU_SH4=y
99# CONFIG_CPU_SUBTYPE_SH7619 is not set
100# CONFIG_CPU_SUBTYPE_SH7206 is not set
101# CONFIG_CPU_SUBTYPE_SH7705 is not set
102# CONFIG_CPU_SUBTYPE_SH7706 is not set
103# CONFIG_CPU_SUBTYPE_SH7707 is not set
104# CONFIG_CPU_SUBTYPE_SH7708 is not set
105# CONFIG_CPU_SUBTYPE_SH7709 is not set
106# CONFIG_CPU_SUBTYPE_SH7710 is not set
107# CONFIG_CPU_SUBTYPE_SH7712 is not set
108# CONFIG_CPU_SUBTYPE_SH7750 is not set
109# CONFIG_CPU_SUBTYPE_SH7091 is not set
110# CONFIG_CPU_SUBTYPE_SH7750R is not set
111# CONFIG_CPU_SUBTYPE_SH7750S is not set
112# CONFIG_CPU_SUBTYPE_SH7751 is not set
113CONFIG_CPU_SUBTYPE_SH7751R=y
114# CONFIG_CPU_SUBTYPE_SH7760 is not set
115# CONFIG_CPU_SUBTYPE_SH4_202 is not set
116# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
117# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
118# CONFIG_CPU_SUBTYPE_SH7770 is not set
119# CONFIG_CPU_SUBTYPE_SH7780 is not set
120# CONFIG_CPU_SUBTYPE_SH7785 is not set
121# CONFIG_CPU_SUBTYPE_SHX3 is not set
122# CONFIG_CPU_SUBTYPE_SH7343 is not set
123# CONFIG_CPU_SUBTYPE_SH7722 is not set
124
125#
126# Memory management options
127#
128CONFIG_QUICKLIST=y
129CONFIG_MMU=y
130CONFIG_PAGE_OFFSET=0x80000000
131CONFIG_MEMORY_START=0x0c000000
132CONFIG_MEMORY_SIZE=0x04000000
133CONFIG_VSYSCALL=y
134CONFIG_ARCH_FLATMEM_ENABLE=y
135CONFIG_ARCH_SPARSEMEM_ENABLE=y
136CONFIG_ARCH_SPARSEMEM_DEFAULT=y
137CONFIG_MAX_ACTIVE_REGIONS=1
138CONFIG_ARCH_POPULATES_NODE_MAP=y
139CONFIG_ARCH_SELECT_MEMORY_MODEL=y
140CONFIG_PAGE_SIZE_4KB=y
141# CONFIG_PAGE_SIZE_8KB is not set
142# CONFIG_PAGE_SIZE_64KB is not set
143CONFIG_SELECT_MEMORY_MODEL=y
144CONFIG_FLATMEM_MANUAL=y
145# CONFIG_DISCONTIGMEM_MANUAL is not set
146# CONFIG_SPARSEMEM_MANUAL is not set
147CONFIG_FLATMEM=y
148CONFIG_FLAT_NODE_MEM_MAP=y
149CONFIG_SPARSEMEM_STATIC=y
150CONFIG_SPLIT_PTLOCK_CPUS=4
151# CONFIG_RESOURCES_64BIT is not set
152CONFIG_ZONE_DMA_FLAG=0
153CONFIG_NR_QUICK=2
154
155#
156# Cache configuration
157#
158# CONFIG_SH_DIRECT_MAPPED is not set
159CONFIG_CACHE_WRITEBACK=y
160# CONFIG_CACHE_WRITETHROUGH is not set
161# CONFIG_CACHE_OFF is not set
162
163#
164# Processor features
165#
166CONFIG_CPU_LITTLE_ENDIAN=y
167# CONFIG_CPU_BIG_ENDIAN is not set
168CONFIG_SH_FPU=y
169# CONFIG_SH_STORE_QUEUES is not set
170CONFIG_CPU_HAS_INTEVT=y
171CONFIG_CPU_HAS_INTC_IRQ=y
172CONFIG_CPU_HAS_SR_RB=y
173CONFIG_CPU_HAS_PTEA=y
174
175#
176# Board support
177#
178# CONFIG_SH_7751_SYSTEMH is not set
179# CONFIG_SH_SECUREEDGE5410 is not set
180# CONFIG_SH_HS7751RVOIP is not set
181CONFIG_SH_RTS7751R2D=y
182# CONFIG_SH_LANDISK is not set
183# CONFIG_SH_TITAN is not set
184# CONFIG_SH_LBOX_RE2 is not set
185
186#
187# RTS7751R2D options
188#
189CONFIG_RTS7751R2D_PLUS=y
190# CONFIG_RTS7751R2D_1 is not set
191
192#
193# Timer and clock configuration
194#
195CONFIG_SH_TMU=y
196CONFIG_SH_TIMER_IRQ=16
197CONFIG_SH_PCLK_FREQ=60000000
198# CONFIG_TICK_ONESHOT is not set
199# CONFIG_NO_HZ is not set
200# CONFIG_HIGH_RES_TIMERS is not set
201
202#
203# CPU Frequency scaling
204#
205# CONFIG_CPU_FREQ is not set
206
207#
208# DMA support
209#
210# CONFIG_SH_DMA is not set
211
212#
213# Companion Chips
214#
215
216#
217# Additional SuperH Device Drivers
218#
219CONFIG_HEARTBEAT=y
220# CONFIG_PUSH_SWITCH is not set
221
222#
223# Kernel features
224#
225# CONFIG_HZ_100 is not set
226CONFIG_HZ_250=y
227# CONFIG_HZ_300 is not set
228# CONFIG_HZ_1000 is not set
229CONFIG_HZ=250
230# CONFIG_KEXEC is not set
231# CONFIG_CRASH_DUMP is not set
232CONFIG_PREEMPT_NONE=y
233# CONFIG_PREEMPT_VOLUNTARY is not set
234# CONFIG_PREEMPT is not set
235
236#
237# Boot options
238#
239CONFIG_ZERO_PAGE_OFFSET=0x00010000
240CONFIG_BOOT_LINK_OFFSET=0x00800000
241# CONFIG_UBC_WAKEUP is not set
242CONFIG_CMDLINE_BOOL=y
243CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial"
244
245#
246# Bus options
247#
248CONFIG_PCI=y
249CONFIG_SH_PCIDMA_NONCOHERENT=y
250CONFIG_PCI_AUTO=y
251CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
252# CONFIG_ARCH_SUPPORTS_MSI is not set
253
254#
255# PCCARD (PCMCIA/CardBus) support
256#
257# CONFIG_PCCARD is not set
258CONFIG_HOTPLUG_PCI=y
259# CONFIG_HOTPLUG_PCI_FAKE is not set
260# CONFIG_HOTPLUG_PCI_CPCI is not set
261# CONFIG_HOTPLUG_PCI_SHPC is not set
262
263#
264# Executable file formats
265#
266CONFIG_BINFMT_ELF=y
267# CONFIG_BINFMT_MISC is not set
268
269#
270# Networking
271#
272CONFIG_NET=y
273
274#
275# Networking options
276#
277CONFIG_PACKET=y
278# CONFIG_PACKET_MMAP is not set
279CONFIG_UNIX=y
280CONFIG_XFRM=y
281# CONFIG_XFRM_USER is not set
282# CONFIG_XFRM_SUB_POLICY is not set
283# CONFIG_XFRM_MIGRATE is not set
284# CONFIG_NET_KEY is not set
285CONFIG_INET=y
286# CONFIG_IP_MULTICAST is not set
287# CONFIG_IP_ADVANCED_ROUTER is not set
288CONFIG_IP_FIB_HASH=y
289# CONFIG_IP_PNP is not set
290# CONFIG_NET_IPIP is not set
291# CONFIG_NET_IPGRE is not set
292# CONFIG_ARPD is not set
293# CONFIG_SYN_COOKIES is not set
294# CONFIG_INET_AH is not set
295# CONFIG_INET_ESP is not set
296# CONFIG_INET_IPCOMP is not set
297# CONFIG_INET_XFRM_TUNNEL is not set
298# CONFIG_INET_TUNNEL is not set
299CONFIG_INET_XFRM_MODE_TRANSPORT=y
300CONFIG_INET_XFRM_MODE_TUNNEL=y
301CONFIG_INET_XFRM_MODE_BEET=y
302CONFIG_INET_DIAG=y
303CONFIG_INET_TCP_DIAG=y
304# CONFIG_TCP_CONG_ADVANCED is not set
305CONFIG_TCP_CONG_CUBIC=y
306CONFIG_DEFAULT_TCP_CONG="cubic"
307# CONFIG_TCP_MD5SIG is not set
308# CONFIG_IPV6 is not set
309# CONFIG_INET6_XFRM_TUNNEL is not set
310# CONFIG_INET6_TUNNEL is not set
311# CONFIG_NETWORK_SECMARK is not set
312# CONFIG_NETFILTER is not set
313# CONFIG_IP_DCCP is not set
314# CONFIG_IP_SCTP is not set
315# CONFIG_TIPC is not set
316# CONFIG_ATM is not set
317# CONFIG_BRIDGE is not set
318# CONFIG_VLAN_8021Q is not set
319# CONFIG_DECNET is not set
320# CONFIG_LLC2 is not set
321# CONFIG_IPX is not set
322# CONFIG_ATALK is not set
323# CONFIG_X25 is not set
324# CONFIG_LAPB is not set
325# CONFIG_ECONET is not set
326# CONFIG_WAN_ROUTER is not set
327
328#
329# QoS and/or fair queueing
330#
331# CONFIG_NET_SCHED is not set
332
333#
334# Network testing
335#
336# CONFIG_NET_PKTGEN is not set
337# CONFIG_HAMRADIO is not set
338# CONFIG_IRDA is not set
339# CONFIG_BT is not set
340# CONFIG_AF_RXRPC is not set
341
342#
343# Wireless
344#
345# CONFIG_CFG80211 is not set
346CONFIG_WIRELESS_EXT=y
347# CONFIG_MAC80211 is not set
348# CONFIG_IEEE80211 is not set
349# CONFIG_RFKILL is not set
350# CONFIG_NET_9P is not set
351
352#
353# Device Drivers
354#
355
356#
357# Generic Driver Options
358#
359CONFIG_STANDALONE=y
360CONFIG_PREVENT_FIRMWARE_BUILD=y
361CONFIG_FW_LOADER=m
362# CONFIG_SYS_HYPERVISOR is not set
363# CONFIG_CONNECTOR is not set
364# CONFIG_MTD is not set
365# CONFIG_PARPORT is not set
366CONFIG_BLK_DEV=y
367# CONFIG_BLK_CPQ_CISS_DA is not set
368# CONFIG_BLK_DEV_DAC960 is not set
369# CONFIG_BLK_DEV_UMEM is not set
370# CONFIG_BLK_DEV_COW_COMMON is not set
371# CONFIG_BLK_DEV_LOOP is not set
372# CONFIG_BLK_DEV_NBD is not set
373# CONFIG_BLK_DEV_SX8 is not set
374CONFIG_BLK_DEV_RAM=y
375CONFIG_BLK_DEV_RAM_COUNT=16
376CONFIG_BLK_DEV_RAM_SIZE=4096
377CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
378# CONFIG_CDROM_PKTCDVD is not set
379# CONFIG_ATA_OVER_ETH is not set
380CONFIG_MISC_DEVICES=y
381# CONFIG_PHANTOM is not set
382# CONFIG_EEPROM_93CX6 is not set
383# CONFIG_SGI_IOC4 is not set
384# CONFIG_TIFM_CORE is not set
385# CONFIG_IDE is not set
386
387#
388# SCSI device support
389#
390# CONFIG_RAID_ATTRS is not set
391CONFIG_SCSI=y
392CONFIG_SCSI_DMA=y
393# CONFIG_SCSI_TGT is not set
394# CONFIG_SCSI_NETLINK is not set
395CONFIG_SCSI_PROC_FS=y
396
397#
398# SCSI support type (disk, tape, CD-ROM)
399#
400CONFIG_BLK_DEV_SD=y
401# CONFIG_CHR_DEV_ST is not set
402# CONFIG_CHR_DEV_OSST is not set
403# CONFIG_BLK_DEV_SR is not set
404# CONFIG_CHR_DEV_SG is not set
405# CONFIG_CHR_DEV_SCH is not set
406
407#
408# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
409#
410# CONFIG_SCSI_MULTI_LUN is not set
411# CONFIG_SCSI_CONSTANTS is not set
412# CONFIG_SCSI_LOGGING is not set
413# CONFIG_SCSI_SCAN_ASYNC is not set
414CONFIG_SCSI_WAIT_SCAN=m
415
416#
417# SCSI Transports
418#
419# CONFIG_SCSI_SPI_ATTRS is not set
420# CONFIG_SCSI_FC_ATTRS is not set
421# CONFIG_SCSI_ISCSI_ATTRS is not set
422# CONFIG_SCSI_SAS_LIBSAS is not set
423CONFIG_SCSI_LOWLEVEL=y
424# CONFIG_ISCSI_TCP is not set
425# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
426# CONFIG_SCSI_3W_9XXX is not set
427# CONFIG_SCSI_ACARD is not set
428# CONFIG_SCSI_AACRAID is not set
429# CONFIG_SCSI_AIC7XXX is not set
430# CONFIG_SCSI_AIC7XXX_OLD is not set
431# CONFIG_SCSI_AIC79XX is not set
432# CONFIG_SCSI_AIC94XX is not set
433# CONFIG_SCSI_ARCMSR is not set
434# CONFIG_MEGARAID_NEWGEN is not set
435# CONFIG_MEGARAID_LEGACY is not set
436# CONFIG_MEGARAID_SAS is not set
437# CONFIG_SCSI_HPTIOP is not set
438# CONFIG_SCSI_DMX3191D is not set
439# CONFIG_SCSI_FUTURE_DOMAIN is not set
440# CONFIG_SCSI_IPS is not set
441# CONFIG_SCSI_INITIO is not set
442# CONFIG_SCSI_INIA100 is not set
443# CONFIG_SCSI_STEX is not set
444# CONFIG_SCSI_SYM53C8XX_2 is not set
445# CONFIG_SCSI_IPR is not set
446# CONFIG_SCSI_QLOGIC_1280 is not set
447# CONFIG_SCSI_QLA_FC is not set
448# CONFIG_SCSI_QLA_ISCSI is not set
449# CONFIG_SCSI_LPFC is not set
450# CONFIG_SCSI_DC395x is not set
451# CONFIG_SCSI_DC390T is not set
452# CONFIG_SCSI_NSP32 is not set
453# CONFIG_SCSI_DEBUG is not set
454# CONFIG_SCSI_SRP is not set
455CONFIG_ATA=y
456# CONFIG_ATA_NONSTANDARD is not set
457# CONFIG_SATA_AHCI is not set
458# CONFIG_SATA_SVW is not set
459# CONFIG_ATA_PIIX is not set
460# CONFIG_SATA_MV is not set
461# CONFIG_SATA_NV is not set
462# CONFIG_PDC_ADMA is not set
463# CONFIG_SATA_QSTOR is not set
464# CONFIG_SATA_PROMISE is not set
465# CONFIG_SATA_SX4 is not set
466# CONFIG_SATA_SIL is not set
467# CONFIG_SATA_SIL24 is not set
468# CONFIG_SATA_SIS is not set
469# CONFIG_SATA_ULI is not set
470# CONFIG_SATA_VIA is not set
471# CONFIG_SATA_VITESSE is not set
472# CONFIG_SATA_INIC162X is not set
473# CONFIG_PATA_ALI is not set
474# CONFIG_PATA_AMD is not set
475# CONFIG_PATA_ARTOP is not set
476# CONFIG_PATA_ATIIXP is not set
477# CONFIG_PATA_CMD640_PCI is not set
478# CONFIG_PATA_CMD64X is not set
479# CONFIG_PATA_CS5520 is not set
480# CONFIG_PATA_CS5530 is not set
481# CONFIG_PATA_CYPRESS is not set
482# CONFIG_PATA_EFAR is not set
483# CONFIG_ATA_GENERIC is not set
484# CONFIG_PATA_HPT366 is not set
485# CONFIG_PATA_HPT37X is not set
486# CONFIG_PATA_HPT3X2N is not set
487# CONFIG_PATA_HPT3X3 is not set
488# CONFIG_PATA_IT821X is not set
489# CONFIG_PATA_IT8213 is not set
490# CONFIG_PATA_JMICRON is not set
491# CONFIG_PATA_TRIFLEX is not set
492# CONFIG_PATA_MARVELL is not set
493# CONFIG_PATA_MPIIX is not set
494# CONFIG_PATA_OLDPIIX is not set
495# CONFIG_PATA_NETCELL is not set
496# CONFIG_PATA_NS87410 is not set
497# CONFIG_PATA_OPTI is not set
498# CONFIG_PATA_OPTIDMA is not set
499# CONFIG_PATA_PDC_OLD is not set
500# CONFIG_PATA_RADISYS is not set
501# CONFIG_PATA_RZ1000 is not set
502# CONFIG_PATA_SC1200 is not set
503# CONFIG_PATA_SERVERWORKS is not set
504# CONFIG_PATA_PDC2027X is not set
505# CONFIG_PATA_SIL680 is not set
506# CONFIG_PATA_SIS is not set
507# CONFIG_PATA_VIA is not set
508# CONFIG_PATA_WINBOND is not set
509CONFIG_PATA_PLATFORM=y
510# CONFIG_MD is not set
511
512#
513# Fusion MPT device support
514#
515# CONFIG_FUSION is not set
516# CONFIG_FUSION_SPI is not set
517# CONFIG_FUSION_FC is not set
518# CONFIG_FUSION_SAS is not set
519
520#
521# IEEE 1394 (FireWire) support
522#
523# CONFIG_FIREWIRE is not set
524# CONFIG_IEEE1394 is not set
525# CONFIG_I2O is not set
526CONFIG_NETDEVICES=y
527# CONFIG_NETDEVICES_MULTIQUEUE is not set
528# CONFIG_DUMMY is not set
529# CONFIG_BONDING is not set
530# CONFIG_MACVLAN is not set
531# CONFIG_EQUALIZER is not set
532# CONFIG_TUN is not set
533# CONFIG_ARCNET is not set
534# CONFIG_PHYLIB is not set
535CONFIG_NET_ETHERNET=y
536CONFIG_MII=y
537# CONFIG_STNIC is not set
538# CONFIG_HAPPYMEAL is not set
539# CONFIG_SUNGEM is not set
540# CONFIG_CASSINI is not set
541# CONFIG_NET_VENDOR_3COM is not set
542# CONFIG_SMC91X is not set
543# CONFIG_NET_TULIP is not set
544# CONFIG_HP100 is not set
545CONFIG_NET_PCI=y
546# CONFIG_PCNET32 is not set
547# CONFIG_AMD8111_ETH is not set
548# CONFIG_ADAPTEC_STARFIRE is not set
549# CONFIG_B44 is not set
550# CONFIG_FORCEDETH is not set
551# CONFIG_DGRS is not set
552# CONFIG_EEPRO100 is not set
553# CONFIG_E100 is not set
554# CONFIG_FEALNX is not set
555# CONFIG_NATSEMI is not set
556# CONFIG_NE2K_PCI is not set
557# CONFIG_8139CP is not set
558CONFIG_8139TOO=y
559# CONFIG_8139TOO_PIO is not set
560# CONFIG_8139TOO_TUNE_TWISTER is not set
561# CONFIG_8139TOO_8129 is not set
562# CONFIG_8139_OLD_RX_RESET is not set
563# CONFIG_SIS900 is not set
564# CONFIG_EPIC100 is not set
565# CONFIG_SUNDANCE is not set
566# CONFIG_TLAN is not set
567# CONFIG_VIA_RHINE is not set
568# CONFIG_SC92031 is not set
569CONFIG_NETDEV_1000=y
570# CONFIG_ACENIC is not set
571# CONFIG_DL2K is not set
572# CONFIG_E1000 is not set
573# CONFIG_NS83820 is not set
574# CONFIG_HAMACHI is not set
575# CONFIG_YELLOWFIN is not set
576# CONFIG_R8169 is not set
577# CONFIG_SIS190 is not set
578# CONFIG_SKGE is not set
579# CONFIG_SKY2 is not set
580# CONFIG_VIA_VELOCITY is not set
581# CONFIG_TIGON3 is not set
582# CONFIG_BNX2 is not set
583# CONFIG_QLA3XXX is not set
584# CONFIG_ATL1 is not set
585CONFIG_NETDEV_10000=y
586# CONFIG_CHELSIO_T1 is not set
587# CONFIG_CHELSIO_T3 is not set
588# CONFIG_IXGB is not set
589# CONFIG_S2IO is not set
590# CONFIG_MYRI10GE is not set
591# CONFIG_NETXEN_NIC is not set
592# CONFIG_MLX4_CORE is not set
593# CONFIG_TR is not set
594
595#
596# Wireless LAN
597#
598# CONFIG_WLAN_PRE80211 is not set
599# CONFIG_WLAN_80211 is not set
600# CONFIG_WAN is not set
601# CONFIG_FDDI is not set
602# CONFIG_HIPPI is not set
603# CONFIG_PPP is not set
604# CONFIG_SLIP is not set
605# CONFIG_NET_FC is not set
606# CONFIG_SHAPER is not set
607# CONFIG_NETCONSOLE is not set
608# CONFIG_NETPOLL is not set
609# CONFIG_NET_POLL_CONTROLLER is not set
610# CONFIG_ISDN is not set
611# CONFIG_PHONE is not set
612
613#
614# Input device support
615#
616CONFIG_INPUT=y
617# CONFIG_INPUT_FF_MEMLESS is not set
618# CONFIG_INPUT_POLLDEV is not set
619
620#
621# Userland interfaces
622#
623# CONFIG_INPUT_MOUSEDEV is not set
624# CONFIG_INPUT_JOYDEV is not set
625# CONFIG_INPUT_TSDEV is not set
626# CONFIG_INPUT_EVDEV is not set
627# CONFIG_INPUT_EVBUG is not set
628
629#
630# Input Device Drivers
631#
632# CONFIG_INPUT_KEYBOARD is not set
633# CONFIG_INPUT_MOUSE is not set
634# CONFIG_INPUT_JOYSTICK is not set
635# CONFIG_INPUT_TABLET is not set
636# CONFIG_INPUT_TOUCHSCREEN is not set
637# CONFIG_INPUT_MISC is not set
638
639#
640# Hardware I/O ports
641#
642# CONFIG_SERIO is not set
643# CONFIG_GAMEPORT is not set
644
645#
646# Character devices
647#
648CONFIG_VT=y
649CONFIG_VT_CONSOLE=y
650CONFIG_HW_CONSOLE=y
651CONFIG_VT_HW_CONSOLE_BINDING=y
652# CONFIG_SERIAL_NONSTANDARD is not set
653
654#
655# Serial drivers
656#
657CONFIG_SERIAL_8250=y
658# CONFIG_SERIAL_8250_CONSOLE is not set
659CONFIG_SERIAL_8250_PCI=y
660CONFIG_SERIAL_8250_NR_UARTS=4
661CONFIG_SERIAL_8250_RUNTIME_UARTS=4
662# CONFIG_SERIAL_8250_EXTENDED is not set
663
664#
665# Non-8250 serial port support
666#
667CONFIG_SERIAL_SH_SCI=y
668CONFIG_SERIAL_SH_SCI_NR_UARTS=1
669CONFIG_SERIAL_SH_SCI_CONSOLE=y
670CONFIG_SERIAL_CORE=y
671CONFIG_SERIAL_CORE_CONSOLE=y
672# CONFIG_SERIAL_JSM is not set
673CONFIG_UNIX98_PTYS=y
674CONFIG_LEGACY_PTYS=y
675CONFIG_LEGACY_PTY_COUNT=256
676# CONFIG_IPMI_HANDLER is not set
677# CONFIG_WATCHDOG is not set
678CONFIG_HW_RANDOM=y
679# CONFIG_R3964 is not set
680# CONFIG_APPLICOM is not set
681# CONFIG_DRM is not set
682# CONFIG_RAW_DRIVER is not set
683# CONFIG_TCG_TPM is not set
684CONFIG_DEVPORT=y
685# CONFIG_I2C is not set
686
687#
688# SPI support
689#
690# CONFIG_SPI is not set
691# CONFIG_SPI_MASTER is not set
692# CONFIG_W1 is not set
693# CONFIG_POWER_SUPPLY is not set
694CONFIG_HWMON=y
695# CONFIG_HWMON_VID is not set
696# CONFIG_SENSORS_ABITUGURU is not set
697# CONFIG_SENSORS_ABITUGURU3 is not set
698# CONFIG_SENSORS_F71805F is not set
699# CONFIG_SENSORS_IT87 is not set
700# CONFIG_SENSORS_PC87360 is not set
701# CONFIG_SENSORS_PC87427 is not set
702# CONFIG_SENSORS_SIS5595 is not set
703# CONFIG_SENSORS_SMSC47M1 is not set
704# CONFIG_SENSORS_SMSC47B397 is not set
705# CONFIG_SENSORS_VIA686A is not set
706# CONFIG_SENSORS_VT1211 is not set
707# CONFIG_SENSORS_VT8231 is not set
708# CONFIG_SENSORS_W83627HF is not set
709# CONFIG_SENSORS_W83627EHF is not set
710# CONFIG_HWMON_DEBUG_CHIP is not set
711
712#
713# Multifunction device drivers
714#
715CONFIG_MFD_SM501=y
716
717#
718# Multimedia devices
719#
720# CONFIG_VIDEO_DEV is not set
721# CONFIG_DVB_CORE is not set
722CONFIG_DAB=y
723
724#
725# Graphics support
726#
727# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
728
729#
730# Display device support
731#
732# CONFIG_DISPLAY_SUPPORT is not set
733# CONFIG_VGASTATE is not set
734CONFIG_VIDEO_OUTPUT_CONTROL=m
735CONFIG_FB=y
736# CONFIG_FIRMWARE_EDID is not set
737# CONFIG_FB_DDC is not set
738CONFIG_FB_CFB_FILLRECT=y
739CONFIG_FB_CFB_COPYAREA=y
740CONFIG_FB_CFB_IMAGEBLIT=y
741# CONFIG_FB_SYS_FILLRECT is not set
742# CONFIG_FB_SYS_COPYAREA is not set
743# CONFIG_FB_SYS_IMAGEBLIT is not set
744# CONFIG_FB_SYS_FOPS is not set
745CONFIG_FB_DEFERRED_IO=y
746# CONFIG_FB_SVGALIB is not set
747# CONFIG_FB_MACMODES is not set
748# CONFIG_FB_BACKLIGHT is not set
749# CONFIG_FB_MODE_HELPERS is not set
750# CONFIG_FB_TILEBLITTING is not set
751
752#
753# Frame buffer hardware drivers
754#
755# CONFIG_FB_CIRRUS is not set
756# CONFIG_FB_PM2 is not set
757# CONFIG_FB_CYBER2000 is not set
758# CONFIG_FB_ASILIANT is not set
759# CONFIG_FB_IMSTT is not set
760# CONFIG_FB_S1D13XXX is not set
761# CONFIG_FB_NVIDIA is not set
762# CONFIG_FB_RIVA is not set
763# CONFIG_FB_MATROX is not set
764# CONFIG_FB_RADEON is not set
765# CONFIG_FB_ATY128 is not set
766# CONFIG_FB_ATY is not set
767# CONFIG_FB_S3 is not set
768# CONFIG_FB_SAVAGE is not set
769# CONFIG_FB_SIS is not set
770# CONFIG_FB_NEOMAGIC is not set
771# CONFIG_FB_KYRO is not set
772# CONFIG_FB_3DFX is not set
773# CONFIG_FB_VOODOO1 is not set
774# CONFIG_FB_VT8623 is not set
775# CONFIG_FB_TRIDENT is not set
776# CONFIG_FB_ARK is not set
777# CONFIG_FB_PM3 is not set
778CONFIG_FB_SM501=y
779# CONFIG_FB_VIRTUAL is not set
780
781#
782# Console display driver support
783#
784CONFIG_DUMMY_CONSOLE=y
785CONFIG_FRAMEBUFFER_CONSOLE=y
786# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
787# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
788# CONFIG_FONTS is not set
789CONFIG_FONT_8x8=y
790CONFIG_FONT_8x16=y
791CONFIG_LOGO=y
792# CONFIG_LOGO_LINUX_MONO is not set
793# CONFIG_LOGO_LINUX_VGA16 is not set
794# CONFIG_LOGO_LINUX_CLUT224 is not set
795# CONFIG_LOGO_SUPERH_MONO is not set
796# CONFIG_LOGO_SUPERH_VGA16 is not set
797CONFIG_LOGO_SUPERH_CLUT224=y
798
799#
800# Sound
801#
802CONFIG_SOUND=y
803
804#
805# Advanced Linux Sound Architecture
806#
807CONFIG_SND=m
808CONFIG_SND_TIMER=m
809CONFIG_SND_PCM=m
810CONFIG_SND_HWDEP=m
811CONFIG_SND_RAWMIDI=m
812# CONFIG_SND_SEQUENCER is not set
813# CONFIG_SND_MIXER_OSS is not set
814# CONFIG_SND_PCM_OSS is not set
815# CONFIG_SND_DYNAMIC_MINORS is not set
816CONFIG_SND_SUPPORT_OLD_API=y
817CONFIG_SND_VERBOSE_PROCFS=y
818# CONFIG_SND_VERBOSE_PRINTK is not set
819# CONFIG_SND_DEBUG is not set
820
821#
822# Generic devices
823#
824CONFIG_SND_MPU401_UART=m
825CONFIG_SND_OPL3_LIB=m
826CONFIG_SND_AC97_CODEC=m
827# CONFIG_SND_DUMMY is not set
828# CONFIG_SND_MTPAV is not set
829# CONFIG_SND_SERIAL_U16550 is not set
830# CONFIG_SND_MPU401 is not set
831
832#
833# PCI devices
834#
835# CONFIG_SND_AD1889 is not set
836# CONFIG_SND_ALS300 is not set
837# CONFIG_SND_ALI5451 is not set
838# CONFIG_SND_ATIIXP is not set
839# CONFIG_SND_ATIIXP_MODEM is not set
840# CONFIG_SND_AU8810 is not set
841# CONFIG_SND_AU8820 is not set
842# CONFIG_SND_AU8830 is not set
843# CONFIG_SND_AZT3328 is not set
844# CONFIG_SND_BT87X is not set
845# CONFIG_SND_CA0106 is not set
846# CONFIG_SND_CMIPCI is not set
847# CONFIG_SND_CS4281 is not set
848# CONFIG_SND_CS46XX is not set
849# CONFIG_SND_DARLA20 is not set
850# CONFIG_SND_GINA20 is not set
851# CONFIG_SND_LAYLA20 is not set
852# CONFIG_SND_DARLA24 is not set
853# CONFIG_SND_GINA24 is not set
854# CONFIG_SND_LAYLA24 is not set
855# CONFIG_SND_MONA is not set
856# CONFIG_SND_MIA is not set
857# CONFIG_SND_ECHO3G is not set
858# CONFIG_SND_INDIGO is not set
859# CONFIG_SND_INDIGOIO is not set
860# CONFIG_SND_INDIGODJ is not set
861# CONFIG_SND_EMU10K1 is not set
862# CONFIG_SND_EMU10K1X is not set
863# CONFIG_SND_ENS1370 is not set
864# CONFIG_SND_ENS1371 is not set
865# CONFIG_SND_ES1938 is not set
866# CONFIG_SND_ES1968 is not set
867# CONFIG_SND_FM801 is not set
868# CONFIG_SND_HDA_INTEL is not set
869# CONFIG_SND_HDSP is not set
870# CONFIG_SND_HDSPM is not set
871# CONFIG_SND_ICE1712 is not set
872# CONFIG_SND_ICE1724 is not set
873# CONFIG_SND_INTEL8X0 is not set
874# CONFIG_SND_INTEL8X0M is not set
875# CONFIG_SND_KORG1212 is not set
876# CONFIG_SND_MAESTRO3 is not set
877# CONFIG_SND_MIXART is not set
878# CONFIG_SND_NM256 is not set
879# CONFIG_SND_PCXHR is not set
880# CONFIG_SND_RIPTIDE is not set
881# CONFIG_SND_RME32 is not set
882# CONFIG_SND_RME96 is not set
883# CONFIG_SND_RME9652 is not set
884# CONFIG_SND_SONICVIBES is not set
885# CONFIG_SND_TRIDENT is not set
886# CONFIG_SND_VIA82XX is not set
887# CONFIG_SND_VIA82XX_MODEM is not set
888# CONFIG_SND_VX222 is not set
889CONFIG_SND_YMFPCI=m
890CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL=y
891# CONFIG_SND_AC97_POWER_SAVE is not set
892
893#
894# SUPERH devices
895#
896
897#
898# System on Chip audio support
899#
900# CONFIG_SND_SOC is not set
901
902#
903# SoC Audio support for SuperH
904#
905
906#
907# Open Sound System
908#
909CONFIG_SOUND_PRIME=m
910# CONFIG_SOUND_TRIDENT is not set
911# CONFIG_SOUND_MSNDCLAS is not set
912# CONFIG_SOUND_MSNDPIN is not set
913CONFIG_AC97_BUS=m
914CONFIG_HID_SUPPORT=y
915CONFIG_HID=y
916# CONFIG_HID_DEBUG is not set
917CONFIG_USB_SUPPORT=y
918CONFIG_USB_ARCH_HAS_HCD=y
919CONFIG_USB_ARCH_HAS_OHCI=y
920CONFIG_USB_ARCH_HAS_EHCI=y
921# CONFIG_USB is not set
922
923#
924# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
925#
926
927#
928# USB Gadget Support
929#
930# CONFIG_USB_GADGET is not set
931# CONFIG_MMC is not set
932# CONFIG_NEW_LEDS is not set
933# CONFIG_INFINIBAND is not set
934CONFIG_RTC_LIB=y
935CONFIG_RTC_CLASS=y
936CONFIG_RTC_HCTOSYS=y
937CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
938# CONFIG_RTC_DEBUG is not set
939
940#
941# RTC interfaces
942#
943CONFIG_RTC_INTF_SYSFS=y
944CONFIG_RTC_INTF_PROC=y
945CONFIG_RTC_INTF_DEV=y
946# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
947# CONFIG_RTC_DRV_TEST is not set
948
949#
950# SPI RTC drivers
951#
952
953#
954# Platform RTC drivers
955#
956# CONFIG_RTC_DRV_DS1553 is not set
957# CONFIG_RTC_DRV_STK17TA8 is not set
958# CONFIG_RTC_DRV_DS1742 is not set
959# CONFIG_RTC_DRV_M48T86 is not set
960# CONFIG_RTC_DRV_M48T59 is not set
961# CONFIG_RTC_DRV_V3020 is not set
962
963#
964# on-CPU RTC drivers
965#
966CONFIG_RTC_DRV_SH=y
967
968#
969# DMA Engine support
970#
971# CONFIG_DMA_ENGINE is not set
972
973#
974# DMA Clients
975#
976
977#
978# DMA Devices
979#
980
981#
982# Userspace I/O
983#
984# CONFIG_UIO is not set
985
986#
987# File systems
988#
989CONFIG_EXT2_FS=y
990# CONFIG_EXT2_FS_XATTR is not set
991# CONFIG_EXT2_FS_XIP is not set
992# CONFIG_EXT3_FS is not set
993# CONFIG_EXT4DEV_FS is not set
994# CONFIG_REISERFS_FS is not set
995# CONFIG_JFS_FS is not set
996# CONFIG_FS_POSIX_ACL is not set
997# CONFIG_XFS_FS is not set
998# CONFIG_GFS2_FS is not set
999# CONFIG_OCFS2_FS is not set
1000CONFIG_MINIX_FS=y
1001# CONFIG_ROMFS_FS is not set
1002CONFIG_INOTIFY=y
1003CONFIG_INOTIFY_USER=y
1004# CONFIG_QUOTA is not set
1005CONFIG_DNOTIFY=y
1006# CONFIG_AUTOFS_FS is not set
1007# CONFIG_AUTOFS4_FS is not set
1008# CONFIG_FUSE_FS is not set
1009
1010#
1011# CD-ROM/DVD Filesystems
1012#
1013# CONFIG_ISO9660_FS is not set
1014# CONFIG_UDF_FS is not set
1015
1016#
1017# DOS/FAT/NT Filesystems
1018#
1019CONFIG_FAT_FS=y
1020CONFIG_MSDOS_FS=y
1021CONFIG_VFAT_FS=y
1022CONFIG_FAT_DEFAULT_CODEPAGE=437
1023CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1024# CONFIG_NTFS_FS is not set
1025
1026#
1027# Pseudo filesystems
1028#
1029CONFIG_PROC_FS=y
1030CONFIG_PROC_KCORE=y
1031CONFIG_PROC_SYSCTL=y
1032CONFIG_SYSFS=y
1033CONFIG_TMPFS=y
1034# CONFIG_TMPFS_POSIX_ACL is not set
1035# CONFIG_HUGETLBFS is not set
1036# CONFIG_HUGETLB_PAGE is not set
1037CONFIG_RAMFS=y
1038# CONFIG_CONFIGFS_FS is not set
1039
1040#
1041# Miscellaneous filesystems
1042#
1043# CONFIG_ADFS_FS is not set
1044# CONFIG_AFFS_FS is not set
1045# CONFIG_HFS_FS is not set
1046# CONFIG_HFSPLUS_FS is not set
1047# CONFIG_BEFS_FS is not set
1048# CONFIG_BFS_FS is not set
1049# CONFIG_EFS_FS is not set
1050# CONFIG_CRAMFS is not set
1051# CONFIG_VXFS_FS is not set
1052# CONFIG_HPFS_FS is not set
1053# CONFIG_QNX4FS_FS is not set
1054# CONFIG_SYSV_FS is not set
1055# CONFIG_UFS_FS is not set
1056
1057#
1058# Network File Systems
1059#
1060# CONFIG_NFS_FS is not set
1061# CONFIG_NFSD is not set
1062# CONFIG_SMB_FS is not set
1063# CONFIG_CIFS is not set
1064# CONFIG_NCP_FS is not set
1065# CONFIG_CODA_FS is not set
1066# CONFIG_AFS_FS is not set
1067
1068#
1069# Partition Types
1070#
1071# CONFIG_PARTITION_ADVANCED is not set
1072CONFIG_MSDOS_PARTITION=y
1073
1074#
1075# Native Language Support
1076#
1077CONFIG_NLS=y
1078CONFIG_NLS_DEFAULT="iso8859-1"
1079# CONFIG_NLS_CODEPAGE_437 is not set
1080# CONFIG_NLS_CODEPAGE_737 is not set
1081# CONFIG_NLS_CODEPAGE_775 is not set
1082# CONFIG_NLS_CODEPAGE_850 is not set
1083# CONFIG_NLS_CODEPAGE_852 is not set
1084# CONFIG_NLS_CODEPAGE_855 is not set
1085# CONFIG_NLS_CODEPAGE_857 is not set
1086# CONFIG_NLS_CODEPAGE_860 is not set
1087# CONFIG_NLS_CODEPAGE_861 is not set
1088# CONFIG_NLS_CODEPAGE_862 is not set
1089# CONFIG_NLS_CODEPAGE_863 is not set
1090# CONFIG_NLS_CODEPAGE_864 is not set
1091# CONFIG_NLS_CODEPAGE_865 is not set
1092# CONFIG_NLS_CODEPAGE_866 is not set
1093# CONFIG_NLS_CODEPAGE_869 is not set
1094# CONFIG_NLS_CODEPAGE_936 is not set
1095# CONFIG_NLS_CODEPAGE_950 is not set
1096CONFIG_NLS_CODEPAGE_932=y
1097# CONFIG_NLS_CODEPAGE_949 is not set
1098# CONFIG_NLS_CODEPAGE_874 is not set
1099# CONFIG_NLS_ISO8859_8 is not set
1100# CONFIG_NLS_CODEPAGE_1250 is not set
1101# CONFIG_NLS_CODEPAGE_1251 is not set
1102# CONFIG_NLS_ASCII is not set
1103# CONFIG_NLS_ISO8859_1 is not set
1104# CONFIG_NLS_ISO8859_2 is not set
1105# CONFIG_NLS_ISO8859_3 is not set
1106# CONFIG_NLS_ISO8859_4 is not set
1107# CONFIG_NLS_ISO8859_5 is not set
1108# CONFIG_NLS_ISO8859_6 is not set
1109# CONFIG_NLS_ISO8859_7 is not set
1110# CONFIG_NLS_ISO8859_9 is not set
1111# CONFIG_NLS_ISO8859_13 is not set
1112# CONFIG_NLS_ISO8859_14 is not set
1113# CONFIG_NLS_ISO8859_15 is not set
1114# CONFIG_NLS_KOI8_R is not set
1115# CONFIG_NLS_KOI8_U is not set
1116# CONFIG_NLS_UTF8 is not set
1117
1118#
1119# Distributed Lock Manager
1120#
1121# CONFIG_DLM is not set
1122
1123#
1124# Profiling support
1125#
1126CONFIG_PROFILING=y
1127CONFIG_OPROFILE=y
1128
1129#
1130# Kernel hacking
1131#
1132CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1133# CONFIG_PRINTK_TIME is not set
1134CONFIG_ENABLE_MUST_CHECK=y
1135# CONFIG_MAGIC_SYSRQ is not set
1136# CONFIG_UNUSED_SYMBOLS is not set
1137# CONFIG_DEBUG_FS is not set
1138# CONFIG_HEADERS_CHECK is not set
1139# CONFIG_DEBUG_KERNEL is not set
1140# CONFIG_DEBUG_BUGVERBOSE is not set
1141# CONFIG_SH_STANDARD_BIOS is not set
1142CONFIG_EARLY_SCIF_CONSOLE=y
1143CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
1144CONFIG_EARLY_PRINTK=y
1145# CONFIG_SH_KGDB is not set
1146
1147#
1148# Security options
1149#
1150# CONFIG_KEYS is not set
1151# CONFIG_SECURITY is not set
1152# CONFIG_CRYPTO is not set
1153
1154#
1155# Library routines
1156#
1157CONFIG_BITREVERSE=y
1158# CONFIG_CRC_CCITT is not set
1159# CONFIG_CRC16 is not set
1160# CONFIG_CRC_ITU_T is not set
1161CONFIG_CRC32=y
1162# CONFIG_CRC7 is not set
1163# CONFIG_LIBCRC32C is not set
1164CONFIG_PLIST=y
1165CONFIG_HAS_IOMEM=y
1166CONFIG_HAS_IOPORT=y
1167CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/se7206_defconfig b/arch/sh/configs/se7206_defconfig
index f2f2a3c9c32d..0d0cda908270 100644
--- a/arch/sh/configs/se7206_defconfig
+++ b/arch/sh/configs/se7206_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22-rc4 3# Linux kernel version: 2.6.23-rc4
4# Fri Jun 15 19:37:46 2007 4# Thu Sep 13 16:40:16 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
@@ -17,25 +17,22 @@ CONFIG_STACKTRACE_SUPPORT=y
17CONFIG_LOCKDEP_SUPPORT=y 17CONFIG_LOCKDEP_SUPPORT=y
18# CONFIG_ARCH_HAS_ILOG2_U32 is not set 18# CONFIG_ARCH_HAS_ILOG2_U32 is not set
19# CONFIG_ARCH_HAS_ILOG2_U64 is not set 19# CONFIG_ARCH_HAS_ILOG2_U64 is not set
20CONFIG_ARCH_NO_VIRT_TO_BUS=y
20CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
21 22
22# 23#
23# Code maturity level options 24# General setup
24# 25#
25CONFIG_EXPERIMENTAL=y 26CONFIG_EXPERIMENTAL=y
26CONFIG_BROKEN_ON_SMP=y 27CONFIG_BROKEN_ON_SMP=y
27CONFIG_INIT_ENV_ARG_LIMIT=32 28CONFIG_INIT_ENV_ARG_LIMIT=32
28
29#
30# General setup
31#
32CONFIG_LOCALVERSION="" 29CONFIG_LOCALVERSION=""
33# CONFIG_LOCALVERSION_AUTO is not set 30# CONFIG_LOCALVERSION_AUTO is not set
34# CONFIG_SYSVIPC is not set 31# CONFIG_SYSVIPC is not set
35# CONFIG_POSIX_MQUEUE is not set 32# CONFIG_POSIX_MQUEUE is not set
36# CONFIG_BSD_PROCESS_ACCT is not set 33# CONFIG_BSD_PROCESS_ACCT is not set
37# CONFIG_TASKSTATS is not set 34# CONFIG_TASKSTATS is not set
38# CONFIG_UTS_NS is not set 35# CONFIG_USER_NS is not set
39# CONFIG_AUDIT is not set 36# CONFIG_AUDIT is not set
40# CONFIG_IKCONFIG is not set 37# CONFIG_IKCONFIG is not set
41CONFIG_LOG_BUF_SHIFT=14 38CONFIG_LOG_BUF_SHIFT=14
@@ -60,23 +57,17 @@ CONFIG_SIGNALFD=y
60CONFIG_TIMERFD=y 57CONFIG_TIMERFD=y
61CONFIG_EVENTFD=y 58CONFIG_EVENTFD=y
62# CONFIG_VM_EVENT_COUNTERS is not set 59# CONFIG_VM_EVENT_COUNTERS is not set
63CONFIG_SLAB=y 60CONFIG_SLUB_DEBUG=y
64# CONFIG_SLUB is not set 61# CONFIG_SLAB is not set
62CONFIG_SLUB=y
65# CONFIG_SLOB is not set 63# CONFIG_SLOB is not set
66CONFIG_TINY_SHMEM=y 64CONFIG_TINY_SHMEM=y
67CONFIG_BASE_SMALL=1 65CONFIG_BASE_SMALL=1
68
69#
70# Loadable module support
71#
72# CONFIG_MODULES is not set 66# CONFIG_MODULES is not set
73
74#
75# Block layer
76#
77CONFIG_BLOCK=y 67CONFIG_BLOCK=y
78# CONFIG_LBD is not set 68# CONFIG_LBD is not set
79# CONFIG_LSF is not set 69# CONFIG_LSF is not set
70# CONFIG_BLK_DEV_BSG is not set
80 71
81# 72#
82# IO Schedulers 73# IO Schedulers
@@ -98,7 +89,6 @@ CONFIG_CPU_SH2=y
98CONFIG_CPU_SH2A=y 89CONFIG_CPU_SH2A=y
99# CONFIG_CPU_SUBTYPE_SH7619 is not set 90# CONFIG_CPU_SUBTYPE_SH7619 is not set
100CONFIG_CPU_SUBTYPE_SH7206=y 91CONFIG_CPU_SUBTYPE_SH7206=y
101# CONFIG_CPU_SUBTYPE_SH7300 is not set
102# CONFIG_CPU_SUBTYPE_SH7705 is not set 92# CONFIG_CPU_SUBTYPE_SH7705 is not set
103# CONFIG_CPU_SUBTYPE_SH7706 is not set 93# CONFIG_CPU_SUBTYPE_SH7706 is not set
104# CONFIG_CPU_SUBTYPE_SH7707 is not set 94# CONFIG_CPU_SUBTYPE_SH7707 is not set
@@ -106,6 +96,7 @@ CONFIG_CPU_SUBTYPE_SH7206=y
106# CONFIG_CPU_SUBTYPE_SH7709 is not set 96# CONFIG_CPU_SUBTYPE_SH7709 is not set
107# CONFIG_CPU_SUBTYPE_SH7710 is not set 97# CONFIG_CPU_SUBTYPE_SH7710 is not set
108# CONFIG_CPU_SUBTYPE_SH7712 is not set 98# CONFIG_CPU_SUBTYPE_SH7712 is not set
99# CONFIG_CPU_SUBTYPE_SH7720 is not set
109# CONFIG_CPU_SUBTYPE_SH7750 is not set 100# CONFIG_CPU_SUBTYPE_SH7750 is not set
110# CONFIG_CPU_SUBTYPE_SH7091 is not set 101# CONFIG_CPU_SUBTYPE_SH7091 is not set
111# CONFIG_CPU_SUBTYPE_SH7750R is not set 102# CONFIG_CPU_SUBTYPE_SH7750R is not set
@@ -119,7 +110,7 @@ CONFIG_CPU_SUBTYPE_SH7206=y
119# CONFIG_CPU_SUBTYPE_SH7770 is not set 110# CONFIG_CPU_SUBTYPE_SH7770 is not set
120# CONFIG_CPU_SUBTYPE_SH7780 is not set 111# CONFIG_CPU_SUBTYPE_SH7780 is not set
121# CONFIG_CPU_SUBTYPE_SH7785 is not set 112# CONFIG_CPU_SUBTYPE_SH7785 is not set
122# CONFIG_CPU_SUBTYPE_SH73180 is not set 113# CONFIG_CPU_SUBTYPE_SHX3 is not set
123# CONFIG_CPU_SUBTYPE_SH7343 is not set 114# CONFIG_CPU_SUBTYPE_SH7343 is not set
124# CONFIG_CPU_SUBTYPE_SH7722 is not set 115# CONFIG_CPU_SUBTYPE_SH7722 is not set
125 116
@@ -136,15 +127,16 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
136CONFIG_MAX_ACTIVE_REGIONS=1 127CONFIG_MAX_ACTIVE_REGIONS=1
137CONFIG_ARCH_POPULATES_NODE_MAP=y 128CONFIG_ARCH_POPULATES_NODE_MAP=y
138CONFIG_ARCH_SELECT_MEMORY_MODEL=y 129CONFIG_ARCH_SELECT_MEMORY_MODEL=y
130CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
139CONFIG_PAGE_SIZE_4KB=y 131CONFIG_PAGE_SIZE_4KB=y
140# CONFIG_PAGE_SIZE_8KB is not set 132# CONFIG_PAGE_SIZE_8KB is not set
141# CONFIG_PAGE_SIZE_64KB is not set 133# CONFIG_PAGE_SIZE_64KB is not set
142CONFIG_SELECT_MEMORY_MODEL=y 134CONFIG_SELECT_MEMORY_MODEL=y
143CONFIG_FLATMEM_MANUAL=y 135# CONFIG_FLATMEM_MANUAL is not set
144# CONFIG_DISCONTIGMEM_MANUAL is not set 136# CONFIG_DISCONTIGMEM_MANUAL is not set
145# CONFIG_SPARSEMEM_MANUAL is not set 137CONFIG_SPARSEMEM_MANUAL=y
146CONFIG_FLATMEM=y 138CONFIG_SPARSEMEM=y
147CONFIG_FLAT_NODE_MEM_MAP=y 139CONFIG_HAVE_MEMORY_PRESENT=y
148CONFIG_SPARSEMEM_STATIC=y 140CONFIG_SPARSEMEM_STATIC=y
149CONFIG_SPLIT_PTLOCK_CPUS=4 141CONFIG_SPLIT_PTLOCK_CPUS=4
150# CONFIG_RESOURCES_64BIT is not set 142# CONFIG_RESOURCES_64BIT is not set
@@ -155,7 +147,9 @@ CONFIG_NR_QUICK=2
155# Cache configuration 147# Cache configuration
156# 148#
157# CONFIG_SH_DIRECT_MAPPED is not set 149# CONFIG_SH_DIRECT_MAPPED is not set
158# CONFIG_SH_WRITETHROUGH is not set 150CONFIG_CACHE_WRITEBACK=y
151# CONFIG_CACHE_WRITETHROUGH is not set
152# CONFIG_CACHE_OFF is not set
159 153
160# 154#
161# Processor features 155# Processor features
@@ -163,8 +157,6 @@ CONFIG_NR_QUICK=2
163# CONFIG_CPU_LITTLE_ENDIAN is not set 157# CONFIG_CPU_LITTLE_ENDIAN is not set
164CONFIG_CPU_BIG_ENDIAN=y 158CONFIG_CPU_BIG_ENDIAN=y
165# CONFIG_SH_FPU_EMU is not set 159# CONFIG_SH_FPU_EMU is not set
166# CONFIG_SH_DSP is not set
167CONFIG_CPU_HAS_IPR_IRQ=y
168 160
169# 161#
170# Board support 162# Board support
@@ -185,12 +177,23 @@ CONFIG_SH_CLK_MD=6
185# 177#
186# CPU Frequency scaling 178# CPU Frequency scaling
187# 179#
188# CONFIG_CPU_FREQ is not set 180CONFIG_CPU_FREQ=y
181CONFIG_CPU_FREQ_TABLE=y
182# CONFIG_CPU_FREQ_DEBUG is not set
183CONFIG_CPU_FREQ_STAT=y
184# CONFIG_CPU_FREQ_STAT_DETAILS is not set
185CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
186# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
187CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
188# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
189# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
190# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
191# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
192# CONFIG_SH_CPU_FREQ is not set
189 193
190# 194#
191# DMA support 195# DMA support
192# 196#
193# CONFIG_SH_DMA is not set
194 197
195# 198#
196# Companion Chips 199# Companion Chips
@@ -199,17 +202,17 @@ CONFIG_SH_CLK_MD=6
199# 202#
200# Additional SuperH Device Drivers 203# Additional SuperH Device Drivers
201# 204#
202# CONFIG_HEARTBEAT is not set 205CONFIG_HEARTBEAT=y
203# CONFIG_PUSH_SWITCH is not set 206# CONFIG_PUSH_SWITCH is not set
204 207
205# 208#
206# Kernel features 209# Kernel features
207# 210#
208CONFIG_HZ_100=y 211# CONFIG_HZ_100 is not set
209# CONFIG_HZ_250 is not set 212# CONFIG_HZ_250 is not set
210# CONFIG_HZ_300 is not set 213# CONFIG_HZ_300 is not set
211# CONFIG_HZ_1000 is not set 214CONFIG_HZ_1000=y
212CONFIG_HZ=100 215CONFIG_HZ=1000
213# CONFIG_KEXEC is not set 216# CONFIG_KEXEC is not set
214# CONFIG_CRASH_DUMP is not set 217# CONFIG_CRASH_DUMP is not set
215CONFIG_PREEMPT_NONE=y 218CONFIG_PREEMPT_NONE=y
@@ -221,11 +224,13 @@ CONFIG_PREEMPT_NONE=y
221# 224#
222CONFIG_ZERO_PAGE_OFFSET=0x00001000 225CONFIG_ZERO_PAGE_OFFSET=0x00001000
223CONFIG_BOOT_LINK_OFFSET=0x00800000 226CONFIG_BOOT_LINK_OFFSET=0x00800000
224# CONFIG_CMDLINE_BOOL is not set 227CONFIG_CMDLINE_BOOL=y
228CONFIG_CMDLINE="console=ttySC3,115200 earlyprintk=serial ignore_loglevel"
225 229
226# 230#
227# Bus options 231# Bus options
228# 232#
233# CONFIG_CF_ENABLER is not set
229# CONFIG_ARCH_SUPPORTS_MSI is not set 234# CONFIG_ARCH_SUPPORTS_MSI is not set
230 235
231# 236#
@@ -315,6 +320,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
315# CONFIG_MAC80211 is not set 320# CONFIG_MAC80211 is not set
316# CONFIG_IEEE80211 is not set 321# CONFIG_IEEE80211 is not set
317# CONFIG_RFKILL is not set 322# CONFIG_RFKILL is not set
323# CONFIG_NET_9P is not set
318 324
319# 325#
320# Device Drivers 326# Device Drivers
@@ -325,11 +331,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
325# 331#
326# CONFIG_STANDALONE is not set 332# CONFIG_STANDALONE is not set
327# CONFIG_PREVENT_FIRMWARE_BUILD is not set 333# CONFIG_PREVENT_FIRMWARE_BUILD is not set
334# CONFIG_DEBUG_DRIVER is not set
335# CONFIG_DEBUG_DEVRES is not set
328# CONFIG_SYS_HYPERVISOR is not set 336# CONFIG_SYS_HYPERVISOR is not set
329
330#
331# Connector - unified userspace <-> kernelspace linker
332#
333# CONFIG_CONNECTOR is not set 337# CONFIG_CONNECTOR is not set
334CONFIG_MTD=y 338CONFIG_MTD=y
335# CONFIG_MTD_DEBUG is not set 339# CONFIG_MTD_DEBUG is not set
@@ -411,31 +415,16 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=4
411# UBI - Unsorted block images 415# UBI - Unsorted block images
412# 416#
413# CONFIG_MTD_UBI is not set 417# CONFIG_MTD_UBI is not set
414
415#
416# Parallel port support
417#
418# CONFIG_PARPORT is not set 418# CONFIG_PARPORT is not set
419 419CONFIG_BLK_DEV=y
420#
421# Plug and Play support
422#
423# CONFIG_PNPACPI is not set
424
425#
426# Block devices
427#
428# CONFIG_BLK_DEV_COW_COMMON is not set 420# CONFIG_BLK_DEV_COW_COMMON is not set
429# CONFIG_BLK_DEV_LOOP is not set 421# CONFIG_BLK_DEV_LOOP is not set
430# CONFIG_BLK_DEV_NBD is not set 422# CONFIG_BLK_DEV_NBD is not set
431# CONFIG_BLK_DEV_RAM is not set 423# CONFIG_BLK_DEV_RAM is not set
432# CONFIG_CDROM_PKTCDVD is not set 424# CONFIG_CDROM_PKTCDVD is not set
433# CONFIG_ATA_OVER_ETH is not set 425# CONFIG_ATA_OVER_ETH is not set
434 426CONFIG_MISC_DEVICES=y
435# 427# CONFIG_EEPROM_93CX6 is not set
436# Misc devices
437#
438# CONFIG_BLINK is not set
439# CONFIG_IDE is not set 428# CONFIG_IDE is not set
440 429
441# 430#
@@ -443,27 +432,18 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=4
443# 432#
444# CONFIG_RAID_ATTRS is not set 433# CONFIG_RAID_ATTRS is not set
445# CONFIG_SCSI is not set 434# CONFIG_SCSI is not set
435# CONFIG_SCSI_DMA is not set
446# CONFIG_SCSI_NETLINK is not set 436# CONFIG_SCSI_NETLINK is not set
447# CONFIG_ATA is not set 437# CONFIG_ATA is not set
448
449#
450# Multi-device support (RAID and LVM)
451#
452# CONFIG_MD is not set 438# CONFIG_MD is not set
453
454#
455# Network device support
456#
457CONFIG_NETDEVICES=y 439CONFIG_NETDEVICES=y
440# CONFIG_NETDEVICES_MULTIQUEUE is not set
458# CONFIG_DUMMY is not set 441# CONFIG_DUMMY is not set
459# CONFIG_BONDING is not set 442# CONFIG_BONDING is not set
443# CONFIG_MACVLAN is not set
460# CONFIG_EQUALIZER is not set 444# CONFIG_EQUALIZER is not set
461# CONFIG_TUN is not set 445# CONFIG_TUN is not set
462# CONFIG_PHYLIB is not set 446# CONFIG_PHYLIB is not set
463
464#
465# Ethernet (10 or 100Mbit)
466#
467CONFIG_NET_ETHERNET=y 447CONFIG_NET_ETHERNET=y
468CONFIG_MII=y 448CONFIG_MII=y
469# CONFIG_STNIC is not set 449# CONFIG_STNIC is not set
@@ -483,15 +463,7 @@ CONFIG_NETDEV_10000=y
483# CONFIG_NETCONSOLE is not set 463# CONFIG_NETCONSOLE is not set
484# CONFIG_NETPOLL is not set 464# CONFIG_NETPOLL is not set
485# CONFIG_NET_POLL_CONTROLLER is not set 465# CONFIG_NET_POLL_CONTROLLER is not set
486
487#
488# ISDN subsystem
489#
490# CONFIG_ISDN is not set 466# CONFIG_ISDN is not set
491
492#
493# Telephony Support
494#
495# CONFIG_PHONE is not set 467# CONFIG_PHONE is not set
496 468
497# 469#
@@ -499,6 +471,7 @@ CONFIG_NETDEV_10000=y
499# 471#
500CONFIG_INPUT=y 472CONFIG_INPUT=y
501# CONFIG_INPUT_FF_MEMLESS is not set 473# CONFIG_INPUT_FF_MEMLESS is not set
474# CONFIG_INPUT_POLLDEV is not set
502 475
503# 476#
504# Userland interfaces 477# Userland interfaces
@@ -546,19 +519,11 @@ CONFIG_SERIAL_CORE=y
546CONFIG_SERIAL_CORE_CONSOLE=y 519CONFIG_SERIAL_CORE_CONSOLE=y
547# CONFIG_UNIX98_PTYS is not set 520# CONFIG_UNIX98_PTYS is not set
548# CONFIG_LEGACY_PTYS is not set 521# CONFIG_LEGACY_PTYS is not set
549
550#
551# IPMI
552#
553# CONFIG_IPMI_HANDLER is not set 522# CONFIG_IPMI_HANDLER is not set
554# CONFIG_WATCHDOG is not set 523# CONFIG_WATCHDOG is not set
555# CONFIG_HW_RANDOM is not set 524# CONFIG_HW_RANDOM is not set
556# CONFIG_R3964 is not set 525# CONFIG_R3964 is not set
557# CONFIG_RAW_DRIVER is not set 526# CONFIG_RAW_DRIVER is not set
558
559#
560# TPM devices
561#
562# CONFIG_TCG_TPM is not set 527# CONFIG_TCG_TPM is not set
563# CONFIG_I2C is not set 528# CONFIG_I2C is not set
564 529
@@ -567,11 +532,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y
567# 532#
568# CONFIG_SPI is not set 533# CONFIG_SPI is not set
569# CONFIG_SPI_MASTER is not set 534# CONFIG_SPI_MASTER is not set
570
571#
572# Dallas's 1-wire bus
573#
574# CONFIG_W1 is not set 535# CONFIG_W1 is not set
536# CONFIG_POWER_SUPPLY is not set
575# CONFIG_HWMON is not set 537# CONFIG_HWMON is not set
576 538
577# 539#
@@ -596,25 +558,21 @@ CONFIG_DAB=y
596# 558#
597# CONFIG_DISPLAY_SUPPORT is not set 559# CONFIG_DISPLAY_SUPPORT is not set
598# CONFIG_VGASTATE is not set 560# CONFIG_VGASTATE is not set
561CONFIG_VIDEO_OUTPUT_CONTROL=y
599# CONFIG_FB is not set 562# CONFIG_FB is not set
600 563
601# 564#
602# Sound 565# Sound
603# 566#
604# CONFIG_SOUND is not set 567# CONFIG_SOUND is not set
605 568CONFIG_HID_SUPPORT=y
606#
607# HID Devices
608#
609CONFIG_HID=y 569CONFIG_HID=y
610# CONFIG_HID_DEBUG is not set 570# CONFIG_HID_DEBUG is not set
611 571CONFIG_USB_SUPPORT=y
612# 572CONFIG_USB_ARCH_HAS_HCD=y
613# USB support
614#
615# CONFIG_USB_ARCH_HAS_HCD is not set
616# CONFIG_USB_ARCH_HAS_OHCI is not set 573# CONFIG_USB_ARCH_HAS_OHCI is not set
617# CONFIG_USB_ARCH_HAS_EHCI is not set 574# CONFIG_USB_ARCH_HAS_EHCI is not set
575# CONFIG_USB is not set
618 576
619# 577#
620# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 578# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -625,31 +583,7 @@ CONFIG_HID=y
625# 583#
626# CONFIG_USB_GADGET is not set 584# CONFIG_USB_GADGET is not set
627# CONFIG_MMC is not set 585# CONFIG_MMC is not set
628
629#
630# LED devices
631#
632# CONFIG_NEW_LEDS is not set 586# CONFIG_NEW_LEDS is not set
633
634#
635# LED drivers
636#
637
638#
639# LED Triggers
640#
641
642#
643# InfiniBand support
644#
645
646#
647# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
648#
649
650#
651# Real Time Clock
652#
653# CONFIG_RTC_CLASS is not set 587# CONFIG_RTC_CLASS is not set
654 588
655# 589#
@@ -666,6 +600,11 @@ CONFIG_HID=y
666# 600#
667 601
668# 602#
603# Userspace I/O
604#
605# CONFIG_UIO is not set
606
607#
669# File systems 608# File systems
670# 609#
671# CONFIG_EXT2_FS is not set 610# CONFIG_EXT2_FS is not set
@@ -736,7 +675,6 @@ CONFIG_RAMFS=y
736# CONFIG_NCP_FS is not set 675# CONFIG_NCP_FS is not set
737# CONFIG_CODA_FS is not set 676# CONFIG_CODA_FS is not set
738# CONFIG_AFS_FS is not set 677# CONFIG_AFS_FS is not set
739# CONFIG_9P_FS is not set
740 678
741# 679#
742# Partition Types 680# Partition Types
@@ -752,12 +690,12 @@ CONFIG_MSDOS_PARTITION=y
752# 690#
753# Distributed Lock Manager 691# Distributed Lock Manager
754# 692#
755# CONFIG_DLM is not set
756 693
757# 694#
758# Profiling support 695# Profiling support
759# 696#
760# CONFIG_PROFILING is not set 697CONFIG_PROFILING=y
698# CONFIG_OPROFILE is not set
761 699
762# 700#
763# Kernel hacking 701# Kernel hacking
@@ -768,19 +706,41 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
768# CONFIG_MAGIC_SYSRQ is not set 706# CONFIG_MAGIC_SYSRQ is not set
769# CONFIG_UNUSED_SYMBOLS is not set 707# CONFIG_UNUSED_SYMBOLS is not set
770# CONFIG_HEADERS_CHECK is not set 708# CONFIG_HEADERS_CHECK is not set
771# CONFIG_DEBUG_KERNEL is not set 709CONFIG_DEBUG_KERNEL=y
772# CONFIG_DEBUG_BUGVERBOSE is not set 710# CONFIG_DEBUG_SHIRQ is not set
711CONFIG_DETECT_SOFTLOCKUP=y
712CONFIG_SCHED_DEBUG=y
713# CONFIG_SCHEDSTATS is not set
714# CONFIG_TIMER_STATS is not set
715CONFIG_SLUB_DEBUG_ON=y
716# CONFIG_DEBUG_SPINLOCK is not set
717# CONFIG_DEBUG_MUTEXES is not set
718# CONFIG_DEBUG_LOCK_ALLOC is not set
719# CONFIG_PROVE_LOCKING is not set
720# CONFIG_LOCK_STAT is not set
721CONFIG_DEBUG_SPINLOCK_SLEEP=y
722# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
723# CONFIG_DEBUG_KOBJECT is not set
724CONFIG_DEBUG_BUGVERBOSE=y
725CONFIG_DEBUG_INFO=y
726# CONFIG_DEBUG_VM is not set
727# CONFIG_DEBUG_LIST is not set
728CONFIG_FRAME_POINTER=y
729CONFIG_FORCED_INLINING=y
730# CONFIG_FAULT_INJECTION is not set
773# CONFIG_SH_STANDARD_BIOS is not set 731# CONFIG_SH_STANDARD_BIOS is not set
774# CONFIG_EARLY_SCIF_CONSOLE is not set 732CONFIG_EARLY_SCIF_CONSOLE=y
733CONFIG_EARLY_SCIF_CONSOLE_PORT=0xfffe9800
734CONFIG_EARLY_PRINTK=y
735# CONFIG_DEBUG_BOOTMEM is not set
736CONFIG_DEBUG_STACKOVERFLOW=y
737CONFIG_DEBUG_STACK_USAGE=y
738# CONFIG_4KSTACKS is not set
775 739
776# 740#
777# Security options 741# Security options
778# 742#
779# CONFIG_KEYS is not set 743# CONFIG_KEYS is not set
780
781#
782# Cryptographic options
783#
784# CONFIG_CRYPTO is not set 744# CONFIG_CRYPTO is not set
785 745
786# 746#
@@ -791,6 +751,7 @@ CONFIG_BITREVERSE=y
791# CONFIG_CRC16 is not set 751# CONFIG_CRC16 is not set
792# CONFIG_CRC_ITU_T is not set 752# CONFIG_CRC_ITU_T is not set
793CONFIG_CRC32=y 753CONFIG_CRC32=y
754# CONFIG_CRC7 is not set
794# CONFIG_LIBCRC32C is not set 755# CONFIG_LIBCRC32C is not set
795CONFIG_ZLIB_INFLATE=y 756CONFIG_ZLIB_INFLATE=y
796CONFIG_HAS_IOMEM=y 757CONFIG_HAS_IOMEM=y
diff --git a/arch/sh/configs/shx3_defconfig b/arch/sh/configs/shx3_defconfig
index 219bad558b10..a794c082709b 100644
--- a/arch/sh/configs/shx3_defconfig
+++ b/arch/sh/configs/shx3_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22-rc4 3# Linux kernel version: 2.6.23-rc7
4# Wed Jun 20 14:09:27 2007 4# Fri Sep 21 19:07:30 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
@@ -13,32 +13,33 @@ CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y 13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_TIME=y 14CONFIG_GENERIC_TIME=y
15CONFIG_GENERIC_CLOCKEVENTS=y 15CONFIG_GENERIC_CLOCKEVENTS=y
16CONFIG_SYS_SUPPORTS_SMP=y
17CONFIG_SYS_SUPPORTS_NUMA=y
16CONFIG_STACKTRACE_SUPPORT=y 18CONFIG_STACKTRACE_SUPPORT=y
17CONFIG_LOCKDEP_SUPPORT=y 19CONFIG_LOCKDEP_SUPPORT=y
18# CONFIG_ARCH_HAS_ILOG2_U32 is not set 20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
19# CONFIG_ARCH_HAS_ILOG2_U64 is not set 21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_ARCH_NO_VIRT_TO_BUS=y
20CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
21 24
22# 25#
23# Code maturity level options 26# General setup
24# 27#
25CONFIG_EXPERIMENTAL=y 28CONFIG_EXPERIMENTAL=y
26CONFIG_BROKEN_ON_SMP=y 29CONFIG_BROKEN_ON_SMP=y
27CONFIG_LOCK_KERNEL=y 30CONFIG_LOCK_KERNEL=y
28CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
29
30#
31# General setup
32#
33CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
35CONFIG_SWAP=y 34CONFIG_SWAP=y
36CONFIG_SYSVIPC=y 35CONFIG_SYSVIPC=y
37# CONFIG_IPC_NS is not set
38CONFIG_SYSVIPC_SYSCTL=y 36CONFIG_SYSVIPC_SYSCTL=y
37# CONFIG_POSIX_MQUEUE is not set
39CONFIG_BSD_PROCESS_ACCT=y 38CONFIG_BSD_PROCESS_ACCT=y
40# CONFIG_BSD_PROCESS_ACCT_V3 is not set 39# CONFIG_BSD_PROCESS_ACCT_V3 is not set
41# CONFIG_UTS_NS is not set 40# CONFIG_TASKSTATS is not set
41# CONFIG_USER_NS is not set
42# CONFIG_AUDIT is not set
42CONFIG_IKCONFIG=y 43CONFIG_IKCONFIG=y
43CONFIG_IKCONFIG_PROC=y 44CONFIG_IKCONFIG_PROC=y
44CONFIG_LOG_BUF_SHIFT=14 45CONFIG_LOG_BUF_SHIFT=14
@@ -63,34 +64,26 @@ CONFIG_FUTEX=y
63CONFIG_ANON_INODES=y 64CONFIG_ANON_INODES=y
64CONFIG_EPOLL=y 65CONFIG_EPOLL=y
65CONFIG_SIGNALFD=y 66CONFIG_SIGNALFD=y
66CONFIG_TIMERFD=y
67CONFIG_EVENTFD=y 67CONFIG_EVENTFD=y
68CONFIG_SHMEM=y 68CONFIG_SHMEM=y
69CONFIG_VM_EVENT_COUNTERS=y 69CONFIG_VM_EVENT_COUNTERS=y
70CONFIG_SLAB=y 70# CONFIG_SLAB is not set
71# CONFIG_SLUB is not set 71# CONFIG_SLUB is not set
72# CONFIG_SLOB is not set 72CONFIG_SLOB=y
73CONFIG_RT_MUTEXES=y 73CONFIG_RT_MUTEXES=y
74# CONFIG_TINY_SHMEM is not set 74# CONFIG_TINY_SHMEM is not set
75CONFIG_BASE_SMALL=0 75CONFIG_BASE_SMALL=0
76
77#
78# Loadable module support
79#
80CONFIG_MODULES=y 76CONFIG_MODULES=y
81CONFIG_MODULE_UNLOAD=y 77CONFIG_MODULE_UNLOAD=y
82# CONFIG_MODULE_FORCE_UNLOAD is not set 78# CONFIG_MODULE_FORCE_UNLOAD is not set
83# CONFIG_MODVERSIONS is not set 79# CONFIG_MODVERSIONS is not set
84# CONFIG_MODULE_SRCVERSION_ALL is not set 80# CONFIG_MODULE_SRCVERSION_ALL is not set
85CONFIG_KMOD=y 81CONFIG_KMOD=y
86
87#
88# Block layer
89#
90CONFIG_BLOCK=y 82CONFIG_BLOCK=y
91# CONFIG_LBD is not set 83# CONFIG_LBD is not set
92# CONFIG_BLK_DEV_IO_TRACE is not set 84# CONFIG_BLK_DEV_IO_TRACE is not set
93# CONFIG_LSF is not set 85# CONFIG_LSF is not set
86# CONFIG_BLK_DEV_BSG is not set
94 87
95# 88#
96# IO Schedulers 89# IO Schedulers
@@ -113,7 +106,6 @@ CONFIG_CPU_SH4A=y
113CONFIG_CPU_SHX3=y 106CONFIG_CPU_SHX3=y
114# CONFIG_CPU_SUBTYPE_SH7619 is not set 107# CONFIG_CPU_SUBTYPE_SH7619 is not set
115# CONFIG_CPU_SUBTYPE_SH7206 is not set 108# CONFIG_CPU_SUBTYPE_SH7206 is not set
116# CONFIG_CPU_SUBTYPE_SH7300 is not set
117# CONFIG_CPU_SUBTYPE_SH7705 is not set 109# CONFIG_CPU_SUBTYPE_SH7705 is not set
118# CONFIG_CPU_SUBTYPE_SH7706 is not set 110# CONFIG_CPU_SUBTYPE_SH7706 is not set
119# CONFIG_CPU_SUBTYPE_SH7707 is not set 111# CONFIG_CPU_SUBTYPE_SH7707 is not set
@@ -121,6 +113,7 @@ CONFIG_CPU_SHX3=y
121# CONFIG_CPU_SUBTYPE_SH7709 is not set 113# CONFIG_CPU_SUBTYPE_SH7709 is not set
122# CONFIG_CPU_SUBTYPE_SH7710 is not set 114# CONFIG_CPU_SUBTYPE_SH7710 is not set
123# CONFIG_CPU_SUBTYPE_SH7712 is not set 115# CONFIG_CPU_SUBTYPE_SH7712 is not set
116# CONFIG_CPU_SUBTYPE_SH7720 is not set
124# CONFIG_CPU_SUBTYPE_SH7750 is not set 117# CONFIG_CPU_SUBTYPE_SH7750 is not set
125# CONFIG_CPU_SUBTYPE_SH7091 is not set 118# CONFIG_CPU_SUBTYPE_SH7091 is not set
126# CONFIG_CPU_SUBTYPE_SH7750R is not set 119# CONFIG_CPU_SUBTYPE_SH7750R is not set
@@ -135,7 +128,6 @@ CONFIG_CPU_SHX3=y
135# CONFIG_CPU_SUBTYPE_SH7780 is not set 128# CONFIG_CPU_SUBTYPE_SH7780 is not set
136# CONFIG_CPU_SUBTYPE_SH7785 is not set 129# CONFIG_CPU_SUBTYPE_SH7785 is not set
137CONFIG_CPU_SUBTYPE_SHX3=y 130CONFIG_CPU_SUBTYPE_SHX3=y
138# CONFIG_CPU_SUBTYPE_SH73180 is not set
139# CONFIG_CPU_SUBTYPE_SH7343 is not set 131# CONFIG_CPU_SUBTYPE_SH7343 is not set
140# CONFIG_CPU_SUBTYPE_SH7722 is not set 132# CONFIG_CPU_SUBTYPE_SH7722 is not set
141 133
@@ -148,12 +140,15 @@ CONFIG_PAGE_OFFSET=0x80000000
148CONFIG_MEMORY_START=0x0c000000 140CONFIG_MEMORY_START=0x0c000000
149CONFIG_MEMORY_SIZE=0x04000000 141CONFIG_MEMORY_SIZE=0x04000000
150CONFIG_VSYSCALL=y 142CONFIG_VSYSCALL=y
143# CONFIG_NUMA is not set
151CONFIG_ARCH_FLATMEM_ENABLE=y 144CONFIG_ARCH_FLATMEM_ENABLE=y
152CONFIG_ARCH_SPARSEMEM_ENABLE=y 145CONFIG_ARCH_SPARSEMEM_ENABLE=y
153CONFIG_ARCH_SPARSEMEM_DEFAULT=y 146CONFIG_ARCH_SPARSEMEM_DEFAULT=y
154CONFIG_MAX_ACTIVE_REGIONS=1 147CONFIG_MAX_ACTIVE_REGIONS=6
155CONFIG_ARCH_POPULATES_NODE_MAP=y 148CONFIG_ARCH_POPULATES_NODE_MAP=y
156CONFIG_ARCH_SELECT_MEMORY_MODEL=y 149CONFIG_ARCH_SELECT_MEMORY_MODEL=y
150CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
151CONFIG_ARCH_MEMORY_PROBE=y
157CONFIG_PAGE_SIZE_4KB=y 152CONFIG_PAGE_SIZE_4KB=y
158# CONFIG_PAGE_SIZE_8KB is not set 153# CONFIG_PAGE_SIZE_8KB is not set
159# CONFIG_PAGE_SIZE_64KB is not set 154# CONFIG_PAGE_SIZE_64KB is not set
@@ -163,12 +158,14 @@ CONFIG_HUGETLB_PAGE_SIZE_64K=y
163# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set 158# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
164# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set 159# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
165CONFIG_SELECT_MEMORY_MODEL=y 160CONFIG_SELECT_MEMORY_MODEL=y
166CONFIG_FLATMEM_MANUAL=y 161# CONFIG_FLATMEM_MANUAL is not set
167# CONFIG_DISCONTIGMEM_MANUAL is not set 162# CONFIG_DISCONTIGMEM_MANUAL is not set
168# CONFIG_SPARSEMEM_MANUAL is not set 163CONFIG_SPARSEMEM_MANUAL=y
169CONFIG_FLATMEM=y 164CONFIG_SPARSEMEM=y
170CONFIG_FLAT_NODE_MEM_MAP=y 165CONFIG_HAVE_MEMORY_PRESENT=y
171CONFIG_SPARSEMEM_STATIC=y 166CONFIG_SPARSEMEM_STATIC=y
167CONFIG_MEMORY_HOTPLUG=y
168CONFIG_MEMORY_HOTPLUG_SPARSE=y
172CONFIG_SPLIT_PTLOCK_CPUS=4 169CONFIG_SPLIT_PTLOCK_CPUS=4
173# CONFIG_RESOURCES_64BIT is not set 170# CONFIG_RESOURCES_64BIT is not set
174CONFIG_ZONE_DMA_FLAG=0 171CONFIG_ZONE_DMA_FLAG=0
@@ -178,24 +175,25 @@ CONFIG_NR_QUICK=2
178# Cache configuration 175# Cache configuration
179# 176#
180# CONFIG_SH_DIRECT_MAPPED is not set 177# CONFIG_SH_DIRECT_MAPPED is not set
181# CONFIG_SH_WRITETHROUGH is not set 178# CONFIG_CACHE_WRITEBACK is not set
179# CONFIG_CACHE_WRITETHROUGH is not set
180CONFIG_CACHE_OFF=y
182 181
183# 182#
184# Processor features 183# Processor features
185# 184#
186CONFIG_CPU_LITTLE_ENDIAN=y 185CONFIG_CPU_LITTLE_ENDIAN=y
187# CONFIG_CPU_BIG_ENDIAN is not set 186# CONFIG_CPU_BIG_ENDIAN is not set
188# CONFIG_SH_FPU is not set 187CONFIG_SH_FPU=y
189# CONFIG_SH_FPU_EMU is not set
190CONFIG_SH_DSP=y
191CONFIG_SH_STORE_QUEUES=y 188CONFIG_SH_STORE_QUEUES=y
192CONFIG_CPU_HAS_INTEVT=y 189CONFIG_CPU_HAS_INTEVT=y
193CONFIG_CPU_HAS_INTC2_IRQ=y
194CONFIG_CPU_HAS_SR_RB=y 190CONFIG_CPU_HAS_SR_RB=y
191CONFIG_CPU_HAS_FPU=y
195 192
196# 193#
197# Board support 194# Board support
198# 195#
196CONFIG_SH_X3PROTO=y
199 197
200# 198#
201# Timer and clock configuration 199# Timer and clock configuration
@@ -204,13 +202,25 @@ CONFIG_SH_TMU=y
204CONFIG_SH_TIMER_IRQ=16 202CONFIG_SH_TIMER_IRQ=16
205CONFIG_SH_PCLK_FREQ=50000000 203CONFIG_SH_PCLK_FREQ=50000000
206CONFIG_TICK_ONESHOT=y 204CONFIG_TICK_ONESHOT=y
207CONFIG_NO_HZ=y 205# CONFIG_NO_HZ is not set
208CONFIG_HIGH_RES_TIMERS=y 206CONFIG_HIGH_RES_TIMERS=y
209 207
210# 208#
211# CPU Frequency scaling 209# CPU Frequency scaling
212# 210#
213# CONFIG_CPU_FREQ is not set 211CONFIG_CPU_FREQ=y
212CONFIG_CPU_FREQ_TABLE=y
213# CONFIG_CPU_FREQ_DEBUG is not set
214CONFIG_CPU_FREQ_STAT=y
215# CONFIG_CPU_FREQ_STAT_DETAILS is not set
216CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
217# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
218CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
219CONFIG_CPU_FREQ_GOV_POWERSAVE=m
220CONFIG_CPU_FREQ_GOV_USERSPACE=m
221CONFIG_CPU_FREQ_GOV_ONDEMAND=m
222CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
223CONFIG_SH_CPU_FREQ=y
214 224
215# 225#
216# DMA support 226# DMA support
@@ -237,6 +247,7 @@ CONFIG_HZ_250=y
237CONFIG_HZ=250 247CONFIG_HZ=250
238CONFIG_KEXEC=y 248CONFIG_KEXEC=y
239# CONFIG_CRASH_DUMP is not set 249# CONFIG_CRASH_DUMP is not set
250# CONFIG_SMP is not set
240# CONFIG_PREEMPT_NONE is not set 251# CONFIG_PREEMPT_NONE is not set
241# CONFIG_PREEMPT_VOLUNTARY is not set 252# CONFIG_PREEMPT_VOLUNTARY is not set
242CONFIG_PREEMPT=y 253CONFIG_PREEMPT=y
@@ -249,7 +260,7 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
249CONFIG_BOOT_LINK_OFFSET=0x00800000 260CONFIG_BOOT_LINK_OFFSET=0x00800000
250# CONFIG_UBC_WAKEUP is not set 261# CONFIG_UBC_WAKEUP is not set
251CONFIG_CMDLINE_BOOL=y 262CONFIG_CMDLINE_BOOL=y
252CONFIG_CMDLINE="console=ttySC0,115200 ip=192.168.1.2:::255.255.255.0 root=/dev/nfs nfsroot=192.168.1.1:/exports/devel/rfs/mobiler noaliencache earlyprintk=bios ignore_loglevel" 263CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=bios ignore_loglevel"
253 264
254# 265#
255# Bus options 266# Bus options
@@ -265,12 +276,106 @@ CONFIG_CMDLINE="console=ttySC0,115200 ip=192.168.1.2:::255.255.255.0 root=/dev/n
265# Executable file formats 276# Executable file formats
266# 277#
267CONFIG_BINFMT_ELF=y 278CONFIG_BINFMT_ELF=y
268# CONFIG_BINFMT_MISC is not set 279CONFIG_BINFMT_MISC=y
269 280
270# 281#
271# Networking 282# Networking
272# 283#
273# CONFIG_NET is not set 284CONFIG_NET=y
285
286#
287# Networking options
288#
289# CONFIG_PACKET is not set
290# CONFIG_UNIX is not set
291CONFIG_XFRM=y
292# CONFIG_XFRM_USER is not set
293# CONFIG_XFRM_SUB_POLICY is not set
294# CONFIG_XFRM_MIGRATE is not set
295# CONFIG_NET_KEY is not set
296CONFIG_INET=y
297# CONFIG_IP_MULTICAST is not set
298# CONFIG_IP_ADVANCED_ROUTER is not set
299CONFIG_IP_FIB_HASH=y
300CONFIG_IP_PNP=y
301CONFIG_IP_PNP_DHCP=y
302# CONFIG_IP_PNP_BOOTP is not set
303# CONFIG_IP_PNP_RARP is not set
304# CONFIG_NET_IPIP is not set
305# CONFIG_NET_IPGRE is not set
306# CONFIG_ARPD is not set
307# CONFIG_SYN_COOKIES is not set
308# CONFIG_INET_AH is not set
309# CONFIG_INET_ESP is not set
310# CONFIG_INET_IPCOMP is not set
311# CONFIG_INET_XFRM_TUNNEL is not set
312CONFIG_INET_TUNNEL=m
313CONFIG_INET_XFRM_MODE_TRANSPORT=y
314CONFIG_INET_XFRM_MODE_TUNNEL=y
315CONFIG_INET_XFRM_MODE_BEET=y
316CONFIG_INET_DIAG=y
317CONFIG_INET_TCP_DIAG=y
318# CONFIG_TCP_CONG_ADVANCED is not set
319CONFIG_TCP_CONG_CUBIC=y
320CONFIG_DEFAULT_TCP_CONG="cubic"
321# CONFIG_TCP_MD5SIG is not set
322CONFIG_IPV6=m
323# CONFIG_IPV6_PRIVACY is not set
324# CONFIG_IPV6_ROUTER_PREF is not set
325# CONFIG_IPV6_OPTIMISTIC_DAD is not set
326# CONFIG_INET6_AH is not set
327# CONFIG_INET6_ESP is not set
328# CONFIG_INET6_IPCOMP is not set
329# CONFIG_IPV6_MIP6 is not set
330# CONFIG_INET6_XFRM_TUNNEL is not set
331# CONFIG_INET6_TUNNEL is not set
332CONFIG_INET6_XFRM_MODE_TRANSPORT=m
333CONFIG_INET6_XFRM_MODE_TUNNEL=m
334CONFIG_INET6_XFRM_MODE_BEET=m
335# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
336CONFIG_IPV6_SIT=m
337# CONFIG_IPV6_TUNNEL is not set
338# CONFIG_IPV6_MULTIPLE_TABLES is not set
339# CONFIG_NETWORK_SECMARK is not set
340# CONFIG_NETFILTER is not set
341# CONFIG_IP_DCCP is not set
342# CONFIG_IP_SCTP is not set
343# CONFIG_TIPC is not set
344# CONFIG_ATM is not set
345# CONFIG_BRIDGE is not set
346# CONFIG_VLAN_8021Q is not set
347# CONFIG_DECNET is not set
348# CONFIG_LLC2 is not set
349# CONFIG_IPX is not set
350# CONFIG_ATALK is not set
351# CONFIG_X25 is not set
352# CONFIG_LAPB is not set
353# CONFIG_ECONET is not set
354# CONFIG_WAN_ROUTER is not set
355
356#
357# QoS and/or fair queueing
358#
359# CONFIG_NET_SCHED is not set
360
361#
362# Network testing
363#
364# CONFIG_NET_PKTGEN is not set
365# CONFIG_HAMRADIO is not set
366# CONFIG_IRDA is not set
367# CONFIG_BT is not set
368# CONFIG_AF_RXRPC is not set
369
370#
371# Wireless
372#
373# CONFIG_CFG80211 is not set
374# CONFIG_WIRELESS_EXT is not set
375# CONFIG_MAC80211 is not set
376# CONFIG_IEEE80211 is not set
377# CONFIG_RFKILL is not set
378# CONFIG_NET_9P is not set
274 379
275# 380#
276# Device Drivers 381# Device Drivers
@@ -285,37 +390,21 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
285# CONFIG_DEBUG_DRIVER is not set 390# CONFIG_DEBUG_DRIVER is not set
286# CONFIG_DEBUG_DEVRES is not set 391# CONFIG_DEBUG_DEVRES is not set
287# CONFIG_SYS_HYPERVISOR is not set 392# CONFIG_SYS_HYPERVISOR is not set
288 393# CONFIG_CONNECTOR is not set
289#
290# Connector - unified userspace <-> kernelspace linker
291#
292# CONFIG_MTD is not set 394# CONFIG_MTD is not set
293
294#
295# Parallel port support
296#
297# CONFIG_PARPORT is not set 395# CONFIG_PARPORT is not set
298 396CONFIG_BLK_DEV=y
299#
300# Plug and Play support
301#
302# CONFIG_PNPACPI is not set
303
304#
305# Block devices
306#
307# CONFIG_BLK_DEV_COW_COMMON is not set 397# CONFIG_BLK_DEV_COW_COMMON is not set
308# CONFIG_BLK_DEV_LOOP is not set 398# CONFIG_BLK_DEV_LOOP is not set
399# CONFIG_BLK_DEV_NBD is not set
309CONFIG_BLK_DEV_RAM=y 400CONFIG_BLK_DEV_RAM=y
310CONFIG_BLK_DEV_RAM_COUNT=16 401CONFIG_BLK_DEV_RAM_COUNT=16
311CONFIG_BLK_DEV_RAM_SIZE=4096 402CONFIG_BLK_DEV_RAM_SIZE=4096
312CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 403CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
313# CONFIG_CDROM_PKTCDVD is not set 404# CONFIG_CDROM_PKTCDVD is not set
314 405# CONFIG_ATA_OVER_ETH is not set
315# 406CONFIG_MISC_DEVICES=y
316# Misc devices 407# CONFIG_EEPROM_93CX6 is not set
317#
318# CONFIG_BLINK is not set
319# CONFIG_IDE is not set 408# CONFIG_IDE is not set
320 409
321# 410#
@@ -323,6 +412,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
323# 412#
324# CONFIG_RAID_ATTRS is not set 413# CONFIG_RAID_ATTRS is not set
325CONFIG_SCSI=y 414CONFIG_SCSI=y
415CONFIG_SCSI_DMA=y
326# CONFIG_SCSI_TGT is not set 416# CONFIG_SCSI_TGT is not set
327# CONFIG_SCSI_NETLINK is not set 417# CONFIG_SCSI_NETLINK is not set
328CONFIG_SCSI_PROC_FS=y 418CONFIG_SCSI_PROC_FS=y
@@ -351,73 +441,54 @@ CONFIG_SCSI_WAIT_SCAN=m
351# 441#
352# CONFIG_SCSI_SPI_ATTRS is not set 442# CONFIG_SCSI_SPI_ATTRS is not set
353# CONFIG_SCSI_FC_ATTRS is not set 443# CONFIG_SCSI_FC_ATTRS is not set
354# CONFIG_SCSI_SAS_ATTRS is not set 444# CONFIG_SCSI_ISCSI_ATTRS is not set
355# CONFIG_SCSI_SAS_LIBSAS is not set 445# CONFIG_SCSI_SAS_LIBSAS is not set
356 446CONFIG_SCSI_LOWLEVEL=y
357# 447# CONFIG_ISCSI_TCP is not set
358# SCSI low-level drivers
359#
360# CONFIG_SCSI_DEBUG is not set 448# CONFIG_SCSI_DEBUG is not set
361CONFIG_ATA=y 449CONFIG_ATA=y
362# CONFIG_ATA_NONSTANDARD is not set 450# CONFIG_ATA_NONSTANDARD is not set
363CONFIG_PATA_PLATFORM=y 451CONFIG_PATA_PLATFORM=y
364
365#
366# Multi-device support (RAID and LVM)
367#
368# CONFIG_MD is not set 452# CONFIG_MD is not set
369 453CONFIG_NETDEVICES=y
370# 454# CONFIG_NETDEVICES_MULTIQUEUE is not set
371# ISDN subsystem 455# CONFIG_DUMMY is not set
372# 456# CONFIG_BONDING is not set
373 457# CONFIG_MACVLAN is not set
374# 458# CONFIG_EQUALIZER is not set
375# Telephony Support 459# CONFIG_TUN is not set
376# 460# CONFIG_PHYLIB is not set
461CONFIG_NET_ETHERNET=y
462CONFIG_MII=y
463# CONFIG_STNIC is not set
464CONFIG_SMC91X=y
465# CONFIG_NETDEV_1000 is not set
466# CONFIG_NETDEV_10000 is not set
467
468#
469# Wireless LAN
470#
471# CONFIG_WLAN_PRE80211 is not set
472# CONFIG_WLAN_80211 is not set
473# CONFIG_WAN is not set
474# CONFIG_PPP is not set
475# CONFIG_SLIP is not set
476# CONFIG_SHAPER is not set
477# CONFIG_NETCONSOLE is not set
478# CONFIG_NETPOLL is not set
479# CONFIG_NET_POLL_CONTROLLER is not set
480# CONFIG_ISDN is not set
377# CONFIG_PHONE is not set 481# CONFIG_PHONE is not set
378 482
379# 483#
380# Input device support 484# Input device support
381# 485#
382CONFIG_INPUT=y 486# CONFIG_INPUT is not set
383# CONFIG_INPUT_FF_MEMLESS is not set
384
385#
386# Userland interfaces
387#
388CONFIG_INPUT_MOUSEDEV=y
389# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
390CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
391CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
392# CONFIG_INPUT_JOYDEV is not set
393# CONFIG_INPUT_TSDEV is not set
394# CONFIG_INPUT_EVDEV is not set
395# CONFIG_INPUT_EVBUG is not set
396
397#
398# Input Device Drivers
399#
400CONFIG_INPUT_KEYBOARD=y
401CONFIG_KEYBOARD_ATKBD=y
402# CONFIG_KEYBOARD_SUNKBD is not set
403# CONFIG_KEYBOARD_LKKBD is not set
404# CONFIG_KEYBOARD_XTKBD is not set
405# CONFIG_KEYBOARD_NEWTON is not set
406# CONFIG_KEYBOARD_STOWAWAY is not set
407# CONFIG_INPUT_MOUSE is not set
408# CONFIG_INPUT_JOYSTICK is not set
409# CONFIG_INPUT_TABLET is not set
410# CONFIG_INPUT_TOUCHSCREEN is not set
411# CONFIG_INPUT_MISC is not set
412 487
413# 488#
414# Hardware I/O ports 489# Hardware I/O ports
415# 490#
416CONFIG_SERIO=y 491# CONFIG_SERIO is not set
417# CONFIG_SERIO_I8042 is not set
418# CONFIG_SERIO_SERPORT is not set
419CONFIG_SERIO_LIBPS2=y
420# CONFIG_SERIO_RAW is not set
421# CONFIG_GAMEPORT is not set 492# CONFIG_GAMEPORT is not set
422 493
423# 494#
@@ -442,19 +513,18 @@ CONFIG_SERIAL_CORE_CONSOLE=y
442CONFIG_UNIX98_PTYS=y 513CONFIG_UNIX98_PTYS=y
443CONFIG_LEGACY_PTYS=y 514CONFIG_LEGACY_PTYS=y
444CONFIG_LEGACY_PTY_COUNT=256 515CONFIG_LEGACY_PTY_COUNT=256
516# CONFIG_IPMI_HANDLER is not set
517CONFIG_WATCHDOG=y
518# CONFIG_WATCHDOG_NOWAYOUT is not set
445 519
446# 520#
447# IPMI 521# Watchdog Device Drivers
448# 522#
449# CONFIG_IPMI_HANDLER is not set 523# CONFIG_SOFT_WATCHDOG is not set
450# CONFIG_WATCHDOG is not set 524# CONFIG_SH_WDT is not set
451CONFIG_HW_RANDOM=y 525# CONFIG_HW_RANDOM is not set
452# CONFIG_R3964 is not set 526# CONFIG_R3964 is not set
453# CONFIG_RAW_DRIVER is not set 527# CONFIG_RAW_DRIVER is not set
454
455#
456# TPM devices
457#
458# CONFIG_TCG_TPM is not set 528# CONFIG_TCG_TPM is not set
459# CONFIG_I2C is not set 529# CONFIG_I2C is not set
460 530
@@ -463,11 +533,8 @@ CONFIG_HW_RANDOM=y
463# 533#
464# CONFIG_SPI is not set 534# CONFIG_SPI is not set
465# CONFIG_SPI_MASTER is not set 535# CONFIG_SPI_MASTER is not set
466
467#
468# Dallas's 1-wire bus
469#
470# CONFIG_W1 is not set 536# CONFIG_W1 is not set
537# CONFIG_POWER_SUPPLY is not set
471# CONFIG_HWMON is not set 538# CONFIG_HWMON is not set
472 539
473# 540#
@@ -479,6 +546,7 @@ CONFIG_HW_RANDOM=y
479# Multimedia devices 546# Multimedia devices
480# 547#
481# CONFIG_VIDEO_DEV is not set 548# CONFIG_VIDEO_DEV is not set
549# CONFIG_DVB_CORE is not set
482# CONFIG_DAB is not set 550# CONFIG_DAB is not set
483 551
484# 552#
@@ -491,24 +559,18 @@ CONFIG_HW_RANDOM=y
491# 559#
492# CONFIG_DISPLAY_SUPPORT is not set 560# CONFIG_DISPLAY_SUPPORT is not set
493# CONFIG_VGASTATE is not set 561# CONFIG_VGASTATE is not set
562CONFIG_VIDEO_OUTPUT_CONTROL=m
494# CONFIG_FB is not set 563# CONFIG_FB is not set
495 564
496# 565#
497# Sound 566# Sound
498# 567#
499# CONFIG_SOUND is not set 568# CONFIG_SOUND is not set
500 569CONFIG_USB_SUPPORT=y
501# 570CONFIG_USB_ARCH_HAS_HCD=y
502# HID Devices
503#
504# CONFIG_HID is not set
505
506#
507# USB support
508#
509# CONFIG_USB_ARCH_HAS_HCD is not set
510# CONFIG_USB_ARCH_HAS_OHCI is not set 571# CONFIG_USB_ARCH_HAS_OHCI is not set
511# CONFIG_USB_ARCH_HAS_EHCI is not set 572# CONFIG_USB_ARCH_HAS_EHCI is not set
573# CONFIG_USB is not set
512 574
513# 575#
514# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 576# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -517,68 +579,32 @@ CONFIG_HW_RANDOM=y
517# 579#
518# USB Gadget Support 580# USB Gadget Support
519# 581#
520# CONFIG_USB_GADGET is not set 582CONFIG_USB_GADGET=y
583# CONFIG_USB_GADGET_DEBUG is not set
584# CONFIG_USB_GADGET_DEBUG_FILES is not set
585CONFIG_USB_GADGET_SELECTED=y
586# CONFIG_USB_GADGET_AMD5536UDC is not set
587# CONFIG_USB_GADGET_FSL_USB2 is not set
588# CONFIG_USB_GADGET_NET2280 is not set
589# CONFIG_USB_GADGET_PXA2XX is not set
590CONFIG_USB_GADGET_M66592=y
591CONFIG_USB_M66592=y
592# CONFIG_USB_GADGET_GOKU is not set
593# CONFIG_USB_GADGET_LH7A40X is not set
594# CONFIG_USB_GADGET_OMAP is not set
595# CONFIG_USB_GADGET_S3C2410 is not set
596# CONFIG_USB_GADGET_AT91 is not set
597# CONFIG_USB_GADGET_DUMMY_HCD is not set
598CONFIG_USB_GADGET_DUALSPEED=y
599# CONFIG_USB_ZERO is not set
600# CONFIG_USB_ETH is not set
601# CONFIG_USB_GADGETFS is not set
602# CONFIG_USB_FILE_STORAGE is not set
603# CONFIG_USB_G_SERIAL is not set
604# CONFIG_USB_MIDI_GADGET is not set
521# CONFIG_MMC is not set 605# CONFIG_MMC is not set
522
523#
524# LED devices
525#
526# CONFIG_NEW_LEDS is not set 606# CONFIG_NEW_LEDS is not set
527 607# CONFIG_RTC_CLASS is not set
528#
529# LED drivers
530#
531
532#
533# LED Triggers
534#
535
536#
537# InfiniBand support
538#
539
540#
541# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
542#
543
544#
545# Real Time Clock
546#
547CONFIG_RTC_LIB=y
548CONFIG_RTC_CLASS=y
549CONFIG_RTC_HCTOSYS=y
550CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
551# CONFIG_RTC_DEBUG is not set
552
553#
554# RTC interfaces
555#
556CONFIG_RTC_INTF_SYSFS=y
557CONFIG_RTC_INTF_PROC=y
558CONFIG_RTC_INTF_DEV=y
559# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
560# CONFIG_RTC_DRV_TEST is not set
561
562#
563# I2C RTC drivers
564#
565
566#
567# SPI RTC drivers
568#
569
570#
571# Platform RTC drivers
572#
573# CONFIG_RTC_DRV_DS1553 is not set
574# CONFIG_RTC_DRV_DS1742 is not set
575# CONFIG_RTC_DRV_M48T86 is not set
576# CONFIG_RTC_DRV_V3020 is not set
577
578#
579# on-CPU RTC drivers
580#
581CONFIG_RTC_DRV_SH=y
582 608
583# 609#
584# DMA Engine support 610# DMA Engine support
@@ -594,6 +620,11 @@ CONFIG_RTC_DRV_SH=y
594# 620#
595 621
596# 622#
623# Userspace I/O
624#
625CONFIG_UIO=m
626
627#
597# File systems 628# File systems
598# 629#
599CONFIG_EXT2_FS=y 630CONFIG_EXT2_FS=y
@@ -612,6 +643,7 @@ CONFIG_FS_MBCACHE=y
612# CONFIG_FS_POSIX_ACL is not set 643# CONFIG_FS_POSIX_ACL is not set
613# CONFIG_XFS_FS is not set 644# CONFIG_XFS_FS is not set
614# CONFIG_GFS2_FS is not set 645# CONFIG_GFS2_FS is not set
646# CONFIG_OCFS2_FS is not set
615# CONFIG_MINIX_FS is not set 647# CONFIG_MINIX_FS is not set
616# CONFIG_ROMFS_FS is not set 648# CONFIG_ROMFS_FS is not set
617CONFIG_INOTIFY=y 649CONFIG_INOTIFY=y
@@ -667,6 +699,17 @@ CONFIG_RAMFS=y
667# CONFIG_UFS_FS is not set 699# CONFIG_UFS_FS is not set
668 700
669# 701#
702# Network File Systems
703#
704# CONFIG_NFS_FS is not set
705# CONFIG_NFSD is not set
706# CONFIG_SMB_FS is not set
707# CONFIG_CIFS is not set
708# CONFIG_NCP_FS is not set
709# CONFIG_CODA_FS is not set
710# CONFIG_AFS_FS is not set
711
712#
670# Partition Types 713# Partition Types
671# 714#
672# CONFIG_PARTITION_ADVANCED is not set 715# CONFIG_PARTITION_ADVANCED is not set
@@ -678,6 +721,11 @@ CONFIG_MSDOS_PARTITION=y
678# CONFIG_NLS is not set 721# CONFIG_NLS is not set
679 722
680# 723#
724# Distributed Lock Manager
725#
726# CONFIG_DLM is not set
727
728#
681# Profiling support 729# Profiling support
682# 730#
683CONFIG_PROFILING=y 731CONFIG_PROFILING=y
@@ -687,31 +735,28 @@ CONFIG_PROFILING=y
687# Kernel hacking 735# Kernel hacking
688# 736#
689CONFIG_TRACE_IRQFLAGS_SUPPORT=y 737CONFIG_TRACE_IRQFLAGS_SUPPORT=y
690CONFIG_PRINTK_TIME=y 738# CONFIG_PRINTK_TIME is not set
691# CONFIG_ENABLE_MUST_CHECK is not set 739# CONFIG_ENABLE_MUST_CHECK is not set
692CONFIG_MAGIC_SYSRQ=y 740CONFIG_MAGIC_SYSRQ=y
693# CONFIG_UNUSED_SYMBOLS is not set 741# CONFIG_UNUSED_SYMBOLS is not set
694CONFIG_DEBUG_FS=y 742CONFIG_DEBUG_FS=y
695# CONFIG_HEADERS_CHECK is not set 743# CONFIG_HEADERS_CHECK is not set
696CONFIG_DEBUG_KERNEL=y 744CONFIG_DEBUG_KERNEL=y
697# CONFIG_DEBUG_SHIRQ is not set 745CONFIG_DEBUG_SHIRQ=y
698CONFIG_DETECT_SOFTLOCKUP=y 746CONFIG_DETECT_SOFTLOCKUP=y
747CONFIG_SCHED_DEBUG=y
699# CONFIG_SCHEDSTATS is not set 748# CONFIG_SCHEDSTATS is not set
700# CONFIG_TIMER_STATS is not set 749# CONFIG_TIMER_STATS is not set
701CONFIG_DEBUG_SLAB=y
702CONFIG_DEBUG_SLAB_LEAK=y
703CONFIG_DEBUG_PREEMPT=y 750CONFIG_DEBUG_PREEMPT=y
704# CONFIG_DEBUG_RT_MUTEXES is not set 751# CONFIG_DEBUG_RT_MUTEXES is not set
705# CONFIG_RT_MUTEX_TESTER is not set 752# CONFIG_RT_MUTEX_TESTER is not set
706CONFIG_DEBUG_SPINLOCK=y 753# CONFIG_DEBUG_SPINLOCK is not set
707CONFIG_DEBUG_MUTEXES=y 754# CONFIG_DEBUG_MUTEXES is not set
708CONFIG_DEBUG_LOCK_ALLOC=y 755# CONFIG_DEBUG_LOCK_ALLOC is not set
709# CONFIG_PROVE_LOCKING is not set 756# CONFIG_PROVE_LOCKING is not set
710CONFIG_LOCKDEP=y 757# CONFIG_LOCK_STAT is not set
711CONFIG_DEBUG_LOCKDEP=y
712# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 758# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
713# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 759# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
714CONFIG_STACKTRACE=y
715# CONFIG_DEBUG_KOBJECT is not set 760# CONFIG_DEBUG_KOBJECT is not set
716CONFIG_DEBUG_BUGVERBOSE=y 761CONFIG_DEBUG_BUGVERBOSE=y
717# CONFIG_DEBUG_INFO is not set 762# CONFIG_DEBUG_INFO is not set
@@ -735,10 +780,6 @@ CONFIG_DEBUG_STACK_USAGE=y
735# 780#
736# CONFIG_KEYS is not set 781# CONFIG_KEYS is not set
737# CONFIG_SECURITY is not set 782# CONFIG_SECURITY is not set
738
739#
740# Cryptographic options
741#
742# CONFIG_CRYPTO is not set 783# CONFIG_CRYPTO is not set
743 784
744# 785#
@@ -749,6 +790,7 @@ CONFIG_BITREVERSE=y
749# CONFIG_CRC16 is not set 790# CONFIG_CRC16 is not set
750# CONFIG_CRC_ITU_T is not set 791# CONFIG_CRC_ITU_T is not set
751CONFIG_CRC32=y 792CONFIG_CRC32=y
793# CONFIG_CRC7 is not set
752# CONFIG_LIBCRC32C is not set 794# CONFIG_LIBCRC32C is not set
753CONFIG_PLIST=y 795CONFIG_PLIST=y
754CONFIG_HAS_IOMEM=y 796CONFIG_HAS_IOMEM=y
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index ee711431e504..4e711a0c3dae 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -12,6 +12,7 @@ config SH_DMA
12config NR_ONCHIP_DMA_CHANNELS 12config NR_ONCHIP_DMA_CHANNELS
13 int 13 int
14 depends on SH_DMA 14 depends on SH_DMA
15 default "6" if CPU_SUBTYPE_SH7720
15 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R 16 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
16 default "12" if CPU_SUBTYPE_SH7780 17 default "12" if CPU_SUBTYPE_SH7780
17 default "4" 18 default "4"
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 06ed0609a95d..958bac1c585a 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -24,13 +24,19 @@ static int dmte_irq_map[] = {
24 DMTE1_IRQ, 24 DMTE1_IRQ,
25 DMTE2_IRQ, 25 DMTE2_IRQ,
26 DMTE3_IRQ, 26 DMTE3_IRQ,
27#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ 27#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
28 defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
28 defined(CONFIG_CPU_SUBTYPE_SH7760) || \ 29 defined(CONFIG_CPU_SUBTYPE_SH7760) || \
30 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
29 defined(CONFIG_CPU_SUBTYPE_SH7780) 31 defined(CONFIG_CPU_SUBTYPE_SH7780)
30 DMTE4_IRQ, 32 DMTE4_IRQ,
31 DMTE5_IRQ, 33 DMTE5_IRQ,
34#endif
35#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
36 defined(CONFIG_CPU_SUBTYPE_SH7760) || \
37 defined(CONFIG_CPU_SUBTYPE_SH7780)
32 DMTE6_IRQ, 38 DMTE6_IRQ,
33 DMTE7_IRQ, 39 DMTE7_IRQ,
34#endif 40#endif
35}; 41};
36 42
@@ -196,7 +202,8 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan)
196 return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan); 202 return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan);
197} 203}
198 204
199#ifdef CONFIG_CPU_SUBTYPE_SH7780 205#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
206 defined(CONFIG_CPU_SUBTYPE_SH7780)
200#define dmaor_read_reg() ctrl_inw(DMAOR) 207#define dmaor_read_reg() ctrl_inw(DMAOR)
201#define dmaor_write_reg(data) ctrl_outw(data, DMAOR) 208#define dmaor_write_reg(data) ctrl_outw(data, DMAOR)
202#else 209#else
diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c
index 10c1828c9ff5..b76a14f12ce2 100644
--- a/arch/sh/drivers/heartbeat.c
+++ b/arch/sh/drivers/heartbeat.c
@@ -24,24 +24,44 @@
24#include <linux/sched.h> 24#include <linux/sched.h>
25#include <linux/timer.h> 25#include <linux/timer.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <asm/heartbeat.h>
27 28
28#define DRV_NAME "heartbeat" 29#define DRV_NAME "heartbeat"
29#define DRV_VERSION "0.1.0" 30#define DRV_VERSION "0.1.1"
30 31
31struct heartbeat_data { 32static unsigned char default_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
32 void __iomem *base; 33
33 unsigned char bit_pos[8]; 34static inline void heartbeat_toggle_bit(struct heartbeat_data *hd,
34 struct timer_list timer; 35 unsigned bit, unsigned int inverted)
35}; 36{
37 unsigned int new;
38
39 new = (1 << hd->bit_pos[bit]);
40 if (inverted)
41 new = ~new;
42
43 switch (hd->regsize) {
44 case 32:
45 iowrite32(new, hd->base);
46 break;
47 case 16:
48 iowrite16(new, hd->base);
49 break;
50 default:
51 iowrite8(new, hd->base);
52 break;
53 }
54}
36 55
37static void heartbeat_timer(unsigned long data) 56static void heartbeat_timer(unsigned long data)
38{ 57{
39 struct heartbeat_data *hd = (struct heartbeat_data *)data; 58 struct heartbeat_data *hd = (struct heartbeat_data *)data;
40 static unsigned bit = 0, up = 1; 59 static unsigned bit = 0, up = 1;
41 60
42 ctrl_outw(1 << hd->bit_pos[bit], (unsigned long)hd->base); 61 heartbeat_toggle_bit(hd, bit, hd->flags & HEARTBEAT_INVERTED);
62
43 bit += up; 63 bit += up;
44 if ((bit == 0) || (bit == ARRAY_SIZE(hd->bit_pos)-1)) 64 if ((bit == 0) || (bit == (hd->nr_bits)-1))
45 up = -up; 65 up = -up;
46 66
47 mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) / 67 mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) /
@@ -64,21 +84,31 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
64 return -EINVAL; 84 return -EINVAL;
65 } 85 }
66 86
67 hd = kmalloc(sizeof(struct heartbeat_data), GFP_KERNEL);
68 if (unlikely(!hd))
69 return -ENOMEM;
70
71 if (pdev->dev.platform_data) { 87 if (pdev->dev.platform_data) {
72 memcpy(hd->bit_pos, pdev->dev.platform_data, 88 hd = pdev->dev.platform_data;
73 ARRAY_SIZE(hd->bit_pos));
74 } else { 89 } else {
75 int i; 90 hd = kzalloc(sizeof(struct heartbeat_data), GFP_KERNEL);
91 if (unlikely(!hd))
92 return -ENOMEM;
93 }
94
95 hd->base = ioremap_nocache(res->start, res->end - res->start + 1);
96 if (!unlikely(hd->base)) {
97 dev_err(&pdev->dev, "ioremap failed\n");
98
99 if (!pdev->dev.platform_data)
100 kfree(hd);
101
102 return -ENXIO;
103 }
76 104
77 for (i = 0; i < ARRAY_SIZE(hd->bit_pos); i++) 105 if (!hd->nr_bits) {
78 hd->bit_pos[i] = i; 106 hd->bit_pos = default_bit_pos;
107 hd->nr_bits = ARRAY_SIZE(default_bit_pos);
79 } 108 }
80 109
81 hd->base = (void __iomem *)(unsigned long)res->start; 110 if (!hd->regsize)
111 hd->regsize = 8; /* default access size */
82 112
83 setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd); 113 setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd);
84 platform_set_drvdata(pdev, hd); 114 platform_set_drvdata(pdev, hd);
@@ -91,10 +121,12 @@ static int heartbeat_drv_remove(struct platform_device *pdev)
91 struct heartbeat_data *hd = platform_get_drvdata(pdev); 121 struct heartbeat_data *hd = platform_get_drvdata(pdev);
92 122
93 del_timer_sync(&hd->timer); 123 del_timer_sync(&hd->timer);
124 iounmap(hd->base);
94 125
95 platform_set_drvdata(pdev, NULL); 126 platform_set_drvdata(pdev, NULL);
96 127
97 kfree(hd); 128 if (!pdev->dev.platform_data)
129 kfree(hd);
98 130
99 return 0; 131 return 0;
100} 132}
diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c
index 4a518d948049..ec8430c8d2d1 100644
--- a/arch/sh/drivers/pci/ops-rts7751r2d.c
+++ b/arch/sh/drivers/pci/ops-rts7751r2d.c
@@ -19,10 +19,10 @@
19#include "pci-sh4.h" 19#include "pci-sh4.h"
20 20
21static u8 rts7751r2d_irq_tab[] __initdata = { 21static u8 rts7751r2d_irq_tab[] __initdata = {
22 IRQ_PCISLOT1, 22 IRQ_PCI_INTA,
23 IRQ_PCISLOT2, 23 IRQ_PCI_INTB,
24 IRQ_PCMCIA, 24 IRQ_PCI_INTC,
25 IRQ_PCIETH, 25 IRQ_PCI_INTD,
26}; 26};
27 27
28int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 28int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 5508e45d4838..e516087fb435 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -79,19 +79,6 @@ static int __init sh7780_pci_init(void)
79 ctrl_outl(0xAAAA0000, INTC_ICR1); 79 ctrl_outl(0xAAAA0000, INTC_ICR1);
80 /* INTPRI: priority=3(all) */ 80 /* INTPRI: priority=3(all) */
81 ctrl_outl(0x33333333, INTC_INTPRI); 81 ctrl_outl(0x33333333, INTC_INTPRI);
82 } else {
83 /* INTC SH-4 Mode */
84 ctrl_outl(0x00200000, INTC_ICR0);
85 /* enable PCIINTA - PCIINTD */
86 ctrl_outl(0x00078000, INTC_INT2MSKCR);
87 /* disable IRL4-7 Interrupt */
88 ctrl_outl(0x40000000, INTC_INTMSK1);
89 /* disable IRL4-7 Interrupt */
90 ctrl_outl(0x0000fffe, INTC_INTMSK2);
91 /* enable IRL0-3 Interrupt */
92 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
93 /* enable IRL0-3 Interrupt */
94 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
95 } 82 }
96 83
97 if ((ret = sh4_pci_check_direct()) != 0) 84 if ((ret = sh4_pci_check_direct()) != 0)
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 92807ffa8e20..b5f1e23ed57c 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -83,6 +83,8 @@ static void propagate_rate(struct clk *clk)
83 continue; 83 continue;
84 if (likely(clkp->ops && clkp->ops->recalc)) 84 if (likely(clkp->ops && clkp->ops->recalc))
85 clkp->ops->recalc(clkp); 85 clkp->ops->recalc(clkp);
86 if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
87 propagate_rate(clkp);
86 } 88 }
87} 89}
88 90
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 9172e97dc26a..c217c4bf0085 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -22,6 +22,7 @@
22#include <asm/cache.h> 22#include <asm/cache.h>
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/ubc.h> 24#include <asm/ubc.h>
25#include <asm/smp.h>
25 26
26/* 27/*
27 * Generic wrapper for command line arguments to disable on-chip 28 * Generic wrapper for command line arguments to disable on-chip
@@ -143,12 +144,15 @@ static void __init cache_init(void)
143 flags &= ~CCR_CACHE_EMODE; 144 flags &= ~CCR_CACHE_EMODE;
144#endif 145#endif
145 146
146#ifdef CONFIG_SH_WRITETHROUGH 147#if defined(CONFIG_CACHE_WRITETHROUGH)
147 /* Turn on Write-through caching */ 148 /* Write-through */
148 flags |= CCR_CACHE_WT; 149 flags |= CCR_CACHE_WT;
149#else 150#elif defined(CONFIG_CACHE_WRITEBACK)
150 /* .. or default to Write-back */ 151 /* Write-back */
151 flags |= CCR_CACHE_CB; 152 flags |= CCR_CACHE_CB;
153#else
154 /* Off */
155 flags &= ~CCR_CACHE_ENABLE;
152#endif 156#endif
153 157
154 ctrl_outl(flags, CCR); 158 ctrl_outl(flags, CCR);
@@ -213,8 +217,11 @@ static void __init dsp_init(void)
213 * Each processor family is still responsible for doing its own probing 217 * Each processor family is still responsible for doing its own probing
214 * and cache configuration in detect_cpu_and_cache_system(). 218 * and cache configuration in detect_cpu_and_cache_system().
215 */ 219 */
216asmlinkage void __init sh_cpu_init(void) 220
221asmlinkage void __cpuinit sh_cpu_init(void)
217{ 222{
223 current_thread_info()->cpu = hard_smp_processor_id();
224
218 /* First, probe the CPU */ 225 /* First, probe the CPU */
219 detect_cpu_and_cache_system(); 226 detect_cpu_and_cache_system();
220 227
@@ -224,9 +231,10 @@ asmlinkage void __init sh_cpu_init(void)
224 /* Init the cache */ 231 /* Init the cache */
225 cache_init(); 232 cache_init();
226 233
227 shm_align_mask = max_t(unsigned long, 234 if (raw_smp_processor_id() == 0)
228 current_cpu_data.dcache.way_size - 1, 235 shm_align_mask = max_t(unsigned long,
229 PAGE_SIZE - 1); 236 current_cpu_data.dcache.way_size - 1,
237 PAGE_SIZE - 1);
230 238
231 /* Disable the FPU */ 239 /* Disable the FPU */
232 if (fpu_disabled) { 240 if (fpu_disabled) {
@@ -265,6 +273,7 @@ asmlinkage void __init sh_cpu_init(void)
265 * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So .. 273 * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So ..
266 * we wake it up and hope that all is well. 274 * we wake it up and hope that all is well.
267 */ 275 */
268 ubc_wakeup(); 276 if (raw_smp_processor_id() == 0)
277 ubc_wakeup();
269 speculative_execution_init(); 278 speculative_execution_init();
270} 279}
diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile
index 60bfc05cf354..8da8e178f09c 100644
--- a/arch/sh/kernel/cpu/irq/Makefile
+++ b/arch/sh/kernel/cpu/irq/Makefile
@@ -1,9 +1,7 @@
1# 1#
2# Makefile for the Linux/SuperH CPU-specifc IRQ handlers. 2# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
3# 3#
4obj-y += imask.o 4obj-y += imask.o intc.o
5 5
6obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o 6obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
7obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o 7obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o
8obj-$(CONFIG_CPU_HAS_INTC_IRQ) += intc.o
9obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
index 9345a7130e9e..6ac018c15e03 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/arch/sh/kernel/cpu/irq/intc.c
@@ -20,145 +20,258 @@
20#include <linux/module.h> 20#include <linux/module.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/bootmem.h>
24
25#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
26 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
27 ((addr_e) << 16) | ((addr_d << 24)))
28
29#define _INTC_SHIFT(h) (h & 0x1f)
30#define _INTC_WIDTH(h) ((h >> 5) & 0xf)
31#define _INTC_FN(h) ((h >> 9) & 0xf)
32#define _INTC_MODE(h) ((h >> 13) & 0x7)
33#define _INTC_ADDR_E(h) ((h >> 16) & 0xff)
34#define _INTC_ADDR_D(h) ((h >> 24) & 0xff)
35
36struct intc_handle_int {
37 unsigned int irq;
38 unsigned long handle;
39};
40
41struct intc_desc_int {
42 unsigned long *reg;
43#ifdef CONFIG_SMP
44 unsigned long *smp;
45#endif
46 unsigned int nr_reg;
47 struct intc_handle_int *prio;
48 unsigned int nr_prio;
49 struct intc_handle_int *sense;
50 unsigned int nr_sense;
51 struct irq_chip chip;
52};
23 53
24#define _INTC_MK(fn, idx, bit, value) \ 54#ifdef CONFIG_SMP
25 ((fn) << 24 | ((value) << 16) | ((idx) << 8) | (bit)) 55#define IS_SMP(x) x.smp
26#define _INTC_FN(h) (h >> 24) 56#define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
27#define _INTC_VALUE(h) ((h >> 16) & 0xff) 57#define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
28#define _INTC_IDX(h) ((h >> 8) & 0xff) 58#else
29#define _INTC_BIT(h) (h & 0xff) 59#define IS_SMP(x) 0
60#define INTC_REG(d, x, c) (d->reg[(x)])
61#define SMP_NR(d, x) 1
62#endif
30 63
31#define _INTC_PTR(desc, member, data) \ 64static unsigned int intc_prio_level[NR_IRQS]; /* for now */
32 (desc->member + _INTC_IDX(data))
33 65
34static inline struct intc_desc *get_intc_desc(unsigned int irq) 66static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
35{ 67{
36 struct irq_chip *chip = get_irq_chip(irq); 68 struct irq_chip *chip = get_irq_chip(irq);
37 return (void *)((char *)chip - offsetof(struct intc_desc, chip)); 69 return (void *)((char *)chip - offsetof(struct intc_desc_int, chip));
38} 70}
39 71
40static inline unsigned int set_field(unsigned int value, 72static inline unsigned int set_field(unsigned int value,
41 unsigned int field_value, 73 unsigned int field_value,
42 unsigned int width, 74 unsigned int handle)
43 unsigned int shift)
44{ 75{
76 unsigned int width = _INTC_WIDTH(handle);
77 unsigned int shift = _INTC_SHIFT(handle);
78
45 value &= ~(((1 << width) - 1) << shift); 79 value &= ~(((1 << width) - 1) << shift);
46 value |= field_value << shift; 80 value |= field_value << shift;
47 return value; 81 return value;
48} 82}
49 83
50static inline unsigned int set_prio_field(struct intc_desc *desc, 84static void write_8(unsigned long addr, unsigned long h, unsigned long data)
51 unsigned int value,
52 unsigned int priority,
53 unsigned int data)
54{ 85{
55 unsigned int width = _INTC_PTR(desc, prio_regs, data)->field_width; 86 ctrl_outb(set_field(0, data, h), addr);
56
57 return set_field(value, priority, width, _INTC_BIT(data));
58} 87}
59 88
60static void disable_prio_16(struct intc_desc *desc, unsigned int data) 89static void write_16(unsigned long addr, unsigned long h, unsigned long data)
61{ 90{
62 unsigned long addr = _INTC_PTR(desc, prio_regs, data)->reg; 91 ctrl_outw(set_field(0, data, h), addr);
63
64 ctrl_outw(set_prio_field(desc, ctrl_inw(addr), 0, data), addr);
65} 92}
66 93
67static void enable_prio_16(struct intc_desc *desc, unsigned int data) 94static void write_32(unsigned long addr, unsigned long h, unsigned long data)
68{ 95{
69 unsigned long addr = _INTC_PTR(desc, prio_regs, data)->reg; 96 ctrl_outl(set_field(0, data, h), addr);
70 unsigned int prio = _INTC_VALUE(data);
71
72 ctrl_outw(set_prio_field(desc, ctrl_inw(addr), prio, data), addr);
73} 97}
74 98
75static void disable_prio_32(struct intc_desc *desc, unsigned int data) 99static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
76{ 100{
77 unsigned long addr = _INTC_PTR(desc, prio_regs, data)->reg; 101 ctrl_outb(set_field(ctrl_inb(addr), data, h), addr);
78
79 ctrl_outl(set_prio_field(desc, ctrl_inl(addr), 0, data), addr);
80} 102}
81 103
82static void enable_prio_32(struct intc_desc *desc, unsigned int data) 104static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
83{ 105{
84 unsigned long addr = _INTC_PTR(desc, prio_regs, data)->reg; 106 ctrl_outw(set_field(ctrl_inw(addr), data, h), addr);
85 unsigned int prio = _INTC_VALUE(data);
86
87 ctrl_outl(set_prio_field(desc, ctrl_inl(addr), prio, data), addr);
88} 107}
89 108
90static void disable_mask_8(struct intc_desc *desc, unsigned int data) 109static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
91{ 110{
92 ctrl_outb(1 << _INTC_BIT(data), 111 ctrl_outl(set_field(ctrl_inl(addr), data, h), addr);
93 _INTC_PTR(desc, mask_regs, data)->set_reg);
94} 112}
95 113
96static void enable_mask_8(struct intc_desc *desc, unsigned int data) 114enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 };
115
116static void (*intc_reg_fns[])(unsigned long addr,
117 unsigned long h,
118 unsigned long data) = {
119 [REG_FN_WRITE_BASE + 0] = write_8,
120 [REG_FN_WRITE_BASE + 1] = write_16,
121 [REG_FN_WRITE_BASE + 3] = write_32,
122 [REG_FN_MODIFY_BASE + 0] = modify_8,
123 [REG_FN_MODIFY_BASE + 1] = modify_16,
124 [REG_FN_MODIFY_BASE + 3] = modify_32,
125};
126
127enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
128 MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */
129 MODE_DUAL_REG, /* Two registers, set bit to enable / disable */
130 MODE_PRIO_REG, /* Priority value written to enable interrupt */
131 MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */
132};
133
134static void intc_mode_field(unsigned long addr,
135 unsigned long handle,
136 void (*fn)(unsigned long,
137 unsigned long,
138 unsigned long),
139 unsigned int irq)
97{ 140{
98 ctrl_outb(1 << _INTC_BIT(data), 141 fn(addr, handle, ((1 << _INTC_WIDTH(handle)) - 1));
99 _INTC_PTR(desc, mask_regs, data)->clr_reg);
100} 142}
101 143
102static void disable_mask_32(struct intc_desc *desc, unsigned int data) 144static void intc_mode_zero(unsigned long addr,
145 unsigned long handle,
146 void (*fn)(unsigned long,
147 unsigned long,
148 unsigned long),
149 unsigned int irq)
103{ 150{
104 ctrl_outl(1 << _INTC_BIT(data), 151 fn(addr, handle, 0);
105 _INTC_PTR(desc, mask_regs, data)->set_reg);
106} 152}
107 153
108static void enable_mask_32(struct intc_desc *desc, unsigned int data) 154static void intc_mode_prio(unsigned long addr,
155 unsigned long handle,
156 void (*fn)(unsigned long,
157 unsigned long,
158 unsigned long),
159 unsigned int irq)
109{ 160{
110 ctrl_outl(1 << _INTC_BIT(data), 161 fn(addr, handle, intc_prio_level[irq]);
111 _INTC_PTR(desc, mask_regs, data)->clr_reg);
112} 162}
113 163
114enum { REG_FN_ERROR=0, 164static void (*intc_enable_fns[])(unsigned long addr,
115 REG_FN_MASK_8, REG_FN_MASK_32, 165 unsigned long handle,
116 REG_FN_PRIO_16, REG_FN_PRIO_32 }; 166 void (*fn)(unsigned long,
117 167 unsigned long,
118static struct { 168 unsigned long),
119 void (*enable)(struct intc_desc *, unsigned int); 169 unsigned int irq) = {
120 void (*disable)(struct intc_desc *, unsigned int); 170 [MODE_ENABLE_REG] = intc_mode_field,
121} intc_reg_fns[] = { 171 [MODE_MASK_REG] = intc_mode_zero,
122 [REG_FN_MASK_8] = { enable_mask_8, disable_mask_8 }, 172 [MODE_DUAL_REG] = intc_mode_field,
123 [REG_FN_MASK_32] = { enable_mask_32, disable_mask_32 }, 173 [MODE_PRIO_REG] = intc_mode_prio,
124 [REG_FN_PRIO_16] = { enable_prio_16, disable_prio_16 }, 174 [MODE_PCLR_REG] = intc_mode_prio,
125 [REG_FN_PRIO_32] = { enable_prio_32, disable_prio_32 },
126}; 175};
127 176
128static void intc_enable(unsigned int irq) 177static void (*intc_disable_fns[])(unsigned long addr,
178 unsigned long handle,
179 void (*fn)(unsigned long,
180 unsigned long,
181 unsigned long),
182 unsigned int irq) = {
183 [MODE_ENABLE_REG] = intc_mode_zero,
184 [MODE_MASK_REG] = intc_mode_field,
185 [MODE_DUAL_REG] = intc_mode_field,
186 [MODE_PRIO_REG] = intc_mode_zero,
187 [MODE_PCLR_REG] = intc_mode_field,
188};
189
190static inline void _intc_enable(unsigned int irq, unsigned long handle)
129{ 191{
130 struct intc_desc *desc = get_intc_desc(irq); 192 struct intc_desc_int *d = get_intc_desc(irq);
131 unsigned int data = (unsigned int) get_irq_chip_data(irq); 193 unsigned long addr;
194 unsigned int cpu;
195
196 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
197 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu);
198 intc_enable_fns[_INTC_MODE(handle)](addr, handle, intc_reg_fns\
199 [_INTC_FN(handle)], irq);
200 }
201}
132 202
133 intc_reg_fns[_INTC_FN(data)].enable(desc, data); 203static void intc_enable(unsigned int irq)
204{
205 _intc_enable(irq, (unsigned long)get_irq_chip_data(irq));
134} 206}
135 207
136static void intc_disable(unsigned int irq) 208static void intc_disable(unsigned int irq)
137{ 209{
138 struct intc_desc *desc = get_intc_desc(irq); 210 struct intc_desc_int *d = get_intc_desc(irq);
139 unsigned int data = (unsigned int) get_irq_chip_data(irq); 211 unsigned long handle = (unsigned long) get_irq_chip_data(irq);
140 212 unsigned long addr;
141 intc_reg_fns[_INTC_FN(data)].disable(desc, data); 213 unsigned int cpu;
214
215 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
216 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
217 intc_disable_fns[_INTC_MODE(handle)](addr, handle,intc_reg_fns\
218 [_INTC_FN(handle)], irq);
219 }
142} 220}
143 221
144static void set_sense_16(struct intc_desc *desc, unsigned int data) 222static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
223 unsigned int nr_hp,
224 unsigned int irq)
145{ 225{
146 unsigned long addr = _INTC_PTR(desc, sense_regs, data)->reg; 226 int i;
147 unsigned int width = _INTC_PTR(desc, sense_regs, data)->field_width; 227
148 unsigned int bit = _INTC_BIT(data); 228 /* this doesn't scale well, but...
149 unsigned int value = _INTC_VALUE(data); 229 *
230 * this function should only be used for cerain uncommon
231 * operations such as intc_set_priority() and intc_set_sense()
232 * and in those rare cases performance doesn't matter that much.
233 * keeping the memory footprint low is more important.
234 *
235 * one rather simple way to speed this up and still keep the
236 * memory footprint down is to make sure the array is sorted
237 * and then perform a bisect to lookup the irq.
238 */
150 239
151 ctrl_outw(set_field(ctrl_inw(addr), value, width, bit), addr); 240 for (i = 0; i < nr_hp; i++) {
241 if ((hp + i)->irq != irq)
242 continue;
243
244 return hp + i;
245 }
246
247 return NULL;
152} 248}
153 249
154static void set_sense_32(struct intc_desc *desc, unsigned int data) 250int intc_set_priority(unsigned int irq, unsigned int prio)
155{ 251{
156 unsigned long addr = _INTC_PTR(desc, sense_regs, data)->reg; 252 struct intc_desc_int *d = get_intc_desc(irq);
157 unsigned int width = _INTC_PTR(desc, sense_regs, data)->field_width; 253 struct intc_handle_int *ihp;
158 unsigned int bit = _INTC_BIT(data); 254
159 unsigned int value = _INTC_VALUE(data); 255 if (!intc_prio_level[irq] || prio <= 1)
256 return -EINVAL;
257
258 ihp = intc_find_irq(d->prio, d->nr_prio, irq);
259 if (ihp) {
260 if (prio >= (1 << _INTC_WIDTH(ihp->handle)))
261 return -EINVAL;
160 262
161 ctrl_outl(set_field(ctrl_inl(addr), value, width, bit), addr); 263 intc_prio_level[irq] = prio;
264
265 /*
266 * only set secondary masking method directly
267 * primary masking method is using intc_prio_level[irq]
268 * priority level will be set during next enable()
269 */
270
271 if (_INTC_FN(ihp->handle) != REG_FN_ERR)
272 _intc_enable(irq, ihp->handle);
273 }
274 return 0;
162} 275}
163 276
164#define VALID(x) (x | 0x80) 277#define VALID(x) (x | 0x80)
@@ -172,79 +285,38 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
172 285
173static int intc_set_sense(unsigned int irq, unsigned int type) 286static int intc_set_sense(unsigned int irq, unsigned int type)
174{ 287{
175 struct intc_desc *desc = get_intc_desc(irq); 288 struct intc_desc_int *d = get_intc_desc(irq);
176 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK]; 289 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK];
177 unsigned int i, j, data, bit; 290 struct intc_handle_int *ihp;
178 intc_enum enum_id = 0; 291 unsigned long addr;
179
180 for (i = 0; i < desc->nr_vectors; i++) {
181 struct intc_vect *vect = desc->vectors + i;
182
183 if (evt2irq(vect->vect) != irq)
184 continue;
185 292
186 enum_id = vect->enum_id; 293 if (!value)
187 break;
188 }
189
190 if (!enum_id || !value)
191 return -EINVAL; 294 return -EINVAL;
192 295
193 value ^= VALID(0); 296 ihp = intc_find_irq(d->sense, d->nr_sense, irq);
194 297 if (ihp) {
195 for (i = 0; i < desc->nr_sense_regs; i++) { 298 addr = INTC_REG(d, _INTC_ADDR_E(ihp->handle), 0);
196 struct intc_sense_reg *sr = desc->sense_regs + i; 299 intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle, value);
197
198 for (j = 0; j < ARRAY_SIZE(sr->enum_ids); j++) {
199 if (sr->enum_ids[j] != enum_id)
200 continue;
201
202 bit = sr->reg_width - ((j + 1) * sr->field_width);
203 data = _INTC_MK(0, i, bit, value);
204
205 switch(sr->reg_width) {
206 case 16:
207 set_sense_16(desc, data);
208 break;
209 case 32:
210 set_sense_32(desc, data);
211 break;
212 }
213
214 return 0;
215 }
216 } 300 }
217 301 return 0;
218 return -EINVAL;
219} 302}
220 303
221static unsigned int __init intc_find_mask_handler(unsigned int width) 304static unsigned int __init intc_get_reg(struct intc_desc_int *d,
305 unsigned long address)
222{ 306{
223 switch (width) { 307 unsigned int k;
224 case 8:
225 return REG_FN_MASK_8;
226 case 32:
227 return REG_FN_MASK_32;
228 }
229 308
230 BUG(); 309 for (k = 0; k < d->nr_reg; k++) {
231 return REG_FN_ERROR; 310 if (d->reg[k] == address)
232} 311 return k;
233
234static unsigned int __init intc_find_prio_handler(unsigned int width)
235{
236 switch (width) {
237 case 16:
238 return REG_FN_PRIO_16;
239 case 32:
240 return REG_FN_PRIO_32;
241 } 312 }
242 313
243 BUG(); 314 BUG();
244 return REG_FN_ERROR; 315 return 0;
245} 316}
246 317
247static intc_enum __init intc_grp_id(struct intc_desc *desc, intc_enum enum_id) 318static intc_enum __init intc_grp_id(struct intc_desc *desc,
319 intc_enum enum_id)
248{ 320{
249 struct intc_group *g = desc->groups; 321 struct intc_group *g = desc->groups;
250 unsigned int i, j; 322 unsigned int i, j;
@@ -289,10 +361,12 @@ static unsigned int __init intc_prio_value(struct intc_desc *desc,
289} 361}
290 362
291static unsigned int __init intc_mask_data(struct intc_desc *desc, 363static unsigned int __init intc_mask_data(struct intc_desc *desc,
364 struct intc_desc_int *d,
292 intc_enum enum_id, int do_grps) 365 intc_enum enum_id, int do_grps)
293{ 366{
294 struct intc_mask_reg *mr = desc->mask_regs; 367 struct intc_mask_reg *mr = desc->mask_regs;
295 unsigned int i, j, fn; 368 unsigned int i, j, fn, mode;
369 unsigned long reg_e, reg_d;
296 370
297 for (i = 0; mr && enum_id && i < desc->nr_mask_regs; i++) { 371 for (i = 0; mr && enum_id && i < desc->nr_mask_regs; i++) {
298 mr = desc->mask_regs + i; 372 mr = desc->mask_regs + i;
@@ -301,25 +375,46 @@ static unsigned int __init intc_mask_data(struct intc_desc *desc,
301 if (mr->enum_ids[j] != enum_id) 375 if (mr->enum_ids[j] != enum_id)
302 continue; 376 continue;
303 377
304 fn = intc_find_mask_handler(mr->reg_width); 378 if (mr->set_reg && mr->clr_reg) {
305 if (fn == REG_FN_ERROR) 379 fn = REG_FN_WRITE_BASE;
306 return 0; 380 mode = MODE_DUAL_REG;
381 reg_e = mr->clr_reg;
382 reg_d = mr->set_reg;
383 } else {
384 fn = REG_FN_MODIFY_BASE;
385 if (mr->set_reg) {
386 mode = MODE_ENABLE_REG;
387 reg_e = mr->set_reg;
388 reg_d = mr->set_reg;
389 } else {
390 mode = MODE_MASK_REG;
391 reg_e = mr->clr_reg;
392 reg_d = mr->clr_reg;
393 }
394 }
307 395
308 return _INTC_MK(fn, i, (mr->reg_width - 1) - j, 0); 396 fn += (mr->reg_width >> 3) - 1;
397 return _INTC_MK(fn, mode,
398 intc_get_reg(d, reg_e),
399 intc_get_reg(d, reg_d),
400 1,
401 (mr->reg_width - 1) - j);
309 } 402 }
310 } 403 }
311 404
312 if (do_grps) 405 if (do_grps)
313 return intc_mask_data(desc, intc_grp_id(desc, enum_id), 0); 406 return intc_mask_data(desc, d, intc_grp_id(desc, enum_id), 0);
314 407
315 return 0; 408 return 0;
316} 409}
317 410
318static unsigned int __init intc_prio_data(struct intc_desc *desc, 411static unsigned int __init intc_prio_data(struct intc_desc *desc,
412 struct intc_desc_int *d,
319 intc_enum enum_id, int do_grps) 413 intc_enum enum_id, int do_grps)
320{ 414{
321 struct intc_prio_reg *pr = desc->prio_regs; 415 struct intc_prio_reg *pr = desc->prio_regs;
322 unsigned int i, j, fn, bit, prio; 416 unsigned int i, j, fn, mode, bit;
417 unsigned long reg_e, reg_d;
323 418
324 for (i = 0; pr && enum_id && i < desc->nr_prio_regs; i++) { 419 for (i = 0; pr && enum_id && i < desc->nr_prio_regs; i++) {
325 pr = desc->prio_regs + i; 420 pr = desc->prio_regs + i;
@@ -328,28 +423,72 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
328 if (pr->enum_ids[j] != enum_id) 423 if (pr->enum_ids[j] != enum_id)
329 continue; 424 continue;
330 425
331 fn = intc_find_prio_handler(pr->reg_width); 426 if (pr->set_reg && pr->clr_reg) {
332 if (fn == REG_FN_ERROR) 427 fn = REG_FN_WRITE_BASE;
333 return 0; 428 mode = MODE_PCLR_REG;
429 reg_e = pr->set_reg;
430 reg_d = pr->clr_reg;
431 } else {
432 fn = REG_FN_MODIFY_BASE;
433 mode = MODE_PRIO_REG;
434 if (!pr->set_reg)
435 BUG();
436 reg_e = pr->set_reg;
437 reg_d = pr->set_reg;
438 }
334 439
335 prio = intc_prio_value(desc, enum_id, 1); 440 fn += (pr->reg_width >> 3) - 1;
336 bit = pr->reg_width - ((j + 1) * pr->field_width); 441 bit = pr->reg_width - ((j + 1) * pr->field_width);
337 442
338 BUG_ON(bit < 0); 443 BUG_ON(bit < 0);
339 444
340 return _INTC_MK(fn, i, bit, prio); 445 return _INTC_MK(fn, mode,
446 intc_get_reg(d, reg_e),
447 intc_get_reg(d, reg_d),
448 pr->field_width, bit);
341 } 449 }
342 } 450 }
343 451
344 if (do_grps) 452 if (do_grps)
345 return intc_prio_data(desc, intc_grp_id(desc, enum_id), 0); 453 return intc_prio_data(desc, d, intc_grp_id(desc, enum_id), 0);
346 454
347 return 0; 455 return 0;
348} 456}
349 457
350static void __init intc_register_irq(struct intc_desc *desc, intc_enum enum_id, 458static unsigned int __init intc_sense_data(struct intc_desc *desc,
459 struct intc_desc_int *d,
460 intc_enum enum_id)
461{
462 struct intc_sense_reg *sr = desc->sense_regs;
463 unsigned int i, j, fn, bit;
464
465 for (i = 0; sr && enum_id && i < desc->nr_sense_regs; i++) {
466 sr = desc->sense_regs + i;
467
468 for (j = 0; j < ARRAY_SIZE(sr->enum_ids); j++) {
469 if (sr->enum_ids[j] != enum_id)
470 continue;
471
472 fn = REG_FN_MODIFY_BASE;
473 fn += (sr->reg_width >> 3) - 1;
474 bit = sr->reg_width - ((j + 1) * sr->field_width);
475
476 BUG_ON(bit < 0);
477
478 return _INTC_MK(fn, 0, intc_get_reg(d, sr->reg),
479 0, sr->field_width, bit);
480 }
481 }
482
483 return 0;
484}
485
486static void __init intc_register_irq(struct intc_desc *desc,
487 struct intc_desc_int *d,
488 intc_enum enum_id,
351 unsigned int irq) 489 unsigned int irq)
352{ 490{
491 struct intc_handle_int *hp;
353 unsigned int data[2], primary; 492 unsigned int data[2], primary;
354 493
355 /* Prefer single interrupt source bitmap over other combinations: 494 /* Prefer single interrupt source bitmap over other combinations:
@@ -359,15 +498,15 @@ static void __init intc_register_irq(struct intc_desc *desc, intc_enum enum_id,
359 * 4. priority, multiple interrupt sources (groups) 498 * 4. priority, multiple interrupt sources (groups)
360 */ 499 */
361 500
362 data[0] = intc_mask_data(desc, enum_id, 0); 501 data[0] = intc_mask_data(desc, d, enum_id, 0);
363 data[1] = intc_prio_data(desc, enum_id, 0); 502 data[1] = intc_prio_data(desc, d, enum_id, 0);
364 503
365 primary = 0; 504 primary = 0;
366 if (!data[0] && data[1]) 505 if (!data[0] && data[1])
367 primary = 1; 506 primary = 1;
368 507
369 data[0] = data[0] ? data[0] : intc_mask_data(desc, enum_id, 1); 508 data[0] = data[0] ? data[0] : intc_mask_data(desc, d, enum_id, 1);
370 data[1] = data[1] ? data[1] : intc_prio_data(desc, enum_id, 1); 509 data[1] = data[1] ? data[1] : intc_prio_data(desc, d, enum_id, 1);
371 510
372 if (!data[primary]) 511 if (!data[primary])
373 primary ^= 1; 512 primary ^= 1;
@@ -375,31 +514,118 @@ static void __init intc_register_irq(struct intc_desc *desc, intc_enum enum_id,
375 BUG_ON(!data[primary]); /* must have primary masking method */ 514 BUG_ON(!data[primary]); /* must have primary masking method */
376 515
377 disable_irq_nosync(irq); 516 disable_irq_nosync(irq);
378 set_irq_chip_and_handler_name(irq, &desc->chip, 517 set_irq_chip_and_handler_name(irq, &d->chip,
379 handle_level_irq, "level"); 518 handle_level_irq, "level");
380 set_irq_chip_data(irq, (void *)data[primary]); 519 set_irq_chip_data(irq, (void *)data[primary]);
381 520
521 /* record the desired priority level */
522 intc_prio_level[irq] = intc_prio_value(desc, enum_id, 1);
523
382 /* enable secondary masking method if present */ 524 /* enable secondary masking method if present */
383 if (data[!primary]) 525 if (data[!primary])
384 intc_reg_fns[_INTC_FN(data[!primary])].enable(desc, 526 _intc_enable(irq, data[!primary]);
385 data[!primary]); 527
528 /* add irq to d->prio list if priority is available */
529 if (data[1]) {
530 hp = d->prio + d->nr_prio;
531 hp->irq = irq;
532 hp->handle = data[1];
533
534 if (primary) {
535 /*
536 * only secondary priority should access registers, so
537 * set _INTC_FN(h) = REG_FN_ERR for intc_set_priority()
538 */
539
540 hp->handle &= ~_INTC_MK(0x0f, 0, 0, 0, 0, 0);
541 hp->handle |= _INTC_MK(REG_FN_ERR, 0, 0, 0, 0, 0);
542 }
543 d->nr_prio++;
544 }
545
546 /* add irq to d->sense list if sense is available */
547 data[0] = intc_sense_data(desc, d, enum_id);
548 if (data[0]) {
549 (d->sense + d->nr_sense)->irq = irq;
550 (d->sense + d->nr_sense)->handle = data[0];
551 d->nr_sense++;
552 }
386 553
387 /* irq should be disabled by default */ 554 /* irq should be disabled by default */
388 desc->chip.mask(irq); 555 d->chip.mask(irq);
389} 556}
390 557
558static unsigned int __init save_reg(struct intc_desc_int *d,
559 unsigned int cnt,
560 unsigned long value,
561 unsigned int smp)
562{
563 if (value) {
564 d->reg[cnt] = value;
565#ifdef CONFIG_SMP
566 d->smp[cnt] = smp;
567#endif
568 return 1;
569 }
570
571 return 0;
572}
573
574
391void __init register_intc_controller(struct intc_desc *desc) 575void __init register_intc_controller(struct intc_desc *desc)
392{ 576{
393 unsigned int i; 577 unsigned int i, k, smp;
578 struct intc_desc_int *d;
579
580 d = alloc_bootmem(sizeof(*d));
581
582 d->nr_reg = desc->mask_regs ? desc->nr_mask_regs * 2 : 0;
583 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
584 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
585
586 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg));
587#ifdef CONFIG_SMP
588 d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp));
589#endif
590 k = 0;
591
592 if (desc->mask_regs) {
593 for (i = 0; i < desc->nr_mask_regs; i++) {
594 smp = IS_SMP(desc->mask_regs[i]);
595 k += save_reg(d, k, desc->mask_regs[i].set_reg, smp);
596 k += save_reg(d, k, desc->mask_regs[i].clr_reg, smp);
597 }
598 }
599
600 if (desc->prio_regs) {
601 d->prio = alloc_bootmem(desc->nr_vectors * sizeof(*d->prio));
602
603 for (i = 0; i < desc->nr_prio_regs; i++) {
604 smp = IS_SMP(desc->prio_regs[i]);
605 k += save_reg(d, k, desc->prio_regs[i].set_reg, smp);
606 k += save_reg(d, k, desc->prio_regs[i].clr_reg, smp);
607 }
608 }
609
610 if (desc->sense_regs) {
611 d->sense = alloc_bootmem(desc->nr_vectors * sizeof(*d->sense));
612
613 for (i = 0; i < desc->nr_sense_regs; i++) {
614 k += save_reg(d, k, desc->sense_regs[i].reg, 0);
615 }
616 }
617
618 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
394 619
395 desc->chip.mask = intc_disable; 620 d->chip.name = desc->name;
396 desc->chip.unmask = intc_enable; 621 d->chip.mask = intc_disable;
397 desc->chip.mask_ack = intc_disable; 622 d->chip.unmask = intc_enable;
398 desc->chip.set_type = intc_set_sense; 623 d->chip.mask_ack = intc_disable;
624 d->chip.set_type = intc_set_sense;
399 625
400 for (i = 0; i < desc->nr_vectors; i++) { 626 for (i = 0; i < desc->nr_vectors; i++) {
401 struct intc_vect *vect = desc->vectors + i; 627 struct intc_vect *vect = desc->vectors + i;
402 628
403 intc_register_irq(desc, vect->enum_id, evt2irq(vect->vect)); 629 intc_register_irq(desc, d, vect->enum_id, evt2irq(vect->vect));
404 } 630 }
405} 631}
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c
deleted file mode 100644
index cc5221390e09..000000000000
--- a/arch/sh/kernel/cpu/irq/intc2.c
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * Interrupt handling for INTC2-based IRQ.
3 *
4 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
5 * Copyright (C) 2005, 2006 Paul Mundt (lethal@linux-sh.org)
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
9 *
10 * These are the "new Hitachi style" interrupts, as present on the
11 * Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
12 */
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16#include <asm/smp.h>
17
18static inline struct intc2_desc *get_intc2_desc(unsigned int irq)
19{
20 struct irq_chip *chip = get_irq_chip(irq);
21 return (void *)((char *)chip - offsetof(struct intc2_desc, chip));
22}
23
24static void disable_intc2_irq(unsigned int irq)
25{
26 struct intc2_data *p = get_irq_chip_data(irq);
27 struct intc2_desc *d = get_intc2_desc(irq);
28
29 ctrl_outl(1 << p->msk_shift, d->msk_base + p->msk_offset +
30 (hard_smp_processor_id() * 4));
31}
32
33static void enable_intc2_irq(unsigned int irq)
34{
35 struct intc2_data *p = get_irq_chip_data(irq);
36 struct intc2_desc *d = get_intc2_desc(irq);
37
38 ctrl_outl(1 << p->msk_shift, d->mskclr_base + p->msk_offset +
39 (hard_smp_processor_id() * 4));
40}
41
42/*
43 * Setup an INTC2 style interrupt.
44 * NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
45 * allowing the use of the numbers straight out of the datasheet.
46 * For example:
47 * PIO1 which is INTPRI00[19,16] and INTMSK00[13]
48 * would be: ^ ^ ^ ^
49 * | | | |
50 * { 84, 0, 16, 0, 13 },
51 *
52 * in the intc2_data table.
53 */
54void register_intc2_controller(struct intc2_desc *desc)
55{
56 int i;
57
58 desc->chip.mask = disable_intc2_irq;
59 desc->chip.unmask = enable_intc2_irq;
60 desc->chip.mask_ack = disable_intc2_irq;
61
62 for (i = 0; i < desc->nr_irqs; i++) {
63 unsigned long ipr, flags;
64 struct intc2_data *p = desc->intc2_data + i;
65
66 disable_irq_nosync(p->irq);
67
68 if (desc->prio_base) {
69 /* Set the priority level */
70 local_irq_save(flags);
71
72 ipr = ctrl_inl(desc->prio_base + p->ipr_offset);
73 ipr &= ~(0xf << p->ipr_shift);
74 ipr |= p->priority << p->ipr_shift;
75 ctrl_outl(ipr, desc->prio_base + p->ipr_offset);
76
77 local_irq_restore(flags);
78 }
79
80 set_irq_chip_and_handler_name(p->irq, &desc->chip,
81 handle_level_irq, "level");
82 set_irq_chip_data(p->irq, p);
83
84 disable_intc2_irq(p->irq);
85 }
86}
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index abbf17427e52..5916d9096b99 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -10,26 +10,25 @@
10 * for more details. 10 * for more details.
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/smp.h>
14#include <asm/processor.h> 13#include <asm/processor.h>
15#include <asm/cache.h> 14#include <asm/cache.h>
16 15
17int __init detect_cpu_and_cache_system(void) 16int __init detect_cpu_and_cache_system(void)
18{ 17{
19#if defined(CONFIG_CPU_SUBTYPE_SH7619) 18#if defined(CONFIG_CPU_SUBTYPE_SH7619)
20 current_cpu_data.type = CPU_SH7619; 19 boot_cpu_data.type = CPU_SH7619;
21 current_cpu_data.dcache.ways = 4; 20 boot_cpu_data.dcache.ways = 4;
22 current_cpu_data.dcache.way_incr = (1<<12); 21 boot_cpu_data.dcache.way_incr = (1<<12);
23 current_cpu_data.dcache.sets = 256; 22 boot_cpu_data.dcache.sets = 256;
24 current_cpu_data.dcache.entry_shift = 4; 23 boot_cpu_data.dcache.entry_shift = 4;
25 current_cpu_data.dcache.linesz = L1_CACHE_BYTES; 24 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
26 current_cpu_data.dcache.flags = 0; 25 boot_cpu_data.dcache.flags = 0;
27#endif 26#endif
28 /* 27 /*
29 * SH-2 doesn't have separate caches 28 * SH-2 doesn't have separate caches
30 */ 29 */
31 current_cpu_data.dcache.flags |= SH_CACHE_COMBINED; 30 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
32 current_cpu_data.icache = current_cpu_data.dcache; 31 boot_cpu_data.icache = boot_cpu_data.dcache;
33 32
34 return 0; 33 return 0;
35} 34}
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index a979b981e6a3..ec6adc3f306f 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -12,6 +12,61 @@
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <asm/sci.h> 13#include <asm/sci.h>
14 14
15enum {
16 UNUSED = 0,
17
18 /* interrupt sources */
19 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
20 WDT, EDMAC, CMT0, CMT1,
21 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
22 SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
23 SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
24 HIF_HIFI, HIF_HIFBI,
25 DMAC0, DMAC1, DMAC2, DMAC3,
26 SIOF,
27
28 /* interrupt groups */
29 SCIF0, SCIF1, SCIF2,
30};
31
32static struct intc_vect vectors[] __initdata = {
33 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
34 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
35 INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81),
36 INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
37 INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
38 INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
39 INTC_IRQ(SCIF0_ERI, 88), INTC_IRQ(SCIF0_RXI, 89),
40 INTC_IRQ(SCIF0_BRI, 90), INTC_IRQ(SCIF0_TXI, 91),
41 INTC_IRQ(SCIF1_ERI, 92), INTC_IRQ(SCIF1_RXI, 93),
42 INTC_IRQ(SCIF1_BRI, 94), INTC_IRQ(SCIF1_TXI, 95),
43 INTC_IRQ(SCIF2_ERI, 96), INTC_IRQ(SCIF2_RXI, 97),
44 INTC_IRQ(SCIF2_BRI, 98), INTC_IRQ(SCIF2_TXI, 99),
45 INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
46 INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
47 INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
48 INTC_IRQ(SIOF, 108),
49};
50
51static struct intc_group groups[] __initdata = {
52 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
53 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
54 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
55};
56
57static struct intc_prio_reg prio_registers[] __initdata = {
58 { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
59 { 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
60 { 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
61 { 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } },
62 { 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } },
63 { 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
64 { 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
65};
66
67static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups,
68 NULL, NULL, prio_registers, NULL);
69
15static struct plat_sci_port sci_platform_data[] = { 70static struct plat_sci_port sci_platform_data[] = {
16 { 71 {
17 .mapbase = 0xf8400000, 72 .mapbase = 0xf8400000,
@@ -52,43 +107,7 @@ static int __init sh7619_devices_setup(void)
52} 107}
53__initcall(sh7619_devices_setup); 108__initcall(sh7619_devices_setup);
54 109
55static struct ipr_data ipr_irq_table[] = {
56 { 86, 0, 4, 2 }, /* CMI0 */
57 { 88, 1, 12, 3 }, /* SCIF0_ERI */
58 { 89, 1, 12, 3 }, /* SCIF0_RXI */
59 { 90, 1, 12, 3 }, /* SCIF0_BRI */
60 { 91, 1, 12, 3 }, /* SCIF0_TXI */
61 { 92, 1, 8, 3 }, /* SCIF1_ERI */
62 { 93, 1, 8, 3 }, /* SCIF1_RXI */
63 { 94, 1, 8, 3 }, /* SCIF1_BRI */
64 { 95, 1, 8, 3 }, /* SCIF1_TXI */
65 { 96, 1, 4, 3 }, /* SCIF2_ERI */
66 { 97, 1, 4, 3 }, /* SCIF2_RXI */
67 { 98, 1, 4, 3 }, /* SCIF2_BRI */
68 { 99, 1, 4, 3 }, /* SCIF2_TXI */
69};
70
71static unsigned long ipr_offsets[] = {
72 0xf8080000, /* IPRC */
73 0xf8080002, /* IPRD */
74 0xf8080004, /* IPRE */
75 0xf8080006, /* IPRF */
76 0xf8080008, /* IPRG */
77};
78
79static struct ipr_desc ipr_irq_desc = {
80 .ipr_offsets = ipr_offsets,
81 .nr_offsets = ARRAY_SIZE(ipr_offsets),
82
83 .ipr_data = ipr_irq_table,
84 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
85
86 .chip = {
87 .name = "IPR-sh7619",
88 },
89};
90
91void __init plat_irq_setup(void) 110void __init plat_irq_setup(void)
92{ 111{
93 register_ipr_controller(&ipr_irq_desc); 112 register_intc_controller(&intc_desc);
94} 113}
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index f455c3509789..6d02465704b9 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -17,15 +17,15 @@
17int __init detect_cpu_and_cache_system(void) 17int __init detect_cpu_and_cache_system(void)
18{ 18{
19 /* Just SH7206 for now .. */ 19 /* Just SH7206 for now .. */
20 current_cpu_data.type = CPU_SH7206; 20 boot_cpu_data.type = CPU_SH7206;
21 current_cpu_data.flags |= CPU_HAS_OP32; 21 boot_cpu_data.flags |= CPU_HAS_OP32;
22 22
23 current_cpu_data.dcache.ways = 4; 23 boot_cpu_data.dcache.ways = 4;
24 current_cpu_data.dcache.way_incr = (1 << 11); 24 boot_cpu_data.dcache.way_incr = (1 << 11);
25 current_cpu_data.dcache.sets = 128; 25 boot_cpu_data.dcache.sets = 128;
26 current_cpu_data.dcache.entry_shift = 4; 26 boot_cpu_data.dcache.entry_shift = 4;
27 current_cpu_data.dcache.linesz = L1_CACHE_BYTES; 27 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
28 current_cpu_data.dcache.flags = 0; 28 boot_cpu_data.dcache.flags = 0;
29 29
30 /* 30 /*
31 * The icache is the same as the dcache as far as this setup is 31 * The icache is the same as the dcache as far as this setup is
@@ -33,7 +33,7 @@ int __init detect_cpu_and_cache_system(void)
33 * lacks the U bit that the dcache has, none of this has any bearing 33 * lacks the U bit that the dcache has, none of this has any bearing
34 * on the cache info. 34 * on the cache info.
35 */ 35 */
36 current_cpu_data.icache = current_cpu_data.dcache; 36 boot_cpu_data.icache = boot_cpu_data.dcache;
37 37
38 return 0; 38 return 0;
39} 39}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index deab16500167..bd745aa87222 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -12,27 +12,184 @@
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <asm/sci.h> 13#include <asm/sci.h>
14 14
15enum {
16 UNUSED = 0,
17
18 /* interrupt sources */
19 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
20 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
21 ADC_ADI0, ADC_ADI1,
22 DMAC0_DEI, DMAC0_HEI, DMAC1_DEI, DMAC1_HEI,
23 DMAC2_DEI, DMAC2_HEI, DMAC3_DEI, DMAC3_HEI,
24 DMAC4_DEI, DMAC4_HEI, DMAC5_DEI, DMAC5_HEI,
25 DMAC6_DEI, DMAC6_HEI, DMAC7_DEI, DMAC7_HEI,
26 CMT0, CMT1, BSC, WDT,
27 MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
28 MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
29 MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
30 MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
31 MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
32 MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
33 MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
34 POE2_OEI1, POE2_OEI2,
35 MTU2S_TGI3A, MTU2S_TGI3B, MTU2S_TGI3C, MTU2S_TGI3D, MTU2S_TCI3V,
36 MTU2S_TGI4A, MTU2S_TGI4B, MTU2S_TGI4C, MTU2S_TGI4D, MTU2S_TCI4V,
37 MTU2S_TGI5U, MTU2S_TGI5V, MTU2S_TGI5W,
38 POE2_OEI3,
39 IIC3_STPI, IIC3_NAKI, IIC3_RXI, IIC3_TXI, IIC3_TEI,
40 SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
41 SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
42 SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
43 SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
44
45 /* interrupt groups */
46 PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
47 MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
48 MTU3_ABCD, MTU4_ABCD, MTU5, POE2_12, MTU3S_ABCD, MTU4S_ABCD, MTU5S,
49 IIC3, SCIF0, SCIF1, SCIF2, SCIF3,
50};
51
52static struct intc_vect vectors[] __initdata = {
53 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
54 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
55 INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
56 INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
57 INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
58 INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
59 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
60 INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
61 INTC_IRQ(ADC_ADI0, 92), INTC_IRQ(ADC_ADI1, 96),
62 INTC_IRQ(DMAC0_DEI, 108), INTC_IRQ(DMAC0_HEI, 109),
63 INTC_IRQ(DMAC1_DEI, 112), INTC_IRQ(DMAC1_HEI, 113),
64 INTC_IRQ(DMAC2_DEI, 116), INTC_IRQ(DMAC2_HEI, 117),
65 INTC_IRQ(DMAC3_DEI, 120), INTC_IRQ(DMAC3_HEI, 121),
66 INTC_IRQ(DMAC4_DEI, 124), INTC_IRQ(DMAC4_HEI, 125),
67 INTC_IRQ(DMAC5_DEI, 128), INTC_IRQ(DMAC5_HEI, 129),
68 INTC_IRQ(DMAC6_DEI, 132), INTC_IRQ(DMAC6_HEI, 133),
69 INTC_IRQ(DMAC7_DEI, 136), INTC_IRQ(DMAC7_HEI, 137),
70 INTC_IRQ(CMT0, 140), INTC_IRQ(CMT1, 144),
71 INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
72 INTC_IRQ(MTU2_TGI0A, 156), INTC_IRQ(MTU2_TGI0B, 157),
73 INTC_IRQ(MTU2_TGI0C, 158), INTC_IRQ(MTU2_TGI0D, 159),
74 INTC_IRQ(MTU2_TCI0V, 160),
75 INTC_IRQ(MTU2_TGI0E, 161), INTC_IRQ(MTU2_TGI0F, 162),
76 INTC_IRQ(MTU2_TGI1A, 164), INTC_IRQ(MTU2_TGI1B, 165),
77 INTC_IRQ(MTU2_TCI1V, 168), INTC_IRQ(MTU2_TCI1U, 169),
78 INTC_IRQ(MTU2_TGI2A, 172), INTC_IRQ(MTU2_TGI2B, 173),
79 INTC_IRQ(MTU2_TCI2V, 176), INTC_IRQ(MTU2_TCI2U, 177),
80 INTC_IRQ(MTU2_TGI3A, 180), INTC_IRQ(MTU2_TGI3B, 181),
81 INTC_IRQ(MTU2_TGI3C, 182), INTC_IRQ(MTU2_TGI3D, 183),
82 INTC_IRQ(MTU2_TCI3V, 184),
83 INTC_IRQ(MTU2_TGI4A, 188), INTC_IRQ(MTU2_TGI4B, 189),
84 INTC_IRQ(MTU2_TGI4C, 190), INTC_IRQ(MTU2_TGI4D, 191),
85 INTC_IRQ(MTU2_TCI4V, 192),
86 INTC_IRQ(MTU2_TGI5U, 196), INTC_IRQ(MTU2_TGI5V, 197),
87 INTC_IRQ(MTU2_TGI5W, 198),
88 INTC_IRQ(POE2_OEI1, 200), INTC_IRQ(POE2_OEI2, 201),
89 INTC_IRQ(MTU2S_TGI3A, 204), INTC_IRQ(MTU2S_TGI3B, 205),
90 INTC_IRQ(MTU2S_TGI3C, 206), INTC_IRQ(MTU2S_TGI3D, 207),
91 INTC_IRQ(MTU2S_TCI3V, 208),
92 INTC_IRQ(MTU2S_TGI4A, 212), INTC_IRQ(MTU2S_TGI4B, 213),
93 INTC_IRQ(MTU2S_TGI4C, 214), INTC_IRQ(MTU2S_TGI4D, 215),
94 INTC_IRQ(MTU2S_TCI4V, 216),
95 INTC_IRQ(MTU2S_TGI5U, 220), INTC_IRQ(MTU2S_TGI5V, 221),
96 INTC_IRQ(MTU2S_TGI5W, 222),
97 INTC_IRQ(POE2_OEI3, 224),
98 INTC_IRQ(IIC3_STPI, 228), INTC_IRQ(IIC3_NAKI, 229),
99 INTC_IRQ(IIC3_RXI, 230), INTC_IRQ(IIC3_TXI, 231),
100 INTC_IRQ(IIC3_TEI, 232),
101 INTC_IRQ(SCIF0_BRI, 240), INTC_IRQ(SCIF0_ERI, 241),
102 INTC_IRQ(SCIF0_RXI, 242), INTC_IRQ(SCIF0_TXI, 243),
103 INTC_IRQ(SCIF1_BRI, 244), INTC_IRQ(SCIF1_ERI, 245),
104 INTC_IRQ(SCIF1_RXI, 246), INTC_IRQ(SCIF1_TXI, 247),
105 INTC_IRQ(SCIF2_BRI, 248), INTC_IRQ(SCIF2_ERI, 249),
106 INTC_IRQ(SCIF2_RXI, 250), INTC_IRQ(SCIF2_TXI, 251),
107 INTC_IRQ(SCIF3_BRI, 252), INTC_IRQ(SCIF3_ERI, 253),
108 INTC_IRQ(SCIF3_RXI, 254), INTC_IRQ(SCIF3_TXI, 255),
109};
110
111static struct intc_group groups[] __initdata = {
112 INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
113 PINT4, PINT5, PINT6, PINT7),
114 INTC_GROUP(DMAC0, DMAC0_DEI, DMAC0_HEI),
115 INTC_GROUP(DMAC1, DMAC1_DEI, DMAC1_HEI),
116 INTC_GROUP(DMAC2, DMAC2_DEI, DMAC2_HEI),
117 INTC_GROUP(DMAC3, DMAC3_DEI, DMAC3_HEI),
118 INTC_GROUP(DMAC4, DMAC4_DEI, DMAC4_HEI),
119 INTC_GROUP(DMAC5, DMAC5_DEI, DMAC5_HEI),
120 INTC_GROUP(DMAC6, DMAC6_DEI, DMAC6_HEI),
121 INTC_GROUP(DMAC7, DMAC7_DEI, DMAC7_HEI),
122 INTC_GROUP(MTU0_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
123 INTC_GROUP(MTU0_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
124 INTC_GROUP(MTU1_AB, MTU2_TGI1A, MTU2_TGI1B),
125 INTC_GROUP(MTU1_VU, MTU2_TCI1V, MTU2_TCI1U),
126 INTC_GROUP(MTU2_AB, MTU2_TGI2A, MTU2_TGI2B),
127 INTC_GROUP(MTU2_VU, MTU2_TCI2V, MTU2_TCI2U),
128 INTC_GROUP(MTU3_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
129 INTC_GROUP(MTU4_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
130 INTC_GROUP(MTU5, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
131 INTC_GROUP(POE2_12, POE2_OEI1, POE2_OEI2),
132 INTC_GROUP(MTU3S_ABCD, MTU2S_TGI3A, MTU2S_TGI3B,
133 MTU2S_TGI3C, MTU2S_TGI3D),
134 INTC_GROUP(MTU4S_ABCD, MTU2S_TGI4A, MTU2S_TGI4B,
135 MTU2S_TGI4C, MTU2S_TGI4D),
136 INTC_GROUP(MTU5S, MTU2S_TGI5U, MTU2S_TGI5V, MTU2S_TGI5W),
137 INTC_GROUP(IIC3, IIC3_STPI, IIC3_NAKI, IIC3_RXI, IIC3_TXI, IIC3_TEI),
138 INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
139 INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
140 INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
141 INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
142};
143
144static struct intc_prio_reg prio_registers[] __initdata = {
145 { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
146 { 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
147 { 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, ADC_ADI0, ADC_ADI1 } },
148 { 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
149 { 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4, DMAC5, DMAC6, DMAC7 } },
150 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
151 { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { MTU0_ABCD, MTU0_VEF,
152 MTU1_AB, MTU1_VU } },
153 { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { MTU2_AB, MTU2_VU,
154 MTU3_ABCD, MTU2_TCI3V } },
155 { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { MTU4_ABCD, MTU2_TCI4V,
156 MTU5, POE2_12 } },
157 { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { MTU3S_ABCD, MTU2S_TCI3V,
158 MTU4S_ABCD, MTU2S_TCI4V } },
159 { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { MTU5S, POE2_OEI3, IIC3, 0 } },
160 { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { SCIF0, SCIF1, SCIF2, SCIF3 } },
161};
162
163static struct intc_mask_reg mask_registers[] __initdata = {
164 { 0xfffe0808, 0, 16, /* PINTER */
165 { 0, 0, 0, 0, 0, 0, 0, 0,
166 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
167};
168
169static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
170 NULL, mask_registers, prio_registers, NULL);
171
15static struct plat_sci_port sci_platform_data[] = { 172static struct plat_sci_port sci_platform_data[] = {
16 { 173 {
17 .mapbase = 0xfffe8000, 174 .mapbase = 0xfffe8000,
18 .flags = UPF_BOOT_AUTOCONF, 175 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF, 176 .type = PORT_SCIF,
20 .irqs = { 241, 242, 243, 240}, 177 .irqs = { 241, 242, 243, 240 },
21 }, { 178 }, {
22 .mapbase = 0xfffe8800, 179 .mapbase = 0xfffe8800,
23 .flags = UPF_BOOT_AUTOCONF, 180 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF, 181 .type = PORT_SCIF,
25 .irqs = { 247, 244, 245, 246}, 182 .irqs = { 245, 246, 247, 244 },
26 }, { 183 }, {
27 .mapbase = 0xfffe9000, 184 .mapbase = 0xfffe9000,
28 .flags = UPF_BOOT_AUTOCONF, 185 .flags = UPF_BOOT_AUTOCONF,
29 .type = PORT_SCIF, 186 .type = PORT_SCIF,
30 .irqs = { 249, 250, 251, 248}, 187 .irqs = { 249, 250, 251, 248 },
31 }, { 188 }, {
32 .mapbase = 0xfffe9800, 189 .mapbase = 0xfffe9800,
33 .flags = UPF_BOOT_AUTOCONF, 190 .flags = UPF_BOOT_AUTOCONF,
34 .type = PORT_SCIF, 191 .type = PORT_SCIF,
35 .irqs = { 253, 254, 255, 252}, 192 .irqs = { 253, 254, 255, 252 },
36 }, { 193 }, {
37 .flags = 0, 194 .flags = 0,
38 } 195 }
@@ -57,57 +214,7 @@ static int __init sh7206_devices_setup(void)
57} 214}
58__initcall(sh7206_devices_setup); 215__initcall(sh7206_devices_setup);
59 216
60static struct ipr_data ipr_irq_table[] = {
61 { 140, 7, 12, 2 }, /* CMI0 */
62 { 164, 8, 4, 2 }, /* MTU2_TGI1A */
63 { 240, 13, 12, 3 }, /* SCIF0_BRI */
64 { 241, 13, 12, 3 }, /* SCIF0_ERI */
65 { 242, 13, 12, 3 }, /* SCIF0_RXI */
66 { 243, 13, 12, 3 }, /* SCIF0_TXI */
67 { 244, 13, 8, 3 }, /* SCIF1_BRI */
68 { 245, 13, 8, 3 }, /* SCIF1_ERI */
69 { 246, 13, 8, 3 }, /* SCIF1_RXI */
70 { 247, 13, 8, 3 }, /* SCIF1_TXI */
71 { 248, 13, 4, 3 }, /* SCIF2_BRI */
72 { 249, 13, 4, 3 }, /* SCIF2_ERI */
73 { 250, 13, 4, 3 }, /* SCIF2_RXI */
74 { 251, 13, 4, 3 }, /* SCIF2_TXI */
75 { 252, 13, 0, 3 }, /* SCIF3_BRI */
76 { 253, 13, 0, 3 }, /* SCIF3_ERI */
77 { 254, 13, 0, 3 }, /* SCIF3_RXI */
78 { 255, 13, 0, 3 }, /* SCIF3_TXI */
79};
80
81static unsigned long ipr_offsets[] = {
82 0xfffe0818, /* IPR01 */
83 0xfffe081a, /* IPR02 */
84 0, /* unused */
85 0, /* unused */
86 0xfffe0820, /* IPR05 */
87 0xfffe0c00, /* IPR06 */
88 0xfffe0c02, /* IPR07 */
89 0xfffe0c04, /* IPR08 */
90 0xfffe0c06, /* IPR09 */
91 0xfffe0c08, /* IPR10 */
92 0xfffe0c0a, /* IPR11 */
93 0xfffe0c0c, /* IPR12 */
94 0xfffe0c0e, /* IPR13 */
95 0xfffe0c10, /* IPR14 */
96};
97
98static struct ipr_desc ipr_irq_desc = {
99 .ipr_offsets = ipr_offsets,
100 .nr_offsets = ARRAY_SIZE(ipr_offsets),
101
102 .ipr_data = ipr_irq_table,
103 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
104
105 .chip = {
106 .name = "IPR-sh7206",
107 },
108};
109
110void __init plat_irq_setup(void) 217void __init plat_irq_setup(void)
111{ 218{
112 register_ipr_controller(&ipr_irq_desc); 219 register_intc_controller(&intc_desc);
113} 220}
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 55b750763f66..646eb6933614 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -6,12 +6,13 @@ obj-y := ex.o probe.o entry.o
6 6
7# CPU subtype setup 7# CPU subtype setup
8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o 10obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o 14obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o
15obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o
15 16
16# Primary on-chip clocks (common) 17# Primary on-chip clocks (common)
17clock-$(CONFIG_CPU_SH3) := clock-sh3.o 18clock-$(CONFIG_CPU_SH3) := clock-sh3.o
@@ -19,5 +20,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o
19clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o 20clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o
20clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o 21clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
21clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o 22clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o
23clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o
22 24
23obj-y += $(clock-y) 25obj-y += $(clock-y)
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index 647623b22edc..bf579e061e09 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -50,44 +50,47 @@ int __init detect_cpu_and_cache_system(void)
50 50
51 back_to_P1(); 51 back_to_P1();
52 52
53 current_cpu_data.dcache.ways = 4; 53 boot_cpu_data.dcache.ways = 4;
54 current_cpu_data.dcache.entry_shift = 4; 54 boot_cpu_data.dcache.entry_shift = 4;
55 current_cpu_data.dcache.linesz = L1_CACHE_BYTES; 55 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
56 current_cpu_data.dcache.flags = 0; 56 boot_cpu_data.dcache.flags = 0;
57 57
58 /* 58 /*
59 * 7709A/7729 has 16K cache (256-entry), while 7702 has only 59 * 7709A/7729 has 16K cache (256-entry), while 7702 has only
60 * 2K(direct) 7702 is not supported (yet) 60 * 2K(direct) 7702 is not supported (yet)
61 */ 61 */
62 if (data0 == data1 && data2 == data3) { /* Shadow */ 62 if (data0 == data1 && data2 == data3) { /* Shadow */
63 current_cpu_data.dcache.way_incr = (1 << 11); 63 boot_cpu_data.dcache.way_incr = (1 << 11);
64 current_cpu_data.dcache.entry_mask = 0x7f0; 64 boot_cpu_data.dcache.entry_mask = 0x7f0;
65 current_cpu_data.dcache.sets = 128; 65 boot_cpu_data.dcache.sets = 128;
66 current_cpu_data.type = CPU_SH7708; 66 boot_cpu_data.type = CPU_SH7708;
67 67
68 current_cpu_data.flags |= CPU_HAS_MMU_PAGE_ASSOC; 68 boot_cpu_data.flags |= CPU_HAS_MMU_PAGE_ASSOC;
69 } else { /* 7709A or 7729 */ 69 } else { /* 7709A or 7729 */
70 current_cpu_data.dcache.way_incr = (1 << 12); 70 boot_cpu_data.dcache.way_incr = (1 << 12);
71 current_cpu_data.dcache.entry_mask = 0xff0; 71 boot_cpu_data.dcache.entry_mask = 0xff0;
72 current_cpu_data.dcache.sets = 256; 72 boot_cpu_data.dcache.sets = 256;
73 current_cpu_data.type = CPU_SH7729; 73 boot_cpu_data.type = CPU_SH7729;
74 74
75#if defined(CONFIG_CPU_SUBTYPE_SH7706) 75#if defined(CONFIG_CPU_SUBTYPE_SH7706)
76 current_cpu_data.type = CPU_SH7706; 76 boot_cpu_data.type = CPU_SH7706;
77#endif 77#endif
78#if defined(CONFIG_CPU_SUBTYPE_SH7710) 78#if defined(CONFIG_CPU_SUBTYPE_SH7710)
79 current_cpu_data.type = CPU_SH7710; 79 boot_cpu_data.type = CPU_SH7710;
80#endif 80#endif
81#if defined(CONFIG_CPU_SUBTYPE_SH7712) 81#if defined(CONFIG_CPU_SUBTYPE_SH7712)
82 current_cpu_data.type = CPU_SH7712; 82 boot_cpu_data.type = CPU_SH7712;
83#endif
84#if defined(CONFIG_CPU_SUBTYPE_SH7720)
85 boot_cpu_data.type = CPU_SH7720;
83#endif 86#endif
84#if defined(CONFIG_CPU_SUBTYPE_SH7705) 87#if defined(CONFIG_CPU_SUBTYPE_SH7705)
85 current_cpu_data.type = CPU_SH7705; 88 boot_cpu_data.type = CPU_SH7705;
86 89
87#if defined(CONFIG_SH7705_CACHE_32KB) 90#if defined(CONFIG_SH7705_CACHE_32KB)
88 current_cpu_data.dcache.way_incr = (1 << 13); 91 boot_cpu_data.dcache.way_incr = (1 << 13);
89 current_cpu_data.dcache.entry_mask = 0x1ff0; 92 boot_cpu_data.dcache.entry_mask = 0x1ff0;
90 current_cpu_data.dcache.sets = 512; 93 boot_cpu_data.dcache.sets = 512;
91 ctrl_outl(CCR_CACHE_32KB, CCR3); 94 ctrl_outl(CCR_CACHE_32KB, CCR3);
92#else 95#else
93 ctrl_outl(CCR_CACHE_16KB, CCR3); 96 ctrl_outl(CCR_CACHE_16KB, CCR3);
@@ -98,9 +101,8 @@ int __init detect_cpu_and_cache_system(void)
98 /* 101 /*
99 * SH-3 doesn't have separate caches 102 * SH-3 doesn't have separate caches
100 */ 103 */
101 current_cpu_data.dcache.flags |= SH_CACHE_COMBINED; 104 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
102 current_cpu_data.icache = current_cpu_data.dcache; 105 boot_cpu_data.icache = boot_cpu_data.dcache;
103 106
104 return 0; 107 return 0;
105} 108}
106
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index ebd9d06d8bdd..f6c65f2659e9 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SH7705 Setup 2 * SH7705 Setup
3 * 3 *
4 * Copyright (C) 2006 Paul Mundt 4 * Copyright (C) 2006, 2007 Paul Mundt
5 * Copyright (C) 2007 Nobuhiro Iwamatsu 5 * Copyright (C) 2007 Nobuhiro Iwamatsu
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
@@ -10,8 +10,90 @@
10 */ 10 */
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h>
13#include <linux/serial.h> 14#include <linux/serial.h>
14#include <asm/sci.h> 15#include <asm/sci.h>
16#include <asm/rtc.h>
17
18enum {
19 UNUSED = 0,
20
21 /* interrupt sources */
22 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
23 PINT07, PINT815,
24 DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
25 SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
26 SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
27 ADC_ADI,
28 USB_USI0, USB_USI1,
29 TPU0, TPU1, TPU2, TPU3,
30 TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
31 RTC_ATI, RTC_PRI, RTC_CUI,
32 WDT,
33 REF_RCMI,
34
35 /* interrupt groups */
36 RTC, TMU2, DMAC, USB, SCIF2, SCIF0,
37};
38
39static struct intc_vect vectors[] __initdata = {
40 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
41 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
44 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
45 INTC_VECT(SCIF0_TXI, 0x8e0),
46 INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
47 INTC_VECT(SCIF2_TXI, 0x960),
48 INTC_VECT(ADC_ADI, 0x980),
49 INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40),
50 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
51 INTC_VECT(TPU3, 0xc80), INTC_VECT(TPU1, 0xca0),
52 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
53 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
54 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
55 INTC_VECT(RTC_CUI, 0x4c0),
56 INTC_VECT(WDT, 0x560),
57 INTC_VECT(REF_RCMI, 0x580),
58};
59
60static struct intc_group groups[] __initdata = {
61 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
62 INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
63 INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
64 INTC_GROUP(USB, USB_USI0, USB_USI1),
65 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
66 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
67};
68
69static struct intc_prio priorities[] __initdata = {
70 INTC_PRIO(DMAC, 7),
71 INTC_PRIO(SCIF2, 3),
72 INTC_PRIO(SCIF0, 3),
73};
74
75static struct intc_prio_reg prio_registers[] __initdata = {
76 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
77 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
78 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
79 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
80 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
81 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
82 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
83 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
84
85};
86
87static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
88 priorities, NULL, prio_registers, NULL);
89
90static struct intc_vect vectors_irq[] __initdata = {
91 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
92 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
93};
94
95static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
96 priorities, NULL, prio_registers, NULL);
15 97
16static struct plat_sci_port sci_platform_data[] = { 98static struct plat_sci_port sci_platform_data[] = {
17 { 99 {
@@ -37,8 +119,43 @@ static struct platform_device sci_device = {
37 }, 119 },
38}; 120};
39 121
122static struct resource rtc_resources[] = {
123 [0] = {
124 .start = 0xfffffec0,
125 .end = 0xfffffec0 + 0x1e,
126 .flags = IORESOURCE_IO,
127 },
128 [1] = {
129 .start = 20,
130 .flags = IORESOURCE_IRQ,
131 },
132 [2] = {
133 .start = 21,
134 .flags = IORESOURCE_IRQ,
135 },
136 [3] = {
137 .start = 22,
138 .flags = IORESOURCE_IRQ,
139 },
140};
141
142static struct sh_rtc_platform_info rtc_info = {
143 .capabilities = RTC_CAP_4_DIGIT_YEAR,
144};
145
146static struct platform_device rtc_device = {
147 .name = "sh-rtc",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(rtc_resources),
150 .resource = rtc_resources,
151 .dev = {
152 .platform_data = &rtc_info,
153 },
154};
155
40static struct platform_device *sh7705_devices[] __initdata = { 156static struct platform_device *sh7705_devices[] __initdata = {
41 &sci_device, 157 &sci_device,
158 &rtc_device,
42}; 159};
43 160
44static int __init sh7705_devices_setup(void) 161static int __init sh7705_devices_setup(void)
@@ -48,51 +165,16 @@ static int __init sh7705_devices_setup(void)
48} 165}
49__initcall(sh7705_devices_setup); 166__initcall(sh7705_devices_setup);
50 167
51static struct ipr_data ipr_irq_table[] = { 168void __init plat_irq_setup_pins(int mode)
52 /* IRQ, IPR-idx, shift, priority */ 169{
53 { 16, 0, 12, 2 }, /* TMU0 TUNI*/ 170 if (mode == IRQ_MODE_IRQ) {
54 { 17, 0, 8, 2 }, /* TMU1 TUNI */ 171 register_intc_controller(&intc_desc_irq);
55 { 18, 0, 4, 2 }, /* TMU2 TUNI */ 172 return;
56 { 27, 1, 12, 2 }, /* WDT ITI */ 173 }
57 { 20, 0, 0, 2 }, /* RTC ATI (alarm) */ 174 BUG();
58 { 21, 0, 0, 2 }, /* RTC PRI (period) */ 175}
59 { 22, 0, 0, 2 }, /* RTC CUI (carry) */
60 { 48, 4, 12, 7 }, /* DMAC DMTE0 */
61 { 49, 4, 12, 7 }, /* DMAC DMTE1 */
62 { 50, 4, 12, 7 }, /* DMAC DMTE2 */
63 { 51, 4, 12, 7 }, /* DMAC DMTE3 */
64 { 52, 4, 8, 3 }, /* SCIF0 ERI */
65 { 53, 4, 8, 3 }, /* SCIF0 RXI */
66 { 55, 4, 8, 3 }, /* SCIF0 TXI */
67 { 56, 4, 4, 3 }, /* SCIF1 ERI */
68 { 57, 4, 4, 3 }, /* SCIF1 RXI */
69 { 59, 4, 4, 3 }, /* SCIF1 TXI */
70};
71
72static unsigned long ipr_offsets[] = {
73 0xFFFFFEE2, /* 0: IPRA */
74 0xFFFFFEE4, /* 1: IPRB */
75 0xA4000016, /* 2: IPRC */
76 0xA4000018, /* 3: IPRD */
77 0xA400001A, /* 4: IPRE */
78 0xA4080000, /* 5: IPRF */
79 0xA4080002, /* 6: IPRG */
80 0xA4080004, /* 7: IPRH */
81};
82
83static struct ipr_desc ipr_irq_desc = {
84 .ipr_offsets = ipr_offsets,
85 .nr_offsets = ARRAY_SIZE(ipr_offsets),
86
87 .ipr_data = ipr_irq_table,
88 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
89
90 .chip = {
91 .name = "IPR-sh7705",
92 },
93};
94 176
95void __init plat_irq_setup(void) 177void __init plat_irq_setup(void)
96{ 178{
97 register_ipr_controller(&ipr_irq_desc); 179 register_intc_controller(&intc_desc);
98} 180}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7708.c b/arch/sh/kernel/cpu/sh3/setup-sh7708.c
deleted file mode 100644
index f933723911ca..000000000000
--- a/arch/sh/kernel/cpu/sh3/setup-sh7708.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * SH7708 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct plat_sci_port sci_platform_data[] = {
16 {
17 .mapbase = 0xfffffe80,
18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCI,
20 .irqs = { 23, 24, 25, 0 },
21 }, {
22 .flags = 0,
23 }
24};
25
26static struct platform_device sci_device = {
27 .name = "sh-sci",
28 .id = -1,
29 .dev = {
30 .platform_data = sci_platform_data,
31 },
32};
33
34static struct platform_device *sh7708_devices[] __initdata = {
35 &sci_device,
36};
37
38static int __init sh7708_devices_setup(void)
39{
40 return platform_add_devices(sh7708_devices,
41 ARRAY_SIZE(sh7708_devices));
42}
43__initcall(sh7708_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
deleted file mode 100644
index 086f8e2545af..000000000000
--- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
+++ /dev/null
@@ -1,145 +0,0 @@
1/*
2 * SH7707/SH7709 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15static struct resource rtc_resources[] = {
16 [0] = {
17 .start = 0xfffffec0,
18 .end = 0xfffffec0 + 0x1e,
19 .flags = IORESOURCE_IO,
20 },
21 [1] = {
22 .start = 20,
23 .flags = IORESOURCE_IRQ,
24 },
25 [2] = {
26 .start = 21,
27 .flags = IORESOURCE_IRQ,
28 },
29 [3] = {
30 .start = 22,
31 .flags = IORESOURCE_IRQ,
32 },
33};
34
35static struct plat_sci_port sci_platform_data[] = {
36 {
37 .mapbase = 0xfffffe80,
38 .flags = UPF_BOOT_AUTOCONF,
39 .type = PORT_SCI,
40 .irqs = { 23, 24, 25, 0 },
41 }, {
42 .mapbase = 0xa4000150,
43 .flags = UPF_BOOT_AUTOCONF,
44 .type = PORT_SCIF,
45 .irqs = { 56, 57, 59, 58 },
46 }, {
47 .mapbase = 0xa4000140,
48 .flags = UPF_BOOT_AUTOCONF,
49 .type = PORT_IRDA,
50 .irqs = { 52, 53, 55, 54 },
51 }, {
52 .flags = 0,
53 }
54};
55
56static struct platform_device sci_device = {
57 .name = "sh-sci",
58 .id = -1,
59 .dev = {
60 .platform_data = sci_platform_data,
61 },
62};
63
64static struct platform_device rtc_device = {
65 .name = "sh-rtc",
66 .id = -1,
67 .num_resources = ARRAY_SIZE(rtc_resources),
68 .resource = rtc_resources,
69};
70
71static struct platform_device *sh7709_devices[] __initdata = {
72 &sci_device,
73 &rtc_device,
74};
75
76static int __init sh7709_devices_setup(void)
77{
78 return platform_add_devices(sh7709_devices,
79 ARRAY_SIZE(sh7709_devices));
80}
81__initcall(sh7709_devices_setup);
82
83static struct ipr_data ipr_irq_table[] = {
84 { 16, 0, 12, 2 }, /* TMU TUNI0 */
85 { 17, 0, 8, 4 }, /* TMU TUNI1 */
86 { 18, 0, 4, 1 }, /* TMU TUNI1 */
87 { 19, 0, 4, 1 }, /* TMU TUNI1 */
88 { 20, 0, 0, 2 }, /* RTC CUI */
89 { 21, 0, 0, 2 }, /* RTC CUI */
90 { 22, 0, 0, 2 }, /* RTC CUI */
91
92 { 23, 1, 4, 3 }, /* SCI */
93 { 24, 1, 4, 3 }, /* SCI */
94 { 25, 1, 4, 3 }, /* SCI */
95 { 26, 1, 4, 3 }, /* SCI */
96 { 27, 1, 12, 3 }, /* WDT ITI */
97
98 { 32, 2, 0, 1 }, /* IRQ 0 */
99 { 33, 2, 4, 1 }, /* IRQ 1 */
100 { 34, 2, 8, 1 }, /* IRQ 2 APM */
101 { 35, 2, 12, 1 }, /* IRQ 3 TOUCHSCREEN */
102
103 { 36, 3, 0, 1 }, /* IRQ 4 */
104 { 37, 3, 4, 1 }, /* IRQ 5 */
105
106 { 48, 4, 12, 7 }, /* DMA */
107 { 49, 4, 12, 7 }, /* DMA */
108 { 50, 4, 12, 7 }, /* DMA */
109 { 51, 4, 12, 7 }, /* DMA */
110
111 { 52, 4, 8, 3 }, /* IRDA */
112 { 53, 4, 8, 3 }, /* IRDA */
113 { 54, 4, 8, 3 }, /* IRDA */
114 { 55, 4, 8, 3 }, /* IRDA */
115
116 { 56, 4, 4, 3 }, /* SCIF */
117 { 57, 4, 4, 3 }, /* SCIF */
118 { 58, 4, 4, 3 }, /* SCIF */
119 { 59, 4, 4, 3 }, /* SCIF */
120};
121
122static unsigned long ipr_offsets[] = {
123 0xfffffee2, /* 0: IPRA */
124 0xfffffee4, /* 1: IPRB */
125 0xa4000016, /* 2: IPRC */
126 0xa4000018, /* 3: IPRD */
127 0xa400001a, /* 4: IPRE */
128};
129
130static struct ipr_desc ipr_irq_desc = {
131 .ipr_offsets = ipr_offsets,
132 .nr_offsets = ARRAY_SIZE(ipr_offsets),
133
134 .ipr_data = ipr_irq_table,
135 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
136
137 .chip = {
138 .name = "IPR-sh7709",
139 },
140};
141
142void __init plat_irq_setup(void)
143{
144 register_ipr_controller(&ipr_irq_desc);
145}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
new file mode 100644
index 000000000000..60b04b1f9453
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -0,0 +1,224 @@
1/*
2 * SH3 Setup code for SH7706, SH7707, SH7708, SH7709
3 *
4 * Copyright (C) 2007 Magnus Damm
5 *
6 * Based on setup-sh7709.c
7 *
8 * Copyright (C) 2006 Paul Mundt
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/irq.h>
17#include <linux/platform_device.h>
18#include <linux/serial.h>
19#include <asm/sci.h>
20
21enum {
22 UNUSED = 0,
23
24 /* interrupt sources */
25 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
26 PINT07, PINT815,
27 DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
28 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
29 SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
30 SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI,
31 ADC_ADI,
32 LCDC, PCC0, PCC1,
33 TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
34 RTC_ATI, RTC_PRI, RTC_CUI,
35 WDT,
36 REF_RCMI, REF_ROVI,
37
38 /* interrupt groups */
39 RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0,
40};
41
42static struct intc_vect vectors[] __initdata = {
43 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
44 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
45 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
46 INTC_VECT(RTC_CUI, 0x4c0),
47 INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500),
48 INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540),
49 INTC_VECT(WDT, 0x560),
50 INTC_VECT(REF_RCMI, 0x580),
51 INTC_VECT(REF_ROVI, 0x5a0),
52#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
53 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
54 defined(CONFIG_CPU_SUBTYPE_SH7709)
55 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
56 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
57 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
58 INTC_VECT(ADC_ADI, 0x980),
59 INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
60 INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960),
61#endif
62#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
63 defined(CONFIG_CPU_SUBTYPE_SH7709)
64 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
65 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
66 INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
67#endif
68#if defined(CONFIG_CPU_SUBTYPE_SH7707)
69 INTC_VECT(LCDC, 0x9a0),
70 INTC_VECT(PCC0, 0x9c0), INTC_VECT(PCC1, 0x9e0),
71#endif
72};
73
74static struct intc_group groups[] __initdata = {
75 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
76 INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
77 INTC_GROUP(REF, REF_RCMI, REF_ROVI),
78 INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
79 INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI),
80 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
81 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
82};
83
84static struct intc_prio priorities[] __initdata = {
85 INTC_PRIO(DMAC, 7),
86 INTC_PRIO(SCI, 3),
87 INTC_PRIO(SCIF2, 3),
88 INTC_PRIO(SCIF0, 3),
89};
90
91static struct intc_prio_reg prio_registers[] __initdata = {
92 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
93 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
94#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
95 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
96 defined(CONFIG_CPU_SUBTYPE_SH7709)
97 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
98 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
99 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
100#endif
101#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
102 defined(CONFIG_CPU_SUBTYPE_SH7709)
103 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, } },
104 { 0xa400001a, 0, 16, 4, /* IPRE */ { 0, SCIF0 } },
105#endif
106#if defined(CONFIG_CPU_SUBTYPE_SH7707)
107 { 0xa400001c, 0, 16, 4, /* IPRF */ { 0, LCDC, PCC0, PCC1, } },
108#endif
109};
110
111static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
112 priorities, NULL, prio_registers, NULL);
113
114#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
115 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
116 defined(CONFIG_CPU_SUBTYPE_SH7709)
117static struct intc_vect vectors_irq[] __initdata = {
118 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
119 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
120};
121
122static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
123 priorities, NULL, prio_registers, NULL);
124#endif
125
126static struct resource rtc_resources[] = {
127 [0] = {
128 .start = 0xfffffec0,
129 .end = 0xfffffec0 + 0x1e,
130 .flags = IORESOURCE_IO,
131 },
132 [1] = {
133 .start = 20,
134 .flags = IORESOURCE_IRQ,
135 },
136 [2] = {
137 .start = 21,
138 .flags = IORESOURCE_IRQ,
139 },
140 [3] = {
141 .start = 22,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static struct platform_device rtc_device = {
147 .name = "sh-rtc",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(rtc_resources),
150 .resource = rtc_resources,
151};
152
153static struct plat_sci_port sci_platform_data[] = {
154 {
155 .mapbase = 0xfffffe80,
156 .flags = UPF_BOOT_AUTOCONF,
157 .type = PORT_SCI,
158 .irqs = { 23, 24, 25, 0 },
159 },
160#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
161 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
162 defined(CONFIG_CPU_SUBTYPE_SH7709)
163 {
164 .mapbase = 0xa4000150,
165 .flags = UPF_BOOT_AUTOCONF,
166 .type = PORT_SCIF,
167 .irqs = { 56, 57, 59, 58 },
168 },
169#endif
170#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
171 defined(CONFIG_CPU_SUBTYPE_SH7709)
172 {
173 .mapbase = 0xa4000140,
174 .flags = UPF_BOOT_AUTOCONF,
175 .type = PORT_IRDA,
176 .irqs = { 52, 53, 55, 54 },
177 },
178#endif
179 {
180 .flags = 0,
181 }
182};
183
184static struct platform_device sci_device = {
185 .name = "sh-sci",
186 .id = -1,
187 .dev = {
188 .platform_data = sci_platform_data,
189 },
190};
191
192static struct platform_device *sh770x_devices[] __initdata = {
193 &sci_device,
194 &rtc_device,
195};
196
197static int __init sh770x_devices_setup(void)
198{
199 return platform_add_devices(sh770x_devices,
200 ARRAY_SIZE(sh770x_devices));
201}
202__initcall(sh770x_devices_setup);
203
204#define INTC_ICR1 0xa4000010UL
205#define INTC_ICR1_IRQLVL (1<<14)
206
207void __init plat_irq_setup_pins(int mode)
208{
209 if (mode == IRQ_MODE_IRQ) {
210#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
211 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
212 defined(CONFIG_CPU_SUBTYPE_SH7709)
213 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
214 register_intc_controller(&intc_desc_irq);
215 return;
216#endif
217 }
218 BUG();
219}
220
221void __init plat_irq_setup(void)
222{
223 register_intc_controller(&intc_desc);
224}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 132284893373..84e5629fa841 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SH7710 Setup 2 * SH3 Setup code for SH7710, SH7712
3 * 3 *
4 * Copyright (C) 2006 Paul Mundt 4 * Copyright (C) 2006, 2007 Paul Mundt
5 * Copyright (C) 2007 Nobuhiro Iwamatsu 5 * Copyright (C) 2007 Nobuhiro Iwamatsu
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
@@ -10,8 +10,140 @@
10 */ 10 */
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h>
13#include <linux/serial.h> 14#include <linux/serial.h>
14#include <asm/sci.h> 15#include <asm/sci.h>
16#include <asm/rtc.h>
17
18enum {
19 UNUSED = 0,
20
21 /* interrupt sources */
22 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
23 DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
24 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
25 SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
26 DMAC_DEI4, DMAC_DEI5,
27 IPSEC,
28 EDMAC0, EDMAC1, EDMAC2,
29 SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI,
30 SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI,
31 TMU0, TMU1, TMU2,
32 RTC_ATI, RTC_PRI, RTC_CUI,
33 WDT,
34 REF,
35
36 /* interrupt groups */
37 RTC, DMAC1, SCIF0, SCIF1, DMAC2, SIOF0, SIOF1,
38};
39
40static struct intc_vect vectors[] __initdata = {
41 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
44 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
45 INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
46 INTC_VECT(SCIF1_ERI, 0x900), INTC_VECT(SCIF1_RXI, 0x920),
47 INTC_VECT(SCIF1_BRI, 0x940), INTC_VECT(SCIF1_TXI, 0x960),
48 INTC_VECT(DMAC_DEI4, 0xb80), INTC_VECT(DMAC_DEI5, 0xba0),
49#ifdef CONFIG_CPU_SUBTYPE_SH7710
50 INTC_VECT(IPSEC, 0xbe0),
51#endif
52 INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20),
53 INTC_VECT(EDMAC2, 0xc40),
54 INTC_VECT(SIOF0_ERI, 0xe00), INTC_VECT(SIOF0_TXI, 0xe20),
55 INTC_VECT(SIOF0_RXI, 0xe40), INTC_VECT(SIOF0_CCI, 0xe60),
56 INTC_VECT(SIOF1_ERI, 0xe80), INTC_VECT(SIOF1_TXI, 0xea0),
57 INTC_VECT(SIOF1_RXI, 0xec0), INTC_VECT(SIOF1_CCI, 0xee0),
58 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
59 INTC_VECT(TMU2, 0x440),
60 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
61 INTC_VECT(RTC_CUI, 0x4c0),
62 INTC_VECT(WDT, 0x560),
63 INTC_VECT(REF, 0x580),
64};
65
66static struct intc_group groups[] __initdata = {
67 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
68 INTC_GROUP(DMAC1, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
69 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
70 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
71 INTC_GROUP(DMAC2, DMAC_DEI4, DMAC_DEI5),
72 INTC_GROUP(SIOF0, SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI),
73 INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI),
74};
75
76static struct intc_prio priorities[] __initdata = {
77 INTC_PRIO(DMAC1, 7),
78 INTC_PRIO(DMAC2, 7),
79 INTC_PRIO(SCIF0, 3),
80 INTC_PRIO(SCIF1, 3),
81 INTC_PRIO(SIOF0, 3),
82 INTC_PRIO(SIOF1, 3),
83 INTC_PRIO(EDMAC0, 5),
84 INTC_PRIO(EDMAC1, 5),
85 INTC_PRIO(EDMAC2, 5),
86};
87
88static struct intc_prio_reg prio_registers[] __initdata = {
89 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
90 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
91 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
92 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
93 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },
94 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, DMAC2 } },
95#ifdef CONFIG_CPU_SUBTYPE_SH7710
96 { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC } },
97#endif
98 { 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } },
99 { 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } },
100 { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
101};
102
103static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
104 priorities, NULL, prio_registers, NULL);
105
106static struct intc_vect vectors_irq[] __initdata = {
107 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
108 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
109};
110
111static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
112 priorities, NULL, prio_registers, NULL);
113
114static struct resource rtc_resources[] = {
115 [0] = {
116 .start = 0xa413fec0,
117 .end = 0xa413fec0 + 0x1e,
118 .flags = IORESOURCE_IO,
119 },
120 [1] = {
121 .start = 20,
122 .flags = IORESOURCE_IRQ,
123 },
124 [2] = {
125 .start = 21,
126 .flags = IORESOURCE_IRQ,
127 },
128 [3] = {
129 .start = 22,
130 .flags = IORESOURCE_IRQ,
131 },
132};
133
134static struct sh_rtc_platform_info rtc_info = {
135 .capabilities = RTC_CAP_4_DIGIT_YEAR,
136};
137
138static struct platform_device rtc_device = {
139 .name = "sh-rtc",
140 .id = -1,
141 .num_resources = ARRAY_SIZE(rtc_resources),
142 .resource = rtc_resources,
143 .dev = {
144 .platform_data = &rtc_info,
145 },
146};
15 147
16static struct plat_sci_port sci_platform_data[] = { 148static struct plat_sci_port sci_platform_data[] = {
17 { 149 {
@@ -20,7 +152,7 @@ static struct plat_sci_port sci_platform_data[] = {
20 .type = PORT_SCIF, 152 .type = PORT_SCIF,
21 .irqs = { 52, 53, 55, 54 }, 153 .irqs = { 52, 53, 55, 54 },
22 }, { 154 }, {
23 .mapbase = 0xa4420000, 155 .mapbase = 0xa4410000,
24 .flags = UPF_BOOT_AUTOCONF, 156 .flags = UPF_BOOT_AUTOCONF,
25 .type = PORT_SCIF, 157 .type = PORT_SCIF,
26 .irqs = { 56, 57, 59, 58 }, 158 .irqs = { 56, 57, 59, 58 },
@@ -40,6 +172,7 @@ static struct platform_device sci_device = {
40 172
41static struct platform_device *sh7710_devices[] __initdata = { 173static struct platform_device *sh7710_devices[] __initdata = {
42 &sci_device, 174 &sci_device,
175 &rtc_device,
43}; 176};
44 177
45static int __init sh7710_devices_setup(void) 178static int __init sh7710_devices_setup(void)
@@ -49,59 +182,16 @@ static int __init sh7710_devices_setup(void)
49} 182}
50__initcall(sh7710_devices_setup); 183__initcall(sh7710_devices_setup);
51 184
52static struct ipr_data ipr_irq_table[] = { 185void __init plat_irq_setup_pins(int mode)
53 /* IRQ, IPR-idx, shift, priority */ 186{
54 { 16, 0, 12, 2 }, /* TMU0 TUNI*/ 187 if (mode == IRQ_MODE_IRQ) {
55 { 17, 0, 8, 2 }, /* TMU1 TUNI */ 188 register_intc_controller(&intc_desc_irq);
56 { 18, 0, 4, 2 }, /* TMU2 TUNI */ 189 return;
57 { 27, 1, 12, 2 }, /* WDT ITI */ 190 }
58 { 20, 0, 0, 2 }, /* RTC ATI (alarm) */ 191 BUG();
59 { 21, 0, 0, 2 }, /* RTC PRI (period) */ 192}
60 { 22, 0, 0, 2 }, /* RTC CUI (carry) */
61 { 48, 4, 12, 7 }, /* DMAC DMTE0 */
62 { 49, 4, 12, 7 }, /* DMAC DMTE1 */
63 { 50, 4, 12, 7 }, /* DMAC DMTE2 */
64 { 51, 4, 12, 7 }, /* DMAC DMTE3 */
65 { 52, 4, 8, 3 }, /* SCIF0 ERI */
66 { 53, 4, 8, 3 }, /* SCIF0 RXI */
67 { 54, 4, 8, 3 }, /* SCIF0 BRI */
68 { 55, 4, 8, 3 }, /* SCIF0 TXI */
69 { 56, 4, 4, 3 }, /* SCIF1 ERI */
70 { 57, 4, 4, 3 }, /* SCIF1 RXI */
71 { 58, 4, 4, 3 }, /* SCIF1 BRI */
72 { 59, 4, 4, 3 }, /* SCIF1 TXI */
73 { 76, 5, 8, 7 }, /* DMAC DMTE4 */
74 { 77, 5, 8, 7 }, /* DMAC DMTE5 */
75 { 80, 6, 12, 5 }, /* EDMAC EINT0 */
76 { 81, 6, 8, 5 }, /* EDMAC EINT1 */
77 { 82, 6, 4, 5 }, /* EDMAC EINT2 */
78};
79
80static unsigned long ipr_offsets[] = {
81 0xA414FEE2, /* 0: IPRA */
82 0xA414FEE4, /* 1: IPRB */
83 0xA4140016, /* 2: IPRC */
84 0xA4140018, /* 3: IPRD */
85 0xA414001A, /* 4: IPRE */
86 0xA4080000, /* 5: IPRF */
87 0xA4080002, /* 6: IPRG */
88 0xA4080004, /* 7: IPRH */
89 0xA4080006, /* 8: IPRI */
90};
91
92static struct ipr_desc ipr_irq_desc = {
93 .ipr_offsets = ipr_offsets,
94 .nr_offsets = ARRAY_SIZE(ipr_offsets),
95
96 .ipr_data = ipr_irq_table,
97 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
98
99 .chip = {
100 .name = "IPR-sh7710",
101 },
102};
103 193
104void __init plat_irq_setup(void) 194void __init plat_irq_setup(void)
105{ 195{
106 register_ipr_controller(&ipr_irq_desc); 196 register_intc_controller(&intc_desc);
107} 197}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
new file mode 100644
index 000000000000..a0929b8a95ae
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -0,0 +1,210 @@
1/*
2 * SH7720 Setup
3 *
4 * Copyright (C) 2007 Markus Brunner, Mark Jonas
5 *
6 * Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
7 *
8 * Copyright (C) 2006 Paul Mundt
9 * Copyright (C) 2006 Jamie Lenehan
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/serial.h>
18#include <linux/io.h>
19#include <asm/sci.h>
20#include <asm/rtc.h>
21
22#define INTC_ICR1 0xA4140010UL
23#define INTC_ICR_IRLM 0x4000
24#define INTC_ICR_IRQ (~INTC_ICR_IRLM)
25
26static struct resource rtc_resources[] = {
27 [0] = {
28 .start = 0xa413fec0,
29 .end = 0xa413fec0 + 0x28 - 1,
30 .flags = IORESOURCE_IO,
31 },
32 [1] = {
33 /* Period IRQ */
34 .start = 21,
35 .flags = IORESOURCE_IRQ,
36 },
37 [2] = {
38 /* Carry IRQ */
39 .start = 22,
40 .flags = IORESOURCE_IRQ,
41 },
42 [3] = {
43 /* Alarm IRQ */
44 .start = 20,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct sh_rtc_platform_info rtc_info = {
50 .capabilities = RTC_CAP_4_DIGIT_YEAR,
51};
52
53static struct platform_device rtc_device = {
54 .name = "sh-rtc",
55 .id = -1,
56 .num_resources = ARRAY_SIZE(rtc_resources),
57 .resource = rtc_resources,
58 .dev = {
59 .platform_data = &rtc_info,
60 },
61};
62
63static struct plat_sci_port sci_platform_data[] = {
64 {
65 .mapbase = 0xa4430000,
66 .flags = UPF_BOOT_AUTOCONF,
67 .type = PORT_SCIF,
68 .irqs = { 80, 80, 80, 80 },
69 }, {
70 .mapbase = 0xa4438000,
71 .flags = UPF_BOOT_AUTOCONF,
72 .type = PORT_SCIF,
73 .irqs = { 81, 81, 81, 81 },
74 }, {
75
76 .flags = 0,
77 }
78};
79
80static struct platform_device sci_device = {
81 .name = "sh-sci",
82 .id = -1,
83 .dev = {
84 .platform_data = sci_platform_data,
85 },
86};
87
88static struct platform_device *sh7720_devices[] __initdata = {
89 &rtc_device,
90 &sci_device,
91};
92
93static int __init sh7720_devices_setup(void)
94{
95 return platform_add_devices(sh7720_devices,
96 ARRAY_SIZE(sh7720_devices));
97}
98__initcall(sh7720_devices_setup);
99
100enum {
101 UNUSED = 0,
102
103 /* interrupt sources */
104 TMU0, TMU1, TMU2, RTC_ATI, RTC_PRI, RTC_CUI,
105 WDT, REF_RCMI, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND,
106 IRQ0, IRQ1, IRQ2, IRQ3,
107 USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
108 DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3, LCDC, SSL,
109 ADC, DMAC2_DEI4, DMAC2_DEI5, USBFI0, USBFI1, CMT,
110 SCIF0, SCIF1,
111 PINT07, PINT815, TPU0, TPU1, TPU2, TPU3, IIC,
112 SIOF0, SIOF1, MMCI0, MMCI1, MMCI2, MMCI3, PCC,
113 USBHI, AFEIF,
114 H_UDI,
115 /* interrupt groups */
116 TMU, RTC, SIM, DMAC1, USBFI, DMAC2, USB, TPU, MMC,
117};
118
119static struct intc_vect vectors[] __initdata = {
120 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
121 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480),
122 INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0),
123 INTC_VECT(SIM_ERI, 0x4e0), INTC_VECT(SIM_RXI, 0x500),
124 INTC_VECT(SIM_TXI, 0x520), INTC_VECT(SIM_TEND, 0x540),
125 INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580),
126 /* H_UDI cannot be masked */ INTC_VECT(TMU_SUNI, 0x6c0),
127 INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1_DEI0, 0x800),
128 INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840),
129 INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900),
130 INTC_VECT(SSL, 0x980), INTC_VECT(USBFI0, 0xa20),
131 INTC_VECT(USBFI1, 0xa40), INTC_VECT(USBHI, 0xa60),
132 INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0),
133 INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00),
134 INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80),
135 INTC_VECT(PINT815, 0xca0), INTC_VECT(SIOF0, 0xd00),
136 INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU0, 0xd80),
137 INTC_VECT(TPU1, 0xda0), INTC_VECT(TPU2, 0xdc0),
138 INTC_VECT(TPU3, 0xde0), INTC_VECT(IIC, 0xe00),
139 INTC_VECT(MMCI0, 0xe80), INTC_VECT(MMCI1, 0xea0),
140 INTC_VECT(MMCI2, 0xec0), INTC_VECT(MMCI3, 0xee0),
141 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),
142 INTC_VECT(AFEIF, 0xfe0),
143};
144
145static struct intc_group groups[] __initdata = {
146 INTC_GROUP(TMU, TMU0, TMU1, TMU2),
147 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
148 INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
149 INTC_GROUP(DMAC1, DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3),
150 INTC_GROUP(USBFI, USBFI0, USBFI1),
151 INTC_GROUP(DMAC2, DMAC2_DEI4, DMAC2_DEI5),
152 INTC_GROUP(TPU, TPU0, TPU1, TPU2, TPU3),
153 INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3),
154};
155
156static struct intc_prio priorities[] __initdata = {
157 INTC_PRIO(SCIF0, 2),
158 INTC_PRIO(SCIF1, 2),
159 INTC_PRIO(DMAC1, 1),
160 INTC_PRIO(DMAC2, 1),
161 INTC_PRIO(RTC, 2),
162 INTC_PRIO(TMU, 2),
163 INTC_PRIO(TPU, 2),
164};
165
166static struct intc_prio_reg prio_registers[] __initdata = {
167 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
168 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
169 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
170 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
171 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
172 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
173 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
174 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
175 { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
176 { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },
177};
178
179static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
180 priorities, NULL, prio_registers, NULL);
181
182static struct intc_sense_reg sense_registers[] __initdata = {
183 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
184};
185
186static struct intc_vect vectors_irq[] __initdata = {
187 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
188 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
189 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
190};
191
192static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
193 NULL, priorities, NULL, prio_registers, sense_registers);
194
195void __init plat_irq_setup_pins(int mode)
196{
197 switch (mode) {
198 case IRQ_MODE_IRQ:
199 ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1);
200 register_intc_controller(&intc_irq_desc);
201 break;
202 default:
203 BUG();
204 }
205}
206
207void __init plat_irq_setup(void)
208{
209 register_intc_controller(&intc_desc);
210}
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 98d28fb1ce16..21375d777e99 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * CPU Subtype Probing for SH-4. 4 * CPU Subtype Probing for SH-4.
5 * 5 *
6 * Copyright (C) 2001 - 2006 Paul Mundt 6 * Copyright (C) 2001 - 2007 Paul Mundt
7 * Copyright (C) 2003 Richard Curnow 7 * Copyright (C) 2003 Richard Curnow
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
@@ -12,7 +12,6 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/smp.h>
16#include <asm/processor.h> 15#include <asm/processor.h>
17#include <asm/cache.h> 16#include <asm/cache.h>
18 17
@@ -36,37 +35,34 @@ int __init detect_cpu_and_cache_system(void)
36 /* 35 /*
37 * Setup some sane SH-4 defaults for the icache 36 * Setup some sane SH-4 defaults for the icache
38 */ 37 */
39 current_cpu_data.icache.way_incr = (1 << 13); 38 boot_cpu_data.icache.way_incr = (1 << 13);
40 current_cpu_data.icache.entry_shift = 5; 39 boot_cpu_data.icache.entry_shift = 5;
41 current_cpu_data.icache.sets = 256; 40 boot_cpu_data.icache.sets = 256;
42 current_cpu_data.icache.ways = 1; 41 boot_cpu_data.icache.ways = 1;
43 current_cpu_data.icache.linesz = L1_CACHE_BYTES; 42 boot_cpu_data.icache.linesz = L1_CACHE_BYTES;
44 43
45 /* 44 /*
46 * And again for the dcache .. 45 * And again for the dcache ..
47 */ 46 */
48 current_cpu_data.dcache.way_incr = (1 << 14); 47 boot_cpu_data.dcache.way_incr = (1 << 14);
49 current_cpu_data.dcache.entry_shift = 5; 48 boot_cpu_data.dcache.entry_shift = 5;
50 current_cpu_data.dcache.sets = 512; 49 boot_cpu_data.dcache.sets = 512;
51 current_cpu_data.dcache.ways = 1; 50 boot_cpu_data.dcache.ways = 1;
52 current_cpu_data.dcache.linesz = L1_CACHE_BYTES; 51 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
53 52
54 /* 53 /*
55 * Setup some generic flags we can probe 54 * Setup some generic flags we can probe on SH-4A parts
56 * (L2 and DSP detection only work on SH-4A)
57 */ 55 */
58 if (((pvr >> 16) & 0xff) == 0x10) { 56 if (((pvr >> 16) & 0xff) == 0x10) {
59 if ((cvr & 0x02000000) == 0)
60 current_cpu_data.flags |= CPU_HAS_L2_CACHE;
61 if ((cvr & 0x10000000) == 0) 57 if ((cvr & 0x10000000) == 0)
62 current_cpu_data.flags |= CPU_HAS_DSP; 58 boot_cpu_data.flags |= CPU_HAS_DSP;
63 59
64 current_cpu_data.flags |= CPU_HAS_LLSC; 60 boot_cpu_data.flags |= CPU_HAS_LLSC;
65 } 61 }
66 62
67 /* FPU detection works for everyone */ 63 /* FPU detection works for everyone */
68 if ((cvr & 0x20000000) == 1) 64 if ((cvr & 0x20000000) == 1)
69 current_cpu_data.flags |= CPU_HAS_FPU; 65 boot_cpu_data.flags |= CPU_HAS_FPU;
70 66
71 /* Mask off the upper chip ID */ 67 /* Mask off the upper chip ID */
72 pvr &= 0xffff; 68 pvr &= 0xffff;
@@ -77,140 +73,140 @@ int __init detect_cpu_and_cache_system(void)
77 */ 73 */
78 switch (pvr) { 74 switch (pvr) {
79 case 0x205: 75 case 0x205:
80 current_cpu_data.type = CPU_SH7750; 76 boot_cpu_data.type = CPU_SH7750;
81 current_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU | 77 boot_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
82 CPU_HAS_PERF_COUNTER; 78 CPU_HAS_PERF_COUNTER;
83 break; 79 break;
84 case 0x206: 80 case 0x206:
85 current_cpu_data.type = CPU_SH7750S; 81 boot_cpu_data.type = CPU_SH7750S;
86 current_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU | 82 boot_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
87 CPU_HAS_PERF_COUNTER; 83 CPU_HAS_PERF_COUNTER;
88 break; 84 break;
89 case 0x1100: 85 case 0x1100:
90 current_cpu_data.type = CPU_SH7751; 86 boot_cpu_data.type = CPU_SH7751;
91 current_cpu_data.flags |= CPU_HAS_FPU; 87 boot_cpu_data.flags |= CPU_HAS_FPU;
92 break; 88 break;
93 case 0x2001: 89 case 0x2001:
94 case 0x2004: 90 case 0x2004:
95 current_cpu_data.type = CPU_SH7770; 91 boot_cpu_data.type = CPU_SH7770;
96 current_cpu_data.icache.ways = 4; 92 boot_cpu_data.icache.ways = 4;
97 current_cpu_data.dcache.ways = 4; 93 boot_cpu_data.dcache.ways = 4;
98 94
99 current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_LLSC; 95 boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_LLSC;
100 break; 96 break;
101 case 0x2006: 97 case 0x2006:
102 case 0x200A: 98 case 0x200A:
103 if (prr == 0x61) 99 if (prr == 0x61)
104 current_cpu_data.type = CPU_SH7781; 100 boot_cpu_data.type = CPU_SH7781;
105 else 101 else
106 current_cpu_data.type = CPU_SH7780; 102 boot_cpu_data.type = CPU_SH7780;
107 103
108 current_cpu_data.icache.ways = 4; 104 boot_cpu_data.icache.ways = 4;
109 current_cpu_data.dcache.ways = 4; 105 boot_cpu_data.dcache.ways = 4;
110 106
111 current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER | 107 boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
112 CPU_HAS_LLSC; 108 CPU_HAS_LLSC;
113 break; 109 break;
114 case 0x3000: 110 case 0x3000:
115 case 0x3003: 111 case 0x3003:
116 case 0x3009: 112 case 0x3009:
117 current_cpu_data.type = CPU_SH7343; 113 boot_cpu_data.type = CPU_SH7343;
118 current_cpu_data.icache.ways = 4; 114 boot_cpu_data.icache.ways = 4;
119 current_cpu_data.dcache.ways = 4; 115 boot_cpu_data.dcache.ways = 4;
120 current_cpu_data.flags |= CPU_HAS_LLSC; 116 boot_cpu_data.flags |= CPU_HAS_LLSC;
121 break; 117 break;
122 case 0x3004: 118 case 0x3004:
123 case 0x3007: 119 case 0x3007:
124 current_cpu_data.type = CPU_SH7785; 120 boot_cpu_data.type = CPU_SH7785;
125 current_cpu_data.icache.ways = 4; 121 boot_cpu_data.icache.ways = 4;
126 current_cpu_data.dcache.ways = 4; 122 boot_cpu_data.dcache.ways = 4;
127 current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER | 123 boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
128 CPU_HAS_LLSC; 124 CPU_HAS_LLSC;
129 break; 125 break;
130 case 0x3008: 126 case 0x3008:
131 if (prr == 0xa0) { 127 if (prr == 0xa0) {
132 current_cpu_data.type = CPU_SH7722; 128 boot_cpu_data.type = CPU_SH7722;
133 current_cpu_data.icache.ways = 4; 129 boot_cpu_data.icache.ways = 4;
134 current_cpu_data.dcache.ways = 4; 130 boot_cpu_data.dcache.ways = 4;
135 current_cpu_data.flags |= CPU_HAS_LLSC; 131 boot_cpu_data.flags |= CPU_HAS_LLSC;
136 } 132 }
137 break; 133 break;
138 case 0x4000: /* 1st cut */ 134 case 0x4000: /* 1st cut */
139 case 0x4001: /* 2nd cut */ 135 case 0x4001: /* 2nd cut */
140 current_cpu_data.type = CPU_SHX3; 136 boot_cpu_data.type = CPU_SHX3;
141 current_cpu_data.icache.ways = 4; 137 boot_cpu_data.icache.ways = 4;
142 current_cpu_data.dcache.ways = 4; 138 boot_cpu_data.dcache.ways = 4;
143 current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER | 139 boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
144 CPU_HAS_LLSC; 140 CPU_HAS_LLSC;
145 break; 141 break;
146 case 0x8000: 142 case 0x8000:
147 current_cpu_data.type = CPU_ST40RA; 143 boot_cpu_data.type = CPU_ST40RA;
148 current_cpu_data.flags |= CPU_HAS_FPU; 144 boot_cpu_data.flags |= CPU_HAS_FPU;
149 break; 145 break;
150 case 0x8100: 146 case 0x8100:
151 current_cpu_data.type = CPU_ST40GX1; 147 boot_cpu_data.type = CPU_ST40GX1;
152 current_cpu_data.flags |= CPU_HAS_FPU; 148 boot_cpu_data.flags |= CPU_HAS_FPU;
153 break; 149 break;
154 case 0x700: 150 case 0x700:
155 current_cpu_data.type = CPU_SH4_501; 151 boot_cpu_data.type = CPU_SH4_501;
156 current_cpu_data.icache.ways = 2; 152 boot_cpu_data.icache.ways = 2;
157 current_cpu_data.dcache.ways = 2; 153 boot_cpu_data.dcache.ways = 2;
158 break; 154 break;
159 case 0x600: 155 case 0x600:
160 current_cpu_data.type = CPU_SH4_202; 156 boot_cpu_data.type = CPU_SH4_202;
161 current_cpu_data.icache.ways = 2; 157 boot_cpu_data.icache.ways = 2;
162 current_cpu_data.dcache.ways = 2; 158 boot_cpu_data.dcache.ways = 2;
163 current_cpu_data.flags |= CPU_HAS_FPU; 159 boot_cpu_data.flags |= CPU_HAS_FPU;
164 break; 160 break;
165 case 0x500 ... 0x501: 161 case 0x500 ... 0x501:
166 switch (prr) { 162 switch (prr) {
167 case 0x10: 163 case 0x10:
168 current_cpu_data.type = CPU_SH7750R; 164 boot_cpu_data.type = CPU_SH7750R;
169 break; 165 break;
170 case 0x11: 166 case 0x11:
171 current_cpu_data.type = CPU_SH7751R; 167 boot_cpu_data.type = CPU_SH7751R;
172 break; 168 break;
173 case 0x50 ... 0x5f: 169 case 0x50 ... 0x5f:
174 current_cpu_data.type = CPU_SH7760; 170 boot_cpu_data.type = CPU_SH7760;
175 break; 171 break;
176 } 172 }
177 173
178 current_cpu_data.icache.ways = 2; 174 boot_cpu_data.icache.ways = 2;
179 current_cpu_data.dcache.ways = 2; 175 boot_cpu_data.dcache.ways = 2;
180 176
181 current_cpu_data.flags |= CPU_HAS_FPU; 177 boot_cpu_data.flags |= CPU_HAS_FPU;
182 178
183 break; 179 break;
184 default: 180 default:
185 current_cpu_data.type = CPU_SH_NONE; 181 boot_cpu_data.type = CPU_SH_NONE;
186 break; 182 break;
187 } 183 }
188 184
189#ifdef CONFIG_SH_DIRECT_MAPPED 185#ifdef CONFIG_SH_DIRECT_MAPPED
190 current_cpu_data.icache.ways = 1; 186 boot_cpu_data.icache.ways = 1;
191 current_cpu_data.dcache.ways = 1; 187 boot_cpu_data.dcache.ways = 1;
192#endif 188#endif
193 189
194#ifdef CONFIG_CPU_HAS_PTEA 190#ifdef CONFIG_CPU_HAS_PTEA
195 current_cpu_data.flags |= CPU_HAS_PTEA; 191 boot_cpu_data.flags |= CPU_HAS_PTEA;
196#endif 192#endif
197 193
198 /* 194 /*
199 * On anything that's not a direct-mapped cache, look to the CVR 195 * On anything that's not a direct-mapped cache, look to the CVR
200 * for I/D-cache specifics. 196 * for I/D-cache specifics.
201 */ 197 */
202 if (current_cpu_data.icache.ways > 1) { 198 if (boot_cpu_data.icache.ways > 1) {
203 size = sizes[(cvr >> 20) & 0xf]; 199 size = sizes[(cvr >> 20) & 0xf];
204 current_cpu_data.icache.way_incr = (size >> 1); 200 boot_cpu_data.icache.way_incr = (size >> 1);
205 current_cpu_data.icache.sets = (size >> 6); 201 boot_cpu_data.icache.sets = (size >> 6);
206 202
207 } 203 }
208 204
209 /* And the rest of the D-cache */ 205 /* And the rest of the D-cache */
210 if (current_cpu_data.dcache.ways > 1) { 206 if (boot_cpu_data.dcache.ways > 1) {
211 size = sizes[(cvr >> 16) & 0xf]; 207 size = sizes[(cvr >> 16) & 0xf];
212 current_cpu_data.dcache.way_incr = (size >> 1); 208 boot_cpu_data.dcache.way_incr = (size >> 1);
213 current_cpu_data.dcache.sets = (size >> 6); 209 boot_cpu_data.dcache.sets = (size >> 6);
214 } 210 }
215 211
216 /* 212 /*
@@ -218,7 +214,7 @@ int __init detect_cpu_and_cache_system(void)
218 * 214 *
219 * SH-4A's have an optional PIPT L2. 215 * SH-4A's have an optional PIPT L2.
220 */ 216 */
221 if (current_cpu_data.flags & CPU_HAS_L2_CACHE) { 217 if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
222 /* 218 /*
223 * Size calculation is much more sensible 219 * Size calculation is much more sensible
224 * than it is for the L1. 220 * than it is for the L1.
@@ -229,22 +225,22 @@ int __init detect_cpu_and_cache_system(void)
229 225
230 BUG_ON(!size); 226 BUG_ON(!size);
231 227
232 current_cpu_data.scache.way_incr = (1 << 16); 228 boot_cpu_data.scache.way_incr = (1 << 16);
233 current_cpu_data.scache.entry_shift = 5; 229 boot_cpu_data.scache.entry_shift = 5;
234 current_cpu_data.scache.ways = 4; 230 boot_cpu_data.scache.ways = 4;
235 current_cpu_data.scache.linesz = L1_CACHE_BYTES; 231 boot_cpu_data.scache.linesz = L1_CACHE_BYTES;
236 232
237 current_cpu_data.scache.entry_mask = 233 boot_cpu_data.scache.entry_mask =
238 (current_cpu_data.scache.way_incr - 234 (boot_cpu_data.scache.way_incr -
239 current_cpu_data.scache.linesz); 235 boot_cpu_data.scache.linesz);
240 236
241 current_cpu_data.scache.sets = size / 237 boot_cpu_data.scache.sets = size /
242 (current_cpu_data.scache.linesz * 238 (boot_cpu_data.scache.linesz *
243 current_cpu_data.scache.ways); 239 boot_cpu_data.scache.ways);
244 240
245 current_cpu_data.scache.way_size = 241 boot_cpu_data.scache.way_size =
246 (current_cpu_data.scache.sets * 242 (boot_cpu_data.scache.sets *
247 current_cpu_data.scache.linesz); 243 boot_cpu_data.scache.linesz);
248 } 244 }
249 245
250 return 0; 246 return 0;
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index f2286de22bd5..523f68a9ce0e 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -104,7 +104,7 @@ enum {
104 DMAC, PCIC1, TMU2, RTC, SCI1, SCIF, REF, 104 DMAC, PCIC1, TMU2, RTC, SCI1, SCIF, REF,
105}; 105};
106 106
107static struct intc_vect vectors[] = { 107static struct intc_vect vectors[] __initdata = {
108 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620), 108 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
109 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 109 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
110 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460), 110 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
@@ -118,7 +118,7 @@ static struct intc_vect vectors[] = {
118 INTC_VECT(REF_RCMI, 0x580), INTC_VECT(REF_ROVI, 0x5a0), 118 INTC_VECT(REF_RCMI, 0x580), INTC_VECT(REF_ROVI, 0x5a0),
119}; 119};
120 120
121static struct intc_group groups[] = { 121static struct intc_group groups[] __initdata = {
122 INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI), 122 INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
123 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), 123 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
124 INTC_GROUP(SCI1, SCI1_ERI, SCI1_RXI, SCI1_TXI, SCI1_TEI), 124 INTC_GROUP(SCI1, SCI1_ERI, SCI1_RXI, SCI1_TXI, SCI1_TEI),
@@ -126,20 +126,20 @@ static struct intc_group groups[] = {
126 INTC_GROUP(REF, REF_RCMI, REF_ROVI), 126 INTC_GROUP(REF, REF_RCMI, REF_ROVI),
127}; 127};
128 128
129static struct intc_prio priorities[] = { 129static struct intc_prio priorities[] __initdata = {
130 INTC_PRIO(SCIF, 3), 130 INTC_PRIO(SCIF, 3),
131 INTC_PRIO(SCI1, 3), 131 INTC_PRIO(SCI1, 3),
132 INTC_PRIO(DMAC, 7), 132 INTC_PRIO(DMAC, 7),
133}; 133};
134 134
135static struct intc_prio_reg prio_registers[] = { 135static struct intc_prio_reg prio_registers[] __initdata = {
136 { 0xffd00004, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 136 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
137 { 0xffd00008, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } }, 137 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } },
138 { 0xffd0000c, 16, 4, /* IPRC */ { GPIOI, DMAC, SCIF, HUDI } }, 138 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, SCIF, HUDI } },
139 { 0xffd00010, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } }, 139 { 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
140 { 0xfe080000, 32, 4, /* INTPRI00 */ { 0, 0, 0, 0, 140 { 0xfe080000, 0, 32, 4, /* INTPRI00 */ { 0, 0, 0, 0,
141 TMU4, TMU3, 141 TMU4, TMU3,
142 PCIC1, PCIC0_PCISERR } }, 142 PCIC1, PCIC0_PCISERR } },
143}; 143};
144 144
145static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups, 145static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups,
@@ -150,13 +150,13 @@ static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups,
150 defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ 150 defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
151 defined(CONFIG_CPU_SUBTYPE_SH7751) || \ 151 defined(CONFIG_CPU_SUBTYPE_SH7751) || \
152 defined(CONFIG_CPU_SUBTYPE_SH7091) 152 defined(CONFIG_CPU_SUBTYPE_SH7091)
153static struct intc_vect vectors_dma4[] = { 153static struct intc_vect vectors_dma4[] __initdata = {
154 INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660), 154 INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
155 INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0), 155 INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
156 INTC_VECT(DMAC_DMAE, 0x6c0), 156 INTC_VECT(DMAC_DMAE, 0x6c0),
157}; 157};
158 158
159static struct intc_group groups_dma4[] = { 159static struct intc_group groups_dma4[] __initdata = {
160 INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, 160 INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
161 DMAC_DMTE3, DMAC_DMAE), 161 DMAC_DMTE3, DMAC_DMAE),
162}; 162};
@@ -168,7 +168,7 @@ static DECLARE_INTC_DESC(intc_desc_dma4, "sh7750_dma4",
168 168
169/* SH7750R and SH7751R both have 8-channel DMA controllers */ 169/* SH7750R and SH7751R both have 8-channel DMA controllers */
170#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || defined(CONFIG_CPU_SUBTYPE_SH7751R) 170#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || defined(CONFIG_CPU_SUBTYPE_SH7751R)
171static struct intc_vect vectors_dma8[] = { 171static struct intc_vect vectors_dma8[] __initdata = {
172 INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660), 172 INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
173 INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0), 173 INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
174 INTC_VECT(DMAC_DMTE4, 0x780), INTC_VECT(DMAC_DMTE5, 0x7a0), 174 INTC_VECT(DMAC_DMTE4, 0x780), INTC_VECT(DMAC_DMTE5, 0x7a0),
@@ -176,7 +176,7 @@ static struct intc_vect vectors_dma8[] = {
176 INTC_VECT(DMAC_DMAE, 0x6c0), 176 INTC_VECT(DMAC_DMAE, 0x6c0),
177}; 177};
178 178
179static struct intc_group groups_dma8[] = { 179static struct intc_group groups_dma8[] __initdata = {
180 INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, 180 INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
181 DMAC_DMTE3, DMAC_DMTE4, DMAC_DMTE5, 181 DMAC_DMTE3, DMAC_DMTE4, DMAC_DMTE5,
182 DMAC_DMTE6, DMAC_DMTE7, DMAC_DMAE), 182 DMAC_DMTE6, DMAC_DMTE7, DMAC_DMAE),
@@ -191,11 +191,11 @@ static DECLARE_INTC_DESC(intc_desc_dma8, "sh7750_dma8",
191#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ 191#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
192 defined(CONFIG_CPU_SUBTYPE_SH7751) || \ 192 defined(CONFIG_CPU_SUBTYPE_SH7751) || \
193 defined(CONFIG_CPU_SUBTYPE_SH7751R) 193 defined(CONFIG_CPU_SUBTYPE_SH7751R)
194static struct intc_vect vectors_tmu34[] = { 194static struct intc_vect vectors_tmu34[] __initdata = {
195 INTC_VECT(TMU3, 0xb00), INTC_VECT(TMU4, 0xb80), 195 INTC_VECT(TMU3, 0xb00), INTC_VECT(TMU4, 0xb80),
196}; 196};
197 197
198static struct intc_mask_reg mask_registers[] = { 198static struct intc_mask_reg mask_registers[] __initdata = {
199 { 0xfe080040, 0xfe080060, 32, /* INTMSK00 / INTMSKCLR00 */ 199 { 0xfe080040, 0xfe080060, 32, /* INTMSK00 / INTMSKCLR00 */
200 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 200 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
201 0, 0, 0, 0, 0, 0, TMU4, TMU3, 201 0, 0, 0, 0, 0, 0, TMU4, TMU3,
@@ -210,7 +210,7 @@ static DECLARE_INTC_DESC(intc_desc_tmu34, "sh7750_tmu34",
210#endif 210#endif
211 211
212/* SH7750S, SH7750R, SH7751 and SH7751R all have IRLM priority registers */ 212/* SH7750S, SH7750R, SH7751 and SH7751R all have IRLM priority registers */
213static struct intc_vect vectors_irlm[] = { 213static struct intc_vect vectors_irlm[] __initdata = {
214 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0), 214 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
215 INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360), 215 INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
216}; 216};
@@ -220,14 +220,14 @@ static DECLARE_INTC_DESC(intc_desc_irlm, "sh7750_irlm", vectors_irlm, NULL,
220 220
221/* SH7751 and SH7751R both have PCI */ 221/* SH7751 and SH7751R both have PCI */
222#if defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7751R) 222#if defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7751R)
223static struct intc_vect vectors_pci[] = { 223static struct intc_vect vectors_pci[] __initdata = {
224 INTC_VECT(PCIC0_PCISERR, 0xa00), INTC_VECT(PCIC1_PCIERR, 0xae0), 224 INTC_VECT(PCIC0_PCISERR, 0xa00), INTC_VECT(PCIC1_PCIERR, 0xae0),
225 INTC_VECT(PCIC1_PCIPWDWN, 0xac0), INTC_VECT(PCIC1_PCIPWON, 0xaa0), 225 INTC_VECT(PCIC1_PCIPWDWN, 0xac0), INTC_VECT(PCIC1_PCIPWON, 0xaa0),
226 INTC_VECT(PCIC1_PCIDMA0, 0xa80), INTC_VECT(PCIC1_PCIDMA1, 0xa60), 226 INTC_VECT(PCIC1_PCIDMA0, 0xa80), INTC_VECT(PCIC1_PCIDMA1, 0xa60),
227 INTC_VECT(PCIC1_PCIDMA2, 0xa40), INTC_VECT(PCIC1_PCIDMA3, 0xa20), 227 INTC_VECT(PCIC1_PCIDMA2, 0xa40), INTC_VECT(PCIC1_PCIDMA3, 0xa20),
228}; 228};
229 229
230static struct intc_group groups_pci[] = { 230static struct intc_group groups_pci[] __initdata = {
231 INTC_GROUP(PCIC1, PCIC1_PCIERR, PCIC1_PCIPWDWN, PCIC1_PCIPWON, 231 INTC_GROUP(PCIC1, PCIC1_PCIERR, PCIC1_PCIPWDWN, PCIC1_PCIPWON,
232 PCIC1_PCIDMA0, PCIC1_PCIDMA1, PCIC1_PCIDMA2, PCIC1_PCIDMA3), 232 PCIC1_PCIDMA0, PCIC1_PCIDMA1, PCIC1_PCIDMA2, PCIC1_PCIDMA3),
233}; 233};
@@ -282,13 +282,19 @@ void __init plat_irq_setup(void)
282#define INTC_ICR 0xffd00000UL 282#define INTC_ICR 0xffd00000UL
283#define INTC_ICR_IRLM (1<<7) 283#define INTC_ICR_IRLM (1<<7)
284 284
285/* enable individual interrupt mode for external interupts */ 285void __init plat_irq_setup_pins(int mode)
286void __init ipr_irq_enable_irlm(void)
287{ 286{
288#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7091) 287#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7091)
289 BUG(); /* impossible to mask interrupts on SH7750 and SH7091 */ 288 BUG(); /* impossible to mask interrupts on SH7750 and SH7091 */
289 return;
290#endif 290#endif
291 register_intc_controller(&intc_desc_irlm);
292 291
293 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 292 switch (mode) {
293 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
294 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
295 register_intc_controller(&intc_desc_irlm);
296 break;
297 default:
298 BUG();
299 }
294} 300}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 47fa27056253..7a898cb1d940 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -12,6 +12,136 @@
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <asm/sci.h> 13#include <asm/sci.h>
14 14
15enum {
16 UNUSED = 0,
17
18 /* interrupt sources */
19 IRL0, IRL1, IRL2, IRL3,
20 HUDI, GPIOI,
21 DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, DMAC_DMTE3,
22 DMAC_DMTE4, DMAC_DMTE5, DMAC_DMTE6, DMAC_DMTE7,
23 DMAC_DMAE,
24 IRQ4, IRQ5, IRQ6, IRQ7,
25 HCAN20, HCAN21,
26 SSI0, SSI1,
27 HAC0, HAC1,
28 I2C0, I2C1,
29 USB, LCDC,
30 DMABRG0, DMABRG1, DMABRG2,
31 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
32 SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
33 SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
34 SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI,
35 HSPI,
36 MMCIF0, MMCIF1, MMCIF2, MMCIF3,
37 MFI, ADC, CMT,
38 TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
39 WDT,
40 REF_RCMI, REF_ROVI,
41
42 /* interrupt groups */
43 DMAC, DMABRG, SCIF0, SCIF1, SCIF2, SIM, MMCIF, TMU2, REF,
44};
45
46static struct intc_vect vectors[] __initdata = {
47 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
48 INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
49 INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
50 INTC_VECT(DMAC_DMTE4, 0x780), INTC_VECT(DMAC_DMTE5, 0x7a0),
51 INTC_VECT(DMAC_DMTE6, 0x7c0), INTC_VECT(DMAC_DMTE7, 0x7e0),
52 INTC_VECT(DMAC_DMAE, 0x6c0),
53 INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820),
54 INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860),
55 INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920),
56 INTC_VECT(SSI0, 0x940), INTC_VECT(SSI1, 0x960),
57 INTC_VECT(HAC0, 0x980), INTC_VECT(HAC1, 0x9a0),
58 INTC_VECT(I2C0, 0x9c0), INTC_VECT(I2C1, 0x9e0),
59 INTC_VECT(USB, 0xa00), INTC_VECT(LCDC, 0xa20),
60 INTC_VECT(DMABRG0, 0xa80), INTC_VECT(DMABRG1, 0xaa0),
61 INTC_VECT(DMABRG2, 0xac0),
62 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
63 INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
64 INTC_VECT(SCIF1_ERI, 0xb00), INTC_VECT(SCIF1_RXI, 0xb20),
65 INTC_VECT(SCIF1_BRI, 0xb40), INTC_VECT(SCIF1_TXI, 0xb60),
66 INTC_VECT(SCIF2_ERI, 0xb80), INTC_VECT(SCIF2_RXI, 0xba0),
67 INTC_VECT(SCIF2_BRI, 0xbc0), INTC_VECT(SCIF2_TXI, 0xbe0),
68 INTC_VECT(SIM_ERI, 0xc00), INTC_VECT(SIM_RXI, 0xc20),
69 INTC_VECT(SIM_TXI, 0xc40), INTC_VECT(SIM_TEI, 0xc60),
70 INTC_VECT(HSPI, 0xc80),
71 INTC_VECT(MMCIF0, 0xd00), INTC_VECT(MMCIF1, 0xd20),
72 INTC_VECT(MMCIF2, 0xd40), INTC_VECT(MMCIF3, 0xd60),
73 INTC_VECT(MFI, 0xe80), /* 0xf80 according to data sheet */
74 INTC_VECT(ADC, 0xf80), INTC_VECT(CMT, 0xfa0),
75 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
76 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
77 INTC_VECT(WDT, 0x560),
78 INTC_VECT(REF_RCMI, 0x580), INTC_VECT(REF_ROVI, 0x5a0),
79};
80
81static struct intc_group groups[] __initdata = {
82 INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
83 DMAC_DMTE3, DMAC_DMTE4, DMAC_DMTE5,
84 DMAC_DMTE6, DMAC_DMTE7, DMAC_DMAE),
85 INTC_GROUP(DMABRG, DMABRG0, DMABRG1, DMABRG2),
86 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
87 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
88 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
89 INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
90 INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3),
91 INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
92 INTC_GROUP(REF, REF_RCMI, REF_ROVI),
93};
94
95static struct intc_prio priorities[] __initdata = {
96 INTC_PRIO(SCIF0, 3),
97 INTC_PRIO(SCIF1, 3),
98 INTC_PRIO(SCIF2, 3),
99 INTC_PRIO(SIM, 3),
100 INTC_PRIO(DMAC, 7),
101 INTC_PRIO(DMABRG, 13),
102};
103
104static struct intc_mask_reg mask_registers[] __initdata = {
105 { 0xfe080040, 0xfe080060, 32, /* INTMSK00 / INTMSKCLR00 */
106 { IRQ4, IRQ5, IRQ6, IRQ7, 0, 0, HCAN20, HCAN21,
107 SSI0, SSI1, HAC0, HAC1, I2C0, I2C1, USB, LCDC,
108 0, DMABRG0, DMABRG1, DMABRG2,
109 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
110 SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
111 SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI, } },
112 { 0xfe080044, 0xfe080064, 32, /* INTMSK04 / INTMSKCLR04 */
113 { 0, 0, 0, 0, 0, 0, 0, 0,
114 SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI,
115 HSPI, MMCIF0, MMCIF1, MMCIF2,
116 MMCIF3, 0, 0, 0, 0, 0, 0, 0,
117 0, MFI, 0, 0, 0, 0, ADC, CMT, } },
118};
119
120static struct intc_prio_reg prio_registers[] __initdata = {
121 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
122 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
123 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, 0, HUDI } },
124 { 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
125 { 0xfe080000, 0, 32, 4, /* INTPRI00 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
126 { 0xfe080004, 0, 32, 4, /* INTPRI04 */ { HCAN20, HCAN21, SSI0, SSI1,
127 HAC0, HAC1, I2C0, I2C1 } },
128 { 0xfe080008, 0, 32, 4, /* INTPRI08 */ { USB, LCDC, DMABRG, SCIF0,
129 SCIF1, SCIF2, SIM, HSPI } },
130 { 0xfe08000c, 0, 32, 4, /* INTPRI0C */ { 0, 0, MMCIF, 0,
131 MFI, 0, ADC, CMT } },
132};
133
134static DECLARE_INTC_DESC(intc_desc, "sh7760", vectors, groups,
135 priorities, mask_registers, prio_registers, NULL);
136
137static struct intc_vect vectors_irq[] __initdata = {
138 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
139 INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
140};
141
142static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
143 priorities, mask_registers, prio_registers, NULL);
144
15static struct plat_sci_port sci_platform_data[] = { 145static struct plat_sci_port sci_platform_data[] = {
16 { 146 {
17 .mapbase = 0xfe600000, 147 .mapbase = 0xfe600000,
@@ -29,6 +159,11 @@ static struct plat_sci_port sci_platform_data[] = {
29 .type = PORT_SCIF, 159 .type = PORT_SCIF,
30 .irqs = { 76, 77, 79, 78 }, 160 .irqs = { 76, 77, 79, 78 },
31 }, { 161 }, {
162 .mapbase = 0xfe480000,
163 .flags = UPF_BOOT_AUTOCONF,
164 .type = PORT_SCI,
165 .irqs = { 80, 81, 82, 0 },
166 }, {
32 .flags = 0, 167 .flags = 0,
33 } 168 }
34}; 169};
@@ -52,114 +187,18 @@ static int __init sh7760_devices_setup(void)
52} 187}
53__initcall(sh7760_devices_setup); 188__initcall(sh7760_devices_setup);
54 189
55static struct intc2_data intc2_irq_table[] = { 190void __init plat_irq_setup_pins(int mode)
56 {48, 0, 28, 0, 31, 3}, /* IRQ 4 */ 191{
57 {49, 0, 24, 0, 30, 3}, /* IRQ 3 */ 192 switch (mode) {
58 {50, 0, 20, 0, 29, 3}, /* IRQ 2 */ 193 case IRQ_MODE_IRQ:
59 {51, 0, 16, 0, 28, 3}, /* IRQ 1 */ 194 register_intc_controller(&intc_desc_irq);
60 {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */ 195 break;
61 {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */ 196 default:
62 {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */ 197 BUG();
63 {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */ 198 }
64 {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */ 199}
65 {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
66 {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
67 {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
68 {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
69 {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
70 {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
71 {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
72 {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
73 {65, 8, 24, 0, 16, 3}, /* LCDC */
74 {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
75 {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
76 {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
77 {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
78 {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
79 {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
80 {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
81 {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
82 {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
83 {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
84 {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
85 {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
86 {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
87 {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
88 {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
89 {84, 8, 0, 4, 19, 3}, /* HSPII */
90 {88, 12, 20, 4, 18, 3}, /* MMCI0 */
91 {89, 12, 20, 4, 17, 3}, /* MMCI1 */
92 {90, 12, 20, 4, 16, 3}, /* MMCI2 */
93 {91, 12, 20, 4, 15, 3}, /* MMCI3 */
94 {92, 12, 12, 4, 6, 3}, /* MFI */
95 {108,12, 4, 4, 1, 3}, /* ADC */
96 {109,12, 0, 4, 0, 3}, /* CMTI */
97};
98
99static struct intc2_desc intc2_irq_desc __read_mostly = {
100 .prio_base = 0xfe080000,
101 .msk_base = 0xfe080040,
102 .mskclr_base = 0xfe080060,
103
104 .intc2_data = intc2_irq_table,
105 .nr_irqs = ARRAY_SIZE(intc2_irq_table),
106
107 .chip = {
108 .name = "INTC2-sh7760",
109 },
110};
111
112static struct ipr_data ipr_irq_table[] = {
113 /* IRQ, IPR-idx, shift, priority */
114 { 16, 0, 12, 2 }, /* TMU0 TUNI*/
115 { 17, 0, 8, 2 }, /* TMU1 TUNI */
116 { 18, 0, 4, 2 }, /* TMU2 TUNI */
117 { 19, 0, 4, 2 }, /* TMU2 TIPCI */
118 { 27, 1, 12, 2 }, /* WDT ITI */
119 { 28, 1, 8, 2 }, /* REF RCMI */
120 { 29, 1, 8, 2 }, /* REF ROVI */
121 { 32, 2, 0, 7 }, /* HUDI */
122 { 33, 2, 12, 7 }, /* GPIOI */
123 { 34, 2, 8, 7 }, /* DMAC DMTE0 */
124 { 35, 2, 8, 7 }, /* DMAC DMTE1 */
125 { 36, 2, 8, 7 }, /* DMAC DMTE2 */
126 { 37, 2, 8, 7 }, /* DMAC DMTE3 */
127 { 38, 2, 8, 7 }, /* DMAC DMAE */
128 { 44, 2, 8, 7 }, /* DMAC DMTE4 */
129 { 45, 2, 8, 7 }, /* DMAC DMTE5 */
130 { 46, 2, 8, 7 }, /* DMAC DMTE6 */
131 { 47, 2, 8, 7 }, /* DMAC DMTE7 */
132/* these here are only valid if INTC_ICR bit 7 is set to 1!
133 * XXX: maybe CONFIG_SH_IRLMODE symbol? SH7751 could use it too */
134#if 0
135 { 2, 3, 12, 3 }, /* IRL0 */
136 { 5, 3, 8, 3 }, /* IRL1 */
137 { 8, 3, 4, 3 }, /* IRL2 */
138 { 11, 3, 0, 3 }, /* IRL3 */
139#endif
140};
141
142static unsigned long ipr_offsets[] = {
143 0xffd00004UL, /* 0: IPRA */
144 0xffd00008UL, /* 1: IPRB */
145 0xffd0000cUL, /* 2: IPRC */
146 0xffd00010UL, /* 3: IPRD */
147};
148
149static struct ipr_desc ipr_irq_desc = {
150 .ipr_offsets = ipr_offsets,
151 .nr_offsets = ARRAY_SIZE(ipr_offsets),
152
153 .ipr_data = ipr_irq_table,
154 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
155
156 .chip = {
157 .name = "IPR-sh7760",
158 },
159};
160 200
161void __init plat_irq_setup(void) 201void __init plat_irq_setup(void)
162{ 202{
163 register_intc2_controller(&intc2_irq_desc); 203 register_intc_controller(&intc_desc);
164 register_ipr_controller(&ipr_irq_desc);
165} 204}
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index c21512c6044e..b22a78c807e6 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -58,11 +58,11 @@ do { \
58 */ 58 */
59void sq_flush_range(unsigned long start, unsigned int len) 59void sq_flush_range(unsigned long start, unsigned int len)
60{ 60{
61 volatile unsigned long *sq = (unsigned long *)start; 61 unsigned long *sq = (unsigned long *)start;
62 62
63 /* Flush the queues */ 63 /* Flush the queues */
64 for (len >>= 5; len--; sq += 8) 64 for (len >>= 5; len--; sq += 8)
65 prefetchw((void *)sq); 65 prefetchw(sq);
66 66
67 /* Wait for completion */ 67 /* Wait for completion */
68 store_queue_barrier(); 68 store_queue_barrier();
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index e6a1fb5f8484..24539873943a 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -10,6 +10,9 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o 10obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
11obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o 11obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o
12 12
13# SMP setup
14smp-$(CONFIG_CPU_SUBTYPE_SHX3) := smp-shx3.o
15
13# Primary on-chip clocks (common) 16# Primary on-chip clocks (common)
14clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o 17clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
15clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o 18clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
@@ -18,4 +21,5 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
18clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o 21clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
19clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o 22clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o
20 23
21obj-y += $(clock-y) 24obj-y += $(clock-y)
25obj-$(CONFIG_SMP) += $(smp-y)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 91d61cf91ba1..c0a3f079dfdc 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -41,3 +41,7 @@ static int __init sh7343_devices_setup(void)
41 ARRAY_SIZE(sh7343_devices)); 41 ARRAY_SIZE(sh7343_devices));
42} 42}
43__initcall(sh7343_devices_setup); 43__initcall(sh7343_devices_setup);
44
45void __init plat_irq_setup(void)
46{
47}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 25b913e07e2c..55f66104431d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -84,7 +84,7 @@ enum {
84 SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, 84 SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI,
85}; 85};
86 86
87static struct intc_vect vectors[] = { 87static struct intc_vect vectors[] __initdata = {
88 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), 88 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
89 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), 89 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
90 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 90 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
@@ -117,7 +117,7 @@ static struct intc_vect vectors[] = {
117 INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580), 117 INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580),
118}; 118};
119 119
120static struct intc_group groups[] = { 120static struct intc_group groups[] __initdata = {
121 INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI), 121 INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
122 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), 122 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
123 INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3), 123 INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),
@@ -130,7 +130,7 @@ static struct intc_group groups[] = {
130 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), 130 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
131}; 131};
132 132
133static struct intc_prio priorities[] = { 133static struct intc_prio priorities[] __initdata = {
134 INTC_PRIO(SCIF0, 3), 134 INTC_PRIO(SCIF0, 3),
135 INTC_PRIO(SCIF1, 3), 135 INTC_PRIO(SCIF1, 3),
136 INTC_PRIO(SCIF2, 3), 136 INTC_PRIO(SCIF2, 3),
@@ -138,7 +138,7 @@ static struct intc_prio priorities[] = {
138 INTC_PRIO(TMU1, 2), 138 INTC_PRIO(TMU1, 2),
139}; 139};
140 140
141static struct intc_mask_reg mask_registers[] = { 141static struct intc_mask_reg mask_registers[] __initdata = {
142 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 142 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
143 { } }, 143 { } },
144 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 144 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
@@ -168,24 +168,24 @@ static struct intc_mask_reg mask_registers[] = {
168 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 168 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
169}; 169};
170 170
171static struct intc_prio_reg prio_registers[] = { 171static struct intc_prio_reg prio_registers[] __initdata = {
172 { 0xa4080000, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, IRDA } }, 172 { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, IRDA } },
173 { 0xa4080004, 16, 4, /* IPRB */ { JPU, LCDC, SIM } }, 173 { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
174 { 0xa4080008, 16, 4, /* IPRC */ { } }, 174 { 0xa4080008, 0, 16, 4, /* IPRC */ { } },
175 { 0xa408000c, 16, 4, /* IPRD */ { } }, 175 { 0xa408000c, 0, 16, 4, /* IPRD */ { } },
176 { 0xa4080010, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, 0, VPU } }, 176 { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, 0, VPU } },
177 { 0xa4080014, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } }, 177 { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } },
178 { 0xa4080018, 16, 4, /* IPRG */ { SCIF0, SCIF1, SCIF2 } }, 178 { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, SCIF2 } },
179 { 0xa408001c, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C } }, 179 { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C } },
180 { 0xa4080020, 16, 4, /* IPRI */ { SIO, 0, TSIF, RTC } }, 180 { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, RTC } },
181 { 0xa4080024, 16, 4, /* IPRJ */ { 0, 0, SIU } }, 181 { 0xa4080024, 0, 16, 4, /* IPRJ */ { 0, 0, SIU } },
182 { 0xa4080028, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } }, 182 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } },
183 { 0xa408002c, 16, 4, /* IPRL */ { TWODG, 0, TPU } }, 183 { 0xa408002c, 0, 16, 4, /* IPRL */ { TWODG, 0, TPU } },
184 { 0xa4140010, 32, 4, /* INTPRI00 */ 184 { 0xa4140010, 0, 32, 4, /* INTPRI00 */
185 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 185 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
186}; 186};
187 187
188static struct intc_sense_reg sense_registers[] = { 188static struct intc_sense_reg sense_registers[] __initdata = {
189 { 0xa414001c, 16, 2, /* ICR1 */ 189 { 0xa414001c, 16, 2, /* ICR1 */
190 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 190 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
191}; 191};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 6a04cc5f5aca..32f4f59a837b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -51,3 +51,7 @@ static int __init sh7770_devices_setup(void)
51 ARRAY_SIZE(sh7770_devices)); 51 ARRAY_SIZE(sh7770_devices));
52} 52}
53__initcall(sh7770_devices_setup); 53__initcall(sh7770_devices_setup);
54
55void __init plat_irq_setup(void)
56{
57}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index a4127ec15203..e8fd33ff0605 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -10,6 +10,7 @@
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/io.h>
13#include <asm/sci.h> 14#include <asm/sci.h>
14 15
15static struct resource rtc_resources[] = { 16static struct resource rtc_resources[] = {
@@ -114,7 +115,7 @@ enum {
114 PCIC5, SCIF1, MMCIF, TMU345, FLCTL, GPIO, 115 PCIC5, SCIF1, MMCIF, TMU345, FLCTL, GPIO,
115}; 116};
116 117
117static struct intc_vect vectors[] = { 118static struct intc_vect vectors[] __initdata = {
118 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), 119 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
119 INTC_VECT(RTC_CUI, 0x4c0), 120 INTC_VECT(RTC_CUI, 0x4c0),
120 INTC_VECT(WDT, 0x560), 121 INTC_VECT(WDT, 0x560),
@@ -150,7 +151,7 @@ static struct intc_vect vectors[] = {
150 INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0), 151 INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0),
151}; 152};
152 153
153static struct intc_group groups[] = { 154static struct intc_group groups[] __initdata = {
154 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), 155 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
155 INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), 156 INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
156 INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, 157 INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
@@ -167,12 +168,12 @@ static struct intc_group groups[] = {
167 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), 168 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
168}; 169};
169 170
170static struct intc_prio priorities[] = { 171static struct intc_prio priorities[] __initdata = {
171 INTC_PRIO(SCIF0, 3), 172 INTC_PRIO(SCIF0, 3),
172 INTC_PRIO(SCIF1, 3), 173 INTC_PRIO(SCIF1, 3),
173}; 174};
174 175
175static struct intc_mask_reg mask_registers[] = { 176static struct intc_mask_reg mask_registers[] __initdata = {
176 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ 177 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
177 { 0, 0, 0, 0, 0, 0, GPIO, FLCTL, 178 { 0, 0, 0, 0, 0, 0, GPIO, FLCTL,
178 SSI, MMCIF, HSPI, SIOF, PCIC5, PCIINTD, PCIINTC, PCIINTB, 179 SSI, MMCIF, HSPI, SIOF, PCIC5, PCIINTD, PCIINTC, PCIINTB,
@@ -180,16 +181,18 @@ static struct intc_mask_reg mask_registers[] = {
180 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, 181 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
181}; 182};
182 183
183static struct intc_prio_reg prio_registers[] = { 184static struct intc_prio_reg prio_registers[] __initdata = {
184 { 0xffd40000, 32, 8, /* INT2PRI0 */ { TMU0, TMU1, TMU2, TMU2_TICPI } }, 185 { 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1,
185 { 0xffd40004, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } }, 186 TMU2, TMU2_TICPI } },
186 { 0xffd40008, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } }, 187 { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },
187 { 0xffd4000c, 32, 8, /* INT2PRI3 */ { HUDI, DMAC0, DMAC1 } }, 188 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
188 { 0xffd40010, 32, 8, /* INT2PRI4 */ { CMT, HAC, PCISERR, PCIINTA, } }, 189 { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { HUDI, DMAC0, DMAC1 } },
189 { 0xffd40014, 32, 8, /* INT2PRI5 */ { PCIINTB, PCIINTC, 190 { 0xffd40010, 0, 32, 8, /* INT2PRI4 */ { CMT, HAC,
190 PCIINTD, PCIC5 } }, 191 PCISERR, PCIINTA, } },
191 { 0xffd40018, 32, 8, /* INT2PRI6 */ { SIOF, HSPI, MMCIF, SSI } }, 192 { 0xffd40014, 0, 32, 8, /* INT2PRI5 */ { PCIINTB, PCIINTC,
192 { 0xffd4001c, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } }, 193 PCIINTD, PCIC5 } },
194 { 0xffd40018, 0, 32, 8, /* INT2PRI6 */ { SIOF, HSPI, MMCIF, SSI } },
195 { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } },
193}; 196};
194 197
195static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, priorities, 198static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, priorities,
@@ -197,24 +200,24 @@ static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, priorities,
197 200
198/* Support for external interrupt pins in IRQ mode */ 201/* Support for external interrupt pins in IRQ mode */
199 202
200static struct intc_vect irq_vectors[] = { 203static struct intc_vect irq_vectors[] __initdata = {
201 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), 204 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
202 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), 205 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
203 INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), 206 INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380),
204 INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), 207 INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200),
205}; 208};
206 209
207static struct intc_mask_reg irq_mask_registers[] = { 210static struct intc_mask_reg irq_mask_registers[] __initdata = {
208 { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ 211 { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */
209 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 212 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
210}; 213};
211 214
212static struct intc_prio_reg irq_prio_registers[] = { 215static struct intc_prio_reg irq_prio_registers[] __initdata = {
213 { 0xffd00010, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3, 216 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
214 IRQ4, IRQ5, IRQ6, IRQ7 } }, 217 IRQ4, IRQ5, IRQ6, IRQ7 } },
215}; 218};
216 219
217static struct intc_sense_reg irq_sense_registers[] = { 220static struct intc_sense_reg irq_sense_registers[] __initdata = {
218 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3, 221 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
219 IRQ4, IRQ5, IRQ6, IRQ7 } }, 222 IRQ4, IRQ5, IRQ6, IRQ7 } },
220}; 223};
@@ -225,7 +228,7 @@ static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors,
225 228
226/* External interrupt pins in IRL mode */ 229/* External interrupt pins in IRL mode */
227 230
228static struct intc_vect irl_vectors[] = { 231static struct intc_vect irl_vectors[] __initdata = {
229 INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220), 232 INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
230 INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260), 233 INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
231 INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0), 234 INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
@@ -236,16 +239,16 @@ static struct intc_vect irl_vectors[] = {
236 INTC_VECT(IRL_HHHL, 0x3c0), 239 INTC_VECT(IRL_HHHL, 0x3c0),
237}; 240};
238 241
239static struct intc_mask_reg irl3210_mask_registers[] = { 242static struct intc_mask_reg irl3210_mask_registers[] __initdata = {
240 { 0xffd00080, 0xffd00084, 32, /* INTMSK2 / INTMSKCLR2 */ 243 { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
241 { IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, 244 { IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
242 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, 245 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
243 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH, 246 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
244 IRL_HHLL, IRL_HHLH, IRL_HHHL, } }, 247 IRL_HHLL, IRL_HHLH, IRL_HHHL, } },
245}; 248};
246 249
247static struct intc_mask_reg irl7654_mask_registers[] = { 250static struct intc_mask_reg irl7654_mask_registers[] __initdata = {
248 { 0xffd00080, 0xffd00084, 32, /* INTMSK2 / INTMSKCLR2 */ 251 { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
249 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 252 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
250 IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, 253 IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
251 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, 254 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
@@ -259,8 +262,28 @@ static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7780-irl7654", irl_vectors,
259static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors, 262static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
260 NULL, NULL, irl3210_mask_registers, NULL, NULL); 263 NULL, NULL, irl3210_mask_registers, NULL, NULL);
261 264
265#define INTC_ICR0 0xffd00000
266#define INTC_INTMSK0 0xffd00044
267#define INTC_INTMSK1 0xffd00048
268#define INTC_INTMSK2 0xffd40080
269#define INTC_INTMSKCLR1 0xffd00068
270#define INTC_INTMSKCLR2 0xffd40084
271
262void __init plat_irq_setup(void) 272void __init plat_irq_setup(void)
263{ 273{
274 /* disable IRQ7-0 */
275 ctrl_outl(0xff000000, INTC_INTMSK0);
276
277 /* disable IRL3-0 + IRL7-4 */
278 ctrl_outl(0xc0000000, INTC_INTMSK1);
279 ctrl_outl(0xfffefffe, INTC_INTMSK2);
280
281 /* select IRL mode for IRL3-0 + IRL7-4 */
282 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
283
284 /* disable holding function, ie enable "SH-4 Mode" */
285 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
286
264 register_intc_controller(&intc_desc); 287 register_intc_controller(&intc_desc);
265} 288}
266 289
@@ -268,12 +291,28 @@ void __init plat_irq_setup_pins(int mode)
268{ 291{
269 switch (mode) { 292 switch (mode) {
270 case IRQ_MODE_IRQ: 293 case IRQ_MODE_IRQ:
294 /* select IRQ mode for IRL3-0 + IRL7-4 */
295 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
271 register_intc_controller(&intc_irq_desc); 296 register_intc_controller(&intc_irq_desc);
272 break; 297 break;
273 case IRQ_MODE_IRL7654: 298 case IRQ_MODE_IRL7654:
274 register_intc_controller(&intc_irl7654_desc); 299 /* enable IRL7-4 but don't provide any masking */
300 ctrl_outl(0x40000000, INTC_INTMSKCLR1);
301 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
275 break; 302 break;
276 case IRQ_MODE_IRL3210: 303 case IRQ_MODE_IRL3210:
304 /* enable IRL0-3 but don't provide any masking */
305 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
306 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
307 break;
308 case IRQ_MODE_IRL7654_MASK:
309 /* enable IRL7-4 and mask using cpu intc controller */
310 ctrl_outl(0x40000000, INTC_INTMSKCLR1);
311 register_intc_controller(&intc_irl7654_desc);
312 break;
313 case IRQ_MODE_IRL3210_MASK:
314 /* enable IRL0-3 and mask using cpu intc controller */
315 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
277 register_intc_controller(&intc_irl3210_desc); 316 register_intc_controller(&intc_irl3210_desc);
278 break; 317 break;
279 default: 318 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index cf047562e43f..39b215d6cee5 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -10,6 +10,9 @@
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/io.h>
14#include <linux/mm.h>
15#include <asm/mmzone.h>
13#include <asm/sci.h> 16#include <asm/sci.h>
14 17
15static struct plat_sci_port sci_platform_data[] = { 18static struct plat_sci_port sci_platform_data[] = {
@@ -72,46 +75,281 @@ static int __init sh7785_devices_setup(void)
72} 75}
73__initcall(sh7785_devices_setup); 76__initcall(sh7785_devices_setup);
74 77
75static struct intc2_data intc2_irq_table[] = { 78enum {
76 { 28, 0, 24, 0, 0, 2 }, /* TMU0 */ 79 UNUSED = 0,
77 80
78 { 40, 8, 24, 0, 2, 3 }, /* SCIF0 ERI */ 81 /* interrupt sources */
79 { 41, 8, 24, 0, 2, 3 }, /* SCIF0 RXI */ 82
80 { 42, 8, 24, 0, 2, 3 }, /* SCIF0 BRI */ 83 IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
81 { 43, 8, 24, 0, 2, 3 }, /* SCIF0 TXI */ 84 IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
82 85 IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
83 { 44, 8, 16, 0, 3, 3 }, /* SCIF1 ERI */ 86 IRL0_HHLL, IRL0_HHLH, IRL0_HHHL,
84 { 45, 8, 16, 0, 3, 3 }, /* SCIF1 RXI */ 87
85 { 46, 8, 16, 0, 3, 3 }, /* SCIF1 BRI */ 88 IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
86 { 47, 8, 16, 0, 3, 3 }, /* SCIF1 TXI */ 89 IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
87 90 IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
88 { 64, 0x14, 8, 0, 14, 2 }, /* PCIC0 */ 91 IRL4_HHLL, IRL4_HHLH, IRL4_HHHL,
89 { 65, 0x14, 0, 0, 15, 2 }, /* PCIC1 */ 92
90 { 66, 0x18, 24, 0, 16, 2 }, /* PCIC2 */ 93 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
91 { 67, 0x18, 16, 0, 17, 2 }, /* PCIC3 */ 94 WDT,
92 { 68, 0x18, 8, 0, 18, 2 }, /* PCIC4 */ 95 TMU0, TMU1, TMU2, TMU2_TICPI,
93 96 HUDI,
94 { 60, 8, 8, 0, 4, 3 }, /* SCIF2 ERI, RXI, BRI, TXI */ 97 DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3,
95 { 60, 8, 0, 0, 5, 3 }, /* SCIF3 ERI, RXI, BRI, TXI */ 98 DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE,
96 { 60, 12, 24, 0, 6, 3 }, /* SCIF4 ERI, RXI, BRI, TXI */ 99 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
97 { 60, 12, 16, 0, 7, 3 }, /* SCIF5 ERI, RXI, BRI, TXI */ 100 SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
101 DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, DMAC1_DMINT9,
102 DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE,
103 HSPI,
104 SCIF2, SCIF3, SCIF4, SCIF5,
105 PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
106 PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
107 SIOF,
108 MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
109 DU,
110 GDTA_GACLI, GDTA_GAMCI, GDTA_GAERI,
111 TMU3, TMU4, TMU5,
112 SSI0, SSI1,
113 HAC0, HAC1,
114 FLCTL_FLSTE, FLCTL_FLEND, FLCTL_FLTRQ0, FLCTL_FLTRQ1,
115 GPIOI0, GPIOI1, GPIOI2, GPIOI3,
116
117 /* interrupt groups */
118
119 TMU012, DMAC0, SCIF0, SCIF1, DMAC1,
120 PCIC5, MMCIF, GDTA, TMU345, FLCTL, GPIO
98}; 121};
99 122
100static struct intc2_desc intc2_irq_desc __read_mostly = { 123static struct intc_vect vectors[] __initdata = {
101 .prio_base = 0xffd40000, 124 INTC_VECT(WDT, 0x560),
102 .msk_base = 0xffd40038, 125 INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
103 .mskclr_base = 0xffd4003c, 126 INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
127 INTC_VECT(HUDI, 0x600),
128 INTC_VECT(DMAC0_DMINT0, 0x620), INTC_VECT(DMAC0_DMINT1, 0x640),
129 INTC_VECT(DMAC0_DMINT2, 0x660), INTC_VECT(DMAC0_DMINT3, 0x680),
130 INTC_VECT(DMAC0_DMINT4, 0x6a0), INTC_VECT(DMAC0_DMINT5, 0x6c0),
131 INTC_VECT(DMAC0_DMAE, 0x6e0),
132 INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
133 INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
134 INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0),
135 INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0),
136 INTC_VECT(DMAC1_DMINT6, 0x880), INTC_VECT(DMAC1_DMINT7, 0x8a0),
137 INTC_VECT(DMAC1_DMINT8, 0x8c0), INTC_VECT(DMAC1_DMINT9, 0x8e0),
138 INTC_VECT(DMAC1_DMINT10, 0x900), INTC_VECT(DMAC1_DMINT11, 0x920),
139 INTC_VECT(DMAC1_DMAE, 0x940),
140 INTC_VECT(HSPI, 0x960),
141 INTC_VECT(SCIF2, 0x980), INTC_VECT(SCIF3, 0x9a0),
142 INTC_VECT(SCIF4, 0x9c0), INTC_VECT(SCIF5, 0x9e0),
143 INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
144 INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
145 INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
146 INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
147 INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
148 INTC_VECT(SIOF, 0xc00),
149 INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
150 INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
151 INTC_VECT(DU, 0xd80),
152 INTC_VECT(GDTA_GACLI, 0xda0), INTC_VECT(GDTA_GAMCI, 0xdc0),
153 INTC_VECT(GDTA_GAERI, 0xde0),
154 INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
155 INTC_VECT(TMU5, 0xe40),
156 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
157 INTC_VECT(HAC0, 0xec0), INTC_VECT(HAC1, 0xee0),
158 INTC_VECT(FLCTL_FLSTE, 0xf00), INTC_VECT(FLCTL_FLEND, 0xf20),
159 INTC_VECT(FLCTL_FLTRQ0, 0xf40), INTC_VECT(FLCTL_FLTRQ1, 0xf60),
160 INTC_VECT(GPIOI0, 0xf80), INTC_VECT(GPIOI1, 0xfa0),
161 INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0),
162};
104 163
105 .intc2_data = intc2_irq_table, 164static struct intc_group groups[] __initdata = {
106 .nr_irqs = ARRAY_SIZE(intc2_irq_table), 165 INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
166 INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
167 DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
168 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
169 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
170 INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8,
171 DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE),
172 INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
173 INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
174 INTC_GROUP(GDTA, GDTA_GACLI, GDTA_GAMCI, GDTA_GAERI),
175 INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
176 INTC_GROUP(FLCTL, FLCTL_FLSTE, FLCTL_FLEND,
177 FLCTL_FLTRQ0, FLCTL_FLTRQ1),
178 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
179};
107 180
108 .chip = { 181static struct intc_prio priorities[] __initdata = {
109 .name = "INTC2-sh7785", 182 INTC_PRIO(SCIF0, 3),
110 }, 183 INTC_PRIO(SCIF1, 3),
184 INTC_PRIO(SCIF2, 3),
185 INTC_PRIO(SCIF3, 3),
186 INTC_PRIO(SCIF4, 3),
187 INTC_PRIO(SCIF5, 3),
188};
189
190static struct intc_mask_reg mask_registers[] __initdata = {
191 { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */
192 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
193
194 { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
195 { IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
196 IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
197 IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
198 IRL0_HHLL, IRL0_HHLH, IRL0_HHHL, 0,
199 IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
200 IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
201 IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
202 IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 0, } },
203
204 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
205 { 0, 0, 0, GDTA, DU, SSI0, SSI1, GPIO,
206 FLCTL, MMCIF, HSPI, SIOF, PCIC5, PCIINTD, PCIINTC, PCIINTB,
207 PCIINTA, PCISERR, HAC1, HAC0, DMAC1, DMAC0, HUDI, WDT,
208 SCIF5, SCIF4, SCIF3, SCIF2, SCIF1, SCIF0, TMU345, TMU012 } },
209};
210
211static struct intc_prio_reg prio_registers[] __initdata = {
212 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
213 IRQ4, IRQ5, IRQ6, IRQ7 } },
214 { 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1,
215 TMU2, TMU2_TICPI } },
216 { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, } },
217 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1,
218 SCIF2, SCIF3 } },
219 { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { SCIF4, SCIF5, WDT, } },
220 { 0xffd40010, 0, 32, 8, /* INT2PRI4 */ { HUDI, DMAC0, DMAC1, } },
221 { 0xffd40014, 0, 32, 8, /* INT2PRI5 */ { HAC0, HAC1,
222 PCISERR, PCIINTA } },
223 { 0xffd40018, 0, 32, 8, /* INT2PRI6 */ { PCIINTB, PCIINTC,
224 PCIINTD, PCIC5 } },
225 { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { SIOF, HSPI, MMCIF, } },
226 { 0xffd40020, 0, 32, 8, /* INT2PRI8 */ { FLCTL, GPIO, SSI0, SSI1, } },
227 { 0xffd40024, 0, 32, 8, /* INT2PRI9 */ { DU, GDTA, } },
111}; 228};
112 229
230static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups, priorities,
231 mask_registers, prio_registers, NULL);
232
233/* Support for external interrupt pins in IRQ mode */
234
235static struct intc_vect vectors_irq0123[] __initdata = {
236 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
237 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
238};
239
240static struct intc_vect vectors_irq4567[] __initdata = {
241 INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380),
242 INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200),
243};
244
245static struct intc_sense_reg sense_registers[] __initdata = {
246 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
247 IRQ4, IRQ5, IRQ6, IRQ7 } },
248};
249
250static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123,
251 NULL, NULL, mask_registers, prio_registers,
252 sense_registers);
253
254static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567,
255 NULL, NULL, mask_registers, prio_registers,
256 sense_registers);
257
258/* External interrupt pins in IRL mode */
259
260static struct intc_vect vectors_irl0123[] __initdata = {
261 INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220),
262 INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260),
263 INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0),
264 INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0),
265 INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320),
266 INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360),
267 INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0),
268 INTC_VECT(IRL0_HHHL, 0x3c0),
269};
270
271static struct intc_vect vectors_irl4567[] __initdata = {
272 INTC_VECT(IRL4_LLLL, 0xb00), INTC_VECT(IRL4_LLLH, 0xb20),
273 INTC_VECT(IRL4_LLHL, 0xb40), INTC_VECT(IRL4_LLHH, 0xb60),
274 INTC_VECT(IRL4_LHLL, 0xb80), INTC_VECT(IRL4_LHLH, 0xba0),
275 INTC_VECT(IRL4_LHHL, 0xbc0), INTC_VECT(IRL4_LHHH, 0xbe0),
276 INTC_VECT(IRL4_HLLL, 0xc00), INTC_VECT(IRL4_HLLH, 0xc20),
277 INTC_VECT(IRL4_HLHL, 0xc40), INTC_VECT(IRL4_HLHH, 0xc60),
278 INTC_VECT(IRL4_HHLL, 0xc80), INTC_VECT(IRL4_HHLH, 0xca0),
279 INTC_VECT(IRL4_HHHL, 0xcc0),
280};
281
282static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7785-irl0123", vectors_irl0123,
283 NULL, NULL, mask_registers, NULL, NULL);
284
285static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567,
286 NULL, NULL, mask_registers, NULL, NULL);
287
288#define INTC_ICR0 0xffd00000
289#define INTC_INTMSK0 0xffd00044
290#define INTC_INTMSK1 0xffd00048
291#define INTC_INTMSK2 0xffd40080
292#define INTC_INTMSKCLR1 0xffd00068
293#define INTC_INTMSKCLR2 0xffd40084
294
113void __init plat_irq_setup(void) 295void __init plat_irq_setup(void)
114{ 296{
115 register_intc2_controller(&intc2_irq_desc); 297 /* disable IRQ3-0 + IRQ7-4 */
298 ctrl_outl(0xff000000, INTC_INTMSK0);
299
300 /* disable IRL3-0 + IRL7-4 */
301 ctrl_outl(0xc0000000, INTC_INTMSK1);
302 ctrl_outl(0xfffefffe, INTC_INTMSK2);
303
304 /* select IRL mode for IRL3-0 + IRL7-4 */
305 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
306
307 /* disable holding function, ie enable "SH-4 Mode" */
308 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
309
310 register_intc_controller(&intc_desc);
311}
312
313void __init plat_irq_setup_pins(int mode)
314{
315 switch (mode) {
316 case IRQ_MODE_IRQ7654:
317 /* select IRQ mode for IRL7-4 */
318 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
319 register_intc_controller(&intc_desc_irq4567);
320 break;
321 case IRQ_MODE_IRQ3210:
322 /* select IRQ mode for IRL3-0 */
323 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
324 register_intc_controller(&intc_desc_irq0123);
325 break;
326 case IRQ_MODE_IRL7654:
327 /* enable IRL7-4 but don't provide any masking */
328 ctrl_outl(0x40000000, INTC_INTMSKCLR1);
329 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
330 break;
331 case IRQ_MODE_IRL3210:
332 /* enable IRL0-3 but don't provide any masking */
333 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
334 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
335 break;
336 case IRQ_MODE_IRL7654_MASK:
337 /* enable IRL7-4 and mask using cpu intc controller */
338 ctrl_outl(0x40000000, INTC_INTMSKCLR1);
339 register_intc_controller(&intc_desc_irl4567);
340 break;
341 case IRQ_MODE_IRL3210_MASK:
342 /* enable IRL0-3 and mask using cpu intc controller */
343 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
344 register_intc_controller(&intc_desc_irl0123);
345 break;
346 default:
347 BUG();
348 }
116} 349}
117 350
351void __init plat_mem_setup(void)
352{
353 /* Register the URAM space as Node 1 */
354 setup_bootmem_node(1, 0xe55f0000, 0xe5610000);
355}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 704c064f70dc..c6cdd7e3b049 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -11,6 +11,7 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/io.h> 13#include <linux/io.h>
14#include <asm/mmzone.h>
14#include <asm/sci.h> 15#include <asm/sci.h>
15 16
16static struct plat_sci_port sci_platform_data[] = { 17static struct plat_sci_port sci_platform_data[] = {
@@ -58,28 +59,229 @@ static int __init shx3_devices_setup(void)
58} 59}
59__initcall(shx3_devices_setup); 60__initcall(shx3_devices_setup);
60 61
61static struct intc2_data intc2_irq_table[] = { 62enum {
62 { 16, 0, 0, 0, 1, 2 }, /* TMU0 */ 63 UNUSED = 0,
63 { 40, 4, 0, 0x20, 0, 3 }, /* SCIF0 ERI */ 64
64 { 41, 4, 0, 0x20, 1, 3 }, /* SCIF0 RXI */ 65 /* interrupt sources */
65 { 42, 4, 0, 0x20, 2, 3 }, /* SCIF0 BRI */ 66 IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
66 { 43, 4, 0, 0x20, 3, 3 }, /* SCIF0 TXI */ 67 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
68 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
69 IRL_HHLL, IRL_HHLH, IRL_HHHL,
70 IRQ0, IRQ1, IRQ2, IRQ3,
71 HUDII,
72 TMU0, TMU1, TMU2, TMU3, TMU4, TMU5,
73 PCII0, PCII1, PCII2, PCII3, PCII4,
74 PCII5, PCII6, PCII7, PCII8, PCII9,
75 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
76 SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
77 SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
78 SCIF3_ERI, SCIF3_RXI, SCIF3_BRI, SCIF3_TXI,
79 DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3,
80 DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE,
81 DU,
82 DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, DMAC1_DMINT9,
83 DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE,
84 IIC, VIN0, VIN1, VCORE0, ATAPI,
85 DTU0_TEND, DTU0_AE, DTU0_TMISS,
86 DTU1_TEND, DTU1_AE, DTU1_TMISS,
87 DTU2_TEND, DTU2_AE, DTU2_TMISS,
88 DTU3_TEND, DTU3_AE, DTU3_TMISS,
89 FE0, FE1,
90 GPIO0, GPIO1, GPIO2, GPIO3,
91 PAM, IRM,
92 INTICI0, INTICI1, INTICI2, INTICI3,
93 INTICI4, INTICI5, INTICI6, INTICI7,
94
95 /* interrupt groups */
96 IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
97 DMAC0, DMAC1, DTU0, DTU1, DTU2, DTU3,
98};
99
100static struct intc_vect vectors[] __initdata = {
101 INTC_VECT(HUDII, 0x3e0),
102 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
103 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU3, 0x460),
104 INTC_VECT(TMU4, 0x480), INTC_VECT(TMU5, 0x4a0),
105 INTC_VECT(PCII0, 0x500), INTC_VECT(PCII1, 0x520),
106 INTC_VECT(PCII2, 0x540), INTC_VECT(PCII3, 0x560),
107 INTC_VECT(PCII4, 0x580), INTC_VECT(PCII5, 0x5a0),
108 INTC_VECT(PCII6, 0x5c0), INTC_VECT(PCII7, 0x5e0),
109 INTC_VECT(PCII8, 0x600), INTC_VECT(PCII9, 0x620),
110 INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
111 INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
112 INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0),
113 INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0),
114 INTC_VECT(SCIF2_ERI, 0x800), INTC_VECT(SCIF2_RXI, 0x820),
115 INTC_VECT(SCIF2_BRI, 0x840), INTC_VECT(SCIF2_TXI, 0x860),
116 INTC_VECT(SCIF3_ERI, 0x880), INTC_VECT(SCIF3_RXI, 0x8a0),
117 INTC_VECT(SCIF3_BRI, 0x8c0), INTC_VECT(SCIF3_TXI, 0x8e0),
118 INTC_VECT(DMAC0_DMINT0, 0x900), INTC_VECT(DMAC0_DMINT1, 0x920),
119 INTC_VECT(DMAC0_DMINT2, 0x940), INTC_VECT(DMAC0_DMINT3, 0x960),
120 INTC_VECT(DMAC0_DMINT4, 0x980), INTC_VECT(DMAC0_DMINT5, 0x9a0),
121 INTC_VECT(DMAC0_DMAE, 0x9c0),
122 INTC_VECT(DU, 0x9e0),
123 INTC_VECT(DMAC1_DMINT6, 0xa00), INTC_VECT(DMAC1_DMINT7, 0xa20),
124 INTC_VECT(DMAC1_DMINT8, 0xa40), INTC_VECT(DMAC1_DMINT9, 0xa60),
125 INTC_VECT(DMAC1_DMINT10, 0xa80), INTC_VECT(DMAC1_DMINT11, 0xaa0),
126 INTC_VECT(DMAC1_DMAE, 0xac0),
127 INTC_VECT(IIC, 0xae0),
128 INTC_VECT(VIN0, 0xb00), INTC_VECT(VIN1, 0xb20),
129 INTC_VECT(VCORE0, 0xb00), INTC_VECT(ATAPI, 0xb60),
130 INTC_VECT(DTU0_TEND, 0xc00), INTC_VECT(DTU0_AE, 0xc20),
131 INTC_VECT(DTU0_TMISS, 0xc40),
132 INTC_VECT(DTU1_TEND, 0xc60), INTC_VECT(DTU1_AE, 0xc80),
133 INTC_VECT(DTU1_TMISS, 0xca0),
134 INTC_VECT(DTU2_TEND, 0xcc0), INTC_VECT(DTU2_AE, 0xce0),
135 INTC_VECT(DTU2_TMISS, 0xd00),
136 INTC_VECT(DTU3_TEND, 0xd20), INTC_VECT(DTU3_AE, 0xd40),
137 INTC_VECT(DTU3_TMISS, 0xd60),
138 INTC_VECT(FE0, 0xe00), INTC_VECT(FE1, 0xe20),
139 INTC_VECT(GPIO0, 0xe40), INTC_VECT(GPIO1, 0xe60),
140 INTC_VECT(GPIO2, 0xe80), INTC_VECT(GPIO3, 0xea0),
141 INTC_VECT(PAM, 0xec0), INTC_VECT(IRM, 0xee0),
142 INTC_VECT(INTICI0, 0xf00), INTC_VECT(INTICI1, 0xf20),
143 INTC_VECT(INTICI2, 0xf40), INTC_VECT(INTICI3, 0xf60),
144 INTC_VECT(INTICI4, 0xf80), INTC_VECT(INTICI5, 0xfa0),
145 INTC_VECT(INTICI6, 0xfc0), INTC_VECT(INTICI7, 0xfe0),
67}; 146};
68 147
69static struct intc2_desc intc2_irq_desc __read_mostly = { 148static struct intc_group groups[] __initdata = {
70 .prio_base = 0xfe410000, 149 INTC_GROUP(IRL, IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
71 .msk_base = 0xfe410820, 150 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
72 .mskclr_base = 0xfe410850, 151 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
152 IRL_HHLL, IRL_HHLH, IRL_HHHL),
153 INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9),
154 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
155 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
156 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
157 INTC_GROUP(SCIF3, SCIF3_ERI, SCIF3_RXI, SCIF3_BRI, SCIF3_TXI),
158 INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
159 DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
160 INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8,
161 DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11),
162 INTC_GROUP(DTU0, DTU0_TEND, DTU0_AE, DTU0_TMISS),
163 INTC_GROUP(DTU1, DTU1_TEND, DTU1_AE, DTU1_TMISS),
164 INTC_GROUP(DTU2, DTU2_TEND, DTU2_AE, DTU2_TMISS),
165 INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS),
166};
73 167
74 .intc2_data = intc2_irq_table, 168static struct intc_prio priorities[] __initdata = {
75 .nr_irqs = ARRAY_SIZE(intc2_irq_table), 169 INTC_PRIO(SCIF0, 3),
170 INTC_PRIO(SCIF1, 3),
171 INTC_PRIO(SCIF2, 3),
172 INTC_PRIO(SCIF3, 3),
173};
76 174
77 .chip = { 175static struct intc_mask_reg mask_registers[] __initdata = {
78 .name = "INTC2-SHX3", 176 { 0xfe410030, 0xfe410050, 32, /* CnINTMSK0 / CnINTMSKCLR0 */
79 }, 177 { IRQ0, IRQ1, IRQ2, IRQ3 } },
178 { 0xfe410040, 0xfe410060, 32, /* CnINTMSK1 / CnINTMSKCLR1 */
179 { IRL } },
180 { 0xfe410820, 0xfe410850, 32, /* CnINT2MSK0 / CnINT2MSKCLR0 */
181 { FE1, FE0, 0, ATAPI, VCORE0, VIN1, VIN0, IIC,
182 DU, GPIO3, GPIO2, GPIO1, GPIO0, PAM, 0, 0,
183 0, 0, 0, 0, 0, 0, 0, 0, /* HUDI bits ignored */
184 0, TMU5, TMU4, TMU3, TMU2, TMU1, TMU0, 0, } },
185 { 0xfe410830, 0xfe410860, 32, /* CnINT2MSK1 / CnINT2MSKCLR1 */
186 { 0, 0, 0, 0, DTU3, DTU2, DTU1, DTU0, /* IRM bits ignored */
187 PCII9, PCII8, PCII7, PCII6, PCII5, PCII4, PCII3, PCII2,
188 PCII1, PCII0, DMAC1_DMAE, DMAC1_DMINT11,
189 DMAC1_DMINT10, DMAC1_DMINT9, DMAC1_DMINT8, DMAC1_DMINT7,
190 DMAC1_DMINT6, DMAC0_DMAE, DMAC0_DMINT5, DMAC0_DMINT4,
191 DMAC0_DMINT3, DMAC0_DMINT2, DMAC0_DMINT1, DMAC0_DMINT0 } },
192 { 0xfe410840, 0xfe410870, 32, /* CnINT2MSK2 / CnINT2MSKCLR2 */
193 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
194 SCIF3_TXI, SCIF3_BRI, SCIF3_RXI, SCIF3_ERI,
195 SCIF2_TXI, SCIF2_BRI, SCIF2_RXI, SCIF2_ERI,
196 SCIF1_TXI, SCIF1_BRI, SCIF1_RXI, SCIF1_ERI,
197 SCIF0_TXI, SCIF0_BRI, SCIF0_RXI, SCIF0_ERI } },
198};
199
200static struct intc_prio_reg prio_registers[] __initdata = {
201 { 0xfe410010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
202
203 { 0xfe410800, 0, 32, 4, /* INT2PRI0 */ { 0, HUDII, TMU5, TMU4,
204 TMU3, TMU2, TMU1, TMU0 } },
205 { 0xfe410804, 0, 32, 4, /* INT2PRI1 */ { DTU3, DTU2, DTU1, DTU0,
206 SCIF3, SCIF2,
207 SCIF1, SCIF0 } },
208 { 0xfe410808, 0, 32, 4, /* INT2PRI2 */ { DMAC1, DMAC0,
209 PCII56789, PCII4,
210 PCII3, PCII2,
211 PCII1, PCII0 } },
212 { 0xfe41080c, 0, 32, 4, /* INT2PRI3 */ { FE1, FE0, ATAPI, VCORE0,
213 VIN1, VIN0, IIC, DU} },
214 { 0xfe410810, 0, 32, 4, /* INT2PRI4 */ { 0, 0, PAM, GPIO3,
215 GPIO2, GPIO1, GPIO0, IRM } },
216 { 0xfe410090, 0xfe4100a0, 32, 4, /* CnICIPRI / CnICIPRICLR */
217 { INTICI7, INTICI6, INTICI5, INTICI4,
218 INTICI3, INTICI2, INTICI1, INTICI0 }, INTC_SMP(4, 4) },
219};
220
221static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, priorities,
222 mask_registers, prio_registers, NULL);
223
224/* Support for external interrupt pins in IRQ mode */
225static struct intc_vect vectors_irq[] __initdata = {
226 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
227 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
228};
229
230static struct intc_sense_reg sense_registers[] __initdata = {
231 { 0xfe41001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
80}; 232};
81 233
234static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups,
235 priorities, mask_registers, prio_registers,
236 sense_registers);
237
238/* External interrupt pins in IRL mode */
239static struct intc_vect vectors_irl[] __initdata = {
240 INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
241 INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
242 INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
243 INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0),
244 INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320),
245 INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360),
246 INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0),
247 INTC_VECT(IRL_HHHL, 0x3c0),
248};
249
250static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,
251 priorities, mask_registers, prio_registers, NULL);
252
253void __init plat_irq_setup_pins(int mode)
254{
255 switch (mode) {
256 case IRQ_MODE_IRQ:
257 register_intc_controller(&intc_desc_irq);
258 break;
259 case IRQ_MODE_IRL3210:
260 register_intc_controller(&intc_desc_irl);
261 break;
262 default:
263 BUG();
264 }
265}
266
82void __init plat_irq_setup(void) 267void __init plat_irq_setup(void)
83{ 268{
84 register_intc2_controller(&intc2_irq_desc); 269 register_intc_controller(&intc_desc);
270}
271
272void __init plat_mem_setup(void)
273{
274 unsigned int nid = 1;
275
276 /* Register CPU#0 URAM space as Node 1 */
277 setup_bootmem_node(nid++, 0x145f0000, 0x14610000); /* CPU0 */
278
279#if 0
280 /* XXX: Not yet.. */
281 setup_bootmem_node(nid++, 0x14df0000, 0x14e10000); /* CPU1 */
282 setup_bootmem_node(nid++, 0x155f0000, 0x15610000); /* CPU2 */
283 setup_bootmem_node(nid++, 0x15df0000, 0x15e10000); /* CPU3 */
284#endif
285
286 setup_bootmem_node(nid++, 0x16000000, 0x16020000); /* CSM */
85} 287}
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
new file mode 100644
index 000000000000..e5e06845fa43
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -0,0 +1,120 @@
1/*
2 * SH-X3 SMP
3 *
4 * Copyright (C) 2007 Paul Mundt
5 * Copyright (C) 2007 Magnus Damm
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/cpumask.h>
13#include <linux/smp.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16
17void __init plat_smp_setup(void)
18{
19 unsigned int cpu = 0;
20 int i, num;
21
22 cpus_clear(cpu_possible_map);
23 cpu_set(cpu, cpu_possible_map);
24
25 __cpu_number_map[0] = 0;
26 __cpu_logical_map[0] = 0;
27
28 /*
29 * Do this stupidly for now.. we don't have an easy way to probe
30 * for the total number of cores.
31 */
32 for (i = 1, num = 0; i < NR_CPUS; i++) {
33 cpu_set(i, cpu_possible_map);
34 __cpu_number_map[i] = ++num;
35 __cpu_logical_map[num] = i;
36 }
37
38 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
39}
40
41void __init plat_prepare_cpus(unsigned int max_cpus)
42{
43}
44
45#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
46#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
47
48#define STBCR_MSTP 0x00000001
49#define STBCR_RESET 0x00000002
50#define STBCR_LTSLP 0x80000000
51
52#define STBCR_AP_VAL (STBCR_RESET | STBCR_LTSLP)
53
54void plat_start_cpu(unsigned int cpu, unsigned long entry_point)
55{
56 ctrl_outl(entry_point, RESET_REG(cpu));
57
58 if (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP))
59 ctrl_outl(STBCR_MSTP, STBCR_REG(cpu));
60
61 while (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP))
62 ;
63
64 /* Start up secondary processor by sending a reset */
65 ctrl_outl(STBCR_AP_VAL, STBCR_REG(cpu));
66}
67
68int plat_smp_processor_id(void)
69{
70 return ctrl_inl(0xff000048); /* CPIDR */
71}
72
73void plat_send_ipi(unsigned int cpu, unsigned int message)
74{
75 unsigned long addr = 0xfe410070 + (cpu * 4);
76
77 BUG_ON(cpu >= 4);
78 BUG_ON(message >= SMP_MSG_NR);
79
80 ctrl_outl(1 << (message << 2), addr); /* C0INTICI..CnINTICI */
81}
82
83struct ipi_data {
84 void (*handler)(void *);
85 void *arg;
86 unsigned int message;
87};
88
89static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
90{
91 struct ipi_data *id = arg;
92 unsigned int cpu = hard_smp_processor_id();
93 unsigned int offs = 4 * cpu;
94 unsigned int x;
95
96 x = ctrl_inl(0xfe410070 + offs); /* C0INITICI..CnINTICI */
97 x &= (1 << (id->message << 2));
98 ctrl_outl(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */
99
100 id->handler(id->arg);
101
102 return IRQ_HANDLED;
103}
104
105static struct ipi_data ipi_handlers[SMP_MSG_NR];
106
107int plat_register_ipi_handler(unsigned int message,
108 void (*handler)(void *), void *arg)
109{
110 struct ipi_data *id = &ipi_handlers[message];
111
112 BUG_ON(SMP_MSG_NR >= 8);
113 BUG_ON(message >= SMP_MSG_NR);
114
115 id->handler = handler;
116 id->arg = arg;
117 id->message = message;
118
119 return request_irq(104 + message, ipi_interrupt_handler, 0, "IPI", id);
120}
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c
index e61890217c50..e0590ffebd73 100644
--- a/arch/sh/kernel/cpufreq.c
+++ b/arch/sh/kernel/cpufreq.c
@@ -77,8 +77,6 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
77 77
78static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy) 78static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy)
79{ 79{
80 printk(KERN_INFO "cpufreq: SuperH CPU frequency driver.\n");
81
82 if (!cpu_online(policy->cpu)) 80 if (!cpu_online(policy->cpu))
83 return -ENODEV; 81 return -ENODEV;
84 82
@@ -93,7 +91,6 @@ static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy)
93 policy->cpuinfo.max_freq = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; 91 policy->cpuinfo.max_freq = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
94 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 92 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
95 93
96 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
97 policy->cur = sh_cpufreq_get(policy->cpu); 94 policy->cur = sh_cpufreq_get(policy->cpu);
98 policy->min = policy->cpuinfo.min_freq; 95 policy->min = policy->cpuinfo.min_freq;
99 policy->max = policy->cpuinfo.max_freq; 96 policy->max = policy->cpuinfo.max_freq;
@@ -144,6 +141,7 @@ static struct cpufreq_driver sh_cpufreq_driver = {
144 141
145static int __init sh_cpufreq_module_init(void) 142static int __init sh_cpufreq_module_init(void)
146{ 143{
144 printk(KERN_INFO "cpufreq: SuperH CPU frequency driver.\n");
147 return cpufreq_register_driver(&sh_cpufreq_driver); 145 return cpufreq_register_driver(&sh_cpufreq_driver);
148} 146}
149 147
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 80b637c30203..2f30977558ad 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka 4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002 M. R. Brown 5 * Copyright (C) 2002 M. R. Brown
6 * Copyright (C) 2004 - 2006 Paul Mundt 6 * Copyright (C) 2004 - 2007 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -13,6 +13,7 @@
13#include <linux/tty.h> 13#include <linux/tty.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/delay.h>
16 17
17#ifdef CONFIG_SH_STANDARD_BIOS 18#ifdef CONFIG_SH_STANDARD_BIOS
18#include <asm/sh_bios.h> 19#include <asm/sh_bios.h>
@@ -62,6 +63,16 @@ static struct console bios_console = {
62#include <linux/serial_core.h> 63#include <linux/serial_core.h>
63#include "../../../drivers/serial/sh-sci.h" 64#include "../../../drivers/serial/sh-sci.h"
64 65
66#if defined(CONFIG_CPU_SUBTYPE_SH7720)
67#define EPK_SCSMR_VALUE 0x000
68#define EPK_SCBRR_VALUE 0x00C
69#define EPK_FIFO_SIZE 64
70#define EPK_FIFO_BITS (0x7f00 >> 8)
71#else
72#define EPK_FIFO_SIZE 16
73#define EPK_FIFO_BITS (0x1f00 >> 8)
74#endif
75
65static struct uart_port scif_port = { 76static struct uart_port scif_port = {
66 .mapbase = CONFIG_EARLY_SCIF_CONSOLE_PORT, 77 .mapbase = CONFIG_EARLY_SCIF_CONSOLE_PORT,
67 .membase = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT, 78 .membase = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT,
@@ -69,7 +80,7 @@ static struct uart_port scif_port = {
69 80
70static void scif_sercon_putc(int c) 81static void scif_sercon_putc(int c)
71{ 82{
72 while (((sci_in(&scif_port, SCFDR) & 0x1f00 >> 8) == 16)) 83 while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE))
73 ; 84 ;
74 85
75 sci_out(&scif_port, SCxTDR, c); 86 sci_out(&scif_port, SCxTDR, c);
@@ -105,7 +116,22 @@ static struct console scif_console = {
105 .index = -1, 116 .index = -1,
106}; 117};
107 118
108#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS) 119#if !defined(CONFIG_SH_STANDARD_BIOS)
120#if defined(CONFIG_CPU_SUBTYPE_SH7720)
121static void scif_sercon_init(char *s)
122{
123 sci_out(&scif_port, SCSCR, 0x0000); /* clear TE and RE */
124 sci_out(&scif_port, SCFCR, 0x4006); /* reset */
125 sci_out(&scif_port, SCSCR, 0x0000); /* select internal clock */
126 sci_out(&scif_port, SCSMR, EPK_SCSMR_VALUE);
127 sci_out(&scif_port, SCBRR, EPK_SCBRR_VALUE);
128
129 mdelay(1); /* wait 1-bit time */
130
131 sci_out(&scif_port, SCFCR, 0x0030); /* TTRG=b'11 */
132 sci_out(&scif_port, SCSCR, 0x0030); /* TE, RE */
133}
134#elif defined(CONFIG_CPU_SH4)
109#define DEFAULT_BAUD 115200 135#define DEFAULT_BAUD 115200
110/* 136/*
111 * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4 137 * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
@@ -146,7 +172,8 @@ static void scif_sercon_init(char *s)
146 ctrl_outw(0, scif_port.mapbase + 36); 172 ctrl_outw(0, scif_port.mapbase + 36);
147 ctrl_outw(0x30, scif_port.mapbase + 8); 173 ctrl_outw(0x30, scif_port.mapbase + 8);
148} 174}
149#endif /* CONFIG_CPU_SH4 && !CONFIG_SH_STANDARD_BIOS */ 175#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
176#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
150#endif /* CONFIG_EARLY_SCIF_CONSOLE */ 177#endif /* CONFIG_EARLY_SCIF_CONSOLE */
151 178
152/* 179/*
@@ -163,17 +190,12 @@ static struct console *early_console =
163#endif 190#endif
164 ; 191 ;
165 192
166static int __initdata keep_early; 193static int __init setup_early_printk(char *buf)
167static int early_console_initialized;
168
169int __init setup_early_printk(char *buf)
170{ 194{
171 if (!buf) 195 int keep_early = 0;
172 return 0;
173 196
174 if (early_console_initialized) 197 if (!buf)
175 return 0; 198 return 0;
176 early_console_initialized = 1;
177 199
178 if (strstr(buf, "keep")) 200 if (strstr(buf, "keep"))
179 keep_early = 1; 201 keep_early = 1;
@@ -186,7 +208,8 @@ int __init setup_early_printk(char *buf)
186 if (!strncmp(buf, "serial", 6)) { 208 if (!strncmp(buf, "serial", 6)) {
187 early_console = &scif_console; 209 early_console = &scif_console;
188 210
189#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS) 211#if (defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720)) && \
212 !defined(CONFIG_SH_STANDARD_BIOS)
190 scif_sercon_init(buf + 6); 213 scif_sercon_init(buf + 6);
191#endif 214#endif
192 } 215 }
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index b46728027195..e0317ed080c3 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -176,7 +176,7 @@ work_notifysig:
176 jmp @r1 176 jmp @r1
177 lds r0, pr 177 lds r0, pr
178work_resched: 178work_resched:
179#ifndef CONFIG_PREEMPT 179#if defined(CONFIG_GUSA) && !defined(CONFIG_PREEMPT)
180 ! gUSA handling 180 ! gUSA handling
181 mov.l @(OFF_SP,r15), r0 ! get user space stack pointer 181 mov.l @(OFF_SP,r15), r0 ! get user space stack pointer
182 mov r0, r1 182 mov r0, r1
diff --git a/arch/sh/kernel/head.S b/arch/sh/kernel/head.S
index 0bccc0ca5a0f..3338239717f1 100644
--- a/arch/sh/kernel/head.S
+++ b/arch/sh/kernel/head.S
@@ -54,8 +54,8 @@ ENTRY(_stext)
54 mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF 54 mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
55 ldc r0, sr 55 ldc r0, sr
56 ! Initialize global interrupt mask 56 ! Initialize global interrupt mask
57 mov #0, r0
58#ifdef CONFIG_CPU_HAS_SR_RB 57#ifdef CONFIG_CPU_HAS_SR_RB
58 mov #0, r0
59 ldc r0, r6_bank 59 ldc r0, r6_bank
60#endif 60#endif
61 61
@@ -72,15 +72,18 @@ ENTRY(_stext)
72 ! 72 !
73 mov.l 2f, r0 73 mov.l 2f, r0
74 mov r0, r15 ! Set initial r15 (stack pointer) 74 mov r0, r15 ! Set initial r15 (stack pointer)
75 mov #(THREAD_SIZE >> 10), r1
76 shll8 r1 ! r1 = THREAD_SIZE
77 shll2 r1
78 sub r1, r0 !
79#ifdef CONFIG_CPU_HAS_SR_RB 75#ifdef CONFIG_CPU_HAS_SR_RB
76 mov.l 7f, r0
80 ldc r0, r7_bank ! ... and initial thread_info 77 ldc r0, r7_bank ! ... and initial thread_info
81#endif 78#endif
82 79
83 ! Clear BSS area 80 ! Clear BSS area
81#ifdef CONFIG_SMP
82 mov.l 3f, r0
83 cmp/eq #0, r0 ! skip clear if set to zero
84 bt 10f
85#endif
86
84 mov.l 3f, r1 87 mov.l 3f, r1
85 add #4, r1 88 add #4, r1
86 mov.l 4f, r2 89 mov.l 4f, r2
@@ -89,13 +92,14 @@ ENTRY(_stext)
89 bf/s 9b ! while (r1 < r2) 92 bf/s 9b ! while (r1 < r2)
90 mov.l r0,@-r2 93 mov.l r0,@-r2
91 94
9510:
92 ! Additional CPU initialization 96 ! Additional CPU initialization
93 mov.l 6f, r0 97 mov.l 6f, r0
94 jsr @r0 98 jsr @r0
95 nop 99 nop
96 100
97 SYNCO() ! Wait for pending instructions.. 101 SYNCO() ! Wait for pending instructions..
98 102
99 ! Start kernel 103 ! Start kernel
100 mov.l 5f, r0 104 mov.l 5f, r0
101 jmp @r0 105 jmp @r0
@@ -107,8 +111,10 @@ ENTRY(_stext)
107#else 111#else
1081: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF 1121: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
109#endif 113#endif
114ENTRY(stack_start)
1102: .long init_thread_union+THREAD_SIZE 1152: .long init_thread_union+THREAD_SIZE
1113: .long __bss_start 1163: .long __bss_start
1124: .long _end 1174: .long _end
1135: .long start_kernel 1185: .long start_kernel
1146: .long sh_cpu_init 1196: .long sh_cpu_init
1207: .long init_thread_union
diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c
index edd1ec214e6d..2fdc700dfd6e 100644
--- a/arch/sh/kernel/kgdb_stub.c
+++ b/arch/sh/kernel/kgdb_stub.c
@@ -150,13 +150,6 @@ struct kgdb_regs trap_registers;
150char kgdb_in_gdb_mode; 150char kgdb_in_gdb_mode;
151char in_nmi; /* Set during NMI to prevent reentry */ 151char in_nmi; /* Set during NMI to prevent reentry */
152int kgdb_nofault; /* Boolean to ignore bus errs (i.e. in GDB) */ 152int kgdb_nofault; /* Boolean to ignore bus errs (i.e. in GDB) */
153int kgdb_enabled = 1; /* Default to enabled, cmdline can disable */
154
155/* Exposed for user access */
156struct task_struct *kgdb_current;
157unsigned int kgdb_g_imask;
158int kgdb_trapa_val;
159int kgdb_excode;
160 153
161/* Default values for SCI (can override via kernel args in setup.c) */ 154/* Default values for SCI (can override via kernel args in setup.c) */
162#ifndef CONFIG_KGDB_DEFPORT 155#ifndef CONFIG_KGDB_DEFPORT
@@ -616,7 +609,7 @@ static short *get_step_address(void)
616 else 609 else
617 addr = trap_registers.pc + 2; 610 addr = trap_registers.pc + 2;
618 611
619 kgdb_flush_icache_range(addr, addr + 2); 612 flush_icache_range(addr, addr + 2);
620 return (short *) addr; 613 return (short *) addr;
621} 614}
622 615
@@ -639,8 +632,7 @@ static void do_single_step(void)
639 *addr = STEP_OPCODE; 632 *addr = STEP_OPCODE;
640 633
641 /* Flush and return */ 634 /* Flush and return */
642 kgdb_flush_icache_range((long) addr, (long) addr + 2); 635 flush_icache_range((long) addr, (long) addr + 2);
643 return;
644} 636}
645 637
646/* Undo a single step */ 638/* Undo a single step */
@@ -650,7 +642,7 @@ static void undo_single_step(void)
650 /* Use stepped_address in case we stopped elsewhere */ 642 /* Use stepped_address in case we stopped elsewhere */
651 if (stepped_opcode != 0) { 643 if (stepped_opcode != 0) {
652 *(short*)stepped_address = stepped_opcode; 644 *(short*)stepped_address = stepped_opcode;
653 kgdb_flush_icache_range(stepped_address, stepped_address + 2); 645 flush_icache_range(stepped_address, stepped_address + 2);
654 } 646 }
655 stepped_opcode = 0; 647 stepped_opcode = 0;
656} 648}
@@ -736,7 +728,7 @@ static void write_mem_msg(int binary)
736 ebin_to_mem(ptr, (char*)addr, length); 728 ebin_to_mem(ptr, (char*)addr, length);
737 else 729 else
738 hex_to_mem(ptr, (char*)addr, length); 730 hex_to_mem(ptr, (char*)addr, length);
739 kgdb_flush_icache_range(addr, addr + length); 731 flush_icache_range(addr, addr + length);
740 ptr = 0; 732 ptr = 0;
741 send_ok_msg(); 733 send_ok_msg();
742 } 734 }
@@ -815,14 +807,10 @@ static void set_regs_msg(void)
815/* 807/*
816 * Bring up the ports.. 808 * Bring up the ports..
817 */ 809 */
818static int kgdb_serial_setup(void) 810static int __init kgdb_serial_setup(void)
819{ 811{
820 extern int kgdb_console_setup(struct console *co, char *options);
821 struct console dummy; 812 struct console dummy;
822 813 return kgdb_console_setup(&dummy, 0);
823 kgdb_console_setup(&dummy, 0);
824
825 return 0;
826} 814}
827#else 815#else
828#define kgdb_serial_setup() 0 816#define kgdb_serial_setup() 0
@@ -833,22 +821,6 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
833{ 821{
834 int sigval; 822 int sigval;
835 823
836 if (excep_code == NMI_VEC) {
837#ifndef CONFIG_KGDB_NMI
838 printk(KERN_NOTICE "KGDB: Ignoring unexpected NMI?\n");
839 return;
840#else /* CONFIG_KGDB_NMI */
841 if (!kgdb_enabled) {
842 kgdb_enabled = 1;
843 kgdb_init();
844 }
845#endif /* CONFIG_KGDB_NMI */
846 }
847
848 /* Ignore if we're disabled */
849 if (!kgdb_enabled)
850 return;
851
852 /* Enter GDB mode (e.g. after detach) */ 824 /* Enter GDB mode (e.g. after detach) */
853 if (!kgdb_in_gdb_mode) { 825 if (!kgdb_in_gdb_mode) {
854 /* Do serial setup, notify user, issue preemptive ack */ 826 /* Do serial setup, notify user, issue preemptive ack */
@@ -959,18 +931,10 @@ static void handle_exception(struct pt_regs *regs)
959 931
960 /* Get excode for command loop call, user access */ 932 /* Get excode for command loop call, user access */
961 asm("stc r2_bank, %0":"=r"(excep_code)); 933 asm("stc r2_bank, %0":"=r"(excep_code));
962 kgdb_excode = excep_code;
963
964 /* Other interesting environment items for reference */
965 asm("stc r6_bank, %0":"=r"(kgdb_g_imask));
966 kgdb_current = current;
967 kgdb_trapa_val = trapa_value;
968 934
969 /* Act on the exception */ 935 /* Act on the exception */
970 kgdb_command_loop(excep_code, trapa_value); 936 kgdb_command_loop(excep_code, trapa_value);
971 937
972 kgdb_current = NULL;
973
974 /* Copy back the (maybe modified) registers */ 938 /* Copy back the (maybe modified) registers */
975 for (count = 0; count < 16; count++) 939 for (count = 0; count < 16; count++)
976 regs->regs[count] = trap_registers.regs[count]; 940 regs->regs[count] = trap_registers.regs[count];
@@ -994,11 +958,8 @@ asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5,
994} 958}
995 959
996/* Initialise the KGDB data structures and serial configuration */ 960/* Initialise the KGDB data structures and serial configuration */
997int kgdb_init(void) 961int __init kgdb_init(void)
998{ 962{
999 if (!kgdb_enabled)
1000 return 1;
1001
1002 in_nmi = 0; 963 in_nmi = 0;
1003 kgdb_nofault = 0; 964 kgdb_nofault = 0;
1004 stepped_opcode = 0; 965 stepped_opcode = 0;
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 15ae322dbd74..b4469992d6b2 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -19,6 +19,7 @@
19#include <linux/tick.h> 19#include <linux/tick.h>
20#include <linux/reboot.h> 20#include <linux/reboot.h>
21#include <linux/fs.h> 21#include <linux/fs.h>
22#include <linux/preempt.h>
22#include <asm/uaccess.h> 23#include <asm/uaccess.h>
23#include <asm/mmu_context.h> 24#include <asm/mmu_context.h>
24#include <asm/pgalloc.h> 25#include <asm/pgalloc.h>
@@ -349,12 +350,11 @@ struct task_struct *__switch_to(struct task_struct *prev,
349 unlazy_fpu(prev, task_pt_regs(prev)); 350 unlazy_fpu(prev, task_pt_regs(prev));
350#endif 351#endif
351 352
352#ifdef CONFIG_PREEMPT 353#if defined(CONFIG_GUSA) && defined(CONFIG_PREEMPT)
353 { 354 {
354 unsigned long flags;
355 struct pt_regs *regs; 355 struct pt_regs *regs;
356 356
357 local_irq_save(flags); 357 preempt_disable();
358 regs = task_pt_regs(prev); 358 regs = task_pt_regs(prev);
359 if (user_mode(regs) && regs->regs[15] >= 0xc0000000) { 359 if (user_mode(regs) && regs->regs[15] >= 0xc0000000) {
360 int offset = (int)regs->regs[15]; 360 int offset = (int)regs->regs[15];
@@ -365,7 +365,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
365 /* Go to rewind point */ 365 /* Go to rewind point */
366 regs->pc = regs->regs[0] + offset; 366 regs->pc = regs->regs[0] + offset;
367 } 367 }
368 local_irq_restore(flags); 368 preempt_enable_no_resched();
369 } 369 }
370#endif 370#endif
371 371
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 2cf7dec0d690..b3027a6775b9 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -22,6 +22,7 @@
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/kexec.h> 23#include <linux/kexec.h>
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/smp.h>
25#include <asm/uaccess.h> 26#include <asm/uaccess.h>
26#include <asm/io.h> 27#include <asm/io.h>
27#include <asm/page.h> 28#include <asm/page.h>
@@ -42,7 +43,13 @@ extern void * __rd_start, * __rd_end;
42 * This value will be used at the very early stage of serial setup. 43 * This value will be used at the very early stage of serial setup.
43 * The bigger value means no problem. 44 * The bigger value means no problem.
44 */ 45 */
45struct sh_cpuinfo boot_cpu_data = { CPU_SH_NONE, 10000000, }; 46struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
47 [0] = {
48 .type = CPU_SH_NONE,
49 .loops_per_jiffy = 10000000,
50 },
51};
52EXPORT_SYMBOL(cpu_data);
46 53
47/* 54/*
48 * The machine vector. First entry in .machvec.init, or clobbered by 55 * The machine vector. First entry in .machvec.init, or clobbered by
@@ -272,6 +279,10 @@ void __init setup_arch(char **cmdline_p)
272 sh_mv.mv_setup(cmdline_p); 279 sh_mv.mv_setup(cmdline_p);
273 280
274 paging_init(); 281 paging_init();
282
283#ifdef CONFIG_SMP
284 plat_smp_setup();
285#endif
275} 286}
276 287
277static const char *cpu_name[] = { 288static const char *cpu_name[] = {
@@ -279,7 +290,7 @@ static const char *cpu_name[] = {
279 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", 290 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
280 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", 291 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
281 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", 292 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
282 [CPU_SH7712] = "SH7712", 293 [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720",
283 [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750", 294 [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750",
284 [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", 295 [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R",
285 [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R", 296 [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R",
diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c
index 37aef0a85197..548e4285b375 100644
--- a/arch/sh/kernel/sh_ksyms.c
+++ b/arch/sh/kernel/sh_ksyms.c
@@ -8,7 +8,7 @@
8#include <linux/vmalloc.h> 8#include <linux/vmalloc.h>
9#include <linux/pci.h> 9#include <linux/pci.h>
10#include <linux/irq.h> 10#include <linux/irq.h>
11 11#include <asm/sections.h>
12#include <asm/semaphore.h> 12#include <asm/semaphore.h>
13#include <asm/processor.h> 13#include <asm/processor.h>
14#include <asm/uaccess.h> 14#include <asm/uaccess.h>
@@ -43,7 +43,6 @@ EXPORT_SYMBOL(memcpy);
43EXPORT_SYMBOL(memset); 43EXPORT_SYMBOL(memset);
44EXPORT_SYMBOL(memmove); 44EXPORT_SYMBOL(memmove);
45EXPORT_SYMBOL(__copy_user); 45EXPORT_SYMBOL(__copy_user);
46EXPORT_SYMBOL(boot_cpu_data);
47 46
48#ifdef CONFIG_MMU 47#ifdef CONFIG_MMU
49EXPORT_SYMBOL(get_vm_area); 48EXPORT_SYMBOL(get_vm_area);
@@ -53,6 +52,7 @@ EXPORT_SYMBOL(get_vm_area);
53EXPORT_SYMBOL(__up); 52EXPORT_SYMBOL(__up);
54EXPORT_SYMBOL(__down); 53EXPORT_SYMBOL(__down);
55EXPORT_SYMBOL(__down_interruptible); 54EXPORT_SYMBOL(__down_interruptible);
55EXPORT_SYMBOL(__down_trylock);
56 56
57EXPORT_SYMBOL(__udelay); 57EXPORT_SYMBOL(__udelay);
58EXPORT_SYMBOL(__ndelay); 58EXPORT_SYMBOL(__ndelay);
@@ -128,7 +128,8 @@ DECLARE_EXPORT(__movstrSI12_i4);
128#endif /* __GNUC__ == 4 */ 128#endif /* __GNUC__ == 4 */
129#endif 129#endif
130 130
131#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) 131#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
132 defined(CONFIG_SH7705_CACHE_32KB))
132/* needed by some modules */ 133/* needed by some modules */
133EXPORT_SYMBOL(flush_cache_all); 134EXPORT_SYMBOL(flush_cache_all);
134EXPORT_SYMBOL(flush_cache_range); 135EXPORT_SYMBOL(flush_cache_range);
@@ -136,17 +137,11 @@ EXPORT_SYMBOL(flush_dcache_page);
136EXPORT_SYMBOL(__flush_purge_region); 137EXPORT_SYMBOL(__flush_purge_region);
137#endif 138#endif
138 139
139#if defined(CONFIG_MMU) && (defined(CONFIG_CPU_SH4) || \ 140#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \
140 defined(CONFIG_SH7705_CACHE_32KB)) 141 (defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB))
141EXPORT_SYMBOL(clear_user_page); 142EXPORT_SYMBOL(clear_user_page);
142#endif 143#endif
143 144
144EXPORT_SYMBOL(__down_trylock);
145
146#ifdef CONFIG_SMP
147EXPORT_SYMBOL(synchronize_irq);
148#endif
149
150EXPORT_SYMBOL(csum_partial); 145EXPORT_SYMBOL(csum_partial);
151EXPORT_SYMBOL(csum_partial_copy_generic); 146EXPORT_SYMBOL(csum_partial_copy_generic);
152#ifdef CONFIG_IPV6 147#ifdef CONFIG_IPV6
@@ -154,3 +149,4 @@ EXPORT_SYMBOL(csum_ipv6_magic);
154#endif 149#endif
155EXPORT_SYMBOL(clear_page); 150EXPORT_SYMBOL(clear_page);
156EXPORT_SYMBOL(__clear_user); 151EXPORT_SYMBOL(__clear_user);
152EXPORT_SYMBOL(_ebss);
diff --git a/arch/sh/kernel/signal.c b/arch/sh/kernel/signal.c
index 706d81ccd101..2f42442cf164 100644
--- a/arch/sh/kernel/signal.c
+++ b/arch/sh/kernel/signal.c
@@ -507,13 +507,11 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
507 ctrl_inw(regs->pc - 4)); 507 ctrl_inw(regs->pc - 4));
508 break; 508 break;
509 } 509 }
510#ifdef CONFIG_GUSA
510 } else { 511 } else {
511 /* gUSA handling */ 512 /* gUSA handling */
512#ifdef CONFIG_PREEMPT 513 preempt_disable();
513 unsigned long flags;
514 514
515 local_irq_save(flags);
516#endif
517 if (regs->regs[15] >= 0xc0000000) { 515 if (regs->regs[15] >= 0xc0000000) {
518 int offset = (int)regs->regs[15]; 516 int offset = (int)regs->regs[15];
519 517
@@ -524,8 +522,8 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
524 regs->pc = regs->regs[0] + offset - 522 regs->pc = regs->regs[0] + offset -
525 instruction_size(ctrl_inw(regs->pc-4)); 523 instruction_size(ctrl_inw(regs->pc-4));
526 } 524 }
527#ifdef CONFIG_PREEMPT 525
528 local_irq_restore(flags); 526 preempt_enable_no_resched();
529#endif 527#endif
530 } 528 }
531 529
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 283e1425ced5..94075e1a1e61 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -3,68 +3,40 @@
3 * 3 *
4 * SMP support for the SuperH processors. 4 * SMP support for the SuperH processors.
5 * 5 *
6 * Copyright (C) 2002, 2003 Paul Mundt 6 * Copyright (C) 2002 - 2007 Paul Mundt
7 * Copyright (C) 2006 - 2007 Akio Idehara
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify it 9 * This file is subject to the terms and conditions of the GNU General Public
9 * under the terms of the GNU General Public License as published by the 10 * License. See the file "COPYING" in the main directory of this archive
10 * Free Software Foundation; either version 2 of the License, or (at your 11 * for more details.
11 * option) any later version.
12 */ 12 */
13
14#include <linux/err.h> 13#include <linux/err.h>
15#include <linux/cache.h> 14#include <linux/cache.h>
16#include <linux/cpumask.h> 15#include <linux/cpumask.h>
17#include <linux/delay.h> 16#include <linux/delay.h>
18#include <linux/init.h> 17#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/spinlock.h> 18#include <linux/spinlock.h>
21#include <linux/threads.h> 19#include <linux/mm.h>
22#include <linux/module.h> 20#include <linux/module.h>
23#include <linux/time.h> 21#include <linux/interrupt.h>
24#include <linux/timex.h>
25#include <linux/sched.h>
26#include <linux/module.h>
27
28#include <asm/atomic.h> 22#include <asm/atomic.h>
29#include <asm/processor.h> 23#include <asm/processor.h>
30#include <asm/system.h> 24#include <asm/system.h>
31#include <asm/mmu_context.h> 25#include <asm/mmu_context.h>
32#include <asm/smp.h> 26#include <asm/smp.h>
27#include <asm/cacheflush.h>
28#include <asm/sections.h>
33 29
34/* 30int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
35 * This was written with the Sega Saturn (SMP SH-2 7604) in mind, 31int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
36 * but is designed to be usable regardless if there's an MMU
37 * present or not.
38 */
39struct sh_cpuinfo cpu_data[NR_CPUS];
40
41extern void per_cpu_trap_init(void);
42 32
43cpumask_t cpu_possible_map; 33cpumask_t cpu_possible_map;
44EXPORT_SYMBOL(cpu_possible_map); 34EXPORT_SYMBOL(cpu_possible_map);
45 35
46cpumask_t cpu_online_map; 36cpumask_t cpu_online_map;
47EXPORT_SYMBOL(cpu_online_map); 37EXPORT_SYMBOL(cpu_online_map);
48static atomic_t cpus_booted = ATOMIC_INIT(0);
49 38
50/* These are defined by the board-specific code. */ 39static atomic_t cpus_booted = ATOMIC_INIT(0);
51
52/*
53 * Cause the function described by call_data to be executed on the passed
54 * cpu. When the function has finished, increment the finished field of
55 * call_data.
56 */
57void __smp_send_ipi(unsigned int cpu, unsigned int action);
58
59/*
60 * Find the number of available processors
61 */
62unsigned int __smp_probe_cpus(void);
63
64/*
65 * Start a particular processor
66 */
67void __smp_slave_init(unsigned int cpu);
68 40
69/* 41/*
70 * Run specified function on a particular processor. 42 * Run specified function on a particular processor.
@@ -73,74 +45,123 @@ void __smp_call_function(unsigned int cpu);
73 45
74static inline void __init smp_store_cpu_info(unsigned int cpu) 46static inline void __init smp_store_cpu_info(unsigned int cpu)
75{ 47{
76 cpu_data[cpu].loops_per_jiffy = loops_per_jiffy; 48 struct sh_cpuinfo *c = cpu_data + cpu;
49
50 c->loops_per_jiffy = loops_per_jiffy;
77} 51}
78 52
79void __init smp_prepare_cpus(unsigned int max_cpus) 53void __init smp_prepare_cpus(unsigned int max_cpus)
80{ 54{
81 unsigned int cpu = smp_processor_id(); 55 unsigned int cpu = smp_processor_id();
82 int i;
83 56
84 atomic_set(&cpus_booted, 1); 57 init_new_context(current, &init_mm);
85 smp_store_cpu_info(cpu); 58 current_thread_info()->cpu = cpu;
86 59 plat_prepare_cpus(max_cpus);
87 for (i = 0; i < __smp_probe_cpus(); i++) 60
88 cpu_set(i, cpu_possible_map); 61#ifndef CONFIG_HOTPLUG_CPU
62 cpu_present_map = cpu_possible_map;
63#endif
89} 64}
90 65
91void __devinit smp_prepare_boot_cpu(void) 66void __devinit smp_prepare_boot_cpu(void)
92{ 67{
93 unsigned int cpu = smp_processor_id(); 68 unsigned int cpu = smp_processor_id();
94 69
70 __cpu_number_map[0] = cpu;
71 __cpu_logical_map[0] = cpu;
72
95 cpu_set(cpu, cpu_online_map); 73 cpu_set(cpu, cpu_online_map);
96 cpu_set(cpu, cpu_possible_map); 74 cpu_set(cpu, cpu_possible_map);
97} 75}
98 76
99int __cpu_up(unsigned int cpu) 77asmlinkage void __cpuinit start_secondary(void)
100{ 78{
101 struct task_struct *tsk; 79 unsigned int cpu;
80 struct mm_struct *mm = &init_mm;
102 81
103 tsk = fork_idle(cpu); 82 atomic_inc(&mm->mm_count);
83 atomic_inc(&mm->mm_users);
84 current->active_mm = mm;
85 BUG_ON(current->mm);
86 enter_lazy_tlb(mm, current);
104 87
105 if (IS_ERR(tsk)) 88 per_cpu_trap_init();
106 panic("Failed forking idle task for cpu %d\n", cpu); 89
107 90 preempt_disable();
108 task_thread_info(tsk)->cpu = cpu; 91
92 local_irq_enable();
93
94 calibrate_delay();
95
96 cpu = smp_processor_id();
97 smp_store_cpu_info(cpu);
109 98
110 cpu_set(cpu, cpu_online_map); 99 cpu_set(cpu, cpu_online_map);
111 100
112 return 0; 101 cpu_idle();
113} 102}
114 103
115int start_secondary(void *unused) 104extern struct {
105 unsigned long sp;
106 unsigned long bss_start;
107 unsigned long bss_end;
108 void *start_kernel_fn;
109 void *cpu_init_fn;
110 void *thread_info;
111} stack_start;
112
113int __cpuinit __cpu_up(unsigned int cpu)
116{ 114{
117 unsigned int cpu; 115 struct task_struct *tsk;
116 unsigned long timeout;
118 117
119 cpu = smp_processor_id(); 118 tsk = fork_idle(cpu);
119 if (IS_ERR(tsk)) {
120 printk(KERN_ERR "Failed forking idle task for cpu %d\n", cpu);
121 return PTR_ERR(tsk);
122 }
120 123
121 atomic_inc(&init_mm.mm_count); 124 /* Fill in data in head.S for secondary cpus */
122 current->active_mm = &init_mm; 125 stack_start.sp = tsk->thread.sp;
126 stack_start.thread_info = tsk->stack;
127 stack_start.bss_start = 0; /* don't clear bss for secondary cpus */
128 stack_start.start_kernel_fn = start_secondary;
123 129
124 smp_store_cpu_info(cpu); 130 flush_cache_all();
125 131
126 __smp_slave_init(cpu); 132 plat_start_cpu(cpu, (unsigned long)_stext);
127 preempt_disable();
128 per_cpu_trap_init();
129
130 atomic_inc(&cpus_booted);
131 133
132 cpu_idle(); 134 timeout = jiffies + HZ;
133 return 0; 135 while (time_before(jiffies, timeout)) {
136 if (cpu_online(cpu))
137 break;
138
139 udelay(10);
140 }
141
142 if (cpu_online(cpu))
143 return 0;
144
145 return -ENOENT;
134} 146}
135 147
136void __init smp_cpus_done(unsigned int max_cpus) 148void __init smp_cpus_done(unsigned int max_cpus)
137{ 149{
138 smp_mb(); 150 unsigned long bogosum = 0;
151 int cpu;
152
153 for_each_online_cpu(cpu)
154 bogosum += cpu_data[cpu].loops_per_jiffy;
155
156 printk(KERN_INFO "SMP: Total of %d processors activated "
157 "(%lu.%02lu BogoMIPS).\n", num_online_cpus(),
158 bogosum / (500000/HZ),
159 (bogosum / (5000/HZ)) % 100);
139} 160}
140 161
141void smp_send_reschedule(int cpu) 162void smp_send_reschedule(int cpu)
142{ 163{
143 __smp_send_ipi(cpu, SMP_MSG_RESCHEDULE); 164 plat_send_ipi(cpu, SMP_MSG_RESCHEDULE);
144} 165}
145 166
146static void stop_this_cpu(void *unused) 167static void stop_this_cpu(void *unused)
@@ -157,7 +178,6 @@ void smp_send_stop(void)
157 smp_call_function(stop_this_cpu, 0, 1, 0); 178 smp_call_function(stop_this_cpu, 0, 1, 0);
158} 179}
159 180
160
161struct smp_fn_call_struct smp_fn_call = { 181struct smp_fn_call_struct smp_fn_call = {
162 .lock = SPIN_LOCK_UNLOCKED, 182 .lock = SPIN_LOCK_UNLOCKED,
163 .finished = ATOMIC_INIT(0), 183 .finished = ATOMIC_INIT(0),
@@ -175,9 +195,6 @@ int smp_call_function(void (*func)(void *info), void *info, int retry, int wait)
175 unsigned int nr_cpus = atomic_read(&cpus_booted); 195 unsigned int nr_cpus = atomic_read(&cpus_booted);
176 int i; 196 int i;
177 197
178 if (nr_cpus < 2)
179 return 0;
180
181 /* Can deadlock when called with interrupts disabled */ 198 /* Can deadlock when called with interrupts disabled */
182 WARN_ON(irqs_disabled()); 199 WARN_ON(irqs_disabled());
183 200
@@ -189,7 +206,7 @@ int smp_call_function(void (*func)(void *info), void *info, int retry, int wait)
189 206
190 for (i = 0; i < nr_cpus; i++) 207 for (i = 0; i < nr_cpus; i++)
191 if (i != smp_processor_id()) 208 if (i != smp_processor_id())
192 __smp_call_function(i); 209 plat_send_ipi(i, SMP_MSG_FUNCTION);
193 210
194 if (wait) 211 if (wait)
195 while (atomic_read(&smp_fn_call.finished) != (nr_cpus - 1)); 212 while (atomic_read(&smp_fn_call.finished) != (nr_cpus - 1));
@@ -205,3 +222,143 @@ int setup_profiling_timer(unsigned int multiplier)
205 return 0; 222 return 0;
206} 223}
207 224
225static void flush_tlb_all_ipi(void *info)
226{
227 local_flush_tlb_all();
228}
229
230void flush_tlb_all(void)
231{
232 on_each_cpu(flush_tlb_all_ipi, 0, 1, 1);
233}
234
235static void flush_tlb_mm_ipi(void *mm)
236{
237 local_flush_tlb_mm((struct mm_struct *)mm);
238}
239
240/*
241 * The following tlb flush calls are invoked when old translations are
242 * being torn down, or pte attributes are changing. For single threaded
243 * address spaces, a new context is obtained on the current cpu, and tlb
244 * context on other cpus are invalidated to force a new context allocation
245 * at switch_mm time, should the mm ever be used on other cpus. For
246 * multithreaded address spaces, intercpu interrupts have to be sent.
247 * Another case where intercpu interrupts are required is when the target
248 * mm might be active on another cpu (eg debuggers doing the flushes on
249 * behalf of debugees, kswapd stealing pages from another process etc).
250 * Kanoj 07/00.
251 */
252
253void flush_tlb_mm(struct mm_struct *mm)
254{
255 preempt_disable();
256
257 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
258 smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1);
259 } else {
260 int i;
261 for (i = 0; i < num_online_cpus(); i++)
262 if (smp_processor_id() != i)
263 cpu_context(i, mm) = 0;
264 }
265 local_flush_tlb_mm(mm);
266
267 preempt_enable();
268}
269
270struct flush_tlb_data {
271 struct vm_area_struct *vma;
272 unsigned long addr1;
273 unsigned long addr2;
274};
275
276static void flush_tlb_range_ipi(void *info)
277{
278 struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
279
280 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
281}
282
283void flush_tlb_range(struct vm_area_struct *vma,
284 unsigned long start, unsigned long end)
285{
286 struct mm_struct *mm = vma->vm_mm;
287
288 preempt_disable();
289 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
290 struct flush_tlb_data fd;
291
292 fd.vma = vma;
293 fd.addr1 = start;
294 fd.addr2 = end;
295 smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1);
296 } else {
297 int i;
298 for (i = 0; i < num_online_cpus(); i++)
299 if (smp_processor_id() != i)
300 cpu_context(i, mm) = 0;
301 }
302 local_flush_tlb_range(vma, start, end);
303 preempt_enable();
304}
305
306static void flush_tlb_kernel_range_ipi(void *info)
307{
308 struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
309
310 local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
311}
312
313void flush_tlb_kernel_range(unsigned long start, unsigned long end)
314{
315 struct flush_tlb_data fd;
316
317 fd.addr1 = start;
318 fd.addr2 = end;
319 on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1);
320}
321
322static void flush_tlb_page_ipi(void *info)
323{
324 struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
325
326 local_flush_tlb_page(fd->vma, fd->addr1);
327}
328
329void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
330{
331 preempt_disable();
332 if ((atomic_read(&vma->vm_mm->mm_users) != 1) ||
333 (current->mm != vma->vm_mm)) {
334 struct flush_tlb_data fd;
335
336 fd.vma = vma;
337 fd.addr1 = page;
338 smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1);
339 } else {
340 int i;
341 for (i = 0; i < num_online_cpus(); i++)
342 if (smp_processor_id() != i)
343 cpu_context(i, vma->vm_mm) = 0;
344 }
345 local_flush_tlb_page(vma, page);
346 preempt_enable();
347}
348
349static void flush_tlb_one_ipi(void *info)
350{
351 struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
352 local_flush_tlb_one(fd->addr1, fd->addr2);
353}
354
355void flush_tlb_one(unsigned long asid, unsigned long vaddr)
356{
357 struct flush_tlb_data fd;
358
359 fd.addr1 = asid;
360 fd.addr2 = vaddr;
361
362 smp_call_function(flush_tlb_one_ipi, (void *)&fd, 1, 1);
363 local_flush_tlb_one(asid, vaddr);
364}
diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S
index 91fb7024e06f..10bec45415ba 100644
--- a/arch/sh/kernel/syscalls.S
+++ b/arch/sh/kernel/syscalls.S
@@ -14,24 +14,6 @@
14#include <linux/sys.h> 14#include <linux/sys.h>
15#include <linux/linkage.h> 15#include <linux/linkage.h>
16 16
17#if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE)
18#define sys_nfsservctl sys_ni_syscall
19#endif
20
21#if !defined(CONFIG_MMU)
22#define sys_madvise sys_ni_syscall
23#define sys_readahead sys_ni_syscall
24#define sys_mprotect sys_ni_syscall
25#define sys_msync sys_ni_syscall
26#define sys_mlock sys_ni_syscall
27#define sys_munlock sys_ni_syscall
28#define sys_mlockall sys_ni_syscall
29#define sys_munlockall sys_ni_syscall
30#define sys_mremap sys_ni_syscall
31#define sys_mincore sys_ni_syscall
32#define sys_remap_file_pages sys_ni_syscall
33#endif
34
35 .data 17 .data
36ENTRY(sys_call_table) 18ENTRY(sys_call_table)
37 .long sys_restart_syscall /* 0 - old "setup()" system call*/ 19 .long sys_restart_syscall /* 0 - old "setup()" system call*/
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 8a545d54e2d3..628ec9a15e38 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -173,7 +173,8 @@ static int tmu_timer_init(void)
173 173
174 tmu_timer_stop(); 174 tmu_timer_stop();
175 175
176#if !defined(CONFIG_CPU_SUBTYPE_SH7760) && \ 176#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \
177 !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
177 !defined(CONFIG_CPU_SUBTYPE_SH7785) && \ 178 !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
178 !defined(CONFIG_CPU_SUBTYPE_SHX3) 179 !defined(CONFIG_CPU_SUBTYPE_SHX3)
179 ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); 180 ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 67015044d74a..dcb46e71da1c 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -807,12 +807,13 @@ static inline void __init gdb_vbr_init(void)
807} 807}
808#endif 808#endif
809 809
810void __init per_cpu_trap_init(void) 810void __cpuinit per_cpu_trap_init(void)
811{ 811{
812 extern void *vbr_base; 812 extern void *vbr_base;
813 813
814#ifdef CONFIG_SH_STANDARD_BIOS 814#ifdef CONFIG_SH_STANDARD_BIOS
815 gdb_vbr_init(); 815 if (raw_smp_processor_id() == 0)
816 gdb_vbr_init();
816#endif 817#endif
817 818
818 /* NOTE: The VBR value should be at P1 819 /* NOTE: The VBR value should be at P1
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index 9cb95af7b090..6d5abba2ee27 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -62,6 +62,8 @@ SECTIONS
62 __nosave_end = .; 62 __nosave_end = .;
63 63
64 PERCPU(PAGE_SIZE) 64 PERCPU(PAGE_SIZE)
65
66 . = ALIGN(L1_CACHE_BYTES);
65 .data.cacheline_aligned : { *(.data.cacheline_aligned) } 67 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
66 68
67 _edata = .; /* End of data section */ 69 _edata = .; /* End of data section */
@@ -89,7 +91,14 @@ SECTIONS
89 __con_initcall_end = .; 91 __con_initcall_end = .;
90 SECURITY_INIT 92 SECURITY_INIT
91 93
94 /* .exit.text is discarded at runtime, not link time, to deal with
95 references from .rodata */
96 .exit.text : { *(.exit.text) }
97 .exit.data : { *(.exit.data) }
98
92#ifdef CONFIG_BLK_DEV_INITRD 99#ifdef CONFIG_BLK_DEV_INITRD
100 . = ALIGN(PAGE_SIZE);
101
93 __initramfs_start = .; 102 __initramfs_start = .;
94 .init.ramfs : { *(.init.ramfs) } 103 .init.ramfs : { *(.init.ramfs) }
95 __initramfs_end = .; 104 __initramfs_end = .;
@@ -107,6 +116,7 @@ SECTIONS
107 *(.bss.page_aligned) 116 *(.bss.page_aligned)
108 *(.bss) 117 *(.bss)
109 . = ALIGN(4); 118 . = ALIGN(4);
119 _ebss = .; /* uClinux MTD sucks */
110 _end = . ; 120 _end = . ;
111 } 121 }
112 122
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 43f3972a5fb9..cf446bbab5b0 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -2,7 +2,6 @@
2# Processor families 2# Processor families
3# 3#
4config CPU_SH2 4config CPU_SH2
5 select SH_WRITETHROUGH if !CPU_SH2A
6 bool 5 bool
7 6
8config CPU_SH2A 7config CPU_SH2A
@@ -19,6 +18,7 @@ config CPU_SH4
19 select CPU_HAS_INTEVT 18 select CPU_HAS_INTEVT
20 select CPU_HAS_SR_RB 19 select CPU_HAS_SR_RB
21 select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2 20 select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2
21 select CPU_HAS_FPU if !CPU_SH4AL_DSP
22 22
23config CPU_SH4A 23config CPU_SH4A
24 bool 24 bool
@@ -32,7 +32,6 @@ config CPU_SH4AL_DSP
32config CPU_SUBTYPE_ST40 32config CPU_SUBTYPE_ST40
33 bool 33 bool
34 select CPU_SH4 34 select CPU_SH4
35 select CPU_HAS_INTC2_IRQ
36 35
37config CPU_SHX2 36config CPU_SHX2
38 bool 37 bool
@@ -52,26 +51,22 @@ choice
52config CPU_SUBTYPE_SH7619 51config CPU_SUBTYPE_SH7619
53 bool "Support SH7619 processor" 52 bool "Support SH7619 processor"
54 select CPU_SH2 53 select CPU_SH2
55 select CPU_HAS_IPR_IRQ
56 54
57# SH-2A Processor Support 55# SH-2A Processor Support
58 56
59config CPU_SUBTYPE_SH7206 57config CPU_SUBTYPE_SH7206
60 bool "Support SH7206 processor" 58 bool "Support SH7206 processor"
61 select CPU_SH2A 59 select CPU_SH2A
62 select CPU_HAS_IPR_IRQ
63 60
64# SH-3 Processor Support 61# SH-3 Processor Support
65 62
66config CPU_SUBTYPE_SH7705 63config CPU_SUBTYPE_SH7705
67 bool "Support SH7705 processor" 64 bool "Support SH7705 processor"
68 select CPU_SH3 65 select CPU_SH3
69 select CPU_HAS_IPR_IRQ
70 66
71config CPU_SUBTYPE_SH7706 67config CPU_SUBTYPE_SH7706
72 bool "Support SH7706 processor" 68 bool "Support SH7706 processor"
73 select CPU_SH3 69 select CPU_SH3
74 select CPU_HAS_IPR_IRQ
75 help 70 help
76 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 71 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
77 72
@@ -91,14 +86,12 @@ config CPU_SUBTYPE_SH7708
91config CPU_SUBTYPE_SH7709 86config CPU_SUBTYPE_SH7709
92 bool "Support SH7709 processor" 87 bool "Support SH7709 processor"
93 select CPU_SH3 88 select CPU_SH3
94 select CPU_HAS_IPR_IRQ
95 help 89 help
96 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 90 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
97 91
98config CPU_SUBTYPE_SH7710 92config CPU_SUBTYPE_SH7710
99 bool "Support SH7710 processor" 93 bool "Support SH7710 processor"
100 select CPU_SH3 94 select CPU_SH3
101 select CPU_HAS_IPR_IRQ
102 select CPU_HAS_DSP 95 select CPU_HAS_DSP
103 help 96 help
104 Select SH7710 if you have a SH3-DSP SH7710 CPU. 97 Select SH7710 if you have a SH3-DSP SH7710 CPU.
@@ -106,24 +99,28 @@ config CPU_SUBTYPE_SH7710
106config CPU_SUBTYPE_SH7712 99config CPU_SUBTYPE_SH7712
107 bool "Support SH7712 processor" 100 bool "Support SH7712 processor"
108 select CPU_SH3 101 select CPU_SH3
109 select CPU_HAS_IPR_IRQ
110 select CPU_HAS_DSP 102 select CPU_HAS_DSP
111 help 103 help
112 Select SH7712 if you have a SH3-DSP SH7712 CPU. 104 Select SH7712 if you have a SH3-DSP SH7712 CPU.
113 105
106config CPU_SUBTYPE_SH7720
107 bool "Support SH7720 processor"
108 select CPU_SH3
109 select CPU_HAS_DSP
110 help
111 Select SH7720 if you have a SH3-DSP SH7720 CPU.
112
114# SH-4 Processor Support 113# SH-4 Processor Support
115 114
116config CPU_SUBTYPE_SH7750 115config CPU_SUBTYPE_SH7750
117 bool "Support SH7750 processor" 116 bool "Support SH7750 processor"
118 select CPU_SH4 117 select CPU_SH4
119 select CPU_HAS_INTC_IRQ
120 help 118 help
121 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 119 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
122 120
123config CPU_SUBTYPE_SH7091 121config CPU_SUBTYPE_SH7091
124 bool "Support SH7091 processor" 122 bool "Support SH7091 processor"
125 select CPU_SH4 123 select CPU_SH4
126 select CPU_HAS_INTC_IRQ
127 help 124 help
128 Select SH7091 if you have an SH-4 based Sega device (such as 125 Select SH7091 if you have an SH-4 based Sega device (such as
129 the Dreamcast, Naomi, and Naomi 2). 126 the Dreamcast, Naomi, and Naomi 2).
@@ -131,17 +128,14 @@ config CPU_SUBTYPE_SH7091
131config CPU_SUBTYPE_SH7750R 128config CPU_SUBTYPE_SH7750R
132 bool "Support SH7750R processor" 129 bool "Support SH7750R processor"
133 select CPU_SH4 130 select CPU_SH4
134 select CPU_HAS_INTC_IRQ
135 131
136config CPU_SUBTYPE_SH7750S 132config CPU_SUBTYPE_SH7750S
137 bool "Support SH7750S processor" 133 bool "Support SH7750S processor"
138 select CPU_SH4 134 select CPU_SH4
139 select CPU_HAS_INTC_IRQ
140 135
141config CPU_SUBTYPE_SH7751 136config CPU_SUBTYPE_SH7751
142 bool "Support SH7751 processor" 137 bool "Support SH7751 processor"
143 select CPU_SH4 138 select CPU_SH4
144 select CPU_HAS_INTC_IRQ
145 help 139 help
146 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 140 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
147 or if you have a HD6417751R CPU. 141 or if you have a HD6417751R CPU.
@@ -149,13 +143,10 @@ config CPU_SUBTYPE_SH7751
149config CPU_SUBTYPE_SH7751R 143config CPU_SUBTYPE_SH7751R
150 bool "Support SH7751R processor" 144 bool "Support SH7751R processor"
151 select CPU_SH4 145 select CPU_SH4
152 select CPU_HAS_INTC_IRQ
153 146
154config CPU_SUBTYPE_SH7760 147config CPU_SUBTYPE_SH7760
155 bool "Support SH7760 processor" 148 bool "Support SH7760 processor"
156 select CPU_SH4 149 select CPU_SH4
157 select CPU_HAS_INTC2_IRQ
158 select CPU_HAS_IPR_IRQ
159 150
160config CPU_SUBTYPE_SH4_202 151config CPU_SUBTYPE_SH4_202
161 bool "Support SH4-202 processor" 152 bool "Support SH4-202 processor"
@@ -185,19 +176,21 @@ config CPU_SUBTYPE_SH7770
185config CPU_SUBTYPE_SH7780 176config CPU_SUBTYPE_SH7780
186 bool "Support SH7780 processor" 177 bool "Support SH7780 processor"
187 select CPU_SH4A 178 select CPU_SH4A
188 select CPU_HAS_INTC_IRQ
189 179
190config CPU_SUBTYPE_SH7785 180config CPU_SUBTYPE_SH7785
191 bool "Support SH7785 processor" 181 bool "Support SH7785 processor"
192 select CPU_SH4A 182 select CPU_SH4A
193 select CPU_SHX2 183 select CPU_SHX2
194 select CPU_HAS_INTC2_IRQ 184 select ARCH_SPARSEMEM_ENABLE
185 select SYS_SUPPORTS_NUMA
195 186
196config CPU_SUBTYPE_SHX3 187config CPU_SUBTYPE_SHX3
197 bool "Support SH-X3 processor" 188 bool "Support SH-X3 processor"
198 select CPU_SH4A 189 select CPU_SH4A
199 select CPU_SHX3 190 select CPU_SHX3
200 select CPU_HAS_INTC2_IRQ 191 select ARCH_SPARSEMEM_ENABLE
192 select SYS_SUPPORTS_NUMA
193 select SYS_SUPPORTS_SMP
201 194
202# SH4AL-DSP Processor Support 195# SH4AL-DSP Processor Support
203 196
@@ -209,7 +202,6 @@ config CPU_SUBTYPE_SH7722
209 bool "Support SH7722 processor" 202 bool "Support SH7722 processor"
210 select CPU_SH4AL_DSP 203 select CPU_SH4AL_DSP
211 select CPU_SHX2 204 select CPU_SHX2
212 select CPU_HAS_INTC_IRQ
213 select ARCH_SPARSEMEM_ENABLE 205 select ARCH_SPARSEMEM_ENABLE
214 select SYS_SUPPORTS_NUMA 206 select SYS_SUPPORTS_NUMA
215 207
@@ -274,7 +266,7 @@ config 32BIT
274 266
275config X2TLB 267config X2TLB
276 bool "Enable extended TLB mode" 268 bool "Enable extended TLB mode"
277 depends on CPU_SHX2 && MMU && EXPERIMENTAL 269 depends on (CPU_SHX2 || CPU_SHX3) && MMU && EXPERIMENTAL
278 help 270 help
279 Selecting this option will enable the extended mode of the SH-X2 271 Selecting this option will enable the extended mode of the SH-X2
280 TLB. For legacy SH-X behaviour and interoperability, say N. For 272 TLB. For legacy SH-X behaviour and interoperability, say N. For
@@ -307,6 +299,7 @@ config NUMA
307 299
308config NODES_SHIFT 300config NODES_SHIFT
309 int 301 int
302 default "3" if CPU_SUBTYPE_SHX3
310 default "1" 303 default "1"
311 depends on NEED_MULTIPLE_NODES 304 depends on NEED_MULTIPLE_NODES
312 305
@@ -323,7 +316,9 @@ config ARCH_SPARSEMEM_DEFAULT
323 316
324config MAX_ACTIVE_REGIONS 317config MAX_ACTIVE_REGIONS
325 int 318 int
326 default "2" if (CPU_SUBTYPE_SH7722 && SPARSEMEM) 319 default "6" if (CPU_SUBTYPE_SHX3 && SPARSEMEM)
320 default "2" if SPARSEMEM && (CPU_SUBTYPE_SH7722 || \
321 CPU_SUBTYPE_SH7785)
327 default "1" 322 default "1"
328 323
329config ARCH_POPULATES_NODE_MAP 324config ARCH_POPULATES_NODE_MAP
@@ -342,25 +337,27 @@ config ARCH_MEMORY_PROBE
342 337
343choice 338choice
344 prompt "Kernel page size" 339 prompt "Kernel page size"
340 default PAGE_SIZE_8KB if X2TLB
345 default PAGE_SIZE_4KB 341 default PAGE_SIZE_4KB
346 342
347config PAGE_SIZE_4KB 343config PAGE_SIZE_4KB
348 bool "4kB" 344 bool "4kB"
345 depends on !X2TLB
349 help 346 help
350 This is the default page size used by all SuperH CPUs. 347 This is the default page size used by all SuperH CPUs.
351 348
352config PAGE_SIZE_8KB 349config PAGE_SIZE_8KB
353 bool "8kB" 350 bool "8kB"
354 depends on EXPERIMENTAL && X2TLB 351 depends on X2TLB
355 help 352 help
356 This enables 8kB pages as supported by SH-X2 and later MMUs. 353 This enables 8kB pages as supported by SH-X2 and later MMUs.
357 354
358config PAGE_SIZE_64KB 355config PAGE_SIZE_64KB
359 bool "64kB" 356 bool "64kB"
360 depends on EXPERIMENTAL && CPU_SH4 357 depends on CPU_SH4
361 help 358 help
362 This enables support for 64kB pages, possible on all SH-4 359 This enables support for 64kB pages, possible on all SH-4
363 CPUs and later. Highly experimental, not recommended. 360 CPUs and later.
364 361
365endchoice 362endchoice
366 363
@@ -412,8 +409,17 @@ config SH_DIRECT_MAPPED
412 Turn this option off for platforms that do not have a direct-mapped 409 Turn this option off for platforms that do not have a direct-mapped
413 cache, and you have no need to run the caches in such a configuration. 410 cache, and you have no need to run the caches in such a configuration.
414 411
415config SH_WRITETHROUGH 412choice
416 bool "Use write-through caching" 413 prompt "Cache mode"
414 default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4
415 default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A)
416
417config CACHE_WRITEBACK
418 bool "Write-back"
419 depends on CPU_SH2A || CPU_SH3 || CPU_SH4
420
421config CACHE_WRITETHROUGH
422 bool "Write-through"
417 help 423 help
418 Selecting this option will configure the caches in write-through 424 Selecting this option will configure the caches in write-through
419 mode, as opposed to the default write-back configuration. 425 mode, as opposed to the default write-back configuration.
@@ -424,4 +430,9 @@ config SH_WRITETHROUGH
424 430
425 If unsure, say N. 431 If unsure, say N.
426 432
433config CACHE_OFF
434 bool "Off"
435
436endchoice
437
427endmenu 438endmenu
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index 4061e89d84d0..ee30fb44dfe1 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -4,29 +4,32 @@
4 4
5obj-y := init.o extable.o consistent.o 5obj-y := init.o extable.o consistent.o
6 6
7obj-$(CONFIG_CPU_SH2) += cache-sh2.o 7ifndef CONFIG_CACHE_OFF
8obj-$(CONFIG_CPU_SH3) += cache-sh3.o 8obj-$(CONFIG_CPU_SH2) += cache-sh2.o
9obj-$(CONFIG_CPU_SH4) += cache-sh4.o 9obj-$(CONFIG_CPU_SH3) += cache-sh3.o
10obj-$(CONFIG_CPU_SH4) += cache-sh4.o
11obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
12endif
10 13
11mmu-y := tlb-nommu.o pg-nommu.o 14mmu-y := tlb-nommu.o pg-nommu.o
12mmu-$(CONFIG_CPU_SH3) += fault-nommu.o
13mmu-$(CONFIG_CPU_SH4) += fault-nommu.o
14mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o \ 15mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o \
15 ioremap.o 16 ioremap.o
16 17
17obj-y += $(mmu-y) 18obj-y += $(mmu-y)
18 19
19ifdef CONFIG_DEBUG_FS 20ifdef CONFIG_DEBUG_FS
20obj-$(CONFIG_CPU_SH4) += cache-debugfs.o 21obj-$(CONFIG_CPU_SH4) += cache-debugfs.o
21endif 22endif
22 23
23ifdef CONFIG_MMU 24ifdef CONFIG_MMU
24obj-$(CONFIG_CPU_SH3) += tlb-sh3.o 25obj-$(CONFIG_CPU_SH3) += tlb-sh3.o
25obj-$(CONFIG_CPU_SH4) += tlb-sh4.o pg-sh4.o 26obj-$(CONFIG_CPU_SH4) += tlb-sh4.o
26obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o 27ifndef CONFIG_CACHE_OFF
28obj-$(CONFIG_CPU_SH4) += pg-sh4.o
29obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
30endif
27endif 31endif
28 32
29obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 33obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
30obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
31obj-$(CONFIG_32BIT) += pmb.o 34obj-$(CONFIG_32BIT) += pmb.o
32obj-$(CONFIG_NUMA) += numa.o 35obj-$(CONFIG_NUMA) += numa.o
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 86486326ef1d..226b190c5b9c 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -2,7 +2,7 @@
2 * arch/sh/mm/cache-sh4.c 2 * arch/sh/mm/cache-sh4.c
3 * 3 *
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2001 - 2006 Paul Mundt 5 * Copyright (C) 2001 - 2007 Paul Mundt
6 * Copyright (C) 2003 Richard Curnow 6 * Copyright (C) 2003 Richard Curnow
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
@@ -44,7 +44,7 @@ static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) =
44static void compute_alias(struct cache_info *c) 44static void compute_alias(struct cache_info *c)
45{ 45{
46 c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1); 46 c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1);
47 c->n_aliases = (c->alias_mask >> PAGE_SHIFT) + 1; 47 c->n_aliases = c->alias_mask ? (c->alias_mask >> PAGE_SHIFT) + 1 : 0;
48} 48}
49 49
50static void __init emit_cache_params(void) 50static void __init emit_cache_params(void)
@@ -54,21 +54,35 @@ static void __init emit_cache_params(void)
54 ctrl_inl(CCN_CVR), 54 ctrl_inl(CCN_CVR),
55 ctrl_inl(CCN_PRR)); 55 ctrl_inl(CCN_PRR));
56 printk("I-cache : n_ways=%d n_sets=%d way_incr=%d\n", 56 printk("I-cache : n_ways=%d n_sets=%d way_incr=%d\n",
57 current_cpu_data.icache.ways, 57 boot_cpu_data.icache.ways,
58 current_cpu_data.icache.sets, 58 boot_cpu_data.icache.sets,
59 current_cpu_data.icache.way_incr); 59 boot_cpu_data.icache.way_incr);
60 printk("I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", 60 printk("I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
61 current_cpu_data.icache.entry_mask, 61 boot_cpu_data.icache.entry_mask,
62 current_cpu_data.icache.alias_mask, 62 boot_cpu_data.icache.alias_mask,
63 current_cpu_data.icache.n_aliases); 63 boot_cpu_data.icache.n_aliases);
64 printk("D-cache : n_ways=%d n_sets=%d way_incr=%d\n", 64 printk("D-cache : n_ways=%d n_sets=%d way_incr=%d\n",
65 current_cpu_data.dcache.ways, 65 boot_cpu_data.dcache.ways,
66 current_cpu_data.dcache.sets, 66 boot_cpu_data.dcache.sets,
67 current_cpu_data.dcache.way_incr); 67 boot_cpu_data.dcache.way_incr);
68 printk("D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", 68 printk("D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
69 current_cpu_data.dcache.entry_mask, 69 boot_cpu_data.dcache.entry_mask,
70 current_cpu_data.dcache.alias_mask, 70 boot_cpu_data.dcache.alias_mask,
71 current_cpu_data.dcache.n_aliases); 71 boot_cpu_data.dcache.n_aliases);
72
73 /*
74 * Emit Secondary Cache parameters if the CPU has a probed L2.
75 */
76 if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
77 printk("S-cache : n_ways=%d n_sets=%d way_incr=%d\n",
78 boot_cpu_data.scache.ways,
79 boot_cpu_data.scache.sets,
80 boot_cpu_data.scache.way_incr);
81 printk("S-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
82 boot_cpu_data.scache.entry_mask,
83 boot_cpu_data.scache.alias_mask,
84 boot_cpu_data.scache.n_aliases);
85 }
72 86
73 if (!__flush_dcache_segment_fn) 87 if (!__flush_dcache_segment_fn)
74 panic("unknown number of cache ways\n"); 88 panic("unknown number of cache ways\n");
@@ -79,10 +93,11 @@ static void __init emit_cache_params(void)
79 */ 93 */
80void __init p3_cache_init(void) 94void __init p3_cache_init(void)
81{ 95{
82 compute_alias(&current_cpu_data.icache); 96 compute_alias(&boot_cpu_data.icache);
83 compute_alias(&current_cpu_data.dcache); 97 compute_alias(&boot_cpu_data.dcache);
98 compute_alias(&boot_cpu_data.scache);
84 99
85 switch (current_cpu_data.dcache.ways) { 100 switch (boot_cpu_data.dcache.ways) {
86 case 1: 101 case 1:
87 __flush_dcache_segment_fn = __flush_dcache_segment_1way; 102 __flush_dcache_segment_fn = __flush_dcache_segment_1way;
88 break; 103 break;
@@ -187,13 +202,13 @@ void flush_cache_sigtramp(unsigned long addr)
187 : "m" (__m(v))); 202 : "m" (__m(v)));
188 203
189 index = CACHE_IC_ADDRESS_ARRAY | 204 index = CACHE_IC_ADDRESS_ARRAY |
190 (v & current_cpu_data.icache.entry_mask); 205 (v & boot_cpu_data.icache.entry_mask);
191 206
192 local_irq_save(flags); 207 local_irq_save(flags);
193 jump_to_P2(); 208 jump_to_P2();
194 209
195 for (i = 0; i < current_cpu_data.icache.ways; 210 for (i = 0; i < boot_cpu_data.icache.ways;
196 i++, index += current_cpu_data.icache.way_incr) 211 i++, index += boot_cpu_data.icache.way_incr)
197 ctrl_outl(0, index); /* Clear out Valid-bit */ 212 ctrl_outl(0, index); /* Clear out Valid-bit */
198 213
199 back_to_P1(); 214 back_to_P1();
@@ -210,7 +225,7 @@ static inline void flush_cache_4096(unsigned long start,
210 * All types of SH-4 require PC to be in P2 to operate on the I-cache. 225 * All types of SH-4 require PC to be in P2 to operate on the I-cache.
211 * Some types of SH-4 require PC to be in P2 to operate on the D-cache. 226 * Some types of SH-4 require PC to be in P2 to operate on the D-cache.
212 */ 227 */
213 if ((current_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) || 228 if ((boot_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) ||
214 (start < CACHE_OC_ADDRESS_ARRAY)) 229 (start < CACHE_OC_ADDRESS_ARRAY))
215 exec_offset = 0x20000000; 230 exec_offset = 0x20000000;
216 231
@@ -232,7 +247,7 @@ void flush_dcache_page(struct page *page)
232 int i, n; 247 int i, n;
233 248
234 /* Loop all the D-cache */ 249 /* Loop all the D-cache */
235 n = current_cpu_data.dcache.n_aliases; 250 n = boot_cpu_data.dcache.n_aliases;
236 for (i = 0; i < n; i++, addr += 4096) 251 for (i = 0; i < n; i++, addr += 4096)
237 flush_cache_4096(addr, phys); 252 flush_cache_4096(addr, phys);
238 } 253 }
@@ -264,7 +279,7 @@ static inline void flush_icache_all(void)
264 279
265void flush_dcache_all(void) 280void flush_dcache_all(void)
266{ 281{
267 (*__flush_dcache_segment_fn)(0UL, current_cpu_data.dcache.way_size); 282 (*__flush_dcache_segment_fn)(0UL, boot_cpu_data.dcache.way_size);
268 wmb(); 283 wmb();
269} 284}
270 285
@@ -278,8 +293,8 @@ static void __flush_cache_mm(struct mm_struct *mm, unsigned long start,
278 unsigned long end) 293 unsigned long end)
279{ 294{
280 unsigned long d = 0, p = start & PAGE_MASK; 295 unsigned long d = 0, p = start & PAGE_MASK;
281 unsigned long alias_mask = current_cpu_data.dcache.alias_mask; 296 unsigned long alias_mask = boot_cpu_data.dcache.alias_mask;
282 unsigned long n_aliases = current_cpu_data.dcache.n_aliases; 297 unsigned long n_aliases = boot_cpu_data.dcache.n_aliases;
283 unsigned long select_bit; 298 unsigned long select_bit;
284 unsigned long all_aliases_mask; 299 unsigned long all_aliases_mask;
285 unsigned long addr_offset; 300 unsigned long addr_offset;
@@ -366,7 +381,7 @@ void flush_cache_mm(struct mm_struct *mm)
366 * If cache is only 4k-per-way, there are never any 'aliases'. Since 381 * If cache is only 4k-per-way, there are never any 'aliases'. Since
367 * the cache is physically tagged, the data can just be left in there. 382 * the cache is physically tagged, the data can just be left in there.
368 */ 383 */
369 if (current_cpu_data.dcache.n_aliases == 0) 384 if (boot_cpu_data.dcache.n_aliases == 0)
370 return; 385 return;
371 386
372 /* 387 /*
@@ -403,7 +418,7 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
403 unsigned long phys = pfn << PAGE_SHIFT; 418 unsigned long phys = pfn << PAGE_SHIFT;
404 unsigned int alias_mask; 419 unsigned int alias_mask;
405 420
406 alias_mask = current_cpu_data.dcache.alias_mask; 421 alias_mask = boot_cpu_data.dcache.alias_mask;
407 422
408 /* We only need to flush D-cache when we have alias */ 423 /* We only need to flush D-cache when we have alias */
409 if ((address^phys) & alias_mask) { 424 if ((address^phys) & alias_mask) {
@@ -417,7 +432,7 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
417 phys); 432 phys);
418 } 433 }
419 434
420 alias_mask = current_cpu_data.icache.alias_mask; 435 alias_mask = boot_cpu_data.icache.alias_mask;
421 if (vma->vm_flags & VM_EXEC) { 436 if (vma->vm_flags & VM_EXEC) {
422 /* 437 /*
423 * Evict entries from the portion of the cache from which code 438 * Evict entries from the portion of the cache from which code
@@ -449,7 +464,7 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
449 * If cache is only 4k-per-way, there are never any 'aliases'. Since 464 * If cache is only 4k-per-way, there are never any 'aliases'. Since
450 * the cache is physically tagged, the data can just be left in there. 465 * the cache is physically tagged, the data can just be left in there.
451 */ 466 */
452 if (current_cpu_data.dcache.n_aliases == 0) 467 if (boot_cpu_data.dcache.n_aliases == 0)
453 return; 468 return;
454 469
455 /* 470 /*
@@ -510,7 +525,7 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys,
510 unsigned long a, ea, p; 525 unsigned long a, ea, p;
511 unsigned long temp_pc; 526 unsigned long temp_pc;
512 527
513 dcache = &current_cpu_data.dcache; 528 dcache = &boot_cpu_data.dcache;
514 /* Write this way for better assembly. */ 529 /* Write this way for better assembly. */
515 way_count = dcache->ways; 530 way_count = dcache->ways;
516 way_incr = dcache->way_incr; 531 way_incr = dcache->way_incr;
@@ -585,7 +600,7 @@ static void __flush_dcache_segment_1way(unsigned long start,
585 base_addr = ((base_addr >> 16) << 16); 600 base_addr = ((base_addr >> 16) << 16);
586 base_addr |= start; 601 base_addr |= start;
587 602
588 dcache = &current_cpu_data.dcache; 603 dcache = &boot_cpu_data.dcache;
589 linesz = dcache->linesz; 604 linesz = dcache->linesz;
590 way_incr = dcache->way_incr; 605 way_incr = dcache->way_incr;
591 way_size = dcache->way_size; 606 way_size = dcache->way_size;
@@ -627,7 +642,7 @@ static void __flush_dcache_segment_2way(unsigned long start,
627 base_addr = ((base_addr >> 16) << 16); 642 base_addr = ((base_addr >> 16) << 16);
628 base_addr |= start; 643 base_addr |= start;
629 644
630 dcache = &current_cpu_data.dcache; 645 dcache = &boot_cpu_data.dcache;
631 linesz = dcache->linesz; 646 linesz = dcache->linesz;
632 way_incr = dcache->way_incr; 647 way_incr = dcache->way_incr;
633 way_size = dcache->way_size; 648 way_size = dcache->way_size;
@@ -686,7 +701,7 @@ static void __flush_dcache_segment_4way(unsigned long start,
686 base_addr = ((base_addr >> 16) << 16); 701 base_addr = ((base_addr >> 16) << 16);
687 base_addr |= start; 702 base_addr |= start;
688 703
689 dcache = &current_cpu_data.dcache; 704 dcache = &boot_cpu_data.dcache;
690 linesz = dcache->linesz; 705 linesz = dcache->linesz;
691 way_incr = dcache->way_incr; 706 way_incr = dcache->way_incr;
692 way_size = dcache->way_size; 707 way_size = dcache->way_size;
diff --git a/arch/sh/mm/copy_page.S b/arch/sh/mm/copy_page.S
index ae039f2da162..a81dbdb05596 100644
--- a/arch/sh/mm/copy_page.S
+++ b/arch/sh/mm/copy_page.S
@@ -141,47 +141,38 @@ ENTRY(__copy_user_page)
141 .long 9999b, 6000f ; \ 141 .long 9999b, 6000f ; \
142 .previous 142 .previous
143ENTRY(__copy_user) 143ENTRY(__copy_user)
144 tst r6,r6 ! Check explicitly for zero 144 ! Check if small number of bytes
145 bf 1f 145 mov #11,r0
146 rts
147 mov #0,r0 ! normal return
1481:
149 mov.l r10,@-r15
150 mov.l r9,@-r15
151 mov.l r8,@-r15
152 mov r4,r3 146 mov r4,r3
153 add r6,r3 ! last destination address 147 cmp/gt r0,r6 ! r6 (len) > r0 (11)
154 mov #12,r0 ! Check if small number of bytes 148 bf/s .L_cleanup_loop_no_pop
155 cmp/gt r0,r6 149 add r6,r3 ! last destination address
156 bt 2f 150
157 bra .L_cleanup_loop 151 ! Calculate bytes needed to align to src
158 nop 152 mov.l r11,@-r15
1592: 153 neg r5,r0
160 neg r5,r0 ! Calculate bytes needed to align source 154 mov.l r10,@-r15
161 add #4,r0 155 add #4,r0
156 mov.l r9,@-r15
162 and #3,r0 157 and #3,r0
158 mov.l r8,@-r15
163 tst r0,r0 159 tst r0,r0
164 bt .L_jump 160 bt 2f
165 mov r0,r1
166 161
167.L_loop1: 1621:
168 ! Copy bytes to align source 163 ! Copy bytes to long word align src
169EX( mov.b @r5+,r0 ) 164EX( mov.b @r5+,r1 )
170 dt r1 165 dt r0
171EX( mov.b r0,@r4 )
172 add #-1,r6 166 add #-1,r6
173 bf/s .L_loop1 167EX( mov.b r1,@r4 )
168 bf/s 1b
174 add #1,r4 169 add #1,r4
175 170
176.L_jump: 171 ! Jump to appropriate routine depending on dest
177 mov r6,r2 ! Calculate number of longwords to copy 1722: mov #3,r1
173 mov r6, r2
174 and r4,r1
178 shlr2 r2 175 shlr2 r2
179 tst r2,r2
180 bt .L_cleanup
181
182 mov r4,r0 ! Jump to appropriate routine
183 and #3,r0
184 mov r0,r1
185 shll2 r1 176 shll2 r1
186 mova .L_jump_tbl,r0 177 mova .L_jump_tbl,r0
187 mov.l @(r0,r1),r1 178 mov.l @(r0,r1),r1
@@ -195,43 +186,97 @@ EX( mov.b r0,@r4 )
195 .long .L_dest10 186 .long .L_dest10
196 .long .L_dest11 187 .long .L_dest11
197 188
189/*
190 * Come here if there are less than 12 bytes to copy
191 *
192 * Keep the branch target close, so the bf/s callee doesn't overflow
193 * and result in a more expensive branch being inserted. This is the
194 * fast-path for small copies, the jump via the jump table will hit the
195 * default slow-path cleanup. -PFM.
196 */
197.L_cleanup_loop_no_pop:
198 tst r6,r6 ! Check explicitly for zero
199 bt 1f
200
2012:
202EX( mov.b @r5+,r0 )
203 dt r6
204EX( mov.b r0,@r4 )
205 bf/s 2b
206 add #1,r4
207
2081: mov #0,r0 ! normal return
2095000:
210
211# Exception handler:
212.section .fixup, "ax"
2136000:
214 mov.l 8000f,r1
215 mov r3,r0
216 jmp @r1
217 sub r4,r0
218 .align 2
2198000: .long 5000b
220
221.previous
222 rts
223 nop
224
198! Destination = 00 225! Destination = 00
199 226
200.L_dest00: 227.L_dest00:
201 mov r2,r7 228 ! Skip the large copy for small transfers
202 shlr2 r7 229 mov #(32+32-4), r0
203 shlr r7 230 cmp/gt r6, r0 ! r0 (60) > r6 (len)
204 tst r7,r7 231 bt 1f
205 mov #7,r0 232
206 bt/s 1f 233 ! Align dest to a 32 byte boundary
207 and r0,r2 234 neg r4,r0
208 .align 2 235 add #0x20, r0
236 and #0x1f, r0
237 tst r0, r0
238 bt 2f
239
240 sub r0, r6
241 shlr2 r0
2423:
243EX( mov.l @r5+,r1 )
244 dt r0
245EX( mov.l r1,@r4 )
246 bf/s 3b
247 add #4,r4
248
2092: 2492:
210EX( mov.l @r5+,r0 ) 250EX( mov.l @r5+,r0 )
251EX( mov.l @r5+,r1 )
252EX( mov.l @r5+,r2 )
253EX( mov.l @r5+,r7 )
211EX( mov.l @r5+,r8 ) 254EX( mov.l @r5+,r8 )
212EX( mov.l @r5+,r9 ) 255EX( mov.l @r5+,r9 )
213EX( mov.l @r5+,r10 ) 256EX( mov.l @r5+,r10 )
214EX( mov.l r0,@r4 ) 257EX( mov.l @r5+,r11 )
215EX( mov.l r8,@(4,r4) ) 258EX( movca.l r0,@r4 )
216EX( mov.l r9,@(8,r4) ) 259 add #-32, r6
217EX( mov.l r10,@(12,r4) ) 260EX( mov.l r1,@(4,r4) )
218EX( mov.l @r5+,r0 ) 261 mov #32, r0
219EX( mov.l @r5+,r8 ) 262EX( mov.l r2,@(8,r4) )
220EX( mov.l @r5+,r9 ) 263 cmp/gt r6, r0 ! r0 (32) > r6 (len)
221EX( mov.l @r5+,r10 ) 264EX( mov.l r7,@(12,r4) )
222 dt r7 265EX( mov.l r8,@(16,r4) )
223EX( mov.l r0,@(16,r4) ) 266EX( mov.l r9,@(20,r4) )
224EX( mov.l r8,@(20,r4) ) 267EX( mov.l r10,@(24,r4) )
225EX( mov.l r9,@(24,r4) ) 268EX( mov.l r11,@(28,r4) )
226EX( mov.l r10,@(28,r4) )
227 bf/s 2b 269 bf/s 2b
228 add #32,r4 270 add #32,r4
229 tst r2,r2 271
2721: mov r6, r0
273 shlr2 r0
274 tst r0, r0
230 bt .L_cleanup 275 bt .L_cleanup
2311: 2761:
232EX( mov.l @r5+,r0 ) 277EX( mov.l @r5+,r1 )
233 dt r2 278 dt r0
234EX( mov.l r0,@r4 ) 279EX( mov.l r1,@r4 )
235 bf/s 1b 280 bf/s 1b
236 add #4,r4 281 add #4,r4
237 282
@@ -250,7 +295,7 @@ EX( mov.l r0,@r4 )
250 and r0,r2 295 and r0,r2
2512: 2962:
252 dt r7 297 dt r7
253#ifdef __LITTLE_ENDIAN__ 298#ifdef CONFIG_CPU_LITTLE_ENDIAN
254EX( mov.l @r5+,r0 ) 299EX( mov.l @r5+,r0 )
255EX( mov.l @r5+,r1 ) 300EX( mov.l @r5+,r1 )
256EX( mov.l @r5+,r8 ) 301EX( mov.l @r5+,r8 )
@@ -320,7 +365,7 @@ EX( mov.w r0,@(2,r4) )
3201: ! Read longword, write two words per iteration 3651: ! Read longword, write two words per iteration
321EX( mov.l @r5+,r0 ) 366EX( mov.l @r5+,r0 )
322 dt r2 367 dt r2
323#ifdef __LITTLE_ENDIAN__ 368#ifdef CONFIG_CPU_LITTLE_ENDIAN
324EX( mov.w r0,@r4 ) 369EX( mov.w r0,@r4 )
325 shlr16 r0 370 shlr16 r0
326EX( mov.w r0,@(2,r4) ) 371EX( mov.w r0,@(2,r4) )
@@ -342,7 +387,7 @@ EX( mov.w r0,@r4 )
342 ! Read longword, write byte, word, byte per iteration 387 ! Read longword, write byte, word, byte per iteration
343EX( mov.l @r5+,r0 ) 388EX( mov.l @r5+,r0 )
344 dt r2 389 dt r2
345#ifdef __LITTLE_ENDIAN__ 390#ifdef CONFIG_CPU_LITTLE_ENDIAN
346EX( mov.b r0,@r4 ) 391EX( mov.b r0,@r4 )
347 shlr8 r0 392 shlr8 r0
348 add #1,r4 393 add #1,r4
@@ -379,6 +424,7 @@ EX( mov.b r0,@r4 )
379 424
380.L_exit: 425.L_exit:
381 mov #0,r0 ! normal return 426 mov #0,r0 ! normal return
427
3825000: 4285000:
383 429
384# Exception handler: 430# Exception handler:
@@ -394,5 +440,6 @@ EX( mov.b r0,@r4 )
394.previous 440.previous
395 mov.l @r15+,r8 441 mov.l @r15+,r8
396 mov.l @r15+,r9 442 mov.l @r15+,r9
443 mov.l @r15+,r10
397 rts 444 rts
398 mov.l @r15+,r10 445 mov.l @r15+,r11
diff --git a/arch/sh/mm/fault-nommu.c b/arch/sh/mm/fault-nommu.c
deleted file mode 100644
index c6f5b51ec2c7..000000000000
--- a/arch/sh/mm/fault-nommu.c
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * arch/sh/mm/fault-nommu.c
3 *
4 * Copyright (C) 2002 - 2007 Paul Mundt
5 *
6 * Based on linux/arch/sh/mm/fault.c:
7 * Copyright (C) 1999 Niibe Yutaka
8 *
9 * Released under the terms of the GNU GPL v2.0.
10 */
11#include <linux/kernel.h>
12#include <linux/mm.h>
13#include <linux/hardirq.h>
14#include <linux/kprobes.h>
15#include <asm/system.h>
16#include <asm/ptrace.h>
17#include <asm/kgdb.h>
18
19/*
20 * This routine handles page faults. It determines the address,
21 * and the problem, and then passes it off to one of the appropriate
22 * routines.
23 */
24asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
25 unsigned long writeaccess,
26 unsigned long address)
27{
28 trace_hardirqs_on();
29 local_irq_enable();
30
31#if defined(CONFIG_SH_KGDB)
32 if (kgdb_nofault && kgdb_bus_err_hook)
33 kgdb_bus_err_hook();
34#endif
35
36 /*
37 * Oops. The kernel tried to access some bad page. We'll have to
38 * terminate things with extreme prejudice.
39 *
40 */
41 if (address < PAGE_SIZE) {
42 printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
43 } else {
44 printk(KERN_ALERT "Unable to handle kernel paging request");
45 }
46
47 printk(" at virtual address %08lx\n", address);
48 printk(KERN_ALERT "pc = %08lx\n", regs->pc);
49
50 die("Oops", regs, writeaccess);
51 do_exit(SIGKILL);
52}
53
54asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
55 unsigned long writeaccess,
56 unsigned long address)
57{
58#if defined(CONFIG_SH_KGDB)
59 if (kgdb_nofault && kgdb_bus_err_hook)
60 kgdb_bus_err_hook();
61#endif
62
63 return (address >= TASK_SIZE);
64}
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index a08a4a958add..7d43758dc244 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -145,7 +145,7 @@ repeat:
145 145
146 ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos)); 146 ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos));
147 147
148#ifdef CONFIG_SH_WRITETHROUGH 148#ifdef CONFIG_CACHE_WRITETHROUGH
149 /* 149 /*
150 * When we are in 32-bit address extended mode, CCR.CB becomes 150 * When we are in 32-bit address extended mode, CCR.CB becomes
151 * invalid, so care must be taken to manually adjust cacheable 151 * invalid, so care must be taken to manually adjust cacheable
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index f74cf667c8fa..2d1dd6044307 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -4,27 +4,14 @@
4 * SH-4 specific TLB operations 4 * SH-4 specific TLB operations
5 * 5 *
6 * Copyright (C) 1999 Niibe Yutaka 6 * Copyright (C) 1999 Niibe Yutaka
7 * Copyright (C) 2002 Paul Mundt 7 * Copyright (C) 2002 - 2007 Paul Mundt
8 * 8 *
9 * Released under the terms of the GNU GPL v2.0. 9 * Released under the terms of the GNU GPL v2.0.
10 */ 10 */
11#include <linux/signal.h>
12#include <linux/sched.h>
13#include <linux/kernel.h> 11#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/string.h>
16#include <linux/types.h>
17#include <linux/ptrace.h>
18#include <linux/mman.h>
19#include <linux/mm.h> 12#include <linux/mm.h>
20#include <linux/smp.h> 13#include <linux/io.h>
21#include <linux/smp_lock.h>
22#include <linux/interrupt.h>
23
24#include <asm/system.h> 14#include <asm/system.h>
25#include <asm/io.h>
26#include <asm/uaccess.h>
27#include <asm/pgalloc.h>
28#include <asm/mmu_context.h> 15#include <asm/mmu_context.h>
29#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
30 17
@@ -34,22 +21,27 @@ void update_mmu_cache(struct vm_area_struct * vma,
34 unsigned long flags; 21 unsigned long flags;
35 unsigned long pteval; 22 unsigned long pteval;
36 unsigned long vpn; 23 unsigned long vpn;
37 struct page *page;
38 unsigned long pfn;
39 24
40 /* Ptrace may call this routine. */ 25 /* Ptrace may call this routine. */
41 if (vma && current->active_mm != vma->vm_mm) 26 if (vma && current->active_mm != vma->vm_mm)
42 return; 27 return;
43 28
44 pfn = pte_pfn(pte); 29#ifndef CONFIG_CACHE_OFF
45 if (pfn_valid(pfn)) { 30 {
46 page = pfn_to_page(pfn); 31 unsigned long pfn = pte_pfn(pte);
47 if (!test_bit(PG_mapped, &page->flags)) { 32
48 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; 33 if (pfn_valid(pfn)) {
49 __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE); 34 struct page *page = pfn_to_page(pfn);
50 __set_bit(PG_mapped, &page->flags); 35
36 if (!test_bit(PG_mapped, &page->flags)) {
37 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
38 __flush_wback_region((void *)P1SEGADDR(phys),
39 PAGE_SIZE);
40 __set_bit(PG_mapped, &page->flags);
41 }
51 } 42 }
52 } 43 }
44#endif
53 45
54 local_irq_save(flags); 46 local_irq_save(flags);
55 47
@@ -57,16 +49,26 @@ void update_mmu_cache(struct vm_area_struct * vma,
57 vpn = (address & MMU_VPN_MASK) | get_asid(); 49 vpn = (address & MMU_VPN_MASK) | get_asid();
58 ctrl_outl(vpn, MMU_PTEH); 50 ctrl_outl(vpn, MMU_PTEH);
59 51
60 pteval = pte_val(pte); 52 pteval = pte.pte_low;
61 53
62 /* Set PTEA register */ 54 /* Set PTEA register */
55#ifdef CONFIG_X2TLB
56 /*
57 * For the extended mode TLB this is trivial, only the ESZ and
58 * EPR bits need to be written out to PTEA, with the remainder of
59 * the protection bits (with the exception of the compat-mode SZ
60 * and PR bits, which are cleared) being written out in PTEL.
61 */
62 ctrl_outl(pte.pte_high, MMU_PTEA);
63#else
63 if (cpu_data->flags & CPU_HAS_PTEA) 64 if (cpu_data->flags & CPU_HAS_PTEA)
64 /* TODO: make this look less hacky */ 65 /* TODO: make this look less hacky */
65 ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA); 66 ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
67#endif
66 68
67 /* Set PTEL register */ 69 /* Set PTEL register */
68 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ 70 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
69#ifdef CONFIG_SH_WRITETHROUGH 71#ifdef CONFIG_CACHE_WRITETHROUGH
70 pteval |= _PAGE_WT; 72 pteval |= _PAGE_WT;
71#endif 73#endif
72 /* conveniently, we want all the software flags to be 0 anyway */ 74 /* conveniently, we want all the software flags to be 0 anyway */
@@ -93,4 +95,3 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
93 ctrl_outl(data, addr); 95 ctrl_outl(data, addr);
94 back_to_P1(); 96 back_to_P1();
95} 97}
96
diff --git a/arch/sh64/Kconfig b/arch/sh64/Kconfig
index 5664631d8ae5..b3327ce8e82f 100644
--- a/arch/sh64/Kconfig
+++ b/arch/sh64/Kconfig
@@ -36,6 +36,14 @@ config GENERIC_CALIBRATE_DELAY
36 bool 36 bool
37 default y 37 default y
38 38
39config GENERIC_HARDIRQS
40 bool
41 default y
42
43config GENERIC_IRQ_PROBE
44 bool
45 default y
46
39config RWSEM_XCHGADD_ALGORITHM 47config RWSEM_XCHGADD_ALGORITHM
40 bool 48 bool
41 49
@@ -58,18 +66,12 @@ choice
58 prompt "SuperH system type" 66 prompt "SuperH system type"
59 default SH_SIMULATOR 67 default SH_SIMULATOR
60 68
61config SH_GENERIC
62 bool "Generic"
63
64config SH_SIMULATOR 69config SH_SIMULATOR
65 bool "Simulator" 70 bool "Simulator"
66 71
67config SH_CAYMAN 72config SH_CAYMAN
68 bool "Cayman" 73 bool "Cayman"
69 74
70config SH_ROMRAM
71 bool "ROM/RAM"
72
73config SH_HARP 75config SH_HARP
74 bool "ST50-Harp" 76 bool "ST50-Harp"
75 77
@@ -152,60 +154,54 @@ comment "Memory options"
152 154
153config CACHED_MEMORY_OFFSET 155config CACHED_MEMORY_OFFSET
154 hex "Cached Area Offset" 156 hex "Cached Area Offset"
155 depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
156 default "20000000" 157 default "20000000"
157 158
158config MEMORY_START 159config MEMORY_START
159 hex "Physical memory start address" 160 hex "Physical memory start address"
160 depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
161 default "80000000" 161 default "80000000"
162 162
163config MEMORY_SIZE_IN_MB 163config MEMORY_SIZE_IN_MB
164 int "Memory size (in MB)" if SH_HARP || SH_CAYMAN || SH_SIMULATOR 164 int "Memory size (in MB)"
165 default "64" if SH_HARP || SH_CAYMAN
166 default "8" if SH_SIMULATOR 165 default "8" if SH_SIMULATOR
166 default "64"
167 167
168comment "Cache options" 168comment "Cache options"
169 169
170config DCACHE_DISABLED
171 bool "DCache Disabling"
172 depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
173
174choice 170choice
175 prompt "DCache mode" 171 prompt "DCache mode"
176 depends on !DCACHE_DISABLED && !SH_SIMULATOR 172 default DCACHE_DISABLED if SH_SIMULATOR
177 default DCACHE_WRITE_BACK 173 default DCACHE_WRITE_BACK
178 174
179config DCACHE_WRITE_BACK 175config DCACHE_WRITE_BACK
180 bool "Write-back" 176 bool "Write-back"
177 depends on !SH_SIMULATOR
181 178
182config DCACHE_WRITE_THROUGH 179config DCACHE_WRITE_THROUGH
183 bool "Write-through" 180 bool "Write-through"
181 depends on !SH_SIMULATOR
182
183config DCACHE_DISABLED
184 bool "Disabled"
184 185
185endchoice 186endchoice
186 187
187config ICACHE_DISABLED 188config ICACHE_DISABLED
188 bool "ICache Disabling" 189 bool "ICache Disabling"
189 depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
190 190
191config PCIDEVICE_MEMORY_START 191config PCIDEVICE_MEMORY_START
192 hex 192 hex
193 depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
194 default "C0000000" 193 default "C0000000"
195 194
196config DEVICE_MEMORY_START 195config DEVICE_MEMORY_START
197 hex 196 hex
198 depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
199 default "E0000000" 197 default "E0000000"
200 198
201config FLASH_MEMORY_START 199config FLASH_MEMORY_START
202 hex "Flash memory/on-chip devices start address" 200 hex "Flash memory/on-chip devices start address"
203 depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
204 default "00000000" 201 default "00000000"
205 202
206config PCI_BLOCK_START 203config PCI_BLOCK_START
207 hex "PCI block start address" 204 hex "PCI block start address"
208 depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
209 default "40000000" 205 default "40000000"
210 206
211comment "CPU Subtype specific options" 207comment "CPU Subtype specific options"
@@ -214,8 +210,10 @@ config SH64_ID2815_WORKAROUND
214 bool "Include workaround for SH5-101 cut2 silicon defect ID2815" 210 bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
215 211
216comment "Misc options" 212comment "Misc options"
213
217config HEARTBEAT 214config HEARTBEAT
218 bool "Heartbeat LED" 215 bool "Heartbeat LED"
216 depends on SH_CAYMAN
219 217
220config HDSP253_LED 218config HDSP253_LED
221 bool "Support for HDSP-253 LED" 219 bool "Support for HDSP-253 LED"
@@ -242,6 +240,7 @@ config SBUS
242 240
243config PCI 241config PCI
244 bool "PCI support" 242 bool "PCI support"
243 depends on SH_CAYMAN
245 help 244 help
246 Find out whether you have a PCI motherboard. PCI is the name of a 245 Find out whether you have a PCI motherboard. PCI is the name of a
247 bus system, i.e. the way the CPU talks to the other stuff inside 246 bus system, i.e. the way the CPU talks to the other stuff inside
@@ -294,15 +293,3 @@ source "security/Kconfig"
294source "crypto/Kconfig" 293source "crypto/Kconfig"
295 294
296source "lib/Kconfig" 295source "lib/Kconfig"
297
298#
299# Use the generic interrupt handling code in kernel/irq/:
300#
301config GENERIC_HARDIRQS
302 bool
303 default y
304
305config GENERIC_IRQ_PROBE
306 bool
307 default y
308
diff --git a/arch/sh64/Kconfig.debug b/arch/sh64/Kconfig.debug
index 26d842c07139..05c07c4e4ed6 100644
--- a/arch/sh64/Kconfig.debug
+++ b/arch/sh64/Kconfig.debug
@@ -5,9 +5,6 @@ source "lib/Kconfig.debug"
5config EARLY_PRINTK 5config EARLY_PRINTK
6 bool "Early SCIF console support" 6 bool "Early SCIF console support"
7 7
8config DEBUG_KERNEL_WITH_GDB_STUB
9 bool "GDB Stub kernel debug"
10
11config SH64_PROC_TLB 8config SH64_PROC_TLB
12 bool "Debug: report TLB fill/purge activity through /proc/tlb" 9 bool "Debug: report TLB fill/purge activity through /proc/tlb"
13 depends on PROC_FS 10 depends on PROC_FS
@@ -28,17 +25,9 @@ config POOR_MANS_STRACE
28 25
29config SH_ALPHANUMERIC 26config SH_ALPHANUMERIC
30 bool "Enable debug outputs to on-board alphanumeric display" 27 bool "Enable debug outputs to on-board alphanumeric display"
28 depends on SH_CAYMAN
31 29
32config SH_NO_BSS_INIT 30config SH_NO_BSS_INIT
33 bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)" 31 bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
34 32
35config FRAME_POINTER
36 bool "Compile the kernel with frame pointers"
37 default y if KGDB
38 help
39 If you say Y here the resulting kernel image will be slightly larger
40 and slower, but it will give very useful debugging information.
41 If you don't debug the kernel, you can say N, but we may not be able
42 to solve problems without frame pointers.
43
44endmenu 33endmenu
diff --git a/arch/sh64/Makefile b/arch/sh64/Makefile
index ebf20043991c..8290c6380d7d 100644
--- a/arch/sh64/Makefile
+++ b/arch/sh64/Makefile
@@ -40,6 +40,8 @@ OBJCOPYFLAGS := -O binary -R .note -R .comment -R .stab -R .stabstr -S
40# 40#
41KBUILD_DEFCONFIG := cayman_defconfig 41KBUILD_DEFCONFIG := cayman_defconfig
42 42
43KBUILD_IMAGE := arch/$(ARCH)/boot/zImage
44
43ifdef LOADADDR 45ifdef LOADADDR
44LINKFLAGS += -Ttext $(word 1,$(LOADADDR)) 46LINKFLAGS += -Ttext $(word 1,$(LOADADDR))
45endif 47endif
@@ -47,7 +49,6 @@ endif
47machine-$(CONFIG_SH_CAYMAN) := cayman 49machine-$(CONFIG_SH_CAYMAN) := cayman
48machine-$(CONFIG_SH_SIMULATOR) := sim 50machine-$(CONFIG_SH_SIMULATOR) := sim
49machine-$(CONFIG_SH_HARP) := harp 51machine-$(CONFIG_SH_HARP) := harp
50machine-$(CONFIG_SH_ROMRAM) := romram
51 52
52head-y := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o 53head-y := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o
53 54
@@ -106,6 +107,5 @@ arch/$(ARCH)/lib/syscalltab.h: arch/sh64/kernel/syscalls.S
106CLEAN_FILES += arch/$(ARCH)/lib/syscalltab.h 107CLEAN_FILES += arch/$(ARCH)/lib/syscalltab.h
107 108
108define archhelp 109define archhelp
109 @echo ' zImage - Compressed kernel image (arch/sh64/boot/zImage)' 110 @echo '* zImage - Compressed kernel image'
110endef 111endef
111
diff --git a/arch/sh64/configs/cayman_defconfig b/arch/sh64/configs/cayman_defconfig
index 784434143343..91b59118c1b1 100644
--- a/arch/sh64/configs/cayman_defconfig
+++ b/arch/sh64/configs/cayman_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22 3# Linux kernel version: 2.6.23-rc8
4# Fri Jul 20 12:28:34 2007 4# Tue Oct 9 15:37:16 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH64=y 7CONFIG_SUPERH64=y
@@ -11,21 +11,20 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y 11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y 12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y 13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y
14# CONFIG_ARCH_HAS_ILOG2_U32 is not set 16# CONFIG_ARCH_HAS_ILOG2_U32 is not set
15# CONFIG_ARCH_HAS_ILOG2_U64 is not set 17# CONFIG_ARCH_HAS_ILOG2_U64 is not set
18CONFIG_ARCH_NO_VIRT_TO_BUS=y
16CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
17 20
18# 21#
19# Code maturity level options 22# General setup
20# 23#
21CONFIG_EXPERIMENTAL=y 24CONFIG_EXPERIMENTAL=y
22CONFIG_BROKEN_ON_SMP=y 25CONFIG_BROKEN_ON_SMP=y
23CONFIG_LOCK_KERNEL=y 26CONFIG_LOCK_KERNEL=y
24CONFIG_INIT_ENV_ARG_LIMIT=32 27CONFIG_INIT_ENV_ARG_LIMIT=32
25
26#
27# General setup
28#
29CONFIG_LOCALVERSION="" 28CONFIG_LOCALVERSION=""
30CONFIG_LOCALVERSION_AUTO=y 29CONFIG_LOCALVERSION_AUTO=y
31CONFIG_SWAP=y 30CONFIG_SWAP=y
@@ -57,7 +56,6 @@ CONFIG_FUTEX=y
57CONFIG_ANON_INODES=y 56CONFIG_ANON_INODES=y
58CONFIG_EPOLL=y 57CONFIG_EPOLL=y
59CONFIG_SIGNALFD=y 58CONFIG_SIGNALFD=y
60CONFIG_TIMERFD=y
61CONFIG_EVENTFD=y 59CONFIG_EVENTFD=y
62CONFIG_SHMEM=y 60CONFIG_SHMEM=y
63CONFIG_VM_EVENT_COUNTERS=y 61CONFIG_VM_EVENT_COUNTERS=y
@@ -67,7 +65,12 @@ CONFIG_SLAB=y
67CONFIG_RT_MUTEXES=y 65CONFIG_RT_MUTEXES=y
68# CONFIG_TINY_SHMEM is not set 66# CONFIG_TINY_SHMEM is not set
69CONFIG_BASE_SMALL=0 67CONFIG_BASE_SMALL=0
70# CONFIG_MODULES is not set 68CONFIG_MODULES=y
69CONFIG_MODULE_UNLOAD=y
70# CONFIG_MODULE_FORCE_UNLOAD is not set
71# CONFIG_MODVERSIONS is not set
72# CONFIG_MODULE_SRCVERSION_ALL is not set
73CONFIG_KMOD=y
71CONFIG_BLOCK=y 74CONFIG_BLOCK=y
72# CONFIG_LBD is not set 75# CONFIG_LBD is not set
73# CONFIG_BLK_DEV_IO_TRACE is not set 76# CONFIG_BLK_DEV_IO_TRACE is not set
@@ -90,10 +93,8 @@ CONFIG_DEFAULT_IOSCHED="cfq"
90# 93#
91# System type 94# System type
92# 95#
93# CONFIG_SH_GENERIC is not set
94# CONFIG_SH_SIMULATOR is not set 96# CONFIG_SH_SIMULATOR is not set
95CONFIG_SH_CAYMAN=y 97CONFIG_SH_CAYMAN=y
96# CONFIG_SH_ROMRAM is not set
97# CONFIG_SH_HARP is not set 98# CONFIG_SH_HARP is not set
98CONFIG_CPU_SH5=y 99CONFIG_CPU_SH5=y
99CONFIG_CPU_SUBTYPE_SH5_101=y 100CONFIG_CPU_SUBTYPE_SH5_101=y
@@ -119,9 +120,9 @@ CONFIG_MEMORY_SIZE_IN_MB=128
119# 120#
120# Cache options 121# Cache options
121# 122#
122# CONFIG_DCACHE_DISABLED is not set
123CONFIG_DCACHE_WRITE_BACK=y 123CONFIG_DCACHE_WRITE_BACK=y
124# CONFIG_DCACHE_WRITE_THROUGH is not set 124# CONFIG_DCACHE_WRITE_THROUGH is not set
125# CONFIG_DCACHE_DISABLED is not set
125# CONFIG_ICACHE_DISABLED is not set 126# CONFIG_ICACHE_DISABLED is not set
126CONFIG_PCIDEVICE_MEMORY_START=C0000000 127CONFIG_PCIDEVICE_MEMORY_START=C0000000
127CONFIG_DEVICE_MEMORY_START=E0000000 128CONFIG_DEVICE_MEMORY_START=E0000000
@@ -151,7 +152,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
151# CONFIG_RESOURCES_64BIT is not set 152# CONFIG_RESOURCES_64BIT is not set
152CONFIG_ZONE_DMA_FLAG=0 153CONFIG_ZONE_DMA_FLAG=0
153CONFIG_NR_QUICK=1 154CONFIG_NR_QUICK=1
154CONFIG_VIRT_TO_BUS=y
155 155
156# 156#
157# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 157# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
@@ -276,7 +276,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
276# CONFIG_MTD is not set 276# CONFIG_MTD is not set
277# CONFIG_PARPORT is not set 277# CONFIG_PARPORT is not set
278CONFIG_BLK_DEV=y 278CONFIG_BLK_DEV=y
279# CONFIG_BLK_CPQ_DA is not set
280# CONFIG_BLK_CPQ_CISS_DA is not set 279# CONFIG_BLK_CPQ_CISS_DA is not set
281# CONFIG_BLK_DEV_DAC960 is not set 280# CONFIG_BLK_DEV_DAC960 is not set
282# CONFIG_BLK_DEV_UMEM is not set 281# CONFIG_BLK_DEV_UMEM is not set
@@ -325,6 +324,7 @@ CONFIG_SCSI_MULTI_LUN=y
325# CONFIG_SCSI_CONSTANTS is not set 324# CONFIG_SCSI_CONSTANTS is not set
326# CONFIG_SCSI_LOGGING is not set 325# CONFIG_SCSI_LOGGING is not set
327# CONFIG_SCSI_SCAN_ASYNC is not set 326# CONFIG_SCSI_SCAN_ASYNC is not set
327CONFIG_SCSI_WAIT_SCAN=m
328 328
329# 329#
330# SCSI Transports 330# SCSI Transports
@@ -332,12 +332,8 @@ CONFIG_SCSI_MULTI_LUN=y
332CONFIG_SCSI_SPI_ATTRS=y 332CONFIG_SCSI_SPI_ATTRS=y
333# CONFIG_SCSI_FC_ATTRS is not set 333# CONFIG_SCSI_FC_ATTRS is not set
334# CONFIG_SCSI_ISCSI_ATTRS is not set 334# CONFIG_SCSI_ISCSI_ATTRS is not set
335# CONFIG_SCSI_SAS_ATTRS is not set
336# CONFIG_SCSI_SAS_LIBSAS is not set 335# CONFIG_SCSI_SAS_LIBSAS is not set
337 336CONFIG_SCSI_LOWLEVEL=y
338#
339# SCSI low-level drivers
340#
341# CONFIG_ISCSI_TCP is not set 337# CONFIG_ISCSI_TCP is not set
342# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 338# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
343# CONFIG_SCSI_3W_9XXX is not set 339# CONFIG_SCSI_3W_9XXX is not set
@@ -347,7 +343,6 @@ CONFIG_SCSI_SPI_ATTRS=y
347# CONFIG_SCSI_AIC7XXX_OLD is not set 343# CONFIG_SCSI_AIC7XXX_OLD is not set
348# CONFIG_SCSI_AIC79XX is not set 344# CONFIG_SCSI_AIC79XX is not set
349# CONFIG_SCSI_AIC94XX is not set 345# CONFIG_SCSI_AIC94XX is not set
350# CONFIG_SCSI_DPT_I2O is not set
351# CONFIG_SCSI_ARCMSR is not set 346# CONFIG_SCSI_ARCMSR is not set
352# CONFIG_MEGARAID_NEWGEN is not set 347# CONFIG_MEGARAID_NEWGEN is not set
353# CONFIG_MEGARAID_LEGACY is not set 348# CONFIG_MEGARAID_LEGACY is not set
@@ -449,6 +444,7 @@ CONFIG_NETDEV_1000=y
449# CONFIG_SIS190 is not set 444# CONFIG_SIS190 is not set
450# CONFIG_SKGE is not set 445# CONFIG_SKGE is not set
451# CONFIG_SKY2 is not set 446# CONFIG_SKY2 is not set
447# CONFIG_SK98LIN is not set
452# CONFIG_VIA_VELOCITY is not set 448# CONFIG_VIA_VELOCITY is not set
453# CONFIG_TIGON3 is not set 449# CONFIG_TIGON3 is not set
454# CONFIG_BNX2 is not set 450# CONFIG_BNX2 is not set
@@ -572,7 +568,6 @@ CONFIG_WATCHDOG=y
572# Watchdog Device Drivers 568# Watchdog Device Drivers
573# 569#
574# CONFIG_SOFT_WATCHDOG is not set 570# CONFIG_SOFT_WATCHDOG is not set
575# CONFIG_SH_WDT is not set
576 571
577# 572#
578# PCI-based Watchdog Cards 573# PCI-based Watchdog Cards
@@ -586,7 +581,59 @@ CONFIG_HW_RANDOM=y
586# CONFIG_RAW_DRIVER is not set 581# CONFIG_RAW_DRIVER is not set
587# CONFIG_TCG_TPM is not set 582# CONFIG_TCG_TPM is not set
588CONFIG_DEVPORT=y 583CONFIG_DEVPORT=y
589# CONFIG_I2C is not set 584CONFIG_I2C=m
585CONFIG_I2C_BOARDINFO=y
586# CONFIG_I2C_CHARDEV is not set
587
588#
589# I2C Algorithms
590#
591# CONFIG_I2C_ALGOBIT is not set
592# CONFIG_I2C_ALGOPCF is not set
593# CONFIG_I2C_ALGOPCA is not set
594
595#
596# I2C Hardware Bus support
597#
598# CONFIG_I2C_ALI1535 is not set
599# CONFIG_I2C_ALI1563 is not set
600# CONFIG_I2C_ALI15X3 is not set
601# CONFIG_I2C_AMD756 is not set
602# CONFIG_I2C_AMD8111 is not set
603# CONFIG_I2C_I801 is not set
604# CONFIG_I2C_I810 is not set
605# CONFIG_I2C_PIIX4 is not set
606# CONFIG_I2C_NFORCE2 is not set
607# CONFIG_I2C_OCORES is not set
608# CONFIG_I2C_PARPORT_LIGHT is not set
609# CONFIG_I2C_PROSAVAGE is not set
610# CONFIG_I2C_SAVAGE4 is not set
611# CONFIG_I2C_SIMTEC is not set
612# CONFIG_I2C_SIS5595 is not set
613# CONFIG_I2C_SIS630 is not set
614# CONFIG_I2C_SIS96X is not set
615# CONFIG_I2C_TAOS_EVM is not set
616# CONFIG_I2C_STUB is not set
617# CONFIG_I2C_VIA is not set
618# CONFIG_I2C_VIAPRO is not set
619# CONFIG_I2C_VOODOO3 is not set
620
621#
622# Miscellaneous I2C Chip support
623#
624# CONFIG_SENSORS_DS1337 is not set
625# CONFIG_SENSORS_DS1374 is not set
626# CONFIG_DS1682 is not set
627# CONFIG_SENSORS_EEPROM is not set
628# CONFIG_SENSORS_PCF8574 is not set
629# CONFIG_SENSORS_PCA9539 is not set
630# CONFIG_SENSORS_PCF8591 is not set
631# CONFIG_SENSORS_MAX6875 is not set
632# CONFIG_SENSORS_TSL2550 is not set
633# CONFIG_I2C_DEBUG_CORE is not set
634# CONFIG_I2C_DEBUG_ALGO is not set
635# CONFIG_I2C_DEBUG_BUS is not set
636# CONFIG_I2C_DEBUG_CHIP is not set
590 637
591# 638#
592# SPI support 639# SPI support
@@ -599,16 +646,51 @@ CONFIG_HWMON=y
599# CONFIG_HWMON_VID is not set 646# CONFIG_HWMON_VID is not set
600# CONFIG_SENSORS_ABITUGURU is not set 647# CONFIG_SENSORS_ABITUGURU is not set
601# CONFIG_SENSORS_ABITUGURU3 is not set 648# CONFIG_SENSORS_ABITUGURU3 is not set
649# CONFIG_SENSORS_AD7418 is not set
650# CONFIG_SENSORS_ADM1021 is not set
651# CONFIG_SENSORS_ADM1025 is not set
652# CONFIG_SENSORS_ADM1026 is not set
653# CONFIG_SENSORS_ADM1029 is not set
654# CONFIG_SENSORS_ADM1031 is not set
655# CONFIG_SENSORS_ADM9240 is not set
656# CONFIG_SENSORS_ASB100 is not set
657# CONFIG_SENSORS_ATXP1 is not set
658# CONFIG_SENSORS_DS1621 is not set
602# CONFIG_SENSORS_F71805F is not set 659# CONFIG_SENSORS_F71805F is not set
660# CONFIG_SENSORS_FSCHER is not set
661# CONFIG_SENSORS_FSCPOS is not set
662# CONFIG_SENSORS_GL518SM is not set
663# CONFIG_SENSORS_GL520SM is not set
603# CONFIG_SENSORS_IT87 is not set 664# CONFIG_SENSORS_IT87 is not set
665# CONFIG_SENSORS_LM63 is not set
666# CONFIG_SENSORS_LM75 is not set
667# CONFIG_SENSORS_LM77 is not set
668# CONFIG_SENSORS_LM78 is not set
669# CONFIG_SENSORS_LM80 is not set
670# CONFIG_SENSORS_LM83 is not set
671# CONFIG_SENSORS_LM85 is not set
672# CONFIG_SENSORS_LM87 is not set
673# CONFIG_SENSORS_LM90 is not set
674# CONFIG_SENSORS_LM92 is not set
675# CONFIG_SENSORS_LM93 is not set
676# CONFIG_SENSORS_MAX1619 is not set
677# CONFIG_SENSORS_MAX6650 is not set
604# CONFIG_SENSORS_PC87360 is not set 678# CONFIG_SENSORS_PC87360 is not set
605# CONFIG_SENSORS_PC87427 is not set 679# CONFIG_SENSORS_PC87427 is not set
606# CONFIG_SENSORS_SIS5595 is not set 680# CONFIG_SENSORS_SIS5595 is not set
681# CONFIG_SENSORS_DME1737 is not set
607# CONFIG_SENSORS_SMSC47M1 is not set 682# CONFIG_SENSORS_SMSC47M1 is not set
683# CONFIG_SENSORS_SMSC47M192 is not set
608# CONFIG_SENSORS_SMSC47B397 is not set 684# CONFIG_SENSORS_SMSC47B397 is not set
685# CONFIG_SENSORS_THMC50 is not set
609# CONFIG_SENSORS_VIA686A is not set 686# CONFIG_SENSORS_VIA686A is not set
610# CONFIG_SENSORS_VT1211 is not set 687# CONFIG_SENSORS_VT1211 is not set
611# CONFIG_SENSORS_VT8231 is not set 688# CONFIG_SENSORS_VT8231 is not set
689# CONFIG_SENSORS_W83781D is not set
690# CONFIG_SENSORS_W83791D is not set
691# CONFIG_SENSORS_W83792D is not set
692# CONFIG_SENSORS_W83793 is not set
693# CONFIG_SENSORS_W83L785TS is not set
612# CONFIG_SENSORS_W83627HF is not set 694# CONFIG_SENSORS_W83627HF is not set
613# CONFIG_SENSORS_W83627EHF is not set 695# CONFIG_SENSORS_W83627EHF is not set
614# CONFIG_HWMON_DEBUG_CHIP is not set 696# CONFIG_HWMON_DEBUG_CHIP is not set
@@ -621,8 +703,115 @@ CONFIG_HWMON=y
621# 703#
622# Multimedia devices 704# Multimedia devices
623# 705#
624# CONFIG_VIDEO_DEV is not set 706CONFIG_VIDEO_DEV=m
625# CONFIG_DVB_CORE is not set 707# CONFIG_VIDEO_V4L1 is not set
708# CONFIG_VIDEO_V4L1_COMPAT is not set
709CONFIG_VIDEO_V4L2=y
710CONFIG_VIDEO_CAPTURE_DRIVERS=y
711# CONFIG_VIDEO_ADV_DEBUG is not set
712CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
713# CONFIG_VIDEO_VIVI is not set
714# CONFIG_VIDEO_SAA5246A is not set
715# CONFIG_VIDEO_SAA5249 is not set
716# CONFIG_TUNER_TEA5761 is not set
717# CONFIG_VIDEO_SAA7134 is not set
718# CONFIG_VIDEO_HEXIUM_ORION is not set
719# CONFIG_VIDEO_HEXIUM_GEMINI is not set
720# CONFIG_VIDEO_CX88 is not set
721# CONFIG_VIDEO_CAFE_CCIC is not set
722# CONFIG_RADIO_ADAPTERS is not set
723CONFIG_DVB_CORE=y
724# CONFIG_DVB_CORE_ATTACH is not set
725CONFIG_DVB_CAPTURE_DRIVERS=y
726
727#
728# Supported SAA7146 based PCI Adapters
729#
730
731#
732# Supported FlexCopII (B2C2) Adapters
733#
734# CONFIG_DVB_B2C2_FLEXCOP is not set
735
736#
737# Supported BT878 Adapters
738#
739
740#
741# Supported Pluto2 Adapters
742#
743# CONFIG_DVB_PLUTO2 is not set
744
745#
746# Supported DVB Frontends
747#
748
749#
750# Customise DVB Frontends
751#
752# CONFIG_DVB_FE_CUSTOMISE is not set
753
754#
755# DVB-S (satellite) frontends
756#
757# CONFIG_DVB_STV0299 is not set
758# CONFIG_DVB_CX24110 is not set
759# CONFIG_DVB_CX24123 is not set
760# CONFIG_DVB_TDA8083 is not set
761# CONFIG_DVB_MT312 is not set
762# CONFIG_DVB_VES1X93 is not set
763# CONFIG_DVB_S5H1420 is not set
764# CONFIG_DVB_TDA10086 is not set
765
766#
767# DVB-T (terrestrial) frontends
768#
769# CONFIG_DVB_SP8870 is not set
770# CONFIG_DVB_SP887X is not set
771# CONFIG_DVB_CX22700 is not set
772# CONFIG_DVB_CX22702 is not set
773# CONFIG_DVB_L64781 is not set
774# CONFIG_DVB_TDA1004X is not set
775# CONFIG_DVB_NXT6000 is not set
776# CONFIG_DVB_MT352 is not set
777# CONFIG_DVB_ZL10353 is not set
778# CONFIG_DVB_DIB3000MB is not set
779# CONFIG_DVB_DIB3000MC is not set
780# CONFIG_DVB_DIB7000M is not set
781# CONFIG_DVB_DIB7000P is not set
782
783#
784# DVB-C (cable) frontends
785#
786# CONFIG_DVB_VES1820 is not set
787# CONFIG_DVB_TDA10021 is not set
788# CONFIG_DVB_TDA10023 is not set
789# CONFIG_DVB_STV0297 is not set
790
791#
792# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
793#
794# CONFIG_DVB_NXT200X is not set
795# CONFIG_DVB_OR51211 is not set
796# CONFIG_DVB_OR51132 is not set
797# CONFIG_DVB_BCM3510 is not set
798# CONFIG_DVB_LGDT330X is not set
799
800#
801# Tuners/PLL support
802#
803# CONFIG_DVB_PLL is not set
804# CONFIG_DVB_TDA826X is not set
805# CONFIG_DVB_TDA827X is not set
806# CONFIG_DVB_TUNER_QT1010 is not set
807# CONFIG_DVB_TUNER_MT2060 is not set
808
809#
810# Miscellaneous devices
811#
812# CONFIG_DVB_LNBP21 is not set
813# CONFIG_DVB_ISL6421 is not set
814# CONFIG_DVB_TUA6100 is not set
626CONFIG_DAB=y 815CONFIG_DAB=y
627 816
628# 817#
@@ -635,6 +824,7 @@ CONFIG_DAB=y
635# 824#
636# CONFIG_DISPLAY_SUPPORT is not set 825# CONFIG_DISPLAY_SUPPORT is not set
637# CONFIG_VGASTATE is not set 826# CONFIG_VGASTATE is not set
827CONFIG_VIDEO_OUTPUT_CONTROL=y
638CONFIG_FB=y 828CONFIG_FB=y
639CONFIG_FIRMWARE_EDID=y 829CONFIG_FIRMWARE_EDID=y
640# CONFIG_FB_DDC is not set 830# CONFIG_FB_DDC is not set
@@ -728,24 +918,8 @@ CONFIG_USB_ARCH_HAS_EHCI=y
728# 918#
729# CONFIG_USB_GADGET is not set 919# CONFIG_USB_GADGET is not set
730# CONFIG_MMC is not set 920# CONFIG_MMC is not set
731
732#
733# LED devices
734#
735# CONFIG_NEW_LEDS is not set 921# CONFIG_NEW_LEDS is not set
736
737#
738# LED drivers
739#
740
741#
742# LED Triggers
743#
744# CONFIG_INFINIBAND is not set 922# CONFIG_INFINIBAND is not set
745
746#
747# Real Time Clock
748#
749# CONFIG_RTC_CLASS is not set 923# CONFIG_RTC_CLASS is not set
750 924
751# 925#
@@ -929,9 +1103,9 @@ CONFIG_DEBUG_BUGVERBOSE=y
929# CONFIG_DEBUG_LIST is not set 1103# CONFIG_DEBUG_LIST is not set
930CONFIG_FRAME_POINTER=y 1104CONFIG_FRAME_POINTER=y
931CONFIG_FORCED_INLINING=y 1105CONFIG_FORCED_INLINING=y
1106# CONFIG_RCU_TORTURE_TEST is not set
932# CONFIG_FAULT_INJECTION is not set 1107# CONFIG_FAULT_INJECTION is not set
933# CONFIG_EARLY_PRINTK is not set 1108# CONFIG_EARLY_PRINTK is not set
934# CONFIG_DEBUG_KERNEL_WITH_GDB_STUB is not set
935CONFIG_SH64_PROC_TLB=y 1109CONFIG_SH64_PROC_TLB=y
936CONFIG_SH64_PROC_ASIDS=y 1110CONFIG_SH64_PROC_ASIDS=y
937CONFIG_SH64_SR_WATCH=y 1111CONFIG_SH64_SR_WATCH=y
@@ -960,5 +1134,3 @@ CONFIG_PLIST=y
960CONFIG_HAS_IOMEM=y 1134CONFIG_HAS_IOMEM=y
961CONFIG_HAS_IOPORT=y 1135CONFIG_HAS_IOPORT=y
962CONFIG_HAS_DMA=y 1136CONFIG_HAS_DMA=y
963CONFIG_GENERIC_HARDIRQS=y
964CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/sh64/configs/harp_defconfig b/arch/sh64/configs/harp_defconfig
new file mode 100644
index 000000000000..e4b84b51baf8
--- /dev/null
+++ b/arch/sh64/configs/harp_defconfig
@@ -0,0 +1,756 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc8
4# Mon Oct 1 18:01:38 2007
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH64=y
8CONFIG_MMU=y
9CONFIG_QUICKLIST=y
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y
16# CONFIG_ARCH_HAS_ILOG2_U32 is not set
17# CONFIG_ARCH_HAS_ILOG2_U64 is not set
18CONFIG_ARCH_NO_VIRT_TO_BUS=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
20
21#
22# General setup
23#
24CONFIG_EXPERIMENTAL=y
25CONFIG_BROKEN_ON_SMP=y
26CONFIG_LOCK_KERNEL=y
27CONFIG_INIT_ENV_ARG_LIMIT=32
28CONFIG_LOCALVERSION=""
29CONFIG_LOCALVERSION_AUTO=y
30CONFIG_SWAP=y
31# CONFIG_SYSVIPC is not set
32CONFIG_POSIX_MQUEUE=y
33# CONFIG_BSD_PROCESS_ACCT is not set
34# CONFIG_TASKSTATS is not set
35# CONFIG_USER_NS is not set
36# CONFIG_AUDIT is not set
37# CONFIG_IKCONFIG is not set
38CONFIG_LOG_BUF_SHIFT=14
39CONFIG_SYSFS_DEPRECATED=y
40# CONFIG_RELAY is not set
41# CONFIG_BLK_DEV_INITRD is not set
42# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
43CONFIG_SYSCTL=y
44# CONFIG_EMBEDDED is not set
45CONFIG_UID16=y
46CONFIG_SYSCTL_SYSCALL=y
47CONFIG_KALLSYMS=y
48# CONFIG_KALLSYMS_ALL is not set
49# CONFIG_KALLSYMS_EXTRA_PASS is not set
50CONFIG_HOTPLUG=y
51CONFIG_PRINTK=y
52CONFIG_BUG=y
53CONFIG_ELF_CORE=y
54CONFIG_BASE_FULL=y
55CONFIG_FUTEX=y
56CONFIG_ANON_INODES=y
57CONFIG_EPOLL=y
58CONFIG_SIGNALFD=y
59CONFIG_EVENTFD=y
60CONFIG_SHMEM=y
61CONFIG_VM_EVENT_COUNTERS=y
62CONFIG_SLAB=y
63# CONFIG_SLUB is not set
64# CONFIG_SLOB is not set
65CONFIG_RT_MUTEXES=y
66# CONFIG_TINY_SHMEM is not set
67CONFIG_BASE_SMALL=0
68# CONFIG_MODULES is not set
69CONFIG_BLOCK=y
70# CONFIG_LBD is not set
71# CONFIG_BLK_DEV_IO_TRACE is not set
72# CONFIG_LSF is not set
73# CONFIG_BLK_DEV_BSG is not set
74
75#
76# IO Schedulers
77#
78CONFIG_IOSCHED_NOOP=y
79CONFIG_IOSCHED_AS=y
80CONFIG_IOSCHED_DEADLINE=y
81CONFIG_IOSCHED_CFQ=y
82# CONFIG_DEFAULT_AS is not set
83# CONFIG_DEFAULT_DEADLINE is not set
84CONFIG_DEFAULT_CFQ=y
85# CONFIG_DEFAULT_NOOP is not set
86CONFIG_DEFAULT_IOSCHED="cfq"
87
88#
89# System type
90#
91# CONFIG_SH_SIMULATOR is not set
92# CONFIG_SH_CAYMAN is not set
93CONFIG_SH_HARP=y
94CONFIG_CPU_SH5=y
95CONFIG_CPU_SUBTYPE_SH5_101=y
96# CONFIG_CPU_SUBTYPE_SH5_103 is not set
97CONFIG_LITTLE_ENDIAN=y
98# CONFIG_BIG_ENDIAN is not set
99CONFIG_SH_FPU=y
100# CONFIG_SH64_FPU_DENORM_FLUSH is not set
101CONFIG_SH64_PGTABLE_2_LEVEL=y
102# CONFIG_SH64_PGTABLE_3_LEVEL is not set
103CONFIG_HUGETLB_PAGE_SIZE_64K=y
104# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
105# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
106CONFIG_SH64_USER_MISALIGNED_FIXUP=y
107
108#
109# Memory options
110#
111CONFIG_CACHED_MEMORY_OFFSET=0x20000000
112CONFIG_MEMORY_START=0x80000000
113CONFIG_MEMORY_SIZE_IN_MB=128
114
115#
116# Cache options
117#
118CONFIG_DCACHE_WRITE_BACK=y
119# CONFIG_DCACHE_WRITE_THROUGH is not set
120# CONFIG_DCACHE_DISABLED is not set
121# CONFIG_ICACHE_DISABLED is not set
122CONFIG_PCIDEVICE_MEMORY_START=C0000000
123CONFIG_DEVICE_MEMORY_START=E0000000
124CONFIG_FLASH_MEMORY_START=0x00000000
125CONFIG_PCI_BLOCK_START=0x40000000
126
127#
128# CPU Subtype specific options
129#
130CONFIG_SH64_ID2815_WORKAROUND=y
131
132#
133# Misc options
134#
135# CONFIG_SH_DMA is not set
136CONFIG_PREEMPT=y
137CONFIG_SELECT_MEMORY_MODEL=y
138CONFIG_FLATMEM_MANUAL=y
139# CONFIG_DISCONTIGMEM_MANUAL is not set
140# CONFIG_SPARSEMEM_MANUAL is not set
141CONFIG_FLATMEM=y
142CONFIG_FLAT_NODE_MEM_MAP=y
143# CONFIG_SPARSEMEM_STATIC is not set
144CONFIG_SPLIT_PTLOCK_CPUS=4
145# CONFIG_RESOURCES_64BIT is not set
146CONFIG_ZONE_DMA_FLAG=0
147CONFIG_NR_QUICK=1
148
149#
150# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
151#
152# CONFIG_ARCH_SUPPORTS_MSI is not set
153
154#
155# PCCARD (PCMCIA/CardBus) support
156#
157# CONFIG_PCCARD is not set
158
159#
160# Executable file formats
161#
162CONFIG_BINFMT_ELF=y
163# CONFIG_BINFMT_MISC is not set
164
165#
166# Networking
167#
168CONFIG_NET=y
169
170#
171# Networking options
172#
173CONFIG_PACKET=y
174# CONFIG_PACKET_MMAP is not set
175CONFIG_UNIX=y
176CONFIG_XFRM=y
177# CONFIG_XFRM_USER is not set
178# CONFIG_XFRM_SUB_POLICY is not set
179# CONFIG_XFRM_MIGRATE is not set
180# CONFIG_NET_KEY is not set
181CONFIG_INET=y
182# CONFIG_IP_MULTICAST is not set
183# CONFIG_IP_ADVANCED_ROUTER is not set
184CONFIG_IP_FIB_HASH=y
185CONFIG_IP_PNP=y
186# CONFIG_IP_PNP_DHCP is not set
187# CONFIG_IP_PNP_BOOTP is not set
188# CONFIG_IP_PNP_RARP is not set
189# CONFIG_NET_IPIP is not set
190# CONFIG_NET_IPGRE is not set
191# CONFIG_ARPD is not set
192# CONFIG_SYN_COOKIES is not set
193# CONFIG_INET_AH is not set
194# CONFIG_INET_ESP is not set
195# CONFIG_INET_IPCOMP is not set
196# CONFIG_INET_XFRM_TUNNEL is not set
197# CONFIG_INET_TUNNEL is not set
198CONFIG_INET_XFRM_MODE_TRANSPORT=y
199CONFIG_INET_XFRM_MODE_TUNNEL=y
200CONFIG_INET_XFRM_MODE_BEET=y
201CONFIG_INET_DIAG=y
202CONFIG_INET_TCP_DIAG=y
203# CONFIG_TCP_CONG_ADVANCED is not set
204CONFIG_TCP_CONG_CUBIC=y
205CONFIG_DEFAULT_TCP_CONG="cubic"
206# CONFIG_TCP_MD5SIG is not set
207# CONFIG_IPV6 is not set
208# CONFIG_INET6_XFRM_TUNNEL is not set
209# CONFIG_INET6_TUNNEL is not set
210# CONFIG_NETWORK_SECMARK is not set
211# CONFIG_NETFILTER is not set
212# CONFIG_IP_DCCP is not set
213# CONFIG_IP_SCTP is not set
214# CONFIG_TIPC is not set
215# CONFIG_ATM is not set
216# CONFIG_BRIDGE is not set
217# CONFIG_VLAN_8021Q is not set
218# CONFIG_DECNET is not set
219# CONFIG_LLC2 is not set
220# CONFIG_IPX is not set
221# CONFIG_ATALK is not set
222# CONFIG_X25 is not set
223# CONFIG_LAPB is not set
224# CONFIG_ECONET is not set
225# CONFIG_WAN_ROUTER is not set
226
227#
228# QoS and/or fair queueing
229#
230# CONFIG_NET_SCHED is not set
231
232#
233# Network testing
234#
235# CONFIG_NET_PKTGEN is not set
236# CONFIG_HAMRADIO is not set
237# CONFIG_IRDA is not set
238# CONFIG_BT is not set
239# CONFIG_AF_RXRPC is not set
240
241#
242# Wireless
243#
244# CONFIG_CFG80211 is not set
245# CONFIG_WIRELESS_EXT is not set
246# CONFIG_MAC80211 is not set
247# CONFIG_IEEE80211 is not set
248# CONFIG_RFKILL is not set
249# CONFIG_NET_9P is not set
250
251#
252# Device Drivers
253#
254
255#
256# Generic Driver Options
257#
258CONFIG_STANDALONE=y
259CONFIG_PREVENT_FIRMWARE_BUILD=y
260# CONFIG_FW_LOADER is not set
261# CONFIG_DEBUG_DRIVER is not set
262# CONFIG_DEBUG_DEVRES is not set
263# CONFIG_SYS_HYPERVISOR is not set
264# CONFIG_CONNECTOR is not set
265# CONFIG_MTD is not set
266# CONFIG_PARPORT is not set
267CONFIG_BLK_DEV=y
268# CONFIG_BLK_DEV_COW_COMMON is not set
269CONFIG_BLK_DEV_LOOP=y
270# CONFIG_BLK_DEV_CRYPTOLOOP is not set
271# CONFIG_BLK_DEV_NBD is not set
272CONFIG_BLK_DEV_RAM=y
273CONFIG_BLK_DEV_RAM_COUNT=16
274CONFIG_BLK_DEV_RAM_SIZE=4096
275CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
276# CONFIG_CDROM_PKTCDVD is not set
277# CONFIG_ATA_OVER_ETH is not set
278CONFIG_MISC_DEVICES=y
279# CONFIG_EEPROM_93CX6 is not set
280# CONFIG_IDE is not set
281
282#
283# SCSI device support
284#
285# CONFIG_RAID_ATTRS is not set
286CONFIG_SCSI=y
287CONFIG_SCSI_DMA=y
288# CONFIG_SCSI_TGT is not set
289# CONFIG_SCSI_NETLINK is not set
290CONFIG_SCSI_PROC_FS=y
291
292#
293# SCSI support type (disk, tape, CD-ROM)
294#
295CONFIG_BLK_DEV_SD=y
296# CONFIG_CHR_DEV_ST is not set
297# CONFIG_CHR_DEV_OSST is not set
298# CONFIG_BLK_DEV_SR is not set
299# CONFIG_CHR_DEV_SG is not set
300# CONFIG_CHR_DEV_SCH is not set
301
302#
303# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
304#
305CONFIG_SCSI_MULTI_LUN=y
306# CONFIG_SCSI_CONSTANTS is not set
307# CONFIG_SCSI_LOGGING is not set
308# CONFIG_SCSI_SCAN_ASYNC is not set
309
310#
311# SCSI Transports
312#
313CONFIG_SCSI_SPI_ATTRS=y
314# CONFIG_SCSI_FC_ATTRS is not set
315# CONFIG_SCSI_ISCSI_ATTRS is not set
316# CONFIG_SCSI_SAS_LIBSAS is not set
317CONFIG_SCSI_LOWLEVEL=y
318# CONFIG_ISCSI_TCP is not set
319# CONFIG_SCSI_DEBUG is not set
320# CONFIG_ATA is not set
321# CONFIG_MD is not set
322CONFIG_NETDEVICES=y
323# CONFIG_NETDEVICES_MULTIQUEUE is not set
324# CONFIG_DUMMY is not set
325# CONFIG_BONDING is not set
326# CONFIG_MACVLAN is not set
327# CONFIG_EQUALIZER is not set
328# CONFIG_TUN is not set
329# CONFIG_PHYLIB is not set
330CONFIG_NET_ETHERNET=y
331# CONFIG_MII is not set
332# CONFIG_STNIC is not set
333# CONFIG_SMC91X is not set
334CONFIG_NETDEV_1000=y
335CONFIG_NETDEV_10000=y
336
337#
338# Wireless LAN
339#
340# CONFIG_WLAN_PRE80211 is not set
341# CONFIG_WLAN_80211 is not set
342# CONFIG_WAN is not set
343# CONFIG_PPP is not set
344# CONFIG_SLIP is not set
345# CONFIG_SHAPER is not set
346# CONFIG_NETCONSOLE is not set
347# CONFIG_NETPOLL is not set
348# CONFIG_NET_POLL_CONTROLLER is not set
349# CONFIG_ISDN is not set
350# CONFIG_PHONE is not set
351
352#
353# Input device support
354#
355CONFIG_INPUT=y
356# CONFIG_INPUT_FF_MEMLESS is not set
357# CONFIG_INPUT_POLLDEV is not set
358
359#
360# Userland interfaces
361#
362CONFIG_INPUT_MOUSEDEV=y
363# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
364CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
365CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
366# CONFIG_INPUT_JOYDEV is not set
367# CONFIG_INPUT_TSDEV is not set
368# CONFIG_INPUT_EVDEV is not set
369# CONFIG_INPUT_EVBUG is not set
370
371#
372# Input Device Drivers
373#
374# CONFIG_INPUT_KEYBOARD is not set
375# CONFIG_INPUT_MOUSE is not set
376# CONFIG_INPUT_JOYSTICK is not set
377# CONFIG_INPUT_TABLET is not set
378# CONFIG_INPUT_TOUCHSCREEN is not set
379# CONFIG_INPUT_MISC is not set
380
381#
382# Hardware I/O ports
383#
384# CONFIG_SERIO is not set
385# CONFIG_GAMEPORT is not set
386
387#
388# Character devices
389#
390CONFIG_VT=y
391CONFIG_VT_CONSOLE=y
392CONFIG_HW_CONSOLE=y
393# CONFIG_VT_HW_CONSOLE_BINDING is not set
394# CONFIG_SERIAL_NONSTANDARD is not set
395
396#
397# Serial drivers
398#
399# CONFIG_SERIAL_8250 is not set
400
401#
402# Non-8250 serial port support
403#
404CONFIG_SERIAL_SH_SCI=y
405CONFIG_SERIAL_SH_SCI_NR_UARTS=2
406CONFIG_SERIAL_SH_SCI_CONSOLE=y
407CONFIG_SERIAL_CORE=y
408CONFIG_SERIAL_CORE_CONSOLE=y
409CONFIG_UNIX98_PTYS=y
410CONFIG_LEGACY_PTYS=y
411CONFIG_LEGACY_PTY_COUNT=256
412# CONFIG_IPMI_HANDLER is not set
413CONFIG_WATCHDOG=y
414# CONFIG_WATCHDOG_NOWAYOUT is not set
415
416#
417# Watchdog Device Drivers
418#
419# CONFIG_SOFT_WATCHDOG is not set
420CONFIG_HW_RANDOM=y
421# CONFIG_R3964 is not set
422# CONFIG_RAW_DRIVER is not set
423# CONFIG_TCG_TPM is not set
424# CONFIG_I2C is not set
425
426#
427# SPI support
428#
429# CONFIG_SPI is not set
430# CONFIG_SPI_MASTER is not set
431# CONFIG_W1 is not set
432# CONFIG_POWER_SUPPLY is not set
433CONFIG_HWMON=y
434# CONFIG_HWMON_VID is not set
435# CONFIG_SENSORS_ABITUGURU is not set
436# CONFIG_SENSORS_ABITUGURU3 is not set
437# CONFIG_SENSORS_F71805F is not set
438# CONFIG_SENSORS_IT87 is not set
439# CONFIG_SENSORS_PC87360 is not set
440# CONFIG_SENSORS_PC87427 is not set
441# CONFIG_SENSORS_SMSC47M1 is not set
442# CONFIG_SENSORS_SMSC47B397 is not set
443# CONFIG_SENSORS_VT1211 is not set
444# CONFIG_SENSORS_W83627HF is not set
445# CONFIG_SENSORS_W83627EHF is not set
446# CONFIG_HWMON_DEBUG_CHIP is not set
447
448#
449# Multifunction device drivers
450#
451# CONFIG_MFD_SM501 is not set
452
453#
454# Multimedia devices
455#
456# CONFIG_VIDEO_DEV is not set
457# CONFIG_DVB_CORE is not set
458CONFIG_DAB=y
459
460#
461# Graphics support
462#
463# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
464
465#
466# Display device support
467#
468# CONFIG_DISPLAY_SUPPORT is not set
469# CONFIG_VGASTATE is not set
470CONFIG_VIDEO_OUTPUT_CONTROL=y
471CONFIG_FB=y
472CONFIG_FIRMWARE_EDID=y
473# CONFIG_FB_DDC is not set
474# CONFIG_FB_CFB_FILLRECT is not set
475# CONFIG_FB_CFB_COPYAREA is not set
476# CONFIG_FB_CFB_IMAGEBLIT is not set
477# CONFIG_FB_SYS_FILLRECT is not set
478# CONFIG_FB_SYS_COPYAREA is not set
479# CONFIG_FB_SYS_IMAGEBLIT is not set
480# CONFIG_FB_SYS_FOPS is not set
481CONFIG_FB_DEFERRED_IO=y
482# CONFIG_FB_SVGALIB is not set
483# CONFIG_FB_MACMODES is not set
484# CONFIG_FB_BACKLIGHT is not set
485CONFIG_FB_MODE_HELPERS=y
486# CONFIG_FB_TILEBLITTING is not set
487
488#
489# Frame buffer hardware drivers
490#
491# CONFIG_FB_S1D13XXX is not set
492# CONFIG_FB_VIRTUAL is not set
493
494#
495# Console display driver support
496#
497CONFIG_DUMMY_CONSOLE=y
498CONFIG_FRAMEBUFFER_CONSOLE=y
499# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
500# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
501CONFIG_FONTS=y
502# CONFIG_FONT_8x8 is not set
503CONFIG_FONT_8x16=y
504# CONFIG_FONT_6x11 is not set
505# CONFIG_FONT_7x14 is not set
506# CONFIG_FONT_PEARL_8x8 is not set
507# CONFIG_FONT_ACORN_8x8 is not set
508# CONFIG_FONT_MINI_4x6 is not set
509# CONFIG_FONT_SUN8x16 is not set
510# CONFIG_FONT_SUN12x22 is not set
511# CONFIG_FONT_10x18 is not set
512CONFIG_LOGO=y
513# CONFIG_LOGO_LINUX_MONO is not set
514# CONFIG_LOGO_LINUX_VGA16 is not set
515# CONFIG_LOGO_LINUX_CLUT224 is not set
516# CONFIG_LOGO_SUPERH_MONO is not set
517# CONFIG_LOGO_SUPERH_VGA16 is not set
518CONFIG_LOGO_SUPERH_CLUT224=y
519
520#
521# Sound
522#
523# CONFIG_SOUND is not set
524CONFIG_HID_SUPPORT=y
525CONFIG_HID=y
526# CONFIG_HID_DEBUG is not set
527CONFIG_USB_SUPPORT=y
528CONFIG_USB_ARCH_HAS_HCD=y
529# CONFIG_USB_ARCH_HAS_OHCI is not set
530# CONFIG_USB_ARCH_HAS_EHCI is not set
531# CONFIG_USB is not set
532
533#
534# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
535#
536
537#
538# USB Gadget Support
539#
540# CONFIG_USB_GADGET is not set
541# CONFIG_MMC is not set
542# CONFIG_NEW_LEDS is not set
543# CONFIG_RTC_CLASS is not set
544
545#
546# DMA Engine support
547#
548# CONFIG_DMA_ENGINE is not set
549
550#
551# DMA Clients
552#
553
554#
555# DMA Devices
556#
557
558#
559# Userspace I/O
560#
561# CONFIG_UIO is not set
562
563#
564# File systems
565#
566CONFIG_EXT2_FS=y
567# CONFIG_EXT2_FS_XATTR is not set
568# CONFIG_EXT2_FS_XIP is not set
569CONFIG_EXT3_FS=y
570CONFIG_EXT3_FS_XATTR=y
571# CONFIG_EXT3_FS_POSIX_ACL is not set
572# CONFIG_EXT3_FS_SECURITY is not set
573# CONFIG_EXT4DEV_FS is not set
574CONFIG_JBD=y
575# CONFIG_JBD_DEBUG is not set
576CONFIG_FS_MBCACHE=y
577# CONFIG_REISERFS_FS is not set
578# CONFIG_JFS_FS is not set
579# CONFIG_FS_POSIX_ACL is not set
580# CONFIG_XFS_FS is not set
581# CONFIG_GFS2_FS is not set
582# CONFIG_OCFS2_FS is not set
583CONFIG_MINIX_FS=y
584CONFIG_ROMFS_FS=y
585CONFIG_INOTIFY=y
586CONFIG_INOTIFY_USER=y
587# CONFIG_QUOTA is not set
588CONFIG_DNOTIFY=y
589# CONFIG_AUTOFS_FS is not set
590# CONFIG_AUTOFS4_FS is not set
591# CONFIG_FUSE_FS is not set
592
593#
594# CD-ROM/DVD Filesystems
595#
596# CONFIG_ISO9660_FS is not set
597# CONFIG_UDF_FS is not set
598
599#
600# DOS/FAT/NT Filesystems
601#
602# CONFIG_MSDOS_FS is not set
603# CONFIG_VFAT_FS is not set
604# CONFIG_NTFS_FS is not set
605
606#
607# Pseudo filesystems
608#
609CONFIG_PROC_FS=y
610CONFIG_PROC_KCORE=y
611CONFIG_PROC_SYSCTL=y
612CONFIG_SYSFS=y
613CONFIG_TMPFS=y
614# CONFIG_TMPFS_POSIX_ACL is not set
615CONFIG_HUGETLBFS=y
616CONFIG_HUGETLB_PAGE=y
617CONFIG_RAMFS=y
618# CONFIG_CONFIGFS_FS is not set
619
620#
621# Miscellaneous filesystems
622#
623# CONFIG_ADFS_FS is not set
624# CONFIG_AFFS_FS is not set
625# CONFIG_HFS_FS is not set
626# CONFIG_HFSPLUS_FS is not set
627# CONFIG_BEFS_FS is not set
628# CONFIG_BFS_FS is not set
629# CONFIG_EFS_FS is not set
630# CONFIG_CRAMFS is not set
631# CONFIG_VXFS_FS is not set
632# CONFIG_HPFS_FS is not set
633# CONFIG_QNX4FS_FS is not set
634# CONFIG_SYSV_FS is not set
635# CONFIG_UFS_FS is not set
636
637#
638# Network File Systems
639#
640CONFIG_NFS_FS=y
641CONFIG_NFS_V3=y
642# CONFIG_NFS_V3_ACL is not set
643# CONFIG_NFS_V4 is not set
644# CONFIG_NFS_DIRECTIO is not set
645# CONFIG_NFSD is not set
646CONFIG_ROOT_NFS=y
647CONFIG_LOCKD=y
648CONFIG_LOCKD_V4=y
649CONFIG_NFS_COMMON=y
650CONFIG_SUNRPC=y
651# CONFIG_SUNRPC_BIND34 is not set
652# CONFIG_RPCSEC_GSS_KRB5 is not set
653# CONFIG_RPCSEC_GSS_SPKM3 is not set
654# CONFIG_SMB_FS is not set
655# CONFIG_CIFS is not set
656# CONFIG_NCP_FS is not set
657# CONFIG_CODA_FS is not set
658# CONFIG_AFS_FS is not set
659
660#
661# Partition Types
662#
663CONFIG_PARTITION_ADVANCED=y
664# CONFIG_ACORN_PARTITION is not set
665# CONFIG_OSF_PARTITION is not set
666# CONFIG_AMIGA_PARTITION is not set
667# CONFIG_ATARI_PARTITION is not set
668# CONFIG_MAC_PARTITION is not set
669CONFIG_MSDOS_PARTITION=y
670# CONFIG_BSD_DISKLABEL is not set
671# CONFIG_MINIX_SUBPARTITION is not set
672# CONFIG_SOLARIS_X86_PARTITION is not set
673# CONFIG_UNIXWARE_DISKLABEL is not set
674# CONFIG_LDM_PARTITION is not set
675# CONFIG_SGI_PARTITION is not set
676# CONFIG_ULTRIX_PARTITION is not set
677# CONFIG_SUN_PARTITION is not set
678# CONFIG_KARMA_PARTITION is not set
679# CONFIG_EFI_PARTITION is not set
680# CONFIG_SYSV68_PARTITION is not set
681
682#
683# Native Language Support
684#
685# CONFIG_NLS is not set
686
687#
688# Distributed Lock Manager
689#
690# CONFIG_DLM is not set
691
692#
693# Profiling support
694#
695# CONFIG_PROFILING is not set
696
697#
698# Kernel hacking
699#
700# CONFIG_PRINTK_TIME is not set
701CONFIG_ENABLE_MUST_CHECK=y
702CONFIG_MAGIC_SYSRQ=y
703# CONFIG_UNUSED_SYMBOLS is not set
704CONFIG_DEBUG_FS=y
705# CONFIG_HEADERS_CHECK is not set
706CONFIG_DEBUG_KERNEL=y
707# CONFIG_DEBUG_SHIRQ is not set
708CONFIG_DETECT_SOFTLOCKUP=y
709CONFIG_SCHED_DEBUG=y
710CONFIG_SCHEDSTATS=y
711# CONFIG_TIMER_STATS is not set
712# CONFIG_DEBUG_SLAB is not set
713# CONFIG_DEBUG_RT_MUTEXES is not set
714# CONFIG_RT_MUTEX_TESTER is not set
715# CONFIG_DEBUG_SPINLOCK is not set
716# CONFIG_DEBUG_MUTEXES is not set
717# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
718# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
719# CONFIG_DEBUG_KOBJECT is not set
720CONFIG_DEBUG_BUGVERBOSE=y
721# CONFIG_DEBUG_INFO is not set
722# CONFIG_DEBUG_VM is not set
723# CONFIG_DEBUG_LIST is not set
724CONFIG_FRAME_POINTER=y
725CONFIG_FORCED_INLINING=y
726# CONFIG_FAULT_INJECTION is not set
727# CONFIG_EARLY_PRINTK is not set
728# CONFIG_DEBUG_KERNEL_WITH_GDB_STUB is not set
729CONFIG_SH64_PROC_TLB=y
730CONFIG_SH64_PROC_ASIDS=y
731CONFIG_SH64_SR_WATCH=y
732# CONFIG_POOR_MANS_STRACE is not set
733# CONFIG_SH_ALPHANUMERIC is not set
734# CONFIG_SH_NO_BSS_INIT is not set
735
736#
737# Security options
738#
739# CONFIG_KEYS is not set
740# CONFIG_SECURITY is not set
741# CONFIG_CRYPTO is not set
742
743#
744# Library routines
745#
746CONFIG_BITREVERSE=y
747# CONFIG_CRC_CCITT is not set
748# CONFIG_CRC16 is not set
749# CONFIG_CRC_ITU_T is not set
750CONFIG_CRC32=y
751# CONFIG_CRC7 is not set
752# CONFIG_LIBCRC32C is not set
753CONFIG_PLIST=y
754CONFIG_HAS_IOMEM=y
755CONFIG_HAS_IOPORT=y
756CONFIG_HAS_DMA=y
diff --git a/arch/sh64/configs/sim_defconfig b/arch/sh64/configs/sim_defconfig
new file mode 100644
index 000000000000..f83bae659dc3
--- /dev/null
+++ b/arch/sh64/configs/sim_defconfig
@@ -0,0 +1,566 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc8
4# Mon Oct 1 17:50:35 2007
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH64=y
8CONFIG_MMU=y
9CONFIG_QUICKLIST=y
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y
16# CONFIG_ARCH_HAS_ILOG2_U32 is not set
17# CONFIG_ARCH_HAS_ILOG2_U64 is not set
18CONFIG_ARCH_NO_VIRT_TO_BUS=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
20
21#
22# General setup
23#
24CONFIG_EXPERIMENTAL=y
25CONFIG_BROKEN_ON_SMP=y
26CONFIG_LOCK_KERNEL=y
27CONFIG_INIT_ENV_ARG_LIMIT=32
28CONFIG_LOCALVERSION=""
29CONFIG_LOCALVERSION_AUTO=y
30CONFIG_SWAP=y
31# CONFIG_SYSVIPC is not set
32# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_USER_NS is not set
34# CONFIG_IKCONFIG is not set
35CONFIG_LOG_BUF_SHIFT=14
36CONFIG_SYSFS_DEPRECATED=y
37# CONFIG_RELAY is not set
38# CONFIG_BLK_DEV_INITRD is not set
39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
40CONFIG_SYSCTL=y
41# CONFIG_EMBEDDED is not set
42CONFIG_UID16=y
43CONFIG_SYSCTL_SYSCALL=y
44CONFIG_KALLSYMS=y
45# CONFIG_KALLSYMS_ALL is not set
46# CONFIG_KALLSYMS_EXTRA_PASS is not set
47CONFIG_HOTPLUG=y
48CONFIG_PRINTK=y
49CONFIG_BUG=y
50CONFIG_ELF_CORE=y
51CONFIG_BASE_FULL=y
52CONFIG_FUTEX=y
53CONFIG_ANON_INODES=y
54CONFIG_EPOLL=y
55CONFIG_SIGNALFD=y
56CONFIG_EVENTFD=y
57CONFIG_SHMEM=y
58CONFIG_VM_EVENT_COUNTERS=y
59CONFIG_SLAB=y
60# CONFIG_SLUB is not set
61# CONFIG_SLOB is not set
62CONFIG_RT_MUTEXES=y
63# CONFIG_TINY_SHMEM is not set
64CONFIG_BASE_SMALL=0
65# CONFIG_MODULES is not set
66CONFIG_BLOCK=y
67# CONFIG_LBD is not set
68# CONFIG_BLK_DEV_IO_TRACE is not set
69# CONFIG_LSF is not set
70# CONFIG_BLK_DEV_BSG is not set
71
72#
73# IO Schedulers
74#
75CONFIG_IOSCHED_NOOP=y
76CONFIG_IOSCHED_AS=y
77CONFIG_IOSCHED_DEADLINE=y
78CONFIG_IOSCHED_CFQ=y
79# CONFIG_DEFAULT_AS is not set
80# CONFIG_DEFAULT_DEADLINE is not set
81CONFIG_DEFAULT_CFQ=y
82# CONFIG_DEFAULT_NOOP is not set
83CONFIG_DEFAULT_IOSCHED="cfq"
84
85#
86# System type
87#
88CONFIG_SH_SIMULATOR=y
89# CONFIG_SH_CAYMAN is not set
90# CONFIG_SH_HARP is not set
91CONFIG_CPU_SH5=y
92CONFIG_CPU_SUBTYPE_SH5_101=y
93# CONFIG_CPU_SUBTYPE_SH5_103 is not set
94CONFIG_LITTLE_ENDIAN=y
95# CONFIG_BIG_ENDIAN is not set
96CONFIG_SH_FPU=y
97# CONFIG_SH64_FPU_DENORM_FLUSH is not set
98CONFIG_SH64_PGTABLE_2_LEVEL=y
99# CONFIG_SH64_PGTABLE_3_LEVEL is not set
100CONFIG_HUGETLB_PAGE_SIZE_64K=y
101# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
102# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
103CONFIG_SH64_USER_MISALIGNED_FIXUP=y
104
105#
106# Memory options
107#
108CONFIG_CACHED_MEMORY_OFFSET=0x20000000
109CONFIG_MEMORY_START=0x80000000
110CONFIG_MEMORY_SIZE_IN_MB=128
111
112#
113# Cache options
114#
115# CONFIG_DCACHE_WRITE_BACK is not set
116# CONFIG_DCACHE_WRITE_THROUGH is not set
117CONFIG_DCACHE_DISABLED=y
118# CONFIG_ICACHE_DISABLED is not set
119CONFIG_PCIDEVICE_MEMORY_START=C0000000
120CONFIG_DEVICE_MEMORY_START=E0000000
121CONFIG_FLASH_MEMORY_START=0x00000000
122CONFIG_PCI_BLOCK_START=0x40000000
123
124#
125# CPU Subtype specific options
126#
127CONFIG_SH64_ID2815_WORKAROUND=y
128
129#
130# Misc options
131#
132# CONFIG_SH_DMA is not set
133CONFIG_PREEMPT=y
134CONFIG_SELECT_MEMORY_MODEL=y
135CONFIG_FLATMEM_MANUAL=y
136# CONFIG_DISCONTIGMEM_MANUAL is not set
137# CONFIG_SPARSEMEM_MANUAL is not set
138CONFIG_FLATMEM=y
139CONFIG_FLAT_NODE_MEM_MAP=y
140# CONFIG_SPARSEMEM_STATIC is not set
141CONFIG_SPLIT_PTLOCK_CPUS=4
142# CONFIG_RESOURCES_64BIT is not set
143CONFIG_ZONE_DMA_FLAG=0
144CONFIG_NR_QUICK=1
145
146#
147# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
148#
149# CONFIG_ARCH_SUPPORTS_MSI is not set
150
151#
152# PCCARD (PCMCIA/CardBus) support
153#
154# CONFIG_PCCARD is not set
155
156#
157# Executable file formats
158#
159CONFIG_BINFMT_ELF=y
160# CONFIG_BINFMT_MISC is not set
161
162#
163# Networking
164#
165# CONFIG_NET is not set
166
167#
168# Device Drivers
169#
170
171#
172# Generic Driver Options
173#
174CONFIG_STANDALONE=y
175CONFIG_PREVENT_FIRMWARE_BUILD=y
176# CONFIG_FW_LOADER is not set
177# CONFIG_DEBUG_DRIVER is not set
178# CONFIG_DEBUG_DEVRES is not set
179# CONFIG_SYS_HYPERVISOR is not set
180# CONFIG_MTD is not set
181# CONFIG_PARPORT is not set
182# CONFIG_BLK_DEV is not set
183# CONFIG_MISC_DEVICES is not set
184# CONFIG_IDE is not set
185
186#
187# SCSI device support
188#
189# CONFIG_RAID_ATTRS is not set
190CONFIG_SCSI=y
191CONFIG_SCSI_DMA=y
192# CONFIG_SCSI_TGT is not set
193# CONFIG_SCSI_NETLINK is not set
194CONFIG_SCSI_PROC_FS=y
195
196#
197# SCSI support type (disk, tape, CD-ROM)
198#
199CONFIG_BLK_DEV_SD=y
200# CONFIG_CHR_DEV_ST is not set
201# CONFIG_CHR_DEV_OSST is not set
202# CONFIG_BLK_DEV_SR is not set
203# CONFIG_CHR_DEV_SG is not set
204# CONFIG_CHR_DEV_SCH is not set
205
206#
207# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
208#
209CONFIG_SCSI_MULTI_LUN=y
210# CONFIG_SCSI_CONSTANTS is not set
211# CONFIG_SCSI_LOGGING is not set
212# CONFIG_SCSI_SCAN_ASYNC is not set
213
214#
215# SCSI Transports
216#
217CONFIG_SCSI_SPI_ATTRS=y
218# CONFIG_SCSI_FC_ATTRS is not set
219# CONFIG_SCSI_SAS_LIBSAS is not set
220CONFIG_SCSI_LOWLEVEL=y
221# CONFIG_SCSI_DEBUG is not set
222# CONFIG_ATA is not set
223# CONFIG_MD is not set
224# CONFIG_PHONE is not set
225
226#
227# Input device support
228#
229CONFIG_INPUT=y
230# CONFIG_INPUT_FF_MEMLESS is not set
231# CONFIG_INPUT_POLLDEV is not set
232
233#
234# Userland interfaces
235#
236CONFIG_INPUT_MOUSEDEV=y
237# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
238CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
239CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
240# CONFIG_INPUT_JOYDEV is not set
241# CONFIG_INPUT_TSDEV is not set
242# CONFIG_INPUT_EVDEV is not set
243# CONFIG_INPUT_EVBUG is not set
244
245#
246# Input Device Drivers
247#
248# CONFIG_INPUT_KEYBOARD is not set
249# CONFIG_INPUT_MOUSE is not set
250# CONFIG_INPUT_JOYSTICK is not set
251# CONFIG_INPUT_TABLET is not set
252# CONFIG_INPUT_TOUCHSCREEN is not set
253# CONFIG_INPUT_MISC is not set
254
255#
256# Hardware I/O ports
257#
258# CONFIG_SERIO is not set
259# CONFIG_GAMEPORT is not set
260
261#
262# Character devices
263#
264CONFIG_VT=y
265CONFIG_VT_CONSOLE=y
266CONFIG_HW_CONSOLE=y
267# CONFIG_VT_HW_CONSOLE_BINDING is not set
268# CONFIG_SERIAL_NONSTANDARD is not set
269
270#
271# Serial drivers
272#
273# CONFIG_SERIAL_8250 is not set
274
275#
276# Non-8250 serial port support
277#
278CONFIG_SERIAL_SH_SCI=y
279CONFIG_SERIAL_SH_SCI_NR_UARTS=2
280CONFIG_SERIAL_SH_SCI_CONSOLE=y
281CONFIG_SERIAL_CORE=y
282CONFIG_SERIAL_CORE_CONSOLE=y
283CONFIG_UNIX98_PTYS=y
284# CONFIG_LEGACY_PTYS is not set
285# CONFIG_IPMI_HANDLER is not set
286# CONFIG_WATCHDOG is not set
287# CONFIG_HW_RANDOM is not set
288# CONFIG_R3964 is not set
289# CONFIG_RAW_DRIVER is not set
290# CONFIG_TCG_TPM is not set
291# CONFIG_I2C is not set
292
293#
294# SPI support
295#
296# CONFIG_SPI is not set
297# CONFIG_SPI_MASTER is not set
298# CONFIG_W1 is not set
299# CONFIG_POWER_SUPPLY is not set
300# CONFIG_HWMON is not set
301
302#
303# Multifunction device drivers
304#
305# CONFIG_MFD_SM501 is not set
306
307#
308# Multimedia devices
309#
310# CONFIG_VIDEO_DEV is not set
311CONFIG_DAB=y
312
313#
314# Graphics support
315#
316# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
317
318#
319# Display device support
320#
321# CONFIG_DISPLAY_SUPPORT is not set
322# CONFIG_VGASTATE is not set
323CONFIG_VIDEO_OUTPUT_CONTROL=y
324CONFIG_FB=y
325CONFIG_FIRMWARE_EDID=y
326# CONFIG_FB_DDC is not set
327# CONFIG_FB_CFB_FILLRECT is not set
328# CONFIG_FB_CFB_COPYAREA is not set
329# CONFIG_FB_CFB_IMAGEBLIT is not set
330# CONFIG_FB_SYS_FILLRECT is not set
331# CONFIG_FB_SYS_COPYAREA is not set
332# CONFIG_FB_SYS_IMAGEBLIT is not set
333# CONFIG_FB_SYS_FOPS is not set
334CONFIG_FB_DEFERRED_IO=y
335# CONFIG_FB_SVGALIB is not set
336# CONFIG_FB_MACMODES is not set
337# CONFIG_FB_BACKLIGHT is not set
338CONFIG_FB_MODE_HELPERS=y
339# CONFIG_FB_TILEBLITTING is not set
340
341#
342# Frame buffer hardware drivers
343#
344# CONFIG_FB_S1D13XXX is not set
345# CONFIG_FB_VIRTUAL is not set
346
347#
348# Console display driver support
349#
350CONFIG_DUMMY_CONSOLE=y
351CONFIG_FRAMEBUFFER_CONSOLE=y
352# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
353# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
354CONFIG_FONTS=y
355# CONFIG_FONT_8x8 is not set
356CONFIG_FONT_8x16=y
357# CONFIG_FONT_6x11 is not set
358# CONFIG_FONT_7x14 is not set
359# CONFIG_FONT_PEARL_8x8 is not set
360# CONFIG_FONT_ACORN_8x8 is not set
361# CONFIG_FONT_MINI_4x6 is not set
362# CONFIG_FONT_SUN8x16 is not set
363# CONFIG_FONT_SUN12x22 is not set
364# CONFIG_FONT_10x18 is not set
365CONFIG_LOGO=y
366# CONFIG_LOGO_LINUX_MONO is not set
367# CONFIG_LOGO_LINUX_VGA16 is not set
368# CONFIG_LOGO_LINUX_CLUT224 is not set
369# CONFIG_LOGO_SUPERH_MONO is not set
370# CONFIG_LOGO_SUPERH_VGA16 is not set
371CONFIG_LOGO_SUPERH_CLUT224=y
372
373#
374# Sound
375#
376# CONFIG_SOUND is not set
377# CONFIG_HID_SUPPORT is not set
378# CONFIG_USB_SUPPORT is not set
379# CONFIG_MMC is not set
380# CONFIG_NEW_LEDS is not set
381# CONFIG_RTC_CLASS is not set
382
383#
384# DMA Engine support
385#
386# CONFIG_DMA_ENGINE is not set
387
388#
389# DMA Clients
390#
391
392#
393# DMA Devices
394#
395
396#
397# Userspace I/O
398#
399# CONFIG_UIO is not set
400
401#
402# File systems
403#
404CONFIG_EXT2_FS=y
405# CONFIG_EXT2_FS_XATTR is not set
406# CONFIG_EXT2_FS_XIP is not set
407CONFIG_EXT3_FS=y
408CONFIG_EXT3_FS_XATTR=y
409# CONFIG_EXT3_FS_POSIX_ACL is not set
410# CONFIG_EXT3_FS_SECURITY is not set
411# CONFIG_EXT4DEV_FS is not set
412CONFIG_JBD=y
413# CONFIG_JBD_DEBUG is not set
414CONFIG_FS_MBCACHE=y
415# CONFIG_REISERFS_FS is not set
416# CONFIG_JFS_FS is not set
417# CONFIG_FS_POSIX_ACL is not set
418# CONFIG_XFS_FS is not set
419# CONFIG_GFS2_FS is not set
420CONFIG_MINIX_FS=y
421CONFIG_ROMFS_FS=y
422CONFIG_INOTIFY=y
423CONFIG_INOTIFY_USER=y
424# CONFIG_QUOTA is not set
425CONFIG_DNOTIFY=y
426# CONFIG_AUTOFS_FS is not set
427# CONFIG_AUTOFS4_FS is not set
428# CONFIG_FUSE_FS is not set
429
430#
431# CD-ROM/DVD Filesystems
432#
433# CONFIG_ISO9660_FS is not set
434# CONFIG_UDF_FS is not set
435
436#
437# DOS/FAT/NT Filesystems
438#
439# CONFIG_MSDOS_FS is not set
440# CONFIG_VFAT_FS is not set
441# CONFIG_NTFS_FS is not set
442
443#
444# Pseudo filesystems
445#
446CONFIG_PROC_FS=y
447CONFIG_PROC_KCORE=y
448CONFIG_PROC_SYSCTL=y
449CONFIG_SYSFS=y
450CONFIG_TMPFS=y
451# CONFIG_TMPFS_POSIX_ACL is not set
452CONFIG_HUGETLBFS=y
453CONFIG_HUGETLB_PAGE=y
454CONFIG_RAMFS=y
455# CONFIG_CONFIGFS_FS is not set
456
457#
458# Miscellaneous filesystems
459#
460# CONFIG_ADFS_FS is not set
461# CONFIG_AFFS_FS is not set
462# CONFIG_HFS_FS is not set
463# CONFIG_HFSPLUS_FS is not set
464# CONFIG_BEFS_FS is not set
465# CONFIG_BFS_FS is not set
466# CONFIG_EFS_FS is not set
467# CONFIG_CRAMFS is not set
468# CONFIG_VXFS_FS is not set
469# CONFIG_HPFS_FS is not set
470# CONFIG_QNX4FS_FS is not set
471# CONFIG_SYSV_FS is not set
472# CONFIG_UFS_FS is not set
473
474#
475# Partition Types
476#
477CONFIG_PARTITION_ADVANCED=y
478# CONFIG_ACORN_PARTITION is not set
479# CONFIG_OSF_PARTITION is not set
480# CONFIG_AMIGA_PARTITION is not set
481# CONFIG_ATARI_PARTITION is not set
482# CONFIG_MAC_PARTITION is not set
483CONFIG_MSDOS_PARTITION=y
484# CONFIG_BSD_DISKLABEL is not set
485# CONFIG_MINIX_SUBPARTITION is not set
486# CONFIG_SOLARIS_X86_PARTITION is not set
487# CONFIG_UNIXWARE_DISKLABEL is not set
488# CONFIG_LDM_PARTITION is not set
489# CONFIG_SGI_PARTITION is not set
490# CONFIG_ULTRIX_PARTITION is not set
491# CONFIG_SUN_PARTITION is not set
492# CONFIG_KARMA_PARTITION is not set
493# CONFIG_EFI_PARTITION is not set
494# CONFIG_SYSV68_PARTITION is not set
495
496#
497# Native Language Support
498#
499# CONFIG_NLS is not set
500
501#
502# Profiling support
503#
504CONFIG_PROFILING=y
505# CONFIG_OPROFILE is not set
506
507#
508# Kernel hacking
509#
510# CONFIG_PRINTK_TIME is not set
511CONFIG_ENABLE_MUST_CHECK=y
512CONFIG_MAGIC_SYSRQ=y
513# CONFIG_UNUSED_SYMBOLS is not set
514CONFIG_DEBUG_FS=y
515# CONFIG_HEADERS_CHECK is not set
516CONFIG_DEBUG_KERNEL=y
517# CONFIG_DEBUG_SHIRQ is not set
518CONFIG_DETECT_SOFTLOCKUP=y
519CONFIG_SCHED_DEBUG=y
520CONFIG_SCHEDSTATS=y
521# CONFIG_TIMER_STATS is not set
522# CONFIG_DEBUG_SLAB is not set
523# CONFIG_DEBUG_RT_MUTEXES is not set
524# CONFIG_RT_MUTEX_TESTER is not set
525# CONFIG_DEBUG_SPINLOCK is not set
526# CONFIG_DEBUG_MUTEXES is not set
527# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
528# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
529# CONFIG_DEBUG_KOBJECT is not set
530CONFIG_DEBUG_BUGVERBOSE=y
531# CONFIG_DEBUG_INFO is not set
532# CONFIG_DEBUG_VM is not set
533# CONFIG_DEBUG_LIST is not set
534CONFIG_FRAME_POINTER=y
535CONFIG_FORCED_INLINING=y
536# CONFIG_FAULT_INJECTION is not set
537# CONFIG_EARLY_PRINTK is not set
538# CONFIG_DEBUG_KERNEL_WITH_GDB_STUB is not set
539CONFIG_SH64_PROC_TLB=y
540CONFIG_SH64_PROC_ASIDS=y
541CONFIG_SH64_SR_WATCH=y
542# CONFIG_POOR_MANS_STRACE is not set
543# CONFIG_SH_ALPHANUMERIC is not set
544CONFIG_SH_NO_BSS_INIT=y
545
546#
547# Security options
548#
549# CONFIG_KEYS is not set
550# CONFIG_SECURITY is not set
551# CONFIG_CRYPTO is not set
552
553#
554# Library routines
555#
556CONFIG_BITREVERSE=y
557# CONFIG_CRC_CCITT is not set
558# CONFIG_CRC16 is not set
559# CONFIG_CRC_ITU_T is not set
560CONFIG_CRC32=y
561# CONFIG_CRC7 is not set
562# CONFIG_LIBCRC32C is not set
563CONFIG_PLIST=y
564CONFIG_HAS_IOMEM=y
565CONFIG_HAS_IOPORT=y
566CONFIG_HAS_DMA=y
diff --git a/arch/sh64/kernel/Makefile b/arch/sh64/kernel/Makefile
index 5816657c079c..e3467bda6167 100644
--- a/arch/sh64/kernel/Makefile
+++ b/arch/sh64/kernel/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_SH_DMA) += dma.o
25obj-$(CONFIG_SH_FPU) += fpu.o 25obj-$(CONFIG_SH_FPU) += fpu.o
26obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 26obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
27obj-$(CONFIG_KALLSYMS) += unwind.o 27obj-$(CONFIG_KALLSYMS) += unwind.o
28obj-$(CONFIG_PCI) += pci-dma.o pcibios.o 28obj-$(CONFIG_PCI) += pcibios.o
29obj-$(CONFIG_MODULES) += module.o 29obj-$(CONFIG_MODULES) += module.o
30 30
31ifeq ($(CONFIG_PCI),y) 31ifeq ($(CONFIG_PCI),y)
diff --git a/arch/sh64/kernel/alphanum.c b/arch/sh64/kernel/alphanum.c
index 91707c1acd70..d1619d95fbaa 100644
--- a/arch/sh64/kernel/alphanum.c
+++ b/arch/sh64/kernel/alphanum.c
@@ -13,7 +13,6 @@
13#include <linux/sched.h> 13#include <linux/sched.h>
14 14
15void mach_alphanum(int pos, unsigned char val); 15void mach_alphanum(int pos, unsigned char val);
16void mach_led(int pos, int val);
17 16
18void print_seg(char *file, int line) 17void print_seg(char *file, int line)
19{ 18{
diff --git a/arch/sh64/kernel/sh_ksyms.c b/arch/sh64/kernel/sh_ksyms.c
index 461ea3de316f..b1705acc8e64 100644
--- a/arch/sh64/kernel/sh_ksyms.c
+++ b/arch/sh64/kernel/sh_ksyms.c
@@ -31,16 +31,11 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
31 31
32/* platform dependent support */ 32/* platform dependent support */
33EXPORT_SYMBOL(dump_fpu); 33EXPORT_SYMBOL(dump_fpu);
34EXPORT_SYMBOL(iounmap);
35EXPORT_SYMBOL(enable_irq);
36EXPORT_SYMBOL(disable_irq);
37EXPORT_SYMBOL(kernel_thread); 34EXPORT_SYMBOL(kernel_thread);
38 35
39/* Networking helper routines. */ 36/* Networking helper routines. */
40EXPORT_SYMBOL(csum_partial_copy_nocheck); 37EXPORT_SYMBOL(csum_partial_copy_nocheck);
41 38
42EXPORT_SYMBOL(strstr);
43
44#ifdef CONFIG_VT 39#ifdef CONFIG_VT
45EXPORT_SYMBOL(screen_info); 40EXPORT_SYMBOL(screen_info);
46#endif 41#endif
@@ -50,27 +45,18 @@ EXPORT_SYMBOL(__down_trylock);
50EXPORT_SYMBOL(__up); 45EXPORT_SYMBOL(__up);
51EXPORT_SYMBOL(__put_user_asm_l); 46EXPORT_SYMBOL(__put_user_asm_l);
52EXPORT_SYMBOL(__get_user_asm_l); 47EXPORT_SYMBOL(__get_user_asm_l);
53EXPORT_SYMBOL(memcmp); 48EXPORT_SYMBOL(__copy_user);
54EXPORT_SYMBOL(memcpy); 49EXPORT_SYMBOL(memcpy);
55EXPORT_SYMBOL(memset); 50EXPORT_SYMBOL(udelay);
56EXPORT_SYMBOL(memscan); 51EXPORT_SYMBOL(__udelay);
57EXPORT_SYMBOL(strchr); 52EXPORT_SYMBOL(ndelay);
58EXPORT_SYMBOL(strlen); 53EXPORT_SYMBOL(__ndelay);
59
60EXPORT_SYMBOL(flush_dcache_page); 54EXPORT_SYMBOL(flush_dcache_page);
61
62/* For ext3 */
63EXPORT_SYMBOL(sh64_page_clear); 55EXPORT_SYMBOL(sh64_page_clear);
64 56
65/* Ugh. These come in from libgcc.a at link time. */ 57/* Ugh. These come in from libgcc.a at link time. */
58#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
66 59
67extern void __sdivsi3(void); 60DECLARE_EXPORT(__sdivsi3);
68extern void __muldi3(void); 61DECLARE_EXPORT(__muldi3);
69extern void __udivsi3(void); 62DECLARE_EXPORT(__udivsi3);
70extern char __div_table;
71EXPORT_SYMBOL(__sdivsi3);
72EXPORT_SYMBOL(__muldi3);
73EXPORT_SYMBOL(__udivsi3);
74EXPORT_SYMBOL(__div_table);
75
76
diff --git a/arch/sh64/kernel/time.c b/arch/sh64/kernel/time.c
index b37f4f4981d2..06f3c179e345 100644
--- a/arch/sh64/kernel/time.c
+++ b/arch/sh64/kernel/time.c
@@ -476,8 +476,18 @@ static irqreturn_t sh64_rtc_interrupt(int irq, void *dev_id)
476 return IRQ_HANDLED; 476 return IRQ_HANDLED;
477} 477}
478 478
479static struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL}; 479static struct irqaction irq0 = {
480static struct irqaction irq1 = { sh64_rtc_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "rtc", NULL, NULL}; 480 .handler = timer_interrupt,
481 .flags = IRQF_DISABLED,
482 .mask = CPU_MASK_NONE,
483 .name = "timer",
484};
485static struct irqaction irq1 = {
486 .handler = sh64_rtc_interrupt,
487 .flags = IRQF_DISABLED,
488 .mask = CPU_MASK_NONE,
489 .name = "rtc",
490};
481 491
482void __init time_init(void) 492void __init time_init(void)
483{ 493{
diff --git a/arch/sh64/kernel/vmlinux.lds.S b/arch/sh64/kernel/vmlinux.lds.S
index 267b4f9af2e1..f533a064da5f 100644
--- a/arch/sh64/kernel/vmlinux.lds.S
+++ b/arch/sh64/kernel/vmlinux.lds.S
@@ -30,14 +30,6 @@
30#define LOAD_OFFSET CONFIG_CACHED_MEMORY_OFFSET 30#define LOAD_OFFSET CONFIG_CACHED_MEMORY_OFFSET
31#include <asm-generic/vmlinux.lds.h> 31#include <asm-generic/vmlinux.lds.h>
32 32
33#ifdef NOTDEF
34#ifdef CONFIG_LITTLE_ENDIAN
35OUTPUT_FORMAT("elf32-sh64l-linux", "elf32-sh64l-linux", "elf32-sh64l-linux")
36#else
37OUTPUT_FORMAT("elf32-sh64", "elf32-sh64", "elf32-sh64")
38#endif
39#endif
40
41OUTPUT_ARCH(sh:sh5) 33OUTPUT_ARCH(sh:sh5)
42 34
43#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET) 35#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET)
@@ -74,10 +66,12 @@ SECTIONS
74 __ex_table : C_PHYS(__ex_table) { *(__ex_table) } 66 __ex_table : C_PHYS(__ex_table) { *(__ex_table) }
75 __stop___ex_table = .; 67 __stop___ex_table = .;
76 68
77 RODATA
78
79 _etext = .; /* End of text section */ 69 _etext = .; /* End of text section */
80 70
71 NOTES
72
73 RODATA
74
81 .data : C_PHYS(.data) { /* Data */ 75 .data : C_PHYS(.data) { /* Data */
82 DATA_DATA 76 DATA_DATA
83 CONSTRUCTORS 77 CONSTRUCTORS
@@ -86,13 +80,9 @@ SECTIONS
86 . = ALIGN(PAGE_SIZE); 80 . = ALIGN(PAGE_SIZE);
87 .data.page_aligned : C_PHYS(.data.page_aligned) { *(.data.page_aligned) } 81 .data.page_aligned : C_PHYS(.data.page_aligned) { *(.data.page_aligned) }
88 82
89 . = ALIGN(PAGE_SIZE); 83 PERCPU(PAGE_SIZE)
90 __per_cpu_start = .; 84
91 .data.percpu : C_PHYS(.data.percpu) { 85 . = ALIGN(L1_CACHE_BYTES);
92 *(.data.percpu)
93 *(.data.percpu.shared_aligned)
94 }
95 __per_cpu_end = . ;
96 .data.cacheline_aligned : C_PHYS(.data.cacheline_aligned) { *(.data.cacheline_aligned) } 86 .data.cacheline_aligned : C_PHYS(.data.cacheline_aligned) { *(.data.cacheline_aligned) }
97 87
98 _edata = .; /* End of data section */ 88 _edata = .; /* End of data section */
@@ -145,38 +135,6 @@ SECTIONS
145 *(.exitcall.exit) 135 *(.exitcall.exit)
146 } 136 }
147 137
148 /* Stabs debugging sections. */ 138 STABS_DEBUG
149 .stab 0 : C_PHYS(.stab) { *(.stab) } 139 DWARF_DEBUG
150 .stabstr 0 : C_PHYS(.stabstr) { *(.stabstr) }
151 .stab.excl 0 : C_PHYS(.stab.excl) { *(.stab.excl) }
152 .stab.exclstr 0 : C_PHYS(.stab.exclstr) { *(.stab.exclstr) }
153 .stab.index 0 : C_PHYS(.stab.index) { *(.stab.index) }
154 .stab.indexstr 0 : C_PHYS(.stab.indexstr) { *(.stab.indexstr) }
155 .comment 0 : C_PHYS(.comment) { *(.comment) }
156 /* DWARF debug sections.
157 Symbols in the DWARF debugging section are relative to the beginning
158 of the section so we begin .debug at 0. */
159 /* DWARF 1 */
160 .debug 0 : C_PHYS(.debug) { *(.debug) }
161 .line 0 : C_PHYS(.line) { *(.line) }
162 /* GNU DWARF 1 extensions */
163 .debug_srcinfo 0 : C_PHYS(.debug_srcinfo) { *(.debug_srcinfo) }
164 .debug_sfnames 0 : C_PHYS(.debug_sfnames) { *(.debug_sfnames) }
165 /* DWARF 1.1 and DWARF 2 */
166 .debug_aranges 0 : C_PHYS(.debug_aranges) { *(.debug_aranges) }
167 .debug_pubnames 0 : C_PHYS(.debug_pubnames) { *(.debug_pubnames) }
168 /* DWARF 2 */
169 .debug_info 0 : C_PHYS(.debug_info) { *(.debug_info) }
170 .debug_abbrev 0 : C_PHYS(.debug_abbrev) { *(.debug_abbrev) }
171 .debug_line 0 : C_PHYS(.debug_line) { *(.debug_line) }
172 .debug_frame 0 : C_PHYS(.debug_frame) { *(.debug_frame) }
173 .debug_str 0 : C_PHYS(.debug_str) { *(.debug_str) }
174 .debug_loc 0 : C_PHYS(.debug_loc) { *(.debug_loc) }
175 .debug_macinfo 0 : C_PHYS(.debug_macinfo) { *(.debug_macinfo) }
176 /* SGI/MIPS DWARF 2 extensions */
177 .debug_weaknames 0 : C_PHYS(.debug_weaknames) { *(.debug_weaknames) }
178 .debug_funcnames 0 : C_PHYS(.debug_funcnames) { *(.debug_funcnames) }
179 .debug_typenames 0 : C_PHYS(.debug_typenames) { *(.debug_typenames) }
180 .debug_varnames 0 : C_PHYS(.debug_varnames) { *(.debug_varnames) }
181 /* These must appear regardless of . */
182} 140}
diff --git a/arch/sh64/lib/c-checksum.c b/arch/sh64/lib/c-checksum.c
index bd5501760240..053137abd8a0 100644
--- a/arch/sh64/lib/c-checksum.c
+++ b/arch/sh64/lib/c-checksum.c
@@ -10,6 +10,7 @@
10#include <linux/string.h> 10#include <linux/string.h>
11#include <linux/errno.h> 11#include <linux/errno.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/module.h>
13#include <asm/byteorder.h> 14#include <asm/byteorder.h>
14#include <asm/uaccess.h> 15#include <asm/uaccess.h>
15 16
@@ -110,7 +111,7 @@ static unsigned long do_csum(const unsigned char *buff, int len)
110 if (odd) 111 if (odd)
111 result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); 112 result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
112 113
113 pr_debug("\nCHECKSUM is 0x%x\n", result); 114 pr_debug("\nCHECKSUM is 0x%lx\n", result);
114 115
115 out: 116 out:
116 return result; 117 return result;
diff --git a/arch/sh64/lib/io.c b/arch/sh64/lib/io.c
index 587baa3dffb9..a3f3a2b8e25b 100644
--- a/arch/sh64/lib/io.c
+++ b/arch/sh64/lib/io.c
@@ -11,30 +11,11 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/module.h>
14#include <asm/system.h> 15#include <asm/system.h>
15#include <asm/processor.h> 16#include <asm/processor.h>
16#include <asm/io.h> 17#include <asm/io.h>
17 18
18/*
19 * readX/writeX() are used to access memory mapped devices. On some
20 * architectures the memory mapped IO stuff needs to be accessed
21 * differently. On the SuperH architecture, we just read/write the
22 * memory location directly.
23 */
24
25/* This is horrible at the moment - needs more work to do something sensible */
26#define IO_DELAY()
27
28#define OUT_DELAY(x,type) \
29void out##x##_p(unsigned type value,unsigned long port){out##x(value,port);IO_DELAY();}
30
31#define IN_DELAY(x,type) \
32unsigned type in##x##_p(unsigned long port) {unsigned type tmp=in##x(port);IO_DELAY();return tmp;}
33
34#if 1
35OUT_DELAY(b, long) OUT_DELAY(w, long) OUT_DELAY(l, long)
36 IN_DELAY(b, long) IN_DELAY(w, long) IN_DELAY(l, long)
37#endif
38/* Now for the string version of these functions */ 19/* Now for the string version of these functions */
39void outsb(unsigned long port, const void *addr, unsigned long count) 20void outsb(unsigned long port, const void *addr, unsigned long count)
40{ 21{
@@ -45,6 +26,7 @@ void outsb(unsigned long port, const void *addr, unsigned long count)
45 outb(*p, port); 26 outb(*p, port);
46 } 27 }
47} 28}
29EXPORT_SYMBOL(outsb);
48 30
49void insb(unsigned long port, void *addr, unsigned long count) 31void insb(unsigned long port, void *addr, unsigned long count)
50{ 32{
@@ -55,6 +37,7 @@ void insb(unsigned long port, void *addr, unsigned long count)
55 *p = inb(port); 37 *p = inb(port);
56 } 38 }
57} 39}
40EXPORT_SYMBOL(insb);
58 41
59/* For the 16 and 32 bit string functions, we have to worry about alignment. 42/* For the 16 and 32 bit string functions, we have to worry about alignment.
60 * The SH does not do unaligned accesses, so we have to read as bytes and 43 * The SH does not do unaligned accesses, so we have to read as bytes and
@@ -74,6 +57,7 @@ void outsw(unsigned long port, const void *addr, unsigned long count)
74 outw(tmp, port); 57 outw(tmp, port);
75 } 58 }
76} 59}
60EXPORT_SYMBOL(outsw);
77 61
78void insw(unsigned long port, void *addr, unsigned long count) 62void insw(unsigned long port, void *addr, unsigned long count)
79{ 63{
@@ -87,6 +71,7 @@ void insw(unsigned long port, void *addr, unsigned long count)
87 p[1] = (tmp >> 8) & 0xff; 71 p[1] = (tmp >> 8) & 0xff;
88 } 72 }
89} 73}
74EXPORT_SYMBOL(insw);
90 75
91void outsl(unsigned long port, const void *addr, unsigned long count) 76void outsl(unsigned long port, const void *addr, unsigned long count)
92{ 77{
@@ -100,6 +85,7 @@ void outsl(unsigned long port, const void *addr, unsigned long count)
100 outl(tmp, port); 85 outl(tmp, port);
101 } 86 }
102} 87}
88EXPORT_SYMBOL(outsl);
103 89
104void insl(unsigned long port, void *addr, unsigned long count) 90void insl(unsigned long port, void *addr, unsigned long count)
105{ 91{
@@ -116,6 +102,7 @@ void insl(unsigned long port, void *addr, unsigned long count)
116 102
117 } 103 }
118} 104}
105EXPORT_SYMBOL(insl);
119 106
120void memcpy_toio(void __iomem *to, const void *from, long count) 107void memcpy_toio(void __iomem *to, const void *from, long count)
121{ 108{
@@ -126,6 +113,7 @@ void memcpy_toio(void __iomem *to, const void *from, long count)
126 writeb(*p++, to++); 113 writeb(*p++, to++);
127 } 114 }
128} 115}
116EXPORT_SYMBOL(memcpy_toio);
129 117
130void memcpy_fromio(void *to, void __iomem *from, long count) 118void memcpy_fromio(void *to, void __iomem *from, long count)
131{ 119{
@@ -137,3 +125,4 @@ void memcpy_fromio(void *to, void __iomem *from, long count)
137 from++; 125 from++;
138 } 126 }
139} 127}
128EXPORT_SYMBOL(memcpy_fromio);
diff --git a/arch/sh64/lib/iomap.c b/arch/sh64/lib/iomap.c
index 5cd3d5e9c762..253d1e351d49 100644
--- a/arch/sh64/lib/iomap.c
+++ b/arch/sh64/lib/iomap.c
@@ -17,12 +17,15 @@ ioport_map(unsigned long port, unsigned int len)
17{ 17{
18 return (void __iomem *)port; 18 return (void __iomem *)port;
19} 19}
20EXPORT_SYMBOL(ioport_map);
20 21
21void ioport_unmap(void __iomem *addr) 22void ioport_unmap(void __iomem *addr)
22{ 23{
23 /* Nothing .. */ 24 /* Nothing .. */
24} 25}
26EXPORT_SYMBOL(ioport_unmap);
25 27
28#ifdef CONFIG_PCI
26void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max) 29void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
27{ 30{
28 unsigned long start = pci_resource_start(dev, bar); 31 unsigned long start = pci_resource_start(dev, bar);
@@ -41,14 +44,11 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
41 /* What? */ 44 /* What? */
42 return NULL; 45 return NULL;
43} 46}
47EXPORT_SYMBOL(pci_iomap);
44 48
45void pci_iounmap(struct pci_dev *dev, void __iomem *addr) 49void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
46{ 50{
47 /* Nothing .. */ 51 /* Nothing .. */
48} 52}
49
50EXPORT_SYMBOL(ioport_map);
51EXPORT_SYMBOL(ioport_unmap);
52EXPORT_SYMBOL(pci_iomap);
53EXPORT_SYMBOL(pci_iounmap); 53EXPORT_SYMBOL(pci_iounmap);
54 54#endif
diff --git a/arch/sh64/mach-cayman/setup.c b/arch/sh64/mach-cayman/setup.c
index c3611cc2735f..726c520d7eb9 100644
--- a/arch/sh64/mach-cayman/setup.c
+++ b/arch/sh64/mach-cayman/setup.c
@@ -18,19 +18,11 @@
18 * lethal@linux-sh.org: 15th May 2003 18 * lethal@linux-sh.org: 15th May 2003
19 * Use the generic procfs cpuinfo interface, just return a valid board name. 19 * Use the generic procfs cpuinfo interface, just return a valid board name.
20 */ 20 */
21
22#include <linux/stddef.h>
23#include <linux/init.h> 21#include <linux/init.h>
24#include <linux/mm.h>
25#include <linux/bootmem.h>
26#include <linux/delay.h>
27#include <linux/kernel.h> 22#include <linux/kernel.h>
28#include <linux/seq_file.h>
29#include <asm/processor.h>
30#include <asm/platform.h> 23#include <asm/platform.h>
31#include <asm/io.h>
32#include <asm/irq.h> 24#include <asm/irq.h>
33#include <asm/page.h> 25#include <asm/io.h>
34 26
35/* 27/*
36 * Platform Dependent Interrupt Priorities. 28 * Platform Dependent Interrupt Priorities.
diff --git a/arch/sh64/mach-harp/Makefile b/arch/sh64/mach-harp/Makefile
index 63f065bad2f9..2f2963fa2131 100644
--- a/arch/sh64/mach-harp/Makefile
+++ b/arch/sh64/mach-harp/Makefile
@@ -1,14 +1 @@
1#
2# Makefile for the ST50 Harp specific parts of the kernel
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9O_TARGET := harp.o
10
11obj-y := setup.o obj-y := setup.o
12
13include $(TOPDIR)/Rules.make
14
diff --git a/arch/sh64/mach-harp/setup.c b/arch/sh64/mach-harp/setup.c
index fcd90afac297..05011cb369bb 100644
--- a/arch/sh64/mach-harp/setup.c
+++ b/arch/sh64/mach-harp/setup.c
@@ -17,20 +17,10 @@
17 * lethal@linux-sh.org: 15th May 2003 17 * lethal@linux-sh.org: 15th May 2003
18 * Use the generic procfs cpuinfo interface, just return a valid board name. 18 * Use the generic procfs cpuinfo interface, just return a valid board name.
19 */ 19 */
20
21#include <linux/stddef.h>
22#include <linux/init.h> 20#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/bootmem.h>
25#include <linux/delay.h>
26#include <linux/kernel.h> 21#include <linux/kernel.h>
27#include <asm/processor.h>
28#include <asm/platform.h> 22#include <asm/platform.h>
29#include <asm/io.h>
30#include <asm/irq.h> 23#include <asm/irq.h>
31#include <asm/page.h>
32
33#define RES_COUNT(res) ((sizeof((res))/sizeof(struct resource)))
34 24
35/* 25/*
36 * Platform Dependent Interrupt Priorities. 26 * Platform Dependent Interrupt Priorities.
@@ -78,8 +68,10 @@ struct resource io_resources[] = {
78}; 68};
79 69
80struct resource kram_resources[] = { 70struct resource kram_resources[] = {
81 { "Kernel code", 0, 0 }, /* These must be last in the array */ 71 /* These must be last in the array */
82 { "Kernel data", 0, 0 } /* These must be last in the array */ 72 { .name = "Kernel code", .start = 0, .end = 0 },
73 /* These must be last in the array */
74 { .name = "Kernel data", .start = 0, .end = 0 }
83}; 75};
84 76
85struct resource xram_resources[] = { 77struct resource xram_resources[] = {
@@ -95,13 +87,13 @@ struct sh64_platform platform_parms = {
95 .initial_root_dev = 0x0100, 87 .initial_root_dev = 0x0100,
96 .loader_type = 1, 88 .loader_type = 1,
97 .io_res_p = io_resources, 89 .io_res_p = io_resources,
98 .io_res_count = RES_COUNT(io_resources), 90 .io_res_count = ARRAY_SIZE(io_resources),
99 .kram_res_p = kram_resources, 91 .kram_res_p = kram_resources,
100 .kram_res_count = RES_COUNT(kram_resources), 92 .kram_res_count = ARRAY_SIZE(kram_resources),
101 .xram_res_p = xram_resources, 93 .xram_res_p = xram_resources,
102 .xram_res_count = RES_COUNT(xram_resources), 94 .xram_res_count = ARRAY_SIZE(xram_resources),
103 .rom_res_p = rom_resources, 95 .rom_res_p = rom_resources,
104 .rom_res_count = RES_COUNT(rom_resources), 96 .rom_res_count = ARRAY_SIZE(rom_resources),
105}; 97};
106 98
107int platform_int_priority[NR_INTC_IRQS] = { 99int platform_int_priority[NR_INTC_IRQS] = {
@@ -135,4 +127,3 @@ const char *get_system_type(void)
135{ 127{
136 return "ST50 Harp"; 128 return "ST50 Harp";
137} 129}
138
diff --git a/arch/sh64/mach-romram/Makefile b/arch/sh64/mach-romram/Makefile
deleted file mode 100644
index 02d05c05afa1..000000000000
--- a/arch/sh64/mach-romram/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
1#
2# Makefile for the SH-5 ROM/RAM specific parts of the kernel
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9O_TARGET := romram.o
10
11obj-y := setup.o
12
13include $(TOPDIR)/Rules.make
14
diff --git a/arch/sh64/mach-romram/setup.c b/arch/sh64/mach-romram/setup.c
deleted file mode 100644
index eb98a1640cc1..000000000000
--- a/arch/sh64/mach-romram/setup.c
+++ /dev/null
@@ -1,141 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-romram/setup.c
7 *
8 * SH-5 ROM/RAM Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 *
14 * benedict.gaster@superh.com: 3rd May 2002
15 * Added support for ramdisk, removing statically linked romfs at the same time. *
16 *
17 * lethal@linux-sh.org: 15th May 2003
18 * Use the generic procfs cpuinfo interface, just return a valid board name.
19 *
20 * Sean.McGoogan@superh.com 17th Feb 2004
21 * copied from arch/sh64/mach-harp/setup.c
22 */
23
24#include <linux/stddef.h>
25#include <linux/init.h>
26#include <linux/mm.h>
27#include <linux/bootmem.h>
28#include <linux/delay.h>
29#include <linux/kernel.h>
30#include <asm/processor.h>
31#include <asm/platform.h>
32#include <asm/io.h>
33#include <asm/irq.h>
34#include <asm/page.h>
35
36#define RES_COUNT(res) ((sizeof((res))/sizeof(struct resource)))
37
38/*
39 * Platform Dependent Interrupt Priorities.
40 */
41
42/* Using defaults defined in irq.h */
43#define RES NO_PRIORITY /* Disabled */
44#define IR0 IRL0_PRIORITY /* IRLs */
45#define IR1 IRL1_PRIORITY
46#define IR2 IRL2_PRIORITY
47#define IR3 IRL3_PRIORITY
48#define PCA INTA_PRIORITY /* PCI Ints */
49#define PCB INTB_PRIORITY
50#define PCC INTC_PRIORITY
51#define PCD INTD_PRIORITY
52#define SER TOP_PRIORITY
53#define ERR TOP_PRIORITY
54#define PW0 TOP_PRIORITY
55#define PW1 TOP_PRIORITY
56#define PW2 TOP_PRIORITY
57#define PW3 TOP_PRIORITY
58#define DM0 NO_PRIORITY /* DMA Ints */
59#define DM1 NO_PRIORITY
60#define DM2 NO_PRIORITY
61#define DM3 NO_PRIORITY
62#define DAE NO_PRIORITY
63#define TU0 TIMER_PRIORITY /* TMU Ints */
64#define TU1 NO_PRIORITY
65#define TU2 NO_PRIORITY
66#define TI2 NO_PRIORITY
67#define ATI NO_PRIORITY /* RTC Ints */
68#define PRI NO_PRIORITY
69#define CUI RTC_PRIORITY
70#define ERI SCIF_PRIORITY /* SCIF Ints */
71#define RXI SCIF_PRIORITY
72#define BRI SCIF_PRIORITY
73#define TXI SCIF_PRIORITY
74#define ITI TOP_PRIORITY /* WDT Ints */
75
76/*
77 * Platform dependent structures: maps and parms block.
78 */
79struct resource io_resources[] = {
80 /* To be updated with external devices */
81};
82
83struct resource kram_resources[] = {
84 { "Kernel code", 0, 0 }, /* These must be last in the array */
85 { "Kernel data", 0, 0 } /* These must be last in the array */
86};
87
88struct resource xram_resources[] = {
89 /* To be updated with external devices */
90};
91
92struct resource rom_resources[] = {
93 /* To be updated with external devices */
94};
95
96struct sh64_platform platform_parms = {
97 .readonly_rootfs = 1,
98 .initial_root_dev = 0x0100,
99 .loader_type = 1,
100 .io_res_p = io_resources,
101 .io_res_count = RES_COUNT(io_resources),
102 .kram_res_p = kram_resources,
103 .kram_res_count = RES_COUNT(kram_resources),
104 .xram_res_p = xram_resources,
105 .xram_res_count = RES_COUNT(xram_resources),
106 .rom_res_p = rom_resources,
107 .rom_res_count = RES_COUNT(rom_resources),
108};
109
110int platform_int_priority[NR_INTC_IRQS] = {
111 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
112 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
113 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
114 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
115 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
116 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
117 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
118 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
119};
120
121void __init platform_setup(void)
122{
123 /* ROM/RAM platform leaves the decision to head.S, for now */
124 platform_parms.fpu_flags = fpu_in_use;
125}
126
127void __init platform_monitor(void)
128{
129 /* Nothing yet .. */
130}
131
132void __init platform_reserve(void)
133{
134 /* Nothing yet .. */
135}
136
137const char *get_system_type(void)
138{
139 return "ROM/RAM";
140}
141
diff --git a/arch/sh64/mach-sim/Makefile b/arch/sh64/mach-sim/Makefile
index 819c4078fdc6..2f2963fa2131 100644
--- a/arch/sh64/mach-sim/Makefile
+++ b/arch/sh64/mach-sim/Makefile
@@ -1,14 +1 @@
1#
2# Makefile for the SH-5 Simulator specific parts of the kernel
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9O_TARGET := sim.o
10
11obj-y := setup.o obj-y := setup.o
12
13include $(TOPDIR)/Rules.make
14
diff --git a/arch/sh64/mach-sim/setup.c b/arch/sh64/mach-sim/setup.c
index f09400c1ad1b..e3386ec1ce1f 100644
--- a/arch/sh64/mach-sim/setup.c
+++ b/arch/sh64/mach-sim/setup.c
@@ -14,46 +14,10 @@
14 * lethal@linux-sh.org: 15th May 2003 14 * lethal@linux-sh.org: 15th May 2003
15 * Use the generic procfs cpuinfo interface, just return a valid board name. 15 * Use the generic procfs cpuinfo interface, just return a valid board name.
16 */ 16 */
17
18#include <linux/stddef.h>
19#include <linux/init.h> 17#include <linux/init.h>
20#include <linux/mm.h>
21#include <linux/bootmem.h>
22#include <linux/delay.h>
23#include <linux/kernel.h> 18#include <linux/kernel.h>
24#include <asm/addrspace.h>
25#include <asm/processor.h>
26#include <asm/platform.h> 19#include <asm/platform.h>
27#include <asm/io.h>
28#include <asm/irq.h> 20#include <asm/irq.h>
29#include <asm/page.h>
30
31#ifdef CONFIG_BLK_DEV_INITRD
32#include "../rootfs/rootfs.h"
33#endif
34
35static __init void platform_monitor(void);
36static __init void platform_setup(void);
37static __init void platform_reserve(void);
38
39
40#define PHYS_MEMORY CONFIG_MEMORY_SIZE_IN_MB*1024*1024
41
42#if (PHYS_MEMORY < P1SEG_FOOTPRINT_RAM)
43#error "Invalid kernel configuration. Physical memory below footprint requirements."
44#endif
45
46#define RAM_DISK_START CONFIG_MEMORY_START+P1SEG_INITRD_BLOCK /* Top of 4MB */
47#ifdef PLATFORM_ROMFS_SIZE
48#define RAM_DISK_SIZE (PAGE_ALIGN(PLATFORM_ROMFS_SIZE)) /* Variable Top */
49#if ((RAM_DISK_START + RAM_DISK_SIZE) > (CONFIG_MEMORY_START + PHYS_MEMORY))
50#error "Invalid kernel configuration. ROM RootFS exceeding physical memory."
51#endif
52#else
53#define RAM_DISK_SIZE P1SEG_INITRD_BLOCK_SIZE /* Top of 4MB */
54#endif
55
56#define RES_COUNT(res) ((sizeof((res))/sizeof(struct resource)))
57 21
58/* 22/*
59 * Platform Dependent Interrupt Priorities. 23 * Platform Dependent Interrupt Priorities.
@@ -101,8 +65,10 @@ struct resource io_resources[] = {
101}; 65};
102 66
103struct resource kram_resources[] = { 67struct resource kram_resources[] = {
104 { "Kernel code", 0, 0 }, /* These must be last in the array */ 68 /* These must be last in the array */
105 { "Kernel data", 0, 0 } /* These must be last in the array */ 69 { .name = "Kernel code", .start = 0, .end = 0 },
70 /* These must be last in the array */
71 { .name = "Kernel data", .start = 0, .end = 0 }
106}; 72};
107 73
108struct resource xram_resources[] = { 74struct resource xram_resources[] = {
@@ -117,16 +83,14 @@ struct sh64_platform platform_parms = {
117 .readonly_rootfs = 1, 83 .readonly_rootfs = 1,
118 .initial_root_dev = 0x0100, 84 .initial_root_dev = 0x0100,
119 .loader_type = 1, 85 .loader_type = 1,
120 .initrd_start = RAM_DISK_START,
121 .initrd_size = RAM_DISK_SIZE,
122 .io_res_p = io_resources, 86 .io_res_p = io_resources,
123 .io_res_count = RES_COUNT(io_resources), 87 .io_res_count = ARRAY_SIZE(io_resources),
124 .kram_res_p = kram_resources, 88 .kram_res_p = kram_resources,
125 .kram_res_count = RES_COUNT(kram_resources), 89 .kram_res_count = ARRAY_SIZE(kram_resources),
126 .xram_res_p = xram_resources, 90 .xram_res_p = xram_resources,
127 .xram_res_count = RES_COUNT(xram_resources), 91 .xram_res_count = ARRAY_SIZE(xram_resources),
128 .rom_res_p = rom_resources, 92 .rom_res_p = rom_resources,
129 .rom_res_count = RES_COUNT(rom_resources), 93 .rom_res_count = ARRAY_SIZE(rom_resources),
130}; 94};
131 95
132int platform_int_priority[NR_IRQS] = { 96int platform_int_priority[NR_IRQS] = {
@@ -160,4 +124,3 @@ const char *get_system_type(void)
160{ 124{
161 return "SH-5 Simulator"; 125 return "SH-5 Simulator";
162} 126}
163
diff --git a/arch/sh64/mm/Makefile b/arch/sh64/mm/Makefile
index ff19378ac90a..d0e813632480 100644
--- a/arch/sh64/mm/Makefile
+++ b/arch/sh64/mm/Makefile
@@ -13,7 +13,8 @@
13# unless it's something special (ie not a .c file). 13# unless it's something special (ie not a .c file).
14# 14#
15 15
16obj-y := init.o fault.o ioremap.o extable.o cache.o tlbmiss.o tlb.o 16obj-y := cache.o consistent.o extable.o fault.o init.o ioremap.o \
17 tlbmiss.o tlb.o
17 18
18obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 19obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
19 20
@@ -41,4 +42,3 @@ CFLAGS_tlbmiss.o += -ffixed-r7 \
41 -ffixed-r41 -ffixed-r42 -ffixed-r43 \ 42 -ffixed-r41 -ffixed-r42 -ffixed-r43 \
42 -ffixed-r60 -ffixed-r61 -ffixed-r62 \ 43 -ffixed-r60 -ffixed-r61 -ffixed-r62 \
43 -fomit-frame-pointer 44 -fomit-frame-pointer
44
diff --git a/arch/sh64/kernel/pci-dma.c b/arch/sh64/mm/consistent.c
index a9328f894755..8875a2a40da7 100644
--- a/arch/sh64/kernel/pci-dma.c
+++ b/arch/sh64/mm/consistent.c
@@ -11,6 +11,7 @@
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/module.h>
14#include <asm/io.h> 15#include <asm/io.h>
15 16
16void *consistent_alloc(struct pci_dev *hwdev, size_t size, 17void *consistent_alloc(struct pci_dev *hwdev, size_t size,
@@ -36,6 +37,7 @@ void *consistent_alloc(struct pci_dev *hwdev, size_t size,
36 37
37 return vp; 38 return vp;
38} 39}
40EXPORT_SYMBOL(consistent_alloc);
39 41
40void consistent_free(struct pci_dev *hwdev, size_t size, 42void consistent_free(struct pci_dev *hwdev, size_t size,
41 void *vaddr, dma_addr_t dma_handle) 43 void *vaddr, dma_addr_t dma_handle)
@@ -47,4 +49,4 @@ void consistent_free(struct pci_dev *hwdev, size_t size,
47 49
48 iounmap(vaddr); 50 iounmap(vaddr);
49} 51}
50 52EXPORT_SYMBOL(consistent_free);
diff --git a/arch/sh64/mm/init.c b/arch/sh64/mm/init.c
index 559717f30d1f..21cf42de23e2 100644
--- a/arch/sh64/mm/init.c
+++ b/arch/sh64/mm/init.c
@@ -22,10 +22,6 @@
22#include <asm/pgtable.h> 22#include <asm/pgtable.h>
23#include <asm/tlb.h> 23#include <asm/tlb.h>
24 24
25#ifdef CONFIG_BLK_DEV_INITRD
26#include <linux/blk.h>
27#endif
28
29DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 25DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
30 26
31/* 27/*
diff --git a/arch/sh64/mm/ioremap.c b/arch/sh64/mm/ioremap.c
index 990857756d44..535304e6601f 100644
--- a/arch/sh64/mm/ioremap.c
+++ b/arch/sh64/mm/ioremap.c
@@ -19,11 +19,12 @@
19#include <linux/sched.h> 19#include <linux/sched.h>
20#include <linux/string.h> 20#include <linux/string.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <asm/pgalloc.h>
23#include <asm/tlbflush.h>
24#include <linux/ioport.h> 22#include <linux/ioport.h>
25#include <linux/bootmem.h> 23#include <linux/bootmem.h>
26#include <linux/proc_fs.h> 24#include <linux/proc_fs.h>
25#include <linux/module.h>
26#include <asm/pgalloc.h>
27#include <asm/tlbflush.h>
27 28
28static void shmedia_mapioaddr(unsigned long, unsigned long); 29static void shmedia_mapioaddr(unsigned long, unsigned long);
29static unsigned long shmedia_ioremap(struct resource *, u32, int); 30static unsigned long shmedia_ioremap(struct resource *, u32, int);
@@ -80,6 +81,7 @@ void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flag
80 } 81 }
81 return (void *) (offset + (char *)addr); 82 return (void *) (offset + (char *)addr);
82} 83}
84EXPORT_SYMBOL(__ioremap);
83 85
84void iounmap(void *addr) 86void iounmap(void *addr)
85{ 87{
@@ -94,6 +96,7 @@ void iounmap(void *addr)
94 96
95 kfree(area); 97 kfree(area);
96} 98}
99EXPORT_SYMBOL(iounmap);
97 100
98static struct resource shmedia_iomap = { 101static struct resource shmedia_iomap = {
99 .name = "shmedia_iomap", 102 .name = "shmedia_iomap",
diff --git a/arch/sparc/Kconfig.debug b/arch/sparc/Kconfig.debug
index 120f6b529348..87dd496f15eb 100644
--- a/arch/sparc/Kconfig.debug
+++ b/arch/sparc/Kconfig.debug
@@ -1,5 +1,9 @@
1menu "Kernel hacking" 1menu "Kernel hacking"
2 2
3config TRACE_IRQFLAGS_SUPPORT
4 bool
5 default y
6
3source "lib/Kconfig.debug" 7source "lib/Kconfig.debug"
4 8
5config DEBUG_STACK_USAGE 9config DEBUG_STACK_USAGE
diff --git a/arch/sparc/kernel/irq.c b/arch/sparc/kernel/irq.c
index b76dc03fc318..722d67d32961 100644
--- a/arch/sparc/kernel/irq.c
+++ b/arch/sparc/kernel/irq.c
@@ -56,7 +56,7 @@
56#define SMP_NOP2 56#define SMP_NOP2
57#define SMP_NOP3 57#define SMP_NOP3
58#endif /* SMP */ 58#endif /* SMP */
59unsigned long __local_irq_save(void) 59unsigned long __raw_local_irq_save(void)
60{ 60{
61 unsigned long retval; 61 unsigned long retval;
62 unsigned long tmp; 62 unsigned long tmp;
@@ -74,7 +74,7 @@ unsigned long __local_irq_save(void)
74 return retval; 74 return retval;
75} 75}
76 76
77void local_irq_enable(void) 77void raw_local_irq_enable(void)
78{ 78{
79 unsigned long tmp; 79 unsigned long tmp;
80 80
@@ -89,7 +89,7 @@ void local_irq_enable(void)
89 : "memory"); 89 : "memory");
90} 90}
91 91
92void local_irq_restore(unsigned long old_psr) 92void raw_local_irq_restore(unsigned long old_psr)
93{ 93{
94 unsigned long tmp; 94 unsigned long tmp;
95 95
@@ -105,9 +105,9 @@ void local_irq_restore(unsigned long old_psr)
105 : "memory"); 105 : "memory");
106} 106}
107 107
108EXPORT_SYMBOL(__local_irq_save); 108EXPORT_SYMBOL(__raw_local_irq_save);
109EXPORT_SYMBOL(local_irq_enable); 109EXPORT_SYMBOL(raw_local_irq_enable);
110EXPORT_SYMBOL(local_irq_restore); 110EXPORT_SYMBOL(raw_local_irq_restore);
111 111
112/* 112/*
113 * Dave Redman (djhr@tadpole.co.uk) 113 * Dave Redman (djhr@tadpole.co.uk)
diff --git a/arch/sparc/kernel/of_device.c b/arch/sparc/kernel/of_device.c
index 36383f73d685..fb2caef79cec 100644
--- a/arch/sparc/kernel/of_device.c
+++ b/arch/sparc/kernel/of_device.c
@@ -588,7 +588,10 @@ __setup("of_debug=", of_debug);
588int of_register_driver(struct of_platform_driver *drv, struct bus_type *bus) 588int of_register_driver(struct of_platform_driver *drv, struct bus_type *bus)
589{ 589{
590 /* initialize common driver fields */ 590 /* initialize common driver fields */
591 drv->driver.name = drv->name; 591 if (!drv->driver.name)
592 drv->driver.name = drv->name;
593 if (!drv->driver.owner)
594 drv->driver.owner = drv->owner;
592 drv->driver.bus = bus; 595 drv->driver.bus = bus;
593 596
594 /* register with core */ 597 /* register with core */
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c
index 6a2513321620..4bf78a5e8e0f 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time.c
@@ -347,9 +347,11 @@ static struct of_device_id clock_match[] = {
347}; 347};
348 348
349static struct of_platform_driver clock_driver = { 349static struct of_platform_driver clock_driver = {
350 .name = "clock",
351 .match_table = clock_match, 350 .match_table = clock_match,
352 .probe = clock_probe, 351 .probe = clock_probe,
352 .driver = {
353 .name = "clock",
354 },
353}; 355};
354 356
355 357
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 15109c156e83..a8b4200f9cc3 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -1,6 +1,7 @@
1/* ld script to make SparcLinux kernel */ 1/* ld script to make SparcLinux kernel */
2 2
3#include <asm-generic/vmlinux.lds.h> 3#include <asm-generic/vmlinux.lds.h>
4#include <asm/page.h>
4 5
5OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") 6OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
6OUTPUT_ARCH(sparc) 7OUTPUT_ARCH(sparc)
@@ -8,84 +9,104 @@ ENTRY(_start)
8jiffies = jiffies_64 + 4; 9jiffies = jiffies_64 + 4;
9SECTIONS 10SECTIONS
10{ 11{
11 . = 0x10000 + SIZEOF_HEADERS; 12 . = 0x10000 + SIZEOF_HEADERS;
12 .text 0xf0004000 : 13 .text 0xf0004000 :
13 { 14 {
14 _text = .; 15 _text = .;
15 TEXT_TEXT 16 TEXT_TEXT
16 SCHED_TEXT 17 SCHED_TEXT
17 LOCK_TEXT 18 LOCK_TEXT
18 *(.gnu.warning) 19 *(.gnu.warning)
19 } =0 20 } = 0
20 _etext = .; 21 _etext = .;
21 PROVIDE (etext = .); 22 PROVIDE (etext = .);
22 RODATA 23 RODATA
23 .data : 24 .data : {
24 { 25 DATA_DATA
25 DATA_DATA 26 CONSTRUCTORS
26 CONSTRUCTORS 27 }
27 } 28 .data1 : {
28 .data1 : { *(.data1) } 29 *(.data1)
29 _edata = .; 30 }
30 PROVIDE (edata = .); 31 _edata = .;
31 __start___fixup = .; 32 PROVIDE (edata = .);
32 .fixup : { *(.fixup) }
33 __stop___fixup = .;
34 __start___ex_table = .;
35 __ex_table : { *(__ex_table) }
36 __stop___ex_table = .;
37 33
38 NOTES 34 .fixup : {
35 __start___fixup = .;
36 *(.fixup)
37 __stop___fixup = .;
38 }
39 __ex_table : {
40 __start___ex_table = .;
41 *(__ex_table)
42 __stop___ex_table = .;
43 }
39 44
40 . = ALIGN(4096); 45 NOTES
41 __init_begin = .; 46
42 _sinittext = .; 47 . = ALIGN(PAGE_SIZE);
43 .init.text : { 48 __init_begin = .;
44 *(.init.text) 49 .init.text : {
45 } 50 _sinittext = .;
46 _einittext = .; 51 *(.init.text)
47 __init_text_end = .; 52 _einittext = .;
48 .init.data : { *(.init.data) } 53 }
49 . = ALIGN(16); 54 __init_text_end = .;
50 __setup_start = .; 55 .init.data : {
51 .init.setup : { *(.init.setup) } 56 *(.init.data)
52 __setup_end = .; 57 }
53 __initcall_start = .; 58 . = ALIGN(16);
54 .initcall.init : { 59 .init.setup : {
55 INITCALLS 60 __setup_start = .;
56 } 61 *(.init.setup)
57 __initcall_end = .; 62 __setup_end = .;
58 __con_initcall_start = .; 63 }
59 .con_initcall.init : { *(.con_initcall.init) } 64 .initcall.init : {
60 __con_initcall_end = .; 65 __initcall_start = .;
61 SECURITY_INIT 66 INITCALLS
67 __initcall_end = .;
68 }
69 .con_initcall.init : {
70 __con_initcall_start = .;
71 *(.con_initcall.init)
72 __con_initcall_end = .;
73 }
74 SECURITY_INIT
62 75
63#ifdef CONFIG_BLK_DEV_INITRD 76#ifdef CONFIG_BLK_DEV_INITRD
64 . = ALIGN(4096); 77 . = ALIGN(PAGE_SIZE);
65 __initramfs_start = .; 78 .init.ramfs : {
66 .init.ramfs : { *(.init.ramfs) } 79 __initramfs_start = .;
67 __initramfs_end = .; 80 *(.init.ramfs)
81 __initramfs_end = .;
82 }
68#endif 83#endif
69 84
70 PERCPU(4096) 85 PERCPU(PAGE_SIZE)
71 . = ALIGN(4096); 86 . = ALIGN(PAGE_SIZE);
72 __init_end = .; 87 __init_end = .;
73 . = ALIGN(32); 88 . = ALIGN(32);
74 .data.cacheline_aligned : { *(.data.cacheline_aligned) } 89 .data.cacheline_aligned : {
75 90 *(.data.cacheline_aligned)
76 __bss_start = .; 91 }
77 .sbss : { *(.sbss) *(.scommon) }
78 .bss :
79 {
80 *(.dynbss)
81 *(.bss)
82 *(COMMON)
83 }
84 _end = . ;
85 PROVIDE (end = .);
86 /DISCARD/ : { *(.exit.text) *(.exit.data) *(.exitcall.exit) }
87 92
88 STABS_DEBUG 93 __bss_start = .;
94 .sbss : {
95 *(.sbss)
96 *(.scommon) }
97 .bss : {
98 *(.dynbss)
99 *(.bss)
100 *(COMMON)
101 }
102 _end = . ;
103 PROVIDE (end = .);
104 /DISCARD/ : {
105 *(.exit.text)
106 *(.exit.data)
107 *(.exitcall.exit)
108 }
89 109
90 DWARF_DEBUG 110 STABS_DEBUG
111 DWARF_DEBUG
91} 112}
diff --git a/arch/sparc64/defconfig b/arch/sparc64/defconfig
index 7d07297db878..1aa2c4048e4b 100644
--- a/arch/sparc64/defconfig
+++ b/arch/sparc64/defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc6 3# Linux kernel version: 2.6.23
4# Sun Sep 16 09:52:11 2007 4# Sat Oct 13 21:53:54 2007
5# 5#
6CONFIG_SPARC=y 6CONFIG_SPARC=y
7CONFIG_SPARC64=y 7CONFIG_SPARC64=y
@@ -69,7 +69,6 @@ CONFIG_FUTEX=y
69CONFIG_ANON_INODES=y 69CONFIG_ANON_INODES=y
70CONFIG_EPOLL=y 70CONFIG_EPOLL=y
71CONFIG_SIGNALFD=y 71CONFIG_SIGNALFD=y
72CONFIG_TIMERFD=y
73CONFIG_EVENTFD=y 72CONFIG_EVENTFD=y
74CONFIG_SHMEM=y 73CONFIG_SHMEM=y
75CONFIG_VM_EVENT_COUNTERS=y 74CONFIG_VM_EVENT_COUNTERS=y
@@ -89,6 +88,7 @@ CONFIG_KMOD=y
89CONFIG_BLOCK=y 88CONFIG_BLOCK=y
90CONFIG_BLK_DEV_IO_TRACE=y 89CONFIG_BLK_DEV_IO_TRACE=y
91CONFIG_BLK_DEV_BSG=y 90CONFIG_BLK_DEV_BSG=y
91CONFIG_BLOCK_COMPAT=y
92 92
93# 93#
94# IO Schedulers 94# IO Schedulers
@@ -111,6 +111,7 @@ CONFIG_GENERIC_HARDIRQS=y
111CONFIG_TICK_ONESHOT=y 111CONFIG_TICK_ONESHOT=y
112CONFIG_NO_HZ=y 112CONFIG_NO_HZ=y
113CONFIG_HIGH_RES_TIMERS=y 113CONFIG_HIGH_RES_TIMERS=y
114CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
114# CONFIG_SMP is not set 115# CONFIG_SMP is not set
115CONFIG_CPU_FREQ=y 116CONFIG_CPU_FREQ=y
116CONFIG_CPU_FREQ_TABLE=m 117CONFIG_CPU_FREQ_TABLE=m
@@ -119,6 +120,8 @@ CONFIG_CPU_FREQ_STAT=m
119CONFIG_CPU_FREQ_STAT_DETAILS=y 120CONFIG_CPU_FREQ_STAT_DETAILS=y
120CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y 121CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
121# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set 122# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
123# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
124# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
122CONFIG_CPU_FREQ_GOV_PERFORMANCE=y 125CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
123CONFIG_CPU_FREQ_GOV_POWERSAVE=m 126CONFIG_CPU_FREQ_GOV_POWERSAVE=m
124CONFIG_CPU_FREQ_GOV_USERSPACE=m 127CONFIG_CPU_FREQ_GOV_USERSPACE=m
@@ -213,6 +216,7 @@ CONFIG_INET_TUNNEL=y
213CONFIG_INET_XFRM_MODE_TRANSPORT=y 216CONFIG_INET_XFRM_MODE_TRANSPORT=y
214CONFIG_INET_XFRM_MODE_TUNNEL=y 217CONFIG_INET_XFRM_MODE_TUNNEL=y
215CONFIG_INET_XFRM_MODE_BEET=y 218CONFIG_INET_XFRM_MODE_BEET=y
219CONFIG_INET_LRO=y
216CONFIG_INET_DIAG=y 220CONFIG_INET_DIAG=y
217CONFIG_INET_TCP_DIAG=y 221CONFIG_INET_TCP_DIAG=y
218# CONFIG_TCP_CONG_ADVANCED is not set 222# CONFIG_TCP_CONG_ADVANCED is not set
@@ -304,6 +308,7 @@ CONFIG_NET_TCPPROBE=m
304# 308#
305# Generic Driver Options 309# Generic Driver Options
306# 310#
311CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
307CONFIG_STANDALONE=y 312CONFIG_STANDALONE=y
308# CONFIG_PREVENT_FIRMWARE_BUILD is not set 313# CONFIG_PREVENT_FIRMWARE_BUILD is not set
309CONFIG_FW_LOADER=y 314CONFIG_FW_LOADER=y
@@ -355,6 +360,11 @@ CONFIG_IDE_PROC_FS=y
355# IDE chipset support/bugfixes 360# IDE chipset support/bugfixes
356# 361#
357CONFIG_IDE_GENERIC=y 362CONFIG_IDE_GENERIC=y
363# CONFIG_BLK_DEV_PLATFORM is not set
364
365#
366# PCI IDE chipsets support
367#
358CONFIG_BLK_DEV_IDEPCI=y 368CONFIG_BLK_DEV_IDEPCI=y
359# CONFIG_IDEPCI_SHARE_IRQ is not set 369# CONFIG_IDEPCI_SHARE_IRQ is not set
360CONFIG_IDEPCI_PCIBUS_ORDER=y 370CONFIG_IDEPCI_PCIBUS_ORDER=y
@@ -391,7 +401,6 @@ CONFIG_BLK_DEV_ALI15X3=y
391# CONFIG_BLK_DEV_TC86C001 is not set 401# CONFIG_BLK_DEV_TC86C001 is not set
392# CONFIG_IDE_ARM is not set 402# CONFIG_IDE_ARM is not set
393CONFIG_BLK_DEV_IDEDMA=y 403CONFIG_BLK_DEV_IDEDMA=y
394# CONFIG_IDEDMA_IVB is not set
395# CONFIG_BLK_DEV_HD is not set 404# CONFIG_BLK_DEV_HD is not set
396 405
397# 406#
@@ -505,6 +514,8 @@ CONFIG_DUMMY=m
505# CONFIG_MACVLAN is not set 514# CONFIG_MACVLAN is not set
506# CONFIG_EQUALIZER is not set 515# CONFIG_EQUALIZER is not set
507# CONFIG_TUN is not set 516# CONFIG_TUN is not set
517# CONFIG_VETH is not set
518# CONFIG_IP1000 is not set
508# CONFIG_ARCNET is not set 519# CONFIG_ARCNET is not set
509# CONFIG_PHYLIB is not set 520# CONFIG_PHYLIB is not set
510CONFIG_NET_ETHERNET=y 521CONFIG_NET_ETHERNET=y
@@ -518,13 +529,16 @@ CONFIG_CASSINI=m
518# CONFIG_NET_VENDOR_3COM is not set 529# CONFIG_NET_VENDOR_3COM is not set
519# CONFIG_NET_TULIP is not set 530# CONFIG_NET_TULIP is not set
520# CONFIG_HP100 is not set 531# CONFIG_HP100 is not set
532# CONFIG_IBM_NEW_EMAC_ZMII is not set
533# CONFIG_IBM_NEW_EMAC_RGMII is not set
534# CONFIG_IBM_NEW_EMAC_TAH is not set
535# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
521CONFIG_NET_PCI=y 536CONFIG_NET_PCI=y
522# CONFIG_PCNET32 is not set 537# CONFIG_PCNET32 is not set
523# CONFIG_AMD8111_ETH is not set 538# CONFIG_AMD8111_ETH is not set
524# CONFIG_ADAPTEC_STARFIRE is not set 539# CONFIG_ADAPTEC_STARFIRE is not set
525# CONFIG_B44 is not set 540# CONFIG_B44 is not set
526# CONFIG_FORCEDETH is not set 541# CONFIG_FORCEDETH is not set
527# CONFIG_DGRS is not set
528# CONFIG_EEPRO100 is not set 542# CONFIG_EEPRO100 is not set
529# CONFIG_E100 is not set 543# CONFIG_E100 is not set
530# CONFIG_FEALNX is not set 544# CONFIG_FEALNX is not set
@@ -543,6 +557,7 @@ CONFIG_NETDEV_1000=y
543CONFIG_E1000=m 557CONFIG_E1000=m
544CONFIG_E1000_NAPI=y 558CONFIG_E1000_NAPI=y
545# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set 559# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
560# CONFIG_E1000E is not set
546# CONFIG_MYRI_SBUS is not set 561# CONFIG_MYRI_SBUS is not set
547# CONFIG_NS83820 is not set 562# CONFIG_NS83820 is not set
548# CONFIG_HAMACHI is not set 563# CONFIG_HAMACHI is not set
@@ -560,11 +575,14 @@ CONFIG_BNX2=m
560CONFIG_NETDEV_10000=y 575CONFIG_NETDEV_10000=y
561# CONFIG_CHELSIO_T1 is not set 576# CONFIG_CHELSIO_T1 is not set
562# CONFIG_CHELSIO_T3 is not set 577# CONFIG_CHELSIO_T3 is not set
578# CONFIG_IXGBE is not set
563# CONFIG_IXGB is not set 579# CONFIG_IXGB is not set
564# CONFIG_S2IO is not set 580# CONFIG_S2IO is not set
565# CONFIG_MYRI10GE is not set 581# CONFIG_MYRI10GE is not set
566# CONFIG_NETXEN_NIC is not set 582# CONFIG_NETXEN_NIC is not set
583# CONFIG_NIU is not set
567# CONFIG_MLX4_CORE is not set 584# CONFIG_MLX4_CORE is not set
585# CONFIG_TEHUTI is not set
568# CONFIG_TR is not set 586# CONFIG_TR is not set
569 587
570# 588#
@@ -820,6 +838,12 @@ CONFIG_HWMON=y
820# CONFIG_HWMON_DEBUG_CHIP is not set 838# CONFIG_HWMON_DEBUG_CHIP is not set
821 839
822# 840#
841# Sonics Silicon Backplane
842#
843CONFIG_SSB_POSSIBLE=y
844# CONFIG_SSB is not set
845
846#
823# Multifunction device drivers 847# Multifunction device drivers
824# 848#
825# CONFIG_MFD_SM501 is not set 849# CONFIG_MFD_SM501 is not set
@@ -1399,6 +1423,7 @@ CONFIG_ASYNC_MEMCPY=m
1399CONFIG_ASYNC_XOR=m 1423CONFIG_ASYNC_XOR=m
1400CONFIG_CRYPTO=y 1424CONFIG_CRYPTO=y
1401CONFIG_CRYPTO_ALGAPI=y 1425CONFIG_CRYPTO_ALGAPI=y
1426CONFIG_CRYPTO_AEAD=m
1402CONFIG_CRYPTO_BLKCIPHER=y 1427CONFIG_CRYPTO_BLKCIPHER=y
1403CONFIG_CRYPTO_HASH=y 1428CONFIG_CRYPTO_HASH=y
1404CONFIG_CRYPTO_MANAGER=y 1429CONFIG_CRYPTO_MANAGER=y
@@ -1417,6 +1442,7 @@ CONFIG_CRYPTO_ECB=m
1417CONFIG_CRYPTO_CBC=y 1442CONFIG_CRYPTO_CBC=y
1418CONFIG_CRYPTO_PCBC=m 1443CONFIG_CRYPTO_PCBC=m
1419CONFIG_CRYPTO_LRW=m 1444CONFIG_CRYPTO_LRW=m
1445CONFIG_CRYPTO_XTS=m
1420# CONFIG_CRYPTO_CRYPTD is not set 1446# CONFIG_CRYPTO_CRYPTD is not set
1421CONFIG_CRYPTO_DES=y 1447CONFIG_CRYPTO_DES=y
1422CONFIG_CRYPTO_FCRYPT=m 1448CONFIG_CRYPTO_FCRYPT=m
@@ -1431,11 +1457,13 @@ CONFIG_CRYPTO_TEA=m
1431CONFIG_CRYPTO_ARC4=m 1457CONFIG_CRYPTO_ARC4=m
1432CONFIG_CRYPTO_KHAZAD=m 1458CONFIG_CRYPTO_KHAZAD=m
1433CONFIG_CRYPTO_ANUBIS=m 1459CONFIG_CRYPTO_ANUBIS=m
1460CONFIG_CRYPTO_SEED=m
1434CONFIG_CRYPTO_DEFLATE=y 1461CONFIG_CRYPTO_DEFLATE=y
1435CONFIG_CRYPTO_MICHAEL_MIC=m 1462CONFIG_CRYPTO_MICHAEL_MIC=m
1436CONFIG_CRYPTO_CRC32C=m 1463CONFIG_CRYPTO_CRC32C=m
1437CONFIG_CRYPTO_CAMELLIA=m 1464CONFIG_CRYPTO_CAMELLIA=m
1438CONFIG_CRYPTO_TEST=m 1465CONFIG_CRYPTO_TEST=m
1466CONFIG_CRYPTO_AUTHENC=m
1439CONFIG_CRYPTO_HW=y 1467CONFIG_CRYPTO_HW=y
1440 1468
1441# 1469#
diff --git a/arch/sparc64/kernel/Makefile b/arch/sparc64/kernel/Makefile
index 40d2f3aae91e..112c46e66578 100644
--- a/arch/sparc64/kernel/Makefile
+++ b/arch/sparc64/kernel/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_STACKTRACE) += stacktrace.o
18obj-$(CONFIG_PCI) += ebus.o isa.o pci_common.o \ 18obj-$(CONFIG_PCI) += ebus.o isa.o pci_common.o \
19 pci_psycho.o pci_sabre.o pci_schizo.o \ 19 pci_psycho.o pci_sabre.o pci_schizo.o \
20 pci_sun4v.o pci_sun4v_asm.o pci_fire.o 20 pci_sun4v.o pci_sun4v_asm.o pci_fire.o
21obj-$(CONFIG_PCI_MSI) += pci_msi.o
21obj-$(CONFIG_SMP) += smp.o trampoline.o hvtramp.o 22obj-$(CONFIG_SMP) += smp.o trampoline.o hvtramp.o
22obj-$(CONFIG_SPARC32_COMPAT) += sys32.o sys_sparc32.o signal32.o 23obj-$(CONFIG_SPARC32_COMPAT) += sys32.o sys_sparc32.o signal32.o
23obj-$(CONFIG_BINFMT_ELF32) += binfmt_elf32.o 24obj-$(CONFIG_BINFMT_ELF32) += binfmt_elf32.o
diff --git a/arch/sparc64/kernel/auxio.c b/arch/sparc64/kernel/auxio.c
index 7b379761e9f8..c55f0293eacd 100644
--- a/arch/sparc64/kernel/auxio.c
+++ b/arch/sparc64/kernel/auxio.c
@@ -148,9 +148,11 @@ static int __devinit auxio_probe(struct of_device *dev, const struct of_device_i
148} 148}
149 149
150static struct of_platform_driver auxio_driver = { 150static struct of_platform_driver auxio_driver = {
151 .name = "auxio",
152 .match_table = auxio_match, 151 .match_table = auxio_match,
153 .probe = auxio_probe, 152 .probe = auxio_probe,
153 .driver = {
154 .name = "auxio",
155 },
154}; 156};
155 157
156static int __init auxio_init(void) 158static int __init auxio_init(void)
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index 8059531bf0ac..c9b0d7af64ae 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -429,16 +429,16 @@ do_ivec:
429 stxa %g0, [%g0] ASI_INTR_RECEIVE 429 stxa %g0, [%g0] ASI_INTR_RECEIVE
430 membar #Sync 430 membar #Sync
431 431
432 sethi %hi(ivector_table), %g2 432 sethi %hi(ivector_table_pa), %g2
433 sllx %g3, 3, %g3 433 ldx [%g2 + %lo(ivector_table_pa)], %g2
434 or %g2, %lo(ivector_table), %g2 434 sllx %g3, 4, %g3
435 add %g2, %g3, %g3 435 add %g2, %g3, %g3
436 436
437 TRAP_LOAD_IRQ_WORK(%g6, %g1) 437 TRAP_LOAD_IRQ_WORK_PA(%g6, %g1)
438 438
439 lduw [%g6], %g5 /* g5 = irq_work(cpu) */ 439 ldx [%g6], %g5
440 stw %g5, [%g3 + 0x00] /* bucket->irq_chain = g5 */ 440 stxa %g5, [%g3] ASI_PHYS_USE_EC
441 stw %g3, [%g6] /* irq_work(cpu) = bucket */ 441 stx %g3, [%g6]
442 wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint 442 wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint
443 retry 443 retry
444do_ivec_xcall: 444do_ivec_xcall:
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index 23956096b3bf..f3922e5a89f6 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -21,7 +21,6 @@
21#include <linux/seq_file.h> 21#include <linux/seq_file.h>
22#include <linux/bootmem.h> 22#include <linux/bootmem.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/msi.h>
25 24
26#include <asm/ptrace.h> 25#include <asm/ptrace.h>
27#include <asm/processor.h> 26#include <asm/processor.h>
@@ -43,6 +42,7 @@
43#include <asm/auxio.h> 42#include <asm/auxio.h>
44#include <asm/head.h> 43#include <asm/head.h>
45#include <asm/hypervisor.h> 44#include <asm/hypervisor.h>
45#include <asm/cacheflush.h>
46 46
47/* UPA nodes send interrupt packet to UltraSparc with first data reg 47/* UPA nodes send interrupt packet to UltraSparc with first data reg
48 * value low 5 (7 on Starfire) bits holding the IRQ identifier being 48 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
@@ -52,86 +52,128 @@
52 * To make processing these packets efficient and race free we use 52 * To make processing these packets efficient and race free we use
53 * an array of irq buckets below. The interrupt vector handler in 53 * an array of irq buckets below. The interrupt vector handler in
54 * entry.S feeds incoming packets into per-cpu pil-indexed lists. 54 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
55 * The IVEC handler does not need to act atomically, the PIL dispatch
56 * code uses CAS to get an atomic snapshot of the list and clear it
57 * at the same time.
58 * 55 *
59 * If you make changes to ino_bucket, please update hand coded assembler 56 * If you make changes to ino_bucket, please update hand coded assembler
60 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S 57 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
61 */ 58 */
62struct ino_bucket { 59struct ino_bucket {
63 /* Next handler in per-CPU IRQ worklist. We know that 60/*0x00*/unsigned long __irq_chain_pa;
64 * bucket pointers have the high 32-bits clear, so to
65 * save space we only store the bits we need.
66 */
67/*0x00*/unsigned int irq_chain;
68 61
69 /* Virtual interrupt number assigned to this INO. */ 62 /* Virtual interrupt number assigned to this INO. */
70/*0x04*/unsigned int virt_irq; 63/*0x08*/unsigned int __virt_irq;
64/*0x0c*/unsigned int __pad;
71}; 65};
72 66
73#define NUM_IVECS (IMAP_INR + 1) 67#define NUM_IVECS (IMAP_INR + 1)
74struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES))); 68struct ino_bucket *ivector_table;
75 69unsigned long ivector_table_pa;
76#define __irq_ino(irq) \ 70
77 (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0]) 71/* On several sun4u processors, it is illegal to mix bypass and
78#define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq)) 72 * non-bypass accesses. Therefore we access all INO buckets
79#define __irq(bucket) ((unsigned int)(unsigned long)(bucket)) 73 * using bypass accesses only.
80
81/* This has to be in the main kernel image, it cannot be
82 * turned into per-cpu data. The reason is that the main
83 * kernel image is locked into the TLB and this structure
84 * is accessed from the vectored interrupt trap handler. If
85 * access to this structure takes a TLB miss it could cause
86 * the 5-level sparc v9 trap stack to overflow.
87 */ 74 */
88#define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist) 75static unsigned long bucket_get_chain_pa(unsigned long bucket_pa)
76{
77 unsigned long ret;
78
79 __asm__ __volatile__("ldxa [%1] %2, %0"
80 : "=&r" (ret)
81 : "r" (bucket_pa +
82 offsetof(struct ino_bucket,
83 __irq_chain_pa)),
84 "i" (ASI_PHYS_USE_EC));
85
86 return ret;
87}
88
89static void bucket_clear_chain_pa(unsigned long bucket_pa)
90{
91 __asm__ __volatile__("stxa %%g0, [%0] %1"
92 : /* no outputs */
93 : "r" (bucket_pa +
94 offsetof(struct ino_bucket,
95 __irq_chain_pa)),
96 "i" (ASI_PHYS_USE_EC));
97}
98
99static unsigned int bucket_get_virt_irq(unsigned long bucket_pa)
100{
101 unsigned int ret;
102
103 __asm__ __volatile__("lduwa [%1] %2, %0"
104 : "=&r" (ret)
105 : "r" (bucket_pa +
106 offsetof(struct ino_bucket,
107 __virt_irq)),
108 "i" (ASI_PHYS_USE_EC));
109
110 return ret;
111}
112
113static void bucket_set_virt_irq(unsigned long bucket_pa,
114 unsigned int virt_irq)
115{
116 __asm__ __volatile__("stwa %0, [%1] %2"
117 : /* no outputs */
118 : "r" (virt_irq),
119 "r" (bucket_pa +
120 offsetof(struct ino_bucket,
121 __virt_irq)),
122 "i" (ASI_PHYS_USE_EC));
123}
124
125#define irq_work_pa(__cpu) &(trap_block[(__cpu)].irq_worklist_pa)
89 126
90static struct { 127static struct {
91 unsigned int irq;
92 unsigned int dev_handle; 128 unsigned int dev_handle;
93 unsigned int dev_ino; 129 unsigned int dev_ino;
94} virt_to_real_irq_table[NR_IRQS]; 130 unsigned int in_use;
131} virt_irq_table[NR_IRQS];
132static DEFINE_SPINLOCK(virt_irq_alloc_lock);
95 133
96static unsigned char virt_irq_alloc(unsigned int real_irq) 134unsigned char virt_irq_alloc(unsigned int dev_handle,
135 unsigned int dev_ino)
97{ 136{
137 unsigned long flags;
98 unsigned char ent; 138 unsigned char ent;
99 139
100 BUILD_BUG_ON(NR_IRQS >= 256); 140 BUILD_BUG_ON(NR_IRQS >= 256);
101 141
142 spin_lock_irqsave(&virt_irq_alloc_lock, flags);
143
102 for (ent = 1; ent < NR_IRQS; ent++) { 144 for (ent = 1; ent < NR_IRQS; ent++) {
103 if (!virt_to_real_irq_table[ent].irq) 145 if (!virt_irq_table[ent].in_use)
104 break; 146 break;
105 } 147 }
106 if (ent >= NR_IRQS) { 148 if (ent >= NR_IRQS) {
107 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n"); 149 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
108 return 0; 150 ent = 0;
151 } else {
152 virt_irq_table[ent].dev_handle = dev_handle;
153 virt_irq_table[ent].dev_ino = dev_ino;
154 virt_irq_table[ent].in_use = 1;
109 } 155 }
110 156
111 virt_to_real_irq_table[ent].irq = real_irq; 157 spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
112 158
113 return ent; 159 return ent;
114} 160}
115 161
116#ifdef CONFIG_PCI_MSI 162#ifdef CONFIG_PCI_MSI
117static void virt_irq_free(unsigned int virt_irq) 163void virt_irq_free(unsigned int virt_irq)
118{ 164{
119 unsigned int real_irq; 165 unsigned long flags;
120 166
121 if (virt_irq >= NR_IRQS) 167 if (virt_irq >= NR_IRQS)
122 return; 168 return;
123 169
124 real_irq = virt_to_real_irq_table[virt_irq].irq; 170 spin_lock_irqsave(&virt_irq_alloc_lock, flags);
125 virt_to_real_irq_table[virt_irq].irq = 0;
126 171
127 __bucket(real_irq)->virt_irq = 0; 172 virt_irq_table[virt_irq].in_use = 0;
128}
129#endif
130 173
131static unsigned int virt_to_real_irq(unsigned char virt_irq) 174 spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
132{
133 return virt_to_real_irq_table[virt_irq].irq;
134} 175}
176#endif
135 177
136/* 178/*
137 * /proc/interrupts printing: 179 * /proc/interrupts printing:
@@ -217,38 +259,8 @@ struct irq_handler_data {
217 void (*pre_handler)(unsigned int, void *, void *); 259 void (*pre_handler)(unsigned int, void *, void *);
218 void *pre_handler_arg1; 260 void *pre_handler_arg1;
219 void *pre_handler_arg2; 261 void *pre_handler_arg2;
220
221 u32 msi;
222}; 262};
223 263
224void sparc64_set_msi(unsigned int virt_irq, u32 msi)
225{
226 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
227
228 if (data)
229 data->msi = msi;
230}
231
232u32 sparc64_get_msi(unsigned int virt_irq)
233{
234 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
235
236 if (data)
237 return data->msi;
238 return 0xffffffff;
239}
240
241static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
242{
243 unsigned int real_irq = virt_to_real_irq(virt_irq);
244 struct ino_bucket *bucket = NULL;
245
246 if (likely(real_irq))
247 bucket = __bucket(real_irq);
248
249 return bucket;
250}
251
252#ifdef CONFIG_SMP 264#ifdef CONFIG_SMP
253static int irq_choose_cpu(unsigned int virt_irq) 265static int irq_choose_cpu(unsigned int virt_irq)
254{ 266{
@@ -348,201 +360,152 @@ static void sun4u_irq_end(unsigned int virt_irq)
348 360
349static void sun4v_irq_enable(unsigned int virt_irq) 361static void sun4v_irq_enable(unsigned int virt_irq)
350{ 362{
351 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); 363 unsigned int ino = virt_irq_table[virt_irq].dev_ino;
352 unsigned int ino = bucket - &ivector_table[0]; 364 unsigned long cpuid = irq_choose_cpu(virt_irq);
353 365 int err;
354 if (likely(bucket)) {
355 unsigned long cpuid;
356 int err;
357 366
358 cpuid = irq_choose_cpu(virt_irq); 367 err = sun4v_intr_settarget(ino, cpuid);
359 368 if (err != HV_EOK)
360 err = sun4v_intr_settarget(ino, cpuid); 369 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
361 if (err != HV_EOK) 370 "err(%d)\n", ino, cpuid, err);
362 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): " 371 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
363 "err(%d)\n", ino, cpuid, err); 372 if (err != HV_EOK)
364 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE); 373 printk(KERN_ERR "sun4v_intr_setstate(%x): "
365 if (err != HV_EOK) 374 "err(%d)\n", ino, err);
366 printk(KERN_ERR "sun4v_intr_setstate(%x): " 375 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
367 "err(%d)\n", ino, err); 376 if (err != HV_EOK)
368 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED); 377 printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
369 if (err != HV_EOK) 378 ino, err);
370 printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
371 ino, err);
372 }
373} 379}
374 380
375static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask) 381static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
376{ 382{
377 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); 383 unsigned int ino = virt_irq_table[virt_irq].dev_ino;
378 unsigned int ino = bucket - &ivector_table[0]; 384 unsigned long cpuid = irq_choose_cpu(virt_irq);
385 int err;
379 386
380 if (likely(bucket)) { 387 err = sun4v_intr_settarget(ino, cpuid);
381 unsigned long cpuid; 388 if (err != HV_EOK)
382 int err; 389 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
383 390 "err(%d)\n", ino, cpuid, err);
384 cpuid = irq_choose_cpu(virt_irq);
385
386 err = sun4v_intr_settarget(ino, cpuid);
387 if (err != HV_EOK)
388 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
389 "err(%d)\n", ino, cpuid, err);
390 }
391} 391}
392 392
393static void sun4v_irq_disable(unsigned int virt_irq) 393static void sun4v_irq_disable(unsigned int virt_irq)
394{ 394{
395 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); 395 unsigned int ino = virt_irq_table[virt_irq].dev_ino;
396 unsigned int ino = bucket - &ivector_table[0]; 396 int err;
397
398 if (likely(bucket)) {
399 int err;
400
401 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
402 if (err != HV_EOK)
403 printk(KERN_ERR "sun4v_intr_setenabled(%x): "
404 "err(%d)\n", ino, err);
405 }
406}
407
408#ifdef CONFIG_PCI_MSI
409static void sun4v_msi_enable(unsigned int virt_irq)
410{
411 sun4v_irq_enable(virt_irq);
412 unmask_msi_irq(virt_irq);
413}
414 397
415static void sun4v_msi_disable(unsigned int virt_irq) 398 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
416{ 399 if (err != HV_EOK)
417 mask_msi_irq(virt_irq); 400 printk(KERN_ERR "sun4v_intr_setenabled(%x): "
418 sun4v_irq_disable(virt_irq); 401 "err(%d)\n", ino, err);
419} 402}
420#endif
421 403
422static void sun4v_irq_end(unsigned int virt_irq) 404static void sun4v_irq_end(unsigned int virt_irq)
423{ 405{
424 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); 406 unsigned int ino = virt_irq_table[virt_irq].dev_ino;
425 unsigned int ino = bucket - &ivector_table[0];
426 struct irq_desc *desc = irq_desc + virt_irq; 407 struct irq_desc *desc = irq_desc + virt_irq;
408 int err;
427 409
428 if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 410 if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
429 return; 411 return;
430 412
431 if (likely(bucket)) { 413 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
432 int err; 414 if (err != HV_EOK)
433 415 printk(KERN_ERR "sun4v_intr_setstate(%x): "
434 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE); 416 "err(%d)\n", ino, err);
435 if (err != HV_EOK)
436 printk(KERN_ERR "sun4v_intr_setstate(%x): "
437 "err(%d)\n", ino, err);
438 }
439} 417}
440 418
441static void sun4v_virq_enable(unsigned int virt_irq) 419static void sun4v_virq_enable(unsigned int virt_irq)
442{ 420{
443 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); 421 unsigned long cpuid, dev_handle, dev_ino;
444 422 int err;
445 if (likely(bucket)) { 423
446 unsigned long cpuid, dev_handle, dev_ino; 424 cpuid = irq_choose_cpu(virt_irq);
447 int err; 425
448 426 dev_handle = virt_irq_table[virt_irq].dev_handle;
449 cpuid = irq_choose_cpu(virt_irq); 427 dev_ino = virt_irq_table[virt_irq].dev_ino;
450 428
451 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle; 429 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
452 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino; 430 if (err != HV_EOK)
453 431 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
454 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid); 432 "err(%d)\n",
455 if (err != HV_EOK) 433 dev_handle, dev_ino, cpuid, err);
456 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): " 434 err = sun4v_vintr_set_state(dev_handle, dev_ino,
457 "err(%d)\n", 435 HV_INTR_STATE_IDLE);
458 dev_handle, dev_ino, cpuid, err); 436 if (err != HV_EOK)
459 err = sun4v_vintr_set_state(dev_handle, dev_ino, 437 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
460 HV_INTR_STATE_IDLE); 438 "HV_INTR_STATE_IDLE): err(%d)\n",
461 if (err != HV_EOK) 439 dev_handle, dev_ino, err);
462 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx," 440 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
463 "HV_INTR_STATE_IDLE): err(%d)\n", 441 HV_INTR_ENABLED);
464 dev_handle, dev_ino, err); 442 if (err != HV_EOK)
465 err = sun4v_vintr_set_valid(dev_handle, dev_ino, 443 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
466 HV_INTR_ENABLED); 444 "HV_INTR_ENABLED): err(%d)\n",
467 if (err != HV_EOK) 445 dev_handle, dev_ino, err);
468 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
469 "HV_INTR_ENABLED): err(%d)\n",
470 dev_handle, dev_ino, err);
471 }
472} 446}
473 447
474static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask) 448static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
475{ 449{
476 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); 450 unsigned long cpuid, dev_handle, dev_ino;
451 int err;
477 452
478 if (likely(bucket)) { 453 cpuid = irq_choose_cpu(virt_irq);
479 unsigned long cpuid, dev_handle, dev_ino;
480 int err;
481 454
482 cpuid = irq_choose_cpu(virt_irq); 455 dev_handle = virt_irq_table[virt_irq].dev_handle;
456 dev_ino = virt_irq_table[virt_irq].dev_ino;
483 457
484 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle; 458 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
485 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino; 459 if (err != HV_EOK)
486 460 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
487 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid); 461 "err(%d)\n",
488 if (err != HV_EOK) 462 dev_handle, dev_ino, cpuid, err);
489 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
490 "err(%d)\n",
491 dev_handle, dev_ino, cpuid, err);
492 }
493} 463}
494 464
495static void sun4v_virq_disable(unsigned int virt_irq) 465static void sun4v_virq_disable(unsigned int virt_irq)
496{ 466{
497 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); 467 unsigned long dev_handle, dev_ino;
468 int err;
498 469
499 if (likely(bucket)) { 470 dev_handle = virt_irq_table[virt_irq].dev_handle;
500 unsigned long dev_handle, dev_ino; 471 dev_ino = virt_irq_table[virt_irq].dev_ino;
501 int err;
502 472
503 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle; 473 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
504 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino; 474 HV_INTR_DISABLED);
505 475 if (err != HV_EOK)
506 err = sun4v_vintr_set_valid(dev_handle, dev_ino, 476 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
507 HV_INTR_DISABLED); 477 "HV_INTR_DISABLED): err(%d)\n",
508 if (err != HV_EOK) 478 dev_handle, dev_ino, err);
509 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
510 "HV_INTR_DISABLED): err(%d)\n",
511 dev_handle, dev_ino, err);
512 }
513} 479}
514 480
515static void sun4v_virq_end(unsigned int virt_irq) 481static void sun4v_virq_end(unsigned int virt_irq)
516{ 482{
517 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
518 struct irq_desc *desc = irq_desc + virt_irq; 483 struct irq_desc *desc = irq_desc + virt_irq;
484 unsigned long dev_handle, dev_ino;
485 int err;
519 486
520 if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 487 if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
521 return; 488 return;
522 489
523 if (likely(bucket)) { 490 dev_handle = virt_irq_table[virt_irq].dev_handle;
524 unsigned long dev_handle, dev_ino; 491 dev_ino = virt_irq_table[virt_irq].dev_ino;
525 int err;
526 492
527 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle; 493 err = sun4v_vintr_set_state(dev_handle, dev_ino,
528 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino; 494 HV_INTR_STATE_IDLE);
529 495 if (err != HV_EOK)
530 err = sun4v_vintr_set_state(dev_handle, dev_ino, 496 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
531 HV_INTR_STATE_IDLE); 497 "HV_INTR_STATE_IDLE): err(%d)\n",
532 if (err != HV_EOK) 498 dev_handle, dev_ino, err);
533 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
534 "HV_INTR_STATE_IDLE): err(%d)\n",
535 dev_handle, dev_ino, err);
536 }
537} 499}
538 500
539static void run_pre_handler(unsigned int virt_irq) 501static void run_pre_handler(unsigned int virt_irq)
540{ 502{
541 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
542 struct irq_handler_data *data = get_irq_chip_data(virt_irq); 503 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
504 unsigned int ino;
543 505
506 ino = virt_irq_table[virt_irq].dev_ino;
544 if (likely(data->pre_handler)) { 507 if (likely(data->pre_handler)) {
545 data->pre_handler(__irq_ino(__irq(bucket)), 508 data->pre_handler(ino,
546 data->pre_handler_arg1, 509 data->pre_handler_arg1,
547 data->pre_handler_arg2); 510 data->pre_handler_arg2);
548 } 511 }
@@ -573,28 +536,6 @@ static struct irq_chip sun4v_irq = {
573 .set_affinity = sun4v_set_affinity, 536 .set_affinity = sun4v_set_affinity,
574}; 537};
575 538
576static struct irq_chip sun4v_irq_ack = {
577 .typename = "sun4v+ack",
578 .enable = sun4v_irq_enable,
579 .disable = sun4v_irq_disable,
580 .ack = run_pre_handler,
581 .end = sun4v_irq_end,
582 .set_affinity = sun4v_set_affinity,
583};
584
585#ifdef CONFIG_PCI_MSI
586static struct irq_chip sun4v_msi = {
587 .typename = "sun4v+msi",
588 .mask = mask_msi_irq,
589 .unmask = unmask_msi_irq,
590 .enable = sun4v_msi_enable,
591 .disable = sun4v_msi_disable,
592 .ack = run_pre_handler,
593 .end = sun4v_irq_end,
594 .set_affinity = sun4v_set_affinity,
595};
596#endif
597
598static struct irq_chip sun4v_virq = { 539static struct irq_chip sun4v_virq = {
599 .typename = "vsun4v", 540 .typename = "vsun4v",
600 .enable = sun4v_virq_enable, 541 .enable = sun4v_virq_enable,
@@ -603,59 +544,48 @@ static struct irq_chip sun4v_virq = {
603 .set_affinity = sun4v_virt_set_affinity, 544 .set_affinity = sun4v_virt_set_affinity,
604}; 545};
605 546
606static struct irq_chip sun4v_virq_ack = {
607 .typename = "vsun4v+ack",
608 .enable = sun4v_virq_enable,
609 .disable = sun4v_virq_disable,
610 .ack = run_pre_handler,
611 .end = sun4v_virq_end,
612 .set_affinity = sun4v_virt_set_affinity,
613};
614
615void irq_install_pre_handler(int virt_irq, 547void irq_install_pre_handler(int virt_irq,
616 void (*func)(unsigned int, void *, void *), 548 void (*func)(unsigned int, void *, void *),
617 void *arg1, void *arg2) 549 void *arg1, void *arg2)
618{ 550{
619 struct irq_handler_data *data = get_irq_chip_data(virt_irq); 551 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
620 struct irq_chip *chip; 552 struct irq_chip *chip = get_irq_chip(virt_irq);
553
554 if (WARN_ON(chip == &sun4v_irq || chip == &sun4v_virq)) {
555 printk(KERN_ERR "IRQ: Trying to install pre-handler on "
556 "sun4v irq %u\n", virt_irq);
557 return;
558 }
621 559
622 data->pre_handler = func; 560 data->pre_handler = func;
623 data->pre_handler_arg1 = arg1; 561 data->pre_handler_arg1 = arg1;
624 data->pre_handler_arg2 = arg2; 562 data->pre_handler_arg2 = arg2;
625 563
626 chip = get_irq_chip(virt_irq); 564 if (chip == &sun4u_irq_ack)
627 if (chip == &sun4u_irq_ack ||
628 chip == &sun4v_irq_ack ||
629 chip == &sun4v_virq_ack
630#ifdef CONFIG_PCI_MSI
631 || chip == &sun4v_msi
632#endif
633 )
634 return; 565 return;
635 566
636 chip = (chip == &sun4u_irq ? 567 set_irq_chip(virt_irq, &sun4u_irq_ack);
637 &sun4u_irq_ack :
638 (chip == &sun4v_irq ?
639 &sun4v_irq_ack : &sun4v_virq_ack));
640 set_irq_chip(virt_irq, chip);
641} 568}
642 569
643unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) 570unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
644{ 571{
645 struct ino_bucket *bucket; 572 struct ino_bucket *bucket;
646 struct irq_handler_data *data; 573 struct irq_handler_data *data;
574 unsigned int virt_irq;
647 int ino; 575 int ino;
648 576
649 BUG_ON(tlb_type == hypervisor); 577 BUG_ON(tlb_type == hypervisor);
650 578
651 ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup; 579 ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
652 bucket = &ivector_table[ino]; 580 bucket = &ivector_table[ino];
653 if (!bucket->virt_irq) { 581 virt_irq = bucket_get_virt_irq(__pa(bucket));
654 bucket->virt_irq = virt_irq_alloc(__irq(bucket)); 582 if (!virt_irq) {
655 set_irq_chip(bucket->virt_irq, &sun4u_irq); 583 virt_irq = virt_irq_alloc(0, ino);
584 bucket_set_virt_irq(__pa(bucket), virt_irq);
585 set_irq_chip(virt_irq, &sun4u_irq);
656 } 586 }
657 587
658 data = get_irq_chip_data(bucket->virt_irq); 588 data = get_irq_chip_data(virt_irq);
659 if (unlikely(data)) 589 if (unlikely(data))
660 goto out; 590 goto out;
661 591
@@ -664,13 +594,13 @@ unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
664 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n"); 594 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
665 prom_halt(); 595 prom_halt();
666 } 596 }
667 set_irq_chip_data(bucket->virt_irq, data); 597 set_irq_chip_data(virt_irq, data);
668 598
669 data->imap = imap; 599 data->imap = imap;
670 data->iclr = iclr; 600 data->iclr = iclr;
671 601
672out: 602out:
673 return bucket->virt_irq; 603 return virt_irq;
674} 604}
675 605
676static unsigned int sun4v_build_common(unsigned long sysino, 606static unsigned int sun4v_build_common(unsigned long sysino,
@@ -678,16 +608,19 @@ static unsigned int sun4v_build_common(unsigned long sysino,
678{ 608{
679 struct ino_bucket *bucket; 609 struct ino_bucket *bucket;
680 struct irq_handler_data *data; 610 struct irq_handler_data *data;
611 unsigned int virt_irq;
681 612
682 BUG_ON(tlb_type != hypervisor); 613 BUG_ON(tlb_type != hypervisor);
683 614
684 bucket = &ivector_table[sysino]; 615 bucket = &ivector_table[sysino];
685 if (!bucket->virt_irq) { 616 virt_irq = bucket_get_virt_irq(__pa(bucket));
686 bucket->virt_irq = virt_irq_alloc(__irq(bucket)); 617 if (!virt_irq) {
687 set_irq_chip(bucket->virt_irq, chip); 618 virt_irq = virt_irq_alloc(0, sysino);
619 bucket_set_virt_irq(__pa(bucket), virt_irq);
620 set_irq_chip(virt_irq, chip);
688 } 621 }
689 622
690 data = get_irq_chip_data(bucket->virt_irq); 623 data = get_irq_chip_data(virt_irq);
691 if (unlikely(data)) 624 if (unlikely(data))
692 goto out; 625 goto out;
693 626
@@ -696,7 +629,7 @@ static unsigned int sun4v_build_common(unsigned long sysino,
696 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n"); 629 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
697 prom_halt(); 630 prom_halt();
698 } 631 }
699 set_irq_chip_data(bucket->virt_irq, data); 632 set_irq_chip_data(virt_irq, data);
700 633
701 /* Catch accidental accesses to these things. IMAP/ICLR handling 634 /* Catch accidental accesses to these things. IMAP/ICLR handling
702 * is done by hypervisor calls on sun4v platforms, not by direct 635 * is done by hypervisor calls on sun4v platforms, not by direct
@@ -706,7 +639,7 @@ static unsigned int sun4v_build_common(unsigned long sysino,
706 data->iclr = ~0UL; 639 data->iclr = ~0UL;
707 640
708out: 641out:
709 return bucket->virt_irq; 642 return virt_irq;
710} 643}
711 644
712unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino) 645unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
@@ -718,86 +651,52 @@ unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
718 651
719unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino) 652unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
720{ 653{
721 unsigned long sysino, hv_err;
722 unsigned int virq;
723
724 BUG_ON(devhandle & devino);
725
726 sysino = devhandle | devino;
727 BUG_ON(sysino & ~(IMAP_IGN | IMAP_INO));
728
729 hv_err = sun4v_vintr_set_cookie(devhandle, devino, sysino);
730 if (hv_err) {
731 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
732 "err=%lu\n", devhandle, devino, hv_err);
733 prom_halt();
734 }
735
736 virq = sun4v_build_common(sysino, &sun4v_virq);
737
738 virt_to_real_irq_table[virq].dev_handle = devhandle;
739 virt_to_real_irq_table[virq].dev_ino = devino;
740
741 return virq;
742}
743
744#ifdef CONFIG_PCI_MSI
745unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
746 unsigned int msi_start, unsigned int msi_end)
747{
748 struct ino_bucket *bucket;
749 struct irq_handler_data *data; 654 struct irq_handler_data *data;
750 unsigned long sysino; 655 struct ino_bucket *bucket;
751 unsigned int devino; 656 unsigned long hv_err, cookie;
752 657 unsigned int virt_irq;
753 BUG_ON(tlb_type != hypervisor);
754
755 /* Find a free devino in the given range. */
756 for (devino = msi_start; devino < msi_end; devino++) {
757 sysino = sun4v_devino_to_sysino(devhandle, devino);
758 bucket = &ivector_table[sysino];
759 if (!bucket->virt_irq)
760 break;
761 }
762 if (devino >= msi_end)
763 return -ENOSPC;
764 658
765 sysino = sun4v_devino_to_sysino(devhandle, devino); 659 bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
766 bucket = &ivector_table[sysino]; 660 if (unlikely(!bucket))
767 bucket->virt_irq = virt_irq_alloc(__irq(bucket)); 661 return 0;
768 *virt_irq_p = bucket->virt_irq; 662 __flush_dcache_range((unsigned long) bucket,
769 set_irq_chip(bucket->virt_irq, &sun4v_msi); 663 ((unsigned long) bucket +
664 sizeof(struct ino_bucket)));
770 665
771 data = get_irq_chip_data(bucket->virt_irq); 666 virt_irq = virt_irq_alloc(devhandle, devino);
772 if (unlikely(data)) 667 bucket_set_virt_irq(__pa(bucket), virt_irq);
773 return devino; 668 set_irq_chip(virt_irq, &sun4v_virq);
774 669
775 data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC); 670 data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
776 if (unlikely(!data)) { 671 if (unlikely(!data))
777 virt_irq_free(*virt_irq_p); 672 return 0;
778 return -ENOMEM; 673
779 } 674 set_irq_chip_data(virt_irq, data);
780 set_irq_chip_data(bucket->virt_irq, data);
781 675
676 /* Catch accidental accesses to these things. IMAP/ICLR handling
677 * is done by hypervisor calls on sun4v platforms, not by direct
678 * register accesses.
679 */
782 data->imap = ~0UL; 680 data->imap = ~0UL;
783 data->iclr = ~0UL; 681 data->iclr = ~0UL;
784 682
785 return devino; 683 cookie = ~__pa(bucket);
786} 684 hv_err = sun4v_vintr_set_cookie(devhandle, devino, cookie);
685 if (hv_err) {
686 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
687 "err=%lu\n", devhandle, devino, hv_err);
688 prom_halt();
689 }
787 690
788void sun4v_destroy_msi(unsigned int virt_irq) 691 return virt_irq;
789{
790 virt_irq_free(virt_irq);
791} 692}
792#endif
793 693
794void ack_bad_irq(unsigned int virt_irq) 694void ack_bad_irq(unsigned int virt_irq)
795{ 695{
796 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq); 696 unsigned int ino = virt_irq_table[virt_irq].dev_ino;
797 unsigned int ino = 0xdeadbeef;
798 697
799 if (bucket) 698 if (!ino)
800 ino = bucket - &ivector_table[0]; 699 ino = 0xdeadbeef;
801 700
802 printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n", 701 printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
803 ino, virt_irq); 702 ino, virt_irq);
@@ -805,7 +704,7 @@ void ack_bad_irq(unsigned int virt_irq)
805 704
806void handler_irq(int irq, struct pt_regs *regs) 705void handler_irq(int irq, struct pt_regs *regs)
807{ 706{
808 struct ino_bucket *bucket; 707 unsigned long pstate, bucket_pa;
809 struct pt_regs *old_regs; 708 struct pt_regs *old_regs;
810 709
811 clear_softint(1 << irq); 710 clear_softint(1 << irq);
@@ -813,15 +712,28 @@ void handler_irq(int irq, struct pt_regs *regs)
813 old_regs = set_irq_regs(regs); 712 old_regs = set_irq_regs(regs);
814 irq_enter(); 713 irq_enter();
815 714
816 /* Sliiiick... */ 715 /* Grab an atomic snapshot of the pending IVECs. */
817 bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0)); 716 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
818 while (bucket) { 717 "wrpr %0, %3, %%pstate\n\t"
819 struct ino_bucket *next = __bucket(bucket->irq_chain); 718 "ldx [%2], %1\n\t"
719 "stx %%g0, [%2]\n\t"
720 "wrpr %0, 0x0, %%pstate\n\t"
721 : "=&r" (pstate), "=&r" (bucket_pa)
722 : "r" (irq_work_pa(smp_processor_id())),
723 "i" (PSTATE_IE)
724 : "memory");
725
726 while (bucket_pa) {
727 unsigned long next_pa;
728 unsigned int virt_irq;
820 729
821 bucket->irq_chain = 0; 730 next_pa = bucket_get_chain_pa(bucket_pa);
822 __do_IRQ(bucket->virt_irq); 731 virt_irq = bucket_get_virt_irq(bucket_pa);
732 bucket_clear_chain_pa(bucket_pa);
823 733
824 bucket = next; 734 __do_IRQ(virt_irq);
735
736 bucket_pa = next_pa;
825 } 737 }
826 738
827 irq_exit(); 739 irq_exit();
@@ -921,7 +833,7 @@ void init_irqwork_curcpu(void)
921{ 833{
922 int cpu = hard_smp_processor_id(); 834 int cpu = hard_smp_processor_id();
923 835
924 trap_block[cpu].irq_worklist = 0; 836 trap_block[cpu].irq_worklist_pa = 0UL;
925} 837}
926 838
927/* Please be very careful with register_one_mondo() and 839/* Please be very careful with register_one_mondo() and
@@ -1035,9 +947,21 @@ static struct irqaction timer_irq_action = {
1035/* Only invoked on boot processor. */ 947/* Only invoked on boot processor. */
1036void __init init_IRQ(void) 948void __init init_IRQ(void)
1037{ 949{
950 unsigned long size;
951
1038 map_prom_timers(); 952 map_prom_timers();
1039 kill_prom_timer(); 953 kill_prom_timer();
1040 memset(&ivector_table[0], 0, sizeof(ivector_table)); 954
955 size = sizeof(struct ino_bucket) * NUM_IVECS;
956 ivector_table = alloc_bootmem_low(size);
957 if (!ivector_table) {
958 prom_printf("Fatal error, cannot allocate ivector_table\n");
959 prom_halt();
960 }
961 __flush_dcache_range((unsigned long) ivector_table,
962 ((unsigned long) ivector_table) + size);
963
964 ivector_table_pa = __pa(ivector_table);
1041 965
1042 if (tlb_type == hypervisor) 966 if (tlb_type == hypervisor)
1043 sun4v_init_mondo_queues(); 967 sun4v_init_mondo_queues();
diff --git a/arch/sparc64/kernel/of_device.c b/arch/sparc64/kernel/of_device.c
index 4cc77485f536..42d779866fba 100644
--- a/arch/sparc64/kernel/of_device.c
+++ b/arch/sparc64/kernel/of_device.c
@@ -872,7 +872,10 @@ __setup("of_debug=", of_debug);
872int of_register_driver(struct of_platform_driver *drv, struct bus_type *bus) 872int of_register_driver(struct of_platform_driver *drv, struct bus_type *bus)
873{ 873{
874 /* initialize common driver fields */ 874 /* initialize common driver fields */
875 drv->driver.name = drv->name; 875 if (!drv->driver.name)
876 drv->driver.name = drv->name;
877 if (!drv->driver.owner)
878 drv->driver.owner = drv->owner;
876 drv->driver.bus = bus; 879 drv->driver.bus = bus;
877 880
878 /* register with core */ 881 /* register with core */
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index e8dac81d8a0d..9b808640a193 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -29,8 +29,6 @@
29 29
30#include "pci_impl.h" 30#include "pci_impl.h"
31 31
32unsigned long pci_memspace_mask = 0xffffffffUL;
33
34#ifndef CONFIG_PCI 32#ifndef CONFIG_PCI
35/* A "nop" PCI implementation. */ 33/* A "nop" PCI implementation. */
36asmlinkage int sys_pciconfig_read(unsigned long bus, unsigned long dfn, 34asmlinkage int sys_pciconfig_read(unsigned long bus, unsigned long dfn,
@@ -1066,8 +1064,8 @@ static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struc
1066 return 0; 1064 return 0;
1067} 1065}
1068 1066
1069/* Adjust vm_pgoff of VMA such that it is the physical page offset corresponding 1067/* Adjust vm_pgoff of VMA such that it is the physical page offset
1070 * to the 32-bit pci bus offset for DEV requested by the user. 1068 * corresponding to the 32-bit pci bus offset for DEV requested by the user.
1071 * 1069 *
1072 * Basically, the user finds the base address for his device which he wishes 1070 * Basically, the user finds the base address for his device which he wishes
1073 * to mmap. They read the 32-bit value from the config space base register, 1071 * to mmap. They read the 32-bit value from the config space base register,
@@ -1076,21 +1074,35 @@ static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struc
1076 * 1074 *
1077 * Returns negative error code on failure, zero on success. 1075 * Returns negative error code on failure, zero on success.
1078 */ 1076 */
1079static int __pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vma, 1077static int __pci_mmap_make_offset(struct pci_dev *pdev,
1078 struct vm_area_struct *vma,
1080 enum pci_mmap_state mmap_state) 1079 enum pci_mmap_state mmap_state)
1081{ 1080{
1082 unsigned long user_offset = vma->vm_pgoff << PAGE_SHIFT; 1081 unsigned long user_paddr, user_size;
1083 unsigned long user32 = user_offset & pci_memspace_mask; 1082 int i, err;
1084 unsigned long largest_base, this_base, addr32;
1085 int i;
1086 1083
1087 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) 1084 /* First compute the physical address in vma->vm_pgoff,
1088 return __pci_mmap_make_offset_bus(dev, vma, mmap_state); 1085 * making sure the user offset is within range in the
1086 * appropriate PCI space.
1087 */
1088 err = __pci_mmap_make_offset_bus(pdev, vma, mmap_state);
1089 if (err)
1090 return err;
1091
1092 /* If this is a mapping on a host bridge, any address
1093 * is OK.
1094 */
1095 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
1096 return err;
1097
1098 /* Otherwise make sure it's in the range for one of the
1099 * device's resources.
1100 */
1101 user_paddr = vma->vm_pgoff << PAGE_SHIFT;
1102 user_size = vma->vm_end - vma->vm_start;
1089 1103
1090 /* Figure out which base address this is for. */
1091 largest_base = 0UL;
1092 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 1104 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
1093 struct resource *rp = &dev->resource[i]; 1105 struct resource *rp = &pdev->resource[i];
1094 1106
1095 /* Active? */ 1107 /* Active? */
1096 if (!rp->flags) 1108 if (!rp->flags)
@@ -1108,26 +1120,14 @@ static int __pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vm
1108 continue; 1120 continue;
1109 } 1121 }
1110 1122
1111 this_base = rp->start; 1123 if ((rp->start <= user_paddr) &&
1112 1124 (user_paddr + user_size) <= (rp->end + 1UL))
1113 addr32 = (this_base & PAGE_MASK) & pci_memspace_mask; 1125 break;
1114
1115 if (mmap_state == pci_mmap_io)
1116 addr32 &= 0xffffff;
1117
1118 if (addr32 <= user32 && this_base > largest_base)
1119 largest_base = this_base;
1120 } 1126 }
1121 1127
1122 if (largest_base == 0UL) 1128 if (i > PCI_ROM_RESOURCE)
1123 return -EINVAL; 1129 return -EINVAL;
1124 1130
1125 /* Now construct the final physical address. */
1126 if (mmap_state == pci_mmap_io)
1127 vma->vm_pgoff = (((largest_base & ~0xffffffUL) | user32) >> PAGE_SHIFT);
1128 else
1129 vma->vm_pgoff = (((largest_base & ~(pci_memspace_mask)) | user32) >> PAGE_SHIFT);
1130
1131 return 0; 1131 return 0;
1132} 1132}
1133 1133
diff --git a/arch/sparc64/kernel/pci_fire.c b/arch/sparc64/kernel/pci_fire.c
index 14d67fe21ab2..fef3b37487bf 100644
--- a/arch/sparc64/kernel/pci_fire.c
+++ b/arch/sparc64/kernel/pci_fire.c
@@ -6,9 +6,12 @@
6#include <linux/pci.h> 6#include <linux/pci.h>
7#include <linux/slab.h> 7#include <linux/slab.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/msi.h>
10#include <linux/irq.h>
9 11
10#include <asm/oplib.h> 12#include <asm/oplib.h>
11#include <asm/prom.h> 13#include <asm/prom.h>
14#include <asm/irq.h>
12 15
13#include "pci_impl.h" 16#include "pci_impl.h"
14 17
@@ -84,6 +87,266 @@ static int pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
84 return 0; 87 return 0;
85} 88}
86 89
90#ifdef CONFIG_PCI_MSI
91struct pci_msiq_entry {
92 u64 word0;
93#define MSIQ_WORD0_RESV 0x8000000000000000UL
94#define MSIQ_WORD0_FMT_TYPE 0x7f00000000000000UL
95#define MSIQ_WORD0_FMT_TYPE_SHIFT 56
96#define MSIQ_WORD0_LEN 0x00ffc00000000000UL
97#define MSIQ_WORD0_LEN_SHIFT 46
98#define MSIQ_WORD0_ADDR0 0x00003fff00000000UL
99#define MSIQ_WORD0_ADDR0_SHIFT 32
100#define MSIQ_WORD0_RID 0x00000000ffff0000UL
101#define MSIQ_WORD0_RID_SHIFT 16
102#define MSIQ_WORD0_DATA0 0x000000000000ffffUL
103#define MSIQ_WORD0_DATA0_SHIFT 0
104
105#define MSIQ_TYPE_MSG 0x6
106#define MSIQ_TYPE_MSI32 0xb
107#define MSIQ_TYPE_MSI64 0xf
108
109 u64 word1;
110#define MSIQ_WORD1_ADDR1 0xffffffffffff0000UL
111#define MSIQ_WORD1_ADDR1_SHIFT 16
112#define MSIQ_WORD1_DATA1 0x000000000000ffffUL
113#define MSIQ_WORD1_DATA1_SHIFT 0
114
115 u64 resv[6];
116};
117
118/* All MSI registers are offset from pbm->pbm_regs */
119#define EVENT_QUEUE_BASE_ADDR_REG 0x010000UL
120#define EVENT_QUEUE_BASE_ADDR_ALL_ONES 0xfffc000000000000UL
121
122#define EVENT_QUEUE_CONTROL_SET(EQ) (0x011000UL + (EQ) * 0x8UL)
123#define EVENT_QUEUE_CONTROL_SET_OFLOW 0x0200000000000000UL
124#define EVENT_QUEUE_CONTROL_SET_EN 0x0000100000000000UL
125
126#define EVENT_QUEUE_CONTROL_CLEAR(EQ) (0x011200UL + (EQ) * 0x8UL)
127#define EVENT_QUEUE_CONTROL_CLEAR_OF 0x0200000000000000UL
128#define EVENT_QUEUE_CONTROL_CLEAR_E2I 0x0000800000000000UL
129#define EVENT_QUEUE_CONTROL_CLEAR_DIS 0x0000100000000000UL
130
131#define EVENT_QUEUE_STATE(EQ) (0x011400UL + (EQ) * 0x8UL)
132#define EVENT_QUEUE_STATE_MASK 0x0000000000000007UL
133#define EVENT_QUEUE_STATE_IDLE 0x0000000000000001UL
134#define EVENT_QUEUE_STATE_ACTIVE 0x0000000000000002UL
135#define EVENT_QUEUE_STATE_ERROR 0x0000000000000004UL
136
137#define EVENT_QUEUE_TAIL(EQ) (0x011600UL + (EQ) * 0x8UL)
138#define EVENT_QUEUE_TAIL_OFLOW 0x0200000000000000UL
139#define EVENT_QUEUE_TAIL_VAL 0x000000000000007fUL
140
141#define EVENT_QUEUE_HEAD(EQ) (0x011800UL + (EQ) * 0x8UL)
142#define EVENT_QUEUE_HEAD_VAL 0x000000000000007fUL
143
144#define MSI_MAP(MSI) (0x020000UL + (MSI) * 0x8UL)
145#define MSI_MAP_VALID 0x8000000000000000UL
146#define MSI_MAP_EQWR_N 0x4000000000000000UL
147#define MSI_MAP_EQNUM 0x000000000000003fUL
148
149#define MSI_CLEAR(MSI) (0x028000UL + (MSI) * 0x8UL)
150#define MSI_CLEAR_EQWR_N 0x4000000000000000UL
151
152#define IMONDO_DATA0 0x02C000UL
153#define IMONDO_DATA0_DATA 0xffffffffffffffc0UL
154
155#define IMONDO_DATA1 0x02C008UL
156#define IMONDO_DATA1_DATA 0xffffffffffffffffUL
157
158#define MSI_32BIT_ADDR 0x034000UL
159#define MSI_32BIT_ADDR_VAL 0x00000000ffff0000UL
160
161#define MSI_64BIT_ADDR 0x034008UL
162#define MSI_64BIT_ADDR_VAL 0xffffffffffff0000UL
163
164static int pci_fire_get_head(struct pci_pbm_info *pbm, unsigned long msiqid,
165 unsigned long *head)
166{
167 *head = fire_read(pbm->pbm_regs + EVENT_QUEUE_HEAD(msiqid));
168 return 0;
169}
170
171static int pci_fire_dequeue_msi(struct pci_pbm_info *pbm, unsigned long msiqid,
172 unsigned long *head, unsigned long *msi)
173{
174 unsigned long type_fmt, type, msi_num;
175 struct pci_msiq_entry *base, *ep;
176
177 base = (pbm->msi_queues + ((msiqid - pbm->msiq_first) * 8192));
178 ep = &base[*head];
179
180 if ((ep->word0 & MSIQ_WORD0_FMT_TYPE) == 0)
181 return 0;
182
183 type_fmt = ((ep->word0 & MSIQ_WORD0_FMT_TYPE) >>
184 MSIQ_WORD0_FMT_TYPE_SHIFT);
185 type = (type_fmt >> 3);
186 if (unlikely(type != MSIQ_TYPE_MSI32 &&
187 type != MSIQ_TYPE_MSI64))
188 return -EINVAL;
189
190 *msi = msi_num = ((ep->word0 & MSIQ_WORD0_DATA0) >>
191 MSIQ_WORD0_DATA0_SHIFT);
192
193 fire_write(pbm->pbm_regs + MSI_CLEAR(msi_num),
194 MSI_CLEAR_EQWR_N);
195
196 /* Clear the entry. */
197 ep->word0 &= ~MSIQ_WORD0_FMT_TYPE;
198
199 /* Go to next entry in ring. */
200 (*head)++;
201 if (*head >= pbm->msiq_ent_count)
202 *head = 0;
203
204 return 1;
205}
206
207static int pci_fire_set_head(struct pci_pbm_info *pbm, unsigned long msiqid,
208 unsigned long head)
209{
210 fire_write(pbm->pbm_regs + EVENT_QUEUE_HEAD(msiqid), head);
211 return 0;
212}
213
214static int pci_fire_msi_setup(struct pci_pbm_info *pbm, unsigned long msiqid,
215 unsigned long msi, int is_msi64)
216{
217 u64 val;
218
219 val = fire_read(pbm->pbm_regs + MSI_MAP(msi));
220 val &= ~(MSI_MAP_EQNUM);
221 val |= msiqid;
222 fire_write(pbm->pbm_regs + MSI_MAP(msi), val);
223
224 fire_write(pbm->pbm_regs + MSI_CLEAR(msi),
225 MSI_CLEAR_EQWR_N);
226
227 val = fire_read(pbm->pbm_regs + MSI_MAP(msi));
228 val |= MSI_MAP_VALID;
229 fire_write(pbm->pbm_regs + MSI_MAP(msi), val);
230
231 return 0;
232}
233
234static int pci_fire_msi_teardown(struct pci_pbm_info *pbm, unsigned long msi)
235{
236 unsigned long msiqid;
237 u64 val;
238
239 val = fire_read(pbm->pbm_regs + MSI_MAP(msi));
240 msiqid = (val & MSI_MAP_EQNUM);
241
242 val &= ~MSI_MAP_VALID;
243
244 fire_write(pbm->pbm_regs + MSI_MAP(msi), val);
245
246 return 0;
247}
248
249static int pci_fire_msiq_alloc(struct pci_pbm_info *pbm)
250{
251 unsigned long pages, order, i;
252
253 order = get_order(512 * 1024);
254 pages = __get_free_pages(GFP_KERNEL | __GFP_COMP, order);
255 if (pages == 0UL) {
256 printk(KERN_ERR "MSI: Cannot allocate MSI queues (o=%lu).\n",
257 order);
258 return -ENOMEM;
259 }
260 memset((char *)pages, 0, PAGE_SIZE << order);
261 pbm->msi_queues = (void *) pages;
262
263 fire_write(pbm->pbm_regs + EVENT_QUEUE_BASE_ADDR_REG,
264 (EVENT_QUEUE_BASE_ADDR_ALL_ONES |
265 __pa(pbm->msi_queues)));
266
267 fire_write(pbm->pbm_regs + IMONDO_DATA0,
268 pbm->portid << 6);
269 fire_write(pbm->pbm_regs + IMONDO_DATA1, 0);
270
271 fire_write(pbm->pbm_regs + MSI_32BIT_ADDR,
272 pbm->msi32_start);
273 fire_write(pbm->pbm_regs + MSI_64BIT_ADDR,
274 pbm->msi64_start);
275
276 for (i = 0; i < pbm->msiq_num; i++) {
277 fire_write(pbm->pbm_regs + EVENT_QUEUE_HEAD(i), 0);
278 fire_write(pbm->pbm_regs + EVENT_QUEUE_TAIL(i), 0);
279 }
280
281 return 0;
282}
283
284static void pci_fire_msiq_free(struct pci_pbm_info *pbm)
285{
286 unsigned long pages, order;
287
288 order = get_order(512 * 1024);
289 pages = (unsigned long) pbm->msi_queues;
290
291 free_pages(pages, order);
292
293 pbm->msi_queues = NULL;
294}
295
296static int pci_fire_msiq_build_irq(struct pci_pbm_info *pbm,
297 unsigned long msiqid,
298 unsigned long devino)
299{
300 unsigned long cregs = (unsigned long) pbm->pbm_regs;
301 unsigned long imap_reg, iclr_reg, int_ctrlr;
302 unsigned int virt_irq;
303 int fixup;
304 u64 val;
305
306 imap_reg = cregs + (0x001000UL + (devino * 0x08UL));
307 iclr_reg = cregs + (0x001400UL + (devino * 0x08UL));
308
309 /* XXX iterate amongst the 4 IRQ controllers XXX */
310 int_ctrlr = (1UL << 6);
311
312 val = fire_read(imap_reg);
313 val |= (1UL << 63) | int_ctrlr;
314 fire_write(imap_reg, val);
315
316 fixup = ((pbm->portid << 6) | devino) - int_ctrlr;
317
318 virt_irq = build_irq(fixup, iclr_reg, imap_reg);
319 if (!virt_irq)
320 return -ENOMEM;
321
322 fire_write(pbm->pbm_regs +
323 EVENT_QUEUE_CONTROL_SET(msiqid),
324 EVENT_QUEUE_CONTROL_SET_EN);
325
326 return virt_irq;
327}
328
329static const struct sparc64_msiq_ops pci_fire_msiq_ops = {
330 .get_head = pci_fire_get_head,
331 .dequeue_msi = pci_fire_dequeue_msi,
332 .set_head = pci_fire_set_head,
333 .msi_setup = pci_fire_msi_setup,
334 .msi_teardown = pci_fire_msi_teardown,
335 .msiq_alloc = pci_fire_msiq_alloc,
336 .msiq_free = pci_fire_msiq_free,
337 .msiq_build_irq = pci_fire_msiq_build_irq,
338};
339
340static void pci_fire_msi_init(struct pci_pbm_info *pbm)
341{
342 sparc64_pbm_msi_init(pbm, &pci_fire_msiq_ops);
343}
344#else /* CONFIG_PCI_MSI */
345static void pci_fire_msi_init(struct pci_pbm_info *pbm)
346{
347}
348#endif /* !(CONFIG_PCI_MSI) */
349
87/* Based at pbm->controller_regs */ 350/* Based at pbm->controller_regs */
88#define FIRE_PARITY_CONTROL 0x470010UL 351#define FIRE_PARITY_CONTROL 0x470010UL
89#define FIRE_PARITY_ENAB 0x8000000000000000UL 352#define FIRE_PARITY_ENAB 0x8000000000000000UL
@@ -176,6 +439,7 @@ static int pci_fire_pbm_init(struct pci_controller_info *p,
176{ 439{
177 const struct linux_prom64_registers *regs; 440 const struct linux_prom64_registers *regs;
178 struct pci_pbm_info *pbm; 441 struct pci_pbm_info *pbm;
442 int err;
179 443
180 if ((portid & 1) == 0) 444 if ((portid & 1) == 0)
181 pbm = &p->pbm_A; 445 pbm = &p->pbm_A;
@@ -208,7 +472,13 @@ static int pci_fire_pbm_init(struct pci_controller_info *p,
208 472
209 pci_fire_hw_init(pbm); 473 pci_fire_hw_init(pbm);
210 474
211 return pci_fire_pbm_iommu_init(pbm); 475 err = pci_fire_pbm_iommu_init(pbm);
476 if (err)
477 return err;
478
479 pci_fire_msi_init(pbm);
480
481 return 0;
212} 482}
213 483
214static inline int portid_compare(u32 x, u32 y) 484static inline int portid_compare(u32 x, u32 y)
@@ -249,13 +519,6 @@ void fire_pci_init(struct device_node *dp, const char *model_name)
249 519
250 p->pbm_B.iommu = iommu; 520 p->pbm_B.iommu = iommu;
251 521
252 /* XXX MSI support XXX */
253
254 /* Like PSYCHO and SCHIZO we have a 2GB aligned area
255 * for memory space.
256 */
257 pci_memspace_mask = 0x7fffffffUL;
258
259 if (pci_fire_pbm_init(p, dp, portid)) 522 if (pci_fire_pbm_init(p, dp, portid))
260 goto fatal_memory_error; 523 goto fatal_memory_error;
261 524
diff --git a/arch/sparc64/kernel/pci_impl.h b/arch/sparc64/kernel/pci_impl.h
index f660c2b685eb..4a50da13ce48 100644
--- a/arch/sparc64/kernel/pci_impl.h
+++ b/arch/sparc64/kernel/pci_impl.h
@@ -29,6 +29,33 @@
29#define PCI_STC_FLUSHFLAG_SET(STC) \ 29#define PCI_STC_FLUSHFLAG_SET(STC) \
30 (*((STC)->strbuf_flushflag) != 0UL) 30 (*((STC)->strbuf_flushflag) != 0UL)
31 31
32#ifdef CONFIG_PCI_MSI
33struct pci_pbm_info;
34struct sparc64_msiq_ops {
35 int (*get_head)(struct pci_pbm_info *pbm, unsigned long msiqid,
36 unsigned long *head);
37 int (*dequeue_msi)(struct pci_pbm_info *pbm, unsigned long msiqid,
38 unsigned long *head, unsigned long *msi);
39 int (*set_head)(struct pci_pbm_info *pbm, unsigned long msiqid,
40 unsigned long head);
41 int (*msi_setup)(struct pci_pbm_info *pbm, unsigned long msiqid,
42 unsigned long msi, int is_msi64);
43 int (*msi_teardown)(struct pci_pbm_info *pbm, unsigned long msi);
44 int (*msiq_alloc)(struct pci_pbm_info *pbm);
45 void (*msiq_free)(struct pci_pbm_info *pbm);
46 int (*msiq_build_irq)(struct pci_pbm_info *pbm, unsigned long msiqid,
47 unsigned long devino);
48};
49
50extern void sparc64_pbm_msi_init(struct pci_pbm_info *pbm,
51 const struct sparc64_msiq_ops *ops);
52
53struct sparc64_msiq_cookie {
54 struct pci_pbm_info *pbm;
55 unsigned long msiqid;
56};
57#endif
58
32struct pci_controller_info; 59struct pci_controller_info;
33 60
34struct pci_pbm_info { 61struct pci_pbm_info {
@@ -90,6 +117,8 @@ struct pci_pbm_info {
90 u32 msiq_ent_count; 117 u32 msiq_ent_count;
91 u32 msiq_first; 118 u32 msiq_first;
92 u32 msiq_first_devino; 119 u32 msiq_first_devino;
120 u32 msiq_rotor;
121 struct sparc64_msiq_cookie *msiq_irq_cookies;
93 u32 msi_num; 122 u32 msi_num;
94 u32 msi_first; 123 u32 msi_first;
95 u32 msi_data_mask; 124 u32 msi_data_mask;
@@ -100,9 +129,11 @@ struct pci_pbm_info {
100 u32 msi64_len; 129 u32 msi64_len;
101 void *msi_queues; 130 void *msi_queues;
102 unsigned long *msi_bitmap; 131 unsigned long *msi_bitmap;
132 unsigned int *msi_irq_table;
103 int (*setup_msi_irq)(unsigned int *virt_irq_p, struct pci_dev *pdev, 133 int (*setup_msi_irq)(unsigned int *virt_irq_p, struct pci_dev *pdev,
104 struct msi_desc *entry); 134 struct msi_desc *entry);
105 void (*teardown_msi_irq)(unsigned int virt_irq, struct pci_dev *pdev); 135 void (*teardown_msi_irq)(unsigned int virt_irq, struct pci_dev *pdev);
136 const struct sparc64_msiq_ops *msi_ops;
106#endif /* !(CONFIG_PCI_MSI) */ 137#endif /* !(CONFIG_PCI_MSI) */
107 138
108 /* This PBM's streaming buffer. */ 139 /* This PBM's streaming buffer. */
@@ -126,7 +157,6 @@ struct pci_controller_info {
126}; 157};
127 158
128extern struct pci_pbm_info *pci_pbm_root; 159extern struct pci_pbm_info *pci_pbm_root;
129extern unsigned long pci_memspace_mask;
130 160
131extern int pci_num_pbms; 161extern int pci_num_pbms;
132 162
diff --git a/arch/sparc64/kernel/pci_msi.c b/arch/sparc64/kernel/pci_msi.c
new file mode 100644
index 000000000000..31a165fd3e48
--- /dev/null
+++ b/arch/sparc64/kernel/pci_msi.c
@@ -0,0 +1,433 @@
1/* pci_msi.c: Sparc64 MSI support common layer.
2 *
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
4 */
5#include <linux/kernel.h>
6#include <linux/interrupt.h>
7#include <linux/irq.h>
8
9#include "pci_impl.h"
10
11static irqreturn_t sparc64_msiq_interrupt(int irq, void *cookie)
12{
13 struct sparc64_msiq_cookie *msiq_cookie = cookie;
14 struct pci_pbm_info *pbm = msiq_cookie->pbm;
15 unsigned long msiqid = msiq_cookie->msiqid;
16 const struct sparc64_msiq_ops *ops;
17 unsigned long orig_head, head;
18 int err;
19
20 ops = pbm->msi_ops;
21
22 err = ops->get_head(pbm, msiqid, &head);
23 if (unlikely(err < 0))
24 goto err_get_head;
25
26 orig_head = head;
27 for (;;) {
28 unsigned long msi;
29
30 err = ops->dequeue_msi(pbm, msiqid, &head, &msi);
31 if (likely(err > 0))
32 __do_IRQ(pbm->msi_irq_table[msi - pbm->msi_first]);
33
34 if (unlikely(err < 0))
35 goto err_dequeue;
36
37 if (err == 0)
38 break;
39 }
40 if (likely(head != orig_head)) {
41 err = ops->set_head(pbm, msiqid, head);
42 if (unlikely(err < 0))
43 goto err_set_head;
44 }
45 return IRQ_HANDLED;
46
47err_get_head:
48 printk(KERN_EMERG "MSI: Get head on msiqid[%lu] gives error %d\n",
49 msiqid, err);
50 goto err_out;
51
52err_dequeue:
53 printk(KERN_EMERG "MSI: Dequeue head[%lu] from msiqid[%lu] "
54 "gives error %d\n",
55 head, msiqid, err);
56 goto err_out;
57
58err_set_head:
59 printk(KERN_EMERG "MSI: Set head[%lu] on msiqid[%lu] "
60 "gives error %d\n",
61 head, msiqid, err);
62 goto err_out;
63
64err_out:
65 return IRQ_NONE;
66}
67
68static u32 pick_msiq(struct pci_pbm_info *pbm)
69{
70 static DEFINE_SPINLOCK(rotor_lock);
71 unsigned long flags;
72 u32 ret, rotor;
73
74 spin_lock_irqsave(&rotor_lock, flags);
75
76 rotor = pbm->msiq_rotor;
77 ret = pbm->msiq_first + rotor;
78
79 if (++rotor >= pbm->msiq_num)
80 rotor = 0;
81 pbm->msiq_rotor = rotor;
82
83 spin_unlock_irqrestore(&rotor_lock, flags);
84
85 return ret;
86}
87
88
89static int alloc_msi(struct pci_pbm_info *pbm)
90{
91 int i;
92
93 for (i = 0; i < pbm->msi_num; i++) {
94 if (!test_and_set_bit(i, pbm->msi_bitmap))
95 return i + pbm->msi_first;
96 }
97
98 return -ENOENT;
99}
100
101static void free_msi(struct pci_pbm_info *pbm, int msi_num)
102{
103 msi_num -= pbm->msi_first;
104 clear_bit(msi_num, pbm->msi_bitmap);
105}
106
107static struct irq_chip msi_irq = {
108 .typename = "PCI-MSI",
109 .mask = mask_msi_irq,
110 .unmask = unmask_msi_irq,
111 .enable = unmask_msi_irq,
112 .disable = mask_msi_irq,
113 /* XXX affinity XXX */
114};
115
116int sparc64_setup_msi_irq(unsigned int *virt_irq_p,
117 struct pci_dev *pdev,
118 struct msi_desc *entry)
119{
120 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
121 const struct sparc64_msiq_ops *ops = pbm->msi_ops;
122 struct msi_msg msg;
123 int msi, err;
124 u32 msiqid;
125
126 *virt_irq_p = virt_irq_alloc(0, 0);
127 err = -ENOMEM;
128 if (!*virt_irq_p)
129 goto out_err;
130
131 set_irq_chip(*virt_irq_p, &msi_irq);
132
133 err = alloc_msi(pbm);
134 if (unlikely(err < 0))
135 goto out_virt_irq_free;
136
137 msi = err;
138
139 msiqid = pick_msiq(pbm);
140
141 err = ops->msi_setup(pbm, msiqid, msi,
142 (entry->msi_attrib.is_64 ? 1 : 0));
143 if (err)
144 goto out_msi_free;
145
146 pbm->msi_irq_table[msi - pbm->msi_first] = *virt_irq_p;
147
148 if (entry->msi_attrib.is_64) {
149 msg.address_hi = pbm->msi64_start >> 32;
150 msg.address_lo = pbm->msi64_start & 0xffffffff;
151 } else {
152 msg.address_hi = 0;
153 msg.address_lo = pbm->msi32_start;
154 }
155 msg.data = msi;
156
157 set_irq_msi(*virt_irq_p, entry);
158 write_msi_msg(*virt_irq_p, &msg);
159
160 return 0;
161
162out_msi_free:
163 free_msi(pbm, msi);
164
165out_virt_irq_free:
166 set_irq_chip(*virt_irq_p, NULL);
167 virt_irq_free(*virt_irq_p);
168 *virt_irq_p = 0;
169
170out_err:
171 return err;
172}
173
174void sparc64_teardown_msi_irq(unsigned int virt_irq,
175 struct pci_dev *pdev)
176{
177 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
178 const struct sparc64_msiq_ops *ops = pbm->msi_ops;
179 unsigned int msi_num;
180 int i, err;
181
182 for (i = 0; i < pbm->msi_num; i++) {
183 if (pbm->msi_irq_table[i] == virt_irq)
184 break;
185 }
186 if (i >= pbm->msi_num) {
187 printk(KERN_ERR "%s: teardown: No MSI for irq %u\n",
188 pbm->name, virt_irq);
189 return;
190 }
191
192 msi_num = pbm->msi_first + i;
193 pbm->msi_irq_table[i] = ~0U;
194
195 err = ops->msi_teardown(pbm, msi_num);
196 if (err) {
197 printk(KERN_ERR "%s: teardown: ops->teardown() on MSI %u, "
198 "irq %u, gives error %d\n",
199 pbm->name, msi_num, virt_irq, err);
200 return;
201 }
202
203 free_msi(pbm, msi_num);
204
205 set_irq_chip(virt_irq, NULL);
206 virt_irq_free(virt_irq);
207}
208
209static int msi_bitmap_alloc(struct pci_pbm_info *pbm)
210{
211 unsigned long size, bits_per_ulong;
212
213 bits_per_ulong = sizeof(unsigned long) * 8;
214 size = (pbm->msi_num + (bits_per_ulong - 1)) & ~(bits_per_ulong - 1);
215 size /= 8;
216 BUG_ON(size % sizeof(unsigned long));
217
218 pbm->msi_bitmap = kzalloc(size, GFP_KERNEL);
219 if (!pbm->msi_bitmap)
220 return -ENOMEM;
221
222 return 0;
223}
224
225static void msi_bitmap_free(struct pci_pbm_info *pbm)
226{
227 kfree(pbm->msi_bitmap);
228 pbm->msi_bitmap = NULL;
229}
230
231static int msi_table_alloc(struct pci_pbm_info *pbm)
232{
233 int size, i;
234
235 size = pbm->msiq_num * sizeof(struct sparc64_msiq_cookie);
236 pbm->msiq_irq_cookies = kzalloc(size, GFP_KERNEL);
237 if (!pbm->msiq_irq_cookies)
238 return -ENOMEM;
239
240 for (i = 0; i < pbm->msiq_num; i++) {
241 struct sparc64_msiq_cookie *p;
242
243 p = &pbm->msiq_irq_cookies[i];
244 p->pbm = pbm;
245 p->msiqid = pbm->msiq_first + i;
246 }
247
248 size = pbm->msi_num * sizeof(unsigned int);
249 pbm->msi_irq_table = kzalloc(size, GFP_KERNEL);
250 if (!pbm->msi_irq_table) {
251 kfree(pbm->msiq_irq_cookies);
252 pbm->msiq_irq_cookies = NULL;
253 return -ENOMEM;
254 }
255
256 return 0;
257}
258
259static void msi_table_free(struct pci_pbm_info *pbm)
260{
261 kfree(pbm->msiq_irq_cookies);
262 pbm->msiq_irq_cookies = NULL;
263
264 kfree(pbm->msi_irq_table);
265 pbm->msi_irq_table = NULL;
266}
267
268static int bringup_one_msi_queue(struct pci_pbm_info *pbm,
269 const struct sparc64_msiq_ops *ops,
270 unsigned long msiqid,
271 unsigned long devino)
272{
273 int irq = ops->msiq_build_irq(pbm, msiqid, devino);
274 int err;
275
276 if (irq < 0)
277 return irq;
278
279 err = request_irq(irq, sparc64_msiq_interrupt, 0,
280 "MSIQ",
281 &pbm->msiq_irq_cookies[msiqid - pbm->msiq_first]);
282 if (err)
283 return err;
284
285 return 0;
286}
287
288static int sparc64_bringup_msi_queues(struct pci_pbm_info *pbm,
289 const struct sparc64_msiq_ops *ops)
290{
291 int i;
292
293 for (i = 0; i < pbm->msiq_num; i++) {
294 unsigned long msiqid = i + pbm->msiq_first;
295 unsigned long devino = i + pbm->msiq_first_devino;
296 int err;
297
298 err = bringup_one_msi_queue(pbm, ops, msiqid, devino);
299 if (err)
300 return err;
301 }
302
303 return 0;
304}
305
306void sparc64_pbm_msi_init(struct pci_pbm_info *pbm,
307 const struct sparc64_msiq_ops *ops)
308{
309 const u32 *val;
310 int len;
311
312 val = of_get_property(pbm->prom_node, "#msi-eqs", &len);
313 if (!val || len != 4)
314 goto no_msi;
315 pbm->msiq_num = *val;
316 if (pbm->msiq_num) {
317 const struct msiq_prop {
318 u32 first_msiq;
319 u32 num_msiq;
320 u32 first_devino;
321 } *mqp;
322 const struct msi_range_prop {
323 u32 first_msi;
324 u32 num_msi;
325 } *mrng;
326 const struct addr_range_prop {
327 u32 msi32_high;
328 u32 msi32_low;
329 u32 msi32_len;
330 u32 msi64_high;
331 u32 msi64_low;
332 u32 msi64_len;
333 } *arng;
334
335 val = of_get_property(pbm->prom_node, "msi-eq-size", &len);
336 if (!val || len != 4)
337 goto no_msi;
338
339 pbm->msiq_ent_count = *val;
340
341 mqp = of_get_property(pbm->prom_node,
342 "msi-eq-to-devino", &len);
343 if (!mqp)
344 mqp = of_get_property(pbm->prom_node,
345 "msi-eq-devino", &len);
346 if (!mqp || len != sizeof(struct msiq_prop))
347 goto no_msi;
348
349 pbm->msiq_first = mqp->first_msiq;
350 pbm->msiq_first_devino = mqp->first_devino;
351
352 val = of_get_property(pbm->prom_node, "#msi", &len);
353 if (!val || len != 4)
354 goto no_msi;
355 pbm->msi_num = *val;
356
357 mrng = of_get_property(pbm->prom_node, "msi-ranges", &len);
358 if (!mrng || len != sizeof(struct msi_range_prop))
359 goto no_msi;
360 pbm->msi_first = mrng->first_msi;
361
362 val = of_get_property(pbm->prom_node, "msi-data-mask", &len);
363 if (!val || len != 4)
364 goto no_msi;
365 pbm->msi_data_mask = *val;
366
367 val = of_get_property(pbm->prom_node, "msix-data-width", &len);
368 if (!val || len != 4)
369 goto no_msi;
370 pbm->msix_data_width = *val;
371
372 arng = of_get_property(pbm->prom_node, "msi-address-ranges",
373 &len);
374 if (!arng || len != sizeof(struct addr_range_prop))
375 goto no_msi;
376 pbm->msi32_start = ((u64)arng->msi32_high << 32) |
377 (u64) arng->msi32_low;
378 pbm->msi64_start = ((u64)arng->msi64_high << 32) |
379 (u64) arng->msi64_low;
380 pbm->msi32_len = arng->msi32_len;
381 pbm->msi64_len = arng->msi64_len;
382
383 if (msi_bitmap_alloc(pbm))
384 goto no_msi;
385
386 if (msi_table_alloc(pbm)) {
387 msi_bitmap_free(pbm);
388 goto no_msi;
389 }
390
391 if (ops->msiq_alloc(pbm)) {
392 msi_table_free(pbm);
393 msi_bitmap_free(pbm);
394 goto no_msi;
395 }
396
397 if (sparc64_bringup_msi_queues(pbm, ops)) {
398 ops->msiq_free(pbm);
399 msi_table_free(pbm);
400 msi_bitmap_free(pbm);
401 goto no_msi;
402 }
403
404 printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] "
405 "devino[0x%x]\n",
406 pbm->name,
407 pbm->msiq_first, pbm->msiq_num,
408 pbm->msiq_ent_count,
409 pbm->msiq_first_devino);
410 printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] "
411 "width[%u]\n",
412 pbm->name,
413 pbm->msi_first, pbm->msi_num, pbm->msi_data_mask,
414 pbm->msix_data_width);
415 printk(KERN_INFO "%s: MSI addr32[0x%lx:0x%x] "
416 "addr64[0x%lx:0x%x]\n",
417 pbm->name,
418 pbm->msi32_start, pbm->msi32_len,
419 pbm->msi64_start, pbm->msi64_len);
420 printk(KERN_INFO "%s: MSI queues at RA [%016lx]\n",
421 pbm->name,
422 __pa(pbm->msi_queues));
423
424 pbm->msi_ops = ops;
425 pbm->setup_msi_irq = sparc64_setup_msi_irq;
426 pbm->teardown_msi_irq = sparc64_teardown_msi_irq;
427 }
428 return;
429
430no_msi:
431 pbm->msiq_num = 0;
432 printk(KERN_INFO "%s: No MSI support.\n", pbm->name);
433}
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index b6b4cfea5b5f..d27ee5d528a2 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -1058,12 +1058,6 @@ void psycho_init(struct device_node *dp, char *model_name)
1058 p->pbm_A.config_space = p->pbm_B.config_space = 1058 p->pbm_A.config_space = p->pbm_B.config_space =
1059 (pr_regs[2].phys_addr + PSYCHO_CONFIGSPACE); 1059 (pr_regs[2].phys_addr + PSYCHO_CONFIGSPACE);
1060 1060
1061 /*
1062 * Psycho's PCI MEM space is mapped to a 2GB aligned area, so
1063 * we need to adjust our MEM space mask.
1064 */
1065 pci_memspace_mask = 0x7fffffffUL;
1066
1067 psycho_controller_hwinit(&p->pbm_A); 1061 psycho_controller_hwinit(&p->pbm_A);
1068 1062
1069 if (psycho_iommu_init(&p->pbm_A)) 1063 if (psycho_iommu_init(&p->pbm_A))
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 3c30bfa1f3a3..9546ba9f5dee 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -1464,9 +1464,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ
1464 1464
1465 p->pbm_B.iommu = iommu; 1465 p->pbm_B.iommu = iommu;
1466 1466
1467 /* Like PSYCHO we have a 2GB aligned area for memory space. */
1468 pci_memspace_mask = 0x7fffffffUL;
1469
1470 if (schizo_pbm_init(p, dp, portid, chip_type)) 1467 if (schizo_pbm_init(p, dp, portid, chip_type))
1471 goto fatal_memory_error; 1468 goto fatal_memory_error;
1472 1469
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index da724b13e89e..95de1444ee67 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -748,111 +748,102 @@ struct pci_sun4v_msiq_entry {
748 u64 reserved2; 748 u64 reserved2;
749}; 749};
750 750
751/* For now this just runs as a pre-handler for the real interrupt handler. 751static int pci_sun4v_get_head(struct pci_pbm_info *pbm, unsigned long msiqid,
752 * So we just walk through the queue and ACK all the entries, update the 752 unsigned long *head)
753 * head pointer, and return.
754 *
755 * In the longer term it would be nice to do something more integrated
756 * wherein we can pass in some of this MSI info to the drivers. This
757 * would be most useful for PCIe fabric error messages, although we could
758 * invoke those directly from the loop here in order to pass the info around.
759 */
760static void pci_sun4v_msi_prehandler(unsigned int ino, void *data1, void *data2)
761{ 753{
762 struct pci_pbm_info *pbm = data1; 754 unsigned long err, limit;
763 struct pci_sun4v_msiq_entry *base, *ep;
764 unsigned long msiqid, orig_head, head, type, err;
765
766 msiqid = (unsigned long) data2;
767 755
768 head = 0xdeadbeef; 756 err = pci_sun4v_msiq_gethead(pbm->devhandle, msiqid, head);
769 err = pci_sun4v_msiq_gethead(pbm->devhandle, msiqid, &head);
770 if (unlikely(err)) 757 if (unlikely(err))
771 goto hv_error_get; 758 return -ENXIO;
772
773 if (unlikely(head >= (pbm->msiq_ent_count * sizeof(struct pci_sun4v_msiq_entry))))
774 goto bad_offset;
775
776 head /= sizeof(struct pci_sun4v_msiq_entry);
777 orig_head = head;
778 base = (pbm->msi_queues + ((msiqid - pbm->msiq_first) *
779 (pbm->msiq_ent_count *
780 sizeof(struct pci_sun4v_msiq_entry))));
781 ep = &base[head];
782 while ((ep->version_type & MSIQ_TYPE_MASK) != 0) {
783 type = (ep->version_type & MSIQ_TYPE_MASK) >> MSIQ_TYPE_SHIFT;
784 if (unlikely(type != MSIQ_TYPE_MSI32 &&
785 type != MSIQ_TYPE_MSI64))
786 goto bad_type;
787
788 pci_sun4v_msi_setstate(pbm->devhandle,
789 ep->msi_data /* msi_num */,
790 HV_MSISTATE_IDLE);
791
792 /* Clear the entry. */
793 ep->version_type &= ~MSIQ_TYPE_MASK;
794
795 /* Go to next entry in ring. */
796 head++;
797 if (head >= pbm->msiq_ent_count)
798 head = 0;
799 ep = &base[head];
800 }
801 759
802 if (likely(head != orig_head)) { 760 limit = pbm->msiq_ent_count * sizeof(struct pci_sun4v_msiq_entry);
803 /* ACK entries by updating head pointer. */ 761 if (unlikely(*head >= limit))
804 head *= sizeof(struct pci_sun4v_msiq_entry); 762 return -EFBIG;
805 err = pci_sun4v_msiq_sethead(pbm->devhandle, msiqid, head);
806 if (unlikely(err))
807 goto hv_error_set;
808 }
809 return;
810 763
811hv_error_set: 764 return 0;
812 printk(KERN_EMERG "MSI: Hypervisor set head gives error %lu\n", err); 765}
813 goto hv_error_cont;
814 766
815hv_error_get: 767static int pci_sun4v_dequeue_msi(struct pci_pbm_info *pbm,
816 printk(KERN_EMERG "MSI: Hypervisor get head gives error %lu\n", err); 768 unsigned long msiqid, unsigned long *head,
769 unsigned long *msi)
770{
771 struct pci_sun4v_msiq_entry *ep;
772 unsigned long err, type;
817 773
818hv_error_cont: 774 /* Note: void pointer arithmetic, 'head' is a byte offset */
819 printk(KERN_EMERG "MSI: devhandle[%x] msiqid[%lx] head[%lu]\n", 775 ep = (pbm->msi_queues + ((msiqid - pbm->msiq_first) *
820 pbm->devhandle, msiqid, head); 776 (pbm->msiq_ent_count *
821 return; 777 sizeof(struct pci_sun4v_msiq_entry))) +
778 *head);
822 779
823bad_offset: 780 if ((ep->version_type & MSIQ_TYPE_MASK) == 0)
824 printk(KERN_EMERG "MSI: Hypervisor gives bad offset %lx max(%lx)\n", 781 return 0;
825 head, pbm->msiq_ent_count * sizeof(struct pci_sun4v_msiq_entry));
826 return;
827 782
828bad_type: 783 type = (ep->version_type & MSIQ_TYPE_MASK) >> MSIQ_TYPE_SHIFT;
829 printk(KERN_EMERG "MSI: Entry has bad type %lx\n", type); 784 if (unlikely(type != MSIQ_TYPE_MSI32 &&
830 return; 785 type != MSIQ_TYPE_MSI64))
786 return -EINVAL;
787
788 *msi = ep->msi_data;
789
790 err = pci_sun4v_msi_setstate(pbm->devhandle,
791 ep->msi_data /* msi_num */,
792 HV_MSISTATE_IDLE);
793 if (unlikely(err))
794 return -ENXIO;
795
796 /* Clear the entry. */
797 ep->version_type &= ~MSIQ_TYPE_MASK;
798
799 (*head) += sizeof(struct pci_sun4v_msiq_entry);
800 if (*head >=
801 (pbm->msiq_ent_count * sizeof(struct pci_sun4v_msiq_entry)))
802 *head = 0;
803
804 return 1;
831} 805}
832 806
833static int msi_bitmap_alloc(struct pci_pbm_info *pbm) 807static int pci_sun4v_set_head(struct pci_pbm_info *pbm, unsigned long msiqid,
808 unsigned long head)
834{ 809{
835 unsigned long size, bits_per_ulong; 810 unsigned long err;
836 811
837 bits_per_ulong = sizeof(unsigned long) * 8; 812 err = pci_sun4v_msiq_sethead(pbm->devhandle, msiqid, head);
838 size = (pbm->msi_num + (bits_per_ulong - 1)) & ~(bits_per_ulong - 1); 813 if (unlikely(err))
839 size /= 8; 814 return -EINVAL;
840 BUG_ON(size % sizeof(unsigned long));
841 815
842 pbm->msi_bitmap = kzalloc(size, GFP_KERNEL); 816 return 0;
843 if (!pbm->msi_bitmap) 817}
844 return -ENOMEM;
845 818
819static int pci_sun4v_msi_setup(struct pci_pbm_info *pbm, unsigned long msiqid,
820 unsigned long msi, int is_msi64)
821{
822 if (pci_sun4v_msi_setmsiq(pbm->devhandle, msi, msiqid,
823 (is_msi64 ?
824 HV_MSITYPE_MSI64 : HV_MSITYPE_MSI32)))
825 return -ENXIO;
826 if (pci_sun4v_msi_setstate(pbm->devhandle, msi, HV_MSISTATE_IDLE))
827 return -ENXIO;
828 if (pci_sun4v_msi_setvalid(pbm->devhandle, msi, HV_MSIVALID_VALID))
829 return -ENXIO;
846 return 0; 830 return 0;
847} 831}
848 832
849static void msi_bitmap_free(struct pci_pbm_info *pbm) 833static int pci_sun4v_msi_teardown(struct pci_pbm_info *pbm, unsigned long msi)
850{ 834{
851 kfree(pbm->msi_bitmap); 835 unsigned long err, msiqid;
852 pbm->msi_bitmap = NULL; 836
837 err = pci_sun4v_msi_getmsiq(pbm->devhandle, msi, &msiqid);
838 if (err)
839 return -ENXIO;
840
841 pci_sun4v_msi_setvalid(pbm->devhandle, msi, HV_MSIVALID_INVALID);
842
843 return 0;
853} 844}
854 845
855static int msi_queue_alloc(struct pci_pbm_info *pbm) 846static int pci_sun4v_msiq_alloc(struct pci_pbm_info *pbm)
856{ 847{
857 unsigned long q_size, alloc_size, pages, order; 848 unsigned long q_size, alloc_size, pages, order;
858 int i; 849 int i;
@@ -906,232 +897,59 @@ h_error:
906 return -EINVAL; 897 return -EINVAL;
907} 898}
908 899
909 900static void pci_sun4v_msiq_free(struct pci_pbm_info *pbm)
910static int alloc_msi(struct pci_pbm_info *pbm)
911{ 901{
902 unsigned long q_size, alloc_size, pages, order;
912 int i; 903 int i;
913 904
914 for (i = 0; i < pbm->msi_num; i++) { 905 for (i = 0; i < pbm->msiq_num; i++) {
915 if (!test_and_set_bit(i, pbm->msi_bitmap)) 906 unsigned long msiqid = pbm->msiq_first + i;
916 return i + pbm->msi_first;
917 }
918
919 return -ENOENT;
920}
921
922static void free_msi(struct pci_pbm_info *pbm, int msi_num)
923{
924 msi_num -= pbm->msi_first;
925 clear_bit(msi_num, pbm->msi_bitmap);
926}
927
928static int pci_sun4v_setup_msi_irq(unsigned int *virt_irq_p,
929 struct pci_dev *pdev,
930 struct msi_desc *entry)
931{
932 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
933 unsigned long devino, msiqid;
934 struct msi_msg msg;
935 int msi_num, err;
936
937 *virt_irq_p = 0;
938
939 msi_num = alloc_msi(pbm);
940 if (msi_num < 0)
941 return msi_num;
942
943 err = sun4v_build_msi(pbm->devhandle, virt_irq_p,
944 pbm->msiq_first_devino,
945 (pbm->msiq_first_devino +
946 pbm->msiq_num));
947 if (err < 0)
948 goto out_err;
949 devino = err;
950
951 msiqid = ((devino - pbm->msiq_first_devino) +
952 pbm->msiq_first);
953
954 err = -EINVAL;
955 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
956 if (err)
957 goto out_err;
958
959 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID))
960 goto out_err;
961
962 if (pci_sun4v_msi_setmsiq(pbm->devhandle,
963 msi_num, msiqid,
964 (entry->msi_attrib.is_64 ?
965 HV_MSITYPE_MSI64 : HV_MSITYPE_MSI32)))
966 goto out_err;
967
968 if (pci_sun4v_msi_setstate(pbm->devhandle, msi_num, HV_MSISTATE_IDLE))
969 goto out_err;
970
971 if (pci_sun4v_msi_setvalid(pbm->devhandle, msi_num, HV_MSIVALID_VALID))
972 goto out_err;
973
974 sparc64_set_msi(*virt_irq_p, msi_num);
975 907
976 if (entry->msi_attrib.is_64) { 908 (void) pci_sun4v_msiq_conf(pbm->devhandle, msiqid, 0UL, 0);
977 msg.address_hi = pbm->msi64_start >> 32;
978 msg.address_lo = pbm->msi64_start & 0xffffffff;
979 } else {
980 msg.address_hi = 0;
981 msg.address_lo = pbm->msi32_start;
982 } 909 }
983 msg.data = msi_num;
984
985 set_irq_msi(*virt_irq_p, entry);
986 write_msi_msg(*virt_irq_p, &msg);
987 910
988 irq_install_pre_handler(*virt_irq_p, 911 q_size = pbm->msiq_ent_count * sizeof(struct pci_sun4v_msiq_entry);
989 pci_sun4v_msi_prehandler, 912 alloc_size = (pbm->msiq_num * q_size);
990 pbm, (void *) msiqid); 913 order = get_order(alloc_size);
991 914
992 return 0; 915 pages = (unsigned long) pbm->msi_queues;
993 916
994out_err: 917 free_pages(pages, order);
995 free_msi(pbm, msi_num);
996 return err;
997 918
919 pbm->msi_queues = NULL;
998} 920}
999 921
1000static void pci_sun4v_teardown_msi_irq(unsigned int virt_irq, 922static int pci_sun4v_msiq_build_irq(struct pci_pbm_info *pbm,
1001 struct pci_dev *pdev) 923 unsigned long msiqid,
924 unsigned long devino)
1002{ 925{
1003 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; 926 unsigned int virt_irq = sun4v_build_irq(pbm->devhandle, devino);
1004 unsigned long msiqid, err;
1005 unsigned int msi_num;
1006
1007 msi_num = sparc64_get_msi(virt_irq);
1008 err = pci_sun4v_msi_getmsiq(pbm->devhandle, msi_num, &msiqid);
1009 if (err) {
1010 printk(KERN_ERR "%s: getmsiq gives error %lu\n",
1011 pbm->name, err);
1012 return;
1013 }
1014 927
1015 pci_sun4v_msi_setvalid(pbm->devhandle, msi_num, HV_MSIVALID_INVALID); 928 if (!virt_irq)
1016 pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_INVALID); 929 return -ENOMEM;
1017 930
1018 free_msi(pbm, msi_num); 931 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
932 return -EINVAL;
933 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID))
934 return -EINVAL;
1019 935
1020 /* The sun4v_destroy_msi() will liberate the devino and thus the MSIQ 936 return virt_irq;
1021 * allocation.
1022 */
1023 sun4v_destroy_msi(virt_irq);
1024} 937}
1025 938
939static const struct sparc64_msiq_ops pci_sun4v_msiq_ops = {
940 .get_head = pci_sun4v_get_head,
941 .dequeue_msi = pci_sun4v_dequeue_msi,
942 .set_head = pci_sun4v_set_head,
943 .msi_setup = pci_sun4v_msi_setup,
944 .msi_teardown = pci_sun4v_msi_teardown,
945 .msiq_alloc = pci_sun4v_msiq_alloc,
946 .msiq_free = pci_sun4v_msiq_free,
947 .msiq_build_irq = pci_sun4v_msiq_build_irq,
948};
949
1026static void pci_sun4v_msi_init(struct pci_pbm_info *pbm) 950static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
1027{ 951{
1028 const u32 *val; 952 sparc64_pbm_msi_init(pbm, &pci_sun4v_msiq_ops);
1029 int len;
1030
1031 val = of_get_property(pbm->prom_node, "#msi-eqs", &len);
1032 if (!val || len != 4)
1033 goto no_msi;
1034 pbm->msiq_num = *val;
1035 if (pbm->msiq_num) {
1036 const struct msiq_prop {
1037 u32 first_msiq;
1038 u32 num_msiq;
1039 u32 first_devino;
1040 } *mqp;
1041 const struct msi_range_prop {
1042 u32 first_msi;
1043 u32 num_msi;
1044 } *mrng;
1045 const struct addr_range_prop {
1046 u32 msi32_high;
1047 u32 msi32_low;
1048 u32 msi32_len;
1049 u32 msi64_high;
1050 u32 msi64_low;
1051 u32 msi64_len;
1052 } *arng;
1053
1054 val = of_get_property(pbm->prom_node, "msi-eq-size", &len);
1055 if (!val || len != 4)
1056 goto no_msi;
1057
1058 pbm->msiq_ent_count = *val;
1059
1060 mqp = of_get_property(pbm->prom_node,
1061 "msi-eq-to-devino", &len);
1062 if (!mqp || len != sizeof(struct msiq_prop))
1063 goto no_msi;
1064
1065 pbm->msiq_first = mqp->first_msiq;
1066 pbm->msiq_first_devino = mqp->first_devino;
1067
1068 val = of_get_property(pbm->prom_node, "#msi", &len);
1069 if (!val || len != 4)
1070 goto no_msi;
1071 pbm->msi_num = *val;
1072
1073 mrng = of_get_property(pbm->prom_node, "msi-ranges", &len);
1074 if (!mrng || len != sizeof(struct msi_range_prop))
1075 goto no_msi;
1076 pbm->msi_first = mrng->first_msi;
1077
1078 val = of_get_property(pbm->prom_node, "msi-data-mask", &len);
1079 if (!val || len != 4)
1080 goto no_msi;
1081 pbm->msi_data_mask = *val;
1082
1083 val = of_get_property(pbm->prom_node, "msix-data-width", &len);
1084 if (!val || len != 4)
1085 goto no_msi;
1086 pbm->msix_data_width = *val;
1087
1088 arng = of_get_property(pbm->prom_node, "msi-address-ranges",
1089 &len);
1090 if (!arng || len != sizeof(struct addr_range_prop))
1091 goto no_msi;
1092 pbm->msi32_start = ((u64)arng->msi32_high << 32) |
1093 (u64) arng->msi32_low;
1094 pbm->msi64_start = ((u64)arng->msi64_high << 32) |
1095 (u64) arng->msi64_low;
1096 pbm->msi32_len = arng->msi32_len;
1097 pbm->msi64_len = arng->msi64_len;
1098
1099 if (msi_bitmap_alloc(pbm))
1100 goto no_msi;
1101
1102 if (msi_queue_alloc(pbm)) {
1103 msi_bitmap_free(pbm);
1104 goto no_msi;
1105 }
1106
1107 printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] "
1108 "devino[0x%x]\n",
1109 pbm->name,
1110 pbm->msiq_first, pbm->msiq_num,
1111 pbm->msiq_ent_count,
1112 pbm->msiq_first_devino);
1113 printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] "
1114 "width[%u]\n",
1115 pbm->name,
1116 pbm->msi_first, pbm->msi_num, pbm->msi_data_mask,
1117 pbm->msix_data_width);
1118 printk(KERN_INFO "%s: MSI addr32[0x%lx:0x%x] "
1119 "addr64[0x%lx:0x%x]\n",
1120 pbm->name,
1121 pbm->msi32_start, pbm->msi32_len,
1122 pbm->msi64_start, pbm->msi64_len);
1123 printk(KERN_INFO "%s: MSI queues at RA [%p]\n",
1124 pbm->name,
1125 pbm->msi_queues);
1126 }
1127 pbm->setup_msi_irq = pci_sun4v_setup_msi_irq;
1128 pbm->teardown_msi_irq = pci_sun4v_teardown_msi_irq;
1129
1130 return;
1131
1132no_msi:
1133 pbm->msiq_num = 0;
1134 printk(KERN_INFO "%s: No MSI support.\n", pbm->name);
1135} 953}
1136#else /* CONFIG_PCI_MSI */ 954#else /* CONFIG_PCI_MSI */
1137static void pci_sun4v_msi_init(struct pci_pbm_info *pbm) 955static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
@@ -1237,11 +1055,6 @@ void __init sun4v_pci_init(struct device_node *dp, char *model_name)
1237 1055
1238 p->pbm_B.iommu = iommu; 1056 p->pbm_B.iommu = iommu;
1239 1057
1240 /* Like PSYCHO and SCHIZO we have a 2GB aligned area
1241 * for memory space.
1242 */
1243 pci_memspace_mask = 0x7fffffffUL;
1244
1245 pci_sun4v_pbm_init(p, dp, devhandle); 1058 pci_sun4v_pbm_init(p, dp, devhandle);
1246 return; 1059 return;
1247 1060
diff --git a/arch/sparc64/kernel/power.c b/arch/sparc64/kernel/power.c
index 881a09ee4c4c..850cdffdd69c 100644
--- a/arch/sparc64/kernel/power.c
+++ b/arch/sparc64/kernel/power.c
@@ -105,9 +105,11 @@ static struct of_device_id power_match[] = {
105}; 105};
106 106
107static struct of_platform_driver power_driver = { 107static struct of_platform_driver power_driver = {
108 .name = "power",
109 .match_table = power_match, 108 .match_table = power_match,
110 .probe = power_probe, 109 .probe = power_probe,
110 .driver = {
111 .name = "power",
112 },
111}; 113};
112 114
113void __init power_init(void) 115void __init power_init(void)
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S
index 574bc248bca6..e2f8e1b4882a 100644
--- a/arch/sparc64/kernel/sun4v_ivec.S
+++ b/arch/sparc64/kernel/sun4v_ivec.S
@@ -96,19 +96,21 @@ sun4v_dev_mondo:
96 stxa %g2, [%g4] ASI_QUEUE 96 stxa %g2, [%g4] ASI_QUEUE
97 membar #Sync 97 membar #Sync
98 98
99 /* Get &__irq_work[smp_processor_id()] into %g1. */ 99 TRAP_LOAD_IRQ_WORK_PA(%g1, %g4)
100 TRAP_LOAD_IRQ_WORK(%g1, %g4)
101 100
102 /* Get &ivector_table[IVEC] into %g4. */ 101 /* For VIRQs, cookie is encoded as ~bucket_phys_addr */
103 sethi %hi(ivector_table), %g4 102 brlz,pt %g3, 1f
104 sllx %g3, 3, %g3 103 xnor %g3, %g0, %g4
105 or %g4, %lo(ivector_table), %g4 104
105 /* Get __pa(&ivector_table[IVEC]) into %g4. */
106 sethi %hi(ivector_table_pa), %g4
107 ldx [%g4 + %lo(ivector_table_pa)], %g4
108 sllx %g3, 4, %g3
106 add %g4, %g3, %g4 109 add %g4, %g3, %g4
107 110
108 /* Insert ivector_table[] entry into __irq_work[] queue. */ 1111: ldx [%g1], %g2
109 lduw [%g1], %g2 /* g2 = irq_work(cpu) */ 112 stxa %g2, [%g4] ASI_PHYS_USE_EC
110 stw %g2, [%g4 + 0x00] /* bucket->irq_chain = g2 */ 113 stx %g4, [%g1]
111 stw %g4, [%g1] /* irq_work(cpu) = bucket */
112 114
113 /* Signal the interrupt by setting (1 << pil) in %softint. */ 115 /* Signal the interrupt by setting (1 << pil) in %softint. */
114 wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint 116 wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint
diff --git a/arch/sparc64/kernel/sys_sparc.c b/arch/sparc64/kernel/sys_sparc.c
index d108eeb0734f..0d5c50264945 100644
--- a/arch/sparc64/kernel/sys_sparc.c
+++ b/arch/sparc64/kernel/sys_sparc.c
@@ -436,7 +436,7 @@ out:
436asmlinkage long sys_ipc(unsigned int call, int first, unsigned long second, 436asmlinkage long sys_ipc(unsigned int call, int first, unsigned long second,
437 unsigned long third, void __user *ptr, long fifth) 437 unsigned long third, void __user *ptr, long fifth)
438{ 438{
439 int err; 439 long err;
440 440
441 /* No need for backward compatibility. We can start fresh... */ 441 /* No need for backward compatibility. We can start fresh... */
442 if (call <= SEMCTL) { 442 if (call <= SEMCTL) {
@@ -453,16 +453,9 @@ asmlinkage long sys_ipc(unsigned int call, int first, unsigned long second,
453 err = sys_semget(first, (int)second, (int)third); 453 err = sys_semget(first, (int)second, (int)third);
454 goto out; 454 goto out;
455 case SEMCTL: { 455 case SEMCTL: {
456 union semun fourth; 456 err = sys_semctl(first, third,
457 err = -EINVAL; 457 (int)second | IPC_64,
458 if (!ptr) 458 (union semun) ptr);
459 goto out;
460 err = -EFAULT;
461 if (get_user(fourth.__pad,
462 (void __user * __user *) ptr))
463 goto out;
464 err = sys_semctl(first, (int)second | IPC_64,
465 (int)third, fourth);
466 goto out; 459 goto out;
467 } 460 }
468 default: 461 default:
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index 69cad1b653c1..cd8c740cba1d 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -764,9 +764,11 @@ static struct of_device_id clock_match[] = {
764}; 764};
765 765
766static struct of_platform_driver clock_driver = { 766static struct of_platform_driver clock_driver = {
767 .name = "clock",
768 .match_table = clock_match, 767 .match_table = clock_match,
769 .probe = clock_probe, 768 .probe = clock_probe,
769 .driver = {
770 .name = "clock",
771 },
770}; 772};
771 773
772static int __init clock_init(void) 774static int __init clock_init(void)
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c
index 6ef42b8e53d8..34573a55b6e5 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc64/kernel/traps.c
@@ -2569,8 +2569,8 @@ void __init trap_init(void)
2569 offsetof(struct trap_per_cpu, tsb_huge)) || 2569 offsetof(struct trap_per_cpu, tsb_huge)) ||
2570 (TRAP_PER_CPU_TSB_HUGE_TEMP != 2570 (TRAP_PER_CPU_TSB_HUGE_TEMP !=
2571 offsetof(struct trap_per_cpu, tsb_huge_temp)) || 2571 offsetof(struct trap_per_cpu, tsb_huge_temp)) ||
2572 (TRAP_PER_CPU_IRQ_WORKLIST != 2572 (TRAP_PER_CPU_IRQ_WORKLIST_PA !=
2573 offsetof(struct trap_per_cpu, irq_worklist)) || 2573 offsetof(struct trap_per_cpu, irq_worklist_pa)) ||
2574 (TRAP_PER_CPU_CPU_MONDO_QMASK != 2574 (TRAP_PER_CPU_CPU_MONDO_QMASK !=
2575 offsetof(struct trap_per_cpu, cpu_mondo_qmask)) || 2575 offsetof(struct trap_per_cpu, cpu_mondo_qmask)) ||
2576 (TRAP_PER_CPU_DEV_MONDO_QMASK != 2576 (TRAP_PER_CPU_DEV_MONDO_QMASK !=
diff --git a/arch/sparc64/kernel/us2e_cpufreq.c b/arch/sparc64/kernel/us2e_cpufreq.c
index 1f83fe6a82d6..791c15138f3a 100644
--- a/arch/sparc64/kernel/us2e_cpufreq.c
+++ b/arch/sparc64/kernel/us2e_cpufreq.c
@@ -326,7 +326,6 @@ static int __init us2e_freq_cpu_init(struct cpufreq_policy *policy)
326 table[2].index = 5; 326 table[2].index = 5;
327 table[3].frequency = CPUFREQ_TABLE_END; 327 table[3].frequency = CPUFREQ_TABLE_END;
328 328
329 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
330 policy->cpuinfo.transition_latency = 0; 329 policy->cpuinfo.transition_latency = 0;
331 policy->cur = clock_tick; 330 policy->cur = clock_tick;
332 331
diff --git a/arch/sparc64/kernel/vmlinux.lds.S b/arch/sparc64/kernel/vmlinux.lds.S
index b982fa3dd748..9fcd503bc04a 100644
--- a/arch/sparc64/kernel/vmlinux.lds.S
+++ b/arch/sparc64/kernel/vmlinux.lds.S
@@ -10,105 +10,138 @@ ENTRY(_start)
10jiffies = jiffies_64; 10jiffies = jiffies_64;
11SECTIONS 11SECTIONS
12{ 12{
13 swapper_low_pmd_dir = 0x0000000000402000; 13 swapper_low_pmd_dir = 0x0000000000402000;
14 . = 0x4000; 14 . = 0x4000;
15 .text 0x0000000000404000 : 15 .text 0x0000000000404000 : {
16 { 16 _text = .;
17 _text = .; 17 TEXT_TEXT
18 TEXT_TEXT 18 SCHED_TEXT
19 SCHED_TEXT 19 LOCK_TEXT
20 LOCK_TEXT 20 KPROBES_TEXT
21 KPROBES_TEXT 21 *(.gnu.warning)
22 *(.gnu.warning) 22 } = 0
23 } =0 23 _etext = .;
24 _etext = .; 24 PROVIDE (etext = .);
25 PROVIDE (etext = .);
26 25
27 RO_DATA(PAGE_SIZE) 26 RO_DATA(PAGE_SIZE)
27 .data : {
28 DATA_DATA
29 CONSTRUCTORS
30 }
31 .data1 : {
32 *(.data1)
33 }
34 . = ALIGN(64);
35 .data.cacheline_aligned : {
36 *(.data.cacheline_aligned)
37 }
38 . = ALIGN(64);
39 .data.read_mostly : {
40 *(.data.read_mostly)
41 }
42 _edata = .;
43 PROVIDE (edata = .);
44 .fixup : {
45 *(.fixup)
46 }
47 . = ALIGN(16);
48 __ex_table : {
49 __start___ex_table = .;
50 *(__ex_table)
51 __stop___ex_table = .;
52 }
53 NOTES
28 54
29 .data : 55 . = ALIGN(PAGE_SIZE);
30 { 56 .init.text : {
31 DATA_DATA 57 __init_begin = .;
32 CONSTRUCTORS 58 _sinittext = .;
33 } 59 *(.init.text)
34 .data1 : { *(.data1) } 60 _einittext = .;
35 . = ALIGN(64); 61 }
36 .data.cacheline_aligned : { *(.data.cacheline_aligned) } 62 .init.data : {
37 . = ALIGN(64); 63 *(.init.data)
38 .data.read_mostly : { *(.data.read_mostly) } 64 }
39 _edata = .; 65 . = ALIGN(16);
40 PROVIDE (edata = .); 66 .init.setup : {
41 .fixup : { *(.fixup) } 67 __setup_start = .;
68 *(.init.setup)
69 __setup_end = .;
70 }
71 .initcall.init : {
72 __initcall_start = .;
73 INITCALLS
74 __initcall_end = .;
75 }
76 .con_initcall.init : {
77 __con_initcall_start = .;
78 *(.con_initcall.init)
79 __con_initcall_end = .;
80 }
81 SECURITY_INIT
42 82
43 . = ALIGN(16); 83 . = ALIGN(4);
44 __start___ex_table = .; 84 .tsb_ldquad_phys_patch : {
45 __ex_table : { *(__ex_table) } 85 __tsb_ldquad_phys_patch = .;
46 __stop___ex_table = .; 86 *(.tsb_ldquad_phys_patch)
87 __tsb_ldquad_phys_patch_end = .;
88 }
47 89
48 NOTES 90 .tsb_phys_patch : {
91 __tsb_phys_patch = .;
92 *(.tsb_phys_patch)
93 __tsb_phys_patch_end = .;
94 }
49 95
50 . = ALIGN(PAGE_SIZE); 96 .cpuid_patch : {
51 __init_begin = .; 97 __cpuid_patch = .;
52 .init.text : { 98 *(.cpuid_patch)
53 _sinittext = .; 99 __cpuid_patch_end = .;
54 *(.init.text) 100 }
55 _einittext = .; 101
56 } 102 .sun4v_1insn_patch : {
57 .init.data : { *(.init.data) } 103 __sun4v_1insn_patch = .;
58 . = ALIGN(16); 104 *(.sun4v_1insn_patch)
59 __setup_start = .; 105 __sun4v_1insn_patch_end = .;
60 .init.setup : { *(.init.setup) } 106 }
61 __setup_end = .; 107 .sun4v_2insn_patch : {
62 __initcall_start = .; 108 __sun4v_2insn_patch = .;
63 .initcall.init : { 109 *(.sun4v_2insn_patch)
64 INITCALLS 110 __sun4v_2insn_patch_end = .;
65 } 111 }
66 __initcall_end = .;
67 __con_initcall_start = .;
68 .con_initcall.init : { *(.con_initcall.init) }
69 __con_initcall_end = .;
70 SECURITY_INIT
71 . = ALIGN(4);
72 __tsb_ldquad_phys_patch = .;
73 .tsb_ldquad_phys_patch : { *(.tsb_ldquad_phys_patch) }
74 __tsb_ldquad_phys_patch_end = .;
75 __tsb_phys_patch = .;
76 .tsb_phys_patch : { *(.tsb_phys_patch) }
77 __tsb_phys_patch_end = .;
78 __cpuid_patch = .;
79 .cpuid_patch : { *(.cpuid_patch) }
80 __cpuid_patch_end = .;
81 __sun4v_1insn_patch = .;
82 .sun4v_1insn_patch : { *(.sun4v_1insn_patch) }
83 __sun4v_1insn_patch_end = .;
84 __sun4v_2insn_patch = .;
85 .sun4v_2insn_patch : { *(.sun4v_2insn_patch) }
86 __sun4v_2insn_patch_end = .;
87 112
88#ifdef CONFIG_BLK_DEV_INITRD 113#ifdef CONFIG_BLK_DEV_INITRD
89 . = ALIGN(PAGE_SIZE); 114 . = ALIGN(PAGE_SIZE);
90 __initramfs_start = .; 115 .init.ramfs : {
91 .init.ramfs : { *(.init.ramfs) } 116 __initramfs_start = .;
92 __initramfs_end = .; 117 *(.init.ramfs)
118 __initramfs_end = .;
119 }
93#endif 120#endif
94 121
95 PERCPU(PAGE_SIZE) 122 PERCPU(PAGE_SIZE)
96 123
97 . = ALIGN(PAGE_SIZE); 124 . = ALIGN(PAGE_SIZE);
98 __init_end = .; 125 __init_end = .;
99 __bss_start = .; 126 __bss_start = .;
100 .sbss : { *(.sbss) *(.scommon) } 127 .sbss : {
101 .bss : 128 *(.sbss)
102 { 129 *(.scommon)
103 *(.dynbss) 130 }
104 *(.bss) 131 .bss : {
105 *(COMMON) 132 *(.dynbss)
106 } 133 *(.bss)
107 _end = . ; 134 *(COMMON)
108 PROVIDE (end = .); 135 }
109 /DISCARD/ : { *(.exit.text) *(.exit.data) *(.exitcall.exit) } 136 _end = . ;
137 PROVIDE (end = .);
110 138
111 STABS_DEBUG 139 /DISCARD/ : {
140 *(.exit.text)
141 *(.exit.data)
142 *(.exitcall.exit)
143 }
112 144
113 DWARF_DEBUG 145 STABS_DEBUG
146 DWARF_DEBUG
114} 147}
diff --git a/arch/sparc64/lib/xor.S b/arch/sparc64/lib/xor.S
index a79c8888170d..f44f58f40234 100644
--- a/arch/sparc64/lib/xor.S
+++ b/arch/sparc64/lib/xor.S
@@ -491,12 +491,12 @@ xor_niagara_4: /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3 */
491 ldda [%i1 + 0x10] %asi, %i2 /* %i2/%i3 = src1 + 0x10 */ 491 ldda [%i1 + 0x10] %asi, %i2 /* %i2/%i3 = src1 + 0x10 */
492 xor %g2, %i4, %g2 492 xor %g2, %i4, %g2
493 xor %g3, %i5, %g3 493 xor %g3, %i5, %g3
494 ldda [%i7 + 0x10] %asi, %i4 /* %i4/%i5 = src2 + 0x10 */ 494 ldda [%l7 + 0x10] %asi, %i4 /* %i4/%i5 = src2 + 0x10 */
495 xor %l0, %g2, %l0 495 xor %l0, %g2, %l0
496 xor %l1, %g3, %l1 496 xor %l1, %g3, %l1
497 stxa %l0, [%i0 + 0x00] %asi 497 stxa %l0, [%i0 + 0x00] %asi
498 stxa %l1, [%i0 + 0x08] %asi 498 stxa %l1, [%i0 + 0x08] %asi
499 ldda [%i6 + 0x10] %asi, %g2 /* %g2/%g3 = src3 + 0x10 */ 499 ldda [%l6 + 0x10] %asi, %g2 /* %g2/%g3 = src3 + 0x10 */
500 ldda [%i0 + 0x10] %asi, %l0 /* %l0/%l1 = dest + 0x10 */ 500 ldda [%i0 + 0x10] %asi, %l0 /* %l0/%l1 = dest + 0x10 */
501 501
502 xor %i4, %i2, %i4 502 xor %i4, %i2, %i4
@@ -504,12 +504,12 @@ xor_niagara_4: /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3 */
504 ldda [%i1 + 0x20] %asi, %i2 /* %i2/%i3 = src1 + 0x20 */ 504 ldda [%i1 + 0x20] %asi, %i2 /* %i2/%i3 = src1 + 0x20 */
505 xor %g2, %i4, %g2 505 xor %g2, %i4, %g2
506 xor %g3, %i5, %g3 506 xor %g3, %i5, %g3
507 ldda [%i7 + 0x20] %asi, %i4 /* %i4/%i5 = src2 + 0x20 */ 507 ldda [%l7 + 0x20] %asi, %i4 /* %i4/%i5 = src2 + 0x20 */
508 xor %l0, %g2, %l0 508 xor %l0, %g2, %l0
509 xor %l1, %g3, %l1 509 xor %l1, %g3, %l1
510 stxa %l0, [%i0 + 0x10] %asi 510 stxa %l0, [%i0 + 0x10] %asi
511 stxa %l1, [%i0 + 0x18] %asi 511 stxa %l1, [%i0 + 0x18] %asi
512 ldda [%i6 + 0x20] %asi, %g2 /* %g2/%g3 = src3 + 0x20 */ 512 ldda [%l6 + 0x20] %asi, %g2 /* %g2/%g3 = src3 + 0x20 */
513 ldda [%i0 + 0x20] %asi, %l0 /* %l0/%l1 = dest + 0x20 */ 513 ldda [%i0 + 0x20] %asi, %l0 /* %l0/%l1 = dest + 0x20 */
514 514
515 xor %i4, %i2, %i4 515 xor %i4, %i2, %i4
@@ -517,12 +517,12 @@ xor_niagara_4: /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3 */
517 ldda [%i1 + 0x30] %asi, %i2 /* %i2/%i3 = src1 + 0x30 */ 517 ldda [%i1 + 0x30] %asi, %i2 /* %i2/%i3 = src1 + 0x30 */
518 xor %g2, %i4, %g2 518 xor %g2, %i4, %g2
519 xor %g3, %i5, %g3 519 xor %g3, %i5, %g3
520 ldda [%i7 + 0x30] %asi, %i4 /* %i4/%i5 = src2 + 0x30 */ 520 ldda [%l7 + 0x30] %asi, %i4 /* %i4/%i5 = src2 + 0x30 */
521 xor %l0, %g2, %l0 521 xor %l0, %g2, %l0
522 xor %l1, %g3, %l1 522 xor %l1, %g3, %l1
523 stxa %l0, [%i0 + 0x20] %asi 523 stxa %l0, [%i0 + 0x20] %asi
524 stxa %l1, [%i0 + 0x28] %asi 524 stxa %l1, [%i0 + 0x28] %asi
525 ldda [%i6 + 0x30] %asi, %g2 /* %g2/%g3 = src3 + 0x30 */ 525 ldda [%l6 + 0x30] %asi, %g2 /* %g2/%g3 = src3 + 0x30 */
526 ldda [%i0 + 0x30] %asi, %l0 /* %l0/%l1 = dest + 0x30 */ 526 ldda [%i0 + 0x30] %asi, %l0 /* %l0/%l1 = dest + 0x30 */
527 527
528 prefetch [%i1 + 0x40], #one_read 528 prefetch [%i1 + 0x40], #one_read
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 3010227fe243..f0ab9aab308f 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -631,7 +631,6 @@ void prom_world(int enter)
631 __asm__ __volatile__("flushw"); 631 __asm__ __volatile__("flushw");
632} 632}
633 633
634#ifdef DCACHE_ALIASING_POSSIBLE
635void __flush_dcache_range(unsigned long start, unsigned long end) 634void __flush_dcache_range(unsigned long start, unsigned long end)
636{ 635{
637 unsigned long va; 636 unsigned long va;
@@ -655,7 +654,6 @@ void __flush_dcache_range(unsigned long start, unsigned long end)
655 "i" (ASI_DCACHE_INVALIDATE)); 654 "i" (ASI_DCACHE_INVALIDATE));
656 } 655 }
657} 656}
658#endif /* DCACHE_ALIASING_POSSIBLE */
659 657
660/* get_new_mmu_context() uses "cache + 1". */ 658/* get_new_mmu_context() uses "cache + 1". */
661DEFINE_SPINLOCK(ctx_alloc_lock); 659DEFINE_SPINLOCK(ctx_alloc_lock);
diff --git a/arch/um/Makefile b/arch/um/Makefile
index 989224f21346..0666729eb976 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -176,9 +176,9 @@ include/asm-um/arch:
176 @echo ' SYMLINK $@' 176 @echo ' SYMLINK $@'
177ifneq ($(KBUILD_SRC),) 177ifneq ($(KBUILD_SRC),)
178 $(Q)mkdir -p $(objtree)/include/asm-um 178 $(Q)mkdir -p $(objtree)/include/asm-um
179 $(Q)ln -fsn $(srctree)/include/asm-$(SUBARCH) include/asm-um/arch 179 $(Q)ln -fsn $(srctree)/include/asm-$(HEADER_ARCH) include/asm-um/arch
180else 180else
181 $(Q)cd $(TOPDIR)/include/asm-um && ln -sf ../asm-$(SUBARCH) arch 181 $(Q)cd $(TOPDIR)/include/asm-um && ln -sf ../asm-$(HEADER_ARCH) arch
182endif 182endif
183 183
184$(objtree)/$(ARCH_DIR)/include: 184$(objtree)/$(ARCH_DIR)/include:
@@ -232,4 +232,4 @@ $(ARCH_DIR)/include/kern_constants.h: $(objtree)/$(ARCH_DIR)/include
232 @echo ' SYMLINK $@' 232 @echo ' SYMLINK $@'
233 $(Q)ln -sf ../../../include/asm-um/asm-offsets.h $@ 233 $(Q)ln -sf ../../../include/asm-um/asm-offsets.h $@
234 234
235export SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING OS 235export SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING OS HEADER_ARCH
diff --git a/arch/um/Makefile-i386 b/arch/um/Makefile-i386
index c9f1c5b24c9a..60107ed4905b 100644
--- a/arch/um/Makefile-i386
+++ b/arch/um/Makefile-i386
@@ -1,4 +1,4 @@
1core-y += arch/um/sys-i386/ arch/i386/crypto/ 1core-y += arch/um/sys-i386/ arch/x86/crypto/
2 2
3TOP_ADDR := $(CONFIG_TOP_ADDR) 3TOP_ADDR := $(CONFIG_TOP_ADDR)
4 4
@@ -12,6 +12,7 @@ LDFLAGS += -m elf_i386
12ELF_ARCH := $(SUBARCH) 12ELF_ARCH := $(SUBARCH)
13ELF_FORMAT := elf32-$(SUBARCH) 13ELF_FORMAT := elf32-$(SUBARCH)
14OBJCOPYFLAGS := -O binary -R .note -R .comment -S 14OBJCOPYFLAGS := -O binary -R .note -R .comment -S
15HEADER_ARCH := x86
15 16
16ifeq ("$(origin SUBARCH)", "command line") 17ifeq ("$(origin SUBARCH)", "command line")
17ifneq ("$(shell uname -m | sed -e s/i.86/i386/)", "$(SUBARCH)") 18ifneq ("$(shell uname -m | sed -e s/i.86/i386/)", "$(SUBARCH)")
@@ -24,6 +25,11 @@ export LDFLAGS HOSTCFLAGS HOSTLDFLAGS UML_OBJCOPYFLAGS
24endif 25endif
25endif 26endif
26 27
28CFLAGS += -DCONFIG_X86_32
29AFLAGS += -DCONFIG_X86_32
30CONFIG_X86_32 := y
31export CONFIG_X86_32
32
27ARCH_KERNEL_DEFINES += -U__$(SUBARCH)__ -U$(SUBARCH) 33ARCH_KERNEL_DEFINES += -U__$(SUBARCH)__ -U$(SUBARCH)
28 34
29# First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y. 35# First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y.
diff --git a/arch/um/Makefile-x86_64 b/arch/um/Makefile-x86_64
index 69ecea63fdae..8a00e5f6934c 100644
--- a/arch/um/Makefile-x86_64
+++ b/arch/um/Makefile-x86_64
@@ -1,7 +1,7 @@
1# Copyright 2003 - 2004 Pathscale, Inc 1# Copyright 2003 - 2004 Pathscale, Inc
2# Released under the GPL 2# Released under the GPL
3 3
4core-y += arch/um/sys-x86_64/ arch/x86_64/crypto/ 4core-y += arch/um/sys-x86_64/ arch/x86/crypto/
5START := 0x60000000 5START := 0x60000000
6 6
7_extra_flags_ = -fno-builtin -m64 7_extra_flags_ = -fno-builtin -m64
@@ -18,6 +18,7 @@ CPPFLAGS += -m64
18 18
19ELF_ARCH := i386:x86-64 19ELF_ARCH := i386:x86-64
20ELF_FORMAT := elf64-x86-64 20ELF_FORMAT := elf64-x86-64
21HEADER_ARCH := x86
21 22
22# Not on all 64-bit distros /lib is a symlink to /lib64. PLD is an example. 23# Not on all 64-bit distros /lib is a symlink to /lib64. PLD is an example.
23 24
diff --git a/arch/um/scripts/Makefile.rules b/arch/um/scripts/Makefile.rules
index a9a4b85ca516..bf23dd3e24d0 100644
--- a/arch/um/scripts/Makefile.rules
+++ b/arch/um/scripts/Makefile.rules
@@ -28,5 +28,5 @@ endef
28 28
29ifdef subarch-obj-y 29ifdef subarch-obj-y
30obj-y += subarch.o 30obj-y += subarch.o
31subarch-y = $(addprefix ../../$(SUBARCH)/,$(subarch-obj-y)) 31subarch-y = $(addprefix ../../$(HEADER_ARCH)/,$(subarch-obj-y))
32endif 32endif
diff --git a/arch/um/sys-i386/Makefile b/arch/um/sys-i386/Makefile
index d6b3ecd4b77e..a4618b6b85b9 100644
--- a/arch/um/sys-i386/Makefile
+++ b/arch/um/sys-i386/Makefile
@@ -4,9 +4,9 @@ obj-y = bug.o bugs.o checksum.o delay.o fault.o ksyms.o ldt.o ptrace.o \
4 4
5obj-$(CONFIG_MODE_SKAS) += stub.o stub_segv.o 5obj-$(CONFIG_MODE_SKAS) += stub.o stub_segv.o
6 6
7subarch-obj-y = lib/bitops.o lib/semaphore.o lib/string.o 7subarch-obj-y = lib/bitops_32.o lib/semaphore_32.o lib/string_32.o
8subarch-obj-$(CONFIG_HIGHMEM) += mm/highmem.o 8subarch-obj-$(CONFIG_HIGHMEM) += mm/highmem_32.o
9subarch-obj-$(CONFIG_MODULES) += kernel/module.o 9subarch-obj-$(CONFIG_MODULES) += kernel/module_32.o
10 10
11USER_OBJS := bugs.o ptrace_user.o sigcontext.o fault.o 11USER_OBJS := bugs.o ptrace_user.o sigcontext.o fault.o
12 12
diff --git a/arch/um/sys-x86_64/Makefile b/arch/um/sys-x86_64/Makefile
index 4d9e5efa6fb9..ea8185d85404 100644
--- a/arch/um/sys-x86_64/Makefile
+++ b/arch/um/sys-x86_64/Makefile
@@ -11,8 +11,8 @@ obj-y = bug.o bugs.o delay.o fault.o ldt.o mem.o ptrace.o ptrace_user.o \
11obj-$(CONFIG_MODE_SKAS) += stub.o stub_segv.o 11obj-$(CONFIG_MODE_SKAS) += stub.o stub_segv.o
12obj-$(CONFIG_MODULES) += um_module.o 12obj-$(CONFIG_MODULES) += um_module.o
13 13
14subarch-obj-y = lib/bitops.o lib/csum-partial.o lib/memcpy.o lib/thunk.o 14subarch-obj-y = lib/bitops_64.o lib/csum-partial_64.o lib/memcpy_64.o lib/thunk_64.o
15subarch-obj-$(CONFIG_MODULES) += kernel/module.o 15subarch-obj-$(CONFIG_MODULES) += kernel/module_64.o
16 16
17ldt-y = ../sys-i386/ldt.o 17ldt-y = ../sys-i386/ldt.o
18 18
diff --git a/arch/x86/kernel/Makefile_32 b/arch/x86/kernel/Makefile_32
index c624193740fd..7ff02063b858 100644
--- a/arch/x86/kernel/Makefile_32
+++ b/arch/x86/kernel/Makefile_32
@@ -7,7 +7,7 @@ extra-y := head_32.o init_task_32.o vmlinux.lds
7obj-y := process_32.o signal_32.o entry_32.o traps_32.o irq_32.o \ 7obj-y := process_32.o signal_32.o entry_32.o traps_32.o irq_32.o \
8 ptrace_32.o time_32.o ioport_32.o ldt_32.o setup_32.o i8259_32.o sys_i386_32.o \ 8 ptrace_32.o time_32.o ioport_32.o ldt_32.o setup_32.o i8259_32.o sys_i386_32.o \
9 pci-dma_32.o i386_ksyms_32.o i387_32.o bootflag.o e820_32.o\ 9 pci-dma_32.o i386_ksyms_32.o i387_32.o bootflag.o e820_32.o\
10 quirks.o i8237.o topology.o alternative.o i8253_32.o tsc_32.o 10 quirks.o i8237.o topology.o alternative.o i8253.o tsc_32.o
11 11
12obj-$(CONFIG_STACKTRACE) += stacktrace.o 12obj-$(CONFIG_STACKTRACE) += stacktrace.o
13obj-y += cpu/ 13obj-y += cpu/
@@ -37,9 +37,9 @@ obj-$(CONFIG_EFI) += efi_32.o efi_stub_32.o
37obj-$(CONFIG_DOUBLEFAULT) += doublefault_32.o 37obj-$(CONFIG_DOUBLEFAULT) += doublefault_32.o
38obj-$(CONFIG_VM86) += vm86_32.o 38obj-$(CONFIG_VM86) += vm86_32.o
39obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 39obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
40obj-$(CONFIG_HPET_TIMER) += hpet_32.o 40obj-$(CONFIG_HPET_TIMER) += hpet.o
41obj-$(CONFIG_K8_NB) += k8.o 41obj-$(CONFIG_K8_NB) += k8.o
42obj-$(CONFIG_MGEODE_LX) += geode_32.o 42obj-$(CONFIG_MGEODE_LX) += geode_32.o mfgpt_32.o
43 43
44obj-$(CONFIG_VMI) += vmi_32.o vmiclock_32.o 44obj-$(CONFIG_VMI) += vmi_32.o vmiclock_32.o
45obj-$(CONFIG_PARAVIRT) += paravirt_32.o 45obj-$(CONFIG_PARAVIRT) += paravirt_32.o
diff --git a/arch/x86/kernel/Makefile_64 b/arch/x86/kernel/Makefile_64
index 3ab017a0a3b9..43da66213a47 100644
--- a/arch/x86/kernel/Makefile_64
+++ b/arch/x86/kernel/Makefile_64
@@ -8,8 +8,8 @@ obj-y := process_64.o signal_64.o entry_64.o traps_64.o irq_64.o \
8 ptrace_64.o time_64.o ioport_64.o ldt_64.o setup_64.o i8259_64.o sys_x86_64.o \ 8 ptrace_64.o time_64.o ioport_64.o ldt_64.o setup_64.o i8259_64.o sys_x86_64.o \
9 x8664_ksyms_64.o i387_64.o syscall_64.o vsyscall_64.o \ 9 x8664_ksyms_64.o i387_64.o syscall_64.o vsyscall_64.o \
10 setup64.o bootflag.o e820_64.o reboot_64.o quirks.o i8237.o \ 10 setup64.o bootflag.o e820_64.o reboot_64.o quirks.o i8237.o \
11 pci-dma_64.o pci-nommu_64.o alternative.o hpet_64.o tsc_64.o bugs_64.o \ 11 pci-dma_64.o pci-nommu_64.o alternative.o hpet.o tsc_64.o bugs_64.o \
12 perfctr-watchdog.o 12 perfctr-watchdog.o i8253.o
13 13
14obj-$(CONFIG_STACKTRACE) += stacktrace.o 14obj-$(CONFIG_STACKTRACE) += stacktrace.o
15obj-$(CONFIG_X86_MCE) += mce_64.o therm_throt.o 15obj-$(CONFIG_X86_MCE) += mce_64.o therm_throt.o
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index bd72d94e713e..11b03d3c6fda 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -10,6 +10,7 @@
10#include <asm/pgtable.h> 10#include <asm/pgtable.h>
11#include <asm/mce.h> 11#include <asm/mce.h>
12#include <asm/nmi.h> 12#include <asm/nmi.h>
13#include <asm/vsyscall.h>
13 14
14#define MAX_PATCH_LEN (255-1) 15#define MAX_PATCH_LEN (255-1)
15 16
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 925758dbca0c..09b82093bc75 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -25,6 +25,7 @@
25#include <linux/sysdev.h> 25#include <linux/sysdev.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/ioport.h> 27#include <linux/ioport.h>
28#include <linux/clockchips.h>
28 29
29#include <asm/atomic.h> 30#include <asm/atomic.h>
30#include <asm/smp.h> 31#include <asm/smp.h>
@@ -39,12 +40,9 @@
39#include <asm/hpet.h> 40#include <asm/hpet.h>
40#include <asm/apic.h> 41#include <asm/apic.h>
41 42
42int apic_mapped;
43int apic_verbosity; 43int apic_verbosity;
44int apic_runs_main_timer; 44int disable_apic_timer __cpuinitdata;
45int apic_calibrate_pmtmr __initdata; 45static int apic_calibrate_pmtmr __initdata;
46
47int disable_apic_timer __initdata;
48 46
49/* Local APIC timer works in C2? */ 47/* Local APIC timer works in C2? */
50int local_apic_timer_c2_ok; 48int local_apic_timer_c2_ok;
@@ -56,14 +54,78 @@ static struct resource lapic_resource = {
56 .flags = IORESOURCE_MEM | IORESOURCE_BUSY, 54 .flags = IORESOURCE_MEM | IORESOURCE_BUSY,
57}; 55};
58 56
57static unsigned int calibration_result;
58
59static int lapic_next_event(unsigned long delta,
60 struct clock_event_device *evt);
61static void lapic_timer_setup(enum clock_event_mode mode,
62 struct clock_event_device *evt);
63
64static void lapic_timer_broadcast(cpumask_t mask);
65
66static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen);
67
68static struct clock_event_device lapic_clockevent = {
69 .name = "lapic",
70 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT
71 | CLOCK_EVT_FEAT_C3STOP | CLOCK_EVT_FEAT_DUMMY,
72 .shift = 32,
73 .set_mode = lapic_timer_setup,
74 .set_next_event = lapic_next_event,
75 .broadcast = lapic_timer_broadcast,
76 .rating = 100,
77 .irq = -1,
78};
79static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
80
81static int lapic_next_event(unsigned long delta,
82 struct clock_event_device *evt)
83{
84 apic_write(APIC_TMICT, delta);
85 return 0;
86}
87
88static void lapic_timer_setup(enum clock_event_mode mode,
89 struct clock_event_device *evt)
90{
91 unsigned long flags;
92 unsigned int v;
93
94 /* Lapic used as dummy for broadcast ? */
95 if (evt->features & CLOCK_EVT_FEAT_DUMMY)
96 return;
97
98 local_irq_save(flags);
99
100 switch (mode) {
101 case CLOCK_EVT_MODE_PERIODIC:
102 case CLOCK_EVT_MODE_ONESHOT:
103 __setup_APIC_LVTT(calibration_result,
104 mode != CLOCK_EVT_MODE_PERIODIC, 1);
105 break;
106 case CLOCK_EVT_MODE_UNUSED:
107 case CLOCK_EVT_MODE_SHUTDOWN:
108 v = apic_read(APIC_LVTT);
109 v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
110 apic_write(APIC_LVTT, v);
111 break;
112 case CLOCK_EVT_MODE_RESUME:
113 /* Nothing to do here */
114 break;
115 }
116
117 local_irq_restore(flags);
118}
119
59/* 120/*
60 * cpu_mask that denotes the CPUs that needs timer interrupt coming in as 121 * Local APIC timer broadcast function
61 * IPIs in place of local APIC timers
62 */ 122 */
63static cpumask_t timer_interrupt_broadcast_ipi_mask; 123static void lapic_timer_broadcast(cpumask_t mask)
64 124{
65/* Using APIC to generate smp_local_timer_interrupt? */ 125#ifdef CONFIG_SMP
66int using_apic_timer __read_mostly = 0; 126 send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
127#endif
128}
67 129
68static void apic_pm_activate(void); 130static void apic_pm_activate(void);
69 131
@@ -184,7 +246,10 @@ void disconnect_bsp_APIC(int virt_wire_setup)
184 apic_write(APIC_SPIV, value); 246 apic_write(APIC_SPIV, value);
185 247
186 if (!virt_wire_setup) { 248 if (!virt_wire_setup) {
187 /* For LVT0 make it edge triggered, active high, external and enabled */ 249 /*
250 * For LVT0 make it edge triggered, active high,
251 * external and enabled
252 */
188 value = apic_read(APIC_LVT0); 253 value = apic_read(APIC_LVT0);
189 value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING | 254 value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
190 APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR | 255 APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
@@ -420,10 +485,12 @@ void __cpuinit setup_local_APIC (void)
420 value = apic_read(APIC_LVT0) & APIC_LVT_MASKED; 485 value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
421 if (!smp_processor_id() && !value) { 486 if (!smp_processor_id() && !value) {
422 value = APIC_DM_EXTINT; 487 value = APIC_DM_EXTINT;
423 apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", smp_processor_id()); 488 apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n",
489 smp_processor_id());
424 } else { 490 } else {
425 value = APIC_DM_EXTINT | APIC_LVT_MASKED; 491 value = APIC_DM_EXTINT | APIC_LVT_MASKED;
426 apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", smp_processor_id()); 492 apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n",
493 smp_processor_id());
427 } 494 }
428 apic_write(APIC_LVT0, value); 495 apic_write(APIC_LVT0, value);
429 496
@@ -706,8 +773,8 @@ void __init init_apic_mappings(void)
706 apic_phys = mp_lapic_addr; 773 apic_phys = mp_lapic_addr;
707 774
708 set_fixmap_nocache(FIX_APIC_BASE, apic_phys); 775 set_fixmap_nocache(FIX_APIC_BASE, apic_phys);
709 apic_mapped = 1; 776 apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",
710 apic_printk(APIC_VERBOSE,"mapped APIC to %16lx (%16lx)\n", APIC_BASE, apic_phys); 777 APIC_BASE, apic_phys);
711 778
712 /* Put local APIC into the resource map. */ 779 /* Put local APIC into the resource map. */
713 lapic_resource.start = apic_phys; 780 lapic_resource.start = apic_phys;
@@ -730,12 +797,14 @@ void __init init_apic_mappings(void)
730 if (smp_found_config) { 797 if (smp_found_config) {
731 ioapic_phys = mp_ioapics[i].mpc_apicaddr; 798 ioapic_phys = mp_ioapics[i].mpc_apicaddr;
732 } else { 799 } else {
733 ioapic_phys = (unsigned long) alloc_bootmem_pages(PAGE_SIZE); 800 ioapic_phys = (unsigned long)
801 alloc_bootmem_pages(PAGE_SIZE);
734 ioapic_phys = __pa(ioapic_phys); 802 ioapic_phys = __pa(ioapic_phys);
735 } 803 }
736 set_fixmap_nocache(idx, ioapic_phys); 804 set_fixmap_nocache(idx, ioapic_phys);
737 apic_printk(APIC_VERBOSE,"mapped IOAPIC to %016lx (%016lx)\n", 805 apic_printk(APIC_VERBOSE,
738 __fix_to_virt(idx), ioapic_phys); 806 "mapped IOAPIC to %016lx (%016lx)\n",
807 __fix_to_virt(idx), ioapic_phys);
739 idx++; 808 idx++;
740 809
741 if (ioapic_res != NULL) { 810 if (ioapic_res != NULL) {
@@ -758,16 +827,14 @@ void __init init_apic_mappings(void)
758 * P5 APIC double write bug. 827 * P5 APIC double write bug.
759 */ 828 */
760 829
761#define APIC_DIVISOR 16 830static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
762
763static void __setup_APIC_LVTT(unsigned int clocks)
764{ 831{
765 unsigned int lvtt_value, tmp_value; 832 unsigned int lvtt_value, tmp_value;
766 int cpu = smp_processor_id();
767 833
768 lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; 834 lvtt_value = LOCAL_TIMER_VECTOR;
769 835 if (!oneshot)
770 if (cpu_isset(cpu, timer_interrupt_broadcast_ipi_mask)) 836 lvtt_value |= APIC_LVT_TIMER_PERIODIC;
837 if (!irqen)
771 lvtt_value |= APIC_LVT_MASKED; 838 lvtt_value |= APIC_LVT_MASKED;
772 839
773 apic_write(APIC_LVTT, lvtt_value); 840 apic_write(APIC_LVTT, lvtt_value);
@@ -780,44 +847,18 @@ static void __setup_APIC_LVTT(unsigned int clocks)
780 & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) 847 & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE))
781 | APIC_TDR_DIV_16); 848 | APIC_TDR_DIV_16);
782 849
783 apic_write(APIC_TMICT, clocks/APIC_DIVISOR); 850 if (!oneshot)
851 apic_write(APIC_TMICT, clocks);
784} 852}
785 853
786static void setup_APIC_timer(unsigned int clocks) 854static void setup_APIC_timer(void)
787{ 855{
788 unsigned long flags; 856 struct clock_event_device *levt = &__get_cpu_var(lapic_events);
789 857
790 local_irq_save(flags); 858 memcpy(levt, &lapic_clockevent, sizeof(*levt));
859 levt->cpumask = cpumask_of_cpu(smp_processor_id());
791 860
792 /* wait for irq slice */ 861 clockevents_register_device(levt);
793 if (hpet_address && hpet_use_timer) {
794 u32 trigger = hpet_readl(HPET_T0_CMP);
795 while (hpet_readl(HPET_T0_CMP) == trigger)
796 /* do nothing */ ;
797 } else {
798 int c1, c2;
799 outb_p(0x00, 0x43);
800 c2 = inb_p(0x40);
801 c2 |= inb_p(0x40) << 8;
802 do {
803 c1 = c2;
804 outb_p(0x00, 0x43);
805 c2 = inb_p(0x40);
806 c2 |= inb_p(0x40) << 8;
807 } while (c2 - c1 < 300);
808 }
809 __setup_APIC_LVTT(clocks);
810 /* Turn off PIT interrupt if we use APIC timer as main timer.
811 Only works with the PM timer right now
812 TBD fix it for HPET too. */
813 if ((pmtmr_ioport != 0) &&
814 smp_processor_id() == boot_cpu_id &&
815 apic_runs_main_timer == 1 &&
816 !cpu_isset(boot_cpu_id, timer_interrupt_broadcast_ipi_mask)) {
817 stop_timer_interrupt();
818 apic_runs_main_timer++;
819 }
820 local_irq_restore(flags);
821} 862}
822 863
823/* 864/*
@@ -835,17 +876,22 @@ static void setup_APIC_timer(unsigned int clocks)
835 876
836#define TICK_COUNT 100000000 877#define TICK_COUNT 100000000
837 878
838static int __init calibrate_APIC_clock(void) 879static void __init calibrate_APIC_clock(void)
839{ 880{
840 unsigned apic, apic_start; 881 unsigned apic, apic_start;
841 unsigned long tsc, tsc_start; 882 unsigned long tsc, tsc_start;
842 int result; 883 int result;
884
885 local_irq_disable();
886
843 /* 887 /*
844 * Put whatever arbitrary (but long enough) timeout 888 * Put whatever arbitrary (but long enough) timeout
845 * value into the APIC clock, we just want to get the 889 * value into the APIC clock, we just want to get the
846 * counter running for calibration. 890 * counter running for calibration.
891 *
892 * No interrupt enable !
847 */ 893 */
848 __setup_APIC_LVTT(4000000000); 894 __setup_APIC_LVTT(250000000, 0, 0);
849 895
850 apic_start = apic_read(APIC_TMCCT); 896 apic_start = apic_read(APIC_TMCCT);
851#ifdef CONFIG_X86_PM_TIMER 897#ifdef CONFIG_X86_PM_TIMER
@@ -867,123 +913,88 @@ static int __init calibrate_APIC_clock(void)
867 result = (apic_start - apic) * 1000L * tsc_khz / 913 result = (apic_start - apic) * 1000L * tsc_khz /
868 (tsc - tsc_start); 914 (tsc - tsc_start);
869 } 915 }
870 printk("result %d\n", result);
871 916
917 local_irq_enable();
918
919 printk(KERN_DEBUG "APIC timer calibration result %d\n", result);
872 920
873 printk(KERN_INFO "Detected %d.%03d MHz APIC timer.\n", 921 printk(KERN_INFO "Detected %d.%03d MHz APIC timer.\n",
874 result / 1000 / 1000, result / 1000 % 1000); 922 result / 1000 / 1000, result / 1000 % 1000);
875 923
876 return result * APIC_DIVISOR / HZ; 924 /* Calculate the scaled math multiplication factor */
877} 925 lapic_clockevent.mult = div_sc(result, NSEC_PER_SEC, 32);
926 lapic_clockevent.max_delta_ns =
927 clockevent_delta2ns(0x7FFFFF, &lapic_clockevent);
928 lapic_clockevent.min_delta_ns =
929 clockevent_delta2ns(0xF, &lapic_clockevent);
878 930
879static unsigned int calibration_result; 931 calibration_result = result / HZ;
932}
880 933
881void __init setup_boot_APIC_clock (void) 934void __init setup_boot_APIC_clock (void)
882{ 935{
936 /*
937 * The local apic timer can be disabled via the kernel commandline.
938 * Register the lapic timer as a dummy clock event source on SMP
939 * systems, so the broadcast mechanism is used. On UP systems simply
940 * ignore it.
941 */
883 if (disable_apic_timer) { 942 if (disable_apic_timer) {
884 printk(KERN_INFO "Disabling APIC timer\n"); 943 printk(KERN_INFO "Disabling APIC timer\n");
944 /* No broadcast on UP ! */
945 if (num_possible_cpus() > 1)
946 setup_APIC_timer();
885 return; 947 return;
886 } 948 }
887 949
888 printk(KERN_INFO "Using local APIC timer interrupts.\n"); 950 printk(KERN_INFO "Using local APIC timer interrupts.\n");
889 using_apic_timer = 1; 951 calibrate_APIC_clock();
890
891 local_irq_disable();
892 952
893 calibration_result = calibrate_APIC_clock();
894 /* 953 /*
895 * Now set up the timer for real. 954 * If nmi_watchdog is set to IO_APIC, we need the
955 * PIT/HPET going. Otherwise register lapic as a dummy
956 * device.
896 */ 957 */
897 setup_APIC_timer(calibration_result); 958 if (nmi_watchdog != NMI_IO_APIC)
898 959 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
899 local_irq_enable(); 960 else
900} 961 printk(KERN_WARNING "APIC timer registered as dummy,"
901 962 " due to nmi_watchdog=1!\n");
902void __cpuinit setup_secondary_APIC_clock(void)
903{
904 local_irq_disable(); /* FIXME: Do we need this? --RR */
905 setup_APIC_timer(calibration_result);
906 local_irq_enable();
907}
908
909void disable_APIC_timer(void)
910{
911 if (using_apic_timer) {
912 unsigned long v;
913 963
914 v = apic_read(APIC_LVTT); 964 setup_APIC_timer();
915 /*
916 * When an illegal vector value (0-15) is written to an LVT
917 * entry and delivery mode is Fixed, the APIC may signal an
918 * illegal vector error, with out regard to whether the mask
919 * bit is set or whether an interrupt is actually seen on input.
920 *
921 * Boot sequence might call this function when the LVTT has
922 * '0' vector value. So make sure vector field is set to
923 * valid value.
924 */
925 v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
926 apic_write(APIC_LVTT, v);
927 }
928} 965}
929 966
930void enable_APIC_timer(void) 967/*
968 * AMD C1E enabled CPUs have a real nasty problem: Some BIOSes set the
969 * C1E flag only in the secondary CPU, so when we detect the wreckage
970 * we already have enabled the boot CPU local apic timer. Check, if
971 * disable_apic_timer is set and the DUMMY flag is cleared. If yes,
972 * set the DUMMY flag again and force the broadcast mode in the
973 * clockevents layer.
974 */
975void __cpuinit check_boot_apic_timer_broadcast(void)
931{ 976{
932 int cpu = smp_processor_id(); 977 struct clock_event_device *levt = &per_cpu(lapic_events, boot_cpu_id);
933 978
934 if (using_apic_timer && 979 if (!disable_apic_timer ||
935 !cpu_isset(cpu, timer_interrupt_broadcast_ipi_mask)) { 980 (lapic_clockevent.features & CLOCK_EVT_FEAT_DUMMY))
936 unsigned long v; 981 return;
937 982
938 v = apic_read(APIC_LVTT); 983 printk(KERN_INFO "AMD C1E detected late. Force timer broadcast.\n");
939 apic_write(APIC_LVTT, v & ~APIC_LVT_MASKED); 984 lapic_clockevent.features |= CLOCK_EVT_FEAT_DUMMY;
940 } 985 levt->features |= CLOCK_EVT_FEAT_DUMMY;
941}
942 986
943void switch_APIC_timer_to_ipi(void *cpumask) 987 local_irq_enable();
944{ 988 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, &boot_cpu_id);
945 cpumask_t mask = *(cpumask_t *)cpumask; 989 local_irq_disable();
946 int cpu = smp_processor_id();
947
948 if (cpu_isset(cpu, mask) &&
949 !cpu_isset(cpu, timer_interrupt_broadcast_ipi_mask)) {
950 disable_APIC_timer();
951 cpu_set(cpu, timer_interrupt_broadcast_ipi_mask);
952 }
953} 990}
954EXPORT_SYMBOL(switch_APIC_timer_to_ipi);
955 991
956void smp_send_timer_broadcast_ipi(void) 992void __cpuinit setup_secondary_APIC_clock(void)
957{ 993{
958 int cpu = smp_processor_id(); 994 check_boot_apic_timer_broadcast();
959 cpumask_t mask; 995 setup_APIC_timer();
960
961 cpus_and(mask, cpu_online_map, timer_interrupt_broadcast_ipi_mask);
962
963 if (cpu_isset(cpu, mask)) {
964 cpu_clear(cpu, mask);
965 add_pda(apic_timer_irqs, 1);
966 smp_local_timer_interrupt();
967 }
968
969 if (!cpus_empty(mask)) {
970 send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
971 }
972} 996}
973 997
974void switch_ipi_to_APIC_timer(void *cpumask)
975{
976 cpumask_t mask = *(cpumask_t *)cpumask;
977 int cpu = smp_processor_id();
978
979 if (cpu_isset(cpu, mask) &&
980 cpu_isset(cpu, timer_interrupt_broadcast_ipi_mask)) {
981 cpu_clear(cpu, timer_interrupt_broadcast_ipi_mask);
982 enable_APIC_timer();
983 }
984}
985EXPORT_SYMBOL(switch_ipi_to_APIC_timer);
986
987int setup_profiling_timer(unsigned int multiplier) 998int setup_profiling_timer(unsigned int multiplier)
988{ 999{
989 return -EINVAL; 1000 return -EINVAL;
@@ -997,8 +1008,6 @@ void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector,
997 apic_write(reg, v); 1008 apic_write(reg, v);
998} 1009}
999 1010
1000#undef APIC_DIVISOR
1001
1002/* 1011/*
1003 * Local timer interrupt handler. It does both profiling and 1012 * Local timer interrupt handler. It does both profiling and
1004 * process statistics/rescheduling. 1013 * process statistics/rescheduling.
@@ -1011,22 +1020,34 @@ void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector,
1011 1020
1012void smp_local_timer_interrupt(void) 1021void smp_local_timer_interrupt(void)
1013{ 1022{
1014 profile_tick(CPU_PROFILING); 1023 int cpu = smp_processor_id();
1015#ifdef CONFIG_SMP 1024 struct clock_event_device *evt = &per_cpu(lapic_events, cpu);
1016 update_process_times(user_mode(get_irq_regs())); 1025
1017#endif
1018 if (apic_runs_main_timer > 1 && smp_processor_id() == boot_cpu_id)
1019 main_timer_handler();
1020 /* 1026 /*
1021 * We take the 'long' return path, and there every subsystem 1027 * Normally we should not be here till LAPIC has been initialized but
1022 * grabs the appropriate locks (kernel lock/ irq lock). 1028 * in some cases like kdump, its possible that there is a pending LAPIC
1029 * timer interrupt from previous kernel's context and is delivered in
1030 * new kernel the moment interrupts are enabled.
1023 * 1031 *
1024 * We might want to decouple profiling from the 'long path', 1032 * Interrupts are enabled early and LAPIC is setup much later, hence
1025 * and do the profiling totally in assembly. 1033 * its possible that when we get here evt->event_handler is NULL.
1026 * 1034 * Check for event_handler being NULL and discard the interrupt as
1027 * Currently this isn't too much of an issue (performance wise), 1035 * spurious.
1028 * we can take more than 100K local irqs per second on a 100 MHz P5. 1036 */
1037 if (!evt->event_handler) {
1038 printk(KERN_WARNING
1039 "Spurious LAPIC timer interrupt on cpu %d\n", cpu);
1040 /* Switch it off */
1041 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt);
1042 return;
1043 }
1044
1045 /*
1046 * the NMI deadlock-detector uses this.
1029 */ 1047 */
1048 add_pda(apic_timer_irqs, 1);
1049
1050 evt->event_handler(evt);
1030} 1051}
1031 1052
1032/* 1053/*
@@ -1042,11 +1063,6 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
1042 struct pt_regs *old_regs = set_irq_regs(regs); 1063 struct pt_regs *old_regs = set_irq_regs(regs);
1043 1064
1044 /* 1065 /*
1045 * the NMI deadlock-detector uses this.
1046 */
1047 add_pda(apic_timer_irqs, 1);
1048
1049 /*
1050 * NOTE! We'd better ACK the irq immediately, 1066 * NOTE! We'd better ACK the irq immediately,
1051 * because timer handling can be slow. 1067 * because timer handling can be slow.
1052 */ 1068 */
@@ -1225,29 +1241,13 @@ static __init int setup_noapictimer(char *str)
1225 disable_apic_timer = 1; 1241 disable_apic_timer = 1;
1226 return 1; 1242 return 1;
1227} 1243}
1228 1244__setup("noapictimer", setup_noapictimer);
1229static __init int setup_apicmaintimer(char *str)
1230{
1231 apic_runs_main_timer = 1;
1232 nohpet = 1;
1233 return 1;
1234}
1235__setup("apicmaintimer", setup_apicmaintimer);
1236
1237static __init int setup_noapicmaintimer(char *str)
1238{
1239 apic_runs_main_timer = -1;
1240 return 1;
1241}
1242__setup("noapicmaintimer", setup_noapicmaintimer);
1243 1245
1244static __init int setup_apicpmtimer(char *s) 1246static __init int setup_apicpmtimer(char *s)
1245{ 1247{
1246 apic_calibrate_pmtmr = 1; 1248 apic_calibrate_pmtmr = 1;
1247 notsc_setup(NULL); 1249 notsc_setup(NULL);
1248 return setup_apicmaintimer(NULL); 1250 return 0;
1249} 1251}
1250__setup("apicpmtimer", setup_apicpmtimer); 1252__setup("apicpmtimer", setup_apicpmtimer);
1251 1253
1252__setup("noapictimer", setup_noapictimer);
1253
diff --git a/arch/x86/kernel/bugs_64.c b/arch/x86/kernel/bugs_64.c
index 4e5e9d364d63..9a189cef6404 100644
--- a/arch/x86/kernel/bugs_64.c
+++ b/arch/x86/kernel/bugs_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/x86_64/kernel/bugs.c
3 *
4 * Copyright (C) 1994 Linus Torvalds 2 * Copyright (C) 1994 Linus Torvalds
5 * Copyright (C) 2000 SuSE 3 * Copyright (C) 2000 SuSE
6 */ 4 */
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 59266f03d1cd..205fd5ba57f7 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/i386/cpu/bugs.c
3 *
4 * Copyright (C) 1994 Linus Torvalds 2 * Copyright (C) 1994 Linus Torvalds
5 * 3 *
6 * Cyrix stuff, June 1998 by: 4 * Cyrix stuff, June 1998 by:
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index b6434a7ef8b2..ffd01e5dcb52 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -646,7 +646,6 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
646 policy->cpuinfo.transition_latency = 646 policy->cpuinfo.transition_latency =
647 perf->states[i].transition_latency * 1000; 647 perf->states[i].transition_latency * 1000;
648 } 648 }
649 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
650 649
651 data->max_freq = perf->states[0].core_frequency * 1000; 650 data->max_freq = perf->states[0].core_frequency * 1000;
652 /* table init */ 651 /* table init */
diff --git a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
index 66acd5039918..32f0bda3fc95 100644
--- a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
@@ -363,7 +363,6 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
363 policy->cur = nforce2_get(policy->cpu); 363 policy->cur = nforce2_get(policy->cpu);
364 policy->min = policy->cpuinfo.min_freq; 364 policy->min = policy->cpuinfo.min_freq;
365 policy->max = policy->cpuinfo.max_freq; 365 policy->max = policy->cpuinfo.max_freq;
366 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
367 366
368 return 0; 367 return 0;
369} 368}
diff --git a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
index f43d98e11cc7..c11baaf9f2b4 100644
--- a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
+++ b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
@@ -253,7 +253,6 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
253 f_table[k].frequency = CPUFREQ_TABLE_END; 253 f_table[k].frequency = CPUFREQ_TABLE_END;
254 } 254 }
255 255
256 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
257 policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */ 256 policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
258 policy->cur = fsb * current_multiplier; 257 policy->cur = fsb * current_multiplier;
259 258
diff --git a/arch/x86/kernel/cpu/cpufreq/elanfreq.c b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
index f317276afa7a..1e7ae7dafcf6 100644
--- a/arch/x86/kernel/cpu/cpufreq/elanfreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
@@ -219,7 +219,6 @@ static int elanfreq_cpu_init(struct cpufreq_policy *policy)
219 } 219 }
220 220
221 /* cpuinfo and default policy values */ 221 /* cpuinfo and default policy values */
222 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
223 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 222 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
224 policy->cur = elanfreq_get_cpu_frequency(0); 223 policy->cur = elanfreq_get_cpu_frequency(0);
225 224
diff --git a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
index 461dabc4e495..ed2bda127c44 100644
--- a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
@@ -420,7 +420,6 @@ static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
420 policy->min = maxfreq / POLICY_MIN_DIV; 420 policy->min = maxfreq / POLICY_MIN_DIV;
421 policy->max = maxfreq; 421 policy->max = maxfreq;
422 policy->cur = curfreq; 422 policy->cur = curfreq;
423 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
424 policy->cpuinfo.min_freq = maxfreq / max_duration; 423 policy->cpuinfo.min_freq = maxfreq / max_duration;
425 policy->cpuinfo.max_freq = maxfreq; 424 policy->cpuinfo.max_freq = maxfreq;
426 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 425 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.c b/arch/x86/kernel/cpu/cpufreq/longhaul.c
index f0cce3c2dc3a..5045f5d583c8 100644
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.c
@@ -710,6 +710,10 @@ static int enable_arbiter_disable(void)
710 reg = 0x78; 710 reg = 0x78;
711 dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0, 711 dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0,
712 NULL); 712 NULL);
713 /* Find PM133/VT8605 host bridge */
714 if (dev == NULL)
715 dev = pci_get_device(PCI_VENDOR_ID_VIA,
716 PCI_DEVICE_ID_VIA_8605_0, NULL);
713 /* Find CLE266 host bridge */ 717 /* Find CLE266 host bridge */
714 if (dev == NULL) { 718 if (dev == NULL) {
715 reg = 0x76; 719 reg = 0x76;
@@ -918,7 +922,6 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
918 if ((longhaul_version != TYPE_LONGHAUL_V1) && (scale_voltage != 0)) 922 if ((longhaul_version != TYPE_LONGHAUL_V1) && (scale_voltage != 0))
919 longhaul_setup_voltagescaling(); 923 longhaul_setup_voltagescaling();
920 924
921 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
922 policy->cpuinfo.transition_latency = 200000; /* nsec */ 925 policy->cpuinfo.transition_latency = 200000; /* nsec */
923 policy->cur = calc_speed(longhaul_get_cpu_mult()); 926 policy->cur = calc_speed(longhaul_get_cpu_mult());
924 927
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
index 4c76b511e194..8eb414b906d2 100644
--- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
@@ -229,7 +229,6 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
229 cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu); 229 cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
230 230
231 /* cpuinfo and default policy values */ 231 /* cpuinfo and default policy values */
232 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
233 policy->cpuinfo.transition_latency = 1000000; /* assumed */ 232 policy->cpuinfo.transition_latency = 1000000; /* assumed */
234 policy->cur = stock_freq; 233 policy->cur = stock_freq;
235 234
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
index f89524051e4a..6d0285339317 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
@@ -160,7 +160,6 @@ static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
160 } 160 }
161 161
162 /* cpuinfo and default policy values */ 162 /* cpuinfo and default policy values */
163 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
164 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 163 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
165 policy->cur = busfreq * max_multiplier; 164 policy->cur = busfreq * max_multiplier;
166 165
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
index ca3e1d341889..7decd6a50ffa 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
@@ -637,8 +637,6 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
637 printk (KERN_INFO PFX "Minimum speed %d MHz. Maximum speed %d MHz.\n", 637 printk (KERN_INFO PFX "Minimum speed %d MHz. Maximum speed %d MHz.\n",
638 minimum_speed/1000, maximum_speed/1000); 638 minimum_speed/1000, maximum_speed/1000);
639 639
640 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
641
642 policy->cpuinfo.transition_latency = cpufreq_scale(2000000UL, fsb, latency); 640 policy->cpuinfo.transition_latency = cpufreq_scale(2000000UL, fsb, latency);
643 641
644 policy->cur = powernow_get(0); 642 policy->cur = powernow_get(0);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 34ed53a06730..b273b69cfddf 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -76,7 +76,10 @@ static u32 find_khz_freq_from_fid(u32 fid)
76/* Return a frequency in MHz, given an input fid and did */ 76/* Return a frequency in MHz, given an input fid and did */
77static u32 find_freq_from_fiddid(u32 fid, u32 did) 77static u32 find_freq_from_fiddid(u32 fid, u32 did)
78{ 78{
79 return 100 * (fid + 0x10) >> did; 79 if (current_cpu_data.x86 == 0x10)
80 return 100 * (fid + 0x10) >> did;
81 else
82 return 100 * (fid + 0x8) >> did;
80} 83}
81 84
82static u32 find_khz_freq_from_fiddid(u32 fid, u32 did) 85static u32 find_khz_freq_from_fiddid(u32 fid, u32 did)
@@ -1208,7 +1211,6 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1208 /* run on any CPU again */ 1211 /* run on any CPU again */
1209 set_cpus_allowed(current, oldmask); 1212 set_cpus_allowed(current, oldmask);
1210 1213
1211 pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
1212 if (cpu_family == CPU_HW_PSTATE) 1214 if (cpu_family == CPU_HW_PSTATE)
1213 pol->cpus = cpumask_of_cpu(pol->cpu); 1215 pol->cpus = cpumask_of_cpu(pol->cpu);
1214 else 1216 else
@@ -1325,21 +1327,16 @@ static struct cpufreq_driver cpufreq_amd64_driver = {
1325static int __cpuinit powernowk8_init(void) 1327static int __cpuinit powernowk8_init(void)
1326{ 1328{
1327 unsigned int i, supported_cpus = 0; 1329 unsigned int i, supported_cpus = 0;
1328 unsigned int booted_cores = 1;
1329 1330
1330 for_each_online_cpu(i) { 1331 for_each_online_cpu(i) {
1331 if (check_supported_cpu(i)) 1332 if (check_supported_cpu(i))
1332 supported_cpus++; 1333 supported_cpus++;
1333 } 1334 }
1334 1335
1335#ifdef CONFIG_SMP
1336 booted_cores = cpu_data[0].booted_cores;
1337#endif
1338
1339 if (supported_cpus == num_online_cpus()) { 1336 if (supported_cpus == num_online_cpus()) {
1340 printk(KERN_INFO PFX "Found %d %s " 1337 printk(KERN_INFO PFX "Found %d %s "
1341 "processors (%d cpu cores) (" VERSION ")\n", 1338 "processors (%d cpu cores) (" VERSION ")\n",
1342 supported_cpus/booted_cores, 1339 num_online_nodes(),
1343 boot_cpu_data.x86_model_id, supported_cpus); 1340 boot_cpu_data.x86_model_id, supported_cpus);
1344 return cpufreq_register_driver(&cpufreq_amd64_driver); 1341 return cpufreq_register_driver(&cpufreq_amd64_driver);
1345 } 1342 }
diff --git a/arch/x86/kernel/cpu/cpufreq/sc520_freq.c b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
index b8fb4b521c62..d9f3e90a7ae0 100644
--- a/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
+++ b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
@@ -111,7 +111,6 @@ static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
111 return -ENODEV; 111 return -ENODEV;
112 112
113 /* cpuinfo and default policy values */ 113 /* cpuinfo and default policy values */
114 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
115 policy->cpuinfo.transition_latency = 1000000; /* 1ms */ 114 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
116 policy->cur = sc520_freq_get_cpu_frequency(0); 115 policy->cur = sc520_freq_get_cpu_frequency(0);
117 116
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
index 6c5dc2c85aeb..811d47438546 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -393,7 +393,6 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
393 393
394 freq = get_cur_freq(policy->cpu); 394 freq = get_cur_freq(policy->cpu);
395 395
396 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
397 policy->cpuinfo.transition_latency = 10000; /* 10uS transition latency */ 396 policy->cpuinfo.transition_latency = 10000; /* 10uS transition latency */
398 policy->cur = freq; 397 policy->cur = freq;
399 398
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
index a5b2346faf1f..36685e8f7be1 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
@@ -348,7 +348,6 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
348 (speed / 1000)); 348 (speed / 1000));
349 349
350 /* cpuinfo and default policy values */ 350 /* cpuinfo and default policy values */
351 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
352 policy->cur = speed; 351 policy->cur = speed;
353 352
354 result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs); 353 result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
index e1c509aa3054..f2b5a621d27b 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
@@ -290,7 +290,6 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
290 (speed / 1000)); 290 (speed / 1000));
291 291
292 /* cpuinfo and default policy values */ 292 /* cpuinfo and default policy values */
293 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
294 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 293 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
295 policy->cur = speed; 294 policy->cur = speed;
296 295
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 5c2faa10e9fa..f4548c93ccf5 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -11,8 +11,6 @@
11 * ----------------------------------------------------------------------- */ 11 * ----------------------------------------------------------------------- */
12 12
13/* 13/*
14 * cpuid.c
15 *
16 * x86 CPUID access device 14 * x86 CPUID access device
17 * 15 *
18 * This device is accessed by lseek() to the appropriate CPUID level 16 * This device is accessed by lseek() to the appropriate CPUID level
diff --git a/arch/x86/kernel/crash_dump_32.c b/arch/x86/kernel/crash_dump_32.c
index 3f532df488bc..32e75d0731a9 100644
--- a/arch/x86/kernel/crash_dump_32.c
+++ b/arch/x86/kernel/crash_dump_32.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * kernel/crash_dump.c - Memory preserving reboot related code. 2 * Memory preserving reboot related code.
3 * 3 *
4 * Created by: Hariprasad Nellitheertha (hari@in.ibm.com) 4 * Created by: Hariprasad Nellitheertha (hari@in.ibm.com)
5 * Copyright (C) IBM Corporation, 2004. All rights reserved 5 * Copyright (C) IBM Corporation, 2004. All rights reserved
diff --git a/arch/x86/kernel/crash_dump_64.c b/arch/x86/kernel/crash_dump_64.c
index 942deac4d43a..15e6c6bc4a46 100644
--- a/arch/x86/kernel/crash_dump_64.c
+++ b/arch/x86/kernel/crash_dump_64.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * kernel/crash_dump.c - Memory preserving reboot related code. 2 * Memory preserving reboot related code.
3 * 3 *
4 * Created by: Hariprasad Nellitheertha (hari@in.ibm.com) 4 * Created by: Hariprasad Nellitheertha (hari@in.ibm.com)
5 * Copyright (C) IBM Corporation, 2004. All rights reserved 5 * Copyright (C) IBM Corporation, 2004. All rights reserved
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c
index 41e8aec4c61d..f12d8c5d9809 100644
--- a/arch/x86/kernel/geode_32.c
+++ b/arch/x86/kernel/geode_32.c
@@ -145,10 +145,14 @@ EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
145 145
146static int __init geode_southbridge_init(void) 146static int __init geode_southbridge_init(void)
147{ 147{
148 int timers;
149
148 if (!is_geode()) 150 if (!is_geode())
149 return -ENODEV; 151 return -ENODEV;
150 152
151 init_lbars(); 153 init_lbars();
154 timers = geode_mfgpt_detect();
155 printk(KERN_INFO "geode: %d MFGPT timers available.\n", timers);
152 return 0; 156 return 0;
153} 157}
154 158
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 6c34bdd22e26..8561f626edad 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/x86_64/kernel/head64.c -- prepare to run common code 2 * prepare to run common code
3 * 3 *
4 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 4 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
5 */ 5 */
diff --git a/arch/x86/kernel/hpet_32.c b/arch/x86/kernel/hpet.c
index 533d4932bc79..f8367074da0d 100644
--- a/arch/x86/kernel/hpet_32.c
+++ b/arch/x86/kernel/hpet.c
@@ -1,5 +1,6 @@
1#include <linux/clocksource.h> 1#include <linux/clocksource.h>
2#include <linux/clockchips.h> 2#include <linux/clockchips.h>
3#include <linux/delay.h>
3#include <linux/errno.h> 4#include <linux/errno.h>
4#include <linux/hpet.h> 5#include <linux/hpet.h>
5#include <linux/init.h> 6#include <linux/init.h>
@@ -7,11 +8,11 @@
7#include <linux/pm.h> 8#include <linux/pm.h>
8#include <linux/delay.h> 9#include <linux/delay.h>
9 10
11#include <asm/fixmap.h>
10#include <asm/hpet.h> 12#include <asm/hpet.h>
13#include <asm/i8253.h>
11#include <asm/io.h> 14#include <asm/io.h>
12 15
13extern struct clock_event_device *global_clock_event;
14
15#define HPET_MASK CLOCKSOURCE_MASK(32) 16#define HPET_MASK CLOCKSOURCE_MASK(32)
16#define HPET_SHIFT 22 17#define HPET_SHIFT 22
17 18
@@ -22,9 +23,9 @@ extern struct clock_event_device *global_clock_event;
22 * HPET address is set in acpi/boot.c, when an ACPI entry exists 23 * HPET address is set in acpi/boot.c, when an ACPI entry exists
23 */ 24 */
24unsigned long hpet_address; 25unsigned long hpet_address;
25static void __iomem * hpet_virt_address; 26static void __iomem *hpet_virt_address;
26 27
27static inline unsigned long hpet_readl(unsigned long a) 28unsigned long hpet_readl(unsigned long a)
28{ 29{
29 return readl(hpet_virt_address + a); 30 return readl(hpet_virt_address + a);
30} 31}
@@ -34,6 +35,36 @@ static inline void hpet_writel(unsigned long d, unsigned long a)
34 writel(d, hpet_virt_address + a); 35 writel(d, hpet_virt_address + a);
35} 36}
36 37
38#ifdef CONFIG_X86_64
39
40#include <asm/pgtable.h>
41
42static inline void hpet_set_mapping(void)
43{
44 set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
45 __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
46 hpet_virt_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
47}
48
49static inline void hpet_clear_mapping(void)
50{
51 hpet_virt_address = NULL;
52}
53
54#else
55
56static inline void hpet_set_mapping(void)
57{
58 hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
59}
60
61static inline void hpet_clear_mapping(void)
62{
63 iounmap(hpet_virt_address);
64 hpet_virt_address = NULL;
65}
66#endif
67
37/* 68/*
38 * HPET command line enable / disable 69 * HPET command line enable / disable
39 */ 70 */
@@ -49,6 +80,13 @@ static int __init hpet_setup(char* str)
49} 80}
50__setup("hpet=", hpet_setup); 81__setup("hpet=", hpet_setup);
51 82
83static int __init disable_hpet(char *str)
84{
85 boot_hpet_disable = 1;
86 return 1;
87}
88__setup("nohpet", disable_hpet);
89
52static inline int is_hpet_capable(void) 90static inline int is_hpet_capable(void)
53{ 91{
54 return (!boot_hpet_disable && hpet_address); 92 return (!boot_hpet_disable && hpet_address);
@@ -83,7 +121,7 @@ static void hpet_reserve_platform_timers(unsigned long id)
83 121
84 memset(&hd, 0, sizeof (hd)); 122 memset(&hd, 0, sizeof (hd));
85 hd.hd_phys_address = hpet_address; 123 hd.hd_phys_address = hpet_address;
86 hd.hd_address = hpet_virt_address; 124 hd.hd_address = hpet;
87 hd.hd_nirqs = nrtimers; 125 hd.hd_nirqs = nrtimers;
88 hd.hd_flags = HPET_DATA_PLATFORM; 126 hd.hd_flags = HPET_DATA_PLATFORM;
89 hpet_reserve_timer(&hd, 0); 127 hpet_reserve_timer(&hd, 0);
@@ -111,9 +149,9 @@ static void hpet_reserve_platform_timers(unsigned long id) { }
111 */ 149 */
112static unsigned long hpet_period; 150static unsigned long hpet_period;
113 151
114static void hpet_set_mode(enum clock_event_mode mode, 152static void hpet_legacy_set_mode(enum clock_event_mode mode,
115 struct clock_event_device *evt); 153 struct clock_event_device *evt);
116static int hpet_next_event(unsigned long delta, 154static int hpet_legacy_next_event(unsigned long delta,
117 struct clock_event_device *evt); 155 struct clock_event_device *evt);
118 156
119/* 157/*
@@ -122,10 +160,11 @@ static int hpet_next_event(unsigned long delta,
122static struct clock_event_device hpet_clockevent = { 160static struct clock_event_device hpet_clockevent = {
123 .name = "hpet", 161 .name = "hpet",
124 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 162 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
125 .set_mode = hpet_set_mode, 163 .set_mode = hpet_legacy_set_mode,
126 .set_next_event = hpet_next_event, 164 .set_next_event = hpet_legacy_next_event,
127 .shift = 32, 165 .shift = 32,
128 .irq = 0, 166 .irq = 0,
167 .rating = 50,
129}; 168};
130 169
131static void hpet_start_counter(void) 170static void hpet_start_counter(void)
@@ -140,7 +179,18 @@ static void hpet_start_counter(void)
140 hpet_writel(cfg, HPET_CFG); 179 hpet_writel(cfg, HPET_CFG);
141} 180}
142 181
143static void hpet_enable_int(void) 182static void hpet_resume_device(void)
183{
184 force_hpet_resume();
185}
186
187static void hpet_restart_counter(void)
188{
189 hpet_resume_device();
190 hpet_start_counter();
191}
192
193static void hpet_enable_legacy_int(void)
144{ 194{
145 unsigned long cfg = hpet_readl(HPET_CFG); 195 unsigned long cfg = hpet_readl(HPET_CFG);
146 196
@@ -149,7 +199,39 @@ static void hpet_enable_int(void)
149 hpet_legacy_int_enabled = 1; 199 hpet_legacy_int_enabled = 1;
150} 200}
151 201
152static void hpet_set_mode(enum clock_event_mode mode, 202static void hpet_legacy_clockevent_register(void)
203{
204 uint64_t hpet_freq;
205
206 /* Start HPET legacy interrupts */
207 hpet_enable_legacy_int();
208
209 /*
210 * The period is a femto seconds value. We need to calculate the
211 * scaled math multiplication factor for nanosecond to hpet tick
212 * conversion.
213 */
214 hpet_freq = 1000000000000000ULL;
215 do_div(hpet_freq, hpet_period);
216 hpet_clockevent.mult = div_sc((unsigned long) hpet_freq,
217 NSEC_PER_SEC, 32);
218 /* Calculate the min / max delta */
219 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
220 &hpet_clockevent);
221 hpet_clockevent.min_delta_ns = clockevent_delta2ns(0x30,
222 &hpet_clockevent);
223
224 /*
225 * Start hpet with the boot cpu mask and make it
226 * global after the IO_APIC has been initialized.
227 */
228 hpet_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
229 clockevents_register_device(&hpet_clockevent);
230 global_clock_event = &hpet_clockevent;
231 printk(KERN_DEBUG "hpet clockevent registered\n");
232}
233
234static void hpet_legacy_set_mode(enum clock_event_mode mode,
153 struct clock_event_device *evt) 235 struct clock_event_device *evt)
154{ 236{
155 unsigned long cfg, cmp, now; 237 unsigned long cfg, cmp, now;
@@ -190,12 +272,12 @@ static void hpet_set_mode(enum clock_event_mode mode,
190 break; 272 break;
191 273
192 case CLOCK_EVT_MODE_RESUME: 274 case CLOCK_EVT_MODE_RESUME:
193 hpet_enable_int(); 275 hpet_enable_legacy_int();
194 break; 276 break;
195 } 277 }
196} 278}
197 279
198static int hpet_next_event(unsigned long delta, 280static int hpet_legacy_next_event(unsigned long delta,
199 struct clock_event_device *evt) 281 struct clock_event_device *evt)
200{ 282{
201 unsigned long cnt; 283 unsigned long cnt;
@@ -215,6 +297,13 @@ static cycle_t read_hpet(void)
215 return (cycle_t)hpet_readl(HPET_COUNTER); 297 return (cycle_t)hpet_readl(HPET_COUNTER);
216} 298}
217 299
300#ifdef CONFIG_X86_64
301static cycle_t __vsyscall_fn vread_hpet(void)
302{
303 return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
304}
305#endif
306
218static struct clocksource clocksource_hpet = { 307static struct clocksource clocksource_hpet = {
219 .name = "hpet", 308 .name = "hpet",
220 .rating = 250, 309 .rating = 250,
@@ -222,61 +311,17 @@ static struct clocksource clocksource_hpet = {
222 .mask = HPET_MASK, 311 .mask = HPET_MASK,
223 .shift = HPET_SHIFT, 312 .shift = HPET_SHIFT,
224 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 313 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
225 .resume = hpet_start_counter, 314 .resume = hpet_restart_counter,
315#ifdef CONFIG_X86_64
316 .vread = vread_hpet,
317#endif
226}; 318};
227 319
228/* 320static int hpet_clocksource_register(void)
229 * Try to setup the HPET timer
230 */
231int __init hpet_enable(void)
232{ 321{
233 unsigned long id;
234 uint64_t hpet_freq;
235 u64 tmp, start, now; 322 u64 tmp, start, now;
236 cycle_t t1; 323 cycle_t t1;
237 324
238 if (!is_hpet_capable())
239 return 0;
240
241 hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
242
243 /*
244 * Read the period and check for a sane value:
245 */
246 hpet_period = hpet_readl(HPET_PERIOD);
247 if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
248 goto out_nohpet;
249
250 /*
251 * The period is a femto seconds value. We need to calculate the
252 * scaled math multiplication factor for nanosecond to hpet tick
253 * conversion.
254 */
255 hpet_freq = 1000000000000000ULL;
256 do_div(hpet_freq, hpet_period);
257 hpet_clockevent.mult = div_sc((unsigned long) hpet_freq,
258 NSEC_PER_SEC, 32);
259 /* Calculate the min / max delta */
260 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
261 &hpet_clockevent);
262 hpet_clockevent.min_delta_ns = clockevent_delta2ns(0x30,
263 &hpet_clockevent);
264
265 /*
266 * Read the HPET ID register to retrieve the IRQ routing
267 * information and the number of channels
268 */
269 id = hpet_readl(HPET_ID);
270
271#ifdef CONFIG_HPET_EMULATE_RTC
272 /*
273 * The legacy routing mode needs at least two channels, tick timer
274 * and the rtc emulation channel.
275 */
276 if (!(id & HPET_ID_NUMBER))
277 goto out_nohpet;
278#endif
279
280 /* Start the counter */ 325 /* Start the counter */
281 hpet_start_counter(); 326 hpet_start_counter();
282 327
@@ -298,7 +343,7 @@ int __init hpet_enable(void)
298 if (t1 == read_hpet()) { 343 if (t1 == read_hpet()) {
299 printk(KERN_WARNING 344 printk(KERN_WARNING
300 "HPET counter not counting. HPET disabled\n"); 345 "HPET counter not counting. HPET disabled\n");
301 goto out_nohpet; 346 return -ENODEV;
302 } 347 }
303 348
304 /* Initialize and register HPET clocksource 349 /* Initialize and register HPET clocksource
@@ -319,27 +364,84 @@ int __init hpet_enable(void)
319 364
320 clocksource_register(&clocksource_hpet); 365 clocksource_register(&clocksource_hpet);
321 366
367 return 0;
368}
369
370/*
371 * Try to setup the HPET timer
372 */
373int __init hpet_enable(void)
374{
375 unsigned long id;
376
377 if (!is_hpet_capable())
378 return 0;
379
380 hpet_set_mapping();
381
382 /*
383 * Read the period and check for a sane value:
384 */
385 hpet_period = hpet_readl(HPET_PERIOD);
386 if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
387 goto out_nohpet;
388
389 /*
390 * Read the HPET ID register to retrieve the IRQ routing
391 * information and the number of channels
392 */
393 id = hpet_readl(HPET_ID);
394
395#ifdef CONFIG_HPET_EMULATE_RTC
396 /*
397 * The legacy routing mode needs at least two channels, tick timer
398 * and the rtc emulation channel.
399 */
400 if (!(id & HPET_ID_NUMBER))
401 goto out_nohpet;
402#endif
403
404 if (hpet_clocksource_register())
405 goto out_nohpet;
406
322 if (id & HPET_ID_LEGSUP) { 407 if (id & HPET_ID_LEGSUP) {
323 hpet_enable_int(); 408 hpet_legacy_clockevent_register();
324 hpet_reserve_platform_timers(id);
325 /*
326 * Start hpet with the boot cpu mask and make it
327 * global after the IO_APIC has been initialized.
328 */
329 hpet_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
330 clockevents_register_device(&hpet_clockevent);
331 global_clock_event = &hpet_clockevent;
332 return 1; 409 return 1;
333 } 410 }
334 return 0; 411 return 0;
335 412
336out_nohpet: 413out_nohpet:
337 iounmap(hpet_virt_address); 414 hpet_clear_mapping();
338 hpet_virt_address = NULL;
339 boot_hpet_disable = 1; 415 boot_hpet_disable = 1;
340 return 0; 416 return 0;
341} 417}
342 418
419/*
420 * Needs to be late, as the reserve_timer code calls kalloc !
421 *
422 * Not a problem on i386 as hpet_enable is called from late_time_init,
423 * but on x86_64 it is necessary !
424 */
425static __init int hpet_late_init(void)
426{
427 if (boot_hpet_disable)
428 return -ENODEV;
429
430 if (!hpet_address) {
431 if (!force_hpet_address)
432 return -ENODEV;
433
434 hpet_address = force_hpet_address;
435 hpet_enable();
436 if (!hpet_virt_address)
437 return -ENODEV;
438 }
439
440 hpet_reserve_platform_timers(hpet_readl(HPET_ID));
441
442 return 0;
443}
444fs_initcall(hpet_late_init);
343 445
344#ifdef CONFIG_HPET_EMULATE_RTC 446#ifdef CONFIG_HPET_EMULATE_RTC
345 447
diff --git a/arch/x86/kernel/hpet_64.c b/arch/x86/kernel/hpet_64.c
deleted file mode 100644
index e2d1b912e154..000000000000
--- a/arch/x86/kernel/hpet_64.c
+++ /dev/null
@@ -1,493 +0,0 @@
1#include <linux/kernel.h>
2#include <linux/sched.h>
3#include <linux/init.h>
4#include <linux/mc146818rtc.h>
5#include <linux/time.h>
6#include <linux/clocksource.h>
7#include <linux/ioport.h>
8#include <linux/acpi.h>
9#include <linux/hpet.h>
10#include <asm/pgtable.h>
11#include <asm/vsyscall.h>
12#include <asm/timex.h>
13#include <asm/hpet.h>
14
15#define HPET_MASK 0xFFFFFFFF
16#define HPET_SHIFT 22
17
18/* FSEC = 10^-15 NSEC = 10^-9 */
19#define FSEC_PER_NSEC 1000000
20
21int nohpet __initdata;
22
23unsigned long hpet_address;
24unsigned long hpet_period; /* fsecs / HPET clock */
25unsigned long hpet_tick; /* HPET clocks / interrupt */
26
27int hpet_use_timer; /* Use counter of hpet for time keeping,
28 * otherwise PIT
29 */
30
31#ifdef CONFIG_HPET
32static __init int late_hpet_init(void)
33{
34 struct hpet_data hd;
35 unsigned int ntimer;
36
37 if (!hpet_address)
38 return 0;
39
40 memset(&hd, 0, sizeof(hd));
41
42 ntimer = hpet_readl(HPET_ID);
43 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
44 ntimer++;
45
46 /*
47 * Register with driver.
48 * Timer0 and Timer1 is used by platform.
49 */
50 hd.hd_phys_address = hpet_address;
51 hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
52 hd.hd_nirqs = ntimer;
53 hd.hd_flags = HPET_DATA_PLATFORM;
54 hpet_reserve_timer(&hd, 0);
55#ifdef CONFIG_HPET_EMULATE_RTC
56 hpet_reserve_timer(&hd, 1);
57#endif
58 hd.hd_irq[0] = HPET_LEGACY_8254;
59 hd.hd_irq[1] = HPET_LEGACY_RTC;
60 if (ntimer > 2) {
61 struct hpet *hpet;
62 struct hpet_timer *timer;
63 int i;
64
65 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
66 timer = &hpet->hpet_timers[2];
67 for (i = 2; i < ntimer; timer++, i++)
68 hd.hd_irq[i] = (timer->hpet_config &
69 Tn_INT_ROUTE_CNF_MASK) >>
70 Tn_INT_ROUTE_CNF_SHIFT;
71
72 }
73
74 hpet_alloc(&hd);
75 return 0;
76}
77fs_initcall(late_hpet_init);
78#endif
79
80int hpet_timer_stop_set_go(unsigned long tick)
81{
82 unsigned int cfg;
83
84/*
85 * Stop the timers and reset the main counter.
86 */
87
88 cfg = hpet_readl(HPET_CFG);
89 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
90 hpet_writel(cfg, HPET_CFG);
91 hpet_writel(0, HPET_COUNTER);
92 hpet_writel(0, HPET_COUNTER + 4);
93
94/*
95 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
96 * and period also hpet_tick.
97 */
98 if (hpet_use_timer) {
99 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
100 HPET_TN_32BIT, HPET_T0_CFG);
101 hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
102 hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
103 cfg |= HPET_CFG_LEGACY;
104 }
105/*
106 * Go!
107 */
108
109 cfg |= HPET_CFG_ENABLE;
110 hpet_writel(cfg, HPET_CFG);
111
112 return 0;
113}
114
115static cycle_t read_hpet(void)
116{
117 return (cycle_t)hpet_readl(HPET_COUNTER);
118}
119
120static cycle_t __vsyscall_fn vread_hpet(void)
121{
122 return readl((void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
123}
124
125struct clocksource clocksource_hpet = {
126 .name = "hpet",
127 .rating = 250,
128 .read = read_hpet,
129 .mask = (cycle_t)HPET_MASK,
130 .mult = 0, /* set below */
131 .shift = HPET_SHIFT,
132 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
133 .vread = vread_hpet,
134};
135
136int __init hpet_arch_init(void)
137{
138 unsigned int id;
139 u64 tmp;
140
141 if (!hpet_address)
142 return -1;
143 set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
144 __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
145
146/*
147 * Read the period, compute tick and quotient.
148 */
149
150 id = hpet_readl(HPET_ID);
151
152 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
153 return -1;
154
155 hpet_period = hpet_readl(HPET_PERIOD);
156 if (hpet_period < 100000 || hpet_period > 100000000)
157 return -1;
158
159 hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
160
161 hpet_use_timer = (id & HPET_ID_LEGSUP);
162
163 /*
164 * hpet period is in femto seconds per cycle
165 * so we need to convert this to ns/cyc units
166 * aproximated by mult/2^shift
167 *
168 * fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
169 * fsec/cyc * 1ns/1000000fsec * 2^shift = mult
170 * fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
171 * (fsec/cyc << shift)/1000000 = mult
172 * (hpet_period << shift)/FSEC_PER_NSEC = mult
173 */
174 tmp = (u64)hpet_period << HPET_SHIFT;
175 do_div(tmp, FSEC_PER_NSEC);
176 clocksource_hpet.mult = (u32)tmp;
177 clocksource_register(&clocksource_hpet);
178
179 return hpet_timer_stop_set_go(hpet_tick);
180}
181
182int hpet_reenable(void)
183{
184 return hpet_timer_stop_set_go(hpet_tick);
185}
186
187/*
188 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
189 * it to the HPET timer of known frequency.
190 */
191
192#define TICK_COUNT 100000000
193#define SMI_THRESHOLD 50000
194#define MAX_TRIES 5
195
196/*
197 * Some platforms take periodic SMI interrupts with 5ms duration. Make sure none
198 * occurs between the reads of the hpet & TSC.
199 */
200static void __init read_hpet_tsc(int *hpet, int *tsc)
201{
202 int tsc1, tsc2, hpet1, i;
203
204 for (i = 0; i < MAX_TRIES; i++) {
205 tsc1 = get_cycles_sync();
206 hpet1 = hpet_readl(HPET_COUNTER);
207 tsc2 = get_cycles_sync();
208 if ((tsc2 - tsc1) < SMI_THRESHOLD)
209 break;
210 }
211 *hpet = hpet1;
212 *tsc = tsc2;
213}
214
215unsigned int __init hpet_calibrate_tsc(void)
216{
217 int tsc_start, hpet_start;
218 int tsc_now, hpet_now;
219 unsigned long flags;
220
221 local_irq_save(flags);
222
223 read_hpet_tsc(&hpet_start, &tsc_start);
224
225 do {
226 local_irq_disable();
227 read_hpet_tsc(&hpet_now, &tsc_now);
228 local_irq_restore(flags);
229 } while ((tsc_now - tsc_start) < TICK_COUNT &&
230 (hpet_now - hpet_start) < TICK_COUNT);
231
232 return (tsc_now - tsc_start) * 1000000000L
233 / ((hpet_now - hpet_start) * hpet_period / 1000);
234}
235
236#ifdef CONFIG_HPET_EMULATE_RTC
237/* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
238 * is enabled, we support RTC interrupt functionality in software.
239 * RTC has 3 kinds of interrupts:
240 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
241 * is updated
242 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
243 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
244 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
245 * (1) and (2) above are implemented using polling at a frequency of
246 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
247 * overhead. (DEFAULT_RTC_INT_FREQ)
248 * For (3), we use interrupts at 64Hz or user specified periodic
249 * frequency, whichever is higher.
250 */
251#include <linux/rtc.h>
252
253#define DEFAULT_RTC_INT_FREQ 64
254#define RTC_NUM_INTS 1
255
256static unsigned long UIE_on;
257static unsigned long prev_update_sec;
258
259static unsigned long AIE_on;
260static struct rtc_time alarm_time;
261
262static unsigned long PIE_on;
263static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
264static unsigned long PIE_count;
265
266static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
267static unsigned int hpet_t1_cmp; /* cached comparator register */
268
269int is_hpet_enabled(void)
270{
271 return hpet_address != 0;
272}
273
274/*
275 * Timer 1 for RTC, we do not use periodic interrupt feature,
276 * even if HPET supports periodic interrupts on Timer 1.
277 * The reason being, to set up a periodic interrupt in HPET, we need to
278 * stop the main counter. And if we do that everytime someone diables/enables
279 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
280 * So, for the time being, simulate the periodic interrupt in software.
281 *
282 * hpet_rtc_timer_init() is called for the first time and during subsequent
283 * interuppts reinit happens through hpet_rtc_timer_reinit().
284 */
285int hpet_rtc_timer_init(void)
286{
287 unsigned int cfg, cnt;
288 unsigned long flags;
289
290 if (!is_hpet_enabled())
291 return 0;
292 /*
293 * Set the counter 1 and enable the interrupts.
294 */
295 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
296 hpet_rtc_int_freq = PIE_freq;
297 else
298 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
299
300 local_irq_save(flags);
301
302 cnt = hpet_readl(HPET_COUNTER);
303 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
304 hpet_writel(cnt, HPET_T1_CMP);
305 hpet_t1_cmp = cnt;
306
307 cfg = hpet_readl(HPET_T1_CFG);
308 cfg &= ~HPET_TN_PERIODIC;
309 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
310 hpet_writel(cfg, HPET_T1_CFG);
311
312 local_irq_restore(flags);
313
314 return 1;
315}
316
317static void hpet_rtc_timer_reinit(void)
318{
319 unsigned int cfg, cnt, ticks_per_int, lost_ints;
320
321 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
322 cfg = hpet_readl(HPET_T1_CFG);
323 cfg &= ~HPET_TN_ENABLE;
324 hpet_writel(cfg, HPET_T1_CFG);
325 return;
326 }
327
328 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
329 hpet_rtc_int_freq = PIE_freq;
330 else
331 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
332
333 /* It is more accurate to use the comparator value than current count.*/
334 ticks_per_int = hpet_tick * HZ / hpet_rtc_int_freq;
335 hpet_t1_cmp += ticks_per_int;
336 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
337
338 /*
339 * If the interrupt handler was delayed too long, the write above tries
340 * to schedule the next interrupt in the past and the hardware would
341 * not interrupt until the counter had wrapped around.
342 * So we have to check that the comparator wasn't set to a past time.
343 */
344 cnt = hpet_readl(HPET_COUNTER);
345 if (unlikely((int)(cnt - hpet_t1_cmp) > 0)) {
346 lost_ints = (cnt - hpet_t1_cmp) / ticks_per_int + 1;
347 /* Make sure that, even with the time needed to execute
348 * this code, the next scheduled interrupt has been moved
349 * back to the future: */
350 lost_ints++;
351
352 hpet_t1_cmp += lost_ints * ticks_per_int;
353 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
354
355 if (PIE_on)
356 PIE_count += lost_ints;
357
358 if (printk_ratelimit())
359 printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n",
360 hpet_rtc_int_freq);
361 }
362}
363
364/*
365 * The functions below are called from rtc driver.
366 * Return 0 if HPET is not being used.
367 * Otherwise do the necessary changes and return 1.
368 */
369int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
370{
371 if (!is_hpet_enabled())
372 return 0;
373
374 if (bit_mask & RTC_UIE)
375 UIE_on = 0;
376 if (bit_mask & RTC_PIE)
377 PIE_on = 0;
378 if (bit_mask & RTC_AIE)
379 AIE_on = 0;
380
381 return 1;
382}
383
384int hpet_set_rtc_irq_bit(unsigned long bit_mask)
385{
386 int timer_init_reqd = 0;
387
388 if (!is_hpet_enabled())
389 return 0;
390
391 if (!(PIE_on | AIE_on | UIE_on))
392 timer_init_reqd = 1;
393
394 if (bit_mask & RTC_UIE) {
395 UIE_on = 1;
396 }
397 if (bit_mask & RTC_PIE) {
398 PIE_on = 1;
399 PIE_count = 0;
400 }
401 if (bit_mask & RTC_AIE) {
402 AIE_on = 1;
403 }
404
405 if (timer_init_reqd)
406 hpet_rtc_timer_init();
407
408 return 1;
409}
410
411int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
412{
413 if (!is_hpet_enabled())
414 return 0;
415
416 alarm_time.tm_hour = hrs;
417 alarm_time.tm_min = min;
418 alarm_time.tm_sec = sec;
419
420 return 1;
421}
422
423int hpet_set_periodic_freq(unsigned long freq)
424{
425 if (!is_hpet_enabled())
426 return 0;
427
428 PIE_freq = freq;
429 PIE_count = 0;
430
431 return 1;
432}
433
434int hpet_rtc_dropped_irq(void)
435{
436 if (!is_hpet_enabled())
437 return 0;
438
439 return 1;
440}
441
442irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
443{
444 struct rtc_time curr_time;
445 unsigned long rtc_int_flag = 0;
446 int call_rtc_interrupt = 0;
447
448 hpet_rtc_timer_reinit();
449
450 if (UIE_on | AIE_on) {
451 rtc_get_rtc_time(&curr_time);
452 }
453 if (UIE_on) {
454 if (curr_time.tm_sec != prev_update_sec) {
455 /* Set update int info, call real rtc int routine */
456 call_rtc_interrupt = 1;
457 rtc_int_flag = RTC_UF;
458 prev_update_sec = curr_time.tm_sec;
459 }
460 }
461 if (PIE_on) {
462 PIE_count++;
463 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
464 /* Set periodic int info, call real rtc int routine */
465 call_rtc_interrupt = 1;
466 rtc_int_flag |= RTC_PF;
467 PIE_count = 0;
468 }
469 }
470 if (AIE_on) {
471 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
472 (curr_time.tm_min == alarm_time.tm_min) &&
473 (curr_time.tm_hour == alarm_time.tm_hour)) {
474 /* Set alarm int info, call real rtc int routine */
475 call_rtc_interrupt = 1;
476 rtc_int_flag |= RTC_AF;
477 }
478 }
479 if (call_rtc_interrupt) {
480 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
481 rtc_interrupt(rtc_int_flag, dev_id);
482 }
483 return IRQ_HANDLED;
484}
485#endif
486
487static int __init nohpet_setup(char *s)
488{
489 nohpet = 1;
490 return 1;
491}
492
493__setup("nohpet", nohpet_setup);
diff --git a/arch/x86/kernel/i387_32.c b/arch/x86/kernel/i387_32.c
index 665847281ed2..7d2e12f6c78b 100644
--- a/arch/x86/kernel/i387_32.c
+++ b/arch/x86/kernel/i387_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/i387.c
3 *
4 * Copyright (C) 1994 Linus Torvalds 2 * Copyright (C) 1994 Linus Torvalds
5 * 3 *
6 * Pentium III FXSR, SSE support 4 * Pentium III FXSR, SSE support
diff --git a/arch/x86/kernel/i387_64.c b/arch/x86/kernel/i387_64.c
index 1d58c13bc6bc..56c1f1147109 100644
--- a/arch/x86/kernel/i387_64.c
+++ b/arch/x86/kernel/i387_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86_64/kernel/i387.c
3 *
4 * Copyright (C) 1994 Linus Torvalds 2 * Copyright (C) 1994 Linus Torvalds
5 * Copyright (C) 2002 Andi Kleen, SuSE Labs 3 * Copyright (C) 2002 Andi Kleen, SuSE Labs
6 * 4 *
diff --git a/arch/x86/kernel/i8237.c b/arch/x86/kernel/i8237.c
index 6f508e8d7c57..29313832df0c 100644
--- a/arch/x86/kernel/i8237.c
+++ b/arch/x86/kernel/i8237.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * i8237.c: 8237A DMA controller suspend functions. 2 * 8237A DMA controller suspend functions.
3 * 3 *
4 * Written by Pierre Ossman, 2005. 4 * Written by Pierre Ossman, 2005.
5 * 5 *
diff --git a/arch/x86/kernel/i8253_32.c b/arch/x86/kernel/i8253.c
index 6d839f2f1b1a..5cc8841ca2c6 100644
--- a/arch/x86/kernel/i8253_32.c
+++ b/arch/x86/kernel/i8253.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * i8253.c 8253/PIT functions 2 * 8253/PIT functions
3 * 3 *
4 */ 4 */
5#include <linux/clockchips.h> 5#include <linux/clockchips.h>
@@ -13,7 +13,6 @@
13#include <asm/delay.h> 13#include <asm/delay.h>
14#include <asm/i8253.h> 14#include <asm/i8253.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/timer.h>
17 16
18DEFINE_SPINLOCK(i8253_lock); 17DEFINE_SPINLOCK(i8253_lock);
19EXPORT_SYMBOL(i8253_lock); 18EXPORT_SYMBOL(i8253_lock);
@@ -120,6 +119,7 @@ void __init setup_pit_timer(void)
120 global_clock_event = &pit_clockevent; 119 global_clock_event = &pit_clockevent;
121} 120}
122 121
122#ifndef CONFIG_X86_64
123/* 123/*
124 * Since the PIT overflows every tick, its not very useful 124 * Since the PIT overflows every tick, its not very useful
125 * to just read by itself. So use jiffies to emulate a free 125 * to just read by itself. So use jiffies to emulate a free
@@ -204,3 +204,5 @@ static int __init init_pit_clocksource(void)
204 return clocksource_register(&clocksource_pit); 204 return clocksource_register(&clocksource_pit);
205} 205}
206arch_initcall(init_pit_clocksource); 206arch_initcall(init_pit_clocksource);
207
208#endif
diff --git a/arch/x86/kernel/i8259_32.c b/arch/x86/kernel/i8259_32.c
index 0499cbe9871a..679bb33acbf1 100644
--- a/arch/x86/kernel/i8259_32.c
+++ b/arch/x86/kernel/i8259_32.c
@@ -10,7 +10,6 @@
10#include <linux/sysdev.h> 10#include <linux/sysdev.h>
11#include <linux/bitops.h> 11#include <linux/bitops.h>
12 12
13#include <asm/8253pit.h>
14#include <asm/atomic.h> 13#include <asm/atomic.h>
15#include <asm/system.h> 14#include <asm/system.h>
16#include <asm/io.h> 15#include <asm/io.h>
diff --git a/arch/x86/kernel/i8259_64.c b/arch/x86/kernel/i8259_64.c
index 948cae646099..eb72976cc13c 100644
--- a/arch/x86/kernel/i8259_64.c
+++ b/arch/x86/kernel/i8259_64.c
@@ -444,46 +444,6 @@ void __init init_ISA_irqs (void)
444 } 444 }
445} 445}
446 446
447static void setup_timer_hardware(void)
448{
449 outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */
450 udelay(10);
451 outb_p(LATCH & 0xff , 0x40); /* LSB */
452 udelay(10);
453 outb(LATCH >> 8 , 0x40); /* MSB */
454}
455
456static int timer_resume(struct sys_device *dev)
457{
458 setup_timer_hardware();
459 return 0;
460}
461
462void i8254_timer_resume(void)
463{
464 setup_timer_hardware();
465}
466
467static struct sysdev_class timer_sysclass = {
468 set_kset_name("timer_pit"),
469 .resume = timer_resume,
470};
471
472static struct sys_device device_timer = {
473 .id = 0,
474 .cls = &timer_sysclass,
475};
476
477static int __init init_timer_sysfs(void)
478{
479 int error = sysdev_class_register(&timer_sysclass);
480 if (!error)
481 error = sysdev_register(&device_timer);
482 return error;
483}
484
485device_initcall(init_timer_sysfs);
486
487void __init init_IRQ(void) 447void __init init_IRQ(void)
488{ 448{
489 int i; 449 int i;
@@ -533,12 +493,6 @@ void __init init_IRQ(void)
533 set_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); 493 set_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
534 set_intr_gate(ERROR_APIC_VECTOR, error_interrupt); 494 set_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
535 495
536 /*
537 * Set the clock to HZ Hz, we already have a valid
538 * vector now:
539 */
540 setup_timer_hardware();
541
542 if (!acpi_ioapic) 496 if (!acpi_ioapic)
543 setup_irq(2, &irq2); 497 setup_irq(2, &irq2);
544} 498}
diff --git a/arch/x86/kernel/ioport_32.c b/arch/x86/kernel/ioport_32.c
index 3d310a946d76..4ed48dc8df1e 100644
--- a/arch/x86/kernel/ioport_32.c
+++ b/arch/x86/kernel/ioport_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/ioport.c
3 *
4 * This contains the io-permission bitmap code - written by obz, with changes 2 * This contains the io-permission bitmap code - written by obz, with changes
5 * by Linus. 3 * by Linus.
6 */ 4 */
diff --git a/arch/x86/kernel/ioport_64.c b/arch/x86/kernel/ioport_64.c
index 653efa30b0f4..5f62fad64dab 100644
--- a/arch/x86/kernel/ioport_64.c
+++ b/arch/x86/kernel/ioport_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86_64/kernel/ioport.c
3 *
4 * This contains the io-permission bitmap code - written by obz, with changes 2 * This contains the io-permission bitmap code - written by obz, with changes
5 * by Linus. 3 * by Linus.
6 */ 4 */
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 4f681bcdb1fc..e173b763f148 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/irq.c
3 *
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar 2 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
5 * 3 *
6 * This file contains the lowest level x86-specific interrupt 4 * This file contains the lowest level x86-specific interrupt
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index bd11e42b22bf..865669efc540 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86_64/kernel/irq.c
3 *
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar 2 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
5 * 3 *
6 * This file contains the lowest level x86_64-specific interrupt 4 * This file contains the lowest level x86_64-specific interrupt
diff --git a/arch/x86/kernel/kprobes_32.c b/arch/x86/kernel/kprobes_32.c
index 448a50b1324c..c2d03e96ae9f 100644
--- a/arch/x86/kernel/kprobes_32.c
+++ b/arch/x86/kernel/kprobes_32.c
@@ -1,6 +1,5 @@
1/* 1/*
2 * Kernel Probes (KProbes) 2 * Kernel Probes (KProbes)
3 * arch/i386/kernel/kprobes.c
4 * 3 *
5 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 5 * it under the terms of the GNU General Public License as published by
diff --git a/arch/x86/kernel/kprobes_64.c b/arch/x86/kernel/kprobes_64.c
index a30e004682e2..1df17a0ec0c9 100644
--- a/arch/x86/kernel/kprobes_64.c
+++ b/arch/x86/kernel/kprobes_64.c
@@ -1,6 +1,5 @@
1/* 1/*
2 * Kernel Probes (KProbes) 2 * Kernel Probes (KProbes)
3 * arch/x86_64/kernel/kprobes.c
4 * 3 *
5 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 5 * it under the terms of the GNU General Public License as published by
diff --git a/arch/x86/kernel/ldt_32.c b/arch/x86/kernel/ldt_32.c
index e0b2d17f4f10..a8b18421863a 100644
--- a/arch/x86/kernel/ldt_32.c
+++ b/arch/x86/kernel/ldt_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/ldt.c
3 *
4 * Copyright (C) 1992 Krishna Balasubramanian and Linus Torvalds 2 * Copyright (C) 1992 Krishna Balasubramanian and Linus Torvalds
5 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com> 3 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
6 */ 4 */
diff --git a/arch/x86/kernel/ldt_64.c b/arch/x86/kernel/ldt_64.c
index bc9ffd5c19cc..3796523d616a 100644
--- a/arch/x86/kernel/ldt_64.c
+++ b/arch/x86/kernel/ldt_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86_64/kernel/ldt.c
3 *
4 * Copyright (C) 1992 Krishna Balasubramanian and Linus Torvalds 2 * Copyright (C) 1992 Krishna Balasubramanian and Linus Torvalds
5 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com> 3 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
6 * Copyright (C) 2002 Andi Kleen 4 * Copyright (C) 2002 Andi Kleen
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 91966bafb3dc..deda9a221cf2 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * machine_kexec.c - handle transition of Linux booting another kernel 2 * handle transition of Linux booting another kernel
3 * Copyright (C) 2002-2005 Eric Biederman <ebiederm@xmission.com> 3 * Copyright (C) 2002-2005 Eric Biederman <ebiederm@xmission.com>
4 * 4 *
5 * This source code is licensed under the GNU General Public License, 5 * This source code is licensed under the GNU General Public License,
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index c3a554703672..cd1899a2f0c5 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * machine_kexec.c - handle transition of Linux booting another kernel 2 * handle transition of Linux booting another kernel
3 * Copyright (C) 2002-2005 Eric Biederman <ebiederm@xmission.com> 3 * Copyright (C) 2002-2005 Eric Biederman <ebiederm@xmission.com>
4 * 4 *
5 * This source code is licensed under the GNU General Public License, 5 * This source code is licensed under the GNU General Public License,
diff --git a/arch/x86/kernel/mca_32.c b/arch/x86/kernel/mca_32.c
index b83672b89527..9482033ed0fe 100644
--- a/arch/x86/kernel/mca_32.c
+++ b/arch/x86/kernel/mca_32.c
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/mca.c
3 * Written by Martin Kolinek, February 1996 2 * Written by Martin Kolinek, February 1996
4 * 3 *
5 * Changes: 4 * Changes:
diff --git a/arch/x86/kernel/mfgpt_32.c b/arch/x86/kernel/mfgpt_32.c
new file mode 100644
index 000000000000..0ab680f2d9db
--- /dev/null
+++ b/arch/x86/kernel/mfgpt_32.c
@@ -0,0 +1,362 @@
1/*
2 * Driver/API for AMD Geode Multi-Function General Purpose Timers (MFGPT)
3 *
4 * Copyright (C) 2006, Advanced Micro Devices, Inc.
5 * Copyright (C) 2007, Andres Salomon <dilinger@debian.org>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of version 2 of the GNU General Public License
9 * as published by the Free Software Foundation.
10 *
11 * The MFGPTs are documented in AMD Geode CS5536 Companion Device Data Book.
12 */
13
14/*
15 * We are using the 32Khz input clock - its the only one that has the
16 * ranges we find desirable. The following table lists the suitable
17 * divisors and the associated hz, minimum interval
18 * and the maximum interval:
19 *
20 * Divisor Hz Min Delta (S) Max Delta (S)
21 * 1 32000 .0005 2.048
22 * 2 16000 .001 4.096
23 * 4 8000 .002 8.192
24 * 8 4000 .004 16.384
25 * 16 2000 .008 32.768
26 * 32 1000 .016 65.536
27 * 64 500 .032 131.072
28 * 128 250 .064 262.144
29 * 256 125 .128 524.288
30 */
31
32#include <linux/kernel.h>
33#include <linux/interrupt.h>
34#include <linux/module.h>
35#include <asm/geode.h>
36
37#define F_AVAIL 0x01
38
39static struct mfgpt_timer_t {
40 int flags;
41 struct module *owner;
42} mfgpt_timers[MFGPT_MAX_TIMERS];
43
44/* Selected from the table above */
45
46#define MFGPT_DIVISOR 16
47#define MFGPT_SCALE 4 /* divisor = 2^(scale) */
48#define MFGPT_HZ (32000 / MFGPT_DIVISOR)
49#define MFGPT_PERIODIC (MFGPT_HZ / HZ)
50
51#ifdef CONFIG_GEODE_MFGPT_TIMER
52static int __init mfgpt_timer_setup(void);
53#else
54#define mfgpt_timer_setup() (0)
55#endif
56
57/* Allow for disabling of MFGPTs */
58static int disable;
59static int __init mfgpt_disable(char *s)
60{
61 disable = 1;
62 return 1;
63}
64__setup("nomfgpt", mfgpt_disable);
65
66/*
67 * Check whether any MFGPTs are available for the kernel to use. In most
68 * cases, firmware that uses AMD's VSA code will claim all timers during
69 * bootup; we certainly don't want to take them if they're already in use.
70 * In other cases (such as with VSAless OpenFirmware), the system firmware
71 * leaves timers available for us to use.
72 */
73int __init geode_mfgpt_detect(void)
74{
75 int count = 0, i;
76 u16 val;
77
78 if (disable) {
79 printk(KERN_INFO "geode-mfgpt: Skipping MFGPT setup\n");
80 return 0;
81 }
82
83 for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
84 val = geode_mfgpt_read(i, MFGPT_REG_SETUP);
85 if (!(val & MFGPT_SETUP_SETUP)) {
86 mfgpt_timers[i].flags = F_AVAIL;
87 count++;
88 }
89 }
90
91 /* set up clock event device, if desired */
92 i = mfgpt_timer_setup();
93
94 return count;
95}
96
97int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable)
98{
99 u32 msr, mask, value, dummy;
100 int shift = (cmp == MFGPT_CMP1) ? 0 : 8;
101
102 if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
103 return -EIO;
104
105 /*
106 * The register maps for these are described in sections 6.17.1.x of
107 * the AMD Geode CS5536 Companion Device Data Book.
108 */
109 switch (event) {
110 case MFGPT_EVENT_RESET:
111 /*
112 * XXX: According to the docs, we cannot reset timers above
113 * 6; that is, resets for 7 and 8 will be ignored. Is this
114 * a problem? -dilinger
115 */
116 msr = MFGPT_NR_MSR;
117 mask = 1 << (timer + 24);
118 break;
119
120 case MFGPT_EVENT_NMI:
121 msr = MFGPT_NR_MSR;
122 mask = 1 << (timer + shift);
123 break;
124
125 case MFGPT_EVENT_IRQ:
126 msr = MFGPT_IRQ_MSR;
127 mask = 1 << (timer + shift);
128 break;
129
130 default:
131 return -EIO;
132 }
133
134 rdmsr(msr, value, dummy);
135
136 if (enable)
137 value |= mask;
138 else
139 value &= ~mask;
140
141 wrmsr(msr, value, dummy);
142 return 0;
143}
144
145int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable)
146{
147 u32 val, dummy;
148 int offset;
149
150 if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
151 return -EIO;
152
153 if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
154 return -EIO;
155
156 rdmsr(MSR_PIC_ZSEL_LOW, val, dummy);
157
158 offset = (timer % 4) * 4;
159
160 val &= ~((0xF << offset) | (0xF << (offset + 16)));
161
162 if (enable) {
163 val |= (irq & 0x0F) << (offset);
164 val |= (irq & 0x0F) << (offset + 16);
165 }
166
167 wrmsr(MSR_PIC_ZSEL_LOW, val, dummy);
168 return 0;
169}
170
171static int mfgpt_get(int timer, struct module *owner)
172{
173 mfgpt_timers[timer].flags &= ~F_AVAIL;
174 mfgpt_timers[timer].owner = owner;
175 printk(KERN_INFO "geode-mfgpt: Registered timer %d\n", timer);
176 return timer;
177}
178
179int geode_mfgpt_alloc_timer(int timer, int domain, struct module *owner)
180{
181 int i;
182
183 if (!geode_get_dev_base(GEODE_DEV_MFGPT))
184 return -ENODEV;
185 if (timer >= MFGPT_MAX_TIMERS)
186 return -EIO;
187
188 if (timer < 0) {
189 /* Try to find an available timer */
190 for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
191 if (mfgpt_timers[i].flags & F_AVAIL)
192 return mfgpt_get(i, owner);
193
194 if (i == 5 && domain == MFGPT_DOMAIN_WORKING)
195 break;
196 }
197 } else {
198 /* If they requested a specific timer, try to honor that */
199 if (mfgpt_timers[timer].flags & F_AVAIL)
200 return mfgpt_get(timer, owner);
201 }
202
203 /* No timers available - too bad */
204 return -1;
205}
206
207
208#ifdef CONFIG_GEODE_MFGPT_TIMER
209
210/*
211 * The MFPGT timers on the CS5536 provide us with suitable timers to use
212 * as clock event sources - not as good as a HPET or APIC, but certainly
213 * better then the PIT. This isn't a general purpose MFGPT driver, but
214 * a simplified one designed specifically to act as a clock event source.
215 * For full details about the MFGPT, please consult the CS5536 data sheet.
216 */
217
218#include <linux/clocksource.h>
219#include <linux/clockchips.h>
220
221static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
222static u16 mfgpt_event_clock;
223
224static int irq = 7;
225static int __init mfgpt_setup(char *str)
226{
227 get_option(&str, &irq);
228 return 1;
229}
230__setup("mfgpt_irq=", mfgpt_setup);
231
232static inline void mfgpt_disable_timer(u16 clock)
233{
234 u16 val = geode_mfgpt_read(clock, MFGPT_REG_SETUP);
235 geode_mfgpt_write(clock, MFGPT_REG_SETUP, val & ~MFGPT_SETUP_CNTEN);
236}
237
238static int mfgpt_next_event(unsigned long, struct clock_event_device *);
239static void mfgpt_set_mode(enum clock_event_mode, struct clock_event_device *);
240
241static struct clock_event_device mfgpt_clockevent = {
242 .name = "mfgpt-timer",
243 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
244 .set_mode = mfgpt_set_mode,
245 .set_next_event = mfgpt_next_event,
246 .rating = 250,
247 .cpumask = CPU_MASK_ALL,
248 .shift = 32
249};
250
251static inline void mfgpt_start_timer(u16 clock, u16 delta)
252{
253 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_CMP2, (u16) delta);
254 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
255
256 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
257 MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
258}
259
260static void mfgpt_set_mode(enum clock_event_mode mode,
261 struct clock_event_device *evt)
262{
263 mfgpt_disable_timer(mfgpt_event_clock);
264
265 if (mode == CLOCK_EVT_MODE_PERIODIC)
266 mfgpt_start_timer(mfgpt_event_clock, MFGPT_PERIODIC);
267
268 mfgpt_tick_mode = mode;
269}
270
271static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
272{
273 mfgpt_start_timer(mfgpt_event_clock, delta);
274 return 0;
275}
276
277/* Assume (foolishly?), that this interrupt was due to our tick */
278
279static irqreturn_t mfgpt_tick(int irq, void *dev_id)
280{
281 if (mfgpt_tick_mode == CLOCK_EVT_MODE_SHUTDOWN)
282 return IRQ_HANDLED;
283
284 /* Turn off the clock */
285 mfgpt_disable_timer(mfgpt_event_clock);
286
287 /* Clear the counter */
288 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
289
290 /* Restart the clock in periodic mode */
291
292 if (mfgpt_tick_mode == CLOCK_EVT_MODE_PERIODIC) {
293 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
294 MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
295 }
296
297 mfgpt_clockevent.event_handler(&mfgpt_clockevent);
298 return IRQ_HANDLED;
299}
300
301static struct irqaction mfgptirq = {
302 .handler = mfgpt_tick,
303 .flags = IRQF_DISABLED | IRQF_NOBALANCING,
304 .mask = CPU_MASK_NONE,
305 .name = "mfgpt-timer"
306};
307
308static int __init mfgpt_timer_setup(void)
309{
310 int timer, ret;
311 u16 val;
312
313 timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING,
314 THIS_MODULE);
315 if (timer < 0) {
316 printk(KERN_ERR
317 "mfgpt-timer: Could not allocate a MFPGT timer\n");
318 return -ENODEV;
319 }
320
321 mfgpt_event_clock = timer;
322 /* Set the clock scale and enable the event mode for CMP2 */
323 val = MFGPT_SCALE | (3 << 8);
324
325 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP, val);
326
327 /* Set up the IRQ on the MFGPT side */
328 if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) {
329 printk(KERN_ERR "mfgpt-timer: Could not set up IRQ %d\n", irq);
330 return -EIO;
331 }
332
333 /* And register it with the kernel */
334 ret = setup_irq(irq, &mfgptirq);
335
336 if (ret) {
337 printk(KERN_ERR
338 "mfgpt-timer: Unable to set up the interrupt.\n");
339 goto err;
340 }
341
342 /* Set up the clock event */
343 mfgpt_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC, 32);
344 mfgpt_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
345 &mfgpt_clockevent);
346 mfgpt_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
347 &mfgpt_clockevent);
348
349 printk(KERN_INFO
350 "mfgpt-timer: registering the MFGT timer as a clock event.\n");
351 clockevents_register_device(&mfgpt_clockevent);
352
353 return 0;
354
355err:
356 geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq);
357 printk(KERN_ERR
358 "mfgpt-timer: Unable to set up the MFGPT clock source\n");
359 return -EIO;
360}
361
362#endif
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 0c1069b8d638..c044de310b69 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -11,8 +11,6 @@
11 * ----------------------------------------------------------------------- */ 11 * ----------------------------------------------------------------------- */
12 12
13/* 13/*
14 * msr.c
15 *
16 * x86 MSR access device 14 * x86 MSR access device
17 * 15 *
18 * This device is accessed by lseek() to the appropriate register number 16 * This device is accessed by lseek() to the appropriate register number
diff --git a/arch/x86/kernel/nmi_32.c b/arch/x86/kernel/nmi_32.c
index c7227e2180f8..f803ed0ed1c4 100644
--- a/arch/x86/kernel/nmi_32.c
+++ b/arch/x86/kernel/nmi_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/nmi.c
3 *
4 * NMI watchdog support on APIC systems 2 * NMI watchdog support on APIC systems
5 * 3 *
6 * Started by Ingo Molnar <mingo@redhat.com> 4 * Started by Ingo Molnar <mingo@redhat.com>
@@ -353,7 +351,8 @@ __kprobes int nmi_watchdog_tick(struct pt_regs * regs, unsigned reason)
353 * Take the local apic timer and PIT/HPET into account. We don't 351 * Take the local apic timer and PIT/HPET into account. We don't
354 * know which one is active, when we have highres/dyntick on 352 * know which one is active, when we have highres/dyntick on
355 */ 353 */
356 sum = per_cpu(irq_stat, cpu).apic_timer_irqs + kstat_cpu(cpu).irqs[0]; 354 sum = per_cpu(irq_stat, cpu).apic_timer_irqs +
355 per_cpu(irq_stat, cpu).irq0_irqs;
357 356
358 /* if the none of the timers isn't firing, this cpu isn't doing much */ 357 /* if the none of the timers isn't firing, this cpu isn't doing much */
359 if (!touched && last_irq_sums[cpu] == sum) { 358 if (!touched && last_irq_sums[cpu] == sum) {
diff --git a/arch/x86/kernel/nmi_64.c b/arch/x86/kernel/nmi_64.c
index 0ec6d2ddb931..a576fd740062 100644
--- a/arch/x86/kernel/nmi_64.c
+++ b/arch/x86/kernel/nmi_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86_64/nmi.c
3 *
4 * NMI watchdog support on APIC systems 2 * NMI watchdog support on APIC systems
5 * 3 *
6 * Started by Ingo Molnar <mingo@redhat.com> 4 * Started by Ingo Molnar <mingo@redhat.com>
@@ -329,7 +327,7 @@ int __kprobes nmi_watchdog_tick(struct pt_regs * regs, unsigned reason)
329 touched = 1; 327 touched = 1;
330 } 328 }
331 329
332 sum = read_pda(apic_timer_irqs); 330 sum = read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
333 if (__get_cpu_var(nmi_touch)) { 331 if (__get_cpu_var(nmi_touch)) {
334 __get_cpu_var(nmi_touch) = 0; 332 __get_cpu_var(nmi_touch) = 0;
335 touched = 1; 333 touched = 1;
diff --git a/arch/x86/kernel/pci-dma_32.c b/arch/x86/kernel/pci-dma_32.c
index 048f09b62553..0aae2f3847a5 100644
--- a/arch/x86/kernel/pci-dma_32.c
+++ b/arch/x86/kernel/pci-dma_32.c
@@ -63,7 +63,8 @@ void dma_free_coherent(struct device *dev, size_t size,
63{ 63{
64 struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; 64 struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
65 int order = get_order(size); 65 int order = get_order(size);
66 66
67 WARN_ON(irqs_disabled()); /* for portability */
67 if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) { 68 if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) {
68 int page = (vaddr - mem->virt_base) >> PAGE_SHIFT; 69 int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
69 70
diff --git a/arch/x86/kernel/pci-dma_64.c b/arch/x86/kernel/pci-dma_64.c
index 29711445c818..9576a2eb375e 100644
--- a/arch/x86/kernel/pci-dma_64.c
+++ b/arch/x86/kernel/pci-dma_64.c
@@ -167,6 +167,7 @@ EXPORT_SYMBOL(dma_alloc_coherent);
167void dma_free_coherent(struct device *dev, size_t size, 167void dma_free_coherent(struct device *dev, size_t size,
168 void *vaddr, dma_addr_t bus) 168 void *vaddr, dma_addr_t bus)
169{ 169{
170 WARN_ON(irqs_disabled()); /* for portability */
170 if (dma_ops->unmap_single) 171 if (dma_ops->unmap_single)
171 dma_ops->unmap_single(dev, bus, size, 0); 172 dma_ops->unmap_single(dev, bus, size, 0);
172 free_pages((unsigned long)vaddr, get_order(size)); 173 free_pages((unsigned long)vaddr, get_order(size));
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 84664710b784..097aeafce5ff 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/process.c
3 *
4 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
5 * 3 *
6 * Pentium III FXSR, SSE support 4 * Pentium III FXSR, SSE support
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 98956555450b..7352d4b377e6 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86-64/kernel/process.c
3 *
4 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
5 * 3 *
6 * Pentium III FXSR, SSE support 4 * Pentium III FXSR, SSE support
@@ -38,6 +36,7 @@
38#include <linux/notifier.h> 36#include <linux/notifier.h>
39#include <linux/kprobes.h> 37#include <linux/kprobes.h>
40#include <linux/kdebug.h> 38#include <linux/kdebug.h>
39#include <linux/tick.h>
41 40
42#include <asm/uaccess.h> 41#include <asm/uaccess.h>
43#include <asm/pgtable.h> 42#include <asm/pgtable.h>
@@ -208,6 +207,8 @@ void cpu_idle (void)
208 if (__get_cpu_var(cpu_idle_state)) 207 if (__get_cpu_var(cpu_idle_state))
209 __get_cpu_var(cpu_idle_state) = 0; 208 __get_cpu_var(cpu_idle_state) = 0;
210 209
210 tick_nohz_stop_sched_tick();
211
211 rmb(); 212 rmb();
212 idle = pm_idle; 213 idle = pm_idle;
213 if (!idle) 214 if (!idle)
@@ -228,6 +229,7 @@ void cpu_idle (void)
228 __exit_idle(); 229 __exit_idle();
229 } 230 }
230 231
232 tick_nohz_restart_sched_tick();
231 preempt_enable_no_resched(); 233 preempt_enable_no_resched();
232 schedule(); 234 schedule();
233 preempt_disable(); 235 preempt_disable();
diff --git a/arch/x86/kernel/ptrace_32.c b/arch/x86/kernel/ptrace_32.c
index 7c1b92522e95..0cecd7513c97 100644
--- a/arch/x86/kernel/ptrace_32.c
+++ b/arch/x86/kernel/ptrace_32.c
@@ -1,4 +1,3 @@
1/* ptrace.c */
2/* By Ross Biro 1/23/92 */ 1/* By Ross Biro 1/23/92 */
3/* 2/*
4 * Pentium III FXSR, SSE support 3 * Pentium III FXSR, SSE support
diff --git a/arch/x86/kernel/ptrace_64.c b/arch/x86/kernel/ptrace_64.c
index eea3702427b4..c0cac42df3b6 100644
--- a/arch/x86/kernel/ptrace_64.c
+++ b/arch/x86/kernel/ptrace_64.c
@@ -1,4 +1,3 @@
1/* ptrace.c */
2/* By Ross Biro 1/23/92 */ 1/* By Ross Biro 1/23/92 */
3/* 2/*
4 * Pentium III FXSR, SSE support 3 * Pentium III FXSR, SSE support
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 6722469c2633..d769e204f942 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -4,6 +4,8 @@
4#include <linux/pci.h> 4#include <linux/pci.h>
5#include <linux/irq.h> 5#include <linux/irq.h>
6 6
7#include <asm/hpet.h>
8
7#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI) 9#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
8 10
9static void __devinit quirk_intel_irqbalance(struct pci_dev *dev) 11static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
@@ -47,3 +49,206 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quir
47DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_intel_irqbalance); 49DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_intel_irqbalance);
48DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_intel_irqbalance); 50DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_intel_irqbalance);
49#endif 51#endif
52
53#if defined(CONFIG_HPET_TIMER)
54unsigned long force_hpet_address;
55
56static enum {
57 NONE_FORCE_HPET_RESUME,
58 OLD_ICH_FORCE_HPET_RESUME,
59 ICH_FORCE_HPET_RESUME
60} force_hpet_resume_type;
61
62static void __iomem *rcba_base;
63
64static void ich_force_hpet_resume(void)
65{
66 u32 val;
67
68 if (!force_hpet_address)
69 return;
70
71 if (rcba_base == NULL)
72 BUG();
73
74 /* read the Function Disable register, dword mode only */
75 val = readl(rcba_base + 0x3404);
76 if (!(val & 0x80)) {
77 /* HPET disabled in HPTC. Trying to enable */
78 writel(val | 0x80, rcba_base + 0x3404);
79 }
80
81 val = readl(rcba_base + 0x3404);
82 if (!(val & 0x80))
83 BUG();
84 else
85 printk(KERN_DEBUG "Force enabled HPET at resume\n");
86
87 return;
88}
89
90static void ich_force_enable_hpet(struct pci_dev *dev)
91{
92 u32 val;
93 u32 uninitialized_var(rcba);
94 int err = 0;
95
96 if (hpet_address || force_hpet_address)
97 return;
98
99 pci_read_config_dword(dev, 0xF0, &rcba);
100 rcba &= 0xFFFFC000;
101 if (rcba == 0) {
102 printk(KERN_DEBUG "RCBA disabled. Cannot force enable HPET\n");
103 return;
104 }
105
106 /* use bits 31:14, 16 kB aligned */
107 rcba_base = ioremap_nocache(rcba, 0x4000);
108 if (rcba_base == NULL) {
109 printk(KERN_DEBUG "ioremap failed. Cannot force enable HPET\n");
110 return;
111 }
112
113 /* read the Function Disable register, dword mode only */
114 val = readl(rcba_base + 0x3404);
115
116 if (val & 0x80) {
117 /* HPET is enabled in HPTC. Just not reported by BIOS */
118 val = val & 0x3;
119 force_hpet_address = 0xFED00000 | (val << 12);
120 printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",
121 force_hpet_address);
122 iounmap(rcba_base);
123 return;
124 }
125
126 /* HPET disabled in HPTC. Trying to enable */
127 writel(val | 0x80, rcba_base + 0x3404);
128
129 val = readl(rcba_base + 0x3404);
130 if (!(val & 0x80)) {
131 err = 1;
132 } else {
133 val = val & 0x3;
134 force_hpet_address = 0xFED00000 | (val << 12);
135 }
136
137 if (err) {
138 force_hpet_address = 0;
139 iounmap(rcba_base);
140 printk(KERN_DEBUG "Failed to force enable HPET\n");
141 } else {
142 force_hpet_resume_type = ICH_FORCE_HPET_RESUME;
143 printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",
144 force_hpet_address);
145 }
146}
147
148DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0,
149 ich_force_enable_hpet);
150DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1,
151 ich_force_enable_hpet);
152DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0,
153 ich_force_enable_hpet);
154DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1,
155 ich_force_enable_hpet);
156DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_31,
157 ich_force_enable_hpet);
158DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_1,
159 ich_force_enable_hpet);
160
161
162static struct pci_dev *cached_dev;
163
164static void old_ich_force_hpet_resume(void)
165{
166 u32 val;
167 u32 uninitialized_var(gen_cntl);
168
169 if (!force_hpet_address || !cached_dev)
170 return;
171
172 pci_read_config_dword(cached_dev, 0xD0, &gen_cntl);
173 gen_cntl &= (~(0x7 << 15));
174 gen_cntl |= (0x4 << 15);
175
176 pci_write_config_dword(cached_dev, 0xD0, gen_cntl);
177 pci_read_config_dword(cached_dev, 0xD0, &gen_cntl);
178 val = gen_cntl >> 15;
179 val &= 0x7;
180 if (val == 0x4)
181 printk(KERN_DEBUG "Force enabled HPET at resume\n");
182 else
183 BUG();
184}
185
186static void old_ich_force_enable_hpet(struct pci_dev *dev)
187{
188 u32 val;
189 u32 uninitialized_var(gen_cntl);
190
191 if (hpet_address || force_hpet_address)
192 return;
193
194 pci_read_config_dword(dev, 0xD0, &gen_cntl);
195 /*
196 * Bit 17 is HPET enable bit.
197 * Bit 16:15 control the HPET base address.
198 */
199 val = gen_cntl >> 15;
200 val &= 0x7;
201 if (val & 0x4) {
202 val &= 0x3;
203 force_hpet_address = 0xFED00000 | (val << 12);
204 printk(KERN_DEBUG "HPET at base address 0x%lx\n",
205 force_hpet_address);
206 return;
207 }
208
209 /*
210 * HPET is disabled. Trying enabling at FED00000 and check
211 * whether it sticks
212 */
213 gen_cntl &= (~(0x7 << 15));
214 gen_cntl |= (0x4 << 15);
215 pci_write_config_dword(dev, 0xD0, gen_cntl);
216
217 pci_read_config_dword(dev, 0xD0, &gen_cntl);
218
219 val = gen_cntl >> 15;
220 val &= 0x7;
221 if (val & 0x4) {
222 /* HPET is enabled in HPTC. Just not reported by BIOS */
223 val &= 0x3;
224 force_hpet_address = 0xFED00000 | (val << 12);
225 printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",
226 force_hpet_address);
227 cached_dev = dev;
228 force_hpet_resume_type = OLD_ICH_FORCE_HPET_RESUME;
229 return;
230 }
231
232 printk(KERN_DEBUG "Failed to force enable HPET\n");
233}
234
235DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0,
236 old_ich_force_enable_hpet);
237DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_12,
238 old_ich_force_enable_hpet);
239
240void force_hpet_resume(void)
241{
242 switch (force_hpet_resume_type) {
243 case ICH_FORCE_HPET_RESUME:
244 return ich_force_hpet_resume();
245
246 case OLD_ICH_FORCE_HPET_RESUME:
247 return old_ich_force_hpet_resume();
248
249 default:
250 break;
251 }
252}
253
254#endif
diff --git a/arch/x86/kernel/reboot_32.c b/arch/x86/kernel/reboot_32.c
index b37ed226830a..9e2269d00918 100644
--- a/arch/x86/kernel/reboot_32.c
+++ b/arch/x86/kernel/reboot_32.c
@@ -1,7 +1,3 @@
1/*
2 * linux/arch/i386/kernel/reboot.c
3 */
4
5#include <linux/mm.h> 1#include <linux/mm.h>
6#include <linux/module.h> 2#include <linux/module.h>
7#include <linux/delay.h> 3#include <linux/delay.h>
diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c
index 03e1cce58f49..8b30b26ad069 100644
--- a/arch/x86/kernel/reboot_fixups_32.c
+++ b/arch/x86/kernel/reboot_fixups_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/reboot_fixups.c
3 *
4 * This is a good place to put board specific reboot fixups. 2 * This is a good place to put board specific reboot fixups.
5 * 3 *
6 * List of supported fixups: 4 * List of supported fixups:
@@ -11,6 +9,7 @@
11 9
12#include <asm/delay.h> 10#include <asm/delay.h>
13#include <linux/pci.h> 11#include <linux/pci.h>
12#include <linux/interrupt.h>
14#include <asm/reboot_fixups.h> 13#include <asm/reboot_fixups.h>
15#include <asm/msr.h> 14#include <asm/msr.h>
16 15
@@ -56,6 +55,11 @@ void mach_reboot_fixups(void)
56 struct pci_dev *dev; 55 struct pci_dev *dev;
57 int i; 56 int i;
58 57
58 /* we can be called from sysrq-B code. In such a case it is
59 * prohibited to dig PCI */
60 if (in_interrupt())
61 return;
62
59 for (i=0; i < ARRAY_SIZE(fixups_table); i++) { 63 for (i=0; i < ARRAY_SIZE(fixups_table); i++) {
60 cur = &(fixups_table[i]); 64 cur = &(fixups_table[i]);
61 dev = pci_get_device(cur->vendor, cur->device, NULL); 65 dev = pci_get_device(cur->vendor, cur->device, NULL);
diff --git a/arch/x86/kernel/scx200_32.c b/arch/x86/kernel/scx200_32.c
index c7d3df23f589..87bc159d29df 100644
--- a/arch/x86/kernel/scx200_32.c
+++ b/arch/x86/kernel/scx200_32.c
@@ -1,8 +1,8 @@
1/* linux/arch/i386/kernel/scx200.c 1/*
2 2 * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
3 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> 3 *
4 4 * National Semiconductor SCx200 support.
5 National Semiconductor SCx200 support. */ 5 */
6 6
7#include <linux/module.h> 7#include <linux/module.h>
8#include <linux/errno.h> 8#include <linux/errno.h>
@@ -24,7 +24,7 @@ MODULE_DESCRIPTION("NatSemi SCx200 Driver");
24MODULE_LICENSE("GPL"); 24MODULE_LICENSE("GPL");
25 25
26unsigned scx200_gpio_base = 0; 26unsigned scx200_gpio_base = 0;
27long scx200_gpio_shadow[2]; 27unsigned long scx200_gpio_shadow[2];
28 28
29unsigned scx200_cb_base = 0; 29unsigned scx200_cb_base = 0;
30 30
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
index d474cd639bcb..c8e1bc38d421 100644
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
5 * 3 *
6 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 4 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index af838f6b0b7f..b7da90e79c78 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -1,10 +1,5 @@
1/* 1/*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
8 */ 3 */
9 4
10/* 5/*
@@ -546,6 +541,37 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
546#endif 541#endif
547} 542}
548 543
544#define ENABLE_C1E_MASK 0x18000000
545#define CPUID_PROCESSOR_SIGNATURE 1
546#define CPUID_XFAM 0x0ff00000
547#define CPUID_XFAM_K8 0x00000000
548#define CPUID_XFAM_10H 0x00100000
549#define CPUID_XFAM_11H 0x00200000
550#define CPUID_XMOD 0x000f0000
551#define CPUID_XMOD_REV_F 0x00040000
552
553/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */
554static __cpuinit int amd_apic_timer_broken(void)
555{
556 u32 lo, hi;
557 u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
558 switch (eax & CPUID_XFAM) {
559 case CPUID_XFAM_K8:
560 if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F)
561 break;
562 case CPUID_XFAM_10H:
563 case CPUID_XFAM_11H:
564 rdmsr(MSR_K8_ENABLE_C1E, lo, hi);
565 if (lo & ENABLE_C1E_MASK)
566 return 1;
567 break;
568 default:
569 /* err on the side of caution */
570 return 1;
571 }
572 return 0;
573}
574
549static void __cpuinit init_amd(struct cpuinfo_x86 *c) 575static void __cpuinit init_amd(struct cpuinfo_x86 *c)
550{ 576{
551 unsigned level; 577 unsigned level;
@@ -617,6 +643,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
617 /* Family 10 doesn't support C states in MWAIT so don't use it */ 643 /* Family 10 doesn't support C states in MWAIT so don't use it */
618 if (c->x86 == 0x10 && !force_mwait) 644 if (c->x86 == 0x10 && !force_mwait)
619 clear_bit(X86_FEATURE_MWAIT, &c->x86_capability); 645 clear_bit(X86_FEATURE_MWAIT, &c->x86_capability);
646
647 if (amd_apic_timer_broken())
648 disable_apic_timer = 1;
620} 649}
621 650
622static void __cpuinit detect_ht(struct cpuinfo_x86 *c) 651static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/signal_32.c b/arch/x86/kernel/signal_32.c
index c03570f7fe8e..d01d51fcce2a 100644
--- a/arch/x86/kernel/signal_32.c
+++ b/arch/x86/kernel/signal_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds 2 * Copyright (C) 1991, 1992 Linus Torvalds
5 * 3 *
6 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson 4 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
diff --git a/arch/x86/kernel/signal_64.c b/arch/x86/kernel/signal_64.c
index 739175b01e06..683802bec419 100644
--- a/arch/x86/kernel/signal_64.c
+++ b/arch/x86/kernel/signal_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86_64/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds 2 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * 4 *
diff --git a/arch/x86/kernel/smpboot_64.c b/arch/x86/kernel/smpboot_64.c
index 32f50783edc8..720a7d1f8862 100644
--- a/arch/x86/kernel/smpboot_64.c
+++ b/arch/x86/kernel/smpboot_64.c
@@ -223,8 +223,6 @@ void __cpuinit smp_callin(void)
223 local_irq_disable(); 223 local_irq_disable();
224 Dprintk("Stack at about %p\n",&cpuid); 224 Dprintk("Stack at about %p\n",&cpuid);
225 225
226 disable_APIC_timer();
227
228 /* 226 /*
229 * Save our processor parameters 227 * Save our processor parameters
230 */ 228 */
@@ -337,19 +335,12 @@ void __cpuinit start_secondary(void)
337 */ 335 */
338 check_tsc_sync_target(); 336 check_tsc_sync_target();
339 337
340 Dprintk("cpu %d: setting up apic clock\n", smp_processor_id());
341 setup_secondary_APIC_clock();
342
343 Dprintk("cpu %d: enabling apic timer\n", smp_processor_id());
344
345 if (nmi_watchdog == NMI_IO_APIC) { 338 if (nmi_watchdog == NMI_IO_APIC) {
346 disable_8259A_irq(0); 339 disable_8259A_irq(0);
347 enable_NMI_through_LVT0(NULL); 340 enable_NMI_through_LVT0(NULL);
348 enable_8259A_irq(0); 341 enable_8259A_irq(0);
349 } 342 }
350 343
351 enable_APIC_timer();
352
353 /* 344 /*
354 * The sibling maps must be set before turing the online map on for 345 * The sibling maps must be set before turing the online map on for
355 * this cpu 346 * this cpu
@@ -378,6 +369,8 @@ void __cpuinit start_secondary(void)
378 369
379 unlock_ipi_call_lock(); 370 unlock_ipi_call_lock();
380 371
372 setup_secondary_APIC_clock();
373
381 cpu_idle(); 374 cpu_idle();
382} 375}
383 376
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index cb9109113584..413e527cdeb9 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/x86_64/kernel/stacktrace.c
3 *
4 * Stack trace management functions 2 * Stack trace management functions
5 * 3 *
6 * Copyright (C) 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> 4 * Copyright (C) 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
diff --git a/arch/x86/kernel/summit_32.c b/arch/x86/kernel/summit_32.c
index d0e01a3acf35..91c7acc8d999 100644
--- a/arch/x86/kernel/summit_32.c
+++ b/arch/x86/kernel/summit_32.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/i386/kernel/summit.c - IBM Summit-Specific Code 2 * IBM Summit-Specific Code
3 * 3 *
4 * Written By: Matthew Dobson, IBM Corporation 4 * Written By: Matthew Dobson, IBM Corporation
5 * 5 *
diff --git a/arch/x86/kernel/sys_i386_32.c b/arch/x86/kernel/sys_i386_32.c
index 42147304de88..f8bae9ba0324 100644
--- a/arch/x86/kernel/sys_i386_32.c
+++ b/arch/x86/kernel/sys_i386_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/sys_i386.c
3 *
4 * This file contains various random system calls that 2 * This file contains various random system calls that
5 * have a non-standard calling sequence on the Linux/i386 3 * have a non-standard calling sequence on the Linux/i386
6 * platform. 4 * platform.
diff --git a/arch/x86/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c
index 4770b7a2052c..907942ee6e76 100644
--- a/arch/x86/kernel/sys_x86_64.c
+++ b/arch/x86/kernel/sys_x86_64.c
@@ -1,7 +1,3 @@
1/*
2 * linux/arch/x86_64/kernel/sys_x86_64.c
3 */
4
5#include <linux/errno.h> 1#include <linux/errno.h>
6#include <linux/sched.h> 2#include <linux/sched.h>
7#include <linux/syscalls.h> 3#include <linux/syscalls.h>
diff --git a/arch/x86/kernel/sysenter_32.c b/arch/x86/kernel/sysenter_32.c
index 4eb2e408764f..5a2d951e2608 100644
--- a/arch/x86/kernel/sysenter_32.c
+++ b/arch/x86/kernel/sysenter_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/sysenter.c
3 *
4 * (C) Copyright 2002 Linus Torvalds 2 * (C) Copyright 2002 Linus Torvalds
5 * Portions based on the vdso-randomization code from exec-shield: 3 * Portions based on the vdso-randomization code from exec-shield:
6 * Copyright(C) 2005-2006, Red Hat, Inc., Ingo Molnar 4 * Copyright(C) 2005-2006, Red Hat, Inc., Ingo Molnar
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 19a6c678d02e..8a322c96bc23 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/kernel/time.c
3 *
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 2 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 * 3 *
6 * This file contains the PC-specific time handling details: 4 * This file contains the PC-specific time handling details:
@@ -157,6 +155,9 @@ EXPORT_SYMBOL(profile_pc);
157 */ 155 */
158irqreturn_t timer_interrupt(int irq, void *dev_id) 156irqreturn_t timer_interrupt(int irq, void *dev_id)
159{ 157{
158 /* Keep nmi watchdog up to date */
159 per_cpu(irq_stat, smp_processor_id()).irq0_irqs++;
160
160#ifdef CONFIG_X86_IO_APIC 161#ifdef CONFIG_X86_IO_APIC
161 if (timer_ack) { 162 if (timer_ack) {
162 /* 163 /*
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index 6d48a4e826d9..c821edc32216 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86-64/kernel/time.c
3 *
4 * "High Precision Event Timer" based timekeeping. 2 * "High Precision Event Timer" based timekeeping.
5 * 3 *
6 * Copyright (c) 1991,1992,1995 Linus Torvalds 4 * Copyright (c) 1991,1992,1995 Linus Torvalds
@@ -28,11 +26,12 @@
28#include <linux/cpu.h> 26#include <linux/cpu.h>
29#include <linux/kallsyms.h> 27#include <linux/kallsyms.h>
30#include <linux/acpi.h> 28#include <linux/acpi.h>
29#include <linux/clockchips.h>
30
31#ifdef CONFIG_ACPI 31#ifdef CONFIG_ACPI
32#include <acpi/achware.h> /* for PM timer frequency */ 32#include <acpi/achware.h> /* for PM timer frequency */
33#include <acpi/acpi_bus.h> 33#include <acpi/acpi_bus.h>
34#endif 34#endif
35#include <asm/8253pit.h>
36#include <asm/i8253.h> 35#include <asm/i8253.h>
37#include <asm/pgtable.h> 36#include <asm/pgtable.h>
38#include <asm/vsyscall.h> 37#include <asm/vsyscall.h>
@@ -47,12 +46,8 @@
47#include <asm/nmi.h> 46#include <asm/nmi.h>
48#include <asm/vgtod.h> 47#include <asm/vgtod.h>
49 48
50static char *timename = NULL;
51
52DEFINE_SPINLOCK(rtc_lock); 49DEFINE_SPINLOCK(rtc_lock);
53EXPORT_SYMBOL(rtc_lock); 50EXPORT_SYMBOL(rtc_lock);
54DEFINE_SPINLOCK(i8253_lock);
55EXPORT_SYMBOL(i8253_lock);
56 51
57volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES; 52volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
58 53
@@ -153,45 +148,12 @@ int update_persistent_clock(struct timespec now)
153 return set_rtc_mmss(now.tv_sec); 148 return set_rtc_mmss(now.tv_sec);
154} 149}
155 150
156void main_timer_handler(void) 151static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
157{ 152{
158/* 153 add_pda(irq0_irqs, 1);
159 * Here we are in the timer irq handler. We have irqs locally disabled (so we
160 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
161 * on the other CPU, so we need a lock. We also need to lock the vsyscall
162 * variables, because both do_timer() and us change them -arca+vojtech
163 */
164
165 write_seqlock(&xtime_lock);
166
167/*
168 * Do the timer stuff.
169 */
170 154
171 do_timer(1); 155 global_clock_event->event_handler(global_clock_event);
172#ifndef CONFIG_SMP
173 update_process_times(user_mode(get_irq_regs()));
174#endif
175
176/*
177 * In the SMP case we use the local APIC timer interrupt to do the profiling,
178 * except when we simulate SMP mode on a uniprocessor system, in that case we
179 * have to call the local interrupt handler.
180 */
181
182 if (!using_apic_timer)
183 smp_local_timer_interrupt();
184 156
185 write_sequnlock(&xtime_lock);
186}
187
188static irqreturn_t timer_interrupt(int irq, void *dev_id)
189{
190 if (apic_runs_main_timer > 1)
191 return IRQ_HANDLED;
192 main_timer_handler();
193 if (using_apic_timer)
194 smp_send_timer_broadcast_ipi();
195 return IRQ_HANDLED; 157 return IRQ_HANDLED;
196} 158}
197 159
@@ -292,97 +254,21 @@ static unsigned int __init tsc_calibrate_cpu_khz(void)
292 return pmc_now * tsc_khz / (tsc_now - tsc_start); 254 return pmc_now * tsc_khz / (tsc_now - tsc_start);
293} 255}
294 256
295/*
296 * pit_calibrate_tsc() uses the speaker output (channel 2) of
297 * the PIT. This is better than using the timer interrupt output,
298 * because we can read the value of the speaker with just one inb(),
299 * where we need three i/o operations for the interrupt channel.
300 * We count how many ticks the TSC does in 50 ms.
301 */
302
303static unsigned int __init pit_calibrate_tsc(void)
304{
305 unsigned long start, end;
306 unsigned long flags;
307
308 spin_lock_irqsave(&i8253_lock, flags);
309
310 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
311
312 outb(0xb0, 0x43);
313 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
314 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
315 start = get_cycles_sync();
316 while ((inb(0x61) & 0x20) == 0);
317 end = get_cycles_sync();
318
319 spin_unlock_irqrestore(&i8253_lock, flags);
320
321 return (end - start) / 50;
322}
323
324#define PIT_MODE 0x43
325#define PIT_CH0 0x40
326
327static void __pit_init(int val, u8 mode)
328{
329 unsigned long flags;
330
331 spin_lock_irqsave(&i8253_lock, flags);
332 outb_p(mode, PIT_MODE);
333 outb_p(val & 0xff, PIT_CH0); /* LSB */
334 outb_p(val >> 8, PIT_CH0); /* MSB */
335 spin_unlock_irqrestore(&i8253_lock, flags);
336}
337
338void __init pit_init(void)
339{
340 __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
341}
342
343void pit_stop_interrupt(void)
344{
345 __pit_init(0, 0x30); /* mode 0 */
346}
347
348void stop_timer_interrupt(void)
349{
350 char *name;
351 if (hpet_address) {
352 name = "HPET";
353 hpet_timer_stop_set_go(0);
354 } else {
355 name = "PIT";
356 pit_stop_interrupt();
357 }
358 printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
359}
360
361static struct irqaction irq0 = { 257static struct irqaction irq0 = {
362 .handler = timer_interrupt, 258 .handler = timer_event_interrupt,
363 .flags = IRQF_DISABLED | IRQF_IRQPOLL, 259 .flags = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING,
364 .mask = CPU_MASK_NONE, 260 .mask = CPU_MASK_NONE,
365 .name = "timer" 261 .name = "timer"
366}; 262};
367 263
368void __init time_init(void) 264void __init time_init(void)
369{ 265{
370 if (nohpet) 266 if (!hpet_enable())
371 hpet_address = 0; 267 setup_pit_timer();
372 268
373 if (hpet_arch_init()) 269 setup_irq(0, &irq0);
374 hpet_address = 0;
375 270
376 if (hpet_use_timer) { 271 tsc_calibrate();
377 /* set tick_nsec to use the proper rate for HPET */
378 tick_nsec = TICK_NSEC_HPET;
379 tsc_khz = hpet_calibrate_tsc();
380 timename = "HPET";
381 } else {
382 pit_init();
383 tsc_khz = pit_calibrate_tsc();
384 timename = "PIT";
385 }
386 272
387 cpu_khz = tsc_khz; 273 cpu_khz = tsc_khz;
388 if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) && 274 if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
@@ -398,50 +284,7 @@ void __init time_init(void)
398 else 284 else
399 vgetcpu_mode = VGETCPU_LSL; 285 vgetcpu_mode = VGETCPU_LSL;
400 286
401 set_cyc2ns_scale(tsc_khz);
402 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n", 287 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
403 cpu_khz / 1000, cpu_khz % 1000); 288 cpu_khz / 1000, cpu_khz % 1000);
404 init_tsc_clocksource(); 289 init_tsc_clocksource();
405
406 setup_irq(0, &irq0);
407}
408
409/*
410 * sysfs support for the timer.
411 */
412
413static int timer_suspend(struct sys_device *dev, pm_message_t state)
414{
415 return 0;
416}
417
418static int timer_resume(struct sys_device *dev)
419{
420 if (hpet_address)
421 hpet_reenable();
422 else
423 i8254_timer_resume();
424 return 0;
425} 290}
426
427static struct sysdev_class timer_sysclass = {
428 .resume = timer_resume,
429 .suspend = timer_suspend,
430 set_kset_name("timer"),
431};
432
433/* XXX this sysfs stuff should probably go elsewhere later -john */
434static struct sys_device device_timer = {
435 .id = 0,
436 .cls = &timer_sysclass,
437};
438
439static int time_init_device(void)
440{
441 int error = sysdev_class_register(&timer_sysclass);
442 if (!error)
443 error = sysdev_register(&device_timer);
444 return error;
445}
446
447device_initcall(time_init_device);
diff --git a/arch/x86/kernel/topology.c b/arch/x86/kernel/topology.c
index 45782356a618..c25f23eb397c 100644
--- a/arch/x86/kernel/topology.c
+++ b/arch/x86/kernel/topology.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/i386/kernel/topology.c - Populate sysfs with topology information 2 * Populate sysfs with topology information
3 * 3 *
4 * Written by: Matthew Dobson, IBM Corporation 4 * Written by: Matthew Dobson, IBM Corporation
5 * Original Code: Paul Dorwin, IBM Corporation, Patrick Mochel, OSDL 5 * Original Code: Paul Dorwin, IBM Corporation, Patrick Mochel, OSDL
diff --git a/arch/x86/kernel/traps_32.c b/arch/x86/kernel/traps_32.c
index 47b0bef335bd..05c27ecaf2a7 100644
--- a/arch/x86/kernel/traps_32.c
+++ b/arch/x86/kernel/traps_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/i386/traps.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds 2 * Copyright (C) 1991, 1992 Linus Torvalds
5 * 3 *
6 * Pentium III FXSR, SSE support 4 * Pentium III FXSR, SSE support
diff --git a/arch/x86/kernel/traps_64.c b/arch/x86/kernel/traps_64.c
index 03888420775d..bc7116acf8ff 100644
--- a/arch/x86/kernel/traps_64.c
+++ b/arch/x86/kernel/traps_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86-64/traps.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds 2 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
6 * 4 *
diff --git a/arch/x86/kernel/tsc_32.c b/arch/x86/kernel/tsc_32.c
index 3ed0ae8c918d..b85ad754f70e 100644
--- a/arch/x86/kernel/tsc_32.c
+++ b/arch/x86/kernel/tsc_32.c
@@ -1,9 +1,3 @@
1/*
2 * This code largely moved from arch/i386/kernel/timer/timer_tsc.c
3 * which was originally moved from arch/i386/kernel/time.c.
4 * See comments there for proper credits.
5 */
6
7#include <linux/sched.h> 1#include <linux/sched.h>
8#include <linux/clocksource.h> 2#include <linux/clocksource.h>
9#include <linux/workqueue.h> 3#include <linux/workqueue.h>
diff --git a/arch/x86/kernel/tsc_64.c b/arch/x86/kernel/tsc_64.c
index 2a59bde663f2..9f22e542c374 100644
--- a/arch/x86/kernel/tsc_64.c
+++ b/arch/x86/kernel/tsc_64.c
@@ -6,7 +6,9 @@
6#include <linux/time.h> 6#include <linux/time.h>
7#include <linux/acpi.h> 7#include <linux/acpi.h>
8#include <linux/cpufreq.h> 8#include <linux/cpufreq.h>
9#include <linux/acpi_pmtmr.h>
9 10
11#include <asm/hpet.h>
10#include <asm/timex.h> 12#include <asm/timex.h>
11 13
12static int notsc __initdata = 0; 14static int notsc __initdata = 0;
@@ -18,7 +20,7 @@ EXPORT_SYMBOL(tsc_khz);
18 20
19static unsigned int cyc2ns_scale __read_mostly; 21static unsigned int cyc2ns_scale __read_mostly;
20 22
21void set_cyc2ns_scale(unsigned long khz) 23static inline void set_cyc2ns_scale(unsigned long khz)
22{ 24{
23 cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / khz; 25 cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / khz;
24} 26}
@@ -118,6 +120,95 @@ core_initcall(cpufreq_tsc);
118 120
119#endif 121#endif
120 122
123#define MAX_RETRIES 5
124#define SMI_TRESHOLD 50000
125
126/*
127 * Read TSC and the reference counters. Take care of SMI disturbance
128 */
129static unsigned long __init tsc_read_refs(unsigned long *pm,
130 unsigned long *hpet)
131{
132 unsigned long t1, t2;
133 int i;
134
135 for (i = 0; i < MAX_RETRIES; i++) {
136 t1 = get_cycles_sync();
137 if (hpet)
138 *hpet = hpet_readl(HPET_COUNTER) & 0xFFFFFFFF;
139 else
140 *pm = acpi_pm_read_early();
141 t2 = get_cycles_sync();
142 if ((t2 - t1) < SMI_TRESHOLD)
143 return t2;
144 }
145 return ULONG_MAX;
146}
147
148/**
149 * tsc_calibrate - calibrate the tsc on boot
150 */
151void __init tsc_calibrate(void)
152{
153 unsigned long flags, tsc1, tsc2, tr1, tr2, pm1, pm2, hpet1, hpet2;
154 int hpet = is_hpet_enabled();
155
156 local_irq_save(flags);
157
158 tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
159
160 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
161
162 outb(0xb0, 0x43);
163 outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
164 outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
165 tr1 = get_cycles_sync();
166 while ((inb(0x61) & 0x20) == 0);
167 tr2 = get_cycles_sync();
168
169 tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL);
170
171 local_irq_restore(flags);
172
173 /*
174 * Preset the result with the raw and inaccurate PIT
175 * calibration value
176 */
177 tsc_khz = (tr2 - tr1) / 50;
178
179 /* hpet or pmtimer available ? */
180 if (!hpet && !pm1 && !pm2) {
181 printk(KERN_INFO "TSC calibrated against PIT\n");
182 return;
183 }
184
185 /* Check, whether the sampling was disturbed by an SMI */
186 if (tsc1 == ULONG_MAX || tsc2 == ULONG_MAX) {
187 printk(KERN_WARNING "TSC calibration disturbed by SMI, "
188 "using PIT calibration result\n");
189 return;
190 }
191
192 tsc2 = (tsc2 - tsc1) * 1000000L;
193
194 if (hpet) {
195 printk(KERN_INFO "TSC calibrated against HPET\n");
196 if (hpet2 < hpet1)
197 hpet2 += 0x100000000;
198 hpet2 -= hpet1;
199 tsc1 = (hpet2 * hpet_readl(HPET_PERIOD)) / 1000000;
200 } else {
201 printk(KERN_INFO "TSC calibrated against PM_TIMER\n");
202 if (pm2 < pm1)
203 pm2 += ACPI_PM_OVRRUN;
204 pm2 -= pm1;
205 tsc1 = (pm2 * 1000000000) / PMTMR_TICKS_PER_SEC;
206 }
207
208 tsc_khz = tsc2 / tsc1;
209 set_cyc2ns_scale(tsc_khz);
210}
211
121/* 212/*
122 * Make an educated guess if the TSC is trustworthy and synchronized 213 * Make an educated guess if the TSC is trustworthy and synchronized
123 * over all CPUs. 214 * over all CPUs.
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 355f5f506c81..9125efe66a06 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/x86_64/kernel/tsc_sync.c: check TSC synchronization. 2 * check TSC synchronization.
3 * 3 *
4 * Copyright (C) 2006, Red Hat, Inc., Ingo Molnar 4 * Copyright (C) 2006, Red Hat, Inc., Ingo Molnar
5 * 5 *
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index f2dcd1d27c0a..157e4bedd3c5 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/kernel/vm86.c
3 *
4 * Copyright (C) 1994 Linus Torvalds 2 * Copyright (C) 1994 Linus Torvalds
5 * 3 *
6 * 29 dec 2001 - Fixed oopses caused by unchecked access to the vm86 4 * 29 dec 2001 - Fixed oopses caused by unchecked access to the vm86
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 06c34949bfdc..93847d848157 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/x86_64/kernel/vsyscall.c
3 *
4 * Copyright (C) 2001 Andrea Arcangeli <andrea@suse.de> SuSE 2 * Copyright (C) 2001 Andrea Arcangeli <andrea@suse.de> SuSE
5 * Copyright 2003 Andi Kleen, SuSE Labs. 3 * Copyright 2003 Andi Kleen, SuSE Labs.
6 * 4 *
diff --git a/arch/x86/lib/copy_user_nocache_64.S b/arch/x86/lib/copy_user_nocache_64.S
index 4620efb12f13..5196762b3b0e 100644
--- a/arch/x86/lib/copy_user_nocache_64.S
+++ b/arch/x86/lib/copy_user_nocache_64.S
@@ -117,6 +117,7 @@ ENTRY(__copy_user_nocache)
117 popq %rbx 117 popq %rbx
118 CFI_ADJUST_CFA_OFFSET -8 118 CFI_ADJUST_CFA_OFFSET -8
119 CFI_RESTORE rbx 119 CFI_RESTORE rbx
120 sfence
120 ret 121 ret
121 CFI_RESTORE_STATE 122 CFI_RESTORE_STATE
122 123
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index bc8a44bddaa7..2d88f7c6d6ac 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -2,15 +2,199 @@
2#include <linux/acpi.h> 2#include <linux/acpi.h>
3#include <linux/init.h> 3#include <linux/init.h>
4#include <linux/irq.h> 4#include <linux/irq.h>
5#include <linux/dmi.h>
5#include <asm/numa.h> 6#include <asm/numa.h>
6#include "pci.h" 7#include "pci.h"
7 8
9static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
10{
11 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
12 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
13 return 0;
14}
15
16static struct dmi_system_id acpi_pciprobe_dmi_table[] = {
17/*
18 * Systems where PCI IO resource ISA alignment can be skipped
19 * when the ISA enable bit in the bridge control is not set
20 */
21 {
22 .callback = can_skip_ioresource_align,
23 .ident = "IBM System x3800",
24 .matches = {
25 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
26 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
27 },
28 },
29 {
30 .callback = can_skip_ioresource_align,
31 .ident = "IBM System x3850",
32 .matches = {
33 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
34 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
35 },
36 },
37 {
38 .callback = can_skip_ioresource_align,
39 .ident = "IBM System x3950",
40 .matches = {
41 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
42 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
43 },
44 },
45 {}
46};
47
48struct pci_root_info {
49 char *name;
50 unsigned int res_num;
51 struct resource *res;
52 struct pci_bus *bus;
53 int busnum;
54};
55
56static acpi_status
57resource_to_addr(struct acpi_resource *resource,
58 struct acpi_resource_address64 *addr)
59{
60 acpi_status status;
61
62 status = acpi_resource_to_address64(resource, addr);
63 if (ACPI_SUCCESS(status) &&
64 (addr->resource_type == ACPI_MEMORY_RANGE ||
65 addr->resource_type == ACPI_IO_RANGE) &&
66 addr->address_length > 0 &&
67 addr->producer_consumer == ACPI_PRODUCER) {
68 return AE_OK;
69 }
70 return AE_ERROR;
71}
72
73static acpi_status
74count_resource(struct acpi_resource *acpi_res, void *data)
75{
76 struct pci_root_info *info = data;
77 struct acpi_resource_address64 addr;
78 acpi_status status;
79
80 status = resource_to_addr(acpi_res, &addr);
81 if (ACPI_SUCCESS(status))
82 info->res_num++;
83 return AE_OK;
84}
85
86static acpi_status
87setup_resource(struct acpi_resource *acpi_res, void *data)
88{
89 struct pci_root_info *info = data;
90 struct resource *res;
91 struct acpi_resource_address64 addr;
92 acpi_status status;
93 unsigned long flags;
94 struct resource *root;
95
96 status = resource_to_addr(acpi_res, &addr);
97 if (!ACPI_SUCCESS(status))
98 return AE_OK;
99
100 if (addr.resource_type == ACPI_MEMORY_RANGE) {
101 root = &iomem_resource;
102 flags = IORESOURCE_MEM;
103 if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
104 flags |= IORESOURCE_PREFETCH;
105 } else if (addr.resource_type == ACPI_IO_RANGE) {
106 root = &ioport_resource;
107 flags = IORESOURCE_IO;
108 } else
109 return AE_OK;
110
111 res = &info->res[info->res_num];
112 res->name = info->name;
113 res->flags = flags;
114 res->start = addr.minimum + addr.translation_offset;
115 res->end = res->start + addr.address_length - 1;
116 res->child = NULL;
117
118 if (insert_resource(root, res)) {
119 printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx "
120 "from %s for %s\n", (unsigned long) res->start,
121 (unsigned long) res->end, root->name, info->name);
122 } else {
123 info->bus->resource[info->res_num] = res;
124 info->res_num++;
125 }
126 return AE_OK;
127}
128
129static void
130adjust_transparent_bridge_resources(struct pci_bus *bus)
131{
132 struct pci_dev *dev;
133
134 list_for_each_entry(dev, &bus->devices, bus_list) {
135 int i;
136 u16 class = dev->class >> 8;
137
138 if (class == PCI_CLASS_BRIDGE_PCI && dev->transparent) {
139 for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++)
140 dev->subordinate->resource[i] =
141 dev->bus->resource[i - 3];
142 }
143 }
144}
145
146static void
147get_current_resources(struct acpi_device *device, int busnum,
148 struct pci_bus *bus)
149{
150 struct pci_root_info info;
151 size_t size;
152
153 info.bus = bus;
154 info.res_num = 0;
155 acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
156 &info);
157 if (!info.res_num)
158 return;
159
160 size = sizeof(*info.res) * info.res_num;
161 info.res = kmalloc(size, GFP_KERNEL);
162 if (!info.res)
163 goto res_alloc_fail;
164
165 info.name = kmalloc(12, GFP_KERNEL);
166 if (!info.name)
167 goto name_alloc_fail;
168 sprintf(info.name, "PCI Bus #%02x", busnum);
169
170 info.res_num = 0;
171 acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
172 &info);
173 if (info.res_num)
174 adjust_transparent_bridge_resources(bus);
175
176 return;
177
178name_alloc_fail:
179 kfree(info.res);
180res_alloc_fail:
181 return;
182}
183
8struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum) 184struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum)
9{ 185{
10 struct pci_bus *bus; 186 struct pci_bus *bus;
11 struct pci_sysdata *sd; 187 struct pci_sysdata *sd;
12 int pxm; 188 int pxm;
13 189
190 dmi_check_system(acpi_pciprobe_dmi_table);
191
192 if (domain && !pci_domains_supported) {
193 printk(KERN_WARNING "PCI: Multiple domains not supported "
194 "(dom %d, bus %d)\n", domain, busnum);
195 return NULL;
196 }
197
14 /* Allocate per-root-bus (not per bus) arch-specific data. 198 /* Allocate per-root-bus (not per bus) arch-specific data.
15 * TODO: leak; this memory is never freed. 199 * TODO: leak; this memory is never freed.
16 * It's arguable whether it's worth the trouble to care. 200 * It's arguable whether it's worth the trouble to care.
@@ -21,12 +205,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
21 return NULL; 205 return NULL;
22 } 206 }
23 207
24 if (domain != 0) { 208 sd->domain = domain;
25 printk(KERN_WARNING "PCI: Multiple domains not supported\n");
26 kfree(sd);
27 return NULL;
28 }
29
30 sd->node = -1; 209 sd->node = -1;
31 210
32 pxm = acpi_get_pxm(device->handle); 211 pxm = acpi_get_pxm(device->handle);
@@ -47,6 +226,9 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
47 } 226 }
48 } 227 }
49#endif 228#endif
229
230 if (bus && (pci_probe & PCI_USE__CRS))
231 get_current_resources(device, busnum, bus);
50 232
51 return bus; 233 return bus;
52} 234}
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 07d5223442bf..2d71bbc411d2 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -29,12 +29,14 @@ struct pci_raw_ops *raw_pci_ops;
29 29
30static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) 30static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
31{ 31{
32 return raw_pci_ops->read(0, bus->number, devfn, where, size, value); 32 return raw_pci_ops->read(pci_domain_nr(bus), bus->number,
33 devfn, where, size, value);
33} 34}
34 35
35static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) 36static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
36{ 37{
37 return raw_pci_ops->write(0, bus->number, devfn, where, size, value); 38 return raw_pci_ops->write(pci_domain_nr(bus), bus->number,
39 devfn, where, size, value);
38} 40}
39 41
40struct pci_ops pci_root_ops = { 42struct pci_ops pci_root_ops = {
@@ -287,6 +289,16 @@ static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
287 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"), 289 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
288 }, 290 },
289 }, 291 },
292#ifdef __i386__
293 {
294 .callback = assign_all_busses,
295 .ident = "Compaq EVO N800c",
296 .matches = {
297 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
298 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
299 },
300 },
301#endif
290 {} 302 {}
291}; 303};
292 304
@@ -426,6 +438,9 @@ char * __devinit pcibios_setup(char *str)
426 } else if (!strcmp(str, "assign-busses")) { 438 } else if (!strcmp(str, "assign-busses")) {
427 pci_probe |= PCI_ASSIGN_ALL_BUSSES; 439 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
428 return NULL; 440 return NULL;
441 } else if (!strcmp(str, "use_crs")) {
442 pci_probe |= PCI_USE__CRS;
443 return NULL;
429 } else if (!strcmp(str, "routeirq")) { 444 } else if (!strcmp(str, "routeirq")) {
430 pci_routeirq = 1; 445 pci_routeirq = 1;
431 return NULL; 446 return NULL;
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index c82cbf4c7226..6cff66dd0c91 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -353,6 +353,53 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)
353} 353}
354DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video); 354DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
355 355
356
357static struct dmi_system_id __devinitdata msi_k8t_dmi_table[] = {
358 {
359 .ident = "MSI-K8T-Neo2Fir",
360 .matches = {
361 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
362 DMI_MATCH(DMI_PRODUCT_NAME, "MS-6702E"),
363 },
364 },
365 {}
366};
367
368/*
369 * The AMD-Athlon64 board MSI "K8T Neo2-FIR" disables the onboard sound
370 * card if a PCI-soundcard is added.
371 *
372 * The BIOS only gives options "DISABLED" and "AUTO". This code sets
373 * the corresponding register-value to enable the soundcard.
374 *
375 * The soundcard is only enabled, if the mainborad is identified
376 * via DMI-tables and the soundcard is detected to be off.
377 */
378static void __devinit pci_fixup_msi_k8t_onboard_sound(struct pci_dev *dev)
379{
380 unsigned char val;
381 if (!dmi_check_system(msi_k8t_dmi_table))
382 return; /* only applies to MSI K8T Neo2-FIR */
383
384 pci_read_config_byte(dev, 0x50, &val);
385 if (val & 0x40) {
386 pci_write_config_byte(dev, 0x50, val & (~0x40));
387
388 /* verify the change for status output */
389 pci_read_config_byte(dev, 0x50, &val);
390 if (val & 0x40)
391 printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, "
392 "can't enable onboard soundcard!\n");
393 else
394 printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, "
395 "enabled onboard soundcard.\n");
396 }
397}
398DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237,
399 pci_fixup_msi_k8t_onboard_sound);
400DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237,
401 pci_fixup_msi_k8t_onboard_sound);
402
356/* 403/*
357 * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A. 404 * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A.
358 * 405 *
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index bcd2f94b732c..42ba0e2da1a0 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -33,6 +33,15 @@
33 33
34#include "pci.h" 34#include "pci.h"
35 35
36static int
37skip_isa_ioresource_align(struct pci_dev *dev) {
38
39 if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) &&
40 !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
41 return 1;
42 return 0;
43}
44
36/* 45/*
37 * We need to avoid collisions with `mirrored' VGA ports 46 * We need to avoid collisions with `mirrored' VGA ports
38 * and other strange ISA hardware, so we always want the 47 * and other strange ISA hardware, so we always want the
@@ -50,9 +59,13 @@ void
50pcibios_align_resource(void *data, struct resource *res, 59pcibios_align_resource(void *data, struct resource *res,
51 resource_size_t size, resource_size_t align) 60 resource_size_t size, resource_size_t align)
52{ 61{
62 struct pci_dev *dev = data;
63
53 if (res->flags & IORESOURCE_IO) { 64 if (res->flags & IORESOURCE_IO) {
54 resource_size_t start = res->start; 65 resource_size_t start = res->start;
55 66
67 if (skip_isa_ioresource_align(dev))
68 return;
56 if (start & 0x300) { 69 if (start & 0x300) {
57 start = (start + 0x3ff) & ~0x3ff; 70 start = (start + 0x3ff) & ~0x3ff;
58 res->start = start; 71 res->start = start;
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index d98c6b096f8e..c52150fdf82b 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -492,6 +492,26 @@ static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq
492 return 1; 492 return 1;
493} 493}
494 494
495/*
496 * PicoPower PT86C523
497 */
498static int pirq_pico_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
499{
500 outb(0x10 + ((pirq - 1) >> 1), 0x24);
501 return ((pirq - 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf);
502}
503
504static int pirq_pico_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
505 int irq)
506{
507 unsigned int x;
508 outb(0x10 + ((pirq - 1) >> 1), 0x24);
509 x = inb(0x26);
510 x = ((pirq - 1) & 1) ? ((x & 0x0f) | (irq << 4)) : ((x & 0xf0) | (irq));
511 outb(x, 0x26);
512 return 1;
513}
514
495#ifdef CONFIG_PCI_BIOS 515#ifdef CONFIG_PCI_BIOS
496 516
497static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq) 517static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
@@ -721,6 +741,24 @@ static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router,
721 return 1; 741 return 1;
722} 742}
723 743
744static __init int pico_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
745{
746 switch (device) {
747 case PCI_DEVICE_ID_PICOPOWER_PT86C523:
748 r->name = "PicoPower PT86C523";
749 r->get = pirq_pico_get;
750 r->set = pirq_pico_set;
751 return 1;
752
753 case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP:
754 r->name = "PicoPower PT86C523 rev. BB+";
755 r->get = pirq_pico_get;
756 r->set = pirq_pico_set;
757 return 1;
758 }
759 return 0;
760}
761
724static __initdata struct irq_router_handler pirq_routers[] = { 762static __initdata struct irq_router_handler pirq_routers[] = {
725 { PCI_VENDOR_ID_INTEL, intel_router_probe }, 763 { PCI_VENDOR_ID_INTEL, intel_router_probe },
726 { PCI_VENDOR_ID_AL, ali_router_probe }, 764 { PCI_VENDOR_ID_AL, ali_router_probe },
@@ -732,6 +770,7 @@ static __initdata struct irq_router_handler pirq_routers[] = {
732 { PCI_VENDOR_ID_VLSI, vlsi_router_probe }, 770 { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
733 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe }, 771 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
734 { PCI_VENDOR_ID_AMD, amd_router_probe }, 772 { PCI_VENDOR_ID_AMD, amd_router_probe },
773 { PCI_VENDOR_ID_PICOPOWER, pico_router_probe },
735 /* Someone with docs needs to add the ATI Radeon IGP */ 774 /* Someone with docs needs to add the ATI Radeon IGP */
736 { 0, NULL } 775 { 0, NULL }
737}; 776};
diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h
index 8c66f275756f..ac56d3916c50 100644
--- a/arch/x86/pci/pci.h
+++ b/arch/x86/pci/pci.h
@@ -26,6 +26,8 @@
26#define PCI_ASSIGN_ROMS 0x1000 26#define PCI_ASSIGN_ROMS 0x1000
27#define PCI_BIOS_IRQ_SCAN 0x2000 27#define PCI_BIOS_IRQ_SCAN 0x2000
28#define PCI_ASSIGN_ALL_BUSSES 0x4000 28#define PCI_ASSIGN_ALL_BUSSES 0x4000
29#define PCI_CAN_SKIP_ISA_ALIGN 0x8000
30#define PCI_USE__CRS 0x10000
29 31
30extern unsigned int pci_probe; 32extern unsigned int pci_probe;
31extern unsigned long pirq_table_addr; 33extern unsigned long pirq_table_addr;
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index b1b98e614f7c..cf013cb85ea4 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -36,6 +36,18 @@ config GENERIC_CMOS_UPDATE
36 bool 36 bool
37 default y 37 default y
38 38
39config CLOCKSOURCE_WATCHDOG
40 bool
41 default y
42
43config GENERIC_CLOCKEVENTS
44 bool
45 default y
46
47config GENERIC_CLOCKEVENTS_BROADCAST
48 bool
49 default y
50
39config ZONE_DMA32 51config ZONE_DMA32
40 bool 52 bool
41 default y 53 default y
@@ -130,6 +142,8 @@ source "init/Kconfig"
130 142
131menu "Processor type and features" 143menu "Processor type and features"
132 144
145source "kernel/time/Kconfig"
146
133choice 147choice
134 prompt "Subarchitecture Type" 148 prompt "Subarchitecture Type"
135 default X86_PC 149 default X86_PC
@@ -724,6 +738,11 @@ config PCI_MMCONFIG
724 bool "Support mmconfig PCI config space access" 738 bool "Support mmconfig PCI config space access"
725 depends on PCI && ACPI 739 depends on PCI && ACPI
726 740
741config PCI_DOMAINS
742 bool
743 depends on PCI
744 default y
745
727source "drivers/pci/pcie/Kconfig" 746source "drivers/pci/pcie/Kconfig"
728 747
729source "drivers/pci/Kconfig" 748source "drivers/pci/Kconfig"