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-rw-r--r--arch/arm/plat-s3c64xx/include/plat/regs-clock.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
index 52836d41e333..a8777a755dfa 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+++ b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
@@ -88,11 +88,11 @@
88#define S3C6400_CLKDIV2_SPI0_SHIFT (0) 88#define S3C6400_CLKDIV2_SPI0_SHIFT (0)
89 89
90/* HCLK GATE Registers */ 90/* HCLK GATE Registers */
91#define S3C_CLKCON_HCLK_BUS (1<<30) 91#define S3C_CLKCON_HCLK_3DSE (1<<31)
92#define S3C_CLKCON_HCLK_SECUR (1<<29) 92#define S3C_CLKCON_HCLK_UHOST (1<<29)
93#define S3C_CLKCON_HCLK_SDMA1 (1<<28) 93#define S3C_CLKCON_HCLK_SECUR (1<<28)
94#define S3C_CLKCON_HCLK_SDMA2 (1<<27) 94#define S3C_CLKCON_HCLK_SDMA1 (1<<27)
95#define S3C_CLKCON_HCLK_UHOST (1<<26) 95#define S3C_CLKCON_HCLK_SDMA0 (1<<26)
96#define S3C_CLKCON_HCLK_IROM (1<<25) 96#define S3C_CLKCON_HCLK_IROM (1<<25)
97#define S3C_CLKCON_HCLK_DDR1 (1<<24) 97#define S3C_CLKCON_HCLK_DDR1 (1<<24)
98#define S3C_CLKCON_HCLK_DDR0 (1<<23) 98#define S3C_CLKCON_HCLK_DDR0 (1<<23)