diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/sysdev/cpm2_common.c | 19 | ||||
-rw-r--r-- | arch/powerpc/sysdev/cpm2_pic.c | 34 | ||||
-rw-r--r-- | arch/powerpc/sysdev/cpm2_pic.h | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/fsl_soc.c | 2 |
4 files changed, 34 insertions, 23 deletions
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c index f7a04892400b..73376f9c1560 100644 --- a/arch/powerpc/sysdev/cpm2_common.c +++ b/arch/powerpc/sysdev/cpm2_common.c | |||
@@ -51,6 +51,7 @@ cpm_cpm2_t *cpmp; /* Pointer to comm processor space */ | |||
51 | * the communication processor devices. | 51 | * the communication processor devices. |
52 | */ | 52 | */ |
53 | cpm2_map_t *cpm2_immr; | 53 | cpm2_map_t *cpm2_immr; |
54 | intctl_cpm2_t *cpm2_intctl; | ||
54 | 55 | ||
55 | #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount | 56 | #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount |
56 | of space for CPM as it is larger | 57 | of space for CPM as it is larger |
@@ -60,6 +61,7 @@ void | |||
60 | cpm2_reset(void) | 61 | cpm2_reset(void) |
61 | { | 62 | { |
62 | cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); | 63 | cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); |
64 | cpm2_intctl = cpm2_map(im_intctl); | ||
63 | 65 | ||
64 | /* Reclaim the DP memory for our use. | 66 | /* Reclaim the DP memory for our use. |
65 | */ | 67 | */ |
@@ -94,13 +96,15 @@ cpm_setbrg(uint brg, uint rate) | |||
94 | /* This is good enough to get SMCs running..... | 96 | /* This is good enough to get SMCs running..... |
95 | */ | 97 | */ |
96 | if (brg < 4) { | 98 | if (brg < 4) { |
97 | bp = (uint *)&cpm2_immr->im_brgc1; | 99 | bp = cpm2_map_size(im_brgc1, 16); |
98 | } else { | 100 | } else { |
99 | bp = (uint *)&cpm2_immr->im_brgc5; | 101 | bp = cpm2_map_size(im_brgc5, 16); |
100 | brg -= 4; | 102 | brg -= 4; |
101 | } | 103 | } |
102 | bp += brg; | 104 | bp += brg; |
103 | *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; | 105 | *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; |
106 | |||
107 | cpm2_unmap(bp); | ||
104 | } | 108 | } |
105 | 109 | ||
106 | /* This function is used to set high speed synchronous baud rate | 110 | /* This function is used to set high speed synchronous baud rate |
@@ -112,16 +116,18 @@ cpm2_fastbrg(uint brg, uint rate, int div16) | |||
112 | volatile uint *bp; | 116 | volatile uint *bp; |
113 | 117 | ||
114 | if (brg < 4) { | 118 | if (brg < 4) { |
115 | bp = (uint *)&cpm2_immr->im_brgc1; | 119 | bp = cpm2_map_size(im_brgc1, 16); |
116 | } | 120 | } |
117 | else { | 121 | else { |
118 | bp = (uint *)&cpm2_immr->im_brgc5; | 122 | bp = cpm2_map_size(im_brgc5, 16); |
119 | brg -= 4; | 123 | brg -= 4; |
120 | } | 124 | } |
121 | bp += brg; | 125 | bp += brg; |
122 | *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; | 126 | *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; |
123 | if (div16) | 127 | if (div16) |
124 | *bp |= CPM_BRG_DIV16; | 128 | *bp |= CPM_BRG_DIV16; |
129 | |||
130 | cpm2_unmap(bp); | ||
125 | } | 131 | } |
126 | 132 | ||
127 | /* | 133 | /* |
@@ -132,11 +138,14 @@ static spinlock_t cpm_dpmem_lock; | |||
132 | * until the memory subsystem goes up... */ | 138 | * until the memory subsystem goes up... */ |
133 | static rh_block_t cpm_boot_dpmem_rh_block[16]; | 139 | static rh_block_t cpm_boot_dpmem_rh_block[16]; |
134 | static rh_info_t cpm_dpmem_info; | 140 | static rh_info_t cpm_dpmem_info; |
141 | static u8* im_dprambase; | ||
135 | 142 | ||
136 | static void cpm2_dpinit(void) | 143 | static void cpm2_dpinit(void) |
137 | { | 144 | { |
138 | spin_lock_init(&cpm_dpmem_lock); | 145 | spin_lock_init(&cpm_dpmem_lock); |
139 | 146 | ||
147 | im_dprambase = ioremap(CPM_MAP_ADDR, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE); | ||
148 | |||
140 | /* initialize the info header */ | 149 | /* initialize the info header */ |
141 | rh_init(&cpm_dpmem_info, 1, | 150 | rh_init(&cpm_dpmem_info, 1, |
142 | sizeof(cpm_boot_dpmem_rh_block) / | 151 | sizeof(cpm_boot_dpmem_rh_block) / |
@@ -205,6 +214,6 @@ EXPORT_SYMBOL(cpm_dpdump); | |||
205 | 214 | ||
206 | void *cpm_dpram_addr(uint offset) | 215 | void *cpm_dpram_addr(uint offset) |
207 | { | 216 | { |
208 | return (void *)&cpm2_immr->im_dprambase[offset]; | 217 | return (void *)(im_dprambase + offset); |
209 | } | 218 | } |
210 | EXPORT_SYMBOL(cpm_dpram_addr); | 219 | EXPORT_SYMBOL(cpm_dpram_addr); |
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index c804475c07d3..51752990f7b9 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c | |||
@@ -78,7 +78,7 @@ static void cpm2_mask_irq(unsigned int irq_nr) | |||
78 | bit = irq_to_siubit[irq_nr]; | 78 | bit = irq_to_siubit[irq_nr]; |
79 | word = irq_to_siureg[irq_nr]; | 79 | word = irq_to_siureg[irq_nr]; |
80 | 80 | ||
81 | simr = &(cpm2_immr->im_intctl.ic_simrh); | 81 | simr = &(cpm2_intctl->ic_simrh); |
82 | ppc_cached_irq_mask[word] &= ~(1 << bit); | 82 | ppc_cached_irq_mask[word] &= ~(1 << bit); |
83 | simr[word] = ppc_cached_irq_mask[word]; | 83 | simr[word] = ppc_cached_irq_mask[word]; |
84 | } | 84 | } |
@@ -93,7 +93,7 @@ static void cpm2_unmask_irq(unsigned int irq_nr) | |||
93 | bit = irq_to_siubit[irq_nr]; | 93 | bit = irq_to_siubit[irq_nr]; |
94 | word = irq_to_siureg[irq_nr]; | 94 | word = irq_to_siureg[irq_nr]; |
95 | 95 | ||
96 | simr = &(cpm2_immr->im_intctl.ic_simrh); | 96 | simr = &(cpm2_intctl->ic_simrh); |
97 | ppc_cached_irq_mask[word] |= 1 << bit; | 97 | ppc_cached_irq_mask[word] |= 1 << bit; |
98 | simr[word] = ppc_cached_irq_mask[word]; | 98 | simr[word] = ppc_cached_irq_mask[word]; |
99 | } | 99 | } |
@@ -108,8 +108,8 @@ static void cpm2_mask_and_ack(unsigned int irq_nr) | |||
108 | bit = irq_to_siubit[irq_nr]; | 108 | bit = irq_to_siubit[irq_nr]; |
109 | word = irq_to_siureg[irq_nr]; | 109 | word = irq_to_siureg[irq_nr]; |
110 | 110 | ||
111 | simr = &(cpm2_immr->im_intctl.ic_simrh); | 111 | simr = &(cpm2_intctl->ic_simrh); |
112 | sipnr = &(cpm2_immr->im_intctl.ic_sipnrh); | 112 | sipnr = &(cpm2_intctl->ic_sipnrh); |
113 | ppc_cached_irq_mask[word] &= ~(1 << bit); | 113 | ppc_cached_irq_mask[word] &= ~(1 << bit); |
114 | simr[word] = ppc_cached_irq_mask[word]; | 114 | simr[word] = ppc_cached_irq_mask[word]; |
115 | sipnr[word] = 1 << bit; | 115 | sipnr[word] = 1 << bit; |
@@ -127,7 +127,7 @@ static void cpm2_end_irq(unsigned int irq_nr) | |||
127 | bit = irq_to_siubit[irq_nr]; | 127 | bit = irq_to_siubit[irq_nr]; |
128 | word = irq_to_siureg[irq_nr]; | 128 | word = irq_to_siureg[irq_nr]; |
129 | 129 | ||
130 | simr = &(cpm2_immr->im_intctl.ic_simrh); | 130 | simr = &(cpm2_intctl->ic_simrh); |
131 | ppc_cached_irq_mask[word] |= 1 << bit; | 131 | ppc_cached_irq_mask[word] |= 1 << bit; |
132 | simr[word] = ppc_cached_irq_mask[word]; | 132 | simr[word] = ppc_cached_irq_mask[word]; |
133 | /* | 133 | /* |
@@ -152,10 +152,10 @@ int cpm2_get_irq(struct pt_regs *regs) | |||
152 | int irq; | 152 | int irq; |
153 | unsigned long bits; | 153 | unsigned long bits; |
154 | 154 | ||
155 | /* For CPM2, read the SIVEC register and shift the bits down | 155 | /* For CPM2, read the SIVEC register and shift the bits down |
156 | * to get the irq number.*/ | 156 | * to get the irq number. */ |
157 | bits = cpm2_immr->im_intctl.ic_sivec; | 157 | bits = cpm2_intctl->ic_sivec; |
158 | irq = bits >> 26; | 158 | irq = bits >> 26; |
159 | 159 | ||
160 | if (irq == 0) | 160 | if (irq == 0) |
161 | return(-1); | 161 | return(-1); |
@@ -223,26 +223,26 @@ void cpm2_pic_init(struct device_node *node) | |||
223 | 223 | ||
224 | /* Mask out everything */ | 224 | /* Mask out everything */ |
225 | 225 | ||
226 | cpm2_immr->im_intctl.ic_simrh = 0x00000000; | 226 | cpm2_intctl->ic_simrh = 0x00000000; |
227 | cpm2_immr->im_intctl.ic_simrl = 0x00000000; | 227 | cpm2_intctl->ic_simrl = 0x00000000; |
228 | 228 | ||
229 | wmb(); | 229 | wmb(); |
230 | 230 | ||
231 | /* Ack everything */ | 231 | /* Ack everything */ |
232 | cpm2_immr->im_intctl.ic_sipnrh = 0xffffffff; | 232 | cpm2_intctl->ic_sipnrh = 0xffffffff; |
233 | cpm2_immr->im_intctl.ic_sipnrl = 0xffffffff; | 233 | cpm2_intctl->ic_sipnrl = 0xffffffff; |
234 | wmb(); | 234 | wmb(); |
235 | 235 | ||
236 | /* Dummy read of the vector */ | 236 | /* Dummy read of the vector */ |
237 | i = cpm2_immr->im_intctl.ic_sivec; | 237 | i = cpm2_intctl->ic_sivec; |
238 | rmb(); | 238 | rmb(); |
239 | 239 | ||
240 | /* Initialize the default interrupt mapping priorities, | 240 | /* Initialize the default interrupt mapping priorities, |
241 | * in case the boot rom changed something on us. | 241 | * in case the boot rom changed something on us. |
242 | */ | 242 | */ |
243 | cpm2_immr->im_intctl.ic_sicr = 0; | 243 | cpm2_intctl->ic_sicr = 0; |
244 | cpm2_immr->im_intctl.ic_scprrh = 0x05309770; | 244 | cpm2_intctl->ic_scprrh = 0x05309770; |
245 | cpm2_immr->im_intctl.ic_scprrl = 0x05309770; | 245 | cpm2_intctl->ic_scprrl = 0x05309770; |
246 | 246 | ||
247 | /* create a legacy host */ | 247 | /* create a legacy host */ |
248 | if (node) | 248 | if (node) |
diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h index 436cca77db64..d63e45d4df58 100644 --- a/arch/powerpc/sysdev/cpm2_pic.h +++ b/arch/powerpc/sysdev/cpm2_pic.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef _PPC_KERNEL_CPM2_H | 1 | #ifndef _PPC_KERNEL_CPM2_H |
2 | #define _PPC_KERNEL_CPM2_H | 2 | #define _PPC_KERNEL_CPM2_H |
3 | 3 | ||
4 | extern intctl_cpm2_t *cpm2_intctl; | ||
5 | |||
4 | extern int cpm2_get_irq(struct pt_regs *regs); | 6 | extern int cpm2_get_irq(struct pt_regs *regs); |
5 | 7 | ||
6 | extern void cpm2_pic_init(struct device_node*); | 8 | extern void cpm2_pic_init(struct device_node*); |
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 0ed2aaee105c..0b8a03cc3042 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -633,7 +633,7 @@ static int __init fs_enet_of_init(void) | |||
633 | if (strstr(model, "FCC")) { | 633 | if (strstr(model, "FCC")) { |
634 | int fcc_index = fs_get_fcc_index(*id); | 634 | int fcc_index = fs_get_fcc_index(*id); |
635 | 635 | ||
636 | fs_enet_data.dpram_offset = (u32)cpm2_immr->im_dprambase; | 636 | fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0); |
637 | fs_enet_data.rx_ring = 32; | 637 | fs_enet_data.rx_ring = 32; |
638 | fs_enet_data.tx_ring = 32; | 638 | fs_enet_data.tx_ring = 32; |
639 | fs_enet_data.rx_copybreak = 240; | 639 | fs_enet_data.rx_copybreak = 240; |