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-rw-r--r--arch/alpha/include/asm/fcntl.h19
-rw-r--r--arch/alpha/kernel/osf_sys.c19
-rw-r--r--arch/alpha/mm/numa.c2
-rw-r--r--arch/arm/common/scoop.c2
-rw-r--r--arch/arm/configs/da830_omapl137_defconfig1254
-rw-r--r--arch/arm/configs/da8xx_omapl_defconfig (renamed from arch/arm/configs/da850_omapl138_defconfig)257
-rw-r--r--arch/arm/configs/davinci_all_defconfig126
-rw-r--r--arch/arm/configs/omap_3430sdp_defconfig28
-rw-r--r--arch/arm/include/asm/mman.h3
-rw-r--r--arch/arm/kernel/calls.S2
-rw-r--r--arch/arm/kernel/entry-common.S4
-rw-r--r--arch/arm/kernel/sys_arm.c55
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c51
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c10
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c12
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c12
-rw-r--r--arch/arm/mach-at91/include/mach/board.h7
-rw-r--r--arch/arm/mach-bcmring/include/csp/reg.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/mm_addr.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/dma.h2
-rw-r--r--arch/arm/mach-davinci/Kconfig59
-rw-r--r--arch/arm/mach-davinci/Makefile5
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c466
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c437
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c16
-rw-r--r--arch/arm/mach-davinci/board-dm355-leopard.c13
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c57
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c15
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c86
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c323
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c20
-rw-r--r--arch/arm/mach-davinci/clock.c231
-rw-r--r--arch/arm/mach-davinci/clock.h17
-rw-r--r--arch/arm/mach-davinci/common.c4
-rw-r--r--arch/arm/mach-davinci/cp_intc.c3
-rw-r--r--arch/arm/mach-davinci/cpufreq.c226
-rw-r--r--arch/arm/mach-davinci/cpuidle.c197
-rw-r--r--arch/arm/mach-davinci/da830.c75
-rw-r--r--arch/arm/mach-davinci/da850.c298
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c106
-rw-r--r--arch/arm/mach-davinci/devices.c6
-rw-r--r--arch/arm/mach-davinci/dm355.c2
-rw-r--r--arch/arm/mach-davinci/dm365.c107
-rw-r--r--arch/arm/mach-davinci/dm644x.c7
-rw-r--r--arch/arm/mach-davinci/dm646x.c11
-rw-r--r--arch/arm/mach-davinci/dma.c105
-rw-r--r--arch/arm/mach-davinci/gpio.c9
-rw-r--r--arch/arm/mach-davinci/include/mach/asp.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h6
-rw-r--r--arch/arm/mach-davinci/include/mach/cpufreq.h26
-rw-r--r--arch/arm/mach-davinci/include/mach/cpuidle.h17
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h26
-rw-r--r--arch/arm/mach-davinci/include/mach/dm365.h10
-rw-r--r--arch/arm/mach-davinci/include/mach/dm644x.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/keyscan.h41
-rw-r--r--arch/arm/mach-davinci/include/mach/mux.h20
-rw-r--r--arch/arm/mach-davinci/include/mach/system.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/usb.h59
-rw-r--r--arch/arm/mach-davinci/mux.c1
-rw-r--r--arch/arm/mach-davinci/psc.c3
-rw-r--r--arch/arm/mach-davinci/serial.c6
-rw-r--r--arch/arm/mach-davinci/sram.c3
-rw-r--r--arch/arm/mach-davinci/time.c6
-rw-r--r--arch/arm/mach-davinci/usb.c84
-rw-r--r--arch/arm/mach-lh7a40x/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c2
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c167
-rw-r--r--arch/arm/mach-omap2/clock24xx.c8
-rw-r--r--arch/arm/mach-omap2/clock34xx.c14
-rw-r--r--arch/arm/mach-omap2/io.c4
-rw-r--r--arch/arm/mach-omap2/sdrc.c16
-rw-r--r--arch/arm/mach-orion5x/pci.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmld.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmt5.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtc.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmte2.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmz72.h2
-rw-r--r--arch/arm/mach-s3c2400/Kconfig6
-rw-r--r--arch/arm/mach-s3c2410/Kconfig2
-rw-r--r--arch/arm/mach-s3c2412/Kconfig4
-rw-r--r--arch/arm/mach-s3c2440/Kconfig3
-rw-r--r--arch/arm/mach-s3c2442/Kconfig4
-rw-r--r--arch/arm/mach-s3c2443/Kconfig2
-rw-r--r--arch/arm/mach-s3c6400/Kconfig2
-rw-r--r--arch/arm/mach-s3c6400/setup-sdhci.c2
-rw-r--r--arch/arm/mach-s3c6410/Kconfig2
-rw-r--r--arch/arm/mach-s3c6410/setup-sdhci.c2
-rw-r--r--arch/arm/mach-s5pc100/Kconfig2
-rw-r--r--arch/arm/mach-sa1100/dma.c2
-rw-r--r--arch/arm/mach-u300/include/mach/u300-regs.h2
-rw-r--r--arch/arm/mm/mmap.c3
-rw-r--r--arch/arm/plat-mxc/Makefile1
-rw-r--r--arch/arm/plat-mxc/ehci.c92
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx3.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mxc91231.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_ehci.h37
-rw-r--r--arch/arm/plat-mxc/pwm.c2
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/fb.c49
-rw-r--r--arch/arm/plat-omap/include/plat/display.h575
-rw-r--r--arch/arm/plat-omap/include/plat/omap16xx.h2
-rw-r--r--arch/arm/plat-omap/include/plat/omapfb.h398
-rw-r--r--arch/arm/plat-omap/include/plat/sdrc.h9
-rw-r--r--arch/arm/plat-omap/include/plat/vram.h62
-rw-r--r--arch/arm/plat-omap/include/plat/vrfb.h50
-rw-r--r--arch/arm/plat-omap/sram.c8
-rw-r--r--arch/arm/plat-s3c/Kconfig2
-rw-r--r--arch/arm/plat-s3c/pwm.c2
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig2
-rw-r--r--arch/arm/plat-s3c24xx/adc.c2
-rw-r--r--arch/arm/plat-s3c24xx/dma.c6
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/map.h2
-rw-r--r--arch/arm/plat-s3c24xx/irq.c2
-rw-r--r--arch/arm/plat-s3c64xx/Kconfig2
-rw-r--r--arch/arm/plat-s5pc1xx/Kconfig2
-rw-r--r--arch/avr32/boards/hammerhead/Kconfig2
-rw-r--r--arch/avr32/include/asm/syscalls.h4
-rw-r--r--arch/avr32/kernel/sys_avr32.c31
-rw-r--r--arch/avr32/kernel/syscall-stubs.S2
-rw-r--r--arch/blackfin/include/asm/fcntl.h2
-rw-r--r--arch/blackfin/kernel/process.c6
-rw-r--r--arch/blackfin/kernel/sys_bfin.c33
-rw-r--r--arch/blackfin/kernel/traps.c2
-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF51x_base.h4
-rw-r--r--arch/blackfin/mach-bf527/include/mach/defBF52x_base.h4
-rw-r--r--arch/blackfin/mach-bf537/include/mach/defBF534.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF544.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF547.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF548.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF549.h4
-rw-r--r--arch/blackfin/mach-common/entry.S2
-rw-r--r--arch/cris/arch-v10/mm/fault.c3
-rw-r--r--arch/cris/arch-v10/mm/tlb.c22
-rw-r--r--arch/cris/kernel/sys_cris.c30
-rw-r--r--arch/cris/mm/fault.c2
-rw-r--r--arch/frv/kernel/process.c5
-rw-r--r--arch/frv/kernel/sys_frv.c66
-rw-r--r--arch/h8300/kernel/process.c5
-rw-r--r--arch/h8300/kernel/sys_h8300.c83
-rw-r--r--arch/h8300/kernel/syscalls.S2
-rw-r--r--arch/ia64/hp/common/sba_iommu.c2
-rw-r--r--arch/ia64/ia32/ia32_entry.S2
-rw-r--r--arch/ia64/ia32/sys_ia32.c3
-rw-r--r--arch/ia64/include/asm/perfmon_default_smpl.h2
-rw-r--r--arch/ia64/include/asm/sn/shubio.h2
-rw-r--r--arch/ia64/include/asm/unistd.h2
-rw-r--r--arch/ia64/include/asm/xen/hypervisor.h28
-rw-r--r--arch/ia64/kernel/esi.c2
-rw-r--r--arch/ia64/kernel/perfmon.c2
-rw-r--r--arch/ia64/kernel/sys_ia64.c83
-rw-r--r--arch/ia64/kernel/time.c4
-rw-r--r--arch/ia64/pci/pci.c33
-rw-r--r--arch/ia64/sn/kernel/io_acpi_init.c2
-rw-r--r--arch/m32r/kernel/sys_m32r.c24
-rw-r--r--arch/m32r/kernel/syscall_table.S2
-rw-r--r--arch/m68k/ifpsp060/src/fpsp.S28
-rw-r--r--arch/m68k/ifpsp060/src/pfpsp.S26
-rw-r--r--arch/m68k/include/asm/bootinfo.h2
-rw-r--r--arch/m68k/include/asm/processor.h2
-rw-r--r--arch/m68k/include/asm/ptrace.h2
-rw-r--r--arch/m68k/include/asm/thread_info_no.h4
-rw-r--r--arch/m68k/kernel/sys_m68k.c83
-rw-r--r--arch/m68knommu/Kconfig7
-rw-r--r--arch/m68knommu/kernel/process.c5
-rw-r--r--arch/m68knommu/kernel/setup.c92
-rw-r--r--arch/m68knommu/kernel/sys_m68k.c38
-rw-r--r--arch/m68knommu/kernel/syscalltable.S2
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S47
-rw-r--r--arch/m68knommu/platform/523x/gpio.c5
-rw-r--r--arch/m68knommu/platform/527x/gpio.c6
-rw-r--r--arch/m68knommu/platform/528x/gpio.c2
-rw-r--r--arch/m68knommu/platform/coldfire/clk.c7
-rw-r--r--arch/m68knommu/platform/coldfire/head.S10
-rw-r--r--arch/microblaze/kernel/sys_microblaze.c38
-rw-r--r--arch/microblaze/kernel/syscall_table.S2
-rw-r--r--arch/microblaze/lib/memcpy.c2
-rw-r--r--arch/microblaze/lib/memmove.c2
-rw-r--r--arch/microblaze/lib/memset.c2
-rw-r--r--arch/mips/include/asm/fcntl.h17
-rw-r--r--arch/mips/include/asm/mach-pnx833x/gpio.h2
-rw-r--r--arch/mips/include/asm/sgi/ioc.h2
-rw-r--r--arch/mips/include/asm/sibyte/sb1250_mac.h2
-rw-r--r--arch/mips/include/asm/sn/sn0/hubio.h2
-rw-r--r--arch/mips/include/asm/time.h14
-rw-r--r--arch/mips/kernel/kspd.c1
-rw-r--r--arch/mips/kernel/linux32.c19
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/kernel/syscall.c32
-rw-r--r--arch/mips/kernel/time.c33
-rw-r--r--arch/mips/loongson/common/mem.c2
-rw-r--r--arch/mips/math-emu/dp_sub.c2
-rw-r--r--arch/mips/mm/cache.c2
-rw-r--r--arch/mips/txx9/generic/smsc_fdc37m81x.c2
-rw-r--r--arch/mn10300/include/asm/mman.h5
-rw-r--r--arch/mn10300/kernel/entry.S2
-rw-r--r--arch/mn10300/kernel/process.c12
-rw-r--r--arch/mn10300/kernel/sys_mn10300.c36
-rw-r--r--arch/parisc/include/asm/fcntl.h5
-rw-r--r--arch/parisc/kernel/perf.c2
-rw-r--r--arch/parisc/kernel/sys_parisc.c30
-rw-r--r--arch/powerpc/include/asm/reg_fsl_emb.h2
-rw-r--r--arch/powerpc/kernel/kgdb.c2
-rw-r--r--arch/powerpc/kernel/syscalls.c15
-rw-r--r--arch/powerpc/kernel/tau_6xx.c2
-rw-r--r--arch/powerpc/kernel/time.c7
-rw-r--r--arch/powerpc/kernel/vdso.c2
-rw-r--r--arch/powerpc/oprofile/op_model_cell.c6
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pci.c2
-rw-r--r--arch/powerpc/platforms/powermac/pci.c2
-rw-r--r--arch/powerpc/sysdev/dart_iommu.c2
-rw-r--r--arch/s390/Kconfig15
-rw-r--r--arch/s390/crypto/prng.c2
-rw-r--r--arch/s390/defconfig1
-rw-r--r--arch/s390/include/asm/atomic.h8
-rw-r--r--arch/s390/include/asm/ccwdev.h4
-rw-r--r--arch/s390/include/asm/cputime.h8
-rw-r--r--arch/s390/include/asm/mmu_context.h4
-rw-r--r--arch/s390/include/asm/pgalloc.h3
-rw-r--r--arch/s390/include/asm/pgtable.h4
-rw-r--r--arch/s390/include/asm/setup.h17
-rw-r--r--arch/s390/include/asm/smp.h54
-rw-r--r--arch/s390/include/asm/sockios.h21
-rw-r--r--arch/s390/include/asm/termbits.h206
-rw-r--r--arch/s390/include/asm/todclk.h23
-rw-r--r--arch/s390/include/asm/uaccess.h2
-rw-r--r--arch/s390/kernel/Makefile1
-rw-r--r--arch/s390/kernel/compat_linux.c43
-rw-r--r--arch/s390/kernel/compat_linux.h4
-rw-r--r--arch/s390/kernel/head64.S3
-rw-r--r--arch/s390/kernel/s390_ext.c2
-rw-r--r--arch/s390/kernel/setup.c36
-rw-r--r--arch/s390/kernel/sys_s390.c30
-rw-r--r--arch/s390/kernel/time.c7
-rw-r--r--arch/s390/kernel/vdso.c9
-rw-r--r--arch/s390/kernel/vtime.c2
-rw-r--r--arch/s390/kvm/Kconfig1
-rw-r--r--arch/s390/lib/uaccess_mvcos.c4
-rw-r--r--arch/s390/lib/uaccess_pt.c147
-rw-r--r--arch/s390/math-emu/math.c4
-rw-r--r--arch/s390/mm/cmm.c61
-rw-r--r--arch/s390/mm/fault.c378
-rw-r--r--arch/s390/mm/pgtable.c2
-rw-r--r--arch/s390/mm/vmem.c11
-rw-r--r--arch/score/kernel/sys_score.c28
-rw-r--r--arch/sh/Kconfig29
-rw-r--r--arch/sh/Makefile4
-rw-r--r--arch/sh/boards/Makefile1
-rw-r--r--arch/sh/boards/mach-ap325rxa/Makefile2
-rw-r--r--arch/sh/boards/mach-ap325rxa/sdram.S69
-rw-r--r--arch/sh/boards/mach-ap325rxa/setup.c (renamed from arch/sh/boards/board-ap325rxa.c)97
-rw-r--r--arch/sh/boards/mach-ecovec24/Makefile2
-rw-r--r--arch/sh/boards/mach-ecovec24/sdram.S52
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c197
-rw-r--r--arch/sh/boards/mach-highlander/setup.c2
-rw-r--r--arch/sh/boards/mach-kfr2r09/Makefile2
-rw-r--r--arch/sh/boards/mach-kfr2r09/sdram.S80
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c238
-rw-r--r--arch/sh/boards/mach-migor/Makefile2
-rw-r--r--arch/sh/boards/mach-migor/sdram.S69
-rw-r--r--arch/sh/boards/mach-migor/setup.c65
-rw-r--r--arch/sh/boards/mach-r2d/irq.c2
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c32
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c17
-rw-r--r--arch/sh/boards/mach-se/7724/Makefile2
-rw-r--r--arch/sh/boards/mach-se/7724/sdram.S52
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c96
-rw-r--r--arch/sh/boot/compressed/misc.c2
-rw-r--r--arch/sh/boot/romimage/Makefile12
-rw-r--r--arch/sh/boot/romimage/head.S38
-rw-r--r--arch/sh/drivers/dma/dma-sysfs.c2
-rw-r--r--arch/sh/drivers/pci/Kconfig19
-rw-r--r--arch/sh/include/asm/addrspace.h9
-rw-r--r--arch/sh/include/asm/atomic.h9
-rw-r--r--arch/sh/include/asm/bitops.h4
-rw-r--r--arch/sh/include/asm/bugs.h4
-rw-r--r--arch/sh/include/asm/dma-mapping.h233
-rw-r--r--arch/sh/include/asm/dwarf.h28
-rw-r--r--arch/sh/include/asm/fixmap.h12
-rw-r--r--arch/sh/include/asm/fpu.h26
-rw-r--r--arch/sh/include/asm/ftrace.h17
-rw-r--r--arch/sh/include/asm/gpio.h82
-rw-r--r--arch/sh/include/asm/hardirq.h13
-rw-r--r--arch/sh/include/asm/io.h16
-rw-r--r--arch/sh/include/asm/irqflags.h31
-rw-r--r--arch/sh/include/asm/irqflags_32.h99
-rw-r--r--arch/sh/include/asm/irqflags_64.h85
-rw-r--r--arch/sh/include/asm/mmu.h13
-rw-r--r--arch/sh/include/asm/pci.h30
-rw-r--r--arch/sh/include/asm/perf_event.h31
-rw-r--r--arch/sh/include/asm/pgtable.h26
-rw-r--r--arch/sh/include/asm/pgtable_32.h2
-rw-r--r--arch/sh/include/asm/processor_32.h3
-rw-r--r--arch/sh/include/asm/scatterlist.h2
-rw-r--r--arch/sh/include/asm/sh_keysc.h14
-rw-r--r--arch/sh/include/asm/suspend.h65
-rw-r--r--arch/sh/include/asm/system.h4
-rw-r--r--arch/sh/include/asm/system_32.h29
-rw-r--r--arch/sh/include/asm/system_64.h26
-rw-r--r--arch/sh/include/asm/thread_info.h30
-rw-r--r--arch/sh/include/asm/topology.h8
-rw-r--r--arch/sh/include/asm/ubc.h11
-rw-r--r--arch/sh/include/asm/watchdog.h59
-rw-r--r--arch/sh/include/cpu-sh4/cpu/watchdog.h13
-rw-r--r--arch/sh/include/mach-common/mach/titan.h2
-rw-r--r--arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt3
-rw-r--r--arch/sh/include/mach-se/mach/se7722.h11
-rw-r--r--arch/sh/kernel/Makefile10
-rw-r--r--arch/sh/kernel/asm-offsets.c23
-rw-r--r--arch/sh/kernel/cpu/Makefile1
-rw-r--r--arch/sh/kernel/cpu/init.c28
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c27
-rw-r--r--arch/sh/kernel/cpu/sh3/entry.S33
-rw-r--r--arch/sh/kernel/cpu/sh4/Makefile8
-rw-r--r--arch/sh/kernel/cpu/sh4/fpu.c28
-rw-r--r--arch/sh/kernel/cpu/sh4/perf_event.c253
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile1
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/perf_event.c269
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c264
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c45
-rw-r--r--arch/sh/kernel/cpu/sh4a/smp-shx3.c37
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S2
-rw-r--r--arch/sh/kernel/cpu/shmobile/cpuidle.c42
-rw-r--r--arch/sh/kernel/cpu/shmobile/pm.c117
-rw-r--r--arch/sh/kernel/cpu/shmobile/pm_runtime.c17
-rw-r--r--arch/sh/kernel/cpu/shmobile/sleep.S344
-rw-r--r--arch/sh/kernel/cpu/ubc.S59
-rw-r--r--arch/sh/kernel/dma-nommu.c82
-rw-r--r--arch/sh/kernel/dwarf.c222
-rw-r--r--arch/sh/kernel/entry-common.S2
-rw-r--r--arch/sh/kernel/ftrace.c146
-rw-r--r--arch/sh/kernel/gpio.c584
-rw-r--r--arch/sh/kernel/head_32.S2
-rw-r--r--arch/sh/kernel/idle.c78
-rw-r--r--arch/sh/kernel/io_generic.c4
-rw-r--r--arch/sh/kernel/irq.c14
-rw-r--r--arch/sh/kernel/irq_32.c57
-rw-r--r--arch/sh/kernel/irq_64.c51
-rw-r--r--arch/sh/kernel/machine_kexec.c6
-rw-r--r--arch/sh/kernel/machvec.c4
-rw-r--r--arch/sh/kernel/module.c9
-rw-r--r--arch/sh/kernel/perf_callchain.c98
-rw-r--r--arch/sh/kernel/perf_event.c312
-rw-r--r--arch/sh/kernel/process_32.c42
-rw-r--r--arch/sh/kernel/process_64.c2
-rw-r--r--arch/sh/kernel/return_address.c54
-rw-r--r--arch/sh/kernel/setup.c4
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c67
-rw-r--r--arch/sh/kernel/sh_ksyms_64.c10
-rw-r--r--arch/sh/kernel/signal_32.c24
-rw-r--r--arch/sh/kernel/signal_64.c13
-rw-r--r--arch/sh/kernel/smp.c4
-rw-r--r--arch/sh/kernel/sys_sh.c28
-rw-r--r--arch/sh/kernel/topology.c26
-rw-r--r--arch/sh/kernel/traps.c8
-rw-r--r--arch/sh/kernel/traps_32.c82
-rw-r--r--arch/sh/lib/Makefile7
-rw-r--r--arch/sh/lib/memset-sh4.S107
-rw-r--r--arch/sh/math-emu/math.c6
-rw-r--r--arch/sh/mm/Kconfig19
-rw-r--r--arch/sh/mm/Makefile3
-rw-r--r--arch/sh/mm/cache-sh4.c501
-rw-r--r--arch/sh/mm/cache-sh5.c2
-rw-r--r--arch/sh/mm/cache-sh7705.c2
-rw-r--r--arch/sh/mm/cache.c18
-rw-r--r--arch/sh/mm/consistent.c28
-rw-r--r--arch/sh/mm/init.c19
-rw-r--r--arch/sh/mm/kmap.c4
-rw-r--r--arch/sh/mm/mmap.c3
-rw-r--r--arch/sh/mm/numa.c2
-rw-r--r--arch/sh/mm/pmb-fixed.c45
-rw-r--r--arch/sh/mm/pmb.c268
-rw-r--r--arch/sh/oprofile/Makefile4
-rw-r--r--arch/sh/oprofile/common.c38
-rw-r--r--arch/sh/oprofile/op_impl.h2
-rw-r--r--arch/sh/oprofile/op_model_sh7750.c255
-rw-r--r--arch/sparc/include/asm/fcntl.h19
-rw-r--r--arch/sparc/include/asm/pci_64.h2
-rw-r--r--arch/sparc/kernel/pci.c7
-rw-r--r--arch/sparc/kernel/sys_sparc32.c22
-rw-r--r--arch/sparc/kernel/sys_sparc_32.c64
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c50
-rw-r--r--arch/sparc/kernel/systbls.h1
-rw-r--r--arch/sparc/kernel/systbls_32.S4
-rw-r--r--arch/sparc/kernel/systbls_64.S6
-rw-r--r--arch/sparc/kernel/time_64.c2
-rw-r--r--arch/um/drivers/mmapper_kern.c11
-rw-r--r--arch/um/drivers/random.c3
-rw-r--r--arch/um/kernel/syscall.c28
-rw-r--r--arch/um/sys-i386/shared/sysdep/syscalls.h4
-rw-r--r--arch/x86/Kconfig9
-rw-r--r--arch/x86/Kconfig.cpu14
-rw-r--r--arch/x86/Makefile_32.cpu7
-rw-r--r--arch/x86/boot/compressed/head_64.S3
-rw-r--r--arch/x86/boot/compressed/vmlinux.lds.S3
-rw-r--r--arch/x86/boot/video.c6
-rw-r--r--arch/x86/crypto/Makefile3
-rw-r--r--arch/x86/crypto/aesni-intel_asm.S517
-rw-r--r--arch/x86/crypto/ghash-clmulni-intel_asm.S157
-rw-r--r--arch/x86/crypto/ghash-clmulni-intel_glue.c333
-rw-r--r--arch/x86/ia32/ia32entry.S2
-rw-r--r--arch/x86/ia32/sys_ia32.c43
-rw-r--r--arch/x86/include/asm/acpi.h3
-rw-r--r--arch/x86/include/asm/cache.h7
-rw-r--r--arch/x86/include/asm/cacheflush.h1
-rw-r--r--arch/x86/include/asm/cpufeature.h1
-rw-r--r--arch/x86/include/asm/desc_defs.h4
-rw-r--r--arch/x86/include/asm/e820.h23
-rw-r--r--arch/x86/include/asm/elf.h20
-rw-r--r--arch/x86/include/asm/entry_arch.h2
-rw-r--r--arch/x86/include/asm/hardirq.h2
-rw-r--r--arch/x86/include/asm/hpet.h7
-rw-r--r--arch/x86/include/asm/hw_irq.h4
-rw-r--r--arch/x86/include/asm/i387.h7
-rw-r--r--arch/x86/include/asm/inst.h150
-rw-r--r--arch/x86/include/asm/irq.h2
-rw-r--r--arch/x86/include/asm/irq_vectors.h2
-rw-r--r--arch/x86/include/asm/k8.h5
-rw-r--r--arch/x86/include/asm/microcode.h2
-rw-r--r--arch/x86/include/asm/mmzone_32.h2
-rw-r--r--arch/x86/include/asm/mpspec.h11
-rw-r--r--arch/x86/include/asm/page_types.h3
-rw-r--r--arch/x86/include/asm/pci_x86.h20
-rw-r--r--arch/x86/include/asm/pgtable.h6
-rw-r--r--arch/x86/include/asm/proto.h17
-rw-r--r--arch/x86/include/asm/sections.h6
-rw-r--r--arch/x86/include/asm/sigcontext.h4
-rw-r--r--arch/x86/include/asm/sys_ia32.h3
-rw-r--r--arch/x86/include/asm/syscalls.h2
-rw-r--r--arch/x86/include/asm/uv/uv_bau.h2
-rw-r--r--arch/x86/include/asm/x86_init.h4
-rw-r--r--arch/x86/include/asm/xen/hypervisor.h27
-rw-r--r--arch/x86/kernel/acpi/boot.c3
-rw-r--r--arch/x86/kernel/acpi/sleep.c24
-rw-r--r--arch/x86/kernel/amd_iommu.c4
-rw-r--r--arch/x86/kernel/amd_iommu_init.c3
-rw-r--r--arch/x86/kernel/apic/apic.c2
-rw-r--r--arch/x86/kernel/apic/io_apic.c49
-rw-r--r--arch/x86/kernel/apic/numaq_32.c5
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c19
-rw-r--r--arch/x86/kernel/cpu/common.c2
-rw-r--r--arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c17
-rw-r--r--arch/x86/kernel/cpu/cpufreq/longhaul.c2
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k6.c2
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k7.c19
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k8.c32
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-ich.c2
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-lib.c6
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-lib.h24
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-smi.c2
-rw-r--r--arch/x86/kernel/cpu/intel.c6
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c5
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c6
-rw-r--r--arch/x86/kernel/cpu/mtrr/cleanup.c51
-rw-r--r--arch/x86/kernel/cpu/perf_event.c2
-rw-r--r--arch/x86/kernel/entry_64.S4
-rw-r--r--arch/x86/kernel/ftrace.c17
-rw-r--r--arch/x86/kernel/head_32.S18
-rw-r--r--arch/x86/kernel/head_64.S3
-rw-r--r--arch/x86/kernel/hpet.c77
-rw-r--r--arch/x86/kernel/irq.c20
-rw-r--r--arch/x86/kernel/irqinit.c4
-rw-r--r--arch/x86/kernel/kgdb.c14
-rw-r--r--arch/x86/kernel/kprobes.c4
-rw-r--r--arch/x86/kernel/machine_kexec_32.c6
-rw-r--r--arch/x86/kernel/microcode_amd.c87
-rw-r--r--arch/x86/kernel/microcode_core.c8
-rw-r--r--arch/x86/kernel/mpparse.c44
-rw-r--r--arch/x86/kernel/process_64.c32
-rw-r--r--arch/x86/kernel/quirks.c9
-rw-r--r--arch/x86/kernel/reboot_fixups_32.c1
-rw-r--r--arch/x86/kernel/setup.c106
-rw-r--r--arch/x86/kernel/smpboot.c4
-rw-r--r--arch/x86/kernel/sys_i386_32.c27
-rw-r--r--arch/x86/kernel/sys_x86_64.c17
-rw-r--r--arch/x86/kernel/syscall_table_32.S2
-rw-r--r--arch/x86/kernel/tlb_uv.c4
-rw-r--r--arch/x86/kernel/uv_time.c80
-rw-r--r--arch/x86/kernel/visws_quirks.c2
-rw-r--r--arch/x86/kernel/vmiclock_32.c2
-rw-r--r--arch/x86/kernel/vmlinux.lds.S38
-rw-r--r--arch/x86/kernel/vsyscall_64.c5
-rw-r--r--arch/x86/kernel/x86_init.c2
-rw-r--r--arch/x86/mm/init.c4
-rw-r--r--arch/x86/mm/init_32.c10
-rw-r--r--arch/x86/mm/init_64.c35
-rw-r--r--arch/x86/mm/ioremap.c26
-rw-r--r--arch/x86/mm/k8topology_64.c101
-rw-r--r--arch/x86/mm/kmmio.c4
-rw-r--r--arch/x86/mm/numa_32.c4
-rw-r--r--arch/x86/mm/numa_64.c252
-rw-r--r--arch/x86/mm/pageattr.c22
-rw-r--r--arch/x86/mm/pat.c23
-rw-r--r--arch/x86/mm/setup_nx.c59
-rw-r--r--arch/x86/mm/srat_64.c29
-rw-r--r--arch/x86/mm/tlb.c3
-rw-r--r--arch/x86/pci/Makefile5
-rw-r--r--arch/x86/pci/acpi.c74
-rw-r--r--arch/x86/pci/amd_bus.c120
-rw-r--r--arch/x86/pci/bus_numa.c101
-rw-r--r--arch/x86/pci/bus_numa.h27
-rw-r--r--arch/x86/pci/common.c20
-rw-r--r--arch/x86/pci/early.c7
-rw-r--r--arch/x86/pci/i386.c42
-rw-r--r--arch/x86/pci/intel_bus.c90
-rw-r--r--arch/x86/pci/mmconfig-shared.c356
-rw-r--r--arch/x86/pci/mmconfig_32.c16
-rw-r--r--arch/x86/pci/mmconfig_64.c88
-rw-r--r--arch/x86/xen/enlighten.c37
-rw-r--r--arch/x86/xen/mmu.c2
-rw-r--r--arch/x86/xen/smp.c3
-rw-r--r--arch/x86/xen/suspend.c17
-rw-r--r--arch/x86/xen/time.c7
-rw-r--r--arch/x86/xen/xen-asm_64.S4
-rw-r--r--arch/x86/xen/xen-ops.h2
-rw-r--r--arch/xtensa/include/asm/syscall.h2
-rw-r--r--arch/xtensa/include/asm/unistd.h2
-rw-r--r--arch/xtensa/kernel/syscall.c25
-rw-r--r--arch/xtensa/platforms/iss/console.c2
522 files changed, 11872 insertions, 8571 deletions
diff --git a/arch/alpha/include/asm/fcntl.h b/arch/alpha/include/asm/fcntl.h
index 25da0017ec87..21b1117a0c61 100644
--- a/arch/alpha/include/asm/fcntl.h
+++ b/arch/alpha/include/asm/fcntl.h
@@ -1,8 +1,6 @@
1#ifndef _ALPHA_FCNTL_H 1#ifndef _ALPHA_FCNTL_H
2#define _ALPHA_FCNTL_H 2#define _ALPHA_FCNTL_H
3 3
4/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
5 located on an ext2 file system */
6#define O_CREAT 01000 /* not fcntl */ 4#define O_CREAT 01000 /* not fcntl */
7#define O_TRUNC 02000 /* not fcntl */ 5#define O_TRUNC 02000 /* not fcntl */
8#define O_EXCL 04000 /* not fcntl */ 6#define O_EXCL 04000 /* not fcntl */
@@ -10,13 +8,28 @@
10 8
11#define O_NONBLOCK 00004 9#define O_NONBLOCK 00004
12#define O_APPEND 00010 10#define O_APPEND 00010
13#define O_SYNC 040000 11#define O_DSYNC 040000 /* used to be O_SYNC, see below */
14#define O_DIRECTORY 0100000 /* must be a directory */ 12#define O_DIRECTORY 0100000 /* must be a directory */
15#define O_NOFOLLOW 0200000 /* don't follow links */ 13#define O_NOFOLLOW 0200000 /* don't follow links */
16#define O_LARGEFILE 0400000 /* will be set by the kernel on every open */ 14#define O_LARGEFILE 0400000 /* will be set by the kernel on every open */
17#define O_DIRECT 02000000 /* direct disk access - should check with OSF/1 */ 15#define O_DIRECT 02000000 /* direct disk access - should check with OSF/1 */
18#define O_NOATIME 04000000 16#define O_NOATIME 04000000
19#define O_CLOEXEC 010000000 /* set close_on_exec */ 17#define O_CLOEXEC 010000000 /* set close_on_exec */
18/*
19 * Before Linux 2.6.32 only O_DSYNC semantics were implemented, but using
20 * the O_SYNC flag. We continue to use the existing numerical value
21 * for O_DSYNC semantics now, but using the correct symbolic name for it.
22 * This new value is used to request true Posix O_SYNC semantics. It is
23 * defined in this strange way to make sure applications compiled against
24 * new headers get at least O_DSYNC semantics on older kernels.
25 *
26 * This has the nice side-effect that we can simply test for O_DSYNC
27 * wherever we do not care if O_DSYNC or O_SYNC is used.
28 *
29 * Note: __O_SYNC must never be used directly.
30 */
31#define __O_SYNC 020000000
32#define O_SYNC (__O_SYNC|O_DSYNC)
20 33
21#define F_GETLK 7 34#define F_GETLK 7
22#define F_SETLK 8 35#define F_SETLK 8
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 9a3334ae282e..62619f25132f 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -178,25 +178,18 @@ SYSCALL_DEFINE6(osf_mmap, unsigned long, addr, unsigned long, len,
178 unsigned long, prot, unsigned long, flags, unsigned long, fd, 178 unsigned long, prot, unsigned long, flags, unsigned long, fd,
179 unsigned long, off) 179 unsigned long, off)
180{ 180{
181 struct file *file = NULL; 181 unsigned long ret = -EINVAL;
182 unsigned long ret = -EBADF;
183 182
184#if 0 183#if 0
185 if (flags & (_MAP_HASSEMAPHORE | _MAP_INHERIT | _MAP_UNALIGNED)) 184 if (flags & (_MAP_HASSEMAPHORE | _MAP_INHERIT | _MAP_UNALIGNED))
186 printk("%s: unimplemented OSF mmap flags %04lx\n", 185 printk("%s: unimplemented OSF mmap flags %04lx\n",
187 current->comm, flags); 186 current->comm, flags);
188#endif 187#endif
189 if (!(flags & MAP_ANONYMOUS)) { 188 if ((off + PAGE_ALIGN(len)) < off)
190 file = fget(fd); 189 goto out;
191 if (!file) 190 if (off & ~PAGE_MASK)
192 goto out; 191 goto out;
193 } 192 ret = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
194 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
195 down_write(&current->mm->mmap_sem);
196 ret = do_mmap(file, addr, len, prot, flags, off);
197 up_write(&current->mm->mmap_sem);
198 if (file)
199 fput(file);
200 out: 193 out:
201 return ret; 194 return ret;
202} 195}
diff --git a/arch/alpha/mm/numa.c b/arch/alpha/mm/numa.c
index 10b403554b65..7b2c56d8f930 100644
--- a/arch/alpha/mm/numa.c
+++ b/arch/alpha/mm/numa.c
@@ -197,7 +197,7 @@ setup_memory_node(int nid, void *kernel_end)
197 } 197 }
198 198
199 if (bootmap_start == -1) 199 if (bootmap_start == -1)
200 panic("couldn't find a contigous place for the bootmap"); 200 panic("couldn't find a contiguous place for the bootmap");
201 201
202 /* Allocate the bootmap and mark the whole MM as reserved. */ 202 /* Allocate the bootmap and mark the whole MM as reserved. */
203 bootmap_size = init_bootmem_node(NODE_DATA(nid), bootmap_start, 203 bootmap_size = init_bootmem_node(NODE_DATA(nid), bootmap_start,
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index 7713a08bb10c..37bda5f3dde3 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -82,7 +82,7 @@ static int scoop_gpio_get(struct gpio_chip *chip, unsigned offset)
82{ 82{
83 struct scoop_dev *sdev = container_of(chip, struct scoop_dev, gpio); 83 struct scoop_dev *sdev = container_of(chip, struct scoop_dev, gpio);
84 84
85 /* XXX: I'm usure, but it seems so */ 85 /* XXX: I'm unsure, but it seems so */
86 return ioread16(sdev->base + SCOOP_GPRR) & (1 << (offset + 1)); 86 return ioread16(sdev->base + SCOOP_GPRR) & (1 << (offset + 1));
87} 87}
88 88
diff --git a/arch/arm/configs/da830_omapl137_defconfig b/arch/arm/configs/da830_omapl137_defconfig
deleted file mode 100644
index 7c8e38f5c5ab..000000000000
--- a/arch/arm/configs/da830_omapl137_defconfig
+++ /dev/null
@@ -1,1254 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.30-rc2-davinci1
4# Wed May 13 15:33:29 2009
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ZONE_DMA=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29
30#
31# General setup
32#
33CONFIG_EXPERIMENTAL=y
34CONFIG_BROKEN_ON_SMP=y
35CONFIG_LOCK_KERNEL=y
36CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION=""
38CONFIG_LOCALVERSION_AUTO=y
39# CONFIG_SWAP is not set
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42CONFIG_POSIX_MQUEUE=y
43CONFIG_POSIX_MQUEUE_SYSCTL=y
44# CONFIG_BSD_PROCESS_ACCT is not set
45# CONFIG_TASKSTATS is not set
46# CONFIG_AUDIT is not set
47
48#
49# RCU Subsystem
50#
51CONFIG_CLASSIC_RCU=y
52# CONFIG_TREE_RCU is not set
53# CONFIG_PREEMPT_RCU is not set
54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_PREEMPT_RCU_TRACE is not set
56CONFIG_IKCONFIG=y
57CONFIG_IKCONFIG_PROC=y
58CONFIG_LOG_BUF_SHIFT=14
59CONFIG_GROUP_SCHED=y
60CONFIG_FAIR_GROUP_SCHED=y
61# CONFIG_RT_GROUP_SCHED is not set
62CONFIG_USER_SCHED=y
63# CONFIG_CGROUP_SCHED is not set
64# CONFIG_CGROUPS is not set
65CONFIG_SYSFS_DEPRECATED=y
66CONFIG_SYSFS_DEPRECATED_V2=y
67# CONFIG_RELAY is not set
68# CONFIG_NAMESPACES is not set
69CONFIG_BLK_DEV_INITRD=y
70CONFIG_INITRAMFS_SOURCE=""
71CONFIG_RD_GZIP=y
72# CONFIG_RD_BZIP2 is not set
73# CONFIG_RD_LZMA is not set
74CONFIG_CC_OPTIMIZE_FOR_SIZE=y
75CONFIG_SYSCTL=y
76CONFIG_ANON_INODES=y
77CONFIG_EMBEDDED=y
78CONFIG_UID16=y
79CONFIG_SYSCTL_SYSCALL=y
80CONFIG_KALLSYMS=y
81# CONFIG_KALLSYMS_ALL is not set
82# CONFIG_KALLSYMS_EXTRA_PASS is not set
83# CONFIG_STRIP_ASM_SYMS is not set
84CONFIG_HOTPLUG=y
85CONFIG_PRINTK=y
86CONFIG_BUG=y
87CONFIG_ELF_CORE=y
88CONFIG_BASE_FULL=y
89CONFIG_FUTEX=y
90CONFIG_EPOLL=y
91CONFIG_SIGNALFD=y
92CONFIG_TIMERFD=y
93CONFIG_EVENTFD=y
94CONFIG_SHMEM=y
95CONFIG_AIO=y
96CONFIG_VM_EVENT_COUNTERS=y
97CONFIG_SLUB_DEBUG=y
98CONFIG_COMPAT_BRK=y
99# CONFIG_SLAB is not set
100CONFIG_SLUB=y
101# CONFIG_SLOB is not set
102# CONFIG_PROFILING is not set
103# CONFIG_MARKERS is not set
104CONFIG_HAVE_OPROFILE=y
105# CONFIG_KPROBES is not set
106CONFIG_HAVE_KPROBES=y
107CONFIG_HAVE_KRETPROBES=y
108CONFIG_HAVE_CLK=y
109# CONFIG_SLOW_WORK is not set
110CONFIG_HAVE_GENERIC_DMA_COHERENT=y
111CONFIG_SLABINFO=y
112CONFIG_RT_MUTEXES=y
113CONFIG_BASE_SMALL=0
114CONFIG_MODULES=y
115# CONFIG_MODULE_FORCE_LOAD is not set
116CONFIG_MODULE_UNLOAD=y
117CONFIG_MODULE_FORCE_UNLOAD=y
118CONFIG_MODVERSIONS=y
119# CONFIG_MODULE_SRCVERSION_ALL is not set
120CONFIG_BLOCK=y
121# CONFIG_LBD is not set
122# CONFIG_BLK_DEV_BSG is not set
123# CONFIG_BLK_DEV_INTEGRITY is not set
124
125#
126# IO Schedulers
127#
128CONFIG_IOSCHED_NOOP=y
129CONFIG_IOSCHED_AS=y
130# CONFIG_IOSCHED_DEADLINE is not set
131# CONFIG_IOSCHED_CFQ is not set
132CONFIG_DEFAULT_AS=y
133# CONFIG_DEFAULT_DEADLINE is not set
134# CONFIG_DEFAULT_CFQ is not set
135# CONFIG_DEFAULT_NOOP is not set
136CONFIG_DEFAULT_IOSCHED="anticipatory"
137# CONFIG_FREEZER is not set
138
139#
140# System Type
141#
142# CONFIG_ARCH_AAEC2000 is not set
143# CONFIG_ARCH_INTEGRATOR is not set
144# CONFIG_ARCH_REALVIEW is not set
145# CONFIG_ARCH_VERSATILE is not set
146# CONFIG_ARCH_AT91 is not set
147# CONFIG_ARCH_CLPS711X is not set
148# CONFIG_ARCH_EBSA110 is not set
149# CONFIG_ARCH_EP93XX is not set
150# CONFIG_ARCH_GEMINI is not set
151# CONFIG_ARCH_FOOTBRIDGE is not set
152# CONFIG_ARCH_NETX is not set
153# CONFIG_ARCH_H720X is not set
154# CONFIG_ARCH_IMX is not set
155# CONFIG_ARCH_IOP13XX is not set
156# CONFIG_ARCH_IOP32X is not set
157# CONFIG_ARCH_IOP33X is not set
158# CONFIG_ARCH_IXP23XX is not set
159# CONFIG_ARCH_IXP2000 is not set
160# CONFIG_ARCH_IXP4XX is not set
161# CONFIG_ARCH_L7200 is not set
162# CONFIG_ARCH_KIRKWOOD is not set
163# CONFIG_ARCH_KS8695 is not set
164# CONFIG_ARCH_NS9XXX is not set
165# CONFIG_ARCH_LOKI is not set
166# CONFIG_ARCH_MV78XX0 is not set
167# CONFIG_ARCH_MXC is not set
168# CONFIG_ARCH_ORION5X is not set
169# CONFIG_ARCH_PNX4008 is not set
170# CONFIG_ARCH_PXA is not set
171# CONFIG_ARCH_MMP is not set
172# CONFIG_ARCH_RPC is not set
173# CONFIG_ARCH_SA1100 is not set
174# CONFIG_ARCH_S3C2410 is not set
175# CONFIG_ARCH_S3C64XX is not set
176# CONFIG_ARCH_SHARK is not set
177# CONFIG_ARCH_LH7A40X is not set
178CONFIG_ARCH_DAVINCI=y
179# CONFIG_ARCH_OMAP is not set
180# CONFIG_ARCH_MSM is not set
181# CONFIG_ARCH_W90X900 is not set
182CONFIG_CP_INTC=y
183
184#
185# TI DaVinci Implementations
186#
187
188#
189# DaVinci Core Type
190#
191# CONFIG_ARCH_DAVINCI_DM644x is not set
192# CONFIG_ARCH_DAVINCI_DM646x is not set
193# CONFIG_ARCH_DAVINCI_DM355 is not set
194CONFIG_ARCH_DAVINCI_DA830=y
195
196#
197# DaVinci Board Type
198#
199CONFIG_MACH_DAVINCI_DA830_EVM=y
200CONFIG_DAVINCI_MUX=y
201# CONFIG_DAVINCI_MUX_DEBUG is not set
202# CONFIG_DAVINCI_MUX_WARNINGS is not set
203CONFIG_DAVINCI_RESET_CLOCKS=y
204
205#
206# Processor Type
207#
208CONFIG_CPU_32=y
209CONFIG_CPU_ARM926T=y
210CONFIG_CPU_32v5=y
211CONFIG_CPU_ABRT_EV5TJ=y
212CONFIG_CPU_PABRT_NOIFAR=y
213CONFIG_CPU_CACHE_VIVT=y
214CONFIG_CPU_COPY_V4WB=y
215CONFIG_CPU_TLB_V4WBI=y
216CONFIG_CPU_CP15=y
217CONFIG_CPU_CP15_MMU=y
218
219#
220# Processor Features
221#
222CONFIG_ARM_THUMB=y
223# CONFIG_CPU_ICACHE_DISABLE is not set
224# CONFIG_CPU_DCACHE_DISABLE is not set
225CONFIG_CPU_DCACHE_WRITETHROUGH=y
226# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
227# CONFIG_OUTER_CACHE is not set
228CONFIG_COMMON_CLKDEV=y
229
230#
231# Bus support
232#
233# CONFIG_PCI_SYSCALL is not set
234# CONFIG_ARCH_SUPPORTS_MSI is not set
235# CONFIG_PCCARD is not set
236
237#
238# Kernel Features
239#
240CONFIG_TICK_ONESHOT=y
241CONFIG_NO_HZ=y
242CONFIG_HIGH_RES_TIMERS=y
243CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
244CONFIG_VMSPLIT_3G=y
245# CONFIG_VMSPLIT_2G is not set
246# CONFIG_VMSPLIT_1G is not set
247CONFIG_PAGE_OFFSET=0xC0000000
248CONFIG_PREEMPT=y
249CONFIG_HZ=100
250CONFIG_AEABI=y
251# CONFIG_OABI_COMPAT is not set
252CONFIG_ARCH_FLATMEM_HAS_HOLES=y
253# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
254# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
255# CONFIG_HIGHMEM is not set
256CONFIG_SELECT_MEMORY_MODEL=y
257CONFIG_FLATMEM_MANUAL=y
258# CONFIG_DISCONTIGMEM_MANUAL is not set
259# CONFIG_SPARSEMEM_MANUAL is not set
260CONFIG_FLATMEM=y
261CONFIG_FLAT_NODE_MEM_MAP=y
262CONFIG_PAGEFLAGS_EXTENDED=y
263CONFIG_SPLIT_PTLOCK_CPUS=4096
264# CONFIG_PHYS_ADDR_T_64BIT is not set
265CONFIG_ZONE_DMA_FLAG=1
266CONFIG_BOUNCE=y
267CONFIG_VIRT_TO_BUS=y
268CONFIG_UNEVICTABLE_LRU=y
269CONFIG_HAVE_MLOCK=y
270CONFIG_HAVE_MLOCKED_PAGE_BIT=y
271CONFIG_LEDS=y
272# CONFIG_LEDS_CPU is not set
273CONFIG_ALIGNMENT_TRAP=y
274
275#
276# Boot options
277#
278CONFIG_ZBOOT_ROM_TEXT=0x0
279CONFIG_ZBOOT_ROM_BSS=0x0
280CONFIG_CMDLINE=""
281# CONFIG_XIP_KERNEL is not set
282# CONFIG_KEXEC is not set
283
284#
285# CPU Power Management
286#
287# CONFIG_CPU_IDLE is not set
288
289#
290# Floating point emulation
291#
292
293#
294# At least one emulation must be selected
295#
296# CONFIG_VFP is not set
297
298#
299# Userspace binary formats
300#
301CONFIG_BINFMT_ELF=y
302# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
303CONFIG_HAVE_AOUT=y
304# CONFIG_BINFMT_AOUT is not set
305# CONFIG_BINFMT_MISC is not set
306
307#
308# Power management options
309#
310# CONFIG_PM is not set
311CONFIG_ARCH_SUSPEND_POSSIBLE=y
312CONFIG_NET=y
313
314#
315# Networking options
316#
317CONFIG_PACKET=y
318# CONFIG_PACKET_MMAP is not set
319CONFIG_UNIX=y
320CONFIG_XFRM=y
321# CONFIG_XFRM_USER is not set
322# CONFIG_XFRM_SUB_POLICY is not set
323# CONFIG_XFRM_MIGRATE is not set
324# CONFIG_XFRM_STATISTICS is not set
325# CONFIG_NET_KEY is not set
326CONFIG_INET=y
327# CONFIG_IP_MULTICAST is not set
328# CONFIG_IP_ADVANCED_ROUTER is not set
329CONFIG_IP_FIB_HASH=y
330CONFIG_IP_PNP=y
331CONFIG_IP_PNP_DHCP=y
332# CONFIG_IP_PNP_BOOTP is not set
333# CONFIG_IP_PNP_RARP is not set
334# CONFIG_NET_IPIP is not set
335# CONFIG_NET_IPGRE is not set
336# CONFIG_ARPD is not set
337# CONFIG_SYN_COOKIES is not set
338# CONFIG_INET_AH is not set
339# CONFIG_INET_ESP is not set
340# CONFIG_INET_IPCOMP is not set
341# CONFIG_INET_XFRM_TUNNEL is not set
342CONFIG_INET_TUNNEL=m
343CONFIG_INET_XFRM_MODE_TRANSPORT=y
344CONFIG_INET_XFRM_MODE_TUNNEL=y
345CONFIG_INET_XFRM_MODE_BEET=y
346# CONFIG_INET_LRO is not set
347CONFIG_INET_DIAG=y
348CONFIG_INET_TCP_DIAG=y
349# CONFIG_TCP_CONG_ADVANCED is not set
350CONFIG_TCP_CONG_CUBIC=y
351CONFIG_DEFAULT_TCP_CONG="cubic"
352# CONFIG_TCP_MD5SIG is not set
353CONFIG_IPV6=m
354# CONFIG_IPV6_PRIVACY is not set
355# CONFIG_IPV6_ROUTER_PREF is not set
356# CONFIG_IPV6_OPTIMISTIC_DAD is not set
357# CONFIG_INET6_AH is not set
358# CONFIG_INET6_ESP is not set
359# CONFIG_INET6_IPCOMP is not set
360# CONFIG_IPV6_MIP6 is not set
361# CONFIG_INET6_XFRM_TUNNEL is not set
362# CONFIG_INET6_TUNNEL is not set
363CONFIG_INET6_XFRM_MODE_TRANSPORT=m
364CONFIG_INET6_XFRM_MODE_TUNNEL=m
365CONFIG_INET6_XFRM_MODE_BEET=m
366# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
367CONFIG_IPV6_SIT=m
368CONFIG_IPV6_NDISC_NODETYPE=y
369# CONFIG_IPV6_TUNNEL is not set
370# CONFIG_IPV6_MULTIPLE_TABLES is not set
371# CONFIG_IPV6_MROUTE is not set
372# CONFIG_NETWORK_SECMARK is not set
373CONFIG_NETFILTER=y
374# CONFIG_NETFILTER_DEBUG is not set
375CONFIG_NETFILTER_ADVANCED=y
376
377#
378# Core Netfilter Configuration
379#
380# CONFIG_NETFILTER_NETLINK_QUEUE is not set
381# CONFIG_NETFILTER_NETLINK_LOG is not set
382# CONFIG_NF_CONNTRACK is not set
383# CONFIG_NETFILTER_XTABLES is not set
384# CONFIG_IP_VS is not set
385
386#
387# IP: Netfilter Configuration
388#
389# CONFIG_NF_DEFRAG_IPV4 is not set
390# CONFIG_IP_NF_QUEUE is not set
391# CONFIG_IP_NF_IPTABLES is not set
392# CONFIG_IP_NF_ARPTABLES is not set
393
394#
395# IPv6: Netfilter Configuration
396#
397# CONFIG_IP6_NF_QUEUE is not set
398# CONFIG_IP6_NF_IPTABLES is not set
399# CONFIG_IP_DCCP is not set
400# CONFIG_IP_SCTP is not set
401# CONFIG_TIPC is not set
402# CONFIG_ATM is not set
403# CONFIG_BRIDGE is not set
404# CONFIG_NET_DSA is not set
405# CONFIG_VLAN_8021Q is not set
406# CONFIG_DECNET is not set
407# CONFIG_LLC2 is not set
408# CONFIG_IPX is not set
409# CONFIG_ATALK is not set
410# CONFIG_X25 is not set
411# CONFIG_LAPB is not set
412# CONFIG_ECONET is not set
413# CONFIG_WAN_ROUTER is not set
414# CONFIG_PHONET is not set
415# CONFIG_NET_SCHED is not set
416# CONFIG_DCB is not set
417
418#
419# Network testing
420#
421# CONFIG_NET_PKTGEN is not set
422# CONFIG_HAMRADIO is not set
423# CONFIG_CAN is not set
424# CONFIG_IRDA is not set
425# CONFIG_BT is not set
426# CONFIG_AF_RXRPC is not set
427# CONFIG_WIRELESS is not set
428# CONFIG_WIMAX is not set
429# CONFIG_RFKILL is not set
430# CONFIG_NET_9P is not set
431
432#
433# Device Drivers
434#
435
436#
437# Generic Driver Options
438#
439CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
440CONFIG_STANDALONE=y
441CONFIG_PREVENT_FIRMWARE_BUILD=y
442# CONFIG_FW_LOADER is not set
443# CONFIG_DEBUG_DRIVER is not set
444# CONFIG_DEBUG_DEVRES is not set
445# CONFIG_SYS_HYPERVISOR is not set
446# CONFIG_CONNECTOR is not set
447# CONFIG_MTD is not set
448# CONFIG_PARPORT is not set
449CONFIG_BLK_DEV=y
450# CONFIG_BLK_DEV_COW_COMMON is not set
451CONFIG_BLK_DEV_LOOP=m
452# CONFIG_BLK_DEV_CRYPTOLOOP is not set
453# CONFIG_BLK_DEV_NBD is not set
454CONFIG_BLK_DEV_RAM=y
455CONFIG_BLK_DEV_RAM_COUNT=1
456CONFIG_BLK_DEV_RAM_SIZE=32768
457# CONFIG_BLK_DEV_XIP is not set
458# CONFIG_CDROM_PKTCDVD is not set
459# CONFIG_ATA_OVER_ETH is not set
460CONFIG_MISC_DEVICES=y
461# CONFIG_ICS932S401 is not set
462# CONFIG_ENCLOSURE_SERVICES is not set
463# CONFIG_ISL29003 is not set
464# CONFIG_C2PORT is not set
465
466#
467# EEPROM support
468#
469CONFIG_EEPROM_AT24=y
470# CONFIG_EEPROM_LEGACY is not set
471# CONFIG_EEPROM_93CX6 is not set
472CONFIG_HAVE_IDE=y
473# CONFIG_IDE is not set
474
475#
476# SCSI device support
477#
478# CONFIG_RAID_ATTRS is not set
479CONFIG_SCSI=m
480CONFIG_SCSI_DMA=y
481# CONFIG_SCSI_TGT is not set
482# CONFIG_SCSI_NETLINK is not set
483CONFIG_SCSI_PROC_FS=y
484
485#
486# SCSI support type (disk, tape, CD-ROM)
487#
488CONFIG_BLK_DEV_SD=m
489# CONFIG_CHR_DEV_ST is not set
490# CONFIG_CHR_DEV_OSST is not set
491# CONFIG_BLK_DEV_SR is not set
492# CONFIG_CHR_DEV_SG is not set
493# CONFIG_CHR_DEV_SCH is not set
494
495#
496# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
497#
498# CONFIG_SCSI_MULTI_LUN is not set
499# CONFIG_SCSI_CONSTANTS is not set
500# CONFIG_SCSI_LOGGING is not set
501# CONFIG_SCSI_SCAN_ASYNC is not set
502CONFIG_SCSI_WAIT_SCAN=m
503
504#
505# SCSI Transports
506#
507# CONFIG_SCSI_SPI_ATTRS is not set
508# CONFIG_SCSI_FC_ATTRS is not set
509# CONFIG_SCSI_ISCSI_ATTRS is not set
510# CONFIG_SCSI_SAS_LIBSAS is not set
511# CONFIG_SCSI_SRP_ATTRS is not set
512CONFIG_SCSI_LOWLEVEL=y
513# CONFIG_ISCSI_TCP is not set
514# CONFIG_LIBFC is not set
515# CONFIG_LIBFCOE is not set
516# CONFIG_SCSI_DEBUG is not set
517# CONFIG_SCSI_DH is not set
518# CONFIG_SCSI_OSD_INITIATOR is not set
519# CONFIG_ATA is not set
520# CONFIG_MD is not set
521CONFIG_NETDEVICES=y
522CONFIG_COMPAT_NET_DEV_OPS=y
523# CONFIG_DUMMY is not set
524# CONFIG_BONDING is not set
525# CONFIG_MACVLAN is not set
526# CONFIG_EQUALIZER is not set
527CONFIG_TUN=m
528# CONFIG_VETH is not set
529CONFIG_PHYLIB=y
530
531#
532# MII PHY device drivers
533#
534# CONFIG_MARVELL_PHY is not set
535# CONFIG_DAVICOM_PHY is not set
536# CONFIG_QSEMI_PHY is not set
537CONFIG_LXT_PHY=y
538# CONFIG_CICADA_PHY is not set
539# CONFIG_VITESSE_PHY is not set
540# CONFIG_SMSC_PHY is not set
541# CONFIG_BROADCOM_PHY is not set
542# CONFIG_ICPLUS_PHY is not set
543# CONFIG_REALTEK_PHY is not set
544# CONFIG_NATIONAL_PHY is not set
545# CONFIG_STE10XP is not set
546CONFIG_LSI_ET1011C_PHY=y
547# CONFIG_FIXED_PHY is not set
548# CONFIG_MDIO_BITBANG is not set
549CONFIG_NET_ETHERNET=y
550CONFIG_MII=y
551# CONFIG_AX88796 is not set
552# CONFIG_SMC91X is not set
553CONFIG_TI_DAVINCI_EMAC=y
554# CONFIG_DM9000 is not set
555# CONFIG_ETHOC is not set
556# CONFIG_SMC911X is not set
557# CONFIG_SMSC911X is not set
558# CONFIG_DNET is not set
559# CONFIG_IBM_NEW_EMAC_ZMII is not set
560# CONFIG_IBM_NEW_EMAC_RGMII is not set
561# CONFIG_IBM_NEW_EMAC_TAH is not set
562# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
563# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
564# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
565# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
566# CONFIG_B44 is not set
567# CONFIG_NETDEV_1000 is not set
568# CONFIG_NETDEV_10000 is not set
569
570#
571# Wireless LAN
572#
573# CONFIG_WLAN_PRE80211 is not set
574# CONFIG_WLAN_80211 is not set
575
576#
577# Enable WiMAX (Networking options) to see the WiMAX drivers
578#
579# CONFIG_WAN is not set
580# CONFIG_PPP is not set
581# CONFIG_SLIP is not set
582CONFIG_NETCONSOLE=y
583# CONFIG_NETCONSOLE_DYNAMIC is not set
584CONFIG_NETPOLL=y
585CONFIG_NETPOLL_TRAP=y
586CONFIG_NET_POLL_CONTROLLER=y
587# CONFIG_ISDN is not set
588
589#
590# Input device support
591#
592CONFIG_INPUT=y
593# CONFIG_INPUT_FF_MEMLESS is not set
594# CONFIG_INPUT_POLLDEV is not set
595
596#
597# Userland interfaces
598#
599CONFIG_INPUT_MOUSEDEV=m
600CONFIG_INPUT_MOUSEDEV_PSAUX=y
601CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
602CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
603# CONFIG_INPUT_JOYDEV is not set
604CONFIG_INPUT_EVDEV=m
605CONFIG_INPUT_EVBUG=m
606
607#
608# Input Device Drivers
609#
610CONFIG_INPUT_KEYBOARD=y
611CONFIG_KEYBOARD_ATKBD=m
612# CONFIG_KEYBOARD_SUNKBD is not set
613# CONFIG_KEYBOARD_LKKBD is not set
614CONFIG_KEYBOARD_XTKBD=m
615# CONFIG_KEYBOARD_NEWTON is not set
616# CONFIG_KEYBOARD_STOWAWAY is not set
617CONFIG_KEYBOARD_GPIO=y
618# CONFIG_INPUT_MOUSE is not set
619# CONFIG_INPUT_JOYSTICK is not set
620# CONFIG_INPUT_TABLET is not set
621CONFIG_INPUT_TOUCHSCREEN=y
622# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
623# CONFIG_TOUCHSCREEN_AD7879 is not set
624# CONFIG_TOUCHSCREEN_FUJITSU is not set
625# CONFIG_TOUCHSCREEN_GUNZE is not set
626# CONFIG_TOUCHSCREEN_ELO is not set
627# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
628# CONFIG_TOUCHSCREEN_MTOUCH is not set
629# CONFIG_TOUCHSCREEN_INEXIO is not set
630# CONFIG_TOUCHSCREEN_MK712 is not set
631# CONFIG_TOUCHSCREEN_PENMOUNT is not set
632# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
633# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
634# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
635# CONFIG_TOUCHSCREEN_TSC2007 is not set
636# CONFIG_INPUT_MISC is not set
637
638#
639# Hardware I/O ports
640#
641CONFIG_SERIO=y
642CONFIG_SERIO_SERPORT=y
643CONFIG_SERIO_LIBPS2=y
644# CONFIG_SERIO_RAW is not set
645# CONFIG_GAMEPORT is not set
646
647#
648# Character devices
649#
650CONFIG_VT=y
651CONFIG_CONSOLE_TRANSLATIONS=y
652# CONFIG_VT_CONSOLE is not set
653CONFIG_HW_CONSOLE=y
654# CONFIG_VT_HW_CONSOLE_BINDING is not set
655CONFIG_DEVKMEM=y
656# CONFIG_SERIAL_NONSTANDARD is not set
657
658#
659# Serial drivers
660#
661CONFIG_SERIAL_8250=y
662CONFIG_SERIAL_8250_CONSOLE=y
663CONFIG_SERIAL_8250_NR_UARTS=3
664CONFIG_SERIAL_8250_RUNTIME_UARTS=3
665# CONFIG_SERIAL_8250_EXTENDED is not set
666
667#
668# Non-8250 serial port support
669#
670CONFIG_SERIAL_CORE=y
671CONFIG_SERIAL_CORE_CONSOLE=y
672CONFIG_UNIX98_PTYS=y
673# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
674CONFIG_LEGACY_PTYS=y
675CONFIG_LEGACY_PTY_COUNT=256
676# CONFIG_IPMI_HANDLER is not set
677CONFIG_HW_RANDOM=m
678# CONFIG_HW_RANDOM_TIMERIOMEM is not set
679# CONFIG_R3964 is not set
680# CONFIG_RAW_DRIVER is not set
681# CONFIG_TCG_TPM is not set
682CONFIG_I2C=y
683CONFIG_I2C_BOARDINFO=y
684CONFIG_I2C_CHARDEV=y
685CONFIG_I2C_HELPER_AUTO=y
686
687#
688# I2C Hardware Bus support
689#
690
691#
692# I2C system bus drivers (mostly embedded / system-on-chip)
693#
694CONFIG_I2C_DAVINCI=y
695# CONFIG_I2C_GPIO is not set
696# CONFIG_I2C_OCORES is not set
697# CONFIG_I2C_SIMTEC is not set
698
699#
700# External I2C/SMBus adapter drivers
701#
702# CONFIG_I2C_PARPORT_LIGHT is not set
703# CONFIG_I2C_TAOS_EVM is not set
704
705#
706# Other I2C/SMBus bus drivers
707#
708# CONFIG_I2C_PCA_PLATFORM is not set
709# CONFIG_I2C_STUB is not set
710
711#
712# Miscellaneous I2C Chip support
713#
714# CONFIG_DS1682 is not set
715# CONFIG_SENSORS_PCA9539 is not set
716# CONFIG_SENSORS_MAX6875 is not set
717# CONFIG_SENSORS_TSL2550 is not set
718# CONFIG_I2C_DEBUG_CORE is not set
719# CONFIG_I2C_DEBUG_ALGO is not set
720# CONFIG_I2C_DEBUG_BUS is not set
721# CONFIG_I2C_DEBUG_CHIP is not set
722# CONFIG_SPI is not set
723CONFIG_ARCH_REQUIRE_GPIOLIB=y
724CONFIG_GPIOLIB=y
725# CONFIG_DEBUG_GPIO is not set
726# CONFIG_GPIO_SYSFS is not set
727
728#
729# Memory mapped GPIO expanders:
730#
731
732#
733# I2C GPIO expanders:
734#
735# CONFIG_GPIO_MAX732X is not set
736# CONFIG_GPIO_PCA953X is not set
737CONFIG_GPIO_PCF857X=m
738
739#
740# PCI GPIO expanders:
741#
742
743#
744# SPI GPIO expanders:
745#
746# CONFIG_W1 is not set
747# CONFIG_POWER_SUPPLY is not set
748# CONFIG_HWMON is not set
749# CONFIG_THERMAL is not set
750# CONFIG_THERMAL_HWMON is not set
751CONFIG_WATCHDOG=y
752# CONFIG_WATCHDOG_NOWAYOUT is not set
753
754#
755# Watchdog Device Drivers
756#
757# CONFIG_SOFT_WATCHDOG is not set
758# CONFIG_DAVINCI_WATCHDOG is not set
759CONFIG_SSB_POSSIBLE=y
760
761#
762# Sonics Silicon Backplane
763#
764# CONFIG_SSB is not set
765
766#
767# Multifunction device drivers
768#
769# CONFIG_MFD_CORE is not set
770# CONFIG_MFD_SM501 is not set
771# CONFIG_MFD_ASIC3 is not set
772# CONFIG_HTC_EGPIO is not set
773# CONFIG_HTC_PASIC3 is not set
774# CONFIG_TPS65010 is not set
775# CONFIG_TWL4030_CORE is not set
776# CONFIG_MFD_TMIO is not set
777# CONFIG_MFD_T7L66XB is not set
778# CONFIG_MFD_TC6387XB is not set
779# CONFIG_MFD_TC6393XB is not set
780# CONFIG_PMIC_DA903X is not set
781# CONFIG_MFD_WM8400 is not set
782# CONFIG_MFD_WM8350_I2C is not set
783# CONFIG_MFD_PCF50633 is not set
784
785#
786# Multimedia devices
787#
788
789#
790# Multimedia core support
791#
792# CONFIG_VIDEO_DEV is not set
793# CONFIG_DVB_CORE is not set
794# CONFIG_VIDEO_MEDIA is not set
795
796#
797# Multimedia drivers
798#
799# CONFIG_DAB is not set
800
801#
802# Graphics support
803#
804# CONFIG_VGASTATE is not set
805# CONFIG_VIDEO_OUTPUT_CONTROL is not set
806# CONFIG_FB is not set
807# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
808
809#
810# Display device support
811#
812# CONFIG_DISPLAY_SUPPORT is not set
813
814#
815# Console display driver support
816#
817# CONFIG_VGA_CONSOLE is not set
818CONFIG_DUMMY_CONSOLE=y
819CONFIG_SOUND=m
820# CONFIG_SOUND_OSS_CORE is not set
821CONFIG_SND=m
822CONFIG_SND_TIMER=m
823CONFIG_SND_PCM=m
824CONFIG_SND_JACK=y
825# CONFIG_SND_SEQUENCER is not set
826# CONFIG_SND_MIXER_OSS is not set
827# CONFIG_SND_PCM_OSS is not set
828# CONFIG_SND_HRTIMER is not set
829# CONFIG_SND_DYNAMIC_MINORS is not set
830CONFIG_SND_SUPPORT_OLD_API=y
831CONFIG_SND_VERBOSE_PROCFS=y
832# CONFIG_SND_VERBOSE_PRINTK is not set
833# CONFIG_SND_DEBUG is not set
834CONFIG_SND_DRIVERS=y
835# CONFIG_SND_DUMMY is not set
836# CONFIG_SND_MTPAV is not set
837# CONFIG_SND_SERIAL_U16550 is not set
838# CONFIG_SND_MPU401 is not set
839CONFIG_SND_ARM=y
840CONFIG_SND_SOC=m
841CONFIG_SND_DAVINCI_SOC=m
842CONFIG_SND_SOC_I2C_AND_SPI=m
843# CONFIG_SND_SOC_ALL_CODECS is not set
844# CONFIG_SOUND_PRIME is not set
845# CONFIG_HID_SUPPORT is not set
846# CONFIG_USB_SUPPORT is not set
847# CONFIG_USB_MUSB_HOST is not set
848# CONFIG_USB_MUSB_PERIPHERAL is not set
849# CONFIG_USB_MUSB_OTG is not set
850# CONFIG_USB_GADGET_MUSB_HDRC is not set
851# CONFIG_USB_GADGET_AT91 is not set
852# CONFIG_USB_GADGET_ATMEL_USBA is not set
853# CONFIG_USB_GADGET_FSL_USB2 is not set
854# CONFIG_USB_GADGET_LH7A40X is not set
855# CONFIG_USB_GADGET_OMAP is not set
856# CONFIG_USB_GADGET_PXA25X is not set
857# CONFIG_USB_GADGET_PXA27X is not set
858# CONFIG_USB_GADGET_S3C2410 is not set
859# CONFIG_USB_GADGET_IMX is not set
860# CONFIG_USB_GADGET_M66592 is not set
861# CONFIG_USB_GADGET_AMD5536UDC is not set
862# CONFIG_USB_GADGET_FSL_QE is not set
863# CONFIG_USB_GADGET_CI13XXX is not set
864# CONFIG_USB_GADGET_NET2280 is not set
865# CONFIG_USB_GADGET_GOKU is not set
866# CONFIG_USB_GADGET_DUMMY_HCD is not set
867# CONFIG_USB_ZERO is not set
868# CONFIG_USB_ETH is not set
869# CONFIG_USB_GADGETFS is not set
870# CONFIG_USB_FILE_STORAGE is not set
871# CONFIG_USB_G_SERIAL is not set
872# CONFIG_USB_MIDI_GADGET is not set
873# CONFIG_USB_G_PRINTER is not set
874# CONFIG_USB_CDC_COMPOSITE is not set
875# CONFIG_MMC is not set
876# CONFIG_MEMSTICK is not set
877# CONFIG_ACCESSIBILITY is not set
878# CONFIG_NEW_LEDS is not set
879CONFIG_RTC_LIB=y
880# CONFIG_RTC_CLASS is not set
881# CONFIG_DMADEVICES is not set
882# CONFIG_AUXDISPLAY is not set
883# CONFIG_REGULATOR is not set
884# CONFIG_UIO is not set
885# CONFIG_STAGING is not set
886
887#
888# File systems
889#
890CONFIG_EXT2_FS=y
891# CONFIG_EXT2_FS_XATTR is not set
892# CONFIG_EXT2_FS_XIP is not set
893CONFIG_EXT3_FS=y
894# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
895CONFIG_EXT3_FS_XATTR=y
896# CONFIG_EXT3_FS_POSIX_ACL is not set
897# CONFIG_EXT3_FS_SECURITY is not set
898# CONFIG_EXT4_FS is not set
899CONFIG_JBD=y
900# CONFIG_JBD_DEBUG is not set
901CONFIG_FS_MBCACHE=y
902# CONFIG_REISERFS_FS is not set
903# CONFIG_JFS_FS is not set
904# CONFIG_FS_POSIX_ACL is not set
905CONFIG_FILE_LOCKING=y
906CONFIG_XFS_FS=m
907# CONFIG_XFS_QUOTA is not set
908# CONFIG_XFS_POSIX_ACL is not set
909# CONFIG_XFS_RT is not set
910# CONFIG_XFS_DEBUG is not set
911# CONFIG_OCFS2_FS is not set
912# CONFIG_BTRFS_FS is not set
913CONFIG_DNOTIFY=y
914CONFIG_INOTIFY=y
915CONFIG_INOTIFY_USER=y
916# CONFIG_QUOTA is not set
917# CONFIG_AUTOFS_FS is not set
918CONFIG_AUTOFS4_FS=m
919# CONFIG_FUSE_FS is not set
920
921#
922# Caches
923#
924# CONFIG_FSCACHE is not set
925
926#
927# CD-ROM/DVD Filesystems
928#
929# CONFIG_ISO9660_FS is not set
930# CONFIG_UDF_FS is not set
931
932#
933# DOS/FAT/NT Filesystems
934#
935CONFIG_FAT_FS=y
936CONFIG_MSDOS_FS=y
937CONFIG_VFAT_FS=y
938CONFIG_FAT_DEFAULT_CODEPAGE=437
939CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
940# CONFIG_NTFS_FS is not set
941
942#
943# Pseudo filesystems
944#
945CONFIG_PROC_FS=y
946CONFIG_PROC_SYSCTL=y
947CONFIG_PROC_PAGE_MONITOR=y
948CONFIG_SYSFS=y
949CONFIG_TMPFS=y
950# CONFIG_TMPFS_POSIX_ACL is not set
951# CONFIG_HUGETLB_PAGE is not set
952# CONFIG_CONFIGFS_FS is not set
953CONFIG_MISC_FILESYSTEMS=y
954# CONFIG_ADFS_FS is not set
955# CONFIG_AFFS_FS is not set
956# CONFIG_HFS_FS is not set
957# CONFIG_HFSPLUS_FS is not set
958# CONFIG_BEFS_FS is not set
959# CONFIG_BFS_FS is not set
960# CONFIG_EFS_FS is not set
961CONFIG_CRAMFS=y
962# CONFIG_SQUASHFS is not set
963# CONFIG_VXFS_FS is not set
964CONFIG_MINIX_FS=m
965# CONFIG_OMFS_FS is not set
966# CONFIG_HPFS_FS is not set
967# CONFIG_QNX4FS_FS is not set
968# CONFIG_ROMFS_FS is not set
969# CONFIG_SYSV_FS is not set
970# CONFIG_UFS_FS is not set
971# CONFIG_NILFS2_FS is not set
972CONFIG_NETWORK_FILESYSTEMS=y
973CONFIG_NFS_FS=y
974CONFIG_NFS_V3=y
975# CONFIG_NFS_V3_ACL is not set
976# CONFIG_NFS_V4 is not set
977CONFIG_ROOT_NFS=y
978CONFIG_NFSD=m
979CONFIG_NFSD_V3=y
980# CONFIG_NFSD_V3_ACL is not set
981# CONFIG_NFSD_V4 is not set
982CONFIG_LOCKD=y
983CONFIG_LOCKD_V4=y
984CONFIG_EXPORTFS=m
985CONFIG_NFS_COMMON=y
986CONFIG_SUNRPC=y
987# CONFIG_RPCSEC_GSS_KRB5 is not set
988# CONFIG_RPCSEC_GSS_SPKM3 is not set
989CONFIG_SMB_FS=m
990# CONFIG_SMB_NLS_DEFAULT is not set
991# CONFIG_CIFS is not set
992# CONFIG_NCP_FS is not set
993# CONFIG_CODA_FS is not set
994# CONFIG_AFS_FS is not set
995
996#
997# Partition Types
998#
999CONFIG_PARTITION_ADVANCED=y
1000# CONFIG_ACORN_PARTITION is not set
1001# CONFIG_OSF_PARTITION is not set
1002# CONFIG_AMIGA_PARTITION is not set
1003# CONFIG_ATARI_PARTITION is not set
1004# CONFIG_MAC_PARTITION is not set
1005CONFIG_MSDOS_PARTITION=y
1006# CONFIG_BSD_DISKLABEL is not set
1007# CONFIG_MINIX_SUBPARTITION is not set
1008# CONFIG_SOLARIS_X86_PARTITION is not set
1009# CONFIG_UNIXWARE_DISKLABEL is not set
1010# CONFIG_LDM_PARTITION is not set
1011# CONFIG_SGI_PARTITION is not set
1012# CONFIG_ULTRIX_PARTITION is not set
1013# CONFIG_SUN_PARTITION is not set
1014# CONFIG_KARMA_PARTITION is not set
1015# CONFIG_EFI_PARTITION is not set
1016# CONFIG_SYSV68_PARTITION is not set
1017CONFIG_NLS=y
1018CONFIG_NLS_DEFAULT="iso8859-1"
1019CONFIG_NLS_CODEPAGE_437=y
1020# CONFIG_NLS_CODEPAGE_737 is not set
1021# CONFIG_NLS_CODEPAGE_775 is not set
1022# CONFIG_NLS_CODEPAGE_850 is not set
1023# CONFIG_NLS_CODEPAGE_852 is not set
1024# CONFIG_NLS_CODEPAGE_855 is not set
1025# CONFIG_NLS_CODEPAGE_857 is not set
1026# CONFIG_NLS_CODEPAGE_860 is not set
1027# CONFIG_NLS_CODEPAGE_861 is not set
1028# CONFIG_NLS_CODEPAGE_862 is not set
1029# CONFIG_NLS_CODEPAGE_863 is not set
1030# CONFIG_NLS_CODEPAGE_864 is not set
1031# CONFIG_NLS_CODEPAGE_865 is not set
1032# CONFIG_NLS_CODEPAGE_866 is not set
1033# CONFIG_NLS_CODEPAGE_869 is not set
1034# CONFIG_NLS_CODEPAGE_936 is not set
1035# CONFIG_NLS_CODEPAGE_950 is not set
1036# CONFIG_NLS_CODEPAGE_932 is not set
1037# CONFIG_NLS_CODEPAGE_949 is not set
1038# CONFIG_NLS_CODEPAGE_874 is not set
1039# CONFIG_NLS_ISO8859_8 is not set
1040# CONFIG_NLS_CODEPAGE_1250 is not set
1041# CONFIG_NLS_CODEPAGE_1251 is not set
1042CONFIG_NLS_ASCII=m
1043CONFIG_NLS_ISO8859_1=y
1044# CONFIG_NLS_ISO8859_2 is not set
1045# CONFIG_NLS_ISO8859_3 is not set
1046# CONFIG_NLS_ISO8859_4 is not set
1047# CONFIG_NLS_ISO8859_5 is not set
1048# CONFIG_NLS_ISO8859_6 is not set
1049# CONFIG_NLS_ISO8859_7 is not set
1050# CONFIG_NLS_ISO8859_9 is not set
1051# CONFIG_NLS_ISO8859_13 is not set
1052# CONFIG_NLS_ISO8859_14 is not set
1053# CONFIG_NLS_ISO8859_15 is not set
1054# CONFIG_NLS_KOI8_R is not set
1055# CONFIG_NLS_KOI8_U is not set
1056CONFIG_NLS_UTF8=m
1057# CONFIG_DLM is not set
1058
1059#
1060# Kernel hacking
1061#
1062# CONFIG_PRINTK_TIME is not set
1063CONFIG_ENABLE_WARN_DEPRECATED=y
1064CONFIG_ENABLE_MUST_CHECK=y
1065CONFIG_FRAME_WARN=1024
1066# CONFIG_MAGIC_SYSRQ is not set
1067# CONFIG_UNUSED_SYMBOLS is not set
1068CONFIG_DEBUG_FS=y
1069# CONFIG_HEADERS_CHECK is not set
1070CONFIG_DEBUG_KERNEL=y
1071# CONFIG_DEBUG_SHIRQ is not set
1072CONFIG_DETECT_SOFTLOCKUP=y
1073# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1074CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1075CONFIG_DETECT_HUNG_TASK=y
1076# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1077CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1078CONFIG_SCHED_DEBUG=y
1079# CONFIG_SCHEDSTATS is not set
1080CONFIG_TIMER_STATS=y
1081# CONFIG_DEBUG_OBJECTS is not set
1082# CONFIG_SLUB_DEBUG_ON is not set
1083# CONFIG_SLUB_STATS is not set
1084CONFIG_DEBUG_PREEMPT=y
1085CONFIG_DEBUG_RT_MUTEXES=y
1086CONFIG_DEBUG_PI_LIST=y
1087# CONFIG_RT_MUTEX_TESTER is not set
1088# CONFIG_DEBUG_SPINLOCK is not set
1089CONFIG_DEBUG_MUTEXES=y
1090# CONFIG_DEBUG_LOCK_ALLOC is not set
1091# CONFIG_PROVE_LOCKING is not set
1092# CONFIG_LOCK_STAT is not set
1093# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1094# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1095# CONFIG_DEBUG_KOBJECT is not set
1096CONFIG_DEBUG_BUGVERBOSE=y
1097# CONFIG_DEBUG_INFO is not set
1098# CONFIG_DEBUG_VM is not set
1099# CONFIG_DEBUG_WRITECOUNT is not set
1100# CONFIG_DEBUG_MEMORY_INIT is not set
1101# CONFIG_DEBUG_LIST is not set
1102# CONFIG_DEBUG_SG is not set
1103# CONFIG_DEBUG_NOTIFIERS is not set
1104# CONFIG_BOOT_PRINTK_DELAY is not set
1105# CONFIG_RCU_TORTURE_TEST is not set
1106# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1107# CONFIG_BACKTRACE_SELF_TEST is not set
1108# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1109# CONFIG_FAULT_INJECTION is not set
1110# CONFIG_LATENCYTOP is not set
1111# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1112# CONFIG_PAGE_POISONING is not set
1113CONFIG_HAVE_FUNCTION_TRACER=y
1114CONFIG_TRACING_SUPPORT=y
1115
1116#
1117# Tracers
1118#
1119# CONFIG_FUNCTION_TRACER is not set
1120# CONFIG_IRQSOFF_TRACER is not set
1121# CONFIG_PREEMPT_TRACER is not set
1122# CONFIG_SCHED_TRACER is not set
1123# CONFIG_CONTEXT_SWITCH_TRACER is not set
1124# CONFIG_EVENT_TRACER is not set
1125# CONFIG_BOOT_TRACER is not set
1126# CONFIG_TRACE_BRANCH_PROFILING is not set
1127# CONFIG_STACK_TRACER is not set
1128# CONFIG_KMEMTRACE is not set
1129# CONFIG_WORKQUEUE_TRACER is not set
1130# CONFIG_BLK_DEV_IO_TRACE is not set
1131# CONFIG_DYNAMIC_DEBUG is not set
1132# CONFIG_SAMPLES is not set
1133CONFIG_HAVE_ARCH_KGDB=y
1134# CONFIG_KGDB is not set
1135CONFIG_ARM_UNWIND=y
1136CONFIG_DEBUG_USER=y
1137CONFIG_DEBUG_ERRORS=y
1138# CONFIG_DEBUG_STACK_USAGE is not set
1139# CONFIG_DEBUG_LL is not set
1140
1141#
1142# Security options
1143#
1144# CONFIG_KEYS is not set
1145# CONFIG_SECURITY is not set
1146# CONFIG_SECURITYFS is not set
1147# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1148CONFIG_CRYPTO=y
1149
1150#
1151# Crypto core or helper
1152#
1153# CONFIG_CRYPTO_FIPS is not set
1154# CONFIG_CRYPTO_MANAGER is not set
1155# CONFIG_CRYPTO_MANAGER2 is not set
1156# CONFIG_CRYPTO_GF128MUL is not set
1157# CONFIG_CRYPTO_NULL is not set
1158# CONFIG_CRYPTO_CRYPTD is not set
1159# CONFIG_CRYPTO_AUTHENC is not set
1160# CONFIG_CRYPTO_TEST is not set
1161
1162#
1163# Authenticated Encryption with Associated Data
1164#
1165# CONFIG_CRYPTO_CCM is not set
1166# CONFIG_CRYPTO_GCM is not set
1167# CONFIG_CRYPTO_SEQIV is not set
1168
1169#
1170# Block modes
1171#
1172# CONFIG_CRYPTO_CBC is not set
1173# CONFIG_CRYPTO_CTR is not set
1174# CONFIG_CRYPTO_CTS is not set
1175# CONFIG_CRYPTO_ECB is not set
1176# CONFIG_CRYPTO_LRW is not set
1177# CONFIG_CRYPTO_PCBC is not set
1178# CONFIG_CRYPTO_XTS is not set
1179
1180#
1181# Hash modes
1182#
1183# CONFIG_CRYPTO_HMAC is not set
1184# CONFIG_CRYPTO_XCBC is not set
1185
1186#
1187# Digest
1188#
1189# CONFIG_CRYPTO_CRC32C is not set
1190# CONFIG_CRYPTO_MD4 is not set
1191# CONFIG_CRYPTO_MD5 is not set
1192# CONFIG_CRYPTO_MICHAEL_MIC is not set
1193# CONFIG_CRYPTO_RMD128 is not set
1194# CONFIG_CRYPTO_RMD160 is not set
1195# CONFIG_CRYPTO_RMD256 is not set
1196# CONFIG_CRYPTO_RMD320 is not set
1197# CONFIG_CRYPTO_SHA1 is not set
1198# CONFIG_CRYPTO_SHA256 is not set
1199# CONFIG_CRYPTO_SHA512 is not set
1200# CONFIG_CRYPTO_TGR192 is not set
1201# CONFIG_CRYPTO_WP512 is not set
1202
1203#
1204# Ciphers
1205#
1206# CONFIG_CRYPTO_AES is not set
1207# CONFIG_CRYPTO_ANUBIS is not set
1208# CONFIG_CRYPTO_ARC4 is not set
1209# CONFIG_CRYPTO_BLOWFISH is not set
1210# CONFIG_CRYPTO_CAMELLIA is not set
1211# CONFIG_CRYPTO_CAST5 is not set
1212# CONFIG_CRYPTO_CAST6 is not set
1213# CONFIG_CRYPTO_DES is not set
1214# CONFIG_CRYPTO_FCRYPT is not set
1215# CONFIG_CRYPTO_KHAZAD is not set
1216# CONFIG_CRYPTO_SALSA20 is not set
1217# CONFIG_CRYPTO_SEED is not set
1218# CONFIG_CRYPTO_SERPENT is not set
1219# CONFIG_CRYPTO_TEA is not set
1220# CONFIG_CRYPTO_TWOFISH is not set
1221
1222#
1223# Compression
1224#
1225# CONFIG_CRYPTO_DEFLATE is not set
1226# CONFIG_CRYPTO_ZLIB is not set
1227# CONFIG_CRYPTO_LZO is not set
1228
1229#
1230# Random Number Generation
1231#
1232# CONFIG_CRYPTO_ANSI_CPRNG is not set
1233# CONFIG_CRYPTO_HW is not set
1234# CONFIG_BINARY_PRINTF is not set
1235
1236#
1237# Library routines
1238#
1239CONFIG_BITREVERSE=y
1240CONFIG_GENERIC_FIND_LAST_BIT=y
1241CONFIG_CRC_CCITT=m
1242# CONFIG_CRC16 is not set
1243CONFIG_CRC_T10DIF=m
1244# CONFIG_CRC_ITU_T is not set
1245CONFIG_CRC32=y
1246# CONFIG_CRC7 is not set
1247# CONFIG_LIBCRC32C is not set
1248CONFIG_ZLIB_INFLATE=y
1249CONFIG_DECOMPRESS_GZIP=y
1250CONFIG_GENERIC_ALLOCATOR=y
1251CONFIG_HAS_IOMEM=y
1252CONFIG_HAS_IOPORT=y
1253CONFIG_HAS_DMA=y
1254CONFIG_NLATTR=y
diff --git a/arch/arm/configs/da850_omapl138_defconfig b/arch/arm/configs/da8xx_omapl_defconfig
index 842a70b079bf..50bd25a10f0d 100644
--- a/arch/arm/configs/da850_omapl138_defconfig
+++ b/arch/arm/configs/da8xx_omapl_defconfig
@@ -1,15 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.30-davinci1 3# Linux kernel version: 2.6.32-rc5
4# Mon Jun 29 07:54:15 2009 4# Thu Oct 22 12:19:19 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y 9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y 10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 11CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 12CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y 13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,14 +16,14 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y 16CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y 17CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y 18CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set 19CONFIG_ARCH_HAS_CPUFREQ=y
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y 20CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y 21CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ZONE_DMA=y 22CONFIG_ZONE_DMA=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 23CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000 24CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 25CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
26CONFIG_CONSTRUCTORS=y
29 27
30# 28#
31# General setup 29# General setup
@@ -48,11 +46,12 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
48# 46#
49# RCU Subsystem 47# RCU Subsystem
50# 48#
51CONFIG_CLASSIC_RCU=y 49CONFIG_TREE_RCU=y
52# CONFIG_TREE_RCU is not set 50# CONFIG_TREE_PREEMPT_RCU is not set
53# CONFIG_PREEMPT_RCU is not set 51# CONFIG_RCU_TRACE is not set
52CONFIG_RCU_FANOUT=32
53# CONFIG_RCU_FANOUT_EXACT is not set
54# CONFIG_TREE_RCU_TRACE is not set 54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_PREEMPT_RCU_TRACE is not set
56CONFIG_IKCONFIG=y 55CONFIG_IKCONFIG=y
57CONFIG_IKCONFIG_PROC=y 56CONFIG_IKCONFIG_PROC=y
58CONFIG_LOG_BUF_SHIFT=14 57CONFIG_LOG_BUF_SHIFT=14
@@ -62,8 +61,7 @@ CONFIG_FAIR_GROUP_SCHED=y
62CONFIG_USER_SCHED=y 61CONFIG_USER_SCHED=y
63# CONFIG_CGROUP_SCHED is not set 62# CONFIG_CGROUP_SCHED is not set
64# CONFIG_CGROUPS is not set 63# CONFIG_CGROUPS is not set
65CONFIG_SYSFS_DEPRECATED=y 64# CONFIG_SYSFS_DEPRECATED_V2 is not set
66CONFIG_SYSFS_DEPRECATED_V2=y
67# CONFIG_RELAY is not set 65# CONFIG_RELAY is not set
68# CONFIG_NAMESPACES is not set 66# CONFIG_NAMESPACES is not set
69CONFIG_BLK_DEV_INITRD=y 67CONFIG_BLK_DEV_INITRD=y
@@ -80,7 +78,6 @@ CONFIG_SYSCTL_SYSCALL=y
80CONFIG_KALLSYMS=y 78CONFIG_KALLSYMS=y
81# CONFIG_KALLSYMS_ALL is not set 79# CONFIG_KALLSYMS_ALL is not set
82# CONFIG_KALLSYMS_EXTRA_PASS is not set 80# CONFIG_KALLSYMS_EXTRA_PASS is not set
83# CONFIG_STRIP_ASM_SYMS is not set
84CONFIG_HOTPLUG=y 81CONFIG_HOTPLUG=y
85CONFIG_PRINTK=y 82CONFIG_PRINTK=y
86CONFIG_BUG=y 83CONFIG_BUG=y
@@ -93,6 +90,10 @@ CONFIG_TIMERFD=y
93CONFIG_EVENTFD=y 90CONFIG_EVENTFD=y
94CONFIG_SHMEM=y 91CONFIG_SHMEM=y
95CONFIG_AIO=y 92CONFIG_AIO=y
93
94#
95# Kernel Performance Events And Counters
96#
96CONFIG_VM_EVENT_COUNTERS=y 97CONFIG_VM_EVENT_COUNTERS=y
97CONFIG_SLUB_DEBUG=y 98CONFIG_SLUB_DEBUG=y
98CONFIG_COMPAT_BRK=y 99CONFIG_COMPAT_BRK=y
@@ -100,12 +101,16 @@ CONFIG_COMPAT_BRK=y
100CONFIG_SLUB=y 101CONFIG_SLUB=y
101# CONFIG_SLOB is not set 102# CONFIG_SLOB is not set
102# CONFIG_PROFILING is not set 103# CONFIG_PROFILING is not set
103# CONFIG_MARKERS is not set
104CONFIG_HAVE_OPROFILE=y 104CONFIG_HAVE_OPROFILE=y
105# CONFIG_KPROBES is not set 105# CONFIG_KPROBES is not set
106CONFIG_HAVE_KPROBES=y 106CONFIG_HAVE_KPROBES=y
107CONFIG_HAVE_KRETPROBES=y 107CONFIG_HAVE_KRETPROBES=y
108CONFIG_HAVE_CLK=y 108CONFIG_HAVE_CLK=y
109
110#
111# GCOV-based kernel profiling
112#
113# CONFIG_GCOV_KERNEL is not set
109# CONFIG_SLOW_WORK is not set 114# CONFIG_SLOW_WORK is not set
110CONFIG_HAVE_GENERIC_DMA_COHERENT=y 115CONFIG_HAVE_GENERIC_DMA_COHERENT=y
111CONFIG_SLABINFO=y 116CONFIG_SLABINFO=y
@@ -118,7 +123,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
118CONFIG_MODVERSIONS=y 123CONFIG_MODVERSIONS=y
119# CONFIG_MODULE_SRCVERSION_ALL is not set 124# CONFIG_MODULE_SRCVERSION_ALL is not set
120CONFIG_BLOCK=y 125CONFIG_BLOCK=y
121# CONFIG_LBD is not set 126CONFIG_LBDAF=y
122# CONFIG_BLK_DEV_BSG is not set 127# CONFIG_BLK_DEV_BSG is not set
123# CONFIG_BLK_DEV_INTEGRITY is not set 128# CONFIG_BLK_DEV_INTEGRITY is not set
124 129
@@ -139,19 +144,22 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
139# 144#
140# System Type 145# System Type
141# 146#
147CONFIG_MMU=y
142# CONFIG_ARCH_AAEC2000 is not set 148# CONFIG_ARCH_AAEC2000 is not set
143# CONFIG_ARCH_INTEGRATOR is not set 149# CONFIG_ARCH_INTEGRATOR is not set
144# CONFIG_ARCH_REALVIEW is not set 150# CONFIG_ARCH_REALVIEW is not set
145# CONFIG_ARCH_VERSATILE is not set 151# CONFIG_ARCH_VERSATILE is not set
146# CONFIG_ARCH_AT91 is not set 152# CONFIG_ARCH_AT91 is not set
147# CONFIG_ARCH_CLPS711X is not set 153# CONFIG_ARCH_CLPS711X is not set
154# CONFIG_ARCH_GEMINI is not set
148# CONFIG_ARCH_EBSA110 is not set 155# CONFIG_ARCH_EBSA110 is not set
149# CONFIG_ARCH_EP93XX is not set 156# CONFIG_ARCH_EP93XX is not set
150# CONFIG_ARCH_GEMINI is not set
151# CONFIG_ARCH_FOOTBRIDGE is not set 157# CONFIG_ARCH_FOOTBRIDGE is not set
158# CONFIG_ARCH_MXC is not set
159# CONFIG_ARCH_STMP3XXX is not set
152# CONFIG_ARCH_NETX is not set 160# CONFIG_ARCH_NETX is not set
153# CONFIG_ARCH_H720X is not set 161# CONFIG_ARCH_H720X is not set
154# CONFIG_ARCH_IMX is not set 162# CONFIG_ARCH_NOMADIK is not set
155# CONFIG_ARCH_IOP13XX is not set 163# CONFIG_ARCH_IOP13XX is not set
156# CONFIG_ARCH_IOP32X is not set 164# CONFIG_ARCH_IOP32X is not set
157# CONFIG_ARCH_IOP33X is not set 165# CONFIG_ARCH_IOP33X is not set
@@ -160,25 +168,27 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
160# CONFIG_ARCH_IXP4XX is not set 168# CONFIG_ARCH_IXP4XX is not set
161# CONFIG_ARCH_L7200 is not set 169# CONFIG_ARCH_L7200 is not set
162# CONFIG_ARCH_KIRKWOOD is not set 170# CONFIG_ARCH_KIRKWOOD is not set
163# CONFIG_ARCH_KS8695 is not set
164# CONFIG_ARCH_NS9XXX is not set
165# CONFIG_ARCH_LOKI is not set 171# CONFIG_ARCH_LOKI is not set
166# CONFIG_ARCH_MV78XX0 is not set 172# CONFIG_ARCH_MV78XX0 is not set
167# CONFIG_ARCH_MXC is not set
168# CONFIG_ARCH_ORION5X is not set 173# CONFIG_ARCH_ORION5X is not set
174# CONFIG_ARCH_MMP is not set
175# CONFIG_ARCH_KS8695 is not set
176# CONFIG_ARCH_NS9XXX is not set
177# CONFIG_ARCH_W90X900 is not set
169# CONFIG_ARCH_PNX4008 is not set 178# CONFIG_ARCH_PNX4008 is not set
170# CONFIG_ARCH_PXA is not set 179# CONFIG_ARCH_PXA is not set
171# CONFIG_ARCH_MMP is not set 180# CONFIG_ARCH_MSM is not set
172# CONFIG_ARCH_RPC is not set 181# CONFIG_ARCH_RPC is not set
173# CONFIG_ARCH_SA1100 is not set 182# CONFIG_ARCH_SA1100 is not set
174# CONFIG_ARCH_S3C2410 is not set 183# CONFIG_ARCH_S3C2410 is not set
175# CONFIG_ARCH_S3C64XX is not set 184# CONFIG_ARCH_S3C64XX is not set
185# CONFIG_ARCH_S5PC1XX is not set
176# CONFIG_ARCH_SHARK is not set 186# CONFIG_ARCH_SHARK is not set
177# CONFIG_ARCH_LH7A40X is not set 187# CONFIG_ARCH_LH7A40X is not set
188# CONFIG_ARCH_U300 is not set
178CONFIG_ARCH_DAVINCI=y 189CONFIG_ARCH_DAVINCI=y
179# CONFIG_ARCH_OMAP is not set 190# CONFIG_ARCH_OMAP is not set
180# CONFIG_ARCH_MSM is not set 191# CONFIG_ARCH_BCMRING is not set
181# CONFIG_ARCH_W90X900 is not set
182CONFIG_CP_INTC=y 192CONFIG_CP_INTC=y
183 193
184# 194#
@@ -191,7 +201,7 @@ CONFIG_CP_INTC=y
191# CONFIG_ARCH_DAVINCI_DM644x is not set 201# CONFIG_ARCH_DAVINCI_DM644x is not set
192# CONFIG_ARCH_DAVINCI_DM355 is not set 202# CONFIG_ARCH_DAVINCI_DM355 is not set
193# CONFIG_ARCH_DAVINCI_DM646x is not set 203# CONFIG_ARCH_DAVINCI_DM646x is not set
194# CONFIG_ARCH_DAVINCI_DA830 is not set 204CONFIG_ARCH_DAVINCI_DA830=y
195CONFIG_ARCH_DAVINCI_DA850=y 205CONFIG_ARCH_DAVINCI_DA850=y
196CONFIG_ARCH_DAVINCI_DA8XX=y 206CONFIG_ARCH_DAVINCI_DA8XX=y
197# CONFIG_ARCH_DAVINCI_DM365 is not set 207# CONFIG_ARCH_DAVINCI_DM365 is not set
@@ -199,7 +209,14 @@ CONFIG_ARCH_DAVINCI_DA8XX=y
199# 209#
200# DaVinci Board Type 210# DaVinci Board Type
201# 211#
212CONFIG_MACH_DAVINCI_DA830_EVM=y
213CONFIG_DA830_UI=y
214CONFIG_DA830_UI_LCD=y
215# CONFIG_DA830_UI_NAND is not set
202CONFIG_MACH_DAVINCI_DA850_EVM=y 216CONFIG_MACH_DAVINCI_DA850_EVM=y
217CONFIG_DA850_UI_EXP=y
218CONFIG_DA850_UI_NONE=y
219# CONFIG_DA850_UI_RMII is not set
203CONFIG_DAVINCI_MUX=y 220CONFIG_DAVINCI_MUX=y
204# CONFIG_DAVINCI_MUX_DEBUG is not set 221# CONFIG_DAVINCI_MUX_DEBUG is not set
205# CONFIG_DAVINCI_MUX_WARNINGS is not set 222# CONFIG_DAVINCI_MUX_WARNINGS is not set
@@ -212,7 +229,7 @@ CONFIG_CPU_32=y
212CONFIG_CPU_ARM926T=y 229CONFIG_CPU_ARM926T=y
213CONFIG_CPU_32v5=y 230CONFIG_CPU_32v5=y
214CONFIG_CPU_ABRT_EV5TJ=y 231CONFIG_CPU_ABRT_EV5TJ=y
215CONFIG_CPU_PABRT_NOIFAR=y 232CONFIG_CPU_PABRT_LEGACY=y
216CONFIG_CPU_CACHE_VIVT=y 233CONFIG_CPU_CACHE_VIVT=y
217CONFIG_CPU_COPY_V4WB=y 234CONFIG_CPU_COPY_V4WB=y
218CONFIG_CPU_TLB_V4WBI=y 235CONFIG_CPU_TLB_V4WBI=y
@@ -225,9 +242,9 @@ CONFIG_CPU_CP15_MMU=y
225CONFIG_ARM_THUMB=y 242CONFIG_ARM_THUMB=y
226# CONFIG_CPU_ICACHE_DISABLE is not set 243# CONFIG_CPU_ICACHE_DISABLE is not set
227# CONFIG_CPU_DCACHE_DISABLE is not set 244# CONFIG_CPU_DCACHE_DISABLE is not set
228# CONFIG_CPU_DCACHE_WRITETHROUGH is not set 245CONFIG_CPU_DCACHE_WRITETHROUGH=y
229# CONFIG_CPU_CACHE_ROUND_ROBIN is not set 246# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
230# CONFIG_OUTER_CACHE is not set 247CONFIG_ARM_L1_CACHE_SHIFT=5
231CONFIG_COMMON_CLKDEV=y 248CONFIG_COMMON_CLKDEV=y
232 249
233# 250#
@@ -248,11 +265,12 @@ CONFIG_VMSPLIT_3G=y
248# CONFIG_VMSPLIT_2G is not set 265# CONFIG_VMSPLIT_2G is not set
249# CONFIG_VMSPLIT_1G is not set 266# CONFIG_VMSPLIT_1G is not set
250CONFIG_PAGE_OFFSET=0xC0000000 267CONFIG_PAGE_OFFSET=0xC0000000
268# CONFIG_PREEMPT_NONE is not set
269# CONFIG_PREEMPT_VOLUNTARY is not set
251CONFIG_PREEMPT=y 270CONFIG_PREEMPT=y
252CONFIG_HZ=100 271CONFIG_HZ=100
253CONFIG_AEABI=y 272CONFIG_AEABI=y
254# CONFIG_OABI_COMPAT is not set 273# CONFIG_OABI_COMPAT is not set
255# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
256# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set 274# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
257# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set 275# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
258# CONFIG_HIGHMEM is not set 276# CONFIG_HIGHMEM is not set
@@ -268,12 +286,14 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096
268CONFIG_ZONE_DMA_FLAG=1 286CONFIG_ZONE_DMA_FLAG=1
269CONFIG_BOUNCE=y 287CONFIG_BOUNCE=y
270CONFIG_VIRT_TO_BUS=y 288CONFIG_VIRT_TO_BUS=y
271CONFIG_UNEVICTABLE_LRU=y
272CONFIG_HAVE_MLOCK=y 289CONFIG_HAVE_MLOCK=y
273CONFIG_HAVE_MLOCKED_PAGE_BIT=y 290CONFIG_HAVE_MLOCKED_PAGE_BIT=y
291# CONFIG_KSM is not set
292CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
274CONFIG_LEDS=y 293CONFIG_LEDS=y
275# CONFIG_LEDS_CPU is not set 294# CONFIG_LEDS_CPU is not set
276CONFIG_ALIGNMENT_TRAP=y 295CONFIG_ALIGNMENT_TRAP=y
296# CONFIG_UACCESS_WITH_MEMCPY is not set
277 297
278# 298#
279# Boot options 299# Boot options
@@ -287,7 +307,24 @@ CONFIG_CMDLINE=""
287# 307#
288# CPU Power Management 308# CPU Power Management
289# 309#
290# CONFIG_CPU_IDLE is not set 310CONFIG_CPU_FREQ=y
311CONFIG_CPU_FREQ_TABLE=y
312# CONFIG_CPU_FREQ_DEBUG is not set
313CONFIG_CPU_FREQ_STAT=y
314# CONFIG_CPU_FREQ_STAT_DETAILS is not set
315# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
316# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
317CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
318# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
319# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
320CONFIG_CPU_FREQ_GOV_PERFORMANCE=m
321CONFIG_CPU_FREQ_GOV_POWERSAVE=m
322CONFIG_CPU_FREQ_GOV_USERSPACE=y
323CONFIG_CPU_FREQ_GOV_ONDEMAND=m
324# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
325CONFIG_CPU_IDLE=y
326CONFIG_CPU_IDLE_GOV_LADDER=y
327CONFIG_CPU_IDLE_GOV_MENU=y
291 328
292# 329#
293# Floating point emulation 330# Floating point emulation
@@ -401,6 +438,7 @@ CONFIG_NETFILTER_ADVANCED=y
401# CONFIG_IP6_NF_IPTABLES is not set 438# CONFIG_IP6_NF_IPTABLES is not set
402# CONFIG_IP_DCCP is not set 439# CONFIG_IP_DCCP is not set
403# CONFIG_IP_SCTP is not set 440# CONFIG_IP_SCTP is not set
441# CONFIG_RDS is not set
404# CONFIG_TIPC is not set 442# CONFIG_TIPC is not set
405# CONFIG_ATM is not set 443# CONFIG_ATM is not set
406# CONFIG_BRIDGE is not set 444# CONFIG_BRIDGE is not set
@@ -415,6 +453,7 @@ CONFIG_NETFILTER_ADVANCED=y
415# CONFIG_ECONET is not set 453# CONFIG_ECONET is not set
416# CONFIG_WAN_ROUTER is not set 454# CONFIG_WAN_ROUTER is not set
417# CONFIG_PHONET is not set 455# CONFIG_PHONET is not set
456# CONFIG_IEEE802154 is not set
418# CONFIG_NET_SCHED is not set 457# CONFIG_NET_SCHED is not set
419# CONFIG_DCB is not set 458# CONFIG_DCB is not set
420 459
@@ -440,6 +479,7 @@ CONFIG_NETFILTER_ADVANCED=y
440# Generic Driver Options 479# Generic Driver Options
441# 480#
442CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 481CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
482# CONFIG_DEVTMPFS is not set
443CONFIG_STANDALONE=y 483CONFIG_STANDALONE=y
444CONFIG_PREVENT_FIRMWARE_BUILD=y 484CONFIG_PREVENT_FIRMWARE_BUILD=y
445# CONFIG_FW_LOADER is not set 485# CONFIG_FW_LOADER is not set
@@ -460,6 +500,7 @@ CONFIG_BLK_DEV_RAM_SIZE=32768
460# CONFIG_BLK_DEV_XIP is not set 500# CONFIG_BLK_DEV_XIP is not set
461# CONFIG_CDROM_PKTCDVD is not set 501# CONFIG_CDROM_PKTCDVD is not set
462# CONFIG_ATA_OVER_ETH is not set 502# CONFIG_ATA_OVER_ETH is not set
503# CONFIG_MG_DISK is not set
463CONFIG_MISC_DEVICES=y 504CONFIG_MISC_DEVICES=y
464# CONFIG_ICS932S401 is not set 505# CONFIG_ICS932S401 is not set
465# CONFIG_ENCLOSURE_SERVICES is not set 506# CONFIG_ENCLOSURE_SERVICES is not set
@@ -471,6 +512,7 @@ CONFIG_MISC_DEVICES=y
471# 512#
472CONFIG_EEPROM_AT24=y 513CONFIG_EEPROM_AT24=y
473# CONFIG_EEPROM_LEGACY is not set 514# CONFIG_EEPROM_LEGACY is not set
515# CONFIG_EEPROM_MAX6875 is not set
474# CONFIG_EEPROM_93CX6 is not set 516# CONFIG_EEPROM_93CX6 is not set
475CONFIG_HAVE_IDE=y 517CONFIG_HAVE_IDE=y
476# CONFIG_IDE is not set 518# CONFIG_IDE is not set
@@ -494,10 +536,6 @@ CONFIG_BLK_DEV_SD=m
494# CONFIG_BLK_DEV_SR is not set 536# CONFIG_BLK_DEV_SR is not set
495# CONFIG_CHR_DEV_SG is not set 537# CONFIG_CHR_DEV_SG is not set
496# CONFIG_CHR_DEV_SCH is not set 538# CONFIG_CHR_DEV_SCH is not set
497
498#
499# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
500#
501# CONFIG_SCSI_MULTI_LUN is not set 539# CONFIG_SCSI_MULTI_LUN is not set
502# CONFIG_SCSI_CONSTANTS is not set 540# CONFIG_SCSI_CONSTANTS is not set
503# CONFIG_SCSI_LOGGING is not set 541# CONFIG_SCSI_LOGGING is not set
@@ -522,7 +560,6 @@ CONFIG_SCSI_LOWLEVEL=y
522# CONFIG_ATA is not set 560# CONFIG_ATA is not set
523# CONFIG_MD is not set 561# CONFIG_MD is not set
524CONFIG_NETDEVICES=y 562CONFIG_NETDEVICES=y
525CONFIG_COMPAT_NET_DEV_OPS=y
526# CONFIG_DUMMY is not set 563# CONFIG_DUMMY is not set
527# CONFIG_BONDING is not set 564# CONFIG_BONDING is not set
528# CONFIG_MACVLAN is not set 565# CONFIG_MACVLAN is not set
@@ -553,7 +590,7 @@ CONFIG_NET_ETHERNET=y
553CONFIG_MII=y 590CONFIG_MII=y
554# CONFIG_AX88796 is not set 591# CONFIG_AX88796 is not set
555# CONFIG_SMC91X is not set 592# CONFIG_SMC91X is not set
556# CONFIG_TI_DAVINCI_EMAC is not set 593CONFIG_TI_DAVINCI_EMAC=y
557# CONFIG_DM9000 is not set 594# CONFIG_DM9000 is not set
558# CONFIG_ETHOC is not set 595# CONFIG_ETHOC is not set
559# CONFIG_SMC911X is not set 596# CONFIG_SMC911X is not set
@@ -567,12 +604,11 @@ CONFIG_MII=y
567# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 604# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
568# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 605# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
569# CONFIG_B44 is not set 606# CONFIG_B44 is not set
607# CONFIG_KS8842 is not set
608# CONFIG_KS8851_MLL is not set
570# CONFIG_NETDEV_1000 is not set 609# CONFIG_NETDEV_1000 is not set
571# CONFIG_NETDEV_10000 is not set 610# CONFIG_NETDEV_10000 is not set
572 611CONFIG_WLAN=y
573#
574# Wireless LAN
575#
576# CONFIG_WLAN_PRE80211 is not set 612# CONFIG_WLAN_PRE80211 is not set
577# CONFIG_WLAN_80211 is not set 613# CONFIG_WLAN_80211 is not set
578 614
@@ -588,6 +624,7 @@ CONFIG_NETPOLL=y
588CONFIG_NETPOLL_TRAP=y 624CONFIG_NETPOLL_TRAP=y
589CONFIG_NET_POLL_CONTROLLER=y 625CONFIG_NET_POLL_CONTROLLER=y
590# CONFIG_ISDN is not set 626# CONFIG_ISDN is not set
627# CONFIG_PHONE is not set
591 628
592# 629#
593# Input device support 630# Input device support
@@ -611,23 +648,30 @@ CONFIG_INPUT_EVBUG=m
611# Input Device Drivers 648# Input Device Drivers
612# 649#
613CONFIG_INPUT_KEYBOARD=y 650CONFIG_INPUT_KEYBOARD=y
651# CONFIG_KEYBOARD_ADP5588 is not set
614CONFIG_KEYBOARD_ATKBD=m 652CONFIG_KEYBOARD_ATKBD=m
615# CONFIG_KEYBOARD_SUNKBD is not set 653# CONFIG_QT2160 is not set
616# CONFIG_KEYBOARD_LKKBD is not set 654# CONFIG_KEYBOARD_LKKBD is not set
617CONFIG_KEYBOARD_XTKBD=m 655CONFIG_KEYBOARD_GPIO=y
656# CONFIG_KEYBOARD_MATRIX is not set
657# CONFIG_KEYBOARD_MAX7359 is not set
618# CONFIG_KEYBOARD_NEWTON is not set 658# CONFIG_KEYBOARD_NEWTON is not set
659# CONFIG_KEYBOARD_OPENCORES is not set
619# CONFIG_KEYBOARD_STOWAWAY is not set 660# CONFIG_KEYBOARD_STOWAWAY is not set
620CONFIG_KEYBOARD_GPIO=y 661# CONFIG_KEYBOARD_SUNKBD is not set
662CONFIG_KEYBOARD_XTKBD=m
621# CONFIG_INPUT_MOUSE is not set 663# CONFIG_INPUT_MOUSE is not set
622# CONFIG_INPUT_JOYSTICK is not set 664# CONFIG_INPUT_JOYSTICK is not set
623# CONFIG_INPUT_TABLET is not set 665# CONFIG_INPUT_TABLET is not set
624CONFIG_INPUT_TOUCHSCREEN=y 666CONFIG_INPUT_TOUCHSCREEN=y
625# CONFIG_TOUCHSCREEN_AD7879_I2C is not set 667# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
626# CONFIG_TOUCHSCREEN_AD7879 is not set 668# CONFIG_TOUCHSCREEN_AD7879 is not set
669# CONFIG_TOUCHSCREEN_EETI is not set
627# CONFIG_TOUCHSCREEN_FUJITSU is not set 670# CONFIG_TOUCHSCREEN_FUJITSU is not set
628# CONFIG_TOUCHSCREEN_GUNZE is not set 671# CONFIG_TOUCHSCREEN_GUNZE is not set
629# CONFIG_TOUCHSCREEN_ELO is not set 672# CONFIG_TOUCHSCREEN_ELO is not set
630# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set 673# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
674# CONFIG_TOUCHSCREEN_MCS5000 is not set
631# CONFIG_TOUCHSCREEN_MTOUCH is not set 675# CONFIG_TOUCHSCREEN_MTOUCH is not set
632# CONFIG_TOUCHSCREEN_INEXIO is not set 676# CONFIG_TOUCHSCREEN_INEXIO is not set
633# CONFIG_TOUCHSCREEN_MK712 is not set 677# CONFIG_TOUCHSCREEN_MK712 is not set
@@ -636,6 +680,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
636# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 680# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
637# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 681# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
638# CONFIG_TOUCHSCREEN_TSC2007 is not set 682# CONFIG_TOUCHSCREEN_TSC2007 is not set
683# CONFIG_TOUCHSCREEN_W90X900 is not set
639# CONFIG_INPUT_MISC is not set 684# CONFIG_INPUT_MISC is not set
640 685
641# 686#
@@ -684,6 +729,7 @@ CONFIG_HW_RANDOM=m
684# CONFIG_TCG_TPM is not set 729# CONFIG_TCG_TPM is not set
685CONFIG_I2C=y 730CONFIG_I2C=y
686CONFIG_I2C_BOARDINFO=y 731CONFIG_I2C_BOARDINFO=y
732CONFIG_I2C_COMPAT=y
687CONFIG_I2C_CHARDEV=y 733CONFIG_I2C_CHARDEV=y
688CONFIG_I2C_HELPER_AUTO=y 734CONFIG_I2C_HELPER_AUTO=y
689 735
@@ -695,6 +741,7 @@ CONFIG_I2C_HELPER_AUTO=y
695# I2C system bus drivers (mostly embedded / system-on-chip) 741# I2C system bus drivers (mostly embedded / system-on-chip)
696# 742#
697CONFIG_I2C_DAVINCI=y 743CONFIG_I2C_DAVINCI=y
744# CONFIG_I2C_DESIGNWARE is not set
698# CONFIG_I2C_GPIO is not set 745# CONFIG_I2C_GPIO is not set
699# CONFIG_I2C_OCORES is not set 746# CONFIG_I2C_OCORES is not set
700# CONFIG_I2C_SIMTEC is not set 747# CONFIG_I2C_SIMTEC is not set
@@ -715,14 +762,17 @@ CONFIG_I2C_DAVINCI=y
715# Miscellaneous I2C Chip support 762# Miscellaneous I2C Chip support
716# 763#
717# CONFIG_DS1682 is not set 764# CONFIG_DS1682 is not set
718# CONFIG_SENSORS_PCA9539 is not set
719# CONFIG_SENSORS_MAX6875 is not set
720# CONFIG_SENSORS_TSL2550 is not set 765# CONFIG_SENSORS_TSL2550 is not set
721# CONFIG_I2C_DEBUG_CORE is not set 766# CONFIG_I2C_DEBUG_CORE is not set
722# CONFIG_I2C_DEBUG_ALGO is not set 767# CONFIG_I2C_DEBUG_ALGO is not set
723# CONFIG_I2C_DEBUG_BUS is not set 768# CONFIG_I2C_DEBUG_BUS is not set
724# CONFIG_I2C_DEBUG_CHIP is not set 769# CONFIG_I2C_DEBUG_CHIP is not set
725# CONFIG_SPI is not set 770# CONFIG_SPI is not set
771
772#
773# PPS support
774#
775# CONFIG_PPS is not set
726CONFIG_ARCH_REQUIRE_GPIOLIB=y 776CONFIG_ARCH_REQUIRE_GPIOLIB=y
727CONFIG_GPIOLIB=y 777CONFIG_GPIOLIB=y
728# CONFIG_DEBUG_GPIO is not set 778# CONFIG_DEBUG_GPIO is not set
@@ -736,8 +786,8 @@ CONFIG_GPIOLIB=y
736# I2C GPIO expanders: 786# I2C GPIO expanders:
737# 787#
738# CONFIG_GPIO_MAX732X is not set 788# CONFIG_GPIO_MAX732X is not set
739# CONFIG_GPIO_PCA953X is not set 789CONFIG_GPIO_PCA953X=y
740CONFIG_GPIO_PCF857X=m 790CONFIG_GPIO_PCF857X=y
741 791
742# 792#
743# PCI GPIO expanders: 793# PCI GPIO expanders:
@@ -746,11 +796,14 @@ CONFIG_GPIO_PCF857X=m
746# 796#
747# SPI GPIO expanders: 797# SPI GPIO expanders:
748# 798#
799
800#
801# AC97 GPIO expanders:
802#
749# CONFIG_W1 is not set 803# CONFIG_W1 is not set
750# CONFIG_POWER_SUPPLY is not set 804# CONFIG_POWER_SUPPLY is not set
751# CONFIG_HWMON is not set 805# CONFIG_HWMON is not set
752# CONFIG_THERMAL is not set 806# CONFIG_THERMAL is not set
753# CONFIG_THERMAL_HWMON is not set
754CONFIG_WATCHDOG=y 807CONFIG_WATCHDOG=y
755# CONFIG_WATCHDOG_NOWAYOUT is not set 808# CONFIG_WATCHDOG_NOWAYOUT is not set
756 809
@@ -782,31 +835,56 @@ CONFIG_SSB_POSSIBLE=y
782# CONFIG_MFD_TC6393XB is not set 835# CONFIG_MFD_TC6393XB is not set
783# CONFIG_PMIC_DA903X is not set 836# CONFIG_PMIC_DA903X is not set
784# CONFIG_MFD_WM8400 is not set 837# CONFIG_MFD_WM8400 is not set
838# CONFIG_MFD_WM831X is not set
785# CONFIG_MFD_WM8350_I2C is not set 839# CONFIG_MFD_WM8350_I2C is not set
786# CONFIG_MFD_PCF50633 is not set 840# CONFIG_MFD_PCF50633 is not set
787 841# CONFIG_AB3100_CORE is not set
788# 842CONFIG_REGULATOR=y
789# Multimedia devices 843# CONFIG_REGULATOR_DEBUG is not set
790# 844# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
791 845# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
792# 846# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
793# Multimedia core support 847# CONFIG_REGULATOR_BQ24022 is not set
794# 848# CONFIG_REGULATOR_MAX1586 is not set
795# CONFIG_VIDEO_DEV is not set 849# CONFIG_REGULATOR_LP3971 is not set
796# CONFIG_DVB_CORE is not set 850# CONFIG_REGULATOR_TPS65023 is not set
797# CONFIG_VIDEO_MEDIA is not set 851CONFIG_REGULATOR_TPS6507X=y
798 852# CONFIG_MEDIA_SUPPORT is not set
799#
800# Multimedia drivers
801#
802# CONFIG_DAB is not set
803 853
804# 854#
805# Graphics support 855# Graphics support
806# 856#
807# CONFIG_VGASTATE is not set 857# CONFIG_VGASTATE is not set
808# CONFIG_VIDEO_OUTPUT_CONTROL is not set 858# CONFIG_VIDEO_OUTPUT_CONTROL is not set
809# CONFIG_FB is not set 859CONFIG_FB=y
860# CONFIG_FIRMWARE_EDID is not set
861# CONFIG_FB_DDC is not set
862# CONFIG_FB_BOOT_VESA_SUPPORT is not set
863CONFIG_FB_CFB_FILLRECT=y
864CONFIG_FB_CFB_COPYAREA=y
865CONFIG_FB_CFB_IMAGEBLIT=y
866# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
867# CONFIG_FB_SYS_FILLRECT is not set
868# CONFIG_FB_SYS_COPYAREA is not set
869# CONFIG_FB_SYS_IMAGEBLIT is not set
870# CONFIG_FB_FOREIGN_ENDIAN is not set
871# CONFIG_FB_SYS_FOPS is not set
872# CONFIG_FB_SVGALIB is not set
873# CONFIG_FB_MACMODES is not set
874# CONFIG_FB_BACKLIGHT is not set
875# CONFIG_FB_MODE_HELPERS is not set
876# CONFIG_FB_TILEBLITTING is not set
877
878#
879# Frame buffer hardware drivers
880#
881# CONFIG_FB_S1D13XXX is not set
882# CONFIG_FB_DAVINCI is not set
883# CONFIG_FB_VIRTUAL is not set
884CONFIG_FB_DA8XX=y
885# CONFIG_FB_METRONOME is not set
886# CONFIG_FB_MB862XX is not set
887# CONFIG_FB_BROADSHEET is not set
810# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 888# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
811 889
812# 890#
@@ -819,6 +897,16 @@ CONFIG_SSB_POSSIBLE=y
819# 897#
820# CONFIG_VGA_CONSOLE is not set 898# CONFIG_VGA_CONSOLE is not set
821CONFIG_DUMMY_CONSOLE=y 899CONFIG_DUMMY_CONSOLE=y
900CONFIG_FRAMEBUFFER_CONSOLE=y
901# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
902# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
903# CONFIG_FONTS is not set
904CONFIG_FONT_8x8=y
905CONFIG_FONT_8x16=y
906CONFIG_LOGO=y
907CONFIG_LOGO_LINUX_MONO=y
908CONFIG_LOGO_LINUX_VGA16=y
909CONFIG_LOGO_LINUX_CLUT224=y
822CONFIG_SOUND=m 910CONFIG_SOUND=m
823# CONFIG_SOUND_OSS_CORE is not set 911# CONFIG_SOUND_OSS_CORE is not set
824CONFIG_SND=m 912CONFIG_SND=m
@@ -834,6 +922,11 @@ CONFIG_SND_SUPPORT_OLD_API=y
834CONFIG_SND_VERBOSE_PROCFS=y 922CONFIG_SND_VERBOSE_PROCFS=y
835# CONFIG_SND_VERBOSE_PRINTK is not set 923# CONFIG_SND_VERBOSE_PRINTK is not set
836# CONFIG_SND_DEBUG is not set 924# CONFIG_SND_DEBUG is not set
925# CONFIG_SND_RAWMIDI_SEQ is not set
926# CONFIG_SND_OPL3_LIB_SEQ is not set
927# CONFIG_SND_OPL4_LIB_SEQ is not set
928# CONFIG_SND_SBAWE_SEQ is not set
929# CONFIG_SND_EMU10K1_SEQ is not set
837CONFIG_SND_DRIVERS=y 930CONFIG_SND_DRIVERS=y
838# CONFIG_SND_DUMMY is not set 931# CONFIG_SND_DUMMY is not set
839# CONFIG_SND_MTPAV is not set 932# CONFIG_SND_MTPAV is not set
@@ -842,6 +935,8 @@ CONFIG_SND_DRIVERS=y
842CONFIG_SND_ARM=y 935CONFIG_SND_ARM=y
843CONFIG_SND_SOC=m 936CONFIG_SND_SOC=m
844CONFIG_SND_DAVINCI_SOC=m 937CONFIG_SND_DAVINCI_SOC=m
938# CONFIG_SND_DA830_SOC_EVM is not set
939# CONFIG_SND_DA850_SOC_EVM is not set
845CONFIG_SND_SOC_I2C_AND_SPI=m 940CONFIG_SND_SOC_I2C_AND_SPI=m
846# CONFIG_SND_SOC_ALL_CODECS is not set 941# CONFIG_SND_SOC_ALL_CODECS is not set
847# CONFIG_SOUND_PRIME is not set 942# CONFIG_SOUND_PRIME is not set
@@ -849,14 +944,17 @@ CONFIG_SND_SOC_I2C_AND_SPI=m
849# CONFIG_USB_SUPPORT is not set 944# CONFIG_USB_SUPPORT is not set
850# CONFIG_MMC is not set 945# CONFIG_MMC is not set
851# CONFIG_MEMSTICK is not set 946# CONFIG_MEMSTICK is not set
852# CONFIG_ACCESSIBILITY is not set
853# CONFIG_NEW_LEDS is not set 947# CONFIG_NEW_LEDS is not set
948# CONFIG_ACCESSIBILITY is not set
854CONFIG_RTC_LIB=y 949CONFIG_RTC_LIB=y
855# CONFIG_RTC_CLASS is not set 950# CONFIG_RTC_CLASS is not set
856# CONFIG_DMADEVICES is not set 951# CONFIG_DMADEVICES is not set
857# CONFIG_AUXDISPLAY is not set 952# CONFIG_AUXDISPLAY is not set
858# CONFIG_REGULATOR is not set
859# CONFIG_UIO is not set 953# CONFIG_UIO is not set
954
955#
956# TI VLYNQ
957#
860# CONFIG_STAGING is not set 958# CONFIG_STAGING is not set
861 959
862# 960#
@@ -877,14 +975,17 @@ CONFIG_FS_MBCACHE=y
877# CONFIG_REISERFS_FS is not set 975# CONFIG_REISERFS_FS is not set
878# CONFIG_JFS_FS is not set 976# CONFIG_JFS_FS is not set
879# CONFIG_FS_POSIX_ACL is not set 977# CONFIG_FS_POSIX_ACL is not set
880CONFIG_FILE_LOCKING=y
881CONFIG_XFS_FS=m 978CONFIG_XFS_FS=m
882# CONFIG_XFS_QUOTA is not set 979# CONFIG_XFS_QUOTA is not set
883# CONFIG_XFS_POSIX_ACL is not set 980# CONFIG_XFS_POSIX_ACL is not set
884# CONFIG_XFS_RT is not set 981# CONFIG_XFS_RT is not set
885# CONFIG_XFS_DEBUG is not set 982# CONFIG_XFS_DEBUG is not set
983# CONFIG_GFS2_FS is not set
886# CONFIG_OCFS2_FS is not set 984# CONFIG_OCFS2_FS is not set
887# CONFIG_BTRFS_FS is not set 985# CONFIG_BTRFS_FS is not set
986# CONFIG_NILFS2_FS is not set
987CONFIG_FILE_LOCKING=y
988CONFIG_FSNOTIFY=y
888CONFIG_DNOTIFY=y 989CONFIG_DNOTIFY=y
889CONFIG_INOTIFY=y 990CONFIG_INOTIFY=y
890CONFIG_INOTIFY_USER=y 991CONFIG_INOTIFY_USER=y
@@ -943,7 +1044,6 @@ CONFIG_MINIX_FS=m
943# CONFIG_ROMFS_FS is not set 1044# CONFIG_ROMFS_FS is not set
944# CONFIG_SYSV_FS is not set 1045# CONFIG_SYSV_FS is not set
945# CONFIG_UFS_FS is not set 1046# CONFIG_UFS_FS is not set
946# CONFIG_NILFS2_FS is not set
947CONFIG_NETWORK_FILESYSTEMS=y 1047CONFIG_NETWORK_FILESYSTEMS=y
948CONFIG_NFS_FS=y 1048CONFIG_NFS_FS=y
949CONFIG_NFS_V3=y 1049CONFIG_NFS_V3=y
@@ -1039,6 +1139,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1039CONFIG_ENABLE_MUST_CHECK=y 1139CONFIG_ENABLE_MUST_CHECK=y
1040CONFIG_FRAME_WARN=1024 1140CONFIG_FRAME_WARN=1024
1041# CONFIG_MAGIC_SYSRQ is not set 1141# CONFIG_MAGIC_SYSRQ is not set
1142# CONFIG_STRIP_ASM_SYMS is not set
1042# CONFIG_UNUSED_SYMBOLS is not set 1143# CONFIG_UNUSED_SYMBOLS is not set
1043CONFIG_DEBUG_FS=y 1144CONFIG_DEBUG_FS=y
1044# CONFIG_HEADERS_CHECK is not set 1145# CONFIG_HEADERS_CHECK is not set
@@ -1056,6 +1157,7 @@ CONFIG_TIMER_STATS=y
1056# CONFIG_DEBUG_OBJECTS is not set 1157# CONFIG_DEBUG_OBJECTS is not set
1057# CONFIG_SLUB_DEBUG_ON is not set 1158# CONFIG_SLUB_DEBUG_ON is not set
1058# CONFIG_SLUB_STATS is not set 1159# CONFIG_SLUB_STATS is not set
1160# CONFIG_DEBUG_KMEMLEAK is not set
1059CONFIG_DEBUG_PREEMPT=y 1161CONFIG_DEBUG_PREEMPT=y
1060CONFIG_DEBUG_RT_MUTEXES=y 1162CONFIG_DEBUG_RT_MUTEXES=y
1061CONFIG_DEBUG_PI_LIST=y 1163CONFIG_DEBUG_PI_LIST=y
@@ -1076,29 +1178,29 @@ CONFIG_DEBUG_BUGVERBOSE=y
1076# CONFIG_DEBUG_LIST is not set 1178# CONFIG_DEBUG_LIST is not set
1077# CONFIG_DEBUG_SG is not set 1179# CONFIG_DEBUG_SG is not set
1078# CONFIG_DEBUG_NOTIFIERS is not set 1180# CONFIG_DEBUG_NOTIFIERS is not set
1181# CONFIG_DEBUG_CREDENTIALS is not set
1079# CONFIG_BOOT_PRINTK_DELAY is not set 1182# CONFIG_BOOT_PRINTK_DELAY is not set
1080# CONFIG_RCU_TORTURE_TEST is not set 1183# CONFIG_RCU_TORTURE_TEST is not set
1081# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1184# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1082# CONFIG_BACKTRACE_SELF_TEST is not set 1185# CONFIG_BACKTRACE_SELF_TEST is not set
1083# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1186# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1187# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1084# CONFIG_FAULT_INJECTION is not set 1188# CONFIG_FAULT_INJECTION is not set
1085# CONFIG_LATENCYTOP is not set 1189# CONFIG_LATENCYTOP is not set
1086# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1190# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1087# CONFIG_PAGE_POISONING is not set 1191# CONFIG_PAGE_POISONING is not set
1088CONFIG_HAVE_FUNCTION_TRACER=y 1192CONFIG_HAVE_FUNCTION_TRACER=y
1089CONFIG_TRACING_SUPPORT=y 1193CONFIG_TRACING_SUPPORT=y
1090 1194CONFIG_FTRACE=y
1091#
1092# Tracers
1093#
1094# CONFIG_FUNCTION_TRACER is not set 1195# CONFIG_FUNCTION_TRACER is not set
1095# CONFIG_IRQSOFF_TRACER is not set 1196# CONFIG_IRQSOFF_TRACER is not set
1096# CONFIG_PREEMPT_TRACER is not set 1197# CONFIG_PREEMPT_TRACER is not set
1097# CONFIG_SCHED_TRACER is not set 1198# CONFIG_SCHED_TRACER is not set
1098# CONFIG_CONTEXT_SWITCH_TRACER is not set 1199# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1099# CONFIG_EVENT_TRACER is not set
1100# CONFIG_BOOT_TRACER is not set 1200# CONFIG_BOOT_TRACER is not set
1101# CONFIG_TRACE_BRANCH_PROFILING is not set 1201CONFIG_BRANCH_PROFILE_NONE=y
1202# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1203# CONFIG_PROFILE_ALL_BRANCHES is not set
1102# CONFIG_STACK_TRACER is not set 1204# CONFIG_STACK_TRACER is not set
1103# CONFIG_KMEMTRACE is not set 1205# CONFIG_KMEMTRACE is not set
1104# CONFIG_WORKQUEUE_TRACER is not set 1206# CONFIG_WORKQUEUE_TRACER is not set
@@ -1125,7 +1227,6 @@ CONFIG_CRYPTO=y
1125# 1227#
1126# Crypto core or helper 1228# Crypto core or helper
1127# 1229#
1128# CONFIG_CRYPTO_FIPS is not set
1129# CONFIG_CRYPTO_MANAGER is not set 1230# CONFIG_CRYPTO_MANAGER is not set
1130# CONFIG_CRYPTO_MANAGER2 is not set 1231# CONFIG_CRYPTO_MANAGER2 is not set
1131# CONFIG_CRYPTO_GF128MUL is not set 1232# CONFIG_CRYPTO_GF128MUL is not set
@@ -1157,11 +1258,13 @@ CONFIG_CRYPTO=y
1157# 1258#
1158# CONFIG_CRYPTO_HMAC is not set 1259# CONFIG_CRYPTO_HMAC is not set
1159# CONFIG_CRYPTO_XCBC is not set 1260# CONFIG_CRYPTO_XCBC is not set
1261# CONFIG_CRYPTO_VMAC is not set
1160 1262
1161# 1263#
1162# Digest 1264# Digest
1163# 1265#
1164# CONFIG_CRYPTO_CRC32C is not set 1266# CONFIG_CRYPTO_CRC32C is not set
1267# CONFIG_CRYPTO_GHASH is not set
1165# CONFIG_CRYPTO_MD4 is not set 1268# CONFIG_CRYPTO_MD4 is not set
1166# CONFIG_CRYPTO_MD5 is not set 1269# CONFIG_CRYPTO_MD5 is not set
1167# CONFIG_CRYPTO_MICHAEL_MIC is not set 1270# CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index ddffe39d9f87..bd656e8e6e4c 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -1,14 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31-rc3-davinci1 3# Linux kernel version: 2.6.32-rc4
4# Fri Jul 17 08:26:52 2009 4# Mon Oct 12 14:13:12 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y 9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y 10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12CONFIG_GENERIC_HARDIRQS=y 11CONFIG_GENERIC_HARDIRQS=y
13CONFIG_STACKTRACE_SUPPORT=y 12CONFIG_STACKTRACE_SUPPORT=y
14CONFIG_HAVE_LATENCYTOP_SUPPORT=y 13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -46,11 +45,12 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
46# 45#
47# RCU Subsystem 46# RCU Subsystem
48# 47#
49CONFIG_CLASSIC_RCU=y 48CONFIG_TREE_RCU=y
50# CONFIG_TREE_RCU is not set 49# CONFIG_TREE_PREEMPT_RCU is not set
51# CONFIG_PREEMPT_RCU is not set 50# CONFIG_RCU_TRACE is not set
51CONFIG_RCU_FANOUT=32
52# CONFIG_RCU_FANOUT_EXACT is not set
52# CONFIG_TREE_RCU_TRACE is not set 53# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_PREEMPT_RCU_TRACE is not set
54CONFIG_IKCONFIG=y 54CONFIG_IKCONFIG=y
55CONFIG_IKCONFIG_PROC=y 55CONFIG_IKCONFIG_PROC=y
56CONFIG_LOG_BUF_SHIFT=14 56CONFIG_LOG_BUF_SHIFT=14
@@ -91,17 +91,15 @@ CONFIG_SHMEM=y
91CONFIG_AIO=y 91CONFIG_AIO=y
92 92
93# 93#
94# Performance Counters 94# Kernel Performance Events And Counters
95# 95#
96CONFIG_VM_EVENT_COUNTERS=y 96CONFIG_VM_EVENT_COUNTERS=y
97CONFIG_SLUB_DEBUG=y 97CONFIG_SLUB_DEBUG=y
98# CONFIG_STRIP_ASM_SYMS is not set
99CONFIG_COMPAT_BRK=y 98CONFIG_COMPAT_BRK=y
100# CONFIG_SLAB is not set 99# CONFIG_SLAB is not set
101CONFIG_SLUB=y 100CONFIG_SLUB=y
102# CONFIG_SLOB is not set 101# CONFIG_SLOB is not set
103# CONFIG_PROFILING is not set 102# CONFIG_PROFILING is not set
104# CONFIG_MARKERS is not set
105CONFIG_HAVE_OPROFILE=y 103CONFIG_HAVE_OPROFILE=y
106# CONFIG_KPROBES is not set 104# CONFIG_KPROBES is not set
107CONFIG_HAVE_KPROBES=y 105CONFIG_HAVE_KPROBES=y
@@ -145,6 +143,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
145# 143#
146# System Type 144# System Type
147# 145#
146CONFIG_MMU=y
148# CONFIG_ARCH_AAEC2000 is not set 147# CONFIG_ARCH_AAEC2000 is not set
149# CONFIG_ARCH_INTEGRATOR is not set 148# CONFIG_ARCH_INTEGRATOR is not set
150# CONFIG_ARCH_REALVIEW is not set 149# CONFIG_ARCH_REALVIEW is not set
@@ -159,6 +158,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
159# CONFIG_ARCH_STMP3XXX is not set 158# CONFIG_ARCH_STMP3XXX is not set
160# CONFIG_ARCH_NETX is not set 159# CONFIG_ARCH_NETX is not set
161# CONFIG_ARCH_H720X is not set 160# CONFIG_ARCH_H720X is not set
161# CONFIG_ARCH_NOMADIK is not set
162# CONFIG_ARCH_IOP13XX is not set 162# CONFIG_ARCH_IOP13XX is not set
163# CONFIG_ARCH_IOP32X is not set 163# CONFIG_ARCH_IOP32X is not set
164# CONFIG_ARCH_IOP33X is not set 164# CONFIG_ARCH_IOP33X is not set
@@ -181,11 +181,13 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
181# CONFIG_ARCH_SA1100 is not set 181# CONFIG_ARCH_SA1100 is not set
182# CONFIG_ARCH_S3C2410 is not set 182# CONFIG_ARCH_S3C2410 is not set
183# CONFIG_ARCH_S3C64XX is not set 183# CONFIG_ARCH_S3C64XX is not set
184# CONFIG_ARCH_S5PC1XX is not set
184# CONFIG_ARCH_SHARK is not set 185# CONFIG_ARCH_SHARK is not set
185# CONFIG_ARCH_LH7A40X is not set 186# CONFIG_ARCH_LH7A40X is not set
186# CONFIG_ARCH_U300 is not set 187# CONFIG_ARCH_U300 is not set
187CONFIG_ARCH_DAVINCI=y 188CONFIG_ARCH_DAVINCI=y
188# CONFIG_ARCH_OMAP is not set 189# CONFIG_ARCH_OMAP is not set
190# CONFIG_ARCH_BCMRING is not set
189CONFIG_AINTC=y 191CONFIG_AINTC=y
190CONFIG_ARCH_DAVINCI_DMx=y 192CONFIG_ARCH_DAVINCI_DMx=y
191 193
@@ -208,6 +210,7 @@ CONFIG_ARCH_DAVINCI_DM365=y
208# 210#
209CONFIG_MACH_DAVINCI_EVM=y 211CONFIG_MACH_DAVINCI_EVM=y
210CONFIG_MACH_SFFSDR=y 212CONFIG_MACH_SFFSDR=y
213CONFIG_MACH_NEUROS_OSD2=y
211CONFIG_MACH_DAVINCI_DM355_EVM=y 214CONFIG_MACH_DAVINCI_DM355_EVM=y
212CONFIG_MACH_DM355_LEOPARD=y 215CONFIG_MACH_DM355_LEOPARD=y
213CONFIG_MACH_DAVINCI_DM6467_EVM=y 216CONFIG_MACH_DAVINCI_DM6467_EVM=y
@@ -224,7 +227,7 @@ CONFIG_CPU_32=y
224CONFIG_CPU_ARM926T=y 227CONFIG_CPU_ARM926T=y
225CONFIG_CPU_32v5=y 228CONFIG_CPU_32v5=y
226CONFIG_CPU_ABRT_EV5TJ=y 229CONFIG_CPU_ABRT_EV5TJ=y
227CONFIG_CPU_PABRT_NOIFAR=y 230CONFIG_CPU_PABRT_LEGACY=y
228CONFIG_CPU_CACHE_VIVT=y 231CONFIG_CPU_CACHE_VIVT=y
229CONFIG_CPU_COPY_V4WB=y 232CONFIG_CPU_COPY_V4WB=y
230CONFIG_CPU_TLB_V4WBI=y 233CONFIG_CPU_TLB_V4WBI=y
@@ -239,6 +242,7 @@ CONFIG_ARM_THUMB=y
239# CONFIG_CPU_DCACHE_DISABLE is not set 242# CONFIG_CPU_DCACHE_DISABLE is not set
240# CONFIG_CPU_DCACHE_WRITETHROUGH is not set 243# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
241# CONFIG_CPU_CACHE_ROUND_ROBIN is not set 244# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
245CONFIG_ARM_L1_CACHE_SHIFT=5
242CONFIG_COMMON_CLKDEV=y 246CONFIG_COMMON_CLKDEV=y
243 247
244# 248#
@@ -259,6 +263,8 @@ CONFIG_VMSPLIT_3G=y
259# CONFIG_VMSPLIT_2G is not set 263# CONFIG_VMSPLIT_2G is not set
260# CONFIG_VMSPLIT_1G is not set 264# CONFIG_VMSPLIT_1G is not set
261CONFIG_PAGE_OFFSET=0xC0000000 265CONFIG_PAGE_OFFSET=0xC0000000
266# CONFIG_PREEMPT_NONE is not set
267# CONFIG_PREEMPT_VOLUNTARY is not set
262CONFIG_PREEMPT=y 268CONFIG_PREEMPT=y
263CONFIG_HZ=100 269CONFIG_HZ=100
264CONFIG_AEABI=y 270CONFIG_AEABI=y
@@ -280,6 +286,7 @@ CONFIG_BOUNCE=y
280CONFIG_VIRT_TO_BUS=y 286CONFIG_VIRT_TO_BUS=y
281CONFIG_HAVE_MLOCK=y 287CONFIG_HAVE_MLOCK=y
282CONFIG_HAVE_MLOCKED_PAGE_BIT=y 288CONFIG_HAVE_MLOCKED_PAGE_BIT=y
289# CONFIG_KSM is not set
283CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 290CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
284CONFIG_LEDS=y 291CONFIG_LEDS=y
285# CONFIG_LEDS_CPU is not set 292# CONFIG_LEDS_CPU is not set
@@ -412,6 +419,7 @@ CONFIG_NETFILTER_ADVANCED=y
412# CONFIG_IP6_NF_IPTABLES is not set 419# CONFIG_IP6_NF_IPTABLES is not set
413# CONFIG_IP_DCCP is not set 420# CONFIG_IP_DCCP is not set
414# CONFIG_IP_SCTP is not set 421# CONFIG_IP_SCTP is not set
422# CONFIG_RDS is not set
415# CONFIG_TIPC is not set 423# CONFIG_TIPC is not set
416# CONFIG_ATM is not set 424# CONFIG_ATM is not set
417# CONFIG_BRIDGE is not set 425# CONFIG_BRIDGE is not set
@@ -452,6 +460,7 @@ CONFIG_NETFILTER_ADVANCED=y
452# Generic Driver Options 460# Generic Driver Options
453# 461#
454CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 462CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
463# CONFIG_DEVTMPFS is not set
455CONFIG_STANDALONE=y 464CONFIG_STANDALONE=y
456CONFIG_PREVENT_FIRMWARE_BUILD=y 465CONFIG_PREVENT_FIRMWARE_BUILD=y
457# CONFIG_FW_LOADER is not set 466# CONFIG_FW_LOADER is not set
@@ -461,9 +470,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
461# CONFIG_CONNECTOR is not set 470# CONFIG_CONNECTOR is not set
462CONFIG_MTD=m 471CONFIG_MTD=m
463# CONFIG_MTD_DEBUG is not set 472# CONFIG_MTD_DEBUG is not set
473# CONFIG_MTD_TESTS is not set
464# CONFIG_MTD_CONCAT is not set 474# CONFIG_MTD_CONCAT is not set
465CONFIG_MTD_PARTITIONS=y 475CONFIG_MTD_PARTITIONS=y
466# CONFIG_MTD_TESTS is not set
467# CONFIG_MTD_REDBOOT_PARTS is not set 476# CONFIG_MTD_REDBOOT_PARTS is not set
468# CONFIG_MTD_AFS_PARTS is not set 477# CONFIG_MTD_AFS_PARTS is not set
469# CONFIG_MTD_AR7_PARTS is not set 478# CONFIG_MTD_AR7_PARTS is not set
@@ -499,7 +508,7 @@ CONFIG_MTD_CFI_I1=y
499CONFIG_MTD_CFI_I2=y 508CONFIG_MTD_CFI_I2=y
500# CONFIG_MTD_CFI_I4 is not set 509# CONFIG_MTD_CFI_I4 is not set
501# CONFIG_MTD_CFI_I8 is not set 510# CONFIG_MTD_CFI_I8 is not set
502# CONFIG_MTD_CFI_INTELEXT is not set 511CONFIG_MTD_CFI_INTELEXT=m
503CONFIG_MTD_CFI_AMDSTD=m 512CONFIG_MTD_CFI_AMDSTD=m
504# CONFIG_MTD_CFI_STAA is not set 513# CONFIG_MTD_CFI_STAA is not set
505CONFIG_MTD_CFI_UTIL=m 514CONFIG_MTD_CFI_UTIL=m
@@ -694,12 +703,10 @@ CONFIG_DM9000_DEBUGLEVEL=4
694# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 703# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
695# CONFIG_B44 is not set 704# CONFIG_B44 is not set
696# CONFIG_KS8842 is not set 705# CONFIG_KS8842 is not set
706# CONFIG_KS8851_MLL is not set
697# CONFIG_NETDEV_1000 is not set 707# CONFIG_NETDEV_1000 is not set
698# CONFIG_NETDEV_10000 is not set 708# CONFIG_NETDEV_10000 is not set
699 709CONFIG_WLAN=y
700#
701# Wireless LAN
702#
703# CONFIG_WLAN_PRE80211 is not set 710# CONFIG_WLAN_PRE80211 is not set
704# CONFIG_WLAN_80211 is not set 711# CONFIG_WLAN_80211 is not set
705 712
@@ -734,6 +741,7 @@ CONFIG_NETPOLL=y
734CONFIG_NETPOLL_TRAP=y 741CONFIG_NETPOLL_TRAP=y
735CONFIG_NET_POLL_CONTROLLER=y 742CONFIG_NET_POLL_CONTROLLER=y
736# CONFIG_ISDN is not set 743# CONFIG_ISDN is not set
744# CONFIG_PHONE is not set
737 745
738# 746#
739# Input device support 747# Input device support
@@ -745,10 +753,7 @@ CONFIG_INPUT=y
745# 753#
746# Userland interfaces 754# Userland interfaces
747# 755#
748CONFIG_INPUT_MOUSEDEV=m 756# CONFIG_INPUT_MOUSEDEV is not set
749CONFIG_INPUT_MOUSEDEV_PSAUX=y
750CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
751CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
752# CONFIG_INPUT_JOYDEV is not set 757# CONFIG_INPUT_JOYDEV is not set
753CONFIG_INPUT_EVDEV=m 758CONFIG_INPUT_EVDEV=m
754CONFIG_INPUT_EVBUG=m 759CONFIG_INPUT_EVBUG=m
@@ -757,12 +762,16 @@ CONFIG_INPUT_EVBUG=m
757# Input Device Drivers 762# Input Device Drivers
758# 763#
759CONFIG_INPUT_KEYBOARD=y 764CONFIG_INPUT_KEYBOARD=y
765# CONFIG_KEYBOARD_ADP5588 is not set
760CONFIG_KEYBOARD_ATKBD=m 766CONFIG_KEYBOARD_ATKBD=m
767# CONFIG_QT2160 is not set
761# CONFIG_KEYBOARD_LKKBD is not set 768# CONFIG_KEYBOARD_LKKBD is not set
762CONFIG_KEYBOARD_GPIO=y 769CONFIG_KEYBOARD_GPIO=y
763# CONFIG_KEYBOARD_MATRIX is not set 770# CONFIG_KEYBOARD_MATRIX is not set
764# CONFIG_KEYBOARD_LM8323 is not set 771# CONFIG_KEYBOARD_LM8323 is not set
772# CONFIG_KEYBOARD_MAX7359 is not set
765# CONFIG_KEYBOARD_NEWTON is not set 773# CONFIG_KEYBOARD_NEWTON is not set
774# CONFIG_KEYBOARD_OPENCORES is not set
766# CONFIG_KEYBOARD_STOWAWAY is not set 775# CONFIG_KEYBOARD_STOWAWAY is not set
767# CONFIG_KEYBOARD_SUNKBD is not set 776# CONFIG_KEYBOARD_SUNKBD is not set
768CONFIG_KEYBOARD_XTKBD=m 777CONFIG_KEYBOARD_XTKBD=m
@@ -777,6 +786,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
777# CONFIG_TOUCHSCREEN_GUNZE is not set 786# CONFIG_TOUCHSCREEN_GUNZE is not set
778# CONFIG_TOUCHSCREEN_ELO is not set 787# CONFIG_TOUCHSCREEN_ELO is not set
779# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set 788# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
789# CONFIG_TOUCHSCREEN_MCS5000 is not set
780# CONFIG_TOUCHSCREEN_MTOUCH is not set 790# CONFIG_TOUCHSCREEN_MTOUCH is not set
781# CONFIG_TOUCHSCREEN_INEXIO is not set 791# CONFIG_TOUCHSCREEN_INEXIO is not set
782# CONFIG_TOUCHSCREEN_MK712 is not set 792# CONFIG_TOUCHSCREEN_MK712 is not set
@@ -787,7 +797,17 @@ CONFIG_INPUT_TOUCHSCREEN=y
787# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 797# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
788# CONFIG_TOUCHSCREEN_TSC2007 is not set 798# CONFIG_TOUCHSCREEN_TSC2007 is not set
789# CONFIG_TOUCHSCREEN_W90X900 is not set 799# CONFIG_TOUCHSCREEN_W90X900 is not set
790# CONFIG_INPUT_MISC is not set 800CONFIG_INPUT_MISC=y
801# CONFIG_INPUT_ATI_REMOTE is not set
802# CONFIG_INPUT_ATI_REMOTE2 is not set
803# CONFIG_INPUT_KEYSPAN_REMOTE is not set
804# CONFIG_INPUT_POWERMATE is not set
805# CONFIG_INPUT_YEALINK is not set
806# CONFIG_INPUT_CM109 is not set
807# CONFIG_INPUT_UINPUT is not set
808# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
809CONFIG_INPUT_DM355EVM=m
810CONFIG_INPUT_DM365EVM=m
791 811
792# 812#
793# Hardware I/O ports 813# Hardware I/O ports
@@ -828,13 +848,13 @@ CONFIG_UNIX98_PTYS=y
828CONFIG_LEGACY_PTYS=y 848CONFIG_LEGACY_PTYS=y
829CONFIG_LEGACY_PTY_COUNT=256 849CONFIG_LEGACY_PTY_COUNT=256
830# CONFIG_IPMI_HANDLER is not set 850# CONFIG_IPMI_HANDLER is not set
831CONFIG_HW_RANDOM=m 851# CONFIG_HW_RANDOM is not set
832# CONFIG_HW_RANDOM_TIMERIOMEM is not set
833# CONFIG_R3964 is not set 852# CONFIG_R3964 is not set
834# CONFIG_RAW_DRIVER is not set 853# CONFIG_RAW_DRIVER is not set
835# CONFIG_TCG_TPM is not set 854# CONFIG_TCG_TPM is not set
836CONFIG_I2C=y 855CONFIG_I2C=y
837CONFIG_I2C_BOARDINFO=y 856CONFIG_I2C_BOARDINFO=y
857CONFIG_I2C_COMPAT=y
838CONFIG_I2C_CHARDEV=y 858CONFIG_I2C_CHARDEV=y
839CONFIG_I2C_HELPER_AUTO=y 859CONFIG_I2C_HELPER_AUTO=y
840 860
@@ -868,13 +888,17 @@ CONFIG_I2C_DAVINCI=y
868# Miscellaneous I2C Chip support 888# Miscellaneous I2C Chip support
869# 889#
870# CONFIG_DS1682 is not set 890# CONFIG_DS1682 is not set
871# CONFIG_SENSORS_PCA9539 is not set
872# CONFIG_SENSORS_TSL2550 is not set 891# CONFIG_SENSORS_TSL2550 is not set
873# CONFIG_I2C_DEBUG_CORE is not set 892# CONFIG_I2C_DEBUG_CORE is not set
874# CONFIG_I2C_DEBUG_ALGO is not set 893# CONFIG_I2C_DEBUG_ALGO is not set
875# CONFIG_I2C_DEBUG_BUS is not set 894# CONFIG_I2C_DEBUG_BUS is not set
876# CONFIG_I2C_DEBUG_CHIP is not set 895# CONFIG_I2C_DEBUG_CHIP is not set
877# CONFIG_SPI is not set 896# CONFIG_SPI is not set
897
898#
899# PPS support
900#
901# CONFIG_PPS is not set
878CONFIG_ARCH_REQUIRE_GPIOLIB=y 902CONFIG_ARCH_REQUIRE_GPIOLIB=y
879CONFIG_GPIOLIB=y 903CONFIG_GPIOLIB=y
880# CONFIG_DEBUG_GPIO is not set 904# CONFIG_DEBUG_GPIO is not set
@@ -889,7 +913,7 @@ CONFIG_GPIOLIB=y
889# 913#
890# CONFIG_GPIO_MAX732X is not set 914# CONFIG_GPIO_MAX732X is not set
891# CONFIG_GPIO_PCA953X is not set 915# CONFIG_GPIO_PCA953X is not set
892CONFIG_GPIO_PCF857X=m 916CONFIG_GPIO_PCF857X=y
893 917
894# 918#
895# PCI GPIO expanders: 919# PCI GPIO expanders:
@@ -898,10 +922,19 @@ CONFIG_GPIO_PCF857X=m
898# 922#
899# SPI GPIO expanders: 923# SPI GPIO expanders:
900# 924#
925
926#
927# AC97 GPIO expanders:
928#
901# CONFIG_W1 is not set 929# CONFIG_W1 is not set
902# CONFIG_POWER_SUPPLY is not set 930# CONFIG_POWER_SUPPLY is not set
903CONFIG_HWMON=y 931CONFIG_HWMON=y
904# CONFIG_HWMON_VID is not set 932# CONFIG_HWMON_VID is not set
933# CONFIG_HWMON_DEBUG_CHIP is not set
934
935#
936# Native drivers
937#
905# CONFIG_SENSORS_AD7414 is not set 938# CONFIG_SENSORS_AD7414 is not set
906# CONFIG_SENSORS_AD7418 is not set 939# CONFIG_SENSORS_AD7418 is not set
907# CONFIG_SENSORS_ADM1021 is not set 940# CONFIG_SENSORS_ADM1021 is not set
@@ -950,6 +983,7 @@ CONFIG_HWMON=y
950# CONFIG_SENSORS_ADS7828 is not set 983# CONFIG_SENSORS_ADS7828 is not set
951# CONFIG_SENSORS_THMC50 is not set 984# CONFIG_SENSORS_THMC50 is not set
952# CONFIG_SENSORS_TMP401 is not set 985# CONFIG_SENSORS_TMP401 is not set
986# CONFIG_SENSORS_TMP421 is not set
953# CONFIG_SENSORS_VT1211 is not set 987# CONFIG_SENSORS_VT1211 is not set
954# CONFIG_SENSORS_W83781D is not set 988# CONFIG_SENSORS_W83781D is not set
955# CONFIG_SENSORS_W83791D is not set 989# CONFIG_SENSORS_W83791D is not set
@@ -959,9 +993,7 @@ CONFIG_HWMON=y
959# CONFIG_SENSORS_W83L786NG is not set 993# CONFIG_SENSORS_W83L786NG is not set
960# CONFIG_SENSORS_W83627HF is not set 994# CONFIG_SENSORS_W83627HF is not set
961# CONFIG_SENSORS_W83627EHF is not set 995# CONFIG_SENSORS_W83627EHF is not set
962# CONFIG_HWMON_DEBUG_CHIP is not set
963# CONFIG_THERMAL is not set 996# CONFIG_THERMAL is not set
964# CONFIG_THERMAL_HWMON is not set
965CONFIG_WATCHDOG=y 997CONFIG_WATCHDOG=y
966# CONFIG_WATCHDOG_NOWAYOUT is not set 998# CONFIG_WATCHDOG_NOWAYOUT is not set
967 999
@@ -988,7 +1020,7 @@ CONFIG_SSB_POSSIBLE=y
988# CONFIG_MFD_CORE is not set 1020# CONFIG_MFD_CORE is not set
989# CONFIG_MFD_SM501 is not set 1021# CONFIG_MFD_SM501 is not set
990# CONFIG_MFD_ASIC3 is not set 1022# CONFIG_MFD_ASIC3 is not set
991# CONFIG_MFD_DM355EVM_MSP is not set 1023CONFIG_MFD_DM355EVM_MSP=y
992# CONFIG_HTC_EGPIO is not set 1024# CONFIG_HTC_EGPIO is not set
993# CONFIG_HTC_PASIC3 is not set 1025# CONFIG_HTC_PASIC3 is not set
994# CONFIG_TPS65010 is not set 1026# CONFIG_TPS65010 is not set
@@ -999,9 +1031,11 @@ CONFIG_SSB_POSSIBLE=y
999# CONFIG_MFD_TC6393XB is not set 1031# CONFIG_MFD_TC6393XB is not set
1000# CONFIG_PMIC_DA903X is not set 1032# CONFIG_PMIC_DA903X is not set
1001# CONFIG_MFD_WM8400 is not set 1033# CONFIG_MFD_WM8400 is not set
1034# CONFIG_MFD_WM831X is not set
1002# CONFIG_MFD_WM8350_I2C is not set 1035# CONFIG_MFD_WM8350_I2C is not set
1003# CONFIG_MFD_PCF50633 is not set 1036# CONFIG_MFD_PCF50633 is not set
1004# CONFIG_AB3100_CORE is not set 1037# CONFIG_AB3100_CORE is not set
1038# CONFIG_REGULATOR is not set
1005# CONFIG_MEDIA_SUPPORT is not set 1039# CONFIG_MEDIA_SUPPORT is not set
1006 1040
1007# 1041#
@@ -1013,9 +1047,9 @@ CONFIG_FB=y
1013CONFIG_FIRMWARE_EDID=y 1047CONFIG_FIRMWARE_EDID=y
1014# CONFIG_FB_DDC is not set 1048# CONFIG_FB_DDC is not set
1015# CONFIG_FB_BOOT_VESA_SUPPORT is not set 1049# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1016# CONFIG_FB_CFB_FILLRECT is not set 1050CONFIG_FB_CFB_FILLRECT=y
1017# CONFIG_FB_CFB_COPYAREA is not set 1051CONFIG_FB_CFB_COPYAREA=y
1018# CONFIG_FB_CFB_IMAGEBLIT is not set 1052CONFIG_FB_CFB_IMAGEBLIT=y
1019# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set 1053# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1020# CONFIG_FB_SYS_FILLRECT is not set 1054# CONFIG_FB_SYS_FILLRECT is not set
1021# CONFIG_FB_SYS_COPYAREA is not set 1055# CONFIG_FB_SYS_COPYAREA is not set
@@ -1032,6 +1066,7 @@ CONFIG_FIRMWARE_EDID=y
1032# Frame buffer hardware drivers 1066# Frame buffer hardware drivers
1033# 1067#
1034# CONFIG_FB_S1D13XXX is not set 1068# CONFIG_FB_S1D13XXX is not set
1069CONFIG_FB_DAVINCI=y
1035# CONFIG_FB_VIRTUAL is not set 1070# CONFIG_FB_VIRTUAL is not set
1036# CONFIG_FB_METRONOME is not set 1071# CONFIG_FB_METRONOME is not set
1037# CONFIG_FB_MB862XX is not set 1072# CONFIG_FB_MB862XX is not set
@@ -1101,7 +1136,6 @@ CONFIG_SND_SOC_TLV320AIC3X=m
1101# CONFIG_SOUND_PRIME is not set 1136# CONFIG_SOUND_PRIME is not set
1102CONFIG_HID_SUPPORT=y 1137CONFIG_HID_SUPPORT=y
1103CONFIG_HID=m 1138CONFIG_HID=m
1104# CONFIG_HID_DEBUG is not set
1105# CONFIG_HIDRAW is not set 1139# CONFIG_HIDRAW is not set
1106 1140
1107# 1141#
@@ -1130,6 +1164,7 @@ CONFIG_HID_CYPRESS=m
1130CONFIG_HID_EZKEY=m 1164CONFIG_HID_EZKEY=m
1131# CONFIG_HID_KYE is not set 1165# CONFIG_HID_KYE is not set
1132CONFIG_HID_GYRATION=m 1166CONFIG_HID_GYRATION=m
1167# CONFIG_HID_TWINHAN is not set
1133# CONFIG_HID_KENSINGTON is not set 1168# CONFIG_HID_KENSINGTON is not set
1134CONFIG_HID_LOGITECH=m 1169CONFIG_HID_LOGITECH=m
1135# CONFIG_LOGITECH_FF is not set 1170# CONFIG_LOGITECH_FF is not set
@@ -1176,6 +1211,7 @@ CONFIG_USB_MON=m
1176# CONFIG_USB_OXU210HP_HCD is not set 1211# CONFIG_USB_OXU210HP_HCD is not set
1177# CONFIG_USB_ISP116X_HCD is not set 1212# CONFIG_USB_ISP116X_HCD is not set
1178# CONFIG_USB_ISP1760_HCD is not set 1213# CONFIG_USB_ISP1760_HCD is not set
1214# CONFIG_USB_ISP1362_HCD is not set
1179# CONFIG_USB_SL811_HCD is not set 1215# CONFIG_USB_SL811_HCD is not set
1180# CONFIG_USB_R8A66597_HCD is not set 1216# CONFIG_USB_R8A66597_HCD is not set
1181# CONFIG_USB_HWA_HCD is not set 1217# CONFIG_USB_HWA_HCD is not set
@@ -1269,6 +1305,7 @@ CONFIG_USB_GADGET_SELECTED=y
1269# CONFIG_USB_GADGET_LH7A40X is not set 1305# CONFIG_USB_GADGET_LH7A40X is not set
1270# CONFIG_USB_GADGET_OMAP is not set 1306# CONFIG_USB_GADGET_OMAP is not set
1271# CONFIG_USB_GADGET_PXA25X is not set 1307# CONFIG_USB_GADGET_PXA25X is not set
1308# CONFIG_USB_GADGET_R8A66597 is not set
1272# CONFIG_USB_GADGET_PXA27X is not set 1309# CONFIG_USB_GADGET_PXA27X is not set
1273# CONFIG_USB_GADGET_S3C_HSOTG is not set 1310# CONFIG_USB_GADGET_S3C_HSOTG is not set
1274# CONFIG_USB_GADGET_IMX is not set 1311# CONFIG_USB_GADGET_IMX is not set
@@ -1286,6 +1323,7 @@ CONFIG_USB_ZERO=m
1286# CONFIG_USB_AUDIO is not set 1323# CONFIG_USB_AUDIO is not set
1287CONFIG_USB_ETH=m 1324CONFIG_USB_ETH=m
1288CONFIG_USB_ETH_RNDIS=y 1325CONFIG_USB_ETH_RNDIS=y
1326# CONFIG_USB_ETH_EEM is not set
1289CONFIG_USB_GADGETFS=m 1327CONFIG_USB_GADGETFS=m
1290CONFIG_USB_FILE_STORAGE=m 1328CONFIG_USB_FILE_STORAGE=m
1291# CONFIG_USB_FILE_STORAGE_TEST is not set 1329# CONFIG_USB_FILE_STORAGE_TEST is not set
@@ -1316,8 +1354,10 @@ CONFIG_MMC_BLOCK=m
1316# MMC/SD/SDIO Host Controller Drivers 1354# MMC/SD/SDIO Host Controller Drivers
1317# 1355#
1318# CONFIG_MMC_SDHCI is not set 1356# CONFIG_MMC_SDHCI is not set
1357# CONFIG_MMC_AT91 is not set
1358# CONFIG_MMC_ATMELMCI is not set
1359CONFIG_MMC_DAVINCI=m
1319# CONFIG_MEMSTICK is not set 1360# CONFIG_MEMSTICK is not set
1320# CONFIG_ACCESSIBILITY is not set
1321CONFIG_NEW_LEDS=y 1361CONFIG_NEW_LEDS=y
1322CONFIG_LEDS_CLASS=m 1362CONFIG_LEDS_CLASS=m
1323 1363
@@ -1345,6 +1385,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=m
1345# 1385#
1346# iptables trigger is under Netfilter config (LED target) 1386# iptables trigger is under Netfilter config (LED target)
1347# 1387#
1388# CONFIG_ACCESSIBILITY is not set
1348CONFIG_RTC_LIB=y 1389CONFIG_RTC_LIB=y
1349CONFIG_RTC_CLASS=m 1390CONFIG_RTC_CLASS=m
1350 1391
@@ -1370,6 +1411,7 @@ CONFIG_RTC_INTF_DEV=y
1370# CONFIG_RTC_DRV_PCF8563 is not set 1411# CONFIG_RTC_DRV_PCF8563 is not set
1371# CONFIG_RTC_DRV_PCF8583 is not set 1412# CONFIG_RTC_DRV_PCF8583 is not set
1372# CONFIG_RTC_DRV_M41T80 is not set 1413# CONFIG_RTC_DRV_M41T80 is not set
1414# CONFIG_RTC_DRV_DM355EVM is not set
1373# CONFIG_RTC_DRV_S35390A is not set 1415# CONFIG_RTC_DRV_S35390A is not set
1374# CONFIG_RTC_DRV_FM3130 is not set 1416# CONFIG_RTC_DRV_FM3130 is not set
1375# CONFIG_RTC_DRV_RX8581 is not set 1417# CONFIG_RTC_DRV_RX8581 is not set
@@ -1399,8 +1441,11 @@ CONFIG_RTC_INTF_DEV=y
1399# 1441#
1400# CONFIG_DMADEVICES is not set 1442# CONFIG_DMADEVICES is not set
1401# CONFIG_AUXDISPLAY is not set 1443# CONFIG_AUXDISPLAY is not set
1402# CONFIG_REGULATOR is not set
1403# CONFIG_UIO is not set 1444# CONFIG_UIO is not set
1445
1446#
1447# TI VLYNQ
1448#
1404# CONFIG_STAGING is not set 1449# CONFIG_STAGING is not set
1405 1450
1406# 1451#
@@ -1429,6 +1474,7 @@ CONFIG_XFS_FS=m
1429# CONFIG_GFS2_FS is not set 1474# CONFIG_GFS2_FS is not set
1430# CONFIG_OCFS2_FS is not set 1475# CONFIG_OCFS2_FS is not set
1431# CONFIG_BTRFS_FS is not set 1476# CONFIG_BTRFS_FS is not set
1477# CONFIG_NILFS2_FS is not set
1432CONFIG_FILE_LOCKING=y 1478CONFIG_FILE_LOCKING=y
1433CONFIG_FSNOTIFY=y 1479CONFIG_FSNOTIFY=y
1434CONFIG_DNOTIFY=y 1480CONFIG_DNOTIFY=y
@@ -1500,7 +1546,6 @@ CONFIG_MINIX_FS=m
1500# CONFIG_ROMFS_FS is not set 1546# CONFIG_ROMFS_FS is not set
1501# CONFIG_SYSV_FS is not set 1547# CONFIG_SYSV_FS is not set
1502# CONFIG_UFS_FS is not set 1548# CONFIG_UFS_FS is not set
1503# CONFIG_NILFS2_FS is not set
1504CONFIG_NETWORK_FILESYSTEMS=y 1549CONFIG_NETWORK_FILESYSTEMS=y
1505CONFIG_NFS_FS=y 1550CONFIG_NFS_FS=y
1506CONFIG_NFS_V3=y 1551CONFIG_NFS_V3=y
@@ -1596,6 +1641,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1596CONFIG_ENABLE_MUST_CHECK=y 1641CONFIG_ENABLE_MUST_CHECK=y
1597CONFIG_FRAME_WARN=1024 1642CONFIG_FRAME_WARN=1024
1598# CONFIG_MAGIC_SYSRQ is not set 1643# CONFIG_MAGIC_SYSRQ is not set
1644# CONFIG_STRIP_ASM_SYMS is not set
1599# CONFIG_UNUSED_SYMBOLS is not set 1645# CONFIG_UNUSED_SYMBOLS is not set
1600CONFIG_DEBUG_FS=y 1646CONFIG_DEBUG_FS=y
1601# CONFIG_HEADERS_CHECK is not set 1647# CONFIG_HEADERS_CHECK is not set
@@ -1634,11 +1680,14 @@ CONFIG_DEBUG_BUGVERBOSE=y
1634# CONFIG_DEBUG_LIST is not set 1680# CONFIG_DEBUG_LIST is not set
1635# CONFIG_DEBUG_SG is not set 1681# CONFIG_DEBUG_SG is not set
1636# CONFIG_DEBUG_NOTIFIERS is not set 1682# CONFIG_DEBUG_NOTIFIERS is not set
1683# CONFIG_DEBUG_CREDENTIALS is not set
1684CONFIG_FRAME_POINTER=y
1637# CONFIG_BOOT_PRINTK_DELAY is not set 1685# CONFIG_BOOT_PRINTK_DELAY is not set
1638# CONFIG_RCU_TORTURE_TEST is not set 1686# CONFIG_RCU_TORTURE_TEST is not set
1639# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1687# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1640# CONFIG_BACKTRACE_SELF_TEST is not set 1688# CONFIG_BACKTRACE_SELF_TEST is not set
1641# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1689# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1690# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1642# CONFIG_FAULT_INJECTION is not set 1691# CONFIG_FAULT_INJECTION is not set
1643# CONFIG_LATENCYTOP is not set 1692# CONFIG_LATENCYTOP is not set
1644# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1693# CONFIG_SYSCTL_SYSCALL_CHECK is not set
@@ -1663,7 +1712,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
1663# CONFIG_SAMPLES is not set 1712# CONFIG_SAMPLES is not set
1664CONFIG_HAVE_ARCH_KGDB=y 1713CONFIG_HAVE_ARCH_KGDB=y
1665# CONFIG_KGDB is not set 1714# CONFIG_KGDB is not set
1666CONFIG_ARM_UNWIND=y 1715# CONFIG_ARM_UNWIND is not set
1667CONFIG_DEBUG_USER=y 1716CONFIG_DEBUG_USER=y
1668CONFIG_DEBUG_ERRORS=y 1717CONFIG_DEBUG_ERRORS=y
1669# CONFIG_DEBUG_STACK_USAGE is not set 1718# CONFIG_DEBUG_STACK_USAGE is not set
@@ -1681,7 +1730,6 @@ CONFIG_CRYPTO=y
1681# 1730#
1682# Crypto core or helper 1731# Crypto core or helper
1683# 1732#
1684# CONFIG_CRYPTO_FIPS is not set
1685# CONFIG_CRYPTO_MANAGER is not set 1733# CONFIG_CRYPTO_MANAGER is not set
1686# CONFIG_CRYPTO_MANAGER2 is not set 1734# CONFIG_CRYPTO_MANAGER2 is not set
1687# CONFIG_CRYPTO_GF128MUL is not set 1735# CONFIG_CRYPTO_GF128MUL is not set
@@ -1713,11 +1761,13 @@ CONFIG_CRYPTO=y
1713# 1761#
1714# CONFIG_CRYPTO_HMAC is not set 1762# CONFIG_CRYPTO_HMAC is not set
1715# CONFIG_CRYPTO_XCBC is not set 1763# CONFIG_CRYPTO_XCBC is not set
1764# CONFIG_CRYPTO_VMAC is not set
1716 1765
1717# 1766#
1718# Digest 1767# Digest
1719# 1768#
1720# CONFIG_CRYPTO_CRC32C is not set 1769# CONFIG_CRYPTO_CRC32C is not set
1770# CONFIG_CRYPTO_GHASH is not set
1721# CONFIG_CRYPTO_MD4 is not set 1771# CONFIG_CRYPTO_MD4 is not set
1722# CONFIG_CRYPTO_MD5 is not set 1772# CONFIG_CRYPTO_MD5 is not set
1723# CONFIG_CRYPTO_MICHAEL_MIC is not set 1773# CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/arm/configs/omap_3430sdp_defconfig b/arch/arm/configs/omap_3430sdp_defconfig
index 84829587d55a..592457cfbbe5 100644
--- a/arch/arm/configs/omap_3430sdp_defconfig
+++ b/arch/arm/configs/omap_3430sdp_defconfig
@@ -963,10 +963,32 @@ CONFIG_FB_CFB_IMAGEBLIT=y
963# 963#
964# CONFIG_FB_S1D13XXX is not set 964# CONFIG_FB_S1D13XXX is not set
965# CONFIG_FB_VIRTUAL is not set 965# CONFIG_FB_VIRTUAL is not set
966CONFIG_FB_OMAP=y 966# CONFIG_FB_METRONOME is not set
967# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set 967# CONFIG_FB_MB862XX is not set
968# CONFIG_FB_BROADSHEET is not set
969# CONFIG_FB_OMAP_LCD_VGA is not set
968# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set 970# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
969CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2 971CONFIG_OMAP2_VRAM=y
972CONFIG_OMAP2_VRFB=y
973CONFIG_OMAP2_DSS=y
974CONFIG_OMAP2_VRAM_SIZE=4
975CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y
976# CONFIG_OMAP2_DSS_RFBI is not set
977CONFIG_OMAP2_DSS_VENC=y
978# CONFIG_OMAP2_DSS_SDI is not set
979# CONFIG_OMAP2_DSS_DSI is not set
980# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set
981CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
982CONFIG_FB_OMAP2=y
983CONFIG_FB_OMAP2_DEBUG_SUPPORT=y
984# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set
985CONFIG_FB_OMAP2_NUM_FBS=3
986
987#
988# OMAP2/3 Display Device Drivers
989#
990CONFIG_PANEL_GENERIC=y
991CONFIG_PANEL_SHARP_LS037V7DW01=y
970# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 992# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
971 993
972# 994#
diff --git a/arch/arm/include/asm/mman.h b/arch/arm/include/asm/mman.h
index 8eebf89f5ab1..41f99c573b93 100644
--- a/arch/arm/include/asm/mman.h
+++ b/arch/arm/include/asm/mman.h
@@ -1 +1,4 @@
1#include <asm-generic/mman.h> 1#include <asm-generic/mman.h>
2
3#define arch_mmap_check(addr, len, flags) \
4 (((flags) & MAP_FIXED && (addr) < FIRST_USER_ADDRESS) ? -EINVAL : 0)
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index f58c1156e779..9314a2d681f1 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -172,7 +172,7 @@
172/* 160 */ CALL(sys_sched_get_priority_min) 172/* 160 */ CALL(sys_sched_get_priority_min)
173 CALL(sys_sched_rr_get_interval) 173 CALL(sys_sched_rr_get_interval)
174 CALL(sys_nanosleep) 174 CALL(sys_nanosleep)
175 CALL(sys_arm_mremap) 175 CALL(sys_mremap)
176 CALL(sys_setresuid16) 176 CALL(sys_setresuid16)
177/* 165 */ CALL(sys_getresuid16) 177/* 165 */ CALL(sys_getresuid16)
178 CALL(sys_ni_syscall) /* vm86 */ 178 CALL(sys_ni_syscall) /* vm86 */
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index f0fe95b7085d..2c1db77d7848 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -416,12 +416,12 @@ sys_mmap2:
416 tst r5, #PGOFF_MASK 416 tst r5, #PGOFF_MASK
417 moveq r5, r5, lsr #PAGE_SHIFT - 12 417 moveq r5, r5, lsr #PAGE_SHIFT - 12
418 streq r5, [sp, #4] 418 streq r5, [sp, #4]
419 beq do_mmap2 419 beq sys_mmap_pgoff
420 mov r0, #-EINVAL 420 mov r0, #-EINVAL
421 mov pc, lr 421 mov pc, lr
422#else 422#else
423 str r5, [sp, #4] 423 str r5, [sp, #4]
424 b do_mmap2 424 b sys_mmap_pgoff
425#endif 425#endif
426ENDPROC(sys_mmap2) 426ENDPROC(sys_mmap2)
427 427
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index 78ecaac65206..ae4027bd01bd 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -28,41 +28,6 @@
28#include <linux/ipc.h> 28#include <linux/ipc.h>
29#include <linux/uaccess.h> 29#include <linux/uaccess.h>
30 30
31extern unsigned long do_mremap(unsigned long addr, unsigned long old_len,
32 unsigned long new_len, unsigned long flags,
33 unsigned long new_addr);
34
35/* common code for old and new mmaps */
36inline long do_mmap2(
37 unsigned long addr, unsigned long len,
38 unsigned long prot, unsigned long flags,
39 unsigned long fd, unsigned long pgoff)
40{
41 int error = -EINVAL;
42 struct file * file = NULL;
43
44 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
45
46 if (flags & MAP_FIXED && addr < FIRST_USER_ADDRESS)
47 goto out;
48
49 error = -EBADF;
50 if (!(flags & MAP_ANONYMOUS)) {
51 file = fget(fd);
52 if (!file)
53 goto out;
54 }
55
56 down_write(&current->mm->mmap_sem);
57 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
58 up_write(&current->mm->mmap_sem);
59
60 if (file)
61 fput(file);
62out:
63 return error;
64}
65
66struct mmap_arg_struct { 31struct mmap_arg_struct {
67 unsigned long addr; 32 unsigned long addr;
68 unsigned long len; 33 unsigned long len;
@@ -84,29 +49,11 @@ asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
84 if (a.offset & ~PAGE_MASK) 49 if (a.offset & ~PAGE_MASK)
85 goto out; 50 goto out;
86 51
87 error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); 52 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
88out: 53out:
89 return error; 54 return error;
90} 55}
91 56
92asmlinkage unsigned long
93sys_arm_mremap(unsigned long addr, unsigned long old_len,
94 unsigned long new_len, unsigned long flags,
95 unsigned long new_addr)
96{
97 unsigned long ret = -EINVAL;
98
99 if (flags & MREMAP_FIXED && new_addr < FIRST_USER_ADDRESS)
100 goto out;
101
102 down_write(&current->mm->mmap_sem);
103 ret = do_mremap(addr, old_len, new_len, flags, new_addr);
104 up_write(&current->mm->mmap_sem);
105
106out:
107 return ret;
108}
109
110/* 57/*
111 * Perform the select(nd, in, out, ex, tv) and mmap() system 58 * Perform the select(nd, in, out, ex, tv) and mmap() system
112 * calls. 59 * calls.
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index a57af3e99c7c..809114d5a5a6 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -866,6 +866,57 @@ static void __init at91_add_device_rtc(void) {}
866 866
867 867
868/* -------------------------------------------------------------------- 868/* --------------------------------------------------------------------
869 * Touchscreen
870 * -------------------------------------------------------------------- */
871
872#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
873static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
874static struct at91_tsadcc_data tsadcc_data;
875
876static struct resource tsadcc_resources[] = {
877 [0] = {
878 .start = AT91SAM9G45_BASE_TSC,
879 .end = AT91SAM9G45_BASE_TSC + SZ_16K - 1,
880 .flags = IORESOURCE_MEM,
881 },
882 [1] = {
883 .start = AT91SAM9G45_ID_TSC,
884 .end = AT91SAM9G45_ID_TSC,
885 .flags = IORESOURCE_IRQ,
886 }
887};
888
889static struct platform_device at91sam9g45_tsadcc_device = {
890 .name = "atmel_tsadcc",
891 .id = -1,
892 .dev = {
893 .dma_mask = &tsadcc_dmamask,
894 .coherent_dma_mask = DMA_BIT_MASK(32),
895 .platform_data = &tsadcc_data,
896 },
897 .resource = tsadcc_resources,
898 .num_resources = ARRAY_SIZE(tsadcc_resources),
899};
900
901void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
902{
903 if (!data)
904 return;
905
906 at91_set_gpio_input(AT91_PIN_PD20, 0); /* AD0_XR */
907 at91_set_gpio_input(AT91_PIN_PD21, 0); /* AD1_XL */
908 at91_set_gpio_input(AT91_PIN_PD22, 0); /* AD2_YT */
909 at91_set_gpio_input(AT91_PIN_PD23, 0); /* AD3_TB */
910
911 tsadcc_data = *data;
912 platform_device_register(&at91sam9g45_tsadcc_device);
913}
914#else
915void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
916#endif
917
918
919/* --------------------------------------------------------------------
869 * RTT 920 * RTT
870 * -------------------------------------------------------------------- */ 921 * -------------------------------------------------------------------- */
871 922
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index d345f5453dbe..53aaa94df75a 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -622,6 +622,7 @@ static void __init at91_add_device_tc(void) { }
622 622
623#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE) 623#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
624static u64 tsadcc_dmamask = DMA_BIT_MASK(32); 624static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
625static struct at91_tsadcc_data tsadcc_data;
625 626
626static struct resource tsadcc_resources[] = { 627static struct resource tsadcc_resources[] = {
627 [0] = { 628 [0] = {
@@ -642,22 +643,27 @@ static struct platform_device at91sam9rl_tsadcc_device = {
642 .dev = { 643 .dev = {
643 .dma_mask = &tsadcc_dmamask, 644 .dma_mask = &tsadcc_dmamask,
644 .coherent_dma_mask = DMA_BIT_MASK(32), 645 .coherent_dma_mask = DMA_BIT_MASK(32),
646 .platform_data = &tsadcc_data,
645 }, 647 },
646 .resource = tsadcc_resources, 648 .resource = tsadcc_resources,
647 .num_resources = ARRAY_SIZE(tsadcc_resources), 649 .num_resources = ARRAY_SIZE(tsadcc_resources),
648}; 650};
649 651
650void __init at91_add_device_tsadcc(void) 652void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
651{ 653{
654 if (!data)
655 return;
656
652 at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */ 657 at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */
653 at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */ 658 at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */
654 at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */ 659 at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */
655 at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */ 660 at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */
656 661
662 tsadcc_data = *data;
657 platform_device_register(&at91sam9rl_tsadcc_device); 663 platform_device_register(&at91sam9rl_tsadcc_device);
658} 664}
659#else 665#else
660void __init at91_add_device_tsadcc(void) {} 666void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
661#endif 667#endif
662 668
663 669
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 1cf4d8681078..98f9f4bc9396 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -229,6 +229,16 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
229 229
230 230
231/* 231/*
232 * Touchscreen
233 */
234static struct at91_tsadcc_data ek_tsadcc_data = {
235 .adc_clock = 300000,
236 .pendet_debounce = 0x0d,
237 .ts_sample_hold_time = 0x0a,
238};
239
240
241/*
232 * GPIO Buttons 242 * GPIO Buttons
233 */ 243 */
234#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 244#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
@@ -379,6 +389,8 @@ static void __init ek_board_init(void)
379 at91_add_device_i2c(0, NULL, 0); 389 at91_add_device_i2c(0, NULL, 0);
380 /* LCD Controller */ 390 /* LCD Controller */
381 at91_add_device_lcdc(&ek_lcdc_data); 391 at91_add_device_lcdc(&ek_lcdc_data);
392 /* Touch Screen */
393 at91_add_device_tsadcc(&ek_tsadcc_data);
382 /* Push Buttons */ 394 /* Push Buttons */
383 ek_add_device_buttons(); 395 ek_add_device_buttons();
384 /* AC97 */ 396 /* AC97 */
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index bd28e989e54e..7ac20f3a2067 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -243,6 +243,16 @@ static struct gpio_led ek_leds[] = {
243 243
244 244
245/* 245/*
246 * Touchscreen
247 */
248static struct at91_tsadcc_data ek_tsadcc_data = {
249 .adc_clock = 1000000,
250 .pendet_debounce = 0x0f,
251 .ts_sample_hold_time = 0x03,
252};
253
254
255/*
246 * GPIO Buttons 256 * GPIO Buttons
247 */ 257 */
248#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 258#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
@@ -310,7 +320,7 @@ static void __init ek_board_init(void)
310 /* AC97 */ 320 /* AC97 */
311 at91_add_device_ac97(&ek_ac97_data); 321 at91_add_device_ac97(&ek_ac97_data);
312 /* Touch Screen Controller */ 322 /* Touch Screen Controller */
313 at91_add_device_tsadcc(); 323 at91_add_device_tsadcc(&ek_tsadcc_data);
314 /* LEDs */ 324 /* LEDs */
315 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); 325 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
316 /* Push Buttons */ 326 /* Push Buttons */
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 2295d80dd893..bb6f6a7ba5e0 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -187,7 +187,12 @@ extern void __init at91_add_device_ac97(struct ac97c_platform_data *data);
187extern void __init at91_add_device_isi(void); 187extern void __init at91_add_device_isi(void);
188 188
189 /* Touchscreen Controller */ 189 /* Touchscreen Controller */
190extern void __init at91_add_device_tsadcc(void); 190struct at91_tsadcc_data {
191 unsigned int adc_clock;
192 u8 pendet_debounce;
193 u8 ts_sample_hold_time;
194};
195extern void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data);
191 196
192/* CAN */ 197/* CAN */
193struct at91_can_data { 198struct at91_can_data {
diff --git a/arch/arm/mach-bcmring/include/csp/reg.h b/arch/arm/mach-bcmring/include/csp/reg.h
index e5f60bf5a1f3..56654d23c3d7 100644
--- a/arch/arm/mach-bcmring/include/csp/reg.h
+++ b/arch/arm/mach-bcmring/include/csp/reg.h
@@ -16,7 +16,7 @@
16/** 16/**
17* @file reg.h 17* @file reg.h
18* 18*
19* @brief Generic register defintions used in CSP 19* @brief Generic register definitions used in CSP
20*/ 20*/
21/****************************************************************************/ 21/****************************************************************************/
22 22
diff --git a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
index 375066ad0186..cbf334d1c761 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
@@ -83,7 +83,7 @@ typedef struct {
83* @brief Get next available transaction width 83* @brief Get next available transaction width
84* 84*
85* 85*
86* @return On sucess : Next avail able transaction width 86* @return On success : Next available transaction width
87* On failure : dmacHw_TRANSACTION_WIDTH_8 87* On failure : dmacHw_TRANSACTION_WIDTH_8
88* 88*
89* @note 89* @note
diff --git a/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h b/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
index 86bb58d4f58c..ad58cf873377 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
@@ -16,7 +16,7 @@
16/** 16/**
17* @file mm_addr.h 17* @file mm_addr.h
18* 18*
19* @brief Memory Map address defintions 19* @brief Memory Map address definitions
20* 20*
21* @note 21* @note
22* None 22* None
diff --git a/arch/arm/mach-bcmring/include/mach/dma.h b/arch/arm/mach-bcmring/include/mach/dma.h
index 847980c85c88..1f2c5319c056 100644
--- a/arch/arm/mach-bcmring/include/mach/dma.h
+++ b/arch/arm/mach-bcmring/include/mach/dma.h
@@ -651,7 +651,7 @@ int dma_map_add_region(DMA_MemMap_t *memMap, /* Stores state information about t
651/** 651/**
652* Creates a descriptor ring from a memory mapping. 652* Creates a descriptor ring from a memory mapping.
653* 653*
654* @return 0 on sucess, error code otherwise. 654* @return 0 on success, error code otherwise.
655*/ 655*/
656/****************************************************************************/ 656/****************************************************************************/
657 657
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 40866c643f13..033bfede6b67 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -32,11 +32,13 @@ config ARCH_DAVINCI_DA830
32 bool "DA830/OMAP-L137 based system" 32 bool "DA830/OMAP-L137 based system"
33 select CP_INTC 33 select CP_INTC
34 select ARCH_DAVINCI_DA8XX 34 select ARCH_DAVINCI_DA8XX
35 select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
35 36
36config ARCH_DAVINCI_DA850 37config ARCH_DAVINCI_DA850
37 bool "DA850/OMAP-L138 based system" 38 bool "DA850/OMAP-L138 based system"
38 select CP_INTC 39 select CP_INTC
39 select ARCH_DAVINCI_DA8XX 40 select ARCH_DAVINCI_DA8XX
41 select ARCH_HAS_CPUFREQ
40 42
41config ARCH_DAVINCI_DA8XX 43config ARCH_DAVINCI_DA8XX
42 bool 44 bool
@@ -63,6 +65,13 @@ config MACH_SFFSDR
63 Say Y here to select the Lyrtech Small Form Factor 65 Say Y here to select the Lyrtech Small Form Factor
64 Software Defined Radio (SFFSDR) board. 66 Software Defined Radio (SFFSDR) board.
65 67
68config MACH_NEUROS_OSD2
69 bool "Neuros OSD2 Open Television Set Top Box"
70 depends on ARCH_DAVINCI_DM644x
71 help
72 Configure this option to specify the whether the board used
73 for development is a Neuros OSD2 Open Set Top Box.
74
66config MACH_DAVINCI_DM355_EVM 75config MACH_DAVINCI_DM355_EVM
67 bool "TI DM355 EVM" 76 bool "TI DM355 EVM"
68 default ARCH_DAVINCI_DM355 77 default ARCH_DAVINCI_DM355
@@ -98,16 +107,66 @@ config MACH_DAVINCI_DA830_EVM
98 bool "TI DA830/OMAP-L137 Reference Platform" 107 bool "TI DA830/OMAP-L137 Reference Platform"
99 default ARCH_DAVINCI_DA830 108 default ARCH_DAVINCI_DA830
100 depends on ARCH_DAVINCI_DA830 109 depends on ARCH_DAVINCI_DA830
110 select GPIO_PCF857X
101 help 111 help
102 Say Y here to select the TI DA830/OMAP-L137 Evaluation Module. 112 Say Y here to select the TI DA830/OMAP-L137 Evaluation Module.
103 113
114choice
115 prompt "Select DA830/OMAP-L137 UI board peripheral"
116 depends on MACH_DAVINCI_DA830_EVM
117 help
118 The presence of UI card on the DA830/OMAP-L137 EVM is detected
119 automatically based on successful probe of the I2C based GPIO
120 expander on that board. This option selected in this menu has
121 an effect only in case of a successful UI card detection.
122
123config DA830_UI_LCD
124 bool "LCD"
125 help
126 Say Y here to use the LCD as a framebuffer or simple character
127 display.
128
129config DA830_UI_NAND
130 bool "NAND flash"
131 help
132 Say Y here to use the NAND flash. Do not forget to setup
133 the switch correctly.
134endchoice
135
104config MACH_DAVINCI_DA850_EVM 136config MACH_DAVINCI_DA850_EVM
105 bool "TI DA850/OMAP-L138 Reference Platform" 137 bool "TI DA850/OMAP-L138 Reference Platform"
106 default ARCH_DAVINCI_DA850 138 default ARCH_DAVINCI_DA850
107 depends on ARCH_DAVINCI_DA850 139 depends on ARCH_DAVINCI_DA850
140 select GPIO_PCA953X
108 help 141 help
109 Say Y here to select the TI DA850/OMAP-L138 Evaluation Module. 142 Say Y here to select the TI DA850/OMAP-L138 Evaluation Module.
110 143
144choice
145 prompt "Select peripherals connected to expander on UI board"
146 depends on MACH_DAVINCI_DA850_EVM
147 help
148 The presence of User Interface (UI) card on the DA850/OMAP-L138
149 EVM is detected automatically based on successful probe of the I2C
150 based GPIO expander on that card. This option selected in this
151 menu has an effect only in case of a successful UI card detection.
152
153config DA850_UI_NONE
154 bool "No peripheral is enabled"
155 help
156 Say Y if you do not want to enable any of the peripherals connected
157 to TCA6416 expander on DA850/OMAP-L138 EVM UI card
158
159config DA850_UI_RMII
160 bool "RMII Ethernet PHY"
161 help
162 Say Y if you want to use the RMII PHY on the DA850/OMAP-L138 EVM.
163 This PHY is found on the UI daughter card that is supplied with
164 the EVM.
165 NOTE: Please take care while choosing this option, MII PHY will
166 not be functional if RMII mode is selected.
167
168endchoice
169
111config DAVINCI_MUX 170config DAVINCI_MUX
112 bool "DAVINCI multiplexing support" 171 bool "DAVINCI multiplexing support"
113 depends on ARCH_DAVINCI 172 depends on ARCH_DAVINCI
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 2e11e847313b..eeb9230d8844 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -23,9 +23,14 @@ obj-$(CONFIG_CP_INTC) += cp_intc.o
23# Board specific 23# Board specific
24obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o 24obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o
25obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o 25obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o
26obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o
26obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o 27obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o
27obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o 28obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o
28obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o 29obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o
29obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o 30obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o
30obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o 31obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o
31obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o 32obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o
33
34# Power Management
35obj-$(CONFIG_CPU_FREQ) += cpufreq.o
36obj-$(CONFIG_CPU_IDLE) += cpuidle.o
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index bfbb63936f33..31dc9901e556 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -10,51 +10,194 @@
10 * or implied. 10 * or implied.
11 */ 11 */
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/console.h> 14#include <linux/console.h>
15#include <linux/interrupt.h>
16#include <linux/gpio.h>
17#include <linux/platform_device.h>
16#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/i2c/pcf857x.h>
17#include <linux/i2c/at24.h> 20#include <linux/i2c/at24.h>
21#include <linux/mtd/mtd.h>
22#include <linux/mtd/partitions.h>
18 23
19#include <asm/mach-types.h> 24#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
21 26
22#include <mach/common.h>
23#include <mach/irqs.h>
24#include <mach/cp_intc.h> 27#include <mach/cp_intc.h>
28#include <mach/mux.h>
29#include <mach/nand.h>
25#include <mach/da8xx.h> 30#include <mach/da8xx.h>
26#include <mach/asp.h> 31#include <mach/usb.h>
27 32
28#define DA830_EVM_PHY_MASK 0x0 33#define DA830_EVM_PHY_MASK 0x0
29#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ 34#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
30 35
31static struct at24_platform_data da830_evm_i2c_eeprom_info = { 36#define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000
32 .byte_len = SZ_256K / 8, 37#define DA830_EMIF25_CONTROL_BASE 0x68000000
33 .page_size = 64,
34 .flags = AT24_FLAG_ADDR16,
35 .setup = davinci_get_mac_addr,
36 .context = (void *)0x7f00,
37};
38 38
39static struct i2c_board_info __initdata da830_evm_i2c_devices[] = { 39/*
40 { 40 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
41 I2C_BOARD_INFO("24c256", 0x50), 41 */
42 .platform_data = &da830_evm_i2c_eeprom_info, 42#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
43 }, 43#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
44 { 44
45 I2C_BOARD_INFO("tlv320aic3x", 0x18), 45static const short da830_evm_usb11_pins[] = {
46 } 46 DA830_GPIO1_15, DA830_GPIO2_4,
47 -1
47}; 48};
48 49
49static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = { 50static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
50 .bus_freq = 100, /* kHz */ 51
51 .bus_delay = 0, /* usec */ 52static int da830_evm_usb_set_power(unsigned port, int on)
53{
54 gpio_set_value(ON_BD_USB_DRV, on);
55 return 0;
56}
57
58static int da830_evm_usb_get_power(unsigned port)
59{
60 return gpio_get_value(ON_BD_USB_DRV);
61}
62
63static int da830_evm_usb_get_oci(unsigned port)
64{
65 return !gpio_get_value(ON_BD_USB_OVC);
66}
67
68static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
69
70static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
71{
72 int irq = gpio_to_irq(ON_BD_USB_OVC);
73 int error = 0;
74
75 if (handler != NULL) {
76 da830_evm_usb_ocic_handler = handler;
77
78 error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
79 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
80 "OHCI over-current indicator", NULL);
81 if (error)
82 printk(KERN_ERR "%s: could not request IRQ to watch "
83 "over-current indicator changes\n", __func__);
84 } else
85 free_irq(irq, NULL);
86
87 return error;
88}
89
90static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
91 .set_power = da830_evm_usb_set_power,
92 .get_power = da830_evm_usb_get_power,
93 .get_oci = da830_evm_usb_get_oci,
94 .ocic_notify = da830_evm_usb_ocic_notify,
95
96 /* TPS2065 switch @ 5V */
97 .potpgt = (3 + 1) / 2, /* 3 ms max */
52}; 98};
53 99
100static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
101{
102 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
103 return IRQ_HANDLED;
104}
105
106static __init void da830_evm_usb_init(void)
107{
108 u32 cfgchip2;
109 int ret;
110
111 /*
112 * Set up USB clock/mode in the CFGCHIP2 register.
113 * FYI: CFGCHIP2 is 0x0000ef00 initially.
114 */
115 cfgchip2 = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG));
116
117 /* USB2.0 PHY reference clock is 24 MHz */
118 cfgchip2 &= ~CFGCHIP2_REFFREQ;
119 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
120
121 /*
122 * Select internal reference clock for USB 2.0 PHY
123 * and use it as a clock source for USB 1.1 PHY
124 * (this is the default setting anyway).
125 */
126 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
127 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
128
129 /*
130 * We have to override VBUS/ID signals when MUSB is configured into the
131 * host-only mode -- ID pin will float if no cable is connected, so the
132 * controller won't be able to drive VBUS thinking that it's a B-device.
133 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
134 */
135 cfgchip2 &= ~CFGCHIP2_OTGMODE;
136#ifdef CONFIG_USB_MUSB_HOST
137 cfgchip2 |= CFGCHIP2_FORCE_HOST;
138#else
139 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
140#endif
141
142 __raw_writel(cfgchip2, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG));
143
144 /* USB_REFCLKIN is not used. */
145 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
146 if (ret)
147 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
148 __func__, ret);
149 else {
150 /*
151 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
152 * with the power on to power good time of 3 ms.
153 */
154 ret = da8xx_register_usb20(1000, 3);
155 if (ret)
156 pr_warning("%s: USB 2.0 registration failed: %d\n",
157 __func__, ret);
158 }
159
160 ret = da8xx_pinmux_setup(da830_evm_usb11_pins);
161 if (ret) {
162 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
163 __func__, ret);
164 return;
165 }
166
167 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
168 if (ret) {
169 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
170 "power control: %d\n", __func__, ret);
171 return;
172 }
173 gpio_direction_output(ON_BD_USB_DRV, 0);
174
175 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
176 if (ret) {
177 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
178 "over-current indicator: %d\n", __func__, ret);
179 return;
180 }
181 gpio_direction_input(ON_BD_USB_OVC);
182
183 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
184 if (ret)
185 pr_warning("%s: USB 1.1 registration failed: %d\n",
186 __func__, ret);
187}
188
54static struct davinci_uart_config da830_evm_uart_config __initdata = { 189static struct davinci_uart_config da830_evm_uart_config __initdata = {
55 .enabled_uarts = 0x7, 190 .enabled_uarts = 0x7,
56}; 191};
57 192
193static const short da830_evm_mcasp1_pins[] = {
194 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
195 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
196 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
197 DA830_AXR1_11,
198 -1
199};
200
58static u8 da830_iis_serializer_direction[] = { 201static u8 da830_iis_serializer_direction[] = {
59 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, 202 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
60 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE, 203 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
@@ -74,6 +217,271 @@ static struct snd_platform_data da830_evm_snd_data = {
74 .rxnumevt = 1, 217 .rxnumevt = 1,
75}; 218};
76 219
220/*
221 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
222 */
223static const short da830_evm_mmc_sd_pins[] = {
224 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
225 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
226 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
227 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
228 -1
229};
230
231#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
232
233static int da830_evm_mmc_get_ro(int index)
234{
235 return gpio_get_value(DA830_MMCSD_WP_PIN);
236}
237
238static struct davinci_mmc_config da830_evm_mmc_config = {
239 .get_ro = da830_evm_mmc_get_ro,
240 .wires = 4,
241 .max_freq = 50000000,
242 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
243 .version = MMC_CTLR_VERSION_2,
244};
245
246static inline void da830_evm_init_mmc(void)
247{
248 int ret;
249
250 ret = da8xx_pinmux_setup(da830_evm_mmc_sd_pins);
251 if (ret) {
252 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
253 ret);
254 return;
255 }
256
257 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
258 if (ret) {
259 pr_warning("da830_evm_init: can not open GPIO %d\n",
260 DA830_MMCSD_WP_PIN);
261 return;
262 }
263 gpio_direction_input(DA830_MMCSD_WP_PIN);
264
265 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
266 if (ret) {
267 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
268 ret);
269 gpio_free(DA830_MMCSD_WP_PIN);
270 }
271}
272
273/*
274 * UI board NAND/NOR flashes only use 8-bit data bus.
275 */
276static const short da830_evm_emif25_pins[] = {
277 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
278 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
279 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
280 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
281 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
282 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
283 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
284 -1
285};
286
287#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
288#define HAS_MMC 1
289#else
290#define HAS_MMC 0
291#endif
292
293#ifdef CONFIG_DA830_UI_NAND
294static struct mtd_partition da830_evm_nand_partitions[] = {
295 /* bootloader (U-Boot, etc) in first sector */
296 [0] = {
297 .name = "bootloader",
298 .offset = 0,
299 .size = SZ_128K,
300 .mask_flags = MTD_WRITEABLE, /* force read-only */
301 },
302 /* bootloader params in the next sector */
303 [1] = {
304 .name = "params",
305 .offset = MTDPART_OFS_APPEND,
306 .size = SZ_128K,
307 .mask_flags = MTD_WRITEABLE, /* force read-only */
308 },
309 /* kernel */
310 [2] = {
311 .name = "kernel",
312 .offset = MTDPART_OFS_APPEND,
313 .size = SZ_2M,
314 .mask_flags = 0,
315 },
316 /* file system */
317 [3] = {
318 .name = "filesystem",
319 .offset = MTDPART_OFS_APPEND,
320 .size = MTDPART_SIZ_FULL,
321 .mask_flags = 0,
322 }
323};
324
325/* flash bbt decriptors */
326static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
327static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
328
329static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
330 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
331 NAND_BBT_WRITE | NAND_BBT_2BIT |
332 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
333 .offs = 2,
334 .len = 4,
335 .veroffs = 16,
336 .maxblocks = 4,
337 .pattern = da830_evm_nand_bbt_pattern
338};
339
340static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
341 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
342 NAND_BBT_WRITE | NAND_BBT_2BIT |
343 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
344 .offs = 2,
345 .len = 4,
346 .veroffs = 16,
347 .maxblocks = 4,
348 .pattern = da830_evm_nand_mirror_pattern
349};
350
351static struct davinci_nand_pdata da830_evm_nand_pdata = {
352 .parts = da830_evm_nand_partitions,
353 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
354 .ecc_mode = NAND_ECC_HW,
355 .ecc_bits = 4,
356 .options = NAND_USE_FLASH_BBT,
357 .bbt_td = &da830_evm_nand_bbt_main_descr,
358 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
359};
360
361static struct resource da830_evm_nand_resources[] = {
362 [0] = { /* First memory resource is NAND I/O window */
363 .start = DA830_EMIF25_ASYNC_DATA_CE3_BASE,
364 .end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1,
365 .flags = IORESOURCE_MEM,
366 },
367 [1] = { /* Second memory resource is AEMIF control registers */
368 .start = DA830_EMIF25_CONTROL_BASE,
369 .end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1,
370 .flags = IORESOURCE_MEM,
371 },
372};
373
374static struct platform_device da830_evm_nand_device = {
375 .name = "davinci_nand",
376 .id = 1,
377 .dev = {
378 .platform_data = &da830_evm_nand_pdata,
379 },
380 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
381 .resource = da830_evm_nand_resources,
382};
383
384static inline void da830_evm_init_nand(int mux_mode)
385{
386 int ret;
387
388 if (HAS_MMC) {
389 pr_warning("WARNING: both MMC/SD and NAND are "
390 "enabled, but they share AEMIF pins.\n"
391 "\tDisable MMC/SD for NAND support.\n");
392 return;
393 }
394
395 ret = da8xx_pinmux_setup(da830_evm_emif25_pins);
396 if (ret)
397 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
398 ret);
399
400 ret = platform_device_register(&da830_evm_nand_device);
401 if (ret)
402 pr_warning("da830_evm_init: NAND device not registered.\n");
403
404 gpio_direction_output(mux_mode, 1);
405}
406#else
407static inline void da830_evm_init_nand(int mux_mode) { }
408#endif
409
410#ifdef CONFIG_DA830_UI_LCD
411static inline void da830_evm_init_lcdc(int mux_mode)
412{
413 int ret;
414
415 ret = da8xx_pinmux_setup(da830_lcdcntl_pins);
416 if (ret)
417 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
418 ret);
419
420 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
421 if (ret)
422 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
423
424 gpio_direction_output(mux_mode, 0);
425}
426#else
427static inline void da830_evm_init_lcdc(int mux_mode) { }
428#endif
429
430static struct at24_platform_data da830_evm_i2c_eeprom_info = {
431 .byte_len = SZ_256K / 8,
432 .page_size = 64,
433 .flags = AT24_FLAG_ADDR16,
434 .setup = davinci_get_mac_addr,
435 .context = (void *)0x7f00,
436};
437
438static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
439 int gpio, unsigned ngpio, void *context)
440{
441 gpio_request(gpio + 6, "UI MUX_MODE");
442
443 /* Drive mux mode low to match the default without UI card */
444 gpio_direction_output(gpio + 6, 0);
445
446 da830_evm_init_lcdc(gpio + 6);
447
448 da830_evm_init_nand(gpio + 6);
449
450 return 0;
451}
452
453static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
454 unsigned ngpio, void *context)
455{
456 gpio_free(gpio + 6);
457 return 0;
458}
459
460static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
461 .gpio_base = DAVINCI_N_GPIO,
462 .setup = da830_evm_ui_expander_setup,
463 .teardown = da830_evm_ui_expander_teardown,
464};
465
466static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
467 {
468 I2C_BOARD_INFO("24c256", 0x50),
469 .platform_data = &da830_evm_i2c_eeprom_info,
470 },
471 {
472 I2C_BOARD_INFO("tlv320aic3x", 0x18),
473 },
474 {
475 I2C_BOARD_INFO("pcf8574", 0x3f),
476 .platform_data = &da830_evm_ui_expander_info,
477 },
478};
479
480static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
481 .bus_freq = 100, /* kHz */
482 .bus_delay = 0, /* usec */
483};
484
77static __init void da830_evm_init(void) 485static __init void da830_evm_init(void)
78{ 486{
79 struct davinci_soc_info *soc_info = &davinci_soc_info; 487 struct davinci_soc_info *soc_info = &davinci_soc_info;
@@ -94,6 +502,8 @@ static __init void da830_evm_init(void)
94 pr_warning("da830_evm_init: i2c0 registration failed: %d\n", 502 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
95 ret); 503 ret);
96 504
505 da830_evm_usb_init();
506
97 soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK; 507 soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
98 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY; 508 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
99 soc_info->emac_pdata->rmii_en = 1; 509 soc_info->emac_pdata->rmii_en = 1;
@@ -117,12 +527,18 @@ static __init void da830_evm_init(void)
117 i2c_register_board_info(1, da830_evm_i2c_devices, 527 i2c_register_board_info(1, da830_evm_i2c_devices,
118 ARRAY_SIZE(da830_evm_i2c_devices)); 528 ARRAY_SIZE(da830_evm_i2c_devices));
119 529
120 ret = da8xx_pinmux_setup(da830_mcasp1_pins); 530 ret = da8xx_pinmux_setup(da830_evm_mcasp1_pins);
121 if (ret) 531 if (ret)
122 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n", 532 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
123 ret); 533 ret);
124 534
125 da8xx_init_mcasp(1, &da830_evm_snd_data); 535 da8xx_register_mcasp(1, &da830_evm_snd_data);
536
537 da830_evm_init_mmc();
538
539 ret = da8xx_register_rtc();
540 if (ret)
541 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
126} 542}
127 543
128#ifdef CONFIG_SERIAL_8250_CONSOLE 544#ifdef CONFIG_SERIAL_8250_CONSOLE
@@ -146,7 +562,7 @@ static void __init da830_evm_map_io(void)
146 da830_init(); 562 da830_init();
147} 563}
148 564
149MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP L137 EVM") 565MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
150 .phys_io = IO_PHYS, 566 .phys_io = IO_PHYS,
151 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 567 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
152 .boot_params = (DA8XX_DDR_BASE + 0x100), 568 .boot_params = (DA8XX_DDR_BASE + 0x100),
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index c759d72494e0..62b98bffc158 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -12,36 +12,38 @@
12 * or implied. 12 * or implied.
13 */ 13 */
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/console.h> 16#include <linux/console.h>
18#include <linux/i2c.h> 17#include <linux/i2c.h>
19#include <linux/i2c/at24.h> 18#include <linux/i2c/at24.h>
19#include <linux/i2c/pca953x.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/mtd/mtd.h> 22#include <linux/mtd/mtd.h>
23#include <linux/mtd/nand.h> 23#include <linux/mtd/nand.h>
24#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/regulator/machine.h>
26 27
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29 30
30#include <mach/common.h>
31#include <mach/irqs.h>
32#include <mach/cp_intc.h> 31#include <mach/cp_intc.h>
33#include <mach/da8xx.h> 32#include <mach/da8xx.h>
34#include <mach/nand.h> 33#include <mach/nand.h>
34#include <mach/mux.h>
35 35
36#define DA850_EVM_PHY_MASK 0x1 36#define DA850_EVM_PHY_MASK 0x1
37#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ 37#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
38 38
39#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
39#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) 40#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
40#define DA850_LCD_PWR_PIN GPIO_TO_PIN(8, 10)
41 41
42#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) 42#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
43#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) 43#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
44 44
45#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
46
45static struct mtd_partition da850_evm_norflash_partition[] = { 47static struct mtd_partition da850_evm_norflash_partition[] = {
46 { 48 {
47 .name = "NOR filesystem", 49 .name = "NOR filesystem",
@@ -143,10 +145,149 @@ static struct platform_device da850_evm_nandflash_device = {
143 .resource = da850_evm_nandflash_resource, 145 .resource = da850_evm_nandflash_resource,
144}; 146};
145 147
148static struct platform_device *da850_evm_devices[] __initdata = {
149 &da850_evm_nandflash_device,
150 &da850_evm_norflash_device,
151};
152
153#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
154#define DA8XX_AEMIF_ASIZE_16BIT 0x1
155
156static void __init da850_evm_init_nor(void)
157{
158 void __iomem *aemif_addr;
159
160 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
161
162 /* Configure data bus width of CS2 to 16 bit */
163 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
164 DA8XX_AEMIF_ASIZE_16BIT,
165 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
166
167 iounmap(aemif_addr);
168}
169
170static u32 ui_card_detected;
171
172#if defined(CONFIG_MMC_DAVINCI) || \
173 defined(CONFIG_MMC_DAVINCI_MODULE)
174#define HAS_MMC 1
175#else
176#define HAS_MMC 0
177#endif
178
179static __init void da850_evm_setup_nor_nand(void)
180{
181 int ret = 0;
182
183 if (ui_card_detected & !HAS_MMC) {
184 ret = da8xx_pinmux_setup(da850_nand_pins);
185 if (ret)
186 pr_warning("da850_evm_init: nand mux setup failed: "
187 "%d\n", ret);
188
189 ret = da8xx_pinmux_setup(da850_nor_pins);
190 if (ret)
191 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
192 ret);
193
194 da850_evm_init_nor();
195
196 platform_add_devices(da850_evm_devices,
197 ARRAY_SIZE(da850_evm_devices));
198 }
199}
200
201#ifdef CONFIG_DA850_UI_RMII
202static inline void da850_evm_setup_emac_rmii(int rmii_sel)
203{
204 struct davinci_soc_info *soc_info = &davinci_soc_info;
205
206 soc_info->emac_pdata->rmii_en = 1;
207 gpio_set_value(rmii_sel, 0);
208}
209#else
210static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
211#endif
212
213static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
214 unsigned ngpio, void *c)
215{
216 int sel_a, sel_b, sel_c, ret;
217
218 sel_a = gpio + 7;
219 sel_b = gpio + 6;
220 sel_c = gpio + 5;
221
222 ret = gpio_request(sel_a, "sel_a");
223 if (ret) {
224 pr_warning("Cannot open UI expander pin %d\n", sel_a);
225 goto exp_setup_sela_fail;
226 }
227
228 ret = gpio_request(sel_b, "sel_b");
229 if (ret) {
230 pr_warning("Cannot open UI expander pin %d\n", sel_b);
231 goto exp_setup_selb_fail;
232 }
233
234 ret = gpio_request(sel_c, "sel_c");
235 if (ret) {
236 pr_warning("Cannot open UI expander pin %d\n", sel_c);
237 goto exp_setup_selc_fail;
238 }
239
240 /* deselect all functionalities */
241 gpio_direction_output(sel_a, 1);
242 gpio_direction_output(sel_b, 1);
243 gpio_direction_output(sel_c, 1);
244
245 ui_card_detected = 1;
246 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
247
248 da850_evm_setup_nor_nand();
249
250 da850_evm_setup_emac_rmii(sel_a);
251
252 return 0;
253
254exp_setup_selc_fail:
255 gpio_free(sel_b);
256exp_setup_selb_fail:
257 gpio_free(sel_a);
258exp_setup_sela_fail:
259 return ret;
260}
261
262static int da850_evm_ui_expander_teardown(struct i2c_client *client,
263 unsigned gpio, unsigned ngpio, void *c)
264{
265 /* deselect all functionalities */
266 gpio_set_value(gpio + 5, 1);
267 gpio_set_value(gpio + 6, 1);
268 gpio_set_value(gpio + 7, 1);
269
270 gpio_free(gpio + 5);
271 gpio_free(gpio + 6);
272 gpio_free(gpio + 7);
273
274 return 0;
275}
276
277static struct pca953x_platform_data da850_evm_ui_expander_info = {
278 .gpio_base = DAVINCI_N_GPIO,
279 .setup = da850_evm_ui_expander_setup,
280 .teardown = da850_evm_ui_expander_teardown,
281};
282
146static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { 283static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
147 { 284 {
148 I2C_BOARD_INFO("tlv320aic3x", 0x18), 285 I2C_BOARD_INFO("tlv320aic3x", 0x18),
149 } 286 },
287 {
288 I2C_BOARD_INFO("tca6416", 0x20),
289 .platform_data = &da850_evm_ui_expander_info,
290 },
150}; 291};
151 292
152static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { 293static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
@@ -158,11 +299,6 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = {
158 .enabled_uarts = 0x7, 299 .enabled_uarts = 0x7,
159}; 300};
160 301
161static struct platform_device *da850_evm_devices[] __initdata = {
162 &da850_evm_nandflash_device,
163 &da850_evm_norflash_device,
164};
165
166/* davinci da850 evm audio machine driver */ 302/* davinci da850 evm audio machine driver */
167static u8 da850_iis_serializer_direction[] = { 303static u8 da850_iis_serializer_direction[] = {
168 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, 304 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
@@ -198,6 +334,8 @@ static struct davinci_mmc_config da850_mmc_config = {
198 .get_ro = da850_evm_mmc_get_ro, 334 .get_ro = da850_evm_mmc_get_ro,
199 .get_cd = da850_evm_mmc_get_cd, 335 .get_cd = da850_evm_mmc_get_cd,
200 .wires = 4, 336 .wires = 4,
337 .max_freq = 50000000,
338 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
201 .version = MMC_CTLR_VERSION_2, 339 .version = MMC_CTLR_VERSION_2,
202}; 340};
203 341
@@ -233,56 +371,227 @@ static int da850_lcd_hw_init(void)
233 return 0; 371 return 0;
234} 372}
235 373
236#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 374/* TPS65070 voltage regulator support */
237#define DA8XX_AEMIF_ASIZE_16BIT 0x1
238 375
239static void __init da850_evm_init_nor(void) 376/* 3.3V */
240{ 377struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
241 void __iomem *aemif_addr; 378 {
379 .supply = "usb0_vdda33",
380 },
381 {
382 .supply = "usb1_vdda33",
383 },
384};
242 385
243 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); 386/* 3.3V or 1.8V */
387struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
388 {
389 .supply = "dvdd3318_a",
390 },
391 {
392 .supply = "dvdd3318_b",
393 },
394 {
395 .supply = "dvdd3318_c",
396 },
397};
244 398
245 /* Configure data bus width of CS2 to 16 bit */ 399/* 1.2V */
246 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | 400struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
247 DA8XX_AEMIF_ASIZE_16BIT, 401 {
248 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); 402 .supply = "cvdd",
403 },
404};
249 405
250 iounmap(aemif_addr); 406/* 1.8V LDO */
251} 407struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
408 {
409 .supply = "sata_vddr",
410 },
411 {
412 .supply = "usb0_vdda18",
413 },
414 {
415 .supply = "usb1_vdda18",
416 },
417 {
418 .supply = "ddr_dvdd18",
419 },
420};
252 421
253#if defined(CONFIG_MTD_PHYSMAP) || \ 422/* 1.2V LDO */
254 defined(CONFIG_MTD_PHYSMAP_MODULE) 423struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
255#define HAS_NOR 1 424 {
256#else 425 .supply = "sata_vdd",
257#define HAS_NOR 0 426 },
258#endif 427 {
428 .supply = "pll0_vdda",
429 },
430 {
431 .supply = "pll1_vdda",
432 },
433 {
434 .supply = "usbs_cvdd",
435 },
436 {
437 .supply = "vddarnwa1",
438 },
439};
259 440
260#if defined(CONFIG_MMC_DAVINCI) || \ 441struct regulator_init_data tps65070_regulator_data[] = {
261 defined(CONFIG_MMC_DAVINCI_MODULE) 442 /* dcdc1 */
262#define HAS_MMC 1 443 {
263#else 444 .constraints = {
264#define HAS_MMC 0 445 .min_uV = 3150000,
265#endif 446 .max_uV = 3450000,
447 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
448 REGULATOR_CHANGE_STATUS),
449 .boot_on = 1,
450 },
451 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
452 .consumer_supplies = tps65070_dcdc1_consumers,
453 },
266 454
267static __init void da850_evm_init(void) 455 /* dcdc2 */
456 {
457 .constraints = {
458 .min_uV = 1710000,
459 .max_uV = 3450000,
460 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
461 REGULATOR_CHANGE_STATUS),
462 .boot_on = 1,
463 },
464 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
465 .consumer_supplies = tps65070_dcdc2_consumers,
466 },
467
468 /* dcdc3 */
469 {
470 .constraints = {
471 .min_uV = 950000,
472 .max_uV = 1320000,
473 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
474 REGULATOR_CHANGE_STATUS),
475 .boot_on = 1,
476 },
477 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
478 .consumer_supplies = tps65070_dcdc3_consumers,
479 },
480
481 /* ldo1 */
482 {
483 .constraints = {
484 .min_uV = 1710000,
485 .max_uV = 1890000,
486 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
487 REGULATOR_CHANGE_STATUS),
488 .boot_on = 1,
489 },
490 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
491 .consumer_supplies = tps65070_ldo1_consumers,
492 },
493
494 /* ldo2 */
495 {
496 .constraints = {
497 .min_uV = 1140000,
498 .max_uV = 1320000,
499 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
500 REGULATOR_CHANGE_STATUS),
501 .boot_on = 1,
502 },
503 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
504 .consumer_supplies = tps65070_ldo2_consumers,
505 },
506};
507
508static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
509 {
510 I2C_BOARD_INFO("tps6507x", 0x48),
511 .platform_data = &tps65070_regulator_data[0],
512 },
513};
514
515static int __init pmic_tps65070_init(void)
268{ 516{
269 struct davinci_soc_info *soc_info = &davinci_soc_info; 517 return i2c_register_board_info(1, da850evm_tps65070_info,
518 ARRAY_SIZE(da850evm_tps65070_info));
519}
520
521static const short da850_evm_lcdc_pins[] = {
522 DA850_GPIO2_8, DA850_GPIO2_15,
523 -1
524};
525
526static int __init da850_evm_config_emac(void)
527{
528 void __iomem *cfg_chip3_base;
270 int ret; 529 int ret;
530 u32 val;
531 struct davinci_soc_info *soc_info = &davinci_soc_info;
532 u8 rmii_en = soc_info->emac_pdata->rmii_en;
533
534 if (!machine_is_davinci_da850_evm())
535 return 0;
536
537 cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
538
539 val = __raw_readl(cfg_chip3_base);
540
541 if (rmii_en) {
542 val |= BIT(8);
543 ret = da8xx_pinmux_setup(da850_rmii_pins);
544 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
545 " functional\n");
546 } else {
547 val &= ~BIT(8);
548 ret = da8xx_pinmux_setup(da850_cpgmac_pins);
549 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
550 " functional\n");
551 }
271 552
272 ret = da8xx_pinmux_setup(da850_nand_pins);
273 if (ret) 553 if (ret)
274 pr_warning("da850_evm_init: nand mux setup failed: %d\n", 554 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
275 ret); 555 ret);
276 556
277 ret = da8xx_pinmux_setup(da850_nor_pins); 557 /* configure the CFGCHIP3 register for RMII or MII */
558 __raw_writel(val, cfg_chip3_base);
559
560 ret = davinci_cfg_reg(DA850_GPIO2_6);
278 if (ret) 561 if (ret)
279 pr_warning("da850_evm_init: nor mux setup failed: %d\n", 562 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
563 "failed\n");
564
565 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
566 if (ret) {
567 pr_warning("Cannot open GPIO %d\n",
568 DA850_MII_MDIO_CLKEN_PIN);
569 return ret;
570 }
571
572 /* Enable/Disable MII MDIO clock */
573 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
574
575 soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
576 soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
577
578 ret = da8xx_register_emac();
579 if (ret)
580 pr_warning("da850_evm_init: emac registration failed: %d\n",
280 ret); 581 ret);
281 582
282 da850_evm_init_nor(); 583 return 0;
584}
585device_initcall(da850_evm_config_emac);
586
587static __init void da850_evm_init(void)
588{
589 int ret;
283 590
284 platform_add_devices(da850_evm_devices, 591 ret = pmic_tps65070_init();
285 ARRAY_SIZE(da850_evm_devices)); 592 if (ret)
593 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
594 ret);
286 595
287 ret = da8xx_register_edma(); 596 ret = da8xx_register_edma();
288 if (ret) 597 if (ret)
@@ -299,19 +608,6 @@ static __init void da850_evm_init(void)
299 pr_warning("da850_evm_init: i2c0 registration failed: %d\n", 608 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
300 ret); 609 ret);
301 610
302 soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
303 soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
304 soc_info->emac_pdata->rmii_en = 0;
305
306 ret = da8xx_pinmux_setup(da850_cpgmac_pins);
307 if (ret)
308 pr_warning("da850_evm_init: cpgmac mux setup failed: %d\n",
309 ret);
310
311 ret = da8xx_register_emac();
312 if (ret)
313 pr_warning("da850_evm_init: emac registration failed: %d\n",
314 ret);
315 611
316 ret = da8xx_register_watchdog(); 612 ret = da8xx_register_watchdog();
317 if (ret) 613 if (ret)
@@ -319,11 +615,6 @@ static __init void da850_evm_init(void)
319 ret); 615 ret);
320 616
321 if (HAS_MMC) { 617 if (HAS_MMC) {
322 if (HAS_NOR)
323 pr_warning("WARNING: both NOR Flash and MMC/SD are "
324 "enabled, but they share AEMIF pins.\n"
325 "\tDisable one of them.\n");
326
327 ret = da8xx_pinmux_setup(da850_mmcsd0_pins); 618 ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
328 if (ret) 619 if (ret)
329 pr_warning("da850_evm_init: mmcsd0 mux setup failed:" 620 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
@@ -365,22 +656,42 @@ static __init void da850_evm_init(void)
365 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", 656 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
366 ret); 657 ret);
367 658
368 da8xx_init_mcasp(0, &da850_evm_snd_data); 659 da8xx_register_mcasp(0, &da850_evm_snd_data);
369 660
370 ret = da8xx_pinmux_setup(da850_lcdcntl_pins); 661 ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
371 if (ret) 662 if (ret)
372 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", 663 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
373 ret); 664 ret);
374 665
666 /* Handle board specific muxing for LCD here */
667 ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
668 if (ret)
669 pr_warning("da850_evm_init: evm specific lcd mux setup "
670 "failed: %d\n", ret);
671
375 ret = da850_lcd_hw_init(); 672 ret = da850_lcd_hw_init();
376 if (ret) 673 if (ret)
377 pr_warning("da850_evm_init: lcd initialization failed: %d\n", 674 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
378 ret); 675 ret);
379 676
380 ret = da8xx_register_lcdc(); 677 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
381 if (ret) 678 if (ret)
382 pr_warning("da850_evm_init: lcdc registration failed: %d\n", 679 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
383 ret); 680 ret);
681
682 ret = da8xx_register_rtc();
683 if (ret)
684 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
685
686 ret = da850_register_cpufreq();
687 if (ret)
688 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
689 ret);
690
691 ret = da8xx_register_cpuidle();
692 if (ret)
693 pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
694 ret);
384} 695}
385 696
386#ifdef CONFIG_SERIAL_8250_CONSOLE 697#ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 77e806798822..a9b650dcc172 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -9,15 +9,13 @@
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h> 12#include <linux/init.h>
14#include <linux/dma-mapping.h> 13#include <linux/err.h>
15#include <linux/platform_device.h> 14#include <linux/platform_device.h>
16#include <linux/mtd/mtd.h> 15#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h> 16#include <linux/mtd/partitions.h>
18#include <linux/mtd/nand.h> 17#include <linux/mtd/nand.h>
19#include <linux/i2c.h> 18#include <linux/i2c.h>
20#include <linux/io.h>
21#include <linux/gpio.h> 19#include <linux/gpio.h>
22#include <linux/clk.h> 20#include <linux/clk.h>
23#include <linux/videodev2.h> 21#include <linux/videodev2.h>
@@ -25,20 +23,15 @@
25#include <linux/spi/spi.h> 23#include <linux/spi/spi.h>
26#include <linux/spi/eeprom.h> 24#include <linux/spi/eeprom.h>
27 25
28#include <asm/setup.h>
29#include <asm/mach-types.h> 26#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/flash.h>
33 28
34#include <mach/hardware.h>
35#include <mach/dm355.h> 29#include <mach/dm355.h>
36#include <mach/psc.h>
37#include <mach/common.h>
38#include <mach/i2c.h> 30#include <mach/i2c.h>
39#include <mach/serial.h> 31#include <mach/serial.h>
40#include <mach/nand.h> 32#include <mach/nand.h>
41#include <mach/mmc.h> 33#include <mach/mmc.h>
34#include <mach/usb.h>
42 35
43#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000 36#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
44#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 37#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
@@ -86,8 +79,9 @@ static struct davinci_nand_pdata davinci_nand_data = {
86 .mask_chipsel = BIT(14), 79 .mask_chipsel = BIT(14),
87 .parts = davinci_nand_partitions, 80 .parts = davinci_nand_partitions,
88 .nr_parts = ARRAY_SIZE(davinci_nand_partitions), 81 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
89 .ecc_mode = NAND_ECC_HW_SYNDROME, 82 .ecc_mode = NAND_ECC_HW,
90 .options = NAND_USE_FLASH_BBT, 83 .options = NAND_USE_FLASH_BBT,
84 .ecc_bits = 4,
91}; 85};
92 86
93static struct resource davinci_nand_resources[] = { 87static struct resource davinci_nand_resources[] = {
@@ -344,7 +338,7 @@ static __init void dm355_evm_init(void)
344 gpio_request(2, "usb_id_toggle"); 338 gpio_request(2, "usb_id_toggle");
345 gpio_direction_output(2, USB_ID_VALUE); 339 gpio_direction_output(2, USB_ID_VALUE);
346 /* irlml6401 switches over 1A in under 8 msec */ 340 /* irlml6401 switches over 1A in under 8 msec */
347 setup_usb(500, 8); 341 davinci_setup_usb(1000, 8);
348 342
349 davinci_setup_mmc(0, &dm355evm_mmc_config); 343 davinci_setup_mmc(0, &dm355evm_mmc_config);
350 davinci_setup_mmc(1, &dm355evm_mmc_config); 344 davinci_setup_mmc(1, &dm355evm_mmc_config);
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 84ad5d161a87..21f32eb41e8c 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -8,34 +8,27 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/dma-mapping.h> 12#include <linux/err.h>
14#include <linux/platform_device.h> 13#include <linux/platform_device.h>
15#include <linux/mtd/mtd.h> 14#include <linux/mtd/mtd.h>
16#include <linux/mtd/partitions.h> 15#include <linux/mtd/partitions.h>
17#include <linux/mtd/nand.h> 16#include <linux/mtd/nand.h>
18#include <linux/i2c.h> 17#include <linux/i2c.h>
19#include <linux/io.h>
20#include <linux/gpio.h> 18#include <linux/gpio.h>
21#include <linux/clk.h> 19#include <linux/clk.h>
22#include <linux/spi/spi.h> 20#include <linux/spi/spi.h>
23#include <linux/spi/eeprom.h> 21#include <linux/spi/eeprom.h>
24 22
25#include <asm/setup.h>
26#include <asm/mach-types.h> 23#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
28#include <asm/mach/map.h>
29#include <asm/mach/flash.h>
30 25
31#include <mach/hardware.h>
32#include <mach/dm355.h> 26#include <mach/dm355.h>
33#include <mach/psc.h>
34#include <mach/common.h>
35#include <mach/i2c.h> 27#include <mach/i2c.h>
36#include <mach/serial.h> 28#include <mach/serial.h>
37#include <mach/nand.h> 29#include <mach/nand.h>
38#include <mach/mmc.h> 30#include <mach/mmc.h>
31#include <mach/usb.h>
39 32
40#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000 33#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
41#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 34#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
@@ -270,7 +263,7 @@ static __init void dm355_leopard_init(void)
270 gpio_request(2, "usb_id_toggle"); 263 gpio_request(2, "usb_id_toggle");
271 gpio_direction_output(2, USB_ID_VALUE); 264 gpio_direction_output(2, USB_ID_VALUE);
272 /* irlml6401 switches over 1A in under 8 msec */ 265 /* irlml6401 switches over 1A in under 8 msec */
273 setup_usb(500, 8); 266 davinci_setup_usb(1000, 8);
274 267
275 davinci_setup_mmc(0, &dm355leopard_mmc_config); 268 davinci_setup_mmc(0, &dm355leopard_mmc_config);
276 davinci_setup_mmc(1, &dm355leopard_mmc_config); 269 davinci_setup_mmc(1, &dm355leopard_mmc_config);
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 52dd8046b305..289fe1b7d25a 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -13,9 +13,8 @@
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/init.h> 16#include <linux/init.h>
18#include <linux/dma-mapping.h> 17#include <linux/err.h>
19#include <linux/i2c.h> 18#include <linux/i2c.h>
20#include <linux/io.h> 19#include <linux/io.h>
21#include <linux/clk.h> 20#include <linux/clk.h>
@@ -24,20 +23,19 @@
24#include <linux/mtd/mtd.h> 23#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
26#include <linux/mtd/nand.h> 25#include <linux/mtd/nand.h>
27#include <asm/setup.h> 26#include <linux/input.h>
27
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 30
31#include <mach/mux.h> 31#include <mach/mux.h>
32#include <mach/hardware.h>
33#include <mach/dm365.h> 32#include <mach/dm365.h>
34#include <mach/psc.h>
35#include <mach/common.h> 33#include <mach/common.h>
36#include <mach/i2c.h> 34#include <mach/i2c.h>
37#include <mach/serial.h> 35#include <mach/serial.h>
38#include <mach/mmc.h> 36#include <mach/mmc.h>
39#include <mach/nand.h> 37#include <mach/nand.h>
40 38#include <mach/keyscan.h>
41 39
42static inline int have_imager(void) 40static inline int have_imager(void)
43{ 41{
@@ -144,6 +142,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
144 .nr_parts = ARRAY_SIZE(davinci_nand_partitions), 142 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
145 .ecc_mode = NAND_ECC_HW, 143 .ecc_mode = NAND_ECC_HW,
146 .options = NAND_USE_FLASH_BBT, 144 .options = NAND_USE_FLASH_BBT,
145 .ecc_bits = 4,
147}; 146};
148 147
149static struct resource davinci_nand_resources[] = { 148static struct resource davinci_nand_resources[] = {
@@ -176,11 +175,16 @@ static struct at24_platform_data eeprom_info = {
176 .context = (void *)0x7f00, 175 .context = (void *)0x7f00,
177}; 176};
178 177
178static struct snd_platform_data dm365_evm_snd_data;
179
179static struct i2c_board_info i2c_info[] = { 180static struct i2c_board_info i2c_info[] = {
180 { 181 {
181 I2C_BOARD_INFO("24c256", 0x50), 182 I2C_BOARD_INFO("24c256", 0x50),
182 .platform_data = &eeprom_info, 183 .platform_data = &eeprom_info,
183 }, 184 },
185 {
186 I2C_BOARD_INFO("tlv320aic3x", 0x18),
187 },
184}; 188};
185 189
186static struct davinci_i2c_platform_data i2c_pdata = { 190static struct davinci_i2c_platform_data i2c_pdata = {
@@ -188,6 +192,38 @@ static struct davinci_i2c_platform_data i2c_pdata = {
188 .bus_delay = 0 /* usec */, 192 .bus_delay = 0 /* usec */,
189}; 193};
190 194
195#ifdef CONFIG_KEYBOARD_DAVINCI
196static unsigned short dm365evm_keymap[] = {
197 KEY_KP2,
198 KEY_LEFT,
199 KEY_EXIT,
200 KEY_DOWN,
201 KEY_ENTER,
202 KEY_UP,
203 KEY_KP1,
204 KEY_RIGHT,
205 KEY_MENU,
206 KEY_RECORD,
207 KEY_REWIND,
208 KEY_KPMINUS,
209 KEY_STOP,
210 KEY_FASTFORWARD,
211 KEY_KPPLUS,
212 KEY_PLAYPAUSE,
213 0
214};
215
216static struct davinci_ks_platform_data dm365evm_ks_data = {
217 .keymap = dm365evm_keymap,
218 .keymapsize = ARRAY_SIZE(dm365evm_keymap),
219 .rep = 1,
220 /* Scan period = strobe + interval */
221 .strobe = 0x5,
222 .interval = 0x2,
223 .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4,
224};
225#endif
226
191static int cpld_mmc_get_cd(int module) 227static int cpld_mmc_get_cd(int module)
192{ 228{
193 if (!cpld) 229 if (!cpld)
@@ -472,6 +508,13 @@ static __init void dm365_evm_init(void)
472 508
473 /* maybe setup mmc1/etc ... _after_ mmc0 */ 509 /* maybe setup mmc1/etc ... _after_ mmc0 */
474 evm_init_cpld(); 510 evm_init_cpld();
511
512 dm365_init_asp(&dm365_evm_snd_data);
513 dm365_init_rtc();
514
515#ifdef CONFIG_KEYBOARD_DAVINCI
516 dm365_init_ks(&dm365evm_ks_data);
517#endif
475} 518}
476 519
477static __init void dm365_evm_irq_init(void) 520static __init void dm365_evm_irq_init(void)
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 1213a0087ad4..fd0398bc6db3 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -9,45 +9,34 @@
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h> 12#include <linux/init.h>
14#include <linux/dma-mapping.h> 13#include <linux/dma-mapping.h>
15#include <linux/platform_device.h> 14#include <linux/platform_device.h>
16#include <linux/gpio.h> 15#include <linux/gpio.h>
17#include <linux/leds.h>
18#include <linux/memory.h>
19
20#include <linux/i2c.h> 16#include <linux/i2c.h>
21#include <linux/i2c/pcf857x.h> 17#include <linux/i2c/pcf857x.h>
22#include <linux/i2c/at24.h> 18#include <linux/i2c/at24.h>
23#include <linux/etherdevice.h>
24#include <linux/mtd/mtd.h> 19#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h> 20#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h> 21#include <linux/mtd/partitions.h>
27#include <linux/mtd/physmap.h> 22#include <linux/mtd/physmap.h>
28#include <linux/io.h>
29#include <linux/phy.h> 23#include <linux/phy.h>
30#include <linux/clk.h> 24#include <linux/clk.h>
31#include <linux/videodev2.h> 25#include <linux/videodev2.h>
32 26
33#include <media/tvp514x.h> 27#include <media/tvp514x.h>
34 28
35#include <asm/setup.h>
36#include <asm/mach-types.h> 29#include <asm/mach-types.h>
37
38#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/flash.h>
41 31
42#include <mach/dm644x.h> 32#include <mach/dm644x.h>
43#include <mach/common.h> 33#include <mach/common.h>
44#include <mach/i2c.h> 34#include <mach/i2c.h>
45#include <mach/serial.h> 35#include <mach/serial.h>
46#include <mach/mux.h> 36#include <mach/mux.h>
47#include <mach/psc.h>
48#include <mach/nand.h> 37#include <mach/nand.h>
49#include <mach/mmc.h> 38#include <mach/mmc.h>
50#include <mach/emac.h> 39#include <mach/usb.h>
51 40
52#define DM644X_EVM_PHY_MASK (0x2) 41#define DM644X_EVM_PHY_MASK (0x2)
53#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ 42#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
@@ -477,7 +466,7 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
477 /* irlml6401 switches over 1A, in under 8 msec; 466 /* irlml6401 switches over 1A, in under 8 msec;
478 * now it can be managed by nDRV_VBUS ... 467 * now it can be managed by nDRV_VBUS ...
479 */ 468 */
480 setup_usb(500, 8); 469 davinci_setup_usb(1000, 8);
481 470
482 return 0; 471 return 0;
483} 472}
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 24e0e13b1492..8d0b0e01c59b 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -17,38 +17,28 @@
17 **************************************************************************/ 17 **************************************************************************/
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/init.h> 20#include <linux/init.h>
22#include <linux/fs.h>
23#include <linux/major.h>
24#include <linux/root_dev.h>
25#include <linux/dma-mapping.h>
26#include <linux/serial.h>
27#include <linux/serial_8250.h>
28#include <linux/leds.h> 21#include <linux/leds.h>
29#include <linux/gpio.h> 22#include <linux/gpio.h>
30#include <linux/io.h>
31#include <linux/platform_device.h> 23#include <linux/platform_device.h>
32#include <linux/i2c.h> 24#include <linux/i2c.h>
33#include <linux/i2c/at24.h> 25#include <linux/i2c/at24.h>
34#include <linux/i2c/pcf857x.h> 26#include <linux/i2c/pcf857x.h>
35#include <linux/etherdevice.h>
36 27
37#include <media/tvp514x.h> 28#include <media/tvp514x.h>
38 29
39#include <asm/setup.h> 30#include <linux/mtd/mtd.h>
31#include <linux/mtd/nand.h>
32#include <linux/mtd/partitions.h>
33
40#include <asm/mach-types.h> 34#include <asm/mach-types.h>
41#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
42#include <asm/mach/map.h>
43#include <asm/mach/flash.h>
44 36
45#include <mach/dm646x.h> 37#include <mach/dm646x.h>
46#include <mach/common.h> 38#include <mach/common.h>
47#include <mach/psc.h>
48#include <mach/serial.h> 39#include <mach/serial.h>
49#include <mach/i2c.h> 40#include <mach/i2c.h>
50#include <mach/mmc.h> 41#include <mach/nand.h>
51#include <mach/emac.h>
52 42
53#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ 43#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
54 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) 44 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
@@ -57,6 +47,11 @@
57#define HAS_ATA 0 47#define HAS_ATA 0
58#endif 48#endif
59 49
50#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000
51#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
52
53#define NAND_BLOCK_SIZE SZ_128K
54
60/* CPLD Register 0 bits to control ATA */ 55/* CPLD Register 0 bits to control ATA */
61#define DM646X_EVM_ATA_RST BIT(0) 56#define DM646X_EVM_ATA_RST BIT(0)
62#define DM646X_EVM_ATA_PWD BIT(1) 57#define DM646X_EVM_ATA_PWD BIT(1)
@@ -92,6 +87,63 @@ static struct davinci_uart_config uart_config __initdata = {
92 .enabled_uarts = (1 << 0), 87 .enabled_uarts = (1 << 0),
93}; 88};
94 89
90/* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
91 * and U-Boot environment this avoids dependency on any particular combination
92 * of UBL, U-Boot or flashing tools etc.
93 */
94static struct mtd_partition davinci_nand_partitions[] = {
95 {
96 /* UBL, U-Boot with environment */
97 .name = "bootloader",
98 .offset = MTDPART_OFS_APPEND,
99 .size = 16 * NAND_BLOCK_SIZE,
100 .mask_flags = MTD_WRITEABLE, /* force read-only */
101 }, {
102 .name = "kernel",
103 .offset = MTDPART_OFS_APPEND,
104 .size = SZ_4M,
105 .mask_flags = 0,
106 }, {
107 .name = "filesystem",
108 .offset = MTDPART_OFS_APPEND,
109 .size = MTDPART_SIZ_FULL,
110 .mask_flags = 0,
111 }
112};
113
114static struct davinci_nand_pdata davinci_nand_data = {
115 .mask_cle = 0x80000,
116 .mask_ale = 0x40000,
117 .parts = davinci_nand_partitions,
118 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
119 .ecc_mode = NAND_ECC_HW,
120 .options = 0,
121};
122
123static struct resource davinci_nand_resources[] = {
124 {
125 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
126 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
127 .flags = IORESOURCE_MEM,
128 }, {
129 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
130 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
131 .flags = IORESOURCE_MEM,
132 },
133};
134
135static struct platform_device davinci_nand_device = {
136 .name = "davinci_nand",
137 .id = 0,
138
139 .num_resources = ARRAY_SIZE(davinci_nand_resources),
140 .resource = davinci_nand_resources,
141
142 .dev = {
143 .platform_data = &davinci_nand_data,
144 },
145};
146
95/* CPLD Register 0 Client: used for I/O Control */ 147/* CPLD Register 0 Client: used for I/O Control */
96static int cpld_reg0_probe(struct i2c_client *client, 148static int cpld_reg0_probe(struct i2c_client *client,
97 const struct i2c_device_id *id) 149 const struct i2c_device_id *id)
@@ -142,7 +194,7 @@ static struct gpio_led evm_leds[] = {
142 { .name = "DS4", .active_low = 1, }, 194 { .name = "DS4", .active_low = 1, },
143}; 195};
144 196
145static __initconst struct gpio_led_platform_data evm_led_data = { 197static const struct gpio_led_platform_data evm_led_data = {
146 .num_leds = ARRAY_SIZE(evm_leds), 198 .num_leds = ARRAY_SIZE(evm_leds),
147 .leds = evm_leds, 199 .leds = evm_leds,
148}; 200};
@@ -647,6 +699,8 @@ static __init void evm_init(void)
647 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]); 699 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
648 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]); 700 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
649 701
702 platform_device_register(&davinci_nand_device);
703
650 if (HAS_ATA) 704 if (HAS_ATA)
651 dm646x_init_ide(); 705 dm646x_init_ide();
652 706
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
new file mode 100644
index 000000000000..bd9ca079b69d
--- /dev/null
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -0,0 +1,323 @@
1/*
2 * Neuros Technologies OSD2 board support
3 *
4 * Modified from original 644X-EVM board support.
5 * 2008 (c) Neuros Technology, LLC.
6 * 2009 (c) Jorge Luis Zapata Muga <jorgeluis.zapata@gmail.com>
7 * 2009 (c) Andrey A. Porodko <Andrey.Porodko@gmail.com>
8 *
9 * The Neuros OSD 2.0 is the hardware component of the Neuros Open
10 * Internet Television Platform. Hardware is very close to TI
11 * DM644X-EVM board. It has:
12 * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
13 * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
14 * Additionaly realtime clock, IR remote control receiver,
15 * IR Blaster based on MSP430 (firmware although is different
16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
17 * with PATA interface, two muxed red-green leds.
18 *
19 * For more information please refer to
20 * http://wiki.neurostechnology.com/index.php/OSD_2.0_HD
21 *
22 * This file is licensed under the terms of the GNU General Public
23 * License version 2. This program is licensed "as is" without any
24 * warranty of any kind, whether express or implied.
25 */
26#include <linux/platform_device.h>
27#include <linux/gpio.h>
28#include <linux/mtd/partitions.h>
29
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32
33#include <mach/dm644x.h>
34#include <mach/i2c.h>
35#include <mach/serial.h>
36#include <mach/mux.h>
37#include <mach/nand.h>
38#include <mach/mmc.h>
39#include <mach/usb.h>
40
41#define NEUROS_OSD2_PHY_MASK 0x2
42#define NEUROS_OSD2_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
43
44#define DAVINCI_CFC_ATA_BASE 0x01C66000
45
46#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
47#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
48
49#define LXT971_PHY_ID 0x001378e2
50#define LXT971_PHY_MASK 0xfffffff0
51
52#define NTOSD2_AUDIOSOC_I2C_ADDR 0x18
53#define NTOSD2_MSP430_I2C_ADDR 0x59
54#define NTOSD2_MSP430_IRQ 2
55
56/* Neuros OSD2 has a Samsung 256 MByte NAND flash (Dev ID of 0xAA,
57 * 2048 blocks in the device, 64 pages per block, 2048 bytes per
58 * page.
59 */
60
61#define NAND_BLOCK_SIZE SZ_128K
62
63struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
64 {
65 /* UBL (a few copies) plus U-Boot */
66 .name = "bootloader",
67 .offset = 0,
68 .size = 15 * NAND_BLOCK_SIZE,
69 .mask_flags = MTD_WRITEABLE, /* force read-only */
70 }, {
71 /* U-Boot environment */
72 .name = "params",
73 .offset = MTDPART_OFS_APPEND,
74 .size = 1 * NAND_BLOCK_SIZE,
75 .mask_flags = 0,
76 }, {
77 /* Kernel */
78 .name = "kernel",
79 .offset = MTDPART_OFS_APPEND,
80 .size = SZ_4M,
81 .mask_flags = 0,
82 }, {
83 /* File System */
84 .name = "filesystem",
85 .offset = MTDPART_OFS_APPEND,
86 .size = MTDPART_SIZ_FULL,
87 .mask_flags = 0,
88 }
89 /* A few blocks at end hold a flash Bad Block Table. */
90};
91
92static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
93 .parts = davinci_ntosd2_nandflash_partition,
94 .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
95 .ecc_mode = NAND_ECC_HW,
96 .options = NAND_USE_FLASH_BBT,
97};
98
99static struct resource davinci_ntosd2_nandflash_resource[] = {
100 {
101 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
102 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
103 .flags = IORESOURCE_MEM,
104 }, {
105 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
106 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
107 .flags = IORESOURCE_MEM,
108 },
109};
110
111static struct platform_device davinci_ntosd2_nandflash_device = {
112 .name = "davinci_nand",
113 .id = 0,
114 .dev = {
115 .platform_data = &davinci_ntosd2_nandflash_data,
116 },
117 .num_resources = ARRAY_SIZE(davinci_ntosd2_nandflash_resource),
118 .resource = davinci_ntosd2_nandflash_resource,
119};
120
121static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
122
123static struct platform_device davinci_fb_device = {
124 .name = "davincifb",
125 .id = -1,
126 .dev = {
127 .dma_mask = &davinci_fb_dma_mask,
128 .coherent_dma_mask = DMA_BIT_MASK(32),
129 },
130 .num_resources = 0,
131};
132
133static struct resource ide_resources[] = {
134 {
135 .start = DAVINCI_CFC_ATA_BASE,
136 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
137 .flags = IORESOURCE_MEM,
138 },
139 {
140 .start = IRQ_IDE,
141 .end = IRQ_IDE,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static u64 ide_dma_mask = DMA_BIT_MASK(32);
147
148static struct platform_device ide_dev = {
149 .name = "palm_bk3710",
150 .id = -1,
151 .resource = ide_resources,
152 .num_resources = ARRAY_SIZE(ide_resources),
153 .dev = {
154 .dma_mask = &ide_dma_mask,
155 .coherent_dma_mask = DMA_BIT_MASK(32),
156 },
157};
158
159static struct snd_platform_data dm644x_ntosd2_snd_data;
160
161static struct gpio_led ntosd2_leds[] = {
162 { .name = "led1_green", .gpio = GPIO(10), },
163 { .name = "led1_red", .gpio = GPIO(11), },
164 { .name = "led2_green", .gpio = GPIO(12), },
165 { .name = "led2_red", .gpio = GPIO(13), },
166};
167
168static struct gpio_led_platform_data ntosd2_leds_data = {
169 .num_leds = ARRAY_SIZE(ntosd2_leds),
170 .leds = ntosd2_leds,
171};
172
173static struct platform_device ntosd2_leds_dev = {
174 .name = "leds-gpio",
175 .id = -1,
176 .dev = {
177 .platform_data = &ntosd2_leds_data,
178 },
179};
180
181
182static struct platform_device *davinci_ntosd2_devices[] __initdata = {
183 &davinci_fb_device,
184 &ntosd2_leds_dev,
185};
186
187static struct davinci_uart_config uart_config __initdata = {
188 .enabled_uarts = (1 << 0),
189};
190
191static void __init davinci_ntosd2_map_io(void)
192{
193 dm644x_init();
194}
195
196/*
197 I2C initialization
198*/
199static struct davinci_i2c_platform_data ntosd2_i2c_pdata = {
200 .bus_freq = 20 /* kHz */,
201 .bus_delay = 100 /* usec */,
202};
203
204static struct i2c_board_info __initdata ntosd2_i2c_info[] = {
205};
206
207static int ntosd2_init_i2c(void)
208{
209 int status;
210
211 davinci_init_i2c(&ntosd2_i2c_pdata);
212 status = gpio_request(NTOSD2_MSP430_IRQ, ntosd2_i2c_info[0].type);
213 if (status == 0) {
214 status = gpio_direction_input(NTOSD2_MSP430_IRQ);
215 if (status == 0) {
216 status = gpio_to_irq(NTOSD2_MSP430_IRQ);
217 if (status > 0) {
218 ntosd2_i2c_info[0].irq = status;
219 i2c_register_board_info(1,
220 ntosd2_i2c_info,
221 ARRAY_SIZE(ntosd2_i2c_info));
222 }
223 }
224 }
225 return status;
226}
227
228static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
229 .wires = 4,
230 .version = MMC_CTLR_VERSION_1
231};
232
233
234#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
235 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
236#define HAS_ATA 1
237#else
238#define HAS_ATA 0
239#endif
240
241#if defined(CONFIG_MTD_NAND_DAVINCI) || \
242 defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
243#define HAS_NAND 1
244#else
245#define HAS_NAND 0
246#endif
247
248static __init void davinci_ntosd2_init(void)
249{
250 struct clk *aemif_clk;
251 struct davinci_soc_info *soc_info = &davinci_soc_info;
252 int status;
253
254 aemif_clk = clk_get(NULL, "aemif");
255 clk_enable(aemif_clk);
256
257 if (HAS_ATA) {
258 if (HAS_NAND)
259 pr_warning("WARNING: both IDE and Flash are "
260 "enabled, but they share AEMIF pins.\n"
261 "\tDisable IDE for NAND/NOR support.\n");
262 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
263 davinci_cfg_reg(DM644X_ATAEN);
264 davinci_cfg_reg(DM644X_HDIREN);
265 platform_device_register(&ide_dev);
266 } else if (HAS_NAND) {
267 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
268 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
269
270 /* only one device will be jumpered and detected */
271 if (HAS_NAND)
272 platform_device_register(
273 &davinci_ntosd2_nandflash_device);
274 }
275
276 platform_add_devices(davinci_ntosd2_devices,
277 ARRAY_SIZE(davinci_ntosd2_devices));
278
279 /* Initialize I2C interface specific for this board */
280 status = ntosd2_init_i2c();
281 if (status < 0)
282 pr_warning("davinci_ntosd2_init: msp430 irq setup failed:"
283 " %d\n", status);
284
285 davinci_serial_init(&uart_config);
286 dm644x_init_asp(&dm644x_ntosd2_snd_data);
287
288 soc_info->emac_pdata->phy_mask = NEUROS_OSD2_PHY_MASK;
289 soc_info->emac_pdata->mdio_max_freq = NEUROS_OSD2_MDIO_FREQUENCY;
290
291 davinci_setup_usb(1000, 8);
292 /*
293 * Mux the pins to be GPIOs, VLYNQEN is already done at startup.
294 * The AEAWx are five new AEAW pins that can be muxed by separately.
295 * They are a bitmask for GPIO management. According TI
296 * documentation (http://www.ti.com/lit/gpn/tms320dm6446) to employ
297 * gpio(10,11,12,13) for leds any combination of bits works except
298 * four last. So we are to reset all five.
299 */
300 davinci_cfg_reg(DM644X_AEAW0);
301 davinci_cfg_reg(DM644X_AEAW1);
302 davinci_cfg_reg(DM644X_AEAW2);
303 davinci_cfg_reg(DM644X_AEAW3);
304 davinci_cfg_reg(DM644X_AEAW4);
305
306 davinci_setup_mmc(0, &davinci_ntosd2_mmc_config);
307}
308
309static __init void davinci_ntosd2_irq_init(void)
310{
311 davinci_irq_init();
312}
313
314MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
315 /* Maintainer: Neuros Technologies <neuros@groups.google.com> */
316 .phys_io = IO_PHYS,
317 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
318 .boot_params = (DAVINCI_DDR_BASE + 0x100),
319 .map_io = davinci_ntosd2_map_io,
320 .init_irq = davinci_ntosd2_irq_init,
321 .timer = &davinci_timer,
322 .init_machine = davinci_ntosd2_init,
323MACHINE_END
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 7acdfd8ac071..08d373bfcc8a 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -23,35 +23,24 @@
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 24 */
25 25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/init.h> 26#include <linux/init.h>
29#include <linux/dma-mapping.h>
30#include <linux/platform_device.h> 27#include <linux/platform_device.h>
31#include <linux/gpio.h>
32
33#include <linux/i2c.h> 28#include <linux/i2c.h>
34#include <linux/i2c/at24.h> 29#include <linux/i2c/at24.h>
35#include <linux/etherdevice.h>
36#include <linux/mtd/mtd.h> 30#include <linux/mtd/mtd.h>
37#include <linux/mtd/nand.h> 31#include <linux/mtd/nand.h>
38#include <linux/mtd/partitions.h> 32#include <linux/mtd/partitions.h>
39#include <linux/mtd/physmap.h>
40#include <linux/io.h>
41 33
42#include <asm/setup.h>
43#include <asm/mach-types.h> 34#include <asm/mach-types.h>
44
45#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
46#include <asm/mach/map.h>
47#include <asm/mach/flash.h> 36#include <asm/mach/flash.h>
48 37
49#include <mach/dm644x.h> 38#include <mach/dm644x.h>
50#include <mach/common.h> 39#include <mach/common.h>
51#include <mach/i2c.h> 40#include <mach/i2c.h>
52#include <mach/serial.h> 41#include <mach/serial.h>
53#include <mach/psc.h>
54#include <mach/mux.h> 42#include <mach/mux.h>
43#include <mach/usb.h>
55 44
56#define SFFSDR_PHY_MASK (0x2) 45#define SFFSDR_PHY_MASK (0x2)
57#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ 46#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
@@ -107,11 +96,6 @@ static struct platform_device davinci_sffsdr_nandflash_device = {
107 .resource = davinci_sffsdr_nandflash_resource, 96 .resource = davinci_sffsdr_nandflash_resource,
108}; 97};
109 98
110static struct emac_platform_data sffsdr_emac_pdata = {
111 .phy_mask = SFFSDR_PHY_MASK,
112 .mdio_max_freq = SFFSDR_MDIO_FREQUENCY,
113};
114
115static struct at24_platform_data eeprom_info = { 99static struct at24_platform_data eeprom_info = {
116 .byte_len = (64*1024) / 8, 100 .byte_len = (64*1024) / 8,
117 .page_size = 32, 101 .page_size = 32,
@@ -164,7 +148,7 @@ static __init void davinci_sffsdr_init(void)
164 davinci_serial_init(&uart_config); 148 davinci_serial_init(&uart_config);
165 soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK; 149 soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK;
166 soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY; 150 soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY;
167 setup_usb(0, 0); /* We support only peripheral mode. */ 151 davinci_setup_usb(0, 0); /* We support only peripheral mode. */
168 152
169 /* mux VLYNQ pins */ 153 /* mux VLYNQ pins */
170 davinci_cfg_reg(DM644X_VLYNQEN); 154 davinci_cfg_reg(DM644X_VLYNQEN);
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 83d54d50b5ea..baece65cb9c0 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -17,8 +17,8 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/mutex.h> 19#include <linux/mutex.h>
20#include <linux/platform_device.h>
21#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/delay.h>
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24 24
@@ -42,8 +42,7 @@ static void __clk_enable(struct clk *clk)
42 if (clk->parent) 42 if (clk->parent)
43 __clk_enable(clk->parent); 43 __clk_enable(clk->parent);
44 if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) 44 if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
45 davinci_psc_config(psc_domain(clk), clk->psc_ctlr, 45 davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 1);
46 clk->lpsc, 1);
47} 46}
48 47
49static void __clk_disable(struct clk *clk) 48static void __clk_disable(struct clk *clk)
@@ -51,8 +50,7 @@ static void __clk_disable(struct clk *clk)
51 if (WARN_ON(clk->usecount == 0)) 50 if (WARN_ON(clk->usecount == 0))
52 return; 51 return;
53 if (--clk->usecount == 0 && !(clk->flags & CLK_PLL)) 52 if (--clk->usecount == 0 && !(clk->flags & CLK_PLL))
54 davinci_psc_config(psc_domain(clk), clk->psc_ctlr, 53 davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 0);
55 clk->lpsc, 0);
56 if (clk->parent) 54 if (clk->parent)
57 __clk_disable(clk->parent); 55 __clk_disable(clk->parent);
58} 56}
@@ -99,20 +97,74 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
99 if (clk == NULL || IS_ERR(clk)) 97 if (clk == NULL || IS_ERR(clk))
100 return -EINVAL; 98 return -EINVAL;
101 99
100 if (clk->round_rate)
101 return clk->round_rate(clk, rate);
102
102 return clk->rate; 103 return clk->rate;
103} 104}
104EXPORT_SYMBOL(clk_round_rate); 105EXPORT_SYMBOL(clk_round_rate);
105 106
107/* Propagate rate to children */
108static void propagate_rate(struct clk *root)
109{
110 struct clk *clk;
111
112 list_for_each_entry(clk, &root->children, childnode) {
113 if (clk->recalc)
114 clk->rate = clk->recalc(clk);
115 propagate_rate(clk);
116 }
117}
118
106int clk_set_rate(struct clk *clk, unsigned long rate) 119int clk_set_rate(struct clk *clk, unsigned long rate)
107{ 120{
121 unsigned long flags;
122 int ret = -EINVAL;
123
108 if (clk == NULL || IS_ERR(clk)) 124 if (clk == NULL || IS_ERR(clk))
109 return -EINVAL; 125 return ret;
110 126
111 /* changing the clk rate is not supported */ 127 spin_lock_irqsave(&clockfw_lock, flags);
112 return -EINVAL; 128 if (clk->set_rate)
129 ret = clk->set_rate(clk, rate);
130 if (ret == 0) {
131 if (clk->recalc)
132 clk->rate = clk->recalc(clk);
133 propagate_rate(clk);
134 }
135 spin_unlock_irqrestore(&clockfw_lock, flags);
136
137 return ret;
113} 138}
114EXPORT_SYMBOL(clk_set_rate); 139EXPORT_SYMBOL(clk_set_rate);
115 140
141int clk_set_parent(struct clk *clk, struct clk *parent)
142{
143 unsigned long flags;
144
145 if (clk == NULL || IS_ERR(clk))
146 return -EINVAL;
147
148 /* Cannot change parent on enabled clock */
149 if (WARN_ON(clk->usecount))
150 return -EINVAL;
151
152 mutex_lock(&clocks_mutex);
153 clk->parent = parent;
154 list_del_init(&clk->childnode);
155 list_add(&clk->childnode, &clk->parent->children);
156 mutex_unlock(&clocks_mutex);
157
158 spin_lock_irqsave(&clockfw_lock, flags);
159 if (clk->recalc)
160 clk->rate = clk->recalc(clk);
161 propagate_rate(clk);
162 spin_unlock_irqrestore(&clockfw_lock, flags);
163
164 return 0;
165}
166EXPORT_SYMBOL(clk_set_parent);
167
116int clk_register(struct clk *clk) 168int clk_register(struct clk *clk)
117{ 169{
118 if (clk == NULL || IS_ERR(clk)) 170 if (clk == NULL || IS_ERR(clk))
@@ -123,16 +175,24 @@ int clk_register(struct clk *clk)
123 clk->name, clk->parent->name)) 175 clk->name, clk->parent->name))
124 return -EINVAL; 176 return -EINVAL;
125 177
178 INIT_LIST_HEAD(&clk->children);
179
126 mutex_lock(&clocks_mutex); 180 mutex_lock(&clocks_mutex);
127 list_add_tail(&clk->node, &clocks); 181 list_add_tail(&clk->node, &clocks);
182 if (clk->parent)
183 list_add_tail(&clk->childnode, &clk->parent->children);
128 mutex_unlock(&clocks_mutex); 184 mutex_unlock(&clocks_mutex);
129 185
130 /* If rate is already set, use it */ 186 /* If rate is already set, use it */
131 if (clk->rate) 187 if (clk->rate)
132 return 0; 188 return 0;
133 189
190 /* Else, see if there is a way to calculate it */
191 if (clk->recalc)
192 clk->rate = clk->recalc(clk);
193
134 /* Otherwise, default to parent rate */ 194 /* Otherwise, default to parent rate */
135 if (clk->parent) 195 else if (clk->parent)
136 clk->rate = clk->parent->rate; 196 clk->rate = clk->parent->rate;
137 197
138 return 0; 198 return 0;
@@ -146,6 +206,7 @@ void clk_unregister(struct clk *clk)
146 206
147 mutex_lock(&clocks_mutex); 207 mutex_lock(&clocks_mutex);
148 list_del(&clk->node); 208 list_del(&clk->node);
209 list_del(&clk->childnode);
149 mutex_unlock(&clocks_mutex); 210 mutex_unlock(&clocks_mutex);
150} 211}
151EXPORT_SYMBOL(clk_unregister); 212EXPORT_SYMBOL(clk_unregister);
@@ -166,11 +227,11 @@ static int __init clk_disable_unused(void)
166 continue; 227 continue;
167 228
168 /* ignore if in Disabled or SwRstDisable states */ 229 /* ignore if in Disabled or SwRstDisable states */
169 if (!davinci_psc_is_clk_active(ck->psc_ctlr, ck->lpsc)) 230 if (!davinci_psc_is_clk_active(ck->gpsc, ck->lpsc))
170 continue; 231 continue;
171 232
172 pr_info("Clocks: disable unused %s\n", ck->name); 233 pr_info("Clocks: disable unused %s\n", ck->name);
173 davinci_psc_config(psc_domain(ck), ck->psc_ctlr, ck->lpsc, 0); 234 davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, 0);
174 } 235 }
175 spin_unlock_irq(&clockfw_lock); 236 spin_unlock_irq(&clockfw_lock);
176 237
@@ -179,50 +240,62 @@ static int __init clk_disable_unused(void)
179late_initcall(clk_disable_unused); 240late_initcall(clk_disable_unused);
180#endif 241#endif
181 242
182static void clk_sysclk_recalc(struct clk *clk) 243static unsigned long clk_sysclk_recalc(struct clk *clk)
183{ 244{
184 u32 v, plldiv; 245 u32 v, plldiv;
185 struct pll_data *pll; 246 struct pll_data *pll;
247 unsigned long rate = clk->rate;
186 248
187 /* If this is the PLL base clock, no more calculations needed */ 249 /* If this is the PLL base clock, no more calculations needed */
188 if (clk->pll_data) 250 if (clk->pll_data)
189 return; 251 return rate;
190 252
191 if (WARN_ON(!clk->parent)) 253 if (WARN_ON(!clk->parent))
192 return; 254 return rate;
193 255
194 clk->rate = clk->parent->rate; 256 rate = clk->parent->rate;
195 257
196 /* Otherwise, the parent must be a PLL */ 258 /* Otherwise, the parent must be a PLL */
197 if (WARN_ON(!clk->parent->pll_data)) 259 if (WARN_ON(!clk->parent->pll_data))
198 return; 260 return rate;
199 261
200 pll = clk->parent->pll_data; 262 pll = clk->parent->pll_data;
201 263
202 /* If pre-PLL, source clock is before the multiplier and divider(s) */ 264 /* If pre-PLL, source clock is before the multiplier and divider(s) */
203 if (clk->flags & PRE_PLL) 265 if (clk->flags & PRE_PLL)
204 clk->rate = pll->input_rate; 266 rate = pll->input_rate;
205 267
206 if (!clk->div_reg) 268 if (!clk->div_reg)
207 return; 269 return rate;
208 270
209 v = __raw_readl(pll->base + clk->div_reg); 271 v = __raw_readl(pll->base + clk->div_reg);
210 if (v & PLLDIV_EN) { 272 if (v & PLLDIV_EN) {
211 plldiv = (v & PLLDIV_RATIO_MASK) + 1; 273 plldiv = (v & PLLDIV_RATIO_MASK) + 1;
212 if (plldiv) 274 if (plldiv)
213 clk->rate /= plldiv; 275 rate /= plldiv;
214 } 276 }
277
278 return rate;
279}
280
281static unsigned long clk_leafclk_recalc(struct clk *clk)
282{
283 if (WARN_ON(!clk->parent))
284 return clk->rate;
285
286 return clk->parent->rate;
215} 287}
216 288
217static void __init clk_pll_init(struct clk *clk) 289static unsigned long clk_pllclk_recalc(struct clk *clk)
218{ 290{
219 u32 ctrl, mult = 1, prediv = 1, postdiv = 1; 291 u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
220 u8 bypass; 292 u8 bypass;
221 struct pll_data *pll = clk->pll_data; 293 struct pll_data *pll = clk->pll_data;
294 unsigned long rate = clk->rate;
222 295
223 pll->base = IO_ADDRESS(pll->phys_base); 296 pll->base = IO_ADDRESS(pll->phys_base);
224 ctrl = __raw_readl(pll->base + PLLCTL); 297 ctrl = __raw_readl(pll->base + PLLCTL);
225 clk->rate = pll->input_rate = clk->parent->rate; 298 rate = pll->input_rate = clk->parent->rate;
226 299
227 if (ctrl & PLLCTL_PLLEN) { 300 if (ctrl & PLLCTL_PLLEN) {
228 bypass = 0; 301 bypass = 0;
@@ -255,9 +328,9 @@ static void __init clk_pll_init(struct clk *clk)
255 } 328 }
256 329
257 if (!bypass) { 330 if (!bypass) {
258 clk->rate /= prediv; 331 rate /= prediv;
259 clk->rate *= mult; 332 rate *= mult;
260 clk->rate /= postdiv; 333 rate /= postdiv;
261 } 334 }
262 335
263 pr_debug("PLL%d: input = %lu MHz [ ", 336 pr_debug("PLL%d: input = %lu MHz [ ",
@@ -270,8 +343,90 @@ static void __init clk_pll_init(struct clk *clk)
270 pr_debug("* %d ", mult); 343 pr_debug("* %d ", mult);
271 if (postdiv > 1) 344 if (postdiv > 1)
272 pr_debug("/ %d ", postdiv); 345 pr_debug("/ %d ", postdiv);
273 pr_debug("] --> %lu MHz output.\n", clk->rate / 1000000); 346 pr_debug("] --> %lu MHz output.\n", rate / 1000000);
347
348 return rate;
349}
350
351/**
352 * davinci_set_pllrate - set the output rate of a given PLL.
353 *
354 * Note: Currently tested to work with OMAP-L138 only.
355 *
356 * @pll: pll whose rate needs to be changed.
357 * @prediv: The pre divider value. Passing 0 disables the pre-divider.
358 * @pllm: The multiplier value. Passing 0 leads to multiply-by-one.
359 * @postdiv: The post divider value. Passing 0 disables the post-divider.
360 */
361int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
362 unsigned int mult, unsigned int postdiv)
363{
364 u32 ctrl;
365 unsigned int locktime;
366
367 if (pll->base == NULL)
368 return -EINVAL;
369
370 /*
371 * PLL lock time required per OMAP-L138 datasheet is
372 * (2000 * prediv)/sqrt(pllm) OSCIN cycles. We approximate sqrt(pllm)
373 * as 4 and OSCIN cycle as 25 MHz.
374 */
375 if (prediv) {
376 locktime = ((2000 * prediv) / 100);
377 prediv = (prediv - 1) | PLLDIV_EN;
378 } else {
379 locktime = 20;
380 }
381 if (postdiv)
382 postdiv = (postdiv - 1) | PLLDIV_EN;
383 if (mult)
384 mult = mult - 1;
385
386 ctrl = __raw_readl(pll->base + PLLCTL);
387
388 /* Switch the PLL to bypass mode */
389 ctrl &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN);
390 __raw_writel(ctrl, pll->base + PLLCTL);
391
392 /*
393 * Wait for 4 OSCIN/CLKIN cycles to ensure that the PLLC has switched
394 * to bypass mode. Delay of 1us ensures we are good for all > 4MHz
395 * OSCIN/CLKIN inputs. Typically the input is ~25MHz.
396 */
397 udelay(1);
398
399 /* Reset and enable PLL */
400 ctrl &= ~(PLLCTL_PLLRST | PLLCTL_PLLDIS);
401 __raw_writel(ctrl, pll->base + PLLCTL);
402
403 if (pll->flags & PLL_HAS_PREDIV)
404 __raw_writel(prediv, pll->base + PREDIV);
405
406 __raw_writel(mult, pll->base + PLLM);
407
408 if (pll->flags & PLL_HAS_POSTDIV)
409 __raw_writel(postdiv, pll->base + POSTDIV);
410
411 /*
412 * Wait for PLL to reset properly, OMAP-L138 datasheet says
413 * 'min' time = 125ns
414 */
415 udelay(1);
416
417 /* Bring PLL out of reset */
418 ctrl |= PLLCTL_PLLRST;
419 __raw_writel(ctrl, pll->base + PLLCTL);
420
421 udelay(locktime);
422
423 /* Remove PLL from bypass mode */
424 ctrl |= PLLCTL_PLLEN;
425 __raw_writel(ctrl, pll->base + PLLCTL);
426
427 return 0;
274} 428}
429EXPORT_SYMBOL(davinci_set_pllrate);
275 430
276int __init davinci_clk_init(struct davinci_clk *clocks) 431int __init davinci_clk_init(struct davinci_clk *clocks)
277 { 432 {
@@ -281,12 +436,23 @@ int __init davinci_clk_init(struct davinci_clk *clocks)
281 for (c = clocks; c->lk.clk; c++) { 436 for (c = clocks; c->lk.clk; c++) {
282 clk = c->lk.clk; 437 clk = c->lk.clk;
283 438
284 if (clk->pll_data) 439 if (!clk->recalc) {
285 clk_pll_init(clk); 440
441 /* Check if clock is a PLL */
442 if (clk->pll_data)
443 clk->recalc = clk_pllclk_recalc;
444
445 /* Else, if it is a PLL-derived clock */
446 else if (clk->flags & CLK_PLL)
447 clk->recalc = clk_sysclk_recalc;
448
449 /* Otherwise, it is a leaf clock (PSC clock) */
450 else if (clk->parent)
451 clk->recalc = clk_leafclk_recalc;
452 }
286 453
287 /* Calculate rates for PLL-derived clocks */ 454 if (clk->recalc)
288 else if (clk->flags & CLK_PLL) 455 clk->rate = clk->recalc(clk);
289 clk_sysclk_recalc(clk);
290 456
291 if (clk->lpsc) 457 if (clk->lpsc)
292 clk->flags |= CLK_PSC; 458 clk->flags |= CLK_PSC;
@@ -352,9 +518,8 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
352 /* REVISIT show device associations too */ 518 /* REVISIT show device associations too */
353 519
354 /* cost is now small, but not linear... */ 520 /* cost is now small, but not linear... */
355 list_for_each_entry(clk, &clocks, node) { 521 list_for_each_entry(clk, &parent->children, childnode) {
356 if (clk->parent == parent) 522 dump_clock(s, nest + NEST_DELTA, clk);
357 dump_clock(s, nest + NEST_DELTA, clk);
358 } 523 }
359} 524}
360 525
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 27233cb4a2fb..c92d77a3008d 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -22,6 +22,10 @@
22/* PLL/Reset register offsets */ 22/* PLL/Reset register offsets */
23#define PLLCTL 0x100 23#define PLLCTL 0x100
24#define PLLCTL_PLLEN BIT(0) 24#define PLLCTL_PLLEN BIT(0)
25#define PLLCTL_PLLPWRDN BIT(1)
26#define PLLCTL_PLLRST BIT(3)
27#define PLLCTL_PLLDIS BIT(4)
28#define PLLCTL_PLLENSRC BIT(5)
25#define PLLCTL_CLKMODE BIT(8) 29#define PLLCTL_CLKMODE BIT(8)
26 30
27#define PLLM 0x110 31#define PLLM 0x110
@@ -65,15 +69,20 @@ struct clk {
65 const char *name; 69 const char *name;
66 unsigned long rate; 70 unsigned long rate;
67 u8 usecount; 71 u8 usecount;
68 u8 flags;
69 u8 lpsc; 72 u8 lpsc;
70 u8 psc_ctlr; 73 u8 gpsc;
74 u32 flags;
71 struct clk *parent; 75 struct clk *parent;
76 struct list_head children; /* list of children */
77 struct list_head childnode; /* parent's child list node */
72 struct pll_data *pll_data; 78 struct pll_data *pll_data;
73 u32 div_reg; 79 u32 div_reg;
80 unsigned long (*recalc) (struct clk *);
81 int (*set_rate) (struct clk *clk, unsigned long rate);
82 int (*round_rate) (struct clk *clk, unsigned long rate);
74}; 83};
75 84
76/* Clock flags */ 85/* Clock flags: SoC-specific flags start at BIT(16) */
77#define ALWAYS_ENABLED BIT(1) 86#define ALWAYS_ENABLED BIT(1)
78#define CLK_PSC BIT(2) 87#define CLK_PSC BIT(2)
79#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ 88#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */
@@ -94,6 +103,8 @@ struct davinci_clk {
94 } 103 }
95 104
96int davinci_clk_init(struct davinci_clk *clocks); 105int davinci_clk_init(struct davinci_clk *clocks);
106int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
107 unsigned int mult, unsigned int postdiv);
97 108
98extern struct platform_device davinci_wdt_device; 109extern struct platform_device davinci_wdt_device;
99 110
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 61ede19c6b54..c2de94cde56a 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -86,6 +86,8 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
86 dip = davinci_get_id(davinci_soc_info.jtag_id); 86 dip = davinci_get_id(davinci_soc_info.jtag_id);
87 if (!dip) { 87 if (!dip) {
88 ret = -EINVAL; 88 ret = -EINVAL;
89 pr_err("Unknown DaVinci JTAG ID 0x%x\n",
90 davinci_soc_info.jtag_id);
89 goto err; 91 goto err;
90 } 92 }
91 93
@@ -104,5 +106,5 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
104 return; 106 return;
105 107
106err: 108err:
107 pr_err("davinci_common_init: SoC Initialization failed\n"); 109 panic("davinci_common_init: SoC Initialization failed\n");
108} 110}
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 96c8e97a7deb..52b287cf3a42 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -10,9 +10,6 @@
10 */ 10 */
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/sched.h>
14#include <linux/interrupt.h>
15#include <linux/kernel.h>
16#include <linux/irq.h> 13#include <linux/irq.h>
17#include <linux/io.h> 14#include <linux/io.h>
18 15
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
new file mode 100644
index 000000000000..d3fa6de1e20f
--- /dev/null
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -0,0 +1,226 @@
1/*
2 * CPU frequency scaling for DaVinci
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Based on linux/arch/arm/plat-omap/cpu-omap.c. Original Copyright follows:
7 *
8 * Copyright (C) 2005 Nokia Corporation
9 * Written by Tony Lindgren <tony@atomide.com>
10 *
11 * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
12 *
13 * Copyright (C) 2007-2008 Texas Instruments, Inc.
14 * Updated to support OMAP3
15 * Rajendra Nayak <rnayak@ti.com>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21#include <linux/types.h>
22#include <linux/cpufreq.h>
23#include <linux/init.h>
24#include <linux/err.h>
25#include <linux/clk.h>
26#include <linux/platform_device.h>
27
28#include <mach/hardware.h>
29#include <mach/cpufreq.h>
30#include <mach/common.h>
31
32#include "clock.h"
33
34struct davinci_cpufreq {
35 struct device *dev;
36 struct clk *armclk;
37};
38static struct davinci_cpufreq cpufreq;
39
40static int davinci_verify_speed(struct cpufreq_policy *policy)
41{
42 struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
43 struct cpufreq_frequency_table *freq_table = pdata->freq_table;
44 struct clk *armclk = cpufreq.armclk;
45
46 if (freq_table)
47 return cpufreq_frequency_table_verify(policy, freq_table);
48
49 if (policy->cpu)
50 return -EINVAL;
51
52 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
53 policy->cpuinfo.max_freq);
54
55 policy->min = clk_round_rate(armclk, policy->min * 1000) / 1000;
56 policy->max = clk_round_rate(armclk, policy->max * 1000) / 1000;
57 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
58 policy->cpuinfo.max_freq);
59 return 0;
60}
61
62static unsigned int davinci_getspeed(unsigned int cpu)
63{
64 if (cpu)
65 return 0;
66
67 return clk_get_rate(cpufreq.armclk) / 1000;
68}
69
70static int davinci_target(struct cpufreq_policy *policy,
71 unsigned int target_freq, unsigned int relation)
72{
73 int ret = 0;
74 unsigned int idx;
75 struct cpufreq_freqs freqs;
76 struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
77 struct clk *armclk = cpufreq.armclk;
78
79 /*
80 * Ensure desired rate is within allowed range. Some govenors
81 * (ondemand) will just pass target_freq=0 to get the minimum.
82 */
83 if (target_freq < policy->cpuinfo.min_freq)
84 target_freq = policy->cpuinfo.min_freq;
85 if (target_freq > policy->cpuinfo.max_freq)
86 target_freq = policy->cpuinfo.max_freq;
87
88 freqs.old = davinci_getspeed(0);
89 freqs.new = clk_round_rate(armclk, target_freq * 1000) / 1000;
90 freqs.cpu = 0;
91
92 if (freqs.old == freqs.new)
93 return ret;
94
95 cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER,
96 dev_driver_string(cpufreq.dev),
97 "transition: %u --> %u\n", freqs.old, freqs.new);
98
99 ret = cpufreq_frequency_table_target(policy, pdata->freq_table,
100 freqs.new, relation, &idx);
101 if (ret)
102 return -EINVAL;
103
104 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
105
106 /* if moving to higher frequency, up the voltage beforehand */
107 if (pdata->set_voltage && freqs.new > freqs.old)
108 pdata->set_voltage(idx);
109
110 ret = clk_set_rate(armclk, idx);
111
112 /* if moving to lower freq, lower the voltage after lowering freq */
113 if (pdata->set_voltage && freqs.new < freqs.old)
114 pdata->set_voltage(idx);
115
116 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
117
118 return ret;
119}
120
121static int __init davinci_cpu_init(struct cpufreq_policy *policy)
122{
123 int result = 0;
124 struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
125 struct cpufreq_frequency_table *freq_table = pdata->freq_table;
126
127 if (policy->cpu != 0)
128 return -EINVAL;
129
130 /* Finish platform specific initialization */
131 if (pdata->init) {
132 result = pdata->init();
133 if (result)
134 return result;
135 }
136
137 policy->cur = policy->min = policy->max = davinci_getspeed(0);
138
139 if (freq_table) {
140 result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
141 if (!result)
142 cpufreq_frequency_table_get_attr(freq_table,
143 policy->cpu);
144 } else {
145 policy->cpuinfo.min_freq = policy->min;
146 policy->cpuinfo.max_freq = policy->max;
147 }
148
149 policy->min = policy->cpuinfo.min_freq;
150 policy->max = policy->cpuinfo.max_freq;
151 policy->cur = davinci_getspeed(0);
152
153 /*
154 * Time measurement across the target() function yields ~1500-1800us
155 * time taken with no drivers on notification list.
156 * Setting the latency to 2000 us to accomodate addition of drivers
157 * to pre/post change notification list.
158 */
159 policy->cpuinfo.transition_latency = 2000 * 1000;
160 return 0;
161}
162
163static int davinci_cpu_exit(struct cpufreq_policy *policy)
164{
165 cpufreq_frequency_table_put_attr(policy->cpu);
166 return 0;
167}
168
169static struct freq_attr *davinci_cpufreq_attr[] = {
170 &cpufreq_freq_attr_scaling_available_freqs,
171 NULL,
172};
173
174static struct cpufreq_driver davinci_driver = {
175 .flags = CPUFREQ_STICKY,
176 .verify = davinci_verify_speed,
177 .target = davinci_target,
178 .get = davinci_getspeed,
179 .init = davinci_cpu_init,
180 .exit = davinci_cpu_exit,
181 .name = "davinci",
182 .attr = davinci_cpufreq_attr,
183};
184
185static int __init davinci_cpufreq_probe(struct platform_device *pdev)
186{
187 struct davinci_cpufreq_config *pdata = pdev->dev.platform_data;
188
189 if (!pdata)
190 return -EINVAL;
191 if (!pdata->freq_table)
192 return -EINVAL;
193
194 cpufreq.dev = &pdev->dev;
195
196 cpufreq.armclk = clk_get(NULL, "arm");
197 if (IS_ERR(cpufreq.armclk)) {
198 dev_err(cpufreq.dev, "Unable to get ARM clock\n");
199 return PTR_ERR(cpufreq.armclk);
200 }
201
202 return cpufreq_register_driver(&davinci_driver);
203}
204
205static int __exit davinci_cpufreq_remove(struct platform_device *pdev)
206{
207 clk_put(cpufreq.armclk);
208
209 return cpufreq_unregister_driver(&davinci_driver);
210}
211
212static struct platform_driver davinci_cpufreq_driver = {
213 .driver = {
214 .name = "cpufreq-davinci",
215 .owner = THIS_MODULE,
216 },
217 .remove = __exit_p(davinci_cpufreq_remove),
218};
219
220static int __init davinci_cpufreq_init(void)
221{
222 return platform_driver_probe(&davinci_cpufreq_driver,
223 davinci_cpufreq_probe);
224}
225late_initcall(davinci_cpufreq_init);
226
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
new file mode 100644
index 000000000000..97a90f36fc92
--- /dev/null
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -0,0 +1,197 @@
1/*
2 * CPU idle for DaVinci SoCs
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
5 *
6 * Derived from Marvell Kirkwood CPU idle code
7 * (arch/arm/mach-kirkwood/cpuidle.c)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/cpuidle.h>
18#include <linux/io.h>
19#include <asm/proc-fns.h>
20
21#include <mach/cpuidle.h>
22
23#define DAVINCI_CPUIDLE_MAX_STATES 2
24
25struct davinci_ops {
26 void (*enter) (u32 flags);
27 void (*exit) (u32 flags);
28 u32 flags;
29};
30
31/* fields in davinci_ops.flags */
32#define DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN BIT(0)
33
34static struct cpuidle_driver davinci_idle_driver = {
35 .name = "cpuidle-davinci",
36 .owner = THIS_MODULE,
37};
38
39static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
40static void __iomem *ddr2_reg_base;
41
42#define DDR2_SDRCR_OFFSET 0xc
43#define DDR2_SRPD_BIT BIT(23)
44#define DDR2_LPMODEN_BIT BIT(31)
45
46static void davinci_save_ddr_power(int enter, bool pdown)
47{
48 u32 val;
49
50 val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);
51
52 if (enter) {
53 if (pdown)
54 val |= DDR2_SRPD_BIT;
55 else
56 val &= ~DDR2_SRPD_BIT;
57 val |= DDR2_LPMODEN_BIT;
58 } else {
59 val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT);
60 }
61
62 __raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
63}
64
65static void davinci_c2state_enter(u32 flags)
66{
67 davinci_save_ddr_power(1, !!(flags & DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN));
68}
69
70static void davinci_c2state_exit(u32 flags)
71{
72 davinci_save_ddr_power(0, !!(flags & DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN));
73}
74
75static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
76 [1] = {
77 .enter = davinci_c2state_enter,
78 .exit = davinci_c2state_exit,
79 },
80};
81
82/* Actual code that puts the SoC in different idle states */
83static int davinci_enter_idle(struct cpuidle_device *dev,
84 struct cpuidle_state *state)
85{
86 struct davinci_ops *ops = cpuidle_get_statedata(state);
87 struct timeval before, after;
88 int idle_time;
89
90 local_irq_disable();
91 do_gettimeofday(&before);
92
93 if (ops && ops->enter)
94 ops->enter(ops->flags);
95 /* Wait for interrupt state */
96 cpu_do_idle();
97 if (ops && ops->exit)
98 ops->exit(ops->flags);
99
100 do_gettimeofday(&after);
101 local_irq_enable();
102 idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
103 (after.tv_usec - before.tv_usec);
104 return idle_time;
105}
106
107static int __init davinci_cpuidle_probe(struct platform_device *pdev)
108{
109 int ret;
110 struct cpuidle_device *device;
111 struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
112 struct resource *ddr2_regs;
113 resource_size_t len;
114
115 device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
116
117 if (!pdata) {
118 dev_err(&pdev->dev, "cannot get platform data\n");
119 return -ENOENT;
120 }
121
122 ddr2_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
123 if (!ddr2_regs) {
124 dev_err(&pdev->dev, "cannot get DDR2 controller register base");
125 return -ENODEV;
126 }
127
128 len = resource_size(ddr2_regs);
129
130 ddr2_regs = request_mem_region(ddr2_regs->start, len, ddr2_regs->name);
131 if (!ddr2_regs)
132 return -EBUSY;
133
134 ddr2_reg_base = ioremap(ddr2_regs->start, len);
135 if (!ddr2_reg_base) {
136 ret = -ENOMEM;
137 goto ioremap_fail;
138 }
139
140 ret = cpuidle_register_driver(&davinci_idle_driver);
141 if (ret) {
142 dev_err(&pdev->dev, "failed to register driver\n");
143 goto driver_register_fail;
144 }
145
146 /* Wait for interrupt state */
147 device->states[0].enter = davinci_enter_idle;
148 device->states[0].exit_latency = 1;
149 device->states[0].target_residency = 10000;
150 device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
151 strcpy(device->states[0].name, "WFI");
152 strcpy(device->states[0].desc, "Wait for interrupt");
153
154 /* Wait for interrupt and DDR self refresh state */
155 device->states[1].enter = davinci_enter_idle;
156 device->states[1].exit_latency = 10;
157 device->states[1].target_residency = 10000;
158 device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
159 strcpy(device->states[1].name, "DDR SR");
160 strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
161 if (pdata->ddr2_pdown)
162 davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN;
163 cpuidle_set_statedata(&device->states[1], &davinci_states[1]);
164
165 device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
166
167 ret = cpuidle_register_device(device);
168 if (ret) {
169 dev_err(&pdev->dev, "failed to register device\n");
170 goto device_register_fail;
171 }
172
173 return 0;
174
175device_register_fail:
176 cpuidle_unregister_driver(&davinci_idle_driver);
177driver_register_fail:
178 iounmap(ddr2_reg_base);
179ioremap_fail:
180 release_mem_region(ddr2_regs->start, len);
181 return ret;
182}
183
184static struct platform_driver davinci_cpuidle_driver = {
185 .driver = {
186 .name = "cpuidle-davinci",
187 .owner = THIS_MODULE,
188 },
189};
190
191static int __init davinci_cpuidle_init(void)
192{
193 return platform_driver_probe(&davinci_cpuidle_driver,
194 davinci_cpuidle_probe);
195}
196device_initcall(davinci_cpuidle_init);
197
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 19b2748357fc..b22b5cf04250 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -8,22 +8,17 @@
8 * is licensed "as is" without any warranty of any kind, whether express 8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <linux/kernel.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/clk.h> 12#include <linux/clk.h>
14#include <linux/platform_device.h>
15 13
16#include <asm/mach/map.h> 14#include <asm/mach/map.h>
17 15
18#include <mach/clock.h>
19#include <mach/psc.h> 16#include <mach/psc.h>
20#include <mach/mux.h>
21#include <mach/irqs.h> 17#include <mach/irqs.h>
22#include <mach/cputype.h> 18#include <mach/cputype.h>
23#include <mach/common.h> 19#include <mach/common.h>
24#include <mach/time.h> 20#include <mach/time.h>
25#include <mach/da8xx.h> 21#include <mach/da8xx.h>
26#include <mach/asp.h>
27 22
28#include "clock.h" 23#include "clock.h"
29#include "mux.h" 24#include "mux.h"
@@ -193,14 +188,14 @@ static struct clk uart1_clk = {
193 .name = "uart1", 188 .name = "uart1",
194 .parent = &pll0_sysclk2, 189 .parent = &pll0_sysclk2,
195 .lpsc = DA8XX_LPSC1_UART1, 190 .lpsc = DA8XX_LPSC1_UART1,
196 .psc_ctlr = 1, 191 .gpsc = 1,
197}; 192};
198 193
199static struct clk uart2_clk = { 194static struct clk uart2_clk = {
200 .name = "uart2", 195 .name = "uart2",
201 .parent = &pll0_sysclk2, 196 .parent = &pll0_sysclk2,
202 .lpsc = DA8XX_LPSC1_UART2, 197 .lpsc = DA8XX_LPSC1_UART2,
203 .psc_ctlr = 1, 198 .gpsc = 1,
204}; 199};
205 200
206static struct clk spi0_clk = { 201static struct clk spi0_clk = {
@@ -213,98 +208,98 @@ static struct clk spi1_clk = {
213 .name = "spi1", 208 .name = "spi1",
214 .parent = &pll0_sysclk2, 209 .parent = &pll0_sysclk2,
215 .lpsc = DA8XX_LPSC1_SPI1, 210 .lpsc = DA8XX_LPSC1_SPI1,
216 .psc_ctlr = 1, 211 .gpsc = 1,
217}; 212};
218 213
219static struct clk ecap0_clk = { 214static struct clk ecap0_clk = {
220 .name = "ecap0", 215 .name = "ecap0",
221 .parent = &pll0_sysclk2, 216 .parent = &pll0_sysclk2,
222 .lpsc = DA8XX_LPSC1_ECAP, 217 .lpsc = DA8XX_LPSC1_ECAP,
223 .psc_ctlr = 1, 218 .gpsc = 1,
224}; 219};
225 220
226static struct clk ecap1_clk = { 221static struct clk ecap1_clk = {
227 .name = "ecap1", 222 .name = "ecap1",
228 .parent = &pll0_sysclk2, 223 .parent = &pll0_sysclk2,
229 .lpsc = DA8XX_LPSC1_ECAP, 224 .lpsc = DA8XX_LPSC1_ECAP,
230 .psc_ctlr = 1, 225 .gpsc = 1,
231}; 226};
232 227
233static struct clk ecap2_clk = { 228static struct clk ecap2_clk = {
234 .name = "ecap2", 229 .name = "ecap2",
235 .parent = &pll0_sysclk2, 230 .parent = &pll0_sysclk2,
236 .lpsc = DA8XX_LPSC1_ECAP, 231 .lpsc = DA8XX_LPSC1_ECAP,
237 .psc_ctlr = 1, 232 .gpsc = 1,
238}; 233};
239 234
240static struct clk pwm0_clk = { 235static struct clk pwm0_clk = {
241 .name = "pwm0", 236 .name = "pwm0",
242 .parent = &pll0_sysclk2, 237 .parent = &pll0_sysclk2,
243 .lpsc = DA8XX_LPSC1_PWM, 238 .lpsc = DA8XX_LPSC1_PWM,
244 .psc_ctlr = 1, 239 .gpsc = 1,
245}; 240};
246 241
247static struct clk pwm1_clk = { 242static struct clk pwm1_clk = {
248 .name = "pwm1", 243 .name = "pwm1",
249 .parent = &pll0_sysclk2, 244 .parent = &pll0_sysclk2,
250 .lpsc = DA8XX_LPSC1_PWM, 245 .lpsc = DA8XX_LPSC1_PWM,
251 .psc_ctlr = 1, 246 .gpsc = 1,
252}; 247};
253 248
254static struct clk pwm2_clk = { 249static struct clk pwm2_clk = {
255 .name = "pwm2", 250 .name = "pwm2",
256 .parent = &pll0_sysclk2, 251 .parent = &pll0_sysclk2,
257 .lpsc = DA8XX_LPSC1_PWM, 252 .lpsc = DA8XX_LPSC1_PWM,
258 .psc_ctlr = 1, 253 .gpsc = 1,
259}; 254};
260 255
261static struct clk eqep0_clk = { 256static struct clk eqep0_clk = {
262 .name = "eqep0", 257 .name = "eqep0",
263 .parent = &pll0_sysclk2, 258 .parent = &pll0_sysclk2,
264 .lpsc = DA830_LPSC1_EQEP, 259 .lpsc = DA830_LPSC1_EQEP,
265 .psc_ctlr = 1, 260 .gpsc = 1,
266}; 261};
267 262
268static struct clk eqep1_clk = { 263static struct clk eqep1_clk = {
269 .name = "eqep1", 264 .name = "eqep1",
270 .parent = &pll0_sysclk2, 265 .parent = &pll0_sysclk2,
271 .lpsc = DA830_LPSC1_EQEP, 266 .lpsc = DA830_LPSC1_EQEP,
272 .psc_ctlr = 1, 267 .gpsc = 1,
273}; 268};
274 269
275static struct clk lcdc_clk = { 270static struct clk lcdc_clk = {
276 .name = "lcdc", 271 .name = "lcdc",
277 .parent = &pll0_sysclk2, 272 .parent = &pll0_sysclk2,
278 .lpsc = DA8XX_LPSC1_LCDC, 273 .lpsc = DA8XX_LPSC1_LCDC,
279 .psc_ctlr = 1, 274 .gpsc = 1,
280}; 275};
281 276
282static struct clk mcasp0_clk = { 277static struct clk mcasp0_clk = {
283 .name = "mcasp0", 278 .name = "mcasp0",
284 .parent = &pll0_sysclk2, 279 .parent = &pll0_sysclk2,
285 .lpsc = DA8XX_LPSC1_McASP0, 280 .lpsc = DA8XX_LPSC1_McASP0,
286 .psc_ctlr = 1, 281 .gpsc = 1,
287}; 282};
288 283
289static struct clk mcasp1_clk = { 284static struct clk mcasp1_clk = {
290 .name = "mcasp1", 285 .name = "mcasp1",
291 .parent = &pll0_sysclk2, 286 .parent = &pll0_sysclk2,
292 .lpsc = DA830_LPSC1_McASP1, 287 .lpsc = DA830_LPSC1_McASP1,
293 .psc_ctlr = 1, 288 .gpsc = 1,
294}; 289};
295 290
296static struct clk mcasp2_clk = { 291static struct clk mcasp2_clk = {
297 .name = "mcasp2", 292 .name = "mcasp2",
298 .parent = &pll0_sysclk2, 293 .parent = &pll0_sysclk2,
299 .lpsc = DA830_LPSC1_McASP2, 294 .lpsc = DA830_LPSC1_McASP2,
300 .psc_ctlr = 1, 295 .gpsc = 1,
301}; 296};
302 297
303static struct clk usb20_clk = { 298static struct clk usb20_clk = {
304 .name = "usb20", 299 .name = "usb20",
305 .parent = &pll0_sysclk2, 300 .parent = &pll0_sysclk2,
306 .lpsc = DA8XX_LPSC1_USB20, 301 .lpsc = DA8XX_LPSC1_USB20,
307 .psc_ctlr = 1, 302 .gpsc = 1,
308}; 303};
309 304
310static struct clk aemif_clk = { 305static struct clk aemif_clk = {
@@ -332,36 +327,36 @@ static struct clk emac_clk = {
332 .name = "emac", 327 .name = "emac",
333 .parent = &pll0_sysclk4, 328 .parent = &pll0_sysclk4,
334 .lpsc = DA8XX_LPSC1_CPGMAC, 329 .lpsc = DA8XX_LPSC1_CPGMAC,
335 .psc_ctlr = 1, 330 .gpsc = 1,
336}; 331};
337 332
338static struct clk gpio_clk = { 333static struct clk gpio_clk = {
339 .name = "gpio", 334 .name = "gpio",
340 .parent = &pll0_sysclk4, 335 .parent = &pll0_sysclk4,
341 .lpsc = DA8XX_LPSC1_GPIO, 336 .lpsc = DA8XX_LPSC1_GPIO,
342 .psc_ctlr = 1, 337 .gpsc = 1,
343}; 338};
344 339
345static struct clk i2c1_clk = { 340static struct clk i2c1_clk = {
346 .name = "i2c1", 341 .name = "i2c1",
347 .parent = &pll0_sysclk4, 342 .parent = &pll0_sysclk4,
348 .lpsc = DA8XX_LPSC1_I2C, 343 .lpsc = DA8XX_LPSC1_I2C,
349 .psc_ctlr = 1, 344 .gpsc = 1,
350}; 345};
351 346
352static struct clk usb11_clk = { 347static struct clk usb11_clk = {
353 .name = "usb11", 348 .name = "usb11",
354 .parent = &pll0_sysclk4, 349 .parent = &pll0_sysclk4,
355 .lpsc = DA8XX_LPSC1_USB11, 350 .lpsc = DA8XX_LPSC1_USB11,
356 .psc_ctlr = 1, 351 .gpsc = 1,
357}; 352};
358 353
359static struct clk emif3_clk = { 354static struct clk emif3_clk = {
360 .name = "emif3", 355 .name = "emif3",
361 .parent = &pll0_sysclk5, 356 .parent = &pll0_sysclk5,
362 .lpsc = DA8XX_LPSC1_EMIF3C, 357 .lpsc = DA8XX_LPSC1_EMIF3C,
358 .gpsc = 1,
363 .flags = ALWAYS_ENABLED, 359 .flags = ALWAYS_ENABLED,
364 .psc_ctlr = 1,
365}; 360};
366 361
367static struct clk arm_clk = { 362static struct clk arm_clk = {
@@ -411,7 +406,7 @@ static struct davinci_clk da830_clks[] = {
411 CLK(NULL, "pwm2", &pwm2_clk), 406 CLK(NULL, "pwm2", &pwm2_clk),
412 CLK("eqep.0", NULL, &eqep0_clk), 407 CLK("eqep.0", NULL, &eqep0_clk),
413 CLK("eqep.1", NULL, &eqep1_clk), 408 CLK("eqep.1", NULL, &eqep1_clk),
414 CLK("da830_lcdc", NULL, &lcdc_clk), 409 CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
415 CLK("davinci-mcasp.0", NULL, &mcasp0_clk), 410 CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
416 CLK("davinci-mcasp.1", NULL, &mcasp1_clk), 411 CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
417 CLK("davinci-mcasp.2", NULL, &mcasp2_clk), 412 CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
@@ -1143,7 +1138,21 @@ static struct davinci_id da830_ids[] = {
1143 .part_no = 0xb7df, 1138 .part_no = 0xb7df,
1144 .manufacturer = 0x017, /* 0x02f >> 1 */ 1139 .manufacturer = 0x017, /* 0x02f >> 1 */
1145 .cpu_id = DAVINCI_CPU_ID_DA830, 1140 .cpu_id = DAVINCI_CPU_ID_DA830,
1146 .name = "da830/omap l137", 1141 .name = "da830/omap-l137 rev1.0",
1142 },
1143 {
1144 .variant = 0x8,
1145 .part_no = 0xb7df,
1146 .manufacturer = 0x017,
1147 .cpu_id = DAVINCI_CPU_ID_DA830,
1148 .name = "da830/omap-l137 rev1.1",
1149 },
1150 {
1151 .variant = 0x9,
1152 .part_no = 0xb7df,
1153 .manufacturer = 0x017,
1154 .cpu_id = DAVINCI_CPU_ID_DA830,
1155 .name = "da830/omap-l137 rev2.0",
1147 }, 1156 },
1148}; 1157};
1149 1158
@@ -1178,13 +1187,11 @@ static struct davinci_timer_info da830_timer_info = {
1178static struct davinci_soc_info davinci_soc_info_da830 = { 1187static struct davinci_soc_info davinci_soc_info_da830 = {
1179 .io_desc = da830_io_desc, 1188 .io_desc = da830_io_desc,
1180 .io_desc_num = ARRAY_SIZE(da830_io_desc), 1189 .io_desc_num = ARRAY_SIZE(da830_io_desc),
1181 .jtag_id_base = IO_ADDRESS(DA8XX_JTAG_ID_REG),
1182 .ids = da830_ids, 1190 .ids = da830_ids,
1183 .ids_num = ARRAY_SIZE(da830_ids), 1191 .ids_num = ARRAY_SIZE(da830_ids),
1184 .cpu_clks = da830_clks, 1192 .cpu_clks = da830_clks,
1185 .psc_bases = da830_psc_bases, 1193 .psc_bases = da830_psc_bases,
1186 .psc_bases_num = ARRAY_SIZE(da830_psc_bases), 1194 .psc_bases_num = ARRAY_SIZE(da830_psc_bases),
1187 .pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120),
1188 .pinmux_pins = da830_pins, 1195 .pinmux_pins = da830_pins,
1189 .pinmux_pins_num = ARRAY_SIZE(da830_pins), 1196 .pinmux_pins_num = ARRAY_SIZE(da830_pins),
1190 .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, 1197 .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT,
@@ -1201,5 +1208,13 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
1201 1208
1202void __init da830_init(void) 1209void __init da830_init(void)
1203{ 1210{
1211 da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K);
1212 if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module"))
1213 return;
1214
1215 davinci_soc_info_da830.jtag_id_base =
1216 DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG);
1217 davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG_VIRT(0x120);
1218
1204 davinci_common_init(&davinci_soc_info_da830); 1219 davinci_common_init(&davinci_soc_info_da830);
1205} 1220}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 192d719a47df..717806c6cef9 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -11,31 +11,41 @@
11 * is licensed "as is" without any warranty of any kind, whether express 11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied. 12 * or implied.
13 */ 13 */
14#include <linux/kernel.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/clk.h> 15#include <linux/clk.h>
17#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/cpufreq.h>
18#include <linux/regulator/consumer.h>
18 19
19#include <asm/mach/map.h> 20#include <asm/mach/map.h>
20 21
21#include <mach/clock.h>
22#include <mach/psc.h> 22#include <mach/psc.h>
23#include <mach/mux.h>
24#include <mach/irqs.h> 23#include <mach/irqs.h>
25#include <mach/cputype.h> 24#include <mach/cputype.h>
26#include <mach/common.h> 25#include <mach/common.h>
27#include <mach/time.h> 26#include <mach/time.h>
28#include <mach/da8xx.h> 27#include <mach/da8xx.h>
28#include <mach/cpufreq.h>
29 29
30#include "clock.h" 30#include "clock.h"
31#include "mux.h" 31#include "mux.h"
32 32
33/* SoC specific clock flags */
34#define DA850_CLK_ASYNC3 BIT(16)
35
33#define DA850_PLL1_BASE 0x01e1a000 36#define DA850_PLL1_BASE 0x01e1a000
34#define DA850_TIMER64P2_BASE 0x01f0c000 37#define DA850_TIMER64P2_BASE 0x01f0c000
35#define DA850_TIMER64P3_BASE 0x01f0d000 38#define DA850_TIMER64P3_BASE 0x01f0d000
36 39
37#define DA850_REF_FREQ 24000000 40#define DA850_REF_FREQ 24000000
38 41
42#define CFGCHIP3_ASYNC3_CLKSRC BIT(4)
43#define CFGCHIP0_PLL_MASTER_LOCK BIT(4)
44
45static int da850_set_armrate(struct clk *clk, unsigned long rate);
46static int da850_round_armrate(struct clk *clk, unsigned long rate);
47static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
48
39static struct pll_data pll0_data = { 49static struct pll_data pll0_data = {
40 .num = 1, 50 .num = 1,
41 .phys_base = DA8XX_PLL0_BASE, 51 .phys_base = DA8XX_PLL0_BASE,
@@ -52,6 +62,7 @@ static struct clk pll0_clk = {
52 .parent = &ref_clk, 62 .parent = &ref_clk,
53 .pll_data = &pll0_data, 63 .pll_data = &pll0_data,
54 .flags = CLK_PLL, 64 .flags = CLK_PLL,
65 .set_rate = da850_set_pll0rate,
55}; 66};
56 67
57static struct clk pll0_aux_clk = { 68static struct clk pll0_aux_clk = {
@@ -210,16 +221,16 @@ static struct clk tpcc1_clk = {
210 .name = "tpcc1", 221 .name = "tpcc1",
211 .parent = &pll0_sysclk2, 222 .parent = &pll0_sysclk2,
212 .lpsc = DA850_LPSC1_TPCC1, 223 .lpsc = DA850_LPSC1_TPCC1,
224 .gpsc = 1,
213 .flags = CLK_PSC | ALWAYS_ENABLED, 225 .flags = CLK_PSC | ALWAYS_ENABLED,
214 .psc_ctlr = 1,
215}; 226};
216 227
217static struct clk tptc2_clk = { 228static struct clk tptc2_clk = {
218 .name = "tptc2", 229 .name = "tptc2",
219 .parent = &pll0_sysclk2, 230 .parent = &pll0_sysclk2,
220 .lpsc = DA850_LPSC1_TPTC2, 231 .lpsc = DA850_LPSC1_TPTC2,
232 .gpsc = 1,
221 .flags = ALWAYS_ENABLED, 233 .flags = ALWAYS_ENABLED,
222 .psc_ctlr = 1,
223}; 234};
224 235
225static struct clk uart0_clk = { 236static struct clk uart0_clk = {
@@ -232,14 +243,16 @@ static struct clk uart1_clk = {
232 .name = "uart1", 243 .name = "uart1",
233 .parent = &pll0_sysclk2, 244 .parent = &pll0_sysclk2,
234 .lpsc = DA8XX_LPSC1_UART1, 245 .lpsc = DA8XX_LPSC1_UART1,
235 .psc_ctlr = 1, 246 .gpsc = 1,
247 .flags = DA850_CLK_ASYNC3,
236}; 248};
237 249
238static struct clk uart2_clk = { 250static struct clk uart2_clk = {
239 .name = "uart2", 251 .name = "uart2",
240 .parent = &pll0_sysclk2, 252 .parent = &pll0_sysclk2,
241 .lpsc = DA8XX_LPSC1_UART2, 253 .lpsc = DA8XX_LPSC1_UART2,
242 .psc_ctlr = 1, 254 .gpsc = 1,
255 .flags = DA850_CLK_ASYNC3,
243}; 256};
244 257
245static struct clk aintc_clk = { 258static struct clk aintc_clk = {
@@ -253,22 +266,22 @@ static struct clk gpio_clk = {
253 .name = "gpio", 266 .name = "gpio",
254 .parent = &pll0_sysclk4, 267 .parent = &pll0_sysclk4,
255 .lpsc = DA8XX_LPSC1_GPIO, 268 .lpsc = DA8XX_LPSC1_GPIO,
256 .psc_ctlr = 1, 269 .gpsc = 1,
257}; 270};
258 271
259static struct clk i2c1_clk = { 272static struct clk i2c1_clk = {
260 .name = "i2c1", 273 .name = "i2c1",
261 .parent = &pll0_sysclk4, 274 .parent = &pll0_sysclk4,
262 .lpsc = DA8XX_LPSC1_I2C, 275 .lpsc = DA8XX_LPSC1_I2C,
263 .psc_ctlr = 1, 276 .gpsc = 1,
264}; 277};
265 278
266static struct clk emif3_clk = { 279static struct clk emif3_clk = {
267 .name = "emif3", 280 .name = "emif3",
268 .parent = &pll0_sysclk5, 281 .parent = &pll0_sysclk5,
269 .lpsc = DA8XX_LPSC1_EMIF3C, 282 .lpsc = DA8XX_LPSC1_EMIF3C,
283 .gpsc = 1,
270 .flags = ALWAYS_ENABLED, 284 .flags = ALWAYS_ENABLED,
271 .psc_ctlr = 1,
272}; 285};
273 286
274static struct clk arm_clk = { 287static struct clk arm_clk = {
@@ -276,6 +289,8 @@ static struct clk arm_clk = {
276 .parent = &pll0_sysclk6, 289 .parent = &pll0_sysclk6,
277 .lpsc = DA8XX_LPSC0_ARM, 290 .lpsc = DA8XX_LPSC0_ARM,
278 .flags = ALWAYS_ENABLED, 291 .flags = ALWAYS_ENABLED,
292 .set_rate = da850_set_armrate,
293 .round_rate = da850_round_armrate,
279}; 294};
280 295
281static struct clk rmii_clk = { 296static struct clk rmii_clk = {
@@ -287,21 +302,22 @@ static struct clk emac_clk = {
287 .name = "emac", 302 .name = "emac",
288 .parent = &pll0_sysclk4, 303 .parent = &pll0_sysclk4,
289 .lpsc = DA8XX_LPSC1_CPGMAC, 304 .lpsc = DA8XX_LPSC1_CPGMAC,
290 .psc_ctlr = 1, 305 .gpsc = 1,
291}; 306};
292 307
293static struct clk mcasp_clk = { 308static struct clk mcasp_clk = {
294 .name = "mcasp", 309 .name = "mcasp",
295 .parent = &pll0_sysclk2, 310 .parent = &pll0_sysclk2,
296 .lpsc = DA8XX_LPSC1_McASP0, 311 .lpsc = DA8XX_LPSC1_McASP0,
297 .psc_ctlr = 1, 312 .gpsc = 1,
313 .flags = DA850_CLK_ASYNC3,
298}; 314};
299 315
300static struct clk lcdc_clk = { 316static struct clk lcdc_clk = {
301 .name = "lcdc", 317 .name = "lcdc",
302 .parent = &pll0_sysclk2, 318 .parent = &pll0_sysclk2,
303 .lpsc = DA8XX_LPSC1_LCDC, 319 .lpsc = DA8XX_LPSC1_LCDC,
304 .psc_ctlr = 1, 320 .gpsc = 1,
305}; 321};
306 322
307static struct clk mmcsd_clk = { 323static struct clk mmcsd_clk = {
@@ -404,6 +420,14 @@ static const struct mux_config da850_pins[] = {
404 MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false) 420 MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false)
405 MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false) 421 MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false)
406 MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false) 422 MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false)
423 MUX_CFG(DA850, RMII_TXD_0, 14, 12, 15, 8, false)
424 MUX_CFG(DA850, RMII_TXD_1, 14, 8, 15, 8, false)
425 MUX_CFG(DA850, RMII_TXEN, 14, 16, 15, 8, false)
426 MUX_CFG(DA850, RMII_CRS_DV, 15, 4, 15, 8, false)
427 MUX_CFG(DA850, RMII_RXD_0, 14, 24, 15, 8, false)
428 MUX_CFG(DA850, RMII_RXD_1, 14, 20, 15, 8, false)
429 MUX_CFG(DA850, RMII_RXER, 14, 28, 15, 8, false)
430 MUX_CFG(DA850, RMII_MHZ_50_CLK, 15, 0, 15, 0, false)
407 /* McASP function */ 431 /* McASP function */
408 MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false) 432 MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false)
409 MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false) 433 MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false)
@@ -506,8 +530,9 @@ static const struct mux_config da850_pins[] = {
506 MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false) 530 MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false)
507 MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false) 531 MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false)
508 /* GPIO function */ 532 /* GPIO function */
533 MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false)
534 MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false)
509 MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) 535 MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
510 MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false)
511 MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false) 536 MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false)
512 MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false) 537 MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false)
513#endif 538#endif
@@ -547,6 +572,14 @@ const short da850_cpgmac_pins[] __initdata = {
547 -1 572 -1
548}; 573};
549 574
575const short da850_rmii_pins[] __initdata = {
576 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
577 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
578 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
579 DA850_MDIO_D,
580 -1
581};
582
550const short da850_mcasp_pins[] __initdata = { 583const short da850_mcasp_pins[] __initdata = {
551 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, 584 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
552 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, 585 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
@@ -555,12 +588,11 @@ const short da850_mcasp_pins[] __initdata = {
555}; 588};
556 589
557const short da850_lcdcntl_pins[] __initdata = { 590const short da850_lcdcntl_pins[] __initdata = {
558 DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3, DA850_LCD_D_4, 591 DA850_LCD_D_0, DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3,
559 DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7, DA850_LCD_D_8, 592 DA850_LCD_D_4, DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7,
560 DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11, DA850_LCD_D_12, 593 DA850_LCD_D_8, DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11,
561 DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15, DA850_LCD_PCLK, 594 DA850_LCD_D_12, DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15,
562 DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS, DA850_GPIO2_15, 595 DA850_LCD_PCLK, DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS,
563 DA850_GPIO8_10,
564 -1 596 -1
565}; 597};
566 598
@@ -790,16 +822,221 @@ static struct davinci_timer_info da850_timer_info = {
790 .clocksource_id = T0_TOP, 822 .clocksource_id = T0_TOP,
791}; 823};
792 824
825static void da850_set_async3_src(int pllnum)
826{
827 struct clk *clk, *newparent = pllnum ? &pll1_sysclk2 : &pll0_sysclk2;
828 struct davinci_clk *c;
829 unsigned int v;
830 int ret;
831
832 for (c = da850_clks; c->lk.clk; c++) {
833 clk = c->lk.clk;
834 if (clk->flags & DA850_CLK_ASYNC3) {
835 ret = clk_set_parent(clk, newparent);
836 WARN(ret, "DA850: unable to re-parent clock %s",
837 clk->name);
838 }
839 }
840
841 v = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG));
842 if (pllnum)
843 v |= CFGCHIP3_ASYNC3_CLKSRC;
844 else
845 v &= ~CFGCHIP3_ASYNC3_CLKSRC;
846 __raw_writel(v, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG));
847}
848
849#ifdef CONFIG_CPU_FREQ
850/*
851 * Notes:
852 * According to the TRM, minimum PLLM results in maximum power savings.
853 * The OPP definitions below should keep the PLLM as low as possible.
854 *
855 * The output of the PLLM must be between 400 to 600 MHz.
856 * This rules out prediv of anything but divide-by-one for 24Mhz OSC input.
857 */
858struct da850_opp {
859 unsigned int freq; /* in KHz */
860 unsigned int prediv;
861 unsigned int mult;
862 unsigned int postdiv;
863 unsigned int cvdd_min; /* in uV */
864 unsigned int cvdd_max; /* in uV */
865};
866
867static const struct da850_opp da850_opp_300 = {
868 .freq = 300000,
869 .prediv = 1,
870 .mult = 25,
871 .postdiv = 2,
872 .cvdd_min = 1140000,
873 .cvdd_max = 1320000,
874};
875
876static const struct da850_opp da850_opp_200 = {
877 .freq = 200000,
878 .prediv = 1,
879 .mult = 25,
880 .postdiv = 3,
881 .cvdd_min = 1050000,
882 .cvdd_max = 1160000,
883};
884
885static const struct da850_opp da850_opp_96 = {
886 .freq = 96000,
887 .prediv = 1,
888 .mult = 20,
889 .postdiv = 5,
890 .cvdd_min = 950000,
891 .cvdd_max = 1050000,
892};
893
894#define OPP(freq) \
895 { \
896 .index = (unsigned int) &da850_opp_##freq, \
897 .frequency = freq * 1000, \
898 }
899
900static struct cpufreq_frequency_table da850_freq_table[] = {
901 OPP(300),
902 OPP(200),
903 OPP(96),
904 {
905 .index = 0,
906 .frequency = CPUFREQ_TABLE_END,
907 },
908};
909
910#ifdef CONFIG_REGULATOR
911static struct regulator *cvdd;
912
913static int da850_set_voltage(unsigned int index)
914{
915 struct da850_opp *opp;
916
917 if (!cvdd)
918 return -ENODEV;
919
920 opp = (struct da850_opp *) da850_freq_table[index].index;
921
922 return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max);
923}
924
925static int da850_regulator_init(void)
926{
927 cvdd = regulator_get(NULL, "cvdd");
928 if (WARN(IS_ERR(cvdd), "Unable to obtain voltage regulator for CVDD;"
929 " voltage scaling unsupported\n")) {
930 return PTR_ERR(cvdd);
931 }
932
933 return 0;
934}
935#endif
936
937static struct davinci_cpufreq_config cpufreq_info = {
938 .freq_table = &da850_freq_table[0],
939#ifdef CONFIG_REGULATOR
940 .init = da850_regulator_init,
941 .set_voltage = da850_set_voltage,
942#endif
943};
944
945static struct platform_device da850_cpufreq_device = {
946 .name = "cpufreq-davinci",
947 .dev = {
948 .platform_data = &cpufreq_info,
949 },
950};
951
952int __init da850_register_cpufreq(void)
953{
954 return platform_device_register(&da850_cpufreq_device);
955}
956
957static int da850_round_armrate(struct clk *clk, unsigned long rate)
958{
959 int i, ret = 0, diff;
960 unsigned int best = (unsigned int) -1;
961
962 rate /= 1000; /* convert to kHz */
963
964 for (i = 0; da850_freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
965 diff = da850_freq_table[i].frequency - rate;
966 if (diff < 0)
967 diff = -diff;
968
969 if (diff < best) {
970 best = diff;
971 ret = da850_freq_table[i].frequency;
972 }
973 }
974
975 return ret * 1000;
976}
977
978static int da850_set_armrate(struct clk *clk, unsigned long index)
979{
980 struct clk *pllclk = &pll0_clk;
981
982 return clk_set_rate(pllclk, index);
983}
984
985static int da850_set_pll0rate(struct clk *clk, unsigned long index)
986{
987 unsigned int prediv, mult, postdiv;
988 struct da850_opp *opp;
989 struct pll_data *pll = clk->pll_data;
990 unsigned int v;
991 int ret;
992
993 opp = (struct da850_opp *) da850_freq_table[index].index;
994 prediv = opp->prediv;
995 mult = opp->mult;
996 postdiv = opp->postdiv;
997
998 /* Unlock writing to PLL registers */
999 v = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP0_REG));
1000 v &= ~CFGCHIP0_PLL_MASTER_LOCK;
1001 __raw_writel(v, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP0_REG));
1002
1003 ret = davinci_set_pllrate(pll, prediv, mult, postdiv);
1004 if (WARN_ON(ret))
1005 return ret;
1006
1007 return 0;
1008}
1009#else
1010int __init da850_register_cpufreq(void)
1011{
1012 return 0;
1013}
1014
1015static int da850_set_armrate(struct clk *clk, unsigned long rate)
1016{
1017 return -EINVAL;
1018}
1019
1020static int da850_set_pll0rate(struct clk *clk, unsigned long armrate)
1021{
1022 return -EINVAL;
1023}
1024
1025static int da850_round_armrate(struct clk *clk, unsigned long rate)
1026{
1027 return clk->rate;
1028}
1029#endif
1030
1031
793static struct davinci_soc_info davinci_soc_info_da850 = { 1032static struct davinci_soc_info davinci_soc_info_da850 = {
794 .io_desc = da850_io_desc, 1033 .io_desc = da850_io_desc,
795 .io_desc_num = ARRAY_SIZE(da850_io_desc), 1034 .io_desc_num = ARRAY_SIZE(da850_io_desc),
796 .jtag_id_base = IO_ADDRESS(DA8XX_JTAG_ID_REG),
797 .ids = da850_ids, 1035 .ids = da850_ids,
798 .ids_num = ARRAY_SIZE(da850_ids), 1036 .ids_num = ARRAY_SIZE(da850_ids),
799 .cpu_clks = da850_clks, 1037 .cpu_clks = da850_clks,
800 .psc_bases = da850_psc_bases, 1038 .psc_bases = da850_psc_bases,
801 .psc_bases_num = ARRAY_SIZE(da850_psc_bases), 1039 .psc_bases_num = ARRAY_SIZE(da850_psc_bases),
802 .pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120),
803 .pinmux_pins = da850_pins, 1040 .pinmux_pins = da850_pins,
804 .pinmux_pins_num = ARRAY_SIZE(da850_pins), 1041 .pinmux_pins_num = ARRAY_SIZE(da850_pins),
805 .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, 1042 .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT,
@@ -816,5 +1053,22 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
816 1053
817void __init da850_init(void) 1054void __init da850_init(void)
818{ 1055{
1056 da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K);
1057 if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module"))
1058 return;
1059
1060 davinci_soc_info_da850.jtag_id_base =
1061 DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG);
1062 davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG_VIRT(0x120);
1063
819 davinci_common_init(&davinci_soc_info_da850); 1064 davinci_common_init(&davinci_soc_info_da850);
1065
1066 /*
1067 * Move the clock source of Async3 domain to PLL1 SYSCLK2.
1068 * This helps keeping the peripherals on this domain insulated
1069 * from CPU frequency changes caused by DVFS. The firmware sets
1070 * both PLL0 and PLL1 to the same frequency so, there should not
1071 * be any noticible change even in non-DVFS use cases.
1072 */
1073 da850_set_async3_src(1);
820} 1074}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 58ad5b66fd60..dd2d32c4ce86 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -10,8 +10,6 @@
10 * the Free Software Foundation; either version 2 of the License, or 10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version. 11 * (at your option) any later version.
12 */ 12 */
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h> 13#include <linux/init.h>
16#include <linux/platform_device.h> 14#include <linux/platform_device.h>
17#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
@@ -21,7 +19,7 @@
21#include <mach/common.h> 19#include <mach/common.h>
22#include <mach/time.h> 20#include <mach/time.h>
23#include <mach/da8xx.h> 21#include <mach/da8xx.h>
24#include <video/da8xx-fb.h> 22#include <mach/cpuidle.h>
25 23
26#include "clock.h" 24#include "clock.h"
27 25
@@ -30,6 +28,7 @@
30#define DA8XX_TPTC1_BASE 0x01c08400 28#define DA8XX_TPTC1_BASE 0x01c08400
31#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ 29#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
32#define DA8XX_I2C0_BASE 0x01c22000 30#define DA8XX_I2C0_BASE 0x01c22000
31#define DA8XX_RTC_BASE 0x01C23000
33#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 32#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000
34#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 33#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000
35#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 34#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000
@@ -43,6 +42,8 @@
43#define DA8XX_MDIO_REG_OFFSET 0x4000 42#define DA8XX_MDIO_REG_OFFSET 0x4000
44#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K 43#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
45 44
45void __iomem *da8xx_syscfg_base;
46
46static struct plat_serial8250_port da8xx_serial_pdata[] = { 47static struct plat_serial8250_port da8xx_serial_pdata[] = {
47 { 48 {
48 .mapbase = DA8XX_UART0_BASE, 49 .mapbase = DA8XX_UART0_BASE,
@@ -282,6 +283,11 @@ static struct platform_device da8xx_emac_device = {
282 .resource = da8xx_emac_resources, 283 .resource = da8xx_emac_resources,
283}; 284};
284 285
286int __init da8xx_register_emac(void)
287{
288 return platform_device_register(&da8xx_emac_device);
289}
290
285static struct resource da830_mcasp1_resources[] = { 291static struct resource da830_mcasp1_resources[] = {
286 { 292 {
287 .name = "mcasp1", 293 .name = "mcasp1",
@@ -338,12 +344,7 @@ static struct platform_device da850_mcasp_device = {
338 .resource = da850_mcasp_resources, 344 .resource = da850_mcasp_resources,
339}; 345};
340 346
341int __init da8xx_register_emac(void) 347void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
342{
343 return platform_device_register(&da8xx_emac_device);
344}
345
346void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata)
347{ 348{
348 /* DA830/OMAP-L137 has 3 instances of McASP */ 349 /* DA830/OMAP-L137 has 3 instances of McASP */
349 if (cpu_is_davinci_da830() && id == 1) { 350 if (cpu_is_davinci_da830() && id == 1) {
@@ -379,10 +380,16 @@ static struct lcd_ctrl_config lcd_cfg = {
379 .raster_order = 0, 380 .raster_order = 0,
380}; 381};
381 382
382static struct da8xx_lcdc_platform_data da850_evm_lcdc_pdata = { 383struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
383 .manu_name = "sharp", 384 .manu_name = "sharp",
384 .controller_data = &lcd_cfg, 385 .controller_data = &lcd_cfg,
385 .type = "Sharp_LK043T1DG01", 386 .type = "Sharp_LCD035Q3DG01",
387};
388
389struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = {
390 .manu_name = "sharp",
391 .controller_data = &lcd_cfg,
392 .type = "Sharp_LK043T1DG01",
386}; 393};
387 394
388static struct resource da8xx_lcdc_resources[] = { 395static struct resource da8xx_lcdc_resources[] = {
@@ -398,19 +405,17 @@ static struct resource da8xx_lcdc_resources[] = {
398 }, 405 },
399}; 406};
400 407
401static struct platform_device da850_lcdc_device = { 408static struct platform_device da8xx_lcdc_device = {
402 .name = "da8xx_lcdc", 409 .name = "da8xx_lcdc",
403 .id = 0, 410 .id = 0,
404 .num_resources = ARRAY_SIZE(da8xx_lcdc_resources), 411 .num_resources = ARRAY_SIZE(da8xx_lcdc_resources),
405 .resource = da8xx_lcdc_resources, 412 .resource = da8xx_lcdc_resources,
406 .dev = {
407 .platform_data = &da850_evm_lcdc_pdata,
408 }
409}; 413};
410 414
411int __init da8xx_register_lcdc(void) 415int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
412{ 416{
413 return platform_device_register(&da850_lcdc_device); 417 da8xx_lcdc_device.dev.platform_data = pdata;
418 return platform_device_register(&da8xx_lcdc_device);
414} 419}
415 420
416static struct resource da8xx_mmcsd0_resources[] = { 421static struct resource da8xx_mmcsd0_resources[] = {
@@ -448,3 +453,66 @@ int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
448 da8xx_mmcsd0_device.dev.platform_data = config; 453 da8xx_mmcsd0_device.dev.platform_data = config;
449 return platform_device_register(&da8xx_mmcsd0_device); 454 return platform_device_register(&da8xx_mmcsd0_device);
450} 455}
456
457static struct resource da8xx_rtc_resources[] = {
458 {
459 .start = DA8XX_RTC_BASE,
460 .end = DA8XX_RTC_BASE + SZ_4K - 1,
461 .flags = IORESOURCE_MEM,
462 },
463 { /* timer irq */
464 .start = IRQ_DA8XX_RTC,
465 .end = IRQ_DA8XX_RTC,
466 .flags = IORESOURCE_IRQ,
467 },
468 { /* alarm irq */
469 .start = IRQ_DA8XX_RTC,
470 .end = IRQ_DA8XX_RTC,
471 .flags = IORESOURCE_IRQ,
472 },
473};
474
475static struct platform_device da8xx_rtc_device = {
476 .name = "omap_rtc",
477 .id = -1,
478 .num_resources = ARRAY_SIZE(da8xx_rtc_resources),
479 .resource = da8xx_rtc_resources,
480};
481
482int da8xx_register_rtc(void)
483{
484 /* Unlock the rtc's registers */
485 __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c));
486 __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70));
487
488 return platform_device_register(&da8xx_rtc_device);
489}
490
491static struct resource da8xx_cpuidle_resources[] = {
492 {
493 .start = DA8XX_DDR2_CTL_BASE,
494 .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
495 .flags = IORESOURCE_MEM,
496 },
497};
498
499/* DA8XX devices support DDR2 power down */
500static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
501 .ddr2_pdown = 1,
502};
503
504
505static struct platform_device da8xx_cpuidle_device = {
506 .name = "cpuidle-davinci",
507 .num_resources = ARRAY_SIZE(da8xx_cpuidle_resources),
508 .resource = da8xx_cpuidle_resources,
509 .dev = {
510 .platform_data = &da8xx_cpuidle_pdata,
511 },
512};
513
514int __init da8xx_register_cpuidle(void)
515{
516 return platform_device_register(&da8xx_cpuidle_device);
517}
518
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index a55b650db71e..147949650c25 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -9,15 +9,11 @@
9 * (at your option) any later version. 9 * (at your option) any later version.
10 */ 10 */
11 11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h> 12#include <linux/init.h>
15#include <linux/platform_device.h> 13#include <linux/platform_device.h>
16#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
17#include <linux/io.h> 15#include <linux/io.h>
18 16
19#include <asm/mach/map.h>
20
21#include <mach/hardware.h> 17#include <mach/hardware.h>
22#include <mach/i2c.h> 18#include <mach/i2c.h>
23#include <mach/irqs.h> 19#include <mach/irqs.h>
@@ -177,7 +173,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
177 mmcsd1_resources[0].start = DM365_MMCSD1_BASE; 173 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
178 mmcsd1_resources[0].end = DM365_MMCSD1_BASE + 174 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
179 SZ_4K - 1; 175 SZ_4K - 1;
180 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT1; 176 mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
181 } else 177 } else
182 break; 178 break;
183 179
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 059670018aff..dedf4d4f3a27 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -8,7 +8,6 @@
8 * is licensed "as is" without any warranty of any kind, whether express 8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <linux/kernel.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/clk.h> 12#include <linux/clk.h>
14#include <linux/serial_8250.h> 13#include <linux/serial_8250.h>
@@ -21,7 +20,6 @@
21#include <asm/mach/map.h> 20#include <asm/mach/map.h>
22 21
23#include <mach/dm355.h> 22#include <mach/dm355.h>
24#include <mach/clock.h>
25#include <mach/cputype.h> 23#include <mach/cputype.h>
26#include <mach/edma.h> 24#include <mach/edma.h>
27#include <mach/psc.h> 25#include <mach/psc.h>
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index e81517434703..2ec619ec1657 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -12,7 +12,6 @@
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15#include <linux/kernel.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/clk.h> 16#include <linux/clk.h>
18#include <linux/serial_8250.h> 17#include <linux/serial_8250.h>
@@ -23,7 +22,6 @@
23#include <asm/mach/map.h> 22#include <asm/mach/map.h>
24 23
25#include <mach/dm365.h> 24#include <mach/dm365.h>
26#include <mach/clock.h>
27#include <mach/cputype.h> 25#include <mach/cputype.h>
28#include <mach/edma.h> 26#include <mach/edma.h>
29#include <mach/psc.h> 27#include <mach/psc.h>
@@ -32,6 +30,8 @@
32#include <mach/time.h> 30#include <mach/time.h>
33#include <mach/serial.h> 31#include <mach/serial.h>
34#include <mach/common.h> 32#include <mach/common.h>
33#include <mach/asp.h>
34#include <mach/keyscan.h>
35 35
36#include "clock.h" 36#include "clock.h"
37#include "mux.h" 37#include "mux.h"
@@ -369,7 +369,7 @@ static struct clk timer3_clk = {
369 369
370static struct clk usb_clk = { 370static struct clk usb_clk = {
371 .name = "usb", 371 .name = "usb",
372 .parent = &pll2_sysclk1, 372 .parent = &pll1_aux_clk,
373 .lpsc = DAVINCI_LPSC_USB, 373 .lpsc = DAVINCI_LPSC_USB,
374}; 374};
375 375
@@ -456,7 +456,7 @@ static struct davinci_clk dm365_clks[] = {
456 CLK(NULL, "usb", &usb_clk), 456 CLK(NULL, "usb", &usb_clk),
457 CLK("davinci_emac.1", NULL, &emac_clk), 457 CLK("davinci_emac.1", NULL, &emac_clk),
458 CLK("voice_codec", NULL, &voicecodec_clk), 458 CLK("voice_codec", NULL, &voicecodec_clk),
459 CLK("soc-audio.0", NULL, &asp0_clk), 459 CLK("davinci-asp.0", NULL, &asp0_clk),
460 CLK(NULL, "rto", &rto_clk), 460 CLK(NULL, "rto", &rto_clk),
461 CLK(NULL, "mjcp", &mjcp_clk), 461 CLK(NULL, "mjcp", &mjcp_clk),
462 CLK(NULL, NULL, NULL), 462 CLK(NULL, NULL, NULL),
@@ -531,7 +531,7 @@ MUX_CFG(DM365, EMAC_CRS, 3, 2, 1, 1, false)
531MUX_CFG(DM365, EMAC_MDIO, 3, 1, 1, 1, false) 531MUX_CFG(DM365, EMAC_MDIO, 3, 1, 1, 1, false)
532MUX_CFG(DM365, EMAC_MDCLK, 3, 0, 1, 1, false) 532MUX_CFG(DM365, EMAC_MDCLK, 3, 0, 1, 1, false)
533 533
534MUX_CFG(DM365, KEYPAD, 2, 0, 0x3f, 0x3f, false) 534MUX_CFG(DM365, KEYSCAN, 2, 0, 0x3f, 0x3f, false)
535 535
536MUX_CFG(DM365, PWM0, 1, 0, 3, 2, false) 536MUX_CFG(DM365, PWM0, 1, 0, 3, 2, false)
537MUX_CFG(DM365, PWM0_G23, 3, 26, 3, 3, false) 537MUX_CFG(DM365, PWM0_G23, 3, 26, 3, 3, false)
@@ -603,6 +603,9 @@ INT_CFG(DM365, INT_IMX1_ENABLE, 24, 1, 1, false)
603INT_CFG(DM365, INT_IMX1_DISABLE, 24, 1, 0, false) 603INT_CFG(DM365, INT_IMX1_DISABLE, 24, 1, 0, false)
604INT_CFG(DM365, INT_NSF_ENABLE, 25, 1, 1, false) 604INT_CFG(DM365, INT_NSF_ENABLE, 25, 1, 1, false)
605INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false) 605INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false)
606
607EVT_CFG(DM365, EVT2_ASP_TX, 0, 1, 0, false)
608EVT_CFG(DM365, EVT3_ASP_RX, 1, 1, 0, false)
606#endif 609#endif
607}; 610};
608 611
@@ -696,6 +699,7 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
696 [IRQ_I2C] = 3, 699 [IRQ_I2C] = 3,
697 [IRQ_UARTINT0] = 3, 700 [IRQ_UARTINT0] = 3,
698 [IRQ_UARTINT1] = 3, 701 [IRQ_UARTINT1] = 3,
702 [IRQ_DM365_RTCINT] = 3,
699 [IRQ_DM365_SPIINT0_0] = 3, 703 [IRQ_DM365_SPIINT0_0] = 3,
700 [IRQ_DM365_SPIINT3_0] = 3, 704 [IRQ_DM365_SPIINT3_0] = 3,
701 [IRQ_DM365_GPIO0] = 3, 705 [IRQ_DM365_GPIO0] = 3,
@@ -806,6 +810,50 @@ static struct platform_device dm365_edma_device = {
806 .resource = edma_resources, 810 .resource = edma_resources,
807}; 811};
808 812
813static struct resource dm365_asp_resources[] = {
814 {
815 .start = DAVINCI_DM365_ASP0_BASE,
816 .end = DAVINCI_DM365_ASP0_BASE + SZ_8K - 1,
817 .flags = IORESOURCE_MEM,
818 },
819 {
820 .start = DAVINCI_DMA_ASP0_TX,
821 .end = DAVINCI_DMA_ASP0_TX,
822 .flags = IORESOURCE_DMA,
823 },
824 {
825 .start = DAVINCI_DMA_ASP0_RX,
826 .end = DAVINCI_DMA_ASP0_RX,
827 .flags = IORESOURCE_DMA,
828 },
829};
830
831static struct platform_device dm365_asp_device = {
832 .name = "davinci-asp",
833 .id = 0,
834 .num_resources = ARRAY_SIZE(dm365_asp_resources),
835 .resource = dm365_asp_resources,
836};
837
838static struct resource dm365_rtc_resources[] = {
839 {
840 .start = DM365_RTC_BASE,
841 .end = DM365_RTC_BASE + SZ_1K - 1,
842 .flags = IORESOURCE_MEM,
843 },
844 {
845 .start = IRQ_DM365_RTCINT,
846 .flags = IORESOURCE_IRQ,
847 },
848};
849
850static struct platform_device dm365_rtc_device = {
851 .name = "rtc_davinci",
852 .id = 0,
853 .num_resources = ARRAY_SIZE(dm365_rtc_resources),
854 .resource = dm365_rtc_resources,
855};
856
809static struct map_desc dm365_io_desc[] = { 857static struct map_desc dm365_io_desc[] = {
810 { 858 {
811 .virtual = IO_VIRT, 859 .virtual = IO_VIRT,
@@ -822,6 +870,28 @@ static struct map_desc dm365_io_desc[] = {
822 }, 870 },
823}; 871};
824 872
873static struct resource dm365_ks_resources[] = {
874 {
875 /* registers */
876 .start = DM365_KEYSCAN_BASE,
877 .end = DM365_KEYSCAN_BASE + SZ_1K - 1,
878 .flags = IORESOURCE_MEM,
879 },
880 {
881 /* interrupt */
882 .start = IRQ_DM365_KEYINT,
883 .end = IRQ_DM365_KEYINT,
884 .flags = IORESOURCE_IRQ,
885 },
886};
887
888static struct platform_device dm365_ks_device = {
889 .name = "davinci_keyscan",
890 .id = 0,
891 .num_resources = ARRAY_SIZE(dm365_ks_resources),
892 .resource = dm365_ks_resources,
893};
894
825/* Contents of JTAG ID register used to identify exact cpu type */ 895/* Contents of JTAG ID register used to identify exact cpu type */
826static struct davinci_id dm365_ids[] = { 896static struct davinci_id dm365_ids[] = {
827 { 897 {
@@ -907,6 +977,33 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
907 .sram_len = SZ_32K, 977 .sram_len = SZ_32K,
908}; 978};
909 979
980void __init dm365_init_asp(struct snd_platform_data *pdata)
981{
982 davinci_cfg_reg(DM365_MCBSP0_BDX);
983 davinci_cfg_reg(DM365_MCBSP0_X);
984 davinci_cfg_reg(DM365_MCBSP0_BFSX);
985 davinci_cfg_reg(DM365_MCBSP0_BDR);
986 davinci_cfg_reg(DM365_MCBSP0_R);
987 davinci_cfg_reg(DM365_MCBSP0_BFSR);
988 davinci_cfg_reg(DM365_EVT2_ASP_TX);
989 davinci_cfg_reg(DM365_EVT3_ASP_RX);
990 dm365_asp_device.dev.platform_data = pdata;
991 platform_device_register(&dm365_asp_device);
992}
993
994void __init dm365_init_ks(struct davinci_ks_platform_data *pdata)
995{
996 davinci_cfg_reg(DM365_KEYSCAN);
997 dm365_ks_device.dev.platform_data = pdata;
998 platform_device_register(&dm365_ks_device);
999}
1000
1001void __init dm365_init_rtc(void)
1002{
1003 davinci_cfg_reg(DM365_INT_PRTCSS);
1004 platform_device_register(&dm365_rtc_device);
1005}
1006
910void __init dm365_init(void) 1007void __init dm365_init(void)
911{ 1008{
912 davinci_common_init(&davinci_soc_info_dm365); 1009 davinci_common_init(&davinci_soc_info_dm365);
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index d6e0fa5a8d8a..2cd008156dea 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -8,7 +8,6 @@
8 * is licensed "as is" without any warranty of any kind, whether express 8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <linux/kernel.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/clk.h> 12#include <linux/clk.h>
14#include <linux/serial_8250.h> 13#include <linux/serial_8250.h>
@@ -18,7 +17,6 @@
18#include <asm/mach/map.h> 17#include <asm/mach/map.h>
19 18
20#include <mach/dm644x.h> 19#include <mach/dm644x.h>
21#include <mach/clock.h>
22#include <mach/cputype.h> 20#include <mach/cputype.h>
23#include <mach/edma.h> 21#include <mach/edma.h>
24#include <mach/irqs.h> 22#include <mach/irqs.h>
@@ -370,6 +368,11 @@ MUX_CFG(DM644X, ATAEN_DISABLE, 0, 17, 1, 0, true)
370MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true) 368MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true)
371 369
372MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true) 370MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true)
371MUX_CFG(DM644X, AEAW0, 0, 0, 1, 0, true)
372MUX_CFG(DM644X, AEAW1, 0, 1, 1, 0, true)
373MUX_CFG(DM644X, AEAW2, 0, 2, 1, 0, true)
374MUX_CFG(DM644X, AEAW3, 0, 3, 1, 0, true)
375MUX_CFG(DM644X, AEAW4, 0, 4, 1, 0, true)
373 376
374MUX_CFG(DM644X, MSTK, 1, 9, 1, 0, false) 377MUX_CFG(DM644X, MSTK, 1, 9, 1, 0, false)
375 378
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 0976049c7b3b..829a44bcf799 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -8,7 +8,6 @@
8 * is licensed "as is" without any warranty of any kind, whether express 8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <linux/kernel.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/clk.h> 12#include <linux/clk.h>
14#include <linux/serial_8250.h> 13#include <linux/serial_8250.h>
@@ -18,7 +17,6 @@
18#include <asm/mach/map.h> 17#include <asm/mach/map.h>
19 18
20#include <mach/dm646x.h> 19#include <mach/dm646x.h>
21#include <mach/clock.h>
22#include <mach/cputype.h> 20#include <mach/cputype.h>
23#include <mach/edma.h> 21#include <mach/edma.h>
24#include <mach/irqs.h> 22#include <mach/irqs.h>
@@ -789,7 +787,14 @@ static struct davinci_id dm646x_ids[] = {
789 .part_no = 0xb770, 787 .part_no = 0xb770,
790 .manufacturer = 0x017, 788 .manufacturer = 0x017,
791 .cpu_id = DAVINCI_CPU_ID_DM6467, 789 .cpu_id = DAVINCI_CPU_ID_DM6467,
792 .name = "dm6467", 790 .name = "dm6467_rev1.x",
791 },
792 {
793 .variant = 0x1,
794 .part_no = 0xb770,
795 .manufacturer = 0x017,
796 .cpu_id = DAVINCI_CPU_ID_DM6467,
797 .name = "dm6467_rev3.x",
793 }, 798 },
794}; 799};
795 800
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index f2e57d272958..648fbb760ae1 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -18,22 +18,13 @@
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 19 */
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/init.h> 21#include <linux/init.h>
23#include <linux/module.h> 22#include <linux/module.h>
24#include <linux/interrupt.h> 23#include <linux/interrupt.h>
25#include <linux/platform_device.h> 24#include <linux/platform_device.h>
26#include <linux/spinlock.h>
27#include <linux/compiler.h>
28#include <linux/io.h> 25#include <linux/io.h>
29 26
30#include <mach/cputype.h>
31#include <mach/memory.h>
32#include <mach/hardware.h>
33#include <mach/irqs.h>
34#include <mach/edma.h> 27#include <mach/edma.h>
35#include <mach/mux.h>
36
37 28
38/* Offsets matching "struct edmacc_param" */ 29/* Offsets matching "struct edmacc_param" */
39#define PARM_OPT 0x00 30#define PARM_OPT 0x00
@@ -509,43 +500,59 @@ static irqreturn_t dma_tc1err_handler(int irq, void *data)
509 return IRQ_HANDLED; 500 return IRQ_HANDLED;
510} 501}
511 502
512static int reserve_contiguous_params(int ctlr, unsigned int id, 503static int reserve_contiguous_slots(int ctlr, unsigned int id,
513 unsigned int num_params, 504 unsigned int num_slots,
514 unsigned int start_param) 505 unsigned int start_slot)
515{ 506{
516 int i, j; 507 int i, j;
517 unsigned int count = num_params; 508 unsigned int count = num_slots;
509 int stop_slot = start_slot;
510 DECLARE_BITMAP(tmp_inuse, EDMA_MAX_PARAMENTRY);
518 511
519 for (i = start_param; i < edma_info[ctlr]->num_slots; ++i) { 512 for (i = start_slot; i < edma_info[ctlr]->num_slots; ++i) {
520 j = EDMA_CHAN_SLOT(i); 513 j = EDMA_CHAN_SLOT(i);
521 if (!test_and_set_bit(j, edma_info[ctlr]->edma_inuse)) 514 if (!test_and_set_bit(j, edma_info[ctlr]->edma_inuse)) {
515 /* Record our current beginning slot */
516 if (count == num_slots)
517 stop_slot = i;
518
522 count--; 519 count--;
520 set_bit(j, tmp_inuse);
521
523 if (count == 0) 522 if (count == 0)
524 break; 523 break;
525 else if (id == EDMA_CONT_PARAMS_FIXED_EXACT) 524 } else {
526 break; 525 clear_bit(j, tmp_inuse);
527 else 526
528 count = num_params; 527 if (id == EDMA_CONT_PARAMS_FIXED_EXACT) {
528 stop_slot = i;
529 break;
530 } else
531 count = num_slots;
532 }
529 } 533 }
530 534
531 /* 535 /*
532 * We have to clear any bits that we set 536 * We have to clear any bits that we set
533 * if we run out parameter RAMs, i.e we do find a set 537 * if we run out parameter RAM slots, i.e we do find a set
534 * of contiguous parameter RAMs but do not find the exact number 538 * of contiguous parameter RAM slots but do not find the exact number
535 * requested as we may reach the total number of parameter RAMs 539 * requested as we may reach the total number of parameter RAM slots
536 */ 540 */
537 if (count) { 541 if (i == edma_info[ctlr]->num_slots)
538 for (j = i - num_params + count + 1; j <= i ; ++j) 542 stop_slot = i;
543
544 for (j = start_slot; j < stop_slot; j++)
545 if (test_bit(j, tmp_inuse))
539 clear_bit(j, edma_info[ctlr]->edma_inuse); 546 clear_bit(j, edma_info[ctlr]->edma_inuse);
540 547
548 if (count)
541 return -EBUSY; 549 return -EBUSY;
542 }
543 550
544 for (j = i - num_params + 1; j <= i; ++j) 551 for (j = i - num_slots + 1; j <= i; ++j)
545 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(j), 552 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(j),
546 &dummy_paramset, PARM_SIZE); 553 &dummy_paramset, PARM_SIZE);
547 554
548 return EDMA_CTLR_CHAN(ctlr, i - num_params + 1); 555 return EDMA_CTLR_CHAN(ctlr, i - num_slots + 1);
549} 556}
550 557
551/*-----------------------------------------------------------------------*/ 558/*-----------------------------------------------------------------------*/
@@ -743,26 +750,27 @@ EXPORT_SYMBOL(edma_free_slot);
743/** 750/**
744 * edma_alloc_cont_slots- alloc contiguous parameter RAM slots 751 * edma_alloc_cont_slots- alloc contiguous parameter RAM slots
745 * The API will return the starting point of a set of 752 * The API will return the starting point of a set of
746 * contiguous PARAM's that have been requested 753 * contiguous parameter RAM slots that have been requested
747 * 754 *
748 * @id: can only be EDMA_CONT_PARAMS_ANY or EDMA_CONT_PARAMS_FIXED_EXACT 755 * @id: can only be EDMA_CONT_PARAMS_ANY or EDMA_CONT_PARAMS_FIXED_EXACT
749 * or EDMA_CONT_PARAMS_FIXED_NOT_EXACT 756 * or EDMA_CONT_PARAMS_FIXED_NOT_EXACT
750 * @count: number of contiguous Paramter RAM's 757 * @count: number of contiguous Paramter RAM slots
751 * @param - the start value of Parameter RAM that should be passed if id 758 * @slot - the start value of Parameter RAM slot that should be passed if id
752 * is EDMA_CONT_PARAMS_FIXED_EXACT or EDMA_CONT_PARAMS_FIXED_NOT_EXACT 759 * is EDMA_CONT_PARAMS_FIXED_EXACT or EDMA_CONT_PARAMS_FIXED_NOT_EXACT
753 * 760 *
754 * If id is EDMA_CONT_PARAMS_ANY then the API starts looking for a set of 761 * If id is EDMA_CONT_PARAMS_ANY then the API starts looking for a set of
755 * contiguous Parameter RAMs from parameter RAM 64 in the case of DaVinci SOCs 762 * contiguous Parameter RAM slots from parameter RAM 64 in the case of
756 * and 32 in the case of Primus 763 * DaVinci SOCs and 32 in the case of DA8xx SOCs.
757 * 764 *
758 * If id is EDMA_CONT_PARAMS_FIXED_EXACT then the API starts looking for a 765 * If id is EDMA_CONT_PARAMS_FIXED_EXACT then the API starts looking for a
759 * set of contiguous parameter RAMs from the "param" that is passed as an 766 * set of contiguous parameter RAM slots from the "slot" that is passed as an
760 * argument to the API. 767 * argument to the API.
761 * 768 *
762 * If id is EDMA_CONT_PARAMS_FIXED_NOT_EXACT then the API initially tries 769 * If id is EDMA_CONT_PARAMS_FIXED_NOT_EXACT then the API initially tries
763 * starts looking for a set of contiguous parameter RAMs from the "param" 770 * starts looking for a set of contiguous parameter RAMs from the "slot"
764 * that is passed as an argument to the API. On failure the API will try to 771 * that is passed as an argument to the API. On failure the API will try to
765 * find a set of contiguous Parameter RAMs in the remaining Parameter RAMs 772 * find a set of contiguous Parameter RAM slots from the remaining Parameter
773 * RAM slots
766 */ 774 */
767int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count) 775int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
768{ 776{
@@ -771,12 +779,13 @@ int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
771 * the number of channels and lesser than the total number 779 * the number of channels and lesser than the total number
772 * of slots 780 * of slots
773 */ 781 */
774 if (slot < edma_info[ctlr]->num_channels || 782 if ((id != EDMA_CONT_PARAMS_ANY) &&
775 slot >= edma_info[ctlr]->num_slots) 783 (slot < edma_info[ctlr]->num_channels ||
784 slot >= edma_info[ctlr]->num_slots))
776 return -EINVAL; 785 return -EINVAL;
777 786
778 /* 787 /*
779 * The number of parameter RAMs requested cannot be less than 1 788 * The number of parameter RAM slots requested cannot be less than 1
780 * and cannot be more than the number of slots minus the number of 789 * and cannot be more than the number of slots minus the number of
781 * channels 790 * channels
782 */ 791 */
@@ -786,11 +795,11 @@ int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
786 795
787 switch (id) { 796 switch (id) {
788 case EDMA_CONT_PARAMS_ANY: 797 case EDMA_CONT_PARAMS_ANY:
789 return reserve_contiguous_params(ctlr, id, count, 798 return reserve_contiguous_slots(ctlr, id, count,
790 edma_info[ctlr]->num_channels); 799 edma_info[ctlr]->num_channels);
791 case EDMA_CONT_PARAMS_FIXED_EXACT: 800 case EDMA_CONT_PARAMS_FIXED_EXACT:
792 case EDMA_CONT_PARAMS_FIXED_NOT_EXACT: 801 case EDMA_CONT_PARAMS_FIXED_NOT_EXACT:
793 return reserve_contiguous_params(ctlr, id, count, slot); 802 return reserve_contiguous_slots(ctlr, id, count, slot);
794 default: 803 default:
795 return -EINVAL; 804 return -EINVAL;
796 } 805 }
@@ -799,21 +808,21 @@ int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
799EXPORT_SYMBOL(edma_alloc_cont_slots); 808EXPORT_SYMBOL(edma_alloc_cont_slots);
800 809
801/** 810/**
802 * edma_free_cont_slots - deallocate DMA parameter RAMs 811 * edma_free_cont_slots - deallocate DMA parameter RAM slots
803 * @slot: first parameter RAM of a set of parameter RAMs to be freed 812 * @slot: first parameter RAM of a set of parameter RAM slots to be freed
804 * @count: the number of contiguous parameter RAMs to be freed 813 * @count: the number of contiguous parameter RAM slots to be freed
805 * 814 *
806 * This deallocates the parameter RAM slots allocated by 815 * This deallocates the parameter RAM slots allocated by
807 * edma_alloc_cont_slots. 816 * edma_alloc_cont_slots.
808 * Callers/applications need to keep track of sets of contiguous 817 * Callers/applications need to keep track of sets of contiguous
809 * parameter RAMs that have been allocated using the edma_alloc_cont_slots 818 * parameter RAM slots that have been allocated using the edma_alloc_cont_slots
810 * API. 819 * API.
811 * Callers are responsible for ensuring the slots are inactive, and will 820 * Callers are responsible for ensuring the slots are inactive, and will
812 * not be activated. 821 * not be activated.
813 */ 822 */
814int edma_free_cont_slots(unsigned slot, int count) 823int edma_free_cont_slots(unsigned slot, int count)
815{ 824{
816 unsigned ctlr; 825 unsigned ctlr, slot_to_free;
817 int i; 826 int i;
818 827
819 ctlr = EDMA_CTLR(slot); 828 ctlr = EDMA_CTLR(slot);
@@ -826,11 +835,11 @@ int edma_free_cont_slots(unsigned slot, int count)
826 835
827 for (i = slot; i < slot + count; ++i) { 836 for (i = slot; i < slot + count; ++i) {
828 ctlr = EDMA_CTLR(i); 837 ctlr = EDMA_CTLR(i);
829 slot = EDMA_CHAN_SLOT(i); 838 slot_to_free = EDMA_CHAN_SLOT(i);
830 839
831 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), 840 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot_to_free),
832 &dummy_paramset, PARM_SIZE); 841 &dummy_paramset, PARM_SIZE);
833 clear_bit(slot, edma_info[ctlr]->edma_inuse); 842 clear_bit(slot_to_free, edma_info[ctlr]->edma_inuse);
834 } 843 }
835 844
836 return 0; 845 return 0;
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index f6ea9db11f41..744755b53236 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -12,23 +12,14 @@
12 12
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/module.h>
17#include <linux/clk.h> 15#include <linux/clk.h>
18#include <linux/err.h> 16#include <linux/err.h>
19#include <linux/io.h> 17#include <linux/io.h>
20#include <linux/irq.h>
21#include <linux/bitops.h>
22 18
23#include <mach/cputype.h>
24#include <mach/irqs.h>
25#include <mach/hardware.h>
26#include <mach/common.h>
27#include <mach/gpio.h> 19#include <mach/gpio.h>
28 20
29#include <asm/mach/irq.h> 21#include <asm/mach/irq.h>
30 22
31
32static DEFINE_SPINLOCK(gpio_lock); 23static DEFINE_SPINLOCK(gpio_lock);
33 24
34struct davinci_gpio { 25struct davinci_gpio {
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index e07f70ed7c53..834725f1e81d 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -11,6 +11,9 @@
11#define DAVINCI_ASP0_BASE 0x01E02000 11#define DAVINCI_ASP0_BASE 0x01E02000
12#define DAVINCI_ASP1_BASE 0x01E04000 12#define DAVINCI_ASP1_BASE 0x01E04000
13 13
14/* Bases of dm365 register banks */
15#define DAVINCI_DM365_ASP0_BASE 0x01D02000
16
14/* Bases of dm646x register banks */ 17/* Bases of dm646x register banks */
15#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 18#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
16#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 19#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 1fd3917cae4e..6ca2c9a0a482 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -20,12 +20,6 @@ extern void davinci_irq_init(void);
20extern void __iomem *davinci_intc_base; 20extern void __iomem *davinci_intc_base;
21extern int davinci_intc_type; 21extern int davinci_intc_type;
22 22
23/* parameters describe VBUS sourcing for host mode */
24extern void setup_usb(unsigned mA, unsigned potpgt_msec);
25
26/* parameters describe VBUS sourcing for host mode */
27extern void setup_usb(unsigned mA, unsigned potpgt_msec);
28
29struct davinci_timer_instance { 23struct davinci_timer_instance {
30 void __iomem *base; 24 void __iomem *base;
31 u32 bottom_irq; 25 u32 bottom_irq;
diff --git a/arch/arm/mach-davinci/include/mach/cpufreq.h b/arch/arm/mach-davinci/include/mach/cpufreq.h
new file mode 100644
index 000000000000..3c089cfb6cd6
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/cpufreq.h
@@ -0,0 +1,26 @@
1/*
2 * TI DaVinci CPUFreq platform support.
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#ifndef _MACH_DAVINCI_CPUFREQ_H
16#define _MACH_DAVINCI_CPUFREQ_H
17
18#include <linux/cpufreq.h>
19
20struct davinci_cpufreq_config {
21 struct cpufreq_frequency_table *freq_table;
22 int (*set_voltage) (unsigned int index);
23 int (*init) (void);
24};
25
26#endif
diff --git a/arch/arm/mach-davinci/include/mach/cpuidle.h b/arch/arm/mach-davinci/include/mach/cpuidle.h
new file mode 100644
index 000000000000..cbfc6a9c81b4
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/cpuidle.h
@@ -0,0 +1,17 @@
1/*
2 * TI DaVinci cpuidle platform support
3 *
4 * 2009 (C) Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10#ifndef _MACH_DAVINCI_CPUIDLE_H
11#define _MACH_DAVINCI_CPUIDLE_H
12
13struct davinci_cpuidle_config {
14 u32 ddr2_pdown;
15};
16
17#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index d4095d0572c6..90704910d343 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -11,12 +11,17 @@
11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H 11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
12#define __ASM_ARCH_DAVINCI_DA8XX_H 12#define __ASM_ARCH_DAVINCI_DA8XX_H
13 13
14#include <video/da8xx-fb.h>
15
14#include <mach/serial.h> 16#include <mach/serial.h>
15#include <mach/edma.h> 17#include <mach/edma.h>
16#include <mach/i2c.h> 18#include <mach/i2c.h>
17#include <mach/emac.h> 19#include <mach/emac.h>
18#include <mach/asp.h> 20#include <mach/asp.h>
19#include <mach/mmc.h> 21#include <mach/mmc.h>
22#include <mach/usb.h>
23
24extern void __iomem *da8xx_syscfg_base;
20 25
21/* 26/*
22 * The cp_intc interrupt controller for the da8xx isn't in the same 27 * The cp_intc interrupt controller for the da8xx isn't in the same
@@ -29,11 +34,15 @@
29#define DA8XX_CP_INTC_SIZE SZ_8K 34#define DA8XX_CP_INTC_SIZE SZ_8K
30#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) 35#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
31 36
32#define DA8XX_BOOT_CFG_BASE (IO_PHYS + 0x14000) 37#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000)
38#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x))
39#define DA8XX_JTAG_ID_REG 0x18
40#define DA8XX_CFGCHIP0_REG 0x17c
41#define DA8XX_CFGCHIP2_REG 0x184
42#define DA8XX_CFGCHIP3_REG 0x188
33 43
34#define DA8XX_PSC0_BASE 0x01c10000 44#define DA8XX_PSC0_BASE 0x01c10000
35#define DA8XX_PLL0_BASE 0x01c11000 45#define DA8XX_PLL0_BASE 0x01c11000
36#define DA8XX_JTAG_ID_REG 0x01c14018
37#define DA8XX_TIMER64P0_BASE 0x01c20000 46#define DA8XX_TIMER64P0_BASE 0x01c20000
38#define DA8XX_TIMER64P1_BASE 0x01c21000 47#define DA8XX_TIMER64P1_BASE 0x01c21000
39#define DA8XX_GPIO_BASE 0x01e26000 48#define DA8XX_GPIO_BASE 0x01e26000
@@ -43,6 +52,7 @@
43#define DA8XX_AEMIF_CS2_BASE 0x60000000 52#define DA8XX_AEMIF_CS2_BASE 0x60000000
44#define DA8XX_AEMIF_CS3_BASE 0x62000000 53#define DA8XX_AEMIF_CS3_BASE 0x62000000
45#define DA8XX_AEMIF_CTL_BASE 0x68000000 54#define DA8XX_AEMIF_CTL_BASE 0x68000000
55#define DA8XX_DDR2_CTL_BASE 0xb0000000
46 56
47#define PINMUX0 0x00 57#define PINMUX0 0x00
48#define PINMUX1 0x04 58#define PINMUX1 0x04
@@ -71,13 +81,20 @@ void __init da850_init(void);
71int da8xx_register_edma(void); 81int da8xx_register_edma(void);
72int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); 82int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
73int da8xx_register_watchdog(void); 83int da8xx_register_watchdog(void);
84int da8xx_register_usb20(unsigned mA, unsigned potpgt);
85int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
74int da8xx_register_emac(void); 86int da8xx_register_emac(void);
75int da8xx_register_lcdc(void); 87int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
76int da8xx_register_mmcsd0(struct davinci_mmc_config *config); 88int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
77void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata); 89void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
90int da8xx_register_rtc(void);
91int da850_register_cpufreq(void);
92int da8xx_register_cpuidle(void);
78 93
79extern struct platform_device da8xx_serial_device; 94extern struct platform_device da8xx_serial_device;
80extern struct emac_platform_data da8xx_emac_pdata; 95extern struct emac_platform_data da8xx_emac_pdata;
96extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
97extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
81 98
82extern const short da830_emif25_pins[]; 99extern const short da830_emif25_pins[];
83extern const short da830_spi0_pins[]; 100extern const short da830_spi0_pins[];
@@ -110,6 +127,7 @@ extern const short da850_uart2_pins[];
110extern const short da850_i2c0_pins[]; 127extern const short da850_i2c0_pins[];
111extern const short da850_i2c1_pins[]; 128extern const short da850_i2c1_pins[];
112extern const short da850_cpgmac_pins[]; 129extern const short da850_cpgmac_pins[];
130extern const short da850_rmii_pins[];
113extern const short da850_mcasp_pins[]; 131extern const short da850_mcasp_pins[];
114extern const short da850_lcdcntl_pins[]; 132extern const short da850_lcdcntl_pins[];
115extern const short da850_mmcsd0_pins[]; 133extern const short da850_mmcsd0_pins[];
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index 09db4343bb4c..f1710a30e7ba 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -16,6 +16,8 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <mach/emac.h> 18#include <mach/emac.h>
19#include <mach/asp.h>
20#include <mach/keyscan.h>
19 21
20#define DM365_EMAC_BASE (0x01D07000) 22#define DM365_EMAC_BASE (0x01D07000)
21#define DM365_EMAC_CNTRL_OFFSET (0x0000) 23#define DM365_EMAC_CNTRL_OFFSET (0x0000)
@@ -24,6 +26,14 @@
24#define DM365_EMAC_MDIO_OFFSET (0x4000) 26#define DM365_EMAC_MDIO_OFFSET (0x4000)
25#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) 27#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000)
26 28
29/* Base of key scan register bank */
30#define DM365_KEYSCAN_BASE (0x01C69400)
31
32#define DM365_RTC_BASE (0x01C69000)
33
27void __init dm365_init(void); 34void __init dm365_init(void);
35void __init dm365_init_asp(struct snd_platform_data *pdata);
36void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
37void __init dm365_init_rtc(void);
28 38
29#endif /* __ASM_ARCH_DM365_H */ 39#endif /* __ASM_ARCH_DM365_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 0efb73852c2c..44e8f0fae9ea 100644
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -22,7 +22,6 @@
22#ifndef __ASM_ARCH_DM644X_H 22#ifndef __ASM_ARCH_DM644X_H
23#define __ASM_ARCH_DM644X_H 23#define __ASM_ARCH_DM644X_H
24 24
25#include <linux/platform_device.h>
26#include <mach/hardware.h> 25#include <mach/hardware.h>
27#include <mach/emac.h> 26#include <mach/emac.h>
28#include <mach/asp.h> 27#include <mach/asp.h>
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 3c918a772619..354af71798dc 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -217,6 +217,7 @@
217#define IRQ_DM365_SDIOINT0 23 217#define IRQ_DM365_SDIOINT0 23
218#define IRQ_DM365_MMCINT1 27 218#define IRQ_DM365_MMCINT1 27
219#define IRQ_DM365_PWMINT3 28 219#define IRQ_DM365_PWMINT3 28
220#define IRQ_DM365_RTCINT 29
220#define IRQ_DM365_SDIOINT1 31 221#define IRQ_DM365_SDIOINT1 31
221#define IRQ_DM365_SPIINT0_0 42 222#define IRQ_DM365_SPIINT0_0 42
222#define IRQ_DM365_SPIINT3_0 43 223#define IRQ_DM365_SPIINT3_0 43
diff --git a/arch/arm/mach-davinci/include/mach/keyscan.h b/arch/arm/mach-davinci/include/mach/keyscan.h
new file mode 100644
index 000000000000..b4e21a2976d1
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/keyscan.h
@@ -0,0 +1,41 @@
1/*
2 * Copyright (C) 2009 Texas Instruments, Inc
3 *
4 * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef DAVINCI_KEYSCAN_H
22#define DAVINCI_KEYSCAN_H
23
24#include <linux/io.h>
25
26enum davinci_matrix_types {
27 DAVINCI_KEYSCAN_MATRIX_4X4,
28 DAVINCI_KEYSCAN_MATRIX_5X3,
29};
30
31struct davinci_ks_platform_data {
32 unsigned short *keymap;
33 u32 keymapsize;
34 u8 rep:1;
35 u8 strobe;
36 u8 interval;
37 u8 matrix_type;
38};
39
40#endif
41
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index bb84893a4e83..b60c693985ff 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -40,6 +40,11 @@ enum davinci_dm644x_index {
40 40
41 /* AEAW functions */ 41 /* AEAW functions */
42 DM644X_AEAW, 42 DM644X_AEAW,
43 DM644X_AEAW0,
44 DM644X_AEAW1,
45 DM644X_AEAW2,
46 DM644X_AEAW3,
47 DM644X_AEAW4,
43 48
44 /* Memory Stick */ 49 /* Memory Stick */
45 DM644X_MSTK, 50 DM644X_MSTK,
@@ -237,8 +242,8 @@ enum davinci_dm365_index {
237 DM365_EMAC_MDIO, 242 DM365_EMAC_MDIO,
238 DM365_EMAC_MDCLK, 243 DM365_EMAC_MDCLK,
239 244
240 /* Keypad */ 245 /* Key Scan */
241 DM365_KEYPAD, 246 DM365_KEYSCAN,
242 247
243 /* PWM */ 248 /* PWM */
244 DM365_PWM0, 249 DM365_PWM0,
@@ -774,6 +779,14 @@ enum davinci_da850_index {
774 DA850_MII_RXD_0, 779 DA850_MII_RXD_0,
775 DA850_MDIO_CLK, 780 DA850_MDIO_CLK,
776 DA850_MDIO_D, 781 DA850_MDIO_D,
782 DA850_RMII_TXD_0,
783 DA850_RMII_TXD_1,
784 DA850_RMII_TXEN,
785 DA850_RMII_CRS_DV,
786 DA850_RMII_RXD_0,
787 DA850_RMII_RXD_1,
788 DA850_RMII_RXER,
789 DA850_RMII_MHZ_50_CLK,
777 790
778 /* McASP function */ 791 /* McASP function */
779 DA850_ACLKR, 792 DA850_ACLKR,
@@ -881,8 +894,9 @@ enum davinci_da850_index {
881 DA850_NEMA_CS_2, 894 DA850_NEMA_CS_2,
882 895
883 /* GPIO function */ 896 /* GPIO function */
897 DA850_GPIO2_6,
898 DA850_GPIO2_8,
884 DA850_GPIO2_15, 899 DA850_GPIO2_15,
885 DA850_GPIO8_10,
886 DA850_GPIO4_0, 900 DA850_GPIO4_0,
887 DA850_GPIO4_1, 901 DA850_GPIO4_1,
888}; 902};
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index 8e4f10fe1263..5a7d7581b8ce 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -11,9 +11,6 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H 12#define __ASM_ARCH_SYSTEM_H
13 13
14#include <linux/io.h>
15#include <mach/hardware.h>
16
17extern void davinci_watchdog_reset(void); 14extern void davinci_watchdog_reset(void);
18 15
19static inline void arch_idle(void) 16static inline void arch_idle(void)
diff --git a/arch/arm/mach-davinci/include/mach/usb.h b/arch/arm/mach-davinci/include/mach/usb.h
new file mode 100644
index 000000000000..e0bc4abe69c2
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/usb.h
@@ -0,0 +1,59 @@
1/*
2 * USB related definitions
3 *
4 * Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_USB_H
12#define __ASM_ARCH_USB_H
13
14/* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */
15#define CFGCHIP2_PHYCLKGD (1 << 17)
16#define CFGCHIP2_VBUSSENSE (1 << 16)
17#define CFGCHIP2_RESET (1 << 15)
18#define CFGCHIP2_OTGMODE (3 << 13)
19#define CFGCHIP2_NO_OVERRIDE (0 << 13)
20#define CFGCHIP2_FORCE_HOST (1 << 13)
21#define CFGCHIP2_FORCE_DEVICE (2 << 13)
22#define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13)
23#define CFGCHIP2_USB1PHYCLKMUX (1 << 12)
24#define CFGCHIP2_USB2PHYCLKMUX (1 << 11)
25#define CFGCHIP2_PHYPWRDN (1 << 10)
26#define CFGCHIP2_OTGPWRDN (1 << 9)
27#define CFGCHIP2_DATPOL (1 << 8)
28#define CFGCHIP2_USB1SUSPENDM (1 << 7)
29#define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */
30#define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */
31#define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */
32#define CFGCHIP2_REFFREQ (0xf << 0)
33#define CFGCHIP2_REFFREQ_12MHZ (1 << 0)
34#define CFGCHIP2_REFFREQ_24MHZ (2 << 0)
35#define CFGCHIP2_REFFREQ_48MHZ (3 << 0)
36
37struct da8xx_ohci_root_hub;
38
39typedef void (*da8xx_ocic_handler_t)(struct da8xx_ohci_root_hub *hub,
40 unsigned port);
41
42/* Passed as the platform data to the OHCI driver */
43struct da8xx_ohci_root_hub {
44 /* Switch the port power on/off */
45 int (*set_power)(unsigned port, int on);
46 /* Read the port power status */
47 int (*get_power)(unsigned port);
48 /* Read the port over-current indicator */
49 int (*get_oci)(unsigned port);
50 /* Over-current indicator change notification (pass NULL to disable) */
51 int (*ocic_notify)(da8xx_ocic_handler_t handler);
52
53 /* Time from power on to power good (in 2 ms units) */
54 u8 potpgt;
55};
56
57void davinci_setup_usb(unsigned mA, unsigned potpgt_ms);
58
59#endif /* ifndef __ASM_ARCH_USB_H */
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index 898905e48946..f757e83415f3 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -19,7 +19,6 @@
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21 21
22#include <mach/hardware.h>
23#include <mach/mux.h> 22#include <mach/mux.h>
24#include <mach/common.h> 23#include <mach/common.h>
25 24
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index a78b657e916e..04a3cb72c5ab 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -19,14 +19,11 @@
19 * 19 *
20 */ 20 */
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/init.h> 22#include <linux/init.h>
24#include <linux/io.h> 23#include <linux/io.h>
25 24
26#include <mach/cputype.h> 25#include <mach/cputype.h>
27#include <mach/hardware.h>
28#include <mach/psc.h> 26#include <mach/psc.h>
29#include <mach/mux.h>
30 27
31/* PSC register offsets */ 28/* PSC register offsets */
32#define EPCPR 0x070 29#define EPCPR 0x070
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
index c530c7333d0a..7ce5ba086575 100644
--- a/arch/arm/mach-davinci/serial.c
+++ b/arch/arm/mach-davinci/serial.c
@@ -28,14 +28,8 @@
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/io.h> 29#include <linux/io.h>
30 30
31#include <asm/irq.h>
32#include <mach/hardware.h>
33#include <mach/serial.h> 31#include <mach/serial.h>
34#include <mach/irqs.h>
35#include <mach/cputype.h> 32#include <mach/cputype.h>
36#include <mach/common.h>
37
38#include "clock.h"
39 33
40static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, 34static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
41 int offset) 35 int offset)
diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c
index 4f1fc9b318b3..db0f7787faf1 100644
--- a/arch/arm/mach-davinci/sram.c
+++ b/arch/arm/mach-davinci/sram.c
@@ -9,15 +9,12 @@
9 * (at your option) any later version. 9 * (at your option) any later version.
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/init.h> 12#include <linux/init.h>
14#include <linux/genalloc.h> 13#include <linux/genalloc.h>
15 14
16#include <mach/common.h> 15#include <mach/common.h>
17#include <mach/memory.h>
18#include <mach/sram.h> 16#include <mach/sram.h>
19 17
20
21static struct gen_pool *sram_pool; 18static struct gen_pool *sram_pool;
22 19
23void *sram_alloc(size_t len, dma_addr_t *dma) 20void *sram_alloc(size_t len, dma_addr_t *dma)
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 0d1b6d407b46..42d985beece5 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -14,20 +14,14 @@
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/clocksource.h> 15#include <linux/clocksource.h>
16#include <linux/clockchips.h> 16#include <linux/clockchips.h>
17#include <linux/spinlock.h>
18#include <linux/io.h> 17#include <linux/io.h>
19#include <linux/clk.h> 18#include <linux/clk.h>
20#include <linux/err.h> 19#include <linux/err.h>
21#include <linux/device.h>
22#include <linux/platform_device.h> 20#include <linux/platform_device.h>
23 21
24#include <mach/hardware.h> 22#include <mach/hardware.h>
25#include <asm/system.h>
26#include <asm/irq.h>
27#include <asm/mach/irq.h> 23#include <asm/mach/irq.h>
28#include <asm/mach/time.h> 24#include <asm/mach/time.h>
29#include <asm/errno.h>
30#include <mach/io.h>
31#include <mach/cputype.h> 25#include <mach/cputype.h>
32#include <mach/time.h> 26#include <mach/time.h>
33#include "clock.h" 27#include "clock.h"
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index 06f55931620c..31f0cbea0caa 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -1,21 +1,21 @@
1/* 1/*
2 * USB 2 * USB
3 */ 3 */
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/init.h> 4#include <linux/init.h>
7#include <linux/platform_device.h> 5#include <linux/platform_device.h>
8#include <linux/dma-mapping.h> 6#include <linux/dma-mapping.h>
9 7
10#include <linux/usb/musb.h> 8#include <linux/usb/musb.h>
11#include <linux/usb/otg.h>
12 9
13#include <mach/common.h> 10#include <mach/common.h>
14#include <mach/hardware.h>
15#include <mach/irqs.h> 11#include <mach/irqs.h>
16#include <mach/cputype.h> 12#include <mach/cputype.h>
13#include <mach/usb.h>
17 14
18#define DAVINCI_USB_OTG_BASE 0x01C64000 15#define DAVINCI_USB_OTG_BASE 0x01c64000
16
17#define DA8XX_USB0_BASE 0x01e00000
18#define DA8XX_USB1_BASE 0x01e25000
19 19
20#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) 20#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
21static struct musb_hdrc_eps_bits musb_eps[] = { 21static struct musb_hdrc_eps_bits musb_eps[] = {
@@ -85,10 +85,10 @@ static struct platform_device usb_dev = {
85 .num_resources = ARRAY_SIZE(usb_resources), 85 .num_resources = ARRAY_SIZE(usb_resources),
86}; 86};
87 87
88void __init setup_usb(unsigned mA, unsigned potpgt_msec) 88void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms)
89{ 89{
90 usb_data.power = mA / 2; 90 usb_data.power = mA > 510 ? 255 : mA / 2;
91 usb_data.potpgt = potpgt_msec / 2; 91 usb_data.potpgt = (potpgt_ms + 1) / 2;
92 92
93 if (cpu_is_davinci_dm646x()) { 93 if (cpu_is_davinci_dm646x()) {
94 /* Override the defaults as DM6467 uses different IRQs. */ 94 /* Override the defaults as DM6467 uses different IRQs. */
@@ -100,11 +100,77 @@ void __init setup_usb(unsigned mA, unsigned potpgt_msec)
100 platform_device_register(&usb_dev); 100 platform_device_register(&usb_dev);
101} 101}
102 102
103#ifdef CONFIG_ARCH_DAVINCI_DA8XX
104static struct resource da8xx_usb20_resources[] = {
105 {
106 .start = DA8XX_USB0_BASE,
107 .end = DA8XX_USB0_BASE + SZ_64K - 1,
108 .flags = IORESOURCE_MEM,
109 },
110 {
111 .start = IRQ_DA8XX_USB_INT,
112 .flags = IORESOURCE_IRQ,
113 },
114};
115
116int __init da8xx_register_usb20(unsigned mA, unsigned potpgt)
117{
118 usb_data.clock = "usb20";
119 usb_data.power = mA > 510 ? 255 : mA / 2;
120 usb_data.potpgt = (potpgt + 1) / 2;
121
122 usb_dev.resource = da8xx_usb20_resources;
123 usb_dev.num_resources = ARRAY_SIZE(da8xx_usb20_resources);
124
125 return platform_device_register(&usb_dev);
126}
127#endif /* CONFIG_DAVINCI_DA8XX */
128
103#else 129#else
104 130
105void __init setup_usb(unsigned mA, unsigned potpgt_msec) 131void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms)
106{ 132{
107} 133}
108 134
135#ifdef CONFIG_ARCH_DAVINCI_DA8XX
136int __init da8xx_register_usb20(unsigned mA, unsigned potpgt)
137{
138 return 0;
139}
140#endif
141
109#endif /* CONFIG_USB_MUSB_HDRC */ 142#endif /* CONFIG_USB_MUSB_HDRC */
110 143
144#ifdef CONFIG_ARCH_DAVINCI_DA8XX
145static struct resource da8xx_usb11_resources[] = {
146 [0] = {
147 .start = DA8XX_USB1_BASE,
148 .end = DA8XX_USB1_BASE + SZ_4K - 1,
149 .flags = IORESOURCE_MEM,
150 },
151 [1] = {
152 .start = IRQ_DA8XX_IRQN,
153 .end = IRQ_DA8XX_IRQN,
154 .flags = IORESOURCE_IRQ,
155 },
156};
157
158static u64 da8xx_usb11_dma_mask = DMA_BIT_MASK(32);
159
160static struct platform_device da8xx_usb11_device = {
161 .name = "ohci",
162 .id = 0,
163 .dev = {
164 .dma_mask = &da8xx_usb11_dma_mask,
165 .coherent_dma_mask = DMA_BIT_MASK(32),
166 },
167 .num_resources = ARRAY_SIZE(da8xx_usb11_resources),
168 .resource = da8xx_usb11_resources,
169};
170
171int __init da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata)
172{
173 da8xx_usb11_device.dev.platform_data = pdata;
174 return platform_device_register(&da8xx_usb11_device);
175}
176#endif /* CONFIG_DAVINCI_DA8XX */
diff --git a/arch/arm/mach-lh7a40x/include/mach/hardware.h b/arch/arm/mach-lh7a40x/include/mach/hardware.h
index 48e827d2fa56..59d2ace35217 100644
--- a/arch/arm/mach-lh7a40x/include/mach/hardware.h
+++ b/arch/arm/mach-lh7a40x/include/mach/hardware.h
@@ -31,7 +31,7 @@
31/* 31/*
32 * This __REG() version gives the same results as the one above, except 32 * This __REG() version gives the same results as the one above, except
33 * that we are fooling gcc somehow so it generates far better and smaller 33 * that we are fooling gcc somehow so it generates far better and smaller
34 * assembly code for access to contigous registers. It's a shame that gcc 34 * assembly code for access to contiguous registers. It's a shame that gcc
35 * doesn't guess this by itself. 35 * doesn't guess this by itself.
36 */ 36 */
37#include <asm/types.h> 37#include <asm/types.h>
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 5a275bab2dfe..71e1a3fad0ea 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/input.h> 15#include <linux/input.h>
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/omapfb.h>
17 18
18#include <linux/spi/spi.h> 19#include <linux/spi/spi.h>
19#include <linux/spi/ads7846.h> 20#include <linux/spi/ads7846.h>
@@ -32,7 +33,6 @@
32#include <plat/keypad.h> 33#include <plat/keypad.h>
33#include <plat/common.h> 34#include <plat/common.h>
34#include <plat/dsp_common.h> 35#include <plat/dsp_common.h>
35#include <plat/omapfb.h>
36#include <plat/hwa742.h> 36#include <plat/hwa742.h>
37#include <plat/lcd_mipid.h> 37#include <plat/lcd_mipid.h>
38#include <plat/mmc.h> 38#include <plat/mmc.h>
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 491364e44c7d..5bda9fdbee9e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -37,6 +37,7 @@
37#include <plat/common.h> 37#include <plat/common.h>
38#include <plat/dma.h> 38#include <plat/dma.h>
39#include <plat/gpmc.h> 39#include <plat/gpmc.h>
40#include <plat/display.h>
40 41
41#include <plat/control.h> 42#include <plat/control.h>
42#include <plat/gpmc-smc91x.h> 43#include <plat/gpmc-smc91x.h>
@@ -152,31 +153,152 @@ static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
152 }, 153 },
153}; 154};
154 155
155static struct platform_device sdp3430_lcd_device = { 156
156 .name = "sdp2430_lcd", 157#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
157 .id = -1, 158#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
159
160static unsigned backlight_gpio;
161static unsigned enable_gpio;
162static int lcd_enabled;
163static int dvi_enabled;
164
165static void __init sdp3430_display_init(void)
166{
167 int r;
168
169 enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
170 backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
171
172 r = gpio_request(enable_gpio, "LCD reset");
173 if (r) {
174 printk(KERN_ERR "failed to get LCD reset GPIO\n");
175 goto err0;
176 }
177
178 r = gpio_request(backlight_gpio, "LCD Backlight");
179 if (r) {
180 printk(KERN_ERR "failed to get LCD backlight GPIO\n");
181 goto err1;
182 }
183
184 gpio_direction_output(enable_gpio, 0);
185 gpio_direction_output(backlight_gpio, 0);
186
187 return;
188err1:
189 gpio_free(enable_gpio);
190err0:
191 return;
192}
193
194static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
195{
196 if (dvi_enabled) {
197 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
198 return -EINVAL;
199 }
200
201 gpio_direction_output(enable_gpio, 1);
202 gpio_direction_output(backlight_gpio, 1);
203
204 lcd_enabled = 1;
205
206 return 0;
207}
208
209static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
210{
211 lcd_enabled = 0;
212
213 gpio_direction_output(enable_gpio, 0);
214 gpio_direction_output(backlight_gpio, 0);
215}
216
217static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
218{
219 if (lcd_enabled) {
220 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
221 return -EINVAL;
222 }
223
224 dvi_enabled = 1;
225
226 return 0;
227}
228
229static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
230{
231 dvi_enabled = 0;
232}
233
234static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
235{
236 return 0;
237}
238
239static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
240{
241}
242
243
244static struct omap_dss_device sdp3430_lcd_device = {
245 .name = "lcd",
246 .driver_name = "sharp_ls_panel",
247 .type = OMAP_DISPLAY_TYPE_DPI,
248 .phy.dpi.data_lines = 16,
249 .platform_enable = sdp3430_panel_enable_lcd,
250 .platform_disable = sdp3430_panel_disable_lcd,
158}; 251};
159 252
160static struct regulator_consumer_supply sdp3430_vdac_supply = { 253static struct omap_dss_device sdp3430_dvi_device = {
161 .supply = "vdac", 254 .name = "dvi",
162 .dev = &sdp3430_lcd_device.dev, 255 .driver_name = "generic_panel",
256 .type = OMAP_DISPLAY_TYPE_DPI,
257 .phy.dpi.data_lines = 24,
258 .platform_enable = sdp3430_panel_enable_dvi,
259 .platform_disable = sdp3430_panel_disable_dvi,
163}; 260};
164 261
165static struct regulator_consumer_supply sdp3430_vdvi_supply = { 262static struct omap_dss_device sdp3430_tv_device = {
166 .supply = "vdvi", 263 .name = "tv",
167 .dev = &sdp3430_lcd_device.dev, 264 .driver_name = "venc",
265 .type = OMAP_DISPLAY_TYPE_VENC,
266 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
267 .platform_enable = sdp3430_panel_enable_tv,
268 .platform_disable = sdp3430_panel_disable_tv,
168}; 269};
169 270
170static struct platform_device *sdp3430_devices[] __initdata = { 271
272static struct omap_dss_device *sdp3430_dss_devices[] = {
171 &sdp3430_lcd_device, 273 &sdp3430_lcd_device,
274 &sdp3430_dvi_device,
275 &sdp3430_tv_device,
172}; 276};
173 277
174static struct omap_lcd_config sdp3430_lcd_config __initdata = { 278static struct omap_dss_board_info sdp3430_dss_data = {
175 .ctrl_name = "internal", 279 .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
280 .devices = sdp3430_dss_devices,
281 .default_device = &sdp3430_lcd_device,
282};
283
284static struct platform_device sdp3430_dss_device = {
285 .name = "omapdss",
286 .id = -1,
287 .dev = {
288 .platform_data = &sdp3430_dss_data,
289 },
290};
291
292static struct regulator_consumer_supply sdp3430_vdda_dac_supply = {
293 .supply = "vdda_dac",
294 .dev = &sdp3430_dss_device.dev,
295};
296
297static struct platform_device *sdp3430_devices[] __initdata = {
298 &sdp3430_dss_device,
176}; 299};
177 300
178static struct omap_board_config_kernel sdp3430_config[] __initdata = { 301static struct omap_board_config_kernel sdp3430_config[] __initdata = {
179 { OMAP_TAG_LCD, &sdp3430_lcd_config },
180}; 302};
181 303
182static void __init omap_3430sdp_init_irq(void) 304static void __init omap_3430sdp_init_irq(void)
@@ -392,22 +514,34 @@ static struct regulator_init_data sdp3430_vdac = {
392 | REGULATOR_CHANGE_STATUS, 514 | REGULATOR_CHANGE_STATUS,
393 }, 515 },
394 .num_consumer_supplies = 1, 516 .num_consumer_supplies = 1,
395 .consumer_supplies = &sdp3430_vdac_supply, 517 .consumer_supplies = &sdp3430_vdda_dac_supply,
396}; 518};
397 519
398/* VPLL2 for digital video outputs */ 520/* VPLL2 for digital video outputs */
521static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
522 {
523 .supply = "vdvi",
524 .dev = &sdp3430_lcd_device.dev,
525 },
526 {
527 .supply = "vdds_dsi",
528 .dev = &sdp3430_dss_device.dev,
529 }
530};
531
399static struct regulator_init_data sdp3430_vpll2 = { 532static struct regulator_init_data sdp3430_vpll2 = {
400 .constraints = { 533 .constraints = {
401 .name = "VDVI", 534 .name = "VDVI",
402 .min_uV = 1800000, 535 .min_uV = 1800000,
403 .max_uV = 1800000, 536 .max_uV = 1800000,
537 .apply_uV = true,
404 .valid_modes_mask = REGULATOR_MODE_NORMAL 538 .valid_modes_mask = REGULATOR_MODE_NORMAL
405 | REGULATOR_MODE_STANDBY, 539 | REGULATOR_MODE_STANDBY,
406 .valid_ops_mask = REGULATOR_CHANGE_MODE 540 .valid_ops_mask = REGULATOR_CHANGE_MODE
407 | REGULATOR_CHANGE_STATUS, 541 | REGULATOR_CHANGE_STATUS,
408 }, 542 },
409 .num_consumer_supplies = 1, 543 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
410 .consumer_supplies = &sdp3430_vdvi_supply, 544 .consumer_supplies = sdp3430_vpll2_supplies,
411}; 545};
412 546
413static struct twl4030_codec_audio_data sdp3430_audio = { 547static struct twl4030_codec_audio_data sdp3430_audio = {
@@ -521,6 +655,7 @@ static void __init omap_3430sdp_init(void)
521 omap_serial_init(); 655 omap_serial_init();
522 usb_musb_init(); 656 usb_musb_init();
523 board_smc91x_init(); 657 board_smc91x_init();
658 sdp3430_display_init();
524 enable_board_wakeup_source(); 659 enable_board_wakeup_source();
525 usb_ehci_init(&ehci_pdata); 660 usb_ehci_init(&ehci_pdata);
526} 661}
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index e70e7e000eaa..845b478ebeee 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -116,10 +116,10 @@ static struct omap_clk omap24xx_clks[] = {
116 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), 116 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
117 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), 117 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
118 /* DSS domain clocks */ 118 /* DSS domain clocks */
119 CLK("omapfb", "ick", &dss_ick, CK_243X | CK_242X), 119 CLK("omapdss", "ick", &dss_ick, CK_243X | CK_242X),
120 CLK("omapfb", "dss1_fck", &dss1_fck, CK_243X | CK_242X), 120 CLK("omapdss", "dss1_fck", &dss1_fck, CK_243X | CK_242X),
121 CLK("omapfb", "dss2_fck", &dss2_fck, CK_243X | CK_242X), 121 CLK("omapdss", "dss2_fck", &dss2_fck, CK_243X | CK_242X),
122 CLK("omapfb", "tv_fck", &dss_54m_fck, CK_243X | CK_242X), 122 CLK("omapdss", "tv_fck", &dss_54m_fck, CK_243X | CK_242X),
123 /* L3 domain clocks */ 123 /* L3 domain clocks */
124 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X), 124 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
125 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X), 125 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 9f2feaf79865..ecbb5cd8eec8 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -236,13 +236,13 @@ static struct omap_clk omap34xx_clks[] = {
236 CLK("omap_rng", "ick", &rng_ick, CK_343X), 236 CLK("omap_rng", "ick", &rng_ick, CK_343X),
237 CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), 237 CLK(NULL, "sha11_ick", &sha11_ick, CK_343X),
238 CLK(NULL, "des1_ick", &des1_ick, CK_343X), 238 CLK(NULL, "des1_ick", &des1_ick, CK_343X),
239 CLK("omapfb", "dss1_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), 239 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es1, CK_3430ES1),
240 CLK("omapfb", "dss1_fck", &dss1_alwon_fck_3430es2, CK_3430ES2), 240 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es2, CK_3430ES2),
241 CLK("omapfb", "tv_fck", &dss_tv_fck, CK_343X), 241 CLK("omapdss", "tv_fck", &dss_tv_fck, CK_343X),
242 CLK("omapfb", "video_fck", &dss_96m_fck, CK_343X), 242 CLK("omapdss", "video_fck", &dss_96m_fck, CK_343X),
243 CLK("omapfb", "dss2_fck", &dss2_alwon_fck, CK_343X), 243 CLK("omapdss", "dss2_fck", &dss2_alwon_fck, CK_343X),
244 CLK("omapfb", "ick", &dss_ick_3430es1, CK_3430ES1), 244 CLK("omapdss", "ick", &dss_ick_3430es1, CK_3430ES1),
245 CLK("omapfb", "ick", &dss_ick_3430es2, CK_3430ES2), 245 CLK("omapdss", "ick", &dss_ick_3430es2, CK_3430ES2),
246 CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), 246 CLK(NULL, "cam_mclk", &cam_mclk, CK_343X),
247 CLK(NULL, "cam_ick", &cam_ick, CK_343X), 247 CLK(NULL, "cam_ick", &cam_ick, CK_343X),
248 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), 248 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X),
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 59d28b2fd8c5..6a4d8e468703 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -22,17 +22,18 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/omapfb.h>
25 26
26#include <asm/tlb.h> 27#include <asm/tlb.h>
27 28
28#include <asm/mach/map.h> 29#include <asm/mach/map.h>
29 30
30#include <plat/mux.h> 31#include <plat/mux.h>
31#include <plat/omapfb.h>
32#include <plat/sram.h> 32#include <plat/sram.h>
33#include <plat/sdrc.h> 33#include <plat/sdrc.h>
34#include <plat/gpmc.h> 34#include <plat/gpmc.h>
35#include <plat/serial.h> 35#include <plat/serial.h>
36#include <plat/vram.h>
36 37
37#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ 38#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */
38#include "clock.h" 39#include "clock.h"
@@ -264,6 +265,7 @@ void __init omap2_map_common_io(void)
264 omap2_check_revision(); 265 omap2_check_revision();
265 omap_sram_init(); 266 omap_sram_init();
266 omapfb_reserve_sdram(); 267 omapfb_reserve_sdram();
268 omap_vram_reserve_sdram();
267} 269}
268 270
269/* 271/*
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 9a592199321c..cbfbd142e946 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -160,3 +160,19 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
160 sdrc_write_reg(l, SDRC_POWER); 160 sdrc_write_reg(l, SDRC_POWER);
161 omap2_sms_save_context(); 161 omap2_sms_save_context();
162} 162}
163
164void omap2_sms_write_rot_control(u32 val, unsigned ctx)
165{
166 sms_write_reg(val, SMS_ROT_CONTROL(ctx));
167}
168
169void omap2_sms_write_rot_size(u32 val, unsigned ctx)
170{
171 sms_write_reg(val, SMS_ROT_SIZE(ctx));
172}
173
174void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx)
175{
176 sms_write_reg(val, SMS_ROT_PHYSICAL_BA(ctx));
177}
178
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 36dc5413cc97..bdf96eb523bc 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -463,7 +463,7 @@ static void __init orion5x_setup_pci_wins(struct mbus_dram_target_info *dram)
463 writel(win_enable, PCI_BAR_ENABLE); 463 writel(win_enable, PCI_BAR_ENABLE);
464 464
465 /* 465 /*
466 * Disable automatic update of address remaping when writing to BARs. 466 * Disable automatic update of address remapping when writing to BARs.
467 */ 467 */
468 orion5x_setbits(PCI_ADDR_DECODE_CTRL, 1); 468 orion5x_setbits(PCI_ADDR_DECODE_CTRL, 1);
469} 469}
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index 8721b8010221..ae536e86d8e8 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -91,7 +91,7 @@
91/* BATTERY */ 91/* BATTERY */
92#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ 92#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
93#define PALMLD_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ 93#define PALMLD_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */
94#define PALMLD_BAT_MAX_CURRENT 0 /* unknokn */ 94#define PALMLD_BAT_MAX_CURRENT 0 /* unknown */
95#define PALMLD_BAT_MIN_CURRENT 0 /* unknown */ 95#define PALMLD_BAT_MIN_CURRENT 0 /* unknown */
96#define PALMLD_BAT_MAX_CHARGE 1 /* unknown */ 96#define PALMLD_BAT_MAX_CHARGE 1 /* unknown */
97#define PALMLD_BAT_MIN_CHARGE 1 /* unknown */ 97#define PALMLD_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index d15662aba008..6baf7469d4ec 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -66,7 +66,7 @@
66/* BATTERY */ 66/* BATTERY */
67#define PALMT5_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 67#define PALMT5_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
68#define PALMT5_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 68#define PALMT5_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
69#define PALMT5_BAT_MAX_CURRENT 0 /* unknokn */ 69#define PALMT5_BAT_MAX_CURRENT 0 /* unknown */
70#define PALMT5_BAT_MIN_CURRENT 0 /* unknown */ 70#define PALMT5_BAT_MIN_CURRENT 0 /* unknown */
71#define PALMT5_BAT_MAX_CHARGE 1 /* unknown */ 71#define PALMT5_BAT_MAX_CHARGE 1 /* unknown */
72#define PALMT5_BAT_MIN_CHARGE 1 /* unknown */ 72#define PALMT5_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
index 3dc9b074ab46..3f9dd3fd4638 100644
--- a/arch/arm/mach-pxa/include/mach/palmtc.h
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -68,7 +68,7 @@
68/* BATTERY */ 68/* BATTERY */
69#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ 69#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
70#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ 70#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */
71#define PALMTC_BAT_MAX_CURRENT 0 /* unknokn */ 71#define PALMTC_BAT_MAX_CURRENT 0 /* unknown */
72#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */ 72#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */
73#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */ 73#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */
74#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */ 74#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmte2.h b/arch/arm/mach-pxa/include/mach/palmte2.h
index 12361341f9d8..f89e989a7637 100644
--- a/arch/arm/mach-pxa/include/mach/palmte2.h
+++ b/arch/arm/mach-pxa/include/mach/palmte2.h
@@ -59,7 +59,7 @@
59/* BATTERY */ 59/* BATTERY */
60#define PALMTE2_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 60#define PALMTE2_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
61#define PALMTE2_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 61#define PALMTE2_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
62#define PALMTE2_BAT_MAX_CURRENT 0 /* unknokn */ 62#define PALMTE2_BAT_MAX_CURRENT 0 /* unknown */
63#define PALMTE2_BAT_MIN_CURRENT 0 /* unknown */ 63#define PALMTE2_BAT_MIN_CURRENT 0 /* unknown */
64#define PALMTE2_BAT_MAX_CHARGE 1 /* unknown */ 64#define PALMTE2_BAT_MAX_CHARGE 1 /* unknown */
65#define PALMTE2_BAT_MIN_CHARGE 1 /* unknown */ 65#define PALMTE2_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 1be0db6ed55e..10abc4f2e8e4 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -94,7 +94,7 @@
94/* BATTERY */ 94/* BATTERY */
95#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 95#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
96#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 96#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
97#define PALMTX_BAT_MAX_CURRENT 0 /* unknokn */ 97#define PALMTX_BAT_MAX_CURRENT 0 /* unknown */
98#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ 98#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */
99#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ 99#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */
100#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ 100#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
index 2806ef69ba5a..2bbcf70dd935 100644
--- a/arch/arm/mach-pxa/include/mach/palmz72.h
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -49,7 +49,7 @@
49/* Battery */ 49/* Battery */
50#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 50#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
51#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 51#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
52#define PALMZ72_BAT_MAX_CURRENT 0 /* unknokn */ 52#define PALMZ72_BAT_MAX_CURRENT 0 /* unknown */
53#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */ 53#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */
54#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */ 54#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */
55#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */ 55#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-s3c2400/Kconfig b/arch/arm/mach-s3c2400/Kconfig
index deab0722836e..fdd8f5e96faf 100644
--- a/arch/arm/mach-s3c2400/Kconfig
+++ b/arch/arm/mach-s3c2400/Kconfig
@@ -1,13 +1,7 @@
1# arch/arm/mach-s3c2400/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
6 4
7
8
9menu "S3C2400 Machines" 5menu "S3C2400 Machines"
10 6
11
12endmenu 7endmenu
13
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index dd1fcc7e6708..554731868b07 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2410/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c2bdc4635d12..9a8c0657ae50 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2412/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
@@ -90,6 +88,4 @@ config MACH_VSTMS
90 help 88 help
91 Say Y here if you are using an VSTMS board 89 Say Y here if you are using an VSTMS board
92 90
93
94endmenu 91endmenu
95
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index cf10e14b7b49..80879358eb2f 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2440/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
@@ -122,4 +120,3 @@ config MACH_MINI2440
122 available via various sources. It can come with a 3.5" or 7" touch LCD. 120 available via various sources. It can come with a 3.5" or 7" touch LCD.
123 121
124endmenu 122endmenu
125
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index 103e913f2258..8d3811852fc7 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2442/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
@@ -36,6 +34,4 @@ config MACH_NEO1973_GTA02
36 help 34 help
37 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone 35 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
38 36
39
40endmenu 37endmenu
41
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 212141baebec..4314c4424909 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2443/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
index 770b72067e3d..a250bf68709f 100644
--- a/arch/arm/mach-s3c6400/Kconfig
+++ b/arch/arm/mach-s3c6400/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c6400/Kconfig
2#
3# Copyright 2008 Openmoko, Inc. 1# Copyright 2008 Openmoko, Inc.
4# Simtec Electronics, Ben Dooks <ben@simtec.co.uk> 2# Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
5# 3#
diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c6400/setup-sdhci.c
index b93dafbee1f4..1039937403be 100644
--- a/arch/arm/mach-s3c6400/setup-sdhci.c
+++ b/arch/arm/mach-s3c6400/setup-sdhci.c
@@ -30,7 +30,7 @@ char *s3c6400_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc", 30 [0] = "hsmmc",
31 [1] = "hsmmc", 31 [1] = "hsmmc",
32 [2] = "mmc_bus", 32 [2] = "mmc_bus",
33 /* [3] = "48m", - note not succesfully used yet */ 33 /* [3] = "48m", - note not successfully used yet */
34}; 34};
35 35
36void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, 36void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c6410/Kconfig
index 72d4b11b2077..162f4561f80f 100644
--- a/arch/arm/mach-s3c6410/Kconfig
+++ b/arch/arm/mach-s3c6410/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c6410/Kconfig
2#
3# Copyright 2008 Openmoko, Inc. 1# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics 2# Copyright 2008 Simtec Electronics
5# 3#
diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c
index 20666f3bd478..816d2d9f9ef8 100644
--- a/arch/arm/mach-s3c6410/setup-sdhci.c
+++ b/arch/arm/mach-s3c6410/setup-sdhci.c
@@ -30,7 +30,7 @@ char *s3c6410_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc", 30 [0] = "hsmmc",
31 [1] = "hsmmc", 31 [1] = "hsmmc",
32 [2] = "mmc_bus", 32 [2] = "mmc_bus",
33 /* [3] = "48m", - note not succesfully used yet */ 33 /* [3] = "48m", - note not successfully used yet */
34}; 34};
35 35
36 36
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 0dd2b8c6eabe..27ec167d2808 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s5pc100/Kconfig
2#
3# Copyright 2009 Samsung Electronics Co. 1# Copyright 2009 Samsung Electronics Co.
4# Byungho Min <bhmin@samsung.com> 2# Byungho Min <bhmin@samsung.com>
5# 3#
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index cb4521a6f42d..ad660350c296 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -65,7 +65,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
65 65
66 66
67/** 67/**
68 * sa1100_request_dma - allocate one of the SA11x0's DMA chanels 68 * sa1100_request_dma - allocate one of the SA11x0's DMA channels
69 * @device: The SA11x0 peripheral targeted by this request 69 * @device: The SA11x0 peripheral targeted by this request
70 * @device_id: An ascii name for the claiming device 70 * @device_id: An ascii name for the claiming device
71 * @callback: Function to be called when the DMA completes 71 * @callback: Function to be called when the DMA completes
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 88333dfb19fc..56721a0cd2af 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -6,7 +6,7 @@
6 * Copyright (C) 2006-2009 ST-Ericsson AB 6 * Copyright (C) 2006-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2 7 * License terms: GNU General Public License (GPL) version 2
8 * Basic register address definitions in physical memory and 8 * Basic register address definitions in physical memory and
9 * some block defintions for core devices like the timer. 9 * some block definitions for core devices like the timer.
10 * Author: Linus Walleij <linus.walleij@stericsson.com> 10 * Author: Linus Walleij <linus.walleij@stericsson.com>
11 */ 11 */
12 12
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 2b7996401b0f..f5abc51c5a07 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -54,7 +54,8 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
54 * We enforce the MAP_FIXED case. 54 * We enforce the MAP_FIXED case.
55 */ 55 */
56 if (flags & MAP_FIXED) { 56 if (flags & MAP_FIXED) {
57 if (aliasing && flags & MAP_SHARED && addr & (SHMLBA - 1)) 57 if (aliasing && flags & MAP_SHARED &&
58 (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
58 return -EINVAL; 59 return -EINVAL;
59 return addr; 60 return addr;
60 } 61 }
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 4cbca9da1505..996cbac6932c 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o
9obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o 9obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
10obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o 10obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
11obj-$(CONFIG_MXC_PWM) += pwm.o 11obj-$(CONFIG_MXC_PWM) += pwm.o
12obj-$(CONFIG_USB_EHCI_MXC) += ehci.o
12obj-$(CONFIG_MXC_ULPI) += ulpi.o 13obj-$(CONFIG_MXC_ULPI) += ulpi.o
13obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o 14obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o
14obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o 15obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
new file mode 100644
index 000000000000..41599be882e8
--- /dev/null
+++ b/arch/arm/plat-mxc/ehci.c
@@ -0,0 +1,92 @@
1/*
2 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#include <linux/platform_device.h>
20#include <linux/io.h>
21
22#include <mach/hardware.h>
23#include <mach/mxc_ehci.h>
24
25#define USBCTRL_OTGBASE_OFFSET 0x600
26
27#define MX31_OTG_SIC_SHIFT 29
28#define MX31_OTG_SIC_MASK (0xf << MX31_OTG_SIC_SHIFT)
29#define MX31_OTG_PM_BIT (1 << 24)
30
31#define MX31_H2_SIC_SHIFT 21
32#define MX31_H2_SIC_MASK (0xf << MX31_H2_SIC_SHIFT)
33#define MX31_H2_PM_BIT (1 << 16)
34#define MX31_H2_DT_BIT (1 << 5)
35
36#define MX31_H1_SIC_SHIFT 13
37#define MX31_H1_SIC_MASK (0xf << MX31_H1_SIC_SHIFT)
38#define MX31_H1_PM_BIT (1 << 8)
39#define MX31_H1_DT_BIT (1 << 4)
40
41int mxc_set_usbcontrol(int port, unsigned int flags)
42{
43 unsigned int v;
44
45 if (cpu_is_mx31()) {
46 v = readl(IO_ADDRESS(MX31_OTG_BASE_ADDR +
47 USBCTRL_OTGBASE_OFFSET));
48
49 switch (port) {
50 case 0: /* OTG port */
51 v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
52 v |= (flags & MXC_EHCI_INTERFACE_MASK)
53 << MX31_OTG_SIC_SHIFT;
54 if (flags & MXC_EHCI_POWER_PINS_ENABLED)
55 v |= MX31_OTG_PM_BIT;
56
57 break;
58 case 1: /* H1 port */
59 v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT);
60 v |= (flags & MXC_EHCI_INTERFACE_MASK)
61 << MX31_H1_SIC_SHIFT;
62 if (flags & MXC_EHCI_POWER_PINS_ENABLED)
63 v |= MX31_H1_PM_BIT;
64
65 if (!(flags & MXC_EHCI_TTL_ENABLED))
66 v |= MX31_H1_DT_BIT;
67
68 break;
69 case 2: /* H2 port */
70 v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT);
71 v |= (flags & MXC_EHCI_INTERFACE_MASK)
72 << MX31_H2_SIC_SHIFT;
73 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
74 v |= MX31_H2_PM_BIT;
75
76 if (!(flags & MXC_EHCI_TTL_ENABLED))
77 v |= MX31_H2_DT_BIT;
78
79 break;
80 }
81
82 writel(v, IO_ADDRESS(MX31_OTG_BASE_ADDR +
83 USBCTRL_OTGBASE_OFFSET));
84 return 0;
85 }
86
87 printk(KERN_WARNING
88 "%s() unable to setup USBCONTROL for this CPU\n", __func__);
89 return -EINVAL;
90}
91EXPORT_SYMBOL(mxc_set_usbcontrol);
92
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index eaabd4e96925..e1fc6da1cd10 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -112,7 +112,7 @@ enum iomux_gp_func {
112 * setups a single pin: 112 * setups a single pin:
113 * - reserves the pin so that it is not claimed by another driver 113 * - reserves the pin so that it is not claimed by another driver
114 * - setups the iomux according to the configuration 114 * - setups the iomux according to the configuration
115 * - if the pin is configured as a GPIO, we claim it throug kernel gpiolib 115 * - if the pin is configured as a GPIO, we claim it through kernel gpiolib
116 */ 116 */
117int mxc_iomux_alloc_pin(const unsigned int pin, const char *label); 117int mxc_iomux_alloc_pin(const unsigned int pin, const char *label);
118/* 118/*
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h b/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
index 9f13061192c8..3887f3fe29d4 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
@@ -48,7 +48,7 @@
48 * setups a single pin: 48 * setups a single pin:
49 * - reserves the pin so that it is not claimed by another driver 49 * - reserves the pin so that it is not claimed by another driver
50 * - setups the iomux according to the configuration 50 * - setups the iomux according to the configuration
51 * - if the pin is configured as a GPIO, we claim it throug kernel gpiolib 51 * - if the pin is configured as a GPIO, we claim it through kernel gpiolib
52 */ 52 */
53int mxc_iomux_alloc_pin(const unsigned int pin_mode, const char *label); 53int mxc_iomux_alloc_pin(const unsigned int pin_mode, const char *label);
54/* 54/*
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
new file mode 100644
index 000000000000..8f796239393e
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
@@ -0,0 +1,37 @@
1#ifndef __INCLUDE_ASM_ARCH_MXC_EHCI_H
2#define __INCLUDE_ASM_ARCH_MXC_EHCI_H
3
4/* values for portsc field */
5#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23)
6#define MXC_EHCI_FORCE_FS (1 << 24)
7#define MXC_EHCI_UTMI_8BIT (0 << 28)
8#define MXC_EHCI_UTMI_16BIT (1 << 28)
9#define MXC_EHCI_SERIAL (1 << 29)
10#define MXC_EHCI_MODE_UTMI (0 << 30)
11#define MXC_EHCI_MODE_PHILIPS (1 << 30)
12#define MXC_EHCI_MODE_ULPI (2 << 30)
13#define MXC_EHCI_MODE_SERIAL (3 << 30)
14
15/* values for flags field */
16#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0)
17#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0)
18#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
19#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0)
20#define MXC_EHCI_INTERFACE_MASK (0xf)
21
22#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
23#define MXC_EHCI_TTL_ENABLED (1 << 6)
24
25struct mxc_usbh_platform_data {
26 int (*init)(struct platform_device *pdev);
27 int (*exit)(struct platform_device *pdev);
28
29 unsigned int portsc;
30 unsigned int flags;
31 struct otg_transceiver *otg;
32};
33
34int mxc_set_usbcontrol(int port, unsigned int flags);
35
36#endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */
37
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 5cdbd605ac05..4ff6dfe04283 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -94,7 +94,7 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
94 * register to follow the ratio of duty_ns vs. period_ns 94 * register to follow the ratio of duty_ns vs. period_ns
95 * accordingly. 95 * accordingly.
96 * 96 *
97 * This is good enought for programming the brightness of 97 * This is good enough for programming the brightness of
98 * the LCD backlight. 98 * the LCD backlight.
99 * 99 *
100 * The real implementation would divide PERCLK[0] first by 100 * The real implementation would divide PERCLK[0] first by
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index be4ce070fb4c..d17375e06a1e 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1252,7 +1252,7 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
1252 * OMAP_DMA_DYNAMIC_CHAIN 1252 * OMAP_DMA_DYNAMIC_CHAIN
1253 * @params - Channel parameters 1253 * @params - Channel parameters
1254 * 1254 *
1255 * @return - Succes : 0 1255 * @return - Success : 0
1256 * Failure: -EINVAL/-ENOMEM 1256 * Failure: -EINVAL/-ENOMEM
1257 */ 1257 */
1258int omap_request_dma_chain(int dev_id, const char *dev_name, 1258int omap_request_dma_chain(int dev_id, const char *dev_name,
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index 78a4ce538dbd..d3eea4f47533 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -28,13 +28,13 @@
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/bootmem.h> 29#include <linux/bootmem.h>
30#include <linux/io.h> 30#include <linux/io.h>
31#include <linux/omapfb.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/mach/map.h> 34#include <asm/mach/map.h>
34 35
35#include <plat/board.h> 36#include <plat/board.h>
36#include <plat/sram.h> 37#include <plat/sram.h>
37#include <plat/omapfb.h>
38 38
39#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) 39#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
40 40
@@ -55,6 +55,10 @@ static struct platform_device omap_fb_device = {
55 .num_resources = 0, 55 .num_resources = 0,
56}; 56};
57 57
58void omapfb_set_platform_data(struct omapfb_platform_data *data)
59{
60}
61
58static inline int ranges_overlap(unsigned long start1, unsigned long size1, 62static inline int ranges_overlap(unsigned long start1, unsigned long size1,
59 unsigned long start2, unsigned long size2) 63 unsigned long start2, unsigned long size2)
60{ 64{
@@ -327,7 +331,33 @@ static inline int omap_init_fb(void)
327 331
328arch_initcall(omap_init_fb); 332arch_initcall(omap_init_fb);
329 333
330#else 334#elif defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
335
336static u64 omap_fb_dma_mask = ~(u32)0;
337static struct omapfb_platform_data omapfb_config;
338
339static struct platform_device omap_fb_device = {
340 .name = "omapfb",
341 .id = -1,
342 .dev = {
343 .dma_mask = &omap_fb_dma_mask,
344 .coherent_dma_mask = ~(u32)0,
345 .platform_data = &omapfb_config,
346 },
347 .num_resources = 0,
348};
349
350void omapfb_set_platform_data(struct omapfb_platform_data *data)
351{
352 omapfb_config = *data;
353}
354
355static inline int omap_init_fb(void)
356{
357 return platform_device_register(&omap_fb_device);
358}
359
360arch_initcall(omap_init_fb);
331 361
332void omapfb_reserve_sdram(void) {} 362void omapfb_reserve_sdram(void) {}
333unsigned long omapfb_reserve_sram(unsigned long sram_pstart, 363unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
@@ -339,5 +369,20 @@ unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
339 return 0; 369 return 0;
340} 370}
341 371
372#else
373
374void omapfb_set_platform_data(struct omapfb_platform_data *data)
375{
376}
377
378void omapfb_reserve_sdram(void) {}
379unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
380 unsigned long sram_vstart,
381 unsigned long sram_size,
382 unsigned long start_avail,
383 unsigned long size_avail)
384{
385 return 0;
386}
342 387
343#endif 388#endif
diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h
new file mode 100644
index 000000000000..c66e464732df
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/display.h
@@ -0,0 +1,575 @@
1/*
2 * linux/include/asm-arm/arch-omap/display.h
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __ASM_ARCH_OMAP_DISPLAY_H
21#define __ASM_ARCH_OMAP_DISPLAY_H
22
23#include <linux/list.h>
24#include <linux/kobject.h>
25#include <linux/device.h>
26#include <asm/atomic.h>
27
28#define DISPC_IRQ_FRAMEDONE (1 << 0)
29#define DISPC_IRQ_VSYNC (1 << 1)
30#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
31#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
32#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
33#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
34#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
35#define DISPC_IRQ_GFX_END_WIN (1 << 7)
36#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
37#define DISPC_IRQ_OCP_ERR (1 << 9)
38#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
39#define DISPC_IRQ_VID1_END_WIN (1 << 11)
40#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
41#define DISPC_IRQ_VID2_END_WIN (1 << 13)
42#define DISPC_IRQ_SYNC_LOST (1 << 14)
43#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
44#define DISPC_IRQ_WAKEUP (1 << 16)
45
46struct omap_dss_device;
47struct omap_overlay_manager;
48
49enum omap_display_type {
50 OMAP_DISPLAY_TYPE_NONE = 0,
51 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
52 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
53 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
54 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
55 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
56};
57
58enum omap_plane {
59 OMAP_DSS_GFX = 0,
60 OMAP_DSS_VIDEO1 = 1,
61 OMAP_DSS_VIDEO2 = 2
62};
63
64enum omap_channel {
65 OMAP_DSS_CHANNEL_LCD = 0,
66 OMAP_DSS_CHANNEL_DIGIT = 1,
67};
68
69enum omap_color_mode {
70 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
71 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
72 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
73 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
74 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
75 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
76 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
77 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
78 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
79 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
80 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
81 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
82 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
83 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
84
85 OMAP_DSS_COLOR_GFX_OMAP2 =
86 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
87 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
88 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
89 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
90
91 OMAP_DSS_COLOR_VID_OMAP2 =
92 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
93 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
94 OMAP_DSS_COLOR_UYVY,
95
96 OMAP_DSS_COLOR_GFX_OMAP3 =
97 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
98 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
99 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
100 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
101 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
102 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
103
104 OMAP_DSS_COLOR_VID1_OMAP3 =
105 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
106 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
107 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
108
109 OMAP_DSS_COLOR_VID2_OMAP3 =
110 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
111 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
112 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
113 OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
114 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
115};
116
117enum omap_lcd_display_type {
118 OMAP_DSS_LCD_DISPLAY_STN,
119 OMAP_DSS_LCD_DISPLAY_TFT,
120};
121
122enum omap_dss_load_mode {
123 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
124 OMAP_DSS_LOAD_CLUT_ONLY = 1,
125 OMAP_DSS_LOAD_FRAME_ONLY = 2,
126 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
127};
128
129enum omap_dss_trans_key_type {
130 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
131 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
132};
133
134enum omap_rfbi_te_mode {
135 OMAP_DSS_RFBI_TE_MODE_1 = 1,
136 OMAP_DSS_RFBI_TE_MODE_2 = 2,
137};
138
139enum omap_panel_config {
140 OMAP_DSS_LCD_IVS = 1<<0,
141 OMAP_DSS_LCD_IHS = 1<<1,
142 OMAP_DSS_LCD_IPC = 1<<2,
143 OMAP_DSS_LCD_IEO = 1<<3,
144 OMAP_DSS_LCD_RF = 1<<4,
145 OMAP_DSS_LCD_ONOFF = 1<<5,
146
147 OMAP_DSS_LCD_TFT = 1<<20,
148};
149
150enum omap_dss_venc_type {
151 OMAP_DSS_VENC_TYPE_COMPOSITE,
152 OMAP_DSS_VENC_TYPE_SVIDEO,
153};
154
155enum omap_display_caps {
156 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
157 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
158};
159
160enum omap_dss_update_mode {
161 OMAP_DSS_UPDATE_DISABLED = 0,
162 OMAP_DSS_UPDATE_AUTO,
163 OMAP_DSS_UPDATE_MANUAL,
164};
165
166enum omap_dss_display_state {
167 OMAP_DSS_DISPLAY_DISABLED = 0,
168 OMAP_DSS_DISPLAY_ACTIVE,
169 OMAP_DSS_DISPLAY_SUSPENDED,
170};
171
172/* XXX perhaps this should be removed */
173enum omap_dss_overlay_managers {
174 OMAP_DSS_OVL_MGR_LCD,
175 OMAP_DSS_OVL_MGR_TV,
176};
177
178enum omap_dss_rotation_type {
179 OMAP_DSS_ROT_DMA = 0,
180 OMAP_DSS_ROT_VRFB = 1,
181};
182
183/* clockwise rotation angle */
184enum omap_dss_rotation_angle {
185 OMAP_DSS_ROT_0 = 0,
186 OMAP_DSS_ROT_90 = 1,
187 OMAP_DSS_ROT_180 = 2,
188 OMAP_DSS_ROT_270 = 3,
189};
190
191enum omap_overlay_caps {
192 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
193 OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
194};
195
196enum omap_overlay_manager_caps {
197 OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
198};
199
200/* RFBI */
201
202struct rfbi_timings {
203 int cs_on_time;
204 int cs_off_time;
205 int we_on_time;
206 int we_off_time;
207 int re_on_time;
208 int re_off_time;
209 int we_cycle_time;
210 int re_cycle_time;
211 int cs_pulse_width;
212 int access_time;
213
214 int clk_div;
215
216 u32 tim[5]; /* set by rfbi_convert_timings() */
217
218 int converted;
219};
220
221void omap_rfbi_write_command(const void *buf, u32 len);
222void omap_rfbi_read_data(void *buf, u32 len);
223void omap_rfbi_write_data(const void *buf, u32 len);
224void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
225 u16 x, u16 y,
226 u16 w, u16 h);
227int omap_rfbi_enable_te(bool enable, unsigned line);
228int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
229 unsigned hs_pulse_time, unsigned vs_pulse_time,
230 int hs_pol_inv, int vs_pol_inv, int extif_div);
231
232/* DSI */
233void dsi_bus_lock(void);
234void dsi_bus_unlock(void);
235int dsi_vc_dcs_write(int channel, u8 *data, int len);
236int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
237int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
238int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
239int dsi_vc_send_null(int channel);
240int dsi_vc_send_bta_sync(int channel);
241
242/* Board specific data */
243struct omap_dss_board_info {
244 int (*get_last_off_on_transaction_id)(struct device *dev);
245 int num_devices;
246 struct omap_dss_device **devices;
247 struct omap_dss_device *default_device;
248};
249
250struct omap_video_timings {
251 /* Unit: pixels */
252 u16 x_res;
253 /* Unit: pixels */
254 u16 y_res;
255 /* Unit: KHz */
256 u32 pixel_clock;
257 /* Unit: pixel clocks */
258 u16 hsw; /* Horizontal synchronization pulse width */
259 /* Unit: pixel clocks */
260 u16 hfp; /* Horizontal front porch */
261 /* Unit: pixel clocks */
262 u16 hbp; /* Horizontal back porch */
263 /* Unit: line clocks */
264 u16 vsw; /* Vertical synchronization pulse width */
265 /* Unit: line clocks */
266 u16 vfp; /* Vertical front porch */
267 /* Unit: line clocks */
268 u16 vbp; /* Vertical back porch */
269};
270
271#ifdef CONFIG_OMAP2_DSS_VENC
272/* Hardcoded timings for tv modes. Venc only uses these to
273 * identify the mode, and does not actually use the configs
274 * itself. However, the configs should be something that
275 * a normal monitor can also show */
276const extern struct omap_video_timings omap_dss_pal_timings;
277const extern struct omap_video_timings omap_dss_ntsc_timings;
278#endif
279
280struct omap_overlay_info {
281 bool enabled;
282
283 u32 paddr;
284 void __iomem *vaddr;
285 u16 screen_width;
286 u16 width;
287 u16 height;
288 enum omap_color_mode color_mode;
289 u8 rotation;
290 enum omap_dss_rotation_type rotation_type;
291 bool mirror;
292
293 u16 pos_x;
294 u16 pos_y;
295 u16 out_width; /* if 0, out_width == width */
296 u16 out_height; /* if 0, out_height == height */
297 u8 global_alpha;
298};
299
300struct omap_overlay {
301 struct kobject kobj;
302 struct list_head list;
303
304 /* static fields */
305 const char *name;
306 int id;
307 enum omap_color_mode supported_modes;
308 enum omap_overlay_caps caps;
309
310 /* dynamic fields */
311 struct omap_overlay_manager *manager;
312 struct omap_overlay_info info;
313
314 /* if true, info has been changed, but not applied() yet */
315 bool info_dirty;
316
317 int (*set_manager)(struct omap_overlay *ovl,
318 struct omap_overlay_manager *mgr);
319 int (*unset_manager)(struct omap_overlay *ovl);
320
321 int (*set_overlay_info)(struct omap_overlay *ovl,
322 struct omap_overlay_info *info);
323 void (*get_overlay_info)(struct omap_overlay *ovl,
324 struct omap_overlay_info *info);
325
326 int (*wait_for_go)(struct omap_overlay *ovl);
327};
328
329struct omap_overlay_manager_info {
330 u32 default_color;
331
332 enum omap_dss_trans_key_type trans_key_type;
333 u32 trans_key;
334 bool trans_enabled;
335
336 bool alpha_enabled;
337};
338
339struct omap_overlay_manager {
340 struct kobject kobj;
341 struct list_head list;
342
343 /* static fields */
344 const char *name;
345 int id;
346 enum omap_overlay_manager_caps caps;
347 int num_overlays;
348 struct omap_overlay **overlays;
349 enum omap_display_type supported_displays;
350
351 /* dynamic fields */
352 struct omap_dss_device *device;
353 struct omap_overlay_manager_info info;
354
355 bool device_changed;
356 /* if true, info has been changed but not applied() yet */
357 bool info_dirty;
358
359 int (*set_device)(struct omap_overlay_manager *mgr,
360 struct omap_dss_device *dssdev);
361 int (*unset_device)(struct omap_overlay_manager *mgr);
362
363 int (*set_manager_info)(struct omap_overlay_manager *mgr,
364 struct omap_overlay_manager_info *info);
365 void (*get_manager_info)(struct omap_overlay_manager *mgr,
366 struct omap_overlay_manager_info *info);
367
368 int (*apply)(struct omap_overlay_manager *mgr);
369 int (*wait_for_go)(struct omap_overlay_manager *mgr);
370};
371
372struct omap_dss_device {
373 struct device dev;
374
375 enum omap_display_type type;
376
377 union {
378 struct {
379 u8 data_lines;
380 } dpi;
381
382 struct {
383 u8 channel;
384 u8 data_lines;
385 } rfbi;
386
387 struct {
388 u8 datapairs;
389 } sdi;
390
391 struct {
392 u8 clk_lane;
393 u8 clk_pol;
394 u8 data1_lane;
395 u8 data1_pol;
396 u8 data2_lane;
397 u8 data2_pol;
398
399 struct {
400 u16 regn;
401 u16 regm;
402 u16 regm3;
403 u16 regm4;
404
405 u16 lp_clk_div;
406
407 u16 lck_div;
408 u16 pck_div;
409 } div;
410
411 bool ext_te;
412 u8 ext_te_gpio;
413 } dsi;
414
415 struct {
416 enum omap_dss_venc_type type;
417 bool invert_polarity;
418 } venc;
419 } phy;
420
421 struct {
422 struct omap_video_timings timings;
423
424 int acbi; /* ac-bias pin transitions per interrupt */
425 /* Unit: line clocks */
426 int acb; /* ac-bias pin frequency */
427
428 enum omap_panel_config config;
429
430 u8 recommended_bpp;
431
432 struct omap_dss_device *ctrl;
433 } panel;
434
435 struct {
436 u8 pixel_size;
437 struct rfbi_timings rfbi_timings;
438 struct omap_dss_device *panel;
439 } ctrl;
440
441 int reset_gpio;
442
443 int max_backlight_level;
444
445 const char *name;
446
447 /* used to match device to driver */
448 const char *driver_name;
449
450 void *data;
451
452 struct omap_dss_driver *driver;
453
454 /* helper variable for driver suspend/resume */
455 bool activate_after_resume;
456
457 enum omap_display_caps caps;
458
459 struct omap_overlay_manager *manager;
460
461 enum omap_dss_display_state state;
462
463 int (*enable)(struct omap_dss_device *dssdev);
464 void (*disable)(struct omap_dss_device *dssdev);
465
466 int (*suspend)(struct omap_dss_device *dssdev);
467 int (*resume)(struct omap_dss_device *dssdev);
468
469 void (*get_resolution)(struct omap_dss_device *dssdev,
470 u16 *xres, u16 *yres);
471 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
472
473 int (*check_timings)(struct omap_dss_device *dssdev,
474 struct omap_video_timings *timings);
475 void (*set_timings)(struct omap_dss_device *dssdev,
476 struct omap_video_timings *timings);
477 void (*get_timings)(struct omap_dss_device *dssdev,
478 struct omap_video_timings *timings);
479 int (*update)(struct omap_dss_device *dssdev,
480 u16 x, u16 y, u16 w, u16 h);
481 int (*sync)(struct omap_dss_device *dssdev);
482 int (*wait_vsync)(struct omap_dss_device *dssdev);
483
484 int (*set_update_mode)(struct omap_dss_device *dssdev,
485 enum omap_dss_update_mode);
486 enum omap_dss_update_mode (*get_update_mode)
487 (struct omap_dss_device *dssdev);
488
489 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
490 int (*get_te)(struct omap_dss_device *dssdev);
491
492 u8 (*get_rotate)(struct omap_dss_device *dssdev);
493 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
494
495 bool (*get_mirror)(struct omap_dss_device *dssdev);
496 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
497
498 int (*run_test)(struct omap_dss_device *dssdev, int test);
499 int (*memory_read)(struct omap_dss_device *dssdev,
500 void *buf, size_t size,
501 u16 x, u16 y, u16 w, u16 h);
502
503 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
504 u32 (*get_wss)(struct omap_dss_device *dssdev);
505
506 /* platform specific */
507 int (*platform_enable)(struct omap_dss_device *dssdev);
508 void (*platform_disable)(struct omap_dss_device *dssdev);
509 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
510 int (*get_backlight)(struct omap_dss_device *dssdev);
511};
512
513struct omap_dss_driver {
514 struct device_driver driver;
515
516 int (*probe)(struct omap_dss_device *);
517 void (*remove)(struct omap_dss_device *);
518
519 int (*enable)(struct omap_dss_device *display);
520 void (*disable)(struct omap_dss_device *display);
521 int (*suspend)(struct omap_dss_device *display);
522 int (*resume)(struct omap_dss_device *display);
523 int (*run_test)(struct omap_dss_device *display, int test);
524
525 void (*setup_update)(struct omap_dss_device *dssdev,
526 u16 x, u16 y, u16 w, u16 h);
527
528 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
529 int (*wait_for_te)(struct omap_dss_device *dssdev);
530
531 u8 (*get_rotate)(struct omap_dss_device *dssdev);
532 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
533
534 bool (*get_mirror)(struct omap_dss_device *dssdev);
535 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
536
537 int (*memory_read)(struct omap_dss_device *dssdev,
538 void *buf, size_t size,
539 u16 x, u16 y, u16 w, u16 h);
540};
541
542int omap_dss_register_driver(struct omap_dss_driver *);
543void omap_dss_unregister_driver(struct omap_dss_driver *);
544
545int omap_dss_register_device(struct omap_dss_device *);
546void omap_dss_unregister_device(struct omap_dss_device *);
547
548void omap_dss_get_device(struct omap_dss_device *dssdev);
549void omap_dss_put_device(struct omap_dss_device *dssdev);
550#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
551struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
552struct omap_dss_device *omap_dss_find_device(void *data,
553 int (*match)(struct omap_dss_device *dssdev, void *data));
554
555int omap_dss_start_device(struct omap_dss_device *dssdev);
556void omap_dss_stop_device(struct omap_dss_device *dssdev);
557
558int omap_dss_get_num_overlay_managers(void);
559struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
560
561int omap_dss_get_num_overlays(void);
562struct omap_overlay *omap_dss_get_overlay(int num);
563
564typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
565int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
566int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
567
568int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
569int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
570 unsigned long timeout);
571
572#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
573#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
574
575#endif
diff --git a/arch/arm/plat-omap/include/plat/omap16xx.h b/arch/arm/plat-omap/include/plat/omap16xx.h
index 0e69b504c25f..7560b4d583a3 100644
--- a/arch/arm/plat-omap/include/plat/omap16xx.h
+++ b/arch/arm/plat-omap/include/plat/omap16xx.h
@@ -124,7 +124,7 @@
124#define TIPB_SWITCH_BASE (0xfffbc800) 124#define TIPB_SWITCH_BASE (0xfffbc800)
125#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160) 125#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160)
126 126
127/* UART3 Registers Maping through MPU bus */ 127/* UART3 Registers Mapping through MPU bus */
128#define UART3_RHR (OMAP_UART3_BASE + 0) 128#define UART3_RHR (OMAP_UART3_BASE + 0)
129#define UART3_THR (OMAP_UART3_BASE + 0) 129#define UART3_THR (OMAP_UART3_BASE + 0)
130#define UART3_DLL (OMAP_UART3_BASE + 0) 130#define UART3_DLL (OMAP_UART3_BASE + 0)
diff --git a/arch/arm/plat-omap/include/plat/omapfb.h b/arch/arm/plat-omap/include/plat/omapfb.h
deleted file mode 100644
index bfef7ab95f17..000000000000
--- a/arch/arm/plat-omap/include/plat/omapfb.h
+++ /dev/null
@@ -1,398 +0,0 @@
1/*
2 * File: arch/arm/plat-omap/include/mach/omapfb.h
3 *
4 * Framebuffer driver for TI OMAP boards
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 * Author: Imre Deak <imre.deak@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 */
23
24#ifndef __OMAPFB_H
25#define __OMAPFB_H
26
27#include <asm/ioctl.h>
28#include <asm/types.h>
29
30/* IOCTL commands. */
31
32#define OMAP_IOW(num, dtype) _IOW('O', num, dtype)
33#define OMAP_IOR(num, dtype) _IOR('O', num, dtype)
34#define OMAP_IOWR(num, dtype) _IOWR('O', num, dtype)
35#define OMAP_IO(num) _IO('O', num)
36
37#define OMAPFB_MIRROR OMAP_IOW(31, int)
38#define OMAPFB_SYNC_GFX OMAP_IO(37)
39#define OMAPFB_VSYNC OMAP_IO(38)
40#define OMAPFB_SET_UPDATE_MODE OMAP_IOW(40, int)
41#define OMAPFB_GET_CAPS OMAP_IOR(42, struct omapfb_caps)
42#define OMAPFB_GET_UPDATE_MODE OMAP_IOW(43, int)
43#define OMAPFB_LCD_TEST OMAP_IOW(45, int)
44#define OMAPFB_CTRL_TEST OMAP_IOW(46, int)
45#define OMAPFB_UPDATE_WINDOW_OLD OMAP_IOW(47, struct omapfb_update_window_old)
46#define OMAPFB_SET_COLOR_KEY OMAP_IOW(50, struct omapfb_color_key)
47#define OMAPFB_GET_COLOR_KEY OMAP_IOW(51, struct omapfb_color_key)
48#define OMAPFB_SETUP_PLANE OMAP_IOW(52, struct omapfb_plane_info)
49#define OMAPFB_QUERY_PLANE OMAP_IOW(53, struct omapfb_plane_info)
50#define OMAPFB_UPDATE_WINDOW OMAP_IOW(54, struct omapfb_update_window)
51#define OMAPFB_SETUP_MEM OMAP_IOW(55, struct omapfb_mem_info)
52#define OMAPFB_QUERY_MEM OMAP_IOW(56, struct omapfb_mem_info)
53
54#define OMAPFB_CAPS_GENERIC_MASK 0x00000fff
55#define OMAPFB_CAPS_LCDC_MASK 0x00fff000
56#define OMAPFB_CAPS_PANEL_MASK 0xff000000
57
58#define OMAPFB_CAPS_MANUAL_UPDATE 0x00001000
59#define OMAPFB_CAPS_TEARSYNC 0x00002000
60#define OMAPFB_CAPS_PLANE_RELOCATE_MEM 0x00004000
61#define OMAPFB_CAPS_PLANE_SCALE 0x00008000
62#define OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE 0x00010000
63#define OMAPFB_CAPS_WINDOW_SCALE 0x00020000
64#define OMAPFB_CAPS_WINDOW_OVERLAY 0x00040000
65#define OMAPFB_CAPS_WINDOW_ROTATE 0x00080000
66#define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000
67
68/* Values from DSP must map to lower 16-bits */
69#define OMAPFB_FORMAT_MASK 0x00ff
70#define OMAPFB_FORMAT_FLAG_DOUBLE 0x0100
71#define OMAPFB_FORMAT_FLAG_TEARSYNC 0x0200
72#define OMAPFB_FORMAT_FLAG_FORCE_VSYNC 0x0400
73#define OMAPFB_FORMAT_FLAG_ENABLE_OVERLAY 0x0800
74#define OMAPFB_FORMAT_FLAG_DISABLE_OVERLAY 0x1000
75
76#define OMAPFB_EVENT_READY 1
77#define OMAPFB_EVENT_DISABLED 2
78
79#define OMAPFB_MEMTYPE_SDRAM 0
80#define OMAPFB_MEMTYPE_SRAM 1
81#define OMAPFB_MEMTYPE_MAX 1
82
83enum omapfb_color_format {
84 OMAPFB_COLOR_RGB565 = 0,
85 OMAPFB_COLOR_YUV422,
86 OMAPFB_COLOR_YUV420,
87 OMAPFB_COLOR_CLUT_8BPP,
88 OMAPFB_COLOR_CLUT_4BPP,
89 OMAPFB_COLOR_CLUT_2BPP,
90 OMAPFB_COLOR_CLUT_1BPP,
91 OMAPFB_COLOR_RGB444,
92 OMAPFB_COLOR_YUY422,
93};
94
95struct omapfb_update_window {
96 __u32 x, y;
97 __u32 width, height;
98 __u32 format;
99 __u32 out_x, out_y;
100 __u32 out_width, out_height;
101 __u32 reserved[8];
102};
103
104struct omapfb_update_window_old {
105 __u32 x, y;
106 __u32 width, height;
107 __u32 format;
108};
109
110enum omapfb_plane {
111 OMAPFB_PLANE_GFX = 0,
112 OMAPFB_PLANE_VID1,
113 OMAPFB_PLANE_VID2,
114};
115
116enum omapfb_channel_out {
117 OMAPFB_CHANNEL_OUT_LCD = 0,
118 OMAPFB_CHANNEL_OUT_DIGIT,
119};
120
121struct omapfb_plane_info {
122 __u32 pos_x;
123 __u32 pos_y;
124 __u8 enabled;
125 __u8 channel_out;
126 __u8 mirror;
127 __u8 reserved1;
128 __u32 out_width;
129 __u32 out_height;
130 __u32 reserved2[12];
131};
132
133struct omapfb_mem_info {
134 __u32 size;
135 __u8 type;
136 __u8 reserved[3];
137};
138
139struct omapfb_caps {
140 __u32 ctrl;
141 __u32 plane_color;
142 __u32 wnd_color;
143};
144
145enum omapfb_color_key_type {
146 OMAPFB_COLOR_KEY_DISABLED = 0,
147 OMAPFB_COLOR_KEY_GFX_DST,
148 OMAPFB_COLOR_KEY_VID_SRC,
149};
150
151struct omapfb_color_key {
152 __u8 channel_out;
153 __u32 background;
154 __u32 trans_key;
155 __u8 key_type;
156};
157
158enum omapfb_update_mode {
159 OMAPFB_UPDATE_DISABLED = 0,
160 OMAPFB_AUTO_UPDATE,
161 OMAPFB_MANUAL_UPDATE
162};
163
164#ifdef __KERNEL__
165
166#include <linux/completion.h>
167#include <linux/interrupt.h>
168#include <linux/fb.h>
169#include <linux/mutex.h>
170
171#include <plat/board.h>
172
173#define OMAP_LCDC_INV_VSYNC 0x0001
174#define OMAP_LCDC_INV_HSYNC 0x0002
175#define OMAP_LCDC_INV_PIX_CLOCK 0x0004
176#define OMAP_LCDC_INV_OUTPUT_EN 0x0008
177#define OMAP_LCDC_HSVS_RISING_EDGE 0x0010
178#define OMAP_LCDC_HSVS_OPPOSITE 0x0020
179
180#define OMAP_LCDC_SIGNAL_MASK 0x003f
181
182#define OMAP_LCDC_PANEL_TFT 0x0100
183
184#define OMAPFB_PLANE_XRES_MIN 8
185#define OMAPFB_PLANE_YRES_MIN 8
186
187#ifdef CONFIG_ARCH_OMAP1
188#define OMAPFB_PLANE_NUM 1
189#else
190#define OMAPFB_PLANE_NUM 3
191#endif
192
193struct omapfb_device;
194
195struct lcd_panel {
196 const char *name;
197 int config; /* TFT/STN, signal inversion */
198 int bpp; /* Pixel format in fb mem */
199 int data_lines; /* Lines on LCD HW interface */
200
201 int x_res, y_res;
202 int pixel_clock; /* In kHz */
203 int hsw; /* Horizontal synchronization
204 pulse width */
205 int hfp; /* Horizontal front porch */
206 int hbp; /* Horizontal back porch */
207 int vsw; /* Vertical synchronization
208 pulse width */
209 int vfp; /* Vertical front porch */
210 int vbp; /* Vertical back porch */
211 int acb; /* ac-bias pin frequency */
212 int pcd; /* pixel clock divider.
213 Obsolete use pixel_clock instead */
214
215 int (*init) (struct lcd_panel *panel,
216 struct omapfb_device *fbdev);
217 void (*cleanup) (struct lcd_panel *panel);
218 int (*enable) (struct lcd_panel *panel);
219 void (*disable) (struct lcd_panel *panel);
220 unsigned long (*get_caps) (struct lcd_panel *panel);
221 int (*set_bklight_level)(struct lcd_panel *panel,
222 unsigned int level);
223 unsigned int (*get_bklight_level)(struct lcd_panel *panel);
224 unsigned int (*get_bklight_max) (struct lcd_panel *panel);
225 int (*run_test) (struct lcd_panel *panel, int test_num);
226};
227
228struct extif_timings {
229 int cs_on_time;
230 int cs_off_time;
231 int we_on_time;
232 int we_off_time;
233 int re_on_time;
234 int re_off_time;
235 int we_cycle_time;
236 int re_cycle_time;
237 int cs_pulse_width;
238 int access_time;
239
240 int clk_div;
241
242 u32 tim[5]; /* set by extif->convert_timings */
243
244 int converted;
245};
246
247struct lcd_ctrl_extif {
248 int (*init) (struct omapfb_device *fbdev);
249 void (*cleanup) (void);
250 void (*get_clk_info) (u32 *clk_period, u32 *max_clk_div);
251 unsigned long (*get_max_tx_rate)(void);
252 int (*convert_timings) (struct extif_timings *timings);
253 void (*set_timings) (const struct extif_timings *timings);
254 void (*set_bits_per_cycle)(int bpc);
255 void (*write_command) (const void *buf, unsigned int len);
256 void (*read_data) (void *buf, unsigned int len);
257 void (*write_data) (const void *buf, unsigned int len);
258 void (*transfer_area) (int width, int height,
259 void (callback)(void * data), void *data);
260 int (*setup_tearsync) (unsigned pin_cnt,
261 unsigned hs_pulse_time, unsigned vs_pulse_time,
262 int hs_pol_inv, int vs_pol_inv, int div);
263 int (*enable_tearsync) (int enable, unsigned line);
264
265 unsigned long max_transmit_size;
266};
267
268struct omapfb_notifier_block {
269 struct notifier_block nb;
270 void *data;
271 int plane_idx;
272};
273
274typedef int (*omapfb_notifier_callback_t)(struct notifier_block *,
275 unsigned long event,
276 void *fbi);
277
278struct omapfb_mem_region {
279 u32 paddr;
280 void __iomem *vaddr;
281 unsigned long size;
282 u8 type; /* OMAPFB_PLANE_MEM_* */
283 unsigned alloc:1; /* allocated by the driver */
284 unsigned map:1; /* kernel mapped by the driver */
285};
286
287struct omapfb_mem_desc {
288 int region_cnt;
289 struct omapfb_mem_region region[OMAPFB_PLANE_NUM];
290};
291
292struct lcd_ctrl {
293 const char *name;
294 void *data;
295
296 int (*init) (struct omapfb_device *fbdev,
297 int ext_mode,
298 struct omapfb_mem_desc *req_md);
299 void (*cleanup) (void);
300 void (*bind_client) (struct omapfb_notifier_block *nb);
301 void (*get_caps) (int plane, struct omapfb_caps *caps);
302 int (*set_update_mode)(enum omapfb_update_mode mode);
303 enum omapfb_update_mode (*get_update_mode)(void);
304 int (*setup_plane) (int plane, int channel_out,
305 unsigned long offset,
306 int screen_width,
307 int pos_x, int pos_y, int width,
308 int height, int color_mode);
309 int (*set_rotate) (int angle);
310 int (*setup_mem) (int plane, size_t size,
311 int mem_type, unsigned long *paddr);
312 int (*mmap) (struct fb_info *info,
313 struct vm_area_struct *vma);
314 int (*set_scale) (int plane,
315 int orig_width, int orig_height,
316 int out_width, int out_height);
317 int (*enable_plane) (int plane, int enable);
318 int (*update_window) (struct fb_info *fbi,
319 struct omapfb_update_window *win,
320 void (*callback)(void *),
321 void *callback_data);
322 void (*sync) (void);
323 void (*suspend) (void);
324 void (*resume) (void);
325 int (*run_test) (int test_num);
326 int (*setcolreg) (u_int regno, u16 red, u16 green,
327 u16 blue, u16 transp,
328 int update_hw_mem);
329 int (*set_color_key) (struct omapfb_color_key *ck);
330 int (*get_color_key) (struct omapfb_color_key *ck);
331};
332
333enum omapfb_state {
334 OMAPFB_DISABLED = 0,
335 OMAPFB_SUSPENDED= 99,
336 OMAPFB_ACTIVE = 100
337};
338
339struct omapfb_plane_struct {
340 int idx;
341 struct omapfb_plane_info info;
342 enum omapfb_color_format color_mode;
343 struct omapfb_device *fbdev;
344};
345
346struct omapfb_device {
347 int state;
348 int ext_lcdc; /* Using external
349 LCD controller */
350 struct mutex rqueue_mutex;
351
352 int palette_size;
353 u32 pseudo_palette[17];
354
355 struct lcd_panel *panel; /* LCD panel */
356 const struct lcd_ctrl *ctrl; /* LCD controller */
357 const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */
358 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external
359 interface */
360 struct device *dev;
361 struct fb_var_screeninfo new_var; /* for mode changes */
362
363 struct omapfb_mem_desc mem_desc;
364 struct fb_info *fb_info[OMAPFB_PLANE_NUM];
365};
366
367struct omapfb_platform_data {
368 struct omap_lcd_config lcd;
369 struct omapfb_mem_desc mem_desc;
370 void *ctrl_platform_data;
371};
372
373#ifdef CONFIG_ARCH_OMAP1
374extern struct lcd_ctrl omap1_lcd_ctrl;
375#else
376extern struct lcd_ctrl omap2_disp_ctrl;
377#endif
378
379extern void omapfb_reserve_sdram(void);
380extern void omapfb_register_panel(struct lcd_panel *panel);
381extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval);
382extern void omapfb_notify_clients(struct omapfb_device *fbdev,
383 unsigned long event);
384extern int omapfb_register_client(struct omapfb_notifier_block *nb,
385 omapfb_notifier_callback_t callback,
386 void *callback_data);
387extern int omapfb_unregister_client(struct omapfb_notifier_block *nb);
388extern int omapfb_update_window_async(struct fb_info *fbi,
389 struct omapfb_update_window *win,
390 void (*callback)(void *),
391 void *callback_data);
392
393/* in arch/arm/plat-omap/fb.c */
394extern void omapfb_set_ctrl_platform_data(void *pdata);
395
396#endif /* __KERNEL__ */
397
398#endif /* __OMAPFB_H */
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index f704030d2a70..7b76f50564ba 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -94,7 +94,10 @@
94 94
95/* SMS register offsets - read/write with sms_{read,write}_reg() */ 95/* SMS register offsets - read/write with sms_{read,write}_reg() */
96 96
97#define SMS_SYSCONFIG 0x010 97#define SMS_SYSCONFIG 0x010
98#define SMS_ROT_CONTROL(context) (0x180 + 0x10 * context)
99#define SMS_ROT_SIZE(context) (0x184 + 0x10 * context)
100#define SMS_ROT_PHYSICAL_BA(context) (0x188 + 0x10 * context)
98/* REVISIT: fill in other SMS registers here */ 101/* REVISIT: fill in other SMS registers here */
99 102
100 103
@@ -129,6 +132,10 @@ int omap2_sdrc_get_params(unsigned long r,
129void omap2_sms_save_context(void); 132void omap2_sms_save_context(void);
130void omap2_sms_restore_context(void); 133void omap2_sms_restore_context(void);
131 134
135void omap2_sms_write_rot_control(u32 val, unsigned ctx);
136void omap2_sms_write_rot_size(u32 val, unsigned ctx);
137void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx);
138
132#ifdef CONFIG_ARCH_OMAP2 139#ifdef CONFIG_ARCH_OMAP2
133 140
134struct memory_timings { 141struct memory_timings {
diff --git a/arch/arm/plat-omap/include/plat/vram.h b/arch/arm/plat-omap/include/plat/vram.h
new file mode 100644
index 000000000000..edd4987758a6
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/vram.h
@@ -0,0 +1,62 @@
1/*
2 * VRAM manager for OMAP
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#ifndef __OMAP_VRAM_H__
22#define __OMAP_VRAM_H__
23
24#include <linux/types.h>
25
26#define OMAP_VRAM_MEMTYPE_SDRAM 0
27#define OMAP_VRAM_MEMTYPE_SRAM 1
28#define OMAP_VRAM_MEMTYPE_MAX 1
29
30extern int omap_vram_add_region(unsigned long paddr, size_t size);
31extern int omap_vram_free(unsigned long paddr, size_t size);
32extern int omap_vram_alloc(int mtype, size_t size, unsigned long *paddr);
33extern int omap_vram_reserve(unsigned long paddr, size_t size);
34extern void omap_vram_get_info(unsigned long *vram, unsigned long *free_vram,
35 unsigned long *largest_free_block);
36
37#ifdef CONFIG_OMAP2_VRAM
38extern void omap_vram_set_sdram_vram(u32 size, u32 start);
39extern void omap_vram_set_sram_vram(u32 size, u32 start);
40
41extern void omap_vram_reserve_sdram(void);
42extern unsigned long omap_vram_reserve_sram(unsigned long sram_pstart,
43 unsigned long sram_vstart,
44 unsigned long sram_size,
45 unsigned long pstart_avail,
46 unsigned long size_avail);
47#else
48static inline void omap_vram_set_sdram_vram(u32 size, u32 start) { }
49static inline void omap_vram_set_sram_vram(u32 size, u32 start) { }
50
51static inline void omap_vram_reserve_sdram(void) { }
52static inline unsigned long omap_vram_reserve_sram(unsigned long sram_pstart,
53 unsigned long sram_vstart,
54 unsigned long sram_size,
55 unsigned long pstart_avail,
56 unsigned long size_avail)
57{
58 return 0;
59}
60#endif
61
62#endif
diff --git a/arch/arm/plat-omap/include/plat/vrfb.h b/arch/arm/plat-omap/include/plat/vrfb.h
new file mode 100644
index 000000000000..d8a03ced3b10
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/vrfb.h
@@ -0,0 +1,50 @@
1/*
2 * VRFB Rotation Engine
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#ifndef __OMAP_VRFB_H__
22#define __OMAP_VRFB_H__
23
24#define OMAP_VRFB_LINE_LEN 2048
25
26struct vrfb {
27 u8 context;
28 void __iomem *vaddr[4];
29 unsigned long paddr[4];
30 u16 xres;
31 u16 yres;
32 u16 xoffset;
33 u16 yoffset;
34 u8 bytespp;
35 bool yuv_mode;
36};
37
38extern int omap_vrfb_request_ctx(struct vrfb *vrfb);
39extern void omap_vrfb_release_ctx(struct vrfb *vrfb);
40extern void omap_vrfb_adjust_size(u16 *width, u16 *height,
41 u8 bytespp);
42extern u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp);
43extern u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp);
44extern void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr,
45 u16 width, u16 height,
46 unsigned bytespp, bool yuv_mode);
47extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot);
48extern void omap_vrfb_restore_context(void);
49
50#endif /* __VRFB_H */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 3e923668778d..ad2bf07d30b5 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -28,6 +28,7 @@
28#include <plat/sram.h> 28#include <plat/sram.h>
29#include <plat/board.h> 29#include <plat/board.h>
30#include <plat/cpu.h> 30#include <plat/cpu.h>
31#include <plat/vram.h>
31 32
32#include <plat/control.h> 33#include <plat/control.h>
33 34
@@ -185,6 +186,13 @@ void __init omap_detect_sram(void)
185 omap_sram_start + SRAM_BOOTLOADER_SZ, 186 omap_sram_start + SRAM_BOOTLOADER_SZ,
186 omap_sram_size - SRAM_BOOTLOADER_SZ); 187 omap_sram_size - SRAM_BOOTLOADER_SZ);
187 omap_sram_size -= reserved; 188 omap_sram_size -= reserved;
189
190 reserved = omap_vram_reserve_sram(omap_sram_start, omap_sram_base,
191 omap_sram_size,
192 omap_sram_start + SRAM_BOOTLOADER_SZ,
193 omap_sram_size - SRAM_BOOTLOADER_SZ);
194 omap_sram_size -= reserved;
195
188 omap_sram_ceil = omap_sram_base + omap_sram_size; 196 omap_sram_ceil = omap_sram_base + omap_sram_size;
189} 197}
190 198
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index e139a72c2149..9e9d0286e48f 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/plat-s3c/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
diff --git a/arch/arm/plat-s3c/pwm.c b/arch/arm/plat-s3c/pwm.c
index 4fdc5b307fd2..ef019f27b67d 100644
--- a/arch/arm/plat-s3c/pwm.c
+++ b/arch/arm/plat-s3c/pwm.c
@@ -368,7 +368,7 @@ static int s3c_pwm_probe(struct platform_device *pdev)
368 return ret; 368 return ret;
369} 369}
370 370
371static int s3c_pwm_remove(struct platform_device *pdev) 371static int __devexit s3c_pwm_remove(struct platform_device *pdev)
372{ 372{
373 struct pwm_device *pwm = platform_get_drvdata(pdev); 373 struct pwm_device *pwm = platform_get_drvdata(pdev);
374 374
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 20fbf936bb93..342647eb91d8 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/plat-s3c24xx/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c
index df47322492d5..ce47627f3368 100644
--- a/arch/arm/plat-s3c24xx/adc.c
+++ b/arch/arm/plat-s3c24xx/adc.c
@@ -365,7 +365,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
365 return ret; 365 return ret;
366} 366}
367 367
368static int s3c_adc_remove(struct platform_device *pdev) 368static int __devexit s3c_adc_remove(struct platform_device *pdev)
369{ 369{
370 struct adc_device *adc = platform_get_drvdata(pdev); 370 struct adc_device *adc = platform_get_drvdata(pdev);
371 371
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index f65192d5b1d7..f0ea7943ac5a 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1403,11 +1403,13 @@ static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel)
1403 ord = &dma_order->channels[channel]; 1403 ord = &dma_order->channels[channel];
1404 1404
1405 for (ch = 0; ch < dma_channels; ch++) { 1405 for (ch = 0; ch < dma_channels; ch++) {
1406 int tmp;
1406 if (!is_channel_valid(ord->list[ch])) 1407 if (!is_channel_valid(ord->list[ch]))
1407 continue; 1408 continue;
1408 1409
1409 if (s3c2410_chans[ord->list[ch]].in_use == 0) { 1410 tmp = ord->list[ch] & ~DMA_CH_VALID;
1410 ch = ord->list[ch] & ~DMA_CH_VALID; 1411 if (s3c2410_chans[tmp].in_use == 0) {
1412 ch = tmp;
1411 goto found; 1413 goto found;
1412 } 1414 }
1413 } 1415 }
diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h
index c4d133436fc7..bd534d32b993 100644
--- a/arch/arm/plat-s3c24xx/include/plat/map.h
+++ b/arch/arm/plat-s3c24xx/include/plat/map.h
@@ -64,7 +64,7 @@
64/* the calculation for the VA of this must ensure that 64/* the calculation for the VA of this must ensure that
65 * it is the same distance apart from the UART in the 65 * it is the same distance apart from the UART in the
66 * phsyical address space, as the initial mapping for the IO 66 * phsyical address space, as the initial mapping for the IO
67 * is done as a 1:1 maping. This puts it (currently) at 67 * is done as a 1:1 mapping. This puts it (currently) at
68 * 0xFA800000, which is not in the way of any current mapping 68 * 0xFA800000, which is not in the way of any current mapping
69 * by the base system. 69 * by the base system.
70*/ 70*/
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index ef0f521437d7..ad0d44ef1f93 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -522,6 +522,8 @@ int s3c24xx_set_fiq(unsigned int irq, bool on)
522 __raw_writel(intmod, S3C2410_INTMOD); 522 __raw_writel(intmod, S3C2410_INTMOD);
523 return 0; 523 return 0;
524} 524}
525
526EXPORT_SYMBOL_GPL(s3c24xx_set_fiq);
525#endif 527#endif
526 528
527 529
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
index bcfa778614d8..e6da87a5885c 100644
--- a/arch/arm/plat-s3c64xx/Kconfig
+++ b/arch/arm/plat-s3c64xx/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/plat-s3c64xx/Kconfig
2#
3# Copyright 2008 Openmoko, Inc. 1# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics 2# Copyright 2008 Simtec Electronics
5# Ben Dooks <ben@simtec.co.uk> 3# Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index 1608e62b0c9d..b7b9e91c0243 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/plat-s5pc1xx/Kconfig
2#
3# Copyright 2009 Samsung Electronics Co. 1# Copyright 2009 Samsung Electronics Co.
4# Byungho Min <bhmin@samsung.com> 2# Byungho Min <bhmin@samsung.com>
5# 3#
diff --git a/arch/avr32/boards/hammerhead/Kconfig b/arch/avr32/boards/hammerhead/Kconfig
index fda2331f9789..5c13d785cc70 100644
--- a/arch/avr32/boards/hammerhead/Kconfig
+++ b/arch/avr32/boards/hammerhead/Kconfig
@@ -24,7 +24,7 @@ config BOARD_HAMMERHEAD_SND
24 bool "Atmel AC97 Sound support" 24 bool "Atmel AC97 Sound support"
25 help 25 help
26 This enables Sound support for the Hammerhead board. You may 26 This enables Sound support for the Hammerhead board. You may
27 also go trough the ALSA settings to get it working. 27 also go through the ALSA settings to get it working.
28 28
29 Choose 'Y' here if you have ordered a Corona daugther board and 29 Choose 'Y' here if you have ordered a Corona daugther board and
30 want to make your board funky. 30 want to make your board funky.
diff --git a/arch/avr32/include/asm/syscalls.h b/arch/avr32/include/asm/syscalls.h
index 483d666c27c0..66a197266637 100644
--- a/arch/avr32/include/asm/syscalls.h
+++ b/arch/avr32/include/asm/syscalls.h
@@ -29,10 +29,6 @@ asmlinkage int sys_sigaltstack(const stack_t __user *, stack_t __user *,
29 struct pt_regs *); 29 struct pt_regs *);
30asmlinkage int sys_rt_sigreturn(struct pt_regs *); 30asmlinkage int sys_rt_sigreturn(struct pt_regs *);
31 31
32/* kernel/sys_avr32.c */
33asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
34 unsigned long, unsigned long, off_t);
35
36/* mm/cache.c */ 32/* mm/cache.c */
37asmlinkage int sys_cacheflush(int, void __user *, size_t); 33asmlinkage int sys_cacheflush(int, void __user *, size_t);
38 34
diff --git a/arch/avr32/kernel/sys_avr32.c b/arch/avr32/kernel/sys_avr32.c
index 5d2daeaf356f..459349b5ed5a 100644
--- a/arch/avr32/kernel/sys_avr32.c
+++ b/arch/avr32/kernel/sys_avr32.c
@@ -5,39 +5,8 @@
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8#include <linux/errno.h>
9#include <linux/fs.h>
10#include <linux/file.h>
11#include <linux/mm.h>
12#include <linux/unistd.h> 8#include <linux/unistd.h>
13 9
14#include <asm/mman.h>
15#include <asm/uaccess.h>
16#include <asm/syscalls.h>
17
18asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
19 unsigned long prot, unsigned long flags,
20 unsigned long fd, off_t offset)
21{
22 int error = -EBADF;
23 struct file *file = NULL;
24
25 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
26 if (!(flags & MAP_ANONYMOUS)) {
27 file = fget(fd);
28 if (!file)
29 return error;
30 }
31
32 down_write(&current->mm->mmap_sem);
33 error = do_mmap_pgoff(file, addr, len, prot, flags, offset);
34 up_write(&current->mm->mmap_sem);
35
36 if (file)
37 fput(file);
38 return error;
39}
40
41int kernel_execve(const char *file, char **argv, char **envp) 10int kernel_execve(const char *file, char **argv, char **envp)
42{ 11{
43 register long scno asm("r8") = __NR_execve; 12 register long scno asm("r8") = __NR_execve;
diff --git a/arch/avr32/kernel/syscall-stubs.S b/arch/avr32/kernel/syscall-stubs.S
index f7244cd02fbb..0447a3e2ba64 100644
--- a/arch/avr32/kernel/syscall-stubs.S
+++ b/arch/avr32/kernel/syscall-stubs.S
@@ -61,7 +61,7 @@ __sys_execve:
61__sys_mmap2: 61__sys_mmap2:
62 pushm lr 62 pushm lr
63 st.w --sp, ARG6 63 st.w --sp, ARG6
64 call sys_mmap2 64 call sys_mmap_pgoff
65 sub sp, -4 65 sub sp, -4
66 popm pc 66 popm pc
67 67
diff --git a/arch/blackfin/include/asm/fcntl.h b/arch/blackfin/include/asm/fcntl.h
index 8727b2b382f1..251c911d59c1 100644
--- a/arch/blackfin/include/asm/fcntl.h
+++ b/arch/blackfin/include/asm/fcntl.h
@@ -7,8 +7,6 @@
7#ifndef _BFIN_FCNTL_H 7#ifndef _BFIN_FCNTL_H
8#define _BFIN_FCNTL_H 8#define _BFIN_FCNTL_H
9 9
10/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
11 located on an ext2 file system */
12#define O_DIRECTORY 040000 /* must be a directory */ 10#define O_DIRECTORY 040000 /* must be a directory */
13#define O_NOFOLLOW 0100000 /* don't follow links */ 11#define O_NOFOLLOW 0100000 /* don't follow links */
14#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */ 12#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 5cc7e2e9e415..45876427eb2d 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -215,22 +215,18 @@ copy_thread(unsigned long clone_flags,
215/* 215/*
216 * sys_execve() executes a new program. 216 * sys_execve() executes a new program.
217 */ 217 */
218
219asmlinkage int sys_execve(char __user *name, char __user * __user *argv, char __user * __user *envp) 218asmlinkage int sys_execve(char __user *name, char __user * __user *argv, char __user * __user *envp)
220{ 219{
221 int error; 220 int error;
222 char *filename; 221 char *filename;
223 struct pt_regs *regs = (struct pt_regs *)((&name) + 6); 222 struct pt_regs *regs = (struct pt_regs *)((&name) + 6);
224 223
225 lock_kernel();
226 filename = getname(name); 224 filename = getname(name);
227 error = PTR_ERR(filename); 225 error = PTR_ERR(filename);
228 if (IS_ERR(filename)) 226 if (IS_ERR(filename))
229 goto out; 227 return error;
230 error = do_execve(filename, argv, envp, regs); 228 error = do_execve(filename, argv, envp, regs);
231 putname(filename); 229 putname(filename);
232 out:
233 unlock_kernel();
234 return error; 230 return error;
235} 231}
236 232
diff --git a/arch/blackfin/kernel/sys_bfin.c b/arch/blackfin/kernel/sys_bfin.c
index afcef129d4e8..2e7f8e10bf87 100644
--- a/arch/blackfin/kernel/sys_bfin.c
+++ b/arch/blackfin/kernel/sys_bfin.c
@@ -22,39 +22,6 @@
22#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
23#include <asm/dma.h> 23#include <asm/dma.h>
24 24
25/* common code for old and new mmaps */
26static inline long
27do_mmap2(unsigned long addr, unsigned long len,
28 unsigned long prot, unsigned long flags,
29 unsigned long fd, unsigned long pgoff)
30{
31 int error = -EBADF;
32 struct file *file = NULL;
33
34 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
35 if (!(flags & MAP_ANONYMOUS)) {
36 file = fget(fd);
37 if (!file)
38 goto out;
39 }
40
41 down_write(&current->mm->mmap_sem);
42 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
43 up_write(&current->mm->mmap_sem);
44
45 if (file)
46 fput(file);
47 out:
48 return error;
49}
50
51asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
52 unsigned long prot, unsigned long flags,
53 unsigned long fd, unsigned long pgoff)
54{
55 return do_mmap2(addr, len, prot, flags, fd, pgoff);
56}
57
58asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags) 25asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags)
59{ 26{
60 return sram_alloc_with_lsl(size, flags); 27 return sram_alloc_with_lsl(size, flags);
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 6b7325d634af..78cb3d38f899 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -619,7 +619,7 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
619 619
620/* 620/*
621 * Similar to get_user, do some address checking, then dereference 621 * Similar to get_user, do some address checking, then dereference
622 * Return true on sucess, false on bad address 622 * Return true on success, false on bad address
623 */ 623 */
624static bool get_instruction(unsigned short *val, unsigned short *address) 624static bool get_instruction(unsigned short *val, unsigned short *address)
625{ 625{
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
index e06f4112c695..f9fd2b2a2956 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
@@ -542,7 +542,7 @@
542#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */ 542#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */
543#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */ 543#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */
544#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */ 544#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */
545#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshhold Register */ 545#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshold Register */
546#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */ 546#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */
547#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */ 547#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */
548#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */ 548#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */
@@ -550,7 +550,7 @@
550#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */ 550#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */
551#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */ 551#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */
552#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */ 552#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */
553#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshhold Register */ 553#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshold Register */
554#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */ 554#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */
555#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */ 555#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */
556#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */ 556#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index f821700716ee..b9dbb73d7ef0 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -544,7 +544,7 @@
544#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */ 544#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */
545#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */ 545#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */
546#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */ 546#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */
547#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshhold Register */ 547#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshold Register */
548#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */ 548#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */
549#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */ 549#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */
550#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */ 550#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */
@@ -552,7 +552,7 @@
552#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */ 552#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */
553#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */ 553#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */
554#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */ 554#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */
555#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshhold Register */ 555#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshold Register */
556#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */ 556#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */
557#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */ 557#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */
558#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */ 558#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h
index cebb14feb1ba..a6d20ca57683 100644
--- a/arch/blackfin/mach-bf537/include/mach/defBF534.h
+++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h
@@ -934,7 +934,7 @@
934#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */ 934#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */
935#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */ 935#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */
936#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */ 936#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */
937#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshhold Register */ 937#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshold Register */
938#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */ 938#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */
939#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */ 939#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */
940#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */ 940#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */
@@ -942,7 +942,7 @@
942#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */ 942#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */
943#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */ 943#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */
944#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */ 944#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */
945#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshhold Register */ 945#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshold Register */
946#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */ 946#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */
947#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */ 947#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */
948#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */ 948#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF544.h b/arch/blackfin/mach-bf548/include/mach/defBF544.h
index dd414ae4ba4c..39f588dcd382 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF544.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF544.h
@@ -491,7 +491,7 @@
491#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */ 491#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
492#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */ 492#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
493#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */ 493#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
494#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */ 494#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshold Register */
495#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */ 495#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
496#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */ 496#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
497#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */ 497#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
@@ -501,7 +501,7 @@
501#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */ 501#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
502#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */ 502#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
503#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */ 503#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
504#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */ 504#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshold Register */
505#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */ 505#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
506#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */ 506#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
507#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */ 507#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF547.h b/arch/blackfin/mach-bf548/include/mach/defBF547.h
index 5a9dbabe0a68..c4dcf302d9f5 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF547.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF547.h
@@ -470,7 +470,7 @@
470#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */ 470#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
471#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */ 471#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
472#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */ 472#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
473#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */ 473#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshold Register */
474#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */ 474#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
475#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */ 475#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
476#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */ 476#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
@@ -480,7 +480,7 @@
480#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */ 480#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
481#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */ 481#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
482#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */ 482#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
483#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */ 483#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshold Register */
484#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */ 484#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
485#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */ 485#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
486#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */ 486#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF548.h b/arch/blackfin/mach-bf548/include/mach/defBF548.h
index 82cd593f7391..a5079980968c 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF548.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF548.h
@@ -853,7 +853,7 @@
853#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */ 853#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
854#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */ 854#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
855#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */ 855#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
856#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */ 856#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshold Register */
857#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */ 857#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
858#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */ 858#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
859#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */ 859#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
@@ -863,7 +863,7 @@
863#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */ 863#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
864#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */ 864#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
865#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */ 865#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
866#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */ 866#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshold Register */
867#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */ 867#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
868#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */ 868#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
869#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */ 869#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF549.h b/arch/blackfin/mach-bf548/include/mach/defBF549.h
index 6fc6e39ab61b..f7f043560c6f 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF549.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF549.h
@@ -1024,7 +1024,7 @@
1024#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */ 1024#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
1025#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */ 1025#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
1026#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */ 1026#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
1027#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */ 1027#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshold Register */
1028#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */ 1028#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
1029#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */ 1029#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
1030#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */ 1030#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
@@ -1034,7 +1034,7 @@
1034#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */ 1034#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
1035#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */ 1035#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
1036#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */ 1036#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
1037#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */ 1037#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshold Register */
1038#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */ 1038#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
1039#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */ 1039#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
1040#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */ 1040#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index a50637a8b9bd..f3f8bb46b517 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -1422,7 +1422,7 @@ ENTRY(_sys_call_table)
1422 .long _sys_ni_syscall /* streams2 */ 1422 .long _sys_ni_syscall /* streams2 */
1423 .long _sys_vfork /* 190 */ 1423 .long _sys_vfork /* 190 */
1424 .long _sys_getrlimit 1424 .long _sys_getrlimit
1425 .long _sys_mmap2 1425 .long _sys_mmap_pgoff
1426 .long _sys_truncate64 1426 .long _sys_truncate64
1427 .long _sys_ftruncate64 1427 .long _sys_ftruncate64
1428 .long _sys_stat64 /* 195 */ 1428 .long _sys_stat64 /* 195 */
diff --git a/arch/cris/arch-v10/mm/fault.c b/arch/cris/arch-v10/mm/fault.c
index 087a2096f221..ed60588f8467 100644
--- a/arch/cris/arch-v10/mm/fault.c
+++ b/arch/cris/arch-v10/mm/fault.c
@@ -80,8 +80,7 @@ handle_mmu_bus_fault(struct pt_regs *regs)
80 * do_page_fault may have flushed the TLB so we have to restore 80 * do_page_fault may have flushed the TLB so we have to restore
81 * the MMU registers. 81 * the MMU registers.
82 */ 82 */
83 local_save_flags(flags); 83 local_irq_save(flags);
84 local_irq_disable();
85 pmd = (pmd_t *)(pgd + pgd_index(address)); 84 pmd = (pmd_t *)(pgd + pgd_index(address));
86 if (pmd_none(*pmd)) 85 if (pmd_none(*pmd))
87 goto exit; 86 goto exit;
diff --git a/arch/cris/arch-v10/mm/tlb.c b/arch/cris/arch-v10/mm/tlb.c
index 4a496e4ffacc..21d78c599bab 100644
--- a/arch/cris/arch-v10/mm/tlb.c
+++ b/arch/cris/arch-v10/mm/tlb.c
@@ -134,28 +134,6 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
134 local_irq_restore(flags); 134 local_irq_restore(flags);
135} 135}
136 136
137/* dump the entire TLB for debug purposes */
138
139#if 0
140void
141dump_tlb_all(void)
142{
143 int i;
144 unsigned long flags;
145
146 printk("TLB dump. LO is: pfn | reserved | global | valid | kernel | we |\n");
147
148 local_save_flags(flags);
149 local_irq_disable();
150 for(i = 0; i < NUM_TLB_ENTRIES; i++) {
151 *R_TLB_SELECT = ( IO_FIELD(R_TLB_SELECT, index, i) );
152 printk("Entry %d: HI 0x%08lx, LO 0x%08lx\n",
153 i, *R_TLB_HI, *R_TLB_LO);
154 }
155 local_irq_restore(flags);
156}
157#endif
158
159/* 137/*
160 * Initialize the context related info for a new mm_struct 138 * Initialize the context related info for a new mm_struct
161 * instance. 139 * instance.
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index 2ad962c7e88e..c2bbb1ac98a9 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -26,31 +26,6 @@
26#include <asm/uaccess.h> 26#include <asm/uaccess.h>
27#include <asm/segment.h> 27#include <asm/segment.h>
28 28
29/* common code for old and new mmaps */
30static inline long
31do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
32 unsigned long flags, unsigned long fd, unsigned long pgoff)
33{
34 int error = -EBADF;
35 struct file * file = NULL;
36
37 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
38 if (!(flags & MAP_ANONYMOUS)) {
39 file = fget(fd);
40 if (!file)
41 goto out;
42 }
43
44 down_write(&current->mm->mmap_sem);
45 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
46 up_write(&current->mm->mmap_sem);
47
48 if (file)
49 fput(file);
50out:
51 return error;
52}
53
54asmlinkage unsigned long old_mmap(unsigned long __user *args) 29asmlinkage unsigned long old_mmap(unsigned long __user *args)
55{ 30{
56 unsigned long buffer[6]; 31 unsigned long buffer[6];
@@ -63,7 +38,7 @@ asmlinkage unsigned long old_mmap(unsigned long __user *args)
63 if (buffer[5] & ~PAGE_MASK) /* verify that offset is on page boundary */ 38 if (buffer[5] & ~PAGE_MASK) /* verify that offset is on page boundary */
64 goto out; 39 goto out;
65 40
66 err = do_mmap2(buffer[0], buffer[1], buffer[2], buffer[3], 41 err = sys_mmap_pgoff(buffer[0], buffer[1], buffer[2], buffer[3],
67 buffer[4], buffer[5] >> PAGE_SHIFT); 42 buffer[4], buffer[5] >> PAGE_SHIFT);
68out: 43out:
69 return err; 44 return err;
@@ -73,7 +48,8 @@ asmlinkage long
73sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 48sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
74 unsigned long flags, unsigned long fd, unsigned long pgoff) 49 unsigned long flags, unsigned long fd, unsigned long pgoff)
75{ 50{
76 return do_mmap2(addr, len, prot, flags, fd, pgoff); 51 /* bug(?): 8Kb pages here */
52 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
77} 53}
78 54
79/* 55/*
diff --git a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c
index 4a7cdd9ea1ee..380df1a73a6e 100644
--- a/arch/cris/mm/fault.c
+++ b/arch/cris/mm/fault.c
@@ -209,7 +209,7 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
209 /* Are we prepared to handle this kernel fault? 209 /* Are we prepared to handle this kernel fault?
210 * 210 *
211 * (The kernel has valid exception-points in the source 211 * (The kernel has valid exception-points in the source
212 * when it acesses user-memory. When it fails in one 212 * when it accesses user-memory. When it fails in one
213 * of those points, we find it in a table and do a jump 213 * of those points, we find it in a table and do a jump
214 * to some fixup code that loads an appropriate error 214 * to some fixup code that loads an appropriate error
215 * code) 215 * code)
diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c
index 904255938216..21d0fd19276d 100644
--- a/arch/frv/kernel/process.c
+++ b/arch/frv/kernel/process.c
@@ -255,15 +255,12 @@ asmlinkage int sys_execve(char __user *name, char __user * __user *argv, char __
255 int error; 255 int error;
256 char * filename; 256 char * filename;
257 257
258 lock_kernel();
259 filename = getname(name); 258 filename = getname(name);
260 error = PTR_ERR(filename); 259 error = PTR_ERR(filename);
261 if (IS_ERR(filename)) 260 if (IS_ERR(filename))
262 goto out; 261 return error;
263 error = do_execve(filename, argv, envp, __frame); 262 error = do_execve(filename, argv, envp, __frame);
264 putname(filename); 263 putname(filename);
265 out:
266 unlock_kernel();
267 return error; 264 return error;
268} 265}
269 266
diff --git a/arch/frv/kernel/sys_frv.c b/arch/frv/kernel/sys_frv.c
index 2b6b5289cdcc..1d3d4c9e2521 100644
--- a/arch/frv/kernel/sys_frv.c
+++ b/arch/frv/kernel/sys_frv.c
@@ -31,9 +31,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
31 unsigned long prot, unsigned long flags, 31 unsigned long prot, unsigned long flags,
32 unsigned long fd, unsigned long pgoff) 32 unsigned long fd, unsigned long pgoff)
33{ 33{
34 int error = -EBADF;
35 struct file * file = NULL;
36
37 /* As with sparc32, make sure the shift for mmap2 is constant 34 /* As with sparc32, make sure the shift for mmap2 is constant
38 (12), no matter what PAGE_SIZE we have.... */ 35 (12), no matter what PAGE_SIZE we have.... */
39 36
@@ -41,69 +38,10 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
41 trying to map something we can't */ 38 trying to map something we can't */
42 if (pgoff & ((1 << (PAGE_SHIFT - 12)) - 1)) 39 if (pgoff & ((1 << (PAGE_SHIFT - 12)) - 1))
43 return -EINVAL; 40 return -EINVAL;
44 pgoff >>= PAGE_SHIFT - 12;
45
46 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
47 if (!(flags & MAP_ANONYMOUS)) {
48 file = fget(fd);
49 if (!file)
50 goto out;
51 }
52
53 down_write(&current->mm->mmap_sem);
54 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
55 up_write(&current->mm->mmap_sem);
56
57 if (file)
58 fput(file);
59out:
60 return error;
61}
62
63#if 0 /* DAVIDM - do we want this */
64struct mmap_arg_struct64 {
65 __u32 addr;
66 __u32 len;
67 __u32 prot;
68 __u32 flags;
69 __u64 offset; /* 64 bits */
70 __u32 fd;
71};
72
73asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg)
74{
75 int error = -EFAULT;
76 struct file * file = NULL;
77 struct mmap_arg_struct64 a;
78 unsigned long pgoff;
79
80 if (copy_from_user(&a, arg, sizeof(a)))
81 return -EFAULT;
82
83 if ((long)a.offset & ~PAGE_MASK)
84 return -EINVAL;
85
86 pgoff = a.offset >> PAGE_SHIFT;
87 if ((a.offset >> PAGE_SHIFT) != pgoff)
88 return -EINVAL;
89
90 if (!(a.flags & MAP_ANONYMOUS)) {
91 error = -EBADF;
92 file = fget(a.fd);
93 if (!file)
94 goto out;
95 }
96 a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
97 41
98 down_write(&current->mm->mmap_sem); 42 return sys_mmap_pgoff(addr, len, prot, flags, fd,
99 error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff); 43 pgoff >> (PAGE_SHIFT - 12));
100 up_write(&current->mm->mmap_sem);
101 if (file)
102 fput(file);
103out:
104 return error;
105} 44}
106#endif
107 45
108/* 46/*
109 * sys_ipc() is the de-multiplexer for the SysV IPC calls.. 47 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
index e2f33d0f9969..bd883faa983d 100644
--- a/arch/h8300/kernel/process.c
+++ b/arch/h8300/kernel/process.c
@@ -218,15 +218,12 @@ asmlinkage int sys_execve(char *name, char **argv, char **envp,int dummy,...)
218 char * filename; 218 char * filename;
219 struct pt_regs *regs = (struct pt_regs *) ((unsigned char *)&dummy-4); 219 struct pt_regs *regs = (struct pt_regs *) ((unsigned char *)&dummy-4);
220 220
221 lock_kernel();
222 filename = getname(name); 221 filename = getname(name);
223 error = PTR_ERR(filename); 222 error = PTR_ERR(filename);
224 if (IS_ERR(filename)) 223 if (IS_ERR(filename))
225 goto out; 224 return error;
226 error = do_execve(filename, argv, envp, regs); 225 error = do_execve(filename, argv, envp, regs);
227 putname(filename); 226 putname(filename);
228out:
229 unlock_kernel();
230 return error; 227 return error;
231} 228}
232 229
diff --git a/arch/h8300/kernel/sys_h8300.c b/arch/h8300/kernel/sys_h8300.c
index 8cb5d73a0e35..b5969db0ca10 100644
--- a/arch/h8300/kernel/sys_h8300.c
+++ b/arch/h8300/kernel/sys_h8300.c
@@ -26,39 +26,6 @@
26#include <asm/traps.h> 26#include <asm/traps.h>
27#include <asm/unistd.h> 27#include <asm/unistd.h>
28 28
29/* common code for old and new mmaps */
30static inline long do_mmap2(
31 unsigned long addr, unsigned long len,
32 unsigned long prot, unsigned long flags,
33 unsigned long fd, unsigned long pgoff)
34{
35 int error = -EBADF;
36 struct file * file = NULL;
37
38 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
39 if (!(flags & MAP_ANONYMOUS)) {
40 file = fget(fd);
41 if (!file)
42 goto out;
43 }
44
45 down_write(&current->mm->mmap_sem);
46 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
47 up_write(&current->mm->mmap_sem);
48
49 if (file)
50 fput(file);
51out:
52 return error;
53}
54
55asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
56 unsigned long prot, unsigned long flags,
57 unsigned long fd, unsigned long pgoff)
58{
59 return do_mmap2(addr, len, prot, flags, fd, pgoff);
60}
61
62/* 29/*
63 * Perform the select(nd, in, out, ex, tv) and mmap() system 30 * Perform the select(nd, in, out, ex, tv) and mmap() system
64 * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to 31 * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
@@ -87,57 +54,11 @@ asmlinkage int old_mmap(struct mmap_arg_struct *arg)
87 if (a.offset & ~PAGE_MASK) 54 if (a.offset & ~PAGE_MASK)
88 goto out; 55 goto out;
89 56
90 a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); 57 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
91 58 a.offset >> PAGE_SHIFT);
92 error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
93out:
94 return error;
95}
96
97#if 0 /* DAVIDM - do we want this */
98struct mmap_arg_struct64 {
99 __u32 addr;
100 __u32 len;
101 __u32 prot;
102 __u32 flags;
103 __u64 offset; /* 64 bits */
104 __u32 fd;
105};
106
107asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg)
108{
109 int error = -EFAULT;
110 struct file * file = NULL;
111 struct mmap_arg_struct64 a;
112 unsigned long pgoff;
113
114 if (copy_from_user(&a, arg, sizeof(a)))
115 return -EFAULT;
116
117 if ((long)a.offset & ~PAGE_MASK)
118 return -EINVAL;
119
120 pgoff = a.offset >> PAGE_SHIFT;
121 if ((a.offset >> PAGE_SHIFT) != pgoff)
122 return -EINVAL;
123
124 if (!(a.flags & MAP_ANONYMOUS)) {
125 error = -EBADF;
126 file = fget(a.fd);
127 if (!file)
128 goto out;
129 }
130 a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
131
132 down_write(&current->mm->mmap_sem);
133 error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff);
134 up_write(&current->mm->mmap_sem);
135 if (file)
136 fput(file);
137out: 59out:
138 return error; 60 return error;
139} 61}
140#endif
141 62
142struct sel_arg_struct { 63struct sel_arg_struct {
143 unsigned long n; 64 unsigned long n;
diff --git a/arch/h8300/kernel/syscalls.S b/arch/h8300/kernel/syscalls.S
index 4eb67faac633..2d69881eda6a 100644
--- a/arch/h8300/kernel/syscalls.S
+++ b/arch/h8300/kernel/syscalls.S
@@ -206,7 +206,7 @@ SYMBOL_NAME_LABEL(sys_call_table)
206 .long SYMBOL_NAME(sys_ni_syscall) /* streams2 */ 206 .long SYMBOL_NAME(sys_ni_syscall) /* streams2 */
207 .long SYMBOL_NAME(sys_vfork) /* 190 */ 207 .long SYMBOL_NAME(sys_vfork) /* 190 */
208 .long SYMBOL_NAME(sys_getrlimit) 208 .long SYMBOL_NAME(sys_getrlimit)
209 .long SYMBOL_NAME(sys_mmap2) 209 .long SYMBOL_NAME(sys_mmap_pgoff)
210 .long SYMBOL_NAME(sys_truncate64) 210 .long SYMBOL_NAME(sys_truncate64)
211 .long SYMBOL_NAME(sys_ftruncate64) 211 .long SYMBOL_NAME(sys_ftruncate64)
212 .long SYMBOL_NAME(sys_stat64) /* 195 */ 212 .long SYMBOL_NAME(sys_stat64) /* 195 */
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index 674a8374c6d9..f332e3fe4237 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -1381,7 +1381,7 @@ sba_coalesce_chunks(struct ioc *ioc, struct device *dev,
1381#endif 1381#endif
1382 1382
1383 /* 1383 /*
1384 ** Not virtually contigous. 1384 ** Not virtually contiguous.
1385 ** Terminate prev chunk. 1385 ** Terminate prev chunk.
1386 ** Start a new chunk. 1386 ** Start a new chunk.
1387 ** 1387 **
diff --git a/arch/ia64/ia32/ia32_entry.S b/arch/ia64/ia32/ia32_entry.S
index 10c37510f4b4..2fd7479aa216 100644
--- a/arch/ia64/ia32/ia32_entry.S
+++ b/arch/ia64/ia32/ia32_entry.S
@@ -79,7 +79,7 @@ GLOBAL_ENTRY(ia32_ret_from_clone)
79(p6) br.cond.spnt .ia32_strace_check_retval 79(p6) br.cond.spnt .ia32_strace_check_retval
80 ;; // prevent RAW on r8 80 ;; // prevent RAW on r8
81END(ia32_ret_from_clone) 81END(ia32_ret_from_clone)
82 // fall thrugh 82 // fall through
83GLOBAL_ENTRY(ia32_ret_from_syscall) 83GLOBAL_ENTRY(ia32_ret_from_syscall)
84 PT_REGS_UNWIND_INFO(0) 84 PT_REGS_UNWIND_INFO(0)
85 85
diff --git a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c
index 429ec968c9ee..045b746b9808 100644
--- a/arch/ia64/ia32/sys_ia32.c
+++ b/arch/ia64/ia32/sys_ia32.c
@@ -858,6 +858,9 @@ ia32_do_mmap (struct file *file, unsigned long addr, unsigned long len, int prot
858 858
859 prot = get_prot32(prot); 859 prot = get_prot32(prot);
860 860
861 if (flags & MAP_HUGETLB)
862 return -ENOMEM;
863
861#if PAGE_SHIFT > IA32_PAGE_SHIFT 864#if PAGE_SHIFT > IA32_PAGE_SHIFT
862 mutex_lock(&ia32_mmap_mutex); 865 mutex_lock(&ia32_mmap_mutex);
863 { 866 {
diff --git a/arch/ia64/include/asm/perfmon_default_smpl.h b/arch/ia64/include/asm/perfmon_default_smpl.h
index 48822c0811d8..74724b24c2b7 100644
--- a/arch/ia64/include/asm/perfmon_default_smpl.h
+++ b/arch/ia64/include/asm/perfmon_default_smpl.h
@@ -67,7 +67,7 @@ typedef struct {
67 unsigned long ip; /* where did the overflow interrupt happened */ 67 unsigned long ip; /* where did the overflow interrupt happened */
68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */ 68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */
69 69
70 unsigned short cpu; /* cpu on which the overfow occured */ 70 unsigned short cpu; /* cpu on which the overflow occured */
71 unsigned short set; /* event set active when overflow ocurred */ 71 unsigned short set; /* event set active when overflow ocurred */
72 int tgid; /* thread group id (for NPTL, this is getpid()) */ 72 int tgid; /* thread group id (for NPTL, this is getpid()) */
73} pfm_default_smpl_entry_t; 73} pfm_default_smpl_entry_t;
diff --git a/arch/ia64/include/asm/sn/shubio.h b/arch/ia64/include/asm/sn/shubio.h
index 22a6f18a5313..6052422a22b3 100644
--- a/arch/ia64/include/asm/sn/shubio.h
+++ b/arch/ia64/include/asm/sn/shubio.h
@@ -3289,7 +3289,7 @@ typedef ii_icrb0_e_u_t icrbe_t;
3289#define IIO_IIDSR_LVL_SHIFT 0 3289#define IIO_IIDSR_LVL_SHIFT 0
3290#define IIO_IIDSR_LVL_MASK 0x000000ff 3290#define IIO_IIDSR_LVL_MASK 0x000000ff
3291 3291
3292/* Xtalk timeout threshhold register (IIO_IXTT) */ 3292/* Xtalk timeout threshold register (IIO_IXTT) */
3293#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */ 3293#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */
3294#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT) 3294#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT)
3295#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */ 3295#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index 9c72e36c5281..10a8f21ca9e3 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -311,7 +311,7 @@
311#define __NR_preadv 1319 311#define __NR_preadv 1319
312#define __NR_pwritev 1320 312#define __NR_pwritev 1320
313#define __NR_rt_tgsigqueueinfo 1321 313#define __NR_rt_tgsigqueueinfo 1321
314#define __NR_rt_recvmmsg 1322 314#define __NR_recvmmsg 1322
315 315
316#ifdef __KERNEL__ 316#ifdef __KERNEL__
317 317
diff --git a/arch/ia64/include/asm/xen/hypervisor.h b/arch/ia64/include/asm/xen/hypervisor.h
index 88afb54501e4..67455c2ed2b1 100644
--- a/arch/ia64/include/asm/xen/hypervisor.h
+++ b/arch/ia64/include/asm/xen/hypervisor.h
@@ -37,35 +37,9 @@
37#include <xen/interface/xen.h> 37#include <xen/interface/xen.h>
38#include <xen/interface/version.h> /* to compile feature.c */ 38#include <xen/interface/version.h> /* to compile feature.c */
39#include <xen/features.h> /* to comiple xen-netfront.c */ 39#include <xen/features.h> /* to comiple xen-netfront.c */
40#include <xen/xen.h>
40#include <asm/xen/hypercall.h> 41#include <asm/xen/hypercall.h>
41 42
42/* xen_domain_type is set before executing any C code by early_xen_setup */
43enum xen_domain_type {
44 XEN_NATIVE, /* running on bare hardware */
45 XEN_PV_DOMAIN, /* running in a PV domain */
46 XEN_HVM_DOMAIN, /* running in a Xen hvm domain*/
47};
48
49#ifdef CONFIG_XEN
50extern enum xen_domain_type xen_domain_type;
51#else
52#define xen_domain_type XEN_NATIVE
53#endif
54
55#define xen_domain() (xen_domain_type != XEN_NATIVE)
56#define xen_pv_domain() (xen_domain() && \
57 xen_domain_type == XEN_PV_DOMAIN)
58#define xen_hvm_domain() (xen_domain() && \
59 xen_domain_type == XEN_HVM_DOMAIN)
60
61#ifdef CONFIG_XEN_DOM0
62#define xen_initial_domain() (xen_pv_domain() && \
63 (xen_start_info->flags & SIF_INITDOMAIN))
64#else
65#define xen_initial_domain() (0)
66#endif
67
68
69#ifdef CONFIG_XEN 43#ifdef CONFIG_XEN
70extern struct shared_info *HYPERVISOR_shared_info; 44extern struct shared_info *HYPERVISOR_shared_info;
71extern struct start_info *xen_start_info; 45extern struct start_info *xen_start_info;
diff --git a/arch/ia64/kernel/esi.c b/arch/ia64/kernel/esi.c
index d5764a3d74af..b091111270cb 100644
--- a/arch/ia64/kernel/esi.c
+++ b/arch/ia64/kernel/esi.c
@@ -84,7 +84,7 @@ static int __init esi_init (void)
84 case ESI_DESC_ENTRY_POINT: 84 case ESI_DESC_ENTRY_POINT:
85 break; 85 break;
86 default: 86 default:
87 printk(KERN_WARNING "Unkown table type %d found in " 87 printk(KERN_WARNING "Unknown table type %d found in "
88 "ESI table, ignoring rest of table\n", *p); 88 "ESI table, ignoring rest of table\n", *p);
89 return -ENODEV; 89 return -ENODEV;
90 } 90 }
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 402698b6689f..599b233bef75 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -3517,7 +3517,7 @@ pfm_use_debug_registers(struct task_struct *task)
3517 * IA64_THREAD_DBG_VALID set. This indicates a task which was 3517 * IA64_THREAD_DBG_VALID set. This indicates a task which was
3518 * able to use the debug registers for debugging purposes via 3518 * able to use the debug registers for debugging purposes via
3519 * ptrace(). Therefore we know it was not using them for 3519 * ptrace(). Therefore we know it was not using them for
3520 * perfmormance monitoring, so we only decrement the number 3520 * performance monitoring, so we only decrement the number
3521 * of "ptraced" debug register users to keep the count up to date 3521 * of "ptraced" debug register users to keep the count up to date
3522 */ 3522 */
3523int 3523int
diff --git a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c
index 92ed83f34036..609d50056a6c 100644
--- a/arch/ia64/kernel/sys_ia64.c
+++ b/arch/ia64/kernel/sys_ia64.c
@@ -100,51 +100,7 @@ sys_getpagesize (void)
100asmlinkage unsigned long 100asmlinkage unsigned long
101ia64_brk (unsigned long brk) 101ia64_brk (unsigned long brk)
102{ 102{
103 unsigned long rlim, retval, newbrk, oldbrk; 103 unsigned long retval = sys_brk(brk);
104 struct mm_struct *mm = current->mm;
105
106 /*
107 * Most of this replicates the code in sys_brk() except for an additional safety
108 * check and the clearing of r8. However, we can't call sys_brk() because we need
109 * to acquire the mmap_sem before we can do the test...
110 */
111 down_write(&mm->mmap_sem);
112
113 if (brk < mm->end_code)
114 goto out;
115 newbrk = PAGE_ALIGN(brk);
116 oldbrk = PAGE_ALIGN(mm->brk);
117 if (oldbrk == newbrk)
118 goto set_brk;
119
120 /* Always allow shrinking brk. */
121 if (brk <= mm->brk) {
122 if (!do_munmap(mm, newbrk, oldbrk-newbrk))
123 goto set_brk;
124 goto out;
125 }
126
127 /* Check against unimplemented/unmapped addresses: */
128 if ((newbrk - oldbrk) > RGN_MAP_LIMIT || REGION_OFFSET(newbrk) > RGN_MAP_LIMIT)
129 goto out;
130
131 /* Check against rlimit.. */
132 rlim = current->signal->rlim[RLIMIT_DATA].rlim_cur;
133 if (rlim < RLIM_INFINITY && brk - mm->start_data > rlim)
134 goto out;
135
136 /* Check against existing mmap mappings. */
137 if (find_vma_intersection(mm, oldbrk, newbrk+PAGE_SIZE))
138 goto out;
139
140 /* Ok, looks good - let it rip. */
141 if (do_brk(oldbrk, newbrk-oldbrk) != oldbrk)
142 goto out;
143set_brk:
144 mm->brk = brk;
145out:
146 retval = mm->brk;
147 up_write(&mm->mmap_sem);
148 force_successful_syscall_return(); 104 force_successful_syscall_return();
149 return retval; 105 return retval;
150} 106}
@@ -185,39 +141,6 @@ int ia64_mmap_check(unsigned long addr, unsigned long len,
185 return 0; 141 return 0;
186} 142}
187 143
188static inline unsigned long
189do_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, unsigned long pgoff)
190{
191 struct file *file = NULL;
192
193 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
194 if (!(flags & MAP_ANONYMOUS)) {
195 file = fget(fd);
196 if (!file)
197 return -EBADF;
198
199 if (!file->f_op || !file->f_op->mmap) {
200 addr = -ENODEV;
201 goto out;
202 }
203 }
204
205 /* Careful about overflows.. */
206 len = PAGE_ALIGN(len);
207 if (!len || len > TASK_SIZE) {
208 addr = -EINVAL;
209 goto out;
210 }
211
212 down_write(&current->mm->mmap_sem);
213 addr = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
214 up_write(&current->mm->mmap_sem);
215
216out: if (file)
217 fput(file);
218 return addr;
219}
220
221/* 144/*
222 * mmap2() is like mmap() except that the offset is expressed in units 145 * mmap2() is like mmap() except that the offset is expressed in units
223 * of PAGE_SIZE (instead of bytes). This allows to mmap2() (pieces 146 * of PAGE_SIZE (instead of bytes). This allows to mmap2() (pieces
@@ -226,7 +149,7 @@ out: if (file)
226asmlinkage unsigned long 149asmlinkage unsigned long
227sys_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, long pgoff) 150sys_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, long pgoff)
228{ 151{
229 addr = do_mmap2(addr, len, prot, flags, fd, pgoff); 152 addr = sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
230 if (!IS_ERR((void *) addr)) 153 if (!IS_ERR((void *) addr))
231 force_successful_syscall_return(); 154 force_successful_syscall_return();
232 return addr; 155 return addr;
@@ -238,7 +161,7 @@ sys_mmap (unsigned long addr, unsigned long len, int prot, int flags, int fd, lo
238 if (offset_in_page(off) != 0) 161 if (offset_in_page(off) != 0)
239 return -EINVAL; 162 return -EINVAL;
240 163
241 addr = do_mmap2(addr, len, prot, flags, fd, off >> PAGE_SHIFT); 164 addr = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
242 if (!IS_ERR((void *) addr)) 165 if (!IS_ERR((void *) addr))
243 force_successful_syscall_return(); 166 force_successful_syscall_return();
244 return addr; 167 return addr;
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 4990495d7531..a35c661e5e89 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -473,7 +473,7 @@ void update_vsyscall_tz(void)
473{ 473{
474} 474}
475 475
476void update_vsyscall(struct timespec *wall, struct clocksource *c) 476void update_vsyscall(struct timespec *wall, struct clocksource *c, u32 mult)
477{ 477{
478 unsigned long flags; 478 unsigned long flags;
479 479
@@ -481,7 +481,7 @@ void update_vsyscall(struct timespec *wall, struct clocksource *c)
481 481
482 /* copy fsyscall clock data */ 482 /* copy fsyscall clock data */
483 fsyscall_gtod_data.clk_mask = c->mask; 483 fsyscall_gtod_data.clk_mask = c->mask;
484 fsyscall_gtod_data.clk_mult = c->mult; 484 fsyscall_gtod_data.clk_mult = mult;
485 fsyscall_gtod_data.clk_shift = c->shift; 485 fsyscall_gtod_data.clk_shift = c->shift;
486 fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio; 486 fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio;
487 fsyscall_gtod_data.clk_cycle_last = c->cycle_last; 487 fsyscall_gtod_data.clk_cycle_last = c->cycle_last;
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index c0fca2c1c858..df639db779f9 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -131,6 +131,7 @@ alloc_pci_controller (int seg)
131} 131}
132 132
133struct pci_root_info { 133struct pci_root_info {
134 struct acpi_device *bridge;
134 struct pci_controller *controller; 135 struct pci_controller *controller;
135 char *name; 136 char *name;
136}; 137};
@@ -297,9 +298,20 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
297 window->offset = offset; 298 window->offset = offset;
298 299
299 if (insert_resource(root, &window->resource)) { 300 if (insert_resource(root, &window->resource)) {
300 printk(KERN_ERR "alloc 0x%llx-0x%llx from %s for %s failed\n", 301 dev_err(&info->bridge->dev,
301 window->resource.start, window->resource.end, 302 "can't allocate host bridge window %pR\n",
302 root->name, info->name); 303 &window->resource);
304 } else {
305 if (offset)
306 dev_info(&info->bridge->dev, "host bridge window %pR "
307 "(PCI address [%#llx-%#llx])\n",
308 &window->resource,
309 window->resource.start - offset,
310 window->resource.end - offset);
311 else
312 dev_info(&info->bridge->dev,
313 "host bridge window %pR\n",
314 &window->resource);
303 } 315 }
304 316
305 return AE_OK; 317 return AE_OK;
@@ -319,8 +331,9 @@ pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl)
319 (res->end - res->start < 16)) 331 (res->end - res->start < 16))
320 continue; 332 continue;
321 if (j >= PCI_BUS_NUM_RESOURCES) { 333 if (j >= PCI_BUS_NUM_RESOURCES) {
322 printk("Ignoring range [%#llx-%#llx] (%lx)\n", 334 dev_warn(&bus->dev,
323 res->start, res->end, res->flags); 335 "ignoring host bridge window %pR (no space)\n",
336 res);
324 continue; 337 continue;
325 } 338 }
326 bus->resource[j++] = res; 339 bus->resource[j++] = res;
@@ -364,6 +377,7 @@ pci_acpi_scan_root(struct acpi_device *device, int domain, int bus)
364 goto out3; 377 goto out3;
365 378
366 sprintf(name, "PCI Bus %04x:%02x", domain, bus); 379 sprintf(name, "PCI Bus %04x:%02x", domain, bus);
380 info.bridge = device;
367 info.controller = controller; 381 info.controller = controller;
368 info.name = name; 382 info.name = name;
369 acpi_walk_resources(device->handle, METHOD_NAME__CRS, 383 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
@@ -720,9 +734,6 @@ int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
720 return ret; 734 return ret;
721} 735}
722 736
723/* It's defined in drivers/pci/pci.c */
724extern u8 pci_cache_line_size;
725
726/** 737/**
727 * set_pci_cacheline_size - determine cacheline size for PCI devices 738 * set_pci_cacheline_size - determine cacheline size for PCI devices
728 * 739 *
@@ -731,7 +742,7 @@ extern u8 pci_cache_line_size;
731 * 742 *
732 * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info(). 743 * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info().
733 */ 744 */
734static void __init set_pci_cacheline_size(void) 745static void __init set_pci_dfl_cacheline_size(void)
735{ 746{
736 unsigned long levels, unique_caches; 747 unsigned long levels, unique_caches;
737 long status; 748 long status;
@@ -751,7 +762,7 @@ static void __init set_pci_cacheline_size(void)
751 "(status=%ld)\n", __func__, status); 762 "(status=%ld)\n", __func__, status);
752 return; 763 return;
753 } 764 }
754 pci_cache_line_size = (1 << cci.pcci_line_size) / 4; 765 pci_dfl_cache_line_size = (1 << cci.pcci_line_size) / 4;
755} 766}
756 767
757u64 ia64_dma_get_required_mask(struct device *dev) 768u64 ia64_dma_get_required_mask(struct device *dev)
@@ -782,7 +793,7 @@ EXPORT_SYMBOL_GPL(dma_get_required_mask);
782 793
783static int __init pcibios_init(void) 794static int __init pcibios_init(void)
784{ 795{
785 set_pci_cacheline_size(); 796 set_pci_dfl_cacheline_size();
786 return 0; 797 return 0;
787} 798}
788 799
diff --git a/arch/ia64/sn/kernel/io_acpi_init.c b/arch/ia64/sn/kernel/io_acpi_init.c
index fd50ff94302b..66f633bff059 100644
--- a/arch/ia64/sn/kernel/io_acpi_init.c
+++ b/arch/ia64/sn/kernel/io_acpi_init.c
@@ -390,7 +390,7 @@ sn_acpi_get_pcidev_info(struct pci_dev *dev, struct pcidev_info **pcidev_info,
390 pcidev_match.handle = NULL; 390 pcidev_match.handle = NULL;
391 391
392 acpi_walk_namespace(ACPI_TYPE_DEVICE, rootbus_handle, ACPI_UINT32_MAX, 392 acpi_walk_namespace(ACPI_TYPE_DEVICE, rootbus_handle, ACPI_UINT32_MAX,
393 find_matching_device, &pcidev_match, NULL); 393 find_matching_device, NULL, &pcidev_match, NULL);
394 394
395 if (!pcidev_match.handle) { 395 if (!pcidev_match.handle) {
396 printk(KERN_ERR 396 printk(KERN_ERR
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index 305ac852bbed..d3c865c5a6ba 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,30 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
76 return oldval; 76 return oldval;
77} 77}
78 78
79asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
80 unsigned long prot, unsigned long flags,
81 unsigned long fd, unsigned long pgoff)
82{
83 int error = -EBADF;
84 struct file *file = NULL;
85
86 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
87 if (!(flags & MAP_ANONYMOUS)) {
88 file = fget(fd);
89 if (!file)
90 goto out;
91 }
92
93 down_write(&current->mm->mmap_sem);
94 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
95 up_write(&current->mm->mmap_sem);
96
97 if (file)
98 fput(file);
99out:
100 return error;
101}
102
103/* 79/*
104 * sys_ipc() is the de-multiplexer for the SysV IPC calls.. 80 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
105 * 81 *
diff --git a/arch/m32r/kernel/syscall_table.S b/arch/m32r/kernel/syscall_table.S
index aa3bf4cfab37..60536e271233 100644
--- a/arch/m32r/kernel/syscall_table.S
+++ b/arch/m32r/kernel/syscall_table.S
@@ -191,7 +191,7 @@ ENTRY(sys_call_table)
191 .long sys_ni_syscall /* streams2 */ 191 .long sys_ni_syscall /* streams2 */
192 .long sys_vfork /* 190 */ 192 .long sys_vfork /* 190 */
193 .long sys_getrlimit 193 .long sys_getrlimit
194 .long sys_mmap2 194 .long sys_mmap_pgoff
195 .long sys_truncate64 195 .long sys_truncate64
196 .long sys_ftruncate64 196 .long sys_ftruncate64
197 .long sys_stat64 /* 195 */ 197 .long sys_stat64 /* 195 */
diff --git a/arch/m68k/ifpsp060/src/fpsp.S b/arch/m68k/ifpsp060/src/fpsp.S
index 6c1a9a217887..73613b5f1ee5 100644
--- a/arch/m68k/ifpsp060/src/fpsp.S
+++ b/arch/m68k/ifpsp060/src/fpsp.S
@@ -753,7 +753,7 @@ fovfl_ovfl_on:
753 753
754 bra.l _real_ovfl 754 bra.l _real_ovfl
755 755
756# overflow occurred but is disabled. meanwhile, inexact is enabled. therefore, 756# overflow occurred but is disabled. meanwhile, inexact is enabled. Therefore,
757# we must jump to real_inex(). 757# we must jump to real_inex().
758fovfl_inex_on: 758fovfl_inex_on:
759 759
@@ -1015,7 +1015,7 @@ funfl_unfl_on2:
1015 1015
1016 bra.l _real_unfl 1016 bra.l _real_unfl
1017 1017
1018# undeflow occurred but is disabled. meanwhile, inexact is enabled. therefore, 1018# underflow occurred but is disabled. meanwhile, inexact is enabled. Therefore,
1019# we must jump to real_inex(). 1019# we must jump to real_inex().
1020funfl_inex_on: 1020funfl_inex_on:
1021 1021
@@ -2963,7 +2963,7 @@ iea_disabled:
2963 2963
2964 tst.w %d0 # is instr fmovm? 2964 tst.w %d0 # is instr fmovm?
2965 bmi.b iea_dis_fmovm # yes 2965 bmi.b iea_dis_fmovm # yes
2966# instruction is using an extended precision immediate operand. therefore, 2966# instruction is using an extended precision immediate operand. Therefore,
2967# the total instruction length is 16 bytes. 2967# the total instruction length is 16 bytes.
2968iea_dis_immed: 2968iea_dis_immed:
2969 mov.l &0x10,%d0 # 16 bytes of instruction 2969 mov.l &0x10,%d0 # 16 bytes of instruction
@@ -9624,7 +9624,7 @@ sok_dnrm:
9624 bge.b sok_norm2 # thank goodness no 9624 bge.b sok_norm2 # thank goodness no
9625 9625
9626# the multiply factor that we're trying to create should be a denorm 9626# the multiply factor that we're trying to create should be a denorm
9627# for the multiply to work. therefore, we're going to actually do a 9627# for the multiply to work. Therefore, we're going to actually do a
9628# multiply with a denorm which will cause an unimplemented data type 9628# multiply with a denorm which will cause an unimplemented data type
9629# exception to be put into the machine which will be caught and corrected 9629# exception to be put into the machine which will be caught and corrected
9630# later. we don't do this with the DENORMs above because this method 9630# later. we don't do this with the DENORMs above because this method
@@ -12216,7 +12216,7 @@ fin_sd_unfl_dis:
12216 12216
12217# 12217#
12218# operand will underflow AND underflow or inexact is enabled. 12218# operand will underflow AND underflow or inexact is enabled.
12219# therefore, we must return the result rounded to extended precision. 12219# Therefore, we must return the result rounded to extended precision.
12220# 12220#
12221fin_sd_unfl_ena: 12221fin_sd_unfl_ena:
12222 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 12222 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -12746,7 +12746,7 @@ fdiv_zero_load_p:
12746 12746
12747# 12747#
12748# The destination was In Range and the source was a ZERO. The result, 12748# The destination was In Range and the source was a ZERO. The result,
12749# therefore, is an INF w/ the proper sign. 12749# Therefore, is an INF w/ the proper sign.
12750# So, determine the sign and return a new INF (w/ the j-bit cleared). 12750# So, determine the sign and return a new INF (w/ the j-bit cleared).
12751# 12751#
12752 global fdiv_inf_load # global for fsgldiv 12752 global fdiv_inf_load # global for fsgldiv
@@ -12996,7 +12996,7 @@ fneg_sd_unfl_dis:
12996 12996
12997# 12997#
12998# operand will underflow AND underflow is enabled. 12998# operand will underflow AND underflow is enabled.
12999# therefore, we must return the result rounded to extended precision. 12999# Therefore, we must return the result rounded to extended precision.
13000# 13000#
13001fneg_sd_unfl_ena: 13001fneg_sd_unfl_ena:
13002 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 13002 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -13611,7 +13611,7 @@ fabs_sd_unfl_dis:
13611 13611
13612# 13612#
13613# operand will underflow AND underflow is enabled. 13613# operand will underflow AND underflow is enabled.
13614# therefore, we must return the result rounded to extended precision. 13614# Therefore, we must return the result rounded to extended precision.
13615# 13615#
13616fabs_sd_unfl_ena: 13616fabs_sd_unfl_ena:
13617 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 13617 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -14973,7 +14973,7 @@ fadd_zero_2:
14973 14973
14974# 14974#
14975# the ZEROes have opposite signs: 14975# the ZEROes have opposite signs:
14976# - therefore, we return +ZERO if the rounding modes are RN,RZ, or RP. 14976# - Therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
14977# - -ZERO is returned in the case of RM. 14977# - -ZERO is returned in the case of RM.
14978# 14978#
14979fadd_zero_2_chk_rm: 14979fadd_zero_2_chk_rm:
@@ -15425,7 +15425,7 @@ fsub_zero_2:
15425 15425
15426# 15426#
15427# the ZEROes have the same signs: 15427# the ZEROes have the same signs:
15428# - therefore, we return +ZERO if the rounding mode is RN,RZ, or RP 15428# - Therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
15429# - -ZERO is returned in the case of RM. 15429# - -ZERO is returned in the case of RM.
15430# 15430#
15431fsub_zero_2_chk_rm: 15431fsub_zero_2_chk_rm:
@@ -15693,7 +15693,7 @@ fsqrt_sd_unfl_dis:
15693 15693
15694# 15694#
15695# operand will underflow AND underflow is enabled. 15695# operand will underflow AND underflow is enabled.
15696# therefore, we must return the result rounded to extended precision. 15696# Therefore, we must return the result rounded to extended precision.
15697# 15697#
15698fsqrt_sd_unfl_ena: 15698fsqrt_sd_unfl_ena:
15699 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 15699 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -21000,7 +21000,7 @@ fout_pack_type:
21000 tst.l %d0 21000 tst.l %d0
21001 bne.b fout_pack_set 21001 bne.b fout_pack_set
21002# "mantissa" is all zero which means that the answer is zero. but, the '040 21002# "mantissa" is all zero which means that the answer is zero. but, the '040
21003# algorithm allows the exponent to be non-zero. the 881/2 do not. therefore, 21003# algorithm allows the exponent to be non-zero. the 881/2 do not. Therefore,
21004# if the mantissa is zero, I will zero the exponent, too. 21004# if the mantissa is zero, I will zero the exponent, too.
21005# the question now is whether the exponents sign bit is allowed to be non-zero 21005# the question now is whether the exponents sign bit is allowed to be non-zero
21006# for a zero, also... 21006# for a zero, also...
@@ -21743,7 +21743,7 @@ denorm_set_stky:
21743 rts 21743 rts
21744 21744
21745# # 21745# #
21746# dnrm_lp(): normalize exponent/mantissa to specified threshhold # 21746# dnrm_lp(): normalize exponent/mantissa to specified threshold #
21747# # 21747# #
21748# INPUT: # 21748# INPUT: #
21749# %a0 : points to the operand to be denormalized # 21749# %a0 : points to the operand to be denormalized #
@@ -22402,7 +22402,7 @@ unnorm_shift:
22402 bgt.b unnorm_nrm_zero # yes; denorm only until exp = 0 22402 bgt.b unnorm_nrm_zero # yes; denorm only until exp = 0
22403 22403
22404# 22404#
22405# exponent would not go < 0. therefore, number stays normalized 22405# exponent would not go < 0. Therefore, number stays normalized
22406# 22406#
22407 sub.w %d0, %d1 # shift exponent value 22407 sub.w %d0, %d1 # shift exponent value
22408 mov.w FTEMP_EX(%a0), %d0 # load old exponent 22408 mov.w FTEMP_EX(%a0), %d0 # load old exponent
diff --git a/arch/m68k/ifpsp060/src/pfpsp.S b/arch/m68k/ifpsp060/src/pfpsp.S
index 51b9f7d879dd..e71ba0ab013c 100644
--- a/arch/m68k/ifpsp060/src/pfpsp.S
+++ b/arch/m68k/ifpsp060/src/pfpsp.S
@@ -752,7 +752,7 @@ fovfl_ovfl_on:
752 752
753 bra.l _real_ovfl 753 bra.l _real_ovfl
754 754
755# overflow occurred but is disabled. meanwhile, inexact is enabled. therefore, 755# overflow occurred but is disabled. meanwhile, inexact is enabled. Therefore,
756# we must jump to real_inex(). 756# we must jump to real_inex().
757fovfl_inex_on: 757fovfl_inex_on:
758 758
@@ -1014,7 +1014,7 @@ funfl_unfl_on2:
1014 1014
1015 bra.l _real_unfl 1015 bra.l _real_unfl
1016 1016
1017# undeflow occurred but is disabled. meanwhile, inexact is enabled. therefore, 1017# underflow occurred but is disabled. meanwhile, inexact is enabled. Therefore,
1018# we must jump to real_inex(). 1018# we must jump to real_inex().
1019funfl_inex_on: 1019funfl_inex_on:
1020 1020
@@ -2962,7 +2962,7 @@ iea_disabled:
2962 2962
2963 tst.w %d0 # is instr fmovm? 2963 tst.w %d0 # is instr fmovm?
2964 bmi.b iea_dis_fmovm # yes 2964 bmi.b iea_dis_fmovm # yes
2965# instruction is using an extended precision immediate operand. therefore, 2965# instruction is using an extended precision immediate operand. Therefore,
2966# the total instruction length is 16 bytes. 2966# the total instruction length is 16 bytes.
2967iea_dis_immed: 2967iea_dis_immed:
2968 mov.l &0x10,%d0 # 16 bytes of instruction 2968 mov.l &0x10,%d0 # 16 bytes of instruction
@@ -5865,7 +5865,7 @@ denorm_set_stky:
5865 rts 5865 rts
5866 5866
5867# # 5867# #
5868# dnrm_lp(): normalize exponent/mantissa to specified threshhold # 5868# dnrm_lp(): normalize exponent/mantissa to specified threshold #
5869# # 5869# #
5870# INPUT: # 5870# INPUT: #
5871# %a0 : points to the operand to be denormalized # 5871# %a0 : points to the operand to be denormalized #
@@ -6524,7 +6524,7 @@ unnorm_shift:
6524 bgt.b unnorm_nrm_zero # yes; denorm only until exp = 0 6524 bgt.b unnorm_nrm_zero # yes; denorm only until exp = 0
6525 6525
6526# 6526#
6527# exponent would not go < 0. therefore, number stays normalized 6527# exponent would not go < 0. Therefore, number stays normalized
6528# 6528#
6529 sub.w %d0, %d1 # shift exponent value 6529 sub.w %d0, %d1 # shift exponent value
6530 mov.w FTEMP_EX(%a0), %d0 # load old exponent 6530 mov.w FTEMP_EX(%a0), %d0 # load old exponent
@@ -7901,7 +7901,7 @@ fout_pack_type:
7901 tst.l %d0 7901 tst.l %d0
7902 bne.b fout_pack_set 7902 bne.b fout_pack_set
7903# "mantissa" is all zero which means that the answer is zero. but, the '040 7903# "mantissa" is all zero which means that the answer is zero. but, the '040
7904# algorithm allows the exponent to be non-zero. the 881/2 do not. therefore, 7904# algorithm allows the exponent to be non-zero. the 881/2 do not. Therefore,
7905# if the mantissa is zero, I will zero the exponent, too. 7905# if the mantissa is zero, I will zero the exponent, too.
7906# the question now is whether the exponents sign bit is allowed to be non-zero 7906# the question now is whether the exponents sign bit is allowed to be non-zero
7907# for a zero, also... 7907# for a zero, also...
@@ -8647,7 +8647,7 @@ fin_sd_unfl_dis:
8647 8647
8648# 8648#
8649# operand will underflow AND underflow or inexact is enabled. 8649# operand will underflow AND underflow or inexact is enabled.
8650# therefore, we must return the result rounded to extended precision. 8650# Therefore, we must return the result rounded to extended precision.
8651# 8651#
8652fin_sd_unfl_ena: 8652fin_sd_unfl_ena:
8653 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 8653 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -9177,7 +9177,7 @@ fdiv_zero_load_p:
9177 9177
9178# 9178#
9179# The destination was In Range and the source was a ZERO. The result, 9179# The destination was In Range and the source was a ZERO. The result,
9180# therefore, is an INF w/ the proper sign. 9180# Therefore, is an INF w/ the proper sign.
9181# So, determine the sign and return a new INF (w/ the j-bit cleared). 9181# So, determine the sign and return a new INF (w/ the j-bit cleared).
9182# 9182#
9183 global fdiv_inf_load # global for fsgldiv 9183 global fdiv_inf_load # global for fsgldiv
@@ -9427,7 +9427,7 @@ fneg_sd_unfl_dis:
9427 9427
9428# 9428#
9429# operand will underflow AND underflow is enabled. 9429# operand will underflow AND underflow is enabled.
9430# therefore, we must return the result rounded to extended precision. 9430# Therefore, we must return the result rounded to extended precision.
9431# 9431#
9432fneg_sd_unfl_ena: 9432fneg_sd_unfl_ena:
9433 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 9433 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -10042,7 +10042,7 @@ fabs_sd_unfl_dis:
10042 10042
10043# 10043#
10044# operand will underflow AND underflow is enabled. 10044# operand will underflow AND underflow is enabled.
10045# therefore, we must return the result rounded to extended precision. 10045# Therefore, we must return the result rounded to extended precision.
10046# 10046#
10047fabs_sd_unfl_ena: 10047fabs_sd_unfl_ena:
10048 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 10048 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -11404,7 +11404,7 @@ fadd_zero_2:
11404 11404
11405# 11405#
11406# the ZEROes have opposite signs: 11406# the ZEROes have opposite signs:
11407# - therefore, we return +ZERO if the rounding modes are RN,RZ, or RP. 11407# - Therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
11408# - -ZERO is returned in the case of RM. 11408# - -ZERO is returned in the case of RM.
11409# 11409#
11410fadd_zero_2_chk_rm: 11410fadd_zero_2_chk_rm:
@@ -11856,7 +11856,7 @@ fsub_zero_2:
11856 11856
11857# 11857#
11858# the ZEROes have the same signs: 11858# the ZEROes have the same signs:
11859# - therefore, we return +ZERO if the rounding mode is RN,RZ, or RP 11859# - Therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
11860# - -ZERO is returned in the case of RM. 11860# - -ZERO is returned in the case of RM.
11861# 11861#
11862fsub_zero_2_chk_rm: 11862fsub_zero_2_chk_rm:
@@ -12124,7 +12124,7 @@ fsqrt_sd_unfl_dis:
12124 12124
12125# 12125#
12126# operand will underflow AND underflow is enabled. 12126# operand will underflow AND underflow is enabled.
12127# therefore, we must return the result rounded to extended precision. 12127# Therefore, we must return the result rounded to extended precision.
12128# 12128#
12129fsqrt_sd_unfl_ena: 12129fsqrt_sd_unfl_ena:
12130 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 12130 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
diff --git a/arch/m68k/include/asm/bootinfo.h b/arch/m68k/include/asm/bootinfo.h
index fb8a06b9ab6a..67e7a78ad96b 100644
--- a/arch/m68k/include/asm/bootinfo.h
+++ b/arch/m68k/include/asm/bootinfo.h
@@ -145,7 +145,7 @@ struct bi_record {
145 145
146 /* 146 /*
147 * Macintosh hardware profile data - unused, see macintosh.h for 147 * Macintosh hardware profile data - unused, see macintosh.h for
148 * resonable type values 148 * reasonable type values
149 */ 149 */
150 150
151#define BI_MAC_VIA1BASE 0x8010 /* Mac VIA1 base address (always present) */ 151#define BI_MAC_VIA1BASE 0x8010 /* Mac VIA1 base address (always present) */
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index 74fd674b15ad..cbd3d4751dd2 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -165,6 +165,8 @@ unsigned long get_wchan(struct task_struct *p);
165 eip; }) 165 eip; })
166#define KSTK_ESP(tsk) ((tsk) == current ? rdusp() : (tsk)->thread.usp) 166#define KSTK_ESP(tsk) ((tsk) == current ? rdusp() : (tsk)->thread.usp)
167 167
168#define task_pt_regs(tsk) ((struct pt_regs *) ((tsk)->thread.esp0))
169
168#define cpu_relax() barrier() 170#define cpu_relax() barrier()
169 171
170#endif 172#endif
diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h
index a6ab663bcc2e..ee4011c23281 100644
--- a/arch/m68k/include/asm/ptrace.h
+++ b/arch/m68k/include/asm/ptrace.h
@@ -86,7 +86,7 @@ struct switch_stack {
86extern void show_regs(struct pt_regs *); 86extern void show_regs(struct pt_regs *);
87 87
88/* 88/*
89 * These are defined as per linux/ptrace.h, which see. 89 * These are defined as per linux/ptrace.h.
90 */ 90 */
91struct task_struct; 91struct task_struct;
92 92
diff --git a/arch/m68k/include/asm/thread_info_no.h b/arch/m68k/include/asm/thread_info_no.h
index c2bde5e24b0b..a6512bfdd01d 100644
--- a/arch/m68k/include/asm/thread_info_no.h
+++ b/arch/m68k/include/asm/thread_info_no.h
@@ -12,8 +12,6 @@
12 12
13#ifdef __KERNEL__ 13#ifdef __KERNEL__
14 14
15#ifndef __ASSEMBLY__
16
17/* 15/*
18 * Size of kernel stack for each process. This must be a power of 2... 16 * Size of kernel stack for each process. This must be a power of 2...
19 */ 17 */
@@ -28,6 +26,8 @@
28 */ 26 */
29#define THREAD_SIZE (PAGE_SIZE<<THREAD_SIZE_ORDER) 27#define THREAD_SIZE (PAGE_SIZE<<THREAD_SIZE_ORDER)
30 28
29#ifndef __ASSEMBLY__
30
31/* 31/*
32 * low level task data. 32 * low level task data.
33 */ 33 */
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index 7deb402bfc75..218f441de667 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -29,37 +29,16 @@
29#include <asm/page.h> 29#include <asm/page.h>
30#include <asm/unistd.h> 30#include <asm/unistd.h>
31 31
32/* common code for old and new mmaps */
33static inline long do_mmap2(
34 unsigned long addr, unsigned long len,
35 unsigned long prot, unsigned long flags,
36 unsigned long fd, unsigned long pgoff)
37{
38 int error = -EBADF;
39 struct file * file = NULL;
40
41 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
42 if (!(flags & MAP_ANONYMOUS)) {
43 file = fget(fd);
44 if (!file)
45 goto out;
46 }
47
48 down_write(&current->mm->mmap_sem);
49 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
50 up_write(&current->mm->mmap_sem);
51
52 if (file)
53 fput(file);
54out:
55 return error;
56}
57
58asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 32asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
59 unsigned long prot, unsigned long flags, 33 unsigned long prot, unsigned long flags,
60 unsigned long fd, unsigned long pgoff) 34 unsigned long fd, unsigned long pgoff)
61{ 35{
62 return do_mmap2(addr, len, prot, flags, fd, pgoff); 36 /*
37 * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
38 * so we need to shift the argument down by 1; m68k mmap64(3)
39 * (in libc) expects the last argument of mmap2 in 4Kb units.
40 */
41 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
63} 42}
64 43
65/* 44/*
@@ -90,57 +69,11 @@ asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
90 if (a.offset & ~PAGE_MASK) 69 if (a.offset & ~PAGE_MASK)
91 goto out; 70 goto out;
92 71
93 a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); 72 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
94 73 a.offset >> PAGE_SHIFT);
95 error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
96out:
97 return error;
98}
99
100#if 0
101struct mmap_arg_struct64 {
102 __u32 addr;
103 __u32 len;
104 __u32 prot;
105 __u32 flags;
106 __u64 offset; /* 64 bits */
107 __u32 fd;
108};
109
110asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg)
111{
112 int error = -EFAULT;
113 struct file * file = NULL;
114 struct mmap_arg_struct64 a;
115 unsigned long pgoff;
116
117 if (copy_from_user(&a, arg, sizeof(a)))
118 return -EFAULT;
119
120 if ((long)a.offset & ~PAGE_MASK)
121 return -EINVAL;
122
123 pgoff = a.offset >> PAGE_SHIFT;
124 if ((a.offset >> PAGE_SHIFT) != pgoff)
125 return -EINVAL;
126
127 if (!(a.flags & MAP_ANONYMOUS)) {
128 error = -EBADF;
129 file = fget(a.fd);
130 if (!file)
131 goto out;
132 }
133 a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
134
135 down_write(&current->mm->mmap_sem);
136 error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff);
137 up_write(&current->mm->mmap_sem);
138 if (file)
139 fput(file);
140out: 74out:
141 return error; 75 return error;
142} 76}
143#endif
144 77
145struct sel_arg_struct { 78struct sel_arg_struct {
146 unsigned long n; 79 unsigned long n;
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index e2201b90aa22..064f5913db1a 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -533,6 +533,13 @@ config AVNET
533 default y 533 default y
534 depends on (AVNET5282) 534 depends on (AVNET5282)
535 535
536config UBOOT
537 bool "Support for U-Boot command line parameters"
538 help
539 If you say Y here kernel will try to collect command
540 line parameters from the initial u-boot stack.
541 default n
542
536config 4KSTACKS 543config 4KSTACKS
537 bool "Use 4Kb for kernel stacks instead of 8Kb" 544 bool "Use 4Kb for kernel stacks instead of 8Kb"
538 default y 545 default y
diff --git a/arch/m68knommu/kernel/process.c b/arch/m68knommu/kernel/process.c
index 8f8f4abab2ff..5c9ecd427090 100644
--- a/arch/m68knommu/kernel/process.c
+++ b/arch/m68knommu/kernel/process.c
@@ -352,15 +352,12 @@ asmlinkage int sys_execve(char *name, char **argv, char **envp)
352 char * filename; 352 char * filename;
353 struct pt_regs *regs = (struct pt_regs *) &name; 353 struct pt_regs *regs = (struct pt_regs *) &name;
354 354
355 lock_kernel();
356 filename = getname(name); 355 filename = getname(name);
357 error = PTR_ERR(filename); 356 error = PTR_ERR(filename);
358 if (IS_ERR(filename)) 357 if (IS_ERR(filename))
359 goto out; 358 return error;
360 error = do_execve(filename, argv, envp, regs); 359 error = do_execve(filename, argv, envp, regs);
361 putname(filename); 360 putname(filename);
362out:
363 unlock_kernel();
364 return error; 361 return error;
365} 362}
366 363
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c
index 5c2bb3eeaaa2..ba92b90d5fbc 100644
--- a/arch/m68knommu/kernel/setup.c
+++ b/arch/m68knommu/kernel/setup.c
@@ -29,6 +29,8 @@
29#include <linux/bootmem.h> 29#include <linux/bootmem.h>
30#include <linux/seq_file.h> 30#include <linux/seq_file.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/initrd.h>
33#include <linux/root_dev.h>
32 34
33#include <asm/setup.h> 35#include <asm/setup.h>
34#include <asm/irq.h> 36#include <asm/irq.h>
@@ -52,7 +54,6 @@ void (*mach_reset)(void);
52void (*mach_halt)(void); 54void (*mach_halt)(void);
53void (*mach_power_off)(void); 55void (*mach_power_off)(void);
54 56
55
56#ifdef CONFIG_M68000 57#ifdef CONFIG_M68000
57 #define CPU "MC68000" 58 #define CPU "MC68000"
58#endif 59#endif
@@ -111,6 +112,69 @@ void (*mach_power_off)(void);
111extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end; 112extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
112extern int _ramstart, _ramend; 113extern int _ramstart, _ramend;
113 114
115#if defined(CONFIG_UBOOT)
116/*
117 * parse_uboot_commandline
118 *
119 * Copies u-boot commandline arguments and store them in the proper linux
120 * variables.
121 *
122 * Assumes:
123 * _init_sp global contains the address in the stack pointer when the
124 * kernel starts (see head.S::_start)
125 *
126 * U-Boot calling convention:
127 * (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
128 *
129 * _init_sp can be parsed as such
130 *
131 * _init_sp+00 = u-boot cmd after jsr into kernel (skip)
132 * _init_sp+04 = &kernel board_info (residual data)
133 * _init_sp+08 = &initrd_start
134 * _init_sp+12 = &initrd_end
135 * _init_sp+16 = &cmd_start
136 * _init_sp+20 = &cmd_end
137 *
138 * This also assumes that the memory locations pointed to are still
139 * unmodified. U-boot places them near the end of external SDRAM.
140 *
141 * Argument(s):
142 * commandp = the linux commandline arg container to fill.
143 * size = the sizeof commandp.
144 *
145 * Returns:
146 */
147void parse_uboot_commandline(char *commandp, int size)
148{
149 extern unsigned long _init_sp;
150 unsigned long *sp;
151 unsigned long uboot_kbd;
152 unsigned long uboot_initrd_start, uboot_initrd_end;
153 unsigned long uboot_cmd_start, uboot_cmd_end;
154
155
156 sp = (unsigned long *)_init_sp;
157 uboot_kbd = sp[1];
158 uboot_initrd_start = sp[2];
159 uboot_initrd_end = sp[3];
160 uboot_cmd_start = sp[4];
161 uboot_cmd_end = sp[5];
162
163 if (uboot_cmd_start && uboot_cmd_end)
164 strncpy(commandp, (const char *)uboot_cmd_start, size);
165#if defined(CONFIG_BLK_DEV_INITRD)
166 if (uboot_initrd_start && uboot_initrd_end &&
167 (uboot_initrd_end > uboot_initrd_start)) {
168 initrd_start = uboot_initrd_start;
169 initrd_end = uboot_initrd_end;
170 ROOT_DEV = Root_RAM0;
171 printk(KERN_INFO "initrd at 0x%lx:0x%lx\n",
172 initrd_start, initrd_end);
173 }
174#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
175}
176#endif /* #if defined(CONFIG_UBOOT) */
177
114void __init setup_arch(char **cmdline_p) 178void __init setup_arch(char **cmdline_p)
115{ 179{
116 int bootmap_size; 180 int bootmap_size;
@@ -128,7 +192,24 @@ void __init setup_arch(char **cmdline_p)
128#if defined(CONFIG_BOOTPARAM) 192#if defined(CONFIG_BOOTPARAM)
129 strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line)); 193 strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
130 command_line[sizeof(command_line) - 1] = 0; 194 command_line[sizeof(command_line) - 1] = 0;
131#endif 195#endif /* CONFIG_BOOTPARAM */
196
197#if defined(CONFIG_UBOOT)
198 /* CONFIG_UBOOT and CONFIG_BOOTPARAM defined, concatenate cmdline */
199 #if defined(CONFIG_BOOTPARAM)
200 /* Add the whitespace separator */
201 command_line[strlen(CONFIG_BOOTPARAM_STRING)] = ' ';
202 /* Parse uboot command line into the rest of the buffer */
203 parse_uboot_commandline(
204 &command_line[(strlen(CONFIG_BOOTPARAM_STRING)+1)],
205 (sizeof(command_line) -
206 (strlen(CONFIG_BOOTPARAM_STRING)+1)));
207 /* Only CONFIG_UBOOT defined, create cmdline */
208 #else
209 parse_uboot_commandline(&command_line[0], sizeof(command_line));
210 #endif /* CONFIG_BOOTPARAM */
211 command_line[sizeof(command_line) - 1] = 0;
212#endif /* CONFIG_UBOOT */
132 213
133 printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU "\n"); 214 printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU "\n");
134 215
@@ -204,6 +285,13 @@ void __init setup_arch(char **cmdline_p)
204 free_bootmem(memory_start, memory_end - memory_start); 285 free_bootmem(memory_start, memory_end - memory_start);
205 reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT); 286 reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT);
206 287
288#if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
289 if ((initrd_start > 0) && (initrd_start < initrd_end) &&
290 (initrd_end < memory_end))
291 reserve_bootmem(initrd_start, initrd_end - initrd_start,
292 BOOTMEM_DEFAULT);
293#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
294
207 /* 295 /*
208 * Get kmalloc into gear. 296 * Get kmalloc into gear.
209 */ 297 */
diff --git a/arch/m68knommu/kernel/sys_m68k.c b/arch/m68knommu/kernel/sys_m68k.c
index efdd090778a3..b67cbc735a9b 100644
--- a/arch/m68knommu/kernel/sys_m68k.c
+++ b/arch/m68knommu/kernel/sys_m68k.c
@@ -27,39 +27,6 @@
27#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
28#include <asm/unistd.h> 28#include <asm/unistd.h>
29 29
30/* common code for old and new mmaps */
31static inline long do_mmap2(
32 unsigned long addr, unsigned long len,
33 unsigned long prot, unsigned long flags,
34 unsigned long fd, unsigned long pgoff)
35{
36 int error = -EBADF;
37 struct file * file = NULL;
38
39 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
40 if (!(flags & MAP_ANONYMOUS)) {
41 file = fget(fd);
42 if (!file)
43 goto out;
44 }
45
46 down_write(&current->mm->mmap_sem);
47 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
48 up_write(&current->mm->mmap_sem);
49
50 if (file)
51 fput(file);
52out:
53 return error;
54}
55
56asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
57 unsigned long prot, unsigned long flags,
58 unsigned long fd, unsigned long pgoff)
59{
60 return do_mmap2(addr, len, prot, flags, fd, pgoff);
61}
62
63/* 30/*
64 * Perform the select(nd, in, out, ex, tv) and mmap() system 31 * Perform the select(nd, in, out, ex, tv) and mmap() system
65 * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to 32 * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
@@ -88,9 +55,8 @@ asmlinkage int old_mmap(struct mmap_arg_struct *arg)
88 if (a.offset & ~PAGE_MASK) 55 if (a.offset & ~PAGE_MASK)
89 goto out; 56 goto out;
90 57
91 a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); 58 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
92 59 a.offset >> PAGE_SHIFT);
93 error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
94out: 60out:
95 return error; 61 return error;
96} 62}
diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68knommu/kernel/syscalltable.S
index 23535cc415ae..486837efa3d7 100644
--- a/arch/m68knommu/kernel/syscalltable.S
+++ b/arch/m68knommu/kernel/syscalltable.S
@@ -210,7 +210,7 @@ ENTRY(sys_call_table)
210 .long sys_ni_syscall /* streams2 */ 210 .long sys_ni_syscall /* streams2 */
211 .long sys_vfork /* 190 */ 211 .long sys_vfork /* 190 */
212 .long sys_getrlimit 212 .long sys_getrlimit
213 .long sys_mmap2 213 .long sys_mmap_pgoff
214 .long sys_truncate64 214 .long sys_truncate64
215 .long sys_ftruncate64 215 .long sys_ftruncate64
216 .long sys_stat64 /* 195 */ 216 .long sys_stat64 /* 195 */
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index 2736a5e309c0..9f1784f586b9 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -8,6 +8,8 @@
8 */ 8 */
9 9
10#include <asm-generic/vmlinux.lds.h> 10#include <asm-generic/vmlinux.lds.h>
11#include <asm/page.h>
12#include <asm/thread_info.h>
11 13
12#if defined(CONFIG_RAMKERNEL) 14#if defined(CONFIG_RAMKERNEL)
13#define RAM_START CONFIG_KERNELBASE 15#define RAM_START CONFIG_KERNELBASE
@@ -15,7 +17,7 @@
15#define TEXT ram 17#define TEXT ram
16#define DATA ram 18#define DATA ram
17#define INIT ram 19#define INIT ram
18#define BSS ram 20#define BSSS ram
19#endif 21#endif
20#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL) 22#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
21#define RAM_START CONFIG_RAMBASE 23#define RAM_START CONFIG_RAMBASE
@@ -27,7 +29,7 @@
27#define TEXT rom 29#define TEXT rom
28#define DATA ram 30#define DATA ram
29#define INIT ram 31#define INIT ram
30#define BSS ram 32#define BSSS ram
31#endif 33#endif
32 34
33#ifndef DATA_ADDR 35#ifndef DATA_ADDR
@@ -147,40 +149,19 @@ SECTIONS {
147 . = ALIGN(4); 149 . = ALIGN(4);
148 _sdata = . ; 150 _sdata = . ;
149 DATA_DATA 151 DATA_DATA
150 . = ALIGN(32); 152 CACHELINE_ALIGNED_DATA(32)
151 *(.data.cacheline_aligned) 153 INIT_TASK_DATA(THREAD_SIZE)
152 . = ALIGN(8192) ;
153 *(.data.init_task)
154 _edata = . ; 154 _edata = . ;
155 } > DATA 155 } > DATA
156 156
157 .init : { 157 .init.text : {
158 . = ALIGN(4096); 158 . = ALIGN(PAGE_SIZE);
159 __init_begin = .; 159 __init_begin = .;
160 _sinittext = .; 160 } > INIT
161 INIT_TEXT 161 INIT_TEXT_SECTION(PAGE_SIZE) > INIT
162 _einittext = .; 162 INIT_DATA_SECTION(16) > INIT
163 INIT_DATA 163 .init.data : {
164 . = ALIGN(16); 164 . = ALIGN(PAGE_SIZE);
165 __setup_start = .;
166 *(.init.setup)
167 __setup_end = .;
168 __initcall_start = .;
169 INITCALLS
170 __initcall_end = .;
171 __con_initcall_start = .;
172 *(.con_initcall.init)
173 __con_initcall_end = .;
174 __security_initcall_start = .;
175 *(.security_initcall.init)
176 __security_initcall_end = .;
177#ifdef CONFIG_BLK_DEV_INITRD
178 . = ALIGN(4);
179 __initramfs_start = .;
180 *(.init.ramfs)
181 __initramfs_end = .;
182#endif
183 . = ALIGN(4096);
184 __init_end = .; 165 __init_end = .;
185 } > INIT 166 } > INIT
186 167
@@ -192,7 +173,7 @@ SECTIONS {
192 . = ALIGN(4) ; 173 . = ALIGN(4) ;
193 _ebss = . ; 174 _ebss = . ;
194 _end = . ; 175 _end = . ;
195 } > BSS 176 } > BSSS
196 177
197 DISCARDS 178 DISCARDS
198} 179}
diff --git a/arch/m68knommu/platform/523x/gpio.c b/arch/m68knommu/platform/523x/gpio.c
index f02840d54d3c..a8842dc27839 100644
--- a/arch/m68knommu/platform/523x/gpio.c
+++ b/arch/m68knommu/platform/523x/gpio.c
@@ -30,7 +30,8 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
30 .direction_output = mcf_gpio_direction_output, 30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value, 31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value, 32 .set = mcf_gpio_set_value,
33 .ngpio = 8, 33 .base = 1,
34 .ngpio = 7,
34 }, 35 },
35 .pddr = MCFEPORT_EPDDR, 36 .pddr = MCFEPORT_EPDDR,
36 .podr = MCFEPORT_EPDR, 37 .podr = MCFEPORT_EPDR,
@@ -244,7 +245,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
244 .get = mcf_gpio_get_value, 245 .get = mcf_gpio_get_value,
245 .set = mcf_gpio_set_value_fast, 246 .set = mcf_gpio_set_value_fast,
246 .base = 96, 247 .base = 96,
247 .ngpio = 4, 248 .ngpio = 8,
248 }, 249 },
249 .pddr = MCFGPIO_PDDR_TIMER, 250 .pddr = MCFGPIO_PDDR_TIMER,
250 .podr = MCFGPIO_PODR_TIMER, 251 .podr = MCFGPIO_PODR_TIMER,
diff --git a/arch/m68knommu/platform/527x/gpio.c b/arch/m68knommu/platform/527x/gpio.c
index 1028142851ac..0b56e19db0f8 100644
--- a/arch/m68knommu/platform/527x/gpio.c
+++ b/arch/m68knommu/platform/527x/gpio.c
@@ -31,7 +31,8 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
31 .direction_output = mcf_gpio_direction_output, 31 .direction_output = mcf_gpio_direction_output,
32 .get = mcf_gpio_get_value, 32 .get = mcf_gpio_get_value,
33 .set = mcf_gpio_set_value, 33 .set = mcf_gpio_set_value,
34 .ngpio = 8, 34 .base = 1,
35 .ngpio = 7,
35 }, 36 },
36 .pddr = MCFEPORT_EPDDR, 37 .pddr = MCFEPORT_EPDDR,
37 .podr = MCFEPORT_EPDR, 38 .podr = MCFEPORT_EPDR,
@@ -263,7 +264,8 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
263 .direction_output = mcf_gpio_direction_output, 264 .direction_output = mcf_gpio_direction_output,
264 .get = mcf_gpio_get_value, 265 .get = mcf_gpio_get_value,
265 .set = mcf_gpio_set_value, 266 .set = mcf_gpio_set_value,
266 .ngpio = 8, 267 .base = 1,
268 .ngpio = 7,
267 }, 269 },
268 .pddr = MCFEPORT_EPDDR, 270 .pddr = MCFEPORT_EPDDR,
269 .podr = MCFEPORT_EPDR, 271 .podr = MCFEPORT_EPDR,
diff --git a/arch/m68knommu/platform/528x/gpio.c b/arch/m68knommu/platform/528x/gpio.c
index ec593950696a..eedaf0adbcd7 100644
--- a/arch/m68knommu/platform/528x/gpio.c
+++ b/arch/m68knommu/platform/528x/gpio.c
@@ -31,7 +31,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
31 .get = mcf_gpio_get_value, 31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value, 32 .set = mcf_gpio_set_value,
33 .base = 1, 33 .base = 1,
34 .ngpio = 8, 34 .ngpio = 7,
35 }, 35 },
36 .pddr = MCFEPORT_EPDDR, 36 .pddr = MCFEPORT_EPDDR,
37 .podr = MCFEPORT_EPDR, 37 .podr = MCFEPORT_EPDR,
diff --git a/arch/m68knommu/platform/coldfire/clk.c b/arch/m68knommu/platform/coldfire/clk.c
index 7cdbf445b28f..9f1260c5e2ad 100644
--- a/arch/m68knommu/platform/coldfire/clk.c
+++ b/arch/m68knommu/platform/coldfire/clk.c
@@ -9,6 +9,7 @@
9/***************************************************************************/ 9/***************************************************************************/
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/module.h>
12#include <linux/clk.h> 13#include <linux/clk.h>
13#include <asm/coldfire.h> 14#include <asm/coldfire.h>
14 15
@@ -18,23 +19,27 @@ struct clk *clk_get(struct device *dev, const char *id)
18{ 19{
19 return NULL; 20 return NULL;
20} 21}
22EXPORT_SYMBOL(clk_get);
21 23
22int clk_enable(struct clk *clk) 24int clk_enable(struct clk *clk)
23{ 25{
24 return 0; 26 return 0;
25} 27}
28EXPORT_SYMBOL(clk_enable);
26 29
27void clk_disable(struct clk *clk) 30void clk_disable(struct clk *clk)
28{ 31{
29} 32}
33EXPORT_SYMBOL(clk_disable);
30 34
31void clk_put(struct clk *clk) 35void clk_put(struct clk *clk)
32{ 36{
33} 37}
38EXPORT_SYMBOL(clk_put);
34 39
35unsigned long clk_get_rate(struct clk *clk) 40unsigned long clk_get_rate(struct clk *clk)
36{ 41{
37 return MCF_CLK; 42 return MCF_CLK;
38} 43}
39 44EXPORT_SYMBOL(clk_get_rate);
40/***************************************************************************/ 45/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S
index 2b0d73c0cc32..4b91aa24eb00 100644
--- a/arch/m68knommu/platform/coldfire/head.S
+++ b/arch/m68knommu/platform/coldfire/head.S
@@ -106,6 +106,9 @@
106.global _ramvec 106.global _ramvec
107.global _ramstart 107.global _ramstart
108.global _ramend 108.global _ramend
109#if defined(CONFIG_UBOOT)
110.global _init_sp
111#endif
109 112
110/*****************************************************************************/ 113/*****************************************************************************/
111 114
@@ -124,6 +127,10 @@ _ramstart:
124.long 0 127.long 0
125_ramend: 128_ramend:
126.long 0 129.long 0
130#if defined(CONFIG_UBOOT)
131_init_sp:
132.long 0
133#endif
127 134
128/*****************************************************************************/ 135/*****************************************************************************/
129 136
@@ -137,6 +144,9 @@ __HEAD
137_start: 144_start:
138 nop /* filler */ 145 nop /* filler */
139 movew #0x2700, %sr /* no interrupts */ 146 movew #0x2700, %sr /* no interrupts */
147#if defined(CONFIG_UBOOT)
148 movel %sp,_init_sp /* save initial stack pointer */
149#endif
140 150
141 /* 151 /*
142 * Do any platform or board specific setup now. Most boards 152 * Do any platform or board specific setup now. Most boards
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
index 07cabed4b947..9f3c205fb75b 100644
--- a/arch/microblaze/kernel/sys_microblaze.c
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -62,46 +62,14 @@ out:
62 return error; 62 return error;
63} 63}
64 64
65asmlinkage long
66sys_mmap2(unsigned long addr, unsigned long len,
67 unsigned long prot, unsigned long flags,
68 unsigned long fd, unsigned long pgoff)
69{
70 struct file *file = NULL;
71 int ret = -EBADF;
72
73 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
74 if (!(flags & MAP_ANONYMOUS)) {
75 file = fget(fd);
76 if (!file) {
77 printk(KERN_INFO "no fd in mmap\r\n");
78 goto out;
79 }
80 }
81
82 down_write(&current->mm->mmap_sem);
83 ret = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
84 up_write(&current->mm->mmap_sem);
85 if (file)
86 fput(file);
87out:
88 return ret;
89}
90
91asmlinkage long sys_mmap(unsigned long addr, unsigned long len, 65asmlinkage long sys_mmap(unsigned long addr, unsigned long len,
92 unsigned long prot, unsigned long flags, 66 unsigned long prot, unsigned long flags,
93 unsigned long fd, off_t pgoff) 67 unsigned long fd, off_t pgoff)
94{ 68{
95 int err = -EINVAL; 69 if (pgoff & ~PAGE_MASK)
96 70 return -EINVAL;
97 if (pgoff & ~PAGE_MASK) {
98 printk(KERN_INFO "no pagemask in mmap\r\n");
99 goto out;
100 }
101 71
102 err = sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT); 72 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT);
103out:
104 return err;
105} 73}
106 74
107/* 75/*
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index c1ab1dc10898..b96f365ea6b1 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -196,7 +196,7 @@ ENTRY(sys_call_table)
196 .long sys_ni_syscall /* reserved for streams2 */ 196 .long sys_ni_syscall /* reserved for streams2 */
197 .long sys_vfork /* 190 */ 197 .long sys_vfork /* 190 */
198 .long sys_getrlimit 198 .long sys_getrlimit
199 .long sys_mmap2 /* mmap2 */ 199 .long sys_mmap_pgoff /* mmap2 */
200 .long sys_truncate64 200 .long sys_truncate64
201 .long sys_ftruncate64 201 .long sys_ftruncate64
202 .long sys_stat64 /* 195 */ 202 .long sys_stat64 /* 195 */
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index 6a907c58a4bc..cc2108b6b260 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -9,7 +9,7 @@
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from 9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567 10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 * 11 *
12 * Attempts were made, unsuccesfully, to contact the original 12 * Attempts were made, unsuccessfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original 13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice. 14 * copyright notice.
15 * 15 *
diff --git a/arch/microblaze/lib/memmove.c b/arch/microblaze/lib/memmove.c
index d4e9f49a71f7..0929198c5e68 100644
--- a/arch/microblaze/lib/memmove.c
+++ b/arch/microblaze/lib/memmove.c
@@ -9,7 +9,7 @@
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from 9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567 10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 * 11 *
12 * Attempts were made, unsuccesfully, to contact the original 12 * Attempts were made, unsuccessfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original 13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice. 14 * copyright notice.
15 * 15 *
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c
index 941dc8f94b03..4df851d41a29 100644
--- a/arch/microblaze/lib/memset.c
+++ b/arch/microblaze/lib/memset.c
@@ -9,7 +9,7 @@
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from 9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567 10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 * 11 *
12 * Attempts were made, unsuccesfully, to contact the original 12 * Attempts were made, unsuccessfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original 13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice. 14 * copyright notice.
15 * 15 *
diff --git a/arch/mips/include/asm/fcntl.h b/arch/mips/include/asm/fcntl.h
index 2a52333a062d..7c6681aa2ab8 100644
--- a/arch/mips/include/asm/fcntl.h
+++ b/arch/mips/include/asm/fcntl.h
@@ -10,7 +10,7 @@
10 10
11 11
12#define O_APPEND 0x0008 12#define O_APPEND 0x0008
13#define O_SYNC 0x0010 13#define O_DSYNC 0x0010 /* used to be O_SYNC, see below */
14#define O_NONBLOCK 0x0080 14#define O_NONBLOCK 0x0080
15#define O_CREAT 0x0100 /* not fcntl */ 15#define O_CREAT 0x0100 /* not fcntl */
16#define O_TRUNC 0x0200 /* not fcntl */ 16#define O_TRUNC 0x0200 /* not fcntl */
@@ -18,6 +18,21 @@
18#define O_NOCTTY 0x0800 /* not fcntl */ 18#define O_NOCTTY 0x0800 /* not fcntl */
19#define FASYNC 0x1000 /* fcntl, for BSD compatibility */ 19#define FASYNC 0x1000 /* fcntl, for BSD compatibility */
20#define O_LARGEFILE 0x2000 /* allow large file opens */ 20#define O_LARGEFILE 0x2000 /* allow large file opens */
21/*
22 * Before Linux 2.6.32 only O_DSYNC semantics were implemented, but using
23 * the O_SYNC flag. We continue to use the existing numerical value
24 * for O_DSYNC semantics now, but using the correct symbolic name for it.
25 * This new value is used to request true Posix O_SYNC semantics. It is
26 * defined in this strange way to make sure applications compiled against
27 * new headers get at least O_DSYNC semantics on older kernels.
28 *
29 * This has the nice side-effect that we can simply test for O_DSYNC
30 * wherever we do not care if O_DSYNC or O_SYNC is used.
31 *
32 * Note: __O_SYNC must never be used directly.
33 */
34#define __O_SYNC 0x4000
35#define O_SYNC (__O_SYNC|O_DSYNC)
21#define O_DIRECT 0x8000 /* direct disk access hint */ 36#define O_DIRECT 0x8000 /* direct disk access hint */
22 37
23#define F_GETLK 14 38#define F_GETLK 14
diff --git a/arch/mips/include/asm/mach-pnx833x/gpio.h b/arch/mips/include/asm/mach-pnx833x/gpio.h
index 8de0eb9c98a3..ed3a88da70f6 100644
--- a/arch/mips/include/asm/mach-pnx833x/gpio.h
+++ b/arch/mips/include/asm/mach-pnx833x/gpio.h
@@ -24,7 +24,7 @@
24 24
25/* BIG FAT WARNING: races danger! 25/* BIG FAT WARNING: races danger!
26 No protections exist here. Current users are only early init code, 26 No protections exist here. Current users are only early init code,
27 when locking is not needed because no cuncurency yet exists there, 27 when locking is not needed because no concurrency yet exists there,
28 and GPIO IRQ dispatcher, which does locking. 28 and GPIO IRQ dispatcher, which does locking.
29 However, if many uses will ever happen, proper locking will be needed 29 However, if many uses will ever happen, proper locking will be needed
30 - including locking between different uses 30 - including locking between different uses
diff --git a/arch/mips/include/asm/sgi/ioc.h b/arch/mips/include/asm/sgi/ioc.h
index 343ed15f8dc4..57a971904cfe 100644
--- a/arch/mips/include/asm/sgi/ioc.h
+++ b/arch/mips/include/asm/sgi/ioc.h
@@ -164,7 +164,7 @@ struct sgioc_regs {
164 u32 _unused5; 164 u32 _unused5;
165 u8 _write[3]; 165 u8 _write[3];
166 volatile u8 write; 166 volatile u8 write;
167#define SGIOC_WRITE_NTHRESH 0x01 /* use 4.5db threshhold */ 167#define SGIOC_WRITE_NTHRESH 0x01 /* use 4.5db threshold */
168#define SGIOC_WRITE_TPSPEED 0x02 /* use 100ohm TP speed */ 168#define SGIOC_WRITE_TPSPEED 0x02 /* use 100ohm TP speed */
169#define SGIOC_WRITE_EPSEL 0x04 /* force cable mode: 1=AUI 0=TP */ 169#define SGIOC_WRITE_EPSEL 0x04 /* force cable mode: 1=AUI 0=TP */
170#define SGIOC_WRITE_EASEL 0x08 /* 1=autoselect 0=manual cable selection */ 170#define SGIOC_WRITE_EASEL 0x08 /* 1=autoselect 0=manual cable selection */
diff --git a/arch/mips/include/asm/sibyte/sb1250_mac.h b/arch/mips/include/asm/sibyte/sb1250_mac.h
index b6faf08ca81d..591b9061fd8e 100644
--- a/arch/mips/include/asm/sibyte/sb1250_mac.h
+++ b/arch/mips/include/asm/sibyte/sb1250_mac.h
@@ -212,7 +212,7 @@
212#define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x, S_MAC_TXD_WEIGHT1, M_MAC_TXD_WEIGHT1) 212#define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x, S_MAC_TXD_WEIGHT1, M_MAC_TXD_WEIGHT1)
213 213
214/* 214/*
215 * MAC Fifo Threshhold registers (Table 9-14) 215 * MAC Fifo Threshold registers (Table 9-14)
216 * Register: MAC_THRSH_CFG_0 216 * Register: MAC_THRSH_CFG_0
217 * Register: MAC_THRSH_CFG_1 217 * Register: MAC_THRSH_CFG_1
218 * Register: MAC_THRSH_CFG_2 218 * Register: MAC_THRSH_CFG_2
diff --git a/arch/mips/include/asm/sn/sn0/hubio.h b/arch/mips/include/asm/sn/sn0/hubio.h
index d0c29d4de084..31c76c021bb6 100644
--- a/arch/mips/include/asm/sn/sn0/hubio.h
+++ b/arch/mips/include/asm/sn/sn0/hubio.h
@@ -825,7 +825,7 @@ typedef union iprb_u {
825 struct { 825 struct {
826 u64 rsvd1: 15, 826 u64 rsvd1: 15,
827 error: 1, /* Widget rcvd wr resp pkt w/ error */ 827 error: 1, /* Widget rcvd wr resp pkt w/ error */
828 ovflow: 5, /* Over flow count. perf measurement */ 828 ovflow: 5, /* Overflow count. perf measurement */
829 fire_and_forget: 1, /* Launch Write without response */ 829 fire_and_forget: 1, /* Launch Write without response */
830 mode: 2, /* Widget operation Mode */ 830 mode: 2, /* Widget operation Mode */
831 rsvd2: 2, 831 rsvd2: 2,
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h
index df6a430de5eb..c7f1bfef1574 100644
--- a/arch/mips/include/asm/time.h
+++ b/arch/mips/include/asm/time.h
@@ -84,8 +84,16 @@ static inline int init_mips_clocksource(void)
84#endif 84#endif
85} 85}
86 86
87extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock); 87static inline void clocksource_set_clock(struct clocksource *cs,
88extern void clockevent_set_clock(struct clock_event_device *cd, 88 unsigned int clock)
89 unsigned int clock); 89{
90 clocksource_calc_mult_shift(cs, clock, 4);
91}
92
93static inline void clockevent_set_clock(struct clock_event_device *cd,
94 unsigned int clock)
95{
96 clockevents_calc_mult_shift(cd, clock, 4);
97}
90 98
91#endif /* _ASM_TIME_H */ 99#endif /* _ASM_TIME_H */
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index ad4e017ed2f3..80e2ba694bab 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -82,6 +82,7 @@ static int sp_stopping;
82#define MTSP_O_SHLOCK 0x0010 82#define MTSP_O_SHLOCK 0x0010
83#define MTSP_O_EXLOCK 0x0020 83#define MTSP_O_EXLOCK 0x0020
84#define MTSP_O_ASYNC 0x0040 84#define MTSP_O_ASYNC 0x0040
85/* XXX: check which of these is actually O_SYNC vs O_DSYNC */
85#define MTSP_O_FSYNC O_SYNC 86#define MTSP_O_FSYNC O_SYNC
86#define MTSP_O_NOFOLLOW 0x0100 87#define MTSP_O_NOFOLLOW 0x0100
87#define MTSP_O_SYNC 0x0080 88#define MTSP_O_SYNC 0x0080
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 1a2793efdc4e..f042563c924f 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -67,28 +67,13 @@ SYSCALL_DEFINE6(32_mmap2, unsigned long, addr, unsigned long, len,
67 unsigned long, prot, unsigned long, flags, unsigned long, fd, 67 unsigned long, prot, unsigned long, flags, unsigned long, fd,
68 unsigned long, pgoff) 68 unsigned long, pgoff)
69{ 69{
70 struct file * file = NULL;
71 unsigned long error; 70 unsigned long error;
72 71
73 error = -EINVAL; 72 error = -EINVAL;
74 if (pgoff & (~PAGE_MASK >> 12)) 73 if (pgoff & (~PAGE_MASK >> 12))
75 goto out; 74 goto out;
76 pgoff >>= PAGE_SHIFT-12; 75 error = sys_mmap_pgoff(addr, len, prot, flags, fd,
77 76 pgoff >> (PAGE_SHIFT-12));
78 if (!(flags & MAP_ANONYMOUS)) {
79 error = -EBADF;
80 file = fget(fd);
81 if (!file)
82 goto out;
83 }
84 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
85
86 down_write(&current->mm->mmap_sem);
87 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
88 up_write(&current->mm->mmap_sem);
89 if (file)
90 fput(file);
91
92out: 77out:
93 return error; 78 return error;
94} 79}
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 24630fd8ef60..a38e3ee95515 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -1331,7 +1331,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
1331 if (!((asid += ASID_INC) & ASID_MASK) ) { 1331 if (!((asid += ASID_INC) & ASID_MASK) ) {
1332 if (cpu_has_vtag_icache) 1332 if (cpu_has_vtag_icache)
1333 flush_icache_all(); 1333 flush_icache_all();
1334 /* Traverse all online CPUs (hack requires contigous range) */ 1334 /* Traverse all online CPUs (hack requires contiguous range) */
1335 for_each_online_cpu(i) { 1335 for_each_online_cpu(i) {
1336 /* 1336 /*
1337 * We don't need to worry about our own CPU, nor those of 1337 * We don't need to worry about our own CPU, nor those of
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index fe0d79805603..3f7f466190b4 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -93,7 +93,8 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
93 * We do not accept a shared mapping if it would violate 93 * We do not accept a shared mapping if it would violate
94 * cache aliasing constraints. 94 * cache aliasing constraints.
95 */ 95 */
96 if ((flags & MAP_SHARED) && (addr & shm_align_mask)) 96 if ((flags & MAP_SHARED) &&
97 ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
97 return -EINVAL; 98 return -EINVAL;
98 return addr; 99 return addr;
99 } 100 }
@@ -129,31 +130,6 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
129 } 130 }
130} 131}
131 132
132/* common code for old and new mmaps */
133static inline unsigned long
134do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
135 unsigned long flags, unsigned long fd, unsigned long pgoff)
136{
137 unsigned long error = -EBADF;
138 struct file * file = NULL;
139
140 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
141 if (!(flags & MAP_ANONYMOUS)) {
142 file = fget(fd);
143 if (!file)
144 goto out;
145 }
146
147 down_write(&current->mm->mmap_sem);
148 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
149 up_write(&current->mm->mmap_sem);
150
151 if (file)
152 fput(file);
153out:
154 return error;
155}
156
157SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len, 133SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
158 unsigned long, prot, unsigned long, flags, unsigned long, 134 unsigned long, prot, unsigned long, flags, unsigned long,
159 fd, off_t, offset) 135 fd, off_t, offset)
@@ -164,7 +140,7 @@ SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
164 if (offset & ~PAGE_MASK) 140 if (offset & ~PAGE_MASK)
165 goto out; 141 goto out;
166 142
167 result = do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); 143 result = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
168 144
169out: 145out:
170 return result; 146 return result;
@@ -177,7 +153,7 @@ SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len,
177 if (pgoff & (~PAGE_MASK >> 12)) 153 if (pgoff & (~PAGE_MASK >> 12))
178 return -EINVAL; 154 return -EINVAL;
179 155
180 return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12)); 156 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12));
181} 157}
182 158
183save_static_function(sys_fork); 159save_static_function(sys_fork);
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 1f467d534642..fb7497405510 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -71,39 +71,6 @@ EXPORT_SYMBOL(perf_irq);
71 71
72unsigned int mips_hpt_frequency; 72unsigned int mips_hpt_frequency;
73 73
74void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
75{
76 u64 temp;
77 u32 shift;
78
79 /* Find a shift value */
80 for (shift = 32; shift > 0; shift--) {
81 temp = (u64) NSEC_PER_SEC << shift;
82 do_div(temp, clock);
83 if ((temp >> 32) == 0)
84 break;
85 }
86 cs->shift = shift;
87 cs->mult = (u32) temp;
88}
89
90void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
91 unsigned int clock)
92{
93 u64 temp;
94 u32 shift;
95
96 /* Find a shift value */
97 for (shift = 32; shift > 0; shift--) {
98 temp = (u64) clock << shift;
99 do_div(temp, NSEC_PER_SEC);
100 if ((temp >> 32) == 0)
101 break;
102 }
103 cd->shift = shift;
104 cd->mult = (u32) temp;
105}
106
107/* 74/*
108 * This function exists in order to cause an error due to a duplicate 75 * This function exists in order to cause an error due to a duplicate
109 * definition if platform code should have its own implementation. The hook 76 * definition if platform code should have its own implementation. The hook
diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson/common/mem.c
index 7c92f79b6480..e94ef158f980 100644
--- a/arch/mips/loongson/common/mem.c
+++ b/arch/mips/loongson/common/mem.c
@@ -26,7 +26,7 @@ void __init prom_init_memory(void)
26/* override of arch/mips/mm/cache.c: __uncached_access */ 26/* override of arch/mips/mm/cache.c: __uncached_access */
27int __uncached_access(struct file *file, unsigned long addr) 27int __uncached_access(struct file *file, unsigned long addr)
28{ 28{
29 if (file->f_flags & O_SYNC) 29 if (file->f_flags & O_DSYNC)
30 return 1; 30 return 1;
31 31
32 return addr >= __pa(high_memory) || 32 return addr >= __pa(high_memory) ||
diff --git a/arch/mips/math-emu/dp_sub.c b/arch/mips/math-emu/dp_sub.c
index b30c5b1f1a2c..a2127d685a0d 100644
--- a/arch/mips/math-emu/dp_sub.c
+++ b/arch/mips/math-emu/dp_sub.c
@@ -110,7 +110,7 @@ ieee754dp ieee754dp_sub(ieee754dp x, ieee754dp y)
110 110
111 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): 111 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
112 DPDNORMX; 112 DPDNORMX;
113 /* FAAL THOROUGH */ 113 /* FALL THROUGH */
114 114
115 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM): 115 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
116 /* normalize ym,ye */ 116 /* normalize ym,ye */
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 694d51f523d1..102b2dfa542a 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -194,7 +194,7 @@ void __devinit cpu_cache_init(void)
194 194
195int __weak __uncached_access(struct file *file, unsigned long addr) 195int __weak __uncached_access(struct file *file, unsigned long addr)
196{ 196{
197 if (file->f_flags & O_SYNC) 197 if (file->f_flags & O_DSYNC)
198 return 1; 198 return 1;
199 199
200 return addr >= __pa(high_memory); 200 return addr >= __pa(high_memory);
diff --git a/arch/mips/txx9/generic/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c
index a2b2d62d88e3..8ebc3848f3ac 100644
--- a/arch/mips/txx9/generic/smsc_fdc37m81x.c
+++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c
@@ -117,7 +117,7 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port)
117 if (chip_id == SMSC_FDC37M81X_CHIP_ID) 117 if (chip_id == SMSC_FDC37M81X_CHIP_ID)
118 smsc_fdc37m81x_config_end(); 118 smsc_fdc37m81x_config_end();
119 else { 119 else {
120 printk(KERN_WARNING "%s: unknow chip id 0x%02x\n", __func__, 120 printk(KERN_WARNING "%s: unknown chip id 0x%02x\n", __func__,
121 chip_id); 121 chip_id);
122 g_smsc_fdc37m81x_base = 0; 122 g_smsc_fdc37m81x_base = 0;
123 } 123 }
diff --git a/arch/mn10300/include/asm/mman.h b/arch/mn10300/include/asm/mman.h
index 8eebf89f5ab1..db5c53da73ce 100644
--- a/arch/mn10300/include/asm/mman.h
+++ b/arch/mn10300/include/asm/mman.h
@@ -1 +1,6 @@
1#include <asm-generic/mman.h> 1#include <asm-generic/mman.h>
2
3#define MIN_MAP_ADDR PAGE_SIZE /* minimum fixed mmap address */
4
5#define arch_mmap_check(addr, len, flags) \
6 (((flags) & MAP_FIXED && (addr) < MIN_MAP_ADDR) ? -EINVAL : 0)
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index a94e7ea3faa6..c9ee6c009d79 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -578,7 +578,7 @@ ENTRY(sys_call_table)
578 .long sys_ni_syscall /* reserved for streams2 */ 578 .long sys_ni_syscall /* reserved for streams2 */
579 .long sys_vfork /* 190 */ 579 .long sys_vfork /* 190 */
580 .long sys_getrlimit 580 .long sys_getrlimit
581 .long sys_mmap2 581 .long sys_mmap_pgoff
582 .long sys_truncate64 582 .long sys_truncate64
583 .long sys_ftruncate64 583 .long sys_ftruncate64
584 .long sys_stat64 /* 195 */ 584 .long sys_stat64 /* 195 */
diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c
index 892cce82867e..ec8a21df1142 100644
--- a/arch/mn10300/kernel/process.c
+++ b/arch/mn10300/kernel/process.c
@@ -275,16 +275,12 @@ asmlinkage long sys_execve(char __user *name,
275 char *filename; 275 char *filename;
276 int error; 276 int error;
277 277
278 lock_kernel();
279
280 filename = getname(name); 278 filename = getname(name);
281 error = PTR_ERR(filename); 279 error = PTR_ERR(filename);
282 if (!IS_ERR(filename)) { 280 if (IS_ERR(filename))
283 error = do_execve(filename, argv, envp, __frame); 281 return error;
284 putname(filename); 282 error = do_execve(filename, argv, envp, __frame);
285 } 283 putname(filename);
286
287 unlock_kernel();
288 return error; 284 return error;
289} 285}
290 286
diff --git a/arch/mn10300/kernel/sys_mn10300.c b/arch/mn10300/kernel/sys_mn10300.c
index 8ca5af00334c..17cc6ce04e84 100644
--- a/arch/mn10300/kernel/sys_mn10300.c
+++ b/arch/mn10300/kernel/sys_mn10300.c
@@ -23,47 +23,13 @@
23 23
24#include <asm/uaccess.h> 24#include <asm/uaccess.h>
25 25
26#define MIN_MAP_ADDR PAGE_SIZE /* minimum fixed mmap address */
27
28/*
29 * memory mapping syscall
30 */
31asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
32 unsigned long prot, unsigned long flags,
33 unsigned long fd, unsigned long pgoff)
34{
35 struct file *file = NULL;
36 long error = -EINVAL;
37
38 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
39
40 if (flags & MAP_FIXED && addr < MIN_MAP_ADDR)
41 goto out;
42
43 error = -EBADF;
44 if (!(flags & MAP_ANONYMOUS)) {
45 file = fget(fd);
46 if (!file)
47 goto out;
48 }
49
50 down_write(&current->mm->mmap_sem);
51 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
52 up_write(&current->mm->mmap_sem);
53
54 if (file)
55 fput(file);
56out:
57 return error;
58}
59
60asmlinkage long old_mmap(unsigned long addr, unsigned long len, 26asmlinkage long old_mmap(unsigned long addr, unsigned long len,
61 unsigned long prot, unsigned long flags, 27 unsigned long prot, unsigned long flags,
62 unsigned long fd, unsigned long offset) 28 unsigned long fd, unsigned long offset)
63{ 29{
64 if (offset & ~PAGE_MASK) 30 if (offset & ~PAGE_MASK)
65 return -EINVAL; 31 return -EINVAL;
66 return sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); 32 return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
67} 33}
68 34
69struct sel_arg_struct { 35struct sel_arg_struct {
diff --git a/arch/parisc/include/asm/fcntl.h b/arch/parisc/include/asm/fcntl.h
index 1e1c824764ee..f357fc693c89 100644
--- a/arch/parisc/include/asm/fcntl.h
+++ b/arch/parisc/include/asm/fcntl.h
@@ -1,14 +1,13 @@
1#ifndef _PARISC_FCNTL_H 1#ifndef _PARISC_FCNTL_H
2#define _PARISC_FCNTL_H 2#define _PARISC_FCNTL_H
3 3
4/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
5 located on an ext2 file system */
6#define O_APPEND 000000010 4#define O_APPEND 000000010
7#define O_BLKSEEK 000000100 /* HPUX only */ 5#define O_BLKSEEK 000000100 /* HPUX only */
8#define O_CREAT 000000400 /* not fcntl */ 6#define O_CREAT 000000400 /* not fcntl */
9#define O_EXCL 000002000 /* not fcntl */ 7#define O_EXCL 000002000 /* not fcntl */
10#define O_LARGEFILE 000004000 8#define O_LARGEFILE 000004000
11#define O_SYNC 000100000 9#define __O_SYNC 000100000
10#define O_SYNC (__O_SYNC|O_DSYNC)
12#define O_NONBLOCK 000200004 /* HPUX has separate NDELAY & NONBLOCK */ 11#define O_NONBLOCK 000200004 /* HPUX has separate NDELAY & NONBLOCK */
13#define O_NOCTTY 000400000 /* not fcntl */ 12#define O_NOCTTY 000400000 /* not fcntl */
14#define O_DSYNC 001000000 /* HPUX only */ 13#define O_DSYNC 001000000 /* HPUX only */
diff --git a/arch/parisc/kernel/perf.c b/arch/parisc/kernel/perf.c
index 75099efb3bf3..f9f6783e4bdd 100644
--- a/arch/parisc/kernel/perf.c
+++ b/arch/parisc/kernel/perf.c
@@ -24,7 +24,7 @@
24 * 24 *
25 * This driver programs the PCX-U/PCX-W performance counters 25 * This driver programs the PCX-U/PCX-W performance counters
26 * on the PA-RISC 2.0 chips. The driver keeps all images now 26 * on the PA-RISC 2.0 chips. The driver keeps all images now
27 * internally to the kernel to hopefully eliminate the possiblity 27 * internally to the kernel to hopefully eliminate the possibility
28 * of a bad image halting the CPU. Also, there are different 28 * of a bad image halting the CPU. Also, there are different
29 * images for the PCX-W and later chips vs the PCX-U chips. 29 * images for the PCX-W and later chips vs the PCX-U chips.
30 * 30 *
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 71b31957c8f1..9147391afb03 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -110,37 +110,14 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
110 return addr; 110 return addr;
111} 111}
112 112
113static unsigned long do_mmap2(unsigned long addr, unsigned long len,
114 unsigned long prot, unsigned long flags, unsigned long fd,
115 unsigned long pgoff)
116{
117 struct file * file = NULL;
118 unsigned long error = -EBADF;
119 if (!(flags & MAP_ANONYMOUS)) {
120 file = fget(fd);
121 if (!file)
122 goto out;
123 }
124
125 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
126
127 down_write(&current->mm->mmap_sem);
128 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
129 up_write(&current->mm->mmap_sem);
130
131 if (file != NULL)
132 fput(file);
133out:
134 return error;
135}
136
137asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len, 113asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len,
138 unsigned long prot, unsigned long flags, unsigned long fd, 114 unsigned long prot, unsigned long flags, unsigned long fd,
139 unsigned long pgoff) 115 unsigned long pgoff)
140{ 116{
141 /* Make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE 117 /* Make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE
142 we have. */ 118 we have. */
143 return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT - 12)); 119 return sys_mmap_pgoff(addr, len, prot, flags, fd,
120 pgoff >> (PAGE_SHIFT - 12));
144} 121}
145 122
146asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len, 123asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len,
@@ -148,7 +125,8 @@ asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len,
148 unsigned long offset) 125 unsigned long offset)
149{ 126{
150 if (!(offset & ~PAGE_MASK)) { 127 if (!(offset & ~PAGE_MASK)) {
151 return do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); 128 return sys_mmap_pgoff(addr, len, prot, flags, fd,
129 offset >> PAGE_SHIFT);
152 } else { 130 } else {
153 return -EINVAL; 131 return -EINVAL;
154 } 132 }
diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h
index 1e180a594589..0de404dfee8b 100644
--- a/arch/powerpc/include/asm/reg_fsl_emb.h
+++ b/arch/powerpc/include/asm/reg_fsl_emb.h
@@ -39,7 +39,7 @@
39#define PMRN_PMLCB2 0x112 /* PM Local Control B2 */ 39#define PMRN_PMLCB2 0x112 /* PM Local Control B2 */
40#define PMRN_PMLCB3 0x113 /* PM Local Control B3 */ 40#define PMRN_PMLCB3 0x113 /* PM Local Control B3 */
41 41
42#define PMLCB_THRESHMUL_MASK 0x0700 /* Threshhold Multiple Field */ 42#define PMLCB_THRESHMUL_MASK 0x0700 /* Threshold Multiple Field */
43#define PMLCB_THRESHMUL_SHIFT 8 43#define PMLCB_THRESHMUL_SHIFT 8
44 44
45#define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */ 45#define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index 641c74bb8e27..b6bd1eaa1c24 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -52,7 +52,7 @@ static struct hard_trap_info
52 { 0x2030, 0x08 /* SIGFPE */ }, /* spe fp data */ 52 { 0x2030, 0x08 /* SIGFPE */ }, /* spe fp data */
53 { 0x2040, 0x08 /* SIGFPE */ }, /* spe fp data */ 53 { 0x2040, 0x08 /* SIGFPE */ }, /* spe fp data */
54 { 0x2050, 0x08 /* SIGFPE */ }, /* spe fp round */ 54 { 0x2050, 0x08 /* SIGFPE */ }, /* spe fp round */
55 { 0x2060, 0x0e /* SIGILL */ }, /* performace monitor */ 55 { 0x2060, 0x0e /* SIGILL */ }, /* performance monitor */
56 { 0x2900, 0x08 /* SIGFPE */ }, /* apu unavailable */ 56 { 0x2900, 0x08 /* SIGFPE */ }, /* apu unavailable */
57 { 0x3100, 0x0e /* SIGALRM */ }, /* fixed interval timer */ 57 { 0x3100, 0x0e /* SIGALRM */ }, /* fixed interval timer */
58 { 0x3200, 0x02 /* SIGINT */ }, /* watchdog */ 58 { 0x3200, 0x02 /* SIGINT */ }, /* watchdog */
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index c04832c4a02e..3370e62e43d4 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -140,7 +140,6 @@ static inline unsigned long do_mmap2(unsigned long addr, size_t len,
140 unsigned long prot, unsigned long flags, 140 unsigned long prot, unsigned long flags,
141 unsigned long fd, unsigned long off, int shift) 141 unsigned long fd, unsigned long off, int shift)
142{ 142{
143 struct file * file = NULL;
144 unsigned long ret = -EINVAL; 143 unsigned long ret = -EINVAL;
145 144
146 if (!arch_validate_prot(prot)) 145 if (!arch_validate_prot(prot))
@@ -151,20 +150,8 @@ static inline unsigned long do_mmap2(unsigned long addr, size_t len,
151 goto out; 150 goto out;
152 off >>= shift; 151 off >>= shift;
153 } 152 }
154
155 ret = -EBADF;
156 if (!(flags & MAP_ANONYMOUS)) {
157 if (!(file = fget(fd)))
158 goto out;
159 }
160
161 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
162 153
163 down_write(&current->mm->mmap_sem); 154 ret = sys_mmap_pgoff(addr, len, prot, flags, fd, off);
164 ret = do_mmap_pgoff(file, addr, len, prot, flags, off);
165 up_write(&current->mm->mmap_sem);
166 if (file)
167 fput(file);
168out: 155out:
169 return ret; 156 return ret;
170} 157}
diff --git a/arch/powerpc/kernel/tau_6xx.c b/arch/powerpc/kernel/tau_6xx.c
index c3a56d65c5a9..a753b72efbc0 100644
--- a/arch/powerpc/kernel/tau_6xx.c
+++ b/arch/powerpc/kernel/tau_6xx.c
@@ -59,7 +59,7 @@ void set_thresholds(unsigned long cpu)
59 mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | THRM1_TIE | THRM1_TID); 59 mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | THRM1_TIE | THRM1_TID);
60 60
61 /* setup THRM2, 61 /* setup THRM2,
62 * threshold, valid bit, enable interrupts, interrupt when above threshhold 62 * threshold, valid bit, enable interrupts, interrupt when above threshold
63 */ 63 */
64 mtspr (SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | THRM1_TIE); 64 mtspr (SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | THRM1_TIE);
65#else 65#else
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 36707dec94d7..674800b242d6 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -834,7 +834,8 @@ static cycle_t timebase_read(struct clocksource *cs)
834 return (cycle_t)get_tb(); 834 return (cycle_t)get_tb();
835} 835}
836 836
837void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) 837void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
838 u32 mult)
838{ 839{
839 u64 t2x, stamp_xsec; 840 u64 t2x, stamp_xsec;
840 841
@@ -847,7 +848,7 @@ void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
847 848
848 /* XXX this assumes clock->shift == 22 */ 849 /* XXX this assumes clock->shift == 22 */
849 /* 4611686018 ~= 2^(20+64-22) / 1e9 */ 850 /* 4611686018 ~= 2^(20+64-22) / 1e9 */
850 t2x = (u64) clock->mult * 4611686018ULL; 851 t2x = (u64) mult * 4611686018ULL;
851 stamp_xsec = (u64) xtime.tv_nsec * XSEC_PER_SEC; 852 stamp_xsec = (u64) xtime.tv_nsec * XSEC_PER_SEC;
852 do_div(stamp_xsec, 1000000000); 853 do_div(stamp_xsec, 1000000000);
853 stamp_xsec += (u64) xtime.tv_sec * XSEC_PER_SEC; 854 stamp_xsec += (u64) xtime.tv_sec * XSEC_PER_SEC;
@@ -924,7 +925,7 @@ static void register_decrementer_clockevent(int cpu)
924 *dec = decrementer_clockevent; 925 *dec = decrementer_clockevent;
925 dec->cpumask = cpumask_of(cpu); 926 dec->cpumask = cpumask_of(cpu);
926 927
927 printk(KERN_DEBUG "clockevent: %s mult[%lx] shift[%d] cpu[%d]\n", 928 printk(KERN_DEBUG "clockevent: %s mult[%x] shift[%d] cpu[%d]\n",
928 dec->name, dec->mult, dec->shift, cpu); 929 dec->name, dec->mult, dec->shift, cpu);
929 930
930 clockevents_register_device(dec); 931 clockevents_register_device(dec);
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 137dc22afa42..d84d19224a95 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -721,7 +721,7 @@ static int __init vdso_init(void)
721 721
722#ifdef CONFIG_PPC64 722#ifdef CONFIG_PPC64
723 /* 723 /*
724 * Fill up the "systemcfg" stuff for backward compatiblity 724 * Fill up the "systemcfg" stuff for backward compatibility
725 */ 725 */
726 strcpy((char *)vdso_data->eye_catcher, "SYSTEMCFG:PPC64"); 726 strcpy((char *)vdso_data->eye_catcher, "SYSTEMCFG:PPC64");
727 vdso_data->version.major = SYSTEMCFG_MAJOR; 727 vdso_data->version.major = SYSTEMCFG_MAJOR;
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c
index ae06c6236d9c..2c9e52267292 100644
--- a/arch/powerpc/oprofile/op_model_cell.c
+++ b/arch/powerpc/oprofile/op_model_cell.c
@@ -248,7 +248,7 @@ static int pm_rtas_activate_signals(u32 node, u32 count)
248 * There is no debug setup required for the cycles event. 248 * There is no debug setup required for the cycles event.
249 * Note that only events in the same group can be used. 249 * Note that only events in the same group can be used.
250 * Otherwise, there will be conflicts in correctly routing 250 * Otherwise, there will be conflicts in correctly routing
251 * the signals on the debug bus. It is the responsiblity 251 * the signals on the debug bus. It is the responsibility
252 * of the OProfile user tool to check the events are in 252 * of the OProfile user tool to check the events are in
253 * the same group. 253 * the same group.
254 */ 254 */
@@ -1594,7 +1594,7 @@ static void cell_handle_interrupt_spu(struct pt_regs *regs,
1594 * to a latch. The new values (interrupt setting bits, reset 1594 * to a latch. The new values (interrupt setting bits, reset
1595 * counter value etc.) are not copied to the actual registers 1595 * counter value etc.) are not copied to the actual registers
1596 * until the performance monitor is enabled. In order to get 1596 * until the performance monitor is enabled. In order to get
1597 * this to work as desired, the permormance monitor needs to 1597 * this to work as desired, the performance monitor needs to
1598 * be disabled while writing to the latches. This is a 1598 * be disabled while writing to the latches. This is a
1599 * HW design issue. 1599 * HW design issue.
1600 */ 1600 */
@@ -1668,7 +1668,7 @@ static void cell_handle_interrupt_ppu(struct pt_regs *regs,
1668 * to a latch. The new values (interrupt setting bits, reset 1668 * to a latch. The new values (interrupt setting bits, reset
1669 * counter value etc.) are not copied to the actual registers 1669 * counter value etc.) are not copied to the actual registers
1670 * until the performance monitor is enabled. In order to get 1670 * until the performance monitor is enabled. In order to get
1671 * this to work as desired, the permormance monitor needs to 1671 * this to work as desired, the performance monitor needs to
1672 * be disabled while writing to the latches. This is a 1672 * be disabled while writing to the latches. This is a
1673 * HW design issue. 1673 * HW design issue.
1674 */ 1674 */
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index dd43114e9684..da110bd88346 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -100,7 +100,7 @@ const struct of_device_id mpc52xx_pci_ids[] __initdata = {
100}; 100};
101 101
102/* ======================================================================== */ 102/* ======================================================================== */
103/* PCI configuration acess */ 103/* PCI configuration access */
104/* ======================================================================== */ 104/* ======================================================================== */
105 105
106static int 106static int
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index e81403b245b5..ab2027cdf893 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -302,7 +302,7 @@ static void __init setup_chaos(struct pci_controller *hose,
302 * 1 -> Skip the device but act as if the access was successfull 302 * 1 -> Skip the device but act as if the access was successfull
303 * (return 0xff's on reads, eventually, cache config space 303 * (return 0xff's on reads, eventually, cache config space
304 * accesses in a later version) 304 * accesses in a later version)
305 * -1 -> Hide the device (unsuccessful acess) 305 * -1 -> Hide the device (unsuccessful access)
306 */ 306 */
307static int u3_ht_skip_device(struct pci_controller *hose, 307static int u3_ht_skip_device(struct pci_controller *hose,
308 struct pci_bus *bus, unsigned int devfn) 308 struct pci_bus *bus, unsigned int devfn)
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index ae3c4db86fe8..bafc3f85360d 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -160,7 +160,7 @@ static int dart_build(struct iommu_table *tbl, long index,
160 160
161 dp = ((unsigned int*)tbl->it_base) + index; 161 dp = ((unsigned int*)tbl->it_base) + index;
162 162
163 /* On U3, all memory is contigous, so we can move this 163 /* On U3, all memory is contiguous, so we can move this
164 * out of the loop. 164 * out of the loop.
165 */ 165 */
166 l = npages; 166 l = npages;
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 16c673096a22..c80235206c01 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -220,23 +220,8 @@ config AUDIT_ARCH
220 bool 220 bool
221 default y 221 default y
222 222
223config S390_SWITCH_AMODE
224 bool "Switch kernel/user addressing modes"
225 help
226 This option allows to switch the addressing modes of kernel and user
227 space. The kernel parameter switch_amode=on will enable this feature,
228 default is disabled. Enabling this (via kernel parameter) on machines
229 earlier than IBM System z9-109 EC/BC will reduce system performance.
230
231 Note that this option will also be selected by selecting the execute
232 protection option below. Enabling the execute protection via the
233 noexec kernel parameter will also switch the addressing modes,
234 independent of the switch_amode kernel parameter.
235
236
237config S390_EXEC_PROTECT 223config S390_EXEC_PROTECT
238 bool "Data execute protection" 224 bool "Data execute protection"
239 select S390_SWITCH_AMODE
240 help 225 help
241 This option allows to enable a buffer overflow protection for user 226 This option allows to enable a buffer overflow protection for user
242 space programs and it also selects the addressing mode option above. 227 space programs and it also selects the addressing mode option above.
diff --git a/arch/s390/crypto/prng.c b/arch/s390/crypto/prng.c
index b49c00ce65e9..a3209906739e 100644
--- a/arch/s390/crypto/prng.c
+++ b/arch/s390/crypto/prng.c
@@ -6,7 +6,6 @@
6#include <linux/fs.h> 6#include <linux/fs.h>
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/smp_lock.h>
10#include <linux/miscdevice.h> 9#include <linux/miscdevice.h>
11#include <linux/module.h> 10#include <linux/module.h>
12#include <linux/moduleparam.h> 11#include <linux/moduleparam.h>
@@ -49,7 +48,6 @@ static unsigned char parm_block[32] = {
49 48
50static int prng_open(struct inode *inode, struct file *file) 49static int prng_open(struct inode *inode, struct file *file)
51{ 50{
52 cycle_kernel_lock();
53 return nonseekable_open(inode, file); 51 return nonseekable_open(inode, file);
54} 52}
55 53
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index ab4464486b7a..f4e53c6708dc 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -185,7 +185,6 @@ CONFIG_HOTPLUG_CPU=y
185CONFIG_COMPAT=y 185CONFIG_COMPAT=y
186CONFIG_SYSVIPC_COMPAT=y 186CONFIG_SYSVIPC_COMPAT=y
187CONFIG_AUDIT_ARCH=y 187CONFIG_AUDIT_ARCH=y
188CONFIG_S390_SWITCH_AMODE=y
189CONFIG_S390_EXEC_PROTECT=y 188CONFIG_S390_EXEC_PROTECT=y
190 189
191# 190#
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h
index ae7c8f9f94a5..2a113d6a7dfd 100644
--- a/arch/s390/include/asm/atomic.h
+++ b/arch/s390/include/asm/atomic.h
@@ -21,7 +21,7 @@
21#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) 21#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
22 22
23#define __CS_LOOP(ptr, op_val, op_string) ({ \ 23#define __CS_LOOP(ptr, op_val, op_string) ({ \
24 typeof(ptr->counter) old_val, new_val; \ 24 int old_val, new_val; \
25 asm volatile( \ 25 asm volatile( \
26 " l %0,%2\n" \ 26 " l %0,%2\n" \
27 "0: lr %1,%0\n" \ 27 "0: lr %1,%0\n" \
@@ -38,7 +38,7 @@
38#else /* __GNUC__ */ 38#else /* __GNUC__ */
39 39
40#define __CS_LOOP(ptr, op_val, op_string) ({ \ 40#define __CS_LOOP(ptr, op_val, op_string) ({ \
41 typeof(ptr->counter) old_val, new_val; \ 41 int old_val, new_val; \
42 asm volatile( \ 42 asm volatile( \
43 " l %0,0(%3)\n" \ 43 " l %0,0(%3)\n" \
44 "0: lr %1,%0\n" \ 44 "0: lr %1,%0\n" \
@@ -143,7 +143,7 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
143#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) 143#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
144 144
145#define __CSG_LOOP(ptr, op_val, op_string) ({ \ 145#define __CSG_LOOP(ptr, op_val, op_string) ({ \
146 typeof(ptr->counter) old_val, new_val; \ 146 long long old_val, new_val; \
147 asm volatile( \ 147 asm volatile( \
148 " lg %0,%2\n" \ 148 " lg %0,%2\n" \
149 "0: lgr %1,%0\n" \ 149 "0: lgr %1,%0\n" \
@@ -160,7 +160,7 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
160#else /* __GNUC__ */ 160#else /* __GNUC__ */
161 161
162#define __CSG_LOOP(ptr, op_val, op_string) ({ \ 162#define __CSG_LOOP(ptr, op_val, op_string) ({ \
163 typeof(ptr->counter) old_val, new_val; \ 163 long long old_val, new_val; \
164 asm volatile( \ 164 asm volatile( \
165 " lg %0,0(%3)\n" \ 165 " lg %0,0(%3)\n" \
166 "0: lgr %1,%0\n" \ 166 "0: lgr %1,%0\n" \
diff --git a/arch/s390/include/asm/ccwdev.h b/arch/s390/include/asm/ccwdev.h
index 2a5419551176..f4bd346a52d3 100644
--- a/arch/s390/include/asm/ccwdev.h
+++ b/arch/s390/include/asm/ccwdev.h
@@ -142,6 +142,8 @@ struct ccw1;
142extern int ccw_device_set_options_mask(struct ccw_device *, unsigned long); 142extern int ccw_device_set_options_mask(struct ccw_device *, unsigned long);
143extern int ccw_device_set_options(struct ccw_device *, unsigned long); 143extern int ccw_device_set_options(struct ccw_device *, unsigned long);
144extern void ccw_device_clear_options(struct ccw_device *, unsigned long); 144extern void ccw_device_clear_options(struct ccw_device *, unsigned long);
145int ccw_device_is_pathgroup(struct ccw_device *cdev);
146int ccw_device_is_multipath(struct ccw_device *cdev);
145 147
146/* Allow for i/o completion notification after primary interrupt status. */ 148/* Allow for i/o completion notification after primary interrupt status. */
147#define CCWDEV_EARLY_NOTIFICATION 0x0001 149#define CCWDEV_EARLY_NOTIFICATION 0x0001
@@ -151,6 +153,8 @@ extern void ccw_device_clear_options(struct ccw_device *, unsigned long);
151#define CCWDEV_DO_PATHGROUP 0x0004 153#define CCWDEV_DO_PATHGROUP 0x0004
152/* Allow forced onlining of boxed devices. */ 154/* Allow forced onlining of boxed devices. */
153#define CCWDEV_ALLOW_FORCE 0x0008 155#define CCWDEV_ALLOW_FORCE 0x0008
156/* Try to use multipath mode. */
157#define CCWDEV_DO_MULTIPATH 0x0010
154 158
155extern int ccw_device_start(struct ccw_device *, struct ccw1 *, 159extern int ccw_device_start(struct ccw_device *, struct ccw1 *,
156 unsigned long, __u8, unsigned long); 160 unsigned long, __u8, unsigned long);
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index f23961ada7fb..258ba88b7b50 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -183,6 +183,7 @@ struct s390_idle_data {
183 unsigned long long idle_count; 183 unsigned long long idle_count;
184 unsigned long long idle_enter; 184 unsigned long long idle_enter;
185 unsigned long long idle_time; 185 unsigned long long idle_time;
186 int nohz_delay;
186}; 187};
187 188
188DECLARE_PER_CPU(struct s390_idle_data, s390_idle); 189DECLARE_PER_CPU(struct s390_idle_data, s390_idle);
@@ -198,4 +199,11 @@ static inline void s390_idle_check(void)
198 vtime_start_cpu(); 199 vtime_start_cpu();
199} 200}
200 201
202static inline int s390_nohz_delay(int cpu)
203{
204 return per_cpu(s390_idle, cpu).nohz_delay != 0;
205}
206
207#define arch_needs_cpu(cpu) s390_nohz_delay(cpu)
208
201#endif /* _S390_CPUTIME_H */ 209#endif /* _S390_CPUTIME_H */
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index fc7edd6f41b6..976e273988c2 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -36,7 +36,7 @@ static inline int init_new_context(struct task_struct *tsk,
36 mm->context.has_pgste = 1; 36 mm->context.has_pgste = 1;
37 mm->context.alloc_pgste = 1; 37 mm->context.alloc_pgste = 1;
38 } else { 38 } else {
39 mm->context.noexec = s390_noexec; 39 mm->context.noexec = (user_mode == SECONDARY_SPACE_MODE);
40 mm->context.has_pgste = 0; 40 mm->context.has_pgste = 0;
41 mm->context.alloc_pgste = 0; 41 mm->context.alloc_pgste = 0;
42 } 42 }
@@ -58,7 +58,7 @@ static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk)
58 pgd_t *pgd = mm->pgd; 58 pgd_t *pgd = mm->pgd;
59 59
60 S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd); 60 S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd);
61 if (switch_amode) { 61 if (user_mode != HOME_SPACE_MODE) {
62 /* Load primary space page table origin. */ 62 /* Load primary space page table origin. */
63 pgd = mm->context.noexec ? get_shadow_table(pgd) : pgd; 63 pgd = mm->context.noexec ? get_shadow_table(pgd) : pgd;
64 S390_lowcore.user_exec_asce = mm->context.asce_bits | __pa(pgd); 64 S390_lowcore.user_exec_asce = mm->context.asce_bits | __pa(pgd);
diff --git a/arch/s390/include/asm/pgalloc.h b/arch/s390/include/asm/pgalloc.h
index ddad5903341c..68940d0bad91 100644
--- a/arch/s390/include/asm/pgalloc.h
+++ b/arch/s390/include/asm/pgalloc.h
@@ -143,7 +143,8 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
143 spin_lock_init(&mm->context.list_lock); 143 spin_lock_init(&mm->context.list_lock);
144 INIT_LIST_HEAD(&mm->context.crst_list); 144 INIT_LIST_HEAD(&mm->context.crst_list);
145 INIT_LIST_HEAD(&mm->context.pgtable_list); 145 INIT_LIST_HEAD(&mm->context.pgtable_list);
146 return (pgd_t *) crst_table_alloc(mm, s390_noexec); 146 return (pgd_t *)
147 crst_table_alloc(mm, user_mode == SECONDARY_SPACE_MODE);
147} 148}
148#define pgd_free(mm, pgd) crst_table_free(mm, (unsigned long *) pgd) 149#define pgd_free(mm, pgd) crst_table_free(mm, (unsigned long *) pgd)
149 150
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 60a7b1a1702f..e2fa79cf0614 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -169,12 +169,13 @@ extern unsigned long VMALLOC_START;
169 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048) 169 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
170 * 170 *
171 * A 64 bit pagetable entry of S390 has following format: 171 * A 64 bit pagetable entry of S390 has following format:
172 * | PFRA |0IP0| OS | 172 * | PFRA |0IPC| OS |
173 * 0000000000111111111122222222223333333333444444444455555555556666 173 * 0000000000111111111122222222223333333333444444444455555555556666
174 * 0123456789012345678901234567890123456789012345678901234567890123 174 * 0123456789012345678901234567890123456789012345678901234567890123
175 * 175 *
176 * I Page-Invalid Bit: Page is not available for address-translation 176 * I Page-Invalid Bit: Page is not available for address-translation
177 * P Page-Protection Bit: Store access not possible for page 177 * P Page-Protection Bit: Store access not possible for page
178 * C Change-bit override: HW is not required to set change bit
178 * 179 *
179 * A 64 bit segmenttable entry of S390 has following format: 180 * A 64 bit segmenttable entry of S390 has following format:
180 * | P-table origin | TT 181 * | P-table origin | TT
@@ -218,6 +219,7 @@ extern unsigned long VMALLOC_START;
218 */ 219 */
219 220
220/* Hardware bits in the page table entry */ 221/* Hardware bits in the page table entry */
222#define _PAGE_CO 0x100 /* HW Change-bit override */
221#define _PAGE_RO 0x200 /* HW read-only bit */ 223#define _PAGE_RO 0x200 /* HW read-only bit */
222#define _PAGE_INVALID 0x400 /* HW invalid bit */ 224#define _PAGE_INVALID 0x400 /* HW invalid bit */
223 225
diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h
index e37478e87286..52a779c337e8 100644
--- a/arch/s390/include/asm/setup.h
+++ b/arch/s390/include/asm/setup.h
@@ -49,17 +49,12 @@ extern unsigned long memory_end;
49 49
50void detect_memory_layout(struct mem_chunk chunk[]); 50void detect_memory_layout(struct mem_chunk chunk[]);
51 51
52#ifdef CONFIG_S390_SWITCH_AMODE 52#define PRIMARY_SPACE_MODE 0
53extern unsigned int switch_amode; 53#define ACCESS_REGISTER_MODE 1
54#else 54#define SECONDARY_SPACE_MODE 2
55#define switch_amode (0) 55#define HOME_SPACE_MODE 3
56#endif 56
57 57extern unsigned int user_mode;
58#ifdef CONFIG_S390_EXEC_PROTECT
59extern unsigned int s390_noexec;
60#else
61#define s390_noexec (0)
62#endif
63 58
64/* 59/*
65 * Machine features detected in head.S 60 * Machine features detected in head.S
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index a868b272c257..2ab1141eeb50 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -1,57 +1,22 @@
1/* 1/*
2 * include/asm-s390/smp.h 2 * Copyright IBM Corp. 1999,2009
3 * 3 * Author(s): Denis Joseph Barrow,
4 * S390 version 4 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation 5 * Heiko Carstens <heiko.carstens@de.ibm.com>,
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Heiko Carstens (heiko.carstens@de.ibm.com)
9 */ 6 */
10#ifndef __ASM_SMP_H 7#ifndef __ASM_SMP_H
11#define __ASM_SMP_H 8#define __ASM_SMP_H
12 9
13#include <linux/threads.h> 10#ifdef CONFIG_SMP
14#include <linux/cpumask.h>
15#include <linux/bitops.h>
16 11
17#if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__)
18
19#include <asm/lowcore.h>
20#include <asm/sigp.h>
21#include <asm/ptrace.h>
22#include <asm/system.h> 12#include <asm/system.h>
23 13#include <asm/sigp.h>
24/*
25 s390 specific smp.c headers
26 */
27typedef struct
28{
29 int intresting;
30 sigp_ccode ccode;
31 __u32 status;
32 __u16 cpu;
33} sigp_info;
34 14
35extern void machine_restart_smp(char *); 15extern void machine_restart_smp(char *);
36extern void machine_halt_smp(void); 16extern void machine_halt_smp(void);
37extern void machine_power_off_smp(void); 17extern void machine_power_off_smp(void);
38 18
39#define NO_PROC_ID 0xFF /* No processor magic marker */
40
41/*
42 * This magic constant controls our willingness to transfer
43 * a process across CPUs. Such a transfer incurs misses on the L1
44 * cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
45 * gut feeling is this will vary by board in value. For a board
46 * with separate L2 cache it probably depends also on the RSS, and
47 * for a board with shared L2 cache it ought to decay fast as other
48 * processes are run.
49 */
50
51#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
52
53#define raw_smp_processor_id() (S390_lowcore.cpu_nr) 19#define raw_smp_processor_id() (S390_lowcore.cpu_nr)
54#define cpu_logical_map(cpu) (cpu)
55 20
56extern int __cpu_disable (void); 21extern int __cpu_disable (void);
57extern void __cpu_die (unsigned int cpu); 22extern void __cpu_die (unsigned int cpu);
@@ -64,7 +29,9 @@ extern int smp_cpu_polarization[];
64extern void arch_send_call_function_single_ipi(int cpu); 29extern void arch_send_call_function_single_ipi(int cpu);
65extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 30extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
66 31
67#endif 32extern union save_area *zfcpdump_save_areas[NR_CPUS + 1];
33
34#endif /* CONFIG_SMP */
68 35
69#ifdef CONFIG_HOTPLUG_CPU 36#ifdef CONFIG_HOTPLUG_CPU
70extern int smp_rescan_cpus(void); 37extern int smp_rescan_cpus(void);
@@ -72,5 +39,4 @@ extern int smp_rescan_cpus(void);
72static inline int smp_rescan_cpus(void) { return 0; } 39static inline int smp_rescan_cpus(void) { return 0; }
73#endif 40#endif
74 41
75extern union save_area *zfcpdump_save_areas[NR_CPUS + 1]; 42#endif /* __ASM_SMP_H */
76#endif
diff --git a/arch/s390/include/asm/sockios.h b/arch/s390/include/asm/sockios.h
index f4fc16c7da59..6f60eee73242 100644
--- a/arch/s390/include/asm/sockios.h
+++ b/arch/s390/include/asm/sockios.h
@@ -1,21 +1,6 @@
1/* 1#ifndef _ASM_S390_SOCKIOS_H
2 * include/asm-s390/sockios.h 2#define _ASM_S390_SOCKIOS_H
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/sockios.h"
7 */
8 3
9#ifndef __ARCH_S390_SOCKIOS__ 4#include <asm-generic/sockios.h>
10#define __ARCH_S390_SOCKIOS__
11
12/* Socket-level I/O control calls. */
13#define FIOSETOWN 0x8901
14#define SIOCSPGRP 0x8902
15#define FIOGETOWN 0x8903
16#define SIOCGPGRP 0x8904
17#define SIOCATMARK 0x8905
18#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
19#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
20 5
21#endif 6#endif
diff --git a/arch/s390/include/asm/termbits.h b/arch/s390/include/asm/termbits.h
index 58731853d529..71bf6ac6a2b9 100644
--- a/arch/s390/include/asm/termbits.h
+++ b/arch/s390/include/asm/termbits.h
@@ -1,206 +1,6 @@
1/* 1#ifndef _ASM_S390_TERMBITS_H
2 * include/asm-s390/termbits.h 2#define _ASM_S390_TERMBITS_H
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/termbits.h"
7 */
8 3
9#ifndef __ARCH_S390_TERMBITS_H__ 4#include <asm-generic/termbits.h>
10#define __ARCH_S390_TERMBITS_H__
11
12#include <linux/posix_types.h>
13
14typedef unsigned char cc_t;
15typedef unsigned int speed_t;
16typedef unsigned int tcflag_t;
17
18#define NCCS 19
19struct termios {
20 tcflag_t c_iflag; /* input mode flags */
21 tcflag_t c_oflag; /* output mode flags */
22 tcflag_t c_cflag; /* control mode flags */
23 tcflag_t c_lflag; /* local mode flags */
24 cc_t c_line; /* line discipline */
25 cc_t c_cc[NCCS]; /* control characters */
26};
27
28struct termios2 {
29 tcflag_t c_iflag; /* input mode flags */
30 tcflag_t c_oflag; /* output mode flags */
31 tcflag_t c_cflag; /* control mode flags */
32 tcflag_t c_lflag; /* local mode flags */
33 cc_t c_line; /* line discipline */
34 cc_t c_cc[NCCS]; /* control characters */
35 speed_t c_ispeed; /* input speed */
36 speed_t c_ospeed; /* output speed */
37};
38
39struct ktermios {
40 tcflag_t c_iflag; /* input mode flags */
41 tcflag_t c_oflag; /* output mode flags */
42 tcflag_t c_cflag; /* control mode flags */
43 tcflag_t c_lflag; /* local mode flags */
44 cc_t c_line; /* line discipline */
45 cc_t c_cc[NCCS]; /* control characters */
46 speed_t c_ispeed; /* input speed */
47 speed_t c_ospeed; /* output speed */
48};
49
50/* c_cc characters */
51#define VINTR 0
52#define VQUIT 1
53#define VERASE 2
54#define VKILL 3
55#define VEOF 4
56#define VTIME 5
57#define VMIN 6
58#define VSWTC 7
59#define VSTART 8
60#define VSTOP 9
61#define VSUSP 10
62#define VEOL 11
63#define VREPRINT 12
64#define VDISCARD 13
65#define VWERASE 14
66#define VLNEXT 15
67#define VEOL2 16
68
69/* c_iflag bits */
70#define IGNBRK 0000001
71#define BRKINT 0000002
72#define IGNPAR 0000004
73#define PARMRK 0000010
74#define INPCK 0000020
75#define ISTRIP 0000040
76#define INLCR 0000100
77#define IGNCR 0000200
78#define ICRNL 0000400
79#define IUCLC 0001000
80#define IXON 0002000
81#define IXANY 0004000
82#define IXOFF 0010000
83#define IMAXBEL 0020000
84#define IUTF8 0040000
85
86/* c_oflag bits */
87#define OPOST 0000001
88#define OLCUC 0000002
89#define ONLCR 0000004
90#define OCRNL 0000010
91#define ONOCR 0000020
92#define ONLRET 0000040
93#define OFILL 0000100
94#define OFDEL 0000200
95#define NLDLY 0000400
96#define NL0 0000000
97#define NL1 0000400
98#define CRDLY 0003000
99#define CR0 0000000
100#define CR1 0001000
101#define CR2 0002000
102#define CR3 0003000
103#define TABDLY 0014000
104#define TAB0 0000000
105#define TAB1 0004000
106#define TAB2 0010000
107#define TAB3 0014000
108#define XTABS 0014000
109#define BSDLY 0020000
110#define BS0 0000000
111#define BS1 0020000
112#define VTDLY 0040000
113#define VT0 0000000
114#define VT1 0040000
115#define FFDLY 0100000
116#define FF0 0000000
117#define FF1 0100000
118
119/* c_cflag bit meaning */
120#define CBAUD 0010017
121#define B0 0000000 /* hang up */
122#define B50 0000001
123#define B75 0000002
124#define B110 0000003
125#define B134 0000004
126#define B150 0000005
127#define B200 0000006
128#define B300 0000007
129#define B600 0000010
130#define B1200 0000011
131#define B1800 0000012
132#define B2400 0000013
133#define B4800 0000014
134#define B9600 0000015
135#define B19200 0000016
136#define B38400 0000017
137#define EXTA B19200
138#define EXTB B38400
139#define CSIZE 0000060
140#define CS5 0000000
141#define CS6 0000020
142#define CS7 0000040
143#define CS8 0000060
144#define CSTOPB 0000100
145#define CREAD 0000200
146#define PARENB 0000400
147#define PARODD 0001000
148#define HUPCL 0002000
149#define CLOCAL 0004000
150#define CBAUDEX 0010000
151#define BOTHER 0010000
152#define B57600 0010001
153#define B115200 0010002
154#define B230400 0010003
155#define B460800 0010004
156#define B500000 0010005
157#define B576000 0010006
158#define B921600 0010007
159#define B1000000 0010010
160#define B1152000 0010011
161#define B1500000 0010012
162#define B2000000 0010013
163#define B2500000 0010014
164#define B3000000 0010015
165#define B3500000 0010016
166#define B4000000 0010017
167#define CIBAUD 002003600000 /* input baud rate */
168#define CMSPAR 010000000000 /* mark or space (stick) parity */
169#define CRTSCTS 020000000000 /* flow control */
170
171#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
172
173/* c_lflag bits */
174#define ISIG 0000001
175#define ICANON 0000002
176#define XCASE 0000004
177#define ECHO 0000010
178#define ECHOE 0000020
179#define ECHOK 0000040
180#define ECHONL 0000100
181#define NOFLSH 0000200
182#define TOSTOP 0000400
183#define ECHOCTL 0001000
184#define ECHOPRT 0002000
185#define ECHOKE 0004000
186#define FLUSHO 0010000
187#define PENDIN 0040000
188#define IEXTEN 0100000
189
190/* tcflow() and TCXONC use these */
191#define TCOOFF 0
192#define TCOON 1
193#define TCIOFF 2
194#define TCION 3
195
196/* tcflush() and TCFLSH use these */
197#define TCIFLUSH 0
198#define TCOFLUSH 1
199#define TCIOFLUSH 2
200
201/* tcsetattr uses these */
202#define TCSANOW 0
203#define TCSADRAIN 1
204#define TCSAFLUSH 2
205 5
206#endif 6#endif
diff --git a/arch/s390/include/asm/todclk.h b/arch/s390/include/asm/todclk.h
deleted file mode 100644
index c7f62055488a..000000000000
--- a/arch/s390/include/asm/todclk.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * File...........: linux/include/asm/todclk.h
3 * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com>
4 * Bugreports.to..: <Linux390@de.ibm.com>
5 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000
6 *
7 * History of changes (starts July 2000)
8 */
9
10#ifndef __ASM_TODCLK_H
11#define __ASM_TODCLK_H
12
13#ifdef __KERNEL__
14
15#define TOD_uSEC (0x1000ULL)
16#define TOD_mSEC (1000 * TOD_uSEC)
17#define TOD_SEC (1000 * TOD_mSEC)
18#define TOD_MIN (60 * TOD_SEC)
19#define TOD_HOUR (60 * TOD_MIN)
20
21#endif
22
23#endif
diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h
index 8377e91533d2..cbf0a8745bf4 100644
--- a/arch/s390/include/asm/uaccess.h
+++ b/arch/s390/include/asm/uaccess.h
@@ -93,6 +93,8 @@ extern struct uaccess_ops uaccess_mvcos;
93extern struct uaccess_ops uaccess_mvcos_switch; 93extern struct uaccess_ops uaccess_mvcos_switch;
94extern struct uaccess_ops uaccess_pt; 94extern struct uaccess_ops uaccess_pt;
95 95
96extern int __handle_fault(unsigned long, unsigned long, int);
97
96static inline int __put_user_fn(size_t size, void __user *ptr, void *x) 98static inline int __put_user_fn(size_t size, void __user *ptr, void *x)
97{ 99{
98 size = uaccess.copy_to_user_small(size, ptr, x); 100 size = uaccess.copy_to_user_small(size, ptr, x);
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index c7be8e10b87e..683f6381cc59 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_KPROBES) += kprobes.o
44obj-$(CONFIG_FUNCTION_TRACER) += $(if $(CONFIG_64BIT),mcount64.o,mcount.o) 44obj-$(CONFIG_FUNCTION_TRACER) += $(if $(CONFIG_64BIT),mcount64.o,mcount.o)
45obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 45obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
46obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 46obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
47obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
47 48
48# Kexec part 49# Kexec part
49S390_KEXEC_OBJS := machine_kexec.o crash.o 50S390_KEXEC_OBJS := machine_kexec.o crash.o
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index fda1a8123f9b..22c9e557bb22 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -31,14 +31,8 @@
31#include <linux/shm.h> 31#include <linux/shm.h>
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/uio.h> 33#include <linux/uio.h>
34#include <linux/nfs_fs.h>
35#include <linux/quota.h> 34#include <linux/quota.h>
36#include <linux/module.h> 35#include <linux/module.h>
37#include <linux/sunrpc/svc.h>
38#include <linux/nfsd/nfsd.h>
39#include <linux/nfsd/cache.h>
40#include <linux/nfsd/xdr.h>
41#include <linux/nfsd/syscall.h>
42#include <linux/poll.h> 36#include <linux/poll.h>
43#include <linux/personality.h> 37#include <linux/personality.h>
44#include <linux/stat.h> 38#include <linux/stat.h>
@@ -630,38 +624,6 @@ struct mmap_arg_struct_emu31 {
630 u32 offset; 624 u32 offset;
631}; 625};
632 626
633/* common code for old and new mmaps */
634static inline long do_mmap2(
635 unsigned long addr, unsigned long len,
636 unsigned long prot, unsigned long flags,
637 unsigned long fd, unsigned long pgoff)
638{
639 struct file * file = NULL;
640 unsigned long error = -EBADF;
641
642 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
643 if (!(flags & MAP_ANONYMOUS)) {
644 file = fget(fd);
645 if (!file)
646 goto out;
647 }
648
649 down_write(&current->mm->mmap_sem);
650 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
651 if (!IS_ERR((void *) error) && error + len >= 0x80000000ULL) {
652 /* Result is out of bounds. */
653 do_munmap(current->mm, addr, len);
654 error = -ENOMEM;
655 }
656 up_write(&current->mm->mmap_sem);
657
658 if (file)
659 fput(file);
660out:
661 return error;
662}
663
664
665asmlinkage unsigned long 627asmlinkage unsigned long
666old32_mmap(struct mmap_arg_struct_emu31 __user *arg) 628old32_mmap(struct mmap_arg_struct_emu31 __user *arg)
667{ 629{
@@ -675,7 +637,8 @@ old32_mmap(struct mmap_arg_struct_emu31 __user *arg)
675 if (a.offset & ~PAGE_MASK) 637 if (a.offset & ~PAGE_MASK)
676 goto out; 638 goto out;
677 639
678 error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); 640 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
641 a.offset >> PAGE_SHIFT);
679out: 642out:
680 return error; 643 return error;
681} 644}
@@ -688,7 +651,7 @@ sys32_mmap2(struct mmap_arg_struct_emu31 __user *arg)
688 651
689 if (copy_from_user(&a, arg, sizeof(a))) 652 if (copy_from_user(&a, arg, sizeof(a)))
690 goto out; 653 goto out;
691 error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); 654 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
692out: 655out:
693 return error; 656 return error;
694} 657}
diff --git a/arch/s390/kernel/compat_linux.h b/arch/s390/kernel/compat_linux.h
index 45e9092b3aad..cb97afc85c94 100644
--- a/arch/s390/kernel/compat_linux.h
+++ b/arch/s390/kernel/compat_linux.h
@@ -4,10 +4,6 @@
4#include <linux/compat.h> 4#include <linux/compat.h>
5#include <linux/socket.h> 5#include <linux/socket.h>
6#include <linux/syscalls.h> 6#include <linux/syscalls.h>
7#include <linux/nfs_fs.h>
8#include <linux/sunrpc/svc.h>
9#include <linux/nfsd/nfsd.h>
10#include <linux/nfsd/export.h>
11 7
12/* Macro that masks the high order bit of an 32 bit pointer and converts it*/ 8/* Macro that masks the high order bit of an 32 bit pointer and converts it*/
13/* to a 64 bit pointer */ 9/* to a 64 bit pointer */
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 6a250808092b..d984a2a380c3 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -83,6 +83,8 @@ startup_continue:
83 slr %r0,%r0 # set cpuid to zero 83 slr %r0,%r0 # set cpuid to zero
84 sigp %r1,%r0,0x12 # switch to esame mode 84 sigp %r1,%r0,0x12 # switch to esame mode
85 sam64 # switch to 64 bit mode 85 sam64 # switch to 64 bit mode
86 llgfr %r13,%r13 # clear high-order half of base reg
87 lmh %r0,%r15,.Lzero64-.LPG1(%r13) # clear high-order half
86 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers 88 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
87 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area 89 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
88 # move IPL device to lowcore 90 # move IPL device to lowcore
@@ -127,6 +129,7 @@ startup_continue:
127.L4malign:.quad 0xffffffffffc00000 129.L4malign:.quad 0xffffffffffc00000
128.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 130.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
129.Lnop: .long 0x07000700 131.Lnop: .long 0x07000700
132.Lzero64:.fill 16,4,0x0
130#ifdef CONFIG_ZFCPDUMP 133#ifdef CONFIG_ZFCPDUMP
131.Lcurrent_cpu: 134.Lcurrent_cpu:
132 .long 0x0 135 .long 0x0
diff --git a/arch/s390/kernel/s390_ext.c b/arch/s390/kernel/s390_ext.c
index 0de305b598ce..59618bcd99b7 100644
--- a/arch/s390/kernel/s390_ext.c
+++ b/arch/s390/kernel/s390_ext.c
@@ -126,6 +126,8 @@ void __irq_entry do_extint(struct pt_regs *regs, unsigned short code)
126 /* Serve timer interrupts first. */ 126 /* Serve timer interrupts first. */
127 clock_comparator_work(); 127 clock_comparator_work();
128 kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++; 128 kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
129 if (code != 0x1004)
130 __get_cpu_var(s390_idle).nohz_delay = 1;
129 index = ext_hash(code); 131 index = ext_hash(code);
130 for (p = ext_int_hash[index]; p; p = p->next) { 132 for (p = ext_int_hash[index]; p; p = p->next) {
131 if (likely(p->code == code)) 133 if (likely(p->code == code))
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 061479ff029f..0663287fa1b3 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -305,9 +305,8 @@ static int __init early_parse_mem(char *p)
305} 305}
306early_param("mem", early_parse_mem); 306early_param("mem", early_parse_mem);
307 307
308#ifdef CONFIG_S390_SWITCH_AMODE 308unsigned int user_mode = HOME_SPACE_MODE;
309unsigned int switch_amode = 0; 309EXPORT_SYMBOL_GPL(user_mode);
310EXPORT_SYMBOL_GPL(switch_amode);
311 310
312static int set_amode_and_uaccess(unsigned long user_amode, 311static int set_amode_and_uaccess(unsigned long user_amode,
313 unsigned long user32_amode) 312 unsigned long user32_amode)
@@ -340,23 +339,29 @@ static int set_amode_and_uaccess(unsigned long user_amode,
340 */ 339 */
341static int __init early_parse_switch_amode(char *p) 340static int __init early_parse_switch_amode(char *p)
342{ 341{
343 switch_amode = 1; 342 if (user_mode != SECONDARY_SPACE_MODE)
343 user_mode = PRIMARY_SPACE_MODE;
344 return 0; 344 return 0;
345} 345}
346early_param("switch_amode", early_parse_switch_amode); 346early_param("switch_amode", early_parse_switch_amode);
347 347
348#else /* CONFIG_S390_SWITCH_AMODE */ 348static int __init early_parse_user_mode(char *p)
349static inline int set_amode_and_uaccess(unsigned long user_amode,
350 unsigned long user32_amode)
351{ 349{
350 if (p && strcmp(p, "primary") == 0)
351 user_mode = PRIMARY_SPACE_MODE;
352#ifdef CONFIG_S390_EXEC_PROTECT
353 else if (p && strcmp(p, "secondary") == 0)
354 user_mode = SECONDARY_SPACE_MODE;
355#endif
356 else if (!p || strcmp(p, "home") == 0)
357 user_mode = HOME_SPACE_MODE;
358 else
359 return 1;
352 return 0; 360 return 0;
353} 361}
354#endif /* CONFIG_S390_SWITCH_AMODE */ 362early_param("user_mode", early_parse_user_mode);
355 363
356#ifdef CONFIG_S390_EXEC_PROTECT 364#ifdef CONFIG_S390_EXEC_PROTECT
357unsigned int s390_noexec = 0;
358EXPORT_SYMBOL_GPL(s390_noexec);
359
360/* 365/*
361 * Enable execute protection? 366 * Enable execute protection?
362 */ 367 */
@@ -364,8 +369,7 @@ static int __init early_parse_noexec(char *p)
364{ 369{
365 if (!strncmp(p, "off", 3)) 370 if (!strncmp(p, "off", 3))
366 return 0; 371 return 0;
367 switch_amode = 1; 372 user_mode = SECONDARY_SPACE_MODE;
368 s390_noexec = 1;
369 return 0; 373 return 0;
370} 374}
371early_param("noexec", early_parse_noexec); 375early_param("noexec", early_parse_noexec);
@@ -373,7 +377,7 @@ early_param("noexec", early_parse_noexec);
373 377
374static void setup_addressing_mode(void) 378static void setup_addressing_mode(void)
375{ 379{
376 if (s390_noexec) { 380 if (user_mode == SECONDARY_SPACE_MODE) {
377 if (set_amode_and_uaccess(PSW_ASC_SECONDARY, 381 if (set_amode_and_uaccess(PSW_ASC_SECONDARY,
378 PSW32_ASC_SECONDARY)) 382 PSW32_ASC_SECONDARY))
379 pr_info("Execute protection active, " 383 pr_info("Execute protection active, "
@@ -381,7 +385,7 @@ static void setup_addressing_mode(void)
381 else 385 else
382 pr_info("Execute protection active, " 386 pr_info("Execute protection active, "
383 "mvcos not available\n"); 387 "mvcos not available\n");
384 } else if (switch_amode) { 388 } else if (user_mode == PRIMARY_SPACE_MODE) {
385 if (set_amode_and_uaccess(PSW_ASC_PRIMARY, PSW32_ASC_PRIMARY)) 389 if (set_amode_and_uaccess(PSW_ASC_PRIMARY, PSW32_ASC_PRIMARY))
386 pr_info("Address spaces switched, " 390 pr_info("Address spaces switched, "
387 "mvcos available\n"); 391 "mvcos available\n");
@@ -411,7 +415,7 @@ setup_lowcore(void)
411 lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY; 415 lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
412 lc->restart_psw.addr = 416 lc->restart_psw.addr =
413 PSW_ADDR_AMODE | (unsigned long) restart_int_handler; 417 PSW_ADDR_AMODE | (unsigned long) restart_int_handler;
414 if (switch_amode) 418 if (user_mode != HOME_SPACE_MODE)
415 lc->restart_psw.mask |= PSW_ASC_HOME; 419 lc->restart_psw.mask |= PSW_ASC_HOME;
416 lc->external_new_psw.mask = psw_kernel_bits; 420 lc->external_new_psw.mask = psw_kernel_bits;
417 lc->external_new_psw.addr = 421 lc->external_new_psw.addr =
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index e9d94f61d500..86a74c9c9e63 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -32,32 +32,6 @@
32#include <asm/uaccess.h> 32#include <asm/uaccess.h>
33#include "entry.h" 33#include "entry.h"
34 34
35/* common code for old and new mmaps */
36static inline long do_mmap2(
37 unsigned long addr, unsigned long len,
38 unsigned long prot, unsigned long flags,
39 unsigned long fd, unsigned long pgoff)
40{
41 long error = -EBADF;
42 struct file * file = NULL;
43
44 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
45 if (!(flags & MAP_ANONYMOUS)) {
46 file = fget(fd);
47 if (!file)
48 goto out;
49 }
50
51 down_write(&current->mm->mmap_sem);
52 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
53 up_write(&current->mm->mmap_sem);
54
55 if (file)
56 fput(file);
57out:
58 return error;
59}
60
61/* 35/*
62 * Perform the select(nd, in, out, ex, tv) and mmap() system 36 * Perform the select(nd, in, out, ex, tv) and mmap() system
63 * calls. Linux for S/390 isn't able to handle more than 5 37 * calls. Linux for S/390 isn't able to handle more than 5
@@ -81,7 +55,7 @@ SYSCALL_DEFINE1(mmap2, struct mmap_arg_struct __user *, arg)
81 55
82 if (copy_from_user(&a, arg, sizeof(a))) 56 if (copy_from_user(&a, arg, sizeof(a)))
83 goto out; 57 goto out;
84 error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); 58 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
85out: 59out:
86 return error; 60 return error;
87} 61}
@@ -98,7 +72,7 @@ SYSCALL_DEFINE1(s390_old_mmap, struct mmap_arg_struct __user *, arg)
98 if (a.offset & ~PAGE_MASK) 72 if (a.offset & ~PAGE_MASK)
99 goto out; 73 goto out;
100 74
101 error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); 75 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
102out: 76out:
103 return error; 77 return error;
104} 78}
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index 34162a0b2caa..65065ac48ed3 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -214,7 +214,8 @@ struct clocksource * __init clocksource_default_clock(void)
214 return &clocksource_tod; 214 return &clocksource_tod;
215} 215}
216 216
217void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) 217void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
218 u32 mult)
218{ 219{
219 if (clock != &clocksource_tod) 220 if (clock != &clocksource_tod)
220 return; 221 return;
@@ -334,7 +335,7 @@ int get_sync_clock(unsigned long long *clock)
334 sw0 = atomic_read(sw_ptr); 335 sw0 = atomic_read(sw_ptr);
335 *clock = get_clock(); 336 *clock = get_clock();
336 sw1 = atomic_read(sw_ptr); 337 sw1 = atomic_read(sw_ptr);
337 put_cpu_var(clock_sync_sync); 338 put_cpu_var(clock_sync_word);
338 if (sw0 == sw1 && (sw0 & 0x80000000U)) 339 if (sw0 == sw1 && (sw0 & 0x80000000U))
339 /* Success: time is in sync. */ 340 /* Success: time is in sync. */
340 return 0; 341 return 0;
@@ -384,7 +385,7 @@ static inline int check_sync_clock(void)
384 385
385 sw_ptr = &get_cpu_var(clock_sync_word); 386 sw_ptr = &get_cpu_var(clock_sync_word);
386 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 387 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
387 put_cpu_var(clock_sync_sync); 388 put_cpu_var(clock_sync_word);
388 return rc; 389 return rc;
389} 390}
390 391
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index adfb32aa6d59..5f99e66c51c3 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -86,7 +86,8 @@ static void vdso_init_data(struct vdso_data *vd)
86 unsigned int facility_list; 86 unsigned int facility_list;
87 87
88 facility_list = stfl(); 88 facility_list = stfl();
89 vd->ectg_available = switch_amode && (facility_list & 1); 89 vd->ectg_available =
90 user_mode != HOME_SPACE_MODE && (facility_list & 1);
90} 91}
91 92
92#ifdef CONFIG_64BIT 93#ifdef CONFIG_64BIT
@@ -114,7 +115,7 @@ int vdso_alloc_per_cpu(int cpu, struct _lowcore *lowcore)
114 115
115 lowcore->vdso_per_cpu_data = __LC_PASTE; 116 lowcore->vdso_per_cpu_data = __LC_PASTE;
116 117
117 if (!switch_amode || !vdso_enabled) 118 if (user_mode == HOME_SPACE_MODE || !vdso_enabled)
118 return 0; 119 return 0;
119 120
120 segment_table = __get_free_pages(GFP_KERNEL, SEGMENT_ORDER); 121 segment_table = __get_free_pages(GFP_KERNEL, SEGMENT_ORDER);
@@ -160,7 +161,7 @@ void vdso_free_per_cpu(int cpu, struct _lowcore *lowcore)
160 unsigned long segment_table, page_table, page_frame; 161 unsigned long segment_table, page_table, page_frame;
161 u32 *psal, *aste; 162 u32 *psal, *aste;
162 163
163 if (!switch_amode || !vdso_enabled) 164 if (user_mode == HOME_SPACE_MODE || !vdso_enabled)
164 return; 165 return;
165 166
166 psal = (u32 *)(addr_t) lowcore->paste[4]; 167 psal = (u32 *)(addr_t) lowcore->paste[4];
@@ -184,7 +185,7 @@ static void __vdso_init_cr5(void *dummy)
184 185
185static void vdso_init_cr5(void) 186static void vdso_init_cr5(void)
186{ 187{
187 if (switch_amode && vdso_enabled) 188 if (user_mode != HOME_SPACE_MODE && vdso_enabled)
188 on_each_cpu(__vdso_init_cr5, NULL, 1); 189 on_each_cpu(__vdso_init_cr5, NULL, 1);
189} 190}
190#endif /* CONFIG_64BIT */ 191#endif /* CONFIG_64BIT */
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index c41bb0d416e1..b59a812a010e 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -167,6 +167,8 @@ void vtime_stop_cpu(void)
167 /* Wait for external, I/O or machine check interrupt. */ 167 /* Wait for external, I/O or machine check interrupt. */
168 psw.mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_IO | PSW_MASK_EXT; 168 psw.mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_IO | PSW_MASK_EXT;
169 169
170 idle->nohz_delay = 0;
171
170 /* Check if the CPU timer needs to be reprogrammed. */ 172 /* Check if the CPU timer needs to be reprogrammed. */
171 if (vq->do_spt) { 173 if (vq->do_spt) {
172 __u64 vmax = VTIMER_MAX_SLICE; 174 __u64 vmax = VTIMER_MAX_SLICE;
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig
index bf164fc21864..6ee55ae84ce2 100644
--- a/arch/s390/kvm/Kconfig
+++ b/arch/s390/kvm/Kconfig
@@ -20,7 +20,6 @@ config KVM
20 depends on HAVE_KVM && EXPERIMENTAL 20 depends on HAVE_KVM && EXPERIMENTAL
21 select PREEMPT_NOTIFIERS 21 select PREEMPT_NOTIFIERS
22 select ANON_INODES 22 select ANON_INODES
23 select S390_SWITCH_AMODE
24 ---help--- 23 ---help---
25 Support hosting paravirtualized guest machines using the SIE 24 Support hosting paravirtualized guest machines using the SIE
26 virtualization capability on the mainframe. This should work 25 virtualization capability on the mainframe. This should work
diff --git a/arch/s390/lib/uaccess_mvcos.c b/arch/s390/lib/uaccess_mvcos.c
index 58da3f461214..60455f104ea3 100644
--- a/arch/s390/lib/uaccess_mvcos.c
+++ b/arch/s390/lib/uaccess_mvcos.c
@@ -162,7 +162,6 @@ static size_t clear_user_mvcos(size_t size, void __user *to)
162 return size; 162 return size;
163} 163}
164 164
165#ifdef CONFIG_S390_SWITCH_AMODE
166static size_t strnlen_user_mvcos(size_t count, const char __user *src) 165static size_t strnlen_user_mvcos(size_t count, const char __user *src)
167{ 166{
168 char buf[256]; 167 char buf[256];
@@ -200,7 +199,6 @@ static size_t strncpy_from_user_mvcos(size_t count, const char __user *src,
200 } while ((len_str == len) && (done < count)); 199 } while ((len_str == len) && (done < count));
201 return done; 200 return done;
202} 201}
203#endif /* CONFIG_S390_SWITCH_AMODE */
204 202
205struct uaccess_ops uaccess_mvcos = { 203struct uaccess_ops uaccess_mvcos = {
206 .copy_from_user = copy_from_user_mvcos_check, 204 .copy_from_user = copy_from_user_mvcos_check,
@@ -215,7 +213,6 @@ struct uaccess_ops uaccess_mvcos = {
215 .futex_atomic_cmpxchg = futex_atomic_cmpxchg_std, 213 .futex_atomic_cmpxchg = futex_atomic_cmpxchg_std,
216}; 214};
217 215
218#ifdef CONFIG_S390_SWITCH_AMODE
219struct uaccess_ops uaccess_mvcos_switch = { 216struct uaccess_ops uaccess_mvcos_switch = {
220 .copy_from_user = copy_from_user_mvcos, 217 .copy_from_user = copy_from_user_mvcos,
221 .copy_from_user_small = copy_from_user_mvcos, 218 .copy_from_user_small = copy_from_user_mvcos,
@@ -228,4 +225,3 @@ struct uaccess_ops uaccess_mvcos_switch = {
228 .futex_atomic_op = futex_atomic_op_pt, 225 .futex_atomic_op = futex_atomic_op_pt,
229 .futex_atomic_cmpxchg = futex_atomic_cmpxchg_pt, 226 .futex_atomic_cmpxchg = futex_atomic_cmpxchg_pt,
230}; 227};
231#endif
diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c
index cb5d59eab0ee..404f2de296dc 100644
--- a/arch/s390/lib/uaccess_pt.c
+++ b/arch/s390/lib/uaccess_pt.c
@@ -23,86 +23,21 @@ static inline pte_t *follow_table(struct mm_struct *mm, unsigned long addr)
23 23
24 pgd = pgd_offset(mm, addr); 24 pgd = pgd_offset(mm, addr);
25 if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd))) 25 if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd)))
26 return NULL; 26 return (pte_t *) 0x3a;
27 27
28 pud = pud_offset(pgd, addr); 28 pud = pud_offset(pgd, addr);
29 if (pud_none(*pud) || unlikely(pud_bad(*pud))) 29 if (pud_none(*pud) || unlikely(pud_bad(*pud)))
30 return NULL; 30 return (pte_t *) 0x3b;
31 31
32 pmd = pmd_offset(pud, addr); 32 pmd = pmd_offset(pud, addr);
33 if (pmd_none(*pmd) || unlikely(pmd_bad(*pmd))) 33 if (pmd_none(*pmd) || unlikely(pmd_bad(*pmd)))
34 return NULL; 34 return (pte_t *) 0x10;
35 35
36 return pte_offset_map(pmd, addr); 36 return pte_offset_map(pmd, addr);
37} 37}
38 38
39static int __handle_fault(struct mm_struct *mm, unsigned long address, 39static __always_inline size_t __user_copy_pt(unsigned long uaddr, void *kptr,
40 int write_access) 40 size_t n, int write_user)
41{
42 struct vm_area_struct *vma;
43 int ret = -EFAULT;
44 int fault;
45
46 if (in_atomic())
47 return ret;
48 down_read(&mm->mmap_sem);
49 vma = find_vma(mm, address);
50 if (unlikely(!vma))
51 goto out;
52 if (unlikely(vma->vm_start > address)) {
53 if (!(vma->vm_flags & VM_GROWSDOWN))
54 goto out;
55 if (expand_stack(vma, address))
56 goto out;
57 }
58
59 if (!write_access) {
60 /* page not present, check vm flags */
61 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
62 goto out;
63 } else {
64 if (!(vma->vm_flags & VM_WRITE))
65 goto out;
66 }
67
68survive:
69 fault = handle_mm_fault(mm, vma, address, write_access ? FAULT_FLAG_WRITE : 0);
70 if (unlikely(fault & VM_FAULT_ERROR)) {
71 if (fault & VM_FAULT_OOM)
72 goto out_of_memory;
73 else if (fault & VM_FAULT_SIGBUS)
74 goto out_sigbus;
75 BUG();
76 }
77 if (fault & VM_FAULT_MAJOR)
78 current->maj_flt++;
79 else
80 current->min_flt++;
81 ret = 0;
82out:
83 up_read(&mm->mmap_sem);
84 return ret;
85
86out_of_memory:
87 up_read(&mm->mmap_sem);
88 if (is_global_init(current)) {
89 yield();
90 down_read(&mm->mmap_sem);
91 goto survive;
92 }
93 printk("VM: killing process %s\n", current->comm);
94 return ret;
95
96out_sigbus:
97 up_read(&mm->mmap_sem);
98 current->thread.prot_addr = address;
99 current->thread.trap_no = 0x11;
100 force_sig(SIGBUS, current);
101 return ret;
102}
103
104static size_t __user_copy_pt(unsigned long uaddr, void *kptr,
105 size_t n, int write_user)
106{ 41{
107 struct mm_struct *mm = current->mm; 42 struct mm_struct *mm = current->mm;
108 unsigned long offset, pfn, done, size; 43 unsigned long offset, pfn, done, size;
@@ -114,12 +49,17 @@ retry:
114 spin_lock(&mm->page_table_lock); 49 spin_lock(&mm->page_table_lock);
115 do { 50 do {
116 pte = follow_table(mm, uaddr); 51 pte = follow_table(mm, uaddr);
117 if (!pte || !pte_present(*pte) || 52 if ((unsigned long) pte < 0x1000)
118 (write_user && !pte_write(*pte)))
119 goto fault; 53 goto fault;
54 if (!pte_present(*pte)) {
55 pte = (pte_t *) 0x11;
56 goto fault;
57 } else if (write_user && !pte_write(*pte)) {
58 pte = (pte_t *) 0x04;
59 goto fault;
60 }
120 61
121 pfn = pte_pfn(*pte); 62 pfn = pte_pfn(*pte);
122
123 offset = uaddr & (PAGE_SIZE - 1); 63 offset = uaddr & (PAGE_SIZE - 1);
124 size = min(n - done, PAGE_SIZE - offset); 64 size = min(n - done, PAGE_SIZE - offset);
125 if (write_user) { 65 if (write_user) {
@@ -137,7 +77,7 @@ retry:
137 return n - done; 77 return n - done;
138fault: 78fault:
139 spin_unlock(&mm->page_table_lock); 79 spin_unlock(&mm->page_table_lock);
140 if (__handle_fault(mm, uaddr, write_user)) 80 if (__handle_fault(uaddr, (unsigned long) pte, write_user))
141 return n - done; 81 return n - done;
142 goto retry; 82 goto retry;
143} 83}
@@ -146,30 +86,31 @@ fault:
146 * Do DAT for user address by page table walk, return kernel address. 86 * Do DAT for user address by page table walk, return kernel address.
147 * This function needs to be called with current->mm->page_table_lock held. 87 * This function needs to be called with current->mm->page_table_lock held.
148 */ 88 */
149static unsigned long __dat_user_addr(unsigned long uaddr) 89static __always_inline unsigned long __dat_user_addr(unsigned long uaddr)
150{ 90{
151 struct mm_struct *mm = current->mm; 91 struct mm_struct *mm = current->mm;
152 unsigned long pfn, ret; 92 unsigned long pfn;
153 pte_t *pte; 93 pte_t *pte;
154 int rc; 94 int rc;
155 95
156 ret = 0;
157retry: 96retry:
158 pte = follow_table(mm, uaddr); 97 pte = follow_table(mm, uaddr);
159 if (!pte || !pte_present(*pte)) 98 if ((unsigned long) pte < 0x1000)
160 goto fault; 99 goto fault;
100 if (!pte_present(*pte)) {
101 pte = (pte_t *) 0x11;
102 goto fault;
103 }
161 104
162 pfn = pte_pfn(*pte); 105 pfn = pte_pfn(*pte);
163 ret = (pfn << PAGE_SHIFT) + (uaddr & (PAGE_SIZE - 1)); 106 return (pfn << PAGE_SHIFT) + (uaddr & (PAGE_SIZE - 1));
164out:
165 return ret;
166fault: 107fault:
167 spin_unlock(&mm->page_table_lock); 108 spin_unlock(&mm->page_table_lock);
168 rc = __handle_fault(mm, uaddr, 0); 109 rc = __handle_fault(uaddr, (unsigned long) pte, 0);
169 spin_lock(&mm->page_table_lock); 110 spin_lock(&mm->page_table_lock);
170 if (rc) 111 if (!rc)
171 goto out; 112 goto retry;
172 goto retry; 113 return 0;
173} 114}
174 115
175size_t copy_from_user_pt(size_t n, const void __user *from, void *to) 116size_t copy_from_user_pt(size_t n, const void __user *from, void *to)
@@ -234,8 +175,12 @@ retry:
234 spin_lock(&mm->page_table_lock); 175 spin_lock(&mm->page_table_lock);
235 do { 176 do {
236 pte = follow_table(mm, uaddr); 177 pte = follow_table(mm, uaddr);
237 if (!pte || !pte_present(*pte)) 178 if ((unsigned long) pte < 0x1000)
179 goto fault;
180 if (!pte_present(*pte)) {
181 pte = (pte_t *) 0x11;
238 goto fault; 182 goto fault;
183 }
239 184
240 pfn = pte_pfn(*pte); 185 pfn = pte_pfn(*pte);
241 offset = uaddr & (PAGE_SIZE-1); 186 offset = uaddr & (PAGE_SIZE-1);
@@ -249,9 +194,8 @@ retry:
249 return done + 1; 194 return done + 1;
250fault: 195fault:
251 spin_unlock(&mm->page_table_lock); 196 spin_unlock(&mm->page_table_lock);
252 if (__handle_fault(mm, uaddr, 0)) { 197 if (__handle_fault(uaddr, (unsigned long) pte, 0))
253 return 0; 198 return 0;
254 }
255 goto retry; 199 goto retry;
256} 200}
257 201
@@ -284,7 +228,7 @@ static size_t copy_in_user_pt(size_t n, void __user *to,
284{ 228{
285 struct mm_struct *mm = current->mm; 229 struct mm_struct *mm = current->mm;
286 unsigned long offset_from, offset_to, offset_max, pfn_from, pfn_to, 230 unsigned long offset_from, offset_to, offset_max, pfn_from, pfn_to,
287 uaddr, done, size; 231 uaddr, done, size, error_code;
288 unsigned long uaddr_from = (unsigned long) from; 232 unsigned long uaddr_from = (unsigned long) from;
289 unsigned long uaddr_to = (unsigned long) to; 233 unsigned long uaddr_to = (unsigned long) to;
290 pte_t *pte_from, *pte_to; 234 pte_t *pte_from, *pte_to;
@@ -298,17 +242,28 @@ static size_t copy_in_user_pt(size_t n, void __user *to,
298retry: 242retry:
299 spin_lock(&mm->page_table_lock); 243 spin_lock(&mm->page_table_lock);
300 do { 244 do {
245 write_user = 0;
246 uaddr = uaddr_from;
301 pte_from = follow_table(mm, uaddr_from); 247 pte_from = follow_table(mm, uaddr_from);
302 if (!pte_from || !pte_present(*pte_from)) { 248 error_code = (unsigned long) pte_from;
303 uaddr = uaddr_from; 249 if (error_code < 0x1000)
304 write_user = 0; 250 goto fault;
251 if (!pte_present(*pte_from)) {
252 error_code = 0x11;
305 goto fault; 253 goto fault;
306 } 254 }
307 255
256 write_user = 1;
257 uaddr = uaddr_to;
308 pte_to = follow_table(mm, uaddr_to); 258 pte_to = follow_table(mm, uaddr_to);
309 if (!pte_to || !pte_present(*pte_to) || !pte_write(*pte_to)) { 259 error_code = (unsigned long) pte_to;
310 uaddr = uaddr_to; 260 if (error_code < 0x1000)
311 write_user = 1; 261 goto fault;
262 if (!pte_present(*pte_to)) {
263 error_code = 0x11;
264 goto fault;
265 } else if (!pte_write(*pte_to)) {
266 error_code = 0x04;
312 goto fault; 267 goto fault;
313 } 268 }
314 269
@@ -329,7 +284,7 @@ retry:
329 return n - done; 284 return n - done;
330fault: 285fault:
331 spin_unlock(&mm->page_table_lock); 286 spin_unlock(&mm->page_table_lock);
332 if (__handle_fault(mm, uaddr, write_user)) 287 if (__handle_fault(uaddr, error_code, write_user))
333 return n - done; 288 return n - done;
334 goto retry; 289 goto retry;
335} 290}
diff --git a/arch/s390/math-emu/math.c b/arch/s390/math-emu/math.c
index 3ee78ccb617d..cd4e9c168dd7 100644
--- a/arch/s390/math-emu/math.c
+++ b/arch/s390/math-emu/math.c
@@ -2088,7 +2088,7 @@ int math_emu_ldr(__u8 *opcode) {
2088 __u16 opc = *((__u16 *) opcode); 2088 __u16 opc = *((__u16 *) opcode);
2089 2089
2090 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */ 2090 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */
2091 /* we got an exception therfore ry can't be in {0,2,4,6} */ 2091 /* we got an exception therefore ry can't be in {0,2,4,6} */
2092 asm volatile( /* load rx from fp_regs.fprs[ry] */ 2092 asm volatile( /* load rx from fp_regs.fprs[ry] */
2093 " bras 1,0f\n" 2093 " bras 1,0f\n"
2094 " ld 0,0(%1)\n" 2094 " ld 0,0(%1)\n"
@@ -2118,7 +2118,7 @@ int math_emu_ler(__u8 *opcode) {
2118 __u16 opc = *((__u16 *) opcode); 2118 __u16 opc = *((__u16 *) opcode);
2119 2119
2120 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */ 2120 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */
2121 /* we got an exception therfore ry can't be in {0,2,4,6} */ 2121 /* we got an exception therefore ry can't be in {0,2,4,6} */
2122 asm volatile( /* load rx from fp_regs.fprs[ry] */ 2122 asm volatile( /* load rx from fp_regs.fprs[ry] */
2123 " bras 1,0f\n" 2123 " bras 1,0f\n"
2124 " le 0,0(%1)\n" 2124 " le 0,0(%1)\n"
diff --git a/arch/s390/mm/cmm.c b/arch/s390/mm/cmm.c
index ff58779bf7e9..76a3637b88e0 100644
--- a/arch/s390/mm/cmm.c
+++ b/arch/s390/mm/cmm.c
@@ -18,6 +18,7 @@
18#include <linux/swap.h> 18#include <linux/swap.h>
19#include <linux/kthread.h> 19#include <linux/kthread.h>
20#include <linux/oom.h> 20#include <linux/oom.h>
21#include <linux/suspend.h>
21 22
22#include <asm/pgalloc.h> 23#include <asm/pgalloc.h>
23#include <asm/uaccess.h> 24#include <asm/uaccess.h>
@@ -44,6 +45,7 @@ static volatile long cmm_pages_target;
44static volatile long cmm_timed_pages_target; 45static volatile long cmm_timed_pages_target;
45static long cmm_timeout_pages; 46static long cmm_timeout_pages;
46static long cmm_timeout_seconds; 47static long cmm_timeout_seconds;
48static int cmm_suspended;
47 49
48static struct cmm_page_array *cmm_page_list; 50static struct cmm_page_array *cmm_page_list;
49static struct cmm_page_array *cmm_timed_page_list; 51static struct cmm_page_array *cmm_timed_page_list;
@@ -147,9 +149,9 @@ cmm_thread(void *dummy)
147 149
148 while (1) { 150 while (1) {
149 rc = wait_event_interruptible(cmm_thread_wait, 151 rc = wait_event_interruptible(cmm_thread_wait,
150 (cmm_pages != cmm_pages_target || 152 (!cmm_suspended && (cmm_pages != cmm_pages_target ||
151 cmm_timed_pages != cmm_timed_pages_target || 153 cmm_timed_pages != cmm_timed_pages_target)) ||
152 kthread_should_stop())); 154 kthread_should_stop());
153 if (kthread_should_stop() || rc == -ERESTARTSYS) { 155 if (kthread_should_stop() || rc == -ERESTARTSYS) {
154 cmm_pages_target = cmm_pages; 156 cmm_pages_target = cmm_pages;
155 cmm_timed_pages_target = cmm_timed_pages; 157 cmm_timed_pages_target = cmm_timed_pages;
@@ -410,6 +412,38 @@ cmm_smsg_target(char *from, char *msg)
410 412
411static struct ctl_table_header *cmm_sysctl_header; 413static struct ctl_table_header *cmm_sysctl_header;
412 414
415static int cmm_suspend(void)
416{
417 cmm_suspended = 1;
418 cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list);
419 cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list);
420 return 0;
421}
422
423static int cmm_resume(void)
424{
425 cmm_suspended = 0;
426 cmm_kick_thread();
427 return 0;
428}
429
430static int cmm_power_event(struct notifier_block *this,
431 unsigned long event, void *ptr)
432{
433 switch (event) {
434 case PM_POST_HIBERNATION:
435 return cmm_resume();
436 case PM_HIBERNATION_PREPARE:
437 return cmm_suspend();
438 default:
439 return NOTIFY_DONE;
440 }
441}
442
443static struct notifier_block cmm_power_notifier = {
444 .notifier_call = cmm_power_event,
445};
446
413static int 447static int
414cmm_init (void) 448cmm_init (void)
415{ 449{
@@ -418,7 +452,7 @@ cmm_init (void)
418#ifdef CONFIG_CMM_PROC 452#ifdef CONFIG_CMM_PROC
419 cmm_sysctl_header = register_sysctl_table(cmm_dir_table); 453 cmm_sysctl_header = register_sysctl_table(cmm_dir_table);
420 if (!cmm_sysctl_header) 454 if (!cmm_sysctl_header)
421 goto out; 455 goto out_sysctl;
422#endif 456#endif
423#ifdef CONFIG_CMM_IUCV 457#ifdef CONFIG_CMM_IUCV
424 rc = smsg_register_callback(SMSG_PREFIX, cmm_smsg_target); 458 rc = smsg_register_callback(SMSG_PREFIX, cmm_smsg_target);
@@ -428,17 +462,21 @@ cmm_init (void)
428 rc = register_oom_notifier(&cmm_oom_nb); 462 rc = register_oom_notifier(&cmm_oom_nb);
429 if (rc < 0) 463 if (rc < 0)
430 goto out_oom_notify; 464 goto out_oom_notify;
465 rc = register_pm_notifier(&cmm_power_notifier);
466 if (rc)
467 goto out_pm;
431 init_waitqueue_head(&cmm_thread_wait); 468 init_waitqueue_head(&cmm_thread_wait);
432 init_timer(&cmm_timer); 469 init_timer(&cmm_timer);
433 cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); 470 cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread");
434 rc = IS_ERR(cmm_thread_ptr) ? PTR_ERR(cmm_thread_ptr) : 0; 471 rc = IS_ERR(cmm_thread_ptr) ? PTR_ERR(cmm_thread_ptr) : 0;
435 if (!rc) 472 if (rc)
436 goto out; 473 goto out_kthread;
437 /* 474 return 0;
438 * kthread_create failed. undo all the stuff from above again.
439 */
440 unregister_oom_notifier(&cmm_oom_nb);
441 475
476out_kthread:
477 unregister_pm_notifier(&cmm_power_notifier);
478out_pm:
479 unregister_oom_notifier(&cmm_oom_nb);
442out_oom_notify: 480out_oom_notify:
443#ifdef CONFIG_CMM_IUCV 481#ifdef CONFIG_CMM_IUCV
444 smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); 482 smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target);
@@ -446,8 +484,8 @@ out_smsg:
446#endif 484#endif
447#ifdef CONFIG_CMM_PROC 485#ifdef CONFIG_CMM_PROC
448 unregister_sysctl_table(cmm_sysctl_header); 486 unregister_sysctl_table(cmm_sysctl_header);
487out_sysctl:
449#endif 488#endif
450out:
451 return rc; 489 return rc;
452} 490}
453 491
@@ -455,6 +493,7 @@ static void
455cmm_exit(void) 493cmm_exit(void)
456{ 494{
457 kthread_stop(cmm_thread_ptr); 495 kthread_stop(cmm_thread_ptr);
496 unregister_pm_notifier(&cmm_power_notifier);
458 unregister_oom_notifier(&cmm_oom_nb); 497 unregister_oom_notifier(&cmm_oom_nb);
459 cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list); 498 cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list);
460 cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list); 499 cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list);
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 6d507462967a..fc102e70d9c2 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -34,16 +34,15 @@
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35#include <asm/s390_ext.h> 35#include <asm/s390_ext.h>
36#include <asm/mmu_context.h> 36#include <asm/mmu_context.h>
37#include <asm/compat.h>
37#include "../kernel/entry.h" 38#include "../kernel/entry.h"
38 39
39#ifndef CONFIG_64BIT 40#ifndef CONFIG_64BIT
40#define __FAIL_ADDR_MASK 0x7ffff000 41#define __FAIL_ADDR_MASK 0x7ffff000
41#define __FIXUP_MASK 0x7fffffff
42#define __SUBCODE_MASK 0x0200 42#define __SUBCODE_MASK 0x0200
43#define __PF_RES_FIELD 0ULL 43#define __PF_RES_FIELD 0ULL
44#else /* CONFIG_64BIT */ 44#else /* CONFIG_64BIT */
45#define __FAIL_ADDR_MASK -4096L 45#define __FAIL_ADDR_MASK -4096L
46#define __FIXUP_MASK ~0L
47#define __SUBCODE_MASK 0x0600 46#define __SUBCODE_MASK 0x0600
48#define __PF_RES_FIELD 0x8000000000000000ULL 47#define __PF_RES_FIELD 0x8000000000000000ULL
49#endif /* CONFIG_64BIT */ 48#endif /* CONFIG_64BIT */
@@ -52,11 +51,15 @@
52extern int sysctl_userprocess_debug; 51extern int sysctl_userprocess_debug;
53#endif 52#endif
54 53
55#ifdef CONFIG_KPROBES 54#define VM_FAULT_BADCONTEXT 0x010000
56static inline int notify_page_fault(struct pt_regs *regs, long err) 55#define VM_FAULT_BADMAP 0x020000
56#define VM_FAULT_BADACCESS 0x040000
57
58static inline int notify_page_fault(struct pt_regs *regs)
57{ 59{
58 int ret = 0; 60 int ret = 0;
59 61
62#ifdef CONFIG_KPROBES
60 /* kprobe_running() needs smp_processor_id() */ 63 /* kprobe_running() needs smp_processor_id() */
61 if (!user_mode(regs)) { 64 if (!user_mode(regs)) {
62 preempt_disable(); 65 preempt_disable();
@@ -64,15 +67,9 @@ static inline int notify_page_fault(struct pt_regs *regs, long err)
64 ret = 1; 67 ret = 1;
65 preempt_enable(); 68 preempt_enable();
66 } 69 }
67 70#endif
68 return ret; 71 return ret;
69} 72}
70#else
71static inline int notify_page_fault(struct pt_regs *regs, long err)
72{
73 return 0;
74}
75#endif
76 73
77 74
78/* 75/*
@@ -100,57 +97,50 @@ void bust_spinlocks(int yes)
100 97
101/* 98/*
102 * Returns the address space associated with the fault. 99 * Returns the address space associated with the fault.
103 * Returns 0 for kernel space, 1 for user space and 100 * Returns 0 for kernel space and 1 for user space.
104 * 2 for code execution in user space with noexec=on.
105 */ 101 */
106static inline int check_space(struct task_struct *tsk) 102static inline int user_space_fault(unsigned long trans_exc_code)
107{ 103{
108 /* 104 /*
109 * The lowest two bits of S390_lowcore.trans_exc_code 105 * The lowest two bits of the translation exception
110 * indicate which paging table was used. 106 * identification indicate which paging table was used.
111 */ 107 */
112 int desc = S390_lowcore.trans_exc_code & 3; 108 trans_exc_code &= 3;
113 109 if (trans_exc_code == 2)
114 if (desc == 3) /* Home Segment Table Descriptor */ 110 /* Access via secondary space, set_fs setting decides */
115 return switch_amode == 0; 111 return current->thread.mm_segment.ar4;
116 if (desc == 2) /* Secondary Segment Table Descriptor */ 112 if (user_mode == HOME_SPACE_MODE)
117 return tsk->thread.mm_segment.ar4; 113 /* User space if the access has been done via home space. */
118#ifdef CONFIG_S390_SWITCH_AMODE 114 return trans_exc_code == 3;
119 if (unlikely(desc == 1)) { /* STD determined via access register */ 115 /*
120 /* %a0 always indicates primary space. */ 116 * If the user space is not the home space the kernel runs in home
121 if (S390_lowcore.exc_access_id != 0) { 117 * space. Access via secondary space has already been covered,
122 save_access_regs(tsk->thread.acrs); 118 * access via primary space or access register is from user space
123 /* 119 * and access via home space is from the kernel.
124 * An alet of 0 indicates primary space. 120 */
125 * An alet of 1 indicates secondary space. 121 return trans_exc_code != 3;
126 * Any other alet values generate an
127 * alen-translation exception.
128 */
129 if (tsk->thread.acrs[S390_lowcore.exc_access_id])
130 return tsk->thread.mm_segment.ar4;
131 }
132 }
133#endif
134 /* Primary Segment Table Descriptor */
135 return switch_amode << s390_noexec;
136} 122}
137 123
138/* 124/*
139 * Send SIGSEGV to task. This is an external routine 125 * Send SIGSEGV to task. This is an external routine
140 * to keep the stack usage of do_page_fault small. 126 * to keep the stack usage of do_page_fault small.
141 */ 127 */
142static void do_sigsegv(struct pt_regs *regs, unsigned long error_code, 128static noinline void do_sigsegv(struct pt_regs *regs, long int_code,
143 int si_code, unsigned long address) 129 int si_code, unsigned long trans_exc_code)
144{ 130{
145 struct siginfo si; 131 struct siginfo si;
132 unsigned long address;
146 133
134 address = trans_exc_code & __FAIL_ADDR_MASK;
135 current->thread.prot_addr = address;
136 current->thread.trap_no = int_code;
147#if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG) 137#if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG)
148#if defined(CONFIG_SYSCTL) 138#if defined(CONFIG_SYSCTL)
149 if (sysctl_userprocess_debug) 139 if (sysctl_userprocess_debug)
150#endif 140#endif
151 { 141 {
152 printk("User process fault: interruption code 0x%lX\n", 142 printk("User process fault: interruption code 0x%lX\n",
153 error_code); 143 int_code);
154 printk("failing address: %lX\n", address); 144 printk("failing address: %lX\n", address);
155 show_regs(regs); 145 show_regs(regs);
156 } 146 }
@@ -161,13 +151,14 @@ static void do_sigsegv(struct pt_regs *regs, unsigned long error_code,
161 force_sig_info(SIGSEGV, &si, current); 151 force_sig_info(SIGSEGV, &si, current);
162} 152}
163 153
164static void do_no_context(struct pt_regs *regs, unsigned long error_code, 154static noinline void do_no_context(struct pt_regs *regs, long int_code,
165 unsigned long address) 155 unsigned long trans_exc_code)
166{ 156{
167 const struct exception_table_entry *fixup; 157 const struct exception_table_entry *fixup;
158 unsigned long address;
168 159
169 /* Are we prepared to handle this kernel fault? */ 160 /* Are we prepared to handle this kernel fault? */
170 fixup = search_exception_tables(regs->psw.addr & __FIXUP_MASK); 161 fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
171 if (fixup) { 162 if (fixup) {
172 regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE; 163 regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
173 return; 164 return;
@@ -177,129 +168,149 @@ static void do_no_context(struct pt_regs *regs, unsigned long error_code,
177 * Oops. The kernel tried to access some bad page. We'll have to 168 * Oops. The kernel tried to access some bad page. We'll have to
178 * terminate things with extreme prejudice. 169 * terminate things with extreme prejudice.
179 */ 170 */
180 if (check_space(current) == 0) 171 address = trans_exc_code & __FAIL_ADDR_MASK;
172 if (!user_space_fault(trans_exc_code))
181 printk(KERN_ALERT "Unable to handle kernel pointer dereference" 173 printk(KERN_ALERT "Unable to handle kernel pointer dereference"
182 " at virtual kernel address %p\n", (void *)address); 174 " at virtual kernel address %p\n", (void *)address);
183 else 175 else
184 printk(KERN_ALERT "Unable to handle kernel paging request" 176 printk(KERN_ALERT "Unable to handle kernel paging request"
185 " at virtual user address %p\n", (void *)address); 177 " at virtual user address %p\n", (void *)address);
186 178
187 die("Oops", regs, error_code); 179 die("Oops", regs, int_code);
188 do_exit(SIGKILL); 180 do_exit(SIGKILL);
189} 181}
190 182
191static void do_low_address(struct pt_regs *regs, unsigned long error_code) 183static noinline void do_low_address(struct pt_regs *regs, long int_code,
184 unsigned long trans_exc_code)
192{ 185{
193 /* Low-address protection hit in kernel mode means 186 /* Low-address protection hit in kernel mode means
194 NULL pointer write access in kernel mode. */ 187 NULL pointer write access in kernel mode. */
195 if (regs->psw.mask & PSW_MASK_PSTATE) { 188 if (regs->psw.mask & PSW_MASK_PSTATE) {
196 /* Low-address protection hit in user mode 'cannot happen'. */ 189 /* Low-address protection hit in user mode 'cannot happen'. */
197 die ("Low-address protection", regs, error_code); 190 die ("Low-address protection", regs, int_code);
198 do_exit(SIGKILL); 191 do_exit(SIGKILL);
199 } 192 }
200 193
201 do_no_context(regs, error_code, 0); 194 do_no_context(regs, int_code, trans_exc_code);
202} 195}
203 196
204static void do_sigbus(struct pt_regs *regs, unsigned long error_code, 197static noinline void do_sigbus(struct pt_regs *regs, long int_code,
205 unsigned long address) 198 unsigned long trans_exc_code)
206{ 199{
207 struct task_struct *tsk = current; 200 struct task_struct *tsk = current;
208 struct mm_struct *mm = tsk->mm;
209 201
210 up_read(&mm->mmap_sem);
211 /* 202 /*
212 * Send a sigbus, regardless of whether we were in kernel 203 * Send a sigbus, regardless of whether we were in kernel
213 * or user mode. 204 * or user mode.
214 */ 205 */
215 tsk->thread.prot_addr = address; 206 tsk->thread.prot_addr = trans_exc_code & __FAIL_ADDR_MASK;
216 tsk->thread.trap_no = error_code; 207 tsk->thread.trap_no = int_code;
217 force_sig(SIGBUS, tsk); 208 force_sig(SIGBUS, tsk);
218
219 /* Kernel mode? Handle exceptions or die */
220 if (!(regs->psw.mask & PSW_MASK_PSTATE))
221 do_no_context(regs, error_code, address);
222} 209}
223 210
224#ifdef CONFIG_S390_EXEC_PROTECT 211#ifdef CONFIG_S390_EXEC_PROTECT
225static int signal_return(struct mm_struct *mm, struct pt_regs *regs, 212static noinline int signal_return(struct pt_regs *regs, long int_code,
226 unsigned long address, unsigned long error_code) 213 unsigned long trans_exc_code)
227{ 214{
228 u16 instruction; 215 u16 instruction;
229 int rc; 216 int rc;
230#ifdef CONFIG_COMPAT
231 int compat;
232#endif
233 217
234 pagefault_disable();
235 rc = __get_user(instruction, (u16 __user *) regs->psw.addr); 218 rc = __get_user(instruction, (u16 __user *) regs->psw.addr);
236 pagefault_enable();
237 if (rc)
238 return -EFAULT;
239 219
240 up_read(&mm->mmap_sem); 220 if (!rc && instruction == 0x0a77) {
241 clear_tsk_thread_flag(current, TIF_SINGLE_STEP); 221 clear_tsk_thread_flag(current, TIF_SINGLE_STEP);
242#ifdef CONFIG_COMPAT 222 if (is_compat_task())
243 compat = is_compat_task(); 223 sys32_sigreturn();
244 if (compat && instruction == 0x0a77) 224 else
245 sys32_sigreturn(); 225 sys_sigreturn();
246 else if (compat && instruction == 0x0aad) 226 } else if (!rc && instruction == 0x0aad) {
247 sys32_rt_sigreturn(); 227 clear_tsk_thread_flag(current, TIF_SINGLE_STEP);
248 else 228 if (is_compat_task())
249#endif 229 sys32_rt_sigreturn();
250 if (instruction == 0x0a77) 230 else
251 sys_sigreturn(); 231 sys_rt_sigreturn();
252 else if (instruction == 0x0aad) 232 } else
253 sys_rt_sigreturn(); 233 do_sigsegv(regs, int_code, SEGV_MAPERR, trans_exc_code);
254 else {
255 current->thread.prot_addr = address;
256 current->thread.trap_no = error_code;
257 do_sigsegv(regs, error_code, SEGV_MAPERR, address);
258 }
259 return 0; 234 return 0;
260} 235}
261#endif /* CONFIG_S390_EXEC_PROTECT */ 236#endif /* CONFIG_S390_EXEC_PROTECT */
262 237
238static noinline void do_fault_error(struct pt_regs *regs, long int_code,
239 unsigned long trans_exc_code, int fault)
240{
241 int si_code;
242
243 switch (fault) {
244 case VM_FAULT_BADACCESS:
245#ifdef CONFIG_S390_EXEC_PROTECT
246 if ((regs->psw.mask & PSW_MASK_ASC) == PSW_ASC_SECONDARY &&
247 (trans_exc_code & 3) == 0) {
248 signal_return(regs, int_code, trans_exc_code);
249 break;
250 }
251#endif /* CONFIG_S390_EXEC_PROTECT */
252 case VM_FAULT_BADMAP:
253 /* Bad memory access. Check if it is kernel or user space. */
254 if (regs->psw.mask & PSW_MASK_PSTATE) {
255 /* User mode accesses just cause a SIGSEGV */
256 si_code = (fault == VM_FAULT_BADMAP) ?
257 SEGV_MAPERR : SEGV_ACCERR;
258 do_sigsegv(regs, int_code, si_code, trans_exc_code);
259 return;
260 }
261 case VM_FAULT_BADCONTEXT:
262 do_no_context(regs, int_code, trans_exc_code);
263 break;
264 default: /* fault & VM_FAULT_ERROR */
265 if (fault & VM_FAULT_OOM)
266 pagefault_out_of_memory();
267 else if (fault & VM_FAULT_SIGBUS) {
268 do_sigbus(regs, int_code, trans_exc_code);
269 /* Kernel mode? Handle exceptions or die */
270 if (!(regs->psw.mask & PSW_MASK_PSTATE))
271 do_no_context(regs, int_code, trans_exc_code);
272 } else
273 BUG();
274 break;
275 }
276}
277
263/* 278/*
264 * This routine handles page faults. It determines the address, 279 * This routine handles page faults. It determines the address,
265 * and the problem, and then passes it off to one of the appropriate 280 * and the problem, and then passes it off to one of the appropriate
266 * routines. 281 * routines.
267 * 282 *
268 * error_code: 283 * interruption code (int_code):
269 * 04 Protection -> Write-Protection (suprression) 284 * 04 Protection -> Write-Protection (suprression)
270 * 10 Segment translation -> Not present (nullification) 285 * 10 Segment translation -> Not present (nullification)
271 * 11 Page translation -> Not present (nullification) 286 * 11 Page translation -> Not present (nullification)
272 * 3b Region third trans. -> Not present (nullification) 287 * 3b Region third trans. -> Not present (nullification)
273 */ 288 */
274static inline void 289static inline int do_exception(struct pt_regs *regs, int access,
275do_exception(struct pt_regs *regs, unsigned long error_code, int write) 290 unsigned long trans_exc_code)
276{ 291{
277 struct task_struct *tsk; 292 struct task_struct *tsk;
278 struct mm_struct *mm; 293 struct mm_struct *mm;
279 struct vm_area_struct *vma; 294 struct vm_area_struct *vma;
280 unsigned long address; 295 unsigned long address;
281 int space;
282 int si_code;
283 int fault; 296 int fault;
284 297
285 if (notify_page_fault(regs, error_code)) 298 if (notify_page_fault(regs))
286 return; 299 return 0;
287 300
288 tsk = current; 301 tsk = current;
289 mm = tsk->mm; 302 mm = tsk->mm;
290 303
291 /* get the failing address and the affected space */
292 address = S390_lowcore.trans_exc_code & __FAIL_ADDR_MASK;
293 space = check_space(tsk);
294
295 /* 304 /*
296 * Verify that the fault happened in user space, that 305 * Verify that the fault happened in user space, that
297 * we are not in an interrupt and that there is a 306 * we are not in an interrupt and that there is a
298 * user context. 307 * user context.
299 */ 308 */
300 if (unlikely(space == 0 || in_atomic() || !mm)) 309 fault = VM_FAULT_BADCONTEXT;
301 goto no_context; 310 if (unlikely(!user_space_fault(trans_exc_code) || in_atomic() || !mm))
311 goto out;
302 312
313 address = trans_exc_code & __FAIL_ADDR_MASK;
303 /* 314 /*
304 * When we get here, the fault happened in the current 315 * When we get here, the fault happened in the current
305 * task's user address space, so we can switch on the 316 * task's user address space, so we can switch on the
@@ -309,42 +320,26 @@ do_exception(struct pt_regs *regs, unsigned long error_code, int write)
309 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); 320 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
310 down_read(&mm->mmap_sem); 321 down_read(&mm->mmap_sem);
311 322
312 si_code = SEGV_MAPERR; 323 fault = VM_FAULT_BADMAP;
313 vma = find_vma(mm, address); 324 vma = find_vma(mm, address);
314 if (!vma) 325 if (!vma)
315 goto bad_area; 326 goto out_up;
316
317#ifdef CONFIG_S390_EXEC_PROTECT
318 if (unlikely((space == 2) && !(vma->vm_flags & VM_EXEC)))
319 if (!signal_return(mm, regs, address, error_code))
320 /*
321 * signal_return() has done an up_read(&mm->mmap_sem)
322 * if it returns 0.
323 */
324 return;
325#endif
326 327
327 if (vma->vm_start <= address) 328 if (unlikely(vma->vm_start > address)) {
328 goto good_area; 329 if (!(vma->vm_flags & VM_GROWSDOWN))
329 if (!(vma->vm_flags & VM_GROWSDOWN)) 330 goto out_up;
330 goto bad_area; 331 if (expand_stack(vma, address))
331 if (expand_stack(vma, address)) 332 goto out_up;
332 goto bad_area;
333/*
334 * Ok, we have a good vm_area for this memory access, so
335 * we can handle it..
336 */
337good_area:
338 si_code = SEGV_ACCERR;
339 if (!write) {
340 /* page not present, check vm flags */
341 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
342 goto bad_area;
343 } else {
344 if (!(vma->vm_flags & VM_WRITE))
345 goto bad_area;
346 } 333 }
347 334
335 /*
336 * Ok, we have a good vm_area for this memory access, so
337 * we can handle it..
338 */
339 fault = VM_FAULT_BADACCESS;
340 if (unlikely(!(vma->vm_flags & access)))
341 goto out_up;
342
348 if (is_vm_hugetlb_page(vma)) 343 if (is_vm_hugetlb_page(vma))
349 address &= HPAGE_MASK; 344 address &= HPAGE_MASK;
350 /* 345 /*
@@ -352,18 +347,11 @@ good_area:
352 * make sure we exit gracefully rather than endlessly redo 347 * make sure we exit gracefully rather than endlessly redo
353 * the fault. 348 * the fault.
354 */ 349 */
355 fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0); 350 fault = handle_mm_fault(mm, vma, address,
356 if (unlikely(fault & VM_FAULT_ERROR)) { 351 (access == VM_WRITE) ? FAULT_FLAG_WRITE : 0);
357 if (fault & VM_FAULT_OOM) { 352 if (unlikely(fault & VM_FAULT_ERROR))
358 up_read(&mm->mmap_sem); 353 goto out_up;
359 pagefault_out_of_memory(); 354
360 return;
361 } else if (fault & VM_FAULT_SIGBUS) {
362 do_sigbus(regs, error_code, address);
363 return;
364 }
365 BUG();
366 }
367 if (fault & VM_FAULT_MAJOR) { 355 if (fault & VM_FAULT_MAJOR) {
368 tsk->maj_flt++; 356 tsk->maj_flt++;
369 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0, 357 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
@@ -373,74 +361,69 @@ good_area:
373 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0, 361 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
374 regs, address); 362 regs, address);
375 } 363 }
376 up_read(&mm->mmap_sem);
377 /* 364 /*
378 * The instruction that caused the program check will 365 * The instruction that caused the program check will
379 * be repeated. Don't signal single step via SIGTRAP. 366 * be repeated. Don't signal single step via SIGTRAP.
380 */ 367 */
381 clear_tsk_thread_flag(tsk, TIF_SINGLE_STEP); 368 clear_tsk_thread_flag(tsk, TIF_SINGLE_STEP);
382 return; 369 fault = 0;
383 370out_up:
384/*
385 * Something tried to access memory that isn't in our memory map..
386 * Fix it, but check if it's kernel or user first..
387 */
388bad_area:
389 up_read(&mm->mmap_sem); 371 up_read(&mm->mmap_sem);
390 372out:
391 /* User mode accesses just cause a SIGSEGV */ 373 return fault;
392 if (regs->psw.mask & PSW_MASK_PSTATE) {
393 tsk->thread.prot_addr = address;
394 tsk->thread.trap_no = error_code;
395 do_sigsegv(regs, error_code, si_code, address);
396 return;
397 }
398
399no_context:
400 do_no_context(regs, error_code, address);
401} 374}
402 375
403void __kprobes do_protection_exception(struct pt_regs *regs, 376void __kprobes do_protection_exception(struct pt_regs *regs, long int_code)
404 long error_code)
405{ 377{
378 unsigned long trans_exc_code = S390_lowcore.trans_exc_code;
379 int fault;
380
406 /* Protection exception is supressing, decrement psw address. */ 381 /* Protection exception is supressing, decrement psw address. */
407 regs->psw.addr -= (error_code >> 16); 382 regs->psw.addr -= (int_code >> 16);
408 /* 383 /*
409 * Check for low-address protection. This needs to be treated 384 * Check for low-address protection. This needs to be treated
410 * as a special case because the translation exception code 385 * as a special case because the translation exception code
411 * field is not guaranteed to contain valid data in this case. 386 * field is not guaranteed to contain valid data in this case.
412 */ 387 */
413 if (unlikely(!(S390_lowcore.trans_exc_code & 4))) { 388 if (unlikely(!(trans_exc_code & 4))) {
414 do_low_address(regs, error_code); 389 do_low_address(regs, int_code, trans_exc_code);
415 return; 390 return;
416 } 391 }
417 do_exception(regs, 4, 1); 392 fault = do_exception(regs, VM_WRITE, trans_exc_code);
393 if (unlikely(fault))
394 do_fault_error(regs, 4, trans_exc_code, fault);
418} 395}
419 396
420void __kprobes do_dat_exception(struct pt_regs *regs, long error_code) 397void __kprobes do_dat_exception(struct pt_regs *regs, long int_code)
421{ 398{
422 do_exception(regs, error_code & 0xff, 0); 399 unsigned long trans_exc_code = S390_lowcore.trans_exc_code;
400 int access, fault;
401
402 access = VM_READ | VM_EXEC | VM_WRITE;
403#ifdef CONFIG_S390_EXEC_PROTECT
404 if ((regs->psw.mask & PSW_MASK_ASC) == PSW_ASC_SECONDARY &&
405 (trans_exc_code & 3) == 0)
406 access = VM_EXEC;
407#endif
408 fault = do_exception(regs, access, trans_exc_code);
409 if (unlikely(fault))
410 do_fault_error(regs, int_code & 255, trans_exc_code, fault);
423} 411}
424 412
425#ifdef CONFIG_64BIT 413#ifdef CONFIG_64BIT
426void __kprobes do_asce_exception(struct pt_regs *regs, unsigned long error_code) 414void __kprobes do_asce_exception(struct pt_regs *regs, long int_code)
427{ 415{
428 struct mm_struct *mm; 416 unsigned long trans_exc_code = S390_lowcore.trans_exc_code;
417 struct mm_struct *mm = current->mm;
429 struct vm_area_struct *vma; 418 struct vm_area_struct *vma;
430 unsigned long address;
431 int space;
432
433 mm = current->mm;
434 address = S390_lowcore.trans_exc_code & __FAIL_ADDR_MASK;
435 space = check_space(current);
436 419
437 if (unlikely(space == 0 || in_atomic() || !mm)) 420 if (unlikely(!user_space_fault(trans_exc_code) || in_atomic() || !mm))
438 goto no_context; 421 goto no_context;
439 422
440 local_irq_enable(); 423 local_irq_enable();
441 424
442 down_read(&mm->mmap_sem); 425 down_read(&mm->mmap_sem);
443 vma = find_vma(mm, address); 426 vma = find_vma(mm, trans_exc_code & __FAIL_ADDR_MASK);
444 up_read(&mm->mmap_sem); 427 up_read(&mm->mmap_sem);
445 428
446 if (vma) { 429 if (vma) {
@@ -450,17 +433,38 @@ void __kprobes do_asce_exception(struct pt_regs *regs, unsigned long error_code)
450 433
451 /* User mode accesses just cause a SIGSEGV */ 434 /* User mode accesses just cause a SIGSEGV */
452 if (regs->psw.mask & PSW_MASK_PSTATE) { 435 if (regs->psw.mask & PSW_MASK_PSTATE) {
453 current->thread.prot_addr = address; 436 do_sigsegv(regs, int_code, SEGV_MAPERR, trans_exc_code);
454 current->thread.trap_no = error_code;
455 do_sigsegv(regs, error_code, SEGV_MAPERR, address);
456 return; 437 return;
457 } 438 }
458 439
459no_context: 440no_context:
460 do_no_context(regs, error_code, address); 441 do_no_context(regs, int_code, trans_exc_code);
461} 442}
462#endif 443#endif
463 444
445int __handle_fault(unsigned long uaddr, unsigned long int_code, int write_user)
446{
447 struct pt_regs regs;
448 int access, fault;
449
450 regs.psw.mask = psw_kernel_bits;
451 if (!irqs_disabled())
452 regs.psw.mask |= PSW_MASK_IO | PSW_MASK_EXT;
453 regs.psw.addr = (unsigned long) __builtin_return_address(0);
454 regs.psw.addr |= PSW_ADDR_AMODE;
455 uaddr &= PAGE_MASK;
456 access = write_user ? VM_WRITE : VM_READ;
457 fault = do_exception(&regs, access, uaddr | 2);
458 if (unlikely(fault)) {
459 if (fault & VM_FAULT_OOM) {
460 pagefault_out_of_memory();
461 fault = 0;
462 } else if (fault & VM_FAULT_SIGBUS)
463 do_sigbus(&regs, int_code, uaddr);
464 }
465 return fault ? -EFAULT : 0;
466}
467
464#ifdef CONFIG_PFAULT 468#ifdef CONFIG_PFAULT
465/* 469/*
466 * 'pfault' pseudo page faults routines. 470 * 'pfault' pseudo page faults routines.
@@ -522,7 +526,7 @@ void pfault_fini(void)
522 : : "a" (&refbk), "m" (refbk) : "cc"); 526 : : "a" (&refbk), "m" (refbk) : "cc");
523} 527}
524 528
525static void pfault_interrupt(__u16 error_code) 529static void pfault_interrupt(__u16 int_code)
526{ 530{
527 struct task_struct *tsk; 531 struct task_struct *tsk;
528 __u16 subcode; 532 __u16 subcode;
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 2757c5616a07..ad621e06ada3 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -269,7 +269,7 @@ int s390_enable_sie(void)
269 struct mm_struct *mm, *old_mm; 269 struct mm_struct *mm, *old_mm;
270 270
271 /* Do we have switched amode? If no, we cannot do sie */ 271 /* Do we have switched amode? If no, we cannot do sie */
272 if (!switch_amode) 272 if (user_mode == HOME_SPACE_MODE)
273 return -EINVAL; 273 return -EINVAL;
274 274
275 /* Do we have pgstes? if yes, we are done */ 275 /* Do we have pgstes? if yes, we are done */
diff --git a/arch/s390/mm/vmem.c b/arch/s390/mm/vmem.c
index 5f91a38d7592..300ab012b0fd 100644
--- a/arch/s390/mm/vmem.c
+++ b/arch/s390/mm/vmem.c
@@ -70,8 +70,12 @@ static pte_t __ref *vmem_pte_alloc(void)
70 pte = alloc_bootmem(PTRS_PER_PTE * sizeof(pte_t)); 70 pte = alloc_bootmem(PTRS_PER_PTE * sizeof(pte_t));
71 if (!pte) 71 if (!pte)
72 return NULL; 72 return NULL;
73 clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY, 73 if (MACHINE_HAS_HPAGE)
74 PTRS_PER_PTE * sizeof(pte_t)); 74 clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY | _PAGE_CO,
75 PTRS_PER_PTE * sizeof(pte_t));
76 else
77 clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY,
78 PTRS_PER_PTE * sizeof(pte_t));
75 return pte; 79 return pte;
76} 80}
77 81
@@ -112,7 +116,8 @@ static int vmem_add_mem(unsigned long start, unsigned long size, int ro)
112 if (MACHINE_HAS_HPAGE && !(address & ~HPAGE_MASK) && 116 if (MACHINE_HAS_HPAGE && !(address & ~HPAGE_MASK) &&
113 (address + HPAGE_SIZE <= start + size) && 117 (address + HPAGE_SIZE <= start + size) &&
114 (address >= HPAGE_SIZE)) { 118 (address >= HPAGE_SIZE)) {
115 pte_val(pte) |= _SEGMENT_ENTRY_LARGE; 119 pte_val(pte) |= _SEGMENT_ENTRY_LARGE |
120 _SEGMENT_ENTRY_CO;
116 pmd_val(*pm_dir) = pte_val(pte); 121 pmd_val(*pm_dir) = pte_val(pte);
117 address += HPAGE_SIZE - PAGE_SIZE; 122 address += HPAGE_SIZE - PAGE_SIZE;
118 continue; 123 continue;
diff --git a/arch/score/kernel/sys_score.c b/arch/score/kernel/sys_score.c
index 001249469866..856ed68a58e6 100644
--- a/arch/score/kernel/sys_score.c
+++ b/arch/score/kernel/sys_score.c
@@ -36,34 +36,16 @@ asmlinkage long
36sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 36sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
37 unsigned long flags, unsigned long fd, unsigned long pgoff) 37 unsigned long flags, unsigned long fd, unsigned long pgoff)
38{ 38{
39 int error = -EBADF; 39 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
40 struct file *file = NULL;
41
42 if (pgoff & (~PAGE_MASK >> 12))
43 return -EINVAL;
44
45 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
46 if (!(flags & MAP_ANONYMOUS)) {
47 file = fget(fd);
48 if (!file)
49 return error;
50 }
51
52 down_write(&current->mm->mmap_sem);
53 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
54 up_write(&current->mm->mmap_sem);
55
56 if (file)
57 fput(file);
58
59 return error;
60} 40}
61 41
62asmlinkage long 42asmlinkage long
63sys_mmap(unsigned long addr, unsigned long len, unsigned long prot, 43sys_mmap(unsigned long addr, unsigned long len, unsigned long prot,
64 unsigned long flags, unsigned long fd, off_t pgoff) 44 unsigned long flags, unsigned long fd, off_t offset)
65{ 45{
66 return sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT); 46 if (unlikely(offset & ~PAGE_MASK))
47 return -EINVAL;
48 return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
67} 49}
68 50
69asmlinkage long 51asmlinkage long
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 88cdeb9f72d9..0031a6979f3a 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -16,7 +16,9 @@ config SUPERH
16 select HAVE_IOREMAP_PROT if MMU 16 select HAVE_IOREMAP_PROT if MMU
17 select HAVE_ARCH_TRACEHOOK 17 select HAVE_ARCH_TRACEHOOK
18 select HAVE_DMA_API_DEBUG 18 select HAVE_DMA_API_DEBUG
19 select HAVE_DMA_ATTRS
19 select HAVE_PERF_EVENTS 20 select HAVE_PERF_EVENTS
21 select PERF_USE_VMALLOC
20 select HAVE_KERNEL_GZIP 22 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_BZIP2 23 select HAVE_KERNEL_BZIP2
22 select HAVE_KERNEL_LZMA 24 select HAVE_KERNEL_LZMA
@@ -37,6 +39,7 @@ config SUPERH32
37 select HAVE_FTRACE_MCOUNT_RECORD 39 select HAVE_FTRACE_MCOUNT_RECORD
38 select HAVE_DYNAMIC_FTRACE 40 select HAVE_DYNAMIC_FTRACE
39 select HAVE_FUNCTION_TRACE_MCOUNT_TEST 41 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
42 select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE
40 select HAVE_FUNCTION_GRAPH_TRACER 43 select HAVE_FUNCTION_GRAPH_TRACER
41 select HAVE_ARCH_KGDB 44 select HAVE_ARCH_KGDB
42 select ARCH_HIBERNATION_POSSIBLE if MMU 45 select ARCH_HIBERNATION_POSSIBLE if MMU
@@ -170,6 +173,12 @@ config ARCH_HAS_CPU_IDLE_WAIT
170config IO_TRAPPED 173config IO_TRAPPED
171 bool 174 bool
172 175
176config DMA_COHERENT
177 bool
178
179config DMA_NONCOHERENT
180 def_bool !DMA_COHERENT
181
173source "init/Kconfig" 182source "init/Kconfig"
174 183
175source "kernel/Kconfig.freezer" 184source "kernel/Kconfig.freezer"
@@ -220,6 +229,7 @@ config CPU_SHX2
220 229
221config CPU_SHX3 230config CPU_SHX3
222 bool 231 bool
232 select DMA_COHERENT
223 233
224config ARCH_SHMOBILE 234config ARCH_SHMOBILE
225 bool 235 bool
@@ -761,17 +771,6 @@ config ENTRY_OFFSET
761 default "0x00010000" if PAGE_SIZE_64KB 771 default "0x00010000" if PAGE_SIZE_64KB
762 default "0x00000000" 772 default "0x00000000"
763 773
764config UBC_WAKEUP
765 bool "Wakeup UBC on startup"
766 depends on CPU_SH4 && !CPU_SH4A
767 help
768 Selecting this option will wakeup the User Break Controller (UBC) on
769 startup. Although the UBC is left in an awake state when the processor
770 comes up, some boot loaders misbehave by putting the UBC to sleep in a
771 power saving state, which causes issues with things like ptrace().
772
773 If unsure, say N.
774
775choice 774choice
776 prompt "Kernel command line" 775 prompt "Kernel command line"
777 optional 776 optional
@@ -818,7 +817,13 @@ config MAPLE
818 Dreamcast with a serial line terminal or a remote network 817 Dreamcast with a serial line terminal or a remote network
819 connection. 818 connection.
820 819
821source "arch/sh/drivers/pci/Kconfig" 820config PCI
821 bool "PCI support"
822 depends on SYS_SUPPORTS_PCI
823 help
824 Find out whether you have a PCI motherboard. PCI is the name of a
825 bus system, i.e. the way the CPU talks to the other stuff inside
826 your box. If you have PCI, say Y, otherwise N.
822 827
823source "drivers/pci/pcie/Kconfig" 828source "drivers/pci/pcie/Kconfig"
824 829
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 66e40aabc600..ac17c5ac550e 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -78,6 +78,9 @@ defaultimage-$(CONFIG_SUPERH32) := zImage
78defaultimage-$(CONFIG_SH_SH7785LCR) := uImage 78defaultimage-$(CONFIG_SH_SH7785LCR) := uImage
79defaultimage-$(CONFIG_SH_RSK) := uImage 79defaultimage-$(CONFIG_SH_RSK) := uImage
80defaultimage-$(CONFIG_SH_URQUELL) := uImage 80defaultimage-$(CONFIG_SH_URQUELL) := uImage
81defaultimage-$(CONFIG_SH_MIGOR) := uImage
82defaultimage-$(CONFIG_SH_AP325RXA) := uImage
83defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage
81defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux 84defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux
82defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux 85defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux
83 86
@@ -136,6 +139,7 @@ machdir-$(CONFIG_SH_7751_SYSTEMH) += mach-systemh
136machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705 139machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705
137machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander 140machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander
138machdir-$(CONFIG_SH_MIGOR) += mach-migor 141machdir-$(CONFIG_SH_MIGOR) += mach-migor
142machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
139machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09 143machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09
140machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24 144machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24
141machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780 145machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 7baa21090231..ce0f26381784 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -1,7 +1,6 @@
1# 1#
2# Specific board support, not covered by a mach group. 2# Specific board support, not covered by a mach group.
3# 3#
4obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o
5obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
6obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 5obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
7obj-$(CONFIG_SH_URQUELL) += board-urquell.o 6obj-$(CONFIG_SH_URQUELL) += board-urquell.o
diff --git a/arch/sh/boards/mach-ap325rxa/Makefile b/arch/sh/boards/mach-ap325rxa/Makefile
new file mode 100644
index 000000000000..4cf1774d2613
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/Makefile
@@ -0,0 +1,2 @@
1obj-y := setup.o sdram.o
2
diff --git a/arch/sh/boards/mach-ap325rxa/sdram.S b/arch/sh/boards/mach-ap325rxa/sdram.S
new file mode 100644
index 000000000000..db24fbed4fca
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/sdram.S
@@ -0,0 +1,69 @@
1/*
2 * AP325RXA sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ap325rxa_sdram_enter_start)
23
24 /* SBSC: disable power down and put in self-refresh mode */
25 mov.l 1f, r4
26 mov.l 2f, r1
27 mov.l @r4, r2
28 or r1, r2
29 mov.l 3f, r3
30 and r3, r2
31 mov.l r2, @r4
32
33 rts
34 nop
35
36 .balign 4
371: .long 0xfe400008 /* SDCR0 */
382: .long 0x00000400
393: .long 0xffff7fff
40ENTRY(ap325rxa_sdram_enter_end)
41
42 .balign 4
43ENTRY(ap325rxa_sdram_leave_start)
44
45 /* SBSC: set auto-refresh mode */
46 mov.l 1f, r4
47 mov.l @r4, r0
48 mov.l 4f, r1
49 and r1, r0
50 mov.l r0, @r4
51 mov.l 6f, r4
52 mov.l 8f, r0
53 mov.l @r4, r1
54 mov #-1, r4
55 add r4, r1
56 or r1, r0
57 mov.l 7f, r1
58 mov.l r0, @r1
59
60 rts
61 nop
62
63 .balign 4
641: .long 0xfe400008 /* SDCR0 */
654: .long 0xfffffbff
666: .long 0xfe40001c /* RTCOR */
677: .long 0xfe400018 /* RTCNT */
688: .long 0xa55a0000
69ENTRY(ap325rxa_sdram_leave_end)
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 2d080732a964..cf9dc12dfeb1 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -20,8 +20,6 @@
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/spi/spi.h>
24#include <linux/spi/spi_gpio.h>
25#include <media/ov772x.h> 23#include <media/ov772x.h>
26#include <media/soc_camera.h> 24#include <media/soc_camera.h>
27#include <media/soc_camera_platform.h> 25#include <media/soc_camera_platform.h>
@@ -29,6 +27,7 @@
29#include <video/sh_mobile_lcdc.h> 27#include <video/sh_mobile_lcdc.h>
30#include <asm/io.h> 28#include <asm/io.h>
31#include <asm/clock.h> 29#include <asm/clock.h>
30#include <asm/suspend.h>
32#include <cpu/sh7723.h> 31#include <cpu/sh7723.h>
33 32
34static struct smsc911x_platform_config smsc911x_config = { 33static struct smsc911x_platform_config smsc911x_config = {
@@ -409,17 +408,49 @@ static struct platform_device ceu_device = {
409 }, 408 },
410}; 409};
411 410
412struct spi_gpio_platform_data sdcard_cn3_platform_data = { 411static struct resource sdhi0_cn3_resources[] = {
413 .sck = GPIO_PTD0, 412 [0] = {
414 .mosi = GPIO_PTD1, 413 .name = "SDHI0",
415 .miso = GPIO_PTD2, 414 .start = 0x04ce0000,
416 .num_chipselect = 1, 415 .end = 0x04ce01ff,
416 .flags = IORESOURCE_MEM,
417 },
418 [1] = {
419 .start = 101,
420 .flags = IORESOURCE_IRQ,
421 },
417}; 422};
418 423
419static struct platform_device sdcard_cn3_device = { 424static struct platform_device sdhi0_cn3_device = {
420 .name = "spi_gpio", 425 .name = "sh_mobile_sdhi",
421 .dev = { 426 .id = 0, /* "sdhi0" clock */
422 .platform_data = &sdcard_cn3_platform_data, 427 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
428 .resource = sdhi0_cn3_resources,
429 .archdata = {
430 .hwblk_id = HWBLK_SDHI0,
431 },
432};
433
434static struct resource sdhi1_cn7_resources[] = {
435 [0] = {
436 .name = "SDHI1",
437 .start = 0x04cf0000,
438 .end = 0x04cf01ff,
439 .flags = IORESOURCE_MEM,
440 },
441 [1] = {
442 .start = 24,
443 .flags = IORESOURCE_IRQ,
444 },
445};
446
447static struct platform_device sdhi1_cn7_device = {
448 .name = "sh_mobile_sdhi",
449 .id = 1, /* "sdhi1" clock */
450 .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
451 .resource = sdhi1_cn7_resources,
452 .archdata = {
453 .hwblk_id = HWBLK_SDHI1,
423 }, 454 },
424}; 455};
425 456
@@ -470,22 +501,26 @@ static struct platform_device *ap325rxa_devices[] __initdata = {
470 &lcdc_device, 501 &lcdc_device,
471 &ceu_device, 502 &ceu_device,
472 &nand_flash_device, 503 &nand_flash_device,
473 &sdcard_cn3_device, 504 &sdhi0_cn3_device,
505 &sdhi1_cn7_device,
474 &ap325rxa_camera[0], 506 &ap325rxa_camera[0],
475 &ap325rxa_camera[1], 507 &ap325rxa_camera[1],
476}; 508};
477 509
478static struct spi_board_info ap325rxa_spi_devices[] = { 510extern char ap325rxa_sdram_enter_start;
479 { 511extern char ap325rxa_sdram_enter_end;
480 .modalias = "mmc_spi", 512extern char ap325rxa_sdram_leave_start;
481 .max_speed_hz = 5000000, 513extern char ap325rxa_sdram_leave_end;
482 .chip_select = 0,
483 .controller_data = (void *) GPIO_PTD5,
484 },
485};
486 514
487static int __init ap325rxa_devices_setup(void) 515static int __init ap325rxa_devices_setup(void)
488{ 516{
517 /* register board specific self-refresh code */
518 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
519 &ap325rxa_sdram_enter_start,
520 &ap325rxa_sdram_enter_end,
521 &ap325rxa_sdram_leave_start,
522 &ap325rxa_sdram_leave_end);
523
489 /* LD3 and LD4 LEDs */ 524 /* LD3 and LD4 LEDs */
490 gpio_request(GPIO_PTX5, NULL); /* RUN */ 525 gpio_request(GPIO_PTX5, NULL); /* RUN */
491 gpio_direction_output(GPIO_PTX5, 1); 526 gpio_direction_output(GPIO_PTX5, 1);
@@ -578,12 +613,28 @@ static int __init ap325rxa_devices_setup(void)
578 613
579 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 614 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
580 615
616 /* SDHI0 - CN3 - SD CARD */
617 gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
618 gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
619 gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
620 gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
621 gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
622 gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
623 gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
624 gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
625
626 /* SDHI1 - CN7 - MICRO SD CARD */
627 gpio_request(GPIO_FN_SDHI1CD, NULL);
628 gpio_request(GPIO_FN_SDHI1D3, NULL);
629 gpio_request(GPIO_FN_SDHI1D2, NULL);
630 gpio_request(GPIO_FN_SDHI1D1, NULL);
631 gpio_request(GPIO_FN_SDHI1D0, NULL);
632 gpio_request(GPIO_FN_SDHI1CMD, NULL);
633 gpio_request(GPIO_FN_SDHI1CLK, NULL);
634
581 i2c_register_board_info(0, ap325rxa_i2c_devices, 635 i2c_register_board_info(0, ap325rxa_i2c_devices,
582 ARRAY_SIZE(ap325rxa_i2c_devices)); 636 ARRAY_SIZE(ap325rxa_i2c_devices));
583 637
584 spi_register_board_info(ap325rxa_spi_devices,
585 ARRAY_SIZE(ap325rxa_spi_devices));
586
587 return platform_add_devices(ap325rxa_devices, 638 return platform_add_devices(ap325rxa_devices,
588 ARRAY_SIZE(ap325rxa_devices)); 639 ARRAY_SIZE(ap325rxa_devices));
589} 640}
diff --git a/arch/sh/boards/mach-ecovec24/Makefile b/arch/sh/boards/mach-ecovec24/Makefile
index 51f852151655..e69bc82208fc 100644
--- a/arch/sh/boards/mach-ecovec24/Makefile
+++ b/arch/sh/boards/mach-ecovec24/Makefile
@@ -6,4 +6,4 @@
6# for more details. 6# for more details.
7# 7#
8 8
9obj-y := setup.o \ No newline at end of file 9obj-y := setup.o sdram.o \ No newline at end of file
diff --git a/arch/sh/boards/mach-ecovec24/sdram.S b/arch/sh/boards/mach-ecovec24/sdram.S
new file mode 100644
index 000000000000..833440044407
--- /dev/null
+++ b/arch/sh/boards/mach-ecovec24/sdram.S
@@ -0,0 +1,52 @@
1/*
2 * Ecovec24 sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ecovec24_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(ecovec24_sdram_enter_end)
36
37 .balign 4
38ENTRY(ecovec24_sdram_leave_start)
39
40 /* DBSC: put memory in auto-refresh mode */
41
42 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
43 WAIT 1
44 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
45 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
46 ED 0xFD000010, 0x00000001 /* DBEN */
47 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
48
49 rts
50 nop
51
52ENTRY(ecovec24_sdram_leave_end)
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 3b1ceb46fa54..826e62326d51 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -20,12 +20,14 @@
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/i2c/tsc2007.h> 21#include <linux/i2c/tsc2007.h>
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/input/sh_keysc.h>
24#include <linux/mfd/sh_mobile_sdhi.h>
23#include <video/sh_mobile_lcdc.h> 25#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h> 26#include <media/sh_mobile_ceu.h>
25#include <asm/heartbeat.h> 27#include <asm/heartbeat.h>
26#include <asm/sh_eth.h> 28#include <asm/sh_eth.h>
27#include <asm/sh_keysc.h>
28#include <asm/clock.h> 29#include <asm/clock.h>
30#include <asm/suspend.h>
29#include <cpu/sh7724.h> 31#include <cpu/sh7724.h>
30 32
31/* 33/*
@@ -147,6 +149,9 @@ static struct platform_device sh_eth_device = {
147 }, 149 },
148 .num_resources = ARRAY_SIZE(sh_eth_resources), 150 .num_resources = ARRAY_SIZE(sh_eth_resources),
149 .resource = sh_eth_resources, 151 .resource = sh_eth_resources,
152 .archdata = {
153 .hwblk_id = HWBLK_ETHER,
154 },
150}; 155};
151 156
152/* USB0 host */ 157/* USB0 host */
@@ -185,30 +190,18 @@ static struct platform_device usb0_host_device = {
185 .resource = usb0_host_resources, 190 .resource = usb0_host_resources,
186}; 191};
187 192
188/* 193/* USB1 host/function */
189 * USB1
190 *
191 * CN5 can use both host/function,
192 * and we can determine it by checking PTB[3]
193 *
194 * This time only USB1 host is supported.
195 */
196void usb1_port_power(int port, int power) 194void usb1_port_power(int port, int power)
197{ 195{
198 if (!gpio_get_value(GPIO_PTB3)) {
199 printk(KERN_ERR "USB1 function is not supported\n");
200 return;
201 }
202
203 gpio_set_value(GPIO_PTB5, power); 196 gpio_set_value(GPIO_PTB5, power);
204} 197}
205 198
206static struct r8a66597_platdata usb1_host_data = { 199static struct r8a66597_platdata usb1_common_data = {
207 .on_chip = 1, 200 .on_chip = 1,
208 .port_power = usb1_port_power, 201 .port_power = usb1_port_power,
209}; 202};
210 203
211static struct resource usb1_host_resources[] = { 204static struct resource usb1_common_resources[] = {
212 [0] = { 205 [0] = {
213 .start = 0xa4d90000, 206 .start = 0xa4d90000,
214 .end = 0xa4d90124 - 1, 207 .end = 0xa4d90124 - 1,
@@ -221,16 +214,16 @@ static struct resource usb1_host_resources[] = {
221 }, 214 },
222}; 215};
223 216
224static struct platform_device usb1_host_device = { 217static struct platform_device usb1_common_device = {
225 .name = "r8a66597_hcd", 218 /* .name will be added in arch_setup */
226 .id = 1, 219 .id = 1,
227 .dev = { 220 .dev = {
228 .dma_mask = NULL, /* not use dma */ 221 .dma_mask = NULL, /* not use dma */
229 .coherent_dma_mask = 0xffffffff, 222 .coherent_dma_mask = 0xffffffff,
230 .platform_data = &usb1_host_data, 223 .platform_data = &usb1_common_data,
231 }, 224 },
232 .num_resources = ARRAY_SIZE(usb1_host_resources), 225 .num_resources = ARRAY_SIZE(usb1_common_resources),
233 .resource = usb1_host_resources, 226 .resource = usb1_common_resources,
234}; 227};
235 228
236/* LCDC */ 229/* LCDC */
@@ -428,16 +421,90 @@ static struct i2c_board_info ts_i2c_clients = {
428 .irq = IRQ0, 421 .irq = IRQ0,
429}; 422};
430 423
424/* SHDI0 */
425static void sdhi0_set_pwr(struct platform_device *pdev, int state)
426{
427 gpio_set_value(GPIO_PTB6, state);
428}
429
430static struct sh_mobile_sdhi_info sdhi0_info = {
431 .set_pwr = sdhi0_set_pwr,
432};
433
434static struct resource sdhi0_resources[] = {
435 [0] = {
436 .name = "SDHI0",
437 .start = 0x04ce0000,
438 .end = 0x04ce01ff,
439 .flags = IORESOURCE_MEM,
440 },
441 [1] = {
442 .start = 101,
443 .flags = IORESOURCE_IRQ,
444 },
445};
446
447static struct platform_device sdhi0_device = {
448 .name = "sh_mobile_sdhi",
449 .num_resources = ARRAY_SIZE(sdhi0_resources),
450 .resource = sdhi0_resources,
451 .id = 0,
452 .dev = {
453 .platform_data = &sdhi0_info,
454 },
455 .archdata = {
456 .hwblk_id = HWBLK_SDHI0,
457 },
458};
459
460/* SHDI1 */
461static void sdhi1_set_pwr(struct platform_device *pdev, int state)
462{
463 gpio_set_value(GPIO_PTB7, state);
464}
465
466static struct sh_mobile_sdhi_info sdhi1_info = {
467 .set_pwr = sdhi1_set_pwr,
468};
469
470static struct resource sdhi1_resources[] = {
471 [0] = {
472 .name = "SDHI1",
473 .start = 0x04cf0000,
474 .end = 0x04cf01ff,
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .start = 24,
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static struct platform_device sdhi1_device = {
484 .name = "sh_mobile_sdhi",
485 .num_resources = ARRAY_SIZE(sdhi1_resources),
486 .resource = sdhi1_resources,
487 .id = 1,
488 .dev = {
489 .platform_data = &sdhi1_info,
490 },
491 .archdata = {
492 .hwblk_id = HWBLK_SDHI1,
493 },
494};
495
431static struct platform_device *ecovec_devices[] __initdata = { 496static struct platform_device *ecovec_devices[] __initdata = {
432 &heartbeat_device, 497 &heartbeat_device,
433 &nor_flash_device, 498 &nor_flash_device,
434 &sh_eth_device, 499 &sh_eth_device,
435 &usb0_host_device, 500 &usb0_host_device,
436 &usb1_host_device, /* USB1 host support */ 501 &usb1_common_device,
437 &lcdc_device, 502 &lcdc_device,
438 &ceu0_device, 503 &ceu0_device,
439 &ceu1_device, 504 &ceu1_device,
440 &keysc_device, 505 &keysc_device,
506 &sdhi0_device,
507 &sdhi1_device,
441}; 508};
442 509
443#define EEPROM_ADDR 0x50 510#define EEPROM_ADDR 0x50
@@ -466,12 +533,9 @@ static u8 mac_read(struct i2c_adapter *a, u8 command)
466 return buf; 533 return buf;
467} 534}
468 535
469#define MAC_LEN 6 536static void __init sh_eth_init(struct sh_eth_plat_data *pd)
470static void __init sh_eth_init(void)
471{ 537{
472 struct i2c_adapter *a = i2c_get_adapter(1); 538 struct i2c_adapter *a = i2c_get_adapter(1);
473 struct clk *eth_clk;
474 u8 mac[MAC_LEN];
475 int i; 539 int i;
476 540
477 if (!a) { 541 if (!a) {
@@ -479,39 +543,30 @@ static void __init sh_eth_init(void)
479 return; 543 return;
480 } 544 }
481 545
482 eth_clk = clk_get(NULL, "eth0");
483 if (!eth_clk) {
484 pr_err("can not get eth0 clk\n");
485 return;
486 }
487
488 /* read MAC address frome EEPROM */ 546 /* read MAC address frome EEPROM */
489 for (i = 0; i < MAC_LEN; i++) { 547 for (i = 0; i < sizeof(pd->mac_addr); i++) {
490 mac[i] = mac_read(a, 0x10 + i); 548 pd->mac_addr[i] = mac_read(a, 0x10 + i);
491 msleep(10); 549 msleep(10);
492 } 550 }
493
494 /* clock enable */
495 clk_enable(eth_clk);
496
497 /* reset sh-eth */
498 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
499
500 /* set MAC addr */
501 ctrl_outl((mac[0] << 24) |
502 (mac[1] << 16) |
503 (mac[2] << 8) |
504 (mac[3] << 0), SH_ETH_MAHR);
505 ctrl_outl((mac[4] << 8) |
506 (mac[5] << 0), SH_ETH_MALR);
507
508 clk_put(eth_clk);
509} 551}
510 552
511#define PORT_HIZA 0xA4050158 553#define PORT_HIZA 0xA4050158
512#define IODRIVEA 0xA405018A 554#define IODRIVEA 0xA405018A
555
556extern char ecovec24_sdram_enter_start;
557extern char ecovec24_sdram_enter_end;
558extern char ecovec24_sdram_leave_start;
559extern char ecovec24_sdram_leave_end;
560
513static int __init arch_setup(void) 561static int __init arch_setup(void)
514{ 562{
563 /* register board specific self-refresh code */
564 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
565 &ecovec24_sdram_enter_start,
566 &ecovec24_sdram_enter_end,
567 &ecovec24_sdram_leave_start,
568 &ecovec24_sdram_leave_end);
569
515 /* enable STATUS0, STATUS2 and PDSTATUS */ 570 /* enable STATUS0, STATUS2 and PDSTATUS */
516 gpio_request(GPIO_FN_STATUS0, NULL); 571 gpio_request(GPIO_FN_STATUS0, NULL);
517 gpio_request(GPIO_FN_STATUS2, NULL); 572 gpio_request(GPIO_FN_STATUS2, NULL);
@@ -561,6 +616,14 @@ static int __init arch_setup(void)
561 ctrl_outw(0x0600, 0xa40501d4); 616 ctrl_outw(0x0600, 0xa40501d4);
562 ctrl_outw(0x0600, 0xa4050192); 617 ctrl_outw(0x0600, 0xa4050192);
563 618
619 if (gpio_get_value(GPIO_PTB3)) {
620 printk(KERN_INFO "USB1 function is selected\n");
621 usb1_common_device.name = "r8a66597_udc";
622 } else {
623 printk(KERN_INFO "USB1 host is selected\n");
624 usb1_common_device.name = "r8a66597_hcd";
625 }
626
564 /* enable LCDC */ 627 /* enable LCDC */
565 gpio_request(GPIO_FN_LCDD23, NULL); 628 gpio_request(GPIO_FN_LCDD23, NULL);
566 gpio_request(GPIO_FN_LCDD22, NULL); 629 gpio_request(GPIO_FN_LCDD22, NULL);
@@ -603,8 +666,8 @@ static int __init arch_setup(void)
603 gpio_direction_output(GPIO_PTR1, 0); 666 gpio_direction_output(GPIO_PTR1, 0);
604 gpio_direction_output(GPIO_PTA2, 0); 667 gpio_direction_output(GPIO_PTA2, 0);
605 668
606 /* I/O buffer drive ability is low */ 669 /* I/O buffer drive ability is high */
607 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA); 670 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
608 671
609 if (gpio_get_value(GPIO_PTE6)) { 672 if (gpio_get_value(GPIO_PTE6)) {
610 /* DVI */ 673 /* DVI */
@@ -710,6 +773,33 @@ static int __init arch_setup(void)
710 gpio_direction_input(GPIO_PTR5); 773 gpio_direction_input(GPIO_PTR5);
711 gpio_direction_input(GPIO_PTR6); 774 gpio_direction_input(GPIO_PTR6);
712 775
776 /* enable SDHI0 (needs DS2.4 set to ON) */
777 gpio_request(GPIO_FN_SDHI0CD, NULL);
778 gpio_request(GPIO_FN_SDHI0WP, NULL);
779 gpio_request(GPIO_FN_SDHI0CMD, NULL);
780 gpio_request(GPIO_FN_SDHI0CLK, NULL);
781 gpio_request(GPIO_FN_SDHI0D3, NULL);
782 gpio_request(GPIO_FN_SDHI0D2, NULL);
783 gpio_request(GPIO_FN_SDHI0D1, NULL);
784 gpio_request(GPIO_FN_SDHI0D0, NULL);
785 gpio_request(GPIO_PTB6, NULL);
786 gpio_direction_output(GPIO_PTB6, 0);
787
788 /* enable SDHI1 (needs DS2.6,7 set to ON,OFF) */
789 gpio_request(GPIO_FN_SDHI1CD, NULL);
790 gpio_request(GPIO_FN_SDHI1WP, NULL);
791 gpio_request(GPIO_FN_SDHI1CMD, NULL);
792 gpio_request(GPIO_FN_SDHI1CLK, NULL);
793 gpio_request(GPIO_FN_SDHI1D3, NULL);
794 gpio_request(GPIO_FN_SDHI1D2, NULL);
795 gpio_request(GPIO_FN_SDHI1D1, NULL);
796 gpio_request(GPIO_FN_SDHI1D0, NULL);
797 gpio_request(GPIO_PTB7, NULL);
798 gpio_direction_output(GPIO_PTB7, 0);
799
800 /* I/O buffer drive ability is high for SDHI1 */
801 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
802
713 /* enable I2C device */ 803 /* enable I2C device */
714 i2c_register_board_info(1, i2c1_devices, 804 i2c_register_board_info(1, i2c1_devices,
715 ARRAY_SIZE(i2c1_devices)); 805 ARRAY_SIZE(i2c1_devices));
@@ -721,12 +811,11 @@ arch_initcall(arch_setup);
721 811
722static int __init devices_setup(void) 812static int __init devices_setup(void)
723{ 813{
724 sh_eth_init(); 814 sh_eth_init(&sh_eth_plat);
725 return 0; 815 return 0;
726} 816}
727device_initcall(devices_setup); 817device_initcall(devices_setup);
728 818
729
730static struct sh_machine_vector mv_ecovec __initmv = { 819static struct sh_machine_vector mv_ecovec __initmv = {
731 .mv_name = "R0P7724 (EcoVec)", 820 .mv_name = "R0P7724 (EcoVec)",
732}; 821};
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 566e69d8d729..f663c14d8885 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -384,7 +384,7 @@ static unsigned char irl2irq[HL_NR_IRL];
384 384
385static int highlander_irq_demux(int irq) 385static int highlander_irq_demux(int irq)
386{ 386{
387 if (irq >= HL_NR_IRL || !irl2irq[irq]) 387 if (irq >= HL_NR_IRL || irq < 0 || !irl2irq[irq])
388 return irq; 388 return irq;
389 389
390 return irl2irq[irq]; 390 return irl2irq[irq];
diff --git a/arch/sh/boards/mach-kfr2r09/Makefile b/arch/sh/boards/mach-kfr2r09/Makefile
index 5d5867826e3b..4e577a3bf658 100644
--- a/arch/sh/boards/mach-kfr2r09/Makefile
+++ b/arch/sh/boards/mach-kfr2r09/Makefile
@@ -1,2 +1,2 @@
1obj-y := setup.o 1obj-y := setup.o sdram.o
2obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o 2obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o
diff --git a/arch/sh/boards/mach-kfr2r09/sdram.S b/arch/sh/boards/mach-kfr2r09/sdram.S
new file mode 100644
index 000000000000..0c9f55bec2fe
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/sdram.S
@@ -0,0 +1,80 @@
1/*
2 * KFR2R09 sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(kfr2r09_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(kfr2r09_sdram_enter_end)
36
37 .balign 4
38ENTRY(kfr2r09_sdram_leave_start)
39
40 /* DBSC: put memory in auto-refresh mode */
41
42 mov.l @(SH_SLEEP_MODE, r5), r0
43 tst #SUSP_SH_RSTANDBY, r0
44 bf resume_rstandby
45
46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
47 WAIT 1
48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
49 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
50 ED 0xFD000010, 0x00000001 /* DBEN */
51 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
52
53 rts
54 nop
55
56resume_rstandby:
57
58 /* DBSC: re-initialize and put in auto-refresh */
59
60 ED 0xFD000108, 0x40000301 /* DBPDCNT0 */
61 ED 0xFD000020, 0x011B0002 /* DBCONF */
62 ED 0xFD000030, 0x03060E02 /* DBTR0 */
63 ED 0xFD000034, 0x01020102 /* DBTR1 */
64 ED 0xFD000038, 0x01090406 /* DBTR2 */
65 ED 0xFD000008, 0x00000004 /* DBKIND */
66 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
67 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
68 ED 0xFD000018, 0x00000001 /* DBCKECNT */
69 WAIT 1
70 ED 0xFD000010, 0x00000001 /* DBEN */
71 ED 0xFD000044, 0x000004AF /* DBRFPDN1 */
72 ED 0xFD000048, 0x20CF0037 /* DBRFPDN2 */
73 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
74 ED 0xFD000108, 0x40000300 /* DBPDCNT0 */
75 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
76
77 rts
78 nop
79
80ENTRY(kfr2r09_sdram_leave_end)
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index c08d33fe2104..87438d6603d6 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -16,13 +16,16 @@
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/input.h> 18#include <linux/input.h>
19#include <linux/input/sh_keysc.h>
19#include <linux/i2c.h> 20#include <linux/i2c.h>
20#include <linux/usb/r8a66597.h> 21#include <linux/usb/r8a66597.h>
22#include <media/soc_camera.h>
23#include <media/sh_mobile_ceu.h>
21#include <video/sh_mobile_lcdc.h> 24#include <video/sh_mobile_lcdc.h>
25#include <asm/suspend.h>
22#include <asm/clock.h> 26#include <asm/clock.h>
23#include <asm/machvec.h> 27#include <asm/machvec.h>
24#include <asm/io.h> 28#include <asm/io.h>
25#include <asm/sh_keysc.h>
26#include <cpu/sh7724.h> 29#include <cpu/sh7724.h>
27#include <mach/kfr2r09.h> 30#include <mach/kfr2r09.h>
28 31
@@ -212,11 +215,154 @@ static struct platform_device kfr2r09_usb0_gadget_device = {
212 .resource = kfr2r09_usb0_gadget_resources, 215 .resource = kfr2r09_usb0_gadget_resources,
213}; 216};
214 217
218static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
219 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
220};
221
222static struct resource kfr2r09_ceu_resources[] = {
223 [0] = {
224 .name = "CEU",
225 .start = 0xfe910000,
226 .end = 0xfe91009f,
227 .flags = IORESOURCE_MEM,
228 },
229 [1] = {
230 .start = 52,
231 .end = 52,
232 .flags = IORESOURCE_IRQ,
233 },
234 [2] = {
235 /* place holder for contiguous memory */
236 },
237};
238
239static struct platform_device kfr2r09_ceu_device = {
240 .name = "sh_mobile_ceu",
241 .id = 0, /* "ceu0" clock */
242 .num_resources = ARRAY_SIZE(kfr2r09_ceu_resources),
243 .resource = kfr2r09_ceu_resources,
244 .dev = {
245 .platform_data = &sh_mobile_ceu_info,
246 },
247 .archdata = {
248 .hwblk_id = HWBLK_CEU0,
249 },
250};
251
252static struct i2c_board_info kfr2r09_i2c_camera = {
253 I2C_BOARD_INFO("rj54n1cb0c", 0x50),
254};
255
256static struct clk *camera_clk;
257
258#define DRVCRB 0xA405018C
259static int camera_power(struct device *dev, int mode)
260{
261 int ret;
262
263 if (mode) {
264 long rate;
265
266 camera_clk = clk_get(NULL, "video_clk");
267 if (IS_ERR(camera_clk))
268 return PTR_ERR(camera_clk);
269
270 /* set VIO_CKO clock to 25MHz */
271 rate = clk_round_rate(camera_clk, 25000000);
272 ret = clk_set_rate(camera_clk, rate);
273 if (ret < 0)
274 goto eclkrate;
275
276 /* set DRVCRB
277 *
278 * use 1.8 V for VccQ_VIO
279 * use 2.85V for VccQ_SR
280 */
281 ctrl_outw((ctrl_inw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
282
283 /* reset clear */
284 ret = gpio_request(GPIO_PTB4, NULL);
285 if (ret < 0)
286 goto eptb4;
287 ret = gpio_request(GPIO_PTB7, NULL);
288 if (ret < 0)
289 goto eptb7;
290
291 ret = gpio_direction_output(GPIO_PTB4, 1);
292 if (!ret)
293 ret = gpio_direction_output(GPIO_PTB7, 1);
294 if (ret < 0)
295 goto egpioout;
296 msleep(1);
297
298 ret = clk_enable(camera_clk); /* start VIO_CKO */
299 if (ret < 0)
300 goto eclkon;
301
302 return 0;
303 }
304
305 ret = 0;
306
307 clk_disable(camera_clk);
308eclkon:
309 gpio_set_value(GPIO_PTB7, 0);
310egpioout:
311 gpio_set_value(GPIO_PTB4, 0);
312 gpio_free(GPIO_PTB7);
313eptb7:
314 gpio_free(GPIO_PTB4);
315eptb4:
316eclkrate:
317 clk_put(camera_clk);
318 return ret;
319}
320
321static struct soc_camera_link rj54n1_link = {
322 .power = camera_power,
323 .board_info = &kfr2r09_i2c_camera,
324 .i2c_adapter_id = 1,
325 .module_name = "rj54n1cb0c",
326};
327
328static struct platform_device kfr2r09_camera = {
329 .name = "soc-camera-pdrv",
330 .id = 0,
331 .dev = {
332 .platform_data = &rj54n1_link,
333 },
334};
335
336static struct resource kfr2r09_sh_sdhi0_resources[] = {
337 [0] = {
338 .name = "SDHI0",
339 .start = 0x04ce0000,
340 .end = 0x04ce01ff,
341 .flags = IORESOURCE_MEM,
342 },
343 [1] = {
344 .start = 101,
345 .flags = IORESOURCE_IRQ,
346 },
347};
348
349static struct platform_device kfr2r09_sh_sdhi0_device = {
350 .name = "sh_mobile_sdhi",
351 .num_resources = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources),
352 .resource = kfr2r09_sh_sdhi0_resources,
353 .archdata = {
354 .hwblk_id = HWBLK_SDHI0,
355 },
356};
357
215static struct platform_device *kfr2r09_devices[] __initdata = { 358static struct platform_device *kfr2r09_devices[] __initdata = {
216 &kfr2r09_nor_flash_device, 359 &kfr2r09_nor_flash_device,
217 &kfr2r09_nand_flash_device, 360 &kfr2r09_nand_flash_device,
218 &kfr2r09_sh_keysc_device, 361 &kfr2r09_sh_keysc_device,
219 &kfr2r09_sh_lcdc_device, 362 &kfr2r09_sh_lcdc_device,
363 &kfr2r09_ceu_device,
364 &kfr2r09_camera,
365 &kfr2r09_sh_sdhi0_device,
220}; 366};
221 367
222#define BSC_CS0BCR 0xfec10004 368#define BSC_CS0BCR 0xfec10004
@@ -268,11 +414,59 @@ static int kfr2r09_usb0_gadget_i2c_setup(void)
268 414
269 return 0; 415 return 0;
270} 416}
417
418static int kfr2r09_serial_i2c_setup(void)
419{
420 struct i2c_adapter *a;
421 struct i2c_msg msg;
422 unsigned char buf[2];
423 int ret;
424
425 a = i2c_get_adapter(0);
426 if (!a)
427 return -ENODEV;
428
429 /* set bit 6 (the 7th bit) of chip at 0x09, register 0x13 */
430 buf[0] = 0x13;
431 msg.addr = 0x09;
432 msg.buf = buf;
433 msg.len = 1;
434 msg.flags = 0;
435 ret = i2c_transfer(a, &msg, 1);
436 if (ret != 1)
437 return -ENODEV;
438
439 buf[0] = 0;
440 msg.addr = 0x09;
441 msg.buf = buf;
442 msg.len = 1;
443 msg.flags = I2C_M_RD;
444 ret = i2c_transfer(a, &msg, 1);
445 if (ret != 1)
446 return -ENODEV;
447
448 buf[1] = buf[0] | (1 << 6);
449 buf[0] = 0x13;
450 msg.addr = 0x09;
451 msg.buf = buf;
452 msg.len = 2;
453 msg.flags = 0;
454 ret = i2c_transfer(a, &msg, 1);
455 if (ret != 1)
456 return -ENODEV;
457
458 return 0;
459}
271#else 460#else
272static int kfr2r09_usb0_gadget_i2c_setup(void) 461static int kfr2r09_usb0_gadget_i2c_setup(void)
273{ 462{
274 return -ENODEV; 463 return -ENODEV;
275} 464}
465
466static int kfr2r09_serial_i2c_setup(void)
467{
468 return -ENODEV;
469}
276#endif 470#endif
277 471
278static int kfr2r09_usb0_gadget_setup(void) 472static int kfr2r09_usb0_gadget_setup(void)
@@ -299,11 +493,27 @@ static int kfr2r09_usb0_gadget_setup(void)
299 return 0; 493 return 0;
300} 494}
301 495
496extern char kfr2r09_sdram_enter_start;
497extern char kfr2r09_sdram_enter_end;
498extern char kfr2r09_sdram_leave_start;
499extern char kfr2r09_sdram_leave_end;
500
302static int __init kfr2r09_devices_setup(void) 501static int __init kfr2r09_devices_setup(void)
303{ 502{
503 /* register board specific self-refresh code */
504 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
505 SUSP_SH_RSTANDBY,
506 &kfr2r09_sdram_enter_start,
507 &kfr2r09_sdram_enter_end,
508 &kfr2r09_sdram_leave_start,
509 &kfr2r09_sdram_leave_end);
510
304 /* enable SCIF1 serial port for YC401 console support */ 511 /* enable SCIF1 serial port for YC401 console support */
305 gpio_request(GPIO_FN_SCIF1_RXD, NULL); 512 gpio_request(GPIO_FN_SCIF1_RXD, NULL);
306 gpio_request(GPIO_FN_SCIF1_TXD, NULL); 513 gpio_request(GPIO_FN_SCIF1_TXD, NULL);
514 kfr2r09_serial_i2c_setup(); /* ECONTMSK(bit6=L10ONEN) set 1 */
515 gpio_request(GPIO_PTG3, NULL); /* HPON_ON */
516 gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
307 517
308 /* setup NOR flash at CS0 */ 518 /* setup NOR flash at CS0 */
309 ctrl_outl(0x36db0400, BSC_CS0BCR); 519 ctrl_outl(0x36db0400, BSC_CS0BCR);
@@ -361,6 +571,32 @@ static int __init kfr2r09_devices_setup(void)
361 if (kfr2r09_usb0_gadget_setup() == 0) 571 if (kfr2r09_usb0_gadget_setup() == 0)
362 platform_device_register(&kfr2r09_usb0_gadget_device); 572 platform_device_register(&kfr2r09_usb0_gadget_device);
363 573
574 /* CEU */
575 gpio_request(GPIO_FN_VIO_CKO, NULL);
576 gpio_request(GPIO_FN_VIO0_CLK, NULL);
577 gpio_request(GPIO_FN_VIO0_VD, NULL);
578 gpio_request(GPIO_FN_VIO0_HD, NULL);
579 gpio_request(GPIO_FN_VIO0_FLD, NULL);
580 gpio_request(GPIO_FN_VIO0_D7, NULL);
581 gpio_request(GPIO_FN_VIO0_D6, NULL);
582 gpio_request(GPIO_FN_VIO0_D5, NULL);
583 gpio_request(GPIO_FN_VIO0_D4, NULL);
584 gpio_request(GPIO_FN_VIO0_D3, NULL);
585 gpio_request(GPIO_FN_VIO0_D2, NULL);
586 gpio_request(GPIO_FN_VIO0_D1, NULL);
587 gpio_request(GPIO_FN_VIO0_D0, NULL);
588
589 platform_resource_setup_memory(&kfr2r09_ceu_device, "ceu", 4 << 20);
590
591 /* SDHI0 connected to yc304 */
592 gpio_request(GPIO_FN_SDHI0CD, NULL);
593 gpio_request(GPIO_FN_SDHI0D3, NULL);
594 gpio_request(GPIO_FN_SDHI0D2, NULL);
595 gpio_request(GPIO_FN_SDHI0D1, NULL);
596 gpio_request(GPIO_FN_SDHI0D0, NULL);
597 gpio_request(GPIO_FN_SDHI0CMD, NULL);
598 gpio_request(GPIO_FN_SDHI0CLK, NULL);
599
364 return platform_add_devices(kfr2r09_devices, 600 return platform_add_devices(kfr2r09_devices,
365 ARRAY_SIZE(kfr2r09_devices)); 601 ARRAY_SIZE(kfr2r09_devices));
366} 602}
diff --git a/arch/sh/boards/mach-migor/Makefile b/arch/sh/boards/mach-migor/Makefile
index 5f231dd25c0e..4601a89e5ac7 100644
--- a/arch/sh/boards/mach-migor/Makefile
+++ b/arch/sh/boards/mach-migor/Makefile
@@ -1,2 +1,2 @@
1obj-y := setup.o 1obj-y := setup.o sdram.o
2obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o 2obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o
diff --git a/arch/sh/boards/mach-migor/sdram.S b/arch/sh/boards/mach-migor/sdram.S
new file mode 100644
index 000000000000..614aa3a1398c
--- /dev/null
+++ b/arch/sh/boards/mach-migor/sdram.S
@@ -0,0 +1,69 @@
1/*
2 * Migo-R sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(migor_sdram_enter_start)
23
24 /* SBSC: disable power down and put in self-refresh mode */
25 mov.l 1f, r4
26 mov.l 2f, r1
27 mov.l @r4, r2
28 or r1, r2
29 mov.l 3f, r3
30 and r3, r2
31 mov.l r2, @r4
32
33 rts
34 nop
35
36 .balign 4
371: .long 0xfe400008 /* SDCR0 */
382: .long 0x00000400
393: .long 0xffff7fff
40ENTRY(migor_sdram_enter_end)
41
42 .balign 4
43ENTRY(migor_sdram_leave_start)
44
45 /* SBSC: set auto-refresh mode */
46 mov.l 1f, r4
47 mov.l @r4, r0
48 mov.l 4f, r1
49 and r1, r0
50 mov.l r0, @r4
51 mov.l 6f, r4
52 mov.l 8f, r0
53 mov.l @r4, r1
54 mov #-1, r4
55 add r4, r1
56 or r1, r0
57 mov.l 7f, r1
58 mov.l r0, @r1
59
60 rts
61 nop
62
63 .balign 4
641: .long 0xfe400008 /* SDCR0 */
654: .long 0xfffffbff
666: .long 0xfe40001c /* RTCOR */
677: .long 0xfe400018 /* RTCNT */
688: .long 0xa55a0000
69ENTRY(migor_sdram_leave_end)
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 6ed1fd32369e..9099b6da9957 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -11,6 +11,7 @@
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/input.h> 13#include <linux/input.h>
14#include <linux/input/sh_keysc.h>
14#include <linux/mtd/physmap.h> 15#include <linux/mtd/physmap.h>
15#include <linux/mtd/nand.h> 16#include <linux/mtd/nand.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
@@ -18,8 +19,6 @@
18#include <linux/delay.h> 19#include <linux/delay.h>
19#include <linux/clk.h> 20#include <linux/clk.h>
20#include <linux/gpio.h> 21#include <linux/gpio.h>
21#include <linux/spi/spi.h>
22#include <linux/spi/spi_gpio.h>
23#include <video/sh_mobile_lcdc.h> 22#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h> 23#include <media/sh_mobile_ceu.h>
25#include <media/ov772x.h> 24#include <media/ov772x.h>
@@ -27,7 +26,7 @@
27#include <asm/clock.h> 26#include <asm/clock.h>
28#include <asm/machvec.h> 27#include <asm/machvec.h>
29#include <asm/io.h> 28#include <asm/io.h>
30#include <asm/sh_keysc.h> 29#include <asm/suspend.h>
31#include <mach/migor.h> 30#include <mach/migor.h>
32#include <cpu/sh7722.h> 31#include <cpu/sh7722.h>
33 32
@@ -390,17 +389,25 @@ static struct platform_device migor_ceu_device = {
390 }, 389 },
391}; 390};
392 391
393struct spi_gpio_platform_data sdcard_cn9_platform_data = { 392static struct resource sdhi_cn9_resources[] = {
394 .sck = GPIO_PTD0, 393 [0] = {
395 .mosi = GPIO_PTD1, 394 .name = "SDHI",
396 .miso = GPIO_PTD2, 395 .start = 0x04ce0000,
397 .num_chipselect = 1, 396 .end = 0x04ce01ff,
397 .flags = IORESOURCE_MEM,
398 },
399 [1] = {
400 .start = 101,
401 .flags = IORESOURCE_IRQ,
402 },
398}; 403};
399 404
400static struct platform_device sdcard_cn9_device = { 405static struct platform_device sdhi_cn9_device = {
401 .name = "spi_gpio", 406 .name = "sh_mobile_sdhi",
402 .dev = { 407 .num_resources = ARRAY_SIZE(sdhi_cn9_resources),
403 .platform_data = &sdcard_cn9_platform_data, 408 .resource = sdhi_cn9_resources,
409 .archdata = {
410 .hwblk_id = HWBLK_SDHI,
404 }, 411 },
405}; 412};
406 413
@@ -467,23 +474,24 @@ static struct platform_device *migor_devices[] __initdata = {
467 &migor_ceu_device, 474 &migor_ceu_device,
468 &migor_nor_flash_device, 475 &migor_nor_flash_device,
469 &migor_nand_flash_device, 476 &migor_nand_flash_device,
470 &sdcard_cn9_device, 477 &sdhi_cn9_device,
471 &migor_camera[0], 478 &migor_camera[0],
472 &migor_camera[1], 479 &migor_camera[1],
473}; 480};
474 481
475static struct spi_board_info migor_spi_devices[] = { 482extern char migor_sdram_enter_start;
476 { 483extern char migor_sdram_enter_end;
477 .modalias = "mmc_spi", 484extern char migor_sdram_leave_start;
478 .max_speed_hz = 5000000, 485extern char migor_sdram_leave_end;
479 .chip_select = 0,
480 .controller_data = (void *) GPIO_PTD5,
481 },
482};
483 486
484static int __init migor_devices_setup(void) 487static int __init migor_devices_setup(void)
485{ 488{
486 489 /* register board specific self-refresh code */
490 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
491 &migor_sdram_enter_start,
492 &migor_sdram_enter_end,
493 &migor_sdram_leave_start,
494 &migor_sdram_leave_end);
487#ifdef CONFIG_PM 495#ifdef CONFIG_PM
488 /* Let D11 LED show STATUS0 */ 496 /* Let D11 LED show STATUS0 */
489 gpio_request(GPIO_FN_STATUS0, NULL); 497 gpio_request(GPIO_FN_STATUS0, NULL);
@@ -525,6 +533,16 @@ static int __init migor_devices_setup(void)
525 gpio_request(GPIO_PTA1, NULL); 533 gpio_request(GPIO_PTA1, NULL);
526 gpio_direction_input(GPIO_PTA1); 534 gpio_direction_input(GPIO_PTA1);
527 535
536 /* SDHI */
537 gpio_request(GPIO_FN_SDHICD, NULL);
538 gpio_request(GPIO_FN_SDHIWP, NULL);
539 gpio_request(GPIO_FN_SDHID3, NULL);
540 gpio_request(GPIO_FN_SDHID2, NULL);
541 gpio_request(GPIO_FN_SDHID1, NULL);
542 gpio_request(GPIO_FN_SDHID0, NULL);
543 gpio_request(GPIO_FN_SDHICMD, NULL);
544 gpio_request(GPIO_FN_SDHICLK, NULL);
545
528 /* Touch Panel */ 546 /* Touch Panel */
529 gpio_request(GPIO_FN_IRQ6, NULL); 547 gpio_request(GPIO_FN_IRQ6, NULL);
530 548
@@ -612,9 +630,6 @@ static int __init migor_devices_setup(void)
612 i2c_register_board_info(0, migor_i2c_devices, 630 i2c_register_board_info(0, migor_i2c_devices,
613 ARRAY_SIZE(migor_i2c_devices)); 631 ARRAY_SIZE(migor_i2c_devices));
614 632
615 spi_register_board_info(migor_spi_devices,
616 ARRAY_SIZE(migor_spi_devices));
617
618 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); 633 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
619} 634}
620arch_initcall(migor_devices_setup); 635arch_initcall(migor_devices_setup);
diff --git a/arch/sh/boards/mach-r2d/irq.c b/arch/sh/boards/mach-r2d/irq.c
index c70fecedcac4..78d7b27c80da 100644
--- a/arch/sh/boards/mach-r2d/irq.c
+++ b/arch/sh/boards/mach-r2d/irq.c
@@ -116,7 +116,7 @@ static unsigned char irl2irq[R2D_NR_IRL];
116 116
117int rts7751r2d_irq_demux(int irq) 117int rts7751r2d_irq_demux(int irq)
118{ 118{
119 if (irq >= R2D_NR_IRL || !irl2irq[irq]) 119 if (irq >= R2D_NR_IRL || irq < 0 || !irl2irq[irq])
120 return irq; 120 return irq;
121 121
122 return irl2irq[irq]; 122 return irl2irq[irq];
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index 02d21a3e2a8f..4eb31acfafef 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -16,15 +16,17 @@
16#include <asm/io.h> 16#include <asm/io.h>
17#include <mach-se/mach/se7722.h> 17#include <mach-se/mach/se7722.h>
18 18
19unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
20
19static void disable_se7722_irq(unsigned int irq) 21static void disable_se7722_irq(unsigned int irq)
20{ 22{
21 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE; 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
22 ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); 24 ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
23} 25}
24 26
25static void enable_se7722_irq(unsigned int irq) 27static void enable_se7722_irq(unsigned int irq)
26{ 28{
27 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE; 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
28 ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); 30 ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
29} 31}
30 32
@@ -38,18 +40,15 @@ static struct irq_chip se7722_irq_chip __read_mostly = {
38static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
39{ 41{
40 unsigned short intv = ctrl_inw(IRQ01_STS); 42 unsigned short intv = ctrl_inw(IRQ01_STS);
41 struct irq_desc *ext_desc; 43 unsigned int ext_irq = 0;
42 unsigned int ext_irq = SE7722_FPGA_IRQ_BASE;
43 44
44 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
45 46
46 while (intv) { 47 for (; intv; intv >>= 1, ext_irq++) {
47 if (intv & 1) { 48 if (!(intv & 1))
48 ext_desc = irq_desc + ext_irq; 49 continue;
49 handle_level_irq(ext_irq, ext_desc); 50
50 } 51 generic_handle_irq(se7722_fpga_irq[ext_irq]);
51 intv >>= 1;
52 ext_irq++;
53 } 52 }
54} 53}
55 54
@@ -63,11 +62,18 @@ void __init init_se7722_IRQ(void)
63 ctrl_outw(0, IRQ01_MASK); /* disable all irqs */ 62 ctrl_outw(0, IRQ01_MASK); /* disable all irqs */
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 63 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
65 64
66 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) 65 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
67 set_irq_chip_and_handler_name(SE7722_FPGA_IRQ_BASE + i, 66 se7722_fpga_irq[i] = create_irq();
67 if (se7722_fpga_irq[i] < 0)
68 return;
69
70 set_irq_chip_and_handler_name(se7722_fpga_irq[i],
68 &se7722_irq_chip, 71 &se7722_irq_chip,
69 handle_level_irq, "level"); 72 handle_level_irq, "level");
70 73
74 set_irq_chip_data(se7722_fpga_irq[i], (void *)i);
75 }
76
71 set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux); 77 set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 78 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73 79
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index 36374078e521..b1cb9425b600 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h> 16#include <linux/input.h>
17#include <linux/input/sh_keysc.h>
17#include <linux/smc91x.h> 18#include <linux/smc91x.h>
18#include <mach-se/mach/se7722.h> 19#include <mach-se/mach/se7722.h>
19#include <mach-se/mach/mrshpc.h> 20#include <mach-se/mach/mrshpc.h>
@@ -21,7 +22,6 @@
21#include <asm/clock.h> 22#include <asm/clock.h>
22#include <asm/io.h> 23#include <asm/io.h>
23#include <asm/heartbeat.h> 24#include <asm/heartbeat.h>
24#include <asm/sh_keysc.h>
25#include <cpu/sh7722.h> 25#include <cpu/sh7722.h>
26 26
27/* Heartbeat */ 27/* Heartbeat */
@@ -60,8 +60,7 @@ static struct resource smc91x_eth_resources[] = {
60 .flags = IORESOURCE_MEM, 60 .flags = IORESOURCE_MEM,
61 }, 61 },
62 [1] = { 62 [1] = {
63 .start = SMC_IRQ, 63 /* Filled in later */
64 .end = SMC_IRQ,
65 .flags = IORESOURCE_IRQ, 64 .flags = IORESOURCE_IRQ,
66 }, 65 },
67}; 66};
@@ -90,8 +89,7 @@ static struct resource cf_ide_resources[] = {
90 .flags = IORESOURCE_IO, 89 .flags = IORESOURCE_IO,
91 }, 90 },
92 [2] = { 91 [2] = {
93 .start = MRSHPC_IRQ0, 92 /* Filled in later */
94 .end = MRSHPC_IRQ0,
95 .flags = IORESOURCE_IRQ, 93 .flags = IORESOURCE_IRQ,
96 }, 94 },
97}; 95};
@@ -153,6 +151,14 @@ static struct platform_device *se7722_devices[] __initdata = {
153static int __init se7722_devices_setup(void) 151static int __init se7722_devices_setup(void)
154{ 152{
155 mrshpc_setup_windows(); 153 mrshpc_setup_windows();
154
155 /* Wire-up dynamic vectors */
156 cf_ide_resources[2].start = cf_ide_resources[2].end =
157 se7722_fpga_irq[SE7722_FPGA_IRQ_MRSHPC0];
158
159 smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
160 se7722_fpga_irq[SE7722_FPGA_IRQ_SMC];
161
156 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); 162 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
157} 163}
158device_initcall(se7722_devices_setup); 164device_initcall(se7722_devices_setup);
@@ -193,6 +199,5 @@ static void __init se7722_setup(char **cmdline_p)
193static struct sh_machine_vector mv_se7722 __initmv = { 199static struct sh_machine_vector mv_se7722 __initmv = {
194 .mv_name = "Solution Engine 7722" , 200 .mv_name = "Solution Engine 7722" ,
195 .mv_setup = se7722_setup , 201 .mv_setup = se7722_setup ,
196 .mv_nr_irqs = SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_NR,
197 .mv_init_irq = init_se7722_IRQ, 202 .mv_init_irq = init_se7722_IRQ,
198}; 203};
diff --git a/arch/sh/boards/mach-se/7724/Makefile b/arch/sh/boards/mach-se/7724/Makefile
index 349cbd6ce82d..a08b36830f0e 100644
--- a/arch/sh/boards/mach-se/7724/Makefile
+++ b/arch/sh/boards/mach-se/7724/Makefile
@@ -7,4 +7,4 @@
7# 7#
8# 8#
9 9
10obj-y := setup.o irq.o \ No newline at end of file 10obj-y := setup.o irq.o sdram.o
diff --git a/arch/sh/boards/mach-se/7724/sdram.S b/arch/sh/boards/mach-se/7724/sdram.S
new file mode 100644
index 000000000000..9040167d5022
--- /dev/null
+++ b/arch/sh/boards/mach-se/7724/sdram.S
@@ -0,0 +1,52 @@
1/*
2 * MS7724SE sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ms7724se_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(ms7724se_sdram_enter_end)
36
37 .balign 4
38ENTRY(ms7724se_sdram_leave_start)
39
40 /* DBSC: put memory in auto-refresh mode */
41
42 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
43 WAIT 1
44 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
45 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
46 ED 0xFD000010, 0x00000001 /* DBEN */
47 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
48
49 rts
50 nop
51
52ENTRY(ms7724se_sdram_leave_end)
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 0894bba9fade..4b0f0c0dc2b8 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -19,6 +19,7 @@
19#include <linux/smc91x.h> 19#include <linux/smc91x.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/input.h> 21#include <linux/input.h>
22#include <linux/input/sh_keysc.h>
22#include <linux/usb/r8a66597.h> 23#include <linux/usb/r8a66597.h>
23#include <video/sh_mobile_lcdc.h> 24#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h> 25#include <media/sh_mobile_ceu.h>
@@ -27,7 +28,7 @@
27#include <asm/heartbeat.h> 28#include <asm/heartbeat.h>
28#include <asm/sh_eth.h> 29#include <asm/sh_eth.h>
29#include <asm/clock.h> 30#include <asm/clock.h>
30#include <asm/sh_keysc.h> 31#include <asm/suspend.h>
31#include <cpu/sh7724.h> 32#include <cpu/sh7724.h>
32#include <mach-se/mach/se7724.h> 33#include <mach-se/mach/se7724.h>
33 34
@@ -451,6 +452,52 @@ static struct platform_device sh7724_usb1_gadget_device = {
451 .resource = sh7724_usb1_gadget_resources, 452 .resource = sh7724_usb1_gadget_resources,
452}; 453};
453 454
455static struct resource sdhi0_cn7_resources[] = {
456 [0] = {
457 .name = "SDHI0",
458 .start = 0x04ce0000,
459 .end = 0x04ce01ff,
460 .flags = IORESOURCE_MEM,
461 },
462 [1] = {
463 .start = 101,
464 .flags = IORESOURCE_IRQ,
465 },
466};
467
468static struct platform_device sdhi0_cn7_device = {
469 .name = "sh_mobile_sdhi",
470 .id = 0,
471 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
472 .resource = sdhi0_cn7_resources,
473 .archdata = {
474 .hwblk_id = HWBLK_SDHI0,
475 },
476};
477
478static struct resource sdhi1_cn8_resources[] = {
479 [0] = {
480 .name = "SDHI1",
481 .start = 0x04cf0000,
482 .end = 0x04cf01ff,
483 .flags = IORESOURCE_MEM,
484 },
485 [1] = {
486 .start = 24,
487 .flags = IORESOURCE_IRQ,
488 },
489};
490
491static struct platform_device sdhi1_cn8_device = {
492 .name = "sh_mobile_sdhi",
493 .id = 1,
494 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
495 .resource = sdhi1_cn8_resources,
496 .archdata = {
497 .hwblk_id = HWBLK_SDHI1,
498 },
499};
500
454static struct platform_device *ms7724se_devices[] __initdata = { 501static struct platform_device *ms7724se_devices[] __initdata = {
455 &heartbeat_device, 502 &heartbeat_device,
456 &smc91x_eth_device, 503 &smc91x_eth_device,
@@ -463,6 +510,8 @@ static struct platform_device *ms7724se_devices[] __initdata = {
463 &sh7724_usb0_host_device, 510 &sh7724_usb0_host_device,
464 &sh7724_usb1_gadget_device, 511 &sh7724_usb1_gadget_device,
465 &fsi_device, 512 &fsi_device,
513 &sdhi0_cn7_device,
514 &sdhi1_cn8_device,
466}; 515};
467 516
468#define EEPROM_OP 0xBA206000 517#define EEPROM_OP 0xBA206000
@@ -487,7 +536,7 @@ static int __init sh_eth_is_eeprom_ready(void)
487static void __init sh_eth_init(void) 536static void __init sh_eth_init(void)
488{ 537{
489 int i; 538 int i;
490 u16 mac[3]; 539 u16 mac;
491 540
492 /* check EEPROM status */ 541 /* check EEPROM status */
493 if (!sh_eth_is_eeprom_ready()) 542 if (!sh_eth_is_eeprom_ready())
@@ -501,16 +550,10 @@ static void __init sh_eth_init(void)
501 if (!sh_eth_is_eeprom_ready()) 550 if (!sh_eth_is_eeprom_ready())
502 return; 551 return;
503 552
504 mac[i] = ctrl_inw(EEPROM_DATA); 553 mac = ctrl_inw(EEPROM_DATA);
505 mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */ 554 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
555 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
506 } 556 }
507
508 /* reset sh-eth */
509 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
510
511 /* set MAC addr */
512 ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR);
513 ctrl_outl((mac[2]), SH_ETH_MALR);
514} 557}
515 558
516#define SW4140 0xBA201000 559#define SW4140 0xBA201000
@@ -527,11 +570,22 @@ static void __init sh_eth_init(void)
527#define SW41_G 0x4000 570#define SW41_G 0x4000
528#define SW41_H 0x8000 571#define SW41_H 0x8000
529 572
573extern char ms7724se_sdram_enter_start;
574extern char ms7724se_sdram_enter_end;
575extern char ms7724se_sdram_leave_start;
576extern char ms7724se_sdram_leave_end;
577
530static int __init devices_setup(void) 578static int __init devices_setup(void)
531{ 579{
532 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */ 580 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
533 struct clk *fsia_clk; 581 struct clk *fsia_clk;
534 582
583 /* register board specific self-refresh code */
584 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
585 &ms7724se_sdram_enter_start,
586 &ms7724se_sdram_enter_end,
587 &ms7724se_sdram_leave_start,
588 &ms7724se_sdram_leave_end);
535 /* Reset Release */ 589 /* Reset Release */
536 ctrl_outw(ctrl_inw(FPGA_OUT) & 590 ctrl_outw(ctrl_inw(FPGA_OUT) &
537 ~((1 << 1) | /* LAN */ 591 ~((1 << 1) | /* LAN */
@@ -701,6 +755,26 @@ static int __init devices_setup(void)
701 clk_set_rate(&fsimcka_clk, 11000); 755 clk_set_rate(&fsimcka_clk, 11000);
702 clk_put(fsia_clk); 756 clk_put(fsia_clk);
703 757
758 /* SDHI0 connected to cn7 */
759 gpio_request(GPIO_FN_SDHI0CD, NULL);
760 gpio_request(GPIO_FN_SDHI0WP, NULL);
761 gpio_request(GPIO_FN_SDHI0D3, NULL);
762 gpio_request(GPIO_FN_SDHI0D2, NULL);
763 gpio_request(GPIO_FN_SDHI0D1, NULL);
764 gpio_request(GPIO_FN_SDHI0D0, NULL);
765 gpio_request(GPIO_FN_SDHI0CMD, NULL);
766 gpio_request(GPIO_FN_SDHI0CLK, NULL);
767
768 /* SDHI1 connected to cn8 */
769 gpio_request(GPIO_FN_SDHI1CD, NULL);
770 gpio_request(GPIO_FN_SDHI1WP, NULL);
771 gpio_request(GPIO_FN_SDHI1D3, NULL);
772 gpio_request(GPIO_FN_SDHI1D2, NULL);
773 gpio_request(GPIO_FN_SDHI1D1, NULL);
774 gpio_request(GPIO_FN_SDHI1D0, NULL);
775 gpio_request(GPIO_FN_SDHI1CMD, NULL);
776 gpio_request(GPIO_FN_SDHI1CLK, NULL);
777
704 /* 778 /*
705 * enable SH-Eth 779 * enable SH-Eth
706 * 780 *
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c
index fd56a71ca9d9..b51b1fc4baae 100644
--- a/arch/sh/boot/compressed/misc.c
+++ b/arch/sh/boot/compressed/misc.c
@@ -131,7 +131,7 @@ void decompress_kernel(void)
131#ifdef CONFIG_SUPERH64 131#ifdef CONFIG_SUPERH64
132 output_addr = (CONFIG_MEMORY_START + 0x2000); 132 output_addr = (CONFIG_MEMORY_START + 0x2000);
133#else 133#else
134 output_addr = PHYSADDR((unsigned long)&_text+PAGE_SIZE); 134 output_addr = __pa((unsigned long)&_text+PAGE_SIZE);
135#ifdef CONFIG_29BIT 135#ifdef CONFIG_29BIT
136 output_addr |= P2SEG; 136 output_addr |= P2SEG;
137#endif 137#endif
diff --git a/arch/sh/boot/romimage/Makefile b/arch/sh/boot/romimage/Makefile
index 5806eee84f6f..f473a24a2d92 100644
--- a/arch/sh/boot/romimage/Makefile
+++ b/arch/sh/boot/romimage/Makefile
@@ -4,16 +4,22 @@
4# create an image suitable for burning to flash from zImage 4# create an image suitable for burning to flash from zImage
5# 5#
6 6
7targets := vmlinux head.o 7targets := vmlinux head.o zeropage.bin piggy.o
8 8
9OBJECTS = $(obj)/head.o 9OBJECTS = $(obj)/head.o
10LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart 10LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart \
11 -T $(obj)/../../kernel/vmlinux.lds
11 12
12$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE 13$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
13 $(call if_changed,ld) 14 $(call if_changed,ld)
14 @: 15 @:
15 16
17OBJCOPYFLAGS += -j .empty_zero_page
18
19$(obj)/zeropage.bin: vmlinux FORCE
20 $(call if_changed,objcopy)
21
16LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T 22LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
17 23
18$(obj)/piggy.o: $(obj)/vmlinux.scr arch/sh/boot/zImage FORCE 24$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/zeropage.bin arch/sh/boot/zImage FORCE
19 $(call if_changed,ld) 25 $(call if_changed,ld)
diff --git a/arch/sh/boot/romimage/head.S b/arch/sh/boot/romimage/head.S
index 219bc626dd71..93e779a405ec 100644
--- a/arch/sh/boot/romimage/head.S
+++ b/arch/sh/boot/romimage/head.S
@@ -5,6 +5,44 @@
5 */ 5 */
6 6
7.text 7.text
8 #include <asm/page.h>
9
8 .global romstart 10 .global romstart
9romstart: 11romstart:
12 /* include board specific setup code */
10#include <mach/romimage.h> 13#include <mach/romimage.h>
14
15 /* copy the empty_zero_page contents to where vmlinux expects it */
16 mova empty_zero_page_src, r0
17 mov.l empty_zero_page_dst, r1
18 mov #(PAGE_SHIFT - 4), r4
19 mov #1, r3
20 shld r4, r3 /* r3 = PAGE_SIZE / 16 */
21
221:
23 mov.l @r0, r4
24 mov.l @(4, r0), r5
25 mov.l @(8, r0), r6
26 mov.l @(12, r0), r7
27 add #16,r0
28 mov.l r4, @r1
29 mov.l r5, @(4, r1)
30 mov.l r6, @(8, r1)
31 mov.l r7, @(12, r1)
32 dt r3
33 add #16,r1
34 bf 1b
35
36 /* jump to the zImage entry point located after the zero page data */
37 mov #PAGE_SHIFT, r4
38 mov #1, r1
39 shld r4, r1
40 mova empty_zero_page_src, r0
41 add r1, r0
42 jmp @r0
43 nop
44
45 .align 2
46empty_zero_page_dst:
47 .long _text
48empty_zero_page_src:
diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c
index 347ee11351ec..1ee631d3725e 100644
--- a/arch/sh/drivers/dma/dma-sysfs.c
+++ b/arch/sh/drivers/dma/dma-sysfs.c
@@ -13,7 +13,6 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/sysdev.h> 14#include <linux/sysdev.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/module.h>
17#include <linux/err.h> 16#include <linux/err.h>
18#include <linux/string.h> 17#include <linux/string.h>
19#include <asm/dma.h> 18#include <asm/dma.h>
@@ -21,7 +20,6 @@
21static struct sysdev_class dma_sysclass = { 20static struct sysdev_class dma_sysclass = {
22 .name = "dma", 21 .name = "dma",
23}; 22};
24EXPORT_SYMBOL(dma_sysclass);
25 23
26static ssize_t dma_show_devices(struct sys_device *dev, 24static ssize_t dma_show_devices(struct sys_device *dev,
27 struct sysdev_attribute *attr, char *buf) 25 struct sysdev_attribute *attr, char *buf)
diff --git a/arch/sh/drivers/pci/Kconfig b/arch/sh/drivers/pci/Kconfig
deleted file mode 100644
index e8db585a6638..000000000000
--- a/arch/sh/drivers/pci/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
1config PCI
2 bool "PCI support"
3 depends on SYS_SUPPORTS_PCI
4 help
5 Find out whether you have a PCI motherboard. PCI is the name of a
6 bus system, i.e. the way the CPU talks to the other stuff inside
7 your box. If you have PCI, say Y, otherwise N.
8
9config SH_PCIDMA_NONCOHERENT
10 bool "Cache and PCI noncoherent"
11 depends on PCI
12 default y
13 help
14 Enable this option if your platform does not have a CPU cache which
15 remains coherent with PCI DMA. It is safest to say 'Y', although you
16 will see better performance if you can say 'N', because the PCI DMA
17 code will not have to flush the CPU's caches. If you have a PCI host
18 bridge integrated with your SH CPU, refer carefully to the chip specs
19 to see if you can say 'N' here. Otherwise, leave it as 'Y'.
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 80d40813e057..99d6b3ecbe22 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -28,9 +28,6 @@
28/* Returns the privileged segment base of a given address */ 28/* Returns the privileged segment base of a given address */
29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
30 30
31/* Returns the physical address of a PnSEG (n=1,2) address */
32#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
33
34#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED) 31#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED)
35/* 32/*
36 * Map an address to a certain privileged segment 33 * Map an address to a certain privileged segment
@@ -60,5 +57,11 @@
60#define P3_ADDR_MAX P4SEG 57#define P3_ADDR_MAX P4SEG
61#endif 58#endif
62 59
60#ifndef __ASSEMBLY__
61#ifdef CONFIG_PMB
62extern int __in_29bit_mode(void);
63#endif /* CONFIG_PMB */
64#endif /* __ASSEMBLY__ */
65
63#endif /* __KERNEL__ */ 66#endif /* __KERNEL__ */
64#endif /* __ASM_SH_ADDRSPACE_H */ 67#endif /* __ASM_SH_ADDRSPACE_H */
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index e8e78137c6f5..b16388d71954 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -78,11 +78,10 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
78#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) 78#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
79#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 79#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
80 80
81/* Atomic operations are already serializing on SH */ 81#define smp_mb__before_atomic_dec() smp_mb()
82#define smp_mb__before_atomic_dec() barrier() 82#define smp_mb__after_atomic_dec() smp_mb()
83#define smp_mb__after_atomic_dec() barrier() 83#define smp_mb__before_atomic_inc() smp_mb()
84#define smp_mb__before_atomic_inc() barrier() 84#define smp_mb__after_atomic_inc() smp_mb()
85#define smp_mb__after_atomic_inc() barrier()
86 85
87#include <asm-generic/atomic-long.h> 86#include <asm-generic/atomic-long.h>
88#include <asm-generic/atomic64.h> 87#include <asm-generic/atomic64.h>
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h
index ebe595b7ab1f..98511e4d28cb 100644
--- a/arch/sh/include/asm/bitops.h
+++ b/arch/sh/include/asm/bitops.h
@@ -26,8 +26,8 @@
26/* 26/*
27 * clear_bit() doesn't provide any barrier for the compiler. 27 * clear_bit() doesn't provide any barrier for the compiler.
28 */ 28 */
29#define smp_mb__before_clear_bit() barrier() 29#define smp_mb__before_clear_bit() smp_mb()
30#define smp_mb__after_clear_bit() barrier() 30#define smp_mb__after_clear_bit() smp_mb()
31 31
32#ifdef CONFIG_SUPERH32 32#ifdef CONFIG_SUPERH32
33static inline unsigned long ffz(unsigned long word) 33static inline unsigned long ffz(unsigned long word)
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h
index 46260fcbdf4b..02a19a1c033a 100644
--- a/arch/sh/include/asm/bugs.h
+++ b/arch/sh/include/asm/bugs.h
@@ -14,11 +14,15 @@
14 14
15#include <asm/processor.h> 15#include <asm/processor.h>
16 16
17extern void select_idle_routine(void);
18
17static void __init check_bugs(void) 19static void __init check_bugs(void)
18{ 20{
19 extern unsigned long loops_per_jiffy; 21 extern unsigned long loops_per_jiffy;
20 char *p = &init_utsname()->machine[2]; /* "sh" */ 22 char *p = &init_utsname()->machine[2]; /* "sh" */
21 23
24 select_idle_routine();
25
22 current_cpu_data.loops_per_jiffy = loops_per_jiffy; 26 current_cpu_data.loops_per_jiffy = loops_per_jiffy;
23 27
24 switch (current_cpu_data.family) { 28 switch (current_cpu_data.family) {
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index 69d56dd4c968..87ced133a363 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -1,219 +1,108 @@
1#ifndef __ASM_SH_DMA_MAPPING_H 1#ifndef __ASM_SH_DMA_MAPPING_H
2#define __ASM_SH_DMA_MAPPING_H 2#define __ASM_SH_DMA_MAPPING_H
3 3
4#include <linux/mm.h> 4extern struct dma_map_ops *dma_ops;
5#include <linux/scatterlist.h> 5extern void no_iommu_init(void);
6#include <linux/dma-debug.h> 6
7#include <asm/cacheflush.h> 7static inline struct dma_map_ops *get_dma_ops(struct device *dev)
8#include <asm/io.h> 8{
9 return dma_ops;
10}
11
9#include <asm-generic/dma-coherent.h> 12#include <asm-generic/dma-coherent.h>
13#include <asm-generic/dma-mapping-common.h>
14
15static inline int dma_supported(struct device *dev, u64 mask)
16{
17 struct dma_map_ops *ops = get_dma_ops(dev);
10 18
11extern struct bus_type pci_bus_type; 19 if (ops->dma_supported)
20 return ops->dma_supported(dev, mask);
12 21
13#define dma_supported(dev, mask) (1) 22 return 1;
23}
14 24
15static inline int dma_set_mask(struct device *dev, u64 mask) 25static inline int dma_set_mask(struct device *dev, u64 mask)
16{ 26{
27 struct dma_map_ops *ops = get_dma_ops(dev);
28
17 if (!dev->dma_mask || !dma_supported(dev, mask)) 29 if (!dev->dma_mask || !dma_supported(dev, mask))
18 return -EIO; 30 return -EIO;
31 if (ops->set_dma_mask)
32 return ops->set_dma_mask(dev, mask);
19 33
20 *dev->dma_mask = mask; 34 *dev->dma_mask = mask;
21 35
22 return 0; 36 return 0;
23} 37}
24 38
25void *dma_alloc_coherent(struct device *dev, size_t size,
26 dma_addr_t *dma_handle, gfp_t flag);
27
28void dma_free_coherent(struct device *dev, size_t size,
29 void *vaddr, dma_addr_t dma_handle);
30
31void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 39void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
32 enum dma_data_direction dir); 40 enum dma_data_direction dir);
33 41
34#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 42#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
35#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 43#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
36#define dma_is_consistent(d, h) (1)
37
38static inline dma_addr_t dma_map_single(struct device *dev,
39 void *ptr, size_t size,
40 enum dma_data_direction dir)
41{
42 dma_addr_t addr = virt_to_phys(ptr);
43
44#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
45 if (dev->bus == &pci_bus_type)
46 return addr;
47#endif
48 dma_cache_sync(dev, ptr, size, dir);
49
50 debug_dma_map_page(dev, virt_to_page(ptr),
51 (unsigned long)ptr & ~PAGE_MASK, size,
52 dir, addr, true);
53
54 return addr;
55}
56
57static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
58 size_t size, enum dma_data_direction dir)
59{
60 debug_dma_unmap_page(dev, addr, size, dir, true);
61}
62 44
63static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, 45#ifdef CONFIG_DMA_COHERENT
64 int nents, enum dma_data_direction dir) 46#define dma_is_consistent(d, h) (1)
65{ 47#else
66 int i; 48#define dma_is_consistent(d, h) (0)
67
68 for (i = 0; i < nents; i++) {
69#if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
70 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
71#endif 49#endif
72 sg[i].dma_address = sg_phys(&sg[i]);
73 sg[i].dma_length = sg[i].length;
74 }
75 50
76 debug_dma_map_sg(dev, sg, nents, i, dir); 51static inline int dma_get_cache_alignment(void)
77
78 return nents;
79}
80
81static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
82 int nents, enum dma_data_direction dir)
83{
84 debug_dma_unmap_sg(dev, sg, nents, dir);
85}
86
87static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
88 unsigned long offset, size_t size,
89 enum dma_data_direction dir)
90{
91 return dma_map_single(dev, page_address(page) + offset, size, dir);
92}
93
94static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
95 size_t size, enum dma_data_direction dir)
96{
97 dma_unmap_single(dev, dma_address, size, dir);
98}
99
100static inline void __dma_sync_single(struct device *dev, dma_addr_t dma_handle,
101 size_t size, enum dma_data_direction dir)
102{ 52{
103#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) 53 /*
104 if (dev->bus == &pci_bus_type) 54 * Each processor family will define its own L1_CACHE_SHIFT,
105 return; 55 * L1_CACHE_BYTES wraps to this, so this is always safe.
106#endif 56 */
107 dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir); 57 return L1_CACHE_BYTES;
108} 58}
109 59
110static inline void dma_sync_single_range(struct device *dev, 60static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
111 dma_addr_t dma_handle,
112 unsigned long offset, size_t size,
113 enum dma_data_direction dir)
114{ 61{
115#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) 62 struct dma_map_ops *ops = get_dma_ops(dev);
116 if (dev->bus == &pci_bus_type)
117 return;
118#endif
119 dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir);
120}
121 63
122static inline void __dma_sync_sg(struct device *dev, struct scatterlist *sg, 64 if (ops->mapping_error)
123 int nelems, enum dma_data_direction dir) 65 return ops->mapping_error(dev, dma_addr);
124{
125 int i;
126 66
127 for (i = 0; i < nelems; i++) { 67 return dma_addr == 0;
128#if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
129 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
130#endif
131 sg[i].dma_address = sg_phys(&sg[i]);
132 sg[i].dma_length = sg[i].length;
133 }
134} 68}
135 69
136static inline void dma_sync_single_for_cpu(struct device *dev, 70static inline void *dma_alloc_coherent(struct device *dev, size_t size,
137 dma_addr_t dma_handle, size_t size, 71 dma_addr_t *dma_handle, gfp_t gfp)
138 enum dma_data_direction dir)
139{ 72{
140 __dma_sync_single(dev, dma_handle, size, dir); 73 struct dma_map_ops *ops = get_dma_ops(dev);
141 debug_dma_sync_single_for_cpu(dev, dma_handle, size, dir); 74 void *memory;
142}
143 75
144static inline void dma_sync_single_for_device(struct device *dev, 76 if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
145 dma_addr_t dma_handle, 77 return memory;
146 size_t size, 78 if (!ops->alloc_coherent)
147 enum dma_data_direction dir) 79 return NULL;
148{
149 __dma_sync_single(dev, dma_handle, size, dir);
150 debug_dma_sync_single_for_device(dev, dma_handle, size, dir);
151}
152 80
153static inline void dma_sync_single_range_for_cpu(struct device *dev, 81 memory = ops->alloc_coherent(dev, size, dma_handle, gfp);
154 dma_addr_t dma_handle, 82 debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
155 unsigned long offset,
156 size_t size,
157 enum dma_data_direction direction)
158{
159 dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
160 debug_dma_sync_single_range_for_cpu(dev, dma_handle,
161 offset, size, direction);
162}
163 83
164static inline void dma_sync_single_range_for_device(struct device *dev, 84 return memory;
165 dma_addr_t dma_handle,
166 unsigned long offset,
167 size_t size,
168 enum dma_data_direction direction)
169{
170 dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
171 debug_dma_sync_single_range_for_device(dev, dma_handle,
172 offset, size, direction);
173} 85}
174 86
175 87static inline void dma_free_coherent(struct device *dev, size_t size,
176static inline void dma_sync_sg_for_cpu(struct device *dev, 88 void *vaddr, dma_addr_t dma_handle)
177 struct scatterlist *sg, int nelems,
178 enum dma_data_direction dir)
179{ 89{
180 __dma_sync_sg(dev, sg, nelems, dir); 90 struct dma_map_ops *ops = get_dma_ops(dev);
181 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
182}
183 91
184static inline void dma_sync_sg_for_device(struct device *dev, 92 WARN_ON(irqs_disabled()); /* for portability */
185 struct scatterlist *sg, int nelems,
186 enum dma_data_direction dir)
187{
188 __dma_sync_sg(dev, sg, nelems, dir);
189 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
190}
191 93
192static inline int dma_get_cache_alignment(void) 94 if (dma_release_from_coherent(dev, get_order(size), vaddr))
193{ 95 return;
194 /*
195 * Each processor family will define its own L1_CACHE_SHIFT,
196 * L1_CACHE_BYTES wraps to this, so this is always safe.
197 */
198 return L1_CACHE_BYTES;
199}
200 96
201static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 97 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
202{ 98 if (ops->free_coherent)
203 return dma_addr == 0; 99 ops->free_coherent(dev, size, vaddr, dma_handle);
204} 100}
205 101
206#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY 102/* arch/sh/mm/consistent.c */
207 103extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
208extern int 104 dma_addr_t *dma_addr, gfp_t flag);
209dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 105extern void dma_generic_free_coherent(struct device *dev, size_t size,
210 dma_addr_t device_addr, size_t size, int flags); 106 void *vaddr, dma_addr_t dma_handle);
211
212extern void
213dma_release_declared_memory(struct device *dev);
214
215extern void *
216dma_mark_declared_memory_occupied(struct device *dev,
217 dma_addr_t device_addr, size_t size);
218 107
219#endif /* __ASM_SH_DMA_MAPPING_H */ 108#endif /* __ASM_SH_DMA_MAPPING_H */
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h
index ced6795891a6..bdccbbfdc0bd 100644
--- a/arch/sh/include/asm/dwarf.h
+++ b/arch/sh/include/asm/dwarf.h
@@ -194,6 +194,12 @@
194#define DWARF_ARCH_RA_REG 17 194#define DWARF_ARCH_RA_REG 17
195 195
196#ifndef __ASSEMBLY__ 196#ifndef __ASSEMBLY__
197
198#include <linux/compiler.h>
199#include <linux/bug.h>
200#include <linux/list.h>
201#include <linux/module.h>
202
197/* 203/*
198 * Read either the frame pointer (r14) or the stack pointer (r15). 204 * Read either the frame pointer (r14) or the stack pointer (r15).
199 * NOTE: this MUST be inlined. 205 * NOTE: this MUST be inlined.
@@ -241,6 +247,12 @@ struct dwarf_cie {
241 247
242 unsigned long flags; 248 unsigned long flags;
243#define DWARF_CIE_Z_AUGMENTATION (1 << 0) 249#define DWARF_CIE_Z_AUGMENTATION (1 << 0)
250
251 /*
252 * 'mod' will be non-NULL if this CIE came from a module's
253 * .eh_frame section.
254 */
255 struct module *mod;
244}; 256};
245 257
246/** 258/**
@@ -255,6 +267,12 @@ struct dwarf_fde {
255 unsigned char *instructions; 267 unsigned char *instructions;
256 unsigned char *end; 268 unsigned char *end;
257 struct list_head link; 269 struct list_head link;
270
271 /*
272 * 'mod' will be non-NULL if this FDE came from a module's
273 * .eh_frame section.
274 */
275 struct module *mod;
258}; 276};
259 277
260/** 278/**
@@ -364,6 +382,12 @@ static inline unsigned int DW_CFA_operand(unsigned long insn)
364 382
365extern struct dwarf_frame *dwarf_unwind_stack(unsigned long, 383extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
366 struct dwarf_frame *); 384 struct dwarf_frame *);
385extern void dwarf_free_frame(struct dwarf_frame *);
386
387extern int module_dwarf_finalize(const Elf_Ehdr *, const Elf_Shdr *,
388 struct module *);
389extern void module_dwarf_cleanup(struct module *);
390
367#endif /* !__ASSEMBLY__ */ 391#endif /* !__ASSEMBLY__ */
368 392
369#define CFI_STARTPROC .cfi_startproc 393#define CFI_STARTPROC .cfi_startproc
@@ -391,6 +415,10 @@ extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
391static inline void dwarf_unwinder_init(void) 415static inline void dwarf_unwinder_init(void)
392{ 416{
393} 417}
418
419#define module_dwarf_finalize(hdr, sechdrs, me) (0)
420#define module_dwarf_cleanup(mod) do { } while (0)
421
394#endif 422#endif
395 423
396#endif /* CONFIG_DWARF_UNWINDER */ 424#endif /* CONFIG_DWARF_UNWINDER */
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h
index 721fcc4d5e98..5ac1e40a511c 100644
--- a/arch/sh/include/asm/fixmap.h
+++ b/arch/sh/include/asm/fixmap.h
@@ -14,9 +14,9 @@
14#define _ASM_FIXMAP_H 14#define _ASM_FIXMAP_H
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/threads.h>
17#include <asm/page.h> 18#include <asm/page.h>
18#ifdef CONFIG_HIGHMEM 19#ifdef CONFIG_HIGHMEM
19#include <linux/threads.h>
20#include <asm/kmap_types.h> 20#include <asm/kmap_types.h>
21#endif 21#endif
22 22
@@ -46,9 +46,15 @@
46 * fix-mapped? 46 * fix-mapped?
47 */ 47 */
48enum fixed_addresses { 48enum fixed_addresses {
49#define FIX_N_COLOURS 16 49 /*
50 * The FIX_CMAP entries are used by kmap_coherent() to get virtual
51 * addresses which are of a known color, and so their values are
52 * important. __fix_to_virt(FIX_CMAP_END - n) must give an address
53 * which is the same color as a page (n<<PAGE_SHIFT).
54 */
55#define FIX_N_COLOURS 8
50 FIX_CMAP_BEGIN, 56 FIX_CMAP_BEGIN,
51 FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, 57 FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1,
52 FIX_UNCACHED, 58 FIX_UNCACHED,
53#ifdef CONFIG_HIGHMEM 59#ifdef CONFIG_HIGHMEM
54 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h
index 1d3aee04b5cc..fb6bbb9b1cc8 100644
--- a/arch/sh/include/asm/fpu.h
+++ b/arch/sh/include/asm/fpu.h
@@ -18,16 +18,15 @@ static inline void grab_fpu(struct pt_regs *regs)
18 18
19struct task_struct; 19struct task_struct;
20 20
21extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); 21extern void save_fpu(struct task_struct *__tsk);
22void fpu_state_restore(struct pt_regs *regs);
22#else 23#else
23 24
25#define save_fpu(tsk) do { } while (0)
24#define release_fpu(regs) do { } while (0) 26#define release_fpu(regs) do { } while (0)
25#define grab_fpu(regs) do { } while (0) 27#define grab_fpu(regs) do { } while (0)
28#define fpu_state_restore(regs) do { } while (0)
26 29
27static inline void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
28{
29 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
30}
31#endif 30#endif
32 31
33struct user_regset; 32struct user_regset;
@@ -39,19 +38,28 @@ extern int fpregs_get(struct task_struct *target,
39 unsigned int pos, unsigned int count, 38 unsigned int pos, unsigned int count,
40 void *kbuf, void __user *ubuf); 39 void *kbuf, void __user *ubuf);
41 40
41static inline void __unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs)
42{
43 if (task_thread_info(tsk)->status & TS_USEDFPU) {
44 task_thread_info(tsk)->status &= ~TS_USEDFPU;
45 save_fpu(tsk);
46 release_fpu(regs);
47 } else
48 tsk->fpu_counter = 0;
49}
50
42static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) 51static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs)
43{ 52{
44 preempt_disable(); 53 preempt_disable();
45 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) 54 __unlazy_fpu(tsk, regs);
46 save_fpu(tsk, regs);
47 preempt_enable(); 55 preempt_enable();
48} 56}
49 57
50static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs) 58static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs)
51{ 59{
52 preempt_disable(); 60 preempt_disable();
53 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { 61 if (task_thread_info(tsk)->status & TS_USEDFPU) {
54 clear_tsk_thread_flag(tsk, TIF_USEDFPU); 62 task_thread_info(tsk)->status &= ~TS_USEDFPU;
55 release_fpu(regs); 63 release_fpu(regs);
56 } 64 }
57 preempt_enable(); 65 preempt_enable();
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h
index 12f3a31f20af..13e9966464c2 100644
--- a/arch/sh/include/asm/ftrace.h
+++ b/arch/sh/include/asm/ftrace.h
@@ -35,4 +35,21 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
35#endif /* __ASSEMBLY__ */ 35#endif /* __ASSEMBLY__ */
36#endif /* CONFIG_FUNCTION_TRACER */ 36#endif /* CONFIG_FUNCTION_TRACER */
37 37
38#ifndef __ASSEMBLY__
39
40/* arch/sh/kernel/return_address.c */
41extern void *return_address(unsigned int);
42
43#define HAVE_ARCH_CALLER_ADDR
44
45#define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
46#define CALLER_ADDR1 ((unsigned long)return_address(1))
47#define CALLER_ADDR2 ((unsigned long)return_address(2))
48#define CALLER_ADDR3 ((unsigned long)return_address(3))
49#define CALLER_ADDR4 ((unsigned long)return_address(4))
50#define CALLER_ADDR5 ((unsigned long)return_address(5))
51#define CALLER_ADDR6 ((unsigned long)return_address(6))
52
53#endif /* __ASSEMBLY__ */
54
38#endif /* __ASM_SH_FTRACE_H */ 55#endif /* __ASM_SH_FTRACE_H */
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index 61f93da2c62e..f8d9a731e903 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -20,7 +20,7 @@
20#endif 20#endif
21 21
22#define ARCH_NR_GPIOS 512 22#define ARCH_NR_GPIOS 512
23#include <asm-generic/gpio.h> 23#include <linux/sh_pfc.h>
24 24
25#ifdef CONFIG_GPIOLIB 25#ifdef CONFIG_GPIOLIB
26 26
@@ -53,84 +53,4 @@ static inline int irq_to_gpio(unsigned int irq)
53 53
54#endif /* CONFIG_GPIOLIB */ 54#endif /* CONFIG_GPIOLIB */
55 55
56typedef unsigned short pinmux_enum_t;
57typedef unsigned short pinmux_flag_t;
58
59#define PINMUX_TYPE_NONE 0
60#define PINMUX_TYPE_FUNCTION 1
61#define PINMUX_TYPE_GPIO 2
62#define PINMUX_TYPE_OUTPUT 3
63#define PINMUX_TYPE_INPUT 4
64#define PINMUX_TYPE_INPUT_PULLUP 5
65#define PINMUX_TYPE_INPUT_PULLDOWN 6
66
67#define PINMUX_FLAG_TYPE (0x7)
68#define PINMUX_FLAG_WANT_PULLUP (1 << 3)
69#define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
70
71#define PINMUX_FLAG_DBIT_SHIFT 5
72#define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
73#define PINMUX_FLAG_DREG_SHIFT 10
74#define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
75
76struct pinmux_gpio {
77 pinmux_enum_t enum_id;
78 pinmux_flag_t flags;
79};
80
81#define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
82#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
83
84struct pinmux_cfg_reg {
85 unsigned long reg, reg_width, field_width;
86 unsigned long *cnt;
87 pinmux_enum_t *enum_ids;
88};
89
90#define PINMUX_CFG_REG(name, r, r_width, f_width) \
91 .reg = r, .reg_width = r_width, .field_width = f_width, \
92 .cnt = (unsigned long [r_width / f_width]) {}, \
93 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
94
95struct pinmux_data_reg {
96 unsigned long reg, reg_width, reg_shadow;
97 pinmux_enum_t *enum_ids;
98};
99
100#define PINMUX_DATA_REG(name, r, r_width) \
101 .reg = r, .reg_width = r_width, \
102 .enum_ids = (pinmux_enum_t [r_width]) \
103
104struct pinmux_range {
105 pinmux_enum_t begin;
106 pinmux_enum_t end;
107 pinmux_enum_t force;
108};
109
110struct pinmux_info {
111 char *name;
112 pinmux_enum_t reserved_id;
113 struct pinmux_range data;
114 struct pinmux_range input;
115 struct pinmux_range input_pd;
116 struct pinmux_range input_pu;
117 struct pinmux_range output;
118 struct pinmux_range mark;
119 struct pinmux_range function;
120
121 unsigned first_gpio, last_gpio;
122
123 struct pinmux_gpio *gpios;
124 struct pinmux_cfg_reg *cfg_regs;
125 struct pinmux_data_reg *data_regs;
126
127 pinmux_enum_t *gpio_data;
128 unsigned int gpio_data_size;
129
130 unsigned long *gpio_in_use;
131 struct gpio_chip chip;
132};
133
134int register_pinmux(struct pinmux_info *pip);
135
136#endif /* __ASM_SH_GPIO_H */ 56#endif /* __ASM_SH_GPIO_H */
diff --git a/arch/sh/include/asm/hardirq.h b/arch/sh/include/asm/hardirq.h
index a5be4afa790b..48b191313a99 100644
--- a/arch/sh/include/asm/hardirq.h
+++ b/arch/sh/include/asm/hardirq.h
@@ -1,9 +1,16 @@
1#ifndef __ASM_SH_HARDIRQ_H 1#ifndef __ASM_SH_HARDIRQ_H
2#define __ASM_SH_HARDIRQ_H 2#define __ASM_SH_HARDIRQ_H
3 3
4extern void ack_bad_irq(unsigned int irq); 4#include <linux/threads.h>
5#define ack_bad_irq ack_bad_irq 5#include <linux/irq.h>
6
7typedef struct {
8 unsigned int __softirq_pending;
9 unsigned int __nmi_count; /* arch dependent */
10} ____cacheline_aligned irq_cpustat_t;
6 11
7#include <asm-generic/hardirq.h> 12#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
13
14extern void ack_bad_irq(unsigned int irq);
8 15
9#endif /* __ASM_SH_HARDIRQ_H */ 16#endif /* __ASM_SH_HARDIRQ_H */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 5be45ea4dfec..512cd3e9d0ca 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -90,15 +90,11 @@
90#define ctrl_outl __raw_writel 90#define ctrl_outl __raw_writel
91#define ctrl_outq __raw_writeq 91#define ctrl_outq __raw_writeq
92 92
93extern unsigned long generic_io_base;
94
93static inline void ctrl_delay(void) 95static inline void ctrl_delay(void)
94{ 96{
95#ifdef CONFIG_CPU_SH4 97 __raw_readw(generic_io_base);
96 __raw_readw(CCN_PVR);
97#elif defined(P2SEG)
98 __raw_readw(P2SEG);
99#else
100#error "Need a dummy address for delay"
101#endif
102} 98}
103 99
104#define __BUILD_MEMORY_STRING(bwlq, type) \ 100#define __BUILD_MEMORY_STRING(bwlq, type) \
@@ -186,8 +182,6 @@ __BUILD_MEMORY_STRING(q, u64)
186 182
187#define IO_SPACE_LIMIT 0xffffffff 183#define IO_SPACE_LIMIT 0xffffffff
188 184
189extern unsigned long generic_io_base;
190
191/* 185/*
192 * This function provides a method for the generic case where a 186 * This function provides a method for the generic case where a
193 * board-specific ioport_map simply needs to return the port + some 187 * board-specific ioport_map simply needs to return the port + some
@@ -246,7 +240,7 @@ void __iounmap(void __iomem *addr);
246static inline void __iomem * 240static inline void __iomem *
247__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) 241__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
248{ 242{
249#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) 243#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB)
250 unsigned long last_addr = offset + size - 1; 244 unsigned long last_addr = offset + size - 1;
251#endif 245#endif
252 void __iomem *ret; 246 void __iomem *ret;
@@ -255,7 +249,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
255 if (ret) 249 if (ret)
256 return ret; 250 return ret;
257 251
258#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) 252#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB)
259 /* 253 /*
260 * For P1 and P2 space this is trivial, as everything is already 254 * For P1 and P2 space this is trivial, as everything is already
261 * mapped. Uncached access for P1 addresses are done through P2. 255 * mapped. Uncached access for P1 addresses are done through P2.
diff --git a/arch/sh/include/asm/irqflags.h b/arch/sh/include/asm/irqflags.h
index 46e71da5be6b..a741153b41c2 100644
--- a/arch/sh/include/asm/irqflags.h
+++ b/arch/sh/include/asm/irqflags.h
@@ -1,34 +1,9 @@
1#ifndef __ASM_SH_IRQFLAGS_H 1#ifndef __ASM_SH_IRQFLAGS_H
2#define __ASM_SH_IRQFLAGS_H 2#define __ASM_SH_IRQFLAGS_H
3 3
4#ifdef CONFIG_SUPERH32 4#define RAW_IRQ_DISABLED 0xf0
5#include "irqflags_32.h" 5#define RAW_IRQ_ENABLED 0x00
6#else
7#include "irqflags_64.h"
8#endif
9 6
10#define raw_local_save_flags(flags) \ 7#include <asm-generic/irqflags.h>
11 do { (flags) = __raw_local_save_flags(); } while (0)
12
13static inline int raw_irqs_disabled_flags(unsigned long flags)
14{
15 return (flags != 0);
16}
17
18static inline int raw_irqs_disabled(void)
19{
20 unsigned long flags = __raw_local_save_flags();
21
22 return raw_irqs_disabled_flags(flags);
23}
24
25#define raw_local_irq_save(flags) \
26 do { (flags) = __raw_local_irq_save(); } while (0)
27
28static inline void raw_local_irq_restore(unsigned long flags)
29{
30 if ((flags & 0xf0) != 0xf0)
31 raw_local_irq_enable();
32}
33 8
34#endif /* __ASM_SH_IRQFLAGS_H */ 9#endif /* __ASM_SH_IRQFLAGS_H */
diff --git a/arch/sh/include/asm/irqflags_32.h b/arch/sh/include/asm/irqflags_32.h
deleted file mode 100644
index 60218f541340..000000000000
--- a/arch/sh/include/asm/irqflags_32.h
+++ /dev/null
@@ -1,99 +0,0 @@
1#ifndef __ASM_SH_IRQFLAGS_32_H
2#define __ASM_SH_IRQFLAGS_32_H
3
4static inline void raw_local_irq_enable(void)
5{
6 unsigned long __dummy0, __dummy1;
7
8 __asm__ __volatile__ (
9 "stc sr, %0\n\t"
10 "and %1, %0\n\t"
11#ifdef CONFIG_CPU_HAS_SR_RB
12 "stc r6_bank, %1\n\t"
13 "or %1, %0\n\t"
14#endif
15 "ldc %0, sr\n\t"
16 : "=&r" (__dummy0), "=r" (__dummy1)
17 : "1" (~0x000000f0)
18 : "memory"
19 );
20}
21
22static inline void raw_local_irq_disable(void)
23{
24 unsigned long flags;
25
26 __asm__ __volatile__ (
27 "stc sr, %0\n\t"
28 "or #0xf0, %0\n\t"
29 "ldc %0, sr\n\t"
30 : "=&z" (flags)
31 : /* no inputs */
32 : "memory"
33 );
34}
35
36static inline void set_bl_bit(void)
37{
38 unsigned long __dummy0, __dummy1;
39
40 __asm__ __volatile__ (
41 "stc sr, %0\n\t"
42 "or %2, %0\n\t"
43 "and %3, %0\n\t"
44 "ldc %0, sr\n\t"
45 : "=&r" (__dummy0), "=r" (__dummy1)
46 : "r" (0x10000000), "r" (0xffffff0f)
47 : "memory"
48 );
49}
50
51static inline void clear_bl_bit(void)
52{
53 unsigned long __dummy0, __dummy1;
54
55 __asm__ __volatile__ (
56 "stc sr, %0\n\t"
57 "and %2, %0\n\t"
58 "ldc %0, sr\n\t"
59 : "=&r" (__dummy0), "=r" (__dummy1)
60 : "1" (~0x10000000)
61 : "memory"
62 );
63}
64
65static inline unsigned long __raw_local_save_flags(void)
66{
67 unsigned long flags;
68
69 __asm__ __volatile__ (
70 "stc sr, %0\n\t"
71 "and #0xf0, %0\n\t"
72 : "=&z" (flags)
73 : /* no inputs */
74 : "memory"
75 );
76
77 return flags;
78}
79
80static inline unsigned long __raw_local_irq_save(void)
81{
82 unsigned long flags, __dummy;
83
84 __asm__ __volatile__ (
85 "stc sr, %1\n\t"
86 "mov %1, %0\n\t"
87 "or #0xf0, %0\n\t"
88 "ldc %0, sr\n\t"
89 "mov %1, %0\n\t"
90 "and #0xf0, %0\n\t"
91 : "=&z" (flags), "=&r" (__dummy)
92 : /* no inputs */
93 : "memory"
94 );
95
96 return flags;
97}
98
99#endif /* __ASM_SH_IRQFLAGS_32_H */
diff --git a/arch/sh/include/asm/irqflags_64.h b/arch/sh/include/asm/irqflags_64.h
deleted file mode 100644
index 88f65222c1d4..000000000000
--- a/arch/sh/include/asm/irqflags_64.h
+++ /dev/null
@@ -1,85 +0,0 @@
1#ifndef __ASM_SH_IRQFLAGS_64_H
2#define __ASM_SH_IRQFLAGS_64_H
3
4#include <cpu/registers.h>
5
6#define SR_MASK_LL 0x00000000000000f0LL
7#define SR_BL_LL 0x0000000010000000LL
8
9static inline void raw_local_irq_enable(void)
10{
11 unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL;
12
13 __asm__ __volatile__("getcon " __SR ", %0\n\t"
14 "and %0, %1, %0\n\t"
15 "putcon %0, " __SR "\n\t"
16 : "=&r" (__dummy0)
17 : "r" (__dummy1));
18}
19
20static inline void raw_local_irq_disable(void)
21{
22 unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
23
24 __asm__ __volatile__("getcon " __SR ", %0\n\t"
25 "or %0, %1, %0\n\t"
26 "putcon %0, " __SR "\n\t"
27 : "=&r" (__dummy0)
28 : "r" (__dummy1));
29}
30
31static inline void set_bl_bit(void)
32{
33 unsigned long long __dummy0, __dummy1 = SR_BL_LL;
34
35 __asm__ __volatile__("getcon " __SR ", %0\n\t"
36 "or %0, %1, %0\n\t"
37 "putcon %0, " __SR "\n\t"
38 : "=&r" (__dummy0)
39 : "r" (__dummy1));
40
41}
42
43static inline void clear_bl_bit(void)
44{
45 unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
46
47 __asm__ __volatile__("getcon " __SR ", %0\n\t"
48 "and %0, %1, %0\n\t"
49 "putcon %0, " __SR "\n\t"
50 : "=&r" (__dummy0)
51 : "r" (__dummy1));
52}
53
54static inline unsigned long __raw_local_save_flags(void)
55{
56 unsigned long long __dummy = SR_MASK_LL;
57 unsigned long flags;
58
59 __asm__ __volatile__ (
60 "getcon " __SR ", %0\n\t"
61 "and %0, %1, %0"
62 : "=&r" (flags)
63 : "r" (__dummy));
64
65 return flags;
66}
67
68static inline unsigned long __raw_local_irq_save(void)
69{
70 unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
71 unsigned long flags;
72
73 __asm__ __volatile__ (
74 "getcon " __SR ", %1\n\t"
75 "or %1, r63, %0\n\t"
76 "or %1, %2, %1\n\t"
77 "putcon %1, " __SR "\n\t"
78 "and %0, %2, %0"
79 : "=&r" (flags), "=&r" (__dummy0)
80 : "r" (__dummy1));
81
82 return flags;
83}
84
85#endif /* __ASM_SH_IRQFLAGS_64_H */
diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h
index f5963037c9d6..c7426ad9926e 100644
--- a/arch/sh/include/asm/mmu.h
+++ b/arch/sh/include/asm/mmu.h
@@ -7,12 +7,16 @@
7#define PMB_PASCR 0xff000070 7#define PMB_PASCR 0xff000070
8#define PMB_IRMCR 0xff000078 8#define PMB_IRMCR 0xff000078
9 9
10#define PASCR_SE 0x80000000
11
10#define PMB_ADDR 0xf6100000 12#define PMB_ADDR 0xf6100000
11#define PMB_DATA 0xf7100000 13#define PMB_DATA 0xf7100000
12#define PMB_ENTRY_MAX 16 14#define PMB_ENTRY_MAX 16
13#define PMB_E_MASK 0x0000000f 15#define PMB_E_MASK 0x0000000f
14#define PMB_E_SHIFT 8 16#define PMB_E_SHIFT 8
15 17
18#define PMB_PFN_MASK 0xff000000
19
16#define PMB_SZ_16M 0x00000000 20#define PMB_SZ_16M 0x00000000
17#define PMB_SZ_64M 0x00000010 21#define PMB_SZ_64M 0x00000010
18#define PMB_SZ_128M 0x00000080 22#define PMB_SZ_128M 0x00000080
@@ -62,17 +66,10 @@ struct pmb_entry {
62}; 66};
63 67
64/* arch/sh/mm/pmb.c */ 68/* arch/sh/mm/pmb.c */
65int __set_pmb_entry(unsigned long vpn, unsigned long ppn,
66 unsigned long flags, int *entry);
67int set_pmb_entry(struct pmb_entry *pmbe);
68void clear_pmb_entry(struct pmb_entry *pmbe);
69struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
70 unsigned long flags);
71void pmb_free(struct pmb_entry *pmbe);
72long pmb_remap(unsigned long virt, unsigned long phys, 69long pmb_remap(unsigned long virt, unsigned long phys,
73 unsigned long size, unsigned long flags); 70 unsigned long size, unsigned long flags);
74void pmb_unmap(unsigned long addr); 71void pmb_unmap(unsigned long addr);
72int pmb_init(void);
75#endif /* __ASSEMBLY__ */ 73#endif /* __ASSEMBLY__ */
76 74
77#endif /* __MMU_H */ 75#endif /* __MMU_H */
78
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 4163950cd1c6..67f3999b544e 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -3,8 +3,6 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <linux/dma-mapping.h>
7
8/* Can be used to override the logic in pci_scan_bus for skipping 6/* Can be used to override the logic in pci_scan_bus for skipping
9 already-configured bus numbers - to be used for buggy BIOSes 7 already-configured bus numbers - to be used for buggy BIOSes
10 or architectures with incomplete PCI setup by the loader */ 8 or architectures with incomplete PCI setup by the loader */
@@ -54,30 +52,18 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
54 * address space. The networking and block device layers use 52 * address space. The networking and block device layers use
55 * this boolean for bounce buffer decisions. 53 * this boolean for bounce buffer decisions.
56 */ 54 */
57#define PCI_DMA_BUS_IS_PHYS (1) 55#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
58
59#include <linux/types.h>
60#include <linux/slab.h>
61#include <asm/scatterlist.h>
62#include <linux/string.h>
63#include <asm/io.h>
64 56
65/* pci_unmap_{single,page} being a nop depends upon the 57/* pci_unmap_{single,page} being a nop depends upon the
66 * configuration. 58 * configuration.
67 */ 59 */
68#ifdef CONFIG_SH_PCIDMA_NONCOHERENT 60#ifdef CONFIG_DMA_NONCOHERENT
69#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ 61#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
70 dma_addr_t ADDR_NAME; 62#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
71#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ 63#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
72 __u32 LEN_NAME; 64#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
73#define pci_unmap_addr(PTR, ADDR_NAME) \ 65#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
74 ((PTR)->ADDR_NAME) 66#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
75#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
76 (((PTR)->ADDR_NAME) = (VAL))
77#define pci_unmap_len(PTR, LEN_NAME) \
78 ((PTR)->LEN_NAME)
79#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
80 (((PTR)->LEN_NAME) = (VAL))
81#else 67#else
82#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) 68#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
83#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) 69#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
diff --git a/arch/sh/include/asm/perf_event.h b/arch/sh/include/asm/perf_event.h
index 11a302297ab7..3d0c9f36d150 100644
--- a/arch/sh/include/asm/perf_event.h
+++ b/arch/sh/include/asm/perf_event.h
@@ -1,8 +1,35 @@
1#ifndef __ASM_SH_PERF_EVENT_H 1#ifndef __ASM_SH_PERF_EVENT_H
2#define __ASM_SH_PERF_EVENT_H 2#define __ASM_SH_PERF_EVENT_H
3 3
4/* SH only supports software events through this interface. */ 4struct hw_perf_event;
5static inline void set_perf_event_pending(void) {} 5
6#define MAX_HWEVENTS 2
7
8struct sh_pmu {
9 const char *name;
10 unsigned int num_events;
11 void (*disable_all)(void);
12 void (*enable_all)(void);
13 void (*enable)(struct hw_perf_event *, int);
14 void (*disable)(struct hw_perf_event *, int);
15 u64 (*read)(int);
16 int (*event_map)(int);
17 unsigned int max_events;
18 unsigned long raw_event_mask;
19 const int (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
20 [PERF_COUNT_HW_CACHE_OP_MAX]
21 [PERF_COUNT_HW_CACHE_RESULT_MAX];
22};
23
24/* arch/sh/kernel/perf_event.c */
25extern int register_sh_pmu(struct sh_pmu *);
26extern int reserve_pmc_hardware(void);
27extern void release_pmc_hardware(void);
28
29static inline void set_perf_event_pending(void)
30{
31 /* Nothing to see here, move along. */
32}
6 33
7#define PERF_EVENT_INDEX_OFFSET 0 34#define PERF_EVENT_INDEX_OFFSET 0
8 35
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index 4f3efa7d5a64..ba3046e4f06f 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -75,13 +75,31 @@ static inline unsigned long long neff_sign_extend(unsigned long val)
75#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) 75#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
76#define FIRST_USER_ADDRESS 0 76#define FIRST_USER_ADDRESS 0
77 77
78#ifdef CONFIG_32BIT 78#define PHYS_ADDR_MASK29 0x1fffffff
79#define PHYS_ADDR_MASK 0xffffffff 79#define PHYS_ADDR_MASK32 0xffffffff
80
81#ifdef CONFIG_PMB
82static inline unsigned long phys_addr_mask(void)
83{
84 /* Is the MMU in 29bit mode? */
85 if (__in_29bit_mode())
86 return PHYS_ADDR_MASK29;
87
88 return PHYS_ADDR_MASK32;
89}
90#elif defined(CONFIG_32BIT)
91static inline unsigned long phys_addr_mask(void)
92{
93 return PHYS_ADDR_MASK32;
94}
80#else 95#else
81#define PHYS_ADDR_MASK 0x1fffffff 96static inline unsigned long phys_addr_mask(void)
97{
98 return PHYS_ADDR_MASK29;
99}
82#endif 100#endif
83 101
84#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK) 102#define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK)
85#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) 103#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
86 104
87#ifdef CONFIG_SUPERH32 105#ifdef CONFIG_SUPERH32
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index c0d359ce337b..b35435516203 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -108,7 +108,7 @@ static inline unsigned long copy_ptea_attributes(unsigned long x)
108#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) 108#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
109#endif 109#endif
110 110
111#define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) 111#define _PAGE_FLAGS_HARDWARE_MASK (phys_addr_mask() & ~(_PAGE_CLEAR_FLAGS))
112 112
113/* Hardware flags, page size encoding */ 113/* Hardware flags, page size encoding */
114#if !defined(CONFIG_MMU) 114#if !defined(CONFIG_MMU)
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 9a8714945dc9..1f3d6fab660c 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -56,6 +56,7 @@ asmlinkage void __init sh_cpu_init(void);
56#define SR_DSP 0x00001000 56#define SR_DSP 0x00001000
57#define SR_IMASK 0x000000f0 57#define SR_IMASK 0x000000f0
58#define SR_FD 0x00008000 58#define SR_FD 0x00008000
59#define SR_MD 0x40000000
59 60
60/* 61/*
61 * DSP structure and data 62 * DSP structure and data
@@ -136,7 +137,7 @@ struct mm_struct;
136extern void release_thread(struct task_struct *); 137extern void release_thread(struct task_struct *);
137 138
138/* Prepare to copy thread state - unlazy all lazy status */ 139/* Prepare to copy thread state - unlazy all lazy status */
139#define prepare_to_copy(tsk) do { } while (0) 140void prepare_to_copy(struct task_struct *tsk);
140 141
141/* 142/*
142 * create a kernel thread without removing it from tasklists 143 * create a kernel thread without removing it from tasklists
diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h
index 327cc2e4c97b..e38d1d4c7f6f 100644
--- a/arch/sh/include/asm/scatterlist.h
+++ b/arch/sh/include/asm/scatterlist.h
@@ -1,7 +1,7 @@
1#ifndef __ASM_SH_SCATTERLIST_H 1#ifndef __ASM_SH_SCATTERLIST_H
2#define __ASM_SH_SCATTERLIST_H 2#define __ASM_SH_SCATTERLIST_H
3 3
4#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK 4#define ISA_DMA_THRESHOLD phys_addr_mask()
5 5
6#include <asm-generic/scatterlist.h> 6#include <asm-generic/scatterlist.h>
7 7
diff --git a/arch/sh/include/asm/sh_keysc.h b/arch/sh/include/asm/sh_keysc.h
deleted file mode 100644
index 4a65b1e40eab..000000000000
--- a/arch/sh/include/asm/sh_keysc.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef __ASM_KEYSC_H__
2#define __ASM_KEYSC_H__
3
4#define SH_KEYSC_MAXKEYS 30
5
6struct sh_keysc_info {
7 enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode;
8 int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */
9 int delay;
10 int kycr2_delay;
11 int keycodes[SH_KEYSC_MAXKEYS];
12};
13
14#endif /* __ASM_KEYSC_H__ */
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h
index 5c8ea28ff7a4..fe9c2a1ad047 100644
--- a/arch/sh/include/asm/suspend.h
+++ b/arch/sh/include/asm/suspend.h
@@ -2,6 +2,7 @@
2#define _ASM_SH_SUSPEND_H 2#define _ASM_SH_SUSPEND_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5#include <linux/notifier.h>
5static inline int arch_prepare_suspend(void) { return 0; } 6static inline int arch_prepare_suspend(void) { return 0; }
6 7
7#include <asm/ptrace.h> 8#include <asm/ptrace.h>
@@ -19,6 +20,69 @@ void sh_mobile_setup_cpuidle(void);
19static inline void sh_mobile_setup_cpuidle(void) {} 20static inline void sh_mobile_setup_cpuidle(void) {}
20#endif 21#endif
21 22
23/* notifier chains for pre/post sleep hooks */
24extern struct atomic_notifier_head sh_mobile_pre_sleep_notifier_list;
25extern struct atomic_notifier_head sh_mobile_post_sleep_notifier_list;
26
27/* priority levels for notifiers */
28#define SH_MOBILE_SLEEP_BOARD 0
29#define SH_MOBILE_SLEEP_CPU 1
30#define SH_MOBILE_PRE(x) (x)
31#define SH_MOBILE_POST(x) (-(x))
32
33/* board code registration function for self-refresh assembly snippets */
34void sh_mobile_register_self_refresh(unsigned long flags,
35 void *pre_start, void *pre_end,
36 void *post_start, void *post_end);
37
38/* register structure for address/data information */
39struct sh_sleep_regs {
40 unsigned long stbcr;
41 unsigned long bar;
42
43 /* MMU */
44 unsigned long pteh;
45 unsigned long ptel;
46 unsigned long ttb;
47 unsigned long tea;
48 unsigned long mmucr;
49 unsigned long ptea;
50 unsigned long pascr;
51 unsigned long irmcr;
52
53 /* Cache */
54 unsigned long ccr;
55 unsigned long ramcr;
56};
57
58/* data area for low-level sleep code */
59struct sh_sleep_data {
60 /* current sleep mode (SUSP_SH_...) */
61 unsigned long mode;
62
63 /* addresses of board specific self-refresh snippets */
64 unsigned long sf_pre;
65 unsigned long sf_post;
66
67 /* address of resume code */
68 unsigned long resume;
69
70 /* register state saved and restored by the assembly code */
71 unsigned long vbr;
72 unsigned long spc;
73 unsigned long sr;
74 unsigned long sp;
75
76 /* structure for keeping register addresses */
77 struct sh_sleep_regs addr;
78
79 /* structure for saving/restoring register state */
80 struct sh_sleep_regs data;
81};
82
83/* a bitmap of supported sleep modes (SUSP_SH..) */
84extern unsigned long sh_mobile_sleep_supported;
85
22#endif 86#endif
23 87
24/* flags passed to assembly suspend code */ 88/* flags passed to assembly suspend code */
@@ -27,5 +91,6 @@ static inline void sh_mobile_setup_cpuidle(void) {}
27#define SUSP_SH_RSTANDBY (1 << 2) /* SH-Mobile R-standby mode */ 91#define SUSP_SH_RSTANDBY (1 << 2) /* SH-Mobile R-standby mode */
28#define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */ 92#define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */
29#define SUSP_SH_SF (1 << 4) /* Enable self-refresh */ 93#define SUSP_SH_SF (1 << 4) /* Enable self-refresh */
94#define SUSP_SH_MMU (1 << 5) /* Save/restore MMU and cache */
30 95
31#endif /* _ASM_SH_SUSPEND_H */ 96#endif /* _ASM_SH_SUSPEND_H */
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index b5c5acdc8c0e..c15415b4b169 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -171,10 +171,6 @@ BUILD_TRAP_HANDLER(fpu_error);
171BUILD_TRAP_HANDLER(fpu_state_restore); 171BUILD_TRAP_HANDLER(fpu_state_restore);
172BUILD_TRAP_HANDLER(nmi); 172BUILD_TRAP_HANDLER(nmi);
173 173
174#ifdef CONFIG_BUG
175extern void handle_BUG(struct pt_regs *);
176#endif
177
178#define arch_align_stack(x) (x) 174#define arch_align_stack(x) (x)
179 175
180struct mem_access { 176struct mem_access {
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 607d413f6168..06814f5b59c7 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -232,4 +232,33 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
232 unsigned long r6, unsigned long r7, 232 unsigned long r6, unsigned long r7,
233 struct pt_regs __regs); 233 struct pt_regs __regs);
234 234
235static inline void set_bl_bit(void)
236{
237 unsigned long __dummy0, __dummy1;
238
239 __asm__ __volatile__ (
240 "stc sr, %0\n\t"
241 "or %2, %0\n\t"
242 "and %3, %0\n\t"
243 "ldc %0, sr\n\t"
244 : "=&r" (__dummy0), "=r" (__dummy1)
245 : "r" (0x10000000), "r" (0xffffff0f)
246 : "memory"
247 );
248}
249
250static inline void clear_bl_bit(void)
251{
252 unsigned long __dummy0, __dummy1;
253
254 __asm__ __volatile__ (
255 "stc sr, %0\n\t"
256 "and %2, %0\n\t"
257 "ldc %0, sr\n\t"
258 : "=&r" (__dummy0), "=r" (__dummy1)
259 : "1" (~0x10000000)
260 : "memory"
261 );
262}
263
235#endif /* __ASM_SH_SYSTEM_32_H */ 264#endif /* __ASM_SH_SYSTEM_32_H */
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
index 8e4a03e7966c..ab1dd917ea87 100644
--- a/arch/sh/include/asm/system_64.h
+++ b/arch/sh/include/asm/system_64.h
@@ -12,6 +12,7 @@
12 * License. See the file "COPYING" in the main directory of this archive 12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details. 13 * for more details.
14 */ 14 */
15#include <cpu/registers.h>
15#include <asm/processor.h> 16#include <asm/processor.h>
16 17
17/* 18/*
@@ -47,4 +48,29 @@ static inline reg_size_t register_align(void *val)
47 return (unsigned long long)(signed long long)(signed long)val; 48 return (unsigned long long)(signed long long)(signed long)val;
48} 49}
49 50
51#define SR_BL_LL 0x0000000010000000LL
52
53static inline void set_bl_bit(void)
54{
55 unsigned long long __dummy0, __dummy1 = SR_BL_LL;
56
57 __asm__ __volatile__("getcon " __SR ", %0\n\t"
58 "or %0, %1, %0\n\t"
59 "putcon %0, " __SR "\n\t"
60 : "=&r" (__dummy0)
61 : "r" (__dummy1));
62
63}
64
65static inline void clear_bl_bit(void)
66{
67 unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
68
69 __asm__ __volatile__("getcon " __SR ", %0\n\t"
70 "and %0, %1, %0\n\t"
71 "putcon %0, " __SR "\n\t"
72 : "=&r" (__dummy0)
73 : "r" (__dummy1));
74}
75
50#endif /* __ASM_SH_SYSTEM_64_H */ 76#endif /* __ASM_SH_SYSTEM_64_H */
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index bdeb9d46d17d..1f3d927e2265 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -19,6 +19,7 @@ struct thread_info {
19 struct task_struct *task; /* main task structure */ 19 struct task_struct *task; /* main task structure */
20 struct exec_domain *exec_domain; /* execution domain */ 20 struct exec_domain *exec_domain; /* execution domain */
21 unsigned long flags; /* low level flags */ 21 unsigned long flags; /* low level flags */
22 __u32 status; /* thread synchronous flags */
22 __u32 cpu; 23 __u32 cpu;
23 int preempt_count; /* 0 => preemptable, <0 => BUG */ 24 int preempt_count; /* 0 => preemptable, <0 => BUG */
24 mm_segment_t addr_limit; /* thread address space */ 25 mm_segment_t addr_limit; /* thread address space */
@@ -50,6 +51,7 @@ struct thread_info {
50 .task = &tsk, \ 51 .task = &tsk, \
51 .exec_domain = &default_exec_domain, \ 52 .exec_domain = &default_exec_domain, \
52 .flags = 0, \ 53 .flags = 0, \
54 .status = 0, \
53 .cpu = 0, \ 55 .cpu = 0, \
54 .preempt_count = INIT_PREEMPT_COUNT, \ 56 .preempt_count = INIT_PREEMPT_COUNT, \
55 .addr_limit = KERNEL_DS, \ 57 .addr_limit = KERNEL_DS, \
@@ -111,13 +113,11 @@ extern void free_thread_info(struct thread_info *ti);
111#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ 113#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
112#define TIF_SIGPENDING 1 /* signal pending */ 114#define TIF_SIGPENDING 1 /* signal pending */
113#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ 115#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
114#define TIF_RESTORE_SIGMASK 3 /* restore signal mask in do_signal() */
115#define TIF_SINGLESTEP 4 /* singlestepping active */ 116#define TIF_SINGLESTEP 4 /* singlestepping active */
116#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ 117#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */
117#define TIF_SECCOMP 6 /* secure computing */ 118#define TIF_SECCOMP 6 /* secure computing */
118#define TIF_NOTIFY_RESUME 7 /* callback before returning to user */ 119#define TIF_NOTIFY_RESUME 7 /* callback before returning to user */
119#define TIF_SYSCALL_TRACEPOINT 8 /* for ftrace syscall instrumentation */ 120#define TIF_SYSCALL_TRACEPOINT 8 /* for ftrace syscall instrumentation */
120#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
121#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 121#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
122#define TIF_MEMDIE 18 122#define TIF_MEMDIE 18
123#define TIF_FREEZE 19 /* Freezing for suspend */ 123#define TIF_FREEZE 19 /* Freezing for suspend */
@@ -125,13 +125,11 @@ extern void free_thread_info(struct thread_info *ti);
125#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 125#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
126#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) 126#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
127#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) 127#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
128#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
129#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) 128#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
130#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) 129#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
131#define _TIF_SECCOMP (1 << TIF_SECCOMP) 130#define _TIF_SECCOMP (1 << TIF_SECCOMP)
132#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 131#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
133#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) 132#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
134#define _TIF_USEDFPU (1 << TIF_USEDFPU)
135#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 133#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
136#define _TIF_FREEZE (1 << TIF_FREEZE) 134#define _TIF_FREEZE (1 << TIF_FREEZE)
137 135
@@ -149,13 +147,33 @@ extern void free_thread_info(struct thread_info *ti);
149/* work to do on any return to u-space */ 147/* work to do on any return to u-space */
150#define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \ 148#define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \
151 _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \ 149 _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \
152 _TIF_SINGLESTEP | _TIF_RESTORE_SIGMASK | \ 150 _TIF_SINGLESTEP | _TIF_NOTIFY_RESUME | \
153 _TIF_NOTIFY_RESUME | _TIF_SYSCALL_TRACEPOINT) 151 _TIF_SYSCALL_TRACEPOINT)
154 152
155/* work to do on interrupt/exception return */ 153/* work to do on interrupt/exception return */
156#define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \ 154#define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \
157 _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP)) 155 _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP))
158 156
157/*
158 * Thread-synchronous status.
159 *
160 * This is different from the flags in that nobody else
161 * ever touches our thread-synchronous status, so we don't
162 * have to worry about atomic accesses.
163 */
164#define TS_RESTORE_SIGMASK 0x0001 /* restore signal mask in do_signal() */
165#define TS_USEDFPU 0x0002 /* FPU used by this task this quantum */
166
167#ifndef __ASSEMBLY__
168#define HAVE_SET_RESTORE_SIGMASK 1
169static inline void set_restore_sigmask(void)
170{
171 struct thread_info *ti = current_thread_info();
172 ti->status |= TS_RESTORE_SIGMASK;
173 set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags);
174}
175#endif /* !__ASSEMBLY__ */
176
159#endif /* __KERNEL__ */ 177#endif /* __KERNEL__ */
160 178
161#endif /* __ASM_SH_THREAD_INFO_H */ 179#endif /* __ASM_SH_THREAD_INFO_H */
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index 65e7bd2f2240..37cdadd975ac 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -40,6 +40,14 @@
40 40
41#endif 41#endif
42 42
43#define mc_capable() (1)
44
45const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
46
47extern cpumask_t cpu_core_map[NR_CPUS];
48
49#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
50
43#include <asm-generic/topology.h> 51#include <asm-generic/topology.h>
44 52
45#endif /* _ASM_SH_TOPOLOGY_H */ 53#endif /* _ASM_SH_TOPOLOGY_H */
diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h
index 4ca4b7717371..9bf961684431 100644
--- a/arch/sh/include/asm/ubc.h
+++ b/arch/sh/include/asm/ubc.h
@@ -60,16 +60,5 @@
60#define BRCR_UBDE (1 << 0) 60#define BRCR_UBDE (1 << 0)
61#endif 61#endif
62 62
63#ifndef __ASSEMBLY__
64/* arch/sh/kernel/cpu/ubc.S */
65extern void ubc_sleep(void);
66
67#ifdef CONFIG_UBC_WAKEUP
68extern void ubc_wakeup(void);
69#else
70#define ubc_wakeup() do { } while (0)
71#endif
72#endif
73
74#endif /* __KERNEL__ */ 63#endif /* __KERNEL__ */
75#endif /* __ASM_SH_UBC_H */ 64#endif /* __ASM_SH_UBC_H */
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h
index 2fe7cee9e43a..19dfff5c8511 100644
--- a/arch/sh/include/asm/watchdog.h
+++ b/arch/sh/include/asm/watchdog.h
@@ -2,6 +2,8 @@
2 * include/asm-sh/watchdog.h 2 * include/asm-sh/watchdog.h
3 * 3 *
4 * Copyright (C) 2002, 2003 Paul Mundt 4 * Copyright (C) 2002, 2003 Paul Mundt
5 * Copyright (C) 2009 Siemens AG
6 * Copyright (C) 2009 Valentin Sitdikov
5 * 7 *
6 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -61,6 +63,61 @@
61#define WTCSR_CKS_2048 0x06 63#define WTCSR_CKS_2048 0x06
62#define WTCSR_CKS_4096 0x07 64#define WTCSR_CKS_4096 0x07
63 65
66#if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780)
67/**
68 * sh_wdt_read_cnt - Read from Counter
69 * Reads back the WTCNT value.
70 */
71static inline __u32 sh_wdt_read_cnt(void)
72{
73 return ctrl_inl(WTCNT_R);
74}
75
76/**
77 * sh_wdt_write_cnt - Write to Counter
78 * @val: Value to write
79 *
80 * Writes the given value @val to the lower byte of the timer counter.
81 * The upper byte is set manually on each write.
82 */
83static inline void sh_wdt_write_cnt(__u32 val)
84{
85 ctrl_outl((WTCNT_HIGH << 24) | (__u32)val, WTCNT);
86}
87
88/**
89 * sh_wdt_write_bst - Write to Counter
90 * @val: Value to write
91 *
92 * Writes the given value @val to the lower byte of the timer counter.
93 * The upper byte is set manually on each write.
94 */
95static inline void sh_wdt_write_bst(__u32 val)
96{
97 ctrl_outl((WTBST_HIGH << 24) | (__u32)val, WTBST);
98}
99/**
100 * sh_wdt_read_csr - Read from Control/Status Register
101 *
102 * Reads back the WTCSR value.
103 */
104static inline __u32 sh_wdt_read_csr(void)
105{
106 return ctrl_inl(WTCSR_R);
107}
108
109/**
110 * sh_wdt_write_csr - Write to Control/Status Register
111 * @val: Value to write
112 *
113 * Writes the given value @val to the lower byte of the control/status
114 * register. The upper byte is set manually on each write.
115 */
116static inline void sh_wdt_write_csr(__u32 val)
117{
118 ctrl_outl((WTCSR_HIGH << 24) | (__u32)val, WTCSR);
119}
120#else
64/** 121/**
65 * sh_wdt_read_cnt - Read from Counter 122 * sh_wdt_read_cnt - Read from Counter
66 * Reads back the WTCNT value. 123 * Reads back the WTCNT value.
@@ -103,6 +160,6 @@ static inline void sh_wdt_write_csr(__u8 val)
103{ 160{
104 ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); 161 ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR);
105} 162}
106 163#endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */
107#endif /* __KERNEL__ */ 164#endif /* __KERNEL__ */
108#endif /* __ASM_SH_WATCHDOG_H */ 165#endif /* __ASM_SH_WATCHDOG_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/watchdog.h b/arch/sh/include/cpu-sh4/cpu/watchdog.h
index 259f6a0ce23d..7672301d0c70 100644
--- a/arch/sh/include/cpu-sh4/cpu/watchdog.h
+++ b/arch/sh/include/cpu-sh4/cpu/watchdog.h
@@ -2,6 +2,8 @@
2 * include/asm-sh/cpu-sh4/watchdog.h 2 * include/asm-sh/cpu-sh4/watchdog.h
3 * 3 *
4 * Copyright (C) 2002, 2003 Paul Mundt 4 * Copyright (C) 2002, 2003 Paul Mundt
5 * Copyright (C) 2009 Siemens AG
6 * Copyright (C) 2009 Sitdikov Valentin
5 * 7 *
6 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -10,9 +12,20 @@
10#ifndef __ASM_CPU_SH4_WATCHDOG_H 12#ifndef __ASM_CPU_SH4_WATCHDOG_H
11#define __ASM_CPU_SH4_WATCHDOG_H 13#define __ASM_CPU_SH4_WATCHDOG_H
12 14
15#if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780)
16/* Prefix definition */
17#define WTBST_HIGH 0x55
18/* Register definitions */
19#define WTCNT_R 0xffcc0010 /*WDTCNT*/
20#define WTCSR 0xffcc0004 /*WDTCSR*/
21#define WTCNT 0xffcc0000 /*WDTST*/
22#define WTST WTCNT
23#define WTBST 0xffcc0008 /*WDTBST*/
24#else
13/* Register definitions */ 25/* Register definitions */
14#define WTCNT 0xffc00008 26#define WTCNT 0xffc00008
15#define WTCSR 0xffc0000c 27#define WTCSR 0xffc0000c
28#endif
16 29
17/* Bit definitions */ 30/* Bit definitions */
18#define WTCSR_TME 0x80 31#define WTCSR_TME 0x80
diff --git a/arch/sh/include/mach-common/mach/titan.h b/arch/sh/include/mach-common/mach/titan.h
index 03f3583c8918..4a674d27cbb8 100644
--- a/arch/sh/include/mach-common/mach/titan.h
+++ b/arch/sh/include/mach-common/mach/titan.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Platform defintions for Titan 2 * Platform definitions for Titan
3 */ 3 */
4#ifndef _ASM_SH_TITAN_H 4#ifndef _ASM_SH_TITAN_H
5#define _ASM_SH_TITAN_H 5#define _ASM_SH_TITAN_H
diff --git a/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt
index 8b8e4fa1fee9..cc737b807334 100644
--- a/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt
+++ b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt
@@ -22,13 +22,12 @@ ED 0xff000010, 0x00000004
22LIST "setup clocks" 22LIST "setup clocks"
23ED 0xa4150024, 0x00004000 23ED 0xa4150024, 0x00004000
24ED 0xa4150000, 0x8E003508 24ED 0xa4150000, 0x8E003508
25ED 0xa4150004, 0x00000000
26 25
27WAIT 1 26WAIT 1
28 27
29LIST "BSC" 28LIST "BSC"
30ED 0xff800020, 0xa5a50000 29ED 0xff800020, 0xa5a50000
31ED 0xfec10000, 0x00000013 30ED 0xfec10000, 0x00001013
32ED 0xfec10004, 0x11110400 31ED 0xfec10004, 0x11110400
33ED 0xfec10024, 0x00000440 32ED 0xfec10024, 0x00000440
34 33
diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h
index e971d9a82f4a..16505bfb8a9e 100644
--- a/arch/sh/include/mach-se/mach/se7722.h
+++ b/arch/sh/include/mach-se/mach/se7722.h
@@ -92,18 +92,11 @@
92#define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */ 92#define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */
93#define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */ 93#define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */
94#define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ 94#define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */
95
96#define SE7722_FPGA_IRQ_NR 6 95#define SE7722_FPGA_IRQ_NR 6
97#define SE7722_FPGA_IRQ_BASE 110
98
99#define MRSHPC_IRQ3 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC3)
100#define MRSHPC_IRQ2 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC2)
101#define MRSHPC_IRQ1 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC1)
102#define MRSHPC_IRQ0 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC0)
103#define SMC_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_SMC)
104#define USB_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_USB)
105 96
106/* arch/sh/boards/se/7722/irq.c */ 97/* arch/sh/boards/se/7722/irq.c */
98extern unsigned int se7722_fpga_irq[];
99
107void init_se7722_IRQ(void); 100void init_se7722_IRQ(void);
108 101
109#define __IO_PREFIX se7722 102#define __IO_PREFIX se7722
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index a2d0a40f3848..0471a3eb25ed 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -9,8 +9,12 @@ ifdef CONFIG_FUNCTION_TRACER
9CFLAGS_REMOVE_ftrace.o = -pg 9CFLAGS_REMOVE_ftrace.o = -pg
10endif 10endif
11 11
12obj-y := debugtraps.o dumpstack.o idle.o io.o io_generic.o irq.o \ 12CFLAGS_REMOVE_return_address.o = -pg
13 machvec.o nmi_debug.o process_$(BITS).o ptrace_$(BITS).o \ 13
14obj-y := debugtraps.o dma-nommu.o dumpstack.o \
15 idle.o io.o io_generic.o irq.o \
16 irq_$(BITS).o machvec.o nmi_debug.o process_$(BITS).o \
17 ptrace_$(BITS).o return_address.o \
14 setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \ 18 setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \
15 syscalls_$(BITS).o time.o topology.o traps.o \ 19 syscalls_$(BITS).o time.o topology.o traps.o \
16 traps_$(BITS).o unwinder.o 20 traps_$(BITS).o unwinder.o
@@ -28,13 +32,13 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
28obj-$(CONFIG_STACKTRACE) += stacktrace.o 32obj-$(CONFIG_STACKTRACE) += stacktrace.o
29obj-$(CONFIG_IO_TRAPPED) += io_trapped.o 33obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
30obj-$(CONFIG_KPROBES) += kprobes.o 34obj-$(CONFIG_KPROBES) += kprobes.o
31obj-$(CONFIG_GENERIC_GPIO) += gpio.o
32obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 35obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
33obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o 36obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
34obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 37obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
35obj-$(CONFIG_DUMP_CODE) += disassemble.o 38obj-$(CONFIG_DUMP_CODE) += disassemble.o
36obj-$(CONFIG_HIBERNATION) += swsusp.o 39obj-$(CONFIG_HIBERNATION) += swsusp.o
37obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o 40obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
41obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
38 42
39obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o 43obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
40 44
diff --git a/arch/sh/kernel/asm-offsets.c b/arch/sh/kernel/asm-offsets.c
index d218e808294e..08a2be775b6c 100644
--- a/arch/sh/kernel/asm-offsets.c
+++ b/arch/sh/kernel/asm-offsets.c
@@ -34,5 +34,28 @@ int main(void)
34 DEFINE(PBE_NEXT, offsetof(struct pbe, next)); 34 DEFINE(PBE_NEXT, offsetof(struct pbe, next));
35 DEFINE(SWSUSP_ARCH_REGS_SIZE, sizeof(struct swsusp_arch_regs)); 35 DEFINE(SWSUSP_ARCH_REGS_SIZE, sizeof(struct swsusp_arch_regs));
36#endif 36#endif
37
38 DEFINE(SH_SLEEP_MODE, offsetof(struct sh_sleep_data, mode));
39 DEFINE(SH_SLEEP_SF_PRE, offsetof(struct sh_sleep_data, sf_pre));
40 DEFINE(SH_SLEEP_SF_POST, offsetof(struct sh_sleep_data, sf_post));
41 DEFINE(SH_SLEEP_RESUME, offsetof(struct sh_sleep_data, resume));
42 DEFINE(SH_SLEEP_VBR, offsetof(struct sh_sleep_data, vbr));
43 DEFINE(SH_SLEEP_SPC, offsetof(struct sh_sleep_data, spc));
44 DEFINE(SH_SLEEP_SR, offsetof(struct sh_sleep_data, sr));
45 DEFINE(SH_SLEEP_SP, offsetof(struct sh_sleep_data, sp));
46 DEFINE(SH_SLEEP_BASE_ADDR, offsetof(struct sh_sleep_data, addr));
47 DEFINE(SH_SLEEP_BASE_DATA, offsetof(struct sh_sleep_data, data));
48 DEFINE(SH_SLEEP_REG_STBCR, offsetof(struct sh_sleep_regs, stbcr));
49 DEFINE(SH_SLEEP_REG_BAR, offsetof(struct sh_sleep_regs, bar));
50 DEFINE(SH_SLEEP_REG_PTEH, offsetof(struct sh_sleep_regs, pteh));
51 DEFINE(SH_SLEEP_REG_PTEL, offsetof(struct sh_sleep_regs, ptel));
52 DEFINE(SH_SLEEP_REG_TTB, offsetof(struct sh_sleep_regs, ttb));
53 DEFINE(SH_SLEEP_REG_TEA, offsetof(struct sh_sleep_regs, tea));
54 DEFINE(SH_SLEEP_REG_MMUCR, offsetof(struct sh_sleep_regs, mmucr));
55 DEFINE(SH_SLEEP_REG_PTEA, offsetof(struct sh_sleep_regs, ptea));
56 DEFINE(SH_SLEEP_REG_PASCR, offsetof(struct sh_sleep_regs, pascr));
57 DEFINE(SH_SLEEP_REG_IRMCR, offsetof(struct sh_sleep_regs, irmcr));
58 DEFINE(SH_SLEEP_REG_CCR, offsetof(struct sh_sleep_regs, ccr));
59 DEFINE(SH_SLEEP_REG_RAMCR, offsetof(struct sh_sleep_regs, ramcr));
37 return 0; 60 return 0;
38} 61}
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 3d6b9312dc47..d97c803719ec 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
15 15
16# Common interfaces. 16# Common interfaces.
17 17
18obj-$(CONFIG_UBC_WAKEUP) += ubc.o
19obj-$(CONFIG_SH_ADC) += adc.o 18obj-$(CONFIG_SH_ADC) += adc.o
20obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o 19obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o
21 20
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index e932ebef4738..89b4b76c0d76 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -75,16 +75,11 @@ static void __init expmask_init(void)
75 /* 75 /*
76 * Future proofing. 76 * Future proofing.
77 * 77 *
78 * Disable support for slottable sleep instruction 78 * Disable support for slottable sleep instruction, non-nop
79 * and non-nop instructions in the rte delay slot. 79 * instructions in the rte delay slot, and associative writes to
80 * the memory-mapped cache array.
80 */ 81 */
81 expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP); 82 expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP | EXPMASK_MMCAW);
82
83 /*
84 * Enable associative writes to the memory-mapped cache array
85 * until the cache flush ops have been rewritten.
86 */
87 expmask |= EXPMASK_MMCAW;
88 83
89 __raw_writel(expmask, EXPMASK); 84 __raw_writel(expmask, EXPMASK);
90 ctrl_barrier(); 85 ctrl_barrier();
@@ -311,12 +306,12 @@ asmlinkage void __init sh_cpu_init(void)
311 if (fpu_disabled) { 306 if (fpu_disabled) {
312 printk("FPU Disabled\n"); 307 printk("FPU Disabled\n");
313 current_cpu_data.flags &= ~CPU_HAS_FPU; 308 current_cpu_data.flags &= ~CPU_HAS_FPU;
314 disable_fpu();
315 } 309 }
316 310
317 /* FPU initialization */ 311 /* FPU initialization */
312 disable_fpu();
318 if ((current_cpu_data.flags & CPU_HAS_FPU)) { 313 if ((current_cpu_data.flags & CPU_HAS_FPU)) {
319 clear_thread_flag(TIF_USEDFPU); 314 current_thread_info()->status &= ~TS_USEDFPU;
320 clear_used_math(); 315 clear_used_math();
321 } 316 }
322 317
@@ -338,17 +333,6 @@ asmlinkage void __init sh_cpu_init(void)
338 } 333 }
339#endif 334#endif
340 335
341 /*
342 * Some brain-damaged loaders decided it would be a good idea to put
343 * the UBC to sleep. This causes some issues when it comes to things
344 * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So ..
345 * we wake it up and hope that all is well.
346 */
347#ifdef CONFIG_SUPERH32
348 if (raw_smp_processor_id() == 0)
349 ubc_wakeup();
350#endif
351
352 speculative_execution_init(); 336 speculative_execution_init();
353 expmask_init(); 337 expmask_init();
354} 338}
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 6df2fb98eb30..d395ce5740e7 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -25,14 +25,12 @@
25 25
26/* 26/*
27 * Save FPU registers onto task structure. 27 * Save FPU registers onto task structure.
28 * Assume called with FPU enabled (SR.FD=0).
29 */ 28 */
30void 29void
31save_fpu(struct task_struct *tsk, struct pt_regs *regs) 30save_fpu(struct task_struct *tsk)
32{ 31{
33 unsigned long dummy; 32 unsigned long dummy;
34 33
35 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
36 enable_fpu(); 34 enable_fpu();
37 asm volatile("sts.l fpul, @-%0\n\t" 35 asm volatile("sts.l fpul, @-%0\n\t"
38 "sts.l fpscr, @-%0\n\t" 36 "sts.l fpscr, @-%0\n\t"
@@ -60,7 +58,6 @@ save_fpu(struct task_struct *tsk, struct pt_regs *regs)
60 : "memory"); 58 : "memory");
61 59
62 disable_fpu(); 60 disable_fpu();
63 release_fpu(regs);
64} 61}
65 62
66static void 63static void
@@ -598,31 +595,31 @@ BUILD_TRAP_HANDLER(fpu_error)
598 struct task_struct *tsk = current; 595 struct task_struct *tsk = current;
599 TRAP_HANDLER_DECL; 596 TRAP_HANDLER_DECL;
600 597
601 save_fpu(tsk, regs); 598 __unlazy_fpu(tsk, regs);
602 if (ieee_fpe_handler(regs)) { 599 if (ieee_fpe_handler(regs)) {
603 tsk->thread.fpu.hard.fpscr &= 600 tsk->thread.fpu.hard.fpscr &=
604 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 601 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
605 grab_fpu(regs); 602 grab_fpu(regs);
606 restore_fpu(tsk); 603 restore_fpu(tsk);
607 set_tsk_thread_flag(tsk, TIF_USEDFPU); 604 task_thread_info(tsk)->status |= TS_USEDFPU;
608 return; 605 return;
609 } 606 }
610 607
611 force_sig(SIGFPE, tsk); 608 force_sig(SIGFPE, tsk);
612} 609}
613 610
614BUILD_TRAP_HANDLER(fpu_state_restore) 611void fpu_state_restore(struct pt_regs *regs)
615{ 612{
616 struct task_struct *tsk = current; 613 struct task_struct *tsk = current;
617 TRAP_HANDLER_DECL;
618 614
619 grab_fpu(regs); 615 grab_fpu(regs);
620 if (!user_mode(regs)) { 616 if (unlikely(!user_mode(regs))) {
621 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n"); 617 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
618 BUG();
622 return; 619 return;
623 } 620 }
624 621
625 if (used_math()) { 622 if (likely(used_math())) {
626 /* Using the FPU again. */ 623 /* Using the FPU again. */
627 restore_fpu(tsk); 624 restore_fpu(tsk);
628 } else { 625 } else {
@@ -630,5 +627,13 @@ BUILD_TRAP_HANDLER(fpu_state_restore)
630 fpu_init(); 627 fpu_init();
631 set_used_math(); 628 set_used_math();
632 } 629 }
633 set_tsk_thread_flag(tsk, TIF_USEDFPU); 630 task_thread_info(tsk)->status |= TS_USEDFPU;
631 tsk->fpu_counter++;
632}
633
634BUILD_TRAP_HANDLER(fpu_state_restore)
635{
636 TRAP_HANDLER_DECL;
637
638 fpu_state_restore(regs);
634} 639}
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index bb407ef0b91e..3f7e2a22c7c2 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -297,41 +297,8 @@ ENTRY(vbr_base)
297! 297!
298 .balign 256,0,256 298 .balign 256,0,256
299general_exception: 299general_exception:
300#ifndef CONFIG_CPU_SUBTYPE_SHX3
301 bra handle_exception 300 bra handle_exception
302 sts pr, k3 ! save original pr value in k3 301 sts pr, k3 ! save original pr value in k3
303#else
304 mov.l 1f, k4
305 mov.l @k4, k4
306
307 ! Is EXPEVT larger than 0x800?
308 mov #0x8, k0
309 shll8 k0
310 cmp/hs k0, k4
311 bf 0f
312
313 ! then add 0x580 (k2 is 0xd80 or 0xda0)
314 mov #0x58, k0
315 shll2 k0
316 shll2 k0
317 add k0, k4
3180:
319 ! Setup stack and save DSP context (k0 contains original r15 on return)
320 bsr prepare_stack
321 nop
322
323 ! Save registers / Switch to bank 0
324 mov k4, k2 ! keep vector in k2
325 mov.l 1f, k4 ! SR bits to clear in k4
326 bsr save_regs ! needs original pr value in k3
327 nop
328
329 bra handle_exception_special
330 nop
331
332 .align 2
3331: .long EXPEVT
334#endif
335 302
336! prepare_stack() 303! prepare_stack()
337! - roll back gRB 304! - roll back gRB
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 203b18347b83..3a1dbc709831 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -9,6 +9,11 @@ obj-$(CONFIG_HIBERNATION) += $(addprefix ../sh3/, swsusp.o)
9obj-$(CONFIG_SH_FPU) += fpu.o softfloat.o 9obj-$(CONFIG_SH_FPU) += fpu.o softfloat.o
10obj-$(CONFIG_SH_STORE_QUEUES) += sq.o 10obj-$(CONFIG_SH_STORE_QUEUES) += sq.o
11 11
12# Perf events
13perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o
14perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o
15perf-$(CONFIG_CPU_SUBTYPE_SH7091) := perf_event.o
16
12# CPU subtype setup 17# CPU subtype setup
13obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o 18obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o 19obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o
@@ -27,4 +32,5 @@ endif
27# Additional clocks by subtype 32# Additional clocks by subtype
28clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o 33clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o
29 34
30obj-y += $(clock-y) 35obj-y += $(clock-y)
36obj-$(CONFIG_PERF_EVENTS) += $(perf-y)
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index e3ea5411da6d..e97857aec8a0 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -41,13 +41,11 @@ static unsigned int fpu_exception_flags;
41 41
42/* 42/*
43 * Save FPU registers onto task structure. 43 * Save FPU registers onto task structure.
44 * Assume called with FPU enabled (SR.FD=0).
45 */ 44 */
46void save_fpu(struct task_struct *tsk, struct pt_regs *regs) 45void save_fpu(struct task_struct *tsk)
47{ 46{
48 unsigned long dummy; 47 unsigned long dummy;
49 48
50 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
51 enable_fpu(); 49 enable_fpu();
52 asm volatile ("sts.l fpul, @-%0\n\t" 50 asm volatile ("sts.l fpul, @-%0\n\t"
53 "sts.l fpscr, @-%0\n\t" 51 "sts.l fpscr, @-%0\n\t"
@@ -92,7 +90,6 @@ void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
92 :"memory"); 90 :"memory");
93 91
94 disable_fpu(); 92 disable_fpu();
95 release_fpu(regs);
96} 93}
97 94
98static void restore_fpu(struct task_struct *tsk) 95static void restore_fpu(struct task_struct *tsk)
@@ -285,7 +282,6 @@ static int ieee_fpe_handler(struct pt_regs *regs)
285 /* fcnvsd */ 282 /* fcnvsd */
286 struct task_struct *tsk = current; 283 struct task_struct *tsk = current;
287 284
288 save_fpu(tsk, regs);
289 if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR)) 285 if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR))
290 /* FPU error */ 286 /* FPU error */
291 denormal_to_double(&tsk->thread.fpu.hard, 287 denormal_to_double(&tsk->thread.fpu.hard,
@@ -462,7 +458,7 @@ BUILD_TRAP_HANDLER(fpu_error)
462 struct task_struct *tsk = current; 458 struct task_struct *tsk = current;
463 TRAP_HANDLER_DECL; 459 TRAP_HANDLER_DECL;
464 460
465 save_fpu(tsk, regs); 461 __unlazy_fpu(tsk, regs);
466 fpu_exception_flags = 0; 462 fpu_exception_flags = 0;
467 if (ieee_fpe_handler(regs)) { 463 if (ieee_fpe_handler(regs)) {
468 tsk->thread.fpu.hard.fpscr &= 464 tsk->thread.fpu.hard.fpscr &=
@@ -473,7 +469,7 @@ BUILD_TRAP_HANDLER(fpu_error)
473 tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10); 469 tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10);
474 grab_fpu(regs); 470 grab_fpu(regs);
475 restore_fpu(tsk); 471 restore_fpu(tsk);
476 set_tsk_thread_flag(tsk, TIF_USEDFPU); 472 task_thread_info(tsk)->status |= TS_USEDFPU;
477 if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) & 473 if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) &
478 (fpu_exception_flags >> 2)) == 0) { 474 (fpu_exception_flags >> 2)) == 0) {
479 return; 475 return;
@@ -483,18 +479,18 @@ BUILD_TRAP_HANDLER(fpu_error)
483 force_sig(SIGFPE, tsk); 479 force_sig(SIGFPE, tsk);
484} 480}
485 481
486BUILD_TRAP_HANDLER(fpu_state_restore) 482void fpu_state_restore(struct pt_regs *regs)
487{ 483{
488 struct task_struct *tsk = current; 484 struct task_struct *tsk = current;
489 TRAP_HANDLER_DECL;
490 485
491 grab_fpu(regs); 486 grab_fpu(regs);
492 if (!user_mode(regs)) { 487 if (unlikely(!user_mode(regs))) {
493 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n"); 488 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
489 BUG();
494 return; 490 return;
495 } 491 }
496 492
497 if (used_math()) { 493 if (likely(used_math())) {
498 /* Using the FPU again. */ 494 /* Using the FPU again. */
499 restore_fpu(tsk); 495 restore_fpu(tsk);
500 } else { 496 } else {
@@ -502,5 +498,13 @@ BUILD_TRAP_HANDLER(fpu_state_restore)
502 fpu_init(); 498 fpu_init();
503 set_used_math(); 499 set_used_math();
504 } 500 }
505 set_tsk_thread_flag(tsk, TIF_USEDFPU); 501 task_thread_info(tsk)->status |= TS_USEDFPU;
502 tsk->fpu_counter++;
503}
504
505BUILD_TRAP_HANDLER(fpu_state_restore)
506{
507 TRAP_HANDLER_DECL;
508
509 fpu_state_restore(regs);
506} 510}
diff --git a/arch/sh/kernel/cpu/sh4/perf_event.c b/arch/sh/kernel/cpu/sh4/perf_event.c
new file mode 100644
index 000000000000..7f9ecc9c2d02
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/perf_event.c
@@ -0,0 +1,253 @@
1/*
2 * Performance events support for SH7750-style performance counters
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/io.h>
13#include <linux/irq.h>
14#include <linux/perf_event.h>
15#include <asm/processor.h>
16
17#define PM_CR_BASE 0xff000084 /* 16-bit */
18#define PM_CTR_BASE 0xff100004 /* 32-bit */
19
20#define PMCR(n) (PM_CR_BASE + ((n) * 0x04))
21#define PMCTRH(n) (PM_CTR_BASE + 0x00 + ((n) * 0x08))
22#define PMCTRL(n) (PM_CTR_BASE + 0x04 + ((n) * 0x08))
23
24#define PMCR_PMM_MASK 0x0000003f
25
26#define PMCR_CLKF 0x00000100
27#define PMCR_PMCLR 0x00002000
28#define PMCR_PMST 0x00004000
29#define PMCR_PMEN 0x00008000
30
31static struct sh_pmu sh7750_pmu;
32
33/*
34 * There are a number of events supported by each counter (33 in total).
35 * Since we have 2 counters, each counter will take the event code as it
36 * corresponds to the PMCR PMM setting. Each counter can be configured
37 * independently.
38 *
39 * Event Code Description
40 * ---------- -----------
41 *
42 * 0x01 Operand read access
43 * 0x02 Operand write access
44 * 0x03 UTLB miss
45 * 0x04 Operand cache read miss
46 * 0x05 Operand cache write miss
47 * 0x06 Instruction fetch (w/ cache)
48 * 0x07 Instruction TLB miss
49 * 0x08 Instruction cache miss
50 * 0x09 All operand accesses
51 * 0x0a All instruction accesses
52 * 0x0b OC RAM operand access
53 * 0x0d On-chip I/O space access
54 * 0x0e Operand access (r/w)
55 * 0x0f Operand cache miss (r/w)
56 * 0x10 Branch instruction
57 * 0x11 Branch taken
58 * 0x12 BSR/BSRF/JSR
59 * 0x13 Instruction execution
60 * 0x14 Instruction execution in parallel
61 * 0x15 FPU Instruction execution
62 * 0x16 Interrupt
63 * 0x17 NMI
64 * 0x18 trapa instruction execution
65 * 0x19 UBCA match
66 * 0x1a UBCB match
67 * 0x21 Instruction cache fill
68 * 0x22 Operand cache fill
69 * 0x23 Elapsed time
70 * 0x24 Pipeline freeze by I-cache miss
71 * 0x25 Pipeline freeze by D-cache miss
72 * 0x27 Pipeline freeze by branch instruction
73 * 0x28 Pipeline freeze by CPU register
74 * 0x29 Pipeline freeze by FPU
75 */
76
77static const int sh7750_general_events[] = {
78 [PERF_COUNT_HW_CPU_CYCLES] = 0x0023,
79 [PERF_COUNT_HW_INSTRUCTIONS] = 0x000a,
80 [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0006, /* I-cache */
81 [PERF_COUNT_HW_CACHE_MISSES] = 0x0008, /* I-cache */
82 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x0010,
83 [PERF_COUNT_HW_BRANCH_MISSES] = -1,
84 [PERF_COUNT_HW_BUS_CYCLES] = -1,
85};
86
87#define C(x) PERF_COUNT_HW_CACHE_##x
88
89static const int sh7750_cache_events
90 [PERF_COUNT_HW_CACHE_MAX]
91 [PERF_COUNT_HW_CACHE_OP_MAX]
92 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
93{
94 [ C(L1D) ] = {
95 [ C(OP_READ) ] = {
96 [ C(RESULT_ACCESS) ] = 0x0001,
97 [ C(RESULT_MISS) ] = 0x0004,
98 },
99 [ C(OP_WRITE) ] = {
100 [ C(RESULT_ACCESS) ] = 0x0002,
101 [ C(RESULT_MISS) ] = 0x0005,
102 },
103 [ C(OP_PREFETCH) ] = {
104 [ C(RESULT_ACCESS) ] = 0,
105 [ C(RESULT_MISS) ] = 0,
106 },
107 },
108
109 [ C(L1I) ] = {
110 [ C(OP_READ) ] = {
111 [ C(RESULT_ACCESS) ] = 0x0006,
112 [ C(RESULT_MISS) ] = 0x0008,
113 },
114 [ C(OP_WRITE) ] = {
115 [ C(RESULT_ACCESS) ] = -1,
116 [ C(RESULT_MISS) ] = -1,
117 },
118 [ C(OP_PREFETCH) ] = {
119 [ C(RESULT_ACCESS) ] = 0,
120 [ C(RESULT_MISS) ] = 0,
121 },
122 },
123
124 [ C(LL) ] = {
125 [ C(OP_READ) ] = {
126 [ C(RESULT_ACCESS) ] = 0,
127 [ C(RESULT_MISS) ] = 0,
128 },
129 [ C(OP_WRITE) ] = {
130 [ C(RESULT_ACCESS) ] = 0,
131 [ C(RESULT_MISS) ] = 0,
132 },
133 [ C(OP_PREFETCH) ] = {
134 [ C(RESULT_ACCESS) ] = 0,
135 [ C(RESULT_MISS) ] = 0,
136 },
137 },
138
139 [ C(DTLB) ] = {
140 [ C(OP_READ) ] = {
141 [ C(RESULT_ACCESS) ] = 0,
142 [ C(RESULT_MISS) ] = 0x0003,
143 },
144 [ C(OP_WRITE) ] = {
145 [ C(RESULT_ACCESS) ] = 0,
146 [ C(RESULT_MISS) ] = 0,
147 },
148 [ C(OP_PREFETCH) ] = {
149 [ C(RESULT_ACCESS) ] = 0,
150 [ C(RESULT_MISS) ] = 0,
151 },
152 },
153
154 [ C(ITLB) ] = {
155 [ C(OP_READ) ] = {
156 [ C(RESULT_ACCESS) ] = 0,
157 [ C(RESULT_MISS) ] = 0x0007,
158 },
159 [ C(OP_WRITE) ] = {
160 [ C(RESULT_ACCESS) ] = -1,
161 [ C(RESULT_MISS) ] = -1,
162 },
163 [ C(OP_PREFETCH) ] = {
164 [ C(RESULT_ACCESS) ] = -1,
165 [ C(RESULT_MISS) ] = -1,
166 },
167 },
168
169 [ C(BPU) ] = {
170 [ C(OP_READ) ] = {
171 [ C(RESULT_ACCESS) ] = -1,
172 [ C(RESULT_MISS) ] = -1,
173 },
174 [ C(OP_WRITE) ] = {
175 [ C(RESULT_ACCESS) ] = -1,
176 [ C(RESULT_MISS) ] = -1,
177 },
178 [ C(OP_PREFETCH) ] = {
179 [ C(RESULT_ACCESS) ] = -1,
180 [ C(RESULT_MISS) ] = -1,
181 },
182 },
183};
184
185static int sh7750_event_map(int event)
186{
187 return sh7750_general_events[event];
188}
189
190static u64 sh7750_pmu_read(int idx)
191{
192 return (u64)((u64)(__raw_readl(PMCTRH(idx)) & 0xffff) << 32) |
193 __raw_readl(PMCTRL(idx));
194}
195
196static void sh7750_pmu_disable(struct hw_perf_event *hwc, int idx)
197{
198 unsigned int tmp;
199
200 tmp = __raw_readw(PMCR(idx));
201 tmp &= ~(PMCR_PMM_MASK | PMCR_PMEN);
202 __raw_writew(tmp, PMCR(idx));
203}
204
205static void sh7750_pmu_enable(struct hw_perf_event *hwc, int idx)
206{
207 __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx));
208 __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx));
209}
210
211static void sh7750_pmu_disable_all(void)
212{
213 int i;
214
215 for (i = 0; i < sh7750_pmu.num_events; i++)
216 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
217}
218
219static void sh7750_pmu_enable_all(void)
220{
221 int i;
222
223 for (i = 0; i < sh7750_pmu.num_events; i++)
224 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i));
225}
226
227static struct sh_pmu sh7750_pmu = {
228 .name = "SH7750",
229 .num_events = 2,
230 .event_map = sh7750_event_map,
231 .max_events = ARRAY_SIZE(sh7750_general_events),
232 .raw_event_mask = PMCR_PMM_MASK,
233 .cache_events = &sh7750_cache_events,
234 .read = sh7750_pmu_read,
235 .disable = sh7750_pmu_disable,
236 .enable = sh7750_pmu_enable,
237 .disable_all = sh7750_pmu_disable_all,
238 .enable_all = sh7750_pmu_enable_all,
239};
240
241static int __init sh7750_pmu_init(void)
242{
243 /*
244 * Make sure this CPU actually has perf counters.
245 */
246 if (!(boot_cpu_data.flags & CPU_HAS_PERF_COUNTER)) {
247 pr_notice("HW perf events unsupported, software events only.\n");
248 return -ENODEV;
249 }
250
251 return register_sh_pmu(&sh7750_pmu);
252}
253arch_initcall(sh7750_pmu_init);
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 490d5dc9e372..33bab477d2e2 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -44,3 +44,4 @@ pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o
44obj-y += $(clock-y) 44obj-y += $(clock-y)
45obj-$(CONFIG_SMP) += $(smp-y) 45obj-$(CONFIG_SMP) += $(smp-y)
46obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y) 46obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y)
47obj-$(CONFIG_PERF_EVENTS) += perf_event.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index dfe9192be63e..9db743802f06 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -152,7 +152,7 @@ struct clk div6_clks[] = {
152 SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0), 152 SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0),
153 SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0), 153 SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0),
154 SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0), 154 SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0),
155 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0), 155 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
156}; 156};
157 157
158#define R_CLK (&r_clk) 158#define R_CLK (&r_clk)
diff --git a/arch/sh/kernel/cpu/sh4a/perf_event.c b/arch/sh/kernel/cpu/sh4a/perf_event.c
new file mode 100644
index 000000000000..eddc21973fa1
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/perf_event.c
@@ -0,0 +1,269 @@
1/*
2 * Performance events support for SH-4A performance counters
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/io.h>
13#include <linux/irq.h>
14#include <linux/perf_event.h>
15#include <asm/processor.h>
16
17#define PPC_CCBR(idx) (0xff200800 + (sizeof(u32) * idx))
18#define PPC_PMCTR(idx) (0xfc100000 + (sizeof(u32) * idx))
19
20#define CCBR_CIT_MASK (0x7ff << 6)
21#define CCBR_DUC (1 << 3)
22#define CCBR_CMDS (1 << 1)
23#define CCBR_PPCE (1 << 0)
24
25#define PPC_PMCAT 0xfc100080
26
27#define PMCAT_OVF3 (1 << 27)
28#define PMCAT_CNN3 (1 << 26)
29#define PMCAT_CLR3 (1 << 25)
30#define PMCAT_OVF2 (1 << 19)
31#define PMCAT_CLR2 (1 << 17)
32#define PMCAT_OVF1 (1 << 11)
33#define PMCAT_CNN1 (1 << 10)
34#define PMCAT_CLR1 (1 << 9)
35#define PMCAT_OVF0 (1 << 3)
36#define PMCAT_CLR0 (1 << 1)
37
38static struct sh_pmu sh4a_pmu;
39
40/*
41 * Supported raw event codes:
42 *
43 * Event Code Description
44 * ---------- -----------
45 *
46 * 0x0000 number of elapsed cycles
47 * 0x0200 number of elapsed cycles in privileged mode
48 * 0x0280 number of elapsed cycles while SR.BL is asserted
49 * 0x0202 instruction execution
50 * 0x0203 instruction execution in parallel
51 * 0x0204 number of unconditional branches
52 * 0x0208 number of exceptions
53 * 0x0209 number of interrupts
54 * 0x0220 UTLB miss caused by instruction fetch
55 * 0x0222 UTLB miss caused by operand access
56 * 0x02a0 number of ITLB misses
57 * 0x0028 number of accesses to instruction memories
58 * 0x0029 number of accesses to instruction cache
59 * 0x002a instruction cache miss
60 * 0x022e number of access to instruction X/Y memory
61 * 0x0030 number of reads to operand memories
62 * 0x0038 number of writes to operand memories
63 * 0x0031 number of operand cache read accesses
64 * 0x0039 number of operand cache write accesses
65 * 0x0032 operand cache read miss
66 * 0x003a operand cache write miss
67 * 0x0236 number of reads to operand X/Y memory
68 * 0x023e number of writes to operand X/Y memory
69 * 0x0237 number of reads to operand U memory
70 * 0x023f number of writes to operand U memory
71 * 0x0337 number of U memory read buffer misses
72 * 0x02b4 number of wait cycles due to operand read access
73 * 0x02bc number of wait cycles due to operand write access
74 * 0x0033 number of wait cycles due to operand cache read miss
75 * 0x003b number of wait cycles due to operand cache write miss
76 */
77
78/*
79 * Special reserved bits used by hardware emulators, read values will
80 * vary, but writes must always be 0.
81 */
82#define PMCAT_EMU_CLR_MASK ((1 << 24) | (1 << 16) | (1 << 8) | (1 << 0))
83
84static const int sh4a_general_events[] = {
85 [PERF_COUNT_HW_CPU_CYCLES] = 0x0000,
86 [PERF_COUNT_HW_INSTRUCTIONS] = 0x0202,
87 [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0029, /* I-cache */
88 [PERF_COUNT_HW_CACHE_MISSES] = 0x002a, /* I-cache */
89 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x0204,
90 [PERF_COUNT_HW_BRANCH_MISSES] = -1,
91 [PERF_COUNT_HW_BUS_CYCLES] = -1,
92};
93
94#define C(x) PERF_COUNT_HW_CACHE_##x
95
96static const int sh4a_cache_events
97 [PERF_COUNT_HW_CACHE_MAX]
98 [PERF_COUNT_HW_CACHE_OP_MAX]
99 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
100{
101 [ C(L1D) ] = {
102 [ C(OP_READ) ] = {
103 [ C(RESULT_ACCESS) ] = 0x0031,
104 [ C(RESULT_MISS) ] = 0x0032,
105 },
106 [ C(OP_WRITE) ] = {
107 [ C(RESULT_ACCESS) ] = 0x0039,
108 [ C(RESULT_MISS) ] = 0x003a,
109 },
110 [ C(OP_PREFETCH) ] = {
111 [ C(RESULT_ACCESS) ] = 0,
112 [ C(RESULT_MISS) ] = 0,
113 },
114 },
115
116 [ C(L1I) ] = {
117 [ C(OP_READ) ] = {
118 [ C(RESULT_ACCESS) ] = 0x0029,
119 [ C(RESULT_MISS) ] = 0x002a,
120 },
121 [ C(OP_WRITE) ] = {
122 [ C(RESULT_ACCESS) ] = -1,
123 [ C(RESULT_MISS) ] = -1,
124 },
125 [ C(OP_PREFETCH) ] = {
126 [ C(RESULT_ACCESS) ] = 0,
127 [ C(RESULT_MISS) ] = 0,
128 },
129 },
130
131 [ C(LL) ] = {
132 [ C(OP_READ) ] = {
133 [ C(RESULT_ACCESS) ] = 0x0030,
134 [ C(RESULT_MISS) ] = 0,
135 },
136 [ C(OP_WRITE) ] = {
137 [ C(RESULT_ACCESS) ] = 0x0038,
138 [ C(RESULT_MISS) ] = 0,
139 },
140 [ C(OP_PREFETCH) ] = {
141 [ C(RESULT_ACCESS) ] = 0,
142 [ C(RESULT_MISS) ] = 0,
143 },
144 },
145
146 [ C(DTLB) ] = {
147 [ C(OP_READ) ] = {
148 [ C(RESULT_ACCESS) ] = 0x0222,
149 [ C(RESULT_MISS) ] = 0x0220,
150 },
151 [ C(OP_WRITE) ] = {
152 [ C(RESULT_ACCESS) ] = 0,
153 [ C(RESULT_MISS) ] = 0,
154 },
155 [ C(OP_PREFETCH) ] = {
156 [ C(RESULT_ACCESS) ] = 0,
157 [ C(RESULT_MISS) ] = 0,
158 },
159 },
160
161 [ C(ITLB) ] = {
162 [ C(OP_READ) ] = {
163 [ C(RESULT_ACCESS) ] = 0,
164 [ C(RESULT_MISS) ] = 0x02a0,
165 },
166 [ C(OP_WRITE) ] = {
167 [ C(RESULT_ACCESS) ] = -1,
168 [ C(RESULT_MISS) ] = -1,
169 },
170 [ C(OP_PREFETCH) ] = {
171 [ C(RESULT_ACCESS) ] = -1,
172 [ C(RESULT_MISS) ] = -1,
173 },
174 },
175
176 [ C(BPU) ] = {
177 [ C(OP_READ) ] = {
178 [ C(RESULT_ACCESS) ] = -1,
179 [ C(RESULT_MISS) ] = -1,
180 },
181 [ C(OP_WRITE) ] = {
182 [ C(RESULT_ACCESS) ] = -1,
183 [ C(RESULT_MISS) ] = -1,
184 },
185 [ C(OP_PREFETCH) ] = {
186 [ C(RESULT_ACCESS) ] = -1,
187 [ C(RESULT_MISS) ] = -1,
188 },
189 },
190};
191
192static int sh4a_event_map(int event)
193{
194 return sh4a_general_events[event];
195}
196
197static u64 sh4a_pmu_read(int idx)
198{
199 return __raw_readl(PPC_PMCTR(idx));
200}
201
202static void sh4a_pmu_disable(struct hw_perf_event *hwc, int idx)
203{
204 unsigned int tmp;
205
206 tmp = __raw_readl(PPC_CCBR(idx));
207 tmp &= ~(CCBR_CIT_MASK | CCBR_DUC);
208 __raw_writel(tmp, PPC_CCBR(idx));
209}
210
211static void sh4a_pmu_enable(struct hw_perf_event *hwc, int idx)
212{
213 unsigned int tmp;
214
215 tmp = __raw_readl(PPC_PMCAT);
216 tmp &= ~PMCAT_EMU_CLR_MASK;
217 tmp |= idx ? PMCAT_CLR1 : PMCAT_CLR0;
218 __raw_writel(tmp, PPC_PMCAT);
219
220 tmp = __raw_readl(PPC_CCBR(idx));
221 tmp |= (hwc->config << 6) | CCBR_CMDS | CCBR_PPCE;
222 __raw_writel(tmp, PPC_CCBR(idx));
223
224 __raw_writel(__raw_readl(PPC_CCBR(idx)) | CCBR_DUC, PPC_CCBR(idx));
225}
226
227static void sh4a_pmu_disable_all(void)
228{
229 int i;
230
231 for (i = 0; i < sh4a_pmu.num_events; i++)
232 __raw_writel(__raw_readl(PPC_CCBR(i)) & ~CCBR_DUC, PPC_CCBR(i));
233}
234
235static void sh4a_pmu_enable_all(void)
236{
237 int i;
238
239 for (i = 0; i < sh4a_pmu.num_events; i++)
240 __raw_writel(__raw_readl(PPC_CCBR(i)) | CCBR_DUC, PPC_CCBR(i));
241}
242
243static struct sh_pmu sh4a_pmu = {
244 .name = "SH-4A",
245 .num_events = 2,
246 .event_map = sh4a_event_map,
247 .max_events = ARRAY_SIZE(sh4a_general_events),
248 .raw_event_mask = 0x3ff,
249 .cache_events = &sh4a_cache_events,
250 .read = sh4a_pmu_read,
251 .disable = sh4a_pmu_disable,
252 .enable = sh4a_pmu_enable,
253 .disable_all = sh4a_pmu_disable_all,
254 .enable_all = sh4a_pmu_enable_all,
255};
256
257static int __init sh4a_pmu_init(void)
258{
259 /*
260 * Make sure this CPU actually has perf counters.
261 */
262 if (!(boot_cpu_data.flags & CPU_HAS_PERF_COUNTER)) {
263 pr_notice("HW perf events unsupported, software events only.\n");
264 return -ENODEV;
265 }
266
267 return register_sh_pmu(&sh4a_pmu);
268}
269arch_initcall(sh4a_pmu_init);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index f3851fd757ec..845e89c936e7 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -20,6 +20,8 @@
20#include <linux/uio_driver.h> 20#include <linux/uio_driver.h>
21#include <linux/sh_timer.h> 21#include <linux/sh_timer.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/notifier.h>
24#include <asm/suspend.h>
23#include <asm/clock.h> 25#include <asm/clock.h>
24#include <asm/mmzone.h> 26#include <asm/mmzone.h>
25#include <cpu/sh7724.h> 27#include <cpu/sh7724.h>
@@ -202,7 +204,7 @@ static struct resource veu0_resources[] = {
202 [0] = { 204 [0] = {
203 .name = "VEU3F0", 205 .name = "VEU3F0",
204 .start = 0xfe920000, 206 .start = 0xfe920000,
205 .end = 0xfe9200cb - 1, 207 .end = 0xfe9200cb,
206 .flags = IORESOURCE_MEM, 208 .flags = IORESOURCE_MEM,
207 }, 209 },
208 [1] = { 210 [1] = {
@@ -234,7 +236,7 @@ static struct resource veu1_resources[] = {
234 [0] = { 236 [0] = {
235 .name = "VEU3F1", 237 .name = "VEU3F1",
236 .start = 0xfe924000, 238 .start = 0xfe924000,
237 .end = 0xfe9240cb - 1, 239 .end = 0xfe9240cb,
238 .flags = IORESOURCE_MEM, 240 .flags = IORESOURCE_MEM,
239 }, 241 },
240 [1] = { 242 [1] = {
@@ -523,6 +525,70 @@ static struct platform_device jpu_device = {
523 }, 525 },
524}; 526};
525 527
528/* SPU2DSP0 */
529static struct uio_info spu0_platform_data = {
530 .name = "SPU2DSP0",
531 .version = "0",
532 .irq = 86,
533};
534
535static struct resource spu0_resources[] = {
536 [0] = {
537 .name = "SPU2DSP0",
538 .start = 0xFE200000,
539 .end = 0xFE2FFFFF,
540 .flags = IORESOURCE_MEM,
541 },
542 [1] = {
543 /* place holder for contiguous memory */
544 },
545};
546
547static struct platform_device spu0_device = {
548 .name = "uio_pdrv_genirq",
549 .id = 4,
550 .dev = {
551 .platform_data = &spu0_platform_data,
552 },
553 .resource = spu0_resources,
554 .num_resources = ARRAY_SIZE(spu0_resources),
555 .archdata = {
556 .hwblk_id = HWBLK_SPU,
557 },
558};
559
560/* SPU2DSP1 */
561static struct uio_info spu1_platform_data = {
562 .name = "SPU2DSP1",
563 .version = "0",
564 .irq = 87,
565};
566
567static struct resource spu1_resources[] = {
568 [0] = {
569 .name = "SPU2DSP1",
570 .start = 0xFE300000,
571 .end = 0xFE3FFFFF,
572 .flags = IORESOURCE_MEM,
573 },
574 [1] = {
575 /* place holder for contiguous memory */
576 },
577};
578
579static struct platform_device spu1_device = {
580 .name = "uio_pdrv_genirq",
581 .id = 5,
582 .dev = {
583 .platform_data = &spu1_platform_data,
584 },
585 .resource = spu1_resources,
586 .num_resources = ARRAY_SIZE(spu1_resources),
587 .archdata = {
588 .hwblk_id = HWBLK_SPU,
589 },
590};
591
526static struct platform_device *sh7724_devices[] __initdata = { 592static struct platform_device *sh7724_devices[] __initdata = {
527 &cmt_device, 593 &cmt_device,
528 &tmu0_device, 594 &tmu0_device,
@@ -539,6 +605,8 @@ static struct platform_device *sh7724_devices[] __initdata = {
539 &veu0_device, 605 &veu0_device,
540 &veu1_device, 606 &veu1_device,
541 &jpu_device, 607 &jpu_device,
608 &spu0_device,
609 &spu1_device,
542}; 610};
543 611
544static int __init sh7724_devices_setup(void) 612static int __init sh7724_devices_setup(void)
@@ -547,6 +615,8 @@ static int __init sh7724_devices_setup(void)
547 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); 615 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
548 platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20); 616 platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
549 platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20); 617 platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20);
618 platform_resource_setup_memory(&spu0_device, "spu0", 2 << 20);
619 platform_resource_setup_memory(&spu1_device, "spu1", 2 << 20);
550 620
551 return platform_add_devices(sh7724_devices, 621 return platform_add_devices(sh7724_devices,
552 ARRAY_SIZE(sh7724_devices)); 622 ARRAY_SIZE(sh7724_devices));
@@ -827,3 +897,193 @@ void __init plat_irq_setup(void)
827{ 897{
828 register_intc_controller(&intc_desc); 898 register_intc_controller(&intc_desc);
829} 899}
900
901static struct {
902 /* BSC */
903 unsigned long mmselr;
904 unsigned long cs0bcr;
905 unsigned long cs4bcr;
906 unsigned long cs5abcr;
907 unsigned long cs5bbcr;
908 unsigned long cs6abcr;
909 unsigned long cs6bbcr;
910 unsigned long cs4wcr;
911 unsigned long cs5awcr;
912 unsigned long cs5bwcr;
913 unsigned long cs6awcr;
914 unsigned long cs6bwcr;
915 /* INTC */
916 unsigned short ipra;
917 unsigned short iprb;
918 unsigned short iprc;
919 unsigned short iprd;
920 unsigned short ipre;
921 unsigned short iprf;
922 unsigned short iprg;
923 unsigned short iprh;
924 unsigned short ipri;
925 unsigned short iprj;
926 unsigned short iprk;
927 unsigned short iprl;
928 unsigned char imr0;
929 unsigned char imr1;
930 unsigned char imr2;
931 unsigned char imr3;
932 unsigned char imr4;
933 unsigned char imr5;
934 unsigned char imr6;
935 unsigned char imr7;
936 unsigned char imr8;
937 unsigned char imr9;
938 unsigned char imr10;
939 unsigned char imr11;
940 unsigned char imr12;
941 /* RWDT */
942 unsigned short rwtcnt;
943 unsigned short rwtcsr;
944 /* CPG */
945 unsigned long irdaclk;
946 unsigned long spuclk;
947} sh7724_rstandby_state;
948
949static int sh7724_pre_sleep_notifier_call(struct notifier_block *nb,
950 unsigned long flags, void *unused)
951{
952 if (!(flags & SUSP_SH_RSTANDBY))
953 return NOTIFY_DONE;
954
955 /* BCR */
956 sh7724_rstandby_state.mmselr = __raw_readl(0xff800020); /* MMSELR */
957 sh7724_rstandby_state.mmselr |= 0xa5a50000;
958 sh7724_rstandby_state.cs0bcr = __raw_readl(0xfec10004); /* CS0BCR */
959 sh7724_rstandby_state.cs4bcr = __raw_readl(0xfec10010); /* CS4BCR */
960 sh7724_rstandby_state.cs5abcr = __raw_readl(0xfec10014); /* CS5ABCR */
961 sh7724_rstandby_state.cs5bbcr = __raw_readl(0xfec10018); /* CS5BBCR */
962 sh7724_rstandby_state.cs6abcr = __raw_readl(0xfec1001c); /* CS6ABCR */
963 sh7724_rstandby_state.cs6bbcr = __raw_readl(0xfec10020); /* CS6BBCR */
964 sh7724_rstandby_state.cs4wcr = __raw_readl(0xfec10030); /* CS4WCR */
965 sh7724_rstandby_state.cs5awcr = __raw_readl(0xfec10034); /* CS5AWCR */
966 sh7724_rstandby_state.cs5bwcr = __raw_readl(0xfec10038); /* CS5BWCR */
967 sh7724_rstandby_state.cs6awcr = __raw_readl(0xfec1003c); /* CS6AWCR */
968 sh7724_rstandby_state.cs6bwcr = __raw_readl(0xfec10040); /* CS6BWCR */
969
970 /* INTC */
971 sh7724_rstandby_state.ipra = __raw_readw(0xa4080000); /* IPRA */
972 sh7724_rstandby_state.iprb = __raw_readw(0xa4080004); /* IPRB */
973 sh7724_rstandby_state.iprc = __raw_readw(0xa4080008); /* IPRC */
974 sh7724_rstandby_state.iprd = __raw_readw(0xa408000c); /* IPRD */
975 sh7724_rstandby_state.ipre = __raw_readw(0xa4080010); /* IPRE */
976 sh7724_rstandby_state.iprf = __raw_readw(0xa4080014); /* IPRF */
977 sh7724_rstandby_state.iprg = __raw_readw(0xa4080018); /* IPRG */
978 sh7724_rstandby_state.iprh = __raw_readw(0xa408001c); /* IPRH */
979 sh7724_rstandby_state.ipri = __raw_readw(0xa4080020); /* IPRI */
980 sh7724_rstandby_state.iprj = __raw_readw(0xa4080024); /* IPRJ */
981 sh7724_rstandby_state.iprk = __raw_readw(0xa4080028); /* IPRK */
982 sh7724_rstandby_state.iprl = __raw_readw(0xa408002c); /* IPRL */
983 sh7724_rstandby_state.imr0 = __raw_readb(0xa4080080); /* IMR0 */
984 sh7724_rstandby_state.imr1 = __raw_readb(0xa4080084); /* IMR1 */
985 sh7724_rstandby_state.imr2 = __raw_readb(0xa4080088); /* IMR2 */
986 sh7724_rstandby_state.imr3 = __raw_readb(0xa408008c); /* IMR3 */
987 sh7724_rstandby_state.imr4 = __raw_readb(0xa4080090); /* IMR4 */
988 sh7724_rstandby_state.imr5 = __raw_readb(0xa4080094); /* IMR5 */
989 sh7724_rstandby_state.imr6 = __raw_readb(0xa4080098); /* IMR6 */
990 sh7724_rstandby_state.imr7 = __raw_readb(0xa408009c); /* IMR7 */
991 sh7724_rstandby_state.imr8 = __raw_readb(0xa40800a0); /* IMR8 */
992 sh7724_rstandby_state.imr9 = __raw_readb(0xa40800a4); /* IMR9 */
993 sh7724_rstandby_state.imr10 = __raw_readb(0xa40800a8); /* IMR10 */
994 sh7724_rstandby_state.imr11 = __raw_readb(0xa40800ac); /* IMR11 */
995 sh7724_rstandby_state.imr12 = __raw_readb(0xa40800b0); /* IMR12 */
996
997 /* RWDT */
998 sh7724_rstandby_state.rwtcnt = __raw_readb(0xa4520000); /* RWTCNT */
999 sh7724_rstandby_state.rwtcnt |= 0x5a00;
1000 sh7724_rstandby_state.rwtcsr = __raw_readb(0xa4520004); /* RWTCSR */
1001 sh7724_rstandby_state.rwtcsr |= 0xa500;
1002 __raw_writew(sh7724_rstandby_state.rwtcsr & 0x07, 0xa4520004);
1003
1004 /* CPG */
1005 sh7724_rstandby_state.irdaclk = __raw_readl(0xa4150018); /* IRDACLKCR */
1006 sh7724_rstandby_state.spuclk = __raw_readl(0xa415003c); /* SPUCLKCR */
1007
1008 return NOTIFY_DONE;
1009}
1010
1011static int sh7724_post_sleep_notifier_call(struct notifier_block *nb,
1012 unsigned long flags, void *unused)
1013{
1014 if (!(flags & SUSP_SH_RSTANDBY))
1015 return NOTIFY_DONE;
1016
1017 /* BCR */
1018 __raw_writel(sh7724_rstandby_state.mmselr, 0xff800020); /* MMSELR */
1019 __raw_writel(sh7724_rstandby_state.cs0bcr, 0xfec10004); /* CS0BCR */
1020 __raw_writel(sh7724_rstandby_state.cs4bcr, 0xfec10010); /* CS4BCR */
1021 __raw_writel(sh7724_rstandby_state.cs5abcr, 0xfec10014); /* CS5ABCR */
1022 __raw_writel(sh7724_rstandby_state.cs5bbcr, 0xfec10018); /* CS5BBCR */
1023 __raw_writel(sh7724_rstandby_state.cs6abcr, 0xfec1001c); /* CS6ABCR */
1024 __raw_writel(sh7724_rstandby_state.cs6bbcr, 0xfec10020); /* CS6BBCR */
1025 __raw_writel(sh7724_rstandby_state.cs4wcr, 0xfec10030); /* CS4WCR */
1026 __raw_writel(sh7724_rstandby_state.cs5awcr, 0xfec10034); /* CS5AWCR */
1027 __raw_writel(sh7724_rstandby_state.cs5bwcr, 0xfec10038); /* CS5BWCR */
1028 __raw_writel(sh7724_rstandby_state.cs6awcr, 0xfec1003c); /* CS6AWCR */
1029 __raw_writel(sh7724_rstandby_state.cs6bwcr, 0xfec10040); /* CS6BWCR */
1030
1031 /* INTC */
1032 __raw_writew(sh7724_rstandby_state.ipra, 0xa4080000); /* IPRA */
1033 __raw_writew(sh7724_rstandby_state.iprb, 0xa4080004); /* IPRB */
1034 __raw_writew(sh7724_rstandby_state.iprc, 0xa4080008); /* IPRC */
1035 __raw_writew(sh7724_rstandby_state.iprd, 0xa408000c); /* IPRD */
1036 __raw_writew(sh7724_rstandby_state.ipre, 0xa4080010); /* IPRE */
1037 __raw_writew(sh7724_rstandby_state.iprf, 0xa4080014); /* IPRF */
1038 __raw_writew(sh7724_rstandby_state.iprg, 0xa4080018); /* IPRG */
1039 __raw_writew(sh7724_rstandby_state.iprh, 0xa408001c); /* IPRH */
1040 __raw_writew(sh7724_rstandby_state.ipri, 0xa4080020); /* IPRI */
1041 __raw_writew(sh7724_rstandby_state.iprj, 0xa4080024); /* IPRJ */
1042 __raw_writew(sh7724_rstandby_state.iprk, 0xa4080028); /* IPRK */
1043 __raw_writew(sh7724_rstandby_state.iprl, 0xa408002c); /* IPRL */
1044 __raw_writeb(sh7724_rstandby_state.imr0, 0xa4080080); /* IMR0 */
1045 __raw_writeb(sh7724_rstandby_state.imr1, 0xa4080084); /* IMR1 */
1046 __raw_writeb(sh7724_rstandby_state.imr2, 0xa4080088); /* IMR2 */
1047 __raw_writeb(sh7724_rstandby_state.imr3, 0xa408008c); /* IMR3 */
1048 __raw_writeb(sh7724_rstandby_state.imr4, 0xa4080090); /* IMR4 */
1049 __raw_writeb(sh7724_rstandby_state.imr5, 0xa4080094); /* IMR5 */
1050 __raw_writeb(sh7724_rstandby_state.imr6, 0xa4080098); /* IMR6 */
1051 __raw_writeb(sh7724_rstandby_state.imr7, 0xa408009c); /* IMR7 */
1052 __raw_writeb(sh7724_rstandby_state.imr8, 0xa40800a0); /* IMR8 */
1053 __raw_writeb(sh7724_rstandby_state.imr9, 0xa40800a4); /* IMR9 */
1054 __raw_writeb(sh7724_rstandby_state.imr10, 0xa40800a8); /* IMR10 */
1055 __raw_writeb(sh7724_rstandby_state.imr11, 0xa40800ac); /* IMR11 */
1056 __raw_writeb(sh7724_rstandby_state.imr12, 0xa40800b0); /* IMR12 */
1057
1058 /* RWDT */
1059 __raw_writew(sh7724_rstandby_state.rwtcnt, 0xa4520000); /* RWTCNT */
1060 __raw_writew(sh7724_rstandby_state.rwtcsr, 0xa4520004); /* RWTCSR */
1061
1062 /* CPG */
1063 __raw_writel(sh7724_rstandby_state.irdaclk, 0xa4150018); /* IRDACLKCR */
1064 __raw_writel(sh7724_rstandby_state.spuclk, 0xa415003c); /* SPUCLKCR */
1065
1066 return NOTIFY_DONE;
1067}
1068
1069static struct notifier_block sh7724_pre_sleep_notifier = {
1070 .notifier_call = sh7724_pre_sleep_notifier_call,
1071 .priority = SH_MOBILE_PRE(SH_MOBILE_SLEEP_CPU),
1072};
1073
1074static struct notifier_block sh7724_post_sleep_notifier = {
1075 .notifier_call = sh7724_post_sleep_notifier_call,
1076 .priority = SH_MOBILE_POST(SH_MOBILE_SLEEP_CPU),
1077};
1078
1079static int __init sh7724_sleep_setup(void)
1080{
1081 atomic_notifier_chain_register(&sh_mobile_pre_sleep_notifier_list,
1082 &sh7724_pre_sleep_notifier);
1083
1084 atomic_notifier_chain_register(&sh_mobile_post_sleep_notifier_list,
1085 &sh7724_post_sleep_notifier);
1086 return 0;
1087}
1088arch_initcall(sh7724_sleep_setup);
1089
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index e848443deeb9..c7ba9166e18a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -15,6 +15,15 @@
15#include <linux/sh_timer.h> 15#include <linux/sh_timer.h>
16#include <asm/mmzone.h> 16#include <asm/mmzone.h>
17 17
18/*
19 * This intentionally only registers SCIF ports 0, 1, and 3. SCIF 2
20 * INTEVT values overlap with the FPU EXPEVT ones, requiring special
21 * demuxing in the exception dispatch path.
22 *
23 * As this overlap is something that never should have made it in to
24 * silicon in the first place, we just refuse to deal with the port at
25 * all rather than adding infrastructure to hack around it.
26 */
18static struct plat_sci_port sci_platform_data[] = { 27static struct plat_sci_port sci_platform_data[] = {
19 { 28 {
20 .mapbase = 0xffc30000, 29 .mapbase = 0xffc30000,
@@ -27,11 +36,6 @@ static struct plat_sci_port sci_platform_data[] = {
27 .type = PORT_SCIF, 36 .type = PORT_SCIF,
28 .irqs = { 44, 45, 47, 46 }, 37 .irqs = { 44, 45, 47, 46 },
29 }, { 38 }, {
30 .mapbase = 0xffc50000,
31 .flags = UPF_BOOT_AUTOCONF,
32 .type = PORT_SCIF,
33 .irqs = { 48, 49, 51, 50 },
34 }, {
35 .mapbase = 0xffc60000, 39 .mapbase = 0xffc60000,
36 .flags = UPF_BOOT_AUTOCONF, 40 .flags = UPF_BOOT_AUTOCONF,
37 .type = PORT_SCIF, 41 .type = PORT_SCIF,
@@ -268,7 +272,11 @@ enum {
268 UNUSED = 0, 272 UNUSED = 0,
269 273
270 /* interrupt sources */ 274 /* interrupt sources */
271 IRL, IRQ0, IRQ1, IRQ2, IRQ3, 275 IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
276 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
277 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
278 IRL_HHLL, IRL_HHLH, IRL_HHHL,
279 IRQ0, IRQ1, IRQ2, IRQ3,
272 HUDII, 280 HUDII,
273 TMU0, TMU1, TMU2, TMU3, TMU4, TMU5, 281 TMU0, TMU1, TMU2, TMU3, TMU4, TMU5,
274 PCII0, PCII1, PCII2, PCII3, PCII4, 282 PCII0, PCII1, PCII2, PCII3, PCII4,
@@ -291,7 +299,7 @@ enum {
291 INTICI4, INTICI5, INTICI6, INTICI7, 299 INTICI4, INTICI5, INTICI6, INTICI7,
292 300
293 /* interrupt groups */ 301 /* interrupt groups */
294 PCII56789, SCIF0, SCIF1, SCIF2, SCIF3, 302 IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
295 DMAC0, DMAC1, 303 DMAC0, DMAC1,
296}; 304};
297 305
@@ -309,8 +317,6 @@ static struct intc_vect vectors[] __initdata = {
309 INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760), 317 INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
310 INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0), 318 INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0),
311 INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0), 319 INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0),
312 INTC_VECT(SCIF2_ERI, 0x800), INTC_VECT(SCIF2_RXI, 0x820),
313 INTC_VECT(SCIF2_BRI, 0x840), INTC_VECT(SCIF2_TXI, 0x860),
314 INTC_VECT(SCIF3_ERI, 0x880), INTC_VECT(SCIF3_RXI, 0x8a0), 320 INTC_VECT(SCIF3_ERI, 0x880), INTC_VECT(SCIF3_RXI, 0x8a0),
315 INTC_VECT(SCIF3_BRI, 0x8c0), INTC_VECT(SCIF3_TXI, 0x8e0), 321 INTC_VECT(SCIF3_BRI, 0x8c0), INTC_VECT(SCIF3_TXI, 0x8e0),
316 INTC_VECT(DMAC0_DMINT0, 0x900), INTC_VECT(DMAC0_DMINT1, 0x920), 322 INTC_VECT(DMAC0_DMINT0, 0x900), INTC_VECT(DMAC0_DMINT1, 0x920),
@@ -344,10 +350,13 @@ static struct intc_vect vectors[] __initdata = {
344}; 350};
345 351
346static struct intc_group groups[] __initdata = { 352static struct intc_group groups[] __initdata = {
353 INTC_GROUP(IRL, IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
354 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
355 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
356 IRL_HHLL, IRL_HHLH, IRL_HHHL),
347 INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9), 357 INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9),
348 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), 358 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
349 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), 359 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
350 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
351 INTC_GROUP(SCIF3, SCIF3_ERI, SCIF3_RXI, SCIF3_BRI, SCIF3_TXI), 360 INTC_GROUP(SCIF3, SCIF3_ERI, SCIF3_RXI, SCIF3_BRI, SCIF3_TXI),
352 INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, 361 INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
353 DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE), 362 DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
@@ -419,14 +428,14 @@ static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups,
419 428
420/* External interrupt pins in IRL mode */ 429/* External interrupt pins in IRL mode */
421static struct intc_vect vectors_irl[] __initdata = { 430static struct intc_vect vectors_irl[] __initdata = {
422 INTC_VECT(IRL, 0x200), INTC_VECT(IRL, 0x220), 431 INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
423 INTC_VECT(IRL, 0x240), INTC_VECT(IRL, 0x260), 432 INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
424 INTC_VECT(IRL, 0x280), INTC_VECT(IRL, 0x2a0), 433 INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
425 INTC_VECT(IRL, 0x2c0), INTC_VECT(IRL, 0x2e0), 434 INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0),
426 INTC_VECT(IRL, 0x300), INTC_VECT(IRL, 0x320), 435 INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320),
427 INTC_VECT(IRL, 0x340), INTC_VECT(IRL, 0x360), 436 INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360),
428 INTC_VECT(IRL, 0x380), INTC_VECT(IRL, 0x3a0), 437 INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0),
429 INTC_VECT(IRL, 0x3c0), 438 INTC_VECT(IRL_HHHL, 0x3c0),
430}; 439};
431 440
432static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups, 441static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 185ec3976a25..5863e0c4d02f 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -14,6 +14,13 @@
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16
17#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
18#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
19
20#define STBCR_MSTP 0x00000001
21#define STBCR_RESET 0x00000002
22#define STBCR_LTSLP 0x80000000
23
17static irqreturn_t ipi_interrupt_handler(int irq, void *arg) 24static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
18{ 25{
19 unsigned int message = (unsigned int)(long)arg; 26 unsigned int message = (unsigned int)(long)arg;
@@ -21,9 +28,9 @@ static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
21 unsigned int offs = 4 * cpu; 28 unsigned int offs = 4 * cpu;
22 unsigned int x; 29 unsigned int x;
23 30
24 x = ctrl_inl(0xfe410070 + offs); /* C0INITICI..CnINTICI */ 31 x = __raw_readl(0xfe410070 + offs); /* C0INITICI..CnINTICI */
25 x &= (1 << (message << 2)); 32 x &= (1 << (message << 2));
26 ctrl_outl(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */ 33 __raw_writel(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */
27 34
28 smp_message_recv(message); 35 smp_message_recv(message);
29 36
@@ -37,6 +44,9 @@ void __init plat_smp_setup(void)
37 44
38 init_cpu_possible(cpumask_of(cpu)); 45 init_cpu_possible(cpumask_of(cpu));
39 46
47 /* Enable light sleep for the boot CPU */
48 __raw_writel(__raw_readl(STBCR_REG(cpu)) | STBCR_LTSLP, STBCR_REG(cpu));
49
40 __cpu_number_map[0] = 0; 50 __cpu_number_map[0] = 0;
41 __cpu_logical_map[0] = 0; 51 __cpu_logical_map[0] = 0;
42 52
@@ -66,32 +76,23 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
66 "IPI", (void *)(long)i); 76 "IPI", (void *)(long)i);
67} 77}
68 78
69#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
70#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
71
72#define STBCR_MSTP 0x00000001
73#define STBCR_RESET 0x00000002
74#define STBCR_LTSLP 0x80000000
75
76#define STBCR_AP_VAL (STBCR_RESET | STBCR_LTSLP)
77
78void plat_start_cpu(unsigned int cpu, unsigned long entry_point) 79void plat_start_cpu(unsigned int cpu, unsigned long entry_point)
79{ 80{
80 ctrl_outl(entry_point, RESET_REG(cpu)); 81 __raw_writel(entry_point, RESET_REG(cpu));
81 82
82 if (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP)) 83 if (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP))
83 ctrl_outl(STBCR_MSTP, STBCR_REG(cpu)); 84 __raw_writel(STBCR_MSTP, STBCR_REG(cpu));
84 85
85 while (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP)) 86 while (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP))
86 cpu_relax(); 87 cpu_relax();
87 88
88 /* Start up secondary processor by sending a reset */ 89 /* Start up secondary processor by sending a reset */
89 ctrl_outl(STBCR_AP_VAL, STBCR_REG(cpu)); 90 __raw_writel(STBCR_RESET | STBCR_LTSLP, STBCR_REG(cpu));
90} 91}
91 92
92int plat_smp_processor_id(void) 93int plat_smp_processor_id(void)
93{ 94{
94 return ctrl_inl(0xff000048); /* CPIDR */ 95 return __raw_readl(0xff000048); /* CPIDR */
95} 96}
96 97
97void plat_send_ipi(unsigned int cpu, unsigned int message) 98void plat_send_ipi(unsigned int cpu, unsigned int message)
@@ -100,5 +101,5 @@ void plat_send_ipi(unsigned int cpu, unsigned int message)
100 101
101 BUG_ON(cpu >= 4); 102 BUG_ON(cpu >= 4);
102 103
103 ctrl_outl(1 << (message << 2), addr); /* C0INTICI..CnINTICI */ 104 __raw_writel(1 << (message << 2), addr); /* C0INTICI..CnINTICI */
104} 105}
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index b0aacf675258..8f13f73cb2cb 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -933,7 +933,7 @@ ret_with_reschedule:
933 933
934 pta restore_all, tr1 934 pta restore_all, tr1
935 935
936 movi (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r8 936 movi _TIF_SIGPENDING, r8
937 and r8, r7, r8 937 and r8, r7, r8
938 pta work_notifysig, tr0 938 pta work_notifysig, tr0
939 bne r8, ZERO, tr0 939 bne r8, ZERO, tr0
diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c
index 1c504bd972c3..83972aa319c2 100644
--- a/arch/sh/kernel/cpu/shmobile/cpuidle.c
+++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c
@@ -87,25 +87,31 @@ void sh_mobile_setup_cpuidle(void)
87 87
88 dev->safe_state = state; 88 dev->safe_state = state;
89 89
90 state = &dev->states[i++]; 90 if (sh_mobile_sleep_supported & SUSP_SH_SF) {
91 snprintf(state->name, CPUIDLE_NAME_LEN, "C1"); 91 state = &dev->states[i++];
92 strncpy(state->desc, "SuperH Sleep Mode [SF]", CPUIDLE_DESC_LEN); 92 snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
93 state->exit_latency = 100; 93 strncpy(state->desc, "SuperH Sleep Mode [SF]",
94 state->target_residency = 1 * 2; 94 CPUIDLE_DESC_LEN);
95 state->power_usage = 1; 95 state->exit_latency = 100;
96 state->flags = 0; 96 state->target_residency = 1 * 2;
97 state->flags |= CPUIDLE_FLAG_TIME_VALID; 97 state->power_usage = 1;
98 state->enter = cpuidle_sleep_enter; 98 state->flags = 0;
99 state->flags |= CPUIDLE_FLAG_TIME_VALID;
100 state->enter = cpuidle_sleep_enter;
101 }
99 102
100 state = &dev->states[i++]; 103 if (sh_mobile_sleep_supported & SUSP_SH_STANDBY) {
101 snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); 104 state = &dev->states[i++];
102 strncpy(state->desc, "SuperH Mobile Standby Mode [SF]", CPUIDLE_DESC_LEN); 105 snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
103 state->exit_latency = 2300; 106 strncpy(state->desc, "SuperH Mobile Standby Mode [SF]",
104 state->target_residency = 1 * 2; 107 CPUIDLE_DESC_LEN);
105 state->power_usage = 1; 108 state->exit_latency = 2300;
106 state->flags = 0; 109 state->target_residency = 1 * 2;
107 state->flags |= CPUIDLE_FLAG_TIME_VALID; 110 state->power_usage = 1;
108 state->enter = cpuidle_sleep_enter; 111 state->flags = 0;
112 state->flags |= CPUIDLE_FLAG_TIME_VALID;
113 state->enter = cpuidle_sleep_enter;
114 }
109 115
110 dev->state_count = i; 116 dev->state_count = i;
111 117
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index ee3c2aaf66fb..ca029a44743c 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -15,6 +15,13 @@
15#include <linux/suspend.h> 15#include <linux/suspend.h>
16#include <asm/suspend.h> 16#include <asm/suspend.h>
17#include <asm/uaccess.h> 17#include <asm/uaccess.h>
18#include <asm/cacheflush.h>
19
20/*
21 * Notifier lists for pre/post sleep notification
22 */
23ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list);
24ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
18 25
19/* 26/*
20 * Sleep modes available on SuperH Mobile: 27 * Sleep modes available on SuperH Mobile:
@@ -26,30 +33,105 @@
26#define SUSP_MODE_SLEEP (SUSP_SH_SLEEP) 33#define SUSP_MODE_SLEEP (SUSP_SH_SLEEP)
27#define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF) 34#define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF)
28#define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF) 35#define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF)
36#define SUSP_MODE_RSTANDBY (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_SF)
37 /*
38 * U-standby mode is unsupported since it needs bootloader hacks
39 */
29 40
30/* 41#ifdef CONFIG_CPU_SUBTYPE_SH7724
31 * The following modes are not there yet: 42#define RAM_BASE 0xfd800000 /* RSMEM */
32 * 43#else
33 * R-standby mode is unsupported, but will be added in the future 44#define RAM_BASE 0xe5200000 /* ILRAM */
34 * U-standby mode is low priority since it needs bootloader hacks 45#endif
35 */
36
37#define ILRAM_BASE 0xe5200000
38
39extern const unsigned char sh_mobile_standby[];
40extern const unsigned int sh_mobile_standby_size;
41 46
42void sh_mobile_call_standby(unsigned long mode) 47void sh_mobile_call_standby(unsigned long mode)
43{ 48{
44 void *onchip_mem = (void *)ILRAM_BASE; 49 void *onchip_mem = (void *)RAM_BASE;
45 void (*standby_onchip_mem)(unsigned long, unsigned long) = onchip_mem; 50 struct sh_sleep_data *sdp = onchip_mem;
51 void (*standby_onchip_mem)(unsigned long, unsigned long);
52
53 /* code located directly after data structure */
54 standby_onchip_mem = (void *)(sdp + 1);
55
56 atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
57 mode, NULL);
58
59 /* flush the caches if MMU flag is set */
60 if (mode & SUSP_SH_MMU)
61 flush_cache_all();
46 62
47 /* Let assembly snippet in on-chip memory handle the rest */ 63 /* Let assembly snippet in on-chip memory handle the rest */
48 standby_onchip_mem(mode, ILRAM_BASE); 64 standby_onchip_mem(mode, RAM_BASE);
65
66 atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list,
67 mode, NULL);
68}
69
70extern char sh_mobile_sleep_enter_start;
71extern char sh_mobile_sleep_enter_end;
72
73extern char sh_mobile_sleep_resume_start;
74extern char sh_mobile_sleep_resume_end;
75
76unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP;
77
78void sh_mobile_register_self_refresh(unsigned long flags,
79 void *pre_start, void *pre_end,
80 void *post_start, void *post_end)
81{
82 void *onchip_mem = (void *)RAM_BASE;
83 void *vp;
84 struct sh_sleep_data *sdp;
85 int n;
86
87 /* part 0: data area */
88 sdp = onchip_mem;
89 sdp->addr.stbcr = 0xa4150020; /* STBCR */
90 sdp->addr.bar = 0xa4150040; /* BAR */
91 sdp->addr.pteh = 0xff000000; /* PTEH */
92 sdp->addr.ptel = 0xff000004; /* PTEL */
93 sdp->addr.ttb = 0xff000008; /* TTB */
94 sdp->addr.tea = 0xff00000c; /* TEA */
95 sdp->addr.mmucr = 0xff000010; /* MMUCR */
96 sdp->addr.ptea = 0xff000034; /* PTEA */
97 sdp->addr.pascr = 0xff000070; /* PASCR */
98 sdp->addr.irmcr = 0xff000078; /* IRMCR */
99 sdp->addr.ccr = 0xff00001c; /* CCR */
100 sdp->addr.ramcr = 0xff000074; /* RAMCR */
101 vp = sdp + 1;
102
103 /* part 1: common code to enter sleep mode */
104 n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start;
105 memcpy(vp, &sh_mobile_sleep_enter_start, n);
106 vp += roundup(n, 4);
107
108 /* part 2: board specific code to enter self-refresh mode */
109 n = pre_end - pre_start;
110 memcpy(vp, pre_start, n);
111 sdp->sf_pre = (unsigned long)vp;
112 vp += roundup(n, 4);
113
114 /* part 3: board specific code to resume from self-refresh mode */
115 n = post_end - post_start;
116 memcpy(vp, post_start, n);
117 sdp->sf_post = (unsigned long)vp;
118 vp += roundup(n, 4);
119
120 /* part 4: common code to resume from sleep mode */
121 WARN_ON(vp > (onchip_mem + 0x600));
122 vp = onchip_mem + 0x600; /* located at interrupt vector */
123 n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start;
124 memcpy(vp, &sh_mobile_sleep_resume_start, n);
125 sdp->resume = (unsigned long)vp;
126
127 sh_mobile_sleep_supported |= flags;
49} 128}
50 129
51static int sh_pm_enter(suspend_state_t state) 130static int sh_pm_enter(suspend_state_t state)
52{ 131{
132 if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF))
133 return -ENXIO;
134
53 local_irq_disable(); 135 local_irq_disable();
54 set_bl_bit(); 136 set_bl_bit();
55 sh_mobile_call_standby(SUSP_MODE_STANDBY_SF); 137 sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
@@ -65,13 +147,6 @@ static struct platform_suspend_ops sh_pm_ops = {
65 147
66static int __init sh_pm_init(void) 148static int __init sh_pm_init(void)
67{ 149{
68 void *onchip_mem = (void *)ILRAM_BASE;
69
70 /* Copy the assembly snippet to the otherwise ununsed ILRAM */
71 memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
72 wmb();
73 ctrl_barrier();
74
75 suspend_set_ops(&sh_pm_ops); 150 suspend_set_ops(&sh_pm_ops);
76 sh_mobile_setup_cpuidle(); 151 sh_mobile_setup_cpuidle();
77 return 0; 152 return 0;
diff --git a/arch/sh/kernel/cpu/shmobile/pm_runtime.c b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
index 7c615b17e209..6dcb8166a64d 100644
--- a/arch/sh/kernel/cpu/shmobile/pm_runtime.c
+++ b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
@@ -45,12 +45,14 @@ static int __platform_pm_runtime_resume(struct platform_device *pdev)
45 45
46 dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk); 46 dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk);
47 47
48 if (d->driver && d->driver->pm && d->driver->pm->runtime_resume) { 48 if (d->driver) {
49 hwblk_enable(hwblk_info, hwblk); 49 hwblk_enable(hwblk_info, hwblk);
50 ret = 0; 50 ret = 0;
51 51
52 if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) { 52 if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) {
53 ret = d->driver->pm->runtime_resume(d); 53 if (d->driver->pm && d->driver->pm->runtime_resume)
54 ret = d->driver->pm->runtime_resume(d);
55
54 if (!ret) 56 if (!ret)
55 clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags); 57 clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
56 else 58 else
@@ -73,12 +75,15 @@ static int __platform_pm_runtime_suspend(struct platform_device *pdev)
73 75
74 dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk); 76 dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk);
75 77
76 if (d->driver && d->driver->pm && d->driver->pm->runtime_suspend) { 78 if (d->driver) {
77 BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags)); 79 BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags));
80 ret = 0;
78 81
79 hwblk_enable(hwblk_info, hwblk); 82 if (d->driver->pm && d->driver->pm->runtime_suspend) {
80 ret = d->driver->pm->runtime_suspend(d); 83 hwblk_enable(hwblk_info, hwblk);
81 hwblk_disable(hwblk_info, hwblk); 84 ret = d->driver->pm->runtime_suspend(d);
85 hwblk_disable(hwblk_info, hwblk);
86 }
82 87
83 if (!ret) { 88 if (!ret) {
84 set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags); 89 set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S
index a439e6c7824f..e9dd7fa0abd2 100644
--- a/arch/sh/kernel/cpu/shmobile/sleep.S
+++ b/arch/sh/kernel/cpu/shmobile/sleep.S
@@ -20,79 +20,103 @@
20 * Kernel mode register usage, see entry.S: 20 * Kernel mode register usage, see entry.S:
21 * k0 scratch 21 * k0 scratch
22 * k1 scratch 22 * k1 scratch
23 * k4 scratch
24 */ 23 */
25#define k0 r0 24#define k0 r0
26#define k1 r1 25#define k1 r1
27#define k4 r4
28 26
29/* manage self-refresh and enter standby mode. 27/* manage self-refresh and enter standby mode. must be self-contained.
30 * this code will be copied to on-chip memory and executed from there. 28 * this code will be copied to on-chip memory and executed from there.
31 */ 29 */
30 .balign 4
31ENTRY(sh_mobile_sleep_enter_start)
32 32
33 .balign 4096,0,4096 33 /* save mode flags */
34ENTRY(sh_mobile_standby) 34 mov.l r4, @(SH_SLEEP_MODE, r5)
35 35
36 /* save original vbr */ 36 /* save original vbr */
37 stc vbr, r1 37 stc vbr, r0
38 mova saved_vbr, r0 38 mov.l r0, @(SH_SLEEP_VBR, r5)
39 mov.l r1, @r0
40 39
41 /* point vbr to our on-chip memory page */ 40 /* point vbr to our on-chip memory page */
42 ldc r5, vbr 41 ldc r5, vbr
43 42
44 /* save return address */ 43 /* save return address */
45 mova saved_spc, r0 44 sts pr, r0
46 sts pr, r5 45 mov.l r0, @(SH_SLEEP_SPC, r5)
47 mov.l r5, @r0
48 46
49 /* save sr */ 47 /* save sr */
50 mova saved_sr, r0 48 stc sr, r0
51 stc sr, r5 49 mov.l r0, @(SH_SLEEP_SR, r5)
52 mov.l r5, @r0
53 50
54 /* save mode flags */ 51 /* save sp */
55 mova saved_mode, r0 52 mov.l r15, @(SH_SLEEP_SP, r5)
56 mov.l r4, @r0 53
54 /* save stbcr */
55 bsr save_register
56 mov #SH_SLEEP_REG_STBCR, r0
57
58 /* save mmu and cache context if needed */
59 mov.l @(SH_SLEEP_MODE, r5), r0
60 tst #SUSP_SH_MMU, r0
61 bt skip_mmu_save_disable
62
63 /* save mmu state */
64 bsr save_register
65 mov #SH_SLEEP_REG_PTEH, r0
66
67 bsr save_register
68 mov #SH_SLEEP_REG_PTEL, r0
69
70 bsr save_register
71 mov #SH_SLEEP_REG_TTB, r0
72
73 bsr save_register
74 mov #SH_SLEEP_REG_TEA, r0
75
76 bsr save_register
77 mov #SH_SLEEP_REG_MMUCR, r0
78
79 bsr save_register
80 mov #SH_SLEEP_REG_PTEA, r0
81
82 bsr save_register
83 mov #SH_SLEEP_REG_PASCR, r0
57 84
58 /* put mode flags in r0 */ 85 bsr save_register
59 mov r4, r0 86 mov #SH_SLEEP_REG_IRMCR, r0
60 87
88 /* invalidate TLBs and disable the MMU */
89 bsr get_register
90 mov #SH_SLEEP_REG_MMUCR, r0
91 mov #4, r1
92 mov.l r1, @r0
93 icbi @r0
94
95 /* save cache registers and disable caches */
96 bsr save_register
97 mov #SH_SLEEP_REG_CCR, r0
98
99 bsr save_register
100 mov #SH_SLEEP_REG_RAMCR, r0
101
102 bsr get_register
103 mov #SH_SLEEP_REG_CCR, r0
104 mov #0, r1
105 mov.l r1, @r0
106 icbi @r0
107
108skip_mmu_save_disable:
109 /* call self-refresh entering code if needed */
110 mov.l @(SH_SLEEP_MODE, r5), r0
61 tst #SUSP_SH_SF, r0 111 tst #SUSP_SH_SF, r0
62 bt skip_set_sf 112 bt skip_set_sf
63#ifdef CONFIG_CPU_SUBTYPE_SH7724 113
64 /* DBSC: put memory in self-refresh mode */ 114 mov.l @(SH_SLEEP_SF_PRE, r5), r0
65 mov.l dben_reg, r4 115 jsr @r0
66 mov.l dben_data0, r1 116 nop
67 mov.l r1, @r4
68
69 mov.l dbrfpdn0_reg, r4
70 mov.l dbrfpdn0_data0, r1
71 mov.l r1, @r4
72
73 mov.l dbcmdcnt_reg, r4
74 mov.l dbcmdcnt_data0, r1
75 mov.l r1, @r4
76
77 mov.l dbcmdcnt_reg, r4
78 mov.l dbcmdcnt_data1, r1
79 mov.l r1, @r4
80
81 mov.l dbrfpdn0_reg, r4
82 mov.l dbrfpdn0_data1, r1
83 mov.l r1, @r4
84#else
85 /* SBSC: disable power down and put in self-refresh mode */
86 mov.l 1f, r4
87 mov.l 2f, r1
88 mov.l @r4, r2
89 or r1, r2
90 mov.l 3f, r3
91 and r3, r2
92 mov.l r2, @r4
93#endif
94 117
95skip_set_sf: 118skip_set_sf:
119 mov.l @(SH_SLEEP_MODE, r5), r0
96 tst #SUSP_SH_STANDBY, r0 120 tst #SUSP_SH_STANDBY, r0
97 bt test_rstandby 121 bt test_rstandby
98 122
@@ -104,6 +128,12 @@ test_rstandby:
104 tst #SUSP_SH_RSTANDBY, r0 128 tst #SUSP_SH_RSTANDBY, r0
105 bt test_ustandby 129 bt test_ustandby
106 130
131 /* setup BAR register */
132 bsr get_register
133 mov #SH_SLEEP_REG_BAR, r0
134 mov.l @(SH_SLEEP_RESUME, r5), r1
135 mov.l r1, @r0
136
107 /* set mode to "r-standby mode" */ 137 /* set mode to "r-standby mode" */
108 bra do_sleep 138 bra do_sleep
109 mov #0x20, r1 139 mov #0x20, r1
@@ -123,124 +153,136 @@ force_sleep:
123 153
124do_sleep: 154do_sleep:
125 /* setup and enter selected standby mode */ 155 /* setup and enter selected standby mode */
126 mov.l 5f, r4 156 bsr get_register
127 mov.l r1, @r4 157 mov #SH_SLEEP_REG_STBCR, r0
158 mov.l r1, @r0
128again: 159again:
129 sleep 160 sleep
130 bra again 161 bra again
131 nop 162 nop
132 163
133restore_jump_vbr: 164save_register:
165 add #SH_SLEEP_BASE_ADDR, r0
166 mov.l @(r0, r5), r1
167 add #-SH_SLEEP_BASE_ADDR, r0
168 mov.l @r1, r1
169 add #SH_SLEEP_BASE_DATA, r0
170 mov.l r1, @(r0, r5)
171 add #-SH_SLEEP_BASE_DATA, r0
172 rts
173 nop
174
175get_register:
176 add #SH_SLEEP_BASE_ADDR, r0
177 mov.l @(r0, r5), r0
178 rts
179 nop
180ENTRY(sh_mobile_sleep_enter_end)
181
182 .balign 4
183ENTRY(sh_mobile_sleep_resume_start)
184
185 /* figure out start address */
186 bsr 0f
187 nop
1880:
189 sts pr, k1
190 mov.l 1f, k0
191 and k0, k1
192
193 /* store pointer to data area in VBR */
194 ldc k1, vbr
195
196 /* setup sr with saved sr */
197 mov.l @(SH_SLEEP_SR, k1), k0
198 ldc k0, sr
199
200 /* now: user register set! */
201 stc vbr, r5
202
134 /* setup spc with return address to c code */ 203 /* setup spc with return address to c code */
135 mov.l saved_spc, k0 204 mov.l @(SH_SLEEP_SPC, r5), r0
136 ldc k0, spc 205 ldc r0, spc
137 206
138 /* restore vbr */ 207 /* restore vbr */
139 mov.l saved_vbr, k0 208 mov.l @(SH_SLEEP_VBR, r5), r0
140 ldc k0, vbr 209 ldc r0, vbr
141 210
142 /* setup ssr with saved sr */ 211 /* setup ssr with saved sr */
143 mov.l saved_sr, k0 212 mov.l @(SH_SLEEP_SR, r5), r0
144 ldc k0, ssr 213 ldc r0, ssr
145 214
146 /* get mode flags */ 215 /* restore sp */
147 mov.l saved_mode, k0 216 mov.l @(SH_SLEEP_SP, r5), r15
148 217
149done_sleep: 218 /* restore sleep mode register */
150 /* reset standby mode to sleep mode */ 219 bsr restore_register
151 mov.l 5f, k4 220 mov #SH_SLEEP_REG_STBCR, r0
152 mov #0x00, k1
153 mov.l k1, @k4
154 221
155 tst #SUSP_SH_SF, k0 222 /* call self-refresh resume code if needed */
223 mov.l @(SH_SLEEP_MODE, r5), r0
224 tst #SUSP_SH_SF, r0
156 bt skip_restore_sf 225 bt skip_restore_sf
157 226
158#ifdef CONFIG_CPU_SUBTYPE_SH7724 227 mov.l @(SH_SLEEP_SF_POST, r5), r0
159 /* DBSC: put memory in auto-refresh mode */ 228 jsr @r0
160 mov.l dbrfpdn0_reg, k4 229 nop
161 mov.l dbrfpdn0_data0, k1 230
162 mov.l k1, @k4
163
164 nop /* sleep 140 ns */
165 nop
166 nop
167 nop
168
169 mov.l dbcmdcnt_reg, k4
170 mov.l dbcmdcnt_data0, k1
171 mov.l k1, @k4
172
173 mov.l dbcmdcnt_reg, k4
174 mov.l dbcmdcnt_data1, k1
175 mov.l k1, @k4
176
177 mov.l dben_reg, k4
178 mov.l dben_data1, k1
179 mov.l k1, @k4
180
181 mov.l dbrfpdn0_reg, k4
182 mov.l dbrfpdn0_data2, k1
183 mov.l k1, @k4
184#else
185 /* SBSC: set auto-refresh mode */
186 mov.l 1f, k4
187 mov.l @k4, k0
188 mov.l 4f, k1
189 and k1, k0
190 mov.l k0, @k4
191 mov.l 6f, k4
192 mov.l 8f, k0
193 mov.l @k4, k1
194 mov #-1, k4
195 add k4, k1
196 or k1, k0
197 mov.l 7f, k1
198 mov.l k0, @k1
199#endif
200skip_restore_sf: 231skip_restore_sf:
201 /* jump to vbr vector */ 232 /* restore mmu and cache state if needed */
202 mov.l saved_vbr, k0 233 mov.l @(SH_SLEEP_MODE, r5), r0
203 mov.l offset_vbr, k4 234 tst #SUSP_SH_MMU, r0
204 add k4, k0 235 bt skip_restore_mmu
205 jmp @k0 236
237 /* restore mmu state */
238 bsr restore_register
239 mov #SH_SLEEP_REG_PTEH, r0
240
241 bsr restore_register
242 mov #SH_SLEEP_REG_PTEL, r0
243
244 bsr restore_register
245 mov #SH_SLEEP_REG_TTB, r0
246
247 bsr restore_register
248 mov #SH_SLEEP_REG_TEA, r0
249
250 bsr restore_register
251 mov #SH_SLEEP_REG_PTEA, r0
252
253 bsr restore_register
254 mov #SH_SLEEP_REG_PASCR, r0
255
256 bsr restore_register
257 mov #SH_SLEEP_REG_IRMCR, r0
258
259 bsr restore_register
260 mov #SH_SLEEP_REG_MMUCR, r0
261 icbi @r0
262
263 /* restore cache settings */
264 bsr restore_register
265 mov #SH_SLEEP_REG_RAMCR, r0
266 icbi @r0
267
268 bsr restore_register
269 mov #SH_SLEEP_REG_CCR, r0
270 icbi @r0
271
272skip_restore_mmu:
273 rte
206 nop 274 nop
207 275
208 .balign 4 276restore_register:
209saved_mode: .long 0 277 add #SH_SLEEP_BASE_DATA, r0
210saved_spc: .long 0 278 mov.l @(r0, r5), r1
211saved_sr: .long 0 279 add #-SH_SLEEP_BASE_DATA, r0
212saved_vbr: .long 0 280 add #SH_SLEEP_BASE_ADDR, r0
213offset_vbr: .long 0x600 281 mov.l @(r0, r5), r0
214#ifdef CONFIG_CPU_SUBTYPE_SH7724 282 mov.l r1, @r0
215dben_reg: .long 0xfd000010 /* DBEN */ 283 rts
216dben_data0: .long 0
217dben_data1: .long 1
218dbrfpdn0_reg: .long 0xfd000040 /* DBRFPDN0 */
219dbrfpdn0_data0: .long 0
220dbrfpdn0_data1: .long 1
221dbrfpdn0_data2: .long 0x00010000
222dbcmdcnt_reg: .long 0xfd000014 /* DBCMDCNT */
223dbcmdcnt_data0: .long 2
224dbcmdcnt_data1: .long 4
225#else
2261: .long 0xfe400008 /* SDCR0 */
2272: .long 0x00000400
2283: .long 0xffff7fff
2294: .long 0xfffffbff
230#endif
2315: .long 0xa4150020 /* STBCR */
2326: .long 0xfe40001c /* RTCOR */
2337: .long 0xfe400018 /* RTCNT */
2348: .long 0xa55a0000
235
236
237/* interrupt vector @ 0x600 */
238 .balign 0x400,0,0x400
239 .long 0xdeadbeef
240 .balign 0x200,0,0x200
241 bra restore_jump_vbr
242 nop 284 nop
243sh_mobile_standby_end:
244 285
245ENTRY(sh_mobile_standby_size) 286 .balign 4
246 .long sh_mobile_standby_end - sh_mobile_standby 2871: .long ~0x7ff
288ENTRY(sh_mobile_sleep_resume_end)
diff --git a/arch/sh/kernel/cpu/ubc.S b/arch/sh/kernel/cpu/ubc.S
deleted file mode 100644
index 81923079fa12..000000000000
--- a/arch/sh/kernel/cpu/ubc.S
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * arch/sh/kernel/cpu/ubc.S
3 *
4 * Set of management routines for the User Break Controller (UBC)
5 *
6 * Copyright (C) 2002 Paul Mundt
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/linkage.h>
14#include <asm/ubc.h>
15
16#define STBCR2 0xffc00010
17
18ENTRY(ubc_sleep)
19 mov #0, r0
20
21 mov.l 1f, r1 ! Zero out UBC_BBRA ..
22 mov.w r0, @r1
23
24 mov.l 2f, r1 ! .. same for BBRB ..
25 mov.w r0, @r1
26
27 mov.l 3f, r1 ! .. and again for BRCR.
28 mov.w r0, @r1
29
30 mov.w @r1, r0 ! Dummy read BRCR
31
32 mov.l 4f, r1 ! Set MSTP5 in STBCR2
33 mov.b @r1, r0
34 or #0x01, r0
35 mov.b r0, @r1
36
37 mov.b @r1, r0 ! Two dummy reads ..
38 mov.b @r1, r0
39
40 rts
41 nop
42
43ENTRY(ubc_wakeup)
44 mov.l 4f, r1 ! Clear MSTP5
45 mov.b @r1, r0
46 and #0xfe, r0
47 mov.b r0, @r1
48
49 mov.b @r1, r0 ! Two more dummy reads ..
50 mov.b @r1, r0
51
52 rts
53 nop
54
551: .long UBC_BBRA
562: .long UBC_BBRB
573: .long UBC_BRCR
584: .long STBCR2
59
diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c
new file mode 100644
index 000000000000..3c55b87f8b63
--- /dev/null
+++ b/arch/sh/kernel/dma-nommu.c
@@ -0,0 +1,82 @@
1/*
2 * DMA mapping support for platforms lacking IOMMUs.
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/dma-mapping.h>
11#include <linux/io.h>
12
13static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
14 unsigned long offset, size_t size,
15 enum dma_data_direction dir,
16 struct dma_attrs *attrs)
17{
18 dma_addr_t addr = page_to_phys(page) + offset;
19
20 WARN_ON(size == 0);
21 dma_cache_sync(dev, page_address(page) + offset, size, dir);
22
23 return addr;
24}
25
26static int nommu_map_sg(struct device *dev, struct scatterlist *sg,
27 int nents, enum dma_data_direction dir,
28 struct dma_attrs *attrs)
29{
30 struct scatterlist *s;
31 int i;
32
33 WARN_ON(nents == 0 || sg[0].length == 0);
34
35 for_each_sg(sg, s, nents, i) {
36 BUG_ON(!sg_page(s));
37
38 dma_cache_sync(dev, sg_virt(s), s->length, dir);
39
40 s->dma_address = sg_phys(s);
41 s->dma_length = s->length;
42 }
43
44 return nents;
45}
46
47#ifdef CONFIG_DMA_NONCOHERENT
48static void nommu_sync_single(struct device *dev, dma_addr_t addr,
49 size_t size, enum dma_data_direction dir)
50{
51 dma_cache_sync(dev, phys_to_virt(addr), size, dir);
52}
53
54static void nommu_sync_sg(struct device *dev, struct scatterlist *sg,
55 int nelems, enum dma_data_direction dir)
56{
57 struct scatterlist *s;
58 int i;
59
60 for_each_sg(sg, s, nelems, i)
61 dma_cache_sync(dev, sg_virt(s), s->length, dir);
62}
63#endif
64
65struct dma_map_ops nommu_dma_ops = {
66 .alloc_coherent = dma_generic_alloc_coherent,
67 .free_coherent = dma_generic_free_coherent,
68 .map_page = nommu_map_page,
69 .map_sg = nommu_map_sg,
70#ifdef CONFIG_DMA_NONCOHERENT
71 .sync_single_for_device = nommu_sync_single,
72 .sync_sg_for_device = nommu_sync_sg,
73#endif
74 .is_phys = 1,
75};
76
77void __init no_iommu_init(void)
78{
79 if (dma_ops)
80 return;
81 dma_ops = &nommu_dma_ops;
82}
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
index d76a23170dbb..3576b709f052 100644
--- a/arch/sh/kernel/dwarf.c
+++ b/arch/sh/kernel/dwarf.c
@@ -20,6 +20,7 @@
20#include <linux/list.h> 20#include <linux/list.h>
21#include <linux/mempool.h> 21#include <linux/mempool.h>
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/elf.h>
23#include <linux/ftrace.h> 24#include <linux/ftrace.h>
24#include <asm/dwarf.h> 25#include <asm/dwarf.h>
25#include <asm/unwinder.h> 26#include <asm/unwinder.h>
@@ -530,7 +531,18 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
530} 531}
531 532
532/** 533/**
533 * dwarf_unwind_stack - recursively unwind the stack 534 * dwarf_free_frame - free the memory allocated for @frame
535 * @frame: the frame to free
536 */
537void dwarf_free_frame(struct dwarf_frame *frame)
538{
539 dwarf_frame_free_regs(frame);
540 mempool_free(frame, dwarf_frame_pool);
541}
542
543/**
544 * dwarf_unwind_stack - unwind the stack
545 *
534 * @pc: address of the function to unwind 546 * @pc: address of the function to unwind
535 * @prev: struct dwarf_frame of the previous stackframe on the callstack 547 * @prev: struct dwarf_frame of the previous stackframe on the callstack
536 * 548 *
@@ -548,9 +560,9 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
548 unsigned long addr; 560 unsigned long addr;
549 561
550 /* 562 /*
551 * If this is the first invocation of this recursive function we 563 * If we're starting at the top of the stack we need get the
552 * need get the contents of a physical register to get the CFA 564 * contents of a physical register to get the CFA in order to
553 * in order to begin the virtual unwinding of the stack. 565 * begin the virtual unwinding of the stack.
554 * 566 *
555 * NOTE: the return address is guaranteed to be setup by the 567 * NOTE: the return address is guaranteed to be setup by the
556 * time this function makes its first function call. 568 * time this function makes its first function call.
@@ -593,9 +605,8 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
593 fde = dwarf_lookup_fde(pc); 605 fde = dwarf_lookup_fde(pc);
594 if (!fde) { 606 if (!fde) {
595 /* 607 /*
596 * This is our normal exit path - the one that stops the 608 * This is our normal exit path. There are two reasons
597 * recursion. There's two reasons why we might exit 609 * why we might exit here,
598 * here,
599 * 610 *
600 * a) pc has no asscociated DWARF frame info and so 611 * a) pc has no asscociated DWARF frame info and so
601 * we don't know how to unwind this frame. This is 612 * we don't know how to unwind this frame. This is
@@ -637,10 +648,10 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
637 648
638 } else { 649 } else {
639 /* 650 /*
640 * Again, this is the first invocation of this 651 * Again, we're starting from the top of the
641 * recurisve function. We need to physically 652 * stack. We need to physically read
642 * read the contents of a register in order to 653 * the contents of a register in order to get
643 * get the Canonical Frame Address for this 654 * the Canonical Frame Address for this
644 * function. 655 * function.
645 */ 656 */
646 frame->cfa = dwarf_read_arch_reg(frame->cfa_register); 657 frame->cfa = dwarf_read_arch_reg(frame->cfa_register);
@@ -670,13 +681,12 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
670 return frame; 681 return frame;
671 682
672bail: 683bail:
673 dwarf_frame_free_regs(frame); 684 dwarf_free_frame(frame);
674 mempool_free(frame, dwarf_frame_pool);
675 return NULL; 685 return NULL;
676} 686}
677 687
678static int dwarf_parse_cie(void *entry, void *p, unsigned long len, 688static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
679 unsigned char *end) 689 unsigned char *end, struct module *mod)
680{ 690{
681 struct dwarf_cie *cie; 691 struct dwarf_cie *cie;
682 unsigned long flags; 692 unsigned long flags;
@@ -772,6 +782,8 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
772 cie->initial_instructions = p; 782 cie->initial_instructions = p;
773 cie->instructions_end = end; 783 cie->instructions_end = end;
774 784
785 cie->mod = mod;
786
775 /* Add to list */ 787 /* Add to list */
776 spin_lock_irqsave(&dwarf_cie_lock, flags); 788 spin_lock_irqsave(&dwarf_cie_lock, flags);
777 list_add_tail(&cie->link, &dwarf_cie_list); 789 list_add_tail(&cie->link, &dwarf_cie_list);
@@ -782,7 +794,7 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
782 794
783static int dwarf_parse_fde(void *entry, u32 entry_type, 795static int dwarf_parse_fde(void *entry, u32 entry_type,
784 void *start, unsigned long len, 796 void *start, unsigned long len,
785 unsigned char *end) 797 unsigned char *end, struct module *mod)
786{ 798{
787 struct dwarf_fde *fde; 799 struct dwarf_fde *fde;
788 struct dwarf_cie *cie; 800 struct dwarf_cie *cie;
@@ -831,6 +843,8 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
831 fde->instructions = p; 843 fde->instructions = p;
832 fde->end = end; 844 fde->end = end;
833 845
846 fde->mod = mod;
847
834 /* Add to list. */ 848 /* Add to list. */
835 spin_lock_irqsave(&dwarf_fde_lock, flags); 849 spin_lock_irqsave(&dwarf_fde_lock, flags);
836 list_add_tail(&fde->link, &dwarf_fde_list); 850 list_add_tail(&fde->link, &dwarf_fde_list);
@@ -854,10 +868,8 @@ static void dwarf_unwinder_dump(struct task_struct *task,
854 while (1) { 868 while (1) {
855 frame = dwarf_unwind_stack(return_addr, _frame); 869 frame = dwarf_unwind_stack(return_addr, _frame);
856 870
857 if (_frame) { 871 if (_frame)
858 dwarf_frame_free_regs(_frame); 872 dwarf_free_frame(_frame);
859 mempool_free(_frame, dwarf_frame_pool);
860 }
861 873
862 _frame = frame; 874 _frame = frame;
863 875
@@ -867,6 +879,9 @@ static void dwarf_unwinder_dump(struct task_struct *task,
867 return_addr = frame->return_addr; 879 return_addr = frame->return_addr;
868 ops->address(data, return_addr, 1); 880 ops->address(data, return_addr, 1);
869 } 881 }
882
883 if (frame)
884 dwarf_free_frame(frame);
870} 885}
871 886
872static struct unwinder dwarf_unwinder = { 887static struct unwinder dwarf_unwinder = {
@@ -896,48 +911,28 @@ static void dwarf_unwinder_cleanup(void)
896} 911}
897 912
898/** 913/**
899 * dwarf_unwinder_init - initialise the dwarf unwinder 914 * dwarf_parse_section - parse DWARF section
915 * @eh_frame_start: start address of the .eh_frame section
916 * @eh_frame_end: end address of the .eh_frame section
917 * @mod: the kernel module containing the .eh_frame section
900 * 918 *
901 * Build the data structures describing the .dwarf_frame section to 919 * Parse the information in a .eh_frame section.
902 * make it easier to lookup CIE and FDE entries. Because the
903 * .eh_frame section is packed as tightly as possible it is not
904 * easy to lookup the FDE for a given PC, so we build a list of FDE
905 * and CIE entries that make it easier.
906 */ 920 */
907static int __init dwarf_unwinder_init(void) 921static int dwarf_parse_section(char *eh_frame_start, char *eh_frame_end,
922 struct module *mod)
908{ 923{
909 u32 entry_type; 924 u32 entry_type;
910 void *p, *entry; 925 void *p, *entry;
911 int count, err = 0; 926 int count, err = 0;
912 unsigned long len; 927 unsigned long len = 0;
913 unsigned int c_entries, f_entries; 928 unsigned int c_entries, f_entries;
914 unsigned char *end; 929 unsigned char *end;
915 INIT_LIST_HEAD(&dwarf_cie_list);
916 INIT_LIST_HEAD(&dwarf_fde_list);
917 930
918 c_entries = 0; 931 c_entries = 0;
919 f_entries = 0; 932 f_entries = 0;
920 entry = &__start_eh_frame; 933 entry = eh_frame_start;
921
922 dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
923 sizeof(struct dwarf_frame), 0,
924 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
925
926 dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
927 sizeof(struct dwarf_reg), 0,
928 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
929 934
930 dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ, 935 while ((char *)entry < eh_frame_end) {
931 mempool_alloc_slab,
932 mempool_free_slab,
933 dwarf_frame_cachep);
934
935 dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
936 mempool_alloc_slab,
937 mempool_free_slab,
938 dwarf_reg_cachep);
939
940 while ((char *)entry < __stop_eh_frame) {
941 p = entry; 936 p = entry;
942 937
943 count = dwarf_entry_len(p, &len); 938 count = dwarf_entry_len(p, &len);
@@ -949,6 +944,7 @@ static int __init dwarf_unwinder_init(void)
949 * entry and move to the next one because 'len' 944 * entry and move to the next one because 'len'
950 * tells us where our next entry is. 945 * tells us where our next entry is.
951 */ 946 */
947 err = -EINVAL;
952 goto out; 948 goto out;
953 } else 949 } else
954 p += count; 950 p += count;
@@ -960,13 +956,14 @@ static int __init dwarf_unwinder_init(void)
960 p += 4; 956 p += 4;
961 957
962 if (entry_type == DW_EH_FRAME_CIE) { 958 if (entry_type == DW_EH_FRAME_CIE) {
963 err = dwarf_parse_cie(entry, p, len, end); 959 err = dwarf_parse_cie(entry, p, len, end, mod);
964 if (err < 0) 960 if (err < 0)
965 goto out; 961 goto out;
966 else 962 else
967 c_entries++; 963 c_entries++;
968 } else { 964 } else {
969 err = dwarf_parse_fde(entry, entry_type, p, len, end); 965 err = dwarf_parse_fde(entry, entry_type, p, len,
966 end, mod);
970 if (err < 0) 967 if (err < 0)
971 goto out; 968 goto out;
972 else 969 else
@@ -979,6 +976,129 @@ static int __init dwarf_unwinder_init(void)
979 printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n", 976 printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n",
980 c_entries, f_entries); 977 c_entries, f_entries);
981 978
979 return 0;
980
981out:
982 return err;
983}
984
985#ifdef CONFIG_MODULES
986int module_dwarf_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
987 struct module *me)
988{
989 unsigned int i, err;
990 unsigned long start, end;
991 char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
992
993 start = end = 0;
994
995 for (i = 1; i < hdr->e_shnum; i++) {
996 /* Alloc bit cleared means "ignore it." */
997 if ((sechdrs[i].sh_flags & SHF_ALLOC)
998 && !strcmp(secstrings+sechdrs[i].sh_name, ".eh_frame")) {
999 start = sechdrs[i].sh_addr;
1000 end = start + sechdrs[i].sh_size;
1001 break;
1002 }
1003 }
1004
1005 /* Did we find the .eh_frame section? */
1006 if (i != hdr->e_shnum) {
1007 err = dwarf_parse_section((char *)start, (char *)end, me);
1008 if (err) {
1009 printk(KERN_WARNING "%s: failed to parse DWARF info\n",
1010 me->name);
1011 return err;
1012 }
1013 }
1014
1015 return 0;
1016}
1017
1018/**
1019 * module_dwarf_cleanup - remove FDE/CIEs associated with @mod
1020 * @mod: the module that is being unloaded
1021 *
1022 * Remove any FDEs and CIEs from the global lists that came from
1023 * @mod's .eh_frame section because @mod is being unloaded.
1024 */
1025void module_dwarf_cleanup(struct module *mod)
1026{
1027 struct dwarf_fde *fde;
1028 struct dwarf_cie *cie;
1029 unsigned long flags;
1030
1031 spin_lock_irqsave(&dwarf_cie_lock, flags);
1032
1033again_cie:
1034 list_for_each_entry(cie, &dwarf_cie_list, link) {
1035 if (cie->mod == mod)
1036 break;
1037 }
1038
1039 if (&cie->link != &dwarf_cie_list) {
1040 list_del(&cie->link);
1041 kfree(cie);
1042 goto again_cie;
1043 }
1044
1045 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
1046
1047 spin_lock_irqsave(&dwarf_fde_lock, flags);
1048
1049again_fde:
1050 list_for_each_entry(fde, &dwarf_fde_list, link) {
1051 if (fde->mod == mod)
1052 break;
1053 }
1054
1055 if (&fde->link != &dwarf_fde_list) {
1056 list_del(&fde->link);
1057 kfree(fde);
1058 goto again_fde;
1059 }
1060
1061 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
1062}
1063#endif /* CONFIG_MODULES */
1064
1065/**
1066 * dwarf_unwinder_init - initialise the dwarf unwinder
1067 *
1068 * Build the data structures describing the .dwarf_frame section to
1069 * make it easier to lookup CIE and FDE entries. Because the
1070 * .eh_frame section is packed as tightly as possible it is not
1071 * easy to lookup the FDE for a given PC, so we build a list of FDE
1072 * and CIE entries that make it easier.
1073 */
1074static int __init dwarf_unwinder_init(void)
1075{
1076 int err;
1077 INIT_LIST_HEAD(&dwarf_cie_list);
1078 INIT_LIST_HEAD(&dwarf_fde_list);
1079
1080 dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
1081 sizeof(struct dwarf_frame), 0,
1082 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
1083
1084 dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
1085 sizeof(struct dwarf_reg), 0,
1086 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
1087
1088 dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ,
1089 mempool_alloc_slab,
1090 mempool_free_slab,
1091 dwarf_frame_cachep);
1092
1093 dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
1094 mempool_alloc_slab,
1095 mempool_free_slab,
1096 dwarf_reg_cachep);
1097
1098 err = dwarf_parse_section(__start_eh_frame, __stop_eh_frame, NULL);
1099 if (err)
1100 goto out;
1101
982 err = unwinder_register(&dwarf_unwinder); 1102 err = unwinder_register(&dwarf_unwinder);
983 if (err) 1103 if (err)
984 goto out; 1104 goto out;
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 3eb84931d2aa..f0abd58c3a69 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -133,7 +133,7 @@ work_pending:
133 ! r8: current_thread_info 133 ! r8: current_thread_info
134 ! t: result of "tst #_TIF_NEED_RESCHED, r0" 134 ! t: result of "tst #_TIF_NEED_RESCHED, r0"
135 bf/s work_resched 135 bf/s work_resched
136 tst #(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r0 136 tst #_TIF_SIGPENDING, r0
137work_notifysig: 137work_notifysig:
138 bt/s __restore_all 138 bt/s __restore_all
139 mov r15, r4 139 mov r15, r4
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
index 2c48e267256e..b6f41c109beb 100644
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -62,6 +62,150 @@ static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
62 return ftrace_replaced_code; 62 return ftrace_replaced_code;
63} 63}
64 64
65/*
66 * Modifying code must take extra care. On an SMP machine, if
67 * the code being modified is also being executed on another CPU
68 * that CPU will have undefined results and possibly take a GPF.
69 * We use kstop_machine to stop other CPUS from exectuing code.
70 * But this does not stop NMIs from happening. We still need
71 * to protect against that. We separate out the modification of
72 * the code to take care of this.
73 *
74 * Two buffers are added: An IP buffer and a "code" buffer.
75 *
76 * 1) Put the instruction pointer into the IP buffer
77 * and the new code into the "code" buffer.
78 * 2) Wait for any running NMIs to finish and set a flag that says
79 * we are modifying code, it is done in an atomic operation.
80 * 3) Write the code
81 * 4) clear the flag.
82 * 5) Wait for any running NMIs to finish.
83 *
84 * If an NMI is executed, the first thing it does is to call
85 * "ftrace_nmi_enter". This will check if the flag is set to write
86 * and if it is, it will write what is in the IP and "code" buffers.
87 *
88 * The trick is, it does not matter if everyone is writing the same
89 * content to the code location. Also, if a CPU is executing code
90 * it is OK to write to that code location if the contents being written
91 * are the same as what exists.
92 */
93#define MOD_CODE_WRITE_FLAG (1 << 31) /* set when NMI should do the write */
94static atomic_t nmi_running = ATOMIC_INIT(0);
95static int mod_code_status; /* holds return value of text write */
96static void *mod_code_ip; /* holds the IP to write to */
97static void *mod_code_newcode; /* holds the text to write to the IP */
98
99static unsigned nmi_wait_count;
100static atomic_t nmi_update_count = ATOMIC_INIT(0);
101
102int ftrace_arch_read_dyn_info(char *buf, int size)
103{
104 int r;
105
106 r = snprintf(buf, size, "%u %u",
107 nmi_wait_count,
108 atomic_read(&nmi_update_count));
109 return r;
110}
111
112static void clear_mod_flag(void)
113{
114 int old = atomic_read(&nmi_running);
115
116 for (;;) {
117 int new = old & ~MOD_CODE_WRITE_FLAG;
118
119 if (old == new)
120 break;
121
122 old = atomic_cmpxchg(&nmi_running, old, new);
123 }
124}
125
126static void ftrace_mod_code(void)
127{
128 /*
129 * Yes, more than one CPU process can be writing to mod_code_status.
130 * (and the code itself)
131 * But if one were to fail, then they all should, and if one were
132 * to succeed, then they all should.
133 */
134 mod_code_status = probe_kernel_write(mod_code_ip, mod_code_newcode,
135 MCOUNT_INSN_SIZE);
136
137 /* if we fail, then kill any new writers */
138 if (mod_code_status)
139 clear_mod_flag();
140}
141
142void ftrace_nmi_enter(void)
143{
144 if (atomic_inc_return(&nmi_running) & MOD_CODE_WRITE_FLAG) {
145 smp_rmb();
146 ftrace_mod_code();
147 atomic_inc(&nmi_update_count);
148 }
149 /* Must have previous changes seen before executions */
150 smp_mb();
151}
152
153void ftrace_nmi_exit(void)
154{
155 /* Finish all executions before clearing nmi_running */
156 smp_mb();
157 atomic_dec(&nmi_running);
158}
159
160static void wait_for_nmi_and_set_mod_flag(void)
161{
162 if (!atomic_cmpxchg(&nmi_running, 0, MOD_CODE_WRITE_FLAG))
163 return;
164
165 do {
166 cpu_relax();
167 } while (atomic_cmpxchg(&nmi_running, 0, MOD_CODE_WRITE_FLAG));
168
169 nmi_wait_count++;
170}
171
172static void wait_for_nmi(void)
173{
174 if (!atomic_read(&nmi_running))
175 return;
176
177 do {
178 cpu_relax();
179 } while (atomic_read(&nmi_running));
180
181 nmi_wait_count++;
182}
183
184static int
185do_ftrace_mod_code(unsigned long ip, void *new_code)
186{
187 mod_code_ip = (void *)ip;
188 mod_code_newcode = new_code;
189
190 /* The buffers need to be visible before we let NMIs write them */
191 smp_mb();
192
193 wait_for_nmi_and_set_mod_flag();
194
195 /* Make sure all running NMIs have finished before we write the code */
196 smp_mb();
197
198 ftrace_mod_code();
199
200 /* Make sure the write happens before clearing the bit */
201 smp_mb();
202
203 clear_mod_flag();
204 wait_for_nmi();
205
206 return mod_code_status;
207}
208
65static int ftrace_modify_code(unsigned long ip, unsigned char *old_code, 209static int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
66 unsigned char *new_code) 210 unsigned char *new_code)
67{ 211{
@@ -86,7 +230,7 @@ static int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
86 return -EINVAL; 230 return -EINVAL;
87 231
88 /* replace the text with the new text */ 232 /* replace the text with the new text */
89 if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE)) 233 if (do_ftrace_mod_code(ip, new_code))
90 return -EPERM; 234 return -EPERM;
91 235
92 flush_icache_range(ip, ip + MCOUNT_INSN_SIZE); 236 flush_icache_range(ip, ip + MCOUNT_INSN_SIZE);
diff --git a/arch/sh/kernel/gpio.c b/arch/sh/kernel/gpio.c
deleted file mode 100644
index d22e5af699f9..000000000000
--- a/arch/sh/kernel/gpio.c
+++ /dev/null
@@ -1,584 +0,0 @@
1/*
2 * Pinmuxed GPIO support for SuperH.
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/errno.h>
12#include <linux/kernel.h>
13#include <linux/list.h>
14#include <linux/module.h>
15#include <linux/clk.h>
16#include <linux/err.h>
17#include <linux/io.h>
18#include <linux/irq.h>
19#include <linux/bitops.h>
20#include <linux/gpio.h>
21
22static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
23{
24 if (enum_id < r->begin)
25 return 0;
26
27 if (enum_id > r->end)
28 return 0;
29
30 return 1;
31}
32
33static unsigned long gpio_read_raw_reg(unsigned long reg,
34 unsigned long reg_width)
35{
36 switch (reg_width) {
37 case 8:
38 return ctrl_inb(reg);
39 case 16:
40 return ctrl_inw(reg);
41 case 32:
42 return ctrl_inl(reg);
43 }
44
45 BUG();
46 return 0;
47}
48
49static void gpio_write_raw_reg(unsigned long reg,
50 unsigned long reg_width,
51 unsigned long data)
52{
53 switch (reg_width) {
54 case 8:
55 ctrl_outb(data, reg);
56 return;
57 case 16:
58 ctrl_outw(data, reg);
59 return;
60 case 32:
61 ctrl_outl(data, reg);
62 return;
63 }
64
65 BUG();
66}
67
68static void gpio_write_bit(struct pinmux_data_reg *dr,
69 unsigned long in_pos, unsigned long value)
70{
71 unsigned long pos;
72
73 pos = dr->reg_width - (in_pos + 1);
74
75#ifdef DEBUG
76 pr_info("write_bit addr = %lx, value = %ld, pos = %ld, "
77 "r_width = %ld\n",
78 dr->reg, !!value, pos, dr->reg_width);
79#endif
80
81 if (value)
82 set_bit(pos, &dr->reg_shadow);
83 else
84 clear_bit(pos, &dr->reg_shadow);
85
86 gpio_write_raw_reg(dr->reg, dr->reg_width, dr->reg_shadow);
87}
88
89static int gpio_read_reg(unsigned long reg, unsigned long reg_width,
90 unsigned long field_width, unsigned long in_pos)
91{
92 unsigned long data, mask, pos;
93
94 data = 0;
95 mask = (1 << field_width) - 1;
96 pos = reg_width - ((in_pos + 1) * field_width);
97
98#ifdef DEBUG
99 pr_info("read_reg: addr = %lx, pos = %ld, "
100 "r_width = %ld, f_width = %ld\n",
101 reg, pos, reg_width, field_width);
102#endif
103
104 data = gpio_read_raw_reg(reg, reg_width);
105 return (data >> pos) & mask;
106}
107
108static void gpio_write_reg(unsigned long reg, unsigned long reg_width,
109 unsigned long field_width, unsigned long in_pos,
110 unsigned long value)
111{
112 unsigned long mask, pos;
113
114 mask = (1 << field_width) - 1;
115 pos = reg_width - ((in_pos + 1) * field_width);
116
117#ifdef DEBUG
118 pr_info("write_reg addr = %lx, value = %ld, pos = %ld, "
119 "r_width = %ld, f_width = %ld\n",
120 reg, value, pos, reg_width, field_width);
121#endif
122
123 mask = ~(mask << pos);
124 value = value << pos;
125
126 switch (reg_width) {
127 case 8:
128 ctrl_outb((ctrl_inb(reg) & mask) | value, reg);
129 break;
130 case 16:
131 ctrl_outw((ctrl_inw(reg) & mask) | value, reg);
132 break;
133 case 32:
134 ctrl_outl((ctrl_inl(reg) & mask) | value, reg);
135 break;
136 }
137}
138
139static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
140{
141 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
142 struct pinmux_data_reg *data_reg;
143 int k, n;
144
145 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
146 return -1;
147
148 k = 0;
149 while (1) {
150 data_reg = gpioc->data_regs + k;
151
152 if (!data_reg->reg_width)
153 break;
154
155 for (n = 0; n < data_reg->reg_width; n++) {
156 if (data_reg->enum_ids[n] == gpiop->enum_id) {
157 gpiop->flags &= ~PINMUX_FLAG_DREG;
158 gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
159 gpiop->flags &= ~PINMUX_FLAG_DBIT;
160 gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
161 return 0;
162 }
163 }
164 k++;
165 }
166
167 BUG();
168
169 return -1;
170}
171
172static void setup_data_regs(struct pinmux_info *gpioc)
173{
174 struct pinmux_data_reg *drp;
175 int k;
176
177 for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
178 setup_data_reg(gpioc, k);
179
180 k = 0;
181 while (1) {
182 drp = gpioc->data_regs + k;
183
184 if (!drp->reg_width)
185 break;
186
187 drp->reg_shadow = gpio_read_raw_reg(drp->reg, drp->reg_width);
188 k++;
189 }
190}
191
192static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
193 struct pinmux_data_reg **drp, int *bitp)
194{
195 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
196 int k, n;
197
198 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
199 return -1;
200
201 k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
202 n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
203 *drp = gpioc->data_regs + k;
204 *bitp = n;
205 return 0;
206}
207
208static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
209 struct pinmux_cfg_reg **crp, int *indexp,
210 unsigned long **cntp)
211{
212 struct pinmux_cfg_reg *config_reg;
213 unsigned long r_width, f_width;
214 int k, n;
215
216 k = 0;
217 while (1) {
218 config_reg = gpioc->cfg_regs + k;
219
220 r_width = config_reg->reg_width;
221 f_width = config_reg->field_width;
222
223 if (!r_width)
224 break;
225 for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) {
226 if (config_reg->enum_ids[n] == enum_id) {
227 *crp = config_reg;
228 *indexp = n;
229 *cntp = &config_reg->cnt[n / (1 << f_width)];
230 return 0;
231 }
232 }
233 k++;
234 }
235
236 return -1;
237}
238
239static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
240 int pos, pinmux_enum_t *enum_idp)
241{
242 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
243 pinmux_enum_t *data = gpioc->gpio_data;
244 int k;
245
246 if (!enum_in_range(enum_id, &gpioc->data)) {
247 if (!enum_in_range(enum_id, &gpioc->mark)) {
248 pr_err("non data/mark enum_id for gpio %d\n", gpio);
249 return -1;
250 }
251 }
252
253 if (pos) {
254 *enum_idp = data[pos + 1];
255 return pos + 1;
256 }
257
258 for (k = 0; k < gpioc->gpio_data_size; k++) {
259 if (data[k] == enum_id) {
260 *enum_idp = data[k + 1];
261 return k + 1;
262 }
263 }
264
265 pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
266 return -1;
267}
268
269static void write_config_reg(struct pinmux_info *gpioc,
270 struct pinmux_cfg_reg *crp,
271 int index)
272{
273 unsigned long ncomb, pos, value;
274
275 ncomb = 1 << crp->field_width;
276 pos = index / ncomb;
277 value = index % ncomb;
278
279 gpio_write_reg(crp->reg, crp->reg_width, crp->field_width, pos, value);
280}
281
282static int check_config_reg(struct pinmux_info *gpioc,
283 struct pinmux_cfg_reg *crp,
284 int index)
285{
286 unsigned long ncomb, pos, value;
287
288 ncomb = 1 << crp->field_width;
289 pos = index / ncomb;
290 value = index % ncomb;
291
292 if (gpio_read_reg(crp->reg, crp->reg_width,
293 crp->field_width, pos) == value)
294 return 0;
295
296 return -1;
297}
298
299enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
300
301static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
302 int pinmux_type, int cfg_mode)
303{
304 struct pinmux_cfg_reg *cr = NULL;
305 pinmux_enum_t enum_id;
306 struct pinmux_range *range;
307 int in_range, pos, index;
308 unsigned long *cntp;
309
310 switch (pinmux_type) {
311
312 case PINMUX_TYPE_FUNCTION:
313 range = NULL;
314 break;
315
316 case PINMUX_TYPE_OUTPUT:
317 range = &gpioc->output;
318 break;
319
320 case PINMUX_TYPE_INPUT:
321 range = &gpioc->input;
322 break;
323
324 case PINMUX_TYPE_INPUT_PULLUP:
325 range = &gpioc->input_pu;
326 break;
327
328 case PINMUX_TYPE_INPUT_PULLDOWN:
329 range = &gpioc->input_pd;
330 break;
331
332 default:
333 goto out_err;
334 }
335
336 pos = 0;
337 enum_id = 0;
338 index = 0;
339 while (1) {
340 pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
341 if (pos <= 0)
342 goto out_err;
343
344 if (!enum_id)
345 break;
346
347 in_range = enum_in_range(enum_id, &gpioc->function);
348 if (!in_range && range) {
349 in_range = enum_in_range(enum_id, range);
350
351 if (in_range && enum_id == range->force)
352 continue;
353 }
354
355 if (!in_range)
356 continue;
357
358 if (get_config_reg(gpioc, enum_id, &cr, &index, &cntp) != 0)
359 goto out_err;
360
361 switch (cfg_mode) {
362 case GPIO_CFG_DRYRUN:
363 if (!*cntp || !check_config_reg(gpioc, cr, index))
364 continue;
365 break;
366
367 case GPIO_CFG_REQ:
368 write_config_reg(gpioc, cr, index);
369 *cntp = *cntp + 1;
370 break;
371
372 case GPIO_CFG_FREE:
373 *cntp = *cntp - 1;
374 break;
375 }
376 }
377
378 return 0;
379 out_err:
380 return -1;
381}
382
383static DEFINE_SPINLOCK(gpio_lock);
384
385static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
386{
387 return container_of(chip, struct pinmux_info, chip);
388}
389
390static int sh_gpio_request(struct gpio_chip *chip, unsigned offset)
391{
392 struct pinmux_info *gpioc = chip_to_pinmux(chip);
393 struct pinmux_data_reg *dummy;
394 unsigned long flags;
395 int i, ret, pinmux_type;
396
397 ret = -EINVAL;
398
399 if (!gpioc)
400 goto err_out;
401
402 spin_lock_irqsave(&gpio_lock, flags);
403
404 if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
405 goto err_unlock;
406
407 /* setup pin function here if no data is associated with pin */
408
409 if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
410 pinmux_type = PINMUX_TYPE_FUNCTION;
411 else
412 pinmux_type = PINMUX_TYPE_GPIO;
413
414 if (pinmux_type == PINMUX_TYPE_FUNCTION) {
415 if (pinmux_config_gpio(gpioc, offset,
416 pinmux_type,
417 GPIO_CFG_DRYRUN) != 0)
418 goto err_unlock;
419
420 if (pinmux_config_gpio(gpioc, offset,
421 pinmux_type,
422 GPIO_CFG_REQ) != 0)
423 BUG();
424 }
425
426 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
427 gpioc->gpios[offset].flags |= pinmux_type;
428
429 ret = 0;
430 err_unlock:
431 spin_unlock_irqrestore(&gpio_lock, flags);
432 err_out:
433 return ret;
434}
435
436static void sh_gpio_free(struct gpio_chip *chip, unsigned offset)
437{
438 struct pinmux_info *gpioc = chip_to_pinmux(chip);
439 unsigned long flags;
440 int pinmux_type;
441
442 if (!gpioc)
443 return;
444
445 spin_lock_irqsave(&gpio_lock, flags);
446
447 pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
448 pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
449 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
450 gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
451
452 spin_unlock_irqrestore(&gpio_lock, flags);
453}
454
455static int pinmux_direction(struct pinmux_info *gpioc,
456 unsigned gpio, int new_pinmux_type)
457{
458 int pinmux_type;
459 int ret = -EINVAL;
460
461 if (!gpioc)
462 goto err_out;
463
464 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
465
466 switch (pinmux_type) {
467 case PINMUX_TYPE_GPIO:
468 break;
469 case PINMUX_TYPE_OUTPUT:
470 case PINMUX_TYPE_INPUT:
471 case PINMUX_TYPE_INPUT_PULLUP:
472 case PINMUX_TYPE_INPUT_PULLDOWN:
473 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
474 break;
475 default:
476 goto err_out;
477 }
478
479 if (pinmux_config_gpio(gpioc, gpio,
480 new_pinmux_type,
481 GPIO_CFG_DRYRUN) != 0)
482 goto err_out;
483
484 if (pinmux_config_gpio(gpioc, gpio,
485 new_pinmux_type,
486 GPIO_CFG_REQ) != 0)
487 BUG();
488
489 gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
490 gpioc->gpios[gpio].flags |= new_pinmux_type;
491
492 ret = 0;
493 err_out:
494 return ret;
495}
496
497static int sh_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
498{
499 struct pinmux_info *gpioc = chip_to_pinmux(chip);
500 unsigned long flags;
501 int ret;
502
503 spin_lock_irqsave(&gpio_lock, flags);
504 ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
505 spin_unlock_irqrestore(&gpio_lock, flags);
506
507 return ret;
508}
509
510static void sh_gpio_set_value(struct pinmux_info *gpioc,
511 unsigned gpio, int value)
512{
513 struct pinmux_data_reg *dr = NULL;
514 int bit = 0;
515
516 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
517 BUG();
518 else
519 gpio_write_bit(dr, bit, value);
520}
521
522static int sh_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
523 int value)
524{
525 struct pinmux_info *gpioc = chip_to_pinmux(chip);
526 unsigned long flags;
527 int ret;
528
529 sh_gpio_set_value(gpioc, offset, value);
530 spin_lock_irqsave(&gpio_lock, flags);
531 ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
532 spin_unlock_irqrestore(&gpio_lock, flags);
533
534 return ret;
535}
536
537static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
538{
539 struct pinmux_data_reg *dr = NULL;
540 int bit = 0;
541
542 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) {
543 BUG();
544 return 0;
545 }
546
547 return gpio_read_reg(dr->reg, dr->reg_width, 1, bit);
548}
549
550static int sh_gpio_get(struct gpio_chip *chip, unsigned offset)
551{
552 return sh_gpio_get_value(chip_to_pinmux(chip), offset);
553}
554
555static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
556{
557 sh_gpio_set_value(chip_to_pinmux(chip), offset, value);
558}
559
560int register_pinmux(struct pinmux_info *pip)
561{
562 struct gpio_chip *chip = &pip->chip;
563
564 pr_info("sh pinmux: %s handling gpio %d -> %d\n",
565 pip->name, pip->first_gpio, pip->last_gpio);
566
567 setup_data_regs(pip);
568
569 chip->request = sh_gpio_request;
570 chip->free = sh_gpio_free;
571 chip->direction_input = sh_gpio_direction_input;
572 chip->get = sh_gpio_get;
573 chip->direction_output = sh_gpio_direction_output;
574 chip->set = sh_gpio_set;
575
576 WARN_ON(pip->first_gpio != 0); /* needs testing */
577
578 chip->label = pip->name;
579 chip->owner = THIS_MODULE;
580 chip->base = pip->first_gpio;
581 chip->ngpio = (pip->last_gpio - pip->first_gpio) + 1;
582
583 return gpiochip_add(chip);
584}
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index a78be74b8d3e..1151ecdffa71 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -33,7 +33,7 @@ ENTRY(empty_zero_page)
33 .long 1 /* LOADER_TYPE */ 33 .long 1 /* LOADER_TYPE */
34 .long 0x00000000 /* INITRD_START */ 34 .long 0x00000000 /* INITRD_START */
35 .long 0x00000000 /* INITRD_SIZE */ 35 .long 0x00000000 /* INITRD_SIZE */
36#ifdef CONFIG_32BIT 36#if defined(CONFIG_32BIT) && defined(CONFIG_PMB_FIXED)
37 .long 0x53453f00 + 32 /* "SE?" = 32 bit */ 37 .long 0x53453f00 + 32 /* "SE?" = 32 bit */
38#else 38#else
39 .long 0x53453f00 + 29 /* "SE?" = 29 bit */ 39 .long 0x53453f00 + 29 /* "SE?" = 29 bit */
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 27ff2dc093c7..aaff0037fcd7 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -21,7 +21,7 @@
21#include <asm/atomic.h> 21#include <asm/atomic.h>
22 22
23static int hlt_counter; 23static int hlt_counter;
24void (*pm_idle)(void); 24void (*pm_idle)(void) = NULL;
25void (*pm_power_off)(void); 25void (*pm_power_off)(void);
26EXPORT_SYMBOL(pm_power_off); 26EXPORT_SYMBOL(pm_power_off);
27 27
@@ -39,48 +39,92 @@ static int __init hlt_setup(char *__unused)
39} 39}
40__setup("hlt", hlt_setup); 40__setup("hlt", hlt_setup);
41 41
42static inline int hlt_works(void)
43{
44 return !hlt_counter;
45}
46
47/*
48 * On SMP it's slightly faster (but much more power-consuming!)
49 * to poll the ->work.need_resched flag instead of waiting for the
50 * cross-CPU IPI to arrive. Use this option with caution.
51 */
52static void poll_idle(void)
53{
54 local_irq_enable();
55 while (!need_resched())
56 cpu_relax();
57}
58
42void default_idle(void) 59void default_idle(void)
43{ 60{
44 if (!hlt_counter) { 61 if (hlt_works()) {
45 clear_thread_flag(TIF_POLLING_NRFLAG); 62 clear_thread_flag(TIF_POLLING_NRFLAG);
46 smp_mb__after_clear_bit(); 63 smp_mb__after_clear_bit();
47 set_bl_bit();
48 stop_critical_timings();
49 64
50 while (!need_resched()) 65 if (!need_resched()) {
66 local_irq_enable();
51 cpu_sleep(); 67 cpu_sleep();
68 } else
69 local_irq_enable();
52 70
53 start_critical_timings();
54 clear_bl_bit();
55 set_thread_flag(TIF_POLLING_NRFLAG); 71 set_thread_flag(TIF_POLLING_NRFLAG);
56 } else 72 } else
57 while (!need_resched()) 73 poll_idle();
58 cpu_relax();
59} 74}
60 75
76/*
77 * The idle thread. There's no useful work to be done, so just try to conserve
78 * power and have a low exit latency (ie sit in a loop waiting for somebody to
79 * say that they'd like to reschedule)
80 */
61void cpu_idle(void) 81void cpu_idle(void)
62{ 82{
83 unsigned int cpu = smp_processor_id();
84
63 set_thread_flag(TIF_POLLING_NRFLAG); 85 set_thread_flag(TIF_POLLING_NRFLAG);
64 86
65 /* endless idle loop with no priority at all */ 87 /* endless idle loop with no priority at all */
66 while (1) { 88 while (1) {
67 void (*idle)(void) = pm_idle; 89 tick_nohz_stop_sched_tick(1);
68 90
69 if (!idle) 91 while (!need_resched() && cpu_online(cpu)) {
70 idle = default_idle; 92 check_pgt_cache();
93 rmb();
71 94
72 tick_nohz_stop_sched_tick(1); 95 local_irq_disable();
73 while (!need_resched()) 96 /* Don't trace irqs off for idle */
74 idle(); 97 stop_critical_timings();
75 tick_nohz_restart_sched_tick(); 98 pm_idle();
99 /*
100 * Sanity check to ensure that pm_idle() returns
101 * with IRQs enabled
102 */
103 WARN_ON(irqs_disabled());
104 start_critical_timings();
105 }
76 106
107 tick_nohz_restart_sched_tick();
77 preempt_enable_no_resched(); 108 preempt_enable_no_resched();
78 schedule(); 109 schedule();
79 preempt_disable(); 110 preempt_disable();
80 check_pgt_cache();
81 } 111 }
82} 112}
83 113
114void __cpuinit select_idle_routine(void)
115{
116 /*
117 * If a platform has set its own idle routine, leave it alone.
118 */
119 if (pm_idle)
120 return;
121
122 if (hlt_works())
123 pm_idle = default_idle;
124 else
125 pm_idle = poll_idle;
126}
127
84static void do_nothing(void *unused) 128static void do_nothing(void *unused)
85{ 129{
86} 130}
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
index b8fa6524760a..e1e1dbd19557 100644
--- a/arch/sh/kernel/io_generic.c
+++ b/arch/sh/kernel/io_generic.c
@@ -24,7 +24,7 @@
24#define dummy_read() 24#define dummy_read()
25#endif 25#endif
26 26
27unsigned long generic_io_base; 27unsigned long generic_io_base = 0;
28 28
29u8 generic_inb(unsigned long port) 29u8 generic_inb(unsigned long port)
30{ 30{
@@ -147,8 +147,10 @@ void generic_outsl(unsigned long port, const void *src, unsigned long count)
147 147
148void __iomem *generic_ioport_map(unsigned long addr, unsigned int size) 148void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
149{ 149{
150#ifdef P1SEG
150 if (PXSEG(addr) >= P1SEG) 151 if (PXSEG(addr) >= P1SEG)
151 return (void __iomem *)addr; 152 return (void __iomem *)addr;
153#endif
152 154
153 return (void __iomem *)(addr + generic_io_base); 155 return (void __iomem *)(addr + generic_io_base);
154} 156}
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index eac7da772fc2..e1913f28f418 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -37,7 +37,15 @@ void ack_bad_irq(unsigned int irq)
37 */ 37 */
38static int show_other_interrupts(struct seq_file *p, int prec) 38static int show_other_interrupts(struct seq_file *p, int prec)
39{ 39{
40 int j;
41
42 seq_printf(p, "%*s: ", prec, "NMI");
43 for_each_online_cpu(j)
44 seq_printf(p, "%10u ", irq_stat[j].__nmi_count);
45 seq_printf(p, " Non-maskable interrupts\n");
46
40 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count)); 47 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
48
41 return 0; 49 return 0;
42} 50}
43 51
@@ -255,6 +263,12 @@ void __init init_IRQ(void)
255{ 263{
256 plat_irq_setup(); 264 plat_irq_setup();
257 265
266 /*
267 * Pin any of the legacy IRQ vectors that haven't already been
268 * grabbed by the platform
269 */
270 reserve_irq_legacy();
271
258 /* Perform the machine specific initialisation */ 272 /* Perform the machine specific initialisation */
259 if (sh_mv.mv_init_irq) 273 if (sh_mv.mv_init_irq)
260 sh_mv.mv_init_irq(); 274 sh_mv.mv_init_irq();
diff --git a/arch/sh/kernel/irq_32.c b/arch/sh/kernel/irq_32.c
new file mode 100644
index 000000000000..e33ab15831f9
--- /dev/null
+++ b/arch/sh/kernel/irq_32.c
@@ -0,0 +1,57 @@
1/*
2 * SHcompact irqflags support
3 *
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/irqflags.h>
11#include <linux/module.h>
12
13void notrace raw_local_irq_restore(unsigned long flags)
14{
15 unsigned long __dummy0, __dummy1;
16
17 if (flags == RAW_IRQ_DISABLED) {
18 __asm__ __volatile__ (
19 "stc sr, %0\n\t"
20 "or #0xf0, %0\n\t"
21 "ldc %0, sr\n\t"
22 : "=&z" (__dummy0)
23 : /* no inputs */
24 : "memory"
25 );
26 } else {
27 __asm__ __volatile__ (
28 "stc sr, %0\n\t"
29 "and %1, %0\n\t"
30#ifdef CONFIG_CPU_HAS_SR_RB
31 "stc r6_bank, %1\n\t"
32 "or %1, %0\n\t"
33#endif
34 "ldc %0, sr\n\t"
35 : "=&r" (__dummy0), "=r" (__dummy1)
36 : "1" (~RAW_IRQ_DISABLED)
37 : "memory"
38 );
39 }
40}
41EXPORT_SYMBOL(raw_local_irq_restore);
42
43unsigned long notrace __raw_local_save_flags(void)
44{
45 unsigned long flags;
46
47 __asm__ __volatile__ (
48 "stc sr, %0\n\t"
49 "and #0xf0, %0\n\t"
50 : "=&z" (flags)
51 : /* no inputs */
52 : "memory"
53 );
54
55 return flags;
56}
57EXPORT_SYMBOL(__raw_local_save_flags);
diff --git a/arch/sh/kernel/irq_64.c b/arch/sh/kernel/irq_64.c
new file mode 100644
index 000000000000..32365ba0e039
--- /dev/null
+++ b/arch/sh/kernel/irq_64.c
@@ -0,0 +1,51 @@
1/*
2 * SHmedia irqflags support
3 *
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/irqflags.h>
11#include <linux/module.h>
12#include <cpu/registers.h>
13
14void notrace raw_local_irq_restore(unsigned long flags)
15{
16 unsigned long long __dummy;
17
18 if (flags == RAW_IRQ_DISABLED) {
19 __asm__ __volatile__ (
20 "getcon " __SR ", %0\n\t"
21 "or %0, %1, %0\n\t"
22 "putcon %0, " __SR "\n\t"
23 : "=&r" (__dummy)
24 : "r" (RAW_IRQ_DISABLED)
25 );
26 } else {
27 __asm__ __volatile__ (
28 "getcon " __SR ", %0\n\t"
29 "and %0, %1, %0\n\t"
30 "putcon %0, " __SR "\n\t"
31 : "=&r" (__dummy)
32 : "r" (~RAW_IRQ_DISABLED)
33 );
34 }
35}
36EXPORT_SYMBOL(raw_local_irq_restore);
37
38unsigned long notrace __raw_local_save_flags(void)
39{
40 unsigned long flags;
41
42 __asm__ __volatile__ (
43 "getcon " __SR ", %0\n\t"
44 "and %0, %1, %0"
45 : "=&r" (flags)
46 : "r" (RAW_IRQ_DISABLED)
47 );
48
49 return flags;
50}
51EXPORT_SYMBOL(__raw_local_save_flags);
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 7ea2704ea033..76f280223ebd 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -46,12 +46,6 @@ void machine_crash_shutdown(struct pt_regs *regs)
46 */ 46 */
47int machine_kexec_prepare(struct kimage *image) 47int machine_kexec_prepare(struct kimage *image)
48{ 48{
49 /* older versions of kexec-tools are passing
50 * the zImage entry point as a virtual address.
51 */
52 if (image->start != PHYSADDR(image->start))
53 return -EINVAL; /* upgrade your kexec-tools */
54
55 return 0; 49 return 0;
56} 50}
57 51
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index cbce639b108a..1652340ba3f2 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -135,5 +135,9 @@ void __init sh_mv_setup(void)
135 if (!sh_mv.mv_nr_irqs) 135 if (!sh_mv.mv_nr_irqs)
136 sh_mv.mv_nr_irqs = NR_IRQS; 136 sh_mv.mv_nr_irqs = NR_IRQS;
137 137
138#ifdef P2SEG
138 __set_io_port_base(P2SEG); 139 __set_io_port_base(P2SEG);
140#else
141 __set_io_port_base(0);
142#endif
139} 143}
diff --git a/arch/sh/kernel/module.c b/arch/sh/kernel/module.c
index c2efdcde266f..43adddfe4c04 100644
--- a/arch/sh/kernel/module.c
+++ b/arch/sh/kernel/module.c
@@ -32,6 +32,7 @@
32#include <linux/string.h> 32#include <linux/string.h>
33#include <linux/kernel.h> 33#include <linux/kernel.h>
34#include <asm/unaligned.h> 34#include <asm/unaligned.h>
35#include <asm/dwarf.h>
35 36
36void *module_alloc(unsigned long size) 37void *module_alloc(unsigned long size)
37{ 38{
@@ -145,10 +146,16 @@ int module_finalize(const Elf_Ehdr *hdr,
145 const Elf_Shdr *sechdrs, 146 const Elf_Shdr *sechdrs,
146 struct module *me) 147 struct module *me)
147{ 148{
148 return module_bug_finalize(hdr, sechdrs, me); 149 int ret = 0;
150
151 ret |= module_dwarf_finalize(hdr, sechdrs, me);
152 ret |= module_bug_finalize(hdr, sechdrs, me);
153
154 return ret;
149} 155}
150 156
151void module_arch_cleanup(struct module *mod) 157void module_arch_cleanup(struct module *mod)
152{ 158{
153 module_bug_cleanup(mod); 159 module_bug_cleanup(mod);
160 module_dwarf_cleanup(mod);
154} 161}
diff --git a/arch/sh/kernel/perf_callchain.c b/arch/sh/kernel/perf_callchain.c
new file mode 100644
index 000000000000..24ea837eac5b
--- /dev/null
+++ b/arch/sh/kernel/perf_callchain.c
@@ -0,0 +1,98 @@
1/*
2 * Performance event callchain support - SuperH architecture code
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/sched.h>
12#include <linux/perf_event.h>
13#include <linux/percpu.h>
14#include <asm/unwinder.h>
15#include <asm/ptrace.h>
16
17static inline void callchain_store(struct perf_callchain_entry *entry, u64 ip)
18{
19 if (entry->nr < PERF_MAX_STACK_DEPTH)
20 entry->ip[entry->nr++] = ip;
21}
22
23static void callchain_warning(void *data, char *msg)
24{
25}
26
27static void
28callchain_warning_symbol(void *data, char *msg, unsigned long symbol)
29{
30}
31
32static int callchain_stack(void *data, char *name)
33{
34 return 0;
35}
36
37static void callchain_address(void *data, unsigned long addr, int reliable)
38{
39 struct perf_callchain_entry *entry = data;
40
41 if (reliable)
42 callchain_store(entry, addr);
43}
44
45static const struct stacktrace_ops callchain_ops = {
46 .warning = callchain_warning,
47 .warning_symbol = callchain_warning_symbol,
48 .stack = callchain_stack,
49 .address = callchain_address,
50};
51
52static void
53perf_callchain_kernel(struct pt_regs *regs, struct perf_callchain_entry *entry)
54{
55 callchain_store(entry, PERF_CONTEXT_KERNEL);
56 callchain_store(entry, regs->pc);
57
58 unwind_stack(NULL, regs, NULL, &callchain_ops, entry);
59}
60
61static void
62perf_do_callchain(struct pt_regs *regs, struct perf_callchain_entry *entry)
63{
64 int is_user;
65
66 if (!regs)
67 return;
68
69 is_user = user_mode(regs);
70
71 if (!current || current->pid == 0)
72 return;
73
74 if (is_user && current->state != TASK_RUNNING)
75 return;
76
77 /*
78 * Only the kernel side is implemented for now.
79 */
80 if (!is_user)
81 perf_callchain_kernel(regs, entry);
82}
83
84/*
85 * No need for separate IRQ and NMI entries.
86 */
87static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);
88
89struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
90{
91 struct perf_callchain_entry *entry = &__get_cpu_var(callchain);
92
93 entry->nr = 0;
94
95 perf_do_callchain(regs, entry);
96
97 return entry;
98}
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
new file mode 100644
index 000000000000..7ff0943e7a08
--- /dev/null
+++ b/arch/sh/kernel/perf_event.c
@@ -0,0 +1,312 @@
1/*
2 * Performance event support framework for SuperH hardware counters.
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * Heavily based on the x86 and PowerPC implementations.
7 *
8 * x86:
9 * Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de>
10 * Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar
11 * Copyright (C) 2009 Jaswinder Singh Rajput
12 * Copyright (C) 2009 Advanced Micro Devices, Inc., Robert Richter
13 * Copyright (C) 2008-2009 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com>
14 * Copyright (C) 2009 Intel Corporation, <markus.t.metzger@intel.com>
15 *
16 * ppc:
17 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
18 *
19 * This file is subject to the terms and conditions of the GNU General Public
20 * License. See the file "COPYING" in the main directory of this archive
21 * for more details.
22 */
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/io.h>
26#include <linux/irq.h>
27#include <linux/perf_event.h>
28#include <asm/processor.h>
29
30struct cpu_hw_events {
31 struct perf_event *events[MAX_HWEVENTS];
32 unsigned long used_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
33 unsigned long active_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
34};
35
36DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
37
38static struct sh_pmu *sh_pmu __read_mostly;
39
40/* Number of perf_events counting hardware events */
41static atomic_t num_events;
42/* Used to avoid races in calling reserve/release_pmc_hardware */
43static DEFINE_MUTEX(pmc_reserve_mutex);
44
45/*
46 * Stub these out for now, do something more profound later.
47 */
48int reserve_pmc_hardware(void)
49{
50 return 0;
51}
52
53void release_pmc_hardware(void)
54{
55}
56
57static inline int sh_pmu_initialized(void)
58{
59 return !!sh_pmu;
60}
61
62/*
63 * Release the PMU if this is the last perf_event.
64 */
65static void hw_perf_event_destroy(struct perf_event *event)
66{
67 if (!atomic_add_unless(&num_events, -1, 1)) {
68 mutex_lock(&pmc_reserve_mutex);
69 if (atomic_dec_return(&num_events) == 0)
70 release_pmc_hardware();
71 mutex_unlock(&pmc_reserve_mutex);
72 }
73}
74
75static int hw_perf_cache_event(int config, int *evp)
76{
77 unsigned long type, op, result;
78 int ev;
79
80 if (!sh_pmu->cache_events)
81 return -EINVAL;
82
83 /* unpack config */
84 type = config & 0xff;
85 op = (config >> 8) & 0xff;
86 result = (config >> 16) & 0xff;
87
88 if (type >= PERF_COUNT_HW_CACHE_MAX ||
89 op >= PERF_COUNT_HW_CACHE_OP_MAX ||
90 result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
91 return -EINVAL;
92
93 ev = (*sh_pmu->cache_events)[type][op][result];
94 if (ev == 0)
95 return -EOPNOTSUPP;
96 if (ev == -1)
97 return -EINVAL;
98 *evp = ev;
99 return 0;
100}
101
102static int __hw_perf_event_init(struct perf_event *event)
103{
104 struct perf_event_attr *attr = &event->attr;
105 struct hw_perf_event *hwc = &event->hw;
106 int config = -1;
107 int err;
108
109 if (!sh_pmu_initialized())
110 return -ENODEV;
111
112 /*
113 * All of the on-chip counters are "limited", in that they have
114 * no interrupts, and are therefore unable to do sampling without
115 * further work and timer assistance.
116 */
117 if (hwc->sample_period)
118 return -EINVAL;
119
120 /*
121 * See if we need to reserve the counter.
122 *
123 * If no events are currently in use, then we have to take a
124 * mutex to ensure that we don't race with another task doing
125 * reserve_pmc_hardware or release_pmc_hardware.
126 */
127 err = 0;
128 if (!atomic_inc_not_zero(&num_events)) {
129 mutex_lock(&pmc_reserve_mutex);
130 if (atomic_read(&num_events) == 0 &&
131 reserve_pmc_hardware())
132 err = -EBUSY;
133 else
134 atomic_inc(&num_events);
135 mutex_unlock(&pmc_reserve_mutex);
136 }
137
138 if (err)
139 return err;
140
141 event->destroy = hw_perf_event_destroy;
142
143 switch (attr->type) {
144 case PERF_TYPE_RAW:
145 config = attr->config & sh_pmu->raw_event_mask;
146 break;
147 case PERF_TYPE_HW_CACHE:
148 err = hw_perf_cache_event(attr->config, &config);
149 if (err)
150 return err;
151 break;
152 case PERF_TYPE_HARDWARE:
153 if (attr->config >= sh_pmu->max_events)
154 return -EINVAL;
155
156 config = sh_pmu->event_map(attr->config);
157 break;
158 }
159
160 if (config == -1)
161 return -EINVAL;
162
163 hwc->config |= config;
164
165 return 0;
166}
167
168static void sh_perf_event_update(struct perf_event *event,
169 struct hw_perf_event *hwc, int idx)
170{
171 u64 prev_raw_count, new_raw_count;
172 s64 delta;
173 int shift = 0;
174
175 /*
176 * Depending on the counter configuration, they may or may not
177 * be chained, in which case the previous counter value can be
178 * updated underneath us if the lower-half overflows.
179 *
180 * Our tactic to handle this is to first atomically read and
181 * exchange a new raw count - then add that new-prev delta
182 * count to the generic counter atomically.
183 *
184 * As there is no interrupt associated with the overflow events,
185 * this is the simplest approach for maintaining consistency.
186 */
187again:
188 prev_raw_count = atomic64_read(&hwc->prev_count);
189 new_raw_count = sh_pmu->read(idx);
190
191 if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
192 new_raw_count) != prev_raw_count)
193 goto again;
194
195 /*
196 * Now we have the new raw value and have updated the prev
197 * timestamp already. We can now calculate the elapsed delta
198 * (counter-)time and add that to the generic counter.
199 *
200 * Careful, not all hw sign-extends above the physical width
201 * of the count.
202 */
203 delta = (new_raw_count << shift) - (prev_raw_count << shift);
204 delta >>= shift;
205
206 atomic64_add(delta, &event->count);
207}
208
209static void sh_pmu_disable(struct perf_event *event)
210{
211 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
212 struct hw_perf_event *hwc = &event->hw;
213 int idx = hwc->idx;
214
215 clear_bit(idx, cpuc->active_mask);
216 sh_pmu->disable(hwc, idx);
217
218 barrier();
219
220 sh_perf_event_update(event, &event->hw, idx);
221
222 cpuc->events[idx] = NULL;
223 clear_bit(idx, cpuc->used_mask);
224
225 perf_event_update_userpage(event);
226}
227
228static int sh_pmu_enable(struct perf_event *event)
229{
230 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
231 struct hw_perf_event *hwc = &event->hw;
232 int idx = hwc->idx;
233
234 if (test_and_set_bit(idx, cpuc->used_mask)) {
235 idx = find_first_zero_bit(cpuc->used_mask, sh_pmu->num_events);
236 if (idx == sh_pmu->num_events)
237 return -EAGAIN;
238
239 set_bit(idx, cpuc->used_mask);
240 hwc->idx = idx;
241 }
242
243 sh_pmu->disable(hwc, idx);
244
245 cpuc->events[idx] = event;
246 set_bit(idx, cpuc->active_mask);
247
248 sh_pmu->enable(hwc, idx);
249
250 perf_event_update_userpage(event);
251
252 return 0;
253}
254
255static void sh_pmu_read(struct perf_event *event)
256{
257 sh_perf_event_update(event, &event->hw, event->hw.idx);
258}
259
260static const struct pmu pmu = {
261 .enable = sh_pmu_enable,
262 .disable = sh_pmu_disable,
263 .read = sh_pmu_read,
264};
265
266const struct pmu *hw_perf_event_init(struct perf_event *event)
267{
268 int err = __hw_perf_event_init(event);
269 if (unlikely(err)) {
270 if (event->destroy)
271 event->destroy(event);
272 return ERR_PTR(err);
273 }
274
275 return &pmu;
276}
277
278void hw_perf_event_setup(int cpu)
279{
280 struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
281
282 memset(cpuhw, 0, sizeof(struct cpu_hw_events));
283}
284
285void hw_perf_enable(void)
286{
287 if (!sh_pmu_initialized())
288 return;
289
290 sh_pmu->enable_all();
291}
292
293void hw_perf_disable(void)
294{
295 if (!sh_pmu_initialized())
296 return;
297
298 sh_pmu->disable_all();
299}
300
301int register_sh_pmu(struct sh_pmu *pmu)
302{
303 if (sh_pmu)
304 return -EBUSY;
305 sh_pmu = pmu;
306
307 pr_info("Performance Events: %s support registered\n", pmu->name);
308
309 WARN_ON(pmu->num_events > MAX_HWEVENTS);
310
311 return 0;
312}
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 0673c4746be3..d8af889366a4 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -134,7 +134,10 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
134 regs.regs[5] = (unsigned long)fn; 134 regs.regs[5] = (unsigned long)fn;
135 135
136 regs.pc = (unsigned long)kernel_thread_helper; 136 regs.pc = (unsigned long)kernel_thread_helper;
137 regs.sr = (1 << 30); 137 regs.sr = SR_MD;
138#if defined(CONFIG_SH_FPU)
139 regs.sr |= SR_FD;
140#endif
138 141
139 /* Ok, create the new process.. */ 142 /* Ok, create the new process.. */
140 pid = do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, 143 pid = do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
@@ -142,6 +145,7 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
142 145
143 return pid; 146 return pid;
144} 147}
148EXPORT_SYMBOL(kernel_thread);
145 149
146/* 150/*
147 * Free current thread data structures etc.. 151 * Free current thread data structures etc..
@@ -186,6 +190,16 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
186 190
187 return fpvalid; 191 return fpvalid;
188} 192}
193EXPORT_SYMBOL(dump_fpu);
194
195/*
196 * This gets called before we allocate a new thread and copy
197 * the current task into it.
198 */
199void prepare_to_copy(struct task_struct *tsk)
200{
201 unlazy_fpu(tsk, task_pt_regs(tsk));
202}
189 203
190asmlinkage void ret_from_fork(void); 204asmlinkage void ret_from_fork(void);
191 205
@@ -195,16 +209,10 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
195{ 209{
196 struct thread_info *ti = task_thread_info(p); 210 struct thread_info *ti = task_thread_info(p);
197 struct pt_regs *childregs; 211 struct pt_regs *childregs;
198#if defined(CONFIG_SH_FPU) || defined(CONFIG_SH_DSP) 212#if defined(CONFIG_SH_DSP)
199 struct task_struct *tsk = current; 213 struct task_struct *tsk = current;
200#endif 214#endif
201 215
202#if defined(CONFIG_SH_FPU)
203 unlazy_fpu(tsk, regs);
204 p->thread.fpu = tsk->thread.fpu;
205 copy_to_stopped_child_used_math(p);
206#endif
207
208#if defined(CONFIG_SH_DSP) 216#if defined(CONFIG_SH_DSP)
209 if (is_dsp_enabled(tsk)) { 217 if (is_dsp_enabled(tsk)) {
210 /* We can use the __save_dsp or just copy the struct: 218 /* We can use the __save_dsp or just copy the struct:
@@ -224,6 +232,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
224 } else { 232 } else {
225 childregs->regs[15] = (unsigned long)childregs; 233 childregs->regs[15] = (unsigned long)childregs;
226 ti->addr_limit = KERNEL_DS; 234 ti->addr_limit = KERNEL_DS;
235 ti->status &= ~TS_USEDFPU;
236 p->fpu_counter = 0;
227 } 237 }
228 238
229 if (clone_flags & CLONE_SETTLS) 239 if (clone_flags & CLONE_SETTLS)
@@ -288,9 +298,13 @@ static void ubc_set_tracing(int asid, unsigned long pc)
288__notrace_funcgraph struct task_struct * 298__notrace_funcgraph struct task_struct *
289__switch_to(struct task_struct *prev, struct task_struct *next) 299__switch_to(struct task_struct *prev, struct task_struct *next)
290{ 300{
291#if defined(CONFIG_SH_FPU) 301 struct thread_struct *next_t = &next->thread;
302
292 unlazy_fpu(prev, task_pt_regs(prev)); 303 unlazy_fpu(prev, task_pt_regs(prev));
293#endif 304
305 /* we're going to use this soon, after a few expensive things */
306 if (next->fpu_counter > 5)
307 prefetch(&next_t->fpu.hard);
294 308
295#ifdef CONFIG_MMU 309#ifdef CONFIG_MMU
296 /* 310 /*
@@ -321,6 +335,14 @@ __switch_to(struct task_struct *prev, struct task_struct *next)
321#endif 335#endif
322 } 336 }
323 337
338 /*
339 * If the task has used fpu the last 5 timeslices, just do a full
340 * restore of the math state immediately to avoid the trap; the
341 * chances of needing FPU soon are obviously high now
342 */
343 if (next->fpu_counter > 5)
344 fpu_state_restore(task_pt_regs(next));
345
324 return prev; 346 return prev;
325} 347}
326 348
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 1192398ef582..359b8a2f4d2e 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -335,6 +335,7 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
335 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, 335 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
336 &regs, 0, NULL, NULL); 336 &regs, 0, NULL, NULL);
337} 337}
338EXPORT_SYMBOL(kernel_thread);
338 339
339/* 340/*
340 * Free current thread data structures etc.. 341 * Free current thread data structures etc..
@@ -417,6 +418,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
417 return 0; /* Task didn't use the fpu at all. */ 418 return 0; /* Task didn't use the fpu at all. */
418#endif 419#endif
419} 420}
421EXPORT_SYMBOL(dump_fpu);
420 422
421asmlinkage void ret_from_fork(void); 423asmlinkage void ret_from_fork(void);
422 424
diff --git a/arch/sh/kernel/return_address.c b/arch/sh/kernel/return_address.c
new file mode 100644
index 000000000000..df3ab5811074
--- /dev/null
+++ b/arch/sh/kernel/return_address.c
@@ -0,0 +1,54 @@
1/*
2 * arch/sh/kernel/return_address.c
3 *
4 * Copyright (C) 2009 Matt Fleming
5 * Copyright (C) 2009 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/kernel.h>
12#include <asm/dwarf.h>
13
14#ifdef CONFIG_DWARF_UNWINDER
15
16void *return_address(unsigned int depth)
17{
18 struct dwarf_frame *frame;
19 unsigned long ra;
20 int i;
21
22 for (i = 0, frame = NULL, ra = 0; i <= depth; i++) {
23 struct dwarf_frame *tmp;
24
25 tmp = dwarf_unwind_stack(ra, frame);
26
27 if (frame)
28 dwarf_free_frame(frame);
29
30 frame = tmp;
31
32 if (!frame || !frame->return_addr)
33 break;
34
35 ra = frame->return_addr;
36 }
37
38 /* Failed to unwind the stack to the specified depth. */
39 WARN_ON(i != depth + 1);
40
41 if (frame)
42 dwarf_free_frame(frame);
43
44 return (void *)ra;
45}
46
47#else
48
49void *return_address(unsigned int depth)
50{
51 return NULL;
52}
53
54#endif
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 99b4fb553bf1..5a947a2567e4 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -453,6 +453,10 @@ void __init setup_arch(char **cmdline_p)
453 453
454 paging_init(); 454 paging_init();
455 455
456#ifdef CONFIG_PMB_ENABLE
457 pmb_init();
458#endif
459
456#ifdef CONFIG_SMP 460#ifdef CONFIG_SMP
457 plat_smp_setup(); 461 plat_smp_setup();
458#endif 462#endif
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 444cce3ae921..3896f26efa4a 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -1,37 +1,11 @@
1#include <linux/module.h> 1#include <linux/module.h>
2#include <linux/smp.h> 2#include <linux/string.h>
3#include <linux/user.h> 3#include <linux/uaccess.h>
4#include <linux/elfcore.h> 4#include <linux/delay.h>
5#include <linux/sched.h> 5#include <linux/mm.h>
6#include <linux/in6.h>
7#include <linux/interrupt.h>
8#include <linux/vmalloc.h>
9#include <linux/pci.h>
10#include <linux/irq.h>
11#include <asm/sections.h>
12#include <asm/processor.h>
13#include <asm/uaccess.h>
14#include <asm/checksum.h> 6#include <asm/checksum.h>
15#include <asm/io.h> 7#include <asm/sections.h>
16#include <asm/delay.h>
17#include <asm/tlbflush.h>
18#include <asm/cacheflush.h>
19#include <asm/ftrace.h>
20
21extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
22
23/* platform dependent support */
24EXPORT_SYMBOL(dump_fpu);
25EXPORT_SYMBOL(kernel_thread);
26EXPORT_SYMBOL(strlen);
27
28/* PCI exports */
29#ifdef CONFIG_PCI
30EXPORT_SYMBOL(pci_alloc_consistent);
31EXPORT_SYMBOL(pci_free_consistent);
32#endif
33 8
34/* mem exports */
35EXPORT_SYMBOL(memchr); 9EXPORT_SYMBOL(memchr);
36EXPORT_SYMBOL(memcpy); 10EXPORT_SYMBOL(memcpy);
37EXPORT_SYMBOL(memset); 11EXPORT_SYMBOL(memset);
@@ -40,6 +14,13 @@ EXPORT_SYMBOL(__copy_user);
40EXPORT_SYMBOL(__udelay); 14EXPORT_SYMBOL(__udelay);
41EXPORT_SYMBOL(__ndelay); 15EXPORT_SYMBOL(__ndelay);
42EXPORT_SYMBOL(__const_udelay); 16EXPORT_SYMBOL(__const_udelay);
17EXPORT_SYMBOL(strlen);
18EXPORT_SYMBOL(csum_partial);
19EXPORT_SYMBOL(csum_partial_copy_generic);
20EXPORT_SYMBOL(copy_page);
21EXPORT_SYMBOL(__clear_user);
22EXPORT_SYMBOL(_ebss);
23EXPORT_SYMBOL(empty_zero_page);
43 24
44#define DECLARE_EXPORT(name) \ 25#define DECLARE_EXPORT(name) \
45 extern void name(void);EXPORT_SYMBOL(name) 26 extern void name(void);EXPORT_SYMBOL(name)
@@ -107,30 +88,6 @@ DECLARE_EXPORT(__sdivsi3_i4);
107DECLARE_EXPORT(__udivsi3_i4); 88DECLARE_EXPORT(__udivsi3_i4);
108DECLARE_EXPORT(__sdivsi3_i4i); 89DECLARE_EXPORT(__sdivsi3_i4i);
109DECLARE_EXPORT(__udivsi3_i4i); 90DECLARE_EXPORT(__udivsi3_i4i);
110
111#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
112 defined(CONFIG_SH7705_CACHE_32KB))
113/* needed by some modules */
114EXPORT_SYMBOL(flush_cache_all);
115EXPORT_SYMBOL(flush_cache_range);
116EXPORT_SYMBOL(flush_dcache_page);
117#endif
118
119#ifdef CONFIG_MCOUNT 91#ifdef CONFIG_MCOUNT
120DECLARE_EXPORT(mcount); 92DECLARE_EXPORT(mcount);
121#endif 93#endif
122EXPORT_SYMBOL(csum_partial);
123EXPORT_SYMBOL(csum_partial_copy_generic);
124#ifdef CONFIG_IPV6
125EXPORT_SYMBOL(csum_ipv6_magic);
126#endif
127EXPORT_SYMBOL(copy_page);
128EXPORT_SYMBOL(__clear_user);
129EXPORT_SYMBOL(_ebss);
130EXPORT_SYMBOL(empty_zero_page);
131
132#ifndef CONFIG_CACHE_OFF
133EXPORT_SYMBOL(__flush_purge_region);
134EXPORT_SYMBOL(__flush_wback_region);
135EXPORT_SYMBOL(__flush_invalidate_region);
136#endif
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index d008e17eb257..45afa5c51f67 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -24,16 +24,6 @@
24#include <asm/delay.h> 24#include <asm/delay.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26 26
27extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
28
29/* platform dependent support */
30EXPORT_SYMBOL(dump_fpu);
31EXPORT_SYMBOL(kernel_thread);
32
33#ifdef CONFIG_VT
34EXPORT_SYMBOL(screen_info);
35#endif
36
37EXPORT_SYMBOL(__put_user_asm_b); 27EXPORT_SYMBOL(__put_user_asm_b);
38EXPORT_SYMBOL(__put_user_asm_w); 28EXPORT_SYMBOL(__put_user_asm_w);
39EXPORT_SYMBOL(__put_user_asm_l); 29EXPORT_SYMBOL(__put_user_asm_l);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 3db37425210d..12815ce01ecd 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -67,7 +67,8 @@ sys_sigsuspend(old_sigset_t mask,
67 67
68 current->state = TASK_INTERRUPTIBLE; 68 current->state = TASK_INTERRUPTIBLE;
69 schedule(); 69 schedule();
70 set_thread_flag(TIF_RESTORE_SIGMASK); 70 set_restore_sigmask();
71
71 return -ERESTARTNOHAND; 72 return -ERESTARTNOHAND;
72} 73}
73 74
@@ -590,7 +591,7 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
590 if (try_to_freeze()) 591 if (try_to_freeze())
591 goto no_signal; 592 goto no_signal;
592 593
593 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 594 if (current_thread_info()->status & TS_RESTORE_SIGMASK)
594 oldset = &current->saved_sigmask; 595 oldset = &current->saved_sigmask;
595 else 596 else
596 oldset = &current->blocked; 597 oldset = &current->blocked;
@@ -602,12 +603,13 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
602 /* Whee! Actually deliver the signal. */ 603 /* Whee! Actually deliver the signal. */
603 if (handle_signal(signr, &ka, &info, oldset, 604 if (handle_signal(signr, &ka, &info, oldset,
604 regs, save_r0) == 0) { 605 regs, save_r0) == 0) {
605 /* a signal was successfully delivered; the saved 606 /*
607 * A signal was successfully delivered; the saved
606 * sigmask will have been stored in the signal frame, 608 * sigmask will have been stored in the signal frame,
607 * and will be restored by sigreturn, so we can simply 609 * and will be restored by sigreturn, so we can simply
608 * clear the TIF_RESTORE_SIGMASK flag */ 610 * clear the TS_RESTORE_SIGMASK flag
609 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 611 */
610 clear_thread_flag(TIF_RESTORE_SIGMASK); 612 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
611 613
612 tracehook_signal_handler(signr, &info, &ka, regs, 614 tracehook_signal_handler(signr, &info, &ka, regs,
613 test_thread_flag(TIF_SINGLESTEP)); 615 test_thread_flag(TIF_SINGLESTEP));
@@ -631,10 +633,12 @@ no_signal:
631 } 633 }
632 } 634 }
633 635
634 /* if there's no signal to deliver, we just put the saved sigmask 636 /*
635 * back */ 637 * If there's no signal to deliver, we just put the saved sigmask
636 if (test_thread_flag(TIF_RESTORE_SIGMASK)) { 638 * back.
637 clear_thread_flag(TIF_RESTORE_SIGMASK); 639 */
640 if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
641 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
638 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 642 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
639 } 643 }
640} 644}
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 74793c80a57a..feb3dddd3192 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -101,7 +101,7 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)
101 if (try_to_freeze()) 101 if (try_to_freeze())
102 goto no_signal; 102 goto no_signal;
103 103
104 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 104 if (current_thread_info()->status & TS_RESTORE_SIGMASK)
105 oldset = &current->saved_sigmask; 105 oldset = &current->saved_sigmask;
106 else if (!oldset) 106 else if (!oldset)
107 oldset = &current->blocked; 107 oldset = &current->blocked;
@@ -115,11 +115,9 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)
115 /* 115 /*
116 * If a signal was successfully delivered, the 116 * If a signal was successfully delivered, the
117 * saved sigmask is in its frame, and we can 117 * saved sigmask is in its frame, and we can
118 * clear the TIF_RESTORE_SIGMASK flag. 118 * clear the TS_RESTORE_SIGMASK flag.
119 */ 119 */
120 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 120 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
121 clear_thread_flag(TIF_RESTORE_SIGMASK);
122
123 tracehook_signal_handler(signr, &info, &ka, regs, 0); 121 tracehook_signal_handler(signr, &info, &ka, regs, 0);
124 return 1; 122 return 1;
125 } 123 }
@@ -146,8 +144,8 @@ no_signal:
146 } 144 }
147 145
148 /* No signal to deliver -- put the saved sigmask back */ 146 /* No signal to deliver -- put the saved sigmask back */
149 if (test_thread_flag(TIF_RESTORE_SIGMASK)) { 147 if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
150 clear_thread_flag(TIF_RESTORE_SIGMASK); 148 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
151 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 149 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
152 } 150 }
153 151
@@ -176,6 +174,7 @@ sys_sigsuspend(old_sigset_t mask,
176 while (1) { 174 while (1) {
177 current->state = TASK_INTERRUPTIBLE; 175 current->state = TASK_INTERRUPTIBLE;
178 schedule(); 176 schedule();
177 set_restore_sigmask();
179 regs->pc += 4; /* because sys_sigreturn decrements the pc */ 178 regs->pc += 4; /* because sys_sigreturn decrements the pc */
180 if (do_signal(regs, &saveset)) { 179 if (do_signal(regs, &saveset)) {
181 /* pc now points at signal handler. Need to decrement 180 /* pc now points at signal handler. Need to decrement
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 160db1003cfb..983e0792d5f3 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -122,7 +122,9 @@ int __cpuinit __cpu_up(unsigned int cpu)
122 stack_start.bss_start = 0; /* don't clear bss for secondary cpus */ 122 stack_start.bss_start = 0; /* don't clear bss for secondary cpus */
123 stack_start.start_kernel_fn = start_secondary; 123 stack_start.start_kernel_fn = start_secondary;
124 124
125 flush_cache_all(); 125 flush_icache_range((unsigned long)&stack_start,
126 (unsigned long)&stack_start + sizeof(stack_start));
127 wmb();
126 128
127 plat_start_cpu(cpu, (unsigned long)_stext); 129 plat_start_cpu(cpu, (unsigned long)_stext);
128 130
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 8aa5d1ceaf14..71399cde03b5 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -28,37 +28,13 @@
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include <asm/cachectl.h> 29#include <asm/cachectl.h>
30 30
31static inline long
32do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
33 unsigned long flags, int fd, unsigned long pgoff)
34{
35 int error = -EBADF;
36 struct file *file = NULL;
37
38 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
39 if (!(flags & MAP_ANONYMOUS)) {
40 file = fget(fd);
41 if (!file)
42 goto out;
43 }
44
45 down_write(&current->mm->mmap_sem);
46 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
47 up_write(&current->mm->mmap_sem);
48
49 if (file)
50 fput(file);
51out:
52 return error;
53}
54
55asmlinkage int old_mmap(unsigned long addr, unsigned long len, 31asmlinkage int old_mmap(unsigned long addr, unsigned long len,
56 unsigned long prot, unsigned long flags, 32 unsigned long prot, unsigned long flags,
57 int fd, unsigned long off) 33 int fd, unsigned long off)
58{ 34{
59 if (off & ~PAGE_MASK) 35 if (off & ~PAGE_MASK)
60 return -EINVAL; 36 return -EINVAL;
61 return do_mmap2(addr, len, prot, flags, fd, off>>PAGE_SHIFT); 37 return sys_mmap_pgoff(addr, len, prot, flags, fd, off>>PAGE_SHIFT);
62} 38}
63 39
64asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 40asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
@@ -74,7 +50,7 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
74 50
75 pgoff >>= PAGE_SHIFT - 12; 51 pgoff >>= PAGE_SHIFT - 12;
76 52
77 return do_mmap2(addr, len, prot, flags, fd, pgoff); 53 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
78} 54}
79 55
80/* 56/*
diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c
index 0838942b7083..9b0b633b6c92 100644
--- a/arch/sh/kernel/topology.c
+++ b/arch/sh/kernel/topology.c
@@ -16,6 +16,32 @@
16 16
17static DEFINE_PER_CPU(struct cpu, cpu_devices); 17static DEFINE_PER_CPU(struct cpu, cpu_devices);
18 18
19cpumask_t cpu_core_map[NR_CPUS];
20
21static cpumask_t cpu_coregroup_map(unsigned int cpu)
22{
23 /*
24 * Presently all SH-X3 SMP cores are multi-cores, so just keep it
25 * simple until we have a method for determining topology..
26 */
27 return cpu_possible_map;
28}
29
30const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
31{
32 return &cpu_core_map[cpu];
33}
34
35int arch_update_cpu_topology(void)
36{
37 unsigned int cpu;
38
39 for_each_possible_cpu(cpu)
40 cpu_core_map[cpu] = cpu_coregroup_map(cpu);
41
42 return 0;
43}
44
19static int __init topology_init(void) 45static int __init topology_init(void)
20{ 46{
21 int i, ret; 47 int i, ret;
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index a8396f36bd14..7b036339dc92 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -9,8 +9,8 @@
9#include <asm/unwinder.h> 9#include <asm/unwinder.h>
10#include <asm/system.h> 10#include <asm/system.h>
11 11
12#ifdef CONFIG_BUG 12#ifdef CONFIG_GENERIC_BUG
13void handle_BUG(struct pt_regs *regs) 13static void handle_BUG(struct pt_regs *regs)
14{ 14{
15 const struct bug_entry *bug; 15 const struct bug_entry *bug;
16 unsigned long bugaddr = regs->pc; 16 unsigned long bugaddr = regs->pc;
@@ -81,7 +81,7 @@ BUILD_TRAP_HANDLER(bug)
81 SIGTRAP) == NOTIFY_STOP) 81 SIGTRAP) == NOTIFY_STOP)
82 return; 82 return;
83 83
84#ifdef CONFIG_BUG 84#ifdef CONFIG_GENERIC_BUG
85 if (__kernel_text_address(instruction_pointer(regs))) { 85 if (__kernel_text_address(instruction_pointer(regs))) {
86 insn_size_t insn = *(insn_size_t *)instruction_pointer(regs); 86 insn_size_t insn = *(insn_size_t *)instruction_pointer(regs);
87 if (insn == TRAPA_BUG_OPCODE) 87 if (insn == TRAPA_BUG_OPCODE)
@@ -95,9 +95,11 @@ BUILD_TRAP_HANDLER(bug)
95 95
96BUILD_TRAP_HANDLER(nmi) 96BUILD_TRAP_HANDLER(nmi)
97{ 97{
98 unsigned int cpu = smp_processor_id();
98 TRAP_HANDLER_DECL; 99 TRAP_HANDLER_DECL;
99 100
100 nmi_enter(); 101 nmi_enter();
102 nmi_count(cpu)++;
101 103
102 switch (notify_die(DIE_NMI, "NMI", regs, 0, vec & 0xff, SIGINT)) { 104 switch (notify_die(DIE_NMI, "NMI", regs, 0, vec & 0xff, SIGINT)) {
103 case NOTIFY_OK: 105 case NOTIFY_OK:
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 7a2ee3a6b8e7..3da5a125d884 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -25,6 +25,7 @@
25#include <linux/kexec.h> 25#include <linux/kexec.h>
26#include <linux/limits.h> 26#include <linux/limits.h>
27#include <linux/proc_fs.h> 27#include <linux/proc_fs.h>
28#include <linux/seq_file.h>
28#include <linux/sysfs.h> 29#include <linux/sysfs.h>
29#include <asm/system.h> 30#include <asm/system.h>
30#include <asm/uaccess.h> 31#include <asm/uaccess.h>
@@ -68,61 +69,49 @@ static const char *se_usermode_action[] = {
68 "signal+warn" 69 "signal+warn"
69}; 70};
70 71
71static int 72static int alignment_proc_show(struct seq_file *m, void *v)
72proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
73 void *data)
74{ 73{
75 char *p = page; 74 seq_printf(m, "User:\t\t%lu\n", se_user);
76 int len; 75 seq_printf(m, "System:\t\t%lu\n", se_sys);
77 76 seq_printf(m, "Half:\t\t%lu\n", se_half);
78 p += sprintf(p, "User:\t\t%lu\n", se_user); 77 seq_printf(m, "Word:\t\t%lu\n", se_word);
79 p += sprintf(p, "System:\t\t%lu\n", se_sys); 78 seq_printf(m, "DWord:\t\t%lu\n", se_dword);
80 p += sprintf(p, "Half:\t\t%lu\n", se_half); 79 seq_printf(m, "Multi:\t\t%lu\n", se_multi);
81 p += sprintf(p, "Word:\t\t%lu\n", se_word); 80 seq_printf(m, "User faults:\t%i (%s)\n", se_usermode,
82 p += sprintf(p, "DWord:\t\t%lu\n", se_dword);
83 p += sprintf(p, "Multi:\t\t%lu\n", se_multi);
84 p += sprintf(p, "User faults:\t%i (%s)\n", se_usermode,
85 se_usermode_action[se_usermode]); 81 se_usermode_action[se_usermode]);
86 p += sprintf(p, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn, 82 seq_printf(m, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
87 se_kernmode_warn ? "+warn" : ""); 83 se_kernmode_warn ? "+warn" : "");
88 84 return 0;
89 len = (p - page) - off;
90 if (len < 0)
91 len = 0;
92
93 *eof = (len <= count) ? 1 : 0;
94 *start = page + off;
95
96 return len;
97} 85}
98 86
99static int proc_alignment_write(struct file *file, const char __user *buffer, 87static int alignment_proc_open(struct inode *inode, struct file *file)
100 unsigned long count, void *data)
101{ 88{
102 char mode; 89 return single_open(file, alignment_proc_show, NULL);
103
104 if (count > 0) {
105 if (get_user(mode, buffer))
106 return -EFAULT;
107 if (mode >= '0' && mode <= '5')
108 se_usermode = mode - '0';
109 }
110 return count;
111} 90}
112 91
113static int proc_alignment_kern_write(struct file *file, const char __user *buffer, 92static ssize_t alignment_proc_write(struct file *file,
114 unsigned long count, void *data) 93 const char __user *buffer, size_t count, loff_t *pos)
115{ 94{
95 int *data = PDE(file->f_path.dentry->d_inode)->data;
116 char mode; 96 char mode;
117 97
118 if (count > 0) { 98 if (count > 0) {
119 if (get_user(mode, buffer)) 99 if (get_user(mode, buffer))
120 return -EFAULT; 100 return -EFAULT;
121 if (mode >= '0' && mode <= '1') 101 if (mode >= '0' && mode <= '5')
122 se_kernmode_warn = mode - '0'; 102 *data = mode - '0';
123 } 103 }
124 return count; 104 return count;
125} 105}
106
107static const struct file_operations alignment_proc_fops = {
108 .owner = THIS_MODULE,
109 .open = alignment_proc_open,
110 .read = seq_read,
111 .llseek = seq_lseek,
112 .release = single_release,
113 .write = alignment_proc_write,
114};
126#endif 115#endif
127 116
128static void dump_mem(const char *str, unsigned long bottom, unsigned long top) 117static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
@@ -945,14 +934,9 @@ void __init trap_init(void)
945 set_exception_table_evt(0x800, do_reserved_inst); 934 set_exception_table_evt(0x800, do_reserved_inst);
946 set_exception_table_evt(0x820, do_illegal_slot_inst); 935 set_exception_table_evt(0x820, do_illegal_slot_inst);
947#elif defined(CONFIG_SH_FPU) 936#elif defined(CONFIG_SH_FPU)
948#ifdef CONFIG_CPU_SUBTYPE_SHX3
949 set_exception_table_evt(0xd80, fpu_state_restore_trap_handler);
950 set_exception_table_evt(0xda0, fpu_state_restore_trap_handler);
951#else
952 set_exception_table_evt(0x800, fpu_state_restore_trap_handler); 937 set_exception_table_evt(0x800, fpu_state_restore_trap_handler);
953 set_exception_table_evt(0x820, fpu_state_restore_trap_handler); 938 set_exception_table_evt(0x820, fpu_state_restore_trap_handler);
954#endif 939#endif
955#endif
956 940
957#ifdef CONFIG_CPU_SH2 941#ifdef CONFIG_CPU_SH2
958 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler); 942 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler);
@@ -1011,20 +995,16 @@ static int __init alignment_init(void)
1011 if (!dir) 995 if (!dir)
1012 return -ENOMEM; 996 return -ENOMEM;
1013 997
1014 res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, dir); 998 res = proc_create_data("alignment", S_IWUSR | S_IRUGO, dir,
999 &alignment_proc_fops, &se_usermode);
1015 if (!res) 1000 if (!res)
1016 return -ENOMEM; 1001 return -ENOMEM;
1017 1002
1018 res->read_proc = proc_alignment_read; 1003 res = proc_create_data("kernel_alignment", S_IWUSR | S_IRUGO, dir,
1019 res->write_proc = proc_alignment_write; 1004 &alignment_proc_fops, &se_kernmode_warn);
1020
1021 res = create_proc_entry("kernel_alignment", S_IWUSR | S_IRUGO, dir);
1022 if (!res) 1005 if (!res)
1023 return -ENOMEM; 1006 return -ENOMEM;
1024 1007
1025 res->read_proc = proc_alignment_read;
1026 res->write_proc = proc_alignment_kern_write;
1027
1028 return 0; 1008 return 0;
1029} 1009}
1030 1010
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index a969b47c5463..dab4d2129812 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -2,7 +2,7 @@
2# Makefile for SuperH-specific library files.. 2# Makefile for SuperH-specific library files..
3# 3#
4 4
5lib-y = delay.o memset.o memmove.o memchr.o \ 5lib-y = delay.o memmove.o memchr.o \
6 checksum.o strlen.o div64.o div64-generic.o 6 checksum.o strlen.o div64.o div64-generic.o
7 7
8# Extracted from libgcc 8# Extracted from libgcc
@@ -23,8 +23,11 @@ obj-y += io.o
23memcpy-y := memcpy.o 23memcpy-y := memcpy.o
24memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o 24memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o
25 25
26memset-y := memset.o
27memset-$(CONFIG_CPU_SH4) := memset-sh4.o
28
26lib-$(CONFIG_MMU) += copy_page.o __clear_user.o 29lib-$(CONFIG_MMU) += copy_page.o __clear_user.o
27lib-$(CONFIG_MCOUNT) += mcount.o 30lib-$(CONFIG_MCOUNT) += mcount.o
28lib-y += $(memcpy-y) $(udivsi3-y) 31lib-y += $(memcpy-y) $(memset-y) $(udivsi3-y)
29 32
30EXTRA_CFLAGS += -Werror 33EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/lib/memset-sh4.S b/arch/sh/lib/memset-sh4.S
new file mode 100644
index 000000000000..1a6e32cc4e4d
--- /dev/null
+++ b/arch/sh/lib/memset-sh4.S
@@ -0,0 +1,107 @@
1/*
2 * "memset" implementation for SH4
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (c) 2009 STMicroelectronics Limited
6 * Author: Stuart Menefy <stuart.menefy:st.com>
7 */
8
9/*
10 * void *memset(void *s, int c, size_t n);
11 */
12
13#include <linux/linkage.h>
14
15ENTRY(memset)
16 mov #12,r0
17 add r6,r4
18 cmp/gt r6,r0
19 bt/s 40f ! if it's too small, set a byte at once
20 mov r4,r0
21 and #3,r0
22 cmp/eq #0,r0
23 bt/s 2f ! It's aligned
24 sub r0,r6
251:
26 dt r0
27 bf/s 1b
28 mov.b r5,@-r4
292: ! make VVVV
30 extu.b r5,r5
31 swap.b r5,r0 ! V0
32 or r0,r5 ! VV
33 swap.w r5,r0 ! VV00
34 or r0,r5 ! VVVV
35
36 ! Check if enough bytes need to be copied to be worth the big loop
37 mov #0x40, r0 ! (MT)
38 cmp/gt r6,r0 ! (MT) 64 > len => slow loop
39
40 bt/s 22f
41 mov r6,r0
42
43 ! align the dst to the cache block size if necessary
44 mov r4, r3
45 mov #~(0x1f), r1
46
47 and r3, r1
48 cmp/eq r3, r1
49
50 bt/s 11f ! dst is already aligned
51 sub r1, r3 ! r3-r1 -> r3
52 shlr2 r3 ! number of loops
53
5410: mov.l r5,@-r4
55 dt r3
56 bf/s 10b
57 add #-4, r6
58
5911: ! dst is 32byte aligned
60 mov r6,r2
61 mov #-5,r0
62 shld r0,r2 ! number of loops
63
64 add #-32, r4
65 mov r5, r0
6612:
67 movca.l r0,@r4
68 mov.l r5,@(4, r4)
69 mov.l r5,@(8, r4)
70 mov.l r5,@(12,r4)
71 mov.l r5,@(16,r4)
72 mov.l r5,@(20,r4)
73 add #-0x20, r6
74 mov.l r5,@(24,r4)
75 dt r2
76 mov.l r5,@(28,r4)
77 bf/s 12b
78 add #-32, r4
79
80 add #32, r4
81 mov #8, r0
82 cmp/ge r0, r6
83 bf 40f
84
85 mov r6,r0
8622:
87 shlr2 r0
88 shlr r0 ! r0 = r6 >> 3
893:
90 dt r0
91 mov.l r5,@-r4 ! set 8-byte at once
92 bf/s 3b
93 mov.l r5,@-r4
94 !
95 mov #7,r0
96 and r0,r6
97
98 ! fill bytes (length may be zero)
9940: tst r6,r6
100 bt 5f
1014:
102 dt r6
103 bf/s 4b
104 mov.b r5,@-r4
1055:
106 rts
107 mov r4,r0
diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c
index ac2d7abd2567..d6c15cae0912 100644
--- a/arch/sh/math-emu/math.c
+++ b/arch/sh/math-emu/math.c
@@ -558,7 +558,7 @@ static int ieee_fpe_handler(struct pt_regs *regs)
558 (finsn >> 8) & 0xf); 558 (finsn >> 8) & 0xf);
559 tsk->thread.fpu.hard.fpscr &= 559 tsk->thread.fpu.hard.fpscr &=
560 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 560 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
561 set_tsk_thread_flag(tsk, TIF_USEDFPU); 561 task_thread_info(tsk)->status |= TS_USEDFPU;
562 } else { 562 } else {
563 info.si_signo = SIGFPE; 563 info.si_signo = SIGFPE;
564 info.si_errno = 0; 564 info.si_errno = 0;
@@ -619,10 +619,10 @@ int do_fpu_inst(unsigned short inst, struct pt_regs *regs)
619 struct task_struct *tsk = current; 619 struct task_struct *tsk = current;
620 struct sh_fpu_soft_struct *fpu = &(tsk->thread.fpu.soft); 620 struct sh_fpu_soft_struct *fpu = &(tsk->thread.fpu.soft);
621 621
622 if (!test_tsk_thread_flag(tsk, TIF_USEDFPU)) { 622 if (!(task_thread_info(tsk)->status & TS_USEDFPU)) {
623 /* initialize once. */ 623 /* initialize once. */
624 fpu_init(fpu); 624 fpu_init(fpu);
625 set_tsk_thread_flag(tsk, TIF_USEDFPU); 625 task_thread_info(tsk)->status |= TS_USEDFPU;
626 } 626 }
627 627
628 return fpu_emulate(inst, fpu, regs); 628 return fpu_emulate(inst, fpu, regs);
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 7f7b52f9beba..0e7ba8e891cf 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -82,8 +82,7 @@ config 32BIT
82 82
83config PMB_ENABLE 83config PMB_ENABLE
84 bool "Support 32-bit physical addressing through PMB" 84 bool "Support 32-bit physical addressing through PMB"
85 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) 85 depends on MMU && EXPERIMENTAL && CPU_SH4A
86 select 32BIT
87 default y 86 default y
88 help 87 help
89 If you say Y here, physical addressing will be extended to 88 If you say Y here, physical addressing will be extended to
@@ -97,8 +96,7 @@ choice
97 96
98config PMB 97config PMB
99 bool "PMB" 98 bool "PMB"
100 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) 99 depends on MMU && EXPERIMENTAL && CPU_SH4A
101 select 32BIT
102 help 100 help
103 If you say Y here, physical addressing will be extended to 101 If you say Y here, physical addressing will be extended to
104 32-bits through the SH-4A PMB. If this is not set, legacy 102 32-bits through the SH-4A PMB. If this is not set, legacy
@@ -106,9 +104,7 @@ config PMB
106 104
107config PMB_FIXED 105config PMB_FIXED
108 bool "fixed PMB" 106 bool "fixed PMB"
109 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || \ 107 depends on MMU && EXPERIMENTAL && CPU_SH4A
110 CPU_SUBTYPE_SH7780 || \
111 CPU_SUBTYPE_SH7785)
112 select 32BIT 108 select 32BIT
113 help 109 help
114 If this option is enabled, fixed PMB mappings are inherited 110 If this option is enabled, fixed PMB mappings are inherited
@@ -258,6 +254,15 @@ endchoice
258 254
259source "mm/Kconfig" 255source "mm/Kconfig"
260 256
257config SCHED_MC
258 bool "Multi-core scheduler support"
259 depends on SMP
260 default y
261 help
262 Multi-core scheduler support improves the CPU scheduler's decision
263 making when dealing with multi-core CPU chips at a cost of slightly
264 increased overhead in some places. If unsure say N here.
265
261endmenu 266endmenu
262 267
263menu "Cache configuration" 268menu "Cache configuration"
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index 3759bf853293..8a70535fa7ce 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -33,8 +33,7 @@ obj-y += $(tlb-y)
33endif 33endif
34 34
35obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 35obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
36obj-$(CONFIG_PMB) += pmb.o 36obj-$(CONFIG_PMB_ENABLE) += pmb.o
37obj-$(CONFIG_PMB_FIXED) += pmb-fixed.o
38obj-$(CONFIG_NUMA) += numa.o 37obj-$(CONFIG_NUMA) += numa.o
39 38
40# Special flags for fault_64.o. This puts restrictions on the number of 39# Special flags for fault_64.o. This puts restrictions on the number of
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index b7f235c74d66..f36a08bf3d5c 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -2,7 +2,7 @@
2 * arch/sh/mm/cache-sh4.c 2 * arch/sh/mm/cache-sh4.c
3 * 3 *
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2001 - 2007 Paul Mundt 5 * Copyright (C) 2001 - 2009 Paul Mundt
6 * Copyright (C) 2003 Richard Curnow 6 * Copyright (C) 2003 Richard Curnow
7 * Copyright (c) 2007 STMicroelectronics (R&D) Ltd. 7 * Copyright (c) 2007 STMicroelectronics (R&D) Ltd.
8 * 8 *
@@ -15,6 +15,8 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/mutex.h> 16#include <linux/mutex.h>
17#include <linux/fs.h> 17#include <linux/fs.h>
18#include <linux/highmem.h>
19#include <asm/pgtable.h>
18#include <asm/mmu_context.h> 20#include <asm/mmu_context.h>
19#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
20 22
@@ -23,21 +25,12 @@
23 * flushing. Anything exceeding this will simply flush the dcache in its 25 * flushing. Anything exceeding this will simply flush the dcache in its
24 * entirety. 26 * entirety.
25 */ 27 */
26#define MAX_DCACHE_PAGES 64 /* XXX: Tune for ways */
27#define MAX_ICACHE_PAGES 32 28#define MAX_ICACHE_PAGES 32
28 29
29static void __flush_cache_one(unsigned long addr, unsigned long phys, 30static void __flush_cache_one(unsigned long addr, unsigned long phys,
30 unsigned long exec_offset); 31 unsigned long exec_offset);
31 32
32/* 33/*
33 * This is initialised here to ensure that it is not placed in the BSS. If
34 * that were to happen, note that cache_init gets called before the BSS is
35 * cleared, so this would get nulled out which would be hopeless.
36 */
37static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) =
38 (void (*)(unsigned long, unsigned long))0xdeadbeef;
39
40/*
41 * Write back the range of D-cache, and purge the I-cache. 34 * Write back the range of D-cache, and purge the I-cache.
42 * 35 *
43 * Called from kernel/module.c:sys_init_module and routine for a.out format, 36 * Called from kernel/module.c:sys_init_module and routine for a.out format,
@@ -97,15 +90,15 @@ static inline void flush_cache_one(unsigned long start, unsigned long phys)
97 unsigned long flags, exec_offset = 0; 90 unsigned long flags, exec_offset = 0;
98 91
99 /* 92 /*
100 * All types of SH-4 require PC to be in P2 to operate on the I-cache. 93 * All types of SH-4 require PC to be uncached to operate on the I-cache.
101 * Some types of SH-4 require PC to be in P2 to operate on the D-cache. 94 * Some types of SH-4 require PC to be uncached to operate on the D-cache.
102 */ 95 */
103 if ((boot_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) || 96 if ((boot_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) ||
104 (start < CACHE_OC_ADDRESS_ARRAY)) 97 (start < CACHE_OC_ADDRESS_ARRAY))
105 exec_offset = 0x20000000; 98 exec_offset = cached_to_uncached;
106 99
107 local_irq_save(flags); 100 local_irq_save(flags);
108 __flush_cache_one(start | SH_CACHE_ASSOC, P1SEGADDR(phys), exec_offset); 101 __flush_cache_one(start, phys, exec_offset);
109 local_irq_restore(flags); 102 local_irq_restore(flags);
110} 103}
111 104
@@ -124,7 +117,7 @@ static void sh4_flush_dcache_page(void *arg)
124 else 117 else
125#endif 118#endif
126 { 119 {
127 unsigned long phys = PHYSADDR(page_address(page)); 120 unsigned long phys = page_to_phys(page);
128 unsigned long addr = CACHE_OC_ADDRESS_ARRAY; 121 unsigned long addr = CACHE_OC_ADDRESS_ARRAY;
129 int i, n; 122 int i, n;
130 123
@@ -159,10 +152,27 @@ static void __uses_jump_to_uncached flush_icache_all(void)
159 local_irq_restore(flags); 152 local_irq_restore(flags);
160} 153}
161 154
162static inline void flush_dcache_all(void) 155static void flush_dcache_all(void)
163{ 156{
164 (*__flush_dcache_segment_fn)(0UL, boot_cpu_data.dcache.way_size); 157 unsigned long addr, end_addr, entry_offset;
165 wmb(); 158
159 end_addr = CACHE_OC_ADDRESS_ARRAY +
160 (current_cpu_data.dcache.sets <<
161 current_cpu_data.dcache.entry_shift) *
162 current_cpu_data.dcache.ways;
163
164 entry_offset = 1 << current_cpu_data.dcache.entry_shift;
165
166 for (addr = CACHE_OC_ADDRESS_ARRAY; addr < end_addr; ) {
167 __raw_writel(0, addr); addr += entry_offset;
168 __raw_writel(0, addr); addr += entry_offset;
169 __raw_writel(0, addr); addr += entry_offset;
170 __raw_writel(0, addr); addr += entry_offset;
171 __raw_writel(0, addr); addr += entry_offset;
172 __raw_writel(0, addr); addr += entry_offset;
173 __raw_writel(0, addr); addr += entry_offset;
174 __raw_writel(0, addr); addr += entry_offset;
175 }
166} 176}
167 177
168static void sh4_flush_cache_all(void *unused) 178static void sh4_flush_cache_all(void *unused)
@@ -171,89 +181,13 @@ static void sh4_flush_cache_all(void *unused)
171 flush_icache_all(); 181 flush_icache_all();
172} 182}
173 183
174static void __flush_cache_mm(struct mm_struct *mm, unsigned long start,
175 unsigned long end)
176{
177 unsigned long d = 0, p = start & PAGE_MASK;
178 unsigned long alias_mask = boot_cpu_data.dcache.alias_mask;
179 unsigned long n_aliases = boot_cpu_data.dcache.n_aliases;
180 unsigned long select_bit;
181 unsigned long all_aliases_mask;
182 unsigned long addr_offset;
183 pgd_t *dir;
184 pmd_t *pmd;
185 pud_t *pud;
186 pte_t *pte;
187 int i;
188
189 dir = pgd_offset(mm, p);
190 pud = pud_offset(dir, p);
191 pmd = pmd_offset(pud, p);
192 end = PAGE_ALIGN(end);
193
194 all_aliases_mask = (1 << n_aliases) - 1;
195
196 do {
197 if (pmd_none(*pmd) || unlikely(pmd_bad(*pmd))) {
198 p &= PMD_MASK;
199 p += PMD_SIZE;
200 pmd++;
201
202 continue;
203 }
204
205 pte = pte_offset_kernel(pmd, p);
206
207 do {
208 unsigned long phys;
209 pte_t entry = *pte;
210
211 if (!(pte_val(entry) & _PAGE_PRESENT)) {
212 pte++;
213 p += PAGE_SIZE;
214 continue;
215 }
216
217 phys = pte_val(entry) & PTE_PHYS_MASK;
218
219 if ((p ^ phys) & alias_mask) {
220 d |= 1 << ((p & alias_mask) >> PAGE_SHIFT);
221 d |= 1 << ((phys & alias_mask) >> PAGE_SHIFT);
222
223 if (d == all_aliases_mask)
224 goto loop_exit;
225 }
226
227 pte++;
228 p += PAGE_SIZE;
229 } while (p < end && ((unsigned long)pte & ~PAGE_MASK));
230 pmd++;
231 } while (p < end);
232
233loop_exit:
234 addr_offset = 0;
235 select_bit = 1;
236
237 for (i = 0; i < n_aliases; i++) {
238 if (d & select_bit) {
239 (*__flush_dcache_segment_fn)(addr_offset, PAGE_SIZE);
240 wmb();
241 }
242
243 select_bit <<= 1;
244 addr_offset += PAGE_SIZE;
245 }
246}
247
248/* 184/*
249 * Note : (RPC) since the caches are physically tagged, the only point 185 * Note : (RPC) since the caches are physically tagged, the only point
250 * of flush_cache_mm for SH-4 is to get rid of aliases from the 186 * of flush_cache_mm for SH-4 is to get rid of aliases from the
251 * D-cache. The assumption elsewhere, e.g. flush_cache_range, is that 187 * D-cache. The assumption elsewhere, e.g. flush_cache_range, is that
252 * lines can stay resident so long as the virtual address they were 188 * lines can stay resident so long as the virtual address they were
253 * accessed with (hence cache set) is in accord with the physical 189 * accessed with (hence cache set) is in accord with the physical
254 * address (i.e. tag). It's no different here. So I reckon we don't 190 * address (i.e. tag). It's no different here.
255 * need to flush the I-cache, since aliases don't matter for that. We
256 * should try that.
257 * 191 *
258 * Caller takes mm->mmap_sem. 192 * Caller takes mm->mmap_sem.
259 */ 193 */
@@ -264,33 +198,7 @@ static void sh4_flush_cache_mm(void *arg)
264 if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT) 198 if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT)
265 return; 199 return;
266 200
267 /* 201 flush_dcache_all();
268 * If cache is only 4k-per-way, there are never any 'aliases'. Since
269 * the cache is physically tagged, the data can just be left in there.
270 */
271 if (boot_cpu_data.dcache.n_aliases == 0)
272 return;
273
274 /*
275 * Don't bother groveling around the dcache for the VMA ranges
276 * if there are too many PTEs to make it worthwhile.
277 */
278 if (mm->nr_ptes >= MAX_DCACHE_PAGES)
279 flush_dcache_all();
280 else {
281 struct vm_area_struct *vma;
282
283 /*
284 * In this case there are reasonably sized ranges to flush,
285 * iterate through the VMA list and take care of any aliases.
286 */
287 for (vma = mm->mmap; vma; vma = vma->vm_next)
288 __flush_cache_mm(mm, vma->vm_start, vma->vm_end);
289 }
290
291 /* Only touch the icache if one of the VMAs has VM_EXEC set. */
292 if (mm->exec_vm)
293 flush_icache_all();
294} 202}
295 203
296/* 204/*
@@ -303,44 +211,63 @@ static void sh4_flush_cache_page(void *args)
303{ 211{
304 struct flusher_data *data = args; 212 struct flusher_data *data = args;
305 struct vm_area_struct *vma; 213 struct vm_area_struct *vma;
214 struct page *page;
306 unsigned long address, pfn, phys; 215 unsigned long address, pfn, phys;
307 unsigned int alias_mask; 216 int map_coherent = 0;
217 pgd_t *pgd;
218 pud_t *pud;
219 pmd_t *pmd;
220 pte_t *pte;
221 void *vaddr;
308 222
309 vma = data->vma; 223 vma = data->vma;
310 address = data->addr1; 224 address = data->addr1 & PAGE_MASK;
311 pfn = data->addr2; 225 pfn = data->addr2;
312 phys = pfn << PAGE_SHIFT; 226 phys = pfn << PAGE_SHIFT;
227 page = pfn_to_page(pfn);
313 228
314 if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT) 229 if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT)
315 return; 230 return;
316 231
317 alias_mask = boot_cpu_data.dcache.alias_mask; 232 pgd = pgd_offset(vma->vm_mm, address);
318 233 pud = pud_offset(pgd, address);
319 /* We only need to flush D-cache when we have alias */ 234 pmd = pmd_offset(pud, address);
320 if ((address^phys) & alias_mask) { 235 pte = pte_offset_kernel(pmd, address);
321 /* Loop 4K of the D-cache */ 236
322 flush_cache_one( 237 /* If the page isn't present, there is nothing to do here. */
323 CACHE_OC_ADDRESS_ARRAY | (address & alias_mask), 238 if (!(pte_val(*pte) & _PAGE_PRESENT))
324 phys); 239 return;
325 /* Loop another 4K of the D-cache */
326 flush_cache_one(
327 CACHE_OC_ADDRESS_ARRAY | (phys & alias_mask),
328 phys);
329 }
330 240
331 alias_mask = boot_cpu_data.icache.alias_mask; 241 if ((vma->vm_mm == current->active_mm))
332 if (vma->vm_flags & VM_EXEC) { 242 vaddr = NULL;
243 else {
333 /* 244 /*
334 * Evict entries from the portion of the cache from which code 245 * Use kmap_coherent or kmap_atomic to do flushes for
335 * may have been executed at this address (virtual). There's 246 * another ASID than the current one.
336 * no need to evict from the portion corresponding to the
337 * physical address as for the D-cache, because we know the
338 * kernel has never executed the code through its identity
339 * translation.
340 */ 247 */
341 flush_cache_one( 248 map_coherent = (current_cpu_data.dcache.n_aliases &&
342 CACHE_IC_ADDRESS_ARRAY | (address & alias_mask), 249 !test_bit(PG_dcache_dirty, &page->flags) &&
343 phys); 250 page_mapped(page));
251 if (map_coherent)
252 vaddr = kmap_coherent(page, address);
253 else
254 vaddr = kmap_atomic(page, KM_USER0);
255
256 address = (unsigned long)vaddr;
257 }
258
259 if (pages_do_alias(address, phys))
260 flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
261 (address & shm_align_mask), phys);
262
263 if (vma->vm_flags & VM_EXEC)
264 flush_icache_all();
265
266 if (vaddr) {
267 if (map_coherent)
268 kunmap_coherent(vaddr);
269 else
270 kunmap_atomic(vaddr, KM_USER0);
344 } 271 }
345} 272}
346 273
@@ -373,24 +300,10 @@ static void sh4_flush_cache_range(void *args)
373 if (boot_cpu_data.dcache.n_aliases == 0) 300 if (boot_cpu_data.dcache.n_aliases == 0)
374 return; 301 return;
375 302
376 /* 303 flush_dcache_all();
377 * Don't bother with the lookup and alias check if we have a
378 * wide range to cover, just blow away the dcache in its
379 * entirety instead. -- PFM.
380 */
381 if (((end - start) >> PAGE_SHIFT) >= MAX_DCACHE_PAGES)
382 flush_dcache_all();
383 else
384 __flush_cache_mm(vma->vm_mm, start, end);
385 304
386 if (vma->vm_flags & VM_EXEC) { 305 if (vma->vm_flags & VM_EXEC)
387 /*
388 * TODO: Is this required??? Need to look at how I-cache
389 * coherency is assured when new programs are loaded to see if
390 * this matters.
391 */
392 flush_icache_all(); 306 flush_icache_all();
393 }
394} 307}
395 308
396/** 309/**
@@ -464,245 +377,6 @@ static void __flush_cache_one(unsigned long addr, unsigned long phys,
464 } while (--way_count != 0); 377 } while (--way_count != 0);
465} 378}
466 379
467/*
468 * Break the 1, 2 and 4 way variants of this out into separate functions to
469 * avoid nearly all the overhead of having the conditional stuff in the function
470 * bodies (+ the 1 and 2 way cases avoid saving any registers too).
471 *
472 * We want to eliminate unnecessary bus transactions, so this code uses
473 * a non-obvious technique.
474 *
475 * Loop over a cache way sized block of, one cache line at a time. For each
476 * line, use movca.a to cause the current cache line contents to be written
477 * back, but without reading anything from main memory. However this has the
478 * side effect that the cache is now caching that memory location. So follow
479 * this with a cache invalidate to mark the cache line invalid. And do all
480 * this with interrupts disabled, to avoid the cache line being accidently
481 * evicted while it is holding garbage.
482 *
483 * This also breaks in a number of circumstances:
484 * - if there are modifications to the region of memory just above
485 * empty_zero_page (for example because a breakpoint has been placed
486 * there), then these can be lost.
487 *
488 * This is because the the memory address which the cache temporarily
489 * caches in the above description is empty_zero_page. So the
490 * movca.l hits the cache (it is assumed that it misses, or at least
491 * isn't dirty), modifies the line and then invalidates it, losing the
492 * required change.
493 *
494 * - If caches are disabled or configured in write-through mode, then
495 * the movca.l writes garbage directly into memory.
496 */
497static void __flush_dcache_segment_writethrough(unsigned long start,
498 unsigned long extent_per_way)
499{
500 unsigned long addr;
501 int i;
502
503 addr = CACHE_OC_ADDRESS_ARRAY | (start & cpu_data->dcache.entry_mask);
504
505 while (extent_per_way) {
506 for (i = 0; i < cpu_data->dcache.ways; i++)
507 __raw_writel(0, addr + cpu_data->dcache.way_incr * i);
508
509 addr += cpu_data->dcache.linesz;
510 extent_per_way -= cpu_data->dcache.linesz;
511 }
512}
513
514static void __flush_dcache_segment_1way(unsigned long start,
515 unsigned long extent_per_way)
516{
517 unsigned long orig_sr, sr_with_bl;
518 unsigned long base_addr;
519 unsigned long way_incr, linesz, way_size;
520 struct cache_info *dcache;
521 register unsigned long a0, a0e;
522
523 asm volatile("stc sr, %0" : "=r" (orig_sr));
524 sr_with_bl = orig_sr | (1<<28);
525 base_addr = ((unsigned long)&empty_zero_page[0]);
526
527 /*
528 * The previous code aligned base_addr to 16k, i.e. the way_size of all
529 * existing SH-4 D-caches. Whilst I don't see a need to have this
530 * aligned to any better than the cache line size (which it will be
531 * anyway by construction), let's align it to at least the way_size of
532 * any existing or conceivable SH-4 D-cache. -- RPC
533 */
534 base_addr = ((base_addr >> 16) << 16);
535 base_addr |= start;
536
537 dcache = &boot_cpu_data.dcache;
538 linesz = dcache->linesz;
539 way_incr = dcache->way_incr;
540 way_size = dcache->way_size;
541
542 a0 = base_addr;
543 a0e = base_addr + extent_per_way;
544 do {
545 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
546 asm volatile("movca.l r0, @%0\n\t"
547 "ocbi @%0" : : "r" (a0));
548 a0 += linesz;
549 asm volatile("movca.l r0, @%0\n\t"
550 "ocbi @%0" : : "r" (a0));
551 a0 += linesz;
552 asm volatile("movca.l r0, @%0\n\t"
553 "ocbi @%0" : : "r" (a0));
554 a0 += linesz;
555 asm volatile("movca.l r0, @%0\n\t"
556 "ocbi @%0" : : "r" (a0));
557 asm volatile("ldc %0, sr" : : "r" (orig_sr));
558 a0 += linesz;
559 } while (a0 < a0e);
560}
561
562static void __flush_dcache_segment_2way(unsigned long start,
563 unsigned long extent_per_way)
564{
565 unsigned long orig_sr, sr_with_bl;
566 unsigned long base_addr;
567 unsigned long way_incr, linesz, way_size;
568 struct cache_info *dcache;
569 register unsigned long a0, a1, a0e;
570
571 asm volatile("stc sr, %0" : "=r" (orig_sr));
572 sr_with_bl = orig_sr | (1<<28);
573 base_addr = ((unsigned long)&empty_zero_page[0]);
574
575 /* See comment under 1-way above */
576 base_addr = ((base_addr >> 16) << 16);
577 base_addr |= start;
578
579 dcache = &boot_cpu_data.dcache;
580 linesz = dcache->linesz;
581 way_incr = dcache->way_incr;
582 way_size = dcache->way_size;
583
584 a0 = base_addr;
585 a1 = a0 + way_incr;
586 a0e = base_addr + extent_per_way;
587 do {
588 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
589 asm volatile("movca.l r0, @%0\n\t"
590 "movca.l r0, @%1\n\t"
591 "ocbi @%0\n\t"
592 "ocbi @%1" : :
593 "r" (a0), "r" (a1));
594 a0 += linesz;
595 a1 += linesz;
596 asm volatile("movca.l r0, @%0\n\t"
597 "movca.l r0, @%1\n\t"
598 "ocbi @%0\n\t"
599 "ocbi @%1" : :
600 "r" (a0), "r" (a1));
601 a0 += linesz;
602 a1 += linesz;
603 asm volatile("movca.l r0, @%0\n\t"
604 "movca.l r0, @%1\n\t"
605 "ocbi @%0\n\t"
606 "ocbi @%1" : :
607 "r" (a0), "r" (a1));
608 a0 += linesz;
609 a1 += linesz;
610 asm volatile("movca.l r0, @%0\n\t"
611 "movca.l r0, @%1\n\t"
612 "ocbi @%0\n\t"
613 "ocbi @%1" : :
614 "r" (a0), "r" (a1));
615 asm volatile("ldc %0, sr" : : "r" (orig_sr));
616 a0 += linesz;
617 a1 += linesz;
618 } while (a0 < a0e);
619}
620
621static void __flush_dcache_segment_4way(unsigned long start,
622 unsigned long extent_per_way)
623{
624 unsigned long orig_sr, sr_with_bl;
625 unsigned long base_addr;
626 unsigned long way_incr, linesz, way_size;
627 struct cache_info *dcache;
628 register unsigned long a0, a1, a2, a3, a0e;
629
630 asm volatile("stc sr, %0" : "=r" (orig_sr));
631 sr_with_bl = orig_sr | (1<<28);
632 base_addr = ((unsigned long)&empty_zero_page[0]);
633
634 /* See comment under 1-way above */
635 base_addr = ((base_addr >> 16) << 16);
636 base_addr |= start;
637
638 dcache = &boot_cpu_data.dcache;
639 linesz = dcache->linesz;
640 way_incr = dcache->way_incr;
641 way_size = dcache->way_size;
642
643 a0 = base_addr;
644 a1 = a0 + way_incr;
645 a2 = a1 + way_incr;
646 a3 = a2 + way_incr;
647 a0e = base_addr + extent_per_way;
648 do {
649 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
650 asm volatile("movca.l r0, @%0\n\t"
651 "movca.l r0, @%1\n\t"
652 "movca.l r0, @%2\n\t"
653 "movca.l r0, @%3\n\t"
654 "ocbi @%0\n\t"
655 "ocbi @%1\n\t"
656 "ocbi @%2\n\t"
657 "ocbi @%3\n\t" : :
658 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
659 a0 += linesz;
660 a1 += linesz;
661 a2 += linesz;
662 a3 += linesz;
663 asm volatile("movca.l r0, @%0\n\t"
664 "movca.l r0, @%1\n\t"
665 "movca.l r0, @%2\n\t"
666 "movca.l r0, @%3\n\t"
667 "ocbi @%0\n\t"
668 "ocbi @%1\n\t"
669 "ocbi @%2\n\t"
670 "ocbi @%3\n\t" : :
671 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
672 a0 += linesz;
673 a1 += linesz;
674 a2 += linesz;
675 a3 += linesz;
676 asm volatile("movca.l r0, @%0\n\t"
677 "movca.l r0, @%1\n\t"
678 "movca.l r0, @%2\n\t"
679 "movca.l r0, @%3\n\t"
680 "ocbi @%0\n\t"
681 "ocbi @%1\n\t"
682 "ocbi @%2\n\t"
683 "ocbi @%3\n\t" : :
684 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
685 a0 += linesz;
686 a1 += linesz;
687 a2 += linesz;
688 a3 += linesz;
689 asm volatile("movca.l r0, @%0\n\t"
690 "movca.l r0, @%1\n\t"
691 "movca.l r0, @%2\n\t"
692 "movca.l r0, @%3\n\t"
693 "ocbi @%0\n\t"
694 "ocbi @%1\n\t"
695 "ocbi @%2\n\t"
696 "ocbi @%3\n\t" : :
697 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
698 asm volatile("ldc %0, sr" : : "r" (orig_sr));
699 a0 += linesz;
700 a1 += linesz;
701 a2 += linesz;
702 a3 += linesz;
703 } while (a0 < a0e);
704}
705
706extern void __weak sh4__flush_region_init(void); 380extern void __weak sh4__flush_region_init(void);
707 381
708/* 382/*
@@ -710,32 +384,11 @@ extern void __weak sh4__flush_region_init(void);
710 */ 384 */
711void __init sh4_cache_init(void) 385void __init sh4_cache_init(void)
712{ 386{
713 unsigned int wt_enabled = !!(__raw_readl(CCR) & CCR_CACHE_WT);
714
715 printk("PVR=%08x CVR=%08x PRR=%08x\n", 387 printk("PVR=%08x CVR=%08x PRR=%08x\n",
716 ctrl_inl(CCN_PVR), 388 ctrl_inl(CCN_PVR),
717 ctrl_inl(CCN_CVR), 389 ctrl_inl(CCN_CVR),
718 ctrl_inl(CCN_PRR)); 390 ctrl_inl(CCN_PRR));
719 391
720 if (wt_enabled)
721 __flush_dcache_segment_fn = __flush_dcache_segment_writethrough;
722 else {
723 switch (boot_cpu_data.dcache.ways) {
724 case 1:
725 __flush_dcache_segment_fn = __flush_dcache_segment_1way;
726 break;
727 case 2:
728 __flush_dcache_segment_fn = __flush_dcache_segment_2way;
729 break;
730 case 4:
731 __flush_dcache_segment_fn = __flush_dcache_segment_4way;
732 break;
733 default:
734 panic("unknown number of cache ways\n");
735 break;
736 }
737 }
738
739 local_flush_icache_range = sh4_flush_icache_range; 392 local_flush_icache_range = sh4_flush_icache_range;
740 local_flush_dcache_page = sh4_flush_dcache_page; 393 local_flush_dcache_page = sh4_flush_dcache_page;
741 local_flush_cache_all = sh4_flush_cache_all; 394 local_flush_cache_all = sh4_flush_cache_all;
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 467ff8e260f7..eb4cc4ec7952 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -563,7 +563,7 @@ static void sh5_flush_cache_page(void *args)
563 563
564static void sh5_flush_dcache_page(void *page) 564static void sh5_flush_dcache_page(void *page)
565{ 565{
566 sh64_dcache_purge_phy_page(page_to_phys(page)); 566 sh64_dcache_purge_phy_page(page_to_phys((struct page *)page));
567 wmb(); 567 wmb();
568} 568}
569 569
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index 2601935eb589..f527fb70fce6 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -141,7 +141,7 @@ static void sh7705_flush_dcache_page(void *arg)
141 if (mapping && !mapping_mapped(mapping)) 141 if (mapping && !mapping_mapped(mapping))
142 set_bit(PG_dcache_dirty, &page->flags); 142 set_bit(PG_dcache_dirty, &page->flags);
143 else 143 else
144 __flush_dcache_page(PHYSADDR(page_address(page))); 144 __flush_dcache_page(__pa(page_address(page)));
145} 145}
146 146
147static void __uses_jump_to_uncached sh7705_flush_cache_all(void *args) 147static void __uses_jump_to_uncached sh7705_flush_cache_all(void *args)
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index a2dc7f9ecc51..e9415d3ea94a 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -27,8 +27,11 @@ void (*local_flush_icache_page)(void *args) = cache_noop;
27void (*local_flush_cache_sigtramp)(void *args) = cache_noop; 27void (*local_flush_cache_sigtramp)(void *args) = cache_noop;
28 28
29void (*__flush_wback_region)(void *start, int size); 29void (*__flush_wback_region)(void *start, int size);
30EXPORT_SYMBOL(__flush_wback_region);
30void (*__flush_purge_region)(void *start, int size); 31void (*__flush_purge_region)(void *start, int size);
32EXPORT_SYMBOL(__flush_purge_region);
31void (*__flush_invalidate_region)(void *start, int size); 33void (*__flush_invalidate_region)(void *start, int size);
34EXPORT_SYMBOL(__flush_invalidate_region);
32 35
33static inline void noop__flush_region(void *start, int size) 36static inline void noop__flush_region(void *start, int size)
34{ 37{
@@ -161,14 +164,21 @@ void flush_cache_all(void)
161{ 164{
162 cacheop_on_each_cpu(local_flush_cache_all, NULL, 1); 165 cacheop_on_each_cpu(local_flush_cache_all, NULL, 1);
163} 166}
167EXPORT_SYMBOL(flush_cache_all);
164 168
165void flush_cache_mm(struct mm_struct *mm) 169void flush_cache_mm(struct mm_struct *mm)
166{ 170{
171 if (boot_cpu_data.dcache.n_aliases == 0)
172 return;
173
167 cacheop_on_each_cpu(local_flush_cache_mm, mm, 1); 174 cacheop_on_each_cpu(local_flush_cache_mm, mm, 1);
168} 175}
169 176
170void flush_cache_dup_mm(struct mm_struct *mm) 177void flush_cache_dup_mm(struct mm_struct *mm)
171{ 178{
179 if (boot_cpu_data.dcache.n_aliases == 0)
180 return;
181
172 cacheop_on_each_cpu(local_flush_cache_dup_mm, mm, 1); 182 cacheop_on_each_cpu(local_flush_cache_dup_mm, mm, 1);
173} 183}
174 184
@@ -195,11 +205,13 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
195 205
196 cacheop_on_each_cpu(local_flush_cache_range, (void *)&data, 1); 206 cacheop_on_each_cpu(local_flush_cache_range, (void *)&data, 1);
197} 207}
208EXPORT_SYMBOL(flush_cache_range);
198 209
199void flush_dcache_page(struct page *page) 210void flush_dcache_page(struct page *page)
200{ 211{
201 cacheop_on_each_cpu(local_flush_dcache_page, page, 1); 212 cacheop_on_each_cpu(local_flush_dcache_page, page, 1);
202} 213}
214EXPORT_SYMBOL(flush_dcache_page);
203 215
204void flush_icache_range(unsigned long start, unsigned long end) 216void flush_icache_range(unsigned long start, unsigned long end)
205{ 217{
@@ -265,7 +277,11 @@ static void __init emit_cache_params(void)
265 277
266void __init cpu_cache_init(void) 278void __init cpu_cache_init(void)
267{ 279{
268 unsigned int cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE); 280 unsigned int cache_disabled = 0;
281
282#ifdef CCR
283 cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE);
284#endif
269 285
270 compute_alias(&boot_cpu_data.icache); 286 compute_alias(&boot_cpu_data.icache);
271 compute_alias(&boot_cpu_data.dcache); 287 compute_alias(&boot_cpu_data.dcache);
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index e098ec158ddb..902967e3f841 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -15,11 +15,15 @@
15#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
16#include <linux/dma-debug.h> 16#include <linux/dma-debug.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/module.h>
18#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
19#include <asm/addrspace.h> 20#include <asm/addrspace.h>
20 21
21#define PREALLOC_DMA_DEBUG_ENTRIES 4096 22#define PREALLOC_DMA_DEBUG_ENTRIES 4096
22 23
24struct dma_map_ops *dma_ops;
25EXPORT_SYMBOL(dma_ops);
26
23static int __init dma_init(void) 27static int __init dma_init(void)
24{ 28{
25 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); 29 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
@@ -27,15 +31,12 @@ static int __init dma_init(void)
27} 31}
28fs_initcall(dma_init); 32fs_initcall(dma_init);
29 33
30void *dma_alloc_coherent(struct device *dev, size_t size, 34void *dma_generic_alloc_coherent(struct device *dev, size_t size,
31 dma_addr_t *dma_handle, gfp_t gfp) 35 dma_addr_t *dma_handle, gfp_t gfp)
32{ 36{
33 void *ret, *ret_nocache; 37 void *ret, *ret_nocache;
34 int order = get_order(size); 38 int order = get_order(size);
35 39
36 if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
37 return ret;
38
39 ret = (void *)__get_free_pages(gfp, order); 40 ret = (void *)__get_free_pages(gfp, order);
40 if (!ret) 41 if (!ret)
41 return NULL; 42 return NULL;
@@ -57,35 +58,26 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
57 58
58 *dma_handle = virt_to_phys(ret); 59 *dma_handle = virt_to_phys(ret);
59 60
60 debug_dma_alloc_coherent(dev, size, *dma_handle, ret_nocache);
61
62 return ret_nocache; 61 return ret_nocache;
63} 62}
64EXPORT_SYMBOL(dma_alloc_coherent);
65 63
66void dma_free_coherent(struct device *dev, size_t size, 64void dma_generic_free_coherent(struct device *dev, size_t size,
67 void *vaddr, dma_addr_t dma_handle) 65 void *vaddr, dma_addr_t dma_handle)
68{ 66{
69 int order = get_order(size); 67 int order = get_order(size);
70 unsigned long pfn = dma_handle >> PAGE_SHIFT; 68 unsigned long pfn = dma_handle >> PAGE_SHIFT;
71 int k; 69 int k;
72 70
73 WARN_ON(irqs_disabled()); /* for portability */
74
75 if (dma_release_from_coherent(dev, order, vaddr))
76 return;
77
78 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
79 for (k = 0; k < (1 << order); k++) 71 for (k = 0; k < (1 << order); k++)
80 __free_pages(pfn_to_page(pfn + k), 0); 72 __free_pages(pfn_to_page(pfn + k), 0);
73
81 iounmap(vaddr); 74 iounmap(vaddr);
82} 75}
83EXPORT_SYMBOL(dma_free_coherent);
84 76
85void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 77void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
86 enum dma_data_direction direction) 78 enum dma_data_direction direction)
87{ 79{
88#ifdef CONFIG_CPU_SH5 80#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB)
89 void *p1addr = vaddr; 81 void *p1addr = vaddr;
90#else 82#else
91 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr); 83 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 8173e38afd38..432acd07e76a 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -15,6 +15,7 @@
15#include <linux/pagemap.h> 15#include <linux/pagemap.h>
16#include <linux/percpu.h> 16#include <linux/percpu.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/dma-mapping.h>
18#include <asm/mmu_context.h> 19#include <asm/mmu_context.h>
19#include <asm/tlb.h> 20#include <asm/tlb.h>
20#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
@@ -186,11 +187,21 @@ void __init paging_init(void)
186 set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start)); 187 set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start));
187} 188}
188 189
190/*
191 * Early initialization for any I/O MMUs we might have.
192 */
193static void __init iommu_init(void)
194{
195 no_iommu_init();
196}
197
189void __init mem_init(void) 198void __init mem_init(void)
190{ 199{
191 int codesize, datasize, initsize; 200 int codesize, datasize, initsize;
192 int nid; 201 int nid;
193 202
203 iommu_init();
204
194 num_physpages = 0; 205 num_physpages = 0;
195 high_memory = NULL; 206 high_memory = NULL;
196 207
@@ -323,4 +334,12 @@ int memory_add_physaddr_to_nid(u64 addr)
323} 334}
324EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid); 335EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
325#endif 336#endif
337
326#endif /* CONFIG_MEMORY_HOTPLUG */ 338#endif /* CONFIG_MEMORY_HOTPLUG */
339
340#ifdef CONFIG_PMB
341int __in_29bit_mode(void)
342{
343 return !(ctrl_inl(PMB_PASCR) & PASCR_SE);
344}
345#endif /* CONFIG_PMB */
diff --git a/arch/sh/mm/kmap.c b/arch/sh/mm/kmap.c
index 16e01b5fed04..15d74ea42094 100644
--- a/arch/sh/mm/kmap.c
+++ b/arch/sh/mm/kmap.c
@@ -39,7 +39,9 @@ void *kmap_coherent(struct page *page, unsigned long addr)
39 pagefault_disable(); 39 pagefault_disable();
40 40
41 idx = FIX_CMAP_END - 41 idx = FIX_CMAP_END -
42 ((addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT); 42 (((addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1)) +
43 (FIX_N_COLOURS * smp_processor_id()));
44
43 vaddr = __fix_to_virt(idx); 45 vaddr = __fix_to_virt(idx);
44 46
45 BUG_ON(!pte_none(*(kmap_coherent_pte - idx))); 47 BUG_ON(!pte_none(*(kmap_coherent_pte - idx)));
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
index d2984fa42d3d..afeb710ec5c3 100644
--- a/arch/sh/mm/mmap.c
+++ b/arch/sh/mm/mmap.c
@@ -54,7 +54,8 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
54 /* We do not accept a shared mapping if it would violate 54 /* We do not accept a shared mapping if it would violate
55 * cache aliasing constraints. 55 * cache aliasing constraints.
56 */ 56 */
57 if ((flags & MAP_SHARED) && (addr & shm_align_mask)) 57 if ((flags & MAP_SHARED) &&
58 ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
58 return -EINVAL; 59 return -EINVAL;
59 return addr; 60 return addr;
60 } 61 }
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 9b784fdb947c..6c524446c0f6 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -60,7 +60,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
60 unsigned long bootmem_paddr; 60 unsigned long bootmem_paddr;
61 61
62 /* Don't allow bogus node assignment */ 62 /* Don't allow bogus node assignment */
63 BUG_ON(nid > MAX_NUMNODES || nid == 0); 63 BUG_ON(nid > MAX_NUMNODES || nid <= 0);
64 64
65 start_pfn = start >> PAGE_SHIFT; 65 start_pfn = start >> PAGE_SHIFT;
66 end_pfn = end >> PAGE_SHIFT; 66 end_pfn = end >> PAGE_SHIFT;
diff --git a/arch/sh/mm/pmb-fixed.c b/arch/sh/mm/pmb-fixed.c
deleted file mode 100644
index 43c8eac4d8a1..000000000000
--- a/arch/sh/mm/pmb-fixed.c
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * arch/sh/mm/fixed_pmb.c
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/mm.h>
12#include <linux/io.h>
13#include <asm/mmu.h>
14#include <asm/mmu_context.h>
15
16static int __uses_jump_to_uncached fixed_pmb_init(void)
17{
18 int i;
19 unsigned long addr, data;
20
21 jump_to_uncached();
22
23 for (i = 0; i < PMB_ENTRY_MAX; i++) {
24 addr = PMB_DATA + (i << PMB_E_SHIFT);
25 data = ctrl_inl(addr);
26 if (!(data & PMB_V))
27 continue;
28
29 if (data & PMB_C) {
30#if defined(CONFIG_CACHE_WRITETHROUGH)
31 data |= PMB_WT;
32#elif defined(CONFIG_CACHE_WRITEBACK)
33 data &= ~PMB_WT;
34#else
35 data &= ~(PMB_C | PMB_WT);
36#endif
37 }
38 ctrl_outl(data, addr);
39 }
40
41 back_to_cached();
42
43 return 0;
44}
45arch_initcall(fixed_pmb_init);
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index aade31102112..280f6a166035 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -35,29 +35,9 @@
35 35
36static void __pmb_unmap(struct pmb_entry *); 36static void __pmb_unmap(struct pmb_entry *);
37 37
38static struct kmem_cache *pmb_cache; 38static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
39static unsigned long pmb_map; 39static unsigned long pmb_map;
40 40
41static struct pmb_entry pmb_init_map[] = {
42 /* vpn ppn flags (ub/sz/c/wt) */
43
44 /* P1 Section Mappings */
45 { 0x80000000, 0x00000000, PMB_SZ_64M | PMB_C, },
46 { 0x84000000, 0x04000000, PMB_SZ_64M | PMB_C, },
47 { 0x88000000, 0x08000000, PMB_SZ_128M | PMB_C, },
48 { 0x90000000, 0x10000000, PMB_SZ_64M | PMB_C, },
49 { 0x94000000, 0x14000000, PMB_SZ_64M | PMB_C, },
50 { 0x98000000, 0x18000000, PMB_SZ_64M | PMB_C, },
51
52 /* P2 Section Mappings */
53 { 0xa0000000, 0x00000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
54 { 0xa4000000, 0x04000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
55 { 0xa8000000, 0x08000000, PMB_UB | PMB_SZ_128M | PMB_WT, },
56 { 0xb0000000, 0x10000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
57 { 0xb4000000, 0x14000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
58 { 0xb8000000, 0x18000000, PMB_UB | PMB_SZ_64M | PMB_WT, },
59};
60
61static inline unsigned long mk_pmb_entry(unsigned int entry) 41static inline unsigned long mk_pmb_entry(unsigned int entry)
62{ 42{
63 return (entry & PMB_E_MASK) << PMB_E_SHIFT; 43 return (entry & PMB_E_MASK) << PMB_E_SHIFT;
@@ -73,81 +53,68 @@ static inline unsigned long mk_pmb_data(unsigned int entry)
73 return mk_pmb_entry(entry) | PMB_DATA; 53 return mk_pmb_entry(entry) | PMB_DATA;
74} 54}
75 55
76static DEFINE_SPINLOCK(pmb_list_lock); 56static int pmb_alloc_entry(void)
77static struct pmb_entry *pmb_list;
78
79static inline void pmb_list_add(struct pmb_entry *pmbe)
80{ 57{
81 struct pmb_entry **p, *tmp; 58 unsigned int pos;
82 59
83 p = &pmb_list; 60repeat:
84 while ((tmp = *p) != NULL) 61 pos = find_first_zero_bit(&pmb_map, NR_PMB_ENTRIES);
85 p = &tmp->next;
86 62
87 pmbe->next = tmp; 63 if (unlikely(pos > NR_PMB_ENTRIES))
88 *p = pmbe; 64 return -ENOSPC;
89}
90 65
91static inline void pmb_list_del(struct pmb_entry *pmbe) 66 if (test_and_set_bit(pos, &pmb_map))
92{ 67 goto repeat;
93 struct pmb_entry **p, *tmp;
94 68
95 for (p = &pmb_list; (tmp = *p); p = &tmp->next) 69 return pos;
96 if (tmp == pmbe) {
97 *p = tmp->next;
98 return;
99 }
100} 70}
101 71
102struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn, 72static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
103 unsigned long flags) 73 unsigned long flags, int entry)
104{ 74{
105 struct pmb_entry *pmbe; 75 struct pmb_entry *pmbe;
76 int pos;
77
78 if (entry == PMB_NO_ENTRY) {
79 pos = pmb_alloc_entry();
80 if (pos < 0)
81 return ERR_PTR(pos);
82 } else {
83 if (test_bit(entry, &pmb_map))
84 return ERR_PTR(-ENOSPC);
85 pos = entry;
86 }
106 87
107 pmbe = kmem_cache_alloc(pmb_cache, GFP_KERNEL); 88 pmbe = &pmb_entry_list[pos];
108 if (!pmbe) 89 if (!pmbe)
109 return ERR_PTR(-ENOMEM); 90 return ERR_PTR(-ENOMEM);
110 91
111 pmbe->vpn = vpn; 92 pmbe->vpn = vpn;
112 pmbe->ppn = ppn; 93 pmbe->ppn = ppn;
113 pmbe->flags = flags; 94 pmbe->flags = flags;
114 95 pmbe->entry = pos;
115 spin_lock_irq(&pmb_list_lock);
116 pmb_list_add(pmbe);
117 spin_unlock_irq(&pmb_list_lock);
118 96
119 return pmbe; 97 return pmbe;
120} 98}
121 99
122void pmb_free(struct pmb_entry *pmbe) 100static void pmb_free(struct pmb_entry *pmbe)
123{ 101{
124 spin_lock_irq(&pmb_list_lock); 102 int pos = pmbe->entry;
125 pmb_list_del(pmbe);
126 spin_unlock_irq(&pmb_list_lock);
127 103
128 kmem_cache_free(pmb_cache, pmbe); 104 pmbe->vpn = 0;
105 pmbe->ppn = 0;
106 pmbe->flags = 0;
107 pmbe->entry = 0;
108
109 clear_bit(pos, &pmb_map);
129} 110}
130 111
131/* 112/*
132 * Must be in P2 for __set_pmb_entry() 113 * Must be in P2 for __set_pmb_entry()
133 */ 114 */
134int __set_pmb_entry(unsigned long vpn, unsigned long ppn, 115static void __set_pmb_entry(unsigned long vpn, unsigned long ppn,
135 unsigned long flags, int *entry) 116 unsigned long flags, int pos)
136{ 117{
137 unsigned int pos = *entry;
138
139 if (unlikely(pos == PMB_NO_ENTRY))
140 pos = find_first_zero_bit(&pmb_map, NR_PMB_ENTRIES);
141
142repeat:
143 if (unlikely(pos > NR_PMB_ENTRIES))
144 return -ENOSPC;
145
146 if (test_and_set_bit(pos, &pmb_map)) {
147 pos = find_first_zero_bit(&pmb_map, NR_PMB_ENTRIES);
148 goto repeat;
149 }
150
151 ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos)); 118 ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos));
152 119
153#ifdef CONFIG_CACHE_WRITETHROUGH 120#ifdef CONFIG_CACHE_WRITETHROUGH
@@ -161,35 +128,21 @@ repeat:
161#endif 128#endif
162 129
163 ctrl_outl(ppn | flags | PMB_V, mk_pmb_data(pos)); 130 ctrl_outl(ppn | flags | PMB_V, mk_pmb_data(pos));
164
165 *entry = pos;
166
167 return 0;
168} 131}
169 132
170int __uses_jump_to_uncached set_pmb_entry(struct pmb_entry *pmbe) 133static void __uses_jump_to_uncached set_pmb_entry(struct pmb_entry *pmbe)
171{ 134{
172 int ret;
173
174 jump_to_uncached(); 135 jump_to_uncached();
175 ret = __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &pmbe->entry); 136 __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, pmbe->entry);
176 back_to_cached(); 137 back_to_cached();
177
178 return ret;
179} 138}
180 139
181void __uses_jump_to_uncached clear_pmb_entry(struct pmb_entry *pmbe) 140static void __uses_jump_to_uncached clear_pmb_entry(struct pmb_entry *pmbe)
182{ 141{
183 unsigned int entry = pmbe->entry; 142 unsigned int entry = pmbe->entry;
184 unsigned long addr; 143 unsigned long addr;
185 144
186 /* 145 if (unlikely(entry >= NR_PMB_ENTRIES))
187 * Don't allow clearing of wired init entries, P1 or P2 access
188 * without a corresponding mapping in the PMB will lead to reset
189 * by the TLB.
190 */
191 if (unlikely(entry < ARRAY_SIZE(pmb_init_map) ||
192 entry >= NR_PMB_ENTRIES))
193 return; 146 return;
194 147
195 jump_to_uncached(); 148 jump_to_uncached();
@@ -202,8 +155,6 @@ void __uses_jump_to_uncached clear_pmb_entry(struct pmb_entry *pmbe)
202 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr); 155 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr);
203 156
204 back_to_cached(); 157 back_to_cached();
205
206 clear_bit(entry, &pmb_map);
207} 158}
208 159
209 160
@@ -239,23 +190,17 @@ long pmb_remap(unsigned long vaddr, unsigned long phys,
239 190
240again: 191again:
241 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) { 192 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
242 int ret;
243
244 if (size < pmb_sizes[i].size) 193 if (size < pmb_sizes[i].size)
245 continue; 194 continue;
246 195
247 pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag); 196 pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag,
197 PMB_NO_ENTRY);
248 if (IS_ERR(pmbe)) { 198 if (IS_ERR(pmbe)) {
249 err = PTR_ERR(pmbe); 199 err = PTR_ERR(pmbe);
250 goto out; 200 goto out;
251 } 201 }
252 202
253 ret = set_pmb_entry(pmbe); 203 set_pmb_entry(pmbe);
254 if (ret != 0) {
255 pmb_free(pmbe);
256 err = -EBUSY;
257 goto out;
258 }
259 204
260 phys += pmb_sizes[i].size; 205 phys += pmb_sizes[i].size;
261 vaddr += pmb_sizes[i].size; 206 vaddr += pmb_sizes[i].size;
@@ -292,11 +237,16 @@ out:
292 237
293void pmb_unmap(unsigned long addr) 238void pmb_unmap(unsigned long addr)
294{ 239{
295 struct pmb_entry **p, *pmbe; 240 struct pmb_entry *pmbe = NULL;
241 int i;
296 242
297 for (p = &pmb_list; (pmbe = *p); p = &pmbe->next) 243 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
298 if (pmbe->vpn == addr) 244 if (test_bit(i, &pmb_map)) {
299 break; 245 pmbe = &pmb_entry_list[i];
246 if (pmbe->vpn == addr)
247 break;
248 }
249 }
300 250
301 if (unlikely(!pmbe)) 251 if (unlikely(!pmbe))
302 return; 252 return;
@@ -306,13 +256,22 @@ void pmb_unmap(unsigned long addr)
306 256
307static void __pmb_unmap(struct pmb_entry *pmbe) 257static void __pmb_unmap(struct pmb_entry *pmbe)
308{ 258{
309 WARN_ON(!test_bit(pmbe->entry, &pmb_map)); 259 BUG_ON(!test_bit(pmbe->entry, &pmb_map));
310 260
311 do { 261 do {
312 struct pmb_entry *pmblink = pmbe; 262 struct pmb_entry *pmblink = pmbe;
313 263
314 if (pmbe->entry != PMB_NO_ENTRY) 264 /*
315 clear_pmb_entry(pmbe); 265 * We may be called before this pmb_entry has been
266 * entered into the PMB table via set_pmb_entry(), but
267 * that's OK because we've allocated a unique slot for
268 * this entry in pmb_alloc() (even if we haven't filled
269 * it yet).
270 *
271 * Therefore, calling clear_pmb_entry() is safe as no
272 * other mapping can be using that slot.
273 */
274 clear_pmb_entry(pmbe);
316 275
317 pmbe = pmblink->link; 276 pmbe = pmblink->link;
318 277
@@ -320,42 +279,34 @@ static void __pmb_unmap(struct pmb_entry *pmbe)
320 } while (pmbe); 279 } while (pmbe);
321} 280}
322 281
323static void pmb_cache_ctor(void *pmb) 282#ifdef CONFIG_PMB
283int __uses_jump_to_uncached pmb_init(void)
324{ 284{
325 struct pmb_entry *pmbe = pmb; 285 unsigned int i;
326 286 long size, ret;
327 memset(pmb, 0, sizeof(struct pmb_entry));
328
329 pmbe->entry = PMB_NO_ENTRY;
330}
331
332static int __uses_jump_to_uncached pmb_init(void)
333{
334 unsigned int nr_entries = ARRAY_SIZE(pmb_init_map);
335 unsigned int entry, i;
336
337 BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES));
338
339 pmb_cache = kmem_cache_create("pmb", sizeof(struct pmb_entry), 0,
340 SLAB_PANIC, pmb_cache_ctor);
341 287
342 jump_to_uncached(); 288 jump_to_uncached();
343 289
344 /* 290 /*
345 * Ordering is important, P2 must be mapped in the PMB before we 291 * Insert PMB entries for the P1 and P2 areas so that, after
346 * can set PMB.SE, and P1 must be mapped before we jump back to 292 * we've switched the MMU to 32-bit mode, the semantics of P1
347 * P1 space. 293 * and P2 are the same as in 29-bit mode, e.g.
294 *
295 * P1 - provides a cached window onto physical memory
296 * P2 - provides an uncached window onto physical memory
348 */ 297 */
349 for (entry = 0; entry < nr_entries; entry++) { 298 size = __MEMORY_START + __MEMORY_SIZE;
350 struct pmb_entry *pmbe = pmb_init_map + entry;
351 299
352 __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &entry); 300 ret = pmb_remap(P1SEG, 0x00000000, size, PMB_C);
353 } 301 BUG_ON(ret != size);
302
303 ret = pmb_remap(P2SEG, 0x00000000, size, PMB_WT | PMB_UB);
304 BUG_ON(ret != size);
354 305
355 ctrl_outl(0, PMB_IRMCR); 306 ctrl_outl(0, PMB_IRMCR);
356 307
357 /* PMB.SE and UB[7] */ 308 /* PMB.SE and UB[7] */
358 ctrl_outl((1 << 31) | (1 << 7), PMB_PASCR); 309 ctrl_outl(PASCR_SE | (1 << 7), PMB_PASCR);
359 310
360 /* Flush out the TLB */ 311 /* Flush out the TLB */
361 i = ctrl_inl(MMUCR); 312 i = ctrl_inl(MMUCR);
@@ -366,7 +317,53 @@ static int __uses_jump_to_uncached pmb_init(void)
366 317
367 return 0; 318 return 0;
368} 319}
369arch_initcall(pmb_init); 320#else
321int __uses_jump_to_uncached pmb_init(void)
322{
323 int i;
324 unsigned long addr, data;
325
326 jump_to_uncached();
327
328 for (i = 0; i < PMB_ENTRY_MAX; i++) {
329 struct pmb_entry *pmbe;
330 unsigned long vpn, ppn, flags;
331
332 addr = PMB_DATA + (i << PMB_E_SHIFT);
333 data = ctrl_inl(addr);
334 if (!(data & PMB_V))
335 continue;
336
337 if (data & PMB_C) {
338#if defined(CONFIG_CACHE_WRITETHROUGH)
339 data |= PMB_WT;
340#elif defined(CONFIG_CACHE_WRITEBACK)
341 data &= ~PMB_WT;
342#else
343 data &= ~(PMB_C | PMB_WT);
344#endif
345 }
346 ctrl_outl(data, addr);
347
348 ppn = data & PMB_PFN_MASK;
349
350 flags = data & (PMB_C | PMB_WT | PMB_UB);
351 flags |= data & PMB_SZ_MASK;
352
353 addr = PMB_ADDR + (i << PMB_E_SHIFT);
354 data = ctrl_inl(addr);
355
356 vpn = data & PMB_PFN_MASK;
357
358 pmbe = pmb_alloc(vpn, ppn, flags, i);
359 WARN_ON(IS_ERR(pmbe));
360 }
361
362 back_to_cached();
363
364 return 0;
365}
366#endif /* CONFIG_PMB */
370 367
371static int pmb_seq_show(struct seq_file *file, void *iter) 368static int pmb_seq_show(struct seq_file *file, void *iter)
372{ 369{
@@ -434,15 +431,18 @@ postcore_initcall(pmb_debugfs_init);
434static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state) 431static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
435{ 432{
436 static pm_message_t prev_state; 433 static pm_message_t prev_state;
434 int i;
437 435
438 /* Restore the PMB after a resume from hibernation */ 436 /* Restore the PMB after a resume from hibernation */
439 if (state.event == PM_EVENT_ON && 437 if (state.event == PM_EVENT_ON &&
440 prev_state.event == PM_EVENT_FREEZE) { 438 prev_state.event == PM_EVENT_FREEZE) {
441 struct pmb_entry *pmbe; 439 struct pmb_entry *pmbe;
442 spin_lock_irq(&pmb_list_lock); 440 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
443 for (pmbe = pmb_list; pmbe; pmbe = pmbe->next) 441 if (test_bit(i, &pmb_map)) {
444 set_pmb_entry(pmbe); 442 pmbe = &pmb_entry_list[i];
445 spin_unlock_irq(&pmb_list_lock); 443 set_pmb_entry(pmbe);
444 }
445 }
446 } 446 }
447 prev_state = state; 447 prev_state = state;
448 return 0; 448 return 0;
diff --git a/arch/sh/oprofile/Makefile b/arch/sh/oprofile/Makefile
index 8e6eec91c14c..4886c5c1786c 100644
--- a/arch/sh/oprofile/Makefile
+++ b/arch/sh/oprofile/Makefile
@@ -7,7 +7,3 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
7 timer_int.o ) 7 timer_int.o )
8 8
9oprofile-y := $(DRIVER_OBJS) common.o backtrace.o 9oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
10
11oprofile-$(CONFIG_CPU_SUBTYPE_SH7750S) += op_model_sh7750.o
12oprofile-$(CONFIG_CPU_SUBTYPE_SH7750) += op_model_sh7750.o
13oprofile-$(CONFIG_CPU_SUBTYPE_SH7091) += op_model_sh7750.o
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index 44f4e31c6d63..ac604937f3ee 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -20,9 +20,6 @@
20#include <asm/processor.h> 20#include <asm/processor.h>
21#include "op_impl.h" 21#include "op_impl.h"
22 22
23extern struct op_sh_model op_model_sh7750_ops __weak;
24extern struct op_sh_model op_model_sh4a_ops __weak;
25
26static struct op_sh_model *model; 23static struct op_sh_model *model;
27 24
28static struct op_counter_config ctr[20]; 25static struct op_counter_config ctr[20];
@@ -94,33 +91,14 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
94 */ 91 */
95 ops->backtrace = sh_backtrace; 92 ops->backtrace = sh_backtrace;
96 93
97 switch (current_cpu_data.type) { 94 /*
98 /* SH-4 types */ 95 * XXX
99 case CPU_SH7750: 96 *
100 case CPU_SH7750S: 97 * All of the SH7750/SH-4A counters have been converted to perf,
101 lmodel = &op_model_sh7750_ops; 98 * this infrastructure hook is left for other users until they've
102 break; 99 * had a chance to convert over, at which point all of this
103 100 * will be deleted.
104 /* SH-4A types */ 101 */
105 case CPU_SH7763:
106 case CPU_SH7770:
107 case CPU_SH7780:
108 case CPU_SH7781:
109 case CPU_SH7785:
110 case CPU_SH7786:
111 case CPU_SH7723:
112 case CPU_SH7724:
113 case CPU_SHX3:
114 lmodel = &op_model_sh4a_ops;
115 break;
116
117 /* SH4AL-DSP types */
118 case CPU_SH7343:
119 case CPU_SH7722:
120 case CPU_SH7366:
121 lmodel = &op_model_sh4a_ops;
122 break;
123 }
124 102
125 if (!lmodel) 103 if (!lmodel)
126 return -ENODEV; 104 return -ENODEV;
diff --git a/arch/sh/oprofile/op_impl.h b/arch/sh/oprofile/op_impl.h
index 4d509975eba6..1244479ceb29 100644
--- a/arch/sh/oprofile/op_impl.h
+++ b/arch/sh/oprofile/op_impl.h
@@ -6,7 +6,7 @@ struct op_counter_config {
6 unsigned long enabled; 6 unsigned long enabled;
7 unsigned long event; 7 unsigned long event;
8 8
9 unsigned long long count; 9 unsigned long count;
10 10
11 /* Dummy values for userspace tool compliance */ 11 /* Dummy values for userspace tool compliance */
12 unsigned long kernel; 12 unsigned long kernel;
diff --git a/arch/sh/oprofile/op_model_sh7750.c b/arch/sh/oprofile/op_model_sh7750.c
deleted file mode 100644
index c892c7c30c2f..000000000000
--- a/arch/sh/oprofile/op_model_sh7750.c
+++ /dev/null
@@ -1,255 +0,0 @@
1/*
2 * arch/sh/oprofile/op_model_sh7750.c
3 *
4 * OProfile support for SH7750/SH7750S Performance Counters
5 *
6 * Copyright (C) 2003 - 2008 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/oprofile.h>
14#include <linux/profile.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/fs.h>
20#include "op_impl.h"
21
22#define PM_CR_BASE 0xff000084 /* 16-bit */
23#define PM_CTR_BASE 0xff100004 /* 32-bit */
24
25#define PMCR(n) (PM_CR_BASE + ((n) * 0x04))
26#define PMCTRH(n) (PM_CTR_BASE + 0x00 + ((n) * 0x08))
27#define PMCTRL(n) (PM_CTR_BASE + 0x04 + ((n) * 0x08))
28
29#define PMCR_PMM_MASK 0x0000003f
30
31#define PMCR_CLKF 0x00000100
32#define PMCR_PMCLR 0x00002000
33#define PMCR_PMST 0x00004000
34#define PMCR_PMEN 0x00008000
35
36struct op_sh_model op_model_sh7750_ops;
37
38#define NR_CNTRS 2
39
40static struct sh7750_ppc_register_config {
41 unsigned int ctrl;
42 unsigned long cnt_hi;
43 unsigned long cnt_lo;
44} regcache[NR_CNTRS];
45
46/*
47 * There are a number of events supported by each counter (33 in total).
48 * Since we have 2 counters, each counter will take the event code as it
49 * corresponds to the PMCR PMM setting. Each counter can be configured
50 * independently.
51 *
52 * Event Code Description
53 * ---------- -----------
54 *
55 * 0x01 Operand read access
56 * 0x02 Operand write access
57 * 0x03 UTLB miss
58 * 0x04 Operand cache read miss
59 * 0x05 Operand cache write miss
60 * 0x06 Instruction fetch (w/ cache)
61 * 0x07 Instruction TLB miss
62 * 0x08 Instruction cache miss
63 * 0x09 All operand accesses
64 * 0x0a All instruction accesses
65 * 0x0b OC RAM operand access
66 * 0x0d On-chip I/O space access
67 * 0x0e Operand access (r/w)
68 * 0x0f Operand cache miss (r/w)
69 * 0x10 Branch instruction
70 * 0x11 Branch taken
71 * 0x12 BSR/BSRF/JSR
72 * 0x13 Instruction execution
73 * 0x14 Instruction execution in parallel
74 * 0x15 FPU Instruction execution
75 * 0x16 Interrupt
76 * 0x17 NMI
77 * 0x18 trapa instruction execution
78 * 0x19 UBCA match
79 * 0x1a UBCB match
80 * 0x21 Instruction cache fill
81 * 0x22 Operand cache fill
82 * 0x23 Elapsed time
83 * 0x24 Pipeline freeze by I-cache miss
84 * 0x25 Pipeline freeze by D-cache miss
85 * 0x27 Pipeline freeze by branch instruction
86 * 0x28 Pipeline freeze by CPU register
87 * 0x29 Pipeline freeze by FPU
88 *
89 * Unfortunately we don't have a native exception or interrupt for counter
90 * overflow (although since these counters can run for 16.3 days without
91 * overflowing, it's not really necessary).
92 *
93 * OProfile on the other hand likes to have samples taken periodically, so
94 * for now we just piggyback the timer interrupt to get the expected
95 * behavior.
96 */
97
98static int sh7750_timer_notify(struct pt_regs *regs)
99{
100 oprofile_add_sample(regs, 0);
101 return 0;
102}
103
104static u64 sh7750_read_counter(int counter)
105{
106 return (u64)((u64)(__raw_readl(PMCTRH(counter)) & 0xffff) << 32) |
107 __raw_readl(PMCTRL(counter));
108}
109
110/*
111 * Files will be in a path like:
112 *
113 * /<oprofilefs mount point>/<counter number>/<file>
114 *
115 * So when dealing with <file>, we look to the parent dentry for the counter
116 * number.
117 */
118static inline int to_counter(struct file *file)
119{
120 const unsigned char *name = file->f_path.dentry->d_parent->d_name.name;
121
122 return (int)simple_strtol(name, NULL, 10);
123}
124
125/*
126 * XXX: We have 48-bit counters, so we're probably going to want something
127 * more along the lines of oprofilefs_ullong_to_user().. Truncating to
128 * unsigned long works fine for now though, as long as we don't attempt to
129 * profile for too horribly long.
130 */
131static ssize_t sh7750_read_count(struct file *file, char __user *buf,
132 size_t count, loff_t *ppos)
133{
134 int counter = to_counter(file);
135 u64 val = sh7750_read_counter(counter);
136
137 return oprofilefs_ulong_to_user((unsigned long)val, buf, count, ppos);
138}
139
140static ssize_t sh7750_write_count(struct file *file, const char __user *buf,
141 size_t count, loff_t *ppos)
142{
143 int counter = to_counter(file);
144 unsigned long val;
145
146 if (oprofilefs_ulong_from_user(&val, buf, count))
147 return -EFAULT;
148
149 /*
150 * Any write will clear the counter, although only 0 should be
151 * written for this purpose, as we do not support setting the
152 * counter to an arbitrary value.
153 */
154 WARN_ON(val != 0);
155
156 __raw_writew(__raw_readw(PMCR(counter)) | PMCR_PMCLR, PMCR(counter));
157
158 return count;
159}
160
161static const struct file_operations count_fops = {
162 .read = sh7750_read_count,
163 .write = sh7750_write_count,
164};
165
166static int sh7750_ppc_create_files(struct super_block *sb, struct dentry *dir)
167{
168 return oprofilefs_create_file(sb, dir, "count", &count_fops);
169}
170
171static void sh7750_ppc_reg_setup(struct op_counter_config *ctr)
172{
173 unsigned int counters = op_model_sh7750_ops.num_counters;
174 int i;
175
176 for (i = 0; i < counters; i++) {
177 regcache[i].ctrl = 0;
178 regcache[i].cnt_hi = 0;
179 regcache[i].cnt_lo = 0;
180
181 if (!ctr[i].enabled)
182 continue;
183
184 regcache[i].ctrl |= ctr[i].event | PMCR_PMEN | PMCR_PMST;
185 regcache[i].cnt_hi = (unsigned long)((ctr->count >> 32) & 0xffff);
186 regcache[i].cnt_lo = (unsigned long)(ctr->count & 0xffffffff);
187 }
188}
189
190static void sh7750_ppc_cpu_setup(void *args)
191{
192 unsigned int counters = op_model_sh7750_ops.num_counters;
193 int i;
194
195 for (i = 0; i < counters; i++) {
196 __raw_writew(0, PMCR(i));
197 __raw_writel(regcache[i].cnt_hi, PMCTRH(i));
198 __raw_writel(regcache[i].cnt_lo, PMCTRL(i));
199 }
200}
201
202static void sh7750_ppc_cpu_start(void *args)
203{
204 unsigned int counters = op_model_sh7750_ops.num_counters;
205 int i;
206
207 for (i = 0; i < counters; i++)
208 __raw_writew(regcache[i].ctrl, PMCR(i));
209}
210
211static void sh7750_ppc_cpu_stop(void *args)
212{
213 unsigned int counters = op_model_sh7750_ops.num_counters;
214 int i;
215
216 /* Disable the counters */
217 for (i = 0; i < counters; i++)
218 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
219}
220
221static inline void sh7750_ppc_reset(void)
222{
223 unsigned int counters = op_model_sh7750_ops.num_counters;
224 int i;
225
226 /* Clear the counters */
227 for (i = 0; i < counters; i++)
228 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMCLR, PMCR(i));
229}
230
231static int sh7750_ppc_init(void)
232{
233 sh7750_ppc_reset();
234
235 return register_timer_hook(sh7750_timer_notify);
236}
237
238static void sh7750_ppc_exit(void)
239{
240 unregister_timer_hook(sh7750_timer_notify);
241
242 sh7750_ppc_reset();
243}
244
245struct op_sh_model op_model_sh7750_ops = {
246 .cpu_type = "sh/sh7750",
247 .num_counters = NR_CNTRS,
248 .reg_setup = sh7750_ppc_reg_setup,
249 .cpu_setup = sh7750_ppc_cpu_setup,
250 .cpu_start = sh7750_ppc_cpu_start,
251 .cpu_stop = sh7750_ppc_cpu_stop,
252 .init = sh7750_ppc_init,
253 .exit = sh7750_ppc_exit,
254 .create_files = sh7750_ppc_create_files,
255};
diff --git a/arch/sparc/include/asm/fcntl.h b/arch/sparc/include/asm/fcntl.h
index d4d9c9d852c3..3b9cfb39175e 100644
--- a/arch/sparc/include/asm/fcntl.h
+++ b/arch/sparc/include/asm/fcntl.h
@@ -1,14 +1,12 @@
1#ifndef _SPARC_FCNTL_H 1#ifndef _SPARC_FCNTL_H
2#define _SPARC_FCNTL_H 2#define _SPARC_FCNTL_H
3 3
4/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
5 located on an ext2 file system */
6#define O_APPEND 0x0008 4#define O_APPEND 0x0008
7#define FASYNC 0x0040 /* fcntl, for BSD compatibility */ 5#define FASYNC 0x0040 /* fcntl, for BSD compatibility */
8#define O_CREAT 0x0200 /* not fcntl */ 6#define O_CREAT 0x0200 /* not fcntl */
9#define O_TRUNC 0x0400 /* not fcntl */ 7#define O_TRUNC 0x0400 /* not fcntl */
10#define O_EXCL 0x0800 /* not fcntl */ 8#define O_EXCL 0x0800 /* not fcntl */
11#define O_SYNC 0x2000 9#define O_DSYNC 0x2000 /* used to be O_SYNC, see below */
12#define O_NONBLOCK 0x4000 10#define O_NONBLOCK 0x4000
13#if defined(__sparc__) && defined(__arch64__) 11#if defined(__sparc__) && defined(__arch64__)
14#define O_NDELAY 0x0004 12#define O_NDELAY 0x0004
@@ -20,6 +18,21 @@
20#define O_DIRECT 0x100000 /* direct disk access hint */ 18#define O_DIRECT 0x100000 /* direct disk access hint */
21#define O_NOATIME 0x200000 19#define O_NOATIME 0x200000
22#define O_CLOEXEC 0x400000 20#define O_CLOEXEC 0x400000
21/*
22 * Before Linux 2.6.32 only O_DSYNC semantics were implemented, but using
23 * the O_SYNC flag. We continue to use the existing numerical value
24 * for O_DSYNC semantics now, but using the correct symbolic name for it.
25 * This new value is used to request true Posix O_SYNC semantics. It is
26 * defined in this strange way to make sure applications compiled against
27 * new headers get at least O_DSYNC semantics on older kernels.
28 *
29 * This has the nice side-effect that we can simply test for O_DSYNC
30 * wherever we do not care if O_DSYNC or O_SYNC is used.
31 *
32 * Note: __O_SYNC must never be used directly.
33 */
34#define __O_SYNC 0x800000
35#define O_SYNC (__O_SYNC|O_DSYNC)
23 36
24#define F_GETOWN 5 /* for sockets. */ 37#define F_GETOWN 5 /* for sockets. */
25#define F_SETOWN 6 /* for sockets. */ 38#define F_SETOWN 6 /* for sockets. */
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index b63e51c3c3ee..b0576df6ec83 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -16,8 +16,6 @@
16 16
17#define PCI_IRQ_NONE 0xffffffff 17#define PCI_IRQ_NONE 0xffffffff
18 18
19#define PCI_CACHE_LINE_BYTES 64
20
21static inline void pcibios_set_master(struct pci_dev *dev) 19static inline void pcibios_set_master(struct pci_dev *dev)
22{ 20{
23 /* No special bus mastering setup handling */ 21 /* No special bus mastering setup handling */
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index c68648662802..b85374f7cf94 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -1081,3 +1081,10 @@ void pci_resource_to_user(const struct pci_dev *pdev, int bar,
1081 *start = rp->start - offset; 1081 *start = rp->start - offset;
1082 *end = rp->end - offset; 1082 *end = rp->end - offset;
1083} 1083}
1084
1085static int __init pcibios_init(void)
1086{
1087 pci_dfl_cache_line_size = 64 >> 2;
1088 return 0;
1089}
1090subsys_initcall(pcibios_init);
diff --git a/arch/sparc/kernel/sys_sparc32.c b/arch/sparc/kernel/sys_sparc32.c
index 00abe87e5b51..dc0ac197e7e2 100644
--- a/arch/sparc/kernel/sys_sparc32.c
+++ b/arch/sparc/kernel/sys_sparc32.c
@@ -564,28 +564,6 @@ asmlinkage long sparc32_open(const char __user *filename,
564 return do_sys_open(AT_FDCWD, filename, flags, mode); 564 return do_sys_open(AT_FDCWD, filename, flags, mode);
565} 565}
566 566
567extern unsigned long do_mremap(unsigned long addr,
568 unsigned long old_len, unsigned long new_len,
569 unsigned long flags, unsigned long new_addr);
570
571asmlinkage unsigned long sys32_mremap(unsigned long addr,
572 unsigned long old_len, unsigned long new_len,
573 unsigned long flags, u32 __new_addr)
574{
575 unsigned long ret = -EINVAL;
576 unsigned long new_addr = __new_addr;
577
578 if (unlikely(sparc_mmap_check(addr, old_len)))
579 goto out;
580 if (unlikely(sparc_mmap_check(new_addr, new_len)))
581 goto out;
582 down_write(&current->mm->mmap_sem);
583 ret = do_mremap(addr, old_len, new_len, flags, new_addr);
584 up_write(&current->mm->mmap_sem);
585out:
586 return ret;
587}
588
589long sys32_lookup_dcookie(unsigned long cookie_high, 567long sys32_lookup_dcookie(unsigned long cookie_high,
590 unsigned long cookie_low, 568 unsigned long cookie_low,
591 char __user *buf, size_t len) 569 char __user *buf, size_t len)
diff --git a/arch/sparc/kernel/sys_sparc_32.c b/arch/sparc/kernel/sys_sparc_32.c
index 03035c852a43..3a82e65d8db2 100644
--- a/arch/sparc/kernel/sys_sparc_32.c
+++ b/arch/sparc/kernel/sys_sparc_32.c
@@ -45,7 +45,8 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi
45 /* We do not accept a shared mapping if it would violate 45 /* We do not accept a shared mapping if it would violate
46 * cache aliasing constraints. 46 * cache aliasing constraints.
47 */ 47 */
48 if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1))) 48 if ((flags & MAP_SHARED) &&
49 ((addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)))
49 return -EINVAL; 50 return -EINVAL;
50 return addr; 51 return addr;
51 } 52 }
@@ -79,15 +80,6 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi
79 } 80 }
80} 81}
81 82
82asmlinkage unsigned long sparc_brk(unsigned long brk)
83{
84 if(ARCH_SUN4C) {
85 if ((brk & 0xe0000000) != (current->mm->brk & 0xe0000000))
86 return current->mm->brk;
87 }
88 return sys_brk(brk);
89}
90
91/* 83/*
92 * sys_pipe() is the normal C calling standard for creating 84 * sys_pipe() is the normal C calling standard for creating
93 * a pipe. It's not the way unix traditionally does this, though. 85 * a pipe. It's not the way unix traditionally does this, though.
@@ -234,31 +226,6 @@ int sparc_mmap_check(unsigned long addr, unsigned long len)
234} 226}
235 227
236/* Linux version of mmap */ 228/* Linux version of mmap */
237static unsigned long do_mmap2(unsigned long addr, unsigned long len,
238 unsigned long prot, unsigned long flags, unsigned long fd,
239 unsigned long pgoff)
240{
241 struct file * file = NULL;
242 unsigned long retval = -EBADF;
243
244 if (!(flags & MAP_ANONYMOUS)) {
245 file = fget(fd);
246 if (!file)
247 goto out;
248 }
249
250 len = PAGE_ALIGN(len);
251 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
252
253 down_write(&current->mm->mmap_sem);
254 retval = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
255 up_write(&current->mm->mmap_sem);
256
257 if (file)
258 fput(file);
259out:
260 return retval;
261}
262 229
263asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len, 230asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len,
264 unsigned long prot, unsigned long flags, unsigned long fd, 231 unsigned long prot, unsigned long flags, unsigned long fd,
@@ -266,14 +233,16 @@ asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len,
266{ 233{
267 /* Make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE 234 /* Make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE
268 we have. */ 235 we have. */
269 return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT - 12)); 236 return sys_mmap_pgoff(addr, len, prot, flags, fd,
237 pgoff >> (PAGE_SHIFT - 12));
270} 238}
271 239
272asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len, 240asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len,
273 unsigned long prot, unsigned long flags, unsigned long fd, 241 unsigned long prot, unsigned long flags, unsigned long fd,
274 unsigned long off) 242 unsigned long off)
275{ 243{
276 return do_mmap2(addr, len, prot, flags, fd, off >> PAGE_SHIFT); 244 /* no alignment check? */
245 return sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
277} 246}
278 247
279long sparc_remap_file_pages(unsigned long start, unsigned long size, 248long sparc_remap_file_pages(unsigned long start, unsigned long size,
@@ -287,27 +256,6 @@ long sparc_remap_file_pages(unsigned long start, unsigned long size,
287 (pgoff >> (PAGE_SHIFT - 12)), flags); 256 (pgoff >> (PAGE_SHIFT - 12)), flags);
288} 257}
289 258
290extern unsigned long do_mremap(unsigned long addr,
291 unsigned long old_len, unsigned long new_len,
292 unsigned long flags, unsigned long new_addr);
293
294asmlinkage unsigned long sparc_mremap(unsigned long addr,
295 unsigned long old_len, unsigned long new_len,
296 unsigned long flags, unsigned long new_addr)
297{
298 unsigned long ret = -EINVAL;
299
300 if (unlikely(sparc_mmap_check(addr, old_len)))
301 goto out;
302 if (unlikely(sparc_mmap_check(new_addr, new_len)))
303 goto out;
304 down_write(&current->mm->mmap_sem);
305 ret = do_mremap(addr, old_len, new_len, flags, new_addr);
306 up_write(&current->mm->mmap_sem);
307out:
308 return ret;
309}
310
311/* we come to here via sys_nis_syscall so it can setup the regs argument */ 259/* we come to here via sys_nis_syscall so it can setup the regs argument */
312asmlinkage unsigned long 260asmlinkage unsigned long
313c_sys_nis_syscall (struct pt_regs *regs) 261c_sys_nis_syscall (struct pt_regs *regs)
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index e2d102447a43..cfa0e19abe3b 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -317,10 +317,14 @@ bottomup:
317unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr, unsigned long len, unsigned long pgoff, unsigned long flags) 317unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr, unsigned long len, unsigned long pgoff, unsigned long flags)
318{ 318{
319 unsigned long align_goal, addr = -ENOMEM; 319 unsigned long align_goal, addr = -ENOMEM;
320 unsigned long (*get_area)(struct file *, unsigned long,
321 unsigned long, unsigned long, unsigned long);
322
323 get_area = current->mm->get_unmapped_area;
320 324
321 if (flags & MAP_FIXED) { 325 if (flags & MAP_FIXED) {
322 /* Ok, don't mess with it. */ 326 /* Ok, don't mess with it. */
323 return get_unmapped_area(NULL, orig_addr, len, pgoff, flags); 327 return get_area(NULL, orig_addr, len, pgoff, flags);
324 } 328 }
325 flags &= ~MAP_SHARED; 329 flags &= ~MAP_SHARED;
326 330
@@ -333,7 +337,7 @@ unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr, u
333 align_goal = (64UL * 1024); 337 align_goal = (64UL * 1024);
334 338
335 do { 339 do {
336 addr = get_unmapped_area(NULL, orig_addr, len + (align_goal - PAGE_SIZE), pgoff, flags); 340 addr = get_area(NULL, orig_addr, len + (align_goal - PAGE_SIZE), pgoff, flags);
337 if (!(addr & ~PAGE_MASK)) { 341 if (!(addr & ~PAGE_MASK)) {
338 addr = (addr + (align_goal - 1UL)) & ~(align_goal - 1UL); 342 addr = (addr + (align_goal - 1UL)) & ~(align_goal - 1UL);
339 break; 343 break;
@@ -351,7 +355,7 @@ unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr, u
351 * be obtained. 355 * be obtained.
352 */ 356 */
353 if (addr & ~PAGE_MASK) 357 if (addr & ~PAGE_MASK)
354 addr = get_unmapped_area(NULL, orig_addr, len, pgoff, flags); 358 addr = get_area(NULL, orig_addr, len, pgoff, flags);
355 359
356 return addr; 360 return addr;
357} 361}
@@ -399,18 +403,6 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
399 } 403 }
400} 404}
401 405
402SYSCALL_DEFINE1(sparc_brk, unsigned long, brk)
403{
404 /* People could try to be nasty and use ta 0x6d in 32bit programs */
405 if (test_thread_flag(TIF_32BIT) && brk >= STACK_TOP32)
406 return current->mm->brk;
407
408 if (unlikely(straddles_64bit_va_hole(current->mm->brk, brk)))
409 return current->mm->brk;
410
411 return sys_brk(brk);
412}
413
414/* 406/*
415 * sys_pipe() is the normal C calling standard for creating 407 * sys_pipe() is the normal C calling standard for creating
416 * a pipe. It's not the way unix traditionally does this, though. 408 * a pipe. It's not the way unix traditionally does this, though.
@@ -568,23 +560,13 @@ SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len,
568 unsigned long, prot, unsigned long, flags, unsigned long, fd, 560 unsigned long, prot, unsigned long, flags, unsigned long, fd,
569 unsigned long, off) 561 unsigned long, off)
570{ 562{
571 struct file * file = NULL; 563 unsigned long retval = -EINVAL;
572 unsigned long retval = -EBADF;
573
574 if (!(flags & MAP_ANONYMOUS)) {
575 file = fget(fd);
576 if (!file)
577 goto out;
578 }
579 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
580 len = PAGE_ALIGN(len);
581 564
582 down_write(&current->mm->mmap_sem); 565 if ((off + PAGE_ALIGN(len)) < off)
583 retval = do_mmap(file, addr, len, prot, flags, off); 566 goto out;
584 up_write(&current->mm->mmap_sem); 567 if (off & ~PAGE_MASK)
585 568 goto out;
586 if (file) 569 retval = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
587 fput(file);
588out: 570out:
589 return retval; 571 return retval;
590} 572}
@@ -614,12 +596,6 @@ SYSCALL_DEFINE5(64_mremap, unsigned long, addr, unsigned long, old_len,
614 596
615 if (test_thread_flag(TIF_32BIT)) 597 if (test_thread_flag(TIF_32BIT))
616 goto out; 598 goto out;
617 if (unlikely(new_len >= VA_EXCLUDE_START))
618 goto out;
619 if (unlikely(sparc_mmap_check(addr, old_len)))
620 goto out;
621 if (unlikely(sparc_mmap_check(new_addr, new_len)))
622 goto out;
623 599
624 down_write(&current->mm->mmap_sem); 600 down_write(&current->mm->mmap_sem);
625 ret = do_mremap(addr, old_len, new_len, flags, new_addr); 601 ret = do_mremap(addr, old_len, new_len, flags, new_addr);
diff --git a/arch/sparc/kernel/systbls.h b/arch/sparc/kernel/systbls.h
index a63c5d2d9849..d2f999ae2b85 100644
--- a/arch/sparc/kernel/systbls.h
+++ b/arch/sparc/kernel/systbls.h
@@ -9,7 +9,6 @@
9struct new_utsname; 9struct new_utsname;
10 10
11extern asmlinkage unsigned long sys_getpagesize(void); 11extern asmlinkage unsigned long sys_getpagesize(void);
12extern asmlinkage unsigned long sparc_brk(unsigned long brk);
13extern asmlinkage long sparc_pipe(struct pt_regs *regs); 12extern asmlinkage long sparc_pipe(struct pt_regs *regs);
14extern asmlinkage long sys_ipc(unsigned int call, int first, 13extern asmlinkage long sys_ipc(unsigned int call, int first,
15 unsigned long second, 14 unsigned long second,
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index ceb1530f8aa6..801fc8e5a0e8 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -19,7 +19,7 @@ sys_call_table:
19/*0*/ .long sys_restart_syscall, sys_exit, sys_fork, sys_read, sys_write 19/*0*/ .long sys_restart_syscall, sys_exit, sys_fork, sys_read, sys_write
20/*5*/ .long sys_open, sys_close, sys_wait4, sys_creat, sys_link 20/*5*/ .long sys_open, sys_close, sys_wait4, sys_creat, sys_link
21/*10*/ .long sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys_mknod 21/*10*/ .long sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys_mknod
22/*15*/ .long sys_chmod, sys_lchown16, sparc_brk, sys_nis_syscall, sys_lseek 22/*15*/ .long sys_chmod, sys_lchown16, sys_brk, sys_nis_syscall, sys_lseek
23/*20*/ .long sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16 23/*20*/ .long sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16
24/*25*/ .long sys_vmsplice, sys_ptrace, sys_alarm, sys_sigaltstack, sys_pause 24/*25*/ .long sys_vmsplice, sys_ptrace, sys_alarm, sys_sigaltstack, sys_pause
25/*30*/ .long sys_utime, sys_lchown, sys_fchown, sys_access, sys_nice 25/*30*/ .long sys_utime, sys_lchown, sys_fchown, sys_access, sys_nice
@@ -67,7 +67,7 @@ sys_call_table:
67/*235*/ .long sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys_mlockall 67/*235*/ .long sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys_mlockall
68/*240*/ .long sys_munlockall, sys_sched_setparam, sys_sched_getparam, sys_sched_setscheduler, sys_sched_getscheduler 68/*240*/ .long sys_munlockall, sys_sched_setparam, sys_sched_getparam, sys_sched_setscheduler, sys_sched_getscheduler
69/*245*/ .long sys_sched_yield, sys_sched_get_priority_max, sys_sched_get_priority_min, sys_sched_rr_get_interval, sys_nanosleep 69/*245*/ .long sys_sched_yield, sys_sched_get_priority_max, sys_sched_get_priority_min, sys_sched_rr_get_interval, sys_nanosleep
70/*250*/ .long sparc_mremap, sys_sysctl, sys_getsid, sys_fdatasync, sys_nfsservctl 70/*250*/ .long sys_mremap, sys_sysctl, sys_getsid, sys_fdatasync, sys_nfsservctl
71/*255*/ .long sys_sync_file_range, sys_clock_settime, sys_clock_gettime, sys_clock_getres, sys_clock_nanosleep 71/*255*/ .long sys_sync_file_range, sys_clock_settime, sys_clock_gettime, sys_clock_getres, sys_clock_nanosleep
72/*260*/ .long sys_sched_getaffinity, sys_sched_setaffinity, sys_timer_settime, sys_timer_gettime, sys_timer_getoverrun 72/*260*/ .long sys_sched_getaffinity, sys_sched_setaffinity, sys_timer_settime, sys_timer_gettime, sys_timer_getoverrun
73/*265*/ .long sys_timer_delete, sys_timer_create, sys_nis_syscall, sys_io_setup, sys_io_destroy 73/*265*/ .long sys_timer_delete, sys_timer_create, sys_nis_syscall, sys_io_setup, sys_io_destroy
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index cc8e7862e95a..e575b46bd7a9 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -21,7 +21,7 @@ sys_call_table32:
21/*0*/ .word sys_restart_syscall, sys32_exit, sys_fork, sys_read, sys_write 21/*0*/ .word sys_restart_syscall, sys32_exit, sys_fork, sys_read, sys_write
22/*5*/ .word sys32_open, sys_close, sys32_wait4, sys32_creat, sys_link 22/*5*/ .word sys32_open, sys_close, sys32_wait4, sys32_creat, sys_link
23/*10*/ .word sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys32_mknod 23/*10*/ .word sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys32_mknod
24/*15*/ .word sys_chmod, sys_lchown16, sys_sparc_brk, sys32_perfctr, sys32_lseek 24/*15*/ .word sys_chmod, sys_lchown16, sys_brk, sys32_perfctr, sys32_lseek
25/*20*/ .word sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16 25/*20*/ .word sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16
26/*25*/ .word sys32_vmsplice, compat_sys_ptrace, sys_alarm, sys32_sigaltstack, sys_pause 26/*25*/ .word sys32_vmsplice, compat_sys_ptrace, sys_alarm, sys32_sigaltstack, sys_pause
27/*30*/ .word compat_sys_utime, sys_lchown, sys_fchown, sys32_access, sys32_nice 27/*30*/ .word compat_sys_utime, sys_lchown, sys_fchown, sys32_access, sys32_nice
@@ -68,7 +68,7 @@ sys_call_table32:
68 .word compat_sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys32_mlockall 68 .word compat_sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys32_mlockall
69/*240*/ .word sys_munlockall, sys32_sched_setparam, sys32_sched_getparam, sys32_sched_setscheduler, sys32_sched_getscheduler 69/*240*/ .word sys_munlockall, sys32_sched_setparam, sys32_sched_getparam, sys32_sched_setscheduler, sys32_sched_getscheduler
70 .word sys_sched_yield, sys32_sched_get_priority_max, sys32_sched_get_priority_min, sys32_sched_rr_get_interval, compat_sys_nanosleep 70 .word sys_sched_yield, sys32_sched_get_priority_max, sys32_sched_get_priority_min, sys32_sched_rr_get_interval, compat_sys_nanosleep
71/*250*/ .word sys32_mremap, compat_sys_sysctl, sys32_getsid, sys_fdatasync, sys32_nfsservctl 71/*250*/ .word sys_mremap, compat_sys_sysctl, sys32_getsid, sys_fdatasync, sys32_nfsservctl
72 .word sys32_sync_file_range, compat_sys_clock_settime, compat_sys_clock_gettime, compat_sys_clock_getres, sys32_clock_nanosleep 72 .word sys32_sync_file_range, compat_sys_clock_settime, compat_sys_clock_gettime, compat_sys_clock_getres, sys32_clock_nanosleep
73/*260*/ .word compat_sys_sched_getaffinity, compat_sys_sched_setaffinity, sys32_timer_settime, compat_sys_timer_gettime, sys_timer_getoverrun 73/*260*/ .word compat_sys_sched_getaffinity, compat_sys_sched_setaffinity, sys32_timer_settime, compat_sys_timer_gettime, sys_timer_getoverrun
74 .word sys_timer_delete, compat_sys_timer_create, sys_ni_syscall, compat_sys_io_setup, sys_io_destroy 74 .word sys_timer_delete, compat_sys_timer_create, sys_ni_syscall, compat_sys_io_setup, sys_io_destroy
@@ -96,7 +96,7 @@ sys_call_table:
96/*0*/ .word sys_restart_syscall, sparc_exit, sys_fork, sys_read, sys_write 96/*0*/ .word sys_restart_syscall, sparc_exit, sys_fork, sys_read, sys_write
97/*5*/ .word sys_open, sys_close, sys_wait4, sys_creat, sys_link 97/*5*/ .word sys_open, sys_close, sys_wait4, sys_creat, sys_link
98/*10*/ .word sys_unlink, sys_nis_syscall, sys_chdir, sys_chown, sys_mknod 98/*10*/ .word sys_unlink, sys_nis_syscall, sys_chdir, sys_chown, sys_mknod
99/*15*/ .word sys_chmod, sys_lchown, sys_sparc_brk, sys_perfctr, sys_lseek 99/*15*/ .word sys_chmod, sys_lchown, sys_brk, sys_perfctr, sys_lseek
100/*20*/ .word sys_getpid, sys_capget, sys_capset, sys_setuid, sys_getuid 100/*20*/ .word sys_getpid, sys_capget, sys_capset, sys_setuid, sys_getuid
101/*25*/ .word sys_vmsplice, sys_ptrace, sys_alarm, sys_sigaltstack, sys_nis_syscall 101/*25*/ .word sys_vmsplice, sys_ptrace, sys_alarm, sys_sigaltstack, sys_nis_syscall
102/*30*/ .word sys_utime, sys_nis_syscall, sys_nis_syscall, sys_access, sys_nice 102/*30*/ .word sys_utime, sys_nis_syscall, sys_nis_syscall, sys_access, sys_nice
diff --git a/arch/sparc/kernel/time_64.c b/arch/sparc/kernel/time_64.c
index da1218e8ee87..63f73ae8a892 100644
--- a/arch/sparc/kernel/time_64.c
+++ b/arch/sparc/kernel/time_64.c
@@ -847,7 +847,7 @@ void __init time_init(void)
847 sparc64_clockevent.min_delta_ns = 847 sparc64_clockevent.min_delta_ns =
848 clockevent_delta2ns(0xF, &sparc64_clockevent); 848 clockevent_delta2ns(0xF, &sparc64_clockevent);
849 849
850 printk("clockevent: mult[%lx] shift[%d]\n", 850 printk("clockevent: mult[%ux] shift[%d]\n",
851 sparc64_clockevent.mult, sparc64_clockevent.shift); 851 sparc64_clockevent.mult, sparc64_clockevent.shift);
852 852
853 setup_sparc64_timer(); 853 setup_sparc64_timer();
diff --git a/arch/um/drivers/mmapper_kern.c b/arch/um/drivers/mmapper_kern.c
index eb240323c40a..d22f9e5c0eac 100644
--- a/arch/um/drivers/mmapper_kern.c
+++ b/arch/um/drivers/mmapper_kern.c
@@ -16,7 +16,7 @@
16#include <linux/miscdevice.h> 16#include <linux/miscdevice.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/mm.h> 18#include <linux/mm.h>
19#include <linux/smp_lock.h> 19
20#include <asm/uaccess.h> 20#include <asm/uaccess.h>
21#include "mem_user.h" 21#include "mem_user.h"
22 22
@@ -78,7 +78,6 @@ out:
78 78
79static int mmapper_open(struct inode *inode, struct file *file) 79static int mmapper_open(struct inode *inode, struct file *file)
80{ 80{
81 cycle_kernel_lock();
82 return 0; 81 return 0;
83} 82}
84 83
@@ -115,18 +114,16 @@ static int __init mmapper_init(void)
115 v_buf = (char *) find_iomem("mmapper", &mmapper_size); 114 v_buf = (char *) find_iomem("mmapper", &mmapper_size);
116 if (mmapper_size == 0) { 115 if (mmapper_size == 0) {
117 printk(KERN_ERR "mmapper_init - find_iomem failed\n"); 116 printk(KERN_ERR "mmapper_init - find_iomem failed\n");
118 goto out; 117 return -ENODEV;
119 } 118 }
119 p_buf = __pa(v_buf);
120 120
121 err = misc_register(&mmapper_dev); 121 err = misc_register(&mmapper_dev);
122 if (err) { 122 if (err) {
123 printk(KERN_ERR "mmapper - misc_register failed, err = %d\n", 123 printk(KERN_ERR "mmapper - misc_register failed, err = %d\n",
124 err); 124 err);
125 goto out; 125 return err;;
126 } 126 }
127
128 p_buf = __pa(v_buf);
129out:
130 return 0; 127 return 0;
131} 128}
132 129
diff --git a/arch/um/drivers/random.c b/arch/um/drivers/random.c
index 6eabb7022a2d..4949044773ba 100644
--- a/arch/um/drivers/random.c
+++ b/arch/um/drivers/random.c
@@ -7,7 +7,6 @@
7 * of the GNU General Public License, incorporated herein by reference. 7 * of the GNU General Public License, incorporated herein by reference.
8 */ 8 */
9#include <linux/sched.h> 9#include <linux/sched.h>
10#include <linux/smp_lock.h>
11#include <linux/module.h> 10#include <linux/module.h>
12#include <linux/fs.h> 11#include <linux/fs.h>
13#include <linux/interrupt.h> 12#include <linux/interrupt.h>
@@ -34,8 +33,6 @@ static DECLARE_WAIT_QUEUE_HEAD(host_read_wait);
34 33
35static int rng_dev_open (struct inode *inode, struct file *filp) 34static int rng_dev_open (struct inode *inode, struct file *filp)
36{ 35{
37 cycle_kernel_lock();
38
39 /* enforce read-only access to this chrdev */ 36 /* enforce read-only access to this chrdev */
40 if ((filp->f_mode & FMODE_READ) == 0) 37 if ((filp->f_mode & FMODE_READ) == 0)
41 return -EINVAL; 38 return -EINVAL;
diff --git a/arch/um/kernel/syscall.c b/arch/um/kernel/syscall.c
index a4625c7b2bf9..cccab850c27e 100644
--- a/arch/um/kernel/syscall.c
+++ b/arch/um/kernel/syscall.c
@@ -8,6 +8,7 @@
8#include "linux/mm.h" 8#include "linux/mm.h"
9#include "linux/sched.h" 9#include "linux/sched.h"
10#include "linux/utsname.h" 10#include "linux/utsname.h"
11#include "linux/syscalls.h"
11#include "asm/current.h" 12#include "asm/current.h"
12#include "asm/mman.h" 13#include "asm/mman.h"
13#include "asm/uaccess.h" 14#include "asm/uaccess.h"
@@ -37,31 +38,6 @@ long sys_vfork(void)
37 return ret; 38 return ret;
38} 39}
39 40
40/* common code for old and new mmaps */
41long sys_mmap2(unsigned long addr, unsigned long len,
42 unsigned long prot, unsigned long flags,
43 unsigned long fd, unsigned long pgoff)
44{
45 long error = -EBADF;
46 struct file * file = NULL;
47
48 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
49 if (!(flags & MAP_ANONYMOUS)) {
50 file = fget(fd);
51 if (!file)
52 goto out;
53 }
54
55 down_write(&current->mm->mmap_sem);
56 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
57 up_write(&current->mm->mmap_sem);
58
59 if (file)
60 fput(file);
61 out:
62 return error;
63}
64
65long old_mmap(unsigned long addr, unsigned long len, 41long old_mmap(unsigned long addr, unsigned long len,
66 unsigned long prot, unsigned long flags, 42 unsigned long prot, unsigned long flags,
67 unsigned long fd, unsigned long offset) 43 unsigned long fd, unsigned long offset)
@@ -70,7 +46,7 @@ long old_mmap(unsigned long addr, unsigned long len,
70 if (offset & ~PAGE_MASK) 46 if (offset & ~PAGE_MASK)
71 goto out; 47 goto out;
72 48
73 err = sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); 49 err = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
74 out: 50 out:
75 return err; 51 return err;
76} 52}
diff --git a/arch/um/sys-i386/shared/sysdep/syscalls.h b/arch/um/sys-i386/shared/sysdep/syscalls.h
index 905698197e35..e7787679e317 100644
--- a/arch/um/sys-i386/shared/sysdep/syscalls.h
+++ b/arch/um/sys-i386/shared/sysdep/syscalls.h
@@ -20,7 +20,3 @@ extern syscall_handler_t *sys_call_table[];
20#define EXECUTE_SYSCALL(syscall, regs) \ 20#define EXECUTE_SYSCALL(syscall, regs) \
21 ((long (*)(struct syscall_args)) \ 21 ((long (*)(struct syscall_args)) \
22 (*sys_call_table[syscall]))(SYSCALL_ARGS(&regs->regs)) 22 (*sys_call_table[syscall]))(SYSCALL_ARGS(&regs->regs))
23
24extern long sys_mmap2(unsigned long addr, unsigned long len,
25 unsigned long prot, unsigned long flags,
26 unsigned long fd, unsigned long pgoff);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 1b2182b4d5c8..32a1918e1b88 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1332,7 +1332,9 @@ config MATH_EMULATION
1332 kernel, it won't hurt. 1332 kernel, it won't hurt.
1333 1333
1334config MTRR 1334config MTRR
1335 bool "MTRR (Memory Type Range Register) support" 1335 bool
1336 default y
1337 prompt "MTRR (Memory Type Range Register) support" if EMBEDDED
1336 ---help--- 1338 ---help---
1337 On Intel P6 family processors (Pentium Pro, Pentium II and later) 1339 On Intel P6 family processors (Pentium Pro, Pentium II and later)
1338 the Memory Type Range Registers (MTRRs) may be used to control 1340 the Memory Type Range Registers (MTRRs) may be used to control
@@ -1398,7 +1400,8 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
1398 1400
1399config X86_PAT 1401config X86_PAT
1400 bool 1402 bool
1401 prompt "x86 PAT support" 1403 default y
1404 prompt "x86 PAT support" if EMBEDDED
1402 depends on MTRR 1405 depends on MTRR
1403 ---help--- 1406 ---help---
1404 Use PAT attributes to setup page level cache control. 1407 Use PAT attributes to setup page level cache control.
@@ -1604,7 +1607,7 @@ config COMPAT_VDSO
1604 depends on X86_32 || IA32_EMULATION 1607 depends on X86_32 || IA32_EMULATION
1605 ---help--- 1608 ---help---
1606 Map the 32-bit VDSO to the predictable old-style address too. 1609 Map the 32-bit VDSO to the predictable old-style address too.
1607 ---help--- 1610
1608 Say N here if you are running a sufficiently recent glibc 1611 Say N here if you are running a sufficiently recent glibc
1609 version (2.3.3 or later), to remove the high-mapped 1612 version (2.3.3 or later), to remove the high-mapped
1610 VDSO mapping and to exclusively use the randomized VDSO. 1613 VDSO mapping and to exclusively use the randomized VDSO.
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 5e99762eb5c2..08e442bc3ab9 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -301,15 +301,11 @@ config X86_CPU
301 301
302# 302#
303# Define implied options from the CPU selection here 303# Define implied options from the CPU selection here
304config X86_L1_CACHE_BYTES 304config X86_INTERNODE_CACHE_SHIFT
305 int 305 int
306 default "128" if MPSC 306 default "12" if X86_VSMP
307 default "64" if GENERIC_CPU || MK8 || MCORE2 || MATOM || X86_32 307 default "7" if NUMA
308 308 default X86_L1_CACHE_SHIFT
309config X86_INTERNODE_CACHE_BYTES
310 int
311 default "4096" if X86_VSMP
312 default X86_L1_CACHE_BYTES if !X86_VSMP
313 309
314config X86_CMPXCHG 310config X86_CMPXCHG
315 def_bool X86_64 || (X86_32 && !M386) 311 def_bool X86_64 || (X86_32 && !M386)
@@ -317,9 +313,9 @@ config X86_CMPXCHG
317config X86_L1_CACHE_SHIFT 313config X86_L1_CACHE_SHIFT
318 int 314 int
319 default "7" if MPENTIUM4 || MPSC 315 default "7" if MPENTIUM4 || MPSC
316 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
320 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1 317 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
321 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX 318 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
322 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
323 319
324config X86_XADD 320config X86_XADD
325 def_bool y 321 def_bool y
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
index cbf0776dbec1..1255d953c65d 100644
--- a/arch/x86/Makefile_32.cpu
+++ b/arch/x86/Makefile_32.cpu
@@ -46,6 +46,13 @@ cflags-$(CONFIG_MGEODE_LX) += $(call cc-option,-march=geode,-march=pentium-mmx)
46# cpu entries 46# cpu entries
47cflags-$(CONFIG_X86_GENERIC) += $(call tune,generic,$(call tune,i686)) 47cflags-$(CONFIG_X86_GENERIC) += $(call tune,generic,$(call tune,i686))
48 48
49# Work around the pentium-mmx code generator madness of gcc4.4.x which
50# does stack alignment by generating horrible code _before_ the mcount
51# prologue (push %ebp, mov %esp, %ebp) which breaks the function graph
52# tracer assumptions. For i686, generic, core2 this is set by the
53# compiler anyway
54cflags-$(CONFIG_FUNCTION_GRAPH_TRACER) += $(call cc-option,-maccumulate-outgoing-args)
55
49# Bug fix for binutils: this option is required in order to keep 56# Bug fix for binutils: this option is required in order to keep
50# binutils from generating NOPL instructions against our will. 57# binutils from generating NOPL instructions against our will.
51ifneq ($(CONFIG_X86_P6_NOP),y) 58ifneq ($(CONFIG_X86_P6_NOP),y)
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index 077e1b69198e..faff0dc9c06a 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -107,8 +107,7 @@ ENTRY(startup_32)
107 lgdt gdt(%ebp) 107 lgdt gdt(%ebp)
108 108
109 /* Enable PAE mode */ 109 /* Enable PAE mode */
110 xorl %eax, %eax 110 movl $(X86_CR4_PAE), %eax
111 orl $(X86_CR4_PAE), %eax
112 movl %eax, %cr4 111 movl %eax, %cr4
113 112
114 /* 113 /*
diff --git a/arch/x86/boot/compressed/vmlinux.lds.S b/arch/x86/boot/compressed/vmlinux.lds.S
index f4193bb48782..a6f1a59a5b0c 100644
--- a/arch/x86/boot/compressed/vmlinux.lds.S
+++ b/arch/x86/boot/compressed/vmlinux.lds.S
@@ -4,6 +4,7 @@ OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT)
4 4
5#undef i386 5#undef i386
6 6
7#include <asm/cache.h>
7#include <asm/page_types.h> 8#include <asm/page_types.h>
8 9
9#ifdef CONFIG_X86_64 10#ifdef CONFIG_X86_64
@@ -46,7 +47,7 @@ SECTIONS
46 *(.data.*) 47 *(.data.*)
47 _edata = . ; 48 _edata = . ;
48 } 49 }
49 . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); 50 . = ALIGN(L1_CACHE_BYTES);
50 .bss : { 51 .bss : {
51 _bss = . ; 52 _bss = . ;
52 *(.bss) 53 *(.bss)
diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c
index d42da3802499..f767164cd5df 100644
--- a/arch/x86/boot/video.c
+++ b/arch/x86/boot/video.c
@@ -27,6 +27,12 @@ static void store_cursor_position(void)
27 27
28 boot_params.screen_info.orig_x = oreg.dl; 28 boot_params.screen_info.orig_x = oreg.dl;
29 boot_params.screen_info.orig_y = oreg.dh; 29 boot_params.screen_info.orig_y = oreg.dh;
30
31 if (oreg.ch & 0x20)
32 boot_params.screen_info.flags |= VIDEO_FLAGS_NOCURSOR;
33
34 if ((oreg.ch & 0x1f) > (oreg.cl & 0x1f))
35 boot_params.screen_info.flags |= VIDEO_FLAGS_NOCURSOR;
30} 36}
31 37
32static void store_video_mode(void) 38static void store_video_mode(void)
diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile
index cfb0010fa940..1a58ad89fdf7 100644
--- a/arch/x86/crypto/Makefile
+++ b/arch/x86/crypto/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_CRYPTO_AES_X86_64) += aes-x86_64.o
12obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o 12obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o
13obj-$(CONFIG_CRYPTO_SALSA20_X86_64) += salsa20-x86_64.o 13obj-$(CONFIG_CRYPTO_SALSA20_X86_64) += salsa20-x86_64.o
14obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o 14obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o
15obj-$(CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL) += ghash-clmulni-intel.o
15 16
16obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o 17obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o
17 18
@@ -24,3 +25,5 @@ twofish-x86_64-y := twofish-x86_64-asm_64.o twofish_glue.o
24salsa20-x86_64-y := salsa20-x86_64-asm_64.o salsa20_glue.o 25salsa20-x86_64-y := salsa20-x86_64-asm_64.o salsa20_glue.o
25 26
26aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o 27aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o
28
29ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o
diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S
index eb0566e83319..20bb0e1ac681 100644
--- a/arch/x86/crypto/aesni-intel_asm.S
+++ b/arch/x86/crypto/aesni-intel_asm.S
@@ -16,6 +16,7 @@
16 */ 16 */
17 17
18#include <linux/linkage.h> 18#include <linux/linkage.h>
19#include <asm/inst.h>
19 20
20.text 21.text
21 22
@@ -122,103 +123,72 @@ ENTRY(aesni_set_key)
122 movups 0x10(%rsi), %xmm2 # other user key 123 movups 0x10(%rsi), %xmm2 # other user key
123 movaps %xmm2, (%rcx) 124 movaps %xmm2, (%rcx)
124 add $0x10, %rcx 125 add $0x10, %rcx
125 # aeskeygenassist $0x1, %xmm2, %xmm1 # round 1 126 AESKEYGENASSIST 0x1 %xmm2 %xmm1 # round 1
126 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x01
127 call _key_expansion_256a 127 call _key_expansion_256a
128 # aeskeygenassist $0x1, %xmm0, %xmm1 128 AESKEYGENASSIST 0x1 %xmm0 %xmm1
129 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x01
130 call _key_expansion_256b 129 call _key_expansion_256b
131 # aeskeygenassist $0x2, %xmm2, %xmm1 # round 2 130 AESKEYGENASSIST 0x2 %xmm2 %xmm1 # round 2
132 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x02
133 call _key_expansion_256a 131 call _key_expansion_256a
134 # aeskeygenassist $0x2, %xmm0, %xmm1 132 AESKEYGENASSIST 0x2 %xmm0 %xmm1
135 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x02
136 call _key_expansion_256b 133 call _key_expansion_256b
137 # aeskeygenassist $0x4, %xmm2, %xmm1 # round 3 134 AESKEYGENASSIST 0x4 %xmm2 %xmm1 # round 3
138 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x04
139 call _key_expansion_256a 135 call _key_expansion_256a
140 # aeskeygenassist $0x4, %xmm0, %xmm1 136 AESKEYGENASSIST 0x4 %xmm0 %xmm1
141 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x04
142 call _key_expansion_256b 137 call _key_expansion_256b
143 # aeskeygenassist $0x8, %xmm2, %xmm1 # round 4 138 AESKEYGENASSIST 0x8 %xmm2 %xmm1 # round 4
144 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x08
145 call _key_expansion_256a 139 call _key_expansion_256a
146 # aeskeygenassist $0x8, %xmm0, %xmm1 140 AESKEYGENASSIST 0x8 %xmm0 %xmm1
147 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x08
148 call _key_expansion_256b 141 call _key_expansion_256b
149 # aeskeygenassist $0x10, %xmm2, %xmm1 # round 5 142 AESKEYGENASSIST 0x10 %xmm2 %xmm1 # round 5
150 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x10
151 call _key_expansion_256a 143 call _key_expansion_256a
152 # aeskeygenassist $0x10, %xmm0, %xmm1 144 AESKEYGENASSIST 0x10 %xmm0 %xmm1
153 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x10
154 call _key_expansion_256b 145 call _key_expansion_256b
155 # aeskeygenassist $0x20, %xmm2, %xmm1 # round 6 146 AESKEYGENASSIST 0x20 %xmm2 %xmm1 # round 6
156 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x20
157 call _key_expansion_256a 147 call _key_expansion_256a
158 # aeskeygenassist $0x20, %xmm0, %xmm1 148 AESKEYGENASSIST 0x20 %xmm0 %xmm1
159 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x20
160 call _key_expansion_256b 149 call _key_expansion_256b
161 # aeskeygenassist $0x40, %xmm2, %xmm1 # round 7 150 AESKEYGENASSIST 0x40 %xmm2 %xmm1 # round 7
162 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x40
163 call _key_expansion_256a 151 call _key_expansion_256a
164 jmp .Ldec_key 152 jmp .Ldec_key
165.Lenc_key192: 153.Lenc_key192:
166 movq 0x10(%rsi), %xmm2 # other user key 154 movq 0x10(%rsi), %xmm2 # other user key
167 # aeskeygenassist $0x1, %xmm2, %xmm1 # round 1 155 AESKEYGENASSIST 0x1 %xmm2 %xmm1 # round 1
168 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x01
169 call _key_expansion_192a 156 call _key_expansion_192a
170 # aeskeygenassist $0x2, %xmm2, %xmm1 # round 2 157 AESKEYGENASSIST 0x2 %xmm2 %xmm1 # round 2
171 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x02
172 call _key_expansion_192b 158 call _key_expansion_192b
173 # aeskeygenassist $0x4, %xmm2, %xmm1 # round 3 159 AESKEYGENASSIST 0x4 %xmm2 %xmm1 # round 3
174 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x04
175 call _key_expansion_192a 160 call _key_expansion_192a
176 # aeskeygenassist $0x8, %xmm2, %xmm1 # round 4 161 AESKEYGENASSIST 0x8 %xmm2 %xmm1 # round 4
177 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x08
178 call _key_expansion_192b 162 call _key_expansion_192b
179 # aeskeygenassist $0x10, %xmm2, %xmm1 # round 5 163 AESKEYGENASSIST 0x10 %xmm2 %xmm1 # round 5
180 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x10
181 call _key_expansion_192a 164 call _key_expansion_192a
182 # aeskeygenassist $0x20, %xmm2, %xmm1 # round 6 165 AESKEYGENASSIST 0x20 %xmm2 %xmm1 # round 6
183 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x20
184 call _key_expansion_192b 166 call _key_expansion_192b
185 # aeskeygenassist $0x40, %xmm2, %xmm1 # round 7 167 AESKEYGENASSIST 0x40 %xmm2 %xmm1 # round 7
186 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x40
187 call _key_expansion_192a 168 call _key_expansion_192a
188 # aeskeygenassist $0x80, %xmm2, %xmm1 # round 8 169 AESKEYGENASSIST 0x80 %xmm2 %xmm1 # round 8
189 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x80
190 call _key_expansion_192b 170 call _key_expansion_192b
191 jmp .Ldec_key 171 jmp .Ldec_key
192.Lenc_key128: 172.Lenc_key128:
193 # aeskeygenassist $0x1, %xmm0, %xmm1 # round 1 173 AESKEYGENASSIST 0x1 %xmm0 %xmm1 # round 1
194 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x01
195 call _key_expansion_128 174 call _key_expansion_128
196 # aeskeygenassist $0x2, %xmm0, %xmm1 # round 2 175 AESKEYGENASSIST 0x2 %xmm0 %xmm1 # round 2
197 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x02
198 call _key_expansion_128 176 call _key_expansion_128
199 # aeskeygenassist $0x4, %xmm0, %xmm1 # round 3 177 AESKEYGENASSIST 0x4 %xmm0 %xmm1 # round 3
200 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x04
201 call _key_expansion_128 178 call _key_expansion_128
202 # aeskeygenassist $0x8, %xmm0, %xmm1 # round 4 179 AESKEYGENASSIST 0x8 %xmm0 %xmm1 # round 4
203 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x08
204 call _key_expansion_128 180 call _key_expansion_128
205 # aeskeygenassist $0x10, %xmm0, %xmm1 # round 5 181 AESKEYGENASSIST 0x10 %xmm0 %xmm1 # round 5
206 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x10
207 call _key_expansion_128 182 call _key_expansion_128
208 # aeskeygenassist $0x20, %xmm0, %xmm1 # round 6 183 AESKEYGENASSIST 0x20 %xmm0 %xmm1 # round 6
209 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x20
210 call _key_expansion_128 184 call _key_expansion_128
211 # aeskeygenassist $0x40, %xmm0, %xmm1 # round 7 185 AESKEYGENASSIST 0x40 %xmm0 %xmm1 # round 7
212 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x40
213 call _key_expansion_128 186 call _key_expansion_128
214 # aeskeygenassist $0x80, %xmm0, %xmm1 # round 8 187 AESKEYGENASSIST 0x80 %xmm0 %xmm1 # round 8
215 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x80
216 call _key_expansion_128 188 call _key_expansion_128
217 # aeskeygenassist $0x1b, %xmm0, %xmm1 # round 9 189 AESKEYGENASSIST 0x1b %xmm0 %xmm1 # round 9
218 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x1b
219 call _key_expansion_128 190 call _key_expansion_128
220 # aeskeygenassist $0x36, %xmm0, %xmm1 # round 10 191 AESKEYGENASSIST 0x36 %xmm0 %xmm1 # round 10
221 .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x36
222 call _key_expansion_128 192 call _key_expansion_128
223.Ldec_key: 193.Ldec_key:
224 sub $0x10, %rcx 194 sub $0x10, %rcx
@@ -231,8 +201,7 @@ ENTRY(aesni_set_key)
231.align 4 201.align 4
232.Ldec_key_loop: 202.Ldec_key_loop:
233 movaps (%rdi), %xmm0 203 movaps (%rdi), %xmm0
234 # aesimc %xmm0, %xmm1 204 AESIMC %xmm0 %xmm1
235 .byte 0x66, 0x0f, 0x38, 0xdb, 0xc8
236 movaps %xmm1, (%rsi) 205 movaps %xmm1, (%rsi)
237 add $0x10, %rdi 206 add $0x10, %rdi
238 sub $0x10, %rsi 207 sub $0x10, %rsi
@@ -274,51 +243,37 @@ _aesni_enc1:
274 je .Lenc192 243 je .Lenc192
275 add $0x20, TKEYP 244 add $0x20, TKEYP
276 movaps -0x60(TKEYP), KEY 245 movaps -0x60(TKEYP), KEY
277 # aesenc KEY, STATE 246 AESENC KEY STATE
278 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
279 movaps -0x50(TKEYP), KEY 247 movaps -0x50(TKEYP), KEY
280 # aesenc KEY, STATE 248 AESENC KEY STATE
281 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
282.align 4 249.align 4
283.Lenc192: 250.Lenc192:
284 movaps -0x40(TKEYP), KEY 251 movaps -0x40(TKEYP), KEY
285 # aesenc KEY, STATE 252 AESENC KEY STATE
286 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
287 movaps -0x30(TKEYP), KEY 253 movaps -0x30(TKEYP), KEY
288 # aesenc KEY, STATE 254 AESENC KEY STATE
289 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
290.align 4 255.align 4
291.Lenc128: 256.Lenc128:
292 movaps -0x20(TKEYP), KEY 257 movaps -0x20(TKEYP), KEY
293 # aesenc KEY, STATE 258 AESENC KEY STATE
294 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
295 movaps -0x10(TKEYP), KEY 259 movaps -0x10(TKEYP), KEY
296 # aesenc KEY, STATE 260 AESENC KEY STATE
297 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
298 movaps (TKEYP), KEY 261 movaps (TKEYP), KEY
299 # aesenc KEY, STATE 262 AESENC KEY STATE
300 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
301 movaps 0x10(TKEYP), KEY 263 movaps 0x10(TKEYP), KEY
302 # aesenc KEY, STATE 264 AESENC KEY STATE
303 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
304 movaps 0x20(TKEYP), KEY 265 movaps 0x20(TKEYP), KEY
305 # aesenc KEY, STATE 266 AESENC KEY STATE
306 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
307 movaps 0x30(TKEYP), KEY 267 movaps 0x30(TKEYP), KEY
308 # aesenc KEY, STATE 268 AESENC KEY STATE
309 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
310 movaps 0x40(TKEYP), KEY 269 movaps 0x40(TKEYP), KEY
311 # aesenc KEY, STATE 270 AESENC KEY STATE
312 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
313 movaps 0x50(TKEYP), KEY 271 movaps 0x50(TKEYP), KEY
314 # aesenc KEY, STATE 272 AESENC KEY STATE
315 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
316 movaps 0x60(TKEYP), KEY 273 movaps 0x60(TKEYP), KEY
317 # aesenc KEY, STATE 274 AESENC KEY STATE
318 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
319 movaps 0x70(TKEYP), KEY 275 movaps 0x70(TKEYP), KEY
320 # aesenclast KEY, STATE # last round 276 AESENCLAST KEY STATE
321 .byte 0x66, 0x0f, 0x38, 0xdd, 0xc2
322 ret 277 ret
323 278
324/* 279/*
@@ -353,135 +308,79 @@ _aesni_enc4:
353 je .L4enc192 308 je .L4enc192
354 add $0x20, TKEYP 309 add $0x20, TKEYP
355 movaps -0x60(TKEYP), KEY 310 movaps -0x60(TKEYP), KEY
356 # aesenc KEY, STATE1 311 AESENC KEY STATE1
357 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 312 AESENC KEY STATE2
358 # aesenc KEY, STATE2 313 AESENC KEY STATE3
359 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 314 AESENC KEY STATE4
360 # aesenc KEY, STATE3
361 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
362 # aesenc KEY, STATE4
363 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
364 movaps -0x50(TKEYP), KEY 315 movaps -0x50(TKEYP), KEY
365 # aesenc KEY, STATE1 316 AESENC KEY STATE1
366 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 317 AESENC KEY STATE2
367 # aesenc KEY, STATE2 318 AESENC KEY STATE3
368 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 319 AESENC KEY STATE4
369 # aesenc KEY, STATE3
370 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
371 # aesenc KEY, STATE4
372 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
373#.align 4 320#.align 4
374.L4enc192: 321.L4enc192:
375 movaps -0x40(TKEYP), KEY 322 movaps -0x40(TKEYP), KEY
376 # aesenc KEY, STATE1 323 AESENC KEY STATE1
377 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 324 AESENC KEY STATE2
378 # aesenc KEY, STATE2 325 AESENC KEY STATE3
379 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 326 AESENC KEY STATE4
380 # aesenc KEY, STATE3
381 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
382 # aesenc KEY, STATE4
383 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
384 movaps -0x30(TKEYP), KEY 327 movaps -0x30(TKEYP), KEY
385 # aesenc KEY, STATE1 328 AESENC KEY STATE1
386 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 329 AESENC KEY STATE2
387 # aesenc KEY, STATE2 330 AESENC KEY STATE3
388 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 331 AESENC KEY STATE4
389 # aesenc KEY, STATE3
390 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
391 # aesenc KEY, STATE4
392 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
393#.align 4 332#.align 4
394.L4enc128: 333.L4enc128:
395 movaps -0x20(TKEYP), KEY 334 movaps -0x20(TKEYP), KEY
396 # aesenc KEY, STATE1 335 AESENC KEY STATE1
397 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 336 AESENC KEY STATE2
398 # aesenc KEY, STATE2 337 AESENC KEY STATE3
399 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 338 AESENC KEY STATE4
400 # aesenc KEY, STATE3
401 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
402 # aesenc KEY, STATE4
403 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
404 movaps -0x10(TKEYP), KEY 339 movaps -0x10(TKEYP), KEY
405 # aesenc KEY, STATE1 340 AESENC KEY STATE1
406 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 341 AESENC KEY STATE2
407 # aesenc KEY, STATE2 342 AESENC KEY STATE3
408 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 343 AESENC KEY STATE4
409 # aesenc KEY, STATE3
410 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
411 # aesenc KEY, STATE4
412 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
413 movaps (TKEYP), KEY 344 movaps (TKEYP), KEY
414 # aesenc KEY, STATE1 345 AESENC KEY STATE1
415 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 346 AESENC KEY STATE2
416 # aesenc KEY, STATE2 347 AESENC KEY STATE3
417 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 348 AESENC KEY STATE4
418 # aesenc KEY, STATE3
419 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
420 # aesenc KEY, STATE4
421 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
422 movaps 0x10(TKEYP), KEY 349 movaps 0x10(TKEYP), KEY
423 # aesenc KEY, STATE1 350 AESENC KEY STATE1
424 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 351 AESENC KEY STATE2
425 # aesenc KEY, STATE2 352 AESENC KEY STATE3
426 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 353 AESENC KEY STATE4
427 # aesenc KEY, STATE3
428 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
429 # aesenc KEY, STATE4
430 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
431 movaps 0x20(TKEYP), KEY 354 movaps 0x20(TKEYP), KEY
432 # aesenc KEY, STATE1 355 AESENC KEY STATE1
433 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 356 AESENC KEY STATE2
434 # aesenc KEY, STATE2 357 AESENC KEY STATE3
435 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 358 AESENC KEY STATE4
436 # aesenc KEY, STATE3
437 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
438 # aesenc KEY, STATE4
439 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
440 movaps 0x30(TKEYP), KEY 359 movaps 0x30(TKEYP), KEY
441 # aesenc KEY, STATE1 360 AESENC KEY STATE1
442 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 361 AESENC KEY STATE2
443 # aesenc KEY, STATE2 362 AESENC KEY STATE3
444 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 363 AESENC KEY STATE4
445 # aesenc KEY, STATE3
446 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
447 # aesenc KEY, STATE4
448 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
449 movaps 0x40(TKEYP), KEY 364 movaps 0x40(TKEYP), KEY
450 # aesenc KEY, STATE1 365 AESENC KEY STATE1
451 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 366 AESENC KEY STATE2
452 # aesenc KEY, STATE2 367 AESENC KEY STATE3
453 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 368 AESENC KEY STATE4
454 # aesenc KEY, STATE3
455 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
456 # aesenc KEY, STATE4
457 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
458 movaps 0x50(TKEYP), KEY 369 movaps 0x50(TKEYP), KEY
459 # aesenc KEY, STATE1 370 AESENC KEY STATE1
460 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 371 AESENC KEY STATE2
461 # aesenc KEY, STATE2 372 AESENC KEY STATE3
462 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 373 AESENC KEY STATE4
463 # aesenc KEY, STATE3
464 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
465 # aesenc KEY, STATE4
466 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
467 movaps 0x60(TKEYP), KEY 374 movaps 0x60(TKEYP), KEY
468 # aesenc KEY, STATE1 375 AESENC KEY STATE1
469 .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2 376 AESENC KEY STATE2
470 # aesenc KEY, STATE2 377 AESENC KEY STATE3
471 .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2 378 AESENC KEY STATE4
472 # aesenc KEY, STATE3
473 .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
474 # aesenc KEY, STATE4
475 .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
476 movaps 0x70(TKEYP), KEY 379 movaps 0x70(TKEYP), KEY
477 # aesenclast KEY, STATE1 # last round 380 AESENCLAST KEY STATE1 # last round
478 .byte 0x66, 0x0f, 0x38, 0xdd, 0xc2 381 AESENCLAST KEY STATE2
479 # aesenclast KEY, STATE2 382 AESENCLAST KEY STATE3
480 .byte 0x66, 0x0f, 0x38, 0xdd, 0xe2 383 AESENCLAST KEY STATE4
481 # aesenclast KEY, STATE3
482 .byte 0x66, 0x0f, 0x38, 0xdd, 0xea
483 # aesenclast KEY, STATE4
484 .byte 0x66, 0x0f, 0x38, 0xdd, 0xf2
485 ret 384 ret
486 385
487/* 386/*
@@ -518,51 +417,37 @@ _aesni_dec1:
518 je .Ldec192 417 je .Ldec192
519 add $0x20, TKEYP 418 add $0x20, TKEYP
520 movaps -0x60(TKEYP), KEY 419 movaps -0x60(TKEYP), KEY
521 # aesdec KEY, STATE 420 AESDEC KEY STATE
522 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
523 movaps -0x50(TKEYP), KEY 421 movaps -0x50(TKEYP), KEY
524 # aesdec KEY, STATE 422 AESDEC KEY STATE
525 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
526.align 4 423.align 4
527.Ldec192: 424.Ldec192:
528 movaps -0x40(TKEYP), KEY 425 movaps -0x40(TKEYP), KEY
529 # aesdec KEY, STATE 426 AESDEC KEY STATE
530 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
531 movaps -0x30(TKEYP), KEY 427 movaps -0x30(TKEYP), KEY
532 # aesdec KEY, STATE 428 AESDEC KEY STATE
533 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
534.align 4 429.align 4
535.Ldec128: 430.Ldec128:
536 movaps -0x20(TKEYP), KEY 431 movaps -0x20(TKEYP), KEY
537 # aesdec KEY, STATE 432 AESDEC KEY STATE
538 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
539 movaps -0x10(TKEYP), KEY 433 movaps -0x10(TKEYP), KEY
540 # aesdec KEY, STATE 434 AESDEC KEY STATE
541 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
542 movaps (TKEYP), KEY 435 movaps (TKEYP), KEY
543 # aesdec KEY, STATE 436 AESDEC KEY STATE
544 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
545 movaps 0x10(TKEYP), KEY 437 movaps 0x10(TKEYP), KEY
546 # aesdec KEY, STATE 438 AESDEC KEY STATE
547 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
548 movaps 0x20(TKEYP), KEY 439 movaps 0x20(TKEYP), KEY
549 # aesdec KEY, STATE 440 AESDEC KEY STATE
550 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
551 movaps 0x30(TKEYP), KEY 441 movaps 0x30(TKEYP), KEY
552 # aesdec KEY, STATE 442 AESDEC KEY STATE
553 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
554 movaps 0x40(TKEYP), KEY 443 movaps 0x40(TKEYP), KEY
555 # aesdec KEY, STATE 444 AESDEC KEY STATE
556 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
557 movaps 0x50(TKEYP), KEY 445 movaps 0x50(TKEYP), KEY
558 # aesdec KEY, STATE 446 AESDEC KEY STATE
559 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
560 movaps 0x60(TKEYP), KEY 447 movaps 0x60(TKEYP), KEY
561 # aesdec KEY, STATE 448 AESDEC KEY STATE
562 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
563 movaps 0x70(TKEYP), KEY 449 movaps 0x70(TKEYP), KEY
564 # aesdeclast KEY, STATE # last round 450 AESDECLAST KEY STATE
565 .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
566 ret 451 ret
567 452
568/* 453/*
@@ -597,135 +482,79 @@ _aesni_dec4:
597 je .L4dec192 482 je .L4dec192
598 add $0x20, TKEYP 483 add $0x20, TKEYP
599 movaps -0x60(TKEYP), KEY 484 movaps -0x60(TKEYP), KEY
600 # aesdec KEY, STATE1 485 AESDEC KEY STATE1
601 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 486 AESDEC KEY STATE2
602 # aesdec KEY, STATE2 487 AESDEC KEY STATE3
603 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 488 AESDEC KEY STATE4
604 # aesdec KEY, STATE3
605 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
606 # aesdec KEY, STATE4
607 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
608 movaps -0x50(TKEYP), KEY 489 movaps -0x50(TKEYP), KEY
609 # aesdec KEY, STATE1 490 AESDEC KEY STATE1
610 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 491 AESDEC KEY STATE2
611 # aesdec KEY, STATE2 492 AESDEC KEY STATE3
612 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 493 AESDEC KEY STATE4
613 # aesdec KEY, STATE3
614 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
615 # aesdec KEY, STATE4
616 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
617.align 4 494.align 4
618.L4dec192: 495.L4dec192:
619 movaps -0x40(TKEYP), KEY 496 movaps -0x40(TKEYP), KEY
620 # aesdec KEY, STATE1 497 AESDEC KEY STATE1
621 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 498 AESDEC KEY STATE2
622 # aesdec KEY, STATE2 499 AESDEC KEY STATE3
623 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 500 AESDEC KEY STATE4
624 # aesdec KEY, STATE3
625 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
626 # aesdec KEY, STATE4
627 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
628 movaps -0x30(TKEYP), KEY 501 movaps -0x30(TKEYP), KEY
629 # aesdec KEY, STATE1 502 AESDEC KEY STATE1
630 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 503 AESDEC KEY STATE2
631 # aesdec KEY, STATE2 504 AESDEC KEY STATE3
632 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 505 AESDEC KEY STATE4
633 # aesdec KEY, STATE3
634 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
635 # aesdec KEY, STATE4
636 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
637.align 4 506.align 4
638.L4dec128: 507.L4dec128:
639 movaps -0x20(TKEYP), KEY 508 movaps -0x20(TKEYP), KEY
640 # aesdec KEY, STATE1 509 AESDEC KEY STATE1
641 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 510 AESDEC KEY STATE2
642 # aesdec KEY, STATE2 511 AESDEC KEY STATE3
643 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 512 AESDEC KEY STATE4
644 # aesdec KEY, STATE3
645 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
646 # aesdec KEY, STATE4
647 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
648 movaps -0x10(TKEYP), KEY 513 movaps -0x10(TKEYP), KEY
649 # aesdec KEY, STATE1 514 AESDEC KEY STATE1
650 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 515 AESDEC KEY STATE2
651 # aesdec KEY, STATE2 516 AESDEC KEY STATE3
652 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 517 AESDEC KEY STATE4
653 # aesdec KEY, STATE3
654 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
655 # aesdec KEY, STATE4
656 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
657 movaps (TKEYP), KEY 518 movaps (TKEYP), KEY
658 # aesdec KEY, STATE1 519 AESDEC KEY STATE1
659 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 520 AESDEC KEY STATE2
660 # aesdec KEY, STATE2 521 AESDEC KEY STATE3
661 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 522 AESDEC KEY STATE4
662 # aesdec KEY, STATE3
663 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
664 # aesdec KEY, STATE4
665 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
666 movaps 0x10(TKEYP), KEY 523 movaps 0x10(TKEYP), KEY
667 # aesdec KEY, STATE1 524 AESDEC KEY STATE1
668 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 525 AESDEC KEY STATE2
669 # aesdec KEY, STATE2 526 AESDEC KEY STATE3
670 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 527 AESDEC KEY STATE4
671 # aesdec KEY, STATE3
672 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
673 # aesdec KEY, STATE4
674 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
675 movaps 0x20(TKEYP), KEY 528 movaps 0x20(TKEYP), KEY
676 # aesdec KEY, STATE1 529 AESDEC KEY STATE1
677 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 530 AESDEC KEY STATE2
678 # aesdec KEY, STATE2 531 AESDEC KEY STATE3
679 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 532 AESDEC KEY STATE4
680 # aesdec KEY, STATE3
681 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
682 # aesdec KEY, STATE4
683 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
684 movaps 0x30(TKEYP), KEY 533 movaps 0x30(TKEYP), KEY
685 # aesdec KEY, STATE1 534 AESDEC KEY STATE1
686 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 535 AESDEC KEY STATE2
687 # aesdec KEY, STATE2 536 AESDEC KEY STATE3
688 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 537 AESDEC KEY STATE4
689 # aesdec KEY, STATE3
690 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
691 # aesdec KEY, STATE4
692 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
693 movaps 0x40(TKEYP), KEY 538 movaps 0x40(TKEYP), KEY
694 # aesdec KEY, STATE1 539 AESDEC KEY STATE1
695 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 540 AESDEC KEY STATE2
696 # aesdec KEY, STATE2 541 AESDEC KEY STATE3
697 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 542 AESDEC KEY STATE4
698 # aesdec KEY, STATE3
699 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
700 # aesdec KEY, STATE4
701 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
702 movaps 0x50(TKEYP), KEY 543 movaps 0x50(TKEYP), KEY
703 # aesdec KEY, STATE1 544 AESDEC KEY STATE1
704 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 545 AESDEC KEY STATE2
705 # aesdec KEY, STATE2 546 AESDEC KEY STATE3
706 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 547 AESDEC KEY STATE4
707 # aesdec KEY, STATE3
708 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
709 # aesdec KEY, STATE4
710 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
711 movaps 0x60(TKEYP), KEY 548 movaps 0x60(TKEYP), KEY
712 # aesdec KEY, STATE1 549 AESDEC KEY STATE1
713 .byte 0x66, 0x0f, 0x38, 0xde, 0xc2 550 AESDEC KEY STATE2
714 # aesdec KEY, STATE2 551 AESDEC KEY STATE3
715 .byte 0x66, 0x0f, 0x38, 0xde, 0xe2 552 AESDEC KEY STATE4
716 # aesdec KEY, STATE3
717 .byte 0x66, 0x0f, 0x38, 0xde, 0xea
718 # aesdec KEY, STATE4
719 .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
720 movaps 0x70(TKEYP), KEY 553 movaps 0x70(TKEYP), KEY
721 # aesdeclast KEY, STATE1 # last round 554 AESDECLAST KEY STATE1 # last round
722 .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2 555 AESDECLAST KEY STATE2
723 # aesdeclast KEY, STATE2 556 AESDECLAST KEY STATE3
724 .byte 0x66, 0x0f, 0x38, 0xdf, 0xe2 557 AESDECLAST KEY STATE4
725 # aesdeclast KEY, STATE3
726 .byte 0x66, 0x0f, 0x38, 0xdf, 0xea
727 # aesdeclast KEY, STATE4
728 .byte 0x66, 0x0f, 0x38, 0xdf, 0xf2
729 ret 558 ret
730 559
731/* 560/*
diff --git a/arch/x86/crypto/ghash-clmulni-intel_asm.S b/arch/x86/crypto/ghash-clmulni-intel_asm.S
new file mode 100644
index 000000000000..1eb7f90cb7b9
--- /dev/null
+++ b/arch/x86/crypto/ghash-clmulni-intel_asm.S
@@ -0,0 +1,157 @@
1/*
2 * Accelerated GHASH implementation with Intel PCLMULQDQ-NI
3 * instructions. This file contains accelerated part of ghash
4 * implementation. More information about PCLMULQDQ can be found at:
5 *
6 * http://software.intel.com/en-us/articles/carry-less-multiplication-and-its-usage-for-computing-the-gcm-mode/
7 *
8 * Copyright (c) 2009 Intel Corp.
9 * Author: Huang Ying <ying.huang@intel.com>
10 * Vinodh Gopal
11 * Erdinc Ozturk
12 * Deniz Karakoyunlu
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License version 2 as published
16 * by the Free Software Foundation.
17 */
18
19#include <linux/linkage.h>
20#include <asm/inst.h>
21
22.data
23
24.align 16
25.Lbswap_mask:
26 .octa 0x000102030405060708090a0b0c0d0e0f
27.Lpoly:
28 .octa 0xc2000000000000000000000000000001
29.Ltwo_one:
30 .octa 0x00000001000000000000000000000001
31
32#define DATA %xmm0
33#define SHASH %xmm1
34#define T1 %xmm2
35#define T2 %xmm3
36#define T3 %xmm4
37#define BSWAP %xmm5
38#define IN1 %xmm6
39
40.text
41
42/*
43 * __clmul_gf128mul_ble: internal ABI
44 * input:
45 * DATA: operand1
46 * SHASH: operand2, hash_key << 1 mod poly
47 * output:
48 * DATA: operand1 * operand2 mod poly
49 * changed:
50 * T1
51 * T2
52 * T3
53 */
54__clmul_gf128mul_ble:
55 movaps DATA, T1
56 pshufd $0b01001110, DATA, T2
57 pshufd $0b01001110, SHASH, T3
58 pxor DATA, T2
59 pxor SHASH, T3
60
61 PCLMULQDQ 0x00 SHASH DATA # DATA = a0 * b0
62 PCLMULQDQ 0x11 SHASH T1 # T1 = a1 * b1
63 PCLMULQDQ 0x00 T3 T2 # T2 = (a1 + a0) * (b1 + b0)
64 pxor DATA, T2
65 pxor T1, T2 # T2 = a0 * b1 + a1 * b0
66
67 movaps T2, T3
68 pslldq $8, T3
69 psrldq $8, T2
70 pxor T3, DATA
71 pxor T2, T1 # <T1:DATA> is result of
72 # carry-less multiplication
73
74 # first phase of the reduction
75 movaps DATA, T3
76 psllq $1, T3
77 pxor DATA, T3
78 psllq $5, T3
79 pxor DATA, T3
80 psllq $57, T3
81 movaps T3, T2
82 pslldq $8, T2
83 psrldq $8, T3
84 pxor T2, DATA
85 pxor T3, T1
86
87 # second phase of the reduction
88 movaps DATA, T2
89 psrlq $5, T2
90 pxor DATA, T2
91 psrlq $1, T2
92 pxor DATA, T2
93 psrlq $1, T2
94 pxor T2, T1
95 pxor T1, DATA
96 ret
97
98/* void clmul_ghash_mul(char *dst, const be128 *shash) */
99ENTRY(clmul_ghash_mul)
100 movups (%rdi), DATA
101 movups (%rsi), SHASH
102 movaps .Lbswap_mask, BSWAP
103 PSHUFB_XMM BSWAP DATA
104 call __clmul_gf128mul_ble
105 PSHUFB_XMM BSWAP DATA
106 movups DATA, (%rdi)
107 ret
108
109/*
110 * void clmul_ghash_update(char *dst, const char *src, unsigned int srclen,
111 * const be128 *shash);
112 */
113ENTRY(clmul_ghash_update)
114 cmp $16, %rdx
115 jb .Lupdate_just_ret # check length
116 movaps .Lbswap_mask, BSWAP
117 movups (%rdi), DATA
118 movups (%rcx), SHASH
119 PSHUFB_XMM BSWAP DATA
120.align 4
121.Lupdate_loop:
122 movups (%rsi), IN1
123 PSHUFB_XMM BSWAP IN1
124 pxor IN1, DATA
125 call __clmul_gf128mul_ble
126 sub $16, %rdx
127 add $16, %rsi
128 cmp $16, %rdx
129 jge .Lupdate_loop
130 PSHUFB_XMM BSWAP DATA
131 movups DATA, (%rdi)
132.Lupdate_just_ret:
133 ret
134
135/*
136 * void clmul_ghash_setkey(be128 *shash, const u8 *key);
137 *
138 * Calculate hash_key << 1 mod poly
139 */
140ENTRY(clmul_ghash_setkey)
141 movaps .Lbswap_mask, BSWAP
142 movups (%rsi), %xmm0
143 PSHUFB_XMM BSWAP %xmm0
144 movaps %xmm0, %xmm1
145 psllq $1, %xmm0
146 psrlq $63, %xmm1
147 movaps %xmm1, %xmm2
148 pslldq $8, %xmm1
149 psrldq $8, %xmm2
150 por %xmm1, %xmm0
151 # reduction
152 pshufd $0b00100100, %xmm2, %xmm1
153 pcmpeqd .Ltwo_one, %xmm1
154 pand .Lpoly, %xmm1
155 pxor %xmm1, %xmm0
156 movups %xmm0, (%rdi)
157 ret
diff --git a/arch/x86/crypto/ghash-clmulni-intel_glue.c b/arch/x86/crypto/ghash-clmulni-intel_glue.c
new file mode 100644
index 000000000000..cbcc8d8ea93a
--- /dev/null
+++ b/arch/x86/crypto/ghash-clmulni-intel_glue.c
@@ -0,0 +1,333 @@
1/*
2 * Accelerated GHASH implementation with Intel PCLMULQDQ-NI
3 * instructions. This file contains glue code.
4 *
5 * Copyright (c) 2009 Intel Corp.
6 * Author: Huang Ying <ying.huang@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/crypto.h>
17#include <crypto/algapi.h>
18#include <crypto/cryptd.h>
19#include <crypto/gf128mul.h>
20#include <crypto/internal/hash.h>
21#include <asm/i387.h>
22
23#define GHASH_BLOCK_SIZE 16
24#define GHASH_DIGEST_SIZE 16
25
26void clmul_ghash_mul(char *dst, const be128 *shash);
27
28void clmul_ghash_update(char *dst, const char *src, unsigned int srclen,
29 const be128 *shash);
30
31void clmul_ghash_setkey(be128 *shash, const u8 *key);
32
33struct ghash_async_ctx {
34 struct cryptd_ahash *cryptd_tfm;
35};
36
37struct ghash_ctx {
38 be128 shash;
39};
40
41struct ghash_desc_ctx {
42 u8 buffer[GHASH_BLOCK_SIZE];
43 u32 bytes;
44};
45
46static int ghash_init(struct shash_desc *desc)
47{
48 struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);
49
50 memset(dctx, 0, sizeof(*dctx));
51
52 return 0;
53}
54
55static int ghash_setkey(struct crypto_shash *tfm,
56 const u8 *key, unsigned int keylen)
57{
58 struct ghash_ctx *ctx = crypto_shash_ctx(tfm);
59
60 if (keylen != GHASH_BLOCK_SIZE) {
61 crypto_shash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
62 return -EINVAL;
63 }
64
65 clmul_ghash_setkey(&ctx->shash, key);
66
67 return 0;
68}
69
70static int ghash_update(struct shash_desc *desc,
71 const u8 *src, unsigned int srclen)
72{
73 struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);
74 struct ghash_ctx *ctx = crypto_shash_ctx(desc->tfm);
75 u8 *dst = dctx->buffer;
76
77 kernel_fpu_begin();
78 if (dctx->bytes) {
79 int n = min(srclen, dctx->bytes);
80 u8 *pos = dst + (GHASH_BLOCK_SIZE - dctx->bytes);
81
82 dctx->bytes -= n;
83 srclen -= n;
84
85 while (n--)
86 *pos++ ^= *src++;
87
88 if (!dctx->bytes)
89 clmul_ghash_mul(dst, &ctx->shash);
90 }
91
92 clmul_ghash_update(dst, src, srclen, &ctx->shash);
93 kernel_fpu_end();
94
95 if (srclen & 0xf) {
96 src += srclen - (srclen & 0xf);
97 srclen &= 0xf;
98 dctx->bytes = GHASH_BLOCK_SIZE - srclen;
99 while (srclen--)
100 *dst++ ^= *src++;
101 }
102
103 return 0;
104}
105
106static void ghash_flush(struct ghash_ctx *ctx, struct ghash_desc_ctx *dctx)
107{
108 u8 *dst = dctx->buffer;
109
110 if (dctx->bytes) {
111 u8 *tmp = dst + (GHASH_BLOCK_SIZE - dctx->bytes);
112
113 while (dctx->bytes--)
114 *tmp++ ^= 0;
115
116 kernel_fpu_begin();
117 clmul_ghash_mul(dst, &ctx->shash);
118 kernel_fpu_end();
119 }
120
121 dctx->bytes = 0;
122}
123
124static int ghash_final(struct shash_desc *desc, u8 *dst)
125{
126 struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);
127 struct ghash_ctx *ctx = crypto_shash_ctx(desc->tfm);
128 u8 *buf = dctx->buffer;
129
130 ghash_flush(ctx, dctx);
131 memcpy(dst, buf, GHASH_BLOCK_SIZE);
132
133 return 0;
134}
135
136static struct shash_alg ghash_alg = {
137 .digestsize = GHASH_DIGEST_SIZE,
138 .init = ghash_init,
139 .update = ghash_update,
140 .final = ghash_final,
141 .setkey = ghash_setkey,
142 .descsize = sizeof(struct ghash_desc_ctx),
143 .base = {
144 .cra_name = "__ghash",
145 .cra_driver_name = "__ghash-pclmulqdqni",
146 .cra_priority = 0,
147 .cra_flags = CRYPTO_ALG_TYPE_SHASH,
148 .cra_blocksize = GHASH_BLOCK_SIZE,
149 .cra_ctxsize = sizeof(struct ghash_ctx),
150 .cra_module = THIS_MODULE,
151 .cra_list = LIST_HEAD_INIT(ghash_alg.base.cra_list),
152 },
153};
154
155static int ghash_async_init(struct ahash_request *req)
156{
157 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
158 struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
159 struct ahash_request *cryptd_req = ahash_request_ctx(req);
160 struct cryptd_ahash *cryptd_tfm = ctx->cryptd_tfm;
161
162 if (!irq_fpu_usable()) {
163 memcpy(cryptd_req, req, sizeof(*req));
164 ahash_request_set_tfm(cryptd_req, &cryptd_tfm->base);
165 return crypto_ahash_init(cryptd_req);
166 } else {
167 struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
168 struct crypto_shash *child = cryptd_ahash_child(cryptd_tfm);
169
170 desc->tfm = child;
171 desc->flags = req->base.flags;
172 return crypto_shash_init(desc);
173 }
174}
175
176static int ghash_async_update(struct ahash_request *req)
177{
178 struct ahash_request *cryptd_req = ahash_request_ctx(req);
179
180 if (!irq_fpu_usable()) {
181 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
182 struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
183 struct cryptd_ahash *cryptd_tfm = ctx->cryptd_tfm;
184
185 memcpy(cryptd_req, req, sizeof(*req));
186 ahash_request_set_tfm(cryptd_req, &cryptd_tfm->base);
187 return crypto_ahash_update(cryptd_req);
188 } else {
189 struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
190 return shash_ahash_update(req, desc);
191 }
192}
193
194static int ghash_async_final(struct ahash_request *req)
195{
196 struct ahash_request *cryptd_req = ahash_request_ctx(req);
197
198 if (!irq_fpu_usable()) {
199 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
200 struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
201 struct cryptd_ahash *cryptd_tfm = ctx->cryptd_tfm;
202
203 memcpy(cryptd_req, req, sizeof(*req));
204 ahash_request_set_tfm(cryptd_req, &cryptd_tfm->base);
205 return crypto_ahash_final(cryptd_req);
206 } else {
207 struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
208 return crypto_shash_final(desc, req->result);
209 }
210}
211
212static int ghash_async_digest(struct ahash_request *req)
213{
214 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
215 struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
216 struct ahash_request *cryptd_req = ahash_request_ctx(req);
217 struct cryptd_ahash *cryptd_tfm = ctx->cryptd_tfm;
218
219 if (!irq_fpu_usable()) {
220 memcpy(cryptd_req, req, sizeof(*req));
221 ahash_request_set_tfm(cryptd_req, &cryptd_tfm->base);
222 return crypto_ahash_digest(cryptd_req);
223 } else {
224 struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
225 struct crypto_shash *child = cryptd_ahash_child(cryptd_tfm);
226
227 desc->tfm = child;
228 desc->flags = req->base.flags;
229 return shash_ahash_digest(req, desc);
230 }
231}
232
233static int ghash_async_setkey(struct crypto_ahash *tfm, const u8 *key,
234 unsigned int keylen)
235{
236 struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
237 struct crypto_ahash *child = &ctx->cryptd_tfm->base;
238 int err;
239
240 crypto_ahash_clear_flags(child, CRYPTO_TFM_REQ_MASK);
241 crypto_ahash_set_flags(child, crypto_ahash_get_flags(tfm)
242 & CRYPTO_TFM_REQ_MASK);
243 err = crypto_ahash_setkey(child, key, keylen);
244 crypto_ahash_set_flags(tfm, crypto_ahash_get_flags(child)
245 & CRYPTO_TFM_RES_MASK);
246
247 return 0;
248}
249
250static int ghash_async_init_tfm(struct crypto_tfm *tfm)
251{
252 struct cryptd_ahash *cryptd_tfm;
253 struct ghash_async_ctx *ctx = crypto_tfm_ctx(tfm);
254
255 cryptd_tfm = cryptd_alloc_ahash("__ghash-pclmulqdqni", 0, 0);
256 if (IS_ERR(cryptd_tfm))
257 return PTR_ERR(cryptd_tfm);
258 ctx->cryptd_tfm = cryptd_tfm;
259 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
260 sizeof(struct ahash_request) +
261 crypto_ahash_reqsize(&cryptd_tfm->base));
262
263 return 0;
264}
265
266static void ghash_async_exit_tfm(struct crypto_tfm *tfm)
267{
268 struct ghash_async_ctx *ctx = crypto_tfm_ctx(tfm);
269
270 cryptd_free_ahash(ctx->cryptd_tfm);
271}
272
273static struct ahash_alg ghash_async_alg = {
274 .init = ghash_async_init,
275 .update = ghash_async_update,
276 .final = ghash_async_final,
277 .setkey = ghash_async_setkey,
278 .digest = ghash_async_digest,
279 .halg = {
280 .digestsize = GHASH_DIGEST_SIZE,
281 .base = {
282 .cra_name = "ghash",
283 .cra_driver_name = "ghash-clmulni",
284 .cra_priority = 400,
285 .cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC,
286 .cra_blocksize = GHASH_BLOCK_SIZE,
287 .cra_type = &crypto_ahash_type,
288 .cra_module = THIS_MODULE,
289 .cra_list = LIST_HEAD_INIT(ghash_async_alg.halg.base.cra_list),
290 .cra_init = ghash_async_init_tfm,
291 .cra_exit = ghash_async_exit_tfm,
292 },
293 },
294};
295
296static int __init ghash_pclmulqdqni_mod_init(void)
297{
298 int err;
299
300 if (!cpu_has_pclmulqdq) {
301 printk(KERN_INFO "Intel PCLMULQDQ-NI instructions are not"
302 " detected.\n");
303 return -ENODEV;
304 }
305
306 err = crypto_register_shash(&ghash_alg);
307 if (err)
308 goto err_out;
309 err = crypto_register_ahash(&ghash_async_alg);
310 if (err)
311 goto err_shash;
312
313 return 0;
314
315err_shash:
316 crypto_unregister_shash(&ghash_alg);
317err_out:
318 return err;
319}
320
321static void __exit ghash_pclmulqdqni_mod_exit(void)
322{
323 crypto_unregister_ahash(&ghash_async_alg);
324 crypto_unregister_shash(&ghash_alg);
325}
326
327module_init(ghash_pclmulqdqni_mod_init);
328module_exit(ghash_pclmulqdqni_mod_exit);
329
330MODULE_LICENSE("GPL");
331MODULE_DESCRIPTION("GHASH Message Digest Algorithm, "
332 "acclerated by PCLMULQDQ-NI");
333MODULE_ALIAS("ghash");
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 4eefdca9832b..53147ad85b96 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -696,7 +696,7 @@ ia32_sys_call_table:
696 .quad quiet_ni_syscall /* streams2 */ 696 .quad quiet_ni_syscall /* streams2 */
697 .quad stub32_vfork /* 190 */ 697 .quad stub32_vfork /* 190 */
698 .quad compat_sys_getrlimit 698 .quad compat_sys_getrlimit
699 .quad sys32_mmap2 699 .quad sys_mmap_pgoff
700 .quad sys32_truncate64 700 .quad sys32_truncate64
701 .quad sys32_ftruncate64 701 .quad sys32_ftruncate64
702 .quad sys32_stat64 /* 195 */ 702 .quad sys32_stat64 /* 195 */
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index df82c0e48ded..422572c77923 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -155,9 +155,6 @@ struct mmap_arg_struct {
155asmlinkage long sys32_mmap(struct mmap_arg_struct __user *arg) 155asmlinkage long sys32_mmap(struct mmap_arg_struct __user *arg)
156{ 156{
157 struct mmap_arg_struct a; 157 struct mmap_arg_struct a;
158 struct file *file = NULL;
159 unsigned long retval;
160 struct mm_struct *mm ;
161 158
162 if (copy_from_user(&a, arg, sizeof(a))) 159 if (copy_from_user(&a, arg, sizeof(a)))
163 return -EFAULT; 160 return -EFAULT;
@@ -165,22 +162,8 @@ asmlinkage long sys32_mmap(struct mmap_arg_struct __user *arg)
165 if (a.offset & ~PAGE_MASK) 162 if (a.offset & ~PAGE_MASK)
166 return -EINVAL; 163 return -EINVAL;
167 164
168 if (!(a.flags & MAP_ANONYMOUS)) { 165 return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
169 file = fget(a.fd);
170 if (!file)
171 return -EBADF;
172 }
173
174 mm = current->mm;
175 down_write(&mm->mmap_sem);
176 retval = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags,
177 a.offset>>PAGE_SHIFT); 166 a.offset>>PAGE_SHIFT);
178 if (file)
179 fput(file);
180
181 up_write(&mm->mmap_sem);
182
183 return retval;
184} 167}
185 168
186asmlinkage long sys32_mprotect(unsigned long start, size_t len, 169asmlinkage long sys32_mprotect(unsigned long start, size_t len,
@@ -483,30 +466,6 @@ asmlinkage long sys32_sendfile(int out_fd, int in_fd,
483 return ret; 466 return ret;
484} 467}
485 468
486asmlinkage long sys32_mmap2(unsigned long addr, unsigned long len,
487 unsigned long prot, unsigned long flags,
488 unsigned long fd, unsigned long pgoff)
489{
490 struct mm_struct *mm = current->mm;
491 unsigned long error;
492 struct file *file = NULL;
493
494 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
495 if (!(flags & MAP_ANONYMOUS)) {
496 file = fget(fd);
497 if (!file)
498 return -EBADF;
499 }
500
501 down_write(&mm->mmap_sem);
502 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
503 up_write(&mm->mmap_sem);
504
505 if (file)
506 fput(file);
507 return error;
508}
509
510asmlinkage long sys32_olduname(struct oldold_utsname __user *name) 469asmlinkage long sys32_olduname(struct oldold_utsname __user *name)
511{ 470{
512 char *arch = "x86_64"; 471 char *arch = "x86_64";
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 4518dc500903..60d2b2db0bc5 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -118,7 +118,7 @@ extern void acpi_restore_state_mem(void);
118extern unsigned long acpi_wakeup_address; 118extern unsigned long acpi_wakeup_address;
119 119
120/* early initialization routine */ 120/* early initialization routine */
121extern void acpi_reserve_bootmem(void); 121extern void acpi_reserve_wakeup_memory(void);
122 122
123/* 123/*
124 * Check if the CPU can handle C2 and deeper 124 * Check if the CPU can handle C2 and deeper
@@ -158,6 +158,7 @@ struct bootnode;
158 158
159#ifdef CONFIG_ACPI_NUMA 159#ifdef CONFIG_ACPI_NUMA
160extern int acpi_numa; 160extern int acpi_numa;
161extern int acpi_get_nodes(struct bootnode *physnodes);
161extern int acpi_scan_nodes(unsigned long start, unsigned long end); 162extern int acpi_scan_nodes(unsigned long start, unsigned long end);
162#define NR_NODE_MEMBLKS (MAX_NUMNODES*2) 163#define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
163extern void acpi_fake_nodes(const struct bootnode *fake_nodes, 164extern void acpi_fake_nodes(const struct bootnode *fake_nodes,
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h
index 549860d3be8f..2f9047cfaaca 100644
--- a/arch/x86/include/asm/cache.h
+++ b/arch/x86/include/asm/cache.h
@@ -9,12 +9,13 @@
9 9
10#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 10#define __read_mostly __attribute__((__section__(".data.read_mostly")))
11 11
12#define INTERNODE_CACHE_SHIFT CONFIG_X86_INTERNODE_CACHE_SHIFT
13#define INTERNODE_CACHE_BYTES (1 << INTERNODE_CACHE_SHIFT)
14
12#ifdef CONFIG_X86_VSMP 15#ifdef CONFIG_X86_VSMP
13/* vSMP Internode cacheline shift */
14#define INTERNODE_CACHE_SHIFT (12)
15#ifdef CONFIG_SMP 16#ifdef CONFIG_SMP
16#define __cacheline_aligned_in_smp \ 17#define __cacheline_aligned_in_smp \
17 __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \ 18 __attribute__((__aligned__(INTERNODE_CACHE_BYTES))) \
18 __page_aligned_data 19 __page_aligned_data
19#endif 20#endif
20#endif 21#endif
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 9076add593a8..634c40a739a6 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -177,6 +177,7 @@ void clflush_cache_range(void *addr, unsigned int size);
177#ifdef CONFIG_DEBUG_RODATA 177#ifdef CONFIG_DEBUG_RODATA
178void mark_rodata_ro(void); 178void mark_rodata_ro(void);
179extern const int rodata_test_data; 179extern const int rodata_test_data;
180extern int kernel_set_to_readonly;
180void set_kernel_text_rw(void); 181void set_kernel_text_rw(void);
181void set_kernel_text_ro(void); 182void set_kernel_text_ro(void);
182#else 183#else
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 9cfc88b97742..613700f27a4a 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -248,6 +248,7 @@ extern const char * const x86_power_flags[32];
248#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) 248#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
249#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) 249#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
250#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR) 250#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
251#define cpu_has_pclmulqdq boot_cpu_has(X86_FEATURE_PCLMULQDQ)
251 252
252#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) 253#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
253# define cpu_has_invlpg 1 254# define cpu_has_invlpg 1
diff --git a/arch/x86/include/asm/desc_defs.h b/arch/x86/include/asm/desc_defs.h
index 9d6684849fd9..278441f39856 100644
--- a/arch/x86/include/asm/desc_defs.h
+++ b/arch/x86/include/asm/desc_defs.h
@@ -12,9 +12,9 @@
12#include <linux/types.h> 12#include <linux/types.h>
13 13
14/* 14/*
15 * FIXME: Acessing the desc_struct through its fields is more elegant, 15 * FIXME: Accessing the desc_struct through its fields is more elegant,
16 * and should be the one valid thing to do. However, a lot of open code 16 * and should be the one valid thing to do. However, a lot of open code
17 * still touches the a and b acessors, and doing this allow us to do it 17 * still touches the a and b accessors, and doing this allow us to do it
18 * incrementally. We keep the signature as a struct, rather than an union, 18 * incrementally. We keep the signature as a struct, rather than an union,
19 * so we can get rid of it transparently in the future -- glommer 19 * so we can get rid of it transparently in the future -- glommer
20 */ 20 */
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 40b4e614fe71..761249e396fe 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -61,6 +61,12 @@ struct e820map {
61 struct e820entry map[E820_X_MAX]; 61 struct e820entry map[E820_X_MAX];
62}; 62};
63 63
64#define ISA_START_ADDRESS 0xa0000
65#define ISA_END_ADDRESS 0x100000
66
67#define BIOS_BEGIN 0x000a0000
68#define BIOS_END 0x00100000
69
64#ifdef __KERNEL__ 70#ifdef __KERNEL__
65/* see comment in arch/x86/kernel/e820.c */ 71/* see comment in arch/x86/kernel/e820.c */
66extern struct e820map e820; 72extern struct e820map e820;
@@ -126,15 +132,18 @@ extern void e820_reserve_resources(void);
126extern void e820_reserve_resources_late(void); 132extern void e820_reserve_resources_late(void);
127extern void setup_memory_map(void); 133extern void setup_memory_map(void);
128extern char *default_machine_specific_memory_setup(void); 134extern char *default_machine_specific_memory_setup(void);
129#endif /* __KERNEL__ */
130#endif /* __ASSEMBLY__ */
131 135
132#define ISA_START_ADDRESS 0xa0000 136/*
133#define ISA_END_ADDRESS 0x100000 137 * Returns true iff the specified range [s,e) is completely contained inside
134#define is_ISA_range(s, e) ((s) >= ISA_START_ADDRESS && (e) < ISA_END_ADDRESS) 138 * the ISA region.
139 */
140static inline bool is_ISA_range(u64 s, u64 e)
141{
142 return s >= ISA_START_ADDRESS && e <= ISA_END_ADDRESS;
143}
135 144
136#define BIOS_BEGIN 0x000a0000 145#endif /* __KERNEL__ */
137#define BIOS_END 0x00100000 146#endif /* __ASSEMBLY__ */
138 147
139#ifdef __KERNEL__ 148#ifdef __KERNEL__
140#include <linux/ioport.h> 149#include <linux/ioport.h>
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 456a304b8172..8a024babe5e6 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -157,19 +157,6 @@ do { \
157 157
158#define compat_elf_check_arch(x) elf_check_arch_ia32(x) 158#define compat_elf_check_arch(x) elf_check_arch_ia32(x)
159 159
160static inline void start_ia32_thread(struct pt_regs *regs, u32 ip, u32 sp)
161{
162 loadsegment(fs, 0);
163 loadsegment(ds, __USER32_DS);
164 loadsegment(es, __USER32_DS);
165 load_gs_index(0);
166 regs->ip = ip;
167 regs->sp = sp;
168 regs->flags = X86_EFLAGS_IF;
169 regs->cs = __USER32_CS;
170 regs->ss = __USER32_DS;
171}
172
173static inline void elf_common_init(struct thread_struct *t, 160static inline void elf_common_init(struct thread_struct *t,
174 struct pt_regs *regs, const u16 ds) 161 struct pt_regs *regs, const u16 ds)
175{ 162{
@@ -191,11 +178,8 @@ do { \
191#define COMPAT_ELF_PLAT_INIT(regs, load_addr) \ 178#define COMPAT_ELF_PLAT_INIT(regs, load_addr) \
192 elf_common_init(&current->thread, regs, __USER_DS) 179 elf_common_init(&current->thread, regs, __USER_DS)
193 180
194#define compat_start_thread(regs, ip, sp) \ 181void start_thread_ia32(struct pt_regs *regs, u32 new_ip, u32 new_sp);
195do { \ 182#define compat_start_thread start_thread_ia32
196 start_ia32_thread(regs, ip, sp); \
197 set_fs(USER_DS); \
198} while (0)
199 183
200#define COMPAT_SET_PERSONALITY(ex) \ 184#define COMPAT_SET_PERSONALITY(ex) \
201do { \ 185do { \
diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index f5693c81a1db..8e8ec663a98f 100644
--- a/arch/x86/include/asm/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -34,7 +34,7 @@ BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
34 smp_invalidate_interrupt) 34 smp_invalidate_interrupt)
35#endif 35#endif
36 36
37BUILD_INTERRUPT(generic_interrupt, GENERIC_INTERRUPT_VECTOR) 37BUILD_INTERRUPT(x86_platform_ipi, X86_PLATFORM_IPI_VECTOR)
38 38
39/* 39/*
40 * every pentium local APIC has two 'local interrupts', with a 40 * every pentium local APIC has two 'local interrupts', with a
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 108eb6fd1ae7..0f8576427cfe 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -12,7 +12,7 @@ typedef struct {
12 unsigned int apic_timer_irqs; /* arch dependent */ 12 unsigned int apic_timer_irqs; /* arch dependent */
13 unsigned int irq_spurious_count; 13 unsigned int irq_spurious_count;
14#endif 14#endif
15 unsigned int generic_irqs; /* arch dependent */ 15 unsigned int x86_platform_ipis; /* arch dependent */
16 unsigned int apic_perf_irqs; 16 unsigned int apic_perf_irqs;
17 unsigned int apic_pending_irqs; 17 unsigned int apic_pending_irqs;
18#ifdef CONFIG_SMP 18#ifdef CONFIG_SMP
diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h
index 1c22cb05ad6a..5d89fd2a3690 100644
--- a/arch/x86/include/asm/hpet.h
+++ b/arch/x86/include/asm/hpet.h
@@ -65,11 +65,12 @@
65/* hpet memory map physical address */ 65/* hpet memory map physical address */
66extern unsigned long hpet_address; 66extern unsigned long hpet_address;
67extern unsigned long force_hpet_address; 67extern unsigned long force_hpet_address;
68extern u8 hpet_blockid;
68extern int hpet_force_user; 69extern int hpet_force_user;
69extern int is_hpet_enabled(void); 70extern int is_hpet_enabled(void);
70extern int hpet_enable(void); 71extern int hpet_enable(void);
71extern void hpet_disable(void); 72extern void hpet_disable(void);
72extern unsigned long hpet_readl(unsigned long a); 73extern unsigned int hpet_readl(unsigned int a);
73extern void force_hpet_resume(void); 74extern void force_hpet_resume(void);
74 75
75extern void hpet_msi_unmask(unsigned int irq); 76extern void hpet_msi_unmask(unsigned int irq);
@@ -78,9 +79,9 @@ extern void hpet_msi_write(unsigned int irq, struct msi_msg *msg);
78extern void hpet_msi_read(unsigned int irq, struct msi_msg *msg); 79extern void hpet_msi_read(unsigned int irq, struct msi_msg *msg);
79 80
80#ifdef CONFIG_PCI_MSI 81#ifdef CONFIG_PCI_MSI
81extern int arch_setup_hpet_msi(unsigned int irq); 82extern int arch_setup_hpet_msi(unsigned int irq, unsigned int id);
82#else 83#else
83static inline int arch_setup_hpet_msi(unsigned int irq) 84static inline int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
84{ 85{
85 return -EINVAL; 86 return -EINVAL;
86} 87}
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 6e124269fd4b..08c48a81841f 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -27,7 +27,7 @@
27 27
28/* Interrupt handlers registered during init_IRQ */ 28/* Interrupt handlers registered during init_IRQ */
29extern void apic_timer_interrupt(void); 29extern void apic_timer_interrupt(void);
30extern void generic_interrupt(void); 30extern void x86_platform_ipi(void);
31extern void error_interrupt(void); 31extern void error_interrupt(void);
32extern void perf_pending_interrupt(void); 32extern void perf_pending_interrupt(void);
33 33
@@ -119,7 +119,7 @@ extern void eisa_set_level_irq(unsigned int irq);
119/* SMP */ 119/* SMP */
120extern void smp_apic_timer_interrupt(struct pt_regs *); 120extern void smp_apic_timer_interrupt(struct pt_regs *);
121extern void smp_spurious_interrupt(struct pt_regs *); 121extern void smp_spurious_interrupt(struct pt_regs *);
122extern void smp_generic_interrupt(struct pt_regs *); 122extern void smp_x86_platform_ipi(struct pt_regs *);
123extern void smp_error_interrupt(struct pt_regs *); 123extern void smp_error_interrupt(struct pt_regs *);
124#ifdef CONFIG_X86_IO_APIC 124#ifdef CONFIG_X86_IO_APIC
125extern asmlinkage void smp_irq_move_cleanup_interrupt(void); 125extern asmlinkage void smp_irq_move_cleanup_interrupt(void);
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h
index 0b20bbb758f2..ebfb8a9e11f7 100644
--- a/arch/x86/include/asm/i387.h
+++ b/arch/x86/include/asm/i387.h
@@ -10,6 +10,8 @@
10#ifndef _ASM_X86_I387_H 10#ifndef _ASM_X86_I387_H
11#define _ASM_X86_I387_H 11#define _ASM_X86_I387_H
12 12
13#ifndef __ASSEMBLY__
14
13#include <linux/sched.h> 15#include <linux/sched.h>
14#include <linux/kernel_stat.h> 16#include <linux/kernel_stat.h>
15#include <linux/regset.h> 17#include <linux/regset.h>
@@ -411,4 +413,9 @@ static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
411 } 413 }
412} 414}
413 415
416#endif /* __ASSEMBLY__ */
417
418#define PSHUFB_XMM5_XMM0 .byte 0x66, 0x0f, 0x38, 0x00, 0xc5
419#define PSHUFB_XMM5_XMM6 .byte 0x66, 0x0f, 0x38, 0x00, 0xf5
420
414#endif /* _ASM_X86_I387_H */ 421#endif /* _ASM_X86_I387_H */
diff --git a/arch/x86/include/asm/inst.h b/arch/x86/include/asm/inst.h
new file mode 100644
index 000000000000..14cf526091f9
--- /dev/null
+++ b/arch/x86/include/asm/inst.h
@@ -0,0 +1,150 @@
1/*
2 * Generate .byte code for some instructions not supported by old
3 * binutils.
4 */
5#ifndef X86_ASM_INST_H
6#define X86_ASM_INST_H
7
8#ifdef __ASSEMBLY__
9
10 .macro XMM_NUM opd xmm
11 .ifc \xmm,%xmm0
12 \opd = 0
13 .endif
14 .ifc \xmm,%xmm1
15 \opd = 1
16 .endif
17 .ifc \xmm,%xmm2
18 \opd = 2
19 .endif
20 .ifc \xmm,%xmm3
21 \opd = 3
22 .endif
23 .ifc \xmm,%xmm4
24 \opd = 4
25 .endif
26 .ifc \xmm,%xmm5
27 \opd = 5
28 .endif
29 .ifc \xmm,%xmm6
30 \opd = 6
31 .endif
32 .ifc \xmm,%xmm7
33 \opd = 7
34 .endif
35 .ifc \xmm,%xmm8
36 \opd = 8
37 .endif
38 .ifc \xmm,%xmm9
39 \opd = 9
40 .endif
41 .ifc \xmm,%xmm10
42 \opd = 10
43 .endif
44 .ifc \xmm,%xmm11
45 \opd = 11
46 .endif
47 .ifc \xmm,%xmm12
48 \opd = 12
49 .endif
50 .ifc \xmm,%xmm13
51 \opd = 13
52 .endif
53 .ifc \xmm,%xmm14
54 \opd = 14
55 .endif
56 .ifc \xmm,%xmm15
57 \opd = 15
58 .endif
59 .endm
60
61 .macro PFX_OPD_SIZE
62 .byte 0x66
63 .endm
64
65 .macro PFX_REX opd1 opd2
66 .if (\opd1 | \opd2) & 8
67 .byte 0x40 | ((\opd1 & 8) >> 3) | ((\opd2 & 8) >> 1)
68 .endif
69 .endm
70
71 .macro MODRM mod opd1 opd2
72 .byte \mod | (\opd1 & 7) | ((\opd2 & 7) << 3)
73 .endm
74
75 .macro PSHUFB_XMM xmm1 xmm2
76 XMM_NUM pshufb_opd1 \xmm1
77 XMM_NUM pshufb_opd2 \xmm2
78 PFX_OPD_SIZE
79 PFX_REX pshufb_opd1 pshufb_opd2
80 .byte 0x0f, 0x38, 0x00
81 MODRM 0xc0 pshufb_opd1 pshufb_opd2
82 .endm
83
84 .macro PCLMULQDQ imm8 xmm1 xmm2
85 XMM_NUM clmul_opd1 \xmm1
86 XMM_NUM clmul_opd2 \xmm2
87 PFX_OPD_SIZE
88 PFX_REX clmul_opd1 clmul_opd2
89 .byte 0x0f, 0x3a, 0x44
90 MODRM 0xc0 clmul_opd1 clmul_opd2
91 .byte \imm8
92 .endm
93
94 .macro AESKEYGENASSIST rcon xmm1 xmm2
95 XMM_NUM aeskeygen_opd1 \xmm1
96 XMM_NUM aeskeygen_opd2 \xmm2
97 PFX_OPD_SIZE
98 PFX_REX aeskeygen_opd1 aeskeygen_opd2
99 .byte 0x0f, 0x3a, 0xdf
100 MODRM 0xc0 aeskeygen_opd1 aeskeygen_opd2
101 .byte \rcon
102 .endm
103
104 .macro AESIMC xmm1 xmm2
105 XMM_NUM aesimc_opd1 \xmm1
106 XMM_NUM aesimc_opd2 \xmm2
107 PFX_OPD_SIZE
108 PFX_REX aesimc_opd1 aesimc_opd2
109 .byte 0x0f, 0x38, 0xdb
110 MODRM 0xc0 aesimc_opd1 aesimc_opd2
111 .endm
112
113 .macro AESENC xmm1 xmm2
114 XMM_NUM aesenc_opd1 \xmm1
115 XMM_NUM aesenc_opd2 \xmm2
116 PFX_OPD_SIZE
117 PFX_REX aesenc_opd1 aesenc_opd2
118 .byte 0x0f, 0x38, 0xdc
119 MODRM 0xc0 aesenc_opd1 aesenc_opd2
120 .endm
121
122 .macro AESENCLAST xmm1 xmm2
123 XMM_NUM aesenclast_opd1 \xmm1
124 XMM_NUM aesenclast_opd2 \xmm2
125 PFX_OPD_SIZE
126 PFX_REX aesenclast_opd1 aesenclast_opd2
127 .byte 0x0f, 0x38, 0xdd
128 MODRM 0xc0 aesenclast_opd1 aesenclast_opd2
129 .endm
130
131 .macro AESDEC xmm1 xmm2
132 XMM_NUM aesdec_opd1 \xmm1
133 XMM_NUM aesdec_opd2 \xmm2
134 PFX_OPD_SIZE
135 PFX_REX aesdec_opd1 aesdec_opd2
136 .byte 0x0f, 0x38, 0xde
137 MODRM 0xc0 aesdec_opd1 aesdec_opd2
138 .endm
139
140 .macro AESDECLAST xmm1 xmm2
141 XMM_NUM aesdeclast_opd1 \xmm1
142 XMM_NUM aesdeclast_opd2 \xmm2
143 PFX_OPD_SIZE
144 PFX_REX aesdeclast_opd1 aesdeclast_opd2
145 .byte 0x0f, 0x38, 0xdf
146 MODRM 0xc0 aesdeclast_opd1 aesdeclast_opd2
147 .endm
148#endif
149
150#endif
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index ffd700ff5dcb..5458380b6ef8 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -37,7 +37,7 @@ extern void fixup_irqs(void);
37extern void irq_force_complete_move(int); 37extern void irq_force_complete_move(int);
38#endif 38#endif
39 39
40extern void (*generic_interrupt_extension)(void); 40extern void (*x86_platform_ipi_callback)(void);
41extern void native_init_IRQ(void); 41extern void native_init_IRQ(void);
42extern bool handle_irq(unsigned irq, struct pt_regs *regs); 42extern bool handle_irq(unsigned irq, struct pt_regs *regs);
43 43
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 5b21f0ec3df2..6a635bd39867 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -106,7 +106,7 @@
106/* 106/*
107 * Generic system vector for platform specific use 107 * Generic system vector for platform specific use
108 */ 108 */
109#define GENERIC_INTERRUPT_VECTOR 0xed 109#define X86_PLATFORM_IPI_VECTOR 0xed
110 110
111/* 111/*
112 * Performance monitoring pending work vector: 112 * Performance monitoring pending work vector:
diff --git a/arch/x86/include/asm/k8.h b/arch/x86/include/asm/k8.h
index c2d1f3b58e5f..f70e60071fe8 100644
--- a/arch/x86/include/asm/k8.h
+++ b/arch/x86/include/asm/k8.h
@@ -4,13 +4,16 @@
4#include <linux/pci.h> 4#include <linux/pci.h>
5 5
6extern struct pci_device_id k8_nb_ids[]; 6extern struct pci_device_id k8_nb_ids[];
7struct bootnode;
7 8
8extern int early_is_k8_nb(u32 value); 9extern int early_is_k8_nb(u32 value);
9extern struct pci_dev **k8_northbridges; 10extern struct pci_dev **k8_northbridges;
10extern int num_k8_northbridges; 11extern int num_k8_northbridges;
11extern int cache_k8_northbridges(void); 12extern int cache_k8_northbridges(void);
12extern void k8_flush_garts(void); 13extern void k8_flush_garts(void);
13extern int k8_scan_nodes(unsigned long start, unsigned long end); 14extern int k8_get_nodes(struct bootnode *nodes);
15extern int k8_numa_init(unsigned long start_pfn, unsigned long end_pfn);
16extern int k8_scan_nodes(void);
14 17
15#ifdef CONFIG_K8_NB 18#ifdef CONFIG_K8_NB
16static inline struct pci_dev *node_to_k8_nb_misc(int node) 19static inline struct pci_dev *node_to_k8_nb_misc(int node)
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index ef51b501e22a..c24ca9a56458 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -12,6 +12,8 @@ struct device;
12enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND }; 12enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
13 13
14struct microcode_ops { 14struct microcode_ops {
15 void (*init)(struct device *device);
16 void (*fini)(void);
15 enum ucode_state (*request_microcode_user) (int cpu, 17 enum ucode_state (*request_microcode_user) (int cpu,
16 const void __user *buf, size_t size); 18 const void __user *buf, size_t size);
17 19
diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h
index ede6998bd92c..91df7c51806c 100644
--- a/arch/x86/include/asm/mmzone_32.h
+++ b/arch/x86/include/asm/mmzone_32.h
@@ -47,7 +47,7 @@ static inline void resume_map_numa_kva(pgd_t *pgd) {}
47/* 47/*
48 * generic node memory support, the following assumptions apply: 48 * generic node memory support, the following assumptions apply:
49 * 49 *
50 * 1) memory comes in 64Mb contigious chunks which are either present or not 50 * 1) memory comes in 64Mb contiguous chunks which are either present or not
51 * 2) we will not have more than 64Gb in total 51 * 2) we will not have more than 64Gb in total
52 * 52 *
53 * for now assume that 64Gb is max amount of RAM for whole system 53 * for now assume that 64Gb is max amount of RAM for whole system
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index 61d90b1331c3..d8bf23a88d05 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -71,12 +71,7 @@ static inline void early_get_smp_config(void)
71 71
72static inline void find_smp_config(void) 72static inline void find_smp_config(void)
73{ 73{
74 x86_init.mpparse.find_smp_config(1); 74 x86_init.mpparse.find_smp_config();
75}
76
77static inline void early_find_smp_config(void)
78{
79 x86_init.mpparse.find_smp_config(0);
80} 75}
81 76
82#ifdef CONFIG_X86_MPPARSE 77#ifdef CONFIG_X86_MPPARSE
@@ -89,7 +84,7 @@ extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str);
89# else 84# else
90# define default_mpc_oem_bus_info NULL 85# define default_mpc_oem_bus_info NULL
91# endif 86# endif
92extern void default_find_smp_config(unsigned int reserve); 87extern void default_find_smp_config(void);
93extern void default_get_smp_config(unsigned int early); 88extern void default_get_smp_config(unsigned int early);
94#else 89#else
95static inline void early_reserve_e820_mpc_new(void) { } 90static inline void early_reserve_e820_mpc_new(void) { }
@@ -97,7 +92,7 @@ static inline void early_reserve_e820_mpc_new(void) { }
97#define default_mpc_apic_id NULL 92#define default_mpc_apic_id NULL
98#define default_smp_read_mpc_oem NULL 93#define default_smp_read_mpc_oem NULL
99#define default_mpc_oem_bus_info NULL 94#define default_mpc_oem_bus_info NULL
100#define default_find_smp_config x86_init_uint_noop 95#define default_find_smp_config x86_init_noop
101#define default_get_smp_config x86_init_uint_noop 96#define default_get_smp_config x86_init_uint_noop
102#endif 97#endif
103 98
diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h
index 6473f5ccff85..642fe34b36a2 100644
--- a/arch/x86/include/asm/page_types.h
+++ b/arch/x86/include/asm/page_types.h
@@ -49,7 +49,8 @@ extern unsigned long max_pfn_mapped;
49extern unsigned long init_memory_mapping(unsigned long start, 49extern unsigned long init_memory_mapping(unsigned long start,
50 unsigned long end); 50 unsigned long end);
51 51
52extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn); 52extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn,
53 int acpi, int k8);
53extern void free_initmem(void); 54extern void free_initmem(void);
54 55
55#endif /* !__ASSEMBLY__ */ 56#endif /* !__ASSEMBLY__ */
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index b399988eee3a..b4bf9a942ed0 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -118,11 +118,27 @@ extern int __init pcibios_init(void);
118 118
119/* pci-mmconfig.c */ 119/* pci-mmconfig.c */
120 120
121/* "PCI MMCONFIG %04x [bus %02x-%02x]" */
122#define PCI_MMCFG_RESOURCE_NAME_LEN (22 + 4 + 2 + 2)
123
124struct pci_mmcfg_region {
125 struct list_head list;
126 struct resource res;
127 u64 address;
128 char __iomem *virt;
129 u16 segment;
130 u8 start_bus;
131 u8 end_bus;
132 char name[PCI_MMCFG_RESOURCE_NAME_LEN];
133};
134
121extern int __init pci_mmcfg_arch_init(void); 135extern int __init pci_mmcfg_arch_init(void);
122extern void __init pci_mmcfg_arch_free(void); 136extern void __init pci_mmcfg_arch_free(void);
137extern struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus);
138
139extern struct list_head pci_mmcfg_list;
123 140
124extern struct acpi_mcfg_allocation *pci_mmcfg_config; 141#define PCI_MMCFG_BUS_OFFSET(bus) ((bus) << 20)
125extern int pci_mmcfg_config_num;
126 142
127/* 143/*
128 * AMD Fam10h CPUs are buggy, and cannot access MMIO config space 144 * AMD Fam10h CPUs are buggy, and cannot access MMIO config space
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index af6fd360ab35..a34c785c5a63 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -16,6 +16,8 @@
16 16
17#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
18 18
19#include <asm/x86_init.h>
20
19/* 21/*
20 * ZERO_PAGE is a global shared page that is always zero: used 22 * ZERO_PAGE is a global shared page that is always zero: used
21 * for zero-mapped memory areas etc.. 23 * for zero-mapped memory areas etc..
@@ -270,9 +272,9 @@ static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
270 unsigned long new_flags) 272 unsigned long new_flags)
271{ 273{
272 /* 274 /*
273 * PAT type is always WB for ISA. So no need to check. 275 * PAT type is always WB for untracked ranges, so no need to check.
274 */ 276 */
275 if (is_ISA_range(paddr, paddr + size - 1)) 277 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
276 return 1; 278 return 1;
277 279
278 /* 280 /*
diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h
index 621f56d73121..4009f6534f52 100644
--- a/arch/x86/include/asm/proto.h
+++ b/arch/x86/include/asm/proto.h
@@ -5,18 +5,19 @@
5 5
6/* misc architecture specific prototypes */ 6/* misc architecture specific prototypes */
7 7
8extern void early_idt_handler(void); 8void early_idt_handler(void);
9 9
10extern void system_call(void); 10void system_call(void);
11extern void syscall_init(void); 11void syscall_init(void);
12 12
13extern void ia32_syscall(void); 13void ia32_syscall(void);
14extern void ia32_cstar_target(void); 14void ia32_cstar_target(void);
15extern void ia32_sysenter_target(void); 15void ia32_sysenter_target(void);
16 16
17extern void syscall32_cpu_init(void); 17void syscall32_cpu_init(void);
18 18
19extern void check_efer(void); 19void x86_configure_nx(void);
20void x86_report_nx(void);
20 21
21extern int reboot_force; 22extern int reboot_force;
22 23
diff --git a/arch/x86/include/asm/sections.h b/arch/x86/include/asm/sections.h
index 1b7ee5d673c2..0a5242428659 100644
--- a/arch/x86/include/asm/sections.h
+++ b/arch/x86/include/asm/sections.h
@@ -2,7 +2,13 @@
2#define _ASM_X86_SECTIONS_H 2#define _ASM_X86_SECTIONS_H
3 3
4#include <asm-generic/sections.h> 4#include <asm-generic/sections.h>
5#include <asm/uaccess.h>
5 6
6extern char __brk_base[], __brk_limit[]; 7extern char __brk_base[], __brk_limit[];
8extern struct exception_table_entry __stop___ex_table[];
9
10#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
11extern char __end_rodata_hpage_align[];
12#endif
7 13
8#endif /* _ASM_X86_SECTIONS_H */ 14#endif /* _ASM_X86_SECTIONS_H */
diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h
index 72e5a4491661..04459d25e66e 100644
--- a/arch/x86/include/asm/sigcontext.h
+++ b/arch/x86/include/asm/sigcontext.h
@@ -124,7 +124,7 @@ struct sigcontext {
124 * fpstate is really (struct _fpstate *) or (struct _xstate *) 124 * fpstate is really (struct _fpstate *) or (struct _xstate *)
125 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved 125 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
126 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end 126 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
127 * of extended memory layout. See comments at the defintion of 127 * of extended memory layout. See comments at the definition of
128 * (struct _fpx_sw_bytes) 128 * (struct _fpx_sw_bytes)
129 */ 129 */
130 void __user *fpstate; /* zero when no FPU/extended context */ 130 void __user *fpstate; /* zero when no FPU/extended context */
@@ -219,7 +219,7 @@ struct sigcontext {
219 * fpstate is really (struct _fpstate *) or (struct _xstate *) 219 * fpstate is really (struct _fpstate *) or (struct _xstate *)
220 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved 220 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
221 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end 221 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
222 * of extended memory layout. See comments at the defintion of 222 * of extended memory layout. See comments at the definition of
223 * (struct _fpx_sw_bytes) 223 * (struct _fpx_sw_bytes)
224 */ 224 */
225 void __user *fpstate; /* zero when no FPU/extended context */ 225 void __user *fpstate; /* zero when no FPU/extended context */
diff --git a/arch/x86/include/asm/sys_ia32.h b/arch/x86/include/asm/sys_ia32.h
index 9af9decb38c3..4a5a089e1c62 100644
--- a/arch/x86/include/asm/sys_ia32.h
+++ b/arch/x86/include/asm/sys_ia32.h
@@ -57,9 +57,6 @@ asmlinkage long sys32_pwrite(unsigned int, char __user *, u32, u32, u32);
57asmlinkage long sys32_personality(unsigned long); 57asmlinkage long sys32_personality(unsigned long);
58asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32); 58asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32);
59 59
60asmlinkage long sys32_mmap2(unsigned long, unsigned long, unsigned long,
61 unsigned long, unsigned long, unsigned long);
62
63struct oldold_utsname; 60struct oldold_utsname;
64struct old_utsname; 61struct old_utsname;
65asmlinkage long sys32_olduname(struct oldold_utsname __user *); 62asmlinkage long sys32_olduname(struct oldold_utsname __user *);
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 372b76edd63f..1bb6e395881c 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -55,8 +55,6 @@ struct sel_arg_struct;
55struct oldold_utsname; 55struct oldold_utsname;
56struct old_utsname; 56struct old_utsname;
57 57
58asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
59 unsigned long, unsigned long, unsigned long);
60asmlinkage int old_mmap(struct mmap_arg_struct __user *); 58asmlinkage int old_mmap(struct mmap_arg_struct __user *);
61asmlinkage int old_select(struct sel_arg_struct __user *); 59asmlinkage int old_select(struct sel_arg_struct __user *);
62asmlinkage int sys_ipc(uint, int, int, int, void __user *, long); 60asmlinkage int sys_ipc(uint, int, int, int, void __user *, long);
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index 80e2984f521c..b414d2b401f6 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -55,7 +55,7 @@
55#define DESC_STATUS_SOURCE_TIMEOUT 3 55#define DESC_STATUS_SOURCE_TIMEOUT 3
56 56
57/* 57/*
58 * source side threshholds at which message retries print a warning 58 * source side thresholds at which message retries print a warning
59 */ 59 */
60#define SOURCE_TIMEOUT_LIMIT 20 60#define SOURCE_TIMEOUT_LIMIT 20
61#define DESTINATION_TIMEOUT_LIMIT 20 61#define DESTINATION_TIMEOUT_LIMIT 20
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index d8e71459f025..ea0e8ea15e15 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -26,7 +26,7 @@ struct x86_init_mpparse {
26 void (*smp_read_mpc_oem)(struct mpc_table *mpc); 26 void (*smp_read_mpc_oem)(struct mpc_table *mpc);
27 void (*mpc_oem_pci_bus)(struct mpc_bus *m); 27 void (*mpc_oem_pci_bus)(struct mpc_bus *m);
28 void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name); 28 void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
29 void (*find_smp_config)(unsigned int reserve); 29 void (*find_smp_config)(void);
30 void (*get_smp_config)(unsigned int early); 30 void (*get_smp_config)(unsigned int early);
31}; 31};
32 32
@@ -125,12 +125,14 @@ struct x86_cpuinit_ops {
125 * @calibrate_tsc: calibrate TSC 125 * @calibrate_tsc: calibrate TSC
126 * @get_wallclock: get time from HW clock like RTC etc. 126 * @get_wallclock: get time from HW clock like RTC etc.
127 * @set_wallclock: set time back to HW clock 127 * @set_wallclock: set time back to HW clock
128 * @is_untracked_pat_range exclude from PAT logic
128 */ 129 */
129struct x86_platform_ops { 130struct x86_platform_ops {
130 unsigned long (*calibrate_tsc)(void); 131 unsigned long (*calibrate_tsc)(void);
131 unsigned long (*get_wallclock)(void); 132 unsigned long (*get_wallclock)(void);
132 int (*set_wallclock)(unsigned long nowtime); 133 int (*set_wallclock)(unsigned long nowtime);
133 void (*iommu_shutdown)(void); 134 void (*iommu_shutdown)(void);
135 bool (*is_untracked_pat_range)(u64 start, u64 end);
134}; 136};
135 137
136extern struct x86_init_ops x86_init; 138extern struct x86_init_ops x86_init;
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index d5b7e90c0edf..396ff4cc8ed4 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -37,31 +37,4 @@
37extern struct shared_info *HYPERVISOR_shared_info; 37extern struct shared_info *HYPERVISOR_shared_info;
38extern struct start_info *xen_start_info; 38extern struct start_info *xen_start_info;
39 39
40enum xen_domain_type {
41 XEN_NATIVE, /* running on bare hardware */
42 XEN_PV_DOMAIN, /* running in a PV domain */
43 XEN_HVM_DOMAIN, /* running in a Xen hvm domain */
44};
45
46#ifdef CONFIG_XEN
47extern enum xen_domain_type xen_domain_type;
48#else
49#define xen_domain_type XEN_NATIVE
50#endif
51
52#define xen_domain() (xen_domain_type != XEN_NATIVE)
53#define xen_pv_domain() (xen_domain() && \
54 xen_domain_type == XEN_PV_DOMAIN)
55#define xen_hvm_domain() (xen_domain() && \
56 xen_domain_type == XEN_HVM_DOMAIN)
57
58#ifdef CONFIG_XEN_DOM0
59#include <xen/interface/xen.h>
60
61#define xen_initial_domain() (xen_pv_domain() && \
62 xen_start_info->flags & SIF_INITDOMAIN)
63#else /* !CONFIG_XEN_DOM0 */
64#define xen_initial_domain() (0)
65#endif /* CONFIG_XEN_DOM0 */
66
67#endif /* _ASM_X86_XEN_HYPERVISOR_H */ 40#endif /* _ASM_X86_XEN_HYPERVISOR_H */
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 67e929b89875..fb1035cd9a6a 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -624,6 +624,7 @@ static int __init acpi_parse_hpet(struct acpi_table_header *table)
624 } 624 }
625 625
626 hpet_address = hpet_tbl->address.address; 626 hpet_address = hpet_tbl->address.address;
627 hpet_blockid = hpet_tbl->sequence;
627 628
628 /* 629 /*
629 * Some broken BIOSes advertise HPET at 0x0. We really do not 630 * Some broken BIOSes advertise HPET at 0x0. We really do not
@@ -1122,7 +1123,7 @@ static int __init acpi_parse_madt_ioapic_entries(void)
1122 if (!acpi_sci_override_gsi) 1123 if (!acpi_sci_override_gsi)
1123 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); 1124 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
1124 1125
1125 /* Fill in identity legacy mapings where no override */ 1126 /* Fill in identity legacy mappings where no override */
1126 mp_config_acpi_legacy_irqs(); 1127 mp_config_acpi_legacy_irqs();
1127 1128
1128 count = 1129 count =
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index ca93638ba430..82e508677b91 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -78,12 +78,9 @@ int acpi_save_state_mem(void)
78#ifndef CONFIG_64BIT 78#ifndef CONFIG_64BIT
79 store_gdt((struct desc_ptr *)&header->pmode_gdt); 79 store_gdt((struct desc_ptr *)&header->pmode_gdt);
80 80
81 header->pmode_efer_low = nx_enabled; 81 if (rdmsr_safe(MSR_EFER, &header->pmode_efer_low,
82 if (header->pmode_efer_low & 1) { 82 &header->pmode_efer_high))
83 /* This is strange, why not save efer, always? */ 83 header->pmode_efer_low = header->pmode_efer_high = 0;
84 rdmsr(MSR_EFER, header->pmode_efer_low,
85 header->pmode_efer_high);
86 }
87#endif /* !CONFIG_64BIT */ 84#endif /* !CONFIG_64BIT */
88 85
89 header->pmode_cr0 = read_cr0(); 86 header->pmode_cr0 = read_cr0();
@@ -119,29 +116,32 @@ void acpi_restore_state_mem(void)
119 116
120 117
121/** 118/**
122 * acpi_reserve_bootmem - do _very_ early ACPI initialisation 119 * acpi_reserve_wakeup_memory - do _very_ early ACPI initialisation
123 * 120 *
124 * We allocate a page from the first 1MB of memory for the wakeup 121 * We allocate a page from the first 1MB of memory for the wakeup
125 * routine for when we come back from a sleep state. The 122 * routine for when we come back from a sleep state. The
126 * runtime allocator allows specification of <16MB pages, but not 123 * runtime allocator allows specification of <16MB pages, but not
127 * <1MB pages. 124 * <1MB pages.
128 */ 125 */
129void __init acpi_reserve_bootmem(void) 126void __init acpi_reserve_wakeup_memory(void)
130{ 127{
128 unsigned long mem;
129
131 if ((&wakeup_code_end - &wakeup_code_start) > WAKEUP_SIZE) { 130 if ((&wakeup_code_end - &wakeup_code_start) > WAKEUP_SIZE) {
132 printk(KERN_ERR 131 printk(KERN_ERR
133 "ACPI: Wakeup code way too big, S3 disabled.\n"); 132 "ACPI: Wakeup code way too big, S3 disabled.\n");
134 return; 133 return;
135 } 134 }
136 135
137 acpi_realmode = (unsigned long)alloc_bootmem_low(WAKEUP_SIZE); 136 mem = find_e820_area(0, 1<<20, WAKEUP_SIZE, PAGE_SIZE);
138 137
139 if (!acpi_realmode) { 138 if (mem == -1L) {
140 printk(KERN_ERR "ACPI: Cannot allocate lowmem, S3 disabled.\n"); 139 printk(KERN_ERR "ACPI: Cannot allocate lowmem, S3 disabled.\n");
141 return; 140 return;
142 } 141 }
143 142 acpi_realmode = (unsigned long) phys_to_virt(mem);
144 acpi_wakeup_address = virt_to_phys((void *)acpi_realmode); 143 acpi_wakeup_address = mem;
144 reserve_early(mem, mem + WAKEUP_SIZE, "ACPI WAKEUP");
145} 145}
146 146
147 147
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 32fb09102a13..1c0fb4d4ad55 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -1783,7 +1783,7 @@ retry:
1783 goto out; 1783 goto out;
1784 1784
1785 /* 1785 /*
1786 * aperture was sucessfully enlarged by 128 MB, try 1786 * aperture was successfully enlarged by 128 MB, try
1787 * allocation again 1787 * allocation again
1788 */ 1788 */
1789 goto retry; 1789 goto retry;
@@ -2490,7 +2490,7 @@ int __init amd_iommu_init_passthrough(void)
2490 struct pci_dev *dev = NULL; 2490 struct pci_dev *dev = NULL;
2491 u16 devid; 2491 u16 devid;
2492 2492
2493 /* allocate passthroug domain */ 2493 /* allocate passthrough domain */
2494 pt_domain = protection_domain_alloc(); 2494 pt_domain = protection_domain_alloc();
2495 if (!pt_domain) 2495 if (!pt_domain)
2496 return -ENOMEM; 2496 return -ENOMEM;
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 7ffc39965233..9c4a6f747552 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -1336,6 +1336,9 @@ void __init amd_iommu_detect(void)
1336 iommu_detected = 1; 1336 iommu_detected = 1;
1337 amd_iommu_detected = 1; 1337 amd_iommu_detected = 1;
1338 x86_init.iommu.iommu_init = amd_iommu_init; 1338 x86_init.iommu.iommu_init = amd_iommu_init;
1339
1340 /* Make sure ACS will be enabled */
1341 pci_request_acs();
1339 } 1342 }
1340} 1343}
1341 1344
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index ad8c75b9e453..efb2b9cd132c 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -647,7 +647,7 @@ static int __init calibrate_APIC_clock(void)
647 calibration_result = (delta * APIC_DIVISOR) / LAPIC_CAL_LOOPS; 647 calibration_result = (delta * APIC_DIVISOR) / LAPIC_CAL_LOOPS;
648 648
649 apic_printk(APIC_VERBOSE, "..... delta %ld\n", delta); 649 apic_printk(APIC_VERBOSE, "..... delta %ld\n", delta);
650 apic_printk(APIC_VERBOSE, "..... mult: %ld\n", lapic_clockevent.mult); 650 apic_printk(APIC_VERBOSE, "..... mult: %u\n", lapic_clockevent.mult);
651 apic_printk(APIC_VERBOSE, "..... calibration result: %u\n", 651 apic_printk(APIC_VERBOSE, "..... calibration result: %u\n",
652 calibration_result); 652 calibration_result);
653 653
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index c0b4468683f9..d5d498fbee4b 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3267,7 +3267,8 @@ void destroy_irq(unsigned int irq)
3267 * MSI message composition 3267 * MSI message composition
3268 */ 3268 */
3269#ifdef CONFIG_PCI_MSI 3269#ifdef CONFIG_PCI_MSI
3270static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) 3270static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
3271 struct msi_msg *msg, u8 hpet_id)
3271{ 3272{
3272 struct irq_cfg *cfg; 3273 struct irq_cfg *cfg;
3273 int err; 3274 int err;
@@ -3301,7 +3302,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
3301 irte.dest_id = IRTE_DEST(dest); 3302 irte.dest_id = IRTE_DEST(dest);
3302 3303
3303 /* Set source-id of interrupt request */ 3304 /* Set source-id of interrupt request */
3304 set_msi_sid(&irte, pdev); 3305 if (pdev)
3306 set_msi_sid(&irte, pdev);
3307 else
3308 set_hpet_sid(&irte, hpet_id);
3305 3309
3306 modify_irte(irq, &irte); 3310 modify_irte(irq, &irte);
3307 3311
@@ -3466,7 +3470,7 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
3466 int ret; 3470 int ret;
3467 struct msi_msg msg; 3471 struct msi_msg msg;
3468 3472
3469 ret = msi_compose_msg(dev, irq, &msg); 3473 ret = msi_compose_msg(dev, irq, &msg, -1);
3470 if (ret < 0) 3474 if (ret < 0)
3471 return ret; 3475 return ret;
3472 3476
@@ -3599,7 +3603,7 @@ int arch_setup_dmar_msi(unsigned int irq)
3599 int ret; 3603 int ret;
3600 struct msi_msg msg; 3604 struct msi_msg msg;
3601 3605
3602 ret = msi_compose_msg(NULL, irq, &msg); 3606 ret = msi_compose_msg(NULL, irq, &msg, -1);
3603 if (ret < 0) 3607 if (ret < 0)
3604 return ret; 3608 return ret;
3605 dmar_msi_write(irq, &msg); 3609 dmar_msi_write(irq, &msg);
@@ -3639,6 +3643,19 @@ static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
3639 3643
3640#endif /* CONFIG_SMP */ 3644#endif /* CONFIG_SMP */
3641 3645
3646static struct irq_chip ir_hpet_msi_type = {
3647 .name = "IR-HPET_MSI",
3648 .unmask = hpet_msi_unmask,
3649 .mask = hpet_msi_mask,
3650#ifdef CONFIG_INTR_REMAP
3651 .ack = ir_ack_apic_edge,
3652#ifdef CONFIG_SMP
3653 .set_affinity = ir_set_msi_irq_affinity,
3654#endif
3655#endif
3656 .retrigger = ioapic_retrigger_irq,
3657};
3658
3642static struct irq_chip hpet_msi_type = { 3659static struct irq_chip hpet_msi_type = {
3643 .name = "HPET_MSI", 3660 .name = "HPET_MSI",
3644 .unmask = hpet_msi_unmask, 3661 .unmask = hpet_msi_unmask,
@@ -3650,20 +3667,36 @@ static struct irq_chip hpet_msi_type = {
3650 .retrigger = ioapic_retrigger_irq, 3667 .retrigger = ioapic_retrigger_irq,
3651}; 3668};
3652 3669
3653int arch_setup_hpet_msi(unsigned int irq) 3670int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
3654{ 3671{
3655 int ret; 3672 int ret;
3656 struct msi_msg msg; 3673 struct msi_msg msg;
3657 struct irq_desc *desc = irq_to_desc(irq); 3674 struct irq_desc *desc = irq_to_desc(irq);
3658 3675
3659 ret = msi_compose_msg(NULL, irq, &msg); 3676 if (intr_remapping_enabled) {
3677 struct intel_iommu *iommu = map_hpet_to_ir(id);
3678 int index;
3679
3680 if (!iommu)
3681 return -1;
3682
3683 index = alloc_irte(iommu, irq, 1);
3684 if (index < 0)
3685 return -1;
3686 }
3687
3688 ret = msi_compose_msg(NULL, irq, &msg, id);
3660 if (ret < 0) 3689 if (ret < 0)
3661 return ret; 3690 return ret;
3662 3691
3663 hpet_msi_write(irq, &msg); 3692 hpet_msi_write(irq, &msg);
3664 desc->status |= IRQ_MOVE_PCNTXT; 3693 desc->status |= IRQ_MOVE_PCNTXT;
3665 set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq, 3694 if (irq_remapped(irq))
3666 "edge"); 3695 set_irq_chip_and_handler_name(irq, &ir_hpet_msi_type,
3696 handle_edge_irq, "edge");
3697 else
3698 set_irq_chip_and_handler_name(irq, &hpet_msi_type,
3699 handle_edge_irq, "edge");
3667 3700
3668 return 0; 3701 return 0;
3669} 3702}
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c
index 07cdbdcd7a92..98c4665f251c 100644
--- a/arch/x86/kernel/apic/numaq_32.c
+++ b/arch/x86/kernel/apic/numaq_32.c
@@ -264,11 +264,6 @@ static void __init smp_read_mpc_oem(struct mpc_table *mpc)
264static __init void early_check_numaq(void) 264static __init void early_check_numaq(void)
265{ 265{
266 /* 266 /*
267 * Find possible boot-time SMP configuration:
268 */
269 early_find_smp_config();
270
271 /*
272 * get boot-time SMP configuration: 267 * get boot-time SMP configuration:
273 */ 268 */
274 if (smp_found_config) 269 if (smp_found_config)
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 130c4b934877..b684bb303cbf 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -30,10 +30,22 @@
30#include <asm/apic.h> 30#include <asm/apic.h>
31#include <asm/ipi.h> 31#include <asm/ipi.h>
32#include <asm/smp.h> 32#include <asm/smp.h>
33#include <asm/x86_init.h>
33 34
34DEFINE_PER_CPU(int, x2apic_extra_bits); 35DEFINE_PER_CPU(int, x2apic_extra_bits);
35 36
36static enum uv_system_type uv_system_type; 37static enum uv_system_type uv_system_type;
38static u64 gru_start_paddr, gru_end_paddr;
39
40static inline bool is_GRU_range(u64 start, u64 end)
41{
42 return start >= gru_start_paddr && end <= gru_end_paddr;
43}
44
45static bool uv_is_untracked_pat_range(u64 start, u64 end)
46{
47 return is_ISA_range(start, end) || is_GRU_range(start, end);
48}
37 49
38static int early_get_nodeid(void) 50static int early_get_nodeid(void)
39{ 51{
@@ -49,6 +61,7 @@ static int early_get_nodeid(void)
49static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 61static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
50{ 62{
51 if (!strcmp(oem_id, "SGI")) { 63 if (!strcmp(oem_id, "SGI")) {
64 x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range;
52 if (!strcmp(oem_table_id, "UVL")) 65 if (!strcmp(oem_table_id, "UVL"))
53 uv_system_type = UV_LEGACY_APIC; 66 uv_system_type = UV_LEGACY_APIC;
54 else if (!strcmp(oem_table_id, "UVX")) 67 else if (!strcmp(oem_table_id, "UVX"))
@@ -385,8 +398,12 @@ static __init void map_gru_high(int max_pnode)
385 int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT; 398 int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT;
386 399
387 gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR); 400 gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR);
388 if (gru.s.enable) 401 if (gru.s.enable) {
389 map_high("GRU", gru.s.base, shift, max_pnode, map_wb); 402 map_high("GRU", gru.s.base, shift, max_pnode, map_wb);
403 gru_start_paddr = ((u64)gru.s.base << shift);
404 gru_end_paddr = gru_start_paddr + (1UL << shift) * (max_pnode + 1);
405
406 }
390} 407}
391 408
392static __init void map_mmr_high(int max_pnode) 409static __init void map_mmr_high(int max_pnode)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index a4ec8b647544..c1afa990a6c8 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1136,7 +1136,7 @@ void __cpuinit cpu_init(void)
1136 wrmsrl(MSR_KERNEL_GS_BASE, 0); 1136 wrmsrl(MSR_KERNEL_GS_BASE, 0);
1137 barrier(); 1137 barrier();
1138 1138
1139 check_efer(); 1139 x86_configure_nx();
1140 if (cpu != 0) 1140 if (cpu != 0)
1141 enable_x2apic(); 1141 enable_x2apic();
1142 1142
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 8b581d3905cb..d2e7c77c1ea4 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -764,14 +764,15 @@ static struct freq_attr *acpi_cpufreq_attr[] = {
764}; 764};
765 765
766static struct cpufreq_driver acpi_cpufreq_driver = { 766static struct cpufreq_driver acpi_cpufreq_driver = {
767 .verify = acpi_cpufreq_verify, 767 .verify = acpi_cpufreq_verify,
768 .target = acpi_cpufreq_target, 768 .target = acpi_cpufreq_target,
769 .init = acpi_cpufreq_cpu_init, 769 .bios_limit = acpi_processor_get_bios_limit,
770 .exit = acpi_cpufreq_cpu_exit, 770 .init = acpi_cpufreq_cpu_init,
771 .resume = acpi_cpufreq_resume, 771 .exit = acpi_cpufreq_cpu_exit,
772 .name = "acpi-cpufreq", 772 .resume = acpi_cpufreq_resume,
773 .owner = THIS_MODULE, 773 .name = "acpi-cpufreq",
774 .attr = acpi_cpufreq_attr, 774 .owner = THIS_MODULE,
775 .attr = acpi_cpufreq_attr,
775}; 776};
776 777
777static int __init acpi_cpufreq_init(void) 778static int __init acpi_cpufreq_init(void)
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.c b/arch/x86/kernel/cpu/cpufreq/longhaul.c
index cabd2fa3fc93..7e7eea4f8261 100644
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.c
@@ -885,7 +885,7 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
885 885
886 /* Find ACPI data for processor */ 886 /* Find ACPI data for processor */
887 acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, 887 acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
888 ACPI_UINT32_MAX, &longhaul_walk_callback, 888 ACPI_UINT32_MAX, &longhaul_walk_callback, NULL,
889 NULL, (void *)&pr); 889 NULL, (void *)&pr);
890 890
891 /* Check ACPI support for C3 state */ 891 /* Check ACPI support for C3 state */
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
index f10dea409f40..cb01dac267d3 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
@@ -164,7 +164,7 @@ static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
164 } 164 }
165 165
166 /* cpuinfo and default policy values */ 166 /* cpuinfo and default policy values */
167 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 167 policy->cpuinfo.transition_latency = 200000;
168 policy->cur = busfreq * max_multiplier; 168 policy->cur = busfreq * max_multiplier;
169 169
170 result = cpufreq_frequency_table_cpuinfo(policy, clock_ratio); 170 result = cpufreq_frequency_table_cpuinfo(policy, clock_ratio);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
index d47c775eb0ab..9a97116f89e5 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
@@ -714,14 +714,17 @@ static struct freq_attr *powernow_table_attr[] = {
714}; 714};
715 715
716static struct cpufreq_driver powernow_driver = { 716static struct cpufreq_driver powernow_driver = {
717 .verify = powernow_verify, 717 .verify = powernow_verify,
718 .target = powernow_target, 718 .target = powernow_target,
719 .get = powernow_get, 719 .get = powernow_get,
720 .init = powernow_cpu_init, 720#ifdef CONFIG_X86_POWERNOW_K7_ACPI
721 .exit = powernow_cpu_exit, 721 .bios_limit = acpi_processor_get_bios_limit,
722 .name = "powernow-k7", 722#endif
723 .owner = THIS_MODULE, 723 .init = powernow_cpu_init,
724 .attr = powernow_table_attr, 724 .exit = powernow_cpu_exit,
725 .name = "powernow-k7",
726 .owner = THIS_MODULE,
727 .attr = powernow_table_attr,
725}; 728};
726 729
727static int __init powernow_init(void) 730static int __init powernow_init(void)
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 3f12dabeab52..a9df9441a9a2 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -1118,7 +1118,7 @@ static int transition_frequency_pstate(struct powernow_k8_data *data,
1118static int powernowk8_target(struct cpufreq_policy *pol, 1118static int powernowk8_target(struct cpufreq_policy *pol,
1119 unsigned targfreq, unsigned relation) 1119 unsigned targfreq, unsigned relation)
1120{ 1120{
1121 cpumask_t oldmask; 1121 cpumask_var_t oldmask;
1122 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); 1122 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1123 u32 checkfid; 1123 u32 checkfid;
1124 u32 checkvid; 1124 u32 checkvid;
@@ -1131,9 +1131,13 @@ static int powernowk8_target(struct cpufreq_policy *pol,
1131 checkfid = data->currfid; 1131 checkfid = data->currfid;
1132 checkvid = data->currvid; 1132 checkvid = data->currvid;
1133 1133
1134 /* only run on specific CPU from here on */ 1134 /* only run on specific CPU from here on. */
1135 oldmask = current->cpus_allowed; 1135 /* This is poor form: use a workqueue or smp_call_function_single */
1136 set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu)); 1136 if (!alloc_cpumask_var(&oldmask, GFP_KERNEL))
1137 return -ENOMEM;
1138
1139 cpumask_copy(oldmask, tsk_cpumask(current));
1140 set_cpus_allowed_ptr(current, cpumask_of(pol->cpu));
1137 1141
1138 if (smp_processor_id() != pol->cpu) { 1142 if (smp_processor_id() != pol->cpu) {
1139 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); 1143 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
@@ -1193,7 +1197,8 @@ static int powernowk8_target(struct cpufreq_policy *pol,
1193 ret = 0; 1197 ret = 0;
1194 1198
1195err_out: 1199err_out:
1196 set_cpus_allowed_ptr(current, &oldmask); 1200 set_cpus_allowed_ptr(current, oldmask);
1201 free_cpumask_var(oldmask);
1197 return ret; 1202 return ret;
1198} 1203}
1199 1204
@@ -1393,14 +1398,15 @@ static struct freq_attr *powernow_k8_attr[] = {
1393}; 1398};
1394 1399
1395static struct cpufreq_driver cpufreq_amd64_driver = { 1400static struct cpufreq_driver cpufreq_amd64_driver = {
1396 .verify = powernowk8_verify, 1401 .verify = powernowk8_verify,
1397 .target = powernowk8_target, 1402 .target = powernowk8_target,
1398 .init = powernowk8_cpu_init, 1403 .bios_limit = acpi_processor_get_bios_limit,
1399 .exit = __devexit_p(powernowk8_cpu_exit), 1404 .init = powernowk8_cpu_init,
1400 .get = powernowk8_get, 1405 .exit = __devexit_p(powernowk8_cpu_exit),
1401 .name = "powernow-k8", 1406 .get = powernowk8_get,
1402 .owner = THIS_MODULE, 1407 .name = "powernow-k8",
1403 .attr = powernow_k8_attr, 1408 .owner = THIS_MODULE,
1409 .attr = powernow_k8_attr,
1404}; 1410};
1405 1411
1406/* driver entry point for init */ 1412/* driver entry point for init */
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
index 3ae5a7a3a500..2ce8e0b5cc54 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
@@ -39,7 +39,7 @@ static struct pci_dev *speedstep_chipset_dev;
39 39
40/* speedstep_processor 40/* speedstep_processor
41 */ 41 */
42static unsigned int speedstep_processor; 42static enum speedstep_processor speedstep_processor;
43 43
44static u32 pmbase; 44static u32 pmbase;
45 45
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
index f4c290b8482f..ad0083abfa23 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
@@ -34,7 +34,7 @@ static int relaxed_check;
34 * GET PROCESSOR CORE SPEED IN KHZ * 34 * GET PROCESSOR CORE SPEED IN KHZ *
35 *********************************************************************/ 35 *********************************************************************/
36 36
37static unsigned int pentium3_get_frequency(unsigned int processor) 37static unsigned int pentium3_get_frequency(enum speedstep_processor processor)
38{ 38{
39 /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */ 39 /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
40 struct { 40 struct {
@@ -227,7 +227,7 @@ static unsigned int pentium4_get_frequency(void)
227 227
228 228
229/* Warning: may get called from smp_call_function_single. */ 229/* Warning: may get called from smp_call_function_single. */
230unsigned int speedstep_get_frequency(unsigned int processor) 230unsigned int speedstep_get_frequency(enum speedstep_processor processor)
231{ 231{
232 switch (processor) { 232 switch (processor) {
233 case SPEEDSTEP_CPU_PCORE: 233 case SPEEDSTEP_CPU_PCORE:
@@ -380,7 +380,7 @@ EXPORT_SYMBOL_GPL(speedstep_detect_processor);
380 * DETECT SPEEDSTEP SPEEDS * 380 * DETECT SPEEDSTEP SPEEDS *
381 *********************************************************************/ 381 *********************************************************************/
382 382
383unsigned int speedstep_get_freqs(unsigned int processor, 383unsigned int speedstep_get_freqs(enum speedstep_processor processor,
384 unsigned int *low_speed, 384 unsigned int *low_speed,
385 unsigned int *high_speed, 385 unsigned int *high_speed,
386 unsigned int *transition_latency, 386 unsigned int *transition_latency,
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
index 2b6c04e5a304..70d9cea1219d 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
@@ -11,18 +11,18 @@
11 11
12 12
13/* processors */ 13/* processors */
14 14enum speedstep_processor {
15#define SPEEDSTEP_CPU_PIII_C_EARLY 0x00000001 /* Coppermine core */ 15 SPEEDSTEP_CPU_PIII_C_EARLY = 0x00000001, /* Coppermine core */
16#define SPEEDSTEP_CPU_PIII_C 0x00000002 /* Coppermine core */ 16 SPEEDSTEP_CPU_PIII_C = 0x00000002, /* Coppermine core */
17#define SPEEDSTEP_CPU_PIII_T 0x00000003 /* Tualatin core */ 17 SPEEDSTEP_CPU_PIII_T = 0x00000003, /* Tualatin core */
18#define SPEEDSTEP_CPU_P4M 0x00000004 /* P4-M */ 18 SPEEDSTEP_CPU_P4M = 0x00000004, /* P4-M */
19
20/* the following processors are not speedstep-capable and are not auto-detected 19/* the following processors are not speedstep-capable and are not auto-detected
21 * in speedstep_detect_processor(). However, their speed can be detected using 20 * in speedstep_detect_processor(). However, their speed can be detected using
22 * the speedstep_get_frequency() call. */ 21 * the speedstep_get_frequency() call. */
23#define SPEEDSTEP_CPU_PM 0xFFFFFF03 /* Pentium M */ 22 SPEEDSTEP_CPU_PM = 0xFFFFFF03, /* Pentium M */
24#define SPEEDSTEP_CPU_P4D 0xFFFFFF04 /* desktop P4 */ 23 SPEEDSTEP_CPU_P4D = 0xFFFFFF04, /* desktop P4 */
25#define SPEEDSTEP_CPU_PCORE 0xFFFFFF05 /* Core */ 24 SPEEDSTEP_CPU_PCORE = 0xFFFFFF05, /* Core */
25};
26 26
27/* speedstep states -- only two of them */ 27/* speedstep states -- only two of them */
28 28
@@ -31,10 +31,10 @@
31 31
32 32
33/* detect a speedstep-capable processor */ 33/* detect a speedstep-capable processor */
34extern unsigned int speedstep_detect_processor (void); 34extern enum speedstep_processor speedstep_detect_processor(void);
35 35
36/* detect the current speed (in khz) of the processor */ 36/* detect the current speed (in khz) of the processor */
37extern unsigned int speedstep_get_frequency(unsigned int processor); 37extern unsigned int speedstep_get_frequency(enum speedstep_processor processor);
38 38
39 39
40/* detect the low and high speeds of the processor. The callback 40/* detect the low and high speeds of the processor. The callback
@@ -42,7 +42,7 @@ extern unsigned int speedstep_get_frequency(unsigned int processor);
42 * SPEEDSTEP_LOW; the second argument is zero so that no 42 * SPEEDSTEP_LOW; the second argument is zero so that no
43 * cpufreq_notify_transition calls are initiated. 43 * cpufreq_notify_transition calls are initiated.
44 */ 44 */
45extern unsigned int speedstep_get_freqs(unsigned int processor, 45extern unsigned int speedstep_get_freqs(enum speedstep_processor processor,
46 unsigned int *low_speed, 46 unsigned int *low_speed,
47 unsigned int *high_speed, 47 unsigned int *high_speed,
48 unsigned int *transition_latency, 48 unsigned int *transition_latency,
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
index befea088e4f5..04d73c114e49 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
@@ -35,7 +35,7 @@ static int smi_cmd;
35static unsigned int smi_sig; 35static unsigned int smi_sig;
36 36
37/* info about the processor */ 37/* info about the processor */
38static unsigned int speedstep_processor; 38static enum speedstep_processor speedstep_processor;
39 39
40/* 40/*
41 * There are only two frequency states for each processor. Values 41 * There are only two frequency states for each processor. Values
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 40e1835b35e8..c900b73f9224 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -263,8 +263,12 @@ static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
263 /* Don't do the funky fallback heuristics the AMD version employs 263 /* Don't do the funky fallback heuristics the AMD version employs
264 for now. */ 264 for now. */
265 node = apicid_to_node[apicid]; 265 node = apicid_to_node[apicid];
266 if (node == NUMA_NO_NODE || !node_online(node)) 266 if (node == NUMA_NO_NODE)
267 node = first_node(node_online_map); 267 node = first_node(node_online_map);
268 else if (!node_online(node)) {
269 /* reuse the value from init_cpu_to_node() */
270 node = cpu_to_node(cpu);
271 }
268 numa_set_node(cpu, node); 272 numa_set_node(cpu, node);
269 273
270 printk(KERN_INFO "CPU %d/0x%x -> Node %d\n", cpu, apicid, node); 274 printk(KERN_INFO "CPU %d/0x%x -> Node %d\n", cpu, apicid, node);
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 0df4c2b7107f..6c40f6b5b340 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -94,7 +94,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
94 { 0xd1, LVL_3, 1024 }, /* 4-way set assoc, 64 byte line size */ 94 { 0xd1, LVL_3, 1024 }, /* 4-way set assoc, 64 byte line size */
95 { 0xd2, LVL_3, 2048 }, /* 4-way set assoc, 64 byte line size */ 95 { 0xd2, LVL_3, 2048 }, /* 4-way set assoc, 64 byte line size */
96 { 0xd6, LVL_3, 1024 }, /* 8-way set assoc, 64 byte line size */ 96 { 0xd6, LVL_3, 1024 }, /* 8-way set assoc, 64 byte line size */
97 { 0xd7, LVL_3, 2038 }, /* 8-way set assoc, 64 byte line size */ 97 { 0xd7, LVL_3, 2048 }, /* 8-way set assoc, 64 byte line size */
98 { 0xd8, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */ 98 { 0xd8, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */
99 { 0xdc, LVL_3, 2048 }, /* 12-way set assoc, 64 byte line size */ 99 { 0xdc, LVL_3, 2048 }, /* 12-way set assoc, 64 byte line size */
100 { 0xdd, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */ 100 { 0xdd, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */
@@ -102,6 +102,9 @@ static const struct _cache_table __cpuinitconst cache_table[] =
102 { 0xe2, LVL_3, 2048 }, /* 16-way set assoc, 64 byte line size */ 102 { 0xe2, LVL_3, 2048 }, /* 16-way set assoc, 64 byte line size */
103 { 0xe3, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */ 103 { 0xe3, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */
104 { 0xe4, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */ 104 { 0xe4, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
105 { 0xea, LVL_3, 12288 }, /* 24-way set assoc, 64 byte line size */
106 { 0xeb, LVL_3, 18432 }, /* 24-way set assoc, 64 byte line size */
107 { 0xec, LVL_3, 24576 }, /* 24-way set assoc, 64 byte line size */
105 { 0x00, 0, 0} 108 { 0x00, 0, 0}
106}; 109};
107 110
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 0bcaa3875863..d7ebf25d10ed 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -2016,9 +2016,11 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
2016 break; 2016 break;
2017 case CPU_DOWN_FAILED: 2017 case CPU_DOWN_FAILED:
2018 case CPU_DOWN_FAILED_FROZEN: 2018 case CPU_DOWN_FAILED_FROZEN:
2019 t->expires = round_jiffies(jiffies + 2019 if (!mce_ignore_ce && check_interval) {
2020 t->expires = round_jiffies(jiffies +
2020 __get_cpu_var(mce_next_interval)); 2021 __get_cpu_var(mce_next_interval));
2021 add_timer_on(t, cpu); 2022 add_timer_on(t, cpu);
2023 }
2022 smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); 2024 smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
2023 break; 2025 break;
2024 case CPU_POST_DEAD: 2026 case CPU_POST_DEAD:
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c
index 73c86db5acbe..09b1698e0466 100644
--- a/arch/x86/kernel/cpu/mtrr/cleanup.c
+++ b/arch/x86/kernel/cpu/mtrr/cleanup.c
@@ -170,6 +170,41 @@ static int __init cmp_range(const void *x1, const void *x2)
170 return start1 - start2; 170 return start1 - start2;
171} 171}
172 172
173static int __init clean_sort_range(struct res_range *range, int az)
174{
175 int i, j, k = az - 1, nr_range = 0;
176
177 for (i = 0; i < k; i++) {
178 if (range[i].end)
179 continue;
180 for (j = k; j > i; j--) {
181 if (range[j].end) {
182 k = j;
183 break;
184 }
185 }
186 if (j == i)
187 break;
188 range[i].start = range[k].start;
189 range[i].end = range[k].end;
190 range[k].start = 0;
191 range[k].end = 0;
192 k--;
193 }
194 /* count it */
195 for (i = 0; i < az; i++) {
196 if (!range[i].end) {
197 nr_range = i;
198 break;
199 }
200 }
201
202 /* sort them */
203 sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL);
204
205 return nr_range;
206}
207
173#define BIOS_BUG_MSG KERN_WARNING \ 208#define BIOS_BUG_MSG KERN_WARNING \
174 "WARNING: BIOS bug: VAR MTRR %d contains strange UC entry under 1M, check with your system vendor!\n" 209 "WARNING: BIOS bug: VAR MTRR %d contains strange UC entry under 1M, check with your system vendor!\n"
175 210
@@ -223,22 +258,18 @@ x86_get_mtrr_mem_range(struct res_range *range, int nr_range,
223 subtract_range(range, extra_remove_base, 258 subtract_range(range, extra_remove_base,
224 extra_remove_base + extra_remove_size - 1); 259 extra_remove_base + extra_remove_size - 1);
225 260
226 /* get new range num */
227 nr_range = 0;
228 for (i = 0; i < RANGE_NUM; i++) {
229 if (!range[i].end)
230 continue;
231 nr_range++;
232 }
233 if (debug_print) { 261 if (debug_print) {
234 printk(KERN_DEBUG "After UC checking\n"); 262 printk(KERN_DEBUG "After UC checking\n");
235 for (i = 0; i < nr_range; i++) 263 for (i = 0; i < RANGE_NUM; i++) {
264 if (!range[i].end)
265 continue;
236 printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n", 266 printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n",
237 range[i].start, range[i].end + 1); 267 range[i].start, range[i].end + 1);
268 }
238 } 269 }
239 270
240 /* sort the ranges */ 271 /* sort the ranges */
241 sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL); 272 nr_range = clean_sort_range(range, RANGE_NUM);
242 if (debug_print) { 273 if (debug_print) {
243 printk(KERN_DEBUG "After sorting\n"); 274 printk(KERN_DEBUG "After sorting\n");
244 for (i = 0; i < nr_range; i++) 275 for (i = 0; i < nr_range; i++)
@@ -689,8 +720,6 @@ static int __init mtrr_need_cleanup(void)
689 continue; 720 continue;
690 if (!size) 721 if (!size)
691 type = MTRR_NUM_TYPES; 722 type = MTRR_NUM_TYPES;
692 if (type == MTRR_TYPE_WRPROT)
693 type = MTRR_TYPE_UNCACHABLE;
694 num[type]++; 723 num[type]++;
695 } 724 }
696 725
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index c1bbed1021d9..ab1a8a89b984 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1286,7 +1286,7 @@ x86_perf_event_set_period(struct perf_event *event,
1286 return 0; 1286 return 0;
1287 1287
1288 /* 1288 /*
1289 * If we are way outside a reasoable range then just skip forward: 1289 * If we are way outside a reasonable range then just skip forward:
1290 */ 1290 */
1291 if (unlikely(left <= -period)) { 1291 if (unlikely(left <= -period)) {
1292 left = period; 1292 left = period;
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 4deb8fc849dd..63bca794c8f9 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -977,8 +977,8 @@ apicinterrupt UV_BAU_MESSAGE \
977#endif 977#endif
978apicinterrupt LOCAL_TIMER_VECTOR \ 978apicinterrupt LOCAL_TIMER_VECTOR \
979 apic_timer_interrupt smp_apic_timer_interrupt 979 apic_timer_interrupt smp_apic_timer_interrupt
980apicinterrupt GENERIC_INTERRUPT_VECTOR \ 980apicinterrupt X86_PLATFORM_IPI_VECTOR \
981 generic_interrupt smp_generic_interrupt 981 x86_platform_ipi smp_x86_platform_ipi
982 982
983#ifdef CONFIG_SMP 983#ifdef CONFIG_SMP
984apicinterrupt INVALIDATE_TLB_VECTOR_START+0 \ 984apicinterrupt INVALIDATE_TLB_VECTOR_START+0 \
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 5a1b9758fd62..309689245431 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -189,9 +189,26 @@ static void wait_for_nmi(void)
189 nmi_wait_count++; 189 nmi_wait_count++;
190} 190}
191 191
192static inline int
193within(unsigned long addr, unsigned long start, unsigned long end)
194{
195 return addr >= start && addr < end;
196}
197
192static int 198static int
193do_ftrace_mod_code(unsigned long ip, void *new_code) 199do_ftrace_mod_code(unsigned long ip, void *new_code)
194{ 200{
201 /*
202 * On x86_64, kernel text mappings are mapped read-only with
203 * CONFIG_DEBUG_RODATA. So we use the kernel identity mapping instead
204 * of the kernel text mapping to modify the kernel text.
205 *
206 * For 32bit kernels, these mappings are same and we can use
207 * kernel identity mapping to modify code.
208 */
209 if (within(ip, (unsigned long)_text, (unsigned long)_etext))
210 ip = (unsigned long)__va(__pa(ip));
211
195 mod_code_ip = (void *)ip; 212 mod_code_ip = (void *)ip;
196 mod_code_newcode = new_code; 213 mod_code_newcode = new_code;
197 214
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 050c278481b1..7fd318bac59c 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -18,6 +18,8 @@
18#include <asm/asm-offsets.h> 18#include <asm/asm-offsets.h>
19#include <asm/setup.h> 19#include <asm/setup.h>
20#include <asm/processor-flags.h> 20#include <asm/processor-flags.h>
21#include <asm/msr-index.h>
22#include <asm/cpufeature.h>
21#include <asm/percpu.h> 23#include <asm/percpu.h>
22 24
23/* Physical address */ 25/* Physical address */
@@ -297,25 +299,27 @@ ENTRY(startup_32_smp)
297 orl %edx,%eax 299 orl %edx,%eax
298 movl %eax,%cr4 300 movl %eax,%cr4
299 301
300 btl $5, %eax # check if PAE is enabled 302 testb $X86_CR4_PAE, %al # check if PAE is enabled
301 jnc 6f 303 jz 6f
302 304
303 /* Check if extended functions are implemented */ 305 /* Check if extended functions are implemented */
304 movl $0x80000000, %eax 306 movl $0x80000000, %eax
305 cpuid 307 cpuid
306 cmpl $0x80000000, %eax 308 /* Value must be in the range 0x80000001 to 0x8000ffff */
307 jbe 6f 309 subl $0x80000001, %eax
310 cmpl $(0x8000ffff-0x80000001), %eax
311 ja 6f
308 mov $0x80000001, %eax 312 mov $0x80000001, %eax
309 cpuid 313 cpuid
310 /* Execute Disable bit supported? */ 314 /* Execute Disable bit supported? */
311 btl $20, %edx 315 btl $(X86_FEATURE_NX & 31), %edx
312 jnc 6f 316 jnc 6f
313 317
314 /* Setup EFER (Extended Feature Enable Register) */ 318 /* Setup EFER (Extended Feature Enable Register) */
315 movl $0xc0000080, %ecx 319 movl $MSR_EFER, %ecx
316 rdmsr 320 rdmsr
317 321
318 btsl $11, %eax 322 btsl $_EFER_NX, %eax
319 /* Make changes effective */ 323 /* Make changes effective */
320 wrmsr 324 wrmsr
321 325
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 22db86a37643..2d8b5035371c 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -262,11 +262,11 @@ ENTRY(secondary_startup_64)
262 .quad x86_64_start_kernel 262 .quad x86_64_start_kernel
263 ENTRY(initial_gs) 263 ENTRY(initial_gs)
264 .quad INIT_PER_CPU_VAR(irq_stack_union) 264 .quad INIT_PER_CPU_VAR(irq_stack_union)
265 __FINITDATA
266 265
267 ENTRY(stack_start) 266 ENTRY(stack_start)
268 .quad init_thread_union+THREAD_SIZE-8 267 .quad init_thread_union+THREAD_SIZE-8
269 .word 0 268 .word 0
269 __FINITDATA
270 270
271bad_address: 271bad_address:
272 jmp bad_address 272 jmp bad_address
@@ -340,6 +340,7 @@ ENTRY(name)
340 i = i + 1 ; \ 340 i = i + 1 ; \
341 .endr 341 .endr
342 342
343 .data
343 /* 344 /*
344 * This default setting generates an ident mapping at address 0x100000 345 * This default setting generates an ident mapping at address 0x100000
345 * and a mapping for the kernel that precisely maps virtual address 346 * and a mapping for the kernel that precisely maps virtual address
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index dedc2bddf7a5..ba6e65884603 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -33,6 +33,7 @@
33 * HPET address is set in acpi/boot.c, when an ACPI entry exists 33 * HPET address is set in acpi/boot.c, when an ACPI entry exists
34 */ 34 */
35unsigned long hpet_address; 35unsigned long hpet_address;
36u8 hpet_blockid; /* OS timer block num */
36#ifdef CONFIG_PCI_MSI 37#ifdef CONFIG_PCI_MSI
37static unsigned long hpet_num_timers; 38static unsigned long hpet_num_timers;
38#endif 39#endif
@@ -47,12 +48,12 @@ struct hpet_dev {
47 char name[10]; 48 char name[10];
48}; 49};
49 50
50unsigned long hpet_readl(unsigned long a) 51inline unsigned int hpet_readl(unsigned int a)
51{ 52{
52 return readl(hpet_virt_address + a); 53 return readl(hpet_virt_address + a);
53} 54}
54 55
55static inline void hpet_writel(unsigned long d, unsigned long a) 56static inline void hpet_writel(unsigned int d, unsigned int a)
56{ 57{
57 writel(d, hpet_virt_address + a); 58 writel(d, hpet_virt_address + a);
58} 59}
@@ -167,7 +168,7 @@ do { \
167 168
168static void hpet_reserve_msi_timers(struct hpet_data *hd); 169static void hpet_reserve_msi_timers(struct hpet_data *hd);
169 170
170static void hpet_reserve_platform_timers(unsigned long id) 171static void hpet_reserve_platform_timers(unsigned int id)
171{ 172{
172 struct hpet __iomem *hpet = hpet_virt_address; 173 struct hpet __iomem *hpet = hpet_virt_address;
173 struct hpet_timer __iomem *timer = &hpet->hpet_timers[2]; 174 struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
@@ -205,7 +206,7 @@ static void hpet_reserve_platform_timers(unsigned long id)
205 206
206} 207}
207#else 208#else
208static void hpet_reserve_platform_timers(unsigned long id) { } 209static void hpet_reserve_platform_timers(unsigned int id) { }
209#endif 210#endif
210 211
211/* 212/*
@@ -246,7 +247,7 @@ static void hpet_reset_counter(void)
246 247
247static void hpet_start_counter(void) 248static void hpet_start_counter(void)
248{ 249{
249 unsigned long cfg = hpet_readl(HPET_CFG); 250 unsigned int cfg = hpet_readl(HPET_CFG);
250 cfg |= HPET_CFG_ENABLE; 251 cfg |= HPET_CFG_ENABLE;
251 hpet_writel(cfg, HPET_CFG); 252 hpet_writel(cfg, HPET_CFG);
252} 253}
@@ -271,7 +272,7 @@ static void hpet_resume_counter(void)
271 272
272static void hpet_enable_legacy_int(void) 273static void hpet_enable_legacy_int(void)
273{ 274{
274 unsigned long cfg = hpet_readl(HPET_CFG); 275 unsigned int cfg = hpet_readl(HPET_CFG);
275 276
276 cfg |= HPET_CFG_LEGACY; 277 cfg |= HPET_CFG_LEGACY;
277 hpet_writel(cfg, HPET_CFG); 278 hpet_writel(cfg, HPET_CFG);
@@ -314,7 +315,7 @@ static int hpet_setup_msi_irq(unsigned int irq);
314static void hpet_set_mode(enum clock_event_mode mode, 315static void hpet_set_mode(enum clock_event_mode mode,
315 struct clock_event_device *evt, int timer) 316 struct clock_event_device *evt, int timer)
316{ 317{
317 unsigned long cfg, cmp, now; 318 unsigned int cfg, cmp, now;
318 uint64_t delta; 319 uint64_t delta;
319 320
320 switch (mode) { 321 switch (mode) {
@@ -323,7 +324,7 @@ static void hpet_set_mode(enum clock_event_mode mode,
323 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult; 324 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
324 delta >>= evt->shift; 325 delta >>= evt->shift;
325 now = hpet_readl(HPET_COUNTER); 326 now = hpet_readl(HPET_COUNTER);
326 cmp = now + (unsigned long) delta; 327 cmp = now + (unsigned int) delta;
327 cfg = hpet_readl(HPET_Tn_CFG(timer)); 328 cfg = hpet_readl(HPET_Tn_CFG(timer));
328 /* Make sure we use edge triggered interrupts */ 329 /* Make sure we use edge triggered interrupts */
329 cfg &= ~HPET_TN_LEVEL; 330 cfg &= ~HPET_TN_LEVEL;
@@ -339,7 +340,7 @@ static void hpet_set_mode(enum clock_event_mode mode,
339 * (See AMD-8111 HyperTransport I/O Hub Data Sheet, 340 * (See AMD-8111 HyperTransport I/O Hub Data Sheet,
340 * Publication # 24674) 341 * Publication # 24674)
341 */ 342 */
342 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer)); 343 hpet_writel((unsigned int) delta, HPET_Tn_CMP(timer));
343 hpet_start_counter(); 344 hpet_start_counter();
344 hpet_print_config(); 345 hpet_print_config();
345 break; 346 break;
@@ -383,13 +384,24 @@ static int hpet_next_event(unsigned long delta,
383 hpet_writel(cnt, HPET_Tn_CMP(timer)); 384 hpet_writel(cnt, HPET_Tn_CMP(timer));
384 385
385 /* 386 /*
386 * We need to read back the CMP register to make sure that 387 * We need to read back the CMP register on certain HPET
387 * what we wrote hit the chip before we compare it to the 388 * implementations (ATI chipsets) which seem to delay the
388 * counter. 389 * transfer of the compare register into the internal compare
390 * logic. With small deltas this might actually be too late as
391 * the counter could already be higher than the compare value
392 * at that point and we would wait for the next hpet interrupt
393 * forever. We found out that reading the CMP register back
394 * forces the transfer so we can rely on the comparison with
395 * the counter register below. If the read back from the
396 * compare register does not match the value we programmed
397 * then we might have a real hardware problem. We can not do
398 * much about it here, but at least alert the user/admin with
399 * a prominent warning.
389 */ 400 */
390 WARN_ON_ONCE((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt); 401 WARN_ONCE(hpet_readl(HPET_Tn_CMP(timer)) != cnt,
402 KERN_WARNING "hpet: compare register read back failed.\n");
391 403
392 return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0; 404 return (s32)(hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
393} 405}
394 406
395static void hpet_legacy_set_mode(enum clock_event_mode mode, 407static void hpet_legacy_set_mode(enum clock_event_mode mode,
@@ -415,7 +427,7 @@ static struct hpet_dev *hpet_devs;
415void hpet_msi_unmask(unsigned int irq) 427void hpet_msi_unmask(unsigned int irq)
416{ 428{
417 struct hpet_dev *hdev = get_irq_data(irq); 429 struct hpet_dev *hdev = get_irq_data(irq);
418 unsigned long cfg; 430 unsigned int cfg;
419 431
420 /* unmask it */ 432 /* unmask it */
421 cfg = hpet_readl(HPET_Tn_CFG(hdev->num)); 433 cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
@@ -425,7 +437,7 @@ void hpet_msi_unmask(unsigned int irq)
425 437
426void hpet_msi_mask(unsigned int irq) 438void hpet_msi_mask(unsigned int irq)
427{ 439{
428 unsigned long cfg; 440 unsigned int cfg;
429 struct hpet_dev *hdev = get_irq_data(irq); 441 struct hpet_dev *hdev = get_irq_data(irq);
430 442
431 /* mask it */ 443 /* mask it */
@@ -467,7 +479,7 @@ static int hpet_msi_next_event(unsigned long delta,
467 479
468static int hpet_setup_msi_irq(unsigned int irq) 480static int hpet_setup_msi_irq(unsigned int irq)
469{ 481{
470 if (arch_setup_hpet_msi(irq)) { 482 if (arch_setup_hpet_msi(irq, hpet_blockid)) {
471 destroy_irq(irq); 483 destroy_irq(irq);
472 return -EINVAL; 484 return -EINVAL;
473 } 485 }
@@ -584,6 +596,8 @@ static void hpet_msi_capability_lookup(unsigned int start_timer)
584 unsigned int num_timers_used = 0; 596 unsigned int num_timers_used = 0;
585 int i; 597 int i;
586 598
599 if (boot_cpu_has(X86_FEATURE_ARAT))
600 return;
587 id = hpet_readl(HPET_ID); 601 id = hpet_readl(HPET_ID);
588 602
589 num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT); 603 num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
@@ -598,7 +612,7 @@ static void hpet_msi_capability_lookup(unsigned int start_timer)
598 612
599 for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) { 613 for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) {
600 struct hpet_dev *hdev = &hpet_devs[num_timers_used]; 614 struct hpet_dev *hdev = &hpet_devs[num_timers_used];
601 unsigned long cfg = hpet_readl(HPET_Tn_CFG(i)); 615 unsigned int cfg = hpet_readl(HPET_Tn_CFG(i));
602 616
603 /* Only consider HPET timer with MSI support */ 617 /* Only consider HPET timer with MSI support */
604 if (!(cfg & HPET_TN_FSB_CAP)) 618 if (!(cfg & HPET_TN_FSB_CAP))
@@ -813,7 +827,7 @@ static int hpet_clocksource_register(void)
813 */ 827 */
814int __init hpet_enable(void) 828int __init hpet_enable(void)
815{ 829{
816 unsigned long id; 830 unsigned int id;
817 int i; 831 int i;
818 832
819 if (!is_hpet_capable()) 833 if (!is_hpet_capable())
@@ -872,10 +886,8 @@ int __init hpet_enable(void)
872 886
873 if (id & HPET_ID_LEGSUP) { 887 if (id & HPET_ID_LEGSUP) {
874 hpet_legacy_clockevent_register(); 888 hpet_legacy_clockevent_register();
875 hpet_msi_capability_lookup(2);
876 return 1; 889 return 1;
877 } 890 }
878 hpet_msi_capability_lookup(0);
879 return 0; 891 return 0;
880 892
881out_nohpet: 893out_nohpet:
@@ -908,9 +920,17 @@ static __init int hpet_late_init(void)
908 if (!hpet_virt_address) 920 if (!hpet_virt_address)
909 return -ENODEV; 921 return -ENODEV;
910 922
923 if (hpet_readl(HPET_ID) & HPET_ID_LEGSUP)
924 hpet_msi_capability_lookup(2);
925 else
926 hpet_msi_capability_lookup(0);
927
911 hpet_reserve_platform_timers(hpet_readl(HPET_ID)); 928 hpet_reserve_platform_timers(hpet_readl(HPET_ID));
912 hpet_print_config(); 929 hpet_print_config();
913 930
931 if (boot_cpu_has(X86_FEATURE_ARAT))
932 return 0;
933
914 for_each_online_cpu(cpu) { 934 for_each_online_cpu(cpu) {
915 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu); 935 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
916 } 936 }
@@ -925,7 +945,7 @@ fs_initcall(hpet_late_init);
925void hpet_disable(void) 945void hpet_disable(void)
926{ 946{
927 if (is_hpet_capable()) { 947 if (is_hpet_capable()) {
928 unsigned long cfg = hpet_readl(HPET_CFG); 948 unsigned int cfg = hpet_readl(HPET_CFG);
929 949
930 if (hpet_legacy_int_enabled) { 950 if (hpet_legacy_int_enabled) {
931 cfg &= ~HPET_CFG_LEGACY; 951 cfg &= ~HPET_CFG_LEGACY;
@@ -965,8 +985,8 @@ static int hpet_prev_update_sec;
965static struct rtc_time hpet_alarm_time; 985static struct rtc_time hpet_alarm_time;
966static unsigned long hpet_pie_count; 986static unsigned long hpet_pie_count;
967static u32 hpet_t1_cmp; 987static u32 hpet_t1_cmp;
968static unsigned long hpet_default_delta; 988static u32 hpet_default_delta;
969static unsigned long hpet_pie_delta; 989static u32 hpet_pie_delta;
970static unsigned long hpet_pie_limit; 990static unsigned long hpet_pie_limit;
971 991
972static rtc_irq_handler irq_handler; 992static rtc_irq_handler irq_handler;
@@ -1017,7 +1037,8 @@ EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
1017 */ 1037 */
1018int hpet_rtc_timer_init(void) 1038int hpet_rtc_timer_init(void)
1019{ 1039{
1020 unsigned long cfg, cnt, delta, flags; 1040 unsigned int cfg, cnt, delta;
1041 unsigned long flags;
1021 1042
1022 if (!is_hpet_enabled()) 1043 if (!is_hpet_enabled())
1023 return 0; 1044 return 0;
@@ -1027,7 +1048,7 @@ int hpet_rtc_timer_init(void)
1027 1048
1028 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC; 1049 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1029 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT; 1050 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
1030 hpet_default_delta = (unsigned long) clc; 1051 hpet_default_delta = clc;
1031 } 1052 }
1032 1053
1033 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit) 1054 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
@@ -1113,7 +1134,7 @@ int hpet_set_periodic_freq(unsigned long freq)
1113 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC; 1134 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1114 do_div(clc, freq); 1135 do_div(clc, freq);
1115 clc >>= hpet_clockevent.shift; 1136 clc >>= hpet_clockevent.shift;
1116 hpet_pie_delta = (unsigned long) clc; 1137 hpet_pie_delta = clc;
1117 } 1138 }
1118 return 1; 1139 return 1;
1119} 1140}
@@ -1127,7 +1148,7 @@ EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
1127 1148
1128static void hpet_rtc_timer_reinit(void) 1149static void hpet_rtc_timer_reinit(void)
1129{ 1150{
1130 unsigned long cfg, delta; 1151 unsigned int cfg, delta;
1131 int lost_ints = -1; 1152 int lost_ints = -1;
1132 1153
1133 if (unlikely(!hpet_rtc_flags)) { 1154 if (unlikely(!hpet_rtc_flags)) {
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index fee6cc2b2079..664bcb7384ac 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -18,7 +18,7 @@
18atomic_t irq_err_count; 18atomic_t irq_err_count;
19 19
20/* Function pointer for generic interrupt vector handling */ 20/* Function pointer for generic interrupt vector handling */
21void (*generic_interrupt_extension)(void) = NULL; 21void (*x86_platform_ipi_callback)(void) = NULL;
22 22
23/* 23/*
24 * 'what should we do if we get a hw irq event on an illegal vector'. 24 * 'what should we do if we get a hw irq event on an illegal vector'.
@@ -72,10 +72,10 @@ static int show_other_interrupts(struct seq_file *p, int prec)
72 seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs); 72 seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs);
73 seq_printf(p, " Performance pending work\n"); 73 seq_printf(p, " Performance pending work\n");
74#endif 74#endif
75 if (generic_interrupt_extension) { 75 if (x86_platform_ipi_callback) {
76 seq_printf(p, "%*s: ", prec, "PLT"); 76 seq_printf(p, "%*s: ", prec, "PLT");
77 for_each_online_cpu(j) 77 for_each_online_cpu(j)
78 seq_printf(p, "%10u ", irq_stats(j)->generic_irqs); 78 seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis);
79 seq_printf(p, " Platform interrupts\n"); 79 seq_printf(p, " Platform interrupts\n");
80 } 80 }
81#ifdef CONFIG_SMP 81#ifdef CONFIG_SMP
@@ -187,8 +187,8 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
187 sum += irq_stats(cpu)->apic_perf_irqs; 187 sum += irq_stats(cpu)->apic_perf_irqs;
188 sum += irq_stats(cpu)->apic_pending_irqs; 188 sum += irq_stats(cpu)->apic_pending_irqs;
189#endif 189#endif
190 if (generic_interrupt_extension) 190 if (x86_platform_ipi_callback)
191 sum += irq_stats(cpu)->generic_irqs; 191 sum += irq_stats(cpu)->x86_platform_ipis;
192#ifdef CONFIG_SMP 192#ifdef CONFIG_SMP
193 sum += irq_stats(cpu)->irq_resched_count; 193 sum += irq_stats(cpu)->irq_resched_count;
194 sum += irq_stats(cpu)->irq_call_count; 194 sum += irq_stats(cpu)->irq_call_count;
@@ -251,9 +251,9 @@ unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
251} 251}
252 252
253/* 253/*
254 * Handler for GENERIC_INTERRUPT_VECTOR. 254 * Handler for X86_PLATFORM_IPI_VECTOR.
255 */ 255 */
256void smp_generic_interrupt(struct pt_regs *regs) 256void smp_x86_platform_ipi(struct pt_regs *regs)
257{ 257{
258 struct pt_regs *old_regs = set_irq_regs(regs); 258 struct pt_regs *old_regs = set_irq_regs(regs);
259 259
@@ -263,10 +263,10 @@ void smp_generic_interrupt(struct pt_regs *regs)
263 263
264 irq_enter(); 264 irq_enter();
265 265
266 inc_irq_stat(generic_irqs); 266 inc_irq_stat(x86_platform_ipis);
267 267
268 if (generic_interrupt_extension) 268 if (x86_platform_ipi_callback)
269 generic_interrupt_extension(); 269 x86_platform_ipi_callback();
270 270
271 irq_exit(); 271 irq_exit();
272 272
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 40f30773fb29..d5932226614f 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -200,8 +200,8 @@ static void __init apic_intr_init(void)
200 /* self generated IPI for local APIC timer */ 200 /* self generated IPI for local APIC timer */
201 alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); 201 alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
202 202
203 /* generic IPI for platform specific use */ 203 /* IPI for X86 platform specific use */
204 alloc_intr_gate(GENERIC_INTERRUPT_VECTOR, generic_interrupt); 204 alloc_intr_gate(X86_PLATFORM_IPI_VECTOR, x86_platform_ipi);
205 205
206 /* IPI vectors for APIC spurious and error interrupts */ 206 /* IPI vectors for APIC spurious and error interrupts */
207 alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); 207 alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 20a5b3689463..dd74fe7273b1 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -86,9 +86,15 @@ void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
86 gdb_regs[GDB_DS] = regs->ds; 86 gdb_regs[GDB_DS] = regs->ds;
87 gdb_regs[GDB_ES] = regs->es; 87 gdb_regs[GDB_ES] = regs->es;
88 gdb_regs[GDB_CS] = regs->cs; 88 gdb_regs[GDB_CS] = regs->cs;
89 gdb_regs[GDB_SS] = __KERNEL_DS;
90 gdb_regs[GDB_FS] = 0xFFFF; 89 gdb_regs[GDB_FS] = 0xFFFF;
91 gdb_regs[GDB_GS] = 0xFFFF; 90 gdb_regs[GDB_GS] = 0xFFFF;
91 if (user_mode_vm(regs)) {
92 gdb_regs[GDB_SS] = regs->ss;
93 gdb_regs[GDB_SP] = regs->sp;
94 } else {
95 gdb_regs[GDB_SS] = __KERNEL_DS;
96 gdb_regs[GDB_SP] = kernel_stack_pointer(regs);
97 }
92#else 98#else
93 gdb_regs[GDB_R8] = regs->r8; 99 gdb_regs[GDB_R8] = regs->r8;
94 gdb_regs[GDB_R9] = regs->r9; 100 gdb_regs[GDB_R9] = regs->r9;
@@ -101,8 +107,8 @@ void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
101 gdb_regs32[GDB_PS] = regs->flags; 107 gdb_regs32[GDB_PS] = regs->flags;
102 gdb_regs32[GDB_CS] = regs->cs; 108 gdb_regs32[GDB_CS] = regs->cs;
103 gdb_regs32[GDB_SS] = regs->ss; 109 gdb_regs32[GDB_SS] = regs->ss;
104#endif
105 gdb_regs[GDB_SP] = kernel_stack_pointer(regs); 110 gdb_regs[GDB_SP] = kernel_stack_pointer(regs);
111#endif
106} 112}
107 113
108/** 114/**
@@ -220,8 +226,7 @@ static void kgdb_correct_hw_break(void)
220 dr7 |= ((breakinfo[breakno].len << 2) | 226 dr7 |= ((breakinfo[breakno].len << 2) |
221 breakinfo[breakno].type) << 227 breakinfo[breakno].type) <<
222 ((breakno << 2) + 16); 228 ((breakno << 2) + 16);
223 if (breakno >= 0 && breakno <= 3) 229 set_debugreg(breakinfo[breakno].addr, breakno);
224 set_debugreg(breakinfo[breakno].addr, breakno);
225 230
226 } else { 231 } else {
227 if ((dr7 & breakbit) && !breakinfo[breakno].enabled) { 232 if ((dr7 & breakbit) && !breakinfo[breakno].enabled) {
@@ -395,7 +400,6 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
395 /* set the trace bit if we're stepping */ 400 /* set the trace bit if we're stepping */
396 if (remcomInBuffer[0] == 's') { 401 if (remcomInBuffer[0] == 's') {
397 linux_regs->flags |= X86_EFLAGS_TF; 402 linux_regs->flags |= X86_EFLAGS_TF;
398 kgdb_single_step = 1;
399 atomic_set(&kgdb_cpu_doing_single_step, 403 atomic_set(&kgdb_cpu_doing_single_step,
400 raw_smp_processor_id()); 404 raw_smp_processor_id());
401 } 405 }
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 1f3186ce213c..5b8c7505b3bc 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -481,7 +481,7 @@ static int __kprobes reenter_kprobe(struct kprobe *p, struct pt_regs *regs,
481 481
482/* 482/*
483 * Interrupts are disabled on entry as trap3 is an interrupt gate and they 483 * Interrupts are disabled on entry as trap3 is an interrupt gate and they
484 * remain disabled thorough out this function. 484 * remain disabled throughout this function.
485 */ 485 */
486static int __kprobes kprobe_handler(struct pt_regs *regs) 486static int __kprobes kprobe_handler(struct pt_regs *regs)
487{ 487{
@@ -818,7 +818,7 @@ no_change:
818 818
819/* 819/*
820 * Interrupts are disabled on entry as trap1 is an interrupt gate and they 820 * Interrupts are disabled on entry as trap1 is an interrupt gate and they
821 * remain disabled thoroughout this function. 821 * remain disabled throughout this function.
822 */ 822 */
823static int __kprobes post_kprobe_handler(struct pt_regs *regs) 823static int __kprobes post_kprobe_handler(struct pt_regs *regs)
824{ 824{
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index c843f8406da2..a3fa43ba5d3b 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -158,8 +158,7 @@ int machine_kexec_prepare(struct kimage *image)
158{ 158{
159 int error; 159 int error;
160 160
161 if (nx_enabled) 161 set_pages_x(image->control_code_page, 1);
162 set_pages_x(image->control_code_page, 1);
163 error = machine_kexec_alloc_page_tables(image); 162 error = machine_kexec_alloc_page_tables(image);
164 if (error) 163 if (error)
165 return error; 164 return error;
@@ -173,8 +172,7 @@ int machine_kexec_prepare(struct kimage *image)
173 */ 172 */
174void machine_kexec_cleanup(struct kimage *image) 173void machine_kexec_cleanup(struct kimage *image)
175{ 174{
176 if (nx_enabled) 175 set_pages_nx(image->control_code_page, 1);
177 set_pages_nx(image->control_code_page, 1);
178 machine_kexec_free_page_tables(image); 176 machine_kexec_free_page_tables(image);
179} 177}
180 178
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index f4c538b681ca..63123d902103 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -33,6 +33,9 @@ MODULE_LICENSE("GPL v2");
33#define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000 33#define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
34#define UCODE_UCODE_TYPE 0x00000001 34#define UCODE_UCODE_TYPE 0x00000001
35 35
36const struct firmware *firmware;
37static int supported_cpu;
38
36struct equiv_cpu_entry { 39struct equiv_cpu_entry {
37 u32 installed_cpu; 40 u32 installed_cpu;
38 u32 fixed_errata_mask; 41 u32 fixed_errata_mask;
@@ -71,17 +74,14 @@ static struct equiv_cpu_entry *equiv_cpu_table;
71 74
72static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) 75static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
73{ 76{
74 struct cpuinfo_x86 *c = &cpu_data(cpu);
75 u32 dummy; 77 u32 dummy;
76 78
77 memset(csig, 0, sizeof(*csig)); 79 if (!supported_cpu)
78 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
79 printk(KERN_WARNING "microcode: CPU%d: AMD CPU family 0x%x not "
80 "supported\n", cpu, c->x86);
81 return -1; 80 return -1;
82 } 81
82 memset(csig, 0, sizeof(*csig));
83 rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy); 83 rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
84 printk(KERN_INFO "microcode: CPU%d: patch_level=0x%x\n", cpu, csig->rev); 84 pr_info("microcode: CPU%d: patch_level=0x%x\n", cpu, csig->rev);
85 return 0; 85 return 0;
86} 86}
87 87
@@ -103,22 +103,15 @@ static int get_matching_microcode(int cpu, void *mc, int rev)
103 i++; 103 i++;
104 } 104 }
105 105
106 if (!equiv_cpu_id) { 106 if (!equiv_cpu_id)
107 printk(KERN_WARNING "microcode: CPU%d: cpu revision "
108 "not listed in equivalent cpu table\n", cpu);
109 return 0; 107 return 0;
110 }
111 108
112 if (mc_header->processor_rev_id != equiv_cpu_id) { 109 if (mc_header->processor_rev_id != equiv_cpu_id)
113 printk(KERN_ERR "microcode: CPU%d: patch mismatch "
114 "(processor_rev_id: %x, equiv_cpu_id: %x)\n",
115 cpu, mc_header->processor_rev_id, equiv_cpu_id);
116 return 0; 110 return 0;
117 }
118 111
119 /* ucode might be chipset specific -- currently we don't support this */ 112 /* ucode might be chipset specific -- currently we don't support this */
120 if (mc_header->nb_dev_id || mc_header->sb_dev_id) { 113 if (mc_header->nb_dev_id || mc_header->sb_dev_id) {
121 printk(KERN_ERR "microcode: CPU%d: loading of chipset " 114 pr_err(KERN_ERR "microcode: CPU%d: loading of chipset "
122 "specific code not yet supported\n", cpu); 115 "specific code not yet supported\n", cpu);
123 return 0; 116 return 0;
124 } 117 }
@@ -148,14 +141,12 @@ static int apply_microcode_amd(int cpu)
148 141
149 /* check current patch id and patch's id for match */ 142 /* check current patch id and patch's id for match */
150 if (rev != mc_amd->hdr.patch_id) { 143 if (rev != mc_amd->hdr.patch_id) {
151 printk(KERN_ERR "microcode: CPU%d: update failed " 144 pr_err("microcode: CPU%d: update failed "
152 "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id); 145 "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id);
153 return -1; 146 return -1;
154 } 147 }
155 148
156 printk(KERN_INFO "microcode: CPU%d: updated (new patch_level=0x%x)\n", 149 pr_info("microcode: CPU%d: updated (new patch_level=0x%x)\n", cpu, rev);
157 cpu, rev);
158
159 uci->cpu_sig.rev = rev; 150 uci->cpu_sig.rev = rev;
160 151
161 return 0; 152 return 0;
@@ -178,18 +169,15 @@ get_next_ucode(const u8 *buf, unsigned int size, unsigned int *mc_size)
178 return NULL; 169 return NULL;
179 170
180 if (section_hdr[0] != UCODE_UCODE_TYPE) { 171 if (section_hdr[0] != UCODE_UCODE_TYPE) {
181 printk(KERN_ERR "microcode: error: invalid type field in " 172 pr_err("microcode: error: invalid type field in "
182 "container file section header\n"); 173 "container file section header\n");
183 return NULL; 174 return NULL;
184 } 175 }
185 176
186 total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8)); 177 total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8));
187 178
188 printk(KERN_DEBUG "microcode: size %u, total_size %u\n",
189 size, total_size);
190
191 if (total_size > size || total_size > UCODE_MAX_SIZE) { 179 if (total_size > size || total_size > UCODE_MAX_SIZE) {
192 printk(KERN_ERR "microcode: error: size mismatch\n"); 180 pr_err("microcode: error: size mismatch\n");
193 return NULL; 181 return NULL;
194 } 182 }
195 183
@@ -218,15 +206,14 @@ static int install_equiv_cpu_table(const u8 *buf)
218 size = buf_pos[2]; 206 size = buf_pos[2];
219 207
220 if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) { 208 if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
221 printk(KERN_ERR "microcode: error: invalid type field in " 209 pr_err("microcode: error: invalid type field in "
222 "container file section header\n"); 210 "container file section header\n");
223 return 0; 211 return 0;
224 } 212 }
225 213
226 equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size); 214 equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
227 if (!equiv_cpu_table) { 215 if (!equiv_cpu_table) {
228 printk(KERN_ERR "microcode: failed to allocate " 216 pr_err("microcode: failed to allocate equivalent CPU table\n");
229 "equivalent CPU table\n");
230 return 0; 217 return 0;
231 } 218 }
232 219
@@ -259,8 +246,7 @@ generic_load_microcode(int cpu, const u8 *data, size_t size)
259 246
260 offset = install_equiv_cpu_table(ucode_ptr); 247 offset = install_equiv_cpu_table(ucode_ptr);
261 if (!offset) { 248 if (!offset) {
262 printk(KERN_ERR "microcode: failed to create " 249 pr_err("microcode: failed to create equivalent cpu table\n");
263 "equivalent cpu table\n");
264 return UCODE_ERROR; 250 return UCODE_ERROR;
265 } 251 }
266 252
@@ -308,33 +294,27 @@ generic_load_microcode(int cpu, const u8 *data, size_t size)
308 294
309static enum ucode_state request_microcode_fw(int cpu, struct device *device) 295static enum ucode_state request_microcode_fw(int cpu, struct device *device)
310{ 296{
311 const char *fw_name = "amd-ucode/microcode_amd.bin";
312 const struct firmware *firmware;
313 enum ucode_state ret; 297 enum ucode_state ret;
314 298
315 if (request_firmware(&firmware, fw_name, device)) { 299 if (firmware == NULL)
316 printk(KERN_ERR "microcode: failed to load file %s\n", fw_name);
317 return UCODE_NFOUND; 300 return UCODE_NFOUND;
318 }
319 301
320 if (*(u32 *)firmware->data != UCODE_MAGIC) { 302 if (*(u32 *)firmware->data != UCODE_MAGIC) {
321 printk(KERN_ERR "microcode: invalid UCODE_MAGIC (0x%08x)\n", 303 pr_err("microcode: invalid UCODE_MAGIC (0x%08x)\n",
322 *(u32 *)firmware->data); 304 *(u32 *)firmware->data);
323 return UCODE_ERROR; 305 return UCODE_ERROR;
324 } 306 }
325 307
326 ret = generic_load_microcode(cpu, firmware->data, firmware->size); 308 ret = generic_load_microcode(cpu, firmware->data, firmware->size);
327 309
328 release_firmware(firmware);
329
330 return ret; 310 return ret;
331} 311}
332 312
333static enum ucode_state 313static enum ucode_state
334request_microcode_user(int cpu, const void __user *buf, size_t size) 314request_microcode_user(int cpu, const void __user *buf, size_t size)
335{ 315{
336 printk(KERN_INFO "microcode: AMD microcode update via " 316 pr_info("microcode: AMD microcode update via "
337 "/dev/cpu/microcode not supported\n"); 317 "/dev/cpu/microcode not supported\n");
338 return UCODE_ERROR; 318 return UCODE_ERROR;
339} 319}
340 320
@@ -346,7 +326,32 @@ static void microcode_fini_cpu_amd(int cpu)
346 uci->mc = NULL; 326 uci->mc = NULL;
347} 327}
348 328
329void init_microcode_amd(struct device *device)
330{
331 const char *fw_name = "amd-ucode/microcode_amd.bin";
332 struct cpuinfo_x86 *c = &boot_cpu_data;
333
334 WARN_ON(c->x86_vendor != X86_VENDOR_AMD);
335
336 if (c->x86 < 0x10) {
337 pr_warning("microcode: AMD CPU family 0x%x not supported\n",
338 c->x86);
339 return;
340 }
341 supported_cpu = 1;
342
343 if (request_firmware(&firmware, fw_name, device))
344 pr_err("microcode: failed to load file %s\n", fw_name);
345}
346
347void fini_microcode_amd(void)
348{
349 release_firmware(firmware);
350}
351
349static struct microcode_ops microcode_amd_ops = { 352static struct microcode_ops microcode_amd_ops = {
353 .init = init_microcode_amd,
354 .fini = fini_microcode_amd,
350 .request_microcode_user = request_microcode_user, 355 .request_microcode_user = request_microcode_user,
351 .request_microcode_fw = request_microcode_fw, 356 .request_microcode_fw = request_microcode_fw,
352 .collect_cpu_info = collect_cpu_info_amd, 357 .collect_cpu_info = collect_cpu_info_amd,
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 2bcad3926edb..e68aae397869 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -391,7 +391,7 @@ static enum ucode_state microcode_update_cpu(int cpu)
391 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 391 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
392 enum ucode_state ustate; 392 enum ucode_state ustate;
393 393
394 if (uci->valid) 394 if (uci->valid && uci->mc)
395 ustate = microcode_resume_cpu(cpu); 395 ustate = microcode_resume_cpu(cpu);
396 else 396 else
397 ustate = microcode_init_cpu(cpu); 397 ustate = microcode_init_cpu(cpu);
@@ -518,6 +518,9 @@ static int __init microcode_init(void)
518 return PTR_ERR(microcode_pdev); 518 return PTR_ERR(microcode_pdev);
519 } 519 }
520 520
521 if (microcode_ops->init)
522 microcode_ops->init(&microcode_pdev->dev);
523
521 get_online_cpus(); 524 get_online_cpus();
522 mutex_lock(&microcode_mutex); 525 mutex_lock(&microcode_mutex);
523 526
@@ -561,6 +564,9 @@ static void __exit microcode_exit(void)
561 564
562 platform_device_unregister(microcode_pdev); 565 platform_device_unregister(microcode_pdev);
563 566
567 if (microcode_ops->fini)
568 microcode_ops->fini();
569
564 microcode_ops = NULL; 570 microcode_ops = NULL;
565 571
566 pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n"); 572 pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n");
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 5be95ef4ffec..35a57c963df9 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -667,36 +667,18 @@ void __init default_get_smp_config(unsigned int early)
667 */ 667 */
668} 668}
669 669
670static void __init smp_reserve_bootmem(struct mpf_intel *mpf) 670static void __init smp_reserve_memory(struct mpf_intel *mpf)
671{ 671{
672 unsigned long size = get_mpc_size(mpf->physptr); 672 unsigned long size = get_mpc_size(mpf->physptr);
673#ifdef CONFIG_X86_32
674 /*
675 * We cannot access to MPC table to compute table size yet,
676 * as only few megabytes from the bottom is mapped now.
677 * PC-9800's MPC table places on the very last of physical
678 * memory; so that simply reserving PAGE_SIZE from mpf->physptr
679 * yields BUG() in reserve_bootmem.
680 * also need to make sure physptr is below than max_low_pfn
681 * we don't need reserve the area above max_low_pfn
682 */
683 unsigned long end = max_low_pfn * PAGE_SIZE;
684 673
685 if (mpf->physptr < end) { 674 reserve_early(mpf->physptr, mpf->physptr+size, "MP-table mpc");
686 if (mpf->physptr + size > end)
687 size = end - mpf->physptr;
688 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
689 }
690#else
691 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
692#endif
693} 675}
694 676
695static int __init smp_scan_config(unsigned long base, unsigned long length, 677static int __init smp_scan_config(unsigned long base, unsigned long length)
696 unsigned reserve)
697{ 678{
698 unsigned int *bp = phys_to_virt(base); 679 unsigned int *bp = phys_to_virt(base);
699 struct mpf_intel *mpf; 680 struct mpf_intel *mpf;
681 unsigned long mem;
700 682
701 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", 683 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
702 bp, length); 684 bp, length);
@@ -717,12 +699,10 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
717 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", 699 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
718 mpf, (u64)virt_to_phys(mpf)); 700 mpf, (u64)virt_to_phys(mpf));
719 701
720 if (!reserve) 702 mem = virt_to_phys(mpf);
721 return 1; 703 reserve_early(mem, mem + sizeof(*mpf), "MP-table mpf");
722 reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf),
723 BOOTMEM_DEFAULT);
724 if (mpf->physptr) 704 if (mpf->physptr)
725 smp_reserve_bootmem(mpf); 705 smp_reserve_memory(mpf);
726 706
727 return 1; 707 return 1;
728 } 708 }
@@ -732,7 +712,7 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
732 return 0; 712 return 0;
733} 713}
734 714
735void __init default_find_smp_config(unsigned int reserve) 715void __init default_find_smp_config(void)
736{ 716{
737 unsigned int address; 717 unsigned int address;
738 718
@@ -744,9 +724,9 @@ void __init default_find_smp_config(unsigned int reserve)
744 * 2) Scan the top 1K of base RAM 724 * 2) Scan the top 1K of base RAM
745 * 3) Scan the 64K of bios 725 * 3) Scan the 64K of bios
746 */ 726 */
747 if (smp_scan_config(0x0, 0x400, reserve) || 727 if (smp_scan_config(0x0, 0x400) ||
748 smp_scan_config(639 * 0x400, 0x400, reserve) || 728 smp_scan_config(639 * 0x400, 0x400) ||
749 smp_scan_config(0xF0000, 0x10000, reserve)) 729 smp_scan_config(0xF0000, 0x10000))
750 return; 730 return;
751 /* 731 /*
752 * If it is an SMP machine we should know now, unless the 732 * If it is an SMP machine we should know now, unless the
@@ -767,7 +747,7 @@ void __init default_find_smp_config(unsigned int reserve)
767 747
768 address = get_bios_ebda(); 748 address = get_bios_ebda();
769 if (address) 749 if (address)
770 smp_scan_config(address, 0x400, reserve); 750 smp_scan_config(address, 0x400);
771} 751}
772 752
773#ifdef CONFIG_X86_IO_APIC 753#ifdef CONFIG_X86_IO_APIC
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index a98fe88fab64..c95c8f4e790a 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -349,26 +349,42 @@ out:
349 return err; 349 return err;
350} 350}
351 351
352void 352static void
353start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) 353start_thread_common(struct pt_regs *regs, unsigned long new_ip,
354 unsigned long new_sp,
355 unsigned int _cs, unsigned int _ss, unsigned int _ds)
354{ 356{
355 loadsegment(fs, 0); 357 loadsegment(fs, 0);
356 loadsegment(es, 0); 358 loadsegment(es, _ds);
357 loadsegment(ds, 0); 359 loadsegment(ds, _ds);
358 load_gs_index(0); 360 load_gs_index(0);
359 regs->ip = new_ip; 361 regs->ip = new_ip;
360 regs->sp = new_sp; 362 regs->sp = new_sp;
361 percpu_write(old_rsp, new_sp); 363 percpu_write(old_rsp, new_sp);
362 regs->cs = __USER_CS; 364 regs->cs = _cs;
363 regs->ss = __USER_DS; 365 regs->ss = _ss;
364 regs->flags = 0x200; 366 regs->flags = X86_EFLAGS_IF;
365 set_fs(USER_DS); 367 set_fs(USER_DS);
366 /* 368 /*
367 * Free the old FP and other extended state 369 * Free the old FP and other extended state
368 */ 370 */
369 free_thread_xstate(current); 371 free_thread_xstate(current);
370} 372}
371EXPORT_SYMBOL_GPL(start_thread); 373
374void
375start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
376{
377 start_thread_common(regs, new_ip, new_sp,
378 __USER_CS, __USER_DS, 0);
379}
380
381#ifdef CONFIG_IA32_EMULATION
382void start_thread_ia32(struct pt_regs *regs, u32 new_ip, u32 new_sp)
383{
384 start_thread_common(regs, new_ip, new_sp,
385 __USER32_CS, __USER32_DS, __USER32_DS);
386}
387#endif
372 388
373/* 389/*
374 * switch_to(x,y) should switch tasks from x to y. 390 * switch_to(x,y) should switch tasks from x to y.
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 6c3b2c6fd772..18093d7498f0 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -499,6 +499,7 @@ static void __init quirk_amd_nb_node(struct pci_dev *dev)
499{ 499{
500 struct pci_dev *nb_ht; 500 struct pci_dev *nb_ht;
501 unsigned int devfn; 501 unsigned int devfn;
502 u32 node;
502 u32 val; 503 u32 val;
503 504
504 devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0); 505 devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
@@ -507,7 +508,13 @@ static void __init quirk_amd_nb_node(struct pci_dev *dev)
507 return; 508 return;
508 509
509 pci_read_config_dword(nb_ht, 0x60, &val); 510 pci_read_config_dword(nb_ht, 0x60, &val);
510 set_dev_node(&dev->dev, val & 7); 511 node = val & 7;
512 /*
513 * Some hardware may return an invalid node ID,
514 * so check it first:
515 */
516 if (node_online(node))
517 set_dev_node(&dev->dev, node);
511 pci_dev_put(nb_ht); 518 pci_dev_put(nb_ht);
512} 519}
513 520
diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c
index 61a837743fe5..201eab63b05f 100644
--- a/arch/x86/kernel/reboot_fixups_32.c
+++ b/arch/x86/kernel/reboot_fixups_32.c
@@ -80,6 +80,7 @@ void mach_reboot_fixups(void)
80 continue; 80 continue;
81 81
82 cur->reboot_fixup(dev); 82 cur->reboot_fixup(dev);
83 pci_dev_put(dev);
83 } 84 }
84} 85}
85 86
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 82e88cdda9bc..946a311a25c9 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -106,6 +106,7 @@
106#include <asm/percpu.h> 106#include <asm/percpu.h>
107#include <asm/topology.h> 107#include <asm/topology.h>
108#include <asm/apicdef.h> 108#include <asm/apicdef.h>
109#include <asm/k8.h>
109#ifdef CONFIG_X86_64 110#ifdef CONFIG_X86_64
110#include <asm/numa_64.h> 111#include <asm/numa_64.h>
111#endif 112#endif
@@ -487,42 +488,11 @@ static void __init reserve_early_setup_data(void)
487 488
488#ifdef CONFIG_KEXEC 489#ifdef CONFIG_KEXEC
489 490
490/**
491 * Reserve @size bytes of crashkernel memory at any suitable offset.
492 *
493 * @size: Size of the crashkernel memory to reserve.
494 * Returns the base address on success, and -1ULL on failure.
495 */
496static
497unsigned long long __init find_and_reserve_crashkernel(unsigned long long size)
498{
499 const unsigned long long alignment = 16<<20; /* 16M */
500 unsigned long long start = 0LL;
501
502 while (1) {
503 int ret;
504
505 start = find_e820_area(start, ULONG_MAX, size, alignment);
506 if (start == -1ULL)
507 return start;
508
509 /* try to reserve it */
510 ret = reserve_bootmem_generic(start, size, BOOTMEM_EXCLUSIVE);
511 if (ret >= 0)
512 return start;
513
514 start += alignment;
515 }
516}
517
518static inline unsigned long long get_total_mem(void) 491static inline unsigned long long get_total_mem(void)
519{ 492{
520 unsigned long long total; 493 unsigned long long total;
521 494
522 total = max_low_pfn - min_low_pfn; 495 total = max_pfn - min_low_pfn;
523#ifdef CONFIG_HIGHMEM
524 total += highend_pfn - highstart_pfn;
525#endif
526 496
527 return total << PAGE_SHIFT; 497 return total << PAGE_SHIFT;
528} 498}
@@ -542,21 +512,25 @@ static void __init reserve_crashkernel(void)
542 512
543 /* 0 means: find the address automatically */ 513 /* 0 means: find the address automatically */
544 if (crash_base <= 0) { 514 if (crash_base <= 0) {
545 crash_base = find_and_reserve_crashkernel(crash_size); 515 const unsigned long long alignment = 16<<20; /* 16M */
516
517 crash_base = find_e820_area(alignment, ULONG_MAX, crash_size,
518 alignment);
546 if (crash_base == -1ULL) { 519 if (crash_base == -1ULL) {
547 pr_info("crashkernel reservation failed. " 520 pr_info("crashkernel reservation failed - No suitable area found.\n");
548 "No suitable area found.\n");
549 return; 521 return;
550 } 522 }
551 } else { 523 } else {
552 ret = reserve_bootmem_generic(crash_base, crash_size, 524 unsigned long long start;
553 BOOTMEM_EXCLUSIVE); 525
554 if (ret < 0) { 526 start = find_e820_area(crash_base, ULONG_MAX, crash_size,
555 pr_info("crashkernel reservation failed - " 527 1<<20);
556 "memory is in use\n"); 528 if (start != crash_base) {
529 pr_info("crashkernel reservation failed - memory is in use.\n");
557 return; 530 return;
558 } 531 }
559 } 532 }
533 reserve_early(crash_base, crash_base + crash_size, "CRASH KERNEL");
560 534
561 printk(KERN_INFO "Reserving %ldMB of memory at %ldMB " 535 printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
562 "for crashkernel (System RAM: %ldMB)\n", 536 "for crashkernel (System RAM: %ldMB)\n",
@@ -699,6 +673,9 @@ static struct dmi_system_id __initdata bad_bios_dmi_table[] = {
699 673
700void __init setup_arch(char **cmdline_p) 674void __init setup_arch(char **cmdline_p)
701{ 675{
676 int acpi = 0;
677 int k8 = 0;
678
702#ifdef CONFIG_X86_32 679#ifdef CONFIG_X86_32
703 memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data)); 680 memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
704 visws_early_detect(); 681 visws_early_detect();
@@ -791,21 +768,18 @@ void __init setup_arch(char **cmdline_p)
791 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); 768 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
792 *cmdline_p = command_line; 769 *cmdline_p = command_line;
793 770
794#ifdef CONFIG_X86_64
795 /* 771 /*
796 * Must call this twice: Once just to detect whether hardware doesn't 772 * x86_configure_nx() is called before parse_early_param() to detect
797 * support NX (so that the early EHCI debug console setup can safely 773 * whether hardware doesn't support NX (so that the early EHCI debug
798 * call set_fixmap(), and then again after parsing early parameters to 774 * console setup can safely call set_fixmap()). It may then be called
799 * honor the respective command line option. 775 * again from within noexec_setup() during parsing early parameters
776 * to honor the respective command line option.
800 */ 777 */
801 check_efer(); 778 x86_configure_nx();
802#endif
803 779
804 parse_early_param(); 780 parse_early_param();
805 781
806#ifdef CONFIG_X86_64 782 x86_report_nx();
807 check_efer();
808#endif
809 783
810 /* Must be before kernel pagetables are setup */ 784 /* Must be before kernel pagetables are setup */
811 vmi_activate(); 785 vmi_activate();
@@ -901,6 +875,13 @@ void __init setup_arch(char **cmdline_p)
901 875
902 reserve_brk(); 876 reserve_brk();
903 877
878#ifdef CONFIG_ACPI_SLEEP
879 /*
880 * Reserve low memory region for sleep support.
881 * even before init_memory_mapping
882 */
883 acpi_reserve_wakeup_memory();
884#endif
904 init_gbpages(); 885 init_gbpages();
905 886
906 /* max_pfn_mapped is updated here */ 887 /* max_pfn_mapped is updated here */
@@ -927,6 +908,8 @@ void __init setup_arch(char **cmdline_p)
927 908
928 reserve_initrd(); 909 reserve_initrd();
929 910
911 reserve_crashkernel();
912
930 vsmp_init(); 913 vsmp_init();
931 914
932 io_delay_init(); 915 io_delay_init();
@@ -938,27 +921,24 @@ void __init setup_arch(char **cmdline_p)
938 921
939 early_acpi_boot_init(); 922 early_acpi_boot_init();
940 923
924 /*
925 * Find and reserve possible boot-time SMP configuration:
926 */
927 find_smp_config();
928
941#ifdef CONFIG_ACPI_NUMA 929#ifdef CONFIG_ACPI_NUMA
942 /* 930 /*
943 * Parse SRAT to discover nodes. 931 * Parse SRAT to discover nodes.
944 */ 932 */
945 acpi_numa_init(); 933 acpi = acpi_numa_init();
946#endif 934#endif
947 935
948 initmem_init(0, max_pfn); 936#ifdef CONFIG_K8_NUMA
949 937 if (!acpi)
950#ifdef CONFIG_ACPI_SLEEP 938 k8 = !k8_numa_init(0, max_pfn);
951 /*
952 * Reserve low memory region for sleep support.
953 */
954 acpi_reserve_bootmem();
955#endif 939#endif
956 /*
957 * Find and reserve possible boot-time SMP configuration:
958 */
959 find_smp_config();
960 940
961 reserve_crashkernel(); 941 initmem_init(0, max_pfn, acpi, k8);
962 942
963#ifdef CONFIG_X86_64 943#ifdef CONFIG_X86_64
964 /* 944 /*
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 324f2a44c221..29e6744f51e3 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -687,7 +687,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
687 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done), 687 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
688 }; 688 };
689 689
690 INIT_WORK(&c_idle.work, do_fork_idle); 690 INIT_WORK_ON_STACK(&c_idle.work, do_fork_idle);
691 691
692 alternatives_smp_switch(1); 692 alternatives_smp_switch(1);
693 693
@@ -713,6 +713,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
713 713
714 if (IS_ERR(c_idle.idle)) { 714 if (IS_ERR(c_idle.idle)) {
715 printk("failed fork for CPU %d\n", cpu); 715 printk("failed fork for CPU %d\n", cpu);
716 destroy_work_on_stack(&c_idle.work);
716 return PTR_ERR(c_idle.idle); 717 return PTR_ERR(c_idle.idle);
717 } 718 }
718 719
@@ -831,6 +832,7 @@ do_rest:
831 smpboot_restore_warm_reset_vector(); 832 smpboot_restore_warm_reset_vector();
832 } 833 }
833 834
835 destroy_work_on_stack(&c_idle.work);
834 return boot_error; 836 return boot_error;
835} 837}
836 838
diff --git a/arch/x86/kernel/sys_i386_32.c b/arch/x86/kernel/sys_i386_32.c
index 1884a8d12bfa..dee1ff7cba58 100644
--- a/arch/x86/kernel/sys_i386_32.c
+++ b/arch/x86/kernel/sys_i386_32.c
@@ -24,31 +24,6 @@
24 24
25#include <asm/syscalls.h> 25#include <asm/syscalls.h>
26 26
27asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
28 unsigned long prot, unsigned long flags,
29 unsigned long fd, unsigned long pgoff)
30{
31 int error = -EBADF;
32 struct file *file = NULL;
33 struct mm_struct *mm = current->mm;
34
35 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
36 if (!(flags & MAP_ANONYMOUS)) {
37 file = fget(fd);
38 if (!file)
39 goto out;
40 }
41
42 down_write(&mm->mmap_sem);
43 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
44 up_write(&mm->mmap_sem);
45
46 if (file)
47 fput(file);
48out:
49 return error;
50}
51
52/* 27/*
53 * Perform the select(nd, in, out, ex, tv) and mmap() system 28 * Perform the select(nd, in, out, ex, tv) and mmap() system
54 * calls. Linux/i386 didn't use to be able to handle more than 29 * calls. Linux/i386 didn't use to be able to handle more than
@@ -77,7 +52,7 @@ asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
77 if (a.offset & ~PAGE_MASK) 52 if (a.offset & ~PAGE_MASK)
78 goto out; 53 goto out;
79 54
80 err = sys_mmap2(a.addr, a.len, a.prot, a.flags, 55 err = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags,
81 a.fd, a.offset >> PAGE_SHIFT); 56 a.fd, a.offset >> PAGE_SHIFT);
82out: 57out:
83 return err; 58 return err;
diff --git a/arch/x86/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c
index 45e00eb09c3a..8aa2057efd12 100644
--- a/arch/x86/kernel/sys_x86_64.c
+++ b/arch/x86/kernel/sys_x86_64.c
@@ -23,26 +23,11 @@ SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len,
23 unsigned long, fd, unsigned long, off) 23 unsigned long, fd, unsigned long, off)
24{ 24{
25 long error; 25 long error;
26 struct file *file;
27
28 error = -EINVAL; 26 error = -EINVAL;
29 if (off & ~PAGE_MASK) 27 if (off & ~PAGE_MASK)
30 goto out; 28 goto out;
31 29
32 error = -EBADF; 30 error = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
33 file = NULL;
34 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
35 if (!(flags & MAP_ANONYMOUS)) {
36 file = fget(fd);
37 if (!file)
38 goto out;
39 }
40 down_write(&current->mm->mmap_sem);
41 error = do_mmap_pgoff(file, addr, len, prot, flags, off >> PAGE_SHIFT);
42 up_write(&current->mm->mmap_sem);
43
44 if (file)
45 fput(file);
46out: 31out:
47 return error; 32 return error;
48} 33}
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index 70c2125d55b9..15228b5d3eb7 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -191,7 +191,7 @@ ENTRY(sys_call_table)
191 .long sys_ni_syscall /* reserved for streams2 */ 191 .long sys_ni_syscall /* reserved for streams2 */
192 .long ptregs_vfork /* 190 */ 192 .long ptregs_vfork /* 190 */
193 .long sys_getrlimit 193 .long sys_getrlimit
194 .long sys_mmap2 194 .long sys_mmap_pgoff
195 .long sys_truncate64 195 .long sys_truncate64
196 .long sys_ftruncate64 196 .long sys_ftruncate64
197 .long sys_stat64 /* 195 */ 197 .long sys_stat64 /* 195 */
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 1740c85e24bb..364d015efebc 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -817,10 +817,8 @@ static int __init uv_init_blade(int blade)
817 */ 817 */
818 apicid = blade_to_first_apicid(blade); 818 apicid = blade_to_first_apicid(blade);
819 pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG); 819 pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG);
820 if ((pa & 0xff) != UV_BAU_MESSAGE) { 820 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
821 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
822 ((apicid << 32) | UV_BAU_MESSAGE)); 821 ((apicid << 32) | UV_BAU_MESSAGE));
823 }
824 return 0; 822 return 0;
825} 823}
826 824
diff --git a/arch/x86/kernel/uv_time.c b/arch/x86/kernel/uv_time.c
index 583f11d5c480..3c84aa001c11 100644
--- a/arch/x86/kernel/uv_time.c
+++ b/arch/x86/kernel/uv_time.c
@@ -74,7 +74,7 @@ struct uv_rtc_timer_head {
74 */ 74 */
75static struct uv_rtc_timer_head **blade_info __read_mostly; 75static struct uv_rtc_timer_head **blade_info __read_mostly;
76 76
77static int uv_rtc_enable; 77static int uv_rtc_evt_enable;
78 78
79/* 79/*
80 * Hardware interface routines 80 * Hardware interface routines
@@ -90,7 +90,7 @@ static void uv_rtc_send_IPI(int cpu)
90 pnode = uv_apicid_to_pnode(apicid); 90 pnode = uv_apicid_to_pnode(apicid);
91 val = (1UL << UVH_IPI_INT_SEND_SHFT) | 91 val = (1UL << UVH_IPI_INT_SEND_SHFT) |
92 (apicid << UVH_IPI_INT_APIC_ID_SHFT) | 92 (apicid << UVH_IPI_INT_APIC_ID_SHFT) |
93 (GENERIC_INTERRUPT_VECTOR << UVH_IPI_INT_VECTOR_SHFT); 93 (X86_PLATFORM_IPI_VECTOR << UVH_IPI_INT_VECTOR_SHFT);
94 94
95 uv_write_global_mmr64(pnode, UVH_IPI_INT, val); 95 uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
96} 96}
@@ -115,7 +115,7 @@ static int uv_setup_intr(int cpu, u64 expires)
115 uv_write_global_mmr64(pnode, UVH_EVENT_OCCURRED0_ALIAS, 115 uv_write_global_mmr64(pnode, UVH_EVENT_OCCURRED0_ALIAS,
116 UVH_EVENT_OCCURRED0_RTC1_MASK); 116 UVH_EVENT_OCCURRED0_RTC1_MASK);
117 117
118 val = (GENERIC_INTERRUPT_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) | 118 val = (X86_PLATFORM_IPI_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) |
119 ((u64)cpu_physical_id(cpu) << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT); 119 ((u64)cpu_physical_id(cpu) << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT);
120 120
121 /* Set configuration */ 121 /* Set configuration */
@@ -123,7 +123,10 @@ static int uv_setup_intr(int cpu, u64 expires)
123 /* Initialize comparator value */ 123 /* Initialize comparator value */
124 uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires); 124 uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires);
125 125
126 return (expires < uv_read_rtc(NULL) && !uv_intr_pending(pnode)); 126 if (uv_read_rtc(NULL) <= expires)
127 return 0;
128
129 return !uv_intr_pending(pnode);
127} 130}
128 131
129/* 132/*
@@ -223,6 +226,7 @@ static int uv_rtc_set_timer(int cpu, u64 expires)
223 226
224 next_cpu = head->next_cpu; 227 next_cpu = head->next_cpu;
225 *t = expires; 228 *t = expires;
229
226 /* Will this one be next to go off? */ 230 /* Will this one be next to go off? */
227 if (next_cpu < 0 || bcpu == next_cpu || 231 if (next_cpu < 0 || bcpu == next_cpu ||
228 expires < head->cpu[next_cpu].expires) { 232 expires < head->cpu[next_cpu].expires) {
@@ -231,7 +235,7 @@ static int uv_rtc_set_timer(int cpu, u64 expires)
231 *t = ULLONG_MAX; 235 *t = ULLONG_MAX;
232 uv_rtc_find_next_timer(head, pnode); 236 uv_rtc_find_next_timer(head, pnode);
233 spin_unlock_irqrestore(&head->lock, flags); 237 spin_unlock_irqrestore(&head->lock, flags);
234 return 1; 238 return -ETIME;
235 } 239 }
236 } 240 }
237 241
@@ -244,7 +248,7 @@ static int uv_rtc_set_timer(int cpu, u64 expires)
244 * 248 *
245 * Returns 1 if this timer was pending. 249 * Returns 1 if this timer was pending.
246 */ 250 */
247static int uv_rtc_unset_timer(int cpu) 251static int uv_rtc_unset_timer(int cpu, int force)
248{ 252{
249 int pnode = uv_cpu_to_pnode(cpu); 253 int pnode = uv_cpu_to_pnode(cpu);
250 int bid = uv_cpu_to_blade_id(cpu); 254 int bid = uv_cpu_to_blade_id(cpu);
@@ -256,14 +260,15 @@ static int uv_rtc_unset_timer(int cpu)
256 260
257 spin_lock_irqsave(&head->lock, flags); 261 spin_lock_irqsave(&head->lock, flags);
258 262
259 if (head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t) 263 if ((head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t) || force)
260 rc = 1; 264 rc = 1;
261 265
262 *t = ULLONG_MAX; 266 if (rc) {
263 267 *t = ULLONG_MAX;
264 /* Was the hardware setup for this timer? */ 268 /* Was the hardware setup for this timer? */
265 if (head->next_cpu == bcpu) 269 if (head->next_cpu == bcpu)
266 uv_rtc_find_next_timer(head, pnode); 270 uv_rtc_find_next_timer(head, pnode);
271 }
267 272
268 spin_unlock_irqrestore(&head->lock, flags); 273 spin_unlock_irqrestore(&head->lock, flags);
269 274
@@ -310,32 +315,32 @@ static void uv_rtc_timer_setup(enum clock_event_mode mode,
310 break; 315 break;
311 case CLOCK_EVT_MODE_UNUSED: 316 case CLOCK_EVT_MODE_UNUSED:
312 case CLOCK_EVT_MODE_SHUTDOWN: 317 case CLOCK_EVT_MODE_SHUTDOWN:
313 uv_rtc_unset_timer(ced_cpu); 318 uv_rtc_unset_timer(ced_cpu, 1);
314 break; 319 break;
315 } 320 }
316} 321}
317 322
318static void uv_rtc_interrupt(void) 323static void uv_rtc_interrupt(void)
319{ 324{
320 struct clock_event_device *ced = &__get_cpu_var(cpu_ced);
321 int cpu = smp_processor_id(); 325 int cpu = smp_processor_id();
326 struct clock_event_device *ced = &per_cpu(cpu_ced, cpu);
322 327
323 if (!ced || !ced->event_handler) 328 if (!ced || !ced->event_handler)
324 return; 329 return;
325 330
326 if (uv_rtc_unset_timer(cpu) != 1) 331 if (uv_rtc_unset_timer(cpu, 0) != 1)
327 return; 332 return;
328 333
329 ced->event_handler(ced); 334 ced->event_handler(ced);
330} 335}
331 336
332static int __init uv_enable_rtc(char *str) 337static int __init uv_enable_evt_rtc(char *str)
333{ 338{
334 uv_rtc_enable = 1; 339 uv_rtc_evt_enable = 1;
335 340
336 return 1; 341 return 1;
337} 342}
338__setup("uvrtc", uv_enable_rtc); 343__setup("uvrtcevt", uv_enable_evt_rtc);
339 344
340static __init void uv_rtc_register_clockevents(struct work_struct *dummy) 345static __init void uv_rtc_register_clockevents(struct work_struct *dummy)
341{ 346{
@@ -350,27 +355,32 @@ static __init int uv_rtc_setup_clock(void)
350{ 355{
351 int rc; 356 int rc;
352 357
353 if (!uv_rtc_enable || !is_uv_system() || generic_interrupt_extension) 358 if (!is_uv_system())
354 return -ENODEV; 359 return -ENODEV;
355 360
356 generic_interrupt_extension = uv_rtc_interrupt;
357
358 clocksource_uv.mult = clocksource_hz2mult(sn_rtc_cycles_per_second, 361 clocksource_uv.mult = clocksource_hz2mult(sn_rtc_cycles_per_second,
359 clocksource_uv.shift); 362 clocksource_uv.shift);
360 363
364 /* If single blade, prefer tsc */
365 if (uv_num_possible_blades() == 1)
366 clocksource_uv.rating = 250;
367
361 rc = clocksource_register(&clocksource_uv); 368 rc = clocksource_register(&clocksource_uv);
362 if (rc) { 369 if (rc)
363 generic_interrupt_extension = NULL; 370 printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc);
371 else
372 printk(KERN_INFO "UV RTC clocksource registered freq %lu MHz\n",
373 sn_rtc_cycles_per_second/(unsigned long)1E6);
374
375 if (rc || !uv_rtc_evt_enable || x86_platform_ipi_callback)
364 return rc; 376 return rc;
365 }
366 377
367 /* Setup and register clockevents */ 378 /* Setup and register clockevents */
368 rc = uv_rtc_allocate_timers(); 379 rc = uv_rtc_allocate_timers();
369 if (rc) { 380 if (rc)
370 clocksource_unregister(&clocksource_uv); 381 goto error;
371 generic_interrupt_extension = NULL; 382
372 return rc; 383 x86_platform_ipi_callback = uv_rtc_interrupt;
373 }
374 384
375 clock_event_device_uv.mult = div_sc(sn_rtc_cycles_per_second, 385 clock_event_device_uv.mult = div_sc(sn_rtc_cycles_per_second,
376 NSEC_PER_SEC, clock_event_device_uv.shift); 386 NSEC_PER_SEC, clock_event_device_uv.shift);
@@ -383,11 +393,19 @@ static __init int uv_rtc_setup_clock(void)
383 393
384 rc = schedule_on_each_cpu(uv_rtc_register_clockevents); 394 rc = schedule_on_each_cpu(uv_rtc_register_clockevents);
385 if (rc) { 395 if (rc) {
386 clocksource_unregister(&clocksource_uv); 396 x86_platform_ipi_callback = NULL;
387 generic_interrupt_extension = NULL;
388 uv_rtc_deallocate_timers(); 397 uv_rtc_deallocate_timers();
398 goto error;
389 } 399 }
390 400
401 printk(KERN_INFO "UV RTC clockevents registered\n");
402
403 return 0;
404
405error:
406 clocksource_unregister(&clocksource_uv);
407 printk(KERN_INFO "UV RTC clockevents failed rc %d\n", rc);
408
391 return rc; 409 return rc;
392} 410}
393arch_initcall(uv_rtc_setup_clock); 411arch_initcall(uv_rtc_setup_clock);
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index abda6f53e71e..34a279a7471d 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -197,7 +197,7 @@ static void __init MP_processor_info(struct mpc_cpu *m)
197 apic_version[m->apicid] = ver; 197 apic_version[m->apicid] = ver;
198} 198}
199 199
200static void __init visws_find_smp_config(unsigned int reserve) 200static void __init visws_find_smp_config(void)
201{ 201{
202 struct mpc_cpu *mp = phys_to_virt(CO_CPU_TAB_PHYS); 202 struct mpc_cpu *mp = phys_to_virt(CO_CPU_TAB_PHYS);
203 unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS)); 203 unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 611b9e2360d3..74c92bb194df 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -226,7 +226,7 @@ static void __devinit vmi_time_init_clockevent(void)
226 evt->min_delta_ns = clockevent_delta2ns(1, evt); 226 evt->min_delta_ns = clockevent_delta2ns(1, evt);
227 evt->cpumask = cpumask_of(cpu); 227 evt->cpumask = cpumask_of(cpu);
228 228
229 printk(KERN_WARNING "vmi: registering clock event %s. mult=%lu shift=%u\n", 229 printk(KERN_WARNING "vmi: registering clock event %s. mult=%u shift=%u\n",
230 evt->name, evt->mult, evt->shift); 230 evt->name, evt->mult, evt->shift);
231 clockevents_register_device(evt); 231 clockevents_register_device(evt);
232} 232}
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 3c68fe2d46cf..f3f2104408d9 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -41,6 +41,32 @@ ENTRY(phys_startup_64)
41jiffies_64 = jiffies; 41jiffies_64 = jiffies;
42#endif 42#endif
43 43
44#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
45/*
46 * On 64-bit, align RODATA to 2MB so that even with CONFIG_DEBUG_RODATA
47 * we retain large page mappings for boundaries spanning kernel text, rodata
48 * and data sections.
49 *
50 * However, kernel identity mappings will have different RWX permissions
51 * to the pages mapping to text and to the pages padding (which are freed) the
52 * text section. Hence kernel identity mappings will be broken to smaller
53 * pages. For 64-bit, kernel text and kernel identity mappings are different,
54 * so we can enable protection checks that come with CONFIG_DEBUG_RODATA,
55 * as well as retain 2MB large page mappings for kernel text.
56 */
57#define X64_ALIGN_DEBUG_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
58
59#define X64_ALIGN_DEBUG_RODATA_END \
60 . = ALIGN(HPAGE_SIZE); \
61 __end_rodata_hpage_align = .;
62
63#else
64
65#define X64_ALIGN_DEBUG_RODATA_BEGIN
66#define X64_ALIGN_DEBUG_RODATA_END
67
68#endif
69
44PHDRS { 70PHDRS {
45 text PT_LOAD FLAGS(5); /* R_E */ 71 text PT_LOAD FLAGS(5); /* R_E */
46 data PT_LOAD FLAGS(7); /* RWE */ 72 data PT_LOAD FLAGS(7); /* RWE */
@@ -90,7 +116,9 @@ SECTIONS
90 116
91 EXCEPTION_TABLE(16) :text = 0x9090 117 EXCEPTION_TABLE(16) :text = 0x9090
92 118
119 X64_ALIGN_DEBUG_RODATA_BEGIN
93 RO_DATA(PAGE_SIZE) 120 RO_DATA(PAGE_SIZE)
121 X64_ALIGN_DEBUG_RODATA_END
94 122
95 /* Data */ 123 /* Data */
96 .data : AT(ADDR(.data) - LOAD_OFFSET) { 124 .data : AT(ADDR(.data) - LOAD_OFFSET) {
@@ -107,13 +135,13 @@ SECTIONS
107 135
108 PAGE_ALIGNED_DATA(PAGE_SIZE) 136 PAGE_ALIGNED_DATA(PAGE_SIZE)
109 137
110 CACHELINE_ALIGNED_DATA(CONFIG_X86_L1_CACHE_BYTES) 138 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
111 139
112 DATA_DATA 140 DATA_DATA
113 CONSTRUCTORS 141 CONSTRUCTORS
114 142
115 /* rarely changed data like cpu maps */ 143 /* rarely changed data like cpu maps */
116 READ_MOSTLY_DATA(CONFIG_X86_INTERNODE_CACHE_BYTES) 144 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
117 145
118 /* End of data section */ 146 /* End of data section */
119 _edata = .; 147 _edata = .;
@@ -137,12 +165,12 @@ SECTIONS
137 *(.vsyscall_0) 165 *(.vsyscall_0)
138 } :user 166 } :user
139 167
140 . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); 168 . = ALIGN(L1_CACHE_BYTES);
141 .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) { 169 .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) {
142 *(.vsyscall_fn) 170 *(.vsyscall_fn)
143 } 171 }
144 172
145 . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); 173 . = ALIGN(L1_CACHE_BYTES);
146 .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) { 174 .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) {
147 *(.vsyscall_gtod_data) 175 *(.vsyscall_gtod_data)
148 } 176 }
@@ -166,7 +194,7 @@ SECTIONS
166 } 194 }
167 vgetcpu_mode = VVIRT(.vgetcpu_mode); 195 vgetcpu_mode = VVIRT(.vgetcpu_mode);
168 196
169 . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); 197 . = ALIGN(L1_CACHE_BYTES);
170 .jiffies : AT(VLOAD(.jiffies)) { 198 .jiffies : AT(VLOAD(.jiffies)) {
171 *(.jiffies) 199 *(.jiffies)
172 } 200 }
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index e02d92d12bcd..9055e5872ff0 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -73,7 +73,8 @@ void update_vsyscall_tz(void)
73 write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags); 73 write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);
74} 74}
75 75
76void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) 76void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
77 u32 mult)
77{ 78{
78 unsigned long flags; 79 unsigned long flags;
79 80
@@ -82,7 +83,7 @@ void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
82 vsyscall_gtod_data.clock.vread = clock->vread; 83 vsyscall_gtod_data.clock.vread = clock->vread;
83 vsyscall_gtod_data.clock.cycle_last = clock->cycle_last; 84 vsyscall_gtod_data.clock.cycle_last = clock->cycle_last;
84 vsyscall_gtod_data.clock.mask = clock->mask; 85 vsyscall_gtod_data.clock.mask = clock->mask;
85 vsyscall_gtod_data.clock.mult = clock->mult; 86 vsyscall_gtod_data.clock.mult = mult;
86 vsyscall_gtod_data.clock.shift = clock->shift; 87 vsyscall_gtod_data.clock.shift = clock->shift;
87 vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec; 88 vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec;
88 vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec; 89 vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec;
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index d11c5ff7c65e..ccd179dec36e 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -13,6 +13,7 @@
13#include <asm/e820.h> 13#include <asm/e820.h>
14#include <asm/time.h> 14#include <asm/time.h>
15#include <asm/irq.h> 15#include <asm/irq.h>
16#include <asm/pat.h>
16#include <asm/tsc.h> 17#include <asm/tsc.h>
17#include <asm/iommu.h> 18#include <asm/iommu.h>
18 19
@@ -80,4 +81,5 @@ struct x86_platform_ops x86_platform = {
80 .get_wallclock = mach_get_cmos_time, 81 .get_wallclock = mach_get_cmos_time,
81 .set_wallclock = mach_set_rtc_mmss, 82 .set_wallclock = mach_set_rtc_mmss,
82 .iommu_shutdown = iommu_shutdown_noop, 83 .iommu_shutdown = iommu_shutdown_noop,
84 .is_untracked_pat_range = is_ISA_range,
83}; 85};
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 73ffd5536f62..d406c5239019 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -146,10 +146,6 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
146 use_gbpages = direct_gbpages; 146 use_gbpages = direct_gbpages;
147#endif 147#endif
148 148
149 set_nx();
150 if (nx_enabled)
151 printk(KERN_INFO "NX (Execute Disable) protection: active\n");
152
153 /* Enable PSE if available */ 149 /* Enable PSE if available */
154 if (cpu_has_pse) 150 if (cpu_has_pse)
155 set_in_cr4(X86_CR4_PSE); 151 set_in_cr4(X86_CR4_PSE);
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 30938c1d8d5d..c973f8e2a6cf 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -412,7 +412,7 @@ static void __init permanent_kmaps_init(pgd_t *pgd_base)
412 pkmap_page_table = pte; 412 pkmap_page_table = pte;
413} 413}
414 414
415static void __init add_one_highpage_init(struct page *page, int pfn) 415static void __init add_one_highpage_init(struct page *page)
416{ 416{
417 ClearPageReserved(page); 417 ClearPageReserved(page);
418 init_page_count(page); 418 init_page_count(page);
@@ -445,7 +445,7 @@ static int __init add_highpages_work_fn(unsigned long start_pfn,
445 if (!pfn_valid(node_pfn)) 445 if (!pfn_valid(node_pfn))
446 continue; 446 continue;
447 page = pfn_to_page(node_pfn); 447 page = pfn_to_page(node_pfn);
448 add_one_highpage_init(page, node_pfn); 448 add_one_highpage_init(page);
449 } 449 }
450 450
451 return 0; 451 return 0;
@@ -703,8 +703,8 @@ void __init find_low_pfn_range(void)
703} 703}
704 704
705#ifndef CONFIG_NEED_MULTIPLE_NODES 705#ifndef CONFIG_NEED_MULTIPLE_NODES
706void __init initmem_init(unsigned long start_pfn, 706void __init initmem_init(unsigned long start_pfn, unsigned long end_pfn,
707 unsigned long end_pfn) 707 int acpi, int k8)
708{ 708{
709#ifdef CONFIG_HIGHMEM 709#ifdef CONFIG_HIGHMEM
710 highstart_pfn = highend_pfn = max_pfn; 710 highstart_pfn = highend_pfn = max_pfn;
@@ -997,7 +997,7 @@ static noinline int do_test_wp_bit(void)
997const int rodata_test_data = 0xC3; 997const int rodata_test_data = 0xC3;
998EXPORT_SYMBOL_GPL(rodata_test_data); 998EXPORT_SYMBOL_GPL(rodata_test_data);
999 999
1000static int kernel_set_to_readonly; 1000int kernel_set_to_readonly __read_mostly;
1001 1001
1002void set_kernel_text_rw(void) 1002void set_kernel_text_rw(void)
1003{ 1003{
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 5a4398a6006b..5198b9bb34ef 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -568,7 +568,8 @@ kernel_physical_mapping_init(unsigned long start,
568} 568}
569 569
570#ifndef CONFIG_NUMA 570#ifndef CONFIG_NUMA
571void __init initmem_init(unsigned long start_pfn, unsigned long end_pfn) 571void __init initmem_init(unsigned long start_pfn, unsigned long end_pfn,
572 int acpi, int k8)
572{ 573{
573 unsigned long bootmap_size, bootmap; 574 unsigned long bootmap_size, bootmap;
574 575
@@ -694,12 +695,12 @@ void __init mem_init(void)
694const int rodata_test_data = 0xC3; 695const int rodata_test_data = 0xC3;
695EXPORT_SYMBOL_GPL(rodata_test_data); 696EXPORT_SYMBOL_GPL(rodata_test_data);
696 697
697static int kernel_set_to_readonly; 698int kernel_set_to_readonly;
698 699
699void set_kernel_text_rw(void) 700void set_kernel_text_rw(void)
700{ 701{
701 unsigned long start = PFN_ALIGN(_stext); 702 unsigned long start = PFN_ALIGN(_text);
702 unsigned long end = PFN_ALIGN(__start_rodata); 703 unsigned long end = PFN_ALIGN(__stop___ex_table);
703 704
704 if (!kernel_set_to_readonly) 705 if (!kernel_set_to_readonly)
705 return; 706 return;
@@ -707,13 +708,18 @@ void set_kernel_text_rw(void)
707 pr_debug("Set kernel text: %lx - %lx for read write\n", 708 pr_debug("Set kernel text: %lx - %lx for read write\n",
708 start, end); 709 start, end);
709 710
711 /*
712 * Make the kernel identity mapping for text RW. Kernel text
713 * mapping will always be RO. Refer to the comment in
714 * static_protections() in pageattr.c
715 */
710 set_memory_rw(start, (end - start) >> PAGE_SHIFT); 716 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
711} 717}
712 718
713void set_kernel_text_ro(void) 719void set_kernel_text_ro(void)
714{ 720{
715 unsigned long start = PFN_ALIGN(_stext); 721 unsigned long start = PFN_ALIGN(_text);
716 unsigned long end = PFN_ALIGN(__start_rodata); 722 unsigned long end = PFN_ALIGN(__stop___ex_table);
717 723
718 if (!kernel_set_to_readonly) 724 if (!kernel_set_to_readonly)
719 return; 725 return;
@@ -721,14 +727,21 @@ void set_kernel_text_ro(void)
721 pr_debug("Set kernel text: %lx - %lx for read only\n", 727 pr_debug("Set kernel text: %lx - %lx for read only\n",
722 start, end); 728 start, end);
723 729
730 /*
731 * Set the kernel identity mapping for text RO.
732 */
724 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 733 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
725} 734}
726 735
727void mark_rodata_ro(void) 736void mark_rodata_ro(void)
728{ 737{
729 unsigned long start = PFN_ALIGN(_stext), end = PFN_ALIGN(__end_rodata); 738 unsigned long start = PFN_ALIGN(_text);
730 unsigned long rodata_start = 739 unsigned long rodata_start =
731 ((unsigned long)__start_rodata + PAGE_SIZE - 1) & PAGE_MASK; 740 ((unsigned long)__start_rodata + PAGE_SIZE - 1) & PAGE_MASK;
741 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
742 unsigned long text_end = PAGE_ALIGN((unsigned long) &__stop___ex_table);
743 unsigned long rodata_end = PAGE_ALIGN((unsigned long) &__end_rodata);
744 unsigned long data_start = (unsigned long) &_sdata;
732 745
733 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", 746 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
734 (end - start) >> 10); 747 (end - start) >> 10);
@@ -751,6 +764,14 @@ void mark_rodata_ro(void)
751 printk(KERN_INFO "Testing CPA: again\n"); 764 printk(KERN_INFO "Testing CPA: again\n");
752 set_memory_ro(start, (end-start) >> PAGE_SHIFT); 765 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
753#endif 766#endif
767
768 free_init_pages("unused kernel memory",
769 (unsigned long) page_address(virt_to_page(text_end)),
770 (unsigned long)
771 page_address(virt_to_page(rodata_start)));
772 free_init_pages("unused kernel memory",
773 (unsigned long) page_address(virt_to_page(rodata_end)),
774 (unsigned long) page_address(virt_to_page(data_start)));
754} 775}
755 776
756#endif 777#endif
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 2feb9bdedaaf..c246d259822d 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -281,30 +281,6 @@ void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size)
281} 281}
282EXPORT_SYMBOL(ioremap_cache); 282EXPORT_SYMBOL(ioremap_cache);
283 283
284static void __iomem *ioremap_default(resource_size_t phys_addr,
285 unsigned long size)
286{
287 unsigned long flags;
288 void __iomem *ret;
289 int err;
290
291 /*
292 * - WB for WB-able memory and no other conflicting mappings
293 * - UC_MINUS for non-WB-able memory with no other conflicting mappings
294 * - Inherit from confliting mappings otherwise
295 */
296 err = reserve_memtype(phys_addr, phys_addr + size,
297 _PAGE_CACHE_WB, &flags);
298 if (err < 0)
299 return NULL;
300
301 ret = __ioremap_caller(phys_addr, size, flags,
302 __builtin_return_address(0));
303
304 free_memtype(phys_addr, phys_addr + size);
305 return ret;
306}
307
308void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size, 284void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size,
309 unsigned long prot_val) 285 unsigned long prot_val)
310{ 286{
@@ -380,7 +356,7 @@ void *xlate_dev_mem_ptr(unsigned long phys)
380 if (page_is_ram(start >> PAGE_SHIFT)) 356 if (page_is_ram(start >> PAGE_SHIFT))
381 return __va(phys); 357 return __va(phys);
382 358
383 addr = (void __force *)ioremap_default(start, PAGE_SIZE); 359 addr = (void __force *)ioremap_cache(start, PAGE_SIZE);
384 if (addr) 360 if (addr)
385 addr = (void *)((unsigned long)addr | (phys & ~PAGE_MASK)); 361 addr = (void *)((unsigned long)addr | (phys & ~PAGE_MASK));
386 362
diff --git a/arch/x86/mm/k8topology_64.c b/arch/x86/mm/k8topology_64.c
index 268f8255280f..970ed579d4e4 100644
--- a/arch/x86/mm/k8topology_64.c
+++ b/arch/x86/mm/k8topology_64.c
@@ -24,6 +24,9 @@
24#include <asm/apic.h> 24#include <asm/apic.h>
25#include <asm/k8.h> 25#include <asm/k8.h>
26 26
27static struct bootnode __initdata nodes[8];
28static nodemask_t __initdata nodes_parsed = NODE_MASK_NONE;
29
27static __init int find_northbridge(void) 30static __init int find_northbridge(void)
28{ 31{
29 int num; 32 int num;
@@ -54,18 +57,6 @@ static __init void early_get_boot_cpu_id(void)
54 * need to get boot_cpu_id so can use that to create apicid_to_node 57 * need to get boot_cpu_id so can use that to create apicid_to_node
55 * in k8_scan_nodes() 58 * in k8_scan_nodes()
56 */ 59 */
57 /*
58 * Find possible boot-time SMP configuration:
59 */
60#ifdef CONFIG_X86_MPPARSE
61 early_find_smp_config();
62#endif
63#ifdef CONFIG_ACPI
64 /*
65 * Read APIC information from ACPI tables.
66 */
67 early_acpi_boot_init();
68#endif
69#ifdef CONFIG_X86_MPPARSE 60#ifdef CONFIG_X86_MPPARSE
70 /* 61 /*
71 * get boot-time SMP configuration: 62 * get boot-time SMP configuration:
@@ -76,12 +67,26 @@ static __init void early_get_boot_cpu_id(void)
76 early_init_lapic_mapping(); 67 early_init_lapic_mapping();
77} 68}
78 69
79int __init k8_scan_nodes(unsigned long start, unsigned long end) 70int __init k8_get_nodes(struct bootnode *physnodes)
80{ 71{
81 unsigned numnodes, cores, bits, apicid_base; 72 int i;
73 int ret = 0;
74
75 for_each_node_mask(i, nodes_parsed) {
76 physnodes[ret].start = nodes[i].start;
77 physnodes[ret].end = nodes[i].end;
78 ret++;
79 }
80 return ret;
81}
82
83int __init k8_numa_init(unsigned long start_pfn, unsigned long end_pfn)
84{
85 unsigned long start = PFN_PHYS(start_pfn);
86 unsigned long end = PFN_PHYS(end_pfn);
87 unsigned numnodes;
82 unsigned long prevbase; 88 unsigned long prevbase;
83 struct bootnode nodes[8]; 89 int i, nb, found = 0;
84 int i, j, nb, found = 0;
85 u32 nodeid, reg; 90 u32 nodeid, reg;
86 91
87 if (!early_pci_allowed()) 92 if (!early_pci_allowed())
@@ -91,16 +96,15 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end)
91 if (nb < 0) 96 if (nb < 0)
92 return nb; 97 return nb;
93 98
94 printk(KERN_INFO "Scanning NUMA topology in Northbridge %d\n", nb); 99 pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
95 100
96 reg = read_pci_config(0, nb, 0, 0x60); 101 reg = read_pci_config(0, nb, 0, 0x60);
97 numnodes = ((reg >> 4) & 0xF) + 1; 102 numnodes = ((reg >> 4) & 0xF) + 1;
98 if (numnodes <= 1) 103 if (numnodes <= 1)
99 return -1; 104 return -1;
100 105
101 printk(KERN_INFO "Number of nodes %d\n", numnodes); 106 pr_info("Number of physical nodes %d\n", numnodes);
102 107
103 memset(&nodes, 0, sizeof(nodes));
104 prevbase = 0; 108 prevbase = 0;
105 for (i = 0; i < 8; i++) { 109 for (i = 0; i < 8; i++) {
106 unsigned long base, limit; 110 unsigned long base, limit;
@@ -111,28 +115,28 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end)
111 nodeid = limit & 7; 115 nodeid = limit & 7;
112 if ((base & 3) == 0) { 116 if ((base & 3) == 0) {
113 if (i < numnodes) 117 if (i < numnodes)
114 printk("Skipping disabled node %d\n", i); 118 pr_info("Skipping disabled node %d\n", i);
115 continue; 119 continue;
116 } 120 }
117 if (nodeid >= numnodes) { 121 if (nodeid >= numnodes) {
118 printk("Ignoring excess node %d (%lx:%lx)\n", nodeid, 122 pr_info("Ignoring excess node %d (%lx:%lx)\n", nodeid,
119 base, limit); 123 base, limit);
120 continue; 124 continue;
121 } 125 }
122 126
123 if (!limit) { 127 if (!limit) {
124 printk(KERN_INFO "Skipping node entry %d (base %lx)\n", 128 pr_info("Skipping node entry %d (base %lx)\n",
125 i, base); 129 i, base);
126 continue; 130 continue;
127 } 131 }
128 if ((base >> 8) & 3 || (limit >> 8) & 3) { 132 if ((base >> 8) & 3 || (limit >> 8) & 3) {
129 printk(KERN_ERR "Node %d using interleaving mode %lx/%lx\n", 133 pr_err("Node %d using interleaving mode %lx/%lx\n",
130 nodeid, (base>>8)&3, (limit>>8) & 3); 134 nodeid, (base >> 8) & 3, (limit >> 8) & 3);
131 return -1; 135 return -1;
132 } 136 }
133 if (node_isset(nodeid, node_possible_map)) { 137 if (node_isset(nodeid, nodes_parsed)) {
134 printk(KERN_INFO "Node %d already present. Skipping\n", 138 pr_info("Node %d already present, skipping\n",
135 nodeid); 139 nodeid);
136 continue; 140 continue;
137 } 141 }
138 142
@@ -141,8 +145,8 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end)
141 limit |= (1<<24)-1; 145 limit |= (1<<24)-1;
142 limit++; 146 limit++;
143 147
144 if (limit > max_pfn << PAGE_SHIFT) 148 if (limit > end)
145 limit = max_pfn << PAGE_SHIFT; 149 limit = end;
146 if (limit <= base) 150 if (limit <= base)
147 continue; 151 continue;
148 152
@@ -154,24 +158,24 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end)
154 if (limit > end) 158 if (limit > end)
155 limit = end; 159 limit = end;
156 if (limit == base) { 160 if (limit == base) {
157 printk(KERN_ERR "Empty node %d\n", nodeid); 161 pr_err("Empty node %d\n", nodeid);
158 continue; 162 continue;
159 } 163 }
160 if (limit < base) { 164 if (limit < base) {
161 printk(KERN_ERR "Node %d bogus settings %lx-%lx.\n", 165 pr_err("Node %d bogus settings %lx-%lx.\n",
162 nodeid, base, limit); 166 nodeid, base, limit);
163 continue; 167 continue;
164 } 168 }
165 169
166 /* Could sort here, but pun for now. Should not happen anyroads. */ 170 /* Could sort here, but pun for now. Should not happen anyroads. */
167 if (prevbase > base) { 171 if (prevbase > base) {
168 printk(KERN_ERR "Node map not sorted %lx,%lx\n", 172 pr_err("Node map not sorted %lx,%lx\n",
169 prevbase, base); 173 prevbase, base);
170 return -1; 174 return -1;
171 } 175 }
172 176
173 printk(KERN_INFO "Node %d MemBase %016lx Limit %016lx\n", 177 pr_info("Node %d MemBase %016lx Limit %016lx\n",
174 nodeid, base, limit); 178 nodeid, base, limit);
175 179
176 found++; 180 found++;
177 181
@@ -180,18 +184,29 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end)
180 184
181 prevbase = base; 185 prevbase = base;
182 186
183 node_set(nodeid, node_possible_map); 187 node_set(nodeid, nodes_parsed);
184 } 188 }
185 189
186 if (!found) 190 if (!found)
187 return -1; 191 return -1;
192 return 0;
193}
194
195int __init k8_scan_nodes(void)
196{
197 unsigned int bits;
198 unsigned int cores;
199 unsigned int apicid_base;
200 int i;
188 201
202 BUG_ON(nodes_empty(nodes_parsed));
203 node_possible_map = nodes_parsed;
189 memnode_shift = compute_hash_shift(nodes, 8, NULL); 204 memnode_shift = compute_hash_shift(nodes, 8, NULL);
190 if (memnode_shift < 0) { 205 if (memnode_shift < 0) {
191 printk(KERN_ERR "No NUMA node hash function found. Contact maintainer\n"); 206 pr_err("No NUMA node hash function found. Contact maintainer\n");
192 return -1; 207 return -1;
193 } 208 }
194 printk(KERN_INFO "Using node hash shift of %d\n", memnode_shift); 209 pr_info("Using node hash shift of %d\n", memnode_shift);
195 210
196 /* use the coreid bits from early_identify_cpu */ 211 /* use the coreid bits from early_identify_cpu */
197 bits = boot_cpu_data.x86_coreid_bits; 212 bits = boot_cpu_data.x86_coreid_bits;
@@ -200,14 +215,12 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end)
200 /* need to get boot_cpu_id early for system with apicid lifting */ 215 /* need to get boot_cpu_id early for system with apicid lifting */
201 early_get_boot_cpu_id(); 216 early_get_boot_cpu_id();
202 if (boot_cpu_physical_apicid > 0) { 217 if (boot_cpu_physical_apicid > 0) {
203 printk(KERN_INFO "BSP APIC ID: %02x\n", 218 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
204 boot_cpu_physical_apicid);
205 apicid_base = boot_cpu_physical_apicid; 219 apicid_base = boot_cpu_physical_apicid;
206 } 220 }
207 221
208 for (i = 0; i < 8; i++) { 222 for_each_node_mask(i, node_possible_map) {
209 if (nodes[i].start == nodes[i].end) 223 int j;
210 continue;
211 224
212 e820_register_active_regions(i, 225 e820_register_active_regions(i,
213 nodes[i].start >> PAGE_SHIFT, 226 nodes[i].start >> PAGE_SHIFT,
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 11a4ad4d6253..07bcc309cfda 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -203,7 +203,7 @@ static void disarm_kmmio_fault_page(struct kmmio_fault_page *f)
203 */ 203 */
204/* 204/*
205 * Interrupts are disabled on entry as trap3 is an interrupt gate 205 * Interrupts are disabled on entry as trap3 is an interrupt gate
206 * and they remain disabled thorough out this function. 206 * and they remain disabled throughout this function.
207 */ 207 */
208int kmmio_handler(struct pt_regs *regs, unsigned long addr) 208int kmmio_handler(struct pt_regs *regs, unsigned long addr)
209{ 209{
@@ -302,7 +302,7 @@ no_kmmio:
302 302
303/* 303/*
304 * Interrupts are disabled on entry as trap1 is an interrupt gate 304 * Interrupts are disabled on entry as trap1 is an interrupt gate
305 * and they remain disabled thorough out this function. 305 * and they remain disabled throughout this function.
306 * This must always get called as the pair to kmmio_handler(). 306 * This must always get called as the pair to kmmio_handler().
307 */ 307 */
308static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs) 308static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs)
diff --git a/arch/x86/mm/numa_32.c b/arch/x86/mm/numa_32.c
index d2530062fe00..b20760ca7244 100644
--- a/arch/x86/mm/numa_32.c
+++ b/arch/x86/mm/numa_32.c
@@ -347,8 +347,8 @@ static void init_remap_allocator(int nid)
347 (ulong) node_remap_end_vaddr[nid]); 347 (ulong) node_remap_end_vaddr[nid]);
348} 348}
349 349
350void __init initmem_init(unsigned long start_pfn, 350void __init initmem_init(unsigned long start_pfn, unsigned long end_pfn,
351 unsigned long end_pfn) 351 int acpi, int k8)
352{ 352{
353 int nid; 353 int nid;
354 long kva_target_pfn; 354 long kva_target_pfn;
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index 459913beac71..83bbc70d11bb 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -239,8 +239,14 @@ setup_node_bootmem(int nodeid, unsigned long start, unsigned long end)
239 bootmap = early_node_mem(nodeid, bootmap_start, end, 239 bootmap = early_node_mem(nodeid, bootmap_start, end,
240 bootmap_pages<<PAGE_SHIFT, PAGE_SIZE); 240 bootmap_pages<<PAGE_SHIFT, PAGE_SIZE);
241 if (bootmap == NULL) { 241 if (bootmap == NULL) {
242 if (nodedata_phys < start || nodedata_phys >= end) 242 if (nodedata_phys < start || nodedata_phys >= end) {
243 free_bootmem(nodedata_phys, pgdat_size); 243 /*
244 * only need to free it if it is from other node
245 * bootmem
246 */
247 if (nid != nodeid)
248 free_bootmem(nodedata_phys, pgdat_size);
249 }
244 node_data[nodeid] = NULL; 250 node_data[nodeid] = NULL;
245 return; 251 return;
246 } 252 }
@@ -306,8 +312,71 @@ void __init numa_init_array(void)
306 312
307#ifdef CONFIG_NUMA_EMU 313#ifdef CONFIG_NUMA_EMU
308/* Numa emulation */ 314/* Numa emulation */
315static struct bootnode nodes[MAX_NUMNODES] __initdata;
316static struct bootnode physnodes[MAX_NUMNODES] __initdata;
309static char *cmdline __initdata; 317static char *cmdline __initdata;
310 318
319static int __init setup_physnodes(unsigned long start, unsigned long end,
320 int acpi, int k8)
321{
322 int nr_nodes = 0;
323 int ret = 0;
324 int i;
325
326#ifdef CONFIG_ACPI_NUMA
327 if (acpi)
328 nr_nodes = acpi_get_nodes(physnodes);
329#endif
330#ifdef CONFIG_K8_NUMA
331 if (k8)
332 nr_nodes = k8_get_nodes(physnodes);
333#endif
334 /*
335 * Basic sanity checking on the physical node map: there may be errors
336 * if the SRAT or K8 incorrectly reported the topology or the mem=
337 * kernel parameter is used.
338 */
339 for (i = 0; i < nr_nodes; i++) {
340 if (physnodes[i].start == physnodes[i].end)
341 continue;
342 if (physnodes[i].start > end) {
343 physnodes[i].end = physnodes[i].start;
344 continue;
345 }
346 if (physnodes[i].end < start) {
347 physnodes[i].start = physnodes[i].end;
348 continue;
349 }
350 if (physnodes[i].start < start)
351 physnodes[i].start = start;
352 if (physnodes[i].end > end)
353 physnodes[i].end = end;
354 }
355
356 /*
357 * Remove all nodes that have no memory or were truncated because of the
358 * limited address range.
359 */
360 for (i = 0; i < nr_nodes; i++) {
361 if (physnodes[i].start == physnodes[i].end)
362 continue;
363 physnodes[ret].start = physnodes[i].start;
364 physnodes[ret].end = physnodes[i].end;
365 ret++;
366 }
367
368 /*
369 * If no physical topology was detected, a single node is faked to cover
370 * the entire address space.
371 */
372 if (!ret) {
373 physnodes[ret].start = start;
374 physnodes[ret].end = end;
375 ret = 1;
376 }
377 return ret;
378}
379
311/* 380/*
312 * Setups up nid to range from addr to addr + size. If the end 381 * Setups up nid to range from addr to addr + size. If the end
313 * boundary is greater than max_addr, then max_addr is used instead. 382 * boundary is greater than max_addr, then max_addr is used instead.
@@ -315,11 +384,9 @@ static char *cmdline __initdata;
315 * allocation past addr and -1 otherwise. addr is adjusted to be at 384 * allocation past addr and -1 otherwise. addr is adjusted to be at
316 * the end of the node. 385 * the end of the node.
317 */ 386 */
318static int __init setup_node_range(int nid, struct bootnode *nodes, u64 *addr, 387static int __init setup_node_range(int nid, u64 *addr, u64 size, u64 max_addr)
319 u64 size, u64 max_addr)
320{ 388{
321 int ret = 0; 389 int ret = 0;
322
323 nodes[nid].start = *addr; 390 nodes[nid].start = *addr;
324 *addr += size; 391 *addr += size;
325 if (*addr >= max_addr) { 392 if (*addr >= max_addr) {
@@ -335,12 +402,111 @@ static int __init setup_node_range(int nid, struct bootnode *nodes, u64 *addr,
335} 402}
336 403
337/* 404/*
405 * Sets up nr_nodes fake nodes interleaved over physical nodes ranging from addr
406 * to max_addr. The return value is the number of nodes allocated.
407 */
408static int __init split_nodes_interleave(u64 addr, u64 max_addr,
409 int nr_phys_nodes, int nr_nodes)
410{
411 nodemask_t physnode_mask = NODE_MASK_NONE;
412 u64 size;
413 int big;
414 int ret = 0;
415 int i;
416
417 if (nr_nodes <= 0)
418 return -1;
419 if (nr_nodes > MAX_NUMNODES) {
420 pr_info("numa=fake=%d too large, reducing to %d\n",
421 nr_nodes, MAX_NUMNODES);
422 nr_nodes = MAX_NUMNODES;
423 }
424
425 size = (max_addr - addr - e820_hole_size(addr, max_addr)) / nr_nodes;
426 /*
427 * Calculate the number of big nodes that can be allocated as a result
428 * of consolidating the remainder.
429 */
430 big = ((size & ~FAKE_NODE_MIN_HASH_MASK) & nr_nodes) /
431 FAKE_NODE_MIN_SIZE;
432
433 size &= FAKE_NODE_MIN_HASH_MASK;
434 if (!size) {
435 pr_err("Not enough memory for each node. "
436 "NUMA emulation disabled.\n");
437 return -1;
438 }
439
440 for (i = 0; i < nr_phys_nodes; i++)
441 if (physnodes[i].start != physnodes[i].end)
442 node_set(i, physnode_mask);
443
444 /*
445 * Continue to fill physical nodes with fake nodes until there is no
446 * memory left on any of them.
447 */
448 while (nodes_weight(physnode_mask)) {
449 for_each_node_mask(i, physnode_mask) {
450 u64 end = physnodes[i].start + size;
451 u64 dma32_end = PFN_PHYS(MAX_DMA32_PFN);
452
453 if (ret < big)
454 end += FAKE_NODE_MIN_SIZE;
455
456 /*
457 * Continue to add memory to this fake node if its
458 * non-reserved memory is less than the per-node size.
459 */
460 while (end - physnodes[i].start -
461 e820_hole_size(physnodes[i].start, end) < size) {
462 end += FAKE_NODE_MIN_SIZE;
463 if (end > physnodes[i].end) {
464 end = physnodes[i].end;
465 break;
466 }
467 }
468
469 /*
470 * If there won't be at least FAKE_NODE_MIN_SIZE of
471 * non-reserved memory in ZONE_DMA32 for the next node,
472 * this one must extend to the boundary.
473 */
474 if (end < dma32_end && dma32_end - end -
475 e820_hole_size(end, dma32_end) < FAKE_NODE_MIN_SIZE)
476 end = dma32_end;
477
478 /*
479 * If there won't be enough non-reserved memory for the
480 * next node, this one must extend to the end of the
481 * physical node.
482 */
483 if (physnodes[i].end - end -
484 e820_hole_size(end, physnodes[i].end) < size)
485 end = physnodes[i].end;
486
487 /*
488 * Avoid allocating more nodes than requested, which can
489 * happen as a result of rounding down each node's size
490 * to FAKE_NODE_MIN_SIZE.
491 */
492 if (nodes_weight(physnode_mask) + ret >= nr_nodes)
493 end = physnodes[i].end;
494
495 if (setup_node_range(ret++, &physnodes[i].start,
496 end - physnodes[i].start,
497 physnodes[i].end) < 0)
498 node_clear(i, physnode_mask);
499 }
500 }
501 return ret;
502}
503
504/*
338 * Splits num_nodes nodes up equally starting at node_start. The return value 505 * Splits num_nodes nodes up equally starting at node_start. The return value
339 * is the number of nodes split up and addr is adjusted to be at the end of the 506 * is the number of nodes split up and addr is adjusted to be at the end of the
340 * last node allocated. 507 * last node allocated.
341 */ 508 */
342static int __init split_nodes_equally(struct bootnode *nodes, u64 *addr, 509static int __init split_nodes_equally(u64 *addr, u64 max_addr, int node_start,
343 u64 max_addr, int node_start,
344 int num_nodes) 510 int num_nodes)
345{ 511{
346 unsigned int big; 512 unsigned int big;
@@ -388,7 +554,7 @@ static int __init split_nodes_equally(struct bootnode *nodes, u64 *addr,
388 break; 554 break;
389 } 555 }
390 } 556 }
391 if (setup_node_range(i, nodes, addr, end - *addr, max_addr) < 0) 557 if (setup_node_range(i, addr, end - *addr, max_addr) < 0)
392 break; 558 break;
393 } 559 }
394 return i - node_start + 1; 560 return i - node_start + 1;
@@ -399,12 +565,12 @@ static int __init split_nodes_equally(struct bootnode *nodes, u64 *addr,
399 * always assigned to a final node and can be asymmetric. Returns the number of 565 * always assigned to a final node and can be asymmetric. Returns the number of
400 * nodes split. 566 * nodes split.
401 */ 567 */
402static int __init split_nodes_by_size(struct bootnode *nodes, u64 *addr, 568static int __init split_nodes_by_size(u64 *addr, u64 max_addr, int node_start,
403 u64 max_addr, int node_start, u64 size) 569 u64 size)
404{ 570{
405 int i = node_start; 571 int i = node_start;
406 size = (size << 20) & FAKE_NODE_MIN_HASH_MASK; 572 size = (size << 20) & FAKE_NODE_MIN_HASH_MASK;
407 while (!setup_node_range(i++, nodes, addr, size, max_addr)) 573 while (!setup_node_range(i++, addr, size, max_addr))
408 ; 574 ;
409 return i - node_start; 575 return i - node_start;
410} 576}
@@ -413,15 +579,15 @@ static int __init split_nodes_by_size(struct bootnode *nodes, u64 *addr,
413 * Sets up the system RAM area from start_pfn to last_pfn according to the 579 * Sets up the system RAM area from start_pfn to last_pfn according to the
414 * numa=fake command-line option. 580 * numa=fake command-line option.
415 */ 581 */
416static struct bootnode nodes[MAX_NUMNODES] __initdata; 582static int __init numa_emulation(unsigned long start_pfn,
417 583 unsigned long last_pfn, int acpi, int k8)
418static int __init numa_emulation(unsigned long start_pfn, unsigned long last_pfn)
419{ 584{
420 u64 size, addr = start_pfn << PAGE_SHIFT; 585 u64 size, addr = start_pfn << PAGE_SHIFT;
421 u64 max_addr = last_pfn << PAGE_SHIFT; 586 u64 max_addr = last_pfn << PAGE_SHIFT;
422 int num_nodes = 0, num = 0, coeff_flag, coeff = -1, i; 587 int num_nodes = 0, num = 0, coeff_flag, coeff = -1, i;
588 int num_phys_nodes;
423 589
424 memset(&nodes, 0, sizeof(nodes)); 590 num_phys_nodes = setup_physnodes(addr, max_addr, acpi, k8);
425 /* 591 /*
426 * If the numa=fake command-line is just a single number N, split the 592 * If the numa=fake command-line is just a single number N, split the
427 * system RAM into N fake nodes. 593 * system RAM into N fake nodes.
@@ -429,7 +595,8 @@ static int __init numa_emulation(unsigned long start_pfn, unsigned long last_pfn
429 if (!strchr(cmdline, '*') && !strchr(cmdline, ',')) { 595 if (!strchr(cmdline, '*') && !strchr(cmdline, ',')) {
430 long n = simple_strtol(cmdline, NULL, 0); 596 long n = simple_strtol(cmdline, NULL, 0);
431 597
432 num_nodes = split_nodes_equally(nodes, &addr, max_addr, 0, n); 598 num_nodes = split_nodes_interleave(addr, max_addr,
599 num_phys_nodes, n);
433 if (num_nodes < 0) 600 if (num_nodes < 0)
434 return num_nodes; 601 return num_nodes;
435 goto out; 602 goto out;
@@ -456,8 +623,8 @@ static int __init numa_emulation(unsigned long start_pfn, unsigned long last_pfn
456 size = ((u64)num << 20) & FAKE_NODE_MIN_HASH_MASK; 623 size = ((u64)num << 20) & FAKE_NODE_MIN_HASH_MASK;
457 if (size) 624 if (size)
458 for (i = 0; i < coeff; i++, num_nodes++) 625 for (i = 0; i < coeff; i++, num_nodes++)
459 if (setup_node_range(num_nodes, nodes, 626 if (setup_node_range(num_nodes, &addr,
460 &addr, size, max_addr) < 0) 627 size, max_addr) < 0)
461 goto done; 628 goto done;
462 if (!*cmdline) 629 if (!*cmdline)
463 break; 630 break;
@@ -473,7 +640,7 @@ done:
473 if (addr < max_addr) { 640 if (addr < max_addr) {
474 if (coeff_flag && coeff < 0) { 641 if (coeff_flag && coeff < 0) {
475 /* Split remaining nodes into num-sized chunks */ 642 /* Split remaining nodes into num-sized chunks */
476 num_nodes += split_nodes_by_size(nodes, &addr, max_addr, 643 num_nodes += split_nodes_by_size(&addr, max_addr,
477 num_nodes, num); 644 num_nodes, num);
478 goto out; 645 goto out;
479 } 646 }
@@ -482,7 +649,7 @@ done:
482 /* Split remaining nodes into coeff chunks */ 649 /* Split remaining nodes into coeff chunks */
483 if (coeff <= 0) 650 if (coeff <= 0)
484 break; 651 break;
485 num_nodes += split_nodes_equally(nodes, &addr, max_addr, 652 num_nodes += split_nodes_equally(&addr, max_addr,
486 num_nodes, coeff); 653 num_nodes, coeff);
487 break; 654 break;
488 case ',': 655 case ',':
@@ -490,8 +657,8 @@ done:
490 break; 657 break;
491 default: 658 default:
492 /* Give one final node */ 659 /* Give one final node */
493 setup_node_range(num_nodes, nodes, &addr, 660 setup_node_range(num_nodes, &addr, max_addr - addr,
494 max_addr - addr, max_addr); 661 max_addr);
495 num_nodes++; 662 num_nodes++;
496 } 663 }
497 } 664 }
@@ -505,14 +672,10 @@ out:
505 } 672 }
506 673
507 /* 674 /*
508 * We need to vacate all active ranges that may have been registered by 675 * We need to vacate all active ranges that may have been registered for
509 * SRAT and set acpi_numa to -1 so that srat_disabled() always returns 676 * the e820 memory map.
510 * true. NUMA emulation has succeeded so we will not scan ACPI nodes.
511 */ 677 */
512 remove_all_active_ranges(); 678 remove_all_active_ranges();
513#ifdef CONFIG_ACPI_NUMA
514 acpi_numa = -1;
515#endif
516 for_each_node_mask(i, node_possible_map) { 679 for_each_node_mask(i, node_possible_map) {
517 e820_register_active_regions(i, nodes[i].start >> PAGE_SHIFT, 680 e820_register_active_regions(i, nodes[i].start >> PAGE_SHIFT,
518 nodes[i].end >> PAGE_SHIFT); 681 nodes[i].end >> PAGE_SHIFT);
@@ -524,7 +687,8 @@ out:
524} 687}
525#endif /* CONFIG_NUMA_EMU */ 688#endif /* CONFIG_NUMA_EMU */
526 689
527void __init initmem_init(unsigned long start_pfn, unsigned long last_pfn) 690void __init initmem_init(unsigned long start_pfn, unsigned long last_pfn,
691 int acpi, int k8)
528{ 692{
529 int i; 693 int i;
530 694
@@ -532,23 +696,22 @@ void __init initmem_init(unsigned long start_pfn, unsigned long last_pfn)
532 nodes_clear(node_online_map); 696 nodes_clear(node_online_map);
533 697
534#ifdef CONFIG_NUMA_EMU 698#ifdef CONFIG_NUMA_EMU
535 if (cmdline && !numa_emulation(start_pfn, last_pfn)) 699 if (cmdline && !numa_emulation(start_pfn, last_pfn, acpi, k8))
536 return; 700 return;
537 nodes_clear(node_possible_map); 701 nodes_clear(node_possible_map);
538 nodes_clear(node_online_map); 702 nodes_clear(node_online_map);
539#endif 703#endif
540 704
541#ifdef CONFIG_ACPI_NUMA 705#ifdef CONFIG_ACPI_NUMA
542 if (!numa_off && !acpi_scan_nodes(start_pfn << PAGE_SHIFT, 706 if (!numa_off && acpi && !acpi_scan_nodes(start_pfn << PAGE_SHIFT,
543 last_pfn << PAGE_SHIFT)) 707 last_pfn << PAGE_SHIFT))
544 return; 708 return;
545 nodes_clear(node_possible_map); 709 nodes_clear(node_possible_map);
546 nodes_clear(node_online_map); 710 nodes_clear(node_online_map);
547#endif 711#endif
548 712
549#ifdef CONFIG_K8_NUMA 713#ifdef CONFIG_K8_NUMA
550 if (!numa_off && !k8_scan_nodes(start_pfn<<PAGE_SHIFT, 714 if (!numa_off && k8 && !k8_scan_nodes())
551 last_pfn<<PAGE_SHIFT))
552 return; 715 return;
553 nodes_clear(node_possible_map); 716 nodes_clear(node_possible_map);
554 nodes_clear(node_online_map); 717 nodes_clear(node_online_map);
@@ -601,6 +764,25 @@ static __init int numa_setup(char *opt)
601early_param("numa", numa_setup); 764early_param("numa", numa_setup);
602 765
603#ifdef CONFIG_NUMA 766#ifdef CONFIG_NUMA
767
768static __init int find_near_online_node(int node)
769{
770 int n, val;
771 int min_val = INT_MAX;
772 int best_node = -1;
773
774 for_each_online_node(n) {
775 val = node_distance(node, n);
776
777 if (val < min_val) {
778 min_val = val;
779 best_node = n;
780 }
781 }
782
783 return best_node;
784}
785
604/* 786/*
605 * Setup early cpu_to_node. 787 * Setup early cpu_to_node.
606 * 788 *
@@ -632,7 +814,7 @@ void __init init_cpu_to_node(void)
632 if (node == NUMA_NO_NODE) 814 if (node == NUMA_NO_NODE)
633 continue; 815 continue;
634 if (!node_online(node)) 816 if (!node_online(node))
635 continue; 817 node = find_near_online_node(node);
636 numa_set_node(cpu, node); 818 numa_set_node(cpu, node);
637 } 819 }
638} 820}
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index dd38bfbefd1f..1d4eb93d333c 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -279,6 +279,22 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
279 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT)) 279 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
280 pgprot_val(forbidden) |= _PAGE_RW; 280 pgprot_val(forbidden) |= _PAGE_RW;
281 281
282#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
283 /*
284 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
285 * kernel text mappings for the large page aligned text, rodata sections
286 * will be always read-only. For the kernel identity mappings covering
287 * the holes caused by this alignment can be anything that user asks.
288 *
289 * This will preserve the large page mappings for kernel text/data
290 * at no extra cost.
291 */
292 if (kernel_set_to_readonly &&
293 within(address, (unsigned long)_text,
294 (unsigned long)__end_rodata_hpage_align))
295 pgprot_val(forbidden) |= _PAGE_RW;
296#endif
297
282 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); 298 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
283 299
284 return prot; 300 return prot;
@@ -1069,12 +1085,18 @@ EXPORT_SYMBOL(set_memory_array_wb);
1069 1085
1070int set_memory_x(unsigned long addr, int numpages) 1086int set_memory_x(unsigned long addr, int numpages)
1071{ 1087{
1088 if (!(__supported_pte_mask & _PAGE_NX))
1089 return 0;
1090
1072 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0); 1091 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1073} 1092}
1074EXPORT_SYMBOL(set_memory_x); 1093EXPORT_SYMBOL(set_memory_x);
1075 1094
1076int set_memory_nx(unsigned long addr, int numpages) 1095int set_memory_nx(unsigned long addr, int numpages)
1077{ 1096{
1097 if (!(__supported_pte_mask & _PAGE_NX))
1098 return 0;
1099
1078 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0); 1100 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1079} 1101}
1080EXPORT_SYMBOL(set_memory_nx); 1102EXPORT_SYMBOL(set_memory_nx);
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index e78cd0ec2bcf..ae9648eb1c7f 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -20,6 +20,7 @@
20#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
21#include <asm/processor.h> 21#include <asm/processor.h>
22#include <asm/tlbflush.h> 22#include <asm/tlbflush.h>
23#include <asm/x86_init.h>
23#include <asm/pgtable.h> 24#include <asm/pgtable.h>
24#include <asm/fcntl.h> 25#include <asm/fcntl.h>
25#include <asm/e820.h> 26#include <asm/e820.h>
@@ -355,9 +356,6 @@ static int free_ram_pages_type(u64 start, u64 end)
355 * - _PAGE_CACHE_UC_MINUS 356 * - _PAGE_CACHE_UC_MINUS
356 * - _PAGE_CACHE_UC 357 * - _PAGE_CACHE_UC
357 * 358 *
358 * req_type will have a special case value '-1', when requester want to inherit
359 * the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS.
360 *
361 * If new_type is NULL, function will return an error if it cannot reserve the 359 * If new_type is NULL, function will return an error if it cannot reserve the
362 * region with req_type. If new_type is non-NULL, function will return 360 * region with req_type. If new_type is non-NULL, function will return
363 * available type in new_type in case of no error. In case of any error 361 * available type in new_type in case of no error. In case of any error
@@ -377,9 +375,7 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
377 if (!pat_enabled) { 375 if (!pat_enabled) {
378 /* This is identical to page table setting without PAT */ 376 /* This is identical to page table setting without PAT */
379 if (new_type) { 377 if (new_type) {
380 if (req_type == -1) 378 if (req_type == _PAGE_CACHE_WC)
381 *new_type = _PAGE_CACHE_WB;
382 else if (req_type == _PAGE_CACHE_WC)
383 *new_type = _PAGE_CACHE_UC_MINUS; 379 *new_type = _PAGE_CACHE_UC_MINUS;
384 else 380 else
385 *new_type = req_type & _PAGE_CACHE_MASK; 381 *new_type = req_type & _PAGE_CACHE_MASK;
@@ -388,7 +384,7 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
388 } 384 }
389 385
390 /* Low ISA region is always mapped WB in page table. No need to track */ 386 /* Low ISA region is always mapped WB in page table. No need to track */
391 if (is_ISA_range(start, end - 1)) { 387 if (x86_platform.is_untracked_pat_range(start, end)) {
392 if (new_type) 388 if (new_type)
393 *new_type = _PAGE_CACHE_WB; 389 *new_type = _PAGE_CACHE_WB;
394 return 0; 390 return 0;
@@ -499,7 +495,7 @@ int free_memtype(u64 start, u64 end)
499 return 0; 495 return 0;
500 496
501 /* Low ISA region is always mapped WB. No need to track */ 497 /* Low ISA region is always mapped WB. No need to track */
502 if (is_ISA_range(start, end - 1)) 498 if (x86_platform.is_untracked_pat_range(start, end))
503 return 0; 499 return 0;
504 500
505 is_range_ram = pat_pagerange_is_ram(start, end); 501 is_range_ram = pat_pagerange_is_ram(start, end);
@@ -582,7 +578,7 @@ static unsigned long lookup_memtype(u64 paddr)
582 int rettype = _PAGE_CACHE_WB; 578 int rettype = _PAGE_CACHE_WB;
583 struct memtype *entry; 579 struct memtype *entry;
584 580
585 if (is_ISA_range(paddr, paddr + PAGE_SIZE - 1)) 581 if (x86_platform.is_untracked_pat_range(paddr, paddr + PAGE_SIZE))
586 return rettype; 582 return rettype;
587 583
588 if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) { 584 if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) {
@@ -708,9 +704,8 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
708 if (!range_is_allowed(pfn, size)) 704 if (!range_is_allowed(pfn, size))
709 return 0; 705 return 0;
710 706
711 if (file->f_flags & O_SYNC) { 707 if (file->f_flags & O_DSYNC)
712 flags = _PAGE_CACHE_UC_MINUS; 708 flags = _PAGE_CACHE_UC_MINUS;
713 }
714 709
715#ifdef CONFIG_X86_32 710#ifdef CONFIG_X86_32
716 /* 711 /*
@@ -1018,8 +1013,10 @@ static const struct file_operations memtype_fops = {
1018 1013
1019static int __init pat_memtype_list_init(void) 1014static int __init pat_memtype_list_init(void)
1020{ 1015{
1021 debugfs_create_file("pat_memtype_list", S_IRUSR, arch_debugfs_dir, 1016 if (pat_enabled) {
1022 NULL, &memtype_fops); 1017 debugfs_create_file("pat_memtype_list", S_IRUSR,
1018 arch_debugfs_dir, NULL, &memtype_fops);
1019 }
1023 return 0; 1020 return 0;
1024} 1021}
1025 1022
diff --git a/arch/x86/mm/setup_nx.c b/arch/x86/mm/setup_nx.c
index 513d8ed5d2ec..a3250aa34086 100644
--- a/arch/x86/mm/setup_nx.c
+++ b/arch/x86/mm/setup_nx.c
@@ -3,10 +3,8 @@
3#include <linux/init.h> 3#include <linux/init.h>
4 4
5#include <asm/pgtable.h> 5#include <asm/pgtable.h>
6#include <asm/proto.h>
6 7
7int nx_enabled;
8
9#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
10static int disable_nx __cpuinitdata; 8static int disable_nx __cpuinitdata;
11 9
12/* 10/*
@@ -22,48 +20,41 @@ static int __init noexec_setup(char *str)
22 if (!str) 20 if (!str)
23 return -EINVAL; 21 return -EINVAL;
24 if (!strncmp(str, "on", 2)) { 22 if (!strncmp(str, "on", 2)) {
25 __supported_pte_mask |= _PAGE_NX;
26 disable_nx = 0; 23 disable_nx = 0;
27 } else if (!strncmp(str, "off", 3)) { 24 } else if (!strncmp(str, "off", 3)) {
28 disable_nx = 1; 25 disable_nx = 1;
29 __supported_pte_mask &= ~_PAGE_NX;
30 } 26 }
27 x86_configure_nx();
31 return 0; 28 return 0;
32} 29}
33early_param("noexec", noexec_setup); 30early_param("noexec", noexec_setup);
34#endif
35 31
36#ifdef CONFIG_X86_PAE 32void __cpuinit x86_configure_nx(void)
37void __init set_nx(void)
38{ 33{
39 unsigned int v[4], l, h; 34 if (cpu_has_nx && !disable_nx)
40 35 __supported_pte_mask |= _PAGE_NX;
41 if (cpu_has_pae && (cpuid_eax(0x80000000) > 0x80000001)) { 36 else
42 cpuid(0x80000001, &v[0], &v[1], &v[2], &v[3]); 37 __supported_pte_mask &= ~_PAGE_NX;
38}
43 39
44 if ((v[3] & (1 << 20)) && !disable_nx) { 40void __init x86_report_nx(void)
45 rdmsr(MSR_EFER, l, h); 41{
46 l |= EFER_NX; 42 if (!cpu_has_nx) {
47 wrmsr(MSR_EFER, l, h); 43 printk(KERN_NOTICE "Notice: NX (Execute Disable) protection "
48 nx_enabled = 1; 44 "missing in CPU or disabled in BIOS!\n");
49 __supported_pte_mask |= _PAGE_NX; 45 } else {
46#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
47 if (disable_nx) {
48 printk(KERN_INFO "NX (Execute Disable) protection: "
49 "disabled by kernel command line option\n");
50 } else {
51 printk(KERN_INFO "NX (Execute Disable) protection: "
52 "active\n");
50 } 53 }
51 }
52}
53#else 54#else
54void set_nx(void) 55 /* 32bit non-PAE kernel, NX cannot be used */
55{ 56 printk(KERN_NOTICE "Notice: NX (Execute Disable) protection "
56} 57 "cannot be enabled: non-PAE kernel!\n");
57#endif 58#endif
58 59 }
59#ifdef CONFIG_X86_64
60void __cpuinit check_efer(void)
61{
62 unsigned long efer;
63
64 rdmsrl(MSR_EFER, efer);
65 if (!(efer & EFER_NX) || disable_nx)
66 __supported_pte_mask &= ~_PAGE_NX;
67} 60}
68#endif
69
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index 9d7ce96e5a5c..d89075489664 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -290,8 +290,6 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
290 290
291 printk(KERN_INFO "SRAT: Node %u PXM %u %lx-%lx\n", node, pxm, 291 printk(KERN_INFO "SRAT: Node %u PXM %u %lx-%lx\n", node, pxm,
292 start, end); 292 start, end);
293 e820_register_active_regions(node, start >> PAGE_SHIFT,
294 end >> PAGE_SHIFT);
295 293
296 if (ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) { 294 if (ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) {
297 update_nodes_add(node, start, end); 295 update_nodes_add(node, start, end);
@@ -338,6 +336,19 @@ static int __init nodes_cover_memory(const struct bootnode *nodes)
338 336
339void __init acpi_numa_arch_fixup(void) {} 337void __init acpi_numa_arch_fixup(void) {}
340 338
339int __init acpi_get_nodes(struct bootnode *physnodes)
340{
341 int i;
342 int ret = 0;
343
344 for_each_node_mask(i, nodes_parsed) {
345 physnodes[ret].start = nodes[i].start;
346 physnodes[ret].end = nodes[i].end;
347 ret++;
348 }
349 return ret;
350}
351
341/* Use the information discovered above to actually set up the nodes. */ 352/* Use the information discovered above to actually set up the nodes. */
342int __init acpi_scan_nodes(unsigned long start, unsigned long end) 353int __init acpi_scan_nodes(unsigned long start, unsigned long end)
343{ 354{
@@ -350,11 +361,6 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end)
350 for (i = 0; i < MAX_NUMNODES; i++) 361 for (i = 0; i < MAX_NUMNODES; i++)
351 cutoff_node(i, start, end); 362 cutoff_node(i, start, end);
352 363
353 if (!nodes_cover_memory(nodes)) {
354 bad_srat();
355 return -1;
356 }
357
358 memnode_shift = compute_hash_shift(node_memblk_range, num_node_memblks, 364 memnode_shift = compute_hash_shift(node_memblk_range, num_node_memblks,
359 memblk_nodeid); 365 memblk_nodeid);
360 if (memnode_shift < 0) { 366 if (memnode_shift < 0) {
@@ -364,6 +370,14 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end)
364 return -1; 370 return -1;
365 } 371 }
366 372
373 for_each_node_mask(i, nodes_parsed)
374 e820_register_active_regions(i, nodes[i].start >> PAGE_SHIFT,
375 nodes[i].end >> PAGE_SHIFT);
376 if (!nodes_cover_memory(nodes)) {
377 bad_srat();
378 return -1;
379 }
380
367 /* Account for nodes with cpus and no memory */ 381 /* Account for nodes with cpus and no memory */
368 nodes_or(node_possible_map, nodes_parsed, cpu_nodes_parsed); 382 nodes_or(node_possible_map, nodes_parsed, cpu_nodes_parsed);
369 383
@@ -454,7 +468,6 @@ void __init acpi_fake_nodes(const struct bootnode *fake_nodes, int num_nodes)
454 for (i = 0; i < num_nodes; i++) 468 for (i = 0; i < num_nodes; i++)
455 if (fake_nodes[i].start != fake_nodes[i].end) 469 if (fake_nodes[i].start != fake_nodes[i].end)
456 node_set(i, nodes_parsed); 470 node_set(i, nodes_parsed);
457 WARN_ON(!nodes_cover_memory(fake_nodes));
458} 471}
459 472
460static int null_slit_node_compare(int a, int b) 473static int null_slit_node_compare(int a, int b)
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 36fe08eeb5c3..65b58e4b0b8b 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -8,6 +8,7 @@
8 8
9#include <asm/tlbflush.h> 9#include <asm/tlbflush.h>
10#include <asm/mmu_context.h> 10#include <asm/mmu_context.h>
11#include <asm/cache.h>
11#include <asm/apic.h> 12#include <asm/apic.h>
12#include <asm/uv/uv.h> 13#include <asm/uv/uv.h>
13 14
@@ -43,7 +44,7 @@ union smp_flush_state {
43 spinlock_t tlbstate_lock; 44 spinlock_t tlbstate_lock;
44 DECLARE_BITMAP(flush_cpumask, NR_CPUS); 45 DECLARE_BITMAP(flush_cpumask, NR_CPUS);
45 }; 46 };
46 char pad[CONFIG_X86_INTERNODE_CACHE_BYTES]; 47 char pad[INTERNODE_CACHE_BYTES];
47} ____cacheline_internodealigned_in_smp; 48} ____cacheline_internodealigned_in_smp;
48 49
49/* State is put into the per CPU data section, but padded 50/* State is put into the per CPU data section, but padded
diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile
index d49202e740ea..564b008a51c7 100644
--- a/arch/x86/pci/Makefile
+++ b/arch/x86/pci/Makefile
@@ -15,3 +15,8 @@ obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
15 15
16obj-y += common.o early.o 16obj-y += common.o early.o
17obj-y += amd_bus.o 17obj-y += amd_bus.o
18obj-$(CONFIG_X86_64) += bus_numa.o intel_bus.o
19
20ifeq ($(CONFIG_PCI_DEBUG),y)
21EXTRA_CFLAGS += -DDEBUG
22endif
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 1014eb4bfc37..959e548a7039 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -7,6 +7,7 @@
7#include <asm/pci_x86.h> 7#include <asm/pci_x86.h>
8 8
9struct pci_root_info { 9struct pci_root_info {
10 struct acpi_device *bridge;
10 char *name; 11 char *name;
11 unsigned int res_num; 12 unsigned int res_num;
12 struct resource *res; 13 struct resource *res;
@@ -58,6 +59,30 @@ bus_has_transparent_bridge(struct pci_bus *bus)
58 return false; 59 return false;
59} 60}
60 61
62static void
63align_resource(struct acpi_device *bridge, struct resource *res)
64{
65 int align = (res->flags & IORESOURCE_MEM) ? 16 : 4;
66
67 /*
68 * Host bridge windows are not BARs, but the decoders on the PCI side
69 * that claim this address space have starting alignment and length
70 * constraints, so fix any obvious BIOS goofs.
71 */
72 if (!IS_ALIGNED(res->start, align)) {
73 dev_printk(KERN_DEBUG, &bridge->dev,
74 "host bridge window %pR invalid; "
75 "aligning start to %d-byte boundary\n", res, align);
76 res->start &= ~(align - 1);
77 }
78 if (!IS_ALIGNED(res->end + 1, align)) {
79 dev_printk(KERN_DEBUG, &bridge->dev,
80 "host bridge window %pR invalid; "
81 "aligning end to %d-byte boundary\n", res, align);
82 res->end = ALIGN(res->end, align) - 1;
83 }
84}
85
61static acpi_status 86static acpi_status
62setup_resource(struct acpi_resource *acpi_res, void *data) 87setup_resource(struct acpi_resource *acpi_res, void *data)
63{ 88{
@@ -91,11 +116,12 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
91 start = addr.minimum + addr.translation_offset; 116 start = addr.minimum + addr.translation_offset;
92 end = start + addr.address_length - 1; 117 end = start + addr.address_length - 1;
93 if (info->res_num >= max_root_bus_resources) { 118 if (info->res_num >= max_root_bus_resources) {
94 printk(KERN_WARNING "PCI: Failed to allocate 0x%lx-0x%lx " 119 if (pci_probe & PCI_USE__CRS)
95 "from %s for %s due to _CRS returning more than " 120 printk(KERN_WARNING "PCI: Failed to allocate "
96 "%d resource descriptors\n", (unsigned long) start, 121 "0x%lx-0x%lx from %s for %s due to _CRS "
97 (unsigned long) end, root->name, info->name, 122 "returning more than %d resource descriptors\n",
98 max_root_bus_resources); 123 (unsigned long) start, (unsigned long) end,
124 root->name, info->name, max_root_bus_resources);
99 return AE_OK; 125 return AE_OK;
100 } 126 }
101 127
@@ -105,14 +131,28 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
105 res->start = start; 131 res->start = start;
106 res->end = end; 132 res->end = end;
107 res->child = NULL; 133 res->child = NULL;
134 align_resource(info->bridge, res);
135
136 if (!(pci_probe & PCI_USE__CRS)) {
137 dev_printk(KERN_DEBUG, &info->bridge->dev,
138 "host bridge window %pR (ignored)\n", res);
139 return AE_OK;
140 }
108 141
109 if (insert_resource(root, res)) { 142 if (insert_resource(root, res)) {
110 printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx " 143 dev_err(&info->bridge->dev,
111 "from %s for %s\n", (unsigned long) res->start, 144 "can't allocate host bridge window %pR\n", res);
112 (unsigned long) res->end, root->name, info->name);
113 } else { 145 } else {
114 info->bus->resource[info->res_num] = res; 146 info->bus->resource[info->res_num] = res;
115 info->res_num++; 147 info->res_num++;
148 if (addr.translation_offset)
149 dev_info(&info->bridge->dev, "host bridge window %pR "
150 "(PCI address [%#llx-%#llx])\n",
151 res, res->start - addr.translation_offset,
152 res->end - addr.translation_offset);
153 else
154 dev_info(&info->bridge->dev,
155 "host bridge window %pR\n", res);
116 } 156 }
117 return AE_OK; 157 return AE_OK;
118} 158}
@@ -124,6 +164,12 @@ get_current_resources(struct acpi_device *device, int busnum,
124 struct pci_root_info info; 164 struct pci_root_info info;
125 size_t size; 165 size_t size;
126 166
167 if (!(pci_probe & PCI_USE__CRS))
168 dev_info(&device->dev,
169 "ignoring host bridge windows from ACPI; "
170 "boot with \"pci=use_crs\" to use them\n");
171
172 info.bridge = device;
127 info.bus = bus; 173 info.bus = bus;
128 info.res_num = 0; 174 info.res_num = 0;
129 acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource, 175 acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
@@ -163,8 +209,9 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
163#endif 209#endif
164 210
165 if (domain && !pci_domains_supported) { 211 if (domain && !pci_domains_supported) {
166 printk(KERN_WARNING "PCI: Multiple domains not supported " 212 printk(KERN_WARNING "pci_bus %04x:%02x: "
167 "(dom %d, bus %d)\n", domain, busnum); 213 "ignored (multiple domains not supported)\n",
214 domain, busnum);
168 return NULL; 215 return NULL;
169 } 216 }
170 217
@@ -188,7 +235,8 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
188 */ 235 */
189 sd = kzalloc(sizeof(*sd), GFP_KERNEL); 236 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
190 if (!sd) { 237 if (!sd) {
191 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum); 238 printk(KERN_WARNING "pci_bus %04x:%02x: "
239 "ignored (out of memory)\n", domain, busnum);
192 return NULL; 240 return NULL;
193 } 241 }
194 242
@@ -209,9 +257,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
209 } else { 257 } else {
210 bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd); 258 bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd);
211 if (bus) { 259 if (bus) {
212 if (pci_probe & PCI_USE__CRS) 260 get_current_resources(device, busnum, domain, bus);
213 get_current_resources(device, busnum, domain,
214 bus);
215 bus->subordinate = pci_scan_child_bus(bus); 261 bus->subordinate = pci_scan_child_bus(bus);
216 } 262 }
217 } 263 }
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index 572ee9782f2a..95ecbd495955 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -6,10 +6,10 @@
6 6
7#ifdef CONFIG_X86_64 7#ifdef CONFIG_X86_64
8#include <asm/pci-direct.h> 8#include <asm/pci-direct.h>
9#include <asm/mpspec.h>
10#include <linux/cpumask.h>
11#endif 9#endif
12 10
11#include "bus_numa.h"
12
13/* 13/*
14 * This discovers the pcibus <-> node mapping on AMD K8. 14 * This discovers the pcibus <-> node mapping on AMD K8.
15 * also get peer root bus resource for io,mmio 15 * also get peer root bus resource for io,mmio
@@ -17,67 +17,6 @@
17 17
18#ifdef CONFIG_X86_64 18#ifdef CONFIG_X86_64
19 19
20/*
21 * sub bus (transparent) will use entres from 3 to store extra from root,
22 * so need to make sure have enought slot there, increase PCI_BUS_NUM_RESOURCES?
23 */
24#define RES_NUM 16
25struct pci_root_info {
26 char name[12];
27 unsigned int res_num;
28 struct resource res[RES_NUM];
29 int bus_min;
30 int bus_max;
31 int node;
32 int link;
33};
34
35/* 4 at this time, it may become to 32 */
36#define PCI_ROOT_NR 4
37static int pci_root_num;
38static struct pci_root_info pci_root_info[PCI_ROOT_NR];
39
40void x86_pci_root_bus_res_quirks(struct pci_bus *b)
41{
42 int i;
43 int j;
44 struct pci_root_info *info;
45
46 /* don't go for it if _CRS is used already */
47 if (b->resource[0] != &ioport_resource ||
48 b->resource[1] != &iomem_resource)
49 return;
50
51 /* if only one root bus, don't need to anything */
52 if (pci_root_num < 2)
53 return;
54
55 for (i = 0; i < pci_root_num; i++) {
56 if (pci_root_info[i].bus_min == b->number)
57 break;
58 }
59
60 if (i == pci_root_num)
61 return;
62
63 printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n",
64 b->number);
65
66 info = &pci_root_info[i];
67 for (j = 0; j < info->res_num; j++) {
68 struct resource *res;
69 struct resource *root;
70
71 res = &info->res[j];
72 b->resource[j] = res;
73 if (res->flags & IORESOURCE_IO)
74 root = &ioport_resource;
75 else
76 root = &iomem_resource;
77 insert_resource(root, res);
78 }
79}
80
81#define RANGE_NUM 16 20#define RANGE_NUM 16
82 21
83struct res_range { 22struct res_range {
@@ -130,52 +69,6 @@ static void __init update_range(struct res_range *range, size_t start,
130 } 69 }
131} 70}
132 71
133static void __init update_res(struct pci_root_info *info, size_t start,
134 size_t end, unsigned long flags, int merge)
135{
136 int i;
137 struct resource *res;
138
139 if (!merge)
140 goto addit;
141
142 /* try to merge it with old one */
143 for (i = 0; i < info->res_num; i++) {
144 size_t final_start, final_end;
145 size_t common_start, common_end;
146
147 res = &info->res[i];
148 if (res->flags != flags)
149 continue;
150
151 common_start = max((size_t)res->start, start);
152 common_end = min((size_t)res->end, end);
153 if (common_start > common_end + 1)
154 continue;
155
156 final_start = min((size_t)res->start, start);
157 final_end = max((size_t)res->end, end);
158
159 res->start = final_start;
160 res->end = final_end;
161 return;
162 }
163
164addit:
165
166 /* need to add that */
167 if (info->res_num >= RES_NUM)
168 return;
169
170 res = &info->res[info->res_num];
171 res->name = info->name;
172 res->flags = flags;
173 res->start = start;
174 res->end = end;
175 res->child = NULL;
176 info->res_num++;
177}
178
179struct pci_hostbridge_probe { 72struct pci_hostbridge_probe {
180 u32 bus; 73 u32 bus;
181 u32 slot; 74 u32 slot;
@@ -230,7 +123,6 @@ static int __init early_fill_mp_bus_info(void)
230 int j; 123 int j;
231 unsigned bus; 124 unsigned bus;
232 unsigned slot; 125 unsigned slot;
233 int found;
234 int node; 126 int node;
235 int link; 127 int link;
236 int def_node; 128 int def_node;
@@ -247,7 +139,7 @@ static int __init early_fill_mp_bus_info(void)
247 if (!early_pci_allowed()) 139 if (!early_pci_allowed())
248 return -1; 140 return -1;
249 141
250 found = 0; 142 found_all_numa_early = 0;
251 for (i = 0; i < ARRAY_SIZE(pci_probes); i++) { 143 for (i = 0; i < ARRAY_SIZE(pci_probes); i++) {
252 u32 id; 144 u32 id;
253 u16 device; 145 u16 device;
@@ -261,12 +153,12 @@ static int __init early_fill_mp_bus_info(void)
261 device = (id>>16) & 0xffff; 153 device = (id>>16) & 0xffff;
262 if (pci_probes[i].vendor == vendor && 154 if (pci_probes[i].vendor == vendor &&
263 pci_probes[i].device == device) { 155 pci_probes[i].device == device) {
264 found = 1; 156 found_all_numa_early = 1;
265 break; 157 break;
266 } 158 }
267 } 159 }
268 160
269 if (!found) 161 if (!found_all_numa_early)
270 return 0; 162 return 0;
271 163
272 pci_root_num = 0; 164 pci_root_num = 0;
@@ -488,7 +380,7 @@ static int __init early_fill_mp_bus_info(void)
488 info = &pci_root_info[i]; 380 info = &pci_root_info[i];
489 res_num = info->res_num; 381 res_num = info->res_num;
490 busnum = info->bus_min; 382 busnum = info->bus_min;
491 printk(KERN_DEBUG "bus: [%02x,%02x] on node %x link %x\n", 383 printk(KERN_DEBUG "bus: [%02x, %02x] on node %x link %x\n",
492 info->bus_min, info->bus_max, info->node, info->link); 384 info->bus_min, info->bus_max, info->node, info->link);
493 for (j = 0; j < res_num; j++) { 385 for (j = 0; j < res_num; j++) {
494 res = &info->res[j]; 386 res = &info->res[j];
diff --git a/arch/x86/pci/bus_numa.c b/arch/x86/pci/bus_numa.c
new file mode 100644
index 000000000000..145df00e0387
--- /dev/null
+++ b/arch/x86/pci/bus_numa.c
@@ -0,0 +1,101 @@
1#include <linux/init.h>
2#include <linux/pci.h>
3
4#include "bus_numa.h"
5
6int pci_root_num;
7struct pci_root_info pci_root_info[PCI_ROOT_NR];
8int found_all_numa_early;
9
10void x86_pci_root_bus_res_quirks(struct pci_bus *b)
11{
12 int i;
13 int j;
14 struct pci_root_info *info;
15
16 /* don't go for it if _CRS is used already */
17 if (b->resource[0] != &ioport_resource ||
18 b->resource[1] != &iomem_resource)
19 return;
20
21 if (!pci_root_num)
22 return;
23
24 /* for amd, if only one root bus, don't need to do anything */
25 if (pci_root_num < 2 && found_all_numa_early)
26 return;
27
28 for (i = 0; i < pci_root_num; i++) {
29 if (pci_root_info[i].bus_min == b->number)
30 break;
31 }
32
33 if (i == pci_root_num)
34 return;
35
36 printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n",
37 b->number);
38
39 info = &pci_root_info[i];
40 for (j = 0; j < info->res_num; j++) {
41 struct resource *res;
42 struct resource *root;
43
44 res = &info->res[j];
45 b->resource[j] = res;
46 if (res->flags & IORESOURCE_IO)
47 root = &ioport_resource;
48 else
49 root = &iomem_resource;
50 insert_resource(root, res);
51 }
52}
53
54void __init update_res(struct pci_root_info *info, size_t start,
55 size_t end, unsigned long flags, int merge)
56{
57 int i;
58 struct resource *res;
59
60 if (start > end)
61 return;
62
63 if (!merge)
64 goto addit;
65
66 /* try to merge it with old one */
67 for (i = 0; i < info->res_num; i++) {
68 size_t final_start, final_end;
69 size_t common_start, common_end;
70
71 res = &info->res[i];
72 if (res->flags != flags)
73 continue;
74
75 common_start = max((size_t)res->start, start);
76 common_end = min((size_t)res->end, end);
77 if (common_start > common_end + 1)
78 continue;
79
80 final_start = min((size_t)res->start, start);
81 final_end = max((size_t)res->end, end);
82
83 res->start = final_start;
84 res->end = final_end;
85 return;
86 }
87
88addit:
89
90 /* need to add that */
91 if (info->res_num >= RES_NUM)
92 return;
93
94 res = &info->res[info->res_num];
95 res->name = info->name;
96 res->flags = flags;
97 res->start = start;
98 res->end = end;
99 res->child = NULL;
100 info->res_num++;
101}
diff --git a/arch/x86/pci/bus_numa.h b/arch/x86/pci/bus_numa.h
new file mode 100644
index 000000000000..adbc23fe82ac
--- /dev/null
+++ b/arch/x86/pci/bus_numa.h
@@ -0,0 +1,27 @@
1#ifdef CONFIG_X86_64
2
3/*
4 * sub bus (transparent) will use entres from 3 to store extra from
5 * root, so need to make sure we have enough slot there, Should we
6 * increase PCI_BUS_NUM_RESOURCES?
7 */
8#define RES_NUM 16
9struct pci_root_info {
10 char name[12];
11 unsigned int res_num;
12 struct resource res[RES_NUM];
13 int bus_min;
14 int bus_max;
15 int node;
16 int link;
17};
18
19/* 4 at this time, it may become to 32 */
20#define PCI_ROOT_NR 4
21extern int pci_root_num;
22extern struct pci_root_info pci_root_info[PCI_ROOT_NR];
23extern int found_all_numa_early;
24
25extern void update_res(struct pci_root_info *info, size_t start,
26 size_t end, unsigned long flags, int merge);
27#endif
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 1331fcf26143..d2552c68e94d 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -410,8 +410,6 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)
410 return bus; 410 return bus;
411} 411}
412 412
413extern u8 pci_cache_line_size;
414
415int __init pcibios_init(void) 413int __init pcibios_init(void)
416{ 414{
417 struct cpuinfo_x86 *c = &boot_cpu_data; 415 struct cpuinfo_x86 *c = &boot_cpu_data;
@@ -422,15 +420,19 @@ int __init pcibios_init(void)
422 } 420 }
423 421
424 /* 422 /*
425 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8 423 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
426 * and P4. It's also good for 386/486s (which actually have 16) 424 * (For older CPUs that don't support cpuid, we se it to 32 bytes
425 * It's also good for 386/486s (which actually have 16)
427 * as quite a few PCI devices do not support smaller values. 426 * as quite a few PCI devices do not support smaller values.
428 */ 427 */
429 pci_cache_line_size = 32 >> 2; 428 if (c->x86_clflush_size > 0) {
430 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD) 429 pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
431 pci_cache_line_size = 64 >> 2; /* K7 & K8 */ 430 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
432 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL) 431 pci_dfl_cache_line_size << 2);
433 pci_cache_line_size = 128 >> 2; /* P4 */ 432 } else {
433 pci_dfl_cache_line_size = 32 >> 2;
434 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
435 }
434 436
435 pcibios_resource_survey(); 437 pcibios_resource_survey();
436 438
diff --git a/arch/x86/pci/early.c b/arch/x86/pci/early.c
index aaf26ae58cd5..d1067d539bee 100644
--- a/arch/x86/pci/early.c
+++ b/arch/x86/pci/early.c
@@ -12,8 +12,6 @@ u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset)
12 u32 v; 12 u32 v;
13 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 13 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
14 v = inl(0xcfc); 14 v = inl(0xcfc);
15 if (v != 0xffffffff)
16 pr_debug("%x reading 4 from %x: %x\n", slot, offset, v);
17 return v; 15 return v;
18} 16}
19 17
@@ -22,7 +20,6 @@ u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset)
22 u8 v; 20 u8 v;
23 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 21 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
24 v = inb(0xcfc + (offset&3)); 22 v = inb(0xcfc + (offset&3));
25 pr_debug("%x reading 1 from %x: %x\n", slot, offset, v);
26 return v; 23 return v;
27} 24}
28 25
@@ -31,28 +28,24 @@ u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset)
31 u16 v; 28 u16 v;
32 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 29 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
33 v = inw(0xcfc + (offset&2)); 30 v = inw(0xcfc + (offset&2));
34 pr_debug("%x reading 2 from %x: %x\n", slot, offset, v);
35 return v; 31 return v;
36} 32}
37 33
38void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, 34void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset,
39 u32 val) 35 u32 val)
40{ 36{
41 pr_debug("%x writing to %x: %x\n", slot, offset, val);
42 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 37 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
43 outl(val, 0xcfc); 38 outl(val, 0xcfc);
44} 39}
45 40
46void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) 41void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val)
47{ 42{
48 pr_debug("%x writing to %x: %x\n", slot, offset, val);
49 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 43 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
50 outb(val, 0xcfc + (offset&3)); 44 outb(val, 0xcfc + (offset&3));
51} 45}
52 46
53void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val) 47void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val)
54{ 48{
55 pr_debug("%x writing to %x: %x\n", slot, offset, val);
56 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 49 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
57 outw(val, 0xcfc + (offset&2)); 50 outw(val, 0xcfc + (offset&2));
58} 51}
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index b22d13b0c71d..5dc9e8c63fcd 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -129,7 +129,9 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
129 continue; 129 continue;
130 if (!r->start || 130 if (!r->start ||
131 pci_claim_resource(dev, idx) < 0) { 131 pci_claim_resource(dev, idx) < 0) {
132 dev_info(&dev->dev, "BAR %d: can't allocate resource\n", idx); 132 dev_info(&dev->dev,
133 "can't reserve window %pR\n",
134 r);
133 /* 135 /*
134 * Something is wrong with the region. 136 * Something is wrong with the region.
135 * Invalidate the resource to prevent 137 * Invalidate the resource to prevent
@@ -144,16 +146,29 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
144 } 146 }
145} 147}
146 148
149struct pci_check_idx_range {
150 int start;
151 int end;
152};
153
147static void __init pcibios_allocate_resources(int pass) 154static void __init pcibios_allocate_resources(int pass)
148{ 155{
149 struct pci_dev *dev = NULL; 156 struct pci_dev *dev = NULL;
150 int idx, disabled; 157 int idx, disabled, i;
151 u16 command; 158 u16 command;
152 struct resource *r; 159 struct resource *r;
153 160
161 struct pci_check_idx_range idx_range[] = {
162 { PCI_STD_RESOURCES, PCI_STD_RESOURCE_END },
163#ifdef CONFIG_PCI_IOV
164 { PCI_IOV_RESOURCES, PCI_IOV_RESOURCE_END },
165#endif
166 };
167
154 for_each_pci_dev(dev) { 168 for_each_pci_dev(dev) {
155 pci_read_config_word(dev, PCI_COMMAND, &command); 169 pci_read_config_word(dev, PCI_COMMAND, &command);
156 for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) { 170 for (i = 0; i < ARRAY_SIZE(idx_range); i++)
171 for (idx = idx_range[i].start; idx <= idx_range[i].end; idx++) {
157 r = &dev->resource[idx]; 172 r = &dev->resource[idx];
158 if (r->parent) /* Already allocated */ 173 if (r->parent) /* Already allocated */
159 continue; 174 continue;
@@ -164,12 +179,12 @@ static void __init pcibios_allocate_resources(int pass)
164 else 179 else
165 disabled = !(command & PCI_COMMAND_MEMORY); 180 disabled = !(command & PCI_COMMAND_MEMORY);
166 if (pass == disabled) { 181 if (pass == disabled) {
167 dev_dbg(&dev->dev, "resource %#08llx-%#08llx (f=%lx, d=%d, p=%d)\n", 182 dev_dbg(&dev->dev,
168 (unsigned long long) r->start, 183 "BAR %d: reserving %pr (d=%d, p=%d)\n",
169 (unsigned long long) r->end, 184 idx, r, disabled, pass);
170 r->flags, disabled, pass);
171 if (pci_claim_resource(dev, idx) < 0) { 185 if (pci_claim_resource(dev, idx) < 0) {
172 dev_info(&dev->dev, "BAR %d: can't allocate resource\n", idx); 186 dev_info(&dev->dev,
187 "can't reserve %pR\n", r);
173 /* We'll assign a new address later */ 188 /* We'll assign a new address later */
174 r->end -= r->start; 189 r->end -= r->start;
175 r->start = 0; 190 r->start = 0;
@@ -182,7 +197,7 @@ static void __init pcibios_allocate_resources(int pass)
182 /* Turn the ROM off, leave the resource region, 197 /* Turn the ROM off, leave the resource region,
183 * but keep it unregistered. */ 198 * but keep it unregistered. */
184 u32 reg; 199 u32 reg;
185 dev_dbg(&dev->dev, "disabling ROM\n"); 200 dev_dbg(&dev->dev, "disabling ROM %pR\n", r);
186 r->flags &= ~IORESOURCE_ROM_ENABLE; 201 r->flags &= ~IORESOURCE_ROM_ENABLE;
187 pci_read_config_dword(dev, 202 pci_read_config_dword(dev,
188 dev->rom_base_reg, &reg); 203 dev->rom_base_reg, &reg);
@@ -282,6 +297,15 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
282 return -EINVAL; 297 return -EINVAL;
283 298
284 prot = pgprot_val(vma->vm_page_prot); 299 prot = pgprot_val(vma->vm_page_prot);
300
301 /*
302 * Return error if pat is not enabled and write_combine is requested.
303 * Caller can followup with UC MINUS request and add a WC mtrr if there
304 * is a free mtrr slot.
305 */
306 if (!pat_enabled && write_combine)
307 return -EINVAL;
308
285 if (pat_enabled && write_combine) 309 if (pat_enabled && write_combine)
286 prot |= _PAGE_CACHE_WC; 310 prot |= _PAGE_CACHE_WC;
287 else if (pat_enabled || boot_cpu_data.x86 > 3) 311 else if (pat_enabled || boot_cpu_data.x86 > 3)
diff --git a/arch/x86/pci/intel_bus.c b/arch/x86/pci/intel_bus.c
new file mode 100644
index 000000000000..b7a55dc55d13
--- /dev/null
+++ b/arch/x86/pci/intel_bus.c
@@ -0,0 +1,90 @@
1/*
2 * to read io range from IOH pci conf, need to do it after mmconfig is there
3 */
4
5#include <linux/delay.h>
6#include <linux/dmi.h>
7#include <linux/pci.h>
8#include <linux/init.h>
9#include <asm/pci_x86.h>
10
11#include "bus_numa.h"
12
13static inline void print_ioh_resources(struct pci_root_info *info)
14{
15 int res_num;
16 int busnum;
17 int i;
18
19 printk(KERN_DEBUG "IOH bus: [%02x, %02x]\n",
20 info->bus_min, info->bus_max);
21 res_num = info->res_num;
22 busnum = info->bus_min;
23 for (i = 0; i < res_num; i++) {
24 struct resource *res;
25
26 res = &info->res[i];
27 printk(KERN_DEBUG "IOH bus: %02x index %x %s: [%llx, %llx]\n",
28 busnum, i,
29 (res->flags & IORESOURCE_IO) ? "io port" :
30 "mmio",
31 res->start, res->end);
32 }
33}
34
35#define IOH_LIO 0x108
36#define IOH_LMMIOL 0x10c
37#define IOH_LMMIOH 0x110
38#define IOH_LMMIOH_BASEU 0x114
39#define IOH_LMMIOH_LIMITU 0x118
40#define IOH_LCFGBUS 0x11c
41
42static void __devinit pci_root_bus_res(struct pci_dev *dev)
43{
44 u16 word;
45 u32 dword;
46 struct pci_root_info *info;
47 u16 io_base, io_end;
48 u32 mmiol_base, mmiol_end;
49 u64 mmioh_base, mmioh_end;
50 int bus_base, bus_end;
51
52 if (pci_root_num >= PCI_ROOT_NR) {
53 printk(KERN_DEBUG "intel_bus.c: PCI_ROOT_NR is too small\n");
54 return;
55 }
56
57 info = &pci_root_info[pci_root_num];
58 pci_root_num++;
59
60 pci_read_config_word(dev, IOH_LCFGBUS, &word);
61 bus_base = (word & 0xff);
62 bus_end = (word & 0xff00) >> 8;
63 sprintf(info->name, "PCI Bus #%02x", bus_base);
64 info->bus_min = bus_base;
65 info->bus_max = bus_end;
66
67 pci_read_config_word(dev, IOH_LIO, &word);
68 io_base = (word & 0xf0) << (12 - 4);
69 io_end = (word & 0xf000) | 0xfff;
70 update_res(info, io_base, io_end, IORESOURCE_IO, 0);
71
72 pci_read_config_dword(dev, IOH_LMMIOL, &dword);
73 mmiol_base = (dword & 0xff00) << (24 - 8);
74 mmiol_end = (dword & 0xff000000) | 0xffffff;
75 update_res(info, mmiol_base, mmiol_end, IORESOURCE_MEM, 0);
76
77 pci_read_config_dword(dev, IOH_LMMIOH, &dword);
78 mmioh_base = ((u64)(dword & 0xfc00)) << (26 - 10);
79 mmioh_end = ((u64)(dword & 0xfc000000) | 0x3ffffff);
80 pci_read_config_dword(dev, IOH_LMMIOH_BASEU, &dword);
81 mmioh_base |= ((u64)(dword & 0x7ffff)) << 32;
82 pci_read_config_dword(dev, IOH_LMMIOH_LIMITU, &dword);
83 mmioh_end |= ((u64)(dword & 0x7ffff)) << 32;
84 update_res(info, mmioh_base, mmioh_end, IORESOURCE_MEM, 0);
85
86 print_ioh_resources(info);
87}
88
89/* intel IOH */
90DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x342e, pci_root_bus_res);
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 602c172d3bd5..b19d1e54201e 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -15,48 +15,98 @@
15#include <linux/acpi.h> 15#include <linux/acpi.h>
16#include <linux/sfi_acpi.h> 16#include <linux/sfi_acpi.h>
17#include <linux/bitmap.h> 17#include <linux/bitmap.h>
18#include <linux/sort.h> 18#include <linux/dmi.h>
19#include <asm/e820.h> 19#include <asm/e820.h>
20#include <asm/pci_x86.h> 20#include <asm/pci_x86.h>
21#include <asm/acpi.h> 21#include <asm/acpi.h>
22 22
23#define PREFIX "PCI: " 23#define PREFIX "PCI: "
24 24
25/* aperture is up to 256MB but BIOS may reserve less */
26#define MMCONFIG_APER_MIN (2 * 1024*1024)
27#define MMCONFIG_APER_MAX (256 * 1024*1024)
28
29/* Indicate if the mmcfg resources have been placed into the resource table. */ 25/* Indicate if the mmcfg resources have been placed into the resource table. */
30static int __initdata pci_mmcfg_resources_inserted; 26static int __initdata pci_mmcfg_resources_inserted;
31 27
32static __init int extend_mmcfg(int num) 28LIST_HEAD(pci_mmcfg_list);
29
30static __init void pci_mmconfig_remove(struct pci_mmcfg_region *cfg)
33{ 31{
34 struct acpi_mcfg_allocation *new; 32 if (cfg->res.parent)
35 int new_num = pci_mmcfg_config_num + num; 33 release_resource(&cfg->res);
34 list_del(&cfg->list);
35 kfree(cfg);
36}
36 37
37 new = kzalloc(sizeof(pci_mmcfg_config[0]) * new_num, GFP_KERNEL); 38static __init void free_all_mmcfg(void)
38 if (!new) 39{
39 return -1; 40 struct pci_mmcfg_region *cfg, *tmp;
40 41
41 if (pci_mmcfg_config) { 42 pci_mmcfg_arch_free();
42 memcpy(new, pci_mmcfg_config, 43 list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list)
43 sizeof(pci_mmcfg_config[0]) * new_num); 44 pci_mmconfig_remove(cfg);
44 kfree(pci_mmcfg_config); 45}
46
47static __init void list_add_sorted(struct pci_mmcfg_region *new)
48{
49 struct pci_mmcfg_region *cfg;
50
51 /* keep list sorted by segment and starting bus number */
52 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
53 if (cfg->segment > new->segment ||
54 (cfg->segment == new->segment &&
55 cfg->start_bus >= new->start_bus)) {
56 list_add_tail(&new->list, &cfg->list);
57 return;
58 }
45 } 59 }
46 pci_mmcfg_config = new; 60 list_add_tail(&new->list, &pci_mmcfg_list);
61}
47 62
48 return 0; 63static __init struct pci_mmcfg_region *pci_mmconfig_add(int segment, int start,
64 int end, u64 addr)
65{
66 struct pci_mmcfg_region *new;
67 int num_buses;
68 struct resource *res;
69
70 if (addr == 0)
71 return NULL;
72
73 new = kzalloc(sizeof(*new), GFP_KERNEL);
74 if (!new)
75 return NULL;
76
77 new->address = addr;
78 new->segment = segment;
79 new->start_bus = start;
80 new->end_bus = end;
81
82 list_add_sorted(new);
83
84 num_buses = end - start + 1;
85 res = &new->res;
86 res->start = addr + PCI_MMCFG_BUS_OFFSET(start);
87 res->end = addr + PCI_MMCFG_BUS_OFFSET(num_buses) - 1;
88 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
89 snprintf(new->name, PCI_MMCFG_RESOURCE_NAME_LEN,
90 "PCI MMCONFIG %04x [bus %02x-%02x]", segment, start, end);
91 res->name = new->name;
92
93 printk(KERN_INFO PREFIX "MMCONFIG for domain %04x [bus %02x-%02x] at "
94 "%pR (base %#lx)\n", segment, start, end, &new->res,
95 (unsigned long) addr);
96
97 return new;
49} 98}
50 99
51static __init void fill_one_mmcfg(u64 addr, int segment, int start, int end) 100struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus)
52{ 101{
53 int i = pci_mmcfg_config_num; 102 struct pci_mmcfg_region *cfg;
54 103
55 pci_mmcfg_config_num++; 104 list_for_each_entry(cfg, &pci_mmcfg_list, list)
56 pci_mmcfg_config[i].address = addr; 105 if (cfg->segment == segment &&
57 pci_mmcfg_config[i].pci_segment = segment; 106 cfg->start_bus <= bus && bus <= cfg->end_bus)
58 pci_mmcfg_config[i].start_bus_number = start; 107 return cfg;
59 pci_mmcfg_config[i].end_bus_number = end; 108
109 return NULL;
60} 110}
61 111
62static const char __init *pci_mmcfg_e7520(void) 112static const char __init *pci_mmcfg_e7520(void)
@@ -68,11 +118,9 @@ static const char __init *pci_mmcfg_e7520(void)
68 if (win == 0x0000 || win == 0xf000) 118 if (win == 0x0000 || win == 0xf000)
69 return NULL; 119 return NULL;
70 120
71 if (extend_mmcfg(1) == -1) 121 if (pci_mmconfig_add(0, 0, 255, win << 16) == NULL)
72 return NULL; 122 return NULL;
73 123
74 fill_one_mmcfg(win << 16, 0, 0, 255);
75
76 return "Intel Corporation E7520 Memory Controller Hub"; 124 return "Intel Corporation E7520 Memory Controller Hub";
77} 125}
78 126
@@ -114,11 +162,9 @@ static const char __init *pci_mmcfg_intel_945(void)
114 if ((pciexbar & mask) >= 0xf0000000U) 162 if ((pciexbar & mask) >= 0xf0000000U)
115 return NULL; 163 return NULL;
116 164
117 if (extend_mmcfg(1) == -1) 165 if (pci_mmconfig_add(0, 0, (len >> 20) - 1, pciexbar & mask) == NULL)
118 return NULL; 166 return NULL;
119 167
120 fill_one_mmcfg(pciexbar & mask, 0, 0, (len >> 20) - 1);
121
122 return "Intel Corporation 945G/GZ/P/PL Express Memory Controller Hub"; 168 return "Intel Corporation 945G/GZ/P/PL Express Memory Controller Hub";
123} 169}
124 170
@@ -127,7 +173,7 @@ static const char __init *pci_mmcfg_amd_fam10h(void)
127 u32 low, high, address; 173 u32 low, high, address;
128 u64 base, msr; 174 u64 base, msr;
129 int i; 175 int i;
130 unsigned segnbits = 0, busnbits; 176 unsigned segnbits = 0, busnbits, end_bus;
131 177
132 if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF)) 178 if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
133 return NULL; 179 return NULL;
@@ -161,11 +207,13 @@ static const char __init *pci_mmcfg_amd_fam10h(void)
161 busnbits = 8; 207 busnbits = 8;
162 } 208 }
163 209
164 if (extend_mmcfg(1 << segnbits) == -1) 210 end_bus = (1 << busnbits) - 1;
165 return NULL;
166
167 for (i = 0; i < (1 << segnbits); i++) 211 for (i = 0; i < (1 << segnbits); i++)
168 fill_one_mmcfg(base + (1<<28) * i, i, 0, (1 << busnbits) - 1); 212 if (pci_mmconfig_add(i, 0, end_bus,
213 base + (1<<28) * i) == NULL) {
214 free_all_mmcfg();
215 return NULL;
216 }
169 217
170 return "AMD Family 10h NB"; 218 return "AMD Family 10h NB";
171} 219}
@@ -190,7 +238,7 @@ static const char __init *pci_mmcfg_nvidia_mcp55(void)
190 /* 238 /*
191 * do check if amd fam10h already took over 239 * do check if amd fam10h already took over
192 */ 240 */
193 if (!acpi_disabled || pci_mmcfg_config_num || mcp55_checked) 241 if (!acpi_disabled || !list_empty(&pci_mmcfg_list) || mcp55_checked)
194 return NULL; 242 return NULL;
195 243
196 mcp55_checked = true; 244 mcp55_checked = true;
@@ -213,16 +261,14 @@ static const char __init *pci_mmcfg_nvidia_mcp55(void)
213 if (!(extcfg & extcfg_enable_mask)) 261 if (!(extcfg & extcfg_enable_mask))
214 continue; 262 continue;
215 263
216 if (extend_mmcfg(1) == -1)
217 continue;
218
219 size_index = (extcfg & extcfg_size_mask) >> extcfg_size_shift; 264 size_index = (extcfg & extcfg_size_mask) >> extcfg_size_shift;
220 base = extcfg & extcfg_base_mask[size_index]; 265 base = extcfg & extcfg_base_mask[size_index];
221 /* base could > 4G */ 266 /* base could > 4G */
222 base <<= extcfg_base_lshift; 267 base <<= extcfg_base_lshift;
223 start = (extcfg & extcfg_start_mask) >> extcfg_start_shift; 268 start = (extcfg & extcfg_start_mask) >> extcfg_start_shift;
224 end = start + extcfg_sizebus[size_index] - 1; 269 end = start + extcfg_sizebus[size_index] - 1;
225 fill_one_mmcfg(base, 0, start, end); 270 if (pci_mmconfig_add(0, start, end, base) == NULL)
271 continue;
226 mcp55_mmconf_found++; 272 mcp55_mmconf_found++;
227 } 273 }
228 274
@@ -253,45 +299,27 @@ static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initdata = {
253 0x0369, pci_mmcfg_nvidia_mcp55 }, 299 0x0369, pci_mmcfg_nvidia_mcp55 },
254}; 300};
255 301
256static int __init cmp_mmcfg(const void *x1, const void *x2)
257{
258 const typeof(pci_mmcfg_config[0]) *m1 = x1;
259 const typeof(pci_mmcfg_config[0]) *m2 = x2;
260 int start1, start2;
261
262 start1 = m1->start_bus_number;
263 start2 = m2->start_bus_number;
264
265 return start1 - start2;
266}
267
268static void __init pci_mmcfg_check_end_bus_number(void) 302static void __init pci_mmcfg_check_end_bus_number(void)
269{ 303{
270 int i; 304 struct pci_mmcfg_region *cfg, *cfgx;
271 typeof(pci_mmcfg_config[0]) *cfg, *cfgx;
272
273 /* sort them at first */
274 sort(pci_mmcfg_config, pci_mmcfg_config_num,
275 sizeof(pci_mmcfg_config[0]), cmp_mmcfg, NULL);
276 305
277 /* last one*/ 306 /* last one*/
278 if (pci_mmcfg_config_num > 0) { 307 cfg = list_entry(pci_mmcfg_list.prev, typeof(*cfg), list);
279 i = pci_mmcfg_config_num - 1; 308 if (cfg)
280 cfg = &pci_mmcfg_config[i]; 309 if (cfg->end_bus < cfg->start_bus)
281 if (cfg->end_bus_number < cfg->start_bus_number) 310 cfg->end_bus = 255;
282 cfg->end_bus_number = 255;
283 }
284 311
285 /* don't overlap please */ 312 if (list_is_singular(&pci_mmcfg_list))
286 for (i = 0; i < pci_mmcfg_config_num - 1; i++) { 313 return;
287 cfg = &pci_mmcfg_config[i];
288 cfgx = &pci_mmcfg_config[i+1];
289 314
290 if (cfg->end_bus_number < cfg->start_bus_number) 315 /* don't overlap please */
291 cfg->end_bus_number = 255; 316 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
317 if (cfg->end_bus < cfg->start_bus)
318 cfg->end_bus = 255;
292 319
293 if (cfg->end_bus_number >= cfgx->start_bus_number) 320 cfgx = list_entry(cfg->list.next, typeof(*cfg), list);
294 cfg->end_bus_number = cfgx->start_bus_number - 1; 321 if (cfg != cfgx && cfg->end_bus >= cfgx->start_bus)
322 cfg->end_bus = cfgx->start_bus - 1;
295 } 323 }
296} 324}
297 325
@@ -306,8 +334,7 @@ static int __init pci_mmcfg_check_hostbridge(void)
306 if (!raw_pci_ops) 334 if (!raw_pci_ops)
307 return 0; 335 return 0;
308 336
309 pci_mmcfg_config_num = 0; 337 free_all_mmcfg();
310 pci_mmcfg_config = NULL;
311 338
312 for (i = 0; i < ARRAY_SIZE(pci_mmcfg_probes); i++) { 339 for (i = 0; i < ARRAY_SIZE(pci_mmcfg_probes); i++) {
313 bus = pci_mmcfg_probes[i].bus; 340 bus = pci_mmcfg_probes[i].bus;
@@ -322,45 +349,22 @@ static int __init pci_mmcfg_check_hostbridge(void)
322 name = pci_mmcfg_probes[i].probe(); 349 name = pci_mmcfg_probes[i].probe();
323 350
324 if (name) 351 if (name)
325 printk(KERN_INFO "PCI: Found %s with MMCONFIG support.\n", 352 printk(KERN_INFO PREFIX "%s with MMCONFIG support\n",
326 name); 353 name);
327 } 354 }
328 355
329 /* some end_bus_number is crazy, fix it */ 356 /* some end_bus_number is crazy, fix it */
330 pci_mmcfg_check_end_bus_number(); 357 pci_mmcfg_check_end_bus_number();
331 358
332 return pci_mmcfg_config_num != 0; 359 return !list_empty(&pci_mmcfg_list);
333} 360}
334 361
335static void __init pci_mmcfg_insert_resources(void) 362static void __init pci_mmcfg_insert_resources(void)
336{ 363{
337#define PCI_MMCFG_RESOURCE_NAME_LEN 24 364 struct pci_mmcfg_region *cfg;
338 int i;
339 struct resource *res;
340 char *names;
341 unsigned num_buses;
342
343 res = kcalloc(PCI_MMCFG_RESOURCE_NAME_LEN + sizeof(*res),
344 pci_mmcfg_config_num, GFP_KERNEL);
345 if (!res) {
346 printk(KERN_ERR "PCI: Unable to allocate MMCONFIG resources\n");
347 return;
348 }
349 365
350 names = (void *)&res[pci_mmcfg_config_num]; 366 list_for_each_entry(cfg, &pci_mmcfg_list, list)
351 for (i = 0; i < pci_mmcfg_config_num; i++, res++) { 367 insert_resource(&iomem_resource, &cfg->res);
352 struct acpi_mcfg_allocation *cfg = &pci_mmcfg_config[i];
353 num_buses = cfg->end_bus_number - cfg->start_bus_number + 1;
354 res->name = names;
355 snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN,
356 "PCI MMCONFIG %u [%02x-%02x]", cfg->pci_segment,
357 cfg->start_bus_number, cfg->end_bus_number);
358 res->start = cfg->address + (cfg->start_bus_number << 20);
359 res->end = res->start + (num_buses << 20) - 1;
360 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
361 insert_resource(&iomem_resource, res);
362 names += PCI_MMCFG_RESOURCE_NAME_LEN;
363 }
364 368
365 /* Mark that the resources have been inserted. */ 369 /* Mark that the resources have been inserted. */
366 pci_mmcfg_resources_inserted = 1; 370 pci_mmcfg_resources_inserted = 1;
@@ -437,11 +441,12 @@ static int __init is_acpi_reserved(u64 start, u64 end, unsigned not_used)
437typedef int (*check_reserved_t)(u64 start, u64 end, unsigned type); 441typedef int (*check_reserved_t)(u64 start, u64 end, unsigned type);
438 442
439static int __init is_mmconf_reserved(check_reserved_t is_reserved, 443static int __init is_mmconf_reserved(check_reserved_t is_reserved,
440 u64 addr, u64 size, int i, 444 struct pci_mmcfg_region *cfg, int with_e820)
441 typeof(pci_mmcfg_config[0]) *cfg, int with_e820)
442{ 445{
446 u64 addr = cfg->res.start;
447 u64 size = resource_size(&cfg->res);
443 u64 old_size = size; 448 u64 old_size = size;
444 int valid = 0; 449 int valid = 0, num_buses;
445 450
446 while (!is_reserved(addr, addr + size, E820_RESERVED)) { 451 while (!is_reserved(addr, addr + size, E820_RESERVED)) {
447 size >>= 1; 452 size >>= 1;
@@ -450,19 +455,25 @@ static int __init is_mmconf_reserved(check_reserved_t is_reserved,
450 } 455 }
451 456
452 if (size >= (16UL<<20) || size == old_size) { 457 if (size >= (16UL<<20) || size == old_size) {
453 printk(KERN_NOTICE 458 printk(KERN_INFO PREFIX "MMCONFIG at %pR reserved in %s\n",
454 "PCI: MCFG area at %Lx reserved in %s\n", 459 &cfg->res,
455 addr, with_e820?"E820":"ACPI motherboard resources"); 460 with_e820 ? "E820" : "ACPI motherboard resources");
456 valid = 1; 461 valid = 1;
457 462
458 if (old_size != size) { 463 if (old_size != size) {
459 /* update end_bus_number */ 464 /* update end_bus */
460 cfg->end_bus_number = cfg->start_bus_number + ((size>>20) - 1); 465 cfg->end_bus = cfg->start_bus + ((size>>20) - 1);
461 printk(KERN_NOTICE "PCI: updated MCFG configuration %d: base %lx " 466 num_buses = cfg->end_bus - cfg->start_bus + 1;
462 "segment %hu buses %u - %u\n", 467 cfg->res.end = cfg->res.start +
463 i, (unsigned long)cfg->address, cfg->pci_segment, 468 PCI_MMCFG_BUS_OFFSET(num_buses) - 1;
464 (unsigned int)cfg->start_bus_number, 469 snprintf(cfg->name, PCI_MMCFG_RESOURCE_NAME_LEN,
465 (unsigned int)cfg->end_bus_number); 470 "PCI MMCONFIG %04x [bus %02x-%02x]",
471 cfg->segment, cfg->start_bus, cfg->end_bus);
472 printk(KERN_INFO PREFIX
473 "MMCONFIG for %04x [bus%02x-%02x] "
474 "at %pR (base %#lx) (size reduced!)\n",
475 cfg->segment, cfg->start_bus, cfg->end_bus,
476 &cfg->res, (unsigned long) cfg->address);
466 } 477 }
467 } 478 }
468 479
@@ -471,45 +482,26 @@ static int __init is_mmconf_reserved(check_reserved_t is_reserved,
471 482
472static void __init pci_mmcfg_reject_broken(int early) 483static void __init pci_mmcfg_reject_broken(int early)
473{ 484{
474 typeof(pci_mmcfg_config[0]) *cfg; 485 struct pci_mmcfg_region *cfg;
475 int i;
476 486
477 if ((pci_mmcfg_config_num == 0) || 487 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
478 (pci_mmcfg_config == NULL) ||
479 (pci_mmcfg_config[0].address == 0))
480 return;
481
482 for (i = 0; i < pci_mmcfg_config_num; i++) {
483 int valid = 0; 488 int valid = 0;
484 u64 addr, size;
485
486 cfg = &pci_mmcfg_config[i];
487 addr = cfg->start_bus_number;
488 addr <<= 20;
489 addr += cfg->address;
490 size = cfg->end_bus_number + 1 - cfg->start_bus_number;
491 size <<= 20;
492 printk(KERN_NOTICE "PCI: MCFG configuration %d: base %lx "
493 "segment %hu buses %u - %u\n",
494 i, (unsigned long)cfg->address, cfg->pci_segment,
495 (unsigned int)cfg->start_bus_number,
496 (unsigned int)cfg->end_bus_number);
497 489
498 if (!early && !acpi_disabled) 490 if (!early && !acpi_disabled)
499 valid = is_mmconf_reserved(is_acpi_reserved, addr, size, i, cfg, 0); 491 valid = is_mmconf_reserved(is_acpi_reserved, cfg, 0);
500 492
501 if (valid) 493 if (valid)
502 continue; 494 continue;
503 495
504 if (!early) 496 if (!early)
505 printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %Lx is not" 497 printk(KERN_ERR FW_BUG PREFIX
506 " reserved in ACPI motherboard resources\n", 498 "MMCONFIG at %pR not reserved in "
507 cfg->address); 499 "ACPI motherboard resources\n", &cfg->res);
508 500
509 /* Don't try to do this check unless configuration 501 /* Don't try to do this check unless configuration
510 type 1 is available. how about type 2 ?*/ 502 type 1 is available. how about type 2 ?*/
511 if (raw_pci_ops) 503 if (raw_pci_ops)
512 valid = is_mmconf_reserved(e820_all_mapped, addr, size, i, cfg, 1); 504 valid = is_mmconf_reserved(e820_all_mapped, cfg, 1);
513 505
514 if (!valid) 506 if (!valid)
515 goto reject; 507 goto reject;
@@ -518,34 +510,41 @@ static void __init pci_mmcfg_reject_broken(int early)
518 return; 510 return;
519 511
520reject: 512reject:
521 printk(KERN_INFO "PCI: Not using MMCONFIG.\n"); 513 printk(KERN_INFO PREFIX "not using MMCONFIG\n");
522 pci_mmcfg_arch_free(); 514 free_all_mmcfg();
523 kfree(pci_mmcfg_config);
524 pci_mmcfg_config = NULL;
525 pci_mmcfg_config_num = 0;
526} 515}
527 516
528static int __initdata known_bridge; 517static int __initdata known_bridge;
529 518
530static int acpi_mcfg_64bit_base_addr __initdata = FALSE; 519static int __init acpi_mcfg_check_entry(struct acpi_table_mcfg *mcfg,
520 struct acpi_mcfg_allocation *cfg)
521{
522 int year;
531 523
532/* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ 524 if (cfg->address < 0xFFFFFFFF)
533struct acpi_mcfg_allocation *pci_mmcfg_config; 525 return 0;
534int pci_mmcfg_config_num;
535 526
536static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg)
537{
538 if (!strcmp(mcfg->header.oem_id, "SGI")) 527 if (!strcmp(mcfg->header.oem_id, "SGI"))
539 acpi_mcfg_64bit_base_addr = TRUE; 528 return 0;
540 529
541 return 0; 530 if (mcfg->header.revision >= 1) {
531 if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) &&
532 year >= 2010)
533 return 0;
534 }
535
536 printk(KERN_ERR PREFIX "MCFG region for %04x [bus %02x-%02x] at %#llx "
537 "is above 4GB, ignored\n", cfg->pci_segment,
538 cfg->start_bus_number, cfg->end_bus_number, cfg->address);
539 return -EINVAL;
542} 540}
543 541
544static int __init pci_parse_mcfg(struct acpi_table_header *header) 542static int __init pci_parse_mcfg(struct acpi_table_header *header)
545{ 543{
546 struct acpi_table_mcfg *mcfg; 544 struct acpi_table_mcfg *mcfg;
545 struct acpi_mcfg_allocation *cfg_table, *cfg;
547 unsigned long i; 546 unsigned long i;
548 int config_size; 547 int entries;
549 548
550 if (!header) 549 if (!header)
551 return -EINVAL; 550 return -EINVAL;
@@ -553,38 +552,33 @@ static int __init pci_parse_mcfg(struct acpi_table_header *header)
553 mcfg = (struct acpi_table_mcfg *)header; 552 mcfg = (struct acpi_table_mcfg *)header;
554 553
555 /* how many config structures do we have */ 554 /* how many config structures do we have */
556 pci_mmcfg_config_num = 0; 555 free_all_mmcfg();
556 entries = 0;
557 i = header->length - sizeof(struct acpi_table_mcfg); 557 i = header->length - sizeof(struct acpi_table_mcfg);
558 while (i >= sizeof(struct acpi_mcfg_allocation)) { 558 while (i >= sizeof(struct acpi_mcfg_allocation)) {
559 ++pci_mmcfg_config_num; 559 entries++;
560 i -= sizeof(struct acpi_mcfg_allocation); 560 i -= sizeof(struct acpi_mcfg_allocation);
561 }; 561 };
562 if (pci_mmcfg_config_num == 0) { 562 if (entries == 0) {
563 printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); 563 printk(KERN_ERR PREFIX "MMCONFIG has no entries\n");
564 return -ENODEV; 564 return -ENODEV;
565 } 565 }
566 566
567 config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); 567 cfg_table = (struct acpi_mcfg_allocation *) &mcfg[1];
568 pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); 568 for (i = 0; i < entries; i++) {
569 if (!pci_mmcfg_config) { 569 cfg = &cfg_table[i];
570 printk(KERN_WARNING PREFIX 570 if (acpi_mcfg_check_entry(mcfg, cfg)) {
571 "No memory for MCFG config tables\n"); 571 free_all_mmcfg();
572 return -ENOMEM;
573 }
574
575 memcpy(pci_mmcfg_config, &mcfg[1], config_size);
576
577 acpi_mcfg_oem_check(mcfg);
578
579 for (i = 0; i < pci_mmcfg_config_num; ++i) {
580 if ((pci_mmcfg_config[i].address > 0xFFFFFFFF) &&
581 !acpi_mcfg_64bit_base_addr) {
582 printk(KERN_ERR PREFIX
583 "MMCONFIG not in low 4GB of memory\n");
584 kfree(pci_mmcfg_config);
585 pci_mmcfg_config_num = 0;
586 return -ENODEV; 572 return -ENODEV;
587 } 573 }
574
575 if (pci_mmconfig_add(cfg->pci_segment, cfg->start_bus_number,
576 cfg->end_bus_number, cfg->address) == NULL) {
577 printk(KERN_WARNING PREFIX
578 "no memory for MCFG entries\n");
579 free_all_mmcfg();
580 return -ENOMEM;
581 }
588 } 582 }
589 583
590 return 0; 584 return 0;
@@ -614,9 +608,7 @@ static void __init __pci_mmcfg_init(int early)
614 608
615 pci_mmcfg_reject_broken(early); 609 pci_mmcfg_reject_broken(early);
616 610
617 if ((pci_mmcfg_config_num == 0) || 611 if (list_empty(&pci_mmcfg_list))
618 (pci_mmcfg_config == NULL) ||
619 (pci_mmcfg_config[0].address == 0))
620 return; 612 return;
621 613
622 if (pci_mmcfg_arch_init()) 614 if (pci_mmcfg_arch_init())
@@ -648,9 +640,7 @@ static int __init pci_mmcfg_late_insert_resources(void)
648 */ 640 */
649 if ((pci_mmcfg_resources_inserted == 1) || 641 if ((pci_mmcfg_resources_inserted == 1) ||
650 (pci_probe & PCI_PROBE_MMCONF) == 0 || 642 (pci_probe & PCI_PROBE_MMCONF) == 0 ||
651 (pci_mmcfg_config_num == 0) || 643 list_empty(&pci_mmcfg_list))
652 (pci_mmcfg_config == NULL) ||
653 (pci_mmcfg_config[0].address == 0))
654 return 1; 644 return 1;
655 645
656 /* 646 /*
diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c
index f10a7e94a84c..90d5fd476ed4 100644
--- a/arch/x86/pci/mmconfig_32.c
+++ b/arch/x86/pci/mmconfig_32.c
@@ -27,18 +27,10 @@ static int mmcfg_last_accessed_cpu;
27 */ 27 */
28static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) 28static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
29{ 29{
30 struct acpi_mcfg_allocation *cfg; 30 struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus);
31 int cfg_num;
32
33 for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) {
34 cfg = &pci_mmcfg_config[cfg_num];
35 if (cfg->pci_segment == seg &&
36 (cfg->start_bus_number <= bus) &&
37 (cfg->end_bus_number >= bus))
38 return cfg->address;
39 }
40 31
41 /* Fall back to type 0 */ 32 if (cfg)
33 return cfg->address;
42 return 0; 34 return 0;
43} 35}
44 36
@@ -47,7 +39,7 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
47 */ 39 */
48static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn) 40static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
49{ 41{
50 u32 dev_base = base | (bus << 20) | (devfn << 12); 42 u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12);
51 int cpu = smp_processor_id(); 43 int cpu = smp_processor_id();
52 if (dev_base != mmcfg_last_accessed_device || 44 if (dev_base != mmcfg_last_accessed_device ||
53 cpu != mmcfg_last_accessed_cpu) { 45 cpu != mmcfg_last_accessed_cpu) {
diff --git a/arch/x86/pci/mmconfig_64.c b/arch/x86/pci/mmconfig_64.c
index 94349f8b2f96..e783841bd1d7 100644
--- a/arch/x86/pci/mmconfig_64.c
+++ b/arch/x86/pci/mmconfig_64.c
@@ -12,38 +12,15 @@
12#include <asm/e820.h> 12#include <asm/e820.h>
13#include <asm/pci_x86.h> 13#include <asm/pci_x86.h>
14 14
15/* Static virtual mapping of the MMCONFIG aperture */ 15#define PREFIX "PCI: "
16struct mmcfg_virt {
17 struct acpi_mcfg_allocation *cfg;
18 char __iomem *virt;
19};
20static struct mmcfg_virt *pci_mmcfg_virt;
21
22static char __iomem *get_virt(unsigned int seg, unsigned bus)
23{
24 struct acpi_mcfg_allocation *cfg;
25 int cfg_num;
26
27 for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) {
28 cfg = pci_mmcfg_virt[cfg_num].cfg;
29 if (cfg->pci_segment == seg &&
30 (cfg->start_bus_number <= bus) &&
31 (cfg->end_bus_number >= bus))
32 return pci_mmcfg_virt[cfg_num].virt;
33 }
34
35 /* Fall back to type 0 */
36 return NULL;
37}
38 16
39static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) 17static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
40{ 18{
41 char __iomem *addr; 19 struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus);
42 20
43 addr = get_virt(seg, bus); 21 if (cfg && cfg->virt)
44 if (!addr) 22 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12));
45 return NULL; 23 return NULL;
46 return addr + ((bus << 20) | (devfn << 12));
47} 24}
48 25
49static int pci_mmcfg_read(unsigned int seg, unsigned int bus, 26static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
@@ -109,42 +86,30 @@ static struct pci_raw_ops pci_mmcfg = {
109 .write = pci_mmcfg_write, 86 .write = pci_mmcfg_write,
110}; 87};
111 88
112static void __iomem * __init mcfg_ioremap(struct acpi_mcfg_allocation *cfg) 89static void __iomem * __init mcfg_ioremap(struct pci_mmcfg_region *cfg)
113{ 90{
114 void __iomem *addr; 91 void __iomem *addr;
115 u64 start, size; 92 u64 start, size;
93 int num_buses;
116 94
117 start = cfg->start_bus_number; 95 start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus);
118 start <<= 20; 96 num_buses = cfg->end_bus - cfg->start_bus + 1;
119 start += cfg->address; 97 size = PCI_MMCFG_BUS_OFFSET(num_buses);
120 size = cfg->end_bus_number + 1 - cfg->start_bus_number;
121 size <<= 20;
122 addr = ioremap_nocache(start, size); 98 addr = ioremap_nocache(start, size);
123 if (addr) { 99 if (addr)
124 printk(KERN_INFO "PCI: Using MMCONFIG at %Lx - %Lx\n", 100 addr -= PCI_MMCFG_BUS_OFFSET(cfg->start_bus);
125 start, start + size - 1);
126 addr -= cfg->start_bus_number << 20;
127 }
128 return addr; 101 return addr;
129} 102}
130 103
131int __init pci_mmcfg_arch_init(void) 104int __init pci_mmcfg_arch_init(void)
132{ 105{
133 int i; 106 struct pci_mmcfg_region *cfg;
134 pci_mmcfg_virt = kzalloc(sizeof(*pci_mmcfg_virt) *
135 pci_mmcfg_config_num, GFP_KERNEL);
136 if (pci_mmcfg_virt == NULL) {
137 printk(KERN_ERR "PCI: Can not allocate memory for mmconfig structures\n");
138 return 0;
139 }
140 107
141 for (i = 0; i < pci_mmcfg_config_num; ++i) { 108 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
142 pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i]; 109 cfg->virt = mcfg_ioremap(cfg);
143 pci_mmcfg_virt[i].virt = mcfg_ioremap(&pci_mmcfg_config[i]); 110 if (!cfg->virt) {
144 if (!pci_mmcfg_virt[i].virt) { 111 printk(KERN_ERR PREFIX "can't map MMCONFIG at %pR\n",
145 printk(KERN_ERR "PCI: Cannot map mmconfig aperture for " 112 &cfg->res);
146 "segment %d\n",
147 pci_mmcfg_config[i].pci_segment);
148 pci_mmcfg_arch_free(); 113 pci_mmcfg_arch_free();
149 return 0; 114 return 0;
150 } 115 }
@@ -155,19 +120,12 @@ int __init pci_mmcfg_arch_init(void)
155 120
156void __init pci_mmcfg_arch_free(void) 121void __init pci_mmcfg_arch_free(void)
157{ 122{
158 int i; 123 struct pci_mmcfg_region *cfg;
159
160 if (pci_mmcfg_virt == NULL)
161 return;
162 124
163 for (i = 0; i < pci_mmcfg_config_num; ++i) { 125 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
164 if (pci_mmcfg_virt[i].virt) { 126 if (cfg->virt) {
165 iounmap(pci_mmcfg_virt[i].virt + (pci_mmcfg_virt[i].cfg->start_bus_number << 20)); 127 iounmap(cfg->virt + PCI_MMCFG_BUS_OFFSET(cfg->start_bus));
166 pci_mmcfg_virt[i].virt = NULL; 128 cfg->virt = NULL;
167 pci_mmcfg_virt[i].cfg = NULL;
168 } 129 }
169 } 130 }
170
171 kfree(pci_mmcfg_virt);
172 pci_mmcfg_virt = NULL;
173} 131}
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index dfbf70e65860..2b26dd5930c6 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -27,7 +27,9 @@
27#include <linux/page-flags.h> 27#include <linux/page-flags.h>
28#include <linux/highmem.h> 28#include <linux/highmem.h>
29#include <linux/console.h> 29#include <linux/console.h>
30#include <linux/pci.h>
30 31
32#include <xen/xen.h>
31#include <xen/interface/xen.h> 33#include <xen/interface/xen.h>
32#include <xen/interface/version.h> 34#include <xen/interface/version.h>
33#include <xen/interface/physdev.h> 35#include <xen/interface/physdev.h>
@@ -138,24 +140,23 @@ static void xen_vcpu_setup(int cpu)
138 */ 140 */
139void xen_vcpu_restore(void) 141void xen_vcpu_restore(void)
140{ 142{
141 if (have_vcpu_info_placement) { 143 int cpu;
142 int cpu;
143 144
144 for_each_online_cpu(cpu) { 145 for_each_online_cpu(cpu) {
145 bool other_cpu = (cpu != smp_processor_id()); 146 bool other_cpu = (cpu != smp_processor_id());
146 147
147 if (other_cpu && 148 if (other_cpu &&
148 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) 149 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
149 BUG(); 150 BUG();
150 151
151 xen_vcpu_setup(cpu); 152 xen_setup_runstate_info(cpu);
152 153
153 if (other_cpu && 154 if (have_vcpu_info_placement)
154 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) 155 xen_vcpu_setup(cpu);
155 BUG();
156 }
157 156
158 BUG_ON(!have_vcpu_info_placement); 157 if (other_cpu &&
158 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
159 BUG();
159 } 160 }
160} 161}
161 162
@@ -1093,10 +1094,8 @@ asmlinkage void __init xen_start_kernel(void)
1093 1094
1094 __supported_pte_mask |= _PAGE_IOMAP; 1095 __supported_pte_mask |= _PAGE_IOMAP;
1095 1096
1096#ifdef CONFIG_X86_64
1097 /* Work out if we support NX */ 1097 /* Work out if we support NX */
1098 check_efer(); 1098 x86_configure_nx();
1099#endif
1100 1099
1101 xen_setup_features(); 1100 xen_setup_features();
1102 1101
@@ -1178,10 +1177,16 @@ asmlinkage void __init xen_start_kernel(void)
1178 add_preferred_console("xenboot", 0, NULL); 1177 add_preferred_console("xenboot", 0, NULL);
1179 add_preferred_console("tty", 0, NULL); 1178 add_preferred_console("tty", 0, NULL);
1180 add_preferred_console("hvc", 0, NULL); 1179 add_preferred_console("hvc", 0, NULL);
1180 } else {
1181 /* Make sure ACS will be enabled */
1182 pci_request_acs();
1181 } 1183 }
1184
1182 1185
1183 xen_raw_console_write("about to get started...\n"); 1186 xen_raw_console_write("about to get started...\n");
1184 1187
1188 xen_setup_runstate_info(0);
1189
1185 /* Start the world */ 1190 /* Start the world */
1186#ifdef CONFIG_X86_32 1191#ifdef CONFIG_X86_32
1187 i386_start_kernel(); 1192 i386_start_kernel();
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 3bf7b1d250ce..bf4cd6bfe959 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -185,7 +185,7 @@ static inline unsigned p2m_index(unsigned long pfn)
185} 185}
186 186
187/* Build the parallel p2m_top_mfn structures */ 187/* Build the parallel p2m_top_mfn structures */
188static void __init xen_build_mfn_list_list(void) 188void xen_build_mfn_list_list(void)
189{ 189{
190 unsigned pfn, idx; 190 unsigned pfn, idx;
191 191
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index fe03eeed7b48..64757c0ba5fc 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -73,7 +73,7 @@ static __cpuinit void cpu_bringup(void)
73 73
74 xen_setup_cpu_clockevents(); 74 xen_setup_cpu_clockevents();
75 75
76 cpu_set(cpu, cpu_online_map); 76 set_cpu_online(cpu, true);
77 percpu_write(cpu_state, CPU_ONLINE); 77 percpu_write(cpu_state, CPU_ONLINE);
78 wmb(); 78 wmb();
79 79
@@ -295,6 +295,7 @@ static int __cpuinit xen_cpu_up(unsigned int cpu)
295 (unsigned long)task_stack_page(idle) - 295 (unsigned long)task_stack_page(idle) -
296 KERNEL_STACK_OFFSET + THREAD_SIZE; 296 KERNEL_STACK_OFFSET + THREAD_SIZE;
297#endif 297#endif
298 xen_setup_runstate_info(cpu);
298 xen_setup_timer(cpu); 299 xen_setup_timer(cpu);
299 xen_init_lock_cpu(cpu); 300 xen_init_lock_cpu(cpu);
300 301
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
index 95be7b434724..987267f79bf5 100644
--- a/arch/x86/xen/suspend.c
+++ b/arch/x86/xen/suspend.c
@@ -1,4 +1,5 @@
1#include <linux/types.h> 1#include <linux/types.h>
2#include <linux/clockchips.h>
2 3
3#include <xen/interface/xen.h> 4#include <xen/interface/xen.h>
4#include <xen/grant_table.h> 5#include <xen/grant_table.h>
@@ -27,6 +28,8 @@ void xen_pre_suspend(void)
27 28
28void xen_post_suspend(int suspend_cancelled) 29void xen_post_suspend(int suspend_cancelled)
29{ 30{
31 xen_build_mfn_list_list();
32
30 xen_setup_shared_info(); 33 xen_setup_shared_info();
31 34
32 if (suspend_cancelled) { 35 if (suspend_cancelled) {
@@ -44,7 +47,19 @@ void xen_post_suspend(int suspend_cancelled)
44 47
45} 48}
46 49
50static void xen_vcpu_notify_restore(void *data)
51{
52 unsigned long reason = (unsigned long)data;
53
54 /* Boot processor notified via generic timekeeping_resume() */
55 if ( smp_processor_id() == 0)
56 return;
57
58 clockevents_notify(reason, NULL);
59}
60
47void xen_arch_resume(void) 61void xen_arch_resume(void)
48{ 62{
49 /* nothing */ 63 smp_call_function(xen_vcpu_notify_restore,
64 (void *)CLOCK_EVT_NOTIFY_RESUME, 1);
50} 65}
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index 0a5aa44299a5..9d1f853120d8 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -100,7 +100,7 @@ bool xen_vcpu_stolen(int vcpu)
100 return per_cpu(runstate, vcpu).state == RUNSTATE_runnable; 100 return per_cpu(runstate, vcpu).state == RUNSTATE_runnable;
101} 101}
102 102
103static void setup_runstate_info(int cpu) 103void xen_setup_runstate_info(int cpu)
104{ 104{
105 struct vcpu_register_runstate_memory_area area; 105 struct vcpu_register_runstate_memory_area area;
106 106
@@ -434,7 +434,7 @@ void xen_setup_timer(int cpu)
434 name = "<timer kasprintf failed>"; 434 name = "<timer kasprintf failed>";
435 435
436 irq = bind_virq_to_irqhandler(VIRQ_TIMER, cpu, xen_timer_interrupt, 436 irq = bind_virq_to_irqhandler(VIRQ_TIMER, cpu, xen_timer_interrupt,
437 IRQF_DISABLED|IRQF_PERCPU|IRQF_NOBALANCING, 437 IRQF_DISABLED|IRQF_PERCPU|IRQF_NOBALANCING|IRQF_TIMER,
438 name, NULL); 438 name, NULL);
439 439
440 evt = &per_cpu(xen_clock_events, cpu); 440 evt = &per_cpu(xen_clock_events, cpu);
@@ -442,8 +442,6 @@ void xen_setup_timer(int cpu)
442 442
443 evt->cpumask = cpumask_of(cpu); 443 evt->cpumask = cpumask_of(cpu);
444 evt->irq = irq; 444 evt->irq = irq;
445
446 setup_runstate_info(cpu);
447} 445}
448 446
449void xen_teardown_timer(int cpu) 447void xen_teardown_timer(int cpu)
@@ -494,6 +492,7 @@ __init void xen_time_init(void)
494 492
495 setup_force_cpu_cap(X86_FEATURE_TSC); 493 setup_force_cpu_cap(X86_FEATURE_TSC);
496 494
495 xen_setup_runstate_info(cpu);
497 xen_setup_timer(cpu); 496 xen_setup_timer(cpu);
498 xen_setup_cpu_clockevents(); 497 xen_setup_cpu_clockevents();
499} 498}
diff --git a/arch/x86/xen/xen-asm_64.S b/arch/x86/xen/xen-asm_64.S
index 02f496a8dbaa..53adefda4275 100644
--- a/arch/x86/xen/xen-asm_64.S
+++ b/arch/x86/xen/xen-asm_64.S
@@ -96,7 +96,7 @@ ENTRY(xen_sysret32)
96 pushq $__USER32_CS 96 pushq $__USER32_CS
97 pushq %rcx 97 pushq %rcx
98 98
99 pushq $VGCF_in_syscall 99 pushq $0
1001: jmp hypercall_iret 1001: jmp hypercall_iret
101ENDPATCH(xen_sysret32) 101ENDPATCH(xen_sysret32)
102RELOC(xen_sysret32, 1b+1) 102RELOC(xen_sysret32, 1b+1)
@@ -151,7 +151,7 @@ ENTRY(xen_syscall32_target)
151ENTRY(xen_sysenter_target) 151ENTRY(xen_sysenter_target)
152 lea 16(%rsp), %rsp /* strip %rcx, %r11 */ 152 lea 16(%rsp), %rsp /* strip %rcx, %r11 */
153 mov $-ENOSYS, %rax 153 mov $-ENOSYS, %rax
154 pushq $VGCF_in_syscall 154 pushq $0
155 jmp hypercall_iret 155 jmp hypercall_iret
156ENDPROC(xen_syscall32_target) 156ENDPROC(xen_syscall32_target)
157ENDPROC(xen_sysenter_target) 157ENDPROC(xen_sysenter_target)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 355fa6b99c9c..f9153a300bce 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -25,6 +25,7 @@ extern struct shared_info *HYPERVISOR_shared_info;
25 25
26void xen_setup_mfn_list_list(void); 26void xen_setup_mfn_list_list(void);
27void xen_setup_shared_info(void); 27void xen_setup_shared_info(void);
28void xen_build_mfn_list_list(void);
28void xen_setup_machphys_mapping(void); 29void xen_setup_machphys_mapping(void);
29pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn); 30pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);
30void xen_ident_map_ISA(void); 31void xen_ident_map_ISA(void);
@@ -41,6 +42,7 @@ void __init xen_build_dynamic_phys_to_machine(void);
41 42
42void xen_init_irq_ops(void); 43void xen_init_irq_ops(void);
43void xen_setup_timer(int cpu); 44void xen_setup_timer(int cpu);
45void xen_setup_runstate_info(int cpu);
44void xen_teardown_timer(int cpu); 46void xen_teardown_timer(int cpu);
45cycle_t xen_clocksource_read(void); 47cycle_t xen_clocksource_read(void);
46void xen_setup_cpu_clockevents(void); 48void xen_setup_cpu_clockevents(void);
diff --git a/arch/xtensa/include/asm/syscall.h b/arch/xtensa/include/asm/syscall.h
index 05cebf8f62b1..4352dbe1186a 100644
--- a/arch/xtensa/include/asm/syscall.h
+++ b/arch/xtensa/include/asm/syscall.h
@@ -13,8 +13,6 @@ struct sigaction;
13asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*); 13asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*);
14asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*); 14asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*);
15asmlinkage long xtensa_pipe(int __user *); 15asmlinkage long xtensa_pipe(int __user *);
16asmlinkage long xtensa_mmap2(unsigned long, unsigned long, unsigned long,
17 unsigned long, unsigned long, unsigned long);
18asmlinkage long xtensa_ptrace(long, long, long, long); 16asmlinkage long xtensa_ptrace(long, long, long, long);
19asmlinkage long xtensa_sigreturn(struct pt_regs*); 17asmlinkage long xtensa_sigreturn(struct pt_regs*);
20asmlinkage long xtensa_rt_sigreturn(struct pt_regs*); 18asmlinkage long xtensa_rt_sigreturn(struct pt_regs*);
diff --git a/arch/xtensa/include/asm/unistd.h b/arch/xtensa/include/asm/unistd.h
index 4e55dc763021..fbf318b3af3e 100644
--- a/arch/xtensa/include/asm/unistd.h
+++ b/arch/xtensa/include/asm/unistd.h
@@ -189,7 +189,7 @@ __SYSCALL( 79, sys_fremovexattr, 2)
189/* File Map / Shared Memory Operations */ 189/* File Map / Shared Memory Operations */
190 190
191#define __NR_mmap2 80 191#define __NR_mmap2 80
192__SYSCALL( 80, xtensa_mmap2, 6) 192__SYSCALL( 80, sys_mmap_pgoff, 6)
193#define __NR_munmap 81 193#define __NR_munmap 81
194__SYSCALL( 81, sys_munmap, 2) 194__SYSCALL( 81, sys_munmap, 2)
195#define __NR_mprotect 82 195#define __NR_mprotect 82
diff --git a/arch/xtensa/kernel/syscall.c b/arch/xtensa/kernel/syscall.c
index ac15ecbdf919..1e67bab775c1 100644
--- a/arch/xtensa/kernel/syscall.c
+++ b/arch/xtensa/kernel/syscall.c
@@ -57,31 +57,6 @@ asmlinkage long xtensa_pipe(int __user *userfds)
57 return error; 57 return error;
58} 58}
59 59
60
61asmlinkage long xtensa_mmap2(unsigned long addr, unsigned long len,
62 unsigned long prot, unsigned long flags,
63 unsigned long fd, unsigned long pgoff)
64{
65 int error = -EBADF;
66 struct file * file = NULL;
67
68 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
69 if (!(flags & MAP_ANONYMOUS)) {
70 file = fget(fd);
71 if (!file)
72 goto out;
73 }
74
75 down_write(&current->mm->mmap_sem);
76 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
77 up_write(&current->mm->mmap_sem);
78
79 if (file)
80 fput(file);
81out:
82 return error;
83}
84
85asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg) 60asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg)
86{ 61{
87 unsigned long ret; 62 unsigned long ret;
diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c
index 4c559cf7da2d..e60a1f57022f 100644
--- a/arch/xtensa/platforms/iss/console.c
+++ b/arch/xtensa/platforms/iss/console.c
@@ -196,7 +196,7 @@ static const struct file_operations rs_proc_fops = {
196 .release = single_release, 196 .release = single_release,
197}; 197};
198 198
199static struct tty_operations serial_ops = { 199static const struct tty_operations serial_ops = {
200 .open = rs_open, 200 .open = rs_open,
201 .close = rs_close, 201 .close = rs_close,
202 .write = rs_write, 202 .write = rs_write,