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-rw-r--r--arch/powerpc/Kconfig1
-rw-r--r--arch/powerpc/Kconfig.debug19
-rw-r--r--arch/powerpc/boot/4xx.c405
-rw-r--r--arch/powerpc/boot/4xx.h13
-rw-r--r--arch/powerpc/boot/Makefile10
-rw-r--r--arch/powerpc/boot/bamboo.c4
-rw-r--r--arch/powerpc/boot/cuboot-katmai.c56
-rw-r--r--arch/powerpc/boot/cuboot-rainier.c56
-rw-r--r--arch/powerpc/boot/cuboot-sequoia.c2
-rw-r--r--arch/powerpc/boot/cuboot-taishan.c54
-rw-r--r--arch/powerpc/boot/dcr.h54
-rw-r--r--arch/powerpc/boot/dts/bamboo.dts62
-rw-r--r--arch/powerpc/boot/dts/ebony.dts53
-rw-r--r--arch/powerpc/boot/dts/ep405.dts228
-rw-r--r--arch/powerpc/boot/dts/katmai.dts400
-rw-r--r--arch/powerpc/boot/dts/kilauea.dts99
-rw-r--r--arch/powerpc/boot/dts/makalu.dts347
-rw-r--r--arch/powerpc/boot/dts/rainier.dts353
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts49
-rw-r--r--arch/powerpc/boot/dts/taishan.dts383
-rw-r--r--arch/powerpc/boot/dts/walnut.dts50
-rw-r--r--arch/powerpc/boot/ebony.c62
-rw-r--r--arch/powerpc/boot/ep405.c74
-rw-r--r--arch/powerpc/boot/reg.h8
-rw-r--r--arch/powerpc/boot/treeboot-walnut.c51
-rwxr-xr-xarch/powerpc/boot/wrapper2
-rw-r--r--arch/powerpc/configs/bamboo_defconfig22
-rw-r--r--arch/powerpc/configs/ebony_defconfig8
-rw-r--r--arch/powerpc/configs/ep405_defconfig952
-rw-r--r--arch/powerpc/configs/katmai_defconfig790
-rw-r--r--arch/powerpc/configs/kilauea_defconfig53
-rw-r--r--arch/powerpc/configs/makalu_defconfig812
-rw-r--r--arch/powerpc/configs/rainier_defconfig873
-rw-r--r--arch/powerpc/configs/sequoia_defconfig10
-rw-r--r--arch/powerpc/configs/taishan_defconfig790
-rw-r--r--arch/powerpc/configs/walnut_defconfig94
-rw-r--r--arch/powerpc/kernel/cpu_setup_44x.S15
-rw-r--r--arch/powerpc/kernel/cputable.c108
-rw-r--r--arch/powerpc/kernel/head_44x.S14
-rw-r--r--arch/powerpc/kernel/head_booke.h2
-rw-r--r--arch/powerpc/kernel/misc_32.S39
-rw-r--r--arch/powerpc/kernel/pci-common.c13
-rw-r--r--arch/powerpc/kernel/prom.c37
-rw-r--r--arch/powerpc/kernel/traps.c62
-rw-r--r--arch/powerpc/kernel/udbg.c3
-rw-r--r--arch/powerpc/kernel/udbg_16550.c33
-rw-r--r--arch/powerpc/platforms/40x/Kconfig40
-rw-r--r--arch/powerpc/platforms/40x/Makefile2
-rw-r--r--arch/powerpc/platforms/40x/ep405.c123
-rw-r--r--arch/powerpc/platforms/40x/kilauea.c10
-rw-r--r--arch/powerpc/platforms/40x/makalu.c58
-rw-r--r--arch/powerpc/platforms/40x/virtex.c5
-rw-r--r--arch/powerpc/platforms/40x/walnut.c11
-rw-r--r--arch/powerpc/platforms/44x/Kconfig46
-rw-r--r--arch/powerpc/platforms/44x/Makefile5
-rw-r--r--arch/powerpc/platforms/44x/bamboo.c11
-rw-r--r--arch/powerpc/platforms/44x/ebony.c10
-rw-r--r--arch/powerpc/platforms/44x/katmai.c63
-rw-r--r--arch/powerpc/platforms/44x/rainier.c61
-rw-r--r--arch/powerpc/platforms/44x/sequoia.c11
-rw-r--r--arch/powerpc/platforms/44x/taishan.c73
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_mds.c5
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype1
-rw-r--r--arch/powerpc/sysdev/Kconfig8
-rw-r--r--arch/powerpc/sysdev/Makefile3
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c1528
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.h369
-rw-r--r--arch/powerpc/sysdev/uic.c117
-rw-r--r--arch/ppc/kernel/head_44x.S2
-rw-r--r--arch/ppc/kernel/traps.c98
-rw-r--r--arch/ppc/mm/44x_mmu.c51
71 files changed, 9840 insertions, 496 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index d40844f9b047..66a3d8cee5cf 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -166,6 +166,7 @@ config PPC_OF_PLATFORM_PCI
166 166
167source "init/Kconfig" 167source "init/Kconfig"
168 168
169source "arch/powerpc/sysdev/Kconfig"
169source "arch/powerpc/platforms/Kconfig" 170source "arch/powerpc/platforms/Kconfig"
170 171
171menu "Kernel options" 172menu "Kernel options"
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index d20ccf5f2ca9..db7cc34c24d4 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -225,7 +225,16 @@ config PPC_EARLY_DEBUG_44x
225 depends on 44x 225 depends on 44x
226 help 226 help
227 Select this to enable early debugging for IBM 44x chips via the 227 Select this to enable early debugging for IBM 44x chips via the
228 inbuilt serial port. 228 inbuilt serial port. If you enable this, ensure you set
229 PPC_EARLY_DEBUG_44x_PHYSLOW below to suit your target board.
230
231config PPC_EARLY_DEBUG_40x
232 bool "Early serial debugging for IBM/AMCC 40x CPUs"
233 depends on 40x
234 help
235 Select this to enable early debugging for IBM 40x chips via the
236 inbuilt serial port. This works on chips with a 16550 compatible
237 UART. Xilinx chips with uartlite cannot use this option.
229 238
230config PPC_EARLY_DEBUG_CPM 239config PPC_EARLY_DEBUG_CPM
231 bool "Early serial debugging for Freescale CPM-based serial ports" 240 bool "Early serial debugging for Freescale CPM-based serial ports"
@@ -242,12 +251,20 @@ config PPC_EARLY_DEBUG_44x_PHYSLOW
242 hex "Low 32 bits of early debug UART physical address" 251 hex "Low 32 bits of early debug UART physical address"
243 depends on PPC_EARLY_DEBUG_44x 252 depends on PPC_EARLY_DEBUG_44x
244 default "0x40000200" 253 default "0x40000200"
254 help
255 You probably want 0x40000200 for ebony boards and
256 0x40000300 for taishan
245 257
246config PPC_EARLY_DEBUG_44x_PHYSHIGH 258config PPC_EARLY_DEBUG_44x_PHYSHIGH
247 hex "EPRN of early debug UART physical address" 259 hex "EPRN of early debug UART physical address"
248 depends on PPC_EARLY_DEBUG_44x 260 depends on PPC_EARLY_DEBUG_44x
249 default "0x1" 261 default "0x1"
250 262
263config PPC_EARLY_DEBUG_40x_PHYSADDR
264 hex "Early debug UART physical address"
265 depends on PPC_EARLY_DEBUG_40x
266 default "0xef600300"
267
251config PPC_EARLY_DEBUG_CPM_ADDR 268config PPC_EARLY_DEBUG_CPM_ADDR
252 hex "CPM UART early debug transmit descriptor address" 269 hex "CPM UART early debug transmit descriptor address"
253 depends on PPC_EARLY_DEBUG_CPM 270 depends on PPC_EARLY_DEBUG_CPM
diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
index 3d0e4f921f1d..33f25b671340 100644
--- a/arch/powerpc/boot/4xx.c
+++ b/arch/powerpc/boot/4xx.c
@@ -22,16 +22,14 @@
22#include "dcr.h" 22#include "dcr.h"
23 23
24/* Read the 4xx SDRAM controller to get size of system memory. */ 24/* Read the 4xx SDRAM controller to get size of system memory. */
25void ibm4xx_fixup_memsize(void) 25void ibm4xx_sdram_fixup_memsize(void)
26{ 26{
27 int i; 27 int i;
28 unsigned long memsize, bank_config; 28 unsigned long memsize, bank_config;
29 29
30 memsize = 0; 30 memsize = 0;
31 for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) { 31 for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
32 mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]); 32 bank_config = SDRAM0_READ(sdram_bxcr[i]);
33 bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
34
35 if (bank_config & SDRAM_CONFIG_BANK_ENABLE) 33 if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
36 memsize += SDRAM_CONFIG_BANK_SIZE(bank_config); 34 memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
37 } 35 }
@@ -39,6 +37,69 @@ void ibm4xx_fixup_memsize(void)
39 dt_fixup_memory(0, memsize); 37 dt_fixup_memory(0, memsize);
40} 38}
41 39
40/* Read the 440SPe MQ controller to get size of system memory. */
41#define DCRN_MQ0_B0BAS 0x40
42#define DCRN_MQ0_B1BAS 0x41
43#define DCRN_MQ0_B2BAS 0x42
44#define DCRN_MQ0_B3BAS 0x43
45
46static u64 ibm440spe_decode_bas(u32 bas)
47{
48 u64 base = ((u64)(bas & 0xFFE00000u)) << 2;
49
50 /* open coded because I'm paranoid about invalid values */
51 switch ((bas >> 4) & 0xFFF) {
52 case 0:
53 return 0;
54 case 0xffc:
55 return base + 0x000800000ull;
56 case 0xff8:
57 return base + 0x001000000ull;
58 case 0xff0:
59 return base + 0x002000000ull;
60 case 0xfe0:
61 return base + 0x004000000ull;
62 case 0xfc0:
63 return base + 0x008000000ull;
64 case 0xf80:
65 return base + 0x010000000ull;
66 case 0xf00:
67 return base + 0x020000000ull;
68 case 0xe00:
69 return base + 0x040000000ull;
70 case 0xc00:
71 return base + 0x080000000ull;
72 case 0x800:
73 return base + 0x100000000ull;
74 }
75 printf("Memory BAS value 0x%08x unsupported !\n", bas);
76 return 0;
77}
78
79void ibm440spe_fixup_memsize(void)
80{
81 u64 banktop, memsize = 0;
82
83 /* Ultimately, we should directly construct the memory node
84 * so we are able to handle holes in the memory address space
85 */
86 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B0BAS));
87 if (banktop > memsize)
88 memsize = banktop;
89 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B1BAS));
90 if (banktop > memsize)
91 memsize = banktop;
92 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B2BAS));
93 if (banktop > memsize)
94 memsize = banktop;
95 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B3BAS));
96 if (banktop > memsize)
97 memsize = banktop;
98
99 dt_fixup_memory(0, memsize);
100}
101
102
42/* 4xx DDR1/2 Denali memory controller support */ 103/* 4xx DDR1/2 Denali memory controller support */
43/* DDR0 registers */ 104/* DDR0 registers */
44#define DDR0_02 2 105#define DDR0_02 2
@@ -77,19 +138,13 @@ void ibm4xx_fixup_memsize(void)
77 138
78#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask)) 139#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))
79 140
80static inline u32 mfdcr_sdram0(u32 reg)
81{
82 mtdcr(DCRN_SDRAM0_CFGADDR, reg);
83 return mfdcr(DCRN_SDRAM0_CFGDATA);
84}
85
86void ibm4xx_denali_fixup_memsize(void) 141void ibm4xx_denali_fixup_memsize(void)
87{ 142{
88 u32 val, max_cs, max_col, max_row; 143 u32 val, max_cs, max_col, max_row;
89 u32 cs, col, row, bank, dpath; 144 u32 cs, col, row, bank, dpath;
90 unsigned long memsize; 145 unsigned long memsize;
91 146
92 val = mfdcr_sdram0(DDR0_02); 147 val = SDRAM0_READ(DDR0_02);
93 if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT)) 148 if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
94 fatal("DDR controller is not initialized\n"); 149 fatal("DDR controller is not initialized\n");
95 150
@@ -99,7 +154,7 @@ void ibm4xx_denali_fixup_memsize(void)
99 max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT); 154 max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
100 155
101 /* get CS value */ 156 /* get CS value */
102 val = mfdcr_sdram0(DDR0_10); 157 val = SDRAM0_READ(DDR0_10);
103 158
104 val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT); 159 val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
105 cs = 0; 160 cs = 0;
@@ -115,7 +170,7 @@ void ibm4xx_denali_fixup_memsize(void)
115 fatal("DDR wrong CS configuration\n"); 170 fatal("DDR wrong CS configuration\n");
116 171
117 /* get data path bytes */ 172 /* get data path bytes */
118 val = mfdcr_sdram0(DDR0_14); 173 val = SDRAM0_READ(DDR0_14);
119 174
120 if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT)) 175 if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
121 dpath = 8; /* 64 bits */ 176 dpath = 8; /* 64 bits */
@@ -123,7 +178,7 @@ void ibm4xx_denali_fixup_memsize(void)
123 dpath = 4; /* 32 bits */ 178 dpath = 4; /* 32 bits */
124 179
125 /* get address pins (rows) */ 180 /* get address pins (rows) */
126 val = mfdcr_sdram0(DDR0_42); 181 val = SDRAM0_READ(DDR0_42);
127 182
128 row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT); 183 row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
129 if (row > max_row) 184 if (row > max_row)
@@ -131,7 +186,7 @@ void ibm4xx_denali_fixup_memsize(void)
131 row = max_row - row; 186 row = max_row - row;
132 187
133 /* get collomn size and banks */ 188 /* get collomn size and banks */
134 val = mfdcr_sdram0(DDR0_43); 189 val = SDRAM0_READ(DDR0_43);
135 190
136 col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT); 191 col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
137 if (col > max_col) 192 if (col > max_col)
@@ -179,13 +234,17 @@ void ibm40x_dbcr_reset(void)
179#define EMAC_RESET 0x20000000 234#define EMAC_RESET 0x20000000
180void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1) 235void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
181{ 236{
182 /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't do this for us */ 237 /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't
238 * do this for us
239 */
183 if (emac0) 240 if (emac0)
184 *emac0 = EMAC_RESET; 241 *emac0 = EMAC_RESET;
185 if (emac1) 242 if (emac1)
186 *emac1 = EMAC_RESET; 243 *emac1 = EMAC_RESET;
187 244
188 mtdcr(DCRN_MAL0_CFG, MAL_RESET); 245 mtdcr(DCRN_MAL0_CFG, MAL_RESET);
246 while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET)
247 ; /* loop until reset takes effect */
189} 248}
190 249
191/* Read 4xx EBC bus bridge registers to get mappings of the peripheral 250/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
@@ -217,84 +276,268 @@ void ibm4xx_fixup_ebc_ranges(const char *ebc)
217 setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32)); 276 setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
218} 277}
219 278
220#define SPRN_CCR1 0x378 279/* Calculate 440GP clocks */
221void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk) 280void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)
222{ 281{
223 u32 cpu, plb, opb, ebc, tb, uart0, m, vco; 282 u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
224 u32 reg; 283 u32 cr0 = mfdcr(DCRN_CPC0_CR0);
225 u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp; 284 u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
226 285 u32 opdv = CPC0_SYS0_OPDV(sys0);
227 mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0); 286 u32 epdv = CPC0_SYS0_EPDV(sys0);
228 reg = mfdcr(DCRN_CPR0_DATA); 287
229 tmp = (reg & 0x000F0000) >> 16; 288 if (sys0 & CPC0_SYS0_BYPASS) {
230 fwdva = tmp ? tmp : 16; 289 /* Bypass system PLL */
231 tmp = (reg & 0x00000700) >> 8; 290 cpu = plb = sys_clk;
232 fwdvb = tmp ? tmp : 8; 291 } else {
233 tmp = (reg & 0x1F000000) >> 24; 292 if (sys0 & CPC0_SYS0_EXTSL)
234 fbdv = tmp ? tmp : 32; 293 /* PerClk */
235 lfbdv = (reg & 0x0000007F); 294 m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
236
237 mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
238 reg = mfdcr(DCRN_CPR0_DATA);
239 tmp = (reg & 0x03000000) >> 24;
240 opbdv0 = tmp ? tmp : 4;
241
242 mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
243 reg = mfdcr(DCRN_CPR0_DATA);
244 tmp = (reg & 0x07000000) >> 24;
245 perdv0 = tmp ? tmp : 8;
246
247 mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
248 reg = mfdcr(DCRN_CPR0_DATA);
249 tmp = (reg & 0x07000000) >> 24;
250 prbdv0 = tmp ? tmp : 8;
251
252 mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
253 reg = mfdcr(DCRN_CPR0_DATA);
254 tmp = (reg & 0x03000000) >> 24;
255 spcid0 = tmp ? tmp : 4;
256
257 /* Calculate M */
258 mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
259 reg = mfdcr(DCRN_CPR0_DATA);
260 tmp = (reg & 0x03000000) >> 24;
261 if (tmp == 0) { /* PLL output */
262 tmp = (reg & 0x20000000) >> 29;
263 if (!tmp) /* PLLOUTA */
264 m = fbdv * lfbdv * fwdva;
265 else 295 else
266 m = fbdv * lfbdv * fwdvb; 296 /* CPU clock */
297 m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
298 cpu = sys_clk * m / CPC0_SYS0_FWDVA(sys0);
299 plb = sys_clk * m / CPC0_SYS0_FWDVB(sys0);
267 } 300 }
268 else if (tmp == 1) /* CPU output */ 301
269 m = fbdv * fwdva; 302 opb = plb / opdv;
303 ebc = opb / epdv;
304
305 /* FIXME: Check if this is for all 440GP, or just Ebony */
306 if ((mfpvr() & 0xf0000fff) == 0x40000440)
307 /* Rev. B 440GP, use external system clock */
308 tb = sys_clk;
270 else 309 else
271 m = perdv0 * opbdv0 * fwdvb; 310 /* Rev. C 440GP, errata force us to use internal clock */
311 tb = cpu;
272 312
273 vco = (m * sysclk) + (m >> 1); 313 if (cr0 & CPC0_CR0_U0EC)
274 cpu = vco / fwdva; 314 /* External UART clock */
275 plb = vco / fwdvb / prbdv0; 315 uart0 = ser_clk;
276 opb = plb / opbdv0; 316 else
277 ebc = plb / perdv0; 317 /* Internal UART clock */
318 uart0 = plb / CPC0_CR0_UDIV(cr0);
319
320 if (cr0 & CPC0_CR0_U1EC)
321 /* External UART clock */
322 uart1 = ser_clk;
323 else
324 /* Internal UART clock */
325 uart1 = plb / CPC0_CR0_UDIV(cr0);
326
327 printf("PPC440GP: SysClk = %dMHz (%x)\n\r",
328 (sys_clk + 500000) / 1000000, sys_clk);
329
330 dt_fixup_cpu_clocks(cpu, tb, 0);
278 331
279 /* FIXME */ 332 dt_fixup_clock("/plb", plb);
280 uart0 = ser_clk; 333 dt_fixup_clock("/plb/opb", opb);
334 dt_fixup_clock("/plb/opb/ebc", ebc);
335 dt_fixup_clock("/plb/opb/serial@40000200", uart0);
336 dt_fixup_clock("/plb/opb/serial@40000300", uart1);
337}
338
339#define SPRN_CCR1 0x378
340
341static inline u32 __fix_zero(u32 v, u32 def)
342{
343 return v ? v : def;
344}
345
346static unsigned int __ibm440eplike_fixup_clocks(unsigned int sys_clk,
347 unsigned int tmr_clk,
348 int per_clk_from_opb)
349{
350 /* PLL config */
351 u32 pllc = CPR0_READ(DCRN_CPR0_PLLC);
352 u32 plld = CPR0_READ(DCRN_CPR0_PLLD);
353
354 /* Dividers */
355 u32 fbdv = __fix_zero((plld >> 24) & 0x1f, 32);
356 u32 fwdva = __fix_zero((plld >> 16) & 0xf, 16);
357 u32 fwdvb = __fix_zero((plld >> 8) & 7, 8);
358 u32 lfbdv = __fix_zero(plld & 0x3f, 64);
359 u32 pradv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PRIMAD) >> 24) & 7, 8);
360 u32 prbdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PRIMBD) >> 24) & 7, 8);
361 u32 opbdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_OPBD) >> 24) & 3, 4);
362 u32 perdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PERD) >> 24) & 3, 4);
363
364 /* Input clocks for primary dividers */
365 u32 clk_a, clk_b;
366
367 /* Resulting clocks */
368 u32 cpu, plb, opb, ebc, vco;
369
370 /* Timebase */
371 u32 ccr1, tb = tmr_clk;
372
373 if (pllc & 0x40000000) {
374 u32 m;
375
376 /* Feedback path */
377 switch ((pllc >> 24) & 7) {
378 case 0:
379 /* PLLOUTx */
380 m = ((pllc & 0x20000000) ? fwdvb : fwdva) * lfbdv;
381 break;
382 case 1:
383 /* CPU */
384 m = fwdva * pradv0;
385 break;
386 case 5:
387 /* PERClk */
388 m = fwdvb * prbdv0 * opbdv0 * perdv0;
389 break;
390 default:
391 printf("WARNING ! Invalid PLL feedback source !\n");
392 goto bypass;
393 }
394 m *= fbdv;
395 vco = sys_clk * m;
396 clk_a = vco / fwdva;
397 clk_b = vco / fwdvb;
398 } else {
399bypass:
400 /* Bypass system PLL */
401 vco = 0;
402 clk_a = clk_b = sys_clk;
403 }
404
405 cpu = clk_a / pradv0;
406 plb = clk_b / prbdv0;
407 opb = plb / opbdv0;
408 ebc = (per_clk_from_opb ? opb : plb) / perdv0;
281 409
282 /* Figure out timebase. Either CPU or default TmrClk */ 410 /* Figure out timebase. Either CPU or default TmrClk */
283 asm volatile ( 411 ccr1 = mfspr(SPRN_CCR1);
284 "mfspr %0,%1\n" 412
285 : 413 /* If passed a 0 tmr_clk, force CPU clock */
286 "=&r"(reg) : "i"(SPRN_CCR1)); 414 if (tb == 0) {
287 if (reg & 0x0080) 415 ccr1 &= ~0x80u;
288 tb = 25000000; /* TmrClk is 25MHz */ 416 mtspr(SPRN_CCR1, ccr1);
289 else 417 }
418 if ((ccr1 & 0x0080) == 0)
290 tb = cpu; 419 tb = cpu;
291 420
292 dt_fixup_cpu_clocks(cpu, tb, 0); 421 dt_fixup_cpu_clocks(cpu, tb, 0);
293 dt_fixup_clock("/plb", plb); 422 dt_fixup_clock("/plb", plb);
294 dt_fixup_clock("/plb/opb", opb); 423 dt_fixup_clock("/plb/opb", opb);
295 dt_fixup_clock("/plb/opb/ebc", ebc); 424 dt_fixup_clock("/plb/opb/ebc", ebc);
425
426 return plb;
427}
428
429static void eplike_fixup_uart_clk(int index, const char *path,
430 unsigned int ser_clk,
431 unsigned int plb_clk)
432{
433 unsigned int sdr;
434 unsigned int clock;
435
436 switch (index) {
437 case 0:
438 sdr = SDR0_READ(DCRN_SDR0_UART0);
439 break;
440 case 1:
441 sdr = SDR0_READ(DCRN_SDR0_UART1);
442 break;
443 case 2:
444 sdr = SDR0_READ(DCRN_SDR0_UART2);
445 break;
446 case 3:
447 sdr = SDR0_READ(DCRN_SDR0_UART3);
448 break;
449 default:
450 return;
451 }
452
453 if (sdr & 0x00800000u)
454 clock = ser_clk;
455 else
456 clock = plb_clk / __fix_zero(sdr & 0xff, 256);
457
458 dt_fixup_clock(path, clock);
459}
460
461void ibm440ep_fixup_clocks(unsigned int sys_clk,
462 unsigned int ser_clk,
463 unsigned int tmr_clk)
464{
465 unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 0);
466
467 /* serial clocks beed fixup based on int/ext */
468 eplike_fixup_uart_clk(0, "/plb/opb/serial@ef600300", ser_clk, plb_clk);
469 eplike_fixup_uart_clk(1, "/plb/opb/serial@ef600400", ser_clk, plb_clk);
470 eplike_fixup_uart_clk(2, "/plb/opb/serial@ef600500", ser_clk, plb_clk);
471 eplike_fixup_uart_clk(3, "/plb/opb/serial@ef600600", ser_clk, plb_clk);
472}
473
474void ibm440gx_fixup_clocks(unsigned int sys_clk,
475 unsigned int ser_clk,
476 unsigned int tmr_clk)
477{
478 unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1);
479
480 /* serial clocks beed fixup based on int/ext */
481 eplike_fixup_uart_clk(0, "/plb/opb/serial@40000200", ser_clk, plb_clk);
482 eplike_fixup_uart_clk(1, "/plb/opb/serial@40000300", ser_clk, plb_clk);
483}
484
485void ibm440spe_fixup_clocks(unsigned int sys_clk,
486 unsigned int ser_clk,
487 unsigned int tmr_clk)
488{
489 unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1);
490
491 /* serial clocks beed fixup based on int/ext */
492 eplike_fixup_uart_clk(0, "/plb/opb/serial@10000200", ser_clk, plb_clk);
493 eplike_fixup_uart_clk(1, "/plb/opb/serial@10000300", ser_clk, plb_clk);
494 eplike_fixup_uart_clk(2, "/plb/opb/serial@10000600", ser_clk, plb_clk);
495}
496
497void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)
498{
499 u32 pllmr = mfdcr(DCRN_CPC0_PLLMR);
500 u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0);
501 u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1);
502 u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
503 u32 fwdv, fbdv, cbdv, opdv, epdv, udiv;
504
505 fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
506 fbdv = (pllmr & 0x1e000000) >> 25;
507 cbdv = ((pllmr & 0x00060000) >> 17) + 1;
508 opdv = ((pllmr & 0x00018000) >> 15) + 1;
509 epdv = ((pllmr & 0x00001800) >> 13) + 2;
510 udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
511
512 m = fwdv * fbdv * cbdv;
513
514 cpu = sys_clk * m / fwdv;
515 plb = cpu / cbdv;
516 opb = plb / opdv;
517 ebc = plb / epdv;
518
519 if (cpc0_cr0 & 0x80)
520 /* uart0 uses the external clock */
521 uart0 = ser_clk;
522 else
523 uart0 = cpu / udiv;
524
525 if (cpc0_cr0 & 0x40)
526 /* uart1 uses the external clock */
527 uart1 = ser_clk;
528 else
529 uart1 = cpu / udiv;
530
531 /* setup the timebase clock to tick at the cpu frequency */
532 cpc0_cr1 = cpc0_cr1 & ~0x00800000;
533 mtdcr(DCRN_405_CPC0_CR1, cpc0_cr1);
534 tb = cpu;
535
536 dt_fixup_cpu_clocks(cpu, tb, 0);
537 dt_fixup_clock("/plb", plb);
538 dt_fixup_clock("/plb/opb", opb);
539 dt_fixup_clock("/plb/ebc", ebc);
296 dt_fixup_clock("/plb/opb/serial@ef600300", uart0); 540 dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
297 dt_fixup_clock("/plb/opb/serial@ef600400", uart0); 541 dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
298 dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
299 dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
300} 542}
543
diff --git a/arch/powerpc/boot/4xx.h b/arch/powerpc/boot/4xx.h
index adba6a599a93..fbe0632621ca 100644
--- a/arch/powerpc/boot/4xx.h
+++ b/arch/powerpc/boot/4xx.h
@@ -11,12 +11,21 @@
11#ifndef _POWERPC_BOOT_4XX_H_ 11#ifndef _POWERPC_BOOT_4XX_H_
12#define _POWERPC_BOOT_4XX_H_ 12#define _POWERPC_BOOT_4XX_H_
13 13
14void ibm4xx_fixup_memsize(void); 14void ibm4xx_sdram_fixup_memsize(void);
15void ibm440spe_fixup_memsize(void);
15void ibm4xx_denali_fixup_memsize(void); 16void ibm4xx_denali_fixup_memsize(void);
16void ibm44x_dbcr_reset(void); 17void ibm44x_dbcr_reset(void);
17void ibm40x_dbcr_reset(void); 18void ibm40x_dbcr_reset(void);
18void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1); 19void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1);
19void ibm4xx_fixup_ebc_ranges(const char *ebc); 20void ibm4xx_fixup_ebc_ranges(const char *ebc);
20void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk); 21
22void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
23void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
24void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
25 unsigned int tmr_clk);
26void ibm440gx_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
27 unsigned int tmr_clk);
28void ibm440spe_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
29 unsigned int tmr_clk);
21 30
22#endif /* _POWERPC_BOOT_4XX_H_ */ 31#endif /* _POWERPC_BOOT_4XX_H_ */
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 9149bb8ed03c..d1e625c073bb 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -37,8 +37,11 @@ BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt
37 37
38$(obj)/4xx.o: BOOTCFLAGS += -mcpu=440 38$(obj)/4xx.o: BOOTCFLAGS += -mcpu=440
39$(obj)/ebony.o: BOOTCFLAGS += -mcpu=440 39$(obj)/ebony.o: BOOTCFLAGS += -mcpu=440
40$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
41$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
40$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 42$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
41 43
44
42zlib := inffast.c inflate.c inftrees.c 45zlib := inffast.c inflate.c inftrees.c
43zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h 46zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
44zliblinuxheader := zlib.h zconf.h zutil.h 47zliblinuxheader := zlib.h zconf.h zutil.h
@@ -58,7 +61,8 @@ src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
58 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ 61 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
59 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ 62 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
60 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \ 63 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
61 fixed-head.S ep88xc.c cuboot-hpc2.c 64 fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
65 cuboot-katmai.c cuboot-rainier.c
62src-boot := $(src-wlib) $(src-plat) empty.c 66src-boot := $(src-wlib) $(src-plat) empty.c
63 67
64src-boot := $(addprefix $(obj)/, $(src-boot)) 68src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -189,6 +193,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImage
189ifneq ($(CONFIG_DEVICE_TREE),"") 193ifneq ($(CONFIG_DEVICE_TREE),"")
190image-$(CONFIG_PPC_8xx) += cuImage.8xx 194image-$(CONFIG_PPC_8xx) += cuImage.8xx
191image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc 195image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc
196image-$(CONFIG_EP405) += zImage.ep405
192image-$(CONFIG_8260) += cuImage.pq2 197image-$(CONFIG_8260) += cuImage.pq2
193image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx 198image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx
194image-$(CONFIG_PPC_83xx) += cuImage.83xx 199image-$(CONFIG_PPC_83xx) += cuImage.83xx
@@ -197,7 +202,10 @@ image-$(CONFIG_MPC7448HPC2) += cuImage.hpc2
197image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony 202image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
198image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo 203image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
199image-$(CONFIG_SEQUOIA) += cuImage.sequoia 204image-$(CONFIG_SEQUOIA) += cuImage.sequoia
205image-$(CONFIG_RAINIER) += cuImage.rainier
200image-$(CONFIG_WALNUT) += treeImage.walnut 206image-$(CONFIG_WALNUT) += treeImage.walnut
207image-$(CONFIG_TAISHAN) += cuImage.taishan
208image-$(CONFIG_KATMAI) += cuImage.katmai
201endif 209endif
202 210
203# For 32-bit powermacs, build the COFF and miboot images 211# For 32-bit powermacs, build the COFF and miboot images
diff --git a/arch/powerpc/boot/bamboo.c b/arch/powerpc/boot/bamboo.c
index e634359d98e9..54b33f1500e2 100644
--- a/arch/powerpc/boot/bamboo.c
+++ b/arch/powerpc/boot/bamboo.c
@@ -30,8 +30,8 @@ static void bamboo_fixups(void)
30{ 30{
31 unsigned long sysclk = 33333333; 31 unsigned long sysclk = 33333333;
32 32
33 ibm440ep_fixup_clocks(sysclk, 11059200); 33 ibm440ep_fixup_clocks(sysclk, 11059200, 25000000);
34 ibm4xx_fixup_memsize(); 34 ibm4xx_sdram_fixup_memsize();
35 ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); 35 ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
36 dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1); 36 dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1);
37} 37}
diff --git a/arch/powerpc/boot/cuboot-katmai.c b/arch/powerpc/boot/cuboot-katmai.c
new file mode 100644
index 000000000000..c021167f9381
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-katmai.c
@@ -0,0 +1,56 @@
1/*
2 * Old U-boot compatibility for Katmai
3 *
4 * Author: Hugh Blemings <hugh@au.ibm.com>
5 *
6 * Copyright 2007 Hugh Blemings, IBM Corporation.
7 * Based on cuboot-ebony.c which is:
8 * Copyright 2007 David Gibson, IBM Corporation.
9 * Based on cuboot-83xx.c, which is:
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
15 */
16
17#include "ops.h"
18#include "stdio.h"
19#include "reg.h"
20#include "dcr.h"
21#include "4xx.h"
22#include "44x.h"
23#include "cuboot.h"
24
25#define TARGET_44x
26#include "ppcboot.h"
27
28static bd_t bd;
29
30BSS_STACK(4096);
31
32static void katmai_fixups(void)
33{
34 unsigned long sysclk = 33333000;
35
36 /* 440SP Clock logic is all but identical to 440GX
37 * so we just use that code for now at least
38 */
39 ibm440spe_fixup_clocks(sysclk, 6 * 1843200, 0);
40
41 ibm440spe_fixup_memsize();
42
43 dt_fixup_mac_address(0, bd.bi_enetaddr);
44
45 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
46}
47
48void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
49 unsigned long r6, unsigned long r7)
50{
51 CUBOOT_INIT();
52
53 platform_ops.fixups = katmai_fixups;
54 fdt_init(_dtb_start);
55 serial_console_init();
56}
diff --git a/arch/powerpc/boot/cuboot-rainier.c b/arch/powerpc/boot/cuboot-rainier.c
new file mode 100644
index 000000000000..cf452b66dce8
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-rainier.c
@@ -0,0 +1,56 @@
1/*
2 * Old U-boot compatibility for Rainier
3 *
4 * Valentine Barshak <vbarshak@ru.mvista.com>
5 * Copyright 2007 MontaVista Software, Inc
6 *
7 * Based on Ebony code by David Gibson <david@gibson.dropbear.id.au>
8 * Copyright IBM Corporation, 2007
9 *
10 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
11 * Copyright IBM Corporation, 2007
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; version 2 of the License
16 */
17
18#include <stdarg.h>
19#include <stddef.h>
20#include "types.h"
21#include "elf.h"
22#include "string.h"
23#include "stdio.h"
24#include "page.h"
25#include "ops.h"
26#include "dcr.h"
27#include "4xx.h"
28#include "44x.h"
29#include "cuboot.h"
30
31#define TARGET_4xx
32#define TARGET_44x
33#include "ppcboot.h"
34
35static bd_t bd;
36
37
38static void rainier_fixups(void)
39{
40 unsigned long sysclk = 33333333;
41
42 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
44 ibm4xx_denali_fixup_memsize();
45 dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
46}
47
48void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
49 unsigned long r6, unsigned long r7)
50{
51 CUBOOT_INIT();
52 platform_ops.fixups = rainier_fixups;
53 platform_ops.exit = ibm44x_dbcr_reset;
54 fdt_init(_dtb_start);
55 serial_console_init();
56}
diff --git a/arch/powerpc/boot/cuboot-sequoia.c b/arch/powerpc/boot/cuboot-sequoia.c
index cf78260fcf3f..f555575a44de 100644
--- a/arch/powerpc/boot/cuboot-sequoia.c
+++ b/arch/powerpc/boot/cuboot-sequoia.c
@@ -39,7 +39,7 @@ static void sequoia_fixups(void)
39{ 39{
40 unsigned long sysclk = 33333333; 40 unsigned long sysclk = 33333333;
41 41
42 ibm440ep_fixup_clocks(sysclk, 11059200); 42 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); 43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
44 ibm4xx_denali_fixup_memsize(); 44 ibm4xx_denali_fixup_memsize();
45 dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr); 45 dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
diff --git a/arch/powerpc/boot/cuboot-taishan.c b/arch/powerpc/boot/cuboot-taishan.c
new file mode 100644
index 000000000000..f66455a45ab1
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-taishan.c
@@ -0,0 +1,54 @@
1/*
2 * Old U-boot compatibility for Taishan
3 *
4 * Author: Hugh Blemings <hugh@au.ibm.com>
5 *
6 * Copyright 2007 Hugh Blemings, IBM Corporation.
7 * Based on cuboot-ebony.c which is:
8 * Copyright 2007 David Gibson, IBM Corporation.
9 * Based on cuboot-83xx.c, which is:
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
15 */
16
17#include "ops.h"
18#include "stdio.h"
19#include "cuboot.h"
20#include "reg.h"
21#include "dcr.h"
22#include "4xx.h"
23
24#define TARGET_44x
25#include "ppcboot.h"
26
27static bd_t bd;
28
29BSS_STACK(4096);
30
31static void taishan_fixups(void)
32{
33 /* FIXME: sysclk should be derived by reading the FPGA
34 registers */
35 unsigned long sysclk = 33000000;
36
37 ibm440gx_fixup_clocks(sysclk, 6 * 1843200, 25000000);
38
39 ibm4xx_sdram_fixup_memsize();
40
41 dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
42
43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
44}
45
46void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
47 unsigned long r6, unsigned long r7)
48{
49 CUBOOT_INIT();
50
51 platform_ops.fixups = taishan_fixups;
52 fdt_init(_dtb_start);
53 serial_console_init();
54}
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 83b88aa92888..55655f78505a 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -14,12 +14,20 @@
14#define DCRN_SDRAM0_CFGADDR 0x010 14#define DCRN_SDRAM0_CFGADDR 0x010
15#define DCRN_SDRAM0_CFGDATA 0x011 15#define DCRN_SDRAM0_CFGDATA 0x011
16 16
17#define SDRAM0_READ(offset) ({\
18 mtdcr(DCRN_SDRAM0_CFGADDR, offset); \
19 mfdcr(DCRN_SDRAM0_CFGDATA); })
20#define SDRAM0_WRITE(offset, data) ({\
21 mtdcr(DCRN_SDRAM0_CFGADDR, offset); \
22 mtdcr(DCRN_SDRAM0_CFGDATA, data); })
23
17#define SDRAM0_B0CR 0x40 24#define SDRAM0_B0CR 0x40
18#define SDRAM0_B1CR 0x44 25#define SDRAM0_B1CR 0x44
19#define SDRAM0_B2CR 0x48 26#define SDRAM0_B2CR 0x48
20#define SDRAM0_B3CR 0x4c 27#define SDRAM0_B3CR 0x4c
21 28
22static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2CR, SDRAM0_B3CR }; 29static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
30 SDRAM0_B2CR, SDRAM0_B3CR };
23 31
24#define SDRAM_CONFIG_BANK_ENABLE 0x00000001 32#define SDRAM_CONFIG_BANK_ENABLE 0x00000001
25#define SDRAM_CONFIG_SIZE_MASK 0x000e0000 33#define SDRAM_CONFIG_SIZE_MASK 0x000e0000
@@ -139,4 +147,48 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2C
139#define DCRN_405_CPC0_CR0 0xb1 147#define DCRN_405_CPC0_CR0 0xb1
140#define DCRN_405_CPC0_CR1 0xb2 148#define DCRN_405_CPC0_CR1 0xb2
141 149
150
151/* 440GX Clock control etc */
152
153
154#define DCRN_CPR0_CLKUPD 0x020
155#define DCRN_CPR0_PLLC 0x040
156#define DCRN_CPR0_PLLD 0x060
157#define DCRN_CPR0_PRIMAD 0x080
158#define DCRN_CPR0_PRIMBD 0x0a0
159#define DCRN_CPR0_OPBD 0x0c0
160#define DCRN_CPR0_PERD 0x0e0
161#define DCRN_CPR0_MALD 0x100
162
163#define DCRN_SDR0_CONFIG_ADDR 0xe
164#define DCRN_SDR0_CONFIG_DATA 0xf
165
166/* SDR read/write helper macros */
167#define SDR0_READ(offset) ({\
168 mtdcr(DCRN_SDR0_CONFIG_ADDR, offset); \
169 mfdcr(DCRN_SDR0_CONFIG_DATA); })
170#define SDR0_WRITE(offset, data) ({\
171 mtdcr(DCRN_SDR0_CONFIG_ADDR, offset); \
172 mtdcr(DCRN_SDR0_CONFIG_DATA, data); })
173
174#define DCRN_SDR0_UART0 0x0120
175#define DCRN_SDR0_UART1 0x0121
176#define DCRN_SDR0_UART2 0x0122
177#define DCRN_SDR0_UART3 0x0123
178
179
180/* CPRs read/write helper macros - based off include/asm-ppc/ibm44x.h */
181
182#define DCRN_CPR0_CFGADDR 0xc
183#define DCRN_CPR0_CFGDATA 0xd
184
185#define CPR0_READ(offset) ({\
186 mtdcr(DCRN_CPR0_CFGADDR, offset); \
187 mfdcr(DCRN_CPR0_CFGDATA); })
188#define CPR0_WRITE(offset, data) ({\
189 mtdcr(DCRN_CPR0_CFGADDR, offset); \
190 mtdcr(DCRN_CPR0_CFGDATA, data); })
191
192
193
142#endif /* _PPC_BOOT_DCR_H_ */ 194#endif /* _PPC_BOOT_DCR_H_ */
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index cb2fb50a281c..29f1a6f3e373 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -16,14 +16,24 @@
16 #size-cells = <1>; 16 #size-cells = <1>;
17 model = "amcc,bamboo"; 17 model = "amcc,bamboo";
18 compatible = "amcc,bamboo"; 18 compatible = "amcc,bamboo";
19 dcr-parent = <&/cpus/PowerPC,440EP@0>; 19 dcr-parent = <&/cpus/cpu@0>;
20
21 aliases {
22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 serial2 = &UART2;
27 serial3 = &UART3;
28 };
20 29
21 cpus { 30 cpus {
22 #address-cells = <1>; 31 #address-cells = <1>;
23 #size-cells = <0>; 32 #size-cells = <0>;
24 33
25 PowerPC,440EP@0 { 34 cpu@0 {
26 device_type = "cpu"; 35 device_type = "cpu";
36 model = "PowerPC,440EP";
27 reg = <0>; 37 reg = <0>;
28 clock-frequency = <0>; /* Filled in by zImage */ 38 clock-frequency = <0>; /* Filled in by zImage */
29 timebase-frequency = <0>; /* Filled in by zImage */ 39 timebase-frequency = <0>; /* Filled in by zImage */
@@ -126,7 +136,6 @@
126 #address-cells = <2>; 136 #address-cells = <2>;
127 #size-cells = <1>; 137 #size-cells = <1>;
128 clock-frequency = <0>; /* Filled in by zImage */ 138 clock-frequency = <0>; /* Filled in by zImage */
129 ranges;
130 interrupts = <5 1>; 139 interrupts = <5 1>;
131 interrupt-parent = <&UIC1>; 140 interrupt-parent = <&UIC1>;
132 }; 141 };
@@ -238,11 +247,56 @@
238 zmii-device = <&ZMII0>; 247 zmii-device = <&ZMII0>;
239 zmii-channel = <1>; 248 zmii-channel = <1>;
240 }; 249 };
250
251 usb@ef601000 {
252 compatible = "ohci-be";
253 reg = <ef601000 80>;
254 interrupts = <8 1 9 1>;
255 interrupt-parent = < &UIC1 >;
256 };
257 };
258
259 PCI0: pci@ec000000 {
260 device_type = "pci";
261 #interrupt-cells = <1>;
262 #size-cells = <2>;
263 #address-cells = <3>;
264 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
265 primary;
266 reg = <0 eec00000 8 /* Config space access */
267 0 eed00000 4 /* IACK */
268 0 eed00000 4 /* Special cycle */
269 0 ef400000 40>; /* Internal registers */
270
271 /* Outbound ranges, one memory and one IO,
272 * later cannot be changed. Chip supports a second
273 * IO range but we don't use it for now
274 */
275 ranges = <02000000 0 a0000000 0 a0000000 0 20000000
276 01000000 0 00000000 0 e8000000 0 00010000>;
277
278 /* Inbound 2GB range starting at 0 */
279 dma-ranges = <42000000 0 0 0 0 0 80000000>;
280
281 /* Bamboo has all 4 IRQ pins tied together per slot */
282 interrupt-map-mask = <f800 0 0 0>;
283 interrupt-map = <
284 /* IDSEL 1 */
285 0800 0 0 0 &UIC0 1c 8
286
287 /* IDSEL 2 */
288 1000 0 0 0 &UIC0 1b 8
289
290 /* IDSEL 3 */
291 1800 0 0 0 &UIC0 1a 8
292
293 /* IDSEL 4 */
294 2000 0 0 0 &UIC0 19 8
295 >;
241 }; 296 };
242 }; 297 };
243 298
244 chosen { 299 chosen {
245 linux,stdout-path = "/plb/opb/serial@ef600300"; 300 linux,stdout-path = "/plb/opb/serial@ef600300";
246 bootargs = "console=ttyS0,115200";
247 }; 301 };
248}; 302};
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts
index bc259972aaa0..f8790c4747df 100644
--- a/arch/powerpc/boot/dts/ebony.dts
+++ b/arch/powerpc/boot/dts/ebony.dts
@@ -16,14 +16,22 @@
16 #size-cells = <1>; 16 #size-cells = <1>;
17 model = "ibm,ebony"; 17 model = "ibm,ebony";
18 compatible = "ibm,ebony"; 18 compatible = "ibm,ebony";
19 dcr-parent = <&/cpus/PowerPC,440GP@0>; 19 dcr-parent = <&/cpus/cpu@0>;
20
21 aliases {
22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 };
20 27
21 cpus { 28 cpus {
22 #address-cells = <1>; 29 #address-cells = <1>;
23 #size-cells = <0>; 30 #size-cells = <0>;
24 31
25 PowerPC,440GP@0 { 32 cpu@0 {
26 device_type = "cpu"; 33 device_type = "cpu";
34 model = "PowerPC,440GP";
27 reg = <0>; 35 reg = <0>;
28 clock-frequency = <0>; // Filled in by zImage 36 clock-frequency = <0>; // Filled in by zImage
29 timebase-frequency = <0>; // Filled in by zImage 37 timebase-frequency = <0>; // Filled in by zImage
@@ -284,12 +292,43 @@
284 292
285 }; 293 };
286 294
287 PCIX0: pci@1234 { 295 PCIX0: pci@20ec00000 {
288 device_type = "pci"; 296 device_type = "pci";
289 /* FIXME */ 297 #interrupt-cells = <1>;
290 reg = <2 0ec00000 8 298 #size-cells = <2>;
291 2 0ec80000 f0 299 #address-cells = <3>;
292 2 0ec80100 fc>; 300 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
301 primary;
302 reg = <2 0ec00000 8 /* Config space access */
303 0 0 0 /* no IACK cycles */
304 2 0ed00000 4 /* Special cycles */
305 2 0ec80000 f0 /* Internal registers */
306 2 0ec80100 fc>; /* Internal messaging registers */
307
308 /* Outbound ranges, one memory and one IO,
309 * later cannot be changed
310 */
311 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
312 01000000 0 00000000 00000002 08000000 0 00010000>;
313
314 /* Inbound 2GB range starting at 0 */
315 dma-ranges = <42000000 0 0 0 0 0 80000000>;
316
317 /* Ebony has all 4 IRQ pins tied together per slot */
318 interrupt-map-mask = <f800 0 0 0>;
319 interrupt-map = <
320 /* IDSEL 1 */
321 0800 0 0 0 &UIC0 17 8
322
323 /* IDSEL 2 */
324 1000 0 0 0 &UIC0 18 8
325
326 /* IDSEL 3 */
327 1800 0 0 0 &UIC0 19 8
328
329 /* IDSEL 4 */
330 2000 0 0 0 &UIC0 1a 8
331 >;
293 }; 332 };
294 }; 333 };
295 334
diff --git a/arch/powerpc/boot/dts/ep405.dts b/arch/powerpc/boot/dts/ep405.dts
new file mode 100644
index 000000000000..92938557ac8a
--- /dev/null
+++ b/arch/powerpc/boot/dts/ep405.dts
@@ -0,0 +1,228 @@
1/*
2 * Device Tree Source for EP405
3 *
4 * Copyright 2007 IBM Corp.
5 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
10 */
11
12/ {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 model = "ep405";
16 compatible = "ep405";
17 dcr-parent = <&/cpus/cpu@0>;
18
19 aliases {
20 ethernet0 = &EMAC;
21 serial0 = &UART0;
22 serial1 = &UART1;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@0 {
30 device_type = "cpu";
31 model = "PowerPC,405GP";
32 reg = <0>;
33 clock-frequency = <bebc200>; /* Filled in by zImage */
34 timebase-frequency = <0>; /* Filled in by zImage */
35 i-cache-line-size = <20>;
36 d-cache-line-size = <20>;
37 i-cache-size = <4000>;
38 d-cache-size = <4000>;
39 dcr-controller;
40 dcr-access-method = "native";
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0 0>; /* Filled in by zImage */
47 };
48
49 UIC0: interrupt-controller {
50 compatible = "ibm,uic";
51 interrupt-controller;
52 cell-index = <0>;
53 dcr-reg = <0c0 9>;
54 #address-cells = <0>;
55 #size-cells = <0>;
56 #interrupt-cells = <2>;
57 };
58
59 plb {
60 compatible = "ibm,plb3";
61 #address-cells = <1>;
62 #size-cells = <1>;
63 ranges;
64 clock-frequency = <0>; /* Filled in by zImage */
65
66 SDRAM0: memory-controller {
67 compatible = "ibm,sdram-405gp";
68 dcr-reg = <010 2>;
69 };
70
71 MAL: mcmal {
72 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
73 dcr-reg = <180 62>;
74 num-tx-chans = <1>;
75 num-rx-chans = <1>;
76 interrupt-parent = <&UIC0>;
77 interrupts = <
78 b 4 /* TXEOB */
79 c 4 /* RXEOB */
80 a 4 /* SERR */
81 d 4 /* TXDE */
82 e 4 /* RXDE */>;
83 };
84
85 POB0: opb {
86 compatible = "ibm,opb-405gp", "ibm,opb";
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges = <ef600000 ef600000 a00000>;
90 dcr-reg = <0a0 5>;
91 clock-frequency = <0>; /* Filled in by zImage */
92
93 UART0: serial@ef600300 {
94 device_type = "serial";
95 compatible = "ns16550";
96 reg = <ef600300 8>;
97 virtual-reg = <ef600300>;
98 clock-frequency = <0>; /* Filled in by zImage */
99 current-speed = <2580>;
100 interrupt-parent = <&UIC0>;
101 interrupts = <0 4>;
102 };
103
104 UART1: serial@ef600400 {
105 device_type = "serial";
106 compatible = "ns16550";
107 reg = <ef600400 8>;
108 virtual-reg = <ef600400>;
109 clock-frequency = <0>; /* Filled in by zImage */
110 current-speed = <2580>;
111 interrupt-parent = <&UIC0>;
112 interrupts = <1 4>;
113 };
114
115 IIC: i2c@ef600500 {
116 compatible = "ibm,iic-405gp", "ibm,iic";
117 reg = <ef600500 11>;
118 interrupt-parent = <&UIC0>;
119 interrupts = <2 4>;
120 };
121
122 GPIO: gpio@ef600700 {
123 compatible = "ibm,gpio-405gp";
124 reg = <ef600700 20>;
125 };
126
127 EMAC: ethernet@ef600800 {
128 linux,network-index = <0>;
129 device_type = "network";
130 compatible = "ibm,emac-405gp", "ibm,emac";
131 interrupt-parent = <&UIC0>;
132 interrupts = <
133 f 4 /* Ethernet */
134 9 4 /* Ethernet Wake Up */>;
135 local-mac-address = [000000000000]; /* Filled in by zImage */
136 reg = <ef600800 70>;
137 mal-device = <&MAL>;
138 mal-tx-channel = <0>;
139 mal-rx-channel = <0>;
140 cell-index = <0>;
141 max-frame-size = <5dc>;
142 rx-fifo-size = <1000>;
143 tx-fifo-size = <800>;
144 phy-mode = "rmii";
145 phy-map = <00000000>;
146 };
147
148 };
149
150 EBC0: ebc {
151 compatible = "ibm,ebc-405gp", "ibm,ebc";
152 dcr-reg = <012 2>;
153 #address-cells = <2>;
154 #size-cells = <1>;
155
156
157 /* The ranges property is supplied by the bootwrapper
158 * and is based on the firmware's configuration of the
159 * EBC bridge
160 */
161 clock-frequency = <0>; /* Filled in by zImage */
162
163 /* NVRAM and RTC */
164 nvrtc@4,200000 {
165 compatible = "ds1742";
166 reg = <4 200000 0>; /* size fixed up by zImage */
167 };
168
169 /* "BCSR" CPLD contains a PCI irq controller */
170 bcsr@4,0 {
171 compatible = "ep405-bcsr";
172 reg = <4 0 10>;
173 interrupt-controller;
174 /* Routing table */
175 irq-routing = [ 00 /* SYSERR */
176 01 /* STTM */
177 01 /* RTC */
178 01 /* FENET */
179 02 /* NB PCIIRQ mux ? */
180 03 /* SB Winbond 8259 ? */
181 04 /* Serial Ring */
182 05 /* USB (ep405pc) */
183 06 /* XIRQ 0 */
184 06 /* XIRQ 1 */
185 06 /* XIRQ 2 */
186 06 /* XIRQ 3 */
187 06 /* XIRQ 4 */
188 06 /* XIRQ 5 */
189 06 /* XIRQ 6 */
190 07]; /* Reserved */
191 };
192 };
193
194 PCI0: pci@ec000000 {
195 device_type = "pci";
196 #interrupt-cells = <1>;
197 #size-cells = <2>;
198 #address-cells = <3>;
199 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
200 primary;
201 reg = <eec00000 8 /* Config space access */
202 eed80000 4 /* IACK */
203 eed80000 4 /* Special cycle */
204 ef480000 40>; /* Internal registers */
205
206 /* Outbound ranges, one memory and one IO,
207 * later cannot be changed. Chip supports a second
208 * IO range but we don't use it for now
209 */
210 ranges = <02000000 0 80000000 80000000 0 20000000
211 01000000 0 00000000 e8000000 0 00010000>;
212
213 /* Inbound 2GB range starting at 0 */
214 dma-ranges = <42000000 0 0 0 0 80000000>;
215
216 /* That's all I know about IRQs on that thing ... */
217 interrupt-map-mask = <f800 0 0 0>;
218 interrupt-map = <
219 /* USB */
220 7000 0 0 0 &UIC0 1e 8 /* IRQ5 */
221 >;
222 };
223 };
224
225 chosen {
226 linux,stdout-path = "/plb/opb/serial@ef600300";
227 };
228};
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
new file mode 100644
index 000000000000..9bdfc0ff3c24
--- /dev/null
+++ b/arch/powerpc/boot/dts/katmai.dts
@@ -0,0 +1,400 @@
1/*
2 * Device Tree Source for AMCC Katmai eval board
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
6 *
7 * Copyright (c) 2006, 2007 IBM Corp.
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
13 */
14
15/ {
16 #address-cells = <2>;
17 #size-cells = <1>;
18 model = "amcc,katmai";
19 compatible = "amcc,katmai";
20 dcr-parent = <&/cpus/cpu@0>;
21
22 aliases {
23 ethernet0 = &EMAC0;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 serial2 = &UART2;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 cpu@0 {
34 device_type = "cpu";
35 model = "PowerPC,440SPe";
36 reg = <0>;
37 clock-frequency = <0>; /* Filled in by zImage */
38 timebase-frequency = <0>; /* Filled in by zImage */
39 i-cache-line-size = <20>;
40 d-cache-line-size = <20>;
41 i-cache-size = <20000>;
42 d-cache-size = <20000>;
43 dcr-controller;
44 dcr-access-method = "native";
45 };
46 };
47
48 memory {
49 device_type = "memory";
50 reg = <0 0 0>; /* Filled in by zImage */
51 };
52
53 UIC0: interrupt-controller0 {
54 compatible = "ibm,uic-440spe","ibm,uic";
55 interrupt-controller;
56 cell-index = <0>;
57 dcr-reg = <0c0 009>;
58 #address-cells = <0>;
59 #size-cells = <0>;
60 #interrupt-cells = <2>;
61 };
62
63 UIC1: interrupt-controller1 {
64 compatible = "ibm,uic-440spe","ibm,uic";
65 interrupt-controller;
66 cell-index = <1>;
67 dcr-reg = <0d0 009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
70 #interrupt-cells = <2>;
71 interrupts = <1e 4 1f 4>; /* cascade */
72 interrupt-parent = <&UIC0>;
73 };
74
75 UIC2: interrupt-controller2 {
76 compatible = "ibm,uic-440spe","ibm,uic";
77 interrupt-controller;
78 cell-index = <2>;
79 dcr-reg = <0e0 009>;
80 #address-cells = <0>;
81 #size-cells = <0>;
82 #interrupt-cells = <2>;
83 interrupts = <a 4 b 4>; /* cascade */
84 interrupt-parent = <&UIC0>;
85 };
86
87 UIC3: interrupt-controller3 {
88 compatible = "ibm,uic-440spe","ibm,uic";
89 interrupt-controller;
90 cell-index = <3>;
91 dcr-reg = <0f0 009>;
92 #address-cells = <0>;
93 #size-cells = <0>;
94 #interrupt-cells = <2>;
95 interrupts = <10 4 11 4>; /* cascade */
96 interrupt-parent = <&UIC0>;
97 };
98
99 SDR0: sdr {
100 compatible = "ibm,sdr-440spe";
101 dcr-reg = <00e 002>;
102 };
103
104 CPR0: cpr {
105 compatible = "ibm,cpr-440spe";
106 dcr-reg = <00c 002>;
107 };
108
109 plb {
110 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
111 #address-cells = <2>;
112 #size-cells = <1>;
113 ranges;
114 clock-frequency = <0>; /* Filled in by zImage */
115
116 SDRAM0: sdram {
117 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
118 dcr-reg = <010 2>;
119 };
120
121 MAL0: mcmal {
122 compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
123 dcr-reg = <180 62>;
124 num-tx-chans = <2>;
125 num-rx-chans = <1>;
126 interrupt-parent = <&MAL0>;
127 interrupts = <0 1 2 3 4>;
128 #interrupt-cells = <1>;
129 #address-cells = <0>;
130 #size-cells = <0>;
131 interrupt-map = </*TXEOB*/ 0 &UIC1 6 4
132 /*RXEOB*/ 1 &UIC1 7 4
133 /*SERR*/ 2 &UIC1 1 4
134 /*TXDE*/ 3 &UIC1 2 4
135 /*RXDE*/ 4 &UIC1 3 4>;
136 };
137
138 POB0: opb {
139 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
140 #address-cells = <1>;
141 #size-cells = <1>;
142 ranges = <00000000 4 e0000000 20000000>;
143 clock-frequency = <0>; /* Filled in by zImage */
144
145 EBC0: ebc {
146 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
147 dcr-reg = <012 2>;
148 #address-cells = <2>;
149 #size-cells = <1>;
150 clock-frequency = <0>; /* Filled in by zImage */
151 interrupts = <5 1>;
152 interrupt-parent = <&UIC1>;
153 };
154
155 UART0: serial@10000200 {
156 device_type = "serial";
157 compatible = "ns16550";
158 reg = <10000200 8>;
159 virtual-reg = <a0000200>;
160 clock-frequency = <0>; /* Filled in by zImage */
161 current-speed = <1c200>;
162 interrupt-parent = <&UIC0>;
163 interrupts = <0 4>;
164 };
165
166 UART1: serial@10000300 {
167 device_type = "serial";
168 compatible = "ns16550";
169 reg = <10000300 8>;
170 virtual-reg = <a0000300>;
171 clock-frequency = <0>;
172 current-speed = <0>;
173 interrupt-parent = <&UIC0>;
174 interrupts = <1 4>;
175 };
176
177
178 UART2: serial@10000600 {
179 device_type = "serial";
180 compatible = "ns16550";
181 reg = <10000600 8>;
182 virtual-reg = <a0000600>;
183 clock-frequency = <0>;
184 current-speed = <0>;
185 interrupt-parent = <&UIC1>;
186 interrupts = <5 4>;
187 };
188
189 IIC0: i2c@10000400 {
190 device_type = "i2c";
191 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
192 reg = <10000400 14>;
193 interrupt-parent = <&UIC0>;
194 interrupts = <2 4>;
195 };
196
197 IIC1: i2c@10000500 {
198 device_type = "i2c";
199 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
200 reg = <10000500 14>;
201 interrupt-parent = <&UIC0>;
202 interrupts = <3 4>;
203 };
204
205 EMAC0: ethernet@10000800 {
206 linux,network-index = <0>;
207 device_type = "network";
208 compatible = "ibm,emac-440spe", "ibm,emac4";
209 interrupt-parent = <&UIC1>;
210 interrupts = <1c 4 1d 4>;
211 reg = <10000800 70>;
212 local-mac-address = [000000000000];
213 mal-device = <&MAL0>;
214 mal-tx-channel = <0>;
215 mal-rx-channel = <0>;
216 cell-index = <0>;
217 max-frame-size = <5dc>;
218 rx-fifo-size = <1000>;
219 tx-fifo-size = <800>;
220 phy-mode = "gmii";
221 phy-map = <00000000>;
222 has-inverted-stacr-oc;
223 has-new-stacr-staopc;
224 };
225 };
226
227 PCIX0: pci@c0ec00000 {
228 device_type = "pci";
229 #interrupt-cells = <1>;
230 #size-cells = <2>;
231 #address-cells = <3>;
232 compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
233 primary;
234 large-inbound-windows;
235 enable-msi-hole;
236 reg = <c 0ec00000 8 /* Config space access */
237 0 0 0 /* no IACK cycles */
238 c 0ed00000 4 /* Special cycles */
239 c 0ec80000 100 /* Internal registers */
240 c 0ec80100 fc>; /* Internal messaging registers */
241
242 /* Outbound ranges, one memory and one IO,
243 * later cannot be changed
244 */
245 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
246 01000000 0 00000000 0000000c 08000000 0 00010000>;
247
248 /* Inbound 2GB range starting at 0 */
249 dma-ranges = <42000000 0 0 0 0 0 80000000>;
250
251 /* This drives busses 0 to 0xf */
252 bus-range = <0 f>;
253
254 /*
255 * On Katmai, the following PCI-X interrupts signals
256 * have to be enabled via jumpers (only INTA is
257 * enabled per default):
258 *
259 * INTB: J3: 1-2
260 * INTC: J2: 1-2
261 * INTD: J1: 1-2
262 */
263 interrupt-map-mask = <f800 0 0 7>;
264 interrupt-map = <
265 /* IDSEL 1 */
266 0800 0 0 1 &UIC1 14 8
267 0800 0 0 2 &UIC1 13 8
268 0800 0 0 3 &UIC1 12 8
269 0800 0 0 4 &UIC1 11 8
270 >;
271 };
272
273 PCIE0: pciex@d00000000 {
274 device_type = "pci";
275 #interrupt-cells = <1>;
276 #size-cells = <2>;
277 #address-cells = <3>;
278 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
279 primary;
280 port = <0>; /* port number */
281 reg = <d 00000000 20000000 /* Config space access */
282 c 10000000 00001000>; /* Registers */
283 dcr-reg = <100 020>;
284 sdr-base = <300>;
285
286 /* Outbound ranges, one memory and one IO,
287 * later cannot be changed
288 */
289 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
290 01000000 0 00000000 0000000f 80000000 0 00010000>;
291
292 /* Inbound 2GB range starting at 0 */
293 dma-ranges = <42000000 0 0 0 0 0 80000000>;
294
295 /* This drives busses 10 to 0x1f */
296 bus-range = <10 1f>;
297
298 /* Legacy interrupts (note the weird polarity, the bridge seems
299 * to invert PCIe legacy interrupts).
300 * We are de-swizzling here because the numbers are actually for
301 * port of the root complex virtual P2P bridge. But I want
302 * to avoid putting a node for it in the tree, so the numbers
303 * below are basically de-swizzled numbers.
304 * The real slot is on idsel 0, so the swizzling is 1:1
305 */
306 interrupt-map-mask = <0000 0 0 7>;
307 interrupt-map = <
308 0000 0 0 1 &UIC3 0 4 /* swizzled int A */
309 0000 0 0 2 &UIC3 1 4 /* swizzled int B */
310 0000 0 0 3 &UIC3 2 4 /* swizzled int C */
311 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>;
312 };
313
314 PCIE1: pciex@d20000000 {
315 device_type = "pci";
316 #interrupt-cells = <1>;
317 #size-cells = <2>;
318 #address-cells = <3>;
319 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
320 primary;
321 port = <1>; /* port number */
322 reg = <d 20000000 20000000 /* Config space access */
323 c 10001000 00001000>; /* Registers */
324 dcr-reg = <120 020>;
325 sdr-base = <340>;
326
327 /* Outbound ranges, one memory and one IO,
328 * later cannot be changed
329 */
330 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
331 01000000 0 00000000 0000000f 80010000 0 00010000>;
332
333 /* Inbound 2GB range starting at 0 */
334 dma-ranges = <42000000 0 0 0 0 0 80000000>;
335
336 /* This drives busses 10 to 0x1f */
337 bus-range = <20 2f>;
338
339 /* Legacy interrupts (note the weird polarity, the bridge seems
340 * to invert PCIe legacy interrupts).
341 * We are de-swizzling here because the numbers are actually for
342 * port of the root complex virtual P2P bridge. But I want
343 * to avoid putting a node for it in the tree, so the numbers
344 * below are basically de-swizzled numbers.
345 * The real slot is on idsel 0, so the swizzling is 1:1
346 */
347 interrupt-map-mask = <0000 0 0 7>;
348 interrupt-map = <
349 0000 0 0 1 &UIC3 4 4 /* swizzled int A */
350 0000 0 0 2 &UIC3 5 4 /* swizzled int B */
351 0000 0 0 3 &UIC3 6 4 /* swizzled int C */
352 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>;
353 };
354
355 PCIE2: pciex@d40000000 {
356 device_type = "pci";
357 #interrupt-cells = <1>;
358 #size-cells = <2>;
359 #address-cells = <3>;
360 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
361 primary;
362 port = <2>; /* port number */
363 reg = <d 40000000 20000000 /* Config space access */
364 c 10002000 00001000>; /* Registers */
365 dcr-reg = <140 020>;
366 sdr-base = <370>;
367
368 /* Outbound ranges, one memory and one IO,
369 * later cannot be changed
370 */
371 ranges = <02000000 0 80000000 0000000f 00000000 0 80000000
372 01000000 0 00000000 0000000f 80020000 0 00010000>;
373
374 /* Inbound 2GB range starting at 0 */
375 dma-ranges = <42000000 0 0 0 0 0 80000000>;
376
377 /* This drives busses 10 to 0x1f */
378 bus-range = <30 3f>;
379
380 /* Legacy interrupts (note the weird polarity, the bridge seems
381 * to invert PCIe legacy interrupts).
382 * We are de-swizzling here because the numbers are actually for
383 * port of the root complex virtual P2P bridge. But I want
384 * to avoid putting a node for it in the tree, so the numbers
385 * below are basically de-swizzled numbers.
386 * The real slot is on idsel 0, so the swizzling is 1:1
387 */
388 interrupt-map-mask = <0000 0 0 7>;
389 interrupt-map = <
390 0000 0 0 1 &UIC3 8 4 /* swizzled int A */
391 0000 0 0 2 &UIC3 9 4 /* swizzled int B */
392 0000 0 0 3 &UIC3 a 4 /* swizzled int C */
393 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>;
394 };
395 };
396
397 chosen {
398 linux,stdout-path = "/plb/opb/serial@10000200";
399 };
400};
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index c824e8f06454..67c7ea179a07 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -13,14 +13,22 @@
13 #size-cells = <1>; 13 #size-cells = <1>;
14 model = "amcc,kilauea"; 14 model = "amcc,kilauea";
15 compatible = "amcc,kilauea"; 15 compatible = "amcc,kilauea";
16 dcr-parent = <&/cpus/PowerPC,405EX@0>; 16 dcr-parent = <&/cpus/cpu@0>;
17
18 aliases {
19 ethernet0 = &EMAC0;
20 ethernet1 = &EMAC1;
21 serial0 = &UART0;
22 serial1 = &UART1;
23 };
17 24
18 cpus { 25 cpus {
19 #address-cells = <1>; 26 #address-cells = <1>;
20 #size-cells = <0>; 27 #size-cells = <0>;
21 28
22 PowerPC,405EX@0 { 29 cpu@0 {
23 device_type = "cpu"; 30 device_type = "cpu";
31 model = "PowerPC,405EX";
24 reg = <0>; 32 reg = <0>;
25 clock-frequency = <0>; /* Filled in by U-Boot */ 33 clock-frequency = <0>; /* Filled in by U-Boot */
26 timebase-frequency = <0>; /* Filled in by U-Boot */ 34 timebase-frequency = <0>; /* Filled in by U-Boot */
@@ -194,6 +202,7 @@
194 device_type = "rgmii-interface"; 202 device_type = "rgmii-interface";
195 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 203 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
196 reg = <ef600b00 104>; 204 reg = <ef600b00 104>;
205 has-mdio;
197 }; 206 };
198 207
199 EMAC0: ethernet@ef600900 { 208 EMAC0: ethernet@ef600900 {
@@ -220,6 +229,8 @@
220 phy-map = <00000000>; 229 phy-map = <00000000>;
221 rgmii-device = <&RGMII0>; 230 rgmii-device = <&RGMII0>;
222 rgmii-channel = <0>; 231 rgmii-channel = <0>;
232 has-inverted-stacr-oc;
233 has-new-stacr-staopc;
223 }; 234 };
224 235
225 EMAC1: ethernet@ef600a00 { 236 EMAC1: ethernet@ef600a00 {
@@ -246,7 +257,91 @@
246 phy-map = <00000000>; 257 phy-map = <00000000>;
247 rgmii-device = <&RGMII0>; 258 rgmii-device = <&RGMII0>;
248 rgmii-channel = <1>; 259 rgmii-channel = <1>;
260 has-inverted-stacr-oc;
261 has-new-stacr-staopc;
249 }; 262 };
250 }; 263 };
264
265 PCIE0: pciex@0a0000000 {
266 device_type = "pci";
267 #interrupt-cells = <1>;
268 #size-cells = <2>;
269 #address-cells = <3>;
270 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
271 primary;
272 port = <0>; /* port number */
273 reg = <a0000000 20000000 /* Config space access */
274 ef000000 00001000>; /* Registers */
275 dcr-reg = <040 020>;
276 sdr-base = <400>;
277
278 /* Outbound ranges, one memory and one IO,
279 * later cannot be changed
280 */
281 ranges = <02000000 0 80000000 90000000 0 08000000
282 01000000 0 00000000 e0000000 0 00010000>;
283
284 /* Inbound 2GB range starting at 0 */
285 dma-ranges = <42000000 0 0 0 0 80000000>;
286
287 /* This drives busses 0x00 to 0x3f */
288 bus-range = <00 3f>;
289
290 /* Legacy interrupts (note the weird polarity, the bridge seems
291 * to invert PCIe legacy interrupts).
292 * We are de-swizzling here because the numbers are actually for
293 * port of the root complex virtual P2P bridge. But I want
294 * to avoid putting a node for it in the tree, so the numbers
295 * below are basically de-swizzled numbers.
296 * The real slot is on idsel 0, so the swizzling is 1:1
297 */
298 interrupt-map-mask = <0000 0 0 7>;
299 interrupt-map = <
300 0000 0 0 1 &UIC2 0 4 /* swizzled int A */
301 0000 0 0 2 &UIC2 1 4 /* swizzled int B */
302 0000 0 0 3 &UIC2 2 4 /* swizzled int C */
303 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
304 };
305
306 PCIE1: pciex@0c0000000 {
307 device_type = "pci";
308 #interrupt-cells = <1>;
309 #size-cells = <2>;
310 #address-cells = <3>;
311 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
312 primary;
313 port = <1>; /* port number */
314 reg = <c0000000 20000000 /* Config space access */
315 ef001000 00001000>; /* Registers */
316 dcr-reg = <060 020>;
317 sdr-base = <440>;
318
319 /* Outbound ranges, one memory and one IO,
320 * later cannot be changed
321 */
322 ranges = <02000000 0 80000000 98000000 0 08000000
323 01000000 0 00000000 e0010000 0 00010000>;
324
325 /* Inbound 2GB range starting at 0 */
326 dma-ranges = <42000000 0 0 0 0 80000000>;
327
328 /* This drives busses 0x40 to 0x7f */
329 bus-range = <40 7f>;
330
331 /* Legacy interrupts (note the weird polarity, the bridge seems
332 * to invert PCIe legacy interrupts).
333 * We are de-swizzling here because the numbers are actually for
334 * port of the root complex virtual P2P bridge. But I want
335 * to avoid putting a node for it in the tree, so the numbers
336 * below are basically de-swizzled numbers.
337 * The real slot is on idsel 0, so the swizzling is 1:1
338 */
339 interrupt-map-mask = <0000 0 0 7>;
340 interrupt-map = <
341 0000 0 0 1 &UIC2 b 4 /* swizzled int A */
342 0000 0 0 2 &UIC2 c 4 /* swizzled int B */
343 0000 0 0 3 &UIC2 d 4 /* swizzled int C */
344 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>;
345 };
251 }; 346 };
252}; 347};
diff --git a/arch/powerpc/boot/dts/makalu.dts b/arch/powerpc/boot/dts/makalu.dts
new file mode 100644
index 000000000000..bdd70e4596ae
--- /dev/null
+++ b/arch/powerpc/boot/dts/makalu.dts
@@ -0,0 +1,347 @@
1/*
2 * Device Tree Source for AMCC Makalu (405EX)
3 *
4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/ {
12 #address-cells = <1>;
13 #size-cells = <1>;
14 model = "amcc,makalu";
15 compatible = "amcc,makalu";
16 dcr-parent = <&/cpus/cpu@0>;
17
18 aliases {
19 ethernet0 = &EMAC0;
20 ethernet1 = &EMAC1;
21 serial0 = &UART0;
22 serial1 = &UART1;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@0 {
30 device_type = "cpu";
31 model = "PowerPC,405EX";
32 reg = <0>;
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <20>;
36 d-cache-line-size = <20>;
37 i-cache-size = <4000>; /* 16 kB */
38 d-cache-size = <4000>; /* 16 kB */
39 dcr-controller;
40 dcr-access-method = "native";
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0 0>; /* Filled in by U-Boot */
47 };
48
49 UIC0: interrupt-controller {
50 compatible = "ibm,uic-405ex", "ibm,uic";
51 interrupt-controller;
52 cell-index = <0>;
53 dcr-reg = <0c0 009>;
54 #address-cells = <0>;
55 #size-cells = <0>;
56 #interrupt-cells = <2>;
57 };
58
59 UIC1: interrupt-controller1 {
60 compatible = "ibm,uic-405ex","ibm,uic";
61 interrupt-controller;
62 cell-index = <1>;
63 dcr-reg = <0d0 009>;
64 #address-cells = <0>;
65 #size-cells = <0>;
66 #interrupt-cells = <2>;
67 interrupts = <1e 4 1f 4>; /* cascade */
68 interrupt-parent = <&UIC0>;
69 };
70
71 UIC2: interrupt-controller2 {
72 compatible = "ibm,uic-405ex","ibm,uic";
73 interrupt-controller;
74 cell-index = <2>;
75 dcr-reg = <0e0 009>;
76 #address-cells = <0>;
77 #size-cells = <0>;
78 #interrupt-cells = <2>;
79 interrupts = <1c 4 1d 4>; /* cascade */
80 interrupt-parent = <&UIC0>;
81 };
82
83 plb {
84 compatible = "ibm,plb-405ex", "ibm,plb4";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88 clock-frequency = <0>; /* Filled in by U-Boot */
89
90 SDRAM0: memory-controller {
91 compatible = "ibm,sdram-405ex";
92 dcr-reg = <010 2>;
93 };
94
95 MAL0: mcmal {
96 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
97 dcr-reg = <180 62>;
98 num-tx-chans = <2>;
99 num-rx-chans = <2>;
100 interrupt-parent = <&MAL0>;
101 interrupts = <0 1 2 3 4>;
102 #interrupt-cells = <1>;
103 #address-cells = <0>;
104 #size-cells = <0>;
105 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
106 /*RXEOB*/ 1 &UIC0 b 4
107 /*SERR*/ 2 &UIC1 0 4
108 /*TXDE*/ 3 &UIC1 1 4
109 /*RXDE*/ 4 &UIC1 2 4>;
110 interrupt-map-mask = <ffffffff>;
111 };
112
113 POB0: opb {
114 compatible = "ibm,opb-405ex", "ibm,opb";
115 #address-cells = <1>;
116 #size-cells = <1>;
117 ranges = <80000000 80000000 10000000
118 ef600000 ef600000 a00000
119 f0000000 f0000000 10000000>;
120 dcr-reg = <0a0 5>;
121 clock-frequency = <0>; /* Filled in by U-Boot */
122
123 EBC0: ebc {
124 compatible = "ibm,ebc-405ex", "ibm,ebc";
125 dcr-reg = <012 2>;
126 #address-cells = <2>;
127 #size-cells = <1>;
128 clock-frequency = <0>; /* Filled in by U-Boot */
129 /* ranges property is supplied by U-Boot */
130 interrupts = <5 1>;
131 interrupt-parent = <&UIC1>;
132
133 nor_flash@0,0 {
134 compatible = "amd,s29gl512n", "cfi-flash";
135 bank-width = <2>;
136 reg = <0 000000 4000000>;
137 #address-cells = <1>;
138 #size-cells = <1>;
139 partition@0 {
140 label = "kernel";
141 reg = <0 200000>;
142 };
143 partition@200000 {
144 label = "root";
145 reg = <200000 200000>;
146 };
147 partition@400000 {
148 label = "user";
149 reg = <400000 3b60000>;
150 };
151 partition@3f60000 {
152 label = "env";
153 reg = <3f60000 40000>;
154 };
155 partition@3fa0000 {
156 label = "u-boot";
157 reg = <3fa0000 60000>;
158 };
159 };
160 };
161
162 UART0: serial@ef600200 {
163 device_type = "serial";
164 compatible = "ns16550";
165 reg = <ef600200 8>;
166 virtual-reg = <ef600200>;
167 clock-frequency = <0>; /* Filled in by U-Boot */
168 current-speed = <0>;
169 interrupt-parent = <&UIC0>;
170 interrupts = <1a 4>;
171 };
172
173 UART1: serial@ef600300 {
174 device_type = "serial";
175 compatible = "ns16550";
176 reg = <ef600300 8>;
177 virtual-reg = <ef600300>;
178 clock-frequency = <0>; /* Filled in by U-Boot */
179 current-speed = <0>;
180 interrupt-parent = <&UIC0>;
181 interrupts = <1 4>;
182 };
183
184 IIC0: i2c@ef600400 {
185 device_type = "i2c";
186 compatible = "ibm,iic-405ex", "ibm,iic";
187 reg = <ef600400 14>;
188 interrupt-parent = <&UIC0>;
189 interrupts = <2 4>;
190 };
191
192 IIC1: i2c@ef600500 {
193 device_type = "i2c";
194 compatible = "ibm,iic-405ex", "ibm,iic";
195 reg = <ef600500 14>;
196 interrupt-parent = <&UIC0>;
197 interrupts = <7 4>;
198 };
199
200
201 RGMII0: emac-rgmii@ef600b00 {
202 device_type = "rgmii-interface";
203 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
204 reg = <ef600b00 104>;
205 has-mdio;
206 };
207
208 EMAC0: ethernet@ef600900 {
209 linux,network-index = <0>;
210 device_type = "network";
211 compatible = "ibm,emac-405ex", "ibm,emac4";
212 interrupt-parent = <&EMAC0>;
213 interrupts = <0 1>;
214 #interrupt-cells = <1>;
215 #address-cells = <0>;
216 #size-cells = <0>;
217 interrupt-map = </*Status*/ 0 &UIC0 18 4
218 /*Wake*/ 1 &UIC1 1d 4>;
219 reg = <ef600900 70>;
220 local-mac-address = [000000000000]; /* Filled in by U-Boot */
221 mal-device = <&MAL0>;
222 mal-tx-channel = <0>;
223 mal-rx-channel = <0>;
224 cell-index = <0>;
225 max-frame-size = <5dc>;
226 rx-fifo-size = <1000>;
227 tx-fifo-size = <800>;
228 phy-mode = "rgmii";
229 phy-map = <0000003f>; /* Start at 6 */
230 rgmii-device = <&RGMII0>;
231 rgmii-channel = <0>;
232 has-inverted-stacr-oc;
233 has-new-stacr-staopc;
234 };
235
236 EMAC1: ethernet@ef600a00 {
237 linux,network-index = <1>;
238 device_type = "network";
239 compatible = "ibm,emac-405ex", "ibm,emac4";
240 interrupt-parent = <&EMAC1>;
241 interrupts = <0 1>;
242 #interrupt-cells = <1>;
243 #address-cells = <0>;
244 #size-cells = <0>;
245 interrupt-map = </*Status*/ 0 &UIC0 19 4
246 /*Wake*/ 1 &UIC1 1f 4>;
247 reg = <ef600a00 70>;
248 local-mac-address = [000000000000]; /* Filled in by U-Boot */
249 mal-device = <&MAL0>;
250 mal-tx-channel = <1>;
251 mal-rx-channel = <1>;
252 cell-index = <1>;
253 max-frame-size = <5dc>;
254 rx-fifo-size = <1000>;
255 tx-fifo-size = <800>;
256 phy-mode = "rgmii";
257 phy-map = <00000000>;
258 rgmii-device = <&RGMII0>;
259 rgmii-channel = <1>;
260 has-inverted-stacr-oc;
261 has-new-stacr-staopc;
262 };
263 };
264
265 PCIE0: pciex@0a0000000 {
266 device_type = "pci";
267 #interrupt-cells = <1>;
268 #size-cells = <2>;
269 #address-cells = <3>;
270 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
271 primary;
272 port = <0>; /* port number */
273 reg = <a0000000 20000000 /* Config space access */
274 ef000000 00001000>; /* Registers */
275 dcr-reg = <040 020>;
276 sdr-base = <400>;
277
278 /* Outbound ranges, one memory and one IO,
279 * later cannot be changed
280 */
281 ranges = <02000000 0 80000000 90000000 0 08000000
282 01000000 0 00000000 e0000000 0 00010000>;
283
284 /* Inbound 2GB range starting at 0 */
285 dma-ranges = <42000000 0 0 0 0 80000000>;
286
287 /* This drives busses 0x00 to 0x3f */
288 bus-range = <00 3f>;
289
290 /* Legacy interrupts (note the weird polarity, the bridge seems
291 * to invert PCIe legacy interrupts).
292 * We are de-swizzling here because the numbers are actually for
293 * port of the root complex virtual P2P bridge. But I want
294 * to avoid putting a node for it in the tree, so the numbers
295 * below are basically de-swizzled numbers.
296 * The real slot is on idsel 0, so the swizzling is 1:1
297 */
298 interrupt-map-mask = <0000 0 0 7>;
299 interrupt-map = <
300 0000 0 0 1 &UIC2 0 4 /* swizzled int A */
301 0000 0 0 2 &UIC2 1 4 /* swizzled int B */
302 0000 0 0 3 &UIC2 2 4 /* swizzled int C */
303 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
304 };
305
306 PCIE1: pciex@0c0000000 {
307 device_type = "pci";
308 #interrupt-cells = <1>;
309 #size-cells = <2>;
310 #address-cells = <3>;
311 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
312 primary;
313 port = <1>; /* port number */
314 reg = <c0000000 20000000 /* Config space access */
315 ef001000 00001000>; /* Registers */
316 dcr-reg = <060 020>;
317 sdr-base = <440>;
318
319 /* Outbound ranges, one memory and one IO,
320 * later cannot be changed
321 */
322 ranges = <02000000 0 80000000 98000000 0 08000000
323 01000000 0 00000000 e0010000 0 00010000>;
324
325 /* Inbound 2GB range starting at 0 */
326 dma-ranges = <42000000 0 0 0 0 80000000>;
327
328 /* This drives busses 0x40 to 0x7f */
329 bus-range = <40 7f>;
330
331 /* Legacy interrupts (note the weird polarity, the bridge seems
332 * to invert PCIe legacy interrupts).
333 * We are de-swizzling here because the numbers are actually for
334 * port of the root complex virtual P2P bridge. But I want
335 * to avoid putting a node for it in the tree, so the numbers
336 * below are basically de-swizzled numbers.
337 * The real slot is on idsel 0, so the swizzling is 1:1
338 */
339 interrupt-map-mask = <0000 0 0 7>;
340 interrupt-map = <
341 0000 0 0 1 &UIC2 b 4 /* swizzled int A */
342 0000 0 0 2 &UIC2 c 4 /* swizzled int B */
343 0000 0 0 3 &UIC2 d 4 /* swizzled int C */
344 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>;
345 };
346 };
347};
diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts
new file mode 100644
index 000000000000..d3c2ac394ce9
--- /dev/null
+++ b/arch/powerpc/boot/dts/rainier.dts
@@ -0,0 +1,353 @@
1/*
2 * Device Tree Source for AMCC Rainier
3 *
4 * Based on Sequoia code
5 * Copyright (c) 2007 MontaVista Software, Inc.
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 */
14
15/ {
16 #address-cells = <2>;
17 #size-cells = <1>;
18 model = "amcc,rainier";
19 compatible = "amcc,rainier";
20 dcr-parent = <&/cpus/cpu@0>;
21
22 aliases {
23 ethernet0 = &EMAC0;
24 ethernet1 = &EMAC1;
25 serial0 = &UART0;
26 serial1 = &UART1;
27 serial2 = &UART2;
28 serial3 = &UART3;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 model = "PowerPC,440GRx";
38 reg = <0>;
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
41 i-cache-line-size = <20>;
42 d-cache-line-size = <20>;
43 i-cache-size = <8000>;
44 d-cache-size = <8000>;
45 dcr-controller;
46 dcr-access-method = "native";
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0 0 0>; /* Filled in by zImage */
53 };
54
55 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440grx","ibm,uic";
57 interrupt-controller;
58 cell-index = <0>;
59 dcr-reg = <0c0 009>;
60 #address-cells = <0>;
61 #size-cells = <0>;
62 #interrupt-cells = <2>;
63 };
64
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-440grx","ibm,uic";
67 interrupt-controller;
68 cell-index = <1>;
69 dcr-reg = <0d0 009>;
70 #address-cells = <0>;
71 #size-cells = <0>;
72 #interrupt-cells = <2>;
73 interrupts = <1e 4 1f 4>; /* cascade */
74 interrupt-parent = <&UIC0>;
75 };
76
77 UIC2: interrupt-controller2 {
78 compatible = "ibm,uic-440grx","ibm,uic";
79 interrupt-controller;
80 cell-index = <2>;
81 dcr-reg = <0e0 009>;
82 #address-cells = <0>;
83 #size-cells = <0>;
84 #interrupt-cells = <2>;
85 interrupts = <1c 4 1d 4>; /* cascade */
86 interrupt-parent = <&UIC0>;
87 };
88
89 SDR0: sdr {
90 compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
91 dcr-reg = <00e 002>;
92 };
93
94 CPR0: cpr {
95 compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
96 dcr-reg = <00c 002>;
97 };
98
99 plb {
100 compatible = "ibm,plb-440grx", "ibm,plb4";
101 #address-cells = <2>;
102 #size-cells = <1>;
103 ranges;
104 clock-frequency = <0>; /* Filled in by zImage */
105
106 SDRAM0: sdram {
107 compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
108 dcr-reg = <010 2>;
109 };
110
111 DMA0: dma {
112 compatible = "ibm,dma-440grx", "ibm,dma-4xx";
113 dcr-reg = <100 027>;
114 };
115
116 MAL0: mcmal {
117 compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
118 dcr-reg = <180 62>;
119 num-tx-chans = <2>;
120 num-rx-chans = <2>;
121 interrupt-parent = <&MAL0>;
122 interrupts = <0 1 2 3 4>;
123 #interrupt-cells = <1>;
124 #address-cells = <0>;
125 #size-cells = <0>;
126 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
127 /*RXEOB*/ 1 &UIC0 b 4
128 /*SERR*/ 2 &UIC1 0 4
129 /*TXDE*/ 3 &UIC1 1 4
130 /*RXDE*/ 4 &UIC1 2 4>;
131 interrupt-map-mask = <ffffffff>;
132 };
133
134 POB0: opb {
135 compatible = "ibm,opb-440grx", "ibm,opb";
136 #address-cells = <1>;
137 #size-cells = <1>;
138 ranges = <00000000 1 00000000 80000000
139 80000000 1 80000000 80000000>;
140 interrupt-parent = <&UIC1>;
141 interrupts = <7 4>;
142 clock-frequency = <0>; /* Filled in by zImage */
143
144 EBC0: ebc {
145 compatible = "ibm,ebc-440grx", "ibm,ebc";
146 dcr-reg = <012 2>;
147 #address-cells = <2>;
148 #size-cells = <1>;
149 clock-frequency = <0>; /* Filled in by zImage */
150 interrupts = <5 1>;
151 interrupt-parent = <&UIC1>;
152
153 nor_flash@0,0 {
154 compatible = "amd,s29gl256n", "cfi-flash";
155 bank-width = <2>;
156 reg = <0 000000 4000000>;
157 #address-cells = <1>;
158 #size-cells = <1>;
159 partition@0 {
160 label = "Kernel";
161 reg = <0 180000>;
162 };
163 partition@180000 {
164 label = "ramdisk";
165 reg = <180000 200000>;
166 };
167 partition@380000 {
168 label = "file system";
169 reg = <380000 3aa0000>;
170 };
171 partition@3e20000 {
172 label = "kozio";
173 reg = <3e20000 140000>;
174 };
175 partition@3f60000 {
176 label = "env";
177 reg = <3f60000 40000>;
178 };
179 partition@3fa0000 {
180 label = "u-boot";
181 reg = <3fa0000 60000>;
182 };
183 };
184
185 };
186
187 UART0: serial@ef600300 {
188 device_type = "serial";
189 compatible = "ns16550";
190 reg = <ef600300 8>;
191 virtual-reg = <ef600300>;
192 clock-frequency = <0>; /* Filled in by zImage */
193 current-speed = <1c200>;
194 interrupt-parent = <&UIC0>;
195 interrupts = <0 4>;
196 };
197
198 UART1: serial@ef600400 {
199 device_type = "serial";
200 compatible = "ns16550";
201 reg = <ef600400 8>;
202 virtual-reg = <ef600400>;
203 clock-frequency = <0>;
204 current-speed = <0>;
205 interrupt-parent = <&UIC0>;
206 interrupts = <1 4>;
207 };
208
209 UART2: serial@ef600500 {
210 device_type = "serial";
211 compatible = "ns16550";
212 reg = <ef600500 8>;
213 virtual-reg = <ef600500>;
214 clock-frequency = <0>;
215 current-speed = <0>;
216 interrupt-parent = <&UIC1>;
217 interrupts = <3 4>;
218 };
219
220 UART3: serial@ef600600 {
221 device_type = "serial";
222 compatible = "ns16550";
223 reg = <ef600600 8>;
224 virtual-reg = <ef600600>;
225 clock-frequency = <0>;
226 current-speed = <0>;
227 interrupt-parent = <&UIC1>;
228 interrupts = <4 4>;
229 };
230
231 IIC0: i2c@ef600700 {
232 device_type = "i2c";
233 compatible = "ibm,iic-440grx", "ibm,iic";
234 reg = <ef600700 14>;
235 interrupt-parent = <&UIC0>;
236 interrupts = <2 4>;
237 };
238
239 IIC1: i2c@ef600800 {
240 device_type = "i2c";
241 compatible = "ibm,iic-440grx", "ibm,iic";
242 reg = <ef600800 14>;
243 interrupt-parent = <&UIC0>;
244 interrupts = <7 4>;
245 };
246
247 ZMII0: emac-zmii@ef600d00 {
248 device_type = "zmii-interface";
249 compatible = "ibm,zmii-440grx", "ibm,zmii";
250 reg = <ef600d00 c>;
251 };
252
253 RGMII0: emac-rgmii@ef601000 {
254 device_type = "rgmii-interface";
255 compatible = "ibm,rgmii-440grx", "ibm,rgmii";
256 reg = <ef601000 8>;
257 has-mdio;
258 };
259
260 EMAC0: ethernet@ef600e00 {
261 linux,network-index = <0>;
262 device_type = "network";
263 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
264 interrupt-parent = <&EMAC0>;
265 interrupts = <0 1>;
266 #interrupt-cells = <1>;
267 #address-cells = <0>;
268 #size-cells = <0>;
269 interrupt-map = </*Status*/ 0 &UIC0 18 4
270 /*Wake*/ 1 &UIC1 1d 4>;
271 reg = <ef600e00 70>;
272 local-mac-address = [000000000000];
273 mal-device = <&MAL0>;
274 mal-tx-channel = <0>;
275 mal-rx-channel = <0>;
276 cell-index = <0>;
277 max-frame-size = <5dc>;
278 rx-fifo-size = <1000>;
279 tx-fifo-size = <800>;
280 phy-mode = "rgmii";
281 phy-map = <00000000>;
282 zmii-device = <&ZMII0>;
283 zmii-channel = <0>;
284 rgmii-device = <&RGMII0>;
285 rgmii-channel = <0>;
286 has-inverted-stacr-oc;
287 has-new-stacr-staopc;
288 };
289
290 EMAC1: ethernet@ef600f00 {
291 linux,network-index = <1>;
292 device_type = "network";
293 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
294 interrupt-parent = <&EMAC1>;
295 interrupts = <0 1>;
296 #interrupt-cells = <1>;
297 #address-cells = <0>;
298 #size-cells = <0>;
299 interrupt-map = </*Status*/ 0 &UIC0 19 4
300 /*Wake*/ 1 &UIC1 1f 4>;
301 reg = <ef600f00 70>;
302 local-mac-address = [000000000000];
303 mal-device = <&MAL0>;
304 mal-tx-channel = <1>;
305 mal-rx-channel = <1>;
306 cell-index = <1>;
307 max-frame-size = <5dc>;
308 rx-fifo-size = <1000>;
309 tx-fifo-size = <800>;
310 phy-mode = "rgmii";
311 phy-map = <00000000>;
312 zmii-device = <&ZMII0>;
313 zmii-channel = <1>;
314 rgmii-device = <&RGMII0>;
315 rgmii-channel = <1>;
316 has-inverted-stacr-oc;
317 has-new-stacr-staopc;
318 };
319 };
320
321 PCI0: pci@1ec000000 {
322 device_type = "pci";
323 #interrupt-cells = <1>;
324 #size-cells = <2>;
325 #address-cells = <3>;
326 compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
327 primary;
328 reg = <1 eec00000 8 /* Config space access */
329 1 eed00000 4 /* IACK */
330 1 eed00000 4 /* Special cycle */
331 1 ef400000 40>; /* Internal registers */
332
333 /* Outbound ranges, one memory and one IO,
334 * later cannot be changed. Chip supports a second
335 * IO range but we don't use it for now
336 */
337 ranges = <02000000 0 80000000 1 80000000 0 10000000
338 01000000 0 00000000 1 e8000000 0 00100000>;
339
340 /* Inbound 2GB range starting at 0 */
341 dma-ranges = <42000000 0 0 0 0 0 80000000>;
342
343 /* All PCI interrupts are routed to IRQ 67 */
344 interrupt-map-mask = <0000 0 0 0>;
345 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
346 };
347 };
348
349 chosen {
350 linux,stdout-path = "/plb/opb/serial@ef600300";
351 bootargs = "console=ttyS0,115200";
352 };
353};
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index 10784ff45dd6..d9046c1adcbe 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -17,14 +17,24 @@
17 #size-cells = <1>; 17 #size-cells = <1>;
18 model = "amcc,sequoia"; 18 model = "amcc,sequoia";
19 compatible = "amcc,sequoia"; 19 compatible = "amcc,sequoia";
20 dcr-parent = <&/cpus/PowerPC,440EPx@0>; 20 dcr-parent = <&/cpus/cpu@0>;
21
22 aliases {
23 ethernet0 = &EMAC0;
24 ethernet1 = &EMAC1;
25 serial0 = &UART0;
26 serial1 = &UART1;
27 serial2 = &UART2;
28 serial3 = &UART3;
29 };
21 30
22 cpus { 31 cpus {
23 #address-cells = <1>; 32 #address-cells = <1>;
24 #size-cells = <0>; 33 #size-cells = <0>;
25 34
26 PowerPC,440EPx@0 { 35 cpu@0 {
27 device_type = "cpu"; 36 device_type = "cpu";
37 model = "PowerPC,440EPx";
28 reg = <0>; 38 reg = <0>;
29 clock-frequency = <0>; /* Filled in by zImage */ 39 clock-frequency = <0>; /* Filled in by zImage */
30 timebase-frequency = <0>; /* Filled in by zImage */ 40 timebase-frequency = <0>; /* Filled in by zImage */
@@ -94,7 +104,6 @@
94 clock-frequency = <0>; /* Filled in by zImage */ 104 clock-frequency = <0>; /* Filled in by zImage */
95 105
96 SDRAM0: sdram { 106 SDRAM0: sdram {
97 device_type = "memory-controller";
98 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; 107 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
99 dcr-reg = <010 2>; 108 dcr-reg = <010 2>;
100 }; 109 };
@@ -122,6 +131,13 @@
122 interrupt-map-mask = <ffffffff>; 131 interrupt-map-mask = <ffffffff>;
123 }; 132 };
124 133
134 USB1: usb@e0000400 {
135 compatible = "ohci-be";
136 reg = <0 e0000400 60>;
137 interrupt-parent = <&UIC0>;
138 interrupts = <15 8>;
139 };
140
125 POB0: opb { 141 POB0: opb {
126 compatible = "ibm,opb-440epx", "ibm,opb"; 142 compatible = "ibm,opb-440epx", "ibm,opb";
127 #address-cells = <1>; 143 #address-cells = <1>;
@@ -308,6 +324,33 @@
308 has-new-stacr-staopc; 324 has-new-stacr-staopc;
309 }; 325 };
310 }; 326 };
327
328 PCI0: pci@1ec000000 {
329 device_type = "pci";
330 #interrupt-cells = <1>;
331 #size-cells = <2>;
332 #address-cells = <3>;
333 compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
334 primary;
335 reg = <1 eec00000 8 /* Config space access */
336 1 eed00000 4 /* IACK */
337 1 eed00000 4 /* Special cycle */
338 1 ef400000 40>; /* Internal registers */
339
340 /* Outbound ranges, one memory and one IO,
341 * later cannot be changed. Chip supports a second
342 * IO range but we don't use it for now
343 */
344 ranges = <02000000 0 80000000 1 80000000 0 10000000
345 01000000 0 00000000 1 e8000000 0 00100000>;
346
347 /* Inbound 2GB range starting at 0 */
348 dma-ranges = <42000000 0 0 0 0 0 80000000>;
349
350 /* All PCI interrupts are routed to IRQ 67 */
351 interrupt-map-mask = <0000 0 0 0>;
352 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
353 };
311 }; 354 };
312 355
313 chosen { 356 chosen {
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts
new file mode 100644
index 000000000000..0706a4a13b9f
--- /dev/null
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -0,0 +1,383 @@
1/*
2 * Device Tree Source for IBM/AMCC Taishan
3 *
4 * Copyright 2007 IBM Corp.
5 * Hugh Blemings <hugh@au.ibm.com> based off code by
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without
10 * any warranty of any kind, whether express or implied.
11 */
12
13/ {
14 #address-cells = <2>;
15 #size-cells = <1>;
16 model = "amcc,taishan";
17 compatible = "amcc,taishan";
18 dcr-parent = <&/cpus/cpu@0>;
19
20 aliases {
21 ethernet0 = &EMAC2;
22 ethernet1 = &EMAC3;
23 serial0 = &UART0;
24 serial1 = &UART1;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 cpu@0 {
32 device_type = "cpu";
33 model = "PowerPC,440GX";
34 reg = <0>;
35 clock-frequency = <2FAF0800>; // 800MHz
36 timebase-frequency = <0>; // Filled in by zImage
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
39 i-cache-size = <8000>; /* 32 kB */
40 d-cache-size = <8000>; /* 32 kB */
41 dcr-controller;
42 dcr-access-method = "native";
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0 0 0>; // Filled in by zImage
49 };
50
51
52 UICB0: interrupt-controller-base {
53 compatible = "ibm,uic-440gx", "ibm,uic";
54 interrupt-controller;
55 cell-index = <3>;
56 dcr-reg = <200 009>;
57 #address-cells = <0>;
58 #size-cells = <0>;
59 #interrupt-cells = <2>;
60 };
61
62
63 UIC0: interrupt-controller0 {
64 compatible = "ibm,uic-440gx", "ibm,uic";
65 interrupt-controller;
66 cell-index = <0>;
67 dcr-reg = <0c0 009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
70 #interrupt-cells = <2>;
71 interrupts = <01 4 00 4>; /* cascade - first non-critical */
72 interrupt-parent = <&UICB0>;
73
74 };
75
76 UIC1: interrupt-controller1 {
77 compatible = "ibm,uic-440gx", "ibm,uic";
78 interrupt-controller;
79 cell-index = <1>;
80 dcr-reg = <0d0 009>;
81 #address-cells = <0>;
82 #size-cells = <0>;
83 #interrupt-cells = <2>;
84 interrupts = <03 4 02 4>; /* cascade */
85 interrupt-parent = <&UICB0>;
86 };
87
88 UIC2: interrupt-controller2 {
89 compatible = "ibm,uic-440gx", "ibm,uic";
90 interrupt-controller;
91 cell-index = <2>; /* was 1 */
92 dcr-reg = <210 009>;
93 #address-cells = <0>;
94 #size-cells = <0>;
95 #interrupt-cells = <2>;
96 interrupts = <05 4 04 4>; /* cascade */
97 interrupt-parent = <&UICB0>;
98 };
99
100
101 CPC0: cpc {
102 compatible = "ibm,cpc-440gp";
103 dcr-reg = <0b0 003 0e0 010>;
104 // FIXME: anything else?
105 };
106
107 plb {
108 compatible = "ibm,plb-440gx", "ibm,plb4";
109 #address-cells = <2>;
110 #size-cells = <1>;
111 ranges;
112 clock-frequency = <9896800>; // 160MHz
113
114 SDRAM0: memory-controller {
115 compatible = "ibm,sdram-440gp";
116 dcr-reg = <010 2>;
117 // FIXME: anything else?
118 };
119
120 SRAM0: sram {
121 compatible = "ibm,sram-440gp";
122 dcr-reg = <020 8 00a 1>;
123 };
124
125 DMA0: dma {
126 // FIXME: ???
127 compatible = "ibm,dma-440gp";
128 dcr-reg = <100 027>;
129 };
130
131 MAL0: mcmal {
132 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
133 dcr-reg = <180 62>;
134 num-tx-chans = <4>;
135 num-rx-chans = <4>;
136 interrupt-parent = <&MAL0>;
137 interrupts = <0 1 2 3 4>;
138 #interrupt-cells = <1>;
139 #address-cells = <0>;
140 #size-cells = <0>;
141 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
142 /*RXEOB*/ 1 &UIC0 b 4
143 /*SERR*/ 2 &UIC1 0 4
144 /*TXDE*/ 3 &UIC1 1 4
145 /*RXDE*/ 4 &UIC1 2 4>;
146 interrupt-map-mask = <ffffffff>;
147 };
148
149 POB0: opb {
150 compatible = "ibm,opb-440gx", "ibm,opb";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 /* Wish there was a nicer way of specifying a full 32-bit
154 range */
155 ranges = <00000000 1 00000000 80000000
156 80000000 1 80000000 80000000>;
157 dcr-reg = <090 00b>;
158 interrupt-parent = <&UIC1>;
159 interrupts = <7 4>;
160 clock-frequency = <4C4B400>; // 80MHz
161
162
163 EBC0: ebc {
164 compatible = "ibm,ebc-440gx", "ibm,ebc";
165 dcr-reg = <012 2>;
166 #address-cells = <2>;
167 #size-cells = <1>;
168 clock-frequency = <4C4B400>; // 80MHz
169
170 /* ranges property is supplied by zImage
171 * based on firmware's configuration of the
172 * EBC bridge */
173
174 interrupts = <5 4>;
175 interrupt-parent = <&UIC1>;
176
177 /* TODO: Add other EBC devices */
178 };
179
180
181
182 UART0: serial@40000200 {
183 device_type = "serial";
184 compatible = "ns16550";
185 reg = <40000200 8>;
186 virtual-reg = <e0000200>;
187 clock-frequency = <A8C000>;
188 current-speed = <1C200>; /* 115200 */
189 interrupt-parent = <&UIC0>;
190 interrupts = <0 4>;
191 };
192
193 UART1: serial@40000300 {
194 device_type = "serial";
195 compatible = "ns16550";
196 reg = <40000300 8>;
197 virtual-reg = <e0000300>;
198 clock-frequency = <A8C000>;
199 current-speed = <1C200>; /* 115200 */
200 interrupt-parent = <&UIC0>;
201 interrupts = <1 4>;
202 };
203
204 IIC0: i2c@40000400 {
205 /* FIXME */
206 device_type = "i2c";
207 compatible = "ibm,iic-440gp", "ibm,iic";
208 reg = <40000400 14>;
209 interrupt-parent = <&UIC0>;
210 interrupts = <2 4>;
211 };
212 IIC1: i2c@40000500 {
213 /* FIXME */
214 device_type = "i2c";
215 compatible = "ibm,iic-440gp", "ibm,iic";
216 reg = <40000500 14>;
217 interrupt-parent = <&UIC0>;
218 interrupts = <3 4>;
219 };
220
221 GPIO0: gpio@40000700 {
222 /* FIXME */
223 compatible = "ibm,gpio-440gp";
224 reg = <40000700 20>;
225 };
226
227 ZMII0: emac-zmii@40000780 {
228 device_type = "zgmii-interface";
229 compatible = "ibm,zmii-440gx", "ibm,zmii";
230 reg = <40000780 c>;
231 };
232
233 RGMII0: emac-rgmii@40000790 {
234 device_type = "rgmii-interface";
235 compatible = "ibm,rgmii";
236 reg = <40000790 8>;
237 };
238
239
240 EMAC0: ethernet@40000800 {
241 unused = <1>;
242 linux,network-index = <2>;
243 device_type = "network";
244 compatible = "ibm,emac-440gx", "ibm,emac4";
245 interrupt-parent = <&UIC1>;
246 interrupts = <1c 4 1d 4>;
247 reg = <40000800 70>;
248 local-mac-address = [000000000000]; // Filled in by zImage
249 mal-device = <&MAL0>;
250 mal-tx-channel = <0>;
251 mal-rx-channel = <0>;
252 cell-index = <0>;
253 max-frame-size = <5dc>;
254 rx-fifo-size = <1000>;
255 tx-fifo-size = <800>;
256 phy-mode = "rmii";
257 phy-map = <00000001>;
258 zmii-device = <&ZMII0>;
259 zmii-channel = <0>;
260 };
261 EMAC1: ethernet@40000900 {
262 unused = <1>;
263 linux,network-index = <3>;
264 device_type = "network";
265 compatible = "ibm,emac-440gx", "ibm,emac4";
266 interrupt-parent = <&UIC1>;
267 interrupts = <1e 4 1f 4>;
268 reg = <40000900 70>;
269 local-mac-address = [000000000000]; // Filled in by zImage
270 mal-device = <&MAL0>;
271 mal-tx-channel = <1>;
272 mal-rx-channel = <1>;
273 cell-index = <1>;
274 max-frame-size = <5dc>;
275 rx-fifo-size = <1000>;
276 tx-fifo-size = <800>;
277 phy-mode = "rmii";
278 phy-map = <00000001>;
279 zmii-device = <&ZMII0>;
280 zmii-channel = <1>;
281 };
282
283 EMAC2: ethernet@40000c00 {
284 linux,network-index = <0>;
285 device_type = "network";
286 compatible = "ibm,emac-440gx", "ibm,emac4";
287 interrupt-parent = <&UIC2>;
288 interrupts = <0 4 1 4>;
289 reg = <40000c00 70>;
290 local-mac-address = [000000000000]; // Filled in by zImage
291 mal-device = <&MAL0>;
292 mal-tx-channel = <2>;
293 mal-rx-channel = <2>;
294 cell-index = <2>;
295 max-frame-size = <5dc>;
296 rx-fifo-size = <1000>;
297 tx-fifo-size = <800>;
298 phy-mode = "rgmii";
299 phy-map = <00000001>;
300 rgmii-device = <&RGMII0>;
301 rgmii-channel = <0>;
302 zmii-device = <&ZMII0>;
303 zmii-channel = <2>;
304 };
305
306 EMAC3: ethernet@40000e00 {
307 linux,network-index = <1>;
308 device_type = "network";
309 compatible = "ibm,emac-440gx", "ibm,emac4";
310 interrupt-parent = <&UIC2>;
311 interrupts = <2 4 3 4>;
312 reg = <40000e00 70>;
313 local-mac-address = [000000000000]; // Filled in by zImage
314 mal-device = <&MAL0>;
315 mal-tx-channel = <3>;
316 mal-rx-channel = <3>;
317 cell-index = <3>;
318 max-frame-size = <5dc>;
319 rx-fifo-size = <1000>;
320 tx-fifo-size = <800>;
321 phy-mode = "rgmii";
322 phy-map = <00000003>;
323 rgmii-device = <&RGMII0>;
324 rgmii-channel = <1>;
325 zmii-device = <&ZMII0>;
326 zmii-channel = <3>;
327 };
328
329
330 GPT0: gpt@40000a00 {
331 /* FIXME */
332 reg = <40000a00 d4>;
333 interrupt-parent = <&UIC0>;
334 interrupts = <12 4 13 4 14 4 15 4 16 4>;
335 };
336
337 };
338
339 PCIX0: pci@20ec00000 {
340 device_type = "pci";
341 #interrupt-cells = <1>;
342 #size-cells = <2>;
343 #address-cells = <3>;
344 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
345 primary;
346 large-inbound-windows;
347 enable-msi-hole;
348 reg = <2 0ec00000 8 /* Config space access */
349 0 0 0 /* no IACK cycles */
350 2 0ed00000 4 /* Special cycles */
351 2 0ec80000 100 /* Internal registers */
352 2 0ec80100 fc>; /* Internal messaging registers */
353
354 /* Outbound ranges, one memory and one IO,
355 * later cannot be changed
356 */
357 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
358 01000000 0 00000000 00000002 08000000 0 00010000>;
359
360 /* Inbound 2GB range starting at 0 */
361 dma-ranges = <42000000 0 0 0 0 0 80000000>;
362
363 interrupt-map-mask = <f800 0 0 7>;
364 interrupt-map = <
365 /* IDSEL 1 */
366 0800 0 0 1 &UIC0 17 8
367 0800 0 0 2 &UIC0 18 8
368 0800 0 0 3 &UIC0 19 8
369 0800 0 0 4 &UIC0 1a 8
370
371 /* IDSEL 2 */
372 1000 0 0 1 &UIC0 18 8
373 1000 0 0 2 &UIC0 19 8
374 1000 0 0 3 &UIC0 1a 8
375 1000 0 0 4 &UIC0 17 8
376 >;
377 };
378 };
379
380 chosen {
381 linux,stdout-path = "/plb/opb/serial@40000300";
382 };
383};
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts
index 754fa3960f83..0e3825e599dc 100644
--- a/arch/powerpc/boot/dts/walnut.dts
+++ b/arch/powerpc/boot/dts/walnut.dts
@@ -14,14 +14,21 @@
14 #size-cells = <1>; 14 #size-cells = <1>;
15 model = "ibm,walnut"; 15 model = "ibm,walnut";
16 compatible = "ibm,walnut"; 16 compatible = "ibm,walnut";
17 dcr-parent = <&/cpus/PowerPC,405GP@0>; 17 dcr-parent = <&/cpus/cpu@0>;
18
19 aliases {
20 ethernet0 = &EMAC;
21 serial0 = &UART0;
22 serial1 = &UART1;
23 };
18 24
19 cpus { 25 cpus {
20 #address-cells = <1>; 26 #address-cells = <1>;
21 #size-cells = <0>; 27 #size-cells = <0>;
22 28
23 PowerPC,405GP@0 { 29 cpu@0 {
24 device_type = "cpu"; 30 device_type = "cpu";
31 model = "PowerPC,405GP";
25 reg = <0>; 32 reg = <0>;
26 clock-frequency = <bebc200>; /* Filled in by zImage */ 33 clock-frequency = <bebc200>; /* Filled in by zImage */
27 timebase-frequency = <0>; /* Filled in by zImage */ 34 timebase-frequency = <0>; /* Filled in by zImage */
@@ -190,6 +197,45 @@
190 virtual-reg = <f0300005>; 197 virtual-reg = <f0300005>;
191 }; 198 };
192 }; 199 };
200
201 PCI0: pci@ec000000 {
202 device_type = "pci";
203 #interrupt-cells = <1>;
204 #size-cells = <2>;
205 #address-cells = <3>;
206 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
207 primary;
208 reg = <eec00000 8 /* Config space access */
209 eed80000 4 /* IACK */
210 eed80000 4 /* Special cycle */
211 ef480000 40>; /* Internal registers */
212
213 /* Outbound ranges, one memory and one IO,
214 * later cannot be changed. Chip supports a second
215 * IO range but we don't use it for now
216 */
217 ranges = <02000000 0 80000000 80000000 0 20000000
218 01000000 0 00000000 e8000000 0 00010000>;
219
220 /* Inbound 2GB range starting at 0 */
221 dma-ranges = <42000000 0 0 0 0 80000000>;
222
223 /* Walnut has all 4 IRQ pins tied together per slot */
224 interrupt-map-mask = <f800 0 0 0>;
225 interrupt-map = <
226 /* IDSEL 1 */
227 0800 0 0 0 &UIC0 1c 8
228
229 /* IDSEL 2 */
230 1000 0 0 0 &UIC0 1d 8
231
232 /* IDSEL 3 */
233 1800 0 0 0 &UIC0 1e 8
234
235 /* IDSEL 4 */
236 2000 0 0 0 &UIC0 1f 8
237 >;
238 };
193 }; 239 };
194 240
195 chosen { 241 chosen {
diff --git a/arch/powerpc/boot/ebony.c b/arch/powerpc/boot/ebony.c
index ee31be5e633e..f61364c47a76 100644
--- a/arch/powerpc/boot/ebony.c
+++ b/arch/powerpc/boot/ebony.c
@@ -31,66 +31,6 @@
31 31
32static u8 *ebony_mac0, *ebony_mac1; 32static u8 *ebony_mac0, *ebony_mac1;
33 33
34/* Calculate 440GP clocks */
35void ibm440gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
36{
37 u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
38 u32 cr0 = mfdcr(DCRN_CPC0_CR0);
39 u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
40 u32 opdv = CPC0_SYS0_OPDV(sys0);
41 u32 epdv = CPC0_SYS0_EPDV(sys0);
42
43 if (sys0 & CPC0_SYS0_BYPASS) {
44 /* Bypass system PLL */
45 cpu = plb = sysclk;
46 } else {
47 if (sys0 & CPC0_SYS0_EXTSL)
48 /* PerClk */
49 m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
50 else
51 /* CPU clock */
52 m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
53 cpu = sysclk * m / CPC0_SYS0_FWDVA(sys0);
54 plb = sysclk * m / CPC0_SYS0_FWDVB(sys0);
55 }
56
57 opb = plb / opdv;
58 ebc = opb / epdv;
59
60 /* FIXME: Check if this is for all 440GP, or just Ebony */
61 if ((mfpvr() & 0xf0000fff) == 0x40000440)
62 /* Rev. B 440GP, use external system clock */
63 tb = sysclk;
64 else
65 /* Rev. C 440GP, errata force us to use internal clock */
66 tb = cpu;
67
68 if (cr0 & CPC0_CR0_U0EC)
69 /* External UART clock */
70 uart0 = ser_clk;
71 else
72 /* Internal UART clock */
73 uart0 = plb / CPC0_CR0_UDIV(cr0);
74
75 if (cr0 & CPC0_CR0_U1EC)
76 /* External UART clock */
77 uart1 = ser_clk;
78 else
79 /* Internal UART clock */
80 uart1 = plb / CPC0_CR0_UDIV(cr0);
81
82 printf("PPC440GP: SysClk = %dMHz (%x)\n\r",
83 (sysclk + 500000) / 1000000, sysclk);
84
85 dt_fixup_cpu_clocks(cpu, tb, 0);
86
87 dt_fixup_clock("/plb", plb);
88 dt_fixup_clock("/plb/opb", opb);
89 dt_fixup_clock("/plb/opb/ebc", ebc);
90 dt_fixup_clock("/plb/opb/serial@40000200", uart0);
91 dt_fixup_clock("/plb/opb/serial@40000300", uart1);
92}
93
94#define EBONY_FPGA_PATH "/plb/opb/ebc/fpga" 34#define EBONY_FPGA_PATH "/plb/opb/ebc/fpga"
95#define EBONY_FPGA_FLASH_SEL 0x01 35#define EBONY_FPGA_FLASH_SEL 0x01
96#define EBONY_SMALL_FLASH_PATH "/plb/opb/ebc/small-flash" 36#define EBONY_SMALL_FLASH_PATH "/plb/opb/ebc/small-flash"
@@ -134,7 +74,7 @@ static void ebony_fixups(void)
134 unsigned long sysclk = 33000000; 74 unsigned long sysclk = 33000000;
135 75
136 ibm440gp_fixup_clocks(sysclk, 6 * 1843200); 76 ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
137 ibm4xx_fixup_memsize(); 77 ibm4xx_sdram_fixup_memsize();
138 dt_fixup_mac_addresses(ebony_mac0, ebony_mac1); 78 dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
139 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); 79 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
140 ebony_flashsel_fixup(); 80 ebony_flashsel_fixup();
diff --git a/arch/powerpc/boot/ep405.c b/arch/powerpc/boot/ep405.c
new file mode 100644
index 000000000000..2d08a862cbea
--- /dev/null
+++ b/arch/powerpc/boot/ep405.c
@@ -0,0 +1,74 @@
1/*
2 * Embedded Planet EP405 with PlanetCore firmware
3 *
4 * (c) Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp,\
5 *
6 * Based on ep88xc.c by
7 *
8 * Scott Wood <scottwood@freescale.com>
9 *
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
15 */
16
17#include "ops.h"
18#include "stdio.h"
19#include "planetcore.h"
20#include "dcr.h"
21#include "4xx.h"
22#include "io.h"
23
24static char *table;
25static u64 mem_size;
26
27static void platform_fixups(void)
28{
29 u64 val;
30 void *nvrtc;
31
32 dt_fixup_memory(0, mem_size);
33 planetcore_set_mac_addrs(table);
34
35 if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
36 printf("No PlanetCore crystal frequency key.\r\n");
37 return;
38 }
39 ibm405gp_fixup_clocks(val, 0xa8c000);
40 ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
41 ibm4xx_fixup_ebc_ranges("/plb/ebc");
42
43 if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, &val)) {
44 printf("No PlanetCore NVRAM size key.\r\n");
45 return;
46 }
47 nvrtc = finddevice("/plb/ebc/nvrtc@4,200000");
48 if (nvrtc != NULL) {
49 u32 reg[3] = { 4, 0x200000, 0};
50 getprop(nvrtc, "reg", reg, 3);
51 reg[2] = (val << 10) & 0xffffffff;
52 setprop(nvrtc, "reg", reg, 3);
53 }
54}
55
56void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
57 unsigned long r6, unsigned long r7)
58{
59 table = (char *)r3;
60 planetcore_prepare_table(table);
61
62 if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size))
63 return;
64
65 mem_size *= 1024 * 1024;
66 simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64);
67
68 fdt_init(_dtb_start);
69
70 planetcore_set_stdout_path(table);
71
72 serial_console_init();
73 platform_ops.fixups = platform_fixups;
74}
diff --git a/arch/powerpc/boot/reg.h b/arch/powerpc/boot/reg.h
index d3cd9ee98afb..9c2c9978e0eb 100644
--- a/arch/powerpc/boot/reg.h
+++ b/arch/powerpc/boot/reg.h
@@ -16,6 +16,14 @@ static inline u32 mfpvr(void)
16 return pvr; 16 return pvr;
17} 17}
18 18
19#define __stringify_1(x) #x
20#define __stringify(x) __stringify_1(x)
21
22#define mfspr(rn) ({unsigned long rval; \
23 asm volatile("mfspr %0," __stringify(rn) \
24 : "=r" (rval)); rval; })
25#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v))
26
19register void *__stack_pointer asm("r1"); 27register void *__stack_pointer asm("r1");
20#define get_sp() (__stack_pointer) 28#define get_sp() (__stack_pointer)
21 29
diff --git a/arch/powerpc/boot/treeboot-walnut.c b/arch/powerpc/boot/treeboot-walnut.c
index 70ffce343c0a..472e36605a52 100644
--- a/arch/powerpc/boot/treeboot-walnut.c
+++ b/arch/powerpc/boot/treeboot-walnut.c
@@ -20,55 +20,6 @@
20 20
21BSS_STACK(4096); 21BSS_STACK(4096);
22 22
23void ibm405gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
24{
25 u32 pllmr = mfdcr(DCRN_CPC0_PLLMR);
26 u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0);
27 u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1);
28 u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
29 u32 fwdv, fbdv, cbdv, opdv, epdv, udiv;
30
31 fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
32 fbdv = (pllmr & 0x1e000000) >> 25;
33 cbdv = ((pllmr & 0x00060000) >> 17) + 1;
34 opdv = ((pllmr & 0x00018000) >> 15) + 1;
35 epdv = ((pllmr & 0x00001800) >> 13) + 2;
36 udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
37
38 m = fwdv * fbdv * cbdv;
39
40 cpu = sysclk * m / fwdv;
41 plb = cpu / cbdv;
42 opb = plb / opdv;
43 ebc = plb / epdv;
44
45 if (cpc0_cr0 & 0x80) {
46 /* uart0 uses the external clock */
47 uart0 = ser_clk;
48 } else {
49 uart0 = cpu / udiv;
50 }
51
52 if (cpc0_cr0 & 0x40) {
53 /* uart1 uses the external clock */
54 uart1 = ser_clk;
55 } else {
56 uart1 = cpu / udiv;
57 }
58
59 /* setup the timebase clock to tick at the cpu frequency */
60 cpc0_cr1 = cpc0_cr1 & ~0x00800000;
61 mtdcr(DCRN_405_CPC0_CR1, cpc0_cr1);
62 tb = cpu;
63
64 dt_fixup_cpu_clocks(cpu, tb, 0);
65 dt_fixup_clock("/plb", plb);
66 dt_fixup_clock("/plb/opb", opb);
67 dt_fixup_clock("/plb/ebc", ebc);
68 dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
69 dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
70}
71
72static void walnut_flashsel_fixup(void) 23static void walnut_flashsel_fixup(void)
73{ 24{
74 void *devp, *sram; 25 void *devp, *sram;
@@ -112,7 +63,7 @@ static void walnut_flashsel_fixup(void)
112#define WALNUT_OPENBIOS_MAC_OFF 0xfffffe0b 63#define WALNUT_OPENBIOS_MAC_OFF 0xfffffe0b
113static void walnut_fixups(void) 64static void walnut_fixups(void)
114{ 65{
115 ibm4xx_fixup_memsize(); 66 ibm4xx_sdram_fixup_memsize();
116 ibm405gp_fixup_clocks(33330000, 0xa8c000); 67 ibm405gp_fixup_clocks(33330000, 0xa8c000);
117 ibm4xx_quiesce_eth((u32 *)0xef600800, NULL); 68 ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
118 ibm4xx_fixup_ebc_ranges("/plb/ebc"); 69 ibm4xx_fixup_ebc_ranges("/plb/ebc");
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index f961cdeb97a2..154df055aad2 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -168,7 +168,7 @@ ps3)
168 ksection=.kernel:vmlinux.bin 168 ksection=.kernel:vmlinux.bin
169 isection=.kernel:initrd 169 isection=.kernel:initrd
170 ;; 170 ;;
171ep88xc) 171ep88xc|ep405)
172 platformo="$object/fixed-head.o $object/$platform.o" 172 platformo="$object/fixed-head.o $object/$platform.o"
173 binary=y 173 binary=y
174 ;; 174 ;;
diff --git a/arch/powerpc/configs/bamboo_defconfig b/arch/powerpc/configs/bamboo_defconfig
index 76d883e008b6..0dc9c4b4794d 100644
--- a/arch/powerpc/configs/bamboo_defconfig
+++ b/arch/powerpc/configs/bamboo_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc4 3# Linux kernel version: 2.6.24-rc6
4# Thu Dec 6 16:48:04 2007 4# Mon Dec 24 10:49:50 2007
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -131,6 +131,7 @@ CONFIG_DEFAULT_AS=y
131# CONFIG_DEFAULT_CFQ is not set 131# CONFIG_DEFAULT_CFQ is not set
132# CONFIG_DEFAULT_NOOP is not set 132# CONFIG_DEFAULT_NOOP is not set
133CONFIG_DEFAULT_IOSCHED="anticipatory" 133CONFIG_DEFAULT_IOSCHED="anticipatory"
134# CONFIG_PPC4xx_PCI_EXPRESS is not set
134 135
135# 136#
136# Platform support 137# Platform support
@@ -143,6 +144,9 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
143CONFIG_BAMBOO=y 144CONFIG_BAMBOO=y
144# CONFIG_EBONY is not set 145# CONFIG_EBONY is not set
145# CONFIG_SEQUOIA is not set 146# CONFIG_SEQUOIA is not set
147# CONFIG_TAISHAN is not set
148# CONFIG_KATMAI is not set
149# CONFIG_RAINIER is not set
146CONFIG_440EP=y 150CONFIG_440EP=y
147CONFIG_IBM440EP_ERR42=y 151CONFIG_IBM440EP_ERR42=y
148# CONFIG_MPIC is not set 152# CONFIG_MPIC is not set
@@ -736,19 +740,7 @@ CONFIG_DEBUGGER=y
736# CONFIG_KGDB is not set 740# CONFIG_KGDB is not set
737# CONFIG_XMON is not set 741# CONFIG_XMON is not set
738# CONFIG_BDI_SWITCH is not set 742# CONFIG_BDI_SWITCH is not set
739CONFIG_PPC_EARLY_DEBUG=y 743# CONFIG_PPC_EARLY_DEBUG is not set
740# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
741# CONFIG_PPC_EARLY_DEBUG_G5 is not set
742# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
743# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
744# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
745# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
746# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
747# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
748CONFIG_PPC_EARLY_DEBUG_44x=y
749# CONFIG_PPC_EARLY_DEBUG_CPM is not set
750CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300
751CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x0
752 744
753# 745#
754# Security options 746# Security options
diff --git a/arch/powerpc/configs/ebony_defconfig b/arch/powerpc/configs/ebony_defconfig
index b84298ce42be..cf860f166659 100644
--- a/arch/powerpc/configs/ebony_defconfig
+++ b/arch/powerpc/configs/ebony_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc4 3# Linux kernel version: 2.6.24-rc6
4# Thu Dec 6 16:48:11 2007 4# Mon Dec 24 11:16:26 2007
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -130,6 +130,7 @@ CONFIG_DEFAULT_AS=y
130# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
131# CONFIG_DEFAULT_NOOP is not set 131# CONFIG_DEFAULT_NOOP is not set
132CONFIG_DEFAULT_IOSCHED="anticipatory" 132CONFIG_DEFAULT_IOSCHED="anticipatory"
133# CONFIG_PPC4xx_PCI_EXPRESS is not set
133 134
134# 135#
135# Platform support 136# Platform support
@@ -142,6 +143,9 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
142# CONFIG_BAMBOO is not set 143# CONFIG_BAMBOO is not set
143CONFIG_EBONY=y 144CONFIG_EBONY=y
144# CONFIG_SEQUOIA is not set 145# CONFIG_SEQUOIA is not set
146# CONFIG_TAISHAN is not set
147# CONFIG_KATMAI is not set
148# CONFIG_RAINIER is not set
145CONFIG_440GP=y 149CONFIG_440GP=y
146# CONFIG_MPIC is not set 150# CONFIG_MPIC is not set
147# CONFIG_MPIC_WEIRD is not set 151# CONFIG_MPIC_WEIRD is not set
diff --git a/arch/powerpc/configs/ep405_defconfig b/arch/powerpc/configs/ep405_defconfig
new file mode 100644
index 000000000000..3829c9166256
--- /dev/null
+++ b/arch/powerpc/configs/ep405_defconfig
@@ -0,0 +1,952 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc6
4# Mon Dec 24 11:17:13 2007
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14CONFIG_40x=y
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_4xx=y
18# CONFIG_PPC_MM_SLICES is not set
19CONFIG_NOT_COHERENT_CACHE=y
20CONFIG_PPC32=y
21CONFIG_WORD_SIZE=32
22CONFIG_PPC_MERGE=y
23CONFIG_MMU=y
24CONFIG_GENERIC_CMOS_UPDATE=y
25CONFIG_GENERIC_TIME=y
26CONFIG_GENERIC_TIME_VSYSCALL=y
27CONFIG_GENERIC_CLOCKEVENTS=y
28CONFIG_GENERIC_HARDIRQS=y
29CONFIG_IRQ_PER_CPU=y
30CONFIG_RWSEM_XCHGADD_ALGORITHM=y
31CONFIG_ARCH_HAS_ILOG2_U32=y
32CONFIG_GENERIC_HWEIGHT=y
33CONFIG_GENERIC_CALIBRATE_DELAY=y
34CONFIG_GENERIC_FIND_NEXT_BIT=y
35# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
36CONFIG_PPC=y
37CONFIG_EARLY_PRINTK=y
38CONFIG_GENERIC_NVRAM=y
39CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
40CONFIG_ARCH_MAY_HAVE_PC_FDC=y
41CONFIG_PPC_OF=y
42CONFIG_OF=y
43CONFIG_PPC_UDBG_16550=y
44# CONFIG_GENERIC_TBSYNC is not set
45CONFIG_AUDIT_ARCH=y
46CONFIG_GENERIC_BUG=y
47# CONFIG_DEFAULT_UIMAGE is not set
48CONFIG_PPC_DCR_NATIVE=y
49# CONFIG_PPC_DCR_MMIO is not set
50CONFIG_PPC_DCR=y
51CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
52
53#
54# General setup
55#
56CONFIG_EXPERIMENTAL=y
57CONFIG_BROKEN_ON_SMP=y
58CONFIG_INIT_ENV_ARG_LIMIT=32
59CONFIG_LOCALVERSION=""
60CONFIG_LOCALVERSION_AUTO=y
61CONFIG_SWAP=y
62CONFIG_SYSVIPC=y
63CONFIG_SYSVIPC_SYSCTL=y
64CONFIG_POSIX_MQUEUE=y
65# CONFIG_BSD_PROCESS_ACCT is not set
66# CONFIG_TASKSTATS is not set
67# CONFIG_USER_NS is not set
68# CONFIG_PID_NS is not set
69# CONFIG_AUDIT is not set
70# CONFIG_IKCONFIG is not set
71CONFIG_LOG_BUF_SHIFT=14
72# CONFIG_CGROUPS is not set
73CONFIG_FAIR_GROUP_SCHED=y
74CONFIG_FAIR_USER_SCHED=y
75# CONFIG_FAIR_CGROUP_SCHED is not set
76CONFIG_SYSFS_DEPRECATED=y
77# CONFIG_RELAY is not set
78CONFIG_BLK_DEV_INITRD=y
79CONFIG_INITRAMFS_SOURCE=""
80# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
81CONFIG_SYSCTL=y
82CONFIG_EMBEDDED=y
83CONFIG_SYSCTL_SYSCALL=y
84CONFIG_KALLSYMS=y
85CONFIG_KALLSYMS_ALL=y
86CONFIG_KALLSYMS_EXTRA_PASS=y
87CONFIG_HOTPLUG=y
88CONFIG_PRINTK=y
89CONFIG_BUG=y
90CONFIG_ELF_CORE=y
91CONFIG_BASE_FULL=y
92CONFIG_FUTEX=y
93CONFIG_ANON_INODES=y
94CONFIG_EPOLL=y
95CONFIG_SIGNALFD=y
96CONFIG_EVENTFD=y
97CONFIG_SHMEM=y
98CONFIG_VM_EVENT_COUNTERS=y
99CONFIG_SLUB_DEBUG=y
100# CONFIG_SLAB is not set
101CONFIG_SLUB=y
102# CONFIG_SLOB is not set
103CONFIG_RT_MUTEXES=y
104# CONFIG_TINY_SHMEM is not set
105CONFIG_BASE_SMALL=0
106CONFIG_MODULES=y
107CONFIG_MODULE_UNLOAD=y
108# CONFIG_MODULE_FORCE_UNLOAD is not set
109# CONFIG_MODVERSIONS is not set
110# CONFIG_MODULE_SRCVERSION_ALL is not set
111CONFIG_KMOD=y
112CONFIG_BLOCK=y
113CONFIG_LBD=y
114# CONFIG_BLK_DEV_IO_TRACE is not set
115# CONFIG_LSF is not set
116# CONFIG_BLK_DEV_BSG is not set
117
118#
119# IO Schedulers
120#
121CONFIG_IOSCHED_NOOP=y
122CONFIG_IOSCHED_AS=y
123CONFIG_IOSCHED_DEADLINE=y
124CONFIG_IOSCHED_CFQ=y
125CONFIG_DEFAULT_AS=y
126# CONFIG_DEFAULT_DEADLINE is not set
127# CONFIG_DEFAULT_CFQ is not set
128# CONFIG_DEFAULT_NOOP is not set
129CONFIG_DEFAULT_IOSCHED="anticipatory"
130# CONFIG_PPC4xx_PCI_EXPRESS is not set
131
132#
133# Platform support
134#
135# CONFIG_PPC_MPC52xx is not set
136# CONFIG_PPC_MPC5200 is not set
137# CONFIG_PPC_CELL is not set
138# CONFIG_PPC_CELL_NATIVE is not set
139# CONFIG_PQ2ADS is not set
140CONFIG_EP405=y
141# CONFIG_KILAUEA is not set
142# CONFIG_MAKALU is not set
143# CONFIG_WALNUT is not set
144# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set
145CONFIG_405GP=y
146CONFIG_IBM405_ERR77=y
147CONFIG_IBM405_ERR51=y
148# CONFIG_MPIC is not set
149# CONFIG_MPIC_WEIRD is not set
150# CONFIG_PPC_I8259 is not set
151# CONFIG_PPC_RTAS is not set
152# CONFIG_MMIO_NVRAM is not set
153# CONFIG_PPC_MPC106 is not set
154# CONFIG_PPC_970_NAP is not set
155# CONFIG_PPC_INDIRECT_IO is not set
156# CONFIG_GENERIC_IOMAP is not set
157# CONFIG_CPU_FREQ is not set
158# CONFIG_CPM2 is not set
159# CONFIG_FSL_ULI1575 is not set
160
161#
162# Kernel options
163#
164# CONFIG_HIGHMEM is not set
165# CONFIG_TICK_ONESHOT is not set
166# CONFIG_NO_HZ is not set
167# CONFIG_HIGH_RES_TIMERS is not set
168CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
169# CONFIG_HZ_100 is not set
170CONFIG_HZ_250=y
171# CONFIG_HZ_300 is not set
172# CONFIG_HZ_1000 is not set
173CONFIG_HZ=250
174CONFIG_PREEMPT_NONE=y
175# CONFIG_PREEMPT_VOLUNTARY is not set
176# CONFIG_PREEMPT is not set
177CONFIG_BINFMT_ELF=y
178# CONFIG_BINFMT_MISC is not set
179# CONFIG_MATH_EMULATION is not set
180CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
181CONFIG_ARCH_FLATMEM_ENABLE=y
182CONFIG_ARCH_POPULATES_NODE_MAP=y
183CONFIG_SELECT_MEMORY_MODEL=y
184CONFIG_FLATMEM_MANUAL=y
185# CONFIG_DISCONTIGMEM_MANUAL is not set
186# CONFIG_SPARSEMEM_MANUAL is not set
187CONFIG_FLATMEM=y
188CONFIG_FLAT_NODE_MEM_MAP=y
189# CONFIG_SPARSEMEM_STATIC is not set
190# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
191CONFIG_SPLIT_PTLOCK_CPUS=4
192# CONFIG_RESOURCES_64BIT is not set
193CONFIG_ZONE_DMA_FLAG=1
194CONFIG_BOUNCE=y
195CONFIG_VIRT_TO_BUS=y
196CONFIG_PROC_DEVICETREE=y
197# CONFIG_CMDLINE_BOOL is not set
198# CONFIG_PM is not set
199CONFIG_SUSPEND_UP_POSSIBLE=y
200CONFIG_HIBERNATION_UP_POSSIBLE=y
201CONFIG_SECCOMP=y
202CONFIG_WANT_DEVICE_TREE=y
203CONFIG_DEVICE_TREE="ep405.dts"
204CONFIG_ISA_DMA_API=y
205
206#
207# Bus options
208#
209CONFIG_ZONE_DMA=y
210CONFIG_PPC_INDIRECT_PCI=y
211CONFIG_PCI=y
212CONFIG_PCI_DOMAINS=y
213CONFIG_PCI_SYSCALL=y
214# CONFIG_PCIEPORTBUS is not set
215CONFIG_ARCH_SUPPORTS_MSI=y
216# CONFIG_PCI_MSI is not set
217CONFIG_PCI_LEGACY=y
218# CONFIG_PCI_DEBUG is not set
219# CONFIG_PCCARD is not set
220# CONFIG_HOTPLUG_PCI is not set
221
222#
223# Advanced setup
224#
225# CONFIG_ADVANCED_OPTIONS is not set
226
227#
228# Default settings for advanced configuration options are used
229#
230CONFIG_HIGHMEM_START=0xfe000000
231CONFIG_LOWMEM_SIZE=0x30000000
232CONFIG_KERNEL_START=0xc0000000
233CONFIG_TASK_SIZE=0xc0000000
234CONFIG_CONSISTENT_START=0xff100000
235CONFIG_CONSISTENT_SIZE=0x00200000
236CONFIG_BOOT_LOAD=0x00400000
237
238#
239# Networking
240#
241CONFIG_NET=y
242
243#
244# Networking options
245#
246CONFIG_PACKET=y
247# CONFIG_PACKET_MMAP is not set
248CONFIG_UNIX=y
249# CONFIG_NET_KEY is not set
250CONFIG_INET=y
251# CONFIG_IP_MULTICAST is not set
252# CONFIG_IP_ADVANCED_ROUTER is not set
253CONFIG_IP_FIB_HASH=y
254CONFIG_IP_PNP=y
255CONFIG_IP_PNP_DHCP=y
256CONFIG_IP_PNP_BOOTP=y
257# CONFIG_IP_PNP_RARP is not set
258# CONFIG_NET_IPIP is not set
259# CONFIG_NET_IPGRE is not set
260# CONFIG_ARPD is not set
261# CONFIG_SYN_COOKIES is not set
262# CONFIG_INET_AH is not set
263# CONFIG_INET_ESP is not set
264# CONFIG_INET_IPCOMP is not set
265# CONFIG_INET_XFRM_TUNNEL is not set
266# CONFIG_INET_TUNNEL is not set
267# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
268# CONFIG_INET_XFRM_MODE_TUNNEL is not set
269# CONFIG_INET_XFRM_MODE_BEET is not set
270# CONFIG_INET_LRO is not set
271CONFIG_INET_DIAG=y
272CONFIG_INET_TCP_DIAG=y
273# CONFIG_TCP_CONG_ADVANCED is not set
274CONFIG_TCP_CONG_CUBIC=y
275CONFIG_DEFAULT_TCP_CONG="cubic"
276# CONFIG_TCP_MD5SIG is not set
277# CONFIG_IPV6 is not set
278# CONFIG_INET6_XFRM_TUNNEL is not set
279# CONFIG_INET6_TUNNEL is not set
280# CONFIG_NETWORK_SECMARK is not set
281# CONFIG_NETFILTER is not set
282# CONFIG_IP_DCCP is not set
283# CONFIG_IP_SCTP is not set
284# CONFIG_TIPC is not set
285# CONFIG_ATM is not set
286# CONFIG_BRIDGE is not set
287# CONFIG_VLAN_8021Q is not set
288# CONFIG_DECNET is not set
289# CONFIG_LLC2 is not set
290# CONFIG_IPX is not set
291# CONFIG_ATALK is not set
292# CONFIG_X25 is not set
293# CONFIG_LAPB is not set
294# CONFIG_ECONET is not set
295# CONFIG_WAN_ROUTER is not set
296# CONFIG_NET_SCHED is not set
297
298#
299# Network testing
300#
301# CONFIG_NET_PKTGEN is not set
302# CONFIG_HAMRADIO is not set
303# CONFIG_IRDA is not set
304# CONFIG_BT is not set
305# CONFIG_AF_RXRPC is not set
306
307#
308# Wireless
309#
310# CONFIG_CFG80211 is not set
311# CONFIG_WIRELESS_EXT is not set
312# CONFIG_MAC80211 is not set
313# CONFIG_IEEE80211 is not set
314# CONFIG_RFKILL is not set
315# CONFIG_NET_9P is not set
316
317#
318# Device Drivers
319#
320
321#
322# Generic Driver Options
323#
324CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
325CONFIG_STANDALONE=y
326CONFIG_PREVENT_FIRMWARE_BUILD=y
327CONFIG_FW_LOADER=y
328# CONFIG_DEBUG_DRIVER is not set
329# CONFIG_DEBUG_DEVRES is not set
330# CONFIG_SYS_HYPERVISOR is not set
331CONFIG_CONNECTOR=y
332CONFIG_PROC_EVENTS=y
333CONFIG_MTD=y
334# CONFIG_MTD_DEBUG is not set
335# CONFIG_MTD_CONCAT is not set
336CONFIG_MTD_PARTITIONS=y
337# CONFIG_MTD_REDBOOT_PARTS is not set
338CONFIG_MTD_CMDLINE_PARTS=y
339
340#
341# User Modules And Translation Layers
342#
343CONFIG_MTD_CHAR=y
344CONFIG_MTD_BLKDEVS=m
345CONFIG_MTD_BLOCK=m
346# CONFIG_MTD_BLOCK_RO is not set
347# CONFIG_FTL is not set
348# CONFIG_NFTL is not set
349# CONFIG_INFTL is not set
350# CONFIG_RFD_FTL is not set
351# CONFIG_SSFDC is not set
352# CONFIG_MTD_OOPS is not set
353
354#
355# RAM/ROM/Flash chip drivers
356#
357CONFIG_MTD_CFI=y
358CONFIG_MTD_JEDECPROBE=y
359CONFIG_MTD_GEN_PROBE=y
360# CONFIG_MTD_CFI_ADV_OPTIONS is not set
361CONFIG_MTD_MAP_BANK_WIDTH_1=y
362CONFIG_MTD_MAP_BANK_WIDTH_2=y
363CONFIG_MTD_MAP_BANK_WIDTH_4=y
364# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
365# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
366# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
367CONFIG_MTD_CFI_I1=y
368CONFIG_MTD_CFI_I2=y
369# CONFIG_MTD_CFI_I4 is not set
370# CONFIG_MTD_CFI_I8 is not set
371# CONFIG_MTD_CFI_INTELEXT is not set
372CONFIG_MTD_CFI_AMDSTD=y
373# CONFIG_MTD_CFI_STAA is not set
374CONFIG_MTD_CFI_UTIL=y
375# CONFIG_MTD_RAM is not set
376# CONFIG_MTD_ROM is not set
377# CONFIG_MTD_ABSENT is not set
378
379#
380# Mapping drivers for chip access
381#
382# CONFIG_MTD_COMPLEX_MAPPINGS is not set
383# CONFIG_MTD_PHYSMAP is not set
384CONFIG_MTD_PHYSMAP_OF=y
385# CONFIG_MTD_INTEL_VR_NOR is not set
386# CONFIG_MTD_PLATRAM is not set
387
388#
389# Self-contained MTD device drivers
390#
391# CONFIG_MTD_PMC551 is not set
392# CONFIG_MTD_SLRAM is not set
393# CONFIG_MTD_PHRAM is not set
394# CONFIG_MTD_MTDRAM is not set
395# CONFIG_MTD_BLOCK2MTD is not set
396
397#
398# Disk-On-Chip Device Drivers
399#
400# CONFIG_MTD_DOC2000 is not set
401# CONFIG_MTD_DOC2001 is not set
402# CONFIG_MTD_DOC2001PLUS is not set
403# CONFIG_MTD_NAND is not set
404# CONFIG_MTD_ONENAND is not set
405
406#
407# UBI - Unsorted block images
408#
409# CONFIG_MTD_UBI is not set
410CONFIG_OF_DEVICE=y
411# CONFIG_PARPORT is not set
412CONFIG_BLK_DEV=y
413# CONFIG_BLK_DEV_FD is not set
414# CONFIG_BLK_CPQ_DA is not set
415# CONFIG_BLK_CPQ_CISS_DA is not set
416# CONFIG_BLK_DEV_DAC960 is not set
417# CONFIG_BLK_DEV_UMEM is not set
418# CONFIG_BLK_DEV_COW_COMMON is not set
419# CONFIG_BLK_DEV_LOOP is not set
420# CONFIG_BLK_DEV_NBD is not set
421# CONFIG_BLK_DEV_SX8 is not set
422# CONFIG_BLK_DEV_UB is not set
423CONFIG_BLK_DEV_RAM=y
424CONFIG_BLK_DEV_RAM_COUNT=16
425CONFIG_BLK_DEV_RAM_SIZE=35000
426CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
427# CONFIG_CDROM_PKTCDVD is not set
428# CONFIG_ATA_OVER_ETH is not set
429# CONFIG_XILINX_SYSACE is not set
430CONFIG_MISC_DEVICES=y
431# CONFIG_PHANTOM is not set
432# CONFIG_EEPROM_93CX6 is not set
433# CONFIG_SGI_IOC4 is not set
434# CONFIG_TIFM_CORE is not set
435# CONFIG_IDE is not set
436
437#
438# SCSI device support
439#
440# CONFIG_RAID_ATTRS is not set
441# CONFIG_SCSI is not set
442# CONFIG_SCSI_DMA is not set
443# CONFIG_SCSI_NETLINK is not set
444# CONFIG_ATA is not set
445# CONFIG_MD is not set
446# CONFIG_FUSION is not set
447
448#
449# IEEE 1394 (FireWire) support
450#
451# CONFIG_FIREWIRE is not set
452# CONFIG_IEEE1394 is not set
453# CONFIG_I2O is not set
454# CONFIG_MACINTOSH_DRIVERS is not set
455CONFIG_NETDEVICES=y
456# CONFIG_NETDEVICES_MULTIQUEUE is not set
457# CONFIG_DUMMY is not set
458# CONFIG_BONDING is not set
459# CONFIG_MACVLAN is not set
460# CONFIG_EQUALIZER is not set
461# CONFIG_TUN is not set
462# CONFIG_VETH is not set
463# CONFIG_IP1000 is not set
464# CONFIG_ARCNET is not set
465# CONFIG_PHYLIB is not set
466CONFIG_NET_ETHERNET=y
467# CONFIG_MII is not set
468# CONFIG_HAPPYMEAL is not set
469# CONFIG_SUNGEM is not set
470# CONFIG_CASSINI is not set
471# CONFIG_NET_VENDOR_3COM is not set
472# CONFIG_NET_TULIP is not set
473# CONFIG_HP100 is not set
474CONFIG_IBM_NEW_EMAC=y
475CONFIG_IBM_NEW_EMAC_RXB=128
476CONFIG_IBM_NEW_EMAC_TXB=64
477CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
478CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
479CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
480# CONFIG_IBM_NEW_EMAC_DEBUG is not set
481CONFIG_IBM_NEW_EMAC_ZMII=y
482# CONFIG_IBM_NEW_EMAC_RGMII is not set
483# CONFIG_IBM_NEW_EMAC_TAH is not set
484# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
485# CONFIG_NET_PCI is not set
486# CONFIG_B44 is not set
487CONFIG_NETDEV_1000=y
488# CONFIG_ACENIC is not set
489# CONFIG_DL2K is not set
490# CONFIG_E1000 is not set
491# CONFIG_E1000E is not set
492# CONFIG_NS83820 is not set
493# CONFIG_HAMACHI is not set
494# CONFIG_YELLOWFIN is not set
495# CONFIG_R8169 is not set
496# CONFIG_SIS190 is not set
497# CONFIG_SKGE is not set
498# CONFIG_SKY2 is not set
499# CONFIG_SK98LIN is not set
500# CONFIG_VIA_VELOCITY is not set
501# CONFIG_TIGON3 is not set
502# CONFIG_BNX2 is not set
503# CONFIG_QLA3XXX is not set
504# CONFIG_ATL1 is not set
505CONFIG_NETDEV_10000=y
506# CONFIG_CHELSIO_T1 is not set
507# CONFIG_CHELSIO_T3 is not set
508# CONFIG_IXGBE is not set
509# CONFIG_IXGB is not set
510# CONFIG_S2IO is not set
511# CONFIG_MYRI10GE is not set
512# CONFIG_NETXEN_NIC is not set
513# CONFIG_NIU is not set
514# CONFIG_MLX4_CORE is not set
515# CONFIG_TEHUTI is not set
516# CONFIG_TR is not set
517
518#
519# Wireless LAN
520#
521# CONFIG_WLAN_PRE80211 is not set
522# CONFIG_WLAN_80211 is not set
523
524#
525# USB Network Adapters
526#
527# CONFIG_USB_CATC is not set
528# CONFIG_USB_KAWETH is not set
529# CONFIG_USB_PEGASUS is not set
530# CONFIG_USB_RTL8150 is not set
531# CONFIG_USB_USBNET is not set
532# CONFIG_WAN is not set
533# CONFIG_FDDI is not set
534# CONFIG_HIPPI is not set
535# CONFIG_PPP is not set
536# CONFIG_SLIP is not set
537# CONFIG_SHAPER is not set
538# CONFIG_NETCONSOLE is not set
539# CONFIG_NETPOLL is not set
540# CONFIG_NET_POLL_CONTROLLER is not set
541# CONFIG_ISDN is not set
542# CONFIG_PHONE is not set
543
544#
545# Input device support
546#
547# CONFIG_INPUT is not set
548
549#
550# Hardware I/O ports
551#
552# CONFIG_SERIO is not set
553# CONFIG_GAMEPORT is not set
554
555#
556# Character devices
557#
558# CONFIG_VT is not set
559# CONFIG_SERIAL_NONSTANDARD is not set
560
561#
562# Serial drivers
563#
564CONFIG_SERIAL_8250=y
565CONFIG_SERIAL_8250_CONSOLE=y
566CONFIG_SERIAL_8250_PCI=y
567CONFIG_SERIAL_8250_NR_UARTS=4
568CONFIG_SERIAL_8250_RUNTIME_UARTS=4
569CONFIG_SERIAL_8250_EXTENDED=y
570# CONFIG_SERIAL_8250_MANY_PORTS is not set
571CONFIG_SERIAL_8250_SHARE_IRQ=y
572# CONFIG_SERIAL_8250_DETECT_IRQ is not set
573# CONFIG_SERIAL_8250_RSA is not set
574
575#
576# Non-8250 serial port support
577#
578# CONFIG_SERIAL_UARTLITE is not set
579CONFIG_SERIAL_CORE=y
580CONFIG_SERIAL_CORE_CONSOLE=y
581# CONFIG_SERIAL_JSM is not set
582CONFIG_SERIAL_OF_PLATFORM=y
583CONFIG_UNIX98_PTYS=y
584CONFIG_LEGACY_PTYS=y
585CONFIG_LEGACY_PTY_COUNT=256
586# CONFIG_IPMI_HANDLER is not set
587# CONFIG_HW_RANDOM is not set
588# CONFIG_NVRAM is not set
589# CONFIG_GEN_RTC is not set
590# CONFIG_R3964 is not set
591# CONFIG_APPLICOM is not set
592# CONFIG_RAW_DRIVER is not set
593# CONFIG_TCG_TPM is not set
594CONFIG_DEVPORT=y
595# CONFIG_I2C is not set
596
597#
598# SPI support
599#
600# CONFIG_SPI is not set
601# CONFIG_SPI_MASTER is not set
602# CONFIG_W1 is not set
603# CONFIG_POWER_SUPPLY is not set
604# CONFIG_HWMON is not set
605# CONFIG_WATCHDOG is not set
606
607#
608# Sonics Silicon Backplane
609#
610CONFIG_SSB_POSSIBLE=y
611# CONFIG_SSB is not set
612
613#
614# Multifunction device drivers
615#
616# CONFIG_MFD_SM501 is not set
617
618#
619# Multimedia devices
620#
621# CONFIG_VIDEO_DEV is not set
622# CONFIG_DVB_CORE is not set
623# CONFIG_DAB is not set
624
625#
626# Graphics support
627#
628# CONFIG_AGP is not set
629# CONFIG_DRM is not set
630# CONFIG_VGASTATE is not set
631CONFIG_VIDEO_OUTPUT_CONTROL=m
632# CONFIG_FB is not set
633# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
634
635#
636# Display device support
637#
638# CONFIG_DISPLAY_SUPPORT is not set
639
640#
641# Sound
642#
643# CONFIG_SOUND is not set
644CONFIG_USB_SUPPORT=y
645CONFIG_USB_ARCH_HAS_HCD=y
646CONFIG_USB_ARCH_HAS_OHCI=y
647CONFIG_USB_ARCH_HAS_EHCI=y
648CONFIG_USB=y
649# CONFIG_USB_DEBUG is not set
650
651#
652# Miscellaneous USB options
653#
654CONFIG_USB_DEVICEFS=y
655CONFIG_USB_DEVICE_CLASS=y
656# CONFIG_USB_DYNAMIC_MINORS is not set
657# CONFIG_USB_OTG is not set
658
659#
660# USB Host Controller Drivers
661#
662# CONFIG_USB_EHCI_HCD is not set
663# CONFIG_USB_ISP116X_HCD is not set
664CONFIG_USB_OHCI_HCD=y
665CONFIG_USB_OHCI_HCD_PPC_OF=y
666CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
667CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
668CONFIG_USB_OHCI_HCD_PCI=y
669CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
670CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
671CONFIG_USB_OHCI_LITTLE_ENDIAN=y
672# CONFIG_USB_UHCI_HCD is not set
673# CONFIG_USB_SL811_HCD is not set
674# CONFIG_USB_R8A66597_HCD is not set
675
676#
677# USB Device Class drivers
678#
679# CONFIG_USB_ACM is not set
680# CONFIG_USB_PRINTER is not set
681
682#
683# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
684#
685
686#
687# may also be needed; see USB_STORAGE Help for more information
688#
689# CONFIG_USB_LIBUSUAL is not set
690
691#
692# USB Imaging devices
693#
694# CONFIG_USB_MDC800 is not set
695CONFIG_USB_MON=y
696
697#
698# USB port drivers
699#
700
701#
702# USB Serial Converter support
703#
704# CONFIG_USB_SERIAL is not set
705
706#
707# USB Miscellaneous drivers
708#
709# CONFIG_USB_EMI62 is not set
710# CONFIG_USB_EMI26 is not set
711# CONFIG_USB_ADUTUX is not set
712# CONFIG_USB_AUERSWALD is not set
713# CONFIG_USB_RIO500 is not set
714# CONFIG_USB_LEGOTOWER is not set
715# CONFIG_USB_LCD is not set
716# CONFIG_USB_BERRY_CHARGE is not set
717# CONFIG_USB_LED is not set
718# CONFIG_USB_CYPRESS_CY7C63 is not set
719# CONFIG_USB_CYTHERM is not set
720# CONFIG_USB_PHIDGET is not set
721# CONFIG_USB_IDMOUSE is not set
722# CONFIG_USB_FTDI_ELAN is not set
723# CONFIG_USB_APPLEDISPLAY is not set
724# CONFIG_USB_LD is not set
725# CONFIG_USB_TRANCEVIBRATOR is not set
726# CONFIG_USB_IOWARRIOR is not set
727# CONFIG_USB_TEST is not set
728
729#
730# USB DSL modem support
731#
732
733#
734# USB Gadget Support
735#
736# CONFIG_USB_GADGET is not set
737# CONFIG_MMC is not set
738# CONFIG_NEW_LEDS is not set
739# CONFIG_INFINIBAND is not set
740# CONFIG_EDAC is not set
741# CONFIG_RTC_CLASS is not set
742
743#
744# Userspace I/O
745#
746# CONFIG_UIO is not set
747
748#
749# File systems
750#
751CONFIG_EXT2_FS=y
752# CONFIG_EXT2_FS_XATTR is not set
753# CONFIG_EXT2_FS_XIP is not set
754# CONFIG_EXT3_FS is not set
755# CONFIG_EXT4DEV_FS is not set
756# CONFIG_REISERFS_FS is not set
757# CONFIG_JFS_FS is not set
758# CONFIG_FS_POSIX_ACL is not set
759# CONFIG_XFS_FS is not set
760# CONFIG_GFS2_FS is not set
761# CONFIG_OCFS2_FS is not set
762# CONFIG_MINIX_FS is not set
763# CONFIG_ROMFS_FS is not set
764CONFIG_INOTIFY=y
765CONFIG_INOTIFY_USER=y
766# CONFIG_QUOTA is not set
767CONFIG_DNOTIFY=y
768# CONFIG_AUTOFS_FS is not set
769# CONFIG_AUTOFS4_FS is not set
770# CONFIG_FUSE_FS is not set
771
772#
773# CD-ROM/DVD Filesystems
774#
775# CONFIG_ISO9660_FS is not set
776# CONFIG_UDF_FS is not set
777
778#
779# DOS/FAT/NT Filesystems
780#
781# CONFIG_MSDOS_FS is not set
782# CONFIG_VFAT_FS is not set
783# CONFIG_NTFS_FS is not set
784
785#
786# Pseudo filesystems
787#
788CONFIG_PROC_FS=y
789CONFIG_PROC_KCORE=y
790CONFIG_PROC_SYSCTL=y
791CONFIG_SYSFS=y
792CONFIG_TMPFS=y
793# CONFIG_TMPFS_POSIX_ACL is not set
794# CONFIG_HUGETLB_PAGE is not set
795# CONFIG_CONFIGFS_FS is not set
796
797#
798# Miscellaneous filesystems
799#
800# CONFIG_ADFS_FS is not set
801# CONFIG_AFFS_FS is not set
802# CONFIG_HFS_FS is not set
803# CONFIG_HFSPLUS_FS is not set
804# CONFIG_BEFS_FS is not set
805# CONFIG_BFS_FS is not set
806# CONFIG_EFS_FS is not set
807# CONFIG_JFFS2_FS is not set
808CONFIG_CRAMFS=y
809# CONFIG_VXFS_FS is not set
810# CONFIG_HPFS_FS is not set
811# CONFIG_QNX4FS_FS is not set
812# CONFIG_SYSV_FS is not set
813# CONFIG_UFS_FS is not set
814CONFIG_NETWORK_FILESYSTEMS=y
815CONFIG_NFS_FS=y
816CONFIG_NFS_V3=y
817# CONFIG_NFS_V3_ACL is not set
818# CONFIG_NFS_V4 is not set
819# CONFIG_NFS_DIRECTIO is not set
820# CONFIG_NFSD is not set
821CONFIG_ROOT_NFS=y
822CONFIG_LOCKD=y
823CONFIG_LOCKD_V4=y
824CONFIG_NFS_COMMON=y
825CONFIG_SUNRPC=y
826# CONFIG_SUNRPC_BIND34 is not set
827# CONFIG_RPCSEC_GSS_KRB5 is not set
828# CONFIG_RPCSEC_GSS_SPKM3 is not set
829# CONFIG_SMB_FS is not set
830# CONFIG_CIFS is not set
831# CONFIG_NCP_FS is not set
832# CONFIG_CODA_FS is not set
833# CONFIG_AFS_FS is not set
834
835#
836# Partition Types
837#
838# CONFIG_PARTITION_ADVANCED is not set
839CONFIG_MSDOS_PARTITION=y
840# CONFIG_NLS is not set
841# CONFIG_DLM is not set
842# CONFIG_UCC_SLOW is not set
843
844#
845# Library routines
846#
847CONFIG_BITREVERSE=y
848# CONFIG_CRC_CCITT is not set
849# CONFIG_CRC16 is not set
850# CONFIG_CRC_ITU_T is not set
851CONFIG_CRC32=y
852# CONFIG_CRC7 is not set
853# CONFIG_LIBCRC32C is not set
854CONFIG_ZLIB_INFLATE=y
855CONFIG_PLIST=y
856CONFIG_HAS_IOMEM=y
857CONFIG_HAS_IOPORT=y
858CONFIG_HAS_DMA=y
859CONFIG_INSTRUMENTATION=y
860# CONFIG_PROFILING is not set
861# CONFIG_KPROBES is not set
862# CONFIG_MARKERS is not set
863
864#
865# Kernel hacking
866#
867# CONFIG_PRINTK_TIME is not set
868CONFIG_ENABLE_WARN_DEPRECATED=y
869CONFIG_ENABLE_MUST_CHECK=y
870CONFIG_MAGIC_SYSRQ=y
871# CONFIG_UNUSED_SYMBOLS is not set
872# CONFIG_DEBUG_FS is not set
873# CONFIG_HEADERS_CHECK is not set
874CONFIG_DEBUG_KERNEL=y
875# CONFIG_DEBUG_SHIRQ is not set
876CONFIG_DETECT_SOFTLOCKUP=y
877CONFIG_SCHED_DEBUG=y
878# CONFIG_SCHEDSTATS is not set
879# CONFIG_TIMER_STATS is not set
880# CONFIG_SLUB_DEBUG_ON is not set
881# CONFIG_DEBUG_RT_MUTEXES is not set
882# CONFIG_RT_MUTEX_TESTER is not set
883# CONFIG_DEBUG_SPINLOCK is not set
884# CONFIG_DEBUG_MUTEXES is not set
885# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
886# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
887# CONFIG_DEBUG_KOBJECT is not set
888CONFIG_DEBUG_BUGVERBOSE=y
889# CONFIG_DEBUG_INFO is not set
890# CONFIG_DEBUG_VM is not set
891# CONFIG_DEBUG_LIST is not set
892# CONFIG_DEBUG_SG is not set
893CONFIG_FORCED_INLINING=y
894# CONFIG_BOOT_PRINTK_DELAY is not set
895# CONFIG_RCU_TORTURE_TEST is not set
896# CONFIG_FAULT_INJECTION is not set
897# CONFIG_SAMPLES is not set
898# CONFIG_DEBUG_STACKOVERFLOW is not set
899# CONFIG_DEBUG_STACK_USAGE is not set
900# CONFIG_DEBUG_PAGEALLOC is not set
901# CONFIG_DEBUGGER is not set
902# CONFIG_BDI_SWITCH is not set
903# CONFIG_PPC_EARLY_DEBUG is not set
904
905#
906# Security options
907#
908# CONFIG_KEYS is not set
909# CONFIG_SECURITY is not set
910# CONFIG_SECURITY_FILE_CAPABILITIES is not set
911CONFIG_CRYPTO=y
912CONFIG_CRYPTO_ALGAPI=y
913CONFIG_CRYPTO_BLKCIPHER=y
914CONFIG_CRYPTO_MANAGER=y
915# CONFIG_CRYPTO_HMAC is not set
916# CONFIG_CRYPTO_XCBC is not set
917# CONFIG_CRYPTO_NULL is not set
918# CONFIG_CRYPTO_MD4 is not set
919CONFIG_CRYPTO_MD5=y
920# CONFIG_CRYPTO_SHA1 is not set
921# CONFIG_CRYPTO_SHA256 is not set
922# CONFIG_CRYPTO_SHA512 is not set
923# CONFIG_CRYPTO_WP512 is not set
924# CONFIG_CRYPTO_TGR192 is not set
925# CONFIG_CRYPTO_GF128MUL is not set
926CONFIG_CRYPTO_ECB=y
927CONFIG_CRYPTO_CBC=y
928CONFIG_CRYPTO_PCBC=y
929# CONFIG_CRYPTO_LRW is not set
930# CONFIG_CRYPTO_XTS is not set
931# CONFIG_CRYPTO_CRYPTD is not set
932CONFIG_CRYPTO_DES=y
933# CONFIG_CRYPTO_FCRYPT is not set
934# CONFIG_CRYPTO_BLOWFISH is not set
935# CONFIG_CRYPTO_TWOFISH is not set
936# CONFIG_CRYPTO_SERPENT is not set
937# CONFIG_CRYPTO_AES is not set
938# CONFIG_CRYPTO_CAST5 is not set
939# CONFIG_CRYPTO_CAST6 is not set
940# CONFIG_CRYPTO_TEA is not set
941# CONFIG_CRYPTO_ARC4 is not set
942# CONFIG_CRYPTO_KHAZAD is not set
943# CONFIG_CRYPTO_ANUBIS is not set
944# CONFIG_CRYPTO_SEED is not set
945# CONFIG_CRYPTO_DEFLATE is not set
946# CONFIG_CRYPTO_MICHAEL_MIC is not set
947# CONFIG_CRYPTO_CRC32C is not set
948# CONFIG_CRYPTO_CAMELLIA is not set
949# CONFIG_CRYPTO_TEST is not set
950# CONFIG_CRYPTO_AUTHENC is not set
951CONFIG_CRYPTO_HW=y
952# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/configs/katmai_defconfig b/arch/powerpc/configs/katmai_defconfig
new file mode 100644
index 000000000000..c8804ec01ea4
--- /dev/null
+++ b/arch/powerpc/configs/katmai_defconfig
@@ -0,0 +1,790 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc6
4# Mon Dec 24 11:17:43 2007
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15CONFIG_44x=y
16# CONFIG_E200 is not set
17CONFIG_4xx=y
18CONFIG_BOOKE=y
19CONFIG_PTE_64BIT=y
20CONFIG_PHYS_64BIT=y
21# CONFIG_PPC_MM_SLICES is not set
22CONFIG_NOT_COHERENT_CACHE=y
23CONFIG_PPC32=y
24CONFIG_WORD_SIZE=32
25CONFIG_PPC_MERGE=y
26CONFIG_MMU=y
27CONFIG_GENERIC_CMOS_UPDATE=y
28CONFIG_GENERIC_TIME=y
29CONFIG_GENERIC_TIME_VSYSCALL=y
30CONFIG_GENERIC_CLOCKEVENTS=y
31CONFIG_GENERIC_HARDIRQS=y
32CONFIG_IRQ_PER_CPU=y
33CONFIG_RWSEM_XCHGADD_ALGORITHM=y
34CONFIG_ARCH_HAS_ILOG2_U32=y
35CONFIG_GENERIC_HWEIGHT=y
36CONFIG_GENERIC_CALIBRATE_DELAY=y
37CONFIG_GENERIC_FIND_NEXT_BIT=y
38# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
39CONFIG_PPC=y
40CONFIG_EARLY_PRINTK=y
41CONFIG_GENERIC_NVRAM=y
42CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
43CONFIG_ARCH_MAY_HAVE_PC_FDC=y
44CONFIG_PPC_OF=y
45CONFIG_OF=y
46CONFIG_PPC_UDBG_16550=y
47# CONFIG_GENERIC_TBSYNC is not set
48CONFIG_AUDIT_ARCH=y
49CONFIG_GENERIC_BUG=y
50# CONFIG_DEFAULT_UIMAGE is not set
51CONFIG_PPC_DCR_NATIVE=y
52# CONFIG_PPC_DCR_MMIO is not set
53CONFIG_PPC_DCR=y
54CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
55
56#
57# General setup
58#
59CONFIG_EXPERIMENTAL=y
60CONFIG_BROKEN_ON_SMP=y
61CONFIG_INIT_ENV_ARG_LIMIT=32
62CONFIG_LOCALVERSION=""
63CONFIG_LOCALVERSION_AUTO=y
64CONFIG_SWAP=y
65CONFIG_SYSVIPC=y
66CONFIG_SYSVIPC_SYSCTL=y
67CONFIG_POSIX_MQUEUE=y
68# CONFIG_BSD_PROCESS_ACCT is not set
69# CONFIG_TASKSTATS is not set
70# CONFIG_USER_NS is not set
71# CONFIG_PID_NS is not set
72# CONFIG_AUDIT is not set
73# CONFIG_IKCONFIG is not set
74CONFIG_LOG_BUF_SHIFT=14
75# CONFIG_CGROUPS is not set
76CONFIG_FAIR_GROUP_SCHED=y
77CONFIG_FAIR_USER_SCHED=y
78# CONFIG_FAIR_CGROUP_SCHED is not set
79CONFIG_SYSFS_DEPRECATED=y
80# CONFIG_RELAY is not set
81CONFIG_BLK_DEV_INITRD=y
82CONFIG_INITRAMFS_SOURCE=""
83# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
84CONFIG_SYSCTL=y
85CONFIG_EMBEDDED=y
86CONFIG_SYSCTL_SYSCALL=y
87CONFIG_KALLSYMS=y
88# CONFIG_KALLSYMS_ALL is not set
89# CONFIG_KALLSYMS_EXTRA_PASS is not set
90CONFIG_HOTPLUG=y
91CONFIG_PRINTK=y
92CONFIG_BUG=y
93CONFIG_ELF_CORE=y
94CONFIG_BASE_FULL=y
95CONFIG_FUTEX=y
96CONFIG_ANON_INODES=y
97CONFIG_EPOLL=y
98CONFIG_SIGNALFD=y
99CONFIG_EVENTFD=y
100CONFIG_SHMEM=y
101CONFIG_VM_EVENT_COUNTERS=y
102CONFIG_SLUB_DEBUG=y
103# CONFIG_SLAB is not set
104CONFIG_SLUB=y
105# CONFIG_SLOB is not set
106CONFIG_RT_MUTEXES=y
107# CONFIG_TINY_SHMEM is not set
108CONFIG_BASE_SMALL=0
109CONFIG_MODULES=y
110CONFIG_MODULE_UNLOAD=y
111# CONFIG_MODULE_FORCE_UNLOAD is not set
112# CONFIG_MODVERSIONS is not set
113# CONFIG_MODULE_SRCVERSION_ALL is not set
114CONFIG_KMOD=y
115CONFIG_BLOCK=y
116CONFIG_LBD=y
117# CONFIG_BLK_DEV_IO_TRACE is not set
118# CONFIG_LSF is not set
119# CONFIG_BLK_DEV_BSG is not set
120
121#
122# IO Schedulers
123#
124CONFIG_IOSCHED_NOOP=y
125CONFIG_IOSCHED_AS=y
126CONFIG_IOSCHED_DEADLINE=y
127CONFIG_IOSCHED_CFQ=y
128CONFIG_DEFAULT_AS=y
129# CONFIG_DEFAULT_DEADLINE is not set
130# CONFIG_DEFAULT_CFQ is not set
131# CONFIG_DEFAULT_NOOP is not set
132CONFIG_DEFAULT_IOSCHED="anticipatory"
133CONFIG_PPC4xx_PCI_EXPRESS=y
134
135#
136# Platform support
137#
138# CONFIG_PPC_MPC52xx is not set
139# CONFIG_PPC_MPC5200 is not set
140# CONFIG_PPC_CELL is not set
141# CONFIG_PPC_CELL_NATIVE is not set
142# CONFIG_PQ2ADS is not set
143# CONFIG_BAMBOO is not set
144# CONFIG_EBONY is not set
145# CONFIG_SEQUOIA is not set
146# CONFIG_TAISHAN is not set
147CONFIG_KATMAI=y
148# CONFIG_RAINIER is not set
149CONFIG_440SPe=y
150# CONFIG_MPIC is not set
151# CONFIG_MPIC_WEIRD is not set
152# CONFIG_PPC_I8259 is not set
153# CONFIG_PPC_RTAS is not set
154# CONFIG_MMIO_NVRAM is not set
155# CONFIG_PPC_MPC106 is not set
156# CONFIG_PPC_970_NAP is not set
157# CONFIG_PPC_INDIRECT_IO is not set
158# CONFIG_GENERIC_IOMAP is not set
159# CONFIG_CPU_FREQ is not set
160# CONFIG_CPM2 is not set
161# CONFIG_FSL_ULI1575 is not set
162
163#
164# Kernel options
165#
166# CONFIG_HIGHMEM is not set
167# CONFIG_TICK_ONESHOT is not set
168# CONFIG_NO_HZ is not set
169# CONFIG_HIGH_RES_TIMERS is not set
170CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
171# CONFIG_HZ_100 is not set
172CONFIG_HZ_250=y
173# CONFIG_HZ_300 is not set
174# CONFIG_HZ_1000 is not set
175CONFIG_HZ=250
176CONFIG_PREEMPT_NONE=y
177# CONFIG_PREEMPT_VOLUNTARY is not set
178# CONFIG_PREEMPT is not set
179CONFIG_BINFMT_ELF=y
180# CONFIG_BINFMT_MISC is not set
181# CONFIG_MATH_EMULATION is not set
182CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
183CONFIG_ARCH_FLATMEM_ENABLE=y
184CONFIG_ARCH_POPULATES_NODE_MAP=y
185CONFIG_SELECT_MEMORY_MODEL=y
186CONFIG_FLATMEM_MANUAL=y
187# CONFIG_DISCONTIGMEM_MANUAL is not set
188# CONFIG_SPARSEMEM_MANUAL is not set
189CONFIG_FLATMEM=y
190CONFIG_FLAT_NODE_MEM_MAP=y
191# CONFIG_SPARSEMEM_STATIC is not set
192# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
193CONFIG_SPLIT_PTLOCK_CPUS=4
194CONFIG_RESOURCES_64BIT=y
195CONFIG_ZONE_DMA_FLAG=1
196CONFIG_BOUNCE=y
197CONFIG_VIRT_TO_BUS=y
198CONFIG_PROC_DEVICETREE=y
199CONFIG_CMDLINE_BOOL=y
200CONFIG_CMDLINE=""
201CONFIG_SECCOMP=y
202CONFIG_WANT_DEVICE_TREE=y
203CONFIG_DEVICE_TREE="katmai.dts"
204CONFIG_ISA_DMA_API=y
205
206#
207# Bus options
208#
209CONFIG_ZONE_DMA=y
210CONFIG_PPC_INDIRECT_PCI=y
211CONFIG_PCI=y
212CONFIG_PCI_DOMAINS=y
213CONFIG_PCI_SYSCALL=y
214# CONFIG_PCIEPORTBUS is not set
215CONFIG_ARCH_SUPPORTS_MSI=y
216# CONFIG_PCI_MSI is not set
217CONFIG_PCI_LEGACY=y
218# CONFIG_PCI_DEBUG is not set
219# CONFIG_PCCARD is not set
220# CONFIG_HOTPLUG_PCI is not set
221
222#
223# Advanced setup
224#
225# CONFIG_ADVANCED_OPTIONS is not set
226
227#
228# Default settings for advanced configuration options are used
229#
230CONFIG_HIGHMEM_START=0xfe000000
231CONFIG_LOWMEM_SIZE=0x30000000
232CONFIG_KERNEL_START=0xc0000000
233CONFIG_TASK_SIZE=0xc0000000
234CONFIG_CONSISTENT_START=0xff100000
235CONFIG_CONSISTENT_SIZE=0x00200000
236CONFIG_BOOT_LOAD=0x01000000
237
238#
239# Networking
240#
241CONFIG_NET=y
242
243#
244# Networking options
245#
246CONFIG_PACKET=y
247# CONFIG_PACKET_MMAP is not set
248CONFIG_UNIX=y
249# CONFIG_NET_KEY is not set
250CONFIG_INET=y
251# CONFIG_IP_MULTICAST is not set
252# CONFIG_IP_ADVANCED_ROUTER is not set
253CONFIG_IP_FIB_HASH=y
254CONFIG_IP_PNP=y
255CONFIG_IP_PNP_DHCP=y
256CONFIG_IP_PNP_BOOTP=y
257# CONFIG_IP_PNP_RARP is not set
258# CONFIG_NET_IPIP is not set
259# CONFIG_NET_IPGRE is not set
260# CONFIG_ARPD is not set
261# CONFIG_SYN_COOKIES is not set
262# CONFIG_INET_AH is not set
263# CONFIG_INET_ESP is not set
264# CONFIG_INET_IPCOMP is not set
265# CONFIG_INET_XFRM_TUNNEL is not set
266# CONFIG_INET_TUNNEL is not set
267# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
268# CONFIG_INET_XFRM_MODE_TUNNEL is not set
269# CONFIG_INET_XFRM_MODE_BEET is not set
270# CONFIG_INET_LRO is not set
271CONFIG_INET_DIAG=y
272CONFIG_INET_TCP_DIAG=y
273# CONFIG_TCP_CONG_ADVANCED is not set
274CONFIG_TCP_CONG_CUBIC=y
275CONFIG_DEFAULT_TCP_CONG="cubic"
276# CONFIG_TCP_MD5SIG is not set
277# CONFIG_IPV6 is not set
278# CONFIG_INET6_XFRM_TUNNEL is not set
279# CONFIG_INET6_TUNNEL is not set
280# CONFIG_NETWORK_SECMARK is not set
281# CONFIG_NETFILTER is not set
282# CONFIG_IP_DCCP is not set
283# CONFIG_IP_SCTP is not set
284# CONFIG_TIPC is not set
285# CONFIG_ATM is not set
286# CONFIG_BRIDGE is not set
287# CONFIG_VLAN_8021Q is not set
288# CONFIG_DECNET is not set
289# CONFIG_LLC2 is not set
290# CONFIG_IPX is not set
291# CONFIG_ATALK is not set
292# CONFIG_X25 is not set
293# CONFIG_LAPB is not set
294# CONFIG_ECONET is not set
295# CONFIG_WAN_ROUTER is not set
296# CONFIG_NET_SCHED is not set
297
298#
299# Network testing
300#
301# CONFIG_NET_PKTGEN is not set
302# CONFIG_HAMRADIO is not set
303# CONFIG_IRDA is not set
304# CONFIG_BT is not set
305# CONFIG_AF_RXRPC is not set
306
307#
308# Wireless
309#
310# CONFIG_CFG80211 is not set
311# CONFIG_WIRELESS_EXT is not set
312# CONFIG_MAC80211 is not set
313# CONFIG_IEEE80211 is not set
314# CONFIG_RFKILL is not set
315# CONFIG_NET_9P is not set
316
317#
318# Device Drivers
319#
320
321#
322# Generic Driver Options
323#
324CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
325CONFIG_STANDALONE=y
326CONFIG_PREVENT_FIRMWARE_BUILD=y
327CONFIG_FW_LOADER=y
328# CONFIG_DEBUG_DRIVER is not set
329# CONFIG_DEBUG_DEVRES is not set
330# CONFIG_SYS_HYPERVISOR is not set
331CONFIG_CONNECTOR=y
332CONFIG_PROC_EVENTS=y
333# CONFIG_MTD is not set
334CONFIG_OF_DEVICE=y
335# CONFIG_PARPORT is not set
336CONFIG_BLK_DEV=y
337# CONFIG_BLK_DEV_FD is not set
338# CONFIG_BLK_CPQ_DA is not set
339# CONFIG_BLK_CPQ_CISS_DA is not set
340# CONFIG_BLK_DEV_DAC960 is not set
341# CONFIG_BLK_DEV_UMEM is not set
342# CONFIG_BLK_DEV_COW_COMMON is not set
343# CONFIG_BLK_DEV_LOOP is not set
344# CONFIG_BLK_DEV_NBD is not set
345# CONFIG_BLK_DEV_SX8 is not set
346CONFIG_BLK_DEV_RAM=y
347CONFIG_BLK_DEV_RAM_COUNT=16
348CONFIG_BLK_DEV_RAM_SIZE=35000
349CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
350# CONFIG_CDROM_PKTCDVD is not set
351# CONFIG_ATA_OVER_ETH is not set
352# CONFIG_XILINX_SYSACE is not set
353CONFIG_MISC_DEVICES=y
354# CONFIG_PHANTOM is not set
355# CONFIG_EEPROM_93CX6 is not set
356# CONFIG_SGI_IOC4 is not set
357# CONFIG_TIFM_CORE is not set
358# CONFIG_IDE is not set
359
360#
361# SCSI device support
362#
363# CONFIG_RAID_ATTRS is not set
364# CONFIG_SCSI is not set
365# CONFIG_SCSI_DMA is not set
366# CONFIG_SCSI_NETLINK is not set
367# CONFIG_ATA is not set
368# CONFIG_MD is not set
369# CONFIG_FUSION is not set
370
371#
372# IEEE 1394 (FireWire) support
373#
374# CONFIG_FIREWIRE is not set
375# CONFIG_IEEE1394 is not set
376# CONFIG_I2O is not set
377CONFIG_MACINTOSH_DRIVERS=y
378# CONFIG_MAC_EMUMOUSEBTN is not set
379# CONFIG_WINDFARM is not set
380CONFIG_NETDEVICES=y
381# CONFIG_NETDEVICES_MULTIQUEUE is not set
382# CONFIG_DUMMY is not set
383# CONFIG_BONDING is not set
384# CONFIG_MACVLAN is not set
385# CONFIG_EQUALIZER is not set
386# CONFIG_TUN is not set
387# CONFIG_VETH is not set
388# CONFIG_IP1000 is not set
389# CONFIG_ARCNET is not set
390# CONFIG_PHYLIB is not set
391CONFIG_NET_ETHERNET=y
392# CONFIG_MII is not set
393# CONFIG_HAPPYMEAL is not set
394# CONFIG_SUNGEM is not set
395# CONFIG_CASSINI is not set
396# CONFIG_NET_VENDOR_3COM is not set
397# CONFIG_NET_TULIP is not set
398# CONFIG_HP100 is not set
399CONFIG_IBM_NEW_EMAC=y
400CONFIG_IBM_NEW_EMAC_RXB=128
401CONFIG_IBM_NEW_EMAC_TXB=64
402CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
403CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
404CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
405# CONFIG_IBM_NEW_EMAC_DEBUG is not set
406# CONFIG_IBM_NEW_EMAC_ZMII is not set
407# CONFIG_IBM_NEW_EMAC_RGMII is not set
408# CONFIG_IBM_NEW_EMAC_TAH is not set
409CONFIG_IBM_NEW_EMAC_EMAC4=y
410# CONFIG_NET_PCI is not set
411# CONFIG_B44 is not set
412CONFIG_NETDEV_1000=y
413# CONFIG_ACENIC is not set
414# CONFIG_DL2K is not set
415# CONFIG_E1000 is not set
416# CONFIG_E1000E is not set
417# CONFIG_NS83820 is not set
418# CONFIG_HAMACHI is not set
419# CONFIG_YELLOWFIN is not set
420# CONFIG_R8169 is not set
421# CONFIG_SIS190 is not set
422# CONFIG_SKGE is not set
423# CONFIG_SKY2 is not set
424# CONFIG_SK98LIN is not set
425# CONFIG_VIA_VELOCITY is not set
426# CONFIG_TIGON3 is not set
427# CONFIG_BNX2 is not set
428# CONFIG_QLA3XXX is not set
429# CONFIG_ATL1 is not set
430CONFIG_NETDEV_10000=y
431# CONFIG_CHELSIO_T1 is not set
432# CONFIG_CHELSIO_T3 is not set
433# CONFIG_IXGBE is not set
434# CONFIG_IXGB is not set
435# CONFIG_S2IO is not set
436# CONFIG_MYRI10GE is not set
437# CONFIG_NETXEN_NIC is not set
438# CONFIG_NIU is not set
439# CONFIG_MLX4_CORE is not set
440# CONFIG_TEHUTI is not set
441# CONFIG_TR is not set
442
443#
444# Wireless LAN
445#
446# CONFIG_WLAN_PRE80211 is not set
447# CONFIG_WLAN_80211 is not set
448# CONFIG_WAN is not set
449# CONFIG_FDDI is not set
450# CONFIG_HIPPI is not set
451# CONFIG_PPP is not set
452# CONFIG_SLIP is not set
453# CONFIG_SHAPER is not set
454# CONFIG_NETCONSOLE is not set
455# CONFIG_NETPOLL is not set
456# CONFIG_NET_POLL_CONTROLLER is not set
457# CONFIG_ISDN is not set
458# CONFIG_PHONE is not set
459
460#
461# Input device support
462#
463# CONFIG_INPUT is not set
464
465#
466# Hardware I/O ports
467#
468# CONFIG_SERIO is not set
469# CONFIG_GAMEPORT is not set
470
471#
472# Character devices
473#
474# CONFIG_VT is not set
475# CONFIG_SERIAL_NONSTANDARD is not set
476
477#
478# Serial drivers
479#
480CONFIG_SERIAL_8250=y
481CONFIG_SERIAL_8250_CONSOLE=y
482# CONFIG_SERIAL_8250_PCI is not set
483CONFIG_SERIAL_8250_NR_UARTS=4
484CONFIG_SERIAL_8250_RUNTIME_UARTS=4
485CONFIG_SERIAL_8250_EXTENDED=y
486# CONFIG_SERIAL_8250_MANY_PORTS is not set
487CONFIG_SERIAL_8250_SHARE_IRQ=y
488# CONFIG_SERIAL_8250_DETECT_IRQ is not set
489# CONFIG_SERIAL_8250_RSA is not set
490
491#
492# Non-8250 serial port support
493#
494# CONFIG_SERIAL_UARTLITE is not set
495CONFIG_SERIAL_CORE=y
496CONFIG_SERIAL_CORE_CONSOLE=y
497# CONFIG_SERIAL_JSM is not set
498CONFIG_SERIAL_OF_PLATFORM=y
499CONFIG_UNIX98_PTYS=y
500CONFIG_LEGACY_PTYS=y
501CONFIG_LEGACY_PTY_COUNT=256
502# CONFIG_IPMI_HANDLER is not set
503# CONFIG_HW_RANDOM is not set
504# CONFIG_NVRAM is not set
505# CONFIG_GEN_RTC is not set
506# CONFIG_R3964 is not set
507# CONFIG_APPLICOM is not set
508# CONFIG_RAW_DRIVER is not set
509# CONFIG_TCG_TPM is not set
510CONFIG_DEVPORT=y
511# CONFIG_I2C is not set
512
513#
514# SPI support
515#
516# CONFIG_SPI is not set
517# CONFIG_SPI_MASTER is not set
518# CONFIG_W1 is not set
519# CONFIG_POWER_SUPPLY is not set
520# CONFIG_HWMON is not set
521# CONFIG_WATCHDOG is not set
522
523#
524# Sonics Silicon Backplane
525#
526CONFIG_SSB_POSSIBLE=y
527# CONFIG_SSB is not set
528
529#
530# Multifunction device drivers
531#
532# CONFIG_MFD_SM501 is not set
533
534#
535# Multimedia devices
536#
537# CONFIG_VIDEO_DEV is not set
538# CONFIG_DVB_CORE is not set
539CONFIG_DAB=y
540
541#
542# Graphics support
543#
544# CONFIG_AGP is not set
545# CONFIG_DRM is not set
546# CONFIG_VGASTATE is not set
547CONFIG_VIDEO_OUTPUT_CONTROL=m
548# CONFIG_FB is not set
549# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
550
551#
552# Display device support
553#
554# CONFIG_DISPLAY_SUPPORT is not set
555
556#
557# Sound
558#
559# CONFIG_SOUND is not set
560CONFIG_USB_SUPPORT=y
561CONFIG_USB_ARCH_HAS_HCD=y
562CONFIG_USB_ARCH_HAS_OHCI=y
563CONFIG_USB_ARCH_HAS_EHCI=y
564# CONFIG_USB is not set
565
566#
567# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
568#
569
570#
571# USB Gadget Support
572#
573# CONFIG_USB_GADGET is not set
574# CONFIG_MMC is not set
575# CONFIG_NEW_LEDS is not set
576# CONFIG_INFINIBAND is not set
577# CONFIG_EDAC is not set
578# CONFIG_RTC_CLASS is not set
579
580#
581# Userspace I/O
582#
583# CONFIG_UIO is not set
584
585#
586# File systems
587#
588CONFIG_EXT2_FS=y
589# CONFIG_EXT2_FS_XATTR is not set
590# CONFIG_EXT2_FS_XIP is not set
591# CONFIG_EXT3_FS is not set
592# CONFIG_EXT4DEV_FS is not set
593# CONFIG_REISERFS_FS is not set
594# CONFIG_JFS_FS is not set
595# CONFIG_FS_POSIX_ACL is not set
596# CONFIG_XFS_FS is not set
597# CONFIG_GFS2_FS is not set
598# CONFIG_OCFS2_FS is not set
599# CONFIG_MINIX_FS is not set
600# CONFIG_ROMFS_FS is not set
601CONFIG_INOTIFY=y
602CONFIG_INOTIFY_USER=y
603# CONFIG_QUOTA is not set
604CONFIG_DNOTIFY=y
605# CONFIG_AUTOFS_FS is not set
606# CONFIG_AUTOFS4_FS is not set
607# CONFIG_FUSE_FS is not set
608
609#
610# CD-ROM/DVD Filesystems
611#
612# CONFIG_ISO9660_FS is not set
613# CONFIG_UDF_FS is not set
614
615#
616# DOS/FAT/NT Filesystems
617#
618# CONFIG_MSDOS_FS is not set
619# CONFIG_VFAT_FS is not set
620# CONFIG_NTFS_FS is not set
621
622#
623# Pseudo filesystems
624#
625CONFIG_PROC_FS=y
626CONFIG_PROC_KCORE=y
627CONFIG_PROC_SYSCTL=y
628CONFIG_SYSFS=y
629CONFIG_TMPFS=y
630# CONFIG_TMPFS_POSIX_ACL is not set
631# CONFIG_HUGETLB_PAGE is not set
632# CONFIG_CONFIGFS_FS is not set
633
634#
635# Miscellaneous filesystems
636#
637# CONFIG_ADFS_FS is not set
638# CONFIG_AFFS_FS is not set
639# CONFIG_HFS_FS is not set
640# CONFIG_HFSPLUS_FS is not set
641# CONFIG_BEFS_FS is not set
642# CONFIG_BFS_FS is not set
643# CONFIG_EFS_FS is not set
644CONFIG_CRAMFS=y
645# CONFIG_VXFS_FS is not set
646# CONFIG_HPFS_FS is not set
647# CONFIG_QNX4FS_FS is not set
648# CONFIG_SYSV_FS is not set
649# CONFIG_UFS_FS is not set
650CONFIG_NETWORK_FILESYSTEMS=y
651CONFIG_NFS_FS=y
652CONFIG_NFS_V3=y
653# CONFIG_NFS_V3_ACL is not set
654# CONFIG_NFS_V4 is not set
655# CONFIG_NFS_DIRECTIO is not set
656# CONFIG_NFSD is not set
657CONFIG_ROOT_NFS=y
658CONFIG_LOCKD=y
659CONFIG_LOCKD_V4=y
660CONFIG_NFS_COMMON=y
661CONFIG_SUNRPC=y
662# CONFIG_SUNRPC_BIND34 is not set
663# CONFIG_RPCSEC_GSS_KRB5 is not set
664# CONFIG_RPCSEC_GSS_SPKM3 is not set
665# CONFIG_SMB_FS is not set
666# CONFIG_CIFS is not set
667# CONFIG_NCP_FS is not set
668# CONFIG_CODA_FS is not set
669# CONFIG_AFS_FS is not set
670
671#
672# Partition Types
673#
674# CONFIG_PARTITION_ADVANCED is not set
675CONFIG_MSDOS_PARTITION=y
676# CONFIG_NLS is not set
677# CONFIG_DLM is not set
678# CONFIG_UCC_SLOW is not set
679
680#
681# Library routines
682#
683CONFIG_BITREVERSE=y
684# CONFIG_CRC_CCITT is not set
685# CONFIG_CRC16 is not set
686# CONFIG_CRC_ITU_T is not set
687CONFIG_CRC32=y
688# CONFIG_CRC7 is not set
689# CONFIG_LIBCRC32C is not set
690CONFIG_ZLIB_INFLATE=y
691CONFIG_PLIST=y
692CONFIG_HAS_IOMEM=y
693CONFIG_HAS_IOPORT=y
694CONFIG_HAS_DMA=y
695CONFIG_INSTRUMENTATION=y
696# CONFIG_PROFILING is not set
697# CONFIG_KPROBES is not set
698# CONFIG_MARKERS is not set
699
700#
701# Kernel hacking
702#
703# CONFIG_PRINTK_TIME is not set
704CONFIG_ENABLE_WARN_DEPRECATED=y
705CONFIG_ENABLE_MUST_CHECK=y
706CONFIG_MAGIC_SYSRQ=y
707# CONFIG_UNUSED_SYMBOLS is not set
708# CONFIG_DEBUG_FS is not set
709# CONFIG_HEADERS_CHECK is not set
710CONFIG_DEBUG_KERNEL=y
711# CONFIG_DEBUG_SHIRQ is not set
712CONFIG_DETECT_SOFTLOCKUP=y
713CONFIG_SCHED_DEBUG=y
714# CONFIG_SCHEDSTATS is not set
715# CONFIG_TIMER_STATS is not set
716# CONFIG_SLUB_DEBUG_ON is not set
717# CONFIG_DEBUG_RT_MUTEXES is not set
718# CONFIG_RT_MUTEX_TESTER is not set
719# CONFIG_DEBUG_SPINLOCK is not set
720# CONFIG_DEBUG_MUTEXES is not set
721# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
722# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
723# CONFIG_DEBUG_KOBJECT is not set
724# CONFIG_DEBUG_BUGVERBOSE is not set
725# CONFIG_DEBUG_INFO is not set
726# CONFIG_DEBUG_VM is not set
727# CONFIG_DEBUG_LIST is not set
728# CONFIG_DEBUG_SG is not set
729CONFIG_FORCED_INLINING=y
730# CONFIG_BOOT_PRINTK_DELAY is not set
731# CONFIG_RCU_TORTURE_TEST is not set
732# CONFIG_FAULT_INJECTION is not set
733# CONFIG_SAMPLES is not set
734# CONFIG_DEBUG_STACKOVERFLOW is not set
735# CONFIG_DEBUG_STACK_USAGE is not set
736# CONFIG_DEBUG_PAGEALLOC is not set
737CONFIG_DEBUGGER=y
738# CONFIG_KGDB is not set
739# CONFIG_XMON is not set
740# CONFIG_BDI_SWITCH is not set
741# CONFIG_PPC_EARLY_DEBUG is not set
742
743#
744# Security options
745#
746# CONFIG_KEYS is not set
747# CONFIG_SECURITY is not set
748# CONFIG_SECURITY_FILE_CAPABILITIES is not set
749CONFIG_CRYPTO=y
750CONFIG_CRYPTO_ALGAPI=y
751CONFIG_CRYPTO_BLKCIPHER=y
752CONFIG_CRYPTO_MANAGER=y
753# CONFIG_CRYPTO_HMAC is not set
754# CONFIG_CRYPTO_XCBC is not set
755# CONFIG_CRYPTO_NULL is not set
756# CONFIG_CRYPTO_MD4 is not set
757CONFIG_CRYPTO_MD5=y
758# CONFIG_CRYPTO_SHA1 is not set
759# CONFIG_CRYPTO_SHA256 is not set
760# CONFIG_CRYPTO_SHA512 is not set
761# CONFIG_CRYPTO_WP512 is not set
762# CONFIG_CRYPTO_TGR192 is not set
763# CONFIG_CRYPTO_GF128MUL is not set
764CONFIG_CRYPTO_ECB=y
765CONFIG_CRYPTO_CBC=y
766CONFIG_CRYPTO_PCBC=y
767# CONFIG_CRYPTO_LRW is not set
768# CONFIG_CRYPTO_XTS is not set
769# CONFIG_CRYPTO_CRYPTD is not set
770CONFIG_CRYPTO_DES=y
771# CONFIG_CRYPTO_FCRYPT is not set
772# CONFIG_CRYPTO_BLOWFISH is not set
773# CONFIG_CRYPTO_TWOFISH is not set
774# CONFIG_CRYPTO_SERPENT is not set
775# CONFIG_CRYPTO_AES is not set
776# CONFIG_CRYPTO_CAST5 is not set
777# CONFIG_CRYPTO_CAST6 is not set
778# CONFIG_CRYPTO_TEA is not set
779# CONFIG_CRYPTO_ARC4 is not set
780# CONFIG_CRYPTO_KHAZAD is not set
781# CONFIG_CRYPTO_ANUBIS is not set
782# CONFIG_CRYPTO_SEED is not set
783# CONFIG_CRYPTO_DEFLATE is not set
784# CONFIG_CRYPTO_MICHAEL_MIC is not set
785# CONFIG_CRYPTO_CRC32C is not set
786# CONFIG_CRYPTO_CAMELLIA is not set
787# CONFIG_CRYPTO_TEST is not set
788# CONFIG_CRYPTO_AUTHENC is not set
789CONFIG_CRYPTO_HW=y
790# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/configs/kilauea_defconfig b/arch/powerpc/configs/kilauea_defconfig
index 28dee12031f5..c86e7565adc6 100644
--- a/arch/powerpc/configs/kilauea_defconfig
+++ b/arch/powerpc/configs/kilauea_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc4 3# Linux kernel version: 2.6.24-rc6
4# Thu Dec 6 16:48:20 2007 4# Mon Dec 24 11:18:12 2007
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -40,7 +40,7 @@ CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
40CONFIG_ARCH_MAY_HAVE_PC_FDC=y 40CONFIG_ARCH_MAY_HAVE_PC_FDC=y
41CONFIG_PPC_OF=y 41CONFIG_PPC_OF=y
42CONFIG_OF=y 42CONFIG_OF=y
43# CONFIG_PPC_UDBG_16550 is not set 43CONFIG_PPC_UDBG_16550=y
44# CONFIG_GENERIC_TBSYNC is not set 44# CONFIG_GENERIC_TBSYNC is not set
45CONFIG_AUDIT_ARCH=y 45CONFIG_AUDIT_ARCH=y
46CONFIG_GENERIC_BUG=y 46CONFIG_GENERIC_BUG=y
@@ -125,6 +125,7 @@ CONFIG_DEFAULT_AS=y
125# CONFIG_DEFAULT_CFQ is not set 125# CONFIG_DEFAULT_CFQ is not set
126# CONFIG_DEFAULT_NOOP is not set 126# CONFIG_DEFAULT_NOOP is not set
127CONFIG_DEFAULT_IOSCHED="anticipatory" 127CONFIG_DEFAULT_IOSCHED="anticipatory"
128CONFIG_PPC4xx_PCI_EXPRESS=y
128 129
129# 130#
130# Platform support 131# Platform support
@@ -134,9 +135,12 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
134# CONFIG_PPC_CELL is not set 135# CONFIG_PPC_CELL is not set
135# CONFIG_PPC_CELL_NATIVE is not set 136# CONFIG_PPC_CELL_NATIVE is not set
136# CONFIG_PQ2ADS is not set 137# CONFIG_PQ2ADS is not set
138# CONFIG_EP405 is not set
137CONFIG_KILAUEA=y 139CONFIG_KILAUEA=y
140# CONFIG_MAKALU is not set
138# CONFIG_WALNUT is not set 141# CONFIG_WALNUT is not set
139# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set 142# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set
143CONFIG_405EX=y
140# CONFIG_MPIC is not set 144# CONFIG_MPIC is not set
141# CONFIG_MPIC_WEIRD is not set 145# CONFIG_MPIC_WEIRD is not set
142# CONFIG_PPC_I8259 is not set 146# CONFIG_PPC_I8259 is not set
@@ -199,11 +203,17 @@ CONFIG_ISA_DMA_API=y
199# Bus options 203# Bus options
200# 204#
201CONFIG_ZONE_DMA=y 205CONFIG_ZONE_DMA=y
202# CONFIG_PCI is not set 206CONFIG_PPC_INDIRECT_PCI=y
203# CONFIG_PCI_DOMAINS is not set 207CONFIG_PCI=y
204# CONFIG_PCI_SYSCALL is not set 208CONFIG_PCI_DOMAINS=y
205# CONFIG_ARCH_SUPPORTS_MSI is not set 209CONFIG_PCI_SYSCALL=y
210# CONFIG_PCIEPORTBUS is not set
211CONFIG_ARCH_SUPPORTS_MSI=y
212# CONFIG_PCI_MSI is not set
213CONFIG_PCI_LEGACY=y
214# CONFIG_PCI_DEBUG is not set
206# CONFIG_PCCARD is not set 215# CONFIG_PCCARD is not set
216# CONFIG_HOTPLUG_PCI is not set
207 217
208# 218#
209# Advanced setup 219# Advanced setup
@@ -368,11 +378,13 @@ CONFIG_MTD_CFI_UTIL=y
368# CONFIG_MTD_COMPLEX_MAPPINGS is not set 378# CONFIG_MTD_COMPLEX_MAPPINGS is not set
369# CONFIG_MTD_PHYSMAP is not set 379# CONFIG_MTD_PHYSMAP is not set
370CONFIG_MTD_PHYSMAP_OF=y 380CONFIG_MTD_PHYSMAP_OF=y
381# CONFIG_MTD_INTEL_VR_NOR is not set
371# CONFIG_MTD_PLATRAM is not set 382# CONFIG_MTD_PLATRAM is not set
372 383
373# 384#
374# Self-contained MTD device drivers 385# Self-contained MTD device drivers
375# 386#
387# CONFIG_MTD_PMC551 is not set
376# CONFIG_MTD_SLRAM is not set 388# CONFIG_MTD_SLRAM is not set
377# CONFIG_MTD_PHRAM is not set 389# CONFIG_MTD_PHRAM is not set
378# CONFIG_MTD_MTDRAM is not set 390# CONFIG_MTD_MTDRAM is not set
@@ -395,9 +407,14 @@ CONFIG_OF_DEVICE=y
395# CONFIG_PARPORT is not set 407# CONFIG_PARPORT is not set
396CONFIG_BLK_DEV=y 408CONFIG_BLK_DEV=y
397# CONFIG_BLK_DEV_FD is not set 409# CONFIG_BLK_DEV_FD is not set
410# CONFIG_BLK_CPQ_DA is not set
411# CONFIG_BLK_CPQ_CISS_DA is not set
412# CONFIG_BLK_DEV_DAC960 is not set
413# CONFIG_BLK_DEV_UMEM is not set
398# CONFIG_BLK_DEV_COW_COMMON is not set 414# CONFIG_BLK_DEV_COW_COMMON is not set
399# CONFIG_BLK_DEV_LOOP is not set 415# CONFIG_BLK_DEV_LOOP is not set
400# CONFIG_BLK_DEV_NBD is not set 416# CONFIG_BLK_DEV_NBD is not set
417# CONFIG_BLK_DEV_SX8 is not set
401CONFIG_BLK_DEV_RAM=y 418CONFIG_BLK_DEV_RAM=y
402CONFIG_BLK_DEV_RAM_COUNT=16 419CONFIG_BLK_DEV_RAM_COUNT=16
403CONFIG_BLK_DEV_RAM_SIZE=35000 420CONFIG_BLK_DEV_RAM_SIZE=35000
@@ -417,6 +434,14 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
417# CONFIG_SCSI_NETLINK is not set 434# CONFIG_SCSI_NETLINK is not set
418# CONFIG_ATA is not set 435# CONFIG_ATA is not set
419# CONFIG_MD is not set 436# CONFIG_MD is not set
437# CONFIG_FUSION is not set
438
439#
440# IEEE 1394 (FireWire) support
441#
442# CONFIG_FIREWIRE is not set
443# CONFIG_IEEE1394 is not set
444# CONFIG_I2O is not set
420# CONFIG_MACINTOSH_DRIVERS is not set 445# CONFIG_MACINTOSH_DRIVERS is not set
421CONFIG_NETDEVICES=y 446CONFIG_NETDEVICES=y
422# CONFIG_NETDEVICES_MULTIQUEUE is not set 447# CONFIG_NETDEVICES_MULTIQUEUE is not set
@@ -426,9 +451,14 @@ CONFIG_NETDEVICES=y
426# CONFIG_EQUALIZER is not set 451# CONFIG_EQUALIZER is not set
427# CONFIG_TUN is not set 452# CONFIG_TUN is not set
428# CONFIG_VETH is not set 453# CONFIG_VETH is not set
454# CONFIG_IP1000 is not set
455# CONFIG_ARCNET is not set
429# CONFIG_NET_ETHERNET is not set 456# CONFIG_NET_ETHERNET is not set
457CONFIG_IBM_NEW_EMAC_RGMII=y
458CONFIG_IBM_NEW_EMAC_EMAC4=y
430# CONFIG_NETDEV_1000 is not set 459# CONFIG_NETDEV_1000 is not set
431# CONFIG_NETDEV_10000 is not set 460# CONFIG_NETDEV_10000 is not set
461# CONFIG_TR is not set
432 462
433# 463#
434# Wireless LAN 464# Wireless LAN
@@ -436,6 +466,8 @@ CONFIG_NETDEVICES=y
436# CONFIG_WLAN_PRE80211 is not set 466# CONFIG_WLAN_PRE80211 is not set
437# CONFIG_WLAN_80211 is not set 467# CONFIG_WLAN_80211 is not set
438# CONFIG_WAN is not set 468# CONFIG_WAN is not set
469# CONFIG_FDDI is not set
470# CONFIG_HIPPI is not set
439# CONFIG_PPP is not set 471# CONFIG_PPP is not set
440# CONFIG_SLIP is not set 472# CONFIG_SLIP is not set
441# CONFIG_SHAPER is not set 473# CONFIG_SHAPER is not set
@@ -467,6 +499,7 @@ CONFIG_NETDEVICES=y
467# 499#
468CONFIG_SERIAL_8250=y 500CONFIG_SERIAL_8250=y
469CONFIG_SERIAL_8250_CONSOLE=y 501CONFIG_SERIAL_8250_CONSOLE=y
502CONFIG_SERIAL_8250_PCI=y
470CONFIG_SERIAL_8250_NR_UARTS=4 503CONFIG_SERIAL_8250_NR_UARTS=4
471CONFIG_SERIAL_8250_RUNTIME_UARTS=4 504CONFIG_SERIAL_8250_RUNTIME_UARTS=4
472CONFIG_SERIAL_8250_EXTENDED=y 505CONFIG_SERIAL_8250_EXTENDED=y
@@ -481,6 +514,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
481# CONFIG_SERIAL_UARTLITE is not set 514# CONFIG_SERIAL_UARTLITE is not set
482CONFIG_SERIAL_CORE=y 515CONFIG_SERIAL_CORE=y
483CONFIG_SERIAL_CORE_CONSOLE=y 516CONFIG_SERIAL_CORE_CONSOLE=y
517# CONFIG_SERIAL_JSM is not set
484CONFIG_SERIAL_OF_PLATFORM=y 518CONFIG_SERIAL_OF_PLATFORM=y
485CONFIG_UNIX98_PTYS=y 519CONFIG_UNIX98_PTYS=y
486CONFIG_LEGACY_PTYS=y 520CONFIG_LEGACY_PTYS=y
@@ -490,8 +524,10 @@ CONFIG_LEGACY_PTY_COUNT=256
490# CONFIG_NVRAM is not set 524# CONFIG_NVRAM is not set
491# CONFIG_GEN_RTC is not set 525# CONFIG_GEN_RTC is not set
492# CONFIG_R3964 is not set 526# CONFIG_R3964 is not set
527# CONFIG_APPLICOM is not set
493# CONFIG_RAW_DRIVER is not set 528# CONFIG_RAW_DRIVER is not set
494# CONFIG_TCG_TPM is not set 529# CONFIG_TCG_TPM is not set
530CONFIG_DEVPORT=y
495# CONFIG_I2C is not set 531# CONFIG_I2C is not set
496 532
497# 533#
@@ -525,6 +561,8 @@ CONFIG_SSB_POSSIBLE=y
525# 561#
526# Graphics support 562# Graphics support
527# 563#
564# CONFIG_AGP is not set
565# CONFIG_DRM is not set
528# CONFIG_VGASTATE is not set 566# CONFIG_VGASTATE is not set
529# CONFIG_VIDEO_OUTPUT_CONTROL is not set 567# CONFIG_VIDEO_OUTPUT_CONTROL is not set
530# CONFIG_FB is not set 568# CONFIG_FB is not set
@@ -542,6 +580,7 @@ CONFIG_SSB_POSSIBLE=y
542# CONFIG_USB_SUPPORT is not set 580# CONFIG_USB_SUPPORT is not set
543# CONFIG_MMC is not set 581# CONFIG_MMC is not set
544# CONFIG_NEW_LEDS is not set 582# CONFIG_NEW_LEDS is not set
583# CONFIG_INFINIBAND is not set
545# CONFIG_EDAC is not set 584# CONFIG_EDAC is not set
546# CONFIG_RTC_CLASS is not set 585# CONFIG_RTC_CLASS is not set
547 586
diff --git a/arch/powerpc/configs/makalu_defconfig b/arch/powerpc/configs/makalu_defconfig
new file mode 100644
index 000000000000..c5db0265e5d8
--- /dev/null
+++ b/arch/powerpc/configs/makalu_defconfig
@@ -0,0 +1,812 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc6
4# Mon Dec 24 11:18:32 2007
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14CONFIG_40x=y
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_4xx=y
18# CONFIG_PPC_MM_SLICES is not set
19CONFIG_NOT_COHERENT_CACHE=y
20CONFIG_PPC32=y
21CONFIG_WORD_SIZE=32
22CONFIG_PPC_MERGE=y
23CONFIG_MMU=y
24CONFIG_GENERIC_CMOS_UPDATE=y
25CONFIG_GENERIC_TIME=y
26CONFIG_GENERIC_TIME_VSYSCALL=y
27CONFIG_GENERIC_CLOCKEVENTS=y
28CONFIG_GENERIC_HARDIRQS=y
29CONFIG_IRQ_PER_CPU=y
30CONFIG_RWSEM_XCHGADD_ALGORITHM=y
31CONFIG_ARCH_HAS_ILOG2_U32=y
32CONFIG_GENERIC_HWEIGHT=y
33CONFIG_GENERIC_CALIBRATE_DELAY=y
34CONFIG_GENERIC_FIND_NEXT_BIT=y
35# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
36CONFIG_PPC=y
37CONFIG_EARLY_PRINTK=y
38CONFIG_GENERIC_NVRAM=y
39CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
40CONFIG_ARCH_MAY_HAVE_PC_FDC=y
41CONFIG_PPC_OF=y
42CONFIG_OF=y
43CONFIG_PPC_UDBG_16550=y
44# CONFIG_GENERIC_TBSYNC is not set
45CONFIG_AUDIT_ARCH=y
46CONFIG_GENERIC_BUG=y
47# CONFIG_DEFAULT_UIMAGE is not set
48CONFIG_PPC_DCR_NATIVE=y
49# CONFIG_PPC_DCR_MMIO is not set
50CONFIG_PPC_DCR=y
51CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
52
53#
54# General setup
55#
56CONFIG_EXPERIMENTAL=y
57CONFIG_BROKEN_ON_SMP=y
58CONFIG_INIT_ENV_ARG_LIMIT=32
59CONFIG_LOCALVERSION=""
60CONFIG_LOCALVERSION_AUTO=y
61CONFIG_SWAP=y
62CONFIG_SYSVIPC=y
63CONFIG_SYSVIPC_SYSCTL=y
64CONFIG_POSIX_MQUEUE=y
65# CONFIG_BSD_PROCESS_ACCT is not set
66# CONFIG_TASKSTATS is not set
67# CONFIG_USER_NS is not set
68# CONFIG_PID_NS is not set
69# CONFIG_AUDIT is not set
70# CONFIG_IKCONFIG is not set
71CONFIG_LOG_BUF_SHIFT=14
72# CONFIG_CGROUPS is not set
73# CONFIG_FAIR_GROUP_SCHED is not set
74CONFIG_SYSFS_DEPRECATED=y
75# CONFIG_RELAY is not set
76CONFIG_BLK_DEV_INITRD=y
77CONFIG_INITRAMFS_SOURCE=""
78# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
79CONFIG_SYSCTL=y
80CONFIG_EMBEDDED=y
81CONFIG_SYSCTL_SYSCALL=y
82CONFIG_KALLSYMS=y
83CONFIG_KALLSYMS_ALL=y
84CONFIG_KALLSYMS_EXTRA_PASS=y
85CONFIG_HOTPLUG=y
86CONFIG_PRINTK=y
87CONFIG_BUG=y
88CONFIG_ELF_CORE=y
89CONFIG_BASE_FULL=y
90CONFIG_FUTEX=y
91CONFIG_ANON_INODES=y
92CONFIG_EPOLL=y
93CONFIG_SIGNALFD=y
94CONFIG_EVENTFD=y
95CONFIG_SHMEM=y
96CONFIG_VM_EVENT_COUNTERS=y
97CONFIG_SLUB_DEBUG=y
98# CONFIG_SLAB is not set
99CONFIG_SLUB=y
100# CONFIG_SLOB is not set
101CONFIG_RT_MUTEXES=y
102# CONFIG_TINY_SHMEM is not set
103CONFIG_BASE_SMALL=0
104CONFIG_MODULES=y
105CONFIG_MODULE_UNLOAD=y
106# CONFIG_MODULE_FORCE_UNLOAD is not set
107# CONFIG_MODVERSIONS is not set
108# CONFIG_MODULE_SRCVERSION_ALL is not set
109CONFIG_KMOD=y
110CONFIG_BLOCK=y
111CONFIG_LBD=y
112# CONFIG_BLK_DEV_IO_TRACE is not set
113# CONFIG_LSF is not set
114# CONFIG_BLK_DEV_BSG is not set
115
116#
117# IO Schedulers
118#
119CONFIG_IOSCHED_NOOP=y
120CONFIG_IOSCHED_AS=y
121CONFIG_IOSCHED_DEADLINE=y
122CONFIG_IOSCHED_CFQ=y
123CONFIG_DEFAULT_AS=y
124# CONFIG_DEFAULT_DEADLINE is not set
125# CONFIG_DEFAULT_CFQ is not set
126# CONFIG_DEFAULT_NOOP is not set
127CONFIG_DEFAULT_IOSCHED="anticipatory"
128CONFIG_PPC4xx_PCI_EXPRESS=y
129
130#
131# Platform support
132#
133# CONFIG_PPC_MPC52xx is not set
134# CONFIG_PPC_MPC5200 is not set
135# CONFIG_PPC_CELL is not set
136# CONFIG_PPC_CELL_NATIVE is not set
137# CONFIG_PQ2ADS is not set
138# CONFIG_EP405 is not set
139# CONFIG_KILAUEA is not set
140CONFIG_MAKALU=y
141# CONFIG_WALNUT is not set
142# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set
143CONFIG_405EX=y
144# CONFIG_MPIC is not set
145# CONFIG_MPIC_WEIRD is not set
146# CONFIG_PPC_I8259 is not set
147# CONFIG_PPC_RTAS is not set
148# CONFIG_MMIO_NVRAM is not set
149# CONFIG_PPC_MPC106 is not set
150# CONFIG_PPC_970_NAP is not set
151# CONFIG_PPC_INDIRECT_IO is not set
152# CONFIG_GENERIC_IOMAP is not set
153# CONFIG_CPU_FREQ is not set
154# CONFIG_CPM2 is not set
155# CONFIG_FSL_ULI1575 is not set
156
157#
158# Kernel options
159#
160# CONFIG_HIGHMEM is not set
161# CONFIG_TICK_ONESHOT is not set
162# CONFIG_NO_HZ is not set
163# CONFIG_HIGH_RES_TIMERS is not set
164CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
165# CONFIG_HZ_100 is not set
166CONFIG_HZ_250=y
167# CONFIG_HZ_300 is not set
168# CONFIG_HZ_1000 is not set
169CONFIG_HZ=250
170CONFIG_PREEMPT_NONE=y
171# CONFIG_PREEMPT_VOLUNTARY is not set
172# CONFIG_PREEMPT is not set
173CONFIG_BINFMT_ELF=y
174# CONFIG_BINFMT_MISC is not set
175# CONFIG_MATH_EMULATION is not set
176CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
177CONFIG_ARCH_FLATMEM_ENABLE=y
178CONFIG_ARCH_POPULATES_NODE_MAP=y
179CONFIG_SELECT_MEMORY_MODEL=y
180CONFIG_FLATMEM_MANUAL=y
181# CONFIG_DISCONTIGMEM_MANUAL is not set
182# CONFIG_SPARSEMEM_MANUAL is not set
183CONFIG_FLATMEM=y
184CONFIG_FLAT_NODE_MEM_MAP=y
185# CONFIG_SPARSEMEM_STATIC is not set
186# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
187CONFIG_SPLIT_PTLOCK_CPUS=4
188# CONFIG_RESOURCES_64BIT is not set
189CONFIG_ZONE_DMA_FLAG=1
190CONFIG_BOUNCE=y
191CONFIG_VIRT_TO_BUS=y
192CONFIG_PROC_DEVICETREE=y
193# CONFIG_CMDLINE_BOOL is not set
194# CONFIG_PM is not set
195CONFIG_SUSPEND_UP_POSSIBLE=y
196CONFIG_HIBERNATION_UP_POSSIBLE=y
197CONFIG_SECCOMP=y
198CONFIG_WANT_DEVICE_TREE=y
199CONFIG_DEVICE_TREE="kilauea.dts"
200CONFIG_ISA_DMA_API=y
201
202#
203# Bus options
204#
205CONFIG_ZONE_DMA=y
206CONFIG_PPC_INDIRECT_PCI=y
207CONFIG_PCI=y
208CONFIG_PCI_DOMAINS=y
209CONFIG_PCI_SYSCALL=y
210# CONFIG_PCIEPORTBUS is not set
211CONFIG_ARCH_SUPPORTS_MSI=y
212# CONFIG_PCI_MSI is not set
213CONFIG_PCI_LEGACY=y
214# CONFIG_PCI_DEBUG is not set
215# CONFIG_PCCARD is not set
216# CONFIG_HOTPLUG_PCI is not set
217
218#
219# Advanced setup
220#
221# CONFIG_ADVANCED_OPTIONS is not set
222
223#
224# Default settings for advanced configuration options are used
225#
226CONFIG_HIGHMEM_START=0xfe000000
227CONFIG_LOWMEM_SIZE=0x30000000
228CONFIG_KERNEL_START=0xc0000000
229CONFIG_TASK_SIZE=0xc0000000
230CONFIG_CONSISTENT_START=0xff100000
231CONFIG_CONSISTENT_SIZE=0x00200000
232CONFIG_BOOT_LOAD=0x00400000
233
234#
235# Networking
236#
237CONFIG_NET=y
238
239#
240# Networking options
241#
242CONFIG_PACKET=y
243# CONFIG_PACKET_MMAP is not set
244CONFIG_UNIX=y
245# CONFIG_NET_KEY is not set
246CONFIG_INET=y
247# CONFIG_IP_MULTICAST is not set
248# CONFIG_IP_ADVANCED_ROUTER is not set
249CONFIG_IP_FIB_HASH=y
250CONFIG_IP_PNP=y
251CONFIG_IP_PNP_DHCP=y
252CONFIG_IP_PNP_BOOTP=y
253# CONFIG_IP_PNP_RARP is not set
254# CONFIG_NET_IPIP is not set
255# CONFIG_NET_IPGRE is not set
256# CONFIG_ARPD is not set
257# CONFIG_SYN_COOKIES is not set
258# CONFIG_INET_AH is not set
259# CONFIG_INET_ESP is not set
260# CONFIG_INET_IPCOMP is not set
261# CONFIG_INET_XFRM_TUNNEL is not set
262# CONFIG_INET_TUNNEL is not set
263# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
264# CONFIG_INET_XFRM_MODE_TUNNEL is not set
265# CONFIG_INET_XFRM_MODE_BEET is not set
266# CONFIG_INET_LRO is not set
267CONFIG_INET_DIAG=y
268CONFIG_INET_TCP_DIAG=y
269# CONFIG_TCP_CONG_ADVANCED is not set
270CONFIG_TCP_CONG_CUBIC=y
271CONFIG_DEFAULT_TCP_CONG="cubic"
272# CONFIG_TCP_MD5SIG is not set
273# CONFIG_IPV6 is not set
274# CONFIG_INET6_XFRM_TUNNEL is not set
275# CONFIG_INET6_TUNNEL is not set
276# CONFIG_NETWORK_SECMARK is not set
277# CONFIG_NETFILTER is not set
278# CONFIG_IP_DCCP is not set
279# CONFIG_IP_SCTP is not set
280# CONFIG_TIPC is not set
281# CONFIG_ATM is not set
282# CONFIG_BRIDGE is not set
283# CONFIG_VLAN_8021Q is not set
284# CONFIG_DECNET is not set
285# CONFIG_LLC2 is not set
286# CONFIG_IPX is not set
287# CONFIG_ATALK is not set
288# CONFIG_X25 is not set
289# CONFIG_LAPB is not set
290# CONFIG_ECONET is not set
291# CONFIG_WAN_ROUTER is not set
292# CONFIG_NET_SCHED is not set
293
294#
295# Network testing
296#
297# CONFIG_NET_PKTGEN is not set
298# CONFIG_HAMRADIO is not set
299# CONFIG_IRDA is not set
300# CONFIG_BT is not set
301# CONFIG_AF_RXRPC is not set
302
303#
304# Wireless
305#
306# CONFIG_CFG80211 is not set
307# CONFIG_WIRELESS_EXT is not set
308# CONFIG_MAC80211 is not set
309# CONFIG_IEEE80211 is not set
310# CONFIG_RFKILL is not set
311# CONFIG_NET_9P is not set
312
313#
314# Device Drivers
315#
316
317#
318# Generic Driver Options
319#
320CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
321CONFIG_STANDALONE=y
322CONFIG_PREVENT_FIRMWARE_BUILD=y
323CONFIG_FW_LOADER=y
324# CONFIG_DEBUG_DRIVER is not set
325# CONFIG_DEBUG_DEVRES is not set
326# CONFIG_SYS_HYPERVISOR is not set
327CONFIG_CONNECTOR=y
328CONFIG_PROC_EVENTS=y
329CONFIG_MTD=y
330# CONFIG_MTD_DEBUG is not set
331# CONFIG_MTD_CONCAT is not set
332CONFIG_MTD_PARTITIONS=y
333# CONFIG_MTD_REDBOOT_PARTS is not set
334CONFIG_MTD_CMDLINE_PARTS=y
335
336#
337# User Modules And Translation Layers
338#
339CONFIG_MTD_CHAR=y
340CONFIG_MTD_BLKDEVS=m
341CONFIG_MTD_BLOCK=m
342# CONFIG_MTD_BLOCK_RO is not set
343# CONFIG_FTL is not set
344# CONFIG_NFTL is not set
345# CONFIG_INFTL is not set
346# CONFIG_RFD_FTL is not set
347# CONFIG_SSFDC is not set
348# CONFIG_MTD_OOPS is not set
349
350#
351# RAM/ROM/Flash chip drivers
352#
353CONFIG_MTD_CFI=y
354CONFIG_MTD_JEDECPROBE=y
355CONFIG_MTD_GEN_PROBE=y
356# CONFIG_MTD_CFI_ADV_OPTIONS is not set
357CONFIG_MTD_MAP_BANK_WIDTH_1=y
358CONFIG_MTD_MAP_BANK_WIDTH_2=y
359CONFIG_MTD_MAP_BANK_WIDTH_4=y
360# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
361# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
362# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
363CONFIG_MTD_CFI_I1=y
364CONFIG_MTD_CFI_I2=y
365# CONFIG_MTD_CFI_I4 is not set
366# CONFIG_MTD_CFI_I8 is not set
367# CONFIG_MTD_CFI_INTELEXT is not set
368CONFIG_MTD_CFI_AMDSTD=y
369# CONFIG_MTD_CFI_STAA is not set
370CONFIG_MTD_CFI_UTIL=y
371# CONFIG_MTD_RAM is not set
372# CONFIG_MTD_ROM is not set
373# CONFIG_MTD_ABSENT is not set
374
375#
376# Mapping drivers for chip access
377#
378# CONFIG_MTD_COMPLEX_MAPPINGS is not set
379# CONFIG_MTD_PHYSMAP is not set
380CONFIG_MTD_PHYSMAP_OF=y
381# CONFIG_MTD_INTEL_VR_NOR is not set
382# CONFIG_MTD_PLATRAM is not set
383
384#
385# Self-contained MTD device drivers
386#
387# CONFIG_MTD_PMC551 is not set
388# CONFIG_MTD_SLRAM is not set
389# CONFIG_MTD_PHRAM is not set
390# CONFIG_MTD_MTDRAM is not set
391# CONFIG_MTD_BLOCK2MTD is not set
392
393#
394# Disk-On-Chip Device Drivers
395#
396# CONFIG_MTD_DOC2000 is not set
397# CONFIG_MTD_DOC2001 is not set
398# CONFIG_MTD_DOC2001PLUS is not set
399# CONFIG_MTD_NAND is not set
400# CONFIG_MTD_ONENAND is not set
401
402#
403# UBI - Unsorted block images
404#
405# CONFIG_MTD_UBI is not set
406CONFIG_OF_DEVICE=y
407# CONFIG_PARPORT is not set
408CONFIG_BLK_DEV=y
409# CONFIG_BLK_DEV_FD is not set
410# CONFIG_BLK_CPQ_DA is not set
411# CONFIG_BLK_CPQ_CISS_DA is not set
412# CONFIG_BLK_DEV_DAC960 is not set
413# CONFIG_BLK_DEV_UMEM is not set
414# CONFIG_BLK_DEV_COW_COMMON is not set
415# CONFIG_BLK_DEV_LOOP is not set
416# CONFIG_BLK_DEV_NBD is not set
417# CONFIG_BLK_DEV_SX8 is not set
418CONFIG_BLK_DEV_RAM=y
419CONFIG_BLK_DEV_RAM_COUNT=16
420CONFIG_BLK_DEV_RAM_SIZE=35000
421CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
422# CONFIG_CDROM_PKTCDVD is not set
423# CONFIG_ATA_OVER_ETH is not set
424# CONFIG_XILINX_SYSACE is not set
425# CONFIG_MISC_DEVICES is not set
426# CONFIG_IDE is not set
427
428#
429# SCSI device support
430#
431# CONFIG_RAID_ATTRS is not set
432# CONFIG_SCSI is not set
433# CONFIG_SCSI_DMA is not set
434# CONFIG_SCSI_NETLINK is not set
435# CONFIG_ATA is not set
436# CONFIG_MD is not set
437# CONFIG_FUSION is not set
438
439#
440# IEEE 1394 (FireWire) support
441#
442# CONFIG_FIREWIRE is not set
443# CONFIG_IEEE1394 is not set
444# CONFIG_I2O is not set
445# CONFIG_MACINTOSH_DRIVERS is not set
446CONFIG_NETDEVICES=y
447# CONFIG_NETDEVICES_MULTIQUEUE is not set
448# CONFIG_DUMMY is not set
449# CONFIG_BONDING is not set
450# CONFIG_MACVLAN is not set
451# CONFIG_EQUALIZER is not set
452# CONFIG_TUN is not set
453# CONFIG_VETH is not set
454# CONFIG_IP1000 is not set
455# CONFIG_ARCNET is not set
456# CONFIG_PHYLIB is not set
457CONFIG_NET_ETHERNET=y
458# CONFIG_MII is not set
459# CONFIG_HAPPYMEAL is not set
460# CONFIG_SUNGEM is not set
461# CONFIG_CASSINI is not set
462# CONFIG_NET_VENDOR_3COM is not set
463# CONFIG_NET_TULIP is not set
464# CONFIG_HP100 is not set
465CONFIG_IBM_NEW_EMAC=y
466CONFIG_IBM_NEW_EMAC_RXB=256
467CONFIG_IBM_NEW_EMAC_TXB=256
468CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
469CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
470CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
471# CONFIG_IBM_NEW_EMAC_DEBUG is not set
472# CONFIG_IBM_NEW_EMAC_ZMII is not set
473CONFIG_IBM_NEW_EMAC_RGMII=y
474# CONFIG_IBM_NEW_EMAC_TAH is not set
475CONFIG_IBM_NEW_EMAC_EMAC4=y
476# CONFIG_NET_PCI is not set
477# CONFIG_B44 is not set
478# CONFIG_NETDEV_1000 is not set
479# CONFIG_NETDEV_10000 is not set
480# CONFIG_TR is not set
481
482#
483# Wireless LAN
484#
485# CONFIG_WLAN_PRE80211 is not set
486# CONFIG_WLAN_80211 is not set
487# CONFIG_WAN is not set
488# CONFIG_FDDI is not set
489# CONFIG_HIPPI is not set
490# CONFIG_PPP is not set
491# CONFIG_SLIP is not set
492# CONFIG_SHAPER is not set
493# CONFIG_NETCONSOLE is not set
494# CONFIG_NETPOLL is not set
495# CONFIG_NET_POLL_CONTROLLER is not set
496# CONFIG_ISDN is not set
497# CONFIG_PHONE is not set
498
499#
500# Input device support
501#
502# CONFIG_INPUT is not set
503
504#
505# Hardware I/O ports
506#
507# CONFIG_SERIO is not set
508# CONFIG_GAMEPORT is not set
509
510#
511# Character devices
512#
513# CONFIG_VT is not set
514# CONFIG_SERIAL_NONSTANDARD is not set
515
516#
517# Serial drivers
518#
519CONFIG_SERIAL_8250=y
520CONFIG_SERIAL_8250_CONSOLE=y
521CONFIG_SERIAL_8250_PCI=y
522CONFIG_SERIAL_8250_NR_UARTS=4
523CONFIG_SERIAL_8250_RUNTIME_UARTS=4
524CONFIG_SERIAL_8250_EXTENDED=y
525# CONFIG_SERIAL_8250_MANY_PORTS is not set
526CONFIG_SERIAL_8250_SHARE_IRQ=y
527# CONFIG_SERIAL_8250_DETECT_IRQ is not set
528# CONFIG_SERIAL_8250_RSA is not set
529
530#
531# Non-8250 serial port support
532#
533# CONFIG_SERIAL_UARTLITE is not set
534CONFIG_SERIAL_CORE=y
535CONFIG_SERIAL_CORE_CONSOLE=y
536# CONFIG_SERIAL_JSM is not set
537CONFIG_SERIAL_OF_PLATFORM=y
538CONFIG_UNIX98_PTYS=y
539CONFIG_LEGACY_PTYS=y
540CONFIG_LEGACY_PTY_COUNT=256
541# CONFIG_IPMI_HANDLER is not set
542# CONFIG_HW_RANDOM is not set
543# CONFIG_NVRAM is not set
544# CONFIG_GEN_RTC is not set
545# CONFIG_R3964 is not set
546# CONFIG_APPLICOM is not set
547# CONFIG_RAW_DRIVER is not set
548# CONFIG_TCG_TPM is not set
549CONFIG_DEVPORT=y
550# CONFIG_I2C is not set
551
552#
553# SPI support
554#
555# CONFIG_SPI is not set
556# CONFIG_SPI_MASTER is not set
557# CONFIG_W1 is not set
558# CONFIG_POWER_SUPPLY is not set
559# CONFIG_HWMON is not set
560# CONFIG_WATCHDOG is not set
561
562#
563# Sonics Silicon Backplane
564#
565CONFIG_SSB_POSSIBLE=y
566# CONFIG_SSB is not set
567
568#
569# Multifunction device drivers
570#
571# CONFIG_MFD_SM501 is not set
572
573#
574# Multimedia devices
575#
576# CONFIG_VIDEO_DEV is not set
577# CONFIG_DVB_CORE is not set
578# CONFIG_DAB is not set
579
580#
581# Graphics support
582#
583# CONFIG_AGP is not set
584# CONFIG_DRM is not set
585# CONFIG_VGASTATE is not set
586# CONFIG_VIDEO_OUTPUT_CONTROL is not set
587# CONFIG_FB is not set
588# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
589
590#
591# Display device support
592#
593# CONFIG_DISPLAY_SUPPORT is not set
594
595#
596# Sound
597#
598# CONFIG_SOUND is not set
599# CONFIG_USB_SUPPORT is not set
600# CONFIG_MMC is not set
601# CONFIG_NEW_LEDS is not set
602# CONFIG_INFINIBAND is not set
603# CONFIG_EDAC is not set
604# CONFIG_RTC_CLASS is not set
605
606#
607# Userspace I/O
608#
609# CONFIG_UIO is not set
610
611#
612# File systems
613#
614CONFIG_EXT2_FS=y
615# CONFIG_EXT2_FS_XATTR is not set
616# CONFIG_EXT2_FS_XIP is not set
617# CONFIG_EXT3_FS is not set
618# CONFIG_EXT4DEV_FS is not set
619# CONFIG_REISERFS_FS is not set
620# CONFIG_JFS_FS is not set
621# CONFIG_FS_POSIX_ACL is not set
622# CONFIG_XFS_FS is not set
623# CONFIG_GFS2_FS is not set
624# CONFIG_OCFS2_FS is not set
625# CONFIG_MINIX_FS is not set
626# CONFIG_ROMFS_FS is not set
627CONFIG_INOTIFY=y
628CONFIG_INOTIFY_USER=y
629# CONFIG_QUOTA is not set
630CONFIG_DNOTIFY=y
631# CONFIG_AUTOFS_FS is not set
632# CONFIG_AUTOFS4_FS is not set
633# CONFIG_FUSE_FS is not set
634
635#
636# CD-ROM/DVD Filesystems
637#
638# CONFIG_ISO9660_FS is not set
639# CONFIG_UDF_FS is not set
640
641#
642# DOS/FAT/NT Filesystems
643#
644# CONFIG_MSDOS_FS is not set
645# CONFIG_VFAT_FS is not set
646# CONFIG_NTFS_FS is not set
647
648#
649# Pseudo filesystems
650#
651CONFIG_PROC_FS=y
652CONFIG_PROC_KCORE=y
653CONFIG_PROC_SYSCTL=y
654CONFIG_SYSFS=y
655CONFIG_TMPFS=y
656# CONFIG_TMPFS_POSIX_ACL is not set
657# CONFIG_HUGETLB_PAGE is not set
658# CONFIG_CONFIGFS_FS is not set
659
660#
661# Miscellaneous filesystems
662#
663# CONFIG_ADFS_FS is not set
664# CONFIG_AFFS_FS is not set
665# CONFIG_HFS_FS is not set
666# CONFIG_HFSPLUS_FS is not set
667# CONFIG_BEFS_FS is not set
668# CONFIG_BFS_FS is not set
669# CONFIG_EFS_FS is not set
670# CONFIG_JFFS2_FS is not set
671CONFIG_CRAMFS=y
672# CONFIG_VXFS_FS is not set
673# CONFIG_HPFS_FS is not set
674# CONFIG_QNX4FS_FS is not set
675# CONFIG_SYSV_FS is not set
676# CONFIG_UFS_FS is not set
677CONFIG_NETWORK_FILESYSTEMS=y
678CONFIG_NFS_FS=y
679CONFIG_NFS_V3=y
680# CONFIG_NFS_V3_ACL is not set
681# CONFIG_NFS_V4 is not set
682# CONFIG_NFS_DIRECTIO is not set
683# CONFIG_NFSD is not set
684CONFIG_ROOT_NFS=y
685CONFIG_LOCKD=y
686CONFIG_LOCKD_V4=y
687CONFIG_NFS_COMMON=y
688CONFIG_SUNRPC=y
689# CONFIG_SUNRPC_BIND34 is not set
690# CONFIG_RPCSEC_GSS_KRB5 is not set
691# CONFIG_RPCSEC_GSS_SPKM3 is not set
692# CONFIG_SMB_FS is not set
693# CONFIG_CIFS is not set
694# CONFIG_NCP_FS is not set
695# CONFIG_CODA_FS is not set
696# CONFIG_AFS_FS is not set
697
698#
699# Partition Types
700#
701# CONFIG_PARTITION_ADVANCED is not set
702CONFIG_MSDOS_PARTITION=y
703# CONFIG_NLS is not set
704# CONFIG_DLM is not set
705# CONFIG_UCC_SLOW is not set
706
707#
708# Library routines
709#
710CONFIG_BITREVERSE=y
711# CONFIG_CRC_CCITT is not set
712# CONFIG_CRC16 is not set
713# CONFIG_CRC_ITU_T is not set
714CONFIG_CRC32=y
715# CONFIG_CRC7 is not set
716# CONFIG_LIBCRC32C is not set
717CONFIG_ZLIB_INFLATE=y
718CONFIG_PLIST=y
719CONFIG_HAS_IOMEM=y
720CONFIG_HAS_IOPORT=y
721CONFIG_HAS_DMA=y
722# CONFIG_INSTRUMENTATION is not set
723
724#
725# Kernel hacking
726#
727# CONFIG_PRINTK_TIME is not set
728CONFIG_ENABLE_WARN_DEPRECATED=y
729CONFIG_ENABLE_MUST_CHECK=y
730CONFIG_MAGIC_SYSRQ=y
731# CONFIG_UNUSED_SYMBOLS is not set
732# CONFIG_DEBUG_FS is not set
733# CONFIG_HEADERS_CHECK is not set
734CONFIG_DEBUG_KERNEL=y
735# CONFIG_DEBUG_SHIRQ is not set
736CONFIG_DETECT_SOFTLOCKUP=y
737CONFIG_SCHED_DEBUG=y
738# CONFIG_SCHEDSTATS is not set
739# CONFIG_TIMER_STATS is not set
740# CONFIG_SLUB_DEBUG_ON is not set
741# CONFIG_DEBUG_RT_MUTEXES is not set
742# CONFIG_RT_MUTEX_TESTER is not set
743# CONFIG_DEBUG_SPINLOCK is not set
744# CONFIG_DEBUG_MUTEXES is not set
745# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
746# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
747# CONFIG_DEBUG_KOBJECT is not set
748CONFIG_DEBUG_BUGVERBOSE=y
749# CONFIG_DEBUG_INFO is not set
750# CONFIG_DEBUG_VM is not set
751# CONFIG_DEBUG_LIST is not set
752# CONFIG_DEBUG_SG is not set
753CONFIG_FORCED_INLINING=y
754# CONFIG_BOOT_PRINTK_DELAY is not set
755# CONFIG_RCU_TORTURE_TEST is not set
756# CONFIG_FAULT_INJECTION is not set
757# CONFIG_SAMPLES is not set
758# CONFIG_DEBUG_STACKOVERFLOW is not set
759# CONFIG_DEBUG_STACK_USAGE is not set
760# CONFIG_DEBUG_PAGEALLOC is not set
761# CONFIG_DEBUGGER is not set
762# CONFIG_BDI_SWITCH is not set
763# CONFIG_PPC_EARLY_DEBUG is not set
764
765#
766# Security options
767#
768# CONFIG_KEYS is not set
769# CONFIG_SECURITY is not set
770# CONFIG_SECURITY_FILE_CAPABILITIES is not set
771CONFIG_CRYPTO=y
772CONFIG_CRYPTO_ALGAPI=y
773CONFIG_CRYPTO_BLKCIPHER=y
774CONFIG_CRYPTO_MANAGER=y
775# CONFIG_CRYPTO_HMAC is not set
776# CONFIG_CRYPTO_XCBC is not set
777# CONFIG_CRYPTO_NULL is not set
778# CONFIG_CRYPTO_MD4 is not set
779CONFIG_CRYPTO_MD5=y
780# CONFIG_CRYPTO_SHA1 is not set
781# CONFIG_CRYPTO_SHA256 is not set
782# CONFIG_CRYPTO_SHA512 is not set
783# CONFIG_CRYPTO_WP512 is not set
784# CONFIG_CRYPTO_TGR192 is not set
785# CONFIG_CRYPTO_GF128MUL is not set
786CONFIG_CRYPTO_ECB=y
787CONFIG_CRYPTO_CBC=y
788CONFIG_CRYPTO_PCBC=y
789# CONFIG_CRYPTO_LRW is not set
790# CONFIG_CRYPTO_XTS is not set
791# CONFIG_CRYPTO_CRYPTD is not set
792CONFIG_CRYPTO_DES=y
793# CONFIG_CRYPTO_FCRYPT is not set
794# CONFIG_CRYPTO_BLOWFISH is not set
795# CONFIG_CRYPTO_TWOFISH is not set
796# CONFIG_CRYPTO_SERPENT is not set
797# CONFIG_CRYPTO_AES is not set
798# CONFIG_CRYPTO_CAST5 is not set
799# CONFIG_CRYPTO_CAST6 is not set
800# CONFIG_CRYPTO_TEA is not set
801# CONFIG_CRYPTO_ARC4 is not set
802# CONFIG_CRYPTO_KHAZAD is not set
803# CONFIG_CRYPTO_ANUBIS is not set
804# CONFIG_CRYPTO_SEED is not set
805# CONFIG_CRYPTO_DEFLATE is not set
806# CONFIG_CRYPTO_MICHAEL_MIC is not set
807# CONFIG_CRYPTO_CRC32C is not set
808# CONFIG_CRYPTO_CAMELLIA is not set
809# CONFIG_CRYPTO_TEST is not set
810# CONFIG_CRYPTO_AUTHENC is not set
811CONFIG_CRYPTO_HW=y
812# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/configs/rainier_defconfig b/arch/powerpc/configs/rainier_defconfig
new file mode 100644
index 000000000000..7b95001a22a8
--- /dev/null
+++ b/arch/powerpc/configs/rainier_defconfig
@@ -0,0 +1,873 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc6
4# Mon Dec 24 11:22:40 2007
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15CONFIG_44x=y
16# CONFIG_E200 is not set
17CONFIG_4xx=y
18CONFIG_BOOKE=y
19CONFIG_PTE_64BIT=y
20CONFIG_PHYS_64BIT=y
21# CONFIG_PPC_MM_SLICES is not set
22CONFIG_NOT_COHERENT_CACHE=y
23CONFIG_PPC32=y
24CONFIG_WORD_SIZE=32
25CONFIG_PPC_MERGE=y
26CONFIG_MMU=y
27CONFIG_GENERIC_CMOS_UPDATE=y
28CONFIG_GENERIC_TIME=y
29CONFIG_GENERIC_TIME_VSYSCALL=y
30CONFIG_GENERIC_CLOCKEVENTS=y
31CONFIG_GENERIC_HARDIRQS=y
32CONFIG_IRQ_PER_CPU=y
33CONFIG_RWSEM_XCHGADD_ALGORITHM=y
34CONFIG_ARCH_HAS_ILOG2_U32=y
35CONFIG_GENERIC_HWEIGHT=y
36CONFIG_GENERIC_CALIBRATE_DELAY=y
37CONFIG_GENERIC_FIND_NEXT_BIT=y
38# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
39CONFIG_PPC=y
40CONFIG_EARLY_PRINTK=y
41CONFIG_GENERIC_NVRAM=y
42CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
43CONFIG_ARCH_MAY_HAVE_PC_FDC=y
44CONFIG_PPC_OF=y
45CONFIG_OF=y
46CONFIG_PPC_UDBG_16550=y
47# CONFIG_GENERIC_TBSYNC is not set
48CONFIG_AUDIT_ARCH=y
49CONFIG_GENERIC_BUG=y
50# CONFIG_DEFAULT_UIMAGE is not set
51CONFIG_PPC_DCR_NATIVE=y
52# CONFIG_PPC_DCR_MMIO is not set
53CONFIG_PPC_DCR=y
54CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
55
56#
57# General setup
58#
59CONFIG_EXPERIMENTAL=y
60CONFIG_BROKEN_ON_SMP=y
61CONFIG_INIT_ENV_ARG_LIMIT=32
62CONFIG_LOCALVERSION=""
63CONFIG_LOCALVERSION_AUTO=y
64CONFIG_SWAP=y
65CONFIG_SYSVIPC=y
66CONFIG_SYSVIPC_SYSCTL=y
67CONFIG_POSIX_MQUEUE=y
68# CONFIG_BSD_PROCESS_ACCT is not set
69# CONFIG_TASKSTATS is not set
70# CONFIG_USER_NS is not set
71# CONFIG_PID_NS is not set
72# CONFIG_AUDIT is not set
73# CONFIG_IKCONFIG is not set
74CONFIG_LOG_BUF_SHIFT=14
75# CONFIG_CGROUPS is not set
76CONFIG_FAIR_GROUP_SCHED=y
77CONFIG_FAIR_USER_SCHED=y
78# CONFIG_FAIR_CGROUP_SCHED is not set
79CONFIG_SYSFS_DEPRECATED=y
80# CONFIG_RELAY is not set
81CONFIG_BLK_DEV_INITRD=y
82CONFIG_INITRAMFS_SOURCE=""
83# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
84CONFIG_SYSCTL=y
85CONFIG_EMBEDDED=y
86CONFIG_SYSCTL_SYSCALL=y
87CONFIG_KALLSYMS=y
88# CONFIG_KALLSYMS_ALL is not set
89# CONFIG_KALLSYMS_EXTRA_PASS is not set
90CONFIG_HOTPLUG=y
91CONFIG_PRINTK=y
92CONFIG_BUG=y
93CONFIG_ELF_CORE=y
94CONFIG_BASE_FULL=y
95CONFIG_FUTEX=y
96CONFIG_ANON_INODES=y
97CONFIG_EPOLL=y
98CONFIG_SIGNALFD=y
99CONFIG_EVENTFD=y
100CONFIG_SHMEM=y
101CONFIG_VM_EVENT_COUNTERS=y
102CONFIG_SLUB_DEBUG=y
103# CONFIG_SLAB is not set
104CONFIG_SLUB=y
105# CONFIG_SLOB is not set
106CONFIG_RT_MUTEXES=y
107# CONFIG_TINY_SHMEM is not set
108CONFIG_BASE_SMALL=0
109CONFIG_MODULES=y
110CONFIG_MODULE_UNLOAD=y
111# CONFIG_MODULE_FORCE_UNLOAD is not set
112# CONFIG_MODVERSIONS is not set
113# CONFIG_MODULE_SRCVERSION_ALL is not set
114CONFIG_KMOD=y
115CONFIG_BLOCK=y
116CONFIG_LBD=y
117# CONFIG_BLK_DEV_IO_TRACE is not set
118# CONFIG_LSF is not set
119# CONFIG_BLK_DEV_BSG is not set
120
121#
122# IO Schedulers
123#
124CONFIG_IOSCHED_NOOP=y
125CONFIG_IOSCHED_AS=y
126CONFIG_IOSCHED_DEADLINE=y
127CONFIG_IOSCHED_CFQ=y
128CONFIG_DEFAULT_AS=y
129# CONFIG_DEFAULT_DEADLINE is not set
130# CONFIG_DEFAULT_CFQ is not set
131# CONFIG_DEFAULT_NOOP is not set
132CONFIG_DEFAULT_IOSCHED="anticipatory"
133# CONFIG_PPC4xx_PCI_EXPRESS is not set
134
135#
136# Platform support
137#
138# CONFIG_PPC_MPC52xx is not set
139# CONFIG_PPC_MPC5200 is not set
140# CONFIG_PPC_CELL is not set
141# CONFIG_PPC_CELL_NATIVE is not set
142# CONFIG_PQ2ADS is not set
143# CONFIG_BAMBOO is not set
144# CONFIG_EBONY is not set
145# CONFIG_SEQUOIA is not set
146# CONFIG_TAISHAN is not set
147# CONFIG_KATMAI is not set
148CONFIG_RAINIER=y
149CONFIG_440GRX=y
150# CONFIG_MPIC is not set
151# CONFIG_MPIC_WEIRD is not set
152# CONFIG_PPC_I8259 is not set
153# CONFIG_PPC_RTAS is not set
154# CONFIG_MMIO_NVRAM is not set
155# CONFIG_PPC_MPC106 is not set
156# CONFIG_PPC_970_NAP is not set
157# CONFIG_PPC_INDIRECT_IO is not set
158# CONFIG_GENERIC_IOMAP is not set
159# CONFIG_CPU_FREQ is not set
160# CONFIG_CPM2 is not set
161# CONFIG_FSL_ULI1575 is not set
162
163#
164# Kernel options
165#
166# CONFIG_HIGHMEM is not set
167# CONFIG_TICK_ONESHOT is not set
168# CONFIG_NO_HZ is not set
169# CONFIG_HIGH_RES_TIMERS is not set
170CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
171# CONFIG_HZ_100 is not set
172CONFIG_HZ_250=y
173# CONFIG_HZ_300 is not set
174# CONFIG_HZ_1000 is not set
175CONFIG_HZ=250
176CONFIG_PREEMPT_NONE=y
177# CONFIG_PREEMPT_VOLUNTARY is not set
178# CONFIG_PREEMPT is not set
179CONFIG_BINFMT_ELF=y
180# CONFIG_BINFMT_MISC is not set
181CONFIG_MATH_EMULATION=y
182CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
183CONFIG_ARCH_FLATMEM_ENABLE=y
184CONFIG_ARCH_POPULATES_NODE_MAP=y
185CONFIG_SELECT_MEMORY_MODEL=y
186CONFIG_FLATMEM_MANUAL=y
187# CONFIG_DISCONTIGMEM_MANUAL is not set
188# CONFIG_SPARSEMEM_MANUAL is not set
189CONFIG_FLATMEM=y
190CONFIG_FLAT_NODE_MEM_MAP=y
191# CONFIG_SPARSEMEM_STATIC is not set
192# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
193CONFIG_SPLIT_PTLOCK_CPUS=4
194CONFIG_RESOURCES_64BIT=y
195CONFIG_ZONE_DMA_FLAG=1
196CONFIG_BOUNCE=y
197CONFIG_VIRT_TO_BUS=y
198CONFIG_PROC_DEVICETREE=y
199CONFIG_CMDLINE_BOOL=y
200CONFIG_CMDLINE=""
201CONFIG_SECCOMP=y
202CONFIG_WANT_DEVICE_TREE=y
203CONFIG_DEVICE_TREE="rainier.dts"
204CONFIG_ISA_DMA_API=y
205
206#
207# Bus options
208#
209CONFIG_ZONE_DMA=y
210CONFIG_PPC_INDIRECT_PCI=y
211CONFIG_PCI=y
212CONFIG_PCI_DOMAINS=y
213CONFIG_PCI_SYSCALL=y
214# CONFIG_PCIEPORTBUS is not set
215CONFIG_ARCH_SUPPORTS_MSI=y
216# CONFIG_PCI_MSI is not set
217CONFIG_PCI_LEGACY=y
218# CONFIG_PCI_DEBUG is not set
219# CONFIG_PCCARD is not set
220# CONFIG_HOTPLUG_PCI is not set
221
222#
223# Advanced setup
224#
225# CONFIG_ADVANCED_OPTIONS is not set
226
227#
228# Default settings for advanced configuration options are used
229#
230CONFIG_HIGHMEM_START=0xfe000000
231CONFIG_LOWMEM_SIZE=0x30000000
232CONFIG_KERNEL_START=0xc0000000
233CONFIG_TASK_SIZE=0xc0000000
234CONFIG_CONSISTENT_START=0xff100000
235CONFIG_CONSISTENT_SIZE=0x00200000
236CONFIG_BOOT_LOAD=0x01000000
237
238#
239# Networking
240#
241CONFIG_NET=y
242
243#
244# Networking options
245#
246CONFIG_PACKET=y
247# CONFIG_PACKET_MMAP is not set
248CONFIG_UNIX=y
249# CONFIG_NET_KEY is not set
250CONFIG_INET=y
251# CONFIG_IP_MULTICAST is not set
252# CONFIG_IP_ADVANCED_ROUTER is not set
253CONFIG_IP_FIB_HASH=y
254CONFIG_IP_PNP=y
255CONFIG_IP_PNP_DHCP=y
256CONFIG_IP_PNP_BOOTP=y
257# CONFIG_IP_PNP_RARP is not set
258# CONFIG_NET_IPIP is not set
259# CONFIG_NET_IPGRE is not set
260# CONFIG_ARPD is not set
261# CONFIG_SYN_COOKIES is not set
262# CONFIG_INET_AH is not set
263# CONFIG_INET_ESP is not set
264# CONFIG_INET_IPCOMP is not set
265# CONFIG_INET_XFRM_TUNNEL is not set
266# CONFIG_INET_TUNNEL is not set
267# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
268# CONFIG_INET_XFRM_MODE_TUNNEL is not set
269# CONFIG_INET_XFRM_MODE_BEET is not set
270# CONFIG_INET_LRO is not set
271CONFIG_INET_DIAG=y
272CONFIG_INET_TCP_DIAG=y
273# CONFIG_TCP_CONG_ADVANCED is not set
274CONFIG_TCP_CONG_CUBIC=y
275CONFIG_DEFAULT_TCP_CONG="cubic"
276# CONFIG_TCP_MD5SIG is not set
277# CONFIG_IPV6 is not set
278# CONFIG_INET6_XFRM_TUNNEL is not set
279# CONFIG_INET6_TUNNEL is not set
280# CONFIG_NETWORK_SECMARK is not set
281# CONFIG_NETFILTER is not set
282# CONFIG_IP_DCCP is not set
283# CONFIG_IP_SCTP is not set
284# CONFIG_TIPC is not set
285# CONFIG_ATM is not set
286# CONFIG_BRIDGE is not set
287# CONFIG_VLAN_8021Q is not set
288# CONFIG_DECNET is not set
289# CONFIG_LLC2 is not set
290# CONFIG_IPX is not set
291# CONFIG_ATALK is not set
292# CONFIG_X25 is not set
293# CONFIG_LAPB is not set
294# CONFIG_ECONET is not set
295# CONFIG_WAN_ROUTER is not set
296# CONFIG_NET_SCHED is not set
297
298#
299# Network testing
300#
301# CONFIG_NET_PKTGEN is not set
302# CONFIG_HAMRADIO is not set
303# CONFIG_IRDA is not set
304# CONFIG_BT is not set
305# CONFIG_AF_RXRPC is not set
306
307#
308# Wireless
309#
310# CONFIG_CFG80211 is not set
311# CONFIG_WIRELESS_EXT is not set
312# CONFIG_MAC80211 is not set
313# CONFIG_IEEE80211 is not set
314# CONFIG_RFKILL is not set
315# CONFIG_NET_9P is not set
316
317#
318# Device Drivers
319#
320
321#
322# Generic Driver Options
323#
324CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
325CONFIG_STANDALONE=y
326CONFIG_PREVENT_FIRMWARE_BUILD=y
327CONFIG_FW_LOADER=y
328# CONFIG_DEBUG_DRIVER is not set
329# CONFIG_DEBUG_DEVRES is not set
330# CONFIG_SYS_HYPERVISOR is not set
331CONFIG_CONNECTOR=y
332CONFIG_PROC_EVENTS=y
333CONFIG_MTD=y
334# CONFIG_MTD_DEBUG is not set
335# CONFIG_MTD_CONCAT is not set
336CONFIG_MTD_PARTITIONS=y
337# CONFIG_MTD_REDBOOT_PARTS is not set
338CONFIG_MTD_CMDLINE_PARTS=y
339
340#
341# User Modules And Translation Layers
342#
343CONFIG_MTD_CHAR=y
344# CONFIG_MTD_BLKDEVS is not set
345# CONFIG_MTD_BLOCK is not set
346# CONFIG_MTD_BLOCK_RO is not set
347# CONFIG_FTL is not set
348# CONFIG_NFTL is not set
349# CONFIG_INFTL is not set
350# CONFIG_RFD_FTL is not set
351# CONFIG_SSFDC is not set
352# CONFIG_MTD_OOPS is not set
353
354#
355# RAM/ROM/Flash chip drivers
356#
357CONFIG_MTD_CFI=y
358CONFIG_MTD_JEDECPROBE=y
359CONFIG_MTD_GEN_PROBE=y
360# CONFIG_MTD_CFI_ADV_OPTIONS is not set
361CONFIG_MTD_MAP_BANK_WIDTH_1=y
362CONFIG_MTD_MAP_BANK_WIDTH_2=y
363CONFIG_MTD_MAP_BANK_WIDTH_4=y
364# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
365# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
366# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
367CONFIG_MTD_CFI_I1=y
368CONFIG_MTD_CFI_I2=y
369# CONFIG_MTD_CFI_I4 is not set
370# CONFIG_MTD_CFI_I8 is not set
371CONFIG_MTD_CFI_INTELEXT=y
372CONFIG_MTD_CFI_AMDSTD=y
373# CONFIG_MTD_CFI_STAA is not set
374CONFIG_MTD_CFI_UTIL=y
375# CONFIG_MTD_RAM is not set
376# CONFIG_MTD_ROM is not set
377# CONFIG_MTD_ABSENT is not set
378
379#
380# Mapping drivers for chip access
381#
382# CONFIG_MTD_COMPLEX_MAPPINGS is not set
383# CONFIG_MTD_PHYSMAP is not set
384CONFIG_MTD_PHYSMAP_OF=y
385# CONFIG_MTD_INTEL_VR_NOR is not set
386# CONFIG_MTD_PLATRAM is not set
387
388#
389# Self-contained MTD device drivers
390#
391# CONFIG_MTD_PMC551 is not set
392# CONFIG_MTD_SLRAM is not set
393# CONFIG_MTD_PHRAM is not set
394# CONFIG_MTD_MTDRAM is not set
395# CONFIG_MTD_BLOCK2MTD is not set
396
397#
398# Disk-On-Chip Device Drivers
399#
400# CONFIG_MTD_DOC2000 is not set
401# CONFIG_MTD_DOC2001 is not set
402# CONFIG_MTD_DOC2001PLUS is not set
403# CONFIG_MTD_NAND is not set
404# CONFIG_MTD_ONENAND is not set
405
406#
407# UBI - Unsorted block images
408#
409# CONFIG_MTD_UBI is not set
410CONFIG_OF_DEVICE=y
411# CONFIG_PARPORT is not set
412CONFIG_BLK_DEV=y
413# CONFIG_BLK_DEV_FD is not set
414# CONFIG_BLK_CPQ_DA is not set
415# CONFIG_BLK_CPQ_CISS_DA is not set
416# CONFIG_BLK_DEV_DAC960 is not set
417# CONFIG_BLK_DEV_UMEM is not set
418# CONFIG_BLK_DEV_COW_COMMON is not set
419# CONFIG_BLK_DEV_LOOP is not set
420# CONFIG_BLK_DEV_NBD is not set
421# CONFIG_BLK_DEV_SX8 is not set
422CONFIG_BLK_DEV_RAM=y
423CONFIG_BLK_DEV_RAM_COUNT=16
424CONFIG_BLK_DEV_RAM_SIZE=35000
425CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
426# CONFIG_CDROM_PKTCDVD is not set
427# CONFIG_ATA_OVER_ETH is not set
428# CONFIG_XILINX_SYSACE is not set
429CONFIG_MISC_DEVICES=y
430# CONFIG_PHANTOM is not set
431# CONFIG_EEPROM_93CX6 is not set
432# CONFIG_SGI_IOC4 is not set
433# CONFIG_TIFM_CORE is not set
434# CONFIG_IDE is not set
435
436#
437# SCSI device support
438#
439# CONFIG_RAID_ATTRS is not set
440# CONFIG_SCSI is not set
441# CONFIG_SCSI_DMA is not set
442# CONFIG_SCSI_NETLINK is not set
443# CONFIG_ATA is not set
444# CONFIG_MD is not set
445# CONFIG_FUSION is not set
446
447#
448# IEEE 1394 (FireWire) support
449#
450# CONFIG_FIREWIRE is not set
451# CONFIG_IEEE1394 is not set
452# CONFIG_I2O is not set
453CONFIG_MACINTOSH_DRIVERS=y
454# CONFIG_MAC_EMUMOUSEBTN is not set
455# CONFIG_WINDFARM is not set
456CONFIG_NETDEVICES=y
457# CONFIG_NETDEVICES_MULTIQUEUE is not set
458# CONFIG_DUMMY is not set
459# CONFIG_BONDING is not set
460# CONFIG_MACVLAN is not set
461# CONFIG_EQUALIZER is not set
462# CONFIG_TUN is not set
463# CONFIG_VETH is not set
464# CONFIG_IP1000 is not set
465# CONFIG_ARCNET is not set
466# CONFIG_NET_ETHERNET is not set
467CONFIG_IBM_NEW_EMAC_ZMII=y
468CONFIG_IBM_NEW_EMAC_RGMII=y
469CONFIG_IBM_NEW_EMAC_EMAC4=y
470CONFIG_NETDEV_1000=y
471# CONFIG_ACENIC is not set
472# CONFIG_DL2K is not set
473# CONFIG_E1000 is not set
474# CONFIG_E1000E is not set
475# CONFIG_NS83820 is not set
476# CONFIG_HAMACHI is not set
477# CONFIG_YELLOWFIN is not set
478# CONFIG_R8169 is not set
479# CONFIG_SIS190 is not set
480# CONFIG_SKGE is not set
481# CONFIG_SKY2 is not set
482# CONFIG_SK98LIN is not set
483# CONFIG_VIA_VELOCITY is not set
484# CONFIG_TIGON3 is not set
485# CONFIG_BNX2 is not set
486# CONFIG_QLA3XXX is not set
487# CONFIG_ATL1 is not set
488CONFIG_NETDEV_10000=y
489# CONFIG_CHELSIO_T1 is not set
490# CONFIG_CHELSIO_T3 is not set
491# CONFIG_IXGBE is not set
492# CONFIG_IXGB is not set
493# CONFIG_S2IO is not set
494# CONFIG_MYRI10GE is not set
495# CONFIG_NETXEN_NIC is not set
496# CONFIG_NIU is not set
497# CONFIG_MLX4_CORE is not set
498# CONFIG_TEHUTI is not set
499# CONFIG_TR is not set
500
501#
502# Wireless LAN
503#
504# CONFIG_WLAN_PRE80211 is not set
505# CONFIG_WLAN_80211 is not set
506# CONFIG_WAN is not set
507# CONFIG_FDDI is not set
508# CONFIG_HIPPI is not set
509# CONFIG_PPP is not set
510# CONFIG_SLIP is not set
511# CONFIG_SHAPER is not set
512# CONFIG_NETCONSOLE is not set
513# CONFIG_NETPOLL is not set
514# CONFIG_NET_POLL_CONTROLLER is not set
515# CONFIG_ISDN is not set
516# CONFIG_PHONE is not set
517
518#
519# Input device support
520#
521# CONFIG_INPUT is not set
522
523#
524# Hardware I/O ports
525#
526# CONFIG_SERIO is not set
527# CONFIG_GAMEPORT is not set
528
529#
530# Character devices
531#
532# CONFIG_VT is not set
533# CONFIG_SERIAL_NONSTANDARD is not set
534
535#
536# Serial drivers
537#
538CONFIG_SERIAL_8250=y
539CONFIG_SERIAL_8250_CONSOLE=y
540# CONFIG_SERIAL_8250_PCI is not set
541CONFIG_SERIAL_8250_NR_UARTS=4
542CONFIG_SERIAL_8250_RUNTIME_UARTS=4
543CONFIG_SERIAL_8250_EXTENDED=y
544# CONFIG_SERIAL_8250_MANY_PORTS is not set
545CONFIG_SERIAL_8250_SHARE_IRQ=y
546# CONFIG_SERIAL_8250_DETECT_IRQ is not set
547# CONFIG_SERIAL_8250_RSA is not set
548
549#
550# Non-8250 serial port support
551#
552# CONFIG_SERIAL_UARTLITE is not set
553CONFIG_SERIAL_CORE=y
554CONFIG_SERIAL_CORE_CONSOLE=y
555# CONFIG_SERIAL_JSM is not set
556CONFIG_SERIAL_OF_PLATFORM=y
557CONFIG_UNIX98_PTYS=y
558CONFIG_LEGACY_PTYS=y
559CONFIG_LEGACY_PTY_COUNT=256
560# CONFIG_IPMI_HANDLER is not set
561# CONFIG_HW_RANDOM is not set
562# CONFIG_NVRAM is not set
563# CONFIG_GEN_RTC is not set
564# CONFIG_R3964 is not set
565# CONFIG_APPLICOM is not set
566# CONFIG_RAW_DRIVER is not set
567# CONFIG_TCG_TPM is not set
568CONFIG_DEVPORT=y
569# CONFIG_I2C is not set
570
571#
572# SPI support
573#
574# CONFIG_SPI is not set
575# CONFIG_SPI_MASTER is not set
576# CONFIG_W1 is not set
577# CONFIG_POWER_SUPPLY is not set
578# CONFIG_HWMON is not set
579# CONFIG_WATCHDOG is not set
580
581#
582# Sonics Silicon Backplane
583#
584CONFIG_SSB_POSSIBLE=y
585# CONFIG_SSB is not set
586
587#
588# Multifunction device drivers
589#
590# CONFIG_MFD_SM501 is not set
591
592#
593# Multimedia devices
594#
595# CONFIG_VIDEO_DEV is not set
596# CONFIG_DVB_CORE is not set
597CONFIG_DAB=y
598
599#
600# Graphics support
601#
602# CONFIG_AGP is not set
603# CONFIG_DRM is not set
604# CONFIG_VGASTATE is not set
605CONFIG_VIDEO_OUTPUT_CONTROL=m
606# CONFIG_FB is not set
607# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
608
609#
610# Display device support
611#
612# CONFIG_DISPLAY_SUPPORT is not set
613
614#
615# Sound
616#
617# CONFIG_SOUND is not set
618CONFIG_USB_SUPPORT=y
619CONFIG_USB_ARCH_HAS_HCD=y
620CONFIG_USB_ARCH_HAS_OHCI=y
621CONFIG_USB_ARCH_HAS_EHCI=y
622# CONFIG_USB is not set
623
624#
625# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
626#
627
628#
629# USB Gadget Support
630#
631# CONFIG_USB_GADGET is not set
632# CONFIG_MMC is not set
633# CONFIG_NEW_LEDS is not set
634# CONFIG_INFINIBAND is not set
635# CONFIG_EDAC is not set
636# CONFIG_RTC_CLASS is not set
637
638#
639# Userspace I/O
640#
641# CONFIG_UIO is not set
642
643#
644# File systems
645#
646CONFIG_EXT2_FS=y
647# CONFIG_EXT2_FS_XATTR is not set
648# CONFIG_EXT2_FS_XIP is not set
649# CONFIG_EXT3_FS is not set
650# CONFIG_EXT4DEV_FS is not set
651# CONFIG_REISERFS_FS is not set
652# CONFIG_JFS_FS is not set
653# CONFIG_FS_POSIX_ACL is not set
654# CONFIG_XFS_FS is not set
655# CONFIG_GFS2_FS is not set
656# CONFIG_OCFS2_FS is not set
657# CONFIG_MINIX_FS is not set
658# CONFIG_ROMFS_FS is not set
659CONFIG_INOTIFY=y
660CONFIG_INOTIFY_USER=y
661# CONFIG_QUOTA is not set
662CONFIG_DNOTIFY=y
663# CONFIG_AUTOFS_FS is not set
664# CONFIG_AUTOFS4_FS is not set
665# CONFIG_FUSE_FS is not set
666
667#
668# CD-ROM/DVD Filesystems
669#
670# CONFIG_ISO9660_FS is not set
671# CONFIG_UDF_FS is not set
672
673#
674# DOS/FAT/NT Filesystems
675#
676# CONFIG_MSDOS_FS is not set
677# CONFIG_VFAT_FS is not set
678# CONFIG_NTFS_FS is not set
679
680#
681# Pseudo filesystems
682#
683CONFIG_PROC_FS=y
684CONFIG_PROC_KCORE=y
685CONFIG_PROC_SYSCTL=y
686CONFIG_SYSFS=y
687CONFIG_TMPFS=y
688# CONFIG_TMPFS_POSIX_ACL is not set
689# CONFIG_HUGETLB_PAGE is not set
690# CONFIG_CONFIGFS_FS is not set
691
692#
693# Miscellaneous filesystems
694#
695# CONFIG_ADFS_FS is not set
696# CONFIG_AFFS_FS is not set
697# CONFIG_HFS_FS is not set
698# CONFIG_HFSPLUS_FS is not set
699# CONFIG_BEFS_FS is not set
700# CONFIG_BFS_FS is not set
701# CONFIG_EFS_FS is not set
702CONFIG_JFFS2_FS=y
703CONFIG_JFFS2_FS_DEBUG=0
704CONFIG_JFFS2_FS_WRITEBUFFER=y
705# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
706# CONFIG_JFFS2_SUMMARY is not set
707# CONFIG_JFFS2_FS_XATTR is not set
708# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
709CONFIG_JFFS2_ZLIB=y
710# CONFIG_JFFS2_LZO is not set
711CONFIG_JFFS2_RTIME=y
712# CONFIG_JFFS2_RUBIN is not set
713CONFIG_CRAMFS=y
714# CONFIG_VXFS_FS is not set
715# CONFIG_HPFS_FS is not set
716# CONFIG_QNX4FS_FS is not set
717# CONFIG_SYSV_FS is not set
718# CONFIG_UFS_FS is not set
719CONFIG_NETWORK_FILESYSTEMS=y
720CONFIG_NFS_FS=y
721CONFIG_NFS_V3=y
722# CONFIG_NFS_V3_ACL is not set
723# CONFIG_NFS_V4 is not set
724# CONFIG_NFS_DIRECTIO is not set
725# CONFIG_NFSD is not set
726CONFIG_ROOT_NFS=y
727CONFIG_LOCKD=y
728CONFIG_LOCKD_V4=y
729CONFIG_NFS_COMMON=y
730CONFIG_SUNRPC=y
731# CONFIG_SUNRPC_BIND34 is not set
732# CONFIG_RPCSEC_GSS_KRB5 is not set
733# CONFIG_RPCSEC_GSS_SPKM3 is not set
734# CONFIG_SMB_FS is not set
735# CONFIG_CIFS is not set
736# CONFIG_NCP_FS is not set
737# CONFIG_CODA_FS is not set
738# CONFIG_AFS_FS is not set
739
740#
741# Partition Types
742#
743# CONFIG_PARTITION_ADVANCED is not set
744CONFIG_MSDOS_PARTITION=y
745# CONFIG_NLS is not set
746# CONFIG_DLM is not set
747# CONFIG_UCC_SLOW is not set
748
749#
750# Library routines
751#
752CONFIG_BITREVERSE=y
753# CONFIG_CRC_CCITT is not set
754# CONFIG_CRC16 is not set
755# CONFIG_CRC_ITU_T is not set
756CONFIG_CRC32=y
757# CONFIG_CRC7 is not set
758# CONFIG_LIBCRC32C is not set
759CONFIG_ZLIB_INFLATE=y
760CONFIG_ZLIB_DEFLATE=y
761CONFIG_PLIST=y
762CONFIG_HAS_IOMEM=y
763CONFIG_HAS_IOPORT=y
764CONFIG_HAS_DMA=y
765CONFIG_INSTRUMENTATION=y
766# CONFIG_PROFILING is not set
767# CONFIG_KPROBES is not set
768# CONFIG_MARKERS is not set
769
770#
771# Kernel hacking
772#
773# CONFIG_PRINTK_TIME is not set
774CONFIG_ENABLE_WARN_DEPRECATED=y
775CONFIG_ENABLE_MUST_CHECK=y
776CONFIG_MAGIC_SYSRQ=y
777# CONFIG_UNUSED_SYMBOLS is not set
778# CONFIG_DEBUG_FS is not set
779# CONFIG_HEADERS_CHECK is not set
780CONFIG_DEBUG_KERNEL=y
781# CONFIG_DEBUG_SHIRQ is not set
782CONFIG_DETECT_SOFTLOCKUP=y
783CONFIG_SCHED_DEBUG=y
784# CONFIG_SCHEDSTATS is not set
785# CONFIG_TIMER_STATS is not set
786# CONFIG_SLUB_DEBUG_ON is not set
787# CONFIG_DEBUG_RT_MUTEXES is not set
788# CONFIG_RT_MUTEX_TESTER is not set
789# CONFIG_DEBUG_SPINLOCK is not set
790# CONFIG_DEBUG_MUTEXES is not set
791# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
792# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
793# CONFIG_DEBUG_KOBJECT is not set
794# CONFIG_DEBUG_BUGVERBOSE is not set
795# CONFIG_DEBUG_INFO is not set
796# CONFIG_DEBUG_VM is not set
797# CONFIG_DEBUG_LIST is not set
798# CONFIG_DEBUG_SG is not set
799CONFIG_FORCED_INLINING=y
800# CONFIG_BOOT_PRINTK_DELAY is not set
801# CONFIG_RCU_TORTURE_TEST is not set
802# CONFIG_FAULT_INJECTION is not set
803# CONFIG_SAMPLES is not set
804# CONFIG_DEBUG_STACKOVERFLOW is not set
805# CONFIG_DEBUG_STACK_USAGE is not set
806# CONFIG_DEBUG_PAGEALLOC is not set
807CONFIG_DEBUGGER=y
808# CONFIG_KGDB is not set
809# CONFIG_XMON is not set
810# CONFIG_BDI_SWITCH is not set
811CONFIG_PPC_EARLY_DEBUG=y
812# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
813# CONFIG_PPC_EARLY_DEBUG_G5 is not set
814# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
815# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
816# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
817# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
818# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
819# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
820CONFIG_PPC_EARLY_DEBUG_44x=y
821# CONFIG_PPC_EARLY_DEBUG_40x is not set
822# CONFIG_PPC_EARLY_DEBUG_CPM is not set
823CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300
824CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x1
825
826#
827# Security options
828#
829# CONFIG_KEYS is not set
830# CONFIG_SECURITY is not set
831# CONFIG_SECURITY_FILE_CAPABILITIES is not set
832CONFIG_CRYPTO=y
833CONFIG_CRYPTO_ALGAPI=y
834CONFIG_CRYPTO_BLKCIPHER=y
835CONFIG_CRYPTO_MANAGER=y
836# CONFIG_CRYPTO_HMAC is not set
837# CONFIG_CRYPTO_XCBC is not set
838# CONFIG_CRYPTO_NULL is not set
839# CONFIG_CRYPTO_MD4 is not set
840CONFIG_CRYPTO_MD5=y
841# CONFIG_CRYPTO_SHA1 is not set
842# CONFIG_CRYPTO_SHA256 is not set
843# CONFIG_CRYPTO_SHA512 is not set
844# CONFIG_CRYPTO_WP512 is not set
845# CONFIG_CRYPTO_TGR192 is not set
846# CONFIG_CRYPTO_GF128MUL is not set
847CONFIG_CRYPTO_ECB=y
848CONFIG_CRYPTO_CBC=y
849CONFIG_CRYPTO_PCBC=y
850# CONFIG_CRYPTO_LRW is not set
851# CONFIG_CRYPTO_XTS is not set
852# CONFIG_CRYPTO_CRYPTD is not set
853CONFIG_CRYPTO_DES=y
854# CONFIG_CRYPTO_FCRYPT is not set
855# CONFIG_CRYPTO_BLOWFISH is not set
856# CONFIG_CRYPTO_TWOFISH is not set
857# CONFIG_CRYPTO_SERPENT is not set
858# CONFIG_CRYPTO_AES is not set
859# CONFIG_CRYPTO_CAST5 is not set
860# CONFIG_CRYPTO_CAST6 is not set
861# CONFIG_CRYPTO_TEA is not set
862# CONFIG_CRYPTO_ARC4 is not set
863# CONFIG_CRYPTO_KHAZAD is not set
864# CONFIG_CRYPTO_ANUBIS is not set
865# CONFIG_CRYPTO_SEED is not set
866# CONFIG_CRYPTO_DEFLATE is not set
867# CONFIG_CRYPTO_MICHAEL_MIC is not set
868# CONFIG_CRYPTO_CRC32C is not set
869# CONFIG_CRYPTO_CAMELLIA is not set
870# CONFIG_CRYPTO_TEST is not set
871# CONFIG_CRYPTO_AUTHENC is not set
872CONFIG_CRYPTO_HW=y
873# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/configs/sequoia_defconfig b/arch/powerpc/configs/sequoia_defconfig
index bc3c086ddfc0..2bb4df82fbda 100644
--- a/arch/powerpc/configs/sequoia_defconfig
+++ b/arch/powerpc/configs/sequoia_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc4 3# Linux kernel version: 2.6.24-rc6
4# Thu Dec 6 16:49:17 2007 4# Mon Dec 24 11:23:22 2007
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -129,6 +129,7 @@ CONFIG_DEFAULT_AS=y
129# CONFIG_DEFAULT_CFQ is not set 129# CONFIG_DEFAULT_CFQ is not set
130# CONFIG_DEFAULT_NOOP is not set 130# CONFIG_DEFAULT_NOOP is not set
131CONFIG_DEFAULT_IOSCHED="anticipatory" 131CONFIG_DEFAULT_IOSCHED="anticipatory"
132# CONFIG_PPC4xx_PCI_EXPRESS is not set
132 133
133# 134#
134# Platform support 135# Platform support
@@ -141,8 +142,10 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
141# CONFIG_BAMBOO is not set 142# CONFIG_BAMBOO is not set
142# CONFIG_EBONY is not set 143# CONFIG_EBONY is not set
143CONFIG_SEQUOIA=y 144CONFIG_SEQUOIA=y
145# CONFIG_TAISHAN is not set
146# CONFIG_KATMAI is not set
147# CONFIG_RAINIER is not set
144CONFIG_440EPX=y 148CONFIG_440EPX=y
145CONFIG_440A=y
146# CONFIG_MPIC is not set 149# CONFIG_MPIC is not set
147# CONFIG_MPIC_WEIRD is not set 150# CONFIG_MPIC_WEIRD is not set
148# CONFIG_PPC_I8259 is not set 151# CONFIG_PPC_I8259 is not set
@@ -811,6 +814,7 @@ CONFIG_PPC_EARLY_DEBUG=y
811# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set 814# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
812# CONFIG_PPC_EARLY_DEBUG_BEAT is not set 815# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
813CONFIG_PPC_EARLY_DEBUG_44x=y 816CONFIG_PPC_EARLY_DEBUG_44x=y
817# CONFIG_PPC_EARLY_DEBUG_40x is not set
814# CONFIG_PPC_EARLY_DEBUG_CPM is not set 818# CONFIG_PPC_EARLY_DEBUG_CPM is not set
815CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300 819CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300
816CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x1 820CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x1
diff --git a/arch/powerpc/configs/taishan_defconfig b/arch/powerpc/configs/taishan_defconfig
new file mode 100644
index 000000000000..ade84b92877e
--- /dev/null
+++ b/arch/powerpc/configs/taishan_defconfig
@@ -0,0 +1,790 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc6
4# Mon Dec 24 11:23:39 2007
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15CONFIG_44x=y
16# CONFIG_E200 is not set
17CONFIG_4xx=y
18CONFIG_BOOKE=y
19CONFIG_PTE_64BIT=y
20CONFIG_PHYS_64BIT=y
21# CONFIG_PPC_MM_SLICES is not set
22CONFIG_NOT_COHERENT_CACHE=y
23CONFIG_PPC32=y
24CONFIG_WORD_SIZE=32
25CONFIG_PPC_MERGE=y
26CONFIG_MMU=y
27CONFIG_GENERIC_CMOS_UPDATE=y
28CONFIG_GENERIC_TIME=y
29CONFIG_GENERIC_TIME_VSYSCALL=y
30CONFIG_GENERIC_CLOCKEVENTS=y
31CONFIG_GENERIC_HARDIRQS=y
32CONFIG_IRQ_PER_CPU=y
33CONFIG_RWSEM_XCHGADD_ALGORITHM=y
34CONFIG_ARCH_HAS_ILOG2_U32=y
35CONFIG_GENERIC_HWEIGHT=y
36CONFIG_GENERIC_CALIBRATE_DELAY=y
37CONFIG_GENERIC_FIND_NEXT_BIT=y
38# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
39CONFIG_PPC=y
40CONFIG_EARLY_PRINTK=y
41CONFIG_GENERIC_NVRAM=y
42CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
43CONFIG_ARCH_MAY_HAVE_PC_FDC=y
44CONFIG_PPC_OF=y
45CONFIG_OF=y
46CONFIG_PPC_UDBG_16550=y
47# CONFIG_GENERIC_TBSYNC is not set
48CONFIG_AUDIT_ARCH=y
49CONFIG_GENERIC_BUG=y
50# CONFIG_DEFAULT_UIMAGE is not set
51CONFIG_PPC_DCR_NATIVE=y
52# CONFIG_PPC_DCR_MMIO is not set
53CONFIG_PPC_DCR=y
54CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
55
56#
57# General setup
58#
59CONFIG_EXPERIMENTAL=y
60CONFIG_BROKEN_ON_SMP=y
61CONFIG_INIT_ENV_ARG_LIMIT=32
62CONFIG_LOCALVERSION=""
63CONFIG_LOCALVERSION_AUTO=y
64CONFIG_SWAP=y
65CONFIG_SYSVIPC=y
66CONFIG_SYSVIPC_SYSCTL=y
67CONFIG_POSIX_MQUEUE=y
68# CONFIG_BSD_PROCESS_ACCT is not set
69# CONFIG_TASKSTATS is not set
70# CONFIG_USER_NS is not set
71# CONFIG_PID_NS is not set
72# CONFIG_AUDIT is not set
73# CONFIG_IKCONFIG is not set
74CONFIG_LOG_BUF_SHIFT=14
75# CONFIG_CGROUPS is not set
76CONFIG_FAIR_GROUP_SCHED=y
77CONFIG_FAIR_USER_SCHED=y
78# CONFIG_FAIR_CGROUP_SCHED is not set
79CONFIG_SYSFS_DEPRECATED=y
80# CONFIG_RELAY is not set
81CONFIG_BLK_DEV_INITRD=y
82CONFIG_INITRAMFS_SOURCE=""
83# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
84CONFIG_SYSCTL=y
85CONFIG_EMBEDDED=y
86CONFIG_SYSCTL_SYSCALL=y
87CONFIG_KALLSYMS=y
88# CONFIG_KALLSYMS_ALL is not set
89# CONFIG_KALLSYMS_EXTRA_PASS is not set
90CONFIG_HOTPLUG=y
91CONFIG_PRINTK=y
92CONFIG_BUG=y
93CONFIG_ELF_CORE=y
94CONFIG_BASE_FULL=y
95CONFIG_FUTEX=y
96CONFIG_ANON_INODES=y
97CONFIG_EPOLL=y
98CONFIG_SIGNALFD=y
99CONFIG_EVENTFD=y
100CONFIG_SHMEM=y
101CONFIG_VM_EVENT_COUNTERS=y
102CONFIG_SLUB_DEBUG=y
103# CONFIG_SLAB is not set
104CONFIG_SLUB=y
105# CONFIG_SLOB is not set
106CONFIG_RT_MUTEXES=y
107# CONFIG_TINY_SHMEM is not set
108CONFIG_BASE_SMALL=0
109CONFIG_MODULES=y
110CONFIG_MODULE_UNLOAD=y
111# CONFIG_MODULE_FORCE_UNLOAD is not set
112# CONFIG_MODVERSIONS is not set
113# CONFIG_MODULE_SRCVERSION_ALL is not set
114CONFIG_KMOD=y
115CONFIG_BLOCK=y
116CONFIG_LBD=y
117# CONFIG_BLK_DEV_IO_TRACE is not set
118# CONFIG_LSF is not set
119# CONFIG_BLK_DEV_BSG is not set
120
121#
122# IO Schedulers
123#
124CONFIG_IOSCHED_NOOP=y
125CONFIG_IOSCHED_AS=y
126CONFIG_IOSCHED_DEADLINE=y
127CONFIG_IOSCHED_CFQ=y
128CONFIG_DEFAULT_AS=y
129# CONFIG_DEFAULT_DEADLINE is not set
130# CONFIG_DEFAULT_CFQ is not set
131# CONFIG_DEFAULT_NOOP is not set
132CONFIG_DEFAULT_IOSCHED="anticipatory"
133# CONFIG_PPC4xx_PCI_EXPRESS is not set
134
135#
136# Platform support
137#
138# CONFIG_PPC_MPC52xx is not set
139# CONFIG_PPC_MPC5200 is not set
140# CONFIG_PPC_CELL is not set
141# CONFIG_PPC_CELL_NATIVE is not set
142# CONFIG_PQ2ADS is not set
143# CONFIG_BAMBOO is not set
144# CONFIG_EBONY is not set
145# CONFIG_SEQUOIA is not set
146CONFIG_TAISHAN=y
147# CONFIG_KATMAI is not set
148# CONFIG_RAINIER is not set
149CONFIG_440GX=y
150# CONFIG_MPIC is not set
151# CONFIG_MPIC_WEIRD is not set
152# CONFIG_PPC_I8259 is not set
153# CONFIG_PPC_RTAS is not set
154# CONFIG_MMIO_NVRAM is not set
155# CONFIG_PPC_MPC106 is not set
156# CONFIG_PPC_970_NAP is not set
157# CONFIG_PPC_INDIRECT_IO is not set
158# CONFIG_GENERIC_IOMAP is not set
159# CONFIG_CPU_FREQ is not set
160# CONFIG_CPM2 is not set
161# CONFIG_FSL_ULI1575 is not set
162
163#
164# Kernel options
165#
166# CONFIG_HIGHMEM is not set
167# CONFIG_TICK_ONESHOT is not set
168# CONFIG_NO_HZ is not set
169# CONFIG_HIGH_RES_TIMERS is not set
170CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
171# CONFIG_HZ_100 is not set
172CONFIG_HZ_250=y
173# CONFIG_HZ_300 is not set
174# CONFIG_HZ_1000 is not set
175CONFIG_HZ=250
176CONFIG_PREEMPT_NONE=y
177# CONFIG_PREEMPT_VOLUNTARY is not set
178# CONFIG_PREEMPT is not set
179CONFIG_BINFMT_ELF=y
180# CONFIG_BINFMT_MISC is not set
181# CONFIG_MATH_EMULATION is not set
182CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
183CONFIG_ARCH_FLATMEM_ENABLE=y
184CONFIG_ARCH_POPULATES_NODE_MAP=y
185CONFIG_SELECT_MEMORY_MODEL=y
186CONFIG_FLATMEM_MANUAL=y
187# CONFIG_DISCONTIGMEM_MANUAL is not set
188# CONFIG_SPARSEMEM_MANUAL is not set
189CONFIG_FLATMEM=y
190CONFIG_FLAT_NODE_MEM_MAP=y
191# CONFIG_SPARSEMEM_STATIC is not set
192# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
193CONFIG_SPLIT_PTLOCK_CPUS=4
194CONFIG_RESOURCES_64BIT=y
195CONFIG_ZONE_DMA_FLAG=1
196CONFIG_BOUNCE=y
197CONFIG_VIRT_TO_BUS=y
198CONFIG_PROC_DEVICETREE=y
199CONFIG_CMDLINE_BOOL=y
200CONFIG_CMDLINE=""
201CONFIG_SECCOMP=y
202CONFIG_WANT_DEVICE_TREE=y
203CONFIG_DEVICE_TREE="taishan.dts"
204CONFIG_ISA_DMA_API=y
205
206#
207# Bus options
208#
209CONFIG_ZONE_DMA=y
210CONFIG_PPC_INDIRECT_PCI=y
211CONFIG_PCI=y
212CONFIG_PCI_DOMAINS=y
213CONFIG_PCI_SYSCALL=y
214# CONFIG_PCIEPORTBUS is not set
215CONFIG_ARCH_SUPPORTS_MSI=y
216# CONFIG_PCI_MSI is not set
217CONFIG_PCI_LEGACY=y
218# CONFIG_PCI_DEBUG is not set
219# CONFIG_PCCARD is not set
220# CONFIG_HOTPLUG_PCI is not set
221
222#
223# Advanced setup
224#
225# CONFIG_ADVANCED_OPTIONS is not set
226
227#
228# Default settings for advanced configuration options are used
229#
230CONFIG_HIGHMEM_START=0xfe000000
231CONFIG_LOWMEM_SIZE=0x30000000
232CONFIG_KERNEL_START=0xc0000000
233CONFIG_TASK_SIZE=0xc0000000
234CONFIG_CONSISTENT_START=0xff100000
235CONFIG_CONSISTENT_SIZE=0x00200000
236CONFIG_BOOT_LOAD=0x01000000
237
238#
239# Networking
240#
241CONFIG_NET=y
242
243#
244# Networking options
245#
246CONFIG_PACKET=y
247# CONFIG_PACKET_MMAP is not set
248CONFIG_UNIX=y
249# CONFIG_NET_KEY is not set
250CONFIG_INET=y
251# CONFIG_IP_MULTICAST is not set
252# CONFIG_IP_ADVANCED_ROUTER is not set
253CONFIG_IP_FIB_HASH=y
254CONFIG_IP_PNP=y
255CONFIG_IP_PNP_DHCP=y
256CONFIG_IP_PNP_BOOTP=y
257# CONFIG_IP_PNP_RARP is not set
258# CONFIG_NET_IPIP is not set
259# CONFIG_NET_IPGRE is not set
260# CONFIG_ARPD is not set
261# CONFIG_SYN_COOKIES is not set
262# CONFIG_INET_AH is not set
263# CONFIG_INET_ESP is not set
264# CONFIG_INET_IPCOMP is not set
265# CONFIG_INET_XFRM_TUNNEL is not set
266# CONFIG_INET_TUNNEL is not set
267# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
268# CONFIG_INET_XFRM_MODE_TUNNEL is not set
269# CONFIG_INET_XFRM_MODE_BEET is not set
270# CONFIG_INET_LRO is not set
271CONFIG_INET_DIAG=y
272CONFIG_INET_TCP_DIAG=y
273# CONFIG_TCP_CONG_ADVANCED is not set
274CONFIG_TCP_CONG_CUBIC=y
275CONFIG_DEFAULT_TCP_CONG="cubic"
276# CONFIG_TCP_MD5SIG is not set
277# CONFIG_IPV6 is not set
278# CONFIG_INET6_XFRM_TUNNEL is not set
279# CONFIG_INET6_TUNNEL is not set
280# CONFIG_NETWORK_SECMARK is not set
281# CONFIG_NETFILTER is not set
282# CONFIG_IP_DCCP is not set
283# CONFIG_IP_SCTP is not set
284# CONFIG_TIPC is not set
285# CONFIG_ATM is not set
286# CONFIG_BRIDGE is not set
287# CONFIG_VLAN_8021Q is not set
288# CONFIG_DECNET is not set
289# CONFIG_LLC2 is not set
290# CONFIG_IPX is not set
291# CONFIG_ATALK is not set
292# CONFIG_X25 is not set
293# CONFIG_LAPB is not set
294# CONFIG_ECONET is not set
295# CONFIG_WAN_ROUTER is not set
296# CONFIG_NET_SCHED is not set
297
298#
299# Network testing
300#
301# CONFIG_NET_PKTGEN is not set
302# CONFIG_HAMRADIO is not set
303# CONFIG_IRDA is not set
304# CONFIG_BT is not set
305# CONFIG_AF_RXRPC is not set
306
307#
308# Wireless
309#
310# CONFIG_CFG80211 is not set
311# CONFIG_WIRELESS_EXT is not set
312# CONFIG_MAC80211 is not set
313# CONFIG_IEEE80211 is not set
314# CONFIG_RFKILL is not set
315# CONFIG_NET_9P is not set
316
317#
318# Device Drivers
319#
320
321#
322# Generic Driver Options
323#
324CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
325CONFIG_STANDALONE=y
326CONFIG_PREVENT_FIRMWARE_BUILD=y
327CONFIG_FW_LOADER=y
328# CONFIG_DEBUG_DRIVER is not set
329# CONFIG_DEBUG_DEVRES is not set
330# CONFIG_SYS_HYPERVISOR is not set
331CONFIG_CONNECTOR=y
332CONFIG_PROC_EVENTS=y
333# CONFIG_MTD is not set
334CONFIG_OF_DEVICE=y
335# CONFIG_PARPORT is not set
336CONFIG_BLK_DEV=y
337# CONFIG_BLK_DEV_FD is not set
338# CONFIG_BLK_CPQ_DA is not set
339# CONFIG_BLK_CPQ_CISS_DA is not set
340# CONFIG_BLK_DEV_DAC960 is not set
341# CONFIG_BLK_DEV_UMEM is not set
342# CONFIG_BLK_DEV_COW_COMMON is not set
343# CONFIG_BLK_DEV_LOOP is not set
344# CONFIG_BLK_DEV_NBD is not set
345# CONFIG_BLK_DEV_SX8 is not set
346CONFIG_BLK_DEV_RAM=y
347CONFIG_BLK_DEV_RAM_COUNT=16
348CONFIG_BLK_DEV_RAM_SIZE=35000
349CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
350# CONFIG_CDROM_PKTCDVD is not set
351# CONFIG_ATA_OVER_ETH is not set
352# CONFIG_XILINX_SYSACE is not set
353CONFIG_MISC_DEVICES=y
354# CONFIG_PHANTOM is not set
355# CONFIG_EEPROM_93CX6 is not set
356# CONFIG_SGI_IOC4 is not set
357# CONFIG_TIFM_CORE is not set
358# CONFIG_IDE is not set
359
360#
361# SCSI device support
362#
363# CONFIG_RAID_ATTRS is not set
364# CONFIG_SCSI is not set
365# CONFIG_SCSI_DMA is not set
366# CONFIG_SCSI_NETLINK is not set
367# CONFIG_ATA is not set
368# CONFIG_MD is not set
369# CONFIG_FUSION is not set
370
371#
372# IEEE 1394 (FireWire) support
373#
374# CONFIG_FIREWIRE is not set
375# CONFIG_IEEE1394 is not set
376# CONFIG_I2O is not set
377CONFIG_MACINTOSH_DRIVERS=y
378# CONFIG_MAC_EMUMOUSEBTN is not set
379# CONFIG_WINDFARM is not set
380CONFIG_NETDEVICES=y
381# CONFIG_NETDEVICES_MULTIQUEUE is not set
382# CONFIG_DUMMY is not set
383# CONFIG_BONDING is not set
384# CONFIG_MACVLAN is not set
385# CONFIG_EQUALIZER is not set
386# CONFIG_TUN is not set
387# CONFIG_VETH is not set
388# CONFIG_IP1000 is not set
389# CONFIG_ARCNET is not set
390# CONFIG_PHYLIB is not set
391CONFIG_NET_ETHERNET=y
392# CONFIG_MII is not set
393# CONFIG_HAPPYMEAL is not set
394# CONFIG_SUNGEM is not set
395# CONFIG_CASSINI is not set
396# CONFIG_NET_VENDOR_3COM is not set
397# CONFIG_NET_TULIP is not set
398# CONFIG_HP100 is not set
399CONFIG_IBM_NEW_EMAC=y
400CONFIG_IBM_NEW_EMAC_RXB=128
401CONFIG_IBM_NEW_EMAC_TXB=64
402CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
403CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
404CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
405# CONFIG_IBM_NEW_EMAC_DEBUG is not set
406CONFIG_IBM_NEW_EMAC_ZMII=y
407CONFIG_IBM_NEW_EMAC_RGMII=y
408CONFIG_IBM_NEW_EMAC_TAH=y
409CONFIG_IBM_NEW_EMAC_EMAC4=y
410# CONFIG_NET_PCI is not set
411# CONFIG_B44 is not set
412CONFIG_NETDEV_1000=y
413# CONFIG_ACENIC is not set
414# CONFIG_DL2K is not set
415# CONFIG_E1000 is not set
416# CONFIG_E1000E is not set
417# CONFIG_NS83820 is not set
418# CONFIG_HAMACHI is not set
419# CONFIG_YELLOWFIN is not set
420# CONFIG_R8169 is not set
421# CONFIG_SIS190 is not set
422# CONFIG_SKGE is not set
423# CONFIG_SKY2 is not set
424# CONFIG_SK98LIN is not set
425# CONFIG_VIA_VELOCITY is not set
426# CONFIG_TIGON3 is not set
427# CONFIG_BNX2 is not set
428# CONFIG_QLA3XXX is not set
429# CONFIG_ATL1 is not set
430CONFIG_NETDEV_10000=y
431# CONFIG_CHELSIO_T1 is not set
432# CONFIG_CHELSIO_T3 is not set
433# CONFIG_IXGBE is not set
434# CONFIG_IXGB is not set
435# CONFIG_S2IO is not set
436# CONFIG_MYRI10GE is not set
437# CONFIG_NETXEN_NIC is not set
438# CONFIG_NIU is not set
439# CONFIG_MLX4_CORE is not set
440# CONFIG_TEHUTI is not set
441# CONFIG_TR is not set
442
443#
444# Wireless LAN
445#
446# CONFIG_WLAN_PRE80211 is not set
447# CONFIG_WLAN_80211 is not set
448# CONFIG_WAN is not set
449# CONFIG_FDDI is not set
450# CONFIG_HIPPI is not set
451# CONFIG_PPP is not set
452# CONFIG_SLIP is not set
453# CONFIG_SHAPER is not set
454# CONFIG_NETCONSOLE is not set
455# CONFIG_NETPOLL is not set
456# CONFIG_NET_POLL_CONTROLLER is not set
457# CONFIG_ISDN is not set
458# CONFIG_PHONE is not set
459
460#
461# Input device support
462#
463# CONFIG_INPUT is not set
464
465#
466# Hardware I/O ports
467#
468# CONFIG_SERIO is not set
469# CONFIG_GAMEPORT is not set
470
471#
472# Character devices
473#
474# CONFIG_VT is not set
475# CONFIG_SERIAL_NONSTANDARD is not set
476
477#
478# Serial drivers
479#
480CONFIG_SERIAL_8250=y
481CONFIG_SERIAL_8250_CONSOLE=y
482# CONFIG_SERIAL_8250_PCI is not set
483CONFIG_SERIAL_8250_NR_UARTS=4
484CONFIG_SERIAL_8250_RUNTIME_UARTS=4
485CONFIG_SERIAL_8250_EXTENDED=y
486# CONFIG_SERIAL_8250_MANY_PORTS is not set
487CONFIG_SERIAL_8250_SHARE_IRQ=y
488# CONFIG_SERIAL_8250_DETECT_IRQ is not set
489# CONFIG_SERIAL_8250_RSA is not set
490
491#
492# Non-8250 serial port support
493#
494# CONFIG_SERIAL_UARTLITE is not set
495CONFIG_SERIAL_CORE=y
496CONFIG_SERIAL_CORE_CONSOLE=y
497# CONFIG_SERIAL_JSM is not set
498CONFIG_SERIAL_OF_PLATFORM=y
499CONFIG_UNIX98_PTYS=y
500CONFIG_LEGACY_PTYS=y
501CONFIG_LEGACY_PTY_COUNT=256
502# CONFIG_IPMI_HANDLER is not set
503# CONFIG_HW_RANDOM is not set
504# CONFIG_NVRAM is not set
505# CONFIG_GEN_RTC is not set
506# CONFIG_R3964 is not set
507# CONFIG_APPLICOM is not set
508# CONFIG_RAW_DRIVER is not set
509# CONFIG_TCG_TPM is not set
510CONFIG_DEVPORT=y
511# CONFIG_I2C is not set
512
513#
514# SPI support
515#
516# CONFIG_SPI is not set
517# CONFIG_SPI_MASTER is not set
518# CONFIG_W1 is not set
519# CONFIG_POWER_SUPPLY is not set
520# CONFIG_HWMON is not set
521# CONFIG_WATCHDOG is not set
522
523#
524# Sonics Silicon Backplane
525#
526CONFIG_SSB_POSSIBLE=y
527# CONFIG_SSB is not set
528
529#
530# Multifunction device drivers
531#
532# CONFIG_MFD_SM501 is not set
533
534#
535# Multimedia devices
536#
537# CONFIG_VIDEO_DEV is not set
538# CONFIG_DVB_CORE is not set
539CONFIG_DAB=y
540
541#
542# Graphics support
543#
544# CONFIG_AGP is not set
545# CONFIG_DRM is not set
546# CONFIG_VGASTATE is not set
547CONFIG_VIDEO_OUTPUT_CONTROL=m
548# CONFIG_FB is not set
549# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
550
551#
552# Display device support
553#
554# CONFIG_DISPLAY_SUPPORT is not set
555
556#
557# Sound
558#
559# CONFIG_SOUND is not set
560CONFIG_USB_SUPPORT=y
561CONFIG_USB_ARCH_HAS_HCD=y
562CONFIG_USB_ARCH_HAS_OHCI=y
563CONFIG_USB_ARCH_HAS_EHCI=y
564# CONFIG_USB is not set
565
566#
567# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
568#
569
570#
571# USB Gadget Support
572#
573# CONFIG_USB_GADGET is not set
574# CONFIG_MMC is not set
575# CONFIG_NEW_LEDS is not set
576# CONFIG_INFINIBAND is not set
577# CONFIG_EDAC is not set
578# CONFIG_RTC_CLASS is not set
579
580#
581# Userspace I/O
582#
583# CONFIG_UIO is not set
584
585#
586# File systems
587#
588CONFIG_EXT2_FS=y
589# CONFIG_EXT2_FS_XATTR is not set
590# CONFIG_EXT2_FS_XIP is not set
591# CONFIG_EXT3_FS is not set
592# CONFIG_EXT4DEV_FS is not set
593# CONFIG_REISERFS_FS is not set
594# CONFIG_JFS_FS is not set
595# CONFIG_FS_POSIX_ACL is not set
596# CONFIG_XFS_FS is not set
597# CONFIG_GFS2_FS is not set
598# CONFIG_OCFS2_FS is not set
599# CONFIG_MINIX_FS is not set
600# CONFIG_ROMFS_FS is not set
601CONFIG_INOTIFY=y
602CONFIG_INOTIFY_USER=y
603# CONFIG_QUOTA is not set
604CONFIG_DNOTIFY=y
605# CONFIG_AUTOFS_FS is not set
606# CONFIG_AUTOFS4_FS is not set
607# CONFIG_FUSE_FS is not set
608
609#
610# CD-ROM/DVD Filesystems
611#
612# CONFIG_ISO9660_FS is not set
613# CONFIG_UDF_FS is not set
614
615#
616# DOS/FAT/NT Filesystems
617#
618# CONFIG_MSDOS_FS is not set
619# CONFIG_VFAT_FS is not set
620# CONFIG_NTFS_FS is not set
621
622#
623# Pseudo filesystems
624#
625CONFIG_PROC_FS=y
626CONFIG_PROC_KCORE=y
627CONFIG_PROC_SYSCTL=y
628CONFIG_SYSFS=y
629CONFIG_TMPFS=y
630# CONFIG_TMPFS_POSIX_ACL is not set
631# CONFIG_HUGETLB_PAGE is not set
632# CONFIG_CONFIGFS_FS is not set
633
634#
635# Miscellaneous filesystems
636#
637# CONFIG_ADFS_FS is not set
638# CONFIG_AFFS_FS is not set
639# CONFIG_HFS_FS is not set
640# CONFIG_HFSPLUS_FS is not set
641# CONFIG_BEFS_FS is not set
642# CONFIG_BFS_FS is not set
643# CONFIG_EFS_FS is not set
644CONFIG_CRAMFS=y
645# CONFIG_VXFS_FS is not set
646# CONFIG_HPFS_FS is not set
647# CONFIG_QNX4FS_FS is not set
648# CONFIG_SYSV_FS is not set
649# CONFIG_UFS_FS is not set
650CONFIG_NETWORK_FILESYSTEMS=y
651CONFIG_NFS_FS=y
652CONFIG_NFS_V3=y
653# CONFIG_NFS_V3_ACL is not set
654# CONFIG_NFS_V4 is not set
655# CONFIG_NFS_DIRECTIO is not set
656# CONFIG_NFSD is not set
657CONFIG_ROOT_NFS=y
658CONFIG_LOCKD=y
659CONFIG_LOCKD_V4=y
660CONFIG_NFS_COMMON=y
661CONFIG_SUNRPC=y
662# CONFIG_SUNRPC_BIND34 is not set
663# CONFIG_RPCSEC_GSS_KRB5 is not set
664# CONFIG_RPCSEC_GSS_SPKM3 is not set
665# CONFIG_SMB_FS is not set
666# CONFIG_CIFS is not set
667# CONFIG_NCP_FS is not set
668# CONFIG_CODA_FS is not set
669# CONFIG_AFS_FS is not set
670
671#
672# Partition Types
673#
674# CONFIG_PARTITION_ADVANCED is not set
675CONFIG_MSDOS_PARTITION=y
676# CONFIG_NLS is not set
677# CONFIG_DLM is not set
678# CONFIG_UCC_SLOW is not set
679
680#
681# Library routines
682#
683CONFIG_BITREVERSE=y
684# CONFIG_CRC_CCITT is not set
685# CONFIG_CRC16 is not set
686# CONFIG_CRC_ITU_T is not set
687CONFIG_CRC32=y
688# CONFIG_CRC7 is not set
689# CONFIG_LIBCRC32C is not set
690CONFIG_ZLIB_INFLATE=y
691CONFIG_PLIST=y
692CONFIG_HAS_IOMEM=y
693CONFIG_HAS_IOPORT=y
694CONFIG_HAS_DMA=y
695CONFIG_INSTRUMENTATION=y
696# CONFIG_PROFILING is not set
697# CONFIG_KPROBES is not set
698# CONFIG_MARKERS is not set
699
700#
701# Kernel hacking
702#
703# CONFIG_PRINTK_TIME is not set
704CONFIG_ENABLE_WARN_DEPRECATED=y
705CONFIG_ENABLE_MUST_CHECK=y
706CONFIG_MAGIC_SYSRQ=y
707# CONFIG_UNUSED_SYMBOLS is not set
708# CONFIG_DEBUG_FS is not set
709# CONFIG_HEADERS_CHECK is not set
710CONFIG_DEBUG_KERNEL=y
711# CONFIG_DEBUG_SHIRQ is not set
712CONFIG_DETECT_SOFTLOCKUP=y
713CONFIG_SCHED_DEBUG=y
714# CONFIG_SCHEDSTATS is not set
715# CONFIG_TIMER_STATS is not set
716# CONFIG_SLUB_DEBUG_ON is not set
717# CONFIG_DEBUG_RT_MUTEXES is not set
718# CONFIG_RT_MUTEX_TESTER is not set
719# CONFIG_DEBUG_SPINLOCK is not set
720# CONFIG_DEBUG_MUTEXES is not set
721# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
722# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
723# CONFIG_DEBUG_KOBJECT is not set
724# CONFIG_DEBUG_BUGVERBOSE is not set
725# CONFIG_DEBUG_INFO is not set
726# CONFIG_DEBUG_VM is not set
727# CONFIG_DEBUG_LIST is not set
728# CONFIG_DEBUG_SG is not set
729CONFIG_FORCED_INLINING=y
730# CONFIG_BOOT_PRINTK_DELAY is not set
731# CONFIG_RCU_TORTURE_TEST is not set
732# CONFIG_FAULT_INJECTION is not set
733# CONFIG_SAMPLES is not set
734# CONFIG_DEBUG_STACKOVERFLOW is not set
735# CONFIG_DEBUG_STACK_USAGE is not set
736# CONFIG_DEBUG_PAGEALLOC is not set
737CONFIG_DEBUGGER=y
738# CONFIG_KGDB is not set
739# CONFIG_XMON is not set
740# CONFIG_BDI_SWITCH is not set
741# CONFIG_PPC_EARLY_DEBUG is not set
742
743#
744# Security options
745#
746# CONFIG_KEYS is not set
747# CONFIG_SECURITY is not set
748# CONFIG_SECURITY_FILE_CAPABILITIES is not set
749CONFIG_CRYPTO=y
750CONFIG_CRYPTO_ALGAPI=y
751CONFIG_CRYPTO_BLKCIPHER=y
752CONFIG_CRYPTO_MANAGER=y
753# CONFIG_CRYPTO_HMAC is not set
754# CONFIG_CRYPTO_XCBC is not set
755# CONFIG_CRYPTO_NULL is not set
756# CONFIG_CRYPTO_MD4 is not set
757CONFIG_CRYPTO_MD5=y
758# CONFIG_CRYPTO_SHA1 is not set
759# CONFIG_CRYPTO_SHA256 is not set
760# CONFIG_CRYPTO_SHA512 is not set
761# CONFIG_CRYPTO_WP512 is not set
762# CONFIG_CRYPTO_TGR192 is not set
763# CONFIG_CRYPTO_GF128MUL is not set
764CONFIG_CRYPTO_ECB=y
765CONFIG_CRYPTO_CBC=y
766CONFIG_CRYPTO_PCBC=y
767# CONFIG_CRYPTO_LRW is not set
768# CONFIG_CRYPTO_XTS is not set
769# CONFIG_CRYPTO_CRYPTD is not set
770CONFIG_CRYPTO_DES=y
771# CONFIG_CRYPTO_FCRYPT is not set
772# CONFIG_CRYPTO_BLOWFISH is not set
773# CONFIG_CRYPTO_TWOFISH is not set
774# CONFIG_CRYPTO_SERPENT is not set
775# CONFIG_CRYPTO_AES is not set
776# CONFIG_CRYPTO_CAST5 is not set
777# CONFIG_CRYPTO_CAST6 is not set
778# CONFIG_CRYPTO_TEA is not set
779# CONFIG_CRYPTO_ARC4 is not set
780# CONFIG_CRYPTO_KHAZAD is not set
781# CONFIG_CRYPTO_ANUBIS is not set
782# CONFIG_CRYPTO_SEED is not set
783# CONFIG_CRYPTO_DEFLATE is not set
784# CONFIG_CRYPTO_MICHAEL_MIC is not set
785# CONFIG_CRYPTO_CRC32C is not set
786# CONFIG_CRYPTO_CAMELLIA is not set
787# CONFIG_CRYPTO_TEST is not set
788# CONFIG_CRYPTO_AUTHENC is not set
789CONFIG_CRYPTO_HW=y
790# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/configs/walnut_defconfig b/arch/powerpc/configs/walnut_defconfig
index 79344639b7c9..e431128e8e9e 100644
--- a/arch/powerpc/configs/walnut_defconfig
+++ b/arch/powerpc/configs/walnut_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc4 3# Linux kernel version: 2.6.24-rc6
4# Thu Dec 6 16:49:33 2007 4# Mon Dec 24 11:23:58 2007
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -40,7 +40,7 @@ CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
40CONFIG_ARCH_MAY_HAVE_PC_FDC=y 40CONFIG_ARCH_MAY_HAVE_PC_FDC=y
41CONFIG_PPC_OF=y 41CONFIG_PPC_OF=y
42CONFIG_OF=y 42CONFIG_OF=y
43# CONFIG_PPC_UDBG_16550 is not set 43CONFIG_PPC_UDBG_16550=y
44# CONFIG_GENERIC_TBSYNC is not set 44# CONFIG_GENERIC_TBSYNC is not set
45CONFIG_AUDIT_ARCH=y 45CONFIG_AUDIT_ARCH=y
46CONFIG_GENERIC_BUG=y 46CONFIG_GENERIC_BUG=y
@@ -127,6 +127,7 @@ CONFIG_DEFAULT_AS=y
127# CONFIG_DEFAULT_CFQ is not set 127# CONFIG_DEFAULT_CFQ is not set
128# CONFIG_DEFAULT_NOOP is not set 128# CONFIG_DEFAULT_NOOP is not set
129CONFIG_DEFAULT_IOSCHED="anticipatory" 129CONFIG_DEFAULT_IOSCHED="anticipatory"
130# CONFIG_PPC4xx_PCI_EXPRESS is not set
130 131
131# 132#
132# Platform support 133# Platform support
@@ -136,7 +137,9 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
136# CONFIG_PPC_CELL is not set 137# CONFIG_PPC_CELL is not set
137# CONFIG_PPC_CELL_NATIVE is not set 138# CONFIG_PPC_CELL_NATIVE is not set
138# CONFIG_PQ2ADS is not set 139# CONFIG_PQ2ADS is not set
140# CONFIG_EP405 is not set
139# CONFIG_KILAUEA is not set 141# CONFIG_KILAUEA is not set
142# CONFIG_MAKALU is not set
140CONFIG_WALNUT=y 143CONFIG_WALNUT=y
141# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set 144# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set
142CONFIG_405GP=y 145CONFIG_405GP=y
@@ -204,11 +207,17 @@ CONFIG_ISA_DMA_API=y
204# Bus options 207# Bus options
205# 208#
206CONFIG_ZONE_DMA=y 209CONFIG_ZONE_DMA=y
207# CONFIG_PCI is not set 210CONFIG_PPC_INDIRECT_PCI=y
208# CONFIG_PCI_DOMAINS is not set 211CONFIG_PCI=y
209# CONFIG_PCI_SYSCALL is not set 212CONFIG_PCI_DOMAINS=y
210# CONFIG_ARCH_SUPPORTS_MSI is not set 213CONFIG_PCI_SYSCALL=y
214# CONFIG_PCIEPORTBUS is not set
215CONFIG_ARCH_SUPPORTS_MSI=y
216# CONFIG_PCI_MSI is not set
217# CONFIG_PCI_LEGACY is not set
218# CONFIG_PCI_DEBUG is not set
211# CONFIG_PCCARD is not set 219# CONFIG_PCCARD is not set
220# CONFIG_HOTPLUG_PCI is not set
212 221
213# 222#
214# Advanced setup 223# Advanced setup
@@ -373,11 +382,13 @@ CONFIG_MTD_CFI_UTIL=y
373# CONFIG_MTD_COMPLEX_MAPPINGS is not set 382# CONFIG_MTD_COMPLEX_MAPPINGS is not set
374# CONFIG_MTD_PHYSMAP is not set 383# CONFIG_MTD_PHYSMAP is not set
375CONFIG_MTD_PHYSMAP_OF=y 384CONFIG_MTD_PHYSMAP_OF=y
385# CONFIG_MTD_INTEL_VR_NOR is not set
376# CONFIG_MTD_PLATRAM is not set 386# CONFIG_MTD_PLATRAM is not set
377 387
378# 388#
379# Self-contained MTD device drivers 389# Self-contained MTD device drivers
380# 390#
391# CONFIG_MTD_PMC551 is not set
381# CONFIG_MTD_SLRAM is not set 392# CONFIG_MTD_SLRAM is not set
382# CONFIG_MTD_PHRAM is not set 393# CONFIG_MTD_PHRAM is not set
383# CONFIG_MTD_MTDRAM is not set 394# CONFIG_MTD_MTDRAM is not set
@@ -400,9 +411,14 @@ CONFIG_OF_DEVICE=y
400# CONFIG_PARPORT is not set 411# CONFIG_PARPORT is not set
401CONFIG_BLK_DEV=y 412CONFIG_BLK_DEV=y
402# CONFIG_BLK_DEV_FD is not set 413# CONFIG_BLK_DEV_FD is not set
414# CONFIG_BLK_CPQ_DA is not set
415# CONFIG_BLK_CPQ_CISS_DA is not set
416# CONFIG_BLK_DEV_DAC960 is not set
417# CONFIG_BLK_DEV_UMEM is not set
403# CONFIG_BLK_DEV_COW_COMMON is not set 418# CONFIG_BLK_DEV_COW_COMMON is not set
404# CONFIG_BLK_DEV_LOOP is not set 419# CONFIG_BLK_DEV_LOOP is not set
405# CONFIG_BLK_DEV_NBD is not set 420# CONFIG_BLK_DEV_NBD is not set
421# CONFIG_BLK_DEV_SX8 is not set
406CONFIG_BLK_DEV_RAM=y 422CONFIG_BLK_DEV_RAM=y
407CONFIG_BLK_DEV_RAM_COUNT=16 423CONFIG_BLK_DEV_RAM_COUNT=16
408CONFIG_BLK_DEV_RAM_SIZE=35000 424CONFIG_BLK_DEV_RAM_SIZE=35000
@@ -411,7 +427,10 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
411# CONFIG_ATA_OVER_ETH is not set 427# CONFIG_ATA_OVER_ETH is not set
412# CONFIG_XILINX_SYSACE is not set 428# CONFIG_XILINX_SYSACE is not set
413CONFIG_MISC_DEVICES=y 429CONFIG_MISC_DEVICES=y
430# CONFIG_PHANTOM is not set
414# CONFIG_EEPROM_93CX6 is not set 431# CONFIG_EEPROM_93CX6 is not set
432# CONFIG_SGI_IOC4 is not set
433# CONFIG_TIFM_CORE is not set
415# CONFIG_IDE is not set 434# CONFIG_IDE is not set
416 435
417# 436#
@@ -423,6 +442,14 @@ CONFIG_MISC_DEVICES=y
423# CONFIG_SCSI_NETLINK is not set 442# CONFIG_SCSI_NETLINK is not set
424# CONFIG_ATA is not set 443# CONFIG_ATA is not set
425# CONFIG_MD is not set 444# CONFIG_MD is not set
445# CONFIG_FUSION is not set
446
447#
448# IEEE 1394 (FireWire) support
449#
450# CONFIG_FIREWIRE is not set
451# CONFIG_IEEE1394 is not set
452# CONFIG_I2O is not set
426# CONFIG_MACINTOSH_DRIVERS is not set 453# CONFIG_MACINTOSH_DRIVERS is not set
427CONFIG_NETDEVICES=y 454CONFIG_NETDEVICES=y
428# CONFIG_NETDEVICES_MULTIQUEUE is not set 455# CONFIG_NETDEVICES_MULTIQUEUE is not set
@@ -432,9 +459,17 @@ CONFIG_NETDEVICES=y
432# CONFIG_EQUALIZER is not set 459# CONFIG_EQUALIZER is not set
433# CONFIG_TUN is not set 460# CONFIG_TUN is not set
434# CONFIG_VETH is not set 461# CONFIG_VETH is not set
462# CONFIG_IP1000 is not set
463# CONFIG_ARCNET is not set
435# CONFIG_PHYLIB is not set 464# CONFIG_PHYLIB is not set
436CONFIG_NET_ETHERNET=y 465CONFIG_NET_ETHERNET=y
437# CONFIG_MII is not set 466# CONFIG_MII is not set
467# CONFIG_HAPPYMEAL is not set
468# CONFIG_SUNGEM is not set
469# CONFIG_CASSINI is not set
470# CONFIG_NET_VENDOR_3COM is not set
471# CONFIG_NET_TULIP is not set
472# CONFIG_HP100 is not set
438CONFIG_IBM_NEW_EMAC=y 473CONFIG_IBM_NEW_EMAC=y
439CONFIG_IBM_NEW_EMAC_RXB=128 474CONFIG_IBM_NEW_EMAC_RXB=128
440CONFIG_IBM_NEW_EMAC_TXB=64 475CONFIG_IBM_NEW_EMAC_TXB=64
@@ -446,9 +481,38 @@ CONFIG_IBM_NEW_EMAC_ZMII=y
446# CONFIG_IBM_NEW_EMAC_RGMII is not set 481# CONFIG_IBM_NEW_EMAC_RGMII is not set
447# CONFIG_IBM_NEW_EMAC_TAH is not set 482# CONFIG_IBM_NEW_EMAC_TAH is not set
448# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 483# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
484# CONFIG_NET_PCI is not set
449# CONFIG_B44 is not set 485# CONFIG_B44 is not set
450CONFIG_NETDEV_1000=y 486CONFIG_NETDEV_1000=y
487# CONFIG_ACENIC is not set
488# CONFIG_DL2K is not set
489# CONFIG_E1000 is not set
490# CONFIG_E1000E is not set
491# CONFIG_NS83820 is not set
492# CONFIG_HAMACHI is not set
493# CONFIG_YELLOWFIN is not set
494# CONFIG_R8169 is not set
495# CONFIG_SIS190 is not set
496# CONFIG_SKGE is not set
497# CONFIG_SKY2 is not set
498# CONFIG_SK98LIN is not set
499# CONFIG_VIA_VELOCITY is not set
500# CONFIG_TIGON3 is not set
501# CONFIG_BNX2 is not set
502# CONFIG_QLA3XXX is not set
503# CONFIG_ATL1 is not set
451CONFIG_NETDEV_10000=y 504CONFIG_NETDEV_10000=y
505# CONFIG_CHELSIO_T1 is not set
506# CONFIG_CHELSIO_T3 is not set
507# CONFIG_IXGBE is not set
508# CONFIG_IXGB is not set
509# CONFIG_S2IO is not set
510# CONFIG_MYRI10GE is not set
511# CONFIG_NETXEN_NIC is not set
512# CONFIG_NIU is not set
513# CONFIG_MLX4_CORE is not set
514# CONFIG_TEHUTI is not set
515# CONFIG_TR is not set
452 516
453# 517#
454# Wireless LAN 518# Wireless LAN
@@ -456,6 +520,8 @@ CONFIG_NETDEV_10000=y
456# CONFIG_WLAN_PRE80211 is not set 520# CONFIG_WLAN_PRE80211 is not set
457# CONFIG_WLAN_80211 is not set 521# CONFIG_WLAN_80211 is not set
458# CONFIG_WAN is not set 522# CONFIG_WAN is not set
523# CONFIG_FDDI is not set
524# CONFIG_HIPPI is not set
459# CONFIG_PPP is not set 525# CONFIG_PPP is not set
460# CONFIG_SLIP is not set 526# CONFIG_SLIP is not set
461# CONFIG_SHAPER is not set 527# CONFIG_SHAPER is not set
@@ -487,6 +553,7 @@ CONFIG_NETDEV_10000=y
487# 553#
488CONFIG_SERIAL_8250=y 554CONFIG_SERIAL_8250=y
489CONFIG_SERIAL_8250_CONSOLE=y 555CONFIG_SERIAL_8250_CONSOLE=y
556CONFIG_SERIAL_8250_PCI=y
490CONFIG_SERIAL_8250_NR_UARTS=4 557CONFIG_SERIAL_8250_NR_UARTS=4
491CONFIG_SERIAL_8250_RUNTIME_UARTS=4 558CONFIG_SERIAL_8250_RUNTIME_UARTS=4
492CONFIG_SERIAL_8250_EXTENDED=y 559CONFIG_SERIAL_8250_EXTENDED=y
@@ -501,6 +568,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
501# CONFIG_SERIAL_UARTLITE is not set 568# CONFIG_SERIAL_UARTLITE is not set
502CONFIG_SERIAL_CORE=y 569CONFIG_SERIAL_CORE=y
503CONFIG_SERIAL_CORE_CONSOLE=y 570CONFIG_SERIAL_CORE_CONSOLE=y
571# CONFIG_SERIAL_JSM is not set
504CONFIG_SERIAL_OF_PLATFORM=y 572CONFIG_SERIAL_OF_PLATFORM=y
505CONFIG_UNIX98_PTYS=y 573CONFIG_UNIX98_PTYS=y
506CONFIG_LEGACY_PTYS=y 574CONFIG_LEGACY_PTYS=y
@@ -510,8 +578,10 @@ CONFIG_LEGACY_PTY_COUNT=256
510# CONFIG_NVRAM is not set 578# CONFIG_NVRAM is not set
511# CONFIG_GEN_RTC is not set 579# CONFIG_GEN_RTC is not set
512# CONFIG_R3964 is not set 580# CONFIG_R3964 is not set
581# CONFIG_APPLICOM is not set
513# CONFIG_RAW_DRIVER is not set 582# CONFIG_RAW_DRIVER is not set
514# CONFIG_TCG_TPM is not set 583# CONFIG_TCG_TPM is not set
584CONFIG_DEVPORT=y
515# CONFIG_I2C is not set 585# CONFIG_I2C is not set
516 586
517# 587#
@@ -545,6 +615,8 @@ CONFIG_SSB_POSSIBLE=y
545# 615#
546# Graphics support 616# Graphics support
547# 617#
618# CONFIG_AGP is not set
619# CONFIG_DRM is not set
548# CONFIG_VGASTATE is not set 620# CONFIG_VGASTATE is not set
549CONFIG_VIDEO_OUTPUT_CONTROL=m 621CONFIG_VIDEO_OUTPUT_CONTROL=m
550# CONFIG_FB is not set 622# CONFIG_FB is not set
@@ -560,9 +632,10 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
560# 632#
561# CONFIG_SOUND is not set 633# CONFIG_SOUND is not set
562CONFIG_USB_SUPPORT=y 634CONFIG_USB_SUPPORT=y
563# CONFIG_USB_ARCH_HAS_HCD is not set 635CONFIG_USB_ARCH_HAS_HCD=y
564# CONFIG_USB_ARCH_HAS_OHCI is not set 636CONFIG_USB_ARCH_HAS_OHCI=y
565# CONFIG_USB_ARCH_HAS_EHCI is not set 637CONFIG_USB_ARCH_HAS_EHCI=y
638# CONFIG_USB is not set
566 639
567# 640#
568# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 641# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -574,6 +647,7 @@ CONFIG_USB_SUPPORT=y
574# CONFIG_USB_GADGET is not set 647# CONFIG_USB_GADGET is not set
575# CONFIG_MMC is not set 648# CONFIG_MMC is not set
576# CONFIG_NEW_LEDS is not set 649# CONFIG_NEW_LEDS is not set
650# CONFIG_INFINIBAND is not set
577# CONFIG_EDAC is not set 651# CONFIG_EDAC is not set
578# CONFIG_RTC_CLASS is not set 652# CONFIG_RTC_CLASS is not set
579 653
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
index 8e1812e2f3ee..6250443ab9c9 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -23,11 +23,24 @@ _GLOBAL(__setup_cpu_440epx)
23 mflr r4 23 mflr r4
24 bl __init_fpu_44x 24 bl __init_fpu_44x
25 bl __plb_disable_wrp 25 bl __plb_disable_wrp
26 bl __fixup_440A_mcheck
26 mtlr r4 27 mtlr r4
27 blr 28 blr
28_GLOBAL(__setup_cpu_440grx) 29_GLOBAL(__setup_cpu_440grx)
29 b __plb_disable_wrp 30 mflr r4
31 bl __plb_disable_wrp
32 bl __fixup_440A_mcheck
33 mtlr r4
34 blr
35_GLOBAL(__setup_cpu_440gx)
36_GLOBAL(__setup_cpu_440spe)
37 b __fixup_440A_mcheck
30 38
39 /* Temporary fixup for arch/ppc until we kill the whole thing */
40#ifndef CONFIG_PPC_MERGE
41_GLOBAL(__fixup_440A_mcheck)
42 blr
43#endif
31 44
32/* enable APU between CPU and FPU */ 45/* enable APU between CPU and FPU */
33_GLOBAL(__init_fpu_44x) 46_GLOBAL(__init_fpu_44x)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 7c21f52d982a..f1928af5fcfc 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -33,7 +33,9 @@ EXPORT_SYMBOL(cur_cpu_spec);
33#ifdef CONFIG_PPC32 33#ifdef CONFIG_PPC32
34extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 34extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
35extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 35extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
36extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
36extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 37extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
38extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
37extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 39extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
38extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 40extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 41extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -85,6 +87,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
85 .pmc_type = PPC_PMC_IBM, 87 .pmc_type = PPC_PMC_IBM,
86 .oprofile_cpu_type = "ppc64/power3", 88 .oprofile_cpu_type = "ppc64/power3",
87 .oprofile_type = PPC_OPROFILE_RS64, 89 .oprofile_type = PPC_OPROFILE_RS64,
90 .machine_check = machine_check_generic,
88 .platform = "power3", 91 .platform = "power3",
89 }, 92 },
90 { /* Power3+ */ 93 { /* Power3+ */
@@ -99,6 +102,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
99 .pmc_type = PPC_PMC_IBM, 102 .pmc_type = PPC_PMC_IBM,
100 .oprofile_cpu_type = "ppc64/power3", 103 .oprofile_cpu_type = "ppc64/power3",
101 .oprofile_type = PPC_OPROFILE_RS64, 104 .oprofile_type = PPC_OPROFILE_RS64,
105 .machine_check = machine_check_generic,
102 .platform = "power3", 106 .platform = "power3",
103 }, 107 },
104 { /* Northstar */ 108 { /* Northstar */
@@ -113,6 +117,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
113 .pmc_type = PPC_PMC_IBM, 117 .pmc_type = PPC_PMC_IBM,
114 .oprofile_cpu_type = "ppc64/rs64", 118 .oprofile_cpu_type = "ppc64/rs64",
115 .oprofile_type = PPC_OPROFILE_RS64, 119 .oprofile_type = PPC_OPROFILE_RS64,
120 .machine_check = machine_check_generic,
116 .platform = "rs64", 121 .platform = "rs64",
117 }, 122 },
118 { /* Pulsar */ 123 { /* Pulsar */
@@ -127,6 +132,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
127 .pmc_type = PPC_PMC_IBM, 132 .pmc_type = PPC_PMC_IBM,
128 .oprofile_cpu_type = "ppc64/rs64", 133 .oprofile_cpu_type = "ppc64/rs64",
129 .oprofile_type = PPC_OPROFILE_RS64, 134 .oprofile_type = PPC_OPROFILE_RS64,
135 .machine_check = machine_check_generic,
130 .platform = "rs64", 136 .platform = "rs64",
131 }, 137 },
132 { /* I-star */ 138 { /* I-star */
@@ -141,6 +147,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
141 .pmc_type = PPC_PMC_IBM, 147 .pmc_type = PPC_PMC_IBM,
142 .oprofile_cpu_type = "ppc64/rs64", 148 .oprofile_cpu_type = "ppc64/rs64",
143 .oprofile_type = PPC_OPROFILE_RS64, 149 .oprofile_type = PPC_OPROFILE_RS64,
150 .machine_check = machine_check_generic,
144 .platform = "rs64", 151 .platform = "rs64",
145 }, 152 },
146 { /* S-star */ 153 { /* S-star */
@@ -155,6 +162,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
155 .pmc_type = PPC_PMC_IBM, 162 .pmc_type = PPC_PMC_IBM,
156 .oprofile_cpu_type = "ppc64/rs64", 163 .oprofile_cpu_type = "ppc64/rs64",
157 .oprofile_type = PPC_OPROFILE_RS64, 164 .oprofile_type = PPC_OPROFILE_RS64,
165 .machine_check = machine_check_generic,
158 .platform = "rs64", 166 .platform = "rs64",
159 }, 167 },
160 { /* Power4 */ 168 { /* Power4 */
@@ -169,6 +177,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
169 .pmc_type = PPC_PMC_IBM, 177 .pmc_type = PPC_PMC_IBM,
170 .oprofile_cpu_type = "ppc64/power4", 178 .oprofile_cpu_type = "ppc64/power4",
171 .oprofile_type = PPC_OPROFILE_POWER4, 179 .oprofile_type = PPC_OPROFILE_POWER4,
180 .machine_check = machine_check_generic,
172 .platform = "power4", 181 .platform = "power4",
173 }, 182 },
174 { /* Power4+ */ 183 { /* Power4+ */
@@ -183,6 +192,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
183 .pmc_type = PPC_PMC_IBM, 192 .pmc_type = PPC_PMC_IBM,
184 .oprofile_cpu_type = "ppc64/power4", 193 .oprofile_cpu_type = "ppc64/power4",
185 .oprofile_type = PPC_OPROFILE_POWER4, 194 .oprofile_type = PPC_OPROFILE_POWER4,
195 .machine_check = machine_check_generic,
186 .platform = "power4", 196 .platform = "power4",
187 }, 197 },
188 { /* PPC970 */ 198 { /* PPC970 */
@@ -200,6 +210,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
200 .cpu_restore = __restore_cpu_ppc970, 210 .cpu_restore = __restore_cpu_ppc970,
201 .oprofile_cpu_type = "ppc64/970", 211 .oprofile_cpu_type = "ppc64/970",
202 .oprofile_type = PPC_OPROFILE_POWER4, 212 .oprofile_type = PPC_OPROFILE_POWER4,
213 .machine_check = machine_check_generic,
203 .platform = "ppc970", 214 .platform = "ppc970",
204 }, 215 },
205 { /* PPC970FX */ 216 { /* PPC970FX */
@@ -217,6 +228,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
217 .cpu_restore = __restore_cpu_ppc970, 228 .cpu_restore = __restore_cpu_ppc970,
218 .oprofile_cpu_type = "ppc64/970", 229 .oprofile_cpu_type = "ppc64/970",
219 .oprofile_type = PPC_OPROFILE_POWER4, 230 .oprofile_type = PPC_OPROFILE_POWER4,
231 .machine_check = machine_check_generic,
220 .platform = "ppc970", 232 .platform = "ppc970",
221 }, 233 },
222 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 234 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
@@ -234,6 +246,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
234 .cpu_restore = __restore_cpu_ppc970, 246 .cpu_restore = __restore_cpu_ppc970,
235 .oprofile_cpu_type = "ppc64/970MP", 247 .oprofile_cpu_type = "ppc64/970MP",
236 .oprofile_type = PPC_OPROFILE_POWER4, 248 .oprofile_type = PPC_OPROFILE_POWER4,
249 .machine_check = machine_check_generic,
237 .platform = "ppc970", 250 .platform = "ppc970",
238 }, 251 },
239 { /* PPC970MP */ 252 { /* PPC970MP */
@@ -251,6 +264,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
251 .cpu_restore = __restore_cpu_ppc970, 264 .cpu_restore = __restore_cpu_ppc970,
252 .oprofile_cpu_type = "ppc64/970MP", 265 .oprofile_cpu_type = "ppc64/970MP",
253 .oprofile_type = PPC_OPROFILE_POWER4, 266 .oprofile_type = PPC_OPROFILE_POWER4,
267 .machine_check = machine_check_generic,
254 .platform = "ppc970", 268 .platform = "ppc970",
255 }, 269 },
256 { /* PPC970GX */ 270 { /* PPC970GX */
@@ -267,6 +281,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
267 .cpu_setup = __setup_cpu_ppc970, 281 .cpu_setup = __setup_cpu_ppc970,
268 .oprofile_cpu_type = "ppc64/970", 282 .oprofile_cpu_type = "ppc64/970",
269 .oprofile_type = PPC_OPROFILE_POWER4, 283 .oprofile_type = PPC_OPROFILE_POWER4,
284 .machine_check = machine_check_generic,
270 .platform = "ppc970", 285 .platform = "ppc970",
271 }, 286 },
272 { /* Power5 GR */ 287 { /* Power5 GR */
@@ -286,6 +301,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
286 */ 301 */
287 .oprofile_mmcra_sihv = MMCRA_SIHV, 302 .oprofile_mmcra_sihv = MMCRA_SIHV,
288 .oprofile_mmcra_sipr = MMCRA_SIPR, 303 .oprofile_mmcra_sipr = MMCRA_SIPR,
304 .machine_check = machine_check_generic,
289 .platform = "power5", 305 .platform = "power5",
290 }, 306 },
291 { /* Power5++ */ 307 { /* Power5++ */
@@ -301,6 +317,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
301 .oprofile_type = PPC_OPROFILE_POWER4, 317 .oprofile_type = PPC_OPROFILE_POWER4,
302 .oprofile_mmcra_sihv = MMCRA_SIHV, 318 .oprofile_mmcra_sihv = MMCRA_SIHV,
303 .oprofile_mmcra_sipr = MMCRA_SIPR, 319 .oprofile_mmcra_sipr = MMCRA_SIPR,
320 .machine_check = machine_check_generic,
304 .platform = "power5+", 321 .platform = "power5+",
305 }, 322 },
306 { /* Power5 GS */ 323 { /* Power5 GS */
@@ -317,6 +334,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
317 .oprofile_type = PPC_OPROFILE_POWER4, 334 .oprofile_type = PPC_OPROFILE_POWER4,
318 .oprofile_mmcra_sihv = MMCRA_SIHV, 335 .oprofile_mmcra_sihv = MMCRA_SIHV,
319 .oprofile_mmcra_sipr = MMCRA_SIPR, 336 .oprofile_mmcra_sipr = MMCRA_SIPR,
337 .machine_check = machine_check_generic,
320 .platform = "power5+", 338 .platform = "power5+",
321 }, 339 },
322 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 340 { /* POWER6 in P5+ mode; 2.04-compliant processor */
@@ -327,6 +345,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
327 .cpu_user_features = COMMON_USER_POWER5_PLUS, 345 .cpu_user_features = COMMON_USER_POWER5_PLUS,
328 .icache_bsize = 128, 346 .icache_bsize = 128,
329 .dcache_bsize = 128, 347 .dcache_bsize = 128,
348 .machine_check = machine_check_generic,
330 .platform = "power5+", 349 .platform = "power5+",
331 }, 350 },
332 { /* Power6 */ 351 { /* Power6 */
@@ -346,6 +365,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
346 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 365 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
347 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 366 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
348 POWER6_MMCRA_OTHER, 367 POWER6_MMCRA_OTHER,
368 .machine_check = machine_check_generic,
349 .platform = "power6x", 369 .platform = "power6x",
350 }, 370 },
351 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 371 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
@@ -356,6 +376,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
356 .cpu_user_features = COMMON_USER_POWER6, 376 .cpu_user_features = COMMON_USER_POWER6,
357 .icache_bsize = 128, 377 .icache_bsize = 128,
358 .dcache_bsize = 128, 378 .dcache_bsize = 128,
379 .machine_check = machine_check_generic,
359 .platform = "power6", 380 .platform = "power6",
360 }, 381 },
361 { /* Cell Broadband Engine */ 382 { /* Cell Broadband Engine */
@@ -372,6 +393,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
372 .pmc_type = PPC_PMC_IBM, 393 .pmc_type = PPC_PMC_IBM,
373 .oprofile_cpu_type = "ppc64/cell-be", 394 .oprofile_cpu_type = "ppc64/cell-be",
374 .oprofile_type = PPC_OPROFILE_CELL, 395 .oprofile_type = PPC_OPROFILE_CELL,
396 .machine_check = machine_check_generic,
375 .platform = "ppc-cell-be", 397 .platform = "ppc-cell-be",
376 }, 398 },
377 { /* PA Semi PA6T */ 399 { /* PA Semi PA6T */
@@ -388,6 +410,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
388 .cpu_restore = __restore_cpu_pa6t, 410 .cpu_restore = __restore_cpu_pa6t,
389 .oprofile_cpu_type = "ppc64/pa6t", 411 .oprofile_cpu_type = "ppc64/pa6t",
390 .oprofile_type = PPC_OPROFILE_PA6T, 412 .oprofile_type = PPC_OPROFILE_PA6T,
413 .machine_check = machine_check_generic,
391 .platform = "pa6t", 414 .platform = "pa6t",
392 }, 415 },
393 { /* default match */ 416 { /* default match */
@@ -400,6 +423,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
400 .dcache_bsize = 128, 423 .dcache_bsize = 128,
401 .num_pmcs = 6, 424 .num_pmcs = 6,
402 .pmc_type = PPC_PMC_IBM, 425 .pmc_type = PPC_PMC_IBM,
426 .machine_check = machine_check_generic,
403 .platform = "power4", 427 .platform = "power4",
404 } 428 }
405#endif /* CONFIG_PPC64 */ 429#endif /* CONFIG_PPC64 */
@@ -414,6 +438,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
414 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 438 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
415 .icache_bsize = 32, 439 .icache_bsize = 32,
416 .dcache_bsize = 32, 440 .dcache_bsize = 32,
441 .machine_check = machine_check_generic,
417 .platform = "ppc601", 442 .platform = "ppc601",
418 }, 443 },
419 { /* 603 */ 444 { /* 603 */
@@ -425,6 +450,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
425 .icache_bsize = 32, 450 .icache_bsize = 32,
426 .dcache_bsize = 32, 451 .dcache_bsize = 32,
427 .cpu_setup = __setup_cpu_603, 452 .cpu_setup = __setup_cpu_603,
453 .machine_check = machine_check_generic,
428 .platform = "ppc603", 454 .platform = "ppc603",
429 }, 455 },
430 { /* 603e */ 456 { /* 603e */
@@ -436,6 +462,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
436 .icache_bsize = 32, 462 .icache_bsize = 32,
437 .dcache_bsize = 32, 463 .dcache_bsize = 32,
438 .cpu_setup = __setup_cpu_603, 464 .cpu_setup = __setup_cpu_603,
465 .machine_check = machine_check_generic,
439 .platform = "ppc603", 466 .platform = "ppc603",
440 }, 467 },
441 { /* 603ev */ 468 { /* 603ev */
@@ -447,6 +474,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
447 .icache_bsize = 32, 474 .icache_bsize = 32,
448 .dcache_bsize = 32, 475 .dcache_bsize = 32,
449 .cpu_setup = __setup_cpu_603, 476 .cpu_setup = __setup_cpu_603,
477 .machine_check = machine_check_generic,
450 .platform = "ppc603", 478 .platform = "ppc603",
451 }, 479 },
452 { /* 604 */ 480 { /* 604 */
@@ -459,6 +487,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
459 .dcache_bsize = 32, 487 .dcache_bsize = 32,
460 .num_pmcs = 2, 488 .num_pmcs = 2,
461 .cpu_setup = __setup_cpu_604, 489 .cpu_setup = __setup_cpu_604,
490 .machine_check = machine_check_generic,
462 .platform = "ppc604", 491 .platform = "ppc604",
463 }, 492 },
464 { /* 604e */ 493 { /* 604e */
@@ -471,6 +500,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
471 .dcache_bsize = 32, 500 .dcache_bsize = 32,
472 .num_pmcs = 4, 501 .num_pmcs = 4,
473 .cpu_setup = __setup_cpu_604, 502 .cpu_setup = __setup_cpu_604,
503 .machine_check = machine_check_generic,
474 .platform = "ppc604", 504 .platform = "ppc604",
475 }, 505 },
476 { /* 604r */ 506 { /* 604r */
@@ -483,6 +513,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
483 .dcache_bsize = 32, 513 .dcache_bsize = 32,
484 .num_pmcs = 4, 514 .num_pmcs = 4,
485 .cpu_setup = __setup_cpu_604, 515 .cpu_setup = __setup_cpu_604,
516 .machine_check = machine_check_generic,
486 .platform = "ppc604", 517 .platform = "ppc604",
487 }, 518 },
488 { /* 604ev */ 519 { /* 604ev */
@@ -495,6 +526,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
495 .dcache_bsize = 32, 526 .dcache_bsize = 32,
496 .num_pmcs = 4, 527 .num_pmcs = 4,
497 .cpu_setup = __setup_cpu_604, 528 .cpu_setup = __setup_cpu_604,
529 .machine_check = machine_check_generic,
498 .platform = "ppc604", 530 .platform = "ppc604",
499 }, 531 },
500 { /* 740/750 (0x4202, don't support TAU ?) */ 532 { /* 740/750 (0x4202, don't support TAU ?) */
@@ -507,6 +539,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
507 .dcache_bsize = 32, 539 .dcache_bsize = 32,
508 .num_pmcs = 4, 540 .num_pmcs = 4,
509 .cpu_setup = __setup_cpu_750, 541 .cpu_setup = __setup_cpu_750,
542 .machine_check = machine_check_generic,
510 .platform = "ppc750", 543 .platform = "ppc750",
511 }, 544 },
512 { /* 750CX (80100 and 8010x?) */ 545 { /* 750CX (80100 and 8010x?) */
@@ -519,6 +552,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
519 .dcache_bsize = 32, 552 .dcache_bsize = 32,
520 .num_pmcs = 4, 553 .num_pmcs = 4,
521 .cpu_setup = __setup_cpu_750cx, 554 .cpu_setup = __setup_cpu_750cx,
555 .machine_check = machine_check_generic,
522 .platform = "ppc750", 556 .platform = "ppc750",
523 }, 557 },
524 { /* 750CX (82201 and 82202) */ 558 { /* 750CX (82201 and 82202) */
@@ -531,6 +565,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
531 .dcache_bsize = 32, 565 .dcache_bsize = 32,
532 .num_pmcs = 4, 566 .num_pmcs = 4,
533 .cpu_setup = __setup_cpu_750cx, 567 .cpu_setup = __setup_cpu_750cx,
568 .machine_check = machine_check_generic,
534 .platform = "ppc750", 569 .platform = "ppc750",
535 }, 570 },
536 { /* 750CXe (82214) */ 571 { /* 750CXe (82214) */
@@ -543,6 +578,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
543 .dcache_bsize = 32, 578 .dcache_bsize = 32,
544 .num_pmcs = 4, 579 .num_pmcs = 4,
545 .cpu_setup = __setup_cpu_750cx, 580 .cpu_setup = __setup_cpu_750cx,
581 .machine_check = machine_check_generic,
546 .platform = "ppc750", 582 .platform = "ppc750",
547 }, 583 },
548 { /* 750CXe "Gekko" (83214) */ 584 { /* 750CXe "Gekko" (83214) */
@@ -555,6 +591,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
555 .dcache_bsize = 32, 591 .dcache_bsize = 32,
556 .num_pmcs = 4, 592 .num_pmcs = 4,
557 .cpu_setup = __setup_cpu_750cx, 593 .cpu_setup = __setup_cpu_750cx,
594 .machine_check = machine_check_generic,
558 .platform = "ppc750", 595 .platform = "ppc750",
559 }, 596 },
560 { /* 750CL */ 597 { /* 750CL */
@@ -567,6 +604,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
567 .dcache_bsize = 32, 604 .dcache_bsize = 32,
568 .num_pmcs = 4, 605 .num_pmcs = 4,
569 .cpu_setup = __setup_cpu_750, 606 .cpu_setup = __setup_cpu_750,
607 .machine_check = machine_check_generic,
570 .platform = "ppc750", 608 .platform = "ppc750",
571 }, 609 },
572 { /* 745/755 */ 610 { /* 745/755 */
@@ -579,6 +617,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
579 .dcache_bsize = 32, 617 .dcache_bsize = 32,
580 .num_pmcs = 4, 618 .num_pmcs = 4,
581 .cpu_setup = __setup_cpu_750, 619 .cpu_setup = __setup_cpu_750,
620 .machine_check = machine_check_generic,
582 .platform = "ppc750", 621 .platform = "ppc750",
583 }, 622 },
584 { /* 750FX rev 1.x */ 623 { /* 750FX rev 1.x */
@@ -591,6 +630,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
591 .dcache_bsize = 32, 630 .dcache_bsize = 32,
592 .num_pmcs = 4, 631 .num_pmcs = 4,
593 .cpu_setup = __setup_cpu_750, 632 .cpu_setup = __setup_cpu_750,
633 .machine_check = machine_check_generic,
594 .platform = "ppc750", 634 .platform = "ppc750",
595 }, 635 },
596 { /* 750FX rev 2.0 must disable HID0[DPM] */ 636 { /* 750FX rev 2.0 must disable HID0[DPM] */
@@ -603,6 +643,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
603 .dcache_bsize = 32, 643 .dcache_bsize = 32,
604 .num_pmcs = 4, 644 .num_pmcs = 4,
605 .cpu_setup = __setup_cpu_750, 645 .cpu_setup = __setup_cpu_750,
646 .machine_check = machine_check_generic,
606 .platform = "ppc750", 647 .platform = "ppc750",
607 }, 648 },
608 { /* 750FX (All revs except 2.0) */ 649 { /* 750FX (All revs except 2.0) */
@@ -615,6 +656,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
615 .dcache_bsize = 32, 656 .dcache_bsize = 32,
616 .num_pmcs = 4, 657 .num_pmcs = 4,
617 .cpu_setup = __setup_cpu_750fx, 658 .cpu_setup = __setup_cpu_750fx,
659 .machine_check = machine_check_generic,
618 .platform = "ppc750", 660 .platform = "ppc750",
619 }, 661 },
620 { /* 750GX */ 662 { /* 750GX */
@@ -627,6 +669,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
627 .dcache_bsize = 32, 669 .dcache_bsize = 32,
628 .num_pmcs = 4, 670 .num_pmcs = 4,
629 .cpu_setup = __setup_cpu_750fx, 671 .cpu_setup = __setup_cpu_750fx,
672 .machine_check = machine_check_generic,
630 .platform = "ppc750", 673 .platform = "ppc750",
631 }, 674 },
632 { /* 740/750 (L2CR bit need fixup for 740) */ 675 { /* 740/750 (L2CR bit need fixup for 740) */
@@ -639,6 +682,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
639 .dcache_bsize = 32, 682 .dcache_bsize = 32,
640 .num_pmcs = 4, 683 .num_pmcs = 4,
641 .cpu_setup = __setup_cpu_750, 684 .cpu_setup = __setup_cpu_750,
685 .machine_check = machine_check_generic,
642 .platform = "ppc750", 686 .platform = "ppc750",
643 }, 687 },
644 { /* 7400 rev 1.1 ? (no TAU) */ 688 { /* 7400 rev 1.1 ? (no TAU) */
@@ -652,6 +696,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
652 .dcache_bsize = 32, 696 .dcache_bsize = 32,
653 .num_pmcs = 4, 697 .num_pmcs = 4,
654 .cpu_setup = __setup_cpu_7400, 698 .cpu_setup = __setup_cpu_7400,
699 .machine_check = machine_check_generic,
655 .platform = "ppc7400", 700 .platform = "ppc7400",
656 }, 701 },
657 { /* 7400 */ 702 { /* 7400 */
@@ -665,6 +710,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
665 .dcache_bsize = 32, 710 .dcache_bsize = 32,
666 .num_pmcs = 4, 711 .num_pmcs = 4,
667 .cpu_setup = __setup_cpu_7400, 712 .cpu_setup = __setup_cpu_7400,
713 .machine_check = machine_check_generic,
668 .platform = "ppc7400", 714 .platform = "ppc7400",
669 }, 715 },
670 { /* 7410 */ 716 { /* 7410 */
@@ -678,6 +724,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
678 .dcache_bsize = 32, 724 .dcache_bsize = 32,
679 .num_pmcs = 4, 725 .num_pmcs = 4,
680 .cpu_setup = __setup_cpu_7410, 726 .cpu_setup = __setup_cpu_7410,
727 .machine_check = machine_check_generic,
681 .platform = "ppc7400", 728 .platform = "ppc7400",
682 }, 729 },
683 { /* 7450 2.0 - no doze/nap */ 730 { /* 7450 2.0 - no doze/nap */
@@ -693,6 +740,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
693 .cpu_setup = __setup_cpu_745x, 740 .cpu_setup = __setup_cpu_745x,
694 .oprofile_cpu_type = "ppc/7450", 741 .oprofile_cpu_type = "ppc/7450",
695 .oprofile_type = PPC_OPROFILE_G4, 742 .oprofile_type = PPC_OPROFILE_G4,
743 .machine_check = machine_check_generic,
696 .platform = "ppc7450", 744 .platform = "ppc7450",
697 }, 745 },
698 { /* 7450 2.1 */ 746 { /* 7450 2.1 */
@@ -708,6 +756,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
708 .cpu_setup = __setup_cpu_745x, 756 .cpu_setup = __setup_cpu_745x,
709 .oprofile_cpu_type = "ppc/7450", 757 .oprofile_cpu_type = "ppc/7450",
710 .oprofile_type = PPC_OPROFILE_G4, 758 .oprofile_type = PPC_OPROFILE_G4,
759 .machine_check = machine_check_generic,
711 .platform = "ppc7450", 760 .platform = "ppc7450",
712 }, 761 },
713 { /* 7450 2.3 and newer */ 762 { /* 7450 2.3 and newer */
@@ -723,6 +772,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
723 .cpu_setup = __setup_cpu_745x, 772 .cpu_setup = __setup_cpu_745x,
724 .oprofile_cpu_type = "ppc/7450", 773 .oprofile_cpu_type = "ppc/7450",
725 .oprofile_type = PPC_OPROFILE_G4, 774 .oprofile_type = PPC_OPROFILE_G4,
775 .machine_check = machine_check_generic,
726 .platform = "ppc7450", 776 .platform = "ppc7450",
727 }, 777 },
728 { /* 7455 rev 1.x */ 778 { /* 7455 rev 1.x */
@@ -738,6 +788,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
738 .cpu_setup = __setup_cpu_745x, 788 .cpu_setup = __setup_cpu_745x,
739 .oprofile_cpu_type = "ppc/7450", 789 .oprofile_cpu_type = "ppc/7450",
740 .oprofile_type = PPC_OPROFILE_G4, 790 .oprofile_type = PPC_OPROFILE_G4,
791 .machine_check = machine_check_generic,
741 .platform = "ppc7450", 792 .platform = "ppc7450",
742 }, 793 },
743 { /* 7455 rev 2.0 */ 794 { /* 7455 rev 2.0 */
@@ -753,6 +804,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
753 .cpu_setup = __setup_cpu_745x, 804 .cpu_setup = __setup_cpu_745x,
754 .oprofile_cpu_type = "ppc/7450", 805 .oprofile_cpu_type = "ppc/7450",
755 .oprofile_type = PPC_OPROFILE_G4, 806 .oprofile_type = PPC_OPROFILE_G4,
807 .machine_check = machine_check_generic,
756 .platform = "ppc7450", 808 .platform = "ppc7450",
757 }, 809 },
758 { /* 7455 others */ 810 { /* 7455 others */
@@ -768,6 +820,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
768 .cpu_setup = __setup_cpu_745x, 820 .cpu_setup = __setup_cpu_745x,
769 .oprofile_cpu_type = "ppc/7450", 821 .oprofile_cpu_type = "ppc/7450",
770 .oprofile_type = PPC_OPROFILE_G4, 822 .oprofile_type = PPC_OPROFILE_G4,
823 .machine_check = machine_check_generic,
771 .platform = "ppc7450", 824 .platform = "ppc7450",
772 }, 825 },
773 { /* 7447/7457 Rev 1.0 */ 826 { /* 7447/7457 Rev 1.0 */
@@ -783,6 +836,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
783 .cpu_setup = __setup_cpu_745x, 836 .cpu_setup = __setup_cpu_745x,
784 .oprofile_cpu_type = "ppc/7450", 837 .oprofile_cpu_type = "ppc/7450",
785 .oprofile_type = PPC_OPROFILE_G4, 838 .oprofile_type = PPC_OPROFILE_G4,
839 .machine_check = machine_check_generic,
786 .platform = "ppc7450", 840 .platform = "ppc7450",
787 }, 841 },
788 { /* 7447/7457 Rev 1.1 */ 842 { /* 7447/7457 Rev 1.1 */
@@ -798,6 +852,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
798 .cpu_setup = __setup_cpu_745x, 852 .cpu_setup = __setup_cpu_745x,
799 .oprofile_cpu_type = "ppc/7450", 853 .oprofile_cpu_type = "ppc/7450",
800 .oprofile_type = PPC_OPROFILE_G4, 854 .oprofile_type = PPC_OPROFILE_G4,
855 .machine_check = machine_check_generic,
801 .platform = "ppc7450", 856 .platform = "ppc7450",
802 }, 857 },
803 { /* 7447/7457 Rev 1.2 and later */ 858 { /* 7447/7457 Rev 1.2 and later */
@@ -812,6 +867,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
812 .cpu_setup = __setup_cpu_745x, 867 .cpu_setup = __setup_cpu_745x,
813 .oprofile_cpu_type = "ppc/7450", 868 .oprofile_cpu_type = "ppc/7450",
814 .oprofile_type = PPC_OPROFILE_G4, 869 .oprofile_type = PPC_OPROFILE_G4,
870 .machine_check = machine_check_generic,
815 .platform = "ppc7450", 871 .platform = "ppc7450",
816 }, 872 },
817 { /* 7447A */ 873 { /* 7447A */
@@ -827,6 +883,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
827 .cpu_setup = __setup_cpu_745x, 883 .cpu_setup = __setup_cpu_745x,
828 .oprofile_cpu_type = "ppc/7450", 884 .oprofile_cpu_type = "ppc/7450",
829 .oprofile_type = PPC_OPROFILE_G4, 885 .oprofile_type = PPC_OPROFILE_G4,
886 .machine_check = machine_check_generic,
830 .platform = "ppc7450", 887 .platform = "ppc7450",
831 }, 888 },
832 { /* 7448 */ 889 { /* 7448 */
@@ -842,6 +899,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
842 .cpu_setup = __setup_cpu_745x, 899 .cpu_setup = __setup_cpu_745x,
843 .oprofile_cpu_type = "ppc/7450", 900 .oprofile_cpu_type = "ppc/7450",
844 .oprofile_type = PPC_OPROFILE_G4, 901 .oprofile_type = PPC_OPROFILE_G4,
902 .machine_check = machine_check_generic,
845 .platform = "ppc7450", 903 .platform = "ppc7450",
846 }, 904 },
847 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 905 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
@@ -853,6 +911,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
853 .icache_bsize = 32, 911 .icache_bsize = 32,
854 .dcache_bsize = 32, 912 .dcache_bsize = 32,
855 .cpu_setup = __setup_cpu_603, 913 .cpu_setup = __setup_cpu_603,
914 .machine_check = machine_check_generic,
856 .platform = "ppc603", 915 .platform = "ppc603",
857 }, 916 },
858 { /* All G2_LE (603e core, plus some) have the same pvr */ 917 { /* All G2_LE (603e core, plus some) have the same pvr */
@@ -864,6 +923,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
864 .icache_bsize = 32, 923 .icache_bsize = 32,
865 .dcache_bsize = 32, 924 .dcache_bsize = 32,
866 .cpu_setup = __setup_cpu_603, 925 .cpu_setup = __setup_cpu_603,
926 .machine_check = machine_check_generic,
867 .platform = "ppc603", 927 .platform = "ppc603",
868 }, 928 },
869 { /* e300c1 (a 603e core, plus some) on 83xx */ 929 { /* e300c1 (a 603e core, plus some) on 83xx */
@@ -875,6 +935,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
875 .icache_bsize = 32, 935 .icache_bsize = 32,
876 .dcache_bsize = 32, 936 .dcache_bsize = 32,
877 .cpu_setup = __setup_cpu_603, 937 .cpu_setup = __setup_cpu_603,
938 .machine_check = machine_check_generic,
878 .platform = "ppc603", 939 .platform = "ppc603",
879 }, 940 },
880 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 941 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
@@ -886,6 +947,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
886 .icache_bsize = 32, 947 .icache_bsize = 32,
887 .dcache_bsize = 32, 948 .dcache_bsize = 32,
888 .cpu_setup = __setup_cpu_603, 949 .cpu_setup = __setup_cpu_603,
950 .machine_check = machine_check_generic,
889 .platform = "ppc603", 951 .platform = "ppc603",
890 }, 952 },
891 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 953 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
@@ -908,6 +970,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
908 .icache_bsize = 32, 970 .icache_bsize = 32,
909 .dcache_bsize = 32, 971 .dcache_bsize = 32,
910 .cpu_setup = __setup_cpu_603, 972 .cpu_setup = __setup_cpu_603,
973 .machine_check = machine_check_generic,
911 .platform = "ppc603", 974 .platform = "ppc603",
912 }, 975 },
913 { /* default match, we assume split I/D cache & TB (non-601)... */ 976 { /* default match, we assume split I/D cache & TB (non-601)... */
@@ -918,6 +981,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
918 .cpu_user_features = COMMON_USER, 981 .cpu_user_features = COMMON_USER,
919 .icache_bsize = 32, 982 .icache_bsize = 32,
920 .dcache_bsize = 32, 983 .dcache_bsize = 32,
984 .machine_check = machine_check_generic,
921 .platform = "ppc603", 985 .platform = "ppc603",
922 }, 986 },
923#endif /* CLASSIC_PPC */ 987#endif /* CLASSIC_PPC */
@@ -944,6 +1008,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
944 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1008 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
945 .icache_bsize = 16, 1009 .icache_bsize = 16,
946 .dcache_bsize = 16, 1010 .dcache_bsize = 16,
1011 .machine_check = machine_check_4xx,
947 .platform = "ppc403", 1012 .platform = "ppc403",
948 }, 1013 },
949 { /* 403GCX */ 1014 { /* 403GCX */
@@ -955,6 +1020,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
955 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1020 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
956 .icache_bsize = 16, 1021 .icache_bsize = 16,
957 .dcache_bsize = 16, 1022 .dcache_bsize = 16,
1023 .machine_check = machine_check_4xx,
958 .platform = "ppc403", 1024 .platform = "ppc403",
959 }, 1025 },
960 { /* 403G ?? */ 1026 { /* 403G ?? */
@@ -965,6 +1031,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
965 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1031 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
966 .icache_bsize = 16, 1032 .icache_bsize = 16,
967 .dcache_bsize = 16, 1033 .dcache_bsize = 16,
1034 .machine_check = machine_check_4xx,
968 .platform = "ppc403", 1035 .platform = "ppc403",
969 }, 1036 },
970 { /* 405GP */ 1037 { /* 405GP */
@@ -976,6 +1043,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
976 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1043 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
977 .icache_bsize = 32, 1044 .icache_bsize = 32,
978 .dcache_bsize = 32, 1045 .dcache_bsize = 32,
1046 .machine_check = machine_check_4xx,
979 .platform = "ppc405", 1047 .platform = "ppc405",
980 }, 1048 },
981 { /* STB 03xxx */ 1049 { /* STB 03xxx */
@@ -987,6 +1055,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
987 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1055 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
988 .icache_bsize = 32, 1056 .icache_bsize = 32,
989 .dcache_bsize = 32, 1057 .dcache_bsize = 32,
1058 .machine_check = machine_check_4xx,
990 .platform = "ppc405", 1059 .platform = "ppc405",
991 }, 1060 },
992 { /* STB 04xxx */ 1061 { /* STB 04xxx */
@@ -998,6 +1067,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
998 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1067 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
999 .icache_bsize = 32, 1068 .icache_bsize = 32,
1000 .dcache_bsize = 32, 1069 .dcache_bsize = 32,
1070 .machine_check = machine_check_4xx,
1001 .platform = "ppc405", 1071 .platform = "ppc405",
1002 }, 1072 },
1003 { /* NP405L */ 1073 { /* NP405L */
@@ -1009,6 +1079,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1009 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1079 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1010 .icache_bsize = 32, 1080 .icache_bsize = 32,
1011 .dcache_bsize = 32, 1081 .dcache_bsize = 32,
1082 .machine_check = machine_check_4xx,
1012 .platform = "ppc405", 1083 .platform = "ppc405",
1013 }, 1084 },
1014 { /* NP4GS3 */ 1085 { /* NP4GS3 */
@@ -1020,6 +1091,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1020 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1091 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1021 .icache_bsize = 32, 1092 .icache_bsize = 32,
1022 .dcache_bsize = 32, 1093 .dcache_bsize = 32,
1094 .machine_check = machine_check_4xx,
1023 .platform = "ppc405", 1095 .platform = "ppc405",
1024 }, 1096 },
1025 { /* NP405H */ 1097 { /* NP405H */
@@ -1031,6 +1103,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1031 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1103 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1032 .icache_bsize = 32, 1104 .icache_bsize = 32,
1033 .dcache_bsize = 32, 1105 .dcache_bsize = 32,
1106 .machine_check = machine_check_4xx,
1034 .platform = "ppc405", 1107 .platform = "ppc405",
1035 }, 1108 },
1036 { /* 405GPr */ 1109 { /* 405GPr */
@@ -1042,6 +1115,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1042 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1115 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1043 .icache_bsize = 32, 1116 .icache_bsize = 32,
1044 .dcache_bsize = 32, 1117 .dcache_bsize = 32,
1118 .machine_check = machine_check_4xx,
1045 .platform = "ppc405", 1119 .platform = "ppc405",
1046 }, 1120 },
1047 { /* STBx25xx */ 1121 { /* STBx25xx */
@@ -1053,6 +1127,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1053 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1127 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1054 .icache_bsize = 32, 1128 .icache_bsize = 32,
1055 .dcache_bsize = 32, 1129 .dcache_bsize = 32,
1130 .machine_check = machine_check_4xx,
1056 .platform = "ppc405", 1131 .platform = "ppc405",
1057 }, 1132 },
1058 { /* 405LP */ 1133 { /* 405LP */
@@ -1063,6 +1138,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1063 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1138 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1064 .icache_bsize = 32, 1139 .icache_bsize = 32,
1065 .dcache_bsize = 32, 1140 .dcache_bsize = 32,
1141 .machine_check = machine_check_4xx,
1066 .platform = "ppc405", 1142 .platform = "ppc405",
1067 }, 1143 },
1068 { /* Xilinx Virtex-II Pro */ 1144 { /* Xilinx Virtex-II Pro */
@@ -1074,6 +1150,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1074 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1150 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1075 .icache_bsize = 32, 1151 .icache_bsize = 32,
1076 .dcache_bsize = 32, 1152 .dcache_bsize = 32,
1153 .machine_check = machine_check_4xx,
1077 .platform = "ppc405", 1154 .platform = "ppc405",
1078 }, 1155 },
1079 { /* Xilinx Virtex-4 FX */ 1156 { /* Xilinx Virtex-4 FX */
@@ -1085,6 +1162,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1085 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1162 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1086 .icache_bsize = 32, 1163 .icache_bsize = 32,
1087 .dcache_bsize = 32, 1164 .dcache_bsize = 32,
1165 .machine_check = machine_check_4xx,
1088 .platform = "ppc405", 1166 .platform = "ppc405",
1089 }, 1167 },
1090 { /* 405EP */ 1168 { /* 405EP */
@@ -1096,6 +1174,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1096 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1174 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1097 .icache_bsize = 32, 1175 .icache_bsize = 32,
1098 .dcache_bsize = 32, 1176 .dcache_bsize = 32,
1177 .machine_check = machine_check_4xx,
1099 .platform = "ppc405", 1178 .platform = "ppc405",
1100 }, 1179 },
1101 { /* 405EX */ 1180 { /* 405EX */
@@ -1107,6 +1186,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1107 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1186 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1108 .icache_bsize = 32, 1187 .icache_bsize = 32,
1109 .dcache_bsize = 32, 1188 .dcache_bsize = 32,
1189 .machine_check = machine_check_4xx,
1110 .platform = "ppc405", 1190 .platform = "ppc405",
1111 }, 1191 },
1112 1192
@@ -1120,6 +1200,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1120 .cpu_user_features = COMMON_USER_BOOKE, 1200 .cpu_user_features = COMMON_USER_BOOKE,
1121 .icache_bsize = 32, 1201 .icache_bsize = 32,
1122 .dcache_bsize = 32, 1202 .dcache_bsize = 32,
1203 .machine_check = machine_check_4xx,
1123 .platform = "ppc440", 1204 .platform = "ppc440",
1124 }, 1205 },
1125 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1206 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
@@ -1131,6 +1212,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1131 .icache_bsize = 32, 1212 .icache_bsize = 32,
1132 .dcache_bsize = 32, 1213 .dcache_bsize = 32,
1133 .cpu_setup = __setup_cpu_440ep, 1214 .cpu_setup = __setup_cpu_440ep,
1215 .machine_check = machine_check_4xx,
1134 .platform = "ppc440", 1216 .platform = "ppc440",
1135 }, 1217 },
1136 { 1218 {
@@ -1141,6 +1223,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1141 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1223 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1142 .icache_bsize = 32, 1224 .icache_bsize = 32,
1143 .dcache_bsize = 32, 1225 .dcache_bsize = 32,
1226 .machine_check = machine_check_4xx,
1144 .platform = "ppc440", 1227 .platform = "ppc440",
1145 }, 1228 },
1146 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1229 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
@@ -1152,6 +1235,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1152 .icache_bsize = 32, 1235 .icache_bsize = 32,
1153 .dcache_bsize = 32, 1236 .dcache_bsize = 32,
1154 .cpu_setup = __setup_cpu_440ep, 1237 .cpu_setup = __setup_cpu_440ep,
1238 .machine_check = machine_check_4xx,
1155 .platform = "ppc440", 1239 .platform = "ppc440",
1156 }, 1240 },
1157 { /* 440GRX */ 1241 { /* 440GRX */
@@ -1163,6 +1247,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1163 .icache_bsize = 32, 1247 .icache_bsize = 32,
1164 .dcache_bsize = 32, 1248 .dcache_bsize = 32,
1165 .cpu_setup = __setup_cpu_440grx, 1249 .cpu_setup = __setup_cpu_440grx,
1250 .machine_check = machine_check_440A,
1166 .platform = "ppc440", 1251 .platform = "ppc440",
1167 }, 1252 },
1168 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1253 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
@@ -1174,6 +1259,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1174 .icache_bsize = 32, 1259 .icache_bsize = 32,
1175 .dcache_bsize = 32, 1260 .dcache_bsize = 32,
1176 .cpu_setup = __setup_cpu_440epx, 1261 .cpu_setup = __setup_cpu_440epx,
1262 .machine_check = machine_check_440A,
1177 .platform = "ppc440", 1263 .platform = "ppc440",
1178 }, 1264 },
1179 { /* 440GP Rev. B */ 1265 { /* 440GP Rev. B */
@@ -1184,6 +1270,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1184 .cpu_user_features = COMMON_USER_BOOKE, 1270 .cpu_user_features = COMMON_USER_BOOKE,
1185 .icache_bsize = 32, 1271 .icache_bsize = 32,
1186 .dcache_bsize = 32, 1272 .dcache_bsize = 32,
1273 .machine_check = machine_check_4xx,
1187 .platform = "ppc440gp", 1274 .platform = "ppc440gp",
1188 }, 1275 },
1189 { /* 440GP Rev. C */ 1276 { /* 440GP Rev. C */
@@ -1194,6 +1281,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1194 .cpu_user_features = COMMON_USER_BOOKE, 1281 .cpu_user_features = COMMON_USER_BOOKE,
1195 .icache_bsize = 32, 1282 .icache_bsize = 32,
1196 .dcache_bsize = 32, 1283 .dcache_bsize = 32,
1284 .machine_check = machine_check_4xx,
1197 .platform = "ppc440gp", 1285 .platform = "ppc440gp",
1198 }, 1286 },
1199 { /* 440GX Rev. A */ 1287 { /* 440GX Rev. A */
@@ -1204,6 +1292,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
1204 .cpu_user_features = COMMON_USER_BOOKE, 1292 .cpu_user_features = COMMON_USER_BOOKE,
1205 .icache_bsize = 32, 1293 .icache_bsize = 32,
1206 .dcache_bsize = 32, 1294 .dcache_bsize = 32,
1295 .cpu_setup = __setup_cpu_440gx,
1296 .machine_check = machine_check_440A,
1207 .platform = "ppc440", 1297 .platform = "ppc440",
1208 }, 1298 },
1209 { /* 440GX Rev. B */ 1299 { /* 440GX Rev. B */
@@ -1214,6 +1304,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
1214 .cpu_user_features = COMMON_USER_BOOKE, 1304 .cpu_user_features = COMMON_USER_BOOKE,
1215 .icache_bsize = 32, 1305 .icache_bsize = 32,
1216 .dcache_bsize = 32, 1306 .dcache_bsize = 32,
1307 .cpu_setup = __setup_cpu_440gx,
1308 .machine_check = machine_check_440A,
1217 .platform = "ppc440", 1309 .platform = "ppc440",
1218 }, 1310 },
1219 { /* 440GX Rev. C */ 1311 { /* 440GX Rev. C */
@@ -1224,6 +1316,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
1224 .cpu_user_features = COMMON_USER_BOOKE, 1316 .cpu_user_features = COMMON_USER_BOOKE,
1225 .icache_bsize = 32, 1317 .icache_bsize = 32,
1226 .dcache_bsize = 32, 1318 .dcache_bsize = 32,
1319 .cpu_setup = __setup_cpu_440gx,
1320 .machine_check = machine_check_440A,
1227 .platform = "ppc440", 1321 .platform = "ppc440",
1228 }, 1322 },
1229 { /* 440GX Rev. F */ 1323 { /* 440GX Rev. F */
@@ -1234,6 +1328,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
1234 .cpu_user_features = COMMON_USER_BOOKE, 1328 .cpu_user_features = COMMON_USER_BOOKE,
1235 .icache_bsize = 32, 1329 .icache_bsize = 32,
1236 .dcache_bsize = 32, 1330 .dcache_bsize = 32,
1331 .cpu_setup = __setup_cpu_440gx,
1332 .machine_check = machine_check_440A,
1237 .platform = "ppc440", 1333 .platform = "ppc440",
1238 }, 1334 },
1239 { /* 440SP Rev. A */ 1335 { /* 440SP Rev. A */
@@ -1244,6 +1340,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1244 .cpu_user_features = COMMON_USER_BOOKE, 1340 .cpu_user_features = COMMON_USER_BOOKE,
1245 .icache_bsize = 32, 1341 .icache_bsize = 32,
1246 .dcache_bsize = 32, 1342 .dcache_bsize = 32,
1343 .machine_check = machine_check_4xx,
1247 .platform = "ppc440", 1344 .platform = "ppc440",
1248 }, 1345 },
1249 { /* 440SPe Rev. A */ 1346 { /* 440SPe Rev. A */
@@ -1254,6 +1351,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
1254 .cpu_user_features = COMMON_USER_BOOKE, 1351 .cpu_user_features = COMMON_USER_BOOKE,
1255 .icache_bsize = 32, 1352 .icache_bsize = 32,
1256 .dcache_bsize = 32, 1353 .dcache_bsize = 32,
1354 .cpu_setup = __setup_cpu_440spe,
1355 .machine_check = machine_check_440A,
1257 .platform = "ppc440", 1356 .platform = "ppc440",
1258 }, 1357 },
1259 { /* 440SPe Rev. B */ 1358 { /* 440SPe Rev. B */
@@ -1264,10 +1363,13 @@ static struct cpu_spec __initdata cpu_specs[] = {
1264 .cpu_user_features = COMMON_USER_BOOKE, 1363 .cpu_user_features = COMMON_USER_BOOKE,
1265 .icache_bsize = 32, 1364 .icache_bsize = 32,
1266 .dcache_bsize = 32, 1365 .dcache_bsize = 32,
1366 .cpu_setup = __setup_cpu_440spe,
1367 .machine_check = machine_check_440A,
1267 .platform = "ppc440", 1368 .platform = "ppc440",
1268 }, 1369 },
1269#endif /* CONFIG_44x */ 1370#endif /* CONFIG_44x */
1270#ifdef CONFIG_FSL_BOOKE 1371#ifdef CONFIG_FSL_BOOKE
1372#ifdef CONFIG_E200
1271 { /* e200z5 */ 1373 { /* e200z5 */
1272 .pvr_mask = 0xfff00000, 1374 .pvr_mask = 0xfff00000,
1273 .pvr_value = 0x81000000, 1375 .pvr_value = 0x81000000,
@@ -1278,6 +1380,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1278 PPC_FEATURE_HAS_EFP_SINGLE | 1380 PPC_FEATURE_HAS_EFP_SINGLE |
1279 PPC_FEATURE_UNIFIED_CACHE, 1381 PPC_FEATURE_UNIFIED_CACHE,
1280 .dcache_bsize = 32, 1382 .dcache_bsize = 32,
1383 .machine_check = machine_check_e200,
1281 .platform = "ppc5554", 1384 .platform = "ppc5554",
1282 }, 1385 },
1283 { /* e200z6 */ 1386 { /* e200z6 */
@@ -1291,8 +1394,10 @@ static struct cpu_spec __initdata cpu_specs[] = {
1291 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1394 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1292 PPC_FEATURE_UNIFIED_CACHE, 1395 PPC_FEATURE_UNIFIED_CACHE,
1293 .dcache_bsize = 32, 1396 .dcache_bsize = 32,
1397 .machine_check = machine_check_e200,
1294 .platform = "ppc5554", 1398 .platform = "ppc5554",
1295 }, 1399 },
1400#elif defined(CONFIG_E500)
1296 { /* e500 */ 1401 { /* e500 */
1297 .pvr_mask = 0xffff0000, 1402 .pvr_mask = 0xffff0000,
1298 .pvr_value = 0x80200000, 1403 .pvr_value = 0x80200000,
@@ -1307,6 +1412,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1307 .num_pmcs = 4, 1412 .num_pmcs = 4,
1308 .oprofile_cpu_type = "ppc/e500", 1413 .oprofile_cpu_type = "ppc/e500",
1309 .oprofile_type = PPC_OPROFILE_BOOKE, 1414 .oprofile_type = PPC_OPROFILE_BOOKE,
1415 .machine_check = machine_check_e500,
1310 .platform = "ppc8540", 1416 .platform = "ppc8540",
1311 }, 1417 },
1312 { /* e500v2 */ 1418 { /* e500v2 */
@@ -1324,9 +1430,11 @@ static struct cpu_spec __initdata cpu_specs[] = {
1324 .num_pmcs = 4, 1430 .num_pmcs = 4,
1325 .oprofile_cpu_type = "ppc/e500", 1431 .oprofile_cpu_type = "ppc/e500",
1326 .oprofile_type = PPC_OPROFILE_BOOKE, 1432 .oprofile_type = PPC_OPROFILE_BOOKE,
1433 .machine_check = machine_check_e500,
1327 .platform = "ppc8548", 1434 .platform = "ppc8548",
1328 }, 1435 },
1329#endif 1436#endif
1437#endif
1330#if !CLASSIC_PPC 1438#if !CLASSIC_PPC
1331 { /* default match */ 1439 { /* default match */
1332 .pvr_mask = 0x00000000, 1440 .pvr_mask = 0x00000000,
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 56aba84c1f6e..ad071a146a8d 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -289,11 +289,8 @@ interrupt_base:
289 CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception) 289 CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
290 290
291 /* Machine Check Interrupt */ 291 /* Machine Check Interrupt */
292#ifdef CONFIG_440A
293 MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
294#else
295 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception) 292 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
296#endif 293 MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception)
297 294
298 /* Data Storage Interrupt */ 295 /* Data Storage Interrupt */
299 START_EXCEPTION(DataStorage) 296 START_EXCEPTION(DataStorage)
@@ -674,6 +671,15 @@ finish_tlb_load:
674 */ 671 */
675 672
676/* 673/*
674 * Adjust the machine check IVOR on 440A cores
675 */
676_GLOBAL(__fixup_440A_mcheck)
677 li r3,MachineCheckA@l
678 mtspr SPRN_IVOR1,r3
679 sync
680 blr
681
682/*
677 * extern void giveup_altivec(struct task_struct *prev) 683 * extern void giveup_altivec(struct task_struct *prev)
678 * 684 *
679 * The 44x core does not have an AltiVec unit. 685 * The 44x core does not have an AltiVec unit.
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index 8536e7676160..ba9393f8e77a 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -166,7 +166,7 @@ label:
166 mfspr r5,SPRN_ESR; \ 166 mfspr r5,SPRN_ESR; \
167 stw r5,_ESR(r11); \ 167 stw r5,_ESR(r11); \
168 addi r3,r1,STACK_FRAME_OVERHEAD; \ 168 addi r3,r1,STACK_FRAME_OVERHEAD; \
169 EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \ 169 EXC_XFER_TEMPLATE(hdlr, n+4, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
170 NOCOPY, mcheck_transfer_to_handler, \ 170 NOCOPY, mcheck_transfer_to_handler, \
171 ret_from_mcheck_exc) 171 ret_from_mcheck_exc)
172 172
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index ea1137851a4a..be09f0d2d90b 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -206,6 +206,45 @@ _GLOBAL(_nmask_and_or_msr)
206 isync 206 isync
207 blr /* Done */ 207 blr /* Done */
208 208
209#ifdef CONFIG_40x
210
211/*
212 * Do an IO access in real mode
213 */
214_GLOBAL(real_readb)
215 mfmsr r7
216 ori r0,r7,MSR_DR
217 xori r0,r0,MSR_DR
218 sync
219 mtmsr r0
220 sync
221 isync
222 lbz r3,0(r3)
223 sync
224 mtmsr r7
225 sync
226 isync
227 blr
228
229 /*
230 * Do an IO access in real mode
231 */
232_GLOBAL(real_writeb)
233 mfmsr r7
234 ori r0,r7,MSR_DR
235 xori r0,r0,MSR_DR
236 sync
237 mtmsr r0
238 sync
239 isync
240 stb r3,0(r4)
241 sync
242 mtmsr r7
243 sync
244 isync
245 blr
246
247#endif /* CONFIG_40x */
209 248
210/* 249/*
211 * Flush MMU TLB 250 * Flush MMU TLB
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 571854f2906c..d394d41b61d5 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1035,7 +1035,7 @@ clear_resource:
1035 } 1035 }
1036} 1036}
1037 1037
1038static inline int __devinit alloc_resource(struct pci_dev *dev, int idx) 1038static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
1039{ 1039{
1040 struct resource *pr, *r = &dev->resource[idx]; 1040 struct resource *pr, *r = &dev->resource[idx];
1041 1041
@@ -1059,10 +1059,7 @@ static inline int __devinit alloc_resource(struct pci_dev *dev, int idx)
1059 r->flags |= IORESOURCE_UNSET; 1059 r->flags |= IORESOURCE_UNSET;
1060 r->end -= r->start; 1060 r->end -= r->start;
1061 r->start = 0; 1061 r->start = 0;
1062
1063 return -EBUSY;
1064 } 1062 }
1065 return 0;
1066} 1063}
1067 1064
1068static void __init pcibios_allocate_resources(int pass) 1065static void __init pcibios_allocate_resources(int pass)
@@ -1084,12 +1081,8 @@ static void __init pcibios_allocate_resources(int pass)
1084 disabled = !(command & PCI_COMMAND_IO); 1081 disabled = !(command & PCI_COMMAND_IO);
1085 else 1082 else
1086 disabled = !(command & PCI_COMMAND_MEMORY); 1083 disabled = !(command & PCI_COMMAND_MEMORY);
1087 if (pass == disabled && alloc_resource(dev, idx)) { 1084 if (pass == disabled)
1088 command &= ~(r->flags & (IORESOURCE_IO | 1085 alloc_resource(dev, idx);
1089 IORESOURCE_MEM));
1090 pci_write_config_word(dev,
1091 PCI_COMMAND, command);
1092 }
1093 } 1086 }
1094 if (pass) 1087 if (pass)
1095 continue; 1088 continue;
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 6c2d8836f77d..8b5efbce8d90 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -614,6 +614,29 @@ static struct feature_property {
614#endif /* CONFIG_PPC64 */ 614#endif /* CONFIG_PPC64 */
615}; 615};
616 616
617#if defined(CONFIG_44x) && defined(CONFIG_PPC_FPU)
618static inline void identical_pvr_fixup(unsigned long node)
619{
620 unsigned int pvr;
621 char *model = of_get_flat_dt_prop(node, "model", NULL);
622
623 /*
624 * Since 440GR(x)/440EP(x) processors have the same pvr,
625 * we check the node path and set bit 28 in the cur_cpu_spec
626 * pvr for EP(x) processor version. This bit is always 0 in
627 * the "real" pvr. Then we call identify_cpu again with
628 * the new logical pvr to enable FPU support.
629 */
630 if (model && strstr(model, "440EP")) {
631 pvr = cur_cpu_spec->pvr_value | 0x8;
632 identify_cpu(0, pvr);
633 DBG("Using logical pvr %x for %s\n", pvr, model);
634 }
635}
636#else
637#define identical_pvr_fixup(node) do { } while(0)
638#endif
639
617static void __init check_cpu_feature_properties(unsigned long node) 640static void __init check_cpu_feature_properties(unsigned long node)
618{ 641{
619 unsigned long i; 642 unsigned long i;
@@ -711,18 +734,8 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
711 prop = of_get_flat_dt_prop(node, "cpu-version", NULL); 734 prop = of_get_flat_dt_prop(node, "cpu-version", NULL);
712 if (prop && (*prop & 0xff000000) == 0x0f000000) 735 if (prop && (*prop & 0xff000000) == 0x0f000000)
713 identify_cpu(0, *prop); 736 identify_cpu(0, *prop);
714#if defined(CONFIG_44x) && defined(CONFIG_PPC_FPU) 737
715 /* 738 identical_pvr_fixup(node);
716 * Since 440GR(x)/440EP(x) processors have the same pvr,
717 * we check the node path and set bit 28 in the cur_cpu_spec
718 * pvr for EP(x) processor version. This bit is always 0 in
719 * the "real" pvr. Then we call identify_cpu again with
720 * the new logical pvr to enable FPU support.
721 */
722 if (strstr(uname, "440EP")) {
723 identify_cpu(0, cur_cpu_spec->pvr_value | 0x8);
724 }
725#endif
726 } 739 }
727 740
728 check_cpu_feature_properties(node); 741 check_cpu_feature_properties(node);
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index cad64840fce4..848a20475db8 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -334,18 +334,25 @@ static inline int check_io_access(struct pt_regs *regs)
334#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 334#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
335#endif 335#endif
336 336
337static int generic_machine_check_exception(struct pt_regs *regs) 337#if defined(CONFIG_4xx)
338int machine_check_4xx(struct pt_regs *regs)
338{ 339{
339 unsigned long reason = get_mc_reason(regs); 340 unsigned long reason = get_mc_reason(regs);
340 341
341#if defined(CONFIG_4xx) && !defined(CONFIG_440A)
342 if (reason & ESR_IMCP) { 342 if (reason & ESR_IMCP) {
343 printk("Instruction"); 343 printk("Instruction");
344 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 344 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
345 } else 345 } else
346 printk("Data"); 346 printk("Data");
347 printk(" machine check in kernel mode.\n"); 347 printk(" machine check in kernel mode.\n");
348#elif defined(CONFIG_440A) 348
349 return 0;
350}
351
352int machine_check_440A(struct pt_regs *regs)
353{
354 unsigned long reason = get_mc_reason(regs);
355
349 printk("Machine check in kernel mode.\n"); 356 printk("Machine check in kernel mode.\n");
350 if (reason & ESR_IMCP){ 357 if (reason & ESR_IMCP){
351 printk("Instruction Synchronous Machine Check exception\n"); 358 printk("Instruction Synchronous Machine Check exception\n");
@@ -375,7 +382,13 @@ static int generic_machine_check_exception(struct pt_regs *regs)
375 /* Clear MCSR */ 382 /* Clear MCSR */
376 mtspr(SPRN_MCSR, mcsr); 383 mtspr(SPRN_MCSR, mcsr);
377 } 384 }
378#elif defined (CONFIG_E500) 385 return 0;
386}
387#elif defined(CONFIG_E500)
388int machine_check_e500(struct pt_regs *regs)
389{
390 unsigned long reason = get_mc_reason(regs);
391
379 printk("Machine check in kernel mode.\n"); 392 printk("Machine check in kernel mode.\n");
380 printk("Caused by (from MCSR=%lx): ", reason); 393 printk("Caused by (from MCSR=%lx): ", reason);
381 394
@@ -403,7 +416,14 @@ static int generic_machine_check_exception(struct pt_regs *regs)
403 printk("Bus - Instruction Parity Error\n"); 416 printk("Bus - Instruction Parity Error\n");
404 if (reason & MCSR_BUS_RPERR) 417 if (reason & MCSR_BUS_RPERR)
405 printk("Bus - Read Parity Error\n"); 418 printk("Bus - Read Parity Error\n");
406#elif defined (CONFIG_E200) 419
420 return 0;
421}
422#elif defined(CONFIG_E200)
423int machine_check_e200(struct pt_regs *regs)
424{
425 unsigned long reason = get_mc_reason(regs);
426
407 printk("Machine check in kernel mode.\n"); 427 printk("Machine check in kernel mode.\n");
408 printk("Caused by (from MCSR=%lx): ", reason); 428 printk("Caused by (from MCSR=%lx): ", reason);
409 429
@@ -421,7 +441,14 @@ static int generic_machine_check_exception(struct pt_regs *regs)
421 printk("Bus - Read Bus Error on data load\n"); 441 printk("Bus - Read Bus Error on data load\n");
422 if (reason & MCSR_BUS_WRERR) 442 if (reason & MCSR_BUS_WRERR)
423 printk("Bus - Write Bus Error on buffered store or cache line push\n"); 443 printk("Bus - Write Bus Error on buffered store or cache line push\n");
424#else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */ 444
445 return 0;
446}
447#else
448int machine_check_generic(struct pt_regs *regs)
449{
450 unsigned long reason = get_mc_reason(regs);
451
425 printk("Machine check in kernel mode.\n"); 452 printk("Machine check in kernel mode.\n");
426 printk("Caused by (from SRR1=%lx): ", reason); 453 printk("Caused by (from SRR1=%lx): ", reason);
427 switch (reason & 0x601F0000) { 454 switch (reason & 0x601F0000) {
@@ -451,22 +478,26 @@ static int generic_machine_check_exception(struct pt_regs *regs)
451 default: 478 default:
452 printk("Unknown values in msr\n"); 479 printk("Unknown values in msr\n");
453 } 480 }
454#endif /* CONFIG_4xx */
455
456 return 0; 481 return 0;
457} 482}
483#endif /* everything else */
458 484
459void machine_check_exception(struct pt_regs *regs) 485void machine_check_exception(struct pt_regs *regs)
460{ 486{
461 int recover = 0; 487 int recover = 0;
462 488
463 /* See if any machine dependent calls */ 489 /* See if any machine dependent calls. In theory, we would want
490 * to call the CPU first, and call the ppc_md. one if the CPU
491 * one returns a positive number. However there is existing code
492 * that assumes the board gets a first chance, so let's keep it
493 * that way for now and fix things later. --BenH.
494 */
464 if (ppc_md.machine_check_exception) 495 if (ppc_md.machine_check_exception)
465 recover = ppc_md.machine_check_exception(regs); 496 recover = ppc_md.machine_check_exception(regs);
466 else 497 else if (cur_cpu_spec->machine_check)
467 recover = generic_machine_check_exception(regs); 498 recover = cur_cpu_spec->machine_check(regs);
468 499
469 if (recover) 500 if (recover > 0)
470 return; 501 return;
471 502
472 if (user_mode(regs)) { 503 if (user_mode(regs)) {
@@ -476,7 +507,12 @@ void machine_check_exception(struct pt_regs *regs)
476 } 507 }
477 508
478#if defined(CONFIG_8xx) && defined(CONFIG_PCI) 509#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
479 /* the qspan pci read routines can cause machine checks -- Cort */ 510 /* the qspan pci read routines can cause machine checks -- Cort
511 *
512 * yuck !!! that totally needs to go away ! There are better ways
513 * to deal with that than having a wart in the mcheck handler.
514 * -- BenH
515 */
480 bad_page_fault(regs, regs->dar, SIGBUS); 516 bad_page_fault(regs, regs->dar, SIGBUS);
481 return; 517 return;
482#endif 518#endif
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index eba148f2a31c..7aad6203e411 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -54,6 +54,9 @@ void __init udbg_early_init(void)
54#elif defined(CONFIG_PPC_EARLY_DEBUG_44x) 54#elif defined(CONFIG_PPC_EARLY_DEBUG_44x)
55 /* PPC44x debug */ 55 /* PPC44x debug */
56 udbg_init_44x_as1(); 56 udbg_init_44x_as1();
57#elif defined(CONFIG_PPC_EARLY_DEBUG_40x)
58 /* PPC40x debug */
59 udbg_init_40x_realmode();
57#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM) 60#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM)
58 udbg_init_cpm(); 61 udbg_init_cpm();
59#endif 62#endif
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index df740eae77b8..cb01ebc59387 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -225,3 +225,36 @@ void __init udbg_init_44x_as1(void)
225 udbg_getc = udbg_44x_as1_getc; 225 udbg_getc = udbg_44x_as1_getc;
226} 226}
227#endif /* CONFIG_PPC_EARLY_DEBUG_44x */ 227#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
228
229#ifdef CONFIG_PPC_EARLY_DEBUG_40x
230static void udbg_40x_real_putc(char c)
231{
232 if (udbg_comport) {
233 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
234 /* wait for idle */;
235 real_writeb(c, &udbg_comport->thr); eieio();
236 if (c == '\n')
237 udbg_40x_real_putc('\r');
238 }
239}
240
241static int udbg_40x_real_getc(void)
242{
243 if (udbg_comport) {
244 while ((real_readb(&udbg_comport->lsr) & LSR_DR) == 0)
245 ; /* wait for char */
246 return real_readb(&udbg_comport->rbr);
247 }
248 return -1;
249}
250
251void __init udbg_init_40x_realmode(void)
252{
253 udbg_comport = (struct NS16550 __iomem *)
254 CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
255
256 udbg_putc = udbg_40x_real_putc;
257 udbg_getc = udbg_40x_real_getc;
258 udbg_getc_poll = NULL;
259}
260#endif /* CONFIG_PPC_EARLY_DEBUG_40x */
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index 8f6699fcc145..74f31177e47a 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -14,28 +14,34 @@
14# help 14# help
15# This option enables support for the CPCI405 board. 15# This option enables support for the CPCI405 board.
16 16
17#config EP405 17config EP405
18# bool "EP405/EP405PC" 18 bool "EP405/EP405PC"
19# depends on 40x 19 depends on 40x
20# default n 20 default n
21# select 405GP 21 select 405GP
22# help 22 select PCI
23# This option enables support for the EP405/EP405PC boards. 23 help
24 24 This option enables support for the EP405/EP405PC boards.
25#config EP405PC
26# bool "EP405PC Support"
27# depends on EP405
28# default y
29# help
30# This option enables support for the extra features of the EP405PC board.
31 25
32config KILAUEA 26config KILAUEA
33 bool "Kilauea" 27 bool "Kilauea"
34 depends on 40x 28 depends on 40x
35 default n 29 default n
30 select 405EX
31 select PPC4xx_PCI_EXPRESS
36 help 32 help
37 This option enables support for the AMCC PPC405EX evaluation board. 33 This option enables support for the AMCC PPC405EX evaluation board.
38 34
35config MAKALU
36 bool "Makalu"
37 depends on 40x
38 default n
39 select 405EX
40 select PCI
41 select PPC4xx_PCI_EXPRESS
42 help
43 This option enables support for the AMCC PPC405EX board.
44
39#config REDWOOD_5 45#config REDWOOD_5
40# bool "Redwood-5" 46# bool "Redwood-5"
41# depends on 40x 47# depends on 40x
@@ -65,6 +71,7 @@ config WALNUT
65 depends on 40x 71 depends on 40x
66 default y 72 default y
67 select 405GP 73 select 405GP
74 select PCI
68 help 75 help
69 This option enables support for the IBM PPC405GP evaluation board. 76 This option enables support for the IBM PPC405GP evaluation board.
70 77
@@ -105,6 +112,11 @@ config 405GP
105config 405EP 112config 405EP
106 bool 113 bool
107 114
115config 405EX
116 bool
117 select IBM_NEW_EMAC_EMAC4
118 select IBM_NEW_EMAC_RGMII
119
108config 405GPR 120config 405GPR
109 bool 121 bool
110 122
diff --git a/arch/powerpc/platforms/40x/Makefile b/arch/powerpc/platforms/40x/Makefile
index 51dadeee6fc6..5533a5c8ce4e 100644
--- a/arch/powerpc/platforms/40x/Makefile
+++ b/arch/powerpc/platforms/40x/Makefile
@@ -1,3 +1,5 @@
1obj-$(CONFIG_KILAUEA) += kilauea.o 1obj-$(CONFIG_KILAUEA) += kilauea.o
2obj-$(CONFIG_MAKALU) += makalu.o
2obj-$(CONFIG_WALNUT) += walnut.o 3obj-$(CONFIG_WALNUT) += walnut.o
3obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o 4obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o
5obj-$(CONFIG_EP405) += ep405.o
diff --git a/arch/powerpc/platforms/40x/ep405.c b/arch/powerpc/platforms/40x/ep405.c
new file mode 100644
index 000000000000..13d1345026da
--- /dev/null
+++ b/arch/powerpc/platforms/40x/ep405.c
@@ -0,0 +1,123 @@
1/*
2 * Architecture- / platform-specific boot-time initialization code for
3 * IBM PowerPC 4xx based boards. Adapted from original
4 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
5 * <dan@net4x.com>.
6 *
7 * Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
8 *
9 * Rewritten and ported to the merged powerpc tree:
10 * Copyright 2007 IBM Corporation
11 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
12 *
13 * Adapted to EP405 by Ben. Herrenschmidt <benh@kernel.crashing.org>
14 *
15 * TODO: Wire up the PCI IRQ mux and the southbridge interrupts
16 *
17 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
18 * the terms of the GNU General Public License version 2. This program
19 * is licensed "as is" without any warranty of any kind, whether express
20 * or implied.
21 */
22
23#include <linux/init.h>
24#include <linux/of_platform.h>
25
26#include <asm/machdep.h>
27#include <asm/prom.h>
28#include <asm/udbg.h>
29#include <asm/time.h>
30#include <asm/uic.h>
31#include <asm/pci-bridge.h>
32
33static struct device_node *bcsr_node;
34static void __iomem *bcsr_regs;
35
36/* BCSR registers */
37#define BCSR_ID 0
38#define BCSR_PCI_CTRL 1
39#define BCSR_FLASH_NV_POR_CTRL 2
40#define BCSR_FENET_UART_CTRL 3
41#define BCSR_PCI_IRQ 4
42#define BCSR_XIRQ_SELECT 5
43#define BCSR_XIRQ_ROUTING 6
44#define BCSR_XIRQ_STATUS 7
45#define BCSR_XIRQ_STATUS2 8
46#define BCSR_SW_STAT_LED_CTRL 9
47#define BCSR_GPIO_IRQ_PAR_CTRL 10
48/* there's more, can't be bothered typing them tho */
49
50
51static __initdata struct of_device_id ep405_of_bus[] = {
52 { .compatible = "ibm,plb3", },
53 { .compatible = "ibm,opb", },
54 { .compatible = "ibm,ebc", },
55 {},
56};
57
58static int __init ep405_device_probe(void)
59{
60 of_platform_bus_probe(NULL, ep405_of_bus, NULL);
61
62 return 0;
63}
64machine_device_initcall(ep405, ep405_device_probe);
65
66static void __init ep405_init_bcsr(void)
67{
68 const u8 *irq_routing;
69 int i;
70
71 /* Find the bloody thing & map it */
72 bcsr_node = of_find_compatible_node(NULL, NULL, "ep405-bcsr");
73 if (bcsr_node == NULL) {
74 printk(KERN_ERR "EP405 BCSR not found !\n");
75 return;
76 }
77 bcsr_regs = of_iomap(bcsr_node, 0);
78 if (bcsr_regs == NULL) {
79 printk(KERN_ERR "EP405 BCSR failed to map !\n");
80 return;
81 }
82
83 /* Get the irq-routing property and apply the routing to the CPLD */
84 irq_routing = of_get_property(bcsr_node, "irq-routing", NULL);
85 if (irq_routing == NULL)
86 return;
87 for (i = 0; i < 16; i++) {
88 u8 irq = irq_routing[i];
89 out_8(bcsr_regs + BCSR_XIRQ_SELECT, i);
90 out_8(bcsr_regs + BCSR_XIRQ_ROUTING, irq);
91 }
92 in_8(bcsr_regs + BCSR_XIRQ_SELECT);
93 mb();
94 out_8(bcsr_regs + BCSR_GPIO_IRQ_PAR_CTRL, 0xfe);
95}
96
97static void __init ep405_setup_arch(void)
98{
99 /* Find & init the BCSR CPLD */
100 ep405_init_bcsr();
101
102 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
103}
104
105static int __init ep405_probe(void)
106{
107 unsigned long root = of_get_flat_dt_root();
108
109 if (!of_flat_dt_is_compatible(root, "ep405"))
110 return 0;
111
112 return 1;
113}
114
115define_machine(ep405) {
116 .name = "EP405",
117 .probe = ep405_probe,
118 .setup_arch = ep405_setup_arch,
119 .progress = udbg_progress,
120 .init_IRQ = uic_init_tree,
121 .get_irq = uic_get_irq,
122 .calibrate_decr = generic_calibrate_decr,
123};
diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c
index 1bffdbdd21b1..f9206a7fede0 100644
--- a/arch/powerpc/platforms/40x/kilauea.c
+++ b/arch/powerpc/platforms/40x/kilauea.c
@@ -19,8 +19,9 @@
19#include <asm/udbg.h> 19#include <asm/udbg.h>
20#include <asm/time.h> 20#include <asm/time.h>
21#include <asm/uic.h> 21#include <asm/uic.h>
22#include <asm/pci-bridge.h>
22 23
23static struct of_device_id kilauea_of_bus[] = { 24static __initdata struct of_device_id kilauea_of_bus[] = {
24 { .compatible = "ibm,plb4", }, 25 { .compatible = "ibm,plb4", },
25 { .compatible = "ibm,opb", }, 26 { .compatible = "ibm,opb", },
26 { .compatible = "ibm,ebc", }, 27 { .compatible = "ibm,ebc", },
@@ -29,14 +30,11 @@ static struct of_device_id kilauea_of_bus[] = {
29 30
30static int __init kilauea_device_probe(void) 31static int __init kilauea_device_probe(void)
31{ 32{
32 if (!machine_is(kilauea))
33 return 0;
34
35 of_platform_bus_probe(NULL, kilauea_of_bus, NULL); 33 of_platform_bus_probe(NULL, kilauea_of_bus, NULL);
36 34
37 return 0; 35 return 0;
38} 36}
39device_initcall(kilauea_device_probe); 37machine_device_initcall(kilauea, kilauea_device_probe);
40 38
41static int __init kilauea_probe(void) 39static int __init kilauea_probe(void)
42{ 40{
@@ -45,6 +43,8 @@ static int __init kilauea_probe(void)
45 if (!of_flat_dt_is_compatible(root, "amcc,kilauea")) 43 if (!of_flat_dt_is_compatible(root, "amcc,kilauea"))
46 return 0; 44 return 0;
47 45
46 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
47
48 return 1; 48 return 1;
49} 49}
50 50
diff --git a/arch/powerpc/platforms/40x/makalu.c b/arch/powerpc/platforms/40x/makalu.c
new file mode 100644
index 000000000000..4e4df72fc9cd
--- /dev/null
+++ b/arch/powerpc/platforms/40x/makalu.c
@@ -0,0 +1,58 @@
1/*
2 * Makalu board specific routines
3 *
4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * Based on the Walnut code by
7 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
8 * Copyright 2007 IBM Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15#include <linux/init.h>
16#include <linux/of_platform.h>
17#include <asm/machdep.h>
18#include <asm/prom.h>
19#include <asm/udbg.h>
20#include <asm/time.h>
21#include <asm/uic.h>
22#include <asm/pci-bridge.h>
23
24static __initdata struct of_device_id makalu_of_bus[] = {
25 { .compatible = "ibm,plb4", },
26 { .compatible = "ibm,opb", },
27 { .compatible = "ibm,ebc", },
28 {},
29};
30
31static int __init makalu_device_probe(void)
32{
33 of_platform_bus_probe(NULL, makalu_of_bus, NULL);
34
35 return 0;
36}
37machine_device_initcall(makalu, makalu_device_probe);
38
39static int __init makalu_probe(void)
40{
41 unsigned long root = of_get_flat_dt_root();
42
43 if (!of_flat_dt_is_compatible(root, "amcc,makalu"))
44 return 0;
45
46 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
47
48 return 1;
49}
50
51define_machine(makalu) {
52 .name = "Makalu",
53 .probe = makalu_probe,
54 .progress = udbg_progress,
55 .init_IRQ = uic_init_tree,
56 .get_irq = uic_get_irq,
57 .calibrate_decr = generic_calibrate_decr,
58};
diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c
index 14bbc328170f..43fcc8e9f7d0 100644
--- a/arch/powerpc/platforms/40x/virtex.c
+++ b/arch/powerpc/platforms/40x/virtex.c
@@ -17,14 +17,11 @@
17 17
18static int __init virtex_device_probe(void) 18static int __init virtex_device_probe(void)
19{ 19{
20 if (!machine_is(virtex))
21 return 0;
22
23 of_platform_bus_probe(NULL, NULL, NULL); 20 of_platform_bus_probe(NULL, NULL, NULL);
24 21
25 return 0; 22 return 0;
26} 23}
27device_initcall(virtex_device_probe); 24machine_device_initcall(virtex, virtex_device_probe);
28 25
29static int __init virtex_probe(void) 26static int __init virtex_probe(void)
30{ 27{
diff --git a/arch/powerpc/platforms/40x/walnut.c b/arch/powerpc/platforms/40x/walnut.c
index ff6db2431798..f115b6dbf5ad 100644
--- a/arch/powerpc/platforms/40x/walnut.c
+++ b/arch/powerpc/platforms/40x/walnut.c
@@ -24,8 +24,9 @@
24#include <asm/udbg.h> 24#include <asm/udbg.h>
25#include <asm/time.h> 25#include <asm/time.h>
26#include <asm/uic.h> 26#include <asm/uic.h>
27#include <asm/pci-bridge.h>
27 28
28static struct of_device_id walnut_of_bus[] = { 29static __initdata struct of_device_id walnut_of_bus[] = {
29 { .compatible = "ibm,plb3", }, 30 { .compatible = "ibm,plb3", },
30 { .compatible = "ibm,opb", }, 31 { .compatible = "ibm,opb", },
31 { .compatible = "ibm,ebc", }, 32 { .compatible = "ibm,ebc", },
@@ -34,15 +35,11 @@ static struct of_device_id walnut_of_bus[] = {
34 35
35static int __init walnut_device_probe(void) 36static int __init walnut_device_probe(void)
36{ 37{
37 if (!machine_is(walnut))
38 return 0;
39
40 /* FIXME: do bus probe here */
41 of_platform_bus_probe(NULL, walnut_of_bus, NULL); 38 of_platform_bus_probe(NULL, walnut_of_bus, NULL);
42 39
43 return 0; 40 return 0;
44} 41}
45device_initcall(walnut_device_probe); 42machine_device_initcall(walnut, walnut_device_probe);
46 43
47static int __init walnut_probe(void) 44static int __init walnut_probe(void)
48{ 45{
@@ -51,6 +48,8 @@ static int __init walnut_probe(void)
51 if (!of_flat_dt_is_compatible(root, "ibm,walnut")) 48 if (!of_flat_dt_is_compatible(root, "ibm,walnut"))
52 return 0; 49 return 0;
53 50
51 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
52
54 return 1; 53 return 1;
55} 54}
56 55
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 8390cc164135..d24801305344 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -3,6 +3,7 @@ config BAMBOO
3 depends on 44x 3 depends on 44x
4 default n 4 default n
5 select 440EP 5 select 440EP
6 select PCI
6 help 7 help
7 This option enables support for the IBM PPC440EP evaluation board. 8 This option enables support for the IBM PPC440EP evaluation board.
8 9
@@ -11,6 +12,7 @@ config EBONY
11 depends on 44x 12 depends on 44x
12 default y 13 default y
13 select 440GP 14 select 440GP
15 select PCI
14 help 16 help
15 This option enables support for the IBM PPC440GP evaluation board. 17 This option enables support for the IBM PPC440GP evaluation board.
16 18
@@ -22,6 +24,35 @@ config SEQUOIA
22 help 24 help
23 This option enables support for the AMCC PPC440EPX evaluation board. 25 This option enables support for the AMCC PPC440EPX evaluation board.
24 26
27config TAISHAN
28 bool "Taishan"
29 depends on 44x
30 default n
31 select 440GX
32 select PCI
33 help
34 This option enables support for the AMCC PPC440GX "Taishan"
35 evaluation board.
36
37config KATMAI
38 bool "Katmai"
39 depends on 44x
40 default n
41 select 440SPe
42 select PCI
43 select PPC4xx_PCI_EXPRESS
44 help
45 This option enables support for the AMCC PPC440SPe evaluation board.
46
47config RAINIER
48 bool "Rainier"
49 depends on 44x
50 default n
51 select 440GRX
52 select PCI
53 help
54 This option enables support for the AMCC PPC440GRX evaluation board.
55
25#config LUAN 56#config LUAN
26# bool "Luan" 57# bool "Luan"
27# depends on 44x 58# depends on 44x
@@ -52,20 +83,29 @@ config 440EPX
52 select IBM_NEW_EMAC_RGMII 83 select IBM_NEW_EMAC_RGMII
53 select IBM_NEW_EMAC_ZMII 84 select IBM_NEW_EMAC_ZMII
54 85
86config 440GRX
87 bool
88 select IBM_NEW_EMAC_EMAC4
89 select IBM_NEW_EMAC_RGMII
90 select IBM_NEW_EMAC_ZMII
91
55config 440GP 92config 440GP
56 bool 93 bool
57 select IBM_NEW_EMAC_ZMII 94 select IBM_NEW_EMAC_ZMII
58 95
59config 440GX 96config 440GX
60 bool 97 bool
98 select IBM_NEW_EMAC_EMAC4
99 select IBM_NEW_EMAC_RGMII
100 select IBM_NEW_EMAC_ZMII #test only
101 select IBM_NEW_EMAC_TAH #test only
61 102
62config 440SP 103config 440SP
63 bool 104 bool
64 105
65config 440A 106config 440SPe
107 select IBM_NEW_EMAC_EMAC4
66 bool 108 bool
67 depends on 440GX || 440EPX
68 default y
69 109
70# 44x errata/workaround config symbols, selected by the CPU models above 110# 44x errata/workaround config symbols, selected by the CPU models above
71config IBM440EP_ERR42 111config IBM440EP_ERR42
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 10ce6740cc7d..a2a0dc13e9e9 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -1,4 +1,7 @@
1obj-$(CONFIG_44x) := misc_44x.o 1obj-$(CONFIG_44x) := misc_44x.o
2obj-$(CONFIG_EBONY) += ebony.o 2obj-$(CONFIG_EBONY) += ebony.o
3obj-$(CONFIG_BAMBOO) += bamboo.o 3obj-$(CONFIG_TAISHAN) += taishan.o
4obj-$(CONFIG_BAMBOO) += bamboo.o
4obj-$(CONFIG_SEQUOIA) += sequoia.o 5obj-$(CONFIG_SEQUOIA) += sequoia.o
6obj-$(CONFIG_KATMAI) += katmai.o
7obj-$(CONFIG_RAINIER) += rainier.o
diff --git a/arch/powerpc/platforms/44x/bamboo.c b/arch/powerpc/platforms/44x/bamboo.c
index be23f112184f..fb9a22a7e8d0 100644
--- a/arch/powerpc/platforms/44x/bamboo.c
+++ b/arch/powerpc/platforms/44x/bamboo.c
@@ -21,9 +21,11 @@
21#include <asm/udbg.h> 21#include <asm/udbg.h>
22#include <asm/time.h> 22#include <asm/time.h>
23#include <asm/uic.h> 23#include <asm/uic.h>
24#include <asm/pci-bridge.h>
25
24#include "44x.h" 26#include "44x.h"
25 27
26static struct of_device_id bamboo_of_bus[] = { 28static __initdata struct of_device_id bamboo_of_bus[] = {
27 { .compatible = "ibm,plb4", }, 29 { .compatible = "ibm,plb4", },
28 { .compatible = "ibm,opb", }, 30 { .compatible = "ibm,opb", },
29 { .compatible = "ibm,ebc", }, 31 { .compatible = "ibm,ebc", },
@@ -32,14 +34,11 @@ static struct of_device_id bamboo_of_bus[] = {
32 34
33static int __init bamboo_device_probe(void) 35static int __init bamboo_device_probe(void)
34{ 36{
35 if (!machine_is(bamboo))
36 return 0;
37
38 of_platform_bus_probe(NULL, bamboo_of_bus, NULL); 37 of_platform_bus_probe(NULL, bamboo_of_bus, NULL);
39 38
40 return 0; 39 return 0;
41} 40}
42device_initcall(bamboo_device_probe); 41machine_device_initcall(bamboo, bamboo_device_probe);
43 42
44static int __init bamboo_probe(void) 43static int __init bamboo_probe(void)
45{ 44{
@@ -48,6 +47,8 @@ static int __init bamboo_probe(void)
48 if (!of_flat_dt_is_compatible(root, "amcc,bamboo")) 47 if (!of_flat_dt_is_compatible(root, "amcc,bamboo"))
49 return 0; 48 return 0;
50 49
50 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
51
51 return 1; 52 return 1;
52} 53}
53 54
diff --git a/arch/powerpc/platforms/44x/ebony.c b/arch/powerpc/platforms/44x/ebony.c
index 6cd3476767cc..481a016e1535 100644
--- a/arch/powerpc/platforms/44x/ebony.c
+++ b/arch/powerpc/platforms/44x/ebony.c
@@ -24,10 +24,11 @@
24#include <asm/udbg.h> 24#include <asm/udbg.h>
25#include <asm/time.h> 25#include <asm/time.h>
26#include <asm/uic.h> 26#include <asm/uic.h>
27#include <asm/pci-bridge.h>
27 28
28#include "44x.h" 29#include "44x.h"
29 30
30static struct of_device_id ebony_of_bus[] = { 31static __initdata struct of_device_id ebony_of_bus[] = {
31 { .compatible = "ibm,plb4", }, 32 { .compatible = "ibm,plb4", },
32 { .compatible = "ibm,opb", }, 33 { .compatible = "ibm,opb", },
33 { .compatible = "ibm,ebc", }, 34 { .compatible = "ibm,ebc", },
@@ -36,14 +37,11 @@ static struct of_device_id ebony_of_bus[] = {
36 37
37static int __init ebony_device_probe(void) 38static int __init ebony_device_probe(void)
38{ 39{
39 if (!machine_is(ebony))
40 return 0;
41
42 of_platform_bus_probe(NULL, ebony_of_bus, NULL); 40 of_platform_bus_probe(NULL, ebony_of_bus, NULL);
43 41
44 return 0; 42 return 0;
45} 43}
46device_initcall(ebony_device_probe); 44machine_device_initcall(ebony, ebony_device_probe);
47 45
48/* 46/*
49 * Called very early, MMU is off, device-tree isn't unflattened 47 * Called very early, MMU is off, device-tree isn't unflattened
@@ -55,6 +53,8 @@ static int __init ebony_probe(void)
55 if (!of_flat_dt_is_compatible(root, "ibm,ebony")) 53 if (!of_flat_dt_is_compatible(root, "ibm,ebony"))
56 return 0; 54 return 0;
57 55
56 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
57
58 return 1; 58 return 1;
59} 59}
60 60
diff --git a/arch/powerpc/platforms/44x/katmai.c b/arch/powerpc/platforms/44x/katmai.c
new file mode 100644
index 000000000000..11134121f272
--- /dev/null
+++ b/arch/powerpc/platforms/44x/katmai.c
@@ -0,0 +1,63 @@
1/*
2 * Katmai board specific routines
3 *
4 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 * Copyright 2007 IBM Corp.
6 *
7 * Based on the Bamboo code by
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 * Copyright 2007 IBM Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16#include <linux/init.h>
17#include <linux/of_platform.h>
18
19#include <asm/machdep.h>
20#include <asm/prom.h>
21#include <asm/udbg.h>
22#include <asm/time.h>
23#include <asm/uic.h>
24#include <asm/pci-bridge.h>
25
26#include "44x.h"
27
28static __initdata struct of_device_id katmai_of_bus[] = {
29 { .compatible = "ibm,plb4", },
30 { .compatible = "ibm,opb", },
31 { .compatible = "ibm,ebc", },
32 {},
33};
34
35static int __init katmai_device_probe(void)
36{
37 of_platform_bus_probe(NULL, katmai_of_bus, NULL);
38
39 return 0;
40}
41machine_device_initcall(katmai, katmai_device_probe);
42
43static int __init katmai_probe(void)
44{
45 unsigned long root = of_get_flat_dt_root();
46
47 if (!of_flat_dt_is_compatible(root, "amcc,katmai"))
48 return 0;
49
50 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
51
52 return 1;
53}
54
55define_machine(katmai) {
56 .name = "Katmai",
57 .probe = katmai_probe,
58 .progress = udbg_progress,
59 .init_IRQ = uic_init_tree,
60 .get_irq = uic_get_irq,
61 .restart = ppc44x_reset_system,
62 .calibrate_decr = generic_calibrate_decr,
63};
diff --git a/arch/powerpc/platforms/44x/rainier.c b/arch/powerpc/platforms/44x/rainier.c
new file mode 100644
index 000000000000..a4ce5ba8fe32
--- /dev/null
+++ b/arch/powerpc/platforms/44x/rainier.c
@@ -0,0 +1,61 @@
1/*
2 * Rainier board specific routines
3 *
4 * Valentine Barshak <vbarshak@ru.mvista.com>
5 * Copyright 2007 MontaVista Software Inc.
6 *
7 * Based on the Bamboo code by
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 * Copyright 2007 IBM Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16#include <linux/init.h>
17#include <asm/machdep.h>
18#include <asm/prom.h>
19#include <asm/udbg.h>
20#include <asm/time.h>
21#include <asm/uic.h>
22#include <asm/of_platform.h>
23#include <asm/pci-bridge.h>
24#include "44x.h"
25
26static __initdata struct of_device_id rainier_of_bus[] = {
27 { .compatible = "ibm,plb4", },
28 { .compatible = "ibm,opb", },
29 { .compatible = "ibm,ebc", },
30 {},
31};
32
33static int __init rainier_device_probe(void)
34{
35 of_platform_bus_probe(NULL, rainier_of_bus, NULL);
36
37 return 0;
38}
39machine_device_initcall(rainier, rainier_device_probe);
40
41static int __init rainier_probe(void)
42{
43 unsigned long root = of_get_flat_dt_root();
44
45 if (!of_flat_dt_is_compatible(root, "amcc,rainier"))
46 return 0;
47
48 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
49
50 return 1;
51}
52
53define_machine(rainier) {
54 .name = "Rainier",
55 .probe = rainier_probe,
56 .progress = udbg_progress,
57 .init_IRQ = uic_init_tree,
58 .get_irq = uic_get_irq,
59 .restart = ppc44x_reset_system,
60 .calibrate_decr = generic_calibrate_decr,
61};
diff --git a/arch/powerpc/platforms/44x/sequoia.c b/arch/powerpc/platforms/44x/sequoia.c
index 21a9dd14f297..374f8c7fcd01 100644
--- a/arch/powerpc/platforms/44x/sequoia.c
+++ b/arch/powerpc/platforms/44x/sequoia.c
@@ -21,9 +21,11 @@
21#include <asm/udbg.h> 21#include <asm/udbg.h>
22#include <asm/time.h> 22#include <asm/time.h>
23#include <asm/uic.h> 23#include <asm/uic.h>
24#include <asm/pci-bridge.h>
25
24#include "44x.h" 26#include "44x.h"
25 27
26static struct of_device_id sequoia_of_bus[] = { 28static __initdata struct of_device_id sequoia_of_bus[] = {
27 { .compatible = "ibm,plb4", }, 29 { .compatible = "ibm,plb4", },
28 { .compatible = "ibm,opb", }, 30 { .compatible = "ibm,opb", },
29 { .compatible = "ibm,ebc", }, 31 { .compatible = "ibm,ebc", },
@@ -32,14 +34,11 @@ static struct of_device_id sequoia_of_bus[] = {
32 34
33static int __init sequoia_device_probe(void) 35static int __init sequoia_device_probe(void)
34{ 36{
35 if (!machine_is(sequoia))
36 return 0;
37
38 of_platform_bus_probe(NULL, sequoia_of_bus, NULL); 37 of_platform_bus_probe(NULL, sequoia_of_bus, NULL);
39 38
40 return 0; 39 return 0;
41} 40}
42device_initcall(sequoia_device_probe); 41machien_device_initcall(sequoia, sequoia_device_probe);
43 42
44static int __init sequoia_probe(void) 43static int __init sequoia_probe(void)
45{ 44{
@@ -48,6 +47,8 @@ static int __init sequoia_probe(void)
48 if (!of_flat_dt_is_compatible(root, "amcc,sequoia")) 47 if (!of_flat_dt_is_compatible(root, "amcc,sequoia"))
49 return 0; 48 return 0;
50 49
50 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
51
51 return 1; 52 return 1;
52} 53}
53 54
diff --git a/arch/powerpc/platforms/44x/taishan.c b/arch/powerpc/platforms/44x/taishan.c
new file mode 100644
index 000000000000..28ab7e2e02c3
--- /dev/null
+++ b/arch/powerpc/platforms/44x/taishan.c
@@ -0,0 +1,73 @@
1/*
2 * Taishan board specific routines based off ebony.c code
3 * original copyrights below
4 *
5 * Matt Porter <mporter@kernel.crashing.org>
6 * Copyright 2002-2005 MontaVista Software Inc.
7 *
8 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
9 * Copyright (c) 2003-2005 Zultys Technologies
10 *
11 * Rewritten and ported to the merged powerpc tree:
12 * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
13 *
14 * Modified from ebony.c for taishan:
15 * Copyright 2007 Hugh Blemings <hugh@au.ibm.com>, IBM Corporation.
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2 of the License, or (at your
20 * option) any later version.
21 */
22
23#include <linux/init.h>
24#include <linux/of_platform.h>
25
26#include <asm/machdep.h>
27#include <asm/prom.h>
28#include <asm/udbg.h>
29#include <asm/time.h>
30#include <asm/uic.h>
31#include <asm/pci-bridge.h>
32
33#include "44x.h"
34
35static __initdata struct of_device_id taishan_of_bus[] = {
36 { .compatible = "ibm,plb4", },
37 { .compatible = "ibm,opb", },
38 { .compatible = "ibm,ebc", },
39 {},
40};
41
42static int __init taishan_device_probe(void)
43{
44 of_platform_bus_probe(NULL, taishan_of_bus, NULL);
45
46 return 0;
47}
48machine_device_initcall(taishan, taishan_device_probe);
49
50/*
51 * Called very early, MMU is off, device-tree isn't unflattened
52 */
53static int __init taishan_probe(void)
54{
55 unsigned long root = of_get_flat_dt_root();
56
57 if (!of_flat_dt_is_compatible(root, "amcc,taishan"))
58 return 0;
59
60 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
61
62 return 1;
63}
64
65define_machine(taishan) {
66 .name = "Taishan",
67 .probe = taishan_probe,
68 .progress = udbg_progress,
69 .init_IRQ = uic_init_tree,
70 .get_irq = uic_get_irq,
71 .restart = ppc44x_reset_system,
72 .calibrate_decr = generic_calibrate_decr,
73};
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 166c1116b1ac..9cdc32b4fa18 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -22,11 +22,6 @@
22 22
23#include "mpc83xx.h" 23#include "mpc83xx.h"
24 24
25#ifndef CONFIG_PCI
26unsigned long isa_io_base = 0;
27unsigned long isa_mem_base = 0;
28#endif
29
30/* ************************************************************************ 25/* ************************************************************************
31 * 26 *
32 * Setup the architecture 27 * Setup the architecture
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 99684ea606af..c3ee0b58d539 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -43,6 +43,7 @@ config 40x
43 bool "AMCC 40x" 43 bool "AMCC 40x"
44 select PPC_DCR_NATIVE 44 select PPC_DCR_NATIVE
45 select WANT_DEVICE_TREE 45 select WANT_DEVICE_TREE
46 select PPC_UDBG_16550
46 47
47config 44x 48config 44x
48 bool "AMCC 44x" 49 bool "AMCC 44x"
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
new file mode 100644
index 000000000000..72fb35b9ebca
--- /dev/null
+++ b/arch/powerpc/sysdev/Kconfig
@@ -0,0 +1,8 @@
1# For a description of the syntax of this configuration file,
2# see Documentation/kbuild/kconfig-language.txt.
3#
4
5config PPC4xx_PCI_EXPRESS
6 bool
7 depends on PCI && 4xx
8 default n
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 85cf8c60f0be..9a20ef4f0ea4 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -27,6 +27,9 @@ obj-$(CONFIG_PPC_I8259) += i8259.o
27obj-$(CONFIG_PPC_83xx) += ipic.o 27obj-$(CONFIG_PPC_83xx) += ipic.o
28obj-$(CONFIG_4xx) += uic.o 28obj-$(CONFIG_4xx) += uic.o
29obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o 29obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o
30ifeq ($(CONFIG_PCI),y)
31obj-$(CONFIG_4xx) += ppc4xx_pci.o
32endif
30endif 33endif
31 34
32# Temporary hack until we have migrated to asm-powerpc 35# Temporary hack until we have migrated to asm-powerpc
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
new file mode 100644
index 000000000000..3c2c14c32e76
--- /dev/null
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -0,0 +1,1528 @@
1/*
2 * PCI / PCI-X / PCI-Express support for 4xx parts
3 *
4 * Copyright 2007 Ben. Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
5 *
6 * Most PCI Express code is coming from Stefan Roese implementation for
7 * arch/ppc in the Denx tree, slightly reworked by me.
8 *
9 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
10 *
11 * Some of that comes itself from a previous implementation for 440SPE only
12 * by Roland Dreier:
13 *
14 * Copyright (c) 2005 Cisco Systems. All rights reserved.
15 * Roland Dreier <rolandd@cisco.com>
16 *
17 */
18
19#undef DEBUG
20
21#include <linux/kernel.h>
22#include <linux/pci.h>
23#include <linux/init.h>
24#include <linux/of.h>
25#include <linux/bootmem.h>
26#include <linux/delay.h>
27
28#include <asm/io.h>
29#include <asm/pci-bridge.h>
30#include <asm/machdep.h>
31#include <asm/dcr.h>
32#include <asm/dcr-regs.h>
33
34#include "ppc4xx_pci.h"
35
36static int dma_offset_set;
37
38/* Move that to a useable header */
39extern unsigned long total_memory;
40
41#define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL))
42#define U64_TO_U32_HIGH(val) ((u32)((val) >> 32))
43
44#ifdef CONFIG_RESOURCES_64BIT
45#define RES_TO_U32_LOW(val) U64_TO_U32_LOW(val)
46#define RES_TO_U32_HIGH(val) U64_TO_U32_HIGH(val)
47#else
48#define RES_TO_U32_LOW(val) (val)
49#define RES_TO_U32_HIGH(val) (0)
50#endif
51
52static inline int ppc440spe_revA(void)
53{
54 /* Catch both 440SPe variants, with and without RAID6 support */
55 if ((mfspr(SPRN_PVR) & 0xffefffff) == 0x53421890)
56 return 1;
57 else
58 return 0;
59}
60
61static void fixup_ppc4xx_pci_bridge(struct pci_dev *dev)
62{
63 struct pci_controller *hose;
64 int i;
65
66 if (dev->devfn != 0 || dev->bus->self != NULL)
67 return;
68
69 hose = pci_bus_to_host(dev->bus);
70 if (hose == NULL)
71 return;
72
73 if (!of_device_is_compatible(hose->dn, "ibm,plb-pciex") &&
74 !of_device_is_compatible(hose->dn, "ibm,plb-pcix") &&
75 !of_device_is_compatible(hose->dn, "ibm,plb-pci"))
76 return;
77
78 /* Hide the PCI host BARs from the kernel as their content doesn't
79 * fit well in the resource management
80 */
81 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
82 dev->resource[i].start = dev->resource[i].end = 0;
83 dev->resource[i].flags = 0;
84 }
85
86 printk(KERN_INFO "PCI: Hiding 4xx host bridge resources %s\n",
87 pci_name(dev));
88}
89DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, fixup_ppc4xx_pci_bridge);
90
91static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
92 void __iomem *reg,
93 struct resource *res)
94{
95 u64 size;
96 const u32 *ranges;
97 int rlen;
98 int pna = of_n_addr_cells(hose->dn);
99 int np = pna + 5;
100
101 /* Default */
102 res->start = 0;
103 res->end = size = 0x80000000;
104 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
105
106 /* Get dma-ranges property */
107 ranges = of_get_property(hose->dn, "dma-ranges", &rlen);
108 if (ranges == NULL)
109 goto out;
110
111 /* Walk it */
112 while ((rlen -= np * 4) >= 0) {
113 u32 pci_space = ranges[0];
114 u64 pci_addr = of_read_number(ranges + 1, 2);
115 u64 cpu_addr = of_translate_dma_address(hose->dn, ranges + 3);
116 size = of_read_number(ranges + pna + 3, 2);
117 ranges += np;
118 if (cpu_addr == OF_BAD_ADDR || size == 0)
119 continue;
120
121 /* We only care about memory */
122 if ((pci_space & 0x03000000) != 0x02000000)
123 continue;
124
125 /* We currently only support memory at 0, and pci_addr
126 * within 32 bits space
127 */
128 if (cpu_addr != 0 || pci_addr > 0xffffffff) {
129 printk(KERN_WARNING "%s: Ignored unsupported dma range"
130 " 0x%016llx...0x%016llx -> 0x%016llx\n",
131 hose->dn->full_name,
132 pci_addr, pci_addr + size - 1, cpu_addr);
133 continue;
134 }
135
136 /* Check if not prefetchable */
137 if (!(pci_space & 0x40000000))
138 res->flags &= ~IORESOURCE_PREFETCH;
139
140
141 /* Use that */
142 res->start = pci_addr;
143#ifndef CONFIG_RESOURCES_64BIT
144 /* Beware of 32 bits resources */
145 if ((pci_addr + size) > 0x100000000ull)
146 res->end = 0xffffffff;
147 else
148#endif
149 res->end = res->start + size - 1;
150 break;
151 }
152
153 /* We only support one global DMA offset */
154 if (dma_offset_set && pci_dram_offset != res->start) {
155 printk(KERN_ERR "%s: dma-ranges(s) mismatch\n",
156 hose->dn->full_name);
157 return -ENXIO;
158 }
159
160 /* Check that we can fit all of memory as we don't support
161 * DMA bounce buffers
162 */
163 if (size < total_memory) {
164 printk(KERN_ERR "%s: dma-ranges too small "
165 "(size=%llx total_memory=%lx)\n",
166 hose->dn->full_name, size, total_memory);
167 return -ENXIO;
168 }
169
170 /* Check we are a power of 2 size and that base is a multiple of size*/
171 if (!is_power_of_2(size) ||
172 (res->start & (size - 1)) != 0) {
173 printk(KERN_ERR "%s: dma-ranges unaligned\n",
174 hose->dn->full_name);
175 return -ENXIO;
176 }
177
178 /* Check that we are fully contained within 32 bits space */
179 if (res->end > 0xffffffff) {
180 printk(KERN_ERR "%s: dma-ranges outside of 32 bits space\n",
181 hose->dn->full_name);
182 return -ENXIO;
183 }
184 out:
185 dma_offset_set = 1;
186 pci_dram_offset = res->start;
187
188 printk(KERN_INFO "4xx PCI DMA offset set to 0x%08lx\n",
189 pci_dram_offset);
190 return 0;
191}
192
193/*
194 * 4xx PCI 2.x part
195 */
196
197static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
198 void __iomem *reg)
199{
200 u32 la, ma, pcila, pciha;
201 int i, j;
202
203 /* Setup outbound memory windows */
204 for (i = j = 0; i < 3; i++) {
205 struct resource *res = &hose->mem_resources[i];
206
207 /* we only care about memory windows */
208 if (!(res->flags & IORESOURCE_MEM))
209 continue;
210 if (j > 2) {
211 printk(KERN_WARNING "%s: Too many ranges\n",
212 hose->dn->full_name);
213 break;
214 }
215
216 /* Calculate register values */
217 la = res->start;
218 pciha = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset);
219 pcila = RES_TO_U32_LOW(res->start - hose->pci_mem_offset);
220
221 ma = res->end + 1 - res->start;
222 if (!is_power_of_2(ma) || ma < 0x1000 || ma > 0xffffffffu) {
223 printk(KERN_WARNING "%s: Resource out of range\n",
224 hose->dn->full_name);
225 continue;
226 }
227 ma = (0xffffffffu << ilog2(ma)) | 0x1;
228 if (res->flags & IORESOURCE_PREFETCH)
229 ma |= 0x2;
230
231 /* Program register values */
232 writel(la, reg + PCIL0_PMM0LA + (0x10 * j));
233 writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * j));
234 writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * j));
235 writel(ma, reg + PCIL0_PMM0MA + (0x10 * j));
236 j++;
237 }
238}
239
240static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose,
241 void __iomem *reg,
242 const struct resource *res)
243{
244 resource_size_t size = res->end - res->start + 1;
245 u32 sa;
246
247 /* Calculate window size */
248 sa = (0xffffffffu << ilog2(size)) | 1;
249 sa |= 0x1;
250
251 /* RAM is always at 0 local for now */
252 writel(0, reg + PCIL0_PTM1LA);
253 writel(sa, reg + PCIL0_PTM1MS);
254
255 /* Map on PCI side */
256 early_write_config_dword(hose, hose->first_busno, 0,
257 PCI_BASE_ADDRESS_1, res->start);
258 early_write_config_dword(hose, hose->first_busno, 0,
259 PCI_BASE_ADDRESS_2, 0x00000000);
260 early_write_config_word(hose, hose->first_busno, 0,
261 PCI_COMMAND, 0x0006);
262}
263
264static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
265{
266 /* NYI */
267 struct resource rsrc_cfg;
268 struct resource rsrc_reg;
269 struct resource dma_window;
270 struct pci_controller *hose = NULL;
271 void __iomem *reg = NULL;
272 const int *bus_range;
273 int primary = 0;
274
275 /* Fetch config space registers address */
276 if (of_address_to_resource(np, 0, &rsrc_cfg)) {
277 printk(KERN_ERR "%s:Can't get PCI config register base !",
278 np->full_name);
279 return;
280 }
281 /* Fetch host bridge internal registers address */
282 if (of_address_to_resource(np, 3, &rsrc_reg)) {
283 printk(KERN_ERR "%s: Can't get PCI internal register base !",
284 np->full_name);
285 return;
286 }
287
288 /* Check if primary bridge */
289 if (of_get_property(np, "primary", NULL))
290 primary = 1;
291
292 /* Get bus range if any */
293 bus_range = of_get_property(np, "bus-range", NULL);
294
295 /* Map registers */
296 reg = ioremap(rsrc_reg.start, rsrc_reg.end + 1 - rsrc_reg.start);
297 if (reg == NULL) {
298 printk(KERN_ERR "%s: Can't map registers !", np->full_name);
299 goto fail;
300 }
301
302 /* Allocate the host controller data structure */
303 hose = pcibios_alloc_controller(np);
304 if (!hose)
305 goto fail;
306
307 hose->first_busno = bus_range ? bus_range[0] : 0x0;
308 hose->last_busno = bus_range ? bus_range[1] : 0xff;
309
310 /* Setup config space */
311 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, 0);
312
313 /* Disable all windows */
314 writel(0, reg + PCIL0_PMM0MA);
315 writel(0, reg + PCIL0_PMM1MA);
316 writel(0, reg + PCIL0_PMM2MA);
317 writel(0, reg + PCIL0_PTM1MS);
318 writel(0, reg + PCIL0_PTM2MS);
319
320 /* Parse outbound mapping resources */
321 pci_process_bridge_OF_ranges(hose, np, primary);
322
323 /* Parse inbound mapping resources */
324 if (ppc4xx_parse_dma_ranges(hose, reg, &dma_window) != 0)
325 goto fail;
326
327 /* Configure outbound ranges POMs */
328 ppc4xx_configure_pci_PMMs(hose, reg);
329
330 /* Configure inbound ranges PIMs */
331 ppc4xx_configure_pci_PTMs(hose, reg, &dma_window);
332
333 /* We don't need the registers anymore */
334 iounmap(reg);
335 return;
336
337 fail:
338 if (hose)
339 pcibios_free_controller(hose);
340 if (reg)
341 iounmap(reg);
342}
343
344/*
345 * 4xx PCI-X part
346 */
347
348static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
349 void __iomem *reg)
350{
351 u32 lah, lal, pciah, pcial, sa;
352 int i, j;
353
354 /* Setup outbound memory windows */
355 for (i = j = 0; i < 3; i++) {
356 struct resource *res = &hose->mem_resources[i];
357
358 /* we only care about memory windows */
359 if (!(res->flags & IORESOURCE_MEM))
360 continue;
361 if (j > 1) {
362 printk(KERN_WARNING "%s: Too many ranges\n",
363 hose->dn->full_name);
364 break;
365 }
366
367 /* Calculate register values */
368 lah = RES_TO_U32_HIGH(res->start);
369 lal = RES_TO_U32_LOW(res->start);
370 pciah = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset);
371 pcial = RES_TO_U32_LOW(res->start - hose->pci_mem_offset);
372 sa = res->end + 1 - res->start;
373 if (!is_power_of_2(sa) || sa < 0x100000 ||
374 sa > 0xffffffffu) {
375 printk(KERN_WARNING "%s: Resource out of range\n",
376 hose->dn->full_name);
377 continue;
378 }
379 sa = (0xffffffffu << ilog2(sa)) | 0x1;
380
381 /* Program register values */
382 if (j == 0) {
383 writel(lah, reg + PCIX0_POM0LAH);
384 writel(lal, reg + PCIX0_POM0LAL);
385 writel(pciah, reg + PCIX0_POM0PCIAH);
386 writel(pcial, reg + PCIX0_POM0PCIAL);
387 writel(sa, reg + PCIX0_POM0SA);
388 } else {
389 writel(lah, reg + PCIX0_POM1LAH);
390 writel(lal, reg + PCIX0_POM1LAL);
391 writel(pciah, reg + PCIX0_POM1PCIAH);
392 writel(pcial, reg + PCIX0_POM1PCIAL);
393 writel(sa, reg + PCIX0_POM1SA);
394 }
395 j++;
396 }
397}
398
399static void __init ppc4xx_configure_pcix_PIMs(struct pci_controller *hose,
400 void __iomem *reg,
401 const struct resource *res,
402 int big_pim,
403 int enable_msi_hole)
404{
405 resource_size_t size = res->end - res->start + 1;
406 u32 sa;
407
408 /* RAM is always at 0 */
409 writel(0x00000000, reg + PCIX0_PIM0LAH);
410 writel(0x00000000, reg + PCIX0_PIM0LAL);
411
412 /* Calculate window size */
413 sa = (0xffffffffu << ilog2(size)) | 1;
414 sa |= 0x1;
415 if (res->flags & IORESOURCE_PREFETCH)
416 sa |= 0x2;
417 if (enable_msi_hole)
418 sa |= 0x4;
419 writel(sa, reg + PCIX0_PIM0SA);
420 if (big_pim)
421 writel(0xffffffff, reg + PCIX0_PIM0SAH);
422
423 /* Map on PCI side */
424 writel(0x00000000, reg + PCIX0_BAR0H);
425 writel(res->start, reg + PCIX0_BAR0L);
426 writew(0x0006, reg + PCIX0_COMMAND);
427}
428
429static void __init ppc4xx_probe_pcix_bridge(struct device_node *np)
430{
431 struct resource rsrc_cfg;
432 struct resource rsrc_reg;
433 struct resource dma_window;
434 struct pci_controller *hose = NULL;
435 void __iomem *reg = NULL;
436 const int *bus_range;
437 int big_pim = 0, msi = 0, primary = 0;
438
439 /* Fetch config space registers address */
440 if (of_address_to_resource(np, 0, &rsrc_cfg)) {
441 printk(KERN_ERR "%s:Can't get PCI-X config register base !",
442 np->full_name);
443 return;
444 }
445 /* Fetch host bridge internal registers address */
446 if (of_address_to_resource(np, 3, &rsrc_reg)) {
447 printk(KERN_ERR "%s: Can't get PCI-X internal register base !",
448 np->full_name);
449 return;
450 }
451
452 /* Check if it supports large PIMs (440GX) */
453 if (of_get_property(np, "large-inbound-windows", NULL))
454 big_pim = 1;
455
456 /* Check if we should enable MSIs inbound hole */
457 if (of_get_property(np, "enable-msi-hole", NULL))
458 msi = 1;
459
460 /* Check if primary bridge */
461 if (of_get_property(np, "primary", NULL))
462 primary = 1;
463
464 /* Get bus range if any */
465 bus_range = of_get_property(np, "bus-range", NULL);
466
467 /* Map registers */
468 reg = ioremap(rsrc_reg.start, rsrc_reg.end + 1 - rsrc_reg.start);
469 if (reg == NULL) {
470 printk(KERN_ERR "%s: Can't map registers !", np->full_name);
471 goto fail;
472 }
473
474 /* Allocate the host controller data structure */
475 hose = pcibios_alloc_controller(np);
476 if (!hose)
477 goto fail;
478
479 hose->first_busno = bus_range ? bus_range[0] : 0x0;
480 hose->last_busno = bus_range ? bus_range[1] : 0xff;
481
482 /* Setup config space */
483 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, 0);
484
485 /* Disable all windows */
486 writel(0, reg + PCIX0_POM0SA);
487 writel(0, reg + PCIX0_POM1SA);
488 writel(0, reg + PCIX0_POM2SA);
489 writel(0, reg + PCIX0_PIM0SA);
490 writel(0, reg + PCIX0_PIM1SA);
491 writel(0, reg + PCIX0_PIM2SA);
492 if (big_pim) {
493 writel(0, reg + PCIX0_PIM0SAH);
494 writel(0, reg + PCIX0_PIM2SAH);
495 }
496
497 /* Parse outbound mapping resources */
498 pci_process_bridge_OF_ranges(hose, np, primary);
499
500 /* Parse inbound mapping resources */
501 if (ppc4xx_parse_dma_ranges(hose, reg, &dma_window) != 0)
502 goto fail;
503
504 /* Configure outbound ranges POMs */
505 ppc4xx_configure_pcix_POMs(hose, reg);
506
507 /* Configure inbound ranges PIMs */
508 ppc4xx_configure_pcix_PIMs(hose, reg, &dma_window, big_pim, msi);
509
510 /* We don't need the registers anymore */
511 iounmap(reg);
512 return;
513
514 fail:
515 if (hose)
516 pcibios_free_controller(hose);
517 if (reg)
518 iounmap(reg);
519}
520
521#ifdef CONFIG_PPC4xx_PCI_EXPRESS
522
523/*
524 * 4xx PCI-Express part
525 *
526 * We support 3 parts currently based on the compatible property:
527 *
528 * ibm,plb-pciex-440spe
529 * ibm,plb-pciex-405ex
530 *
531 * Anything else will be rejected for now as they are all subtly
532 * different unfortunately.
533 *
534 */
535
536#define MAX_PCIE_BUS_MAPPED 0x10
537
538struct ppc4xx_pciex_port
539{
540 struct pci_controller *hose;
541 struct device_node *node;
542 unsigned int index;
543 int endpoint;
544 int link;
545 int has_ibpre;
546 unsigned int sdr_base;
547 dcr_host_t dcrs;
548 struct resource cfg_space;
549 struct resource utl_regs;
550 void __iomem *utl_base;
551};
552
553static struct ppc4xx_pciex_port *ppc4xx_pciex_ports;
554static unsigned int ppc4xx_pciex_port_count;
555
556struct ppc4xx_pciex_hwops
557{
558 int (*core_init)(struct device_node *np);
559 int (*port_init_hw)(struct ppc4xx_pciex_port *port);
560 int (*setup_utl)(struct ppc4xx_pciex_port *port);
561};
562
563static struct ppc4xx_pciex_hwops *ppc4xx_pciex_hwops;
564
565#ifdef CONFIG_44x
566
567/* Check various reset bits of the 440SPe PCIe core */
568static int __init ppc440spe_pciex_check_reset(struct device_node *np)
569{
570 u32 valPE0, valPE1, valPE2;
571 int err = 0;
572
573 /* SDR0_PEGPLLLCT1 reset */
574 if (!(mfdcri(SDR0, PESDR0_PLLLCT1) & 0x01000000)) {
575 /*
576 * the PCIe core was probably already initialised
577 * by firmware - let's re-reset RCSSET regs
578 *
579 * -- Shouldn't we also re-reset the whole thing ? -- BenH
580 */
581 pr_debug("PCIE: SDR0_PLLLCT1 already reset.\n");
582 mtdcri(SDR0, PESDR0_440SPE_RCSSET, 0x01010000);
583 mtdcri(SDR0, PESDR1_440SPE_RCSSET, 0x01010000);
584 mtdcri(SDR0, PESDR2_440SPE_RCSSET, 0x01010000);
585 }
586
587 valPE0 = mfdcri(SDR0, PESDR0_440SPE_RCSSET);
588 valPE1 = mfdcri(SDR0, PESDR1_440SPE_RCSSET);
589 valPE2 = mfdcri(SDR0, PESDR2_440SPE_RCSSET);
590
591 /* SDR0_PExRCSSET rstgu */
592 if (!(valPE0 & 0x01000000) ||
593 !(valPE1 & 0x01000000) ||
594 !(valPE2 & 0x01000000)) {
595 printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstgu error\n");
596 err = -1;
597 }
598
599 /* SDR0_PExRCSSET rstdl */
600 if (!(valPE0 & 0x00010000) ||
601 !(valPE1 & 0x00010000) ||
602 !(valPE2 & 0x00010000)) {
603 printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstdl error\n");
604 err = -1;
605 }
606
607 /* SDR0_PExRCSSET rstpyn */
608 if ((valPE0 & 0x00001000) ||
609 (valPE1 & 0x00001000) ||
610 (valPE2 & 0x00001000)) {
611 printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstpyn error\n");
612 err = -1;
613 }
614
615 /* SDR0_PExRCSSET hldplb */
616 if ((valPE0 & 0x10000000) ||
617 (valPE1 & 0x10000000) ||
618 (valPE2 & 0x10000000)) {
619 printk(KERN_INFO "PCIE: SDR0_PExRCSSET hldplb error\n");
620 err = -1;
621 }
622
623 /* SDR0_PExRCSSET rdy */
624 if ((valPE0 & 0x00100000) ||
625 (valPE1 & 0x00100000) ||
626 (valPE2 & 0x00100000)) {
627 printk(KERN_INFO "PCIE: SDR0_PExRCSSET rdy error\n");
628 err = -1;
629 }
630
631 /* SDR0_PExRCSSET shutdown */
632 if ((valPE0 & 0x00000100) ||
633 (valPE1 & 0x00000100) ||
634 (valPE2 & 0x00000100)) {
635 printk(KERN_INFO "PCIE: SDR0_PExRCSSET shutdown error\n");
636 err = -1;
637 }
638
639 return err;
640}
641
642/* Global PCIe core initializations for 440SPe core */
643static int __init ppc440spe_pciex_core_init(struct device_node *np)
644{
645 int time_out = 20;
646
647 /* Set PLL clock receiver to LVPECL */
648 mtdcri(SDR0, PESDR0_PLLLCT1, mfdcri(SDR0, PESDR0_PLLLCT1) | 1 << 28);
649
650 /* Shouldn't we do all the calibration stuff etc... here ? */
651 if (ppc440spe_pciex_check_reset(np))
652 return -ENXIO;
653
654 if (!(mfdcri(SDR0, PESDR0_PLLLCT2) & 0x10000)) {
655 printk(KERN_INFO "PCIE: PESDR_PLLCT2 resistance calibration "
656 "failed (0x%08x)\n",
657 mfdcri(SDR0, PESDR0_PLLLCT2));
658 return -1;
659 }
660
661 /* De-assert reset of PCIe PLL, wait for lock */
662 mtdcri(SDR0, PESDR0_PLLLCT1,
663 mfdcri(SDR0, PESDR0_PLLLCT1) & ~(1 << 24));
664 udelay(3);
665
666 while (time_out) {
667 if (!(mfdcri(SDR0, PESDR0_PLLLCT3) & 0x10000000)) {
668 time_out--;
669 udelay(1);
670 } else
671 break;
672 }
673 if (!time_out) {
674 printk(KERN_INFO "PCIE: VCO output not locked\n");
675 return -1;
676 }
677
678 pr_debug("PCIE initialization OK\n");
679
680 return 3;
681}
682
683static int ppc440spe_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
684{
685 u32 val = 1 << 24;
686
687 if (port->endpoint)
688 val = PTYPE_LEGACY_ENDPOINT << 20;
689 else
690 val = PTYPE_ROOT_PORT << 20;
691
692 if (port->index == 0)
693 val |= LNKW_X8 << 12;
694 else
695 val |= LNKW_X4 << 12;
696
697 mtdcri(SDR0, port->sdr_base + PESDRn_DLPSET, val);
698 mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET1, 0x20222222);
699 if (ppc440spe_revA())
700 mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET2, 0x11000000);
701 mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL0SET1, 0x35000000);
702 mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL1SET1, 0x35000000);
703 mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL2SET1, 0x35000000);
704 mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL3SET1, 0x35000000);
705 if (port->index == 0) {
706 mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL4SET1,
707 0x35000000);
708 mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL5SET1,
709 0x35000000);
710 mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL6SET1,
711 0x35000000);
712 mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL7SET1,
713 0x35000000);
714 }
715 val = mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET);
716 mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET,
717 (val & ~(1 << 24 | 1 << 16)) | 1 << 12);
718
719 return 0;
720}
721
722static int ppc440speA_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
723{
724 return ppc440spe_pciex_init_port_hw(port);
725}
726
727static int ppc440speB_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
728{
729 int rc = ppc440spe_pciex_init_port_hw(port);
730
731 port->has_ibpre = 1;
732
733 return rc;
734}
735
736static int ppc440speA_pciex_init_utl(struct ppc4xx_pciex_port *port)
737{
738 /* XXX Check what that value means... I hate magic */
739 dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x68782800);
740
741 /*
742 * Set buffer allocations and then assert VRB and TXE.
743 */
744 out_be32(port->utl_base + PEUTL_OUTTR, 0x08000000);
745 out_be32(port->utl_base + PEUTL_INTR, 0x02000000);
746 out_be32(port->utl_base + PEUTL_OPDBSZ, 0x10000000);
747 out_be32(port->utl_base + PEUTL_PBBSZ, 0x53000000);
748 out_be32(port->utl_base + PEUTL_IPHBSZ, 0x08000000);
749 out_be32(port->utl_base + PEUTL_IPDBSZ, 0x10000000);
750 out_be32(port->utl_base + PEUTL_RCIRQEN, 0x00f00000);
751 out_be32(port->utl_base + PEUTL_PCTL, 0x80800066);
752
753 return 0;
754}
755
756static int ppc440speB_pciex_init_utl(struct ppc4xx_pciex_port *port)
757{
758 /* Report CRS to the operating system */
759 out_be32(port->utl_base + PEUTL_PBCTL, 0x08000000);
760
761 return 0;
762}
763
764static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops __initdata =
765{
766 .core_init = ppc440spe_pciex_core_init,
767 .port_init_hw = ppc440speA_pciex_init_port_hw,
768 .setup_utl = ppc440speA_pciex_init_utl,
769};
770
771static struct ppc4xx_pciex_hwops ppc440speB_pcie_hwops __initdata =
772{
773 .core_init = ppc440spe_pciex_core_init,
774 .port_init_hw = ppc440speB_pciex_init_port_hw,
775 .setup_utl = ppc440speB_pciex_init_utl,
776};
777
778#endif /* CONFIG_44x */
779
780#ifdef CONFIG_40x
781
782static int __init ppc405ex_pciex_core_init(struct device_node *np)
783{
784 /* Nothing to do, return 2 ports */
785 return 2;
786}
787
788static void ppc405ex_pcie_phy_reset(struct ppc4xx_pciex_port *port)
789{
790 /* Assert the PE0_PHY reset */
791 mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, 0x01010000);
792 msleep(1);
793
794 /* deassert the PE0_hotreset */
795 if (port->endpoint)
796 mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, 0x01111000);
797 else
798 mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, 0x01101000);
799
800 /* poll for phy !reset */
801 /* XXX FIXME add timeout */
802 while (!(mfdcri(SDR0, port->sdr_base + PESDRn_405EX_PHYSTA) & 0x00001000))
803 ;
804
805 /* deassert the PE0_gpl_utl_reset */
806 mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, 0x00101000);
807}
808
809static int ppc405ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
810{
811 u32 val;
812
813 if (port->endpoint)
814 val = PTYPE_LEGACY_ENDPOINT;
815 else
816 val = PTYPE_ROOT_PORT;
817
818 mtdcri(SDR0, port->sdr_base + PESDRn_DLPSET,
819 1 << 24 | val << 20 | LNKW_X1 << 12);
820
821 mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET1, 0x00000000);
822 mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET2, 0x01010000);
823 mtdcri(SDR0, port->sdr_base + PESDRn_405EX_PHYSET1, 0x720F0000);
824 mtdcri(SDR0, port->sdr_base + PESDRn_405EX_PHYSET2, 0x70600003);
825
826 /*
827 * Only reset the PHY when no link is currently established.
828 * This is for the Atheros PCIe board which has problems to establish
829 * the link (again) after this PHY reset. All other currently tested
830 * PCIe boards don't show this problem.
831 * This has to be re-tested and fixed in a later release!
832 */
833#if 0 /* XXX FIXME: Not resetting the PHY will leave all resources
834 * configured as done previously by U-Boot. Then Linux will currently
835 * not reassign them. So the PHY reset is now done always. This will
836 * lead to problems with the Atheros PCIe board again.
837 */
838 val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
839 if (!(val & 0x00001000))
840 ppc405ex_pcie_phy_reset(port);
841#else
842 ppc405ex_pcie_phy_reset(port);
843#endif
844
845 dcr_write(port->dcrs, DCRO_PEGPL_CFG, 0x10000000); /* guarded on */
846
847 port->has_ibpre = 1;
848
849 return 0;
850}
851
852static int ppc405ex_pciex_init_utl(struct ppc4xx_pciex_port *port)
853{
854 dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0);
855
856 /*
857 * Set buffer allocations and then assert VRB and TXE.
858 */
859 out_be32(port->utl_base + PEUTL_OUTTR, 0x02000000);
860 out_be32(port->utl_base + PEUTL_INTR, 0x02000000);
861 out_be32(port->utl_base + PEUTL_OPDBSZ, 0x04000000);
862 out_be32(port->utl_base + PEUTL_PBBSZ, 0x21000000);
863 out_be32(port->utl_base + PEUTL_IPHBSZ, 0x02000000);
864 out_be32(port->utl_base + PEUTL_IPDBSZ, 0x04000000);
865 out_be32(port->utl_base + PEUTL_RCIRQEN, 0x00f00000);
866 out_be32(port->utl_base + PEUTL_PCTL, 0x80800066);
867
868 out_be32(port->utl_base + PEUTL_PBCTL, 0x08000000);
869
870 return 0;
871}
872
873static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops __initdata =
874{
875 .core_init = ppc405ex_pciex_core_init,
876 .port_init_hw = ppc405ex_pciex_init_port_hw,
877 .setup_utl = ppc405ex_pciex_init_utl,
878};
879
880#endif /* CONFIG_40x */
881
882
883/* Check that the core has been initied and if not, do it */
884static int __init ppc4xx_pciex_check_core_init(struct device_node *np)
885{
886 static int core_init;
887 int count = -ENODEV;
888
889 if (core_init++)
890 return 0;
891
892#ifdef CONFIG_44x
893 if (of_device_is_compatible(np, "ibm,plb-pciex-440spe")) {
894 if (ppc440spe_revA())
895 ppc4xx_pciex_hwops = &ppc440speA_pcie_hwops;
896 else
897 ppc4xx_pciex_hwops = &ppc440speB_pcie_hwops;
898 }
899#endif /* CONFIG_44x */
900#ifdef CONFIG_40x
901 if (of_device_is_compatible(np, "ibm,plb-pciex-405ex"))
902 ppc4xx_pciex_hwops = &ppc405ex_pcie_hwops;
903#endif
904 if (ppc4xx_pciex_hwops == NULL) {
905 printk(KERN_WARNING "PCIE: unknown host type %s\n",
906 np->full_name);
907 return -ENODEV;
908 }
909
910 count = ppc4xx_pciex_hwops->core_init(np);
911 if (count > 0) {
912 ppc4xx_pciex_ports =
913 kzalloc(count * sizeof(struct ppc4xx_pciex_port),
914 GFP_KERNEL);
915 if (ppc4xx_pciex_ports) {
916 ppc4xx_pciex_port_count = count;
917 return 0;
918 }
919 printk(KERN_WARNING "PCIE: failed to allocate ports array\n");
920 return -ENOMEM;
921 }
922 return -ENODEV;
923}
924
925static void __init ppc4xx_pciex_port_init_mapping(struct ppc4xx_pciex_port *port)
926{
927 /* We map PCI Express configuration based on the reg property */
928 dcr_write(port->dcrs, DCRO_PEGPL_CFGBAH,
929 RES_TO_U32_HIGH(port->cfg_space.start));
930 dcr_write(port->dcrs, DCRO_PEGPL_CFGBAL,
931 RES_TO_U32_LOW(port->cfg_space.start));
932
933 /* XXX FIXME: Use size from reg property. For now, map 512M */
934 dcr_write(port->dcrs, DCRO_PEGPL_CFGMSK, 0xe0000001);
935
936 /* We map UTL registers based on the reg property */
937 dcr_write(port->dcrs, DCRO_PEGPL_REGBAH,
938 RES_TO_U32_HIGH(port->utl_regs.start));
939 dcr_write(port->dcrs, DCRO_PEGPL_REGBAL,
940 RES_TO_U32_LOW(port->utl_regs.start));
941
942 /* XXX FIXME: Use size from reg property */
943 dcr_write(port->dcrs, DCRO_PEGPL_REGMSK, 0x00007001);
944
945 /* Disable all other outbound windows */
946 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, 0);
947 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, 0);
948 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, 0);
949 dcr_write(port->dcrs, DCRO_PEGPL_MSGMSK, 0);
950}
951
952static int __init ppc4xx_pciex_wait_on_sdr(struct ppc4xx_pciex_port *port,
953 unsigned int sdr_offset,
954 unsigned int mask,
955 unsigned int value,
956 int timeout_ms)
957{
958 u32 val;
959
960 while(timeout_ms--) {
961 val = mfdcri(SDR0, port->sdr_base + sdr_offset);
962 if ((val & mask) == value) {
963 pr_debug("PCIE%d: Wait on SDR %x success with tm %d (%08x)\n",
964 port->index, sdr_offset, timeout_ms, val);
965 return 0;
966 }
967 msleep(1);
968 }
969 return -1;
970}
971
972static int __init ppc4xx_pciex_port_init(struct ppc4xx_pciex_port *port)
973{
974 int rc = 0;
975
976 /* Init HW */
977 if (ppc4xx_pciex_hwops->port_init_hw)
978 rc = ppc4xx_pciex_hwops->port_init_hw(port);
979 if (rc != 0)
980 return rc;
981
982 printk(KERN_INFO "PCIE%d: Checking link...\n",
983 port->index);
984
985 /* Wait for reset to complete */
986 if (ppc4xx_pciex_wait_on_sdr(port, PESDRn_RCSSTS, 1 << 20, 0, 10)) {
987 printk(KERN_WARNING "PCIE%d: PGRST failed\n",
988 port->index);
989 return -1;
990 }
991
992 /* Check for card presence detect if supported, if not, just wait for
993 * link unconditionally.
994 *
995 * note that we don't fail if there is no link, we just filter out
996 * config space accesses. That way, it will be easier to implement
997 * hotplug later on.
998 */
999 if (!port->has_ibpre ||
1000 !ppc4xx_pciex_wait_on_sdr(port, PESDRn_LOOP,
1001 1 << 28, 1 << 28, 100)) {
1002 printk(KERN_INFO
1003 "PCIE%d: Device detected, waiting for link...\n",
1004 port->index);
1005 if (ppc4xx_pciex_wait_on_sdr(port, PESDRn_LOOP,
1006 0x1000, 0x1000, 2000))
1007 printk(KERN_WARNING
1008 "PCIE%d: Link up failed\n", port->index);
1009 else {
1010 printk(KERN_INFO
1011 "PCIE%d: link is up !\n", port->index);
1012 port->link = 1;
1013 }
1014 } else
1015 printk(KERN_INFO "PCIE%d: No device detected.\n", port->index);
1016
1017 /*
1018 * Initialize mapping: disable all regions and configure
1019 * CFG and REG regions based on resources in the device tree
1020 */
1021 ppc4xx_pciex_port_init_mapping(port);
1022
1023 /*
1024 * Map UTL
1025 */
1026 port->utl_base = ioremap(port->utl_regs.start, 0x100);
1027 BUG_ON(port->utl_base == NULL);
1028
1029 /*
1030 * Setup UTL registers --BenH.
1031 */
1032 if (ppc4xx_pciex_hwops->setup_utl)
1033 ppc4xx_pciex_hwops->setup_utl(port);
1034
1035 /*
1036 * Check for VC0 active and assert RDY.
1037 */
1038 if (port->link &&
1039 ppc4xx_pciex_wait_on_sdr(port, PESDRn_RCSSTS,
1040 1 << 16, 1 << 16, 5000)) {
1041 printk(KERN_INFO "PCIE%d: VC0 not active\n", port->index);
1042 port->link = 0;
1043 }
1044
1045 mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET,
1046 mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | 1 << 20);
1047 msleep(100);
1048
1049 return 0;
1050}
1051
1052static int ppc4xx_pciex_validate_bdf(struct ppc4xx_pciex_port *port,
1053 struct pci_bus *bus,
1054 unsigned int devfn)
1055{
1056 static int message;
1057
1058 /* Endpoint can not generate upstream(remote) config cycles */
1059 if (port->endpoint && bus->number != port->hose->first_busno)
1060 return PCIBIOS_DEVICE_NOT_FOUND;
1061
1062 /* Check we are within the mapped range */
1063 if (bus->number > port->hose->last_busno) {
1064 if (!message) {
1065 printk(KERN_WARNING "Warning! Probing bus %u"
1066 " out of range !\n", bus->number);
1067 message++;
1068 }
1069 return PCIBIOS_DEVICE_NOT_FOUND;
1070 }
1071
1072 /* The root complex has only one device / function */
1073 if (bus->number == port->hose->first_busno && devfn != 0)
1074 return PCIBIOS_DEVICE_NOT_FOUND;
1075
1076 /* The other side of the RC has only one device as well */
1077 if (bus->number == (port->hose->first_busno + 1) &&
1078 PCI_SLOT(devfn) != 0)
1079 return PCIBIOS_DEVICE_NOT_FOUND;
1080
1081 /* Check if we have a link */
1082 if ((bus->number != port->hose->first_busno) && !port->link)
1083 return PCIBIOS_DEVICE_NOT_FOUND;
1084
1085 return 0;
1086}
1087
1088static void __iomem *ppc4xx_pciex_get_config_base(struct ppc4xx_pciex_port *port,
1089 struct pci_bus *bus,
1090 unsigned int devfn)
1091{
1092 int relbus;
1093
1094 /* Remove the casts when we finally remove the stupid volatile
1095 * in struct pci_controller
1096 */
1097 if (bus->number == port->hose->first_busno)
1098 return (void __iomem *)port->hose->cfg_addr;
1099
1100 relbus = bus->number - (port->hose->first_busno + 1);
1101 return (void __iomem *)port->hose->cfg_data +
1102 ((relbus << 20) | (devfn << 12));
1103}
1104
1105static int ppc4xx_pciex_read_config(struct pci_bus *bus, unsigned int devfn,
1106 int offset, int len, u32 *val)
1107{
1108 struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
1109 struct ppc4xx_pciex_port *port =
1110 &ppc4xx_pciex_ports[hose->indirect_type];
1111 void __iomem *addr;
1112 u32 gpl_cfg;
1113
1114 BUG_ON(hose != port->hose);
1115
1116 if (ppc4xx_pciex_validate_bdf(port, bus, devfn) != 0)
1117 return PCIBIOS_DEVICE_NOT_FOUND;
1118
1119 addr = ppc4xx_pciex_get_config_base(port, bus, devfn);
1120
1121 /*
1122 * Reading from configuration space of non-existing device can
1123 * generate transaction errors. For the read duration we suppress
1124 * assertion of machine check exceptions to avoid those.
1125 */
1126 gpl_cfg = dcr_read(port->dcrs, DCRO_PEGPL_CFG);
1127 dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA);
1128
1129 /* Make sure no CRS is recorded */
1130 out_be32(port->utl_base + PEUTL_RCSTA, 0x00040000);
1131
1132 switch (len) {
1133 case 1:
1134 *val = in_8((u8 *)(addr + offset));
1135 break;
1136 case 2:
1137 *val = in_le16((u16 *)(addr + offset));
1138 break;
1139 default:
1140 *val = in_le32((u32 *)(addr + offset));
1141 break;
1142 }
1143
1144 pr_debug("pcie-config-read: bus=%3d [%3d..%3d] devfn=0x%04x"
1145 " offset=0x%04x len=%d, addr=0x%p val=0x%08x\n",
1146 bus->number, hose->first_busno, hose->last_busno,
1147 devfn, offset, len, addr + offset, *val);
1148
1149 /* Check for CRS (440SPe rev B does that for us but heh ..) */
1150 if (in_be32(port->utl_base + PEUTL_RCSTA) & 0x00040000) {
1151 pr_debug("Got CRS !\n");
1152 if (len != 4 || offset != 0)
1153 return PCIBIOS_DEVICE_NOT_FOUND;
1154 *val = 0xffff0001;
1155 }
1156
1157 dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
1158
1159 return PCIBIOS_SUCCESSFUL;
1160}
1161
1162static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
1163 int offset, int len, u32 val)
1164{
1165 struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
1166 struct ppc4xx_pciex_port *port =
1167 &ppc4xx_pciex_ports[hose->indirect_type];
1168 void __iomem *addr;
1169 u32 gpl_cfg;
1170
1171 if (ppc4xx_pciex_validate_bdf(port, bus, devfn) != 0)
1172 return PCIBIOS_DEVICE_NOT_FOUND;
1173
1174 addr = ppc4xx_pciex_get_config_base(port, bus, devfn);
1175
1176 /*
1177 * Reading from configuration space of non-existing device can
1178 * generate transaction errors. For the read duration we suppress
1179 * assertion of machine check exceptions to avoid those.
1180 */
1181 gpl_cfg = dcr_read(port->dcrs, DCRO_PEGPL_CFG);
1182 dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA);
1183
1184 pr_debug("pcie-config-write: bus=%3d [%3d..%3d] devfn=0x%04x"
1185 " offset=0x%04x len=%d, addr=0x%p val=0x%08x\n",
1186 bus->number, hose->first_busno, hose->last_busno,
1187 devfn, offset, len, addr + offset, val);
1188
1189 switch (len) {
1190 case 1:
1191 out_8((u8 *)(addr + offset), val);
1192 break;
1193 case 2:
1194 out_le16((u16 *)(addr + offset), val);
1195 break;
1196 default:
1197 out_le32((u32 *)(addr + offset), val);
1198 break;
1199 }
1200
1201 dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
1202
1203 return PCIBIOS_SUCCESSFUL;
1204}
1205
1206static struct pci_ops ppc4xx_pciex_pci_ops =
1207{
1208 .read = ppc4xx_pciex_read_config,
1209 .write = ppc4xx_pciex_write_config,
1210};
1211
1212static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
1213 struct pci_controller *hose,
1214 void __iomem *mbase)
1215{
1216 u32 lah, lal, pciah, pcial, sa;
1217 int i, j;
1218
1219 /* Setup outbound memory windows */
1220 for (i = j = 0; i < 3; i++) {
1221 struct resource *res = &hose->mem_resources[i];
1222
1223 /* we only care about memory windows */
1224 if (!(res->flags & IORESOURCE_MEM))
1225 continue;
1226 if (j > 1) {
1227 printk(KERN_WARNING "%s: Too many ranges\n",
1228 port->node->full_name);
1229 break;
1230 }
1231
1232 /* Calculate register values */
1233 lah = RES_TO_U32_HIGH(res->start);
1234 lal = RES_TO_U32_LOW(res->start);
1235 pciah = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset);
1236 pcial = RES_TO_U32_LOW(res->start - hose->pci_mem_offset);
1237 sa = res->end + 1 - res->start;
1238 if (!is_power_of_2(sa) || sa < 0x100000 ||
1239 sa > 0xffffffffu) {
1240 printk(KERN_WARNING "%s: Resource out of range\n",
1241 port->node->full_name);
1242 continue;
1243 }
1244 sa = (0xffffffffu << ilog2(sa)) | 0x1;
1245
1246 /* Program register values */
1247 switch (j) {
1248 case 0:
1249 out_le32(mbase + PECFG_POM0LAH, pciah);
1250 out_le32(mbase + PECFG_POM0LAL, pcial);
1251 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);
1252 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);
1253 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);
1254 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, sa | 3);
1255 break;
1256 case 1:
1257 out_le32(mbase + PECFG_POM1LAH, pciah);
1258 out_le32(mbase + PECFG_POM1LAL, pcial);
1259 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);
1260 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);
1261 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);
1262 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, sa | 3);
1263 break;
1264 }
1265 j++;
1266 }
1267
1268 /* Configure IO, always 64K starting at 0 */
1269 if (hose->io_resource.flags & IORESOURCE_IO) {
1270 lah = RES_TO_U32_HIGH(hose->io_base_phys);
1271 lal = RES_TO_U32_LOW(hose->io_base_phys);
1272 out_le32(mbase + PECFG_POM2LAH, 0);
1273 out_le32(mbase + PECFG_POM2LAL, 0);
1274 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah);
1275 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal);
1276 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff);
1277 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, 0xffff0000 | 3);
1278 }
1279}
1280
1281static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
1282 struct pci_controller *hose,
1283 void __iomem *mbase,
1284 struct resource *res)
1285{
1286 resource_size_t size = res->end - res->start + 1;
1287 u64 sa;
1288
1289 /* Calculate window size */
1290 sa = (0xffffffffffffffffull << ilog2(size));;
1291 if (res->flags & IORESOURCE_PREFETCH)
1292 sa |= 0x8;
1293
1294 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1295 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
1296
1297 /* The setup of the split looks weird to me ... let's see if it works */
1298 out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
1299 out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
1300 out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
1301 out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
1302 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
1303 out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
1304
1305 /* Enable inbound mapping */
1306 out_le32(mbase + PECFG_PIMEN, 0x1);
1307
1308 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1309 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1310
1311 /* Enable I/O, Mem, and Busmaster cycles */
1312 out_le16(mbase + PCI_COMMAND,
1313 in_le16(mbase + PCI_COMMAND) |
1314 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
1315}
1316
1317static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1318{
1319 struct resource dma_window;
1320 struct pci_controller *hose = NULL;
1321 const int *bus_range;
1322 int primary = 0, busses;
1323 void __iomem *mbase = NULL, *cfg_data = NULL;
1324
1325 /* XXX FIXME: Handle endpoint mode properly */
1326 if (port->endpoint) {
1327 printk(KERN_WARNING "PCIE%d: Port in endpoint mode !\n",
1328 port->index);
1329 return;
1330 }
1331
1332 /* Check if primary bridge */
1333 if (of_get_property(port->node, "primary", NULL))
1334 primary = 1;
1335
1336 /* Get bus range if any */
1337 bus_range = of_get_property(port->node, "bus-range", NULL);
1338
1339 /* Allocate the host controller data structure */
1340 hose = pcibios_alloc_controller(port->node);
1341 if (!hose)
1342 goto fail;
1343
1344 /* We stick the port number in "indirect_type" so the config space
1345 * ops can retrieve the port data structure easily
1346 */
1347 hose->indirect_type = port->index;
1348
1349 /* Get bus range */
1350 hose->first_busno = bus_range ? bus_range[0] : 0x0;
1351 hose->last_busno = bus_range ? bus_range[1] : 0xff;
1352
1353 /* Because of how big mapping the config space is (1M per bus), we
1354 * limit how many busses we support. In the long run, we could replace
1355 * that with something akin to kmap_atomic instead. We set aside 1 bus
1356 * for the host itself too.
1357 */
1358 busses = hose->last_busno - hose->first_busno; /* This is off by 1 */
1359 if (busses > MAX_PCIE_BUS_MAPPED) {
1360 busses = MAX_PCIE_BUS_MAPPED;
1361 hose->last_busno = hose->first_busno + busses;
1362 }
1363
1364 /* We map the external config space in cfg_data and the host config
1365 * space in cfg_addr. External space is 1M per bus, internal space
1366 * is 4K
1367 */
1368 cfg_data = ioremap(port->cfg_space.start +
1369 (hose->first_busno + 1) * 0x100000,
1370 busses * 0x100000);
1371 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1372 if (cfg_data == NULL || mbase == NULL) {
1373 printk(KERN_ERR "%s: Can't map config space !",
1374 port->node->full_name);
1375 goto fail;
1376 }
1377
1378 hose->cfg_data = cfg_data;
1379 hose->cfg_addr = mbase;
1380
1381 pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name,
1382 hose->first_busno, hose->last_busno);
1383 pr_debug(" config space mapped at: root @0x%p, other @0x%p\n",
1384 hose->cfg_addr, hose->cfg_data);
1385
1386 /* Setup config space */
1387 hose->ops = &ppc4xx_pciex_pci_ops;
1388 port->hose = hose;
1389 mbase = (void __iomem *)hose->cfg_addr;
1390
1391 /*
1392 * Set bus numbers on our root port
1393 */
1394 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
1395 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
1396 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
1397
1398 /*
1399 * OMRs are already reset, also disable PIMs
1400 */
1401 out_le32(mbase + PECFG_PIMEN, 0);
1402
1403 /* Parse outbound mapping resources */
1404 pci_process_bridge_OF_ranges(hose, port->node, primary);
1405
1406 /* Parse inbound mapping resources */
1407 if (ppc4xx_parse_dma_ranges(hose, mbase, &dma_window) != 0)
1408 goto fail;
1409
1410 /* Configure outbound ranges POMs */
1411 ppc4xx_configure_pciex_POMs(port, hose, mbase);
1412
1413 /* Configure inbound ranges PIMs */
1414 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
1415
1416 /* The root complex doesn't show up if we don't set some vendor
1417 * and device IDs into it. Those are the same bogus one that the
1418 * initial code in arch/ppc add. We might want to change that.
1419 */
1420 out_le16(mbase + 0x200, 0xaaa0 + port->index);
1421 out_le16(mbase + 0x202, 0xbed0 + port->index);
1422
1423 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
1424 out_le32(mbase + 0x208, 0x06040001);
1425
1426 printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
1427 port->index);
1428 return;
1429 fail:
1430 if (hose)
1431 pcibios_free_controller(hose);
1432 if (cfg_data)
1433 iounmap(cfg_data);
1434 if (mbase)
1435 iounmap(mbase);
1436}
1437
1438static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1439{
1440 struct ppc4xx_pciex_port *port;
1441 const u32 *pval;
1442 int portno;
1443 unsigned int dcrs;
1444
1445 /* First, proceed to core initialization as we assume there's
1446 * only one PCIe core in the system
1447 */
1448 if (ppc4xx_pciex_check_core_init(np))
1449 return;
1450
1451 /* Get the port number from the device-tree */
1452 pval = of_get_property(np, "port", NULL);
1453 if (pval == NULL) {
1454 printk(KERN_ERR "PCIE: Can't find port number for %s\n",
1455 np->full_name);
1456 return;
1457 }
1458 portno = *pval;
1459 if (portno >= ppc4xx_pciex_port_count) {
1460 printk(KERN_ERR "PCIE: port number out of range for %s\n",
1461 np->full_name);
1462 return;
1463 }
1464 port = &ppc4xx_pciex_ports[portno];
1465 port->index = portno;
1466 port->node = of_node_get(np);
1467 pval = of_get_property(np, "sdr-base", NULL);
1468 if (pval == NULL) {
1469 printk(KERN_ERR "PCIE: missing sdr-base for %s\n",
1470 np->full_name);
1471 return;
1472 }
1473 port->sdr_base = *pval;
1474
1475 /* XXX Currently, we only support root complex mode */
1476 port->endpoint = 0;
1477
1478 /* Fetch config space registers address */
1479 if (of_address_to_resource(np, 0, &port->cfg_space)) {
1480 printk(KERN_ERR "%s: Can't get PCI-E config space !",
1481 np->full_name);
1482 return;
1483 }
1484 /* Fetch host bridge internal registers address */
1485 if (of_address_to_resource(np, 1, &port->utl_regs)) {
1486 printk(KERN_ERR "%s: Can't get UTL register base !",
1487 np->full_name);
1488 return;
1489 }
1490
1491 /* Map DCRs */
1492 dcrs = dcr_resource_start(np, 0);
1493 if (dcrs == 0) {
1494 printk(KERN_ERR "%s: Can't get DCR register base !",
1495 np->full_name);
1496 return;
1497 }
1498 port->dcrs = dcr_map(np, dcrs, dcr_resource_len(np, 0));
1499
1500 /* Initialize the port specific registers */
1501 if (ppc4xx_pciex_port_init(port)) {
1502 printk(KERN_WARNING "PCIE%d: Port init failed\n", port->index);
1503 return;
1504 }
1505
1506 /* Setup the linux hose data structure */
1507 ppc4xx_pciex_port_setup_hose(port);
1508}
1509
1510#endif /* CONFIG_PPC4xx_PCI_EXPRESS */
1511
1512static int __init ppc4xx_pci_find_bridges(void)
1513{
1514 struct device_node *np;
1515
1516#ifdef CONFIG_PPC4xx_PCI_EXPRESS
1517 for_each_compatible_node(np, NULL, "ibm,plb-pciex")
1518 ppc4xx_probe_pciex_bridge(np);
1519#endif
1520 for_each_compatible_node(np, NULL, "ibm,plb-pcix")
1521 ppc4xx_probe_pcix_bridge(np);
1522 for_each_compatible_node(np, NULL, "ibm,plb-pci")
1523 ppc4xx_probe_pci_bridge(np);
1524
1525 return 0;
1526}
1527arch_initcall(ppc4xx_pci_find_bridges);
1528
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.h b/arch/powerpc/sysdev/ppc4xx_pci.h
new file mode 100644
index 000000000000..1c07908dc6ef
--- /dev/null
+++ b/arch/powerpc/sysdev/ppc4xx_pci.h
@@ -0,0 +1,369 @@
1/*
2 * PCI / PCI-X / PCI-Express support for 4xx parts
3 *
4 * Copyright 2007 Ben. Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
5 *
6 * Bits and pieces extracted from arch/ppc support by
7 *
8 * Matt Porter <mporter@kernel.crashing.org>
9 *
10 * Copyright 2002-2005 MontaVista Software Inc.
11 */
12#ifndef __PPC4XX_PCI_H__
13#define __PPC4XX_PCI_H__
14
15/*
16 * 4xx PCI-X bridge register definitions
17 */
18#define PCIX0_VENDID 0x000
19#define PCIX0_DEVID 0x002
20#define PCIX0_COMMAND 0x004
21#define PCIX0_STATUS 0x006
22#define PCIX0_REVID 0x008
23#define PCIX0_CLS 0x009
24#define PCIX0_CACHELS 0x00c
25#define PCIX0_LATTIM 0x00d
26#define PCIX0_HDTYPE 0x00e
27#define PCIX0_BIST 0x00f
28#define PCIX0_BAR0L 0x010
29#define PCIX0_BAR0H 0x014
30#define PCIX0_BAR1 0x018
31#define PCIX0_BAR2L 0x01c
32#define PCIX0_BAR2H 0x020
33#define PCIX0_BAR3 0x024
34#define PCIX0_CISPTR 0x028
35#define PCIX0_SBSYSVID 0x02c
36#define PCIX0_SBSYSID 0x02e
37#define PCIX0_EROMBA 0x030
38#define PCIX0_CAP 0x034
39#define PCIX0_RES0 0x035
40#define PCIX0_RES1 0x036
41#define PCIX0_RES2 0x038
42#define PCIX0_INTLN 0x03c
43#define PCIX0_INTPN 0x03d
44#define PCIX0_MINGNT 0x03e
45#define PCIX0_MAXLTNCY 0x03f
46#define PCIX0_BRDGOPT1 0x040
47#define PCIX0_BRDGOPT2 0x044
48#define PCIX0_ERREN 0x050
49#define PCIX0_ERRSTS 0x054
50#define PCIX0_PLBBESR 0x058
51#define PCIX0_PLBBEARL 0x05c
52#define PCIX0_PLBBEARH 0x060
53#define PCIX0_POM0LAL 0x068
54#define PCIX0_POM0LAH 0x06c
55#define PCIX0_POM0SA 0x070
56#define PCIX0_POM0PCIAL 0x074
57#define PCIX0_POM0PCIAH 0x078
58#define PCIX0_POM1LAL 0x07c
59#define PCIX0_POM1LAH 0x080
60#define PCIX0_POM1SA 0x084
61#define PCIX0_POM1PCIAL 0x088
62#define PCIX0_POM1PCIAH 0x08c
63#define PCIX0_POM2SA 0x090
64#define PCIX0_PIM0SAL 0x098
65#define PCIX0_PIM0SA PCIX0_PIM0SAL
66#define PCIX0_PIM0LAL 0x09c
67#define PCIX0_PIM0LAH 0x0a0
68#define PCIX0_PIM1SA 0x0a4
69#define PCIX0_PIM1LAL 0x0a8
70#define PCIX0_PIM1LAH 0x0ac
71#define PCIX0_PIM2SAL 0x0b0
72#define PCIX0_PIM2SA PCIX0_PIM2SAL
73#define PCIX0_PIM2LAL 0x0b4
74#define PCIX0_PIM2LAH 0x0b8
75#define PCIX0_OMCAPID 0x0c0
76#define PCIX0_OMNIPTR 0x0c1
77#define PCIX0_OMMC 0x0c2
78#define PCIX0_OMMA 0x0c4
79#define PCIX0_OMMUA 0x0c8
80#define PCIX0_OMMDATA 0x0cc
81#define PCIX0_OMMEOI 0x0ce
82#define PCIX0_PMCAPID 0x0d0
83#define PCIX0_PMNIPTR 0x0d1
84#define PCIX0_PMC 0x0d2
85#define PCIX0_PMCSR 0x0d4
86#define PCIX0_PMCSRBSE 0x0d6
87#define PCIX0_PMDATA 0x0d7
88#define PCIX0_PMSCRR 0x0d8
89#define PCIX0_CAPID 0x0dc
90#define PCIX0_NIPTR 0x0dd
91#define PCIX0_CMD 0x0de
92#define PCIX0_STS 0x0e0
93#define PCIX0_IDR 0x0e4
94#define PCIX0_CID 0x0e8
95#define PCIX0_RID 0x0ec
96#define PCIX0_PIM0SAH 0x0f8
97#define PCIX0_PIM2SAH 0x0fc
98#define PCIX0_MSGIL 0x100
99#define PCIX0_MSGIH 0x104
100#define PCIX0_MSGOL 0x108
101#define PCIX0_MSGOH 0x10c
102#define PCIX0_IM 0x1f8
103
104/*
105 * 4xx PCI bridge register definitions
106 */
107#define PCIL0_PMM0LA 0x00
108#define PCIL0_PMM0MA 0x04
109#define PCIL0_PMM0PCILA 0x08
110#define PCIL0_PMM0PCIHA 0x0c
111#define PCIL0_PMM1LA 0x10
112#define PCIL0_PMM1MA 0x14
113#define PCIL0_PMM1PCILA 0x18
114#define PCIL0_PMM1PCIHA 0x1c
115#define PCIL0_PMM2LA 0x20
116#define PCIL0_PMM2MA 0x24
117#define PCIL0_PMM2PCILA 0x28
118#define PCIL0_PMM2PCIHA 0x2c
119#define PCIL0_PTM1MS 0x30
120#define PCIL0_PTM1LA 0x34
121#define PCIL0_PTM2MS 0x38
122#define PCIL0_PTM2LA 0x3c
123
124/*
125 * 4xx PCIe bridge register definitions
126 */
127
128/* DCR offsets */
129#define DCRO_PEGPL_CFGBAH 0x00
130#define DCRO_PEGPL_CFGBAL 0x01
131#define DCRO_PEGPL_CFGMSK 0x02
132#define DCRO_PEGPL_MSGBAH 0x03
133#define DCRO_PEGPL_MSGBAL 0x04
134#define DCRO_PEGPL_MSGMSK 0x05
135#define DCRO_PEGPL_OMR1BAH 0x06
136#define DCRO_PEGPL_OMR1BAL 0x07
137#define DCRO_PEGPL_OMR1MSKH 0x08
138#define DCRO_PEGPL_OMR1MSKL 0x09
139#define DCRO_PEGPL_OMR2BAH 0x0a
140#define DCRO_PEGPL_OMR2BAL 0x0b
141#define DCRO_PEGPL_OMR2MSKH 0x0c
142#define DCRO_PEGPL_OMR2MSKL 0x0d
143#define DCRO_PEGPL_OMR3BAH 0x0e
144#define DCRO_PEGPL_OMR3BAL 0x0f
145#define DCRO_PEGPL_OMR3MSKH 0x10
146#define DCRO_PEGPL_OMR3MSKL 0x11
147#define DCRO_PEGPL_REGBAH 0x12
148#define DCRO_PEGPL_REGBAL 0x13
149#define DCRO_PEGPL_REGMSK 0x14
150#define DCRO_PEGPL_SPECIAL 0x15
151#define DCRO_PEGPL_CFG 0x16
152#define DCRO_PEGPL_ESR 0x17
153#define DCRO_PEGPL_EARH 0x18
154#define DCRO_PEGPL_EARL 0x19
155#define DCRO_PEGPL_EATR 0x1a
156
157/* DMER mask */
158#define GPL_DMER_MASK_DISA 0x02000000
159
160/*
161 * System DCRs (SDRs)
162 */
163#define PESDR0_PLLLCT1 0x03a0
164#define PESDR0_PLLLCT2 0x03a1
165#define PESDR0_PLLLCT3 0x03a2
166
167/*
168 * 440SPe additional DCRs
169 */
170#define PESDR0_440SPE_UTLSET1 0x0300
171#define PESDR0_440SPE_UTLSET2 0x0301
172#define PESDR0_440SPE_DLPSET 0x0302
173#define PESDR0_440SPE_LOOP 0x0303
174#define PESDR0_440SPE_RCSSET 0x0304
175#define PESDR0_440SPE_RCSSTS 0x0305
176#define PESDR0_440SPE_HSSL0SET1 0x0306
177#define PESDR0_440SPE_HSSL0SET2 0x0307
178#define PESDR0_440SPE_HSSL0STS 0x0308
179#define PESDR0_440SPE_HSSL1SET1 0x0309
180#define PESDR0_440SPE_HSSL1SET2 0x030a
181#define PESDR0_440SPE_HSSL1STS 0x030b
182#define PESDR0_440SPE_HSSL2SET1 0x030c
183#define PESDR0_440SPE_HSSL2SET2 0x030d
184#define PESDR0_440SPE_HSSL2STS 0x030e
185#define PESDR0_440SPE_HSSL3SET1 0x030f
186#define PESDR0_440SPE_HSSL3SET2 0x0310
187#define PESDR0_440SPE_HSSL3STS 0x0311
188#define PESDR0_440SPE_HSSL4SET1 0x0312
189#define PESDR0_440SPE_HSSL4SET2 0x0313
190#define PESDR0_440SPE_HSSL4STS 0x0314
191#define PESDR0_440SPE_HSSL5SET1 0x0315
192#define PESDR0_440SPE_HSSL5SET2 0x0316
193#define PESDR0_440SPE_HSSL5STS 0x0317
194#define PESDR0_440SPE_HSSL6SET1 0x0318
195#define PESDR0_440SPE_HSSL6SET2 0x0319
196#define PESDR0_440SPE_HSSL6STS 0x031a
197#define PESDR0_440SPE_HSSL7SET1 0x031b
198#define PESDR0_440SPE_HSSL7SET2 0x031c
199#define PESDR0_440SPE_HSSL7STS 0x031d
200#define PESDR0_440SPE_HSSCTLSET 0x031e
201#define PESDR0_440SPE_LANE_ABCD 0x031f
202#define PESDR0_440SPE_LANE_EFGH 0x0320
203
204#define PESDR1_440SPE_UTLSET1 0x0340
205#define PESDR1_440SPE_UTLSET2 0x0341
206#define PESDR1_440SPE_DLPSET 0x0342
207#define PESDR1_440SPE_LOOP 0x0343
208#define PESDR1_440SPE_RCSSET 0x0344
209#define PESDR1_440SPE_RCSSTS 0x0345
210#define PESDR1_440SPE_HSSL0SET1 0x0346
211#define PESDR1_440SPE_HSSL0SET2 0x0347
212#define PESDR1_440SPE_HSSL0STS 0x0348
213#define PESDR1_440SPE_HSSL1SET1 0x0349
214#define PESDR1_440SPE_HSSL1SET2 0x034a
215#define PESDR1_440SPE_HSSL1STS 0x034b
216#define PESDR1_440SPE_HSSL2SET1 0x034c
217#define PESDR1_440SPE_HSSL2SET2 0x034d
218#define PESDR1_440SPE_HSSL2STS 0x034e
219#define PESDR1_440SPE_HSSL3SET1 0x034f
220#define PESDR1_440SPE_HSSL3SET2 0x0350
221#define PESDR1_440SPE_HSSL3STS 0x0351
222#define PESDR1_440SPE_HSSCTLSET 0x0352
223#define PESDR1_440SPE_LANE_ABCD 0x0353
224
225#define PESDR2_440SPE_UTLSET1 0x0370
226#define PESDR2_440SPE_UTLSET2 0x0371
227#define PESDR2_440SPE_DLPSET 0x0372
228#define PESDR2_440SPE_LOOP 0x0373
229#define PESDR2_440SPE_RCSSET 0x0374
230#define PESDR2_440SPE_RCSSTS 0x0375
231#define PESDR2_440SPE_HSSL0SET1 0x0376
232#define PESDR2_440SPE_HSSL0SET2 0x0377
233#define PESDR2_440SPE_HSSL0STS 0x0378
234#define PESDR2_440SPE_HSSL1SET1 0x0379
235#define PESDR2_440SPE_HSSL1SET2 0x037a
236#define PESDR2_440SPE_HSSL1STS 0x037b
237#define PESDR2_440SPE_HSSL2SET1 0x037c
238#define PESDR2_440SPE_HSSL2SET2 0x037d
239#define PESDR2_440SPE_HSSL2STS 0x037e
240#define PESDR2_440SPE_HSSL3SET1 0x037f
241#define PESDR2_440SPE_HSSL3SET2 0x0380
242#define PESDR2_440SPE_HSSL3STS 0x0381
243#define PESDR2_440SPE_HSSCTLSET 0x0382
244#define PESDR2_440SPE_LANE_ABCD 0x0383
245
246/*
247 * 405EX additional DCRs
248 */
249#define PESDR0_405EX_UTLSET1 0x0400
250#define PESDR0_405EX_UTLSET2 0x0401
251#define PESDR0_405EX_DLPSET 0x0402
252#define PESDR0_405EX_LOOP 0x0403
253#define PESDR0_405EX_RCSSET 0x0404
254#define PESDR0_405EX_RCSSTS 0x0405
255#define PESDR0_405EX_PHYSET1 0x0406
256#define PESDR0_405EX_PHYSET2 0x0407
257#define PESDR0_405EX_BIST 0x0408
258#define PESDR0_405EX_LPB 0x040B
259#define PESDR0_405EX_PHYSTA 0x040C
260
261#define PESDR1_405EX_UTLSET1 0x0440
262#define PESDR1_405EX_UTLSET2 0x0441
263#define PESDR1_405EX_DLPSET 0x0442
264#define PESDR1_405EX_LOOP 0x0443
265#define PESDR1_405EX_RCSSET 0x0444
266#define PESDR1_405EX_RCSSTS 0x0445
267#define PESDR1_405EX_PHYSET1 0x0446
268#define PESDR1_405EX_PHYSET2 0x0447
269#define PESDR1_405EX_BIST 0x0448
270#define PESDR1_405EX_LPB 0x044B
271#define PESDR1_405EX_PHYSTA 0x044C
272
273/*
274 * Of the above, some are common offsets from the base
275 */
276#define PESDRn_UTLSET1 0x00
277#define PESDRn_UTLSET2 0x01
278#define PESDRn_DLPSET 0x02
279#define PESDRn_LOOP 0x03
280#define PESDRn_RCSSET 0x04
281#define PESDRn_RCSSTS 0x05
282
283/* 440spe only */
284#define PESDRn_440SPE_HSSL0SET1 0x06
285#define PESDRn_440SPE_HSSL0SET2 0x07
286#define PESDRn_440SPE_HSSL0STS 0x08
287#define PESDRn_440SPE_HSSL1SET1 0x09
288#define PESDRn_440SPE_HSSL1SET2 0x0a
289#define PESDRn_440SPE_HSSL1STS 0x0b
290#define PESDRn_440SPE_HSSL2SET1 0x0c
291#define PESDRn_440SPE_HSSL2SET2 0x0d
292#define PESDRn_440SPE_HSSL2STS 0x0e
293#define PESDRn_440SPE_HSSL3SET1 0x0f
294#define PESDRn_440SPE_HSSL3SET2 0x10
295#define PESDRn_440SPE_HSSL3STS 0x11
296
297/* 440spe port 0 only */
298#define PESDRn_440SPE_HSSL4SET1 0x12
299#define PESDRn_440SPE_HSSL4SET2 0x13
300#define PESDRn_440SPE_HSSL4STS 0x14
301#define PESDRn_440SPE_HSSL5SET1 0x15
302#define PESDRn_440SPE_HSSL5SET2 0x16
303#define PESDRn_440SPE_HSSL5STS 0x17
304#define PESDRn_440SPE_HSSL6SET1 0x18
305#define PESDRn_440SPE_HSSL6SET2 0x19
306#define PESDRn_440SPE_HSSL6STS 0x1a
307#define PESDRn_440SPE_HSSL7SET1 0x1b
308#define PESDRn_440SPE_HSSL7SET2 0x1c
309#define PESDRn_440SPE_HSSL7STS 0x1d
310
311/* 405ex only */
312#define PESDRn_405EX_PHYSET1 0x06
313#define PESDRn_405EX_PHYSET2 0x07
314#define PESDRn_405EX_PHYSTA 0x0c
315
316/*
317 * UTL register offsets
318 */
319#define PEUTL_PBCTL 0x00
320#define PEUTL_PBBSZ 0x20
321#define PEUTL_OPDBSZ 0x68
322#define PEUTL_IPHBSZ 0x70
323#define PEUTL_IPDBSZ 0x78
324#define PEUTL_OUTTR 0x90
325#define PEUTL_INTR 0x98
326#define PEUTL_PCTL 0xa0
327#define PEUTL_RCSTA 0xB0
328#define PEUTL_RCIRQEN 0xb8
329
330/*
331 * Config space register offsets
332 */
333#define PECFG_ECRTCTL 0x074
334
335#define PECFG_BAR0LMPA 0x210
336#define PECFG_BAR0HMPA 0x214
337#define PECFG_BAR1MPA 0x218
338#define PECFG_BAR2LMPA 0x220
339#define PECFG_BAR2HMPA 0x224
340
341#define PECFG_PIMEN 0x33c
342#define PECFG_PIM0LAL 0x340
343#define PECFG_PIM0LAH 0x344
344#define PECFG_PIM1LAL 0x348
345#define PECFG_PIM1LAH 0x34c
346#define PECFG_PIM01SAL 0x350
347#define PECFG_PIM01SAH 0x354
348
349#define PECFG_POM0LAL 0x380
350#define PECFG_POM0LAH 0x384
351#define PECFG_POM1LAL 0x388
352#define PECFG_POM1LAH 0x38c
353#define PECFG_POM2LAL 0x390
354#define PECFG_POM2LAH 0x394
355
356
357enum
358{
359 PTYPE_ENDPOINT = 0x0,
360 PTYPE_LEGACY_ENDPOINT = 0x1,
361 PTYPE_ROOT_PORT = 0x4,
362
363 LNKW_X1 = 0x1,
364 LNKW_X4 = 0x4,
365 LNKW_X8 = 0x8
366};
367
368
369#endif /* __PPC4XX_PCI_H__ */
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 847a5496b869..ae3eadddddbd 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -53,21 +53,23 @@ struct uic {
53 53
54 /* The remapper for this UIC */ 54 /* The remapper for this UIC */
55 struct irq_host *irqhost; 55 struct irq_host *irqhost;
56
57 /* For secondary UICs, the cascade interrupt's irqaction */
58 struct irqaction cascade;
59}; 56};
60 57
61static void uic_unmask_irq(unsigned int virq) 58static void uic_unmask_irq(unsigned int virq)
62{ 59{
60 struct irq_desc *desc = get_irq_desc(virq);
63 struct uic *uic = get_irq_chip_data(virq); 61 struct uic *uic = get_irq_chip_data(virq);
64 unsigned int src = uic_irq_to_hw(virq); 62 unsigned int src = uic_irq_to_hw(virq);
65 unsigned long flags; 63 unsigned long flags;
66 u32 er; 64 u32 er, sr;
67 65
66 sr = 1 << (31-src);
68 spin_lock_irqsave(&uic->lock, flags); 67 spin_lock_irqsave(&uic->lock, flags);
68 /* ack level-triggered interrupts here */
69 if (desc->status & IRQ_LEVEL)
70 mtdcr(uic->dcrbase + UIC_SR, sr);
69 er = mfdcr(uic->dcrbase + UIC_ER); 71 er = mfdcr(uic->dcrbase + UIC_ER);
70 er |= 1 << (31 - src); 72 er |= sr;
71 mtdcr(uic->dcrbase + UIC_ER, er); 73 mtdcr(uic->dcrbase + UIC_ER, er);
72 spin_unlock_irqrestore(&uic->lock, flags); 74 spin_unlock_irqrestore(&uic->lock, flags);
73} 75}
@@ -99,6 +101,7 @@ static void uic_ack_irq(unsigned int virq)
99 101
100static void uic_mask_ack_irq(unsigned int virq) 102static void uic_mask_ack_irq(unsigned int virq)
101{ 103{
104 struct irq_desc *desc = get_irq_desc(virq);
102 struct uic *uic = get_irq_chip_data(virq); 105 struct uic *uic = get_irq_chip_data(virq);
103 unsigned int src = uic_irq_to_hw(virq); 106 unsigned int src = uic_irq_to_hw(virq);
104 unsigned long flags; 107 unsigned long flags;
@@ -109,7 +112,16 @@ static void uic_mask_ack_irq(unsigned int virq)
109 er = mfdcr(uic->dcrbase + UIC_ER); 112 er = mfdcr(uic->dcrbase + UIC_ER);
110 er &= ~sr; 113 er &= ~sr;
111 mtdcr(uic->dcrbase + UIC_ER, er); 114 mtdcr(uic->dcrbase + UIC_ER, er);
112 mtdcr(uic->dcrbase + UIC_SR, sr); 115 /* On the UIC, acking (i.e. clearing the SR bit)
116 * a level irq will have no effect if the interrupt
117 * is still asserted by the device, even if
118 * the interrupt is already masked. Therefore
119 * we only ack the egde interrupts here, while
120 * level interrupts are ack'ed after the actual
121 * isr call in the uic_unmask_irq()
122 */
123 if (!(desc->status & IRQ_LEVEL))
124 mtdcr(uic->dcrbase + UIC_SR, sr);
113 spin_unlock_irqrestore(&uic->lock, flags); 125 spin_unlock_irqrestore(&uic->lock, flags);
114} 126}
115 127
@@ -173,64 +185,6 @@ static struct irq_chip uic_irq_chip = {
173 .set_type = uic_set_irq_type, 185 .set_type = uic_set_irq_type,
174}; 186};
175 187
176/**
177 * handle_uic_irq - irq flow handler for UIC
178 * @irq: the interrupt number
179 * @desc: the interrupt description structure for this irq
180 *
181 * This is modified version of the generic handle_level_irq() suitable
182 * for the UIC. On the UIC, acking (i.e. clearing the SR bit) a level
183 * irq will have no effect if the interrupt is still asserted by the
184 * device, even if the interrupt is already masked. Therefore, unlike
185 * the standard handle_level_irq(), we must ack the interrupt *after*
186 * invoking the ISR (which should have de-asserted the interrupt in
187 * the external source). For edge interrupts we ack at the beginning
188 * instead of the end, to keep the window in which we can miss an
189 * interrupt as small as possible.
190 */
191void fastcall handle_uic_irq(unsigned int irq, struct irq_desc *desc)
192{
193 unsigned int cpu = smp_processor_id();
194 struct irqaction *action;
195 irqreturn_t action_ret;
196
197 spin_lock(&desc->lock);
198 if (desc->status & IRQ_LEVEL)
199 desc->chip->mask(irq);
200 else
201 desc->chip->mask_ack(irq);
202
203 if (unlikely(desc->status & IRQ_INPROGRESS))
204 goto out_unlock;
205 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
206 kstat_cpu(cpu).irqs[irq]++;
207
208 /*
209 * If its disabled or no action available
210 * keep it masked and get out of here
211 */
212 action = desc->action;
213 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
214 desc->status |= IRQ_PENDING;
215 goto out_unlock;
216 }
217
218 desc->status |= IRQ_INPROGRESS;
219 desc->status &= ~IRQ_PENDING;
220 spin_unlock(&desc->lock);
221
222 action_ret = handle_IRQ_event(irq, action);
223
224 spin_lock(&desc->lock);
225 desc->status &= ~IRQ_INPROGRESS;
226 if (desc->status & IRQ_LEVEL)
227 desc->chip->ack(irq);
228 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
229 desc->chip->unmask(irq);
230out_unlock:
231 spin_unlock(&desc->lock);
232}
233
234static int uic_host_map(struct irq_host *h, unsigned int virq, 188static int uic_host_map(struct irq_host *h, unsigned int virq,
235 irq_hw_number_t hw) 189 irq_hw_number_t hw)
236{ 190{
@@ -239,7 +193,7 @@ static int uic_host_map(struct irq_host *h, unsigned int virq,
239 set_irq_chip_data(virq, uic); 193 set_irq_chip_data(virq, uic);
240 /* Despite the name, handle_level_irq() works for both level 194 /* Despite the name, handle_level_irq() works for both level
241 * and edge irqs on UIC. FIXME: check this is correct */ 195 * and edge irqs on UIC. FIXME: check this is correct */
242 set_irq_chip_and_handler(virq, &uic_irq_chip, handle_uic_irq); 196 set_irq_chip_and_handler(virq, &uic_irq_chip, handle_level_irq);
243 197
244 /* Set default irq type */ 198 /* Set default irq type */
245 set_irq_type(virq, IRQ_TYPE_NONE); 199 set_irq_type(virq, IRQ_TYPE_NONE);
@@ -264,23 +218,36 @@ static struct irq_host_ops uic_host_ops = {
264 .xlate = uic_host_xlate, 218 .xlate = uic_host_xlate,
265}; 219};
266 220
267irqreturn_t uic_cascade(int virq, void *data) 221void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
268{ 222{
269 struct uic *uic = data; 223 struct uic *uic = get_irq_data(virq);
270 u32 msr; 224 u32 msr;
271 int src; 225 int src;
272 int subvirq; 226 int subvirq;
273 227
228 spin_lock(&desc->lock);
229 if (desc->status & IRQ_LEVEL)
230 desc->chip->mask(virq);
231 else
232 desc->chip->mask_ack(virq);
233 spin_unlock(&desc->lock);
234
274 msr = mfdcr(uic->dcrbase + UIC_MSR); 235 msr = mfdcr(uic->dcrbase + UIC_MSR);
275 if (!msr) /* spurious interrupt */ 236 if (!msr) /* spurious interrupt */
276 return IRQ_HANDLED; 237 goto uic_irq_ret;
277 238
278 src = 32 - ffs(msr); 239 src = 32 - ffs(msr);
279 240
280 subvirq = irq_linear_revmap(uic->irqhost, src); 241 subvirq = irq_linear_revmap(uic->irqhost, src);
281 generic_handle_irq(subvirq); 242 generic_handle_irq(subvirq);
282 243
283 return IRQ_HANDLED; 244uic_irq_ret:
245 spin_lock(&desc->lock);
246 if (desc->status & IRQ_LEVEL)
247 desc->chip->ack(virq);
248 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
249 desc->chip->unmask(virq);
250 spin_unlock(&desc->lock);
284} 251}
285 252
286static struct uic * __init uic_init_one(struct device_node *node) 253static struct uic * __init uic_init_one(struct device_node *node)
@@ -368,7 +335,6 @@ void __init uic_init_tree(void)
368 if (interrupts) { 335 if (interrupts) {
369 /* Secondary UIC */ 336 /* Secondary UIC */
370 int cascade_virq; 337 int cascade_virq;
371 int ret;
372 338
373 uic = uic_init_one(np); 339 uic = uic_init_one(np);
374 if (! uic) 340 if (! uic)
@@ -377,15 +343,8 @@ void __init uic_init_tree(void)
377 343
378 cascade_virq = irq_of_parse_and_map(np, 0); 344 cascade_virq = irq_of_parse_and_map(np, 0);
379 345
380 uic->cascade.handler = uic_cascade; 346 set_irq_data(cascade_virq, uic);
381 uic->cascade.name = "UIC cascade"; 347 set_irq_chained_handler(cascade_virq, uic_irq_cascade);
382 uic->cascade.dev_id = uic;
383
384 ret = setup_irq(cascade_virq, &uic->cascade);
385 if (ret)
386 printk(KERN_ERR "Failed to setup_irq(%d) for "
387 "UIC%d cascade\n", cascade_virq,
388 uic->index);
389 348
390 /* FIXME: setup critical cascade?? */ 349 /* FIXME: setup critical cascade?? */
391 } 350 }
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 75bbc937ed73..ebb5a403829f 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -195,7 +195,7 @@ skpinv: addi r4,r4,1 /* Increment */
195 li r5,0 195 li r5,0
196 ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G) 196 ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G)
197 197
198 li r0,0 /* TLB slot 0 */ 198 li r0,62 /* TLB slot 62 */
199 199
200 tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */ 200 tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
201 tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */ 201 tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index c78568905c3b..25a1085fbd01 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -231,39 +231,25 @@ platform_machine_check(struct pt_regs *regs)
231{ 231{
232} 232}
233 233
234void machine_check_exception(struct pt_regs *regs) 234#if defined(CONFIG_4xx)
235int machine_check_4xx(struct pt_regs *regs)
235{ 236{
236 unsigned long reason = get_mc_reason(regs); 237 unsigned long reason = get_mc_reason(regs);
237 238
238 if (user_mode(regs)) {
239 regs->msr |= MSR_RI;
240 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
241 return;
242 }
243
244#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
245 /* the qspan pci read routines can cause machine checks -- Cort */
246 bad_page_fault(regs, regs->dar, SIGBUS);
247 return;
248#endif
249
250 if (debugger_fault_handler) {
251 debugger_fault_handler(regs);
252 regs->msr |= MSR_RI;
253 return;
254 }
255
256 if (check_io_access(regs))
257 return;
258
259#if defined(CONFIG_4xx) && !defined(CONFIG_440A)
260 if (reason & ESR_IMCP) { 239 if (reason & ESR_IMCP) {
261 printk("Instruction"); 240 printk("Instruction");
262 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 241 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
263 } else 242 } else
264 printk("Data"); 243 printk("Data");
265 printk(" machine check in kernel mode.\n"); 244 printk(" machine check in kernel mode.\n");
266#elif defined(CONFIG_440A) 245
246 return 0;
247}
248
249int machine_check_440A(struct pt_regs *regs)
250{
251 unsigned long reason = get_mc_reason(regs);
252
267 printk("Machine check in kernel mode.\n"); 253 printk("Machine check in kernel mode.\n");
268 if (reason & ESR_IMCP){ 254 if (reason & ESR_IMCP){
269 printk("Instruction Synchronous Machine Check exception\n"); 255 printk("Instruction Synchronous Machine Check exception\n");
@@ -293,7 +279,13 @@ void machine_check_exception(struct pt_regs *regs)
293 /* Clear MCSR */ 279 /* Clear MCSR */
294 mtspr(SPRN_MCSR, mcsr); 280 mtspr(SPRN_MCSR, mcsr);
295 } 281 }
296#elif defined (CONFIG_E500) 282 return 0;
283}
284#elif defined(CONFIG_E500)
285int machine_check_e500(struct pt_regs *regs)
286{
287 unsigned long reason = get_mc_reason(regs);
288
297 printk("Machine check in kernel mode.\n"); 289 printk("Machine check in kernel mode.\n");
298 printk("Caused by (from MCSR=%lx): ", reason); 290 printk("Caused by (from MCSR=%lx): ", reason);
299 291
@@ -305,8 +297,6 @@ void machine_check_exception(struct pt_regs *regs)
305 printk("Data Cache Push Parity Error\n"); 297 printk("Data Cache Push Parity Error\n");
306 if (reason & MCSR_DCPERR) 298 if (reason & MCSR_DCPERR)
307 printk("Data Cache Parity Error\n"); 299 printk("Data Cache Parity Error\n");
308 if (reason & MCSR_GL_CI)
309 printk("Guarded Load or Cache-Inhibited stwcx.\n");
310 if (reason & MCSR_BUS_IAERR) 300 if (reason & MCSR_BUS_IAERR)
311 printk("Bus - Instruction Address Error\n"); 301 printk("Bus - Instruction Address Error\n");
312 if (reason & MCSR_BUS_RAERR) 302 if (reason & MCSR_BUS_RAERR)
@@ -318,12 +308,19 @@ void machine_check_exception(struct pt_regs *regs)
318 if (reason & MCSR_BUS_RBERR) 308 if (reason & MCSR_BUS_RBERR)
319 printk("Bus - Read Data Bus Error\n"); 309 printk("Bus - Read Data Bus Error\n");
320 if (reason & MCSR_BUS_WBERR) 310 if (reason & MCSR_BUS_WBERR)
321 printk("Bus - Write Data Bus Error\n"); 311 printk("Bus - Read Data Bus Error\n");
322 if (reason & MCSR_BUS_IPERR) 312 if (reason & MCSR_BUS_IPERR)
323 printk("Bus - Instruction Parity Error\n"); 313 printk("Bus - Instruction Parity Error\n");
324 if (reason & MCSR_BUS_RPERR) 314 if (reason & MCSR_BUS_RPERR)
325 printk("Bus - Read Parity Error\n"); 315 printk("Bus - Read Parity Error\n");
326#elif defined (CONFIG_E200) 316
317 return 0;
318}
319#elif defined(CONFIG_E200)
320int machine_check_e200(struct pt_regs *regs)
321{
322 unsigned long reason = get_mc_reason(regs);
323
327 printk("Machine check in kernel mode.\n"); 324 printk("Machine check in kernel mode.\n");
328 printk("Caused by (from MCSR=%lx): ", reason); 325 printk("Caused by (from MCSR=%lx): ", reason);
329 326
@@ -341,7 +338,14 @@ void machine_check_exception(struct pt_regs *regs)
341 printk("Bus - Read Bus Error on data load\n"); 338 printk("Bus - Read Bus Error on data load\n");
342 if (reason & MCSR_BUS_WRERR) 339 if (reason & MCSR_BUS_WRERR)
343 printk("Bus - Write Bus Error on buffered store or cache line push\n"); 340 printk("Bus - Write Bus Error on buffered store or cache line push\n");
344#else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */ 341
342 return 0;
343}
344#else
345int machine_check_generic(struct pt_regs *regs)
346{
347 unsigned long reason = get_mc_reason(regs);
348
345 printk("Machine check in kernel mode.\n"); 349 printk("Machine check in kernel mode.\n");
346 printk("Caused by (from SRR1=%lx): ", reason); 350 printk("Caused by (from SRR1=%lx): ", reason);
347 switch (reason & 0x601F0000) { 351 switch (reason & 0x601F0000) {
@@ -371,7 +375,39 @@ void machine_check_exception(struct pt_regs *regs)
371 default: 375 default:
372 printk("Unknown values in msr\n"); 376 printk("Unknown values in msr\n");
373 } 377 }
374#endif /* CONFIG_4xx */ 378 return 0;
379}
380#endif /* everything else */
381
382void machine_check_exception(struct pt_regs *regs)
383{
384 int recover = 0;
385
386 if (cur_cpu_spec->machine_check)
387 recover = cur_cpu_spec->machine_check(regs);
388 if (recover > 0)
389 return;
390
391 if (user_mode(regs)) {
392 regs->msr |= MSR_RI;
393 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
394 return;
395 }
396
397#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
398 /* the qspan pci read routines can cause machine checks -- Cort */
399 bad_page_fault(regs, regs->dar, SIGBUS);
400 return;
401#endif
402
403 if (debugger_fault_handler) {
404 debugger_fault_handler(regs);
405 regs->msr |= MSR_RI;
406 return;
407 }
408
409 if (check_io_access(regs))
410 return;
375 411
376 /* 412 /*
377 * Optional platform-provided routine to print out 413 * Optional platform-provided routine to print out
diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c
index 6536a25cfcb8..fbb577a0d165 100644
--- a/arch/ppc/mm/44x_mmu.c
+++ b/arch/ppc/mm/44x_mmu.c
@@ -60,38 +60,28 @@ extern char etext[], _stext[];
60 * Just needed it declared someplace. 60 * Just needed it declared someplace.
61 */ 61 */
62unsigned int tlb_44x_index = 0; 62unsigned int tlb_44x_index = 0;
63unsigned int tlb_44x_hwater = 62; 63unsigned int tlb_44x_hwater = PPC4XX_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
64int icache_44x_need_flush; 64int icache_44x_need_flush;
65 65
66/* 66/*
67 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem 67 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
68 */ 68 */
69static void __init 69static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
70ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
71{ 70{
72 unsigned long attrib = 0; 71 __asm__ __volatile__(
73 72 "tlbwe %2,%3,%4\n"
74 __asm__ __volatile__("\ 73 "tlbwe %1,%3,%5\n"
75 clrrwi %2,%2,10\n\ 74 "tlbwe %0,%3,%6\n"
76 ori %2,%2,%4\n\
77 clrrwi %1,%1,10\n\
78 li %0,0\n\
79 ori %0,%0,%5\n\
80 tlbwe %2,%3,%6\n\
81 tlbwe %1,%3,%7\n\
82 tlbwe %0,%3,%8"
83 : 75 :
84 : "r" (attrib), "r" (phys), "r" (virt), "r" (slot), 76 : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
85 "i" (PPC44x_TLB_VALID | PPC44x_TLB_256M), 77 "r" (phys),
86 "i" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G), 78 "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
79 "r" (tlb_44x_hwater--), /* slot for this TLB entry */
87 "i" (PPC44x_TLB_PAGEID), 80 "i" (PPC44x_TLB_PAGEID),
88 "i" (PPC44x_TLB_XLAT), 81 "i" (PPC44x_TLB_XLAT),
89 "i" (PPC44x_TLB_ATTRIB)); 82 "i" (PPC44x_TLB_ATTRIB));
90} 83}
91 84
92/*
93 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
94 */
95void __init MMU_init_hw(void) 85void __init MMU_init_hw(void)
96{ 86{
97 flush_instruction_cache(); 87 flush_instruction_cache();
@@ -99,22 +89,13 @@ void __init MMU_init_hw(void)
99 89
100unsigned long __init mmu_mapin_ram(void) 90unsigned long __init mmu_mapin_ram(void)
101{ 91{
102 unsigned int pinned_tlbs = 1; 92 unsigned long addr;
103 int i;
104
105 /* Determine number of entries necessary to cover lowmem */
106 pinned_tlbs = (unsigned int)
107 (_ALIGN(total_lowmem, PPC_PIN_SIZE) >> PPC44x_PIN_SHIFT);
108
109 /* Write upper watermark to save location */
110 tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
111 93
112 /* If necessary, set additional pinned TLBs */ 94 /* Pin in enough TLBs to cover any lowmem not covered by the
113 if (pinned_tlbs > 1) 95 * initial 256M mapping established in head_44x.S */
114 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) { 96 for (addr = PPC_PIN_SIZE; addr < total_lowmem;
115 unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC_PIN_SIZE; 97 addr += PPC_PIN_SIZE)
116 ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr); 98 ppc44x_pin_tlb(addr + PAGE_OFFSET, addr);
117 }
118 99
119 return total_lowmem; 100 return total_lowmem;
120} 101}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-24 23:46:02 -0500