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-rw-r--r--arch/arm/mach-gemini/gpio.c4
-rw-r--r--arch/ia64/include/asm/acpi.h1
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c3
-rw-r--r--arch/powerpc/platforms/85xx/smp.c21
-rw-r--r--arch/x86/kernel/acpi/boot.c8
5 files changed, 24 insertions, 13 deletions
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index e7263854bc7b..fe3bd5ac8b10 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -86,7 +86,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
86 unsigned int reg_both, reg_level, reg_type; 86 unsigned int reg_both, reg_level, reg_type;
87 87
88 reg_type = __raw_readl(base + GPIO_INT_TYPE); 88 reg_type = __raw_readl(base + GPIO_INT_TYPE);
89 reg_level = __raw_readl(base + GPIO_INT_BOTH_EDGE); 89 reg_level = __raw_readl(base + GPIO_INT_LEVEL);
90 reg_both = __raw_readl(base + GPIO_INT_BOTH_EDGE); 90 reg_both = __raw_readl(base + GPIO_INT_BOTH_EDGE);
91 91
92 switch (type) { 92 switch (type) {
@@ -117,7 +117,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
117 } 117 }
118 118
119 __raw_writel(reg_type, base + GPIO_INT_TYPE); 119 __raw_writel(reg_type, base + GPIO_INT_TYPE);
120 __raw_writel(reg_level, base + GPIO_INT_BOTH_EDGE); 120 __raw_writel(reg_level, base + GPIO_INT_LEVEL);
121 __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE); 121 __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
122 122
123 gpio_ack_irq(irq); 123 gpio_ack_irq(irq);
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index 7ae58892ba8d..e97b255d97bc 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -94,6 +94,7 @@ ia64_acpi_release_global_lock (unsigned int *lock)
94#define acpi_noirq 0 /* ACPI always enabled on IA64 */ 94#define acpi_noirq 0 /* ACPI always enabled on IA64 */
95#define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */ 95#define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */
96#define acpi_strict 1 /* no ACPI spec workarounds on IA64 */ 96#define acpi_strict 1 /* no ACPI spec workarounds on IA64 */
97#define acpi_ht 0 /* no HT-only mode on IA64 */
97#endif 98#endif
98#define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ 99#define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */
99static inline void disable_acpi(void) { } 100static inline void disable_acpi(void) { }
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 21f61b8c445b..cc29c0f5300d 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -338,7 +338,8 @@ static void __init mpc85xx_mds_pic_init(void)
338 } 338 }
339 339
340 mpic = mpic_alloc(np, r.start, 340 mpic = mpic_alloc(np, r.start,
341 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 341 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
342 MPIC_BROKEN_FRR_NIRQS,
342 0, 256, " OpenPIC "); 343 0, 256, " OpenPIC ");
343 BUG_ON(mpic == NULL); 344 BUG_ON(mpic == NULL);
344 of_node_put(np); 345 of_node_put(np);
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 04160a4cc699..a15f582300d8 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -46,6 +46,7 @@ smp_85xx_kick_cpu(int nr)
46 __iomem u32 *bptr_vaddr; 46 __iomem u32 *bptr_vaddr;
47 struct device_node *np; 47 struct device_node *np;
48 int n = 0; 48 int n = 0;
49 int ioremappable;
49 50
50 WARN_ON (nr < 0 || nr >= NR_CPUS); 51 WARN_ON (nr < 0 || nr >= NR_CPUS);
51 52
@@ -59,21 +60,37 @@ smp_85xx_kick_cpu(int nr)
59 return; 60 return;
60 } 61 }
61 62
63 /*
64 * A secondary core could be in a spinloop in the bootpage
65 * (0xfffff000), somewhere in highmem, or somewhere in lowmem.
66 * The bootpage and highmem can be accessed via ioremap(), but
67 * we need to directly access the spinloop if its in lowmem.
68 */
69 ioremappable = *cpu_rel_addr > virt_to_phys(high_memory);
70
62 /* Map the spin table */ 71 /* Map the spin table */
63 bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY); 72 if (ioremappable)
73 bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
74 else
75 bptr_vaddr = phys_to_virt(*cpu_rel_addr);
64 76
65 local_irq_save(flags); 77 local_irq_save(flags);
66 78
67 out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr); 79 out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
68 out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start)); 80 out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
69 81
82 if (!ioremappable)
83 flush_dcache_range((ulong)bptr_vaddr,
84 (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY));
85
70 /* Wait a bit for the CPU to ack. */ 86 /* Wait a bit for the CPU to ack. */
71 while ((__secondary_hold_acknowledge != nr) && (++n < 1000)) 87 while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
72 mdelay(1); 88 mdelay(1);
73 89
74 local_irq_restore(flags); 90 local_irq_restore(flags);
75 91
76 iounmap(bptr_vaddr); 92 if (ioremappable)
93 iounmap(bptr_vaddr);
77 94
78 pr_debug("waited %d msecs for CPU #%d.\n", n, nr); 95 pr_debug("waited %d msecs for CPU #%d.\n", n, nr);
79} 96}
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 0acbcdfa5ca4..af1c5833ff23 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -1344,14 +1344,6 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
1344 }, 1344 },
1345 { 1345 {
1346 .callback = force_acpi_ht, 1346 .callback = force_acpi_ht,
1347 .ident = "ASUS P2B-DS",
1348 .matches = {
1349 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1350 DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"),
1351 },
1352 },
1353 {
1354 .callback = force_acpi_ht,
1355 .ident = "ASUS CUR-DLS", 1347 .ident = "ASUS CUR-DLS",
1356 .matches = { 1348 .matches = {
1357 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 1349 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),