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-rw-r--r--arch/powerpc/kernel/misc_32.S10
-rw-r--r--arch/powerpc/kernel/setup_32.c12
-rw-r--r--arch/ppc/kernel/misc.S8
-rw-r--r--arch/ppc/kernel/setup.c2
4 files changed, 15 insertions, 17 deletions
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 98decf8ebff4..e708ab7ca9e8 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -392,7 +392,7 @@ BEGIN_FTR_SECTION
392 mtspr SPRN_L1CSR0,r3 392 mtspr SPRN_L1CSR0,r3
393 isync 393 isync
394 blr 394 blr
395END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 395END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
396 mfspr r3,SPRN_L1CSR1 396 mfspr r3,SPRN_L1CSR1
397 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR 397 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
398 mtspr SPRN_L1CSR1,r3 398 mtspr SPRN_L1CSR1,r3
@@ -419,7 +419,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
419_GLOBAL(__flush_icache_range) 419_GLOBAL(__flush_icache_range)
420BEGIN_FTR_SECTION 420BEGIN_FTR_SECTION
421 blr /* for 601, do nothing */ 421 blr /* for 601, do nothing */
422END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 422END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
423 li r5,L1_CACHE_BYTES-1 423 li r5,L1_CACHE_BYTES-1
424 andc r3,r3,r5 424 andc r3,r3,r5
425 subf r4,r3,r4 425 subf r4,r3,r4
@@ -514,8 +514,8 @@ _GLOBAL(invalidate_dcache_range)
514 */ 514 */
515_GLOBAL(__flush_dcache_icache) 515_GLOBAL(__flush_dcache_icache)
516BEGIN_FTR_SECTION 516BEGIN_FTR_SECTION
517 blr /* for 601, do nothing */ 517 blr
518END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 518END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
519 rlwinm r3,r3,0,0,19 /* Get page base address */ 519 rlwinm r3,r3,0,0,19 /* Get page base address */
520 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ 520 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
521 mtctr r4 521 mtctr r4
@@ -543,7 +543,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
543_GLOBAL(__flush_dcache_icache_phys) 543_GLOBAL(__flush_dcache_icache_phys)
544BEGIN_FTR_SECTION 544BEGIN_FTR_SECTION
545 blr /* for 601, do nothing */ 545 blr /* for 601, do nothing */
546END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 546END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
547 mfmsr r10 547 mfmsr r10
548 rlwinm r0,r10,0,28,26 /* clear DR */ 548 rlwinm r0,r10,0,28,26 /* clear DR */
549 mtmsr r0 549 mtmsr r0
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 35f8f443c14f..7ec6ba56d83d 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -262,13 +262,11 @@ void __init setup_arch(char **cmdline_p)
262 * Systems with OF can look in the properties on the cpu node(s) 262 * Systems with OF can look in the properties on the cpu node(s)
263 * for a possibly more accurate value. 263 * for a possibly more accurate value.
264 */ 264 */
265 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) { 265 dcache_bsize = cur_cpu_spec->dcache_bsize;
266 dcache_bsize = cur_cpu_spec->dcache_bsize; 266 icache_bsize = cur_cpu_spec->icache_bsize;
267 icache_bsize = cur_cpu_spec->icache_bsize; 267 ucache_bsize = 0;
268 ucache_bsize = 0; 268 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
269 } else 269 ucache_bsize = icache_bsize = dcache_bsize;
270 ucache_bsize = dcache_bsize = icache_bsize
271 = cur_cpu_spec->dcache_bsize;
272 270
273 /* reboot on panic */ 271 /* reboot on panic */
274 panic_timeout = 180; 272 panic_timeout = 180;
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index d319f9ba2379..0da55368655c 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -328,7 +328,7 @@ BEGIN_FTR_SECTION
328 mtspr SPRN_L1CSR0,r3 328 mtspr SPRN_L1CSR0,r3
329 isync 329 isync
330 blr 330 blr
331END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 331END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
332 mfspr r3,SPRN_L1CSR1 332 mfspr r3,SPRN_L1CSR1
333 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR 333 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
334 mtspr SPRN_L1CSR1,r3 334 mtspr SPRN_L1CSR1,r3
@@ -355,7 +355,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
355_GLOBAL(__flush_icache_range) 355_GLOBAL(__flush_icache_range)
356BEGIN_FTR_SECTION 356BEGIN_FTR_SECTION
357 blr /* for 601, do nothing */ 357 blr /* for 601, do nothing */
358END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 358END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
359 li r5,L1_CACHE_BYTES-1 359 li r5,L1_CACHE_BYTES-1
360 andc r3,r3,r5 360 andc r3,r3,r5
361 subf r4,r3,r4 361 subf r4,r3,r4
@@ -472,7 +472,7 @@ _GLOBAL(flush_dcache_all)
472_GLOBAL(__flush_dcache_icache) 472_GLOBAL(__flush_dcache_icache)
473BEGIN_FTR_SECTION 473BEGIN_FTR_SECTION
474 blr /* for 601, do nothing */ 474 blr /* for 601, do nothing */
475END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 475END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
476 rlwinm r3,r3,0,0,19 /* Get page base address */ 476 rlwinm r3,r3,0,0,19 /* Get page base address */
477 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ 477 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
478 mtctr r4 478 mtctr r4
@@ -500,7 +500,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
500_GLOBAL(__flush_dcache_icache_phys) 500_GLOBAL(__flush_dcache_icache_phys)
501BEGIN_FTR_SECTION 501BEGIN_FTR_SECTION
502 blr /* for 601, do nothing */ 502 blr /* for 601, do nothing */
503END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 503END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
504 mfmsr r10 504 mfmsr r10
505 rlwinm r0,r10,0,28,26 /* clear DR */ 505 rlwinm r0,r10,0,28,26 /* clear DR */
506 mtmsr r0 506 mtmsr r0
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index c79704f5409c..967c1ef59a6b 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -526,7 +526,7 @@ void __init setup_arch(char **cmdline_p)
526 * Systems with OF can look in the properties on the cpu node(s) 526 * Systems with OF can look in the properties on the cpu node(s)
527 * for a possibly more accurate value. 527 * for a possibly more accurate value.
528 */ 528 */
529 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) { 529 if (! cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) {
530 dcache_bsize = cur_cpu_spec->dcache_bsize; 530 dcache_bsize = cur_cpu_spec->dcache_bsize;
531 icache_bsize = cur_cpu_spec->icache_bsize; 531 icache_bsize = cur_cpu_spec->icache_bsize;
532 ucache_bsize = 0; 532 ucache_bsize = 0;