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-rw-r--r--arch/cris/arch-v32/kernel/smp.c2
-rw-r--r--arch/m32r/kernel/smp.c12
-rw-r--r--arch/mips/pci/fixup-tb0226.c33
-rw-r--r--arch/ppc64/kernel/pmac_setup.c3
-rw-r--r--arch/sh/kernel/smp.c3
5 files changed, 32 insertions, 21 deletions
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index 2c5cae04a95c..957f551ba5ce 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/cpumask.h> 16#include <linux/cpumask.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/module.h>
18 19
19#define IPI_SCHEDULE 1 20#define IPI_SCHEDULE 1
20#define IPI_CALL 2 21#define IPI_CALL 2
@@ -28,6 +29,7 @@ spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
28/* CPU masks */ 29/* CPU masks */
29cpumask_t cpu_online_map = CPU_MASK_NONE; 30cpumask_t cpu_online_map = CPU_MASK_NONE;
30cpumask_t phys_cpu_present_map = CPU_MASK_NONE; 31cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
32EXPORT_SYMBOL(phys_cpu_present_map);
31 33
32/* Variables used during SMP boot */ 34/* Variables used during SMP boot */
33volatile int cpu_now_booting = 0; 35volatile int cpu_now_booting = 0;
diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c
index a4576ac7e870..8b1f6eb76870 100644
--- a/arch/m32r/kernel/smp.c
+++ b/arch/m32r/kernel/smp.c
@@ -275,12 +275,14 @@ static void flush_tlb_all_ipi(void *info)
275 *==========================================================================*/ 275 *==========================================================================*/
276void smp_flush_tlb_mm(struct mm_struct *mm) 276void smp_flush_tlb_mm(struct mm_struct *mm)
277{ 277{
278 int cpu_id = smp_processor_id(); 278 int cpu_id;
279 cpumask_t cpu_mask; 279 cpumask_t cpu_mask;
280 unsigned long *mmc = &mm->context[cpu_id]; 280 unsigned long *mmc;
281 unsigned long flags; 281 unsigned long flags;
282 282
283 preempt_disable(); 283 preempt_disable();
284 cpu_id = smp_processor_id();
285 mmc = &mm->context[cpu_id];
284 cpu_mask = mm->cpu_vm_mask; 286 cpu_mask = mm->cpu_vm_mask;
285 cpu_clear(cpu_id, cpu_mask); 287 cpu_clear(cpu_id, cpu_mask);
286 288
@@ -343,12 +345,14 @@ void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
343void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va) 345void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
344{ 346{
345 struct mm_struct *mm = vma->vm_mm; 347 struct mm_struct *mm = vma->vm_mm;
346 int cpu_id = smp_processor_id(); 348 int cpu_id;
347 cpumask_t cpu_mask; 349 cpumask_t cpu_mask;
348 unsigned long *mmc = &mm->context[cpu_id]; 350 unsigned long *mmc;
349 unsigned long flags; 351 unsigned long flags;
350 352
351 preempt_disable(); 353 preempt_disable();
354 cpu_id = smp_processor_id();
355 mmc = &mm->context[cpu_id];
352 cpu_mask = mm->cpu_vm_mask; 356 cpu_mask = mm->cpu_vm_mask;
353 cpu_clear(cpu_id, cpu_mask); 357 cpu_clear(cpu_id, cpu_mask);
354 358
diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c
index 61513d5d97da..b5d42b12de10 100644
--- a/arch/mips/pci/fixup-tb0226.c
+++ b/arch/mips/pci/fixup-tb0226.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. 2 * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
3 * 3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -20,6 +20,7 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/pci.h> 21#include <linux/pci.h>
22 22
23#include <asm/vr41xx/giu.h>
23#include <asm/vr41xx/tb0226.h> 24#include <asm/vr41xx/tb0226.h>
24 25
25int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 26int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
@@ -29,42 +30,42 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
29 switch (slot) { 30 switch (slot) {
30 case 12: 31 case 12:
31 vr41xx_set_irq_trigger(GD82559_1_PIN, 32 vr41xx_set_irq_trigger(GD82559_1_PIN,
32 TRIGGER_LEVEL, 33 IRQ_TRIGGER_LEVEL,
33 SIGNAL_THROUGH); 34 IRQ_SIGNAL_THROUGH);
34 vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW); 35 vr41xx_set_irq_level(GD82559_1_PIN, IRQ_LEVEL_LOW);
35 irq = GD82559_1_IRQ; 36 irq = GD82559_1_IRQ;
36 break; 37 break;
37 case 13: 38 case 13:
38 vr41xx_set_irq_trigger(GD82559_2_PIN, 39 vr41xx_set_irq_trigger(GD82559_2_PIN,
39 TRIGGER_LEVEL, 40 IRQ_TRIGGER_LEVEL,
40 SIGNAL_THROUGH); 41 IRQ_SIGNAL_THROUGH);
41 vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW); 42 vr41xx_set_irq_level(GD82559_2_PIN, IRQ_LEVEL_LOW);
42 irq = GD82559_2_IRQ; 43 irq = GD82559_2_IRQ;
43 break; 44 break;
44 case 14: 45 case 14:
45 switch (pin) { 46 switch (pin) {
46 case 1: 47 case 1:
47 vr41xx_set_irq_trigger(UPD720100_INTA_PIN, 48 vr41xx_set_irq_trigger(UPD720100_INTA_PIN,
48 TRIGGER_LEVEL, 49 IRQ_TRIGGER_LEVEL,
49 SIGNAL_THROUGH); 50 IRQ_SIGNAL_THROUGH);
50 vr41xx_set_irq_level(UPD720100_INTA_PIN, 51 vr41xx_set_irq_level(UPD720100_INTA_PIN,
51 LEVEL_LOW); 52 IRQ_LEVEL_LOW);
52 irq = UPD720100_INTA_IRQ; 53 irq = UPD720100_INTA_IRQ;
53 break; 54 break;
54 case 2: 55 case 2:
55 vr41xx_set_irq_trigger(UPD720100_INTB_PIN, 56 vr41xx_set_irq_trigger(UPD720100_INTB_PIN,
56 TRIGGER_LEVEL, 57 IRQ_TRIGGER_LEVEL,
57 SIGNAL_THROUGH); 58 IRQ_SIGNAL_THROUGH);
58 vr41xx_set_irq_level(UPD720100_INTB_PIN, 59 vr41xx_set_irq_level(UPD720100_INTB_PIN,
59 LEVEL_LOW); 60 IRQ_LEVEL_LOW);
60 irq = UPD720100_INTB_IRQ; 61 irq = UPD720100_INTB_IRQ;
61 break; 62 break;
62 case 3: 63 case 3:
63 vr41xx_set_irq_trigger(UPD720100_INTC_PIN, 64 vr41xx_set_irq_trigger(UPD720100_INTC_PIN,
64 TRIGGER_LEVEL, 65 IRQ_TRIGGER_LEVEL,
65 SIGNAL_THROUGH); 66 IRQ_SIGNAL_THROUGH);
66 vr41xx_set_irq_level(UPD720100_INTC_PIN, 67 vr41xx_set_irq_level(UPD720100_INTC_PIN,
67 LEVEL_LOW); 68 IRQ_LEVEL_LOW);
68 irq = UPD720100_INTC_IRQ; 69 irq = UPD720100_INTC_IRQ;
69 break; 70 break;
70 default: 71 default:
diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c
index 25755252067a..fa8121d53b89 100644
--- a/arch/ppc64/kernel/pmac_setup.c
+++ b/arch/ppc64/kernel/pmac_setup.c
@@ -115,7 +115,7 @@ static void __pmac pmac_show_cpuinfo(struct seq_file *m)
115 115
116 /* find motherboard type */ 116 /* find motherboard type */
117 seq_printf(m, "machine\t\t: "); 117 seq_printf(m, "machine\t\t: ");
118 np = find_devices("device-tree"); 118 np = of_find_node_by_path("/");
119 if (np != NULL) { 119 if (np != NULL) {
120 pp = (char *) get_property(np, "model", NULL); 120 pp = (char *) get_property(np, "model", NULL);
121 if (pp != NULL) 121 if (pp != NULL)
@@ -133,6 +133,7 @@ static void __pmac pmac_show_cpuinfo(struct seq_file *m)
133 } 133 }
134 seq_printf(m, "\n"); 134 seq_printf(m, "\n");
135 } 135 }
136 of_node_put(np);
136 } else 137 } else
137 seq_printf(m, "PowerMac\n"); 138 seq_printf(m, "PowerMac\n");
138 139
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 56a39d69e080..5ecefc02896a 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -22,6 +22,7 @@
22#include <linux/time.h> 22#include <linux/time.h>
23#include <linux/timex.h> 23#include <linux/timex.h>
24#include <linux/sched.h> 24#include <linux/sched.h>
25#include <linux/module.h>
25 26
26#include <asm/atomic.h> 27#include <asm/atomic.h>
27#include <asm/processor.h> 28#include <asm/processor.h>
@@ -39,6 +40,8 @@ struct sh_cpuinfo cpu_data[NR_CPUS];
39extern void per_cpu_trap_init(void); 40extern void per_cpu_trap_init(void);
40 41
41cpumask_t cpu_possible_map; 42cpumask_t cpu_possible_map;
43EXPORT_SYMBOL(cpu_possible_map);
44
42cpumask_t cpu_online_map; 45cpumask_t cpu_online_map;
43static atomic_t cpus_booted = ATOMIC_INIT(0); 46static atomic_t cpus_booted = ATOMIC_INIT(0);
44 47