diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/Kconfig | 2 | ||||
-rw-r--r-- | arch/mips/tx4938/toshiba_rbtx4938/setup.c | 133 |
2 files changed, 45 insertions, 90 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index f4c313f9036b..abc485d3f414 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -654,7 +654,7 @@ config TOSHIBA_RBTX4938 | |||
654 | select SYS_SUPPORTS_BIG_ENDIAN | 654 | select SYS_SUPPORTS_BIG_ENDIAN |
655 | select SYS_SUPPORTS_KGDB | 655 | select SYS_SUPPORTS_KGDB |
656 | select GENERIC_HARDIRQS_NO__DO_IRQ | 656 | select GENERIC_HARDIRQS_NO__DO_IRQ |
657 | select GENERIC_GPIO | 657 | select GPIO_TXX9 |
658 | help | 658 | help |
659 | This Toshiba board is based on the TX4938 processor. Say Y here to | 659 | This Toshiba board is based on the TX4938 processor. Say Y here to |
660 | support this machine type | 660 | support this machine type |
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c index 61249f049cd6..b38ea5a9f5cb 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/pm.h> | 21 | #include <linux/pm.h> |
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/gpio.h> | ||
24 | 25 | ||
25 | #include <asm/wbflush.h> | 26 | #include <asm/wbflush.h> |
26 | #include <asm/reboot.h> | 27 | #include <asm/reboot.h> |
@@ -34,7 +35,7 @@ | |||
34 | #endif | 35 | #endif |
35 | #include <linux/spi/spi.h> | 36 | #include <linux/spi/spi.h> |
36 | #include <asm/tx4938/spi.h> | 37 | #include <asm/tx4938/spi.h> |
37 | #include <asm/gpio.h> | 38 | #include <asm/txx9pio.h> |
38 | 39 | ||
39 | extern char * __init prom_getcmdline(void); | 40 | extern char * __init prom_getcmdline(void); |
40 | static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr); | 41 | static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr); |
@@ -615,9 +616,6 @@ static void __init rbtx4938_spi_setup(void) | |||
615 | { | 616 | { |
616 | /* set SPI_SEL */ | 617 | /* set SPI_SEL */ |
617 | tx4938_ccfgptr->pcfg |= TX4938_PCFG_SPI_SEL; | 618 | tx4938_ccfgptr->pcfg |= TX4938_PCFG_SPI_SEL; |
618 | /* chip selects for SPI devices */ | ||
619 | tx4938_pioptr->dout |= (1 << SEEPROM1_CS); | ||
620 | tx4938_pioptr->dir |= (1 << SEEPROM1_CS); | ||
621 | } | 619 | } |
622 | 620 | ||
623 | static struct resource rbtx4938_fpga_resource; | 621 | static struct resource rbtx4938_fpga_resource; |
@@ -780,8 +778,8 @@ void __init tx4938_board_setup(void) | |||
780 | TX4938_WR64(0xff1fb950, TX4938_DMA_MCR_MSTEN); | 778 | TX4938_WR64(0xff1fb950, TX4938_DMA_MCR_MSTEN); |
781 | 779 | ||
782 | /* PIO */ | 780 | /* PIO */ |
783 | tx4938_pioptr->maskcpu = 0; | 781 | __raw_writel(0, &tx4938_pioptr->maskcpu); |
784 | tx4938_pioptr->maskext = 0; | 782 | __raw_writel(0, &tx4938_pioptr->maskext); |
785 | 783 | ||
786 | /* TX4938 internal registers */ | 784 | /* TX4938 internal registers */ |
787 | if (request_resource(&iomem_resource, &tx4938_reg_resource)) | 785 | if (request_resource(&iomem_resource, &tx4938_reg_resource)) |
@@ -984,106 +982,48 @@ device_initcall(rbtx4938_ne_init); | |||
984 | 982 | ||
985 | /* GPIO support */ | 983 | /* GPIO support */ |
986 | 984 | ||
985 | int gpio_to_irq(unsigned gpio) | ||
986 | { | ||
987 | return -EINVAL; | ||
988 | } | ||
989 | |||
990 | int irq_to_gpio(unsigned irq) | ||
991 | { | ||
992 | return -EINVAL; | ||
993 | } | ||
994 | |||
987 | static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock); | 995 | static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock); |
988 | 996 | ||
989 | static void rbtx4938_spi_gpio_set(unsigned gpio, int value) | 997 | static void rbtx4938_spi_gpio_set(struct gpio_chip *chip, unsigned int offset, |
998 | int value) | ||
990 | { | 999 | { |
991 | u8 val; | 1000 | u8 val; |
992 | unsigned long flags; | 1001 | unsigned long flags; |
993 | gpio -= 16; | ||
994 | spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags); | 1002 | spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags); |
995 | val = *rbtx4938_spics_ptr; | 1003 | val = *rbtx4938_spics_ptr; |
996 | if (value) | 1004 | if (value) |
997 | val |= 1 << gpio; | 1005 | val |= 1 << offset; |
998 | else | 1006 | else |
999 | val &= ~(1 << gpio); | 1007 | val &= ~(1 << offset); |
1000 | *rbtx4938_spics_ptr = val; | 1008 | *rbtx4938_spics_ptr = val; |
1001 | mmiowb(); | 1009 | mmiowb(); |
1002 | spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags); | 1010 | spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags); |
1003 | } | 1011 | } |
1004 | 1012 | ||
1005 | static int rbtx4938_spi_gpio_dir_out(unsigned gpio, int value) | 1013 | static int rbtx4938_spi_gpio_dir_out(struct gpio_chip *chip, |
1014 | unsigned int offset, int value) | ||
1006 | { | 1015 | { |
1007 | rbtx4938_spi_gpio_set(gpio, value); | 1016 | rbtx4938_spi_gpio_set(chip, offset, value); |
1008 | return 0; | 1017 | return 0; |
1009 | } | 1018 | } |
1010 | 1019 | ||
1011 | static DEFINE_SPINLOCK(tx4938_gpio_lock); | 1020 | static struct gpio_chip rbtx4938_spi_gpio_chip = { |
1012 | 1021 | .set = rbtx4938_spi_gpio_set, | |
1013 | static int tx4938_gpio_get(unsigned gpio) | 1022 | .direction_output = rbtx4938_spi_gpio_dir_out, |
1014 | { | 1023 | .label = "RBTX4938-SPICS", |
1015 | return tx4938_pioptr->din & (1 << gpio); | 1024 | .base = 16, |
1016 | } | 1025 | .ngpio = 3, |
1017 | 1026 | }; | |
1018 | static void tx4938_gpio_set_raw(unsigned gpio, int value) | ||
1019 | { | ||
1020 | u32 val; | ||
1021 | val = tx4938_pioptr->dout; | ||
1022 | if (value) | ||
1023 | val |= 1 << gpio; | ||
1024 | else | ||
1025 | val &= ~(1 << gpio); | ||
1026 | tx4938_pioptr->dout = val; | ||
1027 | } | ||
1028 | |||
1029 | static void tx4938_gpio_set(unsigned gpio, int value) | ||
1030 | { | ||
1031 | unsigned long flags; | ||
1032 | spin_lock_irqsave(&tx4938_gpio_lock, flags); | ||
1033 | tx4938_gpio_set_raw(gpio, value); | ||
1034 | mmiowb(); | ||
1035 | spin_unlock_irqrestore(&tx4938_gpio_lock, flags); | ||
1036 | } | ||
1037 | |||
1038 | static int tx4938_gpio_dir_in(unsigned gpio) | ||
1039 | { | ||
1040 | spin_lock_irq(&tx4938_gpio_lock); | ||
1041 | tx4938_pioptr->dir &= ~(1 << gpio); | ||
1042 | mmiowb(); | ||
1043 | spin_unlock_irq(&tx4938_gpio_lock); | ||
1044 | return 0; | ||
1045 | } | ||
1046 | |||
1047 | static int tx4938_gpio_dir_out(unsigned int gpio, int value) | ||
1048 | { | ||
1049 | spin_lock_irq(&tx4938_gpio_lock); | ||
1050 | tx4938_gpio_set_raw(gpio, value); | ||
1051 | tx4938_pioptr->dir |= 1 << gpio; | ||
1052 | mmiowb(); | ||
1053 | spin_unlock_irq(&tx4938_gpio_lock); | ||
1054 | return 0; | ||
1055 | } | ||
1056 | |||
1057 | int gpio_direction_input(unsigned gpio) | ||
1058 | { | ||
1059 | if (gpio < 16) | ||
1060 | return tx4938_gpio_dir_in(gpio); | ||
1061 | return -EINVAL; | ||
1062 | } | ||
1063 | |||
1064 | int gpio_direction_output(unsigned gpio, int value) | ||
1065 | { | ||
1066 | if (gpio < 16) | ||
1067 | return tx4938_gpio_dir_out(gpio, value); | ||
1068 | if (gpio < 16 + 3) | ||
1069 | return rbtx4938_spi_gpio_dir_out(gpio, value); | ||
1070 | return -EINVAL; | ||
1071 | } | ||
1072 | |||
1073 | int gpio_get_value(unsigned gpio) | ||
1074 | { | ||
1075 | if (gpio < 16) | ||
1076 | return tx4938_gpio_get(gpio); | ||
1077 | return 0; | ||
1078 | } | ||
1079 | |||
1080 | void gpio_set_value(unsigned gpio, int value) | ||
1081 | { | ||
1082 | if (gpio < 16) | ||
1083 | tx4938_gpio_set(gpio, value); | ||
1084 | else | ||
1085 | rbtx4938_spi_gpio_set(gpio, value); | ||
1086 | } | ||
1087 | 1027 | ||
1088 | /* SPI support */ | 1028 | /* SPI support */ |
1089 | 1029 | ||
@@ -1118,10 +1058,25 @@ static int __init rbtx4938_spi_init(void) | |||
1118 | spi_eeprom_register(SEEPROM1_CS); | 1058 | spi_eeprom_register(SEEPROM1_CS); |
1119 | spi_eeprom_register(16 + SEEPROM2_CS); | 1059 | spi_eeprom_register(16 + SEEPROM2_CS); |
1120 | spi_eeprom_register(16 + SEEPROM3_CS); | 1060 | spi_eeprom_register(16 + SEEPROM3_CS); |
1061 | gpio_request(16 + SRTC_CS, "rtc-rs5c348"); | ||
1062 | gpio_direction_output(16 + SRTC_CS, 0); | ||
1063 | gpio_request(SEEPROM1_CS, "seeprom1"); | ||
1064 | gpio_direction_output(SEEPROM1_CS, 1); | ||
1065 | gpio_request(16 + SEEPROM2_CS, "seeprom2"); | ||
1066 | gpio_direction_output(16 + SEEPROM2_CS, 1); | ||
1067 | gpio_request(16 + SEEPROM3_CS, "seeprom3"); | ||
1068 | gpio_direction_output(16 + SEEPROM3_CS, 1); | ||
1121 | txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI); | 1069 | txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI); |
1122 | return 0; | 1070 | return 0; |
1123 | } | 1071 | } |
1124 | arch_initcall(rbtx4938_spi_init); | 1072 | |
1073 | static int __init rbtx4938_arch_init(void) | ||
1074 | { | ||
1075 | txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16); | ||
1076 | gpiochip_add(&rbtx4938_spi_gpio_chip); | ||
1077 | return rbtx4938_spi_init(); | ||
1078 | } | ||
1079 | arch_initcall(rbtx4938_arch_init); | ||
1125 | 1080 | ||
1126 | /* Watchdog support */ | 1081 | /* Watchdog support */ |
1127 | 1082 | ||