2 files changed, 29 insertions, 0 deletions

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 4d16d8917074..2715834f72be 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -366,6 +366,16 @@ config SH_STORE_QUEUES
           Selecting this option will enable an in-kernel API for manipulating
           the store queues integrated in the SH-4 processors.
 
+config SPECULATIVE_EXECUTION
+        bool "Speculative subroutine return"
+        depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL
+        help
+          This enables support for a speculative instruction fetch for
+          subroutine return. There are various pitfalls associated with
+          this, as outlined in the SH7780 hardware manual.
+
+          If unsure, say N.
+
 config CPU_HAS_INTEVT
         bool
 
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 726acfcb9b77..6451ad630174 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -41,6 +41,23 @@ __setup("no" __stringify(x), x##_setup);
 onchip_setup(fpu);
 onchip_setup(dsp);
 
+#ifdef CONFIG_SPECULATIVE_EXECUTION
+#define CPUOPM          0xff2f0000
+#define CPUOPM_RABD     (1 << 5)
+
+static void __init speculative_execution_init(void)
+{
+        /* Clear RABD */
+        ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
+
+        /* Flush the update */
+        (void)ctrl_inl(CPUOPM);
+        ctrl_barrier();
+}
+#else
+#define speculative_execution_init()    do { } while (0)
+#endif
+
 /*
  * Generic first-level cache init
  */
@@ -261,4 +278,6 @@ asmlinkage void __init sh_cpu_init(void)
          */
         ubc_wakeup();
 #endif
+
+        speculative_execution_init();
 }