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-rw-r--r--arch/arm/mach-iop32x/irq.c6
-rw-r--r--arch/arm/mach-iop33x/irq.c10
2 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index cdd6943ce768..ff049e02f5f7 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -43,7 +43,7 @@ static void
43iop321_irq_mask (unsigned int irq) 43iop321_irq_mask (unsigned int irq)
44{ 44{
45 45
46 iop321_mask &= ~(1 << (irq - IOP321_IRQ_OFS)); 46 iop321_mask &= ~(1 << irq);
47 47
48 intctl_write(iop321_mask); 48 intctl_write(iop321_mask);
49} 49}
@@ -51,7 +51,7 @@ iop321_irq_mask (unsigned int irq)
51static void 51static void
52iop321_irq_unmask (unsigned int irq) 52iop321_irq_unmask (unsigned int irq)
53{ 53{
54 iop321_mask |= (1 << (irq - IOP321_IRQ_OFS)); 54 iop321_mask |= (1 << irq);
55 55
56 intctl_write(iop321_mask); 56 intctl_write(iop321_mask);
57} 57}
@@ -73,7 +73,7 @@ void __init iop321_init_irq(void)
73 machine_is_iq31244()) // all interrupts are inputs to chip 73 machine_is_iq31244()) // all interrupts are inputs to chip
74 *IOP3XX_PCIIRSR = 0x0f; 74 *IOP3XX_PCIIRSR = 0x0f;
75 75
76 for(i = IOP321_IRQ_OFS; i < NR_IRQS; i++) 76 for(i = 0; i < NR_IRQS; i++)
77 { 77 {
78 set_irq_chip(i, &ext_chip); 78 set_irq_chip(i, &ext_chip);
79 set_irq_handler(i, do_level_IRQ); 79 set_irq_handler(i, do_level_IRQ);
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index d667439c8573..675ed3989973 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -60,28 +60,28 @@ static inline void intstr_write1(u32 val)
60static void 60static void
61iop331_irq_mask1 (unsigned int irq) 61iop331_irq_mask1 (unsigned int irq)
62{ 62{
63 iop331_mask0 &= ~(1 << (irq - IOP331_IRQ_OFS)); 63 iop331_mask0 &= ~(1 << irq);
64 intctl_write0(iop331_mask0); 64 intctl_write0(iop331_mask0);
65} 65}
66 66
67static void 67static void
68iop331_irq_mask2 (unsigned int irq) 68iop331_irq_mask2 (unsigned int irq)
69{ 69{
70 iop331_mask1 &= ~(1 << (irq - IOP331_IRQ_OFS - 32)); 70 iop331_mask1 &= ~(1 << (irq - 32));
71 intctl_write1(iop331_mask1); 71 intctl_write1(iop331_mask1);
72} 72}
73 73
74static void 74static void
75iop331_irq_unmask1(unsigned int irq) 75iop331_irq_unmask1(unsigned int irq)
76{ 76{
77 iop331_mask0 |= (1 << (irq - IOP331_IRQ_OFS)); 77 iop331_mask0 |= (1 << irq);
78 intctl_write0(iop331_mask0); 78 intctl_write0(iop331_mask0);
79} 79}
80 80
81static void 81static void
82iop331_irq_unmask2(unsigned int irq) 82iop331_irq_unmask2(unsigned int irq)
83{ 83{
84 iop331_mask1 |= (1 << (irq - IOP331_IRQ_OFS - 32)); 84 iop331_mask1 |= (1 << (irq - 32));
85 intctl_write1(iop331_mask1); 85 intctl_write1(iop331_mask1);
86} 86}
87 87
@@ -110,7 +110,7 @@ void __init iop331_init_irq(void)
110 if(machine_is_iq80331()) // all interrupts are inputs to chip 110 if(machine_is_iq80331()) // all interrupts are inputs to chip
111 *IOP3XX_PCIIRSR = 0x0f; 111 *IOP3XX_PCIIRSR = 0x0f;
112 112
113 for(i = IOP331_IRQ_OFS; i < NR_IRQS; i++) 113 for(i = 0; i < NR_IRQS; i++)
114 { 114 {
115 set_irq_chip(i, (i < 32) ? &iop331_irqchip1 : &iop331_irqchip2); 115 set_irq_chip(i, (i < 32) ? &iop331_irqchip1 : &iop331_irqchip2);
116 set_irq_handler(i, do_level_IRQ); 116 set_irq_handler(i, do_level_IRQ);