diff options
Diffstat (limited to 'arch')
102 files changed, 3171 insertions, 1369 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 3345c6d0fd1e..92873cdee31f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -47,7 +47,8 @@ comma = , | |||
47 | # testing for a specific architecture or later rather impossible. | 47 | # testing for a specific architecture or later rather impossible. |
48 | arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) | 48 | arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) |
49 | arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6k,-march=armv5t -Wa$(comma)-march=armv6k) | 49 | arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6k,-march=armv5t -Wa$(comma)-march=armv6k) |
50 | arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4) | 50 | arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4t) |
51 | arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t | ||
51 | arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4 | 52 | arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4 |
52 | arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3 | 53 | arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3 |
53 | 54 | ||
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 5b7c26395b44..028bdc9228fb 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
@@ -179,17 +179,19 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, | |||
179 | static inline struct safe_buffer * | 179 | static inline struct safe_buffer * |
180 | find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr) | 180 | find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr) |
181 | { | 181 | { |
182 | struct safe_buffer *b = NULL; | 182 | struct safe_buffer *b, *rb = NULL; |
183 | unsigned long flags; | 183 | unsigned long flags; |
184 | 184 | ||
185 | read_lock_irqsave(&device_info->lock, flags); | 185 | read_lock_irqsave(&device_info->lock, flags); |
186 | 186 | ||
187 | list_for_each_entry(b, &device_info->safe_buffers, node) | 187 | list_for_each_entry(b, &device_info->safe_buffers, node) |
188 | if (b->safe_dma_addr == safe_dma_addr) | 188 | if (b->safe_dma_addr == safe_dma_addr) { |
189 | rb = b; | ||
189 | break; | 190 | break; |
191 | } | ||
190 | 192 | ||
191 | read_unlock_irqrestore(&device_info->lock, flags); | 193 | read_unlock_irqrestore(&device_info->lock, flags); |
192 | return b; | 194 | return rb; |
193 | } | 195 | } |
194 | 196 | ||
195 | static inline void | 197 | static inline void |
diff --git a/arch/arm/common/rtctime.c b/arch/arm/common/rtctime.c index 35c9a64ac14c..4e5445cfb0ea 100644 --- a/arch/arm/common/rtctime.c +++ b/arch/arm/common/rtctime.c | |||
@@ -68,6 +68,7 @@ void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc | |||
68 | rtc_time_to_tm(next_time, next); | 68 | rtc_time_to_tm(next_time, next); |
69 | } | 69 | } |
70 | } | 70 | } |
71 | EXPORT_SYMBOL(rtc_next_alarm_time); | ||
71 | 72 | ||
72 | static inline int rtc_arm_read_time(struct rtc_ops *ops, struct rtc_time *tm) | 73 | static inline int rtc_arm_read_time(struct rtc_ops *ops, struct rtc_time *tm) |
73 | { | 74 | { |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index a331c12cead9..29818bd3248f 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -618,7 +618,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
618 | { | 618 | { |
619 | struct sa1111 *sachip; | 619 | struct sa1111 *sachip; |
620 | unsigned long id; | 620 | unsigned long id; |
621 | unsigned int has_devs, val; | 621 | unsigned int has_devs; |
622 | int i, ret = -ENODEV; | 622 | int i, ret = -ENODEV; |
623 | 623 | ||
624 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); | 624 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); |
@@ -669,6 +669,9 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
669 | sa1111_wake(sachip); | 669 | sa1111_wake(sachip); |
670 | 670 | ||
671 | #ifdef CONFIG_ARCH_SA1100 | 671 | #ifdef CONFIG_ARCH_SA1100 |
672 | { | ||
673 | unsigned int val; | ||
674 | |||
672 | /* | 675 | /* |
673 | * The SDRAM configuration of the SA1110 and the SA1111 must | 676 | * The SDRAM configuration of the SA1110 and the SA1111 must |
674 | * match. This is very important to ensure that SA1111 accesses | 677 | * match. This is very important to ensure that SA1111 accesses |
@@ -692,6 +695,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
692 | * Enable the SA1110 memory bus request and grant signals. | 695 | * Enable the SA1110 memory bus request and grant signals. |
693 | */ | 696 | */ |
694 | sa1110_mb_enable(); | 697 | sa1110_mb_enable(); |
698 | } | ||
695 | #endif | 699 | #endif |
696 | 700 | ||
697 | /* | 701 | /* |
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index f0c0cdb1c183..1320a0efca73 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -13,12 +13,11 @@ obj-y := compat.o entry-armv.o entry-common.o irq.o \ | |||
13 | obj-$(CONFIG_APM) += apm.o | 13 | obj-$(CONFIG_APM) += apm.o |
14 | obj-$(CONFIG_ISA_DMA_API) += dma.o | 14 | obj-$(CONFIG_ISA_DMA_API) += dma.o |
15 | obj-$(CONFIG_ARCH_ACORN) += ecard.o | 15 | obj-$(CONFIG_ARCH_ACORN) += ecard.o |
16 | obj-$(CONFIG_FOOTBRIDGE) += isa.o | ||
17 | obj-$(CONFIG_FIQ) += fiq.o | 16 | obj-$(CONFIG_FIQ) += fiq.o |
18 | obj-$(CONFIG_MODULES) += armksyms.o module.o | 17 | obj-$(CONFIG_MODULES) += armksyms.o module.o |
19 | obj-$(CONFIG_ARTHUR) += arthur.o | 18 | obj-$(CONFIG_ARTHUR) += arthur.o |
20 | obj-$(CONFIG_ISA_DMA) += dma-isa.o | 19 | obj-$(CONFIG_ISA_DMA) += dma-isa.o |
21 | obj-$(CONFIG_PCI) += bios32.o | 20 | obj-$(CONFIG_PCI) += bios32.o isa.o |
22 | obj-$(CONFIG_SMP) += smp.o | 21 | obj-$(CONFIG_SMP) += smp.o |
23 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o | 22 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o |
24 | 23 | ||
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 7ea5f01dfc7b..de4e33137901 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -634,6 +634,14 @@ ENTRY(__switch_to) | |||
634 | * purpose. | 634 | * purpose. |
635 | */ | 635 | */ |
636 | 636 | ||
637 | .macro usr_ret, reg | ||
638 | #ifdef CONFIG_ARM_THUMB | ||
639 | bx \reg | ||
640 | #else | ||
641 | mov pc, \reg | ||
642 | #endif | ||
643 | .endm | ||
644 | |||
637 | .align 5 | 645 | .align 5 |
638 | .globl __kuser_helper_start | 646 | .globl __kuser_helper_start |
639 | __kuser_helper_start: | 647 | __kuser_helper_start: |
@@ -675,7 +683,7 @@ __kuser_memory_barrier: @ 0xffff0fa0 | |||
675 | #if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP) | 683 | #if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP) |
676 | mcr p15, 0, r0, c7, c10, 5 @ dmb | 684 | mcr p15, 0, r0, c7, c10, 5 @ dmb |
677 | #endif | 685 | #endif |
678 | mov pc, lr | 686 | usr_ret lr |
679 | 687 | ||
680 | .align 5 | 688 | .align 5 |
681 | 689 | ||
@@ -778,7 +786,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
778 | mov r0, #-1 | 786 | mov r0, #-1 |
779 | adds r0, r0, #0 | 787 | adds r0, r0, #0 |
780 | #endif | 788 | #endif |
781 | mov pc, lr | 789 | usr_ret lr |
782 | 790 | ||
783 | #else | 791 | #else |
784 | 792 | ||
@@ -792,7 +800,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
792 | #ifdef CONFIG_SMP | 800 | #ifdef CONFIG_SMP |
793 | mcr p15, 0, r0, c7, c10, 5 @ dmb | 801 | mcr p15, 0, r0, c7, c10, 5 @ dmb |
794 | #endif | 802 | #endif |
795 | mov pc, lr | 803 | usr_ret lr |
796 | 804 | ||
797 | #endif | 805 | #endif |
798 | 806 | ||
@@ -834,16 +842,11 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
834 | __kuser_get_tls: @ 0xffff0fe0 | 842 | __kuser_get_tls: @ 0xffff0fe0 |
835 | 843 | ||
836 | #if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL) | 844 | #if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL) |
837 | |||
838 | ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0 | 845 | ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0 |
839 | mov pc, lr | ||
840 | |||
841 | #else | 846 | #else |
842 | |||
843 | mrc p15, 0, r0, c13, c0, 3 @ read TLS register | 847 | mrc p15, 0, r0, c13, c0, 3 @ read TLS register |
844 | mov pc, lr | ||
845 | |||
846 | #endif | 848 | #endif |
849 | usr_ret lr | ||
847 | 850 | ||
848 | .rep 5 | 851 | .rep 5 |
849 | .word 0 @ pad up to __kuser_helper_version | 852 | .word 0 @ pad up to __kuser_helper_version |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 4fe386eea4b4..5365d4e5949e 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -118,7 +118,7 @@ ENTRY(secondary_startup) | |||
118 | sub r4, r4, r5 @ mmu has been enabled | 118 | sub r4, r4, r5 @ mmu has been enabled |
119 | ldr r4, [r7, r4] @ get secondary_data.pgdir | 119 | ldr r4, [r7, r4] @ get secondary_data.pgdir |
120 | adr lr, __enable_mmu @ return address | 120 | adr lr, __enable_mmu @ return address |
121 | add pc, r10, #12 @ initialise processor | 121 | add pc, r10, #PROCINFO_INITFUNC @ initialise processor |
122 | @ (return control reg) | 122 | @ (return control reg) |
123 | 123 | ||
124 | /* | 124 | /* |
diff --git a/arch/arm/kernel/isa.c b/arch/arm/kernel/isa.c index 685c3e591a7e..54bbd9fe255c 100644 --- a/arch/arm/kernel/isa.c +++ b/arch/arm/kernel/isa.c | |||
@@ -3,21 +3,14 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 1999 Phil Blundell | 4 | * Copyright (C) 1999 Phil Blundell |
5 | * | 5 | * |
6 | * ISA shared memory and I/O port support | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
11 | * modify it under the terms of the GNU General Public License | 7 | * modify it under the terms of the GNU General Public License |
12 | * as published by the Free Software Foundation; either version | 8 | * as published by the Free Software Foundation; either version |
13 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
10 | * | ||
11 | * ISA shared memory and I/O port support, and is required to support | ||
12 | * iopl, inb, outb and friends in userspace via glibc emulation. | ||
14 | */ | 13 | */ |
15 | |||
16 | /* | ||
17 | * Nothing about this is actually ARM specific. One day we could move | ||
18 | * it into kernel/resource.c or some place like that. | ||
19 | */ | ||
20 | |||
21 | #include <linux/stddef.h> | 14 | #include <linux/stddef.h> |
22 | #include <linux/types.h> | 15 | #include <linux/types.h> |
23 | #include <linux/fs.h> | 16 | #include <linux/fs.h> |
@@ -27,21 +20,49 @@ | |||
27 | static unsigned int isa_membase, isa_portbase, isa_portshift; | 20 | static unsigned int isa_membase, isa_portbase, isa_portshift; |
28 | 21 | ||
29 | static ctl_table ctl_isa_vars[4] = { | 22 | static ctl_table ctl_isa_vars[4] = { |
30 | {BUS_ISA_MEM_BASE, "membase", &isa_membase, | 23 | { |
31 | sizeof(isa_membase), 0444, NULL, &proc_dointvec}, | 24 | .ctl_name = BUS_ISA_MEM_BASE, |
32 | {BUS_ISA_PORT_BASE, "portbase", &isa_portbase, | 25 | .procname = "membase", |
33 | sizeof(isa_portbase), 0444, NULL, &proc_dointvec}, | 26 | .data = &isa_membase, |
34 | {BUS_ISA_PORT_SHIFT, "portshift", &isa_portshift, | 27 | .maxlen = sizeof(isa_membase), |
35 | sizeof(isa_portshift), 0444, NULL, &proc_dointvec}, | 28 | .mode = 0444, |
36 | {0} | 29 | .proc_handler = &proc_dointvec, |
30 | }, { | ||
31 | .ctl_name = BUS_ISA_PORT_BASE, | ||
32 | .procname = "portbase", | ||
33 | .data = &isa_portbase, | ||
34 | .maxlen = sizeof(isa_portbase), | ||
35 | .mode = 0444, | ||
36 | .proc_handler = &proc_dointvec, | ||
37 | }, { | ||
38 | .ctl_name = BUS_ISA_PORT_SHIFT, | ||
39 | .procname = "portshift", | ||
40 | .data = &isa_portshift, | ||
41 | .maxlen = sizeof(isa_portshift), | ||
42 | .mode = 0444, | ||
43 | .proc_handler = &proc_dointvec, | ||
44 | }, {0} | ||
37 | }; | 45 | }; |
38 | 46 | ||
39 | static struct ctl_table_header *isa_sysctl_header; | 47 | static struct ctl_table_header *isa_sysctl_header; |
40 | 48 | ||
41 | static ctl_table ctl_isa[2] = {{CTL_BUS_ISA, "isa", NULL, 0, 0555, ctl_isa_vars}, | 49 | static ctl_table ctl_isa[2] = { |
42 | {0}}; | 50 | { |
43 | static ctl_table ctl_bus[2] = {{CTL_BUS, "bus", NULL, 0, 0555, ctl_isa}, | 51 | .ctl_name = CTL_BUS_ISA, |
44 | {0}}; | 52 | .procname = "isa", |
53 | .mode = 0555, | ||
54 | .child = ctl_isa_vars, | ||
55 | }, {0} | ||
56 | }; | ||
57 | |||
58 | static ctl_table ctl_bus[2] = { | ||
59 | { | ||
60 | .ctl_name = CTL_BUS, | ||
61 | .procname = "bus", | ||
62 | .mode = 0555, | ||
63 | .child = ctl_isa, | ||
64 | }, {0} | ||
65 | }; | ||
45 | 66 | ||
46 | void __init | 67 | void __init |
47 | register_isa_ports(unsigned int membase, unsigned int portbase, unsigned int portshift) | 68 | register_isa_ports(unsigned int membase, unsigned int portbase, unsigned int portshift) |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 4e29dd03e582..aeeed806f991 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -233,7 +233,7 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) | |||
233 | spin_unlock_irq(&die_lock); | 233 | spin_unlock_irq(&die_lock); |
234 | 234 | ||
235 | if (panic_on_oops) | 235 | if (panic_on_oops) |
236 | panic("Fatal exception: panic_on_oops"); | 236 | panic("Fatal exception"); |
237 | 237 | ||
238 | do_exit(SIGSEGV); | 238 | do_exit(SIGSEGV); |
239 | } | 239 | } |
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c index 607ed1f5b3f8..823e25d4547e 100644 --- a/arch/arm/mach-footbridge/dc21285.c +++ b/arch/arm/mach-footbridge/dc21285.c | |||
@@ -35,7 +35,6 @@ | |||
35 | 35 | ||
36 | extern int setup_arm_irq(int, struct irqaction *); | 36 | extern int setup_arm_irq(int, struct irqaction *); |
37 | extern void pcibios_report_status(u_int status_mask, int warn); | 37 | extern void pcibios_report_status(u_int status_mask, int warn); |
38 | extern void register_isa_ports(unsigned int, unsigned int, unsigned int); | ||
39 | 38 | ||
40 | static unsigned long | 39 | static unsigned long |
41 | dc21285_base_address(struct pci_bus *bus, unsigned int devfn) | 40 | dc21285_base_address(struct pci_bus *bus, unsigned int devfn) |
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index f9043592e299..4418f6d7572d 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -600,4 +600,6 @@ void __init pci_v3_postinit(void) | |||
600 | printk(KERN_ERR "PCI: unable to grab local bus timeout " | 600 | printk(KERN_ERR "PCI: unable to grab local bus timeout " |
601 | "interrupt: %d\n", ret); | 601 | "interrupt: %d\n", ret); |
602 | #endif | 602 | #endif |
603 | |||
604 | register_isa_ports(PHYS_PCI_MEM_BASE, PHYS_PCI_IO_BASE, 0); | ||
603 | } | 605 | } |
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 2d40fe1145f0..9562177b5fe1 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c | |||
@@ -532,8 +532,6 @@ pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) | |||
532 | return -EIO; | 532 | return -EIO; |
533 | } | 533 | } |
534 | 534 | ||
535 | EXPORT_SYMBOL(pci_set_dma_mask); | ||
536 | EXPORT_SYMBOL(pci_set_consistent_dma_mask); | ||
537 | EXPORT_SYMBOL(ixp4xx_pci_read); | 535 | EXPORT_SYMBOL(ixp4xx_pci_read); |
538 | EXPORT_SYMBOL(ixp4xx_pci_write); | 536 | EXPORT_SYMBOL(ixp4xx_pci_write); |
539 | 537 | ||
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index 654e2eed81fb..30f1300e0e21 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c | |||
@@ -107,9 +107,9 @@ static struct flash_platform_data gtwx5715_flash_data = { | |||
107 | .width = 2, | 107 | .width = 2, |
108 | }; | 108 | }; |
109 | 109 | ||
110 | static struct gtw5715_flash_resource = { | 110 | static struct resource gtwx5715_flash_resource = { |
111 | .flags = IORESOURCE_MEM, | 111 | .flags = IORESOURCE_MEM, |
112 | } | 112 | }; |
113 | 113 | ||
114 | static struct platform_device gtwx5715_flash = { | 114 | static struct platform_device gtwx5715_flash = { |
115 | .name = "IXP4XX-Flash", | 115 | .name = "IXP4XX-Flash", |
@@ -130,9 +130,6 @@ static void __init gtwx5715_init(void) | |||
130 | { | 130 | { |
131 | ixp4xx_sys_init(); | 131 | ixp4xx_sys_init(); |
132 | 132 | ||
133 | if (!flash_resource) | ||
134 | printk(KERN_ERR "Could not allocate flash resource\n"); | ||
135 | |||
136 | gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); | 133 | gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
137 | gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1; | 134 | gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1; |
138 | 135 | ||
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index f9421318cb7a..ff6b4ee037f5 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c | |||
@@ -47,14 +47,15 @@ static struct corgissp_machinfo *ssp_machinfo; | |||
47 | */ | 47 | */ |
48 | unsigned long corgi_ssp_ads7846_putget(ulong data) | 48 | unsigned long corgi_ssp_ads7846_putget(ulong data) |
49 | { | 49 | { |
50 | unsigned long ret,flag; | 50 | unsigned long flag; |
51 | u32 ret = 0; | ||
51 | 52 | ||
52 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 53 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
53 | if (ssp_machinfo->cs_ads7846 >= 0) | 54 | if (ssp_machinfo->cs_ads7846 >= 0) |
54 | GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | 55 | GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); |
55 | 56 | ||
56 | ssp_write_word(&corgi_ssp_dev,data); | 57 | ssp_write_word(&corgi_ssp_dev,data); |
57 | ret = ssp_read_word(&corgi_ssp_dev); | 58 | ssp_read_word(&corgi_ssp_dev, &ret); |
58 | 59 | ||
59 | if (ssp_machinfo->cs_ads7846 >= 0) | 60 | if (ssp_machinfo->cs_ads7846 >= 0) |
60 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | 61 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); |
@@ -88,7 +89,9 @@ void corgi_ssp_ads7846_put(ulong data) | |||
88 | 89 | ||
89 | unsigned long corgi_ssp_ads7846_get(void) | 90 | unsigned long corgi_ssp_ads7846_get(void) |
90 | { | 91 | { |
91 | return ssp_read_word(&corgi_ssp_dev); | 92 | u32 ret = 0; |
93 | ssp_read_word(&corgi_ssp_dev, &ret); | ||
94 | return ret; | ||
92 | } | 95 | } |
93 | 96 | ||
94 | EXPORT_SYMBOL(corgi_ssp_ads7846_putget); | 97 | EXPORT_SYMBOL(corgi_ssp_ads7846_putget); |
@@ -104,6 +107,7 @@ EXPORT_SYMBOL(corgi_ssp_ads7846_get); | |||
104 | unsigned long corgi_ssp_dac_put(ulong data) | 107 | unsigned long corgi_ssp_dac_put(ulong data) |
105 | { | 108 | { |
106 | unsigned long flag, sscr1 = SSCR1_SPH; | 109 | unsigned long flag, sscr1 = SSCR1_SPH; |
110 | u32 tmp; | ||
107 | 111 | ||
108 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 112 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
109 | 113 | ||
@@ -118,7 +122,7 @@ unsigned long corgi_ssp_dac_put(ulong data) | |||
118 | GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); | 122 | GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); |
119 | ssp_write_word(&corgi_ssp_dev,data); | 123 | ssp_write_word(&corgi_ssp_dev,data); |
120 | /* Read null data back from device to prevent SSP overflow */ | 124 | /* Read null data back from device to prevent SSP overflow */ |
121 | ssp_read_word(&corgi_ssp_dev); | 125 | ssp_read_word(&corgi_ssp_dev, &tmp); |
122 | if (ssp_machinfo->cs_lcdcon >= 0) | 126 | if (ssp_machinfo->cs_lcdcon >= 0) |
123 | GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); | 127 | GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); |
124 | 128 | ||
@@ -150,7 +154,7 @@ EXPORT_SYMBOL(corgi_ssp_blduty_set); | |||
150 | int corgi_ssp_max1111_get(ulong data) | 154 | int corgi_ssp_max1111_get(ulong data) |
151 | { | 155 | { |
152 | unsigned long flag; | 156 | unsigned long flag; |
153 | int voltage,voltage1,voltage2; | 157 | long voltage = 0, voltage1 = 0, voltage2 = 0; |
154 | 158 | ||
155 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 159 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
156 | if (ssp_machinfo->cs_max1111 >= 0) | 160 | if (ssp_machinfo->cs_max1111 >= 0) |
@@ -163,15 +167,15 @@ int corgi_ssp_max1111_get(ulong data) | |||
163 | 167 | ||
164 | /* TB1/RB1 */ | 168 | /* TB1/RB1 */ |
165 | ssp_write_word(&corgi_ssp_dev,data); | 169 | ssp_write_word(&corgi_ssp_dev,data); |
166 | ssp_read_word(&corgi_ssp_dev); /* null read */ | 170 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */ |
167 | 171 | ||
168 | /* TB12/RB2 */ | 172 | /* TB12/RB2 */ |
169 | ssp_write_word(&corgi_ssp_dev,0); | 173 | ssp_write_word(&corgi_ssp_dev,0); |
170 | voltage1=ssp_read_word(&corgi_ssp_dev); | 174 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); |
171 | 175 | ||
172 | /* TB13/RB3*/ | 176 | /* TB13/RB3*/ |
173 | ssp_write_word(&corgi_ssp_dev,0); | 177 | ssp_write_word(&corgi_ssp_dev,0); |
174 | voltage2=ssp_read_word(&corgi_ssp_dev); | 178 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2); |
175 | 179 | ||
176 | ssp_disable(&corgi_ssp_dev); | 180 | ssp_disable(&corgi_ssp_dev); |
177 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); | 181 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); |
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 93096befd017..1fddfeaa630d 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c | |||
@@ -40,6 +40,8 @@ | |||
40 | 40 | ||
41 | #define PXA_SSP_PORTS 3 | 41 | #define PXA_SSP_PORTS 3 |
42 | 42 | ||
43 | #define TIMEOUT 100000 | ||
44 | |||
43 | struct ssp_info_ { | 45 | struct ssp_info_ { |
44 | int irq; | 46 | int irq; |
45 | u32 clock; | 47 | u32 clock; |
@@ -92,13 +94,18 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
92 | * The caller is expected to perform the necessary locking. | 94 | * The caller is expected to perform the necessary locking. |
93 | * | 95 | * |
94 | * Returns: | 96 | * Returns: |
95 | * %-ETIMEDOUT timeout occurred (for future) | 97 | * %-ETIMEDOUT timeout occurred |
96 | * 0 success | 98 | * 0 success |
97 | */ | 99 | */ |
98 | int ssp_write_word(struct ssp_dev *dev, u32 data) | 100 | int ssp_write_word(struct ssp_dev *dev, u32 data) |
99 | { | 101 | { |
100 | while (!(SSSR_P(dev->port) & SSSR_TNF)) | 102 | int timeout = TIMEOUT; |
103 | |||
104 | while (!(SSSR_P(dev->port) & SSSR_TNF)) { | ||
105 | if (!--timeout) | ||
106 | return -ETIMEDOUT; | ||
101 | cpu_relax(); | 107 | cpu_relax(); |
108 | } | ||
102 | 109 | ||
103 | SSDR_P(dev->port) = data; | 110 | SSDR_P(dev->port) = data; |
104 | 111 | ||
@@ -117,15 +124,21 @@ int ssp_write_word(struct ssp_dev *dev, u32 data) | |||
117 | * The caller is expected to perform the necessary locking. | 124 | * The caller is expected to perform the necessary locking. |
118 | * | 125 | * |
119 | * Returns: | 126 | * Returns: |
120 | * %-ETIMEDOUT timeout occurred (for future) | 127 | * %-ETIMEDOUT timeout occurred |
121 | * 32-bit data success | 128 | * 32-bit data success |
122 | */ | 129 | */ |
123 | int ssp_read_word(struct ssp_dev *dev) | 130 | int ssp_read_word(struct ssp_dev *dev, u32 *data) |
124 | { | 131 | { |
125 | while (!(SSSR_P(dev->port) & SSSR_RNE)) | 132 | int timeout = TIMEOUT; |
133 | |||
134 | while (!(SSSR_P(dev->port) & SSSR_RNE)) { | ||
135 | if (!--timeout) | ||
136 | return -ETIMEDOUT; | ||
126 | cpu_relax(); | 137 | cpu_relax(); |
138 | } | ||
127 | 139 | ||
128 | return SSDR_P(dev->port); | 140 | *data = SSDR_P(dev->port); |
141 | return 0; | ||
129 | } | 142 | } |
130 | 143 | ||
131 | /** | 144 | /** |
@@ -136,13 +149,21 @@ int ssp_read_word(struct ssp_dev *dev) | |||
136 | * | 149 | * |
137 | * The caller is expected to perform the necessary locking. | 150 | * The caller is expected to perform the necessary locking. |
138 | */ | 151 | */ |
139 | void ssp_flush(struct ssp_dev *dev) | 152 | int ssp_flush(struct ssp_dev *dev) |
140 | { | 153 | { |
154 | int timeout = TIMEOUT * 2; | ||
155 | |||
141 | do { | 156 | do { |
142 | while (SSSR_P(dev->port) & SSSR_RNE) { | 157 | while (SSSR_P(dev->port) & SSSR_RNE) { |
158 | if (!--timeout) | ||
159 | return -ETIMEDOUT; | ||
143 | (void) SSDR_P(dev->port); | 160 | (void) SSDR_P(dev->port); |
144 | } | 161 | } |
162 | if (!--timeout) | ||
163 | return -ETIMEDOUT; | ||
145 | } while (SSSR_P(dev->port) & SSSR_BSY); | 164 | } while (SSSR_P(dev->port) & SSSR_BSY); |
165 | |||
166 | return 0; | ||
146 | } | 167 | } |
147 | 168 | ||
148 | /** | 169 | /** |
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 0c7938645df6..273e05f2b8de 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile | |||
@@ -10,45 +10,47 @@ obj-m := | |||
10 | obj-n := | 10 | obj-n := |
11 | obj- := | 11 | obj- := |
12 | 12 | ||
13 | # DMA | ||
14 | obj-$(CONFIG_S3C2410_DMA) += dma.o | ||
15 | |||
13 | # S3C2400 support files | 16 | # S3C2400 support files |
14 | obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o | 17 | obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o |
15 | 18 | ||
16 | # S3C2410 support files | 19 | # S3C2410 support files |
17 | 20 | ||
18 | obj-$(CONFIG_CPU_S3C2410) += s3c2410.o | 21 | obj-$(CONFIG_CPU_S3C2410) += s3c2410.o |
19 | obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o | 22 | obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o |
20 | obj-$(CONFIG_S3C2410_DMA) += dma.o | ||
21 | 23 | ||
22 | # Power Management support | 24 | # Power Management support |
23 | 25 | ||
24 | obj-$(CONFIG_PM) += pm.o sleep.o | 26 | obj-$(CONFIG_PM) += pm.o sleep.o |
25 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o | 27 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o |
26 | 28 | ||
27 | # S3C2412 support | 29 | # S3C2412 support |
28 | obj-$(CONFIG_CPU_S3C2412) += s3c2412.o | 30 | obj-$(CONFIG_CPU_S3C2412) += s3c2412.o |
29 | obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o | 31 | obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o |
30 | 32 | ||
31 | # | 33 | # |
32 | # S3C244X support | 34 | # S3C244X support |
33 | 35 | ||
34 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o | 36 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o |
35 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o | 37 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o |
36 | 38 | ||
37 | # Clock control | 39 | # Clock control |
38 | 40 | ||
39 | obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o | 41 | obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o |
40 | 42 | ||
41 | # S3C2440 support | 43 | # S3C2440 support |
42 | 44 | ||
43 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o | 45 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o |
44 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o | 46 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o |
45 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o | 47 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o |
46 | obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o | 48 | obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o |
47 | 49 | ||
48 | # S3C2442 support | 50 | # S3C2442 support |
49 | 51 | ||
50 | obj-$(CONFIG_CPU_S3C2442) += s3c2442.o | 52 | obj-$(CONFIG_CPU_S3C2442) += s3c2442.o |
51 | obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o | 53 | obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o |
52 | 54 | ||
53 | # bast extras | 55 | # bast extras |
54 | 56 | ||
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 094cc52745c5..25855452fe8c 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c | |||
@@ -112,7 +112,7 @@ dmadbg_capture(s3c2410_dma_chan_t *chan, struct s3c2410_dma_regstate *regs) | |||
112 | } | 112 | } |
113 | 113 | ||
114 | static void | 114 | static void |
115 | dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan, | 115 | dmadbg_dumpregs(const char *fname, int line, s3c2410_dma_chan_t *chan, |
116 | struct s3c2410_dma_regstate *regs) | 116 | struct s3c2410_dma_regstate *regs) |
117 | { | 117 | { |
118 | printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n", | 118 | printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n", |
@@ -132,7 +132,16 @@ dmadbg_showchan(const char *fname, int line, s3c2410_dma_chan_t *chan) | |||
132 | chan->number, fname, line, chan->load_state, | 132 | chan->number, fname, line, chan->load_state, |
133 | chan->curr, chan->next, chan->end); | 133 | chan->curr, chan->next, chan->end); |
134 | 134 | ||
135 | dmadbg_showregs(fname, line, chan, &state); | 135 | dmadbg_dumpregs(fname, line, chan, &state); |
136 | } | ||
137 | |||
138 | static void | ||
139 | dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan) | ||
140 | { | ||
141 | struct s3c2410_dma_regstate state; | ||
142 | |||
143 | dmadbg_capture(chan, &state); | ||
144 | dmadbg_dumpregs(fname, line, chan, &state); | ||
136 | } | 145 | } |
137 | 146 | ||
138 | #define dbg_showregs(chan) dmadbg_showregs(__FUNCTION__, __LINE__, (chan)) | 147 | #define dbg_showregs(chan) dmadbg_showregs(__FUNCTION__, __LINE__, (chan)) |
@@ -253,10 +262,14 @@ s3c2410_dma_loadbuffer(s3c2410_dma_chan_t *chan, | |||
253 | buf->next); | 262 | buf->next); |
254 | reload = (buf->next == NULL) ? S3C2410_DCON_NORELOAD : 0; | 263 | reload = (buf->next == NULL) ? S3C2410_DCON_NORELOAD : 0; |
255 | } else { | 264 | } else { |
256 | pr_debug("load_state is %d => autoreload\n", chan->load_state); | 265 | //pr_debug("load_state is %d => autoreload\n", chan->load_state); |
257 | reload = S3C2410_DCON_AUTORELOAD; | 266 | reload = S3C2410_DCON_AUTORELOAD; |
258 | } | 267 | } |
259 | 268 | ||
269 | if ((buf->data & 0xf0000000) != 0x30000000) { | ||
270 | dmawarn("dmaload: buffer is %p\n", (void *)buf->data); | ||
271 | } | ||
272 | |||
260 | writel(buf->data, chan->addr_reg); | 273 | writel(buf->data, chan->addr_reg); |
261 | 274 | ||
262 | dma_wrreg(chan, S3C2410_DMA_DCON, | 275 | dma_wrreg(chan, S3C2410_DMA_DCON, |
@@ -370,7 +383,7 @@ static int s3c2410_dma_start(s3c2410_dma_chan_t *chan) | |||
370 | tmp |= S3C2410_DMASKTRIG_ON; | 383 | tmp |= S3C2410_DMASKTRIG_ON; |
371 | dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); | 384 | dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); |
372 | 385 | ||
373 | pr_debug("wrote %08lx to DMASKTRIG\n", tmp); | 386 | pr_debug("dma%d: %08lx to DMASKTRIG\n", chan->number, tmp); |
374 | 387 | ||
375 | #if 0 | 388 | #if 0 |
376 | /* the dma buffer loads should take care of clearing the AUTO | 389 | /* the dma buffer loads should take care of clearing the AUTO |
@@ -384,7 +397,30 @@ static int s3c2410_dma_start(s3c2410_dma_chan_t *chan) | |||
384 | 397 | ||
385 | dbg_showchan(chan); | 398 | dbg_showchan(chan); |
386 | 399 | ||
400 | /* if we've only loaded one buffer onto the channel, then chec | ||
401 | * to see if we have another, and if so, try and load it so when | ||
402 | * the first buffer is finished, the new one will be loaded onto | ||
403 | * the channel */ | ||
404 | |||
405 | if (chan->next != NULL) { | ||
406 | if (chan->load_state == S3C2410_DMALOAD_1LOADED) { | ||
407 | |||
408 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | ||
409 | pr_debug("%s: buff not yet loaded, no more todo\n", | ||
410 | __FUNCTION__); | ||
411 | } else { | ||
412 | chan->load_state = S3C2410_DMALOAD_1RUNNING; | ||
413 | s3c2410_dma_loadbuffer(chan, chan->next); | ||
414 | } | ||
415 | |||
416 | } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) { | ||
417 | s3c2410_dma_loadbuffer(chan, chan->next); | ||
418 | } | ||
419 | } | ||
420 | |||
421 | |||
387 | local_irq_restore(flags); | 422 | local_irq_restore(flags); |
423 | |||
388 | return 0; | 424 | return 0; |
389 | } | 425 | } |
390 | 426 | ||
@@ -436,12 +472,11 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, | |||
436 | buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC); | 472 | buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC); |
437 | if (buf == NULL) { | 473 | if (buf == NULL) { |
438 | pr_debug("%s: out of memory (%ld alloc)\n", | 474 | pr_debug("%s: out of memory (%ld alloc)\n", |
439 | __FUNCTION__, sizeof(*buf)); | 475 | __FUNCTION__, (long)sizeof(*buf)); |
440 | return -ENOMEM; | 476 | return -ENOMEM; |
441 | } | 477 | } |
442 | 478 | ||
443 | pr_debug("%s: new buffer %p\n", __FUNCTION__, buf); | 479 | //pr_debug("%s: new buffer %p\n", __FUNCTION__, buf); |
444 | |||
445 | //dbg_showchan(chan); | 480 | //dbg_showchan(chan); |
446 | 481 | ||
447 | buf->next = NULL; | 482 | buf->next = NULL; |
@@ -537,14 +572,20 @@ s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan) | |||
537 | case S3C2410_DMALOAD_1LOADED: | 572 | case S3C2410_DMALOAD_1LOADED: |
538 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | 573 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { |
539 | /* flag error? */ | 574 | /* flag error? */ |
540 | printk(KERN_ERR "dma%d: timeout waiting for load\n", | 575 | printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", |
541 | chan->number); | 576 | chan->number, __FUNCTION__); |
542 | return; | 577 | return; |
543 | } | 578 | } |
544 | break; | 579 | break; |
545 | 580 | ||
581 | case S3C2410_DMALOAD_1LOADED_1RUNNING: | ||
582 | /* I belive in this case we do not have anything to do | ||
583 | * until the next buffer comes along, and we turn off the | ||
584 | * reload */ | ||
585 | return; | ||
586 | |||
546 | default: | 587 | default: |
547 | pr_debug("dma%d: lastxfer: unhandled load_state %d with no next", | 588 | pr_debug("dma%d: lastxfer: unhandled load_state %d with no next\n", |
548 | chan->number, chan->load_state); | 589 | chan->number, chan->load_state); |
549 | return; | 590 | return; |
550 | 591 | ||
@@ -629,7 +670,14 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | |||
629 | } else { | 670 | } else { |
630 | } | 671 | } |
631 | 672 | ||
632 | if (chan->next != NULL) { | 673 | /* only reload if the channel is still running... our buffer done |
674 | * routine may have altered the state by requesting the dma channel | ||
675 | * to stop or shutdown... */ | ||
676 | |||
677 | /* todo: check that when the channel is shut-down from inside this | ||
678 | * function, we cope with unsetting reload, etc */ | ||
679 | |||
680 | if (chan->next != NULL && chan->state != S3C2410_DMA_IDLE) { | ||
633 | unsigned long flags; | 681 | unsigned long flags; |
634 | 682 | ||
635 | switch (chan->load_state) { | 683 | switch (chan->load_state) { |
@@ -644,8 +692,8 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | |||
644 | case S3C2410_DMALOAD_1LOADED: | 692 | case S3C2410_DMALOAD_1LOADED: |
645 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | 693 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { |
646 | /* flag error? */ | 694 | /* flag error? */ |
647 | printk(KERN_ERR "dma%d: timeout waiting for load\n", | 695 | printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", |
648 | chan->number); | 696 | chan->number, __FUNCTION__); |
649 | return IRQ_HANDLED; | 697 | return IRQ_HANDLED; |
650 | } | 698 | } |
651 | 699 | ||
@@ -678,8 +726,6 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | |||
678 | return IRQ_HANDLED; | 726 | return IRQ_HANDLED; |
679 | } | 727 | } |
680 | 728 | ||
681 | |||
682 | |||
683 | /* s3c2410_request_dma | 729 | /* s3c2410_request_dma |
684 | * | 730 | * |
685 | * get control of an dma channel | 731 | * get control of an dma channel |
@@ -718,11 +764,17 @@ int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client, | |||
718 | pr_debug("dma%d: %s : requesting irq %d\n", | 764 | pr_debug("dma%d: %s : requesting irq %d\n", |
719 | channel, __FUNCTION__, chan->irq); | 765 | channel, __FUNCTION__, chan->irq); |
720 | 766 | ||
767 | chan->irq_claimed = 1; | ||
768 | local_irq_restore(flags); | ||
769 | |||
721 | err = request_irq(chan->irq, s3c2410_dma_irq, IRQF_DISABLED, | 770 | err = request_irq(chan->irq, s3c2410_dma_irq, IRQF_DISABLED, |
722 | client->name, (void *)chan); | 771 | client->name, (void *)chan); |
723 | 772 | ||
773 | local_irq_save(flags); | ||
774 | |||
724 | if (err) { | 775 | if (err) { |
725 | chan->in_use = 0; | 776 | chan->in_use = 0; |
777 | chan->irq_claimed = 0; | ||
726 | local_irq_restore(flags); | 778 | local_irq_restore(flags); |
727 | 779 | ||
728 | printk(KERN_ERR "%s: cannot get IRQ %d for DMA %d\n", | 780 | printk(KERN_ERR "%s: cannot get IRQ %d for DMA %d\n", |
@@ -730,7 +782,6 @@ int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client, | |||
730 | return err; | 782 | return err; |
731 | } | 783 | } |
732 | 784 | ||
733 | chan->irq_claimed = 1; | ||
734 | chan->irq_enabled = 1; | 785 | chan->irq_enabled = 1; |
735 | } | 786 | } |
736 | 787 | ||
@@ -810,6 +861,7 @@ static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | |||
810 | 861 | ||
811 | tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); | 862 | tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); |
812 | tmp |= S3C2410_DMASKTRIG_STOP; | 863 | tmp |= S3C2410_DMASKTRIG_STOP; |
864 | //tmp &= ~S3C2410_DMASKTRIG_ON; | ||
813 | dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); | 865 | dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); |
814 | 866 | ||
815 | #if 0 | 867 | #if 0 |
@@ -819,6 +871,7 @@ static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | |||
819 | dma_wrreg(chan, S3C2410_DMA_DCON, tmp); | 871 | dma_wrreg(chan, S3C2410_DMA_DCON, tmp); |
820 | #endif | 872 | #endif |
821 | 873 | ||
874 | /* should stop do this, or should we wait for flush? */ | ||
822 | chan->state = S3C2410_DMA_IDLE; | 875 | chan->state = S3C2410_DMA_IDLE; |
823 | chan->load_state = S3C2410_DMALOAD_NONE; | 876 | chan->load_state = S3C2410_DMALOAD_NONE; |
824 | 877 | ||
@@ -827,6 +880,22 @@ static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | |||
827 | return 0; | 880 | return 0; |
828 | } | 881 | } |
829 | 882 | ||
883 | void s3c2410_dma_waitforstop(s3c2410_dma_chan_t *chan) | ||
884 | { | ||
885 | unsigned long tmp; | ||
886 | unsigned int timeout = 0x10000; | ||
887 | |||
888 | while (timeout-- > 0) { | ||
889 | tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); | ||
890 | |||
891 | if (!(tmp & S3C2410_DMASKTRIG_ON)) | ||
892 | return; | ||
893 | } | ||
894 | |||
895 | pr_debug("dma%d: failed to stop?\n", chan->number); | ||
896 | } | ||
897 | |||
898 | |||
830 | /* s3c2410_dma_flush | 899 | /* s3c2410_dma_flush |
831 | * | 900 | * |
832 | * stop the channel, and remove all current and pending transfers | 901 | * stop the channel, and remove all current and pending transfers |
@@ -837,7 +906,9 @@ static int s3c2410_dma_flush(s3c2410_dma_chan_t *chan) | |||
837 | s3c2410_dma_buf_t *buf, *next; | 906 | s3c2410_dma_buf_t *buf, *next; |
838 | unsigned long flags; | 907 | unsigned long flags; |
839 | 908 | ||
840 | pr_debug("%s:\n", __FUNCTION__); | 909 | pr_debug("%s: chan %p (%d)\n", __FUNCTION__, chan, chan->number); |
910 | |||
911 | dbg_showchan(chan); | ||
841 | 912 | ||
842 | local_irq_save(flags); | 913 | local_irq_save(flags); |
843 | 914 | ||
@@ -864,11 +935,64 @@ static int s3c2410_dma_flush(s3c2410_dma_chan_t *chan) | |||
864 | } | 935 | } |
865 | } | 936 | } |
866 | 937 | ||
938 | dbg_showregs(chan); | ||
939 | |||
940 | s3c2410_dma_waitforstop(chan); | ||
941 | |||
942 | #if 0 | ||
943 | /* should also clear interrupts, according to WinCE BSP */ | ||
944 | { | ||
945 | unsigned long tmp; | ||
946 | |||
947 | tmp = dma_rdreg(chan, S3C2410_DMA_DCON); | ||
948 | tmp |= S3C2410_DCON_NORELOAD; | ||
949 | dma_wrreg(chan, S3C2410_DMA_DCON, tmp); | ||
950 | } | ||
951 | #endif | ||
952 | |||
953 | dbg_showregs(chan); | ||
954 | |||
867 | local_irq_restore(flags); | 955 | local_irq_restore(flags); |
868 | 956 | ||
869 | return 0; | 957 | return 0; |
870 | } | 958 | } |
871 | 959 | ||
960 | int | ||
961 | s3c2410_dma_started(s3c2410_dma_chan_t *chan) | ||
962 | { | ||
963 | unsigned long flags; | ||
964 | |||
965 | local_irq_save(flags); | ||
966 | |||
967 | dbg_showchan(chan); | ||
968 | |||
969 | /* if we've only loaded one buffer onto the channel, then chec | ||
970 | * to see if we have another, and if so, try and load it so when | ||
971 | * the first buffer is finished, the new one will be loaded onto | ||
972 | * the channel */ | ||
973 | |||
974 | if (chan->next != NULL) { | ||
975 | if (chan->load_state == S3C2410_DMALOAD_1LOADED) { | ||
976 | |||
977 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | ||
978 | pr_debug("%s: buff not yet loaded, no more todo\n", | ||
979 | __FUNCTION__); | ||
980 | } else { | ||
981 | chan->load_state = S3C2410_DMALOAD_1RUNNING; | ||
982 | s3c2410_dma_loadbuffer(chan, chan->next); | ||
983 | } | ||
984 | |||
985 | } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) { | ||
986 | s3c2410_dma_loadbuffer(chan, chan->next); | ||
987 | } | ||
988 | } | ||
989 | |||
990 | |||
991 | local_irq_restore(flags); | ||
992 | |||
993 | return 0; | ||
994 | |||
995 | } | ||
872 | 996 | ||
873 | int | 997 | int |
874 | s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op) | 998 | s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op) |
@@ -885,14 +1009,15 @@ s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op) | |||
885 | return s3c2410_dma_dostop(chan); | 1009 | return s3c2410_dma_dostop(chan); |
886 | 1010 | ||
887 | case S3C2410_DMAOP_PAUSE: | 1011 | case S3C2410_DMAOP_PAUSE: |
888 | return -ENOENT; | ||
889 | |||
890 | case S3C2410_DMAOP_RESUME: | 1012 | case S3C2410_DMAOP_RESUME: |
891 | return -ENOENT; | 1013 | return -ENOENT; |
892 | 1014 | ||
893 | case S3C2410_DMAOP_FLUSH: | 1015 | case S3C2410_DMAOP_FLUSH: |
894 | return s3c2410_dma_flush(chan); | 1016 | return s3c2410_dma_flush(chan); |
895 | 1017 | ||
1018 | case S3C2410_DMAOP_STARTED: | ||
1019 | return s3c2410_dma_started(chan); | ||
1020 | |||
896 | case S3C2410_DMAOP_TIMEOUT: | 1021 | case S3C2410_DMAOP_TIMEOUT: |
897 | return 0; | 1022 | return 0; |
898 | 1023 | ||
diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c index 1604dadf27fc..5eba5fbbb561 100644 --- a/arch/arm/mach-sa1100/ssp.c +++ b/arch/arm/mach-sa1100/ssp.c | |||
@@ -23,6 +23,8 @@ | |||
23 | #include <asm/hardware.h> | 23 | #include <asm/hardware.h> |
24 | #include <asm/hardware/ssp.h> | 24 | #include <asm/hardware/ssp.h> |
25 | 25 | ||
26 | #define TIMEOUT 100000 | ||
27 | |||
26 | static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 28 | static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
27 | { | 29 | { |
28 | unsigned int status = Ser4SSSR; | 30 | unsigned int status = Ser4SSSR; |
@@ -47,18 +49,27 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
47 | * The caller is expected to perform the necessary locking. | 49 | * The caller is expected to perform the necessary locking. |
48 | * | 50 | * |
49 | * Returns: | 51 | * Returns: |
50 | * %-ETIMEDOUT timeout occurred (for future) | 52 | * %-ETIMEDOUT timeout occurred |
51 | * 0 success | 53 | * 0 success |
52 | */ | 54 | */ |
53 | int ssp_write_word(u16 data) | 55 | int ssp_write_word(u16 data) |
54 | { | 56 | { |
55 | while (!(Ser4SSSR & SSSR_TNF)) | 57 | int timeout = TIMEOUT; |
58 | |||
59 | while (!(Ser4SSSR & SSSR_TNF)) { | ||
60 | if (!--timeout) | ||
61 | return -ETIMEDOUT; | ||
56 | cpu_relax(); | 62 | cpu_relax(); |
63 | } | ||
57 | 64 | ||
58 | Ser4SSDR = data; | 65 | Ser4SSDR = data; |
59 | 66 | ||
60 | while (!(Ser4SSSR & SSSR_BSY)) | 67 | timeout = TIMEOUT; |
68 | while (!(Ser4SSSR & SSSR_BSY)) { | ||
69 | if (!--timeout) | ||
70 | return -ETIMEDOUT; | ||
61 | cpu_relax(); | 71 | cpu_relax(); |
72 | } | ||
62 | 73 | ||
63 | return 0; | 74 | return 0; |
64 | } | 75 | } |
@@ -75,15 +86,22 @@ int ssp_write_word(u16 data) | |||
75 | * The caller is expected to perform the necessary locking. | 86 | * The caller is expected to perform the necessary locking. |
76 | * | 87 | * |
77 | * Returns: | 88 | * Returns: |
78 | * %-ETIMEDOUT timeout occurred (for future) | 89 | * %-ETIMEDOUT timeout occurred |
79 | * 16-bit data success | 90 | * 16-bit data success |
80 | */ | 91 | */ |
81 | int ssp_read_word(void) | 92 | int ssp_read_word(u16 *data) |
82 | { | 93 | { |
83 | while (!(Ser4SSSR & SSSR_RNE)) | 94 | int timeout = TIMEOUT; |
95 | |||
96 | while (!(Ser4SSSR & SSSR_RNE)) { | ||
97 | if (!--timeout) | ||
98 | return -ETIMEDOUT; | ||
84 | cpu_relax(); | 99 | cpu_relax(); |
100 | } | ||
101 | |||
102 | *data = (u16)Ser4SSDR; | ||
85 | 103 | ||
86 | return Ser4SSDR; | 104 | return 0; |
87 | } | 105 | } |
88 | 106 | ||
89 | /** | 107 | /** |
@@ -93,14 +111,26 @@ int ssp_read_word(void) | |||
93 | * is empty. | 111 | * is empty. |
94 | * | 112 | * |
95 | * The caller is expected to perform the necessary locking. | 113 | * The caller is expected to perform the necessary locking. |
114 | * | ||
115 | * Returns: | ||
116 | * %-ETIMEDOUT timeout occurred | ||
117 | * 0 success | ||
96 | */ | 118 | */ |
97 | void ssp_flush(void) | 119 | int ssp_flush(void) |
98 | { | 120 | { |
121 | int timeout = TIMEOUT * 2; | ||
122 | |||
99 | do { | 123 | do { |
100 | while (Ser4SSSR & SSSR_RNE) { | 124 | while (Ser4SSSR & SSSR_RNE) { |
125 | if (!--timeout) | ||
126 | return -ETIMEDOUT; | ||
101 | (void) Ser4SSDR; | 127 | (void) Ser4SSDR; |
102 | } | 128 | } |
129 | if (!--timeout) | ||
130 | return -ETIMEDOUT; | ||
103 | } while (Ser4SSSR & SSSR_BSY); | 131 | } while (Ser4SSSR & SSSR_BSY); |
132 | |||
133 | return 0; | ||
104 | } | 134 | } |
105 | 135 | ||
106 | /** | 136 | /** |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index c4e3f8c68479..f2bbef07b1e4 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -285,7 +285,7 @@ static struct flash_platform_data versatile_flash_data = { | |||
285 | 285 | ||
286 | static struct resource versatile_flash_resource = { | 286 | static struct resource versatile_flash_resource = { |
287 | .start = VERSATILE_FLASH_BASE, | 287 | .start = VERSATILE_FLASH_BASE, |
288 | .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE, | 288 | .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1, |
289 | .flags = IORESOURCE_MEM, | 289 | .flags = IORESOURCE_MEM, |
290 | }; | 290 | }; |
291 | 291 | ||
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 5f80f184cd32..b4f220dd5eb8 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -46,7 +46,7 @@ config CPU_ARM710 | |||
46 | config CPU_ARM720T | 46 | config CPU_ARM720T |
47 | bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR | 47 | bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR |
48 | default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X | 48 | default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X |
49 | select CPU_32v4 | 49 | select CPU_32v4T |
50 | select CPU_ABRT_LV4T | 50 | select CPU_ABRT_LV4T |
51 | select CPU_CACHE_V4 | 51 | select CPU_CACHE_V4 |
52 | select CPU_CACHE_VIVT | 52 | select CPU_CACHE_VIVT |
@@ -64,7 +64,7 @@ config CPU_ARM920T | |||
64 | bool "Support ARM920T processor" | 64 | bool "Support ARM920T processor" |
65 | depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200 | 65 | depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200 |
66 | default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200 | 66 | default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200 |
67 | select CPU_32v4 | 67 | select CPU_32v4T |
68 | select CPU_ABRT_EV4T | 68 | select CPU_ABRT_EV4T |
69 | select CPU_CACHE_V4WT | 69 | select CPU_CACHE_V4WT |
70 | select CPU_CACHE_VIVT | 70 | select CPU_CACHE_VIVT |
@@ -85,7 +85,7 @@ config CPU_ARM922T | |||
85 | bool "Support ARM922T processor" if ARCH_INTEGRATOR | 85 | bool "Support ARM922T processor" if ARCH_INTEGRATOR |
86 | depends on ARCH_LH7A40X || ARCH_INTEGRATOR | 86 | depends on ARCH_LH7A40X || ARCH_INTEGRATOR |
87 | default y if ARCH_LH7A40X | 87 | default y if ARCH_LH7A40X |
88 | select CPU_32v4 | 88 | select CPU_32v4T |
89 | select CPU_ABRT_EV4T | 89 | select CPU_ABRT_EV4T |
90 | select CPU_CACHE_V4WT | 90 | select CPU_CACHE_V4WT |
91 | select CPU_CACHE_VIVT | 91 | select CPU_CACHE_VIVT |
@@ -104,7 +104,7 @@ config CPU_ARM925T | |||
104 | bool "Support ARM925T processor" if ARCH_OMAP1 | 104 | bool "Support ARM925T processor" if ARCH_OMAP1 |
105 | depends on ARCH_OMAP15XX | 105 | depends on ARCH_OMAP15XX |
106 | default y if ARCH_OMAP15XX | 106 | default y if ARCH_OMAP15XX |
107 | select CPU_32v4 | 107 | select CPU_32v4T |
108 | select CPU_ABRT_EV4T | 108 | select CPU_ABRT_EV4T |
109 | select CPU_CACHE_V4WT | 109 | select CPU_CACHE_V4WT |
110 | select CPU_CACHE_VIVT | 110 | select CPU_CACHE_VIVT |
@@ -285,6 +285,11 @@ config CPU_32v4 | |||
285 | select TLS_REG_EMUL if SMP || !MMU | 285 | select TLS_REG_EMUL if SMP || !MMU |
286 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP | 286 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP |
287 | 287 | ||
288 | config CPU_32v4T | ||
289 | bool | ||
290 | select TLS_REG_EMUL if SMP || !MMU | ||
291 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP | ||
292 | |||
288 | config CPU_32v5 | 293 | config CPU_32v5 |
289 | bool | 294 | bool |
290 | select TLS_REG_EMUL if SMP || !MMU | 295 | select TLS_REG_EMUL if SMP || !MMU |
diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h index 4b97950984e9..5fbdf81a8aaf 100644 --- a/arch/arm/vfp/vfp.h +++ b/arch/arm/vfp/vfp.h | |||
@@ -353,3 +353,11 @@ u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand); | |||
353 | * A special flag to tell the normalisation code not to normalise. | 353 | * A special flag to tell the normalisation code not to normalise. |
354 | */ | 354 | */ |
355 | #define VFP_NAN_FLAG 0x100 | 355 | #define VFP_NAN_FLAG 0x100 |
356 | |||
357 | /* | ||
358 | * A bit pattern used to indicate the initial (unset) value of the | ||
359 | * exception mask, in case nothing handles an instruction. This | ||
360 | * doesn't include the NAN flag, which get masked out before | ||
361 | * we check for an error. | ||
362 | */ | ||
363 | #define VFP_EXCEPTION_ERROR ((u32)-1 & ~VFP_NAN_FLAG) | ||
diff --git a/arch/arm/vfp/vfpdouble.c b/arch/arm/vfp/vfpdouble.c index 009038c8113e..04bd3425b29b 100644 --- a/arch/arm/vfp/vfpdouble.c +++ b/arch/arm/vfp/vfpdouble.c | |||
@@ -465,7 +465,7 @@ static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr) | |||
465 | */ | 465 | */ |
466 | if (tm & (VFP_INFINITY|VFP_NAN)) { | 466 | if (tm & (VFP_INFINITY|VFP_NAN)) { |
467 | vsd.exponent = 255; | 467 | vsd.exponent = 255; |
468 | if (tm & VFP_NAN) | 468 | if (tm == VFP_QNAN) |
469 | vsd.significand |= VFP_SINGLE_SIGNIFICAND_QNAN; | 469 | vsd.significand |= VFP_SINGLE_SIGNIFICAND_QNAN; |
470 | goto pack_nan; | 470 | goto pack_nan; |
471 | } else if (tm & VFP_ZERO) | 471 | } else if (tm & VFP_ZERO) |
@@ -1127,7 +1127,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) | |||
1127 | { | 1127 | { |
1128 | u32 op = inst & FOP_MASK; | 1128 | u32 op = inst & FOP_MASK; |
1129 | u32 exceptions = 0; | 1129 | u32 exceptions = 0; |
1130 | unsigned int dd = vfp_get_dd(inst); | 1130 | unsigned int dest; |
1131 | unsigned int dn = vfp_get_dn(inst); | 1131 | unsigned int dn = vfp_get_dn(inst); |
1132 | unsigned int dm = vfp_get_dm(inst); | 1132 | unsigned int dm = vfp_get_dm(inst); |
1133 | unsigned int vecitr, veclen, vecstride; | 1133 | unsigned int vecitr, veclen, vecstride; |
@@ -1137,10 +1137,20 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) | |||
1137 | vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK)) * 2; | 1137 | vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK)) * 2; |
1138 | 1138 | ||
1139 | /* | 1139 | /* |
1140 | * fcvtds takes an sN register number as destination, not dN. | ||
1141 | * It also always operates on scalars. | ||
1142 | */ | ||
1143 | if ((inst & FEXT_MASK) == FEXT_FCVT) { | ||
1144 | veclen = 0; | ||
1145 | dest = vfp_get_sd(inst); | ||
1146 | } else | ||
1147 | dest = vfp_get_dd(inst); | ||
1148 | |||
1149 | /* | ||
1140 | * If destination bank is zero, vector length is always '1'. | 1150 | * If destination bank is zero, vector length is always '1'. |
1141 | * ARM DDI0100F C5.1.3, C5.3.2. | 1151 | * ARM DDI0100F C5.1.3, C5.3.2. |
1142 | */ | 1152 | */ |
1143 | if (FREG_BANK(dd) == 0) | 1153 | if (FREG_BANK(dest) == 0) |
1144 | veclen = 0; | 1154 | veclen = 0; |
1145 | 1155 | ||
1146 | pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, | 1156 | pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, |
@@ -1153,16 +1163,20 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) | |||
1153 | for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) { | 1163 | for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) { |
1154 | u32 except; | 1164 | u32 except; |
1155 | 1165 | ||
1156 | if (op == FOP_EXT) | 1166 | if (op == FOP_EXT && (inst & FEXT_MASK) == FEXT_FCVT) |
1167 | pr_debug("VFP: itr%d (s%u) = op[%u] (d%u)\n", | ||
1168 | vecitr >> FPSCR_LENGTH_BIT, | ||
1169 | dest, dn, dm); | ||
1170 | else if (op == FOP_EXT) | ||
1157 | pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n", | 1171 | pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n", |
1158 | vecitr >> FPSCR_LENGTH_BIT, | 1172 | vecitr >> FPSCR_LENGTH_BIT, |
1159 | dd, dn, dm); | 1173 | dest, dn, dm); |
1160 | else | 1174 | else |
1161 | pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n", | 1175 | pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n", |
1162 | vecitr >> FPSCR_LENGTH_BIT, | 1176 | vecitr >> FPSCR_LENGTH_BIT, |
1163 | dd, dn, FOP_TO_IDX(op), dm); | 1177 | dest, dn, FOP_TO_IDX(op), dm); |
1164 | 1178 | ||
1165 | except = fop(dd, dn, dm, fpscr); | 1179 | except = fop(dest, dn, dm, fpscr); |
1166 | pr_debug("VFP: itr%d: exceptions=%08x\n", | 1180 | pr_debug("VFP: itr%d: exceptions=%08x\n", |
1167 | vecitr >> FPSCR_LENGTH_BIT, except); | 1181 | vecitr >> FPSCR_LENGTH_BIT, except); |
1168 | 1182 | ||
@@ -1180,7 +1194,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) | |||
1180 | * we encounter an exception. We continue. | 1194 | * we encounter an exception. We continue. |
1181 | */ | 1195 | */ |
1182 | 1196 | ||
1183 | dd = FREG_BANK(dd) + ((FREG_IDX(dd) + vecstride) & 6); | 1197 | dest = FREG_BANK(dest) + ((FREG_IDX(dest) + vecstride) & 6); |
1184 | dn = FREG_BANK(dn) + ((FREG_IDX(dn) + vecstride) & 6); | 1198 | dn = FREG_BANK(dn) + ((FREG_IDX(dn) + vecstride) & 6); |
1185 | if (FREG_BANK(dm) != 0) | 1199 | if (FREG_BANK(dm) != 0) |
1186 | dm = FREG_BANK(dm) + ((FREG_IDX(dm) + vecstride) & 6); | 1200 | dm = FREG_BANK(dm) + ((FREG_IDX(dm) + vecstride) & 6); |
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 9d265d5e748c..4178f6cc3d37 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -131,7 +131,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ | |||
131 | 131 | ||
132 | pr_debug("VFP: raising exceptions %08x\n", exceptions); | 132 | pr_debug("VFP: raising exceptions %08x\n", exceptions); |
133 | 133 | ||
134 | if (exceptions == (u32)-1) { | 134 | if (exceptions == VFP_EXCEPTION_ERROR) { |
135 | vfp_panic("unhandled bounce"); | 135 | vfp_panic("unhandled bounce"); |
136 | vfp_raise_sigfpe(0, regs); | 136 | vfp_raise_sigfpe(0, regs); |
137 | return; | 137 | return; |
@@ -170,7 +170,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ | |||
170 | */ | 170 | */ |
171 | static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) | 171 | static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) |
172 | { | 172 | { |
173 | u32 exceptions = (u32)-1; | 173 | u32 exceptions = VFP_EXCEPTION_ERROR; |
174 | 174 | ||
175 | pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); | 175 | pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); |
176 | 176 | ||
diff --git a/arch/arm/vfp/vfpsingle.c b/arch/arm/vfp/vfpsingle.c index dae2c2f46052..78d7cac5f36b 100644 --- a/arch/arm/vfp/vfpsingle.c +++ b/arch/arm/vfp/vfpsingle.c | |||
@@ -506,7 +506,7 @@ static u32 vfp_single_fcvtd(int dd, int unused, s32 m, u32 fpscr) | |||
506 | */ | 506 | */ |
507 | if (tm & (VFP_INFINITY|VFP_NAN)) { | 507 | if (tm & (VFP_INFINITY|VFP_NAN)) { |
508 | vdd.exponent = 2047; | 508 | vdd.exponent = 2047; |
509 | if (tm & VFP_NAN) | 509 | if (tm == VFP_QNAN) |
510 | vdd.significand |= VFP_DOUBLE_SIGNIFICAND_QNAN; | 510 | vdd.significand |= VFP_DOUBLE_SIGNIFICAND_QNAN; |
511 | goto pack_nan; | 511 | goto pack_nan; |
512 | } else if (tm & VFP_ZERO) | 512 | } else if (tm & VFP_ZERO) |
@@ -514,10 +514,6 @@ static u32 vfp_single_fcvtd(int dd, int unused, s32 m, u32 fpscr) | |||
514 | else | 514 | else |
515 | vdd.exponent = vsm.exponent + (1023 - 127); | 515 | vdd.exponent = vsm.exponent + (1023 - 127); |
516 | 516 | ||
517 | /* | ||
518 | * Technically, if bit 0 of dd is set, this is an invalid | ||
519 | * instruction. However, we ignore this for efficiency. | ||
520 | */ | ||
521 | return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fcvtd"); | 517 | return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fcvtd"); |
522 | 518 | ||
523 | pack_nan: | 519 | pack_nan: |
@@ -1174,7 +1170,7 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) | |||
1174 | { | 1170 | { |
1175 | u32 op = inst & FOP_MASK; | 1171 | u32 op = inst & FOP_MASK; |
1176 | u32 exceptions = 0; | 1172 | u32 exceptions = 0; |
1177 | unsigned int sd = vfp_get_sd(inst); | 1173 | unsigned int dest; |
1178 | unsigned int sn = vfp_get_sn(inst); | 1174 | unsigned int sn = vfp_get_sn(inst); |
1179 | unsigned int sm = vfp_get_sm(inst); | 1175 | unsigned int sm = vfp_get_sm(inst); |
1180 | unsigned int vecitr, veclen, vecstride; | 1176 | unsigned int vecitr, veclen, vecstride; |
@@ -1184,10 +1180,22 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) | |||
1184 | vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK); | 1180 | vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK); |
1185 | 1181 | ||
1186 | /* | 1182 | /* |
1183 | * fcvtsd takes a dN register number as destination, not sN. | ||
1184 | * Technically, if bit 0 of dd is set, this is an invalid | ||
1185 | * instruction. However, we ignore this for efficiency. | ||
1186 | * It also only operates on scalars. | ||
1187 | */ | ||
1188 | if ((inst & FEXT_MASK) == FEXT_FCVT) { | ||
1189 | veclen = 0; | ||
1190 | dest = vfp_get_dd(inst); | ||
1191 | } else | ||
1192 | dest = vfp_get_sd(inst); | ||
1193 | |||
1194 | /* | ||
1187 | * If destination bank is zero, vector length is always '1'. | 1195 | * If destination bank is zero, vector length is always '1'. |
1188 | * ARM DDI0100F C5.1.3, C5.3.2. | 1196 | * ARM DDI0100F C5.1.3, C5.3.2. |
1189 | */ | 1197 | */ |
1190 | if (FREG_BANK(sd) == 0) | 1198 | if (FREG_BANK(dest) == 0) |
1191 | veclen = 0; | 1199 | veclen = 0; |
1192 | 1200 | ||
1193 | pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, | 1201 | pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, |
@@ -1201,15 +1209,18 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) | |||
1201 | s32 m = vfp_get_float(sm); | 1209 | s32 m = vfp_get_float(sm); |
1202 | u32 except; | 1210 | u32 except; |
1203 | 1211 | ||
1204 | if (op == FOP_EXT) | 1212 | if (op == FOP_EXT && (inst & FEXT_MASK) == FEXT_FCVT) |
1213 | pr_debug("VFP: itr%d (d%u) = op[%u] (s%u=%08x)\n", | ||
1214 | vecitr >> FPSCR_LENGTH_BIT, dest, sn, sm, m); | ||
1215 | else if (op == FOP_EXT) | ||
1205 | pr_debug("VFP: itr%d (s%u) = op[%u] (s%u=%08x)\n", | 1216 | pr_debug("VFP: itr%d (s%u) = op[%u] (s%u=%08x)\n", |
1206 | vecitr >> FPSCR_LENGTH_BIT, sd, sn, sm, m); | 1217 | vecitr >> FPSCR_LENGTH_BIT, dest, sn, sm, m); |
1207 | else | 1218 | else |
1208 | pr_debug("VFP: itr%d (s%u) = (s%u) op[%u] (s%u=%08x)\n", | 1219 | pr_debug("VFP: itr%d (s%u) = (s%u) op[%u] (s%u=%08x)\n", |
1209 | vecitr >> FPSCR_LENGTH_BIT, sd, sn, | 1220 | vecitr >> FPSCR_LENGTH_BIT, dest, sn, |
1210 | FOP_TO_IDX(op), sm, m); | 1221 | FOP_TO_IDX(op), sm, m); |
1211 | 1222 | ||
1212 | except = fop(sd, sn, m, fpscr); | 1223 | except = fop(dest, sn, m, fpscr); |
1213 | pr_debug("VFP: itr%d: exceptions=%08x\n", | 1224 | pr_debug("VFP: itr%d: exceptions=%08x\n", |
1214 | vecitr >> FPSCR_LENGTH_BIT, except); | 1225 | vecitr >> FPSCR_LENGTH_BIT, except); |
1215 | 1226 | ||
@@ -1227,7 +1238,7 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) | |||
1227 | * we encounter an exception. We continue. | 1238 | * we encounter an exception. We continue. |
1228 | */ | 1239 | */ |
1229 | 1240 | ||
1230 | sd = FREG_BANK(sd) + ((FREG_IDX(sd) + vecstride) & 7); | 1241 | dest = FREG_BANK(dest) + ((FREG_IDX(dest) + vecstride) & 7); |
1231 | sn = FREG_BANK(sn) + ((FREG_IDX(sn) + vecstride) & 7); | 1242 | sn = FREG_BANK(sn) + ((FREG_IDX(sn) + vecstride) & 7); |
1232 | if (FREG_BANK(sm) != 0) | 1243 | if (FREG_BANK(sm) != 0) |
1233 | sm = FREG_BANK(sm) + ((FREG_IDX(sm) + vecstride) & 7); | 1244 | sm = FREG_BANK(sm) + ((FREG_IDX(sm) + vecstride) & 7); |
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig index f71fb4a029cb..b2751eadbc56 100644 --- a/arch/i386/Kconfig +++ b/arch/i386/Kconfig | |||
@@ -142,6 +142,7 @@ config X86_SUMMIT | |||
142 | In particular, it is needed for the x440. | 142 | In particular, it is needed for the x440. |
143 | 143 | ||
144 | If you don't have one of these computers, you should say N here. | 144 | If you don't have one of these computers, you should say N here. |
145 | If you want to build a NUMA kernel, you must select ACPI. | ||
145 | 146 | ||
146 | config X86_BIGSMP | 147 | config X86_BIGSMP |
147 | bool "Support for other sub-arch SMP systems with more than 8 CPUs" | 148 | bool "Support for other sub-arch SMP systems with more than 8 CPUs" |
@@ -169,6 +170,7 @@ config X86_GENERICARCH | |||
169 | help | 170 | help |
170 | This option compiles in the Summit, bigsmp, ES7000, default subarchitectures. | 171 | This option compiles in the Summit, bigsmp, ES7000, default subarchitectures. |
171 | It is intended for a generic binary kernel. | 172 | It is intended for a generic binary kernel. |
173 | If you want a NUMA kernel, select ACPI. We need SRAT for NUMA. | ||
172 | 174 | ||
173 | config X86_ES7000 | 175 | config X86_ES7000 |
174 | bool "Support for Unisys ES7000 IA32 series" | 176 | bool "Support for Unisys ES7000 IA32 series" |
@@ -542,7 +544,7 @@ config X86_PAE | |||
542 | # Common NUMA Features | 544 | # Common NUMA Features |
543 | config NUMA | 545 | config NUMA |
544 | bool "Numa Memory Allocation and Scheduler Support" | 546 | bool "Numa Memory Allocation and Scheduler Support" |
545 | depends on SMP && HIGHMEM64G && (X86_NUMAQ || X86_GENERICARCH || (X86_SUMMIT && ACPI)) | 547 | depends on SMP && HIGHMEM64G && (X86_NUMAQ || (X86_SUMMIT || X86_GENERICARCH) && ACPI) |
546 | default n if X86_PC | 548 | default n if X86_PC |
547 | default y if (X86_NUMAQ || X86_SUMMIT) | 549 | default y if (X86_NUMAQ || X86_SUMMIT) |
548 | 550 | ||
diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c index 0db6387025ca..ee003bc0e8b1 100644 --- a/arch/i386/kernel/acpi/boot.c +++ b/arch/i386/kernel/acpi/boot.c | |||
@@ -59,7 +59,7 @@ static inline int gsi_irq_sharing(int gsi) { return gsi; } | |||
59 | 59 | ||
60 | #define BAD_MADT_ENTRY(entry, end) ( \ | 60 | #define BAD_MADT_ENTRY(entry, end) ( \ |
61 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | 61 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ |
62 | ((acpi_table_entry_header *)entry)->length != sizeof(*entry)) | 62 | ((acpi_table_entry_header *)entry)->length < sizeof(*entry)) |
63 | 63 | ||
64 | #define PREFIX "ACPI: " | 64 | #define PREFIX "ACPI: " |
65 | 65 | ||
diff --git a/arch/i386/kernel/acpi/wakeup.S b/arch/i386/kernel/acpi/wakeup.S index 9f408eee4e6f..b781b38131c0 100644 --- a/arch/i386/kernel/acpi/wakeup.S +++ b/arch/i386/kernel/acpi/wakeup.S | |||
@@ -292,7 +292,10 @@ ENTRY(do_suspend_lowlevel) | |||
292 | pushl $3 | 292 | pushl $3 |
293 | call acpi_enter_sleep_state | 293 | call acpi_enter_sleep_state |
294 | addl $4, %esp | 294 | addl $4, %esp |
295 | ret | 295 | |
296 | # In case of S3 failure, we'll emerge here. Jump | ||
297 | # to ret_point to recover | ||
298 | jmp ret_point | ||
296 | .p2align 4,,7 | 299 | .p2align 4,,7 |
297 | ret_point: | 300 | ret_point: |
298 | call restore_registers | 301 | call restore_registers |
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c index efb41e81351c..e6ea00edcb54 100644 --- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c +++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c | |||
@@ -567,16 +567,11 @@ static struct cpufreq_driver acpi_cpufreq_driver = { | |||
567 | static int __init | 567 | static int __init |
568 | acpi_cpufreq_init (void) | 568 | acpi_cpufreq_init (void) |
569 | { | 569 | { |
570 | int result = 0; | ||
571 | |||
572 | dprintk("acpi_cpufreq_init\n"); | 570 | dprintk("acpi_cpufreq_init\n"); |
573 | 571 | ||
574 | result = acpi_cpufreq_early_init_acpi(); | 572 | acpi_cpufreq_early_init_acpi(); |
575 | 573 | ||
576 | if (!result) | 574 | return cpufreq_register_driver(&acpi_cpufreq_driver); |
577 | result = cpufreq_register_driver(&acpi_cpufreq_driver); | ||
578 | |||
579 | return (result); | ||
580 | } | 575 | } |
581 | 576 | ||
582 | 577 | ||
diff --git a/arch/i386/kernel/head.S b/arch/i386/kernel/head.S index eb79aa2fa8bb..a6b8bd89aa27 100644 --- a/arch/i386/kernel/head.S +++ b/arch/i386/kernel/head.S | |||
@@ -317,20 +317,14 @@ is386: movl $2,%ecx # set MP | |||
317 | movl %eax,%gs | 317 | movl %eax,%gs |
318 | lldt %ax | 318 | lldt %ax |
319 | cld # gcc2 wants the direction flag cleared at all times | 319 | cld # gcc2 wants the direction flag cleared at all times |
320 | pushl %eax # fake return address | ||
320 | #ifdef CONFIG_SMP | 321 | #ifdef CONFIG_SMP |
321 | movb ready, %cl | 322 | movb ready, %cl |
322 | movb $1, ready | 323 | movb $1, ready |
323 | cmpb $0,%cl | 324 | cmpb $0,%cl # the first CPU calls start_kernel |
324 | je 1f # the first CPU calls start_kernel | 325 | jne initialize_secondary # all other CPUs call initialize_secondary |
325 | # all other CPUs call initialize_secondary | ||
326 | call initialize_secondary | ||
327 | jmp L6 | ||
328 | 1: | ||
329 | #endif /* CONFIG_SMP */ | 326 | #endif /* CONFIG_SMP */ |
330 | call start_kernel | 327 | jmp start_kernel |
331 | L6: | ||
332 | jmp L6 # main should never return here, but | ||
333 | # just in case, we know what happens. | ||
334 | 328 | ||
335 | /* | 329 | /* |
336 | * We depend on ET to be correct. This checks for 287/387. | 330 | * We depend on ET to be correct. This checks for 287/387. |
diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c index 6cb529f60dcc..5fe547cd8f9f 100644 --- a/arch/i386/kernel/irq.c +++ b/arch/i386/kernel/irq.c | |||
@@ -82,10 +82,6 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs) | |||
82 | } | 82 | } |
83 | #endif | 83 | #endif |
84 | 84 | ||
85 | if (!irq_desc[irq].handle_irq) { | ||
86 | __do_IRQ(irq, regs); | ||
87 | goto out_exit; | ||
88 | } | ||
89 | #ifdef CONFIG_4KSTACKS | 85 | #ifdef CONFIG_4KSTACKS |
90 | 86 | ||
91 | curctx = (union irq_ctx *) current_thread_info(); | 87 | curctx = (union irq_ctx *) current_thread_info(); |
@@ -125,7 +121,6 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs) | |||
125 | #endif | 121 | #endif |
126 | __do_IRQ(irq, regs); | 122 | __do_IRQ(irq, regs); |
127 | 123 | ||
128 | out_exit: | ||
129 | irq_exit(); | 124 | irq_exit(); |
130 | 125 | ||
131 | return 1; | 126 | return 1; |
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c index f1682206d304..345ffb7d904d 100644 --- a/arch/i386/kernel/setup.c +++ b/arch/i386/kernel/setup.c | |||
@@ -956,38 +956,6 @@ efi_memory_present_wrapper(unsigned long start, unsigned long end, void *arg) | |||
956 | return 0; | 956 | return 0; |
957 | } | 957 | } |
958 | 958 | ||
959 | /* | ||
960 | * This function checks if the entire range <start,end> is mapped with type. | ||
961 | * | ||
962 | * Note: this function only works correct if the e820 table is sorted and | ||
963 | * not-overlapping, which is the case | ||
964 | */ | ||
965 | int __init | ||
966 | e820_all_mapped(unsigned long s, unsigned long e, unsigned type) | ||
967 | { | ||
968 | u64 start = s; | ||
969 | u64 end = e; | ||
970 | int i; | ||
971 | for (i = 0; i < e820.nr_map; i++) { | ||
972 | struct e820entry *ei = &e820.map[i]; | ||
973 | if (type && ei->type != type) | ||
974 | continue; | ||
975 | /* is the region (part) in overlap with the current region ?*/ | ||
976 | if (ei->addr >= end || ei->addr + ei->size <= start) | ||
977 | continue; | ||
978 | /* if the region is at the beginning of <start,end> we move | ||
979 | * start to the end of the region since it's ok until there | ||
980 | */ | ||
981 | if (ei->addr <= start) | ||
982 | start = ei->addr + ei->size; | ||
983 | /* if start is now at or beyond end, we're done, full | ||
984 | * coverage */ | ||
985 | if (start >= end) | ||
986 | return 1; /* we're done */ | ||
987 | } | ||
988 | return 0; | ||
989 | } | ||
990 | |||
991 | /* | 959 | /* |
992 | * Find the highest page frame number we have available | 960 | * Find the highest page frame number we have available |
993 | */ | 961 | */ |
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c index 0d4005dc06c5..7e9edafffd8a 100644 --- a/arch/i386/kernel/traps.c +++ b/arch/i386/kernel/traps.c | |||
@@ -92,7 +92,11 @@ asmlinkage void spurious_interrupt_bug(void); | |||
92 | asmlinkage void machine_check(void); | 92 | asmlinkage void machine_check(void); |
93 | 93 | ||
94 | static int kstack_depth_to_print = 24; | 94 | static int kstack_depth_to_print = 24; |
95 | #ifdef CONFIG_STACK_UNWIND | ||
95 | static int call_trace = 1; | 96 | static int call_trace = 1; |
97 | #else | ||
98 | #define call_trace (-1) | ||
99 | #endif | ||
96 | ATOMIC_NOTIFIER_HEAD(i386die_chain); | 100 | ATOMIC_NOTIFIER_HEAD(i386die_chain); |
97 | 101 | ||
98 | int register_die_notifier(struct notifier_block *nb) | 102 | int register_die_notifier(struct notifier_block *nb) |
@@ -187,22 +191,21 @@ static void show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs, | |||
187 | if (unwind_init_blocked(&info, task) == 0) | 191 | if (unwind_init_blocked(&info, task) == 0) |
188 | unw_ret = show_trace_unwind(&info, log_lvl); | 192 | unw_ret = show_trace_unwind(&info, log_lvl); |
189 | } | 193 | } |
190 | if (unw_ret > 0 && !arch_unw_user_mode(&info)) { | 194 | if (unw_ret > 0) { |
191 | #ifdef CONFIG_STACK_UNWIND | 195 | if (call_trace == 1 && !arch_unw_user_mode(&info)) { |
192 | print_symbol("DWARF2 unwinder stuck at %s\n", | 196 | print_symbol("DWARF2 unwinder stuck at %s\n", |
193 | UNW_PC(&info)); | 197 | UNW_PC(&info)); |
194 | if (call_trace == 1) { | 198 | if (UNW_SP(&info) >= PAGE_OFFSET) { |
195 | printk("Leftover inexact backtrace:\n"); | 199 | printk("Leftover inexact backtrace:\n"); |
196 | if (UNW_SP(&info)) | ||
197 | stack = (void *)UNW_SP(&info); | 200 | stack = (void *)UNW_SP(&info); |
198 | } else if (call_trace > 1) | 201 | } else |
202 | printk("Full inexact backtrace again:\n"); | ||
203 | } else if (call_trace >= 1) | ||
199 | return; | 204 | return; |
200 | else | 205 | else |
201 | printk("Full inexact backtrace again:\n"); | 206 | printk("Full inexact backtrace again:\n"); |
202 | #else | 207 | } else |
203 | printk("Inexact backtrace:\n"); | 208 | printk("Inexact backtrace:\n"); |
204 | #endif | ||
205 | } | ||
206 | } | 209 | } |
207 | 210 | ||
208 | if (task == current) { | 211 | if (task == current) { |
@@ -454,7 +457,7 @@ void die(const char * str, struct pt_regs * regs, long err) | |||
454 | panic("Fatal exception in interrupt"); | 457 | panic("Fatal exception in interrupt"); |
455 | 458 | ||
456 | if (panic_on_oops) | 459 | if (panic_on_oops) |
457 | panic("Fatal exception: panic_on_oops"); | 460 | panic("Fatal exception"); |
458 | 461 | ||
459 | oops_exit(); | 462 | oops_exit(); |
460 | do_exit(SIGSEGV); | 463 | do_exit(SIGSEGV); |
@@ -1241,6 +1244,7 @@ static int __init kstack_setup(char *s) | |||
1241 | } | 1244 | } |
1242 | __setup("kstack=", kstack_setup); | 1245 | __setup("kstack=", kstack_setup); |
1243 | 1246 | ||
1247 | #ifdef CONFIG_STACK_UNWIND | ||
1244 | static int __init call_trace_setup(char *s) | 1248 | static int __init call_trace_setup(char *s) |
1245 | { | 1249 | { |
1246 | if (strcmp(s, "old") == 0) | 1250 | if (strcmp(s, "old") == 0) |
@@ -1254,3 +1258,4 @@ static int __init call_trace_setup(char *s) | |||
1254 | return 1; | 1258 | return 1; |
1255 | } | 1259 | } |
1256 | __setup("call_trace=", call_trace_setup); | 1260 | __setup("call_trace=", call_trace_setup); |
1261 | #endif | ||
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c index 0a362e3aeac5..1220dd828ce3 100644 --- a/arch/i386/pci/common.c +++ b/arch/i386/pci/common.c | |||
@@ -237,6 +237,11 @@ char * __devinit pcibios_setup(char *str) | |||
237 | pci_probe &= ~PCI_PROBE_MMCONF; | 237 | pci_probe &= ~PCI_PROBE_MMCONF; |
238 | return NULL; | 238 | return NULL; |
239 | } | 239 | } |
240 | /* override DMI blacklist */ | ||
241 | else if (!strcmp(str, "mmconf")) { | ||
242 | pci_probe |= PCI_PROBE_MMCONF_FORCE; | ||
243 | return NULL; | ||
244 | } | ||
240 | #endif | 245 | #endif |
241 | else if (!strcmp(str, "noacpi")) { | 246 | else if (!strcmp(str, "noacpi")) { |
242 | acpi_noirq_set(); | 247 | acpi_noirq_set(); |
diff --git a/arch/i386/pci/init.c b/arch/i386/pci/init.c index c7650a7e0b07..51087a9d9172 100644 --- a/arch/i386/pci/init.c +++ b/arch/i386/pci/init.c | |||
@@ -14,8 +14,12 @@ static __init int pci_access_init(void) | |||
14 | #ifdef CONFIG_PCI_BIOS | 14 | #ifdef CONFIG_PCI_BIOS |
15 | pci_pcbios_init(); | 15 | pci_pcbios_init(); |
16 | #endif | 16 | #endif |
17 | if (raw_pci_ops) | 17 | /* |
18 | return 0; | 18 | * don't check for raw_pci_ops here because we want pcbios as last |
19 | * fallback, yet it's needed to run first to set pcibios_last_bus | ||
20 | * in case legacy PCI probing is used. otherwise detecting peer busses | ||
21 | * fails. | ||
22 | */ | ||
19 | #ifdef CONFIG_PCI_DIRECT | 23 | #ifdef CONFIG_PCI_DIRECT |
20 | pci_direct_init(); | 24 | pci_direct_init(); |
21 | #endif | 25 | #endif |
diff --git a/arch/i386/pci/mmconfig.c b/arch/i386/pci/mmconfig.c index e545b0992c48..ef5a2faa7d82 100644 --- a/arch/i386/pci/mmconfig.c +++ b/arch/i386/pci/mmconfig.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/pci.h> | 12 | #include <linux/pci.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/acpi.h> | 14 | #include <linux/acpi.h> |
15 | #include <linux/dmi.h> | ||
15 | #include <asm/e820.h> | 16 | #include <asm/e820.h> |
16 | #include "pci.h" | 17 | #include "pci.h" |
17 | 18 | ||
@@ -178,7 +179,7 @@ static __init void unreachable_devices(void) | |||
178 | pci_exp_set_dev_base(addr, k, PCI_DEVFN(i, 0)); | 179 | pci_exp_set_dev_base(addr, k, PCI_DEVFN(i, 0)); |
179 | if (addr == 0 || | 180 | if (addr == 0 || |
180 | readl((u32 __iomem *)mmcfg_virt_addr) != val1) { | 181 | readl((u32 __iomem *)mmcfg_virt_addr) != val1) { |
181 | set_bit(i, fallback_slots); | 182 | set_bit(i + 32*k, fallback_slots); |
182 | printk(KERN_NOTICE | 183 | printk(KERN_NOTICE |
183 | "PCI: No mmconfig possible on %x:%x\n", k, i); | 184 | "PCI: No mmconfig possible on %x:%x\n", k, i); |
184 | } | 185 | } |
@@ -187,9 +188,31 @@ static __init void unreachable_devices(void) | |||
187 | } | 188 | } |
188 | } | 189 | } |
189 | 190 | ||
191 | static int disable_mcfg(struct dmi_system_id *d) | ||
192 | { | ||
193 | printk("PCI: %s detected. Disabling MCFG.\n", d->ident); | ||
194 | pci_probe &= ~PCI_PROBE_MMCONF; | ||
195 | return 0; | ||
196 | } | ||
197 | |||
198 | static struct dmi_system_id __initdata dmi_bad_mcfg[] = { | ||
199 | /* Has broken MCFG table that makes the system hang when used */ | ||
200 | { | ||
201 | .callback = disable_mcfg, | ||
202 | .ident = "Intel D3C5105 SDV", | ||
203 | .matches = { | ||
204 | DMI_MATCH(DMI_BIOS_VENDOR, "Intel"), | ||
205 | DMI_MATCH(DMI_BOARD_NAME, "D26928"), | ||
206 | }, | ||
207 | }, | ||
208 | {} | ||
209 | }; | ||
210 | |||
190 | void __init pci_mmcfg_init(void) | 211 | void __init pci_mmcfg_init(void) |
191 | { | 212 | { |
192 | if ((pci_probe & PCI_PROBE_MMCONF) == 0) | 213 | dmi_check_system(dmi_bad_mcfg); |
214 | |||
215 | if ((pci_probe & (PCI_PROBE_MMCONF_FORCE|PCI_PROBE_MMCONF)) == 0) | ||
193 | return; | 216 | return; |
194 | 217 | ||
195 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); | 218 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); |
@@ -198,15 +221,6 @@ void __init pci_mmcfg_init(void) | |||
198 | (pci_mmcfg_config[0].base_address == 0)) | 221 | (pci_mmcfg_config[0].base_address == 0)) |
199 | return; | 222 | return; |
200 | 223 | ||
201 | if (!e820_all_mapped(pci_mmcfg_config[0].base_address, | ||
202 | pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN, | ||
203 | E820_RESERVED)) { | ||
204 | printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n", | ||
205 | pci_mmcfg_config[0].base_address); | ||
206 | printk(KERN_ERR "PCI: Not using MMCONFIG.\n"); | ||
207 | return; | ||
208 | } | ||
209 | |||
210 | printk(KERN_INFO "PCI: Using MMCONFIG\n"); | 224 | printk(KERN_INFO "PCI: Using MMCONFIG\n"); |
211 | raw_pci_ops = &pci_mmcfg; | 225 | raw_pci_ops = &pci_mmcfg; |
212 | pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; | 226 | pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; |
diff --git a/arch/i386/pci/pci.h b/arch/i386/pci/pci.h index bf4e79335388..49a849b3a241 100644 --- a/arch/i386/pci/pci.h +++ b/arch/i386/pci/pci.h | |||
@@ -16,7 +16,8 @@ | |||
16 | #define PCI_PROBE_CONF1 0x0002 | 16 | #define PCI_PROBE_CONF1 0x0002 |
17 | #define PCI_PROBE_CONF2 0x0004 | 17 | #define PCI_PROBE_CONF2 0x0004 |
18 | #define PCI_PROBE_MMCONF 0x0008 | 18 | #define PCI_PROBE_MMCONF 0x0008 |
19 | #define PCI_PROBE_MASK 0x000f | 19 | #define PCI_PROBE_MMCONF_FORCE 0x0010 |
20 | #define PCI_PROBE_MASK 0x00ff | ||
20 | 21 | ||
21 | #define PCI_NO_SORT 0x0100 | 22 | #define PCI_NO_SORT 0x0100 |
22 | #define PCI_BIOS_SORT 0x0200 | 23 | #define PCI_BIOS_SORT 0x0200 |
diff --git a/arch/ia64/hp/sim/simscsi.c b/arch/ia64/hp/sim/simscsi.c index 8a4f0d0d17a3..8f0a16a79a67 100644 --- a/arch/ia64/hp/sim/simscsi.c +++ b/arch/ia64/hp/sim/simscsi.c | |||
@@ -244,7 +244,8 @@ static void simscsi_fillresult(struct scsi_cmnd *sc, char *buf, unsigned len) | |||
244 | 244 | ||
245 | if (scatterlen == 0) | 245 | if (scatterlen == 0) |
246 | memcpy(sc->request_buffer, buf, len); | 246 | memcpy(sc->request_buffer, buf, len); |
247 | else for (slp = (struct scatterlist *)sc->request_buffer; scatterlen-- > 0 && len > 0; slp++) { | 247 | else for (slp = (struct scatterlist *)sc->request_buffer; |
248 | scatterlen-- > 0 && len > 0; slp++) { | ||
248 | unsigned thislen = min(len, slp->length); | 249 | unsigned thislen = min(len, slp->length); |
249 | 250 | ||
250 | memcpy(page_address(slp->page) + slp->offset, buf, thislen); | 251 | memcpy(page_address(slp->page) + slp->offset, buf, thislen); |
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c index 99761b81db44..0176556aeecc 100644 --- a/arch/ia64/kernel/acpi.c +++ b/arch/ia64/kernel/acpi.c | |||
@@ -55,7 +55,7 @@ | |||
55 | 55 | ||
56 | #define BAD_MADT_ENTRY(entry, end) ( \ | 56 | #define BAD_MADT_ENTRY(entry, end) ( \ |
57 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | 57 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ |
58 | ((acpi_table_entry_header *)entry)->length != sizeof(*entry)) | 58 | ((acpi_table_entry_header *)entry)->length < sizeof(*entry)) |
59 | 59 | ||
60 | #define PREFIX "ACPI: " | 60 | #define PREFIX "ACPI: " |
61 | 61 | ||
diff --git a/arch/ia64/kernel/traps.c b/arch/ia64/kernel/traps.c index 5a0420464c6c..fffa9e0826bc 100644 --- a/arch/ia64/kernel/traps.c +++ b/arch/ia64/kernel/traps.c | |||
@@ -118,7 +118,7 @@ die (const char *str, struct pt_regs *regs, long err) | |||
118 | spin_unlock_irq(&die.lock); | 118 | spin_unlock_irq(&die.lock); |
119 | 119 | ||
120 | if (panic_on_oops) | 120 | if (panic_on_oops) |
121 | panic("Fatal exception: panic_on_oops"); | 121 | panic("Fatal exception"); |
122 | 122 | ||
123 | do_exit(SIGSEGV); | 123 | do_exit(SIGSEGV); |
124 | } | 124 | } |
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 13e583f16ede..abb325eb8f75 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -836,9 +836,10 @@ config MCA | |||
836 | bool | 836 | bool |
837 | 837 | ||
838 | config PCI | 838 | config PCI |
839 | bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) \ | 839 | bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \ |
840 | || MPC7448HPC2 | 840 | || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) || MPC7448HPC2 |
841 | default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx && !PPC_85xx && !PPC_86xx | 841 | default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx \ |
842 | && !PPC_85xx && !PPC_86xx | ||
842 | default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS | 843 | default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS |
843 | default PCI_QSPAN if !4xx && !CPM2 && 8xx | 844 | default PCI_QSPAN if !4xx && !CPM2 && 8xx |
844 | help | 845 | help |
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts new file mode 100644 index 000000000000..5f41c1f7a5f3 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8540ads.dts | |||
@@ -0,0 +1,257 @@ | |||
1 | /* | ||
2 | * MPC8540 ADS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8540ADS"; | ||
15 | compatible = "MPC85xxADS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8540@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
34 | bus-frequency = <0>; // 166 MHz | ||
35 | clock-frequency = <0>; // 825 MHz, from uboot | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | linux,phandle = <300>; | ||
44 | reg = <00000000 08000000>; // 128M at 0x0 | ||
45 | }; | ||
46 | |||
47 | soc8540@e0000000 { | ||
48 | #address-cells = <1>; | ||
49 | #size-cells = <1>; | ||
50 | #interrupt-cells = <2>; | ||
51 | device_type = "soc"; | ||
52 | ranges = <0 e0000000 00100000>; | ||
53 | reg = <e0000000 00100000>; // CCSRBAR 1M | ||
54 | bus-frequency = <0>; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <1b 2>; | ||
61 | interrupt-parent = <40000>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | mdio@24520 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | device_type = "mdio"; | ||
69 | compatible = "gianfar"; | ||
70 | reg = <24520 20>; | ||
71 | linux,phandle = <24520>; | ||
72 | ethernet-phy@0 { | ||
73 | linux,phandle = <2452000>; | ||
74 | interrupt-parent = <40000>; | ||
75 | interrupts = <35 1>; | ||
76 | reg = <0>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | ethernet-phy@1 { | ||
80 | linux,phandle = <2452001>; | ||
81 | interrupt-parent = <40000>; | ||
82 | interrupts = <35 1>; | ||
83 | reg = <1>; | ||
84 | device_type = "ethernet-phy"; | ||
85 | }; | ||
86 | ethernet-phy@3 { | ||
87 | linux,phandle = <2452003>; | ||
88 | interrupt-parent = <40000>; | ||
89 | interrupts = <37 1>; | ||
90 | reg = <3>; | ||
91 | device_type = "ethernet-phy"; | ||
92 | }; | ||
93 | }; | ||
94 | |||
95 | ethernet@24000 { | ||
96 | #address-cells = <1>; | ||
97 | #size-cells = <0>; | ||
98 | device_type = "network"; | ||
99 | model = "TSEC"; | ||
100 | compatible = "gianfar"; | ||
101 | reg = <24000 1000>; | ||
102 | address = [ 00 E0 0C 00 73 00 ]; | ||
103 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | ||
104 | interrupts = <d 2 e 2 12 2>; | ||
105 | interrupt-parent = <40000>; | ||
106 | phy-handle = <2452000>; | ||
107 | }; | ||
108 | |||
109 | ethernet@25000 { | ||
110 | #address-cells = <1>; | ||
111 | #size-cells = <0>; | ||
112 | device_type = "network"; | ||
113 | model = "TSEC"; | ||
114 | compatible = "gianfar"; | ||
115 | reg = <25000 1000>; | ||
116 | address = [ 00 E0 0C 00 73 01 ]; | ||
117 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | ||
118 | interrupts = <13 2 14 2 18 2>; | ||
119 | interrupt-parent = <40000>; | ||
120 | phy-handle = <2452001>; | ||
121 | }; | ||
122 | |||
123 | ethernet@26000 { | ||
124 | #address-cells = <1>; | ||
125 | #size-cells = <0>; | ||
126 | device_type = "network"; | ||
127 | model = "FEC"; | ||
128 | compatible = "gianfar"; | ||
129 | reg = <26000 1000>; | ||
130 | address = [ 00 E0 0C 00 73 02 ]; | ||
131 | local-mac-address = [ 00 E0 0C 00 73 02 ]; | ||
132 | interrupts = <19 2>; | ||
133 | interrupt-parent = <40000>; | ||
134 | phy-handle = <2452003>; | ||
135 | }; | ||
136 | |||
137 | serial@4500 { | ||
138 | device_type = "serial"; | ||
139 | compatible = "ns16550"; | ||
140 | reg = <4500 100>; // reg base, size | ||
141 | clock-frequency = <0>; // should we fill in in uboot? | ||
142 | interrupts = <1a 2>; | ||
143 | interrupt-parent = <40000>; | ||
144 | }; | ||
145 | |||
146 | serial@4600 { | ||
147 | device_type = "serial"; | ||
148 | compatible = "ns16550"; | ||
149 | reg = <4600 100>; // reg base, size | ||
150 | clock-frequency = <0>; // should we fill in in uboot? | ||
151 | interrupts = <1a 2>; | ||
152 | interrupt-parent = <40000>; | ||
153 | }; | ||
154 | pci@8000 { | ||
155 | linux,phandle = <8000>; | ||
156 | interrupt-map-mask = <f800 0 0 7>; | ||
157 | interrupt-map = < | ||
158 | |||
159 | /* IDSEL 0x02 */ | ||
160 | 1000 0 0 1 40000 31 1 | ||
161 | 1000 0 0 2 40000 32 1 | ||
162 | 1000 0 0 3 40000 33 1 | ||
163 | 1000 0 0 4 40000 34 1 | ||
164 | |||
165 | /* IDSEL 0x03 */ | ||
166 | 1800 0 0 1 40000 34 1 | ||
167 | 1800 0 0 2 40000 31 1 | ||
168 | 1800 0 0 3 40000 32 1 | ||
169 | 1800 0 0 4 40000 33 1 | ||
170 | |||
171 | /* IDSEL 0x04 */ | ||
172 | 2000 0 0 1 40000 33 1 | ||
173 | 2000 0 0 2 40000 34 1 | ||
174 | 2000 0 0 3 40000 31 1 | ||
175 | 2000 0 0 4 40000 32 1 | ||
176 | |||
177 | /* IDSEL 0x05 */ | ||
178 | 2800 0 0 1 40000 32 1 | ||
179 | 2800 0 0 2 40000 33 1 | ||
180 | 2800 0 0 3 40000 34 1 | ||
181 | 2800 0 0 4 40000 31 1 | ||
182 | |||
183 | /* IDSEL 0x0c */ | ||
184 | 6000 0 0 1 40000 31 1 | ||
185 | 6000 0 0 2 40000 32 1 | ||
186 | 6000 0 0 3 40000 33 1 | ||
187 | 6000 0 0 4 40000 34 1 | ||
188 | |||
189 | /* IDSEL 0x0d */ | ||
190 | 6800 0 0 1 40000 34 1 | ||
191 | 6800 0 0 2 40000 31 1 | ||
192 | 6800 0 0 3 40000 32 1 | ||
193 | 6800 0 0 4 40000 33 1 | ||
194 | |||
195 | /* IDSEL 0x0e */ | ||
196 | 7000 0 0 1 40000 33 1 | ||
197 | 7000 0 0 2 40000 34 1 | ||
198 | 7000 0 0 3 40000 31 1 | ||
199 | 7000 0 0 4 40000 32 1 | ||
200 | |||
201 | /* IDSEL 0x0f */ | ||
202 | 7800 0 0 1 40000 32 1 | ||
203 | 7800 0 0 2 40000 33 1 | ||
204 | 7800 0 0 3 40000 34 1 | ||
205 | 7800 0 0 4 40000 31 1 | ||
206 | |||
207 | /* IDSEL 0x12 */ | ||
208 | 9000 0 0 1 40000 31 1 | ||
209 | 9000 0 0 2 40000 32 1 | ||
210 | 9000 0 0 3 40000 33 1 | ||
211 | 9000 0 0 4 40000 34 1 | ||
212 | |||
213 | /* IDSEL 0x13 */ | ||
214 | 9800 0 0 1 40000 34 1 | ||
215 | 9800 0 0 2 40000 31 1 | ||
216 | 9800 0 0 3 40000 32 1 | ||
217 | 9800 0 0 4 40000 33 1 | ||
218 | |||
219 | /* IDSEL 0x14 */ | ||
220 | a000 0 0 1 40000 33 1 | ||
221 | a000 0 0 2 40000 34 1 | ||
222 | a000 0 0 3 40000 31 1 | ||
223 | a000 0 0 4 40000 32 1 | ||
224 | |||
225 | /* IDSEL 0x15 */ | ||
226 | a800 0 0 1 40000 32 1 | ||
227 | a800 0 0 2 40000 33 1 | ||
228 | a800 0 0 3 40000 34 1 | ||
229 | a800 0 0 4 40000 31 1>; | ||
230 | interrupt-parent = <40000>; | ||
231 | interrupts = <08 2>; | ||
232 | bus-range = <0 0>; | ||
233 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
234 | 01000000 0 00000000 e2000000 0 00100000>; | ||
235 | clock-frequency = <3f940aa>; | ||
236 | #interrupt-cells = <1>; | ||
237 | #size-cells = <2>; | ||
238 | #address-cells = <3>; | ||
239 | reg = <8000 1000>; | ||
240 | compatible = "85xx"; | ||
241 | device_type = "pci"; | ||
242 | }; | ||
243 | |||
244 | pic@40000 { | ||
245 | linux,phandle = <40000>; | ||
246 | clock-frequency = <0>; | ||
247 | interrupt-controller; | ||
248 | #address-cells = <0>; | ||
249 | #interrupt-cells = <2>; | ||
250 | reg = <40000 40000>; | ||
251 | built-in; | ||
252 | compatible = "chrp,open-pic"; | ||
253 | device_type = "open-pic"; | ||
254 | big-endian; | ||
255 | }; | ||
256 | }; | ||
257 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts new file mode 100644 index 000000000000..7be0bc659e1c --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8541cds.dts | |||
@@ -0,0 +1,244 @@ | |||
1 | /* | ||
2 | * MPC8541 CDS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8541CDS"; | ||
15 | compatible = "MPC85xxCDS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8541@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
34 | bus-frequency = <0>; // 166 MHz | ||
35 | clock-frequency = <0>; // 825 MHz, from uboot | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | linux,phandle = <300>; | ||
44 | reg = <00000000 08000000>; // 128M at 0x0 | ||
45 | }; | ||
46 | |||
47 | soc8541@e0000000 { | ||
48 | #address-cells = <1>; | ||
49 | #size-cells = <1>; | ||
50 | #interrupt-cells = <2>; | ||
51 | device_type = "soc"; | ||
52 | ranges = <0 e0000000 00100000>; | ||
53 | reg = <e0000000 00100000>; // CCSRBAR 1M | ||
54 | bus-frequency = <0>; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <1b 2>; | ||
61 | interrupt-parent = <40000>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | mdio@24520 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | device_type = "mdio"; | ||
69 | compatible = "gianfar"; | ||
70 | reg = <24520 20>; | ||
71 | linux,phandle = <24520>; | ||
72 | ethernet-phy@0 { | ||
73 | linux,phandle = <2452000>; | ||
74 | interrupt-parent = <40000>; | ||
75 | interrupts = <35 0>; | ||
76 | reg = <0>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | ethernet-phy@1 { | ||
80 | linux,phandle = <2452001>; | ||
81 | interrupt-parent = <40000>; | ||
82 | interrupts = <35 0>; | ||
83 | reg = <1>; | ||
84 | device_type = "ethernet-phy"; | ||
85 | }; | ||
86 | }; | ||
87 | |||
88 | ethernet@24000 { | ||
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
91 | device_type = "network"; | ||
92 | model = "TSEC"; | ||
93 | compatible = "gianfar"; | ||
94 | reg = <24000 1000>; | ||
95 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | ||
96 | interrupts = <d 2 e 2 12 2>; | ||
97 | interrupt-parent = <40000>; | ||
98 | phy-handle = <2452000>; | ||
99 | }; | ||
100 | |||
101 | ethernet@25000 { | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <0>; | ||
104 | device_type = "network"; | ||
105 | model = "TSEC"; | ||
106 | compatible = "gianfar"; | ||
107 | reg = <25000 1000>; | ||
108 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | ||
109 | interrupts = <13 2 14 2 18 2>; | ||
110 | interrupt-parent = <40000>; | ||
111 | phy-handle = <2452001>; | ||
112 | }; | ||
113 | |||
114 | serial@4500 { | ||
115 | device_type = "serial"; | ||
116 | compatible = "ns16550"; | ||
117 | reg = <4500 100>; // reg base, size | ||
118 | clock-frequency = <0>; // should we fill in in uboot? | ||
119 | interrupts = <1a 2>; | ||
120 | interrupt-parent = <40000>; | ||
121 | }; | ||
122 | |||
123 | serial@4600 { | ||
124 | device_type = "serial"; | ||
125 | compatible = "ns16550"; | ||
126 | reg = <4600 100>; // reg base, size | ||
127 | clock-frequency = <0>; // should we fill in in uboot? | ||
128 | interrupts = <1a 2>; | ||
129 | interrupt-parent = <40000>; | ||
130 | }; | ||
131 | |||
132 | pci@8000 { | ||
133 | linux,phandle = <8000>; | ||
134 | interrupt-map-mask = <1f800 0 0 7>; | ||
135 | interrupt-map = < | ||
136 | |||
137 | /* IDSEL 0x10 */ | ||
138 | 08000 0 0 1 40000 30 1 | ||
139 | 08000 0 0 2 40000 31 1 | ||
140 | 08000 0 0 3 40000 32 1 | ||
141 | 08000 0 0 4 40000 33 1 | ||
142 | |||
143 | /* IDSEL 0x11 */ | ||
144 | 08800 0 0 1 40000 30 1 | ||
145 | 08800 0 0 2 40000 31 1 | ||
146 | 08800 0 0 3 40000 32 1 | ||
147 | 08800 0 0 4 40000 33 1 | ||
148 | |||
149 | /* IDSEL 0x12 (Slot 1) */ | ||
150 | 09000 0 0 1 40000 30 1 | ||
151 | 09000 0 0 2 40000 31 1 | ||
152 | 09000 0 0 3 40000 32 1 | ||
153 | 09000 0 0 4 40000 33 1 | ||
154 | |||
155 | /* IDSEL 0x13 (Slot 2) */ | ||
156 | 09800 0 0 1 40000 31 1 | ||
157 | 09800 0 0 2 40000 32 1 | ||
158 | 09800 0 0 3 40000 33 1 | ||
159 | 09800 0 0 4 40000 30 1 | ||
160 | |||
161 | /* IDSEL 0x14 (Slot 3) */ | ||
162 | 0a000 0 0 1 40000 32 1 | ||
163 | 0a000 0 0 2 40000 33 1 | ||
164 | 0a000 0 0 3 40000 30 1 | ||
165 | 0a000 0 0 4 40000 31 1 | ||
166 | |||
167 | /* IDSEL 0x15 (Slot 4) */ | ||
168 | 0a800 0 0 1 40000 33 1 | ||
169 | 0a800 0 0 2 40000 30 1 | ||
170 | 0a800 0 0 3 40000 31 1 | ||
171 | 0a800 0 0 4 40000 32 1 | ||
172 | |||
173 | /* Bus 1 (Tundra Bridge) */ | ||
174 | /* IDSEL 0x12 (ISA bridge) */ | ||
175 | 19000 0 0 1 40000 30 1 | ||
176 | 19000 0 0 2 40000 31 1 | ||
177 | 19000 0 0 3 40000 32 1 | ||
178 | 19000 0 0 4 40000 33 1>; | ||
179 | interrupt-parent = <40000>; | ||
180 | interrupts = <08 2>; | ||
181 | bus-range = <0 0>; | ||
182 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
183 | 01000000 0 00000000 e2000000 0 00100000>; | ||
184 | clock-frequency = <3f940aa>; | ||
185 | #interrupt-cells = <1>; | ||
186 | #size-cells = <2>; | ||
187 | #address-cells = <3>; | ||
188 | reg = <8000 1000>; | ||
189 | compatible = "85xx"; | ||
190 | device_type = "pci"; | ||
191 | |||
192 | i8259@19000 { | ||
193 | clock-frequency = <0>; | ||
194 | interrupt-controller; | ||
195 | device_type = "interrupt-controller"; | ||
196 | reg = <19000 0 0 0 1>; | ||
197 | #address-cells = <0>; | ||
198 | #interrupt-cells = <2>; | ||
199 | built-in; | ||
200 | compatible = "chrp,iic"; | ||
201 | big-endian; | ||
202 | interrupts = <1>; | ||
203 | interrupt-parent = <8000>; | ||
204 | }; | ||
205 | }; | ||
206 | |||
207 | pci@9000 { | ||
208 | linux,phandle = <9000>; | ||
209 | interrupt-map-mask = <f800 0 0 7>; | ||
210 | interrupt-map = < | ||
211 | |||
212 | /* IDSEL 0x15 */ | ||
213 | a800 0 0 1 40000 3b 1 | ||
214 | a800 0 0 2 40000 3b 1 | ||
215 | a800 0 0 3 40000 3b 1 | ||
216 | a800 0 0 4 40000 3b 1>; | ||
217 | interrupt-parent = <40000>; | ||
218 | interrupts = <09 2>; | ||
219 | bus-range = <0 0>; | ||
220 | ranges = <02000000 0 a0000000 a0000000 0 20000000 | ||
221 | 01000000 0 00000000 e3000000 0 00100000>; | ||
222 | clock-frequency = <3f940aa>; | ||
223 | #interrupt-cells = <1>; | ||
224 | #size-cells = <2>; | ||
225 | #address-cells = <3>; | ||
226 | reg = <9000 1000>; | ||
227 | compatible = "85xx"; | ||
228 | device_type = "pci"; | ||
229 | }; | ||
230 | |||
231 | pic@40000 { | ||
232 | linux,phandle = <40000>; | ||
233 | clock-frequency = <0>; | ||
234 | interrupt-controller; | ||
235 | #address-cells = <0>; | ||
236 | #interrupt-cells = <2>; | ||
237 | reg = <40000 40000>; | ||
238 | built-in; | ||
239 | compatible = "chrp,open-pic"; | ||
240 | device_type = "open-pic"; | ||
241 | big-endian; | ||
242 | }; | ||
243 | }; | ||
244 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts new file mode 100644 index 000000000000..893d7957c174 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8548cds.dts | |||
@@ -0,0 +1,287 @@ | |||
1 | /* | ||
2 | * MPC8555 CDS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8548CDS"; | ||
15 | compatible = "MPC85xxCDS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8548@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
34 | bus-frequency = <0>; // 166 MHz | ||
35 | clock-frequency = <0>; // 825 MHz, from uboot | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | linux,phandle = <300>; | ||
44 | reg = <00000000 08000000>; // 128M at 0x0 | ||
45 | }; | ||
46 | |||
47 | soc8548@e0000000 { | ||
48 | #address-cells = <1>; | ||
49 | #size-cells = <1>; | ||
50 | #interrupt-cells = <2>; | ||
51 | device_type = "soc"; | ||
52 | ranges = <0 e0000000 00100000>; | ||
53 | reg = <e0000000 00100000>; // CCSRBAR 1M | ||
54 | bus-frequency = <0>; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <1b 2>; | ||
61 | interrupt-parent = <40000>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | mdio@24520 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | device_type = "mdio"; | ||
69 | compatible = "gianfar"; | ||
70 | reg = <24520 20>; | ||
71 | linux,phandle = <24520>; | ||
72 | ethernet-phy@0 { | ||
73 | linux,phandle = <2452000>; | ||
74 | interrupt-parent = <40000>; | ||
75 | interrupts = <35 0>; | ||
76 | reg = <0>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | ethernet-phy@1 { | ||
80 | linux,phandle = <2452001>; | ||
81 | interrupt-parent = <40000>; | ||
82 | interrupts = <35 0>; | ||
83 | reg = <1>; | ||
84 | device_type = "ethernet-phy"; | ||
85 | }; | ||
86 | |||
87 | ethernet-phy@2 { | ||
88 | linux,phandle = <2452002>; | ||
89 | interrupt-parent = <40000>; | ||
90 | interrupts = <35 0>; | ||
91 | reg = <2>; | ||
92 | device_type = "ethernet-phy"; | ||
93 | }; | ||
94 | ethernet-phy@3 { | ||
95 | linux,phandle = <2452003>; | ||
96 | interrupt-parent = <40000>; | ||
97 | interrupts = <35 0>; | ||
98 | reg = <3>; | ||
99 | device_type = "ethernet-phy"; | ||
100 | }; | ||
101 | }; | ||
102 | |||
103 | ethernet@24000 { | ||
104 | #address-cells = <1>; | ||
105 | #size-cells = <0>; | ||
106 | device_type = "network"; | ||
107 | model = "eTSEC"; | ||
108 | compatible = "gianfar"; | ||
109 | reg = <24000 1000>; | ||
110 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | ||
111 | interrupts = <d 2 e 2 12 2>; | ||
112 | interrupt-parent = <40000>; | ||
113 | phy-handle = <2452000>; | ||
114 | }; | ||
115 | |||
116 | ethernet@25000 { | ||
117 | #address-cells = <1>; | ||
118 | #size-cells = <0>; | ||
119 | device_type = "network"; | ||
120 | model = "eTSEC"; | ||
121 | compatible = "gianfar"; | ||
122 | reg = <25000 1000>; | ||
123 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | ||
124 | interrupts = <13 2 14 2 18 2>; | ||
125 | interrupt-parent = <40000>; | ||
126 | phy-handle = <2452001>; | ||
127 | }; | ||
128 | |||
129 | ethernet@26000 { | ||
130 | #address-cells = <1>; | ||
131 | #size-cells = <0>; | ||
132 | device_type = "network"; | ||
133 | model = "eTSEC"; | ||
134 | compatible = "gianfar"; | ||
135 | reg = <26000 1000>; | ||
136 | local-mac-address = [ 00 E0 0C 00 73 02 ]; | ||
137 | interrupts = <f 2 10 2 11 2>; | ||
138 | interrupt-parent = <40000>; | ||
139 | phy-handle = <2452001>; | ||
140 | }; | ||
141 | |||
142 | /* eTSEC 4 is currently broken | ||
143 | ethernet@27000 { | ||
144 | #address-cells = <1>; | ||
145 | #size-cells = <0>; | ||
146 | device_type = "network"; | ||
147 | model = "eTSEC"; | ||
148 | compatible = "gianfar"; | ||
149 | reg = <27000 1000>; | ||
150 | local-mac-address = [ 00 E0 0C 00 73 03 ]; | ||
151 | interrupts = <15 2 16 2 17 2>; | ||
152 | interrupt-parent = <40000>; | ||
153 | phy-handle = <2452001>; | ||
154 | }; | ||
155 | */ | ||
156 | |||
157 | serial@4500 { | ||
158 | device_type = "serial"; | ||
159 | compatible = "ns16550"; | ||
160 | reg = <4500 100>; // reg base, size | ||
161 | clock-frequency = <0>; // should we fill in in uboot? | ||
162 | interrupts = <1a 2>; | ||
163 | interrupt-parent = <40000>; | ||
164 | }; | ||
165 | |||
166 | serial@4600 { | ||
167 | device_type = "serial"; | ||
168 | compatible = "ns16550"; | ||
169 | reg = <4600 100>; // reg base, size | ||
170 | clock-frequency = <0>; // should we fill in in uboot? | ||
171 | interrupts = <1a 2>; | ||
172 | interrupt-parent = <40000>; | ||
173 | }; | ||
174 | |||
175 | pci@8000 { | ||
176 | linux,phandle = <8000>; | ||
177 | interrupt-map-mask = <1f800 0 0 7>; | ||
178 | interrupt-map = < | ||
179 | |||
180 | /* IDSEL 0x10 */ | ||
181 | 08000 0 0 1 40000 30 1 | ||
182 | 08000 0 0 2 40000 31 1 | ||
183 | 08000 0 0 3 40000 32 1 | ||
184 | 08000 0 0 4 40000 33 1 | ||
185 | |||
186 | /* IDSEL 0x11 */ | ||
187 | 08800 0 0 1 40000 30 1 | ||
188 | 08800 0 0 2 40000 31 1 | ||
189 | 08800 0 0 3 40000 32 1 | ||
190 | 08800 0 0 4 40000 33 1 | ||
191 | |||
192 | /* IDSEL 0x12 (Slot 1) */ | ||
193 | 09000 0 0 1 40000 30 1 | ||
194 | 09000 0 0 2 40000 31 1 | ||
195 | 09000 0 0 3 40000 32 1 | ||
196 | 09000 0 0 4 40000 33 1 | ||
197 | |||
198 | /* IDSEL 0x13 (Slot 2) */ | ||
199 | 09800 0 0 1 40000 31 1 | ||
200 | 09800 0 0 2 40000 32 1 | ||
201 | 09800 0 0 3 40000 33 1 | ||
202 | 09800 0 0 4 40000 30 1 | ||
203 | |||
204 | /* IDSEL 0x14 (Slot 3) */ | ||
205 | 0a000 0 0 1 40000 32 1 | ||
206 | 0a000 0 0 2 40000 33 1 | ||
207 | 0a000 0 0 3 40000 30 1 | ||
208 | 0a000 0 0 4 40000 31 1 | ||
209 | |||
210 | /* IDSEL 0x15 (Slot 4) */ | ||
211 | 0a800 0 0 1 40000 33 1 | ||
212 | 0a800 0 0 2 40000 30 1 | ||
213 | 0a800 0 0 3 40000 31 1 | ||
214 | 0a800 0 0 4 40000 32 1 | ||
215 | |||
216 | /* Bus 1 (Tundra Bridge) */ | ||
217 | /* IDSEL 0x12 (ISA bridge) */ | ||
218 | 19000 0 0 1 40000 30 1 | ||
219 | 19000 0 0 2 40000 31 1 | ||
220 | 19000 0 0 3 40000 32 1 | ||
221 | 19000 0 0 4 40000 33 1>; | ||
222 | interrupt-parent = <40000>; | ||
223 | interrupts = <08 2>; | ||
224 | bus-range = <0 0>; | ||
225 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
226 | 01000000 0 00000000 e2000000 0 00100000>; | ||
227 | clock-frequency = <3f940aa>; | ||
228 | #interrupt-cells = <1>; | ||
229 | #size-cells = <2>; | ||
230 | #address-cells = <3>; | ||
231 | reg = <8000 1000>; | ||
232 | compatible = "85xx"; | ||
233 | device_type = "pci"; | ||
234 | |||
235 | i8259@19000 { | ||
236 | clock-frequency = <0>; | ||
237 | interrupt-controller; | ||
238 | device_type = "interrupt-controller"; | ||
239 | reg = <19000 0 0 0 1>; | ||
240 | #address-cells = <0>; | ||
241 | #interrupt-cells = <2>; | ||
242 | built-in; | ||
243 | compatible = "chrp,iic"; | ||
244 | big-endian; | ||
245 | interrupts = <1>; | ||
246 | interrupt-parent = <8000>; | ||
247 | }; | ||
248 | }; | ||
249 | |||
250 | pci@9000 { | ||
251 | linux,phandle = <9000>; | ||
252 | interrupt-map-mask = <f800 0 0 7>; | ||
253 | interrupt-map = < | ||
254 | |||
255 | /* IDSEL 0x15 */ | ||
256 | a800 0 0 1 40000 3b 1 | ||
257 | a800 0 0 2 40000 3b 1 | ||
258 | a800 0 0 3 40000 3b 1 | ||
259 | a800 0 0 4 40000 3b 1>; | ||
260 | interrupt-parent = <40000>; | ||
261 | interrupts = <09 2>; | ||
262 | bus-range = <0 0>; | ||
263 | ranges = <02000000 0 a0000000 a0000000 0 20000000 | ||
264 | 01000000 0 00000000 e3000000 0 00100000>; | ||
265 | clock-frequency = <3f940aa>; | ||
266 | #interrupt-cells = <1>; | ||
267 | #size-cells = <2>; | ||
268 | #address-cells = <3>; | ||
269 | reg = <9000 1000>; | ||
270 | compatible = "85xx"; | ||
271 | device_type = "pci"; | ||
272 | }; | ||
273 | |||
274 | pic@40000 { | ||
275 | linux,phandle = <40000>; | ||
276 | clock-frequency = <0>; | ||
277 | interrupt-controller; | ||
278 | #address-cells = <0>; | ||
279 | #interrupt-cells = <2>; | ||
280 | reg = <40000 40000>; | ||
281 | built-in; | ||
282 | compatible = "chrp,open-pic"; | ||
283 | device_type = "open-pic"; | ||
284 | big-endian; | ||
285 | }; | ||
286 | }; | ||
287 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts new file mode 100644 index 000000000000..118f5a887651 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8555cds.dts | |||
@@ -0,0 +1,244 @@ | |||
1 | /* | ||
2 | * MPC8555 CDS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8555CDS"; | ||
15 | compatible = "MPC85xxCDS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8555@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
34 | bus-frequency = <0>; // 166 MHz | ||
35 | clock-frequency = <0>; // 825 MHz, from uboot | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | linux,phandle = <300>; | ||
44 | reg = <00000000 08000000>; // 128M at 0x0 | ||
45 | }; | ||
46 | |||
47 | soc8555@e0000000 { | ||
48 | #address-cells = <1>; | ||
49 | #size-cells = <1>; | ||
50 | #interrupt-cells = <2>; | ||
51 | device_type = "soc"; | ||
52 | ranges = <0 e0000000 00100000>; | ||
53 | reg = <e0000000 00100000>; // CCSRBAR 1M | ||
54 | bus-frequency = <0>; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <1b 2>; | ||
61 | interrupt-parent = <40000>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | mdio@24520 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | device_type = "mdio"; | ||
69 | compatible = "gianfar"; | ||
70 | reg = <24520 20>; | ||
71 | linux,phandle = <24520>; | ||
72 | ethernet-phy@0 { | ||
73 | linux,phandle = <2452000>; | ||
74 | interrupt-parent = <40000>; | ||
75 | interrupts = <35 0>; | ||
76 | reg = <0>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | ethernet-phy@1 { | ||
80 | linux,phandle = <2452001>; | ||
81 | interrupt-parent = <40000>; | ||
82 | interrupts = <35 0>; | ||
83 | reg = <1>; | ||
84 | device_type = "ethernet-phy"; | ||
85 | }; | ||
86 | }; | ||
87 | |||
88 | ethernet@24000 { | ||
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
91 | device_type = "network"; | ||
92 | model = "TSEC"; | ||
93 | compatible = "gianfar"; | ||
94 | reg = <24000 1000>; | ||
95 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | ||
96 | interrupts = <0d 2 0e 2 12 2>; | ||
97 | interrupt-parent = <40000>; | ||
98 | phy-handle = <2452000>; | ||
99 | }; | ||
100 | |||
101 | ethernet@25000 { | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <0>; | ||
104 | device_type = "network"; | ||
105 | model = "TSEC"; | ||
106 | compatible = "gianfar"; | ||
107 | reg = <25000 1000>; | ||
108 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | ||
109 | interrupts = <13 2 14 2 18 2>; | ||
110 | interrupt-parent = <40000>; | ||
111 | phy-handle = <2452001>; | ||
112 | }; | ||
113 | |||
114 | serial@4500 { | ||
115 | device_type = "serial"; | ||
116 | compatible = "ns16550"; | ||
117 | reg = <4500 100>; // reg base, size | ||
118 | clock-frequency = <0>; // should we fill in in uboot? | ||
119 | interrupts = <1a 2>; | ||
120 | interrupt-parent = <40000>; | ||
121 | }; | ||
122 | |||
123 | serial@4600 { | ||
124 | device_type = "serial"; | ||
125 | compatible = "ns16550"; | ||
126 | reg = <4600 100>; // reg base, size | ||
127 | clock-frequency = <0>; // should we fill in in uboot? | ||
128 | interrupts = <1a 2>; | ||
129 | interrupt-parent = <40000>; | ||
130 | }; | ||
131 | |||
132 | pci@8000 { | ||
133 | linux,phandle = <8000>; | ||
134 | interrupt-map-mask = <1f800 0 0 7>; | ||
135 | interrupt-map = < | ||
136 | |||
137 | /* IDSEL 0x10 */ | ||
138 | 08000 0 0 1 40000 30 1 | ||
139 | 08000 0 0 2 40000 31 1 | ||
140 | 08000 0 0 3 40000 32 1 | ||
141 | 08000 0 0 4 40000 33 1 | ||
142 | |||
143 | /* IDSEL 0x11 */ | ||
144 | 08800 0 0 1 40000 30 1 | ||
145 | 08800 0 0 2 40000 31 1 | ||
146 | 08800 0 0 3 40000 32 1 | ||
147 | 08800 0 0 4 40000 33 1 | ||
148 | |||
149 | /* IDSEL 0x12 (Slot 1) */ | ||
150 | 09000 0 0 1 40000 30 1 | ||
151 | 09000 0 0 2 40000 31 1 | ||
152 | 09000 0 0 3 40000 32 1 | ||
153 | 09000 0 0 4 40000 33 1 | ||
154 | |||
155 | /* IDSEL 0x13 (Slot 2) */ | ||
156 | 09800 0 0 1 40000 31 1 | ||
157 | 09800 0 0 2 40000 32 1 | ||
158 | 09800 0 0 3 40000 33 1 | ||
159 | 09800 0 0 4 40000 30 1 | ||
160 | |||
161 | /* IDSEL 0x14 (Slot 3) */ | ||
162 | 0a000 0 0 1 40000 32 1 | ||
163 | 0a000 0 0 2 40000 33 1 | ||
164 | 0a000 0 0 3 40000 30 1 | ||
165 | 0a000 0 0 4 40000 31 1 | ||
166 | |||
167 | /* IDSEL 0x15 (Slot 4) */ | ||
168 | 0a800 0 0 1 40000 33 1 | ||
169 | 0a800 0 0 2 40000 30 1 | ||
170 | 0a800 0 0 3 40000 31 1 | ||
171 | 0a800 0 0 4 40000 32 1 | ||
172 | |||
173 | /* Bus 1 (Tundra Bridge) */ | ||
174 | /* IDSEL 0x12 (ISA bridge) */ | ||
175 | 19000 0 0 1 40000 30 1 | ||
176 | 19000 0 0 2 40000 31 1 | ||
177 | 19000 0 0 3 40000 32 1 | ||
178 | 19000 0 0 4 40000 33 1>; | ||
179 | interrupt-parent = <40000>; | ||
180 | interrupts = <08 2>; | ||
181 | bus-range = <0 0>; | ||
182 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
183 | 01000000 0 00000000 e2000000 0 00100000>; | ||
184 | clock-frequency = <3f940aa>; | ||
185 | #interrupt-cells = <1>; | ||
186 | #size-cells = <2>; | ||
187 | #address-cells = <3>; | ||
188 | reg = <8000 1000>; | ||
189 | compatible = "85xx"; | ||
190 | device_type = "pci"; | ||
191 | |||
192 | i8259@19000 { | ||
193 | clock-frequency = <0>; | ||
194 | interrupt-controller; | ||
195 | device_type = "interrupt-controller"; | ||
196 | reg = <19000 0 0 0 1>; | ||
197 | #address-cells = <0>; | ||
198 | #interrupt-cells = <2>; | ||
199 | built-in; | ||
200 | compatible = "chrp,iic"; | ||
201 | big-endian; | ||
202 | interrupts = <1>; | ||
203 | interrupt-parent = <8000>; | ||
204 | }; | ||
205 | }; | ||
206 | |||
207 | pci@9000 { | ||
208 | linux,phandle = <9000>; | ||
209 | interrupt-map-mask = <f800 0 0 7>; | ||
210 | interrupt-map = < | ||
211 | |||
212 | /* IDSEL 0x15 */ | ||
213 | a800 0 0 1 40000 3b 1 | ||
214 | a800 0 0 2 40000 3b 1 | ||
215 | a800 0 0 3 40000 3b 1 | ||
216 | a800 0 0 4 40000 3b 1>; | ||
217 | interrupt-parent = <40000>; | ||
218 | interrupts = <09 2>; | ||
219 | bus-range = <0 0>; | ||
220 | ranges = <02000000 0 a0000000 a0000000 0 20000000 | ||
221 | 01000000 0 00000000 e3000000 0 00100000>; | ||
222 | clock-frequency = <3f940aa>; | ||
223 | #interrupt-cells = <1>; | ||
224 | #size-cells = <2>; | ||
225 | #address-cells = <3>; | ||
226 | reg = <9000 1000>; | ||
227 | compatible = "85xx"; | ||
228 | device_type = "pci"; | ||
229 | }; | ||
230 | |||
231 | pic@40000 { | ||
232 | linux,phandle = <40000>; | ||
233 | clock-frequency = <0>; | ||
234 | interrupt-controller; | ||
235 | #address-cells = <0>; | ||
236 | #interrupt-cells = <2>; | ||
237 | reg = <40000 40000>; | ||
238 | built-in; | ||
239 | compatible = "chrp,open-pic"; | ||
240 | device_type = "open-pic"; | ||
241 | big-endian; | ||
242 | }; | ||
243 | }; | ||
244 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts new file mode 100644 index 000000000000..f0c7731743ea --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts | |||
@@ -0,0 +1,339 @@ | |||
1 | /* | ||
2 | * MPC8641 HPCN Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8641HPCN"; | ||
15 | compatible = "mpc86xx"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | |||
19 | cpus { | ||
20 | #cpus = <2>; | ||
21 | #address-cells = <1>; | ||
22 | #size-cells = <0>; | ||
23 | |||
24 | PowerPC,8641@0 { | ||
25 | device_type = "cpu"; | ||
26 | reg = <0>; | ||
27 | d-cache-line-size = <20>; // 32 bytes | ||
28 | i-cache-line-size = <20>; // 32 bytes | ||
29 | d-cache-size = <8000>; // L1, 32K | ||
30 | i-cache-size = <8000>; // L1, 32K | ||
31 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
32 | bus-frequency = <0>; // From uboot | ||
33 | clock-frequency = <0>; // From uboot | ||
34 | 32-bit; | ||
35 | linux,boot-cpu; | ||
36 | }; | ||
37 | PowerPC,8641@1 { | ||
38 | device_type = "cpu"; | ||
39 | reg = <1>; | ||
40 | d-cache-line-size = <20>; // 32 bytes | ||
41 | i-cache-line-size = <20>; // 32 bytes | ||
42 | d-cache-size = <8000>; // L1, 32K | ||
43 | i-cache-size = <8000>; // L1, 32K | ||
44 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
45 | bus-frequency = <0>; // From uboot | ||
46 | clock-frequency = <0>; // From uboot | ||
47 | 32-bit; | ||
48 | }; | ||
49 | }; | ||
50 | |||
51 | memory { | ||
52 | device_type = "memory"; | ||
53 | reg = <00000000 40000000>; // 1G at 0x0 | ||
54 | }; | ||
55 | |||
56 | soc8641@f8000000 { | ||
57 | #address-cells = <1>; | ||
58 | #size-cells = <1>; | ||
59 | #interrupt-cells = <2>; | ||
60 | device_type = "soc"; | ||
61 | ranges = <0 f8000000 00100000>; | ||
62 | reg = <f8000000 00100000>; // CCSRBAR 1M | ||
63 | bus-frequency = <0>; | ||
64 | |||
65 | i2c@3000 { | ||
66 | device_type = "i2c"; | ||
67 | compatible = "fsl-i2c"; | ||
68 | reg = <3000 100>; | ||
69 | interrupts = <2b 2>; | ||
70 | interrupt-parent = <40000>; | ||
71 | dfsrr; | ||
72 | }; | ||
73 | |||
74 | i2c@3100 { | ||
75 | device_type = "i2c"; | ||
76 | compatible = "fsl-i2c"; | ||
77 | reg = <3100 100>; | ||
78 | interrupts = <2b 2>; | ||
79 | interrupt-parent = <40000>; | ||
80 | dfsrr; | ||
81 | }; | ||
82 | |||
83 | mdio@24520 { | ||
84 | #address-cells = <1>; | ||
85 | #size-cells = <0>; | ||
86 | device_type = "mdio"; | ||
87 | compatible = "gianfar"; | ||
88 | reg = <24520 20>; | ||
89 | linux,phandle = <24520>; | ||
90 | ethernet-phy@0 { | ||
91 | linux,phandle = <2452000>; | ||
92 | interrupt-parent = <40000>; | ||
93 | interrupts = <4a 1>; | ||
94 | reg = <0>; | ||
95 | device_type = "ethernet-phy"; | ||
96 | }; | ||
97 | ethernet-phy@1 { | ||
98 | linux,phandle = <2452001>; | ||
99 | interrupt-parent = <40000>; | ||
100 | interrupts = <4a 1>; | ||
101 | reg = <1>; | ||
102 | device_type = "ethernet-phy"; | ||
103 | }; | ||
104 | ethernet-phy@2 { | ||
105 | linux,phandle = <2452002>; | ||
106 | interrupt-parent = <40000>; | ||
107 | interrupts = <4a 1>; | ||
108 | reg = <2>; | ||
109 | device_type = "ethernet-phy"; | ||
110 | }; | ||
111 | ethernet-phy@3 { | ||
112 | linux,phandle = <2452003>; | ||
113 | interrupt-parent = <40000>; | ||
114 | interrupts = <4a 1>; | ||
115 | reg = <3>; | ||
116 | device_type = "ethernet-phy"; | ||
117 | }; | ||
118 | }; | ||
119 | |||
120 | ethernet@24000 { | ||
121 | #address-cells = <1>; | ||
122 | #size-cells = <0>; | ||
123 | device_type = "network"; | ||
124 | model = "TSEC"; | ||
125 | compatible = "gianfar"; | ||
126 | reg = <24000 1000>; | ||
127 | mac-address = [ 00 E0 0C 00 73 00 ]; | ||
128 | interrupts = <1d 2 1e 2 22 2>; | ||
129 | interrupt-parent = <40000>; | ||
130 | phy-handle = <2452000>; | ||
131 | }; | ||
132 | |||
133 | ethernet@25000 { | ||
134 | #address-cells = <1>; | ||
135 | #size-cells = <0>; | ||
136 | device_type = "network"; | ||
137 | model = "TSEC"; | ||
138 | compatible = "gianfar"; | ||
139 | reg = <25000 1000>; | ||
140 | mac-address = [ 00 E0 0C 00 73 01 ]; | ||
141 | interrupts = <23 2 24 2 28 2>; | ||
142 | interrupt-parent = <40000>; | ||
143 | phy-handle = <2452001>; | ||
144 | }; | ||
145 | |||
146 | ethernet@26000 { | ||
147 | #address-cells = <1>; | ||
148 | #size-cells = <0>; | ||
149 | device_type = "network"; | ||
150 | model = "TSEC"; | ||
151 | compatible = "gianfar"; | ||
152 | reg = <26000 1000>; | ||
153 | mac-address = [ 00 E0 0C 00 02 FD ]; | ||
154 | interrupts = <1F 2 20 2 21 2>; | ||
155 | interrupt-parent = <40000>; | ||
156 | phy-handle = <2452002>; | ||
157 | }; | ||
158 | |||
159 | ethernet@27000 { | ||
160 | #address-cells = <1>; | ||
161 | #size-cells = <0>; | ||
162 | device_type = "network"; | ||
163 | model = "TSEC"; | ||
164 | compatible = "gianfar"; | ||
165 | reg = <27000 1000>; | ||
166 | mac-address = [ 00 E0 0C 00 03 FD ]; | ||
167 | interrupts = <25 2 26 2 27 2>; | ||
168 | interrupt-parent = <40000>; | ||
169 | phy-handle = <2452003>; | ||
170 | }; | ||
171 | serial@4500 { | ||
172 | device_type = "serial"; | ||
173 | compatible = "ns16550"; | ||
174 | reg = <4500 100>; | ||
175 | clock-frequency = <0>; | ||
176 | interrupts = <2a 2>; | ||
177 | interrupt-parent = <40000>; | ||
178 | }; | ||
179 | |||
180 | serial@4600 { | ||
181 | device_type = "serial"; | ||
182 | compatible = "ns16550"; | ||
183 | reg = <4600 100>; | ||
184 | clock-frequency = <0>; | ||
185 | interrupts = <1c 2>; | ||
186 | interrupt-parent = <40000>; | ||
187 | }; | ||
188 | |||
189 | pci@8000 { | ||
190 | compatible = "86xx"; | ||
191 | device_type = "pci"; | ||
192 | #interrupt-cells = <1>; | ||
193 | #size-cells = <2>; | ||
194 | #address-cells = <3>; | ||
195 | reg = <8000 1000>; | ||
196 | bus-range = <0 fe>; | ||
197 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
198 | 01000000 0 00000000 e2000000 0 00100000>; | ||
199 | clock-frequency = <1fca055>; | ||
200 | interrupt-parent = <40000>; | ||
201 | interrupts = <18 2>; | ||
202 | interrupt-map-mask = <f800 0 0 7>; | ||
203 | interrupt-map = < | ||
204 | /* IDSEL 0x11 */ | ||
205 | 8800 0 0 1 4d0 3 2 | ||
206 | 8800 0 0 2 4d0 4 2 | ||
207 | 8800 0 0 3 4d0 5 2 | ||
208 | 8800 0 0 4 4d0 6 2 | ||
209 | |||
210 | /* IDSEL 0x12 */ | ||
211 | 9000 0 0 1 4d0 4 2 | ||
212 | 9000 0 0 2 4d0 5 2 | ||
213 | 9000 0 0 3 4d0 6 2 | ||
214 | 9000 0 0 4 4d0 3 2 | ||
215 | |||
216 | /* IDSEL 0x13 */ | ||
217 | 9800 0 0 1 4d0 0 0 | ||
218 | 9800 0 0 2 4d0 0 0 | ||
219 | 9800 0 0 3 4d0 0 0 | ||
220 | 9800 0 0 4 4d0 0 0 | ||
221 | |||
222 | /* IDSEL 0x14 */ | ||
223 | a000 0 0 1 4d0 0 0 | ||
224 | a000 0 0 2 4d0 0 0 | ||
225 | a000 0 0 3 4d0 0 0 | ||
226 | a000 0 0 4 4d0 0 0 | ||
227 | |||
228 | /* IDSEL 0x15 */ | ||
229 | a800 0 0 1 4d0 0 0 | ||
230 | a800 0 0 2 4d0 0 0 | ||
231 | a800 0 0 3 4d0 0 0 | ||
232 | a800 0 0 4 4d0 0 0 | ||
233 | |||
234 | /* IDSEL 0x16 */ | ||
235 | b000 0 0 1 4d0 0 0 | ||
236 | b000 0 0 2 4d0 0 0 | ||
237 | b000 0 0 3 4d0 0 0 | ||
238 | b000 0 0 4 4d0 0 0 | ||
239 | |||
240 | /* IDSEL 0x17 */ | ||
241 | b800 0 0 1 4d0 0 0 | ||
242 | b800 0 0 2 4d0 0 0 | ||
243 | b800 0 0 3 4d0 0 0 | ||
244 | b800 0 0 4 4d0 0 0 | ||
245 | |||
246 | /* IDSEL 0x18 */ | ||
247 | c000 0 0 1 4d0 0 0 | ||
248 | c000 0 0 2 4d0 0 0 | ||
249 | c000 0 0 3 4d0 0 0 | ||
250 | c000 0 0 4 4d0 0 0 | ||
251 | |||
252 | /* IDSEL 0x19 */ | ||
253 | c800 0 0 1 4d0 0 0 | ||
254 | c800 0 0 2 4d0 0 0 | ||
255 | c800 0 0 3 4d0 0 0 | ||
256 | c800 0 0 4 4d0 0 0 | ||
257 | |||
258 | /* IDSEL 0x1a */ | ||
259 | d000 0 0 1 4d0 6 2 | ||
260 | d000 0 0 2 4d0 3 2 | ||
261 | d000 0 0 3 4d0 4 2 | ||
262 | d000 0 0 4 4d0 5 2 | ||
263 | |||
264 | |||
265 | /* IDSEL 0x1b */ | ||
266 | d800 0 0 1 4d0 5 2 | ||
267 | d800 0 0 2 4d0 0 0 | ||
268 | d800 0 0 3 4d0 0 0 | ||
269 | d800 0 0 4 4d0 0 0 | ||
270 | |||
271 | /* IDSEL 0x1c */ | ||
272 | e000 0 0 1 4d0 9 2 | ||
273 | e000 0 0 2 4d0 a 2 | ||
274 | e000 0 0 3 4d0 c 2 | ||
275 | e000 0 0 4 4d0 7 2 | ||
276 | |||
277 | /* IDSEL 0x1d */ | ||
278 | e800 0 0 1 4d0 9 2 | ||
279 | e800 0 0 2 4d0 a 2 | ||
280 | e800 0 0 3 4d0 b 2 | ||
281 | e800 0 0 4 4d0 0 0 | ||
282 | |||
283 | /* IDSEL 0x1e */ | ||
284 | f000 0 0 1 4d0 c 2 | ||
285 | f000 0 0 2 4d0 0 0 | ||
286 | f000 0 0 3 4d0 0 0 | ||
287 | f000 0 0 4 4d0 0 0 | ||
288 | |||
289 | /* IDSEL 0x1f */ | ||
290 | f800 0 0 1 4d0 6 2 | ||
291 | f800 0 0 2 4d0 0 0 | ||
292 | f800 0 0 3 4d0 0 0 | ||
293 | f800 0 0 4 4d0 0 0 | ||
294 | >; | ||
295 | i8259@4d0 { | ||
296 | linux,phandle = <4d0>; | ||
297 | clock-frequency = <0>; | ||
298 | interrupt-controller; | ||
299 | device_type = "interrupt-controller"; | ||
300 | #address-cells = <0>; | ||
301 | #interrupt-cells = <2>; | ||
302 | built-in; | ||
303 | compatible = "chrp,iic"; | ||
304 | big-endian; | ||
305 | interrupts = <49 2>; | ||
306 | interrupt-parent = <40000>; | ||
307 | }; | ||
308 | |||
309 | }; | ||
310 | pic@40000 { | ||
311 | linux,phandle = <40000>; | ||
312 | clock-frequency = <0>; | ||
313 | interrupt-controller; | ||
314 | #address-cells = <0>; | ||
315 | #interrupt-cells = <2>; | ||
316 | reg = <40000 40000>; | ||
317 | built-in; | ||
318 | compatible = "chrp,open-pic"; | ||
319 | device_type = "open-pic"; | ||
320 | big-endian; | ||
321 | interrupts = < | ||
322 | 10 2 11 2 12 2 13 2 | ||
323 | 14 2 15 2 16 2 17 2 | ||
324 | 18 2 19 2 1a 2 1b 2 | ||
325 | 1c 2 1d 2 1e 2 1f 2 | ||
326 | 20 2 21 2 22 2 23 2 | ||
327 | 24 2 25 2 26 2 27 2 | ||
328 | 28 2 29 2 2a 2 2b 2 | ||
329 | 2c 2 2d 2 2e 2 2f 2 | ||
330 | 30 2 31 2 32 2 33 2 | ||
331 | 34 2 35 2 36 2 37 2 | ||
332 | 38 2 39 2 2a 2 3b 2 | ||
333 | 3c 2 3d 2 3e 2 3f 2 | ||
334 | 48 1 49 2 4a 1 | ||
335 | >; | ||
336 | interrupt-parent = <40000>; | ||
337 | }; | ||
338 | }; | ||
339 | }; | ||
diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig index a45627547d03..8c6bd17c6929 100644 --- a/arch/powerpc/configs/g5_defconfig +++ b/arch/powerpc/configs/g5_defconfig | |||
@@ -1,16 +1,18 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-rc1 | 3 | # Linux kernel version: 2.6.18-rc3 |
4 | # Wed Apr 19 13:24:37 2006 | 4 | # Tue Aug 8 09:12:29 2006 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_PPC_MERGE=y | 8 | CONFIG_PPC_MERGE=y |
9 | CONFIG_MMU=y | 9 | CONFIG_MMU=y |
10 | CONFIG_GENERIC_HARDIRQS=y | 10 | CONFIG_GENERIC_HARDIRQS=y |
11 | CONFIG_IRQ_PER_CPU=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
12 | CONFIG_GENERIC_HWEIGHT=y | 13 | CONFIG_GENERIC_HWEIGHT=y |
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 14 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
15 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
14 | CONFIG_PPC=y | 16 | CONFIG_PPC=y |
15 | CONFIG_EARLY_PRINTK=y | 17 | CONFIG_EARLY_PRINTK=y |
16 | CONFIG_COMPAT=y | 18 | CONFIG_COMPAT=y |
@@ -33,6 +35,7 @@ CONFIG_PPC_STD_MMU=y | |||
33 | CONFIG_VIRT_CPU_ACCOUNTING=y | 35 | CONFIG_VIRT_CPU_ACCOUNTING=y |
34 | CONFIG_SMP=y | 36 | CONFIG_SMP=y |
35 | CONFIG_NR_CPUS=4 | 37 | CONFIG_NR_CPUS=4 |
38 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
36 | 39 | ||
37 | # | 40 | # |
38 | # Code maturity level options | 41 | # Code maturity level options |
@@ -50,6 +53,7 @@ CONFIG_SWAP=y | |||
50 | CONFIG_SYSVIPC=y | 53 | CONFIG_SYSVIPC=y |
51 | CONFIG_POSIX_MQUEUE=y | 54 | CONFIG_POSIX_MQUEUE=y |
52 | # CONFIG_BSD_PROCESS_ACCT is not set | 55 | # CONFIG_BSD_PROCESS_ACCT is not set |
56 | # CONFIG_TASKSTATS is not set | ||
53 | CONFIG_SYSCTL=y | 57 | CONFIG_SYSCTL=y |
54 | # CONFIG_AUDIT is not set | 58 | # CONFIG_AUDIT is not set |
55 | CONFIG_IKCONFIG=y | 59 | CONFIG_IKCONFIG=y |
@@ -67,10 +71,12 @@ CONFIG_PRINTK=y | |||
67 | CONFIG_BUG=y | 71 | CONFIG_BUG=y |
68 | CONFIG_ELF_CORE=y | 72 | CONFIG_ELF_CORE=y |
69 | CONFIG_BASE_FULL=y | 73 | CONFIG_BASE_FULL=y |
74 | CONFIG_RT_MUTEXES=y | ||
70 | CONFIG_FUTEX=y | 75 | CONFIG_FUTEX=y |
71 | CONFIG_EPOLL=y | 76 | CONFIG_EPOLL=y |
72 | CONFIG_SHMEM=y | 77 | CONFIG_SHMEM=y |
73 | CONFIG_SLAB=y | 78 | CONFIG_SLAB=y |
79 | CONFIG_VM_EVENT_COUNTERS=y | ||
74 | # CONFIG_TINY_SHMEM is not set | 80 | # CONFIG_TINY_SHMEM is not set |
75 | CONFIG_BASE_SMALL=0 | 81 | CONFIG_BASE_SMALL=0 |
76 | # CONFIG_SLOB is not set | 82 | # CONFIG_SLOB is not set |
@@ -116,12 +122,16 @@ CONFIG_PPC_PMAC=y | |||
116 | CONFIG_PPC_PMAC64=y | 122 | CONFIG_PPC_PMAC64=y |
117 | # CONFIG_PPC_MAPLE is not set | 123 | # CONFIG_PPC_MAPLE is not set |
118 | # CONFIG_PPC_CELL is not set | 124 | # CONFIG_PPC_CELL is not set |
125 | # CONFIG_PPC_CELL_NATIVE is not set | ||
126 | # CONFIG_PPC_IBM_CELL_BLADE is not set | ||
127 | # CONFIG_UDBG_RTAS_CONSOLE is not set | ||
119 | CONFIG_U3_DART=y | 128 | CONFIG_U3_DART=y |
120 | CONFIG_MPIC=y | 129 | CONFIG_MPIC=y |
121 | # CONFIG_PPC_RTAS is not set | 130 | # CONFIG_PPC_RTAS is not set |
122 | # CONFIG_MMIO_NVRAM is not set | 131 | # CONFIG_MMIO_NVRAM is not set |
123 | CONFIG_MPIC_BROKEN_U3=y | 132 | CONFIG_MPIC_BROKEN_U3=y |
124 | # CONFIG_PPC_MPC106 is not set | 133 | # CONFIG_PPC_MPC106 is not set |
134 | CONFIG_PPC_970_NAP=y | ||
125 | CONFIG_CPU_FREQ=y | 135 | CONFIG_CPU_FREQ=y |
126 | CONFIG_CPU_FREQ_TABLE=y | 136 | CONFIG_CPU_FREQ_TABLE=y |
127 | # CONFIG_CPU_FREQ_DEBUG is not set | 137 | # CONFIG_CPU_FREQ_DEBUG is not set |
@@ -153,6 +163,7 @@ CONFIG_BINFMT_ELF=y | |||
153 | CONFIG_FORCE_MAX_ZONEORDER=13 | 163 | CONFIG_FORCE_MAX_ZONEORDER=13 |
154 | CONFIG_IOMMU_VMERGE=y | 164 | CONFIG_IOMMU_VMERGE=y |
155 | # CONFIG_HOTPLUG_CPU is not set | 165 | # CONFIG_HOTPLUG_CPU is not set |
166 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
156 | CONFIG_KEXEC=y | 167 | CONFIG_KEXEC=y |
157 | # CONFIG_CRASH_DUMP is not set | 168 | # CONFIG_CRASH_DUMP is not set |
158 | CONFIG_IRQ_ALL_CPUS=y | 169 | CONFIG_IRQ_ALL_CPUS=y |
@@ -168,6 +179,7 @@ CONFIG_FLATMEM=y | |||
168 | CONFIG_FLAT_NODE_MEM_MAP=y | 179 | CONFIG_FLAT_NODE_MEM_MAP=y |
169 | # CONFIG_SPARSEMEM_STATIC is not set | 180 | # CONFIG_SPARSEMEM_STATIC is not set |
170 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 181 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
182 | CONFIG_RESOURCES_64BIT=y | ||
171 | # CONFIG_PPC_64K_PAGES is not set | 183 | # CONFIG_PPC_64K_PAGES is not set |
172 | # CONFIG_SCHED_SMT is not set | 184 | # CONFIG_SCHED_SMT is not set |
173 | CONFIG_PROC_DEVICETREE=y | 185 | CONFIG_PROC_DEVICETREE=y |
@@ -184,6 +196,7 @@ CONFIG_GENERIC_ISA_DMA=y | |||
184 | # CONFIG_PPC_INDIRECT_PCI is not set | 196 | # CONFIG_PPC_INDIRECT_PCI is not set |
185 | CONFIG_PCI=y | 197 | CONFIG_PCI=y |
186 | CONFIG_PCI_DOMAINS=y | 198 | CONFIG_PCI_DOMAINS=y |
199 | # CONFIG_PCIEPORTBUS is not set | ||
187 | # CONFIG_PCI_DEBUG is not set | 200 | # CONFIG_PCI_DEBUG is not set |
188 | 201 | ||
189 | # | 202 | # |
@@ -227,6 +240,8 @@ CONFIG_INET_ESP=m | |||
227 | CONFIG_INET_IPCOMP=m | 240 | CONFIG_INET_IPCOMP=m |
228 | CONFIG_INET_XFRM_TUNNEL=m | 241 | CONFIG_INET_XFRM_TUNNEL=m |
229 | CONFIG_INET_TUNNEL=y | 242 | CONFIG_INET_TUNNEL=y |
243 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
244 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
230 | CONFIG_INET_DIAG=y | 245 | CONFIG_INET_DIAG=y |
231 | CONFIG_INET_TCP_DIAG=y | 246 | CONFIG_INET_TCP_DIAG=y |
232 | # CONFIG_TCP_CONG_ADVANCED is not set | 247 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -239,6 +254,7 @@ CONFIG_TCP_CONG_BIC=y | |||
239 | # CONFIG_IPV6 is not set | 254 | # CONFIG_IPV6 is not set |
240 | # CONFIG_INET6_XFRM_TUNNEL is not set | 255 | # CONFIG_INET6_XFRM_TUNNEL is not set |
241 | # CONFIG_INET6_TUNNEL is not set | 256 | # CONFIG_INET6_TUNNEL is not set |
257 | # CONFIG_NETWORK_SECMARK is not set | ||
242 | CONFIG_NETFILTER=y | 258 | CONFIG_NETFILTER=y |
243 | # CONFIG_NETFILTER_DEBUG is not set | 259 | # CONFIG_NETFILTER_DEBUG is not set |
244 | 260 | ||
@@ -263,6 +279,7 @@ CONFIG_IP_NF_TFTP=m | |||
263 | CONFIG_IP_NF_AMANDA=m | 279 | CONFIG_IP_NF_AMANDA=m |
264 | # CONFIG_IP_NF_PPTP is not set | 280 | # CONFIG_IP_NF_PPTP is not set |
265 | # CONFIG_IP_NF_H323 is not set | 281 | # CONFIG_IP_NF_H323 is not set |
282 | # CONFIG_IP_NF_SIP is not set | ||
266 | CONFIG_IP_NF_QUEUE=m | 283 | CONFIG_IP_NF_QUEUE=m |
267 | 284 | ||
268 | # | 285 | # |
@@ -318,6 +335,7 @@ CONFIG_STANDALONE=y | |||
318 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 335 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
319 | CONFIG_FW_LOADER=y | 336 | CONFIG_FW_LOADER=y |
320 | # CONFIG_DEBUG_DRIVER is not set | 337 | # CONFIG_DEBUG_DRIVER is not set |
338 | # CONFIG_SYS_HYPERVISOR is not set | ||
321 | 339 | ||
322 | # | 340 | # |
323 | # Connector - unified userspace <-> kernelspace linker | 341 | # Connector - unified userspace <-> kernelspace linker |
@@ -355,6 +373,7 @@ CONFIG_BLK_DEV_NBD=m | |||
355 | CONFIG_BLK_DEV_RAM=y | 373 | CONFIG_BLK_DEV_RAM=y |
356 | CONFIG_BLK_DEV_RAM_COUNT=16 | 374 | CONFIG_BLK_DEV_RAM_COUNT=16 |
357 | CONFIG_BLK_DEV_RAM_SIZE=65536 | 375 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
376 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
358 | CONFIG_BLK_DEV_INITRD=y | 377 | CONFIG_BLK_DEV_INITRD=y |
359 | CONFIG_CDROM_PKTCDVD=m | 378 | CONFIG_CDROM_PKTCDVD=m |
360 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 | 379 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 |
@@ -417,7 +436,6 @@ CONFIG_IDEDMA_PCI_AUTO=y | |||
417 | CONFIG_BLK_DEV_IDE_PMAC=y | 436 | CONFIG_BLK_DEV_IDE_PMAC=y |
418 | CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y | 437 | CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y |
419 | CONFIG_BLK_DEV_IDEDMA_PMAC=y | 438 | CONFIG_BLK_DEV_IDEDMA_PMAC=y |
420 | # CONFIG_BLK_DEV_IDE_PMAC_BLINK is not set | ||
421 | # CONFIG_IDE_ARM is not set | 439 | # CONFIG_IDE_ARM is not set |
422 | CONFIG_BLK_DEV_IDEDMA=y | 440 | CONFIG_BLK_DEV_IDEDMA=y |
423 | # CONFIG_IDEDMA_IVB is not set | 441 | # CONFIG_IDEDMA_IVB is not set |
@@ -478,6 +496,7 @@ CONFIG_SCSI_SATA_SVW=y | |||
478 | # CONFIG_SCSI_SATA_MV is not set | 496 | # CONFIG_SCSI_SATA_MV is not set |
479 | # CONFIG_SCSI_SATA_NV is not set | 497 | # CONFIG_SCSI_SATA_NV is not set |
480 | # CONFIG_SCSI_PDC_ADMA is not set | 498 | # CONFIG_SCSI_PDC_ADMA is not set |
499 | # CONFIG_SCSI_HPTIOP is not set | ||
481 | # CONFIG_SCSI_SATA_QSTOR is not set | 500 | # CONFIG_SCSI_SATA_QSTOR is not set |
482 | # CONFIG_SCSI_SATA_PROMISE is not set | 501 | # CONFIG_SCSI_SATA_PROMISE is not set |
483 | # CONFIG_SCSI_SATA_SX4 is not set | 502 | # CONFIG_SCSI_SATA_SX4 is not set |
@@ -497,7 +516,6 @@ CONFIG_SCSI_SATA_SVW=y | |||
497 | # CONFIG_SCSI_INIA100 is not set | 516 | # CONFIG_SCSI_INIA100 is not set |
498 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 517 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
499 | # CONFIG_SCSI_IPR is not set | 518 | # CONFIG_SCSI_IPR is not set |
500 | # CONFIG_SCSI_QLOGIC_FC is not set | ||
501 | # CONFIG_SCSI_QLOGIC_1280 is not set | 519 | # CONFIG_SCSI_QLOGIC_1280 is not set |
502 | # CONFIG_SCSI_QLA_FC is not set | 520 | # CONFIG_SCSI_QLA_FC is not set |
503 | # CONFIG_SCSI_LPFC is not set | 521 | # CONFIG_SCSI_LPFC is not set |
@@ -514,9 +532,7 @@ CONFIG_MD_LINEAR=y | |||
514 | CONFIG_MD_RAID0=y | 532 | CONFIG_MD_RAID0=y |
515 | CONFIG_MD_RAID1=y | 533 | CONFIG_MD_RAID1=y |
516 | CONFIG_MD_RAID10=m | 534 | CONFIG_MD_RAID10=m |
517 | CONFIG_MD_RAID5=y | 535 | # CONFIG_MD_RAID456 is not set |
518 | # CONFIG_MD_RAID5_RESHAPE is not set | ||
519 | CONFIG_MD_RAID6=m | ||
520 | CONFIG_MD_MULTIPATH=m | 536 | CONFIG_MD_MULTIPATH=m |
521 | CONFIG_MD_FAULTY=m | 537 | CONFIG_MD_FAULTY=m |
522 | CONFIG_BLK_DEV_DM=y | 538 | CONFIG_BLK_DEV_DM=y |
@@ -559,7 +575,6 @@ CONFIG_IEEE1394_OHCI1394=y | |||
559 | # | 575 | # |
560 | CONFIG_IEEE1394_VIDEO1394=m | 576 | CONFIG_IEEE1394_VIDEO1394=m |
561 | CONFIG_IEEE1394_SBP2=m | 577 | CONFIG_IEEE1394_SBP2=m |
562 | # CONFIG_IEEE1394_SBP2_PHYS_DMA is not set | ||
563 | CONFIG_IEEE1394_ETH1394=m | 578 | CONFIG_IEEE1394_ETH1394=m |
564 | CONFIG_IEEE1394_DV1394=m | 579 | CONFIG_IEEE1394_DV1394=m |
565 | CONFIG_IEEE1394_RAWIO=y | 580 | CONFIG_IEEE1394_RAWIO=y |
@@ -573,6 +588,7 @@ CONFIG_IEEE1394_RAWIO=y | |||
573 | # Macintosh device drivers | 588 | # Macintosh device drivers |
574 | # | 589 | # |
575 | CONFIG_ADB_PMU=y | 590 | CONFIG_ADB_PMU=y |
591 | # CONFIG_ADB_PMU_LED is not set | ||
576 | CONFIG_PMAC_SMU=y | 592 | CONFIG_PMAC_SMU=y |
577 | CONFIG_THERM_PM72=y | 593 | CONFIG_THERM_PM72=y |
578 | CONFIG_WINDFARM=y | 594 | CONFIG_WINDFARM=y |
@@ -643,6 +659,7 @@ CONFIG_TIGON3=y | |||
643 | # CONFIG_CHELSIO_T1 is not set | 659 | # CONFIG_CHELSIO_T1 is not set |
644 | # CONFIG_IXGB is not set | 660 | # CONFIG_IXGB is not set |
645 | # CONFIG_S2IO is not set | 661 | # CONFIG_S2IO is not set |
662 | # CONFIG_MYRI10GE is not set | ||
646 | 663 | ||
647 | # | 664 | # |
648 | # Token Ring devices | 665 | # Token Ring devices |
@@ -739,6 +756,7 @@ CONFIG_SERIO=y | |||
739 | CONFIG_VT=y | 756 | CONFIG_VT=y |
740 | CONFIG_VT_CONSOLE=y | 757 | CONFIG_VT_CONSOLE=y |
741 | CONFIG_HW_CONSOLE=y | 758 | CONFIG_HW_CONSOLE=y |
759 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
742 | # CONFIG_SERIAL_NONSTANDARD is not set | 760 | # CONFIG_SERIAL_NONSTANDARD is not set |
743 | 761 | ||
744 | # | 762 | # |
@@ -754,6 +772,7 @@ CONFIG_HW_CONSOLE=y | |||
754 | CONFIG_UNIX98_PTYS=y | 772 | CONFIG_UNIX98_PTYS=y |
755 | CONFIG_LEGACY_PTYS=y | 773 | CONFIG_LEGACY_PTYS=y |
756 | CONFIG_LEGACY_PTY_COUNT=256 | 774 | CONFIG_LEGACY_PTY_COUNT=256 |
775 | # CONFIG_BRIQ_PANEL is not set | ||
757 | 776 | ||
758 | # | 777 | # |
759 | # IPMI | 778 | # IPMI |
@@ -764,6 +783,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
764 | # Watchdog Cards | 783 | # Watchdog Cards |
765 | # | 784 | # |
766 | # CONFIG_WATCHDOG is not set | 785 | # CONFIG_WATCHDOG is not set |
786 | # CONFIG_HW_RANDOM is not set | ||
767 | CONFIG_GEN_RTC=y | 787 | CONFIG_GEN_RTC=y |
768 | # CONFIG_GEN_RTC_X is not set | 788 | # CONFIG_GEN_RTC_X is not set |
769 | # CONFIG_DTLK is not set | 789 | # CONFIG_DTLK is not set |
@@ -774,6 +794,7 @@ CONFIG_GEN_RTC=y | |||
774 | # Ftape, the floppy tape device driver | 794 | # Ftape, the floppy tape device driver |
775 | # | 795 | # |
776 | CONFIG_AGP=m | 796 | CONFIG_AGP=m |
797 | # CONFIG_AGP_SIS is not set | ||
777 | # CONFIG_AGP_VIA is not set | 798 | # CONFIG_AGP_VIA is not set |
778 | CONFIG_AGP_UNINORTH=m | 799 | CONFIG_AGP_UNINORTH=m |
779 | # CONFIG_DRM is not set | 800 | # CONFIG_DRM is not set |
@@ -813,6 +834,7 @@ CONFIG_I2C_ALGOBIT=y | |||
813 | # CONFIG_I2C_PIIX4 is not set | 834 | # CONFIG_I2C_PIIX4 is not set |
814 | CONFIG_I2C_POWERMAC=y | 835 | CONFIG_I2C_POWERMAC=y |
815 | # CONFIG_I2C_NFORCE2 is not set | 836 | # CONFIG_I2C_NFORCE2 is not set |
837 | # CONFIG_I2C_OCORES is not set | ||
816 | # CONFIG_I2C_PARPORT_LIGHT is not set | 838 | # CONFIG_I2C_PARPORT_LIGHT is not set |
817 | # CONFIG_I2C_PROSAVAGE is not set | 839 | # CONFIG_I2C_PROSAVAGE is not set |
818 | # CONFIG_I2C_SAVAGE4 is not set | 840 | # CONFIG_I2C_SAVAGE4 is not set |
@@ -849,7 +871,6 @@ CONFIG_I2C_POWERMAC=y | |||
849 | # | 871 | # |
850 | # Dallas's 1-wire bus | 872 | # Dallas's 1-wire bus |
851 | # | 873 | # |
852 | # CONFIG_W1 is not set | ||
853 | 874 | ||
854 | # | 875 | # |
855 | # Hardware Monitoring support | 876 | # Hardware Monitoring support |
@@ -865,6 +886,7 @@ CONFIG_I2C_POWERMAC=y | |||
865 | # Multimedia devices | 886 | # Multimedia devices |
866 | # | 887 | # |
867 | # CONFIG_VIDEO_DEV is not set | 888 | # CONFIG_VIDEO_DEV is not set |
889 | CONFIG_VIDEO_V4L2=y | ||
868 | 890 | ||
869 | # | 891 | # |
870 | # Digital Video Broadcasting Devices | 892 | # Digital Video Broadcasting Devices |
@@ -875,22 +897,19 @@ CONFIG_I2C_POWERMAC=y | |||
875 | # | 897 | # |
876 | # Graphics support | 898 | # Graphics support |
877 | # | 899 | # |
900 | CONFIG_FIRMWARE_EDID=y | ||
878 | CONFIG_FB=y | 901 | CONFIG_FB=y |
879 | CONFIG_FB_CFB_FILLRECT=y | 902 | CONFIG_FB_CFB_FILLRECT=y |
880 | CONFIG_FB_CFB_COPYAREA=y | 903 | CONFIG_FB_CFB_COPYAREA=y |
881 | CONFIG_FB_CFB_IMAGEBLIT=y | 904 | CONFIG_FB_CFB_IMAGEBLIT=y |
882 | CONFIG_FB_MACMODES=y | 905 | CONFIG_FB_MACMODES=y |
883 | CONFIG_FB_FIRMWARE_EDID=y | 906 | # CONFIG_FB_BACKLIGHT is not set |
884 | CONFIG_FB_MODE_HELPERS=y | 907 | CONFIG_FB_MODE_HELPERS=y |
885 | CONFIG_FB_TILEBLITTING=y | 908 | CONFIG_FB_TILEBLITTING=y |
886 | # CONFIG_FB_CIRRUS is not set | 909 | # CONFIG_FB_CIRRUS is not set |
887 | # CONFIG_FB_PM2 is not set | 910 | # CONFIG_FB_PM2 is not set |
888 | # CONFIG_FB_CYBER2000 is not set | 911 | # CONFIG_FB_CYBER2000 is not set |
889 | CONFIG_FB_OF=y | 912 | CONFIG_FB_OF=y |
890 | # CONFIG_FB_CONTROL is not set | ||
891 | # CONFIG_FB_PLATINUM is not set | ||
892 | # CONFIG_FB_VALKYRIE is not set | ||
893 | # CONFIG_FB_CT65550 is not set | ||
894 | # CONFIG_FB_ASILIANT is not set | 913 | # CONFIG_FB_ASILIANT is not set |
895 | # CONFIG_FB_IMSTT is not set | 914 | # CONFIG_FB_IMSTT is not set |
896 | # CONFIG_FB_VGA16 is not set | 915 | # CONFIG_FB_VGA16 is not set |
@@ -990,6 +1009,18 @@ CONFIG_SND_VERBOSE_PROCFS=y | |||
990 | # CONFIG_SND_CMIPCI is not set | 1009 | # CONFIG_SND_CMIPCI is not set |
991 | # CONFIG_SND_CS4281 is not set | 1010 | # CONFIG_SND_CS4281 is not set |
992 | # CONFIG_SND_CS46XX is not set | 1011 | # CONFIG_SND_CS46XX is not set |
1012 | # CONFIG_SND_DARLA20 is not set | ||
1013 | # CONFIG_SND_GINA20 is not set | ||
1014 | # CONFIG_SND_LAYLA20 is not set | ||
1015 | # CONFIG_SND_DARLA24 is not set | ||
1016 | # CONFIG_SND_GINA24 is not set | ||
1017 | # CONFIG_SND_LAYLA24 is not set | ||
1018 | # CONFIG_SND_MONA is not set | ||
1019 | # CONFIG_SND_MIA is not set | ||
1020 | # CONFIG_SND_ECHO3G is not set | ||
1021 | # CONFIG_SND_INDIGO is not set | ||
1022 | # CONFIG_SND_INDIGOIO is not set | ||
1023 | # CONFIG_SND_INDIGODJ is not set | ||
993 | # CONFIG_SND_EMU10K1 is not set | 1024 | # CONFIG_SND_EMU10K1 is not set |
994 | # CONFIG_SND_EMU10K1X is not set | 1025 | # CONFIG_SND_EMU10K1X is not set |
995 | # CONFIG_SND_ENS1370 is not set | 1026 | # CONFIG_SND_ENS1370 is not set |
@@ -1027,6 +1058,17 @@ CONFIG_SND_POWERMAC=m | |||
1027 | CONFIG_SND_POWERMAC_AUTO_DRC=y | 1058 | CONFIG_SND_POWERMAC_AUTO_DRC=y |
1028 | 1059 | ||
1029 | # | 1060 | # |
1061 | # Apple Onboard Audio driver | ||
1062 | # | ||
1063 | CONFIG_SND_AOA=m | ||
1064 | CONFIG_SND_AOA_FABRIC_LAYOUT=m | ||
1065 | CONFIG_SND_AOA_ONYX=m | ||
1066 | CONFIG_SND_AOA_TAS=m | ||
1067 | CONFIG_SND_AOA_TOONIE=m | ||
1068 | CONFIG_SND_AOA_SOUNDBUS=m | ||
1069 | CONFIG_SND_AOA_SOUNDBUS_I2S=m | ||
1070 | |||
1071 | # | ||
1030 | # USB devices | 1072 | # USB devices |
1031 | # | 1073 | # |
1032 | CONFIG_SND_USB_AUDIO=m | 1074 | CONFIG_SND_USB_AUDIO=m |
@@ -1060,6 +1102,7 @@ CONFIG_USB_DEVICEFS=y | |||
1060 | CONFIG_USB_EHCI_HCD=y | 1102 | CONFIG_USB_EHCI_HCD=y |
1061 | # CONFIG_USB_EHCI_SPLIT_ISO is not set | 1103 | # CONFIG_USB_EHCI_SPLIT_ISO is not set |
1062 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | 1104 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set |
1105 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1063 | # CONFIG_USB_ISP116X_HCD is not set | 1106 | # CONFIG_USB_ISP116X_HCD is not set |
1064 | CONFIG_USB_OHCI_HCD=y | 1107 | CONFIG_USB_OHCI_HCD=y |
1065 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | 1108 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set |
@@ -1110,9 +1153,7 @@ CONFIG_USB_HIDDEV=y | |||
1110 | # CONFIG_USB_ACECAD is not set | 1153 | # CONFIG_USB_ACECAD is not set |
1111 | # CONFIG_USB_KBTAB is not set | 1154 | # CONFIG_USB_KBTAB is not set |
1112 | # CONFIG_USB_POWERMATE is not set | 1155 | # CONFIG_USB_POWERMATE is not set |
1113 | # CONFIG_USB_MTOUCH is not set | 1156 | # CONFIG_USB_TOUCHSCREEN is not set |
1114 | # CONFIG_USB_ITMTOUCH is not set | ||
1115 | # CONFIG_USB_EGALAX is not set | ||
1116 | # CONFIG_USB_YEALINK is not set | 1157 | # CONFIG_USB_YEALINK is not set |
1117 | # CONFIG_USB_XPAD is not set | 1158 | # CONFIG_USB_XPAD is not set |
1118 | # CONFIG_USB_ATI_REMOTE is not set | 1159 | # CONFIG_USB_ATI_REMOTE is not set |
@@ -1155,6 +1196,7 @@ CONFIG_USB_SERIAL=m | |||
1155 | CONFIG_USB_SERIAL_GENERIC=y | 1196 | CONFIG_USB_SERIAL_GENERIC=y |
1156 | # CONFIG_USB_SERIAL_AIRPRIME is not set | 1197 | # CONFIG_USB_SERIAL_AIRPRIME is not set |
1157 | # CONFIG_USB_SERIAL_ANYDATA is not set | 1198 | # CONFIG_USB_SERIAL_ANYDATA is not set |
1199 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
1158 | CONFIG_USB_SERIAL_BELKIN=m | 1200 | CONFIG_USB_SERIAL_BELKIN=m |
1159 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | 1201 | # CONFIG_USB_SERIAL_WHITEHEAT is not set |
1160 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | 1202 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m |
@@ -1162,6 +1204,7 @@ CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | |||
1162 | CONFIG_USB_SERIAL_CYPRESS_M8=m | 1204 | CONFIG_USB_SERIAL_CYPRESS_M8=m |
1163 | CONFIG_USB_SERIAL_EMPEG=m | 1205 | CONFIG_USB_SERIAL_EMPEG=m |
1164 | CONFIG_USB_SERIAL_FTDI_SIO=m | 1206 | CONFIG_USB_SERIAL_FTDI_SIO=m |
1207 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
1165 | CONFIG_USB_SERIAL_VISOR=m | 1208 | CONFIG_USB_SERIAL_VISOR=m |
1166 | CONFIG_USB_SERIAL_IPAQ=m | 1209 | CONFIG_USB_SERIAL_IPAQ=m |
1167 | CONFIG_USB_SERIAL_IR=m | 1210 | CONFIG_USB_SERIAL_IR=m |
@@ -1191,9 +1234,11 @@ CONFIG_USB_SERIAL_PL2303=m | |||
1191 | # CONFIG_USB_SERIAL_HP4X is not set | 1234 | # CONFIG_USB_SERIAL_HP4X is not set |
1192 | CONFIG_USB_SERIAL_SAFE=m | 1235 | CONFIG_USB_SERIAL_SAFE=m |
1193 | CONFIG_USB_SERIAL_SAFE_PADDED=y | 1236 | CONFIG_USB_SERIAL_SAFE_PADDED=y |
1237 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
1194 | CONFIG_USB_SERIAL_TI=m | 1238 | CONFIG_USB_SERIAL_TI=m |
1195 | CONFIG_USB_SERIAL_CYBERJACK=m | 1239 | CONFIG_USB_SERIAL_CYBERJACK=m |
1196 | CONFIG_USB_SERIAL_XIRCOM=m | 1240 | CONFIG_USB_SERIAL_XIRCOM=m |
1241 | # CONFIG_USB_SERIAL_OPTION is not set | ||
1197 | CONFIG_USB_SERIAL_OMNINET=m | 1242 | CONFIG_USB_SERIAL_OMNINET=m |
1198 | CONFIG_USB_EZUSB=y | 1243 | CONFIG_USB_EZUSB=y |
1199 | 1244 | ||
@@ -1207,10 +1252,12 @@ CONFIG_USB_EZUSB=y | |||
1207 | # CONFIG_USB_LEGOTOWER is not set | 1252 | # CONFIG_USB_LEGOTOWER is not set |
1208 | # CONFIG_USB_LCD is not set | 1253 | # CONFIG_USB_LCD is not set |
1209 | # CONFIG_USB_LED is not set | 1254 | # CONFIG_USB_LED is not set |
1255 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1210 | # CONFIG_USB_CYTHERM is not set | 1256 | # CONFIG_USB_CYTHERM is not set |
1211 | # CONFIG_USB_PHIDGETKIT is not set | 1257 | # CONFIG_USB_PHIDGETKIT is not set |
1212 | # CONFIG_USB_PHIDGETSERVO is not set | 1258 | # CONFIG_USB_PHIDGETSERVO is not set |
1213 | # CONFIG_USB_IDMOUSE is not set | 1259 | # CONFIG_USB_IDMOUSE is not set |
1260 | CONFIG_USB_APPLEDISPLAY=m | ||
1214 | # CONFIG_USB_SISUSBVGA is not set | 1261 | # CONFIG_USB_SISUSBVGA is not set |
1215 | # CONFIG_USB_LD is not set | 1262 | # CONFIG_USB_LD is not set |
1216 | # CONFIG_USB_TEST is not set | 1263 | # CONFIG_USB_TEST is not set |
@@ -1235,6 +1282,14 @@ CONFIG_USB_EZUSB=y | |||
1235 | # CONFIG_NEW_LEDS is not set | 1282 | # CONFIG_NEW_LEDS is not set |
1236 | 1283 | ||
1237 | # | 1284 | # |
1285 | # LED drivers | ||
1286 | # | ||
1287 | |||
1288 | # | ||
1289 | # LED Triggers | ||
1290 | # | ||
1291 | |||
1292 | # | ||
1238 | # InfiniBand support | 1293 | # InfiniBand support |
1239 | # | 1294 | # |
1240 | # CONFIG_INFINIBAND is not set | 1295 | # CONFIG_INFINIBAND is not set |
@@ -1249,6 +1304,19 @@ CONFIG_USB_EZUSB=y | |||
1249 | # CONFIG_RTC_CLASS is not set | 1304 | # CONFIG_RTC_CLASS is not set |
1250 | 1305 | ||
1251 | # | 1306 | # |
1307 | # DMA Engine support | ||
1308 | # | ||
1309 | # CONFIG_DMA_ENGINE is not set | ||
1310 | |||
1311 | # | ||
1312 | # DMA Clients | ||
1313 | # | ||
1314 | |||
1315 | # | ||
1316 | # DMA Devices | ||
1317 | # | ||
1318 | |||
1319 | # | ||
1252 | # File systems | 1320 | # File systems |
1253 | # | 1321 | # |
1254 | CONFIG_EXT2_FS=y | 1322 | CONFIG_EXT2_FS=y |
@@ -1273,7 +1341,6 @@ CONFIG_REISERFS_FS_SECURITY=y | |||
1273 | # CONFIG_JFS_FS is not set | 1341 | # CONFIG_JFS_FS is not set |
1274 | CONFIG_FS_POSIX_ACL=y | 1342 | CONFIG_FS_POSIX_ACL=y |
1275 | CONFIG_XFS_FS=m | 1343 | CONFIG_XFS_FS=m |
1276 | CONFIG_XFS_EXPORT=y | ||
1277 | # CONFIG_XFS_QUOTA is not set | 1344 | # CONFIG_XFS_QUOTA is not set |
1278 | CONFIG_XFS_SECURITY=y | 1345 | CONFIG_XFS_SECURITY=y |
1279 | CONFIG_XFS_POSIX_ACL=y | 1346 | CONFIG_XFS_POSIX_ACL=y |
@@ -1282,6 +1349,7 @@ CONFIG_XFS_POSIX_ACL=y | |||
1282 | # CONFIG_MINIX_FS is not set | 1349 | # CONFIG_MINIX_FS is not set |
1283 | # CONFIG_ROMFS_FS is not set | 1350 | # CONFIG_ROMFS_FS is not set |
1284 | CONFIG_INOTIFY=y | 1351 | CONFIG_INOTIFY=y |
1352 | CONFIG_INOTIFY_USER=y | ||
1285 | # CONFIG_QUOTA is not set | 1353 | # CONFIG_QUOTA is not set |
1286 | CONFIG_DNOTIFY=y | 1354 | CONFIG_DNOTIFY=y |
1287 | CONFIG_AUTOFS_FS=m | 1355 | CONFIG_AUTOFS_FS=m |
@@ -1363,7 +1431,9 @@ CONFIG_RPCSEC_GSS_KRB5=y | |||
1363 | # CONFIG_SMB_FS is not set | 1431 | # CONFIG_SMB_FS is not set |
1364 | CONFIG_CIFS=m | 1432 | CONFIG_CIFS=m |
1365 | # CONFIG_CIFS_STATS is not set | 1433 | # CONFIG_CIFS_STATS is not set |
1434 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1366 | # CONFIG_CIFS_XATTR is not set | 1435 | # CONFIG_CIFS_XATTR is not set |
1436 | # CONFIG_CIFS_DEBUG2 is not set | ||
1367 | # CONFIG_CIFS_EXPERIMENTAL is not set | 1437 | # CONFIG_CIFS_EXPERIMENTAL is not set |
1368 | # CONFIG_NCP_FS is not set | 1438 | # CONFIG_NCP_FS is not set |
1369 | # CONFIG_CODA_FS is not set | 1439 | # CONFIG_CODA_FS is not set |
@@ -1444,6 +1514,9 @@ CONFIG_CRC32=y | |||
1444 | CONFIG_LIBCRC32C=m | 1514 | CONFIG_LIBCRC32C=m |
1445 | CONFIG_ZLIB_INFLATE=y | 1515 | CONFIG_ZLIB_INFLATE=y |
1446 | CONFIG_ZLIB_DEFLATE=m | 1516 | CONFIG_ZLIB_DEFLATE=m |
1517 | CONFIG_TEXTSEARCH=y | ||
1518 | CONFIG_TEXTSEARCH_KMP=m | ||
1519 | CONFIG_PLIST=y | ||
1447 | 1520 | ||
1448 | # | 1521 | # |
1449 | # Instrumentation Support | 1522 | # Instrumentation Support |
@@ -1457,14 +1530,19 @@ CONFIG_OPROFILE=y | |||
1457 | # | 1530 | # |
1458 | # CONFIG_PRINTK_TIME is not set | 1531 | # CONFIG_PRINTK_TIME is not set |
1459 | CONFIG_MAGIC_SYSRQ=y | 1532 | CONFIG_MAGIC_SYSRQ=y |
1533 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1460 | CONFIG_DEBUG_KERNEL=y | 1534 | CONFIG_DEBUG_KERNEL=y |
1461 | CONFIG_LOG_BUF_SHIFT=17 | 1535 | CONFIG_LOG_BUF_SHIFT=17 |
1462 | CONFIG_DETECT_SOFTLOCKUP=y | 1536 | CONFIG_DETECT_SOFTLOCKUP=y |
1463 | # CONFIG_SCHEDSTATS is not set | 1537 | # CONFIG_SCHEDSTATS is not set |
1464 | # CONFIG_DEBUG_SLAB is not set | 1538 | # CONFIG_DEBUG_SLAB is not set |
1465 | CONFIG_DEBUG_MUTEXES=y | 1539 | # CONFIG_DEBUG_RT_MUTEXES is not set |
1540 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1466 | # CONFIG_DEBUG_SPINLOCK is not set | 1541 | # CONFIG_DEBUG_SPINLOCK is not set |
1542 | CONFIG_DEBUG_MUTEXES=y | ||
1543 | # CONFIG_DEBUG_RWSEMS is not set | ||
1467 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1544 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
1545 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1468 | # CONFIG_DEBUG_KOBJECT is not set | 1546 | # CONFIG_DEBUG_KOBJECT is not set |
1469 | # CONFIG_DEBUG_INFO is not set | 1547 | # CONFIG_DEBUG_INFO is not set |
1470 | CONFIG_DEBUG_FS=y | 1548 | CONFIG_DEBUG_FS=y |
@@ -1476,11 +1554,7 @@ CONFIG_FORCED_INLINING=y | |||
1476 | # CONFIG_DEBUGGER is not set | 1554 | # CONFIG_DEBUGGER is not set |
1477 | CONFIG_IRQSTACKS=y | 1555 | CONFIG_IRQSTACKS=y |
1478 | CONFIG_BOOTX_TEXT=y | 1556 | CONFIG_BOOTX_TEXT=y |
1479 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | 1557 | # CONFIG_PPC_EARLY_DEBUG is not set |
1480 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
1481 | # CONFIG_PPC_EARLY_DEBUG_RTAS is not set | ||
1482 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
1483 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
1484 | 1558 | ||
1485 | # | 1559 | # |
1486 | # Security options | 1560 | # Security options |
diff --git a/arch/powerpc/configs/iseries_defconfig b/arch/powerpc/configs/iseries_defconfig index a95e455a1944..72ed95b3ead6 100644 --- a/arch/powerpc/configs/iseries_defconfig +++ b/arch/powerpc/configs/iseries_defconfig | |||
@@ -1,16 +1,18 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-rc1 | 3 | # Linux kernel version: 2.6.18-rc3 |
4 | # Wed Apr 19 11:46:44 2006 | 4 | # Tue Aug 8 09:15:46 2006 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_PPC_MERGE=y | 8 | CONFIG_PPC_MERGE=y |
9 | CONFIG_MMU=y | 9 | CONFIG_MMU=y |
10 | CONFIG_GENERIC_HARDIRQS=y | 10 | CONFIG_GENERIC_HARDIRQS=y |
11 | CONFIG_IRQ_PER_CPU=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
12 | CONFIG_GENERIC_HWEIGHT=y | 13 | CONFIG_GENERIC_HWEIGHT=y |
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 14 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
15 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
14 | CONFIG_PPC=y | 16 | CONFIG_PPC=y |
15 | CONFIG_EARLY_PRINTK=y | 17 | CONFIG_EARLY_PRINTK=y |
16 | CONFIG_COMPAT=y | 18 | CONFIG_COMPAT=y |
@@ -34,6 +36,7 @@ CONFIG_PPC_STD_MMU=y | |||
34 | CONFIG_VIRT_CPU_ACCOUNTING=y | 36 | CONFIG_VIRT_CPU_ACCOUNTING=y |
35 | CONFIG_SMP=y | 37 | CONFIG_SMP=y |
36 | CONFIG_NR_CPUS=32 | 38 | CONFIG_NR_CPUS=32 |
39 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
37 | 40 | ||
38 | # | 41 | # |
39 | # Code maturity level options | 42 | # Code maturity level options |
@@ -51,6 +54,7 @@ CONFIG_SWAP=y | |||
51 | CONFIG_SYSVIPC=y | 54 | CONFIG_SYSVIPC=y |
52 | CONFIG_POSIX_MQUEUE=y | 55 | CONFIG_POSIX_MQUEUE=y |
53 | # CONFIG_BSD_PROCESS_ACCT is not set | 56 | # CONFIG_BSD_PROCESS_ACCT is not set |
57 | # CONFIG_TASKSTATS is not set | ||
54 | CONFIG_SYSCTL=y | 58 | CONFIG_SYSCTL=y |
55 | CONFIG_AUDIT=y | 59 | CONFIG_AUDIT=y |
56 | CONFIG_AUDITSYSCALL=y | 60 | CONFIG_AUDITSYSCALL=y |
@@ -69,10 +73,12 @@ CONFIG_PRINTK=y | |||
69 | CONFIG_BUG=y | 73 | CONFIG_BUG=y |
70 | CONFIG_ELF_CORE=y | 74 | CONFIG_ELF_CORE=y |
71 | CONFIG_BASE_FULL=y | 75 | CONFIG_BASE_FULL=y |
76 | CONFIG_RT_MUTEXES=y | ||
72 | CONFIG_FUTEX=y | 77 | CONFIG_FUTEX=y |
73 | CONFIG_EPOLL=y | 78 | CONFIG_EPOLL=y |
74 | CONFIG_SHMEM=y | 79 | CONFIG_SHMEM=y |
75 | CONFIG_SLAB=y | 80 | CONFIG_SLAB=y |
81 | CONFIG_VM_EVENT_COUNTERS=y | ||
76 | # CONFIG_TINY_SHMEM is not set | 82 | # CONFIG_TINY_SHMEM is not set |
77 | CONFIG_BASE_SMALL=0 | 83 | CONFIG_BASE_SMALL=0 |
78 | # CONFIG_SLOB is not set | 84 | # CONFIG_SLOB is not set |
@@ -113,10 +119,14 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" | |||
113 | CONFIG_PPC_ISERIES=y | 119 | CONFIG_PPC_ISERIES=y |
114 | # CONFIG_EMBEDDED6xx is not set | 120 | # CONFIG_EMBEDDED6xx is not set |
115 | # CONFIG_APUS is not set | 121 | # CONFIG_APUS is not set |
122 | # CONFIG_PPC_CELL is not set | ||
123 | # CONFIG_PPC_CELL_NATIVE is not set | ||
124 | # CONFIG_UDBG_RTAS_CONSOLE is not set | ||
116 | # CONFIG_PPC_RTAS is not set | 125 | # CONFIG_PPC_RTAS is not set |
117 | # CONFIG_MMIO_NVRAM is not set | 126 | # CONFIG_MMIO_NVRAM is not set |
118 | CONFIG_IBMVIO=y | 127 | CONFIG_IBMVIO=y |
119 | # CONFIG_PPC_MPC106 is not set | 128 | # CONFIG_PPC_MPC106 is not set |
129 | # CONFIG_PPC_970_NAP is not set | ||
120 | # CONFIG_CPU_FREQ is not set | 130 | # CONFIG_CPU_FREQ is not set |
121 | # CONFIG_WANT_EARLY_SERIAL is not set | 131 | # CONFIG_WANT_EARLY_SERIAL is not set |
122 | 132 | ||
@@ -135,6 +145,7 @@ CONFIG_BINFMT_ELF=y | |||
135 | # CONFIG_BINFMT_MISC is not set | 145 | # CONFIG_BINFMT_MISC is not set |
136 | CONFIG_FORCE_MAX_ZONEORDER=13 | 146 | CONFIG_FORCE_MAX_ZONEORDER=13 |
137 | CONFIG_IOMMU_VMERGE=y | 147 | CONFIG_IOMMU_VMERGE=y |
148 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
138 | CONFIG_IRQ_ALL_CPUS=y | 149 | CONFIG_IRQ_ALL_CPUS=y |
139 | CONFIG_LPARCFG=y | 150 | CONFIG_LPARCFG=y |
140 | # CONFIG_NUMA is not set | 151 | # CONFIG_NUMA is not set |
@@ -149,6 +160,7 @@ CONFIG_FLATMEM=y | |||
149 | CONFIG_FLAT_NODE_MEM_MAP=y | 160 | CONFIG_FLAT_NODE_MEM_MAP=y |
150 | # CONFIG_SPARSEMEM_STATIC is not set | 161 | # CONFIG_SPARSEMEM_STATIC is not set |
151 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 162 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
163 | CONFIG_RESOURCES_64BIT=y | ||
152 | # CONFIG_PPC_64K_PAGES is not set | 164 | # CONFIG_PPC_64K_PAGES is not set |
153 | # CONFIG_SCHED_SMT is not set | 165 | # CONFIG_SCHED_SMT is not set |
154 | CONFIG_PROC_DEVICETREE=y | 166 | CONFIG_PROC_DEVICETREE=y |
@@ -164,6 +176,7 @@ CONFIG_GENERIC_ISA_DMA=y | |||
164 | # CONFIG_PPC_INDIRECT_PCI is not set | 176 | # CONFIG_PPC_INDIRECT_PCI is not set |
165 | CONFIG_PCI=y | 177 | CONFIG_PCI=y |
166 | CONFIG_PCI_DOMAINS=y | 178 | CONFIG_PCI_DOMAINS=y |
179 | # CONFIG_PCIEPORTBUS is not set | ||
167 | # CONFIG_PCI_DEBUG is not set | 180 | # CONFIG_PCI_DEBUG is not set |
168 | 181 | ||
169 | # | 182 | # |
@@ -207,6 +220,8 @@ CONFIG_INET_ESP=m | |||
207 | CONFIG_INET_IPCOMP=m | 220 | CONFIG_INET_IPCOMP=m |
208 | CONFIG_INET_XFRM_TUNNEL=m | 221 | CONFIG_INET_XFRM_TUNNEL=m |
209 | CONFIG_INET_TUNNEL=y | 222 | CONFIG_INET_TUNNEL=y |
223 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
224 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
210 | CONFIG_INET_DIAG=y | 225 | CONFIG_INET_DIAG=y |
211 | CONFIG_INET_TCP_DIAG=y | 226 | CONFIG_INET_TCP_DIAG=y |
212 | # CONFIG_TCP_CONG_ADVANCED is not set | 227 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -219,6 +234,7 @@ CONFIG_TCP_CONG_BIC=y | |||
219 | # CONFIG_IPV6 is not set | 234 | # CONFIG_IPV6 is not set |
220 | # CONFIG_INET6_XFRM_TUNNEL is not set | 235 | # CONFIG_INET6_XFRM_TUNNEL is not set |
221 | # CONFIG_INET6_TUNNEL is not set | 236 | # CONFIG_INET6_TUNNEL is not set |
237 | # CONFIG_NETWORK_SECMARK is not set | ||
222 | CONFIG_NETFILTER=y | 238 | CONFIG_NETFILTER=y |
223 | # CONFIG_NETFILTER_DEBUG is not set | 239 | # CONFIG_NETFILTER_DEBUG is not set |
224 | 240 | ||
@@ -246,9 +262,11 @@ CONFIG_NETFILTER_XT_MATCH_MARK=m | |||
246 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set | 262 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set |
247 | # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set | 263 | # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set |
248 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 264 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
265 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | ||
249 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 266 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
250 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 267 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
251 | CONFIG_NETFILTER_XT_MATCH_STATE=m | 268 | CONFIG_NETFILTER_XT_MATCH_STATE=m |
269 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | ||
252 | CONFIG_NETFILTER_XT_MATCH_STRING=m | 270 | CONFIG_NETFILTER_XT_MATCH_STRING=m |
253 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | 271 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m |
254 | 272 | ||
@@ -267,6 +285,7 @@ CONFIG_IP_NF_TFTP=m | |||
267 | CONFIG_IP_NF_AMANDA=m | 285 | CONFIG_IP_NF_AMANDA=m |
268 | # CONFIG_IP_NF_PPTP is not set | 286 | # CONFIG_IP_NF_PPTP is not set |
269 | # CONFIG_IP_NF_H323 is not set | 287 | # CONFIG_IP_NF_H323 is not set |
288 | # CONFIG_IP_NF_SIP is not set | ||
270 | CONFIG_IP_NF_QUEUE=m | 289 | CONFIG_IP_NF_QUEUE=m |
271 | CONFIG_IP_NF_IPTABLES=m | 290 | CONFIG_IP_NF_IPTABLES=m |
272 | CONFIG_IP_NF_MATCH_IPRANGE=m | 291 | CONFIG_IP_NF_MATCH_IPRANGE=m |
@@ -360,6 +379,7 @@ CONFIG_STANDALONE=y | |||
360 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 379 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
361 | CONFIG_FW_LOADER=m | 380 | CONFIG_FW_LOADER=m |
362 | # CONFIG_DEBUG_DRIVER is not set | 381 | # CONFIG_DEBUG_DRIVER is not set |
382 | # CONFIG_SYS_HYPERVISOR is not set | ||
363 | 383 | ||
364 | # | 384 | # |
365 | # Connector - unified userspace <-> kernelspace linker | 385 | # Connector - unified userspace <-> kernelspace linker |
@@ -396,6 +416,7 @@ CONFIG_BLK_DEV_NBD=m | |||
396 | CONFIG_BLK_DEV_RAM=y | 416 | CONFIG_BLK_DEV_RAM=y |
397 | CONFIG_BLK_DEV_RAM_COUNT=16 | 417 | CONFIG_BLK_DEV_RAM_COUNT=16 |
398 | CONFIG_BLK_DEV_RAM_SIZE=65536 | 418 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
419 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
399 | CONFIG_BLK_DEV_INITRD=y | 420 | CONFIG_BLK_DEV_INITRD=y |
400 | # CONFIG_CDROM_PKTCDVD is not set | 421 | # CONFIG_CDROM_PKTCDVD is not set |
401 | # CONFIG_ATA_OVER_ETH is not set | 422 | # CONFIG_ATA_OVER_ETH is not set |
@@ -453,6 +474,7 @@ CONFIG_SCSI_FC_ATTRS=y | |||
453 | # CONFIG_MEGARAID_LEGACY is not set | 474 | # CONFIG_MEGARAID_LEGACY is not set |
454 | # CONFIG_MEGARAID_SAS is not set | 475 | # CONFIG_MEGARAID_SAS is not set |
455 | # CONFIG_SCSI_SATA is not set | 476 | # CONFIG_SCSI_SATA is not set |
477 | # CONFIG_SCSI_HPTIOP is not set | ||
456 | # CONFIG_SCSI_BUSLOGIC is not set | 478 | # CONFIG_SCSI_BUSLOGIC is not set |
457 | # CONFIG_SCSI_DMX3191D is not set | 479 | # CONFIG_SCSI_DMX3191D is not set |
458 | # CONFIG_SCSI_EATA is not set | 480 | # CONFIG_SCSI_EATA is not set |
@@ -464,7 +486,6 @@ CONFIG_SCSI_IBMVSCSI=m | |||
464 | # CONFIG_SCSI_INIA100 is not set | 486 | # CONFIG_SCSI_INIA100 is not set |
465 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 487 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
466 | # CONFIG_SCSI_IPR is not set | 488 | # CONFIG_SCSI_IPR is not set |
467 | # CONFIG_SCSI_QLOGIC_FC is not set | ||
468 | # CONFIG_SCSI_QLOGIC_1280 is not set | 489 | # CONFIG_SCSI_QLOGIC_1280 is not set |
469 | # CONFIG_SCSI_QLA_FC is not set | 490 | # CONFIG_SCSI_QLA_FC is not set |
470 | # CONFIG_SCSI_LPFC is not set | 491 | # CONFIG_SCSI_LPFC is not set |
@@ -481,9 +502,7 @@ CONFIG_MD_LINEAR=y | |||
481 | CONFIG_MD_RAID0=y | 502 | CONFIG_MD_RAID0=y |
482 | CONFIG_MD_RAID1=y | 503 | CONFIG_MD_RAID1=y |
483 | CONFIG_MD_RAID10=m | 504 | CONFIG_MD_RAID10=m |
484 | CONFIG_MD_RAID5=y | 505 | # CONFIG_MD_RAID456 is not set |
485 | # CONFIG_MD_RAID5_RESHAPE is not set | ||
486 | CONFIG_MD_RAID6=m | ||
487 | CONFIG_MD_MULTIPATH=m | 506 | CONFIG_MD_MULTIPATH=m |
488 | CONFIG_MD_FAULTY=m | 507 | CONFIG_MD_FAULTY=m |
489 | CONFIG_BLK_DEV_DM=y | 508 | CONFIG_BLK_DEV_DM=y |
@@ -596,6 +615,7 @@ CONFIG_E1000=m | |||
596 | # CONFIG_CHELSIO_T1 is not set | 615 | # CONFIG_CHELSIO_T1 is not set |
597 | # CONFIG_IXGB is not set | 616 | # CONFIG_IXGB is not set |
598 | # CONFIG_S2IO is not set | 617 | # CONFIG_S2IO is not set |
618 | # CONFIG_MYRI10GE is not set | ||
599 | 619 | ||
600 | # | 620 | # |
601 | # Token Ring devices | 621 | # Token Ring devices |
@@ -696,6 +716,7 @@ CONFIG_SERIAL_ICOM=m | |||
696 | CONFIG_UNIX98_PTYS=y | 716 | CONFIG_UNIX98_PTYS=y |
697 | CONFIG_LEGACY_PTYS=y | 717 | CONFIG_LEGACY_PTYS=y |
698 | CONFIG_LEGACY_PTY_COUNT=256 | 718 | CONFIG_LEGACY_PTY_COUNT=256 |
719 | # CONFIG_BRIQ_PANEL is not set | ||
699 | 720 | ||
700 | # | 721 | # |
701 | # IPMI | 722 | # IPMI |
@@ -706,6 +727,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
706 | # Watchdog Cards | 727 | # Watchdog Cards |
707 | # | 728 | # |
708 | # CONFIG_WATCHDOG is not set | 729 | # CONFIG_WATCHDOG is not set |
730 | # CONFIG_HW_RANDOM is not set | ||
709 | CONFIG_GEN_RTC=y | 731 | CONFIG_GEN_RTC=y |
710 | # CONFIG_GEN_RTC_X is not set | 732 | # CONFIG_GEN_RTC_X is not set |
711 | # CONFIG_DTLK is not set | 733 | # CONFIG_DTLK is not set |
@@ -741,7 +763,6 @@ CONFIG_MAX_RAW_DEVS=256 | |||
741 | # | 763 | # |
742 | # Dallas's 1-wire bus | 764 | # Dallas's 1-wire bus |
743 | # | 765 | # |
744 | # CONFIG_W1 is not set | ||
745 | 766 | ||
746 | # | 767 | # |
747 | # Hardware Monitoring support | 768 | # Hardware Monitoring support |
@@ -757,6 +778,7 @@ CONFIG_MAX_RAW_DEVS=256 | |||
757 | # Multimedia devices | 778 | # Multimedia devices |
758 | # | 779 | # |
759 | # CONFIG_VIDEO_DEV is not set | 780 | # CONFIG_VIDEO_DEV is not set |
781 | CONFIG_VIDEO_V4L2=y | ||
760 | 782 | ||
761 | # | 783 | # |
762 | # Digital Video Broadcasting Devices | 784 | # Digital Video Broadcasting Devices |
@@ -766,7 +788,9 @@ CONFIG_MAX_RAW_DEVS=256 | |||
766 | # | 788 | # |
767 | # Graphics support | 789 | # Graphics support |
768 | # | 790 | # |
791 | CONFIG_FIRMWARE_EDID=y | ||
769 | # CONFIG_FB is not set | 792 | # CONFIG_FB is not set |
793 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
770 | 794 | ||
771 | # | 795 | # |
772 | # Sound | 796 | # Sound |
@@ -801,6 +825,14 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
801 | # CONFIG_NEW_LEDS is not set | 825 | # CONFIG_NEW_LEDS is not set |
802 | 826 | ||
803 | # | 827 | # |
828 | # LED drivers | ||
829 | # | ||
830 | |||
831 | # | ||
832 | # LED Triggers | ||
833 | # | ||
834 | |||
835 | # | ||
804 | # InfiniBand support | 836 | # InfiniBand support |
805 | # | 837 | # |
806 | # CONFIG_INFINIBAND is not set | 838 | # CONFIG_INFINIBAND is not set |
@@ -815,6 +847,19 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
815 | # CONFIG_RTC_CLASS is not set | 847 | # CONFIG_RTC_CLASS is not set |
816 | 848 | ||
817 | # | 849 | # |
850 | # DMA Engine support | ||
851 | # | ||
852 | # CONFIG_DMA_ENGINE is not set | ||
853 | |||
854 | # | ||
855 | # DMA Clients | ||
856 | # | ||
857 | |||
858 | # | ||
859 | # DMA Devices | ||
860 | # | ||
861 | |||
862 | # | ||
818 | # File systems | 863 | # File systems |
819 | # | 864 | # |
820 | CONFIG_EXT2_FS=y | 865 | CONFIG_EXT2_FS=y |
@@ -843,7 +888,6 @@ CONFIG_JFS_SECURITY=y | |||
843 | # CONFIG_JFS_STATISTICS is not set | 888 | # CONFIG_JFS_STATISTICS is not set |
844 | CONFIG_FS_POSIX_ACL=y | 889 | CONFIG_FS_POSIX_ACL=y |
845 | CONFIG_XFS_FS=m | 890 | CONFIG_XFS_FS=m |
846 | CONFIG_XFS_EXPORT=y | ||
847 | # CONFIG_XFS_QUOTA is not set | 891 | # CONFIG_XFS_QUOTA is not set |
848 | CONFIG_XFS_SECURITY=y | 892 | CONFIG_XFS_SECURITY=y |
849 | CONFIG_XFS_POSIX_ACL=y | 893 | CONFIG_XFS_POSIX_ACL=y |
@@ -852,6 +896,7 @@ CONFIG_XFS_POSIX_ACL=y | |||
852 | # CONFIG_MINIX_FS is not set | 896 | # CONFIG_MINIX_FS is not set |
853 | # CONFIG_ROMFS_FS is not set | 897 | # CONFIG_ROMFS_FS is not set |
854 | CONFIG_INOTIFY=y | 898 | CONFIG_INOTIFY=y |
899 | CONFIG_INOTIFY_USER=y | ||
855 | # CONFIG_QUOTA is not set | 900 | # CONFIG_QUOTA is not set |
856 | CONFIG_DNOTIFY=y | 901 | CONFIG_DNOTIFY=y |
857 | CONFIG_AUTOFS_FS=m | 902 | CONFIG_AUTOFS_FS=m |
@@ -933,8 +978,10 @@ CONFIG_RPCSEC_GSS_SPKM3=m | |||
933 | # CONFIG_SMB_FS is not set | 978 | # CONFIG_SMB_FS is not set |
934 | CONFIG_CIFS=m | 979 | CONFIG_CIFS=m |
935 | # CONFIG_CIFS_STATS is not set | 980 | # CONFIG_CIFS_STATS is not set |
981 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
936 | CONFIG_CIFS_XATTR=y | 982 | CONFIG_CIFS_XATTR=y |
937 | CONFIG_CIFS_POSIX=y | 983 | CONFIG_CIFS_POSIX=y |
984 | # CONFIG_CIFS_DEBUG2 is not set | ||
938 | # CONFIG_CIFS_EXPERIMENTAL is not set | 985 | # CONFIG_CIFS_EXPERIMENTAL is not set |
939 | # CONFIG_NCP_FS is not set | 986 | # CONFIG_NCP_FS is not set |
940 | # CONFIG_CODA_FS is not set | 987 | # CONFIG_CODA_FS is not set |
@@ -1013,10 +1060,12 @@ CONFIG_TEXTSEARCH=y | |||
1013 | CONFIG_TEXTSEARCH_KMP=m | 1060 | CONFIG_TEXTSEARCH_KMP=m |
1014 | CONFIG_TEXTSEARCH_BM=m | 1061 | CONFIG_TEXTSEARCH_BM=m |
1015 | CONFIG_TEXTSEARCH_FSM=m | 1062 | CONFIG_TEXTSEARCH_FSM=m |
1063 | CONFIG_PLIST=y | ||
1016 | 1064 | ||
1017 | # | 1065 | # |
1018 | # Instrumentation Support | 1066 | # Instrumentation Support |
1019 | # | 1067 | # |
1068 | # CONFIG_PROFILING is not set | ||
1020 | # CONFIG_KPROBES is not set | 1069 | # CONFIG_KPROBES is not set |
1021 | 1070 | ||
1022 | # | 1071 | # |
@@ -1024,14 +1073,19 @@ CONFIG_TEXTSEARCH_FSM=m | |||
1024 | # | 1073 | # |
1025 | # CONFIG_PRINTK_TIME is not set | 1074 | # CONFIG_PRINTK_TIME is not set |
1026 | CONFIG_MAGIC_SYSRQ=y | 1075 | CONFIG_MAGIC_SYSRQ=y |
1076 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1027 | CONFIG_DEBUG_KERNEL=y | 1077 | CONFIG_DEBUG_KERNEL=y |
1028 | CONFIG_LOG_BUF_SHIFT=17 | 1078 | CONFIG_LOG_BUF_SHIFT=17 |
1029 | CONFIG_DETECT_SOFTLOCKUP=y | 1079 | CONFIG_DETECT_SOFTLOCKUP=y |
1030 | # CONFIG_SCHEDSTATS is not set | 1080 | # CONFIG_SCHEDSTATS is not set |
1031 | # CONFIG_DEBUG_SLAB is not set | 1081 | # CONFIG_DEBUG_SLAB is not set |
1032 | # CONFIG_DEBUG_MUTEXES is not set | 1082 | # CONFIG_DEBUG_RT_MUTEXES is not set |
1083 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1033 | # CONFIG_DEBUG_SPINLOCK is not set | 1084 | # CONFIG_DEBUG_SPINLOCK is not set |
1085 | # CONFIG_DEBUG_MUTEXES is not set | ||
1086 | # CONFIG_DEBUG_RWSEMS is not set | ||
1034 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1087 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
1088 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1035 | # CONFIG_DEBUG_KOBJECT is not set | 1089 | # CONFIG_DEBUG_KOBJECT is not set |
1036 | # CONFIG_DEBUG_INFO is not set | 1090 | # CONFIG_DEBUG_INFO is not set |
1037 | CONFIG_DEBUG_FS=y | 1091 | CONFIG_DEBUG_FS=y |
@@ -1042,11 +1096,7 @@ CONFIG_DEBUG_STACKOVERFLOW=y | |||
1042 | CONFIG_DEBUG_STACK_USAGE=y | 1096 | CONFIG_DEBUG_STACK_USAGE=y |
1043 | # CONFIG_DEBUGGER is not set | 1097 | # CONFIG_DEBUGGER is not set |
1044 | CONFIG_IRQSTACKS=y | 1098 | CONFIG_IRQSTACKS=y |
1045 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | 1099 | # CONFIG_PPC_EARLY_DEBUG is not set |
1046 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
1047 | # CONFIG_PPC_EARLY_DEBUG_RTAS is not set | ||
1048 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
1049 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
1050 | 1100 | ||
1051 | # | 1101 | # |
1052 | # Security options | 1102 | # Security options |
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig index 31708ad4574e..c18e8600d78f 100644 --- a/arch/powerpc/configs/pseries_defconfig +++ b/arch/powerpc/configs/pseries_defconfig | |||
@@ -1,13 +1,14 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-rc4 | 3 | # Linux kernel version: 2.6.18-rc3 |
4 | # Sun May 28 07:26:56 2006 | 4 | # Tue Aug 8 09:14:48 2006 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_PPC_MERGE=y | 8 | CONFIG_PPC_MERGE=y |
9 | CONFIG_MMU=y | 9 | CONFIG_MMU=y |
10 | CONFIG_GENERIC_HARDIRQS=y | 10 | CONFIG_GENERIC_HARDIRQS=y |
11 | CONFIG_IRQ_PER_CPU=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
12 | CONFIG_GENERIC_HWEIGHT=y | 13 | CONFIG_GENERIC_HWEIGHT=y |
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 14 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
@@ -35,6 +36,7 @@ CONFIG_PPC_STD_MMU=y | |||
35 | CONFIG_VIRT_CPU_ACCOUNTING=y | 36 | CONFIG_VIRT_CPU_ACCOUNTING=y |
36 | CONFIG_SMP=y | 37 | CONFIG_SMP=y |
37 | CONFIG_NR_CPUS=128 | 38 | CONFIG_NR_CPUS=128 |
39 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
38 | 40 | ||
39 | # | 41 | # |
40 | # Code maturity level options | 42 | # Code maturity level options |
@@ -52,6 +54,7 @@ CONFIG_SWAP=y | |||
52 | CONFIG_SYSVIPC=y | 54 | CONFIG_SYSVIPC=y |
53 | CONFIG_POSIX_MQUEUE=y | 55 | CONFIG_POSIX_MQUEUE=y |
54 | # CONFIG_BSD_PROCESS_ACCT is not set | 56 | # CONFIG_BSD_PROCESS_ACCT is not set |
57 | # CONFIG_TASKSTATS is not set | ||
55 | CONFIG_SYSCTL=y | 58 | CONFIG_SYSCTL=y |
56 | CONFIG_AUDIT=y | 59 | CONFIG_AUDIT=y |
57 | CONFIG_AUDITSYSCALL=y | 60 | CONFIG_AUDITSYSCALL=y |
@@ -70,10 +73,12 @@ CONFIG_PRINTK=y | |||
70 | CONFIG_BUG=y | 73 | CONFIG_BUG=y |
71 | CONFIG_ELF_CORE=y | 74 | CONFIG_ELF_CORE=y |
72 | CONFIG_BASE_FULL=y | 75 | CONFIG_BASE_FULL=y |
76 | CONFIG_RT_MUTEXES=y | ||
73 | CONFIG_FUTEX=y | 77 | CONFIG_FUTEX=y |
74 | CONFIG_EPOLL=y | 78 | CONFIG_EPOLL=y |
75 | CONFIG_SHMEM=y | 79 | CONFIG_SHMEM=y |
76 | CONFIG_SLAB=y | 80 | CONFIG_SLAB=y |
81 | CONFIG_VM_EVENT_COUNTERS=y | ||
77 | # CONFIG_TINY_SHMEM is not set | 82 | # CONFIG_TINY_SHMEM is not set |
78 | CONFIG_BASE_SMALL=0 | 83 | CONFIG_BASE_SMALL=0 |
79 | # CONFIG_SLOB is not set | 84 | # CONFIG_SLOB is not set |
@@ -118,6 +123,9 @@ CONFIG_PPC_PSERIES=y | |||
118 | # CONFIG_PPC_PMAC is not set | 123 | # CONFIG_PPC_PMAC is not set |
119 | # CONFIG_PPC_MAPLE is not set | 124 | # CONFIG_PPC_MAPLE is not set |
120 | # CONFIG_PPC_CELL is not set | 125 | # CONFIG_PPC_CELL is not set |
126 | # CONFIG_PPC_CELL_NATIVE is not set | ||
127 | # CONFIG_PPC_IBM_CELL_BLADE is not set | ||
128 | # CONFIG_UDBG_RTAS_CONSOLE is not set | ||
121 | CONFIG_XICS=y | 129 | CONFIG_XICS=y |
122 | # CONFIG_U3_DART is not set | 130 | # CONFIG_U3_DART is not set |
123 | CONFIG_MPIC=y | 131 | CONFIG_MPIC=y |
@@ -149,6 +157,7 @@ CONFIG_BINFMT_MISC=m | |||
149 | CONFIG_FORCE_MAX_ZONEORDER=13 | 157 | CONFIG_FORCE_MAX_ZONEORDER=13 |
150 | CONFIG_IOMMU_VMERGE=y | 158 | CONFIG_IOMMU_VMERGE=y |
151 | CONFIG_HOTPLUG_CPU=y | 159 | CONFIG_HOTPLUG_CPU=y |
160 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
152 | CONFIG_KEXEC=y | 161 | CONFIG_KEXEC=y |
153 | # CONFIG_CRASH_DUMP is not set | 162 | # CONFIG_CRASH_DUMP is not set |
154 | CONFIG_IRQ_ALL_CPUS=y | 163 | CONFIG_IRQ_ALL_CPUS=y |
@@ -173,6 +182,7 @@ CONFIG_SPARSEMEM_EXTREME=y | |||
173 | # CONFIG_MEMORY_HOTPLUG is not set | 182 | # CONFIG_MEMORY_HOTPLUG is not set |
174 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 183 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
175 | CONFIG_MIGRATION=y | 184 | CONFIG_MIGRATION=y |
185 | CONFIG_RESOURCES_64BIT=y | ||
176 | CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y | 186 | CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y |
177 | # CONFIG_PPC_64K_PAGES is not set | 187 | # CONFIG_PPC_64K_PAGES is not set |
178 | CONFIG_SCHED_SMT=y | 188 | CONFIG_SCHED_SMT=y |
@@ -190,6 +200,7 @@ CONFIG_PPC_I8259=y | |||
190 | # CONFIG_PPC_INDIRECT_PCI is not set | 200 | # CONFIG_PPC_INDIRECT_PCI is not set |
191 | CONFIG_PCI=y | 201 | CONFIG_PCI=y |
192 | CONFIG_PCI_DOMAINS=y | 202 | CONFIG_PCI_DOMAINS=y |
203 | # CONFIG_PCIEPORTBUS is not set | ||
193 | # CONFIG_PCI_DEBUG is not set | 204 | # CONFIG_PCI_DEBUG is not set |
194 | 205 | ||
195 | # | 206 | # |
@@ -238,6 +249,8 @@ CONFIG_INET_ESP=m | |||
238 | CONFIG_INET_IPCOMP=m | 249 | CONFIG_INET_IPCOMP=m |
239 | CONFIG_INET_XFRM_TUNNEL=m | 250 | CONFIG_INET_XFRM_TUNNEL=m |
240 | CONFIG_INET_TUNNEL=y | 251 | CONFIG_INET_TUNNEL=y |
252 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
253 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
241 | CONFIG_INET_DIAG=y | 254 | CONFIG_INET_DIAG=y |
242 | CONFIG_INET_TCP_DIAG=y | 255 | CONFIG_INET_TCP_DIAG=y |
243 | # CONFIG_TCP_CONG_ADVANCED is not set | 256 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -250,6 +263,7 @@ CONFIG_TCP_CONG_BIC=y | |||
250 | # CONFIG_IPV6 is not set | 263 | # CONFIG_IPV6 is not set |
251 | # CONFIG_INET6_XFRM_TUNNEL is not set | 264 | # CONFIG_INET6_XFRM_TUNNEL is not set |
252 | # CONFIG_INET6_TUNNEL is not set | 265 | # CONFIG_INET6_TUNNEL is not set |
266 | # CONFIG_NETWORK_SECMARK is not set | ||
253 | CONFIG_NETFILTER=y | 267 | CONFIG_NETFILTER=y |
254 | # CONFIG_NETFILTER_DEBUG is not set | 268 | # CONFIG_NETFILTER_DEBUG is not set |
255 | 269 | ||
@@ -277,6 +291,7 @@ CONFIG_IP_NF_TFTP=m | |||
277 | CONFIG_IP_NF_AMANDA=m | 291 | CONFIG_IP_NF_AMANDA=m |
278 | # CONFIG_IP_NF_PPTP is not set | 292 | # CONFIG_IP_NF_PPTP is not set |
279 | # CONFIG_IP_NF_H323 is not set | 293 | # CONFIG_IP_NF_H323 is not set |
294 | # CONFIG_IP_NF_SIP is not set | ||
280 | CONFIG_IP_NF_QUEUE=m | 295 | CONFIG_IP_NF_QUEUE=m |
281 | 296 | ||
282 | # | 297 | # |
@@ -316,6 +331,7 @@ CONFIG_LLC=y | |||
316 | # Network testing | 331 | # Network testing |
317 | # | 332 | # |
318 | # CONFIG_NET_PKTGEN is not set | 333 | # CONFIG_NET_PKTGEN is not set |
334 | # CONFIG_NET_TCPPROBE is not set | ||
319 | # CONFIG_HAMRADIO is not set | 335 | # CONFIG_HAMRADIO is not set |
320 | # CONFIG_IRDA is not set | 336 | # CONFIG_IRDA is not set |
321 | # CONFIG_BT is not set | 337 | # CONFIG_BT is not set |
@@ -332,6 +348,7 @@ CONFIG_STANDALONE=y | |||
332 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 348 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
333 | CONFIG_FW_LOADER=y | 349 | CONFIG_FW_LOADER=y |
334 | # CONFIG_DEBUG_DRIVER is not set | 350 | # CONFIG_DEBUG_DRIVER is not set |
351 | # CONFIG_SYS_HYPERVISOR is not set | ||
335 | 352 | ||
336 | # | 353 | # |
337 | # Connector - unified userspace <-> kernelspace linker | 354 | # Connector - unified userspace <-> kernelspace linker |
@@ -352,6 +369,7 @@ CONFIG_PARPORT_PC=m | |||
352 | # CONFIG_PARPORT_PC_FIFO is not set | 369 | # CONFIG_PARPORT_PC_FIFO is not set |
353 | # CONFIG_PARPORT_PC_SUPERIO is not set | 370 | # CONFIG_PARPORT_PC_SUPERIO is not set |
354 | # CONFIG_PARPORT_GSC is not set | 371 | # CONFIG_PARPORT_GSC is not set |
372 | # CONFIG_PARPORT_AX88796 is not set | ||
355 | # CONFIG_PARPORT_1284 is not set | 373 | # CONFIG_PARPORT_1284 is not set |
356 | 374 | ||
357 | # | 375 | # |
@@ -376,6 +394,7 @@ CONFIG_BLK_DEV_NBD=m | |||
376 | CONFIG_BLK_DEV_RAM=y | 394 | CONFIG_BLK_DEV_RAM=y |
377 | CONFIG_BLK_DEV_RAM_COUNT=16 | 395 | CONFIG_BLK_DEV_RAM_COUNT=16 |
378 | CONFIG_BLK_DEV_RAM_SIZE=65536 | 396 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
397 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
379 | CONFIG_BLK_DEV_INITRD=y | 398 | CONFIG_BLK_DEV_INITRD=y |
380 | # CONFIG_CDROM_PKTCDVD is not set | 399 | # CONFIG_CDROM_PKTCDVD is not set |
381 | # CONFIG_ATA_OVER_ETH is not set | 400 | # CONFIG_ATA_OVER_ETH is not set |
@@ -487,6 +506,7 @@ CONFIG_SCSI_SAS_ATTRS=m | |||
487 | # CONFIG_MEGARAID_LEGACY is not set | 506 | # CONFIG_MEGARAID_LEGACY is not set |
488 | # CONFIG_MEGARAID_SAS is not set | 507 | # CONFIG_MEGARAID_SAS is not set |
489 | # CONFIG_SCSI_SATA is not set | 508 | # CONFIG_SCSI_SATA is not set |
509 | # CONFIG_SCSI_HPTIOP is not set | ||
490 | # CONFIG_SCSI_BUSLOGIC is not set | 510 | # CONFIG_SCSI_BUSLOGIC is not set |
491 | # CONFIG_SCSI_DMX3191D is not set | 511 | # CONFIG_SCSI_DMX3191D is not set |
492 | # CONFIG_SCSI_EATA is not set | 512 | # CONFIG_SCSI_EATA is not set |
@@ -508,12 +528,6 @@ CONFIG_SCSI_IPR_TRACE=y | |||
508 | CONFIG_SCSI_IPR_DUMP=y | 528 | CONFIG_SCSI_IPR_DUMP=y |
509 | # CONFIG_SCSI_QLOGIC_1280 is not set | 529 | # CONFIG_SCSI_QLOGIC_1280 is not set |
510 | CONFIG_SCSI_QLA_FC=m | 530 | CONFIG_SCSI_QLA_FC=m |
511 | CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE=y | ||
512 | CONFIG_SCSI_QLA21XX=m | ||
513 | CONFIG_SCSI_QLA22XX=m | ||
514 | CONFIG_SCSI_QLA2300=m | ||
515 | CONFIG_SCSI_QLA2322=m | ||
516 | CONFIG_SCSI_QLA24XX=m | ||
517 | CONFIG_SCSI_LPFC=m | 531 | CONFIG_SCSI_LPFC=m |
518 | # CONFIG_SCSI_DC395x is not set | 532 | # CONFIG_SCSI_DC395x is not set |
519 | # CONFIG_SCSI_DC390T is not set | 533 | # CONFIG_SCSI_DC390T is not set |
@@ -528,9 +542,7 @@ CONFIG_MD_LINEAR=y | |||
528 | CONFIG_MD_RAID0=y | 542 | CONFIG_MD_RAID0=y |
529 | CONFIG_MD_RAID1=y | 543 | CONFIG_MD_RAID1=y |
530 | CONFIG_MD_RAID10=m | 544 | CONFIG_MD_RAID10=m |
531 | CONFIG_MD_RAID5=y | 545 | # CONFIG_MD_RAID456 is not set |
532 | CONFIG_MD_RAID5_RESHAPE=y | ||
533 | CONFIG_MD_RAID6=m | ||
534 | CONFIG_MD_MULTIPATH=m | 546 | CONFIG_MD_MULTIPATH=m |
535 | CONFIG_MD_FAULTY=m | 547 | CONFIG_MD_FAULTY=m |
536 | CONFIG_BLK_DEV_DM=y | 548 | CONFIG_BLK_DEV_DM=y |
@@ -651,6 +663,7 @@ CONFIG_IXGB=m | |||
651 | # CONFIG_IXGB_NAPI is not set | 663 | # CONFIG_IXGB_NAPI is not set |
652 | CONFIG_S2IO=m | 664 | CONFIG_S2IO=m |
653 | # CONFIG_S2IO_NAPI is not set | 665 | # CONFIG_S2IO_NAPI is not set |
666 | # CONFIG_MYRI10GE is not set | ||
654 | 667 | ||
655 | # | 668 | # |
656 | # Token Ring devices | 669 | # Token Ring devices |
@@ -754,6 +767,7 @@ CONFIG_SERIO_LIBPS2=y | |||
754 | CONFIG_VT=y | 767 | CONFIG_VT=y |
755 | CONFIG_VT_CONSOLE=y | 768 | CONFIG_VT_CONSOLE=y |
756 | CONFIG_HW_CONSOLE=y | 769 | CONFIG_HW_CONSOLE=y |
770 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
757 | # CONFIG_SERIAL_NONSTANDARD is not set | 771 | # CONFIG_SERIAL_NONSTANDARD is not set |
758 | 772 | ||
759 | # | 773 | # |
@@ -776,6 +790,7 @@ CONFIG_SERIAL_JSM=m | |||
776 | CONFIG_UNIX98_PTYS=y | 790 | CONFIG_UNIX98_PTYS=y |
777 | CONFIG_LEGACY_PTYS=y | 791 | CONFIG_LEGACY_PTYS=y |
778 | CONFIG_LEGACY_PTY_COUNT=256 | 792 | CONFIG_LEGACY_PTY_COUNT=256 |
793 | # CONFIG_BRIQ_PANEL is not set | ||
779 | # CONFIG_PRINTER is not set | 794 | # CONFIG_PRINTER is not set |
780 | # CONFIG_PPDEV is not set | 795 | # CONFIG_PPDEV is not set |
781 | # CONFIG_TIPAR is not set | 796 | # CONFIG_TIPAR is not set |
@@ -793,6 +808,7 @@ CONFIG_HVCS=m | |||
793 | # Watchdog Cards | 808 | # Watchdog Cards |
794 | # | 809 | # |
795 | # CONFIG_WATCHDOG is not set | 810 | # CONFIG_WATCHDOG is not set |
811 | # CONFIG_HW_RANDOM is not set | ||
796 | CONFIG_GEN_RTC=y | 812 | CONFIG_GEN_RTC=y |
797 | # CONFIG_GEN_RTC_X is not set | 813 | # CONFIG_GEN_RTC_X is not set |
798 | # CONFIG_DTLK is not set | 814 | # CONFIG_DTLK is not set |
@@ -839,6 +855,7 @@ CONFIG_I2C_ALGOBIT=y | |||
839 | # CONFIG_I2C_I810 is not set | 855 | # CONFIG_I2C_I810 is not set |
840 | # CONFIG_I2C_PIIX4 is not set | 856 | # CONFIG_I2C_PIIX4 is not set |
841 | # CONFIG_I2C_NFORCE2 is not set | 857 | # CONFIG_I2C_NFORCE2 is not set |
858 | # CONFIG_I2C_OCORES is not set | ||
842 | # CONFIG_I2C_PARPORT is not set | 859 | # CONFIG_I2C_PARPORT is not set |
843 | # CONFIG_I2C_PARPORT_LIGHT is not set | 860 | # CONFIG_I2C_PARPORT_LIGHT is not set |
844 | # CONFIG_I2C_PROSAVAGE is not set | 861 | # CONFIG_I2C_PROSAVAGE is not set |
@@ -876,7 +893,6 @@ CONFIG_I2C_ALGOBIT=y | |||
876 | # | 893 | # |
877 | # Dallas's 1-wire bus | 894 | # Dallas's 1-wire bus |
878 | # | 895 | # |
879 | # CONFIG_W1 is not set | ||
880 | 896 | ||
881 | # | 897 | # |
882 | # Hardware Monitoring support | 898 | # Hardware Monitoring support |
@@ -892,6 +908,7 @@ CONFIG_I2C_ALGOBIT=y | |||
892 | # Multimedia devices | 908 | # Multimedia devices |
893 | # | 909 | # |
894 | # CONFIG_VIDEO_DEV is not set | 910 | # CONFIG_VIDEO_DEV is not set |
911 | CONFIG_VIDEO_V4L2=y | ||
895 | 912 | ||
896 | # | 913 | # |
897 | # Digital Video Broadcasting Devices | 914 | # Digital Video Broadcasting Devices |
@@ -902,19 +919,19 @@ CONFIG_I2C_ALGOBIT=y | |||
902 | # | 919 | # |
903 | # Graphics support | 920 | # Graphics support |
904 | # | 921 | # |
922 | CONFIG_FIRMWARE_EDID=y | ||
905 | CONFIG_FB=y | 923 | CONFIG_FB=y |
906 | CONFIG_FB_CFB_FILLRECT=y | 924 | CONFIG_FB_CFB_FILLRECT=y |
907 | CONFIG_FB_CFB_COPYAREA=y | 925 | CONFIG_FB_CFB_COPYAREA=y |
908 | CONFIG_FB_CFB_IMAGEBLIT=y | 926 | CONFIG_FB_CFB_IMAGEBLIT=y |
909 | CONFIG_FB_MACMODES=y | 927 | CONFIG_FB_MACMODES=y |
910 | CONFIG_FB_FIRMWARE_EDID=y | 928 | # CONFIG_FB_BACKLIGHT is not set |
911 | CONFIG_FB_MODE_HELPERS=y | 929 | CONFIG_FB_MODE_HELPERS=y |
912 | CONFIG_FB_TILEBLITTING=y | 930 | CONFIG_FB_TILEBLITTING=y |
913 | # CONFIG_FB_CIRRUS is not set | 931 | # CONFIG_FB_CIRRUS is not set |
914 | # CONFIG_FB_PM2 is not set | 932 | # CONFIG_FB_PM2 is not set |
915 | # CONFIG_FB_CYBER2000 is not set | 933 | # CONFIG_FB_CYBER2000 is not set |
916 | CONFIG_FB_OF=y | 934 | CONFIG_FB_OF=y |
917 | # CONFIG_FB_CT65550 is not set | ||
918 | # CONFIG_FB_ASILIANT is not set | 935 | # CONFIG_FB_ASILIANT is not set |
919 | # CONFIG_FB_IMSTT is not set | 936 | # CONFIG_FB_IMSTT is not set |
920 | # CONFIG_FB_VGA16 is not set | 937 | # CONFIG_FB_VGA16 is not set |
@@ -993,6 +1010,7 @@ CONFIG_USB_DEVICEFS=y | |||
993 | CONFIG_USB_EHCI_HCD=y | 1010 | CONFIG_USB_EHCI_HCD=y |
994 | # CONFIG_USB_EHCI_SPLIT_ISO is not set | 1011 | # CONFIG_USB_EHCI_SPLIT_ISO is not set |
995 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | 1012 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set |
1013 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
996 | # CONFIG_USB_ISP116X_HCD is not set | 1014 | # CONFIG_USB_ISP116X_HCD is not set |
997 | CONFIG_USB_OHCI_HCD=y | 1015 | CONFIG_USB_OHCI_HCD=y |
998 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | 1016 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set |
@@ -1083,10 +1101,12 @@ CONFIG_USB_MON=y | |||
1083 | # CONFIG_USB_LEGOTOWER is not set | 1101 | # CONFIG_USB_LEGOTOWER is not set |
1084 | # CONFIG_USB_LCD is not set | 1102 | # CONFIG_USB_LCD is not set |
1085 | # CONFIG_USB_LED is not set | 1103 | # CONFIG_USB_LED is not set |
1104 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1086 | # CONFIG_USB_CYTHERM is not set | 1105 | # CONFIG_USB_CYTHERM is not set |
1087 | # CONFIG_USB_PHIDGETKIT is not set | 1106 | # CONFIG_USB_PHIDGETKIT is not set |
1088 | # CONFIG_USB_PHIDGETSERVO is not set | 1107 | # CONFIG_USB_PHIDGETSERVO is not set |
1089 | # CONFIG_USB_IDMOUSE is not set | 1108 | # CONFIG_USB_IDMOUSE is not set |
1109 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1090 | # CONFIG_USB_SISUSBVGA is not set | 1110 | # CONFIG_USB_SISUSBVGA is not set |
1091 | # CONFIG_USB_LD is not set | 1111 | # CONFIG_USB_LD is not set |
1092 | # CONFIG_USB_TEST is not set | 1112 | # CONFIG_USB_TEST is not set |
@@ -1124,12 +1144,14 @@ CONFIG_USB_MON=y | |||
1124 | CONFIG_INFINIBAND=m | 1144 | CONFIG_INFINIBAND=m |
1125 | CONFIG_INFINIBAND_USER_MAD=m | 1145 | CONFIG_INFINIBAND_USER_MAD=m |
1126 | CONFIG_INFINIBAND_USER_ACCESS=m | 1146 | CONFIG_INFINIBAND_USER_ACCESS=m |
1147 | CONFIG_INFINIBAND_ADDR_TRANS=y | ||
1127 | CONFIG_INFINIBAND_MTHCA=m | 1148 | CONFIG_INFINIBAND_MTHCA=m |
1128 | CONFIG_INFINIBAND_MTHCA_DEBUG=y | 1149 | CONFIG_INFINIBAND_MTHCA_DEBUG=y |
1129 | CONFIG_INFINIBAND_IPOIB=m | 1150 | CONFIG_INFINIBAND_IPOIB=m |
1130 | CONFIG_INFINIBAND_IPOIB_DEBUG=y | 1151 | CONFIG_INFINIBAND_IPOIB_DEBUG=y |
1131 | # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set | 1152 | # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set |
1132 | CONFIG_INFINIBAND_SRP=m | 1153 | CONFIG_INFINIBAND_SRP=m |
1154 | # CONFIG_INFINIBAND_ISER is not set | ||
1133 | 1155 | ||
1134 | # | 1156 | # |
1135 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | 1157 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) |
@@ -1141,6 +1163,19 @@ CONFIG_INFINIBAND_SRP=m | |||
1141 | # CONFIG_RTC_CLASS is not set | 1163 | # CONFIG_RTC_CLASS is not set |
1142 | 1164 | ||
1143 | # | 1165 | # |
1166 | # DMA Engine support | ||
1167 | # | ||
1168 | # CONFIG_DMA_ENGINE is not set | ||
1169 | |||
1170 | # | ||
1171 | # DMA Clients | ||
1172 | # | ||
1173 | |||
1174 | # | ||
1175 | # DMA Devices | ||
1176 | # | ||
1177 | |||
1178 | # | ||
1144 | # File systems | 1179 | # File systems |
1145 | # | 1180 | # |
1146 | CONFIG_EXT2_FS=y | 1181 | CONFIG_EXT2_FS=y |
@@ -1169,15 +1204,16 @@ CONFIG_JFS_SECURITY=y | |||
1169 | # CONFIG_JFS_STATISTICS is not set | 1204 | # CONFIG_JFS_STATISTICS is not set |
1170 | CONFIG_FS_POSIX_ACL=y | 1205 | CONFIG_FS_POSIX_ACL=y |
1171 | CONFIG_XFS_FS=m | 1206 | CONFIG_XFS_FS=m |
1172 | CONFIG_XFS_EXPORT=y | ||
1173 | # CONFIG_XFS_QUOTA is not set | 1207 | # CONFIG_XFS_QUOTA is not set |
1174 | CONFIG_XFS_SECURITY=y | 1208 | CONFIG_XFS_SECURITY=y |
1175 | CONFIG_XFS_POSIX_ACL=y | 1209 | CONFIG_XFS_POSIX_ACL=y |
1176 | # CONFIG_XFS_RT is not set | 1210 | # CONFIG_XFS_RT is not set |
1177 | CONFIG_OCFS2_FS=m | 1211 | CONFIG_OCFS2_FS=m |
1212 | CONFIG_OCFS2_DEBUG_MASKLOG=y | ||
1178 | # CONFIG_MINIX_FS is not set | 1213 | # CONFIG_MINIX_FS is not set |
1179 | # CONFIG_ROMFS_FS is not set | 1214 | # CONFIG_ROMFS_FS is not set |
1180 | CONFIG_INOTIFY=y | 1215 | CONFIG_INOTIFY=y |
1216 | CONFIG_INOTIFY_USER=y | ||
1181 | # CONFIG_QUOTA is not set | 1217 | # CONFIG_QUOTA is not set |
1182 | CONFIG_DNOTIFY=y | 1218 | CONFIG_DNOTIFY=y |
1183 | # CONFIG_AUTOFS_FS is not set | 1219 | # CONFIG_AUTOFS_FS is not set |
@@ -1259,8 +1295,10 @@ CONFIG_RPCSEC_GSS_SPKM3=m | |||
1259 | # CONFIG_SMB_FS is not set | 1295 | # CONFIG_SMB_FS is not set |
1260 | CONFIG_CIFS=m | 1296 | CONFIG_CIFS=m |
1261 | # CONFIG_CIFS_STATS is not set | 1297 | # CONFIG_CIFS_STATS is not set |
1298 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1262 | CONFIG_CIFS_XATTR=y | 1299 | CONFIG_CIFS_XATTR=y |
1263 | CONFIG_CIFS_POSIX=y | 1300 | CONFIG_CIFS_POSIX=y |
1301 | # CONFIG_CIFS_DEBUG2 is not set | ||
1264 | # CONFIG_CIFS_EXPERIMENTAL is not set | 1302 | # CONFIG_CIFS_EXPERIMENTAL is not set |
1265 | # CONFIG_NCP_FS is not set | 1303 | # CONFIG_NCP_FS is not set |
1266 | # CONFIG_CODA_FS is not set | 1304 | # CONFIG_CODA_FS is not set |
@@ -1326,6 +1364,9 @@ CONFIG_CRC32=y | |||
1326 | CONFIG_LIBCRC32C=m | 1364 | CONFIG_LIBCRC32C=m |
1327 | CONFIG_ZLIB_INFLATE=y | 1365 | CONFIG_ZLIB_INFLATE=y |
1328 | CONFIG_ZLIB_DEFLATE=m | 1366 | CONFIG_ZLIB_DEFLATE=m |
1367 | CONFIG_TEXTSEARCH=y | ||
1368 | CONFIG_TEXTSEARCH_KMP=m | ||
1369 | CONFIG_PLIST=y | ||
1329 | 1370 | ||
1330 | # | 1371 | # |
1331 | # Instrumentation Support | 1372 | # Instrumentation Support |
@@ -1339,14 +1380,19 @@ CONFIG_KPROBES=y | |||
1339 | # | 1380 | # |
1340 | # CONFIG_PRINTK_TIME is not set | 1381 | # CONFIG_PRINTK_TIME is not set |
1341 | CONFIG_MAGIC_SYSRQ=y | 1382 | CONFIG_MAGIC_SYSRQ=y |
1383 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1342 | CONFIG_DEBUG_KERNEL=y | 1384 | CONFIG_DEBUG_KERNEL=y |
1343 | CONFIG_LOG_BUF_SHIFT=17 | 1385 | CONFIG_LOG_BUF_SHIFT=17 |
1344 | CONFIG_DETECT_SOFTLOCKUP=y | 1386 | CONFIG_DETECT_SOFTLOCKUP=y |
1345 | # CONFIG_SCHEDSTATS is not set | 1387 | # CONFIG_SCHEDSTATS is not set |
1346 | # CONFIG_DEBUG_SLAB is not set | 1388 | # CONFIG_DEBUG_SLAB is not set |
1347 | # CONFIG_DEBUG_MUTEXES is not set | 1389 | # CONFIG_DEBUG_RT_MUTEXES is not set |
1390 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1348 | # CONFIG_DEBUG_SPINLOCK is not set | 1391 | # CONFIG_DEBUG_SPINLOCK is not set |
1392 | # CONFIG_DEBUG_MUTEXES is not set | ||
1393 | # CONFIG_DEBUG_RWSEMS is not set | ||
1349 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1394 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
1395 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1350 | # CONFIG_DEBUG_KOBJECT is not set | 1396 | # CONFIG_DEBUG_KOBJECT is not set |
1351 | # CONFIG_DEBUG_INFO is not set | 1397 | # CONFIG_DEBUG_INFO is not set |
1352 | CONFIG_DEBUG_FS=y | 1398 | CONFIG_DEBUG_FS=y |
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 814f242aeb8c..956c2e5564b7 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -67,9 +67,9 @@ pci64-$(CONFIG_PPC64) += pci_64.o pci_dn.o pci_iommu.o \ | |||
67 | pci_direct_iommu.o iomap.o | 67 | pci_direct_iommu.o iomap.o |
68 | pci32-$(CONFIG_PPC32) := pci_32.o | 68 | pci32-$(CONFIG_PPC32) := pci_32.o |
69 | obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y) | 69 | obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y) |
70 | kexec-$(CONFIG_PPC64) := machine_kexec_64.o crash.o | 70 | kexec-$(CONFIG_PPC64) := machine_kexec_64.o |
71 | kexec-$(CONFIG_PPC32) := machine_kexec_32.o | 71 | kexec-$(CONFIG_PPC32) := machine_kexec_32.o |
72 | obj-$(CONFIG_KEXEC) += machine_kexec.o $(kexec-y) | 72 | obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o $(kexec-y) |
73 | 73 | ||
74 | ifeq ($(CONFIG_PPC_ISERIES),y) | 74 | ifeq ($(CONFIG_PPC_ISERIES),y) |
75 | $(obj)/head_64.o: $(obj)/lparmap.s | 75 | $(obj)/head_64.o: $(obj)/lparmap.s |
diff --git a/arch/powerpc/kernel/cpu_setup_power4.S b/arch/powerpc/kernel/cpu_setup_power4.S index f69af2c5d7b3..76e97aa71c45 100644 --- a/arch/powerpc/kernel/cpu_setup_power4.S +++ b/arch/powerpc/kernel/cpu_setup_power4.S | |||
@@ -76,6 +76,8 @@ _GLOBAL(__setup_cpu_ppc970) | |||
76 | mfspr r0,SPRN_HID0 | 76 | mfspr r0,SPRN_HID0 |
77 | li r11,5 /* clear DOZE and SLEEP */ | 77 | li r11,5 /* clear DOZE and SLEEP */ |
78 | rldimi r0,r11,52,8 /* set NAP and DPM */ | 78 | rldimi r0,r11,52,8 /* set NAP and DPM */ |
79 | li r11,0 | ||
80 | rldimi r0,r11,32,31 /* clear EN_ATTN */ | ||
79 | mtspr SPRN_HID0,r0 | 81 | mtspr SPRN_HID0,r0 |
80 | mfspr r0,SPRN_HID0 | 82 | mfspr r0,SPRN_HID0 |
81 | mfspr r0,SPRN_HID0 | 83 | mfspr r0,SPRN_HID0 |
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index 358cecdc6aef..f04c18e08b8b 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c | |||
@@ -44,6 +44,7 @@ | |||
44 | /* This keeps a track of which one is crashing cpu. */ | 44 | /* This keeps a track of which one is crashing cpu. */ |
45 | int crashing_cpu = -1; | 45 | int crashing_cpu = -1; |
46 | static cpumask_t cpus_in_crash = CPU_MASK_NONE; | 46 | static cpumask_t cpus_in_crash = CPU_MASK_NONE; |
47 | cpumask_t cpus_in_sr = CPU_MASK_NONE; | ||
47 | 48 | ||
48 | static u32 *append_elf_note(u32 *buf, char *name, unsigned type, void *data, | 49 | static u32 *append_elf_note(u32 *buf, char *name, unsigned type, void *data, |
49 | size_t data_len) | 50 | size_t data_len) |
@@ -139,7 +140,13 @@ void crash_ipi_callback(struct pt_regs *regs) | |||
139 | 140 | ||
140 | if (ppc_md.kexec_cpu_down) | 141 | if (ppc_md.kexec_cpu_down) |
141 | ppc_md.kexec_cpu_down(1, 1); | 142 | ppc_md.kexec_cpu_down(1, 1); |
143 | |||
144 | #ifdef CONFIG_PPC64 | ||
142 | kexec_smp_wait(); | 145 | kexec_smp_wait(); |
146 | #else | ||
147 | for (;;); /* FIXME */ | ||
148 | #endif | ||
149 | |||
143 | /* NOTREACHED */ | 150 | /* NOTREACHED */ |
144 | } | 151 | } |
145 | 152 | ||
@@ -255,7 +262,11 @@ static void crash_kexec_prepare_cpus(int cpu) | |||
255 | * | 262 | * |
256 | * do this if kexec in setup.c ? | 263 | * do this if kexec in setup.c ? |
257 | */ | 264 | */ |
265 | #ifdef CONFIG_PPC64 | ||
258 | smp_release_cpus(); | 266 | smp_release_cpus(); |
267 | #else | ||
268 | /* FIXME */ | ||
269 | #endif | ||
259 | } | 270 | } |
260 | 271 | ||
261 | void crash_kexec_secondary(struct pt_regs *regs) | 272 | void crash_kexec_secondary(struct pt_regs *regs) |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 01bdae35cb55..7ee685433319 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -693,7 +693,7 @@ unsigned int irq_radix_revmap(struct irq_host *host, | |||
693 | /* If not there, try to insert it */ | 693 | /* If not there, try to insert it */ |
694 | virq = irq_find_mapping(host, hwirq); | 694 | virq = irq_find_mapping(host, hwirq); |
695 | if (virq != NO_IRQ) | 695 | if (virq != NO_IRQ) |
696 | radix_tree_insert(tree, virq, &irq_map[virq]); | 696 | radix_tree_insert(tree, hwirq, &irq_map[virq]); |
697 | bail: | 697 | bail: |
698 | spin_unlock_irqrestore(&irq_big_lock, flags); | 698 | spin_unlock_irqrestore(&irq_big_lock, flags); |
699 | return virq; | 699 | return virq; |
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c index 9f0898c89759..cd65c367b8b6 100644 --- a/arch/powerpc/kernel/kprobes.c +++ b/arch/powerpc/kernel/kprobes.c | |||
@@ -61,6 +61,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) | |||
61 | if (!ret) { | 61 | if (!ret) { |
62 | memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); | 62 | memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); |
63 | p->opcode = *p->addr; | 63 | p->opcode = *p->addr; |
64 | flush_icache_range((unsigned long)p->ainsn.insn, | ||
65 | (unsigned long)p->ainsn.insn + sizeof(kprobe_opcode_t)); | ||
64 | } | 66 | } |
65 | 67 | ||
66 | return ret; | 68 | return ret; |
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c index 359ab89748e0..40a39291861f 100644 --- a/arch/powerpc/kernel/legacy_serial.c +++ b/arch/powerpc/kernel/legacy_serial.c | |||
@@ -115,6 +115,7 @@ static int __init add_legacy_soc_port(struct device_node *np, | |||
115 | u64 addr; | 115 | u64 addr; |
116 | u32 *addrp; | 116 | u32 *addrp; |
117 | upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ; | 117 | upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ; |
118 | struct device_node *tsi = of_get_parent(np); | ||
118 | 119 | ||
119 | /* We only support ports that have a clock frequency properly | 120 | /* We only support ports that have a clock frequency properly |
120 | * encoded in the device-tree. | 121 | * encoded in the device-tree. |
@@ -134,7 +135,10 @@ static int __init add_legacy_soc_port(struct device_node *np, | |||
134 | /* Add port, irq will be dealt with later. We passed a translated | 135 | /* Add port, irq will be dealt with later. We passed a translated |
135 | * IO port value. It will be fixed up later along with the irq | 136 | * IO port value. It will be fixed up later along with the irq |
136 | */ | 137 | */ |
137 | return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags, 0); | 138 | if (tsi && !strcmp(tsi->type, "tsi-bridge")) |
139 | return add_legacy_port(np, -1, UPIO_TSI, addr, addr, NO_IRQ, flags, 0); | ||
140 | else | ||
141 | return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags, 0); | ||
138 | } | 142 | } |
139 | 143 | ||
140 | static int __init add_legacy_isa_port(struct device_node *np, | 144 | static int __init add_legacy_isa_port(struct device_node *np, |
@@ -464,7 +468,7 @@ static int __init serial_dev_init(void) | |||
464 | fixup_port_irq(i, np, port); | 468 | fixup_port_irq(i, np, port); |
465 | if (port->iotype == UPIO_PORT) | 469 | if (port->iotype == UPIO_PORT) |
466 | fixup_port_pio(i, np, port); | 470 | fixup_port_pio(i, np, port); |
467 | if (port->iotype == UPIO_MEM) | 471 | if ((port->iotype == UPIO_MEM) || (port->iotype == UPIO_TSI)) |
468 | fixup_port_mmio(i, np, port); | 472 | fixup_port_mmio(i, np, port); |
469 | } | 473 | } |
470 | 474 | ||
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index a81ca1b841ec..e60a0c544d63 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/reboot.h> | 13 | #include <linux/reboot.h> |
14 | #include <linux/threads.h> | 14 | #include <linux/threads.h> |
15 | #include <asm/machdep.h> | 15 | #include <asm/machdep.h> |
16 | #include <asm/lmb.h> | ||
16 | 17 | ||
17 | void machine_crash_shutdown(struct pt_regs *regs) | 18 | void machine_crash_shutdown(struct pt_regs *regs) |
18 | { | 19 | { |
@@ -59,3 +60,58 @@ NORET_TYPE void machine_kexec(struct kimage *image) | |||
59 | } | 60 | } |
60 | for(;;); | 61 | for(;;); |
61 | } | 62 | } |
63 | |||
64 | static int __init early_parse_crashk(char *p) | ||
65 | { | ||
66 | unsigned long size; | ||
67 | |||
68 | if (!p) | ||
69 | return 1; | ||
70 | |||
71 | size = memparse(p, &p); | ||
72 | |||
73 | if (*p == '@') | ||
74 | crashk_res.start = memparse(p + 1, &p); | ||
75 | else | ||
76 | crashk_res.start = KDUMP_KERNELBASE; | ||
77 | |||
78 | crashk_res.end = crashk_res.start + size - 1; | ||
79 | |||
80 | return 0; | ||
81 | } | ||
82 | early_param("crashkernel", early_parse_crashk); | ||
83 | |||
84 | void __init reserve_crashkernel(void) | ||
85 | { | ||
86 | unsigned long size; | ||
87 | |||
88 | if (crashk_res.start == 0) | ||
89 | return; | ||
90 | |||
91 | /* We might have got these values via the command line or the | ||
92 | * device tree, either way sanitise them now. */ | ||
93 | |||
94 | size = crashk_res.end - crashk_res.start + 1; | ||
95 | |||
96 | if (crashk_res.start != KDUMP_KERNELBASE) | ||
97 | printk("Crash kernel location must be 0x%x\n", | ||
98 | KDUMP_KERNELBASE); | ||
99 | |||
100 | crashk_res.start = KDUMP_KERNELBASE; | ||
101 | size = PAGE_ALIGN(size); | ||
102 | crashk_res.end = crashk_res.start + size - 1; | ||
103 | |||
104 | /* Crash kernel trumps memory limit */ | ||
105 | if (memory_limit && memory_limit <= crashk_res.end) { | ||
106 | memory_limit = crashk_res.end + 1; | ||
107 | printk("Adjusted memory limit for crashkernel, now 0x%lx\n", | ||
108 | memory_limit); | ||
109 | } | ||
110 | |||
111 | lmb_reserve(crashk_res.start, size); | ||
112 | } | ||
113 | |||
114 | int overlaps_crashkernel(unsigned long start, unsigned long size) | ||
115 | { | ||
116 | return (start + size) > crashk_res.start && start <= crashk_res.end; | ||
117 | } | ||
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c index b438d45a068c..be58985c7681 100644 --- a/arch/powerpc/kernel/machine_kexec_64.c +++ b/arch/powerpc/kernel/machine_kexec_64.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | 12 | ||
13 | #include <linux/cpumask.h> | ||
14 | #include <linux/kexec.h> | 13 | #include <linux/kexec.h> |
15 | #include <linux/smp.h> | 14 | #include <linux/smp.h> |
16 | #include <linux/thread_info.h> | 15 | #include <linux/thread_info.h> |
@@ -21,7 +20,6 @@ | |||
21 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
22 | #include <asm/cacheflush.h> | 21 | #include <asm/cacheflush.h> |
23 | #include <asm/paca.h> | 22 | #include <asm/paca.h> |
24 | #include <asm/lmb.h> | ||
25 | #include <asm/mmu.h> | 23 | #include <asm/mmu.h> |
26 | #include <asm/sections.h> /* _end */ | 24 | #include <asm/sections.h> /* _end */ |
27 | #include <asm/prom.h> | 25 | #include <asm/prom.h> |
@@ -385,58 +383,3 @@ static int __init kexec_setup(void) | |||
385 | return 0; | 383 | return 0; |
386 | } | 384 | } |
387 | __initcall(kexec_setup); | 385 | __initcall(kexec_setup); |
388 | |||
389 | static int __init early_parse_crashk(char *p) | ||
390 | { | ||
391 | unsigned long size; | ||
392 | |||
393 | if (!p) | ||
394 | return 1; | ||
395 | |||
396 | size = memparse(p, &p); | ||
397 | |||
398 | if (*p == '@') | ||
399 | crashk_res.start = memparse(p + 1, &p); | ||
400 | else | ||
401 | crashk_res.start = KDUMP_KERNELBASE; | ||
402 | |||
403 | crashk_res.end = crashk_res.start + size - 1; | ||
404 | |||
405 | return 0; | ||
406 | } | ||
407 | early_param("crashkernel", early_parse_crashk); | ||
408 | |||
409 | void __init reserve_crashkernel(void) | ||
410 | { | ||
411 | unsigned long size; | ||
412 | |||
413 | if (crashk_res.start == 0) | ||
414 | return; | ||
415 | |||
416 | /* We might have got these values via the command line or the | ||
417 | * device tree, either way sanitise them now. */ | ||
418 | |||
419 | size = crashk_res.end - crashk_res.start + 1; | ||
420 | |||
421 | if (crashk_res.start != KDUMP_KERNELBASE) | ||
422 | printk("Crash kernel location must be 0x%x\n", | ||
423 | KDUMP_KERNELBASE); | ||
424 | |||
425 | crashk_res.start = KDUMP_KERNELBASE; | ||
426 | size = PAGE_ALIGN(size); | ||
427 | crashk_res.end = crashk_res.start + size - 1; | ||
428 | |||
429 | /* Crash kernel trumps memory limit */ | ||
430 | if (memory_limit && memory_limit <= crashk_res.end) { | ||
431 | memory_limit = crashk_res.end + 1; | ||
432 | printk("Adjusted memory limit for crashkernel, now 0x%lx\n", | ||
433 | memory_limit); | ||
434 | } | ||
435 | |||
436 | lmb_reserve(crashk_res.start, size); | ||
437 | } | ||
438 | |||
439 | int overlaps_crashkernel(unsigned long start, unsigned long size) | ||
440 | { | ||
441 | return (start + size) > crashk_res.start && start <= crashk_res.end; | ||
442 | } | ||
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c index 6a7e997c401d..11052c212ad5 100644 --- a/arch/powerpc/kernel/prom_parse.c +++ b/arch/powerpc/kernel/prom_parse.c | |||
@@ -598,11 +598,6 @@ static struct device_node *of_irq_find_parent(struct device_node *child) | |||
598 | return p; | 598 | return p; |
599 | } | 599 | } |
600 | 600 | ||
601 | static u8 of_irq_pci_swizzle(u8 slot, u8 pin) | ||
602 | { | ||
603 | return (((pin - 1) + slot) % 4) + 1; | ||
604 | } | ||
605 | |||
606 | /* This doesn't need to be called if you don't have any special workaround | 601 | /* This doesn't need to be called if you don't have any special workaround |
607 | * flags to pass | 602 | * flags to pass |
608 | */ | 603 | */ |
@@ -891,6 +886,12 @@ int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq | |||
891 | } | 886 | } |
892 | EXPORT_SYMBOL_GPL(of_irq_map_one); | 887 | EXPORT_SYMBOL_GPL(of_irq_map_one); |
893 | 888 | ||
889 | #ifdef CONFIG_PCI | ||
890 | static u8 of_irq_pci_swizzle(u8 slot, u8 pin) | ||
891 | { | ||
892 | return (((pin - 1) + slot) % 4) + 1; | ||
893 | } | ||
894 | |||
894 | int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) | 895 | int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) |
895 | { | 896 | { |
896 | struct device_node *dn, *ppnode; | 897 | struct device_node *dn, *ppnode; |
@@ -967,4 +968,4 @@ int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) | |||
967 | return of_irq_map_raw(ppnode, &lspec, laddr, out_irq); | 968 | return of_irq_map_raw(ppnode, &lspec, laddr, out_irq); |
968 | } | 969 | } |
969 | EXPORT_SYMBOL_GPL(of_irq_map_pci); | 970 | EXPORT_SYMBOL_GPL(of_irq_map_pci); |
970 | 971 | #endif /* CONFIG_PCI */ | |
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index 4a4cb5598402..77f1e06d208d 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c | |||
@@ -569,6 +569,27 @@ int rtas_set_indicator(int indicator, int index, int new_value) | |||
569 | } | 569 | } |
570 | EXPORT_SYMBOL(rtas_set_indicator); | 570 | EXPORT_SYMBOL(rtas_set_indicator); |
571 | 571 | ||
572 | /* | ||
573 | * Ignoring RTAS extended delay | ||
574 | */ | ||
575 | int rtas_set_indicator_fast(int indicator, int index, int new_value) | ||
576 | { | ||
577 | int rc; | ||
578 | int token = rtas_token("set-indicator"); | ||
579 | |||
580 | if (token == RTAS_UNKNOWN_SERVICE) | ||
581 | return -ENOENT; | ||
582 | |||
583 | rc = rtas_call(token, 3, 1, NULL, indicator, index, new_value); | ||
584 | |||
585 | WARN_ON(rc == -2 || (rc >= 9900 && rc <= 9905)); | ||
586 | |||
587 | if (rc < 0) | ||
588 | return rtas_error_rc(rc); | ||
589 | |||
590 | return rc; | ||
591 | } | ||
592 | |||
572 | void rtas_restart(char *cmd) | 593 | void rtas_restart(char *cmd) |
573 | { | 594 | { |
574 | if (rtas_flash_term_hook) | 595 | if (rtas_flash_term_hook) |
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 774c0a3c5019..18e59e43d2b3 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
@@ -417,7 +417,7 @@ static __inline__ void timer_check_rtc(void) | |||
417 | /* | 417 | /* |
418 | * This version of gettimeofday has microsecond resolution. | 418 | * This version of gettimeofday has microsecond resolution. |
419 | */ | 419 | */ |
420 | static inline void __do_gettimeofday(struct timeval *tv, u64 tb_val) | 420 | static inline void __do_gettimeofday(struct timeval *tv) |
421 | { | 421 | { |
422 | unsigned long sec, usec; | 422 | unsigned long sec, usec; |
423 | u64 tb_ticks, xsec; | 423 | u64 tb_ticks, xsec; |
@@ -431,7 +431,12 @@ static inline void __do_gettimeofday(struct timeval *tv, u64 tb_val) | |||
431 | * without a divide (and in fact, without a multiply) | 431 | * without a divide (and in fact, without a multiply) |
432 | */ | 432 | */ |
433 | temp_varp = do_gtod.varp; | 433 | temp_varp = do_gtod.varp; |
434 | tb_ticks = tb_val - temp_varp->tb_orig_stamp; | 434 | |
435 | /* Sampling the time base must be done after loading | ||
436 | * do_gtod.varp in order to avoid racing with update_gtod. | ||
437 | */ | ||
438 | data_barrier(temp_varp); | ||
439 | tb_ticks = get_tb() - temp_varp->tb_orig_stamp; | ||
435 | temp_tb_to_xs = temp_varp->tb_to_xs; | 440 | temp_tb_to_xs = temp_varp->tb_to_xs; |
436 | temp_stamp_xsec = temp_varp->stamp_xsec; | 441 | temp_stamp_xsec = temp_varp->stamp_xsec; |
437 | xsec = temp_stamp_xsec + mulhdu(tb_ticks, temp_tb_to_xs); | 442 | xsec = temp_stamp_xsec + mulhdu(tb_ticks, temp_tb_to_xs); |
@@ -464,7 +469,7 @@ void do_gettimeofday(struct timeval *tv) | |||
464 | tv->tv_usec = usec; | 469 | tv->tv_usec = usec; |
465 | return; | 470 | return; |
466 | } | 471 | } |
467 | __do_gettimeofday(tv, get_tb()); | 472 | __do_gettimeofday(tv); |
468 | } | 473 | } |
469 | 474 | ||
470 | EXPORT_SYMBOL(do_gettimeofday); | 475 | EXPORT_SYMBOL(do_gettimeofday); |
@@ -650,6 +655,7 @@ void timer_interrupt(struct pt_regs * regs) | |||
650 | int next_dec; | 655 | int next_dec; |
651 | int cpu = smp_processor_id(); | 656 | int cpu = smp_processor_id(); |
652 | unsigned long ticks; | 657 | unsigned long ticks; |
658 | u64 tb_next_jiffy; | ||
653 | 659 | ||
654 | #ifdef CONFIG_PPC32 | 660 | #ifdef CONFIG_PPC32 |
655 | if (atomic_read(&ppc_n_lost_interrupts) != 0) | 661 | if (atomic_read(&ppc_n_lost_interrupts) != 0) |
@@ -691,11 +697,14 @@ void timer_interrupt(struct pt_regs * regs) | |||
691 | continue; | 697 | continue; |
692 | 698 | ||
693 | write_seqlock(&xtime_lock); | 699 | write_seqlock(&xtime_lock); |
694 | tb_last_jiffy += tb_ticks_per_jiffy; | 700 | tb_next_jiffy = tb_last_jiffy + tb_ticks_per_jiffy; |
695 | tb_last_stamp = per_cpu(last_jiffy, cpu); | 701 | if (per_cpu(last_jiffy, cpu) >= tb_next_jiffy) { |
696 | do_timer(regs); | 702 | tb_last_jiffy = tb_next_jiffy; |
697 | timer_recalc_offset(tb_last_jiffy); | 703 | tb_last_stamp = per_cpu(last_jiffy, cpu); |
698 | timer_check_rtc(); | 704 | do_timer(regs); |
705 | timer_recalc_offset(tb_last_jiffy); | ||
706 | timer_check_rtc(); | ||
707 | } | ||
699 | write_sequnlock(&xtime_lock); | 708 | write_sequnlock(&xtime_lock); |
700 | } | 709 | } |
701 | 710 | ||
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 2105767fcc57..9b352bd0a460 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -55,9 +55,6 @@ | |||
55 | 55 | ||
56 | #ifdef CONFIG_PPC64 /* XXX */ | 56 | #ifdef CONFIG_PPC64 /* XXX */ |
57 | #define _IO_BASE pci_io_base | 57 | #define _IO_BASE pci_io_base |
58 | #ifdef CONFIG_KEXEC | ||
59 | cpumask_t cpus_in_sr = CPU_MASK_NONE; | ||
60 | #endif | ||
61 | #endif | 58 | #endif |
62 | 59 | ||
63 | #ifdef CONFIG_DEBUGGER | 60 | #ifdef CONFIG_DEBUGGER |
@@ -151,7 +148,7 @@ int die(const char *str, struct pt_regs *regs, long err) | |||
151 | panic("Fatal exception in interrupt"); | 148 | panic("Fatal exception in interrupt"); |
152 | 149 | ||
153 | if (panic_on_oops) | 150 | if (panic_on_oops) |
154 | panic("Fatal exception: panic_on_oops"); | 151 | panic("Fatal exception"); |
155 | 152 | ||
156 | do_exit(err); | 153 | do_exit(err); |
157 | 154 | ||
@@ -211,6 +208,19 @@ void system_reset_exception(struct pt_regs *regs) | |||
211 | 208 | ||
212 | die("System Reset", regs, SIGABRT); | 209 | die("System Reset", regs, SIGABRT); |
213 | 210 | ||
211 | /* | ||
212 | * Some CPUs when released from the debugger will execute this path. | ||
213 | * These CPUs entered the debugger via a soft-reset. If the CPU was | ||
214 | * hung before entering the debugger it will return to the hung | ||
215 | * state when exiting this function. This causes a problem in | ||
216 | * kdump since the hung CPU(s) will not respond to the IPI sent | ||
217 | * from kdump. To prevent the problem we call crash_kexec_secondary() | ||
218 | * here. If a kdump had not been initiated or we exit the debugger | ||
219 | * with the "exit and recover" command (x) crash_kexec_secondary() | ||
220 | * will return after 5ms and the CPU returns to its previous state. | ||
221 | */ | ||
222 | crash_kexec_secondary(regs); | ||
223 | |||
214 | /* Must die if the interrupt is not recoverable */ | 224 | /* Must die if the interrupt is not recoverable */ |
215 | if (!(regs->msr & MSR_RI)) | 225 | if (!(regs->msr & MSR_RI)) |
216 | panic("Unrecoverable System Reset"); | 226 | panic("Unrecoverable System Reset"); |
@@ -575,14 +585,14 @@ static void parse_fpe(struct pt_regs *regs) | |||
575 | #define INST_MFSPR_PVR_MASK 0xfc1fffff | 585 | #define INST_MFSPR_PVR_MASK 0xfc1fffff |
576 | 586 | ||
577 | #define INST_DCBA 0x7c0005ec | 587 | #define INST_DCBA 0x7c0005ec |
578 | #define INST_DCBA_MASK 0x7c0007fe | 588 | #define INST_DCBA_MASK 0xfc0007fe |
579 | 589 | ||
580 | #define INST_MCRXR 0x7c000400 | 590 | #define INST_MCRXR 0x7c000400 |
581 | #define INST_MCRXR_MASK 0x7c0007fe | 591 | #define INST_MCRXR_MASK 0xfc0007fe |
582 | 592 | ||
583 | #define INST_STRING 0x7c00042a | 593 | #define INST_STRING 0x7c00042a |
584 | #define INST_STRING_MASK 0x7c0007fe | 594 | #define INST_STRING_MASK 0xfc0007fe |
585 | #define INST_STRING_GEN_MASK 0x7c00067e | 595 | #define INST_STRING_GEN_MASK 0xfc00067e |
586 | #define INST_LSWI 0x7c0004aa | 596 | #define INST_LSWI 0x7c0004aa |
587 | #define INST_LSWX 0x7c00042a | 597 | #define INST_LSWX 0x7c00042a |
588 | #define INST_STSWI 0x7c0005aa | 598 | #define INST_STSWI 0x7c0005aa |
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c index 266b8b2ceac9..5615acc29527 100644 --- a/arch/powerpc/mm/hugetlbpage.c +++ b/arch/powerpc/mm/hugetlbpage.c | |||
@@ -153,7 +153,7 @@ static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp) | |||
153 | hpdp->pd = 0; | 153 | hpdp->pd = 0; |
154 | tlb->need_flush = 1; | 154 | tlb->need_flush = 1; |
155 | pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, HUGEPTE_CACHE_NUM, | 155 | pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, HUGEPTE_CACHE_NUM, |
156 | HUGEPTE_TABLE_SIZE-1)); | 156 | PGF_CACHENUM_MASK)); |
157 | } | 157 | } |
158 | 158 | ||
159 | #ifdef CONFIG_PPC_64K_PAGES | 159 | #ifdef CONFIG_PPC_64K_PAGES |
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 454fc53289ab..c3268d9877e4 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -14,7 +14,6 @@ config MPC8540_ADS | |||
14 | config MPC85xx_CDS | 14 | config MPC85xx_CDS |
15 | bool "Freescale MPC85xx CDS" | 15 | bool "Freescale MPC85xx CDS" |
16 | select DEFAULT_UIMAGE | 16 | select DEFAULT_UIMAGE |
17 | select PPC_I8259 if PCI | ||
18 | help | 17 | help |
19 | This option enables support for the MPC85xx CDS board | 18 | This option enables support for the MPC85xx CDS board |
20 | 19 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 06a497676c99..9d2acfbbeccd 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
@@ -37,79 +37,7 @@ unsigned long isa_io_base = 0; | |||
37 | unsigned long isa_mem_base = 0; | 37 | unsigned long isa_mem_base = 0; |
38 | #endif | 38 | #endif |
39 | 39 | ||
40 | /* | ||
41 | * Internal interrupts are all Level Sensitive, and Positive Polarity | ||
42 | * | ||
43 | * Note: Likely, this table and the following function should be | ||
44 | * obtained and derived from the OF Device Tree. | ||
45 | */ | ||
46 | static u_char mpc85xx_ads_openpic_initsenses[] __initdata = { | ||
47 | MPC85XX_INTERNAL_IRQ_SENSES, | ||
48 | 0x0, /* External 0: */ | ||
49 | #if defined(CONFIG_PCI) | ||
50 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 0 */ | ||
51 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 1 */ | ||
52 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 2 */ | ||
53 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 4: PCI slot 3 */ | ||
54 | #else | ||
55 | 0x0, /* External 1: */ | ||
56 | 0x0, /* External 2: */ | ||
57 | 0x0, /* External 3: */ | ||
58 | 0x0, /* External 4: */ | ||
59 | #endif | ||
60 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */ | ||
61 | 0x0, /* External 6: */ | ||
62 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */ | ||
63 | 0x0, /* External 8: */ | ||
64 | 0x0, /* External 9: */ | ||
65 | 0x0, /* External 10: */ | ||
66 | 0x0, /* External 11: */ | ||
67 | }; | ||
68 | |||
69 | #ifdef CONFIG_PCI | 40 | #ifdef CONFIG_PCI |
70 | /* | ||
71 | * interrupt routing | ||
72 | */ | ||
73 | |||
74 | int | ||
75 | mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
76 | { | ||
77 | static char pci_irq_table[][4] = | ||
78 | /* | ||
79 | * This is little evil, but works around the fact | ||
80 | * that revA boards have IDSEL starting at 18 | ||
81 | * and others boards (older) start at 12 | ||
82 | * | ||
83 | * PCI IDSEL/INTPIN->INTLINE | ||
84 | * A B C D | ||
85 | */ | ||
86 | { | ||
87 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 2 */ | ||
88 | {PIRQD, PIRQA, PIRQB, PIRQC}, | ||
89 | {PIRQC, PIRQD, PIRQA, PIRQB}, | ||
90 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 5 */ | ||
91 | {0, 0, 0, 0}, /* -- */ | ||
92 | {0, 0, 0, 0}, /* -- */ | ||
93 | {0, 0, 0, 0}, /* -- */ | ||
94 | {0, 0, 0, 0}, /* -- */ | ||
95 | {0, 0, 0, 0}, /* -- */ | ||
96 | {0, 0, 0, 0}, /* -- */ | ||
97 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 12 */ | ||
98 | {PIRQD, PIRQA, PIRQB, PIRQC}, | ||
99 | {PIRQC, PIRQD, PIRQA, PIRQB}, | ||
100 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 15 */ | ||
101 | {0, 0, 0, 0}, /* -- */ | ||
102 | {0, 0, 0, 0}, /* -- */ | ||
103 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 18 */ | ||
104 | {PIRQD, PIRQA, PIRQB, PIRQC}, | ||
105 | {PIRQC, PIRQD, PIRQA, PIRQB}, | ||
106 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 21 */ | ||
107 | }; | ||
108 | |||
109 | const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4; | ||
110 | return PCI_IRQ_TABLE_LOOKUP; | ||
111 | } | ||
112 | |||
113 | int | 41 | int |
114 | mpc85xx_exclude_device(u_char bus, u_char devfn) | 42 | mpc85xx_exclude_device(u_char bus, u_char devfn) |
115 | { | 43 | { |
@@ -119,44 +47,63 @@ mpc85xx_exclude_device(u_char bus, u_char devfn) | |||
119 | return PCIBIOS_SUCCESSFUL; | 47 | return PCIBIOS_SUCCESSFUL; |
120 | } | 48 | } |
121 | 49 | ||
50 | void __init | ||
51 | mpc85xx_pcibios_fixup(void) | ||
52 | { | ||
53 | struct pci_dev *dev = NULL; | ||
54 | |||
55 | for_each_pci_dev(dev) | ||
56 | pci_read_irq_line(dev); | ||
57 | } | ||
122 | #endif /* CONFIG_PCI */ | 58 | #endif /* CONFIG_PCI */ |
123 | 59 | ||
124 | 60 | ||
125 | void __init mpc85xx_ads_pic_init(void) | 61 | void __init mpc85xx_ads_pic_init(void) |
126 | { | 62 | { |
127 | struct mpic *mpic1; | 63 | struct mpic *mpic; |
128 | phys_addr_t OpenPIC_PAddr; | 64 | struct resource r; |
129 | 65 | struct device_node *np = NULL; | |
130 | /* Determine the Physical Address of the OpenPIC regs */ | 66 | |
131 | OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET; | 67 | np = of_find_node_by_type(np, "open-pic"); |
132 | 68 | ||
133 | mpic1 = mpic_alloc(OpenPIC_PAddr, | 69 | if (np == NULL) { |
134 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 70 | printk(KERN_ERR "Could not find open-pic node\n"); |
135 | 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250, | 71 | return; |
136 | mpc85xx_ads_openpic_initsenses, | 72 | } |
137 | sizeof(mpc85xx_ads_openpic_initsenses), | 73 | |
138 | " OpenPIC "); | 74 | if(of_address_to_resource(np, 0, &r)) { |
139 | BUG_ON(mpic1 == NULL); | 75 | printk(KERN_ERR "Could not map mpic register space\n"); |
140 | mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200); | 76 | of_node_put(np); |
141 | mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280); | 77 | return; |
142 | mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10300); | 78 | } |
143 | mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10380); | 79 | |
144 | mpic_assign_isu(mpic1, 4, OpenPIC_PAddr + 0x10400); | 80 | mpic = mpic_alloc(np, r.start, |
145 | mpic_assign_isu(mpic1, 5, OpenPIC_PAddr + 0x10480); | 81 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, |
146 | mpic_assign_isu(mpic1, 6, OpenPIC_PAddr + 0x10500); | 82 | 4, 0, " OpenPIC "); |
147 | mpic_assign_isu(mpic1, 7, OpenPIC_PAddr + 0x10580); | 83 | BUG_ON(mpic == NULL); |
148 | 84 | of_node_put(np); | |
149 | /* dummy mappings to get to 48 */ | 85 | |
150 | mpic_assign_isu(mpic1, 8, OpenPIC_PAddr + 0x10600); | 86 | mpic_assign_isu(mpic, 0, r.start + 0x10200); |
151 | mpic_assign_isu(mpic1, 9, OpenPIC_PAddr + 0x10680); | 87 | mpic_assign_isu(mpic, 1, r.start + 0x10280); |
152 | mpic_assign_isu(mpic1, 10, OpenPIC_PAddr + 0x10700); | 88 | mpic_assign_isu(mpic, 2, r.start + 0x10300); |
153 | mpic_assign_isu(mpic1, 11, OpenPIC_PAddr + 0x10780); | 89 | mpic_assign_isu(mpic, 3, r.start + 0x10380); |
154 | 90 | mpic_assign_isu(mpic, 4, r.start + 0x10400); | |
155 | /* External ints */ | 91 | mpic_assign_isu(mpic, 5, r.start + 0x10480); |
156 | mpic_assign_isu(mpic1, 12, OpenPIC_PAddr + 0x10000); | 92 | mpic_assign_isu(mpic, 6, r.start + 0x10500); |
157 | mpic_assign_isu(mpic1, 13, OpenPIC_PAddr + 0x10080); | 93 | mpic_assign_isu(mpic, 7, r.start + 0x10580); |
158 | mpic_assign_isu(mpic1, 14, OpenPIC_PAddr + 0x10100); | 94 | |
159 | mpic_init(mpic1); | 95 | /* Unused on this platform (leave room for 8548) */ |
96 | mpic_assign_isu(mpic, 8, r.start + 0x10600); | ||
97 | mpic_assign_isu(mpic, 9, r.start + 0x10680); | ||
98 | mpic_assign_isu(mpic, 10, r.start + 0x10700); | ||
99 | mpic_assign_isu(mpic, 11, r.start + 0x10780); | ||
100 | |||
101 | /* External Interrupts */ | ||
102 | mpic_assign_isu(mpic, 12, r.start + 0x10000); | ||
103 | mpic_assign_isu(mpic, 13, r.start + 0x10080); | ||
104 | mpic_assign_isu(mpic, 14, r.start + 0x10100); | ||
105 | |||
106 | mpic_init(mpic); | ||
160 | } | 107 | } |
161 | 108 | ||
162 | /* | 109 | /* |
@@ -165,7 +112,9 @@ void __init mpc85xx_ads_pic_init(void) | |||
165 | static void __init mpc85xx_ads_setup_arch(void) | 112 | static void __init mpc85xx_ads_setup_arch(void) |
166 | { | 113 | { |
167 | struct device_node *cpu; | 114 | struct device_node *cpu; |
115 | #ifdef CONFIG_PCI | ||
168 | struct device_node *np; | 116 | struct device_node *np; |
117 | #endif | ||
169 | 118 | ||
170 | if (ppc_md.progress) | 119 | if (ppc_md.progress) |
171 | ppc_md.progress("mpc85xx_ads_setup_arch()", 0); | 120 | ppc_md.progress("mpc85xx_ads_setup_arch()", 0); |
@@ -186,8 +135,7 @@ static void __init mpc85xx_ads_setup_arch(void) | |||
186 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 135 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
187 | add_bridge(np); | 136 | add_bridge(np); |
188 | 137 | ||
189 | ppc_md.pci_swizzle = common_swizzle; | 138 | ppc_md.pcibios_fixup = mpc85xx_pcibios_fixup; |
190 | ppc_md.pci_map_irq = mpc85xx_map_irq; | ||
191 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; | 139 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; |
192 | #endif | 140 | #endif |
193 | 141 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 18e6e11f7020..1d357d32a29f 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c | |||
@@ -57,94 +57,8 @@ unsigned long isa_mem_base = 0; | |||
57 | static int cds_pci_slot = 2; | 57 | static int cds_pci_slot = 2; |
58 | static volatile u8 *cadmus; | 58 | static volatile u8 *cadmus; |
59 | 59 | ||
60 | /* | ||
61 | * Internal interrupts are all Level Sensitive, and Positive Polarity | ||
62 | * | ||
63 | * Note: Likely, this table and the following function should be | ||
64 | * obtained and derived from the OF Device Tree. | ||
65 | */ | ||
66 | static u_char mpc85xx_cds_openpic_initsenses[] __initdata = { | ||
67 | MPC85XX_INTERNAL_IRQ_SENSES, | ||
68 | #if defined(CONFIG_PCI) | ||
69 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Ext 0: PCI slot 0 */ | ||
70 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 1 */ | ||
71 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 2 */ | ||
72 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 3 */ | ||
73 | #else | ||
74 | 0x0, /* External 0: */ | ||
75 | 0x0, /* External 1: */ | ||
76 | 0x0, /* External 2: */ | ||
77 | 0x0, /* External 3: */ | ||
78 | #endif | ||
79 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */ | ||
80 | 0x0, /* External 6: */ | ||
81 | 0x0, /* External 7: */ | ||
82 | 0x0, /* External 8: */ | ||
83 | 0x0, /* External 9: */ | ||
84 | 0x0, /* External 10: */ | ||
85 | #ifdef CONFIG_PCI | ||
86 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 11: PCI2 slot 0 */ | ||
87 | #else | ||
88 | 0x0, /* External 11: */ | ||
89 | #endif | ||
90 | }; | ||
91 | |||
92 | 60 | ||
93 | #ifdef CONFIG_PCI | 61 | #ifdef CONFIG_PCI |
94 | /* | ||
95 | * interrupt routing | ||
96 | */ | ||
97 | int | ||
98 | mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
99 | { | ||
100 | struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); | ||
101 | |||
102 | if (!hose->index) | ||
103 | { | ||
104 | /* Handle PCI1 interrupts */ | ||
105 | char pci_irq_table[][4] = | ||
106 | /* | ||
107 | * PCI IDSEL/INTPIN->INTLINE | ||
108 | * A B C D | ||
109 | */ | ||
110 | |||
111 | /* Note IRQ assignment for slots is based on which slot the elysium is | ||
112 | * in -- in this setup elysium is in slot #2 (this PIRQA as first | ||
113 | * interrupt on slot */ | ||
114 | { | ||
115 | { 0, 1, 2, 3 }, /* 16 - PMC */ | ||
116 | { 0, 1, 2, 3 }, /* 17 P2P (Tsi320) */ | ||
117 | { 0, 1, 2, 3 }, /* 18 - Slot 1 */ | ||
118 | { 1, 2, 3, 0 }, /* 19 - Slot 2 */ | ||
119 | { 2, 3, 0, 1 }, /* 20 - Slot 3 */ | ||
120 | { 3, 0, 1, 2 }, /* 21 - Slot 4 */ | ||
121 | }; | ||
122 | |||
123 | const long min_idsel = 16, max_idsel = 21, irqs_per_slot = 4; | ||
124 | int i, j; | ||
125 | |||
126 | for (i = 0; i < 6; i++) | ||
127 | for (j = 0; j < 4; j++) | ||
128 | pci_irq_table[i][j] = | ||
129 | ((pci_irq_table[i][j] + 5 - | ||
130 | cds_pci_slot) & 0x3) + PIRQ0A; | ||
131 | |||
132 | return PCI_IRQ_TABLE_LOOKUP; | ||
133 | } else { | ||
134 | /* Handle PCI2 interrupts (if we have one) */ | ||
135 | char pci_irq_table[][4] = | ||
136 | { | ||
137 | /* | ||
138 | * We only have one slot and one interrupt | ||
139 | * going to PIRQA - PIRQD */ | ||
140 | { PIRQ1A, PIRQ1A, PIRQ1A, PIRQ1A }, /* 21 - slot 0 */ | ||
141 | }; | ||
142 | |||
143 | const long min_idsel = 21, max_idsel = 21, irqs_per_slot = 4; | ||
144 | |||
145 | return PCI_IRQ_TABLE_LOOKUP; | ||
146 | } | ||
147 | } | ||
148 | 62 | ||
149 | #define ARCADIA_HOST_BRIDGE_IDSEL 17 | 63 | #define ARCADIA_HOST_BRIDGE_IDSEL 17 |
150 | #define ARCADIA_2ND_BRIDGE_IDSEL 3 | 64 | #define ARCADIA_2ND_BRIDGE_IDSEL 3 |
@@ -210,50 +124,104 @@ mpc85xx_cds_pcibios_fixup(void) | |||
210 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11); | 124 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11); |
211 | pci_dev_put(dev); | 125 | pci_dev_put(dev); |
212 | } | 126 | } |
127 | |||
128 | /* Now map all the PCI irqs */ | ||
129 | dev = NULL; | ||
130 | for_each_pci_dev(dev) | ||
131 | pci_read_irq_line(dev); | ||
132 | } | ||
133 | |||
134 | #ifdef CONFIG_PPC_I8259 | ||
135 | #warning The i8259 PIC support is currently broken | ||
136 | static void mpc85xx_8259_cascade(unsigned int irq, struct | ||
137 | irq_desc *desc, struct pt_regs *regs) | ||
138 | { | ||
139 | unsigned int cascade_irq = i8259_irq(regs); | ||
140 | |||
141 | if (cascade_irq != NO_IRQ) | ||
142 | generic_handle_irq(cascade_irq, regs); | ||
143 | |||
144 | desc->chip->eoi(irq); | ||
213 | } | 145 | } |
146 | #endif /* PPC_I8259 */ | ||
214 | #endif /* CONFIG_PCI */ | 147 | #endif /* CONFIG_PCI */ |
215 | 148 | ||
216 | void __init mpc85xx_cds_pic_init(void) | 149 | void __init mpc85xx_cds_pic_init(void) |
217 | { | 150 | { |
218 | struct mpic *mpic1; | 151 | struct mpic *mpic; |
219 | phys_addr_t OpenPIC_PAddr; | 152 | struct resource r; |
153 | struct device_node *np = NULL; | ||
154 | struct device_node *cascade_node = NULL; | ||
155 | int cascade_irq; | ||
220 | 156 | ||
221 | /* Determine the Physical Address of the OpenPIC regs */ | 157 | np = of_find_node_by_type(np, "open-pic"); |
222 | OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET; | 158 | |
159 | if (np == NULL) { | ||
160 | printk(KERN_ERR "Could not find open-pic node\n"); | ||
161 | return; | ||
162 | } | ||
223 | 163 | ||
224 | mpic1 = mpic_alloc(OpenPIC_PAddr, | 164 | if (of_address_to_resource(np, 0, &r)) { |
165 | printk(KERN_ERR "Failed to map mpic register space\n"); | ||
166 | of_node_put(np); | ||
167 | return; | ||
168 | } | ||
169 | |||
170 | mpic = mpic_alloc(np, r.start, | ||
225 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 171 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, |
226 | 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250, | 172 | 4, 0, " OpenPIC "); |
227 | mpc85xx_cds_openpic_initsenses, | 173 | BUG_ON(mpic == NULL); |
228 | sizeof(mpc85xx_cds_openpic_initsenses), " OpenPIC "); | 174 | |
229 | BUG_ON(mpic1 == NULL); | 175 | /* Return the mpic node */ |
230 | mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200); | 176 | of_node_put(np); |
231 | mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280); | 177 | |
232 | mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10300); | 178 | mpic_assign_isu(mpic, 0, r.start + 0x10200); |
233 | mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10380); | 179 | mpic_assign_isu(mpic, 1, r.start + 0x10280); |
234 | mpic_assign_isu(mpic1, 4, OpenPIC_PAddr + 0x10400); | 180 | mpic_assign_isu(mpic, 2, r.start + 0x10300); |
235 | mpic_assign_isu(mpic1, 5, OpenPIC_PAddr + 0x10480); | 181 | mpic_assign_isu(mpic, 3, r.start + 0x10380); |
236 | mpic_assign_isu(mpic1, 6, OpenPIC_PAddr + 0x10500); | 182 | mpic_assign_isu(mpic, 4, r.start + 0x10400); |
237 | mpic_assign_isu(mpic1, 7, OpenPIC_PAddr + 0x10580); | 183 | mpic_assign_isu(mpic, 5, r.start + 0x10480); |
238 | 184 | mpic_assign_isu(mpic, 6, r.start + 0x10500); | |
239 | /* dummy mappings to get to 48 */ | 185 | mpic_assign_isu(mpic, 7, r.start + 0x10580); |
240 | mpic_assign_isu(mpic1, 8, OpenPIC_PAddr + 0x10600); | 186 | |
241 | mpic_assign_isu(mpic1, 9, OpenPIC_PAddr + 0x10680); | 187 | /* Used only for 8548 so far, but no harm in |
242 | mpic_assign_isu(mpic1, 10, OpenPIC_PAddr + 0x10700); | 188 | * allocating them for everyone */ |
243 | mpic_assign_isu(mpic1, 11, OpenPIC_PAddr + 0x10780); | 189 | mpic_assign_isu(mpic, 8, r.start + 0x10600); |
244 | 190 | mpic_assign_isu(mpic, 9, r.start + 0x10680); | |
245 | /* External ints */ | 191 | mpic_assign_isu(mpic, 10, r.start + 0x10700); |
246 | mpic_assign_isu(mpic1, 12, OpenPIC_PAddr + 0x10000); | 192 | mpic_assign_isu(mpic, 11, r.start + 0x10780); |
247 | mpic_assign_isu(mpic1, 13, OpenPIC_PAddr + 0x10080); | 193 | |
248 | mpic_assign_isu(mpic1, 14, OpenPIC_PAddr + 0x10100); | 194 | /* External Interrupts */ |
249 | 195 | mpic_assign_isu(mpic, 12, r.start + 0x10000); | |
250 | mpic_init(mpic1); | 196 | mpic_assign_isu(mpic, 13, r.start + 0x10080); |
197 | mpic_assign_isu(mpic, 14, r.start + 0x10100); | ||
198 | |||
199 | mpic_init(mpic); | ||
200 | |||
201 | #ifdef CONFIG_PPC_I8259 | ||
202 | /* Initialize the i8259 controller */ | ||
203 | for_each_node_by_type(np, "interrupt-controller") | ||
204 | if (device_is_compatible(np, "chrp,iic")) { | ||
205 | cascade_node = np; | ||
206 | break; | ||
207 | } | ||
208 | |||
209 | if (cascade_node == NULL) { | ||
210 | printk(KERN_DEBUG "Could not find i8259 PIC\n"); | ||
211 | return; | ||
212 | } | ||
251 | 213 | ||
252 | #ifdef CONFIG_PCI | 214 | cascade_irq = irq_of_parse_and_map(cascade_node, 0); |
253 | mpic_setup_cascade(PIRQ0A, i8259_irq_cascade, NULL); | 215 | if (cascade_irq == NO_IRQ) { |
216 | printk(KERN_ERR "Failed to map cascade interrupt\n"); | ||
217 | return; | ||
218 | } | ||
254 | 219 | ||
255 | i8259_init(0,0); | 220 | i8259_init(cascade_node, 0); |
256 | #endif | 221 | of_node_put(cascade_node); |
222 | |||
223 | set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade); | ||
224 | #endif /* CONFIG_PPC_I8259 */ | ||
257 | } | 225 | } |
258 | 226 | ||
259 | 227 | ||
@@ -298,8 +266,6 @@ mpc85xx_cds_setup_arch(void) | |||
298 | add_bridge(np); | 266 | add_bridge(np); |
299 | 267 | ||
300 | ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup; | 268 | ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup; |
301 | ppc_md.pci_swizzle = common_swizzle; | ||
302 | ppc_md.pci_map_irq = mpc85xx_map_irq; | ||
303 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; | 269 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; |
304 | #endif | 270 | #endif |
305 | 271 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h index 5d2bcf78cef7..41e554c4af94 100644 --- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h +++ b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h | |||
@@ -16,38 +16,6 @@ | |||
16 | 16 | ||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | 18 | ||
19 | /* PCI interrupt controller */ | ||
20 | #define PIRQA 3 | ||
21 | #define PIRQB 4 | ||
22 | #define PIRQC 5 | ||
23 | #define PIRQD 6 | ||
24 | #define PIRQ7 7 | ||
25 | #define PIRQE 9 | ||
26 | #define PIRQF 10 | ||
27 | #define PIRQG 11 | ||
28 | #define PIRQH 12 | ||
29 | |||
30 | /* PCI-Express memory map */ | ||
31 | #define MPC86XX_PCIE_LOWER_IO 0x00000000 | ||
32 | #define MPC86XX_PCIE_UPPER_IO 0x00ffffff | ||
33 | |||
34 | #define MPC86XX_PCIE_LOWER_MEM 0x80000000 | ||
35 | #define MPC86XX_PCIE_UPPER_MEM 0x9fffffff | ||
36 | |||
37 | #define MPC86XX_PCIE_IO_BASE 0xe2000000 | ||
38 | #define MPC86XX_PCIE_MEM_OFFSET 0x00000000 | ||
39 | |||
40 | #define MPC86XX_PCIE_IO_SIZE 0x01000000 | ||
41 | |||
42 | #define PCIE1_CFG_ADDR_OFFSET (0x8000) | ||
43 | #define PCIE1_CFG_DATA_OFFSET (0x8004) | ||
44 | |||
45 | #define PCIE2_CFG_ADDR_OFFSET (0x9000) | ||
46 | #define PCIE2_CFG_DATA_OFFSET (0x9004) | ||
47 | |||
48 | #define MPC86xx_PCIE_OFFSET PCIE1_CFG_ADDR_OFFSET | ||
49 | #define MPC86xx_PCIE_SIZE (0x1000) | ||
50 | |||
51 | #define MPC86XX_RSTCR_OFFSET (0xe00b0) /* Reset Control Register */ | 19 | #define MPC86XX_RSTCR_OFFSET (0xe00b0) /* Reset Control Register */ |
52 | 20 | ||
53 | #endif /* __MPC8641_HPCN_H__ */ | 21 | #endif /* __MPC8641_HPCN_H__ */ |
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index ebae73eb0063..146da3001c67 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
@@ -37,6 +37,14 @@ | |||
37 | #include "mpc86xx.h" | 37 | #include "mpc86xx.h" |
38 | #include "mpc8641_hpcn.h" | 38 | #include "mpc8641_hpcn.h" |
39 | 39 | ||
40 | #undef DEBUG | ||
41 | |||
42 | #ifdef DEBUG | ||
43 | #define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0) | ||
44 | #else | ||
45 | #define DBG(fmt...) do { } while(0) | ||
46 | #endif | ||
47 | |||
40 | #ifndef CONFIG_PCI | 48 | #ifndef CONFIG_PCI |
41 | unsigned long isa_io_base = 0; | 49 | unsigned long isa_io_base = 0; |
42 | unsigned long isa_mem_base = 0; | 50 | unsigned long isa_mem_base = 0; |
@@ -44,205 +52,215 @@ unsigned long pci_dram_offset = 0; | |||
44 | #endif | 52 | #endif |
45 | 53 | ||
46 | 54 | ||
47 | /* | 55 | static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc, |
48 | * Internal interrupts are all Level Sensitive, and Positive Polarity | 56 | struct pt_regs *regs) |
49 | */ | 57 | { |
50 | 58 | unsigned int cascade_irq = i8259_irq(regs); | |
51 | static u_char mpc86xx_hpcn_openpic_initsenses[] __initdata = { | 59 | if (cascade_irq != NO_IRQ) |
52 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 0: Reserved */ | 60 | generic_handle_irq(cascade_irq, regs); |
53 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 1: MCM */ | 61 | desc->chip->eoi(irq); |
54 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 2: DDR DRAM */ | 62 | } |
55 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 3: LBIU */ | ||
56 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 4: DMA 0 */ | ||
57 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 5: DMA 1 */ | ||
58 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 6: DMA 2 */ | ||
59 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 7: DMA 3 */ | ||
60 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 8: PCIE1 */ | ||
61 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 9: PCIE2 */ | ||
62 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 10: Reserved */ | ||
63 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 11: Reserved */ | ||
64 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 12: DUART2 */ | ||
65 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 13: TSEC 1 Transmit */ | ||
66 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 14: TSEC 1 Receive */ | ||
67 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 15: TSEC 3 transmit */ | ||
68 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 16: TSEC 3 receive */ | ||
69 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 17: TSEC 3 error */ | ||
70 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 18: TSEC 1 Receive/Transmit Error */ | ||
71 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 19: TSEC 2 Transmit */ | ||
72 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 20: TSEC 2 Receive */ | ||
73 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 21: TSEC 4 transmit */ | ||
74 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 22: TSEC 4 receive */ | ||
75 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 23: TSEC 4 error */ | ||
76 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 24: TSEC 2 Receive/Transmit Error */ | ||
77 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 25: Unused */ | ||
78 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 26: DUART1 */ | ||
79 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 27: I2C */ | ||
80 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 28: Performance Monitor */ | ||
81 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 29: Unused */ | ||
82 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 30: Unused */ | ||
83 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 31: Unused */ | ||
84 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 32: SRIO error/write-port unit */ | ||
85 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 33: SRIO outbound doorbell */ | ||
86 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 34: SRIO inbound doorbell */ | ||
87 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 35: Unused */ | ||
88 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 36: Unused */ | ||
89 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 37: SRIO outbound message unit 1 */ | ||
90 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 38: SRIO inbound message unit 1 */ | ||
91 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 39: SRIO outbound message unit 2 */ | ||
92 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 40: SRIO inbound message unit 2 */ | ||
93 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 41: Unused */ | ||
94 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 42: Unused */ | ||
95 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 43: Unused */ | ||
96 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 44: Unused */ | ||
97 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 45: Unused */ | ||
98 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 46: Unused */ | ||
99 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 47: Unused */ | ||
100 | 0x0, /* External 0: */ | ||
101 | 0x0, /* External 1: */ | ||
102 | 0x0, /* External 2: */ | ||
103 | 0x0, /* External 3: */ | ||
104 | 0x0, /* External 4: */ | ||
105 | 0x0, /* External 5: */ | ||
106 | 0x0, /* External 6: */ | ||
107 | 0x0, /* External 7: */ | ||
108 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 8: Pixis FPGA */ | ||
109 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 9: ULI 8259 INTR Cascade */ | ||
110 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 10: Quad ETH PHY */ | ||
111 | 0x0, /* External 11: */ | ||
112 | 0x0, | ||
113 | 0x0, | ||
114 | 0x0, | ||
115 | 0x0, | ||
116 | }; | ||
117 | |||
118 | 63 | ||
119 | void __init | 64 | void __init |
120 | mpc86xx_hpcn_init_irq(void) | 65 | mpc86xx_hpcn_init_irq(void) |
121 | { | 66 | { |
122 | struct mpic *mpic1; | 67 | struct mpic *mpic1; |
68 | struct device_node *np, *cascade_node = NULL; | ||
69 | int cascade_irq; | ||
123 | phys_addr_t openpic_paddr; | 70 | phys_addr_t openpic_paddr; |
124 | 71 | ||
72 | np = of_find_node_by_type(NULL, "open-pic"); | ||
73 | if (np == NULL) | ||
74 | return; | ||
75 | |||
125 | /* Determine the Physical Address of the OpenPIC regs */ | 76 | /* Determine the Physical Address of the OpenPIC regs */ |
126 | openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET; | 77 | openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET; |
127 | 78 | ||
128 | /* Alloc mpic structure and per isu has 16 INT entries. */ | 79 | /* Alloc mpic structure and per isu has 16 INT entries. */ |
129 | mpic1 = mpic_alloc(openpic_paddr, | 80 | mpic1 = mpic_alloc(np, openpic_paddr, |
130 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 81 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, |
131 | 16, MPC86xx_OPENPIC_IRQ_OFFSET, 0, 250, | 82 | 16, NR_IRQS - 4, |
132 | mpc86xx_hpcn_openpic_initsenses, | ||
133 | sizeof(mpc86xx_hpcn_openpic_initsenses), | ||
134 | " MPIC "); | 83 | " MPIC "); |
135 | BUG_ON(mpic1 == NULL); | 84 | BUG_ON(mpic1 == NULL); |
136 | 85 | ||
86 | mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10000); | ||
87 | |||
137 | /* 48 Internal Interrupts */ | 88 | /* 48 Internal Interrupts */ |
138 | mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10200); | 89 | mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10200); |
139 | mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10400); | 90 | mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10400); |
140 | mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10600); | 91 | mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10600); |
141 | 92 | ||
142 | /* 16 External interrupts */ | 93 | /* 16 External interrupts |
143 | mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10000); | 94 | * Moving them from [0 - 15] to [64 - 79] |
95 | */ | ||
96 | mpic_assign_isu(mpic1, 4, openpic_paddr + 0x10000); | ||
144 | 97 | ||
145 | mpic_init(mpic1); | 98 | mpic_init(mpic1); |
146 | 99 | ||
147 | #ifdef CONFIG_PCI | 100 | #ifdef CONFIG_PCI |
148 | mpic_setup_cascade(MPC86xx_IRQ_EXT9, i8259_irq_cascade, NULL); | 101 | /* Initialize i8259 controller */ |
149 | i8259_init(0, I8259_OFFSET); | 102 | for_each_node_by_type(np, "interrupt-controller") |
150 | #endif | 103 | if (device_is_compatible(np, "chrp,iic")) { |
151 | } | 104 | cascade_node = np; |
105 | break; | ||
106 | } | ||
107 | if (cascade_node == NULL) { | ||
108 | printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n"); | ||
109 | return; | ||
110 | } | ||
152 | 111 | ||
112 | cascade_irq = irq_of_parse_and_map(cascade_node, 0); | ||
113 | if (cascade_irq == NO_IRQ) { | ||
114 | printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt"); | ||
115 | return; | ||
116 | } | ||
117 | DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq); | ||
153 | 118 | ||
119 | i8259_init(cascade_node, 0); | ||
120 | set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade); | ||
121 | #endif | ||
122 | } | ||
154 | 123 | ||
155 | #ifdef CONFIG_PCI | 124 | #ifdef CONFIG_PCI |
156 | /* | ||
157 | * interrupt routing | ||
158 | */ | ||
159 | 125 | ||
160 | int | 126 | enum pirq{PIRQA = 8, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH}; |
161 | mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | 127 | const unsigned char uli1575_irq_route_table[16] = { |
128 | 0, /* 0: Reserved */ | ||
129 | 0x8, /* 1: 0b1000 */ | ||
130 | 0, /* 2: Reserved */ | ||
131 | 0x2, /* 3: 0b0010 */ | ||
132 | 0x4, /* 4: 0b0100 */ | ||
133 | 0x5, /* 5: 0b0101 */ | ||
134 | 0x7, /* 6: 0b0111 */ | ||
135 | 0x6, /* 7: 0b0110 */ | ||
136 | 0, /* 8: Reserved */ | ||
137 | 0x1, /* 9: 0b0001 */ | ||
138 | 0x3, /* 10: 0b0011 */ | ||
139 | 0x9, /* 11: 0b1001 */ | ||
140 | 0xb, /* 12: 0b1011 */ | ||
141 | 0, /* 13: Reserved */ | ||
142 | 0xd, /* 14, 0b1101 */ | ||
143 | 0xf, /* 15, 0b1111 */ | ||
144 | }; | ||
145 | |||
146 | static int __devinit | ||
147 | get_pci_irq_from_of(struct pci_controller *hose, int slot, int pin) | ||
162 | { | 148 | { |
163 | static char pci_irq_table[][4] = { | 149 | struct of_irq oirq; |
164 | /* | 150 | u32 laddr[3]; |
165 | * PCI IDSEL/INTPIN->INTLINE | 151 | struct device_node *hosenode = hose ? hose->arch_data : NULL; |
166 | * A B C D | 152 | |
167 | */ | 153 | if (!hosenode) return -EINVAL; |
168 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 17 -- PCI Slot 1 */ | 154 | |
169 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 18 -- PCI Slot 2 */ | 155 | laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(slot, 0) << 8); |
170 | {0, 0, 0, 0}, /* IDSEL 19 */ | 156 | laddr[1] = laddr[2] = 0; |
171 | {0, 0, 0, 0}, /* IDSEL 20 */ | 157 | of_irq_map_raw(hosenode, &pin, laddr, &oirq); |
172 | {0, 0, 0, 0}, /* IDSEL 21 */ | 158 | DBG("mpc86xx_hpcn: pci irq addr %x, slot %d, pin %d, irq %d\n", |
173 | {0, 0, 0, 0}, /* IDSEL 22 */ | 159 | laddr[0], slot, pin, oirq.specifier[0]); |
174 | {0, 0, 0, 0}, /* IDSEL 23 */ | 160 | return oirq.specifier[0]; |
175 | {0, 0, 0, 0}, /* IDSEL 24 */ | ||
176 | {0, 0, 0, 0}, /* IDSEL 25 */ | ||
177 | {PIRQD, PIRQA, PIRQB, PIRQC}, /* IDSEL 26 -- PCI Bridge*/ | ||
178 | {PIRQC, 0, 0, 0}, /* IDSEL 27 -- LAN */ | ||
179 | {PIRQE, PIRQF, PIRQH, PIRQ7}, /* IDSEL 28 -- USB 1.1 */ | ||
180 | {PIRQE, PIRQF, PIRQG, 0}, /* IDSEL 29 -- Audio & Modem */ | ||
181 | {PIRQH, 0, 0, 0}, /* IDSEL 30 -- LPC & PMU*/ | ||
182 | {PIRQD, 0, 0, 0}, /* IDSEL 31 -- ATA */ | ||
183 | }; | ||
184 | |||
185 | const long min_idsel = 17, max_idsel = 31, irqs_per_slot = 4; | ||
186 | return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; | ||
187 | } | 161 | } |
188 | 162 | ||
189 | static void __devinit quirk_ali1575(struct pci_dev *dev) | 163 | static void __devinit quirk_uli1575(struct pci_dev *dev) |
190 | { | 164 | { |
191 | unsigned short temp; | 165 | unsigned short temp; |
166 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
167 | unsigned char irq2pin[16]; | ||
168 | unsigned long pirq_map_word = 0; | ||
169 | u32 irq; | ||
170 | int i; | ||
192 | 171 | ||
193 | /* | 172 | /* |
194 | * ALI1575 interrupts route table setup: | 173 | * ULI1575 interrupts route setup |
174 | */ | ||
175 | memset(irq2pin, 0, 16); /* Initialize default value 0 */ | ||
176 | |||
177 | /* | ||
178 | * PIRQA -> PIRQD mapping read from OF-tree | ||
179 | * | ||
180 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
181 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
182 | */ | ||
183 | for (i = 0; i < 4; i++){ | ||
184 | irq = get_pci_irq_from_of(hose, 17, i + 1); | ||
185 | if (irq > 0 && irq < 16) | ||
186 | irq2pin[irq] = PIRQA + i; | ||
187 | else | ||
188 | printk(KERN_WARNING "ULI1575 device" | ||
189 | "(slot %d, pin %d) irq %d is invalid.\n", | ||
190 | 17, i, irq); | ||
191 | } | ||
192 | |||
193 | /* | ||
194 | * PIRQE -> PIRQF mapping set manually | ||
195 | * | 195 | * |
196 | * IRQ pin IRQ# | 196 | * IRQ pin IRQ# |
197 | * PIRQA ---- 3 | ||
198 | * PIRQB ---- 4 | ||
199 | * PIRQC ---- 5 | ||
200 | * PIRQD ---- 6 | ||
201 | * PIRQE ---- 9 | 197 | * PIRQE ---- 9 |
202 | * PIRQF ---- 10 | 198 | * PIRQF ---- 10 |
203 | * PIRQG ---- 11 | 199 | * PIRQG ---- 11 |
204 | * PIRQH ---- 12 | 200 | * PIRQH ---- 12 |
205 | * | ||
206 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
207 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
208 | */ | 201 | */ |
209 | pci_write_config_dword(dev, 0x48, 0xb9317542); | 202 | for (i = 0; i < 4; i++) irq2pin[i + 9] = PIRQE + i; |
203 | |||
204 | /* Set IRQ-PIRQ Mapping to ULI1575 */ | ||
205 | for (i = 0; i < 16; i++) | ||
206 | if (irq2pin[i]) | ||
207 | pirq_map_word |= (uli1575_irq_route_table[i] & 0xf) | ||
208 | << ((irq2pin[i] - PIRQA) * 4); | ||
210 | 209 | ||
211 | /* USB 1.1 OHCI controller 1, interrupt: PIRQE */ | 210 | /* ULI1575 IRQ mapping conf register default value is 0xb9317542 */ |
212 | pci_write_config_byte(dev, 0x86, 0x0c); | 211 | DBG("Setup ULI1575 IRQ mapping configuration register value = 0x%x\n", |
212 | pirq_map_word); | ||
213 | pci_write_config_dword(dev, 0x48, pirq_map_word); | ||
213 | 214 | ||
214 | /* USB 1.1 OHCI controller 2, interrupt: PIRQF */ | 215 | #define ULI1575_SET_DEV_IRQ(slot, pin, reg) \ |
215 | pci_write_config_byte(dev, 0x87, 0x0d); | 216 | do { \ |
217 | int irq; \ | ||
218 | irq = get_pci_irq_from_of(hose, slot, pin); \ | ||
219 | if (irq > 0 && irq < 16) \ | ||
220 | pci_write_config_byte(dev, reg, irq2pin[irq]); \ | ||
221 | else \ | ||
222 | printk(KERN_WARNING "ULI1575 device" \ | ||
223 | "(slot %d, pin %d) irq %d is invalid.\n", \ | ||
224 | slot, pin, irq); \ | ||
225 | } while(0) | ||
216 | 226 | ||
217 | /* USB 1.1 OHCI controller 3, interrupt: PIRQH */ | 227 | /* USB 1.1 OHCI controller 1, slot 28, pin 1 */ |
218 | pci_write_config_byte(dev, 0x88, 0x0f); | 228 | ULI1575_SET_DEV_IRQ(28, 1, 0x86); |
219 | 229 | ||
220 | /* USB 2.0 controller, interrupt: PIRQ7 */ | 230 | /* USB 1.1 OHCI controller 2, slot 28, pin 2 */ |
221 | pci_write_config_byte(dev, 0x74, 0x06); | 231 | ULI1575_SET_DEV_IRQ(28, 2, 0x87); |
222 | 232 | ||
223 | /* Audio controller, interrupt: PIRQE */ | 233 | /* USB 1.1 OHCI controller 3, slot 28, pin 3 */ |
224 | pci_write_config_byte(dev, 0x8a, 0x0c); | 234 | ULI1575_SET_DEV_IRQ(28, 3, 0x88); |
225 | 235 | ||
226 | /* Modem controller, interrupt: PIRQF */ | 236 | /* USB 2.0 controller, slot 28, pin 4 */ |
227 | pci_write_config_byte(dev, 0x8b, 0x0d); | 237 | irq = get_pci_irq_from_of(hose, 28, 4); |
238 | if (irq >= 0 && irq <=15) | ||
239 | pci_write_config_dword(dev, 0x74, uli1575_irq_route_table[irq]); | ||
228 | 240 | ||
229 | /* HD audio controller, interrupt: PIRQG */ | 241 | /* Audio controller, slot 29, pin 1 */ |
230 | pci_write_config_byte(dev, 0x8c, 0x0e); | 242 | ULI1575_SET_DEV_IRQ(29, 1, 0x8a); |
231 | 243 | ||
232 | /* Serial ATA interrupt: PIRQD */ | 244 | /* Modem controller, slot 29, pin 2 */ |
233 | pci_write_config_byte(dev, 0x8d, 0x0b); | 245 | ULI1575_SET_DEV_IRQ(29, 2, 0x8b); |
234 | 246 | ||
235 | /* SMB interrupt: PIRQH */ | 247 | /* HD audio controller, slot 29, pin 3 */ |
236 | pci_write_config_byte(dev, 0x8e, 0x0f); | 248 | ULI1575_SET_DEV_IRQ(29, 3, 0x8c); |
237 | 249 | ||
238 | /* PMU ACPI SCI interrupt: PIRQH */ | 250 | /* SMB interrupt: slot 30, pin 1 */ |
239 | pci_write_config_byte(dev, 0x8f, 0x0f); | 251 | ULI1575_SET_DEV_IRQ(30, 1, 0x8e); |
252 | |||
253 | /* PMU ACPI SCI interrupt: slot 30, pin 2 */ | ||
254 | ULI1575_SET_DEV_IRQ(30, 2, 0x8f); | ||
255 | |||
256 | /* Serial ATA interrupt: slot 31, pin 1 */ | ||
257 | ULI1575_SET_DEV_IRQ(31, 1, 0x8d); | ||
240 | 258 | ||
241 | /* Primary PATA IDE IRQ: 14 | 259 | /* Primary PATA IDE IRQ: 14 |
242 | * Secondary PATA IDE IRQ: 15 | 260 | * Secondary PATA IDE IRQ: 15 |
243 | */ | 261 | */ |
244 | pci_write_config_byte(dev, 0x44, 0x3d); | 262 | pci_write_config_byte(dev, 0x44, 0x30 | uli1575_irq_route_table[14]); |
245 | pci_write_config_byte(dev, 0x75, 0x0f); | 263 | pci_write_config_byte(dev, 0x75, uli1575_irq_route_table[15]); |
246 | 264 | ||
247 | /* Set IRQ14 and IRQ15 to legacy IRQs */ | 265 | /* Set IRQ14 and IRQ15 to legacy IRQs */ |
248 | pci_read_config_word(dev, 0x46, &temp); | 266 | pci_read_config_word(dev, 0x46, &temp); |
@@ -264,6 +282,8 @@ static void __devinit quirk_ali1575(struct pci_dev *dev) | |||
264 | */ | 282 | */ |
265 | outb(0xfa, 0x4d0); | 283 | outb(0xfa, 0x4d0); |
266 | outb(0x1e, 0x4d1); | 284 | outb(0x1e, 0x4d1); |
285 | |||
286 | #undef ULI1575_SET_DEV_IRQ | ||
267 | } | 287 | } |
268 | 288 | ||
269 | static void __devinit quirk_uli5288(struct pci_dev *dev) | 289 | static void __devinit quirk_uli5288(struct pci_dev *dev) |
@@ -306,7 +326,7 @@ static void __devinit early_uli5249(struct pci_dev *dev) | |||
306 | dev->class |= 0x1; | 326 | dev->class |= 0x1; |
307 | } | 327 | } |
308 | 328 | ||
309 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575); | 329 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575); |
310 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); | 330 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); |
311 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); | 331 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); |
312 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); | 332 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); |
@@ -337,8 +357,6 @@ mpc86xx_hpcn_setup_arch(void) | |||
337 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 357 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
338 | add_bridge(np); | 358 | add_bridge(np); |
339 | 359 | ||
340 | ppc_md.pci_swizzle = common_swizzle; | ||
341 | ppc_md.pci_map_irq = mpc86xx_map_irq; | ||
342 | ppc_md.pci_exclude_device = mpc86xx_exclude_device; | 360 | ppc_md.pci_exclude_device = mpc86xx_exclude_device; |
343 | #endif | 361 | #endif |
344 | 362 | ||
@@ -377,6 +395,15 @@ mpc86xx_hpcn_show_cpuinfo(struct seq_file *m) | |||
377 | } | 395 | } |
378 | 396 | ||
379 | 397 | ||
398 | void __init mpc86xx_hpcn_pcibios_fixup(void) | ||
399 | { | ||
400 | struct pci_dev *dev = NULL; | ||
401 | |||
402 | for_each_pci_dev(dev) | ||
403 | pci_read_irq_line(dev); | ||
404 | } | ||
405 | |||
406 | |||
380 | /* | 407 | /* |
381 | * Called very early, device-tree isn't unflattened | 408 | * Called very early, device-tree isn't unflattened |
382 | */ | 409 | */ |
@@ -431,6 +458,7 @@ define_machine(mpc86xx_hpcn) { | |||
431 | .setup_arch = mpc86xx_hpcn_setup_arch, | 458 | .setup_arch = mpc86xx_hpcn_setup_arch, |
432 | .init_IRQ = mpc86xx_hpcn_init_irq, | 459 | .init_IRQ = mpc86xx_hpcn_init_irq, |
433 | .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo, | 460 | .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo, |
461 | .pcibios_fixup = mpc86xx_hpcn_pcibios_fixup, | ||
434 | .get_irq = mpic_get_irq, | 462 | .get_irq = mpic_get_irq, |
435 | .restart = mpc86xx_restart, | 463 | .restart = mpc86xx_restart, |
436 | .time_init = mpc86xx_time_init, | 464 | .time_init = mpc86xx_time_init, |
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c index d7a4fc7ca238..ed00ed2455dd 100644 --- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c +++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * mpc7448_hpc2.c | 2 | * mpc7448_hpc2.c |
3 | * | 3 | * |
4 | * Board setup routines for the Freescale Taiga platform | 4 | * Board setup routines for the Freescale mpc7448hpc2(taiga) platform |
5 | * | 5 | * |
6 | * Author: Jacob Pan | 6 | * Author: Jacob Pan |
7 | * jacob.pan@freescale.com | 7 | * jacob.pan@freescale.com |
@@ -12,10 +12,10 @@ | |||
12 | * | 12 | * |
13 | * Copyright 2004-2006 Freescale Semiconductor, Inc. | 13 | * Copyright 2004-2006 Freescale Semiconductor, Inc. |
14 | * | 14 | * |
15 | * This file is licensed under | 15 | * This program is free software; you can redistribute it and/or |
16 | * the terms of the GNU General Public License version 2. This program | 16 | * modify it under the terms of the GNU General Public License |
17 | * is licensed "as is" without any warranty of any kind, whether express | 17 | * as published by the Free Software Foundation; either version |
18 | * or implied. | 18 | * 2 of the License, or (at your option) any later version. |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/config.h> | 21 | #include <linux/config.h> |
@@ -62,43 +62,8 @@ pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET; | |||
62 | extern int tsi108_setup_pci(struct device_node *dev); | 62 | extern int tsi108_setup_pci(struct device_node *dev); |
63 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); | 63 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); |
64 | extern void tsi108_pci_int_init(void); | 64 | extern void tsi108_pci_int_init(void); |
65 | extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused); | 65 | extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc, |
66 | 66 | struct pt_regs *regs); | |
67 | /* | ||
68 | * Define all of the IRQ senses and polarities. Taken from the | ||
69 | * mpc7448hpc manual. | ||
70 | * Note: Likely, this table and the following function should be | ||
71 | * obtained and derived from the OF Device Tree. | ||
72 | */ | ||
73 | |||
74 | static u_char mpc7448_hpc2_pic_initsenses[] __initdata = { | ||
75 | /* External on-board sources */ | ||
76 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */ | ||
77 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */ | ||
78 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */ | ||
79 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */ | ||
80 | /* Internal Tsi108/109 interrupt sources */ | ||
81 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
82 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
83 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
84 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
85 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */ | ||
86 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */ | ||
87 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */ | ||
88 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */ | ||
89 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */ | ||
90 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */ | ||
91 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */ | ||
92 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */ | ||
93 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */ | ||
94 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */ | ||
95 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
96 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */ | ||
97 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */ | ||
98 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */ | ||
99 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
100 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */ | ||
101 | }; | ||
102 | 67 | ||
103 | int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) | 68 | int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) |
104 | { | 69 | { |
@@ -229,6 +194,8 @@ static void __init mpc7448_hpc2_init_IRQ(void) | |||
229 | { | 194 | { |
230 | struct mpic *mpic; | 195 | struct mpic *mpic; |
231 | phys_addr_t mpic_paddr = 0; | 196 | phys_addr_t mpic_paddr = 0; |
197 | unsigned int cascade_pci_irq; | ||
198 | struct device_node *tsi_pci; | ||
232 | struct device_node *tsi_pic; | 199 | struct device_node *tsi_pic; |
233 | 200 | ||
234 | tsi_pic = of_find_node_by_type(NULL, "open-pic"); | 201 | tsi_pic = of_find_node_by_type(NULL, "open-pic"); |
@@ -246,24 +213,31 @@ static void __init mpc7448_hpc2_init_IRQ(void) | |||
246 | DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, | 213 | DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, |
247 | (u32) mpic_paddr); | 214 | (u32) mpic_paddr); |
248 | 215 | ||
249 | mpic = mpic_alloc(mpic_paddr, | 216 | mpic = mpic_alloc(tsi_pic, mpic_paddr, |
250 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | | 217 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | |
251 | MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108), | 218 | MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108), |
252 | 0, /* num_sources used */ | 219 | 0, /* num_sources used */ |
253 | TSI108_IRQ_BASE, | ||
254 | 0, /* num_sources used */ | 220 | 0, /* num_sources used */ |
255 | NR_IRQS - 4 /* XXXX */, | 221 | "Tsi108_PIC"); |
256 | mpc7448_hpc2_pic_initsenses, | ||
257 | sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC"); | ||
258 | 222 | ||
259 | BUG_ON(mpic == NULL); /* XXXX */ | 223 | BUG_ON(mpic == NULL); /* XXXX */ |
260 | |||
261 | mpic_init(mpic); | 224 | mpic_init(mpic); |
262 | mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic); | 225 | |
226 | tsi_pci = of_find_node_by_type(NULL, "pci"); | ||
227 | if (tsi_pci == 0) { | ||
228 | printk("%s: No tsi108 pci node found !\n", __FUNCTION__); | ||
229 | return; | ||
230 | } | ||
231 | |||
232 | cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0); | ||
233 | set_irq_data(cascade_pci_irq, mpic); | ||
234 | set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); | ||
235 | |||
263 | tsi108_pci_int_init(); | 236 | tsi108_pci_int_init(); |
264 | 237 | ||
265 | /* Configure MPIC outputs to CPU0 */ | 238 | /* Configure MPIC outputs to CPU0 */ |
266 | tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); | 239 | tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); |
240 | of_node_put(tsi_pic); | ||
267 | } | 241 | } |
268 | 242 | ||
269 | void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) | 243 | void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) |
@@ -320,6 +294,7 @@ static int mpc7448_machine_check_exception(struct pt_regs *regs) | |||
320 | return 0; | 294 | return 0; |
321 | 295 | ||
322 | } | 296 | } |
297 | |||
323 | define_machine(mpc7448_hpc2){ | 298 | define_machine(mpc7448_hpc2){ |
324 | .name = "MPC7448 HPC2", | 299 | .name = "MPC7448 HPC2", |
325 | .probe = mpc7448_hpc2_probe, | 300 | .probe = mpc7448_hpc2_probe, |
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c index 6a026c733f6a..9d73d0234c5d 100644 --- a/arch/powerpc/platforms/powermac/bootx_init.c +++ b/arch/powerpc/platforms/powermac/bootx_init.c | |||
@@ -411,8 +411,15 @@ static unsigned long __init bootx_flatten_dt(unsigned long start) | |||
411 | DBG("End of boot params: %x\n", mem_end); | 411 | DBG("End of boot params: %x\n", mem_end); |
412 | rsvmap[0] = mem_start; | 412 | rsvmap[0] = mem_start; |
413 | rsvmap[1] = mem_end; | 413 | rsvmap[1] = mem_end; |
414 | rsvmap[2] = 0; | 414 | if (bootx_info->ramDisk) { |
415 | rsvmap[3] = 0; | 415 | rsvmap[2] = ((unsigned long)bootx_info) + bootx_info->ramDisk; |
416 | rsvmap[3] = rsvmap[2] + bootx_info->ramDiskSize; | ||
417 | rsvmap[4] = 0; | ||
418 | rsvmap[5] = 0; | ||
419 | } else { | ||
420 | rsvmap[2] = 0; | ||
421 | rsvmap[3] = 0; | ||
422 | } | ||
416 | 423 | ||
417 | return (unsigned long)hdr; | 424 | return (unsigned long)hdr; |
418 | } | 425 | } |
@@ -543,12 +550,12 @@ void __init bootx_init(unsigned long r3, unsigned long r4) | |||
543 | */ | 550 | */ |
544 | if (bi->version < 5) { | 551 | if (bi->version < 5) { |
545 | space = bi->deviceTreeOffset + bi->deviceTreeSize; | 552 | space = bi->deviceTreeOffset + bi->deviceTreeSize; |
546 | if (bi->ramDisk) | 553 | if (bi->ramDisk >= space) |
547 | space = bi->ramDisk + bi->ramDiskSize; | 554 | space = bi->ramDisk + bi->ramDiskSize; |
548 | } else | 555 | } else |
549 | space = bi->totalParamsSize; | 556 | space = bi->totalParamsSize; |
550 | 557 | ||
551 | bootx_printf("Total space used by parameters & ramdisk: %x \n", space); | 558 | bootx_printf("Total space used by parameters & ramdisk: 0x%x \n", space); |
552 | 559 | ||
553 | /* New BootX will have flushed all TLBs and enters kernel with | 560 | /* New BootX will have flushed all TLBs and enters kernel with |
554 | * MMU switched OFF, so this should not be useful anymore. | 561 | * MMU switched OFF, so this should not be useful anymore. |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 71c634e0b87c..31867a701fcb 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -213,8 +213,6 @@ static void pseries_lpar_enable_pmcs(void) | |||
213 | { | 213 | { |
214 | unsigned long set, reset; | 214 | unsigned long set, reset; |
215 | 215 | ||
216 | power4_enable_pmcs(); | ||
217 | |||
218 | set = 1UL << 63; | 216 | set = 1UL << 63; |
219 | reset = 0; | 217 | reset = 0; |
220 | plpar_hcall_norets(H_PERFMON, set, reset); | 218 | plpar_hcall_norets(H_PERFMON, set, reset); |
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index 2d0da6f9e244..e98863025721 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -467,7 +467,7 @@ void xics_setup_cpu(void) | |||
467 | * | 467 | * |
468 | * XXX: undo of teardown on kexec needs this too, as may hotplug | 468 | * XXX: undo of teardown on kexec needs this too, as may hotplug |
469 | */ | 469 | */ |
470 | rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, | 470 | rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, |
471 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 1); | 471 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 1); |
472 | } | 472 | } |
473 | 473 | ||
@@ -796,7 +796,7 @@ void xics_teardown_cpu(int secondary) | |||
796 | * so leave the master cpu in the group. | 796 | * so leave the master cpu in the group. |
797 | */ | 797 | */ |
798 | if (secondary) | 798 | if (secondary) |
799 | rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, | 799 | rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, |
800 | (1UL << interrupt_server_size) - 1 - | 800 | (1UL << interrupt_server_size) - 1 - |
801 | default_distrib_server, 0); | 801 | default_distrib_server, 0); |
802 | } | 802 | } |
@@ -813,7 +813,7 @@ void xics_migrate_irqs_away(void) | |||
813 | xics_set_cpu_priority(cpu, 0); | 813 | xics_set_cpu_priority(cpu, 0); |
814 | 814 | ||
815 | /* remove ourselves from the global interrupt queue */ | 815 | /* remove ourselves from the global interrupt queue */ |
816 | status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, | 816 | status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, |
817 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 0); | 817 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 0); |
818 | WARN_ON(status < 0); | 818 | WARN_ON(status < 0); |
819 | 819 | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index e983972132d8..ef10bcf2d943 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -85,11 +85,8 @@ static int __init gfar_mdio_of_init(void) | |||
85 | mdio_data.irq[k] = -1; | 85 | mdio_data.irq[k] = -1; |
86 | 86 | ||
87 | while ((child = of_get_next_child(np, child)) != NULL) { | 87 | while ((child = of_get_next_child(np, child)) != NULL) { |
88 | if (child->n_intrs) { | 88 | u32 *id = get_property(child, "reg", NULL); |
89 | u32 *id = | 89 | mdio_data.irq[*id] = irq_of_parse_and_map(child, 0); |
90 | (u32 *) get_property(child, "reg", NULL); | ||
91 | mdio_data.irq[*id] = child->intrs[0].line; | ||
92 | } | ||
93 | } | 90 | } |
94 | 91 | ||
95 | ret = | 92 | ret = |
@@ -131,6 +128,7 @@ static int __init gfar_of_init(void) | |||
131 | char *model; | 128 | char *model; |
132 | void *mac_addr; | 129 | void *mac_addr; |
133 | phandle *ph; | 130 | phandle *ph; |
131 | int n_res = 1; | ||
134 | 132 | ||
135 | memset(r, 0, sizeof(r)); | 133 | memset(r, 0, sizeof(r)); |
136 | memset(&gfar_data, 0, sizeof(gfar_data)); | 134 | memset(&gfar_data, 0, sizeof(gfar_data)); |
@@ -139,8 +137,7 @@ static int __init gfar_of_init(void) | |||
139 | if (ret) | 137 | if (ret) |
140 | goto err; | 138 | goto err; |
141 | 139 | ||
142 | r[1].start = np->intrs[0].line; | 140 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); |
143 | r[1].end = np->intrs[0].line; | ||
144 | r[1].flags = IORESOURCE_IRQ; | 141 | r[1].flags = IORESOURCE_IRQ; |
145 | 142 | ||
146 | model = get_property(np, "model", NULL); | 143 | model = get_property(np, "model", NULL); |
@@ -150,27 +147,35 @@ static int __init gfar_of_init(void) | |||
150 | r[1].name = gfar_tx_intr; | 147 | r[1].name = gfar_tx_intr; |
151 | 148 | ||
152 | r[2].name = gfar_rx_intr; | 149 | r[2].name = gfar_rx_intr; |
153 | r[2].start = np->intrs[1].line; | 150 | r[2].start = r[2].end = irq_of_parse_and_map(np, 1); |
154 | r[2].end = np->intrs[1].line; | ||
155 | r[2].flags = IORESOURCE_IRQ; | 151 | r[2].flags = IORESOURCE_IRQ; |
156 | 152 | ||
157 | r[3].name = gfar_err_intr; | 153 | r[3].name = gfar_err_intr; |
158 | r[3].start = np->intrs[2].line; | 154 | r[3].start = r[3].end = irq_of_parse_and_map(np, 2); |
159 | r[3].end = np->intrs[2].line; | ||
160 | r[3].flags = IORESOURCE_IRQ; | 155 | r[3].flags = IORESOURCE_IRQ; |
156 | |||
157 | n_res += 2; | ||
161 | } | 158 | } |
162 | 159 | ||
163 | gfar_dev = | 160 | gfar_dev = |
164 | platform_device_register_simple("fsl-gianfar", i, &r[0], | 161 | platform_device_register_simple("fsl-gianfar", i, &r[0], |
165 | np->n_intrs + 1); | 162 | n_res + 1); |
166 | 163 | ||
167 | if (IS_ERR(gfar_dev)) { | 164 | if (IS_ERR(gfar_dev)) { |
168 | ret = PTR_ERR(gfar_dev); | 165 | ret = PTR_ERR(gfar_dev); |
169 | goto err; | 166 | goto err; |
170 | } | 167 | } |
171 | 168 | ||
172 | mac_addr = get_property(np, "address", NULL); | 169 | mac_addr = get_property(np, "local-mac-address", NULL); |
173 | memcpy(gfar_data.mac_addr, mac_addr, 6); | 170 | if (mac_addr == NULL) |
171 | mac_addr = get_property(np, "mac-address", NULL); | ||
172 | if (mac_addr == NULL) { | ||
173 | /* Obsolete */ | ||
174 | mac_addr = get_property(np, "address", NULL); | ||
175 | } | ||
176 | |||
177 | if (mac_addr) | ||
178 | memcpy(gfar_data.mac_addr, mac_addr, 6); | ||
174 | 179 | ||
175 | if (model && !strcasecmp(model, "TSEC")) | 180 | if (model && !strcasecmp(model, "TSEC")) |
176 | gfar_data.device_flags = | 181 | gfar_data.device_flags = |
@@ -251,8 +256,7 @@ static int __init fsl_i2c_of_init(void) | |||
251 | if (ret) | 256 | if (ret) |
252 | goto err; | 257 | goto err; |
253 | 258 | ||
254 | r[1].start = np->intrs[0].line; | 259 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); |
255 | r[1].end = np->intrs[0].line; | ||
256 | r[1].flags = IORESOURCE_IRQ; | 260 | r[1].flags = IORESOURCE_IRQ; |
257 | 261 | ||
258 | i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); | 262 | i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); |
@@ -388,8 +392,7 @@ static int __init fsl_usb_of_init(void) | |||
388 | if (ret) | 392 | if (ret) |
389 | goto err; | 393 | goto err; |
390 | 394 | ||
391 | r[1].start = np->intrs[0].line; | 395 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); |
392 | r[1].end = np->intrs[0].line; | ||
393 | r[1].flags = IORESOURCE_IRQ; | 396 | r[1].flags = IORESOURCE_IRQ; |
394 | 397 | ||
395 | usb_dev_mph = | 398 | usb_dev_mph = |
@@ -437,8 +440,7 @@ static int __init fsl_usb_of_init(void) | |||
437 | if (ret) | 440 | if (ret) |
438 | goto unreg_mph; | 441 | goto unreg_mph; |
439 | 442 | ||
440 | r[1].start = np->intrs[0].line; | 443 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); |
441 | r[1].end = np->intrs[0].line; | ||
442 | r[1].flags = IORESOURCE_IRQ; | 444 | r[1].flags = IORESOURCE_IRQ; |
443 | 445 | ||
444 | usb_dev_dr = | 446 | usb_dev_dr = |
diff --git a/arch/powerpc/sysdev/tsi108_dev.c b/arch/powerpc/sysdev/tsi108_dev.c index 26a0cc820cde..f3038461d4c0 100644 --- a/arch/powerpc/sysdev/tsi108_dev.c +++ b/arch/powerpc/sysdev/tsi108_dev.c | |||
@@ -93,13 +93,15 @@ static int __init tsi108_eth_of_init(void) | |||
93 | goto err; | 93 | goto err; |
94 | 94 | ||
95 | r[1].name = "tx"; | 95 | r[1].name = "tx"; |
96 | r[1].start = np->intrs[0].line; | 96 | r[1].start = irq_of_parse_and_map(np, 0); |
97 | r[1].end = np->intrs[0].line; | 97 | r[1].end = irq_of_parse_and_map(np, 0); |
98 | r[1].flags = IORESOURCE_IRQ; | 98 | r[1].flags = IORESOURCE_IRQ; |
99 | DBG("%s: name:start->end = %s:0x%lx-> 0x%lx\n", | ||
100 | __FUNCTION__,r[1].name, r[1].start, r[1].end); | ||
99 | 101 | ||
100 | tsi_eth_dev = | 102 | tsi_eth_dev = |
101 | platform_device_register_simple("tsi-ethernet", i, &r[0], | 103 | platform_device_register_simple("tsi-ethernet", i, &r[0], |
102 | np->n_intrs + 1); | 104 | 1); |
103 | 105 | ||
104 | if (IS_ERR(tsi_eth_dev)) { | 106 | if (IS_ERR(tsi_eth_dev)) { |
105 | ret = PTR_ERR(tsi_eth_dev); | 107 | ret = PTR_ERR(tsi_eth_dev); |
@@ -127,7 +129,7 @@ static int __init tsi108_eth_of_init(void) | |||
127 | tsi_eth_data.regs = r[0].start; | 129 | tsi_eth_data.regs = r[0].start; |
128 | tsi_eth_data.phyregs = res.start; | 130 | tsi_eth_data.phyregs = res.start; |
129 | tsi_eth_data.phy = *phy_id; | 131 | tsi_eth_data.phy = *phy_id; |
130 | tsi_eth_data.irq_num = np->intrs[0].line; | 132 | tsi_eth_data.irq_num = irq_of_parse_and_map(np, 0); |
131 | of_node_put(phy); | 133 | of_node_put(phy); |
132 | ret = | 134 | ret = |
133 | platform_device_add_data(tsi_eth_dev, &tsi_eth_data, | 135 | platform_device_add_data(tsi_eth_dev, &tsi_eth_data, |
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index 3265d54c82ed..2ab06ed3ae73 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
27 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
28 | 28 | ||
29 | |||
30 | #include <asm/byteorder.h> | 29 | #include <asm/byteorder.h> |
31 | #include <asm/io.h> | 30 | #include <asm/io.h> |
32 | #include <asm/irq.h> | 31 | #include <asm/irq.h> |
@@ -228,7 +227,7 @@ int __init tsi108_setup_pci(struct device_node *dev) | |||
228 | 227 | ||
229 | (hose)->ops = &tsi108_direct_pci_ops; | 228 | (hose)->ops = &tsi108_direct_pci_ops; |
230 | 229 | ||
231 | printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08lx. " | 230 | printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08x. " |
232 | "Firmware bus number: %d->%d\n", | 231 | "Firmware bus number: %d->%d\n", |
233 | rsrc.start, hose->first_busno, hose->last_busno); | 232 | rsrc.start, hose->first_busno, hose->last_busno); |
234 | 233 | ||
@@ -278,7 +277,7 @@ static void init_pci_source(void) | |||
278 | mb(); | 277 | mb(); |
279 | } | 278 | } |
280 | 279 | ||
281 | static inline int get_pci_source(void) | 280 | static inline unsigned int get_pci_source(void) |
282 | { | 281 | { |
283 | u_int temp = 0; | 282 | u_int temp = 0; |
284 | int irq = -1; | 283 | int irq = -1; |
@@ -371,12 +370,12 @@ static void tsi108_pci_irq_end(u_int irq) | |||
371 | * Interrupt controller descriptor for cascaded PCI interrupt controller. | 370 | * Interrupt controller descriptor for cascaded PCI interrupt controller. |
372 | */ | 371 | */ |
373 | 372 | ||
374 | struct hw_interrupt_type tsi108_pci_irq = { | 373 | static struct irq_chip tsi108_pci_irq = { |
375 | .typename = "tsi108_PCI_int", | 374 | .typename = "tsi108_PCI_int", |
376 | .enable = tsi108_pci_irq_enable, | 375 | .mask = tsi108_pci_irq_disable, |
377 | .disable = tsi108_pci_irq_disable, | ||
378 | .ack = tsi108_pci_irq_ack, | 376 | .ack = tsi108_pci_irq_ack, |
379 | .end = tsi108_pci_irq_end, | 377 | .end = tsi108_pci_irq_end, |
378 | .unmask = tsi108_pci_irq_enable, | ||
380 | }; | 379 | }; |
381 | 380 | ||
382 | /* | 381 | /* |
@@ -399,14 +398,18 @@ void __init tsi108_pci_int_init(void) | |||
399 | DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); | 398 | DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); |
400 | 399 | ||
401 | for (i = 0; i < NUM_PCI_IRQS; i++) { | 400 | for (i = 0; i < NUM_PCI_IRQS; i++) { |
402 | irq_desc[i + IRQ_PCI_INTAD_BASE].handler = &tsi108_pci_irq; | 401 | irq_desc[i + IRQ_PCI_INTAD_BASE].chip = &tsi108_pci_irq; |
403 | irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL; | 402 | irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL; |
404 | } | 403 | } |
405 | 404 | ||
406 | init_pci_source(); | 405 | init_pci_source(); |
407 | } | 406 | } |
408 | 407 | ||
409 | int tsi108_irq_cascade(struct pt_regs *regs, void *unused) | 408 | void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc, |
409 | struct pt_regs *regs) | ||
410 | { | 410 | { |
411 | return get_pci_source(); | 411 | unsigned int cascade_irq = get_pci_source(); |
412 | if (cascade_irq != NO_IRQ) | ||
413 | generic_handle_irq(cascade_irq, regs); | ||
414 | desc->chip->eoi(irq); | ||
412 | } | 415 | } |
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c index d90cd24d018e..94badafe4ef1 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.c +++ b/arch/ppc/platforms/85xx/mpc8560_ads.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/initrd.h> | 29 | #include <linux/initrd.h> |
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/fsl_devices.h> | 31 | #include <linux/fsl_devices.h> |
32 | #include <linux/fs_enet_pd.h> | ||
32 | 33 | ||
33 | #include <asm/system.h> | 34 | #include <asm/system.h> |
34 | #include <asm/pgtable.h> | 35 | #include <asm/pgtable.h> |
@@ -58,6 +59,71 @@ | |||
58 | * Setup the architecture | 59 | * Setup the architecture |
59 | * | 60 | * |
60 | */ | 61 | */ |
62 | static void init_fcc_ioports(void) | ||
63 | { | ||
64 | struct immap *immap; | ||
65 | struct io_port *io; | ||
66 | u32 tempval; | ||
67 | |||
68 | immap = cpm2_immr; | ||
69 | |||
70 | io = &immap->im_ioport; | ||
71 | /* FCC2/3 are on the ports B/C. */ | ||
72 | tempval = in_be32(&io->iop_pdirb); | ||
73 | tempval &= ~PB2_DIRB0; | ||
74 | tempval |= PB2_DIRB1; | ||
75 | out_be32(&io->iop_pdirb, tempval); | ||
76 | |||
77 | tempval = in_be32(&io->iop_psorb); | ||
78 | tempval &= ~PB2_PSORB0; | ||
79 | tempval |= PB2_PSORB1; | ||
80 | out_be32(&io->iop_psorb, tempval); | ||
81 | |||
82 | tempval = in_be32(&io->iop_pparb); | ||
83 | tempval |= (PB2_DIRB0 | PB2_DIRB1); | ||
84 | out_be32(&io->iop_pparb, tempval); | ||
85 | |||
86 | tempval = in_be32(&io->iop_pdirb); | ||
87 | tempval &= ~PB3_DIRB0; | ||
88 | tempval |= PB3_DIRB1; | ||
89 | out_be32(&io->iop_pdirb, tempval); | ||
90 | |||
91 | tempval = in_be32(&io->iop_psorb); | ||
92 | tempval &= ~PB3_PSORB0; | ||
93 | tempval |= PB3_PSORB1; | ||
94 | out_be32(&io->iop_psorb, tempval); | ||
95 | |||
96 | tempval = in_be32(&io->iop_pparb); | ||
97 | tempval |= (PB3_DIRB0 | PB3_DIRB1); | ||
98 | out_be32(&io->iop_pparb, tempval); | ||
99 | |||
100 | tempval = in_be32(&io->iop_pdirc); | ||
101 | tempval |= PC3_DIRC1; | ||
102 | out_be32(&io->iop_pdirc, tempval); | ||
103 | |||
104 | tempval = in_be32(&io->iop_pparc); | ||
105 | tempval |= PC3_DIRC1; | ||
106 | out_be32(&io->iop_pparc, tempval); | ||
107 | |||
108 | /* Port C has clocks...... */ | ||
109 | tempval = in_be32(&io->iop_psorc); | ||
110 | tempval &= ~(CLK_TRX); | ||
111 | out_be32(&io->iop_psorc, tempval); | ||
112 | |||
113 | tempval = in_be32(&io->iop_pdirc); | ||
114 | tempval &= ~(CLK_TRX); | ||
115 | out_be32(&io->iop_pdirc, tempval); | ||
116 | tempval = in_be32(&io->iop_pparc); | ||
117 | tempval |= (CLK_TRX); | ||
118 | out_be32(&io->iop_pparc, tempval); | ||
119 | |||
120 | /* Configure Serial Interface clock routing. | ||
121 | * First, clear all FCC bits to zero, | ||
122 | * then set the ones we want. | ||
123 | */ | ||
124 | immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK); | ||
125 | immap->im_cpmux.cmx_fcr |= CPMUX_CLK_ROUTE; | ||
126 | } | ||
61 | 127 | ||
62 | static void __init | 128 | static void __init |
63 | mpc8560ads_setup_arch(void) | 129 | mpc8560ads_setup_arch(void) |
@@ -66,6 +132,7 @@ mpc8560ads_setup_arch(void) | |||
66 | unsigned int freq; | 132 | unsigned int freq; |
67 | struct gianfar_platform_data *pdata; | 133 | struct gianfar_platform_data *pdata; |
68 | struct gianfar_mdio_data *mdata; | 134 | struct gianfar_mdio_data *mdata; |
135 | struct fs_platform_info *fpi; | ||
69 | 136 | ||
70 | cpm2_reset(); | 137 | cpm2_reset(); |
71 | 138 | ||
@@ -110,6 +177,28 @@ mpc8560ads_setup_arch(void) | |||
110 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 177 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
111 | } | 178 | } |
112 | 179 | ||
180 | init_fcc_ioports(); | ||
181 | ppc_sys_device_remove(MPC85xx_CPM_FCC1); | ||
182 | |||
183 | fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC2); | ||
184 | if (fpi) { | ||
185 | memcpy(fpi->macaddr, binfo->bi_enet2addr, 6); | ||
186 | fpi->bus_id = "0:02"; | ||
187 | fpi->phy_addr = 2; | ||
188 | fpi->dpram_offset = (u32)cpm2_immr->im_dprambase; | ||
189 | fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[1]; | ||
190 | } | ||
191 | |||
192 | fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC3); | ||
193 | if (fpi) { | ||
194 | memcpy(fpi->macaddr, binfo->bi_enet2addr, 6); | ||
195 | fpi->macaddr[5] += 1; | ||
196 | fpi->bus_id = "0:03"; | ||
197 | fpi->phy_addr = 3; | ||
198 | fpi->dpram_offset = (u32)cpm2_immr->im_dprambase; | ||
199 | fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[2]; | ||
200 | } | ||
201 | |||
113 | #ifdef CONFIG_BLK_DEV_INITRD | 202 | #ifdef CONFIG_BLK_DEV_INITRD |
114 | if (initrd_start) | 203 | if (initrd_start) |
115 | ROOT_DEV = Root_RAM0; | 204 | ROOT_DEV = Root_RAM0; |
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h index abf32281655d..c8c322fe3680 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h +++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h | |||
@@ -45,4 +45,23 @@ extern void mpc85xx_ads_map_io(void) __init; | |||
45 | 45 | ||
46 | #define MPC85XX_PCI1_IO_SIZE 0x01000000 | 46 | #define MPC85XX_PCI1_IO_SIZE 0x01000000 |
47 | 47 | ||
48 | /* FCC1 Clock Source Configuration. These can be | ||
49 | * redefined in the board specific file. | ||
50 | * Can only choose from CLK9-12 */ | ||
51 | #define F1_RXCLK 12 | ||
52 | #define F1_TXCLK 11 | ||
53 | |||
54 | /* FCC2 Clock Source Configuration. These can be | ||
55 | * redefined in the board specific file. | ||
56 | * Can only choose from CLK13-16 */ | ||
57 | #define F2_RXCLK 13 | ||
58 | #define F2_TXCLK 14 | ||
59 | |||
60 | /* FCC3 Clock Source Configuration. These can be | ||
61 | * redefined in the board specific file. | ||
62 | * Can only choose from CLK13-16 */ | ||
63 | #define F3_RXCLK 15 | ||
64 | #define F3_TXCLK 16 | ||
65 | |||
66 | |||
48 | #endif /* __MACH_MPC85XX_ADS_H__ */ | 67 | #endif /* __MACH_MPC85XX_ADS_H__ */ |
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c index abb7154de2c7..2a35fe2b9b96 100644 --- a/arch/ppc/platforms/mpc8272ads_setup.c +++ b/arch/ppc/platforms/mpc8272ads_setup.c | |||
@@ -56,64 +56,51 @@ static struct fs_uart_platform_info mpc8272_uart_pdata[] = { | |||
56 | }, | 56 | }, |
57 | }; | 57 | }; |
58 | 58 | ||
59 | static struct fs_mii_bus_info mii_bus_info = { | 59 | static struct fs_mii_bb_platform_info m82xx_mii_bb_pdata = { |
60 | .method = fsmii_bitbang, | 60 | .mdio_dat.bit = 18, |
61 | .id = 0, | 61 | .mdio_dir.bit = 18, |
62 | .i.bitbang = { | 62 | .mdc_dat.bit = 19, |
63 | .mdio_port = fsiop_portc, | 63 | .delay = 1, |
64 | .mdio_bit = 18, | ||
65 | .mdc_port = fsiop_portc, | ||
66 | .mdc_bit = 19, | ||
67 | .delay = 1, | ||
68 | }, | ||
69 | }; | ||
70 | |||
71 | static struct fs_platform_info mpc82xx_fcc1_pdata = { | ||
72 | .fs_no = fsid_fcc1, | ||
73 | .cp_page = CPM_CR_FCC1_PAGE, | ||
74 | .cp_block = CPM_CR_FCC1_SBLOCK, | ||
75 | .clk_trx = (PC_F1RXCLK | PC_F1TXCLK), | ||
76 | .clk_route = CMX1_CLK_ROUTE, | ||
77 | .clk_mask = CMX1_CLK_MASK, | ||
78 | .init_ioports = init_fcc1_ioports, | ||
79 | |||
80 | .phy_addr = 0, | ||
81 | #ifdef PHY_INTERRUPT | ||
82 | .phy_irq = PHY_INTERRUPT, | ||
83 | #else | ||
84 | .phy_irq = -1; | ||
85 | #endif | ||
86 | .mem_offset = FCC1_MEM_OFFSET, | ||
87 | .bus_info = &mii_bus_info, | ||
88 | .rx_ring = 32, | ||
89 | .tx_ring = 32, | ||
90 | .rx_copybreak = 240, | ||
91 | .use_napi = 0, | ||
92 | .napi_weight = 17, | ||
93 | }; | 64 | }; |
94 | 65 | ||
95 | static struct fs_platform_info mpc82xx_fcc2_pdata = { | 66 | static struct fs_platform_info mpc82xx_enet_pdata[] = { |
96 | .fs_no = fsid_fcc2, | 67 | [fsid_fcc1] = { |
97 | .cp_page = CPM_CR_FCC2_PAGE, | 68 | .fs_no = fsid_fcc1, |
98 | .cp_block = CPM_CR_FCC2_SBLOCK, | 69 | .cp_page = CPM_CR_FCC1_PAGE, |
99 | .clk_trx = (PC_F2RXCLK | PC_F2TXCLK), | 70 | .cp_block = CPM_CR_FCC1_SBLOCK, |
100 | .clk_route = CMX2_CLK_ROUTE, | 71 | |
101 | .clk_mask = CMX2_CLK_MASK, | 72 | .clk_trx = (PC_F1RXCLK | PC_F1TXCLK), |
102 | .init_ioports = init_fcc2_ioports, | 73 | .clk_route = CMX1_CLK_ROUTE, |
103 | 74 | .clk_mask = CMX1_CLK_MASK, | |
104 | .phy_addr = 3, | 75 | .init_ioports = init_fcc1_ioports, |
105 | #ifdef PHY_INTERRUPT | 76 | |
106 | .phy_irq = PHY_INTERRUPT, | 77 | .mem_offset = FCC1_MEM_OFFSET, |
107 | #else | 78 | |
108 | .phy_irq = -1; | 79 | .rx_ring = 32, |
109 | #endif | 80 | .tx_ring = 32, |
110 | .mem_offset = FCC2_MEM_OFFSET, | 81 | .rx_copybreak = 240, |
111 | .bus_info = &mii_bus_info, | 82 | .use_napi = 0, |
112 | .rx_ring = 32, | 83 | .napi_weight = 17, |
113 | .tx_ring = 32, | 84 | .bus_id = "0:00", |
114 | .rx_copybreak = 240, | 85 | }, |
115 | .use_napi = 0, | 86 | [fsid_fcc2] = { |
116 | .napi_weight = 17, | 87 | .fs_no = fsid_fcc2, |
88 | .cp_page = CPM_CR_FCC2_PAGE, | ||
89 | .cp_block = CPM_CR_FCC2_SBLOCK, | ||
90 | .clk_trx = (PC_F2RXCLK | PC_F2TXCLK), | ||
91 | .clk_route = CMX2_CLK_ROUTE, | ||
92 | .clk_mask = CMX2_CLK_MASK, | ||
93 | .init_ioports = init_fcc2_ioports, | ||
94 | |||
95 | .mem_offset = FCC2_MEM_OFFSET, | ||
96 | |||
97 | .rx_ring = 32, | ||
98 | .tx_ring = 32, | ||
99 | .rx_copybreak = 240, | ||
100 | .use_napi = 0, | ||
101 | .napi_weight = 17, | ||
102 | .bus_id = "0:03", | ||
103 | }, | ||
117 | }; | 104 | }; |
118 | 105 | ||
119 | static void init_fcc1_ioports(void) | 106 | static void init_fcc1_ioports(void) |
@@ -209,20 +196,21 @@ static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev, | |||
209 | bd_t* bi = (void*)__res; | 196 | bd_t* bi = (void*)__res; |
210 | int fs_no = fsid_fcc1+pdev->id-1; | 197 | int fs_no = fsid_fcc1+pdev->id-1; |
211 | 198 | ||
212 | mpc82xx_fcc1_pdata.dpram_offset = mpc82xx_fcc2_pdata.dpram_offset = (u32)cpm2_immr->im_dprambase; | 199 | if(fs_no > ARRAY_SIZE(mpc82xx_enet_pdata)) { |
213 | mpc82xx_fcc1_pdata.fcc_regs_c = mpc82xx_fcc2_pdata.fcc_regs_c = (u32)cpm2_immr->im_fcc_c; | 200 | return; |
214 | |||
215 | switch(fs_no) { | ||
216 | case fsid_fcc1: | ||
217 | memcpy(&mpc82xx_fcc1_pdata.macaddr,bi->bi_enetaddr,6); | ||
218 | pdev->dev.platform_data = &mpc82xx_fcc1_pdata; | ||
219 | break; | ||
220 | case fsid_fcc2: | ||
221 | memcpy(&mpc82xx_fcc2_pdata.macaddr,bi->bi_enetaddr,6); | ||
222 | mpc82xx_fcc2_pdata.macaddr[5] ^= 1; | ||
223 | pdev->dev.platform_data = &mpc82xx_fcc2_pdata; | ||
224 | break; | ||
225 | } | 201 | } |
202 | |||
203 | mpc82xx_enet_pdata[fs_no].dpram_offset= | ||
204 | (u32)cpm2_immr->im_dprambase; | ||
205 | mpc82xx_enet_pdata[fs_no].fcc_regs_c = | ||
206 | (u32)cpm2_immr->im_fcc_c; | ||
207 | memcpy(&mpc82xx_enet_pdata[fs_no].macaddr,bi->bi_enetaddr,6); | ||
208 | |||
209 | /* prevent dup mac */ | ||
210 | if(fs_no == fsid_fcc2) | ||
211 | mpc82xx_enet_pdata[fs_no].macaddr[5] ^= 1; | ||
212 | |||
213 | pdev->dev.platform_data = &mpc82xx_enet_pdata[fs_no]; | ||
226 | } | 214 | } |
227 | 215 | ||
228 | static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev, | 216 | static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev, |
@@ -274,6 +262,29 @@ static void init_scc4_uart_ioports(void) | |||
274 | iounmap(immap); | 262 | iounmap(immap); |
275 | } | 263 | } |
276 | 264 | ||
265 | static void __init mpc8272ads_fixup_mdio_pdata(struct platform_device *pdev, | ||
266 | int idx) | ||
267 | { | ||
268 | m82xx_mii_bb_pdata.irq[0] = PHY_INTERRUPT; | ||
269 | m82xx_mii_bb_pdata.irq[1] = -1; | ||
270 | m82xx_mii_bb_pdata.irq[2] = -1; | ||
271 | m82xx_mii_bb_pdata.irq[3] = PHY_INTERRUPT; | ||
272 | m82xx_mii_bb_pdata.irq[31] = -1; | ||
273 | |||
274 | |||
275 | m82xx_mii_bb_pdata.mdio_dat.offset = | ||
276 | (u32)&cpm2_immr->im_ioport.iop_pdatc; | ||
277 | |||
278 | m82xx_mii_bb_pdata.mdio_dir.offset = | ||
279 | (u32)&cpm2_immr->im_ioport.iop_pdirc; | ||
280 | |||
281 | m82xx_mii_bb_pdata.mdc_dat.offset = | ||
282 | (u32)&cpm2_immr->im_ioport.iop_pdatc; | ||
283 | |||
284 | |||
285 | pdev->dev.platform_data = &m82xx_mii_bb_pdata; | ||
286 | } | ||
287 | |||
277 | static int mpc8272ads_platform_notify(struct device *dev) | 288 | static int mpc8272ads_platform_notify(struct device *dev) |
278 | { | 289 | { |
279 | static const struct platform_notify_dev_map dev_map[] = { | 290 | static const struct platform_notify_dev_map dev_map[] = { |
@@ -286,6 +297,10 @@ static int mpc8272ads_platform_notify(struct device *dev) | |||
286 | .rtn = mpc8272ads_fixup_uart_pdata, | 297 | .rtn = mpc8272ads_fixup_uart_pdata, |
287 | }, | 298 | }, |
288 | { | 299 | { |
300 | .bus_id = "fsl-bb-mdio", | ||
301 | .rtn = mpc8272ads_fixup_mdio_pdata, | ||
302 | }, | ||
303 | { | ||
289 | .bus_id = NULL | 304 | .bus_id = NULL |
290 | } | 305 | } |
291 | }; | 306 | }; |
@@ -319,6 +334,7 @@ int __init mpc8272ads_init(void) | |||
319 | ppc_sys_device_enable(MPC82xx_CPM_SCC4); | 334 | ppc_sys_device_enable(MPC82xx_CPM_SCC4); |
320 | #endif | 335 | #endif |
321 | 336 | ||
337 | ppc_sys_device_enable(MPC82xx_MDIO_BB); | ||
322 | 338 | ||
323 | return 0; | 339 | return 0; |
324 | } | 340 | } |
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c index f19b6167c770..e12cece4c9fd 100644 --- a/arch/ppc/platforms/mpc866ads_setup.c +++ b/arch/ppc/platforms/mpc866ads_setup.c | |||
@@ -1,10 +1,10 @@ | |||
1 | /*arch/ppc/platforms/mpc885ads-setup.c | 1 | /*arch/ppc/platforms/mpc866ads-setup.c |
2 | * | 2 | * |
3 | * Platform setup for the Freescale mpc885ads board | 3 | * Platform setup for the Freescale mpc866ads board |
4 | * | 4 | * |
5 | * Vitaly Bordug <vbordug@ru.mvista.com> | 5 | * Vitaly Bordug <vbordug@ru.mvista.com> |
6 | * | 6 | * |
7 | * Copyright 2005 MontaVista Software Inc. | 7 | * Copyright 2005-2006 MontaVista Software Inc. |
8 | * | 8 | * |
9 | * This file is licensed under the terms of the GNU General Public License | 9 | * This file is licensed under the terms of the GNU General Public License |
10 | * version 2. This program is licensed "as is" without any warranty of any | 10 | * version 2. This program is licensed "as is" without any warranty of any |
@@ -42,49 +42,36 @@ static void setup_scc1_ioports(void); | |||
42 | static void setup_smc1_ioports(void); | 42 | static void setup_smc1_ioports(void); |
43 | static void setup_smc2_ioports(void); | 43 | static void setup_smc2_ioports(void); |
44 | 44 | ||
45 | static struct fs_mii_bus_info fec_mii_bus_info = { | 45 | static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata; |
46 | .method = fsmii_fec, | ||
47 | .id = 0, | ||
48 | }; | ||
49 | |||
50 | static struct fs_mii_bus_info scc_mii_bus_info = { | ||
51 | .method = fsmii_fixed, | ||
52 | .id = 0, | ||
53 | .i.fixed.speed = 10, | ||
54 | .i.fixed.duplex = 0, | ||
55 | }; | ||
56 | 46 | ||
57 | static struct fs_platform_info mpc8xx_fec_pdata[] = { | 47 | static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata; |
58 | { | ||
59 | .rx_ring = 128, | ||
60 | .tx_ring = 16, | ||
61 | .rx_copybreak = 240, | ||
62 | 48 | ||
63 | .use_napi = 1, | 49 | static struct fs_platform_info mpc8xx_enet_pdata[] = { |
64 | .napi_weight = 17, | 50 | [fsid_fec1] = { |
51 | .rx_ring = 128, | ||
52 | .tx_ring = 16, | ||
53 | .rx_copybreak = 240, | ||
65 | 54 | ||
66 | .phy_addr = 15, | 55 | .use_napi = 1, |
67 | .phy_irq = -1, | 56 | .napi_weight = 17, |
68 | 57 | ||
69 | .use_rmii = 0, | 58 | .init_ioports = setup_fec1_ioports, |
70 | 59 | ||
71 | .bus_info = &fec_mii_bus_info, | 60 | .bus_id = "0:0f", |
72 | } | 61 | .has_phy = 1, |
73 | }; | 62 | }, |
63 | [fsid_scc1] = { | ||
64 | .rx_ring = 64, | ||
65 | .tx_ring = 8, | ||
66 | .rx_copybreak = 240, | ||
67 | .use_napi = 1, | ||
68 | .napi_weight = 17, | ||
74 | 69 | ||
75 | static struct fs_platform_info mpc8xx_scc_pdata = { | ||
76 | .rx_ring = 64, | ||
77 | .tx_ring = 8, | ||
78 | .rx_copybreak = 240, | ||
79 | 70 | ||
80 | .use_napi = 1, | 71 | .init_ioports = setup_scc1_ioports, |
81 | .napi_weight = 17, | ||
82 | |||
83 | .phy_addr = -1, | ||
84 | .phy_irq = -1, | ||
85 | |||
86 | .bus_info = &scc_mii_bus_info, | ||
87 | 72 | ||
73 | .bus_id = "fixed@100:1", | ||
74 | }, | ||
88 | }; | 75 | }; |
89 | 76 | ||
90 | static struct fs_uart_platform_info mpc866_uart_pdata[] = { | 77 | static struct fs_uart_platform_info mpc866_uart_pdata[] = { |
@@ -207,63 +194,6 @@ static void setup_scc1_ioports(void) | |||
207 | 194 | ||
208 | } | 195 | } |
209 | 196 | ||
210 | static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) | ||
211 | { | ||
212 | struct fs_platform_info *fpi = pdev->dev.platform_data; | ||
213 | |||
214 | volatile cpm8xx_t *cp; | ||
215 | bd_t *bd = (bd_t *) __res; | ||
216 | char *e; | ||
217 | int i; | ||
218 | |||
219 | /* Get pointer to Communication Processor */ | ||
220 | cp = cpmp; | ||
221 | switch (fs_no) { | ||
222 | case fsid_fec1: | ||
223 | fpi = &mpc8xx_fec_pdata[0]; | ||
224 | fpi->init_ioports = &setup_fec1_ioports; | ||
225 | |||
226 | break; | ||
227 | case fsid_scc1: | ||
228 | fpi = &mpc8xx_scc_pdata; | ||
229 | fpi->init_ioports = &setup_scc1_ioports; | ||
230 | |||
231 | break; | ||
232 | default: | ||
233 | printk(KERN_WARNING"Device %s is not supported!\n", pdev->name); | ||
234 | return; | ||
235 | } | ||
236 | |||
237 | pdev->dev.platform_data = fpi; | ||
238 | fpi->fs_no = fs_no; | ||
239 | |||
240 | e = (unsigned char *)&bd->bi_enetaddr; | ||
241 | for (i = 0; i < 6; i++) | ||
242 | fpi->macaddr[i] = *e++; | ||
243 | |||
244 | fpi->macaddr[5 - pdev->id]++; | ||
245 | |||
246 | } | ||
247 | |||
248 | static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev, | ||
249 | int idx) | ||
250 | { | ||
251 | /* This is for FEC devices only */ | ||
252 | if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec"))) | ||
253 | return; | ||
254 | mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1); | ||
255 | } | ||
256 | |||
257 | static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev, | ||
258 | int idx) | ||
259 | { | ||
260 | /* This is for SCC devices only */ | ||
261 | if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc"))) | ||
262 | return; | ||
263 | |||
264 | mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); | ||
265 | } | ||
266 | |||
267 | static void setup_smc1_ioports(void) | 197 | static void setup_smc1_ioports(void) |
268 | { | 198 | { |
269 | immap_t *immap = (immap_t *) IMAP_ADDR; | 199 | immap_t *immap = (immap_t *) IMAP_ADDR; |
@@ -315,6 +245,56 @@ static void setup_smc2_ioports(void) | |||
315 | 245 | ||
316 | } | 246 | } |
317 | 247 | ||
248 | static int ma_count = 0; | ||
249 | |||
250 | static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) | ||
251 | { | ||
252 | struct fs_platform_info *fpi; | ||
253 | |||
254 | volatile cpm8xx_t *cp; | ||
255 | bd_t *bd = (bd_t *) __res; | ||
256 | char *e; | ||
257 | int i; | ||
258 | |||
259 | /* Get pointer to Communication Processor */ | ||
260 | cp = cpmp; | ||
261 | |||
262 | if(fs_no > ARRAY_SIZE(mpc8xx_enet_pdata)) { | ||
263 | printk(KERN_ERR"No network-suitable #%d device on bus", fs_no); | ||
264 | return; | ||
265 | } | ||
266 | |||
267 | |||
268 | fpi = &mpc8xx_enet_pdata[fs_no]; | ||
269 | fpi->fs_no = fs_no; | ||
270 | pdev->dev.platform_data = fpi; | ||
271 | |||
272 | e = (unsigned char *)&bd->bi_enetaddr; | ||
273 | for (i = 0; i < 6; i++) | ||
274 | fpi->macaddr[i] = *e++; | ||
275 | |||
276 | fpi->macaddr[5] += ma_count++; | ||
277 | } | ||
278 | |||
279 | static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev, | ||
280 | int idx) | ||
281 | { | ||
282 | /* This is for FEC devices only */ | ||
283 | if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec"))) | ||
284 | return; | ||
285 | mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1); | ||
286 | } | ||
287 | |||
288 | static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev, | ||
289 | int idx) | ||
290 | { | ||
291 | /* This is for SCC devices only */ | ||
292 | if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc"))) | ||
293 | return; | ||
294 | |||
295 | mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); | ||
296 | } | ||
297 | |||
318 | static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev, | 298 | static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev, |
319 | int idx) | 299 | int idx) |
320 | { | 300 | { |
@@ -359,6 +339,9 @@ static int mpc866ads_platform_notify(struct device *dev) | |||
359 | 339 | ||
360 | int __init mpc866ads_init(void) | 340 | int __init mpc866ads_init(void) |
361 | { | 341 | { |
342 | bd_t *bd = (bd_t *) __res; | ||
343 | struct fs_mii_fec_platform_info* fmpi; | ||
344 | |||
362 | printk(KERN_NOTICE "mpc866ads: Init\n"); | 345 | printk(KERN_NOTICE "mpc866ads: Init\n"); |
363 | 346 | ||
364 | platform_notify = mpc866ads_platform_notify; | 347 | platform_notify = mpc866ads_platform_notify; |
@@ -366,11 +349,20 @@ int __init mpc866ads_init(void) | |||
366 | ppc_sys_device_initfunc(); | 349 | ppc_sys_device_initfunc(); |
367 | ppc_sys_device_disable_all(); | 350 | ppc_sys_device_disable_all(); |
368 | 351 | ||
369 | #ifdef MPC8xx_SECOND_ETH_SCC1 | 352 | #ifdef CONFIG_MPC8xx_SECOND_ETH_SCC1 |
370 | ppc_sys_device_enable(MPC8xx_CPM_SCC1); | 353 | ppc_sys_device_enable(MPC8xx_CPM_SCC1); |
371 | #endif | 354 | #endif |
372 | ppc_sys_device_enable(MPC8xx_CPM_FEC1); | 355 | ppc_sys_device_enable(MPC8xx_CPM_FEC1); |
373 | 356 | ||
357 | ppc_sys_device_enable(MPC8xx_MDIO_FEC); | ||
358 | |||
359 | fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data = | ||
360 | &mpc8xx_mdio_fec_pdata; | ||
361 | |||
362 | fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1; | ||
363 | /* No PHY interrupt line here */ | ||
364 | fmpi->irq[0xf] = -1; | ||
365 | |||
374 | /* Since either of the uarts could be used as console, they need to ready */ | 366 | /* Since either of the uarts could be used as console, they need to ready */ |
375 | #ifdef CONFIG_SERIAL_CPM_SMC1 | 367 | #ifdef CONFIG_SERIAL_CPM_SMC1 |
376 | ppc_sys_device_enable(MPC8xx_CPM_SMC1); | 368 | ppc_sys_device_enable(MPC8xx_CPM_SMC1); |
@@ -381,6 +373,14 @@ int __init mpc866ads_init(void) | |||
381 | ppc_sys_device_enable(MPC8xx_CPM_SMC2); | 373 | ppc_sys_device_enable(MPC8xx_CPM_SMC2); |
382 | ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART); | 374 | ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART); |
383 | #endif | 375 | #endif |
376 | ppc_sys_device_enable(MPC8xx_MDIO_FEC); | ||
377 | |||
378 | fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data = | ||
379 | &mpc8xx_mdio_fec_pdata; | ||
380 | |||
381 | fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1; | ||
382 | /* No PHY interrupt line here */ | ||
383 | fmpi->irq[0xf] = -1; | ||
384 | 384 | ||
385 | return 0; | 385 | return 0; |
386 | } | 386 | } |
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c index c1fc4a16fea9..5dfa4e6c2af0 100644 --- a/arch/ppc/platforms/mpc885ads_setup.c +++ b/arch/ppc/platforms/mpc885ads_setup.c | |||
@@ -38,7 +38,10 @@ extern unsigned char __res[]; | |||
38 | static void setup_smc1_ioports(void); | 38 | static void setup_smc1_ioports(void); |
39 | static void setup_smc2_ioports(void); | 39 | static void setup_smc2_ioports(void); |
40 | 40 | ||
41 | static void __init mpc885ads_scc_phy_init(char); | 41 | static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata; |
42 | static void setup_fec1_ioports(void); | ||
43 | static void setup_fec2_ioports(void); | ||
44 | static void setup_scc3_ioports(void); | ||
42 | 45 | ||
43 | static struct fs_uart_platform_info mpc885_uart_pdata[] = { | 46 | static struct fs_uart_platform_info mpc885_uart_pdata[] = { |
44 | [fsid_smc1_uart] = { | 47 | [fsid_smc1_uart] = { |
@@ -61,23 +64,8 @@ static struct fs_uart_platform_info mpc885_uart_pdata[] = { | |||
61 | }, | 64 | }, |
62 | }; | 65 | }; |
63 | 66 | ||
64 | static struct fs_mii_bus_info fec_mii_bus_info = { | 67 | static struct fs_platform_info mpc8xx_enet_pdata[] = { |
65 | .method = fsmii_fec, | 68 | [fsid_fec1] = { |
66 | .id = 0, | ||
67 | }; | ||
68 | |||
69 | static struct fs_mii_bus_info scc_mii_bus_info = { | ||
70 | #ifdef CONFIG_SCC_ENET_8xx_FIXED | ||
71 | .method = fsmii_fixed, | ||
72 | #else | ||
73 | .method = fsmii_fec, | ||
74 | #endif | ||
75 | |||
76 | .id = 0, | ||
77 | }; | ||
78 | |||
79 | static struct fs_platform_info mpc8xx_fec_pdata[] = { | ||
80 | { | ||
81 | .rx_ring = 128, | 69 | .rx_ring = 128, |
82 | .tx_ring = 16, | 70 | .tx_ring = 16, |
83 | .rx_copybreak = 240, | 71 | .rx_copybreak = 240, |
@@ -85,11 +73,12 @@ static struct fs_platform_info mpc8xx_fec_pdata[] = { | |||
85 | .use_napi = 1, | 73 | .use_napi = 1, |
86 | .napi_weight = 17, | 74 | .napi_weight = 17, |
87 | 75 | ||
88 | .phy_addr = 0, | 76 | .init_ioports = setup_fec1_ioports, |
89 | .phy_irq = SIU_IRQ7, | ||
90 | 77 | ||
91 | .bus_info = &fec_mii_bus_info, | 78 | .bus_id = "0:00", |
92 | }, { | 79 | .has_phy = 1, |
80 | }, | ||
81 | [fsid_fec2] = { | ||
93 | .rx_ring = 128, | 82 | .rx_ring = 128, |
94 | .tx_ring = 16, | 83 | .tx_ring = 16, |
95 | .rx_copybreak = 240, | 84 | .rx_copybreak = 240, |
@@ -97,35 +86,32 @@ static struct fs_platform_info mpc8xx_fec_pdata[] = { | |||
97 | .use_napi = 1, | 86 | .use_napi = 1, |
98 | .napi_weight = 17, | 87 | .napi_weight = 17, |
99 | 88 | ||
100 | .phy_addr = 1, | 89 | .init_ioports = setup_fec2_ioports, |
101 | .phy_irq = SIU_IRQ7, | ||
102 | |||
103 | .bus_info = &fec_mii_bus_info, | ||
104 | } | ||
105 | }; | ||
106 | 90 | ||
107 | static struct fs_platform_info mpc8xx_scc_pdata = { | 91 | .bus_id = "0:01", |
108 | .rx_ring = 64, | 92 | .has_phy = 1, |
109 | .tx_ring = 8, | 93 | }, |
110 | .rx_copybreak = 240, | 94 | [fsid_scc3] = { |
95 | .rx_ring = 64, | ||
96 | .tx_ring = 8, | ||
97 | .rx_copybreak = 240, | ||
111 | 98 | ||
112 | .use_napi = 1, | 99 | .use_napi = 1, |
113 | .napi_weight = 17, | 100 | .napi_weight = 17, |
114 | 101 | ||
115 | .phy_addr = 2, | 102 | .init_ioports = setup_scc3_ioports, |
116 | #ifdef CONFIG_MPC8xx_SCC_ENET_FIXED | 103 | #ifdef CONFIG_FIXED_MII_10_FDX |
117 | .phy_irq = -1, | 104 | .bus_id = "fixed@100:1", |
118 | #else | 105 | #else |
119 | .phy_irq = SIU_IRQ7, | 106 | .bus_id = "0:02", |
120 | #endif | 107 | #endif |
121 | 108 | }, | |
122 | .bus_info = &scc_mii_bus_info, | ||
123 | }; | 109 | }; |
124 | 110 | ||
125 | void __init board_init(void) | 111 | void __init board_init(void) |
126 | { | 112 | { |
127 | volatile cpm8xx_t *cp = cpmp; | 113 | cpm8xx_t *cp = cpmp; |
128 | unsigned int *bcsr_io; | 114 | unsigned int *bcsr_io; |
129 | 115 | ||
130 | #ifdef CONFIG_FS_ENET | 116 | #ifdef CONFIG_FS_ENET |
131 | immap_t *immap = (immap_t *) IMAP_ADDR; | 117 | immap_t *immap = (immap_t *) IMAP_ADDR; |
@@ -164,6 +150,14 @@ void __init board_init(void) | |||
164 | /* use MDC for MII (common) */ | 150 | /* use MDC for MII (common) */ |
165 | setbits16(&immap->im_ioport.iop_pdpar, 0x0080); | 151 | setbits16(&immap->im_ioport.iop_pdpar, 0x0080); |
166 | clrbits16(&immap->im_ioport.iop_pddir, 0x0080); | 152 | clrbits16(&immap->im_ioport.iop_pddir, 0x0080); |
153 | bcsr_io = ioremap(BCSR5, sizeof(unsigned long)); | ||
154 | clrbits32(bcsr_io,BCSR5_MII1_EN); | ||
155 | clrbits32(bcsr_io,BCSR5_MII1_RST); | ||
156 | #ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 | ||
157 | clrbits32(bcsr_io,BCSR5_MII2_EN); | ||
158 | clrbits32(bcsr_io,BCSR5_MII2_RST); | ||
159 | #endif | ||
160 | iounmap(bcsr_io); | ||
167 | #endif | 161 | #endif |
168 | } | 162 | } |
169 | 163 | ||
@@ -194,8 +188,8 @@ static void setup_fec2_ioports(void) | |||
194 | /* configure FEC2 pins */ | 188 | /* configure FEC2 pins */ |
195 | setbits32(&immap->im_cpm.cp_pepar, 0x0003fffc); | 189 | setbits32(&immap->im_cpm.cp_pepar, 0x0003fffc); |
196 | setbits32(&immap->im_cpm.cp_pedir, 0x0003fffc); | 190 | setbits32(&immap->im_cpm.cp_pedir, 0x0003fffc); |
197 | setbits32(&immap->im_cpm.cp_peso, 0x00037800); | ||
198 | clrbits32(&immap->im_cpm.cp_peso, 0x000087fc); | 191 | clrbits32(&immap->im_cpm.cp_peso, 0x000087fc); |
192 | setbits32(&immap->im_cpm.cp_peso, 0x00037800); | ||
199 | clrbits32(&immap->im_cpm.cp_cptr, 0x00000080); | 193 | clrbits32(&immap->im_cpm.cp_cptr, 0x00000080); |
200 | } | 194 | } |
201 | 195 | ||
@@ -213,6 +207,8 @@ static void setup_scc3_ioports(void) | |||
213 | 207 | ||
214 | /* Enable the PHY. | 208 | /* Enable the PHY. |
215 | */ | 209 | */ |
210 | clrbits32(bcsr_io+4, BCSR4_ETH10_RST); | ||
211 | udelay(1000); | ||
216 | setbits32(bcsr_io+4, BCSR4_ETH10_RST); | 212 | setbits32(bcsr_io+4, BCSR4_ETH10_RST); |
217 | /* Configure port A pins for Txd and Rxd. | 213 | /* Configure port A pins for Txd and Rxd. |
218 | */ | 214 | */ |
@@ -254,37 +250,38 @@ static void setup_scc3_ioports(void) | |||
254 | clrbits32(&immap->im_cpm.cp_pedir, PE_ENET_TENA); | 250 | clrbits32(&immap->im_cpm.cp_pedir, PE_ENET_TENA); |
255 | setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA); | 251 | setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA); |
256 | 252 | ||
257 | setbits32(bcsr_io+1, BCSR1_ETHEN); | 253 | setbits32(bcsr_io+4, BCSR1_ETHEN); |
258 | iounmap(bcsr_io); | 254 | iounmap(bcsr_io); |
259 | } | 255 | } |
260 | 256 | ||
257 | static int mac_count = 0; | ||
258 | |||
261 | static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) | 259 | static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) |
262 | { | 260 | { |
263 | struct fs_platform_info *fpi = pdev->dev.platform_data; | 261 | struct fs_platform_info *fpi; |
264 | |||
265 | volatile cpm8xx_t *cp; | ||
266 | bd_t *bd = (bd_t *) __res; | 262 | bd_t *bd = (bd_t *) __res; |
267 | char *e; | 263 | char *e; |
268 | int i; | 264 | int i; |
269 | 265 | ||
270 | /* Get pointer to Communication Processor */ | 266 | if(fs_no > ARRAY_SIZE(mpc8xx_enet_pdata)) { |
271 | cp = cpmp; | 267 | printk(KERN_ERR"No network-suitable #%d device on bus", fs_no); |
268 | return; | ||
269 | } | ||
270 | |||
271 | fpi = &mpc8xx_enet_pdata[fs_no]; | ||
272 | |||
272 | switch (fs_no) { | 273 | switch (fs_no) { |
273 | case fsid_fec1: | 274 | case fsid_fec1: |
274 | fpi = &mpc8xx_fec_pdata[0]; | ||
275 | fpi->init_ioports = &setup_fec1_ioports; | 275 | fpi->init_ioports = &setup_fec1_ioports; |
276 | break; | 276 | break; |
277 | case fsid_fec2: | 277 | case fsid_fec2: |
278 | fpi = &mpc8xx_fec_pdata[1]; | ||
279 | fpi->init_ioports = &setup_fec2_ioports; | 278 | fpi->init_ioports = &setup_fec2_ioports; |
280 | break; | 279 | break; |
281 | case fsid_scc3: | 280 | case fsid_scc3: |
282 | fpi = &mpc8xx_scc_pdata; | ||
283 | fpi->init_ioports = &setup_scc3_ioports; | 281 | fpi->init_ioports = &setup_scc3_ioports; |
284 | mpc885ads_scc_phy_init(fpi->phy_addr); | ||
285 | break; | 282 | break; |
286 | default: | 283 | default: |
287 | printk(KERN_WARNING"Device %s is not supported!\n", pdev->name); | 284 | printk(KERN_WARNING "Device %s is not supported!\n", pdev->name); |
288 | return; | 285 | return; |
289 | } | 286 | } |
290 | 287 | ||
@@ -295,7 +292,7 @@ static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) | |||
295 | for (i = 0; i < 6; i++) | 292 | for (i = 0; i < 6; i++) |
296 | fpi->macaddr[i] = *e++; | 293 | fpi->macaddr[i] = *e++; |
297 | 294 | ||
298 | fpi->macaddr[5 - pdev->id]++; | 295 | fpi->macaddr[5] += mac_count++; |
299 | 296 | ||
300 | } | 297 | } |
301 | 298 | ||
@@ -318,58 +315,6 @@ static void __init mpc885ads_fixup_scc_enet_pdata(struct platform_device *pdev, | |||
318 | mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); | 315 | mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); |
319 | } | 316 | } |
320 | 317 | ||
321 | /* SCC ethernet controller does not have MII management channel. FEC1 MII | ||
322 | * channel is used to communicate with the 10Mbit PHY. | ||
323 | */ | ||
324 | |||
325 | #define MII_ECNTRL_PINMUX 0x4 | ||
326 | #define FEC_ECNTRL_PINMUX 0x00000004 | ||
327 | #define FEC_RCNTRL_MII_MODE 0x00000004 | ||
328 | |||
329 | /* Make MII read/write commands. | ||
330 | */ | ||
331 | #define mk_mii_write(REG, VAL, PHY_ADDR) (0x50020000 | (((REG) & 0x1f) << 18) | \ | ||
332 | ((VAL) & 0xffff) | ((PHY_ADDR) << 23)) | ||
333 | |||
334 | static void mpc885ads_scc_phy_init(char phy_addr) | ||
335 | { | ||
336 | volatile immap_t *immap; | ||
337 | volatile fec_t *fecp; | ||
338 | bd_t *bd; | ||
339 | |||
340 | bd = (bd_t *) __res; | ||
341 | immap = (immap_t *) IMAP_ADDR; /* pointer to internal registers */ | ||
342 | fecp = &(immap->im_cpm.cp_fec); | ||
343 | |||
344 | /* Enable MII pins of the FEC1 | ||
345 | */ | ||
346 | setbits16(&immap->im_ioport.iop_pdpar, 0x0080); | ||
347 | clrbits16(&immap->im_ioport.iop_pddir, 0x0080); | ||
348 | /* Set MII speed to 2.5 MHz | ||
349 | */ | ||
350 | out_be32(&fecp->fec_mii_speed, | ||
351 | ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1); | ||
352 | |||
353 | /* Enable FEC pin MUX | ||
354 | */ | ||
355 | setbits32(&fecp->fec_ecntrl, MII_ECNTRL_PINMUX); | ||
356 | setbits32(&fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE); | ||
357 | |||
358 | out_be32(&fecp->fec_mii_data, | ||
359 | mk_mii_write(MII_BMCR, BMCR_ISOLATE, phy_addr)); | ||
360 | udelay(100); | ||
361 | out_be32(&fecp->fec_mii_data, | ||
362 | mk_mii_write(MII_ADVERTISE, | ||
363 | ADVERTISE_10HALF | ADVERTISE_CSMA, phy_addr)); | ||
364 | udelay(100); | ||
365 | |||
366 | /* Disable FEC MII settings | ||
367 | */ | ||
368 | clrbits32(&fecp->fec_ecntrl, MII_ECNTRL_PINMUX); | ||
369 | clrbits32(&fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE); | ||
370 | out_be32(&fecp->fec_mii_speed, 0); | ||
371 | } | ||
372 | |||
373 | static void setup_smc1_ioports(void) | 318 | static void setup_smc1_ioports(void) |
374 | { | 319 | { |
375 | immap_t *immap = (immap_t *) IMAP_ADDR; | 320 | immap_t *immap = (immap_t *) IMAP_ADDR; |
@@ -462,6 +407,9 @@ static int mpc885ads_platform_notify(struct device *dev) | |||
462 | 407 | ||
463 | int __init mpc885ads_init(void) | 408 | int __init mpc885ads_init(void) |
464 | { | 409 | { |
410 | struct fs_mii_fec_platform_info* fmpi; | ||
411 | bd_t *bd = (bd_t *) __res; | ||
412 | |||
465 | printk(KERN_NOTICE "mpc885ads: Init\n"); | 413 | printk(KERN_NOTICE "mpc885ads: Init\n"); |
466 | 414 | ||
467 | platform_notify = mpc885ads_platform_notify; | 415 | platform_notify = mpc885ads_platform_notify; |
@@ -471,8 +419,17 @@ int __init mpc885ads_init(void) | |||
471 | 419 | ||
472 | ppc_sys_device_enable(MPC8xx_CPM_FEC1); | 420 | ppc_sys_device_enable(MPC8xx_CPM_FEC1); |
473 | 421 | ||
422 | ppc_sys_device_enable(MPC8xx_MDIO_FEC); | ||
423 | fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data = | ||
424 | &mpc8xx_mdio_fec_pdata; | ||
425 | |||
426 | fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1; | ||
427 | |||
428 | /* No PHY interrupt line here */ | ||
429 | fmpi->irq[0xf] = SIU_IRQ7; | ||
430 | |||
474 | #ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3 | 431 | #ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3 |
475 | ppc_sys_device_enable(MPC8xx_CPM_SCC1); | 432 | ppc_sys_device_enable(MPC8xx_CPM_SCC3); |
476 | 433 | ||
477 | #endif | 434 | #endif |
478 | #ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 | 435 | #ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 |
diff --git a/arch/ppc/platforms/pq2ads_pd.h b/arch/ppc/platforms/pq2ads_pd.h index 8f14a43eafec..672483df8079 100644 --- a/arch/ppc/platforms/pq2ads_pd.h +++ b/arch/ppc/platforms/pq2ads_pd.h | |||
@@ -29,86 +29,4 @@ | |||
29 | #define F3_RXCLK 13 | 29 | #define F3_RXCLK 13 |
30 | #define F3_TXCLK 14 | 30 | #define F3_TXCLK 14 |
31 | 31 | ||
32 | /* Automatically generates register configurations */ | ||
33 | #define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */ | ||
34 | |||
35 | #define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */ | ||
36 | #define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */ | ||
37 | #define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */ | ||
38 | #define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */ | ||
39 | #define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */ | ||
40 | #define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */ | ||
41 | |||
42 | #define PC_F1RXCLK PC_CLK(F1_RXCLK) | ||
43 | #define PC_F1TXCLK PC_CLK(F1_TXCLK) | ||
44 | #define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK)) | ||
45 | #define CMX1_CLK_MASK ((uint)0xff000000) | ||
46 | |||
47 | #define PC_F2RXCLK PC_CLK(F2_RXCLK) | ||
48 | #define PC_F2TXCLK PC_CLK(F2_TXCLK) | ||
49 | #define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK)) | ||
50 | #define CMX2_CLK_MASK ((uint)0x00ff0000) | ||
51 | |||
52 | #define PC_F3RXCLK PC_CLK(F3_RXCLK) | ||
53 | #define PC_F3TXCLK PC_CLK(F3_TXCLK) | ||
54 | #define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK)) | ||
55 | #define CMX3_CLK_MASK ((uint)0x0000ff00) | ||
56 | |||
57 | /* I/O Pin assignment for FCC1. I don't yet know the best way to do this, | ||
58 | * but there is little variation among the choices. | ||
59 | */ | ||
60 | #define PA1_COL 0x00000001U | ||
61 | #define PA1_CRS 0x00000002U | ||
62 | #define PA1_TXER 0x00000004U | ||
63 | #define PA1_TXEN 0x00000008U | ||
64 | #define PA1_RXDV 0x00000010U | ||
65 | #define PA1_RXER 0x00000020U | ||
66 | #define PA1_TXDAT 0x00003c00U | ||
67 | #define PA1_RXDAT 0x0003c000U | ||
68 | #define PA1_PSORA0 (PA1_RXDAT | PA1_TXDAT) | ||
69 | #define PA1_PSORA1 (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \ | ||
70 | PA1_RXDV | PA1_RXER) | ||
71 | #define PA1_DIRA0 (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV) | ||
72 | #define PA1_DIRA1 (PA1_TXDAT | PA1_TXEN | PA1_TXER) | ||
73 | |||
74 | |||
75 | /* I/O Pin assignment for FCC2. I don't yet know the best way to do this, | ||
76 | * but there is little variation among the choices. | ||
77 | */ | ||
78 | #define PB2_TXER 0x00000001U | ||
79 | #define PB2_RXDV 0x00000002U | ||
80 | #define PB2_TXEN 0x00000004U | ||
81 | #define PB2_RXER 0x00000008U | ||
82 | #define PB2_COL 0x00000010U | ||
83 | #define PB2_CRS 0x00000020U | ||
84 | #define PB2_TXDAT 0x000003c0U | ||
85 | #define PB2_RXDAT 0x00003c00U | ||
86 | #define PB2_PSORB0 (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \ | ||
87 | PB2_RXER | PB2_RXDV | PB2_TXER) | ||
88 | #define PB2_PSORB1 (PB2_TXEN) | ||
89 | #define PB2_DIRB0 (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV) | ||
90 | #define PB2_DIRB1 (PB2_TXDAT | PB2_TXEN | PB2_TXER) | ||
91 | |||
92 | |||
93 | /* I/O Pin assignment for FCC3. I don't yet know the best way to do this, | ||
94 | * but there is little variation among the choices. | ||
95 | */ | ||
96 | #define PB3_RXDV 0x00004000U | ||
97 | #define PB3_RXER 0x00008000U | ||
98 | #define PB3_TXER 0x00010000U | ||
99 | #define PB3_TXEN 0x00020000U | ||
100 | #define PB3_COL 0x00040000U | ||
101 | #define PB3_CRS 0x00080000U | ||
102 | #define PB3_TXDAT 0x0f000000U | ||
103 | #define PB3_RXDAT 0x00f00000U | ||
104 | #define PB3_PSORB0 (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \ | ||
105 | PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN) | ||
106 | #define PB3_PSORB1 0 | ||
107 | #define PB3_DIRB0 (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV) | ||
108 | #define PB3_DIRB1 (PB3_TXDAT | PB3_TXEN | PB3_TXER) | ||
109 | |||
110 | #define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128)) | ||
111 | #define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0) | ||
112 | #define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) | ||
113 | |||
114 | #endif | 32 | #endif |
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c index 7735336f5b8f..325136e5aee0 100644 --- a/arch/ppc/syslib/mpc85xx_devices.c +++ b/arch/ppc/syslib/mpc85xx_devices.c | |||
@@ -16,9 +16,11 @@ | |||
16 | #include <linux/device.h> | 16 | #include <linux/device.h> |
17 | #include <linux/serial_8250.h> | 17 | #include <linux/serial_8250.h> |
18 | #include <linux/fsl_devices.h> | 18 | #include <linux/fsl_devices.h> |
19 | #include <linux/fs_enet_pd.h> | ||
19 | #include <asm/mpc85xx.h> | 20 | #include <asm/mpc85xx.h> |
20 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
21 | #include <asm/ppc_sys.h> | 22 | #include <asm/ppc_sys.h> |
23 | #include <asm/cpm2.h> | ||
22 | 24 | ||
23 | /* We use offsets for IORESOURCE_MEM since we do not know at compile time | 25 | /* We use offsets for IORESOURCE_MEM since we do not know at compile time |
24 | * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup | 26 | * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup |
@@ -82,6 +84,60 @@ static struct fsl_i2c_platform_data mpc85xx_fsl_i2c2_pdata = { | |||
82 | .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR, | 84 | .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR, |
83 | }; | 85 | }; |
84 | 86 | ||
87 | static struct fs_platform_info mpc85xx_fcc1_pdata = { | ||
88 | .fs_no = fsid_fcc1, | ||
89 | .cp_page = CPM_CR_FCC1_PAGE, | ||
90 | .cp_block = CPM_CR_FCC1_SBLOCK, | ||
91 | |||
92 | .rx_ring = 32, | ||
93 | .tx_ring = 32, | ||
94 | .rx_copybreak = 240, | ||
95 | .use_napi = 0, | ||
96 | .napi_weight = 17, | ||
97 | |||
98 | .clk_mask = CMX1_CLK_MASK, | ||
99 | .clk_route = CMX1_CLK_ROUTE, | ||
100 | .clk_trx = (PC_F1RXCLK | PC_F1TXCLK), | ||
101 | |||
102 | .mem_offset = FCC1_MEM_OFFSET, | ||
103 | }; | ||
104 | |||
105 | static struct fs_platform_info mpc85xx_fcc2_pdata = { | ||
106 | .fs_no = fsid_fcc2, | ||
107 | .cp_page = CPM_CR_FCC2_PAGE, | ||
108 | .cp_block = CPM_CR_FCC2_SBLOCK, | ||
109 | |||
110 | .rx_ring = 32, | ||
111 | .tx_ring = 32, | ||
112 | .rx_copybreak = 240, | ||
113 | .use_napi = 0, | ||
114 | .napi_weight = 17, | ||
115 | |||
116 | .clk_mask = CMX2_CLK_MASK, | ||
117 | .clk_route = CMX2_CLK_ROUTE, | ||
118 | .clk_trx = (PC_F2RXCLK | PC_F2TXCLK), | ||
119 | |||
120 | .mem_offset = FCC2_MEM_OFFSET, | ||
121 | }; | ||
122 | |||
123 | static struct fs_platform_info mpc85xx_fcc3_pdata = { | ||
124 | .fs_no = fsid_fcc3, | ||
125 | .cp_page = CPM_CR_FCC3_PAGE, | ||
126 | .cp_block = CPM_CR_FCC3_SBLOCK, | ||
127 | |||
128 | .rx_ring = 32, | ||
129 | .tx_ring = 32, | ||
130 | .rx_copybreak = 240, | ||
131 | .use_napi = 0, | ||
132 | .napi_weight = 17, | ||
133 | |||
134 | .clk_mask = CMX3_CLK_MASK, | ||
135 | .clk_route = CMX3_CLK_ROUTE, | ||
136 | .clk_trx = (PC_F3RXCLK | PC_F3TXCLK), | ||
137 | |||
138 | .mem_offset = FCC3_MEM_OFFSET, | ||
139 | }; | ||
140 | |||
85 | static struct plat_serial8250_port serial_platform_data[] = { | 141 | static struct plat_serial8250_port serial_platform_data[] = { |
86 | [0] = { | 142 | [0] = { |
87 | .mapbase = 0x4500, | 143 | .mapbase = 0x4500, |
@@ -318,19 +374,28 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
318 | [MPC85xx_CPM_FCC1] = { | 374 | [MPC85xx_CPM_FCC1] = { |
319 | .name = "fsl-cpm-fcc", | 375 | .name = "fsl-cpm-fcc", |
320 | .id = 1, | 376 | .id = 1, |
321 | .num_resources = 3, | 377 | .num_resources = 4, |
378 | .dev.platform_data = &mpc85xx_fcc1_pdata, | ||
322 | .resource = (struct resource[]) { | 379 | .resource = (struct resource[]) { |
323 | { | 380 | { |
381 | .name = "fcc_regs", | ||
324 | .start = 0x91300, | 382 | .start = 0x91300, |
325 | .end = 0x9131F, | 383 | .end = 0x9131F, |
326 | .flags = IORESOURCE_MEM, | 384 | .flags = IORESOURCE_MEM, |
327 | }, | 385 | }, |
328 | { | 386 | { |
387 | .name = "fcc_regs_c", | ||
329 | .start = 0x91380, | 388 | .start = 0x91380, |
330 | .end = 0x9139F, | 389 | .end = 0x9139F, |
331 | .flags = IORESOURCE_MEM, | 390 | .flags = IORESOURCE_MEM, |
332 | }, | 391 | }, |
333 | { | 392 | { |
393 | .name = "fcc_pram", | ||
394 | .start = 0x88400, | ||
395 | .end = 0x884ff, | ||
396 | .flags = IORESOURCE_MEM, | ||
397 | }, | ||
398 | { | ||
334 | .start = SIU_INT_FCC1, | 399 | .start = SIU_INT_FCC1, |
335 | .end = SIU_INT_FCC1, | 400 | .end = SIU_INT_FCC1, |
336 | .flags = IORESOURCE_IRQ, | 401 | .flags = IORESOURCE_IRQ, |
@@ -340,19 +405,28 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
340 | [MPC85xx_CPM_FCC2] = { | 405 | [MPC85xx_CPM_FCC2] = { |
341 | .name = "fsl-cpm-fcc", | 406 | .name = "fsl-cpm-fcc", |
342 | .id = 2, | 407 | .id = 2, |
343 | .num_resources = 3, | 408 | .num_resources = 4, |
409 | .dev.platform_data = &mpc85xx_fcc2_pdata, | ||
344 | .resource = (struct resource[]) { | 410 | .resource = (struct resource[]) { |
345 | { | 411 | { |
412 | .name = "fcc_regs", | ||
346 | .start = 0x91320, | 413 | .start = 0x91320, |
347 | .end = 0x9133F, | 414 | .end = 0x9133F, |
348 | .flags = IORESOURCE_MEM, | 415 | .flags = IORESOURCE_MEM, |
349 | }, | 416 | }, |
350 | { | 417 | { |
418 | .name = "fcc_regs_c", | ||
351 | .start = 0x913A0, | 419 | .start = 0x913A0, |
352 | .end = 0x913CF, | 420 | .end = 0x913CF, |
353 | .flags = IORESOURCE_MEM, | 421 | .flags = IORESOURCE_MEM, |
354 | }, | 422 | }, |
355 | { | 423 | { |
424 | .name = "fcc_pram", | ||
425 | .start = 0x88500, | ||
426 | .end = 0x885ff, | ||
427 | .flags = IORESOURCE_MEM, | ||
428 | }, | ||
429 | { | ||
356 | .start = SIU_INT_FCC2, | 430 | .start = SIU_INT_FCC2, |
357 | .end = SIU_INT_FCC2, | 431 | .end = SIU_INT_FCC2, |
358 | .flags = IORESOURCE_IRQ, | 432 | .flags = IORESOURCE_IRQ, |
@@ -362,19 +436,28 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
362 | [MPC85xx_CPM_FCC3] = { | 436 | [MPC85xx_CPM_FCC3] = { |
363 | .name = "fsl-cpm-fcc", | 437 | .name = "fsl-cpm-fcc", |
364 | .id = 3, | 438 | .id = 3, |
365 | .num_resources = 3, | 439 | .num_resources = 4, |
440 | .dev.platform_data = &mpc85xx_fcc3_pdata, | ||
366 | .resource = (struct resource[]) { | 441 | .resource = (struct resource[]) { |
367 | { | 442 | { |
443 | .name = "fcc_regs", | ||
368 | .start = 0x91340, | 444 | .start = 0x91340, |
369 | .end = 0x9135F, | 445 | .end = 0x9135F, |
370 | .flags = IORESOURCE_MEM, | 446 | .flags = IORESOURCE_MEM, |
371 | }, | 447 | }, |
372 | { | 448 | { |
449 | .name = "fcc_regs_c", | ||
373 | .start = 0x913D0, | 450 | .start = 0x913D0, |
374 | .end = 0x913FF, | 451 | .end = 0x913FF, |
375 | .flags = IORESOURCE_MEM, | 452 | .flags = IORESOURCE_MEM, |
376 | }, | 453 | }, |
377 | { | 454 | { |
455 | .name = "fcc_pram", | ||
456 | .start = 0x88600, | ||
457 | .end = 0x886ff, | ||
458 | .flags = IORESOURCE_MEM, | ||
459 | }, | ||
460 | { | ||
378 | .start = SIU_INT_FCC3, | 461 | .start = SIU_INT_FCC3, |
379 | .end = SIU_INT_FCC3, | 462 | .end = SIU_INT_FCC3, |
380 | .flags = IORESOURCE_IRQ, | 463 | .flags = IORESOURCE_IRQ, |
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c index 6f536383866e..cf5ab47487a7 100644 --- a/arch/ppc/syslib/mpc8xx_devices.c +++ b/arch/ppc/syslib/mpc8xx_devices.c | |||
@@ -218,6 +218,14 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
218 | }, | 218 | }, |
219 | }, | 219 | }, |
220 | }, | 220 | }, |
221 | |||
222 | [MPC8xx_MDIO_FEC] = { | ||
223 | .name = "fsl-cpm-fec-mdio", | ||
224 | .id = 0, | ||
225 | .num_resources = 0, | ||
226 | |||
227 | }, | ||
228 | |||
221 | }; | 229 | }; |
222 | 230 | ||
223 | static int __init mach_mpc8xx_fixup(struct platform_device *pdev) | 231 | static int __init mach_mpc8xx_fixup(struct platform_device *pdev) |
diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c index eee213284855..18ba1d7ff9f1 100644 --- a/arch/ppc/syslib/mpc8xx_sys.c +++ b/arch/ppc/syslib/mpc8xx_sys.c | |||
@@ -22,7 +22,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
22 | .ppc_sys_name = "MPC86X", | 22 | .ppc_sys_name = "MPC86X", |
23 | .mask = 0xFFFFFFFF, | 23 | .mask = 0xFFFFFFFF, |
24 | .value = 0x00000000, | 24 | .value = 0x00000000, |
25 | .num_devices = 7, | 25 | .num_devices = 8, |
26 | .device_list = (enum ppc_sys_devices[]) | 26 | .device_list = (enum ppc_sys_devices[]) |
27 | { | 27 | { |
28 | MPC8xx_CPM_FEC1, | 28 | MPC8xx_CPM_FEC1, |
@@ -32,13 +32,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
32 | MPC8xx_CPM_SCC4, | 32 | MPC8xx_CPM_SCC4, |
33 | MPC8xx_CPM_SMC1, | 33 | MPC8xx_CPM_SMC1, |
34 | MPC8xx_CPM_SMC2, | 34 | MPC8xx_CPM_SMC2, |
35 | MPC8xx_MDIO_FEC, | ||
35 | }, | 36 | }, |
36 | }, | 37 | }, |
37 | { | 38 | { |
38 | .ppc_sys_name = "MPC885", | 39 | .ppc_sys_name = "MPC885", |
39 | .mask = 0xFFFFFFFF, | 40 | .mask = 0xFFFFFFFF, |
40 | .value = 0x00000000, | 41 | .value = 0x00000000, |
41 | .num_devices = 8, | 42 | .num_devices = 9, |
42 | .device_list = (enum ppc_sys_devices[]) | 43 | .device_list = (enum ppc_sys_devices[]) |
43 | { | 44 | { |
44 | MPC8xx_CPM_FEC1, | 45 | MPC8xx_CPM_FEC1, |
@@ -49,6 +50,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
49 | MPC8xx_CPM_SCC4, | 50 | MPC8xx_CPM_SCC4, |
50 | MPC8xx_CPM_SMC1, | 51 | MPC8xx_CPM_SMC1, |
51 | MPC8xx_CPM_SMC2, | 52 | MPC8xx_CPM_SMC2, |
53 | MPC8xx_MDIO_FEC, | ||
52 | }, | 54 | }, |
53 | }, | 55 | }, |
54 | { /* default match */ | 56 | { /* default match */ |
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c index 8692d00c08c4..fefbc217a56d 100644 --- a/arch/ppc/syslib/pq2_devices.c +++ b/arch/ppc/syslib/pq2_devices.c | |||
@@ -369,6 +369,11 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
369 | }, | 369 | }, |
370 | }, | 370 | }, |
371 | }, | 371 | }, |
372 | [MPC82xx_MDIO_BB] = { | ||
373 | .name = "fsl-bb-mdio", | ||
374 | .id = 0, | ||
375 | .num_resources = 0, | ||
376 | }, | ||
372 | }; | 377 | }; |
373 | 378 | ||
374 | static int __init mach_mpc82xx_fixup(struct platform_device *pdev) | 379 | static int __init mach_mpc82xx_fixup(struct platform_device *pdev) |
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c index fee8948162b9..f52600c0db20 100644 --- a/arch/ppc/syslib/pq2_sys.c +++ b/arch/ppc/syslib/pq2_sys.c | |||
@@ -139,13 +139,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
139 | .ppc_sys_name = "8272", | 139 | .ppc_sys_name = "8272", |
140 | .mask = 0x0000ff00, | 140 | .mask = 0x0000ff00, |
141 | .value = 0x00000c00, | 141 | .value = 0x00000c00, |
142 | .num_devices = 12, | 142 | .num_devices = 13, |
143 | .device_list = (enum ppc_sys_devices[]) | 143 | .device_list = (enum ppc_sys_devices[]) |
144 | { | 144 | { |
145 | MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, | 145 | MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, |
146 | MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, | 146 | MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, |
147 | MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, | 147 | MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, |
148 | MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1, | 148 | MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1, |
149 | MPC82xx_MDIO_BB, | ||
149 | }, | 150 | }, |
150 | }, | 151 | }, |
151 | /* below is a list of the 8280 family of processors */ | 152 | /* below is a list of the 8280 family of processors */ |
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c index 6a4b5f9715c9..a0a94e0ef8d1 100644 --- a/arch/s390/appldata/appldata_base.c +++ b/arch/s390/appldata/appldata_base.c | |||
@@ -618,7 +618,7 @@ appldata_offline_cpu(int cpu) | |||
618 | } | 618 | } |
619 | 619 | ||
620 | #ifdef CONFIG_HOTPLUG_CPU | 620 | #ifdef CONFIG_HOTPLUG_CPU |
621 | static int | 621 | static int __cpuinit |
622 | appldata_cpu_notify(struct notifier_block *self, | 622 | appldata_cpu_notify(struct notifier_block *self, |
623 | unsigned long action, void *hcpu) | 623 | unsigned long action, void *hcpu) |
624 | { | 624 | { |
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c index eb6ebfef134a..6e6b6de77770 100644 --- a/arch/s390/mm/init.c +++ b/arch/s390/mm/init.c | |||
@@ -129,7 +129,7 @@ void __init paging_init(void) | |||
129 | /* | 129 | /* |
130 | * pg_table is physical at this point | 130 | * pg_table is physical at this point |
131 | */ | 131 | */ |
132 | pg_table = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); | 132 | pg_table = (pte_t *) alloc_bootmem_pages(PAGE_SIZE); |
133 | 133 | ||
134 | pg_dir->pgd0 = (_PAGE_TABLE | __pa(pg_table)); | 134 | pg_dir->pgd0 = (_PAGE_TABLE | __pa(pg_table)); |
135 | pg_dir->pgd1 = (_PAGE_TABLE | (__pa(pg_table)+1024)); | 135 | pg_dir->pgd1 = (_PAGE_TABLE | (__pa(pg_table)+1024)); |
@@ -219,7 +219,7 @@ void __init paging_init(void) | |||
219 | continue; | 219 | continue; |
220 | } | 220 | } |
221 | 221 | ||
222 | pm_dir = (pmd_t *) alloc_bootmem_low_pages(PAGE_SIZE*4); | 222 | pm_dir = (pmd_t *) alloc_bootmem_pages(PAGE_SIZE * 4); |
223 | pgd_populate(&init_mm, pg_dir, pm_dir); | 223 | pgd_populate(&init_mm, pg_dir, pm_dir); |
224 | 224 | ||
225 | for (j = 0 ; j < PTRS_PER_PMD ; j++,pm_dir++) { | 225 | for (j = 0 ; j < PTRS_PER_PMD ; j++,pm_dir++) { |
@@ -228,7 +228,7 @@ void __init paging_init(void) | |||
228 | continue; | 228 | continue; |
229 | } | 229 | } |
230 | 230 | ||
231 | pt_dir = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); | 231 | pt_dir = (pte_t *) alloc_bootmem_pages(PAGE_SIZE); |
232 | pmd_populate_kernel(&init_mm, pm_dir, pt_dir); | 232 | pmd_populate_kernel(&init_mm, pm_dir, pt_dir); |
233 | 233 | ||
234 | for (k = 0 ; k < PTRS_PER_PTE ; k++,pt_dir++) { | 234 | for (k = 0 ; k < PTRS_PER_PTE ; k++,pt_dir++) { |
diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c index 35488d6c7457..0251cab4708b 100644 --- a/arch/sparc/kernel/setup.c +++ b/arch/sparc/kernel/setup.c | |||
@@ -348,9 +348,9 @@ void __init setup_arch(char **cmdline_p) | |||
348 | init_mm.context = (unsigned long) NO_CONTEXT; | 348 | init_mm.context = (unsigned long) NO_CONTEXT; |
349 | init_task.thread.kregs = &fake_swapper_regs; | 349 | init_task.thread.kregs = &fake_swapper_regs; |
350 | 350 | ||
351 | smp_setup_cpu_possible_map(); | ||
352 | |||
353 | paging_init(); | 351 | paging_init(); |
352 | |||
353 | smp_setup_cpu_possible_map(); | ||
354 | } | 354 | } |
355 | 355 | ||
356 | static int __init set_preferred_console(void) | 356 | static int __init set_preferred_console(void) |
diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c index e311ade1b490..276f22881d0f 100644 --- a/arch/sparc/kernel/smp.c +++ b/arch/sparc/kernel/smp.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <asm/tlbflush.h> | 34 | #include <asm/tlbflush.h> |
35 | #include <asm/cpudata.h> | 35 | #include <asm/cpudata.h> |
36 | 36 | ||
37 | volatile int smp_processors_ready = 0; | ||
38 | int smp_num_cpus = 1; | 37 | int smp_num_cpus = 1; |
39 | volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,}; | 38 | volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,}; |
40 | unsigned char boot_cpu_id = 0; | 39 | unsigned char boot_cpu_id = 0; |
diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c index ba843f6a2832..3ff4edd32815 100644 --- a/arch/sparc/kernel/sun4d_smp.c +++ b/arch/sparc/kernel/sun4d_smp.c | |||
@@ -42,7 +42,7 @@ extern ctxd_t *srmmu_ctx_table_phys; | |||
42 | 42 | ||
43 | extern void calibrate_delay(void); | 43 | extern void calibrate_delay(void); |
44 | 44 | ||
45 | extern volatile int smp_processors_ready; | 45 | static volatile int smp_processors_ready = 0; |
46 | static int smp_highest_cpu; | 46 | static int smp_highest_cpu; |
47 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; | 47 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; |
48 | extern cpuinfo_sparc cpu_data[NR_CPUS]; | 48 | extern cpuinfo_sparc cpu_data[NR_CPUS]; |
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c index 3b32096134aa..7d4a649138f6 100644 --- a/arch/sparc/kernel/sun4m_smp.c +++ b/arch/sparc/kernel/sun4m_smp.c | |||
@@ -39,7 +39,6 @@ extern ctxd_t *srmmu_ctx_table_phys; | |||
39 | 39 | ||
40 | extern void calibrate_delay(void); | 40 | extern void calibrate_delay(void); |
41 | 41 | ||
42 | extern volatile int smp_processors_ready; | ||
43 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; | 42 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; |
44 | extern unsigned char boot_cpu_id; | 43 | extern unsigned char boot_cpu_id; |
45 | 44 | ||
@@ -217,7 +216,6 @@ void __init smp4m_smp_done(void) | |||
217 | } | 216 | } |
218 | 217 | ||
219 | /* Ok, they are spinning and ready to go. */ | 218 | /* Ok, they are spinning and ready to go. */ |
220 | smp_processors_ready = 1; | ||
221 | } | 219 | } |
222 | 220 | ||
223 | /* At each hardware IRQ, we get this called to forward IRQ reception | 221 | /* At each hardware IRQ, we get this called to forward IRQ reception |
diff --git a/arch/sparc64/mm/generic.c b/arch/sparc64/mm/generic.c index 8cb06205d265..af9d81db0b38 100644 --- a/arch/sparc64/mm/generic.c +++ b/arch/sparc64/mm/generic.c | |||
@@ -69,6 +69,8 @@ static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte, | |||
69 | } else | 69 | } else |
70 | offset += PAGE_SIZE; | 70 | offset += PAGE_SIZE; |
71 | 71 | ||
72 | if (pte_write(entry)) | ||
73 | entry = pte_mkdirty(entry); | ||
72 | do { | 74 | do { |
73 | BUG_ON(!pte_none(*pte)); | 75 | BUG_ON(!pte_none(*pte)); |
74 | set_pte_at(mm, address, pte, entry); | 76 | set_pte_at(mm, address, pte, entry); |
diff --git a/arch/x86_64/defconfig b/arch/x86_64/defconfig index 840d5d93d5cc..5fb970715941 100644 --- a/arch/x86_64/defconfig +++ b/arch/x86_64/defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.18-rc2 | 3 | # Linux kernel version: 2.6.18-rc4 |
4 | # Tue Jul 18 17:13:20 2006 | 4 | # Thu Aug 24 21:05:55 2006 |
5 | # | 5 | # |
6 | CONFIG_X86_64=y | 6 | CONFIG_X86_64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
@@ -201,7 +201,7 @@ CONFIG_ACPI_THERMAL=y | |||
201 | CONFIG_ACPI_NUMA=y | 201 | CONFIG_ACPI_NUMA=y |
202 | # CONFIG_ACPI_ASUS is not set | 202 | # CONFIG_ACPI_ASUS is not set |
203 | # CONFIG_ACPI_IBM is not set | 203 | # CONFIG_ACPI_IBM is not set |
204 | CONFIG_ACPI_TOSHIBA=y | 204 | # CONFIG_ACPI_TOSHIBA is not set |
205 | CONFIG_ACPI_BLACKLIST_YEAR=0 | 205 | CONFIG_ACPI_BLACKLIST_YEAR=0 |
206 | # CONFIG_ACPI_DEBUG is not set | 206 | # CONFIG_ACPI_DEBUG is not set |
207 | CONFIG_ACPI_EC=y | 207 | CONFIG_ACPI_EC=y |
@@ -216,7 +216,7 @@ CONFIG_ACPI_CONTAINER=y | |||
216 | # | 216 | # |
217 | CONFIG_CPU_FREQ=y | 217 | CONFIG_CPU_FREQ=y |
218 | CONFIG_CPU_FREQ_TABLE=y | 218 | CONFIG_CPU_FREQ_TABLE=y |
219 | # CONFIG_CPU_FREQ_DEBUG is not set | 219 | CONFIG_CPU_FREQ_DEBUG=y |
220 | CONFIG_CPU_FREQ_STAT=y | 220 | CONFIG_CPU_FREQ_STAT=y |
221 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | 221 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set |
222 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | 222 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y |
@@ -495,8 +495,9 @@ CONFIG_SCSI=y | |||
495 | CONFIG_BLK_DEV_SD=y | 495 | CONFIG_BLK_DEV_SD=y |
496 | # CONFIG_CHR_DEV_ST is not set | 496 | # CONFIG_CHR_DEV_ST is not set |
497 | # CONFIG_CHR_DEV_OSST is not set | 497 | # CONFIG_CHR_DEV_OSST is not set |
498 | # CONFIG_BLK_DEV_SR is not set | 498 | CONFIG_BLK_DEV_SR=y |
499 | # CONFIG_CHR_DEV_SG is not set | 499 | # CONFIG_BLK_DEV_SR_VENDOR is not set |
500 | CONFIG_CHR_DEV_SG=y | ||
500 | # CONFIG_CHR_DEV_SCH is not set | 501 | # CONFIG_CHR_DEV_SCH is not set |
501 | 502 | ||
502 | # | 503 | # |
@@ -512,7 +513,7 @@ CONFIG_SCSI_CONSTANTS=y | |||
512 | CONFIG_SCSI_SPI_ATTRS=y | 513 | CONFIG_SCSI_SPI_ATTRS=y |
513 | CONFIG_SCSI_FC_ATTRS=y | 514 | CONFIG_SCSI_FC_ATTRS=y |
514 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 515 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
515 | # CONFIG_SCSI_SAS_ATTRS is not set | 516 | CONFIG_SCSI_SAS_ATTRS=y |
516 | 517 | ||
517 | # | 518 | # |
518 | # SCSI low-level drivers | 519 | # SCSI low-level drivers |
@@ -538,7 +539,7 @@ CONFIG_MEGARAID_MAILBOX=y | |||
538 | CONFIG_MEGARAID_SAS=y | 539 | CONFIG_MEGARAID_SAS=y |
539 | CONFIG_SCSI_SATA=y | 540 | CONFIG_SCSI_SATA=y |
540 | CONFIG_SCSI_SATA_AHCI=y | 541 | CONFIG_SCSI_SATA_AHCI=y |
541 | # CONFIG_SCSI_SATA_SVW is not set | 542 | CONFIG_SCSI_SATA_SVW=y |
542 | CONFIG_SCSI_ATA_PIIX=y | 543 | CONFIG_SCSI_ATA_PIIX=y |
543 | # CONFIG_SCSI_SATA_MV is not set | 544 | # CONFIG_SCSI_SATA_MV is not set |
544 | CONFIG_SCSI_SATA_NV=y | 545 | CONFIG_SCSI_SATA_NV=y |
@@ -589,7 +590,7 @@ CONFIG_BLK_DEV_DM=y | |||
589 | CONFIG_FUSION=y | 590 | CONFIG_FUSION=y |
590 | CONFIG_FUSION_SPI=y | 591 | CONFIG_FUSION_SPI=y |
591 | # CONFIG_FUSION_FC is not set | 592 | # CONFIG_FUSION_FC is not set |
592 | # CONFIG_FUSION_SAS is not set | 593 | CONFIG_FUSION_SAS=y |
593 | CONFIG_FUSION_MAX_SGE=128 | 594 | CONFIG_FUSION_MAX_SGE=128 |
594 | # CONFIG_FUSION_CTL is not set | 595 | # CONFIG_FUSION_CTL is not set |
595 | 596 | ||
@@ -675,7 +676,7 @@ CONFIG_NET_PCI=y | |||
675 | # CONFIG_PCNET32 is not set | 676 | # CONFIG_PCNET32 is not set |
676 | # CONFIG_AMD8111_ETH is not set | 677 | # CONFIG_AMD8111_ETH is not set |
677 | # CONFIG_ADAPTEC_STARFIRE is not set | 678 | # CONFIG_ADAPTEC_STARFIRE is not set |
678 | # CONFIG_B44 is not set | 679 | CONFIG_B44=y |
679 | CONFIG_FORCEDETH=y | 680 | CONFIG_FORCEDETH=y |
680 | # CONFIG_DGRS is not set | 681 | # CONFIG_DGRS is not set |
681 | # CONFIG_EEPRO100 is not set | 682 | # CONFIG_EEPRO100 is not set |
@@ -712,7 +713,7 @@ CONFIG_E1000=y | |||
712 | # CONFIG_SK98LIN is not set | 713 | # CONFIG_SK98LIN is not set |
713 | # CONFIG_VIA_VELOCITY is not set | 714 | # CONFIG_VIA_VELOCITY is not set |
714 | CONFIG_TIGON3=y | 715 | CONFIG_TIGON3=y |
715 | # CONFIG_BNX2 is not set | 716 | CONFIG_BNX2=y |
716 | 717 | ||
717 | # | 718 | # |
718 | # Ethernet (10000 Mbit) | 719 | # Ethernet (10000 Mbit) |
@@ -842,44 +843,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
842 | # | 843 | # |
843 | # Watchdog Cards | 844 | # Watchdog Cards |
844 | # | 845 | # |
845 | CONFIG_WATCHDOG=y | 846 | # CONFIG_WATCHDOG is not set |
846 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
847 | |||
848 | # | ||
849 | # Watchdog Device Drivers | ||
850 | # | ||
851 | CONFIG_SOFT_WATCHDOG=y | ||
852 | # CONFIG_ACQUIRE_WDT is not set | ||
853 | # CONFIG_ADVANTECH_WDT is not set | ||
854 | # CONFIG_ALIM1535_WDT is not set | ||
855 | # CONFIG_ALIM7101_WDT is not set | ||
856 | # CONFIG_SC520_WDT is not set | ||
857 | # CONFIG_EUROTECH_WDT is not set | ||
858 | # CONFIG_IB700_WDT is not set | ||
859 | # CONFIG_IBMASR is not set | ||
860 | # CONFIG_WAFER_WDT is not set | ||
861 | # CONFIG_I6300ESB_WDT is not set | ||
862 | # CONFIG_I8XX_TCO is not set | ||
863 | # CONFIG_SC1200_WDT is not set | ||
864 | # CONFIG_60XX_WDT is not set | ||
865 | # CONFIG_SBC8360_WDT is not set | ||
866 | # CONFIG_CPU5_WDT is not set | ||
867 | # CONFIG_W83627HF_WDT is not set | ||
868 | # CONFIG_W83877F_WDT is not set | ||
869 | # CONFIG_W83977F_WDT is not set | ||
870 | # CONFIG_MACHZ_WDT is not set | ||
871 | # CONFIG_SBC_EPX_C3_WATCHDOG is not set | ||
872 | |||
873 | # | ||
874 | # PCI-based Watchdog Cards | ||
875 | # | ||
876 | # CONFIG_PCIPCWATCHDOG is not set | ||
877 | # CONFIG_WDTPCI is not set | ||
878 | |||
879 | # | ||
880 | # USB-based Watchdog Cards | ||
881 | # | ||
882 | # CONFIG_USBPCWATCHDOG is not set | ||
883 | CONFIG_HW_RANDOM=y | 847 | CONFIG_HW_RANDOM=y |
884 | CONFIG_HW_RANDOM_INTEL=y | 848 | CONFIG_HW_RANDOM_INTEL=y |
885 | CONFIG_HW_RANDOM_AMD=y | 849 | CONFIG_HW_RANDOM_AMD=y |
@@ -1056,6 +1020,7 @@ CONFIG_VGACON_SOFT_SCROLLBACK=y | |||
1056 | CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=256 | 1020 | CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=256 |
1057 | CONFIG_VIDEO_SELECT=y | 1021 | CONFIG_VIDEO_SELECT=y |
1058 | CONFIG_DUMMY_CONSOLE=y | 1022 | CONFIG_DUMMY_CONSOLE=y |
1023 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1059 | 1024 | ||
1060 | # | 1025 | # |
1061 | # Sound | 1026 | # Sound |
@@ -1301,7 +1266,7 @@ CONFIG_INOTIFY=y | |||
1301 | CONFIG_INOTIFY_USER=y | 1266 | CONFIG_INOTIFY_USER=y |
1302 | # CONFIG_QUOTA is not set | 1267 | # CONFIG_QUOTA is not set |
1303 | CONFIG_DNOTIFY=y | 1268 | CONFIG_DNOTIFY=y |
1304 | CONFIG_AUTOFS_FS=y | 1269 | # CONFIG_AUTOFS_FS is not set |
1305 | CONFIG_AUTOFS4_FS=y | 1270 | CONFIG_AUTOFS4_FS=y |
1306 | # CONFIG_FUSE_FS is not set | 1271 | # CONFIG_FUSE_FS is not set |
1307 | 1272 | ||
@@ -1494,4 +1459,5 @@ CONFIG_DEBUG_STACKOVERFLOW=y | |||
1494 | # CONFIG_CRC16 is not set | 1459 | # CONFIG_CRC16 is not set |
1495 | CONFIG_CRC32=y | 1460 | CONFIG_CRC32=y |
1496 | # CONFIG_LIBCRC32C is not set | 1461 | # CONFIG_LIBCRC32C is not set |
1462 | CONFIG_ZLIB_INFLATE=y | ||
1497 | CONFIG_PLIST=y | 1463 | CONFIG_PLIST=y |
diff --git a/arch/x86_64/ia32/ia32_binfmt.c b/arch/x86_64/ia32/ia32_binfmt.c index a9dc0f3b5b51..2fd5a67fd435 100644 --- a/arch/x86_64/ia32/ia32_binfmt.c +++ b/arch/x86_64/ia32/ia32_binfmt.c | |||
@@ -73,39 +73,44 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | |||
73 | * Dumping its extra ELF program headers includes all the other information | 73 | * Dumping its extra ELF program headers includes all the other information |
74 | * a debugger needs to easily find how the vsyscall DSO was being used. | 74 | * a debugger needs to easily find how the vsyscall DSO was being used. |
75 | */ | 75 | */ |
76 | #define ELF_CORE_EXTRA_PHDRS (VSYSCALL32_EHDR->e_phnum) | 76 | #define ELF_CORE_EXTRA_PHDRS (find_vma(current->mm, VSYSCALL32_BASE) ? \ |
77 | (VSYSCALL32_EHDR->e_phnum) : 0) | ||
77 | #define ELF_CORE_WRITE_EXTRA_PHDRS \ | 78 | #define ELF_CORE_WRITE_EXTRA_PHDRS \ |
78 | do { \ | 79 | do { \ |
79 | const struct elf32_phdr *const vsyscall_phdrs = \ | 80 | if (find_vma(current->mm, VSYSCALL32_BASE)) { \ |
80 | (const struct elf32_phdr *) (VSYSCALL32_BASE \ | 81 | const struct elf32_phdr *const vsyscall_phdrs = \ |
81 | + VSYSCALL32_EHDR->e_phoff); \ | 82 | (const struct elf32_phdr *) (VSYSCALL32_BASE \ |
82 | int i; \ | 83 | + VSYSCALL32_EHDR->e_phoff);\ |
83 | Elf32_Off ofs = 0; \ | 84 | int i; \ |
84 | for (i = 0; i < VSYSCALL32_EHDR->e_phnum; ++i) { \ | 85 | Elf32_Off ofs = 0; \ |
85 | struct elf32_phdr phdr = vsyscall_phdrs[i]; \ | 86 | for (i = 0; i < VSYSCALL32_EHDR->e_phnum; ++i) { \ |
86 | if (phdr.p_type == PT_LOAD) { \ | 87 | struct elf32_phdr phdr = vsyscall_phdrs[i]; \ |
87 | BUG_ON(ofs != 0); \ | 88 | if (phdr.p_type == PT_LOAD) { \ |
88 | ofs = phdr.p_offset = offset; \ | 89 | BUG_ON(ofs != 0); \ |
89 | phdr.p_memsz = PAGE_ALIGN(phdr.p_memsz); \ | 90 | ofs = phdr.p_offset = offset; \ |
90 | phdr.p_filesz = phdr.p_memsz; \ | 91 | phdr.p_memsz = PAGE_ALIGN(phdr.p_memsz); \ |
91 | offset += phdr.p_filesz; \ | 92 | phdr.p_filesz = phdr.p_memsz; \ |
93 | offset += phdr.p_filesz; \ | ||
94 | } \ | ||
95 | else \ | ||
96 | phdr.p_offset += ofs; \ | ||
97 | phdr.p_paddr = 0; /* match other core phdrs */ \ | ||
98 | DUMP_WRITE(&phdr, sizeof(phdr)); \ | ||
92 | } \ | 99 | } \ |
93 | else \ | ||
94 | phdr.p_offset += ofs; \ | ||
95 | phdr.p_paddr = 0; /* match other core phdrs */ \ | ||
96 | DUMP_WRITE(&phdr, sizeof(phdr)); \ | ||
97 | } \ | 100 | } \ |
98 | } while (0) | 101 | } while (0) |
99 | #define ELF_CORE_WRITE_EXTRA_DATA \ | 102 | #define ELF_CORE_WRITE_EXTRA_DATA \ |
100 | do { \ | 103 | do { \ |
101 | const struct elf32_phdr *const vsyscall_phdrs = \ | 104 | if (find_vma(current->mm, VSYSCALL32_BASE)) { \ |
102 | (const struct elf32_phdr *) (VSYSCALL32_BASE \ | 105 | const struct elf32_phdr *const vsyscall_phdrs = \ |
103 | + VSYSCALL32_EHDR->e_phoff); \ | 106 | (const struct elf32_phdr *) (VSYSCALL32_BASE \ |
104 | int i; \ | 107 | + VSYSCALL32_EHDR->e_phoff); \ |
105 | for (i = 0; i < VSYSCALL32_EHDR->e_phnum; ++i) { \ | 108 | int i; \ |
106 | if (vsyscall_phdrs[i].p_type == PT_LOAD) \ | 109 | for (i = 0; i < VSYSCALL32_EHDR->e_phnum; ++i) { \ |
107 | DUMP_WRITE((void *) (u64) vsyscall_phdrs[i].p_vaddr, \ | 110 | if (vsyscall_phdrs[i].p_type == PT_LOAD) \ |
108 | PAGE_ALIGN(vsyscall_phdrs[i].p_memsz)); \ | 111 | DUMP_WRITE((void *) (u64) vsyscall_phdrs[i].p_vaddr,\ |
112 | PAGE_ALIGN(vsyscall_phdrs[i].p_memsz)); \ | ||
113 | } \ | ||
109 | } \ | 114 | } \ |
110 | } while (0) | 115 | } while (0) |
111 | 116 | ||
diff --git a/arch/x86_64/kernel/e820.c b/arch/x86_64/kernel/e820.c index e56c2adf57a4..764bf23c7103 100644 --- a/arch/x86_64/kernel/e820.c +++ b/arch/x86_64/kernel/e820.c | |||
@@ -71,7 +71,11 @@ static inline int bad_addr(unsigned long *addrp, unsigned long size) | |||
71 | #endif | 71 | #endif |
72 | /* kernel code + 640k memory hole (later should not be needed, but | 72 | /* kernel code + 640k memory hole (later should not be needed, but |
73 | be paranoid for now) */ | 73 | be paranoid for now) */ |
74 | if (last >= 640*1024 && addr < __pa_symbol(&_end)) { | 74 | if (last >= 640*1024 && addr < 1024*1024) { |
75 | *addrp = 1024*1024; | ||
76 | return 1; | ||
77 | } | ||
78 | if (last >= __pa_symbol(&_text) && last < __pa_symbol(&_end)) { | ||
75 | *addrp = __pa_symbol(&_end); | 79 | *addrp = __pa_symbol(&_end); |
76 | return 1; | 80 | return 1; |
77 | } | 81 | } |
@@ -104,35 +108,6 @@ e820_any_mapped(unsigned long start, unsigned long end, unsigned type) | |||
104 | return 0; | 108 | return 0; |
105 | } | 109 | } |
106 | 110 | ||
107 | /* | ||
108 | * This function checks if the entire range <start,end> is mapped with type. | ||
109 | * | ||
110 | * Note: this function only works correct if the e820 table is sorted and | ||
111 | * not-overlapping, which is the case | ||
112 | */ | ||
113 | int __init e820_all_mapped(unsigned long start, unsigned long end, unsigned type) | ||
114 | { | ||
115 | int i; | ||
116 | for (i = 0; i < e820.nr_map; i++) { | ||
117 | struct e820entry *ei = &e820.map[i]; | ||
118 | if (type && ei->type != type) | ||
119 | continue; | ||
120 | /* is the region (part) in overlap with the current region ?*/ | ||
121 | if (ei->addr >= end || ei->addr + ei->size <= start) | ||
122 | continue; | ||
123 | |||
124 | /* if the region is at the beginning of <start,end> we move | ||
125 | * start to the end of the region since it's ok until there | ||
126 | */ | ||
127 | if (ei->addr <= start) | ||
128 | start = ei->addr + ei->size; | ||
129 | /* if start is now at or beyond end, we're done, full coverage */ | ||
130 | if (start >= end) | ||
131 | return 1; /* we're done */ | ||
132 | } | ||
133 | return 0; | ||
134 | } | ||
135 | |||
136 | /* | 111 | /* |
137 | * Find a free area in a specific range. | 112 | * Find a free area in a specific range. |
138 | */ | 113 | */ |
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S index 6f810424df44..aa8d8939abc1 100644 --- a/arch/x86_64/kernel/entry.S +++ b/arch/x86_64/kernel/entry.S | |||
@@ -973,6 +973,8 @@ ENTRY(kernel_thread) | |||
973 | ENDPROC(kernel_thread) | 973 | ENDPROC(kernel_thread) |
974 | 974 | ||
975 | child_rip: | 975 | child_rip: |
976 | pushq $0 # fake return address | ||
977 | CFI_STARTPROC | ||
976 | /* | 978 | /* |
977 | * Here we are in the child and the registers are set as they were | 979 | * Here we are in the child and the registers are set as they were |
978 | * at kernel_thread() invocation in the parent. | 980 | * at kernel_thread() invocation in the parent. |
@@ -983,6 +985,7 @@ child_rip: | |||
983 | # exit | 985 | # exit |
984 | xorl %edi, %edi | 986 | xorl %edi, %edi |
985 | call do_exit | 987 | call do_exit |
988 | CFI_ENDPROC | ||
986 | ENDPROC(child_rip) | 989 | ENDPROC(child_rip) |
987 | 990 | ||
988 | /* | 991 | /* |
diff --git a/arch/x86_64/kernel/head.S b/arch/x86_64/kernel/head.S index 6df05e6034fa..c9739ca81d06 100644 --- a/arch/x86_64/kernel/head.S +++ b/arch/x86_64/kernel/head.S | |||
@@ -191,6 +191,7 @@ startup_64: | |||
191 | * jump | 191 | * jump |
192 | */ | 192 | */ |
193 | movq initial_code(%rip),%rax | 193 | movq initial_code(%rip),%rax |
194 | pushq $0 # fake return address | ||
194 | jmp *%rax | 195 | jmp *%rax |
195 | 196 | ||
196 | /* SMP bootup changes these two */ | 197 | /* SMP bootup changes these two */ |
diff --git a/arch/x86_64/kernel/init_task.c b/arch/x86_64/kernel/init_task.c index ce31d904d601..3dc5854ba21e 100644 --- a/arch/x86_64/kernel/init_task.c +++ b/arch/x86_64/kernel/init_task.c | |||
@@ -46,4 +46,9 @@ EXPORT_SYMBOL(init_task); | |||
46 | */ | 46 | */ |
47 | DEFINE_PER_CPU(struct tss_struct, init_tss) ____cacheline_internodealigned_in_smp = INIT_TSS; | 47 | DEFINE_PER_CPU(struct tss_struct, init_tss) ____cacheline_internodealigned_in_smp = INIT_TSS; |
48 | 48 | ||
49 | /* Copies of the original ist values from the tss are only accessed during | ||
50 | * debugging, no special alignment required. | ||
51 | */ | ||
52 | DEFINE_PER_CPU(struct orig_ist, orig_ist); | ||
53 | |||
49 | #define ALIGN_TO_4K __attribute__((section(".data.init_task"))) | 54 | #define ALIGN_TO_4K __attribute__((section(".data.init_task"))) |
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index 8a099ff1f8bc..34afad704824 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c | |||
@@ -521,8 +521,6 @@ static void discover_ebda(void) | |||
521 | 521 | ||
522 | void __init setup_arch(char **cmdline_p) | 522 | void __init setup_arch(char **cmdline_p) |
523 | { | 523 | { |
524 | unsigned long kernel_end; | ||
525 | |||
526 | ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); | 524 | ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); |
527 | screen_info = SCREEN_INFO; | 525 | screen_info = SCREEN_INFO; |
528 | edid_info = EDID_INFO; | 526 | edid_info = EDID_INFO; |
@@ -596,8 +594,8 @@ void __init setup_arch(char **cmdline_p) | |||
596 | (table_end - table_start) << PAGE_SHIFT); | 594 | (table_end - table_start) << PAGE_SHIFT); |
597 | 595 | ||
598 | /* reserve kernel */ | 596 | /* reserve kernel */ |
599 | kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE); | 597 | reserve_bootmem_generic(__pa_symbol(&_text), |
600 | reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY); | 598 | __pa_symbol(&_end) - __pa_symbol(&_text)); |
601 | 599 | ||
602 | /* | 600 | /* |
603 | * reserve physical page 0 - it's a special BIOS page on many boxes, | 601 | * reserve physical page 0 - it's a special BIOS page on many boxes, |
diff --git a/arch/x86_64/kernel/setup64.c b/arch/x86_64/kernel/setup64.c index 6fe58a634b5f..417de564456e 100644 --- a/arch/x86_64/kernel/setup64.c +++ b/arch/x86_64/kernel/setup64.c | |||
@@ -189,6 +189,7 @@ void __cpuinit cpu_init (void) | |||
189 | { | 189 | { |
190 | int cpu = stack_smp_processor_id(); | 190 | int cpu = stack_smp_processor_id(); |
191 | struct tss_struct *t = &per_cpu(init_tss, cpu); | 191 | struct tss_struct *t = &per_cpu(init_tss, cpu); |
192 | struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu); | ||
192 | unsigned long v; | 193 | unsigned long v; |
193 | char *estacks = NULL; | 194 | char *estacks = NULL; |
194 | struct task_struct *me; | 195 | struct task_struct *me; |
@@ -256,7 +257,7 @@ void __cpuinit cpu_init (void) | |||
256 | estacks += EXCEPTION_STKSZ; | 257 | estacks += EXCEPTION_STKSZ; |
257 | break; | 258 | break; |
258 | } | 259 | } |
259 | t->ist[v] = (unsigned long)estacks; | 260 | orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks; |
260 | } | 261 | } |
261 | 262 | ||
262 | t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap); | 263 | t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap); |
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c index 4e9938dee060..b1249774d1e8 100644 --- a/arch/x86_64/kernel/traps.c +++ b/arch/x86_64/kernel/traps.c | |||
@@ -107,7 +107,11 @@ static inline void preempt_conditional_cli(struct pt_regs *regs) | |||
107 | } | 107 | } |
108 | 108 | ||
109 | static int kstack_depth_to_print = 12; | 109 | static int kstack_depth_to_print = 12; |
110 | #ifdef CONFIG_STACK_UNWIND | ||
110 | static int call_trace = 1; | 111 | static int call_trace = 1; |
112 | #else | ||
113 | #define call_trace (-1) | ||
114 | #endif | ||
111 | 115 | ||
112 | #ifdef CONFIG_KALLSYMS | 116 | #ifdef CONFIG_KALLSYMS |
113 | # include <linux/kallsyms.h> | 117 | # include <linux/kallsyms.h> |
@@ -174,7 +178,7 @@ static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack, | |||
174 | break; | 178 | break; |
175 | #endif | 179 | #endif |
176 | default: | 180 | default: |
177 | end = per_cpu(init_tss, cpu).ist[k]; | 181 | end = per_cpu(orig_ist, cpu).ist[k]; |
178 | break; | 182 | break; |
179 | } | 183 | } |
180 | /* | 184 | /* |
@@ -274,21 +278,21 @@ void show_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s | |||
274 | if (unwind_init_blocked(&info, tsk) == 0) | 278 | if (unwind_init_blocked(&info, tsk) == 0) |
275 | unw_ret = show_trace_unwind(&info, NULL); | 279 | unw_ret = show_trace_unwind(&info, NULL); |
276 | } | 280 | } |
277 | if (unw_ret > 0 && !arch_unw_user_mode(&info)) { | 281 | if (unw_ret > 0) { |
278 | #ifdef CONFIG_STACK_UNWIND | 282 | if (call_trace == 1 && !arch_unw_user_mode(&info)) { |
279 | unsigned long rip = info.regs.rip; | 283 | print_symbol("DWARF2 unwinder stuck at %s\n", |
280 | print_symbol("DWARF2 unwinder stuck at %s\n", rip); | 284 | UNW_PC(&info)); |
281 | if (call_trace == 1) { | 285 | if ((long)UNW_SP(&info) < 0) { |
282 | printk("Leftover inexact backtrace:\n"); | 286 | printk("Leftover inexact backtrace:\n"); |
283 | stack = (unsigned long *)info.regs.rsp; | 287 | stack = (unsigned long *)UNW_SP(&info); |
284 | } else if (call_trace > 1) | 288 | } else |
289 | printk("Full inexact backtrace again:\n"); | ||
290 | } else if (call_trace >= 1) | ||
285 | return; | 291 | return; |
286 | else | 292 | else |
287 | printk("Full inexact backtrace again:\n"); | 293 | printk("Full inexact backtrace again:\n"); |
288 | #else | 294 | } else |
289 | printk("Inexact backtrace:\n"); | 295 | printk("Inexact backtrace:\n"); |
290 | #endif | ||
291 | } | ||
292 | } | 296 | } |
293 | 297 | ||
294 | /* | 298 | /* |
@@ -529,7 +533,7 @@ void __kprobes oops_end(unsigned long flags) | |||
529 | /* Nest count reaches zero, release the lock. */ | 533 | /* Nest count reaches zero, release the lock. */ |
530 | spin_unlock_irqrestore(&die_lock, flags); | 534 | spin_unlock_irqrestore(&die_lock, flags); |
531 | if (panic_on_oops) | 535 | if (panic_on_oops) |
532 | panic("Fatal exception: panic_on_oops"); | 536 | panic("Fatal exception"); |
533 | } | 537 | } |
534 | 538 | ||
535 | void __kprobes __die(const char * str, struct pt_regs * regs, long err) | 539 | void __kprobes __die(const char * str, struct pt_regs * regs, long err) |
@@ -1120,6 +1124,7 @@ static int __init kstack_setup(char *s) | |||
1120 | } | 1124 | } |
1121 | __setup("kstack=", kstack_setup); | 1125 | __setup("kstack=", kstack_setup); |
1122 | 1126 | ||
1127 | #ifdef CONFIG_STACK_UNWIND | ||
1123 | static int __init call_trace_setup(char *s) | 1128 | static int __init call_trace_setup(char *s) |
1124 | { | 1129 | { |
1125 | if (strcmp(s, "old") == 0) | 1130 | if (strcmp(s, "old") == 0) |
@@ -1133,3 +1138,4 @@ static int __init call_trace_setup(char *s) | |||
1133 | return 1; | 1138 | return 1; |
1134 | } | 1139 | } |
1135 | __setup("call_trace=", call_trace_setup); | 1140 | __setup("call_trace=", call_trace_setup); |
1141 | #endif | ||
diff --git a/arch/x86_64/pci/mmconfig.c b/arch/x86_64/pci/mmconfig.c index 3c55c76c6fd5..2d48a7941d48 100644 --- a/arch/x86_64/pci/mmconfig.c +++ b/arch/x86_64/pci/mmconfig.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <linux/init.h> | 9 | #include <linux/init.h> |
10 | #include <linux/acpi.h> | 10 | #include <linux/acpi.h> |
11 | #include <linux/bitmap.h> | 11 | #include <linux/bitmap.h> |
12 | #include <linux/dmi.h> | ||
12 | #include <asm/e820.h> | 13 | #include <asm/e820.h> |
13 | 14 | ||
14 | #include "pci.h" | 15 | #include "pci.h" |
@@ -164,11 +165,33 @@ static __init void unreachable_devices(void) | |||
164 | } | 165 | } |
165 | } | 166 | } |
166 | 167 | ||
168 | static int disable_mcfg(struct dmi_system_id *d) | ||
169 | { | ||
170 | printk("PCI: %s detected. Disabling MCFG.\n", d->ident); | ||
171 | pci_probe &= ~PCI_PROBE_MMCONF; | ||
172 | return 0; | ||
173 | } | ||
174 | |||
175 | static struct dmi_system_id __initdata dmi_bad_mcfg[] = { | ||
176 | /* Has broken MCFG table that makes the system hang when used */ | ||
177 | { | ||
178 | .callback = disable_mcfg, | ||
179 | .ident = "Intel D3C5105 SDV", | ||
180 | .matches = { | ||
181 | DMI_MATCH(DMI_BIOS_VENDOR, "Intel"), | ||
182 | DMI_MATCH(DMI_BOARD_NAME, "D26928"), | ||
183 | }, | ||
184 | }, | ||
185 | {} | ||
186 | }; | ||
187 | |||
167 | void __init pci_mmcfg_init(void) | 188 | void __init pci_mmcfg_init(void) |
168 | { | 189 | { |
169 | int i; | 190 | int i; |
170 | 191 | ||
171 | if ((pci_probe & PCI_PROBE_MMCONF) == 0) | 192 | dmi_check_system(dmi_bad_mcfg); |
193 | |||
194 | if ((pci_probe & (PCI_PROBE_MMCONF|PCI_PROBE_MMCONF_FORCE)) == 0) | ||
172 | return; | 195 | return; |
173 | 196 | ||
174 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); | 197 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); |
@@ -177,15 +200,6 @@ void __init pci_mmcfg_init(void) | |||
177 | (pci_mmcfg_config[0].base_address == 0)) | 200 | (pci_mmcfg_config[0].base_address == 0)) |
178 | return; | 201 | return; |
179 | 202 | ||
180 | if (!e820_all_mapped(pci_mmcfg_config[0].base_address, | ||
181 | pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN, | ||
182 | E820_RESERVED)) { | ||
183 | printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n", | ||
184 | pci_mmcfg_config[0].base_address); | ||
185 | printk(KERN_ERR "PCI: Not using MMCONFIG.\n"); | ||
186 | return; | ||
187 | } | ||
188 | |||
189 | /* RED-PEN i386 doesn't do _nocache right now */ | 203 | /* RED-PEN i386 doesn't do _nocache right now */ |
190 | pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL); | 204 | pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL); |
191 | if (pci_mmcfg_virt == NULL) { | 205 | if (pci_mmcfg_virt == NULL) { |
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c index 9734960a2451..ce077d6bf3a0 100644 --- a/arch/xtensa/kernel/traps.c +++ b/arch/xtensa/kernel/traps.c | |||
@@ -488,7 +488,7 @@ void die(const char * str, struct pt_regs * regs, long err) | |||
488 | panic("Fatal exception in interrupt"); | 488 | panic("Fatal exception in interrupt"); |
489 | 489 | ||
490 | if (panic_on_oops) | 490 | if (panic_on_oops) |
491 | panic("Fatal exception: panic_on_oops"); | 491 | panic("Fatal exception"); |
492 | 492 | ||
493 | do_exit(err); | 493 | do_exit(err); |
494 | } | 494 | } |