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-rw-r--r--arch/alpha/boot/bootp.c2
-rw-r--r--arch/alpha/boot/bootpz.c2
-rw-r--r--arch/alpha/boot/main.c2
-rw-r--r--arch/alpha/kernel/irq.c4
-rw-r--r--arch/alpha/kernel/irq_alpha.c2
-rw-r--r--arch/alpha/kernel/process.c2
-rw-r--r--arch/alpha/kernel/sys_jensen.c2
-rw-r--r--arch/alpha/kernel/sys_titan.c14
-rw-r--r--arch/arm/Kconfig24
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/compressed/head.S7
-rw-r--r--arch/arm/common/gic.c18
-rw-r--r--arch/arm/common/sa1111.c6
-rw-r--r--arch/arm/common/time-acorn.c3
-rw-r--r--arch/arm/configs/at91rm9200dk_defconfig1
-rw-r--r--arch/arm/configs/at91rm9200ek_defconfig1
-rw-r--r--arch/arm/configs/ateb9200_defconfig1
-rw-r--r--arch/arm/configs/carmeva_defconfig1
-rw-r--r--arch/arm/configs/csb337_defconfig1
-rw-r--r--arch/arm/configs/csb637_defconfig1
-rw-r--r--arch/arm/configs/kafa_defconfig1
-rw-r--r--arch/arm/configs/kb9202_defconfig1
-rw-r--r--arch/arm/configs/omap_h2_1610_defconfig129
-rw-r--r--arch/arm/configs/onearm_defconfig1
-rw-r--r--arch/arm/configs/trizeps4_defconfig1579
-rw-r--r--arch/arm/kernel/Makefile2
-rw-r--r--arch/arm/kernel/asm-offsets.c3
-rw-r--r--arch/arm/kernel/ecard.c4
-rw-r--r--arch/arm/kernel/entry-armv.S4
-rw-r--r--arch/arm/kernel/fiq.c1
-rw-r--r--arch/arm/kernel/head.S5
-rw-r--r--arch/arm/kernel/irq.c951
-rw-r--r--arch/arm/kernel/iwmmxt-notifier.c64
-rw-r--r--arch/arm/kernel/iwmmxt.S27
-rw-r--r--arch/arm/kernel/process.c6
-rw-r--r--arch/arm/kernel/setup.c4
-rw-r--r--arch/arm/mach-aaec2000/core.c2
-rw-r--r--arch/arm/mach-at91rm9200/Kconfig82
-rw-r--r--arch/arm/mach-at91rm9200/Makefile13
-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200.c (renamed from arch/arm/mach-at91rm9200/common.c)2
-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200_time.c (renamed from arch/arm/mach-at91rm9200/time.c)6
-rw-r--r--arch/arm/mach-at91rm9200/gpio.c11
-rw-r--r--arch/arm/mach-clps711x/time.c3
-rw-r--r--arch/arm/mach-clps7500/core.c3
-rw-r--r--arch/arm/mach-ebsa110/core.c2
-rw-r--r--arch/arm/mach-ep93xx/Kconfig12
-rw-r--r--arch/arm/mach-ep93xx/Makefile2
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-ep93xx/edb9302.c62
-rw-r--r--arch/arm/mach-ep93xx/edb9315a.c62
-rw-r--r--arch/arm/mach-footbridge/dc21285-timer.c3
-rw-r--r--arch/arm/mach-footbridge/dc21285.c10
-rw-r--r--arch/arm/mach-footbridge/isa-irq.c19
-rw-r--r--arch/arm/mach-footbridge/isa-timer.c3
-rw-r--r--arch/arm/mach-h720x/cpu-h7201.c2
-rw-r--r--arch/arm/mach-h720x/cpu-h7202.c2
-rw-r--r--arch/arm/mach-imx/time.c3
-rw-r--r--arch/arm/mach-integrator/core.c3
-rw-r--r--arch/arm/mach-integrator/time.c2
-rw-r--r--arch/arm/mach-iop3xx/Kconfig15
-rw-r--r--arch/arm/mach-iop3xx/iop321-time.c2
-rw-r--r--arch/arm/mach-iop3xx/iop331-time.c2
-rw-r--r--arch/arm/mach-ixp2000/core.c5
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x01.c2
-rw-r--r--arch/arm/mach-ixp23xx/core.c4
-rw-r--r--arch/arm/mach-ixp23xx/ixdp2351.c10
-rw-r--r--arch/arm/mach-ixp4xx/common.c2
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c1
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-pci.c1
-rw-r--r--arch/arm/mach-ixp4xx/ixdpg425-pci.c2
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-pci.c1
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-power.c6
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-power.c4
-rw-r--r--arch/arm/mach-l7200/core.c1
-rw-r--r--arch/arm/mach-lh7a40x/arch-lpd7a40x.c1
-rw-r--r--arch/arm/mach-lh7a40x/time.c3
-rw-r--r--arch/arm/mach-netx/time.c2
-rw-r--r--arch/arm/mach-omap1/Kconfig7
-rw-r--r--arch/arm/mach-omap1/Makefile1
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c7
-rw-r--r--arch/arm/mach-omap1/board-fsample.c319
-rw-r--r--arch/arm/mach-omap1/board-innovator.c75
-rw-r--r--arch/arm/mach-omap1/board-osk.c151
-rw-r--r--arch/arm/mach-omap1/clock.c18
-rw-r--r--arch/arm/mach-omap1/fpga.c2
-rw-r--r--arch/arm/mach-omap1/pm.c9
-rw-r--r--arch/arm/mach-omap1/serial.c3
-rw-r--r--arch/arm/mach-omap1/time.c6
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/Makefile5
-rw-r--r--arch/arm/mach-omap2/board-apollon.c6
-rw-r--r--arch/arm/mach-omap2/clock.c37
-rw-r--r--arch/arm/mach-omap2/clock.h2
-rw-r--r--arch/arm/mach-omap2/devices.c46
-rw-r--r--arch/arm/mach-omap2/gpmc.c209
-rw-r--r--arch/arm/mach-omap2/io.c2
-rw-r--r--arch/arm/mach-omap2/mux.c38
-rw-r--r--arch/arm/mach-omap2/pm-domain.c300
-rw-r--r--arch/arm/mach-omap2/pm.c271
-rw-r--r--arch/arm/mach-omap2/timer-gp.c86
-rw-r--r--arch/arm/mach-pnx4008/time.c2
-rw-r--r--arch/arm/mach-pxa/Kconfig19
-rw-r--r--arch/arm/mach-pxa/Makefile2
-rw-r--r--arch/arm/mach-pxa/corgi.c2
-rw-r--r--arch/arm/mach-pxa/idp.c1
-rw-r--r--arch/arm/mach-pxa/leds-trizeps4.c134
-rw-r--r--arch/arm/mach-pxa/leds.c2
-rw-r--r--arch/arm/mach-pxa/leds.h1
-rw-r--r--arch/arm/mach-pxa/lpd270.c126
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/mainstone.c2
-rw-r--r--arch/arm/mach-pxa/poodle.c2
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c10
-rw-r--r--arch/arm/mach-pxa/spitz.c2
-rw-r--r--arch/arm/mach-pxa/time.c2
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-pxa/trizeps4.c473
-rw-r--r--arch/arm/mach-realview/core.c2
-rw-r--r--arch/arm/mach-rpc/dma.c2
-rw-r--r--arch/arm/mach-s3c2410/bast-irq.c6
-rw-r--r--arch/arm/mach-s3c2410/dma.c2
-rw-r--r--arch/arm/mach-s3c2410/time.c3
-rw-r--r--arch/arm/mach-s3c2410/usb-simtec.c4
-rw-r--r--arch/arm/mach-sa1100/cerf.c1
-rw-r--r--arch/arm/mach-sa1100/collie_pm.c4
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1110.c131
-rw-r--r--arch/arm/mach-sa1100/dma.c2
-rw-r--r--arch/arm/mach-sa1100/h3600.c4
-rw-r--r--arch/arm/mach-sa1100/irq.c3
-rw-r--r--arch/arm/mach-sa1100/pleb.c1
-rw-r--r--arch/arm/mach-sa1100/time.c3
-rw-r--r--arch/arm/mach-shark/core.c3
-rw-r--r--arch/arm/mach-versatile/core.c2
-rw-r--r--arch/arm/mm/Kconfig4
-rw-r--r--arch/arm/mm/ioremap.c228
-rw-r--r--arch/arm/mm/mm-armv.c37
-rw-r--r--arch/arm/mm/proc-arm1020.S21
-rw-r--r--arch/arm/mm/proc-arm1020e.S41
-rw-r--r--arch/arm/mm/proc-arm1022.S41
-rw-r--r--arch/arm/mm/proc-arm1026.S41
-rw-r--r--arch/arm/mm/proc-arm6_7.S16
-rw-r--r--arch/arm/mm/proc-arm720.S25
-rw-r--r--arch/arm/mm/proc-arm920.S33
-rw-r--r--arch/arm/mm/proc-arm922.S33
-rw-r--r--arch/arm/mm/proc-arm925.S40
-rw-r--r--arch/arm/mm/proc-arm926.S36
-rw-r--r--arch/arm/mm/proc-macros.S10
-rw-r--r--arch/arm/mm/proc-sa110.S21
-rw-r--r--arch/arm/mm/proc-sa1100.S23
-rw-r--r--arch/arm/mm/proc-v6.S19
-rw-r--r--arch/arm/mm/proc-xsc3.S28
-rw-r--r--arch/arm/mm/proc-xscale.S63
-rw-r--r--arch/arm/oprofile/op_model_xscale.c2
-rw-r--r--arch/arm/plat-omap/Kconfig2
-rw-r--r--arch/arm/plat-omap/clock.c4
-rw-r--r--arch/arm/plat-omap/cpu-omap.c18
-rw-r--r--arch/arm/plat-omap/devices.c10
-rw-r--r--arch/arm/plat-omap/dma.c88
-rw-r--r--arch/arm/plat-omap/dmtimer.c428
-rw-r--r--arch/arm/plat-omap/gpio.c106
-rw-r--r--arch/arm/plat-omap/pm.c2
-rw-r--r--arch/arm/plat-omap/sram.c9
-rw-r--r--arch/arm/plat-omap/timer32k.c124
-rw-r--r--arch/arm26/kernel/irq.c16
-rw-r--r--arch/arm26/kernel/time.c2
-rw-r--r--arch/cris/arch-v10/drivers/gpio.c4
-rw-r--r--arch/cris/arch-v10/kernel/time.c6
-rw-r--r--arch/cris/arch-v32/drivers/gpio.c4
-rw-r--r--arch/cris/arch-v32/kernel/arbiter.c2
-rw-r--r--arch/cris/arch-v32/kernel/fasttimer.c2
-rw-r--r--arch/cris/arch-v32/kernel/irq.c2
-rw-r--r--arch/cris/arch-v32/kernel/smp.c2
-rw-r--r--arch/cris/arch-v32/kernel/time.c12
-rw-r--r--arch/cris/kernel/irq.c2
-rw-r--r--arch/frv/kernel/irq-routing.c4
-rw-r--r--arch/frv/kernel/irq.c12
-rw-r--r--arch/frv/kernel/setup.c2
-rw-r--r--arch/frv/kernel/time.c2
-rw-r--r--arch/h8300/kernel/ints.c4
-rw-r--r--arch/h8300/platform/h8s/ints.c4
-rw-r--r--arch/i386/Kconfig8
-rw-r--r--arch/i386/Kconfig.debug13
-rw-r--r--arch/i386/boot/setup.S2
-rw-r--r--arch/i386/kernel/Makefile1
-rw-r--r--arch/i386/kernel/alternative.c10
-rw-r--r--arch/i386/kernel/cpuid.c6
-rw-r--r--arch/i386/kernel/entry.S36
-rw-r--r--arch/i386/kernel/irq.c6
-rw-r--r--arch/i386/kernel/nmi.c2
-rw-r--r--arch/i386/kernel/stacktrace.c98
-rw-r--r--arch/i386/kernel/traps.c39
-rw-r--r--arch/i386/mach-default/setup.c2
-rw-r--r--arch/i386/mach-visws/setup.c2
-rw-r--r--arch/i386/mach-voyager/setup.c2
-rw-r--r--arch/i386/pci/irq.c2
-rw-r--r--arch/ia64/hp/sim/simserial.c2
-rw-r--r--arch/ia64/kernel/irq_ia64.c2
-rw-r--r--arch/ia64/kernel/mca.c22
-rw-r--r--arch/ia64/kernel/perfmon.c2
-rw-r--r--arch/ia64/kernel/smpboot.c2
-rw-r--r--arch/ia64/kernel/time.c2
-rw-r--r--arch/ia64/sn/kernel/huberror.c4
-rw-r--r--arch/ia64/sn/kernel/xpc_channel.c2
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_provider.c2
-rw-r--r--arch/ia64/sn/pci/tioca_provider.c2
-rw-r--r--arch/ia64/sn/pci/tioce_provider.c2
-rw-r--r--arch/m32r/kernel/time.c2
-rw-r--r--arch/m68k/amiga/amiints.c2
-rw-r--r--arch/m68k/amiga/cia.c2
-rw-r--r--arch/m68k/kernel/ints.c2
-rw-r--r--arch/m68knommu/platform/5307/pit.c2
-rw-r--r--arch/m68knommu/platform/5307/timers.c4
-rw-r--r--arch/mips/au1000/common/dbdma.c2
-rw-r--r--arch/mips/au1000/common/irq.c2
-rw-r--r--arch/mips/au1000/common/usbdev.c8
-rw-r--r--arch/mips/basler/excite/excite_iodev.c2
-rw-r--r--arch/mips/dec/setup.c4
-rw-r--r--arch/mips/gt64120/common/time.c2
-rw-r--r--arch/mips/kernel/entry.S2
-rw-r--r--arch/mips/kernel/mips-mt.c6
-rw-r--r--arch/mips/kernel/rtlx.c2
-rw-r--r--arch/mips/kernel/smp-mt.c4
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/kernel/time.c2
-rw-r--r--arch/mips/momentum/jaguar_atx/irq.c2
-rw-r--r--arch/mips/momentum/ocelot_3/irq.c2
-rw-r--r--arch/mips/momentum/ocelot_c/irq.c4
-rw-r--r--arch/mips/momentum/ocelot_g/gt-irq.c2
-rw-r--r--arch/mips/philips/pnx8550/common/int.c4
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c10
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c2
-rw-r--r--arch/mips/sgi-ip32/ip32-irq.c12
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c2
-rw-r--r--arch/parisc/kernel/irq.c4
-rw-r--r--arch/powerpc/configs/chrp32_defconfig1378
-rw-r--r--arch/powerpc/configs/mpc834x_itx_defconfig1336
-rw-r--r--arch/powerpc/kernel/btext.c20
-rw-r--r--arch/powerpc/kernel/ibmebus.c9
-rw-r--r--arch/powerpc/kernel/irq.c656
-rw-r--r--arch/powerpc/kernel/legacy_serial.c57
-rw-r--r--arch/powerpc/kernel/misc_64.S10
-rw-r--r--arch/powerpc/kernel/pci_32.c37
-rw-r--r--arch/powerpc/kernel/pci_64.c33
-rw-r--r--arch/powerpc/kernel/prom.c454
-rw-r--r--arch/powerpc/kernel/prom_init.c20
-rw-r--r--arch/powerpc/kernel/prom_parse.c443
-rw-r--r--arch/powerpc/kernel/rtas_pci.c17
-rw-r--r--arch/powerpc/kernel/setup_32.c2
-rw-r--r--arch/powerpc/kernel/setup_64.c17
-rw-r--r--arch/powerpc/kernel/vio.c12
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig11
-rw-r--r--arch/powerpc/platforms/83xx/Makefile1
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_itx.c156
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_itx.h23
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c419
-rw-r--r--arch/powerpc/platforms/cell/interrupt.h19
-rw-r--r--arch/powerpc/platforms/cell/setup.c22
-rw-r--r--arch/powerpc/platforms/cell/spider-pic.c394
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c119
-rw-r--r--arch/powerpc/platforms/chrp/pci.c11
-rw-r--r--arch/powerpc/platforms/chrp/setup.c103
-rw-r--r--arch/powerpc/platforms/chrp/smp.c1
-rw-r--r--arch/powerpc/platforms/iseries/irq.c105
-rw-r--r--arch/powerpc/platforms/iseries/irq.h2
-rw-r--r--arch/powerpc/platforms/iseries/setup.c8
-rw-r--r--arch/powerpc/platforms/maple/pci.c17
-rw-r--r--arch/powerpc/platforms/maple/setup.c94
-rw-r--r--arch/powerpc/platforms/powermac/bootx_init.c35
-rw-r--r--arch/powerpc/platforms/powermac/low_i2c.c9
-rw-r--r--arch/powerpc/platforms/powermac/nvram.c5
-rw-r--r--arch/powerpc/platforms/powermac/pci.c68
-rw-r--r--arch/powerpc/platforms/powermac/pfunc_base.c13
-rw-r--r--arch/powerpc/platforms/powermac/pic.c424
-rw-r--r--arch/powerpc/platforms/powermac/pmac.h2
-rw-r--r--arch/powerpc/platforms/powermac/setup.c3
-rw-r--r--arch/powerpc/platforms/powermac/smp.c2
-rw-r--r--arch/powerpc/platforms/pseries/ras.c82
-rw-r--r--arch/powerpc/platforms/pseries/setup.c244
-rw-r--r--arch/powerpc/platforms/pseries/smp.c32
-rw-r--r--arch/powerpc/platforms/pseries/xics.c723
-rw-r--r--arch/powerpc/platforms/pseries/xics.h17
-rw-r--r--arch/powerpc/sysdev/Makefile5
-rw-r--r--arch/powerpc/sysdev/i8259.c163
-rw-r--r--arch/powerpc/sysdev/mpic.c483
-rw-r--r--arch/ppc/8260_io/fcc_enet.c2
-rw-r--r--arch/ppc/platforms/85xx/mpc8560_ads.c2
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_cds_common.c2
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.c2
-rw-r--r--arch/ppc/platforms/85xx/tqm85xx.c2
-rw-r--r--arch/ppc/platforms/hdpu.c4
-rw-r--r--arch/ppc/platforms/radstone_ppc7d.c2
-rw-r--r--arch/ppc/platforms/sbc82xx.c2
-rw-r--r--arch/ppc/syslib/Makefile2
-rw-r--r--arch/ppc/syslib/btext.c2
-rw-r--r--arch/ppc/syslib/gt64260_pic.c6
-rw-r--r--arch/ppc/syslib/i8259.c212
-rw-r--r--arch/ppc/syslib/ibm440gx_common.c2
-rw-r--r--arch/ppc/syslib/m82xx_pci.c2
-rw-r--r--arch/ppc/syslib/mv64360_pic.c8
-rw-r--r--arch/ppc/syslib/open_pic.c15
-rw-r--r--arch/s390/Kconfig8
-rw-r--r--arch/s390/Kconfig.debug4
-rw-r--r--arch/s390/Makefile5
-rw-r--r--arch/s390/kernel/Makefile1
-rw-r--r--arch/s390/kernel/entry.S29
-rw-r--r--arch/s390/kernel/entry64.S21
-rw-r--r--arch/s390/kernel/irq.c8
-rw-r--r--arch/s390/kernel/process.c1
-rw-r--r--arch/s390/kernel/stacktrace.c90
-rw-r--r--arch/sh/boards/snapgear/setup.c2
-rw-r--r--arch/sh/cchips/hd6446x/hd64461/setup.c2
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/gpio.c2
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/setup.c2
-rw-r--r--arch/sh/cchips/voyagergx/irq.c2
-rw-r--r--arch/sh/drivers/dma/dma-g2.c2
-rw-r--r--arch/sh/drivers/dma/dma-pvr2.c2
-rw-r--r--arch/sh/drivers/dma/dma-sh.c4
-rw-r--r--arch/sh/drivers/pci/pci-st40.c2
-rw-r--r--arch/sh/kernel/timers/timer-tmu.c2
-rw-r--r--arch/sh64/kernel/dma.c4
-rw-r--r--arch/sh64/kernel/pci_sh5.c4
-rw-r--r--arch/sh64/kernel/time.c4
-rw-r--r--arch/sh64/mach-cayman/irq.c4
-rw-r--r--arch/sparc/kernel/irq.c14
-rw-r--r--arch/sparc/kernel/pcic.c2
-rw-r--r--arch/sparc/kernel/sun4c_irq.c2
-rw-r--r--arch/sparc/kernel/sun4d_irq.c12
-rw-r--r--arch/sparc/kernel/sun4m_irq.c2
-rw-r--r--arch/sparc/kernel/tick14.c2
-rw-r--r--arch/sparc64/kernel/ebus.c2
-rw-r--r--arch/sparc64/kernel/pci_psycho.c8
-rw-r--r--arch/sparc64/kernel/pci_sabre.c6
-rw-r--r--arch/sparc64/kernel/pci_schizo.c20
-rw-r--r--arch/sparc64/kernel/sbus.c6
-rw-r--r--arch/um/drivers/line.c6
-rw-r--r--arch/um/drivers/mconsole_kern.c2
-rw-r--r--arch/um/drivers/net_kern.c2
-rw-r--r--arch/um/drivers/port_kern.c4
-rw-r--r--arch/um/drivers/ubd_kern.c2
-rw-r--r--arch/um/drivers/xterm_kern.c2
-rw-r--r--arch/um/kernel/irq.c2
-rw-r--r--arch/um/kernel/sigio_kern.c2
-rw-r--r--arch/um/kernel/time_kern.c2
-rw-r--r--arch/um/kernel/tt/process_kern.c2
-rw-r--r--arch/um/kernel/um_arch.c2
-rw-r--r--arch/v850/kernel/gbus_int.c2
-rw-r--r--arch/v850/kernel/rte_me2_cb.c2
-rw-r--r--arch/v850/kernel/time.c2
-rw-r--r--arch/x86_64/Kconfig8
-rw-r--r--arch/x86_64/Kconfig.debug4
-rw-r--r--arch/x86_64/boot/setup.S2
-rw-r--r--arch/x86_64/ia32/ia32entry.S19
-rw-r--r--arch/x86_64/kernel/Makefile1
-rw-r--r--arch/x86_64/kernel/entry.S188
-rw-r--r--arch/x86_64/kernel/head64.c5
-rw-r--r--arch/x86_64/kernel/irq.c4
-rw-r--r--arch/x86_64/kernel/nmi.c2
-rw-r--r--arch/x86_64/kernel/process.c2
-rw-r--r--arch/x86_64/kernel/smpboot.c2
-rw-r--r--arch/x86_64/kernel/stacktrace.c221
-rw-r--r--arch/x86_64/kernel/time.c2
-rw-r--r--arch/x86_64/kernel/traps.c129
-rw-r--r--arch/x86_64/lib/thunk.S5
-rw-r--r--arch/x86_64/mm/fault.c1
-rw-r--r--arch/xtensa/kernel/time.c2
367 files changed, 12825 insertions, 4489 deletions
diff --git a/arch/alpha/boot/bootp.c b/arch/alpha/boot/bootp.c
index ec53c28e33de..3af21c789339 100644
--- a/arch/alpha/boot/bootp.c
+++ b/arch/alpha/boot/bootp.c
@@ -9,7 +9,7 @@
9 */ 9 */
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/string.h> 11#include <linux/string.h>
12#include <linux/version.h> 12#include <linux/utsrelease.h>
13#include <linux/mm.h> 13#include <linux/mm.h>
14 14
15#include <asm/system.h> 15#include <asm/system.h>
diff --git a/arch/alpha/boot/bootpz.c b/arch/alpha/boot/bootpz.c
index a6657f2cf9bd..4307bde80a35 100644
--- a/arch/alpha/boot/bootpz.c
+++ b/arch/alpha/boot/bootpz.c
@@ -11,7 +11,7 @@
11 */ 11 */
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/string.h> 13#include <linux/string.h>
14#include <linux/version.h> 14#include <linux/utsrelease.h>
15#include <linux/mm.h> 15#include <linux/mm.h>
16 16
17#include <asm/system.h> 17#include <asm/system.h>
diff --git a/arch/alpha/boot/main.c b/arch/alpha/boot/main.c
index 78c9b0b6eea7..90ed55b662a8 100644
--- a/arch/alpha/boot/main.c
+++ b/arch/alpha/boot/main.c
@@ -7,7 +7,7 @@
7 */ 7 */
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/string.h> 9#include <linux/string.h>
10#include <linux/version.h> 10#include <linux/utsrelease.h>
11#include <linux/mm.h> 11#include <linux/mm.h>
12 12
13#include <asm/system.h> 13#include <asm/system.h>
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index bd193ffd6fe0..729c475d2269 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -94,12 +94,12 @@ show_interrupts(struct seq_file *p, void *v)
94#endif 94#endif
95 seq_printf(p, " %14s", irq_desc[irq].chip->typename); 95 seq_printf(p, " %14s", irq_desc[irq].chip->typename);
96 seq_printf(p, " %c%s", 96 seq_printf(p, " %c%s",
97 (action->flags & SA_INTERRUPT)?'+':' ', 97 (action->flags & IRQF_DISABLED)?'+':' ',
98 action->name); 98 action->name);
99 99
100 for (action=action->next; action; action = action->next) { 100 for (action=action->next; action; action = action->next) {
101 seq_printf(p, ", %c%s", 101 seq_printf(p, ", %c%s",
102 (action->flags & SA_INTERRUPT)?'+':' ', 102 (action->flags & IRQF_DISABLED)?'+':' ',
103 action->name); 103 action->name);
104 } 104 }
105 105
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index ffa4ac543cf2..ddf5cf8dcb0b 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -214,7 +214,7 @@ static unsigned int rtc_startup(unsigned int irq) { return 0; }
214 214
215struct irqaction timer_irqaction = { 215struct irqaction timer_irqaction = {
216 .handler = timer_interrupt, 216 .handler = timer_interrupt,
217 .flags = SA_INTERRUPT, 217 .flags = IRQF_DISABLED,
218 .name = "timer", 218 .name = "timer",
219}; 219};
220 220
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 01c8c8b23337..41ebf51a107a 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -474,7 +474,7 @@ out:
474 */ 474 */
475 475
476unsigned long 476unsigned long
477thread_saved_pc(task_t *t) 477thread_saved_pc(struct task_struct *t)
478{ 478{
479 unsigned long base = (unsigned long)task_stack_page(t); 479 unsigned long base = (unsigned long)task_stack_page(t);
480 unsigned long fp, sp = task_thread_info(t)->pcb.ksp; 480 unsigned long fp, sp = task_thread_info(t)->pcb.ksp;
diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c
index 0148e095638f..4ac2b328b8de 100644
--- a/arch/alpha/kernel/sys_jensen.c
+++ b/arch/alpha/kernel/sys_jensen.c
@@ -74,7 +74,7 @@ jensen_local_startup(unsigned int irq)
74 * the IPL from being dropped during handler processing. 74 * the IPL from being dropped during handler processing.
75 */ 75 */
76 if (irq_desc[irq].action) 76 if (irq_desc[irq].action)
77 irq_desc[irq].action->flags |= SA_INTERRUPT; 77 irq_desc[irq].action->flags |= IRQF_DISABLED;
78 return 0; 78 return 0;
79} 79}
80 80
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index a8bfc8c16a7d..302aab38d95f 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -279,15 +279,15 @@ titan_late_init(void)
279 * all reported to the kernel as machine checks, so the handler 279 * all reported to the kernel as machine checks, so the handler
280 * is a nop so it can be called to count the individual events. 280 * is a nop so it can be called to count the individual events.
281 */ 281 */
282 request_irq(63+16, titan_intr_nop, SA_INTERRUPT, 282 request_irq(63+16, titan_intr_nop, IRQF_DISABLED,
283 "CChip Error", NULL); 283 "CChip Error", NULL);
284 request_irq(62+16, titan_intr_nop, SA_INTERRUPT, 284 request_irq(62+16, titan_intr_nop, IRQF_DISABLED,
285 "PChip 0 H_Error", NULL); 285 "PChip 0 H_Error", NULL);
286 request_irq(61+16, titan_intr_nop, SA_INTERRUPT, 286 request_irq(61+16, titan_intr_nop, IRQF_DISABLED,
287 "PChip 1 H_Error", NULL); 287 "PChip 1 H_Error", NULL);
288 request_irq(60+16, titan_intr_nop, SA_INTERRUPT, 288 request_irq(60+16, titan_intr_nop, IRQF_DISABLED,
289 "PChip 0 C_Error", NULL); 289 "PChip 0 C_Error", NULL);
290 request_irq(59+16, titan_intr_nop, SA_INTERRUPT, 290 request_irq(59+16, titan_intr_nop, IRQF_DISABLED,
291 "PChip 1 C_Error", NULL); 291 "PChip 1 C_Error", NULL);
292 292
293 /* 293 /*
@@ -348,9 +348,9 @@ privateer_init_pci(void)
348 * Hook a couple of extra err interrupts that the 348 * Hook a couple of extra err interrupts that the
349 * common titan code won't. 349 * common titan code won't.
350 */ 350 */
351 request_irq(53+16, titan_intr_nop, SA_INTERRUPT, 351 request_irq(53+16, titan_intr_nop, IRQF_DISABLED,
352 "NMI", NULL); 352 "NMI", NULL);
353 request_irq(50+16, titan_intr_nop, SA_INTERRUPT, 353 request_irq(50+16, titan_intr_nop, IRQF_DISABLED,
354 "Temperature Warning", NULL); 354 "Temperature Warning", NULL);
355 355
356 /* 356 /*
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f123c7c9fc98..f81a62380add 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -47,6 +47,18 @@ config MCA
47 <file:Documentation/mca.txt> (and especially the web page given 47 <file:Documentation/mca.txt> (and especially the web page given
48 there) before attempting to build an MCA bus kernel. 48 there) before attempting to build an MCA bus kernel.
49 49
50config GENERIC_HARDIRQS
51 bool
52 default y
53
54config HARDIRQS_SW_RESEND
55 bool
56 default y
57
58config GENERIC_IRQ_PROBE
59 bool
60 default y
61
50config RWSEM_GENERIC_SPINLOCK 62config RWSEM_GENERIC_SPINLOCK
51 bool 63 bool
52 default y 64 default y
@@ -121,11 +133,11 @@ config ARCH_VERSATILE
121 help 133 help
122 This enables support for ARM Ltd Versatile board. 134 This enables support for ARM Ltd Versatile board.
123 135
124config ARCH_AT91RM9200 136config ARCH_AT91
125 bool "Atmel AT91RM9200" 137 bool "Atmel AT91"
126 help 138 help
127 Say Y here if you intend to run this kernel on an Atmel 139 This enables support for systems based on the Atmel AT91RM9200
128 AT91RM9200-based board. 140 and AT91SAM9xxx processors.
129 141
130config ARCH_CLPS7500 142config ARCH_CLPS7500
131 bool "Cirrus CL-PS7500FE" 143 bool "Cirrus CL-PS7500FE"
@@ -547,7 +559,7 @@ config LEDS
547 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 559 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
548 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 560 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
549 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 561 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
550 ARCH_AT91RM9200 562 ARCH_AT91RM9200 || MACH_TRIZEPS4
551 help 563 help
552 If you say Y here, the LEDs on your machine will be used 564 If you say Y here, the LEDs on your machine will be used
553 to provide useful information about your current system status. 565 to provide useful information about your current system status.
@@ -678,7 +690,7 @@ config XIP_PHYS_ADDR
678 690
679endmenu 691endmenu
680 692
681if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1) 693if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP)
682 694
683menu "CPU Frequency scaling" 695menu "CPU Frequency scaling"
684 696
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a3bbaaf480b9..3345c6d0fd1e 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -114,7 +114,7 @@ endif
114 machine-$(CONFIG_ARCH_H720X) := h720x 114 machine-$(CONFIG_ARCH_H720X) := h720x
115 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000 115 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
116 machine-$(CONFIG_ARCH_REALVIEW) := realview 116 machine-$(CONFIG_ARCH_REALVIEW) := realview
117 machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200 117 machine-$(CONFIG_ARCH_AT91) := at91rm9200
118 machine-$(CONFIG_ARCH_EP93XX) := ep93xx 118 machine-$(CONFIG_ARCH_EP93XX) := ep93xx
119 machine-$(CONFIG_ARCH_PNX4008) := pnx4008 119 machine-$(CONFIG_ARCH_PNX4008) := pnx4008
120 machine-$(CONFIG_ARCH_NETX) := netx 120 machine-$(CONFIG_ARCH_NETX) := netx
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index f7b5c6db30f5..14a9ff9c68df 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -447,8 +447,11 @@ __common_mmu_cache_on:
447 mov r1, #-1 447 mov r1, #-1
448 mcr p15, 0, r3, c2, c0, 0 @ load page table pointer 448 mcr p15, 0, r3, c2, c0, 0 @ load page table pointer
449 mcr p15, 0, r1, c3, c0, 0 @ load domain access control 449 mcr p15, 0, r1, c3, c0, 0 @ load domain access control
450 mcr p15, 0, r0, c1, c0, 0 @ load control register 450 b 1f
451 mov pc, lr 451 .align 5 @ cache line aligned
4521: mcr p15, 0, r0, c1, c0, 0 @ load control register
453 mrc p15, 0, r0, c1, c0, 0 @ and read it back to
454 sub pc, lr, r0, lsr #32 @ properly flush pipeline
452 455
453/* 456/*
454 * All code following this line is relocatable. It is relocated by 457 * All code following this line is relocatable. It is relocated by
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index c02dc8116a18..f3c1ebfdd0aa 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -33,6 +33,7 @@
33 33
34static void __iomem *gic_dist_base; 34static void __iomem *gic_dist_base;
35static void __iomem *gic_cpu_base; 35static void __iomem *gic_cpu_base;
36static DEFINE_SPINLOCK(irq_controller_lock);
36 37
37/* 38/*
38 * Routines to acknowledge, disable and enable interrupts 39 * Routines to acknowledge, disable and enable interrupts
@@ -52,32 +53,45 @@ static void __iomem *gic_cpu_base;
52static void gic_ack_irq(unsigned int irq) 53static void gic_ack_irq(unsigned int irq)
53{ 54{
54 u32 mask = 1 << (irq % 32); 55 u32 mask = 1 << (irq % 32);
56
57 spin_lock(&irq_controller_lock);
55 writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4); 58 writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4);
56 writel(irq, gic_cpu_base + GIC_CPU_EOI); 59 writel(irq, gic_cpu_base + GIC_CPU_EOI);
60 spin_unlock(&irq_controller_lock);
57} 61}
58 62
59static void gic_mask_irq(unsigned int irq) 63static void gic_mask_irq(unsigned int irq)
60{ 64{
61 u32 mask = 1 << (irq % 32); 65 u32 mask = 1 << (irq % 32);
66
67 spin_lock(&irq_controller_lock);
62 writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4); 68 writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4);
69 spin_unlock(&irq_controller_lock);
63} 70}
64 71
65static void gic_unmask_irq(unsigned int irq) 72static void gic_unmask_irq(unsigned int irq)
66{ 73{
67 u32 mask = 1 << (irq % 32); 74 u32 mask = 1 << (irq % 32);
75
76 spin_lock(&irq_controller_lock);
68 writel(mask, gic_dist_base + GIC_DIST_ENABLE_SET + (irq / 32) * 4); 77 writel(mask, gic_dist_base + GIC_DIST_ENABLE_SET + (irq / 32) * 4);
78 spin_unlock(&irq_controller_lock);
69} 79}
70 80
71#ifdef CONFIG_SMP 81#ifdef CONFIG_SMP
72static void gic_set_cpu(struct irqdesc *desc, unsigned int irq, unsigned int cpu) 82static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
73{ 83{
74 void __iomem *reg = gic_dist_base + GIC_DIST_TARGET + (irq & ~3); 84 void __iomem *reg = gic_dist_base + GIC_DIST_TARGET + (irq & ~3);
75 unsigned int shift = (irq % 4) * 8; 85 unsigned int shift = (irq % 4) * 8;
86 unsigned int cpu = first_cpu(mask_val);
76 u32 val; 87 u32 val;
77 88
89 spin_lock(&irq_controller_lock);
90 irq_desc[irq].cpu = cpu;
78 val = readl(reg) & ~(0xff << shift); 91 val = readl(reg) & ~(0xff << shift);
79 val |= 1 << (cpu + shift); 92 val |= 1 << (cpu + shift);
80 writel(val, reg); 93 writel(val, reg);
94 spin_unlock(&irq_controller_lock);
81} 95}
82#endif 96#endif
83 97
@@ -86,7 +100,7 @@ static struct irqchip gic_chip = {
86 .mask = gic_mask_irq, 100 .mask = gic_mask_irq,
87 .unmask = gic_unmask_irq, 101 .unmask = gic_unmask_irq,
88#ifdef CONFIG_SMP 102#ifdef CONFIG_SMP
89 .set_cpu = gic_set_cpu, 103 .set_affinity = gic_set_cpu,
90#endif 104#endif
91}; 105};
92 106
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index fe06a36a2130..1cdb26a47e1f 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -150,7 +150,7 @@ static void
150sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) 150sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
151{ 151{
152 unsigned int stat0, stat1, i; 152 unsigned int stat0, stat1, i;
153 void __iomem *base = desc->data; 153 void __iomem *base = get_irq_data(irq);
154 154
155 stat0 = sa1111_readl(base + SA1111_INTSTATCLR0); 155 stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
156 stat1 = sa1111_readl(base + SA1111_INTSTATCLR1); 156 stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
@@ -168,11 +168,11 @@ sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
168 168
169 for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) 169 for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
170 if (stat0 & 1) 170 if (stat0 & 1)
171 do_edge_IRQ(i, irq_desc + i, regs); 171 handle_edge_irq(i, irq_desc + i, regs);
172 172
173 for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) 173 for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
174 if (stat1 & 1) 174 if (stat1 & 1)
175 do_edge_IRQ(i, irq_desc + i, regs); 175 handle_edge_irq(i, irq_desc + i, regs);
176 176
177 /* For level-based interrupts */ 177 /* For level-based interrupts */
178 desc->chip->unmask(irq); 178 desc->chip->unmask(irq);
diff --git a/arch/arm/common/time-acorn.c b/arch/arm/common/time-acorn.c
index 486add853fb8..3f60dd9aca80 100644
--- a/arch/arm/common/time-acorn.c
+++ b/arch/arm/common/time-acorn.c
@@ -16,6 +16,7 @@
16#include <linux/timex.h> 16#include <linux/timex.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/irq.h>
19 20
20#include <asm/hardware.h> 21#include <asm/hardware.h>
21#include <asm/io.h> 22#include <asm/io.h>
@@ -76,7 +77,7 @@ ioc_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
76 77
77static struct irqaction ioc_timer_irq = { 78static struct irqaction ioc_timer_irq = {
78 .name = "timer", 79 .name = "timer",
79 .flags = SA_INTERRUPT, 80 .flags = IRQF_DISABLED,
80 .handler = ioc_timer_interrupt 81 .handler = ioc_timer_interrupt
81}; 82};
82 83
diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig
index 9e1c1cceb735..4f3d8d37741e 100644
--- a/arch/arm/configs/at91rm9200dk_defconfig
+++ b/arch/arm/configs/at91rm9200dk_defconfig
@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
103# CONFIG_ARCH_IMX is not set 103# CONFIG_ARCH_IMX is not set
104# CONFIG_ARCH_H720X is not set 104# CONFIG_ARCH_H720X is not set
105# CONFIG_ARCH_AAEC2000 is not set 105# CONFIG_ARCH_AAEC2000 is not set
106CONFIG_ARCH_AT91=y
106CONFIG_ARCH_AT91RM9200=y 107CONFIG_ARCH_AT91RM9200=y
107 108
108# 109#
diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig
index 6e0805a971d7..08b5dc38876f 100644
--- a/arch/arm/configs/at91rm9200ek_defconfig
+++ b/arch/arm/configs/at91rm9200ek_defconfig
@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
103# CONFIG_ARCH_IMX is not set 103# CONFIG_ARCH_IMX is not set
104# CONFIG_ARCH_H720X is not set 104# CONFIG_ARCH_H720X is not set
105# CONFIG_ARCH_AAEC2000 is not set 105# CONFIG_ARCH_AAEC2000 is not set
106CONFIG_ARCH_AT91=y
106CONFIG_ARCH_AT91RM9200=y 107CONFIG_ARCH_AT91RM9200=y
107 108
108# 109#
diff --git a/arch/arm/configs/ateb9200_defconfig b/arch/arm/configs/ateb9200_defconfig
index 69c39e098743..bee7813d040e 100644
--- a/arch/arm/configs/ateb9200_defconfig
+++ b/arch/arm/configs/ateb9200_defconfig
@@ -105,6 +105,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
105# CONFIG_ARCH_IMX is not set 105# CONFIG_ARCH_IMX is not set
106# CONFIG_ARCH_H720X is not set 106# CONFIG_ARCH_H720X is not set
107# CONFIG_ARCH_AAEC2000 is not set 107# CONFIG_ARCH_AAEC2000 is not set
108CONFIG_ARCH_AT91=y
108CONFIG_ARCH_AT91RM9200=y 109CONFIG_ARCH_AT91RM9200=y
109 110
110# 111#
diff --git a/arch/arm/configs/carmeva_defconfig b/arch/arm/configs/carmeva_defconfig
index 5ccd29a7c1fb..8a075c8ecc63 100644
--- a/arch/arm/configs/carmeva_defconfig
+++ b/arch/arm/configs/carmeva_defconfig
@@ -82,6 +82,7 @@ CONFIG_OBSOLETE_MODPARM=y
82# CONFIG_ARCH_VERSATILE is not set 82# CONFIG_ARCH_VERSATILE is not set
83# CONFIG_ARCH_IMX is not set 83# CONFIG_ARCH_IMX is not set
84# CONFIG_ARCH_H720X is not set 84# CONFIG_ARCH_H720X is not set
85CONFIG_ARCH_AT91=y
85CONFIG_ARCH_AT91RM9200=y 86CONFIG_ARCH_AT91RM9200=y
86 87
87# 88#
diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig
index 94bd9932a402..3594155a8137 100644
--- a/arch/arm/configs/csb337_defconfig
+++ b/arch/arm/configs/csb337_defconfig
@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
103# CONFIG_ARCH_IMX is not set 103# CONFIG_ARCH_IMX is not set
104# CONFIG_ARCH_H720X is not set 104# CONFIG_ARCH_H720X is not set
105# CONFIG_ARCH_AAEC2000 is not set 105# CONFIG_ARCH_AAEC2000 is not set
106CONFIG_ARCH_AT91=y
106CONFIG_ARCH_AT91RM9200=y 107CONFIG_ARCH_AT91RM9200=y
107 108
108# 109#
diff --git a/arch/arm/configs/csb637_defconfig b/arch/arm/configs/csb637_defconfig
index 1519124c5501..640d70c1f066 100644
--- a/arch/arm/configs/csb637_defconfig
+++ b/arch/arm/configs/csb637_defconfig
@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
103# CONFIG_ARCH_IMX is not set 103# CONFIG_ARCH_IMX is not set
104# CONFIG_ARCH_H720X is not set 104# CONFIG_ARCH_H720X is not set
105# CONFIG_ARCH_AAEC2000 is not set 105# CONFIG_ARCH_AAEC2000 is not set
106CONFIG_ARCH_AT91=y
106CONFIG_ARCH_AT91RM9200=y 107CONFIG_ARCH_AT91RM9200=y
107 108
108# 109#
diff --git a/arch/arm/configs/kafa_defconfig b/arch/arm/configs/kafa_defconfig
index 51ded20e3f64..1db633e2c940 100644
--- a/arch/arm/configs/kafa_defconfig
+++ b/arch/arm/configs/kafa_defconfig
@@ -105,6 +105,7 @@ CONFIG_DEFAULT_IOSCHED="deadline"
105# CONFIG_ARCH_IMX is not set 105# CONFIG_ARCH_IMX is not set
106# CONFIG_ARCH_H720X is not set 106# CONFIG_ARCH_H720X is not set
107# CONFIG_ARCH_AAEC2000 is not set 107# CONFIG_ARCH_AAEC2000 is not set
108CONFIG_ARCH_AT91=y
108CONFIG_ARCH_AT91RM9200=y 109CONFIG_ARCH_AT91RM9200=y
109 110
110# 111#
diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig
index fee4f566452e..45396e087196 100644
--- a/arch/arm/configs/kb9202_defconfig
+++ b/arch/arm/configs/kb9202_defconfig
@@ -80,6 +80,7 @@ CONFIG_KMOD=y
80# CONFIG_ARCH_IMX is not set 80# CONFIG_ARCH_IMX is not set
81# CONFIG_ARCH_H720X is not set 81# CONFIG_ARCH_H720X is not set
82# CONFIG_ARCH_AAEC2000 is not set 82# CONFIG_ARCH_AAEC2000 is not set
83CONFIG_ARCH_AT91=y
83CONFIG_ARCH_AT91RM9200=y 84CONFIG_ARCH_AT91RM9200=y
84 85
85# 86#
diff --git a/arch/arm/configs/omap_h2_1610_defconfig b/arch/arm/configs/omap_h2_1610_defconfig
index ee3ecbd9002d..05adb0b34e72 100644
--- a/arch/arm/configs/omap_h2_1610_defconfig
+++ b/arch/arm/configs/omap_h2_1610_defconfig
@@ -1,19 +1,20 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14 3# Linux kernel version: 2.6.17
4# Wed Nov 9 18:53:40 2005 4# Thu Jun 29 15:25:18 2006
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_MMU=y 7CONFIG_MMU=y
8CONFIG_UID16=y
9CONFIG_RWSEM_GENERIC_SPINLOCK=y 8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y 10CONFIG_GENERIC_CALIBRATE_DELAY=y
11CONFIG_VECTORS_BASE=0xffff0000
12CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
11 13
12# 14#
13# Code maturity level options 15# Code maturity level options
14# 16#
15CONFIG_EXPERIMENTAL=y 17CONFIG_EXPERIMENTAL=y
16CONFIG_CLEAN_COMPILE=y
17CONFIG_BROKEN_ON_SMP=y 18CONFIG_BROKEN_ON_SMP=y
18CONFIG_LOCK_KERNEL=y 19CONFIG_LOCK_KERNEL=y
19CONFIG_INIT_ENV_ARG_LIMIT=32 20CONFIG_INIT_ENV_ARG_LIMIT=32
@@ -29,26 +30,26 @@ CONFIG_SYSVIPC=y
29# CONFIG_BSD_PROCESS_ACCT is not set 30# CONFIG_BSD_PROCESS_ACCT is not set
30CONFIG_SYSCTL=y 31CONFIG_SYSCTL=y
31# CONFIG_AUDIT is not set 32# CONFIG_AUDIT is not set
32# CONFIG_HOTPLUG is not set
33CONFIG_KOBJECT_UEVENT=y
34# CONFIG_IKCONFIG is not set 33# CONFIG_IKCONFIG is not set
34# CONFIG_RELAY is not set
35CONFIG_INITRAMFS_SOURCE="" 35CONFIG_INITRAMFS_SOURCE=""
36CONFIG_UID16=y
37CONFIG_CC_OPTIMIZE_FOR_SIZE=y
36# CONFIG_EMBEDDED is not set 38# CONFIG_EMBEDDED is not set
37CONFIG_KALLSYMS=y 39CONFIG_KALLSYMS=y
38# CONFIG_KALLSYMS_EXTRA_PASS is not set 40# CONFIG_KALLSYMS_EXTRA_PASS is not set
41CONFIG_HOTPLUG=y
39CONFIG_PRINTK=y 42CONFIG_PRINTK=y
40CONFIG_BUG=y 43CONFIG_BUG=y
44CONFIG_ELF_CORE=y
41CONFIG_BASE_FULL=y 45CONFIG_BASE_FULL=y
42CONFIG_FUTEX=y 46CONFIG_FUTEX=y
43CONFIG_EPOLL=y 47CONFIG_EPOLL=y
44CONFIG_CC_OPTIMIZE_FOR_SIZE=y
45CONFIG_SHMEM=y 48CONFIG_SHMEM=y
46CONFIG_CC_ALIGN_FUNCTIONS=0 49CONFIG_SLAB=y
47CONFIG_CC_ALIGN_LABELS=0
48CONFIG_CC_ALIGN_LOOPS=0
49CONFIG_CC_ALIGN_JUMPS=0
50# CONFIG_TINY_SHMEM is not set 50# CONFIG_TINY_SHMEM is not set
51CONFIG_BASE_SMALL=0 51CONFIG_BASE_SMALL=0
52# CONFIG_SLOB is not set
52 53
53# 54#
54# Loadable module support 55# Loadable module support
@@ -56,7 +57,6 @@ CONFIG_BASE_SMALL=0
56CONFIG_MODULES=y 57CONFIG_MODULES=y
57CONFIG_MODULE_UNLOAD=y 58CONFIG_MODULE_UNLOAD=y
58# CONFIG_MODULE_FORCE_UNLOAD is not set 59# CONFIG_MODULE_FORCE_UNLOAD is not set
59CONFIG_OBSOLETE_MODPARM=y
60# CONFIG_MODVERSIONS is not set 60# CONFIG_MODVERSIONS is not set
61# CONFIG_MODULE_SRCVERSION_ALL is not set 61# CONFIG_MODULE_SRCVERSION_ALL is not set
62# CONFIG_KMOD is not set 62# CONFIG_KMOD is not set
@@ -64,6 +64,7 @@ CONFIG_OBSOLETE_MODPARM=y
64# 64#
65# Block layer 65# Block layer
66# 66#
67# CONFIG_BLK_DEV_IO_TRACE is not set
67 68
68# 69#
69# IO Schedulers 70# IO Schedulers
@@ -81,16 +82,26 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
81# 82#
82# System Type 83# System Type
83# 84#
85# CONFIG_ARCH_AAEC2000 is not set
86# CONFIG_ARCH_INTEGRATOR is not set
87# CONFIG_ARCH_REALVIEW is not set
88# CONFIG_ARCH_VERSATILE is not set
89# CONFIG_ARCH_AT91RM9200 is not set
84# CONFIG_ARCH_CLPS7500 is not set 90# CONFIG_ARCH_CLPS7500 is not set
85# CONFIG_ARCH_CLPS711X is not set 91# CONFIG_ARCH_CLPS711X is not set
86# CONFIG_ARCH_CO285 is not set 92# CONFIG_ARCH_CO285 is not set
87# CONFIG_ARCH_EBSA110 is not set 93# CONFIG_ARCH_EBSA110 is not set
94# CONFIG_ARCH_EP93XX is not set
88# CONFIG_ARCH_FOOTBRIDGE is not set 95# CONFIG_ARCH_FOOTBRIDGE is not set
89# CONFIG_ARCH_INTEGRATOR is not set 96# CONFIG_ARCH_NETX is not set
97# CONFIG_ARCH_H720X is not set
98# CONFIG_ARCH_IMX is not set
90# CONFIG_ARCH_IOP3XX is not set 99# CONFIG_ARCH_IOP3XX is not set
91# CONFIG_ARCH_IXP4XX is not set 100# CONFIG_ARCH_IXP4XX is not set
92# CONFIG_ARCH_IXP2000 is not set 101# CONFIG_ARCH_IXP2000 is not set
102# CONFIG_ARCH_IXP23XX is not set
93# CONFIG_ARCH_L7200 is not set 103# CONFIG_ARCH_L7200 is not set
104# CONFIG_ARCH_PNX4008 is not set
94# CONFIG_ARCH_PXA is not set 105# CONFIG_ARCH_PXA is not set
95# CONFIG_ARCH_RPC is not set 106# CONFIG_ARCH_RPC is not set
96# CONFIG_ARCH_SA1100 is not set 107# CONFIG_ARCH_SA1100 is not set
@@ -98,11 +109,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
98# CONFIG_ARCH_SHARK is not set 109# CONFIG_ARCH_SHARK is not set
99# CONFIG_ARCH_LH7A40X is not set 110# CONFIG_ARCH_LH7A40X is not set
100CONFIG_ARCH_OMAP=y 111CONFIG_ARCH_OMAP=y
101# CONFIG_ARCH_VERSATILE is not set
102# CONFIG_ARCH_REALVIEW is not set
103# CONFIG_ARCH_IMX is not set
104# CONFIG_ARCH_H720X is not set
105# CONFIG_ARCH_AAEC2000 is not set
106 112
107# 113#
108# TI OMAP Implementations 114# TI OMAP Implementations
@@ -141,6 +147,7 @@ CONFIG_ARCH_OMAP16XX=y
141CONFIG_MACH_OMAP_H2=y 147CONFIG_MACH_OMAP_H2=y
142# CONFIG_MACH_OMAP_H3 is not set 148# CONFIG_MACH_OMAP_H3 is not set
143# CONFIG_MACH_OMAP_OSK is not set 149# CONFIG_MACH_OMAP_OSK is not set
150# CONFIG_MACH_NOKIA770 is not set
144# CONFIG_MACH_OMAP_GENERIC is not set 151# CONFIG_MACH_OMAP_GENERIC is not set
145 152
146# 153#
@@ -177,7 +184,6 @@ CONFIG_ARM_THUMB=y
177# 184#
178# Bus support 185# Bus support
179# 186#
180CONFIG_ISA_DMA_API=y
181 187
182# 188#
183# PCCARD (PCMCIA/CardBus) support 189# PCCARD (PCMCIA/CardBus) support
@@ -189,6 +195,8 @@ CONFIG_ISA_DMA_API=y
189# 195#
190CONFIG_PREEMPT=y 196CONFIG_PREEMPT=y
191CONFIG_NO_IDLE_HZ=y 197CONFIG_NO_IDLE_HZ=y
198CONFIG_HZ=128
199# CONFIG_AEABI is not set
192# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 200# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
193CONFIG_SELECT_MEMORY_MODEL=y 201CONFIG_SELECT_MEMORY_MODEL=y
194CONFIG_FLATMEM_MANUAL=y 202CONFIG_FLATMEM_MANUAL=y
@@ -249,6 +257,8 @@ CONFIG_BINFMT_AOUT=y
249# Power management options 257# Power management options
250# 258#
251CONFIG_PM=y 259CONFIG_PM=y
260CONFIG_PM_LEGACY=y
261# CONFIG_PM_DEBUG is not set
252# CONFIG_APM is not set 262# CONFIG_APM is not set
253 263
254# 264#
@@ -259,9 +269,12 @@ CONFIG_NET=y
259# 269#
260# Networking options 270# Networking options
261# 271#
272# CONFIG_NETDEBUG is not set
262CONFIG_PACKET=y 273CONFIG_PACKET=y
263# CONFIG_PACKET_MMAP is not set 274# CONFIG_PACKET_MMAP is not set
264CONFIG_UNIX=y 275CONFIG_UNIX=y
276CONFIG_XFRM=y
277# CONFIG_XFRM_USER is not set
265# CONFIG_NET_KEY is not set 278# CONFIG_NET_KEY is not set
266CONFIG_INET=y 279CONFIG_INET=y
267# CONFIG_IP_MULTICAST is not set 280# CONFIG_IP_MULTICAST is not set
@@ -278,12 +291,18 @@ CONFIG_IP_PNP_BOOTP=y
278# CONFIG_INET_AH is not set 291# CONFIG_INET_AH is not set
279# CONFIG_INET_ESP is not set 292# CONFIG_INET_ESP is not set
280# CONFIG_INET_IPCOMP is not set 293# CONFIG_INET_IPCOMP is not set
294# CONFIG_INET_XFRM_TUNNEL is not set
281# CONFIG_INET_TUNNEL is not set 295# CONFIG_INET_TUNNEL is not set
296CONFIG_INET_XFRM_MODE_TRANSPORT=y
297CONFIG_INET_XFRM_MODE_TUNNEL=y
282CONFIG_INET_DIAG=y 298CONFIG_INET_DIAG=y
283CONFIG_INET_TCP_DIAG=y 299CONFIG_INET_TCP_DIAG=y
284# CONFIG_TCP_CONG_ADVANCED is not set 300# CONFIG_TCP_CONG_ADVANCED is not set
285CONFIG_TCP_CONG_BIC=y 301CONFIG_TCP_CONG_BIC=y
286# CONFIG_IPV6 is not set 302# CONFIG_IPV6 is not set
303# CONFIG_INET6_XFRM_TUNNEL is not set
304# CONFIG_INET6_TUNNEL is not set
305# CONFIG_NETWORK_SECMARK is not set
287# CONFIG_NETFILTER is not set 306# CONFIG_NETFILTER is not set
288 307
289# 308#
@@ -295,6 +314,11 @@ CONFIG_TCP_CONG_BIC=y
295# SCTP Configuration (EXPERIMENTAL) 314# SCTP Configuration (EXPERIMENTAL)
296# 315#
297# CONFIG_IP_SCTP is not set 316# CONFIG_IP_SCTP is not set
317
318#
319# TIPC Configuration (EXPERIMENTAL)
320#
321# CONFIG_TIPC is not set
298# CONFIG_ATM is not set 322# CONFIG_ATM is not set
299# CONFIG_BRIDGE is not set 323# CONFIG_BRIDGE is not set
300# CONFIG_VLAN_8021Q is not set 324# CONFIG_VLAN_8021Q is not set
@@ -312,7 +336,6 @@ CONFIG_TCP_CONG_BIC=y
312# QoS and/or fair queueing 336# QoS and/or fair queueing
313# 337#
314# CONFIG_NET_SCHED is not set 338# CONFIG_NET_SCHED is not set
315# CONFIG_NET_CLS_ROUTE is not set
316 339
317# 340#
318# Network testing 341# Network testing
@@ -333,6 +356,12 @@ CONFIG_TCP_CONG_BIC=y
333CONFIG_STANDALONE=y 356CONFIG_STANDALONE=y
334CONFIG_PREVENT_FIRMWARE_BUILD=y 357CONFIG_PREVENT_FIRMWARE_BUILD=y
335# CONFIG_FW_LOADER is not set 358# CONFIG_FW_LOADER is not set
359# CONFIG_SYS_HYPERVISOR is not set
360
361#
362# Connector - unified userspace <-> kernelspace linker
363#
364# CONFIG_CONNECTOR is not set
336 365
337# 366#
338# Memory Technology Devices (MTD) 367# Memory Technology Devices (MTD)
@@ -526,6 +555,7 @@ CONFIG_SERIO_SERPORT=y
526CONFIG_VT=y 555CONFIG_VT=y
527CONFIG_VT_CONSOLE=y 556CONFIG_VT_CONSOLE=y
528CONFIG_HW_CONSOLE=y 557CONFIG_HW_CONSOLE=y
558# CONFIG_VT_HW_CONSOLE_BINDING is not set
529# CONFIG_SERIAL_NONSTANDARD is not set 559# CONFIG_SERIAL_NONSTANDARD is not set
530 560
531# 561#
@@ -534,6 +564,7 @@ CONFIG_HW_CONSOLE=y
534CONFIG_SERIAL_8250=y 564CONFIG_SERIAL_8250=y
535CONFIG_SERIAL_8250_CONSOLE=y 565CONFIG_SERIAL_8250_CONSOLE=y
536CONFIG_SERIAL_8250_NR_UARTS=4 566CONFIG_SERIAL_8250_NR_UARTS=4
567CONFIG_SERIAL_8250_RUNTIME_UARTS=4
537# CONFIG_SERIAL_8250_EXTENDED is not set 568# CONFIG_SERIAL_8250_EXTENDED is not set
538 569
539# 570#
@@ -559,8 +590,8 @@ CONFIG_WATCHDOG_NOWAYOUT=y
559# Watchdog Device Drivers 590# Watchdog Device Drivers
560# 591#
561# CONFIG_SOFT_WATCHDOG is not set 592# CONFIG_SOFT_WATCHDOG is not set
593# CONFIG_HW_RANDOM is not set
562# CONFIG_NVRAM is not set 594# CONFIG_NVRAM is not set
563# CONFIG_RTC is not set
564# CONFIG_DTLK is not set 595# CONFIG_DTLK is not set
565# CONFIG_R3964 is not set 596# CONFIG_R3964 is not set
566 597
@@ -572,6 +603,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y
572# 603#
573# TPM devices 604# TPM devices
574# 605#
606# CONFIG_TCG_TPM is not set
575# CONFIG_TELCLOCK is not set 607# CONFIG_TELCLOCK is not set
576 608
577# 609#
@@ -580,10 +612,22 @@ CONFIG_WATCHDOG_NOWAYOUT=y
580# CONFIG_I2C is not set 612# CONFIG_I2C is not set
581 613
582# 614#
615# SPI support
616#
617# CONFIG_SPI is not set
618# CONFIG_SPI_MASTER is not set
619
620#
621# Dallas's 1-wire bus
622#
623
624#
583# Hardware Monitoring support 625# Hardware Monitoring support
584# 626#
585CONFIG_HWMON=y 627CONFIG_HWMON=y
586# CONFIG_HWMON_VID is not set 628# CONFIG_HWMON_VID is not set
629# CONFIG_SENSORS_ABITUGURU is not set
630# CONFIG_SENSORS_F71805F is not set
587# CONFIG_HWMON_DEBUG_CHIP is not set 631# CONFIG_HWMON_DEBUG_CHIP is not set
588 632
589# 633#
@@ -591,13 +635,23 @@ CONFIG_HWMON=y
591# 635#
592 636
593# 637#
594# Multimedia Capabilities Port drivers 638# LED devices
639#
640# CONFIG_NEW_LEDS is not set
641
642#
643# LED drivers
644#
645
646#
647# LED Triggers
595# 648#
596 649
597# 650#
598# Multimedia devices 651# Multimedia devices
599# 652#
600# CONFIG_VIDEO_DEV is not set 653# CONFIG_VIDEO_DEV is not set
654CONFIG_VIDEO_V4L2=y
601 655
602# 656#
603# Digital Video Broadcasting Devices 657# Digital Video Broadcasting Devices
@@ -607,11 +661,13 @@ CONFIG_HWMON=y
607# 661#
608# Graphics support 662# Graphics support
609# 663#
664CONFIG_FIRMWARE_EDID=y
610CONFIG_FB=y 665CONFIG_FB=y
611# CONFIG_FB_CFB_FILLRECT is not set 666# CONFIG_FB_CFB_FILLRECT is not set
612# CONFIG_FB_CFB_COPYAREA is not set 667# CONFIG_FB_CFB_COPYAREA is not set
613# CONFIG_FB_CFB_IMAGEBLIT is not set 668# CONFIG_FB_CFB_IMAGEBLIT is not set
614# CONFIG_FB_MACMODES is not set 669# CONFIG_FB_MACMODES is not set
670# CONFIG_FB_BACKLIGHT is not set
615CONFIG_FB_MODE_HELPERS=y 671CONFIG_FB_MODE_HELPERS=y
616# CONFIG_FB_TILEBLITTING is not set 672# CONFIG_FB_TILEBLITTING is not set
617# CONFIG_FB_S1D13XXX is not set 673# CONFIG_FB_S1D13XXX is not set
@@ -635,7 +691,6 @@ CONFIG_FONT_8x16=y
635# CONFIG_FONT_SUN8x16 is not set 691# CONFIG_FONT_SUN8x16 is not set
636# CONFIG_FONT_SUN12x22 is not set 692# CONFIG_FONT_SUN12x22 is not set
637# CONFIG_FONT_10x18 is not set 693# CONFIG_FONT_10x18 is not set
638# CONFIG_FONT_RL is not set
639 694
640# 695#
641# Logo configuration 696# Logo configuration
@@ -660,16 +715,15 @@ CONFIG_SOUND=y
660# Open Sound System 715# Open Sound System
661# 716#
662CONFIG_SOUND_PRIME=y 717CONFIG_SOUND_PRIME=y
663# CONFIG_OBSOLETE_OSS_DRIVER is not set
664# CONFIG_SOUND_MSNDCLAS is not set 718# CONFIG_SOUND_MSNDCLAS is not set
665# CONFIG_SOUND_MSNDPIN is not set 719# CONFIG_SOUND_MSNDPIN is not set
666# CONFIG_SOUND_OSS is not set
667 720
668# 721#
669# USB support 722# USB support
670# 723#
671CONFIG_USB_ARCH_HAS_HCD=y 724CONFIG_USB_ARCH_HAS_HCD=y
672CONFIG_USB_ARCH_HAS_OHCI=y 725CONFIG_USB_ARCH_HAS_OHCI=y
726# CONFIG_USB_ARCH_HAS_EHCI is not set
673# CONFIG_USB is not set 727# CONFIG_USB is not set
674 728
675# 729#
@@ -680,17 +734,6 @@ CONFIG_USB_ARCH_HAS_OHCI=y
680# USB Gadget Support 734# USB Gadget Support
681# 735#
682# CONFIG_USB_GADGET is not set 736# CONFIG_USB_GADGET is not set
683# CONFIG_USB_GADGET_NET2280 is not set
684# CONFIG_USB_GADGET_PXA2XX is not set
685# CONFIG_USB_GADGET_GOKU is not set
686# CONFIG_USB_GADGET_LH7A40X is not set
687# CONFIG_USB_GADGET_OMAP is not set
688# CONFIG_USB_GADGET_DUMMY_HCD is not set
689# CONFIG_USB_ZERO is not set
690# CONFIG_USB_ETH is not set
691# CONFIG_USB_GADGETFS is not set
692# CONFIG_USB_FILE_STORAGE is not set
693# CONFIG_USB_G_SERIAL is not set
694 737
695# 738#
696# MMC/SD Card support 739# MMC/SD Card support
@@ -698,20 +741,27 @@ CONFIG_USB_ARCH_HAS_OHCI=y
698# CONFIG_MMC is not set 741# CONFIG_MMC is not set
699 742
700# 743#
744# Real Time Clock
745#
746CONFIG_RTC_LIB=y
747# CONFIG_RTC_CLASS is not set
748
749#
701# File systems 750# File systems
702# 751#
703CONFIG_EXT2_FS=y 752CONFIG_EXT2_FS=y
704# CONFIG_EXT2_FS_XATTR is not set 753# CONFIG_EXT2_FS_XATTR is not set
705# CONFIG_EXT2_FS_XIP is not set 754# CONFIG_EXT2_FS_XIP is not set
706# CONFIG_EXT3_FS is not set 755# CONFIG_EXT3_FS is not set
707# CONFIG_JBD is not set
708# CONFIG_REISERFS_FS is not set 756# CONFIG_REISERFS_FS is not set
709# CONFIG_JFS_FS is not set 757# CONFIG_JFS_FS is not set
710# CONFIG_FS_POSIX_ACL is not set 758# CONFIG_FS_POSIX_ACL is not set
711# CONFIG_XFS_FS is not set 759# CONFIG_XFS_FS is not set
760# CONFIG_OCFS2_FS is not set
712# CONFIG_MINIX_FS is not set 761# CONFIG_MINIX_FS is not set
713CONFIG_ROMFS_FS=y 762CONFIG_ROMFS_FS=y
714CONFIG_INOTIFY=y 763CONFIG_INOTIFY=y
764CONFIG_INOTIFY_USER=y
715# CONFIG_QUOTA is not set 765# CONFIG_QUOTA is not set
716CONFIG_DNOTIFY=y 766CONFIG_DNOTIFY=y
717# CONFIG_AUTOFS_FS is not set 767# CONFIG_AUTOFS_FS is not set
@@ -741,7 +791,7 @@ CONFIG_SYSFS=y
741# CONFIG_TMPFS is not set 791# CONFIG_TMPFS is not set
742# CONFIG_HUGETLB_PAGE is not set 792# CONFIG_HUGETLB_PAGE is not set
743CONFIG_RAMFS=y 793CONFIG_RAMFS=y
744# CONFIG_RELAYFS_FS is not set 794# CONFIG_CONFIGFS_FS is not set
745 795
746# 796#
747# Miscellaneous filesystems 797# Miscellaneous filesystems
@@ -843,10 +893,13 @@ CONFIG_NLS_DEFAULT="iso8859-1"
843# Kernel hacking 893# Kernel hacking
844# 894#
845# CONFIG_PRINTK_TIME is not set 895# CONFIG_PRINTK_TIME is not set
896# CONFIG_MAGIC_SYSRQ is not set
846# CONFIG_DEBUG_KERNEL is not set 897# CONFIG_DEBUG_KERNEL is not set
847CONFIG_LOG_BUF_SHIFT=14 898CONFIG_LOG_BUF_SHIFT=14
848CONFIG_DEBUG_BUGVERBOSE=y 899CONFIG_DEBUG_BUGVERBOSE=y
900# CONFIG_DEBUG_FS is not set
849CONFIG_FRAME_POINTER=y 901CONFIG_FRAME_POINTER=y
902# CONFIG_UNWIND_INFO is not set
850# CONFIG_DEBUG_USER is not set 903# CONFIG_DEBUG_USER is not set
851 904
852# 905#
diff --git a/arch/arm/configs/onearm_defconfig b/arch/arm/configs/onearm_defconfig
index 5401c01caefe..2b4a63be03f7 100644
--- a/arch/arm/configs/onearm_defconfig
+++ b/arch/arm/configs/onearm_defconfig
@@ -85,6 +85,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
85# CONFIG_ARCH_INTEGRATOR is not set 85# CONFIG_ARCH_INTEGRATOR is not set
86# CONFIG_ARCH_REALVIEW is not set 86# CONFIG_ARCH_REALVIEW is not set
87# CONFIG_ARCH_VERSATILE is not set 87# CONFIG_ARCH_VERSATILE is not set
88CONFIG_ARCH_AT91=y
88CONFIG_ARCH_AT91RM9200=y 89CONFIG_ARCH_AT91RM9200=y
89# CONFIG_ARCH_CLPS7500 is not set 90# CONFIG_ARCH_CLPS7500 is not set
90# CONFIG_ARCH_CLPS711X is not set 91# CONFIG_ARCH_CLPS711X is not set
diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig
new file mode 100644
index 000000000000..a6698dc4f6b9
--- /dev/null
+++ b/arch/arm/configs/trizeps4_defconfig
@@ -0,0 +1,1579 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.17
4# Sat Jun 24 22:45:14 2006
5#
6CONFIG_ARM=y
7CONFIG_MMU=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y
11CONFIG_ARCH_MTD_XIP=y
12CONFIG_VECTORS_BASE=0xffff0000
13
14#
15# Code maturity level options
16#
17CONFIG_EXPERIMENTAL=y
18CONFIG_BROKEN_ON_SMP=y
19CONFIG_LOCK_KERNEL=y
20CONFIG_INIT_ENV_ARG_LIMIT=32
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y
27CONFIG_SWAP=y
28CONFIG_SYSVIPC=y
29CONFIG_POSIX_MQUEUE=y
30CONFIG_BSD_PROCESS_ACCT=y
31CONFIG_BSD_PROCESS_ACCT_V3=y
32CONFIG_SYSCTL=y
33CONFIG_AUDIT=y
34CONFIG_IKCONFIG=y
35CONFIG_IKCONFIG_PROC=y
36# CONFIG_RELAY is not set
37CONFIG_INITRAMFS_SOURCE=""
38CONFIG_UID16=y
39CONFIG_CC_OPTIMIZE_FOR_SIZE=y
40CONFIG_EMBEDDED=y
41CONFIG_KALLSYMS=y
42CONFIG_KALLSYMS_EXTRA_PASS=y
43CONFIG_HOTPLUG=y
44CONFIG_PRINTK=y
45CONFIG_BUG=y
46CONFIG_ELF_CORE=y
47CONFIG_BASE_FULL=y
48CONFIG_FUTEX=y
49CONFIG_EPOLL=y
50CONFIG_SHMEM=y
51CONFIG_SLAB=y
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54# CONFIG_SLOB is not set
55CONFIG_OBSOLETE_INTERMODULE=y
56
57#
58# Loadable module support
59#
60CONFIG_MODULES=y
61CONFIG_MODULE_UNLOAD=y
62CONFIG_MODULE_FORCE_UNLOAD=y
63# CONFIG_MODVERSIONS is not set
64CONFIG_MODULE_SRCVERSION_ALL=y
65CONFIG_KMOD=y
66
67#
68# Block layer
69#
70# CONFIG_BLK_DEV_IO_TRACE is not set
71
72#
73# IO Schedulers
74#
75CONFIG_IOSCHED_NOOP=y
76CONFIG_IOSCHED_AS=y
77CONFIG_IOSCHED_DEADLINE=y
78CONFIG_IOSCHED_CFQ=y
79CONFIG_DEFAULT_AS=y
80# CONFIG_DEFAULT_DEADLINE is not set
81# CONFIG_DEFAULT_CFQ is not set
82# CONFIG_DEFAULT_NOOP is not set
83CONFIG_DEFAULT_IOSCHED="anticipatory"
84
85#
86# System Type
87#
88# CONFIG_ARCH_CLPS7500 is not set
89# CONFIG_ARCH_CLPS711X is not set
90# CONFIG_ARCH_CO285 is not set
91# CONFIG_ARCH_EBSA110 is not set
92# CONFIG_ARCH_EP93XX is not set
93# CONFIG_ARCH_FOOTBRIDGE is not set
94# CONFIG_ARCH_INTEGRATOR is not set
95# CONFIG_ARCH_IOP3XX is not set
96# CONFIG_ARCH_IXP4XX is not set
97# CONFIG_ARCH_IXP2000 is not set
98# CONFIG_ARCH_IXP23XX is not set
99# CONFIG_ARCH_L7200 is not set
100CONFIG_ARCH_PXA=y
101# CONFIG_ARCH_RPC is not set
102# CONFIG_ARCH_SA1100 is not set
103# CONFIG_ARCH_S3C2410 is not set
104# CONFIG_ARCH_SHARK is not set
105# CONFIG_ARCH_LH7A40X is not set
106# CONFIG_ARCH_OMAP is not set
107# CONFIG_ARCH_VERSATILE is not set
108# CONFIG_ARCH_REALVIEW is not set
109# CONFIG_ARCH_IMX is not set
110# CONFIG_ARCH_H720X is not set
111# CONFIG_ARCH_AAEC2000 is not set
112# CONFIG_ARCH_AT91RM9200 is not set
113
114#
115# Intel PXA2xx Implementations
116#
117# CONFIG_ARCH_LUBBOCK is not set
118# CONFIG_MACH_LOGICPD_PXA270 is not set
119# CONFIG_MACH_MAINSTONE is not set
120# CONFIG_ARCH_PXA_IDP is not set
121# CONFIG_PXA_SHARPSL is not set
122CONFIG_MACH_TRIZEPS4=y
123CONFIG_MACH_TRIZEPS4_CONXS=y
124# CONFIG_MACH_TRIZEPS4_ANY is not set
125CONFIG_PXA27x=y
126
127#
128# Processor Type
129#
130CONFIG_CPU_32=y
131CONFIG_CPU_XSCALE=y
132CONFIG_CPU_32v5=y
133CONFIG_CPU_ABRT_EV5T=y
134CONFIG_CPU_CACHE_VIVT=y
135CONFIG_CPU_TLB_V4WBI=y
136
137#
138# Processor Features
139#
140CONFIG_ARM_THUMB=y
141CONFIG_XSCALE_PMU=y
142
143#
144# Bus support
145#
146
147#
148# PCCARD (PCMCIA/CardBus) support
149#
150CONFIG_PCCARD=m
151# CONFIG_PCMCIA_DEBUG is not set
152CONFIG_PCMCIA=m
153CONFIG_PCMCIA_LOAD_CIS=y
154CONFIG_PCMCIA_IOCTL=y
155
156#
157# PC-card bridges
158#
159CONFIG_PCMCIA_PXA2XX=m
160
161#
162# Kernel Features
163#
164CONFIG_PREEMPT=y
165# CONFIG_NO_IDLE_HZ is not set
166CONFIG_HZ=100
167# CONFIG_AEABI is not set
168# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
169CONFIG_SELECT_MEMORY_MODEL=y
170CONFIG_FLATMEM_MANUAL=y
171# CONFIG_DISCONTIGMEM_MANUAL is not set
172# CONFIG_SPARSEMEM_MANUAL is not set
173CONFIG_FLATMEM=y
174CONFIG_FLAT_NODE_MEM_MAP=y
175# CONFIG_SPARSEMEM_STATIC is not set
176CONFIG_SPLIT_PTLOCK_CPUS=4096
177CONFIG_LEDS=y
178CONFIG_LEDS_TIMER=y
179CONFIG_LEDS_CPU=y
180CONFIG_ALIGNMENT_TRAP=y
181
182#
183# Boot options
184#
185CONFIG_ZBOOT_ROM_TEXT=0
186CONFIG_ZBOOT_ROM_BSS=0
187CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200n8"
188# CONFIG_XIP_KERNEL is not set
189
190#
191# Floating point emulation
192#
193
194#
195# At least one emulation must be selected
196#
197CONFIG_FPE_NWFPE=y
198CONFIG_FPE_NWFPE_XP=y
199# CONFIG_FPE_FASTFPE is not set
200
201#
202# Userspace binary formats
203#
204CONFIG_BINFMT_ELF=y
205# CONFIG_BINFMT_AOUT is not set
206CONFIG_BINFMT_MISC=m
207# CONFIG_ARTHUR is not set
208
209#
210# Power management options
211#
212CONFIG_PM=y
213CONFIG_PM_LEGACY=y
214# CONFIG_PM_DEBUG is not set
215CONFIG_APM=y
216
217#
218# Networking
219#
220CONFIG_NET=y
221
222#
223# Networking options
224#
225# CONFIG_NETDEBUG is not set
226CONFIG_PACKET=y
227CONFIG_PACKET_MMAP=y
228CONFIG_UNIX=y
229CONFIG_XFRM=y
230CONFIG_XFRM_USER=m
231CONFIG_NET_KEY=y
232CONFIG_INET=y
233# CONFIG_IP_MULTICAST is not set
234# CONFIG_IP_ADVANCED_ROUTER is not set
235CONFIG_IP_FIB_HASH=y
236CONFIG_IP_PNP=y
237CONFIG_IP_PNP_DHCP=y
238CONFIG_IP_PNP_BOOTP=y
239# CONFIG_IP_PNP_RARP is not set
240# CONFIG_NET_IPIP is not set
241# CONFIG_NET_IPGRE is not set
242# CONFIG_ARPD is not set
243# CONFIG_SYN_COOKIES is not set
244# CONFIG_INET_AH is not set
245# CONFIG_INET_ESP is not set
246# CONFIG_INET_IPCOMP is not set
247# CONFIG_INET_XFRM_TUNNEL is not set
248# CONFIG_INET_TUNNEL is not set
249CONFIG_INET_DIAG=y
250CONFIG_INET_TCP_DIAG=y
251# CONFIG_TCP_CONG_ADVANCED is not set
252CONFIG_TCP_CONG_BIC=y
253
254#
255# IP: Virtual Server Configuration
256#
257# CONFIG_IP_VS is not set
258CONFIG_IPV6=m
259# CONFIG_IPV6_PRIVACY is not set
260# CONFIG_IPV6_ROUTER_PREF is not set
261# CONFIG_INET6_AH is not set
262# CONFIG_INET6_ESP is not set
263# CONFIG_INET6_IPCOMP is not set
264# CONFIG_INET6_XFRM_TUNNEL is not set
265# CONFIG_INET6_TUNNEL is not set
266# CONFIG_IPV6_TUNNEL is not set
267CONFIG_NETFILTER=y
268# CONFIG_NETFILTER_DEBUG is not set
269
270#
271# Core Netfilter Configuration
272#
273# CONFIG_NETFILTER_NETLINK is not set
274# CONFIG_NETFILTER_XTABLES is not set
275
276#
277# IP: Netfilter Configuration
278#
279CONFIG_IP_NF_CONNTRACK=m
280CONFIG_IP_NF_CT_ACCT=y
281CONFIG_IP_NF_CONNTRACK_MARK=y
282# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
283# CONFIG_IP_NF_CT_PROTO_SCTP is not set
284CONFIG_IP_NF_FTP=m
285CONFIG_IP_NF_IRC=m
286# CONFIG_IP_NF_NETBIOS_NS is not set
287CONFIG_IP_NF_TFTP=m
288CONFIG_IP_NF_AMANDA=m
289# CONFIG_IP_NF_PPTP is not set
290# CONFIG_IP_NF_H323 is not set
291CONFIG_IP_NF_QUEUE=m
292
293#
294# IPv6: Netfilter Configuration (EXPERIMENTAL)
295#
296# CONFIG_IP6_NF_QUEUE is not set
297
298#
299# DCCP Configuration (EXPERIMENTAL)
300#
301# CONFIG_IP_DCCP is not set
302
303#
304# SCTP Configuration (EXPERIMENTAL)
305#
306# CONFIG_IP_SCTP is not set
307
308#
309# TIPC Configuration (EXPERIMENTAL)
310#
311# CONFIG_TIPC is not set
312# CONFIG_ATM is not set
313# CONFIG_BRIDGE is not set
314CONFIG_VLAN_8021Q=m
315# CONFIG_DECNET is not set
316# CONFIG_LLC2 is not set
317# CONFIG_IPX is not set
318# CONFIG_ATALK is not set
319# CONFIG_X25 is not set
320# CONFIG_LAPB is not set
321# CONFIG_NET_DIVERT is not set
322# CONFIG_ECONET is not set
323# CONFIG_WAN_ROUTER is not set
324
325#
326# QoS and/or fair queueing
327#
328# CONFIG_NET_SCHED is not set
329
330#
331# Network testing
332#
333# CONFIG_NET_PKTGEN is not set
334# CONFIG_HAMRADIO is not set
335CONFIG_IRDA=m
336
337#
338# IrDA protocols
339#
340CONFIG_IRLAN=m
341CONFIG_IRNET=m
342CONFIG_IRCOMM=m
343CONFIG_IRDA_ULTRA=y
344
345#
346# IrDA options
347#
348CONFIG_IRDA_CACHE_LAST_LSAP=y
349CONFIG_IRDA_FAST_RR=y
350# CONFIG_IRDA_DEBUG is not set
351
352#
353# Infrared-port device drivers
354#
355
356#
357# SIR device drivers
358#
359CONFIG_IRTTY_SIR=m
360
361#
362# Dongle support
363#
364# CONFIG_DONGLE is not set
365
366#
367# Old SIR device drivers
368#
369# CONFIG_IRPORT_SIR is not set
370
371#
372# Old Serial dongle support
373#
374
375#
376# FIR device drivers
377#
378# CONFIG_USB_IRDA is not set
379# CONFIG_SIGMATEL_FIR is not set
380# CONFIG_PXA_FICP is not set
381CONFIG_BT=m
382CONFIG_BT_L2CAP=m
383CONFIG_BT_SCO=m
384CONFIG_BT_RFCOMM=m
385CONFIG_BT_RFCOMM_TTY=y
386CONFIG_BT_BNEP=m
387CONFIG_BT_BNEP_MC_FILTER=y
388CONFIG_BT_BNEP_PROTO_FILTER=y
389CONFIG_BT_HIDP=m
390
391#
392# Bluetooth device drivers
393#
394# CONFIG_BT_HCIUSB is not set
395# CONFIG_BT_HCIUART is not set
396# CONFIG_BT_HCIBCM203X is not set
397# CONFIG_BT_HCIBPA10X is not set
398# CONFIG_BT_HCIBFUSB is not set
399# CONFIG_BT_HCIDTL1 is not set
400# CONFIG_BT_HCIBT3C is not set
401# CONFIG_BT_HCIBLUECARD is not set
402# CONFIG_BT_HCIBTUART is not set
403# CONFIG_BT_HCIVHCI is not set
404CONFIG_IEEE80211=m
405# CONFIG_IEEE80211_DEBUG is not set
406CONFIG_IEEE80211_CRYPT_WEP=m
407CONFIG_IEEE80211_CRYPT_CCMP=m
408CONFIG_IEEE80211_CRYPT_TKIP=m
409CONFIG_IEEE80211_SOFTMAC=m
410# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
411CONFIG_WIRELESS_EXT=y
412
413#
414# Device Drivers
415#
416
417#
418# Generic Driver Options
419#
420CONFIG_STANDALONE=y
421CONFIG_PREVENT_FIRMWARE_BUILD=y
422CONFIG_FW_LOADER=y
423
424#
425# Connector - unified userspace <-> kernelspace linker
426#
427CONFIG_CONNECTOR=y
428CONFIG_PROC_EVENTS=y
429
430#
431# Memory Technology Devices (MTD)
432#
433CONFIG_MTD=y
434# CONFIG_MTD_DEBUG is not set
435CONFIG_MTD_CONCAT=y
436CONFIG_MTD_PARTITIONS=y
437CONFIG_MTD_REDBOOT_PARTS=y
438CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
439CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
440CONFIG_MTD_REDBOOT_PARTS_READONLY=y
441# CONFIG_MTD_CMDLINE_PARTS is not set
442# CONFIG_MTD_AFS_PARTS is not set
443
444#
445# User Modules And Translation Layers
446#
447CONFIG_MTD_CHAR=y
448CONFIG_MTD_BLOCK=y
449# CONFIG_FTL is not set
450CONFIG_NFTL=y
451CONFIG_NFTL_RW=y
452CONFIG_INFTL=y
453# CONFIG_RFD_FTL is not set
454
455#
456# RAM/ROM/Flash chip drivers
457#
458CONFIG_MTD_CFI=y
459CONFIG_MTD_JEDECPROBE=y
460CONFIG_MTD_GEN_PROBE=y
461CONFIG_MTD_CFI_ADV_OPTIONS=y
462# CONFIG_MTD_CFI_NOSWAP is not set
463# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
464CONFIG_MTD_CFI_LE_BYTE_SWAP=y
465CONFIG_MTD_CFI_GEOMETRY=y
466CONFIG_MTD_MAP_BANK_WIDTH_1=y
467CONFIG_MTD_MAP_BANK_WIDTH_2=y
468CONFIG_MTD_MAP_BANK_WIDTH_4=y
469# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
470# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
471# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
472CONFIG_MTD_CFI_I1=y
473CONFIG_MTD_CFI_I2=y
474# CONFIG_MTD_CFI_I4 is not set
475# CONFIG_MTD_CFI_I8 is not set
476# CONFIG_MTD_OTP is not set
477CONFIG_MTD_CFI_INTELEXT=y
478CONFIG_MTD_CFI_AMDSTD=y
479# CONFIG_MTD_CFI_STAA is not set
480CONFIG_MTD_CFI_UTIL=y
481# CONFIG_MTD_RAM is not set
482# CONFIG_MTD_ROM is not set
483# CONFIG_MTD_ABSENT is not set
484# CONFIG_MTD_OBSOLETE_CHIPS is not set
485# CONFIG_MTD_XIP is not set
486
487#
488# Mapping drivers for chip access
489#
490CONFIG_MTD_COMPLEX_MAPPINGS=y
491CONFIG_MTD_PHYSMAP=y
492CONFIG_MTD_PHYSMAP_START=0x0
493CONFIG_MTD_PHYSMAP_LEN=0x4000000
494CONFIG_MTD_PHYSMAP_BANKWIDTH=2
495# CONFIG_MTD_TRIZEPS4 is not set
496# CONFIG_MTD_ARM_INTEGRATOR is not set
497# CONFIG_MTD_IMPA7 is not set
498# CONFIG_MTD_SHARP_SL is not set
499# CONFIG_MTD_PLATRAM is not set
500
501#
502# Self-contained MTD device drivers
503#
504# CONFIG_MTD_DATAFLASH is not set
505# CONFIG_MTD_M25P80 is not set
506# CONFIG_MTD_SLRAM is not set
507# CONFIG_MTD_PHRAM is not set
508# CONFIG_MTD_MTDRAM is not set
509# CONFIG_MTD_BLOCK2MTD is not set
510
511#
512# Disk-On-Chip Device Drivers
513#
514# CONFIG_MTD_DOC2000 is not set
515# CONFIG_MTD_DOC2001 is not set
516CONFIG_MTD_DOC2001PLUS=y
517CONFIG_MTD_DOCPROBE=y
518CONFIG_MTD_DOCECC=y
519# CONFIG_MTD_DOCPROBE_ADVANCED is not set
520CONFIG_MTD_DOCPROBE_ADDRESS=0
521
522#
523# NAND Flash Device Drivers
524#
525CONFIG_MTD_NAND=y
526# CONFIG_MTD_NAND_VERIFY_WRITE is not set
527# CONFIG_MTD_NAND_H1900 is not set
528CONFIG_MTD_NAND_IDS=y
529CONFIG_MTD_NAND_DISKONCHIP=y
530# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
531CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
532# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
533# CONFIG_MTD_NAND_SHARPSL is not set
534# CONFIG_MTD_NAND_NANDSIM is not set
535
536#
537# OneNAND Flash Device Drivers
538#
539# CONFIG_MTD_ONENAND is not set
540
541#
542# Parallel port support
543#
544# CONFIG_PARPORT is not set
545
546#
547# Plug and Play support
548#
549
550#
551# Block devices
552#
553# CONFIG_BLK_DEV_COW_COMMON is not set
554CONFIG_BLK_DEV_LOOP=y
555CONFIG_BLK_DEV_CRYPTOLOOP=m
556CONFIG_BLK_DEV_NBD=y
557# CONFIG_BLK_DEV_UB is not set
558CONFIG_BLK_DEV_RAM=y
559CONFIG_BLK_DEV_RAM_COUNT=4
560CONFIG_BLK_DEV_RAM_SIZE=4096
561CONFIG_BLK_DEV_INITRD=y
562# CONFIG_CDROM_PKTCDVD is not set
563# CONFIG_ATA_OVER_ETH is not set
564
565#
566# ATA/ATAPI/MFM/RLL support
567#
568CONFIG_IDE=y
569CONFIG_BLK_DEV_IDE=y
570
571#
572# Please see Documentation/ide.txt for help/info on IDE drives
573#
574# CONFIG_BLK_DEV_IDE_SATA is not set
575CONFIG_BLK_DEV_IDEDISK=y
576CONFIG_IDEDISK_MULTI_MODE=y
577CONFIG_BLK_DEV_IDECS=m
578# CONFIG_BLK_DEV_IDECD is not set
579# CONFIG_BLK_DEV_IDETAPE is not set
580# CONFIG_BLK_DEV_IDEFLOPPY is not set
581# CONFIG_BLK_DEV_IDESCSI is not set
582# CONFIG_IDE_TASK_IOCTL is not set
583
584#
585# IDE chipset support/bugfixes
586#
587CONFIG_IDE_GENERIC=y
588CONFIG_IDE_PXA_CF=y
589CONFIG_IDE_ARM=y
590# CONFIG_BLK_DEV_IDEDMA is not set
591# CONFIG_IDEDMA_AUTO is not set
592# CONFIG_BLK_DEV_HD is not set
593
594#
595# SCSI device support
596#
597# CONFIG_RAID_ATTRS is not set
598CONFIG_SCSI=m
599CONFIG_SCSI_PROC_FS=y
600
601#
602# SCSI support type (disk, tape, CD-ROM)
603#
604CONFIG_BLK_DEV_SD=m
605# CONFIG_CHR_DEV_ST is not set
606# CONFIG_CHR_DEV_OSST is not set
607# CONFIG_BLK_DEV_SR is not set
608CONFIG_CHR_DEV_SG=m
609# CONFIG_CHR_DEV_SCH is not set
610
611#
612# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
613#
614CONFIG_SCSI_MULTI_LUN=y
615# CONFIG_SCSI_CONSTANTS is not set
616# CONFIG_SCSI_LOGGING is not set
617
618#
619# SCSI Transport Attributes
620#
621# CONFIG_SCSI_SPI_ATTRS is not set
622# CONFIG_SCSI_FC_ATTRS is not set
623# CONFIG_SCSI_ISCSI_ATTRS is not set
624# CONFIG_SCSI_SAS_ATTRS is not set
625
626#
627# SCSI low-level drivers
628#
629# CONFIG_ISCSI_TCP is not set
630# CONFIG_SCSI_SATA is not set
631# CONFIG_SCSI_DEBUG is not set
632
633#
634# PCMCIA SCSI adapter support
635#
636# CONFIG_PCMCIA_AHA152X is not set
637# CONFIG_PCMCIA_FDOMAIN is not set
638# CONFIG_PCMCIA_NINJA_SCSI is not set
639# CONFIG_PCMCIA_QLOGIC is not set
640# CONFIG_PCMCIA_SYM53C500 is not set
641
642#
643# Multi-device support (RAID and LVM)
644#
645# CONFIG_MD is not set
646
647#
648# Fusion MPT device support
649#
650# CONFIG_FUSION is not set
651
652#
653# IEEE 1394 (FireWire) support
654#
655
656#
657# I2O device support
658#
659
660#
661# Network device support
662#
663CONFIG_NETDEVICES=y
664# CONFIG_DUMMY is not set
665# CONFIG_BONDING is not set
666# CONFIG_EQUALIZER is not set
667# CONFIG_TUN is not set
668
669#
670# PHY device support
671#
672CONFIG_PHYLIB=y
673
674#
675# MII PHY device drivers
676#
677# CONFIG_MARVELL_PHY is not set
678CONFIG_DAVICOM_PHY=y
679# CONFIG_QSEMI_PHY is not set
680# CONFIG_LXT_PHY is not set
681# CONFIG_CICADA_PHY is not set
682
683#
684# Ethernet (10 or 100Mbit)
685#
686CONFIG_NET_ETHERNET=y
687CONFIG_MII=y
688# CONFIG_SMC91X is not set
689CONFIG_DM9000=y
690
691#
692# Ethernet (1000 Mbit)
693#
694
695#
696# Ethernet (10000 Mbit)
697#
698
699#
700# Token Ring devices
701#
702
703#
704# Wireless LAN (non-hamradio)
705#
706CONFIG_NET_RADIO=y
707# CONFIG_NET_WIRELESS_RTNETLINK is not set
708
709#
710# Obsolete Wireless cards support (pre-802.11)
711#
712# CONFIG_STRIP is not set
713# CONFIG_PCMCIA_WAVELAN is not set
714# CONFIG_PCMCIA_NETWAVE is not set
715
716#
717# Wireless 802.11 Frequency Hopping cards support
718#
719# CONFIG_PCMCIA_RAYCS is not set
720
721#
722# Wireless 802.11b ISA/PCI cards support
723#
724CONFIG_HERMES=m
725# CONFIG_ATMEL is not set
726
727#
728# Wireless 802.11b Pcmcia/Cardbus cards support
729#
730CONFIG_PCMCIA_HERMES=m
731# CONFIG_PCMCIA_SPECTRUM is not set
732CONFIG_AIRO_CS=m
733# CONFIG_PCMCIA_WL3501 is not set
734CONFIG_HOSTAP=m
735CONFIG_HOSTAP_FIRMWARE=y
736CONFIG_HOSTAP_FIRMWARE_NVRAM=y
737CONFIG_HOSTAP_CS=m
738CONFIG_NET_WIRELESS=y
739
740#
741# PCMCIA network device support
742#
743# CONFIG_NET_PCMCIA is not set
744
745#
746# Wan interfaces
747#
748# CONFIG_WAN is not set
749CONFIG_PPP=m
750CONFIG_PPP_MULTILINK=y
751CONFIG_PPP_FILTER=y
752CONFIG_PPP_ASYNC=m
753CONFIG_PPP_SYNC_TTY=m
754CONFIG_PPP_DEFLATE=m
755CONFIG_PPP_BSDCOMP=m
756CONFIG_PPP_MPPE=m
757# CONFIG_PPPOE is not set
758# CONFIG_SLIP is not set
759# CONFIG_SHAPER is not set
760# CONFIG_NETCONSOLE is not set
761# CONFIG_NETPOLL is not set
762# CONFIG_NET_POLL_CONTROLLER is not set
763
764#
765# ISDN subsystem
766#
767# CONFIG_ISDN is not set
768
769#
770# Input device support
771#
772CONFIG_INPUT=y
773
774#
775# Userland interfaces
776#
777CONFIG_INPUT_MOUSEDEV=y
778CONFIG_INPUT_MOUSEDEV_PSAUX=y
779CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
780CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
781# CONFIG_INPUT_JOYDEV is not set
782CONFIG_INPUT_TSDEV=y
783CONFIG_INPUT_TSDEV_SCREEN_X=640
784CONFIG_INPUT_TSDEV_SCREEN_Y=480
785CONFIG_INPUT_EVDEV=y
786# CONFIG_INPUT_EVBUG is not set
787
788#
789# Input Device Drivers
790#
791CONFIG_INPUT_KEYBOARD=y
792CONFIG_KEYBOARD_ATKBD=y
793# CONFIG_KEYBOARD_SUNKBD is not set
794# CONFIG_KEYBOARD_LKKBD is not set
795# CONFIG_KEYBOARD_XTKBD is not set
796# CONFIG_KEYBOARD_NEWTON is not set
797CONFIG_INPUT_MOUSE=y
798# CONFIG_MOUSE_PS2 is not set
799CONFIG_MOUSE_SERIAL=y
800# CONFIG_MOUSE_VSXXXAA is not set
801# CONFIG_INPUT_JOYSTICK is not set
802CONFIG_INPUT_TOUCHSCREEN=y
803# CONFIG_TOUCHSCREEN_ADS7846 is not set
804# CONFIG_TOUCHSCREEN_GUNZE is not set
805# CONFIG_TOUCHSCREEN_ELO is not set
806# CONFIG_TOUCHSCREEN_MTOUCH is not set
807# CONFIG_TOUCHSCREEN_MK712 is not set
808CONFIG_INPUT_MISC=y
809CONFIG_INPUT_UINPUT=m
810
811#
812# Hardware I/O ports
813#
814CONFIG_SERIO=y
815CONFIG_SERIO_SERPORT=y
816CONFIG_SERIO_LIBPS2=y
817# CONFIG_SERIO_RAW is not set
818# CONFIG_GAMEPORT is not set
819
820#
821# Character devices
822#
823CONFIG_VT=y
824CONFIG_VT_CONSOLE=y
825CONFIG_HW_CONSOLE=y
826# CONFIG_SERIAL_NONSTANDARD is not set
827
828#
829# Serial drivers
830#
831# CONFIG_SERIAL_8250 is not set
832
833#
834# Non-8250 serial port support
835#
836CONFIG_SERIAL_PXA=y
837CONFIG_SERIAL_PXA_CONSOLE=y
838CONFIG_SERIAL_CORE=y
839CONFIG_SERIAL_CORE_CONSOLE=y
840CONFIG_UNIX98_PTYS=y
841CONFIG_LEGACY_PTYS=y
842CONFIG_LEGACY_PTY_COUNT=256
843
844#
845# IPMI
846#
847# CONFIG_IPMI_HANDLER is not set
848
849#
850# Watchdog Cards
851#
852CONFIG_WATCHDOG=y
853# CONFIG_WATCHDOG_NOWAYOUT is not set
854
855#
856# Watchdog Device Drivers
857#
858# CONFIG_SOFT_WATCHDOG is not set
859CONFIG_SA1100_WATCHDOG=y
860
861#
862# USB-based Watchdog Cards
863#
864# CONFIG_USBPCWATCHDOG is not set
865# CONFIG_NVRAM is not set
866# CONFIG_DTLK is not set
867# CONFIG_R3964 is not set
868
869#
870# Ftape, the floppy tape device driver
871#
872
873#
874# PCMCIA character devices
875#
876# CONFIG_SYNCLINK_CS is not set
877# CONFIG_CARDMAN_4000 is not set
878# CONFIG_CARDMAN_4040 is not set
879# CONFIG_RAW_DRIVER is not set
880
881#
882# TPM devices
883#
884# CONFIG_TCG_TPM is not set
885# CONFIG_TELCLOCK is not set
886
887#
888# I2C support
889#
890CONFIG_I2C=y
891CONFIG_I2C_CHARDEV=y
892
893#
894# I2C Algorithms
895#
896# CONFIG_I2C_ALGOBIT is not set
897# CONFIG_I2C_ALGOPCF is not set
898# CONFIG_I2C_ALGOPCA is not set
899
900#
901# I2C Hardware Bus support
902#
903CONFIG_I2C_PXA=y
904CONFIG_I2C_PXA_SLAVE=y
905# CONFIG_I2C_PARPORT_LIGHT is not set
906# CONFIG_I2C_STUB is not set
907# CONFIG_I2C_PCA_ISA is not set
908
909#
910# Miscellaneous I2C Chip support
911#
912# CONFIG_SENSORS_DS1337 is not set
913# CONFIG_SENSORS_DS1374 is not set
914CONFIG_SENSORS_EEPROM=m
915# CONFIG_SENSORS_PCF8574 is not set
916# CONFIG_SENSORS_PCA9539 is not set
917# CONFIG_SENSORS_PCF8591 is not set
918# CONFIG_SENSORS_MAX6875 is not set
919# CONFIG_I2C_DEBUG_CORE is not set
920# CONFIG_I2C_DEBUG_ALGO is not set
921# CONFIG_I2C_DEBUG_BUS is not set
922# CONFIG_I2C_DEBUG_CHIP is not set
923
924#
925# SPI support
926#
927CONFIG_SPI=y
928CONFIG_SPI_MASTER=y
929
930#
931# SPI Master Controller Drivers
932#
933# CONFIG_SPI_BITBANG is not set
934CONFIG_SPI_PXA2XX=m
935
936#
937# SPI Protocol Masters
938#
939
940#
941# Dallas's 1-wire bus
942#
943# CONFIG_W1 is not set
944
945#
946# Hardware Monitoring support
947#
948CONFIG_HWMON=y
949# CONFIG_HWMON_VID is not set
950# CONFIG_SENSORS_ADM1021 is not set
951# CONFIG_SENSORS_ADM1025 is not set
952# CONFIG_SENSORS_ADM1026 is not set
953# CONFIG_SENSORS_ADM1031 is not set
954# CONFIG_SENSORS_ADM9240 is not set
955# CONFIG_SENSORS_ASB100 is not set
956# CONFIG_SENSORS_ATXP1 is not set
957# CONFIG_SENSORS_DS1621 is not set
958# CONFIG_SENSORS_F71805F is not set
959# CONFIG_SENSORS_FSCHER is not set
960# CONFIG_SENSORS_FSCPOS is not set
961# CONFIG_SENSORS_GL518SM is not set
962# CONFIG_SENSORS_GL520SM is not set
963# CONFIG_SENSORS_IT87 is not set
964# CONFIG_SENSORS_LM63 is not set
965# CONFIG_SENSORS_LM75 is not set
966# CONFIG_SENSORS_LM77 is not set
967# CONFIG_SENSORS_LM78 is not set
968# CONFIG_SENSORS_LM80 is not set
969# CONFIG_SENSORS_LM83 is not set
970# CONFIG_SENSORS_LM85 is not set
971# CONFIG_SENSORS_LM87 is not set
972# CONFIG_SENSORS_LM90 is not set
973# CONFIG_SENSORS_LM92 is not set
974# CONFIG_SENSORS_MAX1619 is not set
975# CONFIG_SENSORS_PC87360 is not set
976# CONFIG_SENSORS_SMSC47M1 is not set
977# CONFIG_SENSORS_SMSC47B397 is not set
978# CONFIG_SENSORS_W83781D is not set
979# CONFIG_SENSORS_W83792D is not set
980# CONFIG_SENSORS_W83L785TS is not set
981# CONFIG_SENSORS_W83627HF is not set
982# CONFIG_SENSORS_W83627EHF is not set
983# CONFIG_HWMON_DEBUG_CHIP is not set
984
985#
986# Misc devices
987#
988
989#
990# Multimedia Capabilities Port drivers
991#
992CONFIG_UCB1400=y
993CONFIG_UCB1400_TS=y
994
995#
996# LED devices
997#
998CONFIG_NEW_LEDS=y
999CONFIG_LEDS_CLASS=y
1000
1001#
1002# LED drivers
1003#
1004
1005#
1006# LED Triggers
1007#
1008CONFIG_LEDS_TRIGGERS=y
1009CONFIG_LEDS_TRIGGER_TIMER=y
1010CONFIG_LEDS_TRIGGER_IDE_DISK=y
1011
1012#
1013# Multimedia devices
1014#
1015# CONFIG_VIDEO_DEV is not set
1016CONFIG_VIDEO_V4L2=y
1017
1018#
1019# Digital Video Broadcasting Devices
1020#
1021# CONFIG_DVB is not set
1022# CONFIG_USB_DABUSB is not set
1023
1024#
1025# Graphics support
1026#
1027CONFIG_FB=y
1028CONFIG_FB_CFB_FILLRECT=y
1029CONFIG_FB_CFB_COPYAREA=y
1030CONFIG_FB_CFB_IMAGEBLIT=y
1031# CONFIG_FB_MACMODES is not set
1032CONFIG_FB_FIRMWARE_EDID=y
1033# CONFIG_FB_MODE_HELPERS is not set
1034# CONFIG_FB_TILEBLITTING is not set
1035# CONFIG_FB_S1D13XXX is not set
1036CONFIG_FB_PXA=y
1037# CONFIG_FB_PXA_PARAMETERS is not set
1038# CONFIG_FB_VIRTUAL is not set
1039
1040#
1041# Console display driver support
1042#
1043# CONFIG_VGA_CONSOLE is not set
1044CONFIG_DUMMY_CONSOLE=y
1045CONFIG_FRAMEBUFFER_CONSOLE=y
1046CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
1047CONFIG_FONTS=y
1048CONFIG_FONT_8x8=y
1049CONFIG_FONT_8x16=y
1050# CONFIG_FONT_6x11 is not set
1051# CONFIG_FONT_7x14 is not set
1052# CONFIG_FONT_PEARL_8x8 is not set
1053# CONFIG_FONT_ACORN_8x8 is not set
1054# CONFIG_FONT_MINI_4x6 is not set
1055# CONFIG_FONT_SUN8x16 is not set
1056# CONFIG_FONT_SUN12x22 is not set
1057# CONFIG_FONT_10x18 is not set
1058
1059#
1060# Logo configuration
1061#
1062CONFIG_LOGO=y
1063CONFIG_LOGO_LINUX_MONO=y
1064CONFIG_LOGO_LINUX_VGA16=y
1065CONFIG_LOGO_LINUX_CLUT224=y
1066CONFIG_BACKLIGHT_LCD_SUPPORT=y
1067CONFIG_BACKLIGHT_CLASS_DEVICE=y
1068CONFIG_BACKLIGHT_DEVICE=y
1069CONFIG_LCD_CLASS_DEVICE=y
1070CONFIG_LCD_DEVICE=y
1071
1072#
1073# Sound
1074#
1075CONFIG_SOUND=y
1076
1077#
1078# Advanced Linux Sound Architecture
1079#
1080CONFIG_SND=y
1081CONFIG_SND_TIMER=y
1082CONFIG_SND_PCM=y
1083CONFIG_SND_HWDEP=m
1084CONFIG_SND_RAWMIDI=m
1085CONFIG_SND_SEQUENCER=m
1086# CONFIG_SND_SEQ_DUMMY is not set
1087CONFIG_SND_OSSEMUL=y
1088CONFIG_SND_MIXER_OSS=y
1089CONFIG_SND_PCM_OSS=y
1090CONFIG_SND_PCM_OSS_PLUGINS=y
1091# CONFIG_SND_SEQUENCER_OSS is not set
1092# CONFIG_SND_DYNAMIC_MINORS is not set
1093CONFIG_SND_SUPPORT_OLD_API=y
1094CONFIG_SND_VERBOSE_PROCFS=y
1095CONFIG_SND_VERBOSE_PRINTK=y
1096# CONFIG_SND_DEBUG is not set
1097
1098#
1099# Generic devices
1100#
1101CONFIG_SND_AC97_CODEC=y
1102CONFIG_SND_AC97_BUS=y
1103# CONFIG_SND_DUMMY is not set
1104# CONFIG_SND_VIRMIDI is not set
1105# CONFIG_SND_MTPAV is not set
1106# CONFIG_SND_SERIAL_U16550 is not set
1107# CONFIG_SND_MPU401 is not set
1108
1109#
1110# ALSA ARM devices
1111#
1112CONFIG_SND_PXA2XX_PCM=y
1113CONFIG_SND_PXA2XX_AC97=y
1114
1115#
1116# USB devices
1117#
1118CONFIG_SND_USB_AUDIO=m
1119
1120#
1121# PCMCIA devices
1122#
1123# CONFIG_SND_VXPOCKET is not set
1124# CONFIG_SND_PDAUDIOCF is not set
1125
1126#
1127# Open Sound System
1128#
1129# CONFIG_SOUND_PRIME is not set
1130
1131#
1132# USB support
1133#
1134CONFIG_USB_ARCH_HAS_HCD=y
1135CONFIG_USB_ARCH_HAS_OHCI=y
1136# CONFIG_USB_ARCH_HAS_EHCI is not set
1137CONFIG_USB=y
1138# CONFIG_USB_DEBUG is not set
1139
1140#
1141# Miscellaneous USB options
1142#
1143CONFIG_USB_DEVICEFS=y
1144# CONFIG_USB_BANDWIDTH is not set
1145# CONFIG_USB_DYNAMIC_MINORS is not set
1146# CONFIG_USB_SUSPEND is not set
1147# CONFIG_USB_OTG is not set
1148
1149#
1150# USB Host Controller Drivers
1151#
1152# CONFIG_USB_ISP116X_HCD is not set
1153CONFIG_USB_OHCI_HCD=y
1154# CONFIG_USB_OHCI_BIG_ENDIAN is not set
1155CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1156# CONFIG_USB_SL811_HCD is not set
1157
1158#
1159# USB Device Class drivers
1160#
1161# CONFIG_USB_ACM is not set
1162# CONFIG_USB_PRINTER is not set
1163
1164#
1165# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1166#
1167
1168#
1169# may also be needed; see USB_STORAGE Help for more information
1170#
1171CONFIG_USB_STORAGE=m
1172# CONFIG_USB_STORAGE_DEBUG is not set
1173# CONFIG_USB_STORAGE_DATAFAB is not set
1174# CONFIG_USB_STORAGE_FREECOM is not set
1175# CONFIG_USB_STORAGE_ISD200 is not set
1176# CONFIG_USB_STORAGE_DPCM is not set
1177# CONFIG_USB_STORAGE_USBAT is not set
1178# CONFIG_USB_STORAGE_SDDR09 is not set
1179# CONFIG_USB_STORAGE_SDDR55 is not set
1180# CONFIG_USB_STORAGE_JUMPSHOT is not set
1181# CONFIG_USB_STORAGE_ALAUDA is not set
1182# CONFIG_USB_LIBUSUAL is not set
1183
1184#
1185# USB Input Devices
1186#
1187CONFIG_USB_HID=m
1188CONFIG_USB_HIDINPUT=y
1189# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1190# CONFIG_HID_FF is not set
1191# CONFIG_USB_HIDDEV is not set
1192
1193#
1194# USB HID Boot Protocol drivers
1195#
1196# CONFIG_USB_KBD is not set
1197# CONFIG_USB_MOUSE is not set
1198# CONFIG_USB_AIPTEK is not set
1199# CONFIG_USB_WACOM is not set
1200# CONFIG_USB_ACECAD is not set
1201# CONFIG_USB_KBTAB is not set
1202# CONFIG_USB_POWERMATE is not set
1203CONFIG_USB_TOUCHSCREEN=m
1204# CONFIG_USB_TOUCHSCREEN_EGALAX is not set
1205# CONFIG_USB_TOUCHSCREEN_PANJIT is not set
1206# CONFIG_USB_TOUCHSCREEN_3M is not set
1207# CONFIG_USB_TOUCHSCREEN_ITM is not set
1208# CONFIG_USB_YEALINK is not set
1209# CONFIG_USB_XPAD is not set
1210# CONFIG_USB_ATI_REMOTE is not set
1211# CONFIG_USB_ATI_REMOTE2 is not set
1212# CONFIG_USB_KEYSPAN_REMOTE is not set
1213# CONFIG_USB_APPLETOUCH is not set
1214
1215#
1216# USB Imaging devices
1217#
1218# CONFIG_USB_MDC800 is not set
1219# CONFIG_USB_MICROTEK is not set
1220
1221#
1222# USB Network Adapters
1223#
1224# CONFIG_USB_CATC is not set
1225# CONFIG_USB_KAWETH is not set
1226# CONFIG_USB_PEGASUS is not set
1227# CONFIG_USB_RTL8150 is not set
1228# CONFIG_USB_USBNET is not set
1229# CONFIG_USB_ZD1201 is not set
1230CONFIG_USB_MON=y
1231
1232#
1233# USB port drivers
1234#
1235
1236#
1237# USB Serial Converter support
1238#
1239# CONFIG_USB_SERIAL is not set
1240
1241#
1242# USB Miscellaneous drivers
1243#
1244# CONFIG_USB_EMI62 is not set
1245# CONFIG_USB_EMI26 is not set
1246# CONFIG_USB_AUERSWALD is not set
1247# CONFIG_USB_RIO500 is not set
1248# CONFIG_USB_LEGOTOWER is not set
1249# CONFIG_USB_LCD is not set
1250# CONFIG_USB_LED is not set
1251# CONFIG_USB_CYTHERM is not set
1252# CONFIG_USB_PHIDGETKIT is not set
1253# CONFIG_USB_PHIDGETSERVO is not set
1254# CONFIG_USB_IDMOUSE is not set
1255# CONFIG_USB_LD is not set
1256# CONFIG_USB_TEST is not set
1257
1258#
1259# USB DSL modem support
1260#
1261
1262#
1263# USB Gadget Support
1264#
1265CONFIG_USB_GADGET=y
1266# CONFIG_USB_GADGET_DEBUG_FILES is not set
1267CONFIG_USB_GADGET_SELECTED=y
1268# CONFIG_USB_GADGET_NET2280 is not set
1269# CONFIG_USB_GADGET_PXA2XX is not set
1270# CONFIG_USB_GADGET_GOKU is not set
1271# CONFIG_USB_GADGET_LH7A40X is not set
1272# CONFIG_USB_GADGET_OMAP is not set
1273# CONFIG_USB_GADGET_AT91 is not set
1274CONFIG_USB_GADGET_DUMMY_HCD=y
1275CONFIG_USB_DUMMY_HCD=y
1276CONFIG_USB_GADGET_DUALSPEED=y
1277# CONFIG_USB_ZERO is not set
1278CONFIG_USB_ETH=m
1279CONFIG_USB_ETH_RNDIS=y
1280CONFIG_USB_GADGETFS=m
1281CONFIG_USB_FILE_STORAGE=m
1282# CONFIG_USB_FILE_STORAGE_TEST is not set
1283CONFIG_USB_G_SERIAL=m
1284
1285#
1286# MMC/SD Card support
1287#
1288CONFIG_MMC=y
1289# CONFIG_MMC_DEBUG is not set
1290CONFIG_MMC_BLOCK=y
1291CONFIG_MMC_PXA=y
1292
1293#
1294# Real Time Clock
1295#
1296CONFIG_RTC_LIB=y
1297CONFIG_RTC_CLASS=y
1298CONFIG_RTC_HCTOSYS=y
1299CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1300
1301#
1302# RTC interfaces
1303#
1304CONFIG_RTC_INTF_SYSFS=y
1305CONFIG_RTC_INTF_PROC=y
1306CONFIG_RTC_INTF_DEV=y
1307
1308#
1309# RTC drivers
1310#
1311# CONFIG_RTC_DRV_X1205 is not set
1312# CONFIG_RTC_DRV_DS1672 is not set
1313# CONFIG_RTC_DRV_PCF8563 is not set
1314# CONFIG_RTC_DRV_RS5C372 is not set
1315# CONFIG_RTC_DRV_M48T86 is not set
1316CONFIG_RTC_DRV_SA1100=y
1317# CONFIG_RTC_DRV_TEST is not set
1318
1319#
1320# File systems
1321#
1322CONFIG_EXT2_FS=y
1323CONFIG_EXT2_FS_XATTR=y
1324CONFIG_EXT2_FS_POSIX_ACL=y
1325CONFIG_EXT2_FS_SECURITY=y
1326# CONFIG_EXT2_FS_XIP is not set
1327CONFIG_EXT3_FS=y
1328CONFIG_EXT3_FS_XATTR=y
1329CONFIG_EXT3_FS_POSIX_ACL=y
1330CONFIG_EXT3_FS_SECURITY=y
1331CONFIG_JBD=y
1332# CONFIG_JBD_DEBUG is not set
1333CONFIG_FS_MBCACHE=y
1334# CONFIG_REISERFS_FS is not set
1335# CONFIG_JFS_FS is not set
1336CONFIG_FS_POSIX_ACL=y
1337# CONFIG_XFS_FS is not set
1338# CONFIG_OCFS2_FS is not set
1339# CONFIG_MINIX_FS is not set
1340# CONFIG_ROMFS_FS is not set
1341CONFIG_INOTIFY=y
1342# CONFIG_QUOTA is not set
1343CONFIG_DNOTIFY=y
1344# CONFIG_AUTOFS_FS is not set
1345CONFIG_AUTOFS4_FS=y
1346# CONFIG_FUSE_FS is not set
1347
1348#
1349# CD-ROM/DVD Filesystems
1350#
1351# CONFIG_ISO9660_FS is not set
1352# CONFIG_UDF_FS is not set
1353
1354#
1355# DOS/FAT/NT Filesystems
1356#
1357CONFIG_FAT_FS=m
1358CONFIG_MSDOS_FS=m
1359CONFIG_VFAT_FS=m
1360CONFIG_FAT_DEFAULT_CODEPAGE=437
1361CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
1362# CONFIG_NTFS_FS is not set
1363
1364#
1365# Pseudo filesystems
1366#
1367CONFIG_PROC_FS=y
1368CONFIG_SYSFS=y
1369CONFIG_TMPFS=y
1370# CONFIG_HUGETLB_PAGE is not set
1371CONFIG_RAMFS=y
1372# CONFIG_CONFIGFS_FS is not set
1373
1374#
1375# Miscellaneous filesystems
1376#
1377# CONFIG_ADFS_FS is not set
1378# CONFIG_AFFS_FS is not set
1379# CONFIG_HFS_FS is not set
1380# CONFIG_HFSPLUS_FS is not set
1381# CONFIG_BEFS_FS is not set
1382# CONFIG_BFS_FS is not set
1383# CONFIG_EFS_FS is not set
1384CONFIG_JFFS_FS=y
1385CONFIG_JFFS_FS_VERBOSE=0
1386CONFIG_JFFS_PROC_FS=y
1387CONFIG_JFFS2_FS=y
1388CONFIG_JFFS2_FS_DEBUG=0
1389CONFIG_JFFS2_FS_WRITEBUFFER=y
1390# CONFIG_JFFS2_SUMMARY is not set
1391CONFIG_JFFS2_COMPRESSION_OPTIONS=y
1392CONFIG_JFFS2_ZLIB=y
1393CONFIG_JFFS2_RTIME=y
1394# CONFIG_JFFS2_RUBIN is not set
1395# CONFIG_JFFS2_CMODE_NONE is not set
1396CONFIG_JFFS2_CMODE_PRIORITY=y
1397# CONFIG_JFFS2_CMODE_SIZE is not set
1398# CONFIG_CRAMFS is not set
1399# CONFIG_VXFS_FS is not set
1400# CONFIG_HPFS_FS is not set
1401# CONFIG_QNX4FS_FS is not set
1402# CONFIG_SYSV_FS is not set
1403# CONFIG_UFS_FS is not set
1404
1405#
1406# Network File Systems
1407#
1408CONFIG_NFS_FS=y
1409CONFIG_NFS_V3=y
1410CONFIG_NFS_V3_ACL=y
1411CONFIG_NFS_V4=y
1412# CONFIG_NFS_DIRECTIO is not set
1413CONFIG_NFSD=y
1414CONFIG_NFSD_V2_ACL=y
1415CONFIG_NFSD_V3=y
1416CONFIG_NFSD_V3_ACL=y
1417CONFIG_NFSD_V4=y
1418CONFIG_NFSD_TCP=y
1419CONFIG_ROOT_NFS=y
1420CONFIG_LOCKD=y
1421CONFIG_LOCKD_V4=y
1422CONFIG_EXPORTFS=y
1423CONFIG_NFS_ACL_SUPPORT=y
1424CONFIG_NFS_COMMON=y
1425CONFIG_SUNRPC=y
1426CONFIG_SUNRPC_GSS=y
1427CONFIG_RPCSEC_GSS_KRB5=y
1428# CONFIG_RPCSEC_GSS_SPKM3 is not set
1429CONFIG_SMB_FS=m
1430# CONFIG_SMB_NLS_DEFAULT is not set
1431CONFIG_CIFS=m
1432# CONFIG_CIFS_STATS is not set
1433# CONFIG_CIFS_XATTR is not set
1434# CONFIG_CIFS_EXPERIMENTAL is not set
1435# CONFIG_NCP_FS is not set
1436# CONFIG_CODA_FS is not set
1437# CONFIG_AFS_FS is not set
1438# CONFIG_9P_FS is not set
1439
1440#
1441# Partition Types
1442#
1443CONFIG_PARTITION_ADVANCED=y
1444# CONFIG_ACORN_PARTITION is not set
1445# CONFIG_OSF_PARTITION is not set
1446# CONFIG_AMIGA_PARTITION is not set
1447# CONFIG_ATARI_PARTITION is not set
1448# CONFIG_MAC_PARTITION is not set
1449CONFIG_MSDOS_PARTITION=y
1450# CONFIG_BSD_DISKLABEL is not set
1451# CONFIG_MINIX_SUBPARTITION is not set
1452# CONFIG_SOLARIS_X86_PARTITION is not set
1453# CONFIG_UNIXWARE_DISKLABEL is not set
1454CONFIG_LDM_PARTITION=y
1455# CONFIG_LDM_DEBUG is not set
1456# CONFIG_SGI_PARTITION is not set
1457# CONFIG_ULTRIX_PARTITION is not set
1458# CONFIG_SUN_PARTITION is not set
1459# CONFIG_KARMA_PARTITION is not set
1460# CONFIG_EFI_PARTITION is not set
1461
1462#
1463# Native Language Support
1464#
1465CONFIG_NLS=y
1466CONFIG_NLS_DEFAULT="iso8859-15"
1467CONFIG_NLS_CODEPAGE_437=y
1468# CONFIG_NLS_CODEPAGE_737 is not set
1469# CONFIG_NLS_CODEPAGE_775 is not set
1470CONFIG_NLS_CODEPAGE_850=y
1471# CONFIG_NLS_CODEPAGE_852 is not set
1472# CONFIG_NLS_CODEPAGE_855 is not set
1473# CONFIG_NLS_CODEPAGE_857 is not set
1474# CONFIG_NLS_CODEPAGE_860 is not set
1475# CONFIG_NLS_CODEPAGE_861 is not set
1476# CONFIG_NLS_CODEPAGE_862 is not set
1477# CONFIG_NLS_CODEPAGE_863 is not set
1478# CONFIG_NLS_CODEPAGE_864 is not set
1479# CONFIG_NLS_CODEPAGE_865 is not set
1480# CONFIG_NLS_CODEPAGE_866 is not set
1481# CONFIG_NLS_CODEPAGE_869 is not set
1482# CONFIG_NLS_CODEPAGE_936 is not set
1483# CONFIG_NLS_CODEPAGE_950 is not set
1484# CONFIG_NLS_CODEPAGE_932 is not set
1485# CONFIG_NLS_CODEPAGE_949 is not set
1486# CONFIG_NLS_CODEPAGE_874 is not set
1487# CONFIG_NLS_ISO8859_8 is not set
1488# CONFIG_NLS_CODEPAGE_1250 is not set
1489# CONFIG_NLS_CODEPAGE_1251 is not set
1490CONFIG_NLS_ASCII=y
1491CONFIG_NLS_ISO8859_1=m
1492# CONFIG_NLS_ISO8859_2 is not set
1493# CONFIG_NLS_ISO8859_3 is not set
1494# CONFIG_NLS_ISO8859_4 is not set
1495# CONFIG_NLS_ISO8859_5 is not set
1496# CONFIG_NLS_ISO8859_6 is not set
1497# CONFIG_NLS_ISO8859_7 is not set
1498# CONFIG_NLS_ISO8859_9 is not set
1499# CONFIG_NLS_ISO8859_13 is not set
1500# CONFIG_NLS_ISO8859_14 is not set
1501CONFIG_NLS_ISO8859_15=m
1502# CONFIG_NLS_KOI8_R is not set
1503# CONFIG_NLS_KOI8_U is not set
1504CONFIG_NLS_UTF8=m
1505
1506#
1507# Profiling support
1508#
1509CONFIG_PROFILING=y
1510CONFIG_OPROFILE=y
1511
1512#
1513# Kernel hacking
1514#
1515# CONFIG_PRINTK_TIME is not set
1516CONFIG_MAGIC_SYSRQ=y
1517# CONFIG_DEBUG_KERNEL is not set
1518CONFIG_LOG_BUF_SHIFT=14
1519# CONFIG_DEBUG_BUGVERBOSE is not set
1520# CONFIG_DEBUG_FS is not set
1521CONFIG_FRAME_POINTER=y
1522# CONFIG_UNWIND_INFO is not set
1523CONFIG_DEBUG_USER=y
1524
1525#
1526# Security options
1527#
1528CONFIG_KEYS=y
1529CONFIG_KEYS_DEBUG_PROC_KEYS=y
1530CONFIG_SECURITY=y
1531# CONFIG_SECURITY_NETWORK is not set
1532CONFIG_SECURITY_CAPABILITIES=y
1533# CONFIG_SECURITY_ROOTPLUG is not set
1534# CONFIG_SECURITY_SECLVL is not set
1535
1536#
1537# Cryptographic options
1538#
1539CONFIG_CRYPTO=y
1540# CONFIG_CRYPTO_HMAC is not set
1541# CONFIG_CRYPTO_NULL is not set
1542CONFIG_CRYPTO_MD4=y
1543CONFIG_CRYPTO_MD5=y
1544CONFIG_CRYPTO_SHA1=m
1545CONFIG_CRYPTO_SHA256=m
1546CONFIG_CRYPTO_SHA512=m
1547# CONFIG_CRYPTO_WP512 is not set
1548# CONFIG_CRYPTO_TGR192 is not set
1549CONFIG_CRYPTO_DES=y
1550# CONFIG_CRYPTO_BLOWFISH is not set
1551# CONFIG_CRYPTO_TWOFISH is not set
1552# CONFIG_CRYPTO_SERPENT is not set
1553CONFIG_CRYPTO_AES=m
1554# CONFIG_CRYPTO_CAST5 is not set
1555# CONFIG_CRYPTO_CAST6 is not set
1556# CONFIG_CRYPTO_TEA is not set
1557CONFIG_CRYPTO_ARC4=m
1558# CONFIG_CRYPTO_KHAZAD is not set
1559# CONFIG_CRYPTO_ANUBIS is not set
1560CONFIG_CRYPTO_DEFLATE=m
1561CONFIG_CRYPTO_MICHAEL_MIC=m
1562CONFIG_CRYPTO_CRC32C=y
1563# CONFIG_CRYPTO_TEST is not set
1564
1565#
1566# Hardware crypto devices
1567#
1568
1569#
1570# Library routines
1571#
1572CONFIG_CRC_CCITT=y
1573CONFIG_CRC16=y
1574CONFIG_CRC32=y
1575CONFIG_LIBCRC32C=y
1576CONFIG_ZLIB_INFLATE=y
1577CONFIG_ZLIB_DEFLATE=y
1578CONFIG_REED_SOLOMON=y
1579CONFIG_REED_SOLOMON_DEC16=y
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 7cffbaef064b..f0c0cdb1c183 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
25obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o 25obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
26AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 26AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
27 27
28obj-$(CONFIG_IWMMXT) += iwmmxt.o 28obj-$(CONFIG_IWMMXT) += iwmmxt.o iwmmxt-notifier.o
29AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt 29AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
30 30
31ifneq ($(CONFIG_ARCH_EBSA110),y) 31ifneq ($(CONFIG_ARCH_EBSA110),y)
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 447ede5143a8..cc2d58d028e1 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -105,6 +105,7 @@ int main(void)
105 BLANK(); 105 BLANK();
106 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list)); 106 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
107 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); 107 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
108 DEFINE(PROCINFO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mmu_flags)); 108 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
109 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
109 return 0; 110 return 0;
110} 111}
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 68a257666d95..b9a74a741d00 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -619,7 +619,7 @@ ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
619 ecard_t *ec = slot_to_ecard(slot); 619 ecard_t *ec = slot_to_ecard(slot);
620 620
621 if (ec->claimed) { 621 if (ec->claimed) {
622 struct irqdesc *d = irqdesc + ec->irq; 622 struct irq_desc *d = irq_desc + ec->irq;
623 /* 623 /*
624 * this ugly code is so that we can operate a 624 * this ugly code is so that we can operate a
625 * prioritorising system: 625 * prioritorising system:
@@ -883,7 +883,7 @@ static ssize_t ecard_show_resources(struct device *dev, struct device_attribute
883 int i; 883 int i;
884 884
885 for (i = 0; i < ECARD_NUM_RESOURCES; i++) 885 for (i = 0; i < ECARD_NUM_RESOURCES; i++)
886 str += sprintf(str, "%08lx %08lx %08lx\n", 886 str += sprintf(str, "%08x %08x %08lx\n",
887 ec->resource[i].start, 887 ec->resource[i].start,
888 ec->resource[i].end, 888 ec->resource[i].end,
889 ec->resource[i].flags); 889 ec->resource[i].flags);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 26f197afd204..7ea5f01dfc7b 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -589,9 +589,7 @@ ENTRY(__switch_to)
589#ifdef CONFIG_MMU 589#ifdef CONFIG_MMU
590 mcr p15, 0, r6, c3, c0, 0 @ Set domain register 590 mcr p15, 0, r6, c3, c0, 0 @ Set domain register
591#endif 591#endif
592#if defined(CONFIG_IWMMXT) 592#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
593 bl iwmmxt_task_switch
594#elif defined(CONFIG_CPU_XSCALE)
595 add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra 593 add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra
596 ldmib r4, {r4, r5} 594 ldmib r4, {r4, r5}
597 mar acc0, r4, r5 595 mar acc0, r4, r5
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 1ec3f7faa259..e8e90346f11c 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -38,6 +38,7 @@
38#include <linux/module.h> 38#include <linux/module.h>
39#include <linux/kernel.h> 39#include <linux/kernel.h>
40#include <linux/init.h> 40#include <linux/init.h>
41#include <linux/interrupt.h>
41#include <linux/seq_file.h> 42#include <linux/seq_file.h>
42 43
43#include <asm/cacheflush.h> 44#include <asm/cacheflush.h>
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 518b80cd87de..2242f5f7cb7d 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -220,7 +220,7 @@ __create_page_tables:
220 teq r0, r6 220 teq r0, r6
221 bne 1b 221 bne 1b
222 222
223 ldr r7, [r10, #PROCINFO_MMUFLAGS] @ mmuflags 223 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
224 224
225 /* 225 /*
226 * Create identity mapping for first MB of kernel to 226 * Create identity mapping for first MB of kernel to
@@ -271,8 +271,7 @@ __create_page_tables:
271#endif 271#endif
272 272
273#ifdef CONFIG_DEBUG_LL 273#ifdef CONFIG_DEBUG_LL
274 bic r7, r7, #0x0c @ turn off cacheable 274 ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
275 @ and bufferable bits
276 /* 275 /*
277 * Map in IO space for serial debugging. 276 * Map in IO space for serial debugging.
278 * This allows debug messages to be output 277 * This allows debug messages to be output
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 4d31cf8d02d5..c3d4e94ef5bf 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -26,6 +26,7 @@
26#include <linux/signal.h> 26#include <linux/signal.h>
27#include <linux/ioport.h> 27#include <linux/ioport.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/irq.h>
29#include <linux/ptrace.h> 30#include <linux/ptrace.h>
30#include <linux/slab.h> 31#include <linux/slab.h>
31#include <linux/random.h> 32#include <linux/random.h>
@@ -37,192 +38,18 @@
37#include <linux/kallsyms.h> 38#include <linux/kallsyms.h>
38#include <linux/proc_fs.h> 39#include <linux/proc_fs.h>
39 40
40#include <asm/irq.h>
41#include <asm/system.h> 41#include <asm/system.h>
42#include <asm/mach/irq.h>
43#include <asm/mach/time.h> 42#include <asm/mach/time.h>
44 43
45/* 44/*
46 * Maximum IRQ count. Currently, this is arbitary. However, it should
47 * not be set too low to prevent false triggering. Conversely, if it
48 * is set too high, then you could miss a stuck IRQ.
49 *
50 * Maybe we ought to set a timer and re-enable the IRQ at a later time?
51 */
52#define MAX_IRQ_CNT 100000
53
54static int noirqdebug __read_mostly;
55static volatile unsigned long irq_err_count;
56static DEFINE_SPINLOCK(irq_controller_lock);
57static LIST_HEAD(irq_pending);
58
59struct irqdesc irq_desc[NR_IRQS];
60void (*init_arch_irq)(void) __initdata = NULL;
61
62/*
63 * No architecture-specific irq_finish function defined in arm/arch/irqs.h. 45 * No architecture-specific irq_finish function defined in arm/arch/irqs.h.
64 */ 46 */
65#ifndef irq_finish 47#ifndef irq_finish
66#define irq_finish(irq) do { } while (0) 48#define irq_finish(irq) do { } while (0)
67#endif 49#endif
68 50
69/* 51void (*init_arch_irq)(void) __initdata = NULL;
70 * Dummy mask/unmask handler 52unsigned long irq_err_count;
71 */
72void dummy_mask_unmask_irq(unsigned int irq)
73{
74}
75
76irqreturn_t no_action(int irq, void *dev_id, struct pt_regs *regs)
77{
78 return IRQ_NONE;
79}
80
81void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
82{
83 irq_err_count++;
84 printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);
85}
86
87static struct irqchip bad_chip = {
88 .ack = dummy_mask_unmask_irq,
89 .mask = dummy_mask_unmask_irq,
90 .unmask = dummy_mask_unmask_irq,
91};
92
93static struct irqdesc bad_irq_desc = {
94 .chip = &bad_chip,
95 .handle = do_bad_IRQ,
96 .pend = LIST_HEAD_INIT(bad_irq_desc.pend),
97 .disable_depth = 1,
98};
99
100#ifdef CONFIG_SMP
101void synchronize_irq(unsigned int irq)
102{
103 struct irqdesc *desc = irq_desc + irq;
104
105 while (desc->running)
106 barrier();
107}
108EXPORT_SYMBOL(synchronize_irq);
109
110#define smp_set_running(desc) do { desc->running = 1; } while (0)
111#define smp_clear_running(desc) do { desc->running = 0; } while (0)
112#else
113#define smp_set_running(desc) do { } while (0)
114#define smp_clear_running(desc) do { } while (0)
115#endif
116
117/**
118 * disable_irq_nosync - disable an irq without waiting
119 * @irq: Interrupt to disable
120 *
121 * Disable the selected interrupt line. Enables and disables
122 * are nested. We do this lazily.
123 *
124 * This function may be called from IRQ context.
125 */
126void disable_irq_nosync(unsigned int irq)
127{
128 struct irqdesc *desc = irq_desc + irq;
129 unsigned long flags;
130
131 spin_lock_irqsave(&irq_controller_lock, flags);
132 desc->disable_depth++;
133 list_del_init(&desc->pend);
134 spin_unlock_irqrestore(&irq_controller_lock, flags);
135}
136EXPORT_SYMBOL(disable_irq_nosync);
137
138/**
139 * disable_irq - disable an irq and wait for completion
140 * @irq: Interrupt to disable
141 *
142 * Disable the selected interrupt line. Enables and disables
143 * are nested. This functions waits for any pending IRQ
144 * handlers for this interrupt to complete before returning.
145 * If you use this function while holding a resource the IRQ
146 * handler may need you will deadlock.
147 *
148 * This function may be called - with care - from IRQ context.
149 */
150void disable_irq(unsigned int irq)
151{
152 struct irqdesc *desc = irq_desc + irq;
153
154 disable_irq_nosync(irq);
155 if (desc->action)
156 synchronize_irq(irq);
157}
158EXPORT_SYMBOL(disable_irq);
159
160/**
161 * enable_irq - enable interrupt handling on an irq
162 * @irq: Interrupt to enable
163 *
164 * Re-enables the processing of interrupts on this IRQ line.
165 * Note that this may call the interrupt handler, so you may
166 * get unexpected results if you hold IRQs disabled.
167 *
168 * This function may be called from IRQ context.
169 */
170void enable_irq(unsigned int irq)
171{
172 struct irqdesc *desc = irq_desc + irq;
173 unsigned long flags;
174
175 spin_lock_irqsave(&irq_controller_lock, flags);
176 if (unlikely(!desc->disable_depth)) {
177 printk("enable_irq(%u) unbalanced from %p\n", irq,
178 __builtin_return_address(0));
179 } else if (!--desc->disable_depth) {
180 desc->probing = 0;
181 desc->chip->unmask(irq);
182
183 /*
184 * If the interrupt is waiting to be processed,
185 * try to re-run it. We can't directly run it
186 * from here since the caller might be in an
187 * interrupt-protected region.
188 */
189 if (desc->pending && list_empty(&desc->pend)) {
190 desc->pending = 0;
191 if (!desc->chip->retrigger ||
192 desc->chip->retrigger(irq))
193 list_add(&desc->pend, &irq_pending);
194 }
195 }
196 spin_unlock_irqrestore(&irq_controller_lock, flags);
197}
198EXPORT_SYMBOL(enable_irq);
199
200/*
201 * Enable wake on selected irq
202 */
203void enable_irq_wake(unsigned int irq)
204{
205 struct irqdesc *desc = irq_desc + irq;
206 unsigned long flags;
207
208 spin_lock_irqsave(&irq_controller_lock, flags);
209 if (desc->chip->set_wake)
210 desc->chip->set_wake(irq, 1);
211 spin_unlock_irqrestore(&irq_controller_lock, flags);
212}
213EXPORT_SYMBOL(enable_irq_wake);
214
215void disable_irq_wake(unsigned int irq)
216{
217 struct irqdesc *desc = irq_desc + irq;
218 unsigned long flags;
219
220 spin_lock_irqsave(&irq_controller_lock, flags);
221 if (desc->chip->set_wake)
222 desc->chip->set_wake(irq, 0);
223 spin_unlock_irqrestore(&irq_controller_lock, flags);
224}
225EXPORT_SYMBOL(disable_irq_wake);
226 53
227int show_interrupts(struct seq_file *p, void *v) 54int show_interrupts(struct seq_file *p, void *v)
228{ 55{
@@ -242,8 +69,8 @@ int show_interrupts(struct seq_file *p, void *v)
242 } 69 }
243 70
244 if (i < NR_IRQS) { 71 if (i < NR_IRQS) {
245 spin_lock_irqsave(&irq_controller_lock, flags); 72 spin_lock_irqsave(&irq_desc[i].lock, flags);
246 action = irq_desc[i].action; 73 action = irq_desc[i].action;
247 if (!action) 74 if (!action)
248 goto unlock; 75 goto unlock;
249 76
@@ -256,7 +83,7 @@ int show_interrupts(struct seq_file *p, void *v)
256 83
257 seq_putc(p, '\n'); 84 seq_putc(p, '\n');
258unlock: 85unlock:
259 spin_unlock_irqrestore(&irq_controller_lock, flags); 86 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
260 } else if (i == NR_IRQS) { 87 } else if (i == NR_IRQS) {
261#ifdef CONFIG_ARCH_ACORN 88#ifdef CONFIG_ARCH_ACORN
262 show_fiq_list(p, v); 89 show_fiq_list(p, v);
@@ -270,267 +97,11 @@ unlock:
270 return 0; 97 return 0;
271} 98}
272 99
273/* 100/* Handle bad interrupts */
274 * IRQ lock detection. 101static struct irq_desc bad_irq_desc = {
275 * 102 .handle_irq = handle_bad_irq,
276 * Hopefully, this should get us out of a few locked situations. 103 .lock = SPIN_LOCK_UNLOCKED
277 * However, it may take a while for this to happen, since we need 104};
278 * a large number if IRQs to appear in the same jiffie with the
279 * same instruction pointer (or within 2 instructions).
280 */
281static int check_irq_lock(struct irqdesc *desc, int irq, struct pt_regs *regs)
282{
283 unsigned long instr_ptr = instruction_pointer(regs);
284
285 if (desc->lck_jif == jiffies &&
286 desc->lck_pc >= instr_ptr && desc->lck_pc < instr_ptr + 8) {
287 desc->lck_cnt += 1;
288
289 if (desc->lck_cnt > MAX_IRQ_CNT) {
290 printk(KERN_ERR "IRQ LOCK: IRQ%d is locking the system, disabled\n", irq);
291 return 1;
292 }
293 } else {
294 desc->lck_cnt = 0;
295 desc->lck_pc = instruction_pointer(regs);
296 desc->lck_jif = jiffies;
297 }
298 return 0;
299}
300
301static void
302report_bad_irq(unsigned int irq, struct pt_regs *regs, struct irqdesc *desc, int ret)
303{
304 static int count = 100;
305 struct irqaction *action;
306
307 if (noirqdebug)
308 return;
309
310 if (ret != IRQ_HANDLED && ret != IRQ_NONE) {
311 if (!count)
312 return;
313 count--;
314 printk("irq%u: bogus retval mask %x\n", irq, ret);
315 } else {
316 desc->irqs_unhandled++;
317 if (desc->irqs_unhandled <= 99900)
318 return;
319 desc->irqs_unhandled = 0;
320 printk("irq%u: nobody cared\n", irq);
321 }
322 show_regs(regs);
323 dump_stack();
324 printk(KERN_ERR "handlers:");
325 action = desc->action;
326 do {
327 printk("\n" KERN_ERR "[<%p>]", action->handler);
328 print_symbol(" (%s)", (unsigned long)action->handler);
329 action = action->next;
330 } while (action);
331 printk("\n");
332}
333
334static int
335__do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs)
336{
337 unsigned int status;
338 int ret, retval = 0;
339
340 spin_unlock(&irq_controller_lock);
341
342#ifdef CONFIG_NO_IDLE_HZ
343 if (!(action->flags & SA_TIMER) && system_timer->dyn_tick != NULL) {
344 spin_lock(&system_timer->dyn_tick->lock);
345 if (system_timer->dyn_tick->state & DYN_TICK_ENABLED)
346 system_timer->dyn_tick->handler(irq, 0, regs);
347 spin_unlock(&system_timer->dyn_tick->lock);
348 }
349#endif
350
351 if (!(action->flags & SA_INTERRUPT))
352 local_irq_enable();
353
354 status = 0;
355 do {
356 ret = action->handler(irq, action->dev_id, regs);
357 if (ret == IRQ_HANDLED)
358 status |= action->flags;
359 retval |= ret;
360 action = action->next;
361 } while (action);
362
363 if (status & SA_SAMPLE_RANDOM)
364 add_interrupt_randomness(irq);
365
366 spin_lock_irq(&irq_controller_lock);
367
368 return retval;
369}
370
371/*
372 * This is for software-decoded IRQs. The caller is expected to
373 * handle the ack, clear, mask and unmask issues.
374 */
375void
376do_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
377{
378 struct irqaction *action;
379 const unsigned int cpu = smp_processor_id();
380
381 desc->triggered = 1;
382
383 kstat_cpu(cpu).irqs[irq]++;
384
385 smp_set_running(desc);
386
387 action = desc->action;
388 if (action) {
389 int ret = __do_irq(irq, action, regs);
390 if (ret != IRQ_HANDLED)
391 report_bad_irq(irq, regs, desc, ret);
392 }
393
394 smp_clear_running(desc);
395}
396
397/*
398 * Most edge-triggered IRQ implementations seem to take a broken
399 * approach to this. Hence the complexity.
400 */
401void
402do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
403{
404 const unsigned int cpu = smp_processor_id();
405
406 desc->triggered = 1;
407
408 /*
409 * If we're currently running this IRQ, or its disabled,
410 * we shouldn't process the IRQ. Instead, turn on the
411 * hardware masks.
412 */
413 if (unlikely(desc->running || desc->disable_depth))
414 goto running;
415
416 /*
417 * Acknowledge and clear the IRQ, but don't mask it.
418 */
419 desc->chip->ack(irq);
420
421 /*
422 * Mark the IRQ currently in progress.
423 */
424 desc->running = 1;
425
426 kstat_cpu(cpu).irqs[irq]++;
427
428 do {
429 struct irqaction *action;
430
431 action = desc->action;
432 if (!action)
433 break;
434
435 if (desc->pending && !desc->disable_depth) {
436 desc->pending = 0;
437 desc->chip->unmask(irq);
438 }
439
440 __do_irq(irq, action, regs);
441 } while (desc->pending && !desc->disable_depth);
442
443 desc->running = 0;
444
445 /*
446 * If we were disabled or freed, shut down the handler.
447 */
448 if (likely(desc->action && !check_irq_lock(desc, irq, regs)))
449 return;
450
451 running:
452 /*
453 * We got another IRQ while this one was masked or
454 * currently running. Delay it.
455 */
456 desc->pending = 1;
457 desc->chip->mask(irq);
458 desc->chip->ack(irq);
459}
460
461/*
462 * Level-based IRQ handler. Nice and simple.
463 */
464void
465do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
466{
467 struct irqaction *action;
468 const unsigned int cpu = smp_processor_id();
469
470 desc->triggered = 1;
471
472 /*
473 * Acknowledge, clear _AND_ disable the interrupt.
474 */
475 desc->chip->ack(irq);
476
477 if (likely(!desc->disable_depth)) {
478 kstat_cpu(cpu).irqs[irq]++;
479
480 smp_set_running(desc);
481
482 /*
483 * Return with this interrupt masked if no action
484 */
485 action = desc->action;
486 if (action) {
487 int ret = __do_irq(irq, desc->action, regs);
488
489 if (ret != IRQ_HANDLED)
490 report_bad_irq(irq, regs, desc, ret);
491
492 if (likely(!desc->disable_depth &&
493 !check_irq_lock(desc, irq, regs)))
494 desc->chip->unmask(irq);
495 }
496
497 smp_clear_running(desc);
498 }
499}
500
501static void do_pending_irqs(struct pt_regs *regs)
502{
503 struct list_head head, *l, *n;
504
505 do {
506 struct irqdesc *desc;
507
508 /*
509 * First, take the pending interrupts off the list.
510 * The act of calling the handlers may add some IRQs
511 * back onto the list.
512 */
513 head = irq_pending;
514 INIT_LIST_HEAD(&irq_pending);
515 head.next->prev = &head;
516 head.prev->next = &head;
517
518 /*
519 * Now run each entry. We must delete it from our
520 * list before calling the handler.
521 */
522 list_for_each_safe(l, n, &head) {
523 desc = list_entry(l, struct irqdesc, pend);
524 list_del_init(&desc->pend);
525 desc_handle_irq(desc - irq_desc, desc, regs);
526 }
527
528 /*
529 * The list must be empty.
530 */
531 BUG_ON(!list_empty(&head));
532 } while (!list_empty(&irq_pending));
533}
534 105
535/* 106/*
536 * do_IRQ handles all hardware IRQ's. Decoded IRQs should not 107 * do_IRQ handles all hardware IRQ's. Decoded IRQs should not
@@ -549,96 +120,15 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
549 desc = &bad_irq_desc; 120 desc = &bad_irq_desc;
550 121
551 irq_enter(); 122 irq_enter();
552 spin_lock(&irq_controller_lock);
553 desc_handle_irq(irq, desc, regs);
554 123
555 /* 124 desc_handle_irq(irq, desc, regs);
556 * Now re-run any pending interrupts.
557 */
558 if (!list_empty(&irq_pending))
559 do_pending_irqs(regs);
560 125
126 /* AT91 specific workaround */
561 irq_finish(irq); 127 irq_finish(irq);
562 128
563 spin_unlock(&irq_controller_lock);
564 irq_exit(); 129 irq_exit();
565} 130}
566 131
567void __set_irq_handler(unsigned int irq, irq_handler_t handle, int is_chained)
568{
569 struct irqdesc *desc;
570 unsigned long flags;
571
572 if (irq >= NR_IRQS) {
573 printk(KERN_ERR "Trying to install handler for IRQ%d\n", irq);
574 return;
575 }
576
577 if (handle == NULL)
578 handle = do_bad_IRQ;
579
580 desc = irq_desc + irq;
581
582 if (is_chained && desc->chip == &bad_chip)
583 printk(KERN_WARNING "Trying to install chained handler for IRQ%d\n", irq);
584
585 spin_lock_irqsave(&irq_controller_lock, flags);
586 if (handle == do_bad_IRQ) {
587 desc->chip->mask(irq);
588 desc->chip->ack(irq);
589 desc->disable_depth = 1;
590 }
591 desc->handle = handle;
592 if (handle != do_bad_IRQ && is_chained) {
593 desc->valid = 0;
594 desc->probe_ok = 0;
595 desc->disable_depth = 0;
596 desc->chip->unmask(irq);
597 }
598 spin_unlock_irqrestore(&irq_controller_lock, flags);
599}
600
601void set_irq_chip(unsigned int irq, struct irqchip *chip)
602{
603 struct irqdesc *desc;
604 unsigned long flags;
605
606 if (irq >= NR_IRQS) {
607 printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq);
608 return;
609 }
610
611 if (chip == NULL)
612 chip = &bad_chip;
613
614 desc = irq_desc + irq;
615 spin_lock_irqsave(&irq_controller_lock, flags);
616 desc->chip = chip;
617 spin_unlock_irqrestore(&irq_controller_lock, flags);
618}
619
620int set_irq_type(unsigned int irq, unsigned int type)
621{
622 struct irqdesc *desc;
623 unsigned long flags;
624 int ret = -ENXIO;
625
626 if (irq >= NR_IRQS) {
627 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
628 return -ENODEV;
629 }
630
631 desc = irq_desc + irq;
632 if (desc->chip->set_type) {
633 spin_lock_irqsave(&irq_controller_lock, flags);
634 ret = desc->chip->set_type(irq, type);
635 spin_unlock_irqrestore(&irq_controller_lock, flags);
636 }
637
638 return ret;
639}
640EXPORT_SYMBOL(set_irq_type);
641
642void set_irq_flags(unsigned int irq, unsigned int iflags) 132void set_irq_flags(unsigned int irq, unsigned int iflags)
643{ 133{
644 struct irqdesc *desc; 134 struct irqdesc *desc;
@@ -650,421 +140,32 @@ void set_irq_flags(unsigned int irq, unsigned int iflags)
650 } 140 }
651 141
652 desc = irq_desc + irq; 142 desc = irq_desc + irq;
653 spin_lock_irqsave(&irq_controller_lock, flags); 143 spin_lock_irqsave(&desc->lock, flags);
654 desc->valid = (iflags & IRQF_VALID) != 0; 144 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
655 desc->probe_ok = (iflags & IRQF_PROBE) != 0; 145 if (iflags & IRQF_VALID)
656 desc->noautoenable = (iflags & IRQF_NOAUTOEN) != 0; 146 desc->status &= ~IRQ_NOREQUEST;
657 spin_unlock_irqrestore(&irq_controller_lock, flags); 147 if (iflags & IRQF_PROBE)
658} 148 desc->status &= ~IRQ_NOPROBE;
659 149 if (!(iflags & IRQF_NOAUTOEN))
660int setup_irq(unsigned int irq, struct irqaction *new) 150 desc->status &= ~IRQ_NOAUTOEN;
661{ 151 spin_unlock_irqrestore(&desc->lock, flags);
662 int shared = 0;
663 struct irqaction *old, **p;
664 unsigned long flags;
665 struct irqdesc *desc;
666
667 /*
668 * Some drivers like serial.c use request_irq() heavily,
669 * so we have to be careful not to interfere with a
670 * running system.
671 */
672 if (new->flags & SA_SAMPLE_RANDOM) {
673 /*
674 * This function might sleep, we want to call it first,
675 * outside of the atomic block.
676 * Yes, this might clear the entropy pool if the wrong
677 * driver is attempted to be loaded, without actually
678 * installing a new handler, but is this really a problem,
679 * only the sysadmin is able to do this.
680 */
681 rand_initialize_irq(irq);
682 }
683
684 /*
685 * The following block of code has to be executed atomically
686 */
687 desc = irq_desc + irq;
688 spin_lock_irqsave(&irq_controller_lock, flags);
689 p = &desc->action;
690 if ((old = *p) != NULL) {
691 /*
692 * Can't share interrupts unless both agree to and are
693 * the same type.
694 */
695 if (!(old->flags & new->flags & SA_SHIRQ) ||
696 (~old->flags & new->flags) & SA_TRIGGER_MASK) {
697 spin_unlock_irqrestore(&irq_controller_lock, flags);
698 return -EBUSY;
699 }
700
701 /* add new interrupt at end of irq queue */
702 do {
703 p = &old->next;
704 old = *p;
705 } while (old);
706 shared = 1;
707 }
708
709 *p = new;
710
711 if (!shared) {
712 desc->probing = 0;
713 desc->running = 0;
714 desc->pending = 0;
715 desc->disable_depth = 1;
716
717 if (new->flags & SA_TRIGGER_MASK &&
718 desc->chip->set_type) {
719 unsigned int type = new->flags & SA_TRIGGER_MASK;
720 desc->chip->set_type(irq, type);
721 }
722
723 if (!desc->noautoenable) {
724 desc->disable_depth = 0;
725 desc->chip->unmask(irq);
726 }
727 }
728
729 spin_unlock_irqrestore(&irq_controller_lock, flags);
730 return 0;
731}
732
733/**
734 * request_irq - allocate an interrupt line
735 * @irq: Interrupt line to allocate
736 * @handler: Function to be called when the IRQ occurs
737 * @irqflags: Interrupt type flags
738 * @devname: An ascii name for the claiming device
739 * @dev_id: A cookie passed back to the handler function
740 *
741 * This call allocates interrupt resources and enables the
742 * interrupt line and IRQ handling. From the point this
743 * call is made your handler function may be invoked. Since
744 * your handler function must clear any interrupt the board
745 * raises, you must take care both to initialise your hardware
746 * and to set up the interrupt handler in the right order.
747 *
748 * Dev_id must be globally unique. Normally the address of the
749 * device data structure is used as the cookie. Since the handler
750 * receives this value it makes sense to use it.
751 *
752 * If your interrupt is shared you must pass a non NULL dev_id
753 * as this is required when freeing the interrupt.
754 *
755 * Flags:
756 *
757 * SA_SHIRQ Interrupt is shared
758 *
759 * SA_INTERRUPT Disable local interrupts while processing
760 *
761 * SA_SAMPLE_RANDOM The interrupt can be used for entropy
762 *
763 */
764int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *),
765 unsigned long irq_flags, const char * devname, void *dev_id)
766{
767 unsigned long retval;
768 struct irqaction *action;
769
770 if (irq >= NR_IRQS || !irq_desc[irq].valid || !handler ||
771 (irq_flags & SA_SHIRQ && !dev_id))
772 return -EINVAL;
773
774 action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL);
775 if (!action)
776 return -ENOMEM;
777
778 action->handler = handler;
779 action->flags = irq_flags;
780 cpus_clear(action->mask);
781 action->name = devname;
782 action->next = NULL;
783 action->dev_id = dev_id;
784
785 retval = setup_irq(irq, action);
786
787 if (retval)
788 kfree(action);
789 return retval;
790}
791
792EXPORT_SYMBOL(request_irq);
793
794/**
795 * free_irq - free an interrupt
796 * @irq: Interrupt line to free
797 * @dev_id: Device identity to free
798 *
799 * Remove an interrupt handler. The handler is removed and if the
800 * interrupt line is no longer in use by any driver it is disabled.
801 * On a shared IRQ the caller must ensure the interrupt is disabled
802 * on the card it drives before calling this function.
803 *
804 * This function must not be called from interrupt context.
805 */
806void free_irq(unsigned int irq, void *dev_id)
807{
808 struct irqaction * action, **p;
809 unsigned long flags;
810
811 if (irq >= NR_IRQS || !irq_desc[irq].valid) {
812 printk(KERN_ERR "Trying to free IRQ%d\n",irq);
813 dump_stack();
814 return;
815 }
816
817 spin_lock_irqsave(&irq_controller_lock, flags);
818 for (p = &irq_desc[irq].action; (action = *p) != NULL; p = &action->next) {
819 if (action->dev_id != dev_id)
820 continue;
821
822 /* Found it - now free it */
823 *p = action->next;
824 break;
825 }
826 spin_unlock_irqrestore(&irq_controller_lock, flags);
827
828 if (!action) {
829 printk(KERN_ERR "Trying to free free IRQ%d\n",irq);
830 dump_stack();
831 } else {
832 synchronize_irq(irq);
833 kfree(action);
834 }
835}
836
837EXPORT_SYMBOL(free_irq);
838
839static DECLARE_MUTEX(probe_sem);
840
841/* Start the interrupt probing. Unlike other architectures,
842 * we don't return a mask of interrupts from probe_irq_on,
843 * but return the number of interrupts enabled for the probe.
844 * The interrupts which have been enabled for probing is
845 * instead recorded in the irq_desc structure.
846 */
847unsigned long probe_irq_on(void)
848{
849 unsigned int i, irqs = 0;
850 unsigned long delay;
851
852 down(&probe_sem);
853
854 /*
855 * first snaffle up any unassigned but
856 * probe-able interrupts
857 */
858 spin_lock_irq(&irq_controller_lock);
859 for (i = 0; i < NR_IRQS; i++) {
860 if (!irq_desc[i].probe_ok || irq_desc[i].action)
861 continue;
862
863 irq_desc[i].probing = 1;
864 irq_desc[i].triggered = 0;
865 if (irq_desc[i].chip->set_type)
866 irq_desc[i].chip->set_type(i, IRQT_PROBE);
867 irq_desc[i].chip->unmask(i);
868 irqs += 1;
869 }
870 spin_unlock_irq(&irq_controller_lock);
871
872 /*
873 * wait for spurious interrupts to mask themselves out again
874 */
875 for (delay = jiffies + HZ/10; time_before(jiffies, delay); )
876 /* min 100ms delay */;
877
878 /*
879 * now filter out any obviously spurious interrupts
880 */
881 spin_lock_irq(&irq_controller_lock);
882 for (i = 0; i < NR_IRQS; i++) {
883 if (irq_desc[i].probing && irq_desc[i].triggered) {
884 irq_desc[i].probing = 0;
885 irqs -= 1;
886 }
887 }
888 spin_unlock_irq(&irq_controller_lock);
889
890 return irqs;
891}
892
893EXPORT_SYMBOL(probe_irq_on);
894
895unsigned int probe_irq_mask(unsigned long irqs)
896{
897 unsigned int mask = 0, i;
898
899 spin_lock_irq(&irq_controller_lock);
900 for (i = 0; i < 16 && i < NR_IRQS; i++)
901 if (irq_desc[i].probing && irq_desc[i].triggered)
902 mask |= 1 << i;
903 spin_unlock_irq(&irq_controller_lock);
904
905 up(&probe_sem);
906
907 return mask;
908}
909EXPORT_SYMBOL(probe_irq_mask);
910
911/*
912 * Possible return values:
913 * >= 0 - interrupt number
914 * -1 - no interrupt/many interrupts
915 */
916int probe_irq_off(unsigned long irqs)
917{
918 unsigned int i;
919 int irq_found = NO_IRQ;
920
921 /*
922 * look at the interrupts, and find exactly one
923 * that we were probing has been triggered
924 */
925 spin_lock_irq(&irq_controller_lock);
926 for (i = 0; i < NR_IRQS; i++) {
927 if (irq_desc[i].probing &&
928 irq_desc[i].triggered) {
929 if (irq_found != NO_IRQ) {
930 irq_found = NO_IRQ;
931 goto out;
932 }
933 irq_found = i;
934 }
935 }
936
937 if (irq_found == -1)
938 irq_found = NO_IRQ;
939out:
940 spin_unlock_irq(&irq_controller_lock);
941
942 up(&probe_sem);
943
944 return irq_found;
945}
946
947EXPORT_SYMBOL(probe_irq_off);
948
949#ifdef CONFIG_SMP
950static void route_irq(struct irqdesc *desc, unsigned int irq, unsigned int cpu)
951{
952 pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu);
953
954 spin_lock_irq(&irq_controller_lock);
955 desc->cpu = cpu;
956 desc->chip->set_cpu(desc, irq, cpu);
957 spin_unlock_irq(&irq_controller_lock);
958}
959
960#ifdef CONFIG_PROC_FS
961static int
962irq_affinity_read_proc(char *page, char **start, off_t off, int count,
963 int *eof, void *data)
964{
965 struct irqdesc *desc = irq_desc + ((int)data);
966 int len = cpumask_scnprintf(page, count, desc->affinity);
967
968 if (count - len < 2)
969 return -EINVAL;
970 page[len++] = '\n';
971 page[len] = '\0';
972
973 return len;
974}
975
976static int
977irq_affinity_write_proc(struct file *file, const char __user *buffer,
978 unsigned long count, void *data)
979{
980 unsigned int irq = (unsigned int)data;
981 struct irqdesc *desc = irq_desc + irq;
982 cpumask_t affinity, tmp;
983 int ret = -EIO;
984
985 if (!desc->chip->set_cpu)
986 goto out;
987
988 ret = cpumask_parse(buffer, count, affinity);
989 if (ret)
990 goto out;
991
992 cpus_and(tmp, affinity, cpu_online_map);
993 if (cpus_empty(tmp)) {
994 ret = -EINVAL;
995 goto out;
996 }
997
998 desc->affinity = affinity;
999 route_irq(desc, irq, first_cpu(tmp));
1000 ret = count;
1001
1002 out:
1003 return ret;
1004}
1005#endif
1006#endif
1007
1008void __init init_irq_proc(void)
1009{
1010#if defined(CONFIG_SMP) && defined(CONFIG_PROC_FS)
1011 struct proc_dir_entry *dir;
1012 int irq;
1013
1014 dir = proc_mkdir("irq", NULL);
1015 if (!dir)
1016 return;
1017
1018 for (irq = 0; irq < NR_IRQS; irq++) {
1019 struct proc_dir_entry *entry;
1020 struct irqdesc *desc;
1021 char name[16];
1022
1023 desc = irq_desc + irq;
1024 memset(name, 0, sizeof(name));
1025 snprintf(name, sizeof(name) - 1, "%u", irq);
1026
1027 desc->procdir = proc_mkdir(name, dir);
1028 if (!desc->procdir)
1029 continue;
1030
1031 entry = create_proc_entry("smp_affinity", 0600, desc->procdir);
1032 if (entry) {
1033 entry->nlink = 1;
1034 entry->data = (void *)irq;
1035 entry->read_proc = irq_affinity_read_proc;
1036 entry->write_proc = irq_affinity_write_proc;
1037 }
1038 }
1039#endif
1040} 152}
1041 153
1042void __init init_IRQ(void) 154void __init init_IRQ(void)
1043{ 155{
1044 struct irqdesc *desc;
1045 int irq; 156 int irq;
1046 157
158 for (irq = 0; irq < NR_IRQS; irq++)
159 irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_DELAYED_DISABLE |
160 IRQ_NOPROBE;
161
1047#ifdef CONFIG_SMP 162#ifdef CONFIG_SMP
1048 bad_irq_desc.affinity = CPU_MASK_ALL; 163 bad_irq_desc.affinity = CPU_MASK_ALL;
1049 bad_irq_desc.cpu = smp_processor_id(); 164 bad_irq_desc.cpu = smp_processor_id();
1050#endif 165#endif
1051
1052 for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) {
1053 *desc = bad_irq_desc;
1054 INIT_LIST_HEAD(&desc->pend);
1055 }
1056
1057 init_arch_irq(); 166 init_arch_irq();
1058} 167}
1059 168
1060static int __init noirqdebug_setup(char *str)
1061{
1062 noirqdebug = 1;
1063 return 1;
1064}
1065
1066__setup("noirqdebug", noirqdebug_setup);
1067
1068#ifdef CONFIG_HOTPLUG_CPU 169#ifdef CONFIG_HOTPLUG_CPU
1069/* 170/*
1070 * The CPU has been marked offline. Migrate IRQs off this CPU. If 171 * The CPU has been marked offline. Migrate IRQs off this CPU. If
diff --git a/arch/arm/kernel/iwmmxt-notifier.c b/arch/arm/kernel/iwmmxt-notifier.c
new file mode 100644
index 000000000000..44a86c33796e
--- /dev/null
+++ b/arch/arm/kernel/iwmmxt-notifier.c
@@ -0,0 +1,64 @@
1/*
2 * linux/arch/arm/kernel/iwmmxt-notifier.c
3 *
4 * XScale iWMMXt (Concan) context switching and handling
5 *
6 * Initial code:
7 * Copyright (c) 2003, Intel Corporation
8 *
9 * Full lazy switching support, optimizations and more, by Nicolas Pitre
10 * Copyright (c) 2003-2004, MontaVista Software, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#include <linux/module.h>
18#include <linux/config.h>
19#include <linux/types.h>
20#include <linux/kernel.h>
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/init.h>
24#include <asm/thread_notify.h>
25#include <asm/io.h>
26
27static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
28{
29 struct thread_info *thread = t;
30
31 switch (cmd) {
32 case THREAD_NOTIFY_FLUSH:
33 /*
34 * flush_thread() zeroes thread->fpstate, so no need
35 * to do anything here.
36 *
37 * FALLTHROUGH: Ensure we don't try to overwrite our newly
38 * initialised state information on the first fault.
39 */
40
41 case THREAD_NOTIFY_RELEASE:
42 iwmmxt_task_release(thread);
43 break;
44
45 case THREAD_NOTIFY_SWITCH:
46 iwmmxt_task_switch(thread);
47 break;
48 }
49
50 return NOTIFY_DONE;
51}
52
53static struct notifier_block iwmmxt_notifier_block = {
54 .notifier_call = iwmmxt_do,
55};
56
57static int __init iwmmxt_init(void)
58{
59 thread_register_notifier(&iwmmxt_notifier_block);
60
61 return 0;
62}
63
64late_initcall(iwmmxt_init);
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index a3bae95e536c..b63b528f22a6 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -271,30 +271,27 @@ ENTRY(iwmmxt_task_restore)
271/* 271/*
272 * Concan handling on task switch 272 * Concan handling on task switch
273 * 273 *
274 * r0 = previous task_struct pointer (must be preserved) 274 * r0 = next thread_info pointer
275 * r1 = previous thread_info pointer
276 * r2 = next thread_info pointer (must be preserved)
277 * 275 *
278 * Called only from __switch_to with task preemption disabled. 276 * Called only from the iwmmxt notifier with task preemption disabled.
279 * No need to care about preserving r4 and above.
280 */ 277 */
281ENTRY(iwmmxt_task_switch) 278ENTRY(iwmmxt_task_switch)
282 279
283 mrc p15, 0, r4, c15, c1, 0 280 mrc p15, 0, r1, c15, c1, 0
284 tst r4, #0x3 @ CP0 and CP1 accessible? 281 tst r1, #0x3 @ CP0 and CP1 accessible?
285 bne 1f @ yes: block them for next task 282 bne 1f @ yes: block them for next task
286 283
287 ldr r5, =concan_owner 284 ldr r2, =concan_owner
288 add r6, r2, #TI_IWMMXT_STATE @ get next task Concan save area 285 add r3, r0, #TI_IWMMXT_STATE @ get next task Concan save area
289 ldr r5, [r5] @ get current Concan owner 286 ldr r2, [r2] @ get current Concan owner
290 teq r5, r6 @ next task owns it? 287 teq r2, r3 @ next task owns it?
291 movne pc, lr @ no: leave Concan disabled 288 movne pc, lr @ no: leave Concan disabled
292 289
2931: eor r4, r4, #3 @ flip Concan access 2901: eor r1, r1, #3 @ flip Concan access
294 mcr p15, 0, r4, c15, c1, 0 291 mcr p15, 0, r1, c15, c1, 0
295 292
296 mrc p15, 0, r4, c2, c0, 0 293 mrc p15, 0, r1, c2, c0, 0
297 sub pc, lr, r4, lsr #32 @ cpwait and return 294 sub pc, lr, r1, lsr #32 @ cpwait and return
298 295
299/* 296/*
300 * Remove Concan ownership of given task 297 * Remove Concan ownership of given task
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index c3258b763c5d..3079535afccd 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -352,9 +352,6 @@ void flush_thread(void)
352 memset(&thread->fpstate, 0, sizeof(union fp_state)); 352 memset(&thread->fpstate, 0, sizeof(union fp_state));
353 353
354 thread_notify(THREAD_NOTIFY_FLUSH, thread); 354 thread_notify(THREAD_NOTIFY_FLUSH, thread);
355#if defined(CONFIG_IWMMXT)
356 iwmmxt_task_release(thread);
357#endif
358} 355}
359 356
360void release_thread(struct task_struct *dead_task) 357void release_thread(struct task_struct *dead_task)
@@ -362,9 +359,6 @@ void release_thread(struct task_struct *dead_task)
362 struct thread_info *thread = task_thread_info(dead_task); 359 struct thread_info *thread = task_thread_info(dead_task);
363 360
364 thread_notify(THREAD_NOTIFY_RELEASE, thread); 361 thread_notify(THREAD_NOTIFY_RELEASE, thread);
365#if defined(CONFIG_IWMMXT)
366 iwmmxt_task_release(thread);
367#endif
368} 362}
369 363
370asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); 364asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7447a1987322..ed1c4d62d999 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -344,9 +344,9 @@ static void __init setup_processor(void)
344 cpu_cache = *list->cache; 344 cpu_cache = *list->cache;
345#endif 345#endif
346 346
347 printk("CPU: %s [%08x] revision %d (ARMv%s)\n", 347 printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
348 cpu_name, processor_id, (int)processor_id & 15, 348 cpu_name, processor_id, (int)processor_id & 15,
349 proc_arch[cpu_architecture()]); 349 proc_arch[cpu_architecture()], cr_alignment);
350 350
351 sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS); 351 sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS);
352 sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); 352 sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index aa01d6753d6e..baa997c857dc 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -142,7 +142,7 @@ aaec2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
142 142
143static struct irqaction aaec2000_timer_irq = { 143static struct irqaction aaec2000_timer_irq = {
144 .name = "AAEC-2000 Timer Tick", 144 .name = "AAEC-2000 Timer Tick",
145 .flags = SA_INTERRUPT | SA_TIMER, 145 .flags = IRQF_DISABLED | IRQF_TIMER,
146 .handler = aaec2000_timer_interrupt, 146 .handler = aaec2000_timer_interrupt,
147}; 147};
148 148
diff --git a/arch/arm/mach-at91rm9200/Kconfig b/arch/arm/mach-at91rm9200/Kconfig
index 70d402f76ce5..2f85e8693b1b 100644
--- a/arch/arm/mach-at91rm9200/Kconfig
+++ b/arch/arm/mach-at91rm9200/Kconfig
@@ -1,6 +1,21 @@
1if ARCH_AT91RM9200 1if ARCH_AT91
2
3menu "Atmel AT91 System-on-Chip"
4
5comment "Atmel AT91 Processors"
6
7config ARCH_AT91RM9200
8 bool "AT91RM9200"
2 9
3menu "AT91RM9200 Implementations" 10config ARCH_AT91SAM9260
11 bool "AT91SAM9260"
12
13config ARCH_AT91SAM9261
14 bool "AT91SAM9261"
15
16# ----------------------------------------------------------
17
18if ARCH_AT91RM9200
4 19
5comment "AT91RM9200 Board Type" 20comment "AT91RM9200 Board Type"
6 21
@@ -8,58 +23,87 @@ config MACH_ONEARM
8 bool "Ajeco 1ARM Single Board Computer" 23 bool "Ajeco 1ARM Single Board Computer"
9 depends on ARCH_AT91RM9200 24 depends on ARCH_AT91RM9200
10 help 25 help
11 Select this if you are using Ajeco's 1ARM Single Board Computer 26 Select this if you are using Ajeco's 1ARM Single Board Computer.
27 <http://www.ajeco.fi/products.htm>
12 28
13config ARCH_AT91RM9200DK 29config ARCH_AT91RM9200DK
14 bool "Atmel AT91RM9200-DK Development board" 30 bool "Atmel AT91RM9200-DK Development board"
15 depends on ARCH_AT91RM9200 31 depends on ARCH_AT91RM9200
16 help 32 help
17 Select this if you are using Atmel's AT91RM9200-DK Development board 33 Select this if you are using Atmel's AT91RM9200-DK Development board.
34 (Discontinued)
35
18 36
19config MACH_AT91RM9200EK 37config MACH_AT91RM9200EK
20 bool "Atmel AT91RM9200-EK Evaluation Kit" 38 bool "Atmel AT91RM9200-EK Evaluation Kit"
21 depends on ARCH_AT91RM9200 39 depends on ARCH_AT91RM9200
22 help 40 help
23 Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit 41 Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit.
42 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507>
24 43
25config MACH_CSB337 44config MACH_CSB337
26 bool "Cogent CSB337 board" 45 bool "Cogent CSB337"
27 depends on ARCH_AT91RM9200 46 depends on ARCH_AT91RM9200
28 help 47 help
29 Select this if you are using Cogent's CSB337 board 48 Select this if you are using Cogent's CSB337 board.
49 <http://www.cogcomp.com/csb_csb337.htm>
30 50
31config MACH_CSB637 51config MACH_CSB637
32 bool "Cogent CSB637 board" 52 bool "Cogent CSB637"
33 depends on ARCH_AT91RM9200 53 depends on ARCH_AT91RM9200
34 help 54 help
35 Select this if you are using Cogent's CSB637 board 55 Select this if you are using Cogent's CSB637 board.
56 <http://www.cogcomp.com/csb_csb637.htm>
36 57
37config MACH_CARMEVA 58config MACH_CARMEVA
38 bool "Conitec's ARM&EVA" 59 bool "Conitec ARM&EVA"
39 depends on ARCH_AT91RM9200 60 depends on ARCH_AT91RM9200
40 help 61 help
41 Select this if you are using Conitec's AT91RM9200-MCU-Module 62 Select this if you are using Conitec's AT91RM9200-MCU-Module.
63 <http://www.conitec.net/english/linuxboard.htm>
42 64
43config MACH_KB9200 65config MACH_ATEB9200
44 bool "KwikByte's KB920x" 66 bool "Embest ATEB9200"
45 depends on ARCH_AT91RM9200 67 depends on ARCH_AT91RM9200
46 help 68 help
47 Select this if you are using KwikByte's KB920x board 69 Select this if you are using Embest's ATEB9200 board.
70 <http://www.embedinfo.com/english/product/ATEB9200.asp>
48 71
49config MACH_ATEB9200 72config MACH_KB9200
50 bool "Embest's ATEB9200" 73 bool "KwikByte KB920x"
51 depends on ARCH_AT91RM9200 74 depends on ARCH_AT91RM9200
52 help 75 help
53 Select this if you are using Embest's ATEB9200 board 76 Select this if you are using KwikByte's KB920x board.
77 <http://kwikbyte.com/KB9202_description_new.htm>
54 78
55config MACH_KAFA 79config MACH_KAFA
56 bool "Sperry-Sun KAFA board" 80 bool "Sperry-Sun KAFA board"
57 depends on ARCH_AT91RM9200 81 depends on ARCH_AT91RM9200
58 help 82 help
59 Select this if you are using Sperry-Sun's KAFA board 83 Select this if you are using Sperry-Sun's KAFA board.
84
85endif
86
87# ----------------------------------------------------------
88
89if ARCH_AT91SAM9260
90
91comment "AT91SAM9260 Board Type"
92
93endif
94
95# ----------------------------------------------------------
96
97if ARCH_AT91SAM9261
98
99comment "AT91SAM9261 Board Type"
100
101endif
102
60 103
104# ----------------------------------------------------------
61 105
62comment "AT91RM9200 Feature Selections" 106comment "AT91 Feature Selections"
63 107
64config AT91_PROGRAMMABLE_CLOCKS 108config AT91_PROGRAMMABLE_CLOCKS
65 bool "Programmable Clocks" 109 bool "Programmable Clocks"
diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91rm9200/Makefile
index 82db957322df..c174805c24e5 100644
--- a/arch/arm/mach-at91rm9200/Makefile
+++ b/arch/arm/mach-at91rm9200/Makefile
@@ -2,14 +2,19 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := clock.o irq.o time.o gpio.o common.o devices.o 5obj-y := clock.o irq.o gpio.o devices.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
9 9
10obj-$(CONFIG_PM) += pm.o 10obj-$(CONFIG_PM) += pm.o
11 11
12# Board-specific support 12# CPU-specific support
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o
14obj-$(CONFIG_ARCH_AT91SAM9260) +=
15obj-$(CONFIG_ARCH_AT91SAM9261) +=
16
17# AT91RM9200 Board-specific support
13obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 18obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
14obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o 19obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
15obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o 20obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
@@ -20,6 +25,10 @@ obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
20obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o 25obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
21obj-$(CONFIG_MACH_KAFA) += board-kafa.o 26obj-$(CONFIG_MACH_KAFA) += board-kafa.o
22 27
28# AT91SAM9260 board-specific support
29
30# AT91SAM9261 board-specific support
31
23# LEDs support 32# LEDs support
24led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o 33led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
25led-$(CONFIG_MACH_AT91RM9200EK) += leds.o 34led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
diff --git a/arch/arm/mach-at91rm9200/common.c b/arch/arm/mach-at91rm9200/at91rm9200.c
index cc55f4c28d95..7e1d072bdd80 100644
--- a/arch/arm/mach-at91rm9200/common.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/common.c 2 * arch/arm/mach-at91rm9200/at91rm9200.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
diff --git a/arch/arm/mach-at91rm9200/time.c b/arch/arm/mach-at91rm9200/at91rm9200_time.c
index f2f080350ccb..a92a8622c78a 100644
--- a/arch/arm/mach-at91rm9200/time.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200_time.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/time.c 2 * linux/arch/arm/mach-at91rm9200/at91rm9200_time.c
3 * 3 *
4 * Copyright (C) 2003 SAN People 4 * Copyright (C) 2003 SAN People
5 * Copyright (C) 2003 ATMEL 5 * Copyright (C) 2003 ATMEL
@@ -21,13 +21,13 @@
21 21
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h>
24#include <linux/kernel.h> 25#include <linux/kernel.h>
25#include <linux/sched.h> 26#include <linux/sched.h>
26#include <linux/time.h> 27#include <linux/time.h>
27 28
28#include <asm/hardware.h> 29#include <asm/hardware.h>
29#include <asm/io.h> 30#include <asm/io.h>
30#include <asm/irq.h>
31#include <asm/mach/time.h> 31#include <asm/mach/time.h>
32 32
33static unsigned long last_crtr; 33static unsigned long last_crtr;
@@ -85,7 +85,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_r
85 85
86static struct irqaction at91rm9200_timer_irq = { 86static struct irqaction at91rm9200_timer_irq = {
87 .name = "at91_tick", 87 .name = "at91_tick",
88 .flags = SA_SHIRQ | SA_INTERRUPT | SA_TIMER, 88 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER,
89 .handler = at91rm9200_timer_interrupt 89 .handler = at91rm9200_timer_interrupt
90}; 90};
91 91
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index 83c34747087b..5783c282ae7b 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -10,12 +10,13 @@
10 */ 10 */
11 11
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
13#include <linux/kernel.h> 15#include <linux/kernel.h>
14#include <linux/list.h> 16#include <linux/list.h>
15#include <linux/module.h> 17#include <linux/module.h>
16 18
17#include <asm/io.h> 19#include <asm/io.h>
18#include <asm/mach/irq.h>
19#include <asm/hardware.h> 20#include <asm/hardware.h>
20#include <asm/arch/gpio.h> 21#include <asm/arch/gpio.h>
21 22
@@ -340,7 +341,7 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
340 void __iomem *pio; 341 void __iomem *pio;
341 u32 isr; 342 u32 isr;
342 343
343 pio = desc->base; 344 pio = get_irq_chip_data(irq);
344 345
345 /* temporarily mask (level sensitive) parent IRQ */ 346 /* temporarily mask (level sensitive) parent IRQ */
346 desc->chip->ack(irq); 347 desc->chip->ack(irq);
@@ -350,12 +351,12 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
350 if (!isr) 351 if (!isr)
351 break; 352 break;
352 353
353 pin = (unsigned) desc->data; 354 pin = (unsigned) get_irq_data(irq);
354 gpio = &irq_desc[pin]; 355 gpio = &irq_desc[pin];
355 356
356 while (isr) { 357 while (isr) {
357 if (isr & 1) { 358 if (isr & 1) {
358 if (unlikely(gpio->disable_depth)) { 359 if (unlikely(gpio->depth)) {
359 /* 360 /*
360 * The core ARM interrupt handler lazily disables IRQs so 361 * The core ARM interrupt handler lazily disables IRQs so
361 * another IRQ must be generated before it actually gets 362 * another IRQ must be generated before it actually gets
@@ -364,7 +365,7 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
364 gpio_irq_mask(pin); 365 gpio_irq_mask(pin);
365 } 366 }
366 else 367 else
367 gpio->handle(pin, gpio, regs); 368 desc_handle_irq(pin, gpio, regs);
368 } 369 }
369 pin++; 370 pin++;
370 gpio++; 371 gpio++;
diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c
index 1a23f0dcd4b8..a071eac4a30a 100644
--- a/arch/arm/mach-clps711x/time.c
+++ b/arch/arm/mach-clps711x/time.c
@@ -19,6 +19,7 @@
19#include <linux/timex.h> 19#include <linux/timex.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h>
22#include <linux/sched.h> 23#include <linux/sched.h>
23 24
24#include <asm/hardware.h> 25#include <asm/hardware.h>
@@ -57,7 +58,7 @@ p720t_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
57 58
58static struct irqaction clps711x_timer_irq = { 59static struct irqaction clps711x_timer_irq = {
59 .name = "CLPS711x Timer Tick", 60 .name = "CLPS711x Timer Tick",
60 .flags = SA_INTERRUPT | SA_TIMER, 61 .flags = IRQF_DISABLED | IRQF_TIMER,
61 .handler = p720t_timer_interrupt, 62 .handler = p720t_timer_interrupt,
62}; 63};
63 64
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index 5b12cab0e691..92eaebdd5606 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -9,6 +9,7 @@
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/types.h> 10#include <linux/types.h>
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/irq.h>
12#include <linux/list.h> 13#include <linux/list.h>
13#include <linux/sched.h> 14#include <linux/sched.h>
14#include <linux/init.h> 15#include <linux/init.h>
@@ -315,7 +316,7 @@ clps7500_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
315 316
316static struct irqaction clps7500_timer_irq = { 317static struct irqaction clps7500_timer_irq = {
317 .name = "CLPS7500 Timer Tick", 318 .name = "CLPS7500 Timer Tick",
318 .flags = SA_INTERRUPT | SA_TIMER, 319 .flags = IRQF_DISABLED | IRQF_TIMER,
319 .handler = clps7500_timer_interrupt, 320 .handler = clps7500_timer_interrupt,
320}; 321};
321 322
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 6d620d8268cc..70dd12ef3c40 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -199,7 +199,7 @@ ebsa110_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
199 199
200static struct irqaction ebsa110_timer_irq = { 200static struct irqaction ebsa110_timer_irq = {
201 .name = "EBSA110 Timer Tick", 201 .name = "EBSA110 Timer Tick",
202 .flags = SA_INTERRUPT | SA_TIMER, 202 .flags = IRQF_DISABLED | IRQF_TIMER,
203 .handler = ebsa110_timer_interrupt, 203 .handler = ebsa110_timer_interrupt,
204}; 204};
205 205
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index e15e4c54a253..f1b740083aee 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -9,12 +9,24 @@ config CRUNCH
9 9
10comment "EP93xx Platforms" 10comment "EP93xx Platforms"
11 11
12config MACH_EDB9302
13 bool "Support Cirrus Logic EDB9302"
14 help
15 Say 'Y' here if you want your kernel to support the Cirrus
16 Logic EDB9302 Evaluation Board.
17
12config MACH_EDB9315 18config MACH_EDB9315
13 bool "Support Cirrus Logic EDB9315" 19 bool "Support Cirrus Logic EDB9315"
14 help 20 help
15 Say 'Y' here if you want your kernel to support the Cirrus 21 Say 'Y' here if you want your kernel to support the Cirrus
16 Logic EDB9315 Evaluation Board. 22 Logic EDB9315 Evaluation Board.
17 23
24config MACH_EDB9315A
25 bool "Support Cirrus Logic EDB9315A"
26 help
27 Say 'Y' here if you want your kernel to support the Cirrus
28 Logic EDB9315A Evaluation Board.
29
18config MACH_GESBC9312 30config MACH_GESBC9312
19 bool "Support Glomation GESBC-9312-sx" 31 bool "Support Glomation GESBC-9312-sx"
20 help 32 help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index dfa7e2e8a18b..1f5a6b0487ee 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -6,6 +6,8 @@ obj-m :=
6obj-n := 6obj-n :=
7obj- := 7obj- :=
8 8
9obj-$(CONFIG_MACH_EDB9302) += edb9302.o
9obj-$(CONFIG_MACH_EDB9315) += edb9315.o 10obj-$(CONFIG_MACH_EDB9315) += edb9315.o
11obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o
10obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o 12obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
11obj-$(CONFIG_MACH_TS72XX) += ts72xx.o 13obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 26df3b666b56..a87a784b9201 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -116,7 +116,7 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
116 116
117static struct irqaction ep93xx_timer_irq = { 117static struct irqaction ep93xx_timer_irq = {
118 .name = "ep93xx timer", 118 .name = "ep93xx timer",
119 .flags = SA_INTERRUPT | SA_TIMER, 119 .flags = IRQF_DISABLED | IRQF_TIMER,
120 .handler = ep93xx_timer_interrupt, 120 .handler = ep93xx_timer_interrupt,
121}; 121};
122 122
diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c
new file mode 100644
index 000000000000..62a8efd23256
--- /dev/null
+++ b/arch/arm/mach-ep93xx/edb9302.c
@@ -0,0 +1,62 @@
1/*
2 * arch/arm/mach-ep93xx/edb9302.c
3 * Cirrus Logic EDB9302 support.
4 *
5 * Copyright (C) 2006 George Kashperko <george@chas.com.ua>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/interrupt.h>
19#include <linux/ioport.h>
20#include <linux/mtd/physmap.h>
21#include <linux/platform_device.h>
22#include <asm/io.h>
23#include <asm/hardware.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26
27static struct physmap_flash_data edb9302_flash_data = {
28 .width = 2,
29};
30
31static struct resource edb9302_flash_resource = {
32 .start = 0x60000000,
33 .end = 0x60ffffff,
34 .flags = IORESOURCE_MEM,
35};
36
37static struct platform_device edb9302_flash = {
38 .name = "physmap-flash",
39 .id = 0,
40 .dev = {
41 .platform_data = &edb9302_flash_data,
42 },
43 .num_resources = 1,
44 .resource = &edb9302_flash_resource,
45};
46
47static void __init edb9302_init_machine(void)
48{
49 ep93xx_init_devices();
50 platform_device_register(&edb9302_flash);
51}
52
53MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
54 /* Maintainer: George Kashperko <george@chas.com.ua> */
55 .phys_io = EP93XX_APB_PHYS_BASE,
56 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
57 .boot_params = 0x00000100,
58 .map_io = ep93xx_map_io,
59 .init_irq = ep93xx_init_irq,
60 .timer = &ep93xx_timer,
61 .init_machine = edb9302_init_machine,
62MACHINE_END
diff --git a/arch/arm/mach-ep93xx/edb9315a.c b/arch/arm/mach-ep93xx/edb9315a.c
new file mode 100644
index 000000000000..bfefdaa8f794
--- /dev/null
+++ b/arch/arm/mach-ep93xx/edb9315a.c
@@ -0,0 +1,62 @@
1/*
2 * arch/arm/mach-ep93xx/edb9315a.c
3 * Cirrus Logic EDB9315A support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/interrupt.h>
19#include <linux/ioport.h>
20#include <linux/mtd/physmap.h>
21#include <linux/platform_device.h>
22#include <asm/io.h>
23#include <asm/hardware.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26
27static struct physmap_flash_data edb9315a_flash_data = {
28 .width = 2,
29};
30
31static struct resource edb9315a_flash_resource = {
32 .start = 0x60000000,
33 .end = 0x60ffffff,
34 .flags = IORESOURCE_MEM,
35};
36
37static struct platform_device edb9315a_flash = {
38 .name = "physmap-flash",
39 .id = 0,
40 .dev = {
41 .platform_data = &edb9315a_flash_data,
42 },
43 .num_resources = 1,
44 .resource = &edb9315a_flash_resource,
45};
46
47static void __init edb9315a_init_machine(void)
48{
49 ep93xx_init_devices();
50 platform_device_register(&edb9315a_flash);
51}
52
53MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
54 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
55 .phys_io = EP93XX_APB_PHYS_BASE,
56 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
57 .boot_params = 0xc0000100,
58 .map_io = ep93xx_map_io,
59 .init_irq = ep93xx_init_irq,
60 .timer = &ep93xx_timer,
61 .init_machine = edb9315a_init_machine,
62MACHINE_END
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 14a62d6008fe..2af610811ca4 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -6,6 +6,7 @@
6 */ 6 */
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/interrupt.h> 8#include <linux/interrupt.h>
9#include <linux/irq.h>
9 10
10#include <asm/irq.h> 11#include <asm/irq.h>
11 12
@@ -43,7 +44,7 @@ timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
43static struct irqaction footbridge_timer_irq = { 44static struct irqaction footbridge_timer_irq = {
44 .name = "Timer1 timer tick", 45 .name = "Timer1 timer tick",
45 .handler = timer1_interrupt, 46 .handler = timer1_interrupt,
46 .flags = SA_INTERRUPT | SA_TIMER, 47 .flags = IRQF_DISABLED | IRQF_TIMER,
47}; 48};
48 49
49/* 50/*
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 5dace2597838..607ed1f5b3f8 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -332,15 +332,15 @@ void __init dc21285_preinit(void)
332 /* 332 /*
333 * We don't care if these fail. 333 * We don't care if these fail.
334 */ 334 */
335 request_irq(IRQ_PCI_SERR, dc21285_serr_irq, SA_INTERRUPT, 335 request_irq(IRQ_PCI_SERR, dc21285_serr_irq, IRQF_DISABLED,
336 "PCI system error", &serr_timer); 336 "PCI system error", &serr_timer);
337 request_irq(IRQ_PCI_PERR, dc21285_parity_irq, SA_INTERRUPT, 337 request_irq(IRQ_PCI_PERR, dc21285_parity_irq, IRQF_DISABLED,
338 "PCI parity error", &perr_timer); 338 "PCI parity error", &perr_timer);
339 request_irq(IRQ_PCI_ABORT, dc21285_abort_irq, SA_INTERRUPT, 339 request_irq(IRQ_PCI_ABORT, dc21285_abort_irq, IRQF_DISABLED,
340 "PCI abort", NULL); 340 "PCI abort", NULL);
341 request_irq(IRQ_DISCARD_TIMER, dc21285_discard_irq, SA_INTERRUPT, 341 request_irq(IRQ_DISCARD_TIMER, dc21285_discard_irq, IRQF_DISABLED,
342 "Discard timer", NULL); 342 "Discard timer", NULL);
343 request_irq(IRQ_PCI_DPERR, dc21285_dparity_irq, SA_INTERRUPT, 343 request_irq(IRQ_PCI_DPERR, dc21285_dparity_irq, IRQF_DISABLED,
344 "PCI data parity", NULL); 344 "PCI data parity", NULL);
345 345
346 if (cfn_mode) { 346 if (cfn_mode) {
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index e1c43b331d64..87448c2d6baa 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -98,9 +98,22 @@ isa_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
98 desc_handle_irq(isa_irq, desc, regs); 98 desc_handle_irq(isa_irq, desc, regs);
99} 99}
100 100
101static struct irqaction irq_cascade = { .handler = no_action, .name = "cascade", }; 101static struct irqaction irq_cascade = {
102static struct resource pic1_resource = { "pic1", 0x20, 0x3f }; 102 .handler = no_action,
103static struct resource pic2_resource = { "pic2", 0xa0, 0xbf }; 103 .name = "cascade",
104};
105
106static struct resource pic1_resource = {
107 .name = "pic1",
108 .start = 0x20,
109 .end = 0x3f,
110};
111
112static struct resource pic2_resource = {
113 .name = "pic2",
114 .start = 0xa0,
115 .end = 0xbf,
116};
104 117
105void __init isa_init_irq(unsigned int host_irq) 118void __init isa_init_irq(unsigned int host_irq)
106{ 119{
diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c
index c1d74f7ab669..c4810a40c8e1 100644
--- a/arch/arm/mach-footbridge/isa-timer.c
+++ b/arch/arm/mach-footbridge/isa-timer.c
@@ -6,6 +6,7 @@
6 */ 6 */
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/interrupt.h> 8#include <linux/interrupt.h>
9#include <linux/irq.h>
9 10
10#include <asm/io.h> 11#include <asm/io.h>
11#include <asm/irq.h> 12#include <asm/irq.h>
@@ -72,7 +73,7 @@ isa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
72static struct irqaction isa_timer_irq = { 73static struct irqaction isa_timer_irq = {
73 .name = "ISA timer tick", 74 .name = "ISA timer tick",
74 .handler = isa_timer_interrupt, 75 .handler = isa_timer_interrupt,
75 .flags = SA_INTERRUPT | SA_TIMER, 76 .flags = IRQF_DISABLED | IRQF_TIMER,
76}; 77};
77 78
78static void __init isa_timer_init(void) 79static void __init isa_timer_init(void)
diff --git a/arch/arm/mach-h720x/cpu-h7201.c b/arch/arm/mach-h720x/cpu-h7201.c
index af9e4a5d5ea7..a9a8255a3a03 100644
--- a/arch/arm/mach-h720x/cpu-h7201.c
+++ b/arch/arm/mach-h720x/cpu-h7201.c
@@ -41,7 +41,7 @@ h7201_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
41 41
42static struct irqaction h7201_timer_irq = { 42static struct irqaction h7201_timer_irq = {
43 .name = "h7201 Timer Tick", 43 .name = "h7201 Timer Tick",
44 .flags = SA_INTERRUPT | SA_TIMER, 44 .flags = IRQF_DISABLED | IRQF_TIMER,
45 .handler = h7201_timer_interrupt, 45 .handler = h7201_timer_interrupt,
46}; 46};
47 47
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index a4a7c0125d03..da678d163fd9 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -171,7 +171,7 @@ static struct irqchip h7202_timerx_chip = {
171 171
172static struct irqaction h7202_timer_irq = { 172static struct irqaction h7202_timer_irq = {
173 .name = "h7202 Timer Tick", 173 .name = "h7202 Timer Tick",
174 .flags = SA_INTERRUPT | SA_TIMER, 174 .flags = IRQF_DISABLED | IRQF_TIMER,
175 .handler = h7202_timer_interrupt, 175 .handler = h7202_timer_interrupt,
176}; 176};
177 177
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index 294b1c450f21..6ed7523c65bb 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -12,6 +12,7 @@
12#include <linux/sched.h> 12#include <linux/sched.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/irq.h>
15#include <linux/time.h> 16#include <linux/time.h>
16 17
17#include <asm/hardware.h> 18#include <asm/hardware.h>
@@ -71,7 +72,7 @@ imx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
71 72
72static struct irqaction imx_timer_irq = { 73static struct irqaction imx_timer_irq = {
73 .name = "i.MX Timer Tick", 74 .name = "i.MX Timer Tick",
74 .flags = SA_INTERRUPT | SA_TIMER, 75 .flags = IRQF_DISABLED | IRQF_TIMER,
75 .handler = imx_timer_interrupt, 76 .handler = imx_timer_interrupt,
76}; 77};
77 78
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 576a5e979c00..42021fdfa0c6 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -13,6 +13,7 @@
13#include <linux/device.h> 13#include <linux/device.h>
14#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/irq.h>
16#include <linux/sched.h> 17#include <linux/sched.h>
17#include <linux/smp.h> 18#include <linux/smp.h>
18#include <linux/termios.h> 19#include <linux/termios.h>
@@ -281,7 +282,7 @@ integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
281 282
282static struct irqaction integrator_timer_irq = { 283static struct irqaction integrator_timer_irq = {
283 .name = "Integrator Timer Tick", 284 .name = "Integrator Timer Tick",
284 .flags = SA_INTERRUPT | SA_TIMER, 285 .flags = IRQF_DISABLED | IRQF_TIMER,
285 .handler = integrator_timer_interrupt, 286 .handler = integrator_timer_interrupt,
286}; 287};
287 288
diff --git a/arch/arm/mach-integrator/time.c b/arch/arm/mach-integrator/time.c
index bc07f52a6fd7..ee49cf790dab 100644
--- a/arch/arm/mach-integrator/time.c
+++ b/arch/arm/mach-integrator/time.c
@@ -125,7 +125,7 @@ static int rtc_probe(struct amba_device *dev, void *id)
125 125
126 xtime.tv_sec = __raw_readl(rtc_base + RTC_DR); 126 xtime.tv_sec = __raw_readl(rtc_base + RTC_DR);
127 127
128 ret = request_irq(dev->irq[0], arm_rtc_interrupt, SA_INTERRUPT, 128 ret = request_irq(dev->irq[0], arm_rtc_interrupt, IRQF_DISABLED,
129 "rtc-pl030", dev); 129 "rtc-pl030", dev);
130 if (ret) 130 if (ret)
131 goto map_out; 131 goto map_out;
diff --git a/arch/arm/mach-iop3xx/Kconfig b/arch/arm/mach-iop3xx/Kconfig
index 2bfe8c729f9f..4422f2388607 100644
--- a/arch/arm/mach-iop3xx/Kconfig
+++ b/arch/arm/mach-iop3xx/Kconfig
@@ -30,12 +30,15 @@ config MACH_IQ80332
30 select ARCH_IOP331 30 select ARCH_IOP331
31 help 31 help
32 Say Y here if you want to run your kernel on the Intel IQ80332 32 Say Y here if you want to run your kernel on the Intel IQ80332
33 evaluation kit for the IOP332 chipset 33 evaluation kit for the IOP332 chipset.
34 34
35config ARCH_EP80219 35config ARCH_EP80219
36 bool "Enable support for EP80219" 36 bool "Enable support for EP80219"
37 select ARCH_IOP321 37 select ARCH_IOP321
38 select ARCH_IQ31244 38 select ARCH_IQ31244
39 help
40 Say Y here if you want to run your kernel on the Intel EP80219
41 evaluation kit for the Intel 80219 chipset (a IOP321 variant).
39 42
40# Which IOP variant are we running? 43# Which IOP variant are we running?
41config ARCH_IOP321 44config ARCH_IOP321
@@ -56,8 +59,8 @@ config IOP331_STEPD
56 bool "Chip stepping D of the IOP80331 processor or IOP80333" 59 bool "Chip stepping D of the IOP80331 processor or IOP80333"
57 depends on (ARCH_IOP331) 60 depends on (ARCH_IOP331)
58 help 61 help
59 Say Y here if you have StepD of the IOP80331 or IOP8033 62 Say Y here if you have StepD of the IOP80331 or IOP8033
60 based platforms. 63 based platforms.
61 64
62endmenu 65endmenu
63endif 66endif
diff --git a/arch/arm/mach-iop3xx/iop321-time.c b/arch/arm/mach-iop3xx/iop321-time.c
index d67ac0e5d438..04b1a6f7ebae 100644
--- a/arch/arm/mach-iop3xx/iop321-time.c
+++ b/arch/arm/mach-iop3xx/iop321-time.c
@@ -85,7 +85,7 @@ iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
85static struct irqaction iop321_timer_irq = { 85static struct irqaction iop321_timer_irq = {
86 .name = "IOP321 Timer Tick", 86 .name = "IOP321 Timer Tick",
87 .handler = iop321_timer_interrupt, 87 .handler = iop321_timer_interrupt,
88 .flags = SA_INTERRUPT | SA_TIMER, 88 .flags = IRQF_DISABLED | IRQF_TIMER,
89}; 89};
90 90
91static void __init iop321_timer_init(void) 91static void __init iop321_timer_init(void)
diff --git a/arch/arm/mach-iop3xx/iop331-time.c b/arch/arm/mach-iop3xx/iop331-time.c
index 3c1f0ebbd636..0c09e74c5740 100644
--- a/arch/arm/mach-iop3xx/iop331-time.c
+++ b/arch/arm/mach-iop3xx/iop331-time.c
@@ -82,7 +82,7 @@ iop331_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
82static struct irqaction iop331_timer_irq = { 82static struct irqaction iop331_timer_irq = {
83 .name = "IOP331 Timer Tick", 83 .name = "IOP331 Timer Tick",
84 .handler = iop331_timer_interrupt, 84 .handler = iop331_timer_interrupt,
85 .flags = SA_INTERRUPT | SA_TIMER, 85 .flags = IRQF_DISABLED | IRQF_TIMER,
86}; 86};
87 87
88static void __init iop331_timer_init(void) 88static void __init iop331_timer_init(void)
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 3cfc5aab8259..7f91f689a041 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -19,6 +19,7 @@
19#include <linux/spinlock.h> 19#include <linux/spinlock.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h>
22#include <linux/serial.h> 23#include <linux/serial.h>
23#include <linux/tty.h> 24#include <linux/tty.h>
24#include <linux/bitops.h> 25#include <linux/bitops.h>
@@ -223,7 +224,7 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
223 224
224static struct irqaction ixp2000_timer_irq = { 225static struct irqaction ixp2000_timer_irq = {
225 .name = "IXP2000 Timer Tick", 226 .name = "IXP2000 Timer Tick",
226 .flags = SA_INTERRUPT | SA_TIMER, 227 .flags = IRQF_DISABLED | IRQF_TIMER,
227 .handler = ixp2000_timer_interrupt, 228 .handler = ixp2000_timer_interrupt,
228}; 229};
229 230
@@ -408,7 +409,7 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irqdesc *desc, str
408 for(i = 31; i >= 0; i--) { 409 for(i = 31; i >= 0; i--) {
409 if(status & (1 << i)) { 410 if(status & (1 << i)) {
410 desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i; 411 desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i;
411 desc->handle(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc, regs); 412 desc_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc, regs);
412 } 413 }
413 } 414 }
414} 415}
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 9b8ded259807..40eef8b36740 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -167,7 +167,7 @@ void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long
167 } 167 }
168 168
169 /* Hook into PCI interrupt */ 169 /* Hook into PCI interrupt */
170 set_irq_chained_handler(IRQ_IXP2000_PCIB, &ixdp2x00_irq_handler); 170 set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
171} 171}
172 172
173/************************************************************************* 173/*************************************************************************
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 8477ae1d8f72..7f42366f60d1 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -127,7 +127,7 @@ void __init ixdp2x01_init_irq(void)
127 } 127 }
128 128
129 /* Hook into PCI interrupts */ 129 /* Hook into PCI interrupts */
130 set_irq_chained_handler(IRQ_IXP2000_PCIB, &ixdp2x01_irq_handler); 130 set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler);
131} 131}
132 132
133 133
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 82ad6ef90a38..566a07821c77 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -271,7 +271,7 @@ static void pci_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *
271 } 271 }
272 272
273 int_desc = irq_desc + irqno; 273 int_desc = irq_desc + irqno;
274 int_desc->handle(irqno, int_desc, regs); 274 desc_handle_irq(irqno, int_desc, regs);
275 275
276 desc->chip->unmask(irq); 276 desc->chip->unmask(irq);
277} 277}
@@ -363,7 +363,7 @@ ixp23xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
363static struct irqaction ixp23xx_timer_irq = { 363static struct irqaction ixp23xx_timer_irq = {
364 .name = "IXP23xx Timer Tick", 364 .name = "IXP23xx Timer Tick",
365 .handler = ixp23xx_timer_interrupt, 365 .handler = ixp23xx_timer_interrupt,
366 .flags = SA_INTERRUPT | SA_TIMER, 366 .flags = IRQF_DISABLED | IRQF_TIMER,
367}; 367};
368 368
369void __init ixp23xx_init_timer(void) 369void __init ixp23xx_init_timer(void)
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index bba9d9f08691..37a32e6bcca2 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -19,6 +19,7 @@
19#include <linux/spinlock.h> 19#include <linux/spinlock.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h>
22#include <linux/serial.h> 23#include <linux/serial.h>
23#include <linux/tty.h> 24#include <linux/tty.h>
24#include <linux/bitops.h> 25#include <linux/bitops.h>
@@ -36,7 +37,6 @@
36#include <asm/memory.h> 37#include <asm/memory.h>
37#include <asm/hardware.h> 38#include <asm/hardware.h>
38#include <asm/mach-types.h> 39#include <asm/mach-types.h>
39#include <asm/irq.h>
40#include <asm/system.h> 40#include <asm/system.h>
41#include <asm/tlbflush.h> 41#include <asm/tlbflush.h>
42#include <asm/pgtable.h> 42#include <asm/pgtable.h>
@@ -74,7 +74,7 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc, struct
74 int cpld_irq = 74 int cpld_irq =
75 IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i); 75 IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i);
76 cpld_desc = irq_desc + cpld_irq; 76 cpld_desc = irq_desc + cpld_irq;
77 cpld_desc->handle(cpld_irq, cpld_desc, regs); 77 desc_handle_irq(cpld_irq, cpld_desc, regs);
78 } 78 }
79 } 79 }
80 80
@@ -111,7 +111,7 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc, struct
111 int cpld_irq = 111 int cpld_irq =
112 IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i); 112 IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i);
113 cpld_desc = irq_desc + cpld_irq; 113 cpld_desc = irq_desc + cpld_irq;
114 cpld_desc->handle(cpld_irq, cpld_desc, regs); 114 desc_handle_irq(cpld_irq, cpld_desc, regs);
115 } 115 }
116 } 116 }
117 117
@@ -158,8 +158,8 @@ void ixdp2351_init_irq(void)
158 } 158 }
159 } 159 }
160 160
161 set_irq_chained_handler(IRQ_IXP23XX_INTA, &ixdp2351_inta_handler); 161 set_irq_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler);
162 set_irq_chained_handler(IRQ_IXP23XX_INTB, &ixdp2351_intb_handler); 162 set_irq_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler);
163} 163}
164 164
165/* 165/*
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 13c7c629d037..7c25dbd5a181 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -287,7 +287,7 @@ static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs
287 287
288static struct irqaction ixp4xx_timer_irq = { 288static struct irqaction ixp4xx_timer_irq = {
289 .name = "IXP4xx Timer Tick", 289 .name = "IXP4xx Timer Tick",
290 .flags = SA_INTERRUPT | SA_TIMER, 290 .flags = IRQF_DISABLED | IRQF_TIMER,
291 .handler = ixp4xx_timer_interrupt, 291 .handler = ixp4xx_timer_interrupt,
292}; 292};
293 293
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index e6b7fcd923fa..2cebb2878895 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -17,6 +17,7 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/irq.h>
20 21
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/hardware.h> 23#include <asm/hardware.h>
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index 8b8ca80c9449..d5156c043f0b 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -17,6 +17,7 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/irq.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
21 22
22#include <asm/mach/pci.h> 23#include <asm/mach/pci.h>
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index 526fb6175bc3..ed5270800217 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -16,10 +16,10 @@
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/pci.h> 17#include <linux/pci.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/irq.h>
19 20
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/hardware.h> 22#include <asm/hardware.h>
22#include <asm/irq.h>
23 23
24#include <asm/mach/pci.h> 24#include <asm/mach/pci.h>
25 25
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
index 2d3b770d9e82..b8ebaf4a9c8e 100644
--- a/arch/arm/mach-ixp4xx/nas100d-pci.c
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -17,6 +17,7 @@
17 17
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/irq.h>
20 21
21#include <asm/mach/pci.h> 22#include <asm/mach/pci.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
diff --git a/arch/arm/mach-ixp4xx/nas100d-power.c b/arch/arm/mach-ixp4xx/nas100d-power.c
index a3745ed37f9f..81ffcae1f56e 100644
--- a/arch/arm/mach-ixp4xx/nas100d-power.c
+++ b/arch/arm/mach-ixp4xx/nas100d-power.c
@@ -17,9 +17,9 @@
17 * 17 *
18 */ 18 */
19 19
20#include <linux/module.h>
21#include <linux/reboot.h>
22#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/irq.h>
22#include <linux/module.h>
23#include <linux/reboot.h> 23#include <linux/reboot.h>
24 24
25#include <asm/mach-types.h> 25#include <asm/mach-types.h>
@@ -42,7 +42,7 @@ static int __init nas100d_power_init(void)
42 set_irq_type(NAS100D_RB_IRQ, IRQT_LOW); 42 set_irq_type(NAS100D_RB_IRQ, IRQT_LOW);
43 43
44 if (request_irq(NAS100D_RB_IRQ, &nas100d_reset_handler, 44 if (request_irq(NAS100D_RB_IRQ, &nas100d_reset_handler,
45 SA_INTERRUPT, "NAS100D reset button", NULL) < 0) { 45 IRQF_DISABLED, "NAS100D reset button", NULL) < 0) {
46 46
47 printk(KERN_DEBUG "Reset Button IRQ %d not available\n", 47 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
48 NAS100D_RB_IRQ); 48 NAS100D_RB_IRQ);
diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c
index 6d38e97142cc..e2a2230b69f0 100644
--- a/arch/arm/mach-ixp4xx/nslu2-power.c
+++ b/arch/arm/mach-ixp4xx/nslu2-power.c
@@ -54,7 +54,7 @@ static int __init nslu2_power_init(void)
54 set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH); 54 set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH);
55 55
56 if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler, 56 if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler,
57 SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) { 57 IRQF_DISABLED, "NSLU2 reset button", NULL) < 0) {
58 58
59 printk(KERN_DEBUG "Reset Button IRQ %d not available\n", 59 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
60 NSLU2_RB_IRQ); 60 NSLU2_RB_IRQ);
@@ -63,7 +63,7 @@ static int __init nslu2_power_init(void)
63 } 63 }
64 64
65 if (request_irq(NSLU2_PB_IRQ, &nslu2_power_handler, 65 if (request_irq(NSLU2_PB_IRQ, &nslu2_power_handler,
66 SA_INTERRUPT, "NSLU2 power button", NULL) < 0) { 66 IRQF_DISABLED, "NSLU2 power button", NULL) < 0) {
67 67
68 printk(KERN_DEBUG "Power Button IRQ %d not available\n", 68 printk(KERN_DEBUG "Power Button IRQ %d not available\n",
69 NSLU2_PB_IRQ); 69 NSLU2_PB_IRQ);
diff --git a/arch/arm/mach-l7200/core.c b/arch/arm/mach-l7200/core.c
index ac626436e96f..b7af5640ea7b 100644
--- a/arch/arm/mach-l7200/core.c
+++ b/arch/arm/mach-l7200/core.c
@@ -7,6 +7,7 @@
7 */ 7 */
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/irq.h>
10#include <linux/device.h> 11#include <linux/device.h>
11 12
12#include <asm/types.h> 13#include <asm/types.h>
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index c0e6854289f1..35c3606a2079 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/irq.h>
15 16
16#include <asm/hardware.h> 17#include <asm/hardware.h>
17#include <asm/setup.h> 18#include <asm/setup.h>
diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c
index 1919835d9610..ad5652e01507 100644
--- a/arch/arm/mach-lh7a40x/time.c
+++ b/arch/arm/mach-lh7a40x/time.c
@@ -11,6 +11,7 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irq.h>
14#include <linux/time.h> 15#include <linux/time.h>
15 16
16#include <asm/hardware.h> 17#include <asm/hardware.h>
@@ -52,7 +53,7 @@ lh7a40x_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
52 53
53static struct irqaction lh7a40x_timer_irq = { 54static struct irqaction lh7a40x_timer_irq = {
54 .name = "LHA740x Timer Tick", 55 .name = "LHA740x Timer Tick",
55 .flags = SA_INTERRUPT | SA_TIMER, 56 .flags = IRQF_DISABLED | IRQF_TIMER,
56 .handler = lh7a40x_timer_interrupt, 57 .handler = lh7a40x_timer_interrupt,
57}; 58};
58 59
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index edfbdf40c600..6d72c81b7d9f 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -54,7 +54,7 @@ netx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
54 54
55static struct irqaction netx_timer_irq = { 55static struct irqaction netx_timer_irq = {
56 .name = "NetX Timer Tick", 56 .name = "NetX Timer Tick",
57 .flags = SA_INTERRUPT | SA_TIMER, 57 .flags = IRQF_DISABLED | IRQF_TIMER,
58 .handler = netx_timer_interrupt, 58 .handler = netx_timer_interrupt,
59}; 59};
60 60
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index f8d716ccc1df..d135568dc9e7 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -62,6 +62,13 @@ config MACH_OMAP_PERSEUS2
62 Support for TI OMAP 730 Perseus2 board. Say Y here if you have such 62 Support for TI OMAP 730 Perseus2 board. Say Y here if you have such
63 a board. 63 a board.
64 64
65config MACH_OMAP_FSAMPLE
66 bool "TI F-Sample"
67 depends on ARCH_OMAP1 && ARCH_OMAP730
68 help
69 Support for TI OMAP 850 F-Sample board. Say Y here if you have such
70 a board.
71
65config MACH_VOICEBLUE 72config MACH_VOICEBLUE
66 bool "Voiceblue" 73 bool "Voiceblue"
67 depends on ARCH_OMAP1 && ARCH_OMAP15XX 74 depends on ARCH_OMAP1 && ARCH_OMAP15XX
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 9ea719550ad3..7165f74f78da 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o
17obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o 17obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o
18obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o 18obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
19obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o 19obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o
20obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o
20obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o 21obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o
21obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o 22obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o
22obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o 23obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 73df32aac4c4..8437d065ada5 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -80,8 +80,15 @@ static struct omap_uart_config ams_delta_uart_config __initdata = {
80 .enabled_uarts = 1, 80 .enabled_uarts = 1,
81}; 81};
82 82
83static struct omap_usb_config ams_delta_usb_config __initdata = {
84 .register_host = 1,
85 .hmc_mode = 16,
86 .pins[0] = 2,
87};
88
83static struct omap_board_config_kernel ams_delta_config[] = { 89static struct omap_board_config_kernel ams_delta_config[] = {
84 { OMAP_TAG_UART, &ams_delta_uart_config }, 90 { OMAP_TAG_UART, &ams_delta_uart_config },
91 { OMAP_TAG_USB, &ams_delta_usb_config },
85}; 92};
86 93
87static struct platform_device ams_delta_led_device = { 94static struct platform_device ams_delta_led_device = {
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
new file mode 100644
index 000000000000..c753a3c5aadd
--- /dev/null
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -0,0 +1,319 @@
1/*
2 * linux/arch/arm/mach-omap1/board-fsample.c
3 *
4 * Modified from board-perseus2.c
5 *
6 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
7 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/delay.h>
18#include <linux/mtd/mtd.h>
19#include <linux/mtd/nand.h>
20#include <linux/mtd/partitions.h>
21#include <linux/input.h>
22
23#include <asm/hardware.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/mach/flash.h>
27#include <asm/mach/map.h>
28
29#include <asm/arch/tc.h>
30#include <asm/arch/gpio.h>
31#include <asm/arch/mux.h>
32#include <asm/arch/fpga.h>
33#include <asm/arch/keypad.h>
34#include <asm/arch/common.h>
35#include <asm/arch/board.h>
36#include <asm/arch/board-fsample.h>
37
38static int fsample_keymap[] = {
39 KEY(0,0,KEY_UP),
40 KEY(0,1,KEY_RIGHT),
41 KEY(0,2,KEY_LEFT),
42 KEY(0,3,KEY_DOWN),
43 KEY(0,4,KEY_CENTER),
44 KEY(0,5,KEY_0_5),
45 KEY(1,0,KEY_SOFT2),
46 KEY(1,1,KEY_SEND),
47 KEY(1,2,KEY_END),
48 KEY(1,3,KEY_VOLUMEDOWN),
49 KEY(1,4,KEY_VOLUMEUP),
50 KEY(1,5,KEY_RECORD),
51 KEY(2,0,KEY_SOFT1),
52 KEY(2,1,KEY_3),
53 KEY(2,2,KEY_6),
54 KEY(2,3,KEY_9),
55 KEY(2,4,KEY_SHARP),
56 KEY(2,5,KEY_2_5),
57 KEY(3,0,KEY_BACK),
58 KEY(3,1,KEY_2),
59 KEY(3,2,KEY_5),
60 KEY(3,3,KEY_8),
61 KEY(3,4,KEY_0),
62 KEY(3,5,KEY_HEADSETHOOK),
63 KEY(4,0,KEY_HOME),
64 KEY(4,1,KEY_1),
65 KEY(4,2,KEY_4),
66 KEY(4,3,KEY_7),
67 KEY(4,4,KEY_STAR),
68 KEY(4,5,KEY_POWER),
69 0
70};
71
72static struct resource smc91x_resources[] = {
73 [0] = {
74 .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
75 .end = H2P2_DBG_FPGA_ETHR_START + 0xf,
76 .flags = IORESOURCE_MEM,
77 },
78 [1] = {
79 .start = INT_730_MPU_EXT_NIRQ,
80 .end = 0,
81 .flags = IORESOURCE_IRQ,
82 },
83};
84
85static struct mtd_partition nor_partitions[] = {
86 /* bootloader (U-Boot, etc) in first sector */
87 {
88 .name = "bootloader",
89 .offset = 0,
90 .size = SZ_128K,
91 .mask_flags = MTD_WRITEABLE, /* force read-only */
92 },
93 /* bootloader params in the next sector */
94 {
95 .name = "params",
96 .offset = MTDPART_OFS_APPEND,
97 .size = SZ_128K,
98 .mask_flags = 0,
99 },
100 /* kernel */
101 {
102 .name = "kernel",
103 .offset = MTDPART_OFS_APPEND,
104 .size = SZ_2M,
105 .mask_flags = 0
106 },
107 /* rest of flash is a file system */
108 {
109 .name = "rootfs",
110 .offset = MTDPART_OFS_APPEND,
111 .size = MTDPART_SIZ_FULL,
112 .mask_flags = 0
113 },
114};
115
116static struct flash_platform_data nor_data = {
117 .map_name = "cfi_probe",
118 .width = 2,
119 .parts = nor_partitions,
120 .nr_parts = ARRAY_SIZE(nor_partitions),
121};
122
123static struct resource nor_resource = {
124 .start = OMAP_CS0_PHYS,
125 .end = OMAP_CS0_PHYS + SZ_32M - 1,
126 .flags = IORESOURCE_MEM,
127};
128
129static struct platform_device nor_device = {
130 .name = "omapflash",
131 .id = 0,
132 .dev = {
133 .platform_data = &nor_data,
134 },
135 .num_resources = 1,
136 .resource = &nor_resource,
137};
138
139static struct nand_platform_data nand_data = {
140 .options = NAND_SAMSUNG_LP_OPTIONS,
141};
142
143static struct resource nand_resource = {
144 .start = OMAP_CS3_PHYS,
145 .end = OMAP_CS3_PHYS + SZ_4K - 1,
146 .flags = IORESOURCE_MEM,
147};
148
149static struct platform_device nand_device = {
150 .name = "omapnand",
151 .id = 0,
152 .dev = {
153 .platform_data = &nand_data,
154 },
155 .num_resources = 1,
156 .resource = &nand_resource,
157};
158
159static struct platform_device smc91x_device = {
160 .name = "smc91x",
161 .id = 0,
162 .num_resources = ARRAY_SIZE(smc91x_resources),
163 .resource = smc91x_resources,
164};
165
166static struct resource kp_resources[] = {
167 [0] = {
168 .start = INT_730_MPUIO_KEYPAD,
169 .end = INT_730_MPUIO_KEYPAD,
170 .flags = IORESOURCE_IRQ,
171 },
172};
173
174static struct omap_kp_platform_data kp_data = {
175 .rows = 8,
176 .cols = 8,
177 .keymap = fsample_keymap,
178};
179
180static struct platform_device kp_device = {
181 .name = "omap-keypad",
182 .id = -1,
183 .dev = {
184 .platform_data = &kp_data,
185 },
186 .num_resources = ARRAY_SIZE(kp_resources),
187 .resource = kp_resources,
188};
189
190static struct platform_device lcd_device = {
191 .name = "lcd_p2",
192 .id = -1,
193};
194
195static struct platform_device *devices[] __initdata = {
196 &nor_device,
197 &nand_device,
198 &smc91x_device,
199 &kp_device,
200 &lcd_device,
201};
202
203#define P2_NAND_RB_GPIO_PIN 62
204
205static int nand_dev_ready(struct nand_platform_data *data)
206{
207 return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN);
208}
209
210static struct omap_uart_config fsample_uart_config __initdata = {
211 .enabled_uarts = ((1 << 0) | (1 << 1)),
212};
213
214static struct omap_lcd_config fsample_lcd_config __initdata = {
215 .ctrl_name = "internal",
216};
217
218static struct omap_board_config_kernel fsample_config[] = {
219 { OMAP_TAG_UART, &fsample_uart_config },
220 { OMAP_TAG_LCD, &fsample_lcd_config },
221};
222
223static void __init omap_fsample_init(void)
224{
225 if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN)))
226 nand_data.dev_ready = nand_dev_ready;
227
228 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
229 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
230
231 platform_add_devices(devices, ARRAY_SIZE(devices));
232
233 omap_board_config = fsample_config;
234 omap_board_config_size = ARRAY_SIZE(fsample_config);
235 omap_serial_init();
236}
237
238static void __init fsample_init_smc91x(void)
239{
240 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
241 mdelay(50);
242 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
243 H2P2_DBG_FPGA_LAN_RESET);
244 mdelay(50);
245}
246
247void omap_fsample_init_irq(void)
248{
249 omap1_init_common_hw();
250 omap_init_irq();
251 omap_gpio_init();
252 fsample_init_smc91x();
253}
254
255/* Only FPGA needs to be mapped here. All others are done with ioremap */
256static struct map_desc omap_fsample_io_desc[] __initdata = {
257 {
258 .virtual = H2P2_DBG_FPGA_BASE,
259 .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
260 .length = H2P2_DBG_FPGA_SIZE,
261 .type = MT_DEVICE
262 },
263 {
264 .virtual = FSAMPLE_CPLD_BASE,
265 .pfn = __phys_to_pfn(FSAMPLE_CPLD_START),
266 .length = FSAMPLE_CPLD_SIZE,
267 .type = MT_DEVICE
268 }
269};
270
271static void __init omap_fsample_map_io(void)
272{
273 omap1_map_common_io();
274 iotable_init(omap_fsample_io_desc,
275 ARRAY_SIZE(omap_fsample_io_desc));
276
277 /* Early, board-dependent init */
278
279 /*
280 * Hold GSM Reset until needed
281 */
282 omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
283
284 /*
285 * UARTs -> done automagically by 8250 driver
286 */
287
288 /*
289 * CSx timings, GPIO Mux ... setup
290 */
291
292 /* Flash: CS0 timings setup */
293 omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
294 omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
295
296 /*
297 * Ethernet support through the debug board
298 * CS1 timings setup
299 */
300 omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
301 omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
302
303 /*
304 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
305 * It is used as the Ethernet controller interrupt
306 */
307 omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
308}
309
310MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
311/* Maintainer: Brian Swetland <swetland@google.com> */
312 .phys_io = 0xfff00000,
313 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
314 .boot_params = 0x10000100,
315 .map_io = omap_fsample_map_io,
316 .init_irq = omap_fsample_init_irq,
317 .init_machine = omap_fsample_init,
318 .timer = &omap_timer,
319MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index e90c137a4cf3..4cbc62db5b5d 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -37,6 +37,8 @@
37#include <asm/arch/usb.h> 37#include <asm/arch/usb.h>
38#include <asm/arch/keypad.h> 38#include <asm/arch/keypad.h>
39#include <asm/arch/common.h> 39#include <asm/arch/common.h>
40#include <asm/arch/mcbsp.h>
41#include <asm/arch/omap-alsa.h>
40 42
41static int innovator_keymap[] = { 43static int innovator_keymap[] = {
42 KEY(0, 0, KEY_F1), 44 KEY(0, 0, KEY_F1),
@@ -112,6 +114,42 @@ static struct platform_device innovator_flash_device = {
112 .resource = &innovator_flash_resource, 114 .resource = &innovator_flash_resource,
113}; 115};
114 116
117#define DEFAULT_BITPERSAMPLE 16
118
119static struct omap_mcbsp_reg_cfg mcbsp_regs = {
120 .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
121 .spcr1 = RINTM(3) | RRST,
122 .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
123 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0),
124 .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
125 .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
126 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG,
127 .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
128 .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1),
129 .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1),
130 /*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */
131 .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
132};
133
134static struct omap_alsa_codec_config alsa_config = {
135 .name = "OMAP Innovator AIC23",
136 .mcbsp_regs_alsa = &mcbsp_regs,
137 .codec_configure_dev = NULL, // aic23_configure,
138 .codec_set_samplerate = NULL, // aic23_set_samplerate,
139 .codec_clock_setup = NULL, // aic23_clock_setup,
140 .codec_clock_on = NULL, // aic23_clock_on,
141 .codec_clock_off = NULL, // aic23_clock_off,
142 .get_default_samplerate = NULL, // aic23_get_default_samplerate,
143};
144
145static struct platform_device innovator_mcbsp1_device = {
146 .name = "omap_alsa_mcbsp",
147 .id = 1,
148 .dev = {
149 .platform_data = &alsa_config,
150 },
151};
152
115static struct resource innovator_kp_resources[] = { 153static struct resource innovator_kp_resources[] = {
116 [0] = { 154 [0] = {
117 .start = INT_KEYBOARD, 155 .start = INT_KEYBOARD,
@@ -139,6 +177,10 @@ static struct platform_device innovator_kp_device = {
139 177
140#ifdef CONFIG_ARCH_OMAP15XX 178#ifdef CONFIG_ARCH_OMAP15XX
141 179
180#include <linux/spi/spi.h>
181#include <linux/spi/ads7846.h>
182
183
142/* Only FPGA needs to be mapped here. All others are done with ioremap */ 184/* Only FPGA needs to be mapped here. All others are done with ioremap */
143static struct map_desc innovator1510_io_desc[] __initdata = { 185static struct map_desc innovator1510_io_desc[] __initdata = {
144 { 186 {
@@ -174,13 +216,44 @@ static struct platform_device innovator1510_lcd_device = {
174 .id = -1, 216 .id = -1,
175}; 217};
176 218
219static struct platform_device innovator1510_spi_device = {
220 .name = "spi_inn1510",
221 .id = -1,
222};
223
177static struct platform_device *innovator1510_devices[] __initdata = { 224static struct platform_device *innovator1510_devices[] __initdata = {
178 &innovator_flash_device, 225 &innovator_flash_device,
179 &innovator1510_smc91x_device, 226 &innovator1510_smc91x_device,
227 &innovator_mcbsp1_device,
180 &innovator_kp_device, 228 &innovator_kp_device,
181 &innovator1510_lcd_device, 229 &innovator1510_lcd_device,
230 &innovator1510_spi_device,
182}; 231};
183 232
233static int innovator_get_pendown_state(void)
234{
235 return !(fpga_read(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5));
236}
237
238static const struct ads7846_platform_data innovator1510_ts_info = {
239 .model = 7846,
240 .vref_delay_usecs = 100, /* internal, no capacitor */
241 .x_plate_ohms = 419,
242 .y_plate_ohms = 486,
243 .get_pendown_state = innovator_get_pendown_state,
244};
245
246static struct spi_board_info __initdata innovator1510_boardinfo[] = { {
247 /* FPGA (bus "10") CS0 has an ads7846e */
248 .modalias = "ads7846",
249 .platform_data = &innovator1510_ts_info,
250 .irq = OMAP1510_INT_FPGA_TS,
251 .max_speed_hz = 120000 /* max sample rate at 3V */
252 * 26 /* command + data + overhead */,
253 .bus_num = 10,
254 .chip_select = 0,
255} };
256
184#endif /* CONFIG_ARCH_OMAP15XX */ 257#endif /* CONFIG_ARCH_OMAP15XX */
185 258
186#ifdef CONFIG_ARCH_OMAP16XX 259#ifdef CONFIG_ARCH_OMAP16XX
@@ -311,6 +384,8 @@ static void __init innovator_init(void)
311#ifdef CONFIG_ARCH_OMAP15XX 384#ifdef CONFIG_ARCH_OMAP15XX
312 if (cpu_is_omap1510()) { 385 if (cpu_is_omap1510()) {
313 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); 386 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
387 spi_register_board_info(innovator1510_boardinfo,
388 ARRAY_SIZE(innovator1510_boardinfo));
314 } 389 }
315#endif 390#endif
316#ifdef CONFIG_ARCH_OMAP16XX 391#ifdef CONFIG_ARCH_OMAP16XX
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 1160093e8ef6..b742261c97ad 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -29,11 +29,10 @@
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/interrupt.h> 32#include <linux/irq.h>
33 33
34#include <linux/mtd/mtd.h> 34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h> 35#include <linux/mtd/partitions.h>
36#include <linux/input.h>
37 36
38#include <asm/hardware.h> 37#include <asm/hardware.h>
39#include <asm/mach-types.h> 38#include <asm/mach-types.h>
@@ -45,25 +44,10 @@
45#include <asm/arch/usb.h> 44#include <asm/arch/usb.h>
46#include <asm/arch/mux.h> 45#include <asm/arch/mux.h>
47#include <asm/arch/tc.h> 46#include <asm/arch/tc.h>
48#include <asm/arch/keypad.h>
49#include <asm/arch/common.h> 47#include <asm/arch/common.h>
50#include <asm/arch/mcbsp.h> 48#include <asm/arch/mcbsp.h>
51#include <asm/arch/omap-alsa.h> 49#include <asm/arch/omap-alsa.h>
52 50
53static int osk_keymap[] = {
54 KEY(0, 0, KEY_F1),
55 KEY(0, 3, KEY_UP),
56 KEY(1, 1, KEY_LEFTCTRL),
57 KEY(1, 2, KEY_LEFT),
58 KEY(2, 0, KEY_SPACE),
59 KEY(2, 1, KEY_ESC),
60 KEY(2, 2, KEY_DOWN),
61 KEY(3, 2, KEY_ENTER),
62 KEY(3, 3, KEY_RIGHT),
63 0
64};
65
66
67static struct mtd_partition osk_partitions[] = { 51static struct mtd_partition osk_partitions[] = {
68 /* bootloader (U-Boot, etc) in first sector */ 52 /* bootloader (U-Boot, etc) in first sector */
69 { 53 {
@@ -181,48 +165,17 @@ static struct omap_alsa_codec_config alsa_config = {
181 165
182static struct platform_device osk5912_mcbsp1_device = { 166static struct platform_device osk5912_mcbsp1_device = {
183 .name = "omap_alsa_mcbsp", 167 .name = "omap_alsa_mcbsp",
184 .id = 1, 168 .id = 1,
185 .dev = { 169 .dev = {
186 .platform_data = &alsa_config, 170 .platform_data = &alsa_config,
187 }, 171 },
188}; 172};
189 173
190static struct resource osk5912_kp_resources[] = {
191 [0] = {
192 .start = INT_KEYBOARD,
193 .end = INT_KEYBOARD,
194 .flags = IORESOURCE_IRQ,
195 },
196};
197
198static struct omap_kp_platform_data osk_kp_data = {
199 .rows = 8,
200 .cols = 8,
201 .keymap = osk_keymap,
202};
203
204static struct platform_device osk5912_kp_device = {
205 .name = "omap-keypad",
206 .id = -1,
207 .dev = {
208 .platform_data = &osk_kp_data,
209 },
210 .num_resources = ARRAY_SIZE(osk5912_kp_resources),
211 .resource = osk5912_kp_resources,
212};
213
214static struct platform_device osk5912_lcd_device = {
215 .name = "lcd_osk",
216 .id = -1,
217};
218
219static struct platform_device *osk5912_devices[] __initdata = { 174static struct platform_device *osk5912_devices[] __initdata = {
220 &osk5912_flash_device, 175 &osk5912_flash_device,
221 &osk5912_smc91x_device, 176 &osk5912_smc91x_device,
222 &osk5912_cf_device, 177 &osk5912_cf_device,
223 &osk5912_mcbsp1_device, 178 &osk5912_mcbsp1_device,
224 &osk5912_kp_device,
225 &osk5912_lcd_device,
226}; 179};
227 180
228static void __init osk_init_smc91x(void) 181static void __init osk_init_smc91x(void)
@@ -276,18 +229,100 @@ static struct omap_uart_config osk_uart_config __initdata = {
276 .enabled_uarts = (1 << 0), 229 .enabled_uarts = (1 << 0),
277}; 230};
278 231
232#ifdef CONFIG_OMAP_OSK_MISTRAL
279static struct omap_lcd_config osk_lcd_config __initdata = { 233static struct omap_lcd_config osk_lcd_config __initdata = {
280 .ctrl_name = "internal", 234 .ctrl_name = "internal",
281}; 235};
236#endif
282 237
283static struct omap_board_config_kernel osk_config[] = { 238static struct omap_board_config_kernel osk_config[] = {
284 { OMAP_TAG_USB, &osk_usb_config }, 239 { OMAP_TAG_USB, &osk_usb_config },
285 { OMAP_TAG_UART, &osk_uart_config }, 240 { OMAP_TAG_UART, &osk_uart_config },
241#ifdef CONFIG_OMAP_OSK_MISTRAL
286 { OMAP_TAG_LCD, &osk_lcd_config }, 242 { OMAP_TAG_LCD, &osk_lcd_config },
243#endif
287}; 244};
288 245
289#ifdef CONFIG_OMAP_OSK_MISTRAL 246#ifdef CONFIG_OMAP_OSK_MISTRAL
290 247
248#include <linux/input.h>
249#include <linux/spi/spi.h>
250#include <linux/spi/ads7846.h>
251
252#include <asm/arch/keypad.h>
253
254static const int osk_keymap[] = {
255 /* KEY(col, row, code) */
256 KEY(0, 0, KEY_F1), /* SW4 */
257 KEY(0, 3, KEY_UP), /* (sw2/up) */
258 KEY(1, 1, KEY_LEFTCTRL), /* SW5 */
259 KEY(1, 2, KEY_LEFT), /* (sw2/left) */
260 KEY(2, 0, KEY_SPACE), /* SW3 */
261 KEY(2, 1, KEY_ESC), /* SW6 */
262 KEY(2, 2, KEY_DOWN), /* (sw2/down) */
263 KEY(3, 2, KEY_ENTER), /* (sw2/select) */
264 KEY(3, 3, KEY_RIGHT), /* (sw2/right) */
265 0
266};
267
268static struct omap_kp_platform_data osk_kp_data = {
269 .rows = 8,
270 .cols = 8,
271 .keymap = (int *) osk_keymap,
272};
273
274static struct resource osk5912_kp_resources[] = {
275 [0] = {
276 .start = INT_KEYBOARD,
277 .end = INT_KEYBOARD,
278 .flags = IORESOURCE_IRQ,
279 },
280};
281
282static struct platform_device osk5912_kp_device = {
283 .name = "omap-keypad",
284 .id = -1,
285 .dev = {
286 .platform_data = &osk_kp_data,
287 },
288 .num_resources = ARRAY_SIZE(osk5912_kp_resources),
289 .resource = osk5912_kp_resources,
290};
291
292static struct platform_device osk5912_lcd_device = {
293 .name = "lcd_osk",
294 .id = -1,
295};
296
297static struct platform_device *mistral_devices[] __initdata = {
298 &osk5912_kp_device,
299 &osk5912_lcd_device,
300};
301
302static int mistral_get_pendown_state(void)
303{
304 return !omap_get_gpio_datain(4);
305}
306
307static const struct ads7846_platform_data mistral_ts_info = {
308 .model = 7846,
309 .vref_delay_usecs = 100, /* internal, no capacitor */
310 .x_plate_ohms = 419,
311 .y_plate_ohms = 486,
312 .get_pendown_state = mistral_get_pendown_state,
313};
314
315static struct spi_board_info __initdata mistral_boardinfo[] = { {
316 /* MicroWire (bus 2) CS0 has an ads7846e */
317 .modalias = "ads7846",
318 .platform_data = &mistral_ts_info,
319 .irq = OMAP_GPIO_IRQ(4),
320 .max_speed_hz = 120000 /* max sample rate at 3V */
321 * 26 /* command + data + overhead */,
322 .bus_num = 2,
323 .chip_select = 0,
324} };
325
291#ifdef CONFIG_PM 326#ifdef CONFIG_PM
292static irqreturn_t 327static irqreturn_t
293osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs) 328osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs)
@@ -298,14 +333,18 @@ osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs)
298 333
299static void __init osk_mistral_init(void) 334static void __init osk_mistral_init(void)
300{ 335{
301 /* FIXME here's where to feed in framebuffer, touchpad, and 336 /* NOTE: we could actually tell if there's a Mistral board
302 * keyboard setup ... not in the drivers for those devices!
303 *
304 * NOTE: we could actually tell if there's a Mistral board
305 * attached, e.g. by trying to read something from the ads7846. 337 * attached, e.g. by trying to read something from the ads7846.
306 * But this is too early for that... 338 * But this arch_init() code is too early for that, since we
339 * can't talk to the ads or even the i2c eeprom.
307 */ 340 */
308 341
342 // omap_cfg_reg(P19_1610_GPIO6); // BUSY
343 omap_cfg_reg(P20_1610_GPIO4); // PENIRQ
344 set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING);
345 spi_register_board_info(mistral_boardinfo,
346 ARRAY_SIZE(mistral_boardinfo));
347
309 /* the sideways button (SW1) is for use as a "wakeup" button */ 348 /* the sideways button (SW1) is for use as a "wakeup" button */
310 omap_cfg_reg(N15_1610_MPUIO2); 349 omap_cfg_reg(N15_1610_MPUIO2);
311 if (omap_request_gpio(OMAP_MPUIO(2)) == 0) { 350 if (omap_request_gpio(OMAP_MPUIO(2)) == 0) {
@@ -318,7 +357,7 @@ static void __init osk_mistral_init(void)
318 */ 357 */
319 ret = request_irq(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), 358 ret = request_irq(OMAP_GPIO_IRQ(OMAP_MPUIO(2)),
320 &osk_mistral_wake_interrupt, 359 &osk_mistral_wake_interrupt,
321 SA_SHIRQ, "mistral_wakeup", 360 IRQF_SHARED, "mistral_wakeup",
322 &osk_mistral_wake_interrupt); 361 &osk_mistral_wake_interrupt);
323 if (ret != 0) { 362 if (ret != 0) {
324 omap_free_gpio(OMAP_MPUIO(2)); 363 omap_free_gpio(OMAP_MPUIO(2));
@@ -329,6 +368,8 @@ static void __init osk_mistral_init(void)
329#endif 368#endif
330 } else 369 } else
331 printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n"); 370 printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n");
371
372 platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices));
332} 373}
333#else 374#else
334static void __init osk_mistral_init(void) { } 375static void __init osk_mistral_init(void) { }
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 619db18144ea..f1958e882e86 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -1,3 +1,4 @@
1//kernel/linux-omap-fsample/arch/arm/mach-omap1/clock.c#2 - edit change 3808 (text)
1/* 2/*
2 * linux/arch/arm/mach-omap1/clock.c 3 * linux/arch/arm/mach-omap1/clock.c
3 * 4 *
@@ -20,6 +21,7 @@
20 21
21#include <asm/io.h> 22#include <asm/io.h>
22 23
24#include <asm/arch/cpu.h>
23#include <asm/arch/usb.h> 25#include <asm/arch/usb.h>
24#include <asm/arch/clock.h> 26#include <asm/arch/clock.h>
25#include <asm/arch/sram.h> 27#include <asm/arch/sram.h>
@@ -270,8 +272,12 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
270 /* 272 /*
271 * In most cases we should not need to reprogram DPLL. 273 * In most cases we should not need to reprogram DPLL.
272 * Reprogramming the DPLL is tricky, it must be done from SRAM. 274 * Reprogramming the DPLL is tricky, it must be done from SRAM.
275 * (on 730, bit 13 must always be 1)
273 */ 276 */
274 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); 277 if (cpu_is_omap730())
278 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000);
279 else
280 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
275 281
276 ck_dpll1.rate = ptr->pll_rate; 282 ck_dpll1.rate = ptr->pll_rate;
277 propagate_rate(&ck_dpll1); 283 propagate_rate(&ck_dpll1);
@@ -748,7 +754,7 @@ int __init omap1_clk_init(void)
748 printk(KERN_ERR "System frequencies not set. Check your config.\n"); 754 printk(KERN_ERR "System frequencies not set. Check your config.\n");
749 /* Guess sane values (60MHz) */ 755 /* Guess sane values (60MHz) */
750 omap_writew(0x2290, DPLL_CTL); 756 omap_writew(0x2290, DPLL_CTL);
751 omap_writew(0x1005, ARM_CKCTL); 757 omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL);
752 ck_dpll1.rate = 60000000; 758 ck_dpll1.rate = 60000000;
753 propagate_rate(&ck_dpll1); 759 propagate_rate(&ck_dpll1);
754 } 760 }
@@ -761,13 +767,17 @@ int __init omap1_clk_init(void)
761 ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, 767 ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
762 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); 768 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
763 769
764#ifdef CONFIG_MACH_OMAP_PERSEUS2 770#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
765 /* Select slicer output as OMAP input clock */ 771 /* Select slicer output as OMAP input clock */
766 omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL); 772 omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
767#endif 773#endif
768 774
769 /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ 775 /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
770 omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); 776 /* (on 730, bit 13 must not be cleared) */
777 if (cpu_is_omap730())
778 omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL);
779 else
780 omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
771 781
772 /* Put DSP/MPUI into reset until needed */ 782 /* Put DSP/MPUI into reset until needed */
773 omap_writew(0, ARM_RSTCT1); 783 omap_writew(0, ARM_RSTCT1);
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 880cd2d8f4aa..34eb79ee6e61 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -133,7 +133,7 @@ static struct irqchip omap_fpga_irq = {
133 * mask_ack routine for all of the FPGA interrupts has been changed from 133 * mask_ack routine for all of the FPGA interrupts has been changed from
134 * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt 134 * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt
135 * being serviced is left unmasked. We can do this because the FPGA cascade 135 * being serviced is left unmasked. We can do this because the FPGA cascade
136 * interrupt is installed with the SA_INTERRUPT flag, which leaves all 136 * interrupt is installed with the IRQF_DISABLED flag, which leaves all
137 * interrupts masked at the CPU while an FPGA interrupt handler executes. 137 * interrupts masked at the CPU while an FPGA interrupt handler executes.
138 * 138 *
139 * Limited testing indicates that this workaround appears to be effective 139 * Limited testing indicates that this workaround appears to be effective
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index ddf6b07dc9c7..cd76185bab74 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -1,3 +1,4 @@
1//kernel/linux-omap-fsample/arch/arm/mach-omap1/pm.c#3 - integrate change 4545 (text)
1/* 2/*
2 * linux/arch/arm/mach-omap1/pm.c 3 * linux/arch/arm/mach-omap1/pm.c
3 * 4 *
@@ -50,6 +51,7 @@
50#include <asm/mach/irq.h> 51#include <asm/mach/irq.h>
51#include <asm/mach-types.h> 52#include <asm/mach-types.h>
52 53
54#include <asm/arch/cpu.h>
53#include <asm/arch/irqs.h> 55#include <asm/arch/irqs.h>
54#include <asm/arch/clock.h> 56#include <asm/arch/clock.h>
55#include <asm/arch/sram.h> 57#include <asm/arch/sram.h>
@@ -326,8 +328,9 @@ void omap_pm_suspend(void)
326 /* stop DSP */ 328 /* stop DSP */
327 omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); 329 omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1);
328 330
329 /* shut down dsp_ck */ 331 /* shut down dsp_ck */
330 omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); 332 if (!cpu_is_omap730())
333 omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
331 334
332 /* temporarily enabling api_ck to access DSP registers */ 335 /* temporarily enabling api_ck to access DSP registers */
333 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); 336 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2);
@@ -687,7 +690,7 @@ static irqreturn_t omap_wakeup_interrupt(int irq, void * dev,
687 690
688static struct irqaction omap_wakeup_irq = { 691static struct irqaction omap_wakeup_irq = {
689 .name = "peripheral wakeup", 692 .name = "peripheral wakeup",
690 .flags = SA_INTERRUPT, 693 .flags = IRQF_DISABLED,
691 .handler = omap_wakeup_interrupt 694 .handler = omap_wakeup_interrupt
692}; 695};
693 696
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 56319742aa1b..976edfb882e2 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -11,6 +11,7 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/irq.h>
14#include <linux/delay.h> 15#include <linux/delay.h>
15#include <linux/serial.h> 16#include <linux/serial.h>
16#include <linux/tty.h> 17#include <linux/tty.h>
@@ -252,7 +253,7 @@ static void __init omap_serial_set_port_wakeup(int gpio_nr)
252 } 253 }
253 omap_set_gpio_direction(gpio_nr, 1); 254 omap_set_gpio_direction(gpio_nr, 1);
254 ret = request_irq(OMAP_GPIO_IRQ(gpio_nr), &omap_serial_wake_interrupt, 255 ret = request_irq(OMAP_GPIO_IRQ(gpio_nr), &omap_serial_wake_interrupt,
255 SA_TRIGGER_RISING, "serial wakeup", NULL); 256 IRQF_TRIGGER_RISING, "serial wakeup", NULL);
256 if (ret) { 257 if (ret) {
257 omap_free_gpio(gpio_nr); 258 omap_free_gpio(gpio_nr);
258 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n", 259 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index c2d3205bc592..4d91b9f51084 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -93,7 +93,7 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc)
93 * will break. On P2, the timer count rate is 6.5 MHz after programming PTV 93 * will break. On P2, the timer count rate is 6.5 MHz after programming PTV
94 * with 0. This divides the 13MHz input by 2, and is undocumented. 94 * with 0. This divides the 13MHz input by 2, and is undocumented.
95 */ 95 */
96#ifdef CONFIG_MACH_OMAP_PERSEUS2 96#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
97/* REVISIT: This ifdef construct should be replaced by a query to clock 97/* REVISIT: This ifdef construct should be replaced by a query to clock
98 * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz. 98 * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz.
99 */ 99 */
@@ -177,7 +177,7 @@ static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id,
177 177
178static struct irqaction omap_mpu_timer_irq = { 178static struct irqaction omap_mpu_timer_irq = {
179 .name = "mpu timer", 179 .name = "mpu timer",
180 .flags = SA_INTERRUPT | SA_TIMER, 180 .flags = IRQF_DISABLED | IRQF_TIMER,
181 .handler = omap_mpu_timer_interrupt, 181 .handler = omap_mpu_timer_interrupt,
182}; 182};
183 183
@@ -191,7 +191,7 @@ static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id,
191 191
192static struct irqaction omap_mpu_timer1_irq = { 192static struct irqaction omap_mpu_timer1_irq = {
193 .name = "mpu timer1 overflow", 193 .name = "mpu timer1 overflow",
194 .flags = SA_INTERRUPT, 194 .flags = IRQF_DISABLED,
195 .handler = omap_mpu_timer1_interrupt, 195 .handler = omap_mpu_timer1_interrupt,
196}; 196};
197 197
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 537dd2e6d380..aab97ccf1e63 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -8,6 +8,7 @@ config ARCH_OMAP24XX
8config ARCH_OMAP2420 8config ARCH_OMAP2420
9 bool "OMAP2420 support" 9 bool "OMAP2420 support"
10 depends on ARCH_OMAP24XX 10 depends on ARCH_OMAP24XX
11 select OMAP_DM_TIMER
11 12
12comment "OMAP Board Type" 13comment "OMAP Board Type"
13 depends on ARCH_OMAP2 14 depends on ARCH_OMAP2
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 111eaa64258f..266d88e77bdc 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,12 +3,13 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o serial.o 6obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o \
7 serial.o gpmc.o
7 8
8obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o 9obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o
9 10
10# Power Management 11# Power Management
11obj-$(CONFIG_PM) += pm.o sleep.o 12obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o
12 13
13# Specific board support 14# Specific board support
14obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o 15obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 6c6ba172cdf6..7993b7bae2bd 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -234,17 +234,17 @@ static void __init apollon_sw_init(void)
234 234
235 set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQT_RISING); 235 set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQT_RISING);
236 if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt, 236 if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
237 SA_SHIRQ, "enter sw", 237 IRQF_SHARED, "enter sw",
238 &apollon_sw_interrupt)) 238 &apollon_sw_interrupt))
239 return; 239 return;
240 set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQT_RISING); 240 set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQT_RISING);
241 if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt, 241 if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt,
242 SA_SHIRQ, "up sw", 242 IRQF_SHARED, "up sw",
243 &apollon_sw_interrupt)) 243 &apollon_sw_interrupt))
244 return; 244 return;
245 set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQT_RISING); 245 set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQT_RISING);
246 if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt, 246 if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt,
247 SA_SHIRQ, "down sw", 247 IRQF_SHARED, "down sw",
248 &apollon_sw_interrupt)) 248 &apollon_sw_interrupt))
249 return; 249 return;
250} 250}
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 7edf0f69da1e..d1b648a4efbf 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -659,26 +659,35 @@ static int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
659 659
660 /* Isolate control register */ 660 /* Isolate control register */
661 div_sel = (SRC_RATE_SEL_MASK & clk->flags); 661 div_sel = (SRC_RATE_SEL_MASK & clk->flags);
662 div_off = clk->src_offset; 662 div_off = clk->rate_offset;
663 663
664 validrate = omap2_clksel_round_rate(clk, rate, &new_div); 664 validrate = omap2_clksel_round_rate(clk, rate, &new_div);
665 if(validrate != rate) 665 if (validrate != rate)
666 return(ret); 666 return(ret);
667 667
668 field_val = omap2_get_clksel(&div_sel, &field_mask, clk); 668 field_val = omap2_get_clksel(&div_sel, &field_mask, clk);
669 if (div_sel == 0) 669 if (div_sel == 0)
670 return ret; 670 return ret;
671 671
672 if(clk->flags & CM_SYSCLKOUT_SEL1){ 672 if (clk->flags & CM_SYSCLKOUT_SEL1) {
673 switch(new_div){ 673 switch (new_div) {
674 case 16: field_val = 4; break; 674 case 16:
675 case 8: field_val = 3; break; 675 field_val = 4;
676 case 4: field_val = 2; break; 676 break;
677 case 2: field_val = 1; break; 677 case 8:
678 case 1: field_val = 0; break; 678 field_val = 3;
679 break;
680 case 4:
681 field_val = 2;
682 break;
683 case 2:
684 field_val = 1;
685 break;
686 case 1:
687 field_val = 0;
688 break;
679 } 689 }
680 } 690 } else
681 else
682 field_val = new_div; 691 field_val = new_div;
683 692
684 reg = (void __iomem *)div_sel; 693 reg = (void __iomem *)div_sel;
@@ -743,7 +752,7 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset,
743 val = 0x2; 752 val = 0x2;
744 break; 753 break;
745 case CM_WKUP_SEL1: 754 case CM_WKUP_SEL1:
746 src_reg_addr = (u32)&CM_CLKSEL2_CORE; 755 src_reg_addr = (u32)&CM_CLKSEL_WKUP;
747 mask = 0x3; 756 mask = 0x3;
748 if (src_clk == &func_32k_ck) 757 if (src_clk == &func_32k_ck)
749 val = 0x0; 758 val = 0x0;
@@ -783,9 +792,9 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset,
783 val = 0; 792 val = 0;
784 if (src_clk == &sys_ck) 793 if (src_clk == &sys_ck)
785 val = 1; 794 val = 1;
786 if (src_clk == &func_54m_ck)
787 val = 2;
788 if (src_clk == &func_96m_ck) 795 if (src_clk == &func_96m_ck)
796 val = 2;
797 if (src_clk == &func_54m_ck)
789 val = 3; 798 val = 3;
790 break; 799 break;
791 } 800 }
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 6c78d471fab7..2781dfbc5164 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -1062,7 +1062,7 @@ static struct clk gpt2_ick = {
1062 .parent = &l4_ck, 1062 .parent = &l4_ck,
1063 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1063 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1064 .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* Bit4 */ 1064 .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* Bit4 */
1065 .enable_bit = 0, 1065 .enable_bit = 4,
1066 .recalc = &omap2_followparent_recalc, 1066 .recalc = &omap2_followparent_recalc,
1067}; 1067};
1068 1068
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 4842ffe26705..aa4322451e8b 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -104,6 +104,51 @@ static inline void omap_init_sti(void)
104static inline void omap_init_sti(void) {} 104static inline void omap_init_sti(void) {}
105#endif 105#endif
106 106
107#if defined(CONFIG_SPI_OMAP24XX)
108
109#include <asm/arch/mcspi.h>
110
111#define OMAP2_MCSPI1_BASE 0x48098000
112#define OMAP2_MCSPI2_BASE 0x4809a000
113
114/* FIXME: use resources instead */
115
116static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
117 .base = io_p2v(OMAP2_MCSPI1_BASE),
118 .num_cs = 4,
119};
120
121struct platform_device omap2_mcspi1 = {
122 .name = "omap2_mcspi",
123 .id = 1,
124 .dev = {
125 .platform_data = &omap2_mcspi1_config,
126 },
127};
128
129static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
130 .base = io_p2v(OMAP2_MCSPI2_BASE),
131 .num_cs = 2,
132};
133
134struct platform_device omap2_mcspi2 = {
135 .name = "omap2_mcspi",
136 .id = 2,
137 .dev = {
138 .platform_data = &omap2_mcspi2_config,
139 },
140};
141
142static void omap_init_mcspi(void)
143{
144 platform_device_register(&omap2_mcspi1);
145 platform_device_register(&omap2_mcspi2);
146}
147
148#else
149static inline void omap_init_mcspi(void) {}
150#endif
151
107/*-------------------------------------------------------------------------*/ 152/*-------------------------------------------------------------------------*/
108 153
109static int __init omap2_init_devices(void) 154static int __init omap2_init_devices(void)
@@ -112,6 +157,7 @@ static int __init omap2_init_devices(void)
112 * in alphabetical order so they're easier to sort through. 157 * in alphabetical order so they're easier to sort through.
113 */ 158 */
114 omap_init_i2c(); 159 omap_init_i2c();
160 omap_init_mcspi();
115 omap_init_sti(); 161 omap_init_sti();
116 162
117 return 0; 163 return 0;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
new file mode 100644
index 000000000000..c7a48f921fef
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -0,0 +1,209 @@
1/*
2 * GPMC support functions
3 *
4 * Copyright (C) 2005-2006 Nokia Corporation
5 *
6 * Author: Juha Yrjola
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/clk.h>
16
17#include <asm/io.h>
18#include <asm/arch/gpmc.h>
19
20#undef DEBUG
21
22#define GPMC_BASE 0x6800a000
23#define GPMC_REVISION 0x00
24#define GPMC_SYSCONFIG 0x10
25#define GPMC_SYSSTATUS 0x14
26#define GPMC_IRQSTATUS 0x18
27#define GPMC_IRQENABLE 0x1c
28#define GPMC_TIMEOUT_CONTROL 0x40
29#define GPMC_ERR_ADDRESS 0x44
30#define GPMC_ERR_TYPE 0x48
31#define GPMC_CONFIG 0x50
32#define GPMC_STATUS 0x54
33#define GPMC_PREFETCH_CONFIG1 0x1e0
34#define GPMC_PREFETCH_CONFIG2 0x1e4
35#define GPMC_PREFETCH_CONTROL 0x1e8
36#define GPMC_PREFETCH_STATUS 0x1f0
37#define GPMC_ECC_CONFIG 0x1f4
38#define GPMC_ECC_CONTROL 0x1f8
39#define GPMC_ECC_SIZE_CONFIG 0x1fc
40
41#define GPMC_CS0 0x60
42#define GPMC_CS_SIZE 0x30
43
44static void __iomem *gpmc_base =
45 (void __iomem *) IO_ADDRESS(GPMC_BASE);
46static void __iomem *gpmc_cs_base =
47 (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
48
49static struct clk *gpmc_l3_clk;
50
51static void gpmc_write_reg(int idx, u32 val)
52{
53 __raw_writel(val, gpmc_base + idx);
54}
55
56static u32 gpmc_read_reg(int idx)
57{
58 return __raw_readl(gpmc_base + idx);
59}
60
61void gpmc_cs_write_reg(int cs, int idx, u32 val)
62{
63 void __iomem *reg_addr;
64
65 reg_addr = gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx;
66 __raw_writel(val, reg_addr);
67}
68
69u32 gpmc_cs_read_reg(int cs, int idx)
70{
71 return __raw_readl(gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx);
72}
73
74/* TODO: Add support for gpmc_fck to clock framework and use it */
75static unsigned long gpmc_get_fclk_period(void)
76{
77 /* In picoseconds */
78 return 1000000000 / ((clk_get_rate(gpmc_l3_clk)) / 1000);
79}
80
81unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
82{
83 unsigned long tick_ps;
84
85 /* Calculate in picosecs to yield more exact results */
86 tick_ps = gpmc_get_fclk_period();
87
88 return (time_ns * 1000 + tick_ps - 1) / tick_ps;
89}
90
91#ifdef DEBUG
92static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
93 int time, const char *name)
94#else
95static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
96 int time)
97#endif
98{
99 u32 l;
100 int ticks, mask, nr_bits;
101
102 if (time == 0)
103 ticks = 0;
104 else
105 ticks = gpmc_ns_to_ticks(time);
106 nr_bits = end_bit - st_bit + 1;
107 if (ticks >= 1 << nr_bits)
108 return -1;
109
110 mask = (1 << nr_bits) - 1;
111 l = gpmc_cs_read_reg(cs, reg);
112#ifdef DEBUG
113 printk(KERN_INFO "GPMC CS%d: %-10s: %d ticks, %3lu ns (was %i ticks)\n",
114 cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000,
115 (l >> st_bit) & mask);
116#endif
117 l &= ~(mask << st_bit);
118 l |= ticks << st_bit;
119 gpmc_cs_write_reg(cs, reg, l);
120
121 return 0;
122}
123
124#ifdef DEBUG
125#define GPMC_SET_ONE(reg, st, end, field) \
126 if (set_gpmc_timing_reg(cs, (reg), (st), (end), \
127 t->field, #field) < 0) \
128 return -1
129#else
130#define GPMC_SET_ONE(reg, st, end, field) \
131 if (set_gpmc_timing_reg(cs, (reg), (st), (end), t->field) < 0) \
132 return -1
133#endif
134
135int gpmc_cs_calc_divider(int cs, unsigned int sync_clk)
136{
137 int div;
138 u32 l;
139
140 l = sync_clk * 1000 + (gpmc_get_fclk_period() - 1);
141 div = l / gpmc_get_fclk_period();
142 if (div > 4)
143 return -1;
144 if (div < 0)
145 div = 1;
146
147 return div;
148}
149
150int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
151{
152 int div;
153 u32 l;
154
155 div = gpmc_cs_calc_divider(cs, t->sync_clk);
156 if (div < 0)
157 return -1;
158
159 GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on);
160 GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off);
161 GPMC_SET_ONE(GPMC_CS_CONFIG2, 16, 20, cs_wr_off);
162
163 GPMC_SET_ONE(GPMC_CS_CONFIG3, 0, 3, adv_on);
164 GPMC_SET_ONE(GPMC_CS_CONFIG3, 8, 12, adv_rd_off);
165 GPMC_SET_ONE(GPMC_CS_CONFIG3, 16, 20, adv_wr_off);
166
167 GPMC_SET_ONE(GPMC_CS_CONFIG4, 0, 3, oe_on);
168 GPMC_SET_ONE(GPMC_CS_CONFIG4, 8, 12, oe_off);
169 GPMC_SET_ONE(GPMC_CS_CONFIG4, 16, 19, we_on);
170 GPMC_SET_ONE(GPMC_CS_CONFIG4, 24, 28, we_off);
171
172 GPMC_SET_ONE(GPMC_CS_CONFIG5, 0, 4, rd_cycle);
173 GPMC_SET_ONE(GPMC_CS_CONFIG5, 8, 12, wr_cycle);
174 GPMC_SET_ONE(GPMC_CS_CONFIG5, 16, 20, access);
175
176 GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access);
177
178#ifdef DEBUG
179 printk(KERN_INFO "GPMC CS%d CLK period is %lu (div %d)\n",
180 cs, gpmc_get_fclk_period(), div);
181#endif
182
183 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
184 l &= ~0x03;
185 l |= (div - 1);
186
187 return 0;
188}
189
190unsigned long gpmc_cs_get_base_addr(int cs)
191{
192 return (gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7) & 0x1f) << 24;
193}
194
195void __init gpmc_init(void)
196{
197 u32 l;
198
199 gpmc_l3_clk = clk_get(NULL, "core_l3_ck");
200 BUG_ON(IS_ERR(gpmc_l3_clk));
201
202 l = gpmc_read_reg(GPMC_REVISION);
203 printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
204 /* Set smart idle mode and automatic L3 clock gating */
205 l = gpmc_read_reg(GPMC_SYSCONFIG);
206 l &= 0x03 << 3;
207 l |= (0x02 << 3) | (1 << 0);
208 gpmc_write_reg(GPMC_SYSCONFIG, l);
209}
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 20dd6e74e91d..a0728c33e5d9 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -26,6 +26,7 @@
26extern void omap_sram_init(void); 26extern void omap_sram_init(void);
27extern int omap2_clk_init(void); 27extern int omap2_clk_init(void);
28extern void omap2_check_revision(void); 28extern void omap2_check_revision(void);
29extern void gpmc_init(void);
29 30
30/* 31/*
31 * The machine specific code may provide the extra mapping besides the 32 * The machine specific code may provide the extra mapping besides the
@@ -66,4 +67,5 @@ void __init omap2_init_common_hw(void)
66{ 67{
67 omap2_mux_init(); 68 omap2_mux_init();
68 omap2_clk_init(); 69 omap2_clk_init();
70 gpmc_init();
69} 71}
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 4c5f2c04883e..60ef084faffd 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -52,6 +52,12 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
52/* 24xx clocks */ 52/* 24xx clocks */
53MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) 53MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
54 54
55/* 24xx GPMC wait pin monitoring */
56MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
57MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
58MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
59MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1)
60
55/* 24xx McBSP */ 61/* 24xx McBSP */
56MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1) 62MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1)
57MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1) 63MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1)
@@ -59,18 +65,38 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
59MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) 65MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
60 66
61/* 24xx GPIO */ 67/* 24xx GPIO */
62MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) 68MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
63MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) 69MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
64MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) 70MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
65MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) 71MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
66MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) 72MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
67MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) 73MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
68MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) 74MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
69MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) 75MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
70MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) 76MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
71MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) 77MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
72MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) 78MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
73 79
80/* 242x DBG GPIO */
81MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
82MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1)
83MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1)
84MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1)
85MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1)
86MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1)
87MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1)
88MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1)
89MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)
90MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1)
91
92/* 24xx external DMA requests */
93MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
94MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
95MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
96MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
97MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
98MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
99
74/* TSC IRQ */ 100/* TSC IRQ */
75MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1) 101MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
76 102
diff --git a/arch/arm/mach-omap2/pm-domain.c b/arch/arm/mach-omap2/pm-domain.c
new file mode 100644
index 000000000000..5e20e740cde5
--- /dev/null
+++ b/arch/arm/mach-omap2/pm-domain.c
@@ -0,0 +1,300 @@
1/*
2 * linux/arch/arm/mach-omap2/pm-domain.c
3 *
4 * Power domain functions for OMAP2
5 *
6 * Copyright (C) 2006 Nokia Corporation
7 * Tony Lindgren <tony@atomide.com>
8 *
9 * Some code based on earlier OMAP2 sample PM code
10 * Copyright (C) 2005 Texas Instruments, Inc.
11 * Richard Woodruff <r-woodruff2@ti.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/config.h>
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/clk.h>
22
23#include <asm/io.h>
24
25#include "prcm-regs.h"
26
27/* Power domain offsets */
28#define PM_MPU_OFFSET 0x100
29#define PM_CORE_OFFSET 0x200
30#define PM_GFX_OFFSET 0x300
31#define PM_WKUP_OFFSET 0x400 /* Autoidle only */
32#define PM_PLL_OFFSET 0x500 /* Autoidle only */
33#define PM_DSP_OFFSET 0x800
34#define PM_MDM_OFFSET 0xc00
35
36/* Power domain wake-up dependency control register */
37#define PM_WKDEP_OFFSET 0xc8
38#define EN_MDM (1 << 5)
39#define EN_WKUP (1 << 4)
40#define EN_GFX (1 << 3)
41#define EN_DSP (1 << 2)
42#define EN_MPU (1 << 1)
43#define EN_CORE (1 << 0)
44
45/* Core power domain state transition control register */
46#define PM_PWSTCTRL_OFFSET 0xe0
47#define FORCESTATE (1 << 18) /* Only for DSP & GFX */
48#define MEM4RETSTATE (1 << 6)
49#define MEM3RETSTATE (1 << 5)
50#define MEM2RETSTATE (1 << 4)
51#define MEM1RETSTATE (1 << 3)
52#define LOGICRETSTATE (1 << 2) /* Logic is retained */
53#define POWERSTATE_OFF 0x3
54#define POWERSTATE_RETENTION 0x1
55#define POWERSTATE_ON 0x0
56
57/* Power domain state register */
58#define PM_PWSTST_OFFSET 0xe4
59
60/* Hardware supervised state transition control register */
61#define CM_CLKSTCTRL_OFFSET 0x48
62#define AUTOSTAT_MPU (1 << 0) /* MPU */
63#define AUTOSTAT_DSS (1 << 2) /* Core */
64#define AUTOSTAT_L4 (1 << 1) /* Core */
65#define AUTOSTAT_L3 (1 << 0) /* Core */
66#define AUTOSTAT_GFX (1 << 0) /* GFX */
67#define AUTOSTAT_IVA (1 << 8) /* 2420 IVA in DSP domain */
68#define AUTOSTAT_DSP (1 << 0) /* DSP */
69#define AUTOSTAT_MDM (1 << 0) /* MDM */
70
71/* Automatic control of interface clock idling */
72#define CM_AUTOIDLE1_OFFSET 0x30
73#define CM_AUTOIDLE2_OFFSET 0x34 /* Core only */
74#define CM_AUTOIDLE3_OFFSET 0x38 /* Core only */
75#define CM_AUTOIDLE4_OFFSET 0x3c /* Core only */
76#define AUTO_54M(x) (((x) & 0x3) << 6)
77#define AUTO_96M(x) (((x) & 0x3) << 2)
78#define AUTO_DPLL(x) (((x) & 0x3) << 0)
79#define AUTO_STOPPED 0x3
80#define AUTO_BYPASS_FAST 0x2 /* DPLL only */
81#define AUTO_BYPASS_LOW_POWER 0x1 /* DPLL only */
82#define AUTO_DISABLED 0x0
83
84/* Voltage control PRCM_VOLTCTRL bits */
85#define AUTO_EXTVOLT (1 << 15)
86#define FORCE_EXTVOLT (1 << 14)
87#define SETOFF_LEVEL(x) (((x) & 0x3) << 12)
88#define MEMRETCTRL (1 << 8)
89#define SETRET_LEVEL(x) (((x) & 0x3) << 6)
90#define VOLT_LEVEL(x) (((x) & 0x3) << 0)
91
92#define OMAP24XX_PRCM_VBASE IO_ADDRESS(OMAP24XX_PRCM_BASE)
93#define prcm_readl(r) __raw_readl(OMAP24XX_PRCM_VBASE + (r))
94#define prcm_writel(v, r) __raw_writel((v), OMAP24XX_PRCM_VBASE + (r))
95
96static u32 pmdomain_get_wakeup_dependencies(int domain_offset)
97{
98 return prcm_readl(domain_offset + PM_WKDEP_OFFSET);
99}
100
101static void pmdomain_set_wakeup_dependencies(u32 state, int domain_offset)
102{
103 prcm_writel(state, domain_offset + PM_WKDEP_OFFSET);
104}
105
106static u32 pmdomain_get_powerstate(int domain_offset)
107{
108 return prcm_readl(domain_offset + PM_PWSTCTRL_OFFSET);
109}
110
111static void pmdomain_set_powerstate(u32 state, int domain_offset)
112{
113 prcm_writel(state, domain_offset + PM_PWSTCTRL_OFFSET);
114}
115
116static u32 pmdomain_get_clock_autocontrol(int domain_offset)
117{
118 return prcm_readl(domain_offset + CM_CLKSTCTRL_OFFSET);
119}
120
121static void pmdomain_set_clock_autocontrol(u32 state, int domain_offset)
122{
123 prcm_writel(state, domain_offset + CM_CLKSTCTRL_OFFSET);
124}
125
126static u32 pmdomain_get_clock_autoidle1(int domain_offset)
127{
128 return prcm_readl(domain_offset + CM_AUTOIDLE1_OFFSET);
129}
130
131/* Core domain only */
132static u32 pmdomain_get_clock_autoidle2(int domain_offset)
133{
134 return prcm_readl(domain_offset + CM_AUTOIDLE2_OFFSET);
135}
136
137/* Core domain only */
138static u32 pmdomain_get_clock_autoidle3(int domain_offset)
139{
140 return prcm_readl(domain_offset + CM_AUTOIDLE3_OFFSET);
141}
142
143/* Core domain only */
144static u32 pmdomain_get_clock_autoidle4(int domain_offset)
145{
146 return prcm_readl(domain_offset + CM_AUTOIDLE4_OFFSET);
147}
148
149static void pmdomain_set_clock_autoidle1(u32 state, int domain_offset)
150{
151 prcm_writel(state, CM_AUTOIDLE1_OFFSET + domain_offset);
152}
153
154/* Core domain only */
155static void pmdomain_set_clock_autoidle2(u32 state, int domain_offset)
156{
157 prcm_writel(state, CM_AUTOIDLE2_OFFSET + domain_offset);
158}
159
160/* Core domain only */
161static void pmdomain_set_clock_autoidle3(u32 state, int domain_offset)
162{
163 prcm_writel(state, CM_AUTOIDLE3_OFFSET + domain_offset);
164}
165
166/* Core domain only */
167static void pmdomain_set_clock_autoidle4(u32 state, int domain_offset)
168{
169 prcm_writel(state, CM_AUTOIDLE4_OFFSET + domain_offset);
170}
171
172/*
173 * Configures power management domains to idle clocks automatically.
174 */
175void pmdomain_set_autoidle(void)
176{
177 u32 val;
178
179 /* Set PLL auto stop for 54M, 96M & DPLL */
180 pmdomain_set_clock_autoidle1(AUTO_54M(AUTO_STOPPED) |
181 AUTO_96M(AUTO_STOPPED) |
182 AUTO_DPLL(AUTO_STOPPED), PM_PLL_OFFSET);
183
184 /* External clock input control
185 * REVISIT: Should this be in clock framework?
186 */
187 PRCM_CLKSRC_CTRL |= (0x3 << 3);
188
189 /* Configure number of 32KHz clock cycles for sys_clk */
190 PRCM_CLKSSETUP = 0x00ff;
191
192 /* Configure automatic voltage transition */
193 PRCM_VOLTSETUP = 0;
194 val = PRCM_VOLTCTRL;
195 val &= ~(SETOFF_LEVEL(0x3) | VOLT_LEVEL(0x3));
196 val |= SETOFF_LEVEL(1) | VOLT_LEVEL(1) | AUTO_EXTVOLT;
197 PRCM_VOLTCTRL = val;
198
199 /* Disable emulation tools functional clock */
200 PRCM_CLKEMUL_CTRL = 0x0;
201
202 /* Set core memory retention state */
203 val = pmdomain_get_powerstate(PM_CORE_OFFSET);
204 if (cpu_is_omap2420()) {
205 val &= ~(0x7 << 3);
206 val |= (MEM3RETSTATE | MEM2RETSTATE | MEM1RETSTATE);
207 } else {
208 val &= ~(0xf << 3);
209 val |= (MEM4RETSTATE | MEM3RETSTATE | MEM2RETSTATE |
210 MEM1RETSTATE);
211 }
212 pmdomain_set_powerstate(val, PM_CORE_OFFSET);
213
214 /* OCP interface smart idle. REVISIT: Enable autoidle bit0 ? */
215 val = SMS_SYSCONFIG;
216 val &= ~(0x3 << 3);
217 val |= (0x2 << 3) | (1 << 0);
218 SMS_SYSCONFIG |= val;
219
220 val = SDRC_SYSCONFIG;
221 val &= ~(0x3 << 3);
222 val |= (0x2 << 3);
223 SDRC_SYSCONFIG = val;
224
225 /* Configure L3 interface for smart idle.
226 * REVISIT: Enable autoidle bit0 ?
227 */
228 val = GPMC_SYSCONFIG;
229 val &= ~(0x3 << 3);
230 val |= (0x2 << 3) | (1 << 0);
231 GPMC_SYSCONFIG = val;
232
233 pmdomain_set_powerstate(LOGICRETSTATE | POWERSTATE_RETENTION,
234 PM_MPU_OFFSET);
235 pmdomain_set_powerstate(POWERSTATE_RETENTION, PM_CORE_OFFSET);
236 if (!cpu_is_omap2420())
237 pmdomain_set_powerstate(POWERSTATE_RETENTION, PM_MDM_OFFSET);
238
239 /* Assume suspend function has saved the state for DSP and GFX */
240 pmdomain_set_powerstate(FORCESTATE | POWERSTATE_OFF, PM_DSP_OFFSET);
241 pmdomain_set_powerstate(FORCESTATE | POWERSTATE_OFF, PM_GFX_OFFSET);
242
243#if 0
244 /* REVISIT: Internal USB needs special handling */
245 force_standby_usb();
246 if (cpu_is_omap2430())
247 force_hsmmc();
248 sdram_self_refresh_on_idle_req(1);
249#endif
250
251 /* Enable clock auto control for all domains.
252 * Note that CORE domain includes also DSS, L4 & L3.
253 */
254 pmdomain_set_clock_autocontrol(AUTOSTAT_MPU, PM_MPU_OFFSET);
255 pmdomain_set_clock_autocontrol(AUTOSTAT_GFX, PM_GFX_OFFSET);
256 pmdomain_set_clock_autocontrol(AUTOSTAT_DSS | AUTOSTAT_L4 | AUTOSTAT_L3,
257 PM_CORE_OFFSET);
258 if (cpu_is_omap2420())
259 pmdomain_set_clock_autocontrol(AUTOSTAT_IVA | AUTOSTAT_DSP,
260 PM_DSP_OFFSET);
261 else {
262 pmdomain_set_clock_autocontrol(AUTOSTAT_DSP, PM_DSP_OFFSET);
263 pmdomain_set_clock_autocontrol(AUTOSTAT_MDM, PM_MDM_OFFSET);
264 }
265
266 /* Enable clock autoidle for all domains */
267 pmdomain_set_clock_autoidle1(0x2, PM_DSP_OFFSET);
268 if (cpu_is_omap2420()) {
269 pmdomain_set_clock_autoidle1(0xfffffff9, PM_CORE_OFFSET);
270 pmdomain_set_clock_autoidle2(0x7, PM_CORE_OFFSET);
271 pmdomain_set_clock_autoidle1(0x3f, PM_WKUP_OFFSET);
272 } else {
273 pmdomain_set_clock_autoidle1(0xeafffff1, PM_CORE_OFFSET);
274 pmdomain_set_clock_autoidle2(0xfff, PM_CORE_OFFSET);
275 pmdomain_set_clock_autoidle1(0x7f, PM_WKUP_OFFSET);
276 pmdomain_set_clock_autoidle1(0x3, PM_MDM_OFFSET);
277 }
278 pmdomain_set_clock_autoidle3(0x7, PM_CORE_OFFSET);
279 pmdomain_set_clock_autoidle4(0x1f, PM_CORE_OFFSET);
280}
281
282/*
283 * Initializes power domains by removing wake-up dependencies and powering
284 * down DSP and GFX. Gets called from PM init. Note that DSP and IVA code
285 * must re-enable DSP and GFX when used.
286 */
287void __init pmdomain_init(void)
288{
289 /* Remove all domain wakeup dependencies */
290 pmdomain_set_wakeup_dependencies(EN_WKUP | EN_CORE, PM_MPU_OFFSET);
291 pmdomain_set_wakeup_dependencies(0, PM_DSP_OFFSET);
292 pmdomain_set_wakeup_dependencies(0, PM_GFX_OFFSET);
293 pmdomain_set_wakeup_dependencies(EN_WKUP | EN_MPU, PM_CORE_OFFSET);
294 if (cpu_is_omap2430())
295 pmdomain_set_wakeup_dependencies(0, PM_MDM_OFFSET);
296
297 /* Power down DSP and GFX */
298 pmdomain_set_powerstate(POWERSTATE_OFF | FORCESTATE, PM_DSP_OFFSET);
299 pmdomain_set_powerstate(POWERSTATE_OFF | FORCESTATE, PM_GFX_OFFSET);
300}
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 562168fa2b16..d7eee99b7e3f 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/sysfs.h> 24#include <linux/sysfs.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/delay.h>
26 27
27#include <asm/io.h> 28#include <asm/io.h>
28#include <asm/irq.h> 29#include <asm/irq.h>
@@ -36,11 +37,18 @@
36#include <asm/arch/sram.h> 37#include <asm/arch/sram.h>
37#include <asm/arch/pm.h> 38#include <asm/arch/pm.h>
38 39
40#include "prcm-regs.h"
41
39static struct clk *vclk; 42static struct clk *vclk;
40static void (*omap2_sram_idle)(void); 43static void (*omap2_sram_idle)(void);
41static void (*omap2_sram_suspend)(int dllctrl, int cpu_rev); 44static void (*omap2_sram_suspend)(int dllctrl, int cpu_rev);
42static void (*saved_idle)(void); 45static void (*saved_idle)(void);
43 46
47extern void __init pmdomain_init(void);
48extern void pmdomain_set_autoidle(void);
49
50static unsigned int omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_SIZE];
51
44void omap2_pm_idle(void) 52void omap2_pm_idle(void)
45{ 53{
46 local_irq_disable(); 54 local_irq_disable();
@@ -87,23 +95,272 @@ static int omap2_pm_prepare(suspend_state_t state)
87 return error; 95 return error;
88} 96}
89 97
98#define INT0_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_GPIO_BANK1) | \
99 OMAP_IRQ_BIT(INT_24XX_GPIO_BANK2) | \
100 OMAP_IRQ_BIT(INT_24XX_GPIO_BANK3))
101
102#define INT1_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_GPIO_BANK4))
103
104#define INT2_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_UART1_IRQ) | \
105 OMAP_IRQ_BIT(INT_24XX_UART2_IRQ) | \
106 OMAP_IRQ_BIT(INT_24XX_UART3_IRQ))
107
108#define preg(reg) printk("%s\t(0x%p):\t0x%08x\n", #reg, &reg, reg);
109
110static void omap2_pm_debug(char * desc)
111{
112 printk("%s:\n", desc);
113
114 preg(CM_CLKSTCTRL_MPU);
115 preg(CM_CLKSTCTRL_CORE);
116 preg(CM_CLKSTCTRL_GFX);
117 preg(CM_CLKSTCTRL_DSP);
118 preg(CM_CLKSTCTRL_MDM);
119
120 preg(PM_PWSTCTRL_MPU);
121 preg(PM_PWSTCTRL_CORE);
122 preg(PM_PWSTCTRL_GFX);
123 preg(PM_PWSTCTRL_DSP);
124 preg(PM_PWSTCTRL_MDM);
125
126 preg(PM_PWSTST_MPU);
127 preg(PM_PWSTST_CORE);
128 preg(PM_PWSTST_GFX);
129 preg(PM_PWSTST_DSP);
130 preg(PM_PWSTST_MDM);
131
132 preg(CM_AUTOIDLE1_CORE);
133 preg(CM_AUTOIDLE2_CORE);
134 preg(CM_AUTOIDLE3_CORE);
135 preg(CM_AUTOIDLE4_CORE);
136 preg(CM_AUTOIDLE_WKUP);
137 preg(CM_AUTOIDLE_PLL);
138 preg(CM_AUTOIDLE_DSP);
139 preg(CM_AUTOIDLE_MDM);
140
141 preg(CM_ICLKEN1_CORE);
142 preg(CM_ICLKEN2_CORE);
143 preg(CM_ICLKEN3_CORE);
144 preg(CM_ICLKEN4_CORE);
145 preg(CM_ICLKEN_GFX);
146 preg(CM_ICLKEN_WKUP);
147 preg(CM_ICLKEN_DSP);
148 preg(CM_ICLKEN_MDM);
149
150 preg(CM_IDLEST1_CORE);
151 preg(CM_IDLEST2_CORE);
152 preg(CM_IDLEST3_CORE);
153 preg(CM_IDLEST4_CORE);
154 preg(CM_IDLEST_GFX);
155 preg(CM_IDLEST_WKUP);
156 preg(CM_IDLEST_CKGEN);
157 preg(CM_IDLEST_DSP);
158 preg(CM_IDLEST_MDM);
159
160 preg(RM_RSTST_MPU);
161 preg(RM_RSTST_GFX);
162 preg(RM_RSTST_WKUP);
163 preg(RM_RSTST_DSP);
164 preg(RM_RSTST_MDM);
165
166 preg(PM_WKDEP_MPU);
167 preg(PM_WKDEP_CORE);
168 preg(PM_WKDEP_GFX);
169 preg(PM_WKDEP_DSP);
170 preg(PM_WKDEP_MDM);
171
172 preg(CM_FCLKEN_WKUP);
173 preg(CM_ICLKEN_WKUP);
174 preg(CM_IDLEST_WKUP);
175 preg(CM_AUTOIDLE_WKUP);
176 preg(CM_CLKSEL_WKUP);
177
178 preg(PM_WKEN_WKUP);
179 preg(PM_WKST_WKUP);
180}
181
182static inline void omap2_pm_save_registers(void)
183{
184 /* Save interrupt registers */
185 OMAP24XX_SAVE(INTC_MIR0);
186 OMAP24XX_SAVE(INTC_MIR1);
187 OMAP24XX_SAVE(INTC_MIR2);
188
189 /* Save power control registers */
190 OMAP24XX_SAVE(CM_CLKSTCTRL_MPU);
191 OMAP24XX_SAVE(CM_CLKSTCTRL_CORE);
192 OMAP24XX_SAVE(CM_CLKSTCTRL_GFX);
193 OMAP24XX_SAVE(CM_CLKSTCTRL_DSP);
194 OMAP24XX_SAVE(CM_CLKSTCTRL_MDM);
195
196 /* Save power state registers */
197 OMAP24XX_SAVE(PM_PWSTCTRL_MPU);
198 OMAP24XX_SAVE(PM_PWSTCTRL_CORE);
199 OMAP24XX_SAVE(PM_PWSTCTRL_GFX);
200 OMAP24XX_SAVE(PM_PWSTCTRL_DSP);
201 OMAP24XX_SAVE(PM_PWSTCTRL_MDM);
202
203 /* Save autoidle registers */
204 OMAP24XX_SAVE(CM_AUTOIDLE1_CORE);
205 OMAP24XX_SAVE(CM_AUTOIDLE2_CORE);
206 OMAP24XX_SAVE(CM_AUTOIDLE3_CORE);
207 OMAP24XX_SAVE(CM_AUTOIDLE4_CORE);
208 OMAP24XX_SAVE(CM_AUTOIDLE_WKUP);
209 OMAP24XX_SAVE(CM_AUTOIDLE_PLL);
210 OMAP24XX_SAVE(CM_AUTOIDLE_DSP);
211 OMAP24XX_SAVE(CM_AUTOIDLE_MDM);
212
213 /* Save idle state registers */
214 OMAP24XX_SAVE(CM_IDLEST1_CORE);
215 OMAP24XX_SAVE(CM_IDLEST2_CORE);
216 OMAP24XX_SAVE(CM_IDLEST3_CORE);
217 OMAP24XX_SAVE(CM_IDLEST4_CORE);
218 OMAP24XX_SAVE(CM_IDLEST_GFX);
219 OMAP24XX_SAVE(CM_IDLEST_WKUP);
220 OMAP24XX_SAVE(CM_IDLEST_CKGEN);
221 OMAP24XX_SAVE(CM_IDLEST_DSP);
222 OMAP24XX_SAVE(CM_IDLEST_MDM);
223
224 /* Save clock registers */
225 OMAP24XX_SAVE(CM_FCLKEN1_CORE);
226 OMAP24XX_SAVE(CM_FCLKEN2_CORE);
227 OMAP24XX_SAVE(CM_ICLKEN1_CORE);
228 OMAP24XX_SAVE(CM_ICLKEN2_CORE);
229 OMAP24XX_SAVE(CM_ICLKEN3_CORE);
230 OMAP24XX_SAVE(CM_ICLKEN4_CORE);
231}
232
233static inline void omap2_pm_restore_registers(void)
234{
235 /* Restore clock state registers */
236 OMAP24XX_RESTORE(CM_CLKSTCTRL_MPU);
237 OMAP24XX_RESTORE(CM_CLKSTCTRL_CORE);
238 OMAP24XX_RESTORE(CM_CLKSTCTRL_GFX);
239 OMAP24XX_RESTORE(CM_CLKSTCTRL_DSP);
240 OMAP24XX_RESTORE(CM_CLKSTCTRL_MDM);
241
242 /* Restore power state registers */
243 OMAP24XX_RESTORE(PM_PWSTCTRL_MPU);
244 OMAP24XX_RESTORE(PM_PWSTCTRL_CORE);
245 OMAP24XX_RESTORE(PM_PWSTCTRL_GFX);
246 OMAP24XX_RESTORE(PM_PWSTCTRL_DSP);
247 OMAP24XX_RESTORE(PM_PWSTCTRL_MDM);
248
249 /* Restore idle state registers */
250 OMAP24XX_RESTORE(CM_IDLEST1_CORE);
251 OMAP24XX_RESTORE(CM_IDLEST2_CORE);
252 OMAP24XX_RESTORE(CM_IDLEST3_CORE);
253 OMAP24XX_RESTORE(CM_IDLEST4_CORE);
254 OMAP24XX_RESTORE(CM_IDLEST_GFX);
255 OMAP24XX_RESTORE(CM_IDLEST_WKUP);
256 OMAP24XX_RESTORE(CM_IDLEST_CKGEN);
257 OMAP24XX_RESTORE(CM_IDLEST_DSP);
258 OMAP24XX_RESTORE(CM_IDLEST_MDM);
259
260 /* Restore autoidle registers */
261 OMAP24XX_RESTORE(CM_AUTOIDLE1_CORE);
262 OMAP24XX_RESTORE(CM_AUTOIDLE2_CORE);
263 OMAP24XX_RESTORE(CM_AUTOIDLE3_CORE);
264 OMAP24XX_RESTORE(CM_AUTOIDLE4_CORE);
265 OMAP24XX_RESTORE(CM_AUTOIDLE_WKUP);
266 OMAP24XX_RESTORE(CM_AUTOIDLE_PLL);
267 OMAP24XX_RESTORE(CM_AUTOIDLE_DSP);
268 OMAP24XX_RESTORE(CM_AUTOIDLE_MDM);
269
270 /* Restore clock registers */
271 OMAP24XX_RESTORE(CM_FCLKEN1_CORE);
272 OMAP24XX_RESTORE(CM_FCLKEN2_CORE);
273 OMAP24XX_RESTORE(CM_ICLKEN1_CORE);
274 OMAP24XX_RESTORE(CM_ICLKEN2_CORE);
275 OMAP24XX_RESTORE(CM_ICLKEN3_CORE);
276 OMAP24XX_RESTORE(CM_ICLKEN4_CORE);
277
278 /* REVISIT: Clear interrupts here */
279
280 /* Restore interrupt registers */
281 OMAP24XX_RESTORE(INTC_MIR0);
282 OMAP24XX_RESTORE(INTC_MIR1);
283 OMAP24XX_RESTORE(INTC_MIR2);
284}
285
286static int omap2_pm_suspend(void)
287{
288 int processor_type = 0;
289
290 /* REVISIT: 0x21 or 0x26? */
291 if (cpu_is_omap2420())
292 processor_type = 0x21;
293
294 if (!processor_type)
295 return -ENOTSUPP;
296
297 local_irq_disable();
298 local_fiq_disable();
299
300 omap2_pm_save_registers();
301
302 /* Disable interrupts except for the wake events */
303 INTC_MIR_SET0 = 0xffffffff & ~INT0_WAKE_MASK;
304 INTC_MIR_SET1 = 0xffffffff & ~INT1_WAKE_MASK;
305 INTC_MIR_SET2 = 0xffffffff & ~INT2_WAKE_MASK;
306
307 pmdomain_set_autoidle();
308
309 /* Clear old wake-up events */
310 PM_WKST1_CORE = 0;
311 PM_WKST2_CORE = 0;
312 PM_WKST_WKUP = 0;
313
314 /* Enable wake-up events */
315 PM_WKEN1_CORE = (1 << 22) | (1 << 21); /* UART1 & 2 */
316 PM_WKEN2_CORE = (1 << 2); /* UART3 */
317 PM_WKEN_WKUP = (1 << 2) | (1 << 0); /* GPIO & GPT1 */
318
319 /* Disable clocks except for CM_ICLKEN2_CORE. It gets disabled
320 * in the SRAM suspend code */
321 CM_FCLKEN1_CORE = 0;
322 CM_FCLKEN2_CORE = 0;
323 CM_ICLKEN1_CORE = 0;
324 CM_ICLKEN3_CORE = 0;
325 CM_ICLKEN4_CORE = 0;
326
327 omap2_pm_debug("Status before suspend");
328
329 /* Must wait for serial buffers to clear */
330 mdelay(200);
331
332 /* Jump to SRAM suspend code
333 * REVISIT: When is this SDRC_DLLB_CTRL?
334 */
335 omap2_sram_suspend(SDRC_DLLA_CTRL, processor_type);
336
337 /* Back from sleep */
338 omap2_pm_restore_registers();
339
340 local_fiq_enable();
341 local_irq_enable();
342
343 return 0;
344}
345
90static int omap2_pm_enter(suspend_state_t state) 346static int omap2_pm_enter(suspend_state_t state)
91{ 347{
348 int ret = 0;
349
92 switch (state) 350 switch (state)
93 { 351 {
94 case PM_SUSPEND_STANDBY: 352 case PM_SUSPEND_STANDBY:
95 case PM_SUSPEND_MEM: 353 case PM_SUSPEND_MEM:
96 /* FIXME: Add suspend */ 354 ret = omap2_pm_suspend();
97 break; 355 break;
98
99 case PM_SUSPEND_DISK: 356 case PM_SUSPEND_DISK:
100 return -ENOTSUPP; 357 ret = -ENOTSUPP;
101 358 break;
102 default: 359 default:
103 return -EINVAL; 360 ret = -EINVAL;
104 } 361 }
105 362
106 return 0; 363 return ret;
107} 364}
108 365
109static int omap2_pm_finish(suspend_state_t state) 366static int omap2_pm_finish(suspend_state_t state)
@@ -143,6 +400,8 @@ int __init omap2_pm_init(void)
143 pm_set_ops(&omap_pm_ops); 400 pm_set_ops(&omap_pm_ops);
144 pm_idle = omap2_pm_idle; 401 pm_idle = omap2_pm_idle;
145 402
403 pmdomain_init();
404
146 return 0; 405 return 0;
147} 406}
148 407
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 1d2f5ac2f69b..fe5fd6d42dea 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -6,6 +6,7 @@
6 * Copyright (C) 2005 Nokia Corporation 6 * Copyright (C) 2005 Nokia Corporation
7 * Author: Paul Mundt <paul.mundt@nokia.com> 7 * Author: Paul Mundt <paul.mundt@nokia.com>
8 * Juha Yrjölä <juha.yrjola@nokia.com> 8 * Juha Yrjölä <juha.yrjola@nokia.com>
9 * OMAP Dual-mode timer framework support by Timo Teras
9 * 10 *
10 * Some parts based off of TI's 24xx code: 11 * Some parts based off of TI's 24xx code:
11 * 12 *
@@ -22,54 +23,18 @@
22#include <linux/interrupt.h> 23#include <linux/interrupt.h>
23#include <linux/err.h> 24#include <linux/err.h>
24#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/delay.h>
25 27
26#include <asm/mach/time.h> 28#include <asm/mach/time.h>
27#include <asm/delay.h> 29#include <asm/arch/dmtimer.h>
28#include <asm/io.h>
29 30
30#define OMAP2_GP_TIMER1_BASE 0x48028000 31static struct omap_dm_timer *gptimer;
31#define OMAP2_GP_TIMER2_BASE 0x4802a000
32#define OMAP2_GP_TIMER3_BASE 0x48078000
33#define OMAP2_GP_TIMER4_BASE 0x4807a000
34 32
35#define GP_TIMER_TIDR 0x00 33static inline void omap2_gp_timer_start(unsigned long load_val)
36#define GP_TIMER_TISR 0x18
37#define GP_TIMER_TIER 0x1c
38#define GP_TIMER_TCLR 0x24
39#define GP_TIMER_TCRR 0x28
40#define GP_TIMER_TLDR 0x2c
41#define GP_TIMER_TSICR 0x40
42
43#define OS_TIMER_NR 1 /* GP timer 2 */
44
45static unsigned long timer_base[] = {
46 IO_ADDRESS(OMAP2_GP_TIMER1_BASE),
47 IO_ADDRESS(OMAP2_GP_TIMER2_BASE),
48 IO_ADDRESS(OMAP2_GP_TIMER3_BASE),
49 IO_ADDRESS(OMAP2_GP_TIMER4_BASE),
50};
51
52static inline unsigned int timer_read_reg(int nr, unsigned int reg)
53{
54 return __raw_readl(timer_base[nr] + reg);
55}
56
57static inline void timer_write_reg(int nr, unsigned int reg, unsigned int val)
58{
59 __raw_writel(val, timer_base[nr] + reg);
60}
61
62/* Note that we always enable the clock prescale divider bit */
63static inline void omap2_gp_timer_start(int nr, unsigned long load_val)
64{ 34{
65 unsigned int tmp; 35 omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val);
66 36 omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
67 tmp = 0xffffffff - load_val; 37 omap_dm_timer_start(gptimer);
68
69 timer_write_reg(nr, GP_TIMER_TLDR, tmp);
70 timer_write_reg(nr, GP_TIMER_TCRR, tmp);
71 timer_write_reg(nr, GP_TIMER_TIER, 1 << 1);
72 timer_write_reg(nr, GP_TIMER_TCLR, (1 << 5) | (1 << 1) | 1);
73} 38}
74 39
75static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id, 40static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id,
@@ -77,7 +42,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id,
77{ 42{
78 write_seqlock(&xtime_lock); 43 write_seqlock(&xtime_lock);
79 44
80 timer_write_reg(OS_TIMER_NR, GP_TIMER_TISR, 1 << 1); 45 omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW);
81 timer_tick(regs); 46 timer_tick(regs);
82 47
83 write_sequnlock(&xtime_lock); 48 write_sequnlock(&xtime_lock);
@@ -87,41 +52,26 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id,
87 52
88static struct irqaction omap2_gp_timer_irq = { 53static struct irqaction omap2_gp_timer_irq = {
89 .name = "gp timer", 54 .name = "gp timer",
90 .flags = SA_INTERRUPT, 55 .flags = IRQF_DISABLED | IRQF_TIMER,
91 .handler = omap2_gp_timer_interrupt, 56 .handler = omap2_gp_timer_interrupt,
92}; 57};
93 58
94static void __init omap2_gp_timer_init(void) 59static void __init omap2_gp_timer_init(void)
95{ 60{
96 struct clk * sys_ck; 61 u32 tick_period;
97 u32 tick_period = 120000;
98 u32 l;
99 62
100 /* Reset clock and prescale value */ 63 omap_dm_timer_init();
101 timer_write_reg(OS_TIMER_NR, GP_TIMER_TCLR, 0); 64 gptimer = omap_dm_timer_request_specific(1);
65 BUG_ON(gptimer == NULL);
102 66
103 sys_ck = clk_get(NULL, "sys_ck"); 67 omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
104 if (IS_ERR(sys_ck)) 68 tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / 100;
105 printk(KERN_ERR "Could not get sys_ck\n");
106 else {
107 clk_enable(sys_ck);
108 tick_period = clk_get_rate(sys_ck) / 100;
109 clk_put(sys_ck);
110 }
111
112 tick_period /= 2; /* Minimum prescale divider is 2 */
113 tick_period -= 1; 69 tick_period -= 1;
114 70
115 l = timer_read_reg(OS_TIMER_NR, GP_TIMER_TIDR); 71 setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
116 printk(KERN_INFO "OMAP2 GP timer (HW version %d.%d)\n", 72 omap2_gp_timer_start(tick_period);
117 (l >> 4) & 0x0f, l & 0x0f);
118
119 setup_irq(38, &omap2_gp_timer_irq);
120
121 omap2_gp_timer_start(OS_TIMER_NR, tick_period);
122} 73}
123 74
124struct sys_timer omap_timer = { 75struct sys_timer omap_timer = {
125 .init = omap2_gp_timer_init, 76 .init = omap2_gp_timer_init,
126}; 77};
127
diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c
index 4ce680698529..888bf6cfba8a 100644
--- a/arch/arm/mach-pnx4008/time.c
+++ b/arch/arm/mach-pnx4008/time.c
@@ -86,7 +86,7 @@ static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id,
86 86
87static struct irqaction pnx4008_timer_irq = { 87static struct irqaction pnx4008_timer_irq = {
88 .name = "PNX4008 Tick Timer", 88 .name = "PNX4008 Tick Timer",
89 .flags = SA_INTERRUPT | SA_TIMER, 89 .flags = IRQF_DISABLED | IRQF_TIMER,
90 .handler = pnx4008_timer_interrupt 90 .handler = pnx4008_timer_interrupt
91}; 91};
92 92
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index ea5137f319c4..03d07cae26c8 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -35,6 +35,10 @@ config PXA_SHARPSL
35 SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) 35 SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
36 handheld computer. 36 handheld computer.
37 37
38config MACH_TRIZEPS4
39 bool "Keith und Koep Trizeps4 DIMM-Module"
40 select PXA27x
41
38endchoice 42endchoice
39 43
40if PXA_SHARPSL 44if PXA_SHARPSL
@@ -55,6 +59,21 @@ endchoice
55 59
56endif 60endif
57 61
62if MACH_TRIZEPS4
63
64choice
65 prompt "Select base board for Trizeps 4 module"
66
67config MACH_TRIZEPS4_CONXS
68 bool "ConXS Eval Board"
69
70config MACH_TRIZEPS4_ANY
71 bool "another Board"
72
73endchoice
74
75endif
76
58endmenu 77endmenu
59 78
60config MACH_POODLE 79config MACH_POODLE
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 1610690be419..9093eb1c94eb 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
12obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o 12obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
13obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o 13obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
14obj-$(CONFIG_ARCH_PXA_IDP) += idp.o 14obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
15obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
15obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o 16obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o
16obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o 17obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o
17obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o 18obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o
@@ -23,6 +24,7 @@ led-y := leds.o
23led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o 24led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o
24led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o 25led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o
25led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o 26led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
27led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
26 28
27obj-$(CONFIG_LEDS) += $(led-y) 29obj-$(CONFIG_LEDS) += $(led-y)
28 30
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index bf6648a83901..cce26576999e 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -225,7 +225,7 @@ static int corgi_mci_init(struct device *dev, irqreturn_t (*corgi_detect_int)(in
225 corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250); 225 corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
226 226
227 err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, 227 err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int,
228 SA_INTERRUPT | SA_TRIGGER_RISING | SA_TRIGGER_FALLING, 228 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
229 "MMC card detect", data); 229 "MMC card detect", data);
230 if (err) { 230 if (err) {
231 printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 231 printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 347b9dea24c6..6914d22bc20f 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -18,6 +18,7 @@
18 18
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/irq.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/fb.h> 23#include <linux/fb.h>
23 24
diff --git a/arch/arm/mach-pxa/leds-trizeps4.c b/arch/arm/mach-pxa/leds-trizeps4.c
new file mode 100644
index 000000000000..14cfc85e44b5
--- /dev/null
+++ b/arch/arm/mach-pxa/leds-trizeps4.c
@@ -0,0 +1,134 @@
1/*
2 * linux/arch/arm/mach-pxa/leds-trizeps4.c
3 *
4 * Author: Jürgen Schindele
5 * Created: 20 02, 2006
6 * Copyright: Jürgen Schindele
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/config.h>
14#include <linux/init.h>
15
16#include <asm/hardware.h>
17#include <asm/system.h>
18#include <asm/types.h>
19#include <asm/leds.h>
20
21#include <asm/arch/pxa-regs.h>
22#include <asm/arch/trizeps4.h>
23
24#include "leds.h"
25
26#define LED_STATE_ENABLED 1
27#define LED_STATE_CLAIMED 2
28
29#define SYS_BUSY 0x01
30#define HEARTBEAT 0x02
31#define BLINK 0x04
32
33static unsigned int led_state;
34static unsigned int hw_led_state;
35
36void trizeps4_leds_event(led_event_t evt)
37{
38 unsigned long flags;
39
40 local_irq_save(flags);
41
42 switch (evt) {
43 case led_start:
44 hw_led_state = 0;
45 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
46 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
47 led_state = LED_STATE_ENABLED;
48 break;
49
50 case led_stop:
51 led_state &= ~LED_STATE_ENABLED;
52 break;
53
54 case led_claim:
55 led_state |= LED_STATE_CLAIMED;
56 hw_led_state = 0;
57 break;
58
59 case led_release:
60 led_state &= ~LED_STATE_CLAIMED;
61 hw_led_state = 0;
62 break;
63
64#ifdef CONFIG_LEDS_TIMER
65 case led_timer:
66 hw_led_state ^= HEARTBEAT;
67 break;
68#endif
69
70#ifdef CONFIG_LEDS_CPU
71 case led_idle_start:
72 hw_led_state &= ~SYS_BUSY;
73 break;
74
75 case led_idle_end:
76 hw_led_state |= SYS_BUSY;
77 break;
78#endif
79
80 case led_halted:
81 break;
82
83 case led_green_on:
84 hw_led_state |= BLINK;
85 break;
86
87 case led_green_off:
88 hw_led_state &= ~BLINK;
89 break;
90
91 case led_amber_on:
92 break;
93
94 case led_amber_off:
95 break;
96
97 case led_red_on:
98 break;
99
100 case led_red_off:
101 break;
102
103 default:
104 break;
105 }
106
107 if (led_state & LED_STATE_ENABLED) {
108 switch (hw_led_state) {
109 case 0:
110 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
111 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
112 break;
113 case 1:
114 GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
115 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
116 break;
117 case 2:
118 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
119 GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
120 break;
121 case 3:
122 GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
123 GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
124 break;
125 }
126 }
127 else {
128 /* turn all off */
129 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
130 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
131 }
132
133 local_irq_restore(flags);
134}
diff --git a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c
index bbe4d5f6afaa..e13eb841e48d 100644
--- a/arch/arm/mach-pxa/leds.c
+++ b/arch/arm/mach-pxa/leds.c
@@ -24,6 +24,8 @@ pxa_leds_init(void)
24 leds_event = mainstone_leds_event; 24 leds_event = mainstone_leds_event;
25 if (machine_is_pxa_idp()) 25 if (machine_is_pxa_idp())
26 leds_event = idp_leds_event; 26 leds_event = idp_leds_event;
27 if (machine_is_trizeps4())
28 leds_event = trizeps4_leds_event;
27 29
28 leds_event(led_start); 30 leds_event(led_start);
29 return 0; 31 return 0;
diff --git a/arch/arm/mach-pxa/leds.h b/arch/arm/mach-pxa/leds.h
index d98f6e93c12b..4f829b8c39dd 100644
--- a/arch/arm/mach-pxa/leds.h
+++ b/arch/arm/mach-pxa/leds.h
@@ -10,3 +10,4 @@
10extern void idp_leds_event(led_event_t evt); 10extern void idp_leds_event(led_event_t evt);
11extern void lubbock_leds_event(led_event_t evt); 11extern void lubbock_leds_event(led_event_t evt);
12extern void mainstone_leds_event(led_event_t evt); 12extern void mainstone_leds_event(led_event_t evt);
13extern void trizeps4_leds_event(led_event_t evt);
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index ec0f43a102c7..1a5f5c21481e 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -248,58 +248,137 @@ static void lpd270_backlight_power(int on)
248 248
249/* 5.7" TFT QVGA (LoLo display number 1) */ 249/* 5.7" TFT QVGA (LoLo display number 1) */
250static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = { 250static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = {
251 .pixclock = 100000, 251 .pixclock = 150000,
252 .xres = 240, 252 .xres = 320,
253 .yres = 320, 253 .yres = 240,
254 .bpp = 16, 254 .bpp = 16,
255 .hsync_len = 64, 255 .hsync_len = 0x14,
256 .left_margin = 0x27, 256 .left_margin = 0x28,
257 .right_margin = 0x09, 257 .right_margin = 0x0a,
258 .vsync_len = 0x04, 258 .vsync_len = 0x02,
259 .upper_margin = 0x08, 259 .upper_margin = 0x08,
260 .lower_margin = 0x14, 260 .lower_margin = 0x14,
261 .sync = 0, 261 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
262 .lccr0 = 0x07800080, 262 .lccr0 = 0x07800080,
263 .lccr3 = 0x04400007, 263 .lccr3 = 0x00400000,
264 .pxafb_backlight_power = lpd270_backlight_power,
265};
266
267/* 12.1" TFT SVGA (LoLo display number 2) */
268static struct pxafb_mach_info sharp_lq121s1dg31 __initdata = {
269 .pixclock = 50000,
270 .xres = 800,
271 .yres = 600,
272 .bpp = 16,
273 .hsync_len = 0x05,
274 .left_margin = 0x52,
275 .right_margin = 0x05,
276 .vsync_len = 0x04,
277 .upper_margin = 0x14,
278 .lower_margin = 0x0a,
279 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
280 .lccr0 = 0x07800080,
281 .lccr3 = 0x00400000,
282 .pxafb_backlight_power = lpd270_backlight_power,
283};
284
285/* 3.6" TFT QVGA (LoLo display number 3) */
286static struct pxafb_mach_info sharp_lq036q1da01 __initdata = {
287 .pixclock = 150000,
288 .xres = 320,
289 .yres = 240,
290 .bpp = 16,
291 .hsync_len = 0x0e,
292 .left_margin = 0x04,
293 .right_margin = 0x0a,
294 .vsync_len = 0x03,
295 .upper_margin = 0x03,
296 .lower_margin = 0x03,
297 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
298 .lccr0 = 0x07800080,
299 .lccr3 = 0x00400000,
264 .pxafb_backlight_power = lpd270_backlight_power, 300 .pxafb_backlight_power = lpd270_backlight_power,
265}; 301};
266 302
267/* 6.4" TFT VGA (LoLo display number 5) */ 303/* 6.4" TFT VGA (LoLo display number 5) */
268static struct pxafb_mach_info sharp_lq64d343 __initdata = { 304static struct pxafb_mach_info sharp_lq64d343 __initdata = {
269 .pixclock = 20000, 305 .pixclock = 25000,
270 .xres = 640, 306 .xres = 640,
271 .yres = 480, 307 .yres = 480,
272 .bpp = 16, 308 .bpp = 16,
273 .hsync_len = 49, 309 .hsync_len = 0x31,
274 .left_margin = 0x89, 310 .left_margin = 0x89,
275 .right_margin = 0x19, 311 .right_margin = 0x19,
276 .vsync_len = 18, 312 .vsync_len = 0x12,
277 .upper_margin = 0x22, 313 .upper_margin = 0x22,
278 .lower_margin = 0, 314 .lower_margin = 0x00,
279 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 315 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
280 .lccr0 = 0x07800080, 316 .lccr0 = 0x07800080,
281 .lccr3 = 0x04400001, 317 .lccr3 = 0x00400000,
318 .pxafb_backlight_power = lpd270_backlight_power,
319};
320
321/* 10.4" TFT VGA (LoLo display number 7) */
322static struct pxafb_mach_info sharp_lq10d368 __initdata = {
323 .pixclock = 25000,
324 .xres = 640,
325 .yres = 480,
326 .bpp = 16,
327 .hsync_len = 0x31,
328 .left_margin = 0x89,
329 .right_margin = 0x19,
330 .vsync_len = 0x12,
331 .upper_margin = 0x22,
332 .lower_margin = 0x00,
333 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
334 .lccr0 = 0x07800080,
335 .lccr3 = 0x00400000,
282 .pxafb_backlight_power = lpd270_backlight_power, 336 .pxafb_backlight_power = lpd270_backlight_power,
283}; 337};
284 338
285/* 3.5" TFT QVGA (LoLo display number 8) */ 339/* 3.5" TFT QVGA (LoLo display number 8) */
286static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = { 340static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = {
287 .pixclock = 100000, 341 .pixclock = 150000,
288 .xres = 240, 342 .xres = 240,
289 .yres = 320, 343 .yres = 320,
290 .bpp = 16, 344 .bpp = 16,
291 .hsync_len = 0x34, 345 .hsync_len = 0x0e,
292 .left_margin = 0x09, 346 .left_margin = 0x0a,
293 .right_margin = 0x09, 347 .right_margin = 0x0a,
294 .vsync_len = 0x08, 348 .vsync_len = 0x03,
295 .upper_margin = 0x05, 349 .upper_margin = 0x05,
296 .lower_margin = 0x14, 350 .lower_margin = 0x14,
297 .sync = 0, 351 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
298 .lccr0 = 0x07800080, 352 .lccr0 = 0x07800080,
299 .lccr3 = 0x04400007, 353 .lccr3 = 0x00400000,
300 .pxafb_backlight_power = lpd270_backlight_power, 354 .pxafb_backlight_power = lpd270_backlight_power,
301}; 355};
302 356
357static struct pxafb_mach_info *lpd270_lcd_to_use;
358
359static int __init lpd270_set_lcd(char *str)
360{
361 if (!strnicmp(str, "lq057q3dc02", 11)) {
362 lpd270_lcd_to_use = &sharp_lq057q3dc02;
363 } else if (!strnicmp(str, "lq121s1dg31", 11)) {
364 lpd270_lcd_to_use = &sharp_lq121s1dg31;
365 } else if (!strnicmp(str, "lq036q1da01", 11)) {
366 lpd270_lcd_to_use = &sharp_lq036q1da01;
367 } else if (!strnicmp(str, "lq64d343", 8)) {
368 lpd270_lcd_to_use = &sharp_lq64d343;
369 } else if (!strnicmp(str, "lq10d368", 8)) {
370 lpd270_lcd_to_use = &sharp_lq10d368;
371 } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
372 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
373 } else {
374 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
375 }
376
377 return 1;
378}
379
380__setup("lcd=", lpd270_set_lcd);
381
303static struct platform_device *platform_devices[] __initdata = { 382static struct platform_device *platform_devices[] __initdata = {
304 &smc91x_device, 383 &smc91x_device,
305 &lpd270_audio_device, 384 &lpd270_audio_device,
@@ -345,9 +424,8 @@ static void __init lpd270_init(void)
345 424
346 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 425 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
347 426
348 // set_pxa_fb_info(&sharp_lq057q3dc02); 427 if (lpd270_lcd_to_use != NULL)
349 set_pxa_fb_info(&sharp_lq64d343); 428 set_pxa_fb_info(lpd270_lcd_to_use);
350 // set_pxa_fb_info(&sharp_lq035q7db02_20);
351 429
352 pxa_set_ohci_info(&lpd270_ohci_platform_data); 430 pxa_set_ohci_info(&lpd270_ohci_platform_data);
353} 431}
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 1ab26c6914f2..6a9a669d60de 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -419,7 +419,7 @@ static int lubbock_mci_init(struct device *dev,
419 init_timer(&mmc_timer); 419 init_timer(&mmc_timer);
420 mmc_timer.data = (unsigned long) data; 420 mmc_timer.data = (unsigned long) data;
421 return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int, 421 return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int,
422 SA_SAMPLE_RANDOM, "lubbock-sd-detect", data); 422 IRQF_SAMPLE_RANDOM, "lubbock-sd-detect", data);
423} 423}
424 424
425static int lubbock_mci_get_ro(struct device *dev) 425static int lubbock_mci_get_ro(struct device *dev)
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index b307f11951df..21ddf3de2f6e 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -331,7 +331,7 @@ static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_in
331 */ 331 */
332 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; 332 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
333 333
334 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, SA_INTERRUPT, 334 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
335 "MMC card detect", data); 335 "MMC card detect", data);
336 if (err) { 336 if (err) {
337 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 337 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 9a9fa87cea9f..6dbff6d94801 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -212,7 +212,7 @@ static int poodle_mci_init(struct device *dev, irqreturn_t (*poodle_detect_int)(
212 poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250); 212 poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
213 213
214 err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, 214 err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int,
215 SA_INTERRUPT | SA_TRIGGER_RISING | SA_TRIGGER_FALLING, 215 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
216 "MMC card detect", data); 216 "MMC card detect", data);
217 if (err) { 217 if (err) {
218 printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 218 printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 0f1648780c41..db6e8f56a75f 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -18,11 +18,11 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/irq.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22 23
23#include <asm/hardware.h> 24#include <asm/hardware.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25#include <asm/irq.h>
26#include <asm/apm.h> 26#include <asm/apm.h>
27#include <asm/arch/pm.h> 27#include <asm/arch/pm.h>
28#include <asm/arch/pxa-regs.h> 28#include <asm/arch/pxa-regs.h>
@@ -142,18 +142,18 @@ void sharpsl_pm_pxa_init(void)
142 pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batlock | GPIO_IN); 142 pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batlock | GPIO_IN);
143 143
144 /* Register interrupt handlers */ 144 /* Register interrupt handlers */
145 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, SA_INTERRUPT, "AC Input Detect", sharpsl_ac_isr)) { 145 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED, "AC Input Detect", sharpsl_ac_isr)) {
146 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin)); 146 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
147 } 147 }
148 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQT_BOTHEDGE); 148 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQT_BOTHEDGE);
149 149
150 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, SA_INTERRUPT, "Battery Cover", sharpsl_fatal_isr)) { 150 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED, "Battery Cover", sharpsl_fatal_isr)) {
151 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock)); 151 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
152 } 152 }
153 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQT_FALLING); 153 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQT_FALLING);
154 154
155 if (sharpsl_pm.machinfo->gpio_fatal) { 155 if (sharpsl_pm.machinfo->gpio_fatal) {
156 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, SA_INTERRUPT, "Fatal Battery", sharpsl_fatal_isr)) { 156 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED, "Fatal Battery", sharpsl_fatal_isr)) {
157 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal)); 157 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
158 } 158 }
159 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING); 159 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING);
@@ -162,7 +162,7 @@ void sharpsl_pm_pxa_init(void)
162 if (sharpsl_pm.machinfo->batfull_irq) 162 if (sharpsl_pm.machinfo->batfull_irq)
163 { 163 {
164 /* Register interrupt handler. */ 164 /* Register interrupt handler. */
165 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, SA_INTERRUPT, "CO", sharpsl_chrg_full_isr)) { 165 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED, "CO", sharpsl_chrg_full_isr)) {
166 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); 166 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
167 } 167 }
168 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQT_RISING); 168 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQT_RISING);
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index eb9937f6f5cd..1c32a9310dc2 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -308,7 +308,7 @@ static int spitz_mci_init(struct device *dev, irqreturn_t (*spitz_detect_int)(in
308 spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250); 308 spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
309 309
310 err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, 310 err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int,
311 SA_INTERRUPT | SA_TRIGGER_RISING | SA_TRIGGER_FALLING, 311 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
312 "MMC card detect", data); 312 "MMC card detect", data);
313 if (err) { 313 if (err) {
314 printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 314 printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 1ef85fcc6c06..5dbd191c57c4 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -117,7 +117,7 @@ pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
117 117
118static struct irqaction pxa_timer_irq = { 118static struct irqaction pxa_timer_irq = {
119 .name = "PXA Timer Tick", 119 .name = "PXA Timer Tick",
120 .flags = SA_INTERRUPT | SA_TIMER, 120 .flags = IRQF_DISABLED | IRQF_TIMER,
121 .handler = pxa_timer_interrupt, 121 .handler = pxa_timer_interrupt,
122}; 122};
123 123
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 7152bc13680f..249353616aba 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -185,7 +185,7 @@ static int tosa_mci_init(struct device *dev, irqreturn_t (*tosa_detect_int)(int,
185 185
186 tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250); 186 tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
187 187
188 err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, SA_INTERRUPT, 188 err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, IRQF_DISABLED,
189 "MMC/SD card detect", data); 189 "MMC/SD card detect", data);
190 if (err) { 190 if (err) {
191 printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 191 printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
new file mode 100644
index 000000000000..7c3007df1bd6
--- /dev/null
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -0,0 +1,473 @@
1/*
2 * linux/arch/arm/mach-pxa/trizeps4.c
3 *
4 * Support for the Keith und Koep Trizeps4 Module Platform.
5 *
6 * Author: Jürgen Schindele
7 * Created: 20 02, 2006
8 * Copyright: Jürgen Schindele
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/sysdev.h>
19#include <linux/interrupt.h>
20#include <linux/sched.h>
21#include <linux/bitops.h>
22#include <linux/fb.h>
23#include <linux/ioport.h>
24#include <linux/delay.h>
25#include <linux/serial_8250.h>
26#include <linux/mtd/mtd.h>
27#include <linux/mtd/partitions.h>
28
29#include <asm/types.h>
30#include <asm/setup.h>
31#include <asm/memory.h>
32#include <asm/mach-types.h>
33#include <asm/hardware.h>
34#include <asm/irq.h>
35#include <asm/sizes.h>
36
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39#include <asm/mach/irq.h>
40#include <asm/mach/flash.h>
41
42#include <asm/arch/pxa-regs.h>
43#include <asm/arch/trizeps4.h>
44#include <asm/arch/audio.h>
45#include <asm/arch/pxafb.h>
46#include <asm/arch/mmc.h>
47#include <asm/arch/irda.h>
48#include <asm/arch/ohci.h>
49
50#include "generic.h"
51
52/********************************************************************************************
53 * ONBOARD FLASH
54 ********************************************************************************************/
55static struct mtd_partition trizeps4_partitions[] = {
56 {
57 .name = "Bootloader",
58 .size = 0x00040000,
59 .offset = 0,
60 .mask_flags = MTD_WRITEABLE /* force read-only */
61 },{
62 .name = "Kernel",
63 .size = 0x00400000,
64 .offset = 0x00040000
65 },{
66 .name = "Filesystem",
67 .size = MTDPART_SIZ_FULL,
68 .offset = 0x00440000
69 }
70};
71
72static struct flash_platform_data trizeps4_flash_data[] = {
73 {
74 .map_name = "cfi_probe",
75 .parts = trizeps4_partitions,
76 .nr_parts = ARRAY_SIZE(trizeps4_partitions)
77 }
78};
79
80static struct resource flash_resource = {
81 .start = PXA_CS0_PHYS,
82 .end = PXA_CS0_PHYS + SZ_64M - 1,
83 .flags = IORESOURCE_MEM,
84};
85
86static struct platform_device flash_device = {
87 .name = "pxa2xx-flash",
88 .id = 0,
89 .dev = {
90 .platform_data = &trizeps4_flash_data,
91 },
92 .resource = &flash_resource,
93 .num_resources = 1,
94};
95
96/********************************************************************************************
97 * DAVICOM DM9000 Ethernet
98 ********************************************************************************************/
99static struct resource dm9000_resources[] = {
100 [0] = {
101 .start = TRIZEPS4_ETH_PHYS+0x300,
102 .end = TRIZEPS4_ETH_PHYS+0x400-1,
103 .flags = IORESOURCE_MEM,
104 },
105 [1] = {
106 .start = TRIZEPS4_ETH_PHYS+0x8300,
107 .end = TRIZEPS4_ETH_PHYS+0x8400-1,
108 .flags = IORESOURCE_MEM,
109 },
110 [2] = {
111 .start = TRIZEPS4_ETH_IRQ,
112 .end = TRIZEPS4_ETH_IRQ,
113 .flags = (IORESOURCE_IRQ | IRQT_RISING),
114 },
115};
116
117static struct platform_device dm9000_device = {
118 .name = "dm9000",
119 .id = -1,
120 .num_resources = ARRAY_SIZE(dm9000_resources),
121 .resource = dm9000_resources,
122};
123
124/********************************************************************************************
125 * PXA270 serial ports
126 ********************************************************************************************/
127static struct plat_serial8250_port tri_serial_ports[] = {
128#ifdef CONFIG_SERIAL_PXA
129 /* this uses the own PXA driver */
130 {
131 0,
132 },
133#else
134 /* this uses the generic 8520 driver */
135 [0] = {
136 .membase = (void *)&FFUART,
137 .irq = IRQ_FFUART,
138 .flags = UPF_BOOT_AUTOCONF,
139 .iotype = UPIO_MEM32,
140 .regshift = 2,
141 .uartclk = (921600*16),
142 },
143 [1] = {
144 .membase = (void *)&BTUART,
145 .irq = IRQ_BTUART,
146 .flags = UPF_BOOT_AUTOCONF,
147 .iotype = UPIO_MEM32,
148 .regshift = 2,
149 .uartclk = (921600*16),
150 },
151 {
152 0,
153 },
154#endif
155};
156
157static struct platform_device uart_devices = {
158 .name = "serial8250",
159 .id = 0,
160 .dev = {
161 .platform_data = tri_serial_ports,
162 },
163 .num_resources = 0,
164 .resource = NULL,
165};
166
167/********************************************************************************************
168 * PXA270 ac97 sound codec
169 ********************************************************************************************/
170static struct platform_device ac97_audio_device = {
171 .name = "pxa2xx-ac97",
172 .id = -1,
173};
174
175static struct platform_device * trizeps4_devices[] __initdata = {
176 &flash_device,
177 &uart_devices,
178 &dm9000_device,
179 &ac97_audio_device,
180};
181
182#ifdef CONFIG_MACH_TRIZEPS4_CONXS
183static short trizeps_conxs_bcr;
184
185/* PCCARD power switching supports only 3,3V */
186void board_pcmcia_power(int power)
187{
188 if (power) {
189 /* switch power on, put in reset and enable buffers */
190 trizeps_conxs_bcr |= power;
191 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
192 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
193 ConXS_BCR = trizeps_conxs_bcr;
194 /* wait a little */
195 udelay(2000);
196 /* take reset away */
197 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
198 ConXS_BCR = trizeps_conxs_bcr;
199 udelay(2000);
200 } else {
201 /* put in reset */
202 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
203 ConXS_BCR = trizeps_conxs_bcr;
204 udelay(1000);
205 /* switch power off */
206 trizeps_conxs_bcr &= ~(0xf);
207 ConXS_BCR = trizeps_conxs_bcr;
208
209 }
210 pr_debug("%s: o%s 0x%x\n", __FUNCTION__, power ? "n": "ff", trizeps_conxs_bcr);
211}
212
213/* backlight power switching for LCD panel */
214static void board_backlight_power(int on)
215{
216 if (on) {
217 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
218 } else {
219 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
220 }
221 pr_debug("%s: o%s 0x%x\n", __FUNCTION__, on ? "n" : "ff", trizeps_conxs_bcr);
222 ConXS_BCR = trizeps_conxs_bcr;
223}
224
225/* Powersupply for MMC/SD cardslot */
226static void board_mci_power(struct device *dev, unsigned int vdd)
227{
228 struct pxamci_platform_data* p_d = dev->platform_data;
229
230 if (( 1 << vdd) & p_d->ocr_mask) {
231 pr_debug("%s: on\n", __FUNCTION__);
232 /* FIXME fill in values here */
233 } else {
234 pr_debug("%s: off\n", __FUNCTION__);
235 /* FIXME fill in values here */
236 }
237}
238
239static short trizeps_conxs_ircr;
240
241/* Switch modes and Power for IRDA receiver */
242static void board_irda_mode(struct device *dev, int mode)
243{
244 unsigned long flags;
245
246 local_irq_save(flags);
247 if (mode & IR_SIRMODE) {
248 /* Slow mode */
249 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
250 } else if (mode & IR_FIRMODE) {
251 /* Fast mode */
252 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
253 }
254 if (mode & IR_OFF) {
255 trizeps_conxs_ircr |= ConXS_IRCR_SD;
256 } else {
257 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
258 }
259 /* FIXME write values to register */
260 local_irq_restore(flags);
261}
262
263#else
264/* for other baseboards define dummies */
265void board_pcmcia_power(int power) {;}
266#define board_backlight_power NULL
267#define board_mci_power NULL
268#define board_irda_mode NULL
269
270#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
271EXPORT_SYMBOL(board_pcmcia_power);
272
273static int trizeps4_mci_init(struct device *dev, irqreturn_t (*mci_detect_int)(int, void *, struct pt_regs *), void *data)
274{
275 int err;
276 /* setup GPIO for PXA27x MMC controller */
277 pxa_gpio_mode(GPIO32_MMCCLK_MD);
278 pxa_gpio_mode(GPIO112_MMCCMD_MD);
279 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
280 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
281 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
282 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
283
284 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
285
286 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
287 IRQF_DISABLED | IRQF_TRIGGER_RISING,
288 "MMC card detect", data);
289 if (err) {
290 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
291 return -1;
292 }
293 return 0;
294}
295
296static void trizeps4_mci_exit(struct device *dev, void *data)
297{
298 free_irq(TRIZEPS4_MMC_IRQ, data);
299}
300
301static struct pxamci_platform_data trizeps4_mci_platform_data = {
302 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
303 .init = trizeps4_mci_init,
304 .exit = trizeps4_mci_exit,
305 .setpower = board_mci_power,
306};
307
308static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
309 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
310 .transceiver_mode = board_irda_mode,
311};
312
313static int trizeps4_ohci_init(struct device *dev)
314{
315 /* setup Port1 GPIO pin. */
316 pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
317 pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
318
319 /* Set the Power Control Polarity Low and Power Sense
320 Polarity Low to active low. */
321 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
322 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
323
324 return 0;
325}
326
327static void trizeps4_ohci_exit(struct device *dev)
328{
329 ;
330}
331
332static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
333 .port_mode = PMM_PERPORT_MODE,
334 .init = trizeps4_ohci_init,
335 .exit = trizeps4_ohci_exit,
336};
337
338static struct map_desc trizeps4_io_desc[] __initdata = {
339 { /* ConXS CFSR */
340 .virtual = TRIZEPS4_CFSR_VIRT,
341 .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
342 .length = 0x00001000,
343 .type = MT_DEVICE
344 },
345 { /* ConXS BCR */
346 .virtual = TRIZEPS4_BOCR_VIRT,
347 .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
348 .length = 0x00001000,
349 .type = MT_DEVICE
350 },
351 { /* ConXS IRCR */
352 .virtual = TRIZEPS4_IRCR_VIRT,
353 .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
354 .length = 0x00001000,
355 .type = MT_DEVICE
356 },
357 { /* ConXS DCR */
358 .virtual = TRIZEPS4_DICR_VIRT,
359 .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
360 .length = 0x00001000,
361 .type = MT_DEVICE
362 },
363 { /* ConXS UPSR */
364 .virtual = TRIZEPS4_UPSR_VIRT,
365 .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
366 .length = 0x00001000,
367 .type = MT_DEVICE
368 }
369};
370
371static struct pxafb_mach_info sharp_lcd __initdata = {
372 .pixclock = 78000,
373 .xres = 640,
374 .yres = 480,
375 .bpp = 8,
376 .hsync_len = 4,
377 .left_margin = 4,
378 .right_margin = 4,
379 .vsync_len = 2,
380 .upper_margin = 0,
381 .lower_margin = 0,
382 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
383 .cmap_greyscale = 0,
384 .cmap_inverse = 0,
385 .cmap_static = 0,
386 .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
387 .lccr3 = 0x0340ff02,
388 .pxafb_backlight_power = board_backlight_power,
389};
390
391static void __init trizeps4_fixup(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi)
392{
393}
394
395static void __init trizeps4_init(void)
396{
397 platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
398
399 set_pxa_fb_info(&sharp_lcd);
400
401 pxa_set_mci_info(&trizeps4_mci_platform_data);
402 pxa_set_ficp_info(&trizeps4_ficp_platform_data);
403 pxa_set_ohci_info(&trizeps4_ohci_platform_data);
404}
405
406static void __init trizeps4_map_io(void)
407{
408 pxa_map_io();
409 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
410
411 /* for DiskOnChip */
412 pxa_gpio_mode(GPIO15_nCS_1_MD);
413
414 /* for off-module PIC on ConXS board */
415 pxa_gpio_mode(GPIO_PIC | GPIO_IN);
416
417 /* UCB1400 irq */
418 pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
419
420 /* for DM9000 LAN */
421 pxa_gpio_mode(GPIO78_nCS_2_MD);
422 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
423
424 /* for PCMCIA device */
425 pxa_gpio_mode(GPIO_PCD | GPIO_IN);
426 pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
427
428 /* for I2C adapter */
429 pxa_gpio_mode(GPIO117_I2CSCL_MD);
430 pxa_gpio_mode(GPIO118_I2CSDA_MD);
431
432 /* MMC_DET s.o. */
433 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
434
435 /* whats that for ??? */
436 pxa_gpio_mode(GPIO79_nCS_3_MD);
437
438 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
439 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
440
441#ifdef CONFIG_MACH_TRIZEPS4_CONXS
442#ifdef CONFIG_IDE_PXA_CF
443 /* if boot direct from compact flash dont disable power */
444 trizeps_conxs_bcr = 0x0009;
445#else
446 /* this is the reset value */
447 trizeps_conxs_bcr = 0x00A0;
448#endif
449 ConXS_BCR = trizeps_conxs_bcr;
450#endif
451
452 PWER = 0x00000002;
453 PFER = 0x00000000;
454 PRER = 0x00000002;
455 PGSR0 = 0x0158C000;
456 PGSR1 = 0x00FF0080;
457 PGSR2 = 0x0001C004;
458 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
459 PCFR |= PCFR_OPDE;
460}
461
462MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
463 /* MAINTAINER("Jürgen Schindele") */
464 .phys_io = 0x40000000,
465 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
466 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
467 .fixup = trizeps4_fixup,
468 .init_machine = trizeps4_init,
469 .map_io = trizeps4_map_io,
470 .init_irq = pxa_init_irq,
471 .timer = &pxa_timer,
472MACHINE_END
473
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index eb09d3859d6d..da0286973823 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -536,7 +536,7 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_reg
536 536
537static struct irqaction realview_timer_irq = { 537static struct irqaction realview_timer_irq = {
538 .name = "RealView Timer Tick", 538 .name = "RealView Timer Tick",
539 .flags = SA_INTERRUPT | SA_TIMER, 539 .flags = IRQF_DISABLED | IRQF_TIMER,
540 .handler = realview_timer_interrupt, 540 .handler = realview_timer_interrupt,
541}; 541};
542 542
diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c
index bd86ffba8810..ac511d41d4d7 100644
--- a/arch/arm/mach-rpc/dma.c
+++ b/arch/arm/mach-rpc/dma.c
@@ -128,7 +128,7 @@ static irqreturn_t iomd_dma_handle(int irq, void *dev_id, struct pt_regs *regs)
128static int iomd_request_dma(dmach_t channel, dma_t *dma) 128static int iomd_request_dma(dmach_t channel, dma_t *dma)
129{ 129{
130 return request_irq(dma->dma_irq, iomd_dma_handle, 130 return request_irq(dma->dma_irq, iomd_dma_handle,
131 SA_INTERRUPT, dma->device_id, dma); 131 IRQF_DISABLED, dma->device_id, dma);
132} 132}
133 133
134static void iomd_free_dma(dmach_t channel, dma_t *dma) 134static void iomd_free_dma(dmach_t channel, dma_t *dma)
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index fbbeb0553006..def4441d2442 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -136,8 +136,8 @@ bast_irq_pc104_demux(unsigned int irq,
136 for (i = 0; stat != 0; i++, stat >>= 1) { 136 for (i = 0; stat != 0; i++, stat >>= 1) {
137 if (stat & 1) { 137 if (stat & 1) {
138 irqno = bast_pc104_irqs[i]; 138 irqno = bast_pc104_irqs[i];
139 139 desc = irq_desc + irqno;
140 desc_handle_irq(irqno, irq_desc + irqno, regs); 140 desc_handle_irq(irqno, desc, regs);
141 } 141 }
142 } 142 }
143 } 143 }
@@ -156,7 +156,7 @@ static __init int bast_irq_init(void)
156 156
157 set_irq_chained_handler(IRQ_ISA, bast_irq_pc104_demux); 157 set_irq_chained_handler(IRQ_ISA, bast_irq_pc104_demux);
158 158
159 /* reigster our IRQs */ 159 /* register our IRQs */
160 160
161 for (i = 0; i < 4; i++) { 161 for (i = 0; i < 4; i++) {
162 unsigned int irqno = bast_pc104_irqs[i]; 162 unsigned int irqno = bast_pc104_irqs[i];
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index b0aaf4328732..094cc52745c5 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -718,7 +718,7 @@ int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client,
718 pr_debug("dma%d: %s : requesting irq %d\n", 718 pr_debug("dma%d: %s : requesting irq %d\n",
719 channel, __FUNCTION__, chan->irq); 719 channel, __FUNCTION__, chan->irq);
720 720
721 err = request_irq(chan->irq, s3c2410_dma_irq, SA_INTERRUPT, 721 err = request_irq(chan->irq, s3c2410_dma_irq, IRQF_DISABLED,
722 client->name, (void *)chan); 722 client->name, (void *)chan);
723 723
724 if (err) { 724 if (err) {
diff --git a/arch/arm/mach-s3c2410/time.c b/arch/arm/mach-s3c2410/time.c
index 47387c5b9723..00d1cfca9712 100644
--- a/arch/arm/mach-s3c2410/time.c
+++ b/arch/arm/mach-s3c2410/time.c
@@ -22,6 +22,7 @@
22#include <linux/sched.h> 22#include <linux/sched.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/irq.h>
25#include <linux/err.h> 26#include <linux/err.h>
26#include <linux/clk.h> 27#include <linux/clk.h>
27 28
@@ -137,7 +138,7 @@ s3c2410_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
137 138
138static struct irqaction s3c2410_timer_irq = { 139static struct irqaction s3c2410_timer_irq = {
139 .name = "S3C2410 Timer Tick", 140 .name = "S3C2410 Timer Tick",
140 .flags = SA_INTERRUPT | SA_TIMER, 141 .flags = IRQF_DISABLED | IRQF_TIMER,
141 .handler = s3c2410_timer_interrupt, 142 .handler = s3c2410_timer_interrupt,
142}; 143};
143 144
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 495f8c6ffcb6..6b22d8f0a00d 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -85,8 +85,8 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on)
85 85
86 if (on) { 86 if (on) {
87 ret = request_irq(IRQ_USBOC, usb_simtec_ocirq, 87 ret = request_irq(IRQ_USBOC, usb_simtec_ocirq,
88 SA_INTERRUPT | SA_TRIGGER_RISING | 88 IRQF_DISABLED | IRQF_TRIGGER_RISING |
89 SA_TRIGGER_FALLING, 89 IRQF_TRIGGER_FALLING,
90 "USB Over-current", info); 90 "USB Over-current", info);
91 if (ret != 0) { 91 if (ret != 0) {
92 printk(KERN_ERR "failed to request usb oc irq\n"); 92 printk(KERN_ERR "failed to request usb oc irq\n");
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index e0f6d57b5065..31afe50d7cd5 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/tty.h> 15#include <linux/tty.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/irq.h>
17#include <linux/mtd/mtd.h> 18#include <linux/mtd/mtd.h>
18#include <linux/mtd/partitions.h> 19#include <linux/mtd/partitions.h>
19 20
diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c
index 696d7d29c8a5..45b1e71f111d 100644
--- a/arch/arm/mach-sa1100/collie_pm.c
+++ b/arch/arm/mach-sa1100/collie_pm.c
@@ -45,12 +45,12 @@ static void collie_charger_init(void)
45 } 45 }
46 46
47 /* Register interrupt handler. */ 47 /* Register interrupt handler. */
48 if ((err = request_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr, SA_INTERRUPT, 48 if ((err = request_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr, IRQF_DISABLED,
49 "ACIN", sharpsl_ac_isr))) { 49 "ACIN", sharpsl_ac_isr))) {
50 printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_AC_IN); 50 printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_AC_IN);
51 return; 51 return;
52 } 52 }
53 if ((err = request_irq(COLLIE_IRQ_GPIO_CO, sharpsl_chrg_full_isr, SA_INTERRUPT, 53 if ((err = request_irq(COLLIE_IRQ_GPIO_CO, sharpsl_chrg_full_isr, IRQF_DISABLED,
54 "CO", sharpsl_chrg_full_isr))) { 54 "CO", sharpsl_chrg_full_isr))) {
55 free_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr); 55 free_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr);
56 printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_CO); 56 printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_CO);
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c
index 04c94ab6c18b..639597729932 100644
--- a/arch/arm/mach-sa1100/cpu-sa1110.c
+++ b/arch/arm/mach-sa1100/cpu-sa1110.c
@@ -15,7 +15,10 @@
15 * SDRAM reads (rev A0, B0, B1) 15 * SDRAM reads (rev A0, B0, B1)
16 * 16 *
17 * We ignore rev. A0 and B0 devices; I don't think they're worth supporting. 17 * We ignore rev. A0 and B0 devices; I don't think they're worth supporting.
18 *
19 * The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type
18 */ 20 */
21#include <linux/moduleparam.h>
19#include <linux/types.h> 22#include <linux/types.h>
20#include <linux/kernel.h> 23#include <linux/kernel.h>
21#include <linux/sched.h> 24#include <linux/sched.h>
@@ -35,6 +38,7 @@
35static struct cpufreq_driver sa1110_driver; 38static struct cpufreq_driver sa1110_driver;
36 39
37struct sdram_params { 40struct sdram_params {
41 const char name[16];
38 u_char rows; /* bits */ 42 u_char rows; /* bits */
39 u_char cas_latency; /* cycles */ 43 u_char cas_latency; /* cycles */
40 u_char tck; /* clock cycle time (ns) */ 44 u_char tck; /* clock cycle time (ns) */
@@ -50,54 +54,53 @@ struct sdram_info {
50 u_int mdcas[3]; 54 u_int mdcas[3];
51}; 55};
52 56
53static struct sdram_params tc59sm716_cl2_params __initdata = { 57static struct sdram_params sdram_tbl[] __initdata = {
54 .rows = 12, 58 { /* Toshiba TC59SM716 CL2 */
55 .tck = 10, 59 .name = "TC59SM716-CL2",
56 .trcd = 20, 60 .rows = 12,
57 .trp = 20, 61 .tck = 10,
58 .twr = 10, 62 .trcd = 20,
59 .refresh = 64000, 63 .trp = 20,
60 .cas_latency = 2, 64 .twr = 10,
61}; 65 .refresh = 64000,
62 66 .cas_latency = 2,
63static struct sdram_params tc59sm716_cl3_params __initdata = { 67 }, { /* Toshiba TC59SM716 CL3 */
64 .rows = 12, 68 .name = "TC59SM716-CL3",
65 .tck = 8, 69 .rows = 12,
66 .trcd = 20, 70 .tck = 8,
67 .trp = 20, 71 .trcd = 20,
68 .twr = 8, 72 .trp = 20,
69 .refresh = 64000, 73 .twr = 8,
70 .cas_latency = 3, 74 .refresh = 64000,
71}; 75 .cas_latency = 3,
72 76 }, { /* Samsung K4S641632D TC75 */
73static struct sdram_params samsung_k4s641632d_tc75 __initdata = { 77 .name = "K4S641632D",
74 .rows = 14, 78 .rows = 14,
75 .tck = 9, 79 .tck = 9,
76 .trcd = 27, 80 .trcd = 27,
77 .trp = 20, 81 .trp = 20,
78 .twr = 9, 82 .twr = 9,
79 .refresh = 64000, 83 .refresh = 64000,
80 .cas_latency = 3, 84 .cas_latency = 3,
81}; 85 }, { /* Samsung KM416S4030CT */
82 86 .name = "KM416S4030CT",
83static struct sdram_params samsung_km416s4030ct __initdata = { 87 .rows = 13,
84 .rows = 13, 88 .tck = 8,
85 .tck = 8, 89 .trcd = 24, /* 3 CLKs */
86 .trcd = 24, /* 3 CLKs */ 90 .trp = 24, /* 3 CLKs */
87 .trp = 24, /* 3 CLKs */ 91 .twr = 16, /* Trdl: 2 CLKs */
88 .twr = 16, /* Trdl: 2 CLKs */ 92 .refresh = 64000,
89 .refresh = 64000, 93 .cas_latency = 3,
90 .cas_latency = 3, 94 }, { /* Winbond W982516AH75L CL3 */
91}; 95 .name = "W982516AH75L",
92 96 .rows = 16,
93static struct sdram_params wbond_w982516ah75l_cl3_params __initdata = { 97 .tck = 8,
94 .rows = 16, 98 .trcd = 20,
95 .tck = 8, 99 .trp = 20,
96 .trcd = 20, 100 .twr = 8,
97 .trp = 20, 101 .refresh = 64000,
98 .twr = 8, 102 .cas_latency = 3,
99 .refresh = 64000, 103 },
100 .cas_latency = 3,
101}; 104};
102 105
103static struct sdram_params sdram_params; 106static struct sdram_params sdram_params;
@@ -336,19 +339,36 @@ static struct cpufreq_driver sa1110_driver = {
336 .name = "sa1110", 339 .name = "sa1110",
337}; 340};
338 341
342static struct sdram_params *sa1110_find_sdram(const char *name)
343{
344 struct sdram_params *sdram;
345
346 for (sdram = sdram_tbl; sdram < sdram_tbl + ARRAY_SIZE(sdram_tbl); sdram++)
347 if (strcmp(name, sdram->name) == 0)
348 return sdram;
349
350 return NULL;
351}
352
353static char sdram_name[16];
354
339static int __init sa1110_clk_init(void) 355static int __init sa1110_clk_init(void)
340{ 356{
341 struct sdram_params *sdram = NULL; 357 struct sdram_params *sdram;
358 const char *name = sdram_name;
342 359
343 if (machine_is_assabet()) 360 if (!name[0]) {
344 sdram = &tc59sm716_cl3_params; 361 if (machine_is_assabet())
362 name = "TC59SM716-CL3";
345 363
346 if (machine_is_pt_system3()) 364 if (machine_is_pt_system3())
347 sdram = &samsung_k4s641632d_tc75; 365 name = "K4S641632D";
348 366
349 if (machine_is_h3100()) 367 if (machine_is_h3100())
350 sdram = &samsung_km416s4030ct; 368 name = "KM416S4030CT";
369 }
351 370
371 sdram = sa1110_find_sdram(name);
352 if (sdram) { 372 if (sdram) {
353 printk(KERN_DEBUG "SDRAM: tck: %d trcd: %d trp: %d" 373 printk(KERN_DEBUG "SDRAM: tck: %d trcd: %d trp: %d"
354 " twr: %d refresh: %d cas_latency: %d\n", 374 " twr: %d refresh: %d cas_latency: %d\n",
@@ -363,4 +383,5 @@ static int __init sa1110_clk_init(void)
363 return 0; 383 return 0;
364} 384}
365 385
386module_param_string(sdram, sdram_name, sizeof(sdram_name), 0);
366arch_initcall(sa1110_clk_init); 387arch_initcall(sa1110_clk_init);
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index be0e4427bec7..3c6441d4bc59 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -124,7 +124,7 @@ int sa1100_request_dma (dma_device_t device, const char *device_id,
124 124
125 i = dma - dma_chan; 125 i = dma - dma_chan;
126 regs = (dma_regs_t *)&DDAR(i); 126 regs = (dma_regs_t *)&DDAR(i);
127 err = request_irq(IRQ_DMA0 + i, dma_irq_handler, SA_INTERRUPT, 127 err = request_irq(IRQ_DMA0 + i, dma_irq_handler, IRQF_DISABLED,
128 device_id, regs); 128 device_id, regs);
129 if (err) { 129 if (err) {
130 printk(KERN_ERR 130 printk(KERN_ERR
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index e727ba87b9f2..7364478cec12 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -740,7 +740,7 @@ static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc, struct pt_re
740static struct irqaction h3800_irq = { 740static struct irqaction h3800_irq = {
741 .name = "h3800_asic", 741 .name = "h3800_asic",
742 .handler = h3800_IRQ_demux, 742 .handler = h3800_IRQ_demux,
743 .flags = SA_INTERRUPT | SA_TIMER, 743 .flags = IRQF_DISABLED | IRQF_TIMER,
744}; 744};
745 745
746u32 kpio_int_shadow = 0; 746u32 kpio_int_shadow = 0;
@@ -835,7 +835,7 @@ static void __init h3800_init_irq(void)
835 } 835 }
836#endif 836#endif
837 set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING); 837 set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING);
838 set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, &h3800_IRQ_demux); 838 set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, h3800_IRQ_demux);
839} 839}
840 840
841 841
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index b3a56024182e..2891b8ca86dd 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -11,12 +11,13 @@
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
14#include <linux/ioport.h> 16#include <linux/ioport.h>
15#include <linux/ptrace.h> 17#include <linux/ptrace.h>
16#include <linux/sysdev.h> 18#include <linux/sysdev.h>
17 19
18#include <asm/hardware.h> 20#include <asm/hardware.h>
19#include <asm/irq.h>
20#include <asm/mach/irq.h> 21#include <asm/mach/irq.h>
21 22
22#include "generic.h" 23#include "generic.h"
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 0709ebab531c..c7bf7e0038f0 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -7,6 +7,7 @@
7#include <linux/tty.h> 7#include <linux/tty.h>
8#include <linux/ioport.h> 8#include <linux/ioport.h>
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/irq.h>
10 11
11#include <linux/mtd/partitions.h> 12#include <linux/mtd/partitions.h>
12 13
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index e4b435e634e4..49ae716e16c2 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -11,6 +11,7 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irq.h>
14#include <linux/timex.h> 15#include <linux/timex.h>
15#include <linux/signal.h> 16#include <linux/signal.h>
16 17
@@ -110,7 +111,7 @@ sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
110 111
111static struct irqaction sa1100_timer_irq = { 112static struct irqaction sa1100_timer_irq = {
112 .name = "SA11xx Timer Tick", 113 .name = "SA11xx Timer Tick",
113 .flags = SA_INTERRUPT | SA_TIMER, 114 .flags = IRQF_DISABLED | IRQF_TIMER,
114 .handler = sa1100_timer_interrupt, 115 .handler = sa1100_timer_interrupt,
115}; 116};
116 117
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index 877600e212dd..1095df34fec0 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -6,6 +6,7 @@
6#include <linux/kernel.h> 6#include <linux/kernel.h>
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/interrupt.h> 8#include <linux/interrupt.h>
9#include <linux/irq.h>
9#include <linux/sched.h> 10#include <linux/sched.h>
10#include <linux/serial_8250.h> 11#include <linux/serial_8250.h>
11 12
@@ -89,7 +90,7 @@ shark_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
89 90
90static struct irqaction shark_timer_irq = { 91static struct irqaction shark_timer_irq = {
91 .name = "Shark Timer Tick", 92 .name = "Shark Timer Tick",
92 .flags = SA_INTERRUPT | SA_TIMER, 93 .flags = IRQF_DISABLED | IRQF_TIMER,
93 .handler = shark_timer_interrupt, 94 .handler = shark_timer_interrupt,
94}; 95};
95 96
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 08de8490fb69..a432539cc1bd 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -869,7 +869,7 @@ static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id, struct pt_re
869 869
870static struct irqaction versatile_timer_irq = { 870static struct irqaction versatile_timer_irq = {
871 .name = "Versatile Timer Tick", 871 .name = "Versatile Timer Tick",
872 .flags = SA_INTERRUPT | SA_TIMER, 872 .flags = IRQF_DISABLED | IRQF_TIMER,
873 .handler = versatile_timer_interrupt, 873 .handler = versatile_timer_interrupt,
874}; 874};
875 875
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c4bca753165b..5f80f184cd32 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -121,8 +121,8 @@ config CPU_ARM925T
121# ARM926T 121# ARM926T
122config CPU_ARM926T 122config CPU_ARM926T
123 bool "Support ARM926T processor" 123 bool "Support ARM926T processor"
124 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 124 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261
125 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 125 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261
126 select CPU_32v5 126 select CPU_32v5
127 select CPU_ABRT_EV5TJ 127 select CPU_ABRT_EV5TJ
128 select CPU_CACHE_VIVT 128 select CPU_CACHE_VIVT
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 7691cfdba567..dba7dddfe57d 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -27,7 +27,16 @@
27 27
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include <asm/io.h> 29#include <asm/io.h>
30#include <asm/mmu_context.h>
31#include <asm/pgalloc.h>
30#include <asm/tlbflush.h> 32#include <asm/tlbflush.h>
33#include <asm/sizes.h>
34
35/*
36 * Used by ioremap() and iounmap() code to mark (super)section-mapped
37 * I/O regions in vm_struct->flags field.
38 */
39#define VM_ARM_SECTION_MAPPING 0x80000000
31 40
32static inline void 41static inline void
33remap_area_pte(pte_t * pte, unsigned long address, unsigned long size, 42remap_area_pte(pte_t * pte, unsigned long address, unsigned long size,
@@ -113,10 +122,168 @@ remap_area_pages(unsigned long start, unsigned long pfn,
113 dir++; 122 dir++;
114 } while (address && (address < end)); 123 } while (address && (address < end));
115 124
116 flush_cache_vmap(start, end);
117 return err; 125 return err;
118} 126}
119 127
128
129void __check_kvm_seq(struct mm_struct *mm)
130{
131 unsigned int seq;
132
133 do {
134 seq = init_mm.context.kvm_seq;
135 memcpy(pgd_offset(mm, VMALLOC_START),
136 pgd_offset_k(VMALLOC_START),
137 sizeof(pgd_t) * (pgd_index(VMALLOC_END) -
138 pgd_index(VMALLOC_START)));
139 mm->context.kvm_seq = seq;
140 } while (seq != init_mm.context.kvm_seq);
141}
142
143#ifndef CONFIG_SMP
144/*
145 * Section support is unsafe on SMP - If you iounmap and ioremap a region,
146 * the other CPUs will not see this change until their next context switch.
147 * Meanwhile, (eg) if an interrupt comes in on one of those other CPUs
148 * which requires the new ioremap'd region to be referenced, the CPU will
149 * reference the _old_ region.
150 *
151 * Note that get_vm_area() allocates a guard 4K page, so we need to mask
152 * the size back to 1MB aligned or we will overflow in the loop below.
153 */
154static void unmap_area_sections(unsigned long virt, unsigned long size)
155{
156 unsigned long addr = virt, end = virt + (size & ~SZ_1M);
157 pgd_t *pgd;
158
159 flush_cache_vunmap(addr, end);
160 pgd = pgd_offset_k(addr);
161 do {
162 pmd_t pmd, *pmdp = pmd_offset(pgd, addr);
163
164 pmd = *pmdp;
165 if (!pmd_none(pmd)) {
166 /*
167 * Clear the PMD from the page table, and
168 * increment the kvm sequence so others
169 * notice this change.
170 *
171 * Note: this is still racy on SMP machines.
172 */
173 pmd_clear(pmdp);
174 init_mm.context.kvm_seq++;
175
176 /*
177 * Free the page table, if there was one.
178 */
179 if ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_TABLE)
180 pte_free_kernel(pmd_page_kernel(pmd));
181 }
182
183 addr += PGDIR_SIZE;
184 pgd++;
185 } while (addr < end);
186
187 /*
188 * Ensure that the active_mm is up to date - we want to
189 * catch any use-after-iounmap cases.
190 */
191 if (current->active_mm->context.kvm_seq != init_mm.context.kvm_seq)
192 __check_kvm_seq(current->active_mm);
193
194 flush_tlb_kernel_range(virt, end);
195}
196
197static int
198remap_area_sections(unsigned long virt, unsigned long pfn,
199 unsigned long size, unsigned long flags)
200{
201 unsigned long prot, addr = virt, end = virt + size;
202 pgd_t *pgd;
203
204 /*
205 * Remove and free any PTE-based mapping, and
206 * sync the current kernel mapping.
207 */
208 unmap_area_sections(virt, size);
209
210 prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO) |
211 (flags & (L_PTE_CACHEABLE | L_PTE_BUFFERABLE));
212
213 /*
214 * ARMv6 and above need XN set to prevent speculative prefetches
215 * hitting IO.
216 */
217 if (cpu_architecture() >= CPU_ARCH_ARMv6)
218 prot |= PMD_SECT_XN;
219
220 pgd = pgd_offset_k(addr);
221 do {
222 pmd_t *pmd = pmd_offset(pgd, addr);
223
224 pmd[0] = __pmd(__pfn_to_phys(pfn) | prot);
225 pfn += SZ_1M >> PAGE_SHIFT;
226 pmd[1] = __pmd(__pfn_to_phys(pfn) | prot);
227 pfn += SZ_1M >> PAGE_SHIFT;
228 flush_pmd_entry(pmd);
229
230 addr += PGDIR_SIZE;
231 pgd++;
232 } while (addr < end);
233
234 return 0;
235}
236
237static int
238remap_area_supersections(unsigned long virt, unsigned long pfn,
239 unsigned long size, unsigned long flags)
240{
241 unsigned long prot, addr = virt, end = virt + size;
242 pgd_t *pgd;
243
244 /*
245 * Remove and free any PTE-based mapping, and
246 * sync the current kernel mapping.
247 */
248 unmap_area_sections(virt, size);
249
250 prot = PMD_TYPE_SECT | PMD_SECT_SUPER | PMD_SECT_AP_WRITE |
251 PMD_DOMAIN(DOMAIN_IO) |
252 (flags & (L_PTE_CACHEABLE | L_PTE_BUFFERABLE));
253
254 /*
255 * ARMv6 and above need XN set to prevent speculative prefetches
256 * hitting IO.
257 */
258 if (cpu_architecture() >= CPU_ARCH_ARMv6)
259 prot |= PMD_SECT_XN;
260
261 pgd = pgd_offset_k(virt);
262 do {
263 unsigned long super_pmd_val, i;
264
265 super_pmd_val = __pfn_to_phys(pfn) | prot;
266 super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20;
267
268 for (i = 0; i < 8; i++) {
269 pmd_t *pmd = pmd_offset(pgd, addr);
270
271 pmd[0] = __pmd(super_pmd_val);
272 pmd[1] = __pmd(super_pmd_val);
273 flush_pmd_entry(pmd);
274
275 addr += PGDIR_SIZE;
276 pgd++;
277 }
278
279 pfn += SUPERSECTION_SIZE >> PAGE_SHIFT;
280 } while (addr < end);
281
282 return 0;
283}
284#endif
285
286
120/* 287/*
121 * Remap an arbitrary physical address space into the kernel virtual 288 * Remap an arbitrary physical address space into the kernel virtual
122 * address space. Needed when the kernel wants to access high addresses 289 * address space. Needed when the kernel wants to access high addresses
@@ -133,18 +300,41 @@ void __iomem *
133__ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, 300__ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
134 unsigned long flags) 301 unsigned long flags)
135{ 302{
303 int err;
136 unsigned long addr; 304 unsigned long addr;
137 struct vm_struct * area; 305 struct vm_struct * area;
138 306
307 /*
308 * High mappings must be supersection aligned
309 */
310 if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK))
311 return NULL;
312
139 area = get_vm_area(size, VM_IOREMAP); 313 area = get_vm_area(size, VM_IOREMAP);
140 if (!area) 314 if (!area)
141 return NULL; 315 return NULL;
142 addr = (unsigned long)area->addr; 316 addr = (unsigned long)area->addr;
143 if (remap_area_pages(addr, pfn, size, flags)) { 317
318#ifndef CONFIG_SMP
319 if ((((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) ||
320 cpu_is_xsc3()) &&
321 !((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) {
322 area->flags |= VM_ARM_SECTION_MAPPING;
323 err = remap_area_supersections(addr, pfn, size, flags);
324 } else if (!((__pfn_to_phys(pfn) | size | addr) & ~PMD_MASK)) {
325 area->flags |= VM_ARM_SECTION_MAPPING;
326 err = remap_area_sections(addr, pfn, size, flags);
327 } else
328#endif
329 err = remap_area_pages(addr, pfn, size, flags);
330
331 if (err) {
144 vunmap((void *)addr); 332 vunmap((void *)addr);
145 return NULL; 333 return NULL;
146 } 334 }
147 return (void __iomem *) (offset + (char *)addr); 335
336 flush_cache_vmap(addr, addr + size);
337 return (void __iomem *) (offset + addr);
148} 338}
149EXPORT_SYMBOL(__ioremap_pfn); 339EXPORT_SYMBOL(__ioremap_pfn);
150 340
@@ -173,6 +363,36 @@ EXPORT_SYMBOL(__ioremap);
173 363
174void __iounmap(void __iomem *addr) 364void __iounmap(void __iomem *addr)
175{ 365{
176 vunmap((void *)(PAGE_MASK & (unsigned long)addr)); 366 struct vm_struct **p, *tmp;
367 unsigned int section_mapping = 0;
368
369 addr = (void __iomem *)(PAGE_MASK & (unsigned long)addr);
370
371#ifndef CONFIG_SMP
372 /*
373 * If this is a section based mapping we need to handle it
374 * specially as the VM subysystem does not know how to handle
375 * such a beast. We need the lock here b/c we need to clear
376 * all the mappings before the area can be reclaimed
377 * by someone else.
378 */
379 write_lock(&vmlist_lock);
380 for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) {
381 if((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) {
382 if (tmp->flags & VM_ARM_SECTION_MAPPING) {
383 *p = tmp->next;
384 unmap_area_sections((unsigned long)tmp->addr,
385 tmp->size);
386 kfree(tmp);
387 section_mapping = 1;
388 }
389 break;
390 }
391 }
392 write_unlock(&vmlist_lock);
393#endif
394
395 if (!section_mapping)
396 vunmap(addr);
177} 397}
178EXPORT_SYMBOL(__iounmap); 398EXPORT_SYMBOL(__iounmap);
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index b0242c6ea066..38769f5862bc 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -302,16 +302,16 @@ static struct mem_types mem_types[] __initdata = {
302 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | 302 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
303 L_PTE_WRITE, 303 L_PTE_WRITE,
304 .prot_l1 = PMD_TYPE_TABLE, 304 .prot_l1 = PMD_TYPE_TABLE,
305 .prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED | 305 .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED |
306 PMD_SECT_AP_WRITE, 306 PMD_SECT_AP_WRITE,
307 .domain = DOMAIN_IO, 307 .domain = DOMAIN_IO,
308 }, 308 },
309 [MT_CACHECLEAN] = { 309 [MT_CACHECLEAN] = {
310 .prot_sect = PMD_TYPE_SECT, 310 .prot_sect = PMD_TYPE_SECT | PMD_BIT4,
311 .domain = DOMAIN_KERNEL, 311 .domain = DOMAIN_KERNEL,
312 }, 312 },
313 [MT_MINICLEAN] = { 313 [MT_MINICLEAN] = {
314 .prot_sect = PMD_TYPE_SECT | PMD_SECT_MINICACHE, 314 .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_MINICACHE,
315 .domain = DOMAIN_KERNEL, 315 .domain = DOMAIN_KERNEL,
316 }, 316 },
317 [MT_LOW_VECTORS] = { 317 [MT_LOW_VECTORS] = {
@@ -327,25 +327,25 @@ static struct mem_types mem_types[] __initdata = {
327 .domain = DOMAIN_USER, 327 .domain = DOMAIN_USER,
328 }, 328 },
329 [MT_MEMORY] = { 329 [MT_MEMORY] = {
330 .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, 330 .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_AP_WRITE,
331 .domain = DOMAIN_KERNEL, 331 .domain = DOMAIN_KERNEL,
332 }, 332 },
333 [MT_ROM] = { 333 [MT_ROM] = {
334 .prot_sect = PMD_TYPE_SECT, 334 .prot_sect = PMD_TYPE_SECT | PMD_BIT4,
335 .domain = DOMAIN_KERNEL, 335 .domain = DOMAIN_KERNEL,
336 }, 336 },
337 [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */ 337 [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */
338 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | 338 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
339 L_PTE_WRITE, 339 L_PTE_WRITE,
340 .prot_l1 = PMD_TYPE_TABLE, 340 .prot_l1 = PMD_TYPE_TABLE,
341 .prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED | 341 .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED |
342 PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE | 342 PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE |
343 PMD_SECT_TEX(1), 343 PMD_SECT_TEX(1),
344 .domain = DOMAIN_IO, 344 .domain = DOMAIN_IO,
345 }, 345 },
346 [MT_NONSHARED_DEVICE] = { 346 [MT_NONSHARED_DEVICE] = {
347 .prot_l1 = PMD_TYPE_TABLE, 347 .prot_l1 = PMD_TYPE_TABLE,
348 .prot_sect = PMD_TYPE_SECT | PMD_SECT_NONSHARED_DEV | 348 .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_NONSHARED_DEV |
349 PMD_SECT_AP_WRITE, 349 PMD_SECT_AP_WRITE,
350 .domain = DOMAIN_IO, 350 .domain = DOMAIN_IO,
351 } 351 }
@@ -375,14 +375,21 @@ void __init build_mem_type_table(void)
375 ecc_mask = 0; 375 ecc_mask = 0;
376 } 376 }
377 377
378 if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) { 378 /*
379 for (i = 0; i < ARRAY_SIZE(mem_types); i++) { 379 * Xscale must not have PMD bit 4 set for section mappings.
380 */
381 if (cpu_is_xscale())
382 for (i = 0; i < ARRAY_SIZE(mem_types); i++)
383 mem_types[i].prot_sect &= ~PMD_BIT4;
384
385 /*
386 * ARMv5 and lower, excluding Xscale, bit 4 must be set for
387 * page tables.
388 */
389 if (cpu_arch < CPU_ARCH_ARMv6 && !cpu_is_xscale())
390 for (i = 0; i < ARRAY_SIZE(mem_types); i++)
380 if (mem_types[i].prot_l1) 391 if (mem_types[i].prot_l1)
381 mem_types[i].prot_l1 |= PMD_BIT4; 392 mem_types[i].prot_l1 |= PMD_BIT4;
382 if (mem_types[i].prot_sect)
383 mem_types[i].prot_sect |= PMD_BIT4;
384 }
385 }
386 393
387 cp = &cache_policies[cachepolicy]; 394 cp = &cache_policies[cachepolicy];
388 kern_pgprot = user_pgprot = cp->pte; 395 kern_pgprot = user_pgprot = cp->pte;
@@ -406,8 +413,8 @@ void __init build_mem_type_table(void)
406 * bit 4 becomes XN which we must clear for the 413 * bit 4 becomes XN which we must clear for the
407 * kernel memory mapping. 414 * kernel memory mapping.
408 */ 415 */
409 mem_types[MT_MEMORY].prot_sect &= ~PMD_BIT4; 416 mem_types[MT_MEMORY].prot_sect &= ~PMD_SECT_XN;
410 mem_types[MT_ROM].prot_sect &= ~PMD_BIT4; 417 mem_types[MT_ROM].prot_sect &= ~PMD_SECT_XN;
411 418
412 /* 419 /*
413 * Mark cache clean areas and XIP ROM read only 420 * Mark cache clean areas and XIP ROM read only
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index cc609666df05..1d8316f3cecf 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -34,6 +34,8 @@
34#include <asm/procinfo.h> 34#include <asm/procinfo.h>
35#include <asm/ptrace.h> 35#include <asm/ptrace.h>
36 36
37#include "proc-macros.S"
38
37/* 39/*
38 * This is the maximum size of an area which will be invalidated 40 * This is the maximum size of an area which will be invalidated
39 * using the single invalidate entry instructions. Anything larger 41 * using the single invalidate entry instructions. Anything larger
@@ -439,11 +441,12 @@ __arm1020_setup:
439#ifdef CONFIG_MMU 441#ifdef CONFIG_MMU
440 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 442 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
441#endif 443#endif
444
445 adr r5, arm1020_crval
446 ldmia r5, {r5, r6}
442 mrc p15, 0, r0, c1, c0 @ get control register v4 447 mrc p15, 0, r0, c1, c0 @ get control register v4
443 ldr r5, arm1020_cr1_clear
444 bic r0, r0, r5 448 bic r0, r0, r5
445 ldr r5, arm1020_cr1_set 449 orr r0, r0, r6
446 orr r0, r0, r5
447#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN 450#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
448 orr r0, r0, #0x4000 @ .R.. .... .... .... 451 orr r0, r0, #0x4000 @ .R.. .... .... ....
449#endif 452#endif
@@ -455,12 +458,9 @@ __arm1020_setup:
455 * .RVI ZFRS BLDP WCAM 458 * .RVI ZFRS BLDP WCAM
456 * .011 1001 ..11 0101 459 * .011 1001 ..11 0101
457 */ 460 */
458 .type arm1020_cr1_clear, #object 461 .type arm1020_crval, #object
459 .type arm1020_cr1_set, #object 462arm1020_crval:
460arm1020_cr1_clear: 463 crval clear=0x0000593f, mmuset=0x00003935, ucset=0x00001930
461 .word 0x593f
462arm1020_cr1_set:
463 .word 0x3935
464 464
465 __INITDATA 465 __INITDATA
466 466
@@ -526,6 +526,9 @@ __arm1020_proc_info:
526 .long PMD_TYPE_SECT | \ 526 .long PMD_TYPE_SECT | \
527 PMD_SECT_AP_WRITE | \ 527 PMD_SECT_AP_WRITE | \
528 PMD_SECT_AP_READ 528 PMD_SECT_AP_READ
529 .long PMD_TYPE_SECT | \
530 PMD_SECT_AP_WRITE | \
531 PMD_SECT_AP_READ
529 b __arm1020_setup 532 b __arm1020_setup
530 .long cpu_arch_name 533 .long cpu_arch_name
531 .long cpu_elf_name 534 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 117a946c28c8..89b1d6d3d7c0 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -34,6 +34,8 @@
34#include <asm/procinfo.h> 34#include <asm/procinfo.h>
35#include <asm/ptrace.h> 35#include <asm/ptrace.h>
36 36
37#include "proc-macros.S"
38
37/* 39/*
38 * This is the maximum size of an area which will be invalidated 40 * This is the maximum size of an area which will be invalidated
39 * using the single invalidate entry instructions. Anything larger 41 * using the single invalidate entry instructions. Anything larger
@@ -421,11 +423,11 @@ __arm1020e_setup:
421#ifdef CONFIG_MMU 423#ifdef CONFIG_MMU
422 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 424 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
423#endif 425#endif
426 adr r5, arm1020e_crval
427 ldmia r5, {r5, r6}
424 mrc p15, 0, r0, c1, c0 @ get control register v4 428 mrc p15, 0, r0, c1, c0 @ get control register v4
425 ldr r5, arm1020e_cr1_clear
426 bic r0, r0, r5 429 bic r0, r0, r5
427 ldr r5, arm1020e_cr1_set 430 orr r0, r0, r6
428 orr r0, r0, r5
429#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN 431#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
430 orr r0, r0, #0x4000 @ .R.. .... .... .... 432 orr r0, r0, #0x4000 @ .R.. .... .... ....
431#endif 433#endif
@@ -437,12 +439,9 @@ __arm1020e_setup:
437 * .RVI ZFRS BLDP WCAM 439 * .RVI ZFRS BLDP WCAM
438 * .011 1001 ..11 0101 440 * .011 1001 ..11 0101
439 */ 441 */
440 .type arm1020e_cr1_clear, #object 442 .type arm1020e_crval, #object
441 .type arm1020e_cr1_set, #object 443arm1020e_crval:
442arm1020e_cr1_clear: 444 crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001930
443 .word 0x5f3f
444arm1020e_cr1_set:
445 .word 0x3935
446 445
447 __INITDATA 446 __INITDATA
448 447
@@ -476,25 +475,7 @@ cpu_elf_name:
476 475
477 .type cpu_arm1020e_name, #object 476 .type cpu_arm1020e_name, #object
478cpu_arm1020e_name: 477cpu_arm1020e_name:
479 .ascii "ARM1020E" 478 .asciz "ARM1020E"
480#ifndef CONFIG_CPU_ICACHE_DISABLE
481 .ascii "i"
482#endif
483#ifndef CONFIG_CPU_DCACHE_DISABLE
484 .ascii "d"
485#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
486 .ascii "(wt)"
487#else
488 .ascii "(wb)"
489#endif
490#endif
491#ifndef CONFIG_CPU_BPREDICT_DISABLE
492 .ascii "B"
493#endif
494#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
495 .ascii "RR"
496#endif
497 .ascii "\0"
498 .size cpu_arm1020e_name, . - cpu_arm1020e_name 479 .size cpu_arm1020e_name, . - cpu_arm1020e_name
499 480
500 .align 481 .align
@@ -509,6 +490,10 @@ __arm1020e_proc_info:
509 PMD_BIT4 | \ 490 PMD_BIT4 | \
510 PMD_SECT_AP_WRITE | \ 491 PMD_SECT_AP_WRITE | \
511 PMD_SECT_AP_READ 492 PMD_SECT_AP_READ
493 .long PMD_TYPE_SECT | \
494 PMD_BIT4 | \
495 PMD_SECT_AP_WRITE | \
496 PMD_SECT_AP_READ
512 b __arm1020e_setup 497 b __arm1020e_setup
513 .long cpu_arch_name 498 .long cpu_arch_name
514 .long cpu_elf_name 499 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 39b7c102180a..a089528e6bce 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -23,6 +23,8 @@
23#include <asm/procinfo.h> 23#include <asm/procinfo.h>
24#include <asm/ptrace.h> 24#include <asm/ptrace.h>
25 25
26#include "proc-macros.S"
27
26/* 28/*
27 * This is the maximum size of an area which will be invalidated 29 * This is the maximum size of an area which will be invalidated
28 * using the single invalidate entry instructions. Anything larger 30 * using the single invalidate entry instructions. Anything larger
@@ -403,11 +405,11 @@ __arm1022_setup:
403#ifdef CONFIG_MMU 405#ifdef CONFIG_MMU
404 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 406 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
405#endif 407#endif
408 adr r5, arm1022_crval
409 ldmia r5, {r5, r6}
406 mrc p15, 0, r0, c1, c0 @ get control register v4 410 mrc p15, 0, r0, c1, c0 @ get control register v4
407 ldr r5, arm1022_cr1_clear
408 bic r0, r0, r5 411 bic r0, r0, r5
409 ldr r5, arm1022_cr1_set 412 orr r0, r0, r6
410 orr r0, r0, r5
411#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN 413#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
412 orr r0, r0, #0x4000 @ .R.............. 414 orr r0, r0, #0x4000 @ .R..............
413#endif 415#endif
@@ -420,12 +422,9 @@ __arm1022_setup:
420 * .011 1001 ..11 0101 422 * .011 1001 ..11 0101
421 * 423 *
422 */ 424 */
423 .type arm1022_cr1_clear, #object 425 .type arm1022_crval, #object
424 .type arm1022_cr1_set, #object 426arm1022_crval:
425arm1022_cr1_clear: 427 crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001930
426 .word 0x7f3f
427arm1022_cr1_set:
428 .word 0x3935
429 428
430 __INITDATA 429 __INITDATA
431 430
@@ -459,25 +458,7 @@ cpu_elf_name:
459 458
460 .type cpu_arm1022_name, #object 459 .type cpu_arm1022_name, #object
461cpu_arm1022_name: 460cpu_arm1022_name:
462 .ascii "arm1022" 461 .asciz "ARM1022"
463#ifndef CONFIG_CPU_ICACHE_DISABLE
464 .ascii "i"
465#endif
466#ifndef CONFIG_CPU_DCACHE_DISABLE
467 .ascii "d"
468#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
469 .ascii "(wt)"
470#else
471 .ascii "(wb)"
472#endif
473#endif
474#ifndef CONFIG_CPU_BPREDICT_DISABLE
475 .ascii "B"
476#endif
477#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
478 .ascii "RR"
479#endif
480 .ascii "\0"
481 .size cpu_arm1022_name, . - cpu_arm1022_name 462 .size cpu_arm1022_name, . - cpu_arm1022_name
482 463
483 .align 464 .align
@@ -492,6 +473,10 @@ __arm1022_proc_info:
492 PMD_BIT4 | \ 473 PMD_BIT4 | \
493 PMD_SECT_AP_WRITE | \ 474 PMD_SECT_AP_WRITE | \
494 PMD_SECT_AP_READ 475 PMD_SECT_AP_READ
476 .long PMD_TYPE_SECT | \
477 PMD_BIT4 | \
478 PMD_SECT_AP_WRITE | \
479 PMD_SECT_AP_READ
495 b __arm1022_setup 480 b __arm1022_setup
496 .long cpu_arch_name 481 .long cpu_arch_name
497 .long cpu_elf_name 482 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 33e1ab8eb1d6..d6d84d92c7c7 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -23,6 +23,8 @@
23#include <asm/procinfo.h> 23#include <asm/procinfo.h>
24#include <asm/ptrace.h> 24#include <asm/ptrace.h>
25 25
26#include "proc-macros.S"
27
26/* 28/*
27 * This is the maximum size of an area which will be invalidated 29 * This is the maximum size of an area which will be invalidated
28 * using the single invalidate entry instructions. Anything larger 30 * using the single invalidate entry instructions. Anything larger
@@ -398,11 +400,11 @@ __arm1026_setup:
398 mov r0, #4 @ explicitly disable writeback 400 mov r0, #4 @ explicitly disable writeback
399 mcr p15, 7, r0, c15, c0, 0 401 mcr p15, 7, r0, c15, c0, 0
400#endif 402#endif
403 adr r5, arm1026_crval
404 ldmia r5, {r5, r6}
401 mrc p15, 0, r0, c1, c0 @ get control register v4 405 mrc p15, 0, r0, c1, c0 @ get control register v4
402 ldr r5, arm1026_cr1_clear
403 bic r0, r0, r5 406 bic r0, r0, r5
404 ldr r5, arm1026_cr1_set 407 orr r0, r0, r6
405 orr r0, r0, r5
406#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN 408#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
407 orr r0, r0, #0x4000 @ .R.. .... .... .... 409 orr r0, r0, #0x4000 @ .R.. .... .... ....
408#endif 410#endif
@@ -415,12 +417,9 @@ __arm1026_setup:
415 * .011 1001 ..11 0101 417 * .011 1001 ..11 0101
416 * 418 *
417 */ 419 */
418 .type arm1026_cr1_clear, #object 420 .type arm1026_crval, #object
419 .type arm1026_cr1_set, #object 421arm1026_crval:
420arm1026_cr1_clear: 422 crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001934
421 .word 0x7f3f
422arm1026_cr1_set:
423 .word 0x3935
424 423
425 __INITDATA 424 __INITDATA
426 425
@@ -455,25 +454,7 @@ cpu_elf_name:
455 454
456 .type cpu_arm1026_name, #object 455 .type cpu_arm1026_name, #object
457cpu_arm1026_name: 456cpu_arm1026_name:
458 .ascii "ARM1026EJ-S" 457 .asciz "ARM1026EJ-S"
459#ifndef CONFIG_CPU_ICACHE_DISABLE
460 .ascii "i"
461#endif
462#ifndef CONFIG_CPU_DCACHE_DISABLE
463 .ascii "d"
464#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
465 .ascii "(wt)"
466#else
467 .ascii "(wb)"
468#endif
469#endif
470#ifndef CONFIG_CPU_BPREDICT_DISABLE
471 .ascii "B"
472#endif
473#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
474 .ascii "RR"
475#endif
476 .ascii "\0"
477 .size cpu_arm1026_name, . - cpu_arm1026_name 458 .size cpu_arm1026_name, . - cpu_arm1026_name
478 459
479 .align 460 .align
@@ -488,6 +469,10 @@ __arm1026_proc_info:
488 PMD_BIT4 | \ 469 PMD_BIT4 | \
489 PMD_SECT_AP_WRITE | \ 470 PMD_SECT_AP_WRITE | \
490 PMD_SECT_AP_READ 471 PMD_SECT_AP_READ
472 .long PMD_TYPE_SECT | \
473 PMD_BIT4 | \
474 PMD_SECT_AP_WRITE | \
475 PMD_SECT_AP_READ
491 b __arm1026_setup 476 b __arm1026_setup
492 .long cpu_arch_name 477 .long cpu_arch_name
493 .long cpu_elf_name 478 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 7a705edfa4b2..0432e4806888 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -355,6 +355,10 @@ __arm6_proc_info:
355 .long 0x41560600 355 .long 0x41560600
356 .long 0xfffffff0 356 .long 0xfffffff0
357 .long 0x00000c1e 357 .long 0x00000c1e
358 .long PMD_TYPE_SECT | \
359 PMD_BIT4 | \
360 PMD_SECT_AP_WRITE | \
361 PMD_SECT_AP_READ
358 b __arm6_setup 362 b __arm6_setup
359 .long cpu_arch_name 363 .long cpu_arch_name
360 .long cpu_elf_name 364 .long cpu_elf_name
@@ -371,6 +375,10 @@ __arm610_proc_info:
371 .long 0x41560610 375 .long 0x41560610
372 .long 0xfffffff0 376 .long 0xfffffff0
373 .long 0x00000c1e 377 .long 0x00000c1e
378 .long PMD_TYPE_SECT | \
379 PMD_BIT4 | \
380 PMD_SECT_AP_WRITE | \
381 PMD_SECT_AP_READ
374 b __arm6_setup 382 b __arm6_setup
375 .long cpu_arch_name 383 .long cpu_arch_name
376 .long cpu_elf_name 384 .long cpu_elf_name
@@ -387,6 +395,10 @@ __arm7_proc_info:
387 .long 0x41007000 395 .long 0x41007000
388 .long 0xffffff00 396 .long 0xffffff00
389 .long 0x00000c1e 397 .long 0x00000c1e
398 .long PMD_TYPE_SECT | \
399 PMD_BIT4 | \
400 PMD_SECT_AP_WRITE | \
401 PMD_SECT_AP_READ
390 b __arm7_setup 402 b __arm7_setup
391 .long cpu_arch_name 403 .long cpu_arch_name
392 .long cpu_elf_name 404 .long cpu_elf_name
@@ -408,6 +420,10 @@ __arm710_proc_info:
408 PMD_BIT4 | \ 420 PMD_BIT4 | \
409 PMD_SECT_AP_WRITE | \ 421 PMD_SECT_AP_WRITE | \
410 PMD_SECT_AP_READ 422 PMD_SECT_AP_READ
423 .long PMD_TYPE_SECT | \
424 PMD_BIT4 | \
425 PMD_SECT_AP_WRITE | \
426 PMD_SECT_AP_READ
411 b __arm7_setup 427 b __arm7_setup
412 .long cpu_arch_name 428 .long cpu_arch_name
413 .long cpu_elf_name 429 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 86102467d37f..c2f0705bfd49 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -41,6 +41,8 @@
41#include <asm/procinfo.h> 41#include <asm/procinfo.h>
42#include <asm/ptrace.h> 42#include <asm/ptrace.h>
43 43
44#include "proc-macros.S"
45
44/* 46/*
45 * Function: arm720_proc_init (void) 47 * Function: arm720_proc_init (void)
46 * : arm720_proc_fin (void) 48 * : arm720_proc_fin (void)
@@ -169,11 +171,11 @@ __arm720_setup:
169#ifdef CONFIG_MMU 171#ifdef CONFIG_MMU
170 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) 172 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
171#endif 173#endif
174 adr r5, arm720_crval
175 ldmia r5, {r5, r6}
172 mrc p15, 0, r0, c1, c0 @ get control register 176 mrc p15, 0, r0, c1, c0 @ get control register
173 ldr r5, arm720_cr1_clear
174 bic r0, r0, r5 177 bic r0, r0, r5
175 ldr r5, arm720_cr1_set 178 orr r0, r0, r6
176 orr r0, r0, r5
177 mov pc, lr @ __ret (head.S) 179 mov pc, lr @ __ret (head.S)
178 .size __arm720_setup, . - __arm720_setup 180 .size __arm720_setup, . - __arm720_setup
179 181
@@ -183,12 +185,9 @@ __arm720_setup:
183 * ..1. 1001 ..11 1101 185 * ..1. 1001 ..11 1101
184 * 186 *
185 */ 187 */
186 .type arm720_cr1_clear, #object 188 .type arm720_crval, #object
187 .type arm720_cr1_set, #object 189arm720_crval:
188arm720_cr1_clear: 190 crval clear=0x00002f3f, mmuset=0x0000213d, ucset=0x00000130
189 .word 0x2f3f
190arm720_cr1_set:
191 .word 0x213d
192 191
193 __INITDATA 192 __INITDATA
194 193
@@ -246,6 +245,10 @@ __arm710_proc_info:
246 PMD_BIT4 | \ 245 PMD_BIT4 | \
247 PMD_SECT_AP_WRITE | \ 246 PMD_SECT_AP_WRITE | \
248 PMD_SECT_AP_READ 247 PMD_SECT_AP_READ
248 .long PMD_TYPE_SECT | \
249 PMD_BIT4 | \
250 PMD_SECT_AP_WRITE | \
251 PMD_SECT_AP_READ
249 b __arm710_setup @ cpu_flush 252 b __arm710_setup @ cpu_flush
250 .long cpu_arch_name @ arch_name 253 .long cpu_arch_name @ arch_name
251 .long cpu_elf_name @ elf_name 254 .long cpu_elf_name @ elf_name
@@ -267,6 +270,10 @@ __arm720_proc_info:
267 PMD_BIT4 | \ 270 PMD_BIT4 | \
268 PMD_SECT_AP_WRITE | \ 271 PMD_SECT_AP_WRITE | \
269 PMD_SECT_AP_READ 272 PMD_SECT_AP_READ
273 .long PMD_TYPE_SECT | \
274 PMD_BIT4 | \
275 PMD_SECT_AP_WRITE | \
276 PMD_SECT_AP_READ
270 b __arm720_setup @ cpu_flush 277 b __arm720_setup @ cpu_flush
271 .long cpu_arch_name @ arch_name 278 .long cpu_arch_name @ arch_name
272 .long cpu_elf_name @ elf_name 279 .long cpu_elf_name @ elf_name
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 6f0db29ab842..4adb46b3a4e0 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -390,11 +390,11 @@ __arm920_setup:
390#ifdef CONFIG_MMU 390#ifdef CONFIG_MMU
391 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 391 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
392#endif 392#endif
393 adr r5, arm920_crval
394 ldmia r5, {r5, r6}
393 mrc p15, 0, r0, c1, c0 @ get control register v4 395 mrc p15, 0, r0, c1, c0 @ get control register v4
394 ldr r5, arm920_cr1_clear
395 bic r0, r0, r5 396 bic r0, r0, r5
396 ldr r5, arm920_cr1_set 397 orr r0, r0, r6
397 orr r0, r0, r5
398 mov pc, lr 398 mov pc, lr
399 .size __arm920_setup, . - __arm920_setup 399 .size __arm920_setup, . - __arm920_setup
400 400
@@ -404,12 +404,9 @@ __arm920_setup:
404 * ..11 0001 ..11 0101 404 * ..11 0001 ..11 0101
405 * 405 *
406 */ 406 */
407 .type arm920_cr1_clear, #object 407 .type arm920_crval, #object
408 .type arm920_cr1_set, #object 408arm920_crval:
409arm920_cr1_clear: 409 crval clear=0x00003f3f, mmuset=0x00003135, ucset=0x00001130
410 .word 0x3f3f
411arm920_cr1_set:
412 .word 0x3135
413 410
414 __INITDATA 411 __INITDATA
415 412
@@ -443,19 +440,7 @@ cpu_elf_name:
443 440
444 .type cpu_arm920_name, #object 441 .type cpu_arm920_name, #object
445cpu_arm920_name: 442cpu_arm920_name:
446 .ascii "ARM920T" 443 .asciz "ARM920T"
447#ifndef CONFIG_CPU_ICACHE_DISABLE
448 .ascii "i"
449#endif
450#ifndef CONFIG_CPU_DCACHE_DISABLE
451 .ascii "d"
452#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
453 .ascii "(wt)"
454#else
455 .ascii "(wb)"
456#endif
457#endif
458 .ascii "\0"
459 .size cpu_arm920_name, . - cpu_arm920_name 444 .size cpu_arm920_name, . - cpu_arm920_name
460 445
461 .align 446 .align
@@ -472,6 +457,10 @@ __arm920_proc_info:
472 PMD_BIT4 | \ 457 PMD_BIT4 | \
473 PMD_SECT_AP_WRITE | \ 458 PMD_SECT_AP_WRITE | \
474 PMD_SECT_AP_READ 459 PMD_SECT_AP_READ
460 .long PMD_TYPE_SECT | \
461 PMD_BIT4 | \
462 PMD_SECT_AP_WRITE | \
463 PMD_SECT_AP_READ
475 b __arm920_setup 464 b __arm920_setup
476 .long cpu_arch_name 465 .long cpu_arch_name
477 .long cpu_elf_name 466 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 1ad464cc7bcb..571f082f0247 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -394,11 +394,11 @@ __arm922_setup:
394#ifdef CONFIG_MMU 394#ifdef CONFIG_MMU
395 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 395 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
396#endif 396#endif
397 adr r5, arm922_crval
398 ldmia r5, {r5, r6}
397 mrc p15, 0, r0, c1, c0 @ get control register v4 399 mrc p15, 0, r0, c1, c0 @ get control register v4
398 ldr r5, arm922_cr1_clear
399 bic r0, r0, r5 400 bic r0, r0, r5
400 ldr r5, arm922_cr1_set 401 orr r0, r0, r6
401 orr r0, r0, r5
402 mov pc, lr 402 mov pc, lr
403 .size __arm922_setup, . - __arm922_setup 403 .size __arm922_setup, . - __arm922_setup
404 404
@@ -408,12 +408,9 @@ __arm922_setup:
408 * ..11 0001 ..11 0101 408 * ..11 0001 ..11 0101
409 * 409 *
410 */ 410 */
411 .type arm922_cr1_clear, #object 411 .type arm922_crval, #object
412 .type arm922_cr1_set, #object 412arm922_crval:
413arm922_cr1_clear: 413 crval clear=0x00003f3f, mmuset=0x00003135, ucset=0x00001130
414 .word 0x3f3f
415arm922_cr1_set:
416 .word 0x3135
417 414
418 __INITDATA 415 __INITDATA
419 416
@@ -447,19 +444,7 @@ cpu_elf_name:
447 444
448 .type cpu_arm922_name, #object 445 .type cpu_arm922_name, #object
449cpu_arm922_name: 446cpu_arm922_name:
450 .ascii "ARM922T" 447 .asciz "ARM922T"
451#ifndef CONFIG_CPU_ICACHE_DISABLE
452 .ascii "i"
453#endif
454#ifndef CONFIG_CPU_DCACHE_DISABLE
455 .ascii "d"
456#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
457 .ascii "(wt)"
458#else
459 .ascii "(wb)"
460#endif
461#endif
462 .ascii "\0"
463 .size cpu_arm922_name, . - cpu_arm922_name 448 .size cpu_arm922_name, . - cpu_arm922_name
464 449
465 .align 450 .align
@@ -476,6 +461,10 @@ __arm922_proc_info:
476 PMD_BIT4 | \ 461 PMD_BIT4 | \
477 PMD_SECT_AP_WRITE | \ 462 PMD_SECT_AP_WRITE | \
478 PMD_SECT_AP_READ 463 PMD_SECT_AP_READ
464 .long PMD_TYPE_SECT | \
465 PMD_BIT4 | \
466 PMD_SECT_AP_WRITE | \
467 PMD_SECT_AP_READ
479 b __arm922_setup 468 b __arm922_setup
480 .long cpu_arch_name 469 .long cpu_arch_name
481 .long cpu_elf_name 470 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index a55d56ce2264..8d9a9f93b011 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -454,11 +454,11 @@ __arm925_setup:
454 mcr p15, 7, r0, c15, c0, 0 454 mcr p15, 7, r0, c15, c0, 0
455#endif 455#endif
456 456
457 adr r5, arm925_crval
458 ldmia r5, {r5, r6}
457 mrc p15, 0, r0, c1, c0 @ get control register v4 459 mrc p15, 0, r0, c1, c0 @ get control register v4
458 ldr r5, arm925_cr1_clear
459 bic r0, r0, r5 460 bic r0, r0, r5
460 ldr r5, arm925_cr1_set 461 orr r0, r0, r6
461 orr r0, r0, r5
462#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN 462#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
463 orr r0, r0, #0x4000 @ .1.. .... .... .... 463 orr r0, r0, #0x4000 @ .1.. .... .... ....
464#endif 464#endif
@@ -471,12 +471,9 @@ __arm925_setup:
471 * .011 0001 ..11 1101 471 * .011 0001 ..11 1101
472 * 472 *
473 */ 473 */
474 .type arm925_cr1_clear, #object 474 .type arm925_crval, #object
475 .type arm925_cr1_set, #object 475arm925_crval:
476arm925_cr1_clear: 476 crval clear=0x00007f3f, mmuset=0x0000313d, ucset=0x00001130
477 .word 0x7f3f
478arm925_cr1_set:
479 .word 0x313d
480 477
481 __INITDATA 478 __INITDATA
482 479
@@ -510,22 +507,7 @@ cpu_elf_name:
510 507
511 .type cpu_arm925_name, #object 508 .type cpu_arm925_name, #object
512cpu_arm925_name: 509cpu_arm925_name:
513 .ascii "ARM925T" 510 .asciz "ARM925T"
514#ifndef CONFIG_CPU_ICACHE_DISABLE
515 .ascii "i"
516#endif
517#ifndef CONFIG_CPU_DCACHE_DISABLE
518 .ascii "d"
519#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
520 .ascii "(wt)"
521#else
522 .ascii "(wb)"
523#endif
524#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
525 .ascii "RR"
526#endif
527#endif
528 .ascii "\0"
529 .size cpu_arm925_name, . - cpu_arm925_name 511 .size cpu_arm925_name, . - cpu_arm925_name
530 512
531 .align 513 .align
@@ -540,6 +522,10 @@ __arm925_proc_info:
540 PMD_BIT4 | \ 522 PMD_BIT4 | \
541 PMD_SECT_AP_WRITE | \ 523 PMD_SECT_AP_WRITE | \
542 PMD_SECT_AP_READ 524 PMD_SECT_AP_READ
525 .long PMD_TYPE_SECT | \
526 PMD_BIT4 | \
527 PMD_SECT_AP_WRITE | \
528 PMD_SECT_AP_READ
543 b __arm925_setup 529 b __arm925_setup
544 .long cpu_arch_name 530 .long cpu_arch_name
545 .long cpu_elf_name 531 .long cpu_elf_name
@@ -559,6 +545,10 @@ __arm915_proc_info:
559 PMD_BIT4 | \ 545 PMD_BIT4 | \
560 PMD_SECT_AP_WRITE | \ 546 PMD_SECT_AP_WRITE | \
561 PMD_SECT_AP_READ 547 PMD_SECT_AP_READ
548 .long PMD_TYPE_SECT | \
549 PMD_BIT4 | \
550 PMD_SECT_AP_WRITE | \
551 PMD_SECT_AP_READ
562 b __arm925_setup 552 b __arm925_setup
563 .long cpu_arch_name 553 .long cpu_arch_name
564 .long cpu_elf_name 554 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 20275967663d..1e89d4080474 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -403,11 +403,11 @@ __arm926_setup:
403 mcr p15, 7, r0, c15, c0, 0 403 mcr p15, 7, r0, c15, c0, 0
404#endif 404#endif
405 405
406 adr r5, arm926_crval
407 ldmia r5, {r5, r6}
406 mrc p15, 0, r0, c1, c0 @ get control register v4 408 mrc p15, 0, r0, c1, c0 @ get control register v4
407 ldr r5, arm926_cr1_clear
408 bic r0, r0, r5 409 bic r0, r0, r5
409 ldr r5, arm926_cr1_set 410 orr r0, r0, r6
410 orr r0, r0, r5
411#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN 411#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
412 orr r0, r0, #0x4000 @ .1.. .... .... .... 412 orr r0, r0, #0x4000 @ .1.. .... .... ....
413#endif 413#endif
@@ -420,12 +420,9 @@ __arm926_setup:
420 * .011 0001 ..11 0101 420 * .011 0001 ..11 0101
421 * 421 *
422 */ 422 */
423 .type arm926_cr1_clear, #object 423 .type arm926_crval, #object
424 .type arm926_cr1_set, #object 424arm926_crval:
425arm926_cr1_clear: 425 crval clear=0x00007f3f, mmuset=0x00003135, ucset=0x00001134
426 .word 0x7f3f
427arm926_cr1_set:
428 .word 0x3135
429 426
430 __INITDATA 427 __INITDATA
431 428
@@ -459,22 +456,7 @@ cpu_elf_name:
459 456
460 .type cpu_arm926_name, #object 457 .type cpu_arm926_name, #object
461cpu_arm926_name: 458cpu_arm926_name:
462 .ascii "ARM926EJ-S" 459 .asciz "ARM926EJ-S"
463#ifndef CONFIG_CPU_ICACHE_DISABLE
464 .ascii "i"
465#endif
466#ifndef CONFIG_CPU_DCACHE_DISABLE
467 .ascii "d"
468#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
469 .ascii "(wt)"
470#else
471 .ascii "(wb)"
472#endif
473#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
474 .ascii "RR"
475#endif
476#endif
477 .ascii "\0"
478 .size cpu_arm926_name, . - cpu_arm926_name 460 .size cpu_arm926_name, . - cpu_arm926_name
479 461
480 .align 462 .align
@@ -491,6 +473,10 @@ __arm926_proc_info:
491 PMD_BIT4 | \ 473 PMD_BIT4 | \
492 PMD_SECT_AP_WRITE | \ 474 PMD_SECT_AP_WRITE | \
493 PMD_SECT_AP_READ 475 PMD_SECT_AP_READ
476 .long PMD_TYPE_SECT | \
477 PMD_BIT4 | \
478 PMD_SECT_AP_WRITE | \
479 PMD_SECT_AP_READ
494 b __arm926_setup 480 b __arm926_setup
495 .long cpu_arch_name 481 .long cpu_arch_name
496 .long cpu_elf_name 482 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 7cfc2604a1ee..9e2c89eb2115 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -49,3 +49,13 @@
49 .macro asid, rd, rn 49 .macro asid, rd, rn
50 and \rd, \rn, #255 50 and \rd, \rn, #255
51 .endm 51 .endm
52
53 .macro crval, clear, mmuset, ucset
54#ifdef CONFIG_MMU
55 .word \clear
56 .word \mmuset
57#else
58 .word \clear
59 .word \ucset
60#endif
61 .endm
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index 5a760a2c629c..c878064e9b88 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -23,6 +23,8 @@
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/ptrace.h> 24#include <asm/ptrace.h>
25 25
26#include "proc-macros.S"
27
26/* 28/*
27 * the cache line size of the I and D cache 29 * the cache line size of the I and D cache
28 */ 30 */
@@ -185,11 +187,12 @@ __sa110_setup:
185#ifdef CONFIG_MMU 187#ifdef CONFIG_MMU
186 mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4 188 mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4
187#endif 189#endif
190
191 adr r5, sa110_crval
192 ldmia r5, {r5, r6}
188 mrc p15, 0, r0, c1, c0 @ get control register v4 193 mrc p15, 0, r0, c1, c0 @ get control register v4
189 ldr r5, sa110_cr1_clear
190 bic r0, r0, r5 194 bic r0, r0, r5
191 ldr r5, sa110_cr1_set 195 orr r0, r0, r6
192 orr r0, r0, r5
193 mov pc, lr 196 mov pc, lr
194 .size __sa110_setup, . - __sa110_setup 197 .size __sa110_setup, . - __sa110_setup
195 198
@@ -199,12 +202,9 @@ __sa110_setup:
199 * ..01 0001 ..11 1101 202 * ..01 0001 ..11 1101
200 * 203 *
201 */ 204 */
202 .type sa110_cr1_clear, #object 205 .type sa110_crval, #object
203 .type sa110_cr1_set, #object 206sa110_crval:
204sa110_cr1_clear: 207 crval clear=0x00003f3f, mmuset=0x0000113d, ucset=0x00001130
205 .word 0x3f3f
206sa110_cr1_set:
207 .word 0x113d
208 208
209 __INITDATA 209 __INITDATA
210 210
@@ -255,6 +255,9 @@ __sa110_proc_info:
255 PMD_SECT_CACHEABLE | \ 255 PMD_SECT_CACHEABLE | \
256 PMD_SECT_AP_WRITE | \ 256 PMD_SECT_AP_WRITE | \
257 PMD_SECT_AP_READ 257 PMD_SECT_AP_READ
258 .long PMD_TYPE_SECT | \
259 PMD_SECT_AP_WRITE | \
260 PMD_SECT_AP_READ
258 b __sa110_setup 261 b __sa110_setup
259 .long cpu_arch_name 262 .long cpu_arch_name
260 .long cpu_elf_name 263 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 0a2107ad4c32..b23b66a6155a 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -27,6 +27,8 @@
27#include <asm/pgtable-hwdef.h> 27#include <asm/pgtable-hwdef.h>
28#include <asm/pgtable.h> 28#include <asm/pgtable.h>
29 29
30#include "proc-macros.S"
31
30/* 32/*
31 * the cache line size of the I and D cache 33 * the cache line size of the I and D cache
32 */ 34 */
@@ -198,11 +200,11 @@ __sa1100_setup:
198#ifdef CONFIG_MMU 200#ifdef CONFIG_MMU
199 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 201 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
200#endif 202#endif
203 adr r5, sa1100_crval
204 ldmia r5, {r5, r6}
201 mrc p15, 0, r0, c1, c0 @ get control register v4 205 mrc p15, 0, r0, c1, c0 @ get control register v4
202 ldr r5, sa1100_cr1_clear
203 bic r0, r0, r5 206 bic r0, r0, r5
204 ldr r5, sa1100_cr1_set 207 orr r0, r0, r6
205 orr r0, r0, r5
206 mov pc, lr 208 mov pc, lr
207 .size __sa1100_setup, . - __sa1100_setup 209 .size __sa1100_setup, . - __sa1100_setup
208 210
@@ -212,12 +214,9 @@ __sa1100_setup:
212 * ..11 0001 ..11 1101 214 * ..11 0001 ..11 1101
213 * 215 *
214 */ 216 */
215 .type sa1100_cr1_clear, #object 217 .type sa1100_crval, #object
216 .type sa1100_cr1_set, #object 218sa1100_crval:
217sa1100_cr1_clear: 219 crval clear=0x00003f3f, mmuset=0x0000313d, ucset=0x00001130
218 .word 0x3f3f
219sa1100_cr1_set:
220 .word 0x313d
221 220
222 __INITDATA 221 __INITDATA
223 222
@@ -276,6 +275,9 @@ __sa1100_proc_info:
276 PMD_SECT_CACHEABLE | \ 275 PMD_SECT_CACHEABLE | \
277 PMD_SECT_AP_WRITE | \ 276 PMD_SECT_AP_WRITE | \
278 PMD_SECT_AP_READ 277 PMD_SECT_AP_READ
278 .long PMD_TYPE_SECT | \
279 PMD_SECT_AP_WRITE | \
280 PMD_SECT_AP_READ
279 b __sa1100_setup 281 b __sa1100_setup
280 .long cpu_arch_name 282 .long cpu_arch_name
281 .long cpu_elf_name 283 .long cpu_elf_name
@@ -296,6 +298,9 @@ __sa1110_proc_info:
296 PMD_SECT_CACHEABLE | \ 298 PMD_SECT_CACHEABLE | \
297 PMD_SECT_AP_WRITE | \ 299 PMD_SECT_AP_WRITE | \
298 PMD_SECT_AP_READ 300 PMD_SECT_AP_READ
301 .long PMD_TYPE_SECT | \
302 PMD_SECT_AP_WRITE | \
303 PMD_SECT_AP_READ
299 b __sa1100_setup 304 b __sa1100_setup
300 .long cpu_arch_name 305 .long cpu_arch_name
301 .long cpu_elf_name 306 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index ca13d4d05f65..6f72549f8843 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -212,11 +212,11 @@ __v6_setup:
212 orr r0, r0, #(0xf << 20) 212 orr r0, r0, #(0xf << 20)
213 mcr p15, 0, r0, c1, c0, 2 @ Enable full access to VFP 213 mcr p15, 0, r0, c1, c0, 2 @ Enable full access to VFP
214#endif 214#endif
215 adr r5, v6_crval
216 ldmia r5, {r5, r6}
215 mrc p15, 0, r0, c1, c0, 0 @ read control register 217 mrc p15, 0, r0, c1, c0, 0 @ read control register
216 ldr r5, v6_cr1_clear @ get mask for bits to clear
217 bic r0, r0, r5 @ clear bits them 218 bic r0, r0, r5 @ clear bits them
218 ldr r5, v6_cr1_set @ get mask for bits to set 219 orr r0, r0, r6 @ set them
219 orr r0, r0, r5 @ set them
220 mov pc, lr @ return to head.S:__ret 220 mov pc, lr @ return to head.S:__ret
221 221
222 /* 222 /*
@@ -225,12 +225,9 @@ __v6_setup:
225 * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced 225 * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced
226 * 0 110 0011 1.00 .111 1101 < we want 226 * 0 110 0011 1.00 .111 1101 < we want
227 */ 227 */
228 .type v6_cr1_clear, #object 228 .type v6_crval, #object
229 .type v6_cr1_set, #object 229v6_crval:
230v6_cr1_clear: 230 crval clear=0x01e0fb7f, mmuset=0x00c0387d, ucset=0x00c0187c
231 .word 0x01e0fb7f
232v6_cr1_set:
233 .word 0x00c0387d
234 231
235 .type v6_processor_functions, #object 232 .type v6_processor_functions, #object
236ENTRY(v6_processor_functions) 233ENTRY(v6_processor_functions)
@@ -269,6 +266,10 @@ __v6_proc_info:
269 PMD_SECT_CACHEABLE | \ 266 PMD_SECT_CACHEABLE | \
270 PMD_SECT_AP_WRITE | \ 267 PMD_SECT_AP_WRITE | \
271 PMD_SECT_AP_READ 268 PMD_SECT_AP_READ
269 .long PMD_TYPE_SECT | \
270 PMD_SECT_XN | \
271 PMD_SECT_AP_WRITE | \
272 PMD_SECT_AP_READ
272 b __v6_setup 273 b __v6_setup
273 .long cpu_arch_name 274 .long cpu_arch_name
274 .long cpu_elf_name 275 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 8d32e21fe151..4ace2d8090c7 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -426,23 +426,26 @@ __xsc3_setup:
426 orr r0, r0, #(1 << 10) @ enable L2 for LLR cache 426 orr r0, r0, #(1 << 10) @ enable L2 for LLR cache
427#endif 427#endif
428 mcr p15, 0, r0, c1, c0, 1 @ set auxiliary control reg 428 mcr p15, 0, r0, c1, c0, 1 @ set auxiliary control reg
429
430 adr r5, xsc3_crval
431 ldmia r5, {r5, r6}
429 mrc p15, 0, r0, c1, c0, 0 @ get control register 432 mrc p15, 0, r0, c1, c0, 0 @ get control register
430 bic r0, r0, #0x0002 @ .... .... .... ..A. 433 bic r0, r0, r5 @ .... .... .... ..A.
431 orr r0, r0, #0x0005 @ .... .... .... .C.M 434 orr r0, r0, r6 @ .... .... .... .C.M
432#if BTB_ENABLE 435#if BTB_ENABLE
433 bic r0, r0, #0x0200 @ .... ..R. .... .... 436 orr r0, r0, #0x00000800 @ ..VI Z..S .... ....
434 orr r0, r0, #0x3900 @ ..VI Z..S .... ....
435#else
436 bic r0, r0, #0x0a00 @ .... Z.R. .... ....
437 orr r0, r0, #0x3100 @ ..VI ...S .... ....
438#endif 437#endif
439#if L2_CACHE_ENABLE 438#if L2_CACHE_ENABLE
440 orr r0, r0, #0x4000000 @ L2 enable 439 orr r0, r0, #0x04000000 @ L2 enable
441#endif 440#endif
442 mov pc, lr 441 mov pc, lr
443 442
444 .size __xsc3_setup, . - __xsc3_setup 443 .size __xsc3_setup, . - __xsc3_setup
445 444
445 .type xsc3_crval, #object
446xsc3_crval:
447 crval clear=0x04003b02, mmuset=0x00003105, ucset=0x00001100
448
446 __INITDATA 449 __INITDATA
447 450
448/* 451/*
@@ -487,7 +490,14 @@ cpu_xsc3_name:
487__xsc3_proc_info: 490__xsc3_proc_info:
488 .long 0x69056000 491 .long 0x69056000
489 .long 0xffffe000 492 .long 0xffffe000
490 .long 0x00000c0e 493 .long PMD_TYPE_SECT | \
494 PMD_SECT_BUFFERABLE | \
495 PMD_SECT_CACHEABLE | \
496 PMD_SECT_AP_WRITE | \
497 PMD_SECT_AP_READ
498 .long PMD_TYPE_SECT | \
499 PMD_SECT_AP_WRITE | \
500 PMD_SECT_AP_READ
491 b __xsc3_setup 501 b __xsc3_setup
492 .long cpu_arch_name 502 .long cpu_arch_name
493 .long cpu_elf_name 503 .long cpu_elf_name
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 29bcc4dd6517..521538671f4c 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -138,17 +138,23 @@ ENTRY(cpu_xscale_proc_fin)
138 * to what would be the reset vector. 138 * to what would be the reset vector.
139 * 139 *
140 * loc: location to jump to for soft reset 140 * loc: location to jump to for soft reset
141 *
142 * Beware PXA270 erratum E7.
141 */ 143 */
142 .align 5 144 .align 5
143ENTRY(cpu_xscale_reset) 145ENTRY(cpu_xscale_reset)
144 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE 146 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
145 msr cpsr_c, r1 @ reset CPSR 147 msr cpsr_c, r1 @ reset CPSR
148 mcr p15, 0, r1, c10, c4, 1 @ unlock I-TLB
149 mcr p15, 0, r1, c8, c5, 0 @ invalidate I-TLB
146 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 150 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
147 bic r1, r1, #0x0086 @ ........B....CA. 151 bic r1, r1, #0x0086 @ ........B....CA.
148 bic r1, r1, #0x3900 @ ..VIZ..S........ 152 bic r1, r1, #0x3900 @ ..VIZ..S........
153 sub pc, pc, #4 @ flush pipeline
154 @ *** cache line aligned ***
149 mcr p15, 0, r1, c1, c0, 0 @ ctrl register 155 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
150 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB
151 bic r1, r1, #0x0001 @ ...............M 156 bic r1, r1, #0x0001 @ ...............M
157 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB
152 mcr p15, 0, r1, c1, c0, 0 @ ctrl register 158 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
153 @ CAUTION: MMU turned off from this point. We count on the pipeline 159 @ CAUTION: MMU turned off from this point. We count on the pipeline
154 @ already containing those two last instructions to survive. 160 @ already containing those two last instructions to survive.
@@ -475,11 +481,12 @@ __xscale_setup:
475 orr r0, r0, #1 << 6 @ cp6 for IOP3xx and Bulverde 481 orr r0, r0, #1 << 6 @ cp6 for IOP3xx and Bulverde
476 orr r0, r0, #1 << 13 @ Its undefined whether this 482 orr r0, r0, #1 << 13 @ Its undefined whether this
477 mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes 483 mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes
484
485 adr r5, xscale_crval
486 ldmia r5, {r5, r6}
478 mrc p15, 0, r0, c1, c0, 0 @ get control register 487 mrc p15, 0, r0, c1, c0, 0 @ get control register
479 ldr r5, xscale_cr1_clear
480 bic r0, r0, r5 488 bic r0, r0, r5
481 ldr r5, xscale_cr1_set 489 orr r0, r0, r6
482 orr r0, r0, r5
483 mov pc, lr 490 mov pc, lr
484 .size __xscale_setup, . - __xscale_setup 491 .size __xscale_setup, . - __xscale_setup
485 492
@@ -489,12 +496,9 @@ __xscale_setup:
489 * ..11 1.01 .... .101 496 * ..11 1.01 .... .101
490 * 497 *
491 */ 498 */
492 .type xscale_cr1_clear, #object 499 .type xscale_crval, #object
493 .type xscale_cr1_set, #object 500xscale_crval:
494xscale_cr1_clear: 501 crval clear=0x00003b07, mmuset=0x00003905, ucset=0x00001900
495 .word 0x3b07
496xscale_cr1_set:
497 .word 0x3905
498 502
499 __INITDATA 503 __INITDATA
500 504
@@ -595,6 +599,9 @@ __80200_proc_info:
595 PMD_SECT_CACHEABLE | \ 599 PMD_SECT_CACHEABLE | \
596 PMD_SECT_AP_WRITE | \ 600 PMD_SECT_AP_WRITE | \
597 PMD_SECT_AP_READ 601 PMD_SECT_AP_READ
602 .long PMD_TYPE_SECT | \
603 PMD_SECT_AP_WRITE | \
604 PMD_SECT_AP_READ
598 b __xscale_setup 605 b __xscale_setup
599 .long cpu_arch_name 606 .long cpu_arch_name
600 .long cpu_elf_name 607 .long cpu_elf_name
@@ -615,6 +622,9 @@ __8032x_proc_info:
615 PMD_SECT_CACHEABLE | \ 622 PMD_SECT_CACHEABLE | \
616 PMD_SECT_AP_WRITE | \ 623 PMD_SECT_AP_WRITE | \
617 PMD_SECT_AP_READ 624 PMD_SECT_AP_READ
625 .long PMD_TYPE_SECT | \
626 PMD_SECT_AP_WRITE | \
627 PMD_SECT_AP_READ
618 b __xscale_setup 628 b __xscale_setup
619 .long cpu_arch_name 629 .long cpu_arch_name
620 .long cpu_elf_name 630 .long cpu_elf_name
@@ -635,6 +645,9 @@ __8033x_proc_info:
635 PMD_SECT_CACHEABLE | \ 645 PMD_SECT_CACHEABLE | \
636 PMD_SECT_AP_WRITE | \ 646 PMD_SECT_AP_WRITE | \
637 PMD_SECT_AP_READ 647 PMD_SECT_AP_READ
648 .long PMD_TYPE_SECT | \
649 PMD_SECT_AP_WRITE | \
650 PMD_SECT_AP_READ
638 b __xscale_setup 651 b __xscale_setup
639 .long cpu_arch_name 652 .long cpu_arch_name
640 .long cpu_elf_name 653 .long cpu_elf_name
@@ -655,6 +668,9 @@ __pxa250_proc_info:
655 PMD_SECT_CACHEABLE | \ 668 PMD_SECT_CACHEABLE | \
656 PMD_SECT_AP_WRITE | \ 669 PMD_SECT_AP_WRITE | \
657 PMD_SECT_AP_READ 670 PMD_SECT_AP_READ
671 .long PMD_TYPE_SECT | \
672 PMD_SECT_AP_WRITE | \
673 PMD_SECT_AP_READ
658 b __xscale_setup 674 b __xscale_setup
659 .long cpu_arch_name 675 .long cpu_arch_name
660 .long cpu_elf_name 676 .long cpu_elf_name
@@ -675,6 +691,9 @@ __pxa210_proc_info:
675 PMD_SECT_CACHEABLE | \ 691 PMD_SECT_CACHEABLE | \
676 PMD_SECT_AP_WRITE | \ 692 PMD_SECT_AP_WRITE | \
677 PMD_SECT_AP_READ 693 PMD_SECT_AP_READ
694 .long PMD_TYPE_SECT | \
695 PMD_SECT_AP_WRITE | \
696 PMD_SECT_AP_READ
678 b __xscale_setup 697 b __xscale_setup
679 .long cpu_arch_name 698 .long cpu_arch_name
680 .long cpu_elf_name 699 .long cpu_elf_name
@@ -695,6 +714,9 @@ __ixp2400_proc_info:
695 PMD_SECT_CACHEABLE | \ 714 PMD_SECT_CACHEABLE | \
696 PMD_SECT_AP_WRITE | \ 715 PMD_SECT_AP_WRITE | \
697 PMD_SECT_AP_READ 716 PMD_SECT_AP_READ
717 .long PMD_TYPE_SECT | \
718 PMD_SECT_AP_WRITE | \
719 PMD_SECT_AP_READ
698 b __xscale_setup 720 b __xscale_setup
699 .long cpu_arch_name 721 .long cpu_arch_name
700 .long cpu_elf_name 722 .long cpu_elf_name
@@ -715,6 +737,9 @@ __ixp2800_proc_info:
715 PMD_SECT_CACHEABLE | \ 737 PMD_SECT_CACHEABLE | \
716 PMD_SECT_AP_WRITE | \ 738 PMD_SECT_AP_WRITE | \
717 PMD_SECT_AP_READ 739 PMD_SECT_AP_READ
740 .long PMD_TYPE_SECT | \
741 PMD_SECT_AP_WRITE | \
742 PMD_SECT_AP_READ
718 b __xscale_setup 743 b __xscale_setup
719 .long cpu_arch_name 744 .long cpu_arch_name
720 .long cpu_elf_name 745 .long cpu_elf_name
@@ -735,6 +760,9 @@ __ixp42x_proc_info:
735 PMD_SECT_CACHEABLE | \ 760 PMD_SECT_CACHEABLE | \
736 PMD_SECT_AP_WRITE | \ 761 PMD_SECT_AP_WRITE | \
737 PMD_SECT_AP_READ 762 PMD_SECT_AP_READ
763 .long PMD_TYPE_SECT | \
764 PMD_SECT_AP_WRITE | \
765 PMD_SECT_AP_READ
738 b __xscale_setup 766 b __xscale_setup
739 .long cpu_arch_name 767 .long cpu_arch_name
740 .long cpu_elf_name 768 .long cpu_elf_name
@@ -750,7 +778,14 @@ __ixp42x_proc_info:
750__ixp46x_proc_info: 778__ixp46x_proc_info:
751 .long 0x69054200 779 .long 0x69054200
752 .long 0xffffff00 780 .long 0xffffff00
753 .long 0x00000c0e 781 .long PMD_TYPE_SECT | \
782 PMD_SECT_BUFFERABLE | \
783 PMD_SECT_CACHEABLE | \
784 PMD_SECT_AP_WRITE | \
785 PMD_SECT_AP_READ
786 .long PMD_TYPE_SECT | \
787 PMD_SECT_AP_WRITE | \
788 PMD_SECT_AP_READ
754 b __xscale_setup 789 b __xscale_setup
755 .long cpu_arch_name 790 .long cpu_arch_name
756 .long cpu_elf_name 791 .long cpu_elf_name
@@ -771,6 +806,9 @@ __pxa255_proc_info:
771 PMD_SECT_CACHEABLE | \ 806 PMD_SECT_CACHEABLE | \
772 PMD_SECT_AP_WRITE | \ 807 PMD_SECT_AP_WRITE | \
773 PMD_SECT_AP_READ 808 PMD_SECT_AP_READ
809 .long PMD_TYPE_SECT | \
810 PMD_SECT_AP_WRITE | \
811 PMD_SECT_AP_READ
774 b __xscale_setup 812 b __xscale_setup
775 .long cpu_arch_name 813 .long cpu_arch_name
776 .long cpu_elf_name 814 .long cpu_elf_name
@@ -791,6 +829,9 @@ __pxa270_proc_info:
791 PMD_SECT_CACHEABLE | \ 829 PMD_SECT_CACHEABLE | \
792 PMD_SECT_AP_WRITE | \ 830 PMD_SECT_AP_WRITE | \
793 PMD_SECT_AP_READ 831 PMD_SECT_AP_READ
832 .long PMD_TYPE_SECT | \
833 PMD_SECT_AP_WRITE | \
834 PMD_SECT_AP_READ
794 b __xscale_setup 835 b __xscale_setup
795 .long cpu_arch_name 836 .long cpu_arch_name
796 .long cpu_elf_name 837 .long cpu_elf_name
diff --git a/arch/arm/oprofile/op_model_xscale.c b/arch/arm/oprofile/op_model_xscale.c
index e0f0b320d76c..34fdc733743b 100644
--- a/arch/arm/oprofile/op_model_xscale.c
+++ b/arch/arm/oprofile/op_model_xscale.c
@@ -384,7 +384,7 @@ static int xscale_pmu_start(void)
384 int ret; 384 int ret;
385 u32 pmnc = read_pmnc(); 385 u32 pmnc = read_pmnc();
386 386
387 ret = request_irq(XSCALE_PMU_IRQ, xscale_pmu_interrupt, SA_INTERRUPT, 387 ret = request_irq(XSCALE_PMU_IRQ, xscale_pmu_interrupt, IRQF_DISABLED,
388 "XScale PMU", (void *)results); 388 "XScale PMU", (void *)results);
389 389
390 if (ret < 0) { 390 if (ret < 0) {
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ec49495e651e..ec752e16d618 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -91,7 +91,7 @@ config OMAP_32K_TIMER_HZ
91 91
92config OMAP_DM_TIMER 92config OMAP_DM_TIMER
93 bool "Use dual-mode timer" 93 bool "Use dual-mode timer"
94 depends on ARCH_OMAP16XX 94 depends on ARCH_OMAP16XX || ARCH_OMAP24XX
95 help 95 help
96 Select this option if you want to use OMAP Dual-Mode timers. 96 Select this option if you want to use OMAP Dual-Mode timers.
97 97
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index c520e9dcdd8a..7f45c7c3e673 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -27,9 +27,9 @@
27 27
28#include <asm/arch/clock.h> 28#include <asm/arch/clock.h>
29 29
30LIST_HEAD(clocks); 30static LIST_HEAD(clocks);
31static DEFINE_MUTEX(clocks_mutex); 31static DEFINE_MUTEX(clocks_mutex);
32DEFINE_SPINLOCK(clockfw_lock); 32static DEFINE_SPINLOCK(clockfw_lock);
33 33
34static struct clk_functions *arch_clock; 34static struct clk_functions *arch_clock;
35 35
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index 98edc9fdd6d1..a0c71dca2373 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -25,6 +25,14 @@
25#include <asm/io.h> 25#include <asm/io.h>
26#include <asm/system.h> 26#include <asm/system.h>
27 27
28#define VERY_HI_RATE 900000000
29
30#ifdef CONFIG_ARCH_OMAP1
31#define MPU_CLK "mpu"
32#else
33#define MPU_CLK "virt_prcm_set"
34#endif
35
28/* TODO: Add support for SDRAM timing changes */ 36/* TODO: Add support for SDRAM timing changes */
29 37
30int omap_verify_speed(struct cpufreq_policy *policy) 38int omap_verify_speed(struct cpufreq_policy *policy)
@@ -36,7 +44,7 @@ int omap_verify_speed(struct cpufreq_policy *policy)
36 44
37 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, 45 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
38 policy->cpuinfo.max_freq); 46 policy->cpuinfo.max_freq);
39 mpu_clk = clk_get(NULL, "mpu"); 47 mpu_clk = clk_get(NULL, MPU_CLK);
40 if (IS_ERR(mpu_clk)) 48 if (IS_ERR(mpu_clk))
41 return PTR_ERR(mpu_clk); 49 return PTR_ERR(mpu_clk);
42 policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; 50 policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000;
@@ -56,7 +64,7 @@ unsigned int omap_getspeed(unsigned int cpu)
56 if (cpu) 64 if (cpu)
57 return 0; 65 return 0;
58 66
59 mpu_clk = clk_get(NULL, "mpu"); 67 mpu_clk = clk_get(NULL, MPU_CLK);
60 if (IS_ERR(mpu_clk)) 68 if (IS_ERR(mpu_clk))
61 return 0; 69 return 0;
62 rate = clk_get_rate(mpu_clk) / 1000; 70 rate = clk_get_rate(mpu_clk) / 1000;
@@ -73,7 +81,7 @@ static int omap_target(struct cpufreq_policy *policy,
73 struct cpufreq_freqs freqs; 81 struct cpufreq_freqs freqs;
74 int ret = 0; 82 int ret = 0;
75 83
76 mpu_clk = clk_get(NULL, "mpu"); 84 mpu_clk = clk_get(NULL, MPU_CLK);
77 if (IS_ERR(mpu_clk)) 85 if (IS_ERR(mpu_clk))
78 return PTR_ERR(mpu_clk); 86 return PTR_ERR(mpu_clk);
79 87
@@ -93,7 +101,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
93{ 101{
94 struct clk * mpu_clk; 102 struct clk * mpu_clk;
95 103
96 mpu_clk = clk_get(NULL, "mpu"); 104 mpu_clk = clk_get(NULL, MPU_CLK);
97 if (IS_ERR(mpu_clk)) 105 if (IS_ERR(mpu_clk))
98 return PTR_ERR(mpu_clk); 106 return PTR_ERR(mpu_clk);
99 107
@@ -102,7 +110,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
102 policy->cur = policy->min = policy->max = omap_getspeed(0); 110 policy->cur = policy->min = policy->max = omap_getspeed(0);
103 policy->governor = CPUFREQ_DEFAULT_GOVERNOR; 111 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
104 policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; 112 policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
105 policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, 216000000) / 1000; 113 policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, VERY_HI_RATE) / 1000;
106 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 114 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
107 clk_put(mpu_clk); 115 clk_put(mpu_clk);
108 116
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index ca486c9f36b5..1812f237d12f 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -104,7 +104,7 @@ static void omap_init_kp(void)
104 omap_cfg_reg(E20_1610_KBR3); 104 omap_cfg_reg(E20_1610_KBR3);
105 omap_cfg_reg(E19_1610_KBR4); 105 omap_cfg_reg(E19_1610_KBR4);
106 omap_cfg_reg(N19_1610_KBR5); 106 omap_cfg_reg(N19_1610_KBR5);
107 } else if (machine_is_omap_perseus2()) { 107 } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
108 omap_cfg_reg(E2_730_KBR0); 108 omap_cfg_reg(E2_730_KBR0);
109 omap_cfg_reg(J7_730_KBR1); 109 omap_cfg_reg(J7_730_KBR1);
110 omap_cfg_reg(E1_730_KBR2); 110 omap_cfg_reg(E1_730_KBR2);
@@ -161,8 +161,8 @@ static u64 mmc1_dmamask = 0xffffffff;
161 161
162static struct resource mmc1_resources[] = { 162static struct resource mmc1_resources[] = {
163 { 163 {
164 .start = IO_ADDRESS(OMAP_MMC1_BASE), 164 .start = OMAP_MMC1_BASE,
165 .end = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f, 165 .end = OMAP_MMC1_BASE + 0x7f,
166 .flags = IORESOURCE_MEM, 166 .flags = IORESOURCE_MEM,
167 }, 167 },
168 { 168 {
@@ -190,8 +190,8 @@ static u64 mmc2_dmamask = 0xffffffff;
190 190
191static struct resource mmc2_resources[] = { 191static struct resource mmc2_resources[] = {
192 { 192 {
193 .start = IO_ADDRESS(OMAP_MMC2_BASE), 193 .start = OMAP_MMC2_BASE,
194 .end = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f, 194 .end = OMAP_MMC2_BASE + 0x7f,
195 .flags = IORESOURCE_MEM, 195 .flags = IORESOURCE_MEM,
196 }, 196 },
197 { 197 {
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5dac4230360d..9eddc9507147 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -24,9 +24,9 @@
24#include <linux/spinlock.h> 24#include <linux/spinlock.h>
25#include <linux/errno.h> 25#include <linux/errno.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/irq.h>
27 28
28#include <asm/system.h> 29#include <asm/system.h>
29#include <asm/irq.h>
30#include <asm/hardware.h> 30#include <asm/hardware.h>
31#include <asm/dma.h> 31#include <asm/dma.h>
32#include <asm/io.h> 32#include <asm/io.h>
@@ -43,6 +43,7 @@
43 43
44#define OMAP_DMA_ACTIVE 0x01 44#define OMAP_DMA_ACTIVE 0x01
45#define OMAP_DMA_CCR_EN (1 << 7) 45#define OMAP_DMA_CCR_EN (1 << 7)
46#define OMAP2_DMA_CSR_CLEAR_MASK 0xffe
46 47
47#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec) 48#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec)
48 49
@@ -166,18 +167,24 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
166 if (cpu_is_omap24xx() && dma_trigger) { 167 if (cpu_is_omap24xx() && dma_trigger) {
167 u32 val = OMAP_DMA_CCR_REG(lch); 168 u32 val = OMAP_DMA_CCR_REG(lch);
168 169
170 val &= ~(3 << 19);
169 if (dma_trigger > 63) 171 if (dma_trigger > 63)
170 val |= 1 << 20; 172 val |= 1 << 20;
171 if (dma_trigger > 31) 173 if (dma_trigger > 31)
172 val |= 1 << 19; 174 val |= 1 << 19;
173 175
176 val &= ~(0x1f);
174 val |= (dma_trigger & 0x1f); 177 val |= (dma_trigger & 0x1f);
175 178
176 if (sync_mode & OMAP_DMA_SYNC_FRAME) 179 if (sync_mode & OMAP_DMA_SYNC_FRAME)
177 val |= 1 << 5; 180 val |= 1 << 5;
181 else
182 val &= ~(1 << 5);
178 183
179 if (sync_mode & OMAP_DMA_SYNC_BLOCK) 184 if (sync_mode & OMAP_DMA_SYNC_BLOCK)
180 val |= 1 << 18; 185 val |= 1 << 18;
186 else
187 val &= ~(1 << 18);
181 188
182 if (src_or_dst_synch) 189 if (src_or_dst_synch)
183 val |= 1 << 24; /* source synch */ 190 val |= 1 << 24; /* source synch */
@@ -286,22 +293,39 @@ void omap_set_dma_src_data_pack(int lch, int enable)
286 293
287void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) 294void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
288{ 295{
296 unsigned int burst = 0;
289 OMAP_DMA_CSDP_REG(lch) &= ~(0x03 << 7); 297 OMAP_DMA_CSDP_REG(lch) &= ~(0x03 << 7);
290 298
291 switch (burst_mode) { 299 switch (burst_mode) {
292 case OMAP_DMA_DATA_BURST_DIS: 300 case OMAP_DMA_DATA_BURST_DIS:
293 break; 301 break;
294 case OMAP_DMA_DATA_BURST_4: 302 case OMAP_DMA_DATA_BURST_4:
295 OMAP_DMA_CSDP_REG(lch) |= (0x02 << 7); 303 if (cpu_is_omap24xx())
304 burst = 0x1;
305 else
306 burst = 0x2;
296 break; 307 break;
297 case OMAP_DMA_DATA_BURST_8: 308 case OMAP_DMA_DATA_BURST_8:
298 /* not supported by current hardware 309 if (cpu_is_omap24xx()) {
310 burst = 0x2;
311 break;
312 }
313 /* not supported by current hardware on OMAP1
299 * w |= (0x03 << 7); 314 * w |= (0x03 << 7);
300 * fall through 315 * fall through
301 */ 316 */
317 case OMAP_DMA_DATA_BURST_16:
318 if (cpu_is_omap24xx()) {
319 burst = 0x3;
320 break;
321 }
322 /* OMAP1 don't support burst 16
323 * fall through
324 */
302 default: 325 default:
303 BUG(); 326 BUG();
304 } 327 }
328 OMAP_DMA_CSDP_REG(lch) |= (burst << 7);
305} 329}
306 330
307/* Note that dest_port is only for OMAP1 */ 331/* Note that dest_port is only for OMAP1 */
@@ -348,30 +372,49 @@ void omap_set_dma_dest_data_pack(int lch, int enable)
348 372
349void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) 373void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
350{ 374{
375 unsigned int burst = 0;
351 OMAP_DMA_CSDP_REG(lch) &= ~(0x03 << 14); 376 OMAP_DMA_CSDP_REG(lch) &= ~(0x03 << 14);
352 377
353 switch (burst_mode) { 378 switch (burst_mode) {
354 case OMAP_DMA_DATA_BURST_DIS: 379 case OMAP_DMA_DATA_BURST_DIS:
355 break; 380 break;
356 case OMAP_DMA_DATA_BURST_4: 381 case OMAP_DMA_DATA_BURST_4:
357 OMAP_DMA_CSDP_REG(lch) |= (0x02 << 14); 382 if (cpu_is_omap24xx())
383 burst = 0x1;
384 else
385 burst = 0x2;
358 break; 386 break;
359 case OMAP_DMA_DATA_BURST_8: 387 case OMAP_DMA_DATA_BURST_8:
360 OMAP_DMA_CSDP_REG(lch) |= (0x03 << 14); 388 if (cpu_is_omap24xx())
389 burst = 0x2;
390 else
391 burst = 0x3;
361 break; 392 break;
393 case OMAP_DMA_DATA_BURST_16:
394 if (cpu_is_omap24xx()) {
395 burst = 0x3;
396 break;
397 }
398 /* OMAP1 don't support burst 16
399 * fall through
400 */
362 default: 401 default:
363 printk(KERN_ERR "Invalid DMA burst mode\n"); 402 printk(KERN_ERR "Invalid DMA burst mode\n");
364 BUG(); 403 BUG();
365 return; 404 return;
366 } 405 }
406 OMAP_DMA_CSDP_REG(lch) |= (burst << 14);
367} 407}
368 408
369static inline void omap_enable_channel_irq(int lch) 409static inline void omap_enable_channel_irq(int lch)
370{ 410{
371 u32 status; 411 u32 status;
372 412
373 /* Read CSR to make sure it's cleared. */ 413 /* Clear CSR */
374 status = OMAP_DMA_CSR_REG(lch); 414 if (cpu_class_is_omap1())
415 status = OMAP_DMA_CSR_REG(lch);
416 else if (cpu_is_omap24xx())
417 OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK;
375 418
376 /* Enable some nice interrupts. */ 419 /* Enable some nice interrupts. */
377 OMAP_DMA_CICR_REG(lch) = dma_chan[lch].enabled_irqs; 420 OMAP_DMA_CICR_REG(lch) = dma_chan[lch].enabled_irqs;
@@ -470,11 +513,13 @@ int omap_request_dma(int dev_id, const char *dev_name,
470 chan->dev_name = dev_name; 513 chan->dev_name = dev_name;
471 chan->callback = callback; 514 chan->callback = callback;
472 chan->data = data; 515 chan->data = data;
473 chan->enabled_irqs = OMAP_DMA_TOUT_IRQ | OMAP_DMA_DROP_IRQ | 516 chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
474 OMAP_DMA_BLOCK_IRQ;
475 517
476 if (cpu_is_omap24xx()) 518 if (cpu_class_is_omap1())
477 chan->enabled_irqs |= OMAP2_DMA_TRANS_ERR_IRQ; 519 chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ;
520 else if (cpu_is_omap24xx())
521 chan->enabled_irqs |= OMAP2_DMA_MISALIGNED_ERR_IRQ |
522 OMAP2_DMA_TRANS_ERR_IRQ;
478 523
479 if (cpu_is_omap16xx()) { 524 if (cpu_is_omap16xx()) {
480 /* If the sync device is set, configure it dynamically. */ 525 /* If the sync device is set, configure it dynamically. */
@@ -494,7 +539,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
494 539
495 omap_enable_channel_irq(free_ch); 540 omap_enable_channel_irq(free_ch);
496 /* Clear the CSR register and IRQ status register */ 541 /* Clear the CSR register and IRQ status register */
497 OMAP_DMA_CSR_REG(free_ch) = 0x0; 542 OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK;
498 omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0); 543 omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0);
499 } 544 }
500 545
@@ -534,7 +579,7 @@ void omap_free_dma(int lch)
534 omap_writel(val, OMAP_DMA4_IRQENABLE_L0); 579 omap_writel(val, OMAP_DMA4_IRQENABLE_L0);
535 580
536 /* Clear the CSR register and IRQ status register */ 581 /* Clear the CSR register and IRQ status register */
537 OMAP_DMA_CSR_REG(lch) = 0x0; 582 OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK;
538 583
539 val = omap_readl(OMAP_DMA4_IRQSTATUS_L0); 584 val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
540 val |= 1 << lch; 585 val |= 1 << lch;
@@ -798,7 +843,7 @@ static int omap1_dma_handle_ch(int ch)
798 "%d (CSR %04x)\n", ch, csr); 843 "%d (CSR %04x)\n", ch, csr);
799 return 0; 844 return 0;
800 } 845 }
801 if (unlikely(csr & OMAP_DMA_TOUT_IRQ)) 846 if (unlikely(csr & OMAP1_DMA_TOUT_IRQ))
802 printk(KERN_WARNING "DMA timeout with device %d\n", 847 printk(KERN_WARNING "DMA timeout with device %d\n",
803 dma_chan[ch].dev_id); 848 dma_chan[ch].dev_id);
804 if (unlikely(csr & OMAP_DMA_DROP_IRQ)) 849 if (unlikely(csr & OMAP_DMA_DROP_IRQ))
@@ -846,20 +891,21 @@ static int omap2_dma_handle_ch(int ch)
846 return 0; 891 return 0;
847 if (unlikely(dma_chan[ch].dev_id == -1)) 892 if (unlikely(dma_chan[ch].dev_id == -1))
848 return 0; 893 return 0;
849 /* REVISIT: According to 24xx TRM, there's no TOUT_IE */
850 if (unlikely(status & OMAP_DMA_TOUT_IRQ))
851 printk(KERN_INFO "DMA timeout with device %d\n",
852 dma_chan[ch].dev_id);
853 if (unlikely(status & OMAP_DMA_DROP_IRQ)) 894 if (unlikely(status & OMAP_DMA_DROP_IRQ))
854 printk(KERN_INFO 895 printk(KERN_INFO
855 "DMA synchronization event drop occurred with device " 896 "DMA synchronization event drop occurred with device "
856 "%d\n", dma_chan[ch].dev_id); 897 "%d\n", dma_chan[ch].dev_id);
857
858 if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ)) 898 if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ))
859 printk(KERN_INFO "DMA transaction error with device %d\n", 899 printk(KERN_INFO "DMA transaction error with device %d\n",
860 dma_chan[ch].dev_id); 900 dma_chan[ch].dev_id);
901 if (unlikely(status & OMAP2_DMA_SECURE_ERR_IRQ))
902 printk(KERN_INFO "DMA secure error with device %d\n",
903 dma_chan[ch].dev_id);
904 if (unlikely(status & OMAP2_DMA_MISALIGNED_ERR_IRQ))
905 printk(KERN_INFO "DMA misaligned error with device %d\n",
906 dma_chan[ch].dev_id);
861 907
862 OMAP_DMA_CSR_REG(ch) = 0x20; 908 OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK;
863 909
864 val = omap_readl(OMAP_DMA4_IRQSTATUS_L0); 910 val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
865 /* ch in this function is from 0-31 while in register it is 1-32 */ 911 /* ch in this function is from 0-31 while in register it is 1-32 */
@@ -893,7 +939,7 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id,
893static struct irqaction omap24xx_dma_irq = { 939static struct irqaction omap24xx_dma_irq = {
894 .name = "DMA", 940 .name = "DMA",
895 .handler = omap2_dma_irq_handler, 941 .handler = omap2_dma_irq_handler,
896 .flags = SA_INTERRUPT 942 .flags = IRQF_DISABLED
897}; 943};
898 944
899#else 945#else
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index eba3cb52ad87..50524436de63 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -4,7 +4,8 @@
4 * OMAP Dual-Mode Timers 4 * OMAP Dual-Mode Timers
5 * 5 *
6 * Copyright (C) 2005 Nokia Corporation 6 * Copyright (C) 2005 Nokia Corporation
7 * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com> 7 * OMAP2 support by Juha Yrjola
8 * API improvements and OMAP2 clock framework support by Timo Teras
8 * 9 *
9 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 11 * under the terms of the GNU General Public License as published by the
@@ -26,15 +27,17 @@
26 */ 27 */
27 28
28#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/spinlock.h>
31#include <linux/errno.h>
32#include <linux/list.h>
33#include <linux/clk.h>
34#include <linux/delay.h>
29#include <asm/hardware.h> 35#include <asm/hardware.h>
30#include <asm/arch/dmtimer.h> 36#include <asm/arch/dmtimer.h>
31#include <asm/io.h> 37#include <asm/io.h>
32#include <asm/arch/irqs.h> 38#include <asm/arch/irqs.h>
33#include <linux/spinlock.h>
34#include <linux/list.h>
35
36#define OMAP_TIMER_COUNT 8
37 39
40/* register offsets */
38#define OMAP_TIMER_ID_REG 0x00 41#define OMAP_TIMER_ID_REG 0x00
39#define OMAP_TIMER_OCP_CFG_REG 0x10 42#define OMAP_TIMER_OCP_CFG_REG 0x10
40#define OMAP_TIMER_SYS_STAT_REG 0x14 43#define OMAP_TIMER_SYS_STAT_REG 0x14
@@ -50,52 +53,196 @@
50#define OMAP_TIMER_CAPTURE_REG 0x3c 53#define OMAP_TIMER_CAPTURE_REG 0x3c
51#define OMAP_TIMER_IF_CTRL_REG 0x40 54#define OMAP_TIMER_IF_CTRL_REG 0x40
52 55
56/* timer control reg bits */
57#define OMAP_TIMER_CTRL_GPOCFG (1 << 14)
58#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13)
59#define OMAP_TIMER_CTRL_PT (1 << 12)
60#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8)
61#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8)
62#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8)
63#define OMAP_TIMER_CTRL_SCPWM (1 << 7)
64#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */
65#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */
66#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* how much to shift the prescaler value */
67#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
68#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
69
70struct omap_dm_timer {
71 unsigned long phys_base;
72 int irq;
73#ifdef CONFIG_ARCH_OMAP2
74 struct clk *iclk, *fclk;
75#endif
76 void __iomem *io_base;
77 unsigned reserved:1;
78};
53 79
54static struct dmtimer_info_struct { 80#ifdef CONFIG_ARCH_OMAP1
55 struct list_head unused_timers;
56 struct list_head reserved_timers;
57} dm_timer_info;
58 81
59static struct omap_dm_timer dm_timers[] = { 82static struct omap_dm_timer dm_timers[] = {
60 { .base=0xfffb1400, .irq=INT_1610_GPTIMER1 }, 83 { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 },
61 { .base=0xfffb1c00, .irq=INT_1610_GPTIMER2 }, 84 { .phys_base = 0xfffb1c00, .irq = INT_1610_GPTIMER2 },
62 { .base=0xfffb2400, .irq=INT_1610_GPTIMER3 }, 85 { .phys_base = 0xfffb2400, .irq = INT_1610_GPTIMER3 },
63 { .base=0xfffb2c00, .irq=INT_1610_GPTIMER4 }, 86 { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 },
64 { .base=0xfffb3400, .irq=INT_1610_GPTIMER5 }, 87 { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 },
65 { .base=0xfffb3c00, .irq=INT_1610_GPTIMER6 }, 88 { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 },
66 { .base=0xfffb4400, .irq=INT_1610_GPTIMER7 }, 89 { .phys_base = 0xfffb4400, .irq = INT_1610_GPTIMER7 },
67 { .base=0xfffb4c00, .irq=INT_1610_GPTIMER8 }, 90 { .phys_base = 0xfffb4c00, .irq = INT_1610_GPTIMER8 },
68 { .base=0x0 },
69}; 91};
70 92
93#elif defined(CONFIG_ARCH_OMAP2)
94
95static struct omap_dm_timer dm_timers[] = {
96 { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 },
97 { .phys_base = 0x4802a000, .irq = INT_24XX_GPTIMER2 },
98 { .phys_base = 0x48078000, .irq = INT_24XX_GPTIMER3 },
99 { .phys_base = 0x4807a000, .irq = INT_24XX_GPTIMER4 },
100 { .phys_base = 0x4807c000, .irq = INT_24XX_GPTIMER5 },
101 { .phys_base = 0x4807e000, .irq = INT_24XX_GPTIMER6 },
102 { .phys_base = 0x48080000, .irq = INT_24XX_GPTIMER7 },
103 { .phys_base = 0x48082000, .irq = INT_24XX_GPTIMER8 },
104 { .phys_base = 0x48084000, .irq = INT_24XX_GPTIMER9 },
105 { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
106 { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
107 { .phys_base = 0x4808a000, .irq = INT_24XX_GPTIMER12 },
108};
109
110static const char *dm_source_names[] = {
111 "sys_ck",
112 "func_32k_ck",
113 "alt_ck"
114};
71 115
116static struct clk *dm_source_clocks[3];
117
118#else
119
120#error OMAP architecture not supported!
121
122#endif
123
124static const int dm_timer_count = ARRAY_SIZE(dm_timers);
72static spinlock_t dm_timer_lock; 125static spinlock_t dm_timer_lock;
73 126
127static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg)
128{
129 return readl(timer->io_base + reg);
130}
74 131
75inline void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value) 132static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value)
76{ 133{
77 omap_writel(value, timer->base + reg); 134 writel(value, timer->io_base + reg);
78 while (omap_dm_timer_read_reg(timer, OMAP_TIMER_WRITE_PEND_REG)) 135 while (omap_dm_timer_read_reg(timer, OMAP_TIMER_WRITE_PEND_REG))
79 ; 136 ;
80} 137}
81 138
82u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg) 139static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
83{ 140{
84 return omap_readl(timer->base + reg); 141 int c;
142
143 c = 0;
144 while (!(omap_dm_timer_read_reg(timer, OMAP_TIMER_SYS_STAT_REG) & 1)) {
145 c++;
146 if (c > 100000) {
147 printk(KERN_ERR "Timer failed to reset\n");
148 return;
149 }
150 }
85} 151}
86 152
87int omap_dm_timers_active(void) 153static void omap_dm_timer_reset(struct omap_dm_timer *timer)
154{
155 u32 l;
156
157 if (timer != &dm_timers[0]) {
158 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
159 omap_dm_timer_wait_for_reset(timer);
160 }
161 omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_SYS_CLK);
162
163 /* Set to smart-idle mode */
164 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG);
165 l |= 0x02 << 3;
166 omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
167}
168
169static void omap_dm_timer_prepare(struct omap_dm_timer *timer)
170{
171#ifdef CONFIG_ARCH_OMAP2
172 clk_enable(timer->iclk);
173 clk_enable(timer->fclk);
174#endif
175 omap_dm_timer_reset(timer);
176}
177
178struct omap_dm_timer *omap_dm_timer_request(void)
179{
180 struct omap_dm_timer *timer = NULL;
181 unsigned long flags;
182 int i;
183
184 spin_lock_irqsave(&dm_timer_lock, flags);
185 for (i = 0; i < dm_timer_count; i++) {
186 if (dm_timers[i].reserved)
187 continue;
188
189 timer = &dm_timers[i];
190 timer->reserved = 1;
191 break;
192 }
193 spin_unlock_irqrestore(&dm_timer_lock, flags);
194
195 if (timer != NULL)
196 omap_dm_timer_prepare(timer);
197
198 return timer;
199}
200
201struct omap_dm_timer *omap_dm_timer_request_specific(int id)
88{ 202{
89 struct omap_dm_timer *timer; 203 struct omap_dm_timer *timer;
204 unsigned long flags;
90 205
91 for (timer = &dm_timers[0]; timer->base; ++timer) 206 spin_lock_irqsave(&dm_timer_lock, flags);
92 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) & 207 if (id <= 0 || id > dm_timer_count || dm_timers[id-1].reserved) {
93 OMAP_TIMER_CTRL_ST) 208 spin_unlock_irqrestore(&dm_timer_lock, flags);
94 return 1; 209 printk("BUG: warning at %s:%d/%s(): unable to get timer %d\n",
210 __FILE__, __LINE__, __FUNCTION__, id);
211 dump_stack();
212 return NULL;
213 }
95 214
96 return 0; 215 timer = &dm_timers[id-1];
216 timer->reserved = 1;
217 spin_unlock_irqrestore(&dm_timer_lock, flags);
218
219 omap_dm_timer_prepare(timer);
220
221 return timer;
97} 222}
98 223
224void omap_dm_timer_free(struct omap_dm_timer *timer)
225{
226 omap_dm_timer_reset(timer);
227#ifdef CONFIG_ARCH_OMAP2
228 clk_disable(timer->iclk);
229 clk_disable(timer->fclk);
230#endif
231 WARN_ON(!timer->reserved);
232 timer->reserved = 0;
233}
234
235int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
236{
237 return timer->irq;
238}
239
240#if defined(CONFIG_ARCH_OMAP1)
241
242struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
243{
244 BUG();
245}
99 246
100/** 247/**
101 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR 248 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
@@ -103,184 +250,229 @@ int omap_dm_timers_active(void)
103 */ 250 */
104__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) 251__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
105{ 252{
106 int n; 253 int i;
107 254
108 /* If ARMXOR cannot be idled this function call is unnecessary */ 255 /* If ARMXOR cannot be idled this function call is unnecessary */
109 if (!(inputmask & (1 << 1))) 256 if (!(inputmask & (1 << 1)))
110 return inputmask; 257 return inputmask;
111 258
112 /* If any active timer is using ARMXOR return modified mask */ 259 /* If any active timer is using ARMXOR return modified mask */
113 for (n = 0; dm_timers[n].base; ++n) 260 for (i = 0; i < dm_timer_count; i++) {
114 if (omap_dm_timer_read_reg(&dm_timers[n], OMAP_TIMER_CTRL_REG)& 261 u32 l;
115 OMAP_TIMER_CTRL_ST) { 262
116 if (((omap_readl(MOD_CONF_CTRL_1)>>(n*2)) & 0x03) == 0) 263 l = omap_dm_timer_read_reg(&dm_timers[i], OMAP_TIMER_CTRL_REG);
264 if (l & OMAP_TIMER_CTRL_ST) {
265 if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
117 inputmask &= ~(1 << 1); 266 inputmask &= ~(1 << 1);
118 else 267 else
119 inputmask &= ~(1 << 2); 268 inputmask &= ~(1 << 2);
120 } 269 }
270 }
121 271
122 return inputmask; 272 return inputmask;
123} 273}
124 274
275#elif defined(CONFIG_ARCH_OMAP2)
125 276
126void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) 277struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
127{ 278{
128 int n = (timer - dm_timers) << 1; 279 return timer->fclk;
129 u32 l; 280}
130 281
131 l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); 282__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
132 l |= source << n; 283{
133 omap_writel(l, MOD_CONF_CTRL_1); 284 BUG();
134} 285}
135 286
287#endif
136 288
137static void omap_dm_timer_reset(struct omap_dm_timer *timer) 289void omap_dm_timer_trigger(struct omap_dm_timer *timer)
138{ 290{
139 /* Reset and set posted mode */ 291 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
140 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
141 omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, 0x02);
142
143 omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_ARMXOR);
144} 292}
145 293
294void omap_dm_timer_start(struct omap_dm_timer *timer)
295{
296 u32 l;
146 297
298 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
299 if (!(l & OMAP_TIMER_CTRL_ST)) {
300 l |= OMAP_TIMER_CTRL_ST;
301 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
302 }
303}
147 304
148struct omap_dm_timer * omap_dm_timer_request(void) 305void omap_dm_timer_stop(struct omap_dm_timer *timer)
149{ 306{
150 struct omap_dm_timer *timer = NULL; 307 u32 l;
151 unsigned long flags;
152 308
153 spin_lock_irqsave(&dm_timer_lock, flags); 309 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
154 if (!list_empty(&dm_timer_info.unused_timers)) { 310 if (l & OMAP_TIMER_CTRL_ST) {
155 timer = (struct omap_dm_timer *) 311 l &= ~0x1;
156 dm_timer_info.unused_timers.next; 312 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
157 list_move_tail((struct list_head *)timer,
158 &dm_timer_info.reserved_timers);
159 } 313 }
160 spin_unlock_irqrestore(&dm_timer_lock, flags);
161
162 return timer;
163} 314}
164 315
316#ifdef CONFIG_ARCH_OMAP1
165 317
166void omap_dm_timer_free(struct omap_dm_timer *timer) 318void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
167{ 319{
168 unsigned long flags; 320 int n = (timer - dm_timers) << 1;
169 321 u32 l;
170 omap_dm_timer_reset(timer);
171 322
172 spin_lock_irqsave(&dm_timer_lock, flags); 323 l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
173 list_move_tail((struct list_head *)timer, &dm_timer_info.unused_timers); 324 l |= source << n;
174 spin_unlock_irqrestore(&dm_timer_lock, flags); 325 omap_writel(l, MOD_CONF_CTRL_1);
175} 326}
176 327
177void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, 328#else
178 unsigned int value)
179{
180 omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value);
181}
182 329
183unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) 330void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
184{ 331{
185 return omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG); 332 if (source < 0 || source >= 3)
186} 333 return;
187 334
188void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) 335 clk_disable(timer->fclk);
189{ 336 clk_set_parent(timer->fclk, dm_source_clocks[source]);
190 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); 337 clk_enable(timer->fclk);
338
339 /* When the functional clock disappears, too quick writes seem to
340 * cause an abort. */
341 __delay(15000);
191} 342}
192 343
193void omap_dm_timer_enable_autoreload(struct omap_dm_timer *timer) 344#endif
345
346void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
347 unsigned int load)
194{ 348{
195 u32 l; 349 u32 l;
350
196 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); 351 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
197 l |= OMAP_TIMER_CTRL_AR; 352 if (autoreload)
353 l |= OMAP_TIMER_CTRL_AR;
354 else
355 l &= ~OMAP_TIMER_CTRL_AR;
198 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 356 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
357 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
358 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
199} 359}
200 360
201void omap_dm_timer_trigger(struct omap_dm_timer *timer) 361void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
202{ 362 unsigned int match)
203 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 1);
204}
205
206void omap_dm_timer_set_trigger(struct omap_dm_timer *timer, unsigned int value)
207{ 363{
208 u32 l; 364 u32 l;
209 365
210 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); 366 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
211 l |= value & 0x3; 367 if (enable)
368 l |= OMAP_TIMER_CTRL_CE;
369 else
370 l &= ~OMAP_TIMER_CTRL_CE;
212 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 371 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
372 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
213} 373}
214 374
215void omap_dm_timer_start(struct omap_dm_timer *timer) 375
376void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
377 int toggle, int trigger)
216{ 378{
217 u32 l; 379 u32 l;
218 380
219 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); 381 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
220 l |= OMAP_TIMER_CTRL_ST; 382 l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
383 OMAP_TIMER_CTRL_PT | (0x03 << 10));
384 if (def_on)
385 l |= OMAP_TIMER_CTRL_SCPWM;
386 if (toggle)
387 l |= OMAP_TIMER_CTRL_PT;
388 l |= trigger << 10;
221 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 389 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
222} 390}
223 391
224void omap_dm_timer_stop(struct omap_dm_timer *timer) 392void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
225{ 393{
226 u32 l; 394 u32 l;
227 395
228 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); 396 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
229 l &= ~0x1; 397 l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
398 if (prescaler >= 0x00 && prescaler <= 0x07) {
399 l |= OMAP_TIMER_CTRL_PRE;
400 l |= prescaler << 2;
401 }
230 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 402 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
231} 403}
232 404
233unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) 405void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
406 unsigned int value)
234{ 407{
235 return omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG); 408 omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value);
236} 409}
237 410
238void omap_dm_timer_reset_counter(struct omap_dm_timer *timer) 411unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
239{ 412{
240 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, 0); 413 return omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG);
241} 414}
242 415
243void omap_dm_timer_set_load(struct omap_dm_timer *timer, unsigned int load) 416void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
244{ 417{
245 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); 418 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value);
246} 419}
247 420
248void omap_dm_timer_set_match(struct omap_dm_timer *timer, unsigned int match) 421unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
249{ 422{
250 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); 423 return omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG);
251} 424}
252 425
253void omap_dm_timer_enable_compare(struct omap_dm_timer *timer) 426void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
254{ 427{
255 u32 l; 428 return omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
256
257 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
258 l |= OMAP_TIMER_CTRL_CE;
259 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
260} 429}
261 430
431int omap_dm_timers_active(void)
432{
433 int i;
434
435 for (i = 0; i < dm_timer_count; i++) {
436 struct omap_dm_timer *timer;
437
438 timer = &dm_timers[i];
439 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
440 OMAP_TIMER_CTRL_ST)
441 return 1;
442 }
443 return 0;
444}
262 445
263static inline void __dm_timer_init(void) 446int omap_dm_timer_init(void)
264{ 447{
265 struct omap_dm_timer *timer; 448 struct omap_dm_timer *timer;
449 int i;
450
451 if (!(cpu_is_omap16xx() || cpu_is_omap24xx()))
452 return -ENODEV;
266 453
267 spin_lock_init(&dm_timer_lock); 454 spin_lock_init(&dm_timer_lock);
268 INIT_LIST_HEAD(&dm_timer_info.unused_timers); 455#ifdef CONFIG_ARCH_OMAP2
269 INIT_LIST_HEAD(&dm_timer_info.reserved_timers); 456 for (i = 0; i < ARRAY_SIZE(dm_source_names); i++) {
270 457 dm_source_clocks[i] = clk_get(NULL, dm_source_names[i]);
271 timer = &dm_timers[0]; 458 BUG_ON(dm_source_clocks[i] == NULL);
272 while (timer->base) { 459 }
273 list_add_tail((struct list_head *)timer, &dm_timer_info.unused_timers); 460#endif
274 omap_dm_timer_reset(timer); 461
275 timer++; 462 for (i = 0; i < dm_timer_count; i++) {
463#ifdef CONFIG_ARCH_OMAP2
464 char clk_name[16];
465#endif
466
467 timer = &dm_timers[i];
468 timer->io_base = (void __iomem *) io_p2v(timer->phys_base);
469#ifdef CONFIG_ARCH_OMAP2
470 sprintf(clk_name, "gpt%d_ick", i + 1);
471 timer->iclk = clk_get(NULL, clk_name);
472 sprintf(clk_name, "gpt%d_fck", i + 1);
473 timer->fclk = clk_get(NULL, clk_name);
474#endif
276 } 475 }
277}
278 476
279static int __init omap_dm_timer_init(void)
280{
281 if (cpu_is_omap16xx())
282 __dm_timer_init();
283 return 0; 477 return 0;
284} 478}
285
286arch_initcall(omap_dm_timer_init);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 418b88fbea8e..fec7970e564d 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -536,6 +536,49 @@ static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
536 _clear_gpio_irqbank(bank, 1 << get_gpio_index(gpio)); 536 _clear_gpio_irqbank(bank, 1 << get_gpio_index(gpio));
537} 537}
538 538
539static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
540{
541 void __iomem *reg = bank->base;
542 int inv = 0;
543 u32 l;
544 u32 mask;
545
546 switch (bank->method) {
547 case METHOD_MPUIO:
548 reg += OMAP_MPUIO_GPIO_MASKIT;
549 mask = 0xffff;
550 inv = 1;
551 break;
552 case METHOD_GPIO_1510:
553 reg += OMAP1510_GPIO_INT_MASK;
554 mask = 0xffff;
555 inv = 1;
556 break;
557 case METHOD_GPIO_1610:
558 reg += OMAP1610_GPIO_IRQENABLE1;
559 mask = 0xffff;
560 break;
561 case METHOD_GPIO_730:
562 reg += OMAP730_GPIO_INT_MASK;
563 mask = 0xffffffff;
564 inv = 1;
565 break;
566 case METHOD_GPIO_24XX:
567 reg += OMAP24XX_GPIO_IRQENABLE1;
568 mask = 0xffffffff;
569 break;
570 default:
571 BUG();
572 return 0;
573 }
574
575 l = __raw_readl(reg);
576 if (inv)
577 l = ~l;
578 l &= mask;
579 return l;
580}
581
539static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enable) 582static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enable)
540{ 583{
541 void __iomem *reg = bank->base; 584 void __iomem *reg = bank->base;
@@ -735,10 +778,12 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
735 u32 isr; 778 u32 isr;
736 unsigned int gpio_irq; 779 unsigned int gpio_irq;
737 struct gpio_bank *bank; 780 struct gpio_bank *bank;
781 u32 retrigger = 0;
782 int unmasked = 0;
738 783
739 desc->chip->ack(irq); 784 desc->chip->ack(irq);
740 785
741 bank = (struct gpio_bank *) desc->data; 786 bank = get_irq_data(irq);
742 if (bank->method == METHOD_MPUIO) 787 if (bank->method == METHOD_MPUIO)
743 isr_reg = bank->base + OMAP_MPUIO_GPIO_INT; 788 isr_reg = bank->base + OMAP_MPUIO_GPIO_INT;
744#ifdef CONFIG_ARCH_OMAP15XX 789#ifdef CONFIG_ARCH_OMAP15XX
@@ -759,18 +804,22 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
759#endif 804#endif
760 while(1) { 805 while(1) {
761 u32 isr_saved, level_mask = 0; 806 u32 isr_saved, level_mask = 0;
807 u32 enabled;
762 808
763 isr_saved = isr = __raw_readl(isr_reg); 809 enabled = _get_gpio_irqbank_mask(bank);
810 isr_saved = isr = __raw_readl(isr_reg) & enabled;
764 811
765 if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO)) 812 if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
766 isr &= 0x0000ffff; 813 isr &= 0x0000ffff;
767 814
768 if (cpu_is_omap24xx()) 815 if (cpu_is_omap24xx()) {
769 level_mask = 816 level_mask =
770 __raw_readl(bank->base + 817 __raw_readl(bank->base +
771 OMAP24XX_GPIO_LEVELDETECT0) | 818 OMAP24XX_GPIO_LEVELDETECT0) |
772 __raw_readl(bank->base + 819 __raw_readl(bank->base +
773 OMAP24XX_GPIO_LEVELDETECT1); 820 OMAP24XX_GPIO_LEVELDETECT1);
821 level_mask &= enabled;
822 }
774 823
775 /* clear edge sensitive interrupts before handler(s) are 824 /* clear edge sensitive interrupts before handler(s) are
776 called so that we don't miss any interrupt occurred while 825 called so that we don't miss any interrupt occurred while
@@ -781,19 +830,55 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
781 830
782 /* if there is only edge sensitive GPIO pin interrupts 831 /* if there is only edge sensitive GPIO pin interrupts
783 configured, we could unmask GPIO bank interrupt immediately */ 832 configured, we could unmask GPIO bank interrupt immediately */
784 if (!level_mask) 833 if (!level_mask && !unmasked) {
834 unmasked = 1;
785 desc->chip->unmask(irq); 835 desc->chip->unmask(irq);
836 }
786 837
838 isr |= retrigger;
839 retrigger = 0;
787 if (!isr) 840 if (!isr)
788 break; 841 break;
789 842
790 gpio_irq = bank->virtual_irq_start; 843 gpio_irq = bank->virtual_irq_start;
791 for (; isr != 0; isr >>= 1, gpio_irq++) { 844 for (; isr != 0; isr >>= 1, gpio_irq++) {
792 struct irqdesc *d; 845 struct irqdesc *d;
846 int irq_mask;
793 if (!(isr & 1)) 847 if (!(isr & 1))
794 continue; 848 continue;
795 d = irq_desc + gpio_irq; 849 d = irq_desc + gpio_irq;
850 /* Don't run the handler if it's already running
851 * or was disabled lazely.
852 */
853 if (unlikely((d->depth ||
854 (d->status & IRQ_INPROGRESS)))) {
855 irq_mask = 1 <<
856 (gpio_irq - bank->virtual_irq_start);
857 /* The unmasking will be done by
858 * enable_irq in case it is disabled or
859 * after returning from the handler if
860 * it's already running.
861 */
862 _enable_gpio_irqbank(bank, irq_mask, 0);
863 if (!d->depth) {
864 /* Level triggered interrupts
865 * won't ever be reentered
866 */
867 BUG_ON(level_mask & irq_mask);
868 d->status |= IRQ_PENDING;
869 }
870 continue;
871 }
872
796 desc_handle_irq(gpio_irq, d, regs); 873 desc_handle_irq(gpio_irq, d, regs);
874
875 if (unlikely((d->status & IRQ_PENDING) && !d->depth)) {
876 irq_mask = 1 <<
877 (gpio_irq - bank->virtual_irq_start);
878 d->status &= ~IRQ_PENDING;
879 _enable_gpio_irqbank(bank, irq_mask, 1);
880 retrigger |= irq_mask;
881 }
797 } 882 }
798 883
799 if (cpu_is_omap24xx()) { 884 if (cpu_is_omap24xx()) {
@@ -803,13 +888,14 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
803 _enable_gpio_irqbank(bank, isr_saved & level_mask, 1); 888 _enable_gpio_irqbank(bank, isr_saved & level_mask, 1);
804 } 889 }
805 890
806 /* if bank has any level sensitive GPIO pin interrupt
807 configured, we must unmask the bank interrupt only after
808 handler(s) are executed in order to avoid spurious bank
809 interrupt */
810 if (level_mask)
811 desc->chip->unmask(irq);
812 } 891 }
892 /* if bank has any level sensitive GPIO pin interrupt
893 configured, we must unmask the bank interrupt only after
894 handler(s) are executed in order to avoid spurious bank
895 interrupt */
896 if (!unmasked)
897 desc->chip->unmask(irq);
898
813} 899}
814 900
815static void gpio_ack_irq(unsigned int irq) 901static void gpio_ack_irq(unsigned int irq)
diff --git a/arch/arm/plat-omap/pm.c b/arch/arm/plat-omap/pm.c
index 1a24e2c10714..04b4102727a8 100644
--- a/arch/arm/plat-omap/pm.c
+++ b/arch/arm/plat-omap/pm.c
@@ -580,7 +580,7 @@ static irqreturn_t omap_wakeup_interrupt(int irq, void * dev,
580 580
581static struct irqaction omap_wakeup_irq = { 581static struct irqaction omap_wakeup_irq = {
582 .name = "peripheral wakeup", 582 .name = "peripheral wakeup",
583 .flags = SA_INTERRUPT, 583 .flags = IRQF_DISABLED,
584 .handler = omap_wakeup_interrupt 584 .handler = omap_wakeup_interrupt
585}; 585};
586 586
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 72ce52ce815b..e75718301b0f 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -157,14 +157,12 @@ static struct map_desc omap_sram_io_desc[] __initdata = {
157 { /* .length gets filled in at runtime */ 157 { /* .length gets filled in at runtime */
158 .virtual = OMAP1_SRAM_VA, 158 .virtual = OMAP1_SRAM_VA,
159 .pfn = __phys_to_pfn(OMAP1_SRAM_PA), 159 .pfn = __phys_to_pfn(OMAP1_SRAM_PA),
160 .type = MT_DEVICE 160 .type = MT_MEMORY
161 } 161 }
162}; 162};
163 163
164/* 164/*
165 * In order to use last 2kB of SRAM on 1611b, we must round the size 165 * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
166 * up to multiple of PAGE_SIZE. We cannot use ioremap for SRAM, as
167 * clock init needs SRAM early.
168 */ 166 */
169void __init omap_map_sram(void) 167void __init omap_map_sram(void)
170{ 168{
@@ -184,8 +182,7 @@ void __init omap_map_sram(void)
184 omap_sram_io_desc[0].pfn = __phys_to_pfn(base); 182 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
185 } 183 }
186 184
187 omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE; 185 omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */
188 omap_sram_io_desc[0].length *= PAGE_SIZE;
189 iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc)); 186 iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
190 187
191 printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n", 188 printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c
index 053c18132ef4..281ecc7fcdfc 100644
--- a/arch/arm/plat-omap/timer32k.c
+++ b/arch/arm/plat-omap/timer32k.c
@@ -7,6 +7,7 @@
7 * Partial timer rewrite and additional dynamic tick timer support by 7 * Partial timer rewrite and additional dynamic tick timer support by
8 * Tony Lindgen <tony@atomide.com> and 8 * Tony Lindgen <tony@atomide.com> and
9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> 9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
10 * OMAP Dual-mode timer framework support by Timo Teras
10 * 11 *
11 * MPU timer code based on the older MPU timer code for OMAP 12 * MPU timer code based on the older MPU timer code for OMAP
12 * Copyright (C) 2000 RidgeRun, Inc. 13 * Copyright (C) 2000 RidgeRun, Inc.
@@ -49,6 +50,7 @@
49#include <asm/irq.h> 50#include <asm/irq.h>
50#include <asm/mach/irq.h> 51#include <asm/mach/irq.h>
51#include <asm/mach/time.h> 52#include <asm/mach/time.h>
53#include <asm/arch/dmtimer.h>
52 54
53struct sys_timer omap_timer; 55struct sys_timer omap_timer;
54 56
@@ -78,18 +80,6 @@ struct sys_timer omap_timer;
78#define OMAP1_32K_TIMER_TVR 0x00 80#define OMAP1_32K_TIMER_TVR 0x00
79#define OMAP1_32K_TIMER_TCR 0x04 81#define OMAP1_32K_TIMER_TCR 0x04
80 82
81/* 24xx specific defines */
82#define OMAP2_GP_TIMER_BASE 0x48028000
83#define CM_CLKSEL_WKUP 0x48008440
84#define GP_TIMER_TIDR 0x00
85#define GP_TIMER_TISR 0x18
86#define GP_TIMER_TIER 0x1c
87#define GP_TIMER_TCLR 0x24
88#define GP_TIMER_TCRR 0x28
89#define GP_TIMER_TLDR 0x2c
90#define GP_TIMER_TTGR 0x30
91#define GP_TIMER_TSICR 0x40
92
93#define OMAP_32K_TICKS_PER_HZ (32768 / HZ) 83#define OMAP_32K_TICKS_PER_HZ (32768 / HZ)
94 84
95/* 85/*
@@ -101,54 +91,62 @@ struct sys_timer omap_timer;
101#define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ 91#define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \
102 (((nr_jiffies) * (clock_rate)) / HZ) 92 (((nr_jiffies) * (clock_rate)) / HZ)
103 93
94#if defined(CONFIG_ARCH_OMAP1)
95
104static inline void omap_32k_timer_write(int val, int reg) 96static inline void omap_32k_timer_write(int val, int reg)
105{ 97{
106 if (cpu_class_is_omap1()) 98 omap_writew(val, OMAP1_32K_TIMER_BASE + reg);
107 omap_writew(val, OMAP1_32K_TIMER_BASE + reg);
108
109 if (cpu_is_omap24xx())
110 omap_writel(val, OMAP2_GP_TIMER_BASE + reg);
111} 99}
112 100
113static inline unsigned long omap_32k_timer_read(int reg) 101static inline unsigned long omap_32k_timer_read(int reg)
114{ 102{
115 if (cpu_class_is_omap1()) 103 return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff;
116 return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff; 104}
117 105
118 if (cpu_is_omap24xx()) 106static inline void omap_32k_timer_start(unsigned long load_val)
119 return omap_readl(OMAP2_GP_TIMER_BASE + reg); 107{
108 omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR);
109 omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR);
120} 110}
121 111
122/* 112static inline void omap_32k_timer_stop(void)
123 * The 32KHz synchronized timer is an additional timer on 16xx.
124 * It is always running.
125 */
126static inline unsigned long omap_32k_sync_timer_read(void)
127{ 113{
128 return omap_readl(TIMER_32K_SYNCHRONIZED); 114 omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR);
129} 115}
130 116
117#define omap_32k_timer_ack_irq()
118
119#elif defined(CONFIG_ARCH_OMAP2)
120
121static struct omap_dm_timer *gptimer;
122
131static inline void omap_32k_timer_start(unsigned long load_val) 123static inline void omap_32k_timer_start(unsigned long load_val)
132{ 124{
133 if (cpu_class_is_omap1()) { 125 omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val);
134 omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR); 126 omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
135 omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR); 127 omap_dm_timer_start(gptimer);
136 }
137
138 if (cpu_is_omap24xx()) {
139 omap_32k_timer_write(0xffffffff - load_val, GP_TIMER_TCRR);
140 omap_32k_timer_write((1 << 1), GP_TIMER_TIER);
141 omap_32k_timer_write((1 << 1) | 1, GP_TIMER_TCLR);
142 }
143} 128}
144 129
145static inline void omap_32k_timer_stop(void) 130static inline void omap_32k_timer_stop(void)
146{ 131{
147 if (cpu_class_is_omap1()) 132 omap_dm_timer_stop(gptimer);
148 omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR); 133}
149 134
150 if (cpu_is_omap24xx()) 135static inline void omap_32k_timer_ack_irq(void)
151 omap_32k_timer_write(0x0, GP_TIMER_TCLR); 136{
137 u32 status = omap_dm_timer_read_status(gptimer);
138 omap_dm_timer_write_status(gptimer, status);
139}
140
141#endif
142
143/*
144 * The 32KHz synchronized timer is an additional timer on 16xx.
145 * It is always running.
146 */
147static inline unsigned long omap_32k_sync_timer_read(void)
148{
149 return omap_readl(TIMER_32K_SYNCHRONIZED);
152} 150}
153 151
154/* 152/*
@@ -202,11 +200,7 @@ static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id,
202 200
203 write_seqlock_irqsave(&xtime_lock, flags); 201 write_seqlock_irqsave(&xtime_lock, flags);
204 202
205 if (cpu_is_omap24xx()) { 203 omap_32k_timer_ack_irq();
206 u32 status = omap_32k_timer_read(GP_TIMER_TISR);
207 omap_32k_timer_write(status, GP_TIMER_TISR);
208 }
209
210 now = omap_32k_sync_timer_read(); 204 now = omap_32k_sync_timer_read();
211 205
212 while ((signed long)(now - omap_32k_last_tick) 206 while ((signed long)(now - omap_32k_last_tick)
@@ -264,13 +258,10 @@ static struct dyn_tick_timer omap_dyn_tick_timer = {
264 258
265static struct irqaction omap_32k_timer_irq = { 259static struct irqaction omap_32k_timer_irq = {
266 .name = "32KHz timer", 260 .name = "32KHz timer",
267 .flags = SA_INTERRUPT | SA_TIMER, 261 .flags = IRQF_DISABLED | IRQF_TIMER,
268 .handler = omap_32k_timer_interrupt, 262 .handler = omap_32k_timer_interrupt,
269}; 263};
270 264
271static struct clk * gpt1_ick;
272static struct clk * gpt1_fck;
273
274static __init void omap_init_32k_timer(void) 265static __init void omap_init_32k_timer(void)
275{ 266{
276#ifdef CONFIG_NO_IDLE_HZ 267#ifdef CONFIG_NO_IDLE_HZ
@@ -279,32 +270,22 @@ static __init void omap_init_32k_timer(void)
279 270
280 if (cpu_class_is_omap1()) 271 if (cpu_class_is_omap1())
281 setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); 272 setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
282 if (cpu_is_omap24xx())
283 setup_irq(37, &omap_32k_timer_irq);
284 omap_timer.offset = omap_32k_timer_gettimeoffset; 273 omap_timer.offset = omap_32k_timer_gettimeoffset;
285 omap_32k_last_tick = omap_32k_sync_timer_read(); 274 omap_32k_last_tick = omap_32k_sync_timer_read();
286 275
276#ifdef CONFIG_ARCH_OMAP2
287 /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */ 277 /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */
288 if (cpu_is_omap24xx()) { 278 if (cpu_is_omap24xx()) {
289 omap_32k_timer_write(0, GP_TIMER_TCLR); 279 gptimer = omap_dm_timer_request_specific(1);
290 omap_writel(0, CM_CLKSEL_WKUP); /* 32KHz clock source */ 280 BUG_ON(gptimer == NULL);
291 281
292 gpt1_ick = clk_get(NULL, "gpt1_ick"); 282 omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ);
293 if (IS_ERR(gpt1_ick)) 283 setup_irq(omap_dm_timer_get_irq(gptimer), &omap_32k_timer_irq);
294 printk(KERN_ERR "Could not get gpt1_ick\n"); 284 omap_dm_timer_set_int_enable(gptimer,
295 else 285 OMAP_TIMER_INT_CAPTURE | OMAP_TIMER_INT_OVERFLOW |
296 clk_enable(gpt1_ick); 286 OMAP_TIMER_INT_MATCH);
297
298 gpt1_fck = clk_get(NULL, "gpt1_fck");
299 if (IS_ERR(gpt1_fck))
300 printk(KERN_ERR "Could not get gpt1_fck\n");
301 else
302 clk_enable(gpt1_fck);
303
304 mdelay(100); /* Wait for clocks to stabilize */
305
306 omap_32k_timer_write(0x7, GP_TIMER_TISR);
307 } 287 }
288#endif
308 289
309 omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); 290 omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
310} 291}
@@ -316,6 +297,9 @@ static __init void omap_init_32k_timer(void)
316 */ 297 */
317static void __init omap_timer_init(void) 298static void __init omap_timer_init(void)
318{ 299{
300#ifdef CONFIG_OMAP_DM_TIMER
301 omap_dm_timer_init();
302#endif
319 omap_init_32k_timer(); 303 omap_init_32k_timer();
320} 304}
321 305
diff --git a/arch/arm26/kernel/irq.c b/arch/arm26/kernel/irq.c
index e08ba2955ec7..d87d68b77d66 100644
--- a/arch/arm26/kernel/irq.c
+++ b/arch/arm26/kernel/irq.c
@@ -190,7 +190,7 @@ __do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs)
190 int ret; 190 int ret;
191 191
192 spin_unlock(&irq_controller_lock); 192 spin_unlock(&irq_controller_lock);
193 if (!(action->flags & SA_INTERRUPT)) 193 if (!(action->flags & IRQF_DISABLED))
194 local_irq_enable(); 194 local_irq_enable();
195 195
196 status = 0; 196 status = 0;
@@ -201,7 +201,7 @@ __do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs)
201 action = action->next; 201 action = action->next;
202 } while (action); 202 } while (action);
203 203
204 if (status & SA_SAMPLE_RANDOM) 204 if (status & IRQF_SAMPLE_RANDOM)
205 add_interrupt_randomness(irq); 205 add_interrupt_randomness(irq);
206 206
207 spin_lock_irq(&irq_controller_lock); 207 spin_lock_irq(&irq_controller_lock);
@@ -451,7 +451,7 @@ int setup_irq(unsigned int irq, struct irqaction *new)
451 * so we have to be careful not to interfere with a 451 * so we have to be careful not to interfere with a
452 * running system. 452 * running system.
453 */ 453 */
454 if (new->flags & SA_SAMPLE_RANDOM) { 454 if (new->flags & IRQF_SAMPLE_RANDOM) {
455 /* 455 /*
456 * This function might sleep, we want to call it first, 456 * This function might sleep, we want to call it first,
457 * outside of the atomic block. 457 * outside of the atomic block.
@@ -471,7 +471,7 @@ int setup_irq(unsigned int irq, struct irqaction *new)
471 p = &desc->action; 471 p = &desc->action;
472 if ((old = *p) != NULL) { 472 if ((old = *p) != NULL) {
473 /* Can't share interrupts unless both agree to */ 473 /* Can't share interrupts unless both agree to */
474 if (!(old->flags & new->flags & SA_SHIRQ)) { 474 if (!(old->flags & new->flags & IRQF_SHARED)) {
475 spin_unlock_irqrestore(&irq_controller_lock, flags); 475 spin_unlock_irqrestore(&irq_controller_lock, flags);
476 return -EBUSY; 476 return -EBUSY;
477 } 477 }
@@ -526,11 +526,11 @@ int setup_irq(unsigned int irq, struct irqaction *new)
526 * 526 *
527 * Flags: 527 * Flags:
528 * 528 *
529 * SA_SHIRQ Interrupt is shared 529 * IRQF_SHARED Interrupt is shared
530 * 530 *
531 * SA_INTERRUPT Disable local interrupts while processing 531 * IRQF_DISABLED Disable local interrupts while processing
532 * 532 *
533 * SA_SAMPLE_RANDOM The interrupt can be used for entropy 533 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
534 * 534 *
535 */ 535 */
536 536
@@ -542,7 +542,7 @@ int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_
542 struct irqaction *action; 542 struct irqaction *action;
543 543
544 if (irq >= NR_IRQS || !irq_desc[irq].valid || !handler || 544 if (irq >= NR_IRQS || !irq_desc[irq].valid || !handler ||
545 (irq_flags & SA_SHIRQ && !dev_id)) 545 (irq_flags & IRQF_SHARED && !dev_id))
546 return -EINVAL; 546 return -EINVAL;
547 547
548 action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL); 548 action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL);
diff --git a/arch/arm26/kernel/time.c b/arch/arm26/kernel/time.c
index 718de9bed950..db63d75d0715 100644
--- a/arch/arm26/kernel/time.c
+++ b/arch/arm26/kernel/time.c
@@ -205,7 +205,7 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
205 205
206static struct irqaction timer_irq = { 206static struct irqaction timer_irq = {
207 .name = "timer", 207 .name = "timer",
208 .flags = SA_INTERRUPT, 208 .flags = IRQF_DISABLED,
209 .handler = timer_interrupt, 209 .handler = timer_interrupt,
210}; 210};
211 211
diff --git a/arch/cris/arch-v10/drivers/gpio.c b/arch/cris/arch-v10/drivers/gpio.c
index 25df4ada951a..48fd801792d1 100644
--- a/arch/cris/arch-v10/drivers/gpio.c
+++ b/arch/cris/arch-v10/drivers/gpio.c
@@ -937,11 +937,11 @@ gpio_init(void)
937 * in some tests. 937 * in some tests.
938 */ 938 */
939 if (request_irq(TIMER0_IRQ_NBR, gpio_poll_timer_interrupt, 939 if (request_irq(TIMER0_IRQ_NBR, gpio_poll_timer_interrupt,
940 SA_SHIRQ | SA_INTERRUPT,"gpio poll", NULL)) { 940 IRQF_SHARED | IRQF_DISABLED,"gpio poll", NULL)) {
941 printk(KERN_CRIT "err: timer0 irq for gpio\n"); 941 printk(KERN_CRIT "err: timer0 irq for gpio\n");
942 } 942 }
943 if (request_irq(PA_IRQ_NBR, gpio_pa_interrupt, 943 if (request_irq(PA_IRQ_NBR, gpio_pa_interrupt,
944 SA_SHIRQ | SA_INTERRUPT,"gpio PA", NULL)) { 944 IRQF_SHARED | IRQF_DISABLED,"gpio PA", NULL)) {
945 printk(KERN_CRIT "err: PA irq for gpio\n"); 945 printk(KERN_CRIT "err: PA irq for gpio\n");
946 } 946 }
947 947
diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c
index fe65cb89f54c..9c22b76e129a 100644
--- a/arch/cris/arch-v10/kernel/time.c
+++ b/arch/cris/arch-v10/kernel/time.c
@@ -251,11 +251,11 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
251 return IRQ_HANDLED; 251 return IRQ_HANDLED;
252} 252}
253 253
254/* timer is SA_SHIRQ so drivers can add stuff to the timer irq chain 254/* timer is IRQF_SHARED so drivers can add stuff to the timer irq chain
255 * it needs to be SA_INTERRUPT to make the jiffies update work properly 255 * it needs to be IRQF_DISABLED to make the jiffies update work properly
256 */ 256 */
257 257
258static struct irqaction irq2 = { timer_interrupt, SA_SHIRQ | SA_INTERRUPT, 258static struct irqaction irq2 = { timer_interrupt, IRQF_SHARED | IRQF_DISABLED,
259 CPU_MASK_NONE, "timer", NULL, NULL}; 259 CPU_MASK_NONE, "timer", NULL, NULL};
260 260
261void __init 261void __init
diff --git a/arch/cris/arch-v32/drivers/gpio.c b/arch/cris/arch-v32/drivers/gpio.c
index 113bdff4fd3c..00e9167de530 100644
--- a/arch/cris/arch-v32/drivers/gpio.c
+++ b/arch/cris/arch-v32/drivers/gpio.c
@@ -744,11 +744,11 @@ gpio_init(void)
744 * in some tests. 744 * in some tests.
745 */ 745 */
746 if (request_irq(TIMER_INTR_VECT, gpio_poll_timer_interrupt, 746 if (request_irq(TIMER_INTR_VECT, gpio_poll_timer_interrupt,
747 SA_SHIRQ | SA_INTERRUPT,"gpio poll", &alarmlist)) { 747 IRQF_SHARED | IRQF_DISABLED,"gpio poll", &alarmlist)) {
748 printk("err: timer0 irq for gpio\n"); 748 printk("err: timer0 irq for gpio\n");
749 } 749 }
750 if (request_irq(GEN_IO_INTR_VECT, gpio_pa_interrupt, 750 if (request_irq(GEN_IO_INTR_VECT, gpio_pa_interrupt,
751 SA_SHIRQ | SA_INTERRUPT,"gpio PA", &alarmlist)) { 751 IRQF_SHARED | IRQF_DISABLED,"gpio PA", &alarmlist)) {
752 printk("err: PA irq for gpio\n"); 752 printk("err: PA irq for gpio\n");
753 } 753 }
754 /* enable the gio and timer irq in global config */ 754 /* enable the gio and timer irq in global config */
diff --git a/arch/cris/arch-v32/kernel/arbiter.c b/arch/cris/arch-v32/kernel/arbiter.c
index 82d44c9afc1e..420a5312ed03 100644
--- a/arch/cris/arch-v32/kernel/arbiter.c
+++ b/arch/cris/arch-v32/kernel/arbiter.c
@@ -119,7 +119,7 @@ static void crisv32_arbiter_init(void)
119 crisv32_arbiter_config(EXT_REGION); 119 crisv32_arbiter_config(EXT_REGION);
120 crisv32_arbiter_config(INT_REGION); 120 crisv32_arbiter_config(INT_REGION);
121 121
122 if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, SA_INTERRUPT, 122 if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, IRQF_DISABLED,
123 "arbiter", NULL)) 123 "arbiter", NULL))
124 printk(KERN_ERR "Couldn't allocate arbiter IRQ\n"); 124 printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
125 125
diff --git a/arch/cris/arch-v32/kernel/fasttimer.c b/arch/cris/arch-v32/kernel/fasttimer.c
index caaa86bd5e87..5daeb6f7f3b7 100644
--- a/arch/cris/arch-v32/kernel/fasttimer.c
+++ b/arch/cris/arch-v32/kernel/fasttimer.c
@@ -981,7 +981,7 @@ void fast_timer_init(void)
981 proc_register_dynamic(&proc_root, &fasttimer_proc_entry); 981 proc_register_dynamic(&proc_root, &fasttimer_proc_entry);
982#endif 982#endif
983#endif /* PROC_FS */ 983#endif /* PROC_FS */
984 if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, SA_INTERRUPT, 984 if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, IRQF_DISABLED,
985 "fast timer int", NULL)) 985 "fast timer int", NULL))
986 { 986 {
987 printk("err: timer1 irq\n"); 987 printk("err: timer1 irq\n");
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c
index e2d2b3fdb5b1..cc361bf578ae 100644
--- a/arch/cris/arch-v32/kernel/irq.c
+++ b/arch/cris/arch-v32/kernel/irq.c
@@ -268,7 +268,7 @@ void
268crisv32_do_IRQ(int irq, int block, struct pt_regs* regs) 268crisv32_do_IRQ(int irq, int block, struct pt_regs* regs)
269{ 269{
270 /* Interrupts that may not be moved to another CPU and 270 /* Interrupts that may not be moved to another CPU and
271 * are SA_INTERRUPT may skip blocking. This is currently 271 * are IRQF_DISABLED may skip blocking. This is currently
272 * only valid for the timer IRQ and the IPI and is used 272 * only valid for the timer IRQ and the IPI and is used
273 * for the timer interrupt to avoid watchdog starvation. 273 * for the timer interrupt to avoid watchdog starvation.
274 */ 274 */
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index da40d19a151e..464ecaec3bc0 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -62,7 +62,7 @@ static unsigned long irq_regs[NR_CPUS] =
62 62
63static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs); 63static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs);
64static int send_ipi(int vector, int wait, cpumask_t cpu_mask); 64static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
65static struct irqaction irq_ipi = { crisv32_ipi_interrupt, SA_INTERRUPT, 65static struct irqaction irq_ipi = { crisv32_ipi_interrupt, IRQF_DISABLED,
66 CPU_MASK_NONE, "ipi", NULL, NULL}; 66 CPU_MASK_NONE, "ipi", NULL, NULL};
67 67
68extern void cris_mmu_init(void); 68extern void cris_mmu_init(void);
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index 4bac1d6c37fb..50f3f93293d6 100644
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -241,12 +241,16 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
241 return IRQ_HANDLED; 241 return IRQ_HANDLED;
242} 242}
243 243
244/* timer is SA_SHIRQ so drivers can add stuff to the timer irq chain 244/* timer is IRQF_SHARED so drivers can add stuff to the timer irq chain
245 * it needs to be SA_INTERRUPT to make the jiffies update work properly 245 * it needs to be IRQF_DISABLED to make the jiffies update work properly
246 */ 246 */
247 247
248static struct irqaction irq_timer = { timer_interrupt, SA_SHIRQ | SA_INTERRUPT, 248static struct irqaction irq_timer = {
249 CPU_MASK_NONE, "timer", NULL, NULL}; 249 .mask = timer_interrupt,
250 .flags = IRQF_SHARED | IRQF_DISABLED,
251 .mask = CPU_MASK_NONE,
252 .name = "timer"
253};
250 254
251void __init 255void __init
252cris_timer_init(void) 256cris_timer_init(void)
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c
index 1f9099627a72..903ea62c6e21 100644
--- a/arch/cris/kernel/irq.c
+++ b/arch/cris/kernel/irq.c
@@ -85,7 +85,7 @@ skip:
85/* called by the assembler IRQ entry functions defined in irq.h 85/* called by the assembler IRQ entry functions defined in irq.h
86 * to dispatch the interrupts to registred handlers 86 * to dispatch the interrupts to registred handlers
87 * interrupts are disabled upon entry - depending on if the 87 * interrupts are disabled upon entry - depending on if the
88 * interrupt was registred with SA_INTERRUPT or not, interrupts 88 * interrupt was registred with IRQF_DISABLED or not, interrupts
89 * are re-enabled or not. 89 * are re-enabled or not.
90 */ 90 */
91 91
diff --git a/arch/frv/kernel/irq-routing.c b/arch/frv/kernel/irq-routing.c
index b90b70a761d1..53886adf47de 100644
--- a/arch/frv/kernel/irq-routing.c
+++ b/arch/frv/kernel/irq-routing.c
@@ -81,7 +81,7 @@ void distribute_irqs(struct irq_group *group, unsigned long irqmask)
81 if (action) { 81 if (action) {
82 int status = 0; 82 int status = 0;
83 83
84// if (!(action->flags & SA_INTERRUPT)) 84// if (!(action->flags & IRQF_DISABLED))
85// local_irq_enable(); 85// local_irq_enable();
86 86
87 do { 87 do {
@@ -90,7 +90,7 @@ void distribute_irqs(struct irq_group *group, unsigned long irqmask)
90 action = action->next; 90 action = action->next;
91 } while (action); 91 } while (action);
92 92
93 if (status & SA_SAMPLE_RANDOM) 93 if (status & IRQF_SAMPLE_RANDOM)
94 add_interrupt_randomness(irq); 94 add_interrupt_randomness(irq);
95 local_irq_disable(); 95 local_irq_disable();
96 } 96 }
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
index 5920f52bf9c8..08967010be04 100644
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -341,11 +341,11 @@ asmlinkage void do_NMI(void)
341 * 341 *
342 * Flags: 342 * Flags:
343 * 343 *
344 * SA_SHIRQ Interrupt is shared 344 * IRQF_SHARED Interrupt is shared
345 * 345 *
346 * SA_INTERRUPT Disable local interrupts while processing 346 * IRQF_DISABLED Disable local interrupts while processing
347 * 347 *
348 * SA_SAMPLE_RANDOM The interrupt can be used for entropy 348 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
349 * 349 *
350 */ 350 */
351 351
@@ -365,7 +365,7 @@ int request_irq(unsigned int irq,
365 * to figure out which interrupt is which (messes up the 365 * to figure out which interrupt is which (messes up the
366 * interrupt freeing logic etc). 366 * interrupt freeing logic etc).
367 */ 367 */
368 if (irqflags & SA_SHIRQ) { 368 if (irqflags & IRQF_SHARED) {
369 if (!dev_id) 369 if (!dev_id)
370 printk("Bad boy: %s (at 0x%x) called us without a dev_id!\n", 370 printk("Bad boy: %s (at 0x%x) called us without a dev_id!\n",
371 devname, (&irq)[-1]); 371 devname, (&irq)[-1]);
@@ -576,7 +576,7 @@ int setup_irq(unsigned int irq, struct irqaction *new)
576 * so we have to be careful not to interfere with a 576 * so we have to be careful not to interfere with a
577 * running system. 577 * running system.
578 */ 578 */
579 if (new->flags & SA_SAMPLE_RANDOM) { 579 if (new->flags & IRQF_SAMPLE_RANDOM) {
580 /* 580 /*
581 * This function might sleep, we want to call it first, 581 * This function might sleep, we want to call it first,
582 * outside of the atomic block. 582 * outside of the atomic block.
@@ -592,7 +592,7 @@ int setup_irq(unsigned int irq, struct irqaction *new)
592 spin_lock_irqsave(&level->lock, flags); 592 spin_lock_irqsave(&level->lock, flags);
593 593
594 /* can't share interrupts unless all parties agree to */ 594 /* can't share interrupts unless all parties agree to */
595 if (level->usage != 0 && !(level->flags & new->flags & SA_SHIRQ)) { 595 if (level->usage != 0 && !(level->flags & new->flags & IRQF_SHARED)) {
596 spin_unlock_irqrestore(&level->lock,flags); 596 spin_unlock_irqrestore(&level->lock,flags);
597 return -EBUSY; 597 return -EBUSY;
598 } 598 }
diff --git a/arch/frv/kernel/setup.c b/arch/frv/kernel/setup.c
index 5db3d4eff909..af08ccd4ed6e 100644
--- a/arch/frv/kernel/setup.c
+++ b/arch/frv/kernel/setup.c
@@ -10,7 +10,7 @@
10 * 2 of the License, or (at your option) any later version. 10 * 2 of the License, or (at your option) any later version.
11 */ 11 */
12 12
13#include <linux/version.h> 13#include <linux/utsrelease.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/sched.h> 15#include <linux/sched.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
diff --git a/arch/frv/kernel/time.c b/arch/frv/kernel/time.c
index 24cf85f89e40..d5b64e193d92 100644
--- a/arch/frv/kernel/time.c
+++ b/arch/frv/kernel/time.c
@@ -47,7 +47,7 @@ unsigned long __delay_loops_MHz;
47static irqreturn_t timer_interrupt(int irq, void *dummy, struct pt_regs *regs); 47static irqreturn_t timer_interrupt(int irq, void *dummy, struct pt_regs *regs);
48 48
49static struct irqaction timer_irq = { 49static struct irqaction timer_irq = {
50 timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL 50 timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
51}; 51};
52 52
53static inline int set_rtc_mmss(unsigned long nowtime) 53static inline int set_rtc_mmss(unsigned long nowtime)
diff --git a/arch/h8300/kernel/ints.c b/arch/h8300/kernel/ints.c
index edb3c4170013..1488b6ace18c 100644
--- a/arch/h8300/kernel/ints.c
+++ b/arch/h8300/kernel/ints.c
@@ -158,7 +158,7 @@ int request_irq(unsigned int irq,
158 irq_handle->devname = devname; 158 irq_handle->devname = devname;
159 irq_list[irq] = irq_handle; 159 irq_list[irq] = irq_handle;
160 160
161 if (irq_handle->flags & SA_SAMPLE_RANDOM) 161 if (irq_handle->flags & IRQF_SAMPLE_RANDOM)
162 rand_initialize_irq(irq); 162 rand_initialize_irq(irq);
163 163
164 enable_irq(irq); 164 enable_irq(irq);
@@ -222,7 +222,7 @@ asmlinkage void process_int(int irq, struct pt_regs *fp)
222 if (irq_list[irq]) { 222 if (irq_list[irq]) {
223 irq_list[irq]->handler(irq, irq_list[irq]->dev_id, fp); 223 irq_list[irq]->handler(irq, irq_list[irq]->dev_id, fp);
224 irq_list[irq]->count++; 224 irq_list[irq]->count++;
225 if (irq_list[irq]->flags & SA_SAMPLE_RANDOM) 225 if (irq_list[irq]->flags & IRQF_SAMPLE_RANDOM)
226 add_interrupt_randomness(irq); 226 add_interrupt_randomness(irq);
227 } 227 }
228 } else { 228 } else {
diff --git a/arch/h8300/platform/h8s/ints.c b/arch/h8300/platform/h8s/ints.c
index f6ed663bdde0..270440de4610 100644
--- a/arch/h8300/platform/h8s/ints.c
+++ b/arch/h8300/platform/h8s/ints.c
@@ -192,7 +192,7 @@ int request_irq(unsigned int irq,
192 irq_handle->dev_id = dev_id; 192 irq_handle->dev_id = dev_id;
193 irq_handle->devname = devname; 193 irq_handle->devname = devname;
194 irq_list[irq] = irq_handle; 194 irq_list[irq] = irq_handle;
195 if (irq_handle->flags & SA_SAMPLE_RANDOM) 195 if (irq_handle->flags & IRQF_SAMPLE_RANDOM)
196 rand_initialize_irq(irq); 196 rand_initialize_irq(irq);
197 197
198 /* enable interrupt */ 198 /* enable interrupt */
@@ -270,7 +270,7 @@ asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
270 if (irq_list[vec]) { 270 if (irq_list[vec]) {
271 irq_list[vec]->handler(vec, irq_list[vec]->dev_id, fp); 271 irq_list[vec]->handler(vec, irq_list[vec]->dev_id, fp);
272 irq_list[vec]->count++; 272 irq_list[vec]->count++;
273 if (irq_list[vec]->flags & SA_SAMPLE_RANDOM) 273 if (irq_list[vec]->flags & IRQF_SAMPLE_RANDOM)
274 add_interrupt_randomness(vec); 274 add_interrupt_randomness(vec);
275 } 275 }
276 } else { 276 } else {
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index 27d8dddbaa47..daa75ce4b777 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -18,6 +18,14 @@ config GENERIC_TIME
18 bool 18 bool
19 default y 19 default y
20 20
21config LOCKDEP_SUPPORT
22 bool
23 default y
24
25config STACKTRACE_SUPPORT
26 bool
27 default y
28
21config SEMAPHORE_SLEEPERS 29config SEMAPHORE_SLEEPERS
22 bool 30 bool
23 default y 31 default y
diff --git a/arch/i386/Kconfig.debug b/arch/i386/Kconfig.debug
index c92191b1fb67..b31c0802e1cc 100644
--- a/arch/i386/Kconfig.debug
+++ b/arch/i386/Kconfig.debug
@@ -1,5 +1,9 @@
1menu "Kernel hacking" 1menu "Kernel hacking"
2 2
3config TRACE_IRQFLAGS_SUPPORT
4 bool
5 default y
6
3source "lib/Kconfig.debug" 7source "lib/Kconfig.debug"
4 8
5config EARLY_PRINTK 9config EARLY_PRINTK
@@ -31,15 +35,6 @@ config DEBUG_STACK_USAGE
31 35
32 This option will slow down process creation somewhat. 36 This option will slow down process creation somewhat.
33 37
34config STACK_BACKTRACE_COLS
35 int "Stack backtraces per line" if DEBUG_KERNEL
36 range 1 3
37 default 2
38 help
39 Selects how many stack backtrace entries per line to display.
40
41 This can save screen space when displaying traces.
42
43comment "Page alloc debug is incompatible with Software Suspend on i386" 38comment "Page alloc debug is incompatible with Software Suspend on i386"
44 depends on DEBUG_KERNEL && SOFTWARE_SUSPEND 39 depends on DEBUG_KERNEL && SOFTWARE_SUSPEND
45 40
diff --git a/arch/i386/boot/setup.S b/arch/i386/boot/setup.S
index 0a5a3be6d69c..d2b684cd620a 100644
--- a/arch/i386/boot/setup.S
+++ b/arch/i386/boot/setup.S
@@ -47,7 +47,7 @@
47 */ 47 */
48 48
49#include <asm/segment.h> 49#include <asm/segment.h>
50#include <linux/version.h> 50#include <linux/utsrelease.h>
51#include <linux/compile.h> 51#include <linux/compile.h>
52#include <asm/boot.h> 52#include <asm/boot.h>
53#include <asm/e820.h> 53#include <asm/e820.h>
diff --git a/arch/i386/kernel/Makefile b/arch/i386/kernel/Makefile
index cbc1184e9473..1b452a1665c4 100644
--- a/arch/i386/kernel/Makefile
+++ b/arch/i386/kernel/Makefile
@@ -9,6 +9,7 @@ obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o \
9 pci-dma.o i386_ksyms.o i387.o bootflag.o \ 9 pci-dma.o i386_ksyms.o i387.o bootflag.o \
10 quirks.o i8237.o topology.o alternative.o i8253.o tsc.o 10 quirks.o i8237.o topology.o alternative.o i8253.o tsc.o
11 11
12obj-$(CONFIG_STACKTRACE) += stacktrace.o
12obj-y += cpu/ 13obj-y += cpu/
13obj-y += acpi/ 14obj-y += acpi/
14obj-$(CONFIG_X86_BIOS_REBOOT) += reboot.o 15obj-$(CONFIG_X86_BIOS_REBOOT) += reboot.o
diff --git a/arch/i386/kernel/alternative.c b/arch/i386/kernel/alternative.c
index 7b421b3a053e..28ab80649764 100644
--- a/arch/i386/kernel/alternative.c
+++ b/arch/i386/kernel/alternative.c
@@ -303,6 +303,16 @@ void alternatives_smp_switch(int smp)
303 struct smp_alt_module *mod; 303 struct smp_alt_module *mod;
304 unsigned long flags; 304 unsigned long flags;
305 305
306#ifdef CONFIG_LOCKDEP
307 /*
308 * A not yet fixed binutils section handling bug prevents
309 * alternatives-replacement from working reliably, so turn
310 * it off:
311 */
312 printk("lockdep: not fixing up alternatives.\n");
313 return;
314#endif
315
306 if (no_replacement || smp_alt_once) 316 if (no_replacement || smp_alt_once)
307 return; 317 return;
308 BUG_ON(!smp && (num_online_cpus() > 1)); 318 BUG_ON(!smp && (num_online_cpus() > 1));
diff --git a/arch/i386/kernel/cpuid.c b/arch/i386/kernel/cpuid.c
index a8d3ecdc3897..fde8bea85cee 100644
--- a/arch/i386/kernel/cpuid.c
+++ b/arch/i386/kernel/cpuid.c
@@ -167,6 +167,7 @@ static int cpuid_class_device_create(int i)
167 return err; 167 return err;
168} 168}
169 169
170#ifdef CONFIG_HOTPLUG_CPU
170static int cpuid_class_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) 171static int cpuid_class_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
171{ 172{
172 unsigned int cpu = (unsigned long)hcpu; 173 unsigned int cpu = (unsigned long)hcpu;
@@ -186,6 +187,7 @@ static struct notifier_block __cpuinitdata cpuid_class_cpu_notifier =
186{ 187{
187 .notifier_call = cpuid_class_cpu_callback, 188 .notifier_call = cpuid_class_cpu_callback,
188}; 189};
190#endif /* !CONFIG_HOTPLUG_CPU */
189 191
190static int __init cpuid_init(void) 192static int __init cpuid_init(void)
191{ 193{
@@ -208,7 +210,7 @@ static int __init cpuid_init(void)
208 if (err != 0) 210 if (err != 0)
209 goto out_class; 211 goto out_class;
210 } 212 }
211 register_cpu_notifier(&cpuid_class_cpu_notifier); 213 register_hotcpu_notifier(&cpuid_class_cpu_notifier);
212 214
213 err = 0; 215 err = 0;
214 goto out; 216 goto out;
@@ -233,7 +235,7 @@ static void __exit cpuid_exit(void)
233 class_device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu)); 235 class_device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu));
234 class_destroy(cpuid_class); 236 class_destroy(cpuid_class);
235 unregister_chrdev(CPUID_MAJOR, "cpu/cpuid"); 237 unregister_chrdev(CPUID_MAJOR, "cpu/cpuid");
236 unregister_cpu_notifier(&cpuid_class_cpu_notifier); 238 unregister_hotcpu_notifier(&cpuid_class_cpu_notifier);
237} 239}
238 240
239module_init(cpuid_init); 241module_init(cpuid_init);
diff --git a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S
index 787190c45fdb..d9a260f2efb4 100644
--- a/arch/i386/kernel/entry.S
+++ b/arch/i386/kernel/entry.S
@@ -42,6 +42,7 @@
42 42
43#include <linux/linkage.h> 43#include <linux/linkage.h>
44#include <asm/thread_info.h> 44#include <asm/thread_info.h>
45#include <asm/irqflags.h>
45#include <asm/errno.h> 46#include <asm/errno.h>
46#include <asm/segment.h> 47#include <asm/segment.h>
47#include <asm/smp.h> 48#include <asm/smp.h>
@@ -76,12 +77,21 @@ NT_MASK = 0x00004000
76VM_MASK = 0x00020000 77VM_MASK = 0x00020000
77 78
78#ifdef CONFIG_PREEMPT 79#ifdef CONFIG_PREEMPT
79#define preempt_stop cli 80#define preempt_stop cli; TRACE_IRQS_OFF
80#else 81#else
81#define preempt_stop 82#define preempt_stop
82#define resume_kernel restore_nocheck 83#define resume_kernel restore_nocheck
83#endif 84#endif
84 85
86.macro TRACE_IRQS_IRET
87#ifdef CONFIG_TRACE_IRQFLAGS
88 testl $IF_MASK,EFLAGS(%esp) # interrupts off?
89 jz 1f
90 TRACE_IRQS_ON
911:
92#endif
93.endm
94
85#ifdef CONFIG_VM86 95#ifdef CONFIG_VM86
86#define resume_userspace_sig check_userspace 96#define resume_userspace_sig check_userspace
87#else 97#else
@@ -257,6 +267,10 @@ ENTRY(sysenter_entry)
257 CFI_REGISTER esp, ebp 267 CFI_REGISTER esp, ebp
258 movl TSS_sysenter_esp0(%esp),%esp 268 movl TSS_sysenter_esp0(%esp),%esp
259sysenter_past_esp: 269sysenter_past_esp:
270 /*
271 * No need to follow this irqs on/off section: the syscall
272 * disabled irqs and here we enable it straight after entry:
273 */
260 sti 274 sti
261 pushl $(__USER_DS) 275 pushl $(__USER_DS)
262 CFI_ADJUST_CFA_OFFSET 4 276 CFI_ADJUST_CFA_OFFSET 4
@@ -303,6 +317,7 @@ sysenter_past_esp:
303 call *sys_call_table(,%eax,4) 317 call *sys_call_table(,%eax,4)
304 movl %eax,EAX(%esp) 318 movl %eax,EAX(%esp)
305 cli 319 cli
320 TRACE_IRQS_OFF
306 movl TI_flags(%ebp), %ecx 321 movl TI_flags(%ebp), %ecx
307 testw $_TIF_ALLWORK_MASK, %cx 322 testw $_TIF_ALLWORK_MASK, %cx
308 jne syscall_exit_work 323 jne syscall_exit_work
@@ -310,6 +325,7 @@ sysenter_past_esp:
310 movl EIP(%esp), %edx 325 movl EIP(%esp), %edx
311 movl OLDESP(%esp), %ecx 326 movl OLDESP(%esp), %ecx
312 xorl %ebp,%ebp 327 xorl %ebp,%ebp
328 TRACE_IRQS_ON
313 sti 329 sti
314 sysexit 330 sysexit
315 CFI_ENDPROC 331 CFI_ENDPROC
@@ -339,6 +355,7 @@ syscall_exit:
339 cli # make sure we don't miss an interrupt 355 cli # make sure we don't miss an interrupt
340 # setting need_resched or sigpending 356 # setting need_resched or sigpending
341 # between sampling and the iret 357 # between sampling and the iret
358 TRACE_IRQS_OFF
342 movl TI_flags(%ebp), %ecx 359 movl TI_flags(%ebp), %ecx
343 testw $_TIF_ALLWORK_MASK, %cx # current->work 360 testw $_TIF_ALLWORK_MASK, %cx # current->work
344 jne syscall_exit_work 361 jne syscall_exit_work
@@ -355,12 +372,15 @@ restore_all:
355 CFI_REMEMBER_STATE 372 CFI_REMEMBER_STATE
356 je ldt_ss # returning to user-space with LDT SS 373 je ldt_ss # returning to user-space with LDT SS
357restore_nocheck: 374restore_nocheck:
375 TRACE_IRQS_IRET
376restore_nocheck_notrace:
358 RESTORE_REGS 377 RESTORE_REGS
359 addl $4, %esp 378 addl $4, %esp
360 CFI_ADJUST_CFA_OFFSET -4 379 CFI_ADJUST_CFA_OFFSET -4
3611: iret 3801: iret
362.section .fixup,"ax" 381.section .fixup,"ax"
363iret_exc: 382iret_exc:
383 TRACE_IRQS_ON
364 sti 384 sti
365 pushl $0 # no error code 385 pushl $0 # no error code
366 pushl $do_iret_error 386 pushl $do_iret_error
@@ -386,11 +406,13 @@ ldt_ss:
386 subl $8, %esp # reserve space for switch16 pointer 406 subl $8, %esp # reserve space for switch16 pointer
387 CFI_ADJUST_CFA_OFFSET 8 407 CFI_ADJUST_CFA_OFFSET 8
388 cli 408 cli
409 TRACE_IRQS_OFF
389 movl %esp, %eax 410 movl %esp, %eax
390 /* Set up the 16bit stack frame with switch32 pointer on top, 411 /* Set up the 16bit stack frame with switch32 pointer on top,
391 * and a switch16 pointer on top of the current frame. */ 412 * and a switch16 pointer on top of the current frame. */
392 call setup_x86_bogus_stack 413 call setup_x86_bogus_stack
393 CFI_ADJUST_CFA_OFFSET -8 # frame has moved 414 CFI_ADJUST_CFA_OFFSET -8 # frame has moved
415 TRACE_IRQS_IRET
394 RESTORE_REGS 416 RESTORE_REGS
395 lss 20+4(%esp), %esp # switch to 16bit stack 417 lss 20+4(%esp), %esp # switch to 16bit stack
3961: iret 4181: iret
@@ -411,6 +433,7 @@ work_resched:
411 cli # make sure we don't miss an interrupt 433 cli # make sure we don't miss an interrupt
412 # setting need_resched or sigpending 434 # setting need_resched or sigpending
413 # between sampling and the iret 435 # between sampling and the iret
436 TRACE_IRQS_OFF
414 movl TI_flags(%ebp), %ecx 437 movl TI_flags(%ebp), %ecx
415 andl $_TIF_WORK_MASK, %ecx # is there any work to be done other 438 andl $_TIF_WORK_MASK, %ecx # is there any work to be done other
416 # than syscall tracing? 439 # than syscall tracing?
@@ -462,6 +485,7 @@ syscall_trace_entry:
462syscall_exit_work: 485syscall_exit_work:
463 testb $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP), %cl 486 testb $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP), %cl
464 jz work_pending 487 jz work_pending
488 TRACE_IRQS_ON
465 sti # could let do_syscall_trace() call 489 sti # could let do_syscall_trace() call
466 # schedule() instead 490 # schedule() instead
467 movl %esp, %eax 491 movl %esp, %eax
@@ -535,9 +559,14 @@ ENTRY(irq_entries_start)
535vector=vector+1 559vector=vector+1
536.endr 560.endr
537 561
562/*
563 * the CPU automatically disables interrupts when executing an IRQ vector,
564 * so IRQ-flags tracing has to follow that:
565 */
538 ALIGN 566 ALIGN
539common_interrupt: 567common_interrupt:
540 SAVE_ALL 568 SAVE_ALL
569 TRACE_IRQS_OFF
541 movl %esp,%eax 570 movl %esp,%eax
542 call do_IRQ 571 call do_IRQ
543 jmp ret_from_intr 572 jmp ret_from_intr
@@ -549,9 +578,10 @@ ENTRY(name) \
549 pushl $~(nr); \ 578 pushl $~(nr); \
550 CFI_ADJUST_CFA_OFFSET 4; \ 579 CFI_ADJUST_CFA_OFFSET 4; \
551 SAVE_ALL; \ 580 SAVE_ALL; \
581 TRACE_IRQS_OFF \
552 movl %esp,%eax; \ 582 movl %esp,%eax; \
553 call smp_/**/name; \ 583 call smp_/**/name; \
554 jmp ret_from_intr; \ 584 jmp ret_from_intr; \
555 CFI_ENDPROC 585 CFI_ENDPROC
556 586
557/* The include is where all of the SMP etc. interrupts come from */ 587/* The include is where all of the SMP etc. interrupts come from */
@@ -726,7 +756,7 @@ nmi_stack_correct:
726 xorl %edx,%edx # zero error code 756 xorl %edx,%edx # zero error code
727 movl %esp,%eax # pt_regs pointer 757 movl %esp,%eax # pt_regs pointer
728 call do_nmi 758 call do_nmi
729 jmp restore_all 759 jmp restore_nocheck_notrace
730 CFI_ENDPROC 760 CFI_ENDPROC
731 761
732nmi_stack_fixup: 762nmi_stack_fixup:
diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c
index 16b491703967..6cb529f60dcc 100644
--- a/arch/i386/kernel/irq.c
+++ b/arch/i386/kernel/irq.c
@@ -166,7 +166,7 @@ void irq_ctx_init(int cpu)
166 irqctx->tinfo.task = NULL; 166 irqctx->tinfo.task = NULL;
167 irqctx->tinfo.exec_domain = NULL; 167 irqctx->tinfo.exec_domain = NULL;
168 irqctx->tinfo.cpu = cpu; 168 irqctx->tinfo.cpu = cpu;
169 irqctx->tinfo.preempt_count = SOFTIRQ_OFFSET; 169 irqctx->tinfo.preempt_count = 0;
170 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); 170 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
171 171
172 softirq_ctx[cpu] = irqctx; 172 softirq_ctx[cpu] = irqctx;
@@ -211,6 +211,10 @@ asmlinkage void do_softirq(void)
211 : "0"(isp) 211 : "0"(isp)
212 : "memory", "cc", "edx", "ecx", "eax" 212 : "memory", "cc", "edx", "ecx", "eax"
213 ); 213 );
214 /*
215 * Shouldnt happen, we returned above if in_interrupt():
216 */
217 WARN_ON_ONCE(softirq_count());
214 } 218 }
215 219
216 local_irq_restore(flags); 220 local_irq_restore(flags);
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c
index a76e93146585..2dd928a84645 100644
--- a/arch/i386/kernel/nmi.c
+++ b/arch/i386/kernel/nmi.c
@@ -107,7 +107,7 @@ int nmi_active;
107static __init void nmi_cpu_busy(void *data) 107static __init void nmi_cpu_busy(void *data)
108{ 108{
109 volatile int *endflag = data; 109 volatile int *endflag = data;
110 local_irq_enable(); 110 local_irq_enable_in_hardirq();
111 /* Intentionally don't use cpu_relax here. This is 111 /* Intentionally don't use cpu_relax here. This is
112 to make sure that the performance counter really ticks, 112 to make sure that the performance counter really ticks,
113 even if there is a simulator or similar that catches the 113 even if there is a simulator or similar that catches the
diff --git a/arch/i386/kernel/stacktrace.c b/arch/i386/kernel/stacktrace.c
new file mode 100644
index 000000000000..e62a037ab399
--- /dev/null
+++ b/arch/i386/kernel/stacktrace.c
@@ -0,0 +1,98 @@
1/*
2 * arch/i386/kernel/stacktrace.c
3 *
4 * Stack trace management functions
5 *
6 * Copyright (C) 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
7 */
8#include <linux/sched.h>
9#include <linux/stacktrace.h>
10
11static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
12{
13 return p > (void *)tinfo &&
14 p < (void *)tinfo + THREAD_SIZE - 3;
15}
16
17/*
18 * Save stack-backtrace addresses into a stack_trace buffer:
19 */
20static inline unsigned long
21save_context_stack(struct stack_trace *trace, unsigned int skip,
22 struct thread_info *tinfo, unsigned long *stack,
23 unsigned long ebp)
24{
25 unsigned long addr;
26
27#ifdef CONFIG_FRAME_POINTER
28 while (valid_stack_ptr(tinfo, (void *)ebp)) {
29 addr = *(unsigned long *)(ebp + 4);
30 if (!skip)
31 trace->entries[trace->nr_entries++] = addr;
32 else
33 skip--;
34 if (trace->nr_entries >= trace->max_entries)
35 break;
36 /*
37 * break out of recursive entries (such as
38 * end_of_stack_stop_unwind_function):
39 */
40 if (ebp == *(unsigned long *)ebp)
41 break;
42
43 ebp = *(unsigned long *)ebp;
44 }
45#else
46 while (valid_stack_ptr(tinfo, stack)) {
47 addr = *stack++;
48 if (__kernel_text_address(addr)) {
49 if (!skip)
50 trace->entries[trace->nr_entries++] = addr;
51 else
52 skip--;
53 if (trace->nr_entries >= trace->max_entries)
54 break;
55 }
56 }
57#endif
58
59 return ebp;
60}
61
62/*
63 * Save stack-backtrace addresses into a stack_trace buffer.
64 * If all_contexts is set, all contexts (hardirq, softirq and process)
65 * are saved. If not set then only the current context is saved.
66 */
67void save_stack_trace(struct stack_trace *trace,
68 struct task_struct *task, int all_contexts,
69 unsigned int skip)
70{
71 unsigned long ebp;
72 unsigned long *stack = &ebp;
73
74 WARN_ON(trace->nr_entries || !trace->max_entries);
75
76 if (!task || task == current) {
77 /* Grab ebp right from our regs: */
78 asm ("movl %%ebp, %0" : "=r" (ebp));
79 } else {
80 /* ebp is the last reg pushed by switch_to(): */
81 ebp = *(unsigned long *) task->thread.esp;
82 }
83
84 while (1) {
85 struct thread_info *context = (struct thread_info *)
86 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
87
88 ebp = save_context_stack(trace, skip, context, stack, ebp);
89 stack = (unsigned long *)context->previous_esp;
90 if (!all_contexts || !stack ||
91 trace->nr_entries >= trace->max_entries)
92 break;
93 trace->entries[trace->nr_entries++] = ULONG_MAX;
94 if (trace->nr_entries >= trace->max_entries)
95 break;
96 }
97}
98
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c
index e8c6086b2aa1..2bf8b55b91f8 100644
--- a/arch/i386/kernel/traps.c
+++ b/arch/i386/kernel/traps.c
@@ -115,28 +115,13 @@ static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
115} 115}
116 116
117/* 117/*
118 * Print CONFIG_STACK_BACKTRACE_COLS address/symbol entries per line. 118 * Print one address/symbol entries per line.
119 */ 119 */
120static inline int print_addr_and_symbol(unsigned long addr, char *log_lvl, 120static inline void print_addr_and_symbol(unsigned long addr, char *log_lvl)
121 int printed)
122{ 121{
123 if (!printed)
124 printk(log_lvl);
125
126#if CONFIG_STACK_BACKTRACE_COLS == 1
127 printk(" [<%08lx>] ", addr); 122 printk(" [<%08lx>] ", addr);
128#else
129 printk(" <%08lx> ", addr);
130#endif
131 print_symbol("%s", addr);
132 123
133 printed = (printed + 1) % CONFIG_STACK_BACKTRACE_COLS; 124 print_symbol("%s\n", addr);
134 if (printed)
135 printk(" ");
136 else
137 printk("\n");
138
139 return printed;
140} 125}
141 126
142static inline unsigned long print_context_stack(struct thread_info *tinfo, 127static inline unsigned long print_context_stack(struct thread_info *tinfo,
@@ -144,12 +129,11 @@ static inline unsigned long print_context_stack(struct thread_info *tinfo,
144 char *log_lvl) 129 char *log_lvl)
145{ 130{
146 unsigned long addr; 131 unsigned long addr;
147 int printed = 0; /* nr of entries already printed on current line */
148 132
149#ifdef CONFIG_FRAME_POINTER 133#ifdef CONFIG_FRAME_POINTER
150 while (valid_stack_ptr(tinfo, (void *)ebp)) { 134 while (valid_stack_ptr(tinfo, (void *)ebp)) {
151 addr = *(unsigned long *)(ebp + 4); 135 addr = *(unsigned long *)(ebp + 4);
152 printed = print_addr_and_symbol(addr, log_lvl, printed); 136 print_addr_and_symbol(addr, log_lvl);
153 /* 137 /*
154 * break out of recursive entries (such as 138 * break out of recursive entries (such as
155 * end_of_stack_stop_unwind_function): 139 * end_of_stack_stop_unwind_function):
@@ -162,28 +146,23 @@ static inline unsigned long print_context_stack(struct thread_info *tinfo,
162 while (valid_stack_ptr(tinfo, stack)) { 146 while (valid_stack_ptr(tinfo, stack)) {
163 addr = *stack++; 147 addr = *stack++;
164 if (__kernel_text_address(addr)) 148 if (__kernel_text_address(addr))
165 printed = print_addr_and_symbol(addr, log_lvl, printed); 149 print_addr_and_symbol(addr, log_lvl);
166 } 150 }
167#endif 151#endif
168 if (printed)
169 printk("\n");
170
171 return ebp; 152 return ebp;
172} 153}
173 154
174static asmlinkage int show_trace_unwind(struct unwind_frame_info *info, void *log_lvl) 155static asmlinkage int
156show_trace_unwind(struct unwind_frame_info *info, void *log_lvl)
175{ 157{
176 int n = 0; 158 int n = 0;
177 int printed = 0; /* nr of entries already printed on current line */
178 159
179 while (unwind(info) == 0 && UNW_PC(info)) { 160 while (unwind(info) == 0 && UNW_PC(info)) {
180 ++n; 161 n++;
181 printed = print_addr_and_symbol(UNW_PC(info), log_lvl, printed); 162 print_addr_and_symbol(UNW_PC(info), log_lvl);
182 if (arch_unw_user_mode(info)) 163 if (arch_unw_user_mode(info))
183 break; 164 break;
184 } 165 }
185 if (printed)
186 printk("\n");
187 return n; 166 return n;
188} 167}
189 168
diff --git a/arch/i386/mach-default/setup.c b/arch/i386/mach-default/setup.c
index 77c8c83815c1..c511705c386c 100644
--- a/arch/i386/mach-default/setup.c
+++ b/arch/i386/mach-default/setup.c
@@ -79,7 +79,7 @@ void __init trap_init_hook(void)
79{ 79{
80} 80}
81 81
82static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; 82static struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL};
83 83
84/** 84/**
85 * time_init_hook - do any specific initialisations for the system timer. 85 * time_init_hook - do any specific initialisations for the system timer.
diff --git a/arch/i386/mach-visws/setup.c b/arch/i386/mach-visws/setup.c
index 1f84cdb24779..885c7cbfd478 100644
--- a/arch/i386/mach-visws/setup.c
+++ b/arch/i386/mach-visws/setup.c
@@ -115,7 +115,7 @@ void __init pre_setup_arch_hook()
115 115
116static struct irqaction irq0 = { 116static struct irqaction irq0 = {
117 .handler = timer_interrupt, 117 .handler = timer_interrupt,
118 .flags = SA_INTERRUPT, 118 .flags = IRQF_DISABLED,
119 .name = "timer", 119 .name = "timer",
120}; 120};
121 121
diff --git a/arch/i386/mach-voyager/setup.c b/arch/i386/mach-voyager/setup.c
index 9da9ef09068d..cfa16c151c8f 100644
--- a/arch/i386/mach-voyager/setup.c
+++ b/arch/i386/mach-voyager/setup.c
@@ -40,7 +40,7 @@ void __init trap_init_hook(void)
40{ 40{
41} 41}
42 42
43static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; 43static struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL};
44 44
45void __init time_init_hook(void) 45void __init time_init_hook(void)
46{ 46{
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index bdb4896c56e6..4a8995c9c762 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -864,7 +864,7 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
864 for (i = 0; i < 16; i++) { 864 for (i = 0; i < 16; i++) {
865 if (!(mask & (1 << i))) 865 if (!(mask & (1 << i)))
866 continue; 866 continue;
867 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, SA_SHIRQ)) 867 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, IRQF_SHARED))
868 newirq = i; 868 newirq = i;
869 } 869 }
870 } 870 }
diff --git a/arch/ia64/hp/sim/simserial.c b/arch/ia64/hp/sim/simserial.c
index 33a3bbc8f67f..0daacc20ed36 100644
--- a/arch/ia64/hp/sim/simserial.c
+++ b/arch/ia64/hp/sim/simserial.c
@@ -46,7 +46,7 @@
46 46
47#define NR_PORTS 1 /* only one port for now */ 47#define NR_PORTS 1 /* only one port for now */
48 48
49#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? SA_SHIRQ : SA_INTERRUPT) 49#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
50 50
51#define SSC_GETCHAR 21 51#define SSC_GETCHAR 21
52 52
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 3e6fcb056bcb..a041367f043b 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -235,7 +235,7 @@ extern irqreturn_t handle_IPI (int irq, void *dev_id, struct pt_regs *regs);
235 235
236static struct irqaction ipi_irqaction = { 236static struct irqaction ipi_irqaction = {
237 .handler = handle_IPI, 237 .handler = handle_IPI,
238 .flags = SA_INTERRUPT, 238 .flags = IRQF_DISABLED,
239 .name = "IPI" 239 .name = "IPI"
240}; 240};
241#endif 241#endif
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 584df1772845..2fbe4536fe18 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -678,7 +678,7 @@ copy_reg(const u64 *fr, u64 fnat, u64 *tr, u64 *tnat)
678 */ 678 */
679 679
680static void 680static void
681ia64_mca_modify_comm(const task_t *previous_current) 681ia64_mca_modify_comm(const struct task_struct *previous_current)
682{ 682{
683 char *p, comm[sizeof(current->comm)]; 683 char *p, comm[sizeof(current->comm)];
684 if (previous_current->pid) 684 if (previous_current->pid)
@@ -709,7 +709,7 @@ ia64_mca_modify_comm(const task_t *previous_current)
709 * that we can do backtrace on the MCA/INIT handler code itself. 709 * that we can do backtrace on the MCA/INIT handler code itself.
710 */ 710 */
711 711
712static task_t * 712static struct task_struct *
713ia64_mca_modify_original_stack(struct pt_regs *regs, 713ia64_mca_modify_original_stack(struct pt_regs *regs,
714 const struct switch_stack *sw, 714 const struct switch_stack *sw,
715 struct ia64_sal_os_state *sos, 715 struct ia64_sal_os_state *sos,
@@ -719,7 +719,7 @@ ia64_mca_modify_original_stack(struct pt_regs *regs,
719 ia64_va va; 719 ia64_va va;
720 extern char ia64_leave_kernel[]; /* Need asm address, not function descriptor */ 720 extern char ia64_leave_kernel[]; /* Need asm address, not function descriptor */
721 const pal_min_state_area_t *ms = sos->pal_min_state; 721 const pal_min_state_area_t *ms = sos->pal_min_state;
722 task_t *previous_current; 722 struct task_struct *previous_current;
723 struct pt_regs *old_regs; 723 struct pt_regs *old_regs;
724 struct switch_stack *old_sw; 724 struct switch_stack *old_sw;
725 unsigned size = sizeof(struct pt_regs) + 725 unsigned size = sizeof(struct pt_regs) +
@@ -1023,7 +1023,7 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1023 pal_processor_state_info_t *psp = (pal_processor_state_info_t *) 1023 pal_processor_state_info_t *psp = (pal_processor_state_info_t *)
1024 &sos->proc_state_param; 1024 &sos->proc_state_param;
1025 int recover, cpu = smp_processor_id(); 1025 int recover, cpu = smp_processor_id();
1026 task_t *previous_current; 1026 struct task_struct *previous_current;
1027 struct ia64_mca_notify_die nd = 1027 struct ia64_mca_notify_die nd =
1028 { .sos = sos, .monarch_cpu = &monarch_cpu }; 1028 { .sos = sos, .monarch_cpu = &monarch_cpu };
1029 1029
@@ -1352,7 +1352,7 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
1352{ 1352{
1353 static atomic_t slaves; 1353 static atomic_t slaves;
1354 static atomic_t monarchs; 1354 static atomic_t monarchs;
1355 task_t *previous_current; 1355 struct task_struct *previous_current;
1356 int cpu = smp_processor_id(); 1356 int cpu = smp_processor_id();
1357 struct ia64_mca_notify_die nd = 1357 struct ia64_mca_notify_die nd =
1358 { .sos = sos, .monarch_cpu = &monarch_cpu }; 1358 { .sos = sos, .monarch_cpu = &monarch_cpu };
@@ -1457,38 +1457,38 @@ __setup("disable_cpe_poll", ia64_mca_disable_cpe_polling);
1457 1457
1458static struct irqaction cmci_irqaction = { 1458static struct irqaction cmci_irqaction = {
1459 .handler = ia64_mca_cmc_int_handler, 1459 .handler = ia64_mca_cmc_int_handler,
1460 .flags = SA_INTERRUPT, 1460 .flags = IRQF_DISABLED,
1461 .name = "cmc_hndlr" 1461 .name = "cmc_hndlr"
1462}; 1462};
1463 1463
1464static struct irqaction cmcp_irqaction = { 1464static struct irqaction cmcp_irqaction = {
1465 .handler = ia64_mca_cmc_int_caller, 1465 .handler = ia64_mca_cmc_int_caller,
1466 .flags = SA_INTERRUPT, 1466 .flags = IRQF_DISABLED,
1467 .name = "cmc_poll" 1467 .name = "cmc_poll"
1468}; 1468};
1469 1469
1470static struct irqaction mca_rdzv_irqaction = { 1470static struct irqaction mca_rdzv_irqaction = {
1471 .handler = ia64_mca_rendez_int_handler, 1471 .handler = ia64_mca_rendez_int_handler,
1472 .flags = SA_INTERRUPT, 1472 .flags = IRQF_DISABLED,
1473 .name = "mca_rdzv" 1473 .name = "mca_rdzv"
1474}; 1474};
1475 1475
1476static struct irqaction mca_wkup_irqaction = { 1476static struct irqaction mca_wkup_irqaction = {
1477 .handler = ia64_mca_wakeup_int_handler, 1477 .handler = ia64_mca_wakeup_int_handler,
1478 .flags = SA_INTERRUPT, 1478 .flags = IRQF_DISABLED,
1479 .name = "mca_wkup" 1479 .name = "mca_wkup"
1480}; 1480};
1481 1481
1482#ifdef CONFIG_ACPI 1482#ifdef CONFIG_ACPI
1483static struct irqaction mca_cpe_irqaction = { 1483static struct irqaction mca_cpe_irqaction = {
1484 .handler = ia64_mca_cpe_int_handler, 1484 .handler = ia64_mca_cpe_int_handler,
1485 .flags = SA_INTERRUPT, 1485 .flags = IRQF_DISABLED,
1486 .name = "cpe_hndlr" 1486 .name = "cpe_hndlr"
1487}; 1487};
1488 1488
1489static struct irqaction mca_cpep_irqaction = { 1489static struct irqaction mca_cpep_irqaction = {
1490 .handler = ia64_mca_cpe_int_caller, 1490 .handler = ia64_mca_cpe_int_caller,
1491 .flags = SA_INTERRUPT, 1491 .flags = IRQF_DISABLED,
1492 .name = "cpe_poll" 1492 .name = "cpe_poll"
1493}; 1493};
1494#endif /* CONFIG_ACPI */ 1494#endif /* CONFIG_ACPI */
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 92b815d13418..c7ccd6ee1ddf 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -6439,7 +6439,7 @@ pfm_flush_pmds(struct task_struct *task, pfm_context_t *ctx)
6439 6439
6440static struct irqaction perfmon_irqaction = { 6440static struct irqaction perfmon_irqaction = {
6441 .handler = pfm_interrupt_handler, 6441 .handler = pfm_interrupt_handler,
6442 .flags = SA_INTERRUPT, 6442 .flags = IRQF_DISABLED,
6443 .name = "perfmon" 6443 .name = "perfmon"
6444}; 6444};
6445 6445
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index e1960979be29..6203ed4ec8cf 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -124,7 +124,7 @@ extern void __devinit calibrate_delay (void);
124extern void start_ap (void); 124extern void start_ap (void);
125extern unsigned long ia64_iobase; 125extern unsigned long ia64_iobase;
126 126
127task_t *task_for_booting_cpu; 127struct task_struct *task_for_booting_cpu;
128 128
129/* 129/*
130 * State for each CPU 130 * State for each CPU
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 71ccddabc715..6928ef0d64d8 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -231,7 +231,7 @@ ia64_init_itm (void)
231 231
232static struct irqaction timer_irqaction = { 232static struct irqaction timer_irqaction = {
233 .handler = timer_interrupt, 233 .handler = timer_interrupt,
234 .flags = SA_INTERRUPT, 234 .flags = IRQF_DISABLED,
235 .name = "timer" 235 .name = "timer"
236}; 236};
237 237
diff --git a/arch/ia64/sn/kernel/huberror.c b/arch/ia64/sn/kernel/huberror.c
index 56ab6bae00ee..96fb81e6321f 100644
--- a/arch/ia64/sn/kernel/huberror.c
+++ b/arch/ia64/sn/kernel/huberror.c
@@ -178,7 +178,7 @@ void hubiio_crb_error_handler(struct hubdev_info *hubdev_info)
178 */ 178 */
179void hub_error_init(struct hubdev_info *hubdev_info) 179void hub_error_init(struct hubdev_info *hubdev_info)
180{ 180{
181 if (request_irq(SGI_II_ERROR, (void *)hub_eint_handler, SA_SHIRQ, 181 if (request_irq(SGI_II_ERROR, (void *)hub_eint_handler, IRQF_SHARED,
182 "SN_hub_error", (void *)hubdev_info)) 182 "SN_hub_error", (void *)hubdev_info))
183 printk("hub_error_init: Failed to request_irq for 0x%p\n", 183 printk("hub_error_init: Failed to request_irq for 0x%p\n",
184 hubdev_info); 184 hubdev_info);
@@ -196,7 +196,7 @@ void hub_error_init(struct hubdev_info *hubdev_info)
196void ice_error_init(struct hubdev_info *hubdev_info) 196void ice_error_init(struct hubdev_info *hubdev_info)
197{ 197{
198 if (request_irq 198 if (request_irq
199 (SGI_TIO_ERROR, (void *)hub_eint_handler, SA_SHIRQ, "SN_TIO_error", 199 (SGI_TIO_ERROR, (void *)hub_eint_handler, IRQF_SHARED, "SN_TIO_error",
200 (void *)hubdev_info)) 200 (void *)hubdev_info))
201 printk("ice_error_init: request_irq() error hubdev_info 0x%p\n", 201 printk("ice_error_init: request_irq() error hubdev_info 0x%p\n",
202 hubdev_info); 202 hubdev_info);
diff --git a/arch/ia64/sn/kernel/xpc_channel.c b/arch/ia64/sn/kernel/xpc_channel.c
index 8255a9be4632..c2f69f7942af 100644
--- a/arch/ia64/sn/kernel/xpc_channel.c
+++ b/arch/ia64/sn/kernel/xpc_channel.c
@@ -202,7 +202,7 @@ xpc_setup_infrastructure(struct xpc_partition *part)
202 init_waitqueue_head(&part->channel_mgr_wq); 202 init_waitqueue_head(&part->channel_mgr_wq);
203 203
204 sprintf(part->IPI_owner, "xpc%02d", partid); 204 sprintf(part->IPI_owner, "xpc%02d", partid);
205 ret = request_irq(SGI_XPC_NOTIFY, xpc_notify_IRQ_handler, SA_SHIRQ, 205 ret = request_irq(SGI_XPC_NOTIFY, xpc_notify_IRQ_handler, IRQF_SHARED,
206 part->IPI_owner, (void *) (u64) partid); 206 part->IPI_owner, (void *) (u64) partid);
207 if (ret != 0) { 207 if (ret != 0) {
208 dev_err(xpc_chan, "can't register NOTIFY IRQ handler, " 208 dev_err(xpc_chan, "can't register NOTIFY IRQ handler, "
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index ab1211ef0176..838c93c9a16a 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -139,7 +139,7 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
139 * register the bridge's error interrupt handler 139 * register the bridge's error interrupt handler
140 */ 140 */
141 if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler, 141 if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler,
142 SA_SHIRQ, "PCIBR error", (void *)(soft))) { 142 IRQF_SHARED, "PCIBR error", (void *)(soft))) {
143 printk(KERN_WARNING 143 printk(KERN_WARNING
144 "pcibr cannot allocate interrupt for error handler\n"); 144 "pcibr cannot allocate interrupt for error handler\n");
145 } 145 }
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index e4aa839d0189..c36b0f5affb3 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -646,7 +646,7 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
646 646
647 if (request_irq(SGI_TIOCA_ERROR, 647 if (request_irq(SGI_TIOCA_ERROR,
648 tioca_error_intr_handler, 648 tioca_error_intr_handler,
649 SA_SHIRQ, "TIOCA error", (void *)tioca_common)) 649 IRQF_SHARED, "TIOCA error", (void *)tioca_common))
650 printk(KERN_WARNING 650 printk(KERN_WARNING
651 "%s: Unable to get irq %d. " 651 "%s: Unable to get irq %d. "
652 "Error interrupts won't be routed for TIOCA bus %d\n", 652 "Error interrupts won't be routed for TIOCA bus %d\n",
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index 2d7948567ebc..17cd34284886 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -1027,7 +1027,7 @@ tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
1027 1027
1028 if (request_irq(SGI_PCIASIC_ERROR, 1028 if (request_irq(SGI_PCIASIC_ERROR,
1029 tioce_error_intr_handler, 1029 tioce_error_intr_handler,
1030 SA_SHIRQ, "TIOCE error", (void *)tioce_common)) 1030 IRQF_SHARED, "TIOCE error", (void *)tioce_common))
1031 printk(KERN_WARNING 1031 printk(KERN_WARNING
1032 "%s: Unable to get irq %d. " 1032 "%s: Unable to get irq %d. "
1033 "Error interrupts won't be routed for " 1033 "Error interrupts won't be routed for "
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c
index efff6f5151df..ded0be07a476 100644
--- a/arch/m32r/kernel/time.c
+++ b/arch/m32r/kernel/time.c
@@ -237,7 +237,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
237 return IRQ_HANDLED; 237 return IRQ_HANDLED;
238} 238}
239 239
240struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, 240struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE,
241 "MFT2", NULL, NULL }; 241 "MFT2", NULL, NULL };
242 242
243void __init time_init(void) 243void __init time_init(void)
diff --git a/arch/m68k/amiga/amiints.c b/arch/m68k/amiga/amiints.c
index f9403f4640a1..96c79d840cff 100644
--- a/arch/m68k/amiga/amiints.c
+++ b/arch/m68k/amiga/amiints.c
@@ -22,7 +22,7 @@
22 * 22 *
23 * 07/08/99: rewamp of the interrupt handling - we now have two types of 23 * 07/08/99: rewamp of the interrupt handling - we now have two types of
24 * interrupts, normal and fast handlers, fast handlers being 24 * interrupts, normal and fast handlers, fast handlers being
25 * marked with SA_INTERRUPT and runs with all other interrupts 25 * marked with IRQF_DISABLED and runs with all other interrupts
26 * disabled. Normal interrupts disable their own source but 26 * disabled. Normal interrupts disable their own source but
27 * run with all other interrupt sources enabled. 27 * run with all other interrupt sources enabled.
28 * PORTS and EXTER interrupts are always shared even if the 28 * PORTS and EXTER interrupts are always shared even if the
diff --git a/arch/m68k/amiga/cia.c b/arch/m68k/amiga/cia.c
index 0956e45399e5..dbad30054721 100644
--- a/arch/m68k/amiga/cia.c
+++ b/arch/m68k/amiga/cia.c
@@ -176,5 +176,5 @@ void __init cia_init_IRQ(struct ciabase *base)
176 /* override auto int and install CIA handler */ 176 /* override auto int and install CIA handler */
177 m68k_setup_irq_controller(&auto_irq_controller, base->handler_irq, 1); 177 m68k_setup_irq_controller(&auto_irq_controller, base->handler_irq, 1);
178 m68k_irq_startup(base->handler_irq); 178 m68k_irq_startup(base->handler_irq);
179 request_irq(base->handler_irq, cia_handler, SA_SHIRQ, base->name, base); 179 request_irq(base->handler_irq, cia_handler, IRQF_SHARED, base->name, base);
180} 180}
diff --git a/arch/m68k/kernel/ints.c b/arch/m68k/kernel/ints.c
index e969f0477640..b33e37fb7b0e 100644
--- a/arch/m68k/kernel/ints.c
+++ b/arch/m68k/kernel/ints.c
@@ -192,7 +192,7 @@ int setup_irq(unsigned int irq, struct irq_node *node)
192 prev = irq_list + irq; 192 prev = irq_list + irq;
193 if (*prev) { 193 if (*prev) {
194 /* Can't share interrupts unless both agree to */ 194 /* Can't share interrupts unless both agree to */
195 if (!((*prev)->flags & node->flags & SA_SHIRQ)) { 195 if (!((*prev)->flags & node->flags & IRQF_SHARED)) {
196 spin_unlock_irqrestore(&contr->lock, flags); 196 spin_unlock_irqrestore(&contr->lock, flags);
197 return -EBUSY; 197 return -EBUSY;
198 } 198 }
diff --git a/arch/m68knommu/platform/5307/pit.c b/arch/m68knommu/platform/5307/pit.c
index 994c893df1a4..9dc5688f71b5 100644
--- a/arch/m68knommu/platform/5307/pit.c
+++ b/arch/m68knommu/platform/5307/pit.c
@@ -48,7 +48,7 @@ void coldfire_pit_init(irqreturn_t (*handler)(int, void *, struct pt_regs *))
48 volatile unsigned char *icrp; 48 volatile unsigned char *icrp;
49 volatile unsigned long *imrp; 49 volatile unsigned long *imrp;
50 50
51 request_irq(MCFINT_VECBASE + MCFINT_PIT1, handler, SA_INTERRUPT, 51 request_irq(MCFINT_VECBASE + MCFINT_PIT1, handler, IRQF_DISABLED,
52 "ColdFire Timer", NULL); 52 "ColdFire Timer", NULL);
53 53
54 icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 + 54 icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 +
diff --git a/arch/m68knommu/platform/5307/timers.c b/arch/m68knommu/platform/5307/timers.c
index c3a9755c2d1f..24781f009337 100644
--- a/arch/m68knommu/platform/5307/timers.c
+++ b/arch/m68knommu/platform/5307/timers.c
@@ -61,7 +61,7 @@ void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *))
61 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | 61 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
62 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR)); 62 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
63 63
64 request_irq(mcf_timervector, handler, SA_INTERRUPT, "timer", NULL); 64 request_irq(mcf_timervector, handler, IRQF_DISABLED, "timer", NULL);
65 mcf_settimericr(1, mcf_timerlevel); 65 mcf_settimericr(1, mcf_timerlevel);
66 66
67#ifdef CONFIG_HIGHPROFILE 67#ifdef CONFIG_HIGHPROFILE
@@ -125,7 +125,7 @@ void coldfire_profile_init(void)
125 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR)); 125 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
126 126
127 request_irq(mcf_profilevector, coldfire_profile_tick, 127 request_irq(mcf_profilevector, coldfire_profile_tick,
128 (SA_INTERRUPT | IRQ_FLG_FAST), "profile timer", NULL); 128 (IRQF_DISABLED | IRQ_FLG_FAST), "profile timer", NULL);
129 mcf_settimericr(2, 7); 129 mcf_settimericr(2, 7);
130} 130}
131 131
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 69cabb7463ff..98244d51c154 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -892,7 +892,7 @@ static void au1xxx_dbdma_init(void)
892 #error Unknown Au1x00 SOC 892 #error Unknown Au1x00 SOC
893#endif 893#endif
894 894
895 if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT, 895 if (request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED,
896 "Au1xxx dbdma", (void *)dbdma_gptr)) 896 "Au1xxx dbdma", (void *)dbdma_gptr))
897 printk("Can't get 1550 dbdma irq"); 897 printk("Can't get 1550 dbdma irq");
898} 898}
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index c0d56c130a59..29d6f8178bad 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -309,7 +309,7 @@ void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_reg
309 * can avoid it. --cgray 309 * can avoid it. --cgray
310 */ 310 */
311 action.dev_id = handler; 311 action.dev_id = handler;
312 action.flags = SA_INTERRUPT; 312 action.flags = IRQF_DISABLED;
313 cpus_clear(action.mask); 313 cpus_clear(action.mask);
314 action.name = "Au1xxx TOY"; 314 action.name = "Au1xxx TOY";
315 action.handler = handler; 315 action.handler = handler;
diff --git a/arch/mips/au1000/common/usbdev.c b/arch/mips/au1000/common/usbdev.c
index 2cab7629702c..63bcb3a95dc7 100644
--- a/arch/mips/au1000/common/usbdev.c
+++ b/arch/mips/au1000/common/usbdev.c
@@ -1465,14 +1465,14 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
1465 */ 1465 */
1466 1466
1467 /* request the USB device transfer complete interrupt */ 1467 /* request the USB device transfer complete interrupt */
1468 if (request_irq(AU1000_USB_DEV_REQ_INT, req_sus_intr, SA_INTERRUPT, 1468 if (request_irq(AU1000_USB_DEV_REQ_INT, req_sus_intr, IRQF_DISABLED,
1469 "USBdev req", &usbdev)) { 1469 "USBdev req", &usbdev)) {
1470 err("Can't get device request intr"); 1470 err("Can't get device request intr");
1471 ret = -ENXIO; 1471 ret = -ENXIO;
1472 goto out; 1472 goto out;
1473 } 1473 }
1474 /* request the USB device suspend interrupt */ 1474 /* request the USB device suspend interrupt */
1475 if (request_irq(AU1000_USB_DEV_SUS_INT, req_sus_intr, SA_INTERRUPT, 1475 if (request_irq(AU1000_USB_DEV_SUS_INT, req_sus_intr, IRQF_DISABLED,
1476 "USBdev sus", &usbdev)) { 1476 "USBdev sus", &usbdev)) {
1477 err("Can't get device suspend intr"); 1477 err("Can't get device suspend intr");
1478 ret = -ENXIO; 1478 ret = -ENXIO;
@@ -1483,7 +1483,7 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
1483 if ((ep0->indma = request_au1000_dma(ep_dma_id[0].id, 1483 if ((ep0->indma = request_au1000_dma(ep_dma_id[0].id,
1484 ep_dma_id[0].str, 1484 ep_dma_id[0].str,
1485 dma_done_ep0_intr, 1485 dma_done_ep0_intr,
1486 SA_INTERRUPT, 1486 IRQF_DISABLED,
1487 &usbdev)) < 0) { 1487 &usbdev)) < 0) {
1488 err("Can't get %s DMA", ep_dma_id[0].str); 1488 err("Can't get %s DMA", ep_dma_id[0].str);
1489 ret = -ENXIO; 1489 ret = -ENXIO;
@@ -1516,7 +1516,7 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
1516 request_au1000_dma(ep_dma_id[ep->address].id, 1516 request_au1000_dma(ep_dma_id[ep->address].id,
1517 ep_dma_id[ep->address].str, 1517 ep_dma_id[ep->address].str,
1518 dma_done_ep_intr, 1518 dma_done_ep_intr,
1519 SA_INTERRUPT, 1519 IRQF_DISABLED,
1520 &usbdev); 1520 &usbdev);
1521 if (ep->indma < 0) { 1521 if (ep->indma < 0) {
1522 err("Can't get %s DMA", 1522 err("Can't get %s DMA",
diff --git a/arch/mips/basler/excite/excite_iodev.c b/arch/mips/basler/excite/excite_iodev.c
index 91121e523043..b288151b532e 100644
--- a/arch/mips/basler/excite/excite_iodev.c
+++ b/arch/mips/basler/excite/excite_iodev.c
@@ -113,7 +113,7 @@ static int __exit iodev_remove(struct device *dev)
113 113
114static int iodev_open(struct inode *i, struct file *f) 114static int iodev_open(struct inode *i, struct file *f)
115{ 115{
116 return request_irq(iodev_irq, iodev_irqhdl, SA_INTERRUPT, 116 return request_irq(iodev_irq, iodev_irqhdl, IRQF_DISABLED,
117 iodev_name, &miscdev); 117 iodev_name, &miscdev);
118} 118}
119 119
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index 9c707b9ceb65..2684f121784b 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -105,7 +105,7 @@ static struct irqaction fpuirq = {
105}; 105};
106 106
107static struct irqaction busirq = { 107static struct irqaction busirq = {
108 .flags = SA_INTERRUPT, 108 .flags = IRQF_DISABLED,
109 .name = "bus error", 109 .name = "bus error",
110}; 110};
111 111
@@ -124,7 +124,7 @@ static void __init dec_be_init(void)
124 case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */ 124 case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */
125 board_be_handler = dec_kn01_be_handler; 125 board_be_handler = dec_kn01_be_handler;
126 busirq.handler = dec_kn01_be_interrupt; 126 busirq.handler = dec_kn01_be_interrupt;
127 busirq.flags |= SA_SHIRQ; 127 busirq.flags |= IRQF_SHARED;
128 dec_kn01_be_init(); 128 dec_kn01_be_init();
129 break; 129 break;
130 case MACH_DS5000_1XX: /* DS5000/1xx 3min */ 130 case MACH_DS5000_1XX: /* DS5000/1xx 3min */
diff --git a/arch/mips/gt64120/common/time.c b/arch/mips/gt64120/common/time.c
index c64a7723cafb..d837b26fbe51 100644
--- a/arch/mips/gt64120/common/time.c
+++ b/arch/mips/gt64120/common/time.c
@@ -77,7 +77,7 @@ void gt64120_time_init(void)
77 * the values to the correct interrupt line. 77 * the values to the correct interrupt line.
78 */ 78 */
79 timer.handler = gt64120_irq; 79 timer.handler = gt64120_irq;
80 timer.flags = SA_SHIRQ | SA_INTERRUPT; 80 timer.flags = IRQF_SHARED | IRQF_DISABLED;
81 timer.name = "timer"; 81 timer.name = "timer";
82 timer.dev_id = NULL; 82 timer.dev_id = NULL;
83 timer.next = NULL; 83 timer.next = NULL;
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index ecfd637d702a..01e7fa86aa43 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -65,7 +65,7 @@ need_resched:
65#endif 65#endif
66 66
67FEXPORT(ret_from_fork) 67FEXPORT(ret_from_fork)
68 jal schedule_tail # a0 = task_t *prev 68 jal schedule_tail # a0 = struct task_struct *prev
69 69
70FEXPORT(syscall_exit) 70FEXPORT(syscall_exit)
71 local_irq_disable # make sure need_resched and 71 local_irq_disable # make sure need_resched and
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index 02237a685ec7..4dcc39f42951 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -47,7 +47,7 @@ unsigned long mt_fpemul_threshold = 0;
47 * used in sys_sched_set/getaffinity() in kernel/sched.c, so 47 * used in sys_sched_set/getaffinity() in kernel/sched.c, so
48 * cloned here. 48 * cloned here.
49 */ 49 */
50static inline task_t *find_process_by_pid(pid_t pid) 50static inline struct task_struct *find_process_by_pid(pid_t pid)
51{ 51{
52 return pid ? find_task_by_pid(pid) : current; 52 return pid ? find_task_by_pid(pid) : current;
53} 53}
@@ -62,7 +62,7 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
62 cpumask_t new_mask; 62 cpumask_t new_mask;
63 cpumask_t effective_mask; 63 cpumask_t effective_mask;
64 int retval; 64 int retval;
65 task_t *p; 65 struct task_struct *p;
66 66
67 if (len < sizeof(new_mask)) 67 if (len < sizeof(new_mask))
68 return -EINVAL; 68 return -EINVAL;
@@ -127,7 +127,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
127 unsigned int real_len; 127 unsigned int real_len;
128 cpumask_t mask; 128 cpumask_t mask;
129 int retval; 129 int retval;
130 task_t *p; 130 struct task_struct *p;
131 131
132 real_len = sizeof(mask); 132 real_len = sizeof(mask);
133 if (len < real_len) 133 if (len < real_len)
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index caf777f83289..cdab1b2cd134 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -487,7 +487,7 @@ static struct file_operations rtlx_fops = {
487 487
488static struct irqaction rtlx_irq = { 488static struct irqaction rtlx_irq = {
489 .handler = rtlx_interrupt, 489 .handler = rtlx_interrupt,
490 .flags = SA_INTERRUPT, 490 .flags = IRQF_DISABLED,
491 .name = "RTLX", 491 .name = "RTLX",
492}; 492};
493 493
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 57770902b9ae..93429a4d3012 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -130,13 +130,13 @@ irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs)
130 130
131static struct irqaction irq_resched = { 131static struct irqaction irq_resched = {
132 .handler = ipi_resched_interrupt, 132 .handler = ipi_resched_interrupt,
133 .flags = SA_INTERRUPT, 133 .flags = IRQF_DISABLED,
134 .name = "IPI_resched" 134 .name = "IPI_resched"
135}; 135};
136 136
137static struct irqaction irq_call = { 137static struct irqaction irq_call = {
138 .handler = ipi_call_interrupt, 138 .handler = ipi_call_interrupt,
139 .flags = SA_INTERRUPT, 139 .flags = IRQF_DISABLED,
140 .name = "IPI_call" 140 .name = "IPI_call"
141}; 141};
142 142
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 70cf09afdf56..a48d9e553083 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -1002,7 +1002,7 @@ void setup_cross_vpe_interrupts(void)
1002 set_vi_handler(MIPS_CPU_IPI_IRQ, ipi_irq_dispatch); 1002 set_vi_handler(MIPS_CPU_IPI_IRQ, ipi_irq_dispatch);
1003 1003
1004 irq_ipi.handler = ipi_interrupt; 1004 irq_ipi.handler = ipi_interrupt;
1005 irq_ipi.flags = SA_INTERRUPT; 1005 irq_ipi.flags = IRQF_DISABLED;
1006 irq_ipi.name = "SMTC_IPI"; 1006 irq_ipi.name = "SMTC_IPI";
1007 1007
1008 setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ)); 1008 setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ));
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index c2b1fcf6024f..2393c11d5a20 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -579,7 +579,7 @@ unsigned int mips_hpt_frequency;
579 579
580static struct irqaction timer_irqaction = { 580static struct irqaction timer_irqaction = {
581 .handler = timer_interrupt, 581 .handler = timer_interrupt,
582 .flags = SA_INTERRUPT, 582 .flags = IRQF_DISABLED,
583 .name = "timer", 583 .name = "timer",
584}; 584};
585 585
diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c
index ec4032b38f19..f9067469a656 100644
--- a/arch/mips/momentum/jaguar_atx/irq.c
+++ b/arch/mips/momentum/jaguar_atx/irq.c
@@ -71,7 +71,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
71} 71}
72 72
73static struct irqaction cascade_mv64340 = { 73static struct irqaction cascade_mv64340 = {
74 no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL 74 no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
75}; 75};
76 76
77void __init arch_init_irq(void) 77void __init arch_init_irq(void)
diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c
index 87c63c340ae3..793782a9c195 100644
--- a/arch/mips/momentum/ocelot_3/irq.c
+++ b/arch/mips/momentum/ocelot_3/irq.c
@@ -54,7 +54,7 @@
54#include <asm/system.h> 54#include <asm/system.h>
55 55
56static struct irqaction cascade_mv64340 = { 56static struct irqaction cascade_mv64340 = {
57 no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL 57 no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
58}; 58};
59 59
60void __init arch_init_irq(void) 60void __init arch_init_irq(void)
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c
index 86f61ce59e53..9d44ae1e156b 100644
--- a/arch/mips/momentum/ocelot_c/irq.c
+++ b/arch/mips/momentum/ocelot_c/irq.c
@@ -52,11 +52,11 @@ extern void uart_irq_init(void);
52extern void cpci_irq_init(void); 52extern void cpci_irq_init(void);
53 53
54static struct irqaction cascade_fpga = { 54static struct irqaction cascade_fpga = {
55 no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL 55 no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL
56}; 56};
57 57
58static struct irqaction cascade_mv64340 = { 58static struct irqaction cascade_mv64340 = {
59 no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL 59 no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
60}; 60};
61 61
62extern void ll_uart_irq(struct pt_regs *regs); 62extern void ll_uart_irq(struct pt_regs *regs);
diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c
index 047457f3b97a..9fb2493fff02 100644
--- a/arch/mips/momentum/ocelot_g/gt-irq.c
+++ b/arch/mips/momentum/ocelot_g/gt-irq.c
@@ -173,7 +173,7 @@ void gt64240_time_init(void)
173 * the values to the correct interrupt line. 173 * the values to the correct interrupt line.
174 */ 174 */
175 timer.handler = &gt64240_p0int_irq; 175 timer.handler = &gt64240_p0int_irq;
176 timer.flags = SA_SHIRQ | SA_INTERRUPT; 176 timer.flags = IRQF_SHARED | IRQF_DISABLED;
177 timer.name = "timer"; 177 timer.name = "timer";
178 timer.dev_id = NULL; 178 timer.dev_id = NULL;
179 timer.next = NULL; 179 timer.next = NULL;
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c
index 388a4df73040..8aca317d4624 100644
--- a/arch/mips/philips/pnx8550/common/int.c
+++ b/arch/mips/philips/pnx8550/common/int.c
@@ -219,13 +219,13 @@ static struct hw_interrupt_type level_irq_type = {
219 219
220static struct irqaction gic_action = { 220static struct irqaction gic_action = {
221 .handler = no_action, 221 .handler = no_action,
222 .flags = SA_INTERRUPT, 222 .flags = IRQF_DISABLED,
223 .name = "GIC", 223 .name = "GIC",
224}; 224};
225 225
226static struct irqaction timer_action = { 226static struct irqaction timer_action = {
227 .handler = no_action, 227 .handler = no_action,
228 .flags = SA_INTERRUPT, 228 .flags = IRQF_DISABLED,
229 .name = "Timer", 229 .name = "Timer",
230}; 230};
231 231
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index aee567dc372a..2d8762818d95 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -272,32 +272,32 @@ static void indy_buserror_irq(struct pt_regs *regs)
272 272
273static struct irqaction local0_cascade = { 273static struct irqaction local0_cascade = {
274 .handler = no_action, 274 .handler = no_action,
275 .flags = SA_INTERRUPT, 275 .flags = IRQF_DISABLED,
276 .name = "local0 cascade", 276 .name = "local0 cascade",
277}; 277};
278 278
279static struct irqaction local1_cascade = { 279static struct irqaction local1_cascade = {
280 .handler = no_action, 280 .handler = no_action,
281 .flags = SA_INTERRUPT, 281 .flags = IRQF_DISABLED,
282 .name = "local1 cascade", 282 .name = "local1 cascade",
283}; 283};
284 284
285static struct irqaction buserr = { 285static struct irqaction buserr = {
286 .handler = no_action, 286 .handler = no_action,
287 .flags = SA_INTERRUPT, 287 .flags = IRQF_DISABLED,
288 .name = "Bus Error", 288 .name = "Bus Error",
289}; 289};
290 290
291static struct irqaction map0_cascade = { 291static struct irqaction map0_cascade = {
292 .handler = no_action, 292 .handler = no_action,
293 .flags = SA_INTERRUPT, 293 .flags = IRQF_DISABLED,
294 .name = "mapable0 cascade", 294 .name = "mapable0 cascade",
295}; 295};
296 296
297#ifdef USE_LIO3_IRQ 297#ifdef USE_LIO3_IRQ
298static struct irqaction map1_cascade = { 298static struct irqaction map1_cascade = {
299 .handler = no_action, 299 .handler = no_action,
300 .flags = SA_INTERRUPT, 300 .flags = IRQF_DISABLED,
301 .name = "mapable1 cascade", 301 .name = "mapable1 cascade",
302}; 302};
303#define SGI_INTERRUPTS SGINT_END 303#define SGI_INTERRUPTS SGINT_END
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index a94e4c785805..597ec73359b7 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -118,7 +118,7 @@ static int ms1bit(unsigned long x)
118} 118}
119 119
120/* 120/*
121 * This code is unnecessarily complex, because we do SA_INTERRUPT 121 * This code is unnecessarily complex, because we do IRQF_DISABLED
122 * intr enabling. Basically, once we grab the set of intrs we need 122 * intr enabling. Basically, once we grab the set of intrs we need
123 * to service, we must mask _all_ these interrupts; firstly, to make 123 * to service, we must mask _all_ these interrupts; firstly, to make
124 * sure the same intr does not intr again, causing recursion that 124 * sure the same intr does not intr again, causing recursion that
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 1fb860c7ac6d..3ca614a851e5 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -217,7 +217,7 @@ static struct hw_interrupt_type rt_irq_type = {
217 217
218static struct irqaction rt_irqaction = { 218static struct irqaction rt_irqaction = {
219 .handler = ip27_rt_timer_interrupt, 219 .handler = ip27_rt_timer_interrupt,
220 .flags = SA_INTERRUPT, 220 .flags = IRQF_DISABLED,
221 .mask = CPU_MASK_NONE, 221 .mask = CPU_MASK_NONE,
222 .name = "timer" 222 .name = "timer"
223}; 223};
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index 00b94aaf6371..3b7e74b6222e 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -125,9 +125,9 @@ extern irqreturn_t crime_memerr_intr (int irq, void *dev_id,
125extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id, 125extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id,
126 struct pt_regs *regs); 126 struct pt_regs *regs);
127 127
128struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT, 128struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED,
129 CPU_MASK_NONE, "CRIME memory error", NULL, NULL }; 129 CPU_MASK_NONE, "CRIME memory error", NULL, NULL };
130struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT, 130struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED,
131 CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; 131 CPU_MASK_NONE, "CRIME CPU error", NULL, NULL };
132 132
133/* 133/*
@@ -316,9 +316,9 @@ static struct hw_interrupt_type ip32_macepci_interrupt = {
316 MACEISA_KEYB_POLL_INT | \ 316 MACEISA_KEYB_POLL_INT | \
317 MACEISA_MOUSE_INT | \ 317 MACEISA_MOUSE_INT | \
318 MACEISA_MOUSE_POLL_INT | \ 318 MACEISA_MOUSE_POLL_INT | \
319 MACEISA_TIMER0_INT | \ 319 MACEIIRQF_TIMER0_INT | \
320 MACEISA_TIMER1_INT | \ 320 MACEIIRQF_TIMER1_INT | \
321 MACEISA_TIMER2_INT) 321 MACEIIRQF_TIMER2_INT)
322#define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \ 322#define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \
323 MACEISA_PAR_CTXA_INT | \ 323 MACEISA_PAR_CTXA_INT | \
324 MACEISA_PAR_CTXB_INT | \ 324 MACEISA_PAR_CTXB_INT | \
@@ -349,7 +349,7 @@ static void enable_maceisa_irq (unsigned int irq)
349 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ: 349 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
350 crime_int = MACE_AUDIO_INT; 350 crime_int = MACE_AUDIO_INT;
351 break; 351 break;
352 case MACEISA_RTC_IRQ ... MACEISA_TIMER2_IRQ: 352 case MACEISA_RTC_IRQ ... MACEIIRQF_TIMER2_IRQ:
353 crime_int = MACE_MISC_INT; 353 crime_int = MACE_MISC_INT;
354 break; 354 break;
355 case MACEISA_PARALLEL_IRQ ... MACEISA_SERIAL2_RDMAOR_IRQ: 355 case MACEISA_PARALLEL_IRQ ... MACEISA_SERIAL2_RDMAOR_IRQ:
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index ee943cb1328c..ec0a0de3083d 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -337,7 +337,7 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
337} 337}
338 338
339//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } 339//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
340#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, SA_SHIRQ, CPU_MASK_NONE, s, NULL, NULL } 340#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL }
341static struct irqaction toshiba_rbtx4927_irq_ioc_action = 341static struct irqaction toshiba_rbtx4927_irq_ioc_action =
342TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME); 342TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME);
343#ifdef CONFIG_TOSHIBA_FPCIB0 343#ifdef CONFIG_TOSHIBA_FPCIB0
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 52761d96f991..5b8803cc3d69 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -366,14 +366,14 @@ void do_cpu_irq_mask(struct pt_regs *regs)
366static struct irqaction timer_action = { 366static struct irqaction timer_action = {
367 .handler = timer_interrupt, 367 .handler = timer_interrupt,
368 .name = "timer", 368 .name = "timer",
369 .flags = SA_INTERRUPT, 369 .flags = IRQF_DISABLED,
370}; 370};
371 371
372#ifdef CONFIG_SMP 372#ifdef CONFIG_SMP
373static struct irqaction ipi_action = { 373static struct irqaction ipi_action = {
374 .handler = ipi_interrupt, 374 .handler = ipi_interrupt,
375 .name = "IPI", 375 .name = "IPI",
376 .flags = SA_INTERRUPT, 376 .flags = IRQF_DISABLED,
377}; 377};
378#endif 378#endif
379 379
diff --git a/arch/powerpc/configs/chrp32_defconfig b/arch/powerpc/configs/chrp32_defconfig
new file mode 100644
index 000000000000..0fa010a63a8e
--- /dev/null
+++ b/arch/powerpc/configs/chrp32_defconfig
@@ -0,0 +1,1378 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.17
4# Mon Jul 3 12:08:41 2006
5#
6# CONFIG_PPC64 is not set
7CONFIG_PPC32=y
8CONFIG_PPC_MERGE=y
9CONFIG_MMU=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_RWSEM_XCHGADD_ALGORITHM=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_FIND_NEXT_BIT=y
15CONFIG_PPC=y
16CONFIG_EARLY_PRINTK=y
17CONFIG_GENERIC_NVRAM=y
18CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
19CONFIG_ARCH_MAY_HAVE_PC_FDC=y
20CONFIG_PPC_OF=y
21CONFIG_PPC_UDBG_16550=y
22CONFIG_GENERIC_TBSYNC=y
23# CONFIG_DEFAULT_UIMAGE is not set
24
25#
26# Processor support
27#
28CONFIG_CLASSIC32=y
29# CONFIG_PPC_52xx is not set
30# CONFIG_PPC_82xx is not set
31# CONFIG_PPC_83xx is not set
32# CONFIG_PPC_85xx is not set
33# CONFIG_PPC_86xx is not set
34# CONFIG_40x is not set
35# CONFIG_44x is not set
36# CONFIG_8xx is not set
37# CONFIG_E200 is not set
38CONFIG_6xx=y
39CONFIG_PPC_FPU=y
40# CONFIG_ALTIVEC is not set
41CONFIG_PPC_STD_MMU=y
42CONFIG_PPC_STD_MMU_32=y
43CONFIG_SMP=y
44CONFIG_NR_CPUS=4
45
46#
47# Code maturity level options
48#
49CONFIG_EXPERIMENTAL=y
50CONFIG_LOCK_KERNEL=y
51CONFIG_INIT_ENV_ARG_LIMIT=32
52
53#
54# General setup
55#
56CONFIG_LOCALVERSION=""
57# CONFIG_LOCALVERSION_AUTO is not set
58CONFIG_SWAP=y
59CONFIG_SYSVIPC=y
60CONFIG_POSIX_MQUEUE=y
61# CONFIG_BSD_PROCESS_ACCT is not set
62CONFIG_SYSCTL=y
63# CONFIG_AUDIT is not set
64CONFIG_IKCONFIG=y
65CONFIG_IKCONFIG_PROC=y
66# CONFIG_CPUSETS is not set
67# CONFIG_RELAY is not set
68CONFIG_INITRAMFS_SOURCE=""
69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
70# CONFIG_EMBEDDED is not set
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73# CONFIG_KALLSYMS_EXTRA_PASS is not set
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77CONFIG_ELF_CORE=y
78CONFIG_BASE_FULL=y
79CONFIG_FUTEX=y
80CONFIG_EPOLL=y
81CONFIG_SHMEM=y
82CONFIG_SLAB=y
83# CONFIG_TINY_SHMEM is not set
84CONFIG_BASE_SMALL=0
85# CONFIG_SLOB is not set
86
87#
88# Loadable module support
89#
90CONFIG_MODULES=y
91CONFIG_MODULE_UNLOAD=y
92CONFIG_MODULE_FORCE_UNLOAD=y
93# CONFIG_MODVERSIONS is not set
94# CONFIG_MODULE_SRCVERSION_ALL is not set
95CONFIG_KMOD=y
96CONFIG_STOP_MACHINE=y
97
98#
99# Block layer
100#
101CONFIG_LBD=y
102# CONFIG_BLK_DEV_IO_TRACE is not set
103# CONFIG_LSF is not set
104
105#
106# IO Schedulers
107#
108CONFIG_IOSCHED_NOOP=y
109CONFIG_IOSCHED_AS=y
110CONFIG_IOSCHED_DEADLINE=y
111CONFIG_IOSCHED_CFQ=y
112CONFIG_DEFAULT_AS=y
113# CONFIG_DEFAULT_DEADLINE is not set
114# CONFIG_DEFAULT_CFQ is not set
115# CONFIG_DEFAULT_NOOP is not set
116CONFIG_DEFAULT_IOSCHED="anticipatory"
117
118#
119# Platform support
120#
121CONFIG_PPC_MULTIPLATFORM=y
122# CONFIG_PPC_ISERIES is not set
123# CONFIG_EMBEDDED6xx is not set
124# CONFIG_APUS is not set
125CONFIG_PPC_CHRP=y
126# CONFIG_PPC_PMAC is not set
127# CONFIG_PPC_CELL is not set
128# CONFIG_PPC_CELL_NATIVE is not set
129CONFIG_MPIC=y
130CONFIG_PPC_RTAS=y
131# CONFIG_RTAS_ERROR_LOGGING is not set
132CONFIG_RTAS_PROC=y
133# CONFIG_MMIO_NVRAM is not set
134CONFIG_PPC_MPC106=y
135# CONFIG_PPC_970_NAP is not set
136# CONFIG_CPU_FREQ is not set
137# CONFIG_TAU is not set
138# CONFIG_WANT_EARLY_SERIAL is not set
139
140#
141# Kernel options
142#
143CONFIG_HIGHMEM=y
144# CONFIG_HZ_100 is not set
145CONFIG_HZ_250=y
146# CONFIG_HZ_1000 is not set
147CONFIG_HZ=250
148CONFIG_PREEMPT_NONE=y
149# CONFIG_PREEMPT_VOLUNTARY is not set
150# CONFIG_PREEMPT is not set
151CONFIG_PREEMPT_BKL=y
152CONFIG_BINFMT_ELF=y
153CONFIG_BINFMT_MISC=y
154# CONFIG_KEXEC is not set
155CONFIG_IRQ_ALL_CPUS=y
156CONFIG_ARCH_FLATMEM_ENABLE=y
157CONFIG_SELECT_MEMORY_MODEL=y
158CONFIG_FLATMEM_MANUAL=y
159# CONFIG_DISCONTIGMEM_MANUAL is not set
160# CONFIG_SPARSEMEM_MANUAL is not set
161CONFIG_FLATMEM=y
162CONFIG_FLAT_NODE_MEM_MAP=y
163# CONFIG_SPARSEMEM_STATIC is not set
164CONFIG_SPLIT_PTLOCK_CPUS=4
165CONFIG_PROC_DEVICETREE=y
166# CONFIG_CMDLINE_BOOL is not set
167# CONFIG_PM is not set
168CONFIG_SECCOMP=y
169CONFIG_ISA_DMA_API=y
170
171#
172# Bus options
173#
174CONFIG_ISA=y
175CONFIG_GENERIC_ISA_DMA=y
176CONFIG_PPC_I8259=y
177CONFIG_PPC_INDIRECT_PCI=y
178CONFIG_PCI=y
179CONFIG_PCI_DOMAINS=y
180# CONFIG_PCIEPORTBUS is not set
181# CONFIG_PCI_DEBUG is not set
182
183#
184# PCCARD (PCMCIA/CardBus) support
185#
186# CONFIG_PCCARD is not set
187
188#
189# PCI Hotplug Support
190#
191# CONFIG_HOTPLUG_PCI is not set
192
193#
194# Advanced setup
195#
196# CONFIG_ADVANCED_OPTIONS is not set
197
198#
199# Default settings for advanced configuration options are used
200#
201CONFIG_HIGHMEM_START=0xfe000000
202CONFIG_LOWMEM_SIZE=0x30000000
203CONFIG_KERNEL_START=0xc0000000
204CONFIG_TASK_SIZE=0x80000000
205CONFIG_BOOT_LOAD=0x00800000
206
207#
208# Networking
209#
210CONFIG_NET=y
211
212#
213# Networking options
214#
215# CONFIG_NETDEBUG is not set
216CONFIG_PACKET=y
217# CONFIG_PACKET_MMAP is not set
218CONFIG_UNIX=y
219# CONFIG_NET_KEY is not set
220CONFIG_INET=y
221CONFIG_IP_MULTICAST=y
222# CONFIG_IP_ADVANCED_ROUTER is not set
223CONFIG_IP_FIB_HASH=y
224# CONFIG_IP_PNP is not set
225# CONFIG_NET_IPIP is not set
226# CONFIG_NET_IPGRE is not set
227# CONFIG_IP_MROUTE is not set
228# CONFIG_ARPD is not set
229CONFIG_SYN_COOKIES=y
230# CONFIG_INET_AH is not set
231# CONFIG_INET_ESP is not set
232# CONFIG_INET_IPCOMP is not set
233# CONFIG_INET_XFRM_TUNNEL is not set
234# CONFIG_INET_TUNNEL is not set
235# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
236# CONFIG_INET_XFRM_MODE_TUNNEL is not set
237CONFIG_INET_DIAG=y
238CONFIG_INET_TCP_DIAG=y
239# CONFIG_TCP_CONG_ADVANCED is not set
240CONFIG_TCP_CONG_BIC=y
241
242#
243# IP: Virtual Server Configuration
244#
245# CONFIG_IP_VS is not set
246# CONFIG_IPV6 is not set
247# CONFIG_INET6_XFRM_TUNNEL is not set
248# CONFIG_INET6_TUNNEL is not set
249# CONFIG_NETWORK_SECMARK is not set
250CONFIG_NETFILTER=y
251# CONFIG_NETFILTER_DEBUG is not set
252
253#
254# Core Netfilter Configuration
255#
256# CONFIG_NETFILTER_NETLINK is not set
257# CONFIG_NETFILTER_XTABLES is not set
258
259#
260# IP: Netfilter Configuration
261#
262CONFIG_IP_NF_CONNTRACK=m
263# CONFIG_IP_NF_CT_ACCT is not set
264# CONFIG_IP_NF_CONNTRACK_MARK is not set
265# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
266# CONFIG_IP_NF_CT_PROTO_SCTP is not set
267CONFIG_IP_NF_FTP=m
268CONFIG_IP_NF_IRC=m
269# CONFIG_IP_NF_NETBIOS_NS is not set
270CONFIG_IP_NF_TFTP=m
271CONFIG_IP_NF_AMANDA=m
272# CONFIG_IP_NF_PPTP is not set
273# CONFIG_IP_NF_H323 is not set
274# CONFIG_IP_NF_SIP is not set
275# CONFIG_IP_NF_QUEUE is not set
276
277#
278# DCCP Configuration (EXPERIMENTAL)
279#
280# CONFIG_IP_DCCP is not set
281
282#
283# SCTP Configuration (EXPERIMENTAL)
284#
285# CONFIG_IP_SCTP is not set
286
287#
288# TIPC Configuration (EXPERIMENTAL)
289#
290# CONFIG_TIPC is not set
291# CONFIG_ATM is not set
292# CONFIG_BRIDGE is not set
293# CONFIG_VLAN_8021Q is not set
294# CONFIG_DECNET is not set
295# CONFIG_LLC2 is not set
296# CONFIG_IPX is not set
297# CONFIG_ATALK is not set
298# CONFIG_X25 is not set
299# CONFIG_LAPB is not set
300# CONFIG_NET_DIVERT is not set
301# CONFIG_ECONET is not set
302# CONFIG_WAN_ROUTER is not set
303
304#
305# QoS and/or fair queueing
306#
307# CONFIG_NET_SCHED is not set
308
309#
310# Network testing
311#
312# CONFIG_NET_PKTGEN is not set
313# CONFIG_HAMRADIO is not set
314# CONFIG_IRDA is not set
315# CONFIG_BT is not set
316# CONFIG_IEEE80211 is not set
317
318#
319# Device Drivers
320#
321
322#
323# Generic Driver Options
324#
325# CONFIG_STANDALONE is not set
326CONFIG_PREVENT_FIRMWARE_BUILD=y
327# CONFIG_FW_LOADER is not set
328# CONFIG_DEBUG_DRIVER is not set
329# CONFIG_SYS_HYPERVISOR is not set
330
331#
332# Connector - unified userspace <-> kernelspace linker
333#
334# CONFIG_CONNECTOR is not set
335
336#
337# Memory Technology Devices (MTD)
338#
339# CONFIG_MTD is not set
340
341#
342# Parallel port support
343#
344# CONFIG_PARPORT is not set
345
346#
347# Plug and Play support
348#
349# CONFIG_PNP is not set
350
351#
352# Block devices
353#
354CONFIG_BLK_DEV_FD=y
355# CONFIG_BLK_DEV_XD is not set
356# CONFIG_BLK_CPQ_DA is not set
357# CONFIG_BLK_CPQ_CISS_DA is not set
358# CONFIG_BLK_DEV_DAC960 is not set
359# CONFIG_BLK_DEV_UMEM is not set
360# CONFIG_BLK_DEV_COW_COMMON is not set
361CONFIG_BLK_DEV_LOOP=y
362# CONFIG_BLK_DEV_CRYPTOLOOP is not set
363# CONFIG_BLK_DEV_NBD is not set
364# CONFIG_BLK_DEV_SX8 is not set
365# CONFIG_BLK_DEV_UB is not set
366CONFIG_BLK_DEV_RAM=y
367CONFIG_BLK_DEV_RAM_COUNT=16
368CONFIG_BLK_DEV_RAM_SIZE=4096
369CONFIG_BLK_DEV_INITRD=y
370# CONFIG_CDROM_PKTCDVD is not set
371# CONFIG_ATA_OVER_ETH is not set
372
373#
374# ATA/ATAPI/MFM/RLL support
375#
376CONFIG_IDE=y
377CONFIG_BLK_DEV_IDE=y
378
379#
380# Please see Documentation/ide.txt for help/info on IDE drives
381#
382# CONFIG_BLK_DEV_IDE_SATA is not set
383CONFIG_BLK_DEV_IDEDISK=y
384CONFIG_IDEDISK_MULTI_MODE=y
385CONFIG_BLK_DEV_IDECD=y
386# CONFIG_BLK_DEV_IDETAPE is not set
387# CONFIG_BLK_DEV_IDEFLOPPY is not set
388# CONFIG_BLK_DEV_IDESCSI is not set
389# CONFIG_IDE_TASK_IOCTL is not set
390
391#
392# IDE chipset support/bugfixes
393#
394CONFIG_IDE_GENERIC=y
395CONFIG_BLK_DEV_IDEPCI=y
396CONFIG_IDEPCI_SHARE_IRQ=y
397# CONFIG_BLK_DEV_OFFBOARD is not set
398CONFIG_BLK_DEV_GENERIC=y
399# CONFIG_BLK_DEV_OPTI621 is not set
400CONFIG_BLK_DEV_SL82C105=y
401CONFIG_BLK_DEV_IDEDMA_PCI=y
402# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
403CONFIG_IDEDMA_PCI_AUTO=y
404# CONFIG_IDEDMA_ONLYDISK is not set
405# CONFIG_BLK_DEV_AEC62XX is not set
406# CONFIG_BLK_DEV_ALI15X3 is not set
407# CONFIG_BLK_DEV_AMD74XX is not set
408# CONFIG_BLK_DEV_CMD64X is not set
409# CONFIG_BLK_DEV_TRIFLEX is not set
410# CONFIG_BLK_DEV_CY82C693 is not set
411# CONFIG_BLK_DEV_CS5520 is not set
412# CONFIG_BLK_DEV_CS5530 is not set
413# CONFIG_BLK_DEV_HPT34X is not set
414# CONFIG_BLK_DEV_HPT366 is not set
415# CONFIG_BLK_DEV_SC1200 is not set
416# CONFIG_BLK_DEV_PIIX is not set
417# CONFIG_BLK_DEV_IT821X is not set
418# CONFIG_BLK_DEV_NS87415 is not set
419# CONFIG_BLK_DEV_PDC202XX_OLD is not set
420# CONFIG_BLK_DEV_PDC202XX_NEW is not set
421# CONFIG_BLK_DEV_SVWKS is not set
422# CONFIG_BLK_DEV_SIIMAGE is not set
423# CONFIG_BLK_DEV_SLC90E66 is not set
424# CONFIG_BLK_DEV_TRM290 is not set
425CONFIG_BLK_DEV_VIA82CXXX=y
426# CONFIG_IDE_ARM is not set
427# CONFIG_IDE_CHIPSETS is not set
428CONFIG_BLK_DEV_IDEDMA=y
429# CONFIG_IDEDMA_IVB is not set
430CONFIG_IDEDMA_AUTO=y
431# CONFIG_BLK_DEV_HD is not set
432
433#
434# SCSI device support
435#
436# CONFIG_RAID_ATTRS is not set
437CONFIG_SCSI=y
438CONFIG_SCSI_PROC_FS=y
439
440#
441# SCSI support type (disk, tape, CD-ROM)
442#
443CONFIG_BLK_DEV_SD=y
444CONFIG_CHR_DEV_ST=y
445# CONFIG_CHR_DEV_OSST is not set
446CONFIG_BLK_DEV_SR=y
447CONFIG_BLK_DEV_SR_VENDOR=y
448CONFIG_CHR_DEV_SG=y
449# CONFIG_CHR_DEV_SCH is not set
450
451#
452# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
453#
454# CONFIG_SCSI_MULTI_LUN is not set
455CONFIG_SCSI_CONSTANTS=y
456# CONFIG_SCSI_LOGGING is not set
457
458#
459# SCSI Transport Attributes
460#
461CONFIG_SCSI_SPI_ATTRS=y
462# CONFIG_SCSI_FC_ATTRS is not set
463# CONFIG_SCSI_ISCSI_ATTRS is not set
464# CONFIG_SCSI_SAS_ATTRS is not set
465
466#
467# SCSI low-level drivers
468#
469# CONFIG_ISCSI_TCP is not set
470# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
471# CONFIG_SCSI_3W_9XXX is not set
472# CONFIG_SCSI_7000FASST is not set
473# CONFIG_SCSI_ACARD is not set
474# CONFIG_SCSI_AHA152X is not set
475# CONFIG_SCSI_AHA1542 is not set
476# CONFIG_SCSI_AACRAID is not set
477# CONFIG_SCSI_AIC7XXX is not set
478# CONFIG_SCSI_AIC7XXX_OLD is not set
479# CONFIG_SCSI_AIC79XX is not set
480# CONFIG_SCSI_DPT_I2O is not set
481# CONFIG_SCSI_IN2000 is not set
482# CONFIG_MEGARAID_NEWGEN is not set
483# CONFIG_MEGARAID_LEGACY is not set
484# CONFIG_MEGARAID_SAS is not set
485# CONFIG_SCSI_SATA is not set
486# CONFIG_SCSI_HPTIOP is not set
487# CONFIG_SCSI_BUSLOGIC is not set
488# CONFIG_SCSI_DMX3191D is not set
489# CONFIG_SCSI_DTC3280 is not set
490# CONFIG_SCSI_EATA is not set
491# CONFIG_SCSI_FUTURE_DOMAIN is not set
492# CONFIG_SCSI_GDTH is not set
493# CONFIG_SCSI_GENERIC_NCR5380 is not set
494# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
495# CONFIG_SCSI_IPS is not set
496# CONFIG_SCSI_INITIO is not set
497# CONFIG_SCSI_INIA100 is not set
498# CONFIG_SCSI_NCR53C406A is not set
499CONFIG_SCSI_SYM53C8XX_2=y
500CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
501CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
502CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
503CONFIG_SCSI_SYM53C8XX_MMIO=y
504# CONFIG_SCSI_IPR is not set
505# CONFIG_SCSI_PAS16 is not set
506# CONFIG_SCSI_PSI240I is not set
507# CONFIG_SCSI_QLOGIC_FAS is not set
508# CONFIG_SCSI_QLOGIC_1280 is not set
509# CONFIG_SCSI_QLA_FC is not set
510# CONFIG_SCSI_LPFC is not set
511# CONFIG_SCSI_SYM53C416 is not set
512# CONFIG_SCSI_DC395x is not set
513# CONFIG_SCSI_DC390T is not set
514# CONFIG_SCSI_T128 is not set
515# CONFIG_SCSI_U14_34F is not set
516# CONFIG_SCSI_NSP32 is not set
517# CONFIG_SCSI_DEBUG is not set
518
519#
520# Old CD-ROM drivers (not SCSI, not IDE)
521#
522# CONFIG_CD_NO_IDESCSI is not set
523
524#
525# Multi-device support (RAID and LVM)
526#
527# CONFIG_MD is not set
528
529#
530# Fusion MPT device support
531#
532# CONFIG_FUSION is not set
533# CONFIG_FUSION_SPI is not set
534# CONFIG_FUSION_FC is not set
535# CONFIG_FUSION_SAS is not set
536
537#
538# IEEE 1394 (FireWire) support
539#
540# CONFIG_IEEE1394 is not set
541
542#
543# I2O device support
544#
545# CONFIG_I2O is not set
546
547#
548# Macintosh device drivers
549#
550# CONFIG_WINDFARM is not set
551
552#
553# Network device support
554#
555CONFIG_NETDEVICES=y
556# CONFIG_DUMMY is not set
557# CONFIG_BONDING is not set
558# CONFIG_EQUALIZER is not set
559# CONFIG_TUN is not set
560
561#
562# ARCnet devices
563#
564# CONFIG_ARCNET is not set
565
566#
567# PHY device support
568#
569# CONFIG_PHYLIB is not set
570
571#
572# Ethernet (10 or 100Mbit)
573#
574CONFIG_NET_ETHERNET=y
575CONFIG_MII=y
576# CONFIG_HAPPYMEAL is not set
577# CONFIG_SUNGEM is not set
578# CONFIG_CASSINI is not set
579# CONFIG_NET_VENDOR_3COM is not set
580# CONFIG_LANCE is not set
581# CONFIG_NET_VENDOR_SMC is not set
582# CONFIG_NET_VENDOR_RACAL is not set
583
584#
585# Tulip family network device support
586#
587CONFIG_NET_TULIP=y
588# CONFIG_DE2104X is not set
589# CONFIG_TULIP is not set
590CONFIG_DE4X5=y
591# CONFIG_WINBOND_840 is not set
592# CONFIG_DM9102 is not set
593# CONFIG_ULI526X is not set
594# CONFIG_AT1700 is not set
595# CONFIG_DEPCA is not set
596# CONFIG_HP100 is not set
597# CONFIG_NET_ISA is not set
598CONFIG_NET_PCI=y
599CONFIG_PCNET32=y
600# CONFIG_AMD8111_ETH is not set
601# CONFIG_ADAPTEC_STARFIRE is not set
602# CONFIG_AC3200 is not set
603# CONFIG_APRICOT is not set
604# CONFIG_B44 is not set
605# CONFIG_FORCEDETH is not set
606# CONFIG_CS89x0 is not set
607# CONFIG_DGRS is not set
608# CONFIG_EEPRO100 is not set
609# CONFIG_E100 is not set
610# CONFIG_FEALNX is not set
611# CONFIG_NATSEMI is not set
612# CONFIG_NE2K_PCI is not set
613CONFIG_8139CP=y
614CONFIG_8139TOO=y
615# CONFIG_8139TOO_PIO is not set
616# CONFIG_8139TOO_TUNE_TWISTER is not set
617# CONFIG_8139TOO_8129 is not set
618# CONFIG_8139_OLD_RX_RESET is not set
619# CONFIG_SIS900 is not set
620# CONFIG_EPIC100 is not set
621# CONFIG_SUNDANCE is not set
622# CONFIG_TLAN is not set
623CONFIG_VIA_RHINE=y
624# CONFIG_VIA_RHINE_MMIO is not set
625
626#
627# Ethernet (1000 Mbit)
628#
629# CONFIG_ACENIC is not set
630# CONFIG_DL2K is not set
631# CONFIG_E1000 is not set
632# CONFIG_NS83820 is not set
633# CONFIG_HAMACHI is not set
634# CONFIG_YELLOWFIN is not set
635# CONFIG_R8169 is not set
636# CONFIG_SIS190 is not set
637# CONFIG_SKGE is not set
638# CONFIG_SKY2 is not set
639# CONFIG_SK98LIN is not set
640# CONFIG_VIA_VELOCITY is not set
641# CONFIG_TIGON3 is not set
642# CONFIG_BNX2 is not set
643CONFIG_MV643XX_ETH=y
644# CONFIG_MV643XX_ETH_0 is not set
645# CONFIG_MV643XX_ETH_1 is not set
646# CONFIG_MV643XX_ETH_2 is not set
647
648#
649# Ethernet (10000 Mbit)
650#
651# CONFIG_CHELSIO_T1 is not set
652# CONFIG_IXGB is not set
653# CONFIG_S2IO is not set
654# CONFIG_MYRI10GE is not set
655
656#
657# Token Ring devices
658#
659# CONFIG_TR is not set
660
661#
662# Wireless LAN (non-hamradio)
663#
664# CONFIG_NET_RADIO is not set
665
666#
667# Wan interfaces
668#
669# CONFIG_WAN is not set
670# CONFIG_FDDI is not set
671# CONFIG_HIPPI is not set
672CONFIG_PPP=m
673CONFIG_PPP_MULTILINK=y
674CONFIG_PPP_FILTER=y
675CONFIG_PPP_ASYNC=m
676CONFIG_PPP_SYNC_TTY=m
677CONFIG_PPP_DEFLATE=m
678CONFIG_PPP_BSDCOMP=m
679CONFIG_PPP_MPPE=m
680CONFIG_PPPOE=m
681# CONFIG_SLIP is not set
682# CONFIG_NET_FC is not set
683# CONFIG_SHAPER is not set
684# CONFIG_NETCONSOLE is not set
685# CONFIG_NETPOLL is not set
686# CONFIG_NET_POLL_CONTROLLER is not set
687
688#
689# ISDN subsystem
690#
691# CONFIG_ISDN is not set
692
693#
694# Telephony Support
695#
696# CONFIG_PHONE is not set
697
698#
699# Input device support
700#
701CONFIG_INPUT=y
702
703#
704# Userland interfaces
705#
706CONFIG_INPUT_MOUSEDEV=y
707CONFIG_INPUT_MOUSEDEV_PSAUX=y
708CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
709CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
710# CONFIG_INPUT_JOYDEV is not set
711# CONFIG_INPUT_TSDEV is not set
712CONFIG_INPUT_EVDEV=y
713# CONFIG_INPUT_EVBUG is not set
714
715#
716# Input Device Drivers
717#
718CONFIG_INPUT_KEYBOARD=y
719CONFIG_KEYBOARD_ATKBD=y
720# CONFIG_KEYBOARD_SUNKBD is not set
721# CONFIG_KEYBOARD_LKKBD is not set
722# CONFIG_KEYBOARD_XTKBD is not set
723# CONFIG_KEYBOARD_NEWTON is not set
724CONFIG_INPUT_MOUSE=y
725CONFIG_MOUSE_PS2=y
726# CONFIG_MOUSE_SERIAL is not set
727# CONFIG_MOUSE_INPORT is not set
728# CONFIG_MOUSE_LOGIBM is not set
729# CONFIG_MOUSE_PC110PAD is not set
730# CONFIG_MOUSE_VSXXXAA is not set
731# CONFIG_INPUT_JOYSTICK is not set
732# CONFIG_INPUT_TOUCHSCREEN is not set
733CONFIG_INPUT_MISC=y
734# CONFIG_INPUT_PCSPKR is not set
735CONFIG_INPUT_UINPUT=y
736
737#
738# Hardware I/O ports
739#
740CONFIG_SERIO=y
741CONFIG_SERIO_I8042=y
742CONFIG_SERIO_SERPORT=y
743# CONFIG_SERIO_PCIPS2 is not set
744CONFIG_SERIO_LIBPS2=y
745# CONFIG_SERIO_RAW is not set
746# CONFIG_GAMEPORT is not set
747
748#
749# Character devices
750#
751CONFIG_VT=y
752CONFIG_VT_CONSOLE=y
753CONFIG_HW_CONSOLE=y
754# CONFIG_SERIAL_NONSTANDARD is not set
755
756#
757# Serial drivers
758#
759CONFIG_SERIAL_8250=y
760CONFIG_SERIAL_8250_CONSOLE=y
761CONFIG_SERIAL_8250_PCI=y
762CONFIG_SERIAL_8250_NR_UARTS=4
763CONFIG_SERIAL_8250_RUNTIME_UARTS=4
764# CONFIG_SERIAL_8250_EXTENDED is not set
765
766#
767# Non-8250 serial port support
768#
769CONFIG_SERIAL_CORE=y
770CONFIG_SERIAL_CORE_CONSOLE=y
771# CONFIG_SERIAL_JSM is not set
772CONFIG_UNIX98_PTYS=y
773CONFIG_LEGACY_PTYS=y
774CONFIG_LEGACY_PTY_COUNT=256
775# CONFIG_HVC_RTAS is not set
776
777#
778# IPMI
779#
780# CONFIG_IPMI_HANDLER is not set
781
782#
783# Watchdog Cards
784#
785# CONFIG_WATCHDOG is not set
786CONFIG_NVRAM=y
787CONFIG_GEN_RTC=y
788# CONFIG_GEN_RTC_X is not set
789# CONFIG_DTLK is not set
790# CONFIG_R3964 is not set
791# CONFIG_APPLICOM is not set
792
793#
794# Ftape, the floppy tape device driver
795#
796# CONFIG_AGP is not set
797# CONFIG_DRM is not set
798# CONFIG_RAW_DRIVER is not set
799
800#
801# TPM devices
802#
803# CONFIG_TCG_TPM is not set
804# CONFIG_TELCLOCK is not set
805
806#
807# I2C support
808#
809CONFIG_I2C=y
810# CONFIG_I2C_CHARDEV is not set
811
812#
813# I2C Algorithms
814#
815CONFIG_I2C_ALGOBIT=y
816# CONFIG_I2C_ALGOPCF is not set
817# CONFIG_I2C_ALGOPCA is not set
818
819#
820# I2C Hardware Bus support
821#
822# CONFIG_I2C_ALI1535 is not set
823# CONFIG_I2C_ALI1563 is not set
824# CONFIG_I2C_ALI15X3 is not set
825# CONFIG_I2C_AMD756 is not set
826# CONFIG_I2C_AMD8111 is not set
827# CONFIG_I2C_HYDRA is not set
828# CONFIG_I2C_I801 is not set
829# CONFIG_I2C_I810 is not set
830# CONFIG_I2C_PIIX4 is not set
831# CONFIG_I2C_MPC is not set
832# CONFIG_I2C_NFORCE2 is not set
833# CONFIG_I2C_OCORES is not set
834# CONFIG_I2C_PARPORT_LIGHT is not set
835# CONFIG_I2C_PROSAVAGE is not set
836# CONFIG_I2C_SAVAGE4 is not set
837# CONFIG_I2C_SIS5595 is not set
838# CONFIG_I2C_SIS630 is not set
839# CONFIG_I2C_SIS96X is not set
840# CONFIG_I2C_STUB is not set
841# CONFIG_I2C_VIA is not set
842# CONFIG_I2C_VIAPRO is not set
843# CONFIG_I2C_VOODOO3 is not set
844# CONFIG_I2C_PCA_ISA is not set
845
846#
847# Miscellaneous I2C Chip support
848#
849# CONFIG_SENSORS_DS1337 is not set
850# CONFIG_SENSORS_DS1374 is not set
851# CONFIG_SENSORS_EEPROM is not set
852# CONFIG_SENSORS_PCF8574 is not set
853# CONFIG_SENSORS_PCA9539 is not set
854# CONFIG_SENSORS_PCF8591 is not set
855# CONFIG_SENSORS_M41T00 is not set
856# CONFIG_SENSORS_MAX6875 is not set
857# CONFIG_I2C_DEBUG_CORE is not set
858# CONFIG_I2C_DEBUG_ALGO is not set
859# CONFIG_I2C_DEBUG_BUS is not set
860# CONFIG_I2C_DEBUG_CHIP is not set
861
862#
863# SPI support
864#
865# CONFIG_SPI is not set
866# CONFIG_SPI_MASTER is not set
867
868#
869# Dallas's 1-wire bus
870#
871
872#
873# Hardware Monitoring support
874#
875# CONFIG_HWMON is not set
876# CONFIG_HWMON_VID is not set
877
878#
879# Misc devices
880#
881
882#
883# Multimedia devices
884#
885# CONFIG_VIDEO_DEV is not set
886CONFIG_VIDEO_V4L2=y
887
888#
889# Digital Video Broadcasting Devices
890#
891# CONFIG_DVB is not set
892# CONFIG_USB_DABUSB is not set
893
894#
895# Graphics support
896#
897CONFIG_FB=y
898CONFIG_FB_CFB_FILLRECT=y
899CONFIG_FB_CFB_COPYAREA=y
900CONFIG_FB_CFB_IMAGEBLIT=y
901CONFIG_FB_MACMODES=y
902CONFIG_FB_FIRMWARE_EDID=y
903# CONFIG_FB_BACKLIGHT is not set
904CONFIG_FB_MODE_HELPERS=y
905CONFIG_FB_TILEBLITTING=y
906# CONFIG_FB_CIRRUS is not set
907# CONFIG_FB_PM2 is not set
908# CONFIG_FB_CYBER2000 is not set
909CONFIG_FB_OF=y
910# CONFIG_FB_CT65550 is not set
911# CONFIG_FB_ASILIANT is not set
912# CONFIG_FB_IMSTT is not set
913# CONFIG_FB_VGA16 is not set
914# CONFIG_FB_S1D13XXX is not set
915# CONFIG_FB_NVIDIA is not set
916# CONFIG_FB_RIVA is not set
917CONFIG_FB_MATROX=y
918CONFIG_FB_MATROX_MILLENIUM=y
919CONFIG_FB_MATROX_MYSTIQUE=y
920CONFIG_FB_MATROX_G=y
921# CONFIG_FB_MATROX_I2C is not set
922# CONFIG_FB_MATROX_MULTIHEAD is not set
923CONFIG_FB_RADEON=y
924CONFIG_FB_RADEON_I2C=y
925# CONFIG_FB_RADEON_DEBUG is not set
926# CONFIG_FB_ATY128 is not set
927CONFIG_FB_ATY=y
928CONFIG_FB_ATY_CT=y
929# CONFIG_FB_ATY_GENERIC_LCD is not set
930CONFIG_FB_ATY_GX=y
931# CONFIG_FB_SAVAGE is not set
932# CONFIG_FB_SIS is not set
933# CONFIG_FB_NEOMAGIC is not set
934# CONFIG_FB_KYRO is not set
935CONFIG_FB_3DFX=y
936# CONFIG_FB_3DFX_ACCEL is not set
937# CONFIG_FB_VOODOO1 is not set
938# CONFIG_FB_TRIDENT is not set
939# CONFIG_FB_VIRTUAL is not set
940
941#
942# Console display driver support
943#
944CONFIG_VGA_CONSOLE=y
945# CONFIG_VGACON_SOFT_SCROLLBACK is not set
946# CONFIG_MDA_CONSOLE is not set
947CONFIG_DUMMY_CONSOLE=y
948CONFIG_FRAMEBUFFER_CONSOLE=y
949# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
950# CONFIG_FONTS is not set
951CONFIG_FONT_8x8=y
952CONFIG_FONT_8x16=y
953
954#
955# Logo configuration
956#
957CONFIG_LOGO=y
958CONFIG_LOGO_LINUX_MONO=y
959CONFIG_LOGO_LINUX_VGA16=y
960CONFIG_LOGO_LINUX_CLUT224=y
961# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
962
963#
964# Sound
965#
966# CONFIG_SOUND is not set
967
968#
969# USB support
970#
971CONFIG_USB_ARCH_HAS_HCD=y
972CONFIG_USB_ARCH_HAS_OHCI=y
973CONFIG_USB_ARCH_HAS_EHCI=y
974CONFIG_USB=y
975# CONFIG_USB_DEBUG is not set
976
977#
978# Miscellaneous USB options
979#
980CONFIG_USB_DEVICEFS=y
981# CONFIG_USB_BANDWIDTH is not set
982# CONFIG_USB_DYNAMIC_MINORS is not set
983# CONFIG_USB_OTG is not set
984
985#
986# USB Host Controller Drivers
987#
988CONFIG_USB_EHCI_HCD=m
989# CONFIG_USB_EHCI_SPLIT_ISO is not set
990# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
991# CONFIG_USB_EHCI_TT_NEWSCHED is not set
992# CONFIG_USB_ISP116X_HCD is not set
993CONFIG_USB_OHCI_HCD=y
994# CONFIG_USB_OHCI_BIG_ENDIAN is not set
995CONFIG_USB_OHCI_LITTLE_ENDIAN=y
996CONFIG_USB_UHCI_HCD=y
997# CONFIG_USB_SL811_HCD is not set
998
999#
1000# USB Device Class drivers
1001#
1002# CONFIG_USB_ACM is not set
1003# CONFIG_USB_PRINTER is not set
1004
1005#
1006# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1007#
1008
1009#
1010# may also be needed; see USB_STORAGE Help for more information
1011#
1012CONFIG_USB_STORAGE=m
1013# CONFIG_USB_STORAGE_DEBUG is not set
1014# CONFIG_USB_STORAGE_DATAFAB is not set
1015# CONFIG_USB_STORAGE_FREECOM is not set
1016# CONFIG_USB_STORAGE_ISD200 is not set
1017# CONFIG_USB_STORAGE_DPCM is not set
1018# CONFIG_USB_STORAGE_USBAT is not set
1019# CONFIG_USB_STORAGE_SDDR09 is not set
1020# CONFIG_USB_STORAGE_SDDR55 is not set
1021# CONFIG_USB_STORAGE_JUMPSHOT is not set
1022# CONFIG_USB_STORAGE_ALAUDA is not set
1023# CONFIG_USB_STORAGE_ONETOUCH is not set
1024# CONFIG_USB_LIBUSUAL is not set
1025
1026#
1027# USB Input Devices
1028#
1029CONFIG_USB_HID=y
1030CONFIG_USB_HIDINPUT=y
1031# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1032# CONFIG_HID_FF is not set
1033# CONFIG_USB_HIDDEV is not set
1034# CONFIG_USB_AIPTEK is not set
1035# CONFIG_USB_WACOM is not set
1036# CONFIG_USB_ACECAD is not set
1037# CONFIG_USB_KBTAB is not set
1038# CONFIG_USB_POWERMATE is not set
1039# CONFIG_USB_TOUCHSCREEN is not set
1040# CONFIG_USB_YEALINK is not set
1041# CONFIG_USB_XPAD is not set
1042# CONFIG_USB_ATI_REMOTE is not set
1043# CONFIG_USB_ATI_REMOTE2 is not set
1044# CONFIG_USB_KEYSPAN_REMOTE is not set
1045# CONFIG_USB_APPLETOUCH is not set
1046
1047#
1048# USB Imaging devices
1049#
1050# CONFIG_USB_MDC800 is not set
1051# CONFIG_USB_MICROTEK is not set
1052
1053#
1054# USB Network Adapters
1055#
1056# CONFIG_USB_CATC is not set
1057# CONFIG_USB_KAWETH is not set
1058# CONFIG_USB_PEGASUS is not set
1059# CONFIG_USB_RTL8150 is not set
1060# CONFIG_USB_USBNET is not set
1061CONFIG_USB_MON=y
1062
1063#
1064# USB port drivers
1065#
1066
1067#
1068# USB Serial Converter support
1069#
1070# CONFIG_USB_SERIAL is not set
1071
1072#
1073# USB Miscellaneous drivers
1074#
1075# CONFIG_USB_EMI62 is not set
1076# CONFIG_USB_EMI26 is not set
1077# CONFIG_USB_AUERSWALD is not set
1078# CONFIG_USB_RIO500 is not set
1079# CONFIG_USB_LEGOTOWER is not set
1080# CONFIG_USB_LCD is not set
1081# CONFIG_USB_LED is not set
1082# CONFIG_USB_CY7C63 is not set
1083# CONFIG_USB_CYTHERM is not set
1084# CONFIG_USB_PHIDGETKIT is not set
1085# CONFIG_USB_PHIDGETSERVO is not set
1086# CONFIG_USB_IDMOUSE is not set
1087# CONFIG_USB_APPLEDISPLAY is not set
1088# CONFIG_USB_SISUSBVGA is not set
1089# CONFIG_USB_LD is not set
1090# CONFIG_USB_TEST is not set
1091
1092#
1093# USB DSL modem support
1094#
1095
1096#
1097# USB Gadget Support
1098#
1099# CONFIG_USB_GADGET is not set
1100
1101#
1102# MMC/SD Card support
1103#
1104# CONFIG_MMC is not set
1105
1106#
1107# LED devices
1108#
1109# CONFIG_NEW_LEDS is not set
1110
1111#
1112# LED drivers
1113#
1114
1115#
1116# LED Triggers
1117#
1118
1119#
1120# InfiniBand support
1121#
1122# CONFIG_INFINIBAND is not set
1123
1124#
1125# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1126#
1127
1128#
1129# Real Time Clock
1130#
1131# CONFIG_RTC_CLASS is not set
1132
1133#
1134# DMA Engine support
1135#
1136# CONFIG_DMA_ENGINE is not set
1137
1138#
1139# DMA Clients
1140#
1141
1142#
1143# DMA Devices
1144#
1145
1146#
1147# File systems
1148#
1149CONFIG_EXT2_FS=y
1150# CONFIG_EXT2_FS_XATTR is not set
1151# CONFIG_EXT2_FS_XIP is not set
1152CONFIG_EXT3_FS=y
1153CONFIG_EXT3_FS_XATTR=y
1154# CONFIG_EXT3_FS_POSIX_ACL is not set
1155# CONFIG_EXT3_FS_SECURITY is not set
1156CONFIG_JBD=y
1157# CONFIG_JBD_DEBUG is not set
1158CONFIG_FS_MBCACHE=y
1159# CONFIG_REISERFS_FS is not set
1160# CONFIG_JFS_FS is not set
1161# CONFIG_FS_POSIX_ACL is not set
1162# CONFIG_XFS_FS is not set
1163# CONFIG_OCFS2_FS is not set
1164# CONFIG_MINIX_FS is not set
1165# CONFIG_ROMFS_FS is not set
1166CONFIG_INOTIFY=y
1167CONFIG_INOTIFY_USER=y
1168# CONFIG_QUOTA is not set
1169CONFIG_DNOTIFY=y
1170# CONFIG_AUTOFS_FS is not set
1171# CONFIG_AUTOFS4_FS is not set
1172# CONFIG_FUSE_FS is not set
1173
1174#
1175# CD-ROM/DVD Filesystems
1176#
1177CONFIG_ISO9660_FS=y
1178# CONFIG_JOLIET is not set
1179# CONFIG_ZISOFS is not set
1180# CONFIG_UDF_FS is not set
1181
1182#
1183# DOS/FAT/NT Filesystems
1184#
1185CONFIG_FAT_FS=m
1186CONFIG_MSDOS_FS=m
1187CONFIG_VFAT_FS=m
1188CONFIG_FAT_DEFAULT_CODEPAGE=437
1189CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1190# CONFIG_NTFS_FS is not set
1191
1192#
1193# Pseudo filesystems
1194#
1195CONFIG_PROC_FS=y
1196CONFIG_PROC_KCORE=y
1197CONFIG_SYSFS=y
1198CONFIG_TMPFS=y
1199# CONFIG_HUGETLB_PAGE is not set
1200CONFIG_RAMFS=y
1201# CONFIG_CONFIGFS_FS is not set
1202
1203#
1204# Miscellaneous filesystems
1205#
1206# CONFIG_ADFS_FS is not set
1207# CONFIG_AFFS_FS is not set
1208# CONFIG_HFS_FS is not set
1209# CONFIG_HFSPLUS_FS is not set
1210# CONFIG_BEFS_FS is not set
1211# CONFIG_BFS_FS is not set
1212# CONFIG_EFS_FS is not set
1213# CONFIG_CRAMFS is not set
1214# CONFIG_VXFS_FS is not set
1215# CONFIG_HPFS_FS is not set
1216# CONFIG_QNX4FS_FS is not set
1217# CONFIG_SYSV_FS is not set
1218# CONFIG_UFS_FS is not set
1219
1220#
1221# Network File Systems
1222#
1223# CONFIG_NFS_FS is not set
1224# CONFIG_NFSD is not set
1225# CONFIG_SMB_FS is not set
1226# CONFIG_CIFS is not set
1227# CONFIG_NCP_FS is not set
1228# CONFIG_CODA_FS is not set
1229# CONFIG_AFS_FS is not set
1230# CONFIG_9P_FS is not set
1231
1232#
1233# Partition Types
1234#
1235CONFIG_PARTITION_ADVANCED=y
1236# CONFIG_ACORN_PARTITION is not set
1237# CONFIG_OSF_PARTITION is not set
1238# CONFIG_AMIGA_PARTITION is not set
1239# CONFIG_ATARI_PARTITION is not set
1240CONFIG_MAC_PARTITION=y
1241CONFIG_MSDOS_PARTITION=y
1242# CONFIG_BSD_DISKLABEL is not set
1243# CONFIG_MINIX_SUBPARTITION is not set
1244# CONFIG_SOLARIS_X86_PARTITION is not set
1245# CONFIG_UNIXWARE_DISKLABEL is not set
1246# CONFIG_LDM_PARTITION is not set
1247# CONFIG_SGI_PARTITION is not set
1248# CONFIG_ULTRIX_PARTITION is not set
1249# CONFIG_SUN_PARTITION is not set
1250# CONFIG_KARMA_PARTITION is not set
1251# CONFIG_EFI_PARTITION is not set
1252
1253#
1254# Native Language Support
1255#
1256CONFIG_NLS=y
1257CONFIG_NLS_DEFAULT="iso8859-1"
1258# CONFIG_NLS_CODEPAGE_437 is not set
1259# CONFIG_NLS_CODEPAGE_737 is not set
1260# CONFIG_NLS_CODEPAGE_775 is not set
1261# CONFIG_NLS_CODEPAGE_850 is not set
1262# CONFIG_NLS_CODEPAGE_852 is not set
1263# CONFIG_NLS_CODEPAGE_855 is not set
1264# CONFIG_NLS_CODEPAGE_857 is not set
1265# CONFIG_NLS_CODEPAGE_860 is not set
1266# CONFIG_NLS_CODEPAGE_861 is not set
1267# CONFIG_NLS_CODEPAGE_862 is not set
1268# CONFIG_NLS_CODEPAGE_863 is not set
1269# CONFIG_NLS_CODEPAGE_864 is not set
1270# CONFIG_NLS_CODEPAGE_865 is not set
1271# CONFIG_NLS_CODEPAGE_866 is not set
1272# CONFIG_NLS_CODEPAGE_869 is not set
1273# CONFIG_NLS_CODEPAGE_936 is not set
1274# CONFIG_NLS_CODEPAGE_950 is not set
1275# CONFIG_NLS_CODEPAGE_932 is not set
1276# CONFIG_NLS_CODEPAGE_949 is not set
1277# CONFIG_NLS_CODEPAGE_874 is not set
1278# CONFIG_NLS_ISO8859_8 is not set
1279# CONFIG_NLS_CODEPAGE_1250 is not set
1280# CONFIG_NLS_CODEPAGE_1251 is not set
1281CONFIG_NLS_ASCII=y
1282CONFIG_NLS_ISO8859_1=m
1283# CONFIG_NLS_ISO8859_2 is not set
1284# CONFIG_NLS_ISO8859_3 is not set
1285# CONFIG_NLS_ISO8859_4 is not set
1286# CONFIG_NLS_ISO8859_5 is not set
1287# CONFIG_NLS_ISO8859_6 is not set
1288# CONFIG_NLS_ISO8859_7 is not set
1289# CONFIG_NLS_ISO8859_9 is not set
1290# CONFIG_NLS_ISO8859_13 is not set
1291# CONFIG_NLS_ISO8859_14 is not set
1292# CONFIG_NLS_ISO8859_15 is not set
1293# CONFIG_NLS_KOI8_R is not set
1294# CONFIG_NLS_KOI8_U is not set
1295# CONFIG_NLS_UTF8 is not set
1296
1297#
1298# Library routines
1299#
1300CONFIG_CRC_CCITT=m
1301# CONFIG_CRC16 is not set
1302CONFIG_CRC32=y
1303# CONFIG_LIBCRC32C is not set
1304CONFIG_ZLIB_INFLATE=m
1305CONFIG_ZLIB_DEFLATE=m
1306CONFIG_TEXTSEARCH=y
1307CONFIG_TEXTSEARCH_KMP=m
1308
1309#
1310# Instrumentation Support
1311#
1312# CONFIG_PROFILING is not set
1313
1314#
1315# Kernel hacking
1316#
1317# CONFIG_PRINTK_TIME is not set
1318CONFIG_MAGIC_SYSRQ=y
1319CONFIG_DEBUG_KERNEL=y
1320CONFIG_LOG_BUF_SHIFT=15
1321CONFIG_DETECT_SOFTLOCKUP=y
1322# CONFIG_SCHEDSTATS is not set
1323# CONFIG_DEBUG_SLAB is not set
1324CONFIG_DEBUG_MUTEXES=y
1325# CONFIG_DEBUG_SPINLOCK is not set
1326CONFIG_DEBUG_SPINLOCK_SLEEP=y
1327# CONFIG_DEBUG_KOBJECT is not set
1328# CONFIG_DEBUG_HIGHMEM is not set
1329# CONFIG_DEBUG_INFO is not set
1330# CONFIG_DEBUG_FS is not set
1331# CONFIG_DEBUG_VM is not set
1332CONFIG_FORCED_INLINING=y
1333# CONFIG_RCU_TORTURE_TEST is not set
1334CONFIG_DEBUGGER=y
1335CONFIG_XMON=y
1336CONFIG_XMON_DEFAULT=y
1337# CONFIG_BDI_SWITCH is not set
1338# CONFIG_BOOTX_TEXT is not set
1339# CONFIG_PPC_EARLY_DEBUG is not set
1340
1341#
1342# Security options
1343#
1344# CONFIG_KEYS is not set
1345# CONFIG_SECURITY is not set
1346
1347#
1348# Cryptographic options
1349#
1350CONFIG_CRYPTO=y
1351# CONFIG_CRYPTO_HMAC is not set
1352# CONFIG_CRYPTO_NULL is not set
1353# CONFIG_CRYPTO_MD4 is not set
1354# CONFIG_CRYPTO_MD5 is not set
1355CONFIG_CRYPTO_SHA1=m
1356# CONFIG_CRYPTO_SHA256 is not set
1357# CONFIG_CRYPTO_SHA512 is not set
1358# CONFIG_CRYPTO_WP512 is not set
1359# CONFIG_CRYPTO_TGR192 is not set
1360# CONFIG_CRYPTO_DES is not set
1361# CONFIG_CRYPTO_BLOWFISH is not set
1362# CONFIG_CRYPTO_TWOFISH is not set
1363# CONFIG_CRYPTO_SERPENT is not set
1364# CONFIG_CRYPTO_AES is not set
1365# CONFIG_CRYPTO_CAST5 is not set
1366# CONFIG_CRYPTO_CAST6 is not set
1367# CONFIG_CRYPTO_TEA is not set
1368CONFIG_CRYPTO_ARC4=m
1369# CONFIG_CRYPTO_KHAZAD is not set
1370# CONFIG_CRYPTO_ANUBIS is not set
1371# CONFIG_CRYPTO_DEFLATE is not set
1372# CONFIG_CRYPTO_MICHAEL_MIC is not set
1373# CONFIG_CRYPTO_CRC32C is not set
1374# CONFIG_CRYPTO_TEST is not set
1375
1376#
1377# Hardware crypto devices
1378#
diff --git a/arch/powerpc/configs/mpc834x_itx_defconfig b/arch/powerpc/configs/mpc834x_itx_defconfig
new file mode 100644
index 000000000000..fc2d9789adc8
--- /dev/null
+++ b/arch/powerpc/configs/mpc834x_itx_defconfig
@@ -0,0 +1,1336 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.17
4# Fri Jun 30 17:53:25 2006
5#
6# CONFIG_PPC64 is not set
7CONFIG_PPC32=y
8CONFIG_PPC_MERGE=y
9CONFIG_MMU=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_IRQ_PER_CPU=y
12CONFIG_RWSEM_XCHGADD_ALGORITHM=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_CALIBRATE_DELAY=y
15CONFIG_GENERIC_FIND_NEXT_BIT=y
16CONFIG_PPC=y
17CONFIG_EARLY_PRINTK=y
18CONFIG_GENERIC_NVRAM=y
19CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
20CONFIG_ARCH_MAY_HAVE_PC_FDC=y
21CONFIG_PPC_OF=y
22CONFIG_PPC_UDBG_16550=y
23# CONFIG_GENERIC_TBSYNC is not set
24CONFIG_DEFAULT_UIMAGE=y
25
26#
27# Processor support
28#
29# CONFIG_CLASSIC32 is not set
30# CONFIG_PPC_52xx is not set
31# CONFIG_PPC_82xx is not set
32CONFIG_PPC_83xx=y
33# CONFIG_PPC_85xx is not set
34# CONFIG_PPC_86xx is not set
35# CONFIG_40x is not set
36# CONFIG_44x is not set
37# CONFIG_8xx is not set
38# CONFIG_E200 is not set
39CONFIG_6xx=y
40CONFIG_83xx=y
41CONFIG_PPC_FPU=y
42CONFIG_PPC_STD_MMU=y
43CONFIG_PPC_STD_MMU_32=y
44# CONFIG_SMP is not set
45CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
46
47#
48# Code maturity level options
49#
50CONFIG_EXPERIMENTAL=y
51CONFIG_BROKEN_ON_SMP=y
52CONFIG_INIT_ENV_ARG_LIMIT=32
53
54#
55# General setup
56#
57CONFIG_LOCALVERSION=""
58CONFIG_LOCALVERSION_AUTO=y
59CONFIG_SWAP=y
60CONFIG_SYSVIPC=y
61# CONFIG_POSIX_MQUEUE is not set
62# CONFIG_BSD_PROCESS_ACCT is not set
63CONFIG_SYSCTL=y
64# CONFIG_AUDIT is not set
65# CONFIG_IKCONFIG is not set
66# CONFIG_RELAY is not set
67CONFIG_INITRAMFS_SOURCE=""
68# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
69CONFIG_EMBEDDED=y
70# CONFIG_KALLSYMS is not set
71CONFIG_HOTPLUG=y
72CONFIG_PRINTK=y
73CONFIG_BUG=y
74CONFIG_ELF_CORE=y
75CONFIG_BASE_FULL=y
76CONFIG_RT_MUTEXES=y
77CONFIG_FUTEX=y
78# CONFIG_EPOLL is not set
79CONFIG_SHMEM=y
80CONFIG_SLAB=y
81# CONFIG_TINY_SHMEM is not set
82CONFIG_BASE_SMALL=0
83# CONFIG_SLOB is not set
84
85#
86# Loadable module support
87#
88CONFIG_MODULES=y
89CONFIG_MODULE_UNLOAD=y
90# CONFIG_MODULE_FORCE_UNLOAD is not set
91# CONFIG_MODVERSIONS is not set
92# CONFIG_MODULE_SRCVERSION_ALL is not set
93# CONFIG_KMOD is not set
94
95#
96# Block layer
97#
98# CONFIG_LBD is not set
99# CONFIG_BLK_DEV_IO_TRACE is not set
100# CONFIG_LSF is not set
101
102#
103# IO Schedulers
104#
105CONFIG_IOSCHED_NOOP=y
106CONFIG_IOSCHED_AS=y
107CONFIG_IOSCHED_DEADLINE=y
108CONFIG_IOSCHED_CFQ=y
109CONFIG_DEFAULT_AS=y
110# CONFIG_DEFAULT_DEADLINE is not set
111# CONFIG_DEFAULT_CFQ is not set
112# CONFIG_DEFAULT_NOOP is not set
113CONFIG_DEFAULT_IOSCHED="anticipatory"
114CONFIG_PPC_GEN550=y
115# CONFIG_WANT_EARLY_SERIAL is not set
116
117#
118# Platform support
119#
120# CONFIG_MPC834x_SYS is not set
121CONFIG_MPC834x_ITX=y
122CONFIG_MPC834x=y
123
124#
125# Kernel options
126#
127# CONFIG_HIGHMEM is not set
128# CONFIG_HZ_100 is not set
129CONFIG_HZ_250=y
130# CONFIG_HZ_1000 is not set
131CONFIG_HZ=250
132CONFIG_PREEMPT_NONE=y
133# CONFIG_PREEMPT_VOLUNTARY is not set
134# CONFIG_PREEMPT is not set
135CONFIG_BINFMT_ELF=y
136# CONFIG_BINFMT_MISC is not set
137CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
138CONFIG_ARCH_FLATMEM_ENABLE=y
139CONFIG_SELECT_MEMORY_MODEL=y
140CONFIG_FLATMEM_MANUAL=y
141# CONFIG_DISCONTIGMEM_MANUAL is not set
142# CONFIG_SPARSEMEM_MANUAL is not set
143CONFIG_FLATMEM=y
144CONFIG_FLAT_NODE_MEM_MAP=y
145# CONFIG_SPARSEMEM_STATIC is not set
146CONFIG_SPLIT_PTLOCK_CPUS=4
147# CONFIG_RESOURCES_64BIT is not set
148CONFIG_PROC_DEVICETREE=y
149# CONFIG_CMDLINE_BOOL is not set
150# CONFIG_PM is not set
151# CONFIG_SOFTWARE_SUSPEND is not set
152CONFIG_SECCOMP=y
153CONFIG_ISA_DMA_API=y
154
155#
156# Bus options
157#
158CONFIG_GENERIC_ISA_DMA=y
159# CONFIG_PPC_I8259 is not set
160CONFIG_PPC_INDIRECT_PCI=y
161CONFIG_FSL_SOC=y
162CONFIG_PCI=y
163CONFIG_PCI_DOMAINS=y
164# CONFIG_PCIEPORTBUS is not set
165# CONFIG_PCI_DEBUG is not set
166
167#
168# PCCARD (PCMCIA/CardBus) support
169#
170# CONFIG_PCCARD is not set
171
172#
173# PCI Hotplug Support
174#
175# CONFIG_HOTPLUG_PCI is not set
176
177#
178# Advanced setup
179#
180# CONFIG_ADVANCED_OPTIONS is not set
181
182#
183# Default settings for advanced configuration options are used
184#
185CONFIG_HIGHMEM_START=0xfe000000
186CONFIG_LOWMEM_SIZE=0x30000000
187CONFIG_KERNEL_START=0xc0000000
188CONFIG_TASK_SIZE=0x80000000
189CONFIG_BOOT_LOAD=0x00800000
190
191#
192# Networking
193#
194CONFIG_NET=y
195
196#
197# Networking options
198#
199# CONFIG_NETDEBUG is not set
200CONFIG_PACKET=y
201# CONFIG_PACKET_MMAP is not set
202CONFIG_UNIX=y
203CONFIG_XFRM=y
204# CONFIG_XFRM_USER is not set
205# CONFIG_NET_KEY is not set
206CONFIG_INET=y
207CONFIG_IP_MULTICAST=y
208# CONFIG_IP_ADVANCED_ROUTER is not set
209CONFIG_IP_FIB_HASH=y
210CONFIG_IP_PNP=y
211CONFIG_IP_PNP_DHCP=y
212CONFIG_IP_PNP_BOOTP=y
213# CONFIG_IP_PNP_RARP is not set
214# CONFIG_NET_IPIP is not set
215# CONFIG_NET_IPGRE is not set
216# CONFIG_IP_MROUTE is not set
217# CONFIG_ARPD is not set
218CONFIG_SYN_COOKIES=y
219# CONFIG_INET_AH is not set
220# CONFIG_INET_ESP is not set
221# CONFIG_INET_IPCOMP is not set
222# CONFIG_INET_XFRM_TUNNEL is not set
223# CONFIG_INET_TUNNEL is not set
224CONFIG_INET_XFRM_MODE_TRANSPORT=y
225CONFIG_INET_XFRM_MODE_TUNNEL=y
226CONFIG_INET_DIAG=y
227CONFIG_INET_TCP_DIAG=y
228# CONFIG_TCP_CONG_ADVANCED is not set
229CONFIG_TCP_CONG_BIC=y
230# CONFIG_IPV6 is not set
231# CONFIG_INET6_XFRM_TUNNEL is not set
232# CONFIG_INET6_TUNNEL is not set
233# CONFIG_NETWORK_SECMARK is not set
234# CONFIG_NETFILTER is not set
235
236#
237# DCCP Configuration (EXPERIMENTAL)
238#
239# CONFIG_IP_DCCP is not set
240
241#
242# SCTP Configuration (EXPERIMENTAL)
243#
244# CONFIG_IP_SCTP is not set
245
246#
247# TIPC Configuration (EXPERIMENTAL)
248#
249# CONFIG_TIPC is not set
250# CONFIG_ATM is not set
251# CONFIG_BRIDGE is not set
252# CONFIG_VLAN_8021Q is not set
253# CONFIG_DECNET is not set
254# CONFIG_LLC2 is not set
255# CONFIG_IPX is not set
256# CONFIG_ATALK is not set
257# CONFIG_X25 is not set
258# CONFIG_LAPB is not set
259# CONFIG_NET_DIVERT is not set
260# CONFIG_ECONET is not set
261# CONFIG_WAN_ROUTER is not set
262
263#
264# QoS and/or fair queueing
265#
266# CONFIG_NET_SCHED is not set
267
268#
269# Network testing
270#
271# CONFIG_NET_PKTGEN is not set
272# CONFIG_HAMRADIO is not set
273# CONFIG_IRDA is not set
274# CONFIG_BT is not set
275# CONFIG_IEEE80211 is not set
276
277#
278# Device Drivers
279#
280
281#
282# Generic Driver Options
283#
284CONFIG_STANDALONE=y
285CONFIG_PREVENT_FIRMWARE_BUILD=y
286# CONFIG_FW_LOADER is not set
287# CONFIG_DEBUG_DRIVER is not set
288# CONFIG_SYS_HYPERVISOR is not set
289
290#
291# Connector - unified userspace <-> kernelspace linker
292#
293# CONFIG_CONNECTOR is not set
294
295#
296# Memory Technology Devices (MTD)
297#
298CONFIG_MTD=y
299# CONFIG_MTD_DEBUG is not set
300# CONFIG_MTD_CONCAT is not set
301# CONFIG_MTD_PARTITIONS is not set
302
303#
304# User Modules And Translation Layers
305#
306CONFIG_MTD_CHAR=y
307# CONFIG_MTD_BLOCK is not set
308# CONFIG_MTD_BLOCK_RO is not set
309# CONFIG_FTL is not set
310# CONFIG_NFTL is not set
311# CONFIG_INFTL is not set
312# CONFIG_RFD_FTL is not set
313
314#
315# RAM/ROM/Flash chip drivers
316#
317CONFIG_MTD_CFI=y
318# CONFIG_MTD_JEDECPROBE is not set
319CONFIG_MTD_GEN_PROBE=y
320# CONFIG_MTD_CFI_ADV_OPTIONS is not set
321CONFIG_MTD_MAP_BANK_WIDTH_1=y
322CONFIG_MTD_MAP_BANK_WIDTH_2=y
323CONFIG_MTD_MAP_BANK_WIDTH_4=y
324# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
325# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
326# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
327CONFIG_MTD_CFI_I1=y
328CONFIG_MTD_CFI_I2=y
329# CONFIG_MTD_CFI_I4 is not set
330# CONFIG_MTD_CFI_I8 is not set
331# CONFIG_MTD_CFI_INTELEXT is not set
332CONFIG_MTD_CFI_AMDSTD=y
333# CONFIG_MTD_CFI_STAA is not set
334CONFIG_MTD_CFI_UTIL=y
335# CONFIG_MTD_RAM is not set
336# CONFIG_MTD_ROM is not set
337# CONFIG_MTD_ABSENT is not set
338# CONFIG_MTD_OBSOLETE_CHIPS is not set
339
340#
341# Mapping drivers for chip access
342#
343# CONFIG_MTD_COMPLEX_MAPPINGS is not set
344CONFIG_MTD_PHYSMAP=y
345CONFIG_MTD_PHYSMAP_START=0xfe000000
346CONFIG_MTD_PHYSMAP_LEN=0x1000000
347CONFIG_MTD_PHYSMAP_BANKWIDTH=2
348# CONFIG_MTD_PLATRAM is not set
349
350#
351# Self-contained MTD device drivers
352#
353# CONFIG_MTD_PMC551 is not set
354# CONFIG_MTD_DATAFLASH is not set
355# CONFIG_MTD_M25P80 is not set
356# CONFIG_MTD_SLRAM is not set
357# CONFIG_MTD_PHRAM is not set
358# CONFIG_MTD_MTDRAM is not set
359# CONFIG_MTD_BLOCK2MTD is not set
360
361#
362# Disk-On-Chip Device Drivers
363#
364# CONFIG_MTD_DOC2000 is not set
365# CONFIG_MTD_DOC2001 is not set
366# CONFIG_MTD_DOC2001PLUS is not set
367
368#
369# NAND Flash Device Drivers
370#
371# CONFIG_MTD_NAND is not set
372
373#
374# OneNAND Flash Device Drivers
375#
376# CONFIG_MTD_ONENAND is not set
377
378#
379# Parallel port support
380#
381# CONFIG_PARPORT is not set
382
383#
384# Plug and Play support
385#
386
387#
388# Block devices
389#
390# CONFIG_BLK_DEV_FD is not set
391# CONFIG_BLK_CPQ_DA is not set
392# CONFIG_BLK_CPQ_CISS_DA is not set
393# CONFIG_BLK_DEV_DAC960 is not set
394# CONFIG_BLK_DEV_UMEM is not set
395# CONFIG_BLK_DEV_COW_COMMON is not set
396CONFIG_BLK_DEV_LOOP=y
397# CONFIG_BLK_DEV_CRYPTOLOOP is not set
398# CONFIG_BLK_DEV_NBD is not set
399# CONFIG_BLK_DEV_SX8 is not set
400# CONFIG_BLK_DEV_UB is not set
401CONFIG_BLK_DEV_RAM=y
402CONFIG_BLK_DEV_RAM_COUNT=16
403CONFIG_BLK_DEV_RAM_SIZE=32768
404CONFIG_BLK_DEV_INITRD=y
405# CONFIG_CDROM_PKTCDVD is not set
406# CONFIG_ATA_OVER_ETH is not set
407
408#
409# ATA/ATAPI/MFM/RLL support
410#
411CONFIG_IDE=y
412# CONFIG_BLK_DEV_IDE is not set
413# CONFIG_BLK_DEV_HD_ONLY is not set
414# CONFIG_BLK_DEV_HD is not set
415
416#
417# SCSI device support
418#
419# CONFIG_RAID_ATTRS is not set
420CONFIG_SCSI=y
421CONFIG_SCSI_PROC_FS=y
422
423#
424# SCSI support type (disk, tape, CD-ROM)
425#
426CONFIG_BLK_DEV_SD=y
427# CONFIG_CHR_DEV_ST is not set
428# CONFIG_CHR_DEV_OSST is not set
429# CONFIG_BLK_DEV_SR is not set
430CONFIG_CHR_DEV_SG=y
431# CONFIG_CHR_DEV_SCH is not set
432
433#
434# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
435#
436# CONFIG_SCSI_MULTI_LUN is not set
437# CONFIG_SCSI_CONSTANTS is not set
438# CONFIG_SCSI_LOGGING is not set
439
440#
441# SCSI Transport Attributes
442#
443CONFIG_SCSI_SPI_ATTRS=y
444# CONFIG_SCSI_FC_ATTRS is not set
445# CONFIG_SCSI_ISCSI_ATTRS is not set
446# CONFIG_SCSI_SAS_ATTRS is not set
447
448#
449# SCSI low-level drivers
450#
451# CONFIG_ISCSI_TCP is not set
452# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
453# CONFIG_SCSI_3W_9XXX is not set
454# CONFIG_SCSI_ACARD is not set
455# CONFIG_SCSI_AACRAID is not set
456# CONFIG_SCSI_AIC7XXX is not set
457# CONFIG_SCSI_AIC7XXX_OLD is not set
458# CONFIG_SCSI_AIC79XX is not set
459# CONFIG_SCSI_DPT_I2O is not set
460# CONFIG_MEGARAID_NEWGEN is not set
461# CONFIG_MEGARAID_LEGACY is not set
462# CONFIG_MEGARAID_SAS is not set
463CONFIG_SCSI_SATA=y
464# CONFIG_SCSI_SATA_AHCI is not set
465# CONFIG_SCSI_SATA_SVW is not set
466# CONFIG_SCSI_ATA_PIIX is not set
467# CONFIG_SCSI_SATA_MV is not set
468# CONFIG_SCSI_SATA_NV is not set
469# CONFIG_SCSI_PDC_ADMA is not set
470# CONFIG_SCSI_HPTIOP is not set
471# CONFIG_SCSI_SATA_QSTOR is not set
472# CONFIG_SCSI_SATA_PROMISE is not set
473# CONFIG_SCSI_SATA_SX4 is not set
474CONFIG_SCSI_SATA_SIL=y
475# CONFIG_SCSI_SATA_SIL24 is not set
476# CONFIG_SCSI_SATA_SIS is not set
477# CONFIG_SCSI_SATA_ULI is not set
478# CONFIG_SCSI_SATA_VIA is not set
479# CONFIG_SCSI_SATA_VITESSE is not set
480# CONFIG_SCSI_BUSLOGIC is not set
481# CONFIG_SCSI_DMX3191D is not set
482# CONFIG_SCSI_EATA is not set
483# CONFIG_SCSI_FUTURE_DOMAIN is not set
484# CONFIG_SCSI_GDTH is not set
485# CONFIG_SCSI_IPS is not set
486# CONFIG_SCSI_INITIO is not set
487# CONFIG_SCSI_INIA100 is not set
488# CONFIG_SCSI_SYM53C8XX_2 is not set
489# CONFIG_SCSI_IPR is not set
490# CONFIG_SCSI_QLOGIC_1280 is not set
491# CONFIG_SCSI_QLA_FC is not set
492# CONFIG_SCSI_LPFC is not set
493# CONFIG_SCSI_DC395x is not set
494# CONFIG_SCSI_DC390T is not set
495# CONFIG_SCSI_NSP32 is not set
496# CONFIG_SCSI_DEBUG is not set
497
498#
499# Multi-device support (RAID and LVM)
500#
501CONFIG_MD=y
502CONFIG_BLK_DEV_MD=y
503CONFIG_MD_LINEAR=y
504CONFIG_MD_RAID0=y
505CONFIG_MD_RAID1=y
506# CONFIG_MD_RAID10 is not set
507# CONFIG_MD_RAID456 is not set
508# CONFIG_MD_MULTIPATH is not set
509# CONFIG_MD_FAULTY is not set
510# CONFIG_BLK_DEV_DM is not set
511
512#
513# Fusion MPT device support
514#
515# CONFIG_FUSION is not set
516# CONFIG_FUSION_SPI is not set
517# CONFIG_FUSION_FC is not set
518# CONFIG_FUSION_SAS is not set
519
520#
521# IEEE 1394 (FireWire) support
522#
523# CONFIG_IEEE1394 is not set
524
525#
526# I2O device support
527#
528# CONFIG_I2O is not set
529
530#
531# Macintosh device drivers
532#
533# CONFIG_WINDFARM is not set
534
535#
536# Network device support
537#
538CONFIG_NETDEVICES=y
539# CONFIG_DUMMY is not set
540# CONFIG_BONDING is not set
541# CONFIG_EQUALIZER is not set
542# CONFIG_TUN is not set
543
544#
545# ARCnet devices
546#
547# CONFIG_ARCNET is not set
548
549#
550# PHY device support
551#
552CONFIG_PHYLIB=y
553
554#
555# MII PHY device drivers
556#
557# CONFIG_MARVELL_PHY is not set
558# CONFIG_DAVICOM_PHY is not set
559# CONFIG_QSEMI_PHY is not set
560# CONFIG_LXT_PHY is not set
561CONFIG_CICADA_PHY=y
562# CONFIG_VITESSE_PHY is not set
563# CONFIG_SMSC_PHY is not set
564
565#
566# Ethernet (10 or 100Mbit)
567#
568CONFIG_NET_ETHERNET=y
569CONFIG_MII=y
570# CONFIG_HAPPYMEAL is not set
571# CONFIG_SUNGEM is not set
572# CONFIG_CASSINI is not set
573# CONFIG_NET_VENDOR_3COM is not set
574
575#
576# Tulip family network device support
577#
578# CONFIG_NET_TULIP is not set
579# CONFIG_HP100 is not set
580CONFIG_NET_PCI=y
581# CONFIG_PCNET32 is not set
582# CONFIG_AMD8111_ETH is not set
583# CONFIG_ADAPTEC_STARFIRE is not set
584# CONFIG_B44 is not set
585# CONFIG_FORCEDETH is not set
586# CONFIG_DGRS is not set
587# CONFIG_EEPRO100 is not set
588CONFIG_E100=y
589# CONFIG_FEALNX is not set
590# CONFIG_NATSEMI is not set
591# CONFIG_NE2K_PCI is not set
592# CONFIG_8139CP is not set
593# CONFIG_8139TOO is not set
594# CONFIG_SIS900 is not set
595# CONFIG_EPIC100 is not set
596# CONFIG_SUNDANCE is not set
597# CONFIG_TLAN is not set
598# CONFIG_VIA_RHINE is not set
599
600#
601# Ethernet (1000 Mbit)
602#
603# CONFIG_ACENIC is not set
604# CONFIG_DL2K is not set
605# CONFIG_E1000 is not set
606# CONFIG_NS83820 is not set
607# CONFIG_HAMACHI is not set
608# CONFIG_YELLOWFIN is not set
609# CONFIG_R8169 is not set
610# CONFIG_SIS190 is not set
611# CONFIG_SKGE is not set
612# CONFIG_SKY2 is not set
613# CONFIG_SK98LIN is not set
614# CONFIG_VIA_VELOCITY is not set
615# CONFIG_TIGON3 is not set
616# CONFIG_BNX2 is not set
617CONFIG_GIANFAR=y
618CONFIG_GFAR_NAPI=y
619
620#
621# Ethernet (10000 Mbit)
622#
623# CONFIG_CHELSIO_T1 is not set
624# CONFIG_IXGB is not set
625# CONFIG_S2IO is not set
626# CONFIG_MYRI10GE is not set
627
628#
629# Token Ring devices
630#
631# CONFIG_TR is not set
632
633#
634# Wireless LAN (non-hamradio)
635#
636# CONFIG_NET_RADIO is not set
637
638#
639# Wan interfaces
640#
641# CONFIG_WAN is not set
642# CONFIG_FDDI is not set
643# CONFIG_HIPPI is not set
644# CONFIG_PPP is not set
645# CONFIG_SLIP is not set
646# CONFIG_NET_FC is not set
647# CONFIG_SHAPER is not set
648# CONFIG_NETCONSOLE is not set
649# CONFIG_NETPOLL is not set
650# CONFIG_NET_POLL_CONTROLLER is not set
651
652#
653# ISDN subsystem
654#
655# CONFIG_ISDN is not set
656
657#
658# Telephony Support
659#
660# CONFIG_PHONE is not set
661
662#
663# Input device support
664#
665CONFIG_INPUT=y
666
667#
668# Userland interfaces
669#
670# CONFIG_INPUT_MOUSEDEV is not set
671# CONFIG_INPUT_JOYDEV is not set
672# CONFIG_INPUT_TSDEV is not set
673# CONFIG_INPUT_EVDEV is not set
674# CONFIG_INPUT_EVBUG is not set
675
676#
677# Input Device Drivers
678#
679# CONFIG_INPUT_KEYBOARD is not set
680# CONFIG_INPUT_MOUSE is not set
681# CONFIG_INPUT_JOYSTICK is not set
682# CONFIG_INPUT_TOUCHSCREEN is not set
683# CONFIG_INPUT_MISC is not set
684
685#
686# Hardware I/O ports
687#
688# CONFIG_SERIO is not set
689# CONFIG_GAMEPORT is not set
690
691#
692# Character devices
693#
694# CONFIG_VT is not set
695# CONFIG_SERIAL_NONSTANDARD is not set
696
697#
698# Serial drivers
699#
700CONFIG_SERIAL_8250=y
701CONFIG_SERIAL_8250_CONSOLE=y
702CONFIG_SERIAL_8250_PCI=y
703CONFIG_SERIAL_8250_NR_UARTS=4
704CONFIG_SERIAL_8250_RUNTIME_UARTS=4
705# CONFIG_SERIAL_8250_EXTENDED is not set
706
707#
708# Non-8250 serial port support
709#
710CONFIG_SERIAL_CORE=y
711CONFIG_SERIAL_CORE_CONSOLE=y
712# CONFIG_SERIAL_JSM is not set
713CONFIG_UNIX98_PTYS=y
714CONFIG_LEGACY_PTYS=y
715CONFIG_LEGACY_PTY_COUNT=256
716
717#
718# IPMI
719#
720# CONFIG_IPMI_HANDLER is not set
721
722#
723# Watchdog Cards
724#
725CONFIG_WATCHDOG=y
726# CONFIG_WATCHDOG_NOWAYOUT is not set
727
728#
729# Watchdog Device Drivers
730#
731# CONFIG_SOFT_WATCHDOG is not set
732CONFIG_83xx_WDT=y
733
734#
735# PCI-based Watchdog Cards
736#
737# CONFIG_PCIPCWATCHDOG is not set
738# CONFIG_WDTPCI is not set
739
740#
741# USB-based Watchdog Cards
742#
743# CONFIG_USBPCWATCHDOG is not set
744CONFIG_HW_RANDOM=y
745# CONFIG_NVRAM is not set
746# CONFIG_GEN_RTC is not set
747# CONFIG_DTLK is not set
748# CONFIG_R3964 is not set
749# CONFIG_APPLICOM is not set
750
751#
752# Ftape, the floppy tape device driver
753#
754# CONFIG_AGP is not set
755# CONFIG_DRM is not set
756# CONFIG_RAW_DRIVER is not set
757
758#
759# TPM devices
760#
761# CONFIG_TCG_TPM is not set
762# CONFIG_TELCLOCK is not set
763
764#
765# I2C support
766#
767CONFIG_I2C=y
768CONFIG_I2C_CHARDEV=y
769
770#
771# I2C Algorithms
772#
773# CONFIG_I2C_ALGOBIT is not set
774# CONFIG_I2C_ALGOPCF is not set
775# CONFIG_I2C_ALGOPCA is not set
776
777#
778# I2C Hardware Bus support
779#
780# CONFIG_I2C_ALI1535 is not set
781# CONFIG_I2C_ALI1563 is not set
782# CONFIG_I2C_ALI15X3 is not set
783# CONFIG_I2C_AMD756 is not set
784# CONFIG_I2C_AMD8111 is not set
785# CONFIG_I2C_I801 is not set
786# CONFIG_I2C_I810 is not set
787# CONFIG_I2C_PIIX4 is not set
788CONFIG_I2C_MPC=y
789# CONFIG_I2C_NFORCE2 is not set
790# CONFIG_I2C_OCORES is not set
791# CONFIG_I2C_PARPORT_LIGHT is not set
792# CONFIG_I2C_PROSAVAGE is not set
793# CONFIG_I2C_SAVAGE4 is not set
794# CONFIG_I2C_SIS5595 is not set
795# CONFIG_I2C_SIS630 is not set
796# CONFIG_I2C_SIS96X is not set
797# CONFIG_I2C_STUB is not set
798# CONFIG_I2C_VIA is not set
799# CONFIG_I2C_VIAPRO is not set
800# CONFIG_I2C_VOODOO3 is not set
801# CONFIG_I2C_PCA_ISA is not set
802
803#
804# Miscellaneous I2C Chip support
805#
806# CONFIG_SENSORS_DS1337 is not set
807# CONFIG_SENSORS_DS1374 is not set
808# CONFIG_SENSORS_EEPROM is not set
809# CONFIG_SENSORS_PCF8574 is not set
810# CONFIG_SENSORS_PCA9539 is not set
811# CONFIG_SENSORS_PCF8591 is not set
812# CONFIG_SENSORS_M41T00 is not set
813# CONFIG_SENSORS_MAX6875 is not set
814# CONFIG_I2C_DEBUG_CORE is not set
815# CONFIG_I2C_DEBUG_ALGO is not set
816# CONFIG_I2C_DEBUG_BUS is not set
817# CONFIG_I2C_DEBUG_CHIP is not set
818
819#
820# SPI support
821#
822CONFIG_SPI=y
823# CONFIG_SPI_DEBUG is not set
824CONFIG_SPI_MASTER=y
825
826#
827# SPI Master Controller Drivers
828#
829CONFIG_SPI_BITBANG=y
830CONFIG_SPI_MPC83xx=y
831
832#
833# SPI Protocol Masters
834#
835
836#
837# Dallas's 1-wire bus
838#
839
840#
841# Hardware Monitoring support
842#
843CONFIG_HWMON=y
844# CONFIG_HWMON_VID is not set
845# CONFIG_SENSORS_ABITUGURU is not set
846# CONFIG_SENSORS_ADM1021 is not set
847# CONFIG_SENSORS_ADM1025 is not set
848# CONFIG_SENSORS_ADM1026 is not set
849# CONFIG_SENSORS_ADM1031 is not set
850# CONFIG_SENSORS_ADM9240 is not set
851# CONFIG_SENSORS_ASB100 is not set
852# CONFIG_SENSORS_ATXP1 is not set
853# CONFIG_SENSORS_DS1621 is not set
854# CONFIG_SENSORS_F71805F is not set
855# CONFIG_SENSORS_FSCHER is not set
856# CONFIG_SENSORS_FSCPOS is not set
857# CONFIG_SENSORS_GL518SM is not set
858# CONFIG_SENSORS_GL520SM is not set
859# CONFIG_SENSORS_IT87 is not set
860# CONFIG_SENSORS_LM63 is not set
861# CONFIG_SENSORS_LM70 is not set
862# CONFIG_SENSORS_LM75 is not set
863# CONFIG_SENSORS_LM77 is not set
864# CONFIG_SENSORS_LM78 is not set
865# CONFIG_SENSORS_LM80 is not set
866# CONFIG_SENSORS_LM83 is not set
867# CONFIG_SENSORS_LM85 is not set
868# CONFIG_SENSORS_LM87 is not set
869# CONFIG_SENSORS_LM90 is not set
870# CONFIG_SENSORS_LM92 is not set
871# CONFIG_SENSORS_MAX1619 is not set
872# CONFIG_SENSORS_PC87360 is not set
873# CONFIG_SENSORS_SIS5595 is not set
874# CONFIG_SENSORS_SMSC47M1 is not set
875# CONFIG_SENSORS_SMSC47M192 is not set
876# CONFIG_SENSORS_SMSC47B397 is not set
877# CONFIG_SENSORS_VIA686A is not set
878# CONFIG_SENSORS_VT8231 is not set
879# CONFIG_SENSORS_W83781D is not set
880# CONFIG_SENSORS_W83791D is not set
881# CONFIG_SENSORS_W83792D is not set
882# CONFIG_SENSORS_W83L785TS is not set
883# CONFIG_SENSORS_W83627HF is not set
884# CONFIG_SENSORS_W83627EHF is not set
885# CONFIG_HWMON_DEBUG_CHIP is not set
886
887#
888# Misc devices
889#
890
891#
892# Multimedia devices
893#
894# CONFIG_VIDEO_DEV is not set
895CONFIG_VIDEO_V4L2=y
896
897#
898# Digital Video Broadcasting Devices
899#
900# CONFIG_DVB is not set
901# CONFIG_USB_DABUSB is not set
902
903#
904# Graphics support
905#
906CONFIG_FIRMWARE_EDID=y
907# CONFIG_FB is not set
908
909#
910# Sound
911#
912# CONFIG_SOUND is not set
913
914#
915# USB support
916#
917CONFIG_USB_ARCH_HAS_HCD=y
918CONFIG_USB_ARCH_HAS_OHCI=y
919CONFIG_USB_ARCH_HAS_EHCI=y
920CONFIG_USB=y
921# CONFIG_USB_DEBUG is not set
922
923#
924# Miscellaneous USB options
925#
926CONFIG_USB_DEVICEFS=y
927# CONFIG_USB_BANDWIDTH is not set
928# CONFIG_USB_DYNAMIC_MINORS is not set
929# CONFIG_USB_OTG is not set
930
931#
932# USB Host Controller Drivers
933#
934CONFIG_USB_EHCI_HCD=y
935# CONFIG_USB_EHCI_SPLIT_ISO is not set
936# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
937# CONFIG_USB_EHCI_TT_NEWSCHED is not set
938# CONFIG_USB_ISP116X_HCD is not set
939CONFIG_USB_OHCI_HCD=y
940# CONFIG_USB_OHCI_BIG_ENDIAN is not set
941CONFIG_USB_OHCI_LITTLE_ENDIAN=y
942CONFIG_USB_UHCI_HCD=y
943# CONFIG_USB_SL811_HCD is not set
944
945#
946# USB Device Class drivers
947#
948# CONFIG_USB_ACM is not set
949# CONFIG_USB_PRINTER is not set
950
951#
952# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
953#
954
955#
956# may also be needed; see USB_STORAGE Help for more information
957#
958CONFIG_USB_STORAGE=y
959# CONFIG_USB_STORAGE_DEBUG is not set
960# CONFIG_USB_STORAGE_DATAFAB is not set
961# CONFIG_USB_STORAGE_FREECOM is not set
962# CONFIG_USB_STORAGE_DPCM is not set
963# CONFIG_USB_STORAGE_USBAT is not set
964# CONFIG_USB_STORAGE_SDDR09 is not set
965# CONFIG_USB_STORAGE_SDDR55 is not set
966# CONFIG_USB_STORAGE_JUMPSHOT is not set
967# CONFIG_USB_STORAGE_ALAUDA is not set
968# CONFIG_USB_LIBUSUAL is not set
969
970#
971# USB Input Devices
972#
973# CONFIG_USB_HID is not set
974
975#
976# USB HID Boot Protocol drivers
977#
978# CONFIG_USB_KBD is not set
979# CONFIG_USB_MOUSE is not set
980# CONFIG_USB_AIPTEK is not set
981# CONFIG_USB_WACOM is not set
982# CONFIG_USB_ACECAD is not set
983# CONFIG_USB_KBTAB is not set
984# CONFIG_USB_POWERMATE is not set
985# CONFIG_USB_TOUCHSCREEN is not set
986# CONFIG_USB_YEALINK is not set
987# CONFIG_USB_XPAD is not set
988# CONFIG_USB_ATI_REMOTE is not set
989# CONFIG_USB_ATI_REMOTE2 is not set
990# CONFIG_USB_KEYSPAN_REMOTE is not set
991# CONFIG_USB_APPLETOUCH is not set
992
993#
994# USB Imaging devices
995#
996# CONFIG_USB_MDC800 is not set
997# CONFIG_USB_MICROTEK is not set
998
999#
1000# USB Network Adapters
1001#
1002# CONFIG_USB_CATC is not set
1003# CONFIG_USB_KAWETH is not set
1004# CONFIG_USB_PEGASUS is not set
1005# CONFIG_USB_RTL8150 is not set
1006# CONFIG_USB_USBNET is not set
1007CONFIG_USB_MON=y
1008
1009#
1010# USB port drivers
1011#
1012
1013#
1014# USB Serial Converter support
1015#
1016# CONFIG_USB_SERIAL is not set
1017
1018#
1019# USB Miscellaneous drivers
1020#
1021# CONFIG_USB_EMI62 is not set
1022# CONFIG_USB_EMI26 is not set
1023# CONFIG_USB_AUERSWALD is not set
1024# CONFIG_USB_RIO500 is not set
1025# CONFIG_USB_LEGOTOWER is not set
1026# CONFIG_USB_LCD is not set
1027# CONFIG_USB_LED is not set
1028# CONFIG_USB_CY7C63 is not set
1029# CONFIG_USB_CYTHERM is not set
1030# CONFIG_USB_PHIDGETKIT is not set
1031# CONFIG_USB_PHIDGETSERVO is not set
1032# CONFIG_USB_IDMOUSE is not set
1033# CONFIG_USB_APPLEDISPLAY is not set
1034# CONFIG_USB_SISUSBVGA is not set
1035# CONFIG_USB_LD is not set
1036# CONFIG_USB_TEST is not set
1037
1038#
1039# USB DSL modem support
1040#
1041
1042#
1043# USB Gadget Support
1044#
1045CONFIG_USB_GADGET=y
1046# CONFIG_USB_GADGET_DEBUG_FILES is not set
1047CONFIG_USB_GADGET_SELECTED=y
1048CONFIG_USB_GADGET_NET2280=y
1049CONFIG_USB_NET2280=y
1050# CONFIG_USB_GADGET_PXA2XX is not set
1051# CONFIG_USB_GADGET_GOKU is not set
1052# CONFIG_USB_GADGET_LH7A40X is not set
1053# CONFIG_USB_GADGET_OMAP is not set
1054# CONFIG_USB_GADGET_AT91 is not set
1055# CONFIG_USB_GADGET_DUMMY_HCD is not set
1056CONFIG_USB_GADGET_DUALSPEED=y
1057# CONFIG_USB_ZERO is not set
1058CONFIG_USB_ETH=y
1059CONFIG_USB_ETH_RNDIS=y
1060# CONFIG_USB_GADGETFS is not set
1061# CONFIG_USB_FILE_STORAGE is not set
1062# CONFIG_USB_G_SERIAL is not set
1063
1064#
1065# MMC/SD Card support
1066#
1067# CONFIG_MMC is not set
1068
1069#
1070# LED devices
1071#
1072# CONFIG_NEW_LEDS is not set
1073
1074#
1075# LED drivers
1076#
1077
1078#
1079# LED Triggers
1080#
1081
1082#
1083# InfiniBand support
1084#
1085# CONFIG_INFINIBAND is not set
1086
1087#
1088# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1089#
1090
1091#
1092# Real Time Clock
1093#
1094CONFIG_RTC_LIB=y
1095CONFIG_RTC_CLASS=y
1096CONFIG_RTC_HCTOSYS=y
1097CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1098
1099#
1100# RTC interfaces
1101#
1102CONFIG_RTC_INTF_SYSFS=y
1103CONFIG_RTC_INTF_PROC=y
1104CONFIG_RTC_INTF_DEV=y
1105CONFIG_RTC_INTF_DEV_UIE_EMUL=y
1106
1107#
1108# RTC drivers
1109#
1110# CONFIG_RTC_DRV_X1205 is not set
1111CONFIG_RTC_DRV_DS1307=y
1112# CONFIG_RTC_DRV_DS1553 is not set
1113# CONFIG_RTC_DRV_DS1672 is not set
1114# CONFIG_RTC_DRV_DS1742 is not set
1115# CONFIG_RTC_DRV_PCF8563 is not set
1116# CONFIG_RTC_DRV_PCF8583 is not set
1117# CONFIG_RTC_DRV_RS5C348 is not set
1118# CONFIG_RTC_DRV_RS5C372 is not set
1119# CONFIG_RTC_DRV_M48T86 is not set
1120# CONFIG_RTC_DRV_TEST is not set
1121# CONFIG_RTC_DRV_MAX6902 is not set
1122# CONFIG_RTC_DRV_V3020 is not set
1123
1124#
1125# DMA Engine support
1126#
1127CONFIG_DMA_ENGINE=y
1128
1129#
1130# DMA Clients
1131#
1132CONFIG_NET_DMA=y
1133
1134#
1135# DMA Devices
1136#
1137CONFIG_INTEL_IOATDMA=y
1138
1139#
1140# File systems
1141#
1142CONFIG_EXT2_FS=y
1143# CONFIG_EXT2_FS_XATTR is not set
1144# CONFIG_EXT2_FS_XIP is not set
1145CONFIG_EXT3_FS=y
1146CONFIG_EXT3_FS_XATTR=y
1147# CONFIG_EXT3_FS_POSIX_ACL is not set
1148# CONFIG_EXT3_FS_SECURITY is not set
1149CONFIG_JBD=y
1150# CONFIG_JBD_DEBUG is not set
1151CONFIG_FS_MBCACHE=y
1152# CONFIG_REISERFS_FS is not set
1153# CONFIG_JFS_FS is not set
1154# CONFIG_FS_POSIX_ACL is not set
1155# CONFIG_XFS_FS is not set
1156# CONFIG_OCFS2_FS is not set
1157# CONFIG_MINIX_FS is not set
1158# CONFIG_ROMFS_FS is not set
1159CONFIG_INOTIFY=y
1160CONFIG_INOTIFY_USER=y
1161# CONFIG_QUOTA is not set
1162CONFIG_DNOTIFY=y
1163# CONFIG_AUTOFS_FS is not set
1164# CONFIG_AUTOFS4_FS is not set
1165# CONFIG_FUSE_FS is not set
1166
1167#
1168# CD-ROM/DVD Filesystems
1169#
1170# CONFIG_ISO9660_FS is not set
1171# CONFIG_UDF_FS is not set
1172
1173#
1174# DOS/FAT/NT Filesystems
1175#
1176# CONFIG_MSDOS_FS is not set
1177# CONFIG_VFAT_FS is not set
1178# CONFIG_NTFS_FS is not set
1179
1180#
1181# Pseudo filesystems
1182#
1183CONFIG_PROC_FS=y
1184CONFIG_PROC_KCORE=y
1185CONFIG_SYSFS=y
1186CONFIG_TMPFS=y
1187# CONFIG_HUGETLB_PAGE is not set
1188CONFIG_RAMFS=y
1189# CONFIG_CONFIGFS_FS is not set
1190
1191#
1192# Miscellaneous filesystems
1193#
1194# CONFIG_ADFS_FS is not set
1195# CONFIG_AFFS_FS is not set
1196# CONFIG_HFS_FS is not set
1197# CONFIG_HFSPLUS_FS is not set
1198# CONFIG_BEFS_FS is not set
1199# CONFIG_BFS_FS is not set
1200# CONFIG_EFS_FS is not set
1201# CONFIG_JFFS_FS is not set
1202# CONFIG_JFFS2_FS is not set
1203# CONFIG_CRAMFS is not set
1204# CONFIG_VXFS_FS is not set
1205# CONFIG_HPFS_FS is not set
1206# CONFIG_QNX4FS_FS is not set
1207# CONFIG_SYSV_FS is not set
1208# CONFIG_UFS_FS is not set
1209
1210#
1211# Network File Systems
1212#
1213CONFIG_NFS_FS=y
1214CONFIG_NFS_V3=y
1215# CONFIG_NFS_V3_ACL is not set
1216CONFIG_NFS_V4=y
1217# CONFIG_NFS_DIRECTIO is not set
1218# CONFIG_NFSD is not set
1219CONFIG_ROOT_NFS=y
1220CONFIG_LOCKD=y
1221CONFIG_LOCKD_V4=y
1222CONFIG_NFS_COMMON=y
1223CONFIG_SUNRPC=y
1224CONFIG_SUNRPC_GSS=y
1225CONFIG_RPCSEC_GSS_KRB5=y
1226# CONFIG_RPCSEC_GSS_SPKM3 is not set
1227# CONFIG_SMB_FS is not set
1228# CONFIG_CIFS is not set
1229# CONFIG_CIFS_DEBUG2 is not set
1230# CONFIG_NCP_FS is not set
1231# CONFIG_CODA_FS is not set
1232# CONFIG_AFS_FS is not set
1233# CONFIG_9P_FS is not set
1234
1235#
1236# Partition Types
1237#
1238CONFIG_PARTITION_ADVANCED=y
1239# CONFIG_ACORN_PARTITION is not set
1240# CONFIG_OSF_PARTITION is not set
1241# CONFIG_AMIGA_PARTITION is not set
1242# CONFIG_ATARI_PARTITION is not set
1243# CONFIG_MAC_PARTITION is not set
1244# CONFIG_MSDOS_PARTITION is not set
1245# CONFIG_LDM_PARTITION is not set
1246# CONFIG_SGI_PARTITION is not set
1247# CONFIG_ULTRIX_PARTITION is not set
1248# CONFIG_SUN_PARTITION is not set
1249# CONFIG_KARMA_PARTITION is not set
1250# CONFIG_EFI_PARTITION is not set
1251
1252#
1253# Native Language Support
1254#
1255# CONFIG_NLS is not set
1256
1257#
1258# Library routines
1259#
1260# CONFIG_CRC_CCITT is not set
1261# CONFIG_CRC16 is not set
1262CONFIG_CRC32=y
1263# CONFIG_LIBCRC32C is not set
1264CONFIG_PLIST=y
1265
1266#
1267# Instrumentation Support
1268#
1269# CONFIG_PROFILING is not set
1270
1271#
1272# Kernel hacking
1273#
1274CONFIG_PRINTK_TIME=y
1275# CONFIG_MAGIC_SYSRQ is not set
1276# CONFIG_UNUSED_SYMBOLS is not set
1277CONFIG_DEBUG_KERNEL=y
1278CONFIG_LOG_BUF_SHIFT=17
1279CONFIG_DETECT_SOFTLOCKUP=y
1280# CONFIG_SCHEDSTATS is not set
1281# CONFIG_DEBUG_SLAB is not set
1282# CONFIG_DEBUG_MUTEXES is not set
1283# CONFIG_DEBUG_RT_MUTEXES is not set
1284# CONFIG_RT_MUTEX_TESTER is not set
1285# CONFIG_DEBUG_SPINLOCK is not set
1286# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1287# CONFIG_DEBUG_KOBJECT is not set
1288CONFIG_DEBUG_INFO=y
1289# CONFIG_DEBUG_FS is not set
1290# CONFIG_DEBUG_VM is not set
1291CONFIG_FORCED_INLINING=y
1292# CONFIG_RCU_TORTURE_TEST is not set
1293# CONFIG_DEBUGGER is not set
1294# CONFIG_BDI_SWITCH is not set
1295CONFIG_BOOTX_TEXT=y
1296CONFIG_SERIAL_TEXT_DEBUG=y
1297# CONFIG_PPC_EARLY_DEBUG is not set
1298
1299#
1300# Security options
1301#
1302# CONFIG_KEYS is not set
1303# CONFIG_SECURITY is not set
1304
1305#
1306# Cryptographic options
1307#
1308CONFIG_CRYPTO=y
1309# CONFIG_CRYPTO_HMAC is not set
1310# CONFIG_CRYPTO_NULL is not set
1311# CONFIG_CRYPTO_MD4 is not set
1312CONFIG_CRYPTO_MD5=y
1313# CONFIG_CRYPTO_SHA1 is not set
1314# CONFIG_CRYPTO_SHA256 is not set
1315# CONFIG_CRYPTO_SHA512 is not set
1316# CONFIG_CRYPTO_WP512 is not set
1317# CONFIG_CRYPTO_TGR192 is not set
1318CONFIG_CRYPTO_DES=y
1319# CONFIG_CRYPTO_BLOWFISH is not set
1320# CONFIG_CRYPTO_TWOFISH is not set
1321# CONFIG_CRYPTO_SERPENT is not set
1322# CONFIG_CRYPTO_AES is not set
1323# CONFIG_CRYPTO_CAST5 is not set
1324# CONFIG_CRYPTO_CAST6 is not set
1325# CONFIG_CRYPTO_TEA is not set
1326# CONFIG_CRYPTO_ARC4 is not set
1327# CONFIG_CRYPTO_KHAZAD is not set
1328# CONFIG_CRYPTO_ANUBIS is not set
1329# CONFIG_CRYPTO_DEFLATE is not set
1330# CONFIG_CRYPTO_MICHAEL_MIC is not set
1331# CONFIG_CRYPTO_CRC32C is not set
1332# CONFIG_CRYPTO_TEST is not set
1333
1334#
1335# Hardware crypto devices
1336#
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index a6920919d68e..f4e5e14ee2b6 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -111,7 +111,7 @@ void __init btext_setup_display(int width, int height, int depth, int pitch,
111 logicalDisplayBase = (unsigned char *)address; 111 logicalDisplayBase = (unsigned char *)address;
112 dispDeviceBase = (unsigned char *)address; 112 dispDeviceBase = (unsigned char *)address;
113 dispDeviceRowBytes = pitch; 113 dispDeviceRowBytes = pitch;
114 dispDeviceDepth = depth; 114 dispDeviceDepth = depth == 15 ? 16 : depth;
115 dispDeviceRect[0] = dispDeviceRect[1] = 0; 115 dispDeviceRect[0] = dispDeviceRect[1] = 0;
116 dispDeviceRect[2] = width; 116 dispDeviceRect[2] = width;
117 dispDeviceRect[3] = height; 117 dispDeviceRect[3] = height;
@@ -160,20 +160,28 @@ int btext_initialize(struct device_node *np)
160 unsigned long address = 0; 160 unsigned long address = 0;
161 u32 *prop; 161 u32 *prop;
162 162
163 prop = (u32 *)get_property(np, "width", NULL); 163 prop = (u32 *)get_property(np, "linux,bootx-width", NULL);
164 if (prop == NULL)
165 prop = (u32 *)get_property(np, "width", NULL);
164 if (prop == NULL) 166 if (prop == NULL)
165 return -EINVAL; 167 return -EINVAL;
166 width = *prop; 168 width = *prop;
167 prop = (u32 *)get_property(np, "height", NULL); 169 prop = (u32 *)get_property(np, "linux,bootx-height", NULL);
170 if (prop == NULL)
171 prop = (u32 *)get_property(np, "height", NULL);
168 if (prop == NULL) 172 if (prop == NULL)
169 return -EINVAL; 173 return -EINVAL;
170 height = *prop; 174 height = *prop;
171 prop = (u32 *)get_property(np, "depth", NULL); 175 prop = (u32 *)get_property(np, "linux,bootx-depth", NULL);
176 if (prop == NULL)
177 prop = (u32 *)get_property(np, "depth", NULL);
172 if (prop == NULL) 178 if (prop == NULL)
173 return -EINVAL; 179 return -EINVAL;
174 depth = *prop; 180 depth = *prop;
175 pitch = width * ((depth + 7) / 8); 181 pitch = width * ((depth + 7) / 8);
176 prop = (u32 *)get_property(np, "linebytes", NULL); 182 prop = (u32 *)get_property(np, "linux,bootx-linebytes", NULL);
183 if (prop == NULL)
184 prop = (u32 *)get_property(np, "linebytes", NULL);
177 if (prop) 185 if (prop)
178 pitch = *prop; 186 pitch = *prop;
179 if (pitch == 1) 187 if (pitch == 1)
@@ -194,7 +202,7 @@ int btext_initialize(struct device_node *np)
194 g_max_loc_Y = height / 16; 202 g_max_loc_Y = height / 16;
195 dispDeviceBase = (unsigned char *)address; 203 dispDeviceBase = (unsigned char *)address;
196 dispDeviceRowBytes = pitch; 204 dispDeviceRowBytes = pitch;
197 dispDeviceDepth = depth; 205 dispDeviceDepth = depth == 15 ? 16 : depth;
198 dispDeviceRect[0] = dispDeviceRect[1] = 0; 206 dispDeviceRect[0] = dispDeviceRect[1] = 0;
199 dispDeviceRect[2] = width; 207 dispDeviceRect[2] = width;
200 dispDeviceRect[3] = height; 208 dispDeviceRect[3] = height;
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index e47d40ac6f39..97ddc02a3d42 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -323,13 +323,11 @@ int ibmebus_request_irq(struct ibmebus_dev *dev,
323 unsigned long irq_flags, const char * devname, 323 unsigned long irq_flags, const char * devname,
324 void *dev_id) 324 void *dev_id)
325{ 325{
326 unsigned int irq = virt_irq_create_mapping(ist); 326 unsigned int irq = irq_create_mapping(NULL, ist, 0);
327 327
328 if (irq == NO_IRQ) 328 if (irq == NO_IRQ)
329 return -EINVAL; 329 return -EINVAL;
330 330
331 irq = irq_offset_up(irq);
332
333 return request_irq(irq, handler, 331 return request_irq(irq, handler,
334 irq_flags, devname, dev_id); 332 irq_flags, devname, dev_id);
335} 333}
@@ -337,12 +335,9 @@ EXPORT_SYMBOL(ibmebus_request_irq);
337 335
338void ibmebus_free_irq(struct ibmebus_dev *dev, u32 ist, void *dev_id) 336void ibmebus_free_irq(struct ibmebus_dev *dev, u32 ist, void *dev_id)
339{ 337{
340 unsigned int irq = virt_irq_create_mapping(ist); 338 unsigned int irq = irq_find_mapping(NULL, ist);
341 339
342 irq = irq_offset_up(irq);
343 free_irq(irq, dev_id); 340 free_irq(irq, dev_id);
344
345 return;
346} 341}
347EXPORT_SYMBOL(ibmebus_free_irq); 342EXPORT_SYMBOL(ibmebus_free_irq);
348 343
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 525baab45d2d..8cf987809c66 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -29,6 +29,8 @@
29 * to reduce code space and undefined function references. 29 * to reduce code space and undefined function references.
30 */ 30 */
31 31
32#undef DEBUG
33
32#include <linux/module.h> 34#include <linux/module.h>
33#include <linux/threads.h> 35#include <linux/threads.h>
34#include <linux/kernel_stat.h> 36#include <linux/kernel_stat.h>
@@ -46,7 +48,10 @@
46#include <linux/cpumask.h> 48#include <linux/cpumask.h>
47#include <linux/profile.h> 49#include <linux/profile.h>
48#include <linux/bitops.h> 50#include <linux/bitops.h>
49#include <linux/pci.h> 51#include <linux/list.h>
52#include <linux/radix-tree.h>
53#include <linux/mutex.h>
54#include <linux/bootmem.h>
50 55
51#include <asm/uaccess.h> 56#include <asm/uaccess.h>
52#include <asm/system.h> 57#include <asm/system.h>
@@ -57,39 +62,38 @@
57#include <asm/prom.h> 62#include <asm/prom.h>
58#include <asm/ptrace.h> 63#include <asm/ptrace.h>
59#include <asm/machdep.h> 64#include <asm/machdep.h>
65#include <asm/udbg.h>
60#ifdef CONFIG_PPC_ISERIES 66#ifdef CONFIG_PPC_ISERIES
61#include <asm/paca.h> 67#include <asm/paca.h>
62#endif 68#endif
63 69
64int __irq_offset_value; 70int __irq_offset_value;
65#ifdef CONFIG_PPC32
66EXPORT_SYMBOL(__irq_offset_value);
67#endif
68
69static int ppc_spurious_interrupts; 71static int ppc_spurious_interrupts;
70 72
71#ifdef CONFIG_PPC32 73#ifdef CONFIG_PPC32
72#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 74EXPORT_SYMBOL(__irq_offset_value);
75atomic_t ppc_n_lost_interrupts;
73 76
77#ifndef CONFIG_PPC_MERGE
78#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
74unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; 79unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
75atomic_t ppc_n_lost_interrupts; 80#endif
76 81
77#ifdef CONFIG_TAU_INT 82#ifdef CONFIG_TAU_INT
78extern int tau_initialized; 83extern int tau_initialized;
79extern int tau_interrupts(int); 84extern int tau_interrupts(int);
80#endif 85#endif
86#endif /* CONFIG_PPC32 */
81 87
82#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) 88#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
83extern atomic_t ipi_recv; 89extern atomic_t ipi_recv;
84extern atomic_t ipi_sent; 90extern atomic_t ipi_sent;
85#endif 91#endif
86#endif /* CONFIG_PPC32 */
87 92
88#ifdef CONFIG_PPC64 93#ifdef CONFIG_PPC64
89EXPORT_SYMBOL(irq_desc); 94EXPORT_SYMBOL(irq_desc);
90 95
91int distribute_irqs = 1; 96int distribute_irqs = 1;
92u64 ppc64_interrupt_controller;
93#endif /* CONFIG_PPC64 */ 97#endif /* CONFIG_PPC64 */
94 98
95int show_interrupts(struct seq_file *p, void *v) 99int show_interrupts(struct seq_file *p, void *v)
@@ -182,7 +186,7 @@ void fixup_irqs(cpumask_t map)
182 186
183void do_IRQ(struct pt_regs *regs) 187void do_IRQ(struct pt_regs *regs)
184{ 188{
185 int irq; 189 unsigned int irq;
186#ifdef CONFIG_IRQSTACKS 190#ifdef CONFIG_IRQSTACKS
187 struct thread_info *curtp, *irqtp; 191 struct thread_info *curtp, *irqtp;
188#endif 192#endif
@@ -213,22 +217,26 @@ void do_IRQ(struct pt_regs *regs)
213 */ 217 */
214 irq = ppc_md.get_irq(regs); 218 irq = ppc_md.get_irq(regs);
215 219
216 if (irq >= 0) { 220 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
217#ifdef CONFIG_IRQSTACKS 221#ifdef CONFIG_IRQSTACKS
218 /* Switch to the irq stack to handle this */ 222 /* Switch to the irq stack to handle this */
219 curtp = current_thread_info(); 223 curtp = current_thread_info();
220 irqtp = hardirq_ctx[smp_processor_id()]; 224 irqtp = hardirq_ctx[smp_processor_id()];
221 if (curtp != irqtp) { 225 if (curtp != irqtp) {
226 struct irq_desc *desc = irq_desc + irq;
227 void *handler = desc->handle_irq;
228 if (handler == NULL)
229 handler = &__do_IRQ;
222 irqtp->task = curtp->task; 230 irqtp->task = curtp->task;
223 irqtp->flags = 0; 231 irqtp->flags = 0;
224 call___do_IRQ(irq, regs, irqtp); 232 call_handle_irq(irq, desc, regs, irqtp, handler);
225 irqtp->task = NULL; 233 irqtp->task = NULL;
226 if (irqtp->flags) 234 if (irqtp->flags)
227 set_bits(irqtp->flags, &curtp->flags); 235 set_bits(irqtp->flags, &curtp->flags);
228 } else 236 } else
229#endif 237#endif
230 __do_IRQ(irq, regs); 238 generic_handle_irq(irq, regs);
231 } else if (irq != -2) 239 } else if (irq != NO_IRQ_IGNORE)
232 /* That's not SMP safe ... but who cares ? */ 240 /* That's not SMP safe ... but who cares ? */
233 ppc_spurious_interrupts++; 241 ppc_spurious_interrupts++;
234 242
@@ -245,196 +253,562 @@ void do_IRQ(struct pt_regs *regs)
245 253
246void __init init_IRQ(void) 254void __init init_IRQ(void)
247{ 255{
256 ppc_md.init_IRQ();
248#ifdef CONFIG_PPC64 257#ifdef CONFIG_PPC64
249 static int once = 0; 258 irq_ctx_init();
259#endif
260}
261
262
263#ifdef CONFIG_IRQSTACKS
264struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
265struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
266
267void irq_ctx_init(void)
268{
269 struct thread_info *tp;
270 int i;
271
272 for_each_possible_cpu(i) {
273 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
274 tp = softirq_ctx[i];
275 tp->cpu = i;
276 tp->preempt_count = SOFTIRQ_OFFSET;
277
278 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
279 tp = hardirq_ctx[i];
280 tp->cpu = i;
281 tp->preempt_count = HARDIRQ_OFFSET;
282 }
283}
284
285static inline void do_softirq_onstack(void)
286{
287 struct thread_info *curtp, *irqtp;
288
289 curtp = current_thread_info();
290 irqtp = softirq_ctx[smp_processor_id()];
291 irqtp->task = curtp->task;
292 call_do_softirq(irqtp);
293 irqtp->task = NULL;
294}
250 295
251 if (once) 296#else
297#define do_softirq_onstack() __do_softirq()
298#endif /* CONFIG_IRQSTACKS */
299
300void do_softirq(void)
301{
302 unsigned long flags;
303
304 if (in_interrupt())
252 return; 305 return;
253 306
254 once++; 307 local_irq_save(flags);
255 308
256#endif 309 if (local_softirq_pending())
257 ppc_md.init_IRQ(); 310 do_softirq_onstack();
258#ifdef CONFIG_PPC64 311
259 irq_ctx_init(); 312 local_irq_restore(flags);
260#endif
261} 313}
314EXPORT_SYMBOL(do_softirq);
315
262 316
263#ifdef CONFIG_PPC64
264/* 317/*
265 * Virtual IRQ mapping code, used on systems with XICS interrupt controllers. 318 * IRQ controller and virtual interrupts
266 */ 319 */
267 320
268#define UNDEFINED_IRQ 0xffffffff 321#ifdef CONFIG_PPC_MERGE
269unsigned int virt_irq_to_real_map[NR_IRQS];
270 322
271/* 323static LIST_HEAD(irq_hosts);
272 * Don't use virtual irqs 0, 1, 2 for devices. 324static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED;
273 * The pcnet32 driver considers interrupt numbers < 2 to be invalid,
274 * and 2 is the XICS IPI interrupt.
275 * We limit virtual irqs to __irq_offet_value less than virt_irq_max so
276 * that when we offset them we don't end up with an interrupt
277 * number >= virt_irq_max.
278 */
279#define MIN_VIRT_IRQ 3
280 325
281unsigned int virt_irq_max; 326struct irq_map_entry irq_map[NR_IRQS];
282static unsigned int max_virt_irq; 327static unsigned int irq_virq_count = NR_IRQS;
283static unsigned int nr_virt_irqs; 328static struct irq_host *irq_default_host;
284 329
285void 330struct irq_host *irq_alloc_host(unsigned int revmap_type,
286virt_irq_init(void) 331 unsigned int revmap_arg,
332 struct irq_host_ops *ops,
333 irq_hw_number_t inval_irq)
287{ 334{
288 int i; 335 struct irq_host *host;
336 unsigned int size = sizeof(struct irq_host);
337 unsigned int i;
338 unsigned int *rmap;
339 unsigned long flags;
289 340
290 if ((virt_irq_max == 0) || (virt_irq_max > (NR_IRQS - 1))) 341 /* Allocate structure and revmap table if using linear mapping */
291 virt_irq_max = NR_IRQS - 1; 342 if (revmap_type == IRQ_HOST_MAP_LINEAR)
292 max_virt_irq = virt_irq_max - __irq_offset_value; 343 size += revmap_arg * sizeof(unsigned int);
293 nr_virt_irqs = max_virt_irq - MIN_VIRT_IRQ + 1; 344 if (mem_init_done)
345 host = kzalloc(size, GFP_KERNEL);
346 else {
347 host = alloc_bootmem(size);
348 if (host)
349 memset(host, 0, size);
350 }
351 if (host == NULL)
352 return NULL;
294 353
295 for (i = 0; i < NR_IRQS; i++) 354 /* Fill structure */
296 virt_irq_to_real_map[i] = UNDEFINED_IRQ; 355 host->revmap_type = revmap_type;
356 host->inval_irq = inval_irq;
357 host->ops = ops;
358
359 spin_lock_irqsave(&irq_big_lock, flags);
360
361 /* If it's a legacy controller, check for duplicates and
362 * mark it as allocated (we use irq 0 host pointer for that
363 */
364 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
365 if (irq_map[0].host != NULL) {
366 spin_unlock_irqrestore(&irq_big_lock, flags);
367 /* If we are early boot, we can't free the structure,
368 * too bad...
369 * this will be fixed once slab is made available early
370 * instead of the current cruft
371 */
372 if (mem_init_done)
373 kfree(host);
374 return NULL;
375 }
376 irq_map[0].host = host;
377 }
378
379 list_add(&host->link, &irq_hosts);
380 spin_unlock_irqrestore(&irq_big_lock, flags);
381
382 /* Additional setups per revmap type */
383 switch(revmap_type) {
384 case IRQ_HOST_MAP_LEGACY:
385 /* 0 is always the invalid number for legacy */
386 host->inval_irq = 0;
387 /* setup us as the host for all legacy interrupts */
388 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
389 irq_map[i].hwirq = 0;
390 smp_wmb();
391 irq_map[i].host = host;
392 smp_wmb();
393
394 /* Clear some flags */
395 get_irq_desc(i)->status
396 &= ~(IRQ_NOREQUEST | IRQ_LEVEL);
397
398 /* Legacy flags are left to default at this point,
399 * one can then use irq_create_mapping() to
400 * explicitely change them
401 */
402 ops->map(host, i, i, 0);
403 }
404 break;
405 case IRQ_HOST_MAP_LINEAR:
406 rmap = (unsigned int *)(host + 1);
407 for (i = 0; i < revmap_arg; i++)
408 rmap[i] = IRQ_NONE;
409 host->revmap_data.linear.size = revmap_arg;
410 smp_wmb();
411 host->revmap_data.linear.revmap = rmap;
412 break;
413 default:
414 break;
415 }
416
417 pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
418
419 return host;
297} 420}
298 421
299/* Create a mapping for a real_irq if it doesn't already exist. 422struct irq_host *irq_find_host(struct device_node *node)
300 * Return the virtual irq as a convenience.
301 */
302int virt_irq_create_mapping(unsigned int real_irq)
303{ 423{
304 unsigned int virq, first_virq; 424 struct irq_host *h, *found = NULL;
305 static int warned; 425 unsigned long flags;
426
427 /* We might want to match the legacy controller last since
428 * it might potentially be set to match all interrupts in
429 * the absence of a device node. This isn't a problem so far
430 * yet though...
431 */
432 spin_lock_irqsave(&irq_big_lock, flags);
433 list_for_each_entry(h, &irq_hosts, link)
434 if (h->ops->match == NULL || h->ops->match(h, node)) {
435 found = h;
436 break;
437 }
438 spin_unlock_irqrestore(&irq_big_lock, flags);
439 return found;
440}
441EXPORT_SYMBOL_GPL(irq_find_host);
442
443void irq_set_default_host(struct irq_host *host)
444{
445 pr_debug("irq: Default host set to @0x%p\n", host);
446
447 irq_default_host = host;
448}
306 449
307 if (ppc64_interrupt_controller == IC_OPEN_PIC) 450void irq_set_virq_count(unsigned int count)
308 return real_irq; /* no mapping for openpic (for now) */ 451{
452 pr_debug("irq: Trying to set virq count to %d\n", count);
309 453
310 if (ppc64_interrupt_controller == IC_CELL_PIC) 454 BUG_ON(count < NUM_ISA_INTERRUPTS);
311 return real_irq; /* no mapping for iic either */ 455 if (count < NR_IRQS)
456 irq_virq_count = count;
457}
312 458
313 /* don't map interrupts < MIN_VIRT_IRQ */ 459unsigned int irq_create_mapping(struct irq_host *host,
314 if (real_irq < MIN_VIRT_IRQ) { 460 irq_hw_number_t hwirq,
315 virt_irq_to_real_map[real_irq] = real_irq; 461 unsigned int flags)
316 return real_irq; 462{
463 unsigned int virq, hint;
464
465 pr_debug("irq: irq_create_mapping(0x%p, 0x%lx, 0x%x)\n",
466 host, hwirq, flags);
467
468 /* Look for default host if nececssary */
469 if (host == NULL)
470 host = irq_default_host;
471 if (host == NULL) {
472 printk(KERN_WARNING "irq_create_mapping called for"
473 " NULL host, hwirq=%lx\n", hwirq);
474 WARN_ON(1);
475 return NO_IRQ;
317 } 476 }
477 pr_debug("irq: -> using host @%p\n", host);
318 478
319 /* map to a number between MIN_VIRT_IRQ and max_virt_irq */ 479 /* Check if mapping already exist, if it does, call
320 virq = real_irq; 480 * host->ops->map() to update the flags
321 if (virq > max_virt_irq) 481 */
322 virq = (virq % nr_virt_irqs) + MIN_VIRT_IRQ; 482 virq = irq_find_mapping(host, hwirq);
323 483 if (virq != IRQ_NONE) {
324 /* search for this number or a free slot */ 484 pr_debug("irq: -> existing mapping on virq %d\n", virq);
325 first_virq = virq; 485 host->ops->map(host, virq, hwirq, flags);
326 while (virt_irq_to_real_map[virq] != UNDEFINED_IRQ) { 486 return virq;
327 if (virt_irq_to_real_map[virq] == real_irq) 487 }
328 return virq; 488
329 if (++virq > max_virt_irq) 489 /* Get a virtual interrupt number */
330 virq = MIN_VIRT_IRQ; 490 if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
331 if (virq == first_virq) 491 /* Handle legacy */
332 goto nospace; /* oops, no free slots */ 492 virq = (unsigned int)hwirq;
493 if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
494 return NO_IRQ;
495 return virq;
496 } else {
497 /* Allocate a virtual interrupt number */
498 hint = hwirq % irq_virq_count;
499 virq = irq_alloc_virt(host, 1, hint);
500 if (virq == NO_IRQ) {
501 pr_debug("irq: -> virq allocation failed\n");
502 return NO_IRQ;
503 }
333 } 504 }
505 pr_debug("irq: -> obtained virq %d\n", virq);
334 506
335 virt_irq_to_real_map[virq] = real_irq; 507 /* Clear some flags */
508 get_irq_desc(virq)->status &= ~(IRQ_NOREQUEST | IRQ_LEVEL);
509
510 /* map it */
511 if (host->ops->map(host, virq, hwirq, flags)) {
512 pr_debug("irq: -> mapping failed, freeing\n");
513 irq_free_virt(virq, 1);
514 return NO_IRQ;
515 }
516 smp_wmb();
517 irq_map[virq].hwirq = hwirq;
518 smp_mb();
336 return virq; 519 return virq;
520}
521EXPORT_SYMBOL_GPL(irq_create_mapping);
337 522
338 nospace: 523extern unsigned int irq_create_of_mapping(struct device_node *controller,
339 if (!warned) { 524 u32 *intspec, unsigned int intsize)
340 printk(KERN_CRIT "Interrupt table is full\n"); 525{
341 printk(KERN_CRIT "Increase virt_irq_max (currently %d) " 526 struct irq_host *host;
342 "in your kernel sources and rebuild.\n", virt_irq_max); 527 irq_hw_number_t hwirq;
343 warned = 1; 528 unsigned int flags = IRQ_TYPE_NONE;
529
530 if (controller == NULL)
531 host = irq_default_host;
532 else
533 host = irq_find_host(controller);
534 if (host == NULL)
535 return NO_IRQ;
536
537 /* If host has no translation, then we assume interrupt line */
538 if (host->ops->xlate == NULL)
539 hwirq = intspec[0];
540 else {
541 if (host->ops->xlate(host, controller, intspec, intsize,
542 &hwirq, &flags))
543 return NO_IRQ;
344 } 544 }
345 return NO_IRQ; 545
546 return irq_create_mapping(host, hwirq, flags);
346} 547}
548EXPORT_SYMBOL_GPL(irq_create_of_mapping);
347 549
348/* 550unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
349 * In most cases will get a hit on the very first slot checked in the
350 * virt_irq_to_real_map. Only when there are a large number of
351 * IRQs will this be expensive.
352 */
353unsigned int real_irq_to_virt_slowpath(unsigned int real_irq)
354{ 551{
355 unsigned int virq; 552 struct of_irq oirq;
356 unsigned int first_virq;
357 553
358 virq = real_irq; 554 if (of_irq_map_one(dev, index, &oirq))
555 return NO_IRQ;
359 556
360 if (virq > max_virt_irq) 557 return irq_create_of_mapping(oirq.controller, oirq.specifier,
361 virq = (virq % nr_virt_irqs) + MIN_VIRT_IRQ; 558 oirq.size);
559}
560EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
362 561
363 first_virq = virq; 562void irq_dispose_mapping(unsigned int virq)
563{
564 struct irq_host *host = irq_map[virq].host;
565 irq_hw_number_t hwirq;
566 unsigned long flags;
364 567
365 do { 568 WARN_ON (host == NULL);
366 if (virt_irq_to_real_map[virq] == real_irq) 569 if (host == NULL)
367 return virq; 570 return;
368 571
369 virq++; 572 /* Never unmap legacy interrupts */
573 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
574 return;
370 575
371 if (virq >= max_virt_irq) 576 /* remove chip and handler */
372 virq = 0; 577 set_irq_chip_and_handler(virq, NULL, NULL);
578
579 /* Make sure it's completed */
580 synchronize_irq(virq);
581
582 /* Tell the PIC about it */
583 if (host->ops->unmap)
584 host->ops->unmap(host, virq);
585 smp_mb();
586
587 /* Clear reverse map */
588 hwirq = irq_map[virq].hwirq;
589 switch(host->revmap_type) {
590 case IRQ_HOST_MAP_LINEAR:
591 if (hwirq < host->revmap_data.linear.size)
592 host->revmap_data.linear.revmap[hwirq] = IRQ_NONE;
593 break;
594 case IRQ_HOST_MAP_TREE:
595 /* Check if radix tree allocated yet */
596 if (host->revmap_data.tree.gfp_mask == 0)
597 break;
598 /* XXX radix tree not safe ! remove lock whem it becomes safe
599 * and use some RCU sync to make sure everything is ok before we
600 * can re-use that map entry
601 */
602 spin_lock_irqsave(&irq_big_lock, flags);
603 radix_tree_delete(&host->revmap_data.tree, hwirq);
604 spin_unlock_irqrestore(&irq_big_lock, flags);
605 break;
606 }
373 607
374 } while (first_virq != virq); 608 /* Destroy map */
609 smp_mb();
610 irq_map[virq].hwirq = host->inval_irq;
375 611
376 return NO_IRQ; 612 /* Set some flags */
613 get_irq_desc(virq)->status |= IRQ_NOREQUEST;
377 614
615 /* Free it */
616 irq_free_virt(virq, 1);
378} 617}
379#endif /* CONFIG_PPC64 */ 618EXPORT_SYMBOL_GPL(irq_dispose_mapping);
380 619
381#ifdef CONFIG_IRQSTACKS 620unsigned int irq_find_mapping(struct irq_host *host,
382struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; 621 irq_hw_number_t hwirq)
383struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; 622{
623 unsigned int i;
624 unsigned int hint = hwirq % irq_virq_count;
625
626 /* Look for default host if nececssary */
627 if (host == NULL)
628 host = irq_default_host;
629 if (host == NULL)
630 return NO_IRQ;
631
632 /* legacy -> bail early */
633 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
634 return hwirq;
635
636 /* Slow path does a linear search of the map */
637 if (hint < NUM_ISA_INTERRUPTS)
638 hint = NUM_ISA_INTERRUPTS;
639 i = hint;
640 do {
641 if (irq_map[i].host == host &&
642 irq_map[i].hwirq == hwirq)
643 return i;
644 i++;
645 if (i >= irq_virq_count)
646 i = NUM_ISA_INTERRUPTS;
647 } while(i != hint);
648 return NO_IRQ;
649}
650EXPORT_SYMBOL_GPL(irq_find_mapping);
384 651
385void irq_ctx_init(void) 652
653unsigned int irq_radix_revmap(struct irq_host *host,
654 irq_hw_number_t hwirq)
386{ 655{
387 struct thread_info *tp; 656 struct radix_tree_root *tree;
388 int i; 657 struct irq_map_entry *ptr;
658 unsigned int virq;
659 unsigned long flags;
389 660
390 for_each_possible_cpu(i) { 661 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
391 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
392 tp = softirq_ctx[i];
393 tp->cpu = i;
394 tp->preempt_count = SOFTIRQ_OFFSET;
395 662
396 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); 663 /* Check if the radix tree exist yet. We test the value of
397 tp = hardirq_ctx[i]; 664 * the gfp_mask for that. Sneaky but saves another int in the
398 tp->cpu = i; 665 * structure. If not, we fallback to slow mode
399 tp->preempt_count = HARDIRQ_OFFSET; 666 */
667 tree = &host->revmap_data.tree;
668 if (tree->gfp_mask == 0)
669 return irq_find_mapping(host, hwirq);
670
671 /* XXX Current radix trees are NOT SMP safe !!! Remove that lock
672 * when that is fixed (when Nick's patch gets in
673 */
674 spin_lock_irqsave(&irq_big_lock, flags);
675
676 /* Now try to resolve */
677 ptr = radix_tree_lookup(tree, hwirq);
678 /* Found it, return */
679 if (ptr) {
680 virq = ptr - irq_map;
681 goto bail;
400 } 682 }
683
684 /* If not there, try to insert it */
685 virq = irq_find_mapping(host, hwirq);
686 if (virq != NO_IRQ)
687 radix_tree_insert(tree, virq, &irq_map[virq]);
688 bail:
689 spin_unlock_irqrestore(&irq_big_lock, flags);
690 return virq;
401} 691}
402 692
403static inline void do_softirq_onstack(void) 693unsigned int irq_linear_revmap(struct irq_host *host,
694 irq_hw_number_t hwirq)
404{ 695{
405 struct thread_info *curtp, *irqtp; 696 unsigned int *revmap;
406 697
407 curtp = current_thread_info(); 698 WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
408 irqtp = softirq_ctx[smp_processor_id()]; 699
409 irqtp->task = curtp->task; 700 /* Check revmap bounds */
410 call_do_softirq(irqtp); 701 if (unlikely(hwirq >= host->revmap_data.linear.size))
411 irqtp->task = NULL; 702 return irq_find_mapping(host, hwirq);
703
704 /* Check if revmap was allocated */
705 revmap = host->revmap_data.linear.revmap;
706 if (unlikely(revmap == NULL))
707 return irq_find_mapping(host, hwirq);
708
709 /* Fill up revmap with slow path if no mapping found */
710 if (unlikely(revmap[hwirq] == NO_IRQ))
711 revmap[hwirq] = irq_find_mapping(host, hwirq);
712
713 return revmap[hwirq];
412} 714}
413 715
414#else 716unsigned int irq_alloc_virt(struct irq_host *host,
415#define do_softirq_onstack() __do_softirq() 717 unsigned int count,
416#endif /* CONFIG_IRQSTACKS */ 718 unsigned int hint)
719{
720 unsigned long flags;
721 unsigned int i, j, found = NO_IRQ;
722 unsigned int limit = irq_virq_count - count;
417 723
418void do_softirq(void) 724 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
725 return NO_IRQ;
726
727 spin_lock_irqsave(&irq_big_lock, flags);
728
729 /* Use hint for 1 interrupt if any */
730 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
731 hint < irq_virq_count && irq_map[hint].host == NULL) {
732 found = hint;
733 goto hint_found;
734 }
735
736 /* Look for count consecutive numbers in the allocatable
737 * (non-legacy) space
738 */
739 for (i = NUM_ISA_INTERRUPTS; i <= limit; ) {
740 for (j = i; j < (i + count); j++)
741 if (irq_map[j].host != NULL) {
742 i = j + 1;
743 continue;
744 }
745 found = i;
746 break;
747 }
748 if (found == NO_IRQ) {
749 spin_unlock_irqrestore(&irq_big_lock, flags);
750 return NO_IRQ;
751 }
752 hint_found:
753 for (i = found; i < (found + count); i++) {
754 irq_map[i].hwirq = host->inval_irq;
755 smp_wmb();
756 irq_map[i].host = host;
757 }
758 spin_unlock_irqrestore(&irq_big_lock, flags);
759 return found;
760}
761
762void irq_free_virt(unsigned int virq, unsigned int count)
419{ 763{
420 unsigned long flags; 764 unsigned long flags;
765 unsigned int i;
421 766
422 if (in_interrupt()) 767 WARN_ON (virq < NUM_ISA_INTERRUPTS);
423 return; 768 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
424 769
425 local_irq_save(flags); 770 spin_lock_irqsave(&irq_big_lock, flags);
771 for (i = virq; i < (virq + count); i++) {
772 struct irq_host *host;
426 773
427 if (local_softirq_pending()) { 774 if (i < NUM_ISA_INTERRUPTS ||
428 account_system_vtime(current); 775 (virq + count) > irq_virq_count)
429 local_bh_disable(); 776 continue;
430 do_softirq_onstack(); 777
431 account_system_vtime(current); 778 host = irq_map[i].host;
432 __local_bh_enable(); 779 irq_map[i].hwirq = host->inval_irq;
780 smp_wmb();
781 irq_map[i].host = NULL;
433 } 782 }
783 spin_unlock_irqrestore(&irq_big_lock, flags);
784}
434 785
435 local_irq_restore(flags); 786void irq_early_init(void)
787{
788 unsigned int i;
789
790 for (i = 0; i < NR_IRQS; i++)
791 get_irq_desc(i)->status |= IRQ_NOREQUEST;
436} 792}
437EXPORT_SYMBOL(do_softirq); 793
794/* We need to create the radix trees late */
795static int irq_late_init(void)
796{
797 struct irq_host *h;
798 unsigned long flags;
799
800 spin_lock_irqsave(&irq_big_lock, flags);
801 list_for_each_entry(h, &irq_hosts, link) {
802 if (h->revmap_type == IRQ_HOST_MAP_TREE)
803 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
804 }
805 spin_unlock_irqrestore(&irq_big_lock, flags);
806
807 return 0;
808}
809arch_initcall(irq_late_init);
810
811#endif /* CONFIG_PPC_MERGE */
438 812
439#ifdef CONFIG_PCI_MSI 813#ifdef CONFIG_PCI_MSI
440int pci_enable_msi(struct pci_dev * pdev) 814int pci_enable_msi(struct pci_dev * pdev)
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 4cf0b971976b..7e98e778b52f 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -28,6 +28,7 @@ static struct legacy_serial_info {
28 struct device_node *np; 28 struct device_node *np;
29 unsigned int speed; 29 unsigned int speed;
30 unsigned int clock; 30 unsigned int clock;
31 int irq_check_parent;
31 phys_addr_t taddr; 32 phys_addr_t taddr;
32} legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS]; 33} legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS];
33static unsigned int legacy_serial_count; 34static unsigned int legacy_serial_count;
@@ -36,7 +37,7 @@ static int legacy_serial_console = -1;
36static int __init add_legacy_port(struct device_node *np, int want_index, 37static int __init add_legacy_port(struct device_node *np, int want_index,
37 int iotype, phys_addr_t base, 38 int iotype, phys_addr_t base,
38 phys_addr_t taddr, unsigned long irq, 39 phys_addr_t taddr, unsigned long irq,
39 upf_t flags) 40 upf_t flags, int irq_check_parent)
40{ 41{
41 u32 *clk, *spd, clock = BASE_BAUD * 16; 42 u32 *clk, *spd, clock = BASE_BAUD * 16;
42 int index; 43 int index;
@@ -68,7 +69,7 @@ static int __init add_legacy_port(struct device_node *np, int want_index,
68 if (legacy_serial_infos[index].np != 0) { 69 if (legacy_serial_infos[index].np != 0) {
69 /* if we still have some room, move it, else override */ 70 /* if we still have some room, move it, else override */
70 if (legacy_serial_count < MAX_LEGACY_SERIAL_PORTS) { 71 if (legacy_serial_count < MAX_LEGACY_SERIAL_PORTS) {
71 printk(KERN_INFO "Moved legacy port %d -> %d\n", 72 printk(KERN_DEBUG "Moved legacy port %d -> %d\n",
72 index, legacy_serial_count); 73 index, legacy_serial_count);
73 legacy_serial_ports[legacy_serial_count] = 74 legacy_serial_ports[legacy_serial_count] =
74 legacy_serial_ports[index]; 75 legacy_serial_ports[index];
@@ -76,7 +77,7 @@ static int __init add_legacy_port(struct device_node *np, int want_index,
76 legacy_serial_infos[index]; 77 legacy_serial_infos[index];
77 legacy_serial_count++; 78 legacy_serial_count++;
78 } else { 79 } else {
79 printk(KERN_INFO "Replacing legacy port %d\n", index); 80 printk(KERN_DEBUG "Replacing legacy port %d\n", index);
80 } 81 }
81 } 82 }
82 83
@@ -95,10 +96,11 @@ static int __init add_legacy_port(struct device_node *np, int want_index,
95 legacy_serial_infos[index].np = of_node_get(np); 96 legacy_serial_infos[index].np = of_node_get(np);
96 legacy_serial_infos[index].clock = clock; 97 legacy_serial_infos[index].clock = clock;
97 legacy_serial_infos[index].speed = spd ? *spd : 0; 98 legacy_serial_infos[index].speed = spd ? *spd : 0;
99 legacy_serial_infos[index].irq_check_parent = irq_check_parent;
98 100
99 printk(KERN_INFO "Found legacy serial port %d for %s\n", 101 printk(KERN_DEBUG "Found legacy serial port %d for %s\n",
100 index, np->full_name); 102 index, np->full_name);
101 printk(KERN_INFO " %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n", 103 printk(KERN_DEBUG " %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n",
102 (iotype == UPIO_PORT) ? "port" : "mem", 104 (iotype == UPIO_PORT) ? "port" : "mem",
103 (unsigned long long)base, (unsigned long long)taddr, irq, 105 (unsigned long long)base, (unsigned long long)taddr, irq,
104 legacy_serial_ports[index].uartclk, 106 legacy_serial_ports[index].uartclk,
@@ -126,11 +128,13 @@ static int __init add_legacy_soc_port(struct device_node *np,
126 return -1; 128 return -1;
127 129
128 addr = of_translate_address(soc_dev, addrp); 130 addr = of_translate_address(soc_dev, addrp);
131 if (addr == OF_BAD_ADDR)
132 return -1;
129 133
130 /* Add port, irq will be dealt with later. We passed a translated 134 /* Add port, irq will be dealt with later. We passed a translated
131 * IO port value. It will be fixed up later along with the irq 135 * IO port value. It will be fixed up later along with the irq
132 */ 136 */
133 return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags); 137 return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags, 0);
134} 138}
135 139
136static int __init add_legacy_isa_port(struct device_node *np, 140static int __init add_legacy_isa_port(struct device_node *np,
@@ -141,6 +145,8 @@ static int __init add_legacy_isa_port(struct device_node *np,
141 int index = -1; 145 int index = -1;
142 phys_addr_t taddr; 146 phys_addr_t taddr;
143 147
148 DBG(" -> add_legacy_isa_port(%s)\n", np->full_name);
149
144 /* Get the ISA port number */ 150 /* Get the ISA port number */
145 reg = (u32 *)get_property(np, "reg", NULL); 151 reg = (u32 *)get_property(np, "reg", NULL);
146 if (reg == NULL) 152 if (reg == NULL)
@@ -161,9 +167,12 @@ static int __init add_legacy_isa_port(struct device_node *np,
161 167
162 /* Translate ISA address */ 168 /* Translate ISA address */
163 taddr = of_translate_address(np, reg); 169 taddr = of_translate_address(np, reg);
170 if (taddr == OF_BAD_ADDR)
171 return -1;
164 172
165 /* Add port, irq will be dealt with later */ 173 /* Add port, irq will be dealt with later */
166 return add_legacy_port(np, index, UPIO_PORT, reg[1], taddr, NO_IRQ, UPF_BOOT_AUTOCONF); 174 return add_legacy_port(np, index, UPIO_PORT, reg[1], taddr,
175 NO_IRQ, UPF_BOOT_AUTOCONF, 0);
167 176
168} 177}
169 178
@@ -176,6 +185,8 @@ static int __init add_legacy_pci_port(struct device_node *np,
176 unsigned int flags; 185 unsigned int flags;
177 int iotype, index = -1, lindex = 0; 186 int iotype, index = -1, lindex = 0;
178 187
188 DBG(" -> add_legacy_pci_port(%s)\n", np->full_name);
189
179 /* We only support ports that have a clock frequency properly 190 /* We only support ports that have a clock frequency properly
180 * encoded in the device-tree (that is have an fcode). Anything 191 * encoded in the device-tree (that is have an fcode). Anything
181 * else can't be used that early and will be normally probed by 192 * else can't be used that early and will be normally probed by
@@ -194,6 +205,8 @@ static int __init add_legacy_pci_port(struct device_node *np,
194 /* We only support BAR 0 for now */ 205 /* We only support BAR 0 for now */
195 iotype = (flags & IORESOURCE_MEM) ? UPIO_MEM : UPIO_PORT; 206 iotype = (flags & IORESOURCE_MEM) ? UPIO_MEM : UPIO_PORT;
196 addr = of_translate_address(pci_dev, addrp); 207 addr = of_translate_address(pci_dev, addrp);
208 if (addr == OF_BAD_ADDR)
209 return -1;
197 210
198 /* Set the IO base to the same as the translated address for MMIO, 211 /* Set the IO base to the same as the translated address for MMIO,
199 * or to the domain local IO base for PIO (it will be fixed up later) 212 * or to the domain local IO base for PIO (it will be fixed up later)
@@ -231,7 +244,8 @@ static int __init add_legacy_pci_port(struct device_node *np,
231 /* Add port, irq will be dealt with later. We passed a translated 244 /* Add port, irq will be dealt with later. We passed a translated
232 * IO port value. It will be fixed up later along with the irq 245 * IO port value. It will be fixed up later along with the irq
233 */ 246 */
234 return add_legacy_port(np, index, iotype, base, addr, NO_IRQ, UPF_BOOT_AUTOCONF); 247 return add_legacy_port(np, index, iotype, base, addr, NO_IRQ,
248 UPF_BOOT_AUTOCONF, np != pci_dev);
235} 249}
236#endif 250#endif
237 251
@@ -362,27 +376,22 @@ static void __init fixup_port_irq(int index,
362 struct device_node *np, 376 struct device_node *np,
363 struct plat_serial8250_port *port) 377 struct plat_serial8250_port *port)
364{ 378{
379 unsigned int virq;
380
365 DBG("fixup_port_irq(%d)\n", index); 381 DBG("fixup_port_irq(%d)\n", index);
366 382
367 /* Check for interrupts in that node */ 383 virq = irq_of_parse_and_map(np, 0);
368 if (np->n_intrs > 0) { 384 if (virq == NO_IRQ && legacy_serial_infos[index].irq_check_parent) {
369 port->irq = np->intrs[0].line; 385 np = of_get_parent(np);
370 DBG(" port %d (%s), irq=%d\n", 386 if (np == NULL)
371 index, np->full_name, port->irq); 387 return;
372 return; 388 virq = irq_of_parse_and_map(np, 0);
389 of_node_put(np);
373 } 390 }
374 391 if (virq == NO_IRQ)
375 /* Check for interrupts in the parent */
376 np = of_get_parent(np);
377 if (np == NULL)
378 return; 392 return;
379 393
380 if (np->n_intrs > 0) { 394 port->irq = virq;
381 port->irq = np->intrs[0].line;
382 DBG(" port %d (%s), irq=%d\n",
383 index, np->full_name, port->irq);
384 }
385 of_node_put(np);
386} 395}
387 396
388static void __init fixup_port_pio(int index, 397static void __init fixup_port_pio(int index,
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 0c3c70d115c6..bfb407fc1aa1 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -51,12 +51,14 @@ _GLOBAL(call_do_softirq)
51 mtlr r0 51 mtlr r0
52 blr 52 blr
53 53
54_GLOBAL(call___do_IRQ) 54_GLOBAL(call_handle_irq)
55 ld r8,0(r7)
55 mflr r0 56 mflr r0
56 std r0,16(r1) 57 std r0,16(r1)
57 stdu r1,THREAD_SIZE-112(r5) 58 mtctr r8
58 mr r1,r5 59 stdu r1,THREAD_SIZE-112(r6)
59 bl .__do_IRQ 60 mr r1,r6
61 bctrl
60 ld r1,0(r1) 62 ld r1,0(r1)
61 ld r0,16(r1) 63 ld r0,16(r1)
62 mtlr r0 64 mtlr r0
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 1333335c474e..898dae8ab6d9 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -1404,6 +1404,43 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
1404 /* XXX FIXME - update OF device tree node interrupt property */ 1404 /* XXX FIXME - update OF device tree node interrupt property */
1405} 1405}
1406 1406
1407#ifdef CONFIG_PPC_MERGE
1408/* XXX This is a copy of the ppc64 version. This is temporary until we start
1409 * merging the 2 PCI layers
1410 */
1411/*
1412 * Reads the interrupt pin to determine if interrupt is use by card.
1413 * If the interrupt is used, then gets the interrupt line from the
1414 * openfirmware and sets it in the pci_dev and pci_config line.
1415 */
1416int pci_read_irq_line(struct pci_dev *pci_dev)
1417{
1418 struct of_irq oirq;
1419 unsigned int virq;
1420
1421 DBG("Try to map irq for %s...\n", pci_name(pci_dev));
1422
1423 if (of_irq_map_pci(pci_dev, &oirq)) {
1424 DBG(" -> failed !\n");
1425 return -1;
1426 }
1427
1428 DBG(" -> got one, spec %d cells (0x%08x...) on %s\n",
1429 oirq.size, oirq.specifier[0], oirq.controller->full_name);
1430
1431 virq = irq_create_of_mapping(oirq.controller, oirq.specifier, oirq.size);
1432 if(virq == NO_IRQ) {
1433 DBG(" -> failed to map !\n");
1434 return -1;
1435 }
1436 pci_dev->irq = virq;
1437 pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, virq);
1438
1439 return 0;
1440}
1441EXPORT_SYMBOL(pci_read_irq_line);
1442#endif /* CONFIG_PPC_MERGE */
1443
1407int pcibios_enable_device(struct pci_dev *dev, int mask) 1444int pcibios_enable_device(struct pci_dev *dev, int mask)
1408{ 1445{
1409 u16 cmd, old_cmd; 1446 u16 cmd, old_cmd;
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index bea8451fb57b..efc0b5559ee0 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -398,12 +398,8 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
398 } else { 398 } else {
399 dev->hdr_type = PCI_HEADER_TYPE_NORMAL; 399 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
400 dev->rom_base_reg = PCI_ROM_ADDRESS; 400 dev->rom_base_reg = PCI_ROM_ADDRESS;
401 /* Maybe do a default OF mapping here */
401 dev->irq = NO_IRQ; 402 dev->irq = NO_IRQ;
402 if (node->n_intrs > 0) {
403 dev->irq = node->intrs[0].line;
404 pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
405 dev->irq);
406 }
407 } 403 }
408 404
409 pci_parse_of_addrs(node, dev); 405 pci_parse_of_addrs(node, dev);
@@ -1288,23 +1284,26 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
1288 */ 1284 */
1289int pci_read_irq_line(struct pci_dev *pci_dev) 1285int pci_read_irq_line(struct pci_dev *pci_dev)
1290{ 1286{
1291 u8 intpin; 1287 struct of_irq oirq;
1292 struct device_node *node; 1288 unsigned int virq;
1293
1294 pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &intpin);
1295 if (intpin == 0)
1296 return 0;
1297 1289
1298 node = pci_device_to_OF_node(pci_dev); 1290 DBG("Try to map irq for %s...\n", pci_name(pci_dev));
1299 if (node == NULL)
1300 return -1;
1301 1291
1302 if (node->n_intrs == 0) 1292 if (of_irq_map_pci(pci_dev, &oirq)) {
1293 DBG(" -> failed !\n");
1303 return -1; 1294 return -1;
1295 }
1304 1296
1305 pci_dev->irq = node->intrs[0].line; 1297 DBG(" -> got one, spec %d cells (0x%08x...) on %s\n",
1298 oirq.size, oirq.specifier[0], oirq.controller->full_name);
1306 1299
1307 pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, pci_dev->irq); 1300 virq = irq_create_of_mapping(oirq.controller, oirq.specifier, oirq.size);
1301 if(virq == NO_IRQ) {
1302 DBG(" -> failed to map !\n");
1303 return -1;
1304 }
1305 pci_dev->irq = virq;
1306 pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, virq);
1308 1307
1309 return 0; 1308 return 0;
1310} 1309}
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 4c524cb52184..a1787ffb6319 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -30,6 +30,7 @@
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/kexec.h> 31#include <linux/kexec.h>
32#include <linux/debugfs.h> 32#include <linux/debugfs.h>
33#include <linux/irq.h>
33 34
34#include <asm/prom.h> 35#include <asm/prom.h>
35#include <asm/rtas.h> 36#include <asm/rtas.h>
@@ -86,424 +87,6 @@ static DEFINE_RWLOCK(devtree_lock);
86/* export that to outside world */ 87/* export that to outside world */
87struct device_node *of_chosen; 88struct device_node *of_chosen;
88 89
89struct device_node *dflt_interrupt_controller;
90int num_interrupt_controllers;
91
92/*
93 * Wrapper for allocating memory for various data that needs to be
94 * attached to device nodes as they are processed at boot or when
95 * added to the device tree later (e.g. DLPAR). At boot there is
96 * already a region reserved so we just increment *mem_start by size;
97 * otherwise we call kmalloc.
98 */
99static void * prom_alloc(unsigned long size, unsigned long *mem_start)
100{
101 unsigned long tmp;
102
103 if (!mem_start)
104 return kmalloc(size, GFP_KERNEL);
105
106 tmp = *mem_start;
107 *mem_start += size;
108 return (void *)tmp;
109}
110
111/*
112 * Find the device_node with a given phandle.
113 */
114static struct device_node * find_phandle(phandle ph)
115{
116 struct device_node *np;
117
118 for (np = allnodes; np != 0; np = np->allnext)
119 if (np->linux_phandle == ph)
120 return np;
121 return NULL;
122}
123
124/*
125 * Find the interrupt parent of a node.
126 */
127static struct device_node * __devinit intr_parent(struct device_node *p)
128{
129 phandle *parp;
130
131 parp = (phandle *) get_property(p, "interrupt-parent", NULL);
132 if (parp == NULL)
133 return p->parent;
134 p = find_phandle(*parp);
135 if (p != NULL)
136 return p;
137 /*
138 * On a powermac booted with BootX, we don't get to know the
139 * phandles for any nodes, so find_phandle will return NULL.
140 * Fortunately these machines only have one interrupt controller
141 * so there isn't in fact any ambiguity. -- paulus
142 */
143 if (num_interrupt_controllers == 1)
144 p = dflt_interrupt_controller;
145 return p;
146}
147
148/*
149 * Find out the size of each entry of the interrupts property
150 * for a node.
151 */
152int __devinit prom_n_intr_cells(struct device_node *np)
153{
154 struct device_node *p;
155 unsigned int *icp;
156
157 for (p = np; (p = intr_parent(p)) != NULL; ) {
158 icp = (unsigned int *)
159 get_property(p, "#interrupt-cells", NULL);
160 if (icp != NULL)
161 return *icp;
162 if (get_property(p, "interrupt-controller", NULL) != NULL
163 || get_property(p, "interrupt-map", NULL) != NULL) {
164 printk("oops, node %s doesn't have #interrupt-cells\n",
165 p->full_name);
166 return 1;
167 }
168 }
169#ifdef DEBUG_IRQ
170 printk("prom_n_intr_cells failed for %s\n", np->full_name);
171#endif
172 return 1;
173}
174
175/*
176 * Map an interrupt from a device up to the platform interrupt
177 * descriptor.
178 */
179static int __devinit map_interrupt(unsigned int **irq, struct device_node **ictrler,
180 struct device_node *np, unsigned int *ints,
181 int nintrc)
182{
183 struct device_node *p, *ipar;
184 unsigned int *imap, *imask, *ip;
185 int i, imaplen, match;
186 int newintrc = 0, newaddrc = 0;
187 unsigned int *reg;
188 int naddrc;
189
190 reg = (unsigned int *) get_property(np, "reg", NULL);
191 naddrc = prom_n_addr_cells(np);
192 p = intr_parent(np);
193 while (p != NULL) {
194 if (get_property(p, "interrupt-controller", NULL) != NULL)
195 /* this node is an interrupt controller, stop here */
196 break;
197 imap = (unsigned int *)
198 get_property(p, "interrupt-map", &imaplen);
199 if (imap == NULL) {
200 p = intr_parent(p);
201 continue;
202 }
203 imask = (unsigned int *)
204 get_property(p, "interrupt-map-mask", NULL);
205 if (imask == NULL) {
206 printk("oops, %s has interrupt-map but no mask\n",
207 p->full_name);
208 return 0;
209 }
210 imaplen /= sizeof(unsigned int);
211 match = 0;
212 ipar = NULL;
213 while (imaplen > 0 && !match) {
214 /* check the child-interrupt field */
215 match = 1;
216 for (i = 0; i < naddrc && match; ++i)
217 match = ((reg[i] ^ imap[i]) & imask[i]) == 0;
218 for (; i < naddrc + nintrc && match; ++i)
219 match = ((ints[i-naddrc] ^ imap[i]) & imask[i]) == 0;
220 imap += naddrc + nintrc;
221 imaplen -= naddrc + nintrc;
222 /* grab the interrupt parent */
223 ipar = find_phandle((phandle) *imap++);
224 --imaplen;
225 if (ipar == NULL && num_interrupt_controllers == 1)
226 /* cope with BootX not giving us phandles */
227 ipar = dflt_interrupt_controller;
228 if (ipar == NULL) {
229 printk("oops, no int parent %x in map of %s\n",
230 imap[-1], p->full_name);
231 return 0;
232 }
233 /* find the parent's # addr and intr cells */
234 ip = (unsigned int *)
235 get_property(ipar, "#interrupt-cells", NULL);
236 if (ip == NULL) {
237 printk("oops, no #interrupt-cells on %s\n",
238 ipar->full_name);
239 return 0;
240 }
241 newintrc = *ip;
242 ip = (unsigned int *)
243 get_property(ipar, "#address-cells", NULL);
244 newaddrc = (ip == NULL)? 0: *ip;
245 imap += newaddrc + newintrc;
246 imaplen -= newaddrc + newintrc;
247 }
248 if (imaplen < 0) {
249 printk("oops, error decoding int-map on %s, len=%d\n",
250 p->full_name, imaplen);
251 return 0;
252 }
253 if (!match) {
254#ifdef DEBUG_IRQ
255 printk("oops, no match in %s int-map for %s\n",
256 p->full_name, np->full_name);
257#endif
258 return 0;
259 }
260 p = ipar;
261 naddrc = newaddrc;
262 nintrc = newintrc;
263 ints = imap - nintrc;
264 reg = ints - naddrc;
265 }
266 if (p == NULL) {
267#ifdef DEBUG_IRQ
268 printk("hmmm, int tree for %s doesn't have ctrler\n",
269 np->full_name);
270#endif
271 return 0;
272 }
273 *irq = ints;
274 *ictrler = p;
275 return nintrc;
276}
277
278static unsigned char map_isa_senses[4] = {
279 IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE,
280 IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE,
281 IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE,
282 IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE
283};
284
285static unsigned char map_mpic_senses[4] = {
286 IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE,
287 IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE,
288 /* 2 seems to be used for the 8259 cascade... */
289 IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE,
290 IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE,
291};
292
293static int __devinit finish_node_interrupts(struct device_node *np,
294 unsigned long *mem_start,
295 int measure_only)
296{
297 unsigned int *ints;
298 int intlen, intrcells, intrcount;
299 int i, j, n, sense;
300 unsigned int *irq, virq;
301 struct device_node *ic;
302 int trace = 0;
303
304 //#define TRACE(fmt...) do { if (trace) { printk(fmt); mdelay(1000); } } while(0)
305#define TRACE(fmt...)
306
307 if (!strcmp(np->name, "smu-doorbell"))
308 trace = 1;
309
310 TRACE("Finishing SMU doorbell ! num_interrupt_controllers = %d\n",
311 num_interrupt_controllers);
312
313 if (num_interrupt_controllers == 0) {
314 /*
315 * Old machines just have a list of interrupt numbers
316 * and no interrupt-controller nodes.
317 */
318 ints = (unsigned int *) get_property(np, "AAPL,interrupts",
319 &intlen);
320 /* XXX old interpret_pci_props looked in parent too */
321 /* XXX old interpret_macio_props looked for interrupts
322 before AAPL,interrupts */
323 if (ints == NULL)
324 ints = (unsigned int *) get_property(np, "interrupts",
325 &intlen);
326 if (ints == NULL)
327 return 0;
328
329 np->n_intrs = intlen / sizeof(unsigned int);
330 np->intrs = prom_alloc(np->n_intrs * sizeof(np->intrs[0]),
331 mem_start);
332 if (!np->intrs)
333 return -ENOMEM;
334 if (measure_only)
335 return 0;
336
337 for (i = 0; i < np->n_intrs; ++i) {
338 np->intrs[i].line = *ints++;
339 np->intrs[i].sense = IRQ_SENSE_LEVEL
340 | IRQ_POLARITY_NEGATIVE;
341 }
342 return 0;
343 }
344
345 ints = (unsigned int *) get_property(np, "interrupts", &intlen);
346 TRACE("ints=%p, intlen=%d\n", ints, intlen);
347 if (ints == NULL)
348 return 0;
349 intrcells = prom_n_intr_cells(np);
350 intlen /= intrcells * sizeof(unsigned int);
351 TRACE("intrcells=%d, new intlen=%d\n", intrcells, intlen);
352 np->intrs = prom_alloc(intlen * sizeof(*(np->intrs)), mem_start);
353 if (!np->intrs)
354 return -ENOMEM;
355
356 if (measure_only)
357 return 0;
358
359 intrcount = 0;
360 for (i = 0; i < intlen; ++i, ints += intrcells) {
361 n = map_interrupt(&irq, &ic, np, ints, intrcells);
362 TRACE("map, irq=%d, ic=%p, n=%d\n", irq, ic, n);
363 if (n <= 0)
364 continue;
365
366 /* don't map IRQ numbers under a cascaded 8259 controller */
367 if (ic && device_is_compatible(ic, "chrp,iic")) {
368 np->intrs[intrcount].line = irq[0];
369 sense = (n > 1)? (irq[1] & 3): 3;
370 np->intrs[intrcount].sense = map_isa_senses[sense];
371 } else {
372 virq = virt_irq_create_mapping(irq[0]);
373 TRACE("virq=%d\n", virq);
374#ifdef CONFIG_PPC64
375 if (virq == NO_IRQ) {
376 printk(KERN_CRIT "Could not allocate interrupt"
377 " number for %s\n", np->full_name);
378 continue;
379 }
380#endif
381 np->intrs[intrcount].line = irq_offset_up(virq);
382 sense = (n > 1)? (irq[1] & 3): 1;
383
384 /* Apple uses bits in there in a different way, let's
385 * only keep the real sense bit on macs
386 */
387 if (machine_is(powermac))
388 sense &= 0x1;
389 np->intrs[intrcount].sense = map_mpic_senses[sense];
390 }
391
392#ifdef CONFIG_PPC64
393 /* We offset irq numbers for the u3 MPIC by 128 in PowerMac */
394 if (machine_is(powermac) && ic && ic->parent) {
395 char *name = get_property(ic->parent, "name", NULL);
396 if (name && !strcmp(name, "u3"))
397 np->intrs[intrcount].line += 128;
398 else if (!(name && (!strcmp(name, "mac-io") ||
399 !strcmp(name, "u4"))))
400 /* ignore other cascaded controllers, such as
401 the k2-sata-root */
402 break;
403 }
404#endif /* CONFIG_PPC64 */
405 if (n > 2) {
406 printk("hmmm, got %d intr cells for %s:", n,
407 np->full_name);
408 for (j = 0; j < n; ++j)
409 printk(" %d", irq[j]);
410 printk("\n");
411 }
412 ++intrcount;
413 }
414 np->n_intrs = intrcount;
415
416 return 0;
417}
418
419static int __devinit finish_node(struct device_node *np,
420 unsigned long *mem_start,
421 int measure_only)
422{
423 struct device_node *child;
424 int rc = 0;
425
426 rc = finish_node_interrupts(np, mem_start, measure_only);
427 if (rc)
428 goto out;
429
430 for (child = np->child; child != NULL; child = child->sibling) {
431 rc = finish_node(child, mem_start, measure_only);
432 if (rc)
433 goto out;
434 }
435out:
436 return rc;
437}
438
439static void __init scan_interrupt_controllers(void)
440{
441 struct device_node *np;
442 int n = 0;
443 char *name, *ic;
444 int iclen;
445
446 for (np = allnodes; np != NULL; np = np->allnext) {
447 ic = get_property(np, "interrupt-controller", &iclen);
448 name = get_property(np, "name", NULL);
449 /* checking iclen makes sure we don't get a false
450 match on /chosen.interrupt_controller */
451 if ((name != NULL
452 && strcmp(name, "interrupt-controller") == 0)
453 || (ic != NULL && iclen == 0
454 && strcmp(name, "AppleKiwi"))) {
455 if (n == 0)
456 dflt_interrupt_controller = np;
457 ++n;
458 }
459 }
460 num_interrupt_controllers = n;
461}
462
463/**
464 * finish_device_tree is called once things are running normally
465 * (i.e. with text and data mapped to the address they were linked at).
466 * It traverses the device tree and fills in some of the additional,
467 * fields in each node like {n_}addrs and {n_}intrs, the virt interrupt
468 * mapping is also initialized at this point.
469 */
470void __init finish_device_tree(void)
471{
472 unsigned long start, end, size = 0;
473
474 DBG(" -> finish_device_tree\n");
475
476#ifdef CONFIG_PPC64
477 /* Initialize virtual IRQ map */
478 virt_irq_init();
479#endif
480 scan_interrupt_controllers();
481
482 /*
483 * Finish device-tree (pre-parsing some properties etc...)
484 * We do this in 2 passes. One with "measure_only" set, which
485 * will only measure the amount of memory needed, then we can
486 * allocate that memory, and call finish_node again. However,
487 * we must be careful as most routines will fail nowadays when
488 * prom_alloc() returns 0, so we must make sure our first pass
489 * doesn't start at 0. We pre-initialize size to 16 for that
490 * reason and then remove those additional 16 bytes
491 */
492 size = 16;
493 finish_node(allnodes, &size, 1);
494 size -= 16;
495
496 if (0 == size)
497 end = start = 0;
498 else
499 end = start = (unsigned long)__va(lmb_alloc(size, 128));
500
501 finish_node(allnodes, &end, 0);
502 BUG_ON(end != start + size);
503
504 DBG(" <- finish_device_tree\n");
505}
506
507static inline char *find_flat_dt_string(u32 offset) 90static inline char *find_flat_dt_string(u32 offset)
508{ 91{
509 return ((char *)initial_boot_params) + 92 return ((char *)initial_boot_params) +
@@ -1389,27 +972,6 @@ prom_n_size_cells(struct device_node* np)
1389EXPORT_SYMBOL(prom_n_size_cells); 972EXPORT_SYMBOL(prom_n_size_cells);
1390 973
1391/** 974/**
1392 * Work out the sense (active-low level / active-high edge)
1393 * of each interrupt from the device tree.
1394 */
1395void __init prom_get_irq_senses(unsigned char *senses, int off, int max)
1396{
1397 struct device_node *np;
1398 int i, j;
1399
1400 /* default to level-triggered */
1401 memset(senses, IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE, max - off);
1402
1403 for (np = allnodes; np != 0; np = np->allnext) {
1404 for (j = 0; j < np->n_intrs; j++) {
1405 i = np->intrs[j].line;
1406 if (i >= off && i < max)
1407 senses[i-off] = np->intrs[j].sense;
1408 }
1409 }
1410}
1411
1412/**
1413 * Construct and return a list of the device_nodes with a given name. 975 * Construct and return a list of the device_nodes with a given name.
1414 */ 976 */
1415struct device_node *find_devices(const char *name) 977struct device_node *find_devices(const char *name)
@@ -1808,7 +1370,6 @@ static void of_node_release(struct kref *kref)
1808 node->deadprops = NULL; 1370 node->deadprops = NULL;
1809 } 1371 }
1810 } 1372 }
1811 kfree(node->intrs);
1812 kfree(node->full_name); 1373 kfree(node->full_name);
1813 kfree(node->data); 1374 kfree(node->data);
1814 kfree(node); 1375 kfree(node);
@@ -1881,13 +1442,7 @@ void of_detach_node(const struct device_node *np)
1881#ifdef CONFIG_PPC_PSERIES 1442#ifdef CONFIG_PPC_PSERIES
1882/* 1443/*
1883 * Fix up the uninitialized fields in a new device node: 1444 * Fix up the uninitialized fields in a new device node:
1884 * name, type, n_addrs, addrs, n_intrs, intrs, and pci-specific fields 1445 * name, type and pci-specific fields
1885 *
1886 * A lot of boot-time code is duplicated here, because functions such
1887 * as finish_node_interrupts, interpret_pci_props, etc. cannot use the
1888 * slab allocator.
1889 *
1890 * This should probably be split up into smaller chunks.
1891 */ 1446 */
1892 1447
1893static int of_finish_dynamic_node(struct device_node *node) 1448static int of_finish_dynamic_node(struct device_node *node)
@@ -1928,8 +1483,6 @@ static int prom_reconfig_notifier(struct notifier_block *nb,
1928 switch (action) { 1483 switch (action) {
1929 case PSERIES_RECONFIG_ADD: 1484 case PSERIES_RECONFIG_ADD:
1930 err = of_finish_dynamic_node(node); 1485 err = of_finish_dynamic_node(node);
1931 if (!err)
1932 finish_node(node, NULL, 0);
1933 if (err < 0) { 1486 if (err < 0) {
1934 printk(KERN_ERR "finish_node returned %d\n", err); 1487 printk(KERN_ERR "finish_node returned %d\n", err);
1935 err = NOTIFY_BAD; 1488 err = NOTIFY_BAD;
@@ -1975,8 +1528,7 @@ struct property *of_find_property(struct device_node *np, const char *name,
1975 * Find a property with a given name for a given node 1528 * Find a property with a given name for a given node
1976 * and return the value. 1529 * and return the value.
1977 */ 1530 */
1978unsigned char *get_property(struct device_node *np, const char *name, 1531void *get_property(struct device_node *np, const char *name, int *lenp)
1979 int *lenp)
1980{ 1532{
1981 struct property *pp = of_find_property(np,name,lenp); 1533 struct property *pp = of_find_property(np,name,lenp);
1982 return pp ? pp->value : NULL; 1534 return pp ? pp->value : NULL;
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 1e95a9f8cda1..ebd501a59abd 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1990,12 +1990,22 @@ static void __init flatten_device_tree(void)
1990static void __init fixup_device_tree_maple(void) 1990static void __init fixup_device_tree_maple(void)
1991{ 1991{
1992 phandle isa; 1992 phandle isa;
1993 u32 rloc = 0x01002000; /* IO space; PCI device = 4 */
1993 u32 isa_ranges[6]; 1994 u32 isa_ranges[6];
1994 1995 char *name;
1995 isa = call_prom("finddevice", 1, 1, ADDR("/ht@0/isa@4")); 1996
1997 name = "/ht@0/isa@4";
1998 isa = call_prom("finddevice", 1, 1, ADDR(name));
1999 if (!PHANDLE_VALID(isa)) {
2000 name = "/ht@0/isa@6";
2001 isa = call_prom("finddevice", 1, 1, ADDR(name));
2002 rloc = 0x01003000; /* IO space; PCI device = 6 */
2003 }
1996 if (!PHANDLE_VALID(isa)) 2004 if (!PHANDLE_VALID(isa))
1997 return; 2005 return;
1998 2006
2007 if (prom_getproplen(isa, "ranges") != 12)
2008 return;
1999 if (prom_getprop(isa, "ranges", isa_ranges, sizeof(isa_ranges)) 2009 if (prom_getprop(isa, "ranges", isa_ranges, sizeof(isa_ranges))
2000 == PROM_ERROR) 2010 == PROM_ERROR)
2001 return; 2011 return;
@@ -2005,15 +2015,15 @@ static void __init fixup_device_tree_maple(void)
2005 isa_ranges[2] != 0x00010000) 2015 isa_ranges[2] != 0x00010000)
2006 return; 2016 return;
2007 2017
2008 prom_printf("fixing up bogus ISA range on Maple...\n"); 2018 prom_printf("Fixing up bogus ISA range on Maple/Apache...\n");
2009 2019
2010 isa_ranges[0] = 0x1; 2020 isa_ranges[0] = 0x1;
2011 isa_ranges[1] = 0x0; 2021 isa_ranges[1] = 0x0;
2012 isa_ranges[2] = 0x01002000; /* IO space; PCI device = 4 */ 2022 isa_ranges[2] = rloc;
2013 isa_ranges[3] = 0x0; 2023 isa_ranges[3] = 0x0;
2014 isa_ranges[4] = 0x0; 2024 isa_ranges[4] = 0x0;
2015 isa_ranges[5] = 0x00010000; 2025 isa_ranges[5] = 0x00010000;
2016 prom_setprop(isa, "/ht@0/isa@4", "ranges", 2026 prom_setprop(isa, name, "ranges",
2017 isa_ranges, sizeof(isa_ranges)); 2027 isa_ranges, sizeof(isa_ranges));
2018} 2028}
2019#else 2029#else
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index 45df420383cc..21009b1f7869 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -38,14 +38,6 @@ static void of_dump_addr(const char *s, u32 *addr, int na)
38static void of_dump_addr(const char *s, u32 *addr, int na) { } 38static void of_dump_addr(const char *s, u32 *addr, int na) { }
39#endif 39#endif
40 40
41/* Read a big address */
42static inline u64 of_read_addr(u32 *cell, int size)
43{
44 u64 r = 0;
45 while (size--)
46 r = (r << 32) | *(cell++);
47 return r;
48}
49 41
50/* Callbacks for bus specific translators */ 42/* Callbacks for bus specific translators */
51struct of_bus { 43struct of_bus {
@@ -77,9 +69,9 @@ static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
77{ 69{
78 u64 cp, s, da; 70 u64 cp, s, da;
79 71
80 cp = of_read_addr(range, na); 72 cp = of_read_number(range, na);
81 s = of_read_addr(range + na + pna, ns); 73 s = of_read_number(range + na + pna, ns);
82 da = of_read_addr(addr, na); 74 da = of_read_number(addr, na);
83 75
84 DBG("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n", 76 DBG("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n",
85 cp, s, da); 77 cp, s, da);
@@ -91,7 +83,7 @@ static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
91 83
92static int of_bus_default_translate(u32 *addr, u64 offset, int na) 84static int of_bus_default_translate(u32 *addr, u64 offset, int na)
93{ 85{
94 u64 a = of_read_addr(addr, na); 86 u64 a = of_read_number(addr, na);
95 memset(addr, 0, na * 4); 87 memset(addr, 0, na * 4);
96 a += offset; 88 a += offset;
97 if (na > 1) 89 if (na > 1)
@@ -135,9 +127,9 @@ static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
135 return OF_BAD_ADDR; 127 return OF_BAD_ADDR;
136 128
137 /* Read address values, skipping high cell */ 129 /* Read address values, skipping high cell */
138 cp = of_read_addr(range + 1, na - 1); 130 cp = of_read_number(range + 1, na - 1);
139 s = of_read_addr(range + na + pna, ns); 131 s = of_read_number(range + na + pna, ns);
140 da = of_read_addr(addr + 1, na - 1); 132 da = of_read_number(addr + 1, na - 1);
141 133
142 DBG("OF: PCI map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); 134 DBG("OF: PCI map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da);
143 135
@@ -195,9 +187,9 @@ static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna)
195 return OF_BAD_ADDR; 187 return OF_BAD_ADDR;
196 188
197 /* Read address values, skipping high cell */ 189 /* Read address values, skipping high cell */
198 cp = of_read_addr(range + 1, na - 1); 190 cp = of_read_number(range + 1, na - 1);
199 s = of_read_addr(range + na + pna, ns); 191 s = of_read_number(range + na + pna, ns);
200 da = of_read_addr(addr + 1, na - 1); 192 da = of_read_number(addr + 1, na - 1);
201 193
202 DBG("OF: ISA map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); 194 DBG("OF: ISA map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da);
203 195
@@ -295,7 +287,7 @@ static int of_translate_one(struct device_node *parent, struct of_bus *bus,
295 */ 287 */
296 ranges = (u32 *)get_property(parent, "ranges", &rlen); 288 ranges = (u32 *)get_property(parent, "ranges", &rlen);
297 if (ranges == NULL || rlen == 0) { 289 if (ranges == NULL || rlen == 0) {
298 offset = of_read_addr(addr, na); 290 offset = of_read_number(addr, na);
299 memset(addr, 0, pna * 4); 291 memset(addr, 0, pna * 4);
300 DBG("OF: no ranges, 1:1 translation\n"); 292 DBG("OF: no ranges, 1:1 translation\n");
301 goto finish; 293 goto finish;
@@ -378,7 +370,7 @@ u64 of_translate_address(struct device_node *dev, u32 *in_addr)
378 /* If root, we have finished */ 370 /* If root, we have finished */
379 if (parent == NULL) { 371 if (parent == NULL) {
380 DBG("OF: reached root node\n"); 372 DBG("OF: reached root node\n");
381 result = of_read_addr(addr, na); 373 result = of_read_number(addr, na);
382 break; 374 break;
383 } 375 }
384 376
@@ -442,7 +434,7 @@ u32 *of_get_address(struct device_node *dev, int index, u64 *size,
442 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) 434 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
443 if (i == index) { 435 if (i == index) {
444 if (size) 436 if (size)
445 *size = of_read_addr(prop + na, ns); 437 *size = of_read_number(prop + na, ns);
446 if (flags) 438 if (flags)
447 *flags = bus->get_flags(prop); 439 *flags = bus->get_flags(prop);
448 return prop; 440 return prop;
@@ -484,7 +476,7 @@ u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
484 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) 476 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
485 if ((prop[0] & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { 477 if ((prop[0] & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
486 if (size) 478 if (size)
487 *size = of_read_addr(prop + na, ns); 479 *size = of_read_number(prop + na, ns);
488 if (flags) 480 if (flags)
489 *flags = bus->get_flags(prop); 481 *flags = bus->get_flags(prop);
490 return prop; 482 return prop;
@@ -565,11 +557,414 @@ void of_parse_dma_window(struct device_node *dn, unsigned char *dma_window_prop,
565 prop = get_property(dn, "#address-cells", NULL); 557 prop = get_property(dn, "#address-cells", NULL);
566 558
567 cells = prop ? *(u32 *)prop : prom_n_addr_cells(dn); 559 cells = prop ? *(u32 *)prop : prom_n_addr_cells(dn);
568 *phys = of_read_addr(dma_window, cells); 560 *phys = of_read_number(dma_window, cells);
569 561
570 dma_window += cells; 562 dma_window += cells;
571 563
572 prop = get_property(dn, "ibm,#dma-size-cells", NULL); 564 prop = get_property(dn, "ibm,#dma-size-cells", NULL);
573 cells = prop ? *(u32 *)prop : prom_n_size_cells(dn); 565 cells = prop ? *(u32 *)prop : prom_n_size_cells(dn);
574 *size = of_read_addr(dma_window, cells); 566 *size = of_read_number(dma_window, cells);
567}
568
569/*
570 * Interrupt remapper
571 */
572
573static unsigned int of_irq_workarounds;
574static struct device_node *of_irq_dflt_pic;
575
576static struct device_node *of_irq_find_parent(struct device_node *child)
577{
578 struct device_node *p;
579 phandle *parp;
580
581 if (!of_node_get(child))
582 return NULL;
583
584 do {
585 parp = (phandle *)get_property(child, "interrupt-parent", NULL);
586 if (parp == NULL)
587 p = of_get_parent(child);
588 else {
589 if (of_irq_workarounds & OF_IMAP_NO_PHANDLE)
590 p = of_node_get(of_irq_dflt_pic);
591 else
592 p = of_find_node_by_phandle(*parp);
593 }
594 of_node_put(child);
595 child = p;
596 } while (p && get_property(p, "#interrupt-cells", NULL) == NULL);
597
598 return p;
599}
600
601static u8 of_irq_pci_swizzle(u8 slot, u8 pin)
602{
603 return (((pin - 1) + slot) % 4) + 1;
575} 604}
605
606/* This doesn't need to be called if you don't have any special workaround
607 * flags to pass
608 */
609void of_irq_map_init(unsigned int flags)
610{
611 of_irq_workarounds = flags;
612
613 /* OldWorld, don't bother looking at other things */
614 if (flags & OF_IMAP_OLDWORLD_MAC)
615 return;
616
617 /* If we don't have phandles, let's try to locate a default interrupt
618 * controller (happens when booting with BootX). We do a first match
619 * here, hopefully, that only ever happens on machines with one
620 * controller.
621 */
622 if (flags & OF_IMAP_NO_PHANDLE) {
623 struct device_node *np;
624
625 for(np = NULL; (np = of_find_all_nodes(np)) != NULL;) {
626 if (get_property(np, "interrupt-controller", NULL)
627 == NULL)
628 continue;
629 /* Skip /chosen/interrupt-controller */
630 if (strcmp(np->name, "chosen") == 0)
631 continue;
632 /* It seems like at least one person on this planet wants
633 * to use BootX on a machine with an AppleKiwi controller
634 * which happens to pretend to be an interrupt
635 * controller too.
636 */
637 if (strcmp(np->name, "AppleKiwi") == 0)
638 continue;
639 /* I think we found one ! */
640 of_irq_dflt_pic = np;
641 break;
642 }
643 }
644
645}
646
647int of_irq_map_raw(struct device_node *parent, u32 *intspec, u32 *addr,
648 struct of_irq *out_irq)
649{
650 struct device_node *ipar, *tnode, *old = NULL, *newpar = NULL;
651 u32 *tmp, *imap, *imask;
652 u32 intsize = 1, addrsize, newintsize = 0, newaddrsize = 0;
653 int imaplen, match, i;
654
655 ipar = of_node_get(parent);
656
657 /* First get the #interrupt-cells property of the current cursor
658 * that tells us how to interpret the passed-in intspec. If there
659 * is none, we are nice and just walk up the tree
660 */
661 do {
662 tmp = (u32 *)get_property(ipar, "#interrupt-cells", NULL);
663 if (tmp != NULL) {
664 intsize = *tmp;
665 break;
666 }
667 tnode = ipar;
668 ipar = of_irq_find_parent(ipar);
669 of_node_put(tnode);
670 } while (ipar);
671 if (ipar == NULL) {
672 DBG(" -> no parent found !\n");
673 goto fail;
674 }
675
676 DBG("of_irq_map_raw: ipar=%s, size=%d\n", ipar->full_name, intsize);
677
678 /* Look for this #address-cells. We have to implement the old linux
679 * trick of looking for the parent here as some device-trees rely on it
680 */
681 old = of_node_get(ipar);
682 do {
683 tmp = (u32 *)get_property(old, "#address-cells", NULL);
684 tnode = of_get_parent(old);
685 of_node_put(old);
686 old = tnode;
687 } while(old && tmp == NULL);
688 of_node_put(old);
689 old = NULL;
690 addrsize = (tmp == NULL) ? 2 : *tmp;
691
692 DBG(" -> addrsize=%d\n", addrsize);
693
694 /* Now start the actual "proper" walk of the interrupt tree */
695 while (ipar != NULL) {
696 /* Now check if cursor is an interrupt-controller and if it is
697 * then we are done
698 */
699 if (get_property(ipar, "interrupt-controller", NULL) != NULL) {
700 DBG(" -> got it !\n");
701 memcpy(out_irq->specifier, intspec,
702 intsize * sizeof(u32));
703 out_irq->size = intsize;
704 out_irq->controller = ipar;
705 of_node_put(old);
706 return 0;
707 }
708
709 /* Now look for an interrupt-map */
710 imap = (u32 *)get_property(ipar, "interrupt-map", &imaplen);
711 /* No interrupt map, check for an interrupt parent */
712 if (imap == NULL) {
713 DBG(" -> no map, getting parent\n");
714 newpar = of_irq_find_parent(ipar);
715 goto skiplevel;
716 }
717 imaplen /= sizeof(u32);
718
719 /* Look for a mask */
720 imask = (u32 *)get_property(ipar, "interrupt-map-mask", NULL);
721
722 /* If we were passed no "reg" property and we attempt to parse
723 * an interrupt-map, then #address-cells must be 0.
724 * Fail if it's not.
725 */
726 if (addr == NULL && addrsize != 0) {
727 DBG(" -> no reg passed in when needed !\n");
728 goto fail;
729 }
730
731 /* Parse interrupt-map */
732 match = 0;
733 while (imaplen > (addrsize + intsize + 1) && !match) {
734 /* Compare specifiers */
735 match = 1;
736 for (i = 0; i < addrsize && match; ++i) {
737 u32 mask = imask ? imask[i] : 0xffffffffu;
738 match = ((addr[i] ^ imap[i]) & mask) == 0;
739 }
740 for (; i < (addrsize + intsize) && match; ++i) {
741 u32 mask = imask ? imask[i] : 0xffffffffu;
742 match =
743 ((intspec[i-addrsize] ^ imap[i]) & mask) == 0;
744 }
745 imap += addrsize + intsize;
746 imaplen -= addrsize + intsize;
747
748 DBG(" -> match=%d (imaplen=%d)\n", match, imaplen);
749
750 /* Get the interrupt parent */
751 if (of_irq_workarounds & OF_IMAP_NO_PHANDLE)
752 newpar = of_node_get(of_irq_dflt_pic);
753 else
754 newpar = of_find_node_by_phandle((phandle)*imap);
755 imap++;
756 --imaplen;
757
758 /* Check if not found */
759 if (newpar == NULL) {
760 DBG(" -> imap parent not found !\n");
761 goto fail;
762 }
763
764 /* Get #interrupt-cells and #address-cells of new
765 * parent
766 */
767 tmp = (u32 *)get_property(newpar, "#interrupt-cells",
768 NULL);
769 if (tmp == NULL) {
770 DBG(" -> parent lacks #interrupt-cells !\n");
771 goto fail;
772 }
773 newintsize = *tmp;
774 tmp = (u32 *)get_property(newpar, "#address-cells",
775 NULL);
776 newaddrsize = (tmp == NULL) ? 0 : *tmp;
777
778 DBG(" -> newintsize=%d, newaddrsize=%d\n",
779 newintsize, newaddrsize);
780
781 /* Check for malformed properties */
782 if (imaplen < (newaddrsize + newintsize))
783 goto fail;
784
785 imap += newaddrsize + newintsize;
786 imaplen -= newaddrsize + newintsize;
787
788 DBG(" -> imaplen=%d\n", imaplen);
789 }
790 if (!match)
791 goto fail;
792
793 of_node_put(old);
794 old = of_node_get(newpar);
795 addrsize = newaddrsize;
796 intsize = newintsize;
797 intspec = imap - intsize;
798 addr = intspec - addrsize;
799
800 skiplevel:
801 /* Iterate again with new parent */
802 DBG(" -> new parent: %s\n", newpar ? newpar->full_name : "<>");
803 of_node_put(ipar);
804 ipar = newpar;
805 newpar = NULL;
806 }
807 fail:
808 of_node_put(ipar);
809 of_node_put(old);
810 of_node_put(newpar);
811
812 return -EINVAL;
813}
814EXPORT_SYMBOL_GPL(of_irq_map_raw);
815
816#if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
817static int of_irq_map_oldworld(struct device_node *device, int index,
818 struct of_irq *out_irq)
819{
820 u32 *ints;
821 int intlen;
822
823 /*
824 * Old machines just have a list of interrupt numbers
825 * and no interrupt-controller nodes.
826 */
827 ints = (u32 *) get_property(device, "AAPL,interrupts", &intlen);
828 if (ints == NULL)
829 return -EINVAL;
830 intlen /= sizeof(u32);
831
832 if (index >= intlen)
833 return -EINVAL;
834
835 out_irq->controller = NULL;
836 out_irq->specifier[0] = ints[index];
837 out_irq->size = 1;
838
839 return 0;
840}
841#else /* defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32) */
842static int of_irq_map_oldworld(struct device_node *device, int index,
843 struct of_irq *out_irq)
844{
845 return -EINVAL;
846}
847#endif /* !(defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)) */
848
849int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq)
850{
851 struct device_node *p;
852 u32 *intspec, *tmp, intsize, intlen, *addr;
853 int res;
854
855 DBG("of_irq_map_one: dev=%s, index=%d\n", device->full_name, index);
856
857 /* OldWorld mac stuff is "special", handle out of line */
858 if (of_irq_workarounds & OF_IMAP_OLDWORLD_MAC)
859 return of_irq_map_oldworld(device, index, out_irq);
860
861 /* Get the interrupts property */
862 intspec = (u32 *)get_property(device, "interrupts", &intlen);
863 if (intspec == NULL)
864 return -EINVAL;
865 intlen /= sizeof(u32);
866
867 /* Get the reg property (if any) */
868 addr = (u32 *)get_property(device, "reg", NULL);
869
870 /* Look for the interrupt parent. */
871 p = of_irq_find_parent(device);
872 if (p == NULL)
873 return -EINVAL;
874
875 /* Get size of interrupt specifier */
876 tmp = (u32 *)get_property(p, "#interrupt-cells", NULL);
877 if (tmp == NULL) {
878 of_node_put(p);
879 return -EINVAL;
880 }
881 intsize = *tmp;
882
883 /* Check index */
884 if (index * intsize >= intlen)
885 return -EINVAL;
886
887 /* Get new specifier and map it */
888 res = of_irq_map_raw(p, intspec + index * intsize, addr, out_irq);
889 of_node_put(p);
890 return res;
891}
892EXPORT_SYMBOL_GPL(of_irq_map_one);
893
894int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
895{
896 struct device_node *dn, *ppnode;
897 struct pci_dev *ppdev;
898 u32 lspec;
899 u32 laddr[3];
900 u8 pin;
901 int rc;
902
903 /* Check if we have a device node, if yes, fallback to standard OF
904 * parsing
905 */
906 dn = pci_device_to_OF_node(pdev);
907 if (dn)
908 return of_irq_map_one(dn, 0, out_irq);
909
910 /* Ok, we don't, time to have fun. Let's start by building up an
911 * interrupt spec. we assume #interrupt-cells is 1, which is standard
912 * for PCI. If you do different, then don't use that routine.
913 */
914 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
915 if (rc != 0)
916 return rc;
917 /* No pin, exit */
918 if (pin == 0)
919 return -ENODEV;
920
921 /* Now we walk up the PCI tree */
922 lspec = pin;
923 for (;;) {
924 /* Get the pci_dev of our parent */
925 ppdev = pdev->bus->self;
926
927 /* Ouch, it's a host bridge... */
928 if (ppdev == NULL) {
929#ifdef CONFIG_PPC64
930 ppnode = pci_bus_to_OF_node(pdev->bus);
931#else
932 struct pci_controller *host;
933 host = pci_bus_to_host(pdev->bus);
934 ppnode = host ? host->arch_data : NULL;
935#endif
936 /* No node for host bridge ? give up */
937 if (ppnode == NULL)
938 return -EINVAL;
939 } else
940 /* We found a P2P bridge, check if it has a node */
941 ppnode = pci_device_to_OF_node(ppdev);
942
943 /* Ok, we have found a parent with a device-node, hand over to
944 * the OF parsing code.
945 * We build a unit address from the linux device to be used for
946 * resolution. Note that we use the linux bus number which may
947 * not match your firmware bus numbering.
948 * Fortunately, in most cases, interrupt-map-mask doesn't include
949 * the bus number as part of the matching.
950 * You should still be careful about that though if you intend
951 * to rely on this function (you ship a firmware that doesn't
952 * create device nodes for all PCI devices).
953 */
954 if (ppnode)
955 break;
956
957 /* We can only get here if we hit a P2P bridge with no node,
958 * let's do standard swizzling and try again
959 */
960 lspec = of_irq_pci_swizzle(PCI_SLOT(pdev->devfn), lspec);
961 pdev = ppdev;
962 }
963
964 laddr[0] = (pdev->bus->number << 16)
965 | (pdev->devfn << 8);
966 laddr[1] = laddr[2] = 0;
967 return of_irq_map_raw(ppnode, &lspec, laddr, out_irq);
968}
969EXPORT_SYMBOL_GPL(of_irq_map_pci);
970
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 6eb7e49b394a..cda022657324 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -297,19 +297,9 @@ unsigned long __init find_and_init_phbs(void)
297 struct device_node *node; 297 struct device_node *node;
298 struct pci_controller *phb; 298 struct pci_controller *phb;
299 unsigned int index; 299 unsigned int index;
300 unsigned int root_size_cells = 0;
301 unsigned int *opprop = NULL;
302 struct device_node *root = of_find_node_by_path("/"); 300 struct device_node *root = of_find_node_by_path("/");
303 301
304 if (ppc64_interrupt_controller == IC_OPEN_PIC) {
305 opprop = (unsigned int *)get_property(root,
306 "platform-open-pic", NULL);
307 }
308
309 root_size_cells = prom_n_size_cells(root);
310
311 index = 0; 302 index = 0;
312
313 for (node = of_get_next_child(root, NULL); 303 for (node = of_get_next_child(root, NULL);
314 node != NULL; 304 node != NULL;
315 node = of_get_next_child(root, node)) { 305 node = of_get_next_child(root, node)) {
@@ -324,13 +314,6 @@ unsigned long __init find_and_init_phbs(void)
324 setup_phb(node, phb); 314 setup_phb(node, phb);
325 pci_process_bridge_OF_ranges(phb, node, 0); 315 pci_process_bridge_OF_ranges(phb, node, 0);
326 pci_setup_phb_io(phb, index == 0); 316 pci_setup_phb_io(phb, index == 0);
327#ifdef CONFIG_PPC_PSERIES
328 /* XXX This code need serious fixing ... --BenH */
329 if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
330 int addr = root_size_cells * (index + 2) - 1;
331 mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
332 }
333#endif
334 index++; 317 index++;
335 } 318 }
336 319
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index ba7cd50d820d..e0df2ba1ab9f 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -51,7 +51,6 @@
51 51
52extern void bootx_init(unsigned long r4, unsigned long phys); 52extern void bootx_init(unsigned long r4, unsigned long phys);
53 53
54boot_infos_t *boot_infos;
55struct ide_machdep_calls ppc_ide_md; 54struct ide_machdep_calls ppc_ide_md;
56 55
57int boot_cpuid; 56int boot_cpuid;
@@ -240,7 +239,6 @@ void __init setup_arch(char **cmdline_p)
240 ppc_md.init_early(); 239 ppc_md.init_early();
241 240
242 find_legacy_serial_ports(); 241 find_legacy_serial_ports();
243 finish_device_tree();
244 242
245 smp_setup_cpu_maps(); 243 smp_setup_cpu_maps();
246 244
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index ac7276c40685..fd1785e4c9bb 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -361,12 +361,15 @@ void __init setup_system(void)
361 361
362 /* 362 /*
363 * Fill the ppc64_caches & systemcfg structures with informations 363 * Fill the ppc64_caches & systemcfg structures with informations
364 * retrieved from the device-tree. Need to be called before 364 * retrieved from the device-tree.
365 * finish_device_tree() since the later requires some of the
366 * informations filled up here to properly parse the interrupt tree.
367 */ 365 */
368 initialize_cache_info(); 366 initialize_cache_info();
369 367
368 /*
369 * Initialize irq remapping subsystem
370 */
371 irq_early_init();
372
370#ifdef CONFIG_PPC_RTAS 373#ifdef CONFIG_PPC_RTAS
371 /* 374 /*
372 * Initialize RTAS if available 375 * Initialize RTAS if available
@@ -394,12 +397,6 @@ void __init setup_system(void)
394 find_legacy_serial_ports(); 397 find_legacy_serial_ports();
395 398
396 /* 399 /*
397 * "Finish" the device-tree, that is do the actual parsing of
398 * some of the properties like the interrupt map
399 */
400 finish_device_tree();
401
402 /*
403 * Initialize xmon 400 * Initialize xmon
404 */ 401 */
405#ifdef CONFIG_XMON_DEFAULT 402#ifdef CONFIG_XMON_DEFAULT
@@ -427,8 +424,6 @@ void __init setup_system(void)
427 424
428 printk("-----------------------------------------------------\n"); 425 printk("-----------------------------------------------------\n");
429 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); 426 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
430 printk("ppc64_interrupt_controller = 0x%ld\n",
431 ppc64_interrupt_controller);
432 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); 427 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size());
433 printk("ppc64_caches.dcache_line_size = 0x%x\n", 428 printk("ppc64_caches.dcache_line_size = 0x%x\n",
434 ppc64_caches.dline_size); 429 ppc64_caches.dline_size);
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index cdf5867838a6..fad8580f9081 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -218,7 +218,6 @@ struct vio_dev * __devinit vio_register_device_node(struct device_node *of_node)
218{ 218{
219 struct vio_dev *viodev; 219 struct vio_dev *viodev;
220 unsigned int *unit_address; 220 unsigned int *unit_address;
221 unsigned int *irq_p;
222 221
223 /* we need the 'device_type' property, in order to match with drivers */ 222 /* we need the 'device_type' property, in order to match with drivers */
224 if (of_node->type == NULL) { 223 if (of_node->type == NULL) {
@@ -243,16 +242,7 @@ struct vio_dev * __devinit vio_register_device_node(struct device_node *of_node)
243 242
244 viodev->dev.platform_data = of_node_get(of_node); 243 viodev->dev.platform_data = of_node_get(of_node);
245 244
246 viodev->irq = NO_IRQ; 245 viodev->irq = irq_of_parse_and_map(of_node, 0);
247 irq_p = (unsigned int *)get_property(of_node, "interrupts", NULL);
248 if (irq_p) {
249 int virq = virt_irq_create_mapping(*irq_p);
250 if (virq == NO_IRQ) {
251 printk(KERN_ERR "Unable to allocate interrupt "
252 "number for %s\n", of_node->full_name);
253 } else
254 viodev->irq = irq_offset_up(virq);
255 }
256 246
257 snprintf(viodev->dev.bus_id, BUS_ID_SIZE, "%x", *unit_address); 247 snprintf(viodev->dev.bus_id, BUS_ID_SIZE, "%x", *unit_address);
258 viodev->name = of_node->name; 248 viodev->name = of_node->name;
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 7675e675dce1..5fe7b7faf45f 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -16,12 +16,21 @@ config MPC834x_SYS
16 3 PCI slots. The PIBs PCI initialization is the bootloader's 16 3 PCI slots. The PIBs PCI initialization is the bootloader's
17 responsiblilty. 17 responsiblilty.
18 18
19config MPC834x_ITX
20 bool "Freescale MPC834x ITX"
21 select DEFAULT_UIMAGE
22 help
23 This option enables support for the MPC 834x ITX evaluation board.
24
25 Be aware that PCI initialization is the bootloader's
26 responsiblilty.
27
19endchoice 28endchoice
20 29
21config MPC834x 30config MPC834x
22 bool 31 bool
23 select PPC_UDBG_16550 32 select PPC_UDBG_16550
24 select PPC_INDIRECT_PCI 33 select PPC_INDIRECT_PCI
25 default y if MPC834x_SYS 34 default y if MPC834x_SYS || MPC834x_ITX
26 35
27endmenu 36endmenu
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 5c72367441a8..9387a110d28a 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -4,3 +4,4 @@
4obj-y := misc.o 4obj-y := misc.o
5obj-$(CONFIG_PCI) += pci.o 5obj-$(CONFIG_PCI) += pci.o
6obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o 6obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o
7obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
new file mode 100644
index 000000000000..b46305645d38
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -0,0 +1,156 @@
1/*
2 * arch/powerpc/platforms/83xx/mpc834x_itx.c
3 *
4 * MPC834x ITX board specific routines
5 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/config.h>
15#include <linux/stddef.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/errno.h>
19#include <linux/reboot.h>
20#include <linux/pci.h>
21#include <linux/kdev_t.h>
22#include <linux/major.h>
23#include <linux/console.h>
24#include <linux/delay.h>
25#include <linux/seq_file.h>
26#include <linux/root_dev.h>
27
28#include <asm/system.h>
29#include <asm/atomic.h>
30#include <asm/time.h>
31#include <asm/io.h>
32#include <asm/machdep.h>
33#include <asm/ipic.h>
34#include <asm/bootinfo.h>
35#include <asm/irq.h>
36#include <asm/prom.h>
37#include <asm/udbg.h>
38#include <sysdev/fsl_soc.h>
39
40#include "mpc83xx.h"
41
42#include <platforms/83xx/mpc834x_sys.h>
43
44#ifndef CONFIG_PCI
45unsigned long isa_io_base = 0;
46unsigned long isa_mem_base = 0;
47#endif
48
49#ifdef CONFIG_PCI
50static int
51mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
52{
53 static char pci_irq_table[][4] =
54 /*
55 * PCI IDSEL/INTPIN->INTLINE
56 * A B C D
57 */
58 {
59 {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x0e */
60 {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x0f */
61 {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x10 */
62 };
63
64 const long min_idsel = 0x0e, max_idsel = 0x10, irqs_per_slot = 4;
65 return PCI_IRQ_TABLE_LOOKUP;
66}
67#endif /* CONFIG_PCI */
68
69/* ************************************************************************
70 *
71 * Setup the architecture
72 *
73 */
74static void __init mpc834x_itx_setup_arch(void)
75{
76 struct device_node *np;
77
78 if (ppc_md.progress)
79 ppc_md.progress("mpc834x_itx_setup_arch()", 0);
80
81 np = of_find_node_by_type(NULL, "cpu");
82 if (np != 0) {
83 unsigned int *fp =
84 (int *)get_property(np, "clock-frequency", NULL);
85 if (fp != 0)
86 loops_per_jiffy = *fp / HZ;
87 else
88 loops_per_jiffy = 50000000 / HZ;
89 of_node_put(np);
90 }
91#ifdef CONFIG_PCI
92 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
93 add_bridge(np);
94
95 ppc_md.pci_swizzle = common_swizzle;
96 ppc_md.pci_map_irq = mpc83xx_map_irq;
97 ppc_md.pci_exclude_device = mpc83xx_exclude_device;
98#endif
99
100#ifdef CONFIG_ROOT_NFS
101 ROOT_DEV = Root_NFS;
102#else
103 ROOT_DEV = Root_HDA1;
104#endif
105}
106
107void __init mpc834x_itx_init_IRQ(void)
108{
109 u8 senses[8] = {
110 0, /* EXT 0 */
111 IRQ_SENSE_LEVEL, /* EXT 1 */
112 IRQ_SENSE_LEVEL, /* EXT 2 */
113 0, /* EXT 3 */
114#ifdef CONFIG_PCI
115 IRQ_SENSE_LEVEL, /* EXT 4 */
116 IRQ_SENSE_LEVEL, /* EXT 5 */
117 IRQ_SENSE_LEVEL, /* EXT 6 */
118 IRQ_SENSE_LEVEL, /* EXT 7 */
119#else
120 0, /* EXT 4 */
121 0, /* EXT 5 */
122 0, /* EXT 6 */
123 0, /* EXT 7 */
124#endif
125 };
126
127 ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8);
128
129 /* Initialize the default interrupt mapping priorities,
130 * in case the boot rom changed something on us.
131 */
132 ipic_set_default_priority();
133}
134
135/*
136 * Called very early, MMU is off, device-tree isn't unflattened
137 */
138static int __init mpc834x_itx_probe(void)
139{
140 /* We always match for now, eventually we should look at the flat
141 dev tree to ensure this is the board we are suppose to run on
142 */
143 return 1;
144}
145
146define_machine(mpc834x_itx) {
147 .name = "MPC834x ITX",
148 .probe = mpc834x_itx_probe,
149 .setup_arch = mpc834x_itx_setup_arch,
150 .init_IRQ = mpc834x_itx_init_IRQ,
151 .get_irq = ipic_get_irq,
152 .restart = mpc83xx_restart,
153 .time_init = mpc83xx_time_init,
154 .calibrate_decr = generic_calibrate_decr,
155 .progress = udbg_progress,
156};
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.h b/arch/powerpc/platforms/83xx/mpc834x_itx.h
new file mode 100644
index 000000000000..174ca4ef55f3
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.h
@@ -0,0 +1,23 @@
1/*
2 * arch/powerpc/platforms/83xx/mpc834x_itx.h
3 *
4 * MPC834X ITX common board definitions
5 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MACH_MPC83XX_ITX_H__
16#define __MACH_MPC83XX_ITX_H__
17
18#define PIRQA MPC83xx_IRQ_EXT4
19#define PIRQB MPC83xx_IRQ_EXT5
20#define PIRQC MPC83xx_IRQ_EXT6
21#define PIRQD MPC83xx_IRQ_EXT7
22
23#endif /* __MACH_MPC83XX_ITX_H__ */
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 880c8083d16f..9d5da7896892 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -1,6 +1,9 @@
1/* 1/*
2 * Cell Internal Interrupt Controller 2 * Cell Internal Interrupt Controller
3 * 3 *
4 * Copyright (C) 2006 Benjamin Herrenschmidt (benh@kernel.crashing.org)
5 * IBM, Corp.
6 *
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 7 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5 * 8 *
6 * Author: Arnd Bergmann <arndb@de.ibm.com> 9 * Author: Arnd Bergmann <arndb@de.ibm.com>
@@ -25,11 +28,13 @@
25#include <linux/module.h> 28#include <linux/module.h>
26#include <linux/percpu.h> 29#include <linux/percpu.h>
27#include <linux/types.h> 30#include <linux/types.h>
31#include <linux/ioport.h>
28 32
29#include <asm/io.h> 33#include <asm/io.h>
30#include <asm/pgtable.h> 34#include <asm/pgtable.h>
31#include <asm/prom.h> 35#include <asm/prom.h>
32#include <asm/ptrace.h> 36#include <asm/ptrace.h>
37#include <asm/machdep.h>
33 38
34#include "interrupt.h" 39#include "interrupt.h"
35#include "cbe_regs.h" 40#include "cbe_regs.h"
@@ -37,231 +42,65 @@
37struct iic { 42struct iic {
38 struct cbe_iic_thread_regs __iomem *regs; 43 struct cbe_iic_thread_regs __iomem *regs;
39 u8 target_id; 44 u8 target_id;
45 u8 eoi_stack[16];
46 int eoi_ptr;
47 struct irq_host *host;
40}; 48};
41 49
42static DEFINE_PER_CPU(struct iic, iic); 50static DEFINE_PER_CPU(struct iic, iic);
51#define IIC_NODE_COUNT 2
52static struct irq_host *iic_hosts[IIC_NODE_COUNT];
43 53
44void iic_local_enable(void) 54/* Convert between "pending" bits and hw irq number */
55static irq_hw_number_t iic_pending_to_hwnum(struct cbe_iic_pending_bits bits)
45{ 56{
46 struct iic *iic = &__get_cpu_var(iic); 57 unsigned char unit = bits.source & 0xf;
47 u64 tmp;
48
49 /*
50 * There seems to be a bug that is present in DD2.x CPUs
51 * and still only partially fixed in DD3.1.
52 * This bug causes a value written to the priority register
53 * not to make it there, resulting in a system hang unless we
54 * write it again.
55 * Masking with 0xf0 is done because the Cell BE does not
56 * implement the lower four bits of the interrupt priority,
57 * they always read back as zeroes, although future CPUs
58 * might implement different bits.
59 */
60 do {
61 out_be64(&iic->regs->prio, 0xff);
62 tmp = in_be64(&iic->regs->prio);
63 } while ((tmp & 0xf0) != 0xf0);
64}
65
66void iic_local_disable(void)
67{
68 out_be64(&__get_cpu_var(iic).regs->prio, 0x0);
69}
70 58
71static unsigned int iic_startup(unsigned int irq) 59 if (bits.flags & CBE_IIC_IRQ_IPI)
72{ 60 return IIC_IRQ_IPI0 | (bits.prio >> 4);
73 return 0; 61 else if (bits.class <= 3)
62 return (bits.class << 4) | unit;
63 else
64 return IIC_IRQ_INVALID;
74} 65}
75 66
76static void iic_enable(unsigned int irq) 67static void iic_mask(unsigned int irq)
77{ 68{
78 iic_local_enable();
79} 69}
80 70
81static void iic_disable(unsigned int irq) 71static void iic_unmask(unsigned int irq)
82{ 72{
83} 73}
84 74
85static void iic_end(unsigned int irq) 75static void iic_eoi(unsigned int irq)
86{ 76{
87 iic_local_enable(); 77 struct iic *iic = &__get_cpu_var(iic);
78 out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]);
79 BUG_ON(iic->eoi_ptr < 0);
88} 80}
89 81
90static struct hw_interrupt_type iic_pic = { 82static struct irq_chip iic_chip = {
91 .typename = " CELL-IIC ", 83 .typename = " CELL-IIC ",
92 .startup = iic_startup, 84 .mask = iic_mask,
93 .enable = iic_enable, 85 .unmask = iic_unmask,
94 .disable = iic_disable, 86 .eoi = iic_eoi,
95 .end = iic_end,
96}; 87};
97 88
98static int iic_external_get_irq(struct cbe_iic_pending_bits pending)
99{
100 int irq;
101 unsigned char node, unit;
102
103 node = pending.source >> 4;
104 unit = pending.source & 0xf;
105 irq = -1;
106
107 /*
108 * This mapping is specific to the Cell Broadband
109 * Engine. We might need to get the numbers
110 * from the device tree to support future CPUs.
111 */
112 switch (unit) {
113 case 0x00:
114 case 0x0b:
115 /*
116 * One of these units can be connected
117 * to an external interrupt controller.
118 */
119 if (pending.class != 2)
120 break;
121 irq = IIC_EXT_OFFSET
122 + spider_get_irq(node)
123 + node * IIC_NODE_STRIDE;
124 break;
125 case 0x01 ... 0x04:
126 case 0x07 ... 0x0a:
127 /*
128 * These units are connected to the SPEs
129 */
130 if (pending.class > 2)
131 break;
132 irq = IIC_SPE_OFFSET
133 + pending.class * IIC_CLASS_STRIDE
134 + node * IIC_NODE_STRIDE
135 + unit;
136 break;
137 }
138 if (irq == -1)
139 printk(KERN_WARNING "Unexpected interrupt class %02x, "
140 "source %02x, prio %02x, cpu %02x\n", pending.class,
141 pending.source, pending.prio, smp_processor_id());
142 return irq;
143}
144
145/* Get an IRQ number from the pending state register of the IIC */ 89/* Get an IRQ number from the pending state register of the IIC */
146int iic_get_irq(struct pt_regs *regs) 90static unsigned int iic_get_irq(struct pt_regs *regs)
147{ 91{
148 struct iic *iic; 92 struct cbe_iic_pending_bits pending;
149 int irq; 93 struct iic *iic;
150 struct cbe_iic_pending_bits pending; 94
151 95 iic = &__get_cpu_var(iic);
152 iic = &__get_cpu_var(iic); 96 *(unsigned long *) &pending =
153 *(unsigned long *) &pending = 97 in_be64((unsigned long __iomem *) &iic->regs->pending_destr);
154 in_be64((unsigned long __iomem *) &iic->regs->pending_destr); 98 iic->eoi_stack[++iic->eoi_ptr] = pending.prio;
155 99 BUG_ON(iic->eoi_ptr > 15);
156 irq = -1; 100 if (pending.flags & CBE_IIC_IRQ_VALID)
157 if (pending.flags & CBE_IIC_IRQ_VALID) { 101 return irq_linear_revmap(iic->host,
158 if (pending.flags & CBE_IIC_IRQ_IPI) { 102 iic_pending_to_hwnum(pending));
159 irq = IIC_IPI_OFFSET + (pending.prio >> 4); 103 return NO_IRQ;
160/*
161 if (irq > 0x80)
162 printk(KERN_WARNING "Unexpected IPI prio %02x"
163 "on CPU %02x\n", pending.prio,
164 smp_processor_id());
165*/
166 } else {
167 irq = iic_external_get_irq(pending);
168 }
169 }
170 return irq;
171}
172
173/* hardcoded part to be compatible with older firmware */
174
175static int setup_iic_hardcoded(void)
176{
177 struct device_node *np;
178 int nodeid, cpu;
179 unsigned long regs;
180 struct iic *iic;
181
182 for_each_possible_cpu(cpu) {
183 iic = &per_cpu(iic, cpu);
184 nodeid = cpu/2;
185
186 for (np = of_find_node_by_type(NULL, "cpu");
187 np;
188 np = of_find_node_by_type(np, "cpu")) {
189 if (nodeid == *(int *)get_property(np, "node-id", NULL))
190 break;
191 }
192
193 if (!np) {
194 printk(KERN_WARNING "IIC: CPU %d not found\n", cpu);
195 iic->regs = NULL;
196 iic->target_id = 0xff;
197 return -ENODEV;
198 }
199
200 regs = *(long *)get_property(np, "iic", NULL);
201
202 /* hack until we have decided on the devtree info */
203 regs += 0x400;
204 if (cpu & 1)
205 regs += 0x20;
206
207 printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs);
208 iic->regs = ioremap(regs, sizeof(struct cbe_iic_thread_regs));
209 iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe);
210 }
211
212 return 0;
213}
214
215static int setup_iic(void)
216{
217 struct device_node *dn;
218 unsigned long *regs;
219 char *compatible;
220 unsigned *np, found = 0;
221 struct iic *iic = NULL;
222
223 for (dn = NULL; (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
224 compatible = (char *)get_property(dn, "compatible", NULL);
225
226 if (!compatible) {
227 printk(KERN_WARNING "no compatible property found !\n");
228 continue;
229 }
230
231 if (strstr(compatible, "IBM,CBEA-Internal-Interrupt-Controller"))
232 regs = (unsigned long *)get_property(dn,"reg", NULL);
233 else
234 continue;
235
236 if (!regs)
237 printk(KERN_WARNING "IIC: no reg property\n");
238
239 np = (unsigned int *)get_property(dn, "ibm,interrupt-server-ranges", NULL);
240
241 if (!np) {
242 printk(KERN_WARNING "IIC: CPU association not found\n");
243 iic->regs = NULL;
244 iic->target_id = 0xff;
245 return -ENODEV;
246 }
247
248 iic = &per_cpu(iic, np[0]);
249 iic->regs = ioremap(regs[0], sizeof(struct cbe_iic_thread_regs));
250 iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe);
251 printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs);
252
253 iic = &per_cpu(iic, np[1]);
254 iic->regs = ioremap(regs[2], sizeof(struct cbe_iic_thread_regs));
255 iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe);
256 printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs);
257
258 found++;
259 }
260
261 if (found)
262 return 0;
263 else
264 return -ENODEV;
265} 104}
266 105
267#ifdef CONFIG_SMP 106#ifdef CONFIG_SMP
@@ -269,12 +108,12 @@ static int setup_iic(void)
269/* Use the highest interrupt priorities for IPI */ 108/* Use the highest interrupt priorities for IPI */
270static inline int iic_ipi_to_irq(int ipi) 109static inline int iic_ipi_to_irq(int ipi)
271{ 110{
272 return IIC_IPI_OFFSET + IIC_NUM_IPIS - 1 - ipi; 111 return IIC_IRQ_IPI0 + IIC_NUM_IPIS - 1 - ipi;
273} 112}
274 113
275static inline int iic_irq_to_ipi(int irq) 114static inline int iic_irq_to_ipi(int irq)
276{ 115{
277 return IIC_NUM_IPIS - 1 - (irq - IIC_IPI_OFFSET); 116 return IIC_NUM_IPIS - 1 - (irq - IIC_IRQ_IPI0);
278} 117}
279 118
280void iic_setup_cpu(void) 119void iic_setup_cpu(void)
@@ -293,22 +132,51 @@ u8 iic_get_target_id(int cpu)
293} 132}
294EXPORT_SYMBOL_GPL(iic_get_target_id); 133EXPORT_SYMBOL_GPL(iic_get_target_id);
295 134
135struct irq_host *iic_get_irq_host(int node)
136{
137 if (node < 0 || node >= IIC_NODE_COUNT)
138 return NULL;
139 return iic_hosts[node];
140}
141EXPORT_SYMBOL_GPL(iic_get_irq_host);
142
143
296static irqreturn_t iic_ipi_action(int irq, void *dev_id, struct pt_regs *regs) 144static irqreturn_t iic_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
297{ 145{
298 smp_message_recv(iic_irq_to_ipi(irq), regs); 146 int ipi = (int)(long)dev_id;
147
148 smp_message_recv(ipi, regs);
149
299 return IRQ_HANDLED; 150 return IRQ_HANDLED;
300} 151}
301 152
302static void iic_request_ipi(int ipi, const char *name) 153static void iic_request_ipi(int ipi, const char *name)
303{ 154{
304 int irq; 155 int node, virq;
305 156
306 irq = iic_ipi_to_irq(ipi); 157 for (node = 0; node < IIC_NODE_COUNT; node++) {
307 /* IPIs are marked SA_INTERRUPT as they must run with irqs 158 char *rname;
308 * disabled */ 159 if (iic_hosts[node] == NULL)
309 get_irq_desc(irq)->chip = &iic_pic; 160 continue;
310 get_irq_desc(irq)->status |= IRQ_PER_CPU; 161 virq = irq_create_mapping(iic_hosts[node],
311 request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL); 162 iic_ipi_to_irq(ipi), 0);
163 if (virq == NO_IRQ) {
164 printk(KERN_ERR
165 "iic: failed to map IPI %s on node %d\n",
166 name, node);
167 continue;
168 }
169 rname = kzalloc(strlen(name) + 16, GFP_KERNEL);
170 if (rname)
171 sprintf(rname, "%s node %d", name, node);
172 else
173 rname = (char *)name;
174 if (request_irq(virq, iic_ipi_action, IRQF_DISABLED,
175 rname, (void *)(long)ipi))
176 printk(KERN_ERR
177 "iic: failed to request IPI %s on node %d\n",
178 name, node);
179 }
312} 180}
313 181
314void iic_request_IPIs(void) 182void iic_request_IPIs(void)
@@ -319,34 +187,119 @@ void iic_request_IPIs(void)
319 iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug"); 187 iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
320#endif /* CONFIG_DEBUGGER */ 188#endif /* CONFIG_DEBUGGER */
321} 189}
190
322#endif /* CONFIG_SMP */ 191#endif /* CONFIG_SMP */
323 192
324static void iic_setup_spe_handlers(void) 193
194static int iic_host_match(struct irq_host *h, struct device_node *node)
195{
196 return h->host_data != NULL && node == h->host_data;
197}
198
199static int iic_host_map(struct irq_host *h, unsigned int virq,
200 irq_hw_number_t hw, unsigned int flags)
201{
202 if (hw < IIC_IRQ_IPI0)
203 set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq);
204 else
205 set_irq_chip_and_handler(virq, &iic_chip, handle_percpu_irq);
206 return 0;
207}
208
209static int iic_host_xlate(struct irq_host *h, struct device_node *ct,
210 u32 *intspec, unsigned int intsize,
211 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
212
213{
214 /* Currently, we don't translate anything. That needs to be fixed as
215 * we get better defined device-trees. iic interrupts have to be
216 * explicitely mapped by whoever needs them
217 */
218 return -ENODEV;
219}
220
221static struct irq_host_ops iic_host_ops = {
222 .match = iic_host_match,
223 .map = iic_host_map,
224 .xlate = iic_host_xlate,
225};
226
227static void __init init_one_iic(unsigned int hw_cpu, unsigned long addr,
228 struct irq_host *host)
325{ 229{
326 int be, isrc; 230 /* XXX FIXME: should locate the linux CPU number from the HW cpu
231 * number properly. We are lucky for now
232 */
233 struct iic *iic = &per_cpu(iic, hw_cpu);
234
235 iic->regs = ioremap(addr, sizeof(struct cbe_iic_thread_regs));
236 BUG_ON(iic->regs == NULL);
327 237
328 /* Assume two threads per BE are present */ 238 iic->target_id = ((hw_cpu & 2) << 3) | ((hw_cpu & 1) ? 0xf : 0xe);
329 for (be=0; be < num_present_cpus() / 2; be++) { 239 iic->eoi_stack[0] = 0xff;
330 for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) { 240 iic->host = host;
331 int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc; 241 out_be64(&iic->regs->prio, 0);
332 get_irq_desc(irq)->chip = &iic_pic; 242
243 printk(KERN_INFO "IIC for CPU %d at %lx mapped to %p, target id 0x%x\n",
244 hw_cpu, addr, iic->regs, iic->target_id);
245}
246
247static int __init setup_iic(void)
248{
249 struct device_node *dn;
250 struct resource r0, r1;
251 struct irq_host *host;
252 int found = 0;
253 u32 *np;
254
255 for (dn = NULL;
256 (dn = of_find_node_by_name(dn,"interrupt-controller")) != NULL;) {
257 if (!device_is_compatible(dn,
258 "IBM,CBEA-Internal-Interrupt-Controller"))
259 continue;
260 np = (u32 *)get_property(dn, "ibm,interrupt-server-ranges",
261 NULL);
262 if (np == NULL) {
263 printk(KERN_WARNING "IIC: CPU association not found\n");
264 of_node_put(dn);
265 return -ENODEV;
266 }
267 if (of_address_to_resource(dn, 0, &r0) ||
268 of_address_to_resource(dn, 1, &r1)) {
269 printk(KERN_WARNING "IIC: Can't resolve addresses\n");
270 of_node_put(dn);
271 return -ENODEV;
333 } 272 }
273 host = NULL;
274 if (found < IIC_NODE_COUNT) {
275 host = irq_alloc_host(IRQ_HOST_MAP_LINEAR,
276 IIC_SOURCE_COUNT,
277 &iic_host_ops,
278 IIC_IRQ_INVALID);
279 iic_hosts[found] = host;
280 BUG_ON(iic_hosts[found] == NULL);
281 iic_hosts[found]->host_data = of_node_get(dn);
282 found++;
283 }
284 init_one_iic(np[0], r0.start, host);
285 init_one_iic(np[1], r1.start, host);
334 } 286 }
287
288 if (found)
289 return 0;
290 else
291 return -ENODEV;
335} 292}
336 293
337void iic_init_IRQ(void) 294void __init iic_init_IRQ(void)
338{ 295{
339 int cpu, irq_offset; 296 /* Discover and initialize iics */
340 struct iic *iic;
341
342 if (setup_iic() < 0) 297 if (setup_iic() < 0)
343 setup_iic_hardcoded(); 298 panic("IIC: Failed to initialize !\n");
344 299
345 irq_offset = 0; 300 /* Set master interrupt handling function */
346 for_each_possible_cpu(cpu) { 301 ppc_md.get_irq = iic_get_irq;
347 iic = &per_cpu(iic, cpu); 302
348 if (iic->regs) 303 /* Enable on current CPU */
349 out_be64(&iic->regs->prio, 0xff); 304 iic_setup_cpu();
350 }
351 iic_setup_spe_handlers();
352} 305}
diff --git a/arch/powerpc/platforms/cell/interrupt.h b/arch/powerpc/platforms/cell/interrupt.h
index 799f77d98f96..5560a92ec3ab 100644
--- a/arch/powerpc/platforms/cell/interrupt.h
+++ b/arch/powerpc/platforms/cell/interrupt.h
@@ -37,27 +37,24 @@
37 */ 37 */
38 38
39enum { 39enum {
40 IIC_EXT_OFFSET = 0x00, /* Start of south bridge IRQs */ 40 IIC_IRQ_INVALID = 0xff,
41 IIC_NUM_EXT = 0x40, /* Number of south bridge IRQs */ 41 IIC_IRQ_MAX = 0x3f,
42 IIC_SPE_OFFSET = 0x40, /* Start of SPE interrupts */ 42 IIC_IRQ_EXT_IOIF0 = 0x20,
43 IIC_CLASS_STRIDE = 0x10, /* SPE IRQs per class */ 43 IIC_IRQ_EXT_IOIF1 = 0x2b,
44 IIC_IPI_OFFSET = 0x70, /* Start of IPI IRQs */ 44 IIC_IRQ_IPI0 = 0x40,
45 IIC_NUM_IPIS = 0x10, /* IRQs reserved for IPI */ 45 IIC_NUM_IPIS = 0x10, /* IRQs reserved for IPI */
46 IIC_NODE_STRIDE = 0x80, /* Total IRQs per node */ 46 IIC_SOURCE_COUNT = 0x50,
47}; 47};
48 48
49extern void iic_init_IRQ(void); 49extern void iic_init_IRQ(void);
50extern int iic_get_irq(struct pt_regs *regs);
51extern void iic_cause_IPI(int cpu, int mesg); 50extern void iic_cause_IPI(int cpu, int mesg);
52extern void iic_request_IPIs(void); 51extern void iic_request_IPIs(void);
53extern void iic_setup_cpu(void); 52extern void iic_setup_cpu(void);
54extern void iic_local_enable(void);
55extern void iic_local_disable(void);
56 53
57extern u8 iic_get_target_id(int cpu); 54extern u8 iic_get_target_id(int cpu);
55extern struct irq_host *iic_get_irq_host(int node);
58 56
59extern void spider_init_IRQ(void); 57extern void spider_init_IRQ(void);
60extern int spider_get_irq(int node);
61 58
62#endif 59#endif
63#endif /* ASM_CELL_PIC_H */ 60#endif /* ASM_CELL_PIC_H */
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index d8c2a29b3c15..282987d6d4a2 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -49,6 +49,7 @@
49#include <asm/irq.h> 49#include <asm/irq.h>
50#include <asm/spu.h> 50#include <asm/spu.h>
51#include <asm/spu_priv1.h> 51#include <asm/spu_priv1.h>
52#include <asm/udbg.h>
52 53
53#include "interrupt.h" 54#include "interrupt.h"
54#include "iommu.h" 55#include "iommu.h"
@@ -79,10 +80,22 @@ static void cell_progress(char *s, unsigned short hex)
79 printk("*** %04x : %s\n", hex, s ? s : ""); 80 printk("*** %04x : %s\n", hex, s ? s : "");
80} 81}
81 82
83static void __init cell_pcibios_fixup(void)
84{
85 struct pci_dev *dev = NULL;
86
87 for_each_pci_dev(dev)
88 pci_read_irq_line(dev);
89}
90
91static void __init cell_init_irq(void)
92{
93 iic_init_IRQ();
94 spider_init_IRQ();
95}
96
82static void __init cell_setup_arch(void) 97static void __init cell_setup_arch(void)
83{ 98{
84 ppc_md.init_IRQ = iic_init_IRQ;
85 ppc_md.get_irq = iic_get_irq;
86#ifdef CONFIG_SPU_BASE 99#ifdef CONFIG_SPU_BASE
87 spu_priv1_ops = &spu_priv1_mmio_ops; 100 spu_priv1_ops = &spu_priv1_mmio_ops;
88#endif 101#endif
@@ -108,7 +121,6 @@ static void __init cell_setup_arch(void)
108 /* Find and initialize PCI host bridges */ 121 /* Find and initialize PCI host bridges */
109 init_pci_config_tokens(); 122 init_pci_config_tokens();
110 find_and_init_phbs(); 123 find_and_init_phbs();
111 spider_init_IRQ();
112 cbe_pervasive_init(); 124 cbe_pervasive_init();
113#ifdef CONFIG_DUMMY_CONSOLE 125#ifdef CONFIG_DUMMY_CONSOLE
114 conswitchp = &dummy_con; 126 conswitchp = &dummy_con;
@@ -126,8 +138,6 @@ static void __init cell_init_early(void)
126 138
127 cell_init_iommu(); 139 cell_init_iommu();
128 140
129 ppc64_interrupt_controller = IC_CELL_PIC;
130
131 DBG(" <- cell_init_early()\n"); 141 DBG(" <- cell_init_early()\n");
132} 142}
133 143
@@ -173,6 +183,8 @@ define_machine(cell) {
173 .calibrate_decr = generic_calibrate_decr, 183 .calibrate_decr = generic_calibrate_decr,
174 .check_legacy_ioport = cell_check_legacy_ioport, 184 .check_legacy_ioport = cell_check_legacy_ioport,
175 .progress = cell_progress, 185 .progress = cell_progress,
186 .init_IRQ = cell_init_irq,
187 .pcibios_fixup = cell_pcibios_fixup,
176#ifdef CONFIG_KEXEC 188#ifdef CONFIG_KEXEC
177 .machine_kexec = default_machine_kexec, 189 .machine_kexec = default_machine_kexec,
178 .machine_kexec_prepare = default_machine_kexec_prepare, 190 .machine_kexec_prepare = default_machine_kexec_prepare,
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 7c3a0b6d34fd..ae7ef88f1a37 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -22,6 +22,7 @@
22 22
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/ioport.h>
25 26
26#include <asm/pgtable.h> 27#include <asm/pgtable.h>
27#include <asm/prom.h> 28#include <asm/prom.h>
@@ -56,184 +57,313 @@ enum {
56 REISWAITEN = 0x508, /* Reissue Wait Control*/ 57 REISWAITEN = 0x508, /* Reissue Wait Control*/
57}; 58};
58 59
59static void __iomem *spider_pics[4]; 60#define SPIDER_CHIP_COUNT 4
61#define SPIDER_SRC_COUNT 64
62#define SPIDER_IRQ_INVALID 63
60 63
61static void __iomem *spider_get_pic(int irq) 64struct spider_pic {
62{ 65 struct irq_host *host;
63 int node = irq / IIC_NODE_STRIDE; 66 struct device_node *of_node;
64 irq %= IIC_NODE_STRIDE; 67 void __iomem *regs;
65 68 unsigned int node_id;
66 if (irq >= IIC_EXT_OFFSET && 69};
67 irq < IIC_EXT_OFFSET + IIC_NUM_EXT && 70static struct spider_pic spider_pics[SPIDER_CHIP_COUNT];
68 spider_pics)
69 return spider_pics[node];
70 return NULL;
71}
72 71
73static int spider_get_nr(unsigned int irq) 72static struct spider_pic *spider_virq_to_pic(unsigned int virq)
74{ 73{
75 return (irq % IIC_NODE_STRIDE) - IIC_EXT_OFFSET; 74 return irq_map[virq].host->host_data;
76} 75}
77 76
78static void __iomem *spider_get_irq_config(int irq) 77static void __iomem *spider_get_irq_config(struct spider_pic *pic,
78 unsigned int src)
79{ 79{
80 void __iomem *pic; 80 return pic->regs + TIR_CFGA + 8 * src;
81 pic = spider_get_pic(irq);
82 return pic + TIR_CFGA + 8 * spider_get_nr(irq);
83} 81}
84 82
85static void spider_enable_irq(unsigned int irq) 83static void spider_unmask_irq(unsigned int virq)
86{ 84{
87 int nodeid = (irq / IIC_NODE_STRIDE) * 0x10; 85 struct spider_pic *pic = spider_virq_to_pic(virq);
88 void __iomem *cfg = spider_get_irq_config(irq); 86 void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq);
89 irq = spider_get_nr(irq);
90 87
91 out_be32(cfg, (in_be32(cfg) & ~0xf0)| 0x3107000eu | nodeid); 88 /* We use no locking as we should be covered by the descriptor lock
92 out_be32(cfg + 4, in_be32(cfg + 4) | 0x00020000u | irq); 89 * for access to invidual source configuration registers
90 */
91 out_be32(cfg, in_be32(cfg) | 0x30000000u);
93} 92}
94 93
95static void spider_disable_irq(unsigned int irq) 94static void spider_mask_irq(unsigned int virq)
96{ 95{
97 void __iomem *cfg = spider_get_irq_config(irq); 96 struct spider_pic *pic = spider_virq_to_pic(virq);
98 irq = spider_get_nr(irq); 97 void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq);
99 98
99 /* We use no locking as we should be covered by the descriptor lock
100 * for access to invidual source configuration registers
101 */
100 out_be32(cfg, in_be32(cfg) & ~0x30000000u); 102 out_be32(cfg, in_be32(cfg) & ~0x30000000u);
101} 103}
102 104
103static unsigned int spider_startup_irq(unsigned int irq) 105static void spider_ack_irq(unsigned int virq)
104{ 106{
105 spider_enable_irq(irq); 107 struct spider_pic *pic = spider_virq_to_pic(virq);
106 return 0; 108 unsigned int src = irq_map[virq].hwirq;
107}
108 109
109static void spider_shutdown_irq(unsigned int irq) 110 /* Reset edge detection logic if necessary
110{ 111 */
111 spider_disable_irq(irq); 112 if (get_irq_desc(virq)->status & IRQ_LEVEL)
112} 113 return;
113 114
114static void spider_end_irq(unsigned int irq) 115 /* Only interrupts 47 to 50 can be set to edge */
115{ 116 if (src < 47 || src > 50)
116 spider_enable_irq(irq); 117 return;
117}
118 118
119static void spider_ack_irq(unsigned int irq) 119 /* Perform the clear of the edge logic */
120{ 120 out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf));
121 spider_disable_irq(irq);
122 iic_local_enable();
123} 121}
124 122
125static struct hw_interrupt_type spider_pic = { 123static struct irq_chip spider_pic = {
126 .typename = " SPIDER ", 124 .typename = " SPIDER ",
127 .startup = spider_startup_irq, 125 .unmask = spider_unmask_irq,
128 .shutdown = spider_shutdown_irq, 126 .mask = spider_mask_irq,
129 .enable = spider_enable_irq,
130 .disable = spider_disable_irq,
131 .ack = spider_ack_irq, 127 .ack = spider_ack_irq,
132 .end = spider_end_irq,
133}; 128};
134 129
135int spider_get_irq(int node) 130static int spider_host_match(struct irq_host *h, struct device_node *node)
136{ 131{
137 unsigned long cs; 132 struct spider_pic *pic = h->host_data;
138 void __iomem *regs = spider_pics[node]; 133 return node == pic->of_node;
139
140 cs = in_be32(regs + TIR_CS) >> 24;
141
142 if (cs == 63)
143 return -1;
144 else
145 return cs;
146} 134}
147 135
148/* hardcoded part to be compatible with older firmware */ 136static int spider_host_map(struct irq_host *h, unsigned int virq,
149 137 irq_hw_number_t hw, unsigned int flags)
150void spider_init_IRQ_hardcoded(void)
151{ 138{
152 int node; 139 unsigned int sense = flags & IRQ_TYPE_SENSE_MASK;
153 long spiderpic; 140 struct spider_pic *pic = h->host_data;
154 long pics[] = { 0x24000008000, 0x34000008000 }; 141 void __iomem *cfg = spider_get_irq_config(pic, hw);
155 int n; 142 int level = 0;
156 143 u32 ic;
157 pr_debug("%s(%d): Using hardcoded defaults\n", __FUNCTION__, __LINE__); 144
158 145 /* Note that only level high is supported for most interrupts */
159 for (node = 0; node < num_present_cpus()/2; node++) { 146 if (sense != IRQ_TYPE_NONE && sense != IRQ_TYPE_LEVEL_HIGH &&
160 spiderpic = pics[node]; 147 (hw < 47 || hw > 50))
161 printk(KERN_DEBUG "SPIDER addr: %lx\n", spiderpic); 148 return -EINVAL;
162 spider_pics[node] = ioremap(spiderpic, 0x800); 149
163 for (n = 0; n < IIC_NUM_EXT; n++) { 150 /* Decode sense type */
164 int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; 151 switch(sense) {
165 get_irq_desc(irq)->chip = &spider_pic; 152 case IRQ_TYPE_EDGE_RISING:
166 } 153 ic = 0x3;
167 154 break;
168 /* do not mask any interrupts because of level */ 155 case IRQ_TYPE_EDGE_FALLING:
169 out_be32(spider_pics[node] + TIR_MSK, 0x0); 156 ic = 0x2;
170 157 break;
171 /* disable edge detection clear */ 158 case IRQ_TYPE_LEVEL_LOW:
172 /* out_be32(spider_pics[node] + TIR_EDC, 0x0); */ 159 ic = 0x0;
173 160 level = 1;
174 /* enable interrupt packets to be output */ 161 break;
175 out_be32(spider_pics[node] + TIR_PIEN, 162 case IRQ_TYPE_LEVEL_HIGH:
176 in_be32(spider_pics[node] + TIR_PIEN) | 0x1); 163 case IRQ_TYPE_NONE:
177 164 ic = 0x1;
178 /* Enable the interrupt detection enable bit. Do this last! */ 165 level = 1;
179 out_be32(spider_pics[node] + TIR_DEN, 166 break;
180 in_be32(spider_pics[node] + TIR_DEN) | 0x1); 167 default:
168 return -EINVAL;
181 } 169 }
182}
183 170
184void spider_init_IRQ(void) 171 /* Configure the source. One gross hack that was there before and
185{ 172 * that I've kept around is the priority to the BE which I set to
186 long spider_reg; 173 * be the same as the interrupt source number. I don't know wether
187 struct device_node *dn; 174 * that's supposed to make any kind of sense however, we'll have to
188 char *compatible; 175 * decide that, but for now, I'm not changing the behaviour.
189 int n, node = 0; 176 */
177 out_be32(cfg, (ic << 24) | (0x7 << 16) | (pic->node_id << 4) | 0xe);
178 out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff));
179
180 if (level)
181 get_irq_desc(virq)->status |= IRQ_LEVEL;
182 set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq);
183 return 0;
184}
190 185
191 for (dn = NULL; (dn = of_find_node_by_name(dn, "interrupt-controller"));) { 186static int spider_host_xlate(struct irq_host *h, struct device_node *ct,
192 compatible = (char *)get_property(dn, "compatible", NULL); 187 u32 *intspec, unsigned int intsize,
188 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
193 189
194 if (!compatible) 190{
195 continue; 191 /* Spider interrupts have 2 cells, first is the interrupt source,
192 * second, well, I don't know for sure yet ... We mask the top bits
193 * because old device-trees encode a node number in there
194 */
195 *out_hwirq = intspec[0] & 0x3f;
196 *out_flags = IRQ_TYPE_LEVEL_HIGH;
197 return 0;
198}
196 199
197 if (strstr(compatible, "CBEA,platform-spider-pic")) 200static struct irq_host_ops spider_host_ops = {
198 spider_reg = *(long *)get_property(dn,"reg", NULL); 201 .match = spider_host_match,
199 else if (strstr(compatible, "sti,platform-spider-pic")) { 202 .map = spider_host_map,
200 spider_init_IRQ_hardcoded(); 203 .xlate = spider_host_xlate,
201 return; 204};
202 } else
203 continue;
204 205
205 if (!spider_reg) 206static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc,
206 printk("interrupt controller does not have reg property !\n"); 207 struct pt_regs *regs)
208{
209 struct spider_pic *pic = desc->handler_data;
210 unsigned int cs, virq;
207 211
208 n = prom_n_addr_cells(dn); 212 cs = in_be32(pic->regs + TIR_CS) >> 24;
213 if (cs == SPIDER_IRQ_INVALID)
214 virq = NO_IRQ;
215 else
216 virq = irq_linear_revmap(pic->host, cs);
217 if (virq != NO_IRQ)
218 generic_handle_irq(virq, regs);
219 desc->chip->eoi(irq);
220}
209 221
210 if ( n != 2) 222/* For hooking up the cascace we have a problem. Our device-tree is
211 printk("reg property with invalid number of elements \n"); 223 * crap and we don't know on which BE iic interrupt we are hooked on at
224 * least not the "standard" way. We can reconstitute it based on two
225 * informations though: which BE node we are connected to and wether
226 * we are connected to IOIF0 or IOIF1. Right now, we really only care
227 * about the IBM cell blade and we know that its firmware gives us an
228 * interrupt-map property which is pretty strange.
229 */
230static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)
231{
232 unsigned int virq;
233 u32 *imap, *tmp;
234 int imaplen, intsize, unit;
235 struct device_node *iic;
236 struct irq_host *iic_host;
237
238#if 0 /* Enable that when we have a way to retreive the node as well */
239 /* First, we check wether we have a real "interrupts" in the device
240 * tree in case the device-tree is ever fixed
241 */
242 struct of_irq oirq;
243 if (of_irq_map_one(pic->of_node, 0, &oirq) == 0) {
244 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
245 oirq.size);
246 goto bail;
247 }
248#endif
249
250 /* Now do the horrible hacks */
251 tmp = (u32 *)get_property(pic->of_node, "#interrupt-cells", NULL);
252 if (tmp == NULL)
253 return NO_IRQ;
254 intsize = *tmp;
255 imap = (u32 *)get_property(pic->of_node, "interrupt-map", &imaplen);
256 if (imap == NULL || imaplen < (intsize + 1))
257 return NO_IRQ;
258 iic = of_find_node_by_phandle(imap[intsize]);
259 if (iic == NULL)
260 return NO_IRQ;
261 imap += intsize + 1;
262 tmp = (u32 *)get_property(iic, "#interrupt-cells", NULL);
263 if (tmp == NULL)
264 return NO_IRQ;
265 intsize = *tmp;
266 /* Assume unit is last entry of interrupt specifier */
267 unit = imap[intsize - 1];
268 /* Ok, we have a unit, now let's try to get the node */
269 tmp = (u32 *)get_property(iic, "ibm,interrupt-server-ranges", NULL);
270 if (tmp == NULL) {
271 of_node_put(iic);
272 return NO_IRQ;
273 }
274 /* ugly as hell but works for now */
275 pic->node_id = (*tmp) >> 1;
276 of_node_put(iic);
277
278 /* Ok, now let's get cracking. You may ask me why I just didn't match
279 * the iic host from the iic OF node, but that way I'm still compatible
280 * with really really old old firmwares for which we don't have a node
281 */
282 iic_host = iic_get_irq_host(pic->node_id);
283 if (iic_host == NULL)
284 return NO_IRQ;
285 /* Manufacture an IIC interrupt number of class 2 */
286 virq = irq_create_mapping(iic_host, 0x20 | unit, 0);
287 if (virq == NO_IRQ)
288 printk(KERN_ERR "spider_pic: failed to map cascade !");
289 return virq;
290}
212 291
213 spider_pics[node] = ioremap(spider_reg, 0x800);
214 292
215 printk("SPIDER addr: %lx with %i addr_cells mapped to %p\n", 293static void __init spider_init_one(struct device_node *of_node, int chip,
216 spider_reg, n, spider_pics[node]); 294 unsigned long addr)
295{
296 struct spider_pic *pic = &spider_pics[chip];
297 int i, virq;
298
299 /* Map registers */
300 pic->regs = ioremap(addr, 0x1000);
301 if (pic->regs == NULL)
302 panic("spider_pic: can't map registers !");
303
304 /* Allocate a host */
305 pic->host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, SPIDER_SRC_COUNT,
306 &spider_host_ops, SPIDER_IRQ_INVALID);
307 if (pic->host == NULL)
308 panic("spider_pic: can't allocate irq host !");
309 pic->host->host_data = pic;
310
311 /* Fill out other bits */
312 pic->of_node = of_node_get(of_node);
313
314 /* Go through all sources and disable them */
315 for (i = 0; i < SPIDER_SRC_COUNT; i++) {
316 void __iomem *cfg = pic->regs + TIR_CFGA + 8 * i;
317 out_be32(cfg, in_be32(cfg) & ~0x30000000u);
318 }
217 319
218 for (n = 0; n < IIC_NUM_EXT; n++) { 320 /* do not mask any interrupts because of level */
219 int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; 321 out_be32(pic->regs + TIR_MSK, 0x0);
220 get_irq_desc(irq)->chip = &spider_pic;
221 }
222 322
223 /* do not mask any interrupts because of level */ 323 /* enable interrupt packets to be output */
224 out_be32(spider_pics[node] + TIR_MSK, 0x0); 324 out_be32(pic->regs + TIR_PIEN, in_be32(pic->regs + TIR_PIEN) | 0x1);
225 325
226 /* disable edge detection clear */ 326 /* Hook up the cascade interrupt to the iic and nodeid */
227 /* out_be32(spider_pics[node] + TIR_EDC, 0x0); */ 327 virq = spider_find_cascade_and_node(pic);
328 if (virq == NO_IRQ)
329 return;
330 set_irq_data(virq, pic);
331 set_irq_chained_handler(virq, spider_irq_cascade);
228 332
229 /* enable interrupt packets to be output */ 333 printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n",
230 out_be32(spider_pics[node] + TIR_PIEN, 334 pic->node_id, addr, of_node->full_name);
231 in_be32(spider_pics[node] + TIR_PIEN) | 0x1);
232 335
233 /* Enable the interrupt detection enable bit. Do this last! */ 336 /* Enable the interrupt detection enable bit. Do this last! */
234 out_be32(spider_pics[node] + TIR_DEN, 337 out_be32(pic->regs + TIR_DEN, in_be32(pic->regs + TIR_DEN) | 0x1);
235 in_be32(spider_pics[node] + TIR_DEN) | 0x1); 338}
236 339
237 node++; 340void __init spider_init_IRQ(void)
341{
342 struct resource r;
343 struct device_node *dn;
344 int chip = 0;
345
346 /* XXX node numbers are totally bogus. We _hope_ we get the device
347 * nodes in the right order here but that's definitely not guaranteed,
348 * we need to get the node from the device tree instead.
349 * There is currently no proper property for it (but our whole
350 * device-tree is bogus anyway) so all we can do is pray or maybe test
351 * the address and deduce the node-id
352 */
353 for (dn = NULL;
354 (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
355 if (device_is_compatible(dn, "CBEA,platform-spider-pic")) {
356 if (of_address_to_resource(dn, 0, &r)) {
357 printk(KERN_WARNING "spider-pic: Failed\n");
358 continue;
359 }
360 } else if (device_is_compatible(dn, "sti,platform-spider-pic")
361 && (chip < 2)) {
362 static long hard_coded_pics[] =
363 { 0x24000008000, 0x34000008000 };
364 r.start = hard_coded_pics[chip];
365 } else
366 continue;
367 spider_init_one(dn, chip++, r.start);
238 } 368 }
239} 369}
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index b306723abb87..5d2313a6c82b 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -264,51 +264,57 @@ spu_irq_class_2(int irq, void *data, struct pt_regs *regs)
264 return stat ? IRQ_HANDLED : IRQ_NONE; 264 return stat ? IRQ_HANDLED : IRQ_NONE;
265} 265}
266 266
267static int 267static int spu_request_irqs(struct spu *spu)
268spu_request_irqs(struct spu *spu)
269{ 268{
270 int ret; 269 int ret = 0;
271 int irq_base;
272
273 irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET;
274
275 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", spu->number);
276 ret = request_irq(irq_base + spu->isrc,
277 spu_irq_class_0, SA_INTERRUPT, spu->irq_c0, spu);
278 if (ret)
279 goto out;
280
281 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", spu->number);
282 ret = request_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc,
283 spu_irq_class_1, SA_INTERRUPT, spu->irq_c1, spu);
284 if (ret)
285 goto out1;
286 270
287 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", spu->number); 271 if (spu->irqs[0] != NO_IRQ) {
288 ret = request_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc, 272 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
289 spu_irq_class_2, SA_INTERRUPT, spu->irq_c2, spu); 273 spu->number);
290 if (ret) 274 ret = request_irq(spu->irqs[0], spu_irq_class_0,
291 goto out2; 275 IRQF_DISABLED,
292 goto out; 276 spu->irq_c0, spu);
277 if (ret)
278 goto bail0;
279 }
280 if (spu->irqs[1] != NO_IRQ) {
281 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
282 spu->number);
283 ret = request_irq(spu->irqs[1], spu_irq_class_1,
284 IRQF_DISABLED,
285 spu->irq_c1, spu);
286 if (ret)
287 goto bail1;
288 }
289 if (spu->irqs[2] != NO_IRQ) {
290 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
291 spu->number);
292 ret = request_irq(spu->irqs[2], spu_irq_class_2,
293 IRQF_DISABLED,
294 spu->irq_c2, spu);
295 if (ret)
296 goto bail2;
297 }
298 return 0;
293 299
294out2: 300bail2:
295 free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu); 301 if (spu->irqs[1] != NO_IRQ)
296out1: 302 free_irq(spu->irqs[1], spu);
297 free_irq(irq_base + spu->isrc, spu); 303bail1:
298out: 304 if (spu->irqs[0] != NO_IRQ)
305 free_irq(spu->irqs[0], spu);
306bail0:
299 return ret; 307 return ret;
300} 308}
301 309
302static void 310static void spu_free_irqs(struct spu *spu)
303spu_free_irqs(struct spu *spu)
304{ 311{
305 int irq_base; 312 if (spu->irqs[0] != NO_IRQ)
306 313 free_irq(spu->irqs[0], spu);
307 irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET; 314 if (spu->irqs[1] != NO_IRQ)
308 315 free_irq(spu->irqs[1], spu);
309 free_irq(irq_base + spu->isrc, spu); 316 if (spu->irqs[2] != NO_IRQ)
310 free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu); 317 free_irq(spu->irqs[2], spu);
311 free_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc, spu);
312} 318}
313 319
314static LIST_HEAD(spu_list); 320static LIST_HEAD(spu_list);
@@ -559,17 +565,38 @@ static void spu_unmap(struct spu *spu)
559 iounmap((u8 __iomem *)spu->local_store); 565 iounmap((u8 __iomem *)spu->local_store);
560} 566}
561 567
568/* This function shall be abstracted for HV platforms */
569static int __init spu_map_interrupts(struct spu *spu, struct device_node *np)
570{
571 struct irq_host *host;
572 unsigned int isrc;
573 u32 *tmp;
574
575 host = iic_get_irq_host(spu->node);
576 if (host == NULL)
577 return -ENODEV;
578
579 /* Get the interrupt source from the device-tree */
580 tmp = (u32 *)get_property(np, "isrc", NULL);
581 if (!tmp)
582 return -ENODEV;
583 spu->isrc = isrc = tmp[0];
584
585 /* Now map interrupts of all 3 classes */
586 spu->irqs[0] = irq_create_mapping(host, 0x00 | isrc, 0);
587 spu->irqs[1] = irq_create_mapping(host, 0x10 | isrc, 0);
588 spu->irqs[2] = irq_create_mapping(host, 0x20 | isrc, 0);
589
590 /* Right now, we only fail if class 2 failed */
591 return spu->irqs[2] == NO_IRQ ? -EINVAL : 0;
592}
593
562static int __init spu_map_device(struct spu *spu, struct device_node *node) 594static int __init spu_map_device(struct spu *spu, struct device_node *node)
563{ 595{
564 char *prop; 596 char *prop;
565 int ret; 597 int ret;
566 598
567 ret = -ENODEV; 599 ret = -ENODEV;
568 prop = get_property(node, "isrc", NULL);
569 if (!prop)
570 goto out;
571 spu->isrc = *(unsigned int *)prop;
572
573 spu->name = get_property(node, "name", NULL); 600 spu->name = get_property(node, "name", NULL);
574 if (!spu->name) 601 if (!spu->name)
575 goto out; 602 goto out;
@@ -636,7 +663,8 @@ static int spu_create_sysdev(struct spu *spu)
636 return ret; 663 return ret;
637 } 664 }
638 665
639 sysdev_create_file(&spu->sysdev, &attr_isrc); 666 if (spu->isrc != 0)
667 sysdev_create_file(&spu->sysdev, &attr_isrc);
640 sysfs_add_device_to_node(&spu->sysdev, spu->nid); 668 sysfs_add_device_to_node(&spu->sysdev, spu->nid);
641 669
642 return 0; 670 return 0;
@@ -668,6 +696,9 @@ static int __init create_spu(struct device_node *spe)
668 spu->nid = of_node_to_nid(spe); 696 spu->nid = of_node_to_nid(spe);
669 if (spu->nid == -1) 697 if (spu->nid == -1)
670 spu->nid = 0; 698 spu->nid = 0;
699 ret = spu_map_interrupts(spu, spe);
700 if (ret)
701 goto out_unmap;
671 spin_lock_init(&spu->register_lock); 702 spin_lock_init(&spu->register_lock);
672 spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1)); 703 spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));
673 spu_mfc_sr1_set(spu, 0x33); 704 spu_mfc_sr1_set(spu, 0x33);
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index 66c253498803..6802cdc3168a 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -18,7 +18,6 @@
18#include <asm/machdep.h> 18#include <asm/machdep.h>
19#include <asm/sections.h> 19#include <asm/sections.h>
20#include <asm/pci-bridge.h> 20#include <asm/pci-bridge.h>
21#include <asm/open_pic.h>
22#include <asm/grackle.h> 21#include <asm/grackle.h>
23#include <asm/rtas.h> 22#include <asm/rtas.h>
24 23
@@ -161,15 +160,9 @@ void __init
161chrp_pcibios_fixup(void) 160chrp_pcibios_fixup(void)
162{ 161{
163 struct pci_dev *dev = NULL; 162 struct pci_dev *dev = NULL;
164 struct device_node *np;
165 163
166 /* PCI interrupts are controlled by the OpenPIC */ 164 for_each_pci_dev(dev)
167 for_each_pci_dev(dev) { 165 pci_read_irq_line(dev);
168 np = pci_device_to_OF_node(dev);
169 if ((np != 0) && (np->n_intrs > 0) && (np->intrs[0].line != 0))
170 dev->irq = np->intrs[0].line;
171 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
172 }
173} 166}
174 167
175#define PRG_CL_RESET_VALID 0x00010000 168#define PRG_CL_RESET_VALID 0x00010000
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 1f1771b212b4..538e337d63e2 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -24,7 +24,7 @@
24#include <linux/reboot.h> 24#include <linux/reboot.h>
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/pci.h> 26#include <linux/pci.h>
27#include <linux/version.h> 27#include <linux/utsrelease.h>
28#include <linux/adb.h> 28#include <linux/adb.h>
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/delay.h> 30#include <linux/delay.h>
@@ -59,7 +59,7 @@ void rtas_indicator_progress(char *, unsigned short);
59int _chrp_type; 59int _chrp_type;
60EXPORT_SYMBOL(_chrp_type); 60EXPORT_SYMBOL(_chrp_type);
61 61
62struct mpic *chrp_mpic; 62static struct mpic *chrp_mpic;
63 63
64/* Used for doing CHRP event-scans */ 64/* Used for doing CHRP event-scans */
65DEFINE_PER_CPU(struct timer_list, heartbeat_timer); 65DEFINE_PER_CPU(struct timer_list, heartbeat_timer);
@@ -315,24 +315,32 @@ chrp_event_scan(unsigned long unused)
315 jiffies + event_scan_interval); 315 jiffies + event_scan_interval);
316} 316}
317 317
318static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc,
319 struct pt_regs *regs)
320{
321 unsigned int cascade_irq = i8259_irq(regs);
322 if (cascade_irq != NO_IRQ)
323 generic_handle_irq(cascade_irq, regs);
324 desc->chip->eoi(irq);
325}
326
318/* 327/*
319 * Finds the open-pic node and sets up the mpic driver. 328 * Finds the open-pic node and sets up the mpic driver.
320 */ 329 */
321static void __init chrp_find_openpic(void) 330static void __init chrp_find_openpic(void)
322{ 331{
323 struct device_node *np, *root; 332 struct device_node *np, *root;
324 int len, i, j, irq_count; 333 int len, i, j;
325 int isu_size, idu_size; 334 int isu_size, idu_size;
326 unsigned int *iranges, *opprop = NULL; 335 unsigned int *iranges, *opprop = NULL;
327 int oplen = 0; 336 int oplen = 0;
328 unsigned long opaddr; 337 unsigned long opaddr;
329 int na = 1; 338 int na = 1;
330 unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS];
331 339
332 np = find_type_devices("open-pic"); 340 np = of_find_node_by_type(NULL, "open-pic");
333 if (np == NULL) 341 if (np == NULL)
334 return; 342 return;
335 root = find_path_device("/"); 343 root = of_find_node_by_path("/");
336 if (root) { 344 if (root) {
337 opprop = (unsigned int *) get_property 345 opprop = (unsigned int *) get_property
338 (root, "platform-open-pic", &oplen); 346 (root, "platform-open-pic", &oplen);
@@ -343,19 +351,15 @@ static void __init chrp_find_openpic(void)
343 oplen /= na * sizeof(unsigned int); 351 oplen /= na * sizeof(unsigned int);
344 } else { 352 } else {
345 struct resource r; 353 struct resource r;
346 if (of_address_to_resource(np, 0, &r)) 354 if (of_address_to_resource(np, 0, &r)) {
347 return; 355 goto bail;
356 }
348 opaddr = r.start; 357 opaddr = r.start;
349 oplen = 0; 358 oplen = 0;
350 } 359 }
351 360
352 printk(KERN_INFO "OpenPIC at %lx\n", opaddr); 361 printk(KERN_INFO "OpenPIC at %lx\n", opaddr);
353 362
354 irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
355 prom_get_irq_senses(init_senses, NUM_ISA_INTERRUPTS, NR_IRQS - 4);
356 /* i8259 cascade is always positive level */
357 init_senses[0] = IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE;
358
359 iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len); 363 iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len);
360 if (iranges == NULL) 364 if (iranges == NULL)
361 len = 0; /* non-distributed mpic */ 365 len = 0; /* non-distributed mpic */
@@ -382,15 +386,12 @@ static void __init chrp_find_openpic(void)
382 if (len > 1) 386 if (len > 1)
383 isu_size = iranges[3]; 387 isu_size = iranges[3];
384 388
385 chrp_mpic = mpic_alloc(opaddr, MPIC_PRIMARY, 389 chrp_mpic = mpic_alloc(np, opaddr, MPIC_PRIMARY,
386 isu_size, NUM_ISA_INTERRUPTS, irq_count, 390 isu_size, 0, " MPIC ");
387 NR_IRQS - 4, init_senses, irq_count,
388 " MPIC ");
389 if (chrp_mpic == NULL) { 391 if (chrp_mpic == NULL) {
390 printk(KERN_ERR "Failed to allocate MPIC structure\n"); 392 printk(KERN_ERR "Failed to allocate MPIC structure\n");
391 return; 393 goto bail;
392 } 394 }
393
394 j = na - 1; 395 j = na - 1;
395 for (i = 1; i < len; ++i) { 396 for (i = 1; i < len; ++i) {
396 iranges += 2; 397 iranges += 2;
@@ -402,7 +403,10 @@ static void __init chrp_find_openpic(void)
402 } 403 }
403 404
404 mpic_init(chrp_mpic); 405 mpic_init(chrp_mpic);
405 mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL); 406 ppc_md.get_irq = mpic_get_irq;
407 bail:
408 of_node_put(root);
409 of_node_put(np);
406} 410}
407 411
408#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) 412#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
@@ -413,14 +417,34 @@ static struct irqaction xmon_irqaction = {
413}; 417};
414#endif 418#endif
415 419
416void __init chrp_init_IRQ(void) 420static void __init chrp_find_8259(void)
417{ 421{
418 struct device_node *np; 422 struct device_node *np, *pic = NULL;
419 unsigned long chrp_int_ack = 0; 423 unsigned long chrp_int_ack = 0;
420#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) 424 unsigned int cascade_irq;
421 struct device_node *kbd; 425
422#endif 426 /* Look for cascade */
427 for_each_node_by_type(np, "interrupt-controller")
428 if (device_is_compatible(np, "chrp,iic")) {
429 pic = np;
430 break;
431 }
432 /* Ok, 8259 wasn't found. We need to handle the case where
433 * we have a pegasos that claims to be chrp but doesn't have
434 * a proper interrupt tree
435 */
436 if (pic == NULL && chrp_mpic != NULL) {
437 printk(KERN_ERR "i8259: Not found in device-tree"
438 " assuming no legacy interrupts\n");
439 return;
440 }
423 441
442 /* Look for intack. In a perfect world, we would look for it on
443 * the ISA bus that holds the 8259 but heh... Works that way. If
444 * we ever see a problem, we can try to re-use the pSeries code here.
445 * Also, Pegasos-type platforms don't have a proper node to start
446 * from anyway
447 */
424 for (np = find_devices("pci"); np != NULL; np = np->next) { 448 for (np = find_devices("pci"); np != NULL; np = np->next) {
425 unsigned int *addrp = (unsigned int *) 449 unsigned int *addrp = (unsigned int *)
426 get_property(np, "8259-interrupt-acknowledge", NULL); 450 get_property(np, "8259-interrupt-acknowledge", NULL);
@@ -431,11 +455,29 @@ void __init chrp_init_IRQ(void)
431 break; 455 break;
432 } 456 }
433 if (np == NULL) 457 if (np == NULL)
434 printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n"); 458 printk(KERN_WARNING "Cannot find PCI interrupt acknowledge"
459 " address, polling\n");
460
461 i8259_init(pic, chrp_int_ack);
462 if (ppc_md.get_irq == NULL)
463 ppc_md.get_irq = i8259_irq;
464 if (chrp_mpic != NULL) {
465 cascade_irq = irq_of_parse_and_map(pic, 0);
466 if (cascade_irq == NO_IRQ)
467 printk(KERN_ERR "i8259: failed to map cascade irq\n");
468 else
469 set_irq_chained_handler(cascade_irq,
470 chrp_8259_cascade);
471 }
472}
435 473
474void __init chrp_init_IRQ(void)
475{
476#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
477 struct device_node *kbd;
478#endif
436 chrp_find_openpic(); 479 chrp_find_openpic();
437 480 chrp_find_8259();
438 i8259_init(chrp_int_ack, 0);
439 481
440 if (_chrp_type == _CHRP_Pegasos) 482 if (_chrp_type == _CHRP_Pegasos)
441 ppc_md.get_irq = i8259_irq; 483 ppc_md.get_irq = i8259_irq;
@@ -520,10 +562,6 @@ static int __init chrp_probe(void)
520 DMA_MODE_READ = 0x44; 562 DMA_MODE_READ = 0x44;
521 DMA_MODE_WRITE = 0x48; 563 DMA_MODE_WRITE = 0x48;
522 isa_io_base = CHRP_ISA_IO_BASE; /* default value */ 564 isa_io_base = CHRP_ISA_IO_BASE; /* default value */
523 ppc_do_canonicalize_irqs = 1;
524
525 /* Assume we have an 8259... */
526 __irq_offset_value = NUM_ISA_INTERRUPTS;
527 565
528 return 1; 566 return 1;
529} 567}
@@ -535,7 +573,6 @@ define_machine(chrp) {
535 .init = chrp_init2, 573 .init = chrp_init2,
536 .show_cpuinfo = chrp_show_cpuinfo, 574 .show_cpuinfo = chrp_show_cpuinfo,
537 .init_IRQ = chrp_init_IRQ, 575 .init_IRQ = chrp_init_IRQ,
538 .get_irq = mpic_get_irq,
539 .pcibios_fixup = chrp_pcibios_fixup, 576 .pcibios_fixup = chrp_pcibios_fixup,
540 .restart = rtas_restart, 577 .restart = rtas_restart,
541 .power_off = rtas_power_off, 578 .power_off = rtas_power_off,
diff --git a/arch/powerpc/platforms/chrp/smp.c b/arch/powerpc/platforms/chrp/smp.c
index c298ca1ea680..1d2307e87c30 100644
--- a/arch/powerpc/platforms/chrp/smp.c
+++ b/arch/powerpc/platforms/chrp/smp.c
@@ -29,7 +29,6 @@
29#include <asm/smp.h> 29#include <asm/smp.h>
30#include <asm/residual.h> 30#include <asm/residual.h>
31#include <asm/time.h> 31#include <asm/time.h>
32#include <asm/open_pic.h>
33#include <asm/machdep.h> 32#include <asm/machdep.h>
34#include <asm/smp.h> 33#include <asm/smp.h>
35#include <asm/mpic.h> 34#include <asm/mpic.h>
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index f70e820e7304..2275e64f3152 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -162,27 +162,6 @@ static void pci_event_handler(struct HvLpEvent *event, struct pt_regs *regs)
162 printk(KERN_ERR "pci_event_handler: NULL event received\n"); 162 printk(KERN_ERR "pci_event_handler: NULL event received\n");
163} 163}
164 164
165/*
166 * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
167 * It must be called before the bus walk.
168 */
169void __init iSeries_init_IRQ(void)
170{
171 /* Register PCI event handler and open an event path */
172 int ret;
173
174 ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
175 &pci_event_handler);
176 if (ret == 0) {
177 ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
178 if (ret != 0)
179 printk(KERN_ERR "iseries_init_IRQ: open event path "
180 "failed with rc 0x%x\n", ret);
181 } else
182 printk(KERN_ERR "iseries_init_IRQ: register handler "
183 "failed with rc 0x%x\n", ret);
184}
185
186#define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff) 165#define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff)
187#define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1) 166#define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
188#define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1) 167#define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
@@ -196,7 +175,7 @@ static void iseries_enable_IRQ(unsigned int irq)
196{ 175{
197 u32 bus, dev_id, function, mask; 176 u32 bus, dev_id, function, mask;
198 const u32 sub_bus = 0; 177 const u32 sub_bus = 0;
199 unsigned int rirq = virt_irq_to_real_map[irq]; 178 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
200 179
201 /* The IRQ has already been locked by the caller */ 180 /* The IRQ has already been locked by the caller */
202 bus = REAL_IRQ_TO_BUS(rirq); 181 bus = REAL_IRQ_TO_BUS(rirq);
@@ -213,7 +192,7 @@ static unsigned int iseries_startup_IRQ(unsigned int irq)
213{ 192{
214 u32 bus, dev_id, function, mask; 193 u32 bus, dev_id, function, mask;
215 const u32 sub_bus = 0; 194 const u32 sub_bus = 0;
216 unsigned int rirq = virt_irq_to_real_map[irq]; 195 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
217 196
218 bus = REAL_IRQ_TO_BUS(rirq); 197 bus = REAL_IRQ_TO_BUS(rirq);
219 function = REAL_IRQ_TO_FUNC(rirq); 198 function = REAL_IRQ_TO_FUNC(rirq);
@@ -254,7 +233,7 @@ static void iseries_shutdown_IRQ(unsigned int irq)
254{ 233{
255 u32 bus, dev_id, function, mask; 234 u32 bus, dev_id, function, mask;
256 const u32 sub_bus = 0; 235 const u32 sub_bus = 0;
257 unsigned int rirq = virt_irq_to_real_map[irq]; 236 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
258 237
259 /* irq should be locked by the caller */ 238 /* irq should be locked by the caller */
260 bus = REAL_IRQ_TO_BUS(rirq); 239 bus = REAL_IRQ_TO_BUS(rirq);
@@ -277,7 +256,7 @@ static void iseries_disable_IRQ(unsigned int irq)
277{ 256{
278 u32 bus, dev_id, function, mask; 257 u32 bus, dev_id, function, mask;
279 const u32 sub_bus = 0; 258 const u32 sub_bus = 0;
280 unsigned int rirq = virt_irq_to_real_map[irq]; 259 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
281 260
282 /* The IRQ has already been locked by the caller */ 261 /* The IRQ has already been locked by the caller */
283 bus = REAL_IRQ_TO_BUS(rirq); 262 bus = REAL_IRQ_TO_BUS(rirq);
@@ -291,19 +270,19 @@ static void iseries_disable_IRQ(unsigned int irq)
291 270
292static void iseries_end_IRQ(unsigned int irq) 271static void iseries_end_IRQ(unsigned int irq)
293{ 272{
294 unsigned int rirq = virt_irq_to_real_map[irq]; 273 unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
295 274
296 HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq), 275 HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq),
297 (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq)); 276 (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq));
298} 277}
299 278
300static hw_irq_controller iSeries_IRQ_handler = { 279static struct irq_chip iseries_pic = {
301 .typename = "iSeries irq controller", 280 .typename = "iSeries irq controller",
302 .startup = iseries_startup_IRQ, 281 .startup = iseries_startup_IRQ,
303 .shutdown = iseries_shutdown_IRQ, 282 .shutdown = iseries_shutdown_IRQ,
304 .enable = iseries_enable_IRQ, 283 .unmask = iseries_enable_IRQ,
305 .disable = iseries_disable_IRQ, 284 .mask = iseries_disable_IRQ,
306 .end = iseries_end_IRQ 285 .eoi = iseries_end_IRQ
307}; 286};
308 287
309/* 288/*
@@ -314,17 +293,14 @@ static hw_irq_controller iSeries_IRQ_handler = {
314int __init iSeries_allocate_IRQ(HvBusNumber bus, 293int __init iSeries_allocate_IRQ(HvBusNumber bus,
315 HvSubBusNumber sub_bus, u32 bsubbus) 294 HvSubBusNumber sub_bus, u32 bsubbus)
316{ 295{
317 int virtirq;
318 unsigned int realirq; 296 unsigned int realirq;
319 u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus); 297 u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus);
320 u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus); 298 u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus);
321 299
322 realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3) 300 realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3)
323 + function; 301 + function;
324 virtirq = virt_irq_create_mapping(realirq);
325 302
326 irq_desc[virtirq].chip = &iSeries_IRQ_handler; 303 return irq_create_mapping(NULL, realirq, IRQ_TYPE_NONE);
327 return virtirq;
328} 304}
329 305
330#endif /* CONFIG_PCI */ 306#endif /* CONFIG_PCI */
@@ -332,10 +308,9 @@ int __init iSeries_allocate_IRQ(HvBusNumber bus,
332/* 308/*
333 * Get the next pending IRQ. 309 * Get the next pending IRQ.
334 */ 310 */
335int iSeries_get_irq(struct pt_regs *regs) 311unsigned int iSeries_get_irq(struct pt_regs *regs)
336{ 312{
337 /* -2 means ignore this interrupt */ 313 int irq = NO_IRQ_IGNORE;
338 int irq = -2;
339 314
340#ifdef CONFIG_SMP 315#ifdef CONFIG_SMP
341 if (get_lppaca()->int_dword.fields.ipi_cnt) { 316 if (get_lppaca()->int_dword.fields.ipi_cnt) {
@@ -358,9 +333,57 @@ int iSeries_get_irq(struct pt_regs *regs)
358 } 333 }
359 spin_unlock(&pending_irqs_lock); 334 spin_unlock(&pending_irqs_lock);
360 if (irq >= NR_IRQS) 335 if (irq >= NR_IRQS)
361 irq = -2; 336 irq = NO_IRQ_IGNORE;
362 } 337 }
363#endif 338#endif
364 339
365 return irq; 340 return irq;
366} 341}
342
343static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
344 irq_hw_number_t hw, unsigned int flags)
345{
346 set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
347
348 return 0;
349}
350
351static struct irq_host_ops iseries_irq_host_ops = {
352 .map = iseries_irq_host_map,
353};
354
355/*
356 * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
357 * It must be called before the bus walk.
358 */
359void __init iSeries_init_IRQ(void)
360{
361 /* Register PCI event handler and open an event path */
362 struct irq_host *host;
363 int ret;
364
365 /*
366 * The Hypervisor only allows us up to 256 interrupt
367 * sources (the irq number is passed in a u8).
368 */
369 irq_set_virq_count(256);
370
371 /* Create irq host. No need for a revmap since HV will give us
372 * back our virtual irq number
373 */
374 host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0, &iseries_irq_host_ops, 0);
375 BUG_ON(host == NULL);
376 irq_set_default_host(host);
377
378 ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
379 &pci_event_handler);
380 if (ret == 0) {
381 ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
382 if (ret != 0)
383 printk(KERN_ERR "iseries_init_IRQ: open event path "
384 "failed with rc 0x%x\n", ret);
385 } else
386 printk(KERN_ERR "iseries_init_IRQ: register handler "
387 "failed with rc 0x%x\n", ret);
388}
389
diff --git a/arch/powerpc/platforms/iseries/irq.h b/arch/powerpc/platforms/iseries/irq.h
index 188aa808abd7..1ee8985140e5 100644
--- a/arch/powerpc/platforms/iseries/irq.h
+++ b/arch/powerpc/platforms/iseries/irq.h
@@ -4,6 +4,6 @@
4extern void iSeries_init_IRQ(void); 4extern void iSeries_init_IRQ(void);
5extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, u32); 5extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, u32);
6extern void iSeries_activate_IRQs(void); 6extern void iSeries_activate_IRQs(void);
7extern int iSeries_get_irq(struct pt_regs *); 7extern unsigned int iSeries_get_irq(struct pt_regs *);
8 8
9#endif /* _ISERIES_IRQ_H */ 9#endif /* _ISERIES_IRQ_H */
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index c877074745b2..c9605d773a77 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -294,8 +294,6 @@ static void __init iSeries_init_early(void)
294{ 294{
295 DBG(" -> iSeries_init_early()\n"); 295 DBG(" -> iSeries_init_early()\n");
296 296
297 ppc64_interrupt_controller = IC_ISERIES;
298
299#if defined(CONFIG_BLK_DEV_INITRD) 297#if defined(CONFIG_BLK_DEV_INITRD)
300 /* 298 /*
301 * If the init RAM disk has been configured and there is 299 * If the init RAM disk has been configured and there is
@@ -659,12 +657,6 @@ static int __init iseries_probe(void)
659 powerpc_firmware_features |= FW_FEATURE_ISERIES; 657 powerpc_firmware_features |= FW_FEATURE_ISERIES;
660 powerpc_firmware_features |= FW_FEATURE_LPAR; 658 powerpc_firmware_features |= FW_FEATURE_LPAR;
661 659
662 /*
663 * The Hypervisor only allows us up to 256 interrupt
664 * sources (the irq number is passed in a u8).
665 */
666 virt_irq_max = 255;
667
668 hpte_init_iSeries(); 660 hpte_init_iSeries();
669 661
670 return 1; 662 return 1;
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index f7170ff86dab..63a1670d3bfd 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -443,18 +443,23 @@ void __init maple_pci_init(void)
443int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel) 443int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel)
444{ 444{
445 struct device_node *np; 445 struct device_node *np;
446 int irq = channel ? 15 : 14; 446 unsigned int defirq = channel ? 15 : 14;
447 unsigned int irq;
447 448
448 if (pdev->vendor != PCI_VENDOR_ID_AMD || 449 if (pdev->vendor != PCI_VENDOR_ID_AMD ||
449 pdev->device != PCI_DEVICE_ID_AMD_8111_IDE) 450 pdev->device != PCI_DEVICE_ID_AMD_8111_IDE)
450 return irq; 451 return defirq;
451 452
452 np = pci_device_to_OF_node(pdev); 453 np = pci_device_to_OF_node(pdev);
453 if (np == NULL) 454 if (np == NULL)
454 return irq; 455 return defirq;
455 if (np->n_intrs < 2) 456 irq = irq_of_parse_and_map(np, channel & 0x1);
456 return irq; 457 if (irq == NO_IRQ) {
457 return np->intrs[channel & 0x1].line; 458 printk("Failed to map onboard IDE interrupt for channel %d\n",
459 channel);
460 return defirq;
461 }
462 return irq;
458} 463}
459 464
460/* XXX: To remove once all firmwares are ok */ 465/* XXX: To remove once all firmwares are ok */
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index 5cf90c28b141..cb528c9de4c3 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -11,7 +11,7 @@
11 * 11 *
12 */ 12 */
13 13
14#define DEBUG 14#undef DEBUG
15 15
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/errno.h> 17#include <linux/errno.h>
@@ -198,50 +198,81 @@ static void __init maple_init_early(void)
198{ 198{
199 DBG(" -> maple_init_early\n"); 199 DBG(" -> maple_init_early\n");
200 200
201 /* Setup interrupt mapping options */
202 ppc64_interrupt_controller = IC_OPEN_PIC;
203
204 iommu_init_early_dart(); 201 iommu_init_early_dart();
205 202
206 DBG(" <- maple_init_early\n"); 203 DBG(" <- maple_init_early\n");
207} 204}
208 205
209 206/*
210static __init void maple_init_IRQ(void) 207 * This is almost identical to pSeries and CHRP. We need to make that
208 * code generic at one point, with appropriate bits in the device-tree to
209 * identify the presence of an HT APIC
210 */
211static void __init maple_init_IRQ(void)
211{ 212{
212 struct device_node *root; 213 struct device_node *root, *np, *mpic_node = NULL;
213 unsigned int *opprop; 214 unsigned int *opprop;
214 unsigned long opic_addr; 215 unsigned long openpic_addr = 0;
216 int naddr, n, i, opplen, has_isus = 0;
215 struct mpic *mpic; 217 struct mpic *mpic;
216 unsigned char senses[128]; 218 unsigned int flags = MPIC_PRIMARY;
217 int n;
218 219
219 DBG(" -> maple_init_IRQ\n"); 220 /* Locate MPIC in the device-tree. Note that there is a bug
221 * in Maple device-tree where the type of the controller is
222 * open-pic and not interrupt-controller
223 */
224 for_each_node_by_type(np, "open-pic") {
225 mpic_node = np;
226 break;
227 }
228 if (mpic_node == NULL) {
229 printk(KERN_ERR
230 "Failed to locate the MPIC interrupt controller\n");
231 return;
232 }
220 233
221 /* XXX: Non standard, replace that with a proper openpic/mpic node 234 /* Find address list in /platform-open-pic */
222 * in the device-tree. Find the Open PIC if present */
223 root = of_find_node_by_path("/"); 235 root = of_find_node_by_path("/");
224 opprop = (unsigned int *) get_property(root, 236 naddr = prom_n_addr_cells(root);
225 "platform-open-pic", NULL); 237 opprop = (unsigned int *) get_property(root, "platform-open-pic",
226 if (opprop == 0) 238 &opplen);
227 panic("OpenPIC not found !\n"); 239 if (opprop != 0) {
228 240 openpic_addr = of_read_number(opprop, naddr);
229 n = prom_n_addr_cells(root); 241 has_isus = (opplen > naddr);
230 for (opic_addr = 0; n > 0; --n) 242 printk(KERN_DEBUG "OpenPIC addr: %lx, has ISUs: %d\n",
231 opic_addr = (opic_addr << 32) + *opprop++; 243 openpic_addr, has_isus);
244 }
232 of_node_put(root); 245 of_node_put(root);
233 246
234 /* Obtain sense values from device-tree */ 247 BUG_ON(openpic_addr == 0);
235 prom_get_irq_senses(senses, 0, 128); 248
249 /* Check for a big endian MPIC */
250 if (get_property(np, "big-endian", NULL) != NULL)
251 flags |= MPIC_BIG_ENDIAN;
236 252
237 mpic = mpic_alloc(opic_addr, 253 /* XXX Maple specific bits */
238 MPIC_PRIMARY | MPIC_BIG_ENDIAN | 254 flags |= MPIC_BROKEN_U3 | MPIC_WANTS_RESET;
239 MPIC_BROKEN_U3 | MPIC_WANTS_RESET, 255
240 0, 0, 128, 128, senses, 128, "U3-MPIC"); 256 /* Setup the openpic driver. More device-tree junks, we hard code no
257 * ISUs for now. I'll have to revisit some stuffs with the folks doing
258 * the firmware for those
259 */
260 mpic = mpic_alloc(mpic_node, openpic_addr, flags,
261 /*has_isus ? 16 :*/ 0, 0, " MPIC ");
241 BUG_ON(mpic == NULL); 262 BUG_ON(mpic == NULL);
242 mpic_init(mpic);
243 263
244 DBG(" <- maple_init_IRQ\n"); 264 /* Add ISUs */
265 opplen /= sizeof(u32);
266 for (n = 0, i = naddr; i < opplen; i += naddr, n++) {
267 unsigned long isuaddr = of_read_number(opprop + i, naddr);
268 mpic_assign_isu(mpic, n, isuaddr);
269 }
270
271 /* All ISUs are setup, complete initialization */
272 mpic_init(mpic);
273 ppc_md.get_irq = mpic_get_irq;
274 of_node_put(mpic_node);
275 of_node_put(root);
245} 276}
246 277
247static void __init maple_progress(char *s, unsigned short hex) 278static void __init maple_progress(char *s, unsigned short hex)
@@ -256,7 +287,9 @@ static void __init maple_progress(char *s, unsigned short hex)
256static int __init maple_probe(void) 287static int __init maple_probe(void)
257{ 288{
258 unsigned long root = of_get_flat_dt_root(); 289 unsigned long root = of_get_flat_dt_root();
259 if (!of_flat_dt_is_compatible(root, "Momentum,Maple")) 290
291 if (!of_flat_dt_is_compatible(root, "Momentum,Maple") &&
292 !of_flat_dt_is_compatible(root, "Momentum,Apache"))
260 return 0; 293 return 0;
261 /* 294 /*
262 * On U3, the DART (iommu) must be allocated now since it 295 * On U3, the DART (iommu) must be allocated now since it
@@ -277,7 +310,6 @@ define_machine(maple_md) {
277 .setup_arch = maple_setup_arch, 310 .setup_arch = maple_setup_arch,
278 .init_early = maple_init_early, 311 .init_early = maple_init_early,
279 .init_IRQ = maple_init_IRQ, 312 .init_IRQ = maple_init_IRQ,
280 .get_irq = mpic_get_irq,
281 .pcibios_fixup = maple_pcibios_fixup, 313 .pcibios_fixup = maple_pcibios_fixup,
282 .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq, 314 .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq,
283 .restart = maple_restart, 315 .restart = maple_restart,
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c
index cb257aeb91f6..871b002c9f90 100644
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -12,7 +12,7 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/string.h> 13#include <linux/string.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/version.h> 15#include <linux/utsrelease.h>
16#include <asm/sections.h> 16#include <asm/sections.h>
17#include <asm/prom.h> 17#include <asm/prom.h>
18#include <asm/page.h> 18#include <asm/page.h>
@@ -162,6 +162,8 @@ static void __init bootx_add_chosen_props(unsigned long base,
162{ 162{
163 u32 val; 163 u32 val;
164 164
165 bootx_dt_add_prop("linux,bootx", NULL, 0, mem_end);
166
165 if (bootx_info->kernelParamsOffset) { 167 if (bootx_info->kernelParamsOffset) {
166 char *args = (char *)((unsigned long)bootx_info) + 168 char *args = (char *)((unsigned long)bootx_info) +
167 bootx_info->kernelParamsOffset; 169 bootx_info->kernelParamsOffset;
@@ -181,8 +183,25 @@ static void __init bootx_add_chosen_props(unsigned long base,
181static void __init bootx_add_display_props(unsigned long base, 183static void __init bootx_add_display_props(unsigned long base,
182 unsigned long *mem_end) 184 unsigned long *mem_end)
183{ 185{
186 boot_infos_t *bi = bootx_info;
187 u32 tmp;
188
184 bootx_dt_add_prop("linux,boot-display", NULL, 0, mem_end); 189 bootx_dt_add_prop("linux,boot-display", NULL, 0, mem_end);
185 bootx_dt_add_prop("linux,opened", NULL, 0, mem_end); 190 bootx_dt_add_prop("linux,opened", NULL, 0, mem_end);
191 tmp = bi->dispDeviceDepth;
192 bootx_dt_add_prop("linux,bootx-depth", &tmp, 4, mem_end);
193 tmp = bi->dispDeviceRect[2] - bi->dispDeviceRect[0];
194 bootx_dt_add_prop("linux,bootx-width", &tmp, 4, mem_end);
195 tmp = bi->dispDeviceRect[3] - bi->dispDeviceRect[1];
196 bootx_dt_add_prop("linux,bootx-height", &tmp, 4, mem_end);
197 tmp = bi->dispDeviceRowBytes;
198 bootx_dt_add_prop("linux,bootx-linebytes", &tmp, 4, mem_end);
199 tmp = (u32)bi->dispDeviceBase;
200 if (tmp == 0)
201 tmp = (u32)bi->logicalDisplayBase;
202 tmp += bi->dispDeviceRect[1] * bi->dispDeviceRowBytes;
203 tmp += bi->dispDeviceRect[0] * ((bi->dispDeviceDepth + 7) / 8);
204 bootx_dt_add_prop("linux,bootx-addr", &tmp, 4, mem_end);
186} 205}
187 206
188static void __init bootx_dt_add_string(char *s, unsigned long *mem_end) 207static void __init bootx_dt_add_string(char *s, unsigned long *mem_end)
@@ -211,7 +230,7 @@ static void __init bootx_scan_dt_build_strings(unsigned long base,
211 230
212 if (!strcmp(namep, "/chosen")) { 231 if (!strcmp(namep, "/chosen")) {
213 DBG(" detected /chosen ! adding properties names !\n"); 232 DBG(" detected /chosen ! adding properties names !\n");
214 bootx_dt_add_string("linux,platform", mem_end); 233 bootx_dt_add_string("linux,bootx", mem_end);
215 bootx_dt_add_string("linux,stdout-path", mem_end); 234 bootx_dt_add_string("linux,stdout-path", mem_end);
216 bootx_dt_add_string("linux,initrd-start", mem_end); 235 bootx_dt_add_string("linux,initrd-start", mem_end);
217 bootx_dt_add_string("linux,initrd-end", mem_end); 236 bootx_dt_add_string("linux,initrd-end", mem_end);
@@ -222,6 +241,11 @@ static void __init bootx_scan_dt_build_strings(unsigned long base,
222 DBG(" detected display ! adding properties names !\n"); 241 DBG(" detected display ! adding properties names !\n");
223 bootx_dt_add_string("linux,boot-display", mem_end); 242 bootx_dt_add_string("linux,boot-display", mem_end);
224 bootx_dt_add_string("linux,opened", mem_end); 243 bootx_dt_add_string("linux,opened", mem_end);
244 bootx_dt_add_string("linux,bootx-depth", mem_end);
245 bootx_dt_add_string("linux,bootx-width", mem_end);
246 bootx_dt_add_string("linux,bootx-height", mem_end);
247 bootx_dt_add_string("linux,bootx-linebytes", mem_end);
248 bootx_dt_add_string("linux,bootx-addr", mem_end);
225 strncpy(bootx_disp_path, namep, 255); 249 strncpy(bootx_disp_path, namep, 255);
226 } 250 }
227 251
@@ -443,7 +467,14 @@ void __init bootx_init(unsigned long r3, unsigned long r4)
443 if (!BOOT_INFO_IS_V2_COMPATIBLE(bi)) 467 if (!BOOT_INFO_IS_V2_COMPATIBLE(bi))
444 bi->logicalDisplayBase = bi->dispDeviceBase; 468 bi->logicalDisplayBase = bi->dispDeviceBase;
445 469
470 /* Fixup depth 16 -> 15 as that's what MacOS calls 16bpp */
471 if (bi->dispDeviceDepth == 16)
472 bi->dispDeviceDepth = 15;
473
446#ifdef CONFIG_BOOTX_TEXT 474#ifdef CONFIG_BOOTX_TEXT
475 ptr = (unsigned long)bi->logicalDisplayBase;
476 ptr += bi->dispDeviceRect[1] * bi->dispDeviceRowBytes;
477 ptr += bi->dispDeviceRect[0] * ((bi->dispDeviceDepth + 7) / 8);
447 btext_setup_display(bi->dispDeviceRect[2] - bi->dispDeviceRect[0], 478 btext_setup_display(bi->dispDeviceRect[2] - bi->dispDeviceRect[0],
448 bi->dispDeviceRect[3] - bi->dispDeviceRect[1], 479 bi->dispDeviceRect[3] - bi->dispDeviceRect[1],
449 bi->dispDeviceDepth, bi->dispDeviceRowBytes, 480 bi->dispDeviceDepth, bi->dispDeviceRowBytes,
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index ceafaf52a668..8677f50c2586 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -522,10 +522,11 @@ static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
522 host->speed = KW_I2C_MODE_25KHZ; 522 host->speed = KW_I2C_MODE_25KHZ;
523 break; 523 break;
524 } 524 }
525 if (np->n_intrs > 0) 525 host->irq = irq_of_parse_and_map(np, 0);
526 host->irq = np->intrs[0].line; 526 if (host->irq == NO_IRQ)
527 else 527 printk(KERN_WARNING
528 host->irq = NO_IRQ; 528 "low_i2c: Failed to map interrupt for %s\n",
529 np->full_name);
529 530
530 host->base = ioremap((*addrp), 0x1000); 531 host->base = ioremap((*addrp), 0x1000);
531 if (host->base == NULL) { 532 if (host->base == NULL) {
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c
index 41fa2409482a..6a36ea9bf673 100644
--- a/arch/powerpc/platforms/powermac/nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -29,6 +29,8 @@
29#include <asm/machdep.h> 29#include <asm/machdep.h>
30#include <asm/nvram.h> 30#include <asm/nvram.h>
31 31
32#include "pmac.h"
33
32#define DEBUG 34#define DEBUG
33 35
34#ifdef DEBUG 36#ifdef DEBUG
@@ -80,9 +82,6 @@ static int nvram_partitions[3];
80// XXX Turn that into a sem 82// XXX Turn that into a sem
81static DEFINE_SPINLOCK(nv_lock); 83static DEFINE_SPINLOCK(nv_lock);
82 84
83extern int pmac_newworld;
84extern int system_running;
85
86static int (*core99_write_bank)(int bank, u8* datas); 85static int (*core99_write_bank)(int bank, u8* datas);
87static int (*core99_erase_bank)(int bank); 86static int (*core99_erase_bank)(int bank);
88 87
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index d524a915aa86..556b349797e8 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -46,6 +46,9 @@ static int has_uninorth;
46static struct pci_controller *u3_agp; 46static struct pci_controller *u3_agp;
47static struct pci_controller *u4_pcie; 47static struct pci_controller *u4_pcie;
48static struct pci_controller *u3_ht; 48static struct pci_controller *u3_ht;
49#define has_second_ohare 0
50#else
51static int has_second_ohare;
49#endif /* CONFIG_PPC64 */ 52#endif /* CONFIG_PPC64 */
50 53
51extern u8 pci_cache_line_size; 54extern u8 pci_cache_line_size;
@@ -647,6 +650,33 @@ static void __init init_p2pbridge(void)
647 early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val); 650 early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val);
648} 651}
649 652
653static void __init init_second_ohare(void)
654{
655 struct device_node *np = of_find_node_by_name(NULL, "pci106b,7");
656 unsigned char bus, devfn;
657 unsigned short cmd;
658
659 if (np == NULL)
660 return;
661
662 /* This must run before we initialize the PICs since the second
663 * ohare hosts a PIC that will be accessed there.
664 */
665 if (pci_device_from_OF_node(np, &bus, &devfn) == 0) {
666 struct pci_controller* hose =
667 pci_find_hose_for_OF_device(np);
668 if (!hose) {
669 printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
670 return;
671 }
672 early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
673 cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
674 cmd &= ~PCI_COMMAND_IO;
675 early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
676 }
677 has_second_ohare = 1;
678}
679
650/* 680/*
651 * Some Apple desktop machines have a NEC PD720100A USB2 controller 681 * Some Apple desktop machines have a NEC PD720100A USB2 controller
652 * on the motherboard. Open Firmware, on these, will disable the 682 * on the motherboard. Open Firmware, on these, will disable the
@@ -688,9 +718,6 @@ static void __init fixup_nec_usb2(void)
688 " EHCI, fixing up...\n"); 718 " EHCI, fixing up...\n");
689 data &= ~1UL; 719 data &= ~1UL;
690 early_write_config_dword(hose, bus, devfn, 0xe4, data); 720 early_write_config_dword(hose, bus, devfn, 0xe4, data);
691 early_write_config_byte(hose, bus,
692 devfn | 2, PCI_INTERRUPT_LINE,
693 nec->intrs[0].line);
694 } 721 }
695 } 722 }
696} 723}
@@ -958,32 +985,28 @@ static int __init add_bridge(struct device_node *dev)
958 return 0; 985 return 0;
959} 986}
960 987
961static void __init pcibios_fixup_OF_interrupts(void) 988void __init pmac_pcibios_fixup(void)
962{ 989{
963 struct pci_dev* dev = NULL; 990 struct pci_dev* dev = NULL;
964 991
965 /*
966 * Open Firmware often doesn't initialize the
967 * PCI_INTERRUPT_LINE config register properly, so we
968 * should find the device node and apply the interrupt
969 * obtained from the OF device-tree
970 */
971 for_each_pci_dev(dev) { 992 for_each_pci_dev(dev) {
972 struct device_node *node; 993 /* Read interrupt from the device-tree */
973 node = pci_device_to_OF_node(dev); 994 pci_read_irq_line(dev);
974 /* this is the node, see if it has interrupts */ 995
975 if (node && node->n_intrs > 0) 996 /* Fixup interrupt for the modem/ethernet combo controller.
976 dev->irq = node->intrs[0].line; 997 * on machines with a second ohare chip.
977 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); 998 * The number in the device tree (27) is bogus (correct for
999 * the ethernet-only board but not the combo ethernet/modem
1000 * board). The real interrupt is 28 on the second controller
1001 * -> 28+32 = 60.
1002 */
1003 if (has_second_ohare &&
1004 dev->vendor == PCI_VENDOR_ID_DEC &&
1005 dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS)
1006 dev->irq = irq_create_mapping(NULL, 60, 0);
978 } 1007 }
979} 1008}
980 1009
981void __init pmac_pcibios_fixup(void)
982{
983 /* Fixup interrupts according to OF tree */
984 pcibios_fixup_OF_interrupts();
985}
986
987#ifdef CONFIG_PPC64 1010#ifdef CONFIG_PPC64
988static void __init pmac_fixup_phb_resources(void) 1011static void __init pmac_fixup_phb_resources(void)
989{ 1012{
@@ -1071,6 +1094,7 @@ void __init pmac_pci_init(void)
1071 1094
1072#else /* CONFIG_PPC64 */ 1095#else /* CONFIG_PPC64 */
1073 init_p2pbridge(); 1096 init_p2pbridge();
1097 init_second_ohare();
1074 fixup_nec_usb2(); 1098 fixup_nec_usb2();
1075 1099
1076 /* We are still having some issues with the Xserve G4, enabling 1100 /* We are still having some issues with the Xserve G4, enabling
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c
index d6eab8b3f7de..6d66359ec8c8 100644
--- a/arch/powerpc/platforms/powermac/pfunc_base.c
+++ b/arch/powerpc/platforms/powermac/pfunc_base.c
@@ -24,19 +24,18 @@ static irqreturn_t macio_gpio_irq(int irq, void *data, struct pt_regs *regs)
24 24
25static int macio_do_gpio_irq_enable(struct pmf_function *func) 25static int macio_do_gpio_irq_enable(struct pmf_function *func)
26{ 26{
27 if (func->node->n_intrs < 1) 27 unsigned int irq = irq_of_parse_and_map(func->node, 0);
28 if (irq == NO_IRQ)
28 return -EINVAL; 29 return -EINVAL;
29 30 return request_irq(irq, macio_gpio_irq, 0, func->node->name, func);
30 return request_irq(func->node->intrs[0].line, macio_gpio_irq, 0,
31 func->node->name, func);
32} 31}
33 32
34static int macio_do_gpio_irq_disable(struct pmf_function *func) 33static int macio_do_gpio_irq_disable(struct pmf_function *func)
35{ 34{
36 if (func->node->n_intrs < 1) 35 unsigned int irq = irq_of_parse_and_map(func->node, 0);
36 if (irq == NO_IRQ)
37 return -EINVAL; 37 return -EINVAL;
38 38 free_irq(irq, func);
39 free_irq(func->node->intrs[0].line, func);
40 return 0; 39 return 0;
41} 40}
42 41
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 532bce57c0dc..3d328bc1f7e0 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -65,39 +65,36 @@ static u32 level_mask[4];
65 65
66static DEFINE_SPINLOCK(pmac_pic_lock); 66static DEFINE_SPINLOCK(pmac_pic_lock);
67 67
68#define GATWICK_IRQ_POOL_SIZE 10
69static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
70
71#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 68#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
72static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; 69static unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
70static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
71static int pmac_irq_cascade = -1;
72static struct irq_host *pmac_pic_host;
73 73
74/* 74static void __pmac_retrigger(unsigned int irq_nr)
75 * Mark an irq as "lost". This is only used on the pmac
76 * since it can lose interrupts (see pmac_set_irq_mask).
77 * -- Cort
78 */
79void __set_lost(unsigned long irq_nr, int nokick)
80{ 75{
81 if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) { 76 if (irq_nr >= max_real_irqs && pmac_irq_cascade > 0) {
77 __set_bit(irq_nr, ppc_lost_interrupts);
78 irq_nr = pmac_irq_cascade;
79 mb();
80 }
81 if (!__test_and_set_bit(irq_nr, ppc_lost_interrupts)) {
82 atomic_inc(&ppc_n_lost_interrupts); 82 atomic_inc(&ppc_n_lost_interrupts);
83 if (!nokick) 83 set_dec(1);
84 set_dec(1);
85 } 84 }
86} 85}
87 86
88static void pmac_mask_and_ack_irq(unsigned int irq_nr) 87static void pmac_mask_and_ack_irq(unsigned int virq)
89{ 88{
90 unsigned long bit = 1UL << (irq_nr & 0x1f); 89 unsigned int src = irq_map[virq].hwirq;
91 int i = irq_nr >> 5; 90 unsigned long bit = 1UL << (virq & 0x1f);
91 int i = virq >> 5;
92 unsigned long flags; 92 unsigned long flags;
93 93
94 if ((unsigned)irq_nr >= max_irqs)
95 return;
96
97 clear_bit(irq_nr, ppc_cached_irq_mask);
98 if (test_and_clear_bit(irq_nr, ppc_lost_interrupts))
99 atomic_dec(&ppc_n_lost_interrupts);
100 spin_lock_irqsave(&pmac_pic_lock, flags); 94 spin_lock_irqsave(&pmac_pic_lock, flags);
95 __clear_bit(src, ppc_cached_irq_mask);
96 if (__test_and_clear_bit(src, ppc_lost_interrupts))
97 atomic_dec(&ppc_n_lost_interrupts);
101 out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]); 98 out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]);
102 out_le32(&pmac_irq_hw[i]->ack, bit); 99 out_le32(&pmac_irq_hw[i]->ack, bit);
103 do { 100 do {
@@ -109,16 +106,29 @@ static void pmac_mask_and_ack_irq(unsigned int irq_nr)
109 spin_unlock_irqrestore(&pmac_pic_lock, flags); 106 spin_unlock_irqrestore(&pmac_pic_lock, flags);
110} 107}
111 108
112static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) 109static void pmac_ack_irq(unsigned int virq)
110{
111 unsigned int src = irq_map[virq].hwirq;
112 unsigned long bit = 1UL << (src & 0x1f);
113 int i = src >> 5;
114 unsigned long flags;
115
116 spin_lock_irqsave(&pmac_pic_lock, flags);
117 if (__test_and_clear_bit(src, ppc_lost_interrupts))
118 atomic_dec(&ppc_n_lost_interrupts);
119 out_le32(&pmac_irq_hw[i]->ack, bit);
120 (void)in_le32(&pmac_irq_hw[i]->ack);
121 spin_unlock_irqrestore(&pmac_pic_lock, flags);
122}
123
124static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
113{ 125{
114 unsigned long bit = 1UL << (irq_nr & 0x1f); 126 unsigned long bit = 1UL << (irq_nr & 0x1f);
115 int i = irq_nr >> 5; 127 int i = irq_nr >> 5;
116 unsigned long flags;
117 128
118 if ((unsigned)irq_nr >= max_irqs) 129 if ((unsigned)irq_nr >= max_irqs)
119 return; 130 return;
120 131
121 spin_lock_irqsave(&pmac_pic_lock, flags);
122 /* enable unmasked interrupts */ 132 /* enable unmasked interrupts */
123 out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]); 133 out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]);
124 134
@@ -135,71 +145,78 @@ static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
135 * the bit in the flag register or request another interrupt. 145 * the bit in the flag register or request another interrupt.
136 */ 146 */
137 if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level)) 147 if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level))
138 __set_lost((ulong)irq_nr, nokicklost); 148 __pmac_retrigger(irq_nr);
139 spin_unlock_irqrestore(&pmac_pic_lock, flags);
140} 149}
141 150
142/* When an irq gets requested for the first client, if it's an 151/* When an irq gets requested for the first client, if it's an
143 * edge interrupt, we clear any previous one on the controller 152 * edge interrupt, we clear any previous one on the controller
144 */ 153 */
145static unsigned int pmac_startup_irq(unsigned int irq_nr) 154static unsigned int pmac_startup_irq(unsigned int virq)
146{ 155{
147 unsigned long bit = 1UL << (irq_nr & 0x1f); 156 unsigned long flags;
148 int i = irq_nr >> 5; 157 unsigned int src = irq_map[virq].hwirq;
158 unsigned long bit = 1UL << (src & 0x1f);
159 int i = src >> 5;
149 160
150 if ((irq_desc[irq_nr].status & IRQ_LEVEL) == 0) 161 spin_lock_irqsave(&pmac_pic_lock, flags);
162 if ((irq_desc[virq].status & IRQ_LEVEL) == 0)
151 out_le32(&pmac_irq_hw[i]->ack, bit); 163 out_le32(&pmac_irq_hw[i]->ack, bit);
152 set_bit(irq_nr, ppc_cached_irq_mask); 164 __set_bit(src, ppc_cached_irq_mask);
153 pmac_set_irq_mask(irq_nr, 0); 165 __pmac_set_irq_mask(src, 0);
166 spin_unlock_irqrestore(&pmac_pic_lock, flags);
154 167
155 return 0; 168 return 0;
156} 169}
157 170
158static void pmac_mask_irq(unsigned int irq_nr) 171static void pmac_mask_irq(unsigned int virq)
159{ 172{
160 clear_bit(irq_nr, ppc_cached_irq_mask); 173 unsigned long flags;
161 pmac_set_irq_mask(irq_nr, 0); 174 unsigned int src = irq_map[virq].hwirq;
162 mb(); 175
176 spin_lock_irqsave(&pmac_pic_lock, flags);
177 __clear_bit(src, ppc_cached_irq_mask);
178 __pmac_set_irq_mask(src, 0);
179 spin_unlock_irqrestore(&pmac_pic_lock, flags);
163} 180}
164 181
165static void pmac_unmask_irq(unsigned int irq_nr) 182static void pmac_unmask_irq(unsigned int virq)
166{ 183{
167 set_bit(irq_nr, ppc_cached_irq_mask); 184 unsigned long flags;
168 pmac_set_irq_mask(irq_nr, 0); 185 unsigned int src = irq_map[virq].hwirq;
186
187 spin_lock_irqsave(&pmac_pic_lock, flags);
188 __set_bit(src, ppc_cached_irq_mask);
189 __pmac_set_irq_mask(src, 0);
190 spin_unlock_irqrestore(&pmac_pic_lock, flags);
169} 191}
170 192
171static void pmac_end_irq(unsigned int irq_nr) 193static int pmac_retrigger(unsigned int virq)
172{ 194{
173 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) 195 unsigned long flags;
174 && irq_desc[irq_nr].action) {
175 set_bit(irq_nr, ppc_cached_irq_mask);
176 pmac_set_irq_mask(irq_nr, 1);
177 }
178}
179 196
197 spin_lock_irqsave(&pmac_pic_lock, flags);
198 __pmac_retrigger(irq_map[virq].hwirq);
199 spin_unlock_irqrestore(&pmac_pic_lock, flags);
200 return 1;
201}
180 202
181struct hw_interrupt_type pmac_pic = { 203static struct irq_chip pmac_pic = {
182 .typename = " PMAC-PIC ", 204 .typename = " PMAC-PIC ",
183 .startup = pmac_startup_irq, 205 .startup = pmac_startup_irq,
184 .enable = pmac_unmask_irq, 206 .mask = pmac_mask_irq,
185 .disable = pmac_mask_irq, 207 .ack = pmac_ack_irq,
186 .ack = pmac_mask_and_ack_irq, 208 .mask_ack = pmac_mask_and_ack_irq,
187 .end = pmac_end_irq, 209 .unmask = pmac_unmask_irq,
188}; 210 .retrigger = pmac_retrigger,
189
190struct hw_interrupt_type gatwick_pic = {
191 .typename = " GATWICK ",
192 .startup = pmac_startup_irq,
193 .enable = pmac_unmask_irq,
194 .disable = pmac_mask_irq,
195 .ack = pmac_mask_and_ack_irq,
196 .end = pmac_end_irq,
197}; 211};
198 212
199static irqreturn_t gatwick_action(int cpl, void *dev_id, struct pt_regs *regs) 213static irqreturn_t gatwick_action(int cpl, void *dev_id, struct pt_regs *regs)
200{ 214{
215 unsigned long flags;
201 int irq, bits; 216 int irq, bits;
217 int rc = IRQ_NONE;
202 218
219 spin_lock_irqsave(&pmac_pic_lock, flags);
203 for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { 220 for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) {
204 int i = irq >> 5; 221 int i = irq >> 5;
205 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; 222 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
@@ -209,17 +226,20 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id, struct pt_regs *regs)
209 if (bits == 0) 226 if (bits == 0)
210 continue; 227 continue;
211 irq += __ilog2(bits); 228 irq += __ilog2(bits);
229 spin_unlock_irqrestore(&pmac_pic_lock, flags);
212 __do_IRQ(irq, regs); 230 __do_IRQ(irq, regs);
213 return IRQ_HANDLED; 231 spin_lock_irqsave(&pmac_pic_lock, flags);
232 rc = IRQ_HANDLED;
214 } 233 }
215 printk("gatwick irq not from gatwick pic\n"); 234 spin_unlock_irqrestore(&pmac_pic_lock, flags);
216 return IRQ_NONE; 235 return rc;
217} 236}
218 237
219static int pmac_get_irq(struct pt_regs *regs) 238static unsigned int pmac_pic_get_irq(struct pt_regs *regs)
220{ 239{
221 int irq; 240 int irq;
222 unsigned long bits = 0; 241 unsigned long bits = 0;
242 unsigned long flags;
223 243
224#ifdef CONFIG_SMP 244#ifdef CONFIG_SMP
225 void psurge_smp_message_recv(struct pt_regs *); 245 void psurge_smp_message_recv(struct pt_regs *);
@@ -227,9 +247,10 @@ static int pmac_get_irq(struct pt_regs *regs)
227 /* IPI's are a hack on the powersurge -- Cort */ 247 /* IPI's are a hack on the powersurge -- Cort */
228 if ( smp_processor_id() != 0 ) { 248 if ( smp_processor_id() != 0 ) {
229 psurge_smp_message_recv(regs); 249 psurge_smp_message_recv(regs);
230 return -2; /* ignore, already handled */ 250 return NO_IRQ_IGNORE; /* ignore, already handled */
231 } 251 }
232#endif /* CONFIG_SMP */ 252#endif /* CONFIG_SMP */
253 spin_lock_irqsave(&pmac_pic_lock, flags);
233 for (irq = max_real_irqs; (irq -= 32) >= 0; ) { 254 for (irq = max_real_irqs; (irq -= 32) >= 0; ) {
234 int i = irq >> 5; 255 int i = irq >> 5;
235 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; 256 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
@@ -241,133 +262,10 @@ static int pmac_get_irq(struct pt_regs *regs)
241 irq += __ilog2(bits); 262 irq += __ilog2(bits);
242 break; 263 break;
243 } 264 }
244 265 spin_unlock_irqrestore(&pmac_pic_lock, flags);
245 return irq; 266 if (unlikely(irq < 0))
246} 267 return NO_IRQ;
247 268 return irq_linear_revmap(pmac_pic_host, irq);
248/* This routine will fix some missing interrupt values in the device tree
249 * on the gatwick mac-io controller used by some PowerBooks
250 *
251 * Walking of OF nodes could use a bit more fixing up here, but it's not
252 * very important as this is all boot time code on static portions of the
253 * device-tree.
254 *
255 * However, the modifications done to "intrs" will have to be removed and
256 * replaced with proper updates of the "interrupts" properties or
257 * AAPL,interrupts, yet to be decided, once the dynamic parsing is there.
258 */
259static void __init pmac_fix_gatwick_interrupts(struct device_node *gw,
260 int irq_base)
261{
262 struct device_node *node;
263 int count;
264
265 memset(gatwick_int_pool, 0, sizeof(gatwick_int_pool));
266 count = 0;
267 for (node = NULL; (node = of_get_next_child(gw, node)) != NULL;) {
268 /* Fix SCC */
269 if ((strcasecmp(node->name, "escc") == 0) && node->child) {
270 if (node->child->n_intrs < 3) {
271 node->child->intrs = &gatwick_int_pool[count];
272 count += 3;
273 }
274 node->child->n_intrs = 3;
275 node->child->intrs[0].line = 15+irq_base;
276 node->child->intrs[1].line = 4+irq_base;
277 node->child->intrs[2].line = 5+irq_base;
278 printk(KERN_INFO "irq: fixed SCC on gatwick"
279 " (%d,%d,%d)\n",
280 node->child->intrs[0].line,
281 node->child->intrs[1].line,
282 node->child->intrs[2].line);
283 }
284 /* Fix media-bay & left SWIM */
285 if (strcasecmp(node->name, "media-bay") == 0) {
286 struct device_node* ya_node;
287
288 if (node->n_intrs == 0)
289 node->intrs = &gatwick_int_pool[count++];
290 node->n_intrs = 1;
291 node->intrs[0].line = 29+irq_base;
292 printk(KERN_INFO "irq: fixed media-bay on gatwick"
293 " (%d)\n", node->intrs[0].line);
294
295 ya_node = node->child;
296 while(ya_node) {
297 if (strcasecmp(ya_node->name, "floppy") == 0) {
298 if (ya_node->n_intrs < 2) {
299 ya_node->intrs = &gatwick_int_pool[count];
300 count += 2;
301 }
302 ya_node->n_intrs = 2;
303 ya_node->intrs[0].line = 19+irq_base;
304 ya_node->intrs[1].line = 1+irq_base;
305 printk(KERN_INFO "irq: fixed floppy on second controller (%d,%d)\n",
306 ya_node->intrs[0].line, ya_node->intrs[1].line);
307 }
308 if (strcasecmp(ya_node->name, "ata4") == 0) {
309 if (ya_node->n_intrs < 2) {
310 ya_node->intrs = &gatwick_int_pool[count];
311 count += 2;
312 }
313 ya_node->n_intrs = 2;
314 ya_node->intrs[0].line = 14+irq_base;
315 ya_node->intrs[1].line = 3+irq_base;
316 printk(KERN_INFO "irq: fixed ide on second controller (%d,%d)\n",
317 ya_node->intrs[0].line, ya_node->intrs[1].line);
318 }
319 ya_node = ya_node->sibling;
320 }
321 }
322 }
323 if (count > 10) {
324 printk("WARNING !! Gatwick interrupt pool overflow\n");
325 printk(" GATWICK_IRQ_POOL_SIZE = %d\n", GATWICK_IRQ_POOL_SIZE);
326 printk(" requested = %d\n", count);
327 }
328}
329
330/*
331 * The PowerBook 3400/2400/3500 can have a combo ethernet/modem
332 * card which includes an ohare chip that acts as a second interrupt
333 * controller. If we find this second ohare, set it up and fix the
334 * interrupt value in the device tree for the ethernet chip.
335 */
336static void __init enable_second_ohare(struct device_node *np)
337{
338 unsigned char bus, devfn;
339 unsigned short cmd;
340 struct device_node *ether;
341
342 /* This code doesn't strictly belong here, it could be part of
343 * either the PCI initialisation or the feature code. It's kept
344 * here for historical reasons.
345 */
346 if (pci_device_from_OF_node(np, &bus, &devfn) == 0) {
347 struct pci_controller* hose =
348 pci_find_hose_for_OF_device(np);
349 if (!hose) {
350 printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
351 return;
352 }
353 early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
354 cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
355 cmd &= ~PCI_COMMAND_IO;
356 early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
357 }
358
359 /* Fix interrupt for the modem/ethernet combo controller. The number
360 * in the device tree (27) is bogus (correct for the ethernet-only
361 * board but not the combo ethernet/modem board).
362 * The real interrupt is 28 on the second controller -> 28+32 = 60.
363 */
364 ether = of_find_node_by_name(NULL, "pci1011,14");
365 if (ether && ether->n_intrs > 0) {
366 ether->intrs[0].line = 60;
367 printk(KERN_INFO "irq: Fixed ethernet IRQ to %d\n",
368 ether->intrs[0].line);
369 }
370 of_node_put(ether);
371} 269}
372 270
373#ifdef CONFIG_XMON 271#ifdef CONFIG_XMON
@@ -381,22 +279,65 @@ static struct irqaction xmon_action = {
381 279
382static struct irqaction gatwick_cascade_action = { 280static struct irqaction gatwick_cascade_action = {
383 .handler = gatwick_action, 281 .handler = gatwick_action,
384 .flags = SA_INTERRUPT, 282 .flags = IRQF_DISABLED,
385 .mask = CPU_MASK_NONE, 283 .mask = CPU_MASK_NONE,
386 .name = "cascade", 284 .name = "cascade",
387}; 285};
388 286
287static int pmac_pic_host_match(struct irq_host *h, struct device_node *node)
288{
289 /* We match all, we don't always have a node anyway */
290 return 1;
291}
292
293static int pmac_pic_host_map(struct irq_host *h, unsigned int virq,
294 irq_hw_number_t hw, unsigned int flags)
295{
296 struct irq_desc *desc = get_irq_desc(virq);
297 int level;
298
299 if (hw >= max_irqs)
300 return -EINVAL;
301
302 /* Mark level interrupts, set delayed disable for edge ones and set
303 * handlers
304 */
305 level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f)));
306 if (level)
307 desc->status |= IRQ_LEVEL;
308 else
309 desc->status |= IRQ_DELAYED_DISABLE;
310 set_irq_chip_and_handler(virq, &pmac_pic, level ?
311 handle_level_irq : handle_edge_irq);
312 return 0;
313}
314
315static int pmac_pic_host_xlate(struct irq_host *h, struct device_node *ct,
316 u32 *intspec, unsigned int intsize,
317 irq_hw_number_t *out_hwirq,
318 unsigned int *out_flags)
319
320{
321 *out_hwirq = *intspec;
322 return 0;
323}
324
325static struct irq_host_ops pmac_pic_host_ops = {
326 .match = pmac_pic_host_match,
327 .map = pmac_pic_host_map,
328 .xlate = pmac_pic_host_xlate,
329};
330
389static void __init pmac_pic_probe_oldstyle(void) 331static void __init pmac_pic_probe_oldstyle(void)
390{ 332{
391 int i; 333 int i;
392 int irq_cascade = -1;
393 struct device_node *master = NULL; 334 struct device_node *master = NULL;
394 struct device_node *slave = NULL; 335 struct device_node *slave = NULL;
395 u8 __iomem *addr; 336 u8 __iomem *addr;
396 struct resource r; 337 struct resource r;
397 338
398 /* Set our get_irq function */ 339 /* Set our get_irq function */
399 ppc_md.get_irq = pmac_get_irq; 340 ppc_md.get_irq = pmac_pic_get_irq;
400 341
401 /* 342 /*
402 * Find the interrupt controller type & node 343 * Find the interrupt controller type & node
@@ -414,7 +355,6 @@ static void __init pmac_pic_probe_oldstyle(void)
414 if (slave) { 355 if (slave) {
415 max_irqs = 64; 356 max_irqs = 64;
416 level_mask[1] = OHARE_LEVEL_MASK; 357 level_mask[1] = OHARE_LEVEL_MASK;
417 enable_second_ohare(slave);
418 } 358 }
419 } else if ((master = of_find_node_by_name(NULL, "mac-io")) != NULL) { 359 } else if ((master = of_find_node_by_name(NULL, "mac-io")) != NULL) {
420 max_irqs = max_real_irqs = 64; 360 max_irqs = max_real_irqs = 64;
@@ -438,14 +378,18 @@ static void __init pmac_pic_probe_oldstyle(void)
438 max_irqs = 128; 378 max_irqs = 128;
439 level_mask[2] = HEATHROW_LEVEL_MASK; 379 level_mask[2] = HEATHROW_LEVEL_MASK;
440 level_mask[3] = 0; 380 level_mask[3] = 0;
441 pmac_fix_gatwick_interrupts(slave, max_real_irqs);
442 } 381 }
443 } 382 }
444 BUG_ON(master == NULL); 383 BUG_ON(master == NULL);
445 384
446 /* Set the handler for the main PIC */ 385 /*
447 for ( i = 0; i < max_real_irqs ; i++ ) 386 * Allocate an irq host
448 irq_desc[i].chip = &pmac_pic; 387 */
388 pmac_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, max_irqs,
389 &pmac_pic_host_ops,
390 max_irqs);
391 BUG_ON(pmac_pic_host == NULL);
392 irq_set_default_host(pmac_pic_host);
449 393
450 /* Get addresses of first controller if we have a node for it */ 394 /* Get addresses of first controller if we have a node for it */
451 BUG_ON(of_address_to_resource(master, 0, &r)); 395 BUG_ON(of_address_to_resource(master, 0, &r));
@@ -472,39 +416,38 @@ static void __init pmac_pic_probe_oldstyle(void)
472 pmac_irq_hw[i++] = 416 pmac_irq_hw[i++] =
473 (volatile struct pmac_irq_hw __iomem *) 417 (volatile struct pmac_irq_hw __iomem *)
474 (addr + 0x10); 418 (addr + 0x10);
475 irq_cascade = slave->intrs[0].line; 419 pmac_irq_cascade = irq_of_parse_and_map(slave, 0);
476 420
477 printk(KERN_INFO "irq: Found slave Apple PIC %s for %d irqs" 421 printk(KERN_INFO "irq: Found slave Apple PIC %s for %d irqs"
478 " cascade: %d\n", slave->full_name, 422 " cascade: %d\n", slave->full_name,
479 max_irqs - max_real_irqs, irq_cascade); 423 max_irqs - max_real_irqs, pmac_irq_cascade);
480 } 424 }
481 of_node_put(slave); 425 of_node_put(slave);
482 426
483 /* disable all interrupts in all controllers */ 427 /* Disable all interrupts in all controllers */
484 for (i = 0; i * 32 < max_irqs; ++i) 428 for (i = 0; i * 32 < max_irqs; ++i)
485 out_le32(&pmac_irq_hw[i]->enable, 0); 429 out_le32(&pmac_irq_hw[i]->enable, 0);
486 430
487 /* mark level interrupts */ 431 /* Hookup cascade irq */
488 for (i = 0; i < max_irqs; i++) 432 if (slave && pmac_irq_cascade != NO_IRQ)
489 if (level_mask[i >> 5] & (1UL << (i & 0x1f))) 433 setup_irq(pmac_irq_cascade, &gatwick_cascade_action);
490 irq_desc[i].status = IRQ_LEVEL;
491 434
492 /* Setup handlers for secondary controller and hook cascade irq*/
493 if (slave) {
494 for ( i = max_real_irqs ; i < max_irqs ; i++ )
495 irq_desc[i].chip = &gatwick_pic;
496 setup_irq(irq_cascade, &gatwick_cascade_action);
497 }
498 printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); 435 printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs);
499#ifdef CONFIG_XMON 436#ifdef CONFIG_XMON
500 setup_irq(20, &xmon_action); 437 setup_irq(irq_create_mapping(NULL, 20, 0), &xmon_action);
501#endif 438#endif
502} 439}
503#endif /* CONFIG_PPC32 */ 440#endif /* CONFIG_PPC32 */
504 441
505static int pmac_u3_cascade(struct pt_regs *regs, void *data) 442static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc,
443 struct pt_regs *regs)
506{ 444{
507 return mpic_get_one_irq((struct mpic *)data, regs); 445 struct mpic *mpic = desc->handler_data;
446
447 unsigned int cascade_irq = mpic_get_one_irq(mpic, regs);
448 if (cascade_irq != NO_IRQ)
449 generic_handle_irq(cascade_irq, regs);
450 desc->chip->eoi(irq);
508} 451}
509 452
510static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic) 453static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
@@ -514,21 +457,20 @@ static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
514 int nmi_irq; 457 int nmi_irq;
515 458
516 pswitch = of_find_node_by_name(NULL, "programmer-switch"); 459 pswitch = of_find_node_by_name(NULL, "programmer-switch");
517 if (pswitch && pswitch->n_intrs) { 460 if (pswitch) {
518 nmi_irq = pswitch->intrs[0].line; 461 nmi_irq = irq_of_parse_and_map(pswitch, 0);
519 mpic_irq_set_priority(nmi_irq, 9); 462 if (nmi_irq != NO_IRQ) {
520 setup_irq(nmi_irq, &xmon_action); 463 mpic_irq_set_priority(nmi_irq, 9);
464 setup_irq(nmi_irq, &xmon_action);
465 }
466 of_node_put(pswitch);
521 } 467 }
522 of_node_put(pswitch);
523#endif /* defined(CONFIG_XMON) && defined(CONFIG_PPC32) */ 468#endif /* defined(CONFIG_XMON) && defined(CONFIG_PPC32) */
524} 469}
525 470
526static struct mpic * __init pmac_setup_one_mpic(struct device_node *np, 471static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,
527 int master) 472 int master)
528{ 473{
529 unsigned char senses[128];
530 int offset = master ? 0 : 128;
531 int count = master ? 128 : 124;
532 const char *name = master ? " MPIC 1 " : " MPIC 2 "; 474 const char *name = master ? " MPIC 1 " : " MPIC 2 ";
533 struct resource r; 475 struct resource r;
534 struct mpic *mpic; 476 struct mpic *mpic;
@@ -541,8 +483,6 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,
541 483
542 pmac_call_feature(PMAC_FTR_ENABLE_MPIC, np, 0, 0); 484 pmac_call_feature(PMAC_FTR_ENABLE_MPIC, np, 0, 0);
543 485
544 prom_get_irq_senses(senses, offset, offset + count);
545
546 flags |= MPIC_WANTS_RESET; 486 flags |= MPIC_WANTS_RESET;
547 if (get_property(np, "big-endian", NULL)) 487 if (get_property(np, "big-endian", NULL))
548 flags |= MPIC_BIG_ENDIAN; 488 flags |= MPIC_BIG_ENDIAN;
@@ -553,8 +493,7 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,
553 if (master && (flags & MPIC_BIG_ENDIAN)) 493 if (master && (flags & MPIC_BIG_ENDIAN))
554 flags |= MPIC_BROKEN_U3; 494 flags |= MPIC_BROKEN_U3;
555 495
556 mpic = mpic_alloc(r.start, flags, 0, offset, count, master ? 252 : 0, 496 mpic = mpic_alloc(np, r.start, flags, 0, 0, name);
557 senses, count, name);
558 if (mpic == NULL) 497 if (mpic == NULL)
559 return NULL; 498 return NULL;
560 499
@@ -567,6 +506,7 @@ static int __init pmac_pic_probe_mpic(void)
567{ 506{
568 struct mpic *mpic1, *mpic2; 507 struct mpic *mpic1, *mpic2;
569 struct device_node *np, *master = NULL, *slave = NULL; 508 struct device_node *np, *master = NULL, *slave = NULL;
509 unsigned int cascade;
570 510
571 /* We can have up to 2 MPICs cascaded */ 511 /* We can have up to 2 MPICs cascaded */
572 for (np = NULL; (np = of_find_node_by_type(np, "open-pic")) 512 for (np = NULL; (np = of_find_node_by_type(np, "open-pic"))
@@ -603,8 +543,15 @@ static int __init pmac_pic_probe_mpic(void)
603 of_node_put(master); 543 of_node_put(master);
604 544
605 /* No slave, let's go out */ 545 /* No slave, let's go out */
606 if (slave == NULL || slave->n_intrs < 1) 546 if (slave == NULL)
547 return 0;
548
549 /* Get/Map slave interrupt */
550 cascade = irq_of_parse_and_map(slave, 0);
551 if (cascade == NO_IRQ) {
552 printk(KERN_ERR "Failed to map cascade IRQ\n");
607 return 0; 553 return 0;
554 }
608 555
609 mpic2 = pmac_setup_one_mpic(slave, 0); 556 mpic2 = pmac_setup_one_mpic(slave, 0);
610 if (mpic2 == NULL) { 557 if (mpic2 == NULL) {
@@ -612,7 +559,8 @@ static int __init pmac_pic_probe_mpic(void)
612 of_node_put(slave); 559 of_node_put(slave);
613 return 0; 560 return 0;
614 } 561 }
615 mpic_setup_cascade(slave->intrs[0].line, pmac_u3_cascade, mpic2); 562 set_irq_data(cascade, mpic2);
563 set_irq_chained_handler(cascade, pmac_u3_cascade);
616 564
617 of_node_put(slave); 565 of_node_put(slave);
618 return 0; 566 return 0;
@@ -621,6 +569,19 @@ static int __init pmac_pic_probe_mpic(void)
621 569
622void __init pmac_pic_init(void) 570void __init pmac_pic_init(void)
623{ 571{
572 unsigned int flags = 0;
573
574 /* We configure the OF parsing based on our oldworld vs. newworld
575 * platform type and wether we were booted by BootX.
576 */
577#ifdef CONFIG_PPC32
578 if (!pmac_newworld)
579 flags |= OF_IMAP_OLDWORLD_MAC;
580 if (get_property(of_chosen, "linux,bootx", NULL) != NULL)
581 flags |= OF_IMAP_NO_PHANDLE;
582 of_irq_map_init(flags);
583#endif /* CONFIG_PPC_32 */
584
624 /* We first try to detect Apple's new Core99 chipset, since mac-io 585 /* We first try to detect Apple's new Core99 chipset, since mac-io
625 * is quite different on those machines and contains an IBM MPIC2. 586 * is quite different on those machines and contains an IBM MPIC2.
626 */ 587 */
@@ -643,6 +604,7 @@ unsigned long sleep_save_mask[2];
643 604
644/* This used to be passed by the PMU driver but that link got 605/* This used to be passed by the PMU driver but that link got
645 * broken with the new driver model. We use this tweak for now... 606 * broken with the new driver model. We use this tweak for now...
607 * We really want to do things differently though...
646 */ 608 */
647static int pmacpic_find_viaint(void) 609static int pmacpic_find_viaint(void)
648{ 610{
@@ -656,7 +618,7 @@ static int pmacpic_find_viaint(void)
656 np = of_find_node_by_name(NULL, "via-pmu"); 618 np = of_find_node_by_name(NULL, "via-pmu");
657 if (np == NULL) 619 if (np == NULL)
658 goto not_found; 620 goto not_found;
659 viaint = np->intrs[0].line; 621 viaint = irq_of_parse_and_map(np, 0);;
660#endif /* CONFIG_ADB_PMU */ 622#endif /* CONFIG_ADB_PMU */
661 623
662not_found: 624not_found:
diff --git a/arch/powerpc/platforms/powermac/pmac.h b/arch/powerpc/platforms/powermac/pmac.h
index 21c7b0f8f329..94e7b24b840b 100644
--- a/arch/powerpc/platforms/powermac/pmac.h
+++ b/arch/powerpc/platforms/powermac/pmac.h
@@ -12,6 +12,8 @@
12 12
13struct rtc_time; 13struct rtc_time;
14 14
15extern int pmac_newworld;
16
15extern long pmac_time_init(void); 17extern long pmac_time_init(void);
16extern unsigned long pmac_get_boot_time(void); 18extern unsigned long pmac_get_boot_time(void);
17extern void pmac_get_rtc_time(struct rtc_time *); 19extern void pmac_get_rtc_time(struct rtc_time *);
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 8654b5f07836..31a9da769fa2 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -613,9 +613,6 @@ static void __init pmac_init_early(void)
613 udbg_adb_init(!!strstr(cmd_line, "btextdbg")); 613 udbg_adb_init(!!strstr(cmd_line, "btextdbg"));
614 614
615#ifdef CONFIG_PPC64 615#ifdef CONFIG_PPC64
616 /* Setup interrupt mapping options */
617 ppc64_interrupt_controller = IC_OPEN_PIC;
618
619 iommu_init_early_dart(); 616 iommu_init_early_dart();
620#endif 617#endif
621} 618}
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 63affcb24219..827b7121ffb8 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -377,7 +377,7 @@ static void __init psurge_dual_sync_tb(int cpu_nr)
377 377
378static struct irqaction psurge_irqaction = { 378static struct irqaction psurge_irqaction = {
379 .handler = psurge_primary_intr, 379 .handler = psurge_primary_intr,
380 .flags = SA_INTERRUPT, 380 .flags = IRQF_DISABLED,
381 .mask = CPU_MASK_NONE, 381 .mask = CPU_MASK_NONE,
382 .name = "primary IPI", 382 .name = "primary IPI",
383}; 383};
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 9639c66b453d..9df783088b61 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -72,32 +72,62 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id,
72 72
73/* #define DEBUG */ 73/* #define DEBUG */
74 74
75static void request_ras_irqs(struct device_node *np, char *propname, 75
76static void request_ras_irqs(struct device_node *np,
76 irqreturn_t (*handler)(int, void *, struct pt_regs *), 77 irqreturn_t (*handler)(int, void *, struct pt_regs *),
77 const char *name) 78 const char *name)
78{ 79{
79 unsigned int *ireg, len, i; 80 int i, index, count = 0;
80 int virq, n_intr; 81 struct of_irq oirq;
81 82 u32 *opicprop;
82 ireg = (unsigned int *)get_property(np, propname, &len); 83 unsigned int opicplen;
83 if (ireg == NULL) 84 unsigned int virqs[16];
84 return; 85
85 n_intr = prom_n_intr_cells(np); 86 /* Check for obsolete "open-pic-interrupt" property. If present, then
86 len /= n_intr * sizeof(*ireg); 87 * map those interrupts using the default interrupt host and default
87 88 * trigger
88 for (i = 0; i < len; i++) { 89 */
89 virq = virt_irq_create_mapping(*ireg); 90 opicprop = (u32 *)get_property(np, "open-pic-interrupt", &opicplen);
90 if (virq == NO_IRQ) { 91 if (opicprop) {
91 printk(KERN_ERR "Unable to allocate interrupt " 92 opicplen /= sizeof(u32);
92 "number for %s\n", np->full_name); 93 for (i = 0; i < opicplen; i++) {
93 return; 94 if (count > 15)
95 break;
96 virqs[count] = irq_create_mapping(NULL, *(opicprop++),
97 IRQ_TYPE_NONE);
98 if (virqs[count] == NO_IRQ)
99 printk(KERN_ERR "Unable to allocate interrupt "
100 "number for %s\n", np->full_name);
101 else
102 count++;
103
94 } 104 }
95 if (request_irq(irq_offset_up(virq), handler, 0, name, NULL)) { 105 }
106 /* Else use normal interrupt tree parsing */
107 else {
108 /* First try to do a proper OF tree parsing */
109 for (index = 0; of_irq_map_one(np, index, &oirq) == 0;
110 index++) {
111 if (count > 15)
112 break;
113 virqs[count] = irq_create_of_mapping(oirq.controller,
114 oirq.specifier,
115 oirq.size);
116 if (virqs[count] == NO_IRQ)
117 printk(KERN_ERR "Unable to allocate interrupt "
118 "number for %s\n", np->full_name);
119 else
120 count++;
121 }
122 }
123
124 /* Now request them */
125 for (i = 0; i < count; i++) {
126 if (request_irq(virqs[i], handler, 0, name, NULL)) {
96 printk(KERN_ERR "Unable to request interrupt %d for " 127 printk(KERN_ERR "Unable to request interrupt %d for "
97 "%s\n", irq_offset_up(virq), np->full_name); 128 "%s\n", virqs[i], np->full_name);
98 return; 129 return;
99 } 130 }
100 ireg += n_intr;
101 } 131 }
102} 132}
103 133
@@ -115,20 +145,14 @@ static int __init init_ras_IRQ(void)
115 /* Internal Errors */ 145 /* Internal Errors */
116 np = of_find_node_by_path("/event-sources/internal-errors"); 146 np = of_find_node_by_path("/event-sources/internal-errors");
117 if (np != NULL) { 147 if (np != NULL) {
118 request_ras_irqs(np, "open-pic-interrupt", ras_error_interrupt, 148 request_ras_irqs(np, ras_error_interrupt, "RAS_ERROR");
119 "RAS_ERROR");
120 request_ras_irqs(np, "interrupts", ras_error_interrupt,
121 "RAS_ERROR");
122 of_node_put(np); 149 of_node_put(np);
123 } 150 }
124 151
125 /* EPOW Events */ 152 /* EPOW Events */
126 np = of_find_node_by_path("/event-sources/epow-events"); 153 np = of_find_node_by_path("/event-sources/epow-events");
127 if (np != NULL) { 154 if (np != NULL) {
128 request_ras_irqs(np, "open-pic-interrupt", ras_epow_interrupt, 155 request_ras_irqs(np, ras_epow_interrupt, "RAS_EPOW");
129 "RAS_EPOW");
130 request_ras_irqs(np, "interrupts", ras_epow_interrupt,
131 "RAS_EPOW");
132 of_node_put(np); 156 of_node_put(np);
133 } 157 }
134 158
@@ -162,7 +186,7 @@ ras_epow_interrupt(int irq, void *dev_id, struct pt_regs * regs)
162 186
163 status = rtas_call(ras_check_exception_token, 6, 1, NULL, 187 status = rtas_call(ras_check_exception_token, 6, 1, NULL,
164 RAS_VECTOR_OFFSET, 188 RAS_VECTOR_OFFSET,
165 virt_irq_to_real(irq_offset_down(irq)), 189 irq_map[irq].hwirq,
166 RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS, 190 RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
167 critical, __pa(&ras_log_buf), 191 critical, __pa(&ras_log_buf),
168 rtas_get_error_log_max()); 192 rtas_get_error_log_max());
@@ -198,7 +222,7 @@ ras_error_interrupt(int irq, void *dev_id, struct pt_regs * regs)
198 222
199 status = rtas_call(ras_check_exception_token, 6, 1, NULL, 223 status = rtas_call(ras_check_exception_token, 6, 1, NULL,
200 RAS_VECTOR_OFFSET, 224 RAS_VECTOR_OFFSET,
201 virt_irq_to_real(irq_offset_down(irq)), 225 irq_map[irq].hwirq,
202 RTAS_INTERNAL_ERROR, 1 /*Time Critical */, 226 RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
203 __pa(&ras_log_buf), 227 __pa(&ras_log_buf),
204 rtas_get_error_log_max()); 228 rtas_get_error_log_max());
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 999509d28af8..54a52437265c 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -76,6 +76,9 @@
76#define DBG(fmt...) 76#define DBG(fmt...)
77#endif 77#endif
78 78
79/* move those away to a .h */
80extern void smp_init_pseries_mpic(void);
81extern void smp_init_pseries_xics(void);
79extern void find_udbg_vterm(void); 82extern void find_udbg_vterm(void);
80 83
81int fwnmi_active; /* TRUE if an FWNMI handler is present */ 84int fwnmi_active; /* TRUE if an FWNMI handler is present */
@@ -83,7 +86,7 @@ int fwnmi_active; /* TRUE if an FWNMI handler is present */
83static void pseries_shared_idle_sleep(void); 86static void pseries_shared_idle_sleep(void);
84static void pseries_dedicated_idle_sleep(void); 87static void pseries_dedicated_idle_sleep(void);
85 88
86struct mpic *pSeries_mpic; 89static struct device_node *pSeries_mpic_node;
87 90
88static void pSeries_show_cpuinfo(struct seq_file *m) 91static void pSeries_show_cpuinfo(struct seq_file *m)
89{ 92{
@@ -118,63 +121,92 @@ static void __init fwnmi_init(void)
118 fwnmi_active = 1; 121 fwnmi_active = 1;
119} 122}
120 123
121static void __init pSeries_init_mpic(void) 124void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc,
125 struct pt_regs *regs)
122{ 126{
123 unsigned int *addrp; 127 unsigned int cascade_irq = i8259_irq(regs);
124 struct device_node *np; 128 if (cascade_irq != NO_IRQ)
125 unsigned long intack = 0; 129 generic_handle_irq(cascade_irq, regs);
126 130 desc->chip->eoi(irq);
127 /* All ISUs are setup, complete initialization */
128 mpic_init(pSeries_mpic);
129
130 /* Check what kind of cascade ACK we have */
131 if (!(np = of_find_node_by_name(NULL, "pci"))
132 || !(addrp = (unsigned int *)
133 get_property(np, "8259-interrupt-acknowledge", NULL)))
134 printk(KERN_ERR "Cannot find pci to get ack address\n");
135 else
136 intack = addrp[prom_n_addr_cells(np)-1];
137 of_node_put(np);
138
139 /* Setup the legacy interrupts & controller */
140 i8259_init(intack, 0);
141
142 /* Hook cascade to mpic */
143 mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
144} 131}
145 132
146static void __init pSeries_setup_mpic(void) 133static void __init pseries_mpic_init_IRQ(void)
147{ 134{
135 struct device_node *np, *old, *cascade = NULL;
136 unsigned int *addrp;
137 unsigned long intack = 0;
148 unsigned int *opprop; 138 unsigned int *opprop;
149 unsigned long openpic_addr = 0; 139 unsigned long openpic_addr = 0;
150 unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS]; 140 unsigned int cascade_irq;
151 struct device_node *root; 141 int naddr, n, i, opplen;
152 int irq_count; 142 struct mpic *mpic;
153 143
154 /* Find the Open PIC if present */ 144 np = of_find_node_by_path("/");
155 root = of_find_node_by_path("/"); 145 naddr = prom_n_addr_cells(np);
156 opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL); 146 opprop = (unsigned int *) get_property(np, "platform-open-pic", &opplen);
157 if (opprop != 0) { 147 if (opprop != 0) {
158 int n = prom_n_addr_cells(root); 148 openpic_addr = of_read_number(opprop, naddr);
159
160 for (openpic_addr = 0; n > 0; --n)
161 openpic_addr = (openpic_addr << 32) + *opprop++;
162 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); 149 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
163 } 150 }
164 of_node_put(root); 151 of_node_put(np);
165 152
166 BUG_ON(openpic_addr == 0); 153 BUG_ON(openpic_addr == 0);
167 154
168 /* Get the sense values from OF */
169 prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
170
171 /* Setup the openpic driver */ 155 /* Setup the openpic driver */
172 irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */ 156 mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
173 pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY, 157 MPIC_PRIMARY,
174 16, 16, irq_count, /* isu size, irq offset, irq count */ 158 16, 250, /* isu size, irq count */
175 NR_IRQS - 4, /* ipi offset */ 159 " MPIC ");
176 senses, irq_count, /* sense & sense size */ 160 BUG_ON(mpic == NULL);
177 " MPIC "); 161
162 /* Add ISUs */
163 opplen /= sizeof(u32);
164 for (n = 0, i = naddr; i < opplen; i += naddr, n++) {
165 unsigned long isuaddr = of_read_number(opprop + i, naddr);
166 mpic_assign_isu(mpic, n, isuaddr);
167 }
168
169 /* All ISUs are setup, complete initialization */
170 mpic_init(mpic);
171
172 /* Look for cascade */
173 for_each_node_by_type(np, "interrupt-controller")
174 if (device_is_compatible(np, "chrp,iic")) {
175 cascade = np;
176 break;
177 }
178 if (cascade == NULL)
179 return;
180
181 cascade_irq = irq_of_parse_and_map(cascade, 0);
182 if (cascade == NO_IRQ) {
183 printk(KERN_ERR "xics: failed to map cascade interrupt");
184 return;
185 }
186
187 /* Check ACK type */
188 for (old = of_node_get(cascade); old != NULL ; old = np) {
189 np = of_get_parent(old);
190 of_node_put(old);
191 if (np == NULL)
192 break;
193 if (strcmp(np->name, "pci") != 0)
194 continue;
195 addrp = (u32 *)get_property(np, "8259-interrupt-acknowledge",
196 NULL);
197 if (addrp == NULL)
198 continue;
199 naddr = prom_n_addr_cells(np);
200 intack = addrp[naddr-1];
201 if (naddr > 1)
202 intack |= ((unsigned long)addrp[naddr-2]) << 32;
203 }
204 if (intack)
205 printk(KERN_DEBUG "mpic: PCI 8259 intack at 0x%016lx\n",
206 intack);
207 i8259_init(cascade, intack);
208 of_node_put(cascade);
209 set_irq_chained_handler(cascade_irq, pseries_8259_cascade);
178} 210}
179 211
180static void pseries_lpar_enable_pmcs(void) 212static void pseries_lpar_enable_pmcs(void)
@@ -192,23 +224,67 @@ static void pseries_lpar_enable_pmcs(void)
192 get_lppaca()->pmcregs_in_use = 1; 224 get_lppaca()->pmcregs_in_use = 1;
193} 225}
194 226
195static void __init pSeries_setup_arch(void) 227#ifdef CONFIG_KEXEC
228static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
196{ 229{
197 /* Fixup ppc_md depending on the type of interrupt controller */ 230 mpic_teardown_this_cpu(secondary);
198 if (ppc64_interrupt_controller == IC_OPEN_PIC) { 231}
199 ppc_md.init_IRQ = pSeries_init_mpic; 232
200 ppc_md.get_irq = mpic_get_irq; 233static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
201 /* Allocate the mpic now, so that find_and_init_phbs() can 234{
202 * fill the ISUs */ 235 /* Don't risk a hypervisor call if we're crashing */
203 pSeries_setup_mpic(); 236 if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
204 } else { 237 unsigned long vpa = __pa(get_lppaca());
205 ppc_md.init_IRQ = xics_init_IRQ; 238
206 ppc_md.get_irq = xics_get_irq; 239 if (unregister_vpa(hard_smp_processor_id(), vpa)) {
240 printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
241 "failed\n", smp_processor_id(),
242 hard_smp_processor_id());
243 }
207 } 244 }
245 xics_teardown_cpu(secondary);
246}
247#endif /* CONFIG_KEXEC */
208 248
249static void __init pseries_discover_pic(void)
250{
251 struct device_node *np;
252 char *typep;
253
254 for (np = NULL; (np = of_find_node_by_name(np,
255 "interrupt-controller"));) {
256 typep = (char *)get_property(np, "compatible", NULL);
257 if (strstr(typep, "open-pic")) {
258 pSeries_mpic_node = of_node_get(np);
259 ppc_md.init_IRQ = pseries_mpic_init_IRQ;
260 ppc_md.get_irq = mpic_get_irq;
261#ifdef CONFIG_KEXEC
262 ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
263#endif
264#ifdef CONFIG_SMP
265 smp_init_pseries_mpic();
266#endif
267 return;
268 } else if (strstr(typep, "ppc-xicp")) {
269 ppc_md.init_IRQ = xics_init_IRQ;
270#ifdef CONFIG_KEXEC
271 ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
272#endif
209#ifdef CONFIG_SMP 273#ifdef CONFIG_SMP
210 smp_init_pSeries(); 274 smp_init_pseries_xics();
211#endif 275#endif
276 return;
277 }
278 }
279 printk(KERN_ERR "pSeries_discover_pic: failed to recognize"
280 " interrupt-controller\n");
281}
282
283static void __init pSeries_setup_arch(void)
284{
285 /* Discover PIC type and setup ppc_md accordingly */
286 pseries_discover_pic();
287
212 /* openpic global configuration register (64-bit format). */ 288 /* openpic global configuration register (64-bit format). */
213 /* openpic Interrupt Source Unit pointer (64-bit format). */ 289 /* openpic Interrupt Source Unit pointer (64-bit format). */
214 /* python0 facility area (mmio) (64-bit format) REAL address. */ 290 /* python0 facility area (mmio) (64-bit format) REAL address. */
@@ -260,41 +336,11 @@ static int __init pSeries_init_panel(void)
260} 336}
261arch_initcall(pSeries_init_panel); 337arch_initcall(pSeries_init_panel);
262 338
263static void __init pSeries_discover_pic(void)
264{
265 struct device_node *np;
266 char *typep;
267
268 /*
269 * Setup interrupt mapping options that are needed for finish_device_tree
270 * to properly parse the OF interrupt tree & do the virtual irq mapping
271 */
272 __irq_offset_value = NUM_ISA_INTERRUPTS;
273 ppc64_interrupt_controller = IC_INVALID;
274 for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
275 typep = (char *)get_property(np, "compatible", NULL);
276 if (strstr(typep, "open-pic")) {
277 ppc64_interrupt_controller = IC_OPEN_PIC;
278 break;
279 } else if (strstr(typep, "ppc-xicp")) {
280 ppc64_interrupt_controller = IC_PPC_XIC;
281 break;
282 }
283 }
284 if (ppc64_interrupt_controller == IC_INVALID)
285 printk("pSeries_discover_pic: failed to recognize"
286 " interrupt-controller\n");
287
288}
289
290static void pSeries_mach_cpu_die(void) 339static void pSeries_mach_cpu_die(void)
291{ 340{
292 local_irq_disable(); 341 local_irq_disable();
293 idle_task_exit(); 342 idle_task_exit();
294 /* Some hardware requires clearing the CPPR, while other hardware does not 343 xics_teardown_cpu(0);
295 * it is safe either way
296 */
297 pSeriesLP_cppr_info(0, 0);
298 rtas_stop_self(); 344 rtas_stop_self();
299 /* Should never get here... */ 345 /* Should never get here... */
300 BUG(); 346 BUG();
@@ -332,8 +378,6 @@ static void __init pSeries_init_early(void)
332 378
333 iommu_init_early_pSeries(); 379 iommu_init_early_pSeries();
334 380
335 pSeries_discover_pic();
336
337 DBG(" <- pSeries_init_early()\n"); 381 DBG(" <- pSeries_init_early()\n");
338} 382}
339 383
@@ -505,27 +549,6 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus)
505 return PCI_PROBE_NORMAL; 549 return PCI_PROBE_NORMAL;
506} 550}
507 551
508#ifdef CONFIG_KEXEC
509static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
510{
511 /* Don't risk a hypervisor call if we're crashing */
512 if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
513 unsigned long vpa = __pa(get_lppaca());
514
515 if (unregister_vpa(hard_smp_processor_id(), vpa)) {
516 printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
517 "failed\n", smp_processor_id(),
518 hard_smp_processor_id());
519 }
520 }
521
522 if (ppc64_interrupt_controller == IC_OPEN_PIC)
523 mpic_teardown_this_cpu(secondary);
524 else
525 xics_teardown_cpu(secondary);
526}
527#endif
528
529define_machine(pseries) { 552define_machine(pseries) {
530 .name = "pSeries", 553 .name = "pSeries",
531 .probe = pSeries_probe, 554 .probe = pSeries_probe,
@@ -550,7 +573,6 @@ define_machine(pseries) {
550 .system_reset_exception = pSeries_system_reset_exception, 573 .system_reset_exception = pSeries_system_reset_exception,
551 .machine_check_exception = pSeries_machine_check_exception, 574 .machine_check_exception = pSeries_machine_check_exception,
552#ifdef CONFIG_KEXEC 575#ifdef CONFIG_KEXEC
553 .kexec_cpu_down = pseries_kexec_cpu_down,
554 .machine_kexec = default_machine_kexec, 576 .machine_kexec = default_machine_kexec,
555 .machine_kexec_prepare = default_machine_kexec_prepare, 577 .machine_kexec_prepare = default_machine_kexec_prepare,
556 .machine_crash_shutdown = default_machine_crash_shutdown, 578 .machine_crash_shutdown = default_machine_crash_shutdown,
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 4ad144df49c2..ac61098ff401 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -416,27 +416,12 @@ static struct smp_ops_t pSeries_xics_smp_ops = {
416#endif 416#endif
417 417
418/* This is called very early */ 418/* This is called very early */
419void __init smp_init_pSeries(void) 419static void __init smp_init_pseries(void)
420{ 420{
421 int i; 421 int i;
422 422
423 DBG(" -> smp_init_pSeries()\n"); 423 DBG(" -> smp_init_pSeries()\n");
424 424
425 switch (ppc64_interrupt_controller) {
426#ifdef CONFIG_MPIC
427 case IC_OPEN_PIC:
428 smp_ops = &pSeries_mpic_smp_ops;
429 break;
430#endif
431#ifdef CONFIG_XICS
432 case IC_PPC_XIC:
433 smp_ops = &pSeries_xics_smp_ops;
434 break;
435#endif
436 default:
437 panic("Invalid interrupt controller");
438 }
439
440#ifdef CONFIG_HOTPLUG_CPU 425#ifdef CONFIG_HOTPLUG_CPU
441 smp_ops->cpu_disable = pSeries_cpu_disable; 426 smp_ops->cpu_disable = pSeries_cpu_disable;
442 smp_ops->cpu_die = pSeries_cpu_die; 427 smp_ops->cpu_die = pSeries_cpu_die;
@@ -471,3 +456,18 @@ void __init smp_init_pSeries(void)
471 DBG(" <- smp_init_pSeries()\n"); 456 DBG(" <- smp_init_pSeries()\n");
472} 457}
473 458
459#ifdef CONFIG_MPIC
460void __init smp_init_pseries_mpic(void)
461{
462 smp_ops = &pSeries_mpic_smp_ops;
463
464 smp_init_pseries();
465}
466#endif
467
468void __init smp_init_pseries_xics(void)
469{
470 smp_ops = &pSeries_xics_smp_ops;
471
472 smp_init_pseries();
473}
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 4d935d0817f2..716972aa9777 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -8,6 +8,9 @@
8 * as published by the Free Software Foundation; either version 8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11
12#undef DEBUG
13
11#include <linux/types.h> 14#include <linux/types.h>
12#include <linux/threads.h> 15#include <linux/threads.h>
13#include <linux/kernel.h> 16#include <linux/kernel.h>
@@ -19,6 +22,7 @@
19#include <linux/gfp.h> 22#include <linux/gfp.h>
20#include <linux/radix-tree.h> 23#include <linux/radix-tree.h>
21#include <linux/cpu.h> 24#include <linux/cpu.h>
25
22#include <asm/firmware.h> 26#include <asm/firmware.h>
23#include <asm/prom.h> 27#include <asm/prom.h>
24#include <asm/io.h> 28#include <asm/io.h>
@@ -31,26 +35,6 @@
31 35
32#include "xics.h" 36#include "xics.h"
33 37
34static unsigned int xics_startup(unsigned int irq);
35static void xics_enable_irq(unsigned int irq);
36static void xics_disable_irq(unsigned int irq);
37static void xics_mask_and_ack_irq(unsigned int irq);
38static void xics_end_irq(unsigned int irq);
39static void xics_set_affinity(unsigned int irq_nr, cpumask_t cpumask);
40
41static struct hw_interrupt_type xics_pic = {
42 .typename = " XICS ",
43 .startup = xics_startup,
44 .enable = xics_enable_irq,
45 .disable = xics_disable_irq,
46 .ack = xics_mask_and_ack_irq,
47 .end = xics_end_irq,
48 .set_affinity = xics_set_affinity
49};
50
51/* This is used to map real irq numbers to virtual */
52static struct radix_tree_root irq_map = RADIX_TREE_INIT(GFP_ATOMIC);
53
54#define XICS_IPI 2 38#define XICS_IPI 2
55#define XICS_IRQ_SPURIOUS 0 39#define XICS_IRQ_SPURIOUS 0
56 40
@@ -59,7 +43,7 @@ static struct radix_tree_root irq_map = RADIX_TREE_INIT(GFP_ATOMIC);
59 43
60/* 44/*
61 * Mark IPIs as higher priority so we can take them inside interrupts that 45 * Mark IPIs as higher priority so we can take them inside interrupts that
62 * arent marked SA_INTERRUPT 46 * arent marked IRQF_DISABLED
63 */ 47 */
64#define IPI_PRIORITY 4 48#define IPI_PRIORITY 4
65 49
@@ -81,12 +65,12 @@ struct xics_ipl {
81 65
82static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS]; 66static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
83 67
84static int xics_irq_8259_cascade = 0;
85static int xics_irq_8259_cascade_real = 0;
86static unsigned int default_server = 0xFF; 68static unsigned int default_server = 0xFF;
87static unsigned int default_distrib_server = 0; 69static unsigned int default_distrib_server = 0;
88static unsigned int interrupt_server_size = 8; 70static unsigned int interrupt_server_size = 8;
89 71
72static struct irq_host *xics_host;
73
90/* 74/*
91 * XICS only has a single IPI, so encode the messages per CPU 75 * XICS only has a single IPI, so encode the messages per CPU
92 */ 76 */
@@ -98,48 +82,34 @@ static int ibm_set_xive;
98static int ibm_int_on; 82static int ibm_int_on;
99static int ibm_int_off; 83static int ibm_int_off;
100 84
101typedef struct {
102 int (*xirr_info_get)(int cpu);
103 void (*xirr_info_set)(int cpu, int val);
104 void (*cppr_info)(int cpu, u8 val);
105 void (*qirr_info)(int cpu, u8 val);
106} xics_ops;
107 85
86/* Direct HW low level accessors */
108 87
109/* SMP */
110 88
111static int pSeries_xirr_info_get(int n_cpu) 89static inline unsigned int direct_xirr_info_get(int n_cpu)
112{ 90{
113 return in_be32(&xics_per_cpu[n_cpu]->xirr.word); 91 return in_be32(&xics_per_cpu[n_cpu]->xirr.word);
114} 92}
115 93
116static void pSeries_xirr_info_set(int n_cpu, int value) 94static inline void direct_xirr_info_set(int n_cpu, int value)
117{ 95{
118 out_be32(&xics_per_cpu[n_cpu]->xirr.word, value); 96 out_be32(&xics_per_cpu[n_cpu]->xirr.word, value);
119} 97}
120 98
121static void pSeries_cppr_info(int n_cpu, u8 value) 99static inline void direct_cppr_info(int n_cpu, u8 value)
122{ 100{
123 out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value); 101 out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value);
124} 102}
125 103
126static void pSeries_qirr_info(int n_cpu, u8 value) 104static inline void direct_qirr_info(int n_cpu, u8 value)
127{ 105{
128 out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value); 106 out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
129} 107}
130 108
131static xics_ops pSeries_ops = {
132 pSeries_xirr_info_get,
133 pSeries_xirr_info_set,
134 pSeries_cppr_info,
135 pSeries_qirr_info
136};
137 109
138static xics_ops *ops = &pSeries_ops; 110/* LPAR low level accessors */
139 111
140 112
141/* LPAR */
142
143static inline long plpar_eoi(unsigned long xirr) 113static inline long plpar_eoi(unsigned long xirr)
144{ 114{
145 return plpar_hcall_norets(H_EOI, xirr); 115 return plpar_hcall_norets(H_EOI, xirr);
@@ -161,7 +131,7 @@ static inline long plpar_xirr(unsigned long *xirr_ret)
161 return plpar_hcall(H_XIRR, 0, 0, 0, 0, xirr_ret, &dummy, &dummy); 131 return plpar_hcall(H_XIRR, 0, 0, 0, 0, xirr_ret, &dummy, &dummy);
162} 132}
163 133
164static int pSeriesLP_xirr_info_get(int n_cpu) 134static inline unsigned int lpar_xirr_info_get(int n_cpu)
165{ 135{
166 unsigned long lpar_rc; 136 unsigned long lpar_rc;
167 unsigned long return_value; 137 unsigned long return_value;
@@ -169,10 +139,10 @@ static int pSeriesLP_xirr_info_get(int n_cpu)
169 lpar_rc = plpar_xirr(&return_value); 139 lpar_rc = plpar_xirr(&return_value);
170 if (lpar_rc != H_SUCCESS) 140 if (lpar_rc != H_SUCCESS)
171 panic(" bad return code xirr - rc = %lx \n", lpar_rc); 141 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
172 return (int)return_value; 142 return (unsigned int)return_value;
173} 143}
174 144
175static void pSeriesLP_xirr_info_set(int n_cpu, int value) 145static inline void lpar_xirr_info_set(int n_cpu, int value)
176{ 146{
177 unsigned long lpar_rc; 147 unsigned long lpar_rc;
178 unsigned long val64 = value & 0xffffffff; 148 unsigned long val64 = value & 0xffffffff;
@@ -183,7 +153,7 @@ static void pSeriesLP_xirr_info_set(int n_cpu, int value)
183 val64); 153 val64);
184} 154}
185 155
186void pSeriesLP_cppr_info(int n_cpu, u8 value) 156static inline void lpar_cppr_info(int n_cpu, u8 value)
187{ 157{
188 unsigned long lpar_rc; 158 unsigned long lpar_rc;
189 159
@@ -192,7 +162,7 @@ void pSeriesLP_cppr_info(int n_cpu, u8 value)
192 panic("bad return code cppr - rc = %lx\n", lpar_rc); 162 panic("bad return code cppr - rc = %lx\n", lpar_rc);
193} 163}
194 164
195static void pSeriesLP_qirr_info(int n_cpu , u8 value) 165static inline void lpar_qirr_info(int n_cpu , u8 value)
196{ 166{
197 unsigned long lpar_rc; 167 unsigned long lpar_rc;
198 168
@@ -201,43 +171,16 @@ static void pSeriesLP_qirr_info(int n_cpu , u8 value)
201 panic("bad return code qirr - rc = %lx\n", lpar_rc); 171 panic("bad return code qirr - rc = %lx\n", lpar_rc);
202} 172}
203 173
204xics_ops pSeriesLP_ops = {
205 pSeriesLP_xirr_info_get,
206 pSeriesLP_xirr_info_set,
207 pSeriesLP_cppr_info,
208 pSeriesLP_qirr_info
209};
210
211static unsigned int xics_startup(unsigned int virq)
212{
213 unsigned int irq;
214
215 irq = irq_offset_down(virq);
216 if (radix_tree_insert(&irq_map, virt_irq_to_real(irq),
217 &virt_irq_to_real_map[irq]) == -ENOMEM)
218 printk(KERN_CRIT "Out of memory creating real -> virtual"
219 " IRQ mapping for irq %u (real 0x%x)\n",
220 virq, virt_irq_to_real(irq));
221 xics_enable_irq(virq);
222 return 0; /* return value is ignored */
223}
224 174
225static unsigned int real_irq_to_virt(unsigned int real_irq) 175/* High level handlers and init code */
226{
227 unsigned int *ptr;
228 176
229 ptr = radix_tree_lookup(&irq_map, real_irq);
230 if (ptr == NULL)
231 return NO_IRQ;
232 return ptr - virt_irq_to_real_map;
233}
234 177
235#ifdef CONFIG_SMP 178#ifdef CONFIG_SMP
236static int get_irq_server(unsigned int irq) 179static int get_irq_server(unsigned int virq)
237{ 180{
238 unsigned int server; 181 unsigned int server;
239 /* For the moment only implement delivery to all cpus or one cpu */ 182 /* For the moment only implement delivery to all cpus or one cpu */
240 cpumask_t cpumask = irq_desc[irq].affinity; 183 cpumask_t cpumask = irq_desc[virq].affinity;
241 cpumask_t tmp = CPU_MASK_NONE; 184 cpumask_t tmp = CPU_MASK_NONE;
242 185
243 if (!distribute_irqs) 186 if (!distribute_irqs)
@@ -258,23 +201,28 @@ static int get_irq_server(unsigned int irq)
258 201
259} 202}
260#else 203#else
261static int get_irq_server(unsigned int irq) 204static int get_irq_server(unsigned int virq)
262{ 205{
263 return default_server; 206 return default_server;
264} 207}
265#endif 208#endif
266 209
267static void xics_enable_irq(unsigned int virq) 210
211static void xics_unmask_irq(unsigned int virq)
268{ 212{
269 unsigned int irq; 213 unsigned int irq;
270 int call_status; 214 int call_status;
271 unsigned int server; 215 unsigned int server;
272 216
273 irq = virt_irq_to_real(irq_offset_down(virq)); 217 pr_debug("xics: unmask virq %d\n", virq);
274 if (irq == XICS_IPI) 218
219 irq = (unsigned int)irq_map[virq].hwirq;
220 pr_debug(" -> map to hwirq 0x%x\n", irq);
221 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
275 return; 222 return;
276 223
277 server = get_irq_server(virq); 224 server = get_irq_server(virq);
225
278 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, 226 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
279 DEFAULT_PRIORITY); 227 DEFAULT_PRIORITY);
280 if (call_status != 0) { 228 if (call_status != 0) {
@@ -293,7 +241,7 @@ static void xics_enable_irq(unsigned int virq)
293 } 241 }
294} 242}
295 243
296static void xics_disable_real_irq(unsigned int irq) 244static void xics_mask_real_irq(unsigned int irq)
297{ 245{
298 int call_status; 246 int call_status;
299 unsigned int server; 247 unsigned int server;
@@ -318,75 +266,86 @@ static void xics_disable_real_irq(unsigned int irq)
318 } 266 }
319} 267}
320 268
321static void xics_disable_irq(unsigned int virq) 269static void xics_mask_irq(unsigned int virq)
322{ 270{
323 unsigned int irq; 271 unsigned int irq;
324 272
325 irq = virt_irq_to_real(irq_offset_down(virq)); 273 pr_debug("xics: mask virq %d\n", virq);
326 xics_disable_real_irq(irq); 274
275 irq = (unsigned int)irq_map[virq].hwirq;
276 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
277 return;
278 xics_mask_real_irq(irq);
279}
280
281static unsigned int xics_startup(unsigned int virq)
282{
283 unsigned int irq;
284
285 /* force a reverse mapping of the interrupt so it gets in the cache */
286 irq = (unsigned int)irq_map[virq].hwirq;
287 irq_radix_revmap(xics_host, irq);
288
289 /* unmask it */
290 xics_unmask_irq(virq);
291 return 0;
327} 292}
328 293
329static void xics_end_irq(unsigned int irq) 294static void xics_eoi_direct(unsigned int virq)
330{ 295{
331 int cpu = smp_processor_id(); 296 int cpu = smp_processor_id();
297 unsigned int irq = (unsigned int)irq_map[virq].hwirq;
332 298
333 iosync(); 299 iosync();
334 ops->xirr_info_set(cpu, ((0xff << 24) | 300 direct_xirr_info_set(cpu, (0xff << 24) | irq);
335 (virt_irq_to_real(irq_offset_down(irq)))));
336
337} 301}
338 302
339static void xics_mask_and_ack_irq(unsigned int irq) 303
304static void xics_eoi_lpar(unsigned int virq)
340{ 305{
341 int cpu = smp_processor_id(); 306 int cpu = smp_processor_id();
307 unsigned int irq = (unsigned int)irq_map[virq].hwirq;
342 308
343 if (irq < irq_offset_value()) { 309 iosync();
344 i8259_pic.ack(irq); 310 lpar_xirr_info_set(cpu, (0xff << 24) | irq);
345 iosync();
346 ops->xirr_info_set(cpu, ((0xff<<24) |
347 xics_irq_8259_cascade_real));
348 iosync();
349 }
350} 311}
351 312
352int xics_get_irq(struct pt_regs *regs) 313static inline unsigned int xics_remap_irq(unsigned int vec)
353{ 314{
354 unsigned int cpu = smp_processor_id(); 315 unsigned int irq;
355 unsigned int vec;
356 int irq;
357 316
358 vec = ops->xirr_info_get(cpu);
359 /* (vec >> 24) == old priority */
360 vec &= 0x00ffffff; 317 vec &= 0x00ffffff;
361 318
362 /* for sanity, this had better be < NR_IRQS - 16 */ 319 if (vec == XICS_IRQ_SPURIOUS)
363 if (vec == xics_irq_8259_cascade_real) { 320 return NO_IRQ;
364 irq = i8259_irq(regs); 321 irq = irq_radix_revmap(xics_host, vec);
365 xics_end_irq(irq_offset_up(xics_irq_8259_cascade)); 322 if (likely(irq != NO_IRQ))
366 } else if (vec == XICS_IRQ_SPURIOUS) { 323 return irq;
367 irq = -1; 324
368 } else { 325 printk(KERN_ERR "Interrupt %u (real) is invalid,"
369 irq = real_irq_to_virt(vec); 326 " disabling it.\n", vec);
370 if (irq == NO_IRQ) 327 xics_mask_real_irq(vec);
371 irq = real_irq_to_virt_slowpath(vec); 328 return NO_IRQ;
372 if (irq == NO_IRQ) {
373 printk(KERN_ERR "Interrupt %u (real) is invalid,"
374 " disabling it.\n", vec);
375 xics_disable_real_irq(vec);
376 } else
377 irq = irq_offset_up(irq);
378 }
379 return irq;
380} 329}
381 330
382#ifdef CONFIG_SMP 331static unsigned int xics_get_irq_direct(struct pt_regs *regs)
332{
333 unsigned int cpu = smp_processor_id();
383 334
384static irqreturn_t xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs) 335 return xics_remap_irq(direct_xirr_info_get(cpu));
336}
337
338static unsigned int xics_get_irq_lpar(struct pt_regs *regs)
385{ 339{
386 int cpu = smp_processor_id(); 340 unsigned int cpu = smp_processor_id();
341
342 return xics_remap_irq(lpar_xirr_info_get(cpu));
343}
387 344
388 ops->qirr_info(cpu, 0xff); 345#ifdef CONFIG_SMP
389 346
347static irqreturn_t xics_ipi_dispatch(int cpu, struct pt_regs *regs)
348{
390 WARN_ON(cpu_is_offline(cpu)); 349 WARN_ON(cpu_is_offline(cpu));
391 350
392 while (xics_ipi_message[cpu].value) { 351 while (xics_ipi_message[cpu].value) {
@@ -418,18 +377,88 @@ static irqreturn_t xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
418 return IRQ_HANDLED; 377 return IRQ_HANDLED;
419} 378}
420 379
380static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id, struct pt_regs *regs)
381{
382 int cpu = smp_processor_id();
383
384 direct_qirr_info(cpu, 0xff);
385
386 return xics_ipi_dispatch(cpu, regs);
387}
388
389static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id, struct pt_regs *regs)
390{
391 int cpu = smp_processor_id();
392
393 lpar_qirr_info(cpu, 0xff);
394
395 return xics_ipi_dispatch(cpu, regs);
396}
397
421void xics_cause_IPI(int cpu) 398void xics_cause_IPI(int cpu)
422{ 399{
423 ops->qirr_info(cpu, IPI_PRIORITY); 400 if (firmware_has_feature(FW_FEATURE_LPAR))
401 lpar_qirr_info(cpu, IPI_PRIORITY);
402 else
403 direct_qirr_info(cpu, IPI_PRIORITY);
424} 404}
405
425#endif /* CONFIG_SMP */ 406#endif /* CONFIG_SMP */
426 407
408static void xics_set_cpu_priority(int cpu, unsigned char cppr)
409{
410 if (firmware_has_feature(FW_FEATURE_LPAR))
411 lpar_cppr_info(cpu, cppr);
412 else
413 direct_cppr_info(cpu, cppr);
414 iosync();
415}
416
417static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
418{
419 unsigned int irq;
420 int status;
421 int xics_status[2];
422 unsigned long newmask;
423 cpumask_t tmp = CPU_MASK_NONE;
424
425 irq = (unsigned int)irq_map[virq].hwirq;
426 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
427 return;
428
429 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
430
431 if (status) {
432 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
433 "returns %d\n", irq, status);
434 return;
435 }
436
437 /* For the moment only implement delivery to all cpus or one cpu */
438 if (cpus_equal(cpumask, CPU_MASK_ALL)) {
439 newmask = default_distrib_server;
440 } else {
441 cpus_and(tmp, cpu_online_map, cpumask);
442 if (cpus_empty(tmp))
443 return;
444 newmask = get_hard_smp_processor_id(first_cpu(tmp));
445 }
446
447 status = rtas_call(ibm_set_xive, 3, 1, NULL,
448 irq, newmask, xics_status[1]);
449
450 if (status) {
451 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
452 "returns %d\n", irq, status);
453 return;
454 }
455}
456
427void xics_setup_cpu(void) 457void xics_setup_cpu(void)
428{ 458{
429 int cpu = smp_processor_id(); 459 int cpu = smp_processor_id();
430 460
431 ops->cppr_info(cpu, 0xff); 461 xics_set_cpu_priority(cpu, 0xff);
432 iosync();
433 462
434 /* 463 /*
435 * Put the calling processor into the GIQ. This is really only 464 * Put the calling processor into the GIQ. This is really only
@@ -442,72 +471,266 @@ void xics_setup_cpu(void)
442 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1); 471 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1);
443} 472}
444 473
445void xics_init_IRQ(void) 474
475static struct irq_chip xics_pic_direct = {
476 .typename = " XICS ",
477 .startup = xics_startup,
478 .mask = xics_mask_irq,
479 .unmask = xics_unmask_irq,
480 .eoi = xics_eoi_direct,
481 .set_affinity = xics_set_affinity
482};
483
484
485static struct irq_chip xics_pic_lpar = {
486 .typename = " XICS ",
487 .startup = xics_startup,
488 .mask = xics_mask_irq,
489 .unmask = xics_unmask_irq,
490 .eoi = xics_eoi_lpar,
491 .set_affinity = xics_set_affinity
492};
493
494
495static int xics_host_match(struct irq_host *h, struct device_node *node)
496{
497 /* IBM machines have interrupt parents of various funky types for things
498 * like vdevices, events, etc... The trick we use here is to match
499 * everything here except the legacy 8259 which is compatible "chrp,iic"
500 */
501 return !device_is_compatible(node, "chrp,iic");
502}
503
504static int xics_host_map_direct(struct irq_host *h, unsigned int virq,
505 irq_hw_number_t hw, unsigned int flags)
506{
507 unsigned int sense = flags & IRQ_TYPE_SENSE_MASK;
508
509 pr_debug("xics: map_direct virq %d, hwirq 0x%lx, flags: 0x%x\n",
510 virq, hw, flags);
511
512 if (sense && sense != IRQ_TYPE_LEVEL_LOW)
513 printk(KERN_WARNING "xics: using unsupported sense 0x%x"
514 " for irq %d (h: 0x%lx)\n", flags, virq, hw);
515
516 get_irq_desc(virq)->status |= IRQ_LEVEL;
517 set_irq_chip_and_handler(virq, &xics_pic_direct, handle_fasteoi_irq);
518 return 0;
519}
520
521static int xics_host_map_lpar(struct irq_host *h, unsigned int virq,
522 irq_hw_number_t hw, unsigned int flags)
523{
524 unsigned int sense = flags & IRQ_TYPE_SENSE_MASK;
525
526 pr_debug("xics: map_lpar virq %d, hwirq 0x%lx, flags: 0x%x\n",
527 virq, hw, flags);
528
529 if (sense && sense != IRQ_TYPE_LEVEL_LOW)
530 printk(KERN_WARNING "xics: using unsupported sense 0x%x"
531 " for irq %d (h: 0x%lx)\n", flags, virq, hw);
532
533 get_irq_desc(virq)->status |= IRQ_LEVEL;
534 set_irq_chip_and_handler(virq, &xics_pic_lpar, handle_fasteoi_irq);
535 return 0;
536}
537
538static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
539 u32 *intspec, unsigned int intsize,
540 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
541
542{
543 /* Current xics implementation translates everything
544 * to level. It is not technically right for MSIs but this
545 * is irrelevant at this point. We might get smarter in the future
546 */
547 *out_hwirq = intspec[0];
548 *out_flags = IRQ_TYPE_LEVEL_LOW;
549
550 return 0;
551}
552
553static struct irq_host_ops xics_host_direct_ops = {
554 .match = xics_host_match,
555 .map = xics_host_map_direct,
556 .xlate = xics_host_xlate,
557};
558
559static struct irq_host_ops xics_host_lpar_ops = {
560 .match = xics_host_match,
561 .map = xics_host_map_lpar,
562 .xlate = xics_host_xlate,
563};
564
565static void __init xics_init_host(void)
566{
567 struct irq_host_ops *ops;
568
569 if (firmware_has_feature(FW_FEATURE_LPAR))
570 ops = &xics_host_lpar_ops;
571 else
572 ops = &xics_host_direct_ops;
573 xics_host = irq_alloc_host(IRQ_HOST_MAP_TREE, 0, ops,
574 XICS_IRQ_SPURIOUS);
575 BUG_ON(xics_host == NULL);
576 irq_set_default_host(xics_host);
577}
578
579static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
580 unsigned long size)
446{ 581{
582#ifdef CONFIG_SMP
447 int i; 583 int i;
448 unsigned long intr_size = 0;
449 struct device_node *np;
450 uint *ireg, ilen, indx = 0;
451 unsigned long intr_base = 0;
452 struct xics_interrupt_node {
453 unsigned long addr;
454 unsigned long size;
455 } intnodes[NR_CPUS];
456 584
457 ppc64_boot_msg(0x20, "XICS Init"); 585 /* This may look gross but it's good enough for now, we don't quite
586 * have a hard -> linux processor id matching.
587 */
588 for_each_possible_cpu(i) {
589 if (!cpu_present(i))
590 continue;
591 if (hw_id == get_hard_smp_processor_id(i)) {
592 xics_per_cpu[i] = ioremap(addr, size);
593 return;
594 }
595 }
596#else
597 if (hw_id != 0)
598 return;
599 xics_per_cpu[0] = ioremap(addr, size);
600#endif /* CONFIG_SMP */
601}
458 602
459 ibm_get_xive = rtas_token("ibm,get-xive"); 603static void __init xics_init_one_node(struct device_node *np,
460 ibm_set_xive = rtas_token("ibm,set-xive"); 604 unsigned int *indx)
461 ibm_int_on = rtas_token("ibm,int-on"); 605{
462 ibm_int_off = rtas_token("ibm,int-off"); 606 unsigned int ilen;
607 u32 *ireg;
463 608
464 np = of_find_node_by_type(NULL, "PowerPC-External-Interrupt-Presentation"); 609 /* This code does the theorically broken assumption that the interrupt
465 if (!np) 610 * server numbers are the same as the hard CPU numbers.
466 panic("xics_init_IRQ: can't find interrupt presentation"); 611 * This happens to be the case so far but we are playing with fire...
612 * should be fixed one of these days. -BenH.
613 */
614 ireg = (u32 *)get_property(np, "ibm,interrupt-server-ranges", NULL);
467 615
468nextnode: 616 /* Do that ever happen ? we'll know soon enough... but even good'old
469 ireg = (uint *)get_property(np, "ibm,interrupt-server-ranges", NULL); 617 * f80 does have that property ..
618 */
619 WARN_ON(ireg == NULL);
470 if (ireg) { 620 if (ireg) {
471 /* 621 /*
472 * set node starting index for this node 622 * set node starting index for this node
473 */ 623 */
474 indx = *ireg; 624 *indx = *ireg;
475 } 625 }
476 626 ireg = (u32 *)get_property(np, "reg", &ilen);
477 ireg = (uint *)get_property(np, "reg", &ilen);
478 if (!ireg) 627 if (!ireg)
479 panic("xics_init_IRQ: can't find interrupt reg property"); 628 panic("xics_init_IRQ: can't find interrupt reg property");
480 629
481 while (ilen) { 630 while (ilen >= (4 * sizeof(u32))) {
482 intnodes[indx].addr = (unsigned long)*ireg++ << 32; 631 unsigned long addr, size;
483 ilen -= sizeof(uint); 632
484 intnodes[indx].addr |= *ireg++; 633 /* XXX Use proper OF parsing code here !!! */
485 ilen -= sizeof(uint); 634 addr = (unsigned long)*ireg++ << 32;
486 intnodes[indx].size = (unsigned long)*ireg++ << 32; 635 ilen -= sizeof(u32);
487 ilen -= sizeof(uint); 636 addr |= *ireg++;
488 intnodes[indx].size |= *ireg++; 637 ilen -= sizeof(u32);
489 ilen -= sizeof(uint); 638 size = (unsigned long)*ireg++ << 32;
490 indx++; 639 ilen -= sizeof(u32);
491 if (indx >= NR_CPUS) break; 640 size |= *ireg++;
641 ilen -= sizeof(u32);
642 xics_map_one_cpu(*indx, addr, size);
643 (*indx)++;
644 }
645}
646
647
648static void __init xics_setup_8259_cascade(void)
649{
650 struct device_node *np, *old, *found = NULL;
651 int cascade, naddr;
652 u32 *addrp;
653 unsigned long intack = 0;
654
655 for_each_node_by_type(np, "interrupt-controller")
656 if (device_is_compatible(np, "chrp,iic")) {
657 found = np;
658 break;
659 }
660 if (found == NULL) {
661 printk(KERN_DEBUG "xics: no ISA interrupt controller\n");
662 return;
663 }
664 cascade = irq_of_parse_and_map(found, 0);
665 if (cascade == NO_IRQ) {
666 printk(KERN_ERR "xics: failed to map cascade interrupt");
667 return;
668 }
669 pr_debug("xics: cascade mapped to irq %d\n", cascade);
670
671 for (old = of_node_get(found); old != NULL ; old = np) {
672 np = of_get_parent(old);
673 of_node_put(old);
674 if (np == NULL)
675 break;
676 if (strcmp(np->name, "pci") != 0)
677 continue;
678 addrp = (u32 *)get_property(np, "8259-interrupt-acknowledge", NULL);
679 if (addrp == NULL)
680 continue;
681 naddr = prom_n_addr_cells(np);
682 intack = addrp[naddr-1];
683 if (naddr > 1)
684 intack |= ((unsigned long)addrp[naddr-2]) << 32;
685 }
686 if (intack)
687 printk(KERN_DEBUG "xics: PCI 8259 intack at 0x%016lx\n", intack);
688 i8259_init(found, intack);
689 of_node_put(found);
690 set_irq_chained_handler(cascade, pseries_8259_cascade);
691}
692
693void __init xics_init_IRQ(void)
694{
695 int i;
696 struct device_node *np;
697 u32 *ireg, ilen, indx = 0;
698 int found = 0;
699
700 ppc64_boot_msg(0x20, "XICS Init");
701
702 ibm_get_xive = rtas_token("ibm,get-xive");
703 ibm_set_xive = rtas_token("ibm,set-xive");
704 ibm_int_on = rtas_token("ibm,int-on");
705 ibm_int_off = rtas_token("ibm,int-off");
706
707 for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
708 found = 1;
709 if (firmware_has_feature(FW_FEATURE_LPAR))
710 break;
711 xics_init_one_node(np, &indx);
492 } 712 }
713 if (found == 0)
714 return;
493 715
494 np = of_find_node_by_type(np, "PowerPC-External-Interrupt-Presentation"); 716 xics_init_host();
495 if ((indx < NR_CPUS) && np) goto nextnode;
496 717
497 /* Find the server numbers for the boot cpu. */ 718 /* Find the server numbers for the boot cpu. */
498 for (np = of_find_node_by_type(NULL, "cpu"); 719 for (np = of_find_node_by_type(NULL, "cpu");
499 np; 720 np;
500 np = of_find_node_by_type(np, "cpu")) { 721 np = of_find_node_by_type(np, "cpu")) {
501 ireg = (uint *)get_property(np, "reg", &ilen); 722 ireg = (u32 *)get_property(np, "reg", &ilen);
502 if (ireg && ireg[0] == get_hard_smp_processor_id(boot_cpuid)) { 723 if (ireg && ireg[0] == get_hard_smp_processor_id(boot_cpuid)) {
503 ireg = (uint *)get_property(np, "ibm,ppc-interrupt-gserver#s", 724 ireg = (u32 *)get_property(np,
504 &ilen); 725 "ibm,ppc-interrupt-gserver#s",
726 &ilen);
505 i = ilen / sizeof(int); 727 i = ilen / sizeof(int);
506 if (ireg && i > 0) { 728 if (ireg && i > 0) {
507 default_server = ireg[0]; 729 default_server = ireg[0];
508 default_distrib_server = ireg[i-1]; /* take last element */ 730 /* take last element */
731 default_distrib_server = ireg[i-1];
509 } 732 }
510 ireg = (uint *)get_property(np, 733 ireg = (u32 *)get_property(np,
511 "ibm,interrupt-server#-size", NULL); 734 "ibm,interrupt-server#-size", NULL);
512 if (ireg) 735 if (ireg)
513 interrupt_server_size = *ireg; 736 interrupt_server_size = *ireg;
@@ -516,132 +739,48 @@ nextnode:
516 } 739 }
517 of_node_put(np); 740 of_node_put(np);
518 741
519 intr_base = intnodes[0].addr;
520 intr_size = intnodes[0].size;
521
522 np = of_find_node_by_type(NULL, "interrupt-controller");
523 if (!np) {
524 printk(KERN_DEBUG "xics: no ISA interrupt controller\n");
525 xics_irq_8259_cascade_real = -1;
526 xics_irq_8259_cascade = -1;
527 } else {
528 ireg = (uint *) get_property(np, "interrupts", NULL);
529 if (!ireg)
530 panic("xics_init_IRQ: can't find ISA interrupts property");
531
532 xics_irq_8259_cascade_real = *ireg;
533 xics_irq_8259_cascade
534 = virt_irq_create_mapping(xics_irq_8259_cascade_real);
535 i8259_init(0, 0);
536 of_node_put(np);
537 }
538
539 if (firmware_has_feature(FW_FEATURE_LPAR)) 742 if (firmware_has_feature(FW_FEATURE_LPAR))
540 ops = &pSeriesLP_ops; 743 ppc_md.get_irq = xics_get_irq_lpar;
541 else { 744 else
542#ifdef CONFIG_SMP 745 ppc_md.get_irq = xics_get_irq_direct;
543 for_each_possible_cpu(i) {
544 int hard_id;
545
546 /* FIXME: Do this dynamically! --RR */
547 if (!cpu_present(i))
548 continue;
549
550 hard_id = get_hard_smp_processor_id(i);
551 xics_per_cpu[i] = ioremap(intnodes[hard_id].addr,
552 intnodes[hard_id].size);
553 }
554#else
555 xics_per_cpu[0] = ioremap(intr_base, intr_size);
556#endif /* CONFIG_SMP */
557 }
558
559 for (i = irq_offset_value(); i < NR_IRQS; ++i)
560 get_irq_desc(i)->chip = &xics_pic;
561 746
562 xics_setup_cpu(); 747 xics_setup_cpu();
563 748
749 xics_setup_8259_cascade();
750
564 ppc64_boot_msg(0x21, "XICS Done"); 751 ppc64_boot_msg(0x21, "XICS Done");
565} 752}
566 753
567/*
568 * We cant do this in init_IRQ because we need the memory subsystem up for
569 * request_irq()
570 */
571static int __init xics_setup_i8259(void)
572{
573 if (ppc64_interrupt_controller == IC_PPC_XIC &&
574 xics_irq_8259_cascade != -1) {
575 if (request_irq(irq_offset_up(xics_irq_8259_cascade),
576 no_action, 0, "8259 cascade", NULL))
577 printk(KERN_ERR "xics_setup_i8259: couldn't get 8259 "
578 "cascade\n");
579 }
580 return 0;
581}
582arch_initcall(xics_setup_i8259);
583 754
584#ifdef CONFIG_SMP 755#ifdef CONFIG_SMP
585void xics_request_IPIs(void) 756void xics_request_IPIs(void)
586{ 757{
587 virt_irq_to_real_map[XICS_IPI] = XICS_IPI; 758 unsigned int ipi;
588 759
589 /* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */ 760 ipi = irq_create_mapping(xics_host, XICS_IPI, 0);
590 request_irq(irq_offset_up(XICS_IPI), xics_ipi_action, SA_INTERRUPT, 761 BUG_ON(ipi == NO_IRQ);
591 "IPI", NULL);
592 get_irq_desc(irq_offset_up(XICS_IPI))->status |= IRQ_PER_CPU;
593}
594#endif
595
596static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
597{
598 unsigned int irq;
599 int status;
600 int xics_status[2];
601 unsigned long newmask;
602 cpumask_t tmp = CPU_MASK_NONE;
603
604 irq = virt_irq_to_real(irq_offset_down(virq));
605 if (irq == XICS_IPI || irq == NO_IRQ)
606 return;
607
608 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
609 762
610 if (status) { 763 /*
611 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive " 764 * IPIs are marked IRQF_DISABLED as they must run with irqs
612 "returns %d\n", irq, status); 765 * disabled
613 return; 766 */
614 } 767 set_irq_handler(ipi, handle_percpu_irq);
615 768 if (firmware_has_feature(FW_FEATURE_LPAR))
616 /* For the moment only implement delivery to all cpus or one cpu */ 769 request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED,
617 if (cpus_equal(cpumask, CPU_MASK_ALL)) { 770 "IPI", NULL);
618 newmask = default_distrib_server; 771 else
619 } else { 772 request_irq(ipi, xics_ipi_action_direct, IRQF_DISABLED,
620 cpus_and(tmp, cpu_online_map, cpumask); 773 "IPI", NULL);
621 if (cpus_empty(tmp))
622 return;
623 newmask = get_hard_smp_processor_id(first_cpu(tmp));
624 }
625
626 status = rtas_call(ibm_set_xive, 3, 1, NULL,
627 irq, newmask, xics_status[1]);
628
629 if (status) {
630 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
631 "returns %d\n", irq, status);
632 return;
633 }
634} 774}
775#endif /* CONFIG_SMP */
635 776
636void xics_teardown_cpu(int secondary) 777void xics_teardown_cpu(int secondary)
637{ 778{
638 int cpu = smp_processor_id(); 779 int cpu = smp_processor_id();
780 unsigned int ipi;
781 struct irq_desc *desc;
639 782
640 ops->cppr_info(cpu, 0x00); 783 xics_set_cpu_priority(cpu, 0);
641 iosync();
642
643 /* Clear IPI */
644 ops->qirr_info(cpu, 0xff);
645 784
646 /* 785 /*
647 * we need to EOI the IPI if we got here from kexec down IPI 786 * we need to EOI the IPI if we got here from kexec down IPI
@@ -650,7 +789,13 @@ void xics_teardown_cpu(int secondary)
650 * should we be flagging idle loop instead? 789 * should we be flagging idle loop instead?
651 * or creating some task to be scheduled? 790 * or creating some task to be scheduled?
652 */ 791 */
653 ops->xirr_info_set(cpu, XICS_IPI); 792
793 ipi = irq_find_mapping(xics_host, XICS_IPI);
794 if (ipi == XICS_IRQ_SPURIOUS)
795 return;
796 desc = get_irq_desc(ipi);
797 if (desc->chip && desc->chip->eoi)
798 desc->chip->eoi(XICS_IPI);
654 799
655 /* 800 /*
656 * Some machines need to have at least one cpu in the GIQ, 801 * Some machines need to have at least one cpu in the GIQ,
@@ -658,8 +803,8 @@ void xics_teardown_cpu(int secondary)
658 */ 803 */
659 if (secondary) 804 if (secondary)
660 rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, 805 rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
661 (1UL << interrupt_server_size) - 1 - 806 (1UL << interrupt_server_size) - 1 -
662 default_distrib_server, 0); 807 default_distrib_server, 0);
663} 808}
664 809
665#ifdef CONFIG_HOTPLUG_CPU 810#ifdef CONFIG_HOTPLUG_CPU
@@ -671,8 +816,7 @@ void xics_migrate_irqs_away(void)
671 unsigned int irq, virq, cpu = smp_processor_id(); 816 unsigned int irq, virq, cpu = smp_processor_id();
672 817
673 /* Reject any interrupt that was queued to us... */ 818 /* Reject any interrupt that was queued to us... */
674 ops->cppr_info(cpu, 0); 819 xics_set_cpu_priority(cpu, 0);
675 iosync();
676 820
677 /* remove ourselves from the global interrupt queue */ 821 /* remove ourselves from the global interrupt queue */
678 status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, 822 status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
@@ -680,24 +824,23 @@ void xics_migrate_irqs_away(void)
680 WARN_ON(status < 0); 824 WARN_ON(status < 0);
681 825
682 /* Allow IPIs again... */ 826 /* Allow IPIs again... */
683 ops->cppr_info(cpu, DEFAULT_PRIORITY); 827 xics_set_cpu_priority(cpu, DEFAULT_PRIORITY);
684 iosync();
685 828
686 for_each_irq(virq) { 829 for_each_irq(virq) {
687 irq_desc_t *desc; 830 struct irq_desc *desc;
688 int xics_status[2]; 831 int xics_status[2];
689 unsigned long flags; 832 unsigned long flags;
690 833
691 /* We cant set affinity on ISA interrupts */ 834 /* We cant set affinity on ISA interrupts */
692 if (virq < irq_offset_value()) 835 if (virq < NUM_ISA_INTERRUPTS)
693 continue; 836 continue;
694 837 if (irq_map[virq].host != xics_host)
695 desc = get_irq_desc(virq); 838 continue;
696 irq = virt_irq_to_real(irq_offset_down(virq)); 839 irq = (unsigned int)irq_map[virq].hwirq;
697
698 /* We need to get IPIs still. */ 840 /* We need to get IPIs still. */
699 if (irq == XICS_IPI || irq == NO_IRQ) 841 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
700 continue; 842 continue;
843 desc = get_irq_desc(virq);
701 844
702 /* We only need to migrate enabled IRQS */ 845 /* We only need to migrate enabled IRQS */
703 if (desc == NULL || desc->chip == NULL 846 if (desc == NULL || desc->chip == NULL
diff --git a/arch/powerpc/platforms/pseries/xics.h b/arch/powerpc/platforms/pseries/xics.h
index e14c70868f1d..6ee1055b0ffb 100644
--- a/arch/powerpc/platforms/pseries/xics.h
+++ b/arch/powerpc/platforms/pseries/xics.h
@@ -14,13 +14,12 @@
14 14
15#include <linux/cache.h> 15#include <linux/cache.h>
16 16
17void xics_init_IRQ(void); 17extern void xics_init_IRQ(void);
18int xics_get_irq(struct pt_regs *); 18extern void xics_setup_cpu(void);
19void xics_setup_cpu(void); 19extern void xics_teardown_cpu(int secondary);
20void xics_teardown_cpu(int secondary); 20extern void xics_cause_IPI(int cpu);
21void xics_cause_IPI(int cpu); 21extern void xics_request_IPIs(void);
22void xics_request_IPIs(void); 22extern void xics_migrate_irqs_away(void);
23void xics_migrate_irqs_away(void);
24 23
25/* first argument is ignored for now*/ 24/* first argument is ignored for now*/
26void pSeriesLP_cppr_info(int n_cpu, u8 value); 25void pSeriesLP_cppr_info(int n_cpu, u8 value);
@@ -31,4 +30,8 @@ struct xics_ipi_struct {
31 30
32extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned; 31extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
33 32
33struct irq_desc;
34extern void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc,
35 struct pt_regs *regs);
36
34#endif /* _POWERPC_KERNEL_XICS_H */ 37#endif /* _POWERPC_KERNEL_XICS_H */
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 054bd8b41ef5..cebfae242602 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -4,7 +4,6 @@ endif
4 4
5obj-$(CONFIG_MPIC) += mpic.o 5obj-$(CONFIG_MPIC) += mpic.o
6obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o 6obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
7obj-$(CONFIG_PPC_I8259) += i8259.o
8obj-$(CONFIG_PPC_MPC106) += grackle.o 7obj-$(CONFIG_PPC_MPC106) += grackle.o
9obj-$(CONFIG_BOOKE) += dcr.o 8obj-$(CONFIG_BOOKE) += dcr.o
10obj-$(CONFIG_40x) += dcr.o 9obj-$(CONFIG_40x) += dcr.o
@@ -14,3 +13,7 @@ obj-$(CONFIG_PPC_83xx) += ipic.o
14obj-$(CONFIG_FSL_SOC) += fsl_soc.o 13obj-$(CONFIG_FSL_SOC) += fsl_soc.o
15obj-$(CONFIG_PPC_TODC) += todc.o 14obj-$(CONFIG_PPC_TODC) += todc.o
16obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o 15obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
16
17ifeq ($(CONFIG_PPC_MERGE),y)
18obj-$(CONFIG_PPC_I8259) += i8259.o
19 endif
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index 2bff30f6d635..72c73a6105cd 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -6,11 +6,16 @@
6 * as published by the Free Software Foundation; either version 6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version. 7 * 2 of the License, or (at your option) any later version.
8 */ 8 */
9#undef DEBUG
10
9#include <linux/init.h> 11#include <linux/init.h>
10#include <linux/ioport.h> 12#include <linux/ioport.h>
11#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/kernel.h>
15#include <linux/delay.h>
12#include <asm/io.h> 16#include <asm/io.h>
13#include <asm/i8259.h> 17#include <asm/i8259.h>
18#include <asm/prom.h>
14 19
15static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */ 20static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */
16 21
@@ -20,7 +25,8 @@ static unsigned char cached_8259[2] = { 0xff, 0xff };
20 25
21static DEFINE_SPINLOCK(i8259_lock); 26static DEFINE_SPINLOCK(i8259_lock);
22 27
23static int i8259_pic_irq_offset; 28static struct device_node *i8259_node;
29static struct irq_host *i8259_host;
24 30
25/* 31/*
26 * Acknowledge the IRQ using either the PCI host bridge's interrupt 32 * Acknowledge the IRQ using either the PCI host bridge's interrupt
@@ -28,16 +34,18 @@ static int i8259_pic_irq_offset;
28 * which is called. It should be noted that polling is broken on some 34 * which is called. It should be noted that polling is broken on some
29 * IBM and Motorola PReP boxes so we must use the int-ack feature on them. 35 * IBM and Motorola PReP boxes so we must use the int-ack feature on them.
30 */ 36 */
31int i8259_irq(struct pt_regs *regs) 37unsigned int i8259_irq(struct pt_regs *regs)
32{ 38{
33 int irq; 39 int irq;
34 40 int lock = 0;
35 spin_lock(&i8259_lock);
36 41
37 /* Either int-ack or poll for the IRQ */ 42 /* Either int-ack or poll for the IRQ */
38 if (pci_intack) 43 if (pci_intack)
39 irq = readb(pci_intack); 44 irq = readb(pci_intack);
40 else { 45 else {
46 spin_lock(&i8259_lock);
47 lock = 1;
48
41 /* Perform an interrupt acknowledge cycle on controller 1. */ 49 /* Perform an interrupt acknowledge cycle on controller 1. */
42 outb(0x0C, 0x20); /* prepare for poll */ 50 outb(0x0C, 0x20); /* prepare for poll */
43 irq = inb(0x20) & 7; 51 irq = inb(0x20) & 7;
@@ -62,16 +70,13 @@ int i8259_irq(struct pt_regs *regs)
62 if (!pci_intack) 70 if (!pci_intack)
63 outb(0x0B, 0x20); /* ISR register */ 71 outb(0x0B, 0x20); /* ISR register */
64 if(~inb(0x20) & 0x80) 72 if(~inb(0x20) & 0x80)
65 irq = -1; 73 irq = NO_IRQ;
66 } 74 } else if (irq == 0xff)
75 irq = NO_IRQ;
67 76
68 spin_unlock(&i8259_lock); 77 if (lock)
69 return irq + i8259_pic_irq_offset; 78 spin_unlock(&i8259_lock);
70} 79 return irq;
71
72int i8259_irq_cascade(struct pt_regs *regs, void *unused)
73{
74 return i8259_irq(regs);
75} 80}
76 81
77static void i8259_mask_and_ack_irq(unsigned int irq_nr) 82static void i8259_mask_and_ack_irq(unsigned int irq_nr)
@@ -79,7 +84,6 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr)
79 unsigned long flags; 84 unsigned long flags;
80 85
81 spin_lock_irqsave(&i8259_lock, flags); 86 spin_lock_irqsave(&i8259_lock, flags);
82 irq_nr -= i8259_pic_irq_offset;
83 if (irq_nr > 7) { 87 if (irq_nr > 7) {
84 cached_A1 |= 1 << (irq_nr-8); 88 cached_A1 |= 1 << (irq_nr-8);
85 inb(0xA1); /* DUMMY */ 89 inb(0xA1); /* DUMMY */
@@ -105,8 +109,9 @@ static void i8259_mask_irq(unsigned int irq_nr)
105{ 109{
106 unsigned long flags; 110 unsigned long flags;
107 111
112 pr_debug("i8259_mask_irq(%d)\n", irq_nr);
113
108 spin_lock_irqsave(&i8259_lock, flags); 114 spin_lock_irqsave(&i8259_lock, flags);
109 irq_nr -= i8259_pic_irq_offset;
110 if (irq_nr < 8) 115 if (irq_nr < 8)
111 cached_21 |= 1 << irq_nr; 116 cached_21 |= 1 << irq_nr;
112 else 117 else
@@ -119,8 +124,9 @@ static void i8259_unmask_irq(unsigned int irq_nr)
119{ 124{
120 unsigned long flags; 125 unsigned long flags;
121 126
127 pr_debug("i8259_unmask_irq(%d)\n", irq_nr);
128
122 spin_lock_irqsave(&i8259_lock, flags); 129 spin_lock_irqsave(&i8259_lock, flags);
123 irq_nr -= i8259_pic_irq_offset;
124 if (irq_nr < 8) 130 if (irq_nr < 8)
125 cached_21 &= ~(1 << irq_nr); 131 cached_21 &= ~(1 << irq_nr);
126 else 132 else
@@ -129,19 +135,11 @@ static void i8259_unmask_irq(unsigned int irq_nr)
129 spin_unlock_irqrestore(&i8259_lock, flags); 135 spin_unlock_irqrestore(&i8259_lock, flags);
130} 136}
131 137
132static void i8259_end_irq(unsigned int irq) 138static struct irq_chip i8259_pic = {
133{ 139 .typename = " i8259 ",
134 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) 140 .mask = i8259_mask_irq,
135 && irq_desc[irq].action) 141 .unmask = i8259_unmask_irq,
136 i8259_unmask_irq(irq); 142 .mask_ack = i8259_mask_and_ack_irq,
137}
138
139struct hw_interrupt_type i8259_pic = {
140 .typename = " i8259 ",
141 .enable = i8259_unmask_irq,
142 .disable = i8259_mask_irq,
143 .ack = i8259_mask_and_ack_irq,
144 .end = i8259_end_irq,
145}; 143};
146 144
147static struct resource pic1_iores = { 145static struct resource pic1_iores = {
@@ -165,25 +163,84 @@ static struct resource pic_edgectrl_iores = {
165 .flags = IORESOURCE_BUSY, 163 .flags = IORESOURCE_BUSY,
166}; 164};
167 165
168static struct irqaction i8259_irqaction = { 166static int i8259_host_match(struct irq_host *h, struct device_node *node)
169 .handler = no_action, 167{
170 .flags = SA_INTERRUPT, 168 return i8259_node == NULL || i8259_node == node;
171 .mask = CPU_MASK_NONE, 169}
172 .name = "82c59 secondary cascade", 170
171static int i8259_host_map(struct irq_host *h, unsigned int virq,
172 irq_hw_number_t hw, unsigned int flags)
173{
174 pr_debug("i8259_host_map(%d, 0x%lx)\n", virq, hw);
175
176 /* We block the internal cascade */
177 if (hw == 2)
178 get_irq_desc(virq)->status |= IRQ_NOREQUEST;
179
180 /* We use the level stuff only for now, we might want to
181 * be more cautious here but that works for now
182 */
183 get_irq_desc(virq)->status |= IRQ_LEVEL;
184 set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq);
185 return 0;
186}
187
188static void i8259_host_unmap(struct irq_host *h, unsigned int virq)
189{
190 /* Make sure irq is masked in hardware */
191 i8259_mask_irq(virq);
192
193 /* remove chip and handler */
194 set_irq_chip_and_handler(virq, NULL, NULL);
195
196 /* Make sure it's completed */
197 synchronize_irq(virq);
198}
199
200static int i8259_host_xlate(struct irq_host *h, struct device_node *ct,
201 u32 *intspec, unsigned int intsize,
202 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
203{
204 static unsigned char map_isa_senses[4] = {
205 IRQ_TYPE_LEVEL_LOW,
206 IRQ_TYPE_LEVEL_HIGH,
207 IRQ_TYPE_EDGE_FALLING,
208 IRQ_TYPE_EDGE_RISING,
209 };
210
211 *out_hwirq = intspec[0];
212 if (intsize > 1 && intspec[1] < 4)
213 *out_flags = map_isa_senses[intspec[1]];
214 else
215 *out_flags = IRQ_TYPE_NONE;
216
217 return 0;
218}
219
220static struct irq_host_ops i8259_host_ops = {
221 .match = i8259_host_match,
222 .map = i8259_host_map,
223 .unmap = i8259_host_unmap,
224 .xlate = i8259_host_xlate,
173}; 225};
174 226
175/* 227/****
176 * i8259_init() 228 * i8259_init - Initialize the legacy controller
177 * intack_addr - PCI interrupt acknowledge (real) address which will return 229 * @node: device node of the legacy PIC (can be NULL, but then, it will match
178 * the active irq from the 8259 230 * all interrupts, so beware)
231 * @intack_addr: PCI interrupt acknowledge (real) address which will return
232 * the active irq from the 8259
179 */ 233 */
180void __init i8259_init(unsigned long intack_addr, int offset) 234void i8259_init(struct device_node *node, unsigned long intack_addr)
181{ 235{
182 unsigned long flags; 236 unsigned long flags;
183 int i;
184 237
238 /* initialize the controller */
185 spin_lock_irqsave(&i8259_lock, flags); 239 spin_lock_irqsave(&i8259_lock, flags);
186 i8259_pic_irq_offset = offset; 240
241 /* Mask all first */
242 outb(0xff, 0xA1);
243 outb(0xff, 0x21);
187 244
188 /* init master interrupt controller */ 245 /* init master interrupt controller */
189 outb(0x11, 0x20); /* Start init sequence */ 246 outb(0x11, 0x20); /* Start init sequence */
@@ -197,21 +254,36 @@ void __init i8259_init(unsigned long intack_addr, int offset)
197 outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */ 254 outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */
198 outb(0x01, 0xA1); /* Select 8086 mode */ 255 outb(0x01, 0xA1); /* Select 8086 mode */
199 256
257 /* That thing is slow */
258 udelay(100);
259
200 /* always read ISR */ 260 /* always read ISR */
201 outb(0x0B, 0x20); 261 outb(0x0B, 0x20);
202 outb(0x0B, 0xA0); 262 outb(0x0B, 0xA0);
203 263
204 /* Mask all interrupts */ 264 /* Unmask the internal cascade */
265 cached_21 &= ~(1 << 2);
266
267 /* Set interrupt masks */
205 outb(cached_A1, 0xA1); 268 outb(cached_A1, 0xA1);
206 outb(cached_21, 0x21); 269 outb(cached_21, 0x21);
207 270
208 spin_unlock_irqrestore(&i8259_lock, flags); 271 spin_unlock_irqrestore(&i8259_lock, flags);
209 272
210 for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) 273 /* create a legacy host */
211 irq_desc[offset + i].chip = &i8259_pic; 274 if (node)
275 i8259_node = of_node_get(node);
276 i8259_host = irq_alloc_host(IRQ_HOST_MAP_LEGACY, 0, &i8259_host_ops, 0);
277 if (i8259_host == NULL) {
278 printk(KERN_ERR "i8259: failed to allocate irq host !\n");
279 return;
280 }
212 281
213 /* reserve our resources */ 282 /* reserve our resources */
214 setup_irq(offset + 2, &i8259_irqaction); 283 /* XXX should we continue doing that ? it seems to cause problems
284 * with further requesting of PCI IO resources for that range...
285 * need to look into it.
286 */
215 request_resource(&ioport_resource, &pic1_iores); 287 request_resource(&ioport_resource, &pic1_iores);
216 request_resource(&ioport_resource, &pic2_iores); 288 request_resource(&ioport_resource, &pic2_iores);
217 request_resource(&ioport_resource, &pic_edgectrl_iores); 289 request_resource(&ioport_resource, &pic_edgectrl_iores);
@@ -219,4 +291,5 @@ void __init i8259_init(unsigned long intack_addr, int offset)
219 if (intack_addr != 0) 291 if (intack_addr != 0)
220 pci_intack = ioremap(intack_addr, 1); 292 pci_intack = ioremap(intack_addr, 1);
221 293
294 printk(KERN_INFO "i8259 legacy interrupt controller initialized\n");
222} 295}
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 63ff89575cbb..7d31d7cc392d 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -100,8 +100,8 @@ static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg)
100 100
101 if (mpic->flags & MPIC_PRIMARY) 101 if (mpic->flags & MPIC_PRIMARY)
102 cpu = hard_smp_processor_id(); 102 cpu = hard_smp_processor_id();
103 103 return _mpic_read(mpic->flags & MPIC_BIG_ENDIAN,
104 return _mpic_read(mpic->flags & MPIC_BIG_ENDIAN, mpic->cpuregs[cpu], reg); 104 mpic->cpuregs[cpu], reg);
105} 105}
106 106
107static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value) 107static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value)
@@ -340,27 +340,19 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
340#endif /* CONFIG_MPIC_BROKEN_U3 */ 340#endif /* CONFIG_MPIC_BROKEN_U3 */
341 341
342 342
343#define mpic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
344
343/* Find an mpic associated with a given linux interrupt */ 345/* Find an mpic associated with a given linux interrupt */
344static struct mpic *mpic_find(unsigned int irq, unsigned int *is_ipi) 346static struct mpic *mpic_find(unsigned int irq, unsigned int *is_ipi)
345{ 347{
346 struct mpic *mpic = mpics; 348 unsigned int src = mpic_irq_to_hw(irq);
347 349
348 while(mpic) { 350 if (irq < NUM_ISA_INTERRUPTS)
349 /* search IPIs first since they may override the main interrupts */ 351 return NULL;
350 if (irq >= mpic->ipi_offset && irq < (mpic->ipi_offset + 4)) { 352 if (is_ipi)
351 if (is_ipi) 353 *is_ipi = (src >= MPIC_VEC_IPI_0 && src <= MPIC_VEC_IPI_3);
352 *is_ipi = 1; 354
353 return mpic; 355 return irq_desc[irq].chip_data;
354 }
355 if (irq >= mpic->irq_offset &&
356 irq < (mpic->irq_offset + mpic->irq_count)) {
357 if (is_ipi)
358 *is_ipi = 0;
359 return mpic;
360 }
361 mpic = mpic -> next;
362 }
363 return NULL;
364} 356}
365 357
366/* Convert a cpu mask from logical to physical cpu numbers. */ 358/* Convert a cpu mask from logical to physical cpu numbers. */
@@ -378,14 +370,14 @@ static inline u32 mpic_physmask(u32 cpumask)
378/* Get the mpic structure from the IPI number */ 370/* Get the mpic structure from the IPI number */
379static inline struct mpic * mpic_from_ipi(unsigned int ipi) 371static inline struct mpic * mpic_from_ipi(unsigned int ipi)
380{ 372{
381 return container_of(irq_desc[ipi].chip, struct mpic, hc_ipi); 373 return irq_desc[ipi].chip_data;
382} 374}
383#endif 375#endif
384 376
385/* Get the mpic structure from the irq number */ 377/* Get the mpic structure from the irq number */
386static inline struct mpic * mpic_from_irq(unsigned int irq) 378static inline struct mpic * mpic_from_irq(unsigned int irq)
387{ 379{
388 return container_of(irq_desc[irq].chip, struct mpic, hc_irq); 380 return irq_desc[irq].chip_data;
389} 381}
390 382
391/* Send an EOI */ 383/* Send an EOI */
@@ -398,9 +390,7 @@ static inline void mpic_eoi(struct mpic *mpic)
398#ifdef CONFIG_SMP 390#ifdef CONFIG_SMP
399static irqreturn_t mpic_ipi_action(int irq, void *dev_id, struct pt_regs *regs) 391static irqreturn_t mpic_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
400{ 392{
401 struct mpic *mpic = dev_id; 393 smp_message_recv(mpic_irq_to_hw(irq) - MPIC_VEC_IPI_0, regs);
402
403 smp_message_recv(irq - mpic->ipi_offset, regs);
404 return IRQ_HANDLED; 394 return IRQ_HANDLED;
405} 395}
406#endif /* CONFIG_SMP */ 396#endif /* CONFIG_SMP */
@@ -410,11 +400,11 @@ static irqreturn_t mpic_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
410 */ 400 */
411 401
412 402
413static void mpic_enable_irq(unsigned int irq) 403static void mpic_unmask_irq(unsigned int irq)
414{ 404{
415 unsigned int loops = 100000; 405 unsigned int loops = 100000;
416 struct mpic *mpic = mpic_from_irq(irq); 406 struct mpic *mpic = mpic_from_irq(irq);
417 unsigned int src = irq - mpic->irq_offset; 407 unsigned int src = mpic_irq_to_hw(irq);
418 408
419 DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); 409 DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
420 410
@@ -429,39 +419,13 @@ static void mpic_enable_irq(unsigned int irq)
429 break; 419 break;
430 } 420 }
431 } while(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK); 421 } while(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK);
432
433#ifdef CONFIG_MPIC_BROKEN_U3
434 if (mpic->flags & MPIC_BROKEN_U3) {
435 unsigned int src = irq - mpic->irq_offset;
436 if (mpic_is_ht_interrupt(mpic, src) &&
437 (irq_desc[irq].status & IRQ_LEVEL))
438 mpic_ht_end_irq(mpic, src);
439 }
440#endif /* CONFIG_MPIC_BROKEN_U3 */
441}
442
443static unsigned int mpic_startup_irq(unsigned int irq)
444{
445#ifdef CONFIG_MPIC_BROKEN_U3
446 struct mpic *mpic = mpic_from_irq(irq);
447 unsigned int src = irq - mpic->irq_offset;
448#endif /* CONFIG_MPIC_BROKEN_U3 */
449
450 mpic_enable_irq(irq);
451
452#ifdef CONFIG_MPIC_BROKEN_U3
453 if (mpic_is_ht_interrupt(mpic, src))
454 mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status);
455#endif /* CONFIG_MPIC_BROKEN_U3 */
456
457 return 0;
458} 422}
459 423
460static void mpic_disable_irq(unsigned int irq) 424static void mpic_mask_irq(unsigned int irq)
461{ 425{
462 unsigned int loops = 100000; 426 unsigned int loops = 100000;
463 struct mpic *mpic = mpic_from_irq(irq); 427 struct mpic *mpic = mpic_from_irq(irq);
464 unsigned int src = irq - mpic->irq_offset; 428 unsigned int src = mpic_irq_to_hw(irq);
465 429
466 DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); 430 DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src);
467 431
@@ -478,23 +442,58 @@ static void mpic_disable_irq(unsigned int irq)
478 } while(!(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK)); 442 } while(!(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK));
479} 443}
480 444
481static void mpic_shutdown_irq(unsigned int irq) 445static void mpic_end_irq(unsigned int irq)
482{ 446{
447 struct mpic *mpic = mpic_from_irq(irq);
448
449#ifdef DEBUG_IRQ
450 DBG("%s: end_irq: %d\n", mpic->name, irq);
451#endif
452 /* We always EOI on end_irq() even for edge interrupts since that
453 * should only lower the priority, the MPIC should have properly
454 * latched another edge interrupt coming in anyway
455 */
456
457 mpic_eoi(mpic);
458}
459
483#ifdef CONFIG_MPIC_BROKEN_U3 460#ifdef CONFIG_MPIC_BROKEN_U3
461
462static void mpic_unmask_ht_irq(unsigned int irq)
463{
484 struct mpic *mpic = mpic_from_irq(irq); 464 struct mpic *mpic = mpic_from_irq(irq);
485 unsigned int src = irq - mpic->irq_offset; 465 unsigned int src = mpic_irq_to_hw(irq);
486 466
487 if (mpic_is_ht_interrupt(mpic, src)) 467 mpic_unmask_irq(irq);
488 mpic_shutdown_ht_interrupt(mpic, src, irq_desc[irq].status);
489 468
490#endif /* CONFIG_MPIC_BROKEN_U3 */ 469 if (irq_desc[irq].status & IRQ_LEVEL)
470 mpic_ht_end_irq(mpic, src);
471}
472
473static unsigned int mpic_startup_ht_irq(unsigned int irq)
474{
475 struct mpic *mpic = mpic_from_irq(irq);
476 unsigned int src = mpic_irq_to_hw(irq);
477
478 mpic_unmask_irq(irq);
479 mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status);
491 480
492 mpic_disable_irq(irq); 481 return 0;
493} 482}
494 483
495static void mpic_end_irq(unsigned int irq) 484static void mpic_shutdown_ht_irq(unsigned int irq)
496{ 485{
497 struct mpic *mpic = mpic_from_irq(irq); 486 struct mpic *mpic = mpic_from_irq(irq);
487 unsigned int src = mpic_irq_to_hw(irq);
488
489 mpic_shutdown_ht_interrupt(mpic, src, irq_desc[irq].status);
490 mpic_mask_irq(irq);
491}
492
493static void mpic_end_ht_irq(unsigned int irq)
494{
495 struct mpic *mpic = mpic_from_irq(irq);
496 unsigned int src = mpic_irq_to_hw(irq);
498 497
499#ifdef DEBUG_IRQ 498#ifdef DEBUG_IRQ
500 DBG("%s: end_irq: %d\n", mpic->name, irq); 499 DBG("%s: end_irq: %d\n", mpic->name, irq);
@@ -504,30 +503,25 @@ static void mpic_end_irq(unsigned int irq)
504 * latched another edge interrupt coming in anyway 503 * latched another edge interrupt coming in anyway
505 */ 504 */
506 505
507#ifdef CONFIG_MPIC_BROKEN_U3 506 if (irq_desc[irq].status & IRQ_LEVEL)
508 if (mpic->flags & MPIC_BROKEN_U3) { 507 mpic_ht_end_irq(mpic, src);
509 unsigned int src = irq - mpic->irq_offset;
510 if (mpic_is_ht_interrupt(mpic, src) &&
511 (irq_desc[irq].status & IRQ_LEVEL))
512 mpic_ht_end_irq(mpic, src);
513 }
514#endif /* CONFIG_MPIC_BROKEN_U3 */
515
516 mpic_eoi(mpic); 508 mpic_eoi(mpic);
517} 509}
518 510
511#endif /* CONFIG_MPIC_BROKEN_U3 */
512
519#ifdef CONFIG_SMP 513#ifdef CONFIG_SMP
520 514
521static void mpic_enable_ipi(unsigned int irq) 515static void mpic_unmask_ipi(unsigned int irq)
522{ 516{
523 struct mpic *mpic = mpic_from_ipi(irq); 517 struct mpic *mpic = mpic_from_ipi(irq);
524 unsigned int src = irq - mpic->ipi_offset; 518 unsigned int src = mpic_irq_to_hw(irq) - MPIC_VEC_IPI_0;
525 519
526 DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src); 520 DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src);
527 mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); 521 mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK);
528} 522}
529 523
530static void mpic_disable_ipi(unsigned int irq) 524static void mpic_mask_ipi(unsigned int irq)
531{ 525{
532 /* NEVER disable an IPI... that's just plain wrong! */ 526 /* NEVER disable an IPI... that's just plain wrong! */
533} 527}
@@ -540,7 +534,7 @@ static void mpic_end_ipi(unsigned int irq)
540 * IPIs are marked IRQ_PER_CPU. This has the side effect of 534 * IPIs are marked IRQ_PER_CPU. This has the side effect of
541 * preventing the IRQ_PENDING/IRQ_INPROGRESS logic from 535 * preventing the IRQ_PENDING/IRQ_INPROGRESS logic from
542 * applying to them. We EOI them late to avoid re-entering. 536 * applying to them. We EOI them late to avoid re-entering.
543 * We mark IPI's with SA_INTERRUPT as they must run with 537 * We mark IPI's with IRQF_DISABLED as they must run with
544 * irqs disabled. 538 * irqs disabled.
545 */ 539 */
546 mpic_eoi(mpic); 540 mpic_eoi(mpic);
@@ -551,29 +545,176 @@ static void mpic_end_ipi(unsigned int irq)
551static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask) 545static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
552{ 546{
553 struct mpic *mpic = mpic_from_irq(irq); 547 struct mpic *mpic = mpic_from_irq(irq);
548 unsigned int src = mpic_irq_to_hw(irq);
554 549
555 cpumask_t tmp; 550 cpumask_t tmp;
556 551
557 cpus_and(tmp, cpumask, cpu_online_map); 552 cpus_and(tmp, cpumask, cpu_online_map);
558 553
559 mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_DESTINATION, 554 mpic_irq_write(src, MPIC_IRQ_DESTINATION,
560 mpic_physmask(cpus_addr(tmp)[0])); 555 mpic_physmask(cpus_addr(tmp)[0]));
561} 556}
562 557
558static unsigned int mpic_flags_to_vecpri(unsigned int flags, int *level)
559{
560 unsigned int vecpri;
561
562 /* Now convert sense value */
563 switch(flags & IRQ_TYPE_SENSE_MASK) {
564 case IRQ_TYPE_EDGE_RISING:
565 vecpri = MPIC_VECPRI_SENSE_EDGE |
566 MPIC_VECPRI_POLARITY_POSITIVE;
567 *level = 0;
568 break;
569 case IRQ_TYPE_EDGE_FALLING:
570 vecpri = MPIC_VECPRI_SENSE_EDGE |
571 MPIC_VECPRI_POLARITY_NEGATIVE;
572 *level = 0;
573 break;
574 case IRQ_TYPE_LEVEL_HIGH:
575 vecpri = MPIC_VECPRI_SENSE_LEVEL |
576 MPIC_VECPRI_POLARITY_POSITIVE;
577 *level = 1;
578 break;
579 case IRQ_TYPE_LEVEL_LOW:
580 default:
581 vecpri = MPIC_VECPRI_SENSE_LEVEL |
582 MPIC_VECPRI_POLARITY_NEGATIVE;
583 *level = 1;
584 }
585 return vecpri;
586}
587
588static struct irq_chip mpic_irq_chip = {
589 .mask = mpic_mask_irq,
590 .unmask = mpic_unmask_irq,
591 .eoi = mpic_end_irq,
592};
593
594#ifdef CONFIG_SMP
595static struct irq_chip mpic_ipi_chip = {
596 .mask = mpic_mask_ipi,
597 .unmask = mpic_unmask_ipi,
598 .eoi = mpic_end_ipi,
599};
600#endif /* CONFIG_SMP */
601
602#ifdef CONFIG_MPIC_BROKEN_U3
603static struct irq_chip mpic_irq_ht_chip = {
604 .startup = mpic_startup_ht_irq,
605 .shutdown = mpic_shutdown_ht_irq,
606 .mask = mpic_mask_irq,
607 .unmask = mpic_unmask_ht_irq,
608 .eoi = mpic_end_ht_irq,
609};
610#endif /* CONFIG_MPIC_BROKEN_U3 */
611
612
613static int mpic_host_match(struct irq_host *h, struct device_node *node)
614{
615 struct mpic *mpic = h->host_data;
616
617 /* Exact match, unless mpic node is NULL */
618 return mpic->of_node == NULL || mpic->of_node == node;
619}
620
621static int mpic_host_map(struct irq_host *h, unsigned int virq,
622 irq_hw_number_t hw, unsigned int flags)
623{
624 struct irq_desc *desc = get_irq_desc(virq);
625 struct irq_chip *chip;
626 struct mpic *mpic = h->host_data;
627 unsigned int vecpri = MPIC_VECPRI_SENSE_LEVEL |
628 MPIC_VECPRI_POLARITY_NEGATIVE;
629 int level;
630
631 pr_debug("mpic: map virq %d, hwirq 0x%lx, flags: 0x%x\n",
632 virq, hw, flags);
633
634 if (hw == MPIC_VEC_SPURRIOUS)
635 return -EINVAL;
636#ifdef CONFIG_SMP
637 else if (hw >= MPIC_VEC_IPI_0) {
638 WARN_ON(!(mpic->flags & MPIC_PRIMARY));
639
640 pr_debug("mpic: mapping as IPI\n");
641 set_irq_chip_data(virq, mpic);
642 set_irq_chip_and_handler(virq, &mpic->hc_ipi,
643 handle_percpu_irq);
644 return 0;
645 }
646#endif /* CONFIG_SMP */
647
648 if (hw >= mpic->irq_count)
649 return -EINVAL;
650
651 /* If no sense provided, check default sense array */
652 if (((flags & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_NONE) &&
653 mpic->senses && hw < mpic->senses_count)
654 flags |= mpic->senses[hw];
655
656 vecpri = mpic_flags_to_vecpri(flags, &level);
657 if (level)
658 desc->status |= IRQ_LEVEL;
659 chip = &mpic->hc_irq;
660
661#ifdef CONFIG_MPIC_BROKEN_U3
662 /* Check for HT interrupts, override vecpri */
663 if (mpic_is_ht_interrupt(mpic, hw)) {
664 vecpri &= ~(MPIC_VECPRI_SENSE_MASK |
665 MPIC_VECPRI_POLARITY_MASK);
666 vecpri |= MPIC_VECPRI_POLARITY_POSITIVE;
667 chip = &mpic->hc_ht_irq;
668 }
669#endif
670
671 /* Reconfigure irq */
672 vecpri |= MPIC_VECPRI_MASK | hw | (8 << MPIC_VECPRI_PRIORITY_SHIFT);
673 mpic_irq_write(hw, MPIC_IRQ_VECTOR_PRI, vecpri);
674
675 pr_debug("mpic: mapping as IRQ\n");
676
677 set_irq_chip_data(virq, mpic);
678 set_irq_chip_and_handler(virq, chip, handle_fasteoi_irq);
679 return 0;
680}
681
682static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
683 u32 *intspec, unsigned int intsize,
684 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
685
686{
687 static unsigned char map_mpic_senses[4] = {
688 IRQ_TYPE_EDGE_RISING,
689 IRQ_TYPE_LEVEL_LOW,
690 IRQ_TYPE_LEVEL_HIGH,
691 IRQ_TYPE_EDGE_FALLING,
692 };
693
694 *out_hwirq = intspec[0];
695 if (intsize > 1 && intspec[1] < 4)
696 *out_flags = map_mpic_senses[intspec[1]];
697 else
698 *out_flags = IRQ_TYPE_NONE;
699
700 return 0;
701}
702
703static struct irq_host_ops mpic_host_ops = {
704 .match = mpic_host_match,
705 .map = mpic_host_map,
706 .xlate = mpic_host_xlate,
707};
563 708
564/* 709/*
565 * Exported functions 710 * Exported functions
566 */ 711 */
567 712
568 713struct mpic * __init mpic_alloc(struct device_node *node,
569struct mpic * __init mpic_alloc(unsigned long phys_addr, 714 unsigned long phys_addr,
570 unsigned int flags, 715 unsigned int flags,
571 unsigned int isu_size, 716 unsigned int isu_size,
572 unsigned int irq_offset,
573 unsigned int irq_count, 717 unsigned int irq_count,
574 unsigned int ipi_offset,
575 unsigned char *senses,
576 unsigned int senses_count,
577 const char *name) 718 const char *name)
578{ 719{
579 struct mpic *mpic; 720 struct mpic *mpic;
@@ -585,33 +726,38 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr,
585 if (mpic == NULL) 726 if (mpic == NULL)
586 return NULL; 727 return NULL;
587 728
588
589 memset(mpic, 0, sizeof(struct mpic)); 729 memset(mpic, 0, sizeof(struct mpic));
590 mpic->name = name; 730 mpic->name = name;
731 mpic->of_node = node ? of_node_get(node) : NULL;
591 732
733 mpic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 256,
734 &mpic_host_ops,
735 MPIC_VEC_SPURRIOUS);
736 if (mpic->irqhost == NULL) {
737 of_node_put(node);
738 return NULL;
739 }
740
741 mpic->irqhost->host_data = mpic;
742 mpic->hc_irq = mpic_irq_chip;
592 mpic->hc_irq.typename = name; 743 mpic->hc_irq.typename = name;
593 mpic->hc_irq.startup = mpic_startup_irq;
594 mpic->hc_irq.shutdown = mpic_shutdown_irq;
595 mpic->hc_irq.enable = mpic_enable_irq;
596 mpic->hc_irq.disable = mpic_disable_irq;
597 mpic->hc_irq.end = mpic_end_irq;
598 if (flags & MPIC_PRIMARY) 744 if (flags & MPIC_PRIMARY)
599 mpic->hc_irq.set_affinity = mpic_set_affinity; 745 mpic->hc_irq.set_affinity = mpic_set_affinity;
746#ifdef CONFIG_MPIC_BROKEN_U3
747 mpic->hc_ht_irq = mpic_irq_ht_chip;
748 mpic->hc_ht_irq.typename = name;
749 if (flags & MPIC_PRIMARY)
750 mpic->hc_ht_irq.set_affinity = mpic_set_affinity;
751#endif /* CONFIG_MPIC_BROKEN_U3 */
600#ifdef CONFIG_SMP 752#ifdef CONFIG_SMP
753 mpic->hc_ipi = mpic_ipi_chip;
601 mpic->hc_ipi.typename = name; 754 mpic->hc_ipi.typename = name;
602 mpic->hc_ipi.enable = mpic_enable_ipi;
603 mpic->hc_ipi.disable = mpic_disable_ipi;
604 mpic->hc_ipi.end = mpic_end_ipi;
605#endif /* CONFIG_SMP */ 755#endif /* CONFIG_SMP */
606 756
607 mpic->flags = flags; 757 mpic->flags = flags;
608 mpic->isu_size = isu_size; 758 mpic->isu_size = isu_size;
609 mpic->irq_offset = irq_offset;
610 mpic->irq_count = irq_count; 759 mpic->irq_count = irq_count;
611 mpic->ipi_offset = ipi_offset;
612 mpic->num_sources = 0; /* so far */ 760 mpic->num_sources = 0; /* so far */
613 mpic->senses = senses;
614 mpic->senses_count = senses_count;
615 761
616 /* Map the global registers */ 762 /* Map the global registers */
617 mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000); 763 mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000);
@@ -679,8 +825,10 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr,
679 mpic->next = mpics; 825 mpic->next = mpics;
680 mpics = mpic; 826 mpics = mpic;
681 827
682 if (flags & MPIC_PRIMARY) 828 if (flags & MPIC_PRIMARY) {
683 mpic_primary = mpic; 829 mpic_primary = mpic;
830 irq_set_default_host(mpic->irqhost);
831 }
684 832
685 return mpic; 833 return mpic;
686} 834}
@@ -697,26 +845,10 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
697 mpic->num_sources = isu_first + mpic->isu_size; 845 mpic->num_sources = isu_first + mpic->isu_size;
698} 846}
699 847
700void __init mpic_setup_cascade(unsigned int irq, mpic_cascade_t handler, 848void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
701 void *data)
702{ 849{
703 struct mpic *mpic = mpic_find(irq, NULL); 850 mpic->senses = senses;
704 unsigned long flags; 851 mpic->senses_count = count;
705
706 /* Synchronization here is a bit dodgy, so don't try to replace cascade
707 * interrupts on the fly too often ... but normally it's set up at boot.
708 */
709 spin_lock_irqsave(&mpic_lock, flags);
710 if (mpic->cascade)
711 mpic_disable_irq(mpic->cascade_vec + mpic->irq_offset);
712 mpic->cascade = NULL;
713 wmb();
714 mpic->cascade_vec = irq - mpic->irq_offset;
715 mpic->cascade_data = data;
716 wmb();
717 mpic->cascade = handler;
718 mpic_enable_irq(irq);
719 spin_unlock_irqrestore(&mpic_lock, flags);
720} 852}
721 853
722void __init mpic_init(struct mpic *mpic) 854void __init mpic_init(struct mpic *mpic)
@@ -724,6 +856,11 @@ void __init mpic_init(struct mpic *mpic)
724 int i; 856 int i;
725 857
726 BUG_ON(mpic->num_sources == 0); 858 BUG_ON(mpic->num_sources == 0);
859 WARN_ON(mpic->num_sources > MPIC_VEC_IPI_0);
860
861 /* Sanitize source count */
862 if (mpic->num_sources > MPIC_VEC_IPI_0)
863 mpic->num_sources = MPIC_VEC_IPI_0;
727 864
728 printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources); 865 printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources);
729 866
@@ -747,12 +884,6 @@ void __init mpic_init(struct mpic *mpic)
747 MPIC_VECPRI_MASK | 884 MPIC_VECPRI_MASK |
748 (10 << MPIC_VECPRI_PRIORITY_SHIFT) | 885 (10 << MPIC_VECPRI_PRIORITY_SHIFT) |
749 (MPIC_VEC_IPI_0 + i)); 886 (MPIC_VEC_IPI_0 + i));
750#ifdef CONFIG_SMP
751 if (!(mpic->flags & MPIC_PRIMARY))
752 continue;
753 irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU;
754 irq_desc[mpic->ipi_offset+i].chip = &mpic->hc_ipi;
755#endif /* CONFIG_SMP */
756 } 887 }
757 888
758 /* Initialize interrupt sources */ 889 /* Initialize interrupt sources */
@@ -763,31 +894,21 @@ void __init mpic_init(struct mpic *mpic)
763 /* Do the HT PIC fixups on U3 broken mpic */ 894 /* Do the HT PIC fixups on U3 broken mpic */
764 DBG("MPIC flags: %x\n", mpic->flags); 895 DBG("MPIC flags: %x\n", mpic->flags);
765 if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY)) 896 if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY))
766 mpic_scan_ht_pics(mpic); 897 mpic_scan_ht_pics(mpic);
767#endif /* CONFIG_MPIC_BROKEN_U3 */ 898#endif /* CONFIG_MPIC_BROKEN_U3 */
768 899
769 for (i = 0; i < mpic->num_sources; i++) { 900 for (i = 0; i < mpic->num_sources; i++) {
770 /* start with vector = source number, and masked */ 901 /* start with vector = source number, and masked */
771 u32 vecpri = MPIC_VECPRI_MASK | i | (8 << MPIC_VECPRI_PRIORITY_SHIFT); 902 u32 vecpri = MPIC_VECPRI_MASK | i | (8 << MPIC_VECPRI_PRIORITY_SHIFT);
772 int level = 0; 903 int level = 1;
773 904
774 /* if it's an IPI, we skip it */
775 if ((mpic->irq_offset + i) >= (mpic->ipi_offset + i) &&
776 (mpic->irq_offset + i) < (mpic->ipi_offset + i + 4))
777 continue;
778
779 /* do senses munging */ 905 /* do senses munging */
780 if (mpic->senses && i < mpic->senses_count) { 906 if (mpic->senses && i < mpic->senses_count)
781 if (mpic->senses[i] & IRQ_SENSE_LEVEL) 907 vecpri = mpic_flags_to_vecpri(mpic->senses[i],
782 vecpri |= MPIC_VECPRI_SENSE_LEVEL; 908 &level);
783 if (mpic->senses[i] & IRQ_POLARITY_POSITIVE) 909 else
784 vecpri |= MPIC_VECPRI_POLARITY_POSITIVE;
785 } else
786 vecpri |= MPIC_VECPRI_SENSE_LEVEL; 910 vecpri |= MPIC_VECPRI_SENSE_LEVEL;
787 911
788 /* remember if it was a level interrupts */
789 level = (vecpri & MPIC_VECPRI_SENSE_LEVEL);
790
791 /* deal with broken U3 */ 912 /* deal with broken U3 */
792 if (mpic->flags & MPIC_BROKEN_U3) { 913 if (mpic->flags & MPIC_BROKEN_U3) {
793#ifdef CONFIG_MPIC_BROKEN_U3 914#ifdef CONFIG_MPIC_BROKEN_U3
@@ -808,12 +929,6 @@ void __init mpic_init(struct mpic *mpic)
808 mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri); 929 mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri);
809 mpic_irq_write(i, MPIC_IRQ_DESTINATION, 930 mpic_irq_write(i, MPIC_IRQ_DESTINATION,
810 1 << hard_smp_processor_id()); 931 1 << hard_smp_processor_id());
811
812 /* init linux descriptors */
813 if (i < mpic->irq_count) {
814 irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0;
815 irq_desc[mpic->irq_offset+i].chip = &mpic->hc_irq;
816 }
817 } 932 }
818 933
819 /* Init spurrious vector */ 934 /* Init spurrious vector */
@@ -854,19 +969,20 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
854{ 969{
855 int is_ipi; 970 int is_ipi;
856 struct mpic *mpic = mpic_find(irq, &is_ipi); 971 struct mpic *mpic = mpic_find(irq, &is_ipi);
972 unsigned int src = mpic_irq_to_hw(irq);
857 unsigned long flags; 973 unsigned long flags;
858 u32 reg; 974 u32 reg;
859 975
860 spin_lock_irqsave(&mpic_lock, flags); 976 spin_lock_irqsave(&mpic_lock, flags);
861 if (is_ipi) { 977 if (is_ipi) {
862 reg = mpic_ipi_read(irq - mpic->ipi_offset) & 978 reg = mpic_ipi_read(src - MPIC_VEC_IPI_0) &
863 ~MPIC_VECPRI_PRIORITY_MASK; 979 ~MPIC_VECPRI_PRIORITY_MASK;
864 mpic_ipi_write(irq - mpic->ipi_offset, 980 mpic_ipi_write(src - MPIC_VEC_IPI_0,
865 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); 981 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
866 } else { 982 } else {
867 reg = mpic_irq_read(irq - mpic->irq_offset,MPIC_IRQ_VECTOR_PRI) 983 reg = mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI)
868 & ~MPIC_VECPRI_PRIORITY_MASK; 984 & ~MPIC_VECPRI_PRIORITY_MASK;
869 mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI, 985 mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
870 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); 986 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
871 } 987 }
872 spin_unlock_irqrestore(&mpic_lock, flags); 988 spin_unlock_irqrestore(&mpic_lock, flags);
@@ -876,14 +992,15 @@ unsigned int mpic_irq_get_priority(unsigned int irq)
876{ 992{
877 int is_ipi; 993 int is_ipi;
878 struct mpic *mpic = mpic_find(irq, &is_ipi); 994 struct mpic *mpic = mpic_find(irq, &is_ipi);
995 unsigned int src = mpic_irq_to_hw(irq);
879 unsigned long flags; 996 unsigned long flags;
880 u32 reg; 997 u32 reg;
881 998
882 spin_lock_irqsave(&mpic_lock, flags); 999 spin_lock_irqsave(&mpic_lock, flags);
883 if (is_ipi) 1000 if (is_ipi)
884 reg = mpic_ipi_read(irq - mpic->ipi_offset); 1001 reg = mpic_ipi_read(src = MPIC_VEC_IPI_0);
885 else 1002 else
886 reg = mpic_irq_read(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI); 1003 reg = mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI);
887 spin_unlock_irqrestore(&mpic_lock, flags); 1004 spin_unlock_irqrestore(&mpic_lock, flags);
888 return (reg & MPIC_VECPRI_PRIORITY_MASK) >> MPIC_VECPRI_PRIORITY_SHIFT; 1005 return (reg & MPIC_VECPRI_PRIORITY_MASK) >> MPIC_VECPRI_PRIORITY_SHIFT;
889} 1006}
@@ -978,37 +1095,20 @@ void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask)
978 mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0])); 1095 mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0]));
979} 1096}
980 1097
981int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs) 1098unsigned int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs)
982{ 1099{
983 u32 irq; 1100 u32 src;
984 1101
985 irq = mpic_cpu_read(MPIC_CPU_INTACK) & MPIC_VECPRI_VECTOR_MASK; 1102 src = mpic_cpu_read(MPIC_CPU_INTACK) & MPIC_VECPRI_VECTOR_MASK;
986#ifdef DEBUG_LOW
987 DBG("%s: get_one_irq(): %d\n", mpic->name, irq);
988#endif
989 if (mpic->cascade && irq == mpic->cascade_vec) {
990#ifdef DEBUG_LOW 1103#ifdef DEBUG_LOW
991 DBG("%s: cascading ...\n", mpic->name); 1104 DBG("%s: get_one_irq(): %d\n", mpic->name, src);
992#endif
993 irq = mpic->cascade(regs, mpic->cascade_data);
994 mpic_eoi(mpic);
995 return irq;
996 }
997 if (unlikely(irq == MPIC_VEC_SPURRIOUS))
998 return -1;
999 if (irq < MPIC_VEC_IPI_0) {
1000#ifdef DEBUG_IRQ
1001 DBG("%s: irq %d\n", mpic->name, irq + mpic->irq_offset);
1002#endif
1003 return irq + mpic->irq_offset;
1004 }
1005#ifdef DEBUG_IPI
1006 DBG("%s: ipi %d !\n", mpic->name, irq - MPIC_VEC_IPI_0);
1007#endif 1105#endif
1008 return irq - MPIC_VEC_IPI_0 + mpic->ipi_offset; 1106 if (unlikely(src == MPIC_VEC_SPURRIOUS))
1107 return NO_IRQ;
1108 return irq_linear_revmap(mpic->irqhost, src);
1009} 1109}
1010 1110
1011int mpic_get_irq(struct pt_regs *regs) 1111unsigned int mpic_get_irq(struct pt_regs *regs)
1012{ 1112{
1013 struct mpic *mpic = mpic_primary; 1113 struct mpic *mpic = mpic_primary;
1014 1114
@@ -1022,22 +1122,27 @@ int mpic_get_irq(struct pt_regs *regs)
1022void mpic_request_ipis(void) 1122void mpic_request_ipis(void)
1023{ 1123{
1024 struct mpic *mpic = mpic_primary; 1124 struct mpic *mpic = mpic_primary;
1025 1125 int i;
1126 static char *ipi_names[] = {
1127 "IPI0 (call function)",
1128 "IPI1 (reschedule)",
1129 "IPI2 (unused)",
1130 "IPI3 (debugger break)",
1131 };
1026 BUG_ON(mpic == NULL); 1132 BUG_ON(mpic == NULL);
1027 1133
1028 printk("requesting IPIs ... \n"); 1134 printk(KERN_INFO "mpic: requesting IPIs ... \n");
1029 1135
1030 /* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */ 1136 for (i = 0; i < 4; i++) {
1031 request_irq(mpic->ipi_offset+0, mpic_ipi_action, SA_INTERRUPT, 1137 unsigned int vipi = irq_create_mapping(mpic->irqhost,
1032 "IPI0 (call function)", mpic); 1138 MPIC_VEC_IPI_0 + i, 0);
1033 request_irq(mpic->ipi_offset+1, mpic_ipi_action, SA_INTERRUPT, 1139 if (vipi == NO_IRQ) {
1034 "IPI1 (reschedule)", mpic); 1140 printk(KERN_ERR "Failed to map IPI %d\n", i);
1035 request_irq(mpic->ipi_offset+2, mpic_ipi_action, SA_INTERRUPT, 1141 break;
1036 "IPI2 (unused)", mpic); 1142 }
1037 request_irq(mpic->ipi_offset+3, mpic_ipi_action, SA_INTERRUPT, 1143 request_irq(vipi, mpic_ipi_action, IRQF_DISABLED,
1038 "IPI3 (debugger break)", mpic); 1144 ipi_names[i], mpic);
1039 1145 }
1040 printk("IPIs requested... \n");
1041} 1146}
1042 1147
1043void smp_mpic_message_pass(int target, int msg) 1148void smp_mpic_message_pass(int target, int msg)
diff --git a/arch/ppc/8260_io/fcc_enet.c b/arch/ppc/8260_io/fcc_enet.c
index cd5f3faa4b20..e347fe88316d 100644
--- a/arch/ppc/8260_io/fcc_enet.c
+++ b/arch/ppc/8260_io/fcc_enet.c
@@ -2116,7 +2116,7 @@ init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
2116 2116
2117#ifdef PHY_INTERRUPT 2117#ifdef PHY_INTERRUPT
2118#ifdef CONFIG_ADS8272 2118#ifdef CONFIG_ADS8272
2119 if (request_irq(PHY_INTERRUPT, mii_link_interrupt, SA_SHIRQ, 2119 if (request_irq(PHY_INTERRUPT, mii_link_interrupt, IRQF_SHARED,
2120 "mii", dev) < 0) 2120 "mii", dev) < 0)
2121 printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT); 2121 printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
2122#else 2122#else
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c
index 026ace320729..d90cd24d018e 100644
--- a/arch/ppc/platforms/85xx/mpc8560_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8560_ads.c
@@ -131,7 +131,7 @@ static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
131 131
132static struct irqaction cpm2_irqaction = { 132static struct irqaction cpm2_irqaction = {
133 .handler = cpm2_cascade, 133 .handler = cpm2_cascade,
134 .flags = SA_INTERRUPT, 134 .flags = IRQF_DISABLED,
135 .mask = CPU_MASK_NONE, 135 .mask = CPU_MASK_NONE,
136 .name = "cpm2_cascade", 136 .name = "cpm2_cascade",
137}; 137};
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
index 139cf0d00855..75204588a3e7 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
@@ -136,7 +136,7 @@ static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
136 136
137static struct irqaction cpm2_irqaction = { 137static struct irqaction cpm2_irqaction = {
138 .handler = cpm2_cascade, 138 .handler = cpm2_cascade,
139 .flags = SA_INTERRUPT, 139 .flags = IRQF_DISABLED,
140 .mask = CPU_MASK_NONE, 140 .mask = CPU_MASK_NONE,
141 .name = "cpm2_cascade", 141 .name = "cpm2_cascade",
142}; 142};
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
index 224612412cbe..495aa79bb3a1 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.c
+++ b/arch/ppc/platforms/85xx/stx_gp3.c
@@ -166,7 +166,7 @@ static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
166 166
167static struct irqaction cpm2_irqaction = { 167static struct irqaction cpm2_irqaction = {
168 .handler = cpm2_cascade, 168 .handler = cpm2_cascade,
169 .flags = SA_INTERRUPT, 169 .flags = IRQF_DISABLED,
170 .mask = CPU_MASK_NONE, 170 .mask = CPU_MASK_NONE,
171 .name = "cpm2_cascade", 171 .name = "cpm2_cascade",
172}; 172};
diff --git a/arch/ppc/platforms/85xx/tqm85xx.c b/arch/ppc/platforms/85xx/tqm85xx.c
index 1c90f113cc8f..189ed4175f9f 100644
--- a/arch/ppc/platforms/85xx/tqm85xx.c
+++ b/arch/ppc/platforms/85xx/tqm85xx.c
@@ -190,7 +190,7 @@ static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
190 190
191static struct irqaction cpm2_irqaction = { 191static struct irqaction cpm2_irqaction = {
192 .handler = cpm2_cascade, 192 .handler = cpm2_cascade,
193 .flags = SA_INTERRUPT, 193 .flags = IRQF_DISABLED,
194 .mask = CPU_MASK_NONE, 194 .mask = CPU_MASK_NONE,
195 .name = "cpm2_cascade", 195 .name = "cpm2_cascade",
196}; 196};
diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c
index 71af4b488621..e0f112a1fd0b 100644
--- a/arch/ppc/platforms/hdpu.c
+++ b/arch/ppc/platforms/hdpu.c
@@ -837,7 +837,7 @@ static void smp_hdpu_setup_cpu(int cpu_nr)
837 mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, 0xff); 837 mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, 0xff);
838 mv64x60_write(&bh, MV64360_CPU0_DOORBELL_MASK, 0xff); 838 mv64x60_write(&bh, MV64360_CPU0_DOORBELL_MASK, 0xff);
839 request_irq(60, hdpu_smp_cpu0_int_handler, 839 request_irq(60, hdpu_smp_cpu0_int_handler,
840 SA_INTERRUPT, hdpu_smp0, 0); 840 IRQF_DISABLED, hdpu_smp0, 0);
841 } 841 }
842 842
843 if (cpu_nr == 1) { 843 if (cpu_nr == 1) {
@@ -857,7 +857,7 @@ static void smp_hdpu_setup_cpu(int cpu_nr)
857 mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, 0x0); 857 mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, 0x0);
858 mv64x60_write(&bh, MV64360_CPU1_DOORBELL_MASK, 0xff); 858 mv64x60_write(&bh, MV64360_CPU1_DOORBELL_MASK, 0xff);
859 request_irq(28, hdpu_smp_cpu1_int_handler, 859 request_irq(28, hdpu_smp_cpu1_int_handler,
860 SA_INTERRUPT, hdpu_smp1, 0); 860 IRQF_DISABLED, hdpu_smp1, 0);
861 } 861 }
862 862
863} 863}
diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c
index 97d6c21091e0..3bb530af0297 100644
--- a/arch/ppc/platforms/radstone_ppc7d.c
+++ b/arch/ppc/platforms/radstone_ppc7d.c
@@ -1310,7 +1310,7 @@ static void ppc7d_init2(void)
1310 1310
1311 /* Hook up i8259 interrupt which is connected to GPP28 */ 1311 /* Hook up i8259 interrupt which is connected to GPP28 */
1312 request_irq(mv64360_irq_base + MV64x60_IRQ_GPP28, ppc7d_i8259_intr, 1312 request_irq(mv64360_irq_base + MV64x60_IRQ_GPP28, ppc7d_i8259_intr,
1313 SA_INTERRUPT, "I8259 (GPP28) interrupt", (void *)0); 1313 IRQF_DISABLED, "I8259 (GPP28) interrupt", (void *)0);
1314 1314
1315 /* Configure MPP16 as watchdog NMI, MPP17 as watchdog WDE */ 1315 /* Configure MPP16 as watchdog NMI, MPP17 as watchdog WDE */
1316 spin_lock_irqsave(&mv64x60_lock, flags); 1316 spin_lock_irqsave(&mv64x60_lock, flags);
diff --git a/arch/ppc/platforms/sbc82xx.c b/arch/ppc/platforms/sbc82xx.c
index 8cff1e303349..60b769c7f3fc 100644
--- a/arch/ppc/platforms/sbc82xx.c
+++ b/arch/ppc/platforms/sbc82xx.c
@@ -145,7 +145,7 @@ static irqreturn_t sbc82xx_i8259_demux(int irq, void *dev_id, struct pt_regs *re
145 145
146static struct irqaction sbc82xx_i8259_irqaction = { 146static struct irqaction sbc82xx_i8259_irqaction = {
147 .handler = sbc82xx_i8259_demux, 147 .handler = sbc82xx_i8259_demux,
148 .flags = SA_INTERRUPT, 148 .flags = IRQF_DISABLED,
149 .mask = CPU_MASK_NONE, 149 .mask = CPU_MASK_NONE,
150 .name = "i8259 demux", 150 .name = "i8259 demux",
151}; 151};
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 490749ca88f9..2497bbc07e76 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -104,3 +104,5 @@ obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \
104ifeq ($(CONFIG_PPC_MPC52xx),y) 104ifeq ($(CONFIG_PPC_MPC52xx),y)
105obj-$(CONFIG_PCI) += mpc52xx_pci.o 105obj-$(CONFIG_PCI) += mpc52xx_pci.o
106endif 106endif
107
108obj-$(CONFIG_PPC_I8259) += i8259.o
diff --git a/arch/ppc/syslib/btext.c b/arch/ppc/syslib/btext.c
index 51ab6e90fe25..d11667046f21 100644
--- a/arch/ppc/syslib/btext.c
+++ b/arch/ppc/syslib/btext.c
@@ -6,7 +6,7 @@
6#include <linux/kernel.h> 6#include <linux/kernel.h>
7#include <linux/string.h> 7#include <linux/string.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/version.h> 9#include <linux/utsrelease.h>
10 10
11#include <asm/sections.h> 11#include <asm/sections.h>
12#include <asm/bootx.h> 12#include <asm/bootx.h>
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c
index 91096b38ae70..7fd550a7d586 100644
--- a/arch/ppc/syslib/gt64260_pic.c
+++ b/arch/ppc/syslib/gt64260_pic.c
@@ -297,7 +297,7 @@ gt64260_register_hdlrs(void)
297 297
298 /* Register CPU interface error interrupt handler */ 298 /* Register CPU interface error interrupt handler */
299 if ((rc = request_irq(MV64x60_IRQ_CPU_ERR, 299 if ((rc = request_irq(MV64x60_IRQ_CPU_ERR,
300 gt64260_cpu_error_int_handler, SA_INTERRUPT, CPU_INTR_STR, 0))) 300 gt64260_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0)))
301 printk(KERN_WARNING "Can't register cpu error handler: %d", rc); 301 printk(KERN_WARNING "Can't register cpu error handler: %d", rc);
302 302
303 mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0); 303 mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0);
@@ -305,7 +305,7 @@ gt64260_register_hdlrs(void)
305 305
306 /* Register PCI 0 error interrupt handler */ 306 /* Register PCI 0 error interrupt handler */
307 if ((rc = request_irq(MV64360_IRQ_PCI0, gt64260_pci_error_int_handler, 307 if ((rc = request_irq(MV64360_IRQ_PCI0, gt64260_pci_error_int_handler,
308 SA_INTERRUPT, PCI0_INTR_STR, (void *)0))) 308 IRQF_DISABLED, PCI0_INTR_STR, (void *)0)))
309 printk(KERN_WARNING "Can't register pci 0 error handler: %d", 309 printk(KERN_WARNING "Can't register pci 0 error handler: %d",
310 rc); 310 rc);
311 311
@@ -314,7 +314,7 @@ gt64260_register_hdlrs(void)
314 314
315 /* Register PCI 1 error interrupt handler */ 315 /* Register PCI 1 error interrupt handler */
316 if ((rc = request_irq(MV64360_IRQ_PCI1, gt64260_pci_error_int_handler, 316 if ((rc = request_irq(MV64360_IRQ_PCI1, gt64260_pci_error_int_handler,
317 SA_INTERRUPT, PCI1_INTR_STR, (void *)1))) 317 IRQF_DISABLED, PCI1_INTR_STR, (void *)1)))
318 printk(KERN_WARNING "Can't register pci 1 error handler: %d", 318 printk(KERN_WARNING "Can't register pci 1 error handler: %d",
319 rc); 319 rc);
320 320
diff --git a/arch/ppc/syslib/i8259.c b/arch/ppc/syslib/i8259.c
new file mode 100644
index 000000000000..eb35353af837
--- /dev/null
+++ b/arch/ppc/syslib/i8259.c
@@ -0,0 +1,212 @@
1/*
2 * i8259 interrupt controller driver.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/interrupt.h>
12#include <asm/io.h>
13#include <asm/i8259.h>
14
15static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */
16
17static unsigned char cached_8259[2] = { 0xff, 0xff };
18#define cached_A1 (cached_8259[0])
19#define cached_21 (cached_8259[1])
20
21static DEFINE_SPINLOCK(i8259_lock);
22
23static int i8259_pic_irq_offset;
24
25/*
26 * Acknowledge the IRQ using either the PCI host bridge's interrupt
27 * acknowledge feature or poll. How i8259_init() is called determines
28 * which is called. It should be noted that polling is broken on some
29 * IBM and Motorola PReP boxes so we must use the int-ack feature on them.
30 */
31int i8259_irq(struct pt_regs *regs)
32{
33 int irq;
34
35 spin_lock(&i8259_lock);
36
37 /* Either int-ack or poll for the IRQ */
38 if (pci_intack)
39 irq = readb(pci_intack);
40 else {
41 /* Perform an interrupt acknowledge cycle on controller 1. */
42 outb(0x0C, 0x20); /* prepare for poll */
43 irq = inb(0x20) & 7;
44 if (irq == 2 ) {
45 /*
46 * Interrupt is cascaded so perform interrupt
47 * acknowledge on controller 2.
48 */
49 outb(0x0C, 0xA0); /* prepare for poll */
50 irq = (inb(0xA0) & 7) + 8;
51 }
52 }
53
54 if (irq == 7) {
55 /*
56 * This may be a spurious interrupt.
57 *
58 * Read the interrupt status register (ISR). If the most
59 * significant bit is not set then there is no valid
60 * interrupt.
61 */
62 if (!pci_intack)
63 outb(0x0B, 0x20); /* ISR register */
64 if(~inb(0x20) & 0x80)
65 irq = -1;
66 }
67
68 spin_unlock(&i8259_lock);
69 return irq + i8259_pic_irq_offset;
70}
71
72static void i8259_mask_and_ack_irq(unsigned int irq_nr)
73{
74 unsigned long flags;
75
76 spin_lock_irqsave(&i8259_lock, flags);
77 irq_nr -= i8259_pic_irq_offset;
78 if (irq_nr > 7) {
79 cached_A1 |= 1 << (irq_nr-8);
80 inb(0xA1); /* DUMMY */
81 outb(cached_A1, 0xA1);
82 outb(0x20, 0xA0); /* Non-specific EOI */
83 outb(0x20, 0x20); /* Non-specific EOI to cascade */
84 } else {
85 cached_21 |= 1 << irq_nr;
86 inb(0x21); /* DUMMY */
87 outb(cached_21, 0x21);
88 outb(0x20, 0x20); /* Non-specific EOI */
89 }
90 spin_unlock_irqrestore(&i8259_lock, flags);
91}
92
93static void i8259_set_irq_mask(int irq_nr)
94{
95 outb(cached_A1,0xA1);
96 outb(cached_21,0x21);
97}
98
99static void i8259_mask_irq(unsigned int irq_nr)
100{
101 unsigned long flags;
102
103 spin_lock_irqsave(&i8259_lock, flags);
104 irq_nr -= i8259_pic_irq_offset;
105 if (irq_nr < 8)
106 cached_21 |= 1 << irq_nr;
107 else
108 cached_A1 |= 1 << (irq_nr-8);
109 i8259_set_irq_mask(irq_nr);
110 spin_unlock_irqrestore(&i8259_lock, flags);
111}
112
113static void i8259_unmask_irq(unsigned int irq_nr)
114{
115 unsigned long flags;
116
117 spin_lock_irqsave(&i8259_lock, flags);
118 irq_nr -= i8259_pic_irq_offset;
119 if (irq_nr < 8)
120 cached_21 &= ~(1 << irq_nr);
121 else
122 cached_A1 &= ~(1 << (irq_nr-8));
123 i8259_set_irq_mask(irq_nr);
124 spin_unlock_irqrestore(&i8259_lock, flags);
125}
126
127static struct irq_chip i8259_pic = {
128 .typename = " i8259 ",
129 .mask = i8259_mask_irq,
130 .unmask = i8259_unmask_irq,
131 .mask_ack = i8259_mask_and_ack_irq,
132};
133
134static struct resource pic1_iores = {
135 .name = "8259 (master)",
136 .start = 0x20,
137 .end = 0x21,
138 .flags = IORESOURCE_BUSY,
139};
140
141static struct resource pic2_iores = {
142 .name = "8259 (slave)",
143 .start = 0xa0,
144 .end = 0xa1,
145 .flags = IORESOURCE_BUSY,
146};
147
148static struct resource pic_edgectrl_iores = {
149 .name = "8259 edge control",
150 .start = 0x4d0,
151 .end = 0x4d1,
152 .flags = IORESOURCE_BUSY,
153};
154
155static struct irqaction i8259_irqaction = {
156 .handler = no_action,
157 .flags = SA_INTERRUPT,
158 .mask = CPU_MASK_NONE,
159 .name = "82c59 secondary cascade",
160};
161
162/*
163 * i8259_init()
164 * intack_addr - PCI interrupt acknowledge (real) address which will return
165 * the active irq from the 8259
166 */
167void __init i8259_init(unsigned long intack_addr, int offset)
168{
169 unsigned long flags;
170 int i;
171
172 spin_lock_irqsave(&i8259_lock, flags);
173 i8259_pic_irq_offset = offset;
174
175 /* init master interrupt controller */
176 outb(0x11, 0x20); /* Start init sequence */
177 outb(0x00, 0x21); /* Vector base */
178 outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */
179 outb(0x01, 0x21); /* Select 8086 mode */
180
181 /* init slave interrupt controller */
182 outb(0x11, 0xA0); /* Start init sequence */
183 outb(0x08, 0xA1); /* Vector base */
184 outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */
185 outb(0x01, 0xA1); /* Select 8086 mode */
186
187 /* always read ISR */
188 outb(0x0B, 0x20);
189 outb(0x0B, 0xA0);
190
191 /* Mask all interrupts */
192 outb(cached_A1, 0xA1);
193 outb(cached_21, 0x21);
194
195 spin_unlock_irqrestore(&i8259_lock, flags);
196
197 for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) {
198 set_irq_chip_and_handler(offset + i, &i8259_pic,
199 handle_level_irq);
200 irq_desc[offset + i].status |= IRQ_LEVEL;
201 }
202
203 /* reserve our resources */
204 setup_irq(offset + 2, &i8259_irqaction);
205 request_resource(&ioport_resource, &pic1_iores);
206 request_resource(&ioport_resource, &pic2_iores);
207 request_resource(&ioport_resource, &pic_edgectrl_iores);
208
209 if (intack_addr != 0)
210 pci_intack = ioremap(intack_addr, 1);
211
212}
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index 0440d8f4ce16..4b77e6c8c87f 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -149,7 +149,7 @@ void __init ibm440gx_l2c_enable(void){
149 unsigned long flags; 149 unsigned long flags;
150 150
151 /* Install error handler */ 151 /* Install error handler */
152 if (request_irq(87, l2c_error_handler, SA_INTERRUPT, "L2C", 0) < 0){ 152 if (request_irq(87, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0){
153 printk(KERN_ERR "Cannot install L2C error handler, cache is not enabled\n"); 153 printk(KERN_ERR "Cannot install L2C error handler, cache is not enabled\n");
154 return; 154 return;
155 } 155 }
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
index 63fa5b313396..d3fa264e179e 100644
--- a/arch/ppc/syslib/m82xx_pci.c
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -139,7 +139,7 @@ pq2pci_irq_demux(int irq, void *dev_id, struct pt_regs *regs)
139 139
140static struct irqaction pq2pci_irqaction = { 140static struct irqaction pq2pci_irqaction = {
141 .handler = pq2pci_irq_demux, 141 .handler = pq2pci_irq_demux,
142 .flags = SA_INTERRUPT, 142 .flags = IRQF_DISABLED,
143 .mask = CPU_MASK_NONE, 143 .mask = CPU_MASK_NONE,
144 .name = "PQ2 PCI cascade", 144 .name = "PQ2 PCI cascade",
145}; 145};
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
index a4244d468381..3f6d162f87cf 100644
--- a/arch/ppc/syslib/mv64360_pic.c
+++ b/arch/ppc/syslib/mv64360_pic.c
@@ -380,7 +380,7 @@ mv64360_register_hdlrs(void)
380 /* Clear old errors and register CPU interface error intr handler */ 380 /* Clear old errors and register CPU interface error intr handler */
381 mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0); 381 mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0);
382 if ((rc = request_irq(MV64x60_IRQ_CPU_ERR + mv64360_irq_base, 382 if ((rc = request_irq(MV64x60_IRQ_CPU_ERR + mv64360_irq_base,
383 mv64360_cpu_error_int_handler, SA_INTERRUPT, CPU_INTR_STR, 0))) 383 mv64360_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0)))
384 printk(KERN_WARNING "Can't register cpu error handler: %d", rc); 384 printk(KERN_WARNING "Can't register cpu error handler: %d", rc);
385 385
386 mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0); 386 mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0);
@@ -389,14 +389,14 @@ mv64360_register_hdlrs(void)
389 /* Clear old errors and register internal SRAM error intr handler */ 389 /* Clear old errors and register internal SRAM error intr handler */
390 mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0); 390 mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0);
391 if ((rc = request_irq(MV64360_IRQ_SRAM_PAR_ERR + mv64360_irq_base, 391 if ((rc = request_irq(MV64360_IRQ_SRAM_PAR_ERR + mv64360_irq_base,
392 mv64360_sram_error_int_handler,SA_INTERRUPT,SRAM_INTR_STR, 0))) 392 mv64360_sram_error_int_handler,IRQF_DISABLED,SRAM_INTR_STR, 0)))
393 printk(KERN_WARNING "Can't register SRAM error handler: %d",rc); 393 printk(KERN_WARNING "Can't register SRAM error handler: %d",rc);
394 394
395 /* Clear old errors and register PCI 0 error intr handler */ 395 /* Clear old errors and register PCI 0 error intr handler */
396 mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0); 396 mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0);
397 if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base, 397 if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base,
398 mv64360_pci_error_int_handler, 398 mv64360_pci_error_int_handler,
399 SA_INTERRUPT, PCI0_INTR_STR, (void *)0))) 399 IRQF_DISABLED, PCI0_INTR_STR, (void *)0)))
400 printk(KERN_WARNING "Can't register pci 0 error handler: %d", 400 printk(KERN_WARNING "Can't register pci 0 error handler: %d",
401 rc); 401 rc);
402 402
@@ -411,7 +411,7 @@ mv64360_register_hdlrs(void)
411 mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0); 411 mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0);
412 if ((rc = request_irq(MV64360_IRQ_PCI1 + mv64360_irq_base, 412 if ((rc = request_irq(MV64360_IRQ_PCI1 + mv64360_irq_base,
413 mv64360_pci_error_int_handler, 413 mv64360_pci_error_int_handler,
414 SA_INTERRUPT, PCI1_INTR_STR, (void *)1))) 414 IRQF_DISABLED, PCI1_INTR_STR, (void *)1)))
415 printk(KERN_WARNING "Can't register pci 1 error handler: %d", 415 printk(KERN_WARNING "Can't register pci 1 error handler: %d",
416 rc); 416 rc);
417 417
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 08973663fa24..aa0b95788705 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -575,18 +575,21 @@ void openpic_request_IPIs(void)
575 if (OpenPIC == NULL) 575 if (OpenPIC == NULL)
576 return; 576 return;
577 577
578 /* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */ 578 /*
579 * IPIs are marked IRQF_DISABLED as they must run with irqs
580 * disabled
581 */
579 request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset, 582 request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset,
580 openpic_ipi_action, SA_INTERRUPT, 583 openpic_ipi_action, IRQF_DISABLED,
581 "IPI0 (call function)", NULL); 584 "IPI0 (call function)", NULL);
582 request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+1, 585 request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+1,
583 openpic_ipi_action, SA_INTERRUPT, 586 openpic_ipi_action, IRQF_DISABLED,
584 "IPI1 (reschedule)", NULL); 587 "IPI1 (reschedule)", NULL);
585 request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+2, 588 request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+2,
586 openpic_ipi_action, SA_INTERRUPT, 589 openpic_ipi_action, IRQF_DISABLED,
587 "IPI2 (invalidate tlb)", NULL); 590 "IPI2 (invalidate tlb)", NULL);
588 request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+3, 591 request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+3,
589 openpic_ipi_action, SA_INTERRUPT, 592 openpic_ipi_action, IRQF_DISABLED,
590 "IPI3 (xmon break)", NULL); 593 "IPI3 (xmon break)", NULL);
591 594
592 for ( i = 0; i < OPENPIC_NUM_IPI ; i++ ) 595 for ( i = 0; i < OPENPIC_NUM_IPI ; i++ )
@@ -691,7 +694,7 @@ openpic_init_nmi_irq(u_int irq)
691 694
692static struct irqaction openpic_cascade_irqaction = { 695static struct irqaction openpic_cascade_irqaction = {
693 .handler = no_action, 696 .handler = no_action,
694 .flags = SA_INTERRUPT, 697 .flags = IRQF_DISABLED,
695 .mask = CPU_MASK_NONE, 698 .mask = CPU_MASK_NONE,
696}; 699};
697 700
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 821a141889de..224fbff79969 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -7,6 +7,14 @@ config MMU
7 bool 7 bool
8 default y 8 default y
9 9
10config LOCKDEP_SUPPORT
11 bool
12 default y
13
14config STACKTRACE_SUPPORT
15 bool
16 default y
17
10config RWSEM_GENERIC_SPINLOCK 18config RWSEM_GENERIC_SPINLOCK
11 bool 19 bool
12 20
diff --git a/arch/s390/Kconfig.debug b/arch/s390/Kconfig.debug
index f53b6d5300e5..2283933a9a93 100644
--- a/arch/s390/Kconfig.debug
+++ b/arch/s390/Kconfig.debug
@@ -1,5 +1,9 @@
1menu "Kernel hacking" 1menu "Kernel hacking"
2 2
3config TRACE_IRQFLAGS_SUPPORT
4 bool
5 default y
6
3source "lib/Kconfig.debug" 7source "lib/Kconfig.debug"
4 8
5endmenu 9endmenu
diff --git a/arch/s390/Makefile b/arch/s390/Makefile
index b3791fb094a8..74ef57dcfa60 100644
--- a/arch/s390/Makefile
+++ b/arch/s390/Makefile
@@ -34,6 +34,11 @@ cflags-$(CONFIG_MARCH_G5) += $(call cc-option,-march=g5)
34cflags-$(CONFIG_MARCH_Z900) += $(call cc-option,-march=z900) 34cflags-$(CONFIG_MARCH_Z900) += $(call cc-option,-march=z900)
35cflags-$(CONFIG_MARCH_Z990) += $(call cc-option,-march=z990) 35cflags-$(CONFIG_MARCH_Z990) += $(call cc-option,-march=z990)
36 36
37#
38# Prevent tail-call optimizations, to get clearer backtraces:
39#
40cflags-$(CONFIG_FRAME_POINTER) += -fno-optimize-sibling-calls
41
37# old style option for packed stacks 42# old style option for packed stacks
38ifeq ($(call cc-option-yn,-mkernel-backchain),y) 43ifeq ($(call cc-option-yn,-mkernel-backchain),y)
39cflags-$(CONFIG_PACK_STACK) += -mkernel-backchain -D__PACK_STACK 44cflags-$(CONFIG_PACK_STACK) += -mkernel-backchain -D__PACK_STACK
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 9269b5788fac..eabf00a6f770 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_COMPAT) += compat_linux.o compat_signal.o \
21obj-$(CONFIG_BINFMT_ELF32) += binfmt_elf32.o 21obj-$(CONFIG_BINFMT_ELF32) += binfmt_elf32.o
22 22
23obj-$(CONFIG_VIRT_TIMER) += vtime.o 23obj-$(CONFIG_VIRT_TIMER) += vtime.o
24obj-$(CONFIG_STACKTRACE) += stacktrace.o
24 25
25# Kexec part 26# Kexec part
26S390_KEXEC_OBJS := machine_kexec.o crash.o 27S390_KEXEC_OBJS := machine_kexec.o crash.o
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index d8948c342caf..5b5799ac8f83 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -58,6 +58,21 @@ STACK_SIZE = 1 << STACK_SHIFT
58 58
59#define BASED(name) name-system_call(%r13) 59#define BASED(name) name-system_call(%r13)
60 60
61#ifdef CONFIG_TRACE_IRQFLAGS
62 .macro TRACE_IRQS_ON
63 l %r1,BASED(.Ltrace_irq_on)
64 basr %r14,%r1
65 .endm
66
67 .macro TRACE_IRQS_OFF
68 l %r1,BASED(.Ltrace_irq_off)
69 basr %r14,%r1
70 .endm
71#else
72#define TRACE_IRQS_ON
73#define TRACE_IRQS_OFF
74#endif
75
61/* 76/*
62 * Register usage in interrupt handlers: 77 * Register usage in interrupt handlers:
63 * R9 - pointer to current task structure 78 * R9 - pointer to current task structure
@@ -361,6 +376,7 @@ ret_from_fork:
361 st %r15,SP_R15(%r15) # store stack pointer for new kthread 376 st %r15,SP_R15(%r15) # store stack pointer for new kthread
3620: l %r1,BASED(.Lschedtail) 3770: l %r1,BASED(.Lschedtail)
363 basr %r14,%r1 378 basr %r14,%r1
379 TRACE_IRQS_ON
364 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 380 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
365 b BASED(sysc_return) 381 b BASED(sysc_return)
366 382
@@ -516,6 +532,7 @@ pgm_no_vtime3:
516 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS 532 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
517 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 533 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
518 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 534 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
535 TRACE_IRQS_ON
519 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 536 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
520 b BASED(sysc_do_svc) 537 b BASED(sysc_do_svc)
521 538
@@ -539,9 +556,11 @@ io_int_handler:
539io_no_vtime: 556io_no_vtime:
540#endif 557#endif
541 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 558 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
559 TRACE_IRQS_OFF
542 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ 560 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
543 la %r2,SP_PTREGS(%r15) # address of register-save area 561 la %r2,SP_PTREGS(%r15) # address of register-save area
544 basr %r14,%r1 # branch to standard irq handler 562 basr %r14,%r1 # branch to standard irq handler
563 TRACE_IRQS_ON
545 564
546io_return: 565io_return:
547 tm SP_PSW+1(%r15),0x01 # returning to user ? 566 tm SP_PSW+1(%r15),0x01 # returning to user ?
@@ -651,10 +670,12 @@ ext_int_handler:
651ext_no_vtime: 670ext_no_vtime:
652#endif 671#endif
653 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 672 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
673 TRACE_IRQS_OFF
654 la %r2,SP_PTREGS(%r15) # address of register-save area 674 la %r2,SP_PTREGS(%r15) # address of register-save area
655 lh %r3,__LC_EXT_INT_CODE # get interruption code 675 lh %r3,__LC_EXT_INT_CODE # get interruption code
656 l %r1,BASED(.Ldo_extint) 676 l %r1,BASED(.Ldo_extint)
657 basr %r14,%r1 677 basr %r14,%r1
678 TRACE_IRQS_ON
658 b BASED(io_return) 679 b BASED(io_return)
659 680
660__critical_end: 681__critical_end:
@@ -731,8 +752,10 @@ mcck_no_vtime:
731 stosm __SF_EMPTY(%r15),0x04 # turn dat on 752 stosm __SF_EMPTY(%r15),0x04 # turn dat on
732 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 753 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
733 bno BASED(mcck_return) 754 bno BASED(mcck_return)
755 TRACE_IRQS_OFF
734 l %r1,BASED(.Ls390_handle_mcck) 756 l %r1,BASED(.Ls390_handle_mcck)
735 basr %r14,%r1 # call machine check handler 757 basr %r14,%r1 # call machine check handler
758 TRACE_IRQS_ON
736mcck_return: 759mcck_return:
737 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW 760 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
738 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 761 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
@@ -1012,7 +1035,11 @@ cleanup_io_leave_insn:
1012.Lvfork: .long sys_vfork 1035.Lvfork: .long sys_vfork
1013.Lschedtail: .long schedule_tail 1036.Lschedtail: .long schedule_tail
1014.Lsysc_table: .long sys_call_table 1037.Lsysc_table: .long sys_call_table
1015 1038#ifdef CONFIG_TRACE_IRQFLAGS
1039.Ltrace_irq_on:.long trace_hardirqs_on
1040.Ltrace_irq_off:
1041 .long trace_hardirqs_off
1042#endif
1016.Lcritical_start: 1043.Lcritical_start:
1017 .long __critical_start + 0x80000000 1044 .long __critical_start + 0x80000000
1018.Lcritical_end: 1045.Lcritical_end:
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 1ca499fa54b4..56f5f613b868 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -58,6 +58,19 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
58 58
59#define BASED(name) name-system_call(%r13) 59#define BASED(name) name-system_call(%r13)
60 60
61#ifdef CONFIG_TRACE_IRQFLAGS
62 .macro TRACE_IRQS_ON
63 brasl %r14,trace_hardirqs_on
64 .endm
65
66 .macro TRACE_IRQS_OFF
67 brasl %r14,trace_hardirqs_off
68 .endm
69#else
70#define TRACE_IRQS_ON
71#define TRACE_IRQS_OFF
72#endif
73
61 .macro STORE_TIMER lc_offset 74 .macro STORE_TIMER lc_offset
62#ifdef CONFIG_VIRT_CPU_ACCOUNTING 75#ifdef CONFIG_VIRT_CPU_ACCOUNTING
63 stpt \lc_offset 76 stpt \lc_offset
@@ -354,6 +367,7 @@ ret_from_fork:
354 jo 0f 367 jo 0f
355 stg %r15,SP_R15(%r15) # store stack pointer for new kthread 368 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
3560: brasl %r14,schedule_tail 3690: brasl %r14,schedule_tail
370 TRACE_IRQS_ON
357 stosm 24(%r15),0x03 # reenable interrupts 371 stosm 24(%r15),0x03 # reenable interrupts
358 j sysc_return 372 j sysc_return
359 373
@@ -535,6 +549,7 @@ pgm_no_vtime3:
535 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS 549 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
536 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 550 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
537 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 551 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
552 TRACE_IRQS_ON
538 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 553 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
539 j sysc_do_svc 554 j sysc_do_svc
540 555
@@ -557,8 +572,10 @@ io_int_handler:
557io_no_vtime: 572io_no_vtime:
558#endif 573#endif
559 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 574 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
575 TRACE_IRQS_OFF
560 la %r2,SP_PTREGS(%r15) # address of register-save area 576 la %r2,SP_PTREGS(%r15) # address of register-save area
561 brasl %r14,do_IRQ # call standard irq handler 577 brasl %r14,do_IRQ # call standard irq handler
578 TRACE_IRQS_ON
562 579
563io_return: 580io_return:
564 tm SP_PSW+1(%r15),0x01 # returning to user ? 581 tm SP_PSW+1(%r15),0x01 # returning to user ?
@@ -665,9 +682,11 @@ ext_int_handler:
665ext_no_vtime: 682ext_no_vtime:
666#endif 683#endif
667 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 684 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
685 TRACE_IRQS_OFF
668 la %r2,SP_PTREGS(%r15) # address of register-save area 686 la %r2,SP_PTREGS(%r15) # address of register-save area
669 llgh %r3,__LC_EXT_INT_CODE # get interruption code 687 llgh %r3,__LC_EXT_INT_CODE # get interruption code
670 brasl %r14,do_extint 688 brasl %r14,do_extint
689 TRACE_IRQS_ON
671 j io_return 690 j io_return
672 691
673__critical_end: 692__critical_end:
@@ -743,7 +762,9 @@ mcck_no_vtime:
743 stosm __SF_EMPTY(%r15),0x04 # turn dat on 762 stosm __SF_EMPTY(%r15),0x04 # turn dat on
744 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING 763 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
745 jno mcck_return 764 jno mcck_return
765 TRACE_IRQS_OFF
746 brasl %r14,s390_handle_mcck 766 brasl %r14,s390_handle_mcck
767 TRACE_IRQS_ON
747mcck_return: 768mcck_return:
748 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW 769 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
749 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 770 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c
index 480b6a5fef3a..1eef50918615 100644
--- a/arch/s390/kernel/irq.c
+++ b/arch/s390/kernel/irq.c
@@ -69,10 +69,6 @@ asmlinkage void do_softirq(void)
69 69
70 local_irq_save(flags); 70 local_irq_save(flags);
71 71
72 account_system_vtime(current);
73
74 local_bh_disable();
75
76 if (local_softirq_pending()) { 72 if (local_softirq_pending()) {
77 /* Get current stack pointer. */ 73 /* Get current stack pointer. */
78 asm volatile("la %0,0(15)" : "=a" (old)); 74 asm volatile("la %0,0(15)" : "=a" (old));
@@ -95,10 +91,6 @@ asmlinkage void do_softirq(void)
95 __do_softirq(); 91 __do_softirq();
96 } 92 }
97 93
98 account_system_vtime(current);
99
100 __local_bh_enable();
101
102 local_irq_restore(flags); 94 local_irq_restore(flags);
103} 95}
104 96
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 1f9399191794..78c8e5548caf 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -142,6 +142,7 @@ static void default_idle(void)
142 return; 142 return;
143 } 143 }
144 144
145 trace_hardirqs_on();
145 /* Wait for external, I/O or machine check interrupt. */ 146 /* Wait for external, I/O or machine check interrupt. */
146 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_WAIT | 147 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_WAIT |
147 PSW_MASK_IO | PSW_MASK_EXT); 148 PSW_MASK_IO | PSW_MASK_EXT);
diff --git a/arch/s390/kernel/stacktrace.c b/arch/s390/kernel/stacktrace.c
new file mode 100644
index 000000000000..de83f38288d0
--- /dev/null
+++ b/arch/s390/kernel/stacktrace.c
@@ -0,0 +1,90 @@
1/*
2 * arch/s390/kernel/stacktrace.c
3 *
4 * Stack trace management functions
5 *
6 * Copyright (C) IBM Corp. 2006
7 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
8 */
9
10#include <linux/sched.h>
11#include <linux/stacktrace.h>
12#include <linux/kallsyms.h>
13
14static inline unsigned long save_context_stack(struct stack_trace *trace,
15 unsigned int *skip,
16 unsigned long sp,
17 unsigned long low,
18 unsigned long high)
19{
20 struct stack_frame *sf;
21 struct pt_regs *regs;
22 unsigned long addr;
23
24 while(1) {
25 sp &= PSW_ADDR_INSN;
26 if (sp < low || sp > high)
27 return sp;
28 sf = (struct stack_frame *)sp;
29 while(1) {
30 addr = sf->gprs[8] & PSW_ADDR_INSN;
31 if (!(*skip))
32 trace->entries[trace->nr_entries++] = addr;
33 else
34 (*skip)--;
35 if (trace->nr_entries >= trace->max_entries)
36 return sp;
37 low = sp;
38 sp = sf->back_chain & PSW_ADDR_INSN;
39 if (!sp)
40 break;
41 if (sp <= low || sp > high - sizeof(*sf))
42 return sp;
43 sf = (struct stack_frame *)sp;
44 }
45 /* Zero backchain detected, check for interrupt frame. */
46 sp = (unsigned long)(sf + 1);
47 if (sp <= low || sp > high - sizeof(*regs))
48 return sp;
49 regs = (struct pt_regs *)sp;
50 addr = regs->psw.addr & PSW_ADDR_INSN;
51 if (!(*skip))
52 trace->entries[trace->nr_entries++] = addr;
53 else
54 (*skip)--;
55 if (trace->nr_entries >= trace->max_entries)
56 return sp;
57 low = sp;
58 sp = regs->gprs[15];
59 }
60}
61
62void save_stack_trace(struct stack_trace *trace,
63 struct task_struct *task, int all_contexts,
64 unsigned int skip)
65{
66 register unsigned long sp asm ("15");
67 unsigned long orig_sp;
68
69 sp &= PSW_ADDR_INSN;
70 orig_sp = sp;
71
72 sp = save_context_stack(trace, &skip, sp,
73 S390_lowcore.panic_stack - PAGE_SIZE,
74 S390_lowcore.panic_stack);
75 if ((sp != orig_sp) && !all_contexts)
76 return;
77 sp = save_context_stack(trace, &skip, sp,
78 S390_lowcore.async_stack - ASYNC_SIZE,
79 S390_lowcore.async_stack);
80 if ((sp != orig_sp) && !all_contexts)
81 return;
82 if (task)
83 save_context_stack(trace, &skip, sp,
84 (unsigned long) task_stack_page(task),
85 (unsigned long) task_stack_page(task) + THREAD_SIZE);
86 else
87 save_context_stack(trace, &skip, sp, S390_lowcore.thread_info,
88 S390_lowcore.thread_info + THREAD_SIZE);
89 return;
90}
diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c
index 046b896d04f9..f1f7c70c9402 100644
--- a/arch/sh/boards/snapgear/setup.c
+++ b/arch/sh/boards/snapgear/setup.c
@@ -50,7 +50,7 @@ static int __init eraseconfig_init(void)
50{ 50{
51 printk("SnapGear: EraseConfig init\n"); 51 printk("SnapGear: EraseConfig init\n");
52 /* Setup "EraseConfig" switch on external IRQ 0 */ 52 /* Setup "EraseConfig" switch on external IRQ 0 */
53 if (request_irq(IRL0_IRQ, eraseconfig_interrupt, SA_INTERRUPT, 53 if (request_irq(IRL0_IRQ, eraseconfig_interrupt, IRQF_DISABLED,
54 "Erase Config", NULL)) 54 "Erase Config", NULL))
55 printk("SnapGear: failed to register IRQ%d for Reset witch\n", 55 printk("SnapGear: failed to register IRQ%d for Reset witch\n",
56 IRL0_IRQ); 56 IRL0_IRQ);
diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c
index 9b361a91a1a6..ad126016720f 100644
--- a/arch/sh/cchips/hd6446x/hd64461/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64461/setup.c
@@ -133,7 +133,7 @@ int hd64461_irq_demux(int irq)
133 return __irq_demux(irq); 133 return __irq_demux(irq);
134} 134}
135 135
136static struct irqaction irq0 = { hd64461_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64461", NULL, NULL }; 136static struct irqaction irq0 = { hd64461_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "HD64461", NULL, NULL };
137 137
138int __init setup_hd64461(void) 138int __init setup_hd64461(void)
139{ 139{
diff --git a/arch/sh/cchips/hd6446x/hd64465/gpio.c b/arch/sh/cchips/hd6446x/hd64465/gpio.c
index 9785fdef868e..72320d02d69a 100644
--- a/arch/sh/cchips/hd6446x/hd64465/gpio.c
+++ b/arch/sh/cchips/hd6446x/hd64465/gpio.c
@@ -170,7 +170,7 @@ static int __init hd64465_gpio_init(void)
170 if (!request_region(HD64465_REG_GPACR, 0x1000, MODNAME)) 170 if (!request_region(HD64465_REG_GPACR, 0x1000, MODNAME))
171 return -EBUSY; 171 return -EBUSY;
172 if (request_irq(HD64465_IRQ_GPIO, hd64465_gpio_interrupt, 172 if (request_irq(HD64465_IRQ_GPIO, hd64465_gpio_interrupt,
173 SA_INTERRUPT, MODNAME, 0)) 173 IRQF_DISABLED, MODNAME, 0))
174 goto out_irqfailed; 174 goto out_irqfailed;
175 175
176 printk("HD64465 GPIO layer on irq %d\n", HD64465_IRQ_GPIO); 176 printk("HD64465 GPIO layer on irq %d\n", HD64465_IRQ_GPIO);
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c
index b2b0aa48a3a7..d2b2851bc44b 100644
--- a/arch/sh/cchips/hd6446x/hd64465/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64465/setup.c
@@ -153,7 +153,7 @@ int hd64465_irq_demux(int irq)
153 return irq; 153 return irq;
154} 154}
155 155
156static struct irqaction irq0 = { hd64465_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64465", NULL, NULL}; 156static struct irqaction irq0 = { hd64465_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "HD64465", NULL, NULL};
157 157
158 158
159static int __init setup_hd64465(void) 159static int __init setup_hd64465(void)
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
index 6a74464dab2d..0dc1fb8f9687 100644
--- a/arch/sh/cchips/voyagergx/irq.c
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -165,7 +165,7 @@ int voyagergx_irq_demux(int irq)
165static struct irqaction irq0 = { 165static struct irqaction irq0 = {
166 .name = "voyagergx", 166 .name = "voyagergx",
167 .handler = voyagergx_interrupt, 167 .handler = voyagergx_interrupt,
168 .flags = SA_INTERRUPT, 168 .flags = IRQF_DISABLED,
169 .mask = CPU_MASK_NONE, 169 .mask = CPU_MASK_NONE,
170}; 170};
171 171
diff --git a/arch/sh/drivers/dma/dma-g2.c b/arch/sh/drivers/dma/dma-g2.c
index 5afab6f56ec3..0f866f8789f0 100644
--- a/arch/sh/drivers/dma/dma-g2.c
+++ b/arch/sh/drivers/dma/dma-g2.c
@@ -56,7 +56,7 @@ static irqreturn_t g2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
56static struct irqaction g2_dma_irq = { 56static struct irqaction g2_dma_irq = {
57 .name = "g2 DMA handler", 57 .name = "g2 DMA handler",
58 .handler = g2_dma_interrupt, 58 .handler = g2_dma_interrupt,
59 .flags = SA_INTERRUPT, 59 .flags = IRQF_DISABLED,
60}; 60};
61 61
62static int g2_enable_dma(struct dma_channel *chan) 62static int g2_enable_dma(struct dma_channel *chan)
diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c
index df604975ccc8..30a580aa7cbd 100644
--- a/arch/sh/drivers/dma/dma-pvr2.c
+++ b/arch/sh/drivers/dma/dma-pvr2.c
@@ -70,7 +70,7 @@ static int pvr2_xfer_dma(struct dma_channel *chan)
70static struct irqaction pvr2_dma_irq = { 70static struct irqaction pvr2_dma_irq = {
71 .name = "pvr2 DMA handler", 71 .name = "pvr2 DMA handler",
72 .handler = pvr2_dma_interrupt, 72 .handler = pvr2_dma_interrupt,
73 .flags = SA_INTERRUPT, 73 .flags = IRQF_DISABLED,
74}; 74};
75 75
76static struct dma_ops pvr2_dma_ops = { 76static struct dma_ops pvr2_dma_ops = {
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index fecd8f8d0466..e028a2d2a4ea 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -90,7 +90,7 @@ static int sh_dmac_request_dma(struct dma_channel *chan)
90 chan->chan); 90 chan->chan);
91 91
92 return request_irq(get_dmte_irq(chan->chan), dma_tei, 92 return request_irq(get_dmte_irq(chan->chan), dma_tei,
93 SA_INTERRUPT, name, chan); 93 IRQF_DISABLED, name, chan);
94} 94}
95 95
96static void sh_dmac_free_dma(struct dma_channel *chan) 96static void sh_dmac_free_dma(struct dma_channel *chan)
@@ -258,7 +258,7 @@ static int __init sh_dmac_init(void)
258 258
259#ifdef CONFIG_CPU_SH4 259#ifdef CONFIG_CPU_SH4
260 make_ipr_irq(DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); 260 make_ipr_irq(DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
261 i = request_irq(DMAE_IRQ, dma_err, SA_INTERRUPT, "DMAC Address Error", 0); 261 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
262 if (i < 0) 262 if (i < 0)
263 return i; 263 return i;
264#endif 264#endif
diff --git a/arch/sh/drivers/pci/pci-st40.c b/arch/sh/drivers/pci/pci-st40.c
index 21f3017e5c28..7c81b8b65bb5 100644
--- a/arch/sh/drivers/pci/pci-st40.c
+++ b/arch/sh/drivers/pci/pci-st40.c
@@ -447,7 +447,7 @@ static int __init pcibios_init(void)
447 PHYSADDR(memory_end) - PHYSADDR(memory_start)); 447 PHYSADDR(memory_end) - PHYSADDR(memory_start));
448 448
449 if (request_irq(ST40PCI_ERR_IRQ, st40_pci_irq, 449 if (request_irq(ST40PCI_ERR_IRQ, st40_pci_irq,
450 SA_INTERRUPT, "st40pci", NULL)) { 450 IRQF_DISABLED, "st40pci", NULL)) {
451 printk(KERN_ERR "st40pci: Cannot hook interrupt\n"); 451 printk(KERN_ERR "st40pci: Cannot hook interrupt\n");
452 return -EIO; 452 return -EIO;
453 } 453 }
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 96a64cb13106..d4212add53b2 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -107,7 +107,7 @@ static irqreturn_t tmu_timer_interrupt(int irq, void *dev_id,
107static struct irqaction tmu_irq = { 107static struct irqaction tmu_irq = {
108 .name = "timer", 108 .name = "timer",
109 .handler = tmu_timer_interrupt, 109 .handler = tmu_timer_interrupt,
110 .flags = SA_INTERRUPT, 110 .flags = IRQF_DISABLED,
111 .mask = CPU_MASK_NONE, 111 .mask = CPU_MASK_NONE,
112}; 112};
113 113
diff --git a/arch/sh64/kernel/dma.c b/arch/sh64/kernel/dma.c
index 09cd9f4670b5..32c6f0549bf1 100644
--- a/arch/sh64/kernel/dma.c
+++ b/arch/sh64/kernel/dma.c
@@ -115,7 +115,7 @@ static irqreturn_t dma_mte(int irq, void *dev_id, struct pt_regs *regs)
115 115
116static struct irqaction irq_dmte = { 116static struct irqaction irq_dmte = {
117 .handler = dma_mte, 117 .handler = dma_mte,
118 .flags = SA_INTERRUPT, 118 .flags = IRQF_DISABLED,
119 .name = "DMA MTE", 119 .name = "DMA MTE",
120}; 120};
121 121
@@ -152,7 +152,7 @@ static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs)
152 152
153static struct irqaction irq_derr = { 153static struct irqaction irq_derr = {
154 .handler = dma_err, 154 .handler = dma_err,
155 .flags = SA_INTERRUPT, 155 .flags = IRQF_DISABLED,
156 .name = "DMA Error", 156 .name = "DMA Error",
157}; 157};
158 158
diff --git a/arch/sh64/kernel/pci_sh5.c b/arch/sh64/kernel/pci_sh5.c
index 3c04951ff736..9dae689b6a9b 100644
--- a/arch/sh64/kernel/pci_sh5.c
+++ b/arch/sh64/kernel/pci_sh5.c
@@ -473,13 +473,13 @@ static void __init pcibios_size_bridges(void)
473static int __init pcibios_init(void) 473static int __init pcibios_init(void)
474{ 474{
475 if (request_irq(IRQ_ERR, pcish5_err_irq, 475 if (request_irq(IRQ_ERR, pcish5_err_irq,
476 SA_INTERRUPT, "PCI Error",NULL) < 0) { 476 IRQF_DISABLED, "PCI Error",NULL) < 0) {
477 printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n"); 477 printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n");
478 return -EINVAL; 478 return -EINVAL;
479 } 479 }
480 480
481 if (request_irq(IRQ_SERR, pcish5_serr_irq, 481 if (request_irq(IRQ_SERR, pcish5_serr_irq,
482 SA_INTERRUPT, "PCI SERR interrupt", NULL) < 0) { 482 IRQF_DISABLED, "PCI SERR interrupt", NULL) < 0) {
483 printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n"); 483 printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n");
484 return -EINVAL; 484 return -EINVAL;
485 } 485 }
diff --git a/arch/sh64/kernel/time.c b/arch/sh64/kernel/time.c
index ba9eb992f4a5..b8162e59030e 100644
--- a/arch/sh64/kernel/time.c
+++ b/arch/sh64/kernel/time.c
@@ -484,8 +484,8 @@ static irqreturn_t sh64_rtc_interrupt(int irq, void *dev_id,
484 return IRQ_HANDLED; 484 return IRQ_HANDLED;
485} 485}
486 486
487static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; 487static struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL};
488static struct irqaction irq1 = { sh64_rtc_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "rtc", NULL, NULL}; 488static struct irqaction irq1 = { sh64_rtc_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "rtc", NULL, NULL};
489 489
490void __init time_init(void) 490void __init time_init(void)
491{ 491{
diff --git a/arch/sh64/mach-cayman/irq.c b/arch/sh64/mach-cayman/irq.c
index cac94219dd5f..228ce61c3515 100644
--- a/arch/sh64/mach-cayman/irq.c
+++ b/arch/sh64/mach-cayman/irq.c
@@ -44,13 +44,13 @@ static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id, struct pt_regs *
44static struct irqaction cayman_action_smsc = { 44static struct irqaction cayman_action_smsc = {
45 .name = "Cayman SMSC Mux", 45 .name = "Cayman SMSC Mux",
46 .handler = cayman_interrupt_smsc, 46 .handler = cayman_interrupt_smsc,
47 .flags = SA_INTERRUPT, 47 .flags = IRQF_DISABLED,
48}; 48};
49 49
50static struct irqaction cayman_action_pci2 = { 50static struct irqaction cayman_action_pci2 = {
51 .name = "Cayman PCI2 Mux", 51 .name = "Cayman PCI2 Mux",
52 .handler = cayman_interrupt_pci2, 52 .handler = cayman_interrupt_pci2,
53 .flags = SA_INTERRUPT, 53 .flags = IRQF_DISABLED,
54}; 54};
55 55
56static void enable_cayman_irq(unsigned int irq) 56static void enable_cayman_irq(unsigned int irq)
diff --git a/arch/sparc/kernel/irq.c b/arch/sparc/kernel/irq.c
index b81af076ef48..cde73327ca96 100644
--- a/arch/sparc/kernel/irq.c
+++ b/arch/sparc/kernel/irq.c
@@ -191,11 +191,11 @@ int show_interrupts(struct seq_file *p, void *v)
191 } 191 }
192#endif 192#endif
193 seq_printf(p, " %c %s", 193 seq_printf(p, " %c %s",
194 (action->flags & SA_INTERRUPT) ? '+' : ' ', 194 (action->flags & IRQF_DISABLED) ? '+' : ' ',
195 action->name); 195 action->name);
196 for (action=action->next; action; action = action->next) { 196 for (action=action->next; action; action = action->next) {
197 seq_printf(p, ",%s %s", 197 seq_printf(p, ",%s %s",
198 (action->flags & SA_INTERRUPT) ? " +" : "", 198 (action->flags & IRQF_DISABLED) ? " +" : "",
199 action->name); 199 action->name);
200 } 200 }
201 seq_putc(p, '\n'); 201 seq_putc(p, '\n');
@@ -243,7 +243,7 @@ void free_irq(unsigned int irq, void *dev_id)
243 printk("Trying to free free shared IRQ%d\n",irq); 243 printk("Trying to free free shared IRQ%d\n",irq);
244 goto out_unlock; 244 goto out_unlock;
245 } 245 }
246 } else if (action->flags & SA_SHIRQ) { 246 } else if (action->flags & IRQF_SHARED) {
247 printk("Trying to free shared IRQ%d with NULL device ID\n", irq); 247 printk("Trying to free shared IRQ%d with NULL device ID\n", irq);
248 goto out_unlock; 248 goto out_unlock;
249 } 249 }
@@ -395,9 +395,9 @@ int request_fast_irq(unsigned int irq,
395 395
396 action = sparc_irq[cpu_irq].action; 396 action = sparc_irq[cpu_irq].action;
397 if(action) { 397 if(action) {
398 if(action->flags & SA_SHIRQ) 398 if(action->flags & IRQF_SHARED)
399 panic("Trying to register fast irq when already shared.\n"); 399 panic("Trying to register fast irq when already shared.\n");
400 if(irqflags & SA_SHIRQ) 400 if(irqflags & IRQF_SHARED)
401 panic("Trying to register fast irq as shared.\n"); 401 panic("Trying to register fast irq as shared.\n");
402 402
403 /* Anyway, someone already owns it so cannot be made fast. */ 403 /* Anyway, someone already owns it so cannot be made fast. */
@@ -497,11 +497,11 @@ int request_irq(unsigned int irq,
497 actionp = &sparc_irq[cpu_irq].action; 497 actionp = &sparc_irq[cpu_irq].action;
498 action = *actionp; 498 action = *actionp;
499 if (action) { 499 if (action) {
500 if (!(action->flags & SA_SHIRQ) || !(irqflags & SA_SHIRQ)) { 500 if (!(action->flags & IRQF_SHARED) || !(irqflags & IRQF_SHARED)) {
501 ret = -EBUSY; 501 ret = -EBUSY;
502 goto out_unlock; 502 goto out_unlock;
503 } 503 }
504 if ((action->flags & SA_INTERRUPT) != (irqflags & SA_INTERRUPT)) { 504 if ((action->flags & IRQF_DISABLED) != (irqflags & IRQF_DISABLED)) {
505 printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq); 505 printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq);
506 ret = -EBUSY; 506 ret = -EBUSY;
507 goto out_unlock; 507 goto out_unlock;
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 22422ff10602..bfd31aac2df3 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -745,7 +745,7 @@ void __init pci_time_init(void)
745 writel (PCI_COUNTER_IRQ_SET(timer_irq, 0), 745 writel (PCI_COUNTER_IRQ_SET(timer_irq, 0),
746 pcic->pcic_regs+PCI_COUNTER_IRQ); 746 pcic->pcic_regs+PCI_COUNTER_IRQ);
747 irq = request_irq(timer_irq, pcic_timer_handler, 747 irq = request_irq(timer_irq, pcic_timer_handler,
748 (SA_INTERRUPT | SA_STATIC_ALLOC), "timer", NULL); 748 (IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL);
749 if (irq) { 749 if (irq) {
750 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq); 750 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq);
751 prom_halt(); 751 prom_halt();
diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c
index 50e988b9c8c3..4be2c86ea540 100644
--- a/arch/sparc/kernel/sun4c_irq.c
+++ b/arch/sparc/kernel/sun4c_irq.c
@@ -179,7 +179,7 @@ static void __init sun4c_init_timers(irqreturn_t (*counter_fn)(int, void *, stru
179 179
180 irq = request_irq(TIMER_IRQ, 180 irq = request_irq(TIMER_IRQ,
181 counter_fn, 181 counter_fn,
182 (SA_INTERRUPT | SA_STATIC_ALLOC), 182 (IRQF_DISABLED | SA_STATIC_ALLOC),
183 "timer", NULL); 183 "timer", NULL);
184 if (irq) { 184 if (irq) {
185 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ); 185 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c
index cbf8ee81cf5b..74eed9775ac0 100644
--- a/arch/sparc/kernel/sun4d_irq.c
+++ b/arch/sparc/kernel/sun4d_irq.c
@@ -107,13 +107,13 @@ found_it: seq_printf(p, "%3d: ", i);
107 kstat_cpu(cpu_logical_map(x)).irqs[i]); 107 kstat_cpu(cpu_logical_map(x)).irqs[i]);
108#endif 108#endif
109 seq_printf(p, "%c %s", 109 seq_printf(p, "%c %s",
110 (action->flags & SA_INTERRUPT) ? '+' : ' ', 110 (action->flags & IRQF_DISABLED) ? '+' : ' ',
111 action->name); 111 action->name);
112 action = action->next; 112 action = action->next;
113 for (;;) { 113 for (;;) {
114 for (; action; action = action->next) { 114 for (; action; action = action->next) {
115 seq_printf(p, ",%s %s", 115 seq_printf(p, ",%s %s",
116 (action->flags & SA_INTERRUPT) ? " +" : "", 116 (action->flags & IRQF_DISABLED) ? " +" : "",
117 action->name); 117 action->name);
118 } 118 }
119 if (!sbusl) break; 119 if (!sbusl) break;
@@ -160,7 +160,7 @@ void sun4d_free_irq(unsigned int irq, void *dev_id)
160 printk("Trying to free free shared IRQ%d\n",irq); 160 printk("Trying to free free shared IRQ%d\n",irq);
161 goto out_unlock; 161 goto out_unlock;
162 } 162 }
163 } else if (action->flags & SA_SHIRQ) { 163 } else if (action->flags & IRQF_SHARED) {
164 printk("Trying to free shared IRQ%d with NULL device ID\n", irq); 164 printk("Trying to free shared IRQ%d with NULL device ID\n", irq);
165 goto out_unlock; 165 goto out_unlock;
166 } 166 }
@@ -298,13 +298,13 @@ int sun4d_request_irq(unsigned int irq,
298 action = *actionp; 298 action = *actionp;
299 299
300 if (action) { 300 if (action) {
301 if ((action->flags & SA_SHIRQ) && (irqflags & SA_SHIRQ)) { 301 if ((action->flags & IRQF_SHARED) && (irqflags & IRQF_SHARED)) {
302 for (tmp = action; tmp->next; tmp = tmp->next); 302 for (tmp = action; tmp->next; tmp = tmp->next);
303 } else { 303 } else {
304 ret = -EBUSY; 304 ret = -EBUSY;
305 goto out_unlock; 305 goto out_unlock;
306 } 306 }
307 if ((action->flags & SA_INTERRUPT) ^ (irqflags & SA_INTERRUPT)) { 307 if ((action->flags & IRQF_DISABLED) ^ (irqflags & IRQF_DISABLED)) {
308 printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq); 308 printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq);
309 ret = -EBUSY; 309 ret = -EBUSY;
310 goto out_unlock; 310 goto out_unlock;
@@ -490,7 +490,7 @@ static void __init sun4d_init_timers(irqreturn_t (*counter_fn)(int, void *, stru
490 490
491 irq = request_irq(TIMER_IRQ, 491 irq = request_irq(TIMER_IRQ,
492 counter_fn, 492 counter_fn,
493 (SA_INTERRUPT | SA_STATIC_ALLOC), 493 (IRQF_DISABLED | SA_STATIC_ALLOC),
494 "timer", NULL); 494 "timer", NULL);
495 if (irq) { 495 if (irq) {
496 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ); 496 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c
index 38ac672b1149..7cefa301efea 100644
--- a/arch/sparc/kernel/sun4m_irq.c
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -278,7 +278,7 @@ static void __init sun4m_init_timers(irqreturn_t (*counter_fn)(int, void *, stru
278 278
279 irq = request_irq(TIMER_IRQ, 279 irq = request_irq(TIMER_IRQ,
280 counter_fn, 280 counter_fn,
281 (SA_INTERRUPT | SA_STATIC_ALLOC), 281 (IRQF_DISABLED | SA_STATIC_ALLOC),
282 "timer", NULL); 282 "timer", NULL);
283 if (irq) { 283 if (irq) {
284 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ); 284 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
diff --git a/arch/sparc/kernel/tick14.c b/arch/sparc/kernel/tick14.c
index 591547af4c65..d3b4daac705f 100644
--- a/arch/sparc/kernel/tick14.c
+++ b/arch/sparc/kernel/tick14.c
@@ -74,7 +74,7 @@ void claim_ticker14(irqreturn_t (*handler)(int, void *, struct pt_regs *),
74 74
75 if (!request_irq(irq_nr, 75 if (!request_irq(irq_nr,
76 handler, 76 handler,
77 (SA_INTERRUPT | SA_STATIC_ALLOC), 77 (IRQF_DISABLED | SA_STATIC_ALLOC),
78 "counter14", 78 "counter14",
79 NULL)) { 79 NULL)) {
80 install_linux_ticker(); 80 install_linux_ticker();
diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc64/kernel/ebus.c
index a1023bb1a217..8a9b470e1b65 100644
--- a/arch/sparc64/kernel/ebus.c
+++ b/arch/sparc64/kernel/ebus.c
@@ -140,7 +140,7 @@ int ebus_dma_irq_enable(struct ebus_dma_info *p, int on)
140 140
141 if (on) { 141 if (on) {
142 if (p->flags & EBUS_DMA_FLAG_USE_EBDMA_HANDLER) { 142 if (p->flags & EBUS_DMA_FLAG_USE_EBDMA_HANDLER) {
143 if (request_irq(p->irq, ebus_dma_irq, SA_SHIRQ, p->name, p)) 143 if (request_irq(p->irq, ebus_dma_irq, IRQF_SHARED, p->name, p))
144 return -EBUSY; 144 return -EBUSY;
145 } 145 }
146 146
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index bf7b32b36705..197a7ffd57ee 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -863,11 +863,11 @@ static void psycho_register_error_handlers(struct pci_controller_info *p)
863 if (op->num_irqs < 6) 863 if (op->num_irqs < 6)
864 return; 864 return;
865 865
866 request_irq(op->irqs[1], psycho_ue_intr, SA_SHIRQ, "PSYCHO UE", p); 866 request_irq(op->irqs[1], psycho_ue_intr, IRQF_SHARED, "PSYCHO UE", p);
867 request_irq(op->irqs[2], psycho_ce_intr, SA_SHIRQ, "PSYCHO CE", p); 867 request_irq(op->irqs[2], psycho_ce_intr, IRQF_SHARED, "PSYCHO CE", p);
868 request_irq(op->irqs[5], psycho_pcierr_intr, SA_SHIRQ, 868 request_irq(op->irqs[5], psycho_pcierr_intr, IRQF_SHARED,
869 "PSYCHO PCIERR-A", &p->pbm_A); 869 "PSYCHO PCIERR-A", &p->pbm_A);
870 request_irq(op->irqs[0], psycho_pcierr_intr, SA_SHIRQ, 870 request_irq(op->irqs[0], psycho_pcierr_intr, IRQF_SHARED,
871 "PSYCHO PCIERR-B", &p->pbm_B); 871 "PSYCHO PCIERR-B", &p->pbm_B);
872 872
873 /* Enable UE and CE interrupts for controller. */ 873 /* Enable UE and CE interrupts for controller. */
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 5e087b0fb4c9..45891850b90d 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -854,14 +854,14 @@ static void sabre_register_error_handlers(struct pci_controller_info *p)
854 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR | 854 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR |
855 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE)); 855 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE));
856 856
857 request_irq(op->irqs[1], sabre_ue_intr, SA_SHIRQ, "SABRE UE", p); 857 request_irq(op->irqs[1], sabre_ue_intr, IRQF_SHARED, "SABRE UE", p);
858 858
859 sabre_write(base + SABRE_CE_AFSR, 859 sabre_write(base + SABRE_CE_AFSR,
860 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | 860 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR |
861 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR)); 861 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR));
862 862
863 request_irq(op->irqs[2], sabre_ce_intr, SA_SHIRQ, "SABRE CE", p); 863 request_irq(op->irqs[2], sabre_ce_intr, IRQF_SHARED, "SABRE CE", p);
864 request_irq(op->irqs[0], sabre_pcierr_intr, SA_SHIRQ, 864 request_irq(op->irqs[0], sabre_pcierr_intr, IRQF_SHARED,
865 "SABRE PCIERR", p); 865 "SABRE PCIERR", p);
866 866
867 tmp = sabre_read(base + SABRE_PCICTRL); 867 tmp = sabre_read(base + SABRE_PCICTRL);
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 5c6e2a9b91f8..75ade83ecc65 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -998,32 +998,32 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
998 pbm = pbm_for_ino(p, SCHIZO_UE_INO); 998 pbm = pbm_for_ino(p, SCHIZO_UE_INO);
999 op = of_find_device_by_node(pbm->prom_node); 999 op = of_find_device_by_node(pbm->prom_node);
1000 if (op) 1000 if (op)
1001 request_irq(op->irqs[1], schizo_ue_intr, SA_SHIRQ, 1001 request_irq(op->irqs[1], schizo_ue_intr, IRQF_SHARED,
1002 "TOMATILLO_UE", p); 1002 "TOMATILLO_UE", p);
1003 1003
1004 pbm = pbm_for_ino(p, SCHIZO_CE_INO); 1004 pbm = pbm_for_ino(p, SCHIZO_CE_INO);
1005 op = of_find_device_by_node(pbm->prom_node); 1005 op = of_find_device_by_node(pbm->prom_node);
1006 if (op) 1006 if (op)
1007 request_irq(op->irqs[2], schizo_ce_intr, SA_SHIRQ, 1007 request_irq(op->irqs[2], schizo_ce_intr, IRQF_SHARED,
1008 "TOMATILLO CE", p); 1008 "TOMATILLO CE", p);
1009 1009
1010 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO); 1010 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
1011 op = of_find_device_by_node(pbm->prom_node); 1011 op = of_find_device_by_node(pbm->prom_node);
1012 if (op) 1012 if (op)
1013 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ, 1013 request_irq(op->irqs[0], schizo_pcierr_intr, IRQF_SHARED,
1014 "TOMATILLO PCIERR-A", pbm); 1014 "TOMATILLO PCIERR-A", pbm);
1015 1015
1016 1016
1017 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO); 1017 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
1018 op = of_find_device_by_node(pbm->prom_node); 1018 op = of_find_device_by_node(pbm->prom_node);
1019 if (op) 1019 if (op)
1020 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ, 1020 request_irq(op->irqs[0], schizo_pcierr_intr, IRQF_SHARED,
1021 "TOMATILLO PCIERR-B", pbm); 1021 "TOMATILLO PCIERR-B", pbm);
1022 1022
1023 pbm = pbm_for_ino(p, SCHIZO_SERR_INO); 1023 pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
1024 op = of_find_device_by_node(pbm->prom_node); 1024 op = of_find_device_by_node(pbm->prom_node);
1025 if (op) 1025 if (op)
1026 request_irq(op->irqs[3], schizo_safarierr_intr, SA_SHIRQ, 1026 request_irq(op->irqs[3], schizo_safarierr_intr, IRQF_SHARED,
1027 "TOMATILLO SERR", p); 1027 "TOMATILLO SERR", p);
1028 1028
1029 /* Enable UE and CE interrupts for controller. */ 1029 /* Enable UE and CE interrupts for controller. */
@@ -1106,32 +1106,32 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
1106 pbm = pbm_for_ino(p, SCHIZO_UE_INO); 1106 pbm = pbm_for_ino(p, SCHIZO_UE_INO);
1107 op = of_find_device_by_node(pbm->prom_node); 1107 op = of_find_device_by_node(pbm->prom_node);
1108 if (op) 1108 if (op)
1109 request_irq(op->irqs[1], schizo_ue_intr, SA_SHIRQ, 1109 request_irq(op->irqs[1], schizo_ue_intr, IRQF_SHARED,
1110 "SCHIZO_UE", p); 1110 "SCHIZO_UE", p);
1111 1111
1112 pbm = pbm_for_ino(p, SCHIZO_CE_INO); 1112 pbm = pbm_for_ino(p, SCHIZO_CE_INO);
1113 op = of_find_device_by_node(pbm->prom_node); 1113 op = of_find_device_by_node(pbm->prom_node);
1114 if (op) 1114 if (op)
1115 request_irq(op->irqs[2], schizo_ce_intr, SA_SHIRQ, 1115 request_irq(op->irqs[2], schizo_ce_intr, IRQF_SHARED,
1116 "SCHIZO CE", p); 1116 "SCHIZO CE", p);
1117 1117
1118 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO); 1118 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
1119 op = of_find_device_by_node(pbm->prom_node); 1119 op = of_find_device_by_node(pbm->prom_node);
1120 if (op) 1120 if (op)
1121 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ, 1121 request_irq(op->irqs[0], schizo_pcierr_intr, IRQF_SHARED,
1122 "SCHIZO PCIERR-A", pbm); 1122 "SCHIZO PCIERR-A", pbm);
1123 1123
1124 1124
1125 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO); 1125 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
1126 op = of_find_device_by_node(pbm->prom_node); 1126 op = of_find_device_by_node(pbm->prom_node);
1127 if (op) 1127 if (op)
1128 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ, 1128 request_irq(op->irqs[0], schizo_pcierr_intr, IRQF_SHARED,
1129 "SCHIZO PCIERR-B", pbm); 1129 "SCHIZO PCIERR-B", pbm);
1130 1130
1131 pbm = pbm_for_ino(p, SCHIZO_SERR_INO); 1131 pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
1132 op = of_find_device_by_node(pbm->prom_node); 1132 op = of_find_device_by_node(pbm->prom_node);
1133 if (op) 1133 if (op)
1134 request_irq(op->irqs[3], schizo_safarierr_intr, SA_SHIRQ, 1134 request_irq(op->irqs[3], schizo_safarierr_intr, IRQF_SHARED,
1135 "SCHIZO SERR", p); 1135 "SCHIZO SERR", p);
1136 1136
1137 /* Enable UE and CE interrupts for controller. */ 1137 /* Enable UE and CE interrupts for controller. */
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c
index ef68aa4fec65..c49a57795743 100644
--- a/arch/sparc64/kernel/sbus.c
+++ b/arch/sparc64/kernel/sbus.c
@@ -1065,7 +1065,7 @@ static void __init sysio_register_error_handlers(struct sbus_bus *sbus)
1065 1065
1066 irq = sbus_build_irq(sbus, SYSIO_UE_INO); 1066 irq = sbus_build_irq(sbus, SYSIO_UE_INO);
1067 if (request_irq(irq, sysio_ue_handler, 1067 if (request_irq(irq, sysio_ue_handler,
1068 SA_SHIRQ, "SYSIO UE", sbus) < 0) { 1068 IRQF_SHARED, "SYSIO UE", sbus) < 0) {
1069 prom_printf("SYSIO[%x]: Cannot register UE interrupt.\n", 1069 prom_printf("SYSIO[%x]: Cannot register UE interrupt.\n",
1070 sbus->portid); 1070 sbus->portid);
1071 prom_halt(); 1071 prom_halt();
@@ -1073,7 +1073,7 @@ static void __init sysio_register_error_handlers(struct sbus_bus *sbus)
1073 1073
1074 irq = sbus_build_irq(sbus, SYSIO_CE_INO); 1074 irq = sbus_build_irq(sbus, SYSIO_CE_INO);
1075 if (request_irq(irq, sysio_ce_handler, 1075 if (request_irq(irq, sysio_ce_handler,
1076 SA_SHIRQ, "SYSIO CE", sbus) < 0) { 1076 IRQF_SHARED, "SYSIO CE", sbus) < 0) {
1077 prom_printf("SYSIO[%x]: Cannot register CE interrupt.\n", 1077 prom_printf("SYSIO[%x]: Cannot register CE interrupt.\n",
1078 sbus->portid); 1078 sbus->portid);
1079 prom_halt(); 1079 prom_halt();
@@ -1081,7 +1081,7 @@ static void __init sysio_register_error_handlers(struct sbus_bus *sbus)
1081 1081
1082 irq = sbus_build_irq(sbus, SYSIO_SBUSERR_INO); 1082 irq = sbus_build_irq(sbus, SYSIO_SBUSERR_INO);
1083 if (request_irq(irq, sysio_sbus_error_handler, 1083 if (request_irq(irq, sysio_sbus_error_handler,
1084 SA_SHIRQ, "SYSIO SBUS Error", sbus) < 0) { 1084 IRQF_SHARED, "SYSIO SBUS Error", sbus) < 0) {
1085 prom_printf("SYSIO[%x]: Cannot register SBUS Error interrupt.\n", 1085 prom_printf("SYSIO[%x]: Cannot register SBUS Error interrupt.\n",
1086 sbus->portid); 1086 sbus->portid);
1087 prom_halt(); 1087 prom_halt();
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index 5ca57ca33713..ebebaabb78ad 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -373,7 +373,7 @@ static irqreturn_t line_write_interrupt(int irq, void *data,
373 int err; 373 int err;
374 374
375 /* Interrupts are enabled here because we registered the interrupt with 375 /* Interrupts are enabled here because we registered the interrupt with
376 * SA_INTERRUPT (see line_setup_irq).*/ 376 * IRQF_DISABLED (see line_setup_irq).*/
377 377
378 spin_lock_irq(&line->lock); 378 spin_lock_irq(&line->lock);
379 err = flush_buffer(line); 379 err = flush_buffer(line);
@@ -406,7 +406,7 @@ static irqreturn_t line_write_interrupt(int irq, void *data,
406int line_setup_irq(int fd, int input, int output, struct line *line, void *data) 406int line_setup_irq(int fd, int input, int output, struct line *line, void *data)
407{ 407{
408 struct line_driver *driver = line->driver; 408 struct line_driver *driver = line->driver;
409 int err = 0, flags = SA_INTERRUPT | SA_SHIRQ | SA_SAMPLE_RANDOM; 409 int err = 0, flags = IRQF_DISABLED | IRQF_SHARED | IRQF_SAMPLE_RANDOM;
410 410
411 if (input) 411 if (input)
412 err = um_request_irq(driver->read_irq, fd, IRQ_READ, 412 err = um_request_irq(driver->read_irq, fd, IRQ_READ,
@@ -767,7 +767,7 @@ void register_winch_irq(int fd, int tty_fd, int pid, struct tty_struct *tty)
767 spin_unlock(&winch_handler_lock); 767 spin_unlock(&winch_handler_lock);
768 768
769 if(um_request_irq(WINCH_IRQ, fd, IRQ_READ, winch_interrupt, 769 if(um_request_irq(WINCH_IRQ, fd, IRQ_READ, winch_interrupt,
770 SA_INTERRUPT | SA_SHIRQ | SA_SAMPLE_RANDOM, 770 IRQF_DISABLED | IRQF_SHARED | IRQF_SAMPLE_RANDOM,
771 "winch", winch) < 0) 771 "winch", winch) < 0)
772 printk("register_winch_irq - failed to register IRQ\n"); 772 printk("register_winch_irq - failed to register IRQ\n");
773} 773}
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index 79149314ed04..b414522f7686 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -777,7 +777,7 @@ static int mconsole_init(void)
777 register_reboot_notifier(&reboot_notifier); 777 register_reboot_notifier(&reboot_notifier);
778 778
779 err = um_request_irq(MCONSOLE_IRQ, sock, IRQ_READ, mconsole_interrupt, 779 err = um_request_irq(MCONSOLE_IRQ, sock, IRQ_READ, mconsole_interrupt,
780 SA_INTERRUPT | SA_SHIRQ | SA_SAMPLE_RANDOM, 780 IRQF_DISABLED | IRQF_SHARED | IRQF_SAMPLE_RANDOM,
781 "mconsole", (void *)sock); 781 "mconsole", (void *)sock);
782 if (err){ 782 if (err){
783 printk("Failed to get IRQ for management console\n"); 783 printk("Failed to get IRQ for management console\n");
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index 8c7279bb353b..501f95675d89 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -128,7 +128,7 @@ static int uml_net_open(struct net_device *dev)
128 } 128 }
129 129
130 err = um_request_irq(dev->irq, lp->fd, IRQ_READ, uml_net_interrupt, 130 err = um_request_irq(dev->irq, lp->fd, IRQ_READ, uml_net_interrupt,
131 SA_INTERRUPT | SA_SHIRQ, dev->name, dev); 131 IRQF_DISABLED | IRQF_SHARED, dev->name, dev);
132 if(err != 0){ 132 if(err != 0){
133 printk(KERN_ERR "uml_net_open: failed to get irq(%d)\n", err); 133 printk(KERN_ERR "uml_net_open: failed to get irq(%d)\n", err);
134 err = -ENETUNREACH; 134 err = -ENETUNREACH;
diff --git a/arch/um/drivers/port_kern.c b/arch/um/drivers/port_kern.c
index 189839e4f1d4..73755f37a8a8 100644
--- a/arch/um/drivers/port_kern.c
+++ b/arch/um/drivers/port_kern.c
@@ -105,7 +105,7 @@ static int port_accept(struct port_list *port)
105 .port = port }); 105 .port = port });
106 106
107 if(um_request_irq(TELNETD_IRQ, socket[0], IRQ_READ, pipe_interrupt, 107 if(um_request_irq(TELNETD_IRQ, socket[0], IRQ_READ, pipe_interrupt,
108 SA_INTERRUPT | SA_SHIRQ | SA_SAMPLE_RANDOM, 108 IRQF_DISABLED | IRQF_SHARED | IRQF_SAMPLE_RANDOM,
109 "telnetd", conn)){ 109 "telnetd", conn)){
110 printk(KERN_ERR "port_accept : failed to get IRQ for " 110 printk(KERN_ERR "port_accept : failed to get IRQ for "
111 "telnetd\n"); 111 "telnetd\n");
@@ -186,7 +186,7 @@ void *port_data(int port_num)
186 goto out_free; 186 goto out_free;
187 } 187 }
188 if(um_request_irq(ACCEPT_IRQ, fd, IRQ_READ, port_interrupt, 188 if(um_request_irq(ACCEPT_IRQ, fd, IRQ_READ, port_interrupt,
189 SA_INTERRUPT | SA_SHIRQ | SA_SAMPLE_RANDOM, "port", 189 IRQF_DISABLED | IRQF_SHARED | IRQF_SAMPLE_RANDOM, "port",
190 port)){ 190 port)){
191 printk(KERN_ERR "Failed to get IRQ for port %d\n", port_num); 191 printk(KERN_ERR "Failed to get IRQ for port %d\n", port_num);
192 goto out_close; 192 goto out_close;
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 0345e2551247..602d7286b9e0 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -874,7 +874,7 @@ int ubd_driver_init(void){
874 return(0); 874 return(0);
875 } 875 }
876 err = um_request_irq(UBD_IRQ, thread_fd, IRQ_READ, ubd_intr, 876 err = um_request_irq(UBD_IRQ, thread_fd, IRQ_READ, ubd_intr,
877 SA_INTERRUPT, "ubd", ubd_dev); 877 IRQF_DISABLED, "ubd", ubd_dev);
878 if(err != 0) 878 if(err != 0)
879 printk(KERN_ERR "um_request_irq failed - errno = %d\n", -err); 879 printk(KERN_ERR "um_request_irq failed - errno = %d\n", -err);
880 return 0; 880 return 0;
diff --git a/arch/um/drivers/xterm_kern.c b/arch/um/drivers/xterm_kern.c
index d269a80f4b0c..6036ec85895a 100644
--- a/arch/um/drivers/xterm_kern.c
+++ b/arch/um/drivers/xterm_kern.c
@@ -54,7 +54,7 @@ int xterm_fd(int socket, int *pid_out)
54 init_completion(&data->ready); 54 init_completion(&data->ready);
55 55
56 err = um_request_irq(XTERM_IRQ, socket, IRQ_READ, xterm_interrupt, 56 err = um_request_irq(XTERM_IRQ, socket, IRQ_READ, xterm_interrupt,
57 SA_INTERRUPT | SA_SHIRQ | SA_SAMPLE_RANDOM, 57 IRQF_DISABLED | IRQF_SHARED | IRQF_SAMPLE_RANDOM,
58 "xterm", data); 58 "xterm", data);
59 if (err){ 59 if (err){
60 printk(KERN_ERR "xterm_fd : failed to get IRQ for xterm, " 60 printk(KERN_ERR "xterm_fd : failed to get IRQ for xterm, "
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index fae43a3054a0..bfd0bdc8cd40 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -474,7 +474,7 @@ int init_aio_irq(int irq, char *name, irqreturn_t (*handler)(int, void *,
474 } 474 }
475 475
476 err = um_request_irq(irq, fds[0], IRQ_READ, handler, 476 err = um_request_irq(irq, fds[0], IRQ_READ, handler,
477 SA_INTERRUPT | SA_SAMPLE_RANDOM, name, 477 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, name,
478 (void *) (long) fds[0]); 478 (void *) (long) fds[0]);
479 if (err) { 479 if (err) {
480 printk("init_aio_irq - : um_request_irq failed, err = %d\n", 480 printk("init_aio_irq - : um_request_irq failed, err = %d\n",
diff --git a/arch/um/kernel/sigio_kern.c b/arch/um/kernel/sigio_kern.c
index 1c1300fb1e95..51b677083948 100644
--- a/arch/um/kernel/sigio_kern.c
+++ b/arch/um/kernel/sigio_kern.c
@@ -31,7 +31,7 @@ int write_sigio_irq(int fd)
31 int err; 31 int err;
32 32
33 err = um_request_irq(SIGIO_WRITE_IRQ, fd, IRQ_READ, sigio_interrupt, 33 err = um_request_irq(SIGIO_WRITE_IRQ, fd, IRQ_READ, sigio_interrupt,
34 SA_INTERRUPT | SA_SAMPLE_RANDOM, "write sigio", 34 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "write sigio",
35 NULL); 35 NULL);
36 if(err){ 36 if(err){
37 printk("write_sigio_irq : um_request_irq failed, err = %d\n", 37 printk("write_sigio_irq : um_request_irq failed, err = %d\n",
diff --git a/arch/um/kernel/time_kern.c b/arch/um/kernel/time_kern.c
index 820fa3615a3f..d7e044b5e5ee 100644
--- a/arch/um/kernel/time_kern.c
+++ b/arch/um/kernel/time_kern.c
@@ -195,7 +195,7 @@ int __init timer_init(void)
195 int err; 195 int err;
196 196
197 user_time_init(); 197 user_time_init();
198 err = request_irq(TIMER_IRQ, um_timer, SA_INTERRUPT, "timer", NULL); 198 err = request_irq(TIMER_IRQ, um_timer, IRQF_DISABLED, "timer", NULL);
199 if(err != 0) 199 if(err != 0)
200 printk(KERN_ERR "timer_init : request_irq failed - " 200 printk(KERN_ERR "timer_init : request_irq failed - "
201 "errno = %d\n", -err); 201 "errno = %d\n", -err);
diff --git a/arch/um/kernel/tt/process_kern.c b/arch/um/kernel/tt/process_kern.c
index a9c1443fc548..8368c2dbe635 100644
--- a/arch/um/kernel/tt/process_kern.c
+++ b/arch/um/kernel/tt/process_kern.c
@@ -119,7 +119,7 @@ void suspend_new_thread(int fd)
119 panic("read failed in suspend_new_thread, err = %d", -err); 119 panic("read failed in suspend_new_thread, err = %d", -err);
120} 120}
121 121
122void schedule_tail(task_t *prev); 122void schedule_tail(struct task_struct *prev);
123 123
124static void new_thread_handler(int sig) 124static void new_thread_handler(int sig)
125{ 125{
diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c
index 7d51dd7201c3..37cfe7701f06 100644
--- a/arch/um/kernel/um_arch.c
+++ b/arch/um/kernel/um_arch.c
@@ -495,6 +495,7 @@ void apply_alternatives(struct alt_instr *start, struct alt_instr *end)
495{ 495{
496} 496}
497 497
498#ifdef CONFIG_SMP
498void alternatives_smp_module_add(struct module *mod, char *name, 499void alternatives_smp_module_add(struct module *mod, char *name,
499 void *locks, void *locks_end, 500 void *locks, void *locks_end,
500 void *text, void *text_end) 501 void *text, void *text_end)
@@ -504,3 +505,4 @@ void alternatives_smp_module_add(struct module *mod, char *name,
504void alternatives_smp_module_del(struct module *mod) 505void alternatives_smp_module_del(struct module *mod)
505{ 506{
506} 507}
508#endif
diff --git a/arch/v850/kernel/gbus_int.c b/arch/v850/kernel/gbus_int.c
index 92918b8d89ef..25d636e79e6a 100644
--- a/arch/v850/kernel/gbus_int.c
+++ b/arch/v850/kernel/gbus_int.c
@@ -154,7 +154,7 @@ static unsigned gbus_int_startup_irq (unsigned irq)
154 /* First enable the CPU interrupt. */ 154 /* First enable the CPU interrupt. */
155 int rval = 155 int rval =
156 request_irq (IRQ_GINT(gint), gbus_int_handle_irq, 156 request_irq (IRQ_GINT(gint), gbus_int_handle_irq,
157 SA_INTERRUPT, 157 IRQF_DISABLED,
158 "gbus_int_handler", 158 "gbus_int_handler",
159 &gint_num_active_irqs[gint]); 159 &gint_num_active_irqs[gint]);
160 if (rval != 0) 160 if (rval != 0)
diff --git a/arch/v850/kernel/rte_me2_cb.c b/arch/v850/kernel/rte_me2_cb.c
index df7027d85437..3be355a029e2 100644
--- a/arch/v850/kernel/rte_me2_cb.c
+++ b/arch/v850/kernel/rte_me2_cb.c
@@ -263,7 +263,7 @@ static unsigned cb_pic_startup_irq (unsigned irq)
263 263
264 if (cb_pic_active_irqs == 0) { 264 if (cb_pic_active_irqs == 0) {
265 rval = request_irq (IRQ_CB_PIC, cb_pic_handle_irq, 265 rval = request_irq (IRQ_CB_PIC, cb_pic_handle_irq,
266 SA_INTERRUPT, "cb_pic_handler", 0); 266 IRQF_DISABLED, "cb_pic_handler", 0);
267 if (rval != 0) 267 if (rval != 0)
268 return rval; 268 return rval;
269 } 269 }
diff --git a/arch/v850/kernel/time.c b/arch/v850/kernel/time.c
index c1e85c2aef65..a0b46695f186 100644
--- a/arch/v850/kernel/time.c
+++ b/arch/v850/kernel/time.c
@@ -177,7 +177,7 @@ EXPORT_SYMBOL(do_settimeofday);
177static int timer_dev_id; 177static int timer_dev_id;
178static struct irqaction timer_irqaction = { 178static struct irqaction timer_irqaction = {
179 timer_interrupt, 179 timer_interrupt,
180 SA_INTERRUPT, 180 IRQF_DISABLED,
181 CPU_MASK_NONE, 181 CPU_MASK_NONE,
182 "timer", 182 "timer",
183 &timer_dev_id, 183 &timer_dev_id,
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index e856804c447f..28df7d88ce2c 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -24,6 +24,14 @@ config X86
24 bool 24 bool
25 default y 25 default y
26 26
27config LOCKDEP_SUPPORT
28 bool
29 default y
30
31config STACKTRACE_SUPPORT
32 bool
33 default y
34
27config SEMAPHORE_SLEEPERS 35config SEMAPHORE_SLEEPERS
28 bool 36 bool
29 default y 37 default y
diff --git a/arch/x86_64/Kconfig.debug b/arch/x86_64/Kconfig.debug
index 1d92ab56c0f9..775d211a5cf9 100644
--- a/arch/x86_64/Kconfig.debug
+++ b/arch/x86_64/Kconfig.debug
@@ -1,5 +1,9 @@
1menu "Kernel hacking" 1menu "Kernel hacking"
2 2
3config TRACE_IRQFLAGS_SUPPORT
4 bool
5 default y
6
3source "lib/Kconfig.debug" 7source "lib/Kconfig.debug"
4 8
5config DEBUG_RODATA 9config DEBUG_RODATA
diff --git a/arch/x86_64/boot/setup.S b/arch/x86_64/boot/setup.S
index 7de8b8fd1685..a50b631f4d2b 100644
--- a/arch/x86_64/boot/setup.S
+++ b/arch/x86_64/boot/setup.S
@@ -46,7 +46,7 @@
46 */ 46 */
47 47
48#include <asm/segment.h> 48#include <asm/segment.h>
49#include <linux/version.h> 49#include <linux/utsrelease.h>
50#include <linux/compile.h> 50#include <linux/compile.h>
51#include <asm/boot.h> 51#include <asm/boot.h>
52#include <asm/e820.h> 52#include <asm/e820.h>
diff --git a/arch/x86_64/ia32/ia32entry.S b/arch/x86_64/ia32/ia32entry.S
index c536fa98ea37..9b5bb413a6e9 100644
--- a/arch/x86_64/ia32/ia32entry.S
+++ b/arch/x86_64/ia32/ia32entry.S
@@ -13,6 +13,7 @@
13#include <asm/thread_info.h> 13#include <asm/thread_info.h>
14#include <asm/segment.h> 14#include <asm/segment.h>
15#include <asm/vsyscall32.h> 15#include <asm/vsyscall32.h>
16#include <asm/irqflags.h>
16#include <linux/linkage.h> 17#include <linux/linkage.h>
17 18
18#define IA32_NR_syscalls ((ia32_syscall_end - ia32_sys_call_table)/8) 19#define IA32_NR_syscalls ((ia32_syscall_end - ia32_sys_call_table)/8)
@@ -75,6 +76,10 @@ ENTRY(ia32_sysenter_target)
75 swapgs 76 swapgs
76 movq %gs:pda_kernelstack, %rsp 77 movq %gs:pda_kernelstack, %rsp
77 addq $(PDA_STACKOFFSET),%rsp 78 addq $(PDA_STACKOFFSET),%rsp
79 /*
80 * No need to follow this irqs on/off section: the syscall
81 * disabled irqs, here we enable it straight after entry:
82 */
78 sti 83 sti
79 movl %ebp,%ebp /* zero extension */ 84 movl %ebp,%ebp /* zero extension */
80 pushq $__USER32_DS 85 pushq $__USER32_DS
@@ -118,6 +123,7 @@ sysenter_do_call:
118 movq %rax,RAX-ARGOFFSET(%rsp) 123 movq %rax,RAX-ARGOFFSET(%rsp)
119 GET_THREAD_INFO(%r10) 124 GET_THREAD_INFO(%r10)
120 cli 125 cli
126 TRACE_IRQS_OFF
121 testl $_TIF_ALLWORK_MASK,threadinfo_flags(%r10) 127 testl $_TIF_ALLWORK_MASK,threadinfo_flags(%r10)
122 jnz int_ret_from_sys_call 128 jnz int_ret_from_sys_call
123 andl $~TS_COMPAT,threadinfo_status(%r10) 129 andl $~TS_COMPAT,threadinfo_status(%r10)
@@ -132,6 +138,7 @@ sysenter_do_call:
132 CFI_REGISTER rsp,rcx 138 CFI_REGISTER rsp,rcx
133 movl $VSYSCALL32_SYSEXIT,%edx /* User %eip */ 139 movl $VSYSCALL32_SYSEXIT,%edx /* User %eip */
134 CFI_REGISTER rip,rdx 140 CFI_REGISTER rip,rdx
141 TRACE_IRQS_ON
135 swapgs 142 swapgs
136 sti /* sti only takes effect after the next instruction */ 143 sti /* sti only takes effect after the next instruction */
137 /* sysexit */ 144 /* sysexit */
@@ -186,6 +193,10 @@ ENTRY(ia32_cstar_target)
186 movl %esp,%r8d 193 movl %esp,%r8d
187 CFI_REGISTER rsp,r8 194 CFI_REGISTER rsp,r8
188 movq %gs:pda_kernelstack,%rsp 195 movq %gs:pda_kernelstack,%rsp
196 /*
197 * No need to follow this irqs on/off section: the syscall
198 * disabled irqs and here we enable it straight after entry:
199 */
189 sti 200 sti
190 SAVE_ARGS 8,1,1 201 SAVE_ARGS 8,1,1
191 movl %eax,%eax /* zero extension */ 202 movl %eax,%eax /* zero extension */
@@ -220,6 +231,7 @@ cstar_do_call:
220 movq %rax,RAX-ARGOFFSET(%rsp) 231 movq %rax,RAX-ARGOFFSET(%rsp)
221 GET_THREAD_INFO(%r10) 232 GET_THREAD_INFO(%r10)
222 cli 233 cli
234 TRACE_IRQS_OFF
223 testl $_TIF_ALLWORK_MASK,threadinfo_flags(%r10) 235 testl $_TIF_ALLWORK_MASK,threadinfo_flags(%r10)
224 jnz int_ret_from_sys_call 236 jnz int_ret_from_sys_call
225 andl $~TS_COMPAT,threadinfo_status(%r10) 237 andl $~TS_COMPAT,threadinfo_status(%r10)
@@ -228,6 +240,7 @@ cstar_do_call:
228 CFI_REGISTER rip,rcx 240 CFI_REGISTER rip,rcx
229 movl EFLAGS-ARGOFFSET(%rsp),%r11d 241 movl EFLAGS-ARGOFFSET(%rsp),%r11d
230 /*CFI_REGISTER rflags,r11*/ 242 /*CFI_REGISTER rflags,r11*/
243 TRACE_IRQS_ON
231 movl RSP-ARGOFFSET(%rsp),%esp 244 movl RSP-ARGOFFSET(%rsp),%esp
232 CFI_RESTORE rsp 245 CFI_RESTORE rsp
233 swapgs 246 swapgs
@@ -286,7 +299,11 @@ ENTRY(ia32_syscall)
286 /*CFI_REL_OFFSET rflags,EFLAGS-RIP*/ 299 /*CFI_REL_OFFSET rflags,EFLAGS-RIP*/
287 /*CFI_REL_OFFSET cs,CS-RIP*/ 300 /*CFI_REL_OFFSET cs,CS-RIP*/
288 CFI_REL_OFFSET rip,RIP-RIP 301 CFI_REL_OFFSET rip,RIP-RIP
289 swapgs 302 swapgs
303 /*
304 * No need to follow this irqs on/off section: the syscall
305 * disabled irqs and here we enable it straight after entry:
306 */
290 sti 307 sti
291 movl %eax,%eax 308 movl %eax,%eax
292 pushq %rax 309 pushq %rax
diff --git a/arch/x86_64/kernel/Makefile b/arch/x86_64/kernel/Makefile
index 819e84ec5b64..b5aaeafc1cd3 100644
--- a/arch/x86_64/kernel/Makefile
+++ b/arch/x86_64/kernel/Makefile
@@ -10,6 +10,7 @@ obj-y := process.o signal.o entry.o traps.o irq.o \
10 setup64.o bootflag.o e820.o reboot.o quirks.o i8237.o \ 10 setup64.o bootflag.o e820.o reboot.o quirks.o i8237.o \
11 pci-dma.o pci-nommu.o alternative.o 11 pci-dma.o pci-nommu.o alternative.o
12 12
13obj-$(CONFIG_STACKTRACE) += stacktrace.o
13obj-$(CONFIG_X86_MCE) += mce.o 14obj-$(CONFIG_X86_MCE) += mce.o
14obj-$(CONFIG_X86_MCE_INTEL) += mce_intel.o 15obj-$(CONFIG_X86_MCE_INTEL) += mce_intel.o
15obj-$(CONFIG_X86_MCE_AMD) += mce_amd.o 16obj-$(CONFIG_X86_MCE_AMD) += mce_amd.o
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S
index ed92c2983606..d464dded68c0 100644
--- a/arch/x86_64/kernel/entry.S
+++ b/arch/x86_64/kernel/entry.S
@@ -41,13 +41,24 @@
41#include <asm/thread_info.h> 41#include <asm/thread_info.h>
42#include <asm/hw_irq.h> 42#include <asm/hw_irq.h>
43#include <asm/page.h> 43#include <asm/page.h>
44#include <asm/irqflags.h>
44 45
45 .code64 46 .code64
46 47
47#ifndef CONFIG_PREEMPT 48#ifndef CONFIG_PREEMPT
48#define retint_kernel retint_restore_args 49#define retint_kernel retint_restore_args
49#endif 50#endif
50 51
52
53.macro TRACE_IRQS_IRETQ offset=ARGOFFSET
54#ifdef CONFIG_TRACE_IRQFLAGS
55 bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */
56 jnc 1f
57 TRACE_IRQS_ON
581:
59#endif
60.endm
61
51/* 62/*
52 * C code is not supposed to know about undefined top of stack. Every time 63 * C code is not supposed to know about undefined top of stack. Every time
53 * a C function with an pt_regs argument is called from the SYSCALL based 64 * a C function with an pt_regs argument is called from the SYSCALL based
@@ -194,6 +205,10 @@ ENTRY(system_call)
194 swapgs 205 swapgs
195 movq %rsp,%gs:pda_oldrsp 206 movq %rsp,%gs:pda_oldrsp
196 movq %gs:pda_kernelstack,%rsp 207 movq %gs:pda_kernelstack,%rsp
208 /*
209 * No need to follow this irqs off/on section - it's straight
210 * and short:
211 */
197 sti 212 sti
198 SAVE_ARGS 8,1 213 SAVE_ARGS 8,1
199 movq %rax,ORIG_RAX-ARGOFFSET(%rsp) 214 movq %rax,ORIG_RAX-ARGOFFSET(%rsp)
@@ -219,10 +234,15 @@ ret_from_sys_call:
219sysret_check: 234sysret_check:
220 GET_THREAD_INFO(%rcx) 235 GET_THREAD_INFO(%rcx)
221 cli 236 cli
237 TRACE_IRQS_OFF
222 movl threadinfo_flags(%rcx),%edx 238 movl threadinfo_flags(%rcx),%edx
223 andl %edi,%edx 239 andl %edi,%edx
224 CFI_REMEMBER_STATE 240 CFI_REMEMBER_STATE
225 jnz sysret_careful 241 jnz sysret_careful
242 /*
243 * sysretq will re-enable interrupts:
244 */
245 TRACE_IRQS_ON
226 movq RIP-ARGOFFSET(%rsp),%rcx 246 movq RIP-ARGOFFSET(%rsp),%rcx
227 CFI_REGISTER rip,rcx 247 CFI_REGISTER rip,rcx
228 RESTORE_ARGS 0,-ARG_SKIP,1 248 RESTORE_ARGS 0,-ARG_SKIP,1
@@ -237,6 +257,7 @@ sysret_careful:
237 CFI_RESTORE_STATE 257 CFI_RESTORE_STATE
238 bt $TIF_NEED_RESCHED,%edx 258 bt $TIF_NEED_RESCHED,%edx
239 jnc sysret_signal 259 jnc sysret_signal
260 TRACE_IRQS_ON
240 sti 261 sti
241 pushq %rdi 262 pushq %rdi
242 CFI_ADJUST_CFA_OFFSET 8 263 CFI_ADJUST_CFA_OFFSET 8
@@ -247,6 +268,7 @@ sysret_careful:
247 268
248 /* Handle a signal */ 269 /* Handle a signal */
249sysret_signal: 270sysret_signal:
271 TRACE_IRQS_ON
250 sti 272 sti
251 testl $(_TIF_SIGPENDING|_TIF_NOTIFY_RESUME|_TIF_SINGLESTEP),%edx 273 testl $(_TIF_SIGPENDING|_TIF_NOTIFY_RESUME|_TIF_SINGLESTEP),%edx
252 jz 1f 274 jz 1f
@@ -261,6 +283,7 @@ sysret_signal:
261 /* Use IRET because user could have changed frame. This 283 /* Use IRET because user could have changed frame. This
262 works because ptregscall_common has called FIXUP_TOP_OF_STACK. */ 284 works because ptregscall_common has called FIXUP_TOP_OF_STACK. */
263 cli 285 cli
286 TRACE_IRQS_OFF
264 jmp int_with_check 287 jmp int_with_check
265 288
266badsys: 289badsys:
@@ -309,6 +332,7 @@ ENTRY(int_ret_from_sys_call)
309 CFI_REL_OFFSET r10,R10-ARGOFFSET 332 CFI_REL_OFFSET r10,R10-ARGOFFSET
310 CFI_REL_OFFSET r11,R11-ARGOFFSET 333 CFI_REL_OFFSET r11,R11-ARGOFFSET
311 cli 334 cli
335 TRACE_IRQS_OFF
312 testl $3,CS-ARGOFFSET(%rsp) 336 testl $3,CS-ARGOFFSET(%rsp)
313 je retint_restore_args 337 je retint_restore_args
314 movl $_TIF_ALLWORK_MASK,%edi 338 movl $_TIF_ALLWORK_MASK,%edi
@@ -327,6 +351,7 @@ int_with_check:
327int_careful: 351int_careful:
328 bt $TIF_NEED_RESCHED,%edx 352 bt $TIF_NEED_RESCHED,%edx
329 jnc int_very_careful 353 jnc int_very_careful
354 TRACE_IRQS_ON
330 sti 355 sti
331 pushq %rdi 356 pushq %rdi
332 CFI_ADJUST_CFA_OFFSET 8 357 CFI_ADJUST_CFA_OFFSET 8
@@ -334,10 +359,12 @@ int_careful:
334 popq %rdi 359 popq %rdi
335 CFI_ADJUST_CFA_OFFSET -8 360 CFI_ADJUST_CFA_OFFSET -8
336 cli 361 cli
362 TRACE_IRQS_OFF
337 jmp int_with_check 363 jmp int_with_check
338 364
339 /* handle signals and tracing -- both require a full stack frame */ 365 /* handle signals and tracing -- both require a full stack frame */
340int_very_careful: 366int_very_careful:
367 TRACE_IRQS_ON
341 sti 368 sti
342 SAVE_REST 369 SAVE_REST
343 /* Check for syscall exit trace */ 370 /* Check for syscall exit trace */
@@ -351,6 +378,7 @@ int_very_careful:
351 CFI_ADJUST_CFA_OFFSET -8 378 CFI_ADJUST_CFA_OFFSET -8
352 andl $~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP),%edi 379 andl $~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP),%edi
353 cli 380 cli
381 TRACE_IRQS_OFF
354 jmp int_restore_rest 382 jmp int_restore_rest
355 383
356int_signal: 384int_signal:
@@ -363,6 +391,7 @@ int_signal:
363int_restore_rest: 391int_restore_rest:
364 RESTORE_REST 392 RESTORE_REST
365 cli 393 cli
394 TRACE_IRQS_OFF
366 jmp int_with_check 395 jmp int_with_check
367 CFI_ENDPROC 396 CFI_ENDPROC
368END(int_ret_from_sys_call) 397END(int_ret_from_sys_call)
@@ -484,6 +513,10 @@ END(stub_rt_sigreturn)
484 swapgs 513 swapgs
4851: incl %gs:pda_irqcount # RED-PEN should check preempt count 5141: incl %gs:pda_irqcount # RED-PEN should check preempt count
486 cmoveq %gs:pda_irqstackptr,%rsp 515 cmoveq %gs:pda_irqstackptr,%rsp
516 /*
517 * We entered an interrupt context - irqs are off:
518 */
519 TRACE_IRQS_OFF
487 call \func 520 call \func
488 .endm 521 .endm
489 522
@@ -493,6 +526,7 @@ ENTRY(common_interrupt)
493 /* 0(%rsp): oldrsp-ARGOFFSET */ 526 /* 0(%rsp): oldrsp-ARGOFFSET */
494ret_from_intr: 527ret_from_intr:
495 cli 528 cli
529 TRACE_IRQS_OFF
496 decl %gs:pda_irqcount 530 decl %gs:pda_irqcount
497 leaveq 531 leaveq
498 CFI_DEF_CFA_REGISTER rsp 532 CFI_DEF_CFA_REGISTER rsp
@@ -515,9 +549,21 @@ retint_check:
515 CFI_REMEMBER_STATE 549 CFI_REMEMBER_STATE
516 jnz retint_careful 550 jnz retint_careful
517retint_swapgs: 551retint_swapgs:
552 /*
553 * The iretq could re-enable interrupts:
554 */
555 cli
556 TRACE_IRQS_IRETQ
518 swapgs 557 swapgs
558 jmp restore_args
559
519retint_restore_args: 560retint_restore_args:
520 cli 561 cli
562 /*
563 * The iretq could re-enable interrupts:
564 */
565 TRACE_IRQS_IRETQ
566restore_args:
521 RESTORE_ARGS 0,8,0 567 RESTORE_ARGS 0,8,0
522iret_label: 568iret_label:
523 iretq 569 iretq
@@ -530,6 +576,7 @@ iret_label:
530 /* running with kernel gs */ 576 /* running with kernel gs */
531bad_iret: 577bad_iret:
532 movq $11,%rdi /* SIGSEGV */ 578 movq $11,%rdi /* SIGSEGV */
579 TRACE_IRQS_ON
533 sti 580 sti
534 jmp do_exit 581 jmp do_exit
535 .previous 582 .previous
@@ -539,6 +586,7 @@ retint_careful:
539 CFI_RESTORE_STATE 586 CFI_RESTORE_STATE
540 bt $TIF_NEED_RESCHED,%edx 587 bt $TIF_NEED_RESCHED,%edx
541 jnc retint_signal 588 jnc retint_signal
589 TRACE_IRQS_ON
542 sti 590 sti
543 pushq %rdi 591 pushq %rdi
544 CFI_ADJUST_CFA_OFFSET 8 592 CFI_ADJUST_CFA_OFFSET 8
@@ -547,11 +595,13 @@ retint_careful:
547 CFI_ADJUST_CFA_OFFSET -8 595 CFI_ADJUST_CFA_OFFSET -8
548 GET_THREAD_INFO(%rcx) 596 GET_THREAD_INFO(%rcx)
549 cli 597 cli
598 TRACE_IRQS_OFF
550 jmp retint_check 599 jmp retint_check
551 600
552retint_signal: 601retint_signal:
553 testl $(_TIF_SIGPENDING|_TIF_NOTIFY_RESUME|_TIF_SINGLESTEP),%edx 602 testl $(_TIF_SIGPENDING|_TIF_NOTIFY_RESUME|_TIF_SINGLESTEP),%edx
554 jz retint_swapgs 603 jz retint_swapgs
604 TRACE_IRQS_ON
555 sti 605 sti
556 SAVE_REST 606 SAVE_REST
557 movq $-1,ORIG_RAX(%rsp) 607 movq $-1,ORIG_RAX(%rsp)
@@ -560,6 +610,7 @@ retint_signal:
560 call do_notify_resume 610 call do_notify_resume
561 RESTORE_REST 611 RESTORE_REST
562 cli 612 cli
613 TRACE_IRQS_OFF
563 movl $_TIF_NEED_RESCHED,%edi 614 movl $_TIF_NEED_RESCHED,%edi
564 GET_THREAD_INFO(%rcx) 615 GET_THREAD_INFO(%rcx)
565 jmp retint_check 616 jmp retint_check
@@ -666,7 +717,7 @@ END(spurious_interrupt)
666 717
667 /* error code is on the stack already */ 718 /* error code is on the stack already */
668 /* handle NMI like exceptions that can happen everywhere */ 719 /* handle NMI like exceptions that can happen everywhere */
669 .macro paranoidentry sym, ist=0 720 .macro paranoidentry sym, ist=0, irqtrace=1
670 SAVE_ALL 721 SAVE_ALL
671 cld 722 cld
672 movl $1,%ebx 723 movl $1,%ebx
@@ -691,8 +742,73 @@ END(spurious_interrupt)
691 addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) 742 addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
692 .endif 743 .endif
693 cli 744 cli
745 .if \irqtrace
746 TRACE_IRQS_OFF
747 .endif
694 .endm 748 .endm
695 749
750 /*
751 * "Paranoid" exit path from exception stack.
752 * Paranoid because this is used by NMIs and cannot take
753 * any kernel state for granted.
754 * We don't do kernel preemption checks here, because only
755 * NMI should be common and it does not enable IRQs and
756 * cannot get reschedule ticks.
757 *
758 * "trace" is 0 for the NMI handler only, because irq-tracing
759 * is fundamentally NMI-unsafe. (we cannot change the soft and
760 * hard flags at once, atomically)
761 */
762 .macro paranoidexit trace=1
763 /* ebx: no swapgs flag */
764paranoid_exit\trace:
765 testl %ebx,%ebx /* swapgs needed? */
766 jnz paranoid_restore\trace
767 testl $3,CS(%rsp)
768 jnz paranoid_userspace\trace
769paranoid_swapgs\trace:
770 TRACE_IRQS_IRETQ 0
771 swapgs
772paranoid_restore\trace:
773 RESTORE_ALL 8
774 iretq
775paranoid_userspace\trace:
776 GET_THREAD_INFO(%rcx)
777 movl threadinfo_flags(%rcx),%ebx
778 andl $_TIF_WORK_MASK,%ebx
779 jz paranoid_swapgs\trace
780 movq %rsp,%rdi /* &pt_regs */
781 call sync_regs
782 movq %rax,%rsp /* switch stack for scheduling */
783 testl $_TIF_NEED_RESCHED,%ebx
784 jnz paranoid_schedule\trace
785 movl %ebx,%edx /* arg3: thread flags */
786 .if \trace
787 TRACE_IRQS_ON
788 .endif
789 sti
790 xorl %esi,%esi /* arg2: oldset */
791 movq %rsp,%rdi /* arg1: &pt_regs */
792 call do_notify_resume
793 cli
794 .if \trace
795 TRACE_IRQS_OFF
796 .endif
797 jmp paranoid_userspace\trace
798paranoid_schedule\trace:
799 .if \trace
800 TRACE_IRQS_ON
801 .endif
802 sti
803 call schedule
804 cli
805 .if \trace
806 TRACE_IRQS_OFF
807 .endif
808 jmp paranoid_userspace\trace
809 CFI_ENDPROC
810 .endm
811
696/* 812/*
697 * Exception entry point. This expects an error code/orig_rax on the stack 813 * Exception entry point. This expects an error code/orig_rax on the stack
698 * and the exception handler in %rax. 814 * and the exception handler in %rax.
@@ -748,6 +864,7 @@ error_exit:
748 movl %ebx,%eax 864 movl %ebx,%eax
749 RESTORE_REST 865 RESTORE_REST
750 cli 866 cli
867 TRACE_IRQS_OFF
751 GET_THREAD_INFO(%rcx) 868 GET_THREAD_INFO(%rcx)
752 testl %eax,%eax 869 testl %eax,%eax
753 jne retint_kernel 870 jne retint_kernel
@@ -755,6 +872,10 @@ error_exit:
755 movl $_TIF_WORK_MASK,%edi 872 movl $_TIF_WORK_MASK,%edi
756 andl %edi,%edx 873 andl %edi,%edx
757 jnz retint_careful 874 jnz retint_careful
875 /*
876 * The iret might restore flags:
877 */
878 TRACE_IRQS_IRETQ
758 swapgs 879 swapgs
759 RESTORE_ARGS 0,8,0 880 RESTORE_ARGS 0,8,0
760 jmp iret_label 881 jmp iret_label
@@ -916,8 +1037,7 @@ KPROBE_ENTRY(debug)
916 pushq $0 1037 pushq $0
917 CFI_ADJUST_CFA_OFFSET 8 1038 CFI_ADJUST_CFA_OFFSET 8
918 paranoidentry do_debug, DEBUG_STACK 1039 paranoidentry do_debug, DEBUG_STACK
919 jmp paranoid_exit 1040 paranoidexit
920 CFI_ENDPROC
921END(debug) 1041END(debug)
922 .previous .text 1042 .previous .text
923 1043
@@ -926,49 +1046,13 @@ KPROBE_ENTRY(nmi)
926 INTR_FRAME 1046 INTR_FRAME
927 pushq $-1 1047 pushq $-1
928 CFI_ADJUST_CFA_OFFSET 8 1048 CFI_ADJUST_CFA_OFFSET 8
929 paranoidentry do_nmi 1049 paranoidentry do_nmi, 0, 0
930 /* 1050#ifdef CONFIG_TRACE_IRQFLAGS
931 * "Paranoid" exit path from exception stack. 1051 paranoidexit 0
932 * Paranoid because this is used by NMIs and cannot take 1052#else
933 * any kernel state for granted. 1053 jmp paranoid_exit1
934 * We don't do kernel preemption checks here, because only 1054 CFI_ENDPROC
935 * NMI should be common and it does not enable IRQs and 1055#endif
936 * cannot get reschedule ticks.
937 */
938 /* ebx: no swapgs flag */
939paranoid_exit:
940 testl %ebx,%ebx /* swapgs needed? */
941 jnz paranoid_restore
942 testl $3,CS(%rsp)
943 jnz paranoid_userspace
944paranoid_swapgs:
945 swapgs
946paranoid_restore:
947 RESTORE_ALL 8
948 iretq
949paranoid_userspace:
950 GET_THREAD_INFO(%rcx)
951 movl threadinfo_flags(%rcx),%ebx
952 andl $_TIF_WORK_MASK,%ebx
953 jz paranoid_swapgs
954 movq %rsp,%rdi /* &pt_regs */
955 call sync_regs
956 movq %rax,%rsp /* switch stack for scheduling */
957 testl $_TIF_NEED_RESCHED,%ebx
958 jnz paranoid_schedule
959 movl %ebx,%edx /* arg3: thread flags */
960 sti
961 xorl %esi,%esi /* arg2: oldset */
962 movq %rsp,%rdi /* arg1: &pt_regs */
963 call do_notify_resume
964 cli
965 jmp paranoid_userspace
966paranoid_schedule:
967 sti
968 call schedule
969 cli
970 jmp paranoid_userspace
971 CFI_ENDPROC
972END(nmi) 1056END(nmi)
973 .previous .text 1057 .previous .text
974 1058
@@ -977,7 +1061,7 @@ KPROBE_ENTRY(int3)
977 pushq $0 1061 pushq $0
978 CFI_ADJUST_CFA_OFFSET 8 1062 CFI_ADJUST_CFA_OFFSET 8
979 paranoidentry do_int3, DEBUG_STACK 1063 paranoidentry do_int3, DEBUG_STACK
980 jmp paranoid_exit 1064 jmp paranoid_exit1
981 CFI_ENDPROC 1065 CFI_ENDPROC
982END(int3) 1066END(int3)
983 .previous .text 1067 .previous .text
@@ -1006,7 +1090,7 @@ END(reserved)
1006ENTRY(double_fault) 1090ENTRY(double_fault)
1007 XCPT_FRAME 1091 XCPT_FRAME
1008 paranoidentry do_double_fault 1092 paranoidentry do_double_fault
1009 jmp paranoid_exit 1093 jmp paranoid_exit1
1010 CFI_ENDPROC 1094 CFI_ENDPROC
1011END(double_fault) 1095END(double_fault)
1012 1096
@@ -1022,7 +1106,7 @@ END(segment_not_present)
1022ENTRY(stack_segment) 1106ENTRY(stack_segment)
1023 XCPT_FRAME 1107 XCPT_FRAME
1024 paranoidentry do_stack_segment 1108 paranoidentry do_stack_segment
1025 jmp paranoid_exit 1109 jmp paranoid_exit1
1026 CFI_ENDPROC 1110 CFI_ENDPROC
1027END(stack_segment) 1111END(stack_segment)
1028 1112
@@ -1050,7 +1134,7 @@ ENTRY(machine_check)
1050 pushq $0 1134 pushq $0
1051 CFI_ADJUST_CFA_OFFSET 8 1135 CFI_ADJUST_CFA_OFFSET 8
1052 paranoidentry do_machine_check 1136 paranoidentry do_machine_check
1053 jmp paranoid_exit 1137 jmp paranoid_exit1
1054 CFI_ENDPROC 1138 CFI_ENDPROC
1055END(machine_check) 1139END(machine_check)
1056#endif 1140#endif
diff --git a/arch/x86_64/kernel/head64.c b/arch/x86_64/kernel/head64.c
index e6a71c9556d9..36647ce6aecb 100644
--- a/arch/x86_64/kernel/head64.c
+++ b/arch/x86_64/kernel/head64.c
@@ -85,6 +85,11 @@ void __init x86_64_start_kernel(char * real_mode_data)
85 clear_bss(); 85 clear_bss();
86 86
87 /* 87 /*
88 * This must be called really, really early:
89 */
90 lockdep_init();
91
92 /*
88 * switch to init_level4_pgt from boot_level4_pgt 93 * switch to init_level4_pgt from boot_level4_pgt
89 */ 94 */
90 memcpy(init_level4_pgt, boot_level4_pgt, PTRS_PER_PGD*sizeof(pgd_t)); 95 memcpy(init_level4_pgt, boot_level4_pgt, PTRS_PER_PGD*sizeof(pgd_t));
diff --git a/arch/x86_64/kernel/irq.c b/arch/x86_64/kernel/irq.c
index a1f1df5f7bfc..5221a53e90c1 100644
--- a/arch/x86_64/kernel/irq.c
+++ b/arch/x86_64/kernel/irq.c
@@ -177,8 +177,10 @@ asmlinkage void do_softirq(void)
177 local_irq_save(flags); 177 local_irq_save(flags);
178 pending = local_softirq_pending(); 178 pending = local_softirq_pending();
179 /* Switch to interrupt stack */ 179 /* Switch to interrupt stack */
180 if (pending) 180 if (pending) {
181 call_softirq(); 181 call_softirq();
182 WARN_ON_ONCE(softirq_count());
183 }
182 local_irq_restore(flags); 184 local_irq_restore(flags);
183} 185}
184EXPORT_SYMBOL(do_softirq); 186EXPORT_SYMBOL(do_softirq);
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c
index 476c1472fc07..5baa0c726e97 100644
--- a/arch/x86_64/kernel/nmi.c
+++ b/arch/x86_64/kernel/nmi.c
@@ -127,7 +127,7 @@ void __cpuinit nmi_watchdog_default(void)
127static __init void nmi_cpu_busy(void *data) 127static __init void nmi_cpu_busy(void *data)
128{ 128{
129 volatile int *endflag = data; 129 volatile int *endflag = data;
130 local_irq_enable(); 130 local_irq_enable_in_hardirq();
131 /* Intentionally don't use cpu_relax here. This is 131 /* Intentionally don't use cpu_relax here. This is
132 to make sure that the performance counter really ticks, 132 to make sure that the performance counter really ticks,
133 even if there is a simulator or similar that catches the 133 even if there is a simulator or similar that catches the
diff --git a/arch/x86_64/kernel/process.c b/arch/x86_64/kernel/process.c
index ca56e19b8b6e..bb6745d13b8f 100644
--- a/arch/x86_64/kernel/process.c
+++ b/arch/x86_64/kernel/process.c
@@ -296,7 +296,7 @@ void __show_regs(struct pt_regs * regs)
296 system_utsname.version); 296 system_utsname.version);
297 printk("RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->rip); 297 printk("RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->rip);
298 printk_address(regs->rip); 298 printk_address(regs->rip);
299 printk("\nRSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, regs->rsp, 299 printk("RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, regs->rsp,
300 regs->eflags); 300 regs->eflags);
301 printk("RAX: %016lx RBX: %016lx RCX: %016lx\n", 301 printk("RAX: %016lx RBX: %016lx RCX: %016lx\n",
302 regs->rax, regs->rbx, regs->rcx); 302 regs->rax, regs->rbx, regs->rcx);
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c
index 9705a6a384f1..b7c705969791 100644
--- a/arch/x86_64/kernel/smpboot.c
+++ b/arch/x86_64/kernel/smpboot.c
@@ -775,6 +775,8 @@ static int __cpuinit do_boot_cpu(int cpu, int apicid)
775 }; 775 };
776 DECLARE_WORK(work, do_fork_idle, &c_idle); 776 DECLARE_WORK(work, do_fork_idle, &c_idle);
777 777
778 lockdep_set_class(&c_idle.done.wait.lock, &waitqueue_lock_key);
779
778 /* allocate memory for gdts of secondary cpus. Hotplug is considered */ 780 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
779 if (!cpu_gdt_descr[cpu].address && 781 if (!cpu_gdt_descr[cpu].address &&
780 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) { 782 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
diff --git a/arch/x86_64/kernel/stacktrace.c b/arch/x86_64/kernel/stacktrace.c
new file mode 100644
index 000000000000..32cf55eb9af8
--- /dev/null
+++ b/arch/x86_64/kernel/stacktrace.c
@@ -0,0 +1,221 @@
1/*
2 * arch/x86_64/kernel/stacktrace.c
3 *
4 * Stack trace management functions
5 *
6 * Copyright (C) 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
7 */
8#include <linux/sched.h>
9#include <linux/stacktrace.h>
10
11#include <asm/smp.h>
12
13static inline int
14in_range(unsigned long start, unsigned long addr, unsigned long end)
15{
16 return addr >= start && addr <= end;
17}
18
19static unsigned long
20get_stack_end(struct task_struct *task, unsigned long stack)
21{
22 unsigned long stack_start, stack_end, flags;
23 int i, cpu;
24
25 /*
26 * The most common case is that we are in the task stack:
27 */
28 stack_start = (unsigned long)task->thread_info;
29 stack_end = stack_start + THREAD_SIZE;
30
31 if (in_range(stack_start, stack, stack_end))
32 return stack_end;
33
34 /*
35 * We are in an interrupt if irqstackptr is set:
36 */
37 raw_local_irq_save(flags);
38 cpu = safe_smp_processor_id();
39 stack_end = (unsigned long)cpu_pda(cpu)->irqstackptr;
40
41 if (stack_end) {
42 stack_start = stack_end & ~(IRQSTACKSIZE-1);
43 if (in_range(stack_start, stack, stack_end))
44 goto out_restore;
45 /*
46 * We get here if we are in an IRQ context but we
47 * are also in an exception stack.
48 */
49 }
50
51 /*
52 * Iterate over all exception stacks, and figure out whether
53 * 'stack' is in one of them:
54 */
55 for (i = 0; i < N_EXCEPTION_STACKS; i++) {
56 /*
57 * set 'end' to the end of the exception stack.
58 */
59 stack_end = per_cpu(init_tss, cpu).ist[i];
60 stack_start = stack_end - EXCEPTION_STKSZ;
61
62 /*
63 * Is 'stack' above this exception frame's end?
64 * If yes then skip to the next frame.
65 */
66 if (stack >= stack_end)
67 continue;
68 /*
69 * Is 'stack' above this exception frame's start address?
70 * If yes then we found the right frame.
71 */
72 if (stack >= stack_start)
73 goto out_restore;
74
75 /*
76 * If this is a debug stack, and if it has a larger size than
77 * the usual exception stacks, then 'stack' might still
78 * be within the lower portion of the debug stack:
79 */
80#if DEBUG_STKSZ > EXCEPTION_STKSZ
81 if (i == DEBUG_STACK - 1 && stack >= stack_end - DEBUG_STKSZ) {
82 /*
83 * Black magic. A large debug stack is composed of
84 * multiple exception stack entries, which we
85 * iterate through now. Dont look:
86 */
87 do {
88 stack_end -= EXCEPTION_STKSZ;
89 stack_start -= EXCEPTION_STKSZ;
90 } while (stack < stack_start);
91
92 goto out_restore;
93 }
94#endif
95 }
96 /*
97 * Ok, 'stack' is not pointing to any of the system stacks.
98 */
99 stack_end = 0;
100
101out_restore:
102 raw_local_irq_restore(flags);
103
104 return stack_end;
105}
106
107
108/*
109 * Save stack-backtrace addresses into a stack_trace buffer:
110 */
111static inline unsigned long
112save_context_stack(struct stack_trace *trace, unsigned int skip,
113 unsigned long stack, unsigned long stack_end)
114{
115 unsigned long addr;
116
117#ifdef CONFIG_FRAME_POINTER
118 unsigned long prev_stack = 0;
119
120 while (in_range(prev_stack, stack, stack_end)) {
121 pr_debug("stack: %p\n", (void *)stack);
122 addr = (unsigned long)(((unsigned long *)stack)[1]);
123 pr_debug("addr: %p\n", (void *)addr);
124 if (!skip)
125 trace->entries[trace->nr_entries++] = addr-1;
126 else
127 skip--;
128 if (trace->nr_entries >= trace->max_entries)
129 break;
130 if (!addr)
131 return 0;
132 /*
133 * Stack frames must go forwards (otherwise a loop could
134 * happen if the stackframe is corrupted), so we move
135 * prev_stack forwards:
136 */
137 prev_stack = stack;
138 stack = (unsigned long)(((unsigned long *)stack)[0]);
139 }
140 pr_debug("invalid: %p\n", (void *)stack);
141#else
142 while (stack < stack_end) {
143 addr = ((unsigned long *)stack)[0];
144 stack += sizeof(long);
145 if (__kernel_text_address(addr)) {
146 if (!skip)
147 trace->entries[trace->nr_entries++] = addr-1;
148 else
149 skip--;
150 if (trace->nr_entries >= trace->max_entries)
151 break;
152 }
153 }
154#endif
155 return stack;
156}
157
158#define MAX_STACKS 10
159
160/*
161 * Save stack-backtrace addresses into a stack_trace buffer.
162 * If all_contexts is set, all contexts (hardirq, softirq and process)
163 * are saved. If not set then only the current context is saved.
164 */
165void save_stack_trace(struct stack_trace *trace,
166 struct task_struct *task, int all_contexts,
167 unsigned int skip)
168{
169 unsigned long stack = (unsigned long)&stack;
170 int i, nr_stacks = 0, stacks_done[MAX_STACKS];
171
172 WARN_ON(trace->nr_entries || !trace->max_entries);
173
174 if (!task)
175 task = current;
176
177 pr_debug("task: %p, ti: %p\n", task, task->thread_info);
178
179 if (!task || task == current) {
180 /* Grab rbp right from our regs: */
181 asm ("mov %%rbp, %0" : "=r" (stack));
182 pr_debug("rbp: %p\n", (void *)stack);
183 } else {
184 /* rbp is the last reg pushed by switch_to(): */
185 stack = task->thread.rsp;
186 pr_debug("other task rsp: %p\n", (void *)stack);
187 stack = (unsigned long)(((unsigned long *)stack)[0]);
188 pr_debug("other task rbp: %p\n", (void *)stack);
189 }
190
191 while (1) {
192 unsigned long stack_end = get_stack_end(task, stack);
193
194 pr_debug("stack: %p\n", (void *)stack);
195 pr_debug("stack end: %p\n", (void *)stack_end);
196
197 /*
198 * Invalid stack addres?
199 */
200 if (!stack_end)
201 return;
202 /*
203 * Were we in this stack already? (recursion)
204 */
205 for (i = 0; i < nr_stacks; i++)
206 if (stacks_done[i] == stack_end)
207 return;
208 stacks_done[nr_stacks] = stack_end;
209
210 stack = save_context_stack(trace, skip, stack, stack_end);
211 if (!all_contexts || !stack ||
212 trace->nr_entries >= trace->max_entries)
213 return;
214 trace->entries[trace->nr_entries++] = ULONG_MAX;
215 if (trace->nr_entries >= trace->max_entries)
216 return;
217 if (++nr_stacks >= MAX_STACKS)
218 return;
219 }
220}
221
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index ebbee6f59ff5..b9ff75992c16 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -889,7 +889,7 @@ int __init time_setup(char *str)
889} 889}
890 890
891static struct irqaction irq0 = { 891static struct irqaction irq0 = {
892 timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL 892 timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
893}; 893};
894 894
895void __init time_init(void) 895void __init time_init(void)
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c
index 5a5311d3de0f..79d05c482072 100644
--- a/arch/x86_64/kernel/traps.c
+++ b/arch/x86_64/kernel/traps.c
@@ -110,28 +110,31 @@ static int kstack_depth_to_print = 12;
110static int call_trace = 1; 110static int call_trace = 1;
111 111
112#ifdef CONFIG_KALLSYMS 112#ifdef CONFIG_KALLSYMS
113#include <linux/kallsyms.h> 113# include <linux/kallsyms.h>
114int printk_address(unsigned long address) 114void printk_address(unsigned long address)
115{ 115{
116 unsigned long offset = 0, symsize; 116 unsigned long offset = 0, symsize;
117 const char *symname; 117 const char *symname;
118 char *modname; 118 char *modname;
119 char *delim = ":"; 119 char *delim = ":";
120 char namebuf[128]; 120 char namebuf[128];
121 121
122 symname = kallsyms_lookup(address, &symsize, &offset, &modname, namebuf); 122 symname = kallsyms_lookup(address, &symsize, &offset,
123 if (!symname) 123 &modname, namebuf);
124 return printk("[<%016lx>]", address); 124 if (!symname) {
125 if (!modname) 125 printk(" [<%016lx>]\n", address);
126 return;
127 }
128 if (!modname)
126 modname = delim = ""; 129 modname = delim = "";
127 return printk("<%016lx>{%s%s%s%s%+ld}", 130 printk(" [<%016lx>] %s%s%s%s+0x%lx/0x%lx\n",
128 address, delim, modname, delim, symname, offset); 131 address, delim, modname, delim, symname, offset, symsize);
129} 132}
130#else 133#else
131int printk_address(unsigned long address) 134void printk_address(unsigned long address)
132{ 135{
133 return printk("[<%016lx>]", address); 136 printk(" [<%016lx>]\n", address);
134} 137}
135#endif 138#endif
136 139
137static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack, 140static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack,
@@ -149,10 +152,22 @@ static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack,
149 }; 152 };
150 unsigned k; 153 unsigned k;
151 154
155 /*
156 * Iterate over all exception stacks, and figure out whether
157 * 'stack' is in one of them:
158 */
152 for (k = 0; k < N_EXCEPTION_STACKS; k++) { 159 for (k = 0; k < N_EXCEPTION_STACKS; k++) {
153 unsigned long end; 160 unsigned long end;
154 161
162 /*
163 * set 'end' to the end of the exception stack.
164 */
155 switch (k + 1) { 165 switch (k + 1) {
166 /*
167 * TODO: this block is not needed i think, because
168 * setup64.c:cpu_init() sets up t->ist[DEBUG_STACK]
169 * properly too.
170 */
156#if DEBUG_STKSZ > EXCEPTION_STKSZ 171#if DEBUG_STKSZ > EXCEPTION_STKSZ
157 case DEBUG_STACK: 172 case DEBUG_STACK:
158 end = cpu_pda(cpu)->debugstack + DEBUG_STKSZ; 173 end = cpu_pda(cpu)->debugstack + DEBUG_STKSZ;
@@ -162,19 +177,43 @@ static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack,
162 end = per_cpu(init_tss, cpu).ist[k]; 177 end = per_cpu(init_tss, cpu).ist[k];
163 break; 178 break;
164 } 179 }
180 /*
181 * Is 'stack' above this exception frame's end?
182 * If yes then skip to the next frame.
183 */
165 if (stack >= end) 184 if (stack >= end)
166 continue; 185 continue;
186 /*
187 * Is 'stack' above this exception frame's start address?
188 * If yes then we found the right frame.
189 */
167 if (stack >= end - EXCEPTION_STKSZ) { 190 if (stack >= end - EXCEPTION_STKSZ) {
191 /*
192 * Make sure we only iterate through an exception
193 * stack once. If it comes up for the second time
194 * then there's something wrong going on - just
195 * break out and return NULL:
196 */
168 if (*usedp & (1U << k)) 197 if (*usedp & (1U << k))
169 break; 198 break;
170 *usedp |= 1U << k; 199 *usedp |= 1U << k;
171 *idp = ids[k]; 200 *idp = ids[k];
172 return (unsigned long *)end; 201 return (unsigned long *)end;
173 } 202 }
203 /*
204 * If this is a debug stack, and if it has a larger size than
205 * the usual exception stacks, then 'stack' might still
206 * be within the lower portion of the debug stack:
207 */
174#if DEBUG_STKSZ > EXCEPTION_STKSZ 208#if DEBUG_STKSZ > EXCEPTION_STKSZ
175 if (k == DEBUG_STACK - 1 && stack >= end - DEBUG_STKSZ) { 209 if (k == DEBUG_STACK - 1 && stack >= end - DEBUG_STKSZ) {
176 unsigned j = N_EXCEPTION_STACKS - 1; 210 unsigned j = N_EXCEPTION_STACKS - 1;
177 211
212 /*
213 * Black magic. A large debug stack is composed of
214 * multiple exception stack entries, which we
215 * iterate through now. Dont look:
216 */
178 do { 217 do {
179 ++j; 218 ++j;
180 end -= EXCEPTION_STKSZ; 219 end -= EXCEPTION_STKSZ;
@@ -193,20 +232,14 @@ static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack,
193 232
194static int show_trace_unwind(struct unwind_frame_info *info, void *context) 233static int show_trace_unwind(struct unwind_frame_info *info, void *context)
195{ 234{
196 int i = 11, n = 0; 235 int n = 0;
197 236
198 while (unwind(info) == 0 && UNW_PC(info)) { 237 while (unwind(info) == 0 && UNW_PC(info)) {
199 ++n; 238 n++;
200 if (i > 50) { 239 printk_address(UNW_PC(info));
201 printk("\n ");
202 i = 7;
203 } else
204 i += printk(" ");
205 i += printk_address(UNW_PC(info));
206 if (arch_unw_user_mode(info)) 240 if (arch_unw_user_mode(info))
207 break; 241 break;
208 } 242 }
209 printk("\n");
210 return n; 243 return n;
211} 244}
212 245
@@ -224,7 +257,7 @@ void show_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s
224 int i = 11; 257 int i = 11;
225 unsigned used = 0; 258 unsigned used = 0;
226 259
227 printk("\nCall Trace:"); 260 printk("\nCall Trace:\n");
228 261
229 if (!tsk) 262 if (!tsk)
230 tsk = current; 263 tsk = current;
@@ -250,16 +283,15 @@ void show_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s
250 } 283 }
251 } 284 }
252 285
286 /*
287 * Print function call entries within a stack. 'cond' is the
288 * "end of stackframe" condition, that the 'stack++'
289 * iteration will eventually trigger.
290 */
253#define HANDLE_STACK(cond) \ 291#define HANDLE_STACK(cond) \
254 do while (cond) { \ 292 do while (cond) { \
255 unsigned long addr = *stack++; \ 293 unsigned long addr = *stack++; \
256 if (kernel_text_address(addr)) { \ 294 if (kernel_text_address(addr)) { \
257 if (i > 50) { \
258 printk("\n "); \
259 i = 0; \
260 } \
261 else \
262 i += printk(" "); \
263 /* \ 295 /* \
264 * If the address is either in the text segment of the \ 296 * If the address is either in the text segment of the \
265 * kernel, or in the region which contains vmalloc'ed \ 297 * kernel, or in the region which contains vmalloc'ed \
@@ -268,20 +300,30 @@ void show_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s
268 * down the cause of the crash will be able to figure \ 300 * down the cause of the crash will be able to figure \
269 * out the call path that was taken. \ 301 * out the call path that was taken. \
270 */ \ 302 */ \
271 i += printk_address(addr); \ 303 printk_address(addr); \
272 } \ 304 } \
273 } while (0) 305 } while (0)
274 306
275 for(; ; ) { 307 /*
308 * Print function call entries in all stacks, starting at the
309 * current stack address. If the stacks consist of nested
310 * exceptions
311 */
312 for ( ; ; ) {
276 const char *id; 313 const char *id;
277 unsigned long *estack_end; 314 unsigned long *estack_end;
278 estack_end = in_exception_stack(cpu, (unsigned long)stack, 315 estack_end = in_exception_stack(cpu, (unsigned long)stack,
279 &used, &id); 316 &used, &id);
280 317
281 if (estack_end) { 318 if (estack_end) {
282 i += printk(" <%s>", id); 319 printk(" <%s>", id);
283 HANDLE_STACK (stack < estack_end); 320 HANDLE_STACK (stack < estack_end);
284 i += printk(" <EOE>"); 321 printk(" <EOE>");
322 /*
323 * We link to the next stack via the
324 * second-to-last pointer (index -2 to end) in the
325 * exception stack:
326 */
285 stack = (unsigned long *) estack_end[-2]; 327 stack = (unsigned long *) estack_end[-2];
286 continue; 328 continue;
287 } 329 }
@@ -291,19 +333,28 @@ void show_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s
291 (IRQSTACKSIZE - 64) / sizeof(*irqstack); 333 (IRQSTACKSIZE - 64) / sizeof(*irqstack);
292 334
293 if (stack >= irqstack && stack < irqstack_end) { 335 if (stack >= irqstack && stack < irqstack_end) {
294 i += printk(" <IRQ>"); 336 printk(" <IRQ>");
295 HANDLE_STACK (stack < irqstack_end); 337 HANDLE_STACK (stack < irqstack_end);
338 /*
339 * We link to the next stack (which would be
340 * the process stack normally) the last
341 * pointer (index -1 to end) in the IRQ stack:
342 */
296 stack = (unsigned long *) (irqstack_end[-1]); 343 stack = (unsigned long *) (irqstack_end[-1]);
297 irqstack_end = NULL; 344 irqstack_end = NULL;
298 i += printk(" <EOI>"); 345 printk(" <EOI>");
299 continue; 346 continue;
300 } 347 }
301 } 348 }
302 break; 349 break;
303 } 350 }
304 351
352 /*
353 * This prints the process stack:
354 */
305 HANDLE_STACK (((long) stack & (THREAD_SIZE-1)) != 0); 355 HANDLE_STACK (((long) stack & (THREAD_SIZE-1)) != 0);
306#undef HANDLE_STACK 356#undef HANDLE_STACK
357
307 printk("\n"); 358 printk("\n");
308} 359}
309 360
@@ -337,8 +388,8 @@ static void _show_stack(struct task_struct *tsk, struct pt_regs *regs, unsigned
337 break; 388 break;
338 } 389 }
339 if (i && ((i % 4) == 0)) 390 if (i && ((i % 4) == 0))
340 printk("\n "); 391 printk("\n");
341 printk("%016lx ", *stack++); 392 printk(" %016lx", *stack++);
342 touch_nmi_watchdog(); 393 touch_nmi_watchdog();
343 } 394 }
344 show_trace(tsk, regs, rsp); 395 show_trace(tsk, regs, rsp);
diff --git a/arch/x86_64/lib/thunk.S b/arch/x86_64/lib/thunk.S
index e49af0032e94..332ea5dff916 100644
--- a/arch/x86_64/lib/thunk.S
+++ b/arch/x86_64/lib/thunk.S
@@ -47,6 +47,11 @@
47 thunk_retrax __down_failed_interruptible,__down_interruptible 47 thunk_retrax __down_failed_interruptible,__down_interruptible
48 thunk_retrax __down_failed_trylock,__down_trylock 48 thunk_retrax __down_failed_trylock,__down_trylock
49 thunk __up_wakeup,__up 49 thunk __up_wakeup,__up
50
51#ifdef CONFIG_TRACE_IRQFLAGS
52 thunk trace_hardirqs_on_thunk,trace_hardirqs_on
53 thunk trace_hardirqs_off_thunk,trace_hardirqs_off
54#endif
50 55
51 /* SAVE_ARGS below is used only for the .cfi directives it contains. */ 56 /* SAVE_ARGS below is used only for the .cfi directives it contains. */
52 CFI_STARTPROC 57 CFI_STARTPROC
diff --git a/arch/x86_64/mm/fault.c b/arch/x86_64/mm/fault.c
index 5afcf6eb00fa..ac8ea66ccb94 100644
--- a/arch/x86_64/mm/fault.c
+++ b/arch/x86_64/mm/fault.c
@@ -570,7 +570,6 @@ no_context:
570 printk(KERN_ALERT "Unable to handle kernel paging request"); 570 printk(KERN_ALERT "Unable to handle kernel paging request");
571 printk(" at %016lx RIP: \n" KERN_ALERT,address); 571 printk(" at %016lx RIP: \n" KERN_ALERT,address);
572 printk_address(regs->rip); 572 printk_address(regs->rip);
573 printk("\n");
574 dump_pagetable(address); 573 dump_pagetable(address);
575 tsk->thread.cr2 = address; 574 tsk->thread.cr2 = address;
576 tsk->thread.trap_no = 14; 575 tsk->thread.trap_no = 14;
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index 4a2c365ba684..412ab32de391 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -52,7 +52,7 @@ unsigned long long sched_clock(void)
52static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs); 52static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs);
53static struct irqaction timer_irqaction = { 53static struct irqaction timer_irqaction = {
54 .handler = timer_interrupt, 54 .handler = timer_interrupt,
55 .flags = SA_INTERRUPT, 55 .flags = IRQF_DISABLED,
56 .name = "timer", 56 .name = "timer",
57}; 57};
58 58